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authorShaohua Li <shaohua.li@intel.com>2009-02-23 15:19:21 +0800
committerEric Anholt <eric@anholt.net>2009-02-27 11:49:10 -0800
commit40290745ea645b52d30f866abfe25ac5d58a755c (patch)
tree9120c3b493913cadaecf2aac959c5bb7a169e672
parent43714e92e3b512307851349fd8c706638030854e (diff)
i915: Add support for a new G33-like chipset.
Signed-off-by: Shaohua Li <shaohua.li@intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
-rw-r--r--src/mesa/drivers/dri/intel/intel_chipset.h11
-rw-r--r--src/mesa/drivers/dri/intel/intel_context.c4
2 files changed, 13 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/intel/intel_chipset.h b/src/mesa/drivers/dri/intel/intel_chipset.h
index d1b4941601e..4593d90df3d 100644
--- a/src/mesa/drivers/dri/intel/intel_chipset.h
+++ b/src/mesa/drivers/dri/intel/intel_chipset.h
@@ -46,6 +46,13 @@
#define PCI_CHIP_G33_G 0x29C2
#define PCI_CHIP_Q33_G 0x29D2
+#define PCI_CHIP_IGD_GM 0xA011
+#define PCI_CHIP_IGD_G 0xA001
+
+#define IS_IGDGM(devid) (devid == PCI_CHIP_IGD_GM)
+#define IS_IGDG(devid) (devid == PCI_CHIP_IGD_G)
+#define IS_IGD(devid) (IS_IGDG(devid) || IS_IGDGM(devid))
+
#define PCI_CHIP_I965_G 0x29A2
#define PCI_CHIP_I965_Q 0x2992
#define PCI_CHIP_I965_G_1 0x2982
@@ -66,7 +73,7 @@
devid == PCI_CHIP_I945_GME || \
devid == PCI_CHIP_I965_GM || \
devid == PCI_CHIP_I965_GME || \
- devid == PCI_CHIP_GM45_GM)
+ devid == PCI_CHIP_GM45_GM || IS_IGD(devid))
#define IS_G45(devid) (devid == PCI_CHIP_IGD_E_G || \
devid == PCI_CHIP_Q45_G || \
@@ -84,7 +91,7 @@
devid == PCI_CHIP_I945_GME || \
devid == PCI_CHIP_G33_G || \
devid == PCI_CHIP_Q33_G || \
- devid == PCI_CHIP_Q35_G)
+ devid == PCI_CHIP_Q35_G || IS_IGD(devid))
#define IS_965(devid) (devid == PCI_CHIP_I965_G || \
devid == PCI_CHIP_I965_Q || \
diff --git a/src/mesa/drivers/dri/intel/intel_context.c b/src/mesa/drivers/dri/intel/intel_context.c
index 1aa173db181..b3f6fc02dff 100644
--- a/src/mesa/drivers/dri/intel/intel_context.c
+++ b/src/mesa/drivers/dri/intel/intel_context.c
@@ -123,6 +123,10 @@ intelGetString(GLcontext * ctx, GLenum name)
case PCI_CHIP_Q33_G:
chipset = "Intel(R) Q33";
break;
+ case PCI_CHIP_IGD_GM:
+ case PCI_CHIP_IGD_G:
+ chipset = "Intel(R) IGD";
+ break;
case PCI_CHIP_I965_Q:
chipset = "Intel(R) 965Q";
break;