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authorMichel Dänzer <daenzer@vmware.com>2011-05-09 18:26:50 +0200
committerMichel Dänzer <michel@daenzer.net>2011-05-09 18:26:50 +0200
commit39be542f734f5725108f3e0223a9d748033b4735 (patch)
tree9b1217786da8ad00d8e868ba3d98ff9ce17e7f5e
parentb9e8ea6a2717422ea71887beda093fe1dfbd1200 (diff)
r300c: Fix up for register allocator rewrite.
Was broken by commit fe622bac0c1b5b9f2a9fcf9f35b51232a06bea42 ('r300/compiler: Rewrite register allocator').
-rw-r--r--src/mesa/drivers/dri/r300/r300_blit.c1
-rw-r--r--src/mesa/drivers/dri/r300/radeon_mesa_to_rc.c1
2 files changed, 2 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/r300/r300_blit.c b/src/mesa/drivers/dri/r300/r300_blit.c
index 14e60866d93..c525f0ffe2f 100644
--- a/src/mesa/drivers/dri/r300/r300_blit.c
+++ b/src/mesa/drivers/dri/r300/r300_blit.c
@@ -118,6 +118,7 @@ static void create_fragment_program(struct r300_context *r300)
inst->U.I.SrcReg[0].Negate = 0;
inst->U.I.SrcReg[0].RelAddr = 0;
inst->U.I.SrcReg[0].Swizzle = RC_SWIZZLE_XYZW;
+ inst->U.I.TexSwizzle = RC_SWIZZLE_XYZW;
compiler.Base.Program.InputsRead = (1 << FRAG_ATTRIB_TEX0);
compiler.OutputColor[0] = FRAG_RESULT_COLOR;
diff --git a/src/mesa/drivers/dri/r300/radeon_mesa_to_rc.c b/src/mesa/drivers/dri/r300/radeon_mesa_to_rc.c
index 232603ece59..b1dfccd22d0 100644
--- a/src/mesa/drivers/dri/r300/radeon_mesa_to_rc.c
+++ b/src/mesa/drivers/dri/r300/radeon_mesa_to_rc.c
@@ -170,6 +170,7 @@ static void translate_instruction(struct radeon_compiler * c,
dest->U.I.TexSrcUnit = src->TexSrcUnit;
dest->U.I.TexSrcTarget = translate_tex_target(src->TexSrcTarget);
dest->U.I.TexShadow = src->TexShadow;
+ dest->U.I.TexSwizzle = RC_SWIZZLE_XYZW;
}
}