diff options
| author | Rhys Perry <pendingchaos02@gmail.com> | 2021-03-11 11:40:51 +0000 |
|---|---|---|
| committer | Rhys Perry <pendingchaos02@gmail.com> | 2021-03-11 13:54:18 +0000 |
| commit | 35fe62dad10cdeff0af39009185c85aa59db6a76 (patch) | |
| tree | a34c70bf36ccd967e4f6c8284fc7fe3c2a42dc95 | |
| parent | 341dd9d834c994d2ea4ccafeda058813a4ae4447 (diff) | |
radv/llvm: fix enabled_channels for compressed exports
The old values seemed to work fine, but the ISA docs recommend 0x0,0x3,0xc
and 0xf:
COMPR==1: export half-dword enable. Valid values are: 0x0,3,c,f
[0] enables VSRC0 : R,G from one VGPR (R in low bits, G high)
[2] enables VSRC1 : B,A from one VGPR (B in low bits, A high)
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9459>
| -rw-r--r-- | src/amd/vulkan/radv_nir_to_llvm.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan/radv_nir_to_llvm.c index b2dec617cee..3aa646ce3a2 100644 --- a/src/amd/vulkan/radv_nir_to_llvm.c +++ b/src/amd/vulkan/radv_nir_to_llvm.c @@ -1433,7 +1433,7 @@ si_llvm_init_export_args(struct radv_shader_context *ctx, break; case V_028714_SPI_SHADER_FP16_ABGR: - args->enabled_channels = 0x5; + args->enabled_channels = 0xf; packf = ac_build_cvt_pkrtz_f16; if (is_16bit) { for (unsigned chan = 0; chan < 4; chan++) @@ -1444,17 +1444,17 @@ si_llvm_init_export_args(struct radv_shader_context *ctx, break; case V_028714_SPI_SHADER_UNORM16_ABGR: - args->enabled_channels = 0x5; + args->enabled_channels = 0xf; packf = ac_build_cvt_pknorm_u16; break; case V_028714_SPI_SHADER_SNORM16_ABGR: - args->enabled_channels = 0x5; + args->enabled_channels = 0xf; packf = ac_build_cvt_pknorm_i16; break; case V_028714_SPI_SHADER_UINT16_ABGR: - args->enabled_channels = 0x5; + args->enabled_channels = 0xf; packi = ac_build_cvt_pk_u16; if (is_16bit) { for (unsigned chan = 0; chan < 4; chan++) @@ -1465,7 +1465,7 @@ si_llvm_init_export_args(struct radv_shader_context *ctx, break; case V_028714_SPI_SHADER_SINT16_ABGR: - args->enabled_channels = 0x5; + args->enabled_channels = 0xf; packi = ac_build_cvt_pk_i16; if (is_16bit) { for (unsigned chan = 0; chan < 4; chan++) |