diff options
| author | Rafael Antognolli <rafael.antognolli@intel.com> | 2019-02-26 12:02:35 -0800 |
|---|---|---|
| committer | Rafael Antognolli <rafael.antognolli@intel.com> | 2019-03-20 16:46:25 -0700 |
| commit | 34d00b4410bcd5fe602f171b6febcfcab4347467 (patch) | |
| tree | 6d7803c945937210331798f1ed1c7452889b0bb1 | |
| parent | 37f2692591cb1af12325d16f7fea17cc761ae9d5 (diff) | |
iris: Use the clear depth when emitting 3DSTATE_CLEAR_PARAMS.
Take the clear depth into account when IRIS_DIRTY_DEPTH_BUFFER is marked
as dirty.
Also update the blorp surface clear color.
v2: Use a single if (zres && zres->aux.bo) (Ken).
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
| -rw-r--r-- | src/gallium/drivers/iris/iris_blit.c | 2 | ||||
| -rw-r--r-- | src/gallium/drivers/iris/iris_state.c | 25 |
2 files changed, 26 insertions, 1 deletions
diff --git a/src/gallium/drivers/iris/iris_blit.c b/src/gallium/drivers/iris/iris_blit.c index 3fa2f07cabb..057abc888e2 100644 --- a/src/gallium/drivers/iris/iris_blit.c +++ b/src/gallium/drivers/iris/iris_blit.c @@ -253,6 +253,8 @@ iris_blorp_surf_for_resource(struct iris_vtable *vtbl, .reloc_flags = is_render_target ? EXEC_OBJECT_WRITE : 0, .mocs = vtbl->mocs(res->bo), }; + surf->clear_color = + iris_resource_get_clear_color(res, NULL, NULL); } // XXX: ASTC diff --git a/src/gallium/drivers/iris/iris_state.c b/src/gallium/drivers/iris/iris_state.c index 4d9f087ae28..015613b5274 100644 --- a/src/gallium/drivers/iris/iris_state.c +++ b/src/gallium/drivers/iris/iris_state.c @@ -4639,7 +4639,30 @@ iris_upload_dirty_render_state(struct iris_context *ice, if (dirty & IRIS_DIRTY_DEPTH_BUFFER) { struct iris_depth_buffer_state *cso_z = &ice->state.genx->depth_buffer; - iris_batch_emit(batch, cso_z->packets, sizeof(cso_z->packets)); + /* Do not emit the clear params yets. We need to update the clear value + * first. + */ + uint32_t clear_length = GENX(3DSTATE_CLEAR_PARAMS_length) * 4; + uint32_t cso_z_size = sizeof(cso_z->packets) - clear_length; + iris_batch_emit(batch, cso_z->packets, cso_z_size); + + union isl_color_value clear_value = { .f32 = { 0, } }; + + struct pipe_framebuffer_state *cso_fb = &ice->state.framebuffer; + if (cso_fb->zsbuf) { + struct iris_resource *zres, *sres; + iris_get_depth_stencil_resources(cso_fb->zsbuf->texture, + &zres, &sres); + if (zres && zres->aux.bo) + clear_value = iris_resource_get_clear_color(zres, NULL, NULL); + } + + uint32_t clear_params[GENX(3DSTATE_CLEAR_PARAMS_length)]; + iris_pack_command(GENX(3DSTATE_CLEAR_PARAMS), clear_params, clear) { + clear.DepthClearValueValid = true; + clear.DepthClearValue = clear_value.f32[0]; + } + iris_batch_emit(batch, clear_params, clear_length); } if (dirty & (IRIS_DIRTY_DEPTH_BUFFER | IRIS_DIRTY_WM_DEPTH_STENCIL)) { |