diff options
| author | Marek Olšák <marek.olsak@amd.com> | 2018-04-03 19:32:12 -0400 |
|---|---|---|
| committer | Marek Olšák <marek.olsak@amd.com> | 2018-04-13 12:31:04 -0400 |
| commit | 1372ccfe6f812db65a0e9c467edb4565c56e6677 (patch) | |
| tree | 0ff7b26119d03d948065a092c119143b7d742081 | |
| parent | afe0bd2c558918219abc0d596ecb3276f030fb43 (diff) | |
radeonsi: disable TC-compat HTILE on Tonga and Iceland
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_texture.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeonsi/si_texture.c b/src/gallium/drivers/radeonsi/si_texture.c index b1a47dd6068..17957f18a5f 100644 --- a/src/gallium/drivers/radeonsi/si_texture.c +++ b/src/gallium/drivers/radeonsi/si_texture.c @@ -1442,6 +1442,13 @@ struct pipe_resource *si_texture_create(struct pipe_screen *screen, bool is_flushed_depth = templ->flags & SI_RESOURCE_FLAG_FLUSHED_DEPTH; bool tc_compatible_htile = sscreen->info.chip_class >= VI && + /* There are issues with TC-compatible HTILE on Tonga (and + * Iceland is the same design), and documented bug workarounds + * don't help. For example, this fails: + * piglit/bin/tex-miplevel-selection 'texture()' 2DShadow -auto + */ + sscreen->info.family != CHIP_TONGA && + sscreen->info.family != CHIP_ICELAND && (templ->flags & PIPE_RESOURCE_FLAG_TEXTURING_MORE_LIKELY) && !(sscreen->debug_flags & DBG(NO_HYPERZ)) && !is_flushed_depth && |