diff options
author | Lionel Landwerlin <lionel.g.landwerlin@intel.com> | 2022-04-13 13:06:43 +0300 |
---|---|---|
committer | Marge Bot <emma+marge@anholt.net> | 2022-04-13 21:13:56 +0000 |
commit | 08f3950d6b9bba4300f984c079463a3e5fbe2f53 (patch) | |
tree | 4a15939a034c5aec2129de53e44ab826f8642a3b | |
parent | 5fad6bca72eb474b616eccb3e71c6427d4977bb9 (diff) |
anv: stop using old entrypoint/struct/enum names for 1.3
v2: More replacements
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com> (v1)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15920>
-rw-r--r-- | src/intel/vulkan/anv_blorp.c | 34 | ||||
-rw-r--r-- | src/intel/vulkan/anv_cmd_buffer.c | 36 | ||||
-rw-r--r-- | src/intel/vulkan/anv_private.h | 104 | ||||
-rw-r--r-- | src/intel/vulkan/genX_cmd_buffer.c | 40 | ||||
-rw-r--r-- | src/intel/vulkan/genX_query.c | 4 |
5 files changed, 109 insertions, 109 deletions
diff --git a/src/intel/vulkan/anv_blorp.c b/src/intel/vulkan/anv_blorp.c index 9f6029657e3..9303d0a3bea 100644 --- a/src/intel/vulkan/anv_blorp.c +++ b/src/intel/vulkan/anv_blorp.c @@ -308,7 +308,7 @@ copy_image(struct anv_cmd_buffer *cmd_buffer, VkImageLayout src_image_layout, struct anv_image *dst_image, VkImageLayout dst_image_layout, - const VkImageCopy2KHR *region) + const VkImageCopy2 *region) { VkOffset3D srcOffset = anv_sanitize_image_offset(src_image->vk.image_type, region->srcOffset); @@ -421,9 +421,9 @@ copy_image(struct anv_cmd_buffer *cmd_buffer, } } -void anv_CmdCopyImage2KHR( +void anv_CmdCopyImage2( VkCommandBuffer commandBuffer, - const VkCopyImageInfo2KHR* pCopyImageInfo) + const VkCopyImageInfo2* pCopyImageInfo) { ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer); ANV_FROM_HANDLE(anv_image, src_image, pCopyImageInfo->srcImage); @@ -466,7 +466,7 @@ copy_buffer_to_image(struct anv_cmd_buffer *cmd_buffer, struct anv_buffer *anv_buffer, struct anv_image *anv_image, VkImageLayout image_layout, - const VkBufferImageCopy2KHR* region, + const VkBufferImageCopy2* region, bool buffer_to_image) { struct { @@ -592,9 +592,9 @@ copy_buffer_to_image(struct anv_cmd_buffer *cmd_buffer, } } -void anv_CmdCopyBufferToImage2KHR( +void anv_CmdCopyBufferToImage2( VkCommandBuffer commandBuffer, - const VkCopyBufferToImageInfo2KHR* pCopyBufferToImageInfo) + const VkCopyBufferToImageInfo2* pCopyBufferToImageInfo) { ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer); ANV_FROM_HANDLE(anv_buffer, src_buffer, pCopyBufferToImageInfo->srcBuffer); @@ -612,9 +612,9 @@ void anv_CmdCopyBufferToImage2KHR( anv_blorp_batch_finish(&batch); } -void anv_CmdCopyImageToBuffer2KHR( +void anv_CmdCopyImageToBuffer2( VkCommandBuffer commandBuffer, - const VkCopyImageToBufferInfo2KHR* pCopyImageToBufferInfo) + const VkCopyImageToBufferInfo2* pCopyImageToBufferInfo) { ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer); ANV_FROM_HANDLE(anv_image, src_image, pCopyImageToBufferInfo->srcImage); @@ -662,7 +662,7 @@ blit_image(struct anv_cmd_buffer *cmd_buffer, VkImageLayout src_image_layout, struct anv_image *dst_image, VkImageLayout dst_image_layout, - const VkImageBlit2KHR *region, + const VkImageBlit2 *region, VkFilter filter) { const VkImageSubresourceLayers *src_res = ®ion->srcSubresource; @@ -773,9 +773,9 @@ blit_image(struct anv_cmd_buffer *cmd_buffer, } } -void anv_CmdBlitImage2KHR( +void anv_CmdBlitImage2( VkCommandBuffer commandBuffer, - const VkBlitImageInfo2KHR* pBlitImageInfo) + const VkBlitImageInfo2* pBlitImageInfo) { ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer); ANV_FROM_HANDLE(anv_image, src_image, pBlitImageInfo->srcImage); @@ -820,7 +820,7 @@ copy_buffer(struct anv_device *device, struct blorp_batch *batch, struct anv_buffer *src_buffer, struct anv_buffer *dst_buffer, - const VkBufferCopy2KHR *region) + const VkBufferCopy2 *region) { struct blorp_address src = { .buffer = src_buffer->address.bo, @@ -838,9 +838,9 @@ copy_buffer(struct anv_device *device, blorp_buffer_copy(batch, src, dst, region->size); } -void anv_CmdCopyBuffer2KHR( +void anv_CmdCopyBuffer2( VkCommandBuffer commandBuffer, - const VkCopyBufferInfo2KHR* pCopyBufferInfo) + const VkCopyBufferInfo2* pCopyBufferInfo) { ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer); ANV_FROM_HANDLE(anv_buffer, src_buffer, pCopyBufferInfo->srcBuffer); @@ -1452,7 +1452,7 @@ resolve_image(struct anv_cmd_buffer *cmd_buffer, VkImageLayout src_image_layout, struct anv_image *dst_image, VkImageLayout dst_image_layout, - const VkImageResolve2KHR *region) + const VkImageResolve2 *region) { assert(region->srcSubresource.aspectMask == region->dstSubresource.aspectMask); assert(vk_image_subresource_layer_count(&src_image->vk, ®ion->srcSubresource) == @@ -1492,9 +1492,9 @@ resolve_image(struct anv_cmd_buffer *cmd_buffer, } } -void anv_CmdResolveImage2KHR( +void anv_CmdResolveImage2( VkCommandBuffer commandBuffer, - const VkResolveImageInfo2KHR* pResolveImageInfo) + const VkResolveImageInfo2* pResolveImageInfo) { ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer); ANV_FROM_HANDLE(anv_image, src_image, pResolveImageInfo->srcImage); diff --git a/src/intel/vulkan/anv_cmd_buffer.c b/src/intel/vulkan/anv_cmd_buffer.c index bbc2de808b6..ea62f8bc65e 100644 --- a/src/intel/vulkan/anv_cmd_buffer.c +++ b/src/intel/vulkan/anv_cmd_buffer.c @@ -623,7 +623,7 @@ void anv_CmdBindPipeline( anv_cmd_buffer_set_ray_query_buffer(cmd_buffer, state, pipeline, stages); } -void anv_CmdSetRasterizerDiscardEnableEXT( +void anv_CmdSetRasterizerDiscardEnable( VkCommandBuffer commandBuffer, VkBool32 rasterizerDiscardEnable) { @@ -634,7 +634,7 @@ void anv_CmdSetRasterizerDiscardEnableEXT( cmd_buffer->state.gfx.dirty |= ANV_CMD_DIRTY_DYNAMIC_RASTERIZER_DISCARD_ENABLE; } -void anv_CmdSetDepthBiasEnableEXT( +void anv_CmdSetDepthBiasEnable( VkCommandBuffer commandBuffer, VkBool32 depthBiasEnable) { @@ -645,7 +645,7 @@ void anv_CmdSetDepthBiasEnableEXT( cmd_buffer->state.gfx.dirty |= ANV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS_ENABLE; } -void anv_CmdSetPrimitiveRestartEnableEXT( +void anv_CmdSetPrimitiveRestartEnable( VkCommandBuffer commandBuffer, VkBool32 primitiveRestartEnable) { @@ -693,7 +693,7 @@ void anv_CmdSetViewport( cmd_buffer->state.gfx.dirty |= ANV_CMD_DIRTY_DYNAMIC_VIEWPORT; } -void anv_CmdSetViewportWithCountEXT( +void anv_CmdSetViewportWithCount( VkCommandBuffer commandBuffer, uint32_t viewportCount, const VkViewport* pViewports) @@ -726,7 +726,7 @@ void anv_CmdSetScissor( cmd_buffer->state.gfx.dirty |= ANV_CMD_DIRTY_DYNAMIC_SCISSOR; } -void anv_CmdSetScissorWithCountEXT( +void anv_CmdSetScissorWithCount( VkCommandBuffer commandBuffer, uint32_t scissorCount, const VkRect2D* pScissors) @@ -741,7 +741,7 @@ void anv_CmdSetScissorWithCountEXT( cmd_buffer->state.gfx.dirty |= ANV_CMD_DIRTY_DYNAMIC_SCISSOR; } -void anv_CmdSetPrimitiveTopologyEXT( +void anv_CmdSetPrimitiveTopology( VkCommandBuffer commandBuffer, VkPrimitiveTopology primitiveTopology) { @@ -875,7 +875,7 @@ void anv_CmdSetLineStippleEXT( cmd_buffer->state.gfx.dirty |= ANV_CMD_DIRTY_DYNAMIC_LINE_STIPPLE; } -void anv_CmdSetCullModeEXT( +void anv_CmdSetCullMode( VkCommandBuffer commandBuffer, VkCullModeFlags cullMode) { @@ -886,7 +886,7 @@ void anv_CmdSetCullModeEXT( cmd_buffer->state.gfx.dirty |= ANV_CMD_DIRTY_DYNAMIC_CULL_MODE; } -void anv_CmdSetFrontFaceEXT( +void anv_CmdSetFrontFace( VkCommandBuffer commandBuffer, VkFrontFace frontFace) { @@ -897,7 +897,7 @@ void anv_CmdSetFrontFaceEXT( cmd_buffer->state.gfx.dirty |= ANV_CMD_DIRTY_DYNAMIC_FRONT_FACE; } -void anv_CmdSetDepthTestEnableEXT( +void anv_CmdSetDepthTestEnable( VkCommandBuffer commandBuffer, VkBool32 depthTestEnable) @@ -909,7 +909,7 @@ void anv_CmdSetDepthTestEnableEXT( cmd_buffer->state.gfx.dirty |= ANV_CMD_DIRTY_DYNAMIC_DEPTH_TEST_ENABLE; } -void anv_CmdSetDepthWriteEnableEXT( +void anv_CmdSetDepthWriteEnable( VkCommandBuffer commandBuffer, VkBool32 depthWriteEnable) { @@ -920,7 +920,7 @@ void anv_CmdSetDepthWriteEnableEXT( cmd_buffer->state.gfx.dirty |= ANV_CMD_DIRTY_DYNAMIC_DEPTH_WRITE_ENABLE; } -void anv_CmdSetDepthCompareOpEXT( +void anv_CmdSetDepthCompareOp( VkCommandBuffer commandBuffer, VkCompareOp depthCompareOp) { @@ -931,7 +931,7 @@ void anv_CmdSetDepthCompareOpEXT( cmd_buffer->state.gfx.dirty |= ANV_CMD_DIRTY_DYNAMIC_DEPTH_COMPARE_OP; } -void anv_CmdSetDepthBoundsTestEnableEXT( +void anv_CmdSetDepthBoundsTestEnable( VkCommandBuffer commandBuffer, VkBool32 depthBoundsTestEnable) { @@ -942,7 +942,7 @@ void anv_CmdSetDepthBoundsTestEnableEXT( cmd_buffer->state.gfx.dirty |= ANV_CMD_DIRTY_DYNAMIC_DEPTH_BOUNDS_TEST_ENABLE; } -void anv_CmdSetStencilTestEnableEXT( +void anv_CmdSetStencilTestEnable( VkCommandBuffer commandBuffer, VkBool32 stencilTestEnable) { @@ -953,7 +953,7 @@ void anv_CmdSetStencilTestEnableEXT( cmd_buffer->state.gfx.dirty |= ANV_CMD_DIRTY_DYNAMIC_STENCIL_TEST_ENABLE; } -void anv_CmdSetStencilOpEXT( +void anv_CmdSetStencilOp( VkCommandBuffer commandBuffer, VkStencilFaceFlags faceMask, VkStencilOp failOp, @@ -1129,7 +1129,7 @@ void anv_CmdBindDescriptorSets( } } -void anv_CmdBindVertexBuffers2EXT( +void anv_CmdBindVertexBuffers2( VkCommandBuffer commandBuffer, uint32_t firstBinding, uint32_t bindingCount, @@ -1166,9 +1166,9 @@ void anv_CmdBindVertexBuffers( const VkBuffer* pBuffers, const VkDeviceSize* pOffsets) { - return anv_CmdBindVertexBuffers2EXT(commandBuffer, firstBinding, - bindingCount, pBuffers, pOffsets, - NULL, NULL); + return anv_CmdBindVertexBuffers2(commandBuffer, firstBinding, + bindingCount, pBuffers, pOffsets, + NULL, NULL); } void anv_CmdBindTransformFeedbackBuffersEXT( diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h index b13ef5124af..caa463f6958 100644 --- a/src/intel/vulkan/anv_private.h +++ b/src/intel/vulkan/anv_private.h @@ -1832,7 +1832,7 @@ struct anv_descriptor_set_binding_layout { VkDescriptorType type; /* Flags provided when this binding was created */ - VkDescriptorBindingFlagsEXT flags; + VkDescriptorBindingFlags flags; /* Bitfield representing the type of data this descriptor contains */ enum anv_descriptor_data data; @@ -2259,22 +2259,22 @@ enum anv_cmd_dirty_bits { ANV_CMD_DIRTY_XFB_ENABLE = 1 << 12, ANV_CMD_DIRTY_DYNAMIC_LINE_STIPPLE = 1 << 13, /* VK_DYNAMIC_STATE_LINE_STIPPLE_EXT */ ANV_CMD_DIRTY_DYNAMIC_CULL_MODE = 1 << 14, /* VK_DYNAMIC_STATE_CULL_MODE_EXT */ - ANV_CMD_DIRTY_DYNAMIC_FRONT_FACE = 1 << 15, /* VK_DYNAMIC_STATE_FRONT_FACE_EXT */ - ANV_CMD_DIRTY_DYNAMIC_PRIMITIVE_TOPOLOGY = 1 << 16, /* VK_DYNAMIC_STATE_PRIMITIVE_TOPOLOGY_EXT */ - ANV_CMD_DIRTY_DYNAMIC_VERTEX_INPUT_BINDING_STRIDE = 1 << 17, /* VK_DYNAMIC_STATE_VERTEX_INPUT_BINDING_STRIDE_EXT */ - ANV_CMD_DIRTY_DYNAMIC_DEPTH_TEST_ENABLE = 1 << 18, /* VK_DYNAMIC_STATE_DEPTH_TEST_ENABLE_EXT */ - ANV_CMD_DIRTY_DYNAMIC_DEPTH_WRITE_ENABLE = 1 << 19, /* VK_DYNAMIC_STATE_DEPTH_WRITE_ENABLE_EXT */ - ANV_CMD_DIRTY_DYNAMIC_DEPTH_COMPARE_OP = 1 << 20, /* VK_DYNAMIC_STATE_DEPTH_COMPARE_OP_EXT */ - ANV_CMD_DIRTY_DYNAMIC_DEPTH_BOUNDS_TEST_ENABLE = 1 << 21, /* VK_DYNAMIC_STATE_DEPTH_BOUNDS_TEST_ENABLE_EXT */ - ANV_CMD_DIRTY_DYNAMIC_STENCIL_TEST_ENABLE = 1 << 22, /* VK_DYNAMIC_STATE_STENCIL_TEST_ENABLE_EXT */ - ANV_CMD_DIRTY_DYNAMIC_STENCIL_OP = 1 << 23, /* VK_DYNAMIC_STATE_STENCIL_OP_EXT */ + ANV_CMD_DIRTY_DYNAMIC_FRONT_FACE = 1 << 15, /* VK_DYNAMIC_STATE_FRONT_FACE */ + ANV_CMD_DIRTY_DYNAMIC_PRIMITIVE_TOPOLOGY = 1 << 16, /* VK_DYNAMIC_STATE_PRIMITIVE_TOPOLOGY */ + ANV_CMD_DIRTY_DYNAMIC_VERTEX_INPUT_BINDING_STRIDE = 1 << 17, /* VK_DYNAMIC_STATE_VERTEX_INPUT_BINDING_STRIDE */ + ANV_CMD_DIRTY_DYNAMIC_DEPTH_TEST_ENABLE = 1 << 18, /* VK_DYNAMIC_STATE_DEPTH_TEST_ENABLE */ + ANV_CMD_DIRTY_DYNAMIC_DEPTH_WRITE_ENABLE = 1 << 19, /* VK_DYNAMIC_STATE_DEPTH_WRITE_ENABLE */ + ANV_CMD_DIRTY_DYNAMIC_DEPTH_COMPARE_OP = 1 << 20, /* VK_DYNAMIC_STATE_DEPTH_COMPARE_OP */ + ANV_CMD_DIRTY_DYNAMIC_DEPTH_BOUNDS_TEST_ENABLE = 1 << 21, /* VK_DYNAMIC_STATE_DEPTH_BOUNDS_TEST_ENABLE */ + ANV_CMD_DIRTY_DYNAMIC_STENCIL_TEST_ENABLE = 1 << 22, /* VK_DYNAMIC_STATE_STENCIL_TEST_ENABLE */ + ANV_CMD_DIRTY_DYNAMIC_STENCIL_OP = 1 << 23, /* VK_DYNAMIC_STATE_STENCIL_OP */ ANV_CMD_DIRTY_DYNAMIC_SAMPLE_LOCATIONS = 1 << 24, /* VK_DYNAMIC_STATE_SAMPLE_LOCATIONS_EXT */ ANV_CMD_DIRTY_DYNAMIC_COLOR_BLEND_STATE = 1 << 25, /* VK_DYNAMIC_STATE_COLOR_WRITE_ENABLE_EXT */ ANV_CMD_DIRTY_DYNAMIC_SHADING_RATE = 1 << 26, /* VK_DYNAMIC_STATE_FRAGMENT_SHADING_RATE_KHR */ - ANV_CMD_DIRTY_DYNAMIC_RASTERIZER_DISCARD_ENABLE = 1 << 27, /* VK_DYNAMIC_STATE_RASTERIZER_DISCARD_ENABLE_EXT */ - ANV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS_ENABLE = 1 << 28, /* VK_DYNAMIC_STATE_DEPTH_BIAS_ENABLE_EXT */ + ANV_CMD_DIRTY_DYNAMIC_RASTERIZER_DISCARD_ENABLE = 1 << 27, /* VK_DYNAMIC_STATE_RASTERIZER_DISCARD_ENABLE */ + ANV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS_ENABLE = 1 << 28, /* VK_DYNAMIC_STATE_DEPTH_BIAS_ENABLE */ ANV_CMD_DIRTY_DYNAMIC_LOGIC_OP = 1 << 29, /* VK_DYNAMIC_STATE_LOGIC_OP_EXT */ - ANV_CMD_DIRTY_DYNAMIC_PRIMITIVE_RESTART_ENABLE = 1 << 30, /* VK_DYNAMIC_STATE_PRIMITIVE_RESTART_ENABLE_EXT */ + ANV_CMD_DIRTY_DYNAMIC_PRIMITIVE_RESTART_ENABLE = 1 << 30, /* VK_DYNAMIC_STATE_PRIMITIVE_RESTART_ENABLE */ }; typedef uint32_t anv_cmd_dirty_mask_t; @@ -2312,10 +2312,10 @@ anv_cmd_dirty_bit_for_vk_dynamic_state(VkDynamicState vk_state) { switch (vk_state) { case VK_DYNAMIC_STATE_VIEWPORT: - case VK_DYNAMIC_STATE_VIEWPORT_WITH_COUNT_EXT: + case VK_DYNAMIC_STATE_VIEWPORT_WITH_COUNT: return ANV_CMD_DIRTY_DYNAMIC_VIEWPORT; case VK_DYNAMIC_STATE_SCISSOR: - case VK_DYNAMIC_STATE_SCISSOR_WITH_COUNT_EXT: + case VK_DYNAMIC_STATE_SCISSOR_WITH_COUNT: return ANV_CMD_DIRTY_DYNAMIC_SCISSOR; case VK_DYNAMIC_STATE_LINE_WIDTH: return ANV_CMD_DIRTY_DYNAMIC_LINE_WIDTH; @@ -2333,25 +2333,25 @@ anv_cmd_dirty_bit_for_vk_dynamic_state(VkDynamicState vk_state) return ANV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE; case VK_DYNAMIC_STATE_LINE_STIPPLE_EXT: return ANV_CMD_DIRTY_DYNAMIC_LINE_STIPPLE; - case VK_DYNAMIC_STATE_CULL_MODE_EXT: + case VK_DYNAMIC_STATE_CULL_MODE: return ANV_CMD_DIRTY_DYNAMIC_CULL_MODE; - case VK_DYNAMIC_STATE_FRONT_FACE_EXT: + case VK_DYNAMIC_STATE_FRONT_FACE: return ANV_CMD_DIRTY_DYNAMIC_FRONT_FACE; - case VK_DYNAMIC_STATE_PRIMITIVE_TOPOLOGY_EXT: + case VK_DYNAMIC_STATE_PRIMITIVE_TOPOLOGY: return ANV_CMD_DIRTY_DYNAMIC_PRIMITIVE_TOPOLOGY; - case VK_DYNAMIC_STATE_VERTEX_INPUT_BINDING_STRIDE_EXT: + case VK_DYNAMIC_STATE_VERTEX_INPUT_BINDING_STRIDE: return ANV_CMD_DIRTY_DYNAMIC_VERTEX_INPUT_BINDING_STRIDE; - case VK_DYNAMIC_STATE_DEPTH_TEST_ENABLE_EXT: + case VK_DYNAMIC_STATE_DEPTH_TEST_ENABLE: return ANV_CMD_DIRTY_DYNAMIC_DEPTH_TEST_ENABLE; - case VK_DYNAMIC_STATE_DEPTH_WRITE_ENABLE_EXT: + case VK_DYNAMIC_STATE_DEPTH_WRITE_ENABLE: return ANV_CMD_DIRTY_DYNAMIC_DEPTH_WRITE_ENABLE; - case VK_DYNAMIC_STATE_DEPTH_COMPARE_OP_EXT: + case VK_DYNAMIC_STATE_DEPTH_COMPARE_OP: return ANV_CMD_DIRTY_DYNAMIC_DEPTH_COMPARE_OP; - case VK_DYNAMIC_STATE_DEPTH_BOUNDS_TEST_ENABLE_EXT: + case VK_DYNAMIC_STATE_DEPTH_BOUNDS_TEST_ENABLE: return ANV_CMD_DIRTY_DYNAMIC_DEPTH_BOUNDS_TEST_ENABLE; - case VK_DYNAMIC_STATE_STENCIL_TEST_ENABLE_EXT: + case VK_DYNAMIC_STATE_STENCIL_TEST_ENABLE: return ANV_CMD_DIRTY_DYNAMIC_STENCIL_TEST_ENABLE; - case VK_DYNAMIC_STATE_STENCIL_OP_EXT: + case VK_DYNAMIC_STATE_STENCIL_OP: return ANV_CMD_DIRTY_DYNAMIC_STENCIL_OP; case VK_DYNAMIC_STATE_SAMPLE_LOCATIONS_EXT: return ANV_CMD_DIRTY_DYNAMIC_SAMPLE_LOCATIONS; @@ -2359,13 +2359,13 @@ anv_cmd_dirty_bit_for_vk_dynamic_state(VkDynamicState vk_state) return ANV_CMD_DIRTY_DYNAMIC_COLOR_BLEND_STATE; case VK_DYNAMIC_STATE_FRAGMENT_SHADING_RATE_KHR: return ANV_CMD_DIRTY_DYNAMIC_SHADING_RATE; - case VK_DYNAMIC_STATE_RASTERIZER_DISCARD_ENABLE_EXT: + case VK_DYNAMIC_STATE_RASTERIZER_DISCARD_ENABLE: return ANV_CMD_DIRTY_DYNAMIC_RASTERIZER_DISCARD_ENABLE; - case VK_DYNAMIC_STATE_DEPTH_BIAS_ENABLE_EXT: + case VK_DYNAMIC_STATE_DEPTH_BIAS_ENABLE: return ANV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS_ENABLE; case VK_DYNAMIC_STATE_LOGIC_OP_EXT: return ANV_CMD_DIRTY_DYNAMIC_LOGIC_OP; - case VK_DYNAMIC_STATE_PRIMITIVE_RESTART_ENABLE_EXT: + case VK_DYNAMIC_STATE_PRIMITIVE_RESTART_ENABLE: return ANV_CMD_DIRTY_DYNAMIC_PRIMITIVE_RESTART_ENABLE; default: assert(!"Unsupported dynamic state"); @@ -2450,35 +2450,35 @@ anv_pipe_flush_bit_to_ds_stall_flag(enum anv_pipe_bits bits); static inline enum anv_pipe_bits anv_pipe_flush_bits_for_access_flags(struct anv_device *device, - VkAccessFlags2KHR flags) + VkAccessFlags2 flags) { enum anv_pipe_bits pipe_bits = 0; u_foreach_bit64(b, flags) { - switch ((VkAccessFlags2KHR)BITFIELD64_BIT(b)) { - case VK_ACCESS_2_SHADER_WRITE_BIT_KHR: - case VK_ACCESS_2_SHADER_STORAGE_WRITE_BIT_KHR: + switch ((VkAccessFlags2)BITFIELD64_BIT(b)) { + case VK_ACCESS_2_SHADER_WRITE_BIT: + case VK_ACCESS_2_SHADER_STORAGE_WRITE_BIT: /* We're transitioning a buffer that was previously used as write * destination through the data port. To make its content available * to future operations, flush the hdc pipeline. */ pipe_bits |= ANV_PIPE_HDC_PIPELINE_FLUSH_BIT; break; - case VK_ACCESS_2_COLOR_ATTACHMENT_WRITE_BIT_KHR: + case VK_ACCESS_2_COLOR_ATTACHMENT_WRITE_BIT: /* We're transitioning a buffer that was previously used as render * target. To make its content available to future operations, flush * the render target cache. */ pipe_bits |= ANV_PIPE_RENDER_TARGET_CACHE_FLUSH_BIT; break; - case VK_ACCESS_2_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT_KHR: + case VK_ACCESS_2_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT: /* We're transitioning a buffer that was previously used as depth * buffer. To make its content available to future operations, flush * the depth cache. */ pipe_bits |= ANV_PIPE_DEPTH_CACHE_FLUSH_BIT; break; - case VK_ACCESS_2_TRANSFER_WRITE_BIT_KHR: + case VK_ACCESS_2_TRANSFER_WRITE_BIT: /* We're transitioning a buffer that was previously used as a * transfer write destination. Generic write operations include color * & depth operations as well as buffer operations like : @@ -2495,13 +2495,13 @@ anv_pipe_flush_bits_for_access_flags(struct anv_device *device, pipe_bits |= ANV_PIPE_RENDER_TARGET_CACHE_FLUSH_BIT; pipe_bits |= ANV_PIPE_DEPTH_CACHE_FLUSH_BIT; break; - case VK_ACCESS_2_MEMORY_WRITE_BIT_KHR: + case VK_ACCESS_2_MEMORY_WRITE_BIT: /* We're transitioning a buffer for generic write operations. Flush * all the caches. */ pipe_bits |= ANV_PIPE_FLUSH_BITS; break; - case VK_ACCESS_2_HOST_WRITE_BIT_KHR: + case VK_ACCESS_2_HOST_WRITE_BIT: /* We're transitioning a buffer for access by CPU. Invalidate * all the caches. Since data and tile caches don't have invalidate, * we are forced to flush those as well. @@ -2527,13 +2527,13 @@ anv_pipe_flush_bits_for_access_flags(struct anv_device *device, static inline enum anv_pipe_bits anv_pipe_invalidate_bits_for_access_flags(struct anv_device *device, - VkAccessFlags2KHR flags) + VkAccessFlags2 flags) { enum anv_pipe_bits pipe_bits = 0; u_foreach_bit64(b, flags) { - switch ((VkAccessFlags2KHR)BITFIELD64_BIT(b)) { - case VK_ACCESS_2_INDIRECT_COMMAND_READ_BIT_KHR: + switch ((VkAccessFlags2)BITFIELD64_BIT(b)) { + case VK_ACCESS_2_INDIRECT_COMMAND_READ_BIT: /* Indirect draw commands take a buffer as input that we're going to * read from the command streamer to load some of the HW registers * (see genX_cmd_buffer.c:load_indirect_parameters). This requires a @@ -2555,15 +2555,15 @@ anv_pipe_invalidate_bits_for_access_flags(struct anv_device *device, */ pipe_bits |= ANV_PIPE_TILE_CACHE_FLUSH_BIT; break; - case VK_ACCESS_2_INDEX_READ_BIT_KHR: - case VK_ACCESS_2_VERTEX_ATTRIBUTE_READ_BIT_KHR: + case VK_ACCESS_2_INDEX_READ_BIT: + case VK_ACCESS_2_VERTEX_ATTRIBUTE_READ_BIT: /* We transitioning a buffer to be used for as input for vkCmdDraw* * commands, so we invalidate the VF cache to make sure there is no * stale data when we start rendering. */ pipe_bits |= ANV_PIPE_VF_CACHE_INVALIDATE_BIT; break; - case VK_ACCESS_2_UNIFORM_READ_BIT_KHR: + case VK_ACCESS_2_UNIFORM_READ_BIT: /* We transitioning a buffer to be used as uniform data. Because * uniform is accessed through the data port & sampler, we need to * invalidate the texture cache (sampler) & constant cache (data @@ -2575,21 +2575,21 @@ anv_pipe_invalidate_bits_for_access_flags(struct anv_device *device, else pipe_bits |= ANV_PIPE_HDC_PIPELINE_FLUSH_BIT; break; - case VK_ACCESS_2_SHADER_READ_BIT_KHR: - case VK_ACCESS_2_INPUT_ATTACHMENT_READ_BIT_KHR: - case VK_ACCESS_2_TRANSFER_READ_BIT_KHR: + case VK_ACCESS_2_SHADER_READ_BIT: + case VK_ACCESS_2_INPUT_ATTACHMENT_READ_BIT: + case VK_ACCESS_2_TRANSFER_READ_BIT: /* Transitioning a buffer to be read through the sampler, so * invalidate the texture cache, we don't want any stale data. */ pipe_bits |= ANV_PIPE_TEXTURE_CACHE_INVALIDATE_BIT; break; - case VK_ACCESS_2_MEMORY_READ_BIT_KHR: + case VK_ACCESS_2_MEMORY_READ_BIT: /* Transitioning a buffer for generic read, invalidate all the * caches. */ pipe_bits |= ANV_PIPE_INVALIDATE_BITS; break; - case VK_ACCESS_2_MEMORY_WRITE_BIT_KHR: + case VK_ACCESS_2_MEMORY_WRITE_BIT: /* Generic write, make sure all previously written things land in * memory. */ @@ -2607,7 +2607,7 @@ anv_pipe_invalidate_bits_for_access_flags(struct anv_device *device, pipe_bits |= ANV_PIPE_TILE_CACHE_FLUSH_BIT; pipe_bits |= ANV_PIPE_DATA_CACHE_FLUSH_BIT; break; - case VK_ACCESS_2_HOST_READ_BIT_KHR: + case VK_ACCESS_2_HOST_READ_BIT: /* We're transitioning a buffer that was written by CPU. Flush * all the caches. */ @@ -3610,7 +3610,7 @@ VkResult anv_graphics_pipeline_init(struct anv_graphics_pipeline *pipeline, struct anv_device *device, struct anv_pipeline_cache *cache, const VkGraphicsPipelineCreateInfo *pCreateInfo, - const VkPipelineRenderingCreateInfoKHR *rendering_info, + const VkPipelineRenderingCreateInfo *rendering_info, const VkAllocationCallbacks *alloc); VkResult @@ -3731,7 +3731,7 @@ bool anv_formats_ccs_e_compatible(const struct intel_device_info *devinfo, VkImageCreateFlags create_flags, VkFormat vk_format, VkImageTiling vk_tiling, VkImageUsageFlags vk_usage, - const VkImageFormatListCreateInfoKHR *fmt_list); + const VkImageFormatListCreateInfo *fmt_list); extern VkFormat vk_format_from_android(unsigned android_format, unsigned android_usage); @@ -4338,7 +4338,7 @@ anv_rasterization_aa_mode(VkPolygonMode raster_mode, return false; } -VkFormatFeatureFlags2KHR +VkFormatFeatureFlags2 anv_get_image_format_features2(const struct intel_device_info *devinfo, VkFormat vk_format, const struct anv_format *anv_format, diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c index a094c718bcc..0379ba8ad0c 100644 --- a/src/intel/vulkan/genX_cmd_buffer.c +++ b/src/intel/vulkan/genX_cmd_buffer.c @@ -683,7 +683,7 @@ vk_image_layout_stencil_write_optimal(VkImageLayout layout) { return layout == VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL || layout == VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_STENCIL_ATTACHMENT_OPTIMAL || - layout == VK_IMAGE_LAYOUT_STENCIL_ATTACHMENT_OPTIMAL_KHR; + layout == VK_IMAGE_LAYOUT_STENCIL_ATTACHMENT_OPTIMAL; } #endif @@ -713,7 +713,7 @@ transition_stencil_buffer(struct anv_cmd_buffer *cmd_buffer, * - VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL * - VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL * - VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_STENCIL_ATTACHMENT_OPTIMAL - * - VK_IMAGE_LAYOUT_STENCIL_ATTACHMENT_OPTIMAL_KHR + * - VK_IMAGE_LAYOUT_STENCIL_ATTACHMENT_OPTIMAL * * For general, we have no nice opportunity to transition so we do the copy * to the shadow unconditionally at the end of the subpass. For transfer @@ -1689,7 +1689,7 @@ genX(BeginCommandBuffer)( VK_COMMAND_BUFFER_USAGE_RENDER_PASS_CONTINUE_BIT) { struct anv_cmd_graphics_state *gfx = &cmd_buffer->state.gfx; - const VkCommandBufferInheritanceRenderingInfoKHR *inheritance_info = + const VkCommandBufferInheritanceRenderingInfo *inheritance_info = vk_get_command_buffer_inheritance_rendering_info(cmd_buffer->vk.level, pBeginInfo); @@ -2381,15 +2381,15 @@ genX(cmd_buffer_apply_pipe_flushes)(struct anv_cmd_buffer *cmd_buffer) static void cmd_buffer_barrier(struct anv_cmd_buffer *cmd_buffer, - const VkDependencyInfoKHR *dep_info, + const VkDependencyInfo *dep_info, const char *reason) { /* XXX: Right now, we're really dumb and just flush whatever categories * the app asks for. One of these days we may make this a bit better * but right now that's all the hardware allows for in most areas. */ - VkAccessFlags2KHR src_flags = 0; - VkAccessFlags2KHR dst_flags = 0; + VkAccessFlags2 src_flags = 0; + VkAccessFlags2 dst_flags = 0; for (uint32_t i = 0; i < dep_info->memoryBarrierCount; i++) { src_flags |= dep_info->pMemoryBarriers[i].srcAccessMask; @@ -2402,7 +2402,7 @@ cmd_buffer_barrier(struct anv_cmd_buffer *cmd_buffer, } for (uint32_t i = 0; i < dep_info->imageMemoryBarrierCount; i++) { - const VkImageMemoryBarrier2KHR *img_barrier = + const VkImageMemoryBarrier2 *img_barrier = &dep_info->pImageMemoryBarriers[i]; src_flags |= img_barrier->srcAccessMask; @@ -2462,9 +2462,9 @@ cmd_buffer_barrier(struct anv_cmd_buffer *cmd_buffer, anv_add_pending_pipe_bits(cmd_buffer, bits, reason); } -void genX(CmdPipelineBarrier2KHR)( +void genX(CmdPipelineBarrier2)( VkCommandBuffer commandBuffer, - const VkDependencyInfoKHR* pDependencyInfo) + const VkDependencyInfo* pDependencyInfo) { ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer); @@ -7199,7 +7199,7 @@ void genX(CmdEndRendering)( * - VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL * - VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL * - VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_STENCIL_ATTACHMENT_OPTIMAL - * - VK_IMAGE_LAYOUT_STENCIL_ATTACHMENT_OPTIMAL_KHR + * - VK_IMAGE_LAYOUT_STENCIL_ATTACHMENT_OPTIMAL * * For general, we have no nice opportunity to transition so we do the copy * to the shadow unconditionally at the end of the subpass. For transfer @@ -7302,20 +7302,20 @@ void genX(CmdEndConditionalRenderingEXT)( * by the command streamer for later execution. */ #define ANV_PIPELINE_STAGE_PIPELINED_BITS \ - ~(VK_PIPELINE_STAGE_2_TOP_OF_PIPE_BIT_KHR | \ - VK_PIPELINE_STAGE_2_DRAW_INDIRECT_BIT_KHR | \ - VK_PIPELINE_STAGE_2_HOST_BIT_KHR | \ + ~(VK_PIPELINE_STAGE_2_TOP_OF_PIPE_BIT | \ + VK_PIPELINE_STAGE_2_DRAW_INDIRECT_BIT | \ + VK_PIPELINE_STAGE_2_HOST_BIT | \ VK_PIPELINE_STAGE_2_CONDITIONAL_RENDERING_BIT_EXT) -void genX(CmdSetEvent2KHR)( +void genX(CmdSetEvent2)( VkCommandBuffer commandBuffer, VkEvent _event, - const VkDependencyInfoKHR* pDependencyInfo) + const VkDependencyInfo* pDependencyInfo) { ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer); ANV_FROM_HANDLE(anv_event, event, _event); - VkPipelineStageFlags2KHR src_stages = 0; + VkPipelineStageFlags2 src_stages = 0; for (uint32_t i = 0; i < pDependencyInfo->memoryBarrierCount; i++) src_stages |= pDependencyInfo->pMemoryBarriers[i].srcStageMask; @@ -7344,10 +7344,10 @@ void genX(CmdSetEvent2KHR)( } } -void genX(CmdResetEvent2KHR)( +void genX(CmdResetEvent2)( VkCommandBuffer commandBuffer, VkEvent _event, - VkPipelineStageFlags2KHR stageMask) + VkPipelineStageFlags2 stageMask) { ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer); ANV_FROM_HANDLE(anv_event, event, _event); @@ -7372,11 +7372,11 @@ void genX(CmdResetEvent2KHR)( } } -void genX(CmdWaitEvents2KHR)( +void genX(CmdWaitEvents2)( VkCommandBuffer commandBuffer, uint32_t eventCount, const VkEvent* pEvents, - const VkDependencyInfoKHR* pDependencyInfos) + const VkDependencyInfo* pDependencyInfos) { ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer); diff --git a/src/intel/vulkan/genX_query.c b/src/intel/vulkan/genX_query.c index d6dc49306ac..bc02631c1ad 100644 --- a/src/intel/vulkan/genX_query.c +++ b/src/intel/vulkan/genX_query.c @@ -1244,9 +1244,9 @@ void genX(CmdEndQueryIndexedEXT)( #define TIMESTAMP 0x2358 -void genX(CmdWriteTimestamp2KHR)( +void genX(CmdWriteTimestamp2)( VkCommandBuffer commandBuffer, - VkPipelineStageFlags2KHR stage, + VkPipelineStageFlags2 stage, VkQueryPool queryPool, uint32_t query) { |