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path: root/lib/Target/X86/X86InstrInfo.td
AgeCommit message (Expand)AuthorFilesLines
2012-10-16Merge master branchtstellar1-0/+8
2012-10-11Merge master branchtstellar1-1/+1
2012-10-02Merge master branchtstellar1-6/+6
2012-09-21Revise td of X86 atomic instructionshliao1-19/+38
2012-09-13Revert r163761 "Don't fold indexed loads into TCRETURNmi64."Jakob Stoklund Olesen1-4/+0
2012-09-13Don't fold indexed loads into TCRETURNmi64.Jakob Stoklund Olesen1-0/+4
2012-09-10Update function names to conform to guidelines. No functional change intended.Chad Rosier1-2/+2
2012-08-30Introduce 'UseSSEx' to force SSE legacy encodingMichael Liao1-0/+6
2012-08-27Add HasAVX1Only predicate and use it for patterns that have an AVX1 instructi...Craig Topper1-0/+1
2012-08-24X86MemBarrier has unmodeled side effects.Jakob Stoklund Olesen1-1/+1
2012-07-18Make x86 asm parser to check for xmm vs ymm for index register in gather inst...Craig Topper1-4/+26
2012-07-12Give the rdrand instructions a SideEffect flag and a chain so MachineCSE and ...Benjamin Kramer1-1/+2
2012-07-12Add intrinsics for Ivy Bridge's rdrand instruction.Benjamin Kramer1-3/+10
2012-06-29X86: add more GATHER intrinsics in LLVMManman Ren1-4/+2
2012-06-26X86: add GATHER intrinsics (AVX2) in LLVMManman Ren1-0/+8
2012-06-03Rename FMA3 feature flag to just FMA to match gcc so it can be added to clang.Craig Topper1-1/+1
2012-06-01Implement the local-dynamic TLS model for x86 (PR3985)Hans Wennborg1-0/+11
2012-05-31X86: Rename the CLMUL target feature to PCLMUL.Benjamin Kramer1-1/+1
2012-05-10Added X86 Atom latencies for instructions in X86InstrInfo.td.Preston Gurd1-221/+290
2012-05-09Use ptr_rc_tailcall instead of GR32_TC.Jakob Stoklund Olesen1-2/+3
2012-04-27X86: Don't emit conditional floating point moves on when targeting pre-pentiu...Benjamin Kramer1-5/+10
2012-04-03Add support for AVX enhanced comparison predicates. Patch from Kay Tiong Khoo.Craig Topper1-0/+5
2012-03-06Fix the operand ordering on aliases for shld and shrd. PR12173, part 2.Eli Friedman1-13/+13
2012-03-05Make aliases for shld and shrd match gas. PR12173.Eli Friedman1-14/+14
2012-02-27Add q suffix aliases for the fistp and fisttp mnemonics.Chad Rosier1-0/+2
2012-02-24Add WIN_FTOL_* psudo-instructions to model the unique calling conventionMichael J. Spencer1-0/+5
2012-02-18Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,...Jia Liu1-1/+1
2012-02-18Add X86 assembler and disassembler support for AMD SVM instructions. Original...Craig Topper1-0/+1
2012-02-16Use the same CALL instructions for Windows as for everything else.Jakob Stoklund Olesen1-1/+0
2012-01-17Intel syntax: Fix parser match class to check memory operand size.Devang Patel1-3/+3
2012-01-16Get rid of unused codegen-only instruction.Eli Friedman1-3/+0
2012-01-12Add predicate method check match memory operand size, if available.Devang Patel1-14/+46
2012-01-10Instruction selection priority fixes to remove the XMM/XMMInt/orAVX predicate...Craig Topper1-8/+2
2012-01-09Don't disable MMX support when AVX is enabled. Fix predicates for MMX instruc...Craig Topper1-0/+1
2012-01-01Allow CRC32 instructions to be selected when AVX is enabled.Craig Topper1-0/+1
2012-01-01Fix sfence, lfence, mfence, and clflush to be able to be selected when AVX is...Craig Topper1-0/+1
2011-12-12XOP instructions and encoding tests.Jan Sjödin1-0/+4
2011-12-09Remove hasSSE1orAVX(). It's the same as hasXMM().Evan Cheng1-2/+0
2011-12-08Many of the SSE patterns should not be selected when AVX is available. This l...Evan Cheng1-0/+2
2011-11-29Make X86::FsFLD0SS / FsFLD0SD real pseudo-instructions.Jakob Stoklund Olesen1-0/+1
2011-11-24X86: alias cqo to cqto.Benjamin Kramer1-1/+2
2011-10-30Add intrinsics and feature flag for read/write FS/GS base instructions. Also ...Craig Topper1-0/+2
2011-10-27Change the sysexit mnemonic (and sysexitl) to never have the REX.W prefix andKevin Enderby1-0/+1
2011-10-21Remove intrinsics for X86 BLSI, BLSMSK, and BLSR intrinsics and replace with ...Craig Topper1-10/+14
2011-10-19Rename PEXTR to PEXT. Add intrinsics for BMI instructions.Craig Topper1-24/+47
2011-10-18Remove NaClModeDavid Meyer1-8/+2
2011-10-16Add X86 PEXTR and PDEP instructions.Craig Topper1-0/+17
2011-10-16Add X86 BZHI instruction as well as BMI2 feature detection.Craig Topper1-8/+14
2011-10-16Add X86 BEXTR instruction. This instruction uses VEX.vvvv to encode Operand 3...Craig Topper1-11/+23
2011-10-15Add support for X86 blsr, blsmsk, and blsi instructions. Required extra work ...Craig Topper1-1/+21