diff options
Diffstat (limited to 'xc/programs/Xserver/hw/xfree86/drivers/ati')
107 files changed, 3313 insertions, 1458 deletions
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/Imakefile b/xc/programs/Xserver/hw/xfree86/drivers/ati/Imakefile index e464a8363..fef87db9c 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/Imakefile +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/Imakefile @@ -1,6 +1,6 @@ -XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/Imakefile,v 1.39 2002/09/12 00:33:43 tsi Exp $ +XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/Imakefile,v 1.45 2003/02/17 17:06:41 dawes Exp $ XCOMM -XCOMM Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org +XCOMM Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org XCOMM XCOMM Permission to use, copy, modify, distribute, and sell this software and XCOMM its documentation for any purpose is hereby granted without fee, provided @@ -180,7 +180,7 @@ OBJS = $(OBJS1) $(OBJS2) $(OBJS3) $(OBJS4) INCLUDES = -I. -I../../include #else INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86OSSRC) -I$(XF86SRC) \ - -I$(XF86OSSRC)/vbe -I$(XF86SRC)/int10 \ + -I$(XF86SRC)/vbe -I$(XF86SRC)/int10 \ -I$(XF86SRC)/ddc -I$(XF86SRC)/i2c \ -I$(XF86SRC)/rac -I$(XF86SRC)/ramdac \ -I$(XF86SRC)/shadowfb -I$(XF86SRC)/xaa -I$(XF86SRC)/xf24_32bpp \ @@ -188,7 +188,7 @@ INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86OSSRC) -I$(XF86SRC) \ -I$(XF86SRC)/vgahw -I$(XF86SRC)/fbdevhw \ -I$(SERVERSRC)/cfb -I$(SERVERSRC)/mfb \ -I$(SERVERSRC)/fb -I$(SERVERSRC)/mi \ - -I$(SERVERSRC)/miext/shadow \ + -I$(SERVERSRC)/miext/shadow \ -I$(SERVERSRC)/render -I$(SERVERSRC)/Xext -I$(SERVERSRC)/include \ $(DRIINCLUDES) -I$(FONTINCSRC) -I$(EXTINCSRC) -I$(XINCLUDESRC) #endif @@ -215,6 +215,8 @@ InstallModuleManPage(ati) InstallModuleManPage(r128) +InstallModuleManPage(radeon) + DependTarget() InstallDriverSDKNonExecFile(Imakefile,$(DRIVERSDKDIR)/drivers/ati) diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/ati.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/ati.c index f8c529f3c..3928b8be2 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/ati.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/ati.c @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/ati.c,v 1.20 2002/01/29 03:42:27 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/ati.c,v 1.21 2003/01/01 19:16:30 tsi Exp $ */ /* - * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/ati.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/ati.h index 0ebc118b9..3861a9e16 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/ati.h +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/ati.h @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/ati.h,v 1.8 2002/01/16 16:22:25 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/ati.h,v 1.9 2003/01/01 19:16:30 tsi Exp $ */ /* - * Copyright 1999 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 1999 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiaccel.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiaccel.c index 1d06901b4..02a59b269 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiaccel.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiaccel.c @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiaccel.c,v 1.10 2002/01/16 16:22:25 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiaccel.c,v 1.11 2003/01/01 19:16:30 tsi Exp $ */ /* - * Copyright 2001 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 2001 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiaccel.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiaccel.h index 990fd337f..df59ab0a3 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiaccel.h +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiaccel.h @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiaccel.h,v 1.3 2002/01/16 16:22:25 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiaccel.h,v 1.4 2003/01/01 19:16:30 tsi Exp $ */ /* - * Copyright 2001 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 2001 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiadapter.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiadapter.c index 0b8d2cdb1..897788bae 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiadapter.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiadapter.c @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiadapter.c,v 1.16 2002/01/16 16:22:25 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiadapter.c,v 1.17 2003/01/01 19:16:30 tsi Exp $ */ /* - * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiadapter.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiadapter.h index 3df9c1110..8db366e80 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiadapter.h +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiadapter.h @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiadapter.h,v 1.9 2002/01/16 16:22:25 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiadapter.h,v 1.10 2003/01/01 19:16:30 tsi Exp $ */ /* - * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiadjust.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiadjust.c index be8cd94e6..df2ac649d 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiadjust.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiadjust.c @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiadjust.c,v 1.13 2002/01/16 16:22:25 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiadjust.c,v 1.14 2003/01/01 19:16:30 tsi Exp $ */ /* - * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiadjust.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiadjust.h index f2012e1e5..0ac15ae24 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiadjust.h +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiadjust.h @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiadjust.h,v 1.7 2002/01/16 16:22:25 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiadjust.h,v 1.8 2003/01/01 19:16:30 tsi Exp $ */ /* - * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atibank.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/atibank.c index f9df5d332..82d591ac4 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atibank.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atibank.c @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atibank.c,v 1.11 2002/01/16 16:22:25 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atibank.c,v 1.12 2003/01/01 19:16:30 tsi Exp $ */ /* - * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atibank.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atibank.h index 758b72201..43a91acd5 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atibank.h +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atibank.h @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atibank.h,v 1.7 2002/01/16 16:22:25 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atibank.h,v 1.8 2003/01/01 19:16:30 tsi Exp $ */ /* - * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atibus.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/atibus.c index f46fb4b06..c06c69663 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atibus.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atibus.c @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atibus.c,v 1.16 2002/01/16 16:22:25 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atibus.c,v 1.18 2003/01/22 21:44:10 tsi Exp $ */ /* - * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that @@ -136,10 +136,14 @@ ATIClaimResources #endif /* AVOID_CPIO */ /* Register unshared relocatable resources for inactive adapters */ - pResources = xf86RegisterResources(pATI->iEntity, NULL, ResExclusive); - pResources = xf86ReallocatePciResources(pATI->iEntity, pResources); - if (!pResources) - return; + do + { + pResources = xf86RegisterResources(pATI->iEntity, NULL, ResExclusive); + if (!pResources) + return; + + pResources = xf86ReallocatePciResources(pATI->iEntity, pResources); + } while (!pResources); xf86Msg(X_WARNING, ATI_NAME ": Unable to register the following resources for inactive" diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atibus.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atibus.h index e696d63a9..c5f35e089 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atibus.h +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atibus.h @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atibus.h,v 1.9 2002/01/16 16:22:25 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atibus.h,v 1.11 2003/01/01 19:16:30 tsi Exp $ */ /* - * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that @@ -53,7 +53,7 @@ typedef enum extern const char *ATIBusNames[]; -extern int ATIClaimBusSlot FunctionPrototype((DriverPtr, int, GDevPtr, - Bool, ATIPtr)); +extern int ATIClaimBusSlot FunctionPrototype((DriverPtr, int, GDevPtr, Bool, + ATIPtr)); #endif /* ___ATIBUS_H___ */ diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atichip.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/atichip.c index 407e3ab8f..c27ca1f47 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atichip.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atichip.c @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atichip.c,v 1.27 2002/10/12 01:38:06 martin Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atichip.c,v 1.33 2003/02/19 15:07:46 tsi Exp $ */ /* - * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that @@ -537,19 +537,34 @@ ATIChipID case NewChipID('R', 'E'): case NewChipID('R', 'F'): + case NewChipID('R', 'G'): case NewChipID('S', 'K'): case NewChipID('S', 'L'): case NewChipID('S', 'M'): + /* "SN" is listed as ATI_CHIP_RAGE128_4X in ATI docs */ case NewChipID('S', 'N'): return ATI_CHIP_RAGE128GL; case NewChipID('R', 'K'): case NewChipID('R', 'L'): + /* + * ATI documentation lists SE/SF/SG under both ATI_CHIP_RAGE128VR + * and ATI_CHIP_RAGE128_4X, and lists SH/SK/SL under Rage 128 4X only. + * I'm stuffing them here for now until this can be clarified as ATI + * documentation doesn't mention their details. <mharris@redhat.com> + */ case NewChipID('S', 'E'): case NewChipID('S', 'F'): case NewChipID('S', 'G'): + case NewChipID('S', 'H'): return ATI_CHIP_RAGE128VR; + /* case NewChipID('S', 'H'): */ + /* case NewChipID('S', 'K'): */ + /* case NewChipID('S', 'L'): */ + /* case NewChipID('S', 'N'): */ + /* return ATI_CHIP_RAGE128_4X; */ + case NewChipID('P', 'A'): case NewChipID('P', 'B'): case NewChipID('P', 'C'): @@ -581,10 +596,17 @@ ATIChipID case NewChipID('T', 'F'): case NewChipID('T', 'L'): case NewChipID('T', 'R'): + case NewChipID('T', 'S'): + case NewChipID('T', 'T'): + case NewChipID('T', 'U'): return ATI_CHIP_RAGE128PROULTRA; case NewChipID('L', 'E'): case NewChipID('L', 'F'): + /* + * "LK" and "LL" are not in any ATI documentation I can find + * - mharris + */ case NewChipID('L', 'K'): case NewChipID('L', 'L'): return ATI_CHIP_RAGE128MOBILITY3; @@ -611,9 +633,18 @@ ATIChipID case NewChipID('L', 'X'): return ATI_CHIP_RADEONMOBILITY7; + case NewChipID('Q', 'H'): + case NewChipID('Q', 'I'): + case NewChipID('Q', 'J'): + case NewChipID('Q', 'K'): case NewChipID('Q', 'L'): + case NewChipID('Q', 'M'): case NewChipID('Q', 'N'): case NewChipID('Q', 'O'): + case NewChipID('Q', 'h'): + case NewChipID('Q', 'i'): + case NewChipID('Q', 'j'): + case NewChipID('Q', 'k'): case NewChipID('Q', 'l'): case NewChipID('B', 'B'): return ATI_CHIP_R200; @@ -634,6 +665,10 @@ ATIChipID case NewChipID('L', 'g'): return ATI_CHIP_RADEONMOBILITY9; + case NewChipID('A', 'D'): + case NewChipID('A', 'E'): + case NewChipID('A', 'F'): + case NewChipID('A', 'G'): case NewChipID('N', 'D'): case NewChipID('N', 'E'): case NewChipID('N', 'F'): diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atichip.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atichip.h index 78850af05..ce911c56f 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atichip.h +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atichip.h @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atichip.h,v 1.21 2002/10/12 01:38:06 martin Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atichip.h,v 1.22 2003/01/01 19:16:30 tsi Exp $ */ /* - * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/aticlock.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/aticlock.c index 0af8a34e5..0fc3d6b37 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/aticlock.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/aticlock.c @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/aticlock.c,v 1.19 2002/09/18 17:11:48 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/aticlock.c,v 1.20 2003/01/01 19:16:31 tsi Exp $ */ /* - * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/aticlock.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/aticlock.h index 66de21f55..641ba6959 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/aticlock.h +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/aticlock.h @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/aticlock.h,v 1.7 2002/01/16 16:22:26 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/aticlock.h,v 1.8 2003/01/01 19:16:31 tsi Exp $ */ /* - * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/aticonfig.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/aticonfig.c index adb02152a..aa1f23b98 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/aticonfig.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/aticonfig.c @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/aticonfig.c,v 1.11 2002/02/14 22:08:01 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/aticonfig.c,v 1.12 2003/01/01 19:16:31 tsi Exp $ */ /* - * Copyright 2000 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 2000 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/aticonfig.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/aticonfig.h index 3148ff9ba..bf9c24b2d 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/aticonfig.h +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/aticonfig.h @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/aticonfig.h,v 1.3 2002/01/16 16:22:26 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/aticonfig.h,v 1.5 2003/01/01 19:16:31 tsi Exp $ */ /* - * Copyright 2000 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 2000 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that @@ -29,7 +29,6 @@ #include "xf86str.h" -extern void ATIProcessOptions FunctionPrototype((ScrnInfoPtr, - ATIPtr)); +extern void ATIProcessOptions FunctionPrototype((ScrnInfoPtr, ATIPtr)); #endif /* ___ATICONFIG_H___ */ diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/aticonsole.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/aticonsole.c index 03aa925a2..803dd52a4 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/aticonsole.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/aticonsole.c @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/aticonsole.c,v 1.19 2002/01/16 16:22:26 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/aticonsole.c,v 1.20 2003/01/01 19:16:31 tsi Exp $ */ /* - * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/aticonsole.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/aticonsole.h index 0380dc66f..8157d8348 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/aticonsole.h +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/aticonsole.h @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/aticonsole.h,v 1.8 2002/01/16 16:22:26 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/aticonsole.h,v 1.9 2003/01/01 19:16:31 tsi Exp $ */ /* - * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/aticrtc.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/aticrtc.h index eb99d57d0..9f6ec388d 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/aticrtc.h +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/aticrtc.h @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/aticrtc.h,v 1.7 2002/01/16 16:22:26 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/aticrtc.h,v 1.8 2003/01/01 19:16:31 tsi Exp $ */ /* - * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/aticursor.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/aticursor.c index ec25d9a10..627b05ef1 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/aticursor.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/aticursor.c @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/aticursor.c,v 1.2 2002/01/16 16:22:26 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/aticursor.c,v 1.3 2003/01/01 19:16:31 tsi Exp $ */ /* - * Copyright 2001 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 2001 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/aticursor.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/aticursor.h index 7733e2453..9f8790dc3 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/aticursor.h +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/aticursor.h @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/aticursor.h,v 1.2 2002/01/16 16:22:26 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/aticursor.h,v 1.3 2003/01/01 19:16:31 tsi Exp $ */ /* - * Copyright 2001 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 2001 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atidac.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/atidac.c index cea80dff5..1d3e943b9 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atidac.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atidac.c @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atidac.c,v 1.16 2002/10/15 20:26:05 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atidac.c,v 1.18 2003/02/25 17:58:13 tsi Exp $ */ /* - * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that @@ -94,7 +94,7 @@ ATISetDACIOPorts pATI->CPIO_DAC_MASK = ATIIOPort(DAC_REGS) + 2; pATI->CPIO_DAC_READ = ATIIOPort(DAC_REGS) + 3; pATI->CPIO_DAC_WRITE = ATIIOPort(DAC_REGS) + 0; - pATI->CPIO_DAC_WAIT = pATI->CPIO_DAC_MASK; + pATI->CPIO_DAC_WAIT = pATI->CPIOBase; break; default: diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atidac.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atidac.h index aa4662679..fc3b75894 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atidac.h +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atidac.h @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atidac.h,v 1.13 2002/10/15 20:26:05 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atidac.h,v 1.15 2003/01/01 19:16:31 tsi Exp $ */ /* - * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that @@ -41,36 +41,36 @@ /* * RAMDAC-related definitions. */ -#define ATI_DAC_MAX_TYPE MaxBits(DACTYPE) -#define ATI_DAC_MAX_SUBTYPE MaxBits(BIOS_INIT_DAC_SUBTYPE) - -#define ATI_DAC(_Type, _Subtype) (((_Type) << 4) | (_Subtype)) - -#define ATI_DAC_ATI68830 ATI_DAC(0x0U, 0x0U) -#define ATI_DAC_SC11483 ATI_DAC(0x1U, 0x0U) -#define ATI_DAC_ATI68875 ATI_DAC(0x2U, 0x0U) -#define ATI_DAC_TVP3026_A ATI_DAC(0x2U, 0x7U) -#define ATI_DAC_GENERIC ATI_DAC(0x3U, 0x0U) -#define ATI_DAC_BT481 ATI_DAC(0x4U, 0x0U) -#define ATI_DAC_ATT20C491 ATI_DAC(0x4U, 0x1U) -#define ATI_DAC_SC15026 ATI_DAC(0x4U, 0x2U) -#define ATI_DAC_MU9C1880 ATI_DAC(0x4U, 0x3U) -#define ATI_DAC_IMSG174 ATI_DAC(0x4U, 0x4U) -#define ATI_DAC_ATI68860_B ATI_DAC(0x5U, 0x0U) -#define ATI_DAC_ATI68860_C ATI_DAC(0x5U, 0x1U) -#define ATI_DAC_TVP3026_B ATI_DAC(0x5U, 0x7U) -#define ATI_DAC_STG1700 ATI_DAC(0x6U, 0x0U) -#define ATI_DAC_ATT20C498 ATI_DAC(0x6U, 0x1U) -#define ATI_DAC_STG1702 ATI_DAC(0x7U, 0x0U) -#define ATI_DAC_SC15021 ATI_DAC(0x7U, 0x1U) -#define ATI_DAC_ATT21C498 ATI_DAC(0x7U, 0x2U) -#define ATI_DAC_STG1703 ATI_DAC(0x7U, 0x3U) -#define ATI_DAC_CH8398 ATI_DAC(0x7U, 0x4U) -#define ATI_DAC_ATT20C408 ATI_DAC(0x7U, 0x5U) -#define ATI_DAC_INTERNAL ATI_DAC(0x8U, 0x0U) -#define ATI_DAC_IBMRGB514 ATI_DAC(0x9U, 0x0U) -#define ATI_DAC_UNKNOWN ATI_DAC((ATI_DAC_MAX_TYPE << 2) + 3, \ - ATI_DAC_MAX_SUBTYPE) +#define ATI_DAC_MAX_TYPE MaxBits(DACTYPE) +#define ATI_DAC_MAX_SUBTYPE MaxBits(BIOS_INIT_DAC_SUBTYPE) + +#define ATI_DAC(_Type, _Subtype) (((_Type) << 4) | (_Subtype)) + +#define ATI_DAC_ATI68830 ATI_DAC(0x0U, 0x0U) +#define ATI_DAC_SC11483 ATI_DAC(0x1U, 0x0U) +#define ATI_DAC_ATI68875 ATI_DAC(0x2U, 0x0U) +#define ATI_DAC_TVP3026_A ATI_DAC(0x2U, 0x7U) +#define ATI_DAC_GENERIC ATI_DAC(0x3U, 0x0U) +#define ATI_DAC_BT481 ATI_DAC(0x4U, 0x0U) +#define ATI_DAC_ATT20C491 ATI_DAC(0x4U, 0x1U) +#define ATI_DAC_SC15026 ATI_DAC(0x4U, 0x2U) +#define ATI_DAC_MU9C1880 ATI_DAC(0x4U, 0x3U) +#define ATI_DAC_IMSG174 ATI_DAC(0x4U, 0x4U) +#define ATI_DAC_ATI68860_B ATI_DAC(0x5U, 0x0U) +#define ATI_DAC_ATI68860_C ATI_DAC(0x5U, 0x1U) +#define ATI_DAC_TVP3026_B ATI_DAC(0x5U, 0x7U) +#define ATI_DAC_STG1700 ATI_DAC(0x6U, 0x0U) +#define ATI_DAC_ATT20C498 ATI_DAC(0x6U, 0x1U) +#define ATI_DAC_STG1702 ATI_DAC(0x7U, 0x0U) +#define ATI_DAC_SC15021 ATI_DAC(0x7U, 0x1U) +#define ATI_DAC_ATT21C498 ATI_DAC(0x7U, 0x2U) +#define ATI_DAC_STG1703 ATI_DAC(0x7U, 0x3U) +#define ATI_DAC_CH8398 ATI_DAC(0x7U, 0x4U) +#define ATI_DAC_ATT20C408 ATI_DAC(0x7U, 0x5U) +#define ATI_DAC_INTERNAL ATI_DAC(0x8U, 0x0U) +#define ATI_DAC_IBMRGB514 ATI_DAC(0x9U, 0x0U) +#define ATI_DAC_UNKNOWN ATI_DAC((ATI_DAC_MAX_TYPE << 2) + 3, \ + ATI_DAC_MAX_SUBTYPE) extern const SymTabRec ATIDACDescriptors[]; #ifdef AVOID_CPIO @@ -90,13 +90,14 @@ extern const SymTabRec ATIDACDescriptors[]; #endif /* AVOID_CPIO */ -extern CARD8 ATIGetDACCmdReg FunctionPrototype((ATIPtr)); +extern CARD8 ATIGetDACCmdReg FunctionPrototype((ATIPtr)); -extern void ATIDACPreInit FunctionPrototype((ScrnInfoPtr, ATIPtr, ATIHWPtr)); -extern void ATIDACSave FunctionPrototype((ATIPtr, ATIHWPtr)); -extern void ATIDACSet FunctionPrototype((ATIPtr, ATIHWPtr)); +extern void ATIDACPreInit FunctionPrototype((ScrnInfoPtr, ATIPtr, + ATIHWPtr)); +extern void ATIDACSave FunctionPrototype((ATIPtr, ATIHWPtr)); +extern void ATIDACSet FunctionPrototype((ATIPtr, ATIHWPtr)); -extern void ATILoadPalette FunctionPrototype((ScrnInfoPtr, int, int *, LOCO *, - VisualPtr)); +extern void ATILoadPalette FunctionPrototype((ScrnInfoPtr, int, int *, + LOCO *, VisualPtr)); #endif /* ___ATIDAC_H___ */ diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atidga.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/atidga.c index a516cfe38..beca2d8ed 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atidga.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atidga.c @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atidga.c,v 1.8 2002/01/16 16:22:26 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atidga.c,v 1.9 2003/01/01 19:16:31 tsi Exp $ */ /* - * Copyright 2000 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 2000 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atidga.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atidga.h index 3751ee196..1011a89ba 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atidga.h +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atidga.h @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atidga.h,v 1.5 2002/01/16 16:22:26 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atidga.h,v 1.6 2003/01/01 19:16:31 tsi Exp $ */ /* - * Copyright 2000 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 2000 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atidsp.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/atidsp.c index 63c0d7a92..7ca232991 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atidsp.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atidsp.c @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atidsp.c,v 1.18 2002/05/16 19:35:41 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atidsp.c,v 1.19 2003/01/01 19:16:31 tsi Exp $ */ /* - * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atidsp.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atidsp.h index 33842dd22..d6881cf7d 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atidsp.h +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atidsp.h @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atidsp.h,v 1.9 2002/01/16 16:22:26 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atidsp.h,v 1.10 2003/01/01 19:16:32 tsi Exp $ */ /* - * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiident.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiident.c index b90994ced..1fb9dbbfd 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiident.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiident.c @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiident.c,v 1.10 2002/09/24 15:23:54 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiident.c,v 1.11 2003/01/01 19:16:32 tsi Exp $ */ /* - * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiident.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiident.h index 47ba26ebc..74677c5c9 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiident.h +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiident.h @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiident.h,v 1.9 2002/01/16 16:22:26 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiident.h,v 1.10 2003/01/01 19:16:32 tsi Exp $ */ /* - * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiio.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiio.h index 6166cb63f..f6f871b76 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiio.h +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiio.h @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiio.h,v 1.13 2002/01/16 16:22:26 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiio.h,v 1.14 2003/01/01 19:16:32 tsi Exp $ */ /* - * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiload.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiload.c index b2b3f9dd9..927087226 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiload.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiload.c @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiload.c,v 1.10 2002/04/06 19:06:04 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiload.c,v 1.12 2003/01/01 19:16:32 tsi Exp $ */ /* - * Copyright 2000 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 2000 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that @@ -151,6 +151,7 @@ const char *ATIramdacSymbols[] = "xf86CreateCursorInfoRec", "xf86DestroyCursorInfoRec", "xf86InitCursor", + "xf86ForceHWCursor", NULL }; diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiload.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiload.h index 6c44bfc0f..e056b5244 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiload.h +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiload.h @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiload.h,v 1.4 2002/02/14 22:08:02 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiload.h,v 1.5 2003/01/01 19:16:32 tsi Exp $ */ /* - * Copyright 2000 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 2000 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atilock.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/atilock.c index cf9d480fd..9c02e830f 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atilock.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atilock.c @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atilock.c,v 1.16 2002/05/16 19:35:42 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atilock.c,v 1.18 2003/01/10 20:57:57 tsi Exp $ */ /* - * Copyright 1999 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 1999 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that @@ -111,6 +111,8 @@ ATIUnlock tmp = pATI->LockData.bus_cntl & ~BUS_ROM_DIS; if (pATI->Chip < ATI_CHIP_264VTB) tmp |= SetBits(15, BUS_FIFO_WS); + else + tmp &= ~BUS_MASTER_DIS; if (pATI->Chip >= ATI_CHIP_264VT) tmp |= BUS_EXT_REG_EN; /* Enable Block 1 */ outr(BUS_CNTL, tmp); @@ -175,20 +177,34 @@ ATIUnlock outr(DAC_CNTL, tmp); - /* Save Multimedia Peripheral Port and TVOut state */ if (pATI->Chip >= ATI_CHIP_264VTB) { pATI->LockData.mpp_config = inr(MPP_CONFIG); pATI->LockData.mpp_strobe_seq = inr(MPP_STROBE_SEQ); pATI->LockData.tvo_cntl = inr(TVO_CNTL); - /* Save hardware-assisted I2C control registers */ - if (pATI->Chip >= ATI_CHIP_264GTPRO) + if (pATI->Chip >= ATI_CHIP_264GT2C) { - pATI->LockData.i2c_cntl_0 = - inr(I2C_CNTL_0) | (I2C_CNTL_STAT | I2C_CNTL_HPTR_RST); - outr(I2C_CNTL_0, pATI->LockData.i2c_cntl_0 & ~I2C_CNTL_INT_EN); - pATI->LockData.i2c_cntl_1 = inr(I2C_CNTL_1); + pATI->LockData.hw_debug = inr(HW_DEBUG); + + if (pATI->Chip >= ATI_CHIP_264GTPRO) + { + if (!(pATI->LockData.hw_debug & CMDFIFO_SIZE_EN)) + outr(HW_DEBUG, + pATI->LockData.hw_debug | CMDFIFO_SIZE_EN); + + pATI->LockData.i2c_cntl_0 = + inr(I2C_CNTL_0) | (I2C_CNTL_STAT | I2C_CNTL_HPTR_RST); + outr(I2C_CNTL_0, + pATI->LockData.i2c_cntl_0 & ~I2C_CNTL_INT_EN); + pATI->LockData.i2c_cntl_1 = inr(I2C_CNTL_1); + } + else + { + if (pATI->LockData.hw_debug & CMDFIFO_SIZE_DIS) + outr(HW_DEBUG, + pATI->LockData.hw_debug & ~CMDFIFO_SIZE_DIS); + } } } @@ -561,10 +577,14 @@ ATILock outr(MPP_CONFIG, pATI->LockData.mpp_config); outr(MPP_STROBE_SEQ, pATI->LockData.mpp_strobe_seq); outr(TVO_CNTL, pATI->LockData.tvo_cntl); - if (pATI->Chip >= ATI_CHIP_264GTPRO) + if (pATI->Chip >= ATI_CHIP_264GT2C) { - outr(I2C_CNTL_0, pATI->LockData.i2c_cntl_0); - outr(I2C_CNTL_1, pATI->LockData.i2c_cntl_1); + outr(HW_DEBUG, pATI->LockData.hw_debug); + if (pATI->Chip >= ATI_CHIP_264GTPRO) + { + outr(I2C_CNTL_0, pATI->LockData.i2c_cntl_0); + outr(I2C_CNTL_1, pATI->LockData.i2c_cntl_1); + } } } } diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atilock.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atilock.h index 2b5b67bf7..9b949436a 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atilock.h +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atilock.h @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atilock.h,v 1.4 2002/01/16 16:22:26 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atilock.h,v 1.5 2003/01/01 19:16:32 tsi Exp $ */ /* - * Copyright 1999 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 1999 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atimach64.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/atimach64.c index 5d5335321..9de90a15e 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atimach64.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atimach64.c @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atimach64.c,v 1.48 2002/04/06 19:06:04 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atimach64.c,v 1.51 2003/02/24 20:46:54 tsi Exp $ */ /* - * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that @@ -116,6 +116,13 @@ ATIMach64PreInit pATIHW->crtc_off_pitch = SetBits(pATI->displayWidth >> 3, CRTC_PITCH); } + if ((pATI->LockData.crtc_gen_cntl & CRTC_CSYNC_EN) && !pATI->OptionCSync) + { + xf86DrvMsg(pScreenInfo->scrnIndex, X_NOTICE, + "Using composite sync to match input timing.\n"); + pATI->OptionCSync = TRUE; + } + pATIHW->bus_cntl = bus_cntl = inr(BUS_CNTL); if (pATI->Chip < ATI_CHIP_264VT4) pATIHW->bus_cntl = (pATIHW->bus_cntl & ~BUS_HOST_ERR_INT_EN) | @@ -386,7 +393,7 @@ ATIMach64Save pATIHW->config_cntl = inr(CONFIG_CNTL); - pATIHW->gen_test_cntl = inr(GEN_TEST_CNTL); + pATIHW->gen_test_cntl = inr(GEN_TEST_CNTL) & ~GEN_CUR_EN; if (pATI->Chip >= ATI_CHIP_264VTB) { diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atimach64.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atimach64.h index 6849d559f..e6e1eaa77 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atimach64.h +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atimach64.h @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atimach64.h,v 1.15 2002/01/16 16:22:27 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atimach64.h,v 1.16 2003/01/01 19:16:32 tsi Exp $ */ /* - * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atimach64io.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/atimach64io.c index 4e03c3a5e..3197f3ca4 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atimach64io.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atimach64io.c @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atimach64io.c,v 1.4 2002/01/16 16:22:27 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atimach64io.c,v 1.5 2003/01/01 19:16:32 tsi Exp $ */ /* - * Copyright 2000 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 2000 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atimach64io.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atimach64io.h index 2dd3d87d6..d9661ca71 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atimach64io.h +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atimach64io.h @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atimach64io.h,v 1.13 2002/01/16 16:22:27 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atimach64io.h,v 1.14 2003/01/01 19:16:32 tsi Exp $ */ /* - * Copyright 2000 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 2000 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atimisc.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/atimisc.c index 85404d781..e847b60e6 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atimisc.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atimisc.c @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atimisc.c,v 1.5 2002/04/06 19:06:05 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atimisc.c,v 1.6 2003/01/01 19:16:32 tsi Exp $ */ /* - * Copyright 2000 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 2000 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atimode.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/atimode.c index b3f522fda..d470ae492 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atimode.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atimode.c @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atimode.c,v 1.13 2002/04/06 19:06:05 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atimode.c,v 1.16 2003/01/01 19:16:32 tsi Exp $ */ /* - * Copyright 2000 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 2000 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that @@ -699,6 +699,9 @@ ATIModeCalculate if (pMode->Flags & V_INTERLACE) VDisplay >>= 1; + /* Ensure secondary CRTC is completely disabled */ + pATIHW->crtc_gen_cntl &= ~(CRTC2_EN | CRTC2_PIX_WIDTH); + if (pATI->Chip == ATI_CHIP_264LT) pATIHW->horz_stretching = inr(HORZ_STRETCHING); else /* if ((pATI->Chip == ATI_CHIP_264LTPRO) || @@ -709,7 +712,7 @@ ATIModeCalculate pATIHW->horz_stretching = ATIGetMach64LCDReg(LCD_HORZ_STRETCHING); pATIHW->ext_vert_stretch = ATIGetMach64LCDReg(LCD_EXT_VERT_STRETCH) & - ~(AUTO_VERT_RATIO | VERT_STRETCH_MODE); + ~(AUTO_VERT_RATIO | VERT_STRETCH_MODE | VERT_STRETCH_RATIO3); /* * Don't use vertical blending if the mode is too wide or not diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atimode.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atimode.h index 0da7ed0f4..63cb7650e 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atimode.h +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atimode.h @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atimode.h,v 1.4 2002/01/16 16:22:27 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atimode.h,v 1.5 2003/01/01 19:16:32 tsi Exp $ */ /* - * Copyright 2000 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 2000 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atimodule.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/atimodule.c index f32113dd1..842d659ce 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atimodule.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atimodule.c @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atimodule.c,v 1.14 2002/04/06 19:06:05 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atimodule.c,v 1.15 2003/01/01 19:16:32 tsi Exp $ */ /* - * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atimodule.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atimodule.h index 21310bb48..833e421bf 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atimodule.h +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atimodule.h @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atimodule.h,v 1.8 2002/01/16 16:22:27 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atimodule.h,v 1.9 2003/01/01 19:16:32 tsi Exp $ */ /* - * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atimono.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atimono.h index c9f57a729..6325cbe41 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atimono.h +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atimono.h @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atimono.h,v 1.6 2002/01/16 16:22:27 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atimono.h,v 1.7 2003/01/01 19:16:33 tsi Exp $ */ /* - * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atioption.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/atioption.c index dbecec231..7a731ce5f 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atioption.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atioption.c @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atioption.c,v 1.20 2002/02/14 22:08:03 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atioption.c,v 1.21 2003/01/01 19:16:33 tsi Exp $ */ /* - * Copyright 1999 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 1999 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atioption.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atioption.h index f8f386b20..73231543a 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atioption.h +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atioption.h @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atioption.h,v 1.10 2002/02/14 22:08:03 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atioption.h,v 1.11 2003/01/01 19:16:33 tsi Exp $ */ /* - * Copyright 1999 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 1999 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atipreinit.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/atipreinit.c index fae47b43d..675b036d3 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atipreinit.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atipreinit.c @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atipreinit.c,v 1.62 2002/08/27 22:07:06 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atipreinit.c,v 1.65 2003/01/01 19:16:33 tsi Exp $ */ /* - * Copyright 1999 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 1999 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that @@ -1634,11 +1634,6 @@ ATIPreInit pATI->LCDVBlankWidth = ((pATIHW->crt[22] - pATIHW->crt[21]) & 0xFFU) + 1; - HDisplay = pATIHW->crt[0] + 5 - pATI->LCDHBlankWidth; - VDisplay = (((pATIHW->crt[7] << 4) & 0x0200U) | - ((pATIHW->crt[7] << 8) & 0x0100U) | - pATIHW->crt[6]) + 3 - pATI->LCDVBlankWidth; - pATI->LCDHSyncStart = ((pATIHW->crt[4] - pATIHW->crt[2]) & 0xFFU) + 1; pATI->LCDVSyncStart = (((((pATIHW->crt[7] << 2) & 0x0200U) | @@ -1647,6 +1642,20 @@ ATIPreInit (((pATIHW->crt[9] << 4) & 0x0200U) | ((pATIHW->crt[7] << 5) & 0x0100U) | pATIHW->crt[21])) & 0xFFU) + 1; + + HDisplay = pATI->LCDHSyncStart + pATI->LCDHSyncWidth - + pATI->LCDHBlankWidth; + if (HDisplay > 0) + pATI->LCDHBlankWidth += (HDisplay + 0x3FU) & ~0x3FU; + VDisplay = pATI->LCDVSyncStart + pATI->LCDVSyncWidth - + pATI->LCDVBlankWidth; + if (VDisplay > 0) + pATI->LCDVBlankWidth += (VDisplay + 0xFFU) & ~0xFFU; + + HDisplay = pATIHW->crt[0] + 5 - pATI->LCDHBlankWidth; + VDisplay = (((pATIHW->crt[7] << 4) & 0x0200U) | + ((pATIHW->crt[7] << 8) & 0x0100U) | + pATIHW->crt[6]) + 3 - pATI->LCDVBlankWidth; } else @@ -1848,7 +1857,8 @@ ATIPreInit if (!(pATIHW->horz_stretching & HORZ_STRETCH_EN) && ((HDisplay = pATI->LCDHorizontal - HDisplay) > 0)) { - if ((pATI->LCDHSyncStart -= HDisplay) < 0) + pATI->LCDHSyncStart -= HDisplay; + if (pATI->LCDHSyncStart < 0) pATI->LCDHSyncStart = 0; pATI->LCDHBlankWidth -= HDisplay; HDisplay = pATI->LCDHSyncStart + pATI->LCDHSyncWidth; @@ -1859,7 +1869,8 @@ ATIPreInit if (!(pATIHW->vert_stretching & VERT_STRETCH_EN) && ((VDisplay = pATI->LCDVertical - VDisplay) > 0)) { - if ((pATI->LCDVSyncStart -= VDisplay) < 0) + pATI->LCDVSyncStart -= VDisplay; + if (pATI->LCDVSyncStart < 0) pATI->LCDVSyncStart = 0; pATI->LCDVBlankWidth -= VDisplay; VDisplay = pATI->LCDVSyncStart + pATI->LCDVSyncWidth; @@ -2939,6 +2950,68 @@ ATIPreInit } pScreenInfo->monitor->Last = pMode; + + /* + * Defeat Xconfigurator brain damage. Ignore all HorizSync and + * VertRefresh specifications. For now, this does not take + * SYNC_TOLERANCE into account. + */ + if (pScreenInfo->monitor->nHsync > 0) + { + double hsync = (double)pMode->Clock / + (pATI->LCDHorizontal + pATI->LCDHBlankWidth); + + for (i = 0; ; i++) + { + if (i >= pScreenInfo->monitor->nHsync) + { + xf86DrvMsg(pScreenInfo->scrnIndex, X_NOTICE, + "Conflicting XF86Config HorizSync specification(s)" + " ignored.\n"); + break; + } + + if ((hsync >= pScreenInfo->monitor->hsync[i].lo) && + (hsync <= pScreenInfo->monitor->hsync[i].hi)) + { + xf86DrvMsg(pScreenInfo->scrnIndex, X_WARNING, + "Extraneous XF86Config HorizSync specification(s)" + " ignored.\n"); + break; + } + } + + pScreenInfo->monitor->nHsync = 0; + } + + if (pScreenInfo->monitor->nVrefresh > 0) + { + double vrefresh = ((double)pMode->Clock * 1000.0) / + ((pATI->LCDHorizontal + pATI->LCDHBlankWidth) * + (pATI->LCDVertical + pATI->LCDVBlankWidth)); + + for (i = 0; ; i++) + { + if (i >= pScreenInfo->monitor->nVrefresh) + { + xf86DrvMsg(pScreenInfo->scrnIndex, X_NOTICE, + "Conflicting XF86Config VertRefresh specification(s)" + " ignored.\n"); + break; + } + + if ((vrefresh >= pScreenInfo->monitor->vrefresh[i].lo) && + (vrefresh <= pScreenInfo->monitor->vrefresh[i].hi)) + { + xf86DrvMsg(pScreenInfo->scrnIndex, X_WARNING, + "Extraneous XF86Config VertRefresh specification(s)" + " ignored.\n"); + break; + } + } + + pScreenInfo->monitor->nVrefresh = 0; + } } i = xf86ValidateModes(pScreenInfo, diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atipreinit.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atipreinit.h index 4c86e9f43..5404c2c29 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atipreinit.h +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atipreinit.h @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atipreinit.h,v 1.5 2002/01/16 16:22:27 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atipreinit.h,v 1.6 2003/01/01 19:16:33 tsi Exp $ */ /* - * Copyright 1999 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 1999 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiprint.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiprint.c index 25a2fae08..96444040e 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiprint.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiprint.c @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiprint.c,v 1.24 2002/04/06 19:06:05 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiprint.c,v 1.25 2003/01/01 19:16:33 tsi Exp $ */ /* - * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiprint.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiprint.h index 73b89b404..d44cbdf84 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiprint.h +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiprint.h @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiprint.h,v 1.9 2002/01/16 16:22:27 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiprint.h,v 1.10 2003/01/01 19:16:33 tsi Exp $ */ /* - * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atipriv.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atipriv.h index e62c470bf..69341ba67 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atipriv.h +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atipriv.h @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atipriv.h,v 1.4 2002/01/16 16:22:27 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atipriv.h,v 1.5 2003/01/01 19:16:33 tsi Exp $ */ /* - * Copyright 1999 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 1999 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiprobe.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiprobe.c index e60db350d..05d2f340a 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiprobe.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiprobe.c @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiprobe.c,v 1.53 2002/10/12 01:38:07 martin Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiprobe.c,v 1.54 2003/01/01 19:16:33 tsi Exp $ */ /* - * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiprobe.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiprobe.h index ac2a7222e..6f3d8554f 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiprobe.h +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiprobe.h @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiprobe.h,v 1.7 2002/01/16 16:22:28 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiprobe.h,v 1.8 2003/01/01 19:16:33 tsi Exp $ */ /* - * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiproto.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiproto.h index 1fedd54e6..708b8f4cc 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiproto.h +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiproto.h @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiproto.h,v 1.6 2002/01/16 16:22:28 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiproto.h,v 1.7 2003/01/01 19:16:34 tsi Exp $ */ /* - * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiregs.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiregs.h index 81482fc74..2e8af8317 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiregs.h +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiregs.h @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiregs.h,v 1.21 2002/05/16 19:35:42 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiregs.h,v 1.23 2003/01/10 17:43:40 tsi Exp $ */ /* - * Copyright 1994 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 1994 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that @@ -863,7 +863,7 @@ #define DBL_BUFFER_EN 0x00000400ul /* GTPro */ #define MEM_WE_FIX_DIS 0x00000800ul #define MEM_OE_PULLBACK_B 0x00000800ul /* GT2c/VT4 */ -#define CMDFIFO_SIZE_DIS_P 0x00000800ul /* GTPro */ +#define CMDFIFO_SIZE_EN 0x00000800ul /* GTPro */ #define RD_EN_FIX_DIS 0x00001000ul #define MEM_WE_FIX_DIS_B 0x00001000ul #define AUTO_FF_DIS 0x00001000ul /* GTPro */ diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atirgb514.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/atirgb514.c index 9d8d9401f..bedb7940c 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atirgb514.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atirgb514.c @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atirgb514.c,v 1.3 2002/01/16 16:22:28 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atirgb514.c,v 1.4 2003/01/01 19:16:34 tsi Exp $ */ /* - * Copyright 2001 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 2001 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atirgb514.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atirgb514.h index a422168e7..71f44d2d7 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atirgb514.h +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atirgb514.h @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atirgb514.h,v 1.2 2002/01/16 16:22:28 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atirgb514.h,v 1.3 2003/01/01 19:16:34 tsi Exp $ */ /* - * Copyright 2001 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 2001 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiscreen.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiscreen.c index c4dbb5e0a..ea3cfb77f 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiscreen.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiscreen.c @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiscreen.c,v 1.28 2002/01/16 16:22:28 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiscreen.c,v 1.29 2003/01/01 19:16:34 tsi Exp $ */ /* - * Copyright 1999 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 1999 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiscreen.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiscreen.h index 00087432a..7397042b1 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiscreen.h +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiscreen.h @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiscreen.h,v 1.5 2002/01/16 16:22:28 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiscreen.h,v 1.6 2003/01/01 19:16:34 tsi Exp $ */ /* - * Copyright 1999 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 1999 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atistruct.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atistruct.h index ad6a51ae7..bd90d54a4 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atistruct.h +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atistruct.h @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atistruct.h,v 1.35 2002/10/15 20:26:05 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atistruct.h,v 1.37 2003/01/10 20:57:58 tsi Exp $ */ /* - * Copyright 1999 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 1999 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that @@ -365,9 +365,9 @@ typedef struct _ATIRec struct { /* Mach64 registers */ - CARD32 crtc_int_cntl, crtc_gen_cntl, i2c_cntl_0, scratch_reg3, - bus_cntl, lcd_index, mem_cntl, i2c_cntl_1, dac_cntl, - gen_test_cntl, mpp_config, mpp_strobe_seq, tvo_cntl; + CARD32 crtc_int_cntl, crtc_gen_cntl, i2c_cntl_0, hw_debug, + scratch_reg3, bus_cntl, lcd_index, mem_cntl, i2c_cntl_1, + dac_cntl, gen_test_cntl, mpp_config, mpp_strobe_seq, tvo_cntl; #ifndef AVOID_CPIO diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiutil.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiutil.c index 055fec21b..e7bb41227 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiutil.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiutil.c @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiutil.c,v 1.7 2002/01/16 16:22:28 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiutil.c,v 1.8 2003/01/01 19:16:34 tsi Exp $ */ /* - * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiutil.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiutil.h index 5f7cd0c74..f43295d90 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiutil.h +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiutil.h @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiutil.h,v 1.7 2002/01/16 16:22:28 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiutil.h,v 1.8 2003/01/01 19:16:34 tsi Exp $ */ /* - * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/ativalid.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/ativalid.c index a7a1a4db4..adc873428 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/ativalid.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/ativalid.c @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/ativalid.c,v 1.14 2002/02/14 22:08:03 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/ativalid.c,v 1.15 2003/01/01 19:16:34 tsi Exp $ */ /* - * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/ativalid.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/ativalid.h index fe7e142b7..055ed509b 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/ativalid.h +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/ativalid.h @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/ativalid.h,v 1.7 2002/01/16 16:22:28 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/ativalid.h,v 1.8 2003/01/01 19:16:34 tsi Exp $ */ /* - * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/ativersion.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/ativersion.h index 82999fd3e..082cbb142 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/ativersion.h +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/ativersion.h @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/ativersion.h,v 1.53 2002/10/15 20:26:05 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/ativersion.h,v 1.58 2003/01/10 20:57:58 tsi Exp $ */ /* - * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that @@ -24,14 +24,26 @@ #ifndef ___ATIVERSION_H___ #define ___ATIVERSION_H___ 1 +#undef ATI_NAME +#undef ATI_DRIVER_NAME +#undef ATI_VERSION_MAJOR +#undef ATI_VERSION_MINOR +#undef ATI_VERSION_PATCH +#undef ATI_VERSION_CURRENT +#undef ATI_VERSION_EVALUATE +#undef ATI_VERSION_STRINGIFY +#undef ATI_VERSION_NAME + #define ATI_NAME "ATI" #define ATI_DRIVER_NAME "ati" #define ATI_VERSION_MAJOR 6 #define ATI_VERSION_MINOR 4 -#define ATI_VERSION_PATCH 14 +#define ATI_VERSION_PATCH 18 +#ifndef ATI_VERSION_EXTRA #define ATI_VERSION_EXTRA "" +#endif #define ATI_VERSION_CURRENT \ ((ATI_VERSION_MAJOR << 20) | (ATI_VERSION_MINOR << 10) | ATI_VERSION_PATCH) diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/ativga.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/ativga.c index 52ab3648e..9a732a37e 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/ativga.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/ativga.c @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/ativga.c,v 1.17 2002/02/26 05:10:56 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/ativga.c,v 1.19 2003/01/01 19:16:34 tsi Exp $ */ /* - * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that @@ -202,10 +202,24 @@ ATIVGACalculate Index = pMode->CrtcHBlankEnd - pMode->CrtcHBlankStart - 0x3F; if (Index > 0) { - pMode->CrtcHBlankStart += Index / 2; - if (pMode->CrtcHBlankStart >= pMode->CrtcHSyncStart) - pMode->CrtcHBlankStart = pMode->CrtcHSyncStart - 1; - pMode->CrtcHBlankEnd = pMode->CrtcHBlankStart + 0x3F; + if ((pMode->CrtcHBlankEnd - Index) > pMode->CrtcHSyncEnd) + { + pMode->CrtcHBlankStart += Index / 2; + if (pMode->CrtcHBlankStart >= pMode->CrtcHSyncStart) + pMode->CrtcHBlankStart = pMode->CrtcHSyncStart - 1; + pMode->CrtcHBlankEnd = pMode->CrtcHBlankStart + 0x3F; + } + else + { + Index -= 0x40; + if (Index > 0) + { + pMode->CrtcHBlankStart += Index / 2; + if (pMode->CrtcHBlankStart >= pMode->CrtcHSyncStart) + pMode->CrtcHBlankStart = pMode->CrtcHSyncStart - 1; + pMode->CrtcHBlankEnd = pMode->CrtcHBlankStart + 0x7F; + } + } } } @@ -326,13 +340,27 @@ ATIVGACalculate } /* Check blank pulse width */ - Index = pMode->CrtcVBlankEnd - pMode->CrtcVBlankStart - 0x0FF; + Index = pMode->CrtcVBlankEnd - pMode->CrtcVBlankStart - 0x00FF; if (Index > 0) { - pMode->CrtcVBlankStart += Index / 2; - if (pMode->CrtcVBlankStart >= pMode->CrtcVSyncStart) - pMode->CrtcVBlankStart = pMode->CrtcVSyncStart - 1; - pMode->CrtcVBlankEnd = pMode->CrtcVBlankStart + 0x0FF; + if ((pMode->CrtcVBlankEnd - Index) > pMode->CrtcVSyncEnd) + { + pMode->CrtcVBlankStart += Index / 2; + if (pMode->CrtcVBlankStart >= pMode->CrtcVSyncStart) + pMode->CrtcVBlankStart = pMode->CrtcVSyncStart - 1; + pMode->CrtcVBlankEnd = pMode->CrtcVBlankStart + 0x00FF; + } + else + { + Index -= 0x0100; + if (Index > 0) + { + pMode->CrtcVBlankStart += Index / 2; + if (pMode->CrtcVBlankStart >= pMode->CrtcVSyncStart) + pMode->CrtcVBlankStart = pMode->CrtcVSyncStart - 1; + pMode->CrtcVBlankEnd = pMode->CrtcVBlankStart + 0x01FF; + } + } } /* Set up sequencer register values */ diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/ativga.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/ativga.h index 643342fd5..ff65b3540 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/ativga.h +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/ativga.h @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/ativga.h,v 1.9 2002/01/16 16:22:28 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/ativga.h,v 1.10 2003/01/01 19:16:34 tsi Exp $ */ /* - * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/ativgaio.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/ativgaio.c index 2ffbe41df..def54e24b 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/ativgaio.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/ativgaio.c @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/ativgaio.c,v 1.3 2002/01/16 16:22:28 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/ativgaio.c,v 1.4 2003/01/01 19:16:34 tsi Exp $ */ /* - * Copyright 2000 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 2000 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/ativgaio.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/ativgaio.h index b7321c5ef..e08ecff8b 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/ativgaio.h +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/ativgaio.h @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/ativgaio.h,v 1.4 2002/01/16 16:22:28 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/ativgaio.h,v 1.5 2003/01/01 19:16:34 tsi Exp $ */ /* - * Copyright 2000 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 2000 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atividmem.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/atividmem.c index 43fab9def..32ea23fc0 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atividmem.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atividmem.c @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atividmem.c,v 1.13 2002/01/16 16:22:28 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atividmem.c,v 1.14 2003/01/01 19:16:34 tsi Exp $ */ /* - * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atividmem.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atividmem.h index 0eaf858ca..7e4c26cdd 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atividmem.h +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atividmem.h @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atividmem.h,v 1.8 2002/01/16 16:22:28 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atividmem.h,v 1.9 2003/01/01 19:16:35 tsi Exp $ */ /* - * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiwonder.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiwonder.c index bce969667..404aeaf02 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiwonder.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiwonder.c @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiwonder.c,v 1.13 2002/01/16 16:22:28 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiwonder.c,v 1.14 2003/01/01 19:16:35 tsi Exp $ */ /* - * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiwonder.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiwonder.h index 9790ae604..34f19cfeb 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiwonder.h +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiwonder.h @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiwonder.h,v 1.8 2002/01/16 16:22:28 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiwonder.h,v 1.9 2003/01/01 19:16:35 tsi Exp $ */ /* - * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiwonderio.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiwonderio.c index 09759402b..064e49edf 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiwonderio.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiwonderio.c @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiwonderio.c,v 1.3 2002/01/16 16:22:28 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiwonderio.c,v 1.4 2003/01/01 19:16:35 tsi Exp $ */ /* - * Copyright 2000 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 2000 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiwonderio.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiwonderio.h index 544f68a6f..dd0fa5858 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiwonderio.h +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiwonderio.h @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiwonderio.h,v 1.3 2002/01/16 16:22:28 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiwonderio.h,v 1.4 2003/01/01 19:16:35 tsi Exp $ */ /* - * Copyright 2000 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 2000 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atixv.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/atixv.c index 627c10321..b15aa53f9 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atixv.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atixv.c @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atixv.c,v 1.2 2002/01/16 16:22:28 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atixv.c,v 1.3 2003/01/01 19:16:35 tsi Exp $ */ /* - * Copyright 2001 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 2001 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atixv.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atixv.h index bc4a1e312..a5a3de604 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atixv.h +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atixv.h @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atixv.h,v 1.2 2002/01/16 16:22:28 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atixv.h,v 1.3 2003/01/01 19:16:35 tsi Exp $ */ /* - * Copyright 2001 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 2001 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128.h index 7b3e6702f..d856fd8c1 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128.h +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128.h @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128.h,v 1.20 2002/06/04 23:04:50 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128.h,v 1.24 2002/12/16 16:19:10 dawes Exp $ */ /* * Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario, * Precision Insight, Inc., Cedar Park, Texas, and @@ -61,9 +61,10 @@ #include "GL/glxint.h" #endif -#define R128_DEBUG 0 /* Turn off debugging output */ +#define R128_DEBUG 0 /* Turn off debugging output */ +#define R128_IDLE_RETRY 32 /* Fall out of idle loops after this count */ #define R128_TIMEOUT 2000000 /* Fall out of wait loops after this count */ -#define R128_MMIOSIZE 0x80000 +#define R128_MMIOSIZE 0x4000 #define R128_VBIOS_SIZE 0x00010000 @@ -379,6 +380,9 @@ typedef struct { CARD32 aux_sc_cntl; + int irq; + CARD32 gen_int_cntl; + Bool DMAForXv; #endif @@ -425,7 +429,7 @@ extern Bool R128DRIFinishScreenInit(ScreenPtr pScreen); #define R128CCE_START(pScrn, info) \ do { \ - int _ret = drmR128StartCCE(info->drmFD); \ + int _ret = drmCommandNone(info->drmFD, DRM_R128_CCE_START); \ if (_ret) { \ xf86DrvMsg(pScrn->scrnIndex, X_ERROR, \ "%s: CCE start %d\n", __FUNCTION__, _ret); \ @@ -434,7 +438,7 @@ do { \ #define R128CCE_STOP(pScrn, info) \ do { \ - int _ret = drmR128StopCCE(info->drmFD); \ + int _ret = R128CCEStop(pScrn); \ if (_ret) { \ xf86DrvMsg(pScrn->scrnIndex, X_ERROR, \ "%s: CCE stop %d\n", __FUNCTION__, _ret); \ @@ -445,7 +449,7 @@ do { \ do { \ if (info->directRenderingEnabled \ && R128CCE_USE_RING_BUFFER(info->CCEMode)) { \ - int _ret = drmR128ResetCCE(info->drmFD); \ + int _ret = drmCommandNone(info->drmFD, DRM_R128_CCE_RESET); \ if (_ret) { \ xf86DrvMsg(pScrn->scrnIndex, X_ERROR, \ "%s: CCE reset %d\n", __FUNCTION__, _ret); \ @@ -453,14 +457,13 @@ do { \ } \ } while (0) -#endif - -#ifdef XF86DRI extern drmBufPtr R128CCEGetBuffer(ScrnInfoPtr pScrn); #endif + extern void R128CCEFlushIndirect(ScrnInfoPtr pScrn, int discard); extern void R128CCEReleaseIndirect(ScrnInfoPtr pScrn); extern void R128CCEWaitForIdle(ScrnInfoPtr pScrn); +extern int R128CCEStop(ScrnInfoPtr pScrn); #define CCE_PACKET0( reg, n ) \ diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_accel.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_accel.c index 898162c99..9329ad251 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_accel.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_accel.c @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_accel.c,v 1.14 2002/02/14 23:10:11 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_accel.c,v 1.16 2002/11/15 03:01:35 dawes Exp $ */ /* * Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario, * Precision Insight, Inc., Cedar Park, Texas, and @@ -32,7 +32,7 @@ * Authors: * Rickard E. Faith <faith@valinux.com> * Kevin E. Martin <martin@valinux.com> - * Alan Hourihane <ahourihane@valinux.com> + * Alan Hourihane <alanh@fairlite.demon.co.uk> * * Credits: * @@ -229,13 +229,16 @@ void R128WaitForIdle(ScrnInfoPtr pScrn) void R128CCEWaitForIdle(ScrnInfoPtr pScrn) { R128InfoPtr info = R128PTR(pScrn); - int ret; + int ret, i; FLUSH_RING(); for (;;) { - /* The ioctl already has a timeout */ - ret = drmR128WaitForIdleCCE(info->drmFD); + i = 0; + do { + ret = drmCommandNone(info->drmFD, DRM_R128_CCE_IDLE); + } while ( ret && errno == EBUSY && i++ < R128_IDLE_RETRY ); + if (ret && ret != -EBUSY) { xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "%s: CCE idle %d\n", __FUNCTION__, ret); @@ -252,6 +255,49 @@ void R128CCEWaitForIdle(ScrnInfoPtr pScrn) R128CCE_START(pScrn, info); } } + +int R128CCEStop(ScrnInfoPtr pScrn) +{ + R128InfoPtr info = R128PTR(pScrn); + drmR128CCEStop stop; + int ret, i; + + stop.flush = 1; + stop.idle = 1; + + ret = drmCommandWrite( info->drmFD, DRM_R128_CCE_STOP, + &stop, sizeof(drmR128CCEStop) ); + + if ( ret == 0 ) { + return 0; + } else if ( errno != EBUSY ) { + return -errno; + } + + stop.flush = 0; + + i = 0; + do { + ret = drmCommandWrite( info->drmFD, DRM_R128_CCE_STOP, + &stop, sizeof(drmR128CCEStop) ); + } while ( ret && errno == EBUSY && i++ < R128_IDLE_RETRY ); + + if ( ret == 0 ) { + return 0; + } else if ( errno != EBUSY ) { + return -errno; + } + + stop.idle = 0; + + if ( drmCommandWrite( info->drmFD, DRM_R128_CCE_STOP, + &stop, sizeof(drmR128CCEStop) )) { + return -errno; + } else { + return 0; + } +} + #endif /* Setup for XAA SolidFill. */ @@ -1001,10 +1047,19 @@ void R128EngineInit(ScrnInfoPtr pScrn) OUTREG(R128_DP_WRITE_MASK, 0xffffffff); R128WaitForFifo(pScrn, 1); + #if X_BYTE_ORDER == X_BIG_ENDIAN - OUTREGP(R128_DP_DATATYPE, - R128_HOST_BIG_ENDIAN_EN, ~R128_HOST_BIG_ENDIAN_EN); -#else + /* FIXME: this is a kludge for texture uploads in the 3D driver. Look at + * how the radeon driver handles HOST_DATA_SWAP if you want to implement + * CCE ImageWrite acceleration or anything needing this bit */ +#ifdef XF86DRI + if (info->directRenderingEnabled) + OUTREGP(R128_DP_DATATYPE, 0, ~R128_HOST_BIG_ENDIAN_EN); + else +#endif + OUTREGP(R128_DP_DATATYPE, + R128_HOST_BIG_ENDIAN_EN, ~R128_HOST_BIG_ENDIAN_EN); +#else /* X_LITTLE_ENDIAN */ OUTREGP(R128_DP_DATATYPE, 0, ~R128_HOST_BIG_ENDIAN_EN); #endif @@ -1502,11 +1557,11 @@ drmBufPtr R128CCEGetBuffer( ScrnInfoPtr pScrn ) while ( 1 ) { do { ret = drmDMA( info->drmFD, &dma ); - if ( ret && ret != -EBUSY ) { + if ( ret && ret != -EAGAIN ) { xf86DrvMsg( pScrn->scrnIndex, X_ERROR, "%s: CCE GetBuffer %d\n", __FUNCTION__, ret ); } - } while ( ( ret == -EBUSY ) && ( i++ < R128_TIMEOUT ) ); + } while ( ( ret == -EAGAIN ) && ( i++ < R128_TIMEOUT ) ); if ( ret == 0 ) { buf = &info->buffers->list[indx]; @@ -1536,6 +1591,7 @@ void R128CCEFlushIndirect( ScrnInfoPtr pScrn, int discard ) R128InfoPtr info = R128PTR(pScrn); drmBufPtr buffer = info->indirectBuffer; int start = info->indirectStart; + drmR128Indirect indirect; if ( !buffer ) return; @@ -1543,8 +1599,13 @@ void R128CCEFlushIndirect( ScrnInfoPtr pScrn, int discard ) if ( (start == buffer->used) && !discard ) return; - drmR128FlushIndirectBuffer( info->drmFD, buffer->idx, - start, buffer->used, discard ); + indirect.idx = buffer->idx; + indirect.start = start; + indirect.end = buffer->used; + indirect.discard = discard; + + drmCommandWriteRead( info->drmFD, DRM_R128_INDIRECT, + &indirect, sizeof(drmR128Indirect)); if ( discard ) buffer = info->indirectBuffer = R128CCEGetBuffer( pScrn ); @@ -1563,6 +1624,7 @@ void R128CCEReleaseIndirect( ScrnInfoPtr pScrn ) R128InfoPtr info = R128PTR(pScrn); drmBufPtr buffer = info->indirectBuffer; int start = info->indirectStart; + drmR128Indirect indirect; info->indirectBuffer = NULL; info->indirectStart = 0; @@ -1570,8 +1632,13 @@ void R128CCEReleaseIndirect( ScrnInfoPtr pScrn ) if ( !buffer ) return; - drmR128FlushIndirectBuffer( info->drmFD, buffer->idx, - start, buffer->used, 1 ); + indirect.idx = buffer->idx; + indirect.start = start; + indirect.end = buffer->used; + indirect.discard = 1; + + drmCommandWriteRead( info->drmFD, DRM_R128_INDIRECT, + &indirect, sizeof(drmR128Indirect)); } static void R128CCEAccelInit(ScrnInfoPtr pScrn, XAAInfoRecPtr a) diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_cursor.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_cursor.c index 4b52c8d25..5a2ac4f09 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_cursor.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_cursor.c @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_cursor.c,v 1.5 2001/03/03 22:26:09 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_cursor.c,v 1.6 2003/02/13 20:28:40 tsi Exp $ */ /* * Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario, * Precision Insight, Inc., Cedar Park, Texas, and @@ -216,7 +216,8 @@ Bool R128CursorInit(ScreenPtr pScreen) cursor->MaxWidth = 64; cursor->MaxHeight = 64; cursor->Flags = (HARDWARE_CURSOR_TRUECOLOR_AT_8BPP - + | HARDWARE_CURSOR_SHOW_TRANSPARENT + | HARDWARE_CURSOR_UPDATE_UNHIDDEN #if X_BYTE_ORDER == X_LITTLE_ENDIAN | HARDWARE_CURSOR_BIT_ORDER_MSBFIRST #endif diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dga.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dga.c index 18c06d5bf..6c0013afb 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dga.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dga.c @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dga.c,v 1.8 2002/05/29 22:48:38 alanh Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dga.c,v 1.9 2002/10/30 12:52:12 alanh Exp $ */ /* * Authors: * Ove Kåven <ovek@transgaming.com>, @@ -16,7 +16,7 @@ #include "dgaproc.h" #ifdef XF86DRI -#include "xf86drmR128.h" +#include "r128_common.h" #endif static Bool R128_OpenFramebuffer(ScrnInfoPtr, char **, unsigned char **, @@ -207,7 +207,7 @@ R128DGAInit(ScreenPtr pScreen) info->DGAFuncs.BlitTransRect = NULL; if (info->accel) { - info->DGAFuncs.Sync = R128WaitForIdle; + info->DGAFuncs.Sync = info->accel->Sync; if (info->accel->SetupForSolidFill && info->accel->SubsequentSolidFillRect) info->DGAFuncs.FillRect = R128_FillRect; diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dri.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dri.c index fce12713b..63cedb59f 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dri.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dri.c @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dri.c,v 1.24 2002/10/08 22:14:04 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dri.c,v 1.28 2003/02/07 20:41:14 martin Exp $ */ /* * Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario, * Precision Insight, Inc., Cedar Park, Texas, and @@ -76,7 +76,7 @@ static Bool R128InitVisualConfigs(ScreenPtr pScreen) __GLXvisualConfig *pConfigs = 0; R128ConfigPrivPtr pR128Configs = 0; R128ConfigPrivPtr *pR128ConfigPtrs = 0; - int i, accum, stencil; + int i, accum, stencil, db; switch (info->CurrentLayout.pixel_code) { case 8: /* 8bpp mode is not support */ @@ -89,11 +89,13 @@ static Bool R128InitVisualConfigs(ScreenPtr pScreen) #define R128_USE_ACCUM 1 #define R128_USE_STENCIL 1 +#define R128_USE_DB 1 case 16: numConfigs = 1; if (R128_USE_ACCUM) numConfigs *= 2; if (R128_USE_STENCIL) numConfigs *= 2; + if (R128_USE_DB) numConfigs *= 2; if (!(pConfigs = (__GLXvisualConfig*)xcalloc(sizeof(__GLXvisualConfig), @@ -115,7 +117,8 @@ static Bool R128InitVisualConfigs(ScreenPtr pScreen) } i = 0; - for (accum = 0; accum <= R128_USE_ACCUM; accum++) { + for (db = 0; db <= R128_USE_DB; db++) { + for (accum = 0; accum <= R128_USE_ACCUM; accum++) { for (stencil = 0; stencil <= R128_USE_STENCIL; stencil++) { pR128ConfigPtrs[i] = &pR128Configs[i]; @@ -141,7 +144,10 @@ static Bool R128InitVisualConfigs(ScreenPtr pScreen) pConfigs[i].accumBlueSize = 0; pConfigs[i].accumAlphaSize = 0; } - pConfigs[i].doubleBuffer = TRUE; + if (db) + pConfigs[i].doubleBuffer = TRUE; + else + pConfigs[i].doubleBuffer = FALSE; pConfigs[i].stereo = FALSE; pConfigs[i].bufferSize = 16; pConfigs[i].depthSize = 16; @@ -164,6 +170,7 @@ static Bool R128InitVisualConfigs(ScreenPtr pScreen) pConfigs[i].transparentIndex = 0; i++; } + } } break; @@ -171,6 +178,7 @@ static Bool R128InitVisualConfigs(ScreenPtr pScreen) numConfigs = 1; if (R128_USE_ACCUM) numConfigs *= 2; if (R128_USE_STENCIL) numConfigs *= 2; + if (R128_USE_DB) numConfigs *= 2; if (!(pConfigs = (__GLXvisualConfig*)xcalloc(sizeof(__GLXvisualConfig), @@ -192,7 +200,8 @@ static Bool R128InitVisualConfigs(ScreenPtr pScreen) } i = 0; - for (accum = 0; accum <= R128_USE_ACCUM; accum++) { + for (db = 0; db <= R128_USE_DB; db++) { + for (accum = 0; accum <= R128_USE_ACCUM; accum++) { for (stencil = 0; stencil <= R128_USE_STENCIL; stencil++) { pR128ConfigPtrs[i] = &pR128Configs[i]; @@ -218,7 +227,10 @@ static Bool R128InitVisualConfigs(ScreenPtr pScreen) pConfigs[i].accumBlueSize = 0; pConfigs[i].accumAlphaSize = 0; } - pConfigs[i].doubleBuffer = TRUE; + if (db) + pConfigs[i].doubleBuffer = TRUE; + else + pConfigs[i].doubleBuffer = FALSE; pConfigs[i].stereo = FALSE; pConfigs[i].bufferSize = 24; if (stencil) { @@ -243,6 +255,7 @@ static Bool R128InitVisualConfigs(ScreenPtr pScreen) pConfigs[i].transparentIndex = 0; i++; } + } } break; } @@ -420,6 +433,7 @@ static Bool R128DRIAgpInit(R128InfoPtr info, ScreenPtr pScreen) unsigned long cntl, chunk; int s, l; int flags; + unsigned long agpBase; if (drmAgpAcquire(info->drmFD) < 0) { xf86DrvMsg(pScreen->myNum, X_WARNING, "[agp] AGP not available\n"); @@ -591,7 +605,8 @@ static Bool R128DRIAgpInit(R128InfoPtr info, ScreenPtr pScreen) info->agpSize*1024); return FALSE; } - OUTREG(R128_AGP_BASE, info->ringHandle); /* Ring buf is at AGP offset 0 */ + agpBase = drmAgpBase(info->drmFD); + OUTREG(R128_AGP_BASE, agpBase); OUTREG(R128_AGP_CNTL, cntl); /* Disable Rage 128's PCIGART registers */ @@ -727,6 +742,40 @@ static Bool R128DRIPciInit(R128InfoPtr info, ScreenPtr pScreen) case PCI_CHIP_RAGE128TF: case PCI_CHIP_RAGE128TL: case PCI_CHIP_RAGE128TR: + /* FIXME: ATI documentation does not specify if the following chips are + * AGP or PCI, it just mentions their PCI IDs. I'm assuming they're AGP + * until I get more correct information. <mharris@redhat.com> + */ + case PCI_CHIP_RAGE128PA: + case PCI_CHIP_RAGE128PB: + case PCI_CHIP_RAGE128PC: + case PCI_CHIP_RAGE128PE: + case PCI_CHIP_RAGE128PG: + case PCI_CHIP_RAGE128PH: + case PCI_CHIP_RAGE128PI: + case PCI_CHIP_RAGE128PJ: + case PCI_CHIP_RAGE128PK: + case PCI_CHIP_RAGE128PL: + case PCI_CHIP_RAGE128PM: + case PCI_CHIP_RAGE128PN: + case PCI_CHIP_RAGE128PO: + case PCI_CHIP_RAGE128PQ: + case PCI_CHIP_RAGE128PS: + case PCI_CHIP_RAGE128PT: + case PCI_CHIP_RAGE128PU: + case PCI_CHIP_RAGE128PV: + case PCI_CHIP_RAGE128PW: + case PCI_CHIP_RAGE128PX: + case PCI_CHIP_RAGE128SE: + case PCI_CHIP_RAGE128SF: + case PCI_CHIP_RAGE128SG: + case PCI_CHIP_RAGE128SH: + case PCI_CHIP_RAGE128SK: + case PCI_CHIP_RAGE128SL: + case PCI_CHIP_RAGE128SN: + case PCI_CHIP_RAGE128TS: + case PCI_CHIP_RAGE128TT: + case PCI_CHIP_RAGE128TU: default: /* This is really an AGP card, force PCI GART mode */ chunk = INREG(R128_BM_CHUNK_0_VAL); @@ -767,6 +816,9 @@ static int R128DRIKernelInit(R128InfoPtr info, ScreenPtr pScreen) { drmR128Init drmInfo; + memset( &drmInfo, 0, sizeof(drmR128Init) ); + + drmInfo.func = DRM_R128_INIT_CCE; drmInfo.sarea_priv_offset = sizeof(XF86DRISAREARec); drmInfo.is_pci = info->IsPCI; drmInfo.cce_mode = info->CCEMode; @@ -787,14 +839,16 @@ static int R128DRIKernelInit(R128InfoPtr info, ScreenPtr pScreen) drmInfo.depth_pitch = info->depthPitch; drmInfo.span_offset = info->spanOffset; - drmInfo.fb_offset = info->LinearAddr; + drmInfo.fb_offset = info->fbHandle; drmInfo.mmio_offset = info->registerHandle; drmInfo.ring_offset = info->ringHandle; drmInfo.ring_rptr_offset = info->ringReadPtrHandle; drmInfo.buffers_offset = info->bufHandle; drmInfo.agp_textures_offset = info->agpTexHandle; - if (drmR128InitCCE(info->drmFD, &drmInfo) < 0) return FALSE; + if (drmCommandWrite(info->drmFD, DRM_R128_INIT, + &drmInfo, sizeof(drmR128Init)) < 0) + return FALSE; return TRUE; } @@ -838,6 +892,35 @@ static Bool R128DRIBufInit(R128InfoPtr info, ScreenPtr pScreen) return TRUE; } +static void R128DRIIrqInit(R128InfoPtr info, ScreenPtr pScreen) +{ + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + + if (!info->irq) { + info->irq = drmGetInterruptFromBusID( + info->drmFD, + ((pciConfigPtr)info->PciInfo->thisCard)->busnum, + ((pciConfigPtr)info->PciInfo->thisCard)->devnum, + ((pciConfigPtr)info->PciInfo->thisCard)->funcnum); + + if((drmCtlInstHandler(info->drmFD, info->irq)) != 0) { + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "[drm] failure adding irq handler, " + "there is a device already using that irq\n" + "[drm] falling back to irq-free operation\n"); + info->irq = 0; + } else { + unsigned char *R128MMIO = info->MMIO; + info->gen_int_cntl = INREG( R128_GEN_INT_CNTL ); + } + } + + if (info->irq) + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "[drm] dma control initialized, using IRQ %d\n", + info->irq); +} + /* Initialize the CCE state, and start the CCE (if used by the X server) */ static void R128DRICCEInit(ScrnInfoPtr pScrn) { @@ -994,6 +1077,42 @@ Bool R128DRIScreenInit(ScreenPtr pScreen) return FALSE; } + /* Check the DRM lib version. + drmGetLibVersion was not supported in version 1.0, so check for + symbol first to avoid possible crash or hang. + */ + if (xf86LoaderCheckSymbol("drmGetLibVersion")) { + version = drmGetLibVersion(info->drmFD); + } + else { + /* drmlib version 1.0.0 didn't have the drmGetLibVersion + entry point. Fake it by allocating a version record + via drmGetVersion and changing it to version 1.0.0 + */ + version = drmGetVersion(info->drmFD); + version->version_major = 1; + version->version_minor = 0; + version->version_patchlevel = 0; + } + + if (version) { + if (version->version_major != 1 || + version->version_minor < 1) { + /* incompatible drm library version */ + xf86DrvMsg(pScreen->myNum, X_ERROR, + "[dri] R128DRIScreenInit failed because of a version mismatch.\n" + "[dri] libdrm.a module version is %d.%d.%d but version 1.1.x is needed.\n" + "[dri] Disabling DRI.\n", + version->version_major, + version->version_minor, + version->version_patchlevel); + drmFreeVersion(version); + R128DRICloseScreen(pScreen); + return FALSE; + } + drmFreeVersion(version); + } + /* Check the r128 DRM version */ version = drmGetVersion(info->drmFD); if (version) { @@ -1037,6 +1156,18 @@ Bool R128DRIScreenInit(ScreenPtr pScreen) return FALSE; } + /* DRIScreenInit adds the frame buffer + map, but we need it as well */ + { + void *scratch_ptr; + int scratch_int; + + DRIGetDeviceInfo(pScreen, &info->fbHandle, + &scratch_int, &scratch_int, + &scratch_int, &scratch_int, + &scratch_ptr); + } + /* FIXME: When are these mappings unmapped? */ if (!R128InitVisualConfigs(pScreen)) { @@ -1082,6 +1213,9 @@ Bool R128DRIFinishScreenInit(ScreenPtr pScreen) return FALSE; } + /* Initialize IRQ */ + R128DRIIrqInit(info, pScreen); + /* Initialize and start the CCE if required */ R128DRICCEInit(pScrn); @@ -1128,12 +1262,18 @@ void R128DRICloseScreen(ScreenPtr pScreen) { ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; R128InfoPtr info = R128PTR(pScrn); + drmR128Init drmInfo; /* Stop the CCE if it is still in use */ if (info->directRenderingEnabled) { R128CCE_STOP(pScrn, info); } + if (info->irq) { + drmCtlUninstHandler(info->drmFD); + info->irq = 0; + } + /* De-allocate vertex buffers */ if (info->buffers) { drmUnmapBufs(info->buffers); @@ -1141,7 +1281,10 @@ void R128DRICloseScreen(ScreenPtr pScreen) } /* De-allocate all kernel resources */ - drmR128CleanupCCE(info->drmFD); + memset(&drmInfo, 0, sizeof(drmR128Init)); + drmInfo.func = DRM_R128_CLEANUP_CCE; + drmCommandWrite(info->drmFD, DRM_R128_INIT, + &drmInfo, sizeof(drmR128Init)); /* De-allocate all AGP resources */ if (info->agpTex) { diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dri.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dri.h index 5ef9cdfee..1339a4502 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dri.h +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dri.h @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dri.h,v 1.6 2001/03/21 17:02:21 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dri.h,v 1.7 2002/10/30 12:52:12 alanh Exp $ */ /* * Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario, * Precision Insight, Inc., Cedar Park, Texas, and @@ -40,7 +40,7 @@ #define _R128_DRI_ #include "xf86drm.h" -#include "xf86drmR128.h" +#include "r128_common.h" /* DRI Driver defaults */ #define R128_DEFAULT_CCE_PIO_MODE R128_PM4_64PIO_64VCBM_64INDBM diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_driver.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_driver.c index 02b4a847a..b02cd7ab9 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_driver.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_driver.c @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_driver.c,v 1.68 2002/10/08 22:14:04 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_driver.c,v 1.75 2003/02/19 01:19:41 dawes Exp $ */ /* * Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario, * Precision Insight, Inc., Cedar Park, Texas, and @@ -284,18 +284,20 @@ static const char *drmSymbols[] = { "drmAgpUnbind", "drmAgpVendorId", "drmAvailable", + "drmCommandNone", + "drmCommandRead", + "drmCommandWrite", + "drmCommandWriteRead", + "drmCtlInstHandler", + "drmCtlUninstHandler", + "drmFreeBufs", "drmFreeVersion", + "drmGetInterruptFromBusID", + "drmGetLibVersion", "drmGetVersion", "drmMap", "drmMapBufs", "drmDMA", - "drmR128CleanupCCE", - "drmR128InitCCE", - "drmR128ResetCCE", - "drmR128StartCCE", - "drmR128StopCCE", - "drmR128WaitForIdleCCE", - "drmR128FlushIndirectBuffer", "drmScatterGatherAlloc", "drmScatterGatherFree", "drmUnmap", @@ -351,6 +353,7 @@ void R128LoaderRefSymLists(void) driSymbols, #endif fbdevHWSymbols, + int10Symbols, vbeSymbols, /* ddcsymbols, */ i2cSymbols, @@ -929,10 +932,44 @@ static Bool R128PreInitConfig(ScrnInfoPtr pScrn) switch (info->Chipset) { /* R128 Pro and Pro2 can have DFP, we will deal with it. No support for dual-head/xinerama yet. - M3 can also have DFP, no support for now */ + M3 can also have DFP, no support for now */ case PCI_CHIP_RAGE128TF: case PCI_CHIP_RAGE128TL: - case PCI_CHIP_RAGE128TR: info->isPro2 = TRUE; + case PCI_CHIP_RAGE128TR: + /* FIXME: RAGE128 TS/TT/TU are assumed to be PRO2 as all 6 chips came + * out at the same time, so are of the same family likely. + * This requires confirmation however to be fully correct. + * Mike A. Harris <mharris@redhat.com> + */ + case PCI_CHIP_RAGE128TS: + case PCI_CHIP_RAGE128TT: + case PCI_CHIP_RAGE128TU: info->isPro2 = TRUE; + /* FIXME: RAGE128 P[ABCEGHIJKLMNOQSTUVWX] are assumed to have DFP + * capability, as the comment at the top suggests. + * This requires confirmation however to be fully correct. + * Mike A. Harris <mharris@redhat.com> + */ + case PCI_CHIP_RAGE128PA: + case PCI_CHIP_RAGE128PB: + case PCI_CHIP_RAGE128PC: + case PCI_CHIP_RAGE128PE: + case PCI_CHIP_RAGE128PG: + case PCI_CHIP_RAGE128PH: + case PCI_CHIP_RAGE128PI: + case PCI_CHIP_RAGE128PJ: + case PCI_CHIP_RAGE128PK: + case PCI_CHIP_RAGE128PL: + case PCI_CHIP_RAGE128PM: + case PCI_CHIP_RAGE128PN: + case PCI_CHIP_RAGE128PO: + case PCI_CHIP_RAGE128PQ: + case PCI_CHIP_RAGE128PS: + case PCI_CHIP_RAGE128PT: + case PCI_CHIP_RAGE128PU: + case PCI_CHIP_RAGE128PV: + case PCI_CHIP_RAGE128PW: + case PCI_CHIP_RAGE128PX: + case PCI_CHIP_RAGE128PD: case PCI_CHIP_RAGE128PF: case PCI_CHIP_RAGE128PP: @@ -948,6 +985,18 @@ static Bool R128PreInitConfig(ScrnInfoPtr pScrn) case PCI_CHIP_RAGE128RK: case PCI_CHIP_RAGE128RL: case PCI_CHIP_RAGE128SM: + /* FIXME: RAGE128 S[EFGHKLN] are assumed to be like the SM above as + * all of them are listed as "Rage 128 4x" in ATI docs. + * This requires confirmation however to be fully correct. + * Mike A. Harris <mharris@redhat.com> + */ + case PCI_CHIP_RAGE128SE: + case PCI_CHIP_RAGE128SF: + case PCI_CHIP_RAGE128SG: + case PCI_CHIP_RAGE128SH: + case PCI_CHIP_RAGE128SK: + case PCI_CHIP_RAGE128SL: + case PCI_CHIP_RAGE128SN: default: info->HasPanelRegs = FALSE; break; } } @@ -1088,20 +1137,53 @@ static Bool R128PreInitConfig(ScrnInfoPtr pScrn) case PCI_CHIP_RAGE128LE: case PCI_CHIP_RAGE128RE: case PCI_CHIP_RAGE128RK: - case PCI_CHIP_RAGE128PP: + case PCI_CHIP_RAGE128PD: case PCI_CHIP_RAGE128PR: - case PCI_CHIP_RAGE128PD: info->IsPCI = TRUE; break; + case PCI_CHIP_RAGE128PP: info->IsPCI = TRUE; break; case PCI_CHIP_RAGE128LF: case PCI_CHIP_RAGE128MF: case PCI_CHIP_RAGE128ML: + case PCI_CHIP_RAGE128PF: case PCI_CHIP_RAGE128RF: case PCI_CHIP_RAGE128RG: case PCI_CHIP_RAGE128RL: case PCI_CHIP_RAGE128SM: - case PCI_CHIP_RAGE128PF: case PCI_CHIP_RAGE128TF: case PCI_CHIP_RAGE128TL: case PCI_CHIP_RAGE128TR: + /* FIXME: Rage 128 S[EFGHKLN], T[STU], P[ABCEGHIJKLMNOQSTUVWX] are + * believed to be AGP, but need confirmation. <mharris@redhat.com> + */ + case PCI_CHIP_RAGE128PA: + case PCI_CHIP_RAGE128PB: + case PCI_CHIP_RAGE128PC: + case PCI_CHIP_RAGE128PE: + case PCI_CHIP_RAGE128PG: + case PCI_CHIP_RAGE128PH: + case PCI_CHIP_RAGE128PI: + case PCI_CHIP_RAGE128PJ: + case PCI_CHIP_RAGE128PK: + case PCI_CHIP_RAGE128PL: + case PCI_CHIP_RAGE128PM: + case PCI_CHIP_RAGE128PN: + case PCI_CHIP_RAGE128PO: + case PCI_CHIP_RAGE128PQ: + case PCI_CHIP_RAGE128PS: + case PCI_CHIP_RAGE128PT: + case PCI_CHIP_RAGE128PU: + case PCI_CHIP_RAGE128PV: + case PCI_CHIP_RAGE128PW: + case PCI_CHIP_RAGE128PX: + case PCI_CHIP_RAGE128TS: + case PCI_CHIP_RAGE128TT: + case PCI_CHIP_RAGE128TU: + case PCI_CHIP_RAGE128SE: + case PCI_CHIP_RAGE128SF: + case PCI_CHIP_RAGE128SG: + case PCI_CHIP_RAGE128SH: + case PCI_CHIP_RAGE128SK: + case PCI_CHIP_RAGE128SL: + case PCI_CHIP_RAGE128SN: default: info->IsPCI = FALSE; break; } } @@ -2352,12 +2434,6 @@ Bool R128ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv) } } } - /* Backing store setup */ - miInitializeBackingStore(pScreen); - xf86SetBackingStore(pScreen); - - /* Set Silken Mouse */ - xf86SetSilkenMouse(pScreen); /* Acceleration setup */ if (!xf86ReturnOptValBool(info->Options, OPTION_NOACCEL, FALSE)) { @@ -2378,6 +2454,13 @@ Bool R128ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv) /* DGA setup */ R128DGAInit(pScreen); + /* Backing store setup */ + miInitializeBackingStore(pScreen); + xf86SetBackingStore(pScreen); + + /* Set Silken Mouse */ + xf86SetSilkenMouse(pScreen); + /* Cursor setup */ miDCInitialize(pScreen, xf86GetPointerScreenFuncs()); @@ -2401,6 +2484,7 @@ Bool R128ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv) xf86DrvMsg(scrnIndex, X_INFO, "Using software cursor\n"); } } else { + info->cursor_start = 0; xf86DrvMsg(scrnIndex, X_INFO, "Using software cursor\n"); } @@ -3442,6 +3526,11 @@ Bool R128EnterVT(int scrnIndex, int flags) #ifdef XF86DRI if (info->directRenderingEnabled) { + if (info->irq) { + /* Need to make sure interrupts are enabled */ + unsigned char *R128MMIO = info->MMIO; + OUTREG(R128_GEN_INT_CNTL, info->gen_int_cntl); + } R128CCE_START(pScrn, info); DRIUnlock(pScrn->pScreen); } diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_misc.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_misc.c index 4d70d2023..8841f34ba 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_misc.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_misc.c @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_misc.c,v 1.4 2002/04/06 19:06:06 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_misc.c,v 1.5 2003/01/01 19:16:35 tsi Exp $ */ /* - * Copyright 2000 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 2000 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_probe.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_probe.c index 34d781b34..a5cd42fea 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_probe.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_probe.c @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_probe.c,v 1.16 2001/11/05 23:37:50 alanh Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_probe.c,v 1.18 2003/02/09 15:33:17 tsi Exp $ */ /* * Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario, * Precision Insight, Inc., Cedar Park, Texas, and @@ -75,44 +75,108 @@ static xf86ValidModeProc * const volatile ValidModeProc = R128ValidMode; #endif SymTabRec R128Chipsets[] = { - { PCI_CHIP_RAGE128RE, "ATI Rage 128 RE (PCI)" }, - { PCI_CHIP_RAGE128RF, "ATI Rage 128 RF (AGP)" }, + /* FIXME: The chipsets with (PCI/AGP) are not known wether they are AGP or + * PCI, so I've labeled them as such in hopes users will submit + * data if we're unable to gather it from official documentation + */ + { PCI_CHIP_RAGE128LE, "ATI Rage 128 Mobility M3 LE (PCI)" }, + { PCI_CHIP_RAGE128LF, "ATI Rage 128 Mobility M3 LF (AGP)" }, + { PCI_CHIP_RAGE128MF, "ATI Rage 128 Mobility M4 MF (AGP)" }, + { PCI_CHIP_RAGE128ML, "ATI Rage 128 Mobility M4 ML (AGP)" }, + { PCI_CHIP_RAGE128PA, "ATI Rage 128 Pro GL PA (PCI/AGP)" }, + { PCI_CHIP_RAGE128PB, "ATI Rage 128 Pro GL PB (PCI/AGP)" }, + { PCI_CHIP_RAGE128PC, "ATI Rage 128 Pro GL PC (PCI/AGP)" }, + { PCI_CHIP_RAGE128PD, "ATI Rage 128 Pro GL PD (PCI)" }, + { PCI_CHIP_RAGE128PE, "ATI Rage 128 Pro GL PE (PCI/AGP)" }, + { PCI_CHIP_RAGE128PF, "ATI Rage 128 Pro GL PF (AGP)" }, + { PCI_CHIP_RAGE128PG, "ATI Rage 128 Pro VR PG (PCI/AGP)" }, + { PCI_CHIP_RAGE128PH, "ATI Rage 128 Pro VR PH (PCI/AGP)" }, + { PCI_CHIP_RAGE128PI, "ATI Rage 128 Pro VR PI (PCI/AGP)" }, + { PCI_CHIP_RAGE128PJ, "ATI Rage 128 Pro VR PJ (PCI/AGP)" }, + { PCI_CHIP_RAGE128PK, "ATI Rage 128 Pro VR PK (PCI/AGP)" }, + { PCI_CHIP_RAGE128PL, "ATI Rage 128 Pro VR PL (PCI/AGP)" }, + { PCI_CHIP_RAGE128PM, "ATI Rage 128 Pro VR PM (PCI/AGP)" }, + { PCI_CHIP_RAGE128PN, "ATI Rage 128 Pro VR PN (PCI/AGP)" }, + { PCI_CHIP_RAGE128PO, "ATI Rage 128 Pro VR PO (PCI/AGP)" }, + { PCI_CHIP_RAGE128PP, "ATI Rage 128 Pro VR PP (PCI)" }, + { PCI_CHIP_RAGE128PQ, "ATI Rage 128 Pro VR PQ (PCI/AGP)" }, + { PCI_CHIP_RAGE128PR, "ATI Rage 128 Pro VR PR (PCI)" }, + { PCI_CHIP_RAGE128PS, "ATI Rage 128 Pro VR PS (PCI/AGP)" }, + { PCI_CHIP_RAGE128PT, "ATI Rage 128 Pro VR PT (PCI/AGP)" }, + { PCI_CHIP_RAGE128PU, "ATI Rage 128 Pro VR PU (PCI/AGP)" }, + { PCI_CHIP_RAGE128PV, "ATI Rage 128 Pro VR PV (PCI/AGP)" }, + { PCI_CHIP_RAGE128PW, "ATI Rage 128 Pro VR PW (PCI/AGP)" }, + { PCI_CHIP_RAGE128PX, "ATI Rage 128 Pro VR PX (PCI/AGP)" }, + { PCI_CHIP_RAGE128RE, "ATI Rage 128 GL RE (PCI)" }, + { PCI_CHIP_RAGE128RF, "ATI Rage 128 GL RF (AGP)" }, { PCI_CHIP_RAGE128RG, "ATI Rage 128 RG (AGP)" }, - { PCI_CHIP_RAGE128RK, "ATI Rage 128 RK (PCI)" }, - { PCI_CHIP_RAGE128RL, "ATI Rage 128 RL (AGP)" }, - { PCI_CHIP_RAGE128SM, "ATI Rage 128 SM (AGP)" }, - { PCI_CHIP_RAGE128PD, "ATI Rage 128 Pro PD (PCI)" }, - { PCI_CHIP_RAGE128PF, "ATI Rage 128 Pro PF (AGP)" }, - { PCI_CHIP_RAGE128PP, "ATI Rage 128 Pro PP (PCI)" }, - { PCI_CHIP_RAGE128PR, "ATI Rage 128 Pro PR (PCI)" }, + { PCI_CHIP_RAGE128RK, "ATI Rage 128 VR RK (PCI)" }, + { PCI_CHIP_RAGE128RL, "ATI Rage 128 VR RL (AGP)" }, + { PCI_CHIP_RAGE128SE, "ATI Rage 128 4X SE (PCI/AGP)" }, + { PCI_CHIP_RAGE128SF, "ATI Rage 128 4X SF (PCI/AGP)" }, + { PCI_CHIP_RAGE128SG, "ATI Rage 128 4X SG (PCI/AGP)" }, + { PCI_CHIP_RAGE128SH, "ATI Rage 128 4X SH (PCI/AGP)" }, + { PCI_CHIP_RAGE128SK, "ATI Rage 128 4X SK (PCI/AGP)" }, + { PCI_CHIP_RAGE128SL, "ATI Rage 128 4X SL (PCI/AGP)" }, + { PCI_CHIP_RAGE128SM, "ATI Rage 128 4X SM (AGP)" }, + { PCI_CHIP_RAGE128SN, "ATI Rage 128 4X SN (PCI/AGP)" }, { PCI_CHIP_RAGE128TF, "ATI Rage 128 Pro ULTRA TF (AGP)" }, { PCI_CHIP_RAGE128TL, "ATI Rage 128 Pro ULTRA TL (AGP)" }, { PCI_CHIP_RAGE128TR, "ATI Rage 128 Pro ULTRA TR (AGP)" }, - { PCI_CHIP_RAGE128LE, "ATI Rage 128 Mobility LE (PCI)" }, - { PCI_CHIP_RAGE128LF, "ATI Rage 128 Mobility LF (AGP)" }, - { PCI_CHIP_RAGE128MF, "ATI Rage 128 Mobility MF (AGP)" }, - { PCI_CHIP_RAGE128ML, "ATI Rage 128 Mobility ML (AGP)" }, + { PCI_CHIP_RAGE128TS, "ATI Rage 128 Pro ULTRA TS (AGP?)" }, + { PCI_CHIP_RAGE128TT, "ATI Rage 128 Pro ULTRA TT (AGP?)" }, + { PCI_CHIP_RAGE128TU, "ATI Rage 128 Pro ULTRA TU (AGP?)" }, { -1, NULL } }; PciChipsets R128PciChipsets[] = { + { PCI_CHIP_RAGE128LE, PCI_CHIP_RAGE128LE, RES_SHARED_VGA }, + { PCI_CHIP_RAGE128LF, PCI_CHIP_RAGE128LF, RES_SHARED_VGA }, + { PCI_CHIP_RAGE128MF, PCI_CHIP_RAGE128MF, RES_SHARED_VGA }, + { PCI_CHIP_RAGE128ML, PCI_CHIP_RAGE128ML, RES_SHARED_VGA }, + { PCI_CHIP_RAGE128PA, PCI_CHIP_RAGE128PA, RES_SHARED_VGA }, + { PCI_CHIP_RAGE128PB, PCI_CHIP_RAGE128PB, RES_SHARED_VGA }, + { PCI_CHIP_RAGE128PC, PCI_CHIP_RAGE128PC, RES_SHARED_VGA }, + { PCI_CHIP_RAGE128PD, PCI_CHIP_RAGE128PD, RES_SHARED_VGA }, + { PCI_CHIP_RAGE128PE, PCI_CHIP_RAGE128PE, RES_SHARED_VGA }, + { PCI_CHIP_RAGE128PF, PCI_CHIP_RAGE128PF, RES_SHARED_VGA }, + { PCI_CHIP_RAGE128PG, PCI_CHIP_RAGE128PG, RES_SHARED_VGA }, + { PCI_CHIP_RAGE128PH, PCI_CHIP_RAGE128PH, RES_SHARED_VGA }, + { PCI_CHIP_RAGE128PI, PCI_CHIP_RAGE128PI, RES_SHARED_VGA }, + { PCI_CHIP_RAGE128PJ, PCI_CHIP_RAGE128PJ, RES_SHARED_VGA }, + { PCI_CHIP_RAGE128PK, PCI_CHIP_RAGE128PK, RES_SHARED_VGA }, + { PCI_CHIP_RAGE128PL, PCI_CHIP_RAGE128PL, RES_SHARED_VGA }, + { PCI_CHIP_RAGE128PM, PCI_CHIP_RAGE128PM, RES_SHARED_VGA }, + { PCI_CHIP_RAGE128PN, PCI_CHIP_RAGE128PN, RES_SHARED_VGA }, + { PCI_CHIP_RAGE128PO, PCI_CHIP_RAGE128PO, RES_SHARED_VGA }, + { PCI_CHIP_RAGE128PP, PCI_CHIP_RAGE128PP, RES_SHARED_VGA }, + { PCI_CHIP_RAGE128PQ, PCI_CHIP_RAGE128PQ, RES_SHARED_VGA }, + { PCI_CHIP_RAGE128PR, PCI_CHIP_RAGE128PR, RES_SHARED_VGA }, + { PCI_CHIP_RAGE128PS, PCI_CHIP_RAGE128PS, RES_SHARED_VGA }, + { PCI_CHIP_RAGE128PT, PCI_CHIP_RAGE128PT, RES_SHARED_VGA }, + { PCI_CHIP_RAGE128PU, PCI_CHIP_RAGE128PU, RES_SHARED_VGA }, + { PCI_CHIP_RAGE128PV, PCI_CHIP_RAGE128PV, RES_SHARED_VGA }, + { PCI_CHIP_RAGE128PW, PCI_CHIP_RAGE128PW, RES_SHARED_VGA }, + { PCI_CHIP_RAGE128PX, PCI_CHIP_RAGE128PX, RES_SHARED_VGA }, { PCI_CHIP_RAGE128RE, PCI_CHIP_RAGE128RE, RES_SHARED_VGA }, { PCI_CHIP_RAGE128RF, PCI_CHIP_RAGE128RF, RES_SHARED_VGA }, { PCI_CHIP_RAGE128RG, PCI_CHIP_RAGE128RG, RES_SHARED_VGA }, { PCI_CHIP_RAGE128RK, PCI_CHIP_RAGE128RK, RES_SHARED_VGA }, { PCI_CHIP_RAGE128RL, PCI_CHIP_RAGE128RL, RES_SHARED_VGA }, + { PCI_CHIP_RAGE128SE, PCI_CHIP_RAGE128SE, RES_SHARED_VGA }, + { PCI_CHIP_RAGE128SF, PCI_CHIP_RAGE128SF, RES_SHARED_VGA }, + { PCI_CHIP_RAGE128SG, PCI_CHIP_RAGE128SG, RES_SHARED_VGA }, + { PCI_CHIP_RAGE128SH, PCI_CHIP_RAGE128SH, RES_SHARED_VGA }, + { PCI_CHIP_RAGE128SK, PCI_CHIP_RAGE128SK, RES_SHARED_VGA }, + { PCI_CHIP_RAGE128SL, PCI_CHIP_RAGE128SL, RES_SHARED_VGA }, { PCI_CHIP_RAGE128SM, PCI_CHIP_RAGE128SM, RES_SHARED_VGA }, - { PCI_CHIP_RAGE128PD, PCI_CHIP_RAGE128PD, RES_SHARED_VGA }, - { PCI_CHIP_RAGE128PF, PCI_CHIP_RAGE128PF, RES_SHARED_VGA }, - { PCI_CHIP_RAGE128PP, PCI_CHIP_RAGE128PP, RES_SHARED_VGA }, - { PCI_CHIP_RAGE128PR, PCI_CHIP_RAGE128PR, RES_SHARED_VGA }, + { PCI_CHIP_RAGE128SN, PCI_CHIP_RAGE128SN, RES_SHARED_VGA }, { PCI_CHIP_RAGE128TF, PCI_CHIP_RAGE128TF, RES_SHARED_VGA }, { PCI_CHIP_RAGE128TL, PCI_CHIP_RAGE128TL, RES_SHARED_VGA }, { PCI_CHIP_RAGE128TR, PCI_CHIP_RAGE128TR, RES_SHARED_VGA }, - { PCI_CHIP_RAGE128LE, PCI_CHIP_RAGE128LE, RES_SHARED_VGA }, - { PCI_CHIP_RAGE128LF, PCI_CHIP_RAGE128LF, RES_SHARED_VGA }, - { PCI_CHIP_RAGE128MF, PCI_CHIP_RAGE128MF, RES_SHARED_VGA }, - { PCI_CHIP_RAGE128ML, PCI_CHIP_RAGE128ML, RES_SHARED_VGA }, + { PCI_CHIP_RAGE128TS, PCI_CHIP_RAGE128TS, RES_SHARED_VGA }, + { PCI_CHIP_RAGE128TT, PCI_CHIP_RAGE128TT, RES_SHARED_VGA }, + { PCI_CHIP_RAGE128TU, PCI_CHIP_RAGE128TU, RES_SHARED_VGA }, { -1, -1, RES_UNDEFINED } }; diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_reg.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_reg.h index ac461d0d0..3968bd579 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_reg.h +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_reg.h @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_reg.h,v 1.14 2002/04/29 04:15:54 anderson Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_reg.h,v 1.15 2002/12/16 16:19:11 dawes Exp $ */ /* * Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario, * Precision Insight, Inc., Cedar Park, Texas, and @@ -48,7 +48,9 @@ #ifndef _R128_REG_H_ #define _R128_REG_H_ +#ifdef XFree86Module #include "xf86_ansic.h" +#endif #include "compiler.h" /* Memory mapped register access macros */ diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_version.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_version.h index 420ea718e..589d8d40b 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_version.h +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_version.h @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_version.h,v 1.4 2002/04/06 19:06:06 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_version.h,v 1.6 2003/01/01 19:16:35 tsi Exp $ */ /* - * Copyright 2000 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 2000 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that @@ -24,6 +24,16 @@ #ifndef _R128_VERSION_H_ #define _R128_VERSION_H_ 1 +#undef R128_NAME +#undef R128_DRIVER_NAME +#undef R128_VERSION_MAJOR +#undef R128_VERSION_MINOR +#undef R128_VERSION_PATCH +#undef R128_VERSION_CURRENT +#undef R128_VERSION_EVALUATE +#undef R128_VERSION_STRINGIFY +#undef R128_VERSION_NAME + #define R128_NAME "R128" #define R128_DRIVER_NAME "r128" @@ -31,7 +41,9 @@ #define R128_VERSION_MINOR 0 #define R128_VERSION_PATCH 1 +#ifndef R128_VERSION_EXTRA #define R128_VERSION_EXTRA "" +#endif #define R128_VERSION_CURRENT \ ((R128_VERSION_MAJOR << 20) | \ diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_video.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_video.c index 28583c2a0..119971fdd 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_video.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_video.c @@ -1,10 +1,10 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_video.c,v 1.21 2002/06/04 23:04:51 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_video.c,v 1.26 2003/02/19 01:19:41 dawes Exp $ */ #include "r128.h" #include "r128_reg.h" #ifdef XF86DRI -#include "xf86drmR128.h" +#include "r128_common.h" #include "r128_sarea.h" #endif @@ -377,6 +377,8 @@ R128StopVideo(ScrnInfoPtr pScrn, pointer data, Bool cleanup) if(cleanup) { if(pPriv->videoStatus & CLIENT_VIDEO_ON) { OUTREG(R128_OV0_SCALE_CNTL, 0); + if (info->cursor_start) + xf86ForceHWCursor (pScrn->pScreen, FALSE); } if(pPriv->linear) { xf86FreeOffscreenLinear(pPriv->linear); @@ -509,6 +511,7 @@ R128DMA( int err=-1, i, idx, offset, hpass, passes, srcpassbytes, dstpassbytes; int sizes[MAXPASSES], list[MAXPASSES]; drmDMAReq req; + drmR128Blit blit; /* Verify conditions and bail out as early as possible */ if (!info->directRenderingEnabled || !info->DMAForXv) @@ -567,8 +570,17 @@ R128DMA( } } - if ((err = drmR128TextureBlit(info->drmFD, idx, offset, dstPitch, - (R128_DATATYPE_CI8 >> 16), (offset % 32), 0, w, hpass)) < 0) + blit.idx = idx; + blit.offset = offset; + blit.pitch = dstPitch; + blit.format = (R128_DATATYPE_CI8 >> 16); + blit.x = (offset % 32); + blit.y = 0; + blit.width = w; + blit.height = hpass; + + if ((err = drmCommandWrite(info->drmFD, DRM_R128_BLIT, + &blit, sizeof(drmR128Blit))) < 0) break; } @@ -875,6 +887,14 @@ R128PutImage( int top, left, npixels, nlines, bpp; BoxRec dstBox; CARD32 tmp; +#if X_BYTE_ORDER == X_BIG_ENDIAN + unsigned char *R128MMIO = info->MMIO; + CARD32 config_cntl = INREG(R128_CONFIG_CNTL); + + /* We need to disable byte swapping, or the data gets mangled */ + OUTREG(R128_CONFIG_CNTL, config_cntl & + ~(APER_0_BIG_ENDIAN_16BPP_SWAP | APER_0_BIG_ENDIAN_32BPP_SWAP)); +#endif /* * s1offset, s2offset, s3offset - byte offsets to the Y, U and V planes @@ -983,24 +1003,9 @@ R128PutImage( } nlines = ((((yb + 0xffff) >> 16) + 1) & ~1) - top; - { -#if X_BYTE_ORDER == X_BIG_ENDIAN - unsigned char *R128MMIO = info->MMIO; - CARD32 config_cntl; - - /* We need to disable byte swapping, or the data gets mangled */ - config_cntl = INREG(R128_CONFIG_CNTL); - OUTREG(R128_CONFIG_CNTL, config_cntl & - ~(APER_0_BIG_ENDIAN_16BPP_SWAP|APER_0_BIG_ENDIAN_32BPP_SWAP)); -#endif - R128CopyData420(info, buf + s1offset, buf + s2offset, buf + s3offset, - info->FB+d1offset, info->FB+d2offset, info->FB+d3offset, - srcPitch, srcPitch2, dstPitch, nlines, npixels); -#if X_BYTE_ORDER == X_BIG_ENDIAN - /* restore byte swapping */ - OUTREG(R128_CONFIG_CNTL, config_cntl); -#endif - } + R128CopyData420(info, buf + s1offset, buf + s2offset, buf + s3offset, + info->FB+d1offset, info->FB+d2offset, info->FB+d3offset, + srcPitch, srcPitch2, dstPitch, nlines, npixels); break; case FOURCC_UYVY: case FOURCC_YUY2: @@ -1019,6 +1024,10 @@ R128PutImage( break; } +#if X_BYTE_ORDER == X_BIG_ENDIAN + /* restore byte swapping */ + OUTREG(R128_CONFIG_CNTL, config_cntl); +#endif /* update cliplist */ if(!RegionsEqual(&pPriv->clip, clipBoxes)) { @@ -1046,6 +1055,8 @@ R128PutImage( break; } + if (info->cursor_start && !(pPriv->videoStatus & CLIENT_VIDEO_ON)) + xf86ForceHWCursor (pScrn->pScreen, TRUE); pPriv->videoStatus = CLIENT_VIDEO_ON; info->VideoTimerCallback = R128VideoTimerCallback; @@ -1107,6 +1118,8 @@ R128VideoTimerCallback(ScrnInfoPtr pScrn, Time now) if(pPriv->offTime < now) { unsigned char *R128MMIO = info->MMIO; OUTREG(R128_OV0_SCALE_CNTL, 0); + if (info->cursor_start && pPriv->videoStatus & CLIENT_VIDEO_ON) + xf86ForceHWCursor (pScrn->pScreen, FALSE); pPriv->videoStatus = FREE_TIMER; pPriv->freeTime = now + FREE_DELAY; } @@ -1116,6 +1129,8 @@ R128VideoTimerCallback(ScrnInfoPtr pScrn, Time now) xf86FreeOffscreenLinear(pPriv->linear); pPriv->linear = NULL; } + if (info->cursor_start && pPriv->videoStatus & CLIENT_VIDEO_ON) + xf86ForceHWCursor (pScrn->pScreen, FALSE); pPriv->videoStatus = 0; info->VideoTimerCallback = NULL; } diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon.h index 54aed36f2..81e0db7b7 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon.h +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon.h @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon.h,v 1.29 2002/10/12 01:38:07 martin Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon.h,v 1.37 2003/02/23 23:28:48 dawes Exp $ */ /* * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and * VA Linux Systems Inc., Fremont, California. @@ -31,7 +31,7 @@ * Authors: * Kevin E. Martin <martin@xfree86.org> * Rickard E. Faith <faith@valinux.com> - * Alan Hourihane <ahourihane@valinux.com> + * Alan Hourihane <alanh@fairlite.demon.co.uk> * */ @@ -66,9 +66,10 @@ #include "picturestr.h" #endif -#define RADEON_DEBUG 0 /* Turn off debugging output */ -#define RADEON_TIMEOUT 2000000 /* Fall out of wait loops after this count */ -#define RADEON_MMIOSIZE 0x80000 +#define RADEON_DEBUG 0 /* Turn off debugging output */ +#define RADEON_IDLE_RETRY 16 /* Fall out of idle loops after this count */ +#define RADEON_TIMEOUT 2000000 /* Fall out of wait loops after this count */ +#define RADEON_MMIOSIZE 0x80000 #define RADEON_VBIOS_SIZE 0x00010000 #define RADEON_USE_RMX 0x80000000 /* mode flag for using RMX @@ -193,10 +194,6 @@ typedef struct { CARD32 p2pll_div_0; CARD32 htotal_cntl2; - /* DDA register */ - CARD32 dda_config; - CARD32 dda_on_off; - /* Pallet */ Bool palette_valid; CARD32 palette[256]; @@ -305,6 +302,7 @@ typedef struct { Bool ddc_mode; /* Validate mode by matching exactly * the modes supported in DDC data */ + Bool R300CGWorkaround; /* EDID or BIOS values for FPs */ int PanelXRes; @@ -341,6 +339,11 @@ typedef struct { xf86CursorInfoPtr cursor; unsigned long cursor_start; unsigned long cursor_end; +#ifdef ARGB_CURSOR + Bool cursor_argb; +#endif + int cursor_fg; + int cursor_bg; /* * XAAForceTransBlit is used to change the behavior of the XAA @@ -394,6 +397,7 @@ typedef struct { RADEONFBLayout CurrentLayout; #ifdef XF86DRI + Bool noBackBuffer; Bool directRenderingEnabled; DRIInfoPtr pDRIInfo; int drmFD; @@ -412,15 +416,20 @@ typedef struct { unsigned char *PCI; /* Map */ Bool depthMoves; /* Enable depth moves -- slow! */ + Bool allowPageFlip; /* Enable 3d page flipping */ + Bool have3DWindows; /* Are there any 3d clients? */ + int drmMinor; drmSize agpSize; drmHandle agpMemHandle; /* Handle from drmAgpAlloc */ unsigned long agpOffset; unsigned char *AGP; /* Map */ int agpMode; + int agpFastWrite; CARD32 pciCommand; + Bool CPRuns; /* CP is running */ Bool CPInUse; /* CP has been used by X server */ Bool CPStarted; /* CP has started */ int CPMode; /* CP mode that server/clients use */ @@ -485,6 +494,12 @@ typedef struct { CARD32 dst_pitch_offset; + /* offscreen memory management */ + int backLines; + FBAreaPtr backArea; + int depthTexLines; + FBAreaPtr depthTexArea; + /* Saved scissor values */ CARD32 sc_left; CARD32 sc_right; @@ -496,16 +511,25 @@ typedef struct { CARD32 aux_sc_cntl; + int irq; + #ifdef PER_CONTEXT_SAREA - int perctx_sarea_size; + int perctx_sarea_size; #endif #endif + /* XVideo */ XF86VideoAdaptorPtr adaptor; void (*VideoTimerCallback)(ScrnInfoPtr, Time); + FBLinearPtr videoLinear; int videoKey; + + /* general */ Bool showCache; OptionInfoPtr Options; +#ifdef XFree86LOADER + XF86ModReqInfo xaaReq; +#endif } RADEONInfoRec, *RADEONInfoPtr; #define RADEONWaitForFifo(pScrn, entries) \ @@ -521,12 +545,16 @@ extern void RADEONWaitForIdleMMIO(ScrnInfoPtr pScrn); extern void RADEONWaitForIdleCP(ScrnInfoPtr pScrn); #endif +extern void RADEONDoAdjustFrame(ScrnInfoPtr pScrn, int x, int y, + int clone); + extern void RADEONEngineReset(ScrnInfoPtr pScrn); extern void RADEONEngineFlush(ScrnInfoPtr pScrn); extern void RADEONEngineRestore(ScrnInfoPtr pScrn); extern unsigned RADEONINPLL(ScrnInfoPtr pScrn, int addr); extern void RADEONWaitForVerticalSync(ScrnInfoPtr pScrn); +extern void RADEONWaitForVerticalSync2(ScrnInfoPtr pScrn); extern void RADEONSelectBuffer(ScrnInfoPtr pScrn, int buffer); @@ -549,11 +577,12 @@ extern Bool RADEONDRIFinishScreenInit(ScreenPtr pScreen); extern drmBufPtr RADEONCPGetBuffer(ScrnInfoPtr pScrn); extern void RADEONCPFlushIndirect(ScrnInfoPtr pScrn, int discard); extern void RADEONCPReleaseIndirect(ScrnInfoPtr pScrn); +extern int RADEONCPStop(ScrnInfoPtr pScrn, RADEONInfoPtr info); #define RADEONCP_START(pScrn, info) \ do { \ - int _ret = drmRadeonStartCP(info->drmFD); \ + int _ret = drmCommandNone(info->drmFD, DRM_RADEON_CP_START); \ if (_ret) { \ xf86DrvMsg(pScrn->scrnIndex, X_ERROR, \ "%s: CP start %d\n", __FUNCTION__, _ret); \ @@ -563,19 +592,23 @@ do { \ #define RADEONCP_STOP(pScrn, info) \ do { \ - int _ret = drmRadeonStopCP(info->drmFD); \ - if (_ret) { \ - xf86DrvMsg(pScrn->scrnIndex, X_ERROR, \ + int _ret; \ + if (info->CPStarted) { \ + _ret = RADEONCPStop(pScrn, info); \ + if (_ret) { \ + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, \ "%s: CP stop %d\n", __FUNCTION__, _ret); \ - } \ - info->CPStarted = FALSE; \ + } \ + info->CPStarted = FALSE; \ + } \ RADEONEngineRestore(pScrn); \ + info->CPRuns = FALSE; \ } while (0) #define RADEONCP_RESET(pScrn, info) \ do { \ if (RADEONCP_USE_RING_BUFFER(info->CPMode)) { \ - int _ret = drmRadeonResetCP(info->drmFD); \ + int _ret = drmCommandNone(info->drmFD, DRM_RADEON_CP_RESET); \ if (_ret) { \ xf86DrvMsg(pScrn->scrnIndex, X_ERROR, \ "%s: CP reset %d\n", __FUNCTION__, _ret); \ @@ -609,7 +642,7 @@ do { \ #define RADEON_VERBOSE 0 -#define RING_LOCALS CARD32 *__head; int __count; +#define RING_LOCALS CARD32 *__head = NULL; int __count = 0 #define BEGIN_RING(n) do { \ if (RADEON_VERBOSE) { \ diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon.man b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon.man new file mode 100644 index 000000000..d0c6547db --- /dev/null +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon.man @@ -0,0 +1,218 @@ +.\" $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon.man,v 1.0 2003/01/31 23:04:50 +.ds q \N'34' +.TH RADEON __drivermansuffix__ __vendorversion__ +.SH NAME +radeon \- ATI RADEON video driver +.SH SYNOPSIS +.nf +.B "Section \*qDevice\*q" +.BI " Identifier \*q" devname \*q +.B " Driver \*qradeon\*q" +\ \ ... +.B EndSection +.fi +.SH DESCRIPTION +.B radeon +is a XFree86 driver for ATI RADEON based video cards. It contains +full support for 8, 15, 16 and 24 bit pixel depths, dual-head setup, +flat panel, hardware 2D acceleration, hardware 3D acceleration +(except R300 cards), hardware cursor, XV extension, Xinerama extension. +.SH SUPPORTED HARDWARE +The +.B radeon +driver supports PCI and AGP video cards based on the following ATI chips +.TP 12 +.B R100 +Radeon 7200 +.TP 12 +.B RV100 +Radeon 7000(VE), M6 +.TP 12 +.B RV200 +Radeon 7500, M7 +.TP 12 +.B R200 +Radeon 8500, 9100, FireGL 8800/8700 +.TP 12 +.B RV250 +Radeon 9000, M9 +.TP 12 +.B R300 +Radeon 9700PRO/9700/9500PRO/9500, FireGL X1/Z1 + +.SH CONFIGURATION DETAILS +Please refer to XF86Config(__filemansuffix__) for general configuration +details. This section only covers configuration details specific to this +driver. +.PP +The driver auto\-detects all device information necessary to initialize +the card. However, if you have problems with auto\-detection, you can +specify: +.PP +.RS 4 +VideoRam \- in kilobytes +.br +MemBase \- physical address of the linear framebuffer +.br +IOBase \- physical address of the MMIO registers +.br +ChipID \- PCI DEVICE ID +.RE +.PP +In addition, the following driver +.B Options +are supported: +.TP +.BI "Option \*qSWcursor\*q \*q" boolean \*q +Selects software cursor. The default is +.B off. +.TP +.BI "Option \*qNoAccel\*q \*q" boolean \*q +Enables or disables all hardware acceleration. +.br +The default is to +.B enable +hardware acceleration. +.TP +.BI "Option \*qDac6Bit\*q \*q" boolean \*q +Enables or disables the use of 6 bits per color component when in 8 bpp +mode (emulates VGA mode). By default, all 8 bits per color component +are used. +.br +The default is +.B off. +.TP +.BI "Option \*qVideoKey\*q \*q" integer \*q +This overrides the default pixel value for the YUV video overlay key. +.br +The default value is +.B undefined. +.TP +.BI "Option \*qUseFBDev\*q \*q" boolean \*q +Enable or disable use of an OS\-specific framebuffer device interface +(which is not supported on all OSs). See fbdevhw(__drivermansuffix__) +for further information. +.br +The default is +.B off. +.TP +.BI "Option \*qAGPMode\*q \*q" integer \*q +Set AGP data transfer rate. +(used only when DRI is enabled) +.br +1 \-\- x1 (default) +.br +2 \-\- x2 +.br +4 \-\- x4 +.br +others \-\- invalid +.TP +.BI "Option \*qAGPFastWrite\*q \*q" boolean \*q +Enable AGP fast write. +.br +(used only when DRI is enabled) +.br +The default is +.B off. +.TP +.BI "Option \*qForcePCIMode\*q \*q" boolean \*q +Force to use PCI GART for DRI acceleration. +.br +(used only when DRI is enabled) +.br +The default is +.B off. +.TP +.BI "Option \*qDDCMode\*q \*q" boolean \*q +Force to use the modes queried from the connected monitor. +.br +The default is +.B off. +.TP +.BI "Option \*qCloneDisplay\*q \*q" integer \*q +.br +This option is only used for dual\-head cards with only single +screen section specified in the configuration file. + +0 \-\- disable +.br +1 \-\- auto\-detect (default) +.br +2 \-\- force on +.br +3 \-\- auto\-detect + 2nd head overlay +.br +4 \-\- force on + 2nd head overlay +.br +others \-\- auto\-detect + +.B disable +means only one CRTC is used for both heads. +.B auto\-detect +means the secondary head will be driven by CRTC2 +if a monitor is detected there. +.B force on +means the secondary head will be driven by CRTC2 +even no monitor is detected there. +.B 2nd-head overlay +means the only hardware overlay will be placed to the secondary head. + +Primary/Secondary head for dual\-head cards: +.br +(when only one port is used, it will be treated as the primary regardless) +.br +.B Primary head: +.br +DVI port on DVI+VGA cards +.br +LCD output on laptops +.br +Internal TMDS prot on DVI+DVI cards +.br +.B Secondary head: +.br +VGA port on DVI+VGA cards +.br +VGA port on laptops +.br +External TMDS port on DVI+DVI cards + +.TP +.BI "Option \*qCloneMode\*q \*q" "string" \*q +Set the first mode for the secondary head. +It can be different from the modes used for the primary head. If you don't +have this line while clone is on, the modes specified for the primary head +will be used for the secondary head. +.TP +.BI "Option \*qCloneHSync\*q \*q" "string" \*q +Set the horizontal sync range for the secondary monitor. +It is not required if a DDC\-capable monitor is connected. +.br +The default value is +.B undefined. +.TP +.BI "Option \*qCloneVRefresh\*q \*q" "string" \*q +Set the vertical refresh range for the secondary monitor. +It is not required if a DDC\-capable monitor is connected. +.br +The default value is +.B undefined. +.TP +.BI "Option \*qPanelOff\*q \*q" boolean \*q +Disable panel output. Only used when clone is enabled. +.br +The default value is +.B off. +.TP +.BI "Option \*qEnablePageFlip\*q \*q" boolean \*q +Enable page flipping for 3D acceleration. This will increase performance +but not work correctly in some rare cases, hence the default is +.B off. + + +.SH SEE ALSO +XFree86(1), XF86Config(__filemansuffix__), xf86config(1), Xserver(1), X(__miscmansuffix__) +.SH AUTHORS +.nf +Authors include: ... diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_accel.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_accel.c index 9d852f0e3..1d9fbcf3f 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_accel.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_accel.c @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_accel.c,v 1.29 2002/10/12 01:38:07 martin Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_accel.c,v 1.32 2003/01/17 19:54:03 martin Exp $ */ /* * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and * VA Linux Systems Inc., Fremont, California. @@ -31,7 +31,7 @@ * Authors: * Kevin E. Martin <martin@xfree86.org> * Rickard E. Faith <faith@valinux.com> - * Alan Hourihane <ahourihane@valinux.com> + * Alan Hourihane <alanh@fairlite.demon.co.uk> * * Credits: * @@ -72,6 +72,7 @@ /* Driver data structures */ #include "radeon.h" +#include "radeon_macros.h" #include "radeon_probe.h" #include "radeon_reg.h" #include "radeon_version.h" @@ -171,8 +172,7 @@ void RADEONEngineReset(ScrnInfoPtr pScrn) RADEONEngineFlush(pScrn); clock_cntl_index = INREG(RADEON_CLOCK_CNTL_INDEX); - if (info->ChipFamily == CHIP_FAMILY_R300) - R300CGWorkaround(pScrn); + if (info->R300CGWorkaround) R300CGWorkaround(pScrn); /* Some ASICs have bugs with dynamic-on feature, which are * ASIC-version dependent, so we force all blocks on for now @@ -248,8 +248,7 @@ void RADEONEngineReset(ScrnInfoPtr pScrn) OUTREG(RADEON_CLOCK_CNTL_INDEX, clock_cntl_index); OUTPLL(RADEON_MCLK_CNTL, mclk_cntl); - if (info->ChipFamily == CHIP_FAMILY_R300) - R300CGWorkaround(pScrn); + if (info->R300CGWorkaround) R300CGWorkaround(pScrn); } /* Restore the acceleration hardware to its previous state */ @@ -405,6 +404,48 @@ void RADEONEngineInit(ScrnInfoPtr pScrn) #undef OUT_ACCEL_REG #undef FINISH_ACCEL +/* Stop the CP */ +int RADEONCPStop(ScrnInfoPtr pScrn, RADEONInfoPtr info) +{ + drmRadeonCPStop stop; + int ret, i; + + stop.flush = 1; + stop.idle = 1; + + ret = drmCommandWrite(info->drmFD, DRM_RADEON_CP_STOP, &stop, + sizeof(drmRadeonCPStop)); + + if (ret == 0) { + return 0; + } else if (errno != EBUSY) { + return -errno; + } + + stop.flush = 0; + + i = 0; + do { + ret = drmCommandWrite(info->drmFD, DRM_RADEON_CP_STOP, &stop, + sizeof(drmRadeonCPStop)); + } while (ret && errno == EBUSY && i++ < RADEON_IDLE_RETRY); + + if (ret == 0) { + return 0; + } else if (errno != EBUSY) { + return -errno; + } + + stop.idle = 0; + + if (drmCommandWrite(info->drmFD, DRM_RADEON_CP_STOP, + &stop, sizeof(drmRadeonCPStop))) { + return -errno; + } else { + return 0; + } +} + /* Get an indirect buffer for the CP 2D acceleration commands */ drmBufPtr RADEONCPGetBuffer(ScrnInfoPtr pScrn) { @@ -472,9 +513,10 @@ drmBufPtr RADEONCPGetBuffer(ScrnInfoPtr pScrn) /* Flush the indirect buffer to the kernel for submission to the card */ void RADEONCPFlushIndirect(ScrnInfoPtr pScrn, int discard) { - RADEONInfoPtr info = RADEONPTR(pScrn); - drmBufPtr buffer = info->indirectBuffer; - int start = info->indirectStart; + RADEONInfoPtr info = RADEONPTR(pScrn); + drmBufPtr buffer = info->indirectBuffer; + int start = info->indirectStart; + drmRadeonIndirect indirect; if (!buffer) return; if (start == buffer->used && !discard) return; @@ -483,8 +525,14 @@ void RADEONCPFlushIndirect(ScrnInfoPtr pScrn, int discard) xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Flushing buffer %d\n", buffer->idx); } - drmRadeonFlushIndirectBuffer(info->drmFD, buffer->idx, - start, buffer->used, discard); + + indirect.idx = buffer->idx; + indirect.start = start; + indirect.end = buffer->used; + indirect.discard = discard; + + drmCommandWriteRead(info->drmFD, DRM_RADEON_INDIRECT, + &indirect, sizeof(drmRadeonIndirect)); if (discard) { info->indirectBuffer = RADEONCPGetBuffer(pScrn); @@ -502,9 +550,10 @@ void RADEONCPFlushIndirect(ScrnInfoPtr pScrn, int discard) /* Flush and release the indirect buffer */ void RADEONCPReleaseIndirect(ScrnInfoPtr pScrn) { - RADEONInfoPtr info = RADEONPTR(pScrn); - drmBufPtr buffer = info->indirectBuffer; - int start = info->indirectStart; + RADEONInfoPtr info = RADEONPTR(pScrn); + drmBufPtr buffer = info->indirectBuffer; + int start = info->indirectStart; + drmRadeonIndirect indirect; info->indirectBuffer = NULL; info->indirectStart = 0; @@ -515,8 +564,14 @@ void RADEONCPReleaseIndirect(ScrnInfoPtr pScrn) xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Releasing buffer %d\n", buffer->idx); } - drmRadeonFlushIndirectBuffer(info->drmFD, buffer->idx, - start, buffer->used, 1); + + indirect.idx = buffer->idx; + indirect.start = start; + indirect.end = buffer->used; + indirect.discard = 1; + + drmCommandWriteRead(info->drmFD, DRM_RADEON_INDIRECT, + &indirect, sizeof(drmRadeonIndirect)); } #endif diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_accelfuncs.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_accelfuncs.c index 76200ecee..06dcfd63e 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_accelfuncs.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_accelfuncs.c @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_accelfuncs.c,v 1.1 2002/09/18 18:14:58 martin Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_accelfuncs.c,v 1.6 2003/01/29 18:06:06 martin Exp $ */ /* * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and * VA Linux Systems Inc., Fremont, California. @@ -31,7 +31,7 @@ * Authors: * Kevin E. Martin <martin@xfree86.org> * Rickard E. Faith <faith@valinux.com> - * Alan Hourihane <ahourihane@valinux.com> + * Alan Hourihane <alanh@fairlite.demon.co.uk> * Michel Dänzer <michel@daenzer.net> * * Credits: @@ -106,16 +106,43 @@ void FUNC_NAME(RADEONWaitForIdle)(ScrnInfoPtr pScrn) { RADEONInfoPtr info = RADEONPTR(pScrn); + unsigned char *RADEONMMIO = info->MMIO; int i = 0; -#ifdef ACCEL_MMIO - - unsigned char *RADEONMMIO = info->MMIO; +#ifdef ACCEL_CP + /* Make sure the CP is idle first */ + if (info->CPStarted) { + int ret; + FLUSH_RING(); + + for (;;) { + do { + ret = drmCommandNone(info->drmFD, DRM_RADEON_CP_IDLE); + if (ret && ret != -EBUSY) { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "%s: CP idle %d\n", __FUNCTION__, ret); + } + } while ((ret == -EBUSY) && (i++ < RADEON_TIMEOUT)); + + if (ret == 0) return; + + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "Idle timed out, resetting engine...\n"); + RADEONEngineReset(pScrn); + RADEONEngineRestore(pScrn); + + /* Always restart the engine when doing CP 2D acceleration */ + RADEONCP_RESET(pScrn, info); + RADEONCP_START(pScrn, info); + } + } +#endif RADEONTRACE(("WaitForIdle (entering): %d entries, stat=0x%08x\n", INREG(RADEON_RBBM_STATUS) & RADEON_RBBM_FIFOCNT_MASK, INREG(RADEON_RBBM_STATUS))); + /* Wait for the engine to go idle */ RADEONWaitForFifoFunction(pScrn, 64); for (;;) { @@ -139,35 +166,6 @@ FUNC_NAME(RADEONWaitForIdle)(ScrnInfoPtr pScrn) } #endif } - -#else /* ACCEL_CP */ - - int ret; - - FLUSH_RING(); - - for (;;) { - do { - ret = drmRadeonWaitForIdleCP(info->drmFD); - if (ret && ret != -EBUSY) { - xf86DrvMsg(pScrn->scrnIndex, X_ERROR, - "%s: CP idle %d\n", __FUNCTION__, ret); - } - } while ((ret == -EBUSY) && (i++ < RADEON_TIMEOUT)); - - if (ret == 0) return; - - xf86DrvMsg(pScrn->scrnIndex, X_ERROR, - "Idle timed out, resetting engine...\n"); - RADEONEngineReset(pScrn); - RADEONEngineRestore(pScrn); - - /* Always restart the engine when doing CP 2D acceleration */ - RADEONCP_RESET(pScrn, info); - RADEONCP_START(pScrn, info); - } - -#endif } /* This callback is required for multiheader cards using XAA */ @@ -280,6 +278,12 @@ FUNC_NAME(RADEONSetupForSolidLine)(ScrnInfoPtr pScrn, | RADEON_GMC_SRC_DATATYPE_COLOR | RADEON_ROP[rop].pattern); + if (info->ChipFamily >= CHIP_FAMILY_RV200) { + BEGIN_ACCEL(1); + OUT_ACCEL_REG(RADEON_DST_LINE_PATCOUNT, + 0x55 << RADEON_BRES_CNTL_SHIFT); + } + BEGIN_ACCEL(3); OUT_ACCEL_REG(RADEON_DP_GUI_MASTER_CNTL, info->dp_gui_master_cntl_clip); @@ -578,15 +582,33 @@ FUNC_NAME(RADEONSetupForMono8x8PatternFill)(ScrnInfoPtr pScrn, unsigned int planemask) { RADEONInfoPtr info = RADEONPTR(pScrn); +#if X_BYTE_ORDER == X_BIG_ENDIAN + unsigned char pattern[8]; +#endif ACCEL_PREAMBLE(); +#if X_BYTE_ORDER == X_BIG_ENDIAN + /* Take care of endianness */ + pattern[0] = (patternx & 0x000000ff); + pattern[1] = (patternx & 0x0000ff00) >> 8; + pattern[2] = (patternx & 0x00ff0000) >> 16; + pattern[3] = (patternx & 0xff000000) >> 24; + pattern[4] = (patterny & 0x000000ff); + pattern[5] = (patterny & 0x0000ff00) >> 8; + pattern[6] = (patterny & 0x00ff0000) >> 16; + pattern[7] = (patterny & 0xff000000) >> 24; +#endif + /* Save for later clipping */ info->dp_gui_master_cntl_clip = (info->dp_gui_master_cntl | (bg == -1 ? RADEON_GMC_BRUSH_8X8_MONO_FG_LA : RADEON_GMC_BRUSH_8X8_MONO_FG_BG) | RADEON_ROP[rop].pattern - | RADEON_GMC_BYTE_MSB_TO_LSB); +#if X_BYTE_ORDER == X_LITTLE_ENDIAN + | RADEON_GMC_BYTE_MSB_TO_LSB +#endif + ); BEGIN_ACCEL((bg == -1) ? 5 : 6); @@ -595,8 +617,13 @@ FUNC_NAME(RADEONSetupForMono8x8PatternFill)(ScrnInfoPtr pScrn, OUT_ACCEL_REG(RADEON_DP_BRUSH_FRGD_CLR, fg); if (bg != -1) OUT_ACCEL_REG(RADEON_DP_BRUSH_BKGD_CLR, bg); +#if X_BYTE_ORDER == X_LITTLE_ENDIAN OUT_ACCEL_REG(RADEON_BRUSH_DATA0, patternx); OUT_ACCEL_REG(RADEON_BRUSH_DATA1, patterny); +#else + OUT_ACCEL_REG(RADEON_BRUSH_DATA0, *(CARD32 *)(pointer)&pattern[0]); + OUT_ACCEL_REG(RADEON_BRUSH_DATA1, *(CARD32 *)(pointer)&pattern[4]); +#endif FINISH_ACCEL(); } @@ -778,7 +805,7 @@ FUNC_NAME(RADEONSetupForScanlineCPUToScreenColorExpandFill)(ScrnInfoPtr pScrn, #else BEGIN_ACCEL(2); - OUT_ACCEL_REG(RADEON_RBBM_GUICNTL, RADEON_HOST_DATA_SWAP_NONE); + OUT_ACCEL_REG(RADEON_RBBM_GUICNTL, RADEON_HOST_DATA_SWAP_32BIT); #endif OUT_ACCEL_REG(RADEON_DP_WRITE_MASK, planemask); @@ -1187,8 +1214,16 @@ FUNC_NAME(RADEONAccelInit)(ScreenPtr pScreen, XAAInfoRecPtr a) = FUNC_NAME(RADEONSubsequentMono8x8PatternFillRect); a->Mono8x8PatternFillFlags = (HARDWARE_PATTERN_PROGRAMMED_BITS | HARDWARE_PATTERN_PROGRAMMED_ORIGIN - | HARDWARE_PATTERN_SCREEN_ORIGIN - | BIT_ORDER_IN_BYTE_LSBFIRST); + | HARDWARE_PATTERN_SCREEN_ORIGIN); + +#if X_BYTE_ORDER == X_LITTLE_ENDIAN + if (info->ChipFamily >= CHIP_FAMILY_RV200) + a->Mono8x8PatternFillFlags |= BIT_ORDER_IN_BYTE_MSBFIRST; + else + a->Mono8x8PatternFillFlags |= BIT_ORDER_IN_BYTE_LSBFIRST; +#else + a->Mono8x8PatternFillFlags |= BIT_ORDER_IN_BYTE_LSBFIRST; +#endif /* Indirect CPU-To-Screen Color Expand */ @@ -1216,6 +1251,10 @@ FUNC_NAME(RADEONAccelInit)(ScreenPtr pScreen, XAAInfoRecPtr a) a->SubsequentSolidHorVertLine = FUNC_NAME(RADEONSubsequentSolidHorVertLine); +#ifdef XFree86LOADER + if (info->xaaReq.minorversion >= 1) { +#endif + /* RADEON only supports 14 bits for lines and clipping and only * draws lines that are completely on-screen correctly. This will * cause display corruption problem in the cases when out-of-range @@ -1237,21 +1276,30 @@ FUNC_NAME(RADEONAccelInit)(ScreenPtr pScreen, XAAInfoRecPtr a) a->SubsequentSolidTwoPointLine = FUNC_NAME(RADEONSubsequentSolidTwoPointLine); - /* Disabled because it does not pass XTest */ - a->SetupForDashedLine - = FUNC_NAME(RADEONSetupForDashedLine); - a->SubsequentDashedTwoPointLine - = FUNC_NAME(RADEONSubsequentDashedTwoPointLine); - a->DashPatternMaxLength = 32; - /* ROP3 doesn't seem to work properly for dashedline with GXinvert */ - a->DashedLineFlags = (LINE_PATTERN_LSBFIRST_LSBJUSTIFIED + /* Disabled on RV200 and newer because it does not pass XTest */ + if (info->ChipFamily < CHIP_FAMILY_RV200) { + a->SetupForDashedLine + = FUNC_NAME(RADEONSetupForDashedLine); + a->SubsequentDashedTwoPointLine + = FUNC_NAME(RADEONSubsequentDashedTwoPointLine); + a->DashPatternMaxLength = 32; + /* ROP3 doesn't seem to work properly for dashedline with GXinvert */ + a->DashedLineFlags = (LINE_PATTERN_LSBFIRST_LSBJUSTIFIED | LINE_PATTERN_POWER_OF_2_ONLY | LINE_LIMIT_COORDS | ROP_NEEDS_SOURCE); - a->DashedLineLimits.x1 = 0; - a->DashedLineLimits.y1 = 0; - a->DashedLineLimits.x2 = pScrn->virtualX-1; - a->DashedLineLimits.y2 = pScrn->virtualY-1; + a->DashedLineLimits.x1 = 0; + a->DashedLineLimits.y1 = 0; + a->DashedLineLimits.x2 = pScrn->virtualX-1; + a->DashedLineLimits.y2 = pScrn->virtualY-1; + } + +#ifdef XFree86LOADER + } else { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, + "libxaa too old, can't accelerate TwoPoint lines\n"); + } +#endif /* Clipping, note that without this, all line accelerations will * not be called diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_cursor.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_cursor.c index 284411972..868703d96 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_cursor.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_cursor.c @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_cursor.c,v 1.15 2002/10/12 01:38:07 martin Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_cursor.c,v 1.23 2003/02/24 20:34:55 tsi Exp $ */ /* * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and * VA Linux Systems Inc., Fremont, California. @@ -46,45 +46,84 @@ /* Driver data structures */ #include "radeon.h" +#include "radeon_macros.h" #include "radeon_reg.h" /* X and server generic header files */ #include "xf86.h" +/* Mono ARGB cursor colours (premultiplied). */ +static CARD32 mono_cursor_color[] = { + 0x00000000, /* White, fully transparent. */ + 0x00000000, /* Black, fully transparent. */ + 0xffffffff, /* White, fully opaque. */ + 0xff000000, /* Black, fully opaque. */ +}; + +#define CURSOR_WIDTH 64 +#define CURSOR_HEIGHT 64 + +/* + * The cursor bits are always 32bpp. On MSBFirst busses, + * configure byte swapping to swap 32 bit units when writing + * the cursor image. Byte swapping must always be returned + * to its previous value before returning. + */ #if X_BYTE_ORDER == X_BIG_ENDIAN -#define P_SWAP32(a, b) \ -do { \ - ((char *)a)[0] = ((char *)b)[3]; \ - ((char *)a)[1] = ((char *)b)[2]; \ - ((char *)a)[2] = ((char *)b)[1]; \ - ((char *)a)[3] = ((char *)b)[0]; \ -} while (0) - -#define P_SWAP16(a, b) \ -do { \ - ((char *)a)[0] = ((char *)b)[1]; \ - ((char *)a)[1] = ((char *)b)[0]; \ - ((char *)a)[2] = ((char *)b)[3]; \ - ((char *)a)[3] = ((char *)b)[2]; \ -} while (0) -#endif +#define CURSOR_SWAPPING_DECL_MMIO unsigned char *RADEONMMIO = info->MMIO; +#define CURSOR_SWAPPING_DECL CARD32 __surface_cntl; +#define CURSOR_SWAPPING_START() \ + OUTREG(RADEON_SURFACE_CNTL, \ + ((__surface_cntl = INREG(RADEON_SURFACE_CNTL)) | \ + RADEON_NONSURF_AP0_SWP_32BPP) & \ + ~RADEON_NONSURF_AP0_SWP_16BPP) +#define CURSOR_SWAPPING_END() (OUTREG(RADEON_SURFACE_CNTL, __surface_cntl)) + +#else + +#define CURSOR_SWAPPING_DECL_MMIO +#define CURSOR_SWAPPING_DECL +#define CURSOR_SWAPPING_START() +#define CURSOR_SWAPPING_END() + +#endif /* Set cursor foreground and background colors */ static void RADEONSetCursorColors(ScrnInfoPtr pScrn, int bg, int fg) { RADEONInfoPtr info = RADEONPTR(pScrn); - unsigned char *RADEONMMIO = info->MMIO; - - if (info->IsSecondary || info->Clone) { - OUTREG(RADEON_CUR2_CLR0, bg); - OUTREG(RADEON_CUR2_CLR1, fg); - } - - if (!info->IsSecondary) { - OUTREG(RADEON_CUR_CLR0, bg); - OUTREG(RADEON_CUR_CLR1, fg); - } + CARD32 *pixels = (CARD32 *)(pointer)(info->FB + info->cursor_start); + int pixel, i; + CURSOR_SWAPPING_DECL_MMIO + CURSOR_SWAPPING_DECL + +#ifdef ARGB_CURSOR + /* Don't recolour cursors set with SetCursorARGB. */ + if (info->cursor_argb) + return; +#endif + + fg |= 0xff000000; + bg |= 0xff000000; + + /* Don't recolour the image if we don't have to. */ + if (fg == info->cursor_fg && bg == info->cursor_bg) + return; + + CURSOR_SWAPPING_START(); + + /* Note: We assume that the pixels are either fully opaque or fully + * transparent, so we won't premultiply them, and we can just + * check for non-zero pixel values; those are either fg or bg + */ + for (i = 0; i < CURSOR_WIDTH * CURSOR_HEIGHT; i++, pixels++) + if ((pixel = *pixels)) + *pixels = (pixel == info->cursor_fg) ? fg : bg; + + CURSOR_SWAPPING_END(); + info->cursor_fg = fg; + info->cursor_bg = bg; } @@ -101,6 +140,7 @@ static void RADEONSetCursorPosition(ScrnInfoPtr pScrn, int x, int y) int total_y = pScrn->frameY1 - pScrn->frameY0; int X2 = pScrn->frameX0 + x; int Y2 = pScrn->frameY0 + y; + int stride = 256; if (x < 0) xorigin = -x+1; if (y < 0) yorigin = -y+1; @@ -154,7 +194,7 @@ static void RADEONSetCursorPosition(ScrnInfoPtr pScrn, int x, int y) if ((X0 >= 0 || Y0 >= 0) && ((info->CloneFrameX0 != X0) || (info->CloneFrameY0 != Y0))) { - pScrn->AdjustFrame(pScrn->scrnIndex, X0, Y0, 1); + RADEONDoAdjustFrame(pScrn, X0, Y0, TRUE); info->CloneFrameX0 = X0; info->CloneFrameY0 = Y0; } @@ -167,7 +207,7 @@ static void RADEONSetCursorPosition(ScrnInfoPtr pScrn, int x, int y) OUTREG(RADEON_CUR_HORZ_VERT_POSN, (RADEON_CUR_LOCK | ((xorigin ? 0 : x) << 16) | (yorigin ? 0 : y))); - OUTREG(RADEON_CUR_OFFSET, info->cursor_start + yorigin * 16); + OUTREG(RADEON_CUR_OFFSET, info->cursor_start + yorigin * stride); } else { OUTREG(RADEON_CUR2_HORZ_VERT_OFF, (RADEON_CUR2_LOCK | (xorigin << 16) @@ -176,7 +216,7 @@ static void RADEONSetCursorPosition(ScrnInfoPtr pScrn, int x, int y) | ((xorigin ? 0 : x) << 16) | (yorigin ? 0 : y))); OUTREG(RADEON_CUR2_OFFSET, - info->cursor_start + pScrn->fbOffset + yorigin * 16); + info->cursor_start + pScrn->fbOffset + yorigin * stride); } if (info->Clone) { @@ -194,7 +234,7 @@ static void RADEONSetCursorPosition(ScrnInfoPtr pScrn, int x, int y) | ((xorigin ? 0 : X2) << 16) | (yorigin ? 0 : Y2))); OUTREG(RADEON_CUR2_OFFSET, - info->cursor_start + pScrn->fbOffset + yorigin * 16); + info->cursor_start + pScrn->fbOffset + yorigin * stride); } } @@ -205,80 +245,56 @@ static void RADEONLoadCursorImage(ScrnInfoPtr pScrn, unsigned char *image) { RADEONInfoPtr info = RADEONPTR(pScrn); unsigned char *RADEONMMIO = info->MMIO; - CARD32 *s = (CARD32 *)(pointer)image; + CARD8 *s = (CARD8 *)(pointer)image; CARD32 *d = (CARD32 *)(pointer)(info->FB + info->cursor_start); - int y; CARD32 save1 = 0; CARD32 save2 = 0; + CARD8 chunk; + CARD32 i, j; + CURSOR_SWAPPING_DECL if (!info->IsSecondary) { - save1 = INREG(RADEON_CRTC_GEN_CNTL); + save1 = INREG(RADEON_CRTC_GEN_CNTL) & ~(CARD32) (3 << 20); + save1 |= (CARD32) (2 << 20); OUTREG(RADEON_CRTC_GEN_CNTL, save1 & (CARD32)~RADEON_CRTC_CUR_EN); } if (info->IsSecondary || info->Clone) { - save2 = INREG(RADEON_CRTC2_GEN_CNTL); + save2 = INREG(RADEON_CRTC2_GEN_CNTL) & ~(CARD32) (3 << 20); + save2 |= (CARD32) (2 << 20); OUTREG(RADEON_CRTC2_GEN_CNTL, save2 & (CARD32)~RADEON_CRTC2_CUR_EN); } -#if X_BYTE_ORDER == X_BIG_ENDIAN - switch(info->CurrentLayout.pixel_bytes) { - case 4: - case 3: - for (y = 0; y < 64; y++) { - P_SWAP32(d,s); - d++; s++; - P_SWAP32(d,s); - d++; s++; - P_SWAP32(d,s); - d++; s++; - P_SWAP32(d,s); - d++; s++; - } - break; - case 2: - for (y = 0; y < 64; y++) { - P_SWAP16(d,s); - d++; s++; - P_SWAP16(d,s); - d++; s++; - P_SWAP16(d,s); - d++; s++; - P_SWAP16(d,s); - d++; s++; - } - break; - default: - for (y = 0; y < 64; y++) { - *d++ = *s++; - *d++ = *s++; - *d++ = *s++; - *d++ = *s++; - } - } -#else - for (y = 0; y < 64; y++) { - *d++ = *s++; - *d++ = *s++; - *d++ = *s++; - *d++ = *s++; - } +#ifdef ARGB_CURSOR + info->cursor_argb = FALSE; #endif - /* Set the area after the cursor to be all transparent so that we - won't display corrupted cursors on the screen */ - for (y = 0; y < 64; y++) { - *d++ = 0xffffffff; /* The AND bits */ - *d++ = 0xffffffff; - *d++ = 0x00000000; /* The XOR bits */ - *d++ = 0x00000000; + /* + * Convert the bitmap to ARGB32. + * + * HARDWARE_CURSOR_SOURCE_MASK_INTERLEAVE_1 always places + * source in the low bit of the pair and mask in the high bit, + * and MSBFirst machines set HARDWARE_CURSOR_BIT_ORDER_MSBFIRST + * (which actually bit swaps the image) to make the bits LSBFirst + */ + CURSOR_SWAPPING_START(); +#define ARGB_PER_CHUNK (8 * sizeof (chunk) / 2) + for (i = 0; i < CURSOR_WIDTH * CURSOR_HEIGHT / ARGB_PER_CHUNK; i++) { + chunk = *s++; + for (j = 0; j < ARGB_PER_CHUNK; j++, chunk >>= 2) + *d++ = mono_cursor_color[chunk & 3]; } + CURSOR_SWAPPING_END(); + + info->cursor_bg = mono_cursor_color[2]; + info->cursor_fg = mono_cursor_color[3]; if (!info->IsSecondary) OUTREG(RADEON_CRTC_GEN_CNTL, save1); if (info->IsSecondary || info->Clone) OUTREG(RADEON_CRTC2_GEN_CNTL, save2); + } /* Hide hardware cursor. */ @@ -318,6 +334,87 @@ static Bool RADEONUseHWCursor(ScreenPtr pScreen, CursorPtr pCurs) return info->cursor_start ? TRUE : FALSE; } +#ifdef ARGB_CURSOR +#include "cursorstr.h" + +static Bool RADEONUseHWCursorARGB (ScreenPtr pScreen, CursorPtr pCurs) +{ + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + RADEONInfoPtr info = RADEONPTR(pScrn); + + if (info->cursor_start && + pCurs->bits->height <= CURSOR_HEIGHT && pCurs->bits->width <= CURSOR_WIDTH) + return TRUE; + return FALSE; +} + +static void RADEONLoadCursorARGB (ScrnInfoPtr pScrn, CursorPtr pCurs) +{ + RADEONInfoPtr info = RADEONPTR(pScrn); + unsigned char *RADEONMMIO = info->MMIO; + CARD32 *d = (CARD32 *)(pointer)(info->FB + info->cursor_start); + int x, y, w, h; + CARD32 save1 = 0; + CARD32 save2 = 0; + CARD32 *image = pCurs->bits->argb; + CARD32 *i; + CURSOR_SWAPPING_DECL + + if (!image) + return; /* XXX can't happen */ + + if (!info->IsSecondary) { + save1 = INREG(RADEON_CRTC_GEN_CNTL) & ~(CARD32) (3 << 20); + save1 |= (CARD32) (2 << 20); + OUTREG(RADEON_CRTC_GEN_CNTL, save1 & (CARD32)~RADEON_CRTC_CUR_EN); + } + + if (info->IsSecondary || info->Clone) { + save2 = INREG(RADEON_CRTC_GEN_CNTL) & ~(CARD32) (3 << 20); + save2 |= (CARD32) (2 << 20); + OUTREG(RADEON_CRTC2_GEN_CNTL, save2 & (CARD32)~RADEON_CRTC2_CUR_EN); + } + +#ifdef ARGB_CURSOR + info->cursor_argb = TRUE; +#endif + + CURSOR_SWAPPING_START(); + + w = pCurs->bits->width; + if (w > CURSOR_WIDTH) + w = CURSOR_WIDTH; + h = pCurs->bits->height; + if (h > CURSOR_HEIGHT) + h = CURSOR_HEIGHT; + for (y = 0; y < h; y++) + { + i = image; + image += pCurs->bits->width; + for (x = 0; x < w; x++) + *d++ = *i++; + /* pad to the right with transparent */ + for (; x < CURSOR_WIDTH; x++) + *d++ = 0; + } + /* pad below with transparent */ + for (; y < CURSOR_HEIGHT; y++) + for (x = 0; x < CURSOR_WIDTH; x++) + *d++ = 0; + + CURSOR_SWAPPING_END (); + + if (!info->IsSecondary) + OUTREG(RADEON_CRTC_GEN_CNTL, save1); + + if (info->IsSecondary || info->Clone) + OUTREG(RADEON_CRTC2_GEN_CNTL, save2); + +} + +#endif + + /* Initialize hardware cursor support. */ Bool RADEONCursorInit(ScreenPtr pScreen) { @@ -326,23 +423,25 @@ Bool RADEONCursorInit(ScreenPtr pScreen) xf86CursorInfoPtr cursor; FBAreaPtr fbarea; int width; + int width_bytes; int height; - int size; - + int size_bytes; if (!(cursor = info->cursor = xf86CreateCursorInfoRec())) return FALSE; - cursor->MaxWidth = 64; - cursor->MaxHeight = 64; + cursor->MaxWidth = CURSOR_WIDTH; + cursor->MaxHeight = CURSOR_HEIGHT; cursor->Flags = (HARDWARE_CURSOR_TRUECOLOR_AT_8BPP - -#if X_BYTE_ORDER == X_LITTLE_ENDIAN + | HARDWARE_CURSOR_AND_SOURCE_WITH_MASK +#if X_BYTE_ORDER == X_BIG_ENDIAN + /* this is a lie -- + * HARDWARE_CURSOR_BIT_ORDER_MSBFIRST + * actually inverts the bit order, so + * this switches to LSBFIRST + */ | HARDWARE_CURSOR_BIT_ORDER_MSBFIRST #endif - | HARDWARE_CURSOR_INVERT_MASK - | HARDWARE_CURSOR_AND_SOURCE_WITH_MASK - | HARDWARE_CURSOR_SOURCE_MASK_INTERLEAVE_64 - | HARDWARE_CURSOR_SWAP_SOURCE_AND_MASK); + | HARDWARE_CURSOR_SOURCE_MASK_INTERLEAVE_1); cursor->SetCursorColors = RADEONSetCursorColors; cursor->SetCursorPosition = RADEONSetCursorPosition; @@ -351,13 +450,18 @@ Bool RADEONCursorInit(ScreenPtr pScreen) cursor->ShowCursor = RADEONShowCursor; cursor->UseHWCursor = RADEONUseHWCursor; - size = (cursor->MaxWidth/4) * cursor->MaxHeight; +#ifdef ARGB_CURSOR + cursor->UseHWCursorARGB = RADEONUseHWCursorARGB; + cursor->LoadCursorARGB = RADEONLoadCursorARGB; +#endif + size_bytes = CURSOR_WIDTH * 4 * CURSOR_HEIGHT; width = pScrn->displayWidth; - height = (size*2 + 1023) / pScrn->displayWidth; + width_bytes = width * (pScrn->bitsPerPixel / 8); + height = (size_bytes + width_bytes - 1) / width_bytes; fbarea = xf86AllocateOffscreenArea(pScreen, width, height, - 16, + 256, NULL, NULL, NULL); @@ -368,11 +472,11 @@ Bool RADEONCursorInit(ScreenPtr pScreen) "Hardware cursor disabled" " due to insufficient offscreen memory\n"); } else { - info->cursor_start = RADEON_ALIGN((fbarea->box.x1 - + width * fbarea->box.y1) - * info->CurrentLayout.pixel_bytes, - 16); - info->cursor_end = info->cursor_start + size; + info->cursor_start = RADEON_ALIGN((fbarea->box.x1 + + fbarea->box.y1 * width) * + info->CurrentLayout.pixel_bytes, + 256); + info->cursor_end = info->cursor_start + size_bytes; } RADEONTRACE(("RADEONCursorInit (0x%08x-0x%08x)\n", diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dri.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dri.c index 20a3217db..099641a5e 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dri.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dri.c @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dri.c,v 1.19 2002/10/12 01:38:07 martin Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dri.c,v 1.32 2003/02/19 09:17:30 alanh Exp $ */ /* * Copyright 2000 ATI Technologies Inc., Markham, Ontario, * VA Linux Systems Inc., Fremont, California. @@ -38,6 +38,7 @@ /* Driver data structures */ #include "radeon.h" +#include "radeon_macros.h" #include "radeon_dri.h" #include "radeon_reg.h" #include "radeon_version.h" @@ -47,18 +48,14 @@ #include "windowstr.h" #include "xf86PciInfo.h" + +#include "shadowfb.h" /* GLX/DRI/DRM definitions */ #define _XF86DRI_SERVER_ #include "GL/glxtokens.h" #include "sarea.h" #include "radeon_sarea.h" -#if defined(__alpha__) -# define PCIGART_ENABLED -#else -# undef PCIGART_ENABLED -#endif - /* HACK - for now, put this here... */ /* Alpha - this may need to be a variable to handle UP1x00 vs TITAN */ #if defined(__alpha__) @@ -69,6 +66,16 @@ # define DRM_PAGE_SIZE 4096 #endif + +static Bool RADEONDRICloseFullScreen(ScreenPtr pScreen); +static Bool RADEONDRIOpenFullScreen(ScreenPtr pScreen); +static void RADEONDRITransitionTo2d(ScreenPtr pScreen); +static void RADEONDRITransitionTo3d(ScreenPtr pScreen); +static void RADEONDRITransitionMultiToSingle3d(ScreenPtr pScreen); +static void RADEONDRITransitionSingleToMulti3d(ScreenPtr pScreen); + +static void RADEONDRIRefreshArea(ScrnInfoPtr pScrn, int num, BoxPtr pbox); + /* Initialize the visual configs that are supported by the hardware. * These are combined with the visual configs that the indirect * rendering core supports, and the intersection is exported to the @@ -82,7 +89,9 @@ static Bool RADEONInitVisualConfigs(ScreenPtr pScreen) __GLXvisualConfig *pConfigs = 0; RADEONConfigPrivPtr pRADEONConfigs = 0; RADEONConfigPrivPtr *pRADEONConfigPtrs = 0; - int i, accum, stencil; + int i, accum, stencil, db, use_db; + + use_db = !info->noBackBuffer ? 1 : 0; switch (info->CurrentLayout.pixel_code) { case 8: /* 8bpp mode is not support */ @@ -101,6 +110,7 @@ static Bool RADEONInitVisualConfigs(ScreenPtr pScreen) numConfigs = 1; if (RADEON_USE_ACCUM) numConfigs *= 2; if (RADEON_USE_STENCIL) numConfigs *= 2; + if (use_db) numConfigs *= 2; if (!(pConfigs = (__GLXvisualConfig *)xcalloc(sizeof(__GLXvisualConfig), @@ -122,7 +132,8 @@ static Bool RADEONInitVisualConfigs(ScreenPtr pScreen) } i = 0; - for (accum = 0; accum <= RADEON_USE_ACCUM; accum++) { + for (db = 0; db <= use_db; db++) { + for (accum = 0; accum <= RADEON_USE_ACCUM; accum++) { for (stencil = 0; stencil <= RADEON_USE_STENCIL; stencil++) { pRADEONConfigPtrs[i] = &pRADEONConfigs[i]; @@ -148,7 +159,10 @@ static Bool RADEONInitVisualConfigs(ScreenPtr pScreen) pConfigs[i].accumBlueSize = 0; pConfigs[i].accumAlphaSize = 0; } - pConfigs[i].doubleBuffer = TRUE; + if (db) + pConfigs[i].doubleBuffer = TRUE; + else + pConfigs[i].doubleBuffer = FALSE; pConfigs[i].stereo = FALSE; pConfigs[i].bufferSize = 16; pConfigs[i].depthSize = 16; @@ -171,6 +185,7 @@ static Bool RADEONInitVisualConfigs(ScreenPtr pScreen) pConfigs[i].transparentIndex = 0; i++; } + } } break; @@ -178,6 +193,7 @@ static Bool RADEONInitVisualConfigs(ScreenPtr pScreen) numConfigs = 1; if (RADEON_USE_ACCUM) numConfigs *= 2; if (RADEON_USE_STENCIL) numConfigs *= 2; + if (use_db) numConfigs *= 2; if (!(pConfigs = (__GLXvisualConfig *)xcalloc(sizeof(__GLXvisualConfig), @@ -199,7 +215,8 @@ static Bool RADEONInitVisualConfigs(ScreenPtr pScreen) } i = 0; - for (accum = 0; accum <= RADEON_USE_ACCUM; accum++) { + for (db = 0; db <= use_db; db++) { + for (accum = 0; accum <= RADEON_USE_ACCUM; accum++) { for (stencil = 0; stencil <= RADEON_USE_STENCIL; stencil++) { pRADEONConfigPtrs[i] = &pRADEONConfigs[i]; @@ -225,9 +242,12 @@ static Bool RADEONInitVisualConfigs(ScreenPtr pScreen) pConfigs[i].accumBlueSize = 0; pConfigs[i].accumAlphaSize = 0; } - pConfigs[i].doubleBuffer = TRUE; + if (db) + pConfigs[i].doubleBuffer = TRUE; + else + pConfigs[i].doubleBuffer = FALSE; pConfigs[i].stereo = FALSE; - pConfigs[i].bufferSize = 24; + pConfigs[i].bufferSize = 32; if (stencil) { pConfigs[i].depthSize = 24; pConfigs[i].stencilSize = 8; @@ -250,6 +270,7 @@ static Bool RADEONInitVisualConfigs(ScreenPtr pScreen) pConfigs[i].transparentIndex = 0; i++; } + } } break; } @@ -494,86 +515,9 @@ static void RADEONScreenToScreenCopyDepth(ScrnInfoPtr pScrn, /* Initialize the state of the back and depth buffers */ static void RADEONDRIInitBuffers(WindowPtr pWin, RegionPtr prgn, CARD32 indx) { - /* FIXME: This routine needs to have acceleration turned on */ - ScreenPtr pScreen = pWin->drawable.pScreen; - ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; - RADEONInfoPtr info = RADEONPTR(pScrn); - RADEONSAREAPrivPtr pSAREAPriv; - BoxPtr pbox; - int nbox; - unsigned int color, depth, stencil; - unsigned int color_mask, depth_mask, flags; - - /* FIXME: This should be based on the __GLXvisualConfig info */ - color = 0; - switch (pScrn->bitsPerPixel) { - case 16: - depth = 0x0000ffff; - color_mask = 0x0000ffff; - depth_mask = 0xffffffff; - stencil = 0x00000000; - flags = RADEON_BACK | RADEON_DEPTH; - break; - - case 32: - depth = 0x00ffffff; - color_mask = 0xffffffff; - depth_mask = 0x00ffffff; - stencil = 0xff000000; - flags = RADEON_BACK | RADEON_DEPTH /* | RADEON_STENCIL */; - break; - - default: - return; - } - - /* FIXME: Copy XAAPaintWindow() and use REGION_TRANSLATE() */ - - /* FIXME: Only initialize the back and depth buffers for contexts - * that request them - */ - - FLUSH_RING(); - - pSAREAPriv = (RADEONSAREAPrivPtr)DRIGetSAREAPrivate(pScreen); - - pbox = REGION_RECTS(prgn); - nbox = REGION_NUM_RECTS(prgn); - - for (; nbox; nbox--, pbox++) { - int ret; - - /* drmRadeonClear uses the clip rects to draw instead of the - * rect passed to it; however, it uses the rect for the depth - * clears - */ - pSAREAPriv->boxes[0].x1 = pbox->x1; - pSAREAPriv->boxes[0].x2 = pbox->x2; - pSAREAPriv->boxes[0].y1 = pbox->y1; - pSAREAPriv->boxes[0].y2 = pbox->y2; - pSAREAPriv->nbox = 1; - - ret = drmRadeonClear(info->drmFD, - flags, - color, depth, color_mask, depth_mask, - pSAREAPriv->boxes, pSAREAPriv->nbox); - if (ret) { - xf86DrvMsg(pScrn->scrnIndex, X_ERROR, - "[dri] DRIInitBuffers timed out, " - "resetting engine...\n"); - RADEONEngineReset(pScrn); - RADEONEngineRestore(pScrn); - RADEONCP_RESET(pScrn, info); - RADEONCP_START(pScrn, info); - return; - } - } - - /* Mark the X server as the last context owner */ - pSAREAPriv->ctxOwner = DRIGetContext(pScreen); - - RADEONSelectBuffer(pScrn, RADEON_FRONT); - info->accel->NeedToSync = TRUE; + /* NOOP. There's no need for the 2d driver to be clearing buffers + * for the 3d client. It knows how to do that on its own. + */ } /* Copy the back and depth buffers when the X server moves a window. @@ -720,13 +664,14 @@ static void RADEONDRIMoveBuffers(WindowPtr pParent, DDXPointRec ptOldOrg, xa, ya, destx, desty, w, h); - RADEONSelectBuffer(pScrn, RADEON_DEPTH); - if (info->depthMoves) + if (info->depthMoves) { + RADEONSelectBuffer(pScrn, RADEON_DEPTH); RADEONScreenToScreenCopyDepth(pScrn, xa, ya, destx, desty, w, h); + } } RADEONSelectBuffer(pScrn, RADEON_FRONT); @@ -747,6 +692,7 @@ static Bool RADEONDRIAgpInit(RADEONInfoPtr info, ScreenPtr pScreen) unsigned char *RADEONMMIO = info->MMIO; unsigned long mode; unsigned int vendor, device; + unsigned long agpBase; int ret; int s, l; @@ -757,7 +703,7 @@ static Bool RADEONDRIAgpInit(RADEONInfoPtr info, ScreenPtr pScreen) /* Workaround for some hardware bugs */ if (info->ChipFamily < CHIP_FAMILY_R200) - OUTREG(RADEON_AGP_CNTL, INREG(RADEON_AGP_CNTL) | 0x000e0020); + OUTREG(RADEON_AGP_CNTL, INREG(RADEON_AGP_CNTL) | 0x000e0000); /* Modify the mode if the default mode * is not appropriate for this @@ -776,6 +722,8 @@ static Bool RADEONDRIAgpInit(RADEONInfoPtr info, ScreenPtr pScreen) case 1: default: mode |= RADEON_AGP_1X_MODE; } + if (info->agpFastWrite) mode |= RADEON_AGP_FW_MODE; + if ((vendor == PCI_VENDOR_AMD) && (device == PCI_CHIP_AMD761)) { /* The combination of 761 with MOBILITY chips will lockup the @@ -783,8 +731,7 @@ static Bool RADEONDRIAgpInit(RADEONInfoPtr info, ScreenPtr pScreen) * market, so this is not yet a problem. */ if ((info->ChipFamily == CHIP_FAMILY_M6) || - (info->ChipFamily == CHIP_FAMILY_M7) || - (info->ChipFamily == CHIP_FAMILY_M9)) + (info->ChipFamily == CHIP_FAMILY_M7)) return FALSE; /* Disable fast write for AMD 761 chipset, since they cause @@ -924,13 +871,13 @@ static Bool RADEONDRIAgpInit(RADEONInfoPtr info, ScreenPtr pScreen) (unsigned long)info->agpTex); /* Initialize Radeon's AGP registers */ - /* Ring buffer is at AGP offset 0 */ - OUTREG(RADEON_AGP_BASE, info->ringHandle); + + agpBase = drmAgpBase(info->drmFD); + OUTREG(RADEON_AGP_BASE, agpBase); return TRUE; } -#if defined(PCIGART_ENABLED) /* Initialize the PCIGART state. Request memory for use in PCI space, * and initialize the Radeon registers to point to that memory. */ @@ -984,7 +931,7 @@ static Bool RADEONDRIPciInit(RADEONInfoPtr info, ScreenPtr pScreen) (unsigned long)info->ring); xf86DrvMsg(pScreen->myNum, X_INFO, "[pci] Ring contents 0x%08lx\n", - *(unsigned long *)info->ring); + *(unsigned long *)(pointer)info->ring); if (drmAddMap(info->drmFD, info->ringReadOffset, info->ringReadMapSize, DRM_SCATTER_GATHER, flags, &info->ringReadPtrHandle) < 0) { @@ -1007,7 +954,7 @@ static Bool RADEONDRIPciInit(RADEONInfoPtr info, ScreenPtr pScreen) (unsigned long)info->ringReadPtr); xf86DrvMsg(pScreen->myNum, X_INFO, "[pci] Ring read ptr contents 0x%08lx\n", - *(unsigned long *)info->ringReadPtr); + *(unsigned long *)(pointer)info->ringReadPtr); if (drmAddMap(info->drmFD, info->bufStart, info->bufMapSize, DRM_SCATTER_GATHER, 0, &info->bufHandle) < 0) { @@ -1030,11 +977,10 @@ static Bool RADEONDRIPciInit(RADEONInfoPtr info, ScreenPtr pScreen) (unsigned long)info->buf); xf86DrvMsg(pScreen->myNum, X_INFO, "[pci] Vertex/indirect buffers contents 0x%08lx\n", - *(unsigned long *)info->buf); + *(unsigned long *)(pointer)info->buf); return TRUE; } -#endif /* Add a map for the MMIO registers that will be accessed by any * DRI-based clients. @@ -1060,6 +1006,15 @@ static int RADEONDRIKernelInit(RADEONInfoPtr info, ScreenPtr pScreen) int cpp = info->CurrentLayout.pixel_bytes; drmRadeonInit drmInfo; + memset(&drmInfo, 0, sizeof(drmRadeonInit)); + + if ( (info->ChipFamily == CHIP_FAMILY_R200) || + (info->ChipFamily == CHIP_FAMILY_RV250) || + (info->ChipFamily == CHIP_FAMILY_M9) ) + drmInfo.func = DRM_RADEON_INIT_R200_CP; + else + drmInfo.func = DRM_RADEON_INIT_CP; + drmInfo.sarea_priv_offset = sizeof(XF86DRISAREARec); drmInfo.is_pci = info->IsPCI; drmInfo.cp_mode = info->CPMode; @@ -1077,16 +1032,18 @@ static int RADEONDRIKernelInit(RADEONInfoPtr info, ScreenPtr pScreen) drmInfo.depth_offset = info->depthOffset; drmInfo.depth_pitch = info->depthPitch * cpp; - drmInfo.fb_offset = info->LinearAddr; + drmInfo.fb_offset = info->fbHandle; drmInfo.mmio_offset = info->registerHandle; drmInfo.ring_offset = info->ringHandle; drmInfo.ring_rptr_offset = info->ringReadPtrHandle; drmInfo.buffers_offset = info->bufHandle; drmInfo.agp_textures_offset = info->agpTexHandle; - if (drmRadeonInitCP(info->drmFD, &drmInfo) < 0) return FALSE; + if (drmCommandWrite(info->drmFD, DRM_RADEON_CP_INIT, + &drmInfo, sizeof(drmRadeonInit)) < 0) + return FALSE; - /* drmRadeonInitCP does an engine reset, which resets some engine + /* DRM_RADEON_CP_INIT does an engine reset, which resets some engine * registers back to their default values, so we need to restore * those engine register here. */ @@ -1095,6 +1052,32 @@ static int RADEONDRIKernelInit(RADEONInfoPtr info, ScreenPtr pScreen) return TRUE; } +static void RADEONDRIAgpHeapInit(RADEONInfoPtr info, ScreenPtr pScreen) +{ + drmRadeonMemInitHeap drmHeap; + + /* Start up the simple memory manager for agp space */ + if (info->drmMinor >= 6) { + drmHeap.region = RADEON_MEM_REGION_AGP; + drmHeap.start = 0; + drmHeap.size = info->agpTexMapSize; + + if (drmCommandWrite(info->drmFD, DRM_RADEON_INIT_HEAP, + &drmHeap, sizeof(drmHeap))) { + xf86DrvMsg(pScreen->myNum, X_ERROR, + "[drm] Failed to initialized agp heap manager\n"); + } else { + xf86DrvMsg(pScreen->myNum, X_INFO, + "[drm] Initialized kernel agp heap manager, %d\n", + info->agpTexMapSize); + } + } else { + xf86DrvMsg(pScreen->myNum, X_INFO, + "[drm] Kernel module too old (1.%d) for agp heap manager\n", + info->drmMinor); + } +} + /* Add a map for the vertex buffers that will be accessed by any * DRI-based clients. */ @@ -1102,15 +1085,11 @@ static Bool RADEONDRIBufInit(RADEONInfoPtr info, ScreenPtr pScreen) { /* Initialize vertex buffers */ if (info->IsPCI) { -#if !defined(PCIGART_ENABLED) - return TRUE; -#else info->bufNumBufs = drmAddBufs(info->drmFD, info->bufMapSize / RADEON_BUFFER_SIZE, RADEON_BUFFER_SIZE, DRM_SG_BUFFER, info->bufStart); -#endif } else { info->bufNumBufs = drmAddBufs(info->drmFD, info->bufMapSize / RADEON_BUFFER_SIZE, @@ -1139,6 +1118,36 @@ static Bool RADEONDRIBufInit(RADEONInfoPtr info, ScreenPtr pScreen) return TRUE; } +static void RADEONDRIIrqInit(RADEONInfoPtr info, ScreenPtr pScreen) +{ + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + + if (!info->irq) { + info->irq = drmGetInterruptFromBusID( + info->drmFD, + ((pciConfigPtr)info->PciInfo->thisCard)->busnum, + ((pciConfigPtr)info->PciInfo->thisCard)->devnum, + ((pciConfigPtr)info->PciInfo->thisCard)->funcnum); + + if ((drmCtlInstHandler(info->drmFD, info->irq)) != 0) { + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "[drm] failure adding irq handler, " + "there is a device already using that irq\n" + "[drm] falling back to irq-free operation\n"); + info->irq = 0; + } else { + unsigned char *RADEONMMIO = info->MMIO; + info->ModeReg.gen_int_cntl = INREG( RADEON_GEN_INT_CNTL ); + } + } + + if (info->irq) + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "[drm] dma control initialized, using IRQ %d\n", + info->irq); +} + + /* Initialize the CP state, and start the CP (if used by the X server) */ static void RADEONDRICPInit(ScrnInfoPtr pScrn) { @@ -1152,196 +1161,6 @@ static void RADEONDRICPInit(ScrnInfoPtr pScrn) RADEONSelectBuffer(pScrn, RADEON_FRONT); } -/* Initialize the DRI specific hardware state stored in the SAREA. - * Currently, this involves setting up the 3D hardware state. - */ -static void RADEONDRISAREAInit(ScreenPtr pScreen, - RADEONSAREAPrivPtr pSAREAPriv) -{ - ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; - RADEONInfoPtr info = RADEONPTR(pScrn); - radeon_context_regs_t *ctx; - radeon_texture_regs_t *tex; - CARD32 color_fmt, depth_fmt; - int i; - - switch (info->CurrentLayout.pixel_code) { - case 16: - color_fmt = RADEON_COLOR_FORMAT_RGB565; - depth_fmt = RADEON_DEPTH_FORMAT_16BIT_INT_Z; - break; - - case 32: - color_fmt = RADEON_COLOR_FORMAT_ARGB8888; - depth_fmt = RADEON_DEPTH_FORMAT_24BIT_INT_Z; - break; - - default: - xf86DrvMsg(pScreen->myNum, X_ERROR, - "[dri] RADEONDRISAREAInit failed: Unsupported depth " - "(%d bpp). Disabling DRI.\n", - info->CurrentLayout.pixel_code); - return; - } - - /* Initialize the context state */ - ctx = &pSAREAPriv->ContextState; - - ctx->pp_misc = (RADEON_ALPHA_TEST_PASS | - RADEON_CHROMA_FUNC_FAIL | - RADEON_CHROMA_KEY_NEAREST | - RADEON_SHADOW_FUNC_EQUAL | - RADEON_SHADOW_PASS_1 | - RADEON_RIGHT_HAND_CUBE_OGL); - - ctx->pp_fog_color = ((0x00000000 & RADEON_FOG_COLOR_MASK) | - RADEON_FOG_VERTEX | - RADEON_FOG_USE_DEPTH); - - ctx->re_solid_color = 0x00000000; - - ctx->rb3d_blendcntl = (RADEON_SRC_BLEND_GL_ONE | - RADEON_DST_BLEND_GL_ZERO ); - - ctx->rb3d_depthoffset = info->depthOffset; - - ctx->rb3d_depthpitch = ((info->depthPitch & RADEON_DEPTHPITCH_MASK) | - RADEON_DEPTH_ENDIAN_NO_SWAP); - - ctx->rb3d_zstencilcntl = (depth_fmt | - RADEON_Z_TEST_LESS | - RADEON_STENCIL_TEST_ALWAYS | - RADEON_STENCIL_FAIL_KEEP | - RADEON_STENCIL_ZPASS_KEEP | - RADEON_STENCIL_ZFAIL_KEEP | - RADEON_Z_WRITE_ENABLE); - - ctx->pp_cntl = (RADEON_SCISSOR_ENABLE | - RADEON_ANTI_ALIAS_NONE); - - ctx->rb3d_cntl = (RADEON_PLANE_MASK_ENABLE | - color_fmt | - RADEON_ZBLOCK16); - - ctx->rb3d_coloroffset = (info->backOffset & RADEON_COLOROFFSET_MASK); - - ctx->re_width_height = ((0x7ff << RADEON_RE_WIDTH_SHIFT) | - (0x7ff << RADEON_RE_HEIGHT_SHIFT)); - - ctx->rb3d_colorpitch = ((info->backPitch & RADEON_COLORPITCH_MASK) | - RADEON_COLOR_ENDIAN_NO_SWAP); - - ctx->se_cntl = (RADEON_FFACE_CULL_CW | - RADEON_BFACE_SOLID | - RADEON_FFACE_SOLID | - RADEON_FLAT_SHADE_VTX_LAST | - RADEON_DIFFUSE_SHADE_GOURAUD | - RADEON_ALPHA_SHADE_GOURAUD | - RADEON_SPECULAR_SHADE_GOURAUD | - RADEON_FOG_SHADE_GOURAUD | - RADEON_VPORT_XY_XFORM_ENABLE | - RADEON_VTX_PIX_CENTER_OGL | - RADEON_ROUND_MODE_TRUNC | - RADEON_ROUND_PREC_8TH_PIX); - - ctx->se_coord_fmt = (RADEON_VTX_XY_PRE_MULT_1_OVER_W0 | - RADEON_VTX_Z_PRE_MULT_1_OVER_W0 | - RADEON_TEX1_W_ROUTING_USE_Q1); - - ctx->re_line_pattern = ((0x0000 & RADEON_LINE_PATTERN_MASK) | - (0 << RADEON_LINE_REPEAT_COUNT_SHIFT) | - (0 << RADEON_LINE_PATTERN_START_SHIFT) | - RADEON_LINE_PATTERN_LITTLE_BIT_ORDER); - - ctx->re_line_state = ((0 << RADEON_LINE_CURRENT_PTR_SHIFT) | - (0 << RADEON_LINE_CURRENT_COUNT_SHIFT)); - - ctx->se_line_width = 0x0000000; - - ctx->pp_lum_matrix = 0x00000000; - - ctx->pp_rot_matrix_0 = 0x00000000; - ctx->pp_rot_matrix_1 = 0x00000000; - - ctx->rb3d_stencilrefmask = - (CARD32)((0x000 << RADEON_STENCIL_REF_SHIFT) | - (0x0ff << RADEON_STENCIL_MASK_SHIFT) | - (0x0ff << RADEON_STENCIL_WRITEMASK_SHIFT)); - - ctx->rb3d_ropcntl = 0x00000000; - ctx->rb3d_planemask = 0xffffffff; - - ctx->se_vport_xscale = 0x00000000; - ctx->se_vport_xoffset = 0x00000000; - ctx->se_vport_yscale = 0x00000000; - ctx->se_vport_yoffset = 0x00000000; - ctx->se_vport_zscale = 0x00000000; - ctx->se_vport_zoffset = 0x00000000; - - ctx->se_cntl_status = (RADEON_VC_NO_SWAP | - RADEON_TCL_BYPASS); - -#ifdef TCL_ENABLE - /* FIXME: Obviously these need to be properly initialized */ - ctx->se_tcl_material_emmissive.red = 0x00000000; - ctx->se_tcl_material_emmissive.green = 0x00000000; - ctx->se_tcl_material_emmissive.blue = 0x00000000; - ctx->se_tcl_material_emmissive.alpha = 0x00000000; - - ctx->se_tcl_material_ambient.red = 0x00000000; - ctx->se_tcl_material_ambient.green = 0x00000000; - ctx->se_tcl_material_ambient.blue = 0x00000000; - ctx->se_tcl_material_ambient.alpha = 0x00000000; - - ctx->se_tcl_material_diffuse.red = 0x00000000; - ctx->se_tcl_material_diffuse.green = 0x00000000; - ctx->se_tcl_material_diffuse.blue = 0x00000000; - ctx->se_tcl_material_diffuse.alpha = 0x00000000; - - ctx->se_tcl_material_specular.red = 0x00000000; - ctx->se_tcl_material_specular.green = 0x00000000; - ctx->se_tcl_material_specular.blue = 0x00000000; - ctx->se_tcl_material_specular.alpha = 0x00000000; - - ctx->se_tcl_shininess = 0x00000000; - ctx->se_tcl_output_vtx_fmt = 0x00000000; - ctx->se_tcl_output_vtx_sel = 0x00000000; - ctx->se_tcl_matrix_select_0 = 0x00000000; - ctx->se_tcl_matrix_select_1 = 0x00000000; - ctx->se_tcl_ucp_vert_blend_ctl = 0x00000000; - ctx->se_tcl_texture_proc_ctl = 0x00000000; - ctx->se_tcl_light_model_ctl = 0x00000000; - for ( i = 0 ; i < 4 ; i++ ) { - ctx->se_tcl_per_light_ctl[i] = 0x00000000; - } -#endif - - ctx->re_top_left = ((0 << RADEON_RE_LEFT_SHIFT) | - (0 << RADEON_RE_TOP_SHIFT) ); - - ctx->re_misc = ((0 << RADEON_STIPPLE_X_OFFSET_SHIFT) | - (0 << RADEON_STIPPLE_Y_OFFSET_SHIFT) | - RADEON_STIPPLE_LITTLE_BIT_ORDER); - - /* Initialize the texture state */ - for (i = 0; i < RADEON_MAX_TEXTURE_UNITS; i++) { - tex = &pSAREAPriv->TexState[i]; - - tex->pp_txfilter = 0x00000000; - tex->pp_txformat = 0x00000000; - tex->pp_txoffset = 0x00000000; - tex->pp_txcblend = 0x00000000; - tex->pp_txablend = 0x00000000; - tex->pp_tfactor = 0x00000000; - tex->pp_border_color = 0x00000000; - } - - /* Mark the context as dirty */ - pSAREAPriv->dirty = RADEON_UPLOAD_ALL; - - /* Mark the X server as the last context owner */ - pSAREAPriv->ctxOwner = DRIGetContext(pScreen); -} /* Initialize the screen-specific data structures for the DRI and the * Radeon. This is the main entry point to the device-specific @@ -1406,7 +1225,15 @@ Bool RADEONDRIScreenInit(ScreenPtr pScreen) info->pDRIInfo = pDRIInfo; pDRIInfo->drmDriverName = RADEON_DRIVER_NAME; - pDRIInfo->clientDriverName = RADEON_DRIVER_NAME; + + if (info->ChipFamily == CHIP_FAMILY_R200) + pDRIInfo->clientDriverName = R200_DRIVER_NAME; + else if ((info->ChipFamily == CHIP_FAMILY_RV250) || + (info->ChipFamily == CHIP_FAMILY_M9)) + pDRIInfo->clientDriverName = RV250_DRIVER_NAME; + else + pDRIInfo->clientDriverName = RADEON_DRIVER_NAME; + pDRIInfo->busIdString = xalloc(64); sprintf(pDRIInfo->busIdString, "PCI:%d:%d:%d", @@ -1425,6 +1252,7 @@ Bool RADEONDRIScreenInit(ScreenPtr pScreen) < RADEON_MAX_DRAWABLES ? SAREA_MAX_DRAWABLES : RADEON_MAX_DRAWABLES); + #ifdef PER_CONTEXT_SAREA /* This is only here for testing per-context SAREAs. When used, the magic number below would be properly defined in a header file. */ @@ -1442,7 +1270,7 @@ Bool RADEONDRIScreenInit(ScreenPtr pScreen) /* For now the mapping works by using a fixed size defined * in the SAREA header */ - if (sizeof(XF86DRISAREARec)+sizeof(RADEONSAREAPriv)>SAREA_MAX) { + if (sizeof(XF86DRISAREARec)+sizeof(RADEONSAREAPriv) > SAREA_MAX) { ErrorF("Data does not fit in SAREA\n"); return FALSE; } @@ -1464,6 +1292,12 @@ Bool RADEONDRIScreenInit(ScreenPtr pScreen) pDRIInfo->InitBuffers = RADEONDRIInitBuffers; pDRIInfo->MoveBuffers = RADEONDRIMoveBuffers; pDRIInfo->bufferRequests = DRI_ALL_WINDOWS; + pDRIInfo->OpenFullScreen = RADEONDRIOpenFullScreen; + pDRIInfo->CloseFullScreen = RADEONDRICloseFullScreen; + pDRIInfo->TransitionTo2d = RADEONDRITransitionTo2d; + pDRIInfo->TransitionTo3d = RADEONDRITransitionTo3d; + pDRIInfo->TransitionSingleToMulti3D = RADEONDRITransitionSingleToMulti3d; + pDRIInfo->TransitionMultiToSingle3D = RADEONDRITransitionMultiToSingle3d; pDRIInfo->createDummyCtx = TRUE; pDRIInfo->createDummyCtxPriv = FALSE; @@ -1478,17 +1312,32 @@ Bool RADEONDRIScreenInit(ScreenPtr pScreen) return FALSE; } - /* Check the radeon DRM version */ - version = drmGetVersion(info->drmFD); + /* Check the DRM lib version. + * drmGetLibVersion was not supported in version 1.0, so check for + * symbol first to avoid possible crash or hang. + */ + if (xf86LoaderCheckSymbol("drmGetLibVersion")) { + version = drmGetLibVersion(info->drmFD); + } else { + /* drmlib version 1.0.0 didn't have the drmGetLibVersion + * entry point. Fake it by allocating a version record + * via drmGetVersion and changing it to version 1.0.0. + */ + version = drmGetVersion(info->drmFD); + version->version_major = 1; + version->version_minor = 0; + version->version_patchlevel = 0; + } + if (version) { if (version->version_major != 1 || version->version_minor < 1) { - /* Incompatible drm version */ + /* incompatible drm library version */ xf86DrvMsg(pScreen->myNum, X_ERROR, "[dri] RADEONDRIScreenInit failed because of a " "version mismatch.\n" - "[dri] radeon.o kernel module version is %d.%d.%d " - "but version 1.1.x is needed.\n" + "[dri] libdrm.a module version is %d.%d.%d but " + "version 1.1.x is needed.\n" "[dri] Disabling DRI.\n", version->version_major, version->version_minor, @@ -1500,30 +1349,76 @@ Bool RADEONDRIScreenInit(ScreenPtr pScreen) drmFreeVersion(version); } -#if !defined(PCIGART_ENABLED) - /* Initialize AGP */ - if (!info->IsPCI && !RADEONDRIAgpInit(info, pScreen)) { - RADEONDRICloseScreen(pScreen); - return FALSE; - } + /* Check the radeon DRM version */ + version = drmGetVersion(info->drmFD); + if (version) { + int req_minor, req_patch; + + if ((info->ChipFamily == CHIP_FAMILY_R200) || + (info->ChipFamily == CHIP_FAMILY_RV250) || + (info->ChipFamily == CHIP_FAMILY_M9)) { + req_minor = 5; + req_patch = 0; + } else { +#if X_BYTE_ORDER == X_LITTLE_ENDIAN + req_minor = 1; + req_patch = 0; +#else + req_minor = 2; + req_patch = 1; +#endif + } - /* Initialize PCI */ - if (info->IsPCI) { - xf86DrvMsg(pScreen->myNum, X_ERROR, "[dri] PCI cards not yet " - "supported. Disabling DRI.\n"); - RADEONDRICloseScreen(pScreen); - return FALSE; + if (version->version_major != 1 || + version->version_minor < req_minor || + (version->version_minor == req_minor && + version->version_patchlevel < req_patch)) { + /* Incompatible drm version */ + xf86DrvMsg(pScreen->myNum, X_ERROR, + "[dri] RADEONDRIScreenInit failed because of a version " + "mismatch.\n" + "[dri] radeon.o kernel module version is %d.%d.%d " + "but version 1.%d.%d or newer is needed.\n" + "[dri] Disabling DRI.\n", + version->version_major, + version->version_minor, + version->version_patchlevel, + req_minor, + req_patch); + drmFreeVersion(version); + RADEONDRICloseScreen(pScreen); + return FALSE; + } + + if (version->version_minor < 3) { + xf86DrvMsg(pScreen->myNum, X_WARNING, + "[dri] Some DRI features disabled because of version " + "mismatch.\n" + "[dri] radeon.o kernel module version is %d.%d.%d but " + "1.3.1 or later is preferred.\n", + version->version_major, + version->version_minor, + version->version_patchlevel); + } + info->drmMinor = version->version_minor; + drmFreeVersion(version); } -#else + /* Initialize AGP */ if (!info->IsPCI && !RADEONDRIAgpInit(info, pScreen)) { +#if defined(__alpha__) || defined(__powerpc__) info->IsPCI = TRUE; xf86DrvMsg(pScreen->myNum, X_WARNING, "[agp] AGP failed to initialize " "-- falling back to PCI mode.\n"); xf86DrvMsg(pScreen->myNum, X_WARNING, - "[agp] Make sure you have the agpgart kernel module " - "loaded.\n"); + "[agp] If this is an AGP card, you may want to make sure " + "the agpgart\nkernel module is loaded before the radeon " + "kernel module.\n"); +#else + RADEONDRICloseScreen(pScreen); + return FALSE; +#endif } /* Initialize PCI */ @@ -1531,7 +1426,6 @@ Bool RADEONDRIScreenInit(ScreenPtr pScreen) RADEONDRICloseScreen(pScreen); return FALSE; } -#endif /* DRIScreenInit doesn't add all the * common mappings. Add additional @@ -1542,6 +1436,18 @@ Bool RADEONDRIScreenInit(ScreenPtr pScreen) return FALSE; } + /* DRIScreenInit adds the frame buffer + map, but we need it as well */ + { + void *scratch_ptr; + int scratch_int; + + DRIGetDeviceInfo(pScreen, &info->fbHandle, + &scratch_int, &scratch_int, + &scratch_int, &scratch_int, + &scratch_ptr); + } + /* FIXME: When are these mappings unmapped? */ if (!RADEONInitVisualConfigs(pScreen)) { @@ -1589,6 +1495,12 @@ Bool RADEONDRIFinishScreenInit(ScreenPtr pScreen) return FALSE; } + /* Initialize IRQ */ + RADEONDRIIrqInit(info, pScreen); + + /* Initialize kernel agp memory manager */ + RADEONDRIAgpHeapInit(info, pScreen); + /* Initialize and start the CP if required */ RADEONDRICPInit(pScrn); @@ -1596,8 +1508,6 @@ Bool RADEONDRIFinishScreenInit(ScreenPtr pScreen) pSAREAPriv = (RADEONSAREAPrivPtr)DRIGetSAREAPrivate(pScreen); memset(pSAREAPriv, 0, sizeof(*pSAREAPriv)); - RADEONDRISAREAInit(pScreen, pSAREAPriv); - pRADEONDRI = (RADEONDRIPtr)info->pDRIInfo->devPrivate; pRADEONDRI->deviceID = info->Chipset; @@ -1637,6 +1547,13 @@ Bool RADEONDRIFinishScreenInit(ScreenPtr pScreen) pRADEONDRI->perctx_sarea_size = info->perctx_sarea_size; #endif + /* Have shadowfb run only while there is 3d active. */ + if (info->allowPageFlip /* && info->drmMinor >= 3 */) { + ShadowFBInit( pScreen, RADEONDRIRefreshArea ); + } else { + info->allowPageFlip = 0; + } + return TRUE; } @@ -1645,13 +1562,30 @@ Bool RADEONDRIFinishScreenInit(ScreenPtr pScreen) */ void RADEONDRICloseScreen(ScreenPtr pScreen) { - ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; - RADEONInfoPtr info = RADEONPTR(pScrn); + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + RADEONInfoPtr info = RADEONPTR(pScrn); + drmRadeonInit drmInfo; + RING_LOCALS; /* Stop the CP */ if (info->directRenderingEnabled) { - if (info->CPStarted) RADEONCP_STOP(pScrn, info); - else DRIUnlock(pScreen); + /* If we've generated any CP commands, we must flush them to the + * kernel module now. + */ + if (info->CPInUse) { + RADEON_FLUSH_CACHE(); + RADEON_WAIT_UNTIL_IDLE(); + RADEONCPReleaseIndirect(pScrn); + + info->CPInUse = FALSE; + } + RADEONCP_STOP(pScrn, info); + } + + if (info->irq) { + drmCtlUninstHandler(info->drmFD); + info->irq = 0; + info->ModeReg.gen_int_cntl = 0; } /* De-allocate vertex buffers */ @@ -1661,7 +1595,10 @@ void RADEONDRICloseScreen(ScreenPtr pScreen) } /* De-allocate all kernel resources */ - drmRadeonCleanupCP(info->drmFD); + memset(&drmInfo, 0, sizeof(drmRadeonInit)); + drmInfo.func = DRM_RADEON_CLEANUP_CP; + drmCommandWrite(info->drmFD, DRM_RADEON_CP_INIT, + &drmInfo, sizeof(drmRadeonInit)); /* De-allocate all AGP resources */ if (info->agpTex) { @@ -1712,3 +1649,213 @@ void RADEONDRICloseScreen(ScreenPtr pScreen) info->pVisualConfigsPriv = NULL; } } + + + +/* Fullscreen hooks. The DRI fullscreen mode can probably be removed as + * it adds little or nothing above the mechanism below (and isn't widely + * used). + */ +static Bool RADEONDRIOpenFullScreen(ScreenPtr pScreen) +{ + return TRUE; +} + +static Bool RADEONDRICloseFullScreen(ScreenPtr pScreen) +{ + return TRUE; +} + + + +/* Use callbacks from dri.c to support pageflipping mode for a single + * 3d context without need for any specific full-screen extension. + * + * Also use these callbacks to allocate and free 3d-specific memory on + * demand. + */ + + +/* Use the shadowfb module to maintain a list of dirty rectangles. + * These are blitted to the back buffer to keep both buffers clean + * during page-flipping when the 3d application isn't fullscreen. + * + * Unlike most use of the shadowfb code, both buffers are in video memory. + * + * An alternative to this would be to organize for all on-screen drawing + * operations to be duplicated for the two buffers. That might be + * faster, but seems like a lot more work... + */ + + +static void RADEONDRIRefreshArea(ScrnInfoPtr pScrn, int num, BoxPtr pbox) +{ + RADEONInfoPtr info = RADEONPTR(pScrn); + int i; + RADEONSAREAPrivPtr pSAREAPriv = DRIGetSAREAPrivate(pScrn->pScreen); + + /* Don't want to do this when no 3d is active and pages are + * right-way-round + */ + if (!pSAREAPriv->pfAllowPageFlip && pSAREAPriv->pfCurrentPage == 0) + return; + + (*info->accel->SetupForScreenToScreenCopy)(pScrn, + 1, 1, GXcopy, + (CARD32)(-1), -1); + + for (i = 0 ; i < num ; i++, pbox++) { + int xa = max(pbox->x1, 0), xb = min(pbox->x2, pScrn->virtualX-1); + int ya = max(pbox->y1, 0), yb = min(pbox->y2, pScrn->virtualY-1); + + if (xa <= xb && ya <= yb) { + (*info->accel->SubsequentScreenToScreenCopy)(pScrn, xa, ya, + xa + info->backX, + ya + info->backY, + xb - xa + 1, + yb - ya + 1); + } + } +} + +static void RADEONEnablePageFlip(ScreenPtr pScreen) +{ + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + RADEONInfoPtr info = RADEONPTR(pScrn); + RADEONSAREAPrivPtr pSAREAPriv = DRIGetSAREAPrivate(pScreen); + + if (info->allowPageFlip) { + /* Duplicate the frontbuffer to the backbuffer */ + (*info->accel->SetupForScreenToScreenCopy)(pScrn, + 1, 1, GXcopy, + (CARD32)(-1), -1); + + (*info->accel->SubsequentScreenToScreenCopy)(pScrn, + 0, + 0, + info->backX, + info->backY, + pScrn->virtualX, + pScrn->virtualY); + + pSAREAPriv->pfAllowPageFlip = 1; + } +} + +static void RADEONDisablePageFlip(ScreenPtr pScreen) +{ + /* Tell the clients not to pageflip. How? + * -- Field in sarea, plus bumping the window counters. + * -- DRM needs to cope with Front-to-Back swapbuffers. + */ + RADEONSAREAPrivPtr pSAREAPriv = DRIGetSAREAPrivate(pScreen); + + pSAREAPriv->pfAllowPageFlip = 0; +} + +static void RADEONDRITransitionSingleToMulti3d(ScreenPtr pScreen) +{ + RADEONDisablePageFlip(pScreen); +} + +static void RADEONDRITransitionMultiToSingle3d(ScreenPtr pScreen) +{ + /* Let the remaining 3d app start page flipping again */ + RADEONEnablePageFlip(pScreen); +} + +static void RADEONDRITransitionTo3d(ScreenPtr pScreen) +{ + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + RADEONInfoPtr info = RADEONPTR(pScrn); + FBAreaPtr fbarea; + int width, height; + + /* reserve offscreen area for back and depth buffers and textures */ + + /* If we still have an area for the back buffer reserved, free it + * first so we always start with all free offscreen memory, except + * maybe for Xv + */ + if (info->backArea) { + xf86FreeOffscreenArea(info->backArea); + info->backArea = NULL; + } + + xf86PurgeUnlockedOffscreenAreas(pScreen); + + xf86QueryLargestOffscreenArea(pScreen, &width, &height, 0, 0, 0); + + /* Free Xv linear offscreen memory if necessary */ + if (height < (info->depthTexLines + info->backLines)) { + xf86FreeOffscreenLinear(info->videoLinear); + info->videoLinear = NULL; + xf86QueryLargestOffscreenArea(pScreen, &width, &height, 0, 0, 0); + } + + /* Reserve placeholder area so the other areas will match the + * pre-calculated offsets + */ + fbarea = xf86AllocateOffscreenArea(pScreen, pScrn->displayWidth, + height + - info->depthTexLines + - info->backLines, + pScrn->displayWidth, + NULL, NULL, NULL); + if (!fbarea) + xf86DrvMsg(pScreen->myNum, X_ERROR, "Unable to reserve placeholder " + "offscreen area, you might experience screen corruption\n"); + + info->backArea = xf86AllocateOffscreenArea(pScreen, pScrn->displayWidth, + info->backLines, + pScrn->displayWidth, + NULL, NULL, NULL); + if (!info->backArea) + xf86DrvMsg(pScreen->myNum, X_ERROR, "Unable to reserve offscreen " + "area for back buffer, you might experience screen " + "corruption\n"); + + info->depthTexArea = xf86AllocateOffscreenArea(pScreen, + pScrn->displayWidth, + info->depthTexLines, + pScrn->displayWidth, + NULL, NULL, NULL); + if (!info->depthTexArea) + xf86DrvMsg(pScreen->myNum, X_ERROR, "Unable to reserve offscreen " + "area for depth buffer and textures, you might " + "experience screen corruption\n"); + + xf86FreeOffscreenArea(fbarea); + + RADEONEnablePageFlip(pScreen); + + info->have3DWindows = 1; + + if (info->cursor_start) + xf86ForceHWCursor (pScreen, TRUE); +} + +static void RADEONDRITransitionTo2d(ScreenPtr pScreen) +{ + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + RADEONInfoPtr info = RADEONPTR(pScrn); + RADEONSAREAPrivPtr pSAREAPriv = DRIGetSAREAPrivate(pScreen); + + /* Shut down shadowing if we've made it back to the front page */ + if (pSAREAPriv->pfCurrentPage == 0) { + RADEONDisablePageFlip(pScreen); + xf86FreeOffscreenArea(info->backArea); + info->backArea = NULL; + } else { + xf86DrvMsg(pScreen->myNum, X_WARNING, + "[dri] RADEONDRITransitionTo2d: " + "kernel failed to unflip buffers.\n"); + } + + xf86FreeOffscreenArea(info->depthTexArea); + + info->have3DWindows = 0; + + if (info->cursor_start) + xf86ForceHWCursor (pScreen, FALSE); +} diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dri.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dri.h index fbad78d60..abfcb4ef0 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dri.h +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dri.h @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dri.h,v 1.3 2002/04/24 16:20:40 martin Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dri.h,v 1.4 2002/10/30 12:52:13 alanh Exp $ */ /* * Copyright 2000 ATI Technologies Inc., Markham, Ontario, * VA Linux Systems Inc., Fremont, California. @@ -38,25 +38,26 @@ #define _RADEON_DRI_ #include "xf86drm.h" -#include "xf86drmRadeon.h" +#include "radeon_common.h" /* DRI Driver defaults */ -#define RADEON_DEFAULT_CP_PIO_MODE RADEON_CSQ_PRIPIO_INDPIO -#define RADEON_DEFAULT_CP_BM_MODE RADEON_CSQ_PRIBM_INDBM -#define RADEON_DEFAULT_AGP_MODE 1 -#define RADEON_DEFAULT_AGP_SIZE 8 /* MB (must be a power of 2 and > 4MB) */ -#define RADEON_DEFAULT_RING_SIZE 1 /* MB (must be page aligned) */ -#define RADEON_DEFAULT_BUFFER_SIZE 2 /* MB (must be page aligned) */ -#define RADEON_DEFAULT_AGP_TEX_SIZE 1 /* MB (must be page aligned) */ +#define RADEON_DEFAULT_CP_PIO_MODE RADEON_CSQ_PRIPIO_INDPIO +#define RADEON_DEFAULT_CP_BM_MODE RADEON_CSQ_PRIBM_INDBM +#define RADEON_DEFAULT_AGP_MODE 1 +#define RADEON_DEFAULT_AGP_FAST_WRITE 0 +#define RADEON_DEFAULT_AGP_SIZE 8 /* MB (must be 2^n and > 4MB) */ +#define RADEON_DEFAULT_RING_SIZE 1 /* MB (must be page aligned) */ +#define RADEON_DEFAULT_BUFFER_SIZE 2 /* MB (must be page aligned) */ +#define RADEON_DEFAULT_AGP_TEX_SIZE 1 /* MB (must be page aligned) */ -#define RADEON_DEFAULT_CP_TIMEOUT 10000 /* usecs */ +#define RADEON_DEFAULT_CP_TIMEOUT 10000 /* usecs */ -#define RADEON_AGP_MAX_MODE 4 +#define RADEON_AGP_MAX_MODE 4 -#define RADEON_CARD_TYPE_RADEON 1 +#define RADEON_CARD_TYPE_RADEON 1 /* Buffer are aligned on 4096 byte boundaries */ -#define RADEON_BUFFER_ALIGN 0x00000fff +#define RADEON_BUFFER_ALIGN 0x00000fff #define RADEONCP_USE_RING_BUFFER(m) \ (((m) == RADEON_CSQ_PRIBM_INDDIS) || \ @@ -99,7 +100,7 @@ typedef struct { unsigned int sarea_priv_offset; #ifdef PER_CONTEXT_SAREA - drmSize perctx_sarea_size; + drmSize perctx_sarea_size; #endif } RADEONDRIRec, *RADEONDRIPtr; diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dripriv.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dripriv.h index d4e4a8ce4..5f011928d 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dripriv.h +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dripriv.h @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dripriv.h,v 1.3 2002/04/24 16:20:40 martin Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dripriv.h,v 1.4 2002/10/30 12:52:13 alanh Exp $ */ /* * Copyright 2000 ATI Technologies Inc., Markham, Ontario, * VA Linux Systems Inc., Fremont, California. @@ -39,7 +39,7 @@ #include "GL/glxint.h" #include "xf86drm.h" -#include "xf86drmRadeon.h" +#include "radeon_common.h" #define RADEON_MAX_DRAWABLES 256 diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_driver.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_driver.c index 752575b4f..ae584332e 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_driver.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_driver.c @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_driver.c,v 1.67 2002/10/16 04:53:15 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_driver.c,v 1.91 2003/02/25 03:50:15 dawes Exp $ */ /* * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and * VA Linux Systems Inc., Fremont, California. @@ -31,7 +31,7 @@ * Authors: * Kevin E. Martin <martin@xfree86.org> * Rickard E. Faith <faith@valinux.com> - * Alan Hourihane <ahourihane@valinux.com> + * Alan Hourihane <alanh@fairlite.demon.co.uk> * * Credits: * @@ -51,7 +51,8 @@ * * This server does not yet support these XFree86 4.0 features: * !!!! FIXME !!!! - * shadowfb + * DDC1 & DDC2 + * shadowfb (Note: dri uses shadowfb for another purpose in radeon_dri.c) * overlay planes * * Modified by Marc Aurele La France (tsi@xfree86.org) for ATI driver merge. @@ -59,6 +60,7 @@ /* Driver data structures */ #include "radeon.h" +#include "radeon_macros.h" #include "radeon_probe.h" #include "radeon_reg.h" #include "radeon_version.h" @@ -122,13 +124,15 @@ typedef enum { #ifdef XF86DRI OPTION_IS_PCI, OPTION_CP_PIO, - OPTION_NO_SECURITY, OPTION_USEC_TIMEOUT, OPTION_AGP_MODE, + OPTION_AGP_FW, OPTION_AGP_SIZE, OPTION_RING_SIZE, OPTION_BUFFER_SIZE, OPTION_DEPTH_MOVE, + OPTION_PAGE_FLIP, + OPTION_NO_BACKBUFFER, #endif OPTION_PANEL_OFF, OPTION_DDC_MODE, @@ -150,10 +154,13 @@ const OptionInfoRec RADEONOptions[] = { { OPTION_CP_PIO, "CPPIOMode", OPTV_BOOLEAN, {0}, FALSE }, { OPTION_USEC_TIMEOUT, "CPusecTimeout", OPTV_INTEGER, {0}, FALSE }, { OPTION_AGP_MODE, "AGPMode", OPTV_INTEGER, {0}, FALSE }, + { OPTION_AGP_FW, "AGPFastWrite", OPTV_BOOLEAN, {0}, FALSE }, { OPTION_AGP_SIZE, "AGPSize", OPTV_INTEGER, {0}, FALSE }, { OPTION_RING_SIZE, "RingSize", OPTV_INTEGER, {0}, FALSE }, { OPTION_BUFFER_SIZE, "BufferSize", OPTV_INTEGER, {0}, FALSE }, { OPTION_DEPTH_MOVE, "EnableDepthMoves", OPTV_BOOLEAN, {0}, FALSE }, + { OPTION_PAGE_FLIP, "EnablePageFlip", OPTV_BOOLEAN, {0}, FALSE }, + { OPTION_NO_BACKBUFFER, "NoBackBuffer", OPTV_BOOLEAN, {0}, FALSE }, #endif { OPTION_PANEL_OFF, "PanelOff", OPTV_BOOLEAN, {0}, FALSE }, { OPTION_DDC_MODE, "DDCMode", OPTV_BOOLEAN, {0}, FALSE }, @@ -252,16 +259,21 @@ static const char *xf8_32bppSymbols[] = { static const char *ramdacSymbols[] = { "xf86CreateCursorInfoRec", "xf86DestroyCursorInfoRec", + "xf86ForceHWCursor", "xf86InitCursor", NULL }; #ifdef XF86DRI static const char *drmSymbols[] = { + "drmGetInterruptFromBusID", + "drmCtlInstHandler", + "drmCtlUninstHandler", "drmAddBufs", "drmAddMap", "drmAgpAcquire", "drmAgpAlloc", + "drmAgpBase", "drmAgpBind", "drmAgpDeviceId", "drmAgpEnable", @@ -270,8 +282,13 @@ static const char *drmSymbols[] = { "drmAgpRelease", "drmAgpUnbind", "drmAgpVendorId", + "drmCommandNone", + "drmCommandRead", + "drmCommandWrite", + "drmCommandWriteRead", "drmDMA", "drmFreeVersion", + "drmGetLibVersion", "drmGetVersion", "drmMap", "drmMapBufs", @@ -283,6 +300,7 @@ static const char *drmSymbols[] = { "drmRadeonStartCP", "drmRadeonStopCP", "drmRadeonWaitForIdleCP", + "drmScatterGatherAlloc", "drmScatterGatherFree", "drmUnmap", "drmUnmapBufs", @@ -295,6 +313,7 @@ static const char *driSymbols[] = { "DRIDestroyInfoRec", "DRIFinishScreenInit", "DRIGetContext", + "DRIGetDeviceInfo", "DRIGetSAREAPrivate", "DRILock", "DRIQueryVersion", @@ -303,6 +322,11 @@ static const char *driSymbols[] = { "GlxSetVisualConfigs", NULL }; + +static const char *driShadowFBSymbols[] = { + "ShadowFBInit", + NULL +}; #endif static const char *vbeSymbols[] = { @@ -344,13 +368,13 @@ void RADEONLoaderRefSymLists(void) #ifdef XF86DRI drmSymbols, driSymbols, + driShadowFBSymbols, #endif fbdevHWSymbols, vbeSymbols, int10Symbols, + i2cSymbols, ddcSymbols, - /* i2csymbols, */ - /* shadowSymbols, */ NULL); } @@ -381,16 +405,23 @@ static struct extern int gRADEONEntityIndex; -#if !defined(__alpha__) -# define RADEONPreInt10Save(s, r1, r2) -# define RADEONPostInt10Check(s, r1, r2) -#else /* __alpha__ */ +struct RADEONInt10Save { + CARD32 MEM_CNTL; + CARD32 MEMSIZE; + CARD32 MPP_TB_CONFIG; +}; + +static Bool RADEONMapMMIO(ScrnInfoPtr pScrn); +static Bool RADEONUnmapMMIO(ScrnInfoPtr pScrn); + static void -RADEONSaveRegsZapMemCntl(ScrnInfoPtr pScrn, CARD32 *MEM_CNTL, CARD32 *MEMSIZE) +RADEONPreInt10Save(ScrnInfoPtr pScrn, void **pPtr) { RADEONInfoPtr info = RADEONPTR(pScrn); unsigned char *RADEONMMIO; int mapped = 0; + CARD32 CardTmp; + static struct RADEONInt10Save SaveStruct = { 0, 0, 0 }; /* * First make sure we have the pci and mmio info and that mmio is mapped @@ -409,9 +440,19 @@ RADEONSaveRegsZapMemCntl(ScrnInfoPtr pScrn, CARD32 *MEM_CNTL, CARD32 *MEMSIZE) RADEONMMIO = info->MMIO; /* Save the values and zap MEM_CNTL */ - *MEM_CNTL = INREG(RADEON_MEM_CNTL); - *MEMSIZE = INREG(RADEON_CONFIG_MEMSIZE); + SaveStruct.MEM_CNTL = INREG(RADEON_MEM_CNTL); + SaveStruct.MEMSIZE = INREG(RADEON_CONFIG_MEMSIZE); + SaveStruct.MPP_TB_CONFIG = INREG(RADEON_MPP_TB_CONFIG); + + /* + * Zap MEM_CNTL and set MPP_TB_CONFIG<31:24> to 4 + */ OUTREG(RADEON_MEM_CNTL, 0); + CardTmp = SaveStruct.MPP_TB_CONFIG & 0x00ffffffu; + CardTmp |= 0x04 << 24; + OUTREG(RADEON_MPP_TB_CONFIG, CardTmp); + + *pPtr = (void *)&SaveStruct; /* Unmap mmio space if we mapped it */ if (mapped) @@ -419,15 +460,16 @@ RADEONSaveRegsZapMemCntl(ScrnInfoPtr pScrn, CARD32 *MEM_CNTL, CARD32 *MEMSIZE) } static void -RADEONCheckRegs(ScrnInfoPtr pScrn, CARD32 Saved_MEM_CNTL, CARD32 Saved_MEMSIZE) +RADEONPostInt10Check(ScrnInfoPtr pScrn, void *ptr) { RADEONInfoPtr info = RADEONPTR(pScrn); unsigned char *RADEONMMIO; - CARD32 MEM_CNTL; + struct RADEONInt10Save *pSave = ptr; + CARD32 CardTmp; int mapped = 0; /* If we don't have a valid (non-zero) saved MEM_CNTL, get out now */ - if (!Saved_MEM_CNTL) + if (!pSave || !pSave->MEM_CNTL) return; /* First make sure that mmio is mapped */ @@ -442,20 +484,33 @@ RADEONCheckRegs(ScrnInfoPtr pScrn, CARD32 Saved_MEM_CNTL, CARD32 Saved_MEMSIZE) * two channels with the two channels configured differently), restore * the saved registers. */ - MEM_CNTL = INREG(RADEON_MEM_CNTL); - if (!MEM_CNTL || - ((MEM_CNTL & 1) && - (((MEM_CNTL >> 8) & 0xff) != ((MEM_CNTL >> 24) & 0xff)))) { + CardTmp = INREG(RADEON_MEM_CNTL); + if (!CardTmp || + ((CardTmp & 1) && + (((CardTmp >> 8) & 0xff) != ((CardTmp >> 24) & 0xff)))) { /* Restore the saved registers */ xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "Restoring MEM_CNTL (%08x), setting to %08x\n", - MEM_CNTL, Saved_MEM_CNTL); - OUTREG(RADEON_MEM_CNTL, Saved_MEM_CNTL); + CardTmp, pSave->MEM_CNTL); + OUTREG(RADEON_MEM_CNTL, pSave->MEM_CNTL); + + CardTmp = INREG(RADEON_CONFIG_MEMSIZE); + if (CardTmp != pSave->MEMSIZE) { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, + "Restoring CONFIG_MEMSIZE (%08x), setting to %08x\n", + CardTmp, pSave->MEMSIZE); + OUTREG(RADEON_CONFIG_MEMSIZE, pSave->MEMSIZE); + } + } + CardTmp = INREG(RADEON_MPP_TB_CONFIG); + if ((CardTmp & 0xff000000u) != (pSave->MPP_TB_CONFIG & 0xff000000u)) { xf86DrvMsg(pScrn->scrnIndex, X_WARNING, - "Restoring CONFIG_MEMSIZE (%08x), setting to %08x\n", - INREG(RADEON_CONFIG_MEMSIZE), Saved_MEMSIZE); - OUTREG(RADEON_CONFIG_MEMSIZE, Saved_MEMSIZE); + "Restoring MPP_TB_CONFIG<31:24> (%02x), setting to %02x\n", + CardTmp >> 24, pSave->MPP_TB_CONFIG >> 24); + CardTmp &= 0x00ffffffu; + CardTmp |= (pSave->MPP_TB_CONFIG & 0xff000000u); + OUTREG(RADEON_MPP_TB_CONFIG, CardTmp); } /* Unmap mmio space if we mapped it */ @@ -463,12 +518,6 @@ RADEONCheckRegs(ScrnInfoPtr pScrn, CARD32 Saved_MEM_CNTL, CARD32 Saved_MEMSIZE) RADEONUnmapMMIO(pScrn); } -# define RADEONPreInt10Save(s, r1, r2) \ - RADEONSaveRegsZapMemCntl((s), (r1), (r2)) -# define RADEONPostInt10Check(s, r1, r2) \ - RADEONCheckRegs((s), (r1), (r2)) -#endif /* __alpha__ */ - /* Allocate our private RADEONInfoRec */ static Bool RADEONGetRec(ScrnInfoPtr pScrn) { @@ -599,8 +648,7 @@ unsigned RADEONINPLL(ScrnInfoPtr pScrn, int addr) OUTREG8(RADEON_CLOCK_CNTL_INDEX, addr & 0x3f); data = INREG(RADEON_CLOCK_CNTL_DATA); - if (info->ChipFamily == CHIP_FAMILY_R300) - R300CGWorkaround(pScrn); + if (info->R300CGWorkaround) R300CGWorkaround(pScrn); return data; } @@ -617,16 +665,37 @@ static int RADEONINPAL(int idx) } #endif -/* Wait for vertical sync */ +/* Wait for vertical sync on primary CRTC */ void RADEONWaitForVerticalSync(ScrnInfoPtr pScrn) { RADEONInfoPtr info = RADEONPTR(pScrn); unsigned char *RADEONMMIO = info->MMIO; int i; - OUTREG(RADEON_GEN_INT_STATUS, RADEON_VSYNC_INT_AK); - for (i = 0; i < RADEON_TIMEOUT; i++) { - if (INREG(RADEON_GEN_INT_STATUS) & RADEON_VSYNC_INT) break; + /* Clear the CRTC_VBLANK_SAVE bit */ + OUTREG(RADEON_CRTC_STATUS, RADEON_CRTC_VBLANK_SAVE_CLEAR); + + /* Wait for it to go back up */ + for (i = 0; i < RADEON_TIMEOUT/1000; i++) { + if (INREG(RADEON_CRTC_STATUS) & RADEON_CRTC_VBLANK_SAVE) break; + usleep(1); + } +} + +/* Wait for vertical sync on secondary CRTC */ +void RADEONWaitForVerticalSync2(ScrnInfoPtr pScrn) +{ + RADEONInfoPtr info = RADEONPTR(pScrn); + unsigned char *RADEONMMIO = info->MMIO; + int i; + + /* Clear the CRTC2_VBLANK_SAVE bit */ + OUTREG(RADEON_CRTC2_STATUS, RADEON_CRTC2_VBLANK_SAVE_CLEAR); + + /* Wait for it to go back up */ + for (i = 0; i < RADEON_TIMEOUT/1000; i++) { + if (INREG(RADEON_CRTC2_STATUS) & RADEON_CRTC2_VBLANK_SAVE) break; + usleep(1); } } @@ -903,23 +972,23 @@ static Bool RADEONGetBIOSParameters(ScrnInfoPtr pScrn, xf86Int10InfoPtr pInt10) &(CloneDispOption))) { char *s = NULL; + if (CloneDispOption < 0 || CloneDispOption > 4) { + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "Illegal CloneDisplay Option set, " + "using default\n"); + CloneDispOption = 1; + } + switch (CloneDispOption) { case 0: s = "Disable"; break; case 1: s = "Auto-detect"; break; case 2: s = "Force On"; break; case 3: s = "Auto-detect -- use 2nd head overlay"; break; case 4: s = "Force On -- use 2nd head overlay"; break; - default: - xf86DrvMsg(pScrn->scrnIndex, X_INFO, - "Illegal CloneDisplay Option set, " - "using default\n"); - CloneDispOption = 1; - break; } - if (s) - xf86DrvMsg(pScrn->scrnIndex, X_INFO, - "CloneDisplay option: %s (%d)\n", - s, CloneDispOption); + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "CloneDisplay option: %s (%d)\n", + s, CloneDispOption); } else { /* Default to auto-detect */ CloneDispOption = 1; @@ -1297,16 +1366,25 @@ static Bool RADEONPreInitConfig(ScrnInfoPtr pScrn) info->ChipFamily = CHIP_FAMILY_M6; break; - case PCI_CHIP_RADEON_QY: - case PCI_CHIP_RADEON_QZ: + case PCI_CHIP_RV100_QY: + case PCI_CHIP_RV100_QZ: info->ChipFamily = CHIP_FAMILY_VE; break; + case PCI_CHIP_R200_BB: + case PCI_CHIP_R200_QH: + case PCI_CHIP_R200_QI: + case PCI_CHIP_R200_QJ: + case PCI_CHIP_R200_QK: case PCI_CHIP_R200_QL: + case PCI_CHIP_R200_QM: case PCI_CHIP_R200_QN: case PCI_CHIP_R200_QO: + case PCI_CHIP_R200_Qh: + case PCI_CHIP_R200_Qi: + case PCI_CHIP_R200_Qj: + case PCI_CHIP_R200_Qk: case PCI_CHIP_R200_Ql: - case PCI_CHIP_R200_BB: info->ChipFamily = CHIP_FAMILY_R200; break; @@ -1334,6 +1412,10 @@ static Bool RADEONPreInitConfig(ScrnInfoPtr pScrn) info->ChipFamily = CHIP_FAMILY_M9; break; + case PCI_CHIP_R300_AD: + case PCI_CHIP_R300_AE: + case PCI_CHIP_R300_AF: + case PCI_CHIP_R300_AG: case PCI_CHIP_R300_ND: case PCI_CHIP_R300_NE: case PCI_CHIP_R300_NF: @@ -1459,6 +1541,11 @@ static Bool RADEONPreInitConfig(ScrnInfoPtr pScrn) info1->CurCloneMode = NULL; } + info->R300CGWorkaround = + (info->ChipFamily == CHIP_FAMILY_R300 && + (INREG(RADEON_CONFIG_CNTL) & RADEON_CFG_ATI_REV_ID_MASK) + == RADEON_CFG_ATI_REV_A11); + info->MemCntl = INREG(RADEON_SDRAM_MODE_REG); info->BusCntl = INREG(RADEON_BUS_CNTL); RADEONMMIO = NULL; @@ -1495,8 +1582,8 @@ static Bool RADEONPreInitConfig(ScrnInfoPtr pScrn) #if 0 case PCI_CHIP_RADEON_XX: info->IsPCI = TRUE; break; #endif - case PCI_CHIP_RADEON_QY: - case PCI_CHIP_RADEON_QZ: + case PCI_CHIP_RV100_QY: + case PCI_CHIP_RV100_QZ: case PCI_CHIP_RADEON_LW: case PCI_CHIP_RADEON_LX: case PCI_CHIP_RADEON_LY: @@ -1505,12 +1592,38 @@ static Bool RADEONPreInitConfig(ScrnInfoPtr pScrn) case PCI_CHIP_RADEON_QE: case PCI_CHIP_RADEON_QF: case PCI_CHIP_RADEON_QG: + case PCI_CHIP_R200_BB: + case PCI_CHIP_R200_QH: + case PCI_CHIP_R200_QI: + case PCI_CHIP_R200_QJ: + case PCI_CHIP_R200_QK: case PCI_CHIP_R200_QL: + case PCI_CHIP_R200_QM: case PCI_CHIP_R200_QN: case PCI_CHIP_R200_QO: + case PCI_CHIP_R200_Qh: + case PCI_CHIP_R200_Qi: + case PCI_CHIP_R200_Qj: + case PCI_CHIP_R200_Qk: case PCI_CHIP_R200_Ql: - case PCI_CHIP_R200_BB: case PCI_CHIP_RV200_QW: + case PCI_CHIP_RV200_QX: + case PCI_CHIP_RV250_Id: + case PCI_CHIP_RV250_Ie: + case PCI_CHIP_RV250_If: + case PCI_CHIP_RV250_Ig: + case PCI_CHIP_RV250_Ld: + case PCI_CHIP_RV250_Le: + case PCI_CHIP_RV250_Lf: + case PCI_CHIP_RV250_Lg: + case PCI_CHIP_R300_AD: + case PCI_CHIP_R300_AE: + case PCI_CHIP_R300_AF: + case PCI_CHIP_R300_AG: + case PCI_CHIP_R300_ND: + case PCI_CHIP_R300_NE: + case PCI_CHIP_R300_NF: + case PCI_CHIP_R300_NG: default: info->IsPCI = FALSE; break; } } @@ -1882,6 +1995,8 @@ static DisplayModePtr RADEONDDCModes(ScrnInfoPtr pScrn) new->VSyncEnd = new->VSyncStart + d_timings->v_sync_width; new->Clock = d_timings->clock / 1000; new->Flags = (d_timings->interlaced ? V_INTERLACE : 0); + new->status = MODE_OK; + new->type = M_T_DEFAULT; if (d_timings->sync == 3) { switch (d_timings->misc) { @@ -1898,7 +2013,6 @@ static DisplayModePtr RADEONDDCModes(ScrnInfoPtr pScrn) new->name); RADEONSortModes(&new, &first, &last); - break; } } @@ -1918,6 +2032,7 @@ static DisplayModePtr RADEONDDCModes(ScrnInfoPtr pScrn) new->name = xnfalloc(strlen(p->name) + 1); strcpy(new->name, p->name); new->status = MODE_OK; + new->type = M_T_DEFAULT; count++; @@ -1949,6 +2064,7 @@ static DisplayModePtr RADEONDDCModes(ScrnInfoPtr pScrn) new->name = xnfalloc(strlen(p->name) + 1); strcpy(new->name, p->name); new->status = MODE_OK; + new->type = M_T_DEFAULT; count++; @@ -1987,7 +2103,6 @@ static int RADEONValidateDDCModes(ScrnInfoPtr pScrn, char **ppModeName, pScrn->virtualX = pScrn->display->virtualX; pScrn->virtualY = pScrn->display->virtualY; - /* We have a flat panel connected */ if (pScrn->monitor->DDC) { int maxVirtX = pScrn->virtualX; int maxVirtY = pScrn->virtualY; @@ -2007,7 +2122,8 @@ static int RADEONValidateDDCModes(ScrnInfoPtr pScrn, char **ppModeName, for (p = ddcModes; p; p = p->next) { /* If primary head is a flat panel, use RMX by default */ - if (!info->IsSecondary && DisplayType != MT_CRT) { + if ((!info->IsSecondary && DisplayType != MT_CRT) && + !info->ddc_mode) { /* These values are effective values after expansion. * They are not really used to set CRTC registers. */ @@ -2077,9 +2193,41 @@ static int RADEONValidateDDCModes(ScrnInfoPtr pScrn, char **ppModeName, } } + /* + * Add remaining DDC modes if they're smaller than the user + * specified modes + */ + for (p = ddcModes; p; p = next) { + next = p->next; + if (p->HDisplay <= maxVirtX && p->VDisplay <= maxVirtY) { + /* Unhook from DDC modes */ + if (p->prev) p->prev->next = p->next; + if (p->next) p->next->prev = p->prev; + if (p == ddcModes) ddcModes = p->next; + + /* Add to used modes */ + if (last) { + last->next = p; + p->prev = last; + } else { + first = p; + p->prev = NULL; + } + p->next = NULL; + last = p; + } + } + /* Delete unused modes */ while (ddcModes) xf86DeleteMode(&ddcModes, ddcModes); + } else { + /* + * No modes were configured, so we make the DDC modes + * available for the user to cycle through. + */ + for (p = ddcModes; p; p = p->next) + p->type |= M_T_USERDEF; } pScrn->virtualX = pScrn->display->virtualX = maxVirtX; @@ -2130,6 +2278,7 @@ static DisplayModePtr RADEONFPNativeMode(ScrnInfoPtr pScrn) new->Clock = info->DotClock; new->Flags = 0; + new->type = M_T_USERDEF; new->next = NULL; new->prev = NULL; @@ -2220,7 +2369,10 @@ static int RADEONValidateFPModes(ScrnInfoPtr pScrn, char **ppModeName) } /* If all else fails, add the native mode */ - if (!count) first = last = RADEONFPNativeMode(pScrn); + if (!count) { + first = last = RADEONFPNativeMode(pScrn); + if (first) count = 1; + } /* Close the doubly-linked mode list, if we found any usable modes */ if (last) { @@ -2440,6 +2592,11 @@ static int RADEONValidateCloneModes(ScrnInfoPtr pScrn) "DDC detection (type %d) for clone modes\n", info->CloneDDCType); + /* When primary head has an invalid DDC type, I2C is not + * initialized, so we do it here. + */ + if (!info->ddc2) info->ddc2 = xf86I2CBusInit(info->pI2CBus); + pScrn->monitor->DDC = RADEONDoDDC(pScrn, NULL); if (pScrn->monitor->DDC) { if (info->CloneType == MT_CRT) { @@ -2474,8 +2631,10 @@ static int RADEONValidateCloneModes(ScrnInfoPtr pScrn) LOOKUP_BEST_REFRESH); } else { /* Try to add DDC modes */ + info->IsSecondary = TRUE; /* Fake it */ modesFound = RADEONValidateDDCModes(pScrn, clone_mode_names, info->CloneType); + info->IsSecondary = FALSE; /* Restore it!!! */ /* If that fails and we're connect to a flat panel, then try to * add the flat panel modes @@ -2488,7 +2647,7 @@ static int RADEONValidateCloneModes(ScrnInfoPtr pScrn) xf86SetCrtcForModes(pScrn, 0); xf86PrintModes(pScrn); for (i = 0; i < modesFound; i++) { - while(pScrn->modes->status != MODE_OK) { + while (pScrn->modes->status != MODE_OK) { pScrn->modes = pScrn->modes->next; } if (!pScrn->modes) break; @@ -2534,6 +2693,16 @@ static int RADEONValidateCloneModes(ScrnInfoPtr pScrn) pScrn->monitor->nHsync = save_n_hsync; pScrn->monitor->nVrefresh = save_n_vrefresh; + /* + * Also delete the clockRanges (if it was setup) since it will be + * set up during the primary head initialization. + */ + while (pScrn->clockRanges) { + ClockRangesPtr CRtmp = pScrn->clockRanges; + pScrn->clockRanges = pScrn->clockRanges->next; + xfree(CRtmp); + } + /* modePool is no longer needed, free it */ while (pScrn->modePool) xf86DeleteMode(&pScrn->modePool, pScrn->modePool); @@ -2637,37 +2806,36 @@ static Bool RADEONPreInitModes(ScrnInfoPtr pScrn, xf86Int10InfoPtr pInt10) "No DDC data available, DDCMode option is dismissed\n"); } + if (pScrn->monitor->DDC) { + /* If we still don't know sync range yet, let's try EDID. + * + * Note that, since we can have dual heads, Xconfigurator + * may not be able to probe both monitors correctly through + * vbe probe function (RADEONProbeDDC). Here we provide an + * additional way to auto-detect sync ranges if they haven't + * been added to XF86Config manually. + */ + if (pScrn->monitor->nHsync <= 0) + RADEONSetSyncRangeFromEdid(pScrn, 1); + if (pScrn->monitor->nVrefresh <= 0) + RADEONSetSyncRangeFromEdid(pScrn, 0); + } + + pScrn->progClock = TRUE; + + clockRanges = xnfcalloc(sizeof(*clockRanges), 1); + clockRanges->next = NULL; + clockRanges->minClock = info->pll.min_pll_freq; + clockRanges->maxClock = info->pll.max_pll_freq * 10; + clockRanges->clockIndex = -1; + clockRanges->interlaceAllowed = (info->DisplayType == MT_CRT); + clockRanges->doubleScanAllowed = (info->DisplayType == MT_CRT); + /* We'll use our own mode validation routine for DFP/LCD, since * xf86ValidateModes does not work correctly with the DFP/LCD modes * 'stretched' from their native mode. */ if (info->DisplayType == MT_CRT && !info->ddc_mode) { - - /* Get mode information */ - pScrn->progClock = TRUE; - clockRanges = xnfcalloc(sizeof(*clockRanges), 1); - clockRanges->next = NULL; - clockRanges->minClock = info->pll.min_pll_freq; - clockRanges->maxClock = info->pll.max_pll_freq * 10; - clockRanges->clockIndex = -1; - clockRanges->interlaceAllowed = TRUE; - clockRanges->doubleScanAllowed = TRUE; - - if (pScrn->monitor->DDC) { - /* If we still don't know sync range yet, let's try EDID. - * - * Note that, since we can have dual heads, Xconfigurator - * may not be able to probe both monitors correctly through - * vbe probe function (RADEONProbeDDC). Here we provide an - * additional way to auto-detect sync ranges if they haven't - * been added to XF86Config manually. - */ - if (pScrn->monitor->nHsync <= 0) - RADEONSetSyncRangeFromEdid(pScrn, 1); - if (pScrn->monitor->nVrefresh <= 0) - RADEONSetSyncRangeFromEdid(pScrn, 0); - } - modesFound = xf86ValidateModes(pScrn, pScrn->monitor->Modes, @@ -2729,6 +2897,11 @@ static Bool RADEONPreInitModes(ScrnInfoPtr pScrn, xf86Int10InfoPtr pInt10) } return FALSE; } + + /* Setup the screen's clockRanges for the VidMode extension */ + pScrn->clockRanges = xnfcalloc(sizeof(*(pScrn->clockRanges)), 1); + memcpy(pScrn->clockRanges, clockRanges, sizeof(*clockRanges)); + pScrn->clockRanges->strategy = LOOKUP_BEST_REFRESH; } xf86SetCrtcForModes(pScrn, 0); @@ -2798,12 +2971,29 @@ static Bool RADEONPreInitCursor(ScrnInfoPtr pScrn) /* This is called by RADEONPreInit to initialize hardware acceleration */ static Bool RADEONPreInitAccel(ScrnInfoPtr pScrn) { +#ifdef XFree86LOADER RADEONInfoPtr info = RADEONPTR(pScrn); if (!xf86ReturnOptValBool(info->Options, OPTION_NOACCEL, FALSE)) { - if (!xf86LoadSubModule(pScrn, "xaa")) return FALSE; + int errmaj = 0, errmin = 0; + + info->xaaReq.majorversion = 1; + info->xaaReq.minorversion = 1; + + if (!LoadSubModule(pScrn->module, "xaa", NULL, NULL, NULL, + &info->xaaReq, &errmaj, &errmin)) { + info->xaaReq.minorversion = 0; + + if (!LoadSubModule(pScrn->module, "xaa", NULL, NULL, NULL, + &info->xaaReq, &errmaj, &errmin)) { + LoaderErrorMsg(NULL, "xaa", errmaj, errmin); + return FALSE; + } + } xf86LoaderReqSymLists(xaaSymbols, NULL); } +#endif + return TRUE; } @@ -2838,6 +3028,7 @@ static Bool RADEONPreInitDRI(ScrnInfoPtr pScrn) info->ringSize = RADEON_DEFAULT_RING_SIZE; info->bufSize = RADEON_DEFAULT_BUFFER_SIZE; info->agpTexSize = RADEON_DEFAULT_AGP_TEX_SIZE; + info->agpFastWrite = RADEON_DEFAULT_AGP_FAST_WRITE; info->CPusecTimeout = RADEON_DEFAULT_CP_TIMEOUT; @@ -2853,6 +3044,16 @@ static Bool RADEONPreInitDRI(ScrnInfoPtr pScrn) "Using AGP %dx mode\n", info->agpMode); } + if ((info->agpFastWrite = xf86ReturnOptValBool(info->Options, + OPTION_AGP_FW, + FALSE))) { + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, + "Enabling AGP Fast Write\n"); + } else { + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "AGP Fast Write disabled by default\n"); + } + if (xf86GetOptValInteger(info->Options, OPTION_AGP_SIZE, (int *)&(info->agpSize))) { switch (info->agpSize) { @@ -2924,6 +3125,30 @@ static Bool RADEONPreInitDRI(ScrnInfoPtr pScrn) "Depth moves disabled by default\n"); } + /* Two options to try and squeeze as much texture memory as possible + * for dedicated 3d rendering boxes + */ + info->noBackBuffer = xf86ReturnOptValBool(info->Options, + OPTION_NO_BACKBUFFER, + FALSE); + + if (info->noBackBuffer) { + info->allowPageFlip = 0; + } else if (!xf86LoadSubModule(pScrn, "shadowfb")) { + info->allowPageFlip = 0; + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "Couldn't load shadowfb module:\n"); + } else { + xf86LoaderReqSymLists(driShadowFBSymbols, NULL); + + info->allowPageFlip = xf86ReturnOptValBool(info->Options, + OPTION_PAGE_FLIP, + FALSE); + } + + xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Page flipping %sabled\n", + info->allowPageFlip ? "en" : "dis"); + return TRUE; } #endif @@ -2944,10 +3169,8 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags) { RADEONInfoPtr info; xf86Int10InfoPtr pInt10 = NULL; -#ifdef __alpha__ - CARD32 save1, save2; -#endif - + void *int10_save = NULL; + RADEONTRACE(("RADEONPreInit\n")); if (pScrn->numEntities != 1) return FALSE; @@ -2963,7 +3186,23 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags) info->pEnt = xf86GetEntityInfo(pScrn->entityList[0]); if (info->pEnt->location.type != BUS_PCI) goto fail; - RADEONPreInt10Save(pScrn, &save1, &save2); + info->PciInfo = xf86GetPciInfoForEntity(info->pEnt->index); + info->PciTag = pciTag(info->PciInfo->bus, + info->PciInfo->device, + info->PciInfo->func); + +#if !defined(__alpha__) + if (xf86GetPciDomain(info->PciTag) || + !xf86IsPrimaryPci(info->PciInfo)) + RADEONPreInt10Save(pScrn, &int10_save); +#else + /* [Alpha] On the primary, the console already ran the BIOS and we're + * going to run it again - so make sure to "fix up" the card + * so that (1) we can read the BIOS ROM and (2) the BIOS will + * get the memory config right. + */ + RADEONPreInt10Save(pScrn, &int10_save); +#endif if (xf86IsEntityShared(pScrn->entityList[0])) { if (xf86IsPrimInitDone(pScrn->entityList[0])) { @@ -3001,7 +3240,7 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags) if (flags & PROBE_DETECT) { RADEONProbeDDC(pScrn, info->pEnt->index); - RADEONPostInt10Check(pScrn, save1, save2); + RADEONPostInt10Check(pScrn, int10_save); return TRUE; } @@ -3014,11 +3253,6 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags) vgaHWGetIOBase(VGAHWPTR(pScrn)); - info->PciInfo = xf86GetPciInfoForEntity(info->pEnt->index); - info->PciTag = pciTag(info->PciInfo->bus, - info->PciInfo->device, - info->PciInfo->func); - xf86DrvMsg(pScrn->scrnIndex, X_INFO, "PCI bus %d card %d func %d\n", info->PciInfo->bus, @@ -3058,25 +3292,31 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags) } if (xf86ReturnOptValBool(info->Options, OPTION_FBDEV, FALSE)) { - info->FBDev = TRUE; - xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Using framebuffer device\n"); - } + /* check for Linux framebuffer device */ - if (info->FBDev) { - /* Check for linux framebuffer device */ - if (!xf86LoadSubModule(pScrn, "fbdevhw")) return FALSE; - xf86LoaderReqSymLists(fbdevHWSymbols, NULL); - if (!fbdevHWInit(pScrn, info->PciInfo, NULL)) return FALSE; - pScrn->SwitchMode = fbdevHWSwitchMode; - pScrn->AdjustFrame = fbdevHWAdjustFrame; - pScrn->ValidMode = fbdevHWValidMode; + if (xf86LoadSubModule(pScrn, "fbdevhw")) { + xf86LoaderReqSymLists(fbdevHWSymbols, NULL); + + if (fbdevHWInit(pScrn, info->PciInfo, NULL)) { + pScrn->ValidMode = fbdevHWValidMode; + info->FBDev = TRUE; + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, + "Using framebuffer device\n"); + } else { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, + "fbdevHWInit failed, not using framebuffer device\n"); + } + } else { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, + "Couldn't load fbdevhw module, not using framebuffer device\n"); + } } if (!info->FBDev) if (!RADEONPreInitInt10(pScrn, &pInt10)) goto fail; - RADEONPostInt10Check(pScrn, save1, save2); + RADEONPostInt10Check(pScrn, int10_save); if (!RADEONPreInitConfig(pScrn)) goto fail; @@ -3151,67 +3391,30 @@ static void RADEONLoadPalette(ScrnInfoPtr pScrn, int numColors, int idx, j; unsigned char r, g, b; - /* If the second monitor is connected, we also need to deal with the - * secondary palette - */ - if (info->IsSecondary) j = 1; - else j = 0; - - PAL_SELECT(j); - - if (info->CurrentLayout.depth == 15) { - /* 15bpp mode. This sends 32 values. */ - for (i = 0; i < numColors; i++) { - idx = indices[i]; - r = colors[idx].red; - g = colors[idx].green; - b = colors[idx].blue; - OUTPAL(idx * 8, r, g, b); - } - } else if (info->CurrentLayout.depth == 16) { - /* 16bpp mode. This sends 64 values. - * - * There are twice as many green values as there are values for - * red and blue. So, we take each red and blue pair, and - * combine it with each of the two green values. - */ - for (i = 0; i < numColors; i++) { - idx = indices[i]; - r = colors[idx / 2].red; - g = colors[idx].green; - b = colors[idx / 2].blue; - OUTPAL(idx * 4, r, g, b); - - /* AH - Added to write extra green data - How come this isn't - * needed on R128 ? We didn't load the extra green data in the - * other routine */ - if (idx <= 31) { - r = colors[idx].red; - g = colors[(idx * 2) + 1].green; - b = colors[idx].blue; - OUTPAL(idx * 8, r, g, b); - } - } +#ifdef XF86DRI + if (info->CPStarted) DRILock(pScrn->pScreen, 0); +#endif + + if (info->accelOn) info->accel->Sync(pScrn); + + if (info->FBDev) { + fbdevHWLoadPalette(pScrn, numColors, indices, colors, pVisual); } else { - /* 8bpp mode. This sends 256 values. */ - for (i = 0; i < numColors; i++) { - idx = indices[i]; - r = colors[idx].red; - b = colors[idx].blue; - g = colors[idx].green; - OUTPAL(idx, r, g, b); - } - } + /* If the second monitor is connected, we also need to deal with + * the secondary palette + */ + if (info->IsSecondary) j = 1; + else j = 0; + + PAL_SELECT(j); - if (info->Clone) { - PAL_SELECT(1); if (info->CurrentLayout.depth == 15) { /* 15bpp mode. This sends 32 values. */ for (i = 0; i < numColors; i++) { idx = indices[i]; - r = colors[idx].red; - g = colors[idx].green; - b = colors[idx].blue; + r = colors[idx].red; + g = colors[idx].green; + b = colors[idx].blue; OUTPAL(idx * 8, r, g, b); } } else if (info->CurrentLayout.depth == 16) { @@ -3223,18 +3426,21 @@ static void RADEONLoadPalette(ScrnInfoPtr pScrn, int numColors, */ for (i = 0; i < numColors; i++) { idx = indices[i]; - r = colors[idx / 2].red; - g = colors[idx].green; - b = colors[idx / 2].blue; + r = colors[idx / 2].red; + g = colors[idx].green; + b = colors[idx / 2].blue; + RADEONWaitForFifo(pScrn, 32); /* delay */ OUTPAL(idx * 4, r, g, b); /* AH - Added to write extra green data - How come this isn't - * needed on R128 ? We didn't load the extra green data in the - * other routine */ + * needed on R128? We didn't load the extra green data in the + * other routine + */ if (idx <= 31) { - r = colors[idx].red; - g = colors[(idx * 2) + 1].green; - b = colors[idx].blue; + r = colors[idx].red; + g = colors[(idx * 2) + 1].green; + b = colors[idx].blue; + RADEONWaitForFifo(pScrn, 32); /* delay */ OUTPAL(idx * 8, r, g, b); } } @@ -3242,13 +3448,66 @@ static void RADEONLoadPalette(ScrnInfoPtr pScrn, int numColors, /* 8bpp mode. This sends 256 values. */ for (i = 0; i < numColors; i++) { idx = indices[i]; - r = colors[idx].red; - b = colors[idx].blue; - g = colors[idx].green; + r = colors[idx].red; + b = colors[idx].blue; + g = colors[idx].green; + RADEONWaitForFifo(pScrn, 32); /* delay */ OUTPAL(idx, r, g, b); } } + + if (info->Clone) { + PAL_SELECT(1); + if (info->CurrentLayout.depth == 15) { + /* 15bpp mode. This sends 32 values. */ + for (i = 0; i < numColors; i++) { + idx = indices[i]; + r = colors[idx].red; + g = colors[idx].green; + b = colors[idx].blue; + OUTPAL(idx * 8, r, g, b); + } + } else if (info->CurrentLayout.depth == 16) { + /* 16bpp mode. This sends 64 values. + * + * There are twice as many green values as there are values + * for red and blue. So, we take each red and blue pair, + * and combine it with each of the two green values. + */ + for (i = 0; i < numColors; i++) { + idx = indices[i]; + r = colors[idx / 2].red; + g = colors[idx].green; + b = colors[idx / 2].blue; + OUTPAL(idx * 4, r, g, b); + + /* AH - Added to write extra green data - How come + * this isn't needed on R128? We didn't load the + * extra green data in the other routine. + */ + if (idx <= 31) { + r = colors[idx].red; + g = colors[(idx * 2) + 1].green; + b = colors[idx].blue; + OUTPAL(idx * 8, r, g, b); + } + } + } else { + /* 8bpp mode. This sends 256 values. */ + for (i = 0; i < numColors; i++) { + idx = indices[i]; + r = colors[idx].red; + b = colors[idx].blue; + g = colors[idx].green; + OUTPAL(idx, r, g, b); + } + } + } } + +#ifdef XF86DRI + if (info->CPStarted) DRIUnlock(pScrn->pScreen); +#endif } static void RADEONBlockHandler(int i, pointer blockData, @@ -3284,11 +3543,12 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv) #ifdef XF86DRI /* Turn off the CP for now. */ - info->CPInUse = FALSE; - info->indirectBuffer = NULL; + info->CPInUse = FALSE; + info->CPStarted = FALSE; + info->directRenderingEnabled = FALSE; #endif - - pScrn->fbOffset = 0; + info->accelOn = FALSE; + pScrn->fbOffset = 0; if (info->IsSecondary) pScrn->fbOffset = pScrn->videoRam * 1024; if (!RADEONMapMem(pScrn)) return FALSE; @@ -3318,8 +3578,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv) (pScrn->virtualX - info->CurCloneMode->HDisplay) / 2; info->CloneFrameY0 = (pScrn->virtualY - info->CurCloneMode->VDisplay) / 2; - pScrn->AdjustFrame(scrnIndex, - info->CloneFrameX0, info->CloneFrameY0, 1); + RADEONDoAdjustFrame(pScrn, info->CloneFrameX0, info->CloneFrameY0, TRUE); } /* Visual setup */ @@ -3356,11 +3615,11 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv) (pScrn->displayWidth * pScrn->virtualY * info->CurrentLayout.pixel_bytes * 3 + 1023) / 1024); info->directRenderingEnabled = FALSE; - } else if (info->ChipFamily >= CHIP_FAMILY_R200) { + } else if (info->ChipFamily >= CHIP_FAMILY_R300) { info->directRenderingEnabled = FALSE; xf86DrvMsg(scrnIndex, X_WARNING, "Direct rendering not yet supported on " - "Radeon 8500 and newer cards\n"); + "Radeon 9500/9700 and newer cards\n"); } else { if (info->IsSecondary) info->directRenderingEnabled = FALSE; @@ -3449,6 +3708,20 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv) fbPictureInit (pScreen, 0, 0); #endif +#ifdef RENDER + if (PictureGetSubpixelOrder (pScreen) == SubPixelUnknown) + { + int subPixelOrder; + + switch (info->DisplayType) { + case MT_NONE: subPixelOrder = SubPixelUnknown; break; + case MT_LCD: subPixelOrder = SubPixelHorizontalRGB; break; + case MT_DFP: subPixelOrder = SubPixelHorizontalRGB; break; + default: subPixelOrder = SubPixelNone; break; + } + PictureSetSubpixelOrder (pScreen, subPixelOrder); + } +#endif /* Memory manager setup */ #ifdef XF86DRI if (info->directRenderingEnabled) { @@ -3459,6 +3732,9 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv) int bufferSize = ((pScrn->virtualY * width_bytes + RADEON_BUFFER_ALIGN) & ~RADEON_BUFFER_ALIGN); + int depthSize = ((((pScrn->virtualY+15) & ~15) * width_bytes + + RADEON_BUFFER_ALIGN) + & ~RADEON_BUFFER_ALIGN); int l; int scanlines; @@ -3490,7 +3766,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv) * pixmap cache. Should be enough for a fullscreen background * image plus some leftovers. */ - info->textureSize = info->FbMapSize - 6 * bufferSize; + info->textureSize = info->FbMapSize - 5 * bufferSize - depthSize; /* If that gives us less than half the available memory, let's * be greedy and grab some more. Sorry, I care more about 3D @@ -3498,18 +3774,28 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv) * framebuffer's worth of pixmap cache anyway. */ if (info->textureSize < (int)info->FbMapSize / 2) { - info->textureSize = info->FbMapSize - 5 * bufferSize; + info->textureSize = info->FbMapSize - 4 * bufferSize - depthSize; } if (info->textureSize < (int)info->FbMapSize / 2) { - info->textureSize = info->FbMapSize - 4 * bufferSize; + info->textureSize = info->FbMapSize - 3 * bufferSize - depthSize; + } + /* If there's still no space for textures, try without pixmap cache */ + if (info->textureSize < 0) { + info->textureSize = info->FbMapSize - 2 * bufferSize - depthSize + - 64/4*64; } /* Check to see if there is more room available after the 8192nd scanline for textures */ - if ((int)info->FbMapSize - 8192*width_bytes - bufferSize*2 + if ((int)info->FbMapSize - 8192*width_bytes - bufferSize - depthSize > info->textureSize) { info->textureSize = - info->FbMapSize - 8192*width_bytes - bufferSize*2; + info->FbMapSize - 8192*width_bytes - bufferSize - depthSize; + } + + /* If backbuffer is disabled, don't allocate memory for it */ + if (info->noBackBuffer) { + info->textureSize += bufferSize; } if (info->textureSize > 0) { @@ -3542,18 +3828,26 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv) /* Reserve space for the shared depth * buffer. */ - info->depthOffset = ((info->textureOffset - bufferSize + + info->depthOffset = ((info->textureOffset - depthSize + RADEON_BUFFER_ALIGN) & ~(CARD32)RADEON_BUFFER_ALIGN); info->depthPitch = pScrn->displayWidth; /* Reserve space for the shared back buffer */ - info->backOffset = ((info->depthOffset - bufferSize + - RADEON_BUFFER_ALIGN) & - ~(CARD32)RADEON_BUFFER_ALIGN); - info->backPitch = pScrn->displayWidth; + if (info->noBackBuffer) { + info->backOffset = info->depthOffset; + info->backPitch = pScrn->displayWidth; + } else { + info->backOffset = ((info->depthOffset - bufferSize + + RADEON_BUFFER_ALIGN) & + ~(CARD32)RADEON_BUFFER_ALIGN); + info->backPitch = pScrn->displayWidth; + } - scanlines = info->backOffset / width_bytes - 1; + info->backY = info->backOffset / width_bytes; + info->backX = (info->backOffset - (info->backY * width_bytes)) / cpp; + + scanlines = info->FbMapSize / width_bytes; if (scanlines > 8191) scanlines = 8191; MemBox.x1 = 0; @@ -3589,17 +3883,32 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv) xf86DrvMsg(scrnIndex, X_INFO, "Largest offscreen area available: %d x %d\n", width, height); + + /* Lines in offscreen area needed for depth buffer and + * textures + */ + info->depthTexLines = (scanlines + - info->depthOffset / width_bytes); + info->backLines = (scanlines + - info->backOffset / width_bytes + - info->depthTexLines); + info->backArea = NULL; + } else { + xf86DrvMsg(scrnIndex, X_ERROR, + "Unable to determine largest offscreen area " + "available\n"); + return FALSE; } } xf86DrvMsg(scrnIndex, X_INFO, - "Reserved back buffer at offset 0x%x\n", + "Will use back buffer at offset 0x%x\n", info->backOffset); xf86DrvMsg(scrnIndex, X_INFO, - "Reserved depth buffer at offset 0x%x\n", + "Will use depth buffer at offset 0x%x\n", info->depthOffset); xf86DrvMsg(scrnIndex, X_INFO, - "Reserved %d kb for textures at offset 0x%x\n", + "Will use %d kb for textures at offset 0x%x\n", info->textureSize/1024, info->textureOffset); info->frontPitchOffset = (((info->frontPitch * cpp / 64) << 22) | @@ -3660,18 +3969,15 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv) } } - /* Backing store setup */ - miInitializeBackingStore(pScreen); - xf86SetBackingStore(pScreen); - - /* Set Silken Mouse */ - xf86SetSilkenMouse(pScreen); - /* Acceleration setup */ if (!xf86ReturnOptValBool(info->Options, OPTION_NOACCEL, FALSE)) { if (RADEONAccelInit(pScreen)) { xf86DrvMsg(scrnIndex, X_INFO, "Acceleration enabled\n"); info->accelOn = TRUE; + + /* FIXME: Figure out why this was added because it shouldn't be! */ + /* This is needed by the DRI and XAA code for shared entities */ + pScrn->pScreen = pScreen; } else { xf86DrvMsg(scrnIndex, X_ERROR, "Acceleration initialization failed\n"); @@ -3686,6 +3992,13 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv) /* DGA setup */ RADEONDGAInit(pScreen); + /* Backing store setup */ + miInitializeBackingStore(pScreen); + xf86SetBackingStore(pScreen); + + /* Set Silken Mouse */ + xf86SetSilkenMouse(pScreen); + /* Cursor setup */ miDCInitialize(pScreen, xf86GetPointerScreenFuncs()); @@ -3696,7 +4009,8 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv) xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Using hardware cursor (scanline %d)\n", - info->cursor_start / pScrn->displayWidth); + info->cursor_start / pScrn->displayWidth + / info->CurrentLayout.pixel_bytes); if (xf86QueryLargestOffscreenArea(pScreen, &width, &height, 0, 0, 0)) { xf86DrvMsg(scrnIndex, X_INFO, @@ -3709,14 +4023,14 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv) xf86DrvMsg(scrnIndex, X_INFO, "Using software cursor\n"); } } else { + info->cursor_start = 0; xf86DrvMsg(scrnIndex, X_INFO, "Using software cursor\n"); } /* Colormap setup */ if (!miCreateDefColormap(pScreen)) return FALSE; if (!xf86HandleColormaps(pScreen, 256, info->dac6bits ? 6 : 8, - (info->FBDev ? fbdevHWLoadPalette : - RADEONLoadPalette), NULL, + RADEONLoadPalette, NULL, CMAP_PALETTED_TRUECOLOR #if 0 /* This option messes up text mode! (eich@suse.de) */ | CMAP_LOAD_EVEN_IF_OFFSCREEN @@ -3725,10 +4039,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv) /* DPMS setup */ #ifdef DPMSExtension - if (info->FBDev) - xf86DPMSInit(pScreen, fbdevHWDPMSSet, 0); - else - xf86DPMSInit(pScreen, RADEONDisplayPowerManagementSet, 0); + xf86DPMSInit(pScreen, RADEONDisplayPowerManagementSet, 0); #endif RADEONInitVideo(pScreen); @@ -3790,6 +4101,7 @@ static void RADEONRestoreCommonRegisters(ScrnInfoPtr pScrn, * CRT are connected. */ if (info->HasCRTC2 && + !info->IsSwitching && info->ChipFamily != CHIP_FAMILY_R200 && info->ChipFamily != CHIP_FAMILY_R300) { DevUnion *pPriv; @@ -3807,6 +4119,31 @@ static void RADEONRestoreCommonRegisters(ScrnInfoPtr pScrn, } } +/* Write miscellaneous registers which might have been destroyed by an fbdevHW + * call + */ +static void RADEONRestoreFBDevRegisters(ScrnInfoPtr pScrn, + RADEONSavePtr restore) +{ +#ifdef XF86DRI + RADEONInfoPtr info = RADEONPTR(pScrn); + unsigned char *RADEONMMIO = info->MMIO; + + /* Restore register for vertical blank interrupts */ + if (info->irq) { + OUTREG(RADEON_GEN_INT_CNTL, restore->gen_int_cntl); + } + + /* Restore registers for page flipping */ + if (info->allowPageFlip) { + OUTREG(RADEON_CRTC_OFFSET_CNTL, restore->crtc_offset_cntl); + if (info->HasCRTC2) { + OUTREG(RADEON_CRTC2_OFFSET_CNTL, restore->crtc2_offset_cntl); + } + } +#endif +} + /* Write CRTC registers */ static void RADEONRestoreCrtcRegisters(ScrnInfoPtr pScrn, RADEONSavePtr restore) @@ -3861,7 +4198,7 @@ static void RADEONRestoreCrtc2Registers(ScrnInfoPtr pScrn, * TV_DAC_CNTL to a correct value which causes too high * contrast for the second CRT (using TV_DAC). */ - OUTREG(0x88c, 0x00280203); + OUTREG(RADEON_TV_DAC_CNTL, 0x00280203); } } @@ -3996,9 +4333,25 @@ static void RADEONRestorePLLRegisters(ScrnInfoPtr pScrn, RADEON_PLL_DIV_SEL, ~(RADEON_PLL_DIV_SEL)); - OUTPLLP(pScrn, RADEON_PPLL_REF_DIV, - restore->ppll_ref_div, - ~RADEON_PPLL_REF_DIV_MASK); + if (info->ChipFamily == CHIP_FAMILY_R300) { + if (restore->ppll_ref_div & R300_PPLL_REF_DIV_ACC_MASK) { + /* When restoring console mode, use saved PPLL_REF_DIV + * setting. + */ + OUTPLLP(pScrn, RADEON_PPLL_REF_DIV, + restore->ppll_ref_div, + 0); + } else { + /* R300 uses ref_div_acc field as real ref divider */ + OUTPLLP(pScrn, RADEON_PPLL_REF_DIV, + (restore->ppll_ref_div << R300_PPLL_REF_DIV_ACC_SHIFT), + ~R300_PPLL_REF_DIV_ACC_MASK); + } + } else { + OUTPLLP(pScrn, RADEON_PPLL_REF_DIV, + restore->ppll_ref_div, + ~RADEON_PPLL_REF_DIV_MASK); + } OUTPLLP(pScrn, RADEON_PPLL_DIV_3, restore->ppll_div_3, @@ -4232,6 +4585,28 @@ static void RADEONSaveCommonRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save) save->surface_cntl = INREG(RADEON_SURFACE_CNTL); } +/* Read miscellaneous registers which might be destroyed by an fbdevHW call */ +static void RADEONSaveFBDevRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save) +{ +#ifdef XF86DRI + RADEONInfoPtr info = RADEONPTR(pScrn); + unsigned char *RADEONMMIO = info->MMIO; + + /* Save register for vertical blank interrupts */ + if (info->irq) { + save->gen_int_cntl = INREG(RADEON_GEN_INT_CNTL); + } + + /* Save registers for page flipping */ + if (info->allowPageFlip) { + save->crtc_offset_cntl = INREG(RADEON_CRTC_OFFSET_CNTL); + if (info->HasCRTC2) { + save->crtc2_offset_cntl = INREG(RADEON_CRTC2_OFFSET_CNTL); + } + } +#endif +} + /* Read CRTC registers */ static void RADEONSaveCrtcRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save) { @@ -4407,8 +4782,7 @@ static void RADEONSave(ScrnInfoPtr pScrn) save->dp_datatype = INREG(RADEON_DP_DATATYPE); save->rbbm_soft_reset = INREG(RADEON_RBBM_SOFT_RESET); save->clock_cntl_index = INREG(RADEON_CLOCK_CNTL_INDEX); - if (info->ChipFamily == CHIP_FAMILY_R300) - R300CGWorkaround(pScrn); + if (info->R300CGWorkaround) R300CGWorkaround(pScrn); } RADEONSaveMode(pScrn, save); @@ -4423,6 +4797,12 @@ static void RADEONRestore(ScrnInfoPtr pScrn) vgaHWPtr hwp = VGAHWPTR(pScrn); RADEONTRACE(("RADEONRestore\n")); + +#if X_BYTE_ORDER == X_BIG_ENDIAN + RADEONWaitForFifo(pScrn, 1); + OUTREG(RADEON_RBBM_GUICNTL, RADEON_HOST_DATA_SWAP_NONE); +#endif + if (info->FBDev) { fbdevHWRestore(pScrn); return; @@ -4430,8 +4810,7 @@ static void RADEONRestore(ScrnInfoPtr pScrn) RADEONBlank(pScrn); OUTREG(RADEON_CLOCK_CNTL_INDEX, restore->clock_cntl_index); - if (info->ChipFamily == CHIP_FAMILY_R300) - R300CGWorkaround(pScrn); + if (info->R300CGWorkaround) R300CGWorkaround(pScrn); OUTREG(RADEON_RBBM_SOFT_RESET, restore->rbbm_soft_reset); OUTREG(RADEON_DP_DATATYPE, restore->dp_datatype); @@ -4515,6 +4894,8 @@ static void RADEONInitCommonRegisters(RADEONSavePtr save, RADEONInfoPtr info) static Bool RADEONInitCrtcRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save, DisplayModePtr mode, RADEONInfoPtr info) { + unsigned char *RADEONMMIO = info->MMIO; + int format; int hsync_start; int hsync_wid; @@ -4594,12 +4975,11 @@ static Bool RADEONInitCrtcRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save, << 16)); hsync_wid = (mode->CrtcHSyncEnd - mode->CrtcHSyncStart) / 8; - if (!hsync_wid) hsync_wid = 1; - if (hsync_wid > 0x3f) hsync_wid = 0x3f; + if (!hsync_wid) hsync_wid = 1; hsync_start = mode->CrtcHSyncStart - 8 + hsync_fudge; save->crtc_h_sync_strt_wid = ((hsync_start & 0x1fff) - | (hsync_wid << 16) + | ((hsync_wid & 0x3f) << 16) | ((mode->Flags & V_NHSYNC) ? RADEON_CRTC_H_SYNC_POL : 0)); @@ -4619,24 +4999,24 @@ static Bool RADEONInitCrtcRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save, #endif vsync_wid = mode->CrtcVSyncEnd - mode->CrtcVSyncStart; - if (!vsync_wid) vsync_wid = 1; - if (vsync_wid > 0x1f) vsync_wid = 0x1f; + if (!vsync_wid) vsync_wid = 1; save->crtc_v_sync_strt_wid = (((mode->CrtcVSyncStart - 1) & 0xfff) - | (vsync_wid << 16) + | ((vsync_wid & 0x1f) << 16) | ((mode->Flags & V_NVSYNC) ? RADEON_CRTC_V_SYNC_POL : 0)); save->crtc_offset = 0; - save->crtc_offset_cntl = 0; + save->crtc_offset_cntl = INREG(RADEON_CRTC_OFFSET_CNTL); save->crtc_pitch = (((pScrn->displayWidth * pScrn->bitsPerPixel) + ((pScrn->bitsPerPixel * 8) -1)) / (pScrn->bitsPerPixel * 8)); save->crtc_pitch |= save->crtc_pitch << 16; - save->surface_cntl = RADEON_SURF_TRANSLATION_DIS; + save->surface_cntl = 0; + #if X_BYTE_ORDER == X_BIG_ENDIAN switch (pScrn->bitsPerPixel) { case 16: @@ -4659,6 +5039,8 @@ static Bool RADEONInitCrtcRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save, static Bool RADEONInitCrtc2Registers(ScrnInfoPtr pScrn, RADEONSavePtr save, DisplayModePtr mode, RADEONInfoPtr info) { + unsigned char *RADEONMMIO = info->MMIO; + int format; int hsync_start; int hsync_wid; @@ -4728,15 +5110,14 @@ static Bool RADEONInitCrtc2Registers(ScrnInfoPtr pScrn, RADEONSavePtr save, | ((((mode->CrtcHDisplay / 8) - 1) & 0x1ff) << 16)); hsync_wid = (mode->CrtcHSyncEnd - mode->CrtcHSyncStart) / 8; - if (!hsync_wid) hsync_wid = 1; - if (hsync_wid > 0x3f) hsync_wid = 0x3f; + if (!hsync_wid) hsync_wid = 1; hsync_start = mode->CrtcHSyncStart - 8 + hsync_fudge; save->crtc2_h_sync_strt_wid = ((hsync_start & 0x1fff) - | (hsync_wid << 16) + | ((hsync_wid & 0x3f) << 16) | ((mode->Flags & V_NHSYNC) ? RADEON_CRTC_H_SYNC_POL - : RADEON_CRTC_H_SYNC_POL)); + : 0)); #if 1 /* This works for double scan mode. */ @@ -4753,17 +5134,16 @@ static Bool RADEONInitCrtc2Registers(ScrnInfoPtr pScrn, RADEONSavePtr save, #endif vsync_wid = mode->CrtcVSyncEnd - mode->CrtcVSyncStart; - if (!vsync_wid) vsync_wid = 1; - if (vsync_wid > 0x1f) vsync_wid = 0x1f; + if (!vsync_wid) vsync_wid = 1; save->crtc2_v_sync_strt_wid = (((mode->CrtcVSyncStart - 1) & 0xfff) - | (vsync_wid << 16) + | ((vsync_wid & 0x1f) << 16) | ((mode->Flags & V_NVSYNC) ? RADEON_CRTC2_V_SYNC_POL - : RADEON_CRTC2_V_SYNC_POL)); + : 0)); save->crtc2_offset = 0; - save->crtc2_offset_cntl = 0; + save->crtc2_offset_cntl = INREG(RADEON_CRTC2_OFFSET_CNTL); save->crtc2_pitch = (((pScrn->displayWidth * pScrn->bitsPerPixel) + ((pScrn->bitsPerPixel * 8) -1)) / @@ -4778,6 +5158,11 @@ static Bool RADEONInitCrtc2Registers(ScrnInfoPtr pScrn, RADEONSavePtr save, RADEON_FP2_PANEL_FORMAT | RADEON_FP2_ON); + if (pScrn->rgbBits == 8) + save->fp2_gen_cntl |= RADEON_FP2_PANEL_FORMAT; /* 24 bit format */ + else + save->fp2_gen_cntl &= ~RADEON_FP2_PANEL_FORMAT;/* 18 bit format */ + /* FIXME: When there are two DFPs, the 2nd DFP is driven by the * external TMDS transmitter. It may have a problem at * high dot clock for certain panels. Since we don't @@ -4883,12 +5268,18 @@ static void RADEONInitFPRegisters(ScrnInfoPtr pScrn, RADEONSavePtr orig, save->fp_gen_cntl |= (RADEON_FP_CRTC_DONT_SHADOW_VPAR | RADEON_FP_CRTC_DONT_SHADOW_HEND ); + if (pScrn->rgbBits == 8) + save->fp_gen_cntl |= RADEON_FP_PANEL_FORMAT; /* 24 bit format */ + else + save->fp_gen_cntl &= ~RADEON_FP_PANEL_FORMAT;/* 18 bit format */ + save->lvds_gen_cntl = orig->lvds_gen_cntl; save->lvds_pll_cntl = orig->lvds_pll_cntl; /* This is needed for some panel at high resolution (>=1600x1200) */ - if (save->dot_clock_freq > 15000) + if ((save->dot_clock_freq > 15000) && + (info->ChipFamily != CHIP_FAMILY_R300)) save->tmds_pll_cntl = 0xA3F; else save->tmds_pll_cntl = orig->tmds_pll_cntl; @@ -5099,8 +5490,7 @@ static Bool RADEONInit(ScrnInfoPtr pScrn, DisplayModePtr mode, info->Flags = mode->Flags; if (info->IsSecondary) { - if (!RADEONInitCrtc2Registers(pScrn, save, - pScrn->currentMode,info)) + if (!RADEONInitCrtc2Registers(pScrn, save, mode, info)) return FALSE; RADEONInitPLL2Registers(save, &info->pll, dot_clock); } else { @@ -5109,23 +5499,7 @@ static Bool RADEONInit(ScrnInfoPtr pScrn, DisplayModePtr mode, return FALSE; dot_clock = mode->Clock/1000.0; if (dot_clock) { - if (info->ChipFamily == CHIP_FAMILY_R300) { - CARD16 ref_div = info->pll.reference_div; - - /* When using a DFP on R300, the BIOS seems to configure - * the reference divider to a value different from the - * value in PLL information table. Here we use the - * register value set by the BIOS. We need to restore - * the PLL info table value back in case it needs to be - * used for the 2nd head. - */ - info->pll.reference_div = (INPLL(pScrn, RADEON_PPLL_REF_DIV) & - RADEON_PPLL_REF_DIV_MASK); - RADEONInitPLLRegisters(save, &info->pll, dot_clock); - info->pll.reference_div = ref_div; - } else { - RADEONInitPLLRegisters(save, &info->pll, dot_clock); - } + RADEONInitPLLRegisters(save, &info->pll, dot_clock); } else { save->ppll_ref_div = info->SavedReg.ppll_ref_div; save->ppll_div_3 = info->SavedReg.ppll_div_3; @@ -5156,7 +5530,6 @@ static Bool RADEONModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode) RADEONInfoPtr info = RADEONPTR(pScrn); if (!RADEONInit(pScrn, mode, &info->ModeReg)) return FALSE; - /* FIXME? DRILock/DRIUnlock here? */ pScrn->vtSema = TRUE; RADEONBlank(pScrn); @@ -5184,72 +5557,93 @@ static Bool RADEONSaveScreen(ScreenPtr pScreen, int mode) Bool RADEONSwitchMode(int scrnIndex, DisplayModePtr mode, int flags) { - ScrnInfoPtr pScrn = xf86Screens[scrnIndex]; - RADEONInfoPtr info = RADEONPTR(pScrn); - Bool ret = FALSE; + ScrnInfoPtr pScrn = xf86Screens[scrnIndex]; + RADEONInfoPtr info = RADEONPTR(pScrn); + Bool ret; +#ifdef XF86DRI + Bool CPStarted = info->CPStarted; - info->IsSwitching = TRUE; - if (info->Clone && info->CloneModes) { - DisplayModePtr clone_mode = info->CloneModes; + if (CPStarted) { + DRILock(pScrn->pScreen, 0); + RADEONCP_STOP(pScrn, info); + } +#endif - /* Try to match a mode on primary head - * FIXME: This may not be good if both heads don't have - * exactly the same list of mode. - */ - while (1) { - if ((clone_mode->HDisplay == mode->HDisplay) && - (clone_mode->VDisplay == mode->VDisplay) && - (!info->PanelOff)) { - info->CloneFrameX0 = (info->CurCloneMode->HDisplay + - info->CloneFrameX0 - - clone_mode->HDisplay - 1) / 2; - info->CloneFrameY0 = - (info->CurCloneMode->VDisplay + info->CloneFrameY0 - - clone_mode->VDisplay - 1) / 2; - info->CurCloneMode = clone_mode; - break; - } + if (info->accelOn) info->accel->Sync(pScrn); + + if (info->FBDev) { + RADEONSaveFBDevRegisters(pScrn, &info->ModeReg); - if (!clone_mode->next) { - if (info->CurCloneMode->next) - info->CurCloneMode = info->CurCloneMode->next; - else + ret = fbdevHWSwitchMode(scrnIndex, mode, flags); + + RADEONRestoreFBDevRegisters(pScrn, &info->ModeReg); + } else { + info->IsSwitching = TRUE; + if (info->Clone && info->CloneModes) { + DisplayModePtr clone_mode = info->CloneModes; + + /* Try to match a mode on primary head + * FIXME: This may not be good if both heads don't have + * exactly the same list of mode. + */ + while (1) { + if ((clone_mode->HDisplay == mode->HDisplay) && + (clone_mode->VDisplay == mode->VDisplay) && + (!info->PanelOff)) { + info->CloneFrameX0 = (info->CurCloneMode->HDisplay + + info->CloneFrameX0 - + clone_mode->HDisplay - 1) / 2; + info->CloneFrameY0 = + (info->CurCloneMode->VDisplay + info->CloneFrameY0 - + clone_mode->VDisplay - 1) / 2; + info->CurCloneMode = clone_mode; + break; + } + + if (!clone_mode->next) { info->CurCloneMode = info->CloneModes; + break; + } - info->CloneFrameX0 = (info->CurCloneMode->HDisplay + - info->CloneFrameX0 - - clone_mode->HDisplay - 1) / 2; - info->CloneFrameY0 = - (info->CurCloneMode->VDisplay + info->CloneFrameY0 - - clone_mode->VDisplay - 1) / 2; - break; + clone_mode = clone_mode->next; } + } + ret = RADEONModeInit(xf86Screens[scrnIndex], mode); + + if (info->CurCloneMode) { + if (info->CloneFrameX0 + info->CurCloneMode->HDisplay >= + pScrn->virtualX) + info->CloneFrameX0 = + pScrn->virtualX - info->CurCloneMode->HDisplay; + else if (info->CloneFrameX0 < 0) + info->CloneFrameX0 = 0; + + if (info->CloneFrameY0 + info->CurCloneMode->VDisplay >= + pScrn->virtualY) + info->CloneFrameY0 = + pScrn->virtualY - info->CurCloneMode->VDisplay; + else if (info->CloneFrameY0 < 0) + info->CloneFrameY0 = 0; - clone_mode = clone_mode->next; + RADEONDoAdjustFrame(pScrn, info->CloneFrameX0, info->CloneFrameY0, + TRUE); } - } - ret = RADEONModeInit(xf86Screens[scrnIndex], mode); - if (info->CurCloneMode) { - if (info->CloneFrameX0 + info->CurCloneMode->HDisplay >= - pScrn->virtualX) - info->CloneFrameX0 = - pScrn->virtualX - info->CurCloneMode->HDisplay; - else if (info->CloneFrameX0 < 0) - info->CloneFrameX0 = 0; + info->IsSwitching = FALSE; + } - if (info->CloneFrameY0 + info->CurCloneMode->VDisplay >= - pScrn->virtualY) - info->CloneFrameY0 = - pScrn->virtualY - info->CurCloneMode->VDisplay; - else if (info->CloneFrameY0 < 0) - info->CloneFrameY0 = 0; + if (info->accelOn) { + info->accel->Sync(pScrn); + RADEONEngineRestore(pScrn); + } - pScrn->AdjustFrame(scrnIndex, - info->CloneFrameX0, info->CloneFrameY0, 1); +#ifdef XF86DRI + if (CPStarted) { + RADEONCP_START(pScrn, info); + DRIUnlock(pScrn->pScreen); } +#endif - info->IsSwitching = FALSE; return ret; } @@ -5267,14 +5661,14 @@ int RADEONValidMode(int scrnIndex, DisplayModePtr mode, /* Adjust viewport into virtual desktop such that (0,0) in viewport * space is (x,y) in virtual space. */ -void RADEONAdjustFrame(int scrnIndex, int x, int y, int flags) +void RADEONDoAdjustFrame(ScrnInfoPtr pScrn, int x, int y, int clone) { - ScrnInfoPtr pScrn = xf86Screens[scrnIndex]; RADEONInfoPtr info = RADEONPTR(pScrn); unsigned char *RADEONMMIO = info->MMIO; - int Base; - - Base = y * info->CurrentLayout.displayWidth + x; + int reg, Base = y * info->CurrentLayout.displayWidth + x; +#ifdef XF86DRI + RADEONSAREAPrivPtr pSAREAPriv; +#endif switch (info->CurrentLayout.pixel_code) { case 15: @@ -5285,17 +5679,51 @@ void RADEONAdjustFrame(int scrnIndex, int x, int y, int flags) Base &= ~7; /* 3 lower bits are always 0 */ - if (info->Clone && (flags == 1)) { + if (clone || info->IsSecondary) { Base += pScrn->fbOffset; - OUTREG(RADEON_CRTC2_OFFSET, Base); + reg = RADEON_CRTC2_OFFSET; } else { - if (info->IsSecondary) { - Base += pScrn->fbOffset; - OUTREG(RADEON_CRTC2_OFFSET, Base); - } else { - OUTREG(RADEON_CRTC_OFFSET, Base); + reg = RADEON_CRTC_OFFSET; + } + +#ifdef XF86DRI + if (info->directRenderingEnabled) { + + pSAREAPriv = DRIGetSAREAPrivate(pScrn->pScreen); + + if (pSAREAPriv->pfCurrentPage == 1) { + Base += info->backOffset; + } + + if (clone || info->IsSecondary) { + pSAREAPriv->crtc2_base = Base; } } +#endif + + OUTREG(reg, Base); +} + +void RADEONAdjustFrame(int scrnIndex, int x, int y, int flags) +{ + ScrnInfoPtr pScrn = xf86Screens[scrnIndex]; + RADEONInfoPtr info = RADEONPTR(pScrn); + +#ifdef XF86DRI + if (info->CPStarted) DRILock(pScrn->pScreen, 0); +#endif + + if (info->accelOn) info->accel->Sync(pScrn); + + if (info->FBDev) { + fbdevHWAdjustFrame(scrnIndex, x, y, flags); + } else { + RADEONDoAdjustFrame(pScrn, x, y, FALSE); + } + +#ifdef XF86DRI + if (info->CPStarted) DRIUnlock(pScrn->pScreen); +#endif } /* Called when VT switching back to the X server. Reinitialize the @@ -5313,6 +5741,8 @@ Bool RADEONEnterVT(int scrnIndex, int flags) if (!fbdevHWEnterVT(scrnIndex,flags)) return FALSE; info->PaletteSavedOnVT = FALSE; info->ModeReg.surface_cntl = INREG(RADEON_SURFACE_CNTL); + + RADEONRestoreFBDevRegisters(pScrn, &info->ModeReg); } else if (!RADEONModeInit(pScrn, pScrn->currentMode)) return FALSE; @@ -5326,10 +5756,9 @@ Bool RADEONEnterVT(int scrnIndex, int flags) } #endif - RADEONAdjustFrame(scrnIndex, pScrn->frameX0, pScrn->frameY0, 0); + pScrn->AdjustFrame(scrnIndex, pScrn->frameX0, pScrn->frameY0, 0); if (info->CurCloneMode) { - pScrn->AdjustFrame(scrnIndex, - info->CloneFrameX0, info->CloneFrameY0, 1); + RADEONDoAdjustFrame(pScrn, info->CloneFrameX0, info->CloneFrameY0, TRUE); } return TRUE; @@ -5355,9 +5784,13 @@ void RADEONLeaveVT(int scrnIndex, int flags) if (info->FBDev) { RADEONSavePalette(pScrn, save); info->PaletteSavedOnVT = TRUE; + + RADEONSaveFBDevRegisters(pScrn, &info->ModeReg); + fbdevHWLeaveVT(scrnIndex,flags); - } else - RADEONRestore(pScrn); + } + + RADEONRestore(pScrn); } /* Called at the end of each server generation. Restore the original @@ -5427,70 +5860,85 @@ static void RADEONDisplayPowerManagementSet(ScrnInfoPtr pScrn, { RADEONInfoPtr info = RADEONPTR(pScrn); unsigned char *RADEONMMIO = info->MMIO; - int mask1 = (RADEON_CRTC_DISPLAY_DIS | - RADEON_CRTC_HSYNC_DIS | - RADEON_CRTC_VSYNC_DIS); - int mask2 = (RADEON_CRTC2_DISP_DIS | - RADEON_CRTC2_VSYNC_DIS | - RADEON_CRTC2_HSYNC_DIS); - - /* TODO: additional handling for LCD ? */ - - switch (PowerManagementMode) { - case DPMSModeOn: - /* Screen: On; HSync: On, VSync: On */ - if (info->IsSecondary) - OUTREGP(RADEON_CRTC2_GEN_CNTL, 0, ~mask2); - else { - if (info->Clone) + +#ifdef XF86DRI + if (info->CPStarted) DRILock(pScrn->pScreen, 0); +#endif + + if (info->accelOn) info->accel->Sync(pScrn); + + if (info->FBDev) { + fbdevHWDPMSSet(pScrn, PowerManagementMode, flags); + } else { + int mask1 = (RADEON_CRTC_DISPLAY_DIS | + RADEON_CRTC_HSYNC_DIS | + RADEON_CRTC_VSYNC_DIS); + int mask2 = (RADEON_CRTC2_DISP_DIS | + RADEON_CRTC2_VSYNC_DIS | + RADEON_CRTC2_HSYNC_DIS); + + /* TODO: additional handling for LCD ? */ + + switch (PowerManagementMode) { + case DPMSModeOn: + /* Screen: On; HSync: On, VSync: On */ + if (info->IsSecondary) OUTREGP(RADEON_CRTC2_GEN_CNTL, 0, ~mask2); - OUTREGP(RADEON_CRTC_EXT_CNTL, 0, ~mask1); - } - break; + else { + if (info->Clone) + OUTREGP(RADEON_CRTC2_GEN_CNTL, 0, ~mask2); + OUTREGP(RADEON_CRTC_EXT_CNTL, 0, ~mask1); + } + break; - case DPMSModeStandby: - /* Screen: Off; HSync: Off, VSync: On */ - if (info->IsSecondary) - OUTREGP(RADEON_CRTC2_GEN_CNTL, - RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_HSYNC_DIS, - ~mask2); - else { - if (info->Clone) + case DPMSModeStandby: + /* Screen: Off; HSync: Off, VSync: On */ + if (info->IsSecondary) OUTREGP(RADEON_CRTC2_GEN_CNTL, RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_HSYNC_DIS, ~mask2); - OUTREGP(RADEON_CRTC_EXT_CNTL, - RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_HSYNC_DIS, - ~mask1); - } - break; + else { + if (info->Clone) + OUTREGP(RADEON_CRTC2_GEN_CNTL, + RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_HSYNC_DIS, + ~mask2); + OUTREGP(RADEON_CRTC_EXT_CNTL, + RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_HSYNC_DIS, + ~mask1); + } + break; - case DPMSModeSuspend: - /* Screen: Off; HSync: On, VSync: Off */ - if (info->IsSecondary) - OUTREGP(RADEON_CRTC2_GEN_CNTL, - RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_VSYNC_DIS, - ~mask2); - else { - if (info->Clone) + case DPMSModeSuspend: + /* Screen: Off; HSync: On, VSync: Off */ + if (info->IsSecondary) OUTREGP(RADEON_CRTC2_GEN_CNTL, RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_VSYNC_DIS, ~mask2); - OUTREGP(RADEON_CRTC_EXT_CNTL, - RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_VSYNC_DIS, - ~mask1); - } - break; + else { + if (info->Clone) + OUTREGP(RADEON_CRTC2_GEN_CNTL, + RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_VSYNC_DIS, + ~mask2); + OUTREGP(RADEON_CRTC_EXT_CNTL, + RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_VSYNC_DIS, + ~mask1); + } + break; - case DPMSModeOff: - /* Screen: Off; HSync: Off, VSync: Off */ - if (info->IsSecondary) - OUTREGP(RADEON_CRTC2_GEN_CNTL, mask2, ~mask2); - else { - if (info->Clone) + case DPMSModeOff: + /* Screen: Off; HSync: Off, VSync: Off */ + if (info->IsSecondary) OUTREGP(RADEON_CRTC2_GEN_CNTL, mask2, ~mask2); - OUTREGP(RADEON_CRTC_EXT_CNTL, mask1, ~mask1); + else { + if (info->Clone) + OUTREGP(RADEON_CRTC2_GEN_CNTL, mask2, ~mask2); + OUTREGP(RADEON_CRTC_EXT_CNTL, mask1, ~mask1); + } + break; } - break; } + +#ifdef XF86DRI + if (info->CPStarted) DRIUnlock(pScrn->pScreen); +#endif } diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_misc.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_misc.c index 751e561cf..d9c978fee 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_misc.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_misc.c @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_misc.c,v 1.6 2002/04/24 16:20:40 martin Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_misc.c,v 1.7 2003/01/01 19:16:35 tsi Exp $ */ /* - * Copyright 2000 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 2000 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that @@ -63,13 +63,13 @@ RADEONSetup static Bool Inited = FALSE; if (!Inited) { - /* Ensure main driver module is loaded, but not as a submodule */ - if (!xf86ServerIsOnlyDetecting() && !LoaderSymbol(ATI_NAME)) - xf86LoadOneModule(ATI_DRIVER_NAME, Options); + /* Ensure main driver module is loaded, but not as a submodule */ + if (!xf86ServerIsOnlyDetecting() && !LoaderSymbol(ATI_NAME)) + xf86LoadOneModule(ATI_DRIVER_NAME, Options); - RADEONLoaderRefSymLists(); + RADEONLoaderRefSymLists(); - Inited = TRUE; + Inited = TRUE; } return (pointer)TRUE; diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_probe.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_probe.c index 64c575365..bcf80c188 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_probe.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_probe.c @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_probe.c,v 1.20 2002/10/12 01:38:07 martin Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_probe.c,v 1.24 2003/02/07 20:41:15 martin Exp $ */ /* * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and * VA Linux Systems Inc., Fremont, California. @@ -78,15 +78,24 @@ SymTabRec RADEONChipsets[] = { { PCI_CHIP_RADEON_QE, "ATI Radeon QE (AGP)" }, { PCI_CHIP_RADEON_QF, "ATI Radeon QF (AGP)" }, { PCI_CHIP_RADEON_QG, "ATI Radeon QG (AGP)" }, - { PCI_CHIP_RADEON_QY, "ATI Radeon VE QY (AGP)" }, - { PCI_CHIP_RADEON_QZ, "ATI Radeon VE QZ (AGP)" }, + { PCI_CHIP_RV100_QY, "ATI Radeon VE/7000 QY (AGP)" }, + { PCI_CHIP_RV100_QZ, "ATI Radeon VE/7000 QZ (AGP)" }, { PCI_CHIP_RADEON_LW, "ATI Radeon Mobility M7 LW (AGP)" }, - { PCI_CHIP_RADEON_LX, "ATI Radeon Mobility M7 LX (AGP)" }, + { PCI_CHIP_RADEON_LX, "ATI Mobility FireGL 7800 M7 LX (AGP)" }, { PCI_CHIP_RADEON_LY, "ATI Radeon Mobility M6 LY (AGP)" }, { PCI_CHIP_RADEON_LZ, "ATI Radeon Mobility M6 LZ (AGP)" }, + { PCI_CHIP_R200_QH, "ATI FireGL 8700/8800 QH (AGP)" }, + { PCI_CHIP_R200_QI, "ATI Radeon 8500 QI (AGP)" }, + { PCI_CHIP_R200_QJ, "ATI Radeon 8500 QJ (AGP)" }, + { PCI_CHIP_R200_QK, "ATI Radeon 8500 QK (AGP)" }, { PCI_CHIP_R200_QL, "ATI Radeon 8500 QL (AGP)" }, + { PCI_CHIP_R200_QM, "ATI Radeon 9100 QM (AGP)" }, { PCI_CHIP_R200_QN, "ATI Radeon 8500 QN (AGP)" }, { PCI_CHIP_R200_QO, "ATI Radeon 8500 QO (AGP)" }, + { PCI_CHIP_R200_Qh, "ATI Radeon 8500 Qh (AGP)" }, + { PCI_CHIP_R200_Qi, "ATI Radeon 8500 Qi (AGP)" }, + { PCI_CHIP_R200_Qj, "ATI Radeon 8500 Qj (AGP)" }, + { PCI_CHIP_R200_Qk, "ATI Radeon 8500 Qk (AGP)" }, { PCI_CHIP_R200_Ql, "ATI Radeon 8500 Ql (AGP)" }, { PCI_CHIP_R200_BB, "ATI Radeon 8500 BB (AGP)" }, { PCI_CHIP_RV200_QW, "ATI Radeon 7500 QW (AGP)" }, @@ -99,10 +108,14 @@ SymTabRec RADEONChipsets[] = { { PCI_CHIP_RV250_Le, "ATI Radeon Mobility M9 Le (AGP)" }, { PCI_CHIP_RV250_Lf, "ATI Radeon Mobility M9 Lf (AGP)" }, { PCI_CHIP_RV250_Lg, "ATI Radeon Mobility M9 Lg (AGP)" }, - { PCI_CHIP_R300_ND, "ATI Radeon 9700 ND (AGP)" }, - { PCI_CHIP_R300_NE, "ATI Radeon 9700 NE (AGP)" }, + { PCI_CHIP_R300_AD, "ATI Radeon 9500 AD (AGP)" }, + { PCI_CHIP_R300_AE, "ATI Radeon 9500 AE (AGP)" }, + { PCI_CHIP_R300_AF, "ATI Radeon 9500 AF (AGP)" }, + { PCI_CHIP_R300_AG, "ATI FireGL Z1/X1 AG (AGP)" }, + { PCI_CHIP_R300_ND, "ATI Radeon 9700 Pro ND (AGP)" }, + { PCI_CHIP_R300_NE, "ATI Radeon 9700/9500Pro NE (AGP)" }, { PCI_CHIP_R300_NF, "ATI Radeon 9700 NF (AGP)" }, - { PCI_CHIP_R300_NG, "ATI Radeon 9700 NG (AGP)" }, + { PCI_CHIP_R300_NG, "ATI FireGL X1 NG (AGP)" }, { -1, NULL } }; @@ -111,15 +124,24 @@ PciChipsets RADEONPciChipsets[] = { { PCI_CHIP_RADEON_QE, PCI_CHIP_RADEON_QE, RES_SHARED_VGA }, { PCI_CHIP_RADEON_QF, PCI_CHIP_RADEON_QF, RES_SHARED_VGA }, { PCI_CHIP_RADEON_QG, PCI_CHIP_RADEON_QG, RES_SHARED_VGA }, - { PCI_CHIP_RADEON_QY, PCI_CHIP_RADEON_QY, RES_SHARED_VGA }, - { PCI_CHIP_RADEON_QZ, PCI_CHIP_RADEON_QZ, RES_SHARED_VGA }, + { PCI_CHIP_RV100_QY, PCI_CHIP_RV100_QY, RES_SHARED_VGA }, + { PCI_CHIP_RV100_QZ, PCI_CHIP_RV100_QZ, RES_SHARED_VGA }, { PCI_CHIP_RADEON_LW, PCI_CHIP_RADEON_LW, RES_SHARED_VGA }, { PCI_CHIP_RADEON_LX, PCI_CHIP_RADEON_LX, RES_SHARED_VGA }, { PCI_CHIP_RADEON_LY, PCI_CHIP_RADEON_LY, RES_SHARED_VGA }, { PCI_CHIP_RADEON_LZ, PCI_CHIP_RADEON_LZ, RES_SHARED_VGA }, + { PCI_CHIP_R200_QH, PCI_CHIP_R200_QH, RES_SHARED_VGA }, + { PCI_CHIP_R200_QI, PCI_CHIP_R200_QI, RES_SHARED_VGA }, + { PCI_CHIP_R200_QJ, PCI_CHIP_R200_QJ, RES_SHARED_VGA }, + { PCI_CHIP_R200_QK, PCI_CHIP_R200_QK, RES_SHARED_VGA }, { PCI_CHIP_R200_QL, PCI_CHIP_R200_QL, RES_SHARED_VGA }, + { PCI_CHIP_R200_QM, PCI_CHIP_R200_QM, RES_SHARED_VGA }, { PCI_CHIP_R200_QN, PCI_CHIP_R200_QN, RES_SHARED_VGA }, { PCI_CHIP_R200_QO, PCI_CHIP_R200_QO, RES_SHARED_VGA }, + { PCI_CHIP_R200_Qh, PCI_CHIP_R200_Qh, RES_SHARED_VGA }, + { PCI_CHIP_R200_Qi, PCI_CHIP_R200_Qi, RES_SHARED_VGA }, + { PCI_CHIP_R200_Qj, PCI_CHIP_R200_Qj, RES_SHARED_VGA }, + { PCI_CHIP_R200_Qk, PCI_CHIP_R200_Qk, RES_SHARED_VGA }, { PCI_CHIP_R200_Ql, PCI_CHIP_R200_Ql, RES_SHARED_VGA }, { PCI_CHIP_R200_BB, PCI_CHIP_R200_BB, RES_SHARED_VGA }, { PCI_CHIP_RV200_QW, PCI_CHIP_RV200_QW, RES_SHARED_VGA }, @@ -132,6 +154,10 @@ PciChipsets RADEONPciChipsets[] = { { PCI_CHIP_RV250_Le, PCI_CHIP_RV250_Le, RES_SHARED_VGA }, { PCI_CHIP_RV250_Lf, PCI_CHIP_RV250_Lf, RES_SHARED_VGA }, { PCI_CHIP_RV250_Lg, PCI_CHIP_RV250_Lg, RES_SHARED_VGA }, + { PCI_CHIP_R300_AD, PCI_CHIP_R300_AD, RES_SHARED_VGA }, + { PCI_CHIP_R300_AE, PCI_CHIP_R300_AE, RES_SHARED_VGA }, + { PCI_CHIP_R300_AF, PCI_CHIP_R300_AF, RES_SHARED_VGA }, + { PCI_CHIP_R300_AG, PCI_CHIP_R300_AG, RES_SHARED_VGA }, { PCI_CHIP_R300_ND, PCI_CHIP_R300_ND, RES_SHARED_VGA }, { PCI_CHIP_R300_NE, PCI_CHIP_R300_NE, RES_SHARED_VGA }, { PCI_CHIP_R300_NF, PCI_CHIP_R300_NF, RES_SHARED_VGA }, diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_reg.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_reg.h index 3a61991cf..adf38650d 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_reg.h +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_reg.h @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_reg.h,v 1.20 2002/10/12 01:38:07 martin Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_reg.h,v 1.25 2003/02/07 18:08:59 martin Exp $ */ /* * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and * VA Linux Systems Inc., Fremont, California. @@ -31,7 +31,7 @@ * Authors: * Kevin E. Martin <martin@xfree86.org> * Rickard E. Faith <faith@valinux.com> - * Alan Hourihane <ahourihane@valinux.com> + * Alan Hourihane <alanh@fairlite.demon.co.uk> * * References: * @@ -53,85 +53,6 @@ #ifndef _RADEON_REG_H_ #define _RADEON_REG_H_ -#include "xf86_ansic.h" -#include "compiler.h" - - /* Memory mapped register access macros */ -#define INREG8(addr) MMIO_IN8(RADEONMMIO, addr) -#define INREG16(addr) MMIO_IN16(RADEONMMIO, addr) -#define INREG(addr) MMIO_IN32(RADEONMMIO, addr) -#define OUTREG8(addr, val) MMIO_OUT8(RADEONMMIO, addr, val) -#define OUTREG16(addr, val) MMIO_OUT16(RADEONMMIO, addr, val) -#define OUTREG(addr, val) MMIO_OUT32(RADEONMMIO, addr, val) - -#define ADDRREG(addr) ((volatile CARD32 *)(pointer)(RADEONMMIO + (addr))) - - -#define OUTREGP(addr, val, mask) \ -do { \ - CARD32 tmp = INREG(addr); \ - tmp &= (mask); \ - tmp |= (val); \ - OUTREG(addr, tmp); \ -} while (0) - -#define INPLL(pScrn, addr) RADEONINPLL(pScrn, addr) - -#define OUTPLL(addr, val) \ -do { \ - OUTREG8(RADEON_CLOCK_CNTL_INDEX, (((addr) & 0x3f) | \ - RADEON_PLL_WR_EN)); \ - OUTREG(RADEON_CLOCK_CNTL_DATA, val); \ -} while (0) - -#define OUTPLLP(pScrn, addr, val, mask) \ -do { \ - CARD32 tmp = INPLL(pScrn, addr); \ - tmp &= (mask); \ - tmp |= (val); \ - OUTPLL(addr, tmp); \ -} while (0) - -#define OUTPAL_START(idx) \ -do { \ - OUTREG8(RADEON_PALETTE_INDEX, (idx)); \ -} while (0) - -#define OUTPAL_NEXT(r, g, b) \ -do { \ - OUTREG(RADEON_PALETTE_DATA, ((r) << 16) | ((g) << 8) | (b)); \ -} while (0) - -#define OUTPAL_NEXT_CARD32(v) \ -do { \ - OUTREG(RADEON_PALETTE_DATA, (v & 0x00ffffff)); \ -} while (0) - -#define OUTPAL(idx, r, g, b) \ -do { \ - OUTPAL_START((idx)); \ - OUTPAL_NEXT((r), (g), (b)); \ -} while (0) - -#define INPAL_START(idx) \ -do { \ - OUTREG(RADEON_PALETTE_INDEX, (idx) << 16); \ -} while (0) - -#define INPAL_NEXT() INREG(RADEON_PALETTE_DATA) - -#define PAL_SELECT(idx) \ -do { \ - if (!idx) { \ - OUTREG(RADEON_DAC_CNTL2, INREG(RADEON_DAC_CNTL2) & \ - (CARD32)~RADEON_DAC2_PALETTE_ACC_CTL); \ - } else { \ - OUTREG(RADEON_DAC_CNTL2, INREG(RADEON_DAC_CNTL2) | \ - RADEON_DAC2_PALETTE_ACC_CTL); \ - } \ -} while (0) - - /* Registers for 2D/Video/Overlay */ #define RADEON_ADAPTER_ID 0x0f2c /* PCI */ #define RADEON_AGP_BASE 0x0170 @@ -150,7 +71,8 @@ do { \ # define RADEON_AGP_1X_MODE 0x01 # define RADEON_AGP_2X_MODE 0x02 # define RADEON_AGP_4X_MODE 0x04 -# define RADEON_AGP_MODE_MASK 0x07 +# define RADEON_AGP_FW_MODE 0x10 +# define RADEON_AGP_MODE_MASK 0x17 #define RADEON_ATTRDR 0x03c1 /* VGA */ #define RADEON_ATTRDW 0x03c0 /* VGA */ #define RADEON_ATTRX 0x03c0 /* VGA */ @@ -295,6 +217,10 @@ do { \ #define RADEON_CONFIG_APER_SIZE 0x0108 #define RADEON_CONFIG_BONDS 0x00e8 #define RADEON_CONFIG_CNTL 0x00e0 +# define RADEON_CFG_ATI_REV_A11 (0 << 16) +# define RADEON_CFG_ATI_REV_A12 (1 << 16) +# define RADEON_CFG_ATI_REV_A13 (2 << 16) +# define RADEON_CFG_ATI_REV_ID_MASK (0xf << 16) #define RADEON_CONFIG_MEMSIZE 0x00f8 #define RADEON_CONFIG_MEMSIZE_EMBEDDED 0x0114 #define RADEON_CONFIG_REG_1_BASE 0x010c @@ -307,7 +233,6 @@ do { \ #define RADEON_CRC_CMDFIFO_ADDR 0x0740 #define RADEON_CRC_CMDFIFO_DOUT 0x0744 #define RADEON_CRTC_CRNT_FRAME 0x0214 -#define RADEON_CRTC_DEBUG 0x021c #define RADEON_CRTC_EXT_CNTL 0x0054 # define RADEON_CRTC_VGA_XOVERSCAN (1 << 0) # define RADEON_VGA_ATI_LINEAR (1 << 3) @@ -382,6 +307,10 @@ do { \ #define RADEON_CRTC2_PITCH 0x032c #define RADEON_CRTC_STATUS 0x005c # define RADEON_CRTC_VBLANK_SAVE (1 << 1) +# define RADEON_CRTC_VBLANK_SAVE_CLEAR (1 << 1) +#define RADEON_CRTC2_STATUS 0x03fc +# define RADEON_CRTC2_VBLANK_SAVE (1 << 1) +# define RADEON_CRTC2_VBLANK_SAVE_CLEAR (1 << 1) #define RADEON_CRTC_V_SYNC_STRT_WID 0x020c # define RADEON_CRTC_V_SYNC_STRT (0x7ff << 0) # define RADEON_CRTC_V_SYNC_STRT_SHIFT 0 @@ -407,7 +336,6 @@ do { \ #define RADEON_CRTC_VLINE_CRNT_VLINE 0x0210 # define RADEON_CRTC_CRNT_VLINE_MASK (0x7ff << 16) #define RADEON_CRTC2_CRNT_FRAME 0x0314 -#define RADEON_CRTC2_DEBUG 0x031c #define RADEON_CRTC2_GUI_TRIG_VLINE 0x0318 #define RADEON_CRTC2_STATUS 0x03fc #define RADEON_CRTC2_VLINE_CRNT_VLINE 0x0310 @@ -573,6 +501,7 @@ do { \ #define RADEON_DST_LINE_START 0x1600 #define RADEON_DST_LINE_END 0x1604 #define RADEON_DST_LINE_PATCOUNT 0x1608 +# define RADEON_BRES_CNTL_SHIFT 8 #define RADEON_DST_OFFSET 0x1404 #define RADEON_DST_PITCH 0x1408 #define RADEON_DST_PITCH_OFFSET 0x142c @@ -635,6 +564,7 @@ do { \ #define RADEON_FP_GEN_CNTL 0x0284 # define RADEON_FP_FPON (1 << 0) # define RADEON_FP_TMDS_EN (1 << 2) +# define RADEON_FP_PANEL_FORMAT (1 << 3) # define RADEON_FP_EN_TMDS (1 << 7) # define RADEON_FP_DETECT_SENSE (1 << 8) # define RADEON_FP_SEL_CRTC2 (1 << 13) @@ -693,6 +623,8 @@ do { \ #define RADEON_GEN_INT_STATUS 0x0044 # define RADEON_VSYNC_INT_AK (1 << 2) # define RADEON_VSYNC_INT (1 << 2) +# define RADEON_VSYNC2_INT_AK (1 << 6) +# define RADEON_VSYNC2_INT (1 << 6) #define RADEON_GENENB 0x03c3 /* VGA */ #define RADEON_GENFC_RD 0x03ca /* VGA */ #define RADEON_GENFC_WT 0x03da /* VGA, 0x03ba */ @@ -717,13 +649,6 @@ do { \ # define RADEON_GPIO_MASK_1 (1 << 25) /*??*/ #define RADEON_GRPH8_DATA 0x03cf /* VGA */ #define RADEON_GRPH8_IDX 0x03ce /* VGA */ -#define RADEON_GUI_DEBUG0 0x16a0 -#define RADEON_GUI_DEBUG1 0x16a4 -#define RADEON_GUI_DEBUG2 0x16a8 -#define RADEON_GUI_DEBUG3 0x16ac -#define RADEON_GUI_DEBUG4 0x16b0 -#define RADEON_GUI_DEBUG5 0x16b4 -#define RADEON_GUI_DEBUG6 0x16b8 #define RADEON_GUI_SCRATCH_REG0 0x15e0 #define RADEON_GUI_SCRATCH_REG1 0x15e4 #define RADEON_GUI_SCRATCH_REG2 0x15e8 @@ -745,8 +670,6 @@ do { \ # define RADEON_HDP_SOFT_RESET (1 << 26) #define RADEON_HTOTAL_CNTL 0x0009 /* PLL */ #define RADEON_HTOTAL2_CNTL 0x002e /* PLL */ -#define RADEON_HW_DEBUG 0x0128 -#define RADEON_HW_DEBUG2 0x011c #define RADEON_I2C_CNTL_1 0x0094 /* ? */ #define RADEON_DVI_I2C_CNTL_1 0x02e4 /* ? */ @@ -798,6 +721,9 @@ do { \ #define RADEON_MM_DATA 0x0004 #define RADEON_MM_INDEX 0x0000 #define RADEON_MPLL_CNTL 0x000e /* PLL */ +#define RADEON_MPP_TB_CONFIG 0x01c0 /* ? */ +#define RADEON_MPP_GP_CONFIG 0x01c8 /* ? */ + #define RADEON_N_VIF_COUNT 0x0248 @@ -953,6 +879,8 @@ do { \ # define RADEON_P2PLL_REF_DIV_MASK 0x03ff # define RADEON_P2PLL_ATOMIC_UPDATE_R (1 << 15) /* same as _W */ # define RADEON_P2PLL_ATOMIC_UPDATE_W (1 << 15) /* same as _R */ +# define R300_PPLL_REF_DIV_ACC_MASK (0x3ff < 18) +# define R300_PPLL_REF_DIV_ACC_SHIFT 18 #define RADEON_PALETTE_DATA 0x00b4 #define RADEON_PALETTE_30_DATA 0x00b8 #define RADEON_PALETTE_INDEX 0x00b0 @@ -1208,7 +1136,7 @@ do { \ # define RADEON_MAX_ANISO_8_TO_1 (3 << 5) # define RADEON_MAX_ANISO_16_TO_1 (4 << 5) # define RADEON_MAX_ANISO_MASK (7 << 5) -# define RADEON_LOD_BIAS_MASK (0xffff << 8) +# define RADEON_LOD_BIAS_MASK (0xff << 8) # define RADEON_LOD_BIAS_SHIFT 8 # define RADEON_MAX_MIP_LEVEL_MASK (0x0f << 16) # define RADEON_MAX_MIP_LEVEL_SHIFT 16 @@ -1251,6 +1179,10 @@ do { \ # define RADEON_TXFORMAT_WIDTH_SHIFT 8 # define RADEON_TXFORMAT_HEIGHT_MASK (15 << 12) # define RADEON_TXFORMAT_HEIGHT_SHIFT 12 +# define RADEON_TXFORMAT_F5_WIDTH_MASK (15 << 16) +# define RADEON_TXFORMAT_F5_WIDTH_SHIFT 16 +# define RADEON_TXFORMAT_F5_HEIGHT_MASK (15 << 20) +# define RADEON_TXFORMAT_F5_HEIGHT_SHIFT 20 # define RADEON_TXFORMAT_ST_ROUTE_STQ0 (0 << 24) # define RADEON_TXFORMAT_ST_ROUTE_MASK (3 << 24) # define RADEON_TXFORMAT_ST_ROUTE_STQ1 (1 << 24) @@ -1263,6 +1195,26 @@ do { \ # define RADEON_TXFORMAT_CHROMA_KEY_ENABLE (1 << 29) # define RADEON_TXFORMAT_CUBIC_MAP_ENABLE (1 << 30) # define RADEON_TXFORMAT_PERSPECTIVE_ENABLE (1 << 31) +#define RADEON_PP_CUBIC_FACES_0 0x1d24 +#define RADEON_PP_CUBIC_FACES_1 0x1d28 +#define RADEON_PP_CUBIC_FACES_2 0x1d2c +# define RADEON_FACE_WIDTH_1_SHIFT 0 +# define RADEON_FACE_HEIGHT_1_SHIFT 4 +# define RADEON_FACE_WIDTH_1_MASK (0xf << 0) +# define RADEON_FACE_HEIGHT_1_MASK (0xf << 4) +# define RADEON_FACE_WIDTH_2_SHIFT 8 +# define RADEON_FACE_HEIGHT_2_SHIFT 12 +# define RADEON_FACE_WIDTH_2_MASK (0xf << 8) +# define RADEON_FACE_HEIGHT_2_MASK (0xf << 12) +# define RADEON_FACE_WIDTH_3_SHIFT 16 +# define RADEON_FACE_HEIGHT_3_SHIFT 20 +# define RADEON_FACE_WIDTH_3_MASK (0xf << 16) +# define RADEON_FACE_HEIGHT_3_MASK (0xf << 20) +# define RADEON_FACE_WIDTH_4_SHIFT 24 +# define RADEON_FACE_HEIGHT_4_SHIFT 28 +# define RADEON_FACE_WIDTH_4_MASK (0xf << 24) +# define RADEON_FACE_HEIGHT_4_MASK (0xf << 28) + #define RADEON_PP_TXOFFSET_0 0x1c5c #define RADEON_PP_TXOFFSET_1 0x1c74 #define RADEON_PP_TXOFFSET_2 0x1c8c @@ -1277,6 +1229,35 @@ do { \ # define RADEON_TXO_MICRO_TILE_OPT (2 << 3) # define RADEON_TXO_OFFSET_MASK 0xffffffe0 # define RADEON_TXO_OFFSET_SHIFT 5 + +#define RADEON_PP_CUBIC_OFFSET_T0_0 0x1dd0 /* bits [31:5] */ +#define RADEON_PP_CUBIC_OFFSET_T0_1 0x1dd4 +#define RADEON_PP_CUBIC_OFFSET_T0_2 0x1dd8 +#define RADEON_PP_CUBIC_OFFSET_T0_3 0x1ddc +#define RADEON_PP_CUBIC_OFFSET_T0_4 0x1de0 +#define RADEON_PP_CUBIC_OFFSET_T1_0 0x1e00 +#define RADEON_PP_CUBIC_OFFSET_T1_1 0x1e04 +#define RADEON_PP_CUBIC_OFFSET_T1_2 0x1e08 +#define RADEON_PP_CUBIC_OFFSET_T1_3 0x1e0c +#define RADEON_PP_CUBIC_OFFSET_T1_4 0x1e10 +#define RADEON_PP_CUBIC_OFFSET_T2_0 0x1e14 +#define RADEON_PP_CUBIC_OFFSET_T2_1 0x1e18 +#define RADEON_PP_CUBIC_OFFSET_T2_2 0x1e1c +#define RADEON_PP_CUBIC_OFFSET_T2_3 0x1e20 +#define RADEON_PP_CUBIC_OFFSET_T2_4 0x1e24 + +#define RADEON_PP_TEX_SIZE_0 0x1d04 /* NPOT */ +#define RADEON_PP_TEX_SIZE_1 0x1d0c +#define RADEON_PP_TEX_SIZE_2 0x1d14 +# define RADEON_TEX_USIZE_MASK (0x7ff << 0) +# define RADEON_TEX_USIZE_SHIFT 0 +# define RADEON_TEX_VSIZE_MASK (0x7ff << 16) +# define RADEON_TEX_VSIZE_SHIFT 16 +# define RADEON_SIGNED_RGB_MASK (1 << 30) +# define RADEON_SIGNED_RGB_SHIFT 30 +# define RADEON_SIGNED_ALPHA_MASK (1 << 31) +# define RADEON_SIGNED_ALPHA_SHIFT 31 + #define RADEON_PP_TXCBLEND_0 0x1c60 #define RADEON_PP_TXCBLEND_1 0x1c78 #define RADEON_PP_TXCBLEND_2 0x1c90 @@ -1455,8 +1436,6 @@ do { \ # define RADEON_COLOR_FORMAT_aYUV444 (14 << 10) # define RADEON_COLOR_FORMAT_ARGB4444 (15 << 10) # define RADEON_CLRCMP_FLIP_ENABLE (1 << 14) -# define RADEON_ZBLOCK8 (0 << 15) -# define RADEON_ZBLOCK16 (1 << 15) #define RADEON_RB3D_COLOROFFSET 0x1c40 # define RADEON_COLOROFFSET_MASK 0xfffffff0 #define RADEON_RB3D_COLORPITCH 0x1c48 @@ -1517,7 +1496,6 @@ do { \ # define RADEON_Z_TEST_NEQUAL (6 << 4) # define RADEON_Z_TEST_ALWAYS (7 << 4) # define RADEON_Z_TEST_MASK (7 << 4) -# define RADEON_HIERARCHICAL_Z_ENABLE (1 << 8) # define RADEON_STENCIL_TEST_NEVER (0 << 12) # define RADEON_STENCIL_TEST_LESS (1 << 12) # define RADEON_STENCIL_TEST_LEQUAL (2 << 12) @@ -1551,7 +1529,6 @@ do { \ # define RADEON_Z_COMPRESSION_ENABLE (1 << 28) # define RADEON_FORCE_Z_DIRTY (1 << 29) # define RADEON_Z_WRITE_ENABLE (1 << 30) -# define RADEON_Z_DECOMPRESSION_ENABLE (1 << 31) #define RADEON_RE_LINE_PATTERN 0x1cd0 # define RADEON_LINE_PATTERN_MASK 0x0000ffff # define RADEON_LINE_REPEAT_COUNT_SHIFT 16 @@ -1647,6 +1624,24 @@ do { \ # define RADEON_TEX1_W_ROUTING_USE_Q1 (1 << 26) #define RADEON_SE_LINE_WIDTH 0x1db8 #define RADEON_SE_TCL_LIGHT_MODEL_CTL 0x226c +# define RADEON_LIGHTING_ENABLE (1 << 0) +# define RADEON_LIGHT_IN_MODELSPACE (1 << 1) +# define RADEON_LOCAL_VIEWER (1 << 2) +# define RADEON_NORMALIZE_NORMALS (1 << 3) +# define RADEON_RESCALE_NORMALS (1 << 4) +# define RADEON_SPECULAR_LIGHTS (1 << 5) +# define RADEON_DIFFUSE_SPECULAR_COMBINE (1 << 6) +# define RADEON_LIGHT_ALPHA (1 << 7) +# define RADEON_LOCAL_LIGHT_VEC_GL (1 << 8) +# define RADEON_LIGHT_NO_NORMAL_AMBIENT_ONLY (1 << 9) +# define RADEON_LM_SOURCE_STATE_PREMULT 0 +# define RADEON_LM_SOURCE_STATE_MULT 1 +# define RADEON_LM_SOURCE_VERTEX_DIFFUSE 2 +# define RADEON_LM_SOURCE_VERTEX_SPECULAR 3 +# define RADEON_EMISSIVE_SOURCE_SHIFT 16 +# define RADEON_AMBIENT_SOURCE_SHIFT 18 +# define RADEON_DIFFUSE_SOURCE_SHIFT 20 +# define RADEON_SPECULAR_SOURCE_SHIFT 22 #define RADEON_SE_TCL_MATERIAL_AMBIENT_RED 0x2220 #define RADEON_SE_TCL_MATERIAL_AMBIENT_GREEN 0x2224 #define RADEON_SE_TCL_MATERIAL_AMBIENT_BLUE 0x2228 @@ -1664,16 +1659,158 @@ do { \ #define RADEON_SE_TCL_MATERIAL_SPECULAR_BLUE 0x2248 #define RADEON_SE_TCL_MATERIAL_SPECULAR_ALPHA 0x224c #define RADEON_SE_TCL_MATRIX_SELECT_0 0x225c +# define RADEON_MODELVIEW_0_SHIFT 0 +# define RADEON_MODELVIEW_1_SHIFT 4 +# define RADEON_MODELVIEW_2_SHIFT 8 +# define RADEON_MODELVIEW_3_SHIFT 12 +# define RADEON_IT_MODELVIEW_0_SHIFT 16 +# define RADEON_IT_MODELVIEW_1_SHIFT 20 +# define RADEON_IT_MODELVIEW_2_SHIFT 24 +# define RADEON_IT_MODELVIEW_3_SHIFT 28 #define RADEON_SE_TCL_MATRIX_SELECT_1 0x2260 +# define RADEON_MODELPROJECT_0_SHIFT 0 +# define RADEON_MODELPROJECT_1_SHIFT 4 +# define RADEON_MODELPROJECT_2_SHIFT 8 +# define RADEON_MODELPROJECT_3_SHIFT 12 +# define RADEON_TEXMAT_0_SHIFT 16 +# define RADEON_TEXMAT_1_SHIFT 20 +# define RADEON_TEXMAT_2_SHIFT 24 +# define RADEON_TEXMAT_3_SHIFT 28 + + #define RADEON_SE_TCL_OUTPUT_VTX_FMT 0x2254 +# define RADEON_TCL_VTX_W0 (1 << 0) +# define RADEON_TCL_VTX_FP_DIFFUSE (1 << 1) +# define RADEON_TCL_VTX_FP_ALPHA (1 << 2) +# define RADEON_TCL_VTX_PK_DIFFUSE (1 << 3) +# define RADEON_TCL_VTX_FP_SPEC (1 << 4) +# define RADEON_TCL_VTX_FP_FOG (1 << 5) +# define RADEON_TCL_VTX_PK_SPEC (1 << 6) +# define RADEON_TCL_VTX_ST0 (1 << 7) +# define RADEON_TCL_VTX_ST1 (1 << 8) +# define RADEON_TCL_VTX_Q1 (1 << 9) +# define RADEON_TCL_VTX_ST2 (1 << 10) +# define RADEON_TCL_VTX_Q2 (1 << 11) +# define RADEON_TCL_VTX_ST3 (1 << 12) +# define RADEON_TCL_VTX_Q3 (1 << 13) +# define RADEON_TCL_VTX_Q0 (1 << 14) +# define RADEON_TCL_VTX_WEIGHT_COUNT_SHIFT 15 +# define RADEON_TCL_VTX_NORM0 (1 << 18) +# define RADEON_TCL_VTX_XY1 (1 << 27) +# define RADEON_TCL_VTX_Z1 (1 << 28) +# define RADEON_TCL_VTX_W1 (1 << 29) +# define RADEON_TCL_VTX_NORM1 (1 << 30) +# define RADEON_TCL_VTX_Z0 (1 << 31) + #define RADEON_SE_TCL_OUTPUT_VTX_SEL 0x2258 +# define RADEON_TCL_COMPUTE_XYZW (1 << 0) +# define RADEON_TCL_COMPUTE_DIFFUSE (1 << 1) +# define RADEON_TCL_COMPUTE_SPECULAR (1 << 2) +# define RADEON_TCL_FORCE_NAN_IF_COLOR_NAN (1 << 3) +# define RADEON_TCL_FORCE_INORDER_PROC (1 << 4) +# define RADEON_TCL_TEX_INPUT_TEX_0 0 +# define RADEON_TCL_TEX_INPUT_TEX_1 1 +# define RADEON_TCL_TEX_INPUT_TEX_2 2 +# define RADEON_TCL_TEX_INPUT_TEX_3 3 +# define RADEON_TCL_TEX_COMPUTED_TEX_0 8 +# define RADEON_TCL_TEX_COMPUTED_TEX_1 9 +# define RADEON_TCL_TEX_COMPUTED_TEX_2 10 +# define RADEON_TCL_TEX_COMPUTED_TEX_3 11 +# define RADEON_TCL_TEX_0_OUTPUT_SHIFT 16 +# define RADEON_TCL_TEX_1_OUTPUT_SHIFT 20 +# define RADEON_TCL_TEX_2_OUTPUT_SHIFT 24 +# define RADEON_TCL_TEX_3_OUTPUT_SHIFT 28 + #define RADEON_SE_TCL_PER_LIGHT_CTL_0 0x2270 +# define RADEON_LIGHT_0_ENABLE (1 << 0) +# define RADEON_LIGHT_0_ENABLE_AMBIENT (1 << 1) +# define RADEON_LIGHT_0_ENABLE_SPECULAR (1 << 2) +# define RADEON_LIGHT_0_IS_LOCAL (1 << 3) +# define RADEON_LIGHT_0_IS_SPOT (1 << 4) +# define RADEON_LIGHT_0_DUAL_CONE (1 << 5) +# define RADEON_LIGHT_0_ENABLE_RANGE_ATTEN (1 << 6) +# define RADEON_LIGHT_0_CONSTANT_RANGE_ATTEN (1 << 7) +# define RADEON_LIGHT_0_SHIFT 0 +# define RADEON_LIGHT_1_ENABLE (1 << 16) +# define RADEON_LIGHT_1_ENABLE_AMBIENT (1 << 17) +# define RADEON_LIGHT_1_ENABLE_SPECULAR (1 << 18) +# define RADEON_LIGHT_1_IS_LOCAL (1 << 19) +# define RADEON_LIGHT_1_IS_SPOT (1 << 20) +# define RADEON_LIGHT_1_DUAL_CONE (1 << 21) +# define RADEON_LIGHT_1_ENABLE_RANGE_ATTEN (1 << 22) +# define RADEON_LIGHT_1_CONSTANT_RANGE_ATTEN (1 << 23) +# define RADEON_LIGHT_1_SHIFT 16 #define RADEON_SE_TCL_PER_LIGHT_CTL_1 0x2274 +# define RADEON_LIGHT_2_SHIFT 0 +# define RADEON_LIGHT_3_SHIFT 16 #define RADEON_SE_TCL_PER_LIGHT_CTL_2 0x2278 +# define RADEON_LIGHT_4_SHIFT 0 +# define RADEON_LIGHT_5_SHIFT 16 #define RADEON_SE_TCL_PER_LIGHT_CTL_3 0x227c +# define RADEON_LIGHT_6_SHIFT 0 +# define RADEON_LIGHT_7_SHIFT 16 + #define RADEON_SE_TCL_SHININESS 0x2250 + #define RADEON_SE_TCL_TEXTURE_PROC_CTL 0x2268 +# define RADEON_TEXGEN_TEXMAT_0_ENABLE (1 << 0) +# define RADEON_TEXGEN_TEXMAT_1_ENABLE (1 << 1) +# define RADEON_TEXGEN_TEXMAT_2_ENABLE (1 << 2) +# define RADEON_TEXGEN_TEXMAT_3_ENABLE (1 << 3) +# define RADEON_TEXMAT_0_ENABLE (1 << 4) +# define RADEON_TEXMAT_1_ENABLE (1 << 5) +# define RADEON_TEXMAT_2_ENABLE (1 << 6) +# define RADEON_TEXMAT_3_ENABLE (1 << 7) +# define RADEON_TEXGEN_INPUT_MASK 0xf +# define RADEON_TEXGEN_INPUT_TEXCOORD_0 0 +# define RADEON_TEXGEN_INPUT_TEXCOORD_1 1 +# define RADEON_TEXGEN_INPUT_TEXCOORD_2 2 +# define RADEON_TEXGEN_INPUT_TEXCOORD_3 3 +# define RADEON_TEXGEN_INPUT_OBJ 4 +# define RADEON_TEXGEN_INPUT_EYE 5 +# define RADEON_TEXGEN_INPUT_EYE_NORMAL 6 +# define RADEON_TEXGEN_INPUT_EYE_REFLECT 7 +# define RADEON_TEXGEN_INPUT_EYE_NORMALIZED 8 +# define RADEON_TEXGEN_0_INPUT_SHIFT 16 +# define RADEON_TEXGEN_1_INPUT_SHIFT 20 +# define RADEON_TEXGEN_2_INPUT_SHIFT 24 +# define RADEON_TEXGEN_3_INPUT_SHIFT 28 + #define RADEON_SE_TCL_UCP_VERT_BLEND_CTL 0x2264 +# define RADEON_UCP_IN_CLIP_SPACE (1 << 0) +# define RADEON_UCP_IN_MODEL_SPACE (1 << 1) +# define RADEON_UCP_ENABLE_0 (1 << 2) +# define RADEON_UCP_ENABLE_1 (1 << 3) +# define RADEON_UCP_ENABLE_2 (1 << 4) +# define RADEON_UCP_ENABLE_3 (1 << 5) +# define RADEON_UCP_ENABLE_4 (1 << 6) +# define RADEON_UCP_ENABLE_5 (1 << 7) +# define RADEON_TCL_FOG_MASK (3 << 8) +# define RADEON_TCL_FOG_DISABLE (0 << 8) +# define RADEON_TCL_FOG_EXP (1 << 8) +# define RADEON_TCL_FOG_EXP2 (2 << 8) +# define RADEON_TCL_FOG_LINEAR (3 << 8) +# define RADEON_RNG_BASED_FOG (1 << 10) +# define RADEON_LIGHT_TWOSIDE (1 << 11) +# define RADEON_BLEND_OP_COUNT_MASK (7 << 12) +# define RADEON_BLEND_OP_COUNT_SHIFT 12 +# define RADEON_POSITION_BLEND_OP_ENABLE (1 << 16) +# define RADEON_NORMAL_BLEND_OP_ENABLE (1 << 17) +# define RADEON_VERTEX_BLEND_SRC_0_PRIMARY (1 << 18) +# define RADEON_VERTEX_BLEND_SRC_0_SECONDARY (1 << 18) +# define RADEON_VERTEX_BLEND_SRC_1_PRIMARY (1 << 19) +# define RADEON_VERTEX_BLEND_SRC_1_SECONDARY (1 << 19) +# define RADEON_VERTEX_BLEND_SRC_2_PRIMARY (1 << 20) +# define RADEON_VERTEX_BLEND_SRC_2_SECONDARY (1 << 20) +# define RADEON_VERTEX_BLEND_SRC_3_PRIMARY (1 << 21) +# define RADEON_VERTEX_BLEND_SRC_3_SECONDARY (1 << 21) +# define RADEON_VERTEX_BLEND_WGT_MINUS_ONE (1 << 22) +# define RADEON_CULL_FRONT_IS_CW (0 << 28) +# define RADEON_CULL_FRONT_IS_CCW (1 << 28) +# define RADEON_CULL_FRONT (1 << 29) +# define RADEON_CULL_BACK (1 << 30) +# define RADEON_FORCE_W_TO_ONE (1 << 31) + #define RADEON_SE_VPORT_XSCALE 0x1d98 #define RADEON_SE_VPORT_XOFFSET 0x1d9c #define RADEON_SE_VPORT_YSCALE 0x1da0 @@ -1701,29 +1838,29 @@ do { \ #define RADEON_CP_IB_BUFSZ 0x073c #define RADEON_CP_CSQ_CNTL 0x0740 -# define RADEON_CSQ_CNT_PRIMARY_MASK (0xff << 0) -# define RADEON_CSQ_PRIDIS_INDDIS (0 << 28) -# define RADEON_CSQ_PRIPIO_INDDIS (1 << 28) -# define RADEON_CSQ_PRIBM_INDDIS (2 << 28) -# define RADEON_CSQ_PRIPIO_INDBM (3 << 28) -# define RADEON_CSQ_PRIBM_INDBM (4 << 28) -# define RADEON_CSQ_PRIPIO_INDPIO (15 << 28) +# define RADEON_CSQ_CNT_PRIMARY_MASK (0xff << 0) +# define RADEON_CSQ_PRIDIS_INDDIS (0 << 28) +# define RADEON_CSQ_PRIPIO_INDDIS (1 << 28) +# define RADEON_CSQ_PRIBM_INDDIS (2 << 28) +# define RADEON_CSQ_PRIPIO_INDBM (3 << 28) +# define RADEON_CSQ_PRIBM_INDBM (4 << 28) +# define RADEON_CSQ_PRIPIO_INDPIO (15 << 28) #define RADEON_CP_CSQ_STAT 0x07f8 -# define RADEON_CSQ_RPTR_PRIMARY_MASK (0xff << 0) -# define RADEON_CSQ_WPTR_PRIMARY_MASK (0xff << 8) -# define RADEON_CSQ_RPTR_INDIRECT_MASK (0xff << 16) -# define RADEON_CSQ_WPTR_INDIRECT_MASK (0xff << 24) +# define RADEON_CSQ_RPTR_PRIMARY_MASK (0xff << 0) +# define RADEON_CSQ_WPTR_PRIMARY_MASK (0xff << 8) +# define RADEON_CSQ_RPTR_INDIRECT_MASK (0xff << 16) +# define RADEON_CSQ_WPTR_INDIRECT_MASK (0xff << 24) #define RADEON_CP_CSQ_ADDR 0x07f0 #define RADEON_CP_CSQ_DATA 0x07f4 #define RADEON_CP_CSQ_APER_PRIMARY 0x1000 #define RADEON_CP_CSQ_APER_INDIRECT 0x1300 #define RADEON_CP_RB_WPTR_DELAY 0x0718 -# define RADEON_PRE_WRITE_TIMER_SHIFT 0 -# define RADEON_PRE_WRITE_LIMIT_SHIFT 23 +# define RADEON_PRE_WRITE_TIMER_SHIFT 0 +# define RADEON_PRE_WRITE_LIMIT_SHIFT 23 #define RADEON_AIC_CNTL 0x01d0 -# define RADEON_PCIGART_TRANSLATE_EN (1 << 0) +# define RADEON_PCIGART_TRANSLATE_EN (1 << 0) @@ -1755,14 +1892,12 @@ do { \ #define RADEON_CP_PACKET3_SET_SCISSORS 0xC0001E00 #define RADEON_CP_PACKET3_3D_RNDR_GEN_INDX_PRIM 0xC0002300 #define RADEON_CP_PACKET3_LOAD_MICROCODE 0xC0002400 -#define RADEON_CP_PACKET3_3D_RNDR_GEN_PRIM 0xC0002500 #define RADEON_CP_PACKET3_WAIT_FOR_IDLE 0xC0002600 #define RADEON_CP_PACKET3_3D_DRAW_VBUF 0xC0002800 #define RADEON_CP_PACKET3_3D_DRAW_IMMD 0xC0002900 #define RADEON_CP_PACKET3_3D_DRAW_INDX 0xC0002A00 #define RADEON_CP_PACKET3_LOAD_PALETTE 0xC0002C00 #define RADEON_CP_PACKET3_3D_LOAD_VBPNTR 0xC0002F00 -#define RADEON_CP_PACKET3_3D_CLEAR_ZMASK 0xC0003200 #define RADEON_CP_PACKET3_CNTL_PAINT 0xC0009100 #define RADEON_CP_PACKET3_CNTL_BITBLT 0xC0009200 #define RADEON_CP_PACKET3_CNTL_SMALLTEXT 0xC0009300 @@ -1817,6 +1952,47 @@ do { \ #define RADEON_CP_VC_CNTL_MAOS_ENABLE 0x00000080 #define RADEON_CP_VC_CNTL_VTX_FMT_NON_RADEON_MODE 0x00000000 #define RADEON_CP_VC_CNTL_VTX_FMT_RADEON_MODE 0x00000100 +#define RADEON_CP_VC_CNTL_TCL_DISABLE 0x00000000 +#define RADEON_CP_VC_CNTL_TCL_ENABLE 0x00000200 #define RADEON_CP_VC_CNTL_NUM_SHIFT 16 +#define RADEON_VS_MATRIX_0_ADDR 0 +#define RADEON_VS_MATRIX_1_ADDR 4 +#define RADEON_VS_MATRIX_2_ADDR 8 +#define RADEON_VS_MATRIX_3_ADDR 12 +#define RADEON_VS_MATRIX_4_ADDR 16 +#define RADEON_VS_MATRIX_5_ADDR 20 +#define RADEON_VS_MATRIX_6_ADDR 24 +#define RADEON_VS_MATRIX_7_ADDR 28 +#define RADEON_VS_MATRIX_8_ADDR 32 +#define RADEON_VS_MATRIX_9_ADDR 36 +#define RADEON_VS_MATRIX_10_ADDR 40 +#define RADEON_VS_MATRIX_11_ADDR 44 +#define RADEON_VS_MATRIX_12_ADDR 48 +#define RADEON_VS_MATRIX_13_ADDR 52 +#define RADEON_VS_MATRIX_14_ADDR 56 +#define RADEON_VS_MATRIX_15_ADDR 60 +#define RADEON_VS_LIGHT_AMBIENT_ADDR 64 +#define RADEON_VS_LIGHT_DIFFUSE_ADDR 72 +#define RADEON_VS_LIGHT_SPECULAR_ADDR 80 +#define RADEON_VS_LIGHT_DIRPOS_ADDR 88 +#define RADEON_VS_LIGHT_HWVSPOT_ADDR 96 +#define RADEON_VS_LIGHT_ATTENUATION_ADDR 104 +#define RADEON_VS_MATRIX_EYE2CLIP_ADDR 112 +#define RADEON_VS_UCP_ADDR 116 +#define RADEON_VS_GLOBAL_AMBIENT_ADDR 122 +#define RADEON_VS_FOG_PARAM_ADDR 123 +#define RADEON_VS_EYE_VECTOR_ADDR 124 + +#define RADEON_SS_LIGHT_DCD_ADDR 0 +#define RADEON_SS_LIGHT_SPOT_EXPONENT_ADDR 8 +#define RADEON_SS_LIGHT_SPOT_CUTOFF_ADDR 16 +#define RADEON_SS_LIGHT_SPECULAR_THRESH_ADDR 24 +#define RADEON_SS_LIGHT_RANGE_CUTOFF_ADDR 32 +#define RADEON_SS_VERT_GUARD_CLIP_ADJ_ADDR 48 +#define RADEON_SS_VERT_GUARD_DISCARD_ADJ_ADDR 49 +#define RADEON_SS_HORZ_GUARD_CLIP_ADJ_ADDR 50 +#define RADEON_SS_HORZ_GUARD_DISCARD_ADJ_ADDR 51 +#define RADEON_SS_SHININESS 60 + #endif diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_sarea.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_sarea.h index 2de92bd8a..788c6f690 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_sarea.h +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_sarea.h @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_sarea.h,v 1.4 2002/04/24 16:20:41 martin Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_sarea.h,v 1.5 2002/10/30 12:52:14 alanh Exp $ */ /* * Copyright 2000 ATI Technologies Inc., Markham, Ontario, * VA Linux Systems Inc., Fremont, California. @@ -168,23 +168,6 @@ typedef struct { /* Setup state */ unsigned int se_cntl_status; -#ifdef TCL_ENABLE - /* TCL state */ - radeon_color_regs_t se_tcl_material_emmissive; - radeon_color_regs_t se_tcl_material_ambient; - radeon_color_regs_t se_tcl_material_diffuse; - radeon_color_regs_t se_tcl_material_specular; - unsigned int se_tcl_shininess; - unsigned int se_tcl_output_vtx_fmt; - unsigned int se_tcl_output_vtx_sel; - unsigned int se_tcl_matrix_select_0; - unsigned int se_tcl_matrix_select_1; - unsigned int se_tcl_ucp_vert_blend_ctl; - unsigned int se_tcl_texture_proc_ctl; - unsigned int se_tcl_light_model_ctl; - unsigned int se_tcl_per_light_ctl[4]; -#endif - /* Misc state */ unsigned int re_top_left; unsigned int re_misc; @@ -198,13 +181,7 @@ typedef struct { unsigned int pp_txcblend; unsigned int pp_txablend; unsigned int pp_tfactor; - unsigned int pp_border_color; - -#ifdef CUBIC_ENABLE - unsigned int pp_cubic_faces; - unsigned int pp_cubic_offset[5]; -#endif } radeon_texture_regs_t; typedef struct { @@ -252,6 +229,9 @@ typedef struct { int texAge[RADEON_NR_TEX_HEAPS]; int ctxOwner; /* last context to upload state */ + int pfAllowPageFlip; /* set by the 2d driver, read by the client */ + int pfCurrentPage; /* set by kernel, read by others */ + int crtc2_base; /* for pageflipping with CloneMode */ } RADEONSAREAPriv, *RADEONSAREAPrivPtr; #endif diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_version.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_version.h index 460277c87..a1170d389 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_version.h +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_version.h @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_version.h,v 1.4 2002/04/06 19:06:07 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_version.h,v 1.8 2003/01/01 19:16:35 tsi Exp $ */ /* - * Copyright 2000 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 2000 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that @@ -24,14 +24,29 @@ #ifndef _RADEON_VERSION_H_ #define _RADEON_VERSION_H_ 1 +#undef RADEON_NAME +#undef RADEON_DRIVER_NAME +#undef R200_DRIVER_NAME +#undef RADEON_VERSION_MAJOR +#undef RADEON_VERSION_MINOR +#undef RADEON_VERSION_PATCH +#undef RADEON_VERSION_CURRENT +#undef RADEON_VERSION_EVALUATE +#undef RADEON_VERSION_STRINGIFY +#undef RADEON_VERSION_NAME + #define RADEON_NAME "RADEON" #define RADEON_DRIVER_NAME "radeon" +#define R200_DRIVER_NAME "r200" +#define RV250_DRIVER_NAME "r200" #define RADEON_VERSION_MAJOR 4 #define RADEON_VERSION_MINOR 0 #define RADEON_VERSION_PATCH 1 +#ifndef RADEON_VERSION_EXTRA #define RADEON_VERSION_EXTRA "" +#endif #define RADEON_VERSION_CURRENT \ ((RADEON_VERSION_MAJOR << 20) | \ diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_video.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_video.c index ed5e1738c..44ee2e688 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_video.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_video.c @@ -1,6 +1,8 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_video.c,v 1.18 2002/10/12 01:38:08 martin Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_video.c,v 1.24 2003/02/19 01:19:43 dawes Exp $ */ #include "radeon.h" +#include "radeon_macros.h" +#include "radeon_probe.h" #include "radeon_reg.h" #include "xf86.h" @@ -18,6 +20,8 @@ #define TIMER_MASK (OFF_TIMER | FREE_TIMER) +extern int gRADEONEntityIndex; + #ifndef XvExtension void RADEONInitVideo(ScreenPtr pScreen) {} #else @@ -60,7 +64,6 @@ typedef struct { Bool doubleBuffer; unsigned char currentBuffer; - FBLinearPtr linear; RegionRec clip; CARD32 colorKey; CARD32 videoStatus; @@ -384,6 +387,7 @@ RADEONResetVideo(ScrnInfoPtr pScrn) unsigned char *RADEONMMIO = info->MMIO; RADEONPortPrivPtr pPriv = info->adaptor->pPortPrivates[0].ptr; + if (info->accelOn) info->accel->Sync(pScrn); RADEONWaitForIdleMMIO(pScrn); OUTREG(RADEON_OV0_SCALE_CNTL, 0x80000000); @@ -400,21 +404,14 @@ RADEONResetVideo(ScrnInfoPtr pScrn) if (info->ChipFamily == CHIP_FAMILY_R200 || info->ChipFamily == CHIP_FAMILY_R300) { + int i; + OUTREG(RADEON_OV0_LIN_TRANS_A, 0x12a20000); OUTREG(RADEON_OV0_LIN_TRANS_B, 0x198a190e); OUTREG(RADEON_OV0_LIN_TRANS_C, 0x12a2f9da); OUTREG(RADEON_OV0_LIN_TRANS_D, 0xf2fe0442); OUTREG(RADEON_OV0_LIN_TRANS_E, 0x12a22046); OUTREG(RADEON_OV0_LIN_TRANS_F, 0x175f); - } else { - int i; - - OUTREG(RADEON_OV0_LIN_TRANS_A, 0x12a00000); - OUTREG(RADEON_OV0_LIN_TRANS_B, 0x1990190e); - OUTREG(RADEON_OV0_LIN_TRANS_C, 0x12a0f9c0); - OUTREG(RADEON_OV0_LIN_TRANS_D, 0xf3000442); - OUTREG(RADEON_OV0_LIN_TRANS_E, 0x12a02040); - OUTREG(RADEON_OV0_LIN_TRANS_F, 0x175f); /* * Set default Gamma ramp: @@ -427,6 +424,13 @@ RADEONResetVideo(ScrnInfoPtr pScrn) OUTREG(def_gamma[i].gammaReg, (def_gamma[i].gammaSlope<<16) | def_gamma[i].gammaOffset); } + } else { + OUTREG(RADEON_OV0_LIN_TRANS_A, 0x12a00000); + OUTREG(RADEON_OV0_LIN_TRANS_B, 0x1990190e); + OUTREG(RADEON_OV0_LIN_TRANS_C, 0x12a0f9c0); + OUTREG(RADEON_OV0_LIN_TRANS_D, 0xf3000442); + OUTREG(RADEON_OV0_LIN_TRANS_E, 0x12a02040); + OUTREG(RADEON_OV0_LIN_TRANS_F, 0x175f); } } @@ -676,10 +680,12 @@ RADEONStopVideo(ScrnInfoPtr pScrn, pointer data, Bool cleanup) if(pPriv->videoStatus & CLIENT_VIDEO_ON) { RADEONWaitForFifo(pScrn, 2); OUTREG(RADEON_OV0_SCALE_CNTL, 0); + if (info->cursor_start) + xf86ForceHWCursor (pScrn->pScreen, FALSE); } - if(pPriv->linear) { - xf86FreeOffscreenLinear(pPriv->linear); - pPriv->linear = NULL; + if(info->videoLinear) { + xf86FreeOffscreenLinear(info->videoLinear); + info->videoLinear = NULL; } pPriv->videoStatus = 0; } else { @@ -800,7 +806,7 @@ RADEONGetPortAttribute(ScrnInfoPtr pScrn, RADEONInfoPtr info = RADEONPTR(pScrn); RADEONPortPrivPtr pPriv = (RADEONPortPrivPtr)data; - info->accel->Sync(pScrn); + if (info->accelOn) info->accel->Sync(pScrn); if(attribute == xvAutopaintColorkey) *value = pPriv->autopaint_colorkey; @@ -1003,6 +1009,11 @@ RADEONDisplayVideo( offset1 += ((left >> 16) & ~7) << 1; offset2 += ((left >> 16) & ~7) << 1; + if (info->IsSecondary) { + offset1 += info->FbMapSize; + offset2 += info->FbMapSize; + } + tmp = (left & 0x0003ffff) + 0x00028000 + (h_inc << 3); p1_h_accum_init = ((tmp << 4) & 0x000f8000) | ((tmp << 12) & 0xf0000000); @@ -1018,7 +1029,7 @@ RADEONDisplayVideo( RADEONWaitForFifo(pScrn, 2); OUTREG(RADEON_OV0_REG_LOAD_CNTL, 1); - RADEONWaitForIdleMMIO(pScrn); + if (info->accelOn) info->accel->Sync(pScrn); while(!(INREG(RADEON_OV0_REG_LOAD_CNTL) & (1 << 3))); RADEONWaitForFifo(pScrn, 14); @@ -1034,14 +1045,12 @@ RADEONDisplayVideo( x_off = 0; /* Put the hardware overlay on CRTC2: - * For now, the CRTC2 overlay is only implemented for clone mode. - * Xinerama 2nd head will be similar, but there are other issues. * * Since one hardware overlay can not be displayed on two heads * at the same time, we might need to consider using software - * rendering for the second head (do we really need it?). + * rendering for the second head. */ - if (info->Clone && info->OverlayOnCRTC2) { + if ((info->Clone && info->OverlayOnCRTC2) || info->IsSecondary) { x_off = 0; OUTREG(RADEON_OV1_Y_X_START, ((dstBox->x1 + x_off @@ -1133,6 +1142,13 @@ RADEONPutImage( int top, left, npixels, nlines, bpp; BoxRec dstBox; CARD32 tmp; +#if X_BYTE_ORDER == X_BIG_ENDIAN + unsigned char *RADEONMMIO = info->MMIO; + CARD32 surface_cntl = INREG(RADEON_SURFACE_CNTL); + + OUTREG(RADEON_SURFACE_CNTL, (surface_cntl | + RADEON_NONSURF_AP0_SWP_32BPP) & ~RADEON_NONSURF_AP0_SWP_16BPP); +#endif /* * s2offset, s3offset - byte offsets into U and V plane of the @@ -1194,7 +1210,7 @@ RADEONPutImage( break; } - if(!(pPriv->linear = RADEONAllocateMemory(pScrn, pPriv->linear, + if(!(info->videoLinear = RADEONAllocateMemory(pScrn, info->videoLinear, pPriv->doubleBuffer ? (new_size << 1) : new_size))) { return BadAlloc; @@ -1207,9 +1223,10 @@ RADEONPutImage( left = (xa >> 16) & ~1; npixels = ((((xb + 0xffff) >> 16) + 1) & ~1) - left; - offset = (pPriv->linear->offset * bpp) + (top * dstPitch); + offset = (info->videoLinear->offset * bpp) + (top * dstPitch); if(pPriv->doubleBuffer) offset += pPriv->currentBuffer * new_size * bpp; + dst_start = info->FB + offset; switch(id) { @@ -1226,24 +1243,13 @@ RADEONPutImage( s3offset = tmp; } nlines = ((((yb + 0xffff) >> 16) + 1) & ~1) - top; - { - #if X_BYTE_ORDER == X_BIG_ENDIAN - unsigned char *RADEONMMIO = info->MMIO; - CARD32 surface_cntl; - - surface_cntl = INREG(RADEON_SURFACE_CNTL); - OUTREG(RADEON_SURFACE_CNTL, (surface_cntl | - RADEON_NONSURF_AP0_SWP_32BPP) & ~RADEON_NONSURF_AP0_SWP_16BPP); + OUTREG(RADEON_SURFACE_CNTL, (surface_cntl | RADEON_NONSURF_AP0_SWP_32BPP) + & ~RADEON_NONSURF_AP0_SWP_16BPP); #endif RADEONCopyMungedData(buf + (top * srcPitch) + left, buf + s2offset, - buf + s3offset, dst_start, srcPitch, srcPitch2, - dstPitch, nlines, npixels); -#if X_BYTE_ORDER == X_BIG_ENDIAN - /* restore byte swapping */ - OUTREG(RADEON_SURFACE_CNTL, surface_cntl); -#endif - } + buf + s3offset, dst_start, srcPitch, srcPitch2, + dstPitch, nlines, npixels); break; case FOURCC_UYVY: case FOURCC_YUY2: @@ -1252,10 +1258,18 @@ RADEONPutImage( buf += (top * srcPitch) + left; nlines = ((yb + 0xffff) >> 16) - top; dst_start += left; +#if X_BYTE_ORDER == X_BIG_ENDIAN + OUTREG(RADEON_SURFACE_CNTL, surface_cntl & ~(RADEON_NONSURF_AP0_SWP_32BPP + | RADEON_NONSURF_AP0_SWP_16BPP)); +#endif RADEONCopyData(buf, dst_start, srcPitch, dstPitch, nlines, npixels); break; } +#if X_BYTE_ORDER == X_BIG_ENDIAN + /* restore byte swapping */ + OUTREG(RADEON_SURFACE_CNTL, surface_cntl); +#endif /* update cliplist */ if(!RegionsEqual(&pPriv->clip, clipBoxes)) @@ -1269,6 +1283,9 @@ RADEONPutImage( REGION_RECTS(clipBoxes)); } + if (info->cursor_start && !(pPriv->videoStatus & CLIENT_VIDEO_ON)) + xf86ForceHWCursor (pScrn->pScreen, TRUE); + RADEONDisplayVideo(pScrn, id, offset, offset, width, height, dstPitch, xa, xb, ya, &dstBox, src_w, src_h, drw_w, drw_h); @@ -1333,15 +1350,19 @@ RADEONVideoTimerCallback(ScrnInfoPtr pScrn, Time now) if(pPriv->offTime < now) { unsigned char *RADEONMMIO = info->MMIO; OUTREG(RADEON_OV0_SCALE_CNTL, 0); + if (info->cursor_start && pPriv->videoStatus & CLIENT_VIDEO_ON) + xf86ForceHWCursor (pScrn->pScreen, FALSE); pPriv->videoStatus = FREE_TIMER; pPriv->freeTime = now + FREE_DELAY; } } else { /* FREE_TIMER */ if(pPriv->freeTime < now) { - if(pPriv->linear) { - xf86FreeOffscreenLinear(pPriv->linear); - pPriv->linear = NULL; + if(info->videoLinear) { + xf86FreeOffscreenLinear(info->videoLinear); + info->videoLinear = NULL; } + if (info->cursor_start && pPriv->videoStatus & CLIENT_VIDEO_ON) + xf86ForceHWCursor (pScrn->pScreen, FALSE); pPriv->videoStatus = 0; info->VideoTimerCallback = NULL; } @@ -1523,6 +1544,8 @@ RADEONDisplaySurface( if (portPriv->videoStatus & CLIENT_VIDEO_ON) { REGION_EMPTY(pScrn->pScreen, &portPriv->clip); UpdateCurrentTime(); + if (info->cursor_start) + xf86ForceHWCursor (pScrn->pScreen, FALSE); portPriv->videoStatus = FREE_TIMER; portPriv->freeTime = currentTime.milliseconds + FREE_DELAY; info->VideoTimerCallback = RADEONVideoTimerCallback; |