909 files changed, 150256 insertions, 54770 deletions

diff --git a/xc/programs/Xserver/hw/darwin/bundle/English.lproj/InfoPlist.strings.cpp b/xc/programs/Xserver/hw/darwin/bundle/English.lproj/InfoPlist.strings.cpp
index a0313d3fc..99211244e 100644
--- a/xc/programs/Xserver/hw/darwin/bundle/English.lproj/InfoPlist.strings.cpp
+++ b/xc/programs/Xserver/hw/darwin/bundle/English.lproj/InfoPlist.strings.cpp
@@ -1,5 +1,5 @@
 /* English versions of the Info.plist keys; used by most localizations. */
 /* Most of these are set in the target application settings. */
-/* $XFree86: xc/programs/Xserver/hw/darwin/bundle/English.lproj/InfoPlist.strings.cpp,v 1.3 2002/07/17 01:24:55 torrey Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/darwin/bundle/English.lproj/InfoPlist.strings.cpp,v 1.4 2003/01/15 02:34:04 torrey Exp $ */
 
-NSHumanReadableCopyright = __quote__XFree86 XF86_VERSION\nCopyright 2002 XFree86 Project, Inc.__quote__;
+NSHumanReadableCopyright = __quote__XFree86 XF86_VERSION\nCopyright 2003 XFree86 Project, Inc.__quote__;
diff --git a/xc/programs/Xserver/hw/darwin/darwin.c b/xc/programs/Xserver/hw/darwin/darwin.c
index ff82621cc..ff5ae1b33 100644
--- a/xc/programs/Xserver/hw/darwin/darwin.c
+++ b/xc/programs/Xserver/hw/darwin/darwin.c
@@ -29,7 +29,7 @@
  * holders shall not be used in advertising or otherwise to promote the sale,
  * use or other dealings in this Software without prior written authorization.
  */
-/* $XFree86: xc/programs/Xserver/hw/darwin/darwin.c,v 1.46 2002/10/12 00:32:43 torrey Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/darwin/darwin.c,v 1.50 2003/02/26 09:21:33 dawes Exp $ */
 
 #include "X.h"
 #include "Xproto.h"
@@ -44,6 +44,7 @@
 #include "site.h"
 #include "globals.h"
 #include "xf86Version.h"
+#include "xf86Date.h"
 #include "dix.h"
 
 #include <sys/types.h>
@@ -67,7 +68,7 @@
  */
 int                     darwinScreensFound = 0;
 int                     darwinScreenIndex = 0;
-DarwinInputRec          hid;
+io_connect_t            darwinParamConnect = 0;
 int                     darwinEventFD = -1;
 Bool                    quartz = FALSE;
 int                     quartzMouseAccelChange = 1;
@@ -201,26 +202,25 @@ static Bool DarwinAddScreen(
     if (! ret)
         return FALSE;
 
-    bitsPerRGB = dfb->pixelInfo.bitsPerComponent;
+    bitsPerRGB = dfb->bitsPerComponent;
 
     // reset the visual list
     miClearVisualTypes();
 
     // setup a single visual appropriate for our pixel type
-    // Note: Darwin kIORGBDirectPixels = X TrueColor, not DirectColor
-    if (dfb->pixelInfo.pixelType == kIORGBDirectPixels) {
+    if (dfb->colorType == TrueColor) {
         if (!miSetVisualTypes( dfb->colorBitsPerPixel, TrueColorMask,
-                                bitsPerRGB, TrueColor )) {
+                               bitsPerRGB, TrueColor )) {
             return FALSE;
         }
-    } else if (dfb->pixelInfo.pixelType == kIOCLUTPixels) {
+    } else if (dfb->colorType == PseudoColor) {
         if (!miSetVisualTypes( dfb->colorBitsPerPixel, PseudoColorMask,
-                                bitsPerRGB, PseudoColor )) {
+                               bitsPerRGB, PseudoColor )) {
             return FALSE;
         }
-    } else if (dfb->pixelInfo.pixelType == kIOFixedCLUTPixels) {
+    } else if (dfb->colorType == StaticColor) {
         if (!miSetVisualTypes( dfb->colorBitsPerPixel, StaticColorMask,
-                                bitsPerRGB, StaticColor )) {
+                               bitsPerRGB, StaticColor )) {
             return FALSE;
         }
     } else {
@@ -255,15 +255,9 @@ static Bool DarwinAddScreen(
                 visual->offsetRed = bitsPerRGB * 2;
                 visual->offsetGreen = bitsPerRGB;
                 visual->offsetBlue = 0;
-#if TRUE
                 visual->redMask = ((1<<bitsPerRGB)-1) << visual->offsetRed;
                 visual->greenMask = ((1<<bitsPerRGB)-1) << visual->offsetGreen;
                 visual->blueMask = ((1<<bitsPerRGB)-1) << visual->offsetBlue;
-#else
-                visual->redMask = dfb->pixelInfo.componentMasks[0];
-                visual->greenMask = dfb->pixelInfo.componentMasks[1];
-                visual->blueMask = dfb->pixelInfo.componentMasks[2];
-#endif
             }
         }
     }
@@ -303,7 +297,7 @@ static Bool DarwinAddScreen(
      * to Darwin/x86 in 8-bit mode.
      */
     if( (dfb->colorBitsPerPixel == 8) &&
-                (dfb->pixelInfo.pixelType == kIOFixedCLUTPixels) )
+                (dfb->colorType == StaticColor) )
     {
         pmap = miInstalledMaps[pScreen->myNum];
         visual = pmap->pVisual;
@@ -347,7 +341,7 @@ static void DarwinChangePointerControl(
         return;
 
     acceleration = ctrl->num / ctrl->den;
-    kr = IOHIDSetMouseAcceleration( hid.paramConnect, acceleration );
+    kr = IOHIDSetMouseAcceleration( darwinParamConnect, acceleration );
     if (kr != KERN_SUCCESS)
         ErrorF( "Could not set mouse acceleration with kernel return = 0x%x.\n", kr );
 }
@@ -536,6 +530,12 @@ void InitInput( int argc, char **argv )
     RegisterKeyboardDevice( darwinKeyboard );
 
     DarwinEQInit( (DevicePtr)darwinKeyboard, (DevicePtr)darwinPointer );
+
+    if (quartz) {
+        QuartzInitInput(argc, argv);
+    } else {
+        XFIOKitInitInput(argc, argv);
+    }
 }
 
 
diff --git a/xc/programs/Xserver/hw/darwin/darwin.h b/xc/programs/Xserver/hw/darwin/darwin.h
index 8b6e0209a..62698d74a 100644
--- a/xc/programs/Xserver/hw/darwin/darwin.h
+++ b/xc/programs/Xserver/hw/darwin/darwin.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2001 Torrey T. Lyons. All Rights Reserved.
+ * Copyright (c) 2001-2002 Torrey T. Lyons. All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -23,44 +23,37 @@
  * holders shall not be used in advertising or otherwise to promote the sale,
  * use or other dealings in this Software without prior written authorization.
  */
-/* $XFree86: xc/programs/Xserver/hw/darwin/darwin.h,v 1.12 2002/10/12 00:32:44 torrey Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/darwin/darwin.h,v 1.15 2002/12/10 00:00:38 torrey Exp $ */
 
 #ifndef _DARWIN_H
 #define _DARWIN_H
 
-#include <pthread.h>
-#include <IOKit/graphics/IOFramebufferShared.h>
+#include <IOKit/IOTypes.h>
 #include "inputstr.h"
 #include "screenint.h"
 #include "extensions/XKB.h"
 #include "quartz/quartzShared.h"
 
 typedef struct {
-    io_connect_t        fbService;
     void                *framebuffer;
     int                 x;
     int                 y;
     int                 width;
     int                 height;
     int                 pitch;
+    int                 colorType;
     int                 bitsPerPixel;
     int                 colorBitsPerPixel;
-    IOPixelInformation  pixelInfo;
-    StdFBShmem_t        *cursorShmem;
+    int                 bitsPerComponent;
 } DarwinFramebufferRec, *DarwinFramebufferPtr;
 
-typedef struct {
-    pthread_t           thread;
-    io_connect_t        connect;
-    io_connect_t        paramConnect;  
-} DarwinInputRec;
-
 
 void xf86SetRootClip (ScreenPtr pScreen, BOOL enable);
 
 // From darwinEvents.c
 Bool DarwinEQInit(DevicePtr pKbd, DevicePtr pPtr);
 void DarwinEQEnqueue(const xEvent *e);
+void DarwinEQPointerPost(xEvent *e);
 void DarwinEQSwitchScreen(ScreenPtr pScreen, Bool fromDIX);
 
 // From darwinKeyboard.c
@@ -88,7 +81,7 @@ int DarwinModifierStringToNXKey(const char *string);
  */
 extern int              darwinScreenIndex; // index into pScreen.devPrivates
 extern int              darwinScreensFound;
-extern DarwinInputRec   hid;
+extern io_connect_t     darwinParamConnect;
 extern int              darwinEventFD;
 extern Bool             quartz;
 
@@ -104,6 +97,7 @@ enum {
                             // recapture screen and restore X drawing
   kXDarwinHide,             // vt switch away from X server;
                             // release screen and clip X drawing
+  kXDarwinSetRootClip,      // enable or disable drawing to the X screen
   kXDarwinQuit,             // kill the X server and release the display
   kXDarwinReadPasteboard,   // copy Mac OS X pasteboard into X cut buffer
   kXDarwinWritePasteboard   // copy X cut buffer onto Mac OS X pasteboard
diff --git a/xc/programs/Xserver/hw/darwin/darwinEvents.c b/xc/programs/Xserver/hw/darwin/darwinEvents.c
index d0cd7880b..72d7eff05 100644
--- a/xc/programs/Xserver/hw/darwin/darwinEvents.c
+++ b/xc/programs/Xserver/hw/darwin/darwinEvents.c
@@ -212,6 +212,19 @@ DarwinEQEnqueue(
 }
 
 
+/*
+ * DarwinEQPointerPost
+ *  Post a pointer event. Used by the mipointer.c routines.
+ */
+void
+DarwinEQPointerPost(
+    xEvent *e)
+{
+    (*darwinEventQueue.pPtr->processInputProc)
+            (e, (DeviceIntPtr)darwinEventQueue.pPtr, 1);
+}
+
+
 void
 DarwinEQSwitchScreen(
     ScreenPtr   pScreen,
@@ -288,6 +301,9 @@ void ProcessInputEvents(void)
 	    	break;
 
 	    case ButtonPress:
+                miPointerAbsoluteCursor(xe.u.keyButtonPointer.rootX,
+                                        xe.u.keyButtonPointer.rootY,
+                                        xe.u.keyButtonPointer.time);
                 if (darwinFakeButtons && xe.u.u.detail == 1) {
                     // Mimic multi-button mouse with modifier-clicks
                     // If both sets of modifiers are pressed,
@@ -314,6 +330,9 @@ void ProcessInputEvents(void)
                 break;
 
             case ButtonRelease:
+                miPointerAbsoluteCursor(xe.u.keyButtonPointer.rootX,
+                                        xe.u.keyButtonPointer.rootY,
+                                        xe.u.keyButtonPointer.time);
                 if (darwinFakeButtons && xe.u.u.detail == 1 &&
                     darwinFakeMouseButtonDown)
                 {
@@ -336,8 +355,9 @@ void ProcessInputEvents(void)
                 break;
 
             case MotionNotify:
-	    	(*darwinEventQueue.pPtr->processInputProc)
-                        (&xe, (DeviceIntPtr)darwinEventQueue.pPtr, 1);
+                miPointerAbsoluteCursor(xe.u.keyButtonPointer.rootX,
+                                        xe.u.keyButtonPointer.rootY,
+                                        xe.u.keyButtonPointer.time);
 	    	break;
 
             case kXDarwinUpdateModifiers:
diff --git a/xc/programs/Xserver/hw/darwin/darwinKeyboard.c b/xc/programs/Xserver/hw/darwin/darwinKeyboard.c
index b13463fb2..4113bacba 100644
--- a/xc/programs/Xserver/hw/darwin/darwinKeyboard.c
+++ b/xc/programs/Xserver/hw/darwin/darwinKeyboard.c
@@ -36,7 +36,7 @@
 //
 //=============================================================================
 
-/* $XFree86: xc/programs/Xserver/hw/darwin/darwinKeyboard.c,v 1.16 2002/03/28 02:21:08 torrey Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/darwin/darwinKeyboard.c,v 1.17 2002/12/10 00:00:38 torrey Exp $ */
 
 /*
 ===========================================================================
@@ -393,7 +393,7 @@ Bool DarwinReadKeymapFile(
 
     // find the keyboard interface and handler id
     size = sizeof( info ) / sizeof( int );
-    if (!NXEventSystemInfo( hid.paramConnect, NX_EVS_DEVICE_INFO,
+    if (!NXEventSystemInfo( darwinParamConnect, NX_EVS_DEVICE_INFO,
                             (NXEventSystemInfoType) info, &size )) {
         ErrorF("Error reading event status driver info.\n");
         return FALSE;
@@ -476,7 +476,7 @@ void DarwinKeyboardInit(
     // Open a shared connection to the HID System.
     // Note that the Event Status Driver is really just a wrapper
     // for a kIOHIDParamConnectType connection.
-    assert( hid.paramConnect = NXOpenEventStatus() );
+    assert( darwinParamConnect = NXOpenEventStatus() );
 
     if (darwinKeymapFile) {
         haveKeymap = DarwinReadKeymapFile(&keyMap);
@@ -491,9 +491,9 @@ void DarwinKeyboardInit(
 
     if (!haveKeymap) {
         // get the Darwin keyboard map
-        keyMap.size = NXKeyMappingLength( hid.paramConnect );
+        keyMap.size = NXKeyMappingLength( darwinParamConnect );
         keyMap.mapping = (char*) xalloc( keyMap.size );
-        if (!NXGetKeyMapping( hid.paramConnect, &keyMap )) {
+        if (!NXGetKeyMapping( darwinParamConnect, &keyMap )) {
             FatalError("Could not get kernel keymapping! Load keymapping from file instead.\n");
         }
     }
diff --git a/xc/programs/Xserver/hw/darwin/quartz/Imakefile b/xc/programs/Xserver/hw/darwin/quartz/Imakefile
index d547fe97c..d510f3a1a 100644
--- a/xc/programs/Xserver/hw/darwin/quartz/Imakefile
+++ b/xc/programs/Xserver/hw/darwin/quartz/Imakefile
@@ -1,4 +1,4 @@
-XCOMM $XFree86: xc/programs/Xserver/hw/darwin/quartz/Imakefile,v 1.4 2002/07/24 05:58:33 torrey Exp $
+XCOMM $XFree86: xc/programs/Xserver/hw/darwin/quartz/Imakefile,v 1.5 2002/12/05 01:07:40 torrey Exp $
 
 #include <Server.tmpl>
 
@@ -46,7 +46,7 @@ OBJS =  Preferences.o \
 
 INCLUDES = -I. -I$(SERVERSRC)/fb -I$(SERVERSRC)/mi -I$(SERVERSRC)/include \
            -I$(XINCLUDESRC) -I$(FONTINCSRC) -I$(SERVERSRC)/render \
-           -I$(EXTINCSRC) -I.. -I$(SERVERSRC)/Xext
+           -I$(SERVERSRC)/miext/shadow -I$(EXTINCSRC) -I.. -I$(SERVERSRC)/Xext
 
 #if defined(XFree86CustomVersion)
 CUSTOMVERSION = XFree86CustomVersion
diff --git a/xc/programs/Xserver/hw/darwin/quartz/Preferences.h b/xc/programs/Xserver/hw/darwin/quartz/Preferences.h
index 6a84bbd01..2c0d6756b 100644
--- a/xc/programs/Xserver/hw/darwin/quartz/Preferences.h
+++ b/xc/programs/Xserver/hw/darwin/quartz/Preferences.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/darwin/quartz/Preferences.h,v 1.1 2002/03/28 02:21:18 torrey Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/darwin/quartz/Preferences.h,v 1.2 2003/01/15 02:34:05 torrey Exp $ */
 
 #import <Cocoa/Cocoa.h>
 
@@ -53,6 +53,7 @@
 + (void)setMouseAccelChange:(BOOL)newMouseAccelChange;
 + (void)setUseQDCursor:(int)newUseQDCursor;
 + (void)setRootless:(BOOL)newRootless;
++ (void)setUseAGL:(BOOL)newUseAGL;
 + (void)setModeWindow:(BOOL)newModeWindow;
 + (void)setStartupHelp:(BOOL)newStartupHelp;
 + (void)setSystemBeep:(BOOL)newSystemBeep;
@@ -77,6 +78,7 @@
 + (BOOL)mouseAccelChange;
 + (int)useQDCursor;
 + (BOOL)rootless;
++ (BOOL)useAGL;
 + (BOOL)modeWindow;
 + (BOOL)startupHelp;
 + (BOOL)systemBeep;
diff --git a/xc/programs/Xserver/hw/darwin/quartz/Preferences.m b/xc/programs/Xserver/hw/darwin/quartz/Preferences.m
index c17c997ea..4f8dacbf0 100644
--- a/xc/programs/Xserver/hw/darwin/quartz/Preferences.m
+++ b/xc/programs/Xserver/hw/darwin/quartz/Preferences.m
@@ -3,7 +3,7 @@
 //
 //  This class keeps track of the user preferences.
 //
-/* $XFree86: xc/programs/Xserver/hw/darwin/quartz/Preferences.m,v 1.1 2002/03/28 02:21:18 torrey Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/darwin/quartz/Preferences.m,v 1.2 2003/01/15 02:34:06 torrey Exp $ */
 
 #import "Preferences.h"
 #import "quartzCommon.h"
@@ -30,7 +30,8 @@
         NSLocalizedString(@"USA.keymapping",@""), @"KeymappingFile",
         @"YES", @"UseKeymappingFile",
         NSLocalizedString(@"Cmd-Opt-a",@""), @"SwitchString",
-        @"NO", @"UseRootlessMode",
+        @"YES", @"UseRootlessMode",
+        @"YES", @"UseAGLforGLX",
         @"YES", @"ShowModePickWindow",
         @"YES", @"ShowStartupHelp",
         [NSNumber numberWithInt:0], @"SwitchKeyCode",
@@ -331,6 +332,12 @@
             forKey:@"UseRootlessMode"];
 }
 
++ (void)setUseAGL:(BOOL)newUseAGL
+{
+    [[NSUserDefaults standardUserDefaults] setBool:newUseAGL
+            forKey:@"UseAGLforGLX"];
+}
+
 + (void)setStartupHelp:(BOOL)newStartupHelp
 {
     [[NSUserDefaults standardUserDefaults] setBool:newStartupHelp
@@ -462,6 +469,12 @@
                 boolForKey:@"UseRootlessMode"];
 }
 
++ (BOOL)useAGL
+{
+    return [[NSUserDefaults standardUserDefaults]
+                boolForKey:@"UseAGLforGLX"];
+}
+
 + (BOOL)modeWindow
 {
     return [[NSUserDefaults standardUserDefaults]
diff --git a/xc/programs/Xserver/hw/darwin/quartz/XDarwin.pbproj/project.pbxproj b/xc/programs/Xserver/hw/darwin/quartz/XDarwin.pbproj/project.pbxproj
index 30b591fd5..eeefd261b 100644
--- a/xc/programs/Xserver/hw/darwin/quartz/XDarwin.pbproj/project.pbxproj
+++ b/xc/programs/Xserver/hw/darwin/quartz/XDarwin.pbproj/project.pbxproj
@@ -6,51 +6,61 @@
 	objectVersion = 38;
 	objects = {
 		01279092000747AA0A000002 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			path = XServer.m;
 			refType = 4;
 		};
 		0127909600074AF60A000002 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			path = XApplication.m;
 			refType = 4;
 		};
 		0127909800074B1A0A000002 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			path = XApplication.h;
 			refType = 4;
 		};
 		014C68ED00ED6A9D7F000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			path = XView.h;
 			refType = 4;
 		};
 		014C68EE00ED6A9D7F000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			path = XView.m;
 			refType = 4;
 		};
 		014C68F200ED7AD67F000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			path = fakeBoxRec.h;
 			refType = 4;
 		};
 		014C68F300EE5AB97F000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			path = rootlessCommon.c;
 			refType = 4;
 		};
 		014C68F400EE5AB97F000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			path = rootlessCommon.h;
 			refType = 4;
 		};
 		014C68F700EE678F7F000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			path = rootlessWindow.c;
 			refType = 4;
 		};
 		014C68F800EE678F7F000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			path = rootlessWindow.h;
 			refType = 4;
@@ -90,11 +100,13 @@
 			refType = 0;
 		};
 		017D6F4400E861FB7F000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			path = rootlessGC.c;
 			refType = 4;
 		};
 		017D6F4500E861FB7F000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			path = rootlessScreen.c;
 			refType = 4;
@@ -113,36 +125,43 @@
 			refType = 4;
 		};
 		018F40F3003E1916CE6F79C2 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			path = darwin.c;
 			refType = 4;
 		};
 		018F40F6003E1974CE6F79C2 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			path = darwinKeyboard.c;
 			refType = 4;
 		};
 		018F40F8003E1979CE6F79C2 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			path = quartz.c;
 			refType = 4;
 		};
 		018F40FA003E197ECE6F79C2 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			path = quartz.h;
 			refType = 4;
 		};
 		018F40FC003E1983CE6F79C2 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			path = xfIOKit.c;
 			refType = 4;
 		};
 		018F40FE003E1988CE6F79C2 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			path = xfIOKit.h;
 			refType = 4;
 		};
 		018F4100003E19E4CE6F79C2 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			path = xfIOKitCursor.c;
 			refType = 4;
@@ -158,16 +177,19 @@
 //023
 //024
 		021D6BA9003E1BACCE6F79C2 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			path = darwin.h;
 			refType = 4;
 		};
 		02A1FEA6006D34BE416877C2 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			path = xfIOKitStartup.c;
 			refType = 4;
 		};
 		02A1FEA8006D38F0416877C2 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			path = quartzStartup.c;
 			refType = 4;
@@ -190,6 +212,7 @@
 			refType = 4;
 		};
 		02E03CA100348209CE6F79C2 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			name = English;
 			path = English.lproj/XDarwinHelp.html;
@@ -206,6 +229,7 @@
 //033
 //034
 		0338412F0083BFE57F000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			path = quartzCursor.h;
 			refType = 4;
@@ -221,11 +245,13 @@
 //043
 //044
 		04329610000763920A000002 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			path = Preferences.m;
 			refType = 4;
 		};
 		04329611000763920A000002 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			path = Preferences.h;
 			refType = 4;
@@ -241,6 +267,7 @@
 //063
 //064
 		06EB6C3B004099E7CE6F79C2 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			path = quartzShared.h;
 			refType = 4;
@@ -287,6 +314,7 @@
 			refType = 4;
 		};
 		089C165DFE840E0CC02AAC07 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			name = English;
 			path = English.lproj/InfoPlist.strings;
@@ -326,6 +354,8 @@
 				WRAPPER_EXTENSION = app;
 			};
 			dependencies = (
+				6EF065C903D4F0CA006877C2,
+				6EF065C703D4EE19006877C2,
 			);
 			isa = PBXApplicationTarget;
 			name = XDarwin;
@@ -341,7 +371,7 @@
 	<key>CFBundleExecutable</key>
 	<string>XDarwin</string>
 	<key>CFBundleGetInfoString</key>
-	<string>XDarwin 1.2a2, ©2001-2002 XFree86 Project, Inc.</string>
+	<string>XDarwin 1.2b4, ©2001-2003 XFree86 Project, Inc.</string>
 	<key>CFBundleIconFile</key>
 	<string>XDarwin.icns</string>
 	<key>CFBundleIdentifier</key>
@@ -353,7 +383,7 @@
 	<key>CFBundlePackageType</key>
 	<string>APPL</string>
 	<key>CFBundleShortVersionString</key>
-	<string>XDarwin 1.2a2</string>
+	<string>XDarwin 1.2b4</string>
 	<key>CFBundleSignature</key>
 	<string>????</string>
 	<key>CFBundleVersion</key>
@@ -367,7 +397,6 @@
 </dict>
 </plist>
 ";
-			shouldUseHeadermap = 0;
 		};
 		0A79E1A0004499A1CE6F79C2 = {
 			buildActionMask = 2147483647;
@@ -506,6 +535,7 @@
 			refType = 4;
 		};
 		1220774400712D2D416877C2 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			name = English;
 			path = English.lproj/Localizable.strings;
@@ -518,6 +548,7 @@
 			};
 		};
 		1220774600712D75416877C2 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			name = Japanese;
 			path = Japanese.lproj/Localizable.strings;
@@ -534,6 +565,7 @@
 //173
 //174
 		170DFAFF00729A35416877C2 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			path = XDarwinStartup.c;
 			refType = 4;
@@ -563,6 +595,8 @@
 		19C28FACFE9D520D11CA2CBB = {
 			children = (
 				0A79E19E004499A1CE6F79C2,
+				6EF7C58703D3BC6D00000104,
+				6EF065C603D4EE19006877C2,
 			);
 			isa = PBXGroup;
 			name = Products;
@@ -596,6 +630,7 @@
 			refType = 4;
 		};
 		1BD8DE4300B8A3567F000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			name = English;
 			path = English.lproj/InfoPlist.strings.cpp;
@@ -619,18 +654,21 @@
 			refType = 4;
 		};
 		1BD8DE4500B8A38E7F000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			name = English;
 			path = English.lproj/XDarwinHelp.html.cpp;
 			refType = 4;
 		};
 		1BD8DE4700B8A3C77F000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			name = Japanese;
 			path = Japanese.lproj/InfoPlist.strings.cpp;
 			refType = 4;
 		};
 		1BD8DE4800B8A4167F000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			name = Japanese;
 			path = Japanese.lproj/XDarwinHelp.html.cpp;
@@ -653,6 +691,7 @@
 //1C3
 //1C4
 		1C4A3109004D8F24CE6F79C2 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			path = XServer.h;
 			refType = 4;
@@ -668,6 +707,7 @@
 //233
 //234
 		237A34C10076E37E7F000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			path = quartzAudio.c;
 			refType = 4;
@@ -692,6 +732,7 @@
 			name = Deployment;
 		};
 		237A34C40076F4F07F000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			path = quartzAudio.h;
 			refType = 4;
@@ -711,6 +752,7 @@
 				237A34C20076E37E7F000001,
 				237A34C30076E37E7F000001,
 			);
+			hasScannedForEncodings = 1;
 			isa = PBXProject;
 			knownRegions = (
 				English,
@@ -727,6 +769,8 @@
 			projectDirPath = "";
 			targets = (
 				0A79E19F004499A1CE6F79C2,
+				6EF7C58603D3BC6D00000104,
+				6EF065C503D4EE19006877C2,
 			);
 		};
 		29B97314FDCFA39411CA2CEA = {
@@ -856,31 +900,37 @@
 			refType = 4;
 		};
 		32FEE13E00E07CBE7F000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			path = rootless.h;
 			refType = 4;
 		};
 		32FEE13F00E07CBE7F000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			path = rootlessAqua.h;
 			refType = 4;
 		};
 		32FEE14000E07CBE7F000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			path = rootlessAquaGlue.c;
 			refType = 4;
 		};
 		32FEE14100E07CBE7F000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			path = rootlessAquaImp.h;
 			refType = 4;
 		};
 		32FEE14200E07CBE7F000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			path = rootlessAquaImp.m;
 			refType = 4;
 		};
 		32FEE14900E07D317F000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			path = rootlessValTree.c;
 			refType = 4;
@@ -896,6 +946,7 @@
 //353
 //354
 		3576829A0077B8F17F000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			path = quartzCursor.c;
 			refType = 4;
@@ -911,6 +962,7 @@
 //3E3
 //3E4
 		3E74E03600863F047F000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			path = darwinClut8.h;
 			refType = 4;
@@ -946,16 +998,19 @@
 			refType = 4;
 		};
 		43B962CF00617089416877C2 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			path = quartzCocoa.m;
 			refType = 4;
 		};
 		43B962D000617089416877C2 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			path = quartzPasteboard.c;
 			refType = 4;
 		};
 		43B962D100617089416877C2 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			path = quartzPasteboard.h;
 			refType = 4;
@@ -967,6 +1022,7 @@
 			refType = 4;
 		};
 		43B962E100617B49416877C2 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			name = Japanese;
 			path = Japanese.lproj/InfoPlist.strings;
@@ -979,6 +1035,7 @@
 			refType = 4;
 		};
 		43B962E300617B93416877C2 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			name = Japanese;
 			path = Japanese.lproj/XDarwinHelp.html;
@@ -989,6 +1046,211 @@
 //432
 //433
 //434
+//6E0
+//6E1
+//6E2
+//6E3
+//6E4
+		6EF065C003D4EE19006877C2 = {
+			buildActionMask = 2147483647;
+			files = (
+			);
+			isa = PBXHeadersBuildPhase;
+			runOnlyForDeploymentPostprocessing = 0;
+		};
+		6EF065C103D4EE19006877C2 = {
+			buildActionMask = 2147483647;
+			files = (
+			);
+			isa = PBXResourcesBuildPhase;
+			runOnlyForDeploymentPostprocessing = 0;
+		};
+		6EF065C203D4EE19006877C2 = {
+			buildActionMask = 2147483647;
+			files = (
+			);
+			isa = PBXSourcesBuildPhase;
+			runOnlyForDeploymentPostprocessing = 0;
+		};
+		6EF065C303D4EE19006877C2 = {
+			buildActionMask = 2147483647;
+			files = (
+			);
+			isa = PBXFrameworksBuildPhase;
+			runOnlyForDeploymentPostprocessing = 0;
+		};
+		6EF065C403D4EE19006877C2 = {
+			buildActionMask = 2147483647;
+			files = (
+			);
+			isa = PBXRezBuildPhase;
+			runOnlyForDeploymentPostprocessing = 0;
+		};
+		6EF065C503D4EE19006877C2 = {
+			buildPhases = (
+				6EF065C003D4EE19006877C2,
+				6EF065C103D4EE19006877C2,
+				6EF065C203D4EE19006877C2,
+				6EF065C303D4EE19006877C2,
+				6EF065C403D4EE19006877C2,
+			);
+			buildSettings = {
+				OTHER_CFLAGS = "";
+				OTHER_LDFLAGS = "";
+				OTHER_REZFLAGS = "";
+				PRODUCT_NAME = glxMesa;
+				SECTORDER_FLAGS = "";
+				WARNING_CFLAGS = "-Wmost -Wno-four-char-constants -Wno-unknown-pragmas";
+				WRAPPER_EXTENSION = bundle;
+			};
+			dependencies = (
+			);
+			isa = PBXBundleTarget;
+			name = glxMesa;
+			productInstallPath = "$(USER_LIBRARY_DIR)/Bundles";
+			productName = glxMesa;
+			productReference = 6EF065C603D4EE19006877C2;
+			productSettingsXML = "<?xml version=\"1.0\" encoding=\"UTF-8\"?>
+<!DOCTYPE plist PUBLIC \"-//Apple Computer//DTD PLIST 1.0//EN\" \"http://www.apple.com/DTDs/PropertyList-1.0.dtd\">
+<plist version=\"1.0\">
+<dict>
+	<key>CFBundleDevelopmentRegion</key>
+	<string>English</string>
+	<key>CFBundleExecutable</key>
+	<string>glxMesa</string>
+	<key>CFBundleGetInfoString</key>
+	<string></string>
+	<key>CFBundleIconFile</key>
+	<string></string>
+	<key>CFBundleIdentifier</key>
+	<string></string>
+	<key>CFBundleInfoDictionaryVersion</key>
+	<string>6.0</string>
+	<key>CFBundleName</key>
+	<string>GLX bundle with Mesa</string>
+	<key>CFBundlePackageType</key>
+	<string>BNDL</string>
+	<key>CFBundleShortVersionString</key>
+	<string>0.1</string>
+	<key>CFBundleSignature</key>
+	<string>????</string>
+	<key>CFBundleVersion</key>
+	<string>0.1</string>
+</dict>
+</plist>
+";
+		};
+		6EF065C603D4EE19006877C2 = {
+			isa = PBXBundleReference;
+			path = glxMesa.bundle;
+			refType = 3;
+		};
+		6EF065C703D4EE19006877C2 = {
+			isa = PBXTargetDependency;
+			target = 6EF065C503D4EE19006877C2;
+		};
+		6EF065C903D4F0CA006877C2 = {
+			isa = PBXTargetDependency;
+			target = 6EF7C58603D3BC6D00000104;
+		};
+		6EF7C58103D3BC6D00000104 = {
+			buildActionMask = 2147483647;
+			files = (
+			);
+			isa = PBXHeadersBuildPhase;
+			runOnlyForDeploymentPostprocessing = 0;
+		};
+		6EF7C58203D3BC6D00000104 = {
+			buildActionMask = 2147483647;
+			files = (
+			);
+			isa = PBXResourcesBuildPhase;
+			runOnlyForDeploymentPostprocessing = 0;
+		};
+		6EF7C58303D3BC6D00000104 = {
+			buildActionMask = 2147483647;
+			files = (
+			);
+			isa = PBXSourcesBuildPhase;
+			runOnlyForDeploymentPostprocessing = 0;
+		};
+		6EF7C58403D3BC6D00000104 = {
+			buildActionMask = 2147483647;
+			files = (
+			);
+			isa = PBXFrameworksBuildPhase;
+			runOnlyForDeploymentPostprocessing = 0;
+		};
+		6EF7C58503D3BC6D00000104 = {
+			buildActionMask = 2147483647;
+			files = (
+			);
+			isa = PBXRezBuildPhase;
+			runOnlyForDeploymentPostprocessing = 0;
+		};
+		6EF7C58603D3BC6D00000104 = {
+			buildPhases = (
+				6EF7C58103D3BC6D00000104,
+				6EF7C58203D3BC6D00000104,
+				6EF7C58303D3BC6D00000104,
+				6EF7C58403D3BC6D00000104,
+				6EF7C58503D3BC6D00000104,
+			);
+			buildSettings = {
+				OTHER_CFLAGS = "";
+				OTHER_LDFLAGS = "";
+				OTHER_REZFLAGS = "";
+				PRODUCT_NAME = glxAGL;
+				SECTORDER_FLAGS = "";
+				WARNING_CFLAGS = "-Wmost -Wno-four-char-constants -Wno-unknown-pragmas";
+				WRAPPER_EXTENSION = bundle;
+			};
+			dependencies = (
+			);
+			isa = PBXBundleTarget;
+			name = glxAGL;
+			productName = glxAqua;
+			productReference = 6EF7C58703D3BC6D00000104;
+			productSettingsXML = "<?xml version=\"1.0\" encoding=\"UTF-8\"?>
+<!DOCTYPE plist PUBLIC \"-//Apple Computer//DTD PLIST 1.0//EN\" \"http://www.apple.com/DTDs/PropertyList-1.0.dtd\">
+<plist version=\"1.0\">
+<dict>
+	<key>CFBundleDevelopmentRegion</key>
+	<string>English</string>
+	<key>CFBundleExecutable</key>
+	<string>glxAGL</string>
+	<key>CFBundleGetInfoString</key>
+	<string></string>
+	<key>CFBundleIconFile</key>
+	<string></string>
+	<key>CFBundleIdentifier</key>
+	<string></string>
+	<key>CFBundleInfoDictionaryVersion</key>
+	<string>6.0</string>
+	<key>CFBundleName</key>
+	<string>GLX bundle with AGL</string>
+	<key>CFBundlePackageType</key>
+	<string>BNDL</string>
+	<key>CFBundleShortVersionString</key>
+	<string>0.1</string>
+	<key>CFBundleSignature</key>
+	<string>????</string>
+	<key>CFBundleVersion</key>
+	<string>0.1</string>
+</dict>
+</plist>
+";
+		};
+		6EF7C58703D3BC6D00000104 = {
+			isa = PBXBundleReference;
+			path = glxAGL.bundle;
+			refType = 3;
+		};
+//6E0
+//6E1
+//6E2
+//6E3
+//6E4
 //F50
 //F51
 //F52
@@ -1001,18 +1263,21 @@
 			refType = 4;
 		};
 		F51BF62B02026DDA01000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			name = Portuguese;
 			path = Portuguese.lproj/InfoPlist.strings;
 			refType = 4;
 		};
 		F51BF62C02026E0601000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			name = Portuguese;
 			path = Portuguese.lproj/InfoPlist.strings.cpp;
 			refType = 4;
 		};
 		F51BF62D02026E1C01000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			name = Portuguese;
 			path = Portuguese.lproj/Localizable.strings;
@@ -1025,23 +1290,27 @@
 			refType = 4;
 		};
 		F51BF62F02026E5C01000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			name = Portuguese;
 			path = Portuguese.lproj/XDarwinHelp.html;
 			refType = 4;
 		};
 		F51BF63002026E8D01000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			name = Portuguese;
 			path = Portuguese.lproj/XDarwinHelp.html.cpp;
 			refType = 4;
 		};
 		F5269C2D01D5BC3501000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			path = pseudoramiX.c;
 			refType = 4;
 		};
 		F5269C2E01D5BC3501000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			path = pseudoramiX.h;
 			refType = 4;
@@ -1053,18 +1322,21 @@
 			refType = 4;
 		};
 		F533213A0193CBA201000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			name = German;
 			path = German.lproj/InfoPlist.strings;
 			refType = 4;
 		};
 		F533213B0193CBB401000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			name = German;
 			path = German.lproj/InfoPlist.strings.cpp;
 			refType = 4;
 		};
 		F533213C0193CBC901000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			name = German;
 			path = German.lproj/Localizable.strings;
@@ -1077,12 +1349,14 @@
 			refType = 4;
 		};
 		F533213E0193CBF401000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			name = German;
 			path = German.lproj/XDarwinHelp.html;
 			refType = 4;
 		};
 		F533213F0193CC2501000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			name = German;
 			path = German.lproj/XDarwinHelp.html.cpp;
@@ -1107,18 +1381,21 @@
 			refType = 4;
 		};
 		F533214301A4B3F001000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			name = Dutch;
 			path = Dutch.lproj/InfoPlist.strings;
 			refType = 4;
 		};
 		F533214401A4B40F01000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			name = Dutch;
 			path = Dutch.lproj/InfoPlist.strings.cpp;
 			refType = 4;
 		};
 		F533214501A4B42501000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			name = Dutch;
 			path = Dutch.lproj/Localizable.strings;
@@ -1131,18 +1408,21 @@
 			refType = 4;
 		};
 		F533214701A4B48301000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			name = Dutch;
 			path = Dutch.lproj/XDarwinHelp.html;
 			refType = 4;
 		};
 		F533214801A4B4D701000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			name = Dutch;
 			path = Dutch.lproj/XDarwinHelp.html.cpp;
 			refType = 4;
 		};
 		F54BF6EA017D500901000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			path = startXClients.cpp;
 			refType = 4;
@@ -1159,16 +1439,19 @@
 			};
 		};
 		F5582948015DAD3B01000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			path = quartzCommon.h;
 			refType = 4;
 		};
 		F5614B3B0251124C01000114 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			path = fullscreen.c;
 			refType = 4;
 		};
 		F5614B3C0251124C01000114 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			path = fullscreen.h;
 			refType = 4;
@@ -1184,16 +1467,19 @@
 			refType = 4;
 		};
 		F56CBD0D02EB84A801129B8A = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			path = aqua.h;
 			refType = 4;
 		};
 		F56CBD0E02EB84A801129B8A = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			path = aquaPicture.c;
 			refType = 4;
 		};
 		F56CBD0F02EBDCFC01129B8A = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			path = aquaWindow.c;
 			refType = 4;
@@ -1205,18 +1491,21 @@
 			refType = 4;
 		};
 		F587E16101924C2F01000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			name = Swedish;
 			path = Swedish.lproj/InfoPlist.strings;
 			refType = 4;
 		};
 		F587E16201924C5301000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			name = Swedish;
 			path = Swedish.lproj/InfoPlist.strings.cpp;
 			refType = 4;
 		};
 		F587E16301924C5E01000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			name = Swedish;
 			path = Swedish.lproj/Localizable.strings;
@@ -1229,12 +1518,14 @@
 			refType = 4;
 		};
 		F587E16501924C7401000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			name = Swedish;
 			path = Swedish.lproj/XDarwinHelp.html;
 			refType = 4;
 		};
 		F587E16601924C9D01000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			name = Swedish;
 			path = Swedish.lproj/XDarwinHelp.html.cpp;
@@ -1247,18 +1538,21 @@
 			refType = 4;
 		};
 		F58D65DC018F794D01000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			name = French;
 			path = French.lproj/InfoPlist.strings.cpp;
 			refType = 4;
 		};
 		F58D65DD018F798F01000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			name = French;
 			path = French.lproj/InfoPlist.strings;
 			refType = 4;
 		};
 		F58D65DE018F79A001000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			name = French;
 			path = French.lproj/Localizable.strings;
@@ -1271,18 +1565,21 @@
 			refType = 4;
 		};
 		F58D65E0018F79C001000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			name = French;
 			path = French.lproj/XDarwinHelp.html;
 			refType = 4;
 		};
 		F58D65E1018F79E001000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			name = French;
 			path = French.lproj/XDarwinHelp.html.cpp;
 			refType = 4;
 		};
 		F5A94EF10314BAC70100011B = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			path = darwinEvents.c;
 			refType = 4;
@@ -1294,6 +1591,7 @@
 			refType = 4;
 		};
 		F5ACD25DC5B5E97701000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			name = Spanish;
 			path = Spanish.lproj/InfoPlist.strings.cpp;
@@ -1306,24 +1604,28 @@
 			refType = 4;
 		};
 		F5ACD25FC5B5E9AA01000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			name = Spanish;
 			path = Spanish.lproj/Localizable.strings;
 			refType = 4;
 		};
 		F5ACD260C5B5E9DF01000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			name = Spanish;
 			path = Spanish.lproj/XDarwinHelp.html.cpp;
 			refType = 4;
 		};
 		F5ACD261C5B5EA2001000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			name = Spanish;
 			path = Spanish.lproj/XDarwinHelp.html;
 			refType = 4;
 		};
 		F5ACD262C5B5EA4D01000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			name = Spanish;
 			path = Spanish.lproj/InfoPlist.strings;
@@ -1336,6 +1638,7 @@
 			refType = 4;
 		};
 		F5ACD264C5BE035B01000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			name = ko;
 			path = ko.lproj/InfoPlist.strings.cpp;
@@ -1348,24 +1651,28 @@
 			refType = 4;
 		};
 		F5ACD266C5BE03C501000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			name = ko;
 			path = ko.lproj/Localizable.strings;
 			refType = 4;
 		};
 		F5ACD267C5BE03FC01000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			name = ko;
 			path = ko.lproj/XDarwinHelp.html.cpp;
 			refType = 4;
 		};
 		F5ACD268C5BE046401000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			name = ko;
 			path = ko.lproj/XDarwinHelp.html;
 			refType = 4;
 		};
 		F5ACD269C5BE049301000001 = {
+			fileEncoding = 30;
 			isa = PBXFileReference;
 			name = ko;
 			path = ko.lproj/InfoPlist.strings;
diff --git a/xc/programs/Xserver/hw/darwin/quartz/XServer.h b/xc/programs/Xserver/hw/darwin/quartz/XServer.h
index b9fe410b6..3eadd650e 100644
--- a/xc/programs/Xserver/hw/darwin/quartz/XServer.h
+++ b/xc/programs/Xserver/hw/darwin/quartz/XServer.h
@@ -3,7 +3,7 @@
 //
 /*
  * Copyright (c) 2001 Andreas Monitzer. All Rights Reserved.
- * Copyright (c) 2002 Torrey T. Lyons. All Rights Reserved.
+ * Copyright (c) 2002-2003 Torrey T. Lyons. All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the
@@ -29,7 +29,7 @@
  * sale, use or other dealings in this Software without prior written
  * authorization.
  */
-/* $XFree86: xc/programs/Xserver/hw/darwin/quartz/XServer.h,v 1.4 2002/10/12 00:32:45 torrey Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/darwin/quartz/XServer.h,v 1.8 2003/01/23 00:34:26 torrey Exp $ */
 
 #define BOOL xBOOL
 #include "Xproto.h"
@@ -39,10 +39,11 @@
 
 @interface XServer : NSObject {
     // server state
+    int serverState;
     NSRecursiveLock *serverLock;
     BOOL serverVisible;
     BOOL rootlessMenuBarVisible;
-    BOOL appQuitting;
+    BOOL queueShowServer;
     UInt32 mouseState;
     Class windowClass;
 
@@ -63,19 +64,21 @@
 - (id)init;
 
 - (BOOL)translateEvent:(NSEvent *)anEvent;
-- (BOOL)getMousePosition:(xEvent *)xe;
+- (BOOL)getMousePosition:(xEvent *)xe fromEvent:(NSEvent *)anEvent;
 
 + (void)append:(NSString *)value toEnv:(NSString *)name;
 
 - (void)startX;
+- (void)finishStartX;
 - (BOOL)startXClients;
 - (void)run;
 - (void)toggle;
-- (void)show;
-- (void)hide;
-- (void)killServer;
+- (void)showServer:(BOOL)show;
+- (void)forceShowServer:(BOOL)show;
+- (void)setRootClip:(BOOL)enable;
 - (void)readPasteboard;
 - (void)writePasteboard;
+- (void)quitServer;
 - (void)sendXEvent:(xEvent *)xe;
 - (void)sendShowHide:(BOOL)show;
 - (void)clientProcessDone:(int)clientStatus;
@@ -98,3 +101,12 @@
 
 @end
 
+// X server states
+enum {
+    server_NotStarted,
+    server_Starting,
+    server_Running,
+    server_Quitting,
+    server_Done
+};
+
diff --git a/xc/programs/Xserver/hw/darwin/quartz/XServer.m b/xc/programs/Xserver/hw/darwin/quartz/XServer.m
index 4b7af53e6..c57defd53 100644
--- a/xc/programs/Xserver/hw/darwin/quartz/XServer.m
+++ b/xc/programs/Xserver/hw/darwin/quartz/XServer.m
@@ -8,7 +8,7 @@
 //
 /*
  * Copyright (c) 2001 Andreas Monitzer. All Rights Reserved.
- * Copyright (c) 2002 Torrey T. Lyons. All Rights Reserved.
+ * Copyright (c) 2002-2003 Torrey T. Lyons. All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the
@@ -34,7 +34,7 @@
  * sale, use or other dealings in this Software without prior written
  * authorization.
  */
-/* $XFree86: xc/programs/Xserver/hw/darwin/quartz/XServer.m,v 1.4 2002/10/12 00:32:45 torrey Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/darwin/quartz/XServer.m,v 1.8 2003/01/23 00:34:26 torrey Exp $ */
 
 #include "quartzCommon.h"
 
@@ -57,6 +57,13 @@
 #include <signal.h>
 #include <fcntl.h>
 
+// For power management notifications
+#import <mach/mach_port.h>
+#import <mach/mach_interface.h>
+#import <mach/mach_init.h>
+#import <IOKit/pwr_mgt/IOPMLib.h>
+#import <IOKit/IOMessage.h>
+
 #define ENQUEUE(xe)                                                         \
 {                                                                           \
     char byte = 0;                                                          \
@@ -92,7 +99,10 @@ extern char **envpGlobal;
 extern int main(int argc, char *argv[], char *envp[]);
 extern void HideMenuBar(void);
 extern void ShowMenuBar(void);
+extern void QuartzReallySetCursor();
 static void childDone(int sig);
+static void powerDidChange(void *x, io_service_t y, natural_t messageType,
+                           void *messageArgument);
 
 static NSPort *signalPort;
 static NSPort *returnPort;
@@ -100,6 +110,7 @@ static NSPortMessage *signalMessage;
 static pid_t clientPID;
 static XServer *oneXServer;
 static NSRect aquaMenuBarBox;
+static io_connect_t root_port;
 
 
 @implementation XServer
@@ -109,12 +120,14 @@ static NSRect aquaMenuBarBox;
     self = [super init];
     oneXServer = self;
 
+    serverState = server_NotStarted;
     serverLock = [[NSRecursiveLock alloc] init];
     clientPID = 0;
     sendServerEvents = NO;
     serverVisible = NO;
     rootlessMenuBarVisible = YES;
-    appQuitting = NO;
+    queueShowServer = YES;
+    quartzServerQuitting = NO;
     mouseState = 0;
     eventWriteFD = quartzEventWriteFD;
     windowClass = [NSWindow class];
@@ -140,19 +153,20 @@ static NSRect aquaMenuBarBox;
 {
     // Quit if the X server is not running
     if ([serverLock tryLock]) {
-        appQuitting = YES;
+        quartzServerQuitting = YES;
+        serverState = server_Done;
         if (clientPID != 0)
             kill(clientPID, SIGINT);
         return NSTerminateNow;
     }
 
+    // Hide the X server and stop sending it events
+    [self showServer:NO];
+    sendServerEvents = NO;
+
     if (clientPID != 0 || !quartzStartClients) {
         int but;
 
-        // Hide the X server and stop sending it events
-        [self hide];
-        sendServerEvents = NO;
-
         but = NSRunAlertPanel(NSLocalizedString(@"Quit X server?",@""),
                               NSLocalizedString(@"Quitting the X server will terminate any running X Window System programs.",@""),
                               NSLocalizedString(@"Quit",@""),
@@ -163,15 +177,24 @@ static NSRect aquaMenuBarBox;
             case NSAlertDefaultReturn:		// quit
                 break;
             case NSAlertAlternateReturn:	// cancel
-                sendServerEvents = YES;
+                if (serverState == server_Running)
+                    sendServerEvents = YES;
                 return NSTerminateCancel;
         }
     }
 
-    appQuitting = YES;
+    quartzServerQuitting = YES;
     if (clientPID != 0)
         kill(clientPID, SIGINT);
-    [self killServer];
+
+    // At this point the X server is either running or starting.
+    if (serverState == server_Starting) {
+        // Quit will be queued later when server is running
+        return NSTerminateLater;
+    } else if (serverState == server_Running) {
+        [self quitServer];
+    }
+
     return NSTerminateNow;
 }
 
@@ -201,7 +224,6 @@ static NSRect aquaMenuBarBox;
 {
     xEvent xe;
     static BOOL mouse1Pressed = NO;
-    BOOL onScreen;
     NSEventType type;
     unsigned int flags;
 
@@ -235,12 +257,9 @@ static NSRect aquaMenuBarBox;
 
     memset(&xe, 0, sizeof(xe));
 
-    // If the mouse is not on the valid X display area,
-    // we don't send the X server key events.
-    onScreen = [self getMousePosition:&xe];
-
     switch (type) {
         case NSLeftMouseUp:
+            [self getMousePosition:&xe fromEvent:anEvent];
             if (quartzRootless && !mouse1Pressed) {
                 // MouseUp after MouseDown in menu - ignore
                 return NO;
@@ -250,6 +269,7 @@ static NSRect aquaMenuBarBox;
             xe.u.u.detail = 1;
             break;
         case NSLeftMouseDown:
+            [self getMousePosition:&xe fromEvent:anEvent];
             if (quartzRootless &&
                 ! ([anEvent window] &&
                    [[anEvent window] isKindOfClass:windowClass])) {
@@ -264,6 +284,7 @@ static NSRect aquaMenuBarBox;
         case NSLeftMouseDragged:
         case NSRightMouseDragged:
         case NSOtherMouseDragged:
+            [self getMousePosition:&xe fromEvent:anEvent];
             xe.u.u.type = MotionNotify;
             break;
         case NSSystemDefined:
@@ -276,18 +297,22 @@ static NSRect aquaMenuBarBox;
                 return NO; // ignore double events
             mouseState = hwButtons;
 
+            [self getMousePosition:&xe fromEvent:anEvent];
             xe.u.u.type = kXDarwinUpdateButtons;
             xe.u.clientMessage.u.l.longs0 = [anEvent data1];
             xe.u.clientMessage.u.l.longs1 =[anEvent data2];
             break;
         }
         case NSScrollWheel:
+            [self getMousePosition:&xe fromEvent:anEvent];
             xe.u.u.type = kXDarwinScrollWheel;
             xe.u.clientMessage.u.s.shorts0 = [anEvent deltaY];
             break;
         case NSKeyDown:
         case NSKeyUp:
-            if (!onScreen)
+            // If the mouse is not on the valid X display area,
+            // we don't send the X server key events.
+            if (![self getMousePosition:&xe fromEvent:nil])
                 return NO;
             if (type == NSKeyDown)
                 xe.u.u.type = KeyPress;
@@ -296,6 +321,7 @@ static NSRect aquaMenuBarBox;
             xe.u.u.detail = [anEvent keyCode];
             break;
         case NSFlagsChanged:
+            [self getMousePosition:&xe fromEvent:nil];
             xe.u.u.type = kXDarwinUpdateModifiers;
             xe.u.clientMessage.u.l.longs0 = flags;
             break;
@@ -325,12 +351,27 @@ static NSRect aquaMenuBarBox;
 }
 
 // Return mouse coordinates, inverting y coordinate.
+// The coordinates are extracted from an event or the current mouse position.
 // For rootless mode, the menu bar is treated as not part of the usable
 // X display area and the cursor position is adjusted accordingly.
 // Returns YES if the cursor is not in the menu bar.
-- (BOOL)getMousePosition:(xEvent *)xe
+- (BOOL)getMousePosition:(xEvent *)xe fromEvent:(NSEvent *)anEvent
 {
-    NSPoint pt = [NSEvent mouseLocation];
+    NSPoint pt;
+
+    if (anEvent) {
+        NSWindow *eventWindow = [anEvent window];
+
+        if (eventWindow) {
+            pt = [anEvent locationInWindow];
+            pt.x += [eventWindow frame].origin.x;
+            pt.y += [eventWindow frame].origin.y;
+        } else {
+            pt = [NSEvent mouseLocation];
+        }
+    } else {
+        pt = [NSEvent mouseLocation];
+    }
 
     xe->u.keyButtonPointer.rootX = (int)(pt.x);
 
@@ -415,9 +456,9 @@ static NSRect aquaMenuBarBox;
         NSLog(@"No version");
 
     // Start the X server thread
+    serverState = server_Starting;
     [NSThread detachNewThreadSelector:@selector(run) toTarget:self
               withObject:nil];
-    sendServerEvents = YES;
 
     // Start the X clients if started from GUI
     if (quartzStartClients) {
@@ -428,19 +469,29 @@ static NSRect aquaMenuBarBox;
         // There is no help window for rootless; just start
         [helpWindow close];
         helpWindow = nil;
-        if ([NSApp isActive])
-            [self sendShowHide:YES];
-        else
-            [self sendShowHide:NO];
     } else {
+        IONotificationPortRef notify;
+        io_object_t anIterator;
+
+        // Register for system power notifications
+        root_port = IORegisterForSystemPower(0, &notify, powerDidChange,
+                                             &anIterator);
+        if (root_port) {
+            CFRunLoopAddSource([[NSRunLoop currentRunLoop] getCFRunLoop],
+                               IONotificationPortGetRunLoopSource(notify),
+                               kCFRunLoopDefaultMode);
+        } else {
+            NSLog(@"Failed to register for system power notifications.");
+        }
+        
         // Show the X switch window if not using dock icon switching
         if (![Preferences dockSwitch])
             [switchWindow orderFront:nil];
 
         if ([Preferences startupHelp]) {
             // display the full screen mode help
-            [self sendShowHide:NO];
             [helpWindow makeKeyAndOrderFront:nil];
+            queueShowServer = NO;
         } else {
             // start running full screen and make sure X is visible
             ShowMenuBar();
@@ -449,6 +500,26 @@ static NSRect aquaMenuBarBox;
     }
 }
 
+// Finish starting the X server thread
+// This includes anything that must be done after the X server is
+// ready to process events.
+- (void)finishStartX
+{
+    sendServerEvents = YES;
+    serverState = server_Running;
+
+    if (quartzRootless) {
+        [self forceShowServer:[NSApp isActive]];
+    } else {
+        [self forceShowServer:queueShowServer];
+    }
+
+    if (quartzServerQuitting) {
+        [self quitServer];
+        [NSApp replyToApplicationShouldTerminate:YES];
+    }
+}
+
 // Start the first X clients in a separate process
 - (BOOL)startXClients
 {
@@ -637,16 +708,14 @@ static NSRect aquaMenuBarBox;
     [helpWindow close];
     helpWindow = nil;
 
-    serverVisible = YES;
-    [self sendShowHide:YES];
+    [self forceShowServer:YES];
     [NSApp activateIgnoringOtherApps:YES];
 }
 
 // Show the X server when sent message from GUI
 - (IBAction)showAction:(id)sender
 {
-    if (sendServerEvents)
-        [self sendShowHide:YES];
+    [self forceShowServer:YES];
 }
 
 // Show or hide the X server or menu bar in rootless mode
@@ -662,39 +731,29 @@ static NSRect aquaMenuBarBox;
         rootlessMenuBarVisible = !rootlessMenuBarVisible;
 #endif
     } else {
-        if (serverVisible)
-            [self hide];
-        else
-            [self show];
+        [self showServer:!serverVisible];
     }
 }
 
-// Show the X server on screen
-- (void)show
+// Show or hide the X server on screen
+- (void)showServer:(BOOL)show
 {
-    if (!serverVisible && sendServerEvents) {
-        [self sendShowHide:YES];
-    }
-}
+    // Do not show or hide multiple times in a row
+    if (serverVisible == show)
+        return;
 
-// Hide the X server from the screen
-- (void)hide
-{
-    if (serverVisible && sendServerEvents) {
-        [self sendShowHide:NO];
+    if (sendServerEvents) {
+        [self sendShowHide:show];
+    } else if (serverState == server_Starting) {
+        queueShowServer = show;
     }
 }
 
-// Kill the X server thread
-- (void)killServer
+// Show or hide the X server irregardless of the current state
+- (void)forceShowServer:(BOOL)show
 {
-    xEvent xe;
-
-    if (serverVisible)
-        [self hide];
-
-    xe.u.u.type = kXDarwinQuit;
-    [self sendXEvent:&xe];
+    serverVisible = !show;
+    [self showServer:show];
 }
 
 // Tell the X server to show or hide itself.
@@ -724,7 +783,7 @@ static NSRect aquaMenuBarBox;
 {
     xEvent xe;
 
-    [self getMousePosition:&xe];
+    [self getMousePosition:&xe fromEvent:nil];
 
     if (show) {
         if (!quartzRootless) {
@@ -756,6 +815,16 @@ static NSRect aquaMenuBarBox;
     serverVisible = show;
 }
 
+// Enable or disable rendering to the X screen
+- (void)setRootClip:(BOOL)enable
+{
+    xEvent xe;
+
+    xe.u.u.type = kXDarwinSetRootClip;
+    xe.u.clientMessage.u.l.longs0 = enable;
+    [self sendXEvent:&xe];
+}
+
 // Tell the X server to read from the pasteboard into the X cut buffer
 - (void)readPasteboard
 {
@@ -774,6 +843,20 @@ static NSRect aquaMenuBarBox;
     [self sendXEvent:&xe];
 }
 
+- (void)quitServer
+{
+    xEvent xe;
+
+    xe.u.u.type = kXDarwinQuit;
+    [self sendXEvent:&xe];
+
+    // Revert to the Mac OS X arrow cursor. The main thread sets the cursor
+    // and it won't be responding to future requests to change it.
+    [[NSCursor arrowCursor] set];
+
+    serverState = server_Quitting;
+}
+
 - (void)sendXEvent:(xEvent *)xe
 {
     // This field should be filled in for every event
@@ -810,19 +893,24 @@ static NSRect aquaMenuBarBox;
                 QuartzFSRelease();
                 ShowMenuBar();
             }
+            break;
 
-            // FIXME: This hack is necessary (but not completely effective)
-            // since Mac OS X 10.0.2
-            [NSCursor unhide];
+        case kQuartzServerStarted:
+            [self finishStartX];
             break;
 
         case kQuartzServerDied:
             sendServerEvents = NO;
-            if (!appQuitting) {
+            serverState = server_Done;
+            if (!quartzServerQuitting) {
                 [NSApp terminate:nil];	// quit if we aren't already
             }
             break;
 
+        case kQuartzCursorUpdate:
+            QuartzReallySetCursor();
+            break;
+
         case kQuartzPostEvent:
         {
             const xEvent *xe = [[[portMessage components] lastObject] bytes];
@@ -846,7 +934,7 @@ static NSRect aquaMenuBarBox;
         NSLog(@"X client process terminated abnormally.");
     }
 
-    if (!appQuitting) {
+    if (!quartzServerQuitting) {
         [NSApp terminate:nil];	// quit if we aren't already
     }
 }
@@ -858,20 +946,20 @@ static NSRect aquaMenuBarBox;
             hasVisibleWindows:(BOOL)flag
 {
     if ([Preferences dockSwitch] && !quartzRootless) {
-        [self show];
+        [self showServer:YES];
     }
     return NO;
 }
 
 - (void)applicationWillResignActive:(NSNotification *)aNotification
 {
-    [self hide];
+    [self showServer:NO];
 }
 
 - (void)applicationWillBecomeActive:(NSNotification *)aNotification
 {
     if (quartzRootless)
-        [self show];
+        [self showServer:YES];
 }
 
 @end
@@ -914,3 +1002,28 @@ static void childDone(int sig)
         [oneXServer clientProcessDone:clientStatus];
     }
 }
+
+static void powerDidChange(
+    void *x,
+    io_service_t y,
+    natural_t messageType,
+    void *messageArgument)
+{
+    switch (messageType) {
+        case kIOMessageSystemWillSleep:
+            if (!quartzRootless) {
+                [oneXServer setRootClip:FALSE];
+            }
+            IOAllowPowerChange(root_port, (long)messageArgument);
+            break;
+        case kIOMessageCanSystemSleep:
+            IOAllowPowerChange(root_port, (long)messageArgument);
+            break;
+        case kIOMessageSystemHasPoweredOn:
+            if (!quartzRootless) {
+                [oneXServer setRootClip:TRUE];
+            }
+            break;
+    }
+    
+}
diff --git a/xc/programs/Xserver/hw/darwin/quartz/aqua.h b/xc/programs/Xserver/hw/darwin/quartz/aqua.h
index 35adf2256..e219766ff 100644
--- a/xc/programs/Xserver/hw/darwin/quartz/aqua.h
+++ b/xc/programs/Xserver/hw/darwin/quartz/aqua.h
@@ -26,7 +26,7 @@
  * holders shall not be used in advertising or otherwise to promote the sale,
  * use or other dealings in this Software without prior written authorization.
  */
-/* $XFree86: xc/programs/Xserver/hw/darwin/quartz/aqua.h,v 1.2 2002/07/24 05:58:33 torrey Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/darwin/quartz/aqua.h,v 1.3 2003/01/20 05:42:52 torrey Exp $ */
 
 #ifndef _AQUA_H
 #define _AQUA_H
@@ -45,9 +45,10 @@ AquaComposite(CARD8 op, PicturePtr pSrc, PicturePtr pMask, PicturePtr pDst,
 
 /*
  * AquaAlphaMask
- *  Bit mask for alpha channel with a particular number of bits per pixel (bpp)
+ *  Bit mask for alpha channel with a particular number of bits per pixel.
+ *  Note that we only care for 32bpp data. Mac OS X uses planar alpha for
+ *  16bpp.
  */
-#define AquaAlphaMask(bpp) ((((Pixel) 1 << (bpp >> 2))-1) << \
-                            (bpp - (bpp >> 2)))
+#define AquaAlphaMask(bpp) ((bpp) == 32 ? 0xFF000000 : 0)
 
 #endif /* _AQUA_H */
diff --git a/xc/programs/Xserver/hw/darwin/quartz/aquaWindow.c b/xc/programs/Xserver/hw/darwin/quartz/aquaWindow.c
index 8addd5e1b..39c7704c6 100644
--- a/xc/programs/Xserver/hw/darwin/quartz/aquaWindow.c
+++ b/xc/programs/Xserver/hw/darwin/quartz/aquaWindow.c
@@ -31,7 +31,7 @@
  *
  * Copyright © 1998 Keith Packard
  */
-/* $XFree86: xc/programs/Xserver/hw/darwin/quartz/aquaWindow.c,v 1.1 2002/07/24 05:58:33 torrey Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/darwin/quartz/aquaWindow.c,v 1.2 2003/01/31 00:01:45 torrey Exp $ */
 
 #include "fb.h"
 #include "aqua.h"
@@ -83,6 +83,8 @@ AquaFillRegionTiled(
                    tileXoff, tileYoff);
     tileWidth = pTile->drawable.width;
     tileHeight = pTile->drawable.height;
+    xRot += dstXoff;
+    yRot += dstYoff;
     planeMask = FB_ALLONES & ~AquaAlphaMask(dstBpp);
 
     while (n--)
diff --git a/xc/programs/Xserver/hw/darwin/quartz/fullscreen.c b/xc/programs/Xserver/hw/darwin/quartz/fullscreen.c
index 46b562794..e51211559 100644
--- a/xc/programs/Xserver/hw/darwin/quartz/fullscreen.c
+++ b/xc/programs/Xserver/hw/darwin/quartz/fullscreen.c
@@ -26,13 +26,14 @@
  * dealings in this Software without prior written authorization from
  * Torrey T. Lyons.
  */
-/* $XFree86: xc/programs/Xserver/hw/darwin/quartz/fullscreen.c,v 1.1 2002/03/28 02:21:18 torrey Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/darwin/quartz/fullscreen.c,v 1.3 2002/12/10 00:00:39 torrey Exp $ */
 
 #include "quartzCommon.h"
 #include "darwin.h"
 #include "colormapst.h"
 #include "scrnintstr.h"
 #include "micmap.h"
+#include "shadow.h"
 
 // Full screen specific per screen storage structure
 typedef struct {
@@ -41,6 +42,8 @@ typedef struct {
     CFDictionaryRef     aquaDisplayMode;
     CGDirectPaletteRef  xPalette;
     CGDirectPaletteRef  aquaPalette;
+    unsigned char      *framebuffer;
+    unsigned char      *shadowPtr;
 } QuartzFSScreenRec, *QuartzFSScreenPtr;
 
 #define FULLSCREEN_PRIV(pScreen) \
@@ -327,30 +330,76 @@ Bool QuartzFSAddScreen(
     dfb->height = bounds.size.height;
     dfb->pitch = CGDisplayBytesPerRow(cgID);
     dfb->bitsPerPixel = CGDisplayBitsPerPixel(cgID);
-    dfb->pixelInfo.componentCount = CGDisplaySamplesPerPixel(cgID);
 
     if (dfb->bitsPerPixel == 8) {
         if (CGDisplayCanSetPalette(cgID)) {
-            dfb->pixelInfo.pixelType = kIOCLUTPixels;
+            dfb->colorType = PseudoColor;
         } else {
-            dfb->pixelInfo.pixelType = kIOFixedCLUTPixels;
+            dfb->colorType = StaticColor;
         }
-        dfb->pixelInfo.bitsPerComponent = 8;
+        dfb->bitsPerComponent = 8;
         dfb->colorBitsPerPixel = 8;
     } else {
-        dfb->pixelInfo.pixelType = kIORGBDirectPixels;
-        dfb->pixelInfo.bitsPerComponent = CGDisplayBitsPerSample(cgID);
-        dfb->colorBitsPerPixel = (dfb->pixelInfo.componentCount *
-                                  dfb->pixelInfo.bitsPerComponent);
+        dfb->colorType = TrueColor;
+        dfb->bitsPerComponent = CGDisplayBitsPerSample(cgID);
+        dfb->colorBitsPerPixel = CGDisplaySamplesPerPixel(cgID) *
+                                 dfb->bitsPerComponent;
     }
 
-    dfb->framebuffer = CGDisplayBaseAddress(cgID);
+    fsDisplayInfo->framebuffer = CGDisplayBaseAddress(cgID);
+
+    // allocate shadow framebuffer
+    fsDisplayInfo->shadowPtr = shadowAlloc(dfb->width, dfb->height,
+                                           dfb->bitsPerPixel);
+    dfb->framebuffer = fsDisplayInfo->shadowPtr;
 
     return TRUE;
 }
 
 
 /*
+ * QuartzFSShadowUpdate
+ *  Update the damaged regions of the shadow framebuffer on the display.
+ */
+static void QuartzFSShadowUpdate(ScreenPtr pScreen, 
+                                 shadowBufPtr pBuf)
+{
+    DarwinFramebufferPtr dfb = SCREEN_PRIV(pScreen);
+    QuartzFSScreenPtr fsDisplayInfo = FULLSCREEN_PRIV(pScreen);
+    RegionPtr damage = &pBuf->damage;
+    int numBox = REGION_NUM_RECTS(damage);
+    BoxPtr pBox = REGION_RECTS(damage);
+    int pitch = dfb->pitch;
+    int bpp = dfb->bitsPerPixel/8;
+
+    // Don't update if the X server is not visible
+    if (!quartzServerVisible)
+        return;
+
+    // Loop through all the damaged boxes
+    while (numBox--) {
+        int width, height, offset;
+        unsigned char *src, *dst;
+
+        width = (pBox->x2 - pBox->x1) * bpp;
+        height = pBox->y2 - pBox->y1;
+        offset = (pBox->y1 * pitch) + (pBox->x1 * bpp);
+        src = fsDisplayInfo->shadowPtr + offset;
+        dst = fsDisplayInfo->framebuffer + offset;
+
+        while (height--) {
+            memcpy(dst, src, width);
+            dst += pitch;
+            src += pitch;
+        }
+
+        // Get the next box
+        pBox++;
+    }
+}
+
+
+/*
  * QuartzFSSetupScreen
  *  Finalize full screen specific setup of each screen.
  */
@@ -362,7 +411,14 @@ Bool QuartzFSSetupScreen(
     QuartzFSScreenPtr fsDisplayInfo = FULLSCREEN_PRIV(pScreen);
     CGDirectDisplayID cgID = fsDisplayInfo->displayID;
 
-    if (dfb->pixelInfo.pixelType == kIOCLUTPixels) {
+    // Initialize shadow framebuffer support
+    if (! shadowInit(pScreen, QuartzFSShadowUpdate, NULL)) {
+        ErrorF("Failed to initalize shadow framebuffer for screen %i.\n",
+               index);
+        return FALSE;
+    }
+
+    if (dfb->colorType == PseudoColor) {
         // Initialize colormap handling
         size_t aquaBpp;
 
diff --git a/xc/programs/Xserver/hw/darwin/quartz/quartz.c b/xc/programs/Xserver/hw/darwin/quartz/quartz.c
index 5f24ad93c..592a0e4a0 100644
--- a/xc/programs/Xserver/hw/darwin/quartz/quartz.c
+++ b/xc/programs/Xserver/hw/darwin/quartz/quartz.c
@@ -4,7 +4,7 @@
  *
  **************************************************************/
 /*
- * Copyright (c) 2001 Greg Parker and Torrey T. Lyons.
+ * Copyright (c) 2001-2003 Greg Parker and Torrey T. Lyons.
  *                 All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
@@ -29,7 +29,7 @@
  * holders shall not be used in advertising or otherwise to promote the sale,
  * use or other dealings in this Software without prior written authorization.
  */
-/* $XFree86: xc/programs/Xserver/hw/darwin/quartz/quartz.c,v 1.2 2002/10/12 00:32:45 torrey Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/darwin/quartz/quartz.c,v 1.7 2003/01/23 00:34:26 torrey Exp $ */
 
 #include "quartzCommon.h"
 #include "quartz.h"
@@ -55,7 +55,9 @@ int                     quartzEventWriteFD = -1;
 int                     quartzStartClients = 1;
 int                     quartzRootless = -1;
 int                     quartzUseSysBeep = 0;
+int                     quartzUseAGL = 1;
 int                     quartzServerVisible = TRUE;
+int                     quartzServerQuitting = FALSE;
 int                     quartzScreenIndex = 0;
 int                     aquaMenuBarHeight = 0;
 int                     noPseudoramiXExtension = TRUE;
@@ -71,38 +73,6 @@ int                     aquaNumScreens = 0;
 */
 
 /*
- * QuartzPMThread
- * Handle power state notifications, FIXME
- */
-#if 0
-static void *QuartzPMThread(void *arg)
-{
-    for (;;) {
-        mach_msg_return_t       kr;
-        mach_msg_empty_rcv_t    msg;
-
-        kr = mach_msg((mach_msg_header_t*) &msg, MACH_RCV_MSG, 0,
-                      sizeof(msg), pmNotificationPort, 0, MACH_PORT_NULL);
-        kern_assert(kr);
-
-        // computer just woke up
-        if (msg.header.msgh_id == 1) {
-            if (quartzServerVisible) {
-                int i;
-
-                for (i = 0; i < screenInfo.numScreens; i++) {
-                    if (screenInfo.screens[i])
-                        xf86SetRootClip(screenInfo.screens[i], true);
-                }
-            }
-        }
-    }
-    return NULL;
-}
-#endif
-
-
-/*
  * QuartzAddScreen
  *  Do mode dependent initialization of each screen for Quartz.
  */
@@ -168,6 +138,13 @@ void QuartzInitOutput(
         QuartzAudioInit();
     }
 
+    if (!RegisterBlockAndWakeupHandlers(QuartzBlockHandler,
+                                        QuartzWakeupHandler,
+                                        NULL))
+    {
+        FatalError("Could not register block and wakeup handlers.");
+    }
+
     if (quartzRootless) {
         ErrorF("Display mode: Rootless Quartz\n");
         AquaDisplayInit();
@@ -186,11 +163,23 @@ void QuartzInitOutput(
 
 
 /*
+ * QuartzInitInput
+ *  Inform the main thread the X server is ready to handle events.
+ */
+void QuartzInitInput(
+    int argc,
+    char **argv )
+{
+    QuartzMessageMainThread(kQuartzServerStarted, NULL, 0);
+}
+
+
+/*
  * QuartzShow
  *  Show the X server on screen. Does nothing if already shown.
- *  Restore the X clip regions the X server cursor state.
+ *  Restore the X clip regions and the X server cursor state.
  */
-void QuartzShow(
+static void QuartzShow(
     int x,	// cursor location
     int y )
 {
@@ -215,7 +204,7 @@ void QuartzShow(
  *  hidden. Set X clip regions to prevent drawing, and restore the Aqua
  *  cursor.
  */
-void QuartzHide(void)
+static void QuartzHide(void)
 {
     int i;
 
@@ -234,6 +223,26 @@ void QuartzHide(void)
 
 
 /*
+ * QuartzSetRootClip
+ *  Enable or disable rendering to the X screen.
+ */
+static void QuartzSetRootClip(
+    BOOL enable)
+{
+    int i;
+
+    if (!quartzServerVisible)
+        return;
+
+    for (i = 0; i < screenInfo.numScreens; i++) {
+        if (screenInfo.screens[i]) {
+            xf86SetRootClip(screenInfo.screens[i], enable);
+        }
+    }
+}
+
+
+/*
  * QuartzProcessEvent
  *  Process Quartz specific events.
  */
@@ -251,6 +260,10 @@ void QuartzProcessEvent(
             QuartzHide();
             break;
 
+        case kXDarwinSetRootClip:
+            QuartzSetRootClip((BOOL)xe->u.clientMessage.u.l.longs0);
+            break;
+
         case kXDarwinQuit:
             GiveUp(0);
             break;
@@ -276,6 +289,8 @@ void QuartzProcessEvent(
  */
 void QuartzGiveUp(void)
 {
+#if 0
+// Trying to switch cursors when quitting causes deadlock
     int i;
 
     for (i = 0; i < screenInfo.numScreens; i++) {
@@ -283,6 +298,8 @@ void QuartzGiveUp(void)
             QuartzSuspendXCursor(screenInfo.screens[i]);
         }
     }
+#endif
+
     if (!quartzRootless)
         QuartzFSRelease();
 }
diff --git a/xc/programs/Xserver/hw/darwin/quartz/quartz.h b/xc/programs/Xserver/hw/darwin/quartz/quartz.h
index e304591a4..cd4f732f3 100644
--- a/xc/programs/Xserver/hw/darwin/quartz/quartz.h
+++ b/xc/programs/Xserver/hw/darwin/quartz/quartz.h
@@ -5,7 +5,7 @@
  * independent parts of the Darwin X server.
  */
 /*
- * Copyright (c) 2001 Greg Parker and Torrey T. Lyons.
+ * Copyright (c) 2001-2002 Greg Parker and Torrey T. Lyons.
  *                 All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
@@ -30,7 +30,7 @@
  * holders shall not be used in advertising or otherwise to promote the sale,
  * use or other dealings in this Software without prior written authorization.
  */
-/* $XFree86: xc/programs/Xserver/hw/darwin/quartz/quartz.h,v 1.2 2002/10/12 00:32:45 torrey Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/darwin/quartz/quartz.h,v 1.4 2002/11/20 23:51:58 torrey Exp $ */
 
 #ifndef _QUARTZ_H
 #define _QUARTZ_H
@@ -41,11 +41,10 @@
 
 int QuartzProcessArgument(int argc, char *argv[], int i);
 void QuartzInitOutput(int argc, char **argv);
+void QuartzInitInput(int argc, char **argv);
 Bool QuartzAddScreen(int index, ScreenPtr pScreen);
 Bool QuartzSetupScreen(int index, ScreenPtr pScreen);
 void QuartzGiveUp(void);
-void QuartzHide(void);
-void QuartzShow(int x, int y);
 void QuartzProcessEvent(xEvent *xe);
 
 #endif
diff --git a/xc/programs/Xserver/hw/darwin/quartz/quartzCocoa.m b/xc/programs/Xserver/hw/darwin/quartz/quartzCocoa.m
index b24739184..d6d9bbe32 100644
--- a/xc/programs/Xserver/hw/darwin/quartz/quartzCocoa.m
+++ b/xc/programs/Xserver/hw/darwin/quartz/quartzCocoa.m
@@ -8,7 +8,7 @@
  *
  **************************************************************/
 /*
- * Copyright (c) 2001 Torrey T. Lyons and Greg Parker.
+ * Copyright (c) 2001-2003 Torrey T. Lyons and Greg Parker.
  *                 All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
@@ -33,7 +33,7 @@
  * holders shall not be used in advertising or otherwise to promote the sale,
  * use or other dealings in this Software without prior written authorization.
  */
-/* $XFree86: xc/programs/Xserver/hw/darwin/quartz/quartzCocoa.m,v 1.1 2002/03/28 02:21:19 torrey Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/darwin/quartz/quartzCocoa.m,v 1.3 2003/01/19 06:52:54 torrey Exp $ */
 
 #include <Cocoa/Cocoa.h>
 
@@ -45,7 +45,11 @@ extern void FatalError(const char *, ...);
 extern char *display;
 extern int noPanoramiXExtension;
 
-// Read the user preferences from the Cocoa front end
+
+/*
+ * QuartzReadPreferences
+ *  Read the user preferences from the Cocoa front end.
+ */
 void QuartzReadPreferences(void)
 {
     char *fileString;
@@ -56,13 +60,19 @@ void QuartzReadPreferences(void)
     quartzMouseAccelChange = [Preferences mouseAccelChange];
     quartzUseSysBeep = [Preferences systemBeep];
 
-    // Rootless: use PseudoramiX not Xinerama (quartzRootless already set)
+    // quartzRootless has already been set
     if (quartzRootless) {
+        // Use PseudoramiX instead of Xinerama
         noPanoramiXExtension = TRUE;
         noPseudoramiXExtension = ![Preferences xinerama];
+
+        quartzUseAGL = [Preferences useAGL];
     } else {
         noPanoramiXExtension = ![Preferences xinerama];
         noPseudoramiXExtension = TRUE;
+
+        // Full screen can't use AGL for GLX
+        quartzUseAGL = FALSE;
     }
 
     if ([Preferences useKeymapFile]) {
@@ -81,7 +91,11 @@ void QuartzReadPreferences(void)
     darwinDesiredDepth = [Preferences depth] - 1;
 }
 
-// Write text to the Mac OS X pasteboard.
+
+/*
+ * QuartzWriteCocoaPasteboard
+ *  Write text to the Mac OS X pasteboard.
+ */
 void QuartzWriteCocoaPasteboard(
     char *text)
 {
@@ -101,8 +115,12 @@ void QuartzWriteCocoaPasteboard(
     [pasteboard setString:string forType:NSStringPboardType];
 }
 
-// Read text from the Mac OS X pasteboard and return it as a heap string.
-// The caller must free the string.
+
+/*
+ * QuartzReadCocoaPasteboard
+ *  Read text from the Mac OS X pasteboard and return it as a heap string.
+ *  The caller must free the string.
+ */
 char *QuartzReadCocoaPasteboard(void)
 {
     NSPasteboard *pasteboard;
@@ -129,7 +147,11 @@ char *QuartzReadCocoaPasteboard(void)
     return text;
 }
 
-// Return whether the screen should use a QuickDraw cursor
+
+/*
+ * QuartzFSUseQDCursor
+ *  Return whether the screen should use a QuickDraw cursor.
+ */
 int QuartzFSUseQDCursor(
     int depth)  // screen depth
 {
@@ -146,3 +168,31 @@ int QuartzFSUseQDCursor(
     }
     return TRUE;
 }
+
+
+/*
+ * QuartzBlockHandler
+ *  Clean out any autoreleased objects.
+ */
+void QuartzBlockHandler(
+    void *blockData,
+    void *pTimeout,
+    void *pReadmask)
+{
+    static NSAutoreleasePool *aPool = nil;
+
+    [aPool release];
+    aPool = [[NSAutoreleasePool alloc] init];
+}
+
+
+/*
+ * QuartzWakeupHandler
+ */
+void QuartzWakeupHandler(
+    void *blockData,
+    int result,
+    void *pReadmask)
+{
+    // nothing here
+}
diff --git a/xc/programs/Xserver/hw/darwin/quartz/quartzCommon.h b/xc/programs/Xserver/hw/darwin/quartz/quartzCommon.h
index dce37e001..6c375bd04 100644
--- a/xc/programs/Xserver/hw/darwin/quartz/quartzCommon.h
+++ b/xc/programs/Xserver/hw/darwin/quartz/quartzCommon.h
@@ -6,7 +6,7 @@
  * This file should be included before any X11 or IOKit headers
  * so that it can avoid symbol conflicts.
  *
- * Copyright (c) 2001 Torrey T. Lyons and Greg Parker.
+ * Copyright (c) 2001-2003 Torrey T. Lyons and Greg Parker.
  *                 All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
@@ -31,7 +31,7 @@
  * holders shall not be used in advertising or otherwise to promote the sale,
  * use or other dealings in this Software without prior written authorization.
  */
-/* $XFree86: xc/programs/Xserver/hw/darwin/quartz/quartzCommon.h,v 1.4 2002/10/12 00:32:45 torrey Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/darwin/quartz/quartzCommon.h,v 1.8 2003/01/23 00:34:26 torrey Exp $ */
 
 #ifndef _QUARTZCOMMON_H
 #define _QUARTZCOMMON_H
@@ -70,9 +70,11 @@ extern int              quartzStartClients;
 // User preferences used by Quartz modes
 extern int              quartzRootless;
 extern int              quartzUseSysBeep;
+extern int              quartzUseAGL;
 
 // Other shared data
 extern int              quartzServerVisible;
+extern int              quartzServerQuitting;
 extern int              quartzScreenIndex;
 extern int              aquaMenuBarHeight;
 
@@ -81,11 +83,15 @@ void QuartzMessageMainThread(unsigned msg, void *data, unsigned length);
 void QuartzFSCapture(void);
 void QuartzFSRelease(void);
 int QuartzFSUseQDCursor(int depth);
+void QuartzBlockHandler(void *blockData, void *pTimeout, void *pReadmask);
+void QuartzWakeupHandler(void *blockData, int result, void *pReadmask);
 
 // Messages that can be sent to the main thread.
 enum {
     kQuartzServerHidden,
+    kQuartzServerStarted,
     kQuartzServerDied,
+    kQuartzCursorUpdate,
     kQuartzPostEvent
 };
 
diff --git a/xc/programs/Xserver/hw/darwin/quartz/quartzCursor.c b/xc/programs/Xserver/hw/darwin/quartz/quartzCursor.c
index ddc2fb0ef..8abce2318 100644
--- a/xc/programs/Xserver/hw/darwin/quartz/quartzCursor.c
+++ b/xc/programs/Xserver/hw/darwin/quartz/quartzCursor.c
@@ -4,7 +4,7 @@
  *
  **************************************************************/
 /*
- * Copyright (c) 2001-2002 Torrey T. Lyons and Greg Parker.
+ * Copyright (c) 2001-2003 Torrey T. Lyons and Greg Parker.
  *                 All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
@@ -29,12 +29,14 @@
  * holders shall not be used in advertising or otherwise to promote the sale,
  * use or other dealings in this Software without prior written authorization.
  */
-/* $XFree86: xc/programs/Xserver/hw/darwin/quartz/quartzCursor.c,v 1.3 2002/10/16 17:39:18 torrey Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/darwin/quartz/quartzCursor.c,v 1.5 2003/01/23 00:34:26 torrey Exp $ */
 
 #include "quartzCommon.h"
 #include "quartzCursor.h"
 #include "darwin.h"
 
+#include <pthread.h>
+
 #include "mi.h"
 #include "scrnintstr.h"
 #include "cursorstr.h"
@@ -58,6 +60,11 @@ static unsigned long darwinCursorGeneration = 0;
 static CursorPtr quartzLatentCursor = NULL;
 static QD_Cursor gQDArrow; // QuickDraw arrow cursor
 
+// Cursor for the main thread to set (NULL = arrow cursor).
+static CCrsrHandle currentCursor = NULL;
+static pthread_mutex_t cursorMutex;
+static pthread_cond_t cursorCondition;
+
 #define CURSOR_PRIV(pScreen) \
     ((QuartzCursorScreenPtr)pScreen->devPrivates[darwinCursorScreenIndex].ptr)
 
@@ -79,6 +86,18 @@ static QD_Cursor gQDArrow; // QuickDraw arrow cursor
         visible = TRUE;                                                 \
     } ((void)0)
 
+#define CHANGE_QD_CURSOR(cursorH)                                       \
+    if (!quartzServerQuitting) {                                        \
+        /* Acquire lock and tell the main thread to change cursor */    \
+        pthread_mutex_lock(&cursorMutex);                               \
+        currentCursor = (CCrsrHandle) (cursorH);                        \
+        QuartzMessageMainThread(kQuartzCursorUpdate, NULL, 0);          \
+                                                                        \
+        /* Wait for the main thread to change the cursor */             \
+        pthread_cond_wait(&cursorCondition, &cursorMutex);              \
+        pthread_mutex_unlock(&cursorMutex);                             \
+    } ((void)0)
+
 
 /*
  * MakeQDCursor helpers: CTAB_ENTER, interleave
@@ -326,7 +345,12 @@ QuartzUnrealizeCursor(
                         (pScreen, pCursor);
         }
     } else {
-        FreeQDCursor((CCrsrHandle) pCursor->devPriv[pScreen->myNum]);
+        CCrsrHandle oldCursor = (CCrsrHandle) pCursor->devPriv[pScreen->myNum];
+
+        if (currentCursor != oldCursor) {
+            // This should only fail when quitting, in which case we just leak.
+            FreeQDCursor(oldCursor);
+        }
         pCursor->devPriv[pScreen->myNum] = NULL;
         return TRUE;
     }
@@ -363,19 +387,16 @@ QuartzSetCursor(
              (pCursor->bits->width <= CURSORWIDTH) && ScreenPriv->useQDCursor)
     {
         // Cursor is small enough to use QuickDraw directly.
-        CCrsrHandle curs;
-
         if (! ScreenPriv->qdCursorMode)    // remove the X cursor
             (*ScreenPriv->spriteFuncs->SetCursor)(pScreen, 0, x, y);
         ScreenPriv->qdCursorMode = TRUE;
 
-        curs = (CCrsrHandle) pCursor->devPriv[pScreen->myNum];
-        SetCCursor(curs);
+        CHANGE_QD_CURSOR(pCursor->devPriv[pScreen->myNum]);
         SHOW_QD_CURSOR(pScreen, ScreenPriv->qdCursorVisible);
     }
     else if (quartzRootless) {
         // Rootless can't use a software cursor, so we just use Mac OS arrow.
-        SetCursor(&gQDArrow);
+        CHANGE_QD_CURSOR(NULL);
         SHOW_QD_CURSOR(pScreen, ScreenPriv->qdCursorVisible);
     }
     else {
@@ -388,6 +409,27 @@ QuartzSetCursor(
 
 
 /*
+ * QuartzReallySetCursor
+ * Set the QuickDraw cursor. Called from the main thread since changing the
+ * cursor with QuickDraw is not thread safe on dual processor machines.
+ */
+void
+QuartzReallySetCursor()
+{
+    pthread_mutex_lock(&cursorMutex);
+
+    if (currentCursor) {
+        SetCCursor(currentCursor);
+    } else {
+        SetCursor(&gQDArrow);
+    }
+
+    pthread_cond_signal(&cursorCondition);
+    pthread_mutex_unlock(&cursorMutex);
+}
+
+
+/*
  * QuartzMoveCursor
  * Move the cursor. This is a noop for QuickDraw.
  */
@@ -412,6 +454,7 @@ static miPointerSpriteFuncRec quartzSpriteFuncsRec = {
     QuartzMoveCursor
 };
 
+
 /*
 ===========================================================================
 
@@ -488,25 +531,7 @@ QuartzWarpCursor(
     }
 
     miPointerWarpCursor(pScreen, x, y);
-}
-
-
-/*
- * QuartzEnqueueEvent
- *  Enqueue an event from the X server thread. Most events are posted with
- *  DarwinEQEnqueue() by the main thread, but any events generated by the
- *  X server thread must be posted with this routine.
- */
-static void QuartzEnqueueEvent(
-    xEvent *xe)
-{
-    // Convert back to global screen coordinates
-    xe->u.keyButtonPointer.rootX += darwinMainScreenX +
-            dixScreenOrigins[miPointerCurrentScreen()->myNum].x;
-    xe->u.keyButtonPointer.rootY += darwinMainScreenY +
-            dixScreenOrigins[miPointerCurrentScreen()->myNum].y;
-
-    QuartzMessageMainThread(kQuartzPostEvent, xe, sizeof(xEvent));
+    miPointerUpdate();
 }
 
 
@@ -514,10 +539,11 @@ static miPointerScreenFuncRec quartzScreenFuncsRec = {
     QuartzCursorOffScreen,
     QuartzCrossScreen,
     QuartzWarpCursor,
-    QuartzEnqueueEvent,
+    DarwinEQPointerPost,
     DarwinEQSwitchScreen
 };
 
+
 /*
 ===========================================================================
 
@@ -595,6 +621,13 @@ QuartzInitCursor(
         ScreenPriv->useQDCursor = TRUE;
     ScreenPriv->qdCursorMode = TRUE;
     ScreenPriv->qdCursorVisible = TRUE;
+
+    // initialize cursor mutex lock
+    pthread_mutex_init(&cursorMutex, NULL);
+
+    // initialize condition for waiting
+    pthread_cond_init(&cursorCondition, NULL);
+
     return TRUE;
 }
 
@@ -605,7 +638,7 @@ void QuartzSuspendXCursor(
 {
     QuartzCursorScreenPtr ScreenPriv = CURSOR_PRIV(pScreen);
 
-    SetCursor(&gQDArrow);
+    CHANGE_QD_CURSOR(NULL);
     SHOW_QD_CURSOR(pScreen, ScreenPriv->qdCursorVisible);
 }
 
diff --git a/xc/programs/Xserver/hw/darwin/quartz/quartzStartup.c b/xc/programs/Xserver/hw/darwin/quartz/quartzStartup.c
index 9b210ac6e..dfa7b8166 100644
--- a/xc/programs/Xserver/hw/darwin/quartz/quartzStartup.c
+++ b/xc/programs/Xserver/hw/darwin/quartz/quartzStartup.c
@@ -4,7 +4,7 @@
  *
  **************************************************************/
 /*
- * Copyright (c) 2001 Torrey T. Lyons. All Rights Reserved.
+ * Copyright (c) 2001-2003 Torrey T. Lyons. All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -28,18 +28,29 @@
  * holders shall not be used in advertising or otherwise to promote the sale,
  * use or other dealings in this Software without prior written authorization.
  */
-/* $XFree86: xc/programs/Xserver/hw/darwin/quartz/quartzStartup.c,v 1.1 2002/03/28 02:21:19 torrey Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/darwin/quartz/quartzStartup.c,v 1.3 2003/01/19 06:35:13 torrey Exp $ */
 
 #include <fcntl.h>
+#include <unistd.h>
+#include <CoreFoundation/CoreFoundation.h>
 #include "quartzCommon.h"
 #include "darwin.h"
 #include "opaque.h"
+#include "micmap.h"
 
 int NSApplicationMain(int argc, char *argv[]);
 
 char **envpGlobal;      // argcGlobal and argvGlobal
                         // are from dix/globals.c
 
+// GLX bundle function pointers
+typedef void (*GlxExtensionInitPtr)(void); 
+static GlxExtensionInitPtr GlxExtensionInit = NULL;
+
+typedef void (*GlxWrapInitVisualsPtr)(miInitVisualsProcPtr *);
+static GlxWrapInitVisualsPtr GlxWrapInitVisuals = NULL;
+
+
 /*
  * DarwinHandleGUI
  *  This function is called first from main(). The first time
@@ -92,6 +103,89 @@ void DarwinHandleGUI(
     exit(main_exit);
 }
 
+
+/*
+ * LoadGlxBundle
+ *  The Quartz mode X server needs to dynamically load the appropriate
+ *  bundle before initializing GLX.
+ */
+static void LoadGlxBundle(void)
+{
+    CFBundleRef mainBundle;
+    CFStringRef bundleName;
+    CFURLRef    bundleURL;
+    CFBundleRef glxBundle;
+
+    // Get the main bundle for the application
+    mainBundle = CFBundleGetMainBundle();
+
+    // Choose the bundle to load
+    ErrorF("Loading GLX bundle ");
+    if (quartzUseAGL) {
+        bundleName = CFSTR("glxAGL.bundle");
+        ErrorF("glxAGL.bundle (using Apple's OpenGL)\n");
+    } else {
+        bundleName = CFSTR("glxMesa.bundle");
+        ErrorF("glxMesa.bundle (using Mesa)\n");
+    }
+
+    // Look for the appropriate GLX bundle in the main bundle by name
+    bundleURL = CFBundleCopyResourceURL(mainBundle, bundleName,
+                                        NULL, NULL);
+    if (!bundleURL) {
+        FatalError("Could not find GLX bundle.");
+    }
+
+    // Make a bundle instance using the URLRef
+    glxBundle = CFBundleCreate(kCFAllocatorDefault, bundleURL);
+
+    if (!CFBundleLoadExecutable(glxBundle)) {
+        FatalError("Could not load GLX bundle.");
+    }
+
+    // Find the GLX init functions
+    GlxExtensionInit = (void *) CFBundleGetFunctionPointerForName(
+                                glxBundle, CFSTR("GlxExtensionInit"));
+
+    GlxWrapInitVisuals = (void *) CFBundleGetFunctionPointerForName(
+                                glxBundle, CFSTR("GlxWrapInitVisuals"));
+
+    if (!GlxExtensionInit || !GlxWrapInitVisuals) {
+        FatalError("Could not initialize GLX bundle.");
+    }
+
+    // Release the CF objects
+    CFRelease(mainBundle);
+    CFRelease(bundleURL);
+}
+
+
+/*
+ * DarwinGlxExtensionInit
+ *  Initialize the GLX extension.
+ */
+void DarwinGlxExtensionInit(void)
+{
+    if (!GlxExtensionInit)
+        LoadGlxBundle();
+
+    GlxExtensionInit();
+}
+
+
+/*
+ * DarwinGlxWrapInitVisuals
+ */
+void DarwinGlxWrapInitVisuals(
+    miInitVisualsProcPtr *procPtr)
+{
+    if (!GlxWrapInitVisuals)
+        LoadGlxBundle();
+
+    GlxWrapInitVisuals(procPtr);
+}
+
+
 int QuartzProcessArgument( int argc, char *argv[], int i )
 {
     // fullscreen: CoreGraphics full-screen mode
diff --git a/xc/programs/Xserver/hw/darwin/quartz/rootlessAquaGlue.c b/xc/programs/Xserver/hw/darwin/quartz/rootlessAquaGlue.c
index bebfb411b..655de4095 100644
--- a/xc/programs/Xserver/hw/darwin/quartz/rootlessAquaGlue.c
+++ b/xc/programs/Xserver/hw/darwin/quartz/rootlessAquaGlue.c
@@ -7,7 +7,7 @@
  *
  * Greg Parker     gparker@cs.stanford.edu
  */
-/* $XFree86: xc/programs/Xserver/hw/darwin/quartz/rootlessAquaGlue.c,v 1.4 2002/07/24 05:58:33 torrey Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/darwin/quartz/rootlessAquaGlue.c,v 1.5 2002/12/10 00:00:39 torrey Exp $ */
 
 #include "quartzCommon.h"
 #include "darwin.h"
@@ -179,13 +179,13 @@ AquaAddScreen(int index, ScreenPtr pScreen)
     CGDisplayCount allocatedDisplays = 0;
     CGDirectDisplayID *displays = NULL;
     CGDisplayErr cgErr;
+    int componentCount;
 
-    dfb->pixelInfo.pixelType = kIORGBDirectPixels;
+    dfb->colorType = TrueColor;
     AquaScreenInit(index, &dfb->x, &dfb->y, &dfb->width, &dfb->height,
-                    &dfb->pitch, &dfb->pixelInfo.bitsPerComponent,
-                    &dfb->pixelInfo.componentCount, &dfb->bitsPerPixel);
-    dfb->colorBitsPerPixel = dfb->pixelInfo.bitsPerComponent *
-                             dfb->pixelInfo.componentCount;
+                    &dfb->pitch, &dfb->bitsPerComponent,
+                    &componentCount, &dfb->bitsPerPixel);
+    dfb->colorBitsPerPixel = dfb->bitsPerComponent * componentCount;
 
     // No frame buffer - it's all in window pixmaps.
     dfb->framebuffer = NULL; // malloc(dfb.pitch * dfb.height);
diff --git a/xc/programs/Xserver/hw/darwin/quartz/rootlessAquaImp.h b/xc/programs/Xserver/hw/darwin/quartz/rootlessAquaImp.h
index ded22d40b..e625b08ba 100644
--- a/xc/programs/Xserver/hw/darwin/quartz/rootlessAquaImp.h
+++ b/xc/programs/Xserver/hw/darwin/quartz/rootlessAquaImp.h
@@ -3,7 +3,7 @@
  *
  * Greg Parker     gparker@cs.stanford.edu
  */
-/* $XFree86: xc/programs/Xserver/hw/darwin/quartz/rootlessAquaImp.h,v 1.1 2002/03/28 02:21:19 torrey Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/darwin/quartz/rootlessAquaImp.h,v 1.2 2002/12/10 00:00:39 torrey Exp $ */
 
 #ifndef _ROOTLESSAQUAIMP_H
 #define _ROOTLESSAQUAIMP_H
@@ -13,8 +13,7 @@
 int AquaDisplayCount();
 
 void AquaScreenInit(int index, int *x, int *y, int *width, int *height,
-                    int *rowBytes, unsigned long *bps, unsigned long *spp,
-                    int *bpp);
+                    int *rowBytes, int *bps, int *spp, int *bpp);
 
 void *AquaNewWindow(void *upperw, int x, int y, int w, int h, int isRoot);
 
diff --git a/xc/programs/Xserver/hw/darwin/quartz/rootlessAquaImp.m b/xc/programs/Xserver/hw/darwin/quartz/rootlessAquaImp.m
index 3a67b3693..9cf8b37d7 100644
--- a/xc/programs/Xserver/hw/darwin/quartz/rootlessAquaImp.m
+++ b/xc/programs/Xserver/hw/darwin/quartz/rootlessAquaImp.m
@@ -27,7 +27,7 @@
  * holders shall not be used in advertising or otherwise to promote the sale,
  * use or other dealings in this Software without prior written authorization.
  */
-/* $XFree86: xc/programs/Xserver/hw/darwin/quartz/rootlessAquaImp.m,v 1.3 2002/08/28 06:41:26 torrey Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/darwin/quartz/rootlessAquaImp.m,v 1.6 2003/01/24 00:11:39 torrey Exp $ */
 
 #include "rootlessAquaImp.h"
 #include "fakeBoxRec.h"
@@ -61,12 +61,11 @@ int AquaDisplayCount()
 
 
 void AquaScreenInit(int index, int *x, int *y, int *width, int *height,
-                    int *rowBytes, unsigned long *bps, unsigned long *spp,
-                    int *bpp)
+                    int *rowBytes, int *bps, int *spp, int *bpp)
 {
-    *bps = 8;
     *spp = 3;
-    *bpp = 32;
+    *bps = CGDisplayBitsPerSample(kCGDirectMainDisplay);
+    *bpp = CGDisplayBitsPerPixel(kCGDirectMainDisplay);
 
     if (noPseudoramiXExtension) {
         NSScreen *screen = [[NSScreen screens] objectAtIndex:index];
@@ -162,7 +161,6 @@ void AquaScreenInit(int index, int *x, int *y, int *width, int *height,
  *    Event thread - autodisplay: locks view hierarchy, then window
  *    X Server thread - window resize: locks window, then view hierarchy
  *  Deadlock occurs if each thread gets one lock and waits for the other.
- *  Autodisplay can also cause NSCarbonWindows to lose their contents.
 */
 void *AquaNewWindow(void *upperw, int x, int y, int w, int h, int isRoot)
 {
@@ -259,7 +257,7 @@ void AquaMoveWindow(void *rw, int x, int y)
 
 /*
  * AquaStartResizeWindow
- *  Undo any shape and resize the on screen window.
+ *  Resize the on screen window.
  */
 void AquaStartResizeWindow(void *rw, int x, int y, int w, int h)
 {
@@ -347,6 +345,14 @@ void AquaReshapeWindow(void *rw, fakeBoxRec *fakeRects, int count)
     NSRect frame = [winRec->view frame];
     int winHeight = NSHeight(frame);
 
+    [winRec->view lockFocus];
+
+    // If window is currently shaped we need to undo the previous shape
+    if (![winRec->window isOpaque]) {
+        [[NSColor whiteColor] set];
+        NSRectFillUsingOperation(frame, NSCompositeDestinationAtop);
+    }
+
     if (count > 0) {
         fakeBoxRec *rects, *end;
 
@@ -354,7 +360,6 @@ void AquaReshapeWindow(void *rw, fakeBoxRec *fakeRects, int count)
         [winRec->window setOpaque:NO];
 
         // Clear the areas outside the window shape
-        [winRec->view lockFocus];
         [[NSColor clearColor] set];
         for (rects = fakeRects, end = fakeRects+count; rects < end; rects++) {
             int rectHeight = rects->y2 - rects->y1;
@@ -363,7 +368,6 @@ void AquaReshapeWindow(void *rw, fakeBoxRec *fakeRects, int count)
                                    rects->x2 - rects->x1, rectHeight) );
         }
         [[NSGraphicsContext currentContext] flushGraphics];
-        [winRec->view unlockFocus];
 
         // force update of window shadow
         [winRec->window setHasShadow:NO];
@@ -375,6 +379,8 @@ void AquaReshapeWindow(void *rw, fakeBoxRec *fakeRects, int count)
         [winRec->window setOpaque:YES];
         AquaUpdateRects(rw, &bounds, 1);
     }
+
+    [winRec->view unlockFocus];
 }
 
 
diff --git a/xc/programs/Xserver/hw/darwin/quartz/rootlessCommon.c b/xc/programs/Xserver/hw/darwin/quartz/rootlessCommon.c
index 2018fa84f..2e9b43f81 100644
--- a/xc/programs/Xserver/hw/darwin/quartz/rootlessCommon.c
+++ b/xc/programs/Xserver/hw/darwin/quartz/rootlessCommon.c
@@ -1,9 +1,33 @@
 /*
  * Common rootless definitions and code
+ */
+/*
+ * Copyright (c) 2001 Greg Parker. All Rights Reserved.
+ * Copyright (c) 2002-2003 Torrey T. Lyons. All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE ABOVE LISTED COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
  *
- * Greg Parker     gparker@cs.stanford.edu
+ * Except as contained in this notice, the name(s) of the above copyright
+ * holders shall not be used in advertising or otherwise to promote the sale,
+ * use or other dealings in this Software without prior written authorization.
  */
-/* $XFree86: xc/programs/Xserver/hw/darwin/quartz/rootlessCommon.c,v 1.6 2002/07/15 19:58:31 torrey Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/darwin/quartz/rootlessCommon.c,v 1.7 2003/01/29 01:11:05 torrey Exp $ */
 
 #include "rootlessCommon.h"
 
diff --git a/xc/programs/Xserver/hw/darwin/quartz/rootlessCommon.h b/xc/programs/Xserver/hw/darwin/quartz/rootlessCommon.h
index 43a74e106..55524ddcb 100644
--- a/xc/programs/Xserver/hw/darwin/quartz/rootlessCommon.h
+++ b/xc/programs/Xserver/hw/darwin/quartz/rootlessCommon.h
@@ -1,17 +1,39 @@
 /*
  * Common internal rootless definitions and code
+ */
+/*
+ * Copyright (c) 2001 Greg Parker. All Rights Reserved.
+ * Copyright (c) 2002-2003 Torrey T. Lyons. All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
  *
- * Greg Parker     gparker@cs.stanford.edu
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE ABOVE LISTED COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name(s) of the above copyright
+ * holders shall not be used in advertising or otherwise to promote the sale,
+ * use or other dealings in this Software without prior written authorization.
  */
-/* $XFree86: xc/programs/Xserver/hw/darwin/quartz/rootlessCommon.h,v 1.6 2002/07/24 05:58:33 torrey Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/darwin/quartz/rootlessCommon.h,v 1.7 2003/01/29 01:11:05 torrey Exp $ */
 
 #ifndef _ROOTLESSCOMMON_H
 #define _ROOTLESSCOMMON_H
 
 #include "rootless.h"
-
-#include "pixmapstr.h"
-#include "windowstr.h"
+#include "fb.h"
 
 #ifdef RENDER
 #include "picturestr.h"
@@ -189,12 +211,22 @@ extern RegionRec rootlessHugeRoot;
  * SetPixmapBaseToScreen
  *  Move the given pixmap's base address to where pixel (0, 0)
  *  would be if the pixmap's actual data started at (x, y).
+ *  Can't access the bits before the first word of the drawable's data in
+ *  rootless mode, so make sure our base address is always 32-bit aligned.
  */
-#define SetPixmapBaseToScreen(pix, x, y) { \
-    PixmapPtr   _pPix = (PixmapPtr) (pix); \
-    _pPix->devPrivate.ptr = (char *) (_pPix->devPrivate.ptr) - \
-                            ((int)(x) * _pPix->drawable.bitsPerPixel/8 + \
-                             (int)(y) * _pPix->devKind); \
+#define SetPixmapBaseToScreen(pix, _x, _y) {				\
+    PixmapPtr   _pPix = (PixmapPtr) (pix);				\
+    _pPix->devPrivate.ptr = (char *) (_pPix->devPrivate.ptr) -		\
+                            ((int)(_x) * _pPix->drawable.bitsPerPixel/8 + \
+                             (int)(_y) * _pPix->devKind);		\
+    if (_pPix->drawable.bitsPerPixel != FB_UNIT) {			\
+        unsigned _diff = ((unsigned) _pPix->devPrivate.ptr) & 		\
+                         (FB_UNIT / CHAR_BIT - 1);			\
+	_pPix->devPrivate.ptr = (char *) (_pPix->devPrivate.ptr) - 	\
+                                _diff;					\
+        _pPix->drawable.x = _diff /					\
+                            (_pPix->drawable.bitsPerPixel / CHAR_BIT);	\
+    }									\
 }
 
 
diff --git a/xc/programs/Xserver/hw/darwin/quartz/rootlessGC.c b/xc/programs/Xserver/hw/darwin/quartz/rootlessGC.c
index 1542d2c00..97fbd21eb 100644
--- a/xc/programs/Xserver/hw/darwin/quartz/rootlessGC.c
+++ b/xc/programs/Xserver/hw/darwin/quartz/rootlessGC.c
@@ -27,7 +27,7 @@
  * holders shall not be used in advertising or otherwise to promote the sale,
  * use or other dealings in this Software without prior written authorization.
  */
-/* $XFree86: xc/programs/Xserver/hw/darwin/quartz/rootlessGC.c,v 1.3 2002/07/24 05:58:33 torrey Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/darwin/quartz/rootlessGC.c,v 1.4 2003/01/27 06:04:59 torrey Exp $ */
 
 #include "mi.h"
 #include "scrnintstr.h"
@@ -162,16 +162,17 @@ RootlessCreateGC(GCPtr pGC)
 static void
 RootlessValidateGC(GCPtr pGC, unsigned long changes, DrawablePtr pDrawable)
 {
-
     GCFUNC_UNWRAP(pGC);
 
     gcrec->originalOps = NULL;
 
     if (pDrawable->type == DRAWABLE_WINDOW)
     {
+        int depth = pDrawable->depth;
+
         // We force a planemask so fb doesn't overwrite the alpha channel.
         // Left to its own devices, fb will optimize away the planemask.
-        int depth = pDrawable->depth;
+        changes |= GCPlaneMask;
         pDrawable->depth = pDrawable->bitsPerPixel;
         pGC->planemask &= ~AquaAlphaMask(pDrawable->bitsPerPixel);
         pGC->funcs->ValidateGC(pGC, changes, pDrawable);
diff --git a/xc/programs/Xserver/hw/darwin/quartz/rootlessScreen.c b/xc/programs/Xserver/hw/darwin/quartz/rootlessScreen.c
index 50428cc4d..b757a15ad 100644
--- a/xc/programs/Xserver/hw/darwin/quartz/rootlessScreen.c
+++ b/xc/programs/Xserver/hw/darwin/quartz/rootlessScreen.c
@@ -6,7 +6,7 @@
  * February 2001  Created
  * March 3, 2001  Restructured as generic rootless mode
  */
-/* $XFree86: xc/programs/Xserver/hw/darwin/quartz/rootlessScreen.c,v 1.3 2002/10/16 21:13:33 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/darwin/quartz/rootlessScreen.c,v 1.4 2003/02/23 21:48:23 torrey Exp $ */
 
 
 #include "mi.h"
@@ -59,16 +59,52 @@ RootlessGetImage(DrawablePtr pDrawable, int sx, int sy, int w, int h,
     SCREEN_UNWRAP(pScreen, GetImage);
 
     if (pDrawable->type == DRAWABLE_WINDOW) {
+        int x0, y0, x1, y1;
+        RootlessWindowRec *winRec;
+
         // Many apps use GetImage to sync with the visible frame buffer
         // FIXME: entire screen or just window or all screens?
         RootlessRedisplayScreen(pScreen);
 
         // RedisplayScreen stops drawing, so we need to start it again
         RootlessStartDrawing((WindowPtr)pDrawable);
+
+        /* Check that we have some place to read from. */
+        winRec = WINREC (TopLevelParent ((WindowPtr) pDrawable));
+        if (winRec == NULL)
+            goto out;
+
+        /* Clip to top-level window bounds. */
+        /* FIXME: fbGetImage uses the width parameter to calculate the
+           stride of the destination pixmap. If w is clipped, the data
+           returned will be garbage, although we will not crash. */
+
+        x0 = pDrawable->x + sx;
+        y0 = pDrawable->y + sy;
+        x1 = x0 + w;
+        y1 = y0 + h;
+
+        if (x0 < winRec->frame.x)
+            x0 = winRec->frame.x;
+        if (y0 < winRec->frame.y)
+            y0 = winRec->frame.y;
+        if (x1 > winRec->frame.x + winRec->frame.w)
+            x1 = winRec->frame.x + winRec->frame.w;
+        if (y1 > winRec->frame.y + winRec->frame.h)
+            y1 = winRec->frame.y + winRec->frame.h;
+
+        sx = x0 - pDrawable->x;
+        sy = y0 - pDrawable->y;
+        w = x1 - x0;
+        h = y1 - y0;
+
+        if (w <= 0 || h <= 0)
+            goto out;
     }
 
     pScreen->GetImage(pDrawable, sx, sy, w, h, format, planeMask, pdstLine);
 
+out:
     SCREEN_WRAP(pScreen, GetImage);
 }
 
diff --git a/xc/programs/Xserver/hw/darwin/quartz/rootlessWindow.c b/xc/programs/Xserver/hw/darwin/quartz/rootlessWindow.c
index d283b4181..9982170db 100644
--- a/xc/programs/Xserver/hw/darwin/quartz/rootlessWindow.c
+++ b/xc/programs/Xserver/hw/darwin/quartz/rootlessWindow.c
@@ -27,7 +27,7 @@
  * holders shall not be used in advertising or otherwise to promote the sale,
  * use or other dealings in this Software without prior written authorization.
  */
-/* $XFree86: xc/programs/Xserver/hw/darwin/quartz/rootlessWindow.c,v 1.11 2002/09/28 00:43:39 torrey Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/darwin/quartz/rootlessWindow.c,v 1.13 2003/01/29 01:11:05 torrey Exp $ */
 
 #include "rootlessCommon.h"
 #include "rootlessWindow.h"
@@ -483,17 +483,19 @@ StartFrameResize(WindowPtr pWin, Bool gravity,
     SetPixmapBaseToScreen(gResizeDeathPix, oldX, oldY);
     RootlessStopDrawing(pWin);
 
+    // Update the window frame's size and location
     winRec->frame.x = newX;
     winRec->frame.y = newY;
     winRec->frame.w = newW;
     winRec->frame.h = newH;
     winRec->borderWidth = newBW;
 
+    // Move the window on screen and create a new pixmap for it
     CallFrameProc(pScreen, StartResizeFrame,
                   (pScreen, &winRec->frame, oldX, oldY, oldW, oldH));
     RootlessStartDrawing(pWin);
 
-    // Use custom CopyWindow when moving gravity bits around
+    // Use custom CopyWindow when moving gravity bits around.
     // ResizeWindow assumes the old window contents are in the same
     // pixmap, but here they're in deathPix instead.
     if (gravity) {
@@ -503,9 +505,9 @@ StartFrameResize(WindowPtr pWin, Bool gravity,
     }
 
     // Copy pixels in intersection from src to dst.
-    // ResizeWindow assumes these pixels are already present when
-    // making gravity adjustments.
-    // pWin currently has new-sized pixmap but is in old position.
+    // ResizeWindow assumes these pixels are already present when making
+    // gravity adjustments. pWin currently has new-sized pixmap but its
+    // drawable is in the old position.
     // fixme border width change!
     {
         BoxRec rect;
@@ -525,8 +527,19 @@ StartFrameResize(WindowPtr pWin, Bool gravity,
 
         // rect is the intersection of the old location and new location
         if (BOX_NOT_EMPTY(rect)) {
+            /* The window drawable still has the old frame position, which
+               means that DST doesn't actually point at the origin of our
+               physical backing store when adjusted by the drawable.x,y
+               position. So sneakily adjust it temporarily while copying.. */
+
+            ((PixmapPtr) dst)->devPrivate.ptr = winRec->frame.pixelData;
+            SetPixmapBaseToScreen(dst, newX, newY);
+
             fbCopyWindowProc(src, dst, NULL, &rect, 1, 0, 0,
                              FALSE, FALSE, 0, 0);
+
+            ((PixmapPtr) dst)->devPrivate.ptr = winRec->frame.pixelData;
+            SetPixmapBaseToScreen(dst, oldX, oldY);
         }
     }
 }
diff --git a/xc/programs/Xserver/hw/darwin/xfIOKit.c b/xc/programs/Xserver/hw/darwin/xfIOKit.c
index 5c0f0a6db..b04baaae0 100644
--- a/xc/programs/Xserver/hw/darwin/xfIOKit.c
+++ b/xc/programs/Xserver/hw/darwin/xfIOKit.c
@@ -33,9 +33,7 @@
  * holders shall not be used in advertising or otherwise to promote the sale,
  * use or other dealings in this Software without prior written authorization.
  */
-/* $XFree86: xc/programs/Xserver/hw/darwin/xfIOKit.c,v 1.15 2002/03/28 02:21:08 torrey Exp $ */
-
-#define NDEBUG 1
+/* $XFree86: xc/programs/Xserver/hw/darwin/xfIOKit.c,v 1.17 2002/12/15 06:10:15 torrey Exp $ */
 
 #include "X.h"
 #include "Xproto.h"
@@ -70,12 +68,17 @@
 #include "darwin.h"
 #include "xfIOKit.h"
 
+// Globals
+int             xfIOKitScreenIndex = 0;
+io_connect_t    xfIOKitInputConnect = 0;
+
+static pthread_t                inputThread;
 static EvGlobals *              evg;
 static mach_port_t              masterPort;
 static mach_port_t              notificationPort;
 static IONotificationPortRef    NotificationPortRef;
 static mach_port_t              pmNotificationPort;
-static io_iterator_t            iter;
+static io_iterator_t            fbIter;
 
 
 /*
@@ -92,7 +95,7 @@ static void XFIOKitStoreColors(
     int             i;
     IOColorEntry    *newColors;
     ScreenPtr       pScreen = pmap->pScreen;
-    DarwinFramebufferPtr dfb = SCREEN_PRIV(pScreen);
+    XFIOKitScreenPtr iokitScreen = XFIOKIT_SCREEN_PRIV(pScreen);
 
     assert( newColors = (IOColorEntry *)
                 xalloc( numEntries*sizeof(IOColorEntry) ));
@@ -107,13 +110,14 @@ static void XFIOKitStoreColors(
         newColors[i].blue =  pdefs[i].blue;
     }
 
-    kr = IOFBSetCLUT( dfb->fbService, 0, numEntries,
+    kr = IOFBSetCLUT( iokitScreen->fbService, 0, numEntries,
                       kSetCLUTByValue, newColors );
     kern_assert( kr );
 
     xfree( newColors );
 }
 
+
 /*
  * XFIOKitBell
  *  FIXME
@@ -126,6 +130,7 @@ void XFIOKitBell(
 {
 }
 
+
 /*
  * XFIOKitGiveUp
  *  Closes the connections to IOKit services
@@ -136,14 +141,16 @@ void XFIOKitGiveUp( void )
 
     // we must close the HID System first
     // because it is a client of the framebuffer
-    NXCloseEventStatus( hid.paramConnect );
-    IOServiceClose( hid.connect );
+    NXCloseEventStatus( darwinParamConnect );
+    IOServiceClose( xfIOKitInputConnect );
     for (i = 0; i < screenInfo.numScreens; i++) {
-        DarwinFramebufferPtr dfb = SCREEN_PRIV(screenInfo.screens[i]);
-        IOServiceClose( dfb->fbService );
+        XFIOKitScreenPtr iokitScreen =
+                            XFIOKIT_SCREEN_PRIV(screenInfo.screens[i]);
+        IOServiceClose( iokitScreen->fbService );
     }
 }
 
+
 /*
  * ClearEvent
  *  Clear an event from the HID System event queue
@@ -157,16 +164,17 @@ static void ClearEvent(NXEvent * ep)
                                 ep->data.compound.misc.L[1] = 0;
 }
 
+
 /*
  * XFIOKitHIDThread
- *  Read the HID System event queue and pass to pipe
+ *  Read the HID System event queue, translate it to an X event,
+ *  and queue it for processing.
  */
 static void *XFIOKitHIDThread(void *arg)
 {
     int iokitEventWriteFD = (int)arg;
 
     for (;;) {
-        NXEvent                 ev;
         NXEQElement             *oldHead;
         mach_msg_return_t       kr;
         mach_msg_empty_rcv_t    msg;
@@ -176,6 +184,11 @@ static void *XFIOKitHIDThread(void *arg)
         kern_assert(kr);
 
         while (evg->LLEHead != evg->LLETail) {
+            NXEvent ev;
+            xEvent xe;
+            char byte = 0;
+
+            // Extract the next event from the kernel queue
             oldHead = (NXEQElement*)&evg->lleq[evg->LLEHead];
             ev_lock(&oldHead->sema);
             ev = oldHead->event;
@@ -183,12 +196,91 @@ static void *XFIOKitHIDThread(void *arg)
             evg->LLEHead = oldHead->next;
             ev_unlock(&oldHead->sema);
 
-            write(iokitEventWriteFD, &ev, sizeof(ev));
+            memset(&xe, 0, sizeof(xe));
+
+            // These fields should be filled in for every event
+            xe.u.keyButtonPointer.rootX = ev.location.x;
+            xe.u.keyButtonPointer.rootY = ev.location.y;
+            xe.u.keyButtonPointer.time = GetTimeInMillis();
+
+            switch( ev.type ) {
+                case NX_MOUSEMOVED:
+                    xe.u.u.type = MotionNotify;
+                    break;
+
+                case NX_LMOUSEDOWN:
+                    xe.u.u.type = ButtonPress;
+                    xe.u.u.detail = 1;
+                    break;
+
+                case NX_LMOUSEUP:
+                    xe.u.u.type = ButtonRelease;
+                    xe.u.u.detail = 1;
+                    break;
+
+                // A newer kernel generates multi-button events with
+                // NX_SYSDEFINED. Button 2 isn't handled correctly by
+                // older kernels anyway. Just let NX_SYSDEFINED events
+                // handle these.
+#if 0
+                case NX_RMOUSEDOWN:
+                    xe.u.u.type = ButtonPress;
+                    xe.u.u.detail = 2;
+                    break;
+
+                case NX_RMOUSEUP:
+                    xe.u.u.type = ButtonRelease;
+                    xe.u.u.detail = 2;
+                    break;
+#endif
+
+                case NX_KEYDOWN:
+                    xe.u.u.type = KeyPress;
+                    xe.u.u.detail = ev.data.key.keyCode;
+                    break;
+
+                case NX_KEYUP:
+                    xe.u.u.type = KeyRelease;
+                    xe.u.u.detail = ev.data.key.keyCode;
+                    break;
+
+                case NX_FLAGSCHANGED:
+                    xe.u.u.type = kXDarwinUpdateModifiers;
+                    xe.u.clientMessage.u.l.longs0 = ev.flags;
+                    break;
+
+                case NX_SYSDEFINED:
+                    if (ev.data.compound.subType == 7) {
+                        xe.u.u.type = kXDarwinUpdateButtons;
+                        xe.u.clientMessage.u.l.longs0 =
+                                        ev.data.compound.misc.L[0];
+                        xe.u.clientMessage.u.l.longs1 =
+                                        ev.data.compound.misc.L[1];
+                    } else {
+                        continue;
+                    }
+                    break;
+
+                case NX_SCROLLWHEELMOVED:
+                    xe.u.u.type = kXDarwinScrollWheel;
+                    xe.u.clientMessage.u.s.shorts0 =
+                                    ev.data.scrollWheel.deltaAxis1;
+                    break;
+
+                default:
+                    continue;
+            }
+
+            DarwinEQEnqueue(&xe);
+            // signal there is an event ready to handle
+            write(iokitEventWriteFD, &byte, 1);
         }
     }
+
     return NULL;
 }
 
+
 /*
  * XFIOKitPMThread
  *  Handle power state notifications
@@ -196,7 +288,7 @@ static void *XFIOKitHIDThread(void *arg)
 static void *XFIOKitPMThread(void *arg)
 {
     ScreenPtr pScreen = (ScreenPtr)arg;
-    DarwinFramebufferPtr dfb = SCREEN_PRIV(pScreen);
+    XFIOKitScreenPtr iokitScreen = XFIOKIT_SCREEN_PRIV(pScreen);
 
     for (;;) {
         mach_msg_return_t       kr;
@@ -208,7 +300,7 @@ static void *XFIOKitPMThread(void *arg)
 
         // display is powering down
         if (msg.header.msgh_id == 0) {
-            IOFBAcknowledgePM( dfb->fbService );
+            IOFBAcknowledgePM( iokitScreen->fbService );
             xf86SetRootClip(pScreen, FALSE);
         }
         // display just woke up
@@ -219,16 +311,19 @@ static void *XFIOKitPMThread(void *arg)
     return NULL;
 }
 
+
 /*
  * SetupFBandHID
  *  Setup an IOFramebuffer service and connect the HID system to it.
  */
 static Bool SetupFBandHID(
     int                    index,
-    DarwinFramebufferPtr   dfb)
+    DarwinFramebufferPtr   dfb,
+    XFIOKitScreenPtr       iokitScreen)
 {
     kern_return_t           kr;
     io_service_t            service;
+    io_connect_t            fbService;
     vm_address_t            vram;
     vm_size_t               shmemSize;
     int                     i;
@@ -237,23 +332,26 @@ static Bool SetupFBandHID(
     IODisplayModeID         displayMode, *allModes;
     IOIndex                 displayDepth;
     IOFramebufferInformation fbInfo;
+    IOPixelInformation      pixelInfo;
     StdFBShmem_t            *cshmem;
 
     // find and open the IOFrameBuffer service
-    service = IOIteratorNext(iter);
+    service = IOIteratorNext(fbIter);
     if (service == 0)
         return FALSE;
 
     kr = IOServiceOpen( service, mach_task_self(),
-                        kIOFBServerConnectType, &dfb->fbService );
+                        kIOFBServerConnectType, &iokitScreen->fbService );
     IOObjectRelease( service );
     if (kr != KERN_SUCCESS) {
         ErrorF("Failed to connect as window server to screen %i.\n", index);
         return FALSE;
     }
+    fbService = iokitScreen->fbService;
 
     // create the slice of shared memory containing cursor state data
-    kr = IOFBCreateSharedCursor( dfb->fbService, kIOFBCurrentShmemVersion,
+    kr = IOFBCreateSharedCursor( fbService,
+                                 kIOFBCurrentShmemVersion,
                                  32, 32 );
     if (kr != KERN_SUCCESS)
         return FALSE;
@@ -261,7 +359,7 @@ static Bool SetupFBandHID(
     // Register for power management events for the framebuffer's device
     kr = IOCreateReceivePort(kOSNotificationMessageID, &pmNotificationPort);
     kern_assert(kr);
-    kr = IOConnectSetNotificationPort( dfb->fbService, 0,
+    kr = IOConnectSetNotificationPort( fbService, 0,
                                        pmNotificationPort, 0 );
     if (kr != KERN_SUCCESS) {
         ErrorF("Power management registration failed.\n");
@@ -269,7 +367,8 @@ static Bool SetupFBandHID(
 
     // SET THE SCREEN PARAMETERS
     // get the current screen resolution, refresh rate and depth
-    kr = IOFBGetCurrentDisplayModeAndDepth( dfb->fbService, &displayMode,
+    kr = IOFBGetCurrentDisplayModeAndDepth( fbService,
+                                            &displayMode,
                                             &displayDepth );
     if (kr != KERN_SUCCESS)
         return FALSE;
@@ -277,7 +376,8 @@ static Bool SetupFBandHID(
     // use the current screen resolution if the user
     // only wants to change the refresh rate
     if (darwinDesiredRefresh != -1 && darwinDesiredWidth == 0) {
-        kr = IOFBGetDisplayModeInformation( dfb->fbService, displayMode,
+        kr = IOFBGetDisplayModeInformation( fbService,
+                                            displayMode,
                                             &modeInfo );
         if (kr != KERN_SUCCESS)
             return FALSE;
@@ -291,7 +391,8 @@ static Bool SetupFBandHID(
 
         // change the pixel depth if desired
         if (darwinDesiredDepth != -1) {
-            kr = IOFBGetDisplayModeInformation( dfb->fbService, displayMode,
+            kr = IOFBGetDisplayModeInformation( fbService,
+                                                displayMode,
                                                 &modeInfo );
             if (kr != KERN_SUCCESS)
                 return FALSE;
@@ -302,7 +403,7 @@ static Bool SetupFBandHID(
             }
 
             displayDepth = darwinDesiredDepth;
-            kr = IOFBSetDisplayModeAndDepth( dfb->fbService, displayMode,
+            kr = IOFBSetDisplayModeAndDepth( fbService, displayMode,
                                              displayDepth );
             if (kr != KERN_SUCCESS)
                 return FALSE;
@@ -312,17 +413,17 @@ static Bool SetupFBandHID(
     } else {
 
         // get an array of all supported display modes
-        kr = IOFBGetDisplayModeCount( dfb->fbService, &numModes );
+        kr = IOFBGetDisplayModeCount( fbService, &numModes );
         if (kr != KERN_SUCCESS)
             return FALSE;
         assert(allModes = (IODisplayModeID *)
                 xalloc( numModes * sizeof(IODisplayModeID) ));
-        kr = IOFBGetDisplayModes( dfb->fbService, numModes, allModes );
+        kr = IOFBGetDisplayModes( fbService, numModes, allModes );
         if (kr != KERN_SUCCESS)
             return FALSE;
 
         for (i = 0; i < numModes; i++) {
-            kr = IOFBGetDisplayModeInformation( dfb->fbService, allModes[i],
+            kr = IOFBGetDisplayModeInformation( fbService, allModes[i],
                                                 &modeInfo );
             if (kr != KERN_SUCCESS)
                 return FALSE;
@@ -343,7 +444,7 @@ static Bool SetupFBandHID(
                     (darwinDesiredRefresh << 16) == modeInfo.refreshRate)) {
                     displayMode = allModes[i];
                     displayDepth = darwinDesiredDepth;
-                    kr = IOFBSetDisplayModeAndDepth(dfb->fbService,
+                    kr = IOFBSetDisplayModeAndDepth(fbService,
                                                     displayMode,
                                                     displayDepth);
                     if (kr != KERN_SUCCESS)
@@ -361,24 +462,24 @@ static Bool SetupFBandHID(
         }
     }
 
-    kr = IOFBGetPixelInformation( dfb->fbService, displayMode, displayDepth,
-                                  kIOFBSystemAperture, &dfb->pixelInfo );
+    kr = IOFBGetPixelInformation( fbService, displayMode, displayDepth,
+                                  kIOFBSystemAperture, &pixelInfo );
     if (kr != KERN_SUCCESS)
         return FALSE;
 
 #ifdef __i386__
     /* x86 in 8bit mode currently needs fixed color map... */
-    if( dfb->pixelInfo.bitsPerComponent == 8 ) {
-        dfb->pixelInfo.pixelType = kIOFixedCLUTPixels;
+    if( pixelInfo.bitsPerComponent == 8 ) {
+        pixelInfo.pixelType = kIOFixedCLUTPixels;
     }
 #endif
 
 #ifdef OLD_POWERBOOK_G3
-    if (dfb->pixelInfo.pixelType == kIOCLUTPixels)
-        dfb->pixelInfo.pixelType = kIOFixedCLUTPixels;
+    if (pixelInfo.pixelType == kIOCLUTPixels)
+        pixelInfo.pixelType = kIOFixedCLUTPixels;
 #endif
 
-    kr = IOFBGetFramebufferInformationForAperture( dfb->fbService,
+    kr = IOFBGetFramebufferInformationForAperture( fbService,
                                                    kIOFBSystemAperture,
                                                    &fbInfo );
     if (kr != KERN_SUCCESS)
@@ -394,14 +495,14 @@ static Bool SetupFBandHID(
         return FALSE;
     }
 
-    kr = IOConnectMapMemory( dfb->fbService, kIOFBCursorMemory,
+    kr = IOConnectMapMemory( fbService, kIOFBCursorMemory,
                              mach_task_self(), (vm_address_t *) &cshmem,
                              &shmemSize, kIOMapAnywhere );
     if (kr != KERN_SUCCESS)
         return FALSE;
-    dfb->cursorShmem = cshmem;
+    iokitScreen->cursorShmem = cshmem;
 
-    kr = IOConnectMapMemory( dfb->fbService, kIOFBSystemAperture,
+    kr = IOConnectMapMemory( fbService, kIOFBSystemAperture,
                              mach_task_self(), &vram, &shmemSize,
                              kIOMapAnywhere );
     if (kr != KERN_SUCCESS)
@@ -414,21 +515,32 @@ static Bool SetupFBandHID(
     dfb->height = fbInfo.activeHeight;
     dfb->pitch = fbInfo.bytesPerRow;
     dfb->bitsPerPixel = fbInfo.bitsPerPixel;
-    dfb->colorBitsPerPixel = dfb->pixelInfo.componentCount *
-                            dfb->pixelInfo.bitsPerComponent;
+    dfb->colorBitsPerPixel = pixelInfo.componentCount *
+                             pixelInfo.bitsPerComponent;
+    dfb->bitsPerComponent = pixelInfo.bitsPerComponent;
+
+    // Note: Darwin kIORGBDirectPixels = X TrueColor, not DirectColor
+    if (pixelInfo.pixelType == kIORGBDirectPixels) {
+        dfb->colorType = TrueColor;
+    } else if (pixelInfo.pixelType == kIOCLUTPixels) {
+        dfb->colorType = PseudoColor;
+    } else if (pixelInfo.pixelType == kIOFixedCLUTPixels) {
+        dfb->colorType = StaticColor;
+    }
 
     // Inform the HID system that the framebuffer is also connected to it.
-    kr = IOConnectAddClient( hid.connect, dfb->fbService );
+    kr = IOConnectAddClient( xfIOKitInputConnect, fbService );
     kern_assert( kr );
 
     // We have to have added at least one screen
     // before we can enable the cursor.
-    kr = IOHIDSetCursorEnable(hid.connect, TRUE);
+    kr = IOHIDSetCursorEnable(xfIOKitInputConnect, TRUE);
     kern_assert( kr );
 
     return TRUE;
 }
 
+
 /*
  * XFIOKitAddScreen
  *  IOKit specific initialization for each screen.
@@ -438,12 +550,17 @@ Bool XFIOKitAddScreen(
     ScreenPtr pScreen)
 {
     DarwinFramebufferPtr dfb = SCREEN_PRIV(pScreen);
+    XFIOKitScreenPtr iokitScreen;
+
+    // allocate space for private per screen storage
+    iokitScreen = xalloc(sizeof(XFIOKitScreenRec));
+    XFIOKIT_SCREEN_PRIV(pScreen) = iokitScreen;
 
     // setup hardware framebuffer
-    dfb->fbService = 0;
-    if (! SetupFBandHID(index, dfb)) {
-        if (dfb->fbService) {
-            IOServiceClose(dfb->fbService);
+    iokitScreen->fbService = 0;
+    if (! SetupFBandHID(index, dfb, iokitScreen)) {
+        if (iokitScreen->fbService) {
+            IOServiceClose(iokitScreen->fbService);
         }
         return FALSE;
     }
@@ -451,6 +568,7 @@ Bool XFIOKitAddScreen(
     return TRUE;
 }
 
+
 /*
  * XFIOKitSetupScreen
  *  Finalize IOKit specific initialization of each screen.
@@ -468,7 +586,7 @@ Bool XFIOKitSetupScreen(
     }
 
     // initialize colormap handling as needed
-    if (dfb->pixelInfo.pixelType == kIOCLUTPixels) {
+    if (dfb->colorType == PseudoColor) {
         pScreen->StoreColors = XFIOKitStoreColors;
     }
 
@@ -479,26 +597,35 @@ Bool XFIOKitSetupScreen(
     return TRUE;
 }
 
+
 /*
  * XFIOKitInitOutput
- *  One-time initialization of IOKit support.
+ *  One-time initialization of IOKit output support.
  */
 void XFIOKitInitOutput(
     int argc,
     char **argv)
 {
+    static unsigned long    generation = 0;
     kern_return_t           kr;
+    io_iterator_t           iter;
     io_service_t            service;
     vm_address_t            shmem;
     vm_size_t               shmemSize;
-    int                     fd[2];
 
     ErrorF("Display mode: IOKit\n");
 
+    // Allocate private storage for each screen's IOKit specific info
+    if (generation != serverGeneration) {
+        xfIOKitScreenIndex = AllocateScreenPrivateIndex();
+        generation = serverGeneration;
+    }
+
     kr = IOMasterPort(bootstrap_port, &masterPort);
     kern_assert( kr );
 
-    // find and open the HID System Service
+    // Find and open the HID System Service
+    // Do this now to be sure the Mac OS X window server is not running.
     kr = IOServiceGetMatchingServices( masterPort,
                                        IOServiceMatching( kIOHIDSystemClass ),
                                        &iter );
@@ -507,7 +634,7 @@ void XFIOKitInitOutput(
     assert( service = IOIteratorNext( iter ) );
 
     kr = IOServiceOpen( service, mach_task_self(), kIOHIDServerConnectType,
-                        &hid.connect );
+                        &xfIOKitInputConnect );
     if (kr != KERN_SUCCESS) {
         ErrorF("Failed to connect to the HID System as the window server!\n");
 #ifdef DARWIN_WITH_QUARTZ
@@ -520,13 +647,12 @@ void XFIOKitInitOutput(
     IOObjectRelease( service );
     IOObjectRelease( iter );
 
-    kr = IOHIDCreateSharedMemory( hid.connect, kIOHIDCurrentShmemVersion );
+    // Setup the event queue in memory shared by the kernel and X server
+    kr = IOHIDCreateSharedMemory( xfIOKitInputConnect,
+                                  kIOHIDCurrentShmemVersion );
     kern_assert( kr );
 
-    kr = IOHIDSetEventsEnable(hid.connect, TRUE);
-    kern_assert( kr );
-
-    kr = IOConnectMapMemory( hid.connect, kIOHIDGlobalMemory,
+    kr = IOConnectMapMemory( xfIOKitInputConnect, kIOHIDGlobalMemory,
                              mach_task_self(), &shmem, &shmemSize,
                              kIOMapAnywhere );
     kern_assert( kr );
@@ -539,7 +665,8 @@ void XFIOKitInitOutput(
 
     notificationPort = IONotificationPortGetMachPort(NotificationPortRef);
 
-    kr = IOConnectSetNotificationPort( hid.connect, kIOHIDEventNotification,
+    kr = IOConnectSetNotificationPort( xfIOKitInputConnect,
+                                       kIOHIDEventNotification,
                                        notificationPort, 0 );
     kern_assert( kr );
 
@@ -548,19 +675,37 @@ void XFIOKitInitOutput(
     // find number of framebuffers
     kr = IOServiceGetMatchingServices( masterPort,
                         IOServiceMatching( IOFRAMEBUFFER_CONFORMSTO ),
-                        &iter );
+                        &fbIter );
     kern_assert( kr );
 
     darwinScreensFound = 0;
-    while ((service = IOIteratorNext(iter))) {
+    while ((service = IOIteratorNext(fbIter))) {
         IOObjectRelease( service );
         darwinScreensFound++;
     }
-    IOIteratorReset(iter);
+    IOIteratorReset(fbIter);
+}
+
 
+/*
+ * XFIOKitInitInput
+ *  One-time initialization of IOKit input support.
+ */
+void XFIOKitInitInput(
+    int argc,
+    char **argv)
+{
+    kern_return_t           kr;
+    int                     fd[2];
+
+    kr = IOHIDSetEventsEnable(xfIOKitInputConnect, TRUE);
+    kern_assert( kr );
+
+    // Start event passing thread
     assert( pipe(fd) == 0 );
     darwinEventFD = fd[0];
     fcntl(darwinEventFD, F_SETFL, O_NONBLOCK);
-    pthread_create(&hid.thread, NULL,
+    pthread_create(&inputThread, NULL,
                    XFIOKitHIDThread, (void *) fd[1]);
+
 }
diff --git a/xc/programs/Xserver/hw/darwin/xfIOKit.h b/xc/programs/Xserver/hw/darwin/xfIOKit.h
index a3fcddcc2..4e4046a31 100644
--- a/xc/programs/Xserver/hw/darwin/xfIOKit.h
+++ b/xc/programs/Xserver/hw/darwin/xfIOKit.h
@@ -4,7 +4,7 @@
   IOKit specific functions and definitions
 */
 /*
- * Copyright (c) 2001 Torrey T. Lyons. All Rights Reserved.
+ * Copyright (c) 2001-2002 Torrey T. Lyons. All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -28,20 +28,34 @@
  * holders shall not be used in advertising or otherwise to promote the sale,
  * use or other dealings in this Software without prior written authorization.
  */
-/* $XFree86: xc/programs/Xserver/hw/darwin/xfIOKit.h,v 1.7 2002/03/28 02:21:08 torrey Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/darwin/xfIOKit.h,v 1.9 2002/12/15 06:10:15 torrey Exp $ */
 
 #ifndef _XFIOKIT_H
 #define _XFIOKIT_H
 
+#include <pthread.h>
+#include <IOKit/graphics/IOFramebufferShared.h>
 #include "X11/Xproto.h"
 #include "screenint.h"
 #include "darwin.h"
 
+typedef struct {
+    io_connect_t        fbService;
+    StdFBShmem_t        *cursorShmem;
+} XFIOKitScreenRec, *XFIOKitScreenPtr;
+
+#define XFIOKIT_SCREEN_PRIV(pScreen) \
+    ((XFIOKitScreenPtr)pScreen->devPrivates[xfIOKitScreenIndex].ptr)
+
+extern int xfIOKitScreenIndex; // index into pScreen.devPrivates
+extern io_connect_t xfIOKitInputConnect;
+
 Bool XFIOKitAddScreen(int index, ScreenPtr pScreen);
 Bool XFIOKitSetupScreen(int index, ScreenPtr pScreen);
 Bool XFIOKitInitCursor(ScreenPtr pScreen);
 void XFIOKitInitOutput(int argc, char **argv);
+void XFIOKitInitInput(int argc, char **argv);
 void XFIOKitGiveUp(void);
 void XFIOKitBell(int volume, DeviceIntPtr pDevice, pointer ctrl, int class);
 
-#endif
+#endif	/* _XFIOKIT_H */
diff --git a/xc/programs/Xserver/hw/darwin/xfIOKitCursor.c b/xc/programs/Xserver/hw/darwin/xfIOKitCursor.c
index 5b162ca75..69eb41d2f 100644
--- a/xc/programs/Xserver/hw/darwin/xfIOKitCursor.c
+++ b/xc/programs/Xserver/hw/darwin/xfIOKitCursor.c
@@ -33,7 +33,7 @@
  *
  **************************************************************/
 /*
- * Copyright (c) 2001 Torrey T. Lyons. All Rights Reserved.
+ * Copyright (c) 2001-2002 Torrey T. Lyons. All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -57,16 +57,17 @@
  * holders shall not be used in advertising or otherwise to promote the sale,
  * use or other dealings in this Software without prior written authorization.
  */
-/* $XFree86: xc/programs/Xserver/hw/darwin/xfIOKitCursor.c,v 1.5 2002/10/12 00:32:44 torrey Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/darwin/xfIOKitCursor.c,v 1.6 2002/12/10 00:00:39 torrey Exp $ */
 
 #include "scrnintstr.h"
 #include "cursorstr.h"
+#include "mipointrst.h"
 #include "micmap.h"
 #define NO_CFPLUGIN
 #include <IOKit/graphics/IOGraphicsLib.h>
 #include <IOKit/hidsystem/IOHIDLib.h>
 #include "darwin.h"
-#include "mipointrst.h"
+#include "xfIOKit.h"
 
 #define DUMP_DARWIN_CURSOR FALSE
 
@@ -442,7 +443,8 @@ XFIOKitSetCursor(
 {
     kern_return_t               kr;
     DarwinFramebufferPtr        dfb = SCREEN_PRIV(pScreen);
-    StdFBShmem_t                *cshmem = dfb->cursorShmem;
+    XFIOKitScreenPtr            iokitScreen = XFIOKIT_SCREEN_PRIV(pScreen);
+    StdFBShmem_t                *cshmem = iokitScreen->cursorShmem;
     XFIOKitCursorScreenPtr      ScreenPriv = CURSOR_PRIV(pScreen);
 
     // are we supposed to remove the cursor?
@@ -453,7 +455,7 @@ XFIOKitSetCursor(
             if (!cshmem->cursorShow) {
                 cshmem->cursorShow++;
                 if (cshmem->hardwareCursorActive) {
-                    kr = IOFBSetCursorVisible(dfb->fbService, FALSE);
+                    kr = IOFBSetCursorVisible(iokitScreen->fbService, FALSE);
                     kern_assert( kr );
                 }
             }
@@ -501,7 +503,7 @@ XFIOKitSetCursor(
 
         // try to use a hardware cursor
         if (ScreenPriv->canHWCursor) {
-            kr = IOFBSetNewCursor(dfb->fbService, 0, 0, 0);
+            kr = IOFBSetNewCursor(iokitScreen->fbService, 0, 0, 0);
             // FIXME: this is a fatal error without the kernel cursor
             kern_assert( kr );
 #if 0
@@ -517,7 +519,7 @@ XFIOKitSetCursor(
             cshmem->cursorShow--;
 
         if (!cshmem->cursorShow && ScreenPriv->canHWCursor) {
-            kr = IOFBSetCursorVisible(dfb->fbService, TRUE);
+            kr = IOFBSetCursorVisible(iokitScreen->fbService, TRUE);
             // FIXME: this is a fatal error without the kernel cursor
             kern_assert( kr );
 #if 0
@@ -604,7 +606,7 @@ XFIOKitWarpCursor(
 {
     kern_return_t           kr;
 
-    kr = IOHIDSetMouseLocation( hid.connect, x, y );
+    kr = IOHIDSetMouseLocation( xfIOKitInputConnect, x, y );
     if (kr != KERN_SUCCESS) {
         ErrorF("Could not set cursor position with kernel return 0x%x.\n", kr);
     }
@@ -615,7 +617,7 @@ static miPointerScreenFuncRec darwinScreenFuncsRec = {
   XFIOKitCursorOffScreen,
   XFIOKitCrossScreen,
   XFIOKitWarpCursor,
-  DarwinEQEnqueue,
+  DarwinEQPointerPost,
   DarwinEQSwitchScreen
 };
 
@@ -657,15 +659,15 @@ Bool
 XFIOKitInitCursor(
     ScreenPtr	pScreen)
 {
-    DarwinFramebufferPtr    dfb = SCREEN_PRIV(pScreen);
+    XFIOKitScreenPtr        iokitScreen = XFIOKIT_SCREEN_PRIV(pScreen);
     XFIOKitCursorScreenPtr  ScreenPriv;
     miPointerScreenPtr	    PointPriv;
     kern_return_t           kr;
 
     // start with no cursor displayed
-    if (!dfb->cursorShmem->cursorShow++) {
-        if (dfb->cursorShmem->hardwareCursorActive) {
-            kr = IOFBSetCursorVisible(dfb->fbService, FALSE);
+    if (!iokitScreen->cursorShmem->cursorShow++) {
+        if (iokitScreen->cursorShmem->hardwareCursorActive) {
+            kr = IOFBSetCursorVisible(iokitScreen->fbService, FALSE);
             kern_assert( kr );
         }
     }
@@ -688,23 +690,23 @@ XFIOKitInitCursor(
     pScreen->devPrivates[darwinCursorScreenIndex].ptr = (pointer) ScreenPriv;
 
     // check if a hardware cursor is supported
-    if (!dfb->cursorShmem->hardwareCursorCapable) {
+    if (!iokitScreen->cursorShmem->hardwareCursorCapable) {
         ScreenPriv->canHWCursor = FALSE;
         ErrorF("Hardware cursor not supported.\n");
     } else {
         // we need to make sure that the hardware cursor really works
         ScreenPriv->canHWCursor = TRUE;
-        kr = IOFBSetNewCursor(dfb->fbService, 0, 0, 0);
+        kr = IOFBSetNewCursor(iokitScreen->fbService, 0, 0, 0);
         if (kr != KERN_SUCCESS) {
             ErrorF("Could not set hardware cursor with kernel return 0x%x.\n", kr);
             ScreenPriv->canHWCursor = FALSE;
         }
-        kr = IOFBSetCursorVisible(dfb->fbService, TRUE);
+        kr = IOFBSetCursorVisible(iokitScreen->fbService, TRUE);
         if (kr != KERN_SUCCESS) {
             ErrorF("Couldn't set hardware cursor visible with kernel return 0x%x.\n", kr);
             ScreenPriv->canHWCursor = FALSE;
         }
-        IOFBSetCursorVisible(dfb->fbService, FALSE);
+        IOFBSetCursorVisible(iokitScreen->fbService, FALSE);
     }
 
     ScreenPriv->cursorMode = 0;
diff --git a/xc/programs/Xserver/hw/darwin/xfIOKitStartup.c b/xc/programs/Xserver/hw/darwin/xfIOKitStartup.c
index 08d0afa41..d5ff86bba 100644
--- a/xc/programs/Xserver/hw/darwin/xfIOKitStartup.c
+++ b/xc/programs/Xserver/hw/darwin/xfIOKitStartup.c
@@ -28,9 +28,14 @@
  * holders shall not be used in advertising or otherwise to promote the sale,
  * use or other dealings in this Software without prior written authorization.
  */
-/* $XFree86: xc/programs/Xserver/hw/darwin/xfIOKitStartup.c,v 1.9 2002/10/12 00:32:44 torrey Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/darwin/xfIOKitStartup.c,v 1.12 2003/01/15 02:34:04 torrey Exp $ */
 
 #include "quartz/quartz.h"
+#include "micmap.h"
+
+void GlxExtensionInit(void);
+void GlxWrapInitVisuals(miInitVisualsProcPtr *procPtr);
+
 
 /*
  * DarwinHandleGUI
@@ -45,6 +50,27 @@ void DarwinHandleGUI(
 }
 
 
+/*
+ * DarwinGlxExtensionInit
+ *  Initialize the GLX extension.
+ *  Mesa is linked into the IOKit mode X server so we just call directly.
+ */
+void DarwinGlxExtensionInit(void)
+{
+    GlxExtensionInit();
+}
+
+
+/*
+ * DarwinGlxWrapInitVisuals
+ */
+void DarwinGlxWrapInitVisuals(
+    miInitVisualsProcPtr *procPtr)
+{
+    GlxWrapInitVisuals(procPtr);
+}
+
+
 // The IOKit X server does not accept any Quartz command line options.
 int QuartzProcessArgument( int argc, char *argv[], int i )
 {
@@ -75,16 +101,12 @@ void QuartzInitOutput(int argc, char **argv) {
     FatalError("QuartzInitOutput called without Quartz support.\n");
 }
 
-void QuartzGiveUp(void) {
-    return;	// no message, we are quitting anyway
-}
-
-void QuartzHide(void) {
-    FatalError("QuartzHide called without Quartz support.\n");
+void QuartzInitInput(int argc, char **argv) {
+    FatalError("QuartzInitInput called without Quartz support.\n");
 }
 
-void QuartzShow(int x, int y) {
-    FatalError("QuartzShow called without Quartz support.\n");
+void QuartzGiveUp(void) {
+    return;	// no message, we are quitting anyway
 }
 
 void QuartzProcessEvent(xEvent *xe) {
diff --git a/xc/programs/Xserver/hw/kdrive/fbdev/fbdev.c b/xc/programs/Xserver/hw/kdrive/fbdev/fbdev.c
index 41413f619..36b1a52bf 100644
--- a/xc/programs/Xserver/hw/kdrive/fbdev/fbdev.c
+++ b/xc/programs/Xserver/hw/kdrive/fbdev/fbdev.c
@@ -21,7 +21,7 @@
  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  * PERFORMANCE OF THIS SOFTWARE.
  */
-/* $XFree86: xc/programs/Xserver/hw/kdrive/fbdev/fbdev.c,v 1.31 2002/10/14 18:01:40 keithp Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/kdrive/fbdev/fbdev.c,v 1.32 2002/11/05 05:28:05 keithp Exp $ */
 
 #include "fbdev.h"
 
@@ -581,10 +581,6 @@ fbdevCreateColormap (ColormapPtr pmap)
     }
 }
 
-#ifdef TOUCHSCREEN
-int TsFbdev = -1;
-#endif
-
 Bool
 fbdevInitScreen (ScreenPtr pScreen)
 {
@@ -595,7 +591,7 @@ fbdevInitScreen (ScreenPtr pScreen)
     ShadowWindowProc	window;
 
 #ifdef TOUCHSCREEN
-    TsFbdev = pScreen->myNum;
+    KdTsPhyScreen = pScreen->myNum;
 #endif
 
     pScreen->CreateColormap = fbdevCreateColormap;
diff --git a/xc/programs/Xserver/hw/kdrive/i810/i810_cursor.c b/xc/programs/Xserver/hw/kdrive/i810/i810_cursor.c
index 5480c9757..ec59251fb 100644
--- a/xc/programs/Xserver/hw/kdrive/i810/i810_cursor.c
+++ b/xc/programs/Xserver/hw/kdrive/i810/i810_cursor.c
@@ -60,13 +60,13 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 
 
-/* $XFree86: xc/programs/Xserver/hw/kdrive/i810/i810_cursor.c,v 1.2 2001/12/10 16:34:20 keithp Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/kdrive/i810/i810_cursor.c,v 1.3 2002/10/30 12:52:06 alanh Exp $ */
 
 /* i810_cursor.c: KDrive hardware cursor routines for the i810 chipset */
 
 /*
  * Authors:
- *   Keith Whitwell <keithw@precisioninsight.com>
+ *   Keith Whitwell <keith@tungstengraphics.com>
  *   Pontus Lidman <pontus.lidman@nokia.com>
  *
  */
diff --git a/xc/programs/Xserver/hw/kdrive/i810/i810_reg.h b/xc/programs/Xserver/hw/kdrive/i810/i810_reg.h
index adf84fb80..d5f675c1c 100644
--- a/xc/programs/Xserver/hw/kdrive/i810/i810_reg.h
+++ b/xc/programs/Xserver/hw/kdrive/i810/i810_reg.h
@@ -57,11 +57,11 @@ TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
 SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86: xc/programs/Xserver/hw/kdrive/i810/i810_reg.h,v 1.1 2001/03/30 02:18:41 keithp Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/kdrive/i810/i810_reg.h,v 1.2 2002/10/30 12:52:06 alanh Exp $ */
 
 /*
  * Authors:
- *   Keith Whitwell <keithw@precisioninsight.com>
+ *   Keith Whitwell <keith@tungstengraphics.com>
  *   Pontus Lidman <pontus.lidman@nokia.com>
  *
  *   based on the i740 driver by
diff --git a/xc/programs/Xserver/hw/kdrive/kdrive.c b/xc/programs/Xserver/hw/kdrive/kdrive.c
index 4a4bbe43a..bbce09b3c 100644
--- a/xc/programs/Xserver/hw/kdrive/kdrive.c
+++ b/xc/programs/Xserver/hw/kdrive/kdrive.c
@@ -1,5 +1,5 @@
 /*
- * $XFree86: xc/programs/Xserver/hw/kdrive/kdrive.c,v 1.28 2002/10/08 21:28:04 keithp Exp $ 
+ * $XFree86: xc/programs/Xserver/hw/kdrive/kdrive.c,v 1.29 2002/10/31 18:29:50 keithp Exp $ 
  *
  * Copyright © 1999 Keith Packard
  *
@@ -334,7 +334,7 @@ ddxUseMsg()
 {
   ErrorF("\nTinyX Device Dependent Usage:\n");
   ErrorF("-card pcmcia	Use PCMCIA card as additional screen\n");
-  ErrorF("-screen WIDTHxHEIGHT[xDEPTH[xFREQ]][@ROTATION]	Specify screen characteristics\n");
+  ErrorF("-screen WIDTH[/WIDTHMM]xHEIGHT[/HEIGHTMM][@ROTATION][X][Y][xDEPTH/BPP{,DEPTH/BPP}[xFREQ]]	Specify screen characteristics\n");
   ErrorF("-zaphod		Disable cursor screen switching\n");
   ErrorF("-2button	Emulate 3 button mouse\n");
   ErrorF("-3button	Disable 3 button mouse emulation\n");
diff --git a/xc/programs/Xserver/hw/kdrive/kdrive.h b/xc/programs/Xserver/hw/kdrive/kdrive.h
index 6a3e1d3a0..e8b9d08f5 100644
--- a/xc/programs/Xserver/hw/kdrive/kdrive.h
+++ b/xc/programs/Xserver/hw/kdrive/kdrive.h
@@ -21,7 +21,7 @@
  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  * PERFORMANCE OF THIS SOFTWARE.
  */
-/* $XFree86: xc/programs/Xserver/hw/kdrive/kdrive.h,v 1.27 2002/10/18 06:08:10 keithp Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/kdrive/kdrive.h,v 1.29 2002/11/13 16:37:39 keithp Exp $ */
 
 #include <stdio.h>
 #include "X.h"
@@ -208,6 +208,16 @@ typedef struct _KdMouseInfo {
 
 extern KdMouseInfo	*kdMouseInfo;
 
+#ifdef TOUCHSCREEN
+/* 
+ * HACK! Send absolute events when touch screen is current,
+ * else send relative events.  Used to drive pointers on
+ * alternate screens with the touch screen
+ */
+extern int KdTsCurScreen;
+extern int KdTsPhyScreen;
+#endif
+
 KdMouseInfo *KdMouseInfoAdd (void);
 void	    KdParseMouse (char *);
 
@@ -606,6 +616,11 @@ Bool
 KdRegisterFd (int type, int fd, void (*read) (int fd, void *closure), void *closure);
 
 void
+KdRegisterFdEnableDisable (int fd, 
+			   int (*enable) (int fd, void *closure),
+			   void (*disable) (int fd, void *closure));
+
+void
 KdUnregisterFds (int type, Bool do_close);
 
 #ifdef TOUCHSCREEN
diff --git a/xc/programs/Xserver/hw/kdrive/kinput.c b/xc/programs/Xserver/hw/kdrive/kinput.c
index 72b06130a..807936c33 100644
--- a/xc/programs/Xserver/hw/kdrive/kinput.c
+++ b/xc/programs/Xserver/hw/kdrive/kinput.c
@@ -21,7 +21,7 @@
  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  * PERFORMANCE OF THIS SOFTWARE.
  */
-/* $XFree86: xc/programs/Xserver/hw/kdrive/kinput.c,v 1.26 2002/10/04 01:44:20 keithp Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/kdrive/kinput.c,v 1.30 2002/11/13 16:37:39 keithp Exp $ */
 
 #include "kdrive.h"
 #include "inputstr.h"
@@ -80,7 +80,7 @@ typedef struct _kdInputFd {
     int	    type;
     int	    fd;
     void    (*read) (int fd, void *closure);
-    void    (*enable) (int fd, void *closure);
+    int	    (*enable) (int fd, void *closure);
     void    (*disable) (int fd, void *closure);
     void    *closure;
 } KdInputFd;
@@ -215,7 +215,7 @@ KdRegisterFd (int type, int fd, void (*read) (int fd, void *closure), void *clos
 
 void
 KdRegisterFdEnableDisable (int fd, 
-			   void (*enable) (int fd, void *closure),
+			   int (*enable) (int fd, void *closure),
 			   void (*disable) (int fd, void *closure))
 {
     int	i;
@@ -274,9 +274,9 @@ KdEnableInput (void)
     kdInputEnabled = TRUE;
     for (i = 0; i < kdNumInputFds; i++)
     {
-	KdAddFd (kdInputFds[i].fd);
 	if (kdInputFds[i].enable)
-	    (*kdInputFds[i].enable) (kdInputFds[i].fd, kdInputFds[i].closure);
+	    kdInputFds[i].fd = (*kdInputFds[i].enable) (kdInputFds[i].fd, kdInputFds[i].closure);
+	KdAddFd (kdInputFds[i].fd);
     }
     
     /* reset screen saver */
@@ -325,7 +325,7 @@ KdMouseProc(DeviceIntPtr pDevice, int onoff)
 	    if (kdMouseFuncs)
 		(*kdMouseFuncs->Fini) ();
 #ifdef TOUCHSCREEN
-	    if (kdTsFuncs >= 0)
+	    if (kdTsFuncs)
 		(*kdTsFuncs->Fini) ();
 #endif
 	}
@@ -400,9 +400,12 @@ KdComputeMouseMatrix (KdMouseMatrix *m, Rotation randr, int width, int height)
 	break;
     }
     for (i = 0; i < 2; i++)
+    {
+	m->matrix[i][2] = 0;
 	for (j = 0 ; j < 2; j++)
 	    if (m->matrix[i][j] < 0)
 		m->matrix[i][2] = size[j] - 1;
+    }
 }
 
 static void
@@ -1574,7 +1577,8 @@ KdCrossScreen(ScreenPtr pScreen, Bool entering)
 
 #ifdef TOUCHSCREEN
 /* HACK! */
-extern int TsScreen;
+int KdTsCurScreen;	/* current event screen */
+int KdTsPhyScreen = -1;	/* screen associated with touch screen */
 #endif
 
 static void
@@ -1582,7 +1586,7 @@ KdWarpCursor (ScreenPtr pScreen, int x, int y)
 {
     KdBlockSigio ();
 #ifdef TOUCHSCREEN
-    TsScreen = pScreen->myNum;
+    KdTsCurScreen = pScreen->myNum;
 #endif
     miPointerWarpCursor (pScreen, x, y);
     KdUnblockSigio ();
diff --git a/xc/programs/Xserver/hw/kdrive/linux/Imakefile b/xc/programs/Xserver/hw/kdrive/linux/Imakefile
index 7b2de00d0..c7c1b8b83 100644
--- a/xc/programs/Xserver/hw/kdrive/linux/Imakefile
+++ b/xc/programs/Xserver/hw/kdrive/linux/Imakefile
@@ -1,12 +1,17 @@
 XCOMM $XConsortium: Imakefile /main/10 1996/12/02 10:20:33 lehors $
-XCOMM $XFree86: xc/programs/Xserver/hw/kdrive/linux/Imakefile,v 1.8 2001/10/12 06:33:09 keithp Exp $
+XCOMM $XFree86: xc/programs/Xserver/hw/kdrive/linux/Imakefile,v 1.9 2002/11/01 22:27:49 keithp Exp $
 KDRIVE=..
 #include "../Kdrive.tmpl"
 
 #if TouchScreen
+#if HasTsLib
+TSSRCS = tslib.c
+TSOBJS = tslib.o
+#else
 TSSRCS = ts.c
 TSOBJS = ts.o
 #endif
+#endif
 
 SRCS = keyboard.c linux.c mouse.c ps2.c bus.c ms.c agp.c $(TSSRCS)
 
diff --git a/xc/programs/Xserver/hw/kdrive/linux/agp.c b/xc/programs/Xserver/hw/kdrive/linux/agp.c
index ea34e7c40..811df3cb2 100644
--- a/xc/programs/Xserver/hw/kdrive/linux/agp.c
+++ b/xc/programs/Xserver/hw/kdrive/linux/agp.c
@@ -35,7 +35,7 @@ of the copyright holder.
 
  */
 
-/* $XFree86: xc/programs/Xserver/hw/kdrive/linux/agp.c,v 1.1 2001/03/30 02:18:41 keithp Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/kdrive/linux/agp.c,v 1.2 2002/12/12 18:29:05 eich Exp $ */
 
 /*
  * Author: Pontus Lidman <pontus.lidman@nokia.com> (adaption to KDrive) and others
@@ -120,9 +120,16 @@ GARTInit()
 	KdReleaseGART(-1);
 
 #if defined(linux)
-	/* Should this look for version >= rather than version == ? */
-	if (agpinf.version.major != AGPGART_MAJOR_VERSION &&
-	    agpinf.version.minor != AGPGART_MINOR_VERSION) {
+	/* Per Dave Jones, every effort will be made to keep the
+	 * agpgart interface backwards compatible, so allow all
+	 * future versions.
+	 */
+	if (
+#if (AGPGART_MAJOR_VERSION > 0) /* quiet compiler */
+	    agpinf.version.major < AGPGART_MAJOR_VERSION ||
+#endif
+	    (agpinf.version.major == AGPGART_MAJOR_VERSION &&
+	     agpinf.version.minor < AGPGART_MINOR_VERSION)) {
             fprintf(stderr, 
                     "Kernel agpgart driver version is not current" 
                     " (%d.%d vs %d.%d)\n", 
diff --git a/xc/programs/Xserver/hw/kdrive/linux/ts.c b/xc/programs/Xserver/hw/kdrive/linux/ts.c
index 1b770a364..384c5ae64 100644
--- a/xc/programs/Xserver/hw/kdrive/linux/ts.c
+++ b/xc/programs/Xserver/hw/kdrive/linux/ts.c
@@ -1,5 +1,5 @@
 /*
- * $XFree86: xc/programs/Xserver/hw/kdrive/linux/ts.c,v 1.9 2002/08/15 18:07:48 keithp Exp $
+ * $XFree86: xc/programs/Xserver/hw/kdrive/linux/ts.c,v 1.10 2002/11/12 22:20:42 keithp Exp $
  *
  * Derived from ps2.c by Jim Gettys
  *
@@ -46,8 +46,6 @@ typedef struct {
 #endif
 
 static long lastx = 0, lasty = 0;
-int TsScreen;
-extern int TsFbdev;
 
 int
 TsReadBytes (int fd, char *buf, int len, int min)
@@ -103,7 +101,7 @@ TsRead (int tsPort, void *closure)
 	     * touch screen, if it is we send absolute coordinates. If not,
 	     * then we send delta's so that we can track the entire vga screen.
 	     */
-	    if (TsScreen == TsFbdev) {
+	    if (KdTsCurScreen == KdTsPhyScreen) {
 	    	flags = KD_BUTTON_1;
 	    	x = event.x;
 	    	y = event.y;
diff --git a/xc/programs/Xserver/hw/kdrive/linux/tslib.c b/xc/programs/Xserver/hw/kdrive/linux/tslib.c
new file mode 100644
index 000000000..f3992affa
--- /dev/null
+++ b/xc/programs/Xserver/hw/kdrive/linux/tslib.c
@@ -0,0 +1,185 @@
+/*
+ * $XFree86: xc/programs/Xserver/hw/kdrive/linux/tslib.c,v 1.2 2002/11/05 05:28:06 keithp Exp $
+ * TSLIB based touchscreen driver for TinyX
+ * Derived from ts.c by Keith Packard
+ * Derived from ps2.c by Jim Gettys
+ *
+ * Copyright © 1999 Keith Packard
+ * Copyright © 2000 Compaq Computer Corporation
+ * Copyright © 2002 MontaVista Software Inc.
+ * 
+ * Permission to use, copy, modify, distribute, and sell this software and its
+ * documentation for any purpose is hereby granted without fee, provided that
+ * the above copyright notice appear in all copies and that both that
+ * copyright notice and this permission notice appear in supporting
+ * documentation, and that the name of Keith Packard or Compaq not be used in
+ * advertising or publicity pertaining to distribution of the software without
+ * specific, written prior permission.  Keith Packard and Compaq makes no
+ * representations about the suitability of this software for any purpose.  It
+ * is provided "as is" without express or implied warranty.
+ *
+ * KEITH PACKARD AND COMPAQ DISCLAIM ALL WARRANTIES WITH REGARD TO THIS 
+ * SOFTWARE, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, 
+ * IN NO EVENT SHALL KEITH PACKARD BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+ * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
+ * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ * 
+ * Permission to use, copy, modify, distribute, and sell this software and its
+ * documentation for any purpose is hereby granted without fee, provided that
+ * the above copyright notice appear in all copies and that both that
+ * copyright notice and this permission notice appear in supporting
+ * documentation, and that the name of Michael Taht or MontaVista not be used in
+ * advertising or publicity pertaining to distribution of the software without
+ * specific, written prior permission.  Michael Taht and Montavista make no
+ * representations about the suitability of this software for any purpose.  It
+ * is provided "as is" without express or implied warranty.
+ *
+ * MICHAEL TAHT AND MONTAVISTA DISCLAIM ALL WARRANTIES WITH REGARD TO THIS 
+ * SOFTWARE, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, 
+ * IN NO EVENT SHALL EITHER BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+ * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
+ * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+
+#define NEED_EVENTS
+#include "X.h"
+#include "Xproto.h"
+#include "inputstr.h"
+#include "scrnintstr.h"
+#include "kdrive.h"
+#include "Xpoll.h"
+#include <sys/ioctl.h>
+#include <tslib.h>
+
+static long lastx = 0, lasty = 0;
+static struct tsdev *tsDev = NULL;
+
+void
+TsRead (int tsPort, void *closure)
+{
+    KdMouseInfo	    *mi = closure;
+    int		    fd = (int) mi->driver;
+    struct ts_sample event;
+    int		    n;
+    long	    pressure;
+    long	    x, y;
+    unsigned long   flags;
+    unsigned long   buttons;
+
+    n = ts_read(tsDev, &event, 1);
+    if (n == 1)  
+    {
+	if (event.pressure) 
+	{
+	    /* 
+	     * HACK ATTACK.  (static global variables used !)
+	     * Here we test for the touch screen driver actually being on the
+	     * touch screen, if it is we send absolute coordinates. If not,
+	     * then we send delta's so that we can track the entire vga screen.
+	     */
+	    if (KdTsCurScreen == KdTsPhyScreen) {
+	    	flags = KD_BUTTON_1;
+	    	x = event.x;
+	    	y = event.y;
+	    } else {
+	    	flags = /* KD_BUTTON_1 |*/ KD_MOUSE_DELTA;
+	    	if ((lastx == 0) || (lasty == 0)) {
+	    	    x = 0;
+	    	    y = 0;
+	    	} else {
+	    	    x = event.x - lastx;
+	    	    y = event.y - lasty;
+	    	}
+	    	lastx = event.x;
+	    	lasty = event.y;
+	    }
+	} else {
+	    flags = KD_MOUSE_DELTA;
+	    x = 0;
+	    y = 0;
+	    lastx = 0;
+	    lasty = 0;
+	}
+	KdEnqueueMouseEvent (mi, flags, x, y);
+    }
+}
+
+static char *TsNames[] = {
+  "/dev/ts",	
+  "/dev/touchscreen/0",
+};
+
+#define NUM_TS_NAMES	(sizeof (TsNames) / sizeof (TsNames[0]))
+
+int TsInputType;
+
+int
+TslibInit (void)
+{
+    int		i;
+    KdMouseInfo	*mi, *next;
+    int		fd= 0;
+    int		n = 0;
+
+    if (!TsInputType)
+	TsInputType = KdAllocInputType ();
+    
+    for (mi = kdMouseInfo; mi; mi = next)
+    {
+	next = mi->next;
+	if (mi->inputType)
+	    continue;
+
+	if (!mi->name)
+	{
+	    for (i = 0; i < NUM_TS_NAMES; i++)    
+	    {
+		if(!(tsDev = ts_open(TsNames[i],0))) continue;
+	        ts_config(tsDev); 
+	        fd=ts_fd(tsDev);
+		if (fd >= 0) 
+		{
+		    mi->name = KdSaveString (TsNames[i]);
+		    break;
+		}
+	    }
+	}
+
+	if (fd > 0 && tsDev != 0) 
+	  {
+	    mi->driver = (void *) fd;
+	    mi->inputType = TsInputType;
+	    	if (KdRegisterFd (TsInputType, fd, TsRead, (void *) mi))
+		    n++;
+	  } 
+	else 
+	  if (fd > 0) close(fd);
+	}
+}
+
+void
+TslibFini (void)
+{
+    KdMouseInfo	*mi;
+
+    KdUnregisterFds (TsInputType, TRUE);
+    for (mi = kdMouseInfo; mi; mi = mi->next)
+    {
+	if (mi->inputType == TsInputType)
+	{
+	    if(mi->driver) ts_close(tsDev);
+	    mi->driver = 0;
+	    mi->inputType = 0;
+	}
+    }
+}
+
+KdMouseFuncs TsFuncs = {
+    TslibInit,
+    TslibFini
+};
diff --git a/xc/programs/Xserver/hw/sun/kbd_mode.c b/xc/programs/Xserver/hw/sun/kbd_mode.c
index 5290a638b..6e81fd247 100644
--- a/xc/programs/Xserver/hw/sun/kbd_mode.c
+++ b/xc/programs/Xserver/hw/sun/kbd_mode.c
@@ -27,7 +27,7 @@ OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION  WITH
 THE USE OR PERFORMANCE OF THIS SOFTWARE.
 
 ********************************************************/
-/* $XFree86: xc/programs/Xserver/hw/sun/kbd_mode.c,v 3.10 2001/10/28 03:33:10 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/sun/kbd_mode.c,v 3.11 2002/10/23 16:23:36 tsi Exp $ */
 
 /*
 static  char sccsid[] = "@(#)kbd_mode.c 7.1 87/04/13";
@@ -62,6 +62,7 @@ static  char sccsid[] = "@(#)kbd_mode.c 7.1 87/04/13";
 #endif
 #endif
 #include <stdio.h>
+#include <stdlib.h>
 #include <unistd.h>
 
 static void         die(), usage();
diff --git a/xc/programs/Xserver/hw/sun/sunFbs.c b/xc/programs/Xserver/hw/sun/sunFbs.c
index 3916b5a8f..026a5c95d 100644
--- a/xc/programs/Xserver/hw/sun/sunFbs.c
+++ b/xc/programs/Xserver/hw/sun/sunFbs.c
@@ -67,7 +67,7 @@ THE USE OR PERFORMANCE OF THIS SOFTWARE.
  * express or implied warranty.
  */
 
-/* $XFree86: xc/programs/Xserver/hw/sun/sunFbs.c,v 1.6 2002/03/17 19:01:47 herrb Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/sun/sunFbs.c,v 1.7 2002/12/06 00:28:50 tsi Exp $ */
 
 /****************************************************************/
 /* Modified from  sunCG4C.c for X11R3 by Tom Jarmolowski	*/
@@ -112,7 +112,7 @@ pointer sunMemoryMap (len, off, fd)
     }
 #endif
 
-#if !defined(__NetBSD__) && !defined(__NetBSD__)
+#if !defined(__NetBSD__) && !defined(__OpenBSD__)
     /* 
      * try and make it private first, that way once we get it, an
      * interloper, e.g. another server, can't get this frame buffer,
diff --git a/xc/programs/Xserver/hw/sun/sunInit.c b/xc/programs/Xserver/hw/sun/sunInit.c
index 1fffbc815..e8d42467d 100644
--- a/xc/programs/Xserver/hw/sun/sunInit.c
+++ b/xc/programs/Xserver/hw/sun/sunInit.c
@@ -15,7 +15,7 @@
  *
  *
  */
-/* $XFree86: xc/programs/Xserver/hw/sun/sunInit.c,v 3.11 2001/08/17 22:08:11 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/sun/sunInit.c,v 3.12 2002/12/06 02:11:44 tsi Exp $ */
 
 /************************************************************
 Copyright 1987 by Sun Microsystems, Inc. Mountain View, CA.
@@ -342,17 +342,22 @@ static int OpenFrameBuffer(device, screen)
 		Error("unable to get frame buffer attributes");
 		(void) close(sunFbs[screen].fd);
 		sunFbs[screen].fd = -1;
-		ret = FALSE; 
+		return FALSE; 
 	    }
 	}
 	if (ret) {
 	    devFbUsed = TRUE;
-	    if (fbattr)
+	    if (fbattr) {
+		if (fbattr->fbtype.fb_type >= XFBTYPE_LASTPLUSONE) {
+		    ErrorF ("%s is an unknown framebuffer type\n", device);
+		    (void) close(sunFbs[screen].fd);
+		    sunFbs[screen].fd = -1;
+		    return FALSE;
+		}
 		sunFbs[screen].info = fbattr->fbtype;
+	    }
 	    sunFbs[screen].fbPriv = (pointer) fbattr;
-	    if (fbattr && 
-		fbattr->fbtype.fb_type < XFBTYPE_LASTPLUSONE && 
-		!sunFbData[fbattr->fbtype.fb_type].init) {
+	    if (fbattr && !sunFbData[fbattr->fbtype.fb_type].init) {
 		int _i;
 		ret = FALSE;
 		for (_i = 0; _i < FB_ATTR_NEMUTYPES; _i++) {
diff --git a/xc/programs/Xserver/hw/vfb/InitOutput.c b/xc/programs/Xserver/hw/vfb/InitOutput.c
index 7d2b6a879..378728c0c 100644
--- a/xc/programs/Xserver/hw/vfb/InitOutput.c
+++ b/xc/programs/Xserver/hw/vfb/InitOutput.c
@@ -26,7 +26,7 @@ other dealings in this Software without prior written authorization
 from The Open Group.
 
 */
-/* $XFree86: xc/programs/Xserver/hw/vfb/InitOutput.c,v 3.20 2001/12/14 19:59:45 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/vfb/InitOutput.c,v 3.22 2003/01/15 02:34:07 torrey Exp $ */
 
 #if defined(WIN32)
 #include <X11/Xwinsock.h>
@@ -113,6 +113,7 @@ typedef enum { NORMAL_MEMORY_FB, SHARED_MEMORY_FB, MMAPPED_FILE_FB } fbMemType;
 static fbMemType fbmemtype = NORMAL_MEMORY_FB;
 static char needswap = 0;
 static int lastScreen = -1;
+static Bool Render = TRUE;
 
 #define swapcopy16(_dst, _src) \
     if (needswap) { CARD16 _s = _src; cpswaps(_s, _dst); } \
@@ -223,6 +224,22 @@ void
 DarwinHandleGUI(int argc, char *argv[])
 {
 }
+
+void GlxExtensionInit();
+void GlxWrapInitVisuals(void *procPtr);
+
+void
+DarwinGlxExtensionInit()
+{
+    GlxExtensionInit();
+}
+
+void
+DarwinGlxWrapInitVisuals(
+    void *procPtr)
+{
+    GlxWrapInitVisuals(procPtr);
+}
 #endif
 
 void
@@ -240,6 +257,10 @@ ddxUseMsg()
 {
     ErrorF("-screen scrn WxHxD     set screen's width, height, depth\n");
     ErrorF("-pixdepths list-of-int support given pixmap depths\n");
+#ifdef RENDER
+    ErrorF("+/-render		   turn on/of RENDER extension support"
+	   "(default on)\n");
+#endif
     ErrorF("-linebias n            adjust thin line pixelization\n");
     ErrorF("-blackpixel n          pixel value for black\n");
     ErrorF("-whitepixel n          pixel value for white\n");
@@ -311,6 +332,18 @@ ddxProcessArgument (argc, argv, i)
 	return ret;
     }
 
+    if (strcmp (argv[i], "+render") == 0)	/* +render */
+    {
+	Render = TRUE;
+	return 1;
+    }
+
+    if (strcmp (argv[i], "-render") == 0)	/* -render */
+    {
+	Render = FALSE;
+	return 1;
+    }
+
     if (strcmp (argv[i], "-blackpixel") == 0)	/* -blackpixel n */
     {
 	Pixel pix;
@@ -910,7 +943,7 @@ vfbScreenInit(index, pScreen, argc, argv)
 	ret = fbScreenInit(pScreen, pbits, pvfb->width, pvfb->height,
 			      dpix, dpiy, pvfb->paddedWidth,pvfb->bitsPerPixel);
 #ifdef RENDER
-	if (ret) 
+	if (ret && Render) 
 	    fbPictureInit (pScreen, 0, 0);
 #endif
 	break;
@@ -977,6 +1010,10 @@ InitOutput(screenInfo, argc, argv)
 	vfbPixmapDepths[vfbScreens[i].depth] = TRUE;
     }
 
+    /* for RENDER we need 32bpp */
+    if (Render)
+	vfbPixmapDepths[32] = TRUE;
+
     for (i = 1; i <= 32; i++)
     {
 	if (vfbPixmapDepths[i])
diff --git a/xc/programs/Xserver/hw/xfree86/CHANGELOG b/xc/programs/Xserver/hw/xfree86/CHANGELOG
index 2747f30e2..f8ad53351 100644
--- a/xc/programs/Xserver/hw/xfree86/CHANGELOG
+++ b/xc/programs/Xserver/hw/xfree86/CHANGELOG
@@ -1,3 +1,1117 @@
+XFree86 4.3.0 (27 February 2003)
+ 964. Add an imake option to allow the glibc21-style setjmp() behaviour
+      to be forced when auto-detecting it fails (this is needed for RH 7.0).
+ 963. Add missing raise/lower volume key descriptions for the "hpxe3gc"
+      XKB map (#A.1651, Paul Pacheco).
+ 962. Fix some typos in the Syriac XKB map (#5654, Emil Soleyman-Zomalan).
+ 961. Add documentation about using XKB for the XFree86 server's special
+      key sequences and the HandleSpecialKeys config option (#5653, Joe Moss).
+ 960. Move the XF86_DATE definition to a separate file so that bumping it
+      doesn't trigger almost everything to be rebuilt (David Dawes).
+ 959. Xterm patch #174 (Thomas Dickey).
+ 958. Fix a bug that was preventing DGA2 acceleration from being advertised
+      by the i810 driver (David Dawes).
+ 957. Fix an "xtt" font backend module crash that shows up on Linux/PPC,
+      related to an invalid code converter module being loaded because of
+      a broken string comparison in xttconv.c (#A.1647, Chisato Yamauchi,
+      Daisuke MASATSUNA).
+ 956. Fix a NULL dereference that can happen in lcGenConv.c (#A.1646,
+      Anthony Fok Tung-Ling).
+ 955. Bump the libXft minor revision for the UTF-16 APIs that were added
+      after rev 2.0 (#A.1643, A.1644, Keith Packard, 5652, Mike Harris).
+ 954. Fix a typo in the "freetype" font backend that prevents "ttc" fonts
+      from working (#5651, Mike Fabian).
+ 953. Fix atimisc bug in restoring colourmaps after a VT switch
+      (Marc La France).
+ 952. A more complete set of dead accent/space compose sequences, add
+      <Multi_key> <slash> for letters with a "stroke", and add some
+      combos for exponent characters, katakana voiced sounds, etc to
+      the en_US.UTF-8 compose file (#5646, David Monniaux).
+ 951. Reinstate the VBEInit() call in the savage driver's PreInit().  This
+      appears to fix a problem on some Savage MX platforms (#5649,
+      Mike Harris).
+ 950. Restore the radeon driver's unconditional RADEONPreInt10Save() call
+      on Alpha platforms because this is needed for Radeon cards where the
+      BIOS ROM can't be read after it's been run once (by the firmware)
+      without this (#5648, Jeff Wiedemeier).
+ 949. Update Newport driver doc (#5647, Guido Guenther).
+ 948. Fix reversed logic for VGA locking/unlocking (Nat Ersoz).
+ 947. Luit fixes:
+       - Fix a bug with --encoding being too strict with the syntax.
+       - Add a -x flag that causes luit to exit as soon as the child does.
+       - Update the man page to synchronise with Tomohiro's work on XTerm.
+      (#5643, Juliusz Chroboczek).
+ 946. Fix some endianness bugs in the r200 DRI driver, and guard a debugging
+      print message (Michel Dänzer).
+ 945. Fix radeon HW cursor artifacts when switching between 2-color and
+      ARGB cursors by always using the ARGB mode (#A.1639, Michel Dänzer and
+      Fredrik Höglund).
+ 944. Fix rootless XDarwin crash when trying to GetImage with a rectangle
+      bigger then the associated top level window (Apple).
+ 943. Add support for multi-head on ZX1-based Itanium2 systems  (Marc La France
+      with documentation and assistance from Hewlett-Packard).
+ 942. Correctly initialize the RE_LINE_PATTERN register in the radeon
+      and r200 DRI drivers (Keith Whitwell).
+ 941. Fix a problem where a malformed Ximage can cause Xcursor to step
+      outside the image data (#A.1636, Keith Packard, reported by
+      Michel Dänzer).
+ 940. Allow xf86setjmp/xf86setlongjmp to work with platforms where
+      setjmp() isn't directly available as a function, specifically Linux
+      platforms that use glibc 2.0 and 2.1. (David Dawes, Keith Packard).
+ 939. Check pScrn->vtSema before calling xf86SetCursor() from
+      xf86CursorCloseScreen().  This avoids a segfault at exit with some
+      drivers (Alan Hourihane).
+ 938. Fix adding FP native mode for Radeon (Hui Yu@ATI, Kevin Martin).
+ 937. Initialize I2C when primary head has an invalid DDC type for the
+      Radeon driver (Hui Yu@ATI).
+ 936. Video fixes for TV and TVOverscan for the nsc driver (Sarma Kolluru).
+ 935. Fix to prevent ShadowComposite() to try to update the framebuffer
+      when server is switched away (Egbert Eich).
+ 934. Fix problems where the ThirdLevel key and Alt modifiers don't work
+      when a map that uses the ThirdLevel virtual modifier is not the first
+      layout in a multi-layout configuration (#5642, Ivan Pascal).
+ 933. Use safe values in the Thai XIM which should work regardless of
+      the signedness of XIMStringConversionPosition (#A.1628,
+      Theppitak Karoonboonyanan).
+ 932. Replace xf86setjmp/xf86setlongjmp with symbol aliases that resolve
+      directly to the native libc versions so that they can operate in
+      modules, and make xf86jmp_buf much larger so that should be big enough
+      for any reasonable CPU/OS combination.  This should fix problems
+      with the Freetype2-based freetype font module (#A.1625, Keith Packard).
+ 931. Change the default base symbols map from pc104 to pc105, which should
+      fix most cases where the <LSGT> key isn't defined.  Also change the
+      default XkbModel from pc101 to pc105 (Ivan Pascal).
+ 930. Fix run-time enabling/disabling of VT switching via xf86EnableVTSwitch()
+      (David Dawes).
+ 929. Add a "DontVTSwitch" option to allow VT switching to be disabled
+      (on platforms where the X server initiates VT switches) (#5640,
+      Branden Robinson).
+ 928. Fix a memory leak in _XimExtension() (#5638, MINAMI Hirokazu).
+ 927. Fix hard-coded ProjectRoot paths in the proxymngr man page (#5634,
+      Branden Robinson).
+ 926. Fix a NULL pointer dereference in the fontenc library (#5633, Debian).
+ 925. Update the neomagic man page to document the OverlayMem option (#5632,
+      Diego Santa Cruz and Branden Robinson).
+ 924. Fix a memory leak in XCloseDisplay, and a potential race condition
+      when multiple threads attempt to initialize the Xcursor library
+      simultaneously (#A.1623, Keith Packard).
+ 923. Fix xvidtune to pop up a info window if mode on chipset is
+      not tuneable (Egbert Eich).
+ 922. Fix a NULL pointer in a var_arg list in xfd which causes problems
+      on 64 bit systems (Egbert Eich).
+ 921. Fix a typo in the nsc Imakefile when installing the linkkit 
+      (#A.1624, Stanislav Brabec).
+ 920. Remove a dependency on how Xlib buffers requests internally for
+      xtest's test 2 of XSync (Keith Packard).
+ 919. Fix a bug in the way the bitmap font code calculates mix/max bounds
+      (it was ignoring empty characters), which fixes some xtest fonts
+      bounds check failures (Keith Packard).
+ 918. Check that the HW cursor has been setup before calling
+      xf86ForceHWCursor() in the radeon (and r128) driver.  This fixes
+      crashes when using only the SW cursor (#5628, Michel Dänzer).
+ 917. Fix duplicate arguments for xf86MatchPciInstances() in the DESIGN doc
+      (#5627, Guido Guenther).
+ 916. Miscellaneous 64-bit and warning fixes to mfb, xf1bpp and xf4bpp
+      (Marc La France).
+ 915. Fix a bug in beforelight that was preventing it from being restarted 
+      and could cause random X clients to be killed. (Matthieu Herrb)
+ 914. Add a means by which a motherboard chipset driver can prevent the common
+      layer's check for mis-configured PCI-to-PCI bridges (Marc La France).
+ 913. Fix bug that would sometimes cause an extra hardware cursor to re-appear
+      on a secondary head after a server reset (Marc La France).
+ 912. Protect "cvl" references in recent changes to _XEventsQueued() with
+      '#ifdef XTHREADS' (reported by Dan Holm).
+
+XFree86 4.2.99.902 (17 February 2003)
+ 911. Change the newport driver to use ShadowFBInit2 to fix the broken
+      "switching back from the console" issue, and update the driver's man
+      page (#5625, Guido Guenther).
+ 910. SCO doc update (#5624, J. Kean Johnston).
+ 909. Fix X11.tmpl so that Fontconfig works correctly if an OS.cf file
+      sets HasFontconfig, and do this in sco5.cf (#5624, J. Kean Johnston).
+ 908. Move the vbe module from xfree86/os-support/ to xfree86/ (David Dawes).
+ 907. Some changes to the os-support kbd driver layer's calling conventions
+      to provide more flexibility (#A.1615, Zephaniah E. Hull).
+ 906. Fix a crash in the "xtt" font module caused by a NULL dereference
+      when the font cache becomes full (#A.1611, Chisato Yamauchi and
+      tokeijikakenoringo).
+ 905. Update the list of DRI-supported Radeon hardware (#A.1610,
+      Knut J Bjuland).
+ 904. Fix a problem in _XEventsQueued() that causes an event reader lock
+      of another thread to be released.  This can cause a hang and keyboard
+      lockup in KDE (#5619, Ewald Snel).
+ 903. Fix some bugs with Xft drawing to non-Render enabled servers:
+       - Drawing monochrome glyphs had an infinite loop.
+       - XftGlyphSpecCore failed to render some glyphs, leading to application
+         crashes from uninitialized values.
+       (#A.1608, Keith Packard, reported by Nalin Dahyabhai).
+ 902. Fix the <BKSL> key in the "winkeys" variants of the Russian and
+      Ukrainian XKB maps (#5624, Leon Kanter).
+ 901. Install the XKB README files (#5623, Ivan Pascal).
+ 900. Add the numeric keys row to the pc/us symbols map (#5622, Ivan Pascal).
+ 899. Resync with DRI mesa-4-0-4 branch:
+       - Fix DOT3 texture combine env in the r200 driver (Ian Romanick).
+       - Fix SW TCL path in the radeon driver (Felix Kühling).
+       - Don't assert for FLUSH_STORED_VERTICES if a glBegin hasn't been
+         emitted (Alan Hourihane).
+ 898. Another update to the fix for the client-side DRI cleanup code that
+      should fix references to freed data, an fix a potential memory leak
+      (Leif Delgass).
+ 897. Fix the behaviour of XLookupString() when XKB is enabled in Xlib
+      but not the server.  This fixes an xtest XRebindKeysym() failure
+      (David Dawes).
+ 896. Added radeon driver options documentation to the Options file
+      (#5621, Michel Dänzer).
+ 895. Fix the return value of SetFontPath() when a font path element is bad
+      (David Dawes).
+ 894. Add some more HP keyboard layouts (Peter Soos).
+ 893. Remove XFree86-specific keysyms that already have generic equivalents
+      (Menu, Redo, Print, Undo).
+ 892. Add keyboard layout information for the HP 5181 Internet/Multimedia
+      keyboard (#A.1603, John Mitchell).
+ 891. Fix a problem where two-color render cursors have extra pixels set
+      (#A.1607, Keith Packard).
+ 890. Fix for corruption when using video modes requiring more than 2MB on
+      S3 968 cards (#A.1602, Justin T. Gibbs).
+ 889. Fix TVoverscan problems on the NSC SC1200 chip (Sarma Kolluru).
+ 888. Cure cursor artifacts by setting HARDWARE_CURSOR_SHOW_TRANSPARENT and
+      HARDWARE_CURSOR_UPDATE_UNHIDDEN in the r128 and radeon drivers.  The
+      wait-for-VSync nonsense the Radeon's currently do can, and should, be
+      ripped out later.  (Marc La France).
+ 887. Extend HARDWARE_CURSOR_SHOW_TRANSPARENT to make hardware cursors
+      transparent, rather than disabling them, when a switch to a software
+      cursor is needed.  This removes recently introduced cursor artifacts
+      in the atimisc driver.  (Marc La France).
+ 886. Cancel repeat for switch screen XKB actions, which fixes a VT
+      switching problem that has just become visible (Ivan Pascal).
+ 885. Added reinitialization of screen layout after RandR size change
+      on a multihead setup. This keeps cursor movement beween screens
+      working (Egbert Eich).
+ 884. Remove Xcms.txt entries that have server-side equivalents.  It looks
+      like the slightly different resulting colour definitions from the
+      Xcms.txt entries were responsible for an xtest failure.
+ 883. Fix some problems with using pre-existing version of fontconfig,
+      freetype2 and expat (#A.1600, Keith Packard).
+ 882. Add missing zero-sized check to one of Xft's core rendering routines
+      (#A.1599, Keith Packard).
+ 881. Add a missing symbol reference to the radeon driver (#5618, Mike Harris).
+ 880. Fix the Xcursor include path in the man page (#5617, Kevin Brosius).
+ 879. Update ViRGE documentation (#5617, Kevin Brosius).
+ 878. Fix mkfontscale so that it doesn't include characters forbidden in XLFD
+      in the names it generates (#5616, Mike Fabian and Juliusz Chroboczek).
+ 877. Fix a rounding problem in the "freetype" module, which fixes the problem
+      worked around in entry 864 below (#5615, Juliusz Chroboczek).
+ 876. Fix incorrect alias for lv_LV.iso885913, and add some missing lv_LV
+      aliases (#5614, Aivils Stoss).
+ 875. Fix a bug where xauth may write an incomplete authority file and delete
+      the old one if there is insufficient disk space (#5612, Harald Hoyer).
+ 874. DPMSClose() wasn't correctly setting its devPrivate to NULL (based
+      on #A.1594, Denis Zaitsev).
+ 873. Fix scanpci's printing of routing information for PCI-to-PCI bridges
+      (Marc La France).
+ 872. Bring Cygwin/XFree86 up-to-date (#5613)
+       - Multiwindow Window Manager (Kensuke Matsuzaki).
+       - Clipboard integration (Harold Hunt).
+       - Remove unnecessary redefines of fchown/fchmod (Takashi Sawanaka)
+       - Fix some NULL pointer problems on screen changes (Alexander Gottwald).
+ 871. Fix some problems when noaccel is used in the nsc driver (Sarma Kolluru).
+ 870. Fix acceleration bugs in the nsc driver (Sarma Kolluru).
+ 869. Change initMouseHW() to always return TRUE, which restores the older
+      more graceful behaviour (Egbert Eich).
+ 868. Revert the DestroyContext, GarbageCollectDrawables reording in
+      dri_util.c, and instead check if the drawable is known to the DRI
+      client code before calling XF86DRIGetDrawableInfo (Egbert Eich).
+ 867. Fix some scaling problems with the updated whiteglass cursor icons,
+      fixing some incorrect hotspots (Kevin Puetz).
+ 866. The sunffb driver was treating a function with a void return value
+      as if it had a Bool return value.  This causes the driver to fail
+      in some cases (#A.1588, Ferris McCormick).
+ 865. Add private keysyms for the new XKB actions (XFree86 special keys),
+      and move those actions to an XKB compatibility map.  This fixes
+      side-effects (loss of auto-repeat and mousekeys functionality) of
+      the way this was implemented previously (#5610, Ivan Pascal).
+ 864. Fix an X server crash with the "freetype" module when displaying
+      kochi-mincho.ttf at a size of 18 pixels or higher (Chisato Yamauchi).
+ 863. Fix segfault in XkbInitKeyboardDeviceStruct() (David Dawes).
+ 862. Add a ServerFlags/ServerLayout option for disabling the RandR extension
+      (David Dawes).
+ 861. Resync with DRI mesa-4-0-4 branch:
+       - Correct RADEON_MAX_TCL_VERTSIZE and set MaxArrayLockSize
+         (Keith Whitwell).
+       - Fix EAGAIN handling in radeon_cp_dispatch_texture(), which fixes
+         corruption of large textures (Michel Dänzer).
+       - Fix bufferSize and alphaMask for DRI in several drivers (Brian Paul,
+         Leif Delgass).
+       - Avoid a loop on validating destroyed drawable (Keith Whitwell).
+       - Reorder DestroyContext, GarbageCollectDrawables to avoid error
+         (Egbert Eich).
+       - Remove untested BSD DRM vlank signal code (Eric Anholt).
+       - Update Radeon PCI IDs for BSD drm driver (Eric Anholt).
+       - Uninitialize mutexes on cleanup in the BSD drm driver, which
+         fixes panics with FreeBSD-5.0 with WITNESS (Eric Anholt).
+       - Remove the untested/unused gamma DRM driver for BSD (Eric Anholt).
+ 860. Fix byte swapping of the refresh rate argument to RandR's
+      SetScreenConfig request, and fix a 1.0 client compatibility problem
+      with SetScreenConfig (#A.1574, Keith Packard).
+ 859. The i810 driver wasn't releasing control of the agpgart when VT switching
+      away for the 830M and later (David Dawes).
+ 858. Update Rage 128 and Radeon PCI IDs (Mike Harris).
+ 857. Fix vertical retrace to not interfere with interrupt handling
+      (#5608, Michel Dänzer).
+ 856. Add M9 DRI support (Hui Yu@ATI).
+ 855. Update Radeon man page (Michel Dänzer).
+ 854. Add Radeon man page (Hui Yu@ATI).
+ 853. Use strtol instead of atoi in xf86cfg 'expert' mode. Make pauses
+      when printing keyboard models in xf86config (#5609, Chisato Yamauchi).
+ 852. Xterm patch #173 (Thomas Dickey).
+ 851. Don't use XkbGetKeyboard() in xset, just use XkbAllocKeyboard()
+      (Ivan Pascal).
+ 850. Fixes for the nsc driver for HW cursor hotspots and GX2 video
+      clipping issues (Sarma Kolluru, NSC).
+ 849. Fix HW cursor on CRTC2 for SiS650+301B (Thomas Winischhofer).
+ 848. Update the i810/i830 driver to recognise the 865G integrated graphics
+      chipset (David Dawes).
+ 847. Updates for the nsc driver (Sarma Kolluru, NSC).
+ 846. Fixed dual head for 1400x1050 displays (Thomas Winischhofer).
+ 845. Initializing clock ranges in several drivers to get rid of the
+      annoying 'scaled from 0.0 MHz' message in xf86PrintModes()
+      (Egbert Eich).
+
+XFree86 4.2.99.901 (4 February 2003)
+ 844. Fixing a double free in libXRandr (Egbert Eich).
+ 843. The microsoft-win3.1 encoding file wasn't being installed (#A.1569,
+      Mike Harris).
+ 842. Sync the FIFO in the vmware driver after defining an ARGB cursor
+      (#5607, Nolan Leake).
+ 841. Add missing Num_Lock and Scroll_Lock modifiers to the jp XKB map
+      (Chisato Yamauchi).
+ 840. Change the default cursor theme to "core".
+ 839. Fix some keys in the Slovenian (si) XKB map (David Balazic,
+      Henrik Nordström).
+ 838. Add a check to xset for a NULL return from XkbGetKeyboard()
+      (Tapani Utriainen).
+ 837. Resync with DRI mesa-4-0-4 branch:
+       - radeon DRM: only acknowledge interrupts we handle -- others could
+         be used outside the DRM (Michel Dänzer).
+       - Fix PCI and AGP posting problems (based on testing by Chris Ison
+         and suggestions by Benjamin Herrenschmidt and Arjan van de Ven).
+       - Remove radeon_flush_write_combine() which has been unused for a while
+         (Michel Dänzer).
+       - Disable strict aliasing when building the DRM (Michel Dänzer).
+ 836. Fix xfs crash on Darwin by making libXfont a flat namespace image
+      (Torrey T. Lyons).
+ 835. Avoid endless loop when initializing an PS/2 mouse behind a 
+      repeater (Egbert Eich).
+ 834. Radeon driver: make sure  RADEONCPStop() is only called when
+      RADEONCPStart() has been called before. Failing to do so may
+      make the kernel driver oops (Egbert Eich).
+ 833. Disabling MMX, 3DNow and SSE support for x86-64 as the function
+      call sequence is hardcoded to ia32 (Egbert Eich).
+ 832. Fix a hang in multi-thread mode caused by a missing UnlockDisplay() in
+      XkbGetMapChanges() (Jose Luu).
+ 831. Resync with DRI mesa-4-0-4 branch:
+       - Don't inflate relative vblank sequence numbers on repeated calls
+         (e.g., when interrupted by a signal) (Michel Dänzer).
+       - Fix size of VERTEX2 ioctl struct (Egbert Eich).
+ 830. SiS driver fixes:
+       - Mode restoration fix.
+       - Xv Hue and Saturation property fixes (310/325 series).
+       - Built-in mode fixes.
+       - Revert wrong bus width assumptions from previous patch.
+      (Thomas Winischhofer).
+ 829. R128 build fix on big endian platforms (#A.1565, George Staikos).
+ 828. Updated whiteglass cursor icons that fix the resizing glitches in the
+      existing ones (#A.1563, Kevin Puetz).
+ 827. Include server control definitions in some XKB maps that were missing
+      them (based on #A.1562, Jens Petersen).
+ 826. Define Alt/Meta modifiers for the jp106 XKB layout, and include
+      server control definitions (#A.1562, Jens Petersen).
+ 825. Add some locales required for the OpenI18N compliance test (#A.1550,
+      Leon Ho).
+ 824. s3virge driver updates:
+       - 320x240 doublescan support with mouse adjust.
+       - Power management printouts, DAC error printout fix.
+       - Log XVideo status based on chipset, and preliminary support for
+         disabling XV when a mode doesn't support it.
+      (#A.1550, Kevin Brosius).
+ 823. Add an Ethiopic TTF and OTF font (#A.1549, Daniel Yacob).
+ 822. Add a phonetic layout to the Bengali XKB map (#5606, Taneem Ahmed).
+ 821. Work around an AGP bug in the AlphaServer ES45 by padding each ring
+      buffer packet in the radeon drm with NOPs to cache line boundaries.
+      This is only done for Alpha platforms (#5605, Jeff Wiedemeier).
+ 820. Add missing domain decoding to DRM(irq_busid) for Alpha (#5604,
+      Jeff Wiedemeier).
+ 819. Build fix for the DRM on FreeBSD 5.0-current (#5603, Eric Anholt).
+ 818. xaaStateChange.c was not calling RestoreAccelState before doing
+      CPUToScreenTexture and CPUToScreenAlphaTexture, which seems to be the
+      reason why RENDER acceleration was broken on some dual-monitor MGA cards
+      (#5602, Nolan Leake).
+ 817. Make the vmware driver a little more conservative about supporting
+      HW RGBA cursors in 8-bit modes (#5606, Nolan Leake).
+ 816. Work around a problem with the vmware driver's interaction with the
+      offscreen memory manager (#5606, Nolan Leake).
+ 815. Fix fb's rotation of tiles and stipples when using non-zero PixOrigin
+      macros (Torrey T. Lyons).
+ 814. Fix Radeon native FP mode initializion (Hui Yu@ATI).
+ 813. Resync with DRI mesa-4-0-4 branch:
+       - Fix Q3A mode change prolbem in thr r200 driver (Keith Whitwell).
+       - Add a missing break to prevent spurious GL_INVALID_ENUM
+         (Leif Delgass).
+       - Fix __FUNCTION__ usage in the ffb 3D driver (Leif Delgass).
+       - Limit the number of pending vblank signals to 100 to prevent
+         a DoS (Michel Dänzer).
+       - Fix a void * arithmetic warning in the radeon DRM driver
+         (Leif Delgass).
+ 812. Fix a typo in the "pl2" XKB map (#A.1553, Piotr Xurek).
+ 811. Fix a null dereference in Mesa that can cause an X server crash at
+      client exit (#A.1548, Ezra Peisach).
+ 810. Improve the XTT code that prevents unexpected data to be passed to
+      XAA (#5600, Chisato Yamauchi).
+ 809. xkbcomp/rules/xfree86.xml wasn't being installed (#5599, Ivan Pascal).
+ 808. Add knowledge about two Korean foundries to mkfontscale (#5598,
+      Jungshik Shin).
+ 807. Disable the INREG fallbackup in the radeon 3D driver on Alpha because
+      it references a function that's not availalbe (#5596, Jeff Wiedemeier).
+ 806. Fixed patch 760: VBEInit takes entity index, not screen index 
+      (Egbert Eich).
+ 805. Card name changes/fixes (Hui Yu@ATI).
+ 804. Panel color channel depth fix for Radeons (Hui Yu@ATI).
+ 803. Include list_for_each_safe define for kernels that do not have it
+      (Kevin Martin).
+ 802. Fix 2D corruption around 3D window, when 3D window is moving and using
+      Radeon page flipping code (Michel Dänzer).
+ 801. Big endian fixes for Rage 128 and Radeon video and Radeon cursor code
+      (Michel Dänzer).
+ 800. Enable PCI GART for all architectures (still gated by ForcePCIMode, if
+      on an AGP card) (Michel Dänzer).
+ 799. Fix for Radeon's CP accelerated 2D sync routine (Michel Dänzer).
+ 798. SiS driver fixes:
+	- Fix for SiS730+LVDS machines (display modes restricted due to 
+	  hardware limits; LCD text mode restoration fixed)
+	- Fix for SiS300 bus width detection
+	- Fix for Fn+Fx output device switching on some machines (still 
+	  does not work on all)
+	- Numerous Dual Head fixes
+	- Added color hardware cursor support on 300/310/325/330 series
+	- Added PAL-M and PAL-N support for Chrontel 701x
+	- Added ModeLine handling for 300/310/325/330 series (CRT1 only)
+        (Thomas Winischhofer).
+ 797. Fix for memory fences on PowerPC (Marc La France).
+ 796. Work-around for Radeon int10 problems (Marc La France).
+ 795. Fix XDarwin crash in rootless mode with 16-bit color by ensuring that
+      window pixmap pointers are 32-bit aligned (Apple, Torrey T. Lyons).
+ 794. Update the i810 2D driver and i830 3D drivers to recognise and handle
+      the Intel 852GM/855GM integrated graphics chipsets (David Dawes,
+      Keith Whitwell).
+ 793. Force extension-generated mode switches always occur (Marc La France).
+ 792. Fix OS/2 library build problem (Frank Giessler).
+ 791. Fix bug that at times prevented recognition of resources decoded on PCI
+      root busses (Marc La France).
+ 790. Fix XDarwin's spurious transparent regions in rootless windows
+      (Torrey T. Lyons).
+ 789. Fix bug in recognition of certain ix86 Host-to-PCI bridges
+      (Marc La France).
+ 788. Fix for breakage in reading the serial PnP mouse ID string (David Dawes).
+ 787. Add "core" theme to Xcursor to force old behaviour (Keith Packard).
+ 786. Increase the default font cache size so that it works better for
+      iso10646 (#A.1541, Hidetoshi Yamanouchi, Chisato Yamauchi).
+ 785. Fix an XTT problem where garbage is displayed when there are undefined
+      glyphs for fixed width fonts, and fix some other potential problems
+      (#A.1541, Hidetoshi Yamanouchi, Chisato Yamauchi).
+ 784. Resync symbols/fi with symbols/pc/fi (#A.1532, Marko Myllynen,
+      #5589, Linus Torvalds).
+ 783. Resync xkb/rules/xfree86.xml with xfree86.lst (#5595, Ivan Pascal).
+ 782. ISO_Level3_Shift was breaking compose sequences because Xlib wasn't
+      recognising it as a modifier key (#5594, Ivan Pascal).
+ 781. Add a Lao (lo) XKB map (#5592, Anousak Souphavanh).
+ 780. Add a multi-layout version of the Malayalam keymap (#5593, Ivan Pascal).
+ 779. Add some missing entries to the xkb rules $oldlayouts and $nonlatin
+      sets (#5593, Ivan Pascal).
+ 778. Prevent mkfontscale from looking at bitmap fonts, and ensure that it
+      doesn't crash if a font happens to have no head (#5591,
+      Juliusz Chroboczek).
+ 777. Document that DVI the mga_hal module may be necessary to use the DVI
+      output with the G550 and other cards (#5590, Andrew Aitchison).
+ 776. Fixes for a few "nodeadkeys" XKB maps (David Dawes).
+ 775. Protect magic cookie from short-lived exposure on command line in 
+      startx (Christian Biere).
+ 774. Fix ELF loader to ignore -g debugging information
+      (#A.1539, Juergen Keil).
+ 773. Fix artifacts left by XDarwin when reshaping a shaped window (reported
+      by Adrian Umpleby).
+ 772. Fix XDarwin rootless crash when resizing a window (Apple).
+ 771. Fix vbe module to not assume BIOS call results are zero-extended
+      (Paulo Cesar Pereira de Andrade).
+ 770. Fix improper initialisation of pciConfigRec's.  Reported by Marcel
+      Moolenaar (Marc La France).
+ 769. Fix intermittent XDarwin crash on Mac OS X 10.1.x when changing cursors
+      on dual processor machines (Torrey T. Lyons).
+ 768. Correction to 'is' keymap (reported by Richard Allen).
+ 767. Fix GLX library mis-use of LockDisplay()/UnlockDisplay() sequences
+      (reported by Alexis Vartanian).
+
+XFree86 4.2.99.4 (20 January 2003)
+ 766. Fix XDarwin's rootless mode with 16-bit color (Apple).
+ 765. Allow UTF8 conversion to work for Japanese locales (#A.1527,
+      Etsushi Kato).
+ 764. Add a method for working around a problem that can show up when
+      running setxkbmap from a machine with a different version of XKB
+      than the X server.  The workaround method is documented in
+      the setxkbmap(1) man page (#5588, Ivan Pascal).
+ 763. Add some new keys and key combinations that can be used for switching
+      between XKB groups (#5587, Ivan Pascal).
+ 762. Fix typos in the README.fonts document (#5585, John Himpel,
+      Juliusz Chroboczek).
+ 761. Fix the pc/fi and pc/il XKB maps after recent changes made them
+      non-compliant with the multi-layout scheme (#5581, Ivan Pascal).
+ 760. Allow the mga driver to fallback to using VBE for DDC when using
+      the native method fails.  This allows DDC to work for DVI output
+      on Matrox cards (#5580, Andrew Aitchison).
+ 759. Add block handler for XDarwin's quartz modes to clean up any
+      autoreleased objects in the server thread (Torrey T. Lyons).
+ 758. Fix use of uninitliazed variable in xmag/xmag.c (A.1525, Keith Packard).
+ 757. Fix typo in Radeon Mono8x8 code (#A.1526, Juergen Keil).
+ 756. PS/2 mice initialization sequence changed: rerun entire sequence
+      when something goes wrong - this needs to be rewritten completely
+      after 4.3 is out (Egbert Eich).
+ 755. Savage driver: disable HW cursor on stretched LCD displays,
+      let SaveScreen and DGA test if HW cursor is on before 
+      disabling/reenabling it (Egbert Eich).
+ 754. Fixed VBE EDID read: due to a missing register setting read
+      ended in endless loop on certain systems (Egbert Eich).
+ 753. Changed the default mouse device for FreeBSD to sysmouse and the
+      protocol to auto when running X -configure (#5584, Eric Anholt).
+ 752. Changed the default mouse device for xf86cfg and xf86config to
+      /dev/sysmouse for FreeBSD (#5582, #5583, Eric Anholt).
+ 751. Fix for Mono8x8 patterns on Radeon (#A.1520, Juergen Keil, Kevin Martin).
+ 750. Fix for Radeon mode validation (#A.1330, #A.1380, #A.1393, #A.1522,
+      #A.1523, Wayne Whitney, Hui Yu@ATI, Juergen Keil).
+ 749. Workaround for flickering problem with switching between ARGB and mono
+      cursors on Radeons (#A.1380, Hui Yu@ATI).
+ 748. DDCMode fix for VidMode extension (#A.1380, Kevin Martin, Hui Yu@ATI).
+ 747. Panel detection bug fix for Radeon (#A.1380, Hui Yu@ATI).
+ 746. Add Xv overlay support for dual headed Radeons (#A.1380, Hui Yu@ATI).
+ 745. Fix Radeon driver's 24-bit support for flat panels (#A.1380, Hui Yu@ATI).
+ 744. Add Radeon 9500/Pro support (#A.1380, Hui Yu@ATI).
+ 743. Disable CGWorkaround for non-A11 rev R300s (Kevin Martin, Hui Yu@ATI).
+ 742. Radeon solid/dashed line fix for RV200 and newer card (Kevin Martin).
+ 741. Radeon overlay gamma fix (Hui Yu@ATI).
+ 740. Radeon LG panel fix (Hui Yu@ATI).
+ 739. Change makedepend to warn about any whitespace it finds in front of
+      pre-processor directives (Marc La France).
+ 738. Missing deadkeys in UTF-8 compose table (Mike Fabian).
+ 737. Build fix for SPARC (Thorsten Kukuk).
+ 736. Fixed integer address value in vesa driver to be large enough
+      to hold a 64 bit memory address (Andreas Schwab).
+ 735. Disabled RENDER accel on Matrox when used in multihead mode 
+      (Stefan Dirsch).
+ 734. Added FireGL 8700/8800 to the list of supported cards or RADEON
+      driver (Stefan Dirsch).
+ 733. Added -mcmodel=kernel to DRM Makefile for x86_64 (Stefan Dirsch). 
+ 732. Added vesa and fbdev driver to x86_64, removed nsc driver for ia64 build
+      (Stefan Dirsch).
+ 731. Fixing comments in th_TH.UTF-8 (Stefan Dirsch).
+ 730. Fixes from the DRI CVS:
+       - Don't segfault when spec or fog stride is 0.
+       - Don't set RADEON_SURF_TRANSLATION_DIS for framebuffer aperture
+         byte swapping on big endian machines; doesn't work with R200 and
+         later chips.
+       - Improve AGP workaround for pre-R200 chips.
+      (Michel Dänzer).
+ 729. Remove inappropriate __linux__ ifdef in the tdfx client-side DRI driver
+      (#5579, Eric Anholt).
+ 728. Allow makedepend handle whitespace in front of the '#' in preprocessor
+      directives (ISO C permits this) (#A.1516, Alexander Stohr).
+ 727. Add zh_TW.UTF-8 locale support (#A.1514, Leon Ho).
+ 726. Add recognition of wacom "XD-xxxx" models to the wacom input driver,
+      and treat them the same as "GD-xxxx" models (#A.1505, Rene Rask).
+ 725. Fix some missing render extension big-req compatibility (#A.1493,
+      Keith Packard).
+ 724. Fix a missing initialisation in the calcomp input driver that makes
+      the driver unusable and crashes the X server at startup (#A.1492,
+      Martin Kroeker).
+ 723. Work around for a bug in the i740 driver's XVideo support where the
+      video output would sometimes stop updating (#5578, Stephen Blackheath).
+ 722. Make DRM signal-on-vblank request return EINVAL on BSD since it's
+      not been ported yet (#5576, Eric Anholt).
+ 721. Remove the no longer used bsd/drm/kernel/r128/*.[ch] files (#5576,
+      Eric Anholt).
+ 720. drmFreeBufs was missing from the r128 driver's referenced symbols list
+      (#5574, Eric Anholt).
+ 719. Allow all of the extended mouse button bits for the "sysmouse" protocol
+      to be passed through (#5573, Eric Anholt).
+ 718. Update the XFree86 server special key handling so that by default
+      there is a fallback to the the hard-coded keys when there is no
+      Terminate action binding in the XKB map.  A new global option is
+      added to allow the fallback mechanism to be used never, when needed,
+      or always, with "when needed" the default (#5572, Joe Moss).
+ 717. Update the README.fonts document (#5570, Juliusz Chroboczek).
+ 716. Build the loader's libc wrapper with -DHAVE_SYSV_IPC on FreeBSD
+      since NVIDIA's binary driver uses it (#5569, Eric Anholt).
+ 715. Reduce the stack usage from 64k to 8k in imLcPrs.c, which fixes
+      a problem with Java for FreeBSD (#5568, Eric Anholt).
+ 714. Gcc 3 deprecated the #pragma weak method for weak links (#5567,
+      Motoyuki Konno).
+ 713. FreeBSD.cf updates:
+       - Sparc64 support
+       - Recent 5.0-current doesn't need libXThrStub
+       - Disable SharedLibXdmGreet, fixing xdm on alpha
+      (#5566, Eric Anholt).
+ 712. XDarwin now loads GLX support dynamically. Current options are Apple's
+      OpenGL framework or Mesa (Torrey T. Lyons).
+ 711. GeForceFX support in the nv driver (Mark Vojkovich).
+ 710. DPMS support in the nv driver.  CRTs only at this time (Mark Vojkovich).
+ 709. Fix for recognition of non-existent PCI devices (Marc La France).
+ 708. Fix for when firmware/BIOS initialisation does not enable the extra
+      command FIFO entries available on second-generation integrated Mach64
+      variants (Marc La France).
+ 707. Copying Syriac OTF fonts to directory OTF instead of TTF.
+      The xtt font renderer cannot handle OTF fonts causing the
+      entire directory to be ignored (Egbert Eich).
+ 706. Disabling MIT-SHM extensions for Xnest, fixing pixmap private
+      code in Xnest, thus cleaning out bogus patch 137. 
+      NOTE: The MIT-SHM presently *does* *not* work with Xnest. 
+      I have code to make it work but it is not well tested therefore 
+      MIT-SHM is disabled for now! (Egbert Eich).
+ 705. Fix the misnaming of three of the redglass cursors (#A.1491,
+      Keith Packard).
+ 704. Fix for two problems where the combination of xtt and XAA could result
+      in a crash.  The first problem was xtt returning a NULL pointer for
+      the bitmap even though the height was non-zero.  The second problem
+      was glyph ascent/descent exceeding the range of maxbounds.ascent/
+      maxbounds.descent (A.1484, Chisato Yamauchi, Masanori Shimada).
+ 703. Eliminate locale-dependent behaviour in fontconfig's setfontdirs
+      script (#A.1483, Markus Kuhn).
+ 702. Fix a bug in previous Thai XIM changes (#5563,
+      Theppitak Karoonboonyanan).
+ 701. Updates for the Israeli XKB map, including:
+       - Implement parens mirroring.
+       - Add two additional variants: "lyx", replacing shifted Hebrew
+         letters with Hebrew point marks, and "si1452", implementing the
+         Standard of Israel no. 1452 mapping.
+      (#5562, Tzafrir Cohen).
+ 700. BuildServersOnly fix when building on a system with no installed
+      X headers or libraries (#5559, ISHIKAWA Mutsumi).
+ 699. Add extended symbols for the "Logitech Cordless Desktop Navigator"
+      keyboard (#A.1480, Gilbert Fridgen).
+ 698. Fix xdm resource's font references to match actual bitmap fonts (#A.1477,
+      Göran Uddeborg).
+ 697. Update the xcursorgen man page (#A.1475, Keith Packard).
+ 696. Add a Mongolian XKB map (#5557, Sanlig Badral).
+ 695. Fixes for the Turkish XKB map (#5556, Nilgün Belma Bugüner).
+ 694. Thai XIM fixes:
+       - Fix the arguments in calling to StringConversionCallback in Thai XIM
+         filter, according to Hideki Hiura's explanation on the protocol.
+       - Add input sequence correction capability to the Thai XIM by
+         exploiting the XIMStringConversionSubstitution operation.
+      (#5553, Theppitak Karoonboonyanan).
+ 693. Resync the pc/fi XKB map with the previous map (#5552, Marko Myllynen).
+ 692. Workaround for parsing of Layout sections caused by recent changes
+      (#5558, Andrew Aitchison, Paulo César Pereira de Andrade).
+ 691. Fix the enabling of the Glint Gamma for use on an Appian Graphics
+      Jeronimo 2000 board which uses two Permedia3's (#5448, Sven Luther).
+ 690. Fix a problem in the trident driver for older chipsets and using
+      16bit clock programming, manifested itself on a Thinkpad 760EL,
+      but there are probably lots of others. (Alan Hourihane).
+ 689. On Darwin add Mac font directories to fonts.conf (Torrey T. Lyons).
+ 688. Post XDarwin mouse events in Quartz mode where they happen rather than
+      where the cursor currently is (Adrian Umpleby).
+ 687. Enable Freetype Mac FOND support on Mac OS X (Torrey T. Lyons).
+ 686. Add an "lswitch" option to the group xkb map, allowing the left Alt
+      key to be used for AltGr (#A.1463, Andreas Tobler).
+ 685. Add some locales for OpenI18N1.2 (LI18NUX2000) level.1 conformance,
+      and change zh_HK to point to zh_HK.big5hkscs which conforms to
+      glibc's default for zh_HK (#A.1457, Leon Ho).
+ 684. Updates for the Irish and Ogham XKB maps (#5549, 5550,
+      Séamus Ó Ciardhuáin).
+ 683. Xterm patch #172 (Thomas Dickey).
+
+XFree86 4.2.99.3 (21 December 2002)
+ 682. Add a request to XFree86-VidModeExtension to get the read/write
+      permissions so that clients can check if they have permission to
+      change parameters (David Dawes).
+ 681. Fix read-only XFree86-VidModeExtension requests for remote connections
+      (David Dawes, reported by Jamie Zawinski).
+ 680. Correct problem when the server prints the name of a 'private
+      xkb action' in a format that xkbcomp cannot understand, and
+      was causing problems when calling XkbGetKeyboard (Ivan Pascal).
+ 679. Fix animated cursor problem with multiple screens (#A.1454,
+      Keith Packard).
+ 678. gtf.c build fix for LynxOS 4.0 (#A.1453, Stuart Lissaman).
+ 677. Fix a segfault in fontconfig (#A.1450, Keith Packard).
+ 676. If some LEDs are lighting when one reloads the XKB keyboard map
+      (using setxkbmap or xf86cfg) the LEDs become 'frozen' and can't
+      be switched off. The patch fixes this bug. (#5544, Ivan Pascal).
+ 675. Fix some problems with the addition of multi-layout scheme to
+      xkb: some keys that aren't 'alphabetic' should be treated as
+      such to allow CapsLock+Shift working as expected; sometimes it
+      is required to load an include file more than once due to
+      multi-layout configuration, also fix some typos
+      (#5545, Ivan Pascal).
+ 674. XKB programable 'special combinations' (such as Ctrl+Alt+<key>)
+      also send usual key evants (press and release).  Although the
+      keysym generated in this case is NoSymbol such events can confuse
+      some applications (#5546, Ivan Pascal).
+ 673. Fix some remaining memory leaks in xkb initialization code
+      (Paulo César Pereira de Andrade).
+ 672. Temporarily enable the hard-coded Ctrl-Alt-Backspace terminate sequence
+      until a better fallback mechanism is implemented (Egbert Eich).
+ 671. Allow XKB-remappable hot keys to work with the "kbd" driver
+      (Egbert Eich).
+ 670. Export xf86inSuspend as needed by the "kbd" driver (Egbert Eich).
+ 669. SiS driver updates, including:
+       - support for SiS 330 Xabre (untested)
+       - Bugfix for boxes with two VGA connectors (tested)
+       - Autodetection of second monitor (tested)
+       - TV detection improved (tested)
+       - fixed error in 1280x1024 panel support (yet untested)
+       - Fixed bug in TV output on SiS30xB/30xLV (PAL still only BW, not
+         even the Windows driver can display PAL in color)
+       - Fixed positioning of TV picture. Works now for all video bridges
+         except Chrontel 7019 (still untested).
+      (Thomas Winischhofer).
+ 668. Add an alternative French XKB layout (fr-latin9) (#A.1446, Guylhem Aznar,
+      Rene Cougnenc, Nicolas Mailhot).
+ 667. Add bar and brokenbar to default <LSGT> definition for pc102 and
+      pc105 xkb maps (based on #A.1445, Göran Uddeborg).
+ 666. Change the keypad "decimal" key to KP_Separator in the dk, fi, no, se
+      xkb maps (#A.1440, Robin Rosenberg).
+ 665. Fixes and cleanups for the ISO8859-14 Compose table (#5543, 
+      Séamus Ó Ciardhuáin).
+ 664. Update the Ogham xkb map, including full support for the IS434 standard
+      and laptops (#5542, Séamus Ó Ciardhuáin).
+ 663. Update the Irish xkb map, including adding support for laptops (#5541,
+      Séamus Ó Ciardhuáin).
+ 662. Add "Inet" key definitions for the Honeywell Euroboard keyboard (#A.810,
+      Scott Penrose).
+ 661. Add "Inet" key definitions for the Trust Direct Access keyboard (#A.897,
+      Raphaël Poss).
+ 660. Add draglock support to the mouse driver, for aiding trackball use
+      by people with low dexterity (#A.1224, Paul Elliott).
+ 659. Fix bad includes in the xkb "level3" symbols file (A.1444,
+      Göran Uddeborg).
+ 658. Fix atimisc panel support bug that occurs when the mode on server entry
+      is a VGA mode with large horizontal and/or vertical blanking pulses
+      (Marc La France).
+ 657. Fix small documentation error in config/imake/imakemdep.h (#A.1052,
+      Linus Almstrom).
+ 656. Small change to find_mesa_visual() in xf86glx.c to avoid
+      branch misprediction on x86 (#A.1057, lompik at voila.fr).
+ 655. Clear memory allocated in xtWidgetAlloc() to avoid garbage from
+      malloc() being referenced later (#A.1114, Adam J. Richter).
+ 656. Make SysRq generate the same keycode as PrtScrn, and Break the same
+      keycode as Pause (#A.1160, Owen Taylor).
+ 655. Add "Inet" key definitions for some HP and Toshiba laptops (#A.1213,
+      Peter Soos).
+ 654. "Inet" key definitions for the Brother Internet keyboard (#A.1242,
+      Diego Iastrubni).
+ 653. "Inet" key definitions for the Ennyah model DKB-1008 keyboard (#A.1256,
+      Lionel Landwerlin).
+ 652. Apply i830 DRM driver cleanups to the i810 driver (#A.1438,
+      David Airlie).
+ 651. Add XI18NOBJS files for the ko_KR.UTF-8 and ja_JP.UTF-8 locales
+      (#5538, 5539, Jungshik Shin).
+ 650. Add FIRSTINDEX to the gb2312.1980-0.enc, gbk-0.enc and jis0212.1990-0.enc
+      encoding files (#5537, Jungshik Shin).
+ 649. Increment shared libraries major revisions on OpenBSD if gcc with 
+      stack protector is used (Matthieu Herrb, Todd Fries). 
+ 648. Resync with DRI (mesa-4-0-4-branch).
+ 647. Update XDarwin's IOKit mode to work with new event handling code
+      (Torrey T. Lyons).
+ 646. Add some more aliases for some German locales (#A.1263, Thomas Koeller).
+ 645. Update kio8-r encoded Cyrillic BDF fonts (#A.1267, Andrey A. Chernov).
+ 644. Fix Xtrans TLI code to handle a port scan and not fill the log file
+      with error messages from _XSERVTransTLIAccept() (#A.1333, Fiel Cabral).
+ 643. Only free cbs.data.text when cbs.type is XIMTextType in
+      _XimStatusDrawCallback() (#A.1342, Owen Taylor).
+ 642. Allow mouse pointer movement to be rotated (#A.1346, Joost Buelens).
+ 641. Add xkb layouts for Indian scripts (Kannada, Telugu, and Oriya) (#A.1436,
+      Guntupalli Karunakar).
+ 640. Enable MMX, SSE and 3DNow! for NetBSD 1.6 and later (#5536,
+      Matthias Scheler).
+ 639. Merge the xkb 'lt' layouts into pc/lt (#5535, Nerijus Baliunas).
+ 638. Set the default fa_IR character set to UTF-8 instead of
+      ISIRI-3342 (#A.1356, Roozbeh Pournader).
+ 637. Fixes and updates for building under LynxOS/PowerPC 4.0 (#A.1386,
+      Stuart Lissaman).
+ 636. Update the ClearlyU fonts to version 1.9 (#A.1386, Mark Leisher).
+ 635. Fix for drmOpenDevice() ignoring success on its second attempt at
+      opening the drm device (#A.1394, Alexander Stohr).
+ 634. Add support for a "-include" command line option to makedepend, similar
+      to the same GNU C option (#A.1396, Alexander Stohr).
+ 633. Perform country-independent matching for Chinese languages in fontconfig
+      (#A.1406, Keith Packard).
+ 632. Finish off the UTF-16 APIs in Xft, and fix the UTF-16 conversion
+      code in fontconfig (#A.1411, Keith Packard, Jungshik Shin).
+ 631. Make XIM locale checking case-independent (based on #A.1422, Leon Ho).
+ 630. Fix incorrect datatype for the pixmap width in
+      fbCompositeSrcAdd_8000x8000(), and add some small optimisations
+      (#A.1423, Keith Packard).
+ 629. Update the se xkb map to allow the older AltGr+5 method of entering
+      the Euro sign (#A.1433, Christian Rose).
+ 628. Add validation for the screen number parameter received over the wire
+      by the X server's DRI extension code, and fix some similar checks in
+      the GLX code.  This fixes X server segfaults when an invalid screen
+      value is provided (#A.1434, Felix Kühling)..
+ 627. Fix some bugs in the Iranian xkb layout (#A.1135, Roozbeh Pournader).
+ 626. Add a Bosnian xkb layout (#A.1398, Amila Akagic).
+ 625. Fix for Hungarian xkb layout (#A.1175, Peter Soos).
+ 624. Update the Maltese xkb layouts (#A.1243, Ramon Casha).
+ 623. Add EuroSign to the xkb "gb" layout (#A.901, Dermot McNally).
+ 622. Various updates for the xkb "xfree86" keymap list (including #A.777,
+      Andriy Rysin).
+ 621. Let kbd driver test if Xserver is in suspend before handling any
+      input events (Egbert Eich).
+ 620. Fixed agp version checking to accept minor versions >= the specified
+      number (Leif Delgass).
+ 619. Update referenced symbols lists for the mga, vesa, i810 and vmware
+      drivers (David Dawes).
+ 618. Add missing symbol to the mga driver's referenced symbols lists
+      (#5534, Mike Harris).
+ 617. Add some utf8 locale aliases (#5533, Mike Harris).
+ 616. Fix some Linux/Alpha (with domain support) build and runtime
+      problems (#5532, Jeff Wiedemeier).
+ 615. Add some missing symbols to the radeon driver's referenced symbols
+      lists (#5531, Mike Harris).
+ 614. Restore the Alt/Meta mappings for pc104/pc105 keyboards in the
+      multi-layout maps (David Dawes).
+ 613. Add UTF-8 locale entries for Amharic-Ethiopian, Tigrinya-Eritrean
+      and Tigrinya-Ethiopian (#5529, Daniel Yacob).
+ 612. Restore the "\|" key in the GB multi-layout keyboard layout (#5528,
+      Andrew Aitchison).
+ 611. Updates for the auto-generated UTF-8 Compose file (#5527,
+      David Monniaux).
+ 610. Updates/fixes for the Korean font encoding file (#5525, Jungshik Shin).
+ 609. Fix some problems with the multilayout version of the Turkish layout
+      (#5521, Nilgün Belma Bugüner).
+ 608. DRM vertical blank ioctl can send a signal as an alternative to
+      blocking (r200 and radeon only so far) (#5523, Michel Dänzer).
+ 607. Build fix for Linux/Alpha (#5515, Mike Harris).
+ 606. Change CppCmd on Linux to /usr/bin/cpp (#5514, Mike Harris).
+ 605. Fix an incorrect check for the "StrangeLockups" option in the
+      neomagic driver (#5505, Mike Harris).
+ 604. Rename geode driver to nsc and add GX2 support (Sarma Kolluru, NatSemi).
+ 603. Add the missing XKB definition for keysym "ISO_Level3_Lock" (#5526,
+      Séamus Ó Ciardhuáin).
+ 602. XkbSetControls should return True when successful, not False (#A.1385,
+      Stephen Montgomery-Smith).
+ 601. The functions XGetXlibControls and XSetXlibControls must work even if
+      the X server doesn't have the XKB extensions (#5513, Ivan Pascal).
+ 600. Add en_ZA locales (#5512, Berend De Schouwer).
+ 599. Fix shadowfb to not make update callbacks for operations that don't
+      touch offscreen memory, and to not double (or more) update glyph
+      rendering (#5509, Nolan Leake).
+ 598. Change XAA to not sync when it sees RENDER operations that don't
+      touch VRAM, and to try to accelerate Glyphs with Composite if it
+      seems likely that will work (#5509, Nolan Leake).
+ 597. VMware driver updates, including:
+       - Fixed vmwareGetImage to correctly calculate the region to be gotten.
+       - Small cursor bypass optimization.
+       - Fixed race between writing normal registers and writing HWcursor
+         registers.
+       - Fixed small race in the FIFO wrap code that could cause FIFO
+         corruption.
+       - Added temporary offscreen memory manager.
+       - Added compositing (RENDER) acceleration.
+      (#5509, Nolan Leake).
+ 596. Newport driver updates, including:
+       - Add hardware cursor support.
+       - Workaround blank console after VT switch on some newports
+         (based on a patch from Dominik Behr).
+       - Support for the Indigo2 XL (based on a patch from Adrian Schroeter).
+      (#5507, Guido Guenther).
+ 595. Add SGML versions of the XKB config and enhancing docs (#5506,
+      Kamil Toman).
+ 594. Enable SSE, MMX, 3DNow support by default for Linux/x86_64 (#5502,
+      Mike Harris).
+ 593. Replace hard-coded "lib" directory names with LibDirName in Imake.tmpl
+      (#5480, Mike Harris).
+ 592. DRI shouldn't have been enabled for Linux/s390 (#5500, Mike Harris).
+ 591. Numerous bug, stability, and correctness fixes for the Intel 830/845G
+      3D support (#5517, Keith Whitwell).
+ 590. Numerous bug and stability fixes for the Intel 830/845G 2D and Xv
+      support (#5517, David Dawes).
+ 589. Move IOKit-specific global variables out of generic XDarwin code
+      (Torrey T. Lyons).
+ 588. Add a new interface for registration of core font renderers that allows
+      priorities to be assigned.  This allows multiple renderers for the
+      same extension to be registered, with the one with the highest priority
+      being the one that gets used (#5435, 5437, Juliusz Chroboczek).
+ 587. Fix 640x480 modes in neomagic driver (Egbert Eich).
+ 586. Fix reporting of G400/G450 in MGA driver (Andrew C. Aitchison).
+ 585. Don't change the authorization data (and in particular, don't
+      enable local host access) if the X server's authority file
+      is removed or becomes unreadable while the server is running
+      (David Dawes, reported by Dietmar Schröter).
+ 584. Xterm patch #171 (Thomas Dickey).
+ 583. Fix uninitialized buffer-count in luit (Semen A. Ustimenko).
+ 582. Various xdm updates from Debian and Suse (#5358, Branden Robinson, 
+      #5511, Sebastian Krahmer).
+ 581. Flesh out suncg6's SaveScreen() function (Moritz Bunkus).
+ 580. lib/Xaw/MultiSrc.c improperly checks open() return value
+      (A.1415, Jaromir Dolecek), Fix provided by Hideo Saito in NetBSD.
+ 579. Add DPMS and screen blanking support in the sunffb driver
+      (Ferris McCormick).
+ 578. Fix SEGV that occurs when Xsun* runs into an unrecognized framebuffer
+      type (Marc La France).
+ 577. When the mode on server entry is found to be using composite sync on a
+      Mach64 variant, turn on the "compositesync" option (Marc La France).
+ 576. Plug SIGIO hole while the server is switching back into its VT
+      (reported by Michel Lespinasse).
+ 575. Use shadowfb in XDarwin fullscreen Quartz mode (Torrey T. Lyons).
+ 574. Make RENDER optional for Xvfb. When RENDER is enabled add depth 32 
+      pixmap format  to list of supported pixmaps (Egbert Eich).
+ 573. Fix va_args glitches for xterm/libfontconfig: 0 == (void*)0 isn't true   
+      for all platforms (Egbert Eich).
+ 572. Fix lbxproxy to also build on platforms that don't have snprintf()    
+      (Egbert Eich).
+ 571. Fix va_args glitches in mkfontscale: arg stack isn't preserved after
+      calling va_arg on all platforms (Egbert Eich).
+ 570. Fixed x11perf aa benchmarks to support non-default visuals/colormaps
+      (Egbert Eich).
+ 569. Use -Os to build on Darwin PPC with Gcc 3.x (Torrey T. Lyons).
+ 568. XEditResCheckMessages trashed XtMalloced memory on some widget
+      hierarchies, due to using incorrect indexes when removing
+      duplicates (A.1409, Rob Arthan).
+ 567. xprop updates (Mihael Hategan).
+ 566. Fix SEGV in ICE library (Petter Reinholdtsen).
+ 565. Fix interaction between backing store and miext/shadow (adapted from
+      Paulo César Pereira de Andrade).
+ 564. Add new key descriptions for XFree86 special keys (i.e. for terminating
+      and VT switching the Xserver) (#5510, Ivan Pascal).
+ 563. #define DEALLOCATE_LOCAL as "do {} while(0)" instead of nothing to
+      eliminate GCC warnings caused by code that does not assume
+      DEALLOCATE_LOCAL can deal with null pointers (suggested by Kevin Martin).
+ 562. -
+ 561. Fix bug in kldload() call on FreeBSD (reported by Joy Ganguly).
+ 560. Adding int10 symbols to the list of possibly unresolved symbols in
+      Rage128 driver (Egbert Eich).
+ 559. Allowing scanpci to be build on Ppc (Egbert Eich).
+ 558. Updating SiS driver. Lots of new features, supported chipsets and
+      LCD panels, bug fixes. For details please check:
+      http://www.winischhofer.net/linuxsis630.shtml 
+      (Thomas Winischhofer).
+ 557. Changed MGA driver to query fb_offset for DRI from kernel instead
+      of taking the driver's FBAddress - this is required by platforms
+      like Alpha (Egbert Eich).
+ 556. Fix Xmu memory leak (reported by Michael Vogt).
+ 555. Deal with Creative SBlive devices that mis-identify themselves as
+      "prehistoric" VGA's (Marc La France).
+ 554. Allow -configure to setup Unknown Vendor/Boards removing the requirement
+      of xf86PciInfo information (Alan Hourihane).
+ 553. Hardware alpha blended cursors in the "nv" driver, new PCI IDs, and
+      a fix for a problem on PowerPC (Mark Vojkovich).
+ 552. "nv" driver workaround needed to let Xv continue to work after a 
+      suspend on some laptops (Pierre Lombard).
+ 551. Restore '--assembler-with-cpp' in AsCmd for Linux/mips, fixing the build
+      on that platform (#5499, Guido Guenther).
+ 550. An alternative update for alphabetic four level cz, sk XKB maps.
+      This is compatible with the way MS Windows behaves (#5498, Kamil Toman).
+ 549. Clarify the difference between characters and bytes in xev (#5497,
+      Markus Kuhn).
+ 548. Add an Irish (ie) XKB keyboard map (#5496, Seamus O Ciardhuain).
+ 547. Replace the UTF-8 compose map with one automatically generated from
+      the official Unicode documentation, with the addition of some
+      handwritten rules (#5495, David Monniaux).
+ 546. Document the "nomtrr" option in the XF86Config man page (#5494,
+      Mike Harris).
+ 545. Some fixes for the Icelandic xkb map (#5493, Olafur Osvaldsson).
+ 544. Add French Canadian keyboard description to xfree86.lst (#5492,
+      Mike Harris).
+ 543. Add a new file for descriptions of XkbModel, XkbLayout, XkbVariant
+      and XkbOption names, using an XML format.  Includes a DTD file
+      and perl script to convert from the new format to the old (.lst)
+      format (#5491, Ivan Pascal).
+ 542. Add missing "dvorak" single-group XKB layout (#5490, Ivan Pascal).
+ 541. Change the xkbfile library to allow some names to be grouped into
+      a named list, which allows the rules file to be simplified (#5490,
+      Ivan Pascal).
+ 540. Make the new single-group XKB symbols maps used by default (#5490,
+      Ivan Pascal).
+ 539. Fix a crash that can happen when some apps are run in CJK locales
+      (#5489, Havoc Pennington).
+ 538. Make xdm check the full password string (on Linux) for locked accounts
+      rather than just the first character (#5485, Mike Harris,
+      Nalin Dahyabhai).
+ 537. Fix a few cases where the transport endpoints would be removed
+      even if NOUNLINK is specified in the flags (#5484, J. Kean Johnston).
+ 536. Attempt to fix bitblt problems when doing offscreen pixmaps in
+      i810 (Egbert Eich).
+ 535. Change Build rule so that x86 assembler code for MESA can be completely
+      disabled on i386 (Egbert Eich).
+ 534. Added IEEE Optimization for x86-64 (Egbert Eich).
+ 533. Initialized fullscreen in DRIscreenPrivate to a vaild value 
+      (Egbert Eich).
+ 532. Fixed module loader to map memory in the low 32bit address space on
+      x86-64 (Egbert Eich).
+ 531. Shifted Keypad delete: added KP_Separator for de_DE and de_CH keyboard.
+ 530. Added sanity checks to various scripts (Egbert Eich).
+ 529. Fixed Trident RGB16 video playback mode (Alastair Robinsion).
+ 528. i810 only set OVRACT register when TVout isn't enabled 
+      (Sebastien BASTARD, Matthew J. Sottek, Egbert Eich).
+ 527. Record changes of BusMaster state so that pciDisable/Enable/Mem/Io
+      don't override these (Egbert Eich).
+ 526. Fixed RAC code: when no resources are shared chips may still need
+      RAC for bus access if both require non overlapping parts of the
+      VGA resources (Egbert Eich).
+ 525. Fix for resource registration of C&T and Tdfx driver (Egbert Eich).
+ 524. Prevent   core dumps in Xutf8Reset/Lookup code of Xlib (Masaru Yokoi).
+ 523. Added support for BE systems for C&T driver (Michael Stephen Hanni). 
+ 522. Added support for special keys found on many ACPI control, Easy Access
+      Keyboards, Internet keyboards, laptops, notebooks and PDA (via
+      xkb/symbols/inet). Added new key symbols for these keyboards 
+      (Stanislav Brabec).
+ 521. Fixed some problems with ininite loops which where introduced 
+      with the host bridge specific code (Egbert Eich).
+ 520. AXP domain support (Jeff Wiedemeier).
+ 519. Added -m32 flag to c++ when build on ia32 (Egbert Eich).
+ 518. -
+ 517. Added rule to be able to use Numlock key on broken IBM keyboards
+      (Stefan Dirsch).
+ 516. Fixed Xlib build rules so it builds a truly static library again 
+      (Egbert Eich).
+ 515. When compiled with GCC, force imake to generate Makefile's using GCC's
+      preprocessor rather than a system-provided one (Marc La France).
+ 514. Replace hard-coded "lib" directory names with LibDirName in X11.tmpl
+      (#5480, Mike Harris).
+ 513. Add some README files for XKB and it's configuration files (#5479, 5483,
+      Kamil Toman).
+ 512. Fixes for the "pc" cz and sk XKB maps:
+       - readded cz_qwerty (but new pc/ style) map
+       - added bskl variant missing in cz_qwerty and sk, sk_qwerty
+       - fixed keypad decimal key definition to affect only defined group
+         in cz, cz_qwerty
+       - missing SPCE definition readded to sk, sk_qwerty
+      (#5478, Kamil Toman).
+ 511. Union Reality UR-F98 headtracker input driver (Linux-only) (#5476, 5477,
+      Alan Cox).
+ 510. Palmax PD1100 touch screen driver (#5475, 5477, Alan Cox).
+ 509. Fujitsu Stylistic input driver (#5474, 5477, Rob Tsuk, John Apfelbaum,
+      Richard Miller-Smith, Alan Cox).
+ 508. Initialise ProgramName in xterm's main before referencing it (#5473,
+      Peter Valchev).
+ 507. Add an Ogham XKB keyboard map (#5472, Seamus O Ciardhuain).
+ 506. Handle Alt+Ctrl+Shift+SPECIAL differently from Alt+Ctrl+SPECIAL
+      where SPECIAL is one of the fallback built-in XFree86 hot keys
+      (#5468, J. Kean Johnston).
+ 505. Add Syriac XKB keyboard maps (#5467, Emil Soleyman-Zomalan).
+ 504. Rename HasKatmaiSupport to HasSSESupport (#5461-5463, 5465, Mike Harris).
+ 503. Add mouse wheel support for SCO OpenServer (#5460, J. Kean Johnston).
+ 502. Fix i18n problem in xmessage due to use of the useStringInPlace
+      resource (A.1381, Chisato Yamauchi).
+ 501. Fix xnest build on file systems that are not case sensitive
+      (Torrey T. Lyons).
+ 500. Use unique local Imake define for fonts.conf dir (#5482, Mike A. Harris)
+ 499. Fix xc/lib/Imakefile to not break HasFontconfig (#5481, Mike A. Harris)
+ 498. Refresh screen after wake from sleep in XDarwin full screen mode
+      (Torrey T. Lyons).
+ 497. Fixes and updates for the SCO OpenServer port (#5459, J. Kean Johnston).
+ 496. Add PCI ID defines for some ATI R300 chipsets (#5458,
+      Vladimir Dergachev).
+ 495. Fix error message typo in MakeRootTile() (#5451, Mike Harris).
+ 494. Redirect hostname's stderr in the xon script (#5450, Mike Harris).
+ 493. Add a request to the XFree86-Misc extension for querying the
+      X server's config file, module path, and log file name (#5456, Joe Moss).
+ 492. Add support for using the XKEYBOARD extension's action handlers
+      for the XFree86 X server hot keys.  This provides control over
+      the mapping of these hot keys (#A.1334, 5454, Joe Moss).
+ 491. Reinstate the X server -xkbdir option, but only when the X server's
+      real and effective uids are the same (based on #A.1132, Ivan Popov).
+ 490. Fix an xkbcomp bug that prevents a later definition from specifying
+      actions if the previous definition didn't (#5471, Joe Moss).
+ 489. Add a stub handler to xkbcomp for the DeviceValuator action (#A.1341,
+      Joe Moss).
+ 488. Fix broken software cursor with XDarwin's new event handling
+      (Torrey T.  Lyons).
+ 487. Change imake so that, when compiled with GCC, it invokes the pre-
+      processor through the gcc front-end, passing it imake's -v flag
+      (Marc La France).
+ 486. xf86cfg and xf86config patches, includind 1400x1050 mode, update list
+      of modules, auto inclusion of the xtt module when running X -configure
+      (A.1363, A.1364, A.1365, Chisato Yamauchi).
+ 485. Fix unbalanced paranthesis in linuxPci.c (#5466, Ishikawa Mutsumi).
+ 484. Remove "Option VideoRam" from savage driver, there's no need for it,
+      and utilize the entities given VideoRam size (Alan Hourihane).
+ 483. Fix fontconfig to obey NothingOutsideProjectRoot, so that the directory
+      /usr/share/fonts is ignored in this case (#A.1325, Joe Moss).
+ 482. Fix a segfault when using xkbcomp's -I option, and update the man
+      page to correctly document the way this option works (#5447, Joe Moss).
+ 481. Don't assume mmap returns the pointer hint requested.  This is in
+      the DENSE map code for Linux/alpha (#5439, Ray Strode).
+ 480. Build fix for r128_accel on PPC when DRI is disabled (based on
+      #5438, Mike Harris and #5449, Matthieu Herrb).
+ 479. Updates to bdf/misc UCS fonts (#5446, 5453, Markus Kuhn).
+ 478. Fix Thai glyphs in the 6x13 UCS font (#5427, Theppitak Karoonboonyanan).
+ 477. Add Thai glyphs to 7x13, 7x13B, 7x13O, 7x14, 7x14B UCS fonts
+      (#5445, Theppitak Karoonboonyanan).
+ 476. Add Thai subfont generation based on the ISO8859-11 map from unicode.org
+      (#5434, 5445, Theppitak Karoonboonyanan).
+ 475. Update the multilayout version of the Greek (el) xkb symbols (#5425,
+      Vasilis Vasaitis).
+ 474. On XDarwin startup, do not send events to the X server thread until it
+      is ready to receive them (Torrey T. Lyons).
+ 473. Add a utility (called gtf) for calculating VESA GTF mode lines
+      (Andy Ritger).
+ 472. Add an input driver for KB-Gear's Jamstudio pentablet (A.1328, 
+      Brian Goines).
+ 471. Add a Tektronix 4957 input driver (#A.1211, Olivier Danet).
+ 470. Fix backing store in Rage 128 and Radeon drivers (Kevin Martin).
+ 469. Fix Mono8x8 code in savage driver, needed ROP_NEEDS_SOURCE, also
+      add NO_PLANEMASK to ScreenToScreen as code doesn't handle that case
+      (Alan Hourihane).
+ 468. Add a little utility to read and write I/O ports, for those host
+      architectures that have them (Marc La France).
+ 467. Ignore (with messages) any HorizSync and VertRefresh specifications for
+      panels when using ATI LT, LTPro, XL and Mobility M1 (Marc La France).
+ 466. Fix a build failure when BuildServersOnly is defined and XnestServer
+      is not defined, and when /usr/X11R6 is not installed. (#A.1145,
+      Valeriy E. Ushakov).
+ 465. Fix panel support bug for ATI LTPro, XL and Mobility M1 chips
+      (Marc La France).
+ 464. Fix mode validation to deal with video memory sizes 256MB or greater
+      (Marc La France).
+ 463. Add ARGB cursors support to the vmware driver (#5442, Nolan Leake).
+ 462. Add more query options to glxinfo (#5441, Brian Paul).
+ 461. Fix a typo in glxinfo (#5440, D. Hageman).
+ 460. Fix a memory leak in Cygwin/XFree86 server (#5444, Kensuke Matsuzaki).
+ 459. Missing fallback to miPolyArc in fbarc.c (#A.1339, Ralf Klingebiel).
+ 458. Fix the cyrix driver support for the 5510, 5520 and 5530. This driver
+      only works with VSA1 based chips (#A.1260, Alan Cox).
+ 457. When building with gcc >= 2.8, generate Makefiles with `imake -Wundef`
+      (Marc La France).
+ 456. Re-instate changes clobbered by DRI merge (Marc La France).
+ 455. Fix a typo in shadowfb support from #5413 (#5430, Nolan Leake).
+ 454. Fix a bug in vmware's HW cursor support which conditionally hid the
+      cursor (#5430, Nolan Leake).
+ 453. Fix an initialization problem in the calcomp input driver (#A.1056,
+      Josef Walzer).
+ 452. Add command line and XF86Config options to control Render color
+      allocation on dynamic indexed visuals (Olivier Chapuis, Keith Packard)
+ 451. Keep track of whether the 830/845G HW cursor should be visible or
+      hidden so that it doesn't get turned on when it shouldn't (David Dawes).
+ 450. Fix for DGA offset inconsistency in the 830/845G driver (based on
+      a patch from Edgar Toernig).
+ 449. Fix a memory leak when calling _XCloseLC and removing the loadable
+      locales (#A.855 Mark Robinson).
+ 448. Fix input size of character strings used in lib/X11/lcGetConv.c (#A.828,
+      Yong-Jhen Hong).
+ 447. Add Shape extension support to Cygwin/XFree86 rootless mode (#5431,
+      Matsuzaki Kensuke).
+ 446. Fix a typo in the s3 driver which prevented virtual display sizes.
+      (#A.965, Stef Voltz).
+ 445. Fix a server crash that can happen when a DGA client frees its colormap
+      before setting the mode back to the original mode (David Dawes).
+ 444. Modify Type1 font RAM allocation heuristics to allow for larger fonts.
+      (#A.1121, Melchior Franz).
+ 443. Add new relocation entries for Alpha architecture to the loader which
+      are used when compiling with gcc >3.1 (#A.819, Thorsten Kranzkowski).
+ 442. Fix server crash when using Xinerama when application closes. 
+      (#A.808, Tsukahara Ken).
+ 441. Import Mesa-4.0.4, and resync with the DRI trunk (DRI Project).
+ 440. Server support for the alpha architecture on OpenBSD 3.2. 
+      (Matthieu Herrb, Arthur Grabowski). 
+ 439. Workaround for <linux/input.h> conflict (Marc La France).
+
 XFree86 4.2.99.2 (21 October 2002)
  438. Fix some memory leaks in libX11 i18n code (#A.1314, Olivier Chapuis).
  437. Add DGA and Xvideo support to the i740 driver (#A.1307, Kopecek Tomas).
@@ -15422,4 +16536,4 @@ XFree86 3.0a (28 April 1994)
 XFree86 3.0 (26 April 1994)
 
 
-$XFree86: xc/programs/Xserver/hw/xfree86/CHANGELOG,v 3.2354 2002/10/22 02:44:25 dawes Exp $
+$XFree86: xc/programs/Xserver/hw/xfree86/CHANGELOG,v 3.2588 2003/02/27 04:56:44 dawes Exp $
diff --git a/xc/programs/Xserver/hw/xfree86/Imakefile b/xc/programs/Xserver/hw/xfree86/Imakefile
index 42f602fa5..436cb6f29 100644
--- a/xc/programs/Xserver/hw/xfree86/Imakefile
+++ b/xc/programs/Xserver/hw/xfree86/Imakefile
@@ -3,7 +3,7 @@ XCOMM $XConsortium: Imakefile /main/12 1996/12/16 12:31:46 rws $
 
 
 
-XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/Imakefile,v 3.80 2002/02/11 14:38:58 tsi Exp $
+XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/Imakefile,v 3.82 2003/02/17 17:06:40 dawes Exp $
 
 #include <Server.tmpl>
 #define IHaveSubdirs
@@ -67,6 +67,10 @@ RACDIR = rac
 INT10DIR = int10
 #endif
 
+#if XF86VBE
+VBEDIR = vbe
+#endif
+
 #if BuildXF86Setup
 XF86SETUPDIR = XF86Setup
 #endif
@@ -75,7 +79,7 @@ XF86SETUPDIR = XF86Setup
 LOADERDIR = loader
 #endif
 
-#if BuildXInputExt
+#if BuildXInputExt && defined(XInputDrivers)
 INPUTDIR = input
 #endif
 
@@ -90,7 +94,7 @@ XF86CFGDIRS = xf86cfg xf86config
 SUBDIRS = os-support common $(I2CDIR) $(XAADIR) $(XF1BPPDIR) $(XF4BPPDIR) \
           $(XF8_32BPPDIR) $(XF8_16BPPDIR) $(XF24_32BPPDIR) $(SHADOWFBDIR) \
 	  drivers $(LOADERDIR) $(VGAHWDIR) $(FBDEVHWDIR) $(RAMDACDIR) \
-	  $(RACDIR) $(DDCDIR) $(INPUTDIR) $(INT10DIR) parser \
+	  $(RACDIR) $(DDCDIR) $(INPUTDIR) $(INT10DIR) $(VBEDIR) parser \
           scanpci doc dummylib $(XF86CFGDIRS) $(XF86SETUPDIR) etc \
           $(DRIVERSDK) $(XF8_32WIDDIR)
 
diff --git a/xc/programs/Xserver/hw/xfree86/Options b/xc/programs/Xserver/hw/xfree86/Options
index d6b347e86..c963cd3ce 100644
--- a/xc/programs/Xserver/hw/xfree86/Options
+++ b/xc/programs/Xserver/hw/xfree86/Options
@@ -24,7 +24,7 @@
 !! dealings in this Software without prior written authorization from the
 !! XFree86 Project.
 !!
-!! $XFree86: xc/programs/Xserver/hw/xfree86/Options,v 1.9 2002/06/04 23:04:48 dawes Exp $
+!! $XFree86: xc/programs/Xserver/hw/xfree86/Options,v 1.10 2003/02/15 06:46:30 paulo Exp $
 
 !! XAA options
 xaa.XaaNoCPUToScreenColorExpandFill:\
@@ -271,6 +271,72 @@ Try or don't try to use DMA for Xv image transfers. This will reduce CPU \
 usage when playing big videos like DVDs, but may cause instabilities. \
 Default: off.
 
+
+!! Radeon options
+
+radeon.SWcursor:\
+Selects software cursor. Default: off.
+
+radeon.NoAccel:\
+Disables all hardware acceleration. Default: off.
+
+radeon.Dac6Bit:\
+Enables or disables the use of 6 bits per color component when in 8 bpp \
+mode (emulates VGA mode). Default: off.
+
+radeon.VideoKey:\
+This overrides the default pixel value for the YUV video overlay key. \
+Default: undefined.
+
+radeon.UseFBDev:\
+Enable or disable use of an OS-specific framebuffer device interface \
+(which is not supported on all OSs). Default: off.
+
+radeon.AGPMode:\
+Set AGP data transfer rate. (used only when DRI is enabled) \
+Valid choices: 1 (default), 2 and 4
+
+radeon.AGPFastWrite:\
+Enable AGP fast write. (used only when DRI is enabled) \
+Default: off.
+
+radeon.ForcePCIMode:\
+Force to use PCI GART for DRI acceleration. (used only when DRI is enabled) \
+Default: off.
+
+radeon.DDCMode:\
+Force to use the modes queried from the connected monitor. Default: off.
+
+radeon.CloneDisplay:\
+This option is only used for dual-head cards with only single screen section \
+specified in the configuration file. Valid choices: \
+0 - disable (one CRTC used for both heads) \
+1 - auto-detect (default) \
+2 - force on \
+3 - auto-detect + 2nd head overlay \
+4 - force on + 2nd head overlay \
+
+radeon.CloneMode:\
+Set the first mode for the secondary head. It can be different from the modes \
+used for the primary head. If you don't have this line while clone is on, the \
+modes specified for the primary head will be used for the secondary head.
+
+radeon.CloneHSync:\
+Set the horizontal sync range for the secondary monitor. It is not required if \
+a DDC capable monitor is connected. Default: undefined.
+
+radeon.CloneVRefresh:\
+Set the vertical refresh range for the secondary monitor. It is not required \
+if a DDC capable monitor is connected. Default: undefined.
+
+radeon.PanelOff:\
+Disable panel output. Only used when clone is enabled. Default: off.
+
+radeon.EnablePageFlip:\
+Enable page flipping for 3D acceleration. This will increase performance but \
+not work correctly in some rare cases. Default: off.
+
+
 !! NeoMagic options
 
 neo.StrangeLockups:\
diff --git a/xc/programs/Xserver/hw/xfree86/Registry b/xc/programs/Xserver/hw/xfree86/Registry
index 39bdaf1be..9c4111348 100644
--- a/xc/programs/Xserver/hw/xfree86/Registry
+++ b/xc/programs/Xserver/hw/xfree86/Registry
@@ -214,6 +214,7 @@ AllowNonLocalXvidtune     B     F    allow non-local VidMode connections
 BlankTime                 I     F    Screen saver timeout (min)
 DisableModInDev           B     F    disallow changing input devs
 DisableVidModeExtension   B     F    disable VidMode extension
+DontVTSwitch              B     F    disable Ctrl-Alt-Fn
 DontZap                   B     F    disable Ctrl-Alt-BS sequence
 DontZoom                  B     F    disable Ctrl-Alt-+/-
 NoTrapSignals             B     F    don't trap signals
@@ -406,4 +407,4 @@ and underscores removed.
 
 
 
-$XFree86: xc/programs/Xserver/hw/xfree86/Registry,v 1.18 2002/04/06 18:31:09 tsi Exp $
+$XFree86: xc/programs/Xserver/hw/xfree86/Registry,v 1.19 2003/02/20 04:05:12 dawes Exp $
diff --git a/xc/programs/Xserver/hw/xfree86/XF86Conf.cpp b/xc/programs/Xserver/hw/xfree86/XF86Conf.cpp
index bb61f5a64..2f549ca66 100644
--- a/xc/programs/Xserver/hw/xfree86/XF86Conf.cpp
+++ b/xc/programs/Xserver/hw/xfree86/XF86Conf.cpp
@@ -1,4 +1,4 @@
-XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/XF86Conf.cpp,v 3.44 2001/12/17 20:52:29 dawes Exp $
+XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/XF86Conf.cpp,v 3.45 2003/02/20 04:05:12 dawes Exp $
 XCOMM
 XCOMM Copyright (c) 1994-1998 by The XFree86 Project, Inc.
 XCOMM
@@ -107,6 +107,12 @@ XCOMM provide a better stack trace in the core dump to aid in debugging
 
 XCOMM    Option	"NoTrapSignals"
 
+XCOMM Uncomment this to disable the <Crtl><Alt><Fn> VT switch sequence
+XCOMM (where n is 1 through 12).  This allows clients to receive these key
+XCOMM events.
+
+XCOMM    Option	"DontVTSwitch"
+
 XCOMM Uncomment this to disable the <Crtl><Alt><BS> server abort sequence
 XCOMM This allows clients to receive this key event.
 
diff --git a/xc/programs/Xserver/hw/xfree86/XF86Config.man b/xc/programs/Xserver/hw/xfree86/XF86Config.man
index 5626c72e2..239b8384c 100644
--- a/xc/programs/Xserver/hw/xfree86/XF86Config.man
+++ b/xc/programs/Xserver/hw/xfree86/XF86Config.man
@@ -1,4 +1,4 @@
-.\" $XFree86: xc/programs/Xserver/hw/xfree86/XF86Config.man,v 1.10 2002/10/12 16:06:43 herrb Exp $
+.\" $XFree86: xc/programs/Xserver/hw/xfree86/XF86Config.man,v 1.14 2003/02/26 18:59:49 dawes Exp $
 .\" shorthand for double quote that works everywhere.
 .ds q \N'34'
 .TH XF86Config __filemansuffix__ __vendorversion__
@@ -86,8 +86,6 @@ the form:
 .PP
 .RS 4
 .nf
-.\" Some man macros don't handle quotes in .BI, etc very well
-.\" \fBSection "\fP\fISectionName\fP\fB"\fP
 .BI "Section  \*q" SectionName \*q
 .RI "    " SectionEntry
     ...
@@ -157,7 +155,7 @@ ignored.  Most strings (including
 names) are also case-insensitive, and insensitive to white space and
 "_" characters.
 .PP
-Each config file entry usually take up a single line in the file.
+Each config file entry usually takes up a single line in the file.
 They consist of a keyword, which is possibly followed by one or
 more arguments, with the number and types of the arguments depending
 on the keyword.  The argument types are:
@@ -394,10 +392,20 @@ command line option.
 This prevents the X server from trapping a range of unexpected
 fatal signals and exiting cleanly.  Instead, the X server will die
 and drop core where the fault occurred.  The default behaviour is
-for the X server exit cleanly, but still drop a core file.  In
+for the X server to exit cleanly, but still drop a core file.  In
 general you never want to use this option unless you are debugging
 an X server problem and know how to deal with the consequences.
 .TP 7
+.BI "Option \*qDontVTSwitch\*q  \*q" boolean \*q
+This disallows the use of the
+.BI Ctrl+Alt+F n
+sequence (where
+.RI F n
+refers to one of the numbered function keys).  That sequence is normally
+used to switch to another \(oqvirtual terminal\)cq on operating systems
+that have this feature.  When this option is enabled, that key sequence has
+no special meaning and is passed to clients.  Default: off.
+.TP 7
 .BI "Option \*qDontZap\*q  \*q" boolean \*q
 This disallows the use of the
 .B Ctrl+Alt+Backspace
@@ -560,6 +568,26 @@ and
 will allow users to remove the grab used by screen saver/locker programs.
 An API was written to such cases. If you enable this option, make sure your
 screen saver/locker is updated.
+.TP 7
+.BI "Option \*qHandleSpecialKeys\*q \*q" when \*q
+This option controls when the server uses the builtin handler
+to process special key combinations (such as
+.BR Ctrl+Alt+Backspace ).
+Normally the XKEYBOARD extension keymaps will provide mappings
+for each of the special key combinations, so the builtin handler
+is not needed unless the XKEYBOARD extension is disabled.
+The value of
+.I when
+can be
+.BR Always ,
+.BR Never ,
+or
+.BR WhenNeeded .
+Default: Use the builtin handler only if needed.  The server will
+scan the keymap for a mapping to the
+.B Terminate
+action and, if found, use XKEYBOARD for processing actions, otherwise
+the builtin handler will be used.
 .SH MODULE SECTION
 The
 .B Module
@@ -1266,6 +1294,12 @@ operations, listed below.  Note that disabling an operation will have no
 effect if the operation is not accelerated (whether due to lack of support
 in the hardware or in the driver).
 .TP 7
+.BI "Option \*qNoMTRR\*q"
+Disables MTRR (Memory Type Range Register) support, a feature of modern
+processors which can improve video performance by a factor of up to 2.5.
+Some hardware has buggy MTRR support, and some video drivers have been
+known to exhibit problems when MTRR's are used.
+.TP 7
 .BI "Option \*qXaaNoCPUToScreenColorExpandFill\*q"
 Disables accelerated rectangular expansion blits from source patterns
 stored in system memory (using a memory-mapped aperture).
diff --git a/xc/programs/Xserver/hw/xfree86/XFree86.man b/xc/programs/Xserver/hw/xfree86/XFree86.man
index f8f78e58d..70bb6266a 100644
--- a/xc/programs/Xserver/hw/xfree86/XFree86.man
+++ b/xc/programs/Xserver/hw/xfree86/XFree86.man
@@ -1,4 +1,4 @@
-.\" $XFree86: xc/programs/Xserver/hw/xfree86/XFree86.man,v 3.55 2002/10/12 16:06:43 herrb Exp $ 
+.\" $XFree86: xc/programs/Xserver/hw/xfree86/XFree86.man,v 3.59 2003/02/26 18:59:49 dawes Exp $ 
 .TH XFree86 1 __vendorversion__
 .SH NAME
 XFree86 - X11R6 X server
@@ -10,12 +10,12 @@ XFree86 is an X server that was originally designed for UNIX and UNIX-like
 operating systems running on Intel x86 hardware.  It now runs on a wider
 range of hardware and OS platforms.
 .PP
-This work is derived from
+This work was originally derived from
 .I "X386\ 1.2"
 which was contributed to X11R5 by Snitily Graphics Consulting Service.
-The current XFree86 release is based on X11R6.3.  The XFree86 X server
-architecture was redesigned for the 4.0 release, and it includes among
-other things a loadable module system donated by Metro Link, Inc.
+The XFree86 X server architecture was redesigned for the 4.0 release,
+and it includes among other things a loadable module system donated by
+Metro Link, Inc.  The current XFree86 release is compatible with X11R6.6.
 .SH CONFIGURATIONS
 .PP
 .I XFree86
@@ -319,10 +319,10 @@ sections.
 .B \-showconfig
 This is the same as the
 .B \-version
-option, and is included for compatibilty reasons.  It may be removed in
+option, and is included for compatibility reasons.  It may be removed in
 a future release, so the
 .B \-version
-options hould be used instead.
+option should be used instead.
 .TP 8
 .B \-weight \fInnn\fP
 Set RGB weighting at 16 bpp.  The default is 565.  This applies only to
@@ -348,7 +348,25 @@ for any file when the server is run as root (i.e, with real-uid 0), or
 for files relative to a directory in the config search path for all
 other users.
 .SH "KEYBOARD"
-Multiple key presses recognized directly by \fIXFree86\fP are:
+.PP
+The XFree86 server is normally configured to recognize various
+special combinations of key presses that instruct the server to
+perform some action, rather than just sending the keypress event
+to a client application.
+The default XKEYBOARD keymap defines the key combinations listed below.
+The server also has these key combinations builtin to its event
+handler for cases where the XKEYBOARD extension is not being used.
+When using the XKEYBOARD extension, which key combinations
+perform which actions is completely configurable.
+.PP
+For more information about when the builtin event handler
+is used to recognize the special key combinations, see
+the documentation on the
+.B HandleSpecialKeys
+option in the XF86Config(__filemansuffix__) man page.
+.PP
+The special combinations of key presses recognized directly
+by \fIXFree86\fP are:
 .TP 8
 .B Ctrl+Alt+Backspace
 Immediately kills the server -- no questions asked.  This can be disabled
@@ -384,7 +402,10 @@ deactivates any active keyboard and mouse grabs.
 .TP 8
 .B Ctrl+Alt+F1...F12
 For BSD and Linux systems with virtual terminal support, these keystroke
-combinations are used to switch to Virtual Console 1 through 12.
+combinations are used to switch to virtual terminals 1 through 12,
+respectively.  This can be disabled with the
+.B DontVTSwitch
+XF86Config(__filemansuffix__) file option.
 .SH SETUP
 .I XFree86
 uses a configuration file called \fBXF86Config\fP for its initial setup.  
@@ -459,6 +480,7 @@ i810(__drivermansuffix__),
 imstt(__drivermansuffix__),
 mga(__drivermansuffix__),
 neomagic(__drivermansuffix__),
+nsc(__drivermansuffix__),
 nv(__drivermansuffix__),
 r128(__drivermansuffix__),
 rendition(__drivermansuffix__),
@@ -549,8 +571,7 @@ The current XFree86 core team consists of:
 .PP
 .RS 4
 .nf
-Stuart Anderson    \fIanderson@metrolink.com\fP
-Preston Brown      \fIpbrown@redhat.com\fP
+Stuart Anderson    \fIanderson@netsweng.com\fP
 Robin Cutshaw      \fIrobin@xfree86.org\fP
 David Dawes        \fIdawes@xfree86.org\fP
 Egbert Eich        \fIeich@xfree86.org\fP
@@ -570,6 +591,7 @@ David Wexelblat    \fIdwex@xfree86.org\fP
 .RE
 .PP
 \fIXFree86\fP source is available from the FTP server
-\fI<ftp://ftp.XFree86.org/pub/XFree86/>\fP, among others.  Documentation
+\fI<ftp://ftp.XFree86.org/pub/XFree86/>\fP, and from the XFree86
+CVS server \fI<http://www.xfree86.org/cvs/>\fP.  Documentation
 and other information can be found from the XFree86 web site
 \fI<http://www.xfree86.org/>\fP.
diff --git a/xc/programs/Xserver/hw/xfree86/common/Imakefile b/xc/programs/Xserver/hw/xfree86/common/Imakefile
index ff7572c69..812a9bb7d 100644
--- a/xc/programs/Xserver/hw/xfree86/common/Imakefile
+++ b/xc/programs/Xserver/hw/xfree86/common/Imakefile
@@ -4,7 +4,7 @@ XCOMM $XConsortium: Imakefile /main/34 1996/10/27 11:05:08 kaleb $
 
 
 
-XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/common/Imakefile,v 3.145 2002/09/29 23:54:33 keithp Exp $
+XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/common/Imakefile,v 3.148 2003/02/17 17:06:41 dawes Exp $
 
 
 
@@ -173,7 +173,7 @@ OFILES = \
 		-I$(FONTLIBSRC)/include -I$(FONTINCSRC) \
 		-I$(XF86SRC) -I$(XF86PARSERSRC) \
 		-I$(XF86SRC)/loader $(VGAINCLUDES) -I$(XF86SRC)/rac \
-	        -I$(XF86SRC)/scanpci -I$(XF86OSSRC)/vbe -I$(XF86SRC)/int10 \
+	        -I$(XF86SRC)/scanpci -I$(XF86SRC)/vbe -I$(XF86SRC)/int10 \
 		-I$(XF86SRC)/ddc -I$(SERVERSRC)/render $(RANDRINCS)
 
      OSNAME = OSName
@@ -187,6 +187,12 @@ CUSTOMVERSION = XFree86CustomVersion
   BUILDERSTRING = BuilderString
   BUILDERMSG = -DBUILDERSTRING='$(BUILDERSTRING)'
 #endif
+#if defined(BuildDate)
+    BUILD_DATE = BuildDate
+#endif
+       XORGREL = XOrgReleaseString
+   XORGREL_DEF = -DXORG_RELEASE='"$(XORGREL)"'
+
 CONSDEFINES = XFree86ConsoleDefines
 EXP_DEFINES = -DEXPIRY_TIME=XF86ServerExpiry $(EXP_FORCE_DEFINES)
     DRIVERS = XF86CardDrivers
@@ -202,7 +208,7 @@ XCONFIGUREDEFINES = -DXF86CONFIGFILE='"$(XF86CONFIGFILE)"'
 AllTarget($(OFILES))
 
 SpecialCObjectRule(xf86Bus,NullParameter,$(BUGMSG) $(VGAINCLUDES))
-SpecialCObjectRule(xf86Init,$(ICONFIGFILES),$(OSNAMEDEF) $(BUILDERMSG) $(BUGMSG) $(CUSTOMVERDEF) $(EXT_DEFINES) $(BETADEFS) $(MDEBUGDEFS))
+SpecialCObjectRule(xf86Init,$(ICONFIGFILES),$(OSNAMEDEF) $(BUILDERMSG) $(BUGMSG) $(CUSTOMVERDEF) $(XORGREL_DEF) $(EXT_DEFINES) $(BETADEFS) $(MDEBUGDEFS))
 SpecialCObjectRule(xf86Events,$(ICONFIGFILES),$(EXT_DEFINES) $(MDEBUGDEFS))
 SpecialCObjectRule(xf86Globals,$(ICONFIGFILES),$(EXT_DEFINES) $(MODPATHDEFINES) $(LOGDEFINES))
 SpecialCObjectRule(xf86Config,$(ICONFIGFILES),$(XCONFIGDEFINES))
@@ -246,6 +252,23 @@ clean::
 LinkFile(xf86DefModeSet.c,xf86DefModes.c)
 #endif
 
+includes:: xf86Build.h
+
+clean::
+	RemoveFile(xf86Build.h)
+
+#if defined(BuildDate)
+xf86Build.h: FRC
+	RemoveFile($@)
+	echo "#define BUILD_DATE $(BUILD_DATE)" > $@
+
+FRC:
+#else
+xf86Build.h:
+	RemoveFile($@)
+	echo "" > $@
+#endif
+
 DependTarget()
 
 InstallDriverSDKNonExecFile(compiler.h,$(DRIVERSDKINCLUDEDIR))
diff --git a/xc/programs/Xserver/hw/xfree86/common/compiler.h b/xc/programs/Xserver/hw/xfree86/common/compiler.h
index dfb1bb71d..4dda2f6c6 100644
--- a/xc/programs/Xserver/hw/xfree86/common/compiler.h
+++ b/xc/programs/Xserver/hw/xfree86/common/compiler.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/common/compiler.h,v 3.94 2002/09/16 18:05:42 eich Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/common/compiler.h,v 3.99 2003/01/29 15:23:20 tsi Exp $ */
 /*
  * Copyright 1990,91 by Thomas Roell, Dinkelscherben, Germany.
  *
@@ -87,7 +87,8 @@ extern int ffs(unsigned long);
 
 # if defined(NO_INLINE) || defined(DO_PROTOTYPES)
 
-#  if !defined(__sparc__) && !defined(__arm32__)
+#  if !defined(__sparc__) && !defined(__arm32__) \
+      && !(defined(__alpha__) && defined(linux))
 
 extern void outb(unsigned short, unsigned char);
 extern void outw(unsigned short, unsigned short);
@@ -96,7 +97,7 @@ extern unsigned int inb(unsigned short);
 extern unsigned int inw(unsigned short);
 extern unsigned int inl(unsigned short);
 
-#  else /* __sparc__ */
+#  else /* __sparc__,  __arm32__, __alpha__*/
 
 extern void outb(unsigned long, unsigned char);
 extern void outw(unsigned long, unsigned short);
@@ -105,7 +106,7 @@ extern unsigned int inb(unsigned long);
 extern unsigned int inw(unsigned long);
 extern unsigned int inl(unsigned long);
 
-#  endif /* __sparc__ */
+#  endif /* __sparc__,  __arm32__, __alpha__ */
 
 extern unsigned long ldq_u(unsigned long *);
 extern unsigned long ldl_u(unsigned int *);
@@ -124,60 +125,62 @@ extern unsigned short ldw_brx(volatile unsigned char *, int);
 
 # ifndef NO_INLINE
 #  ifdef __GNUC__
-#   if (defined(linux) || defined(__FreeBSD__) || defined(__NetBSD__)) && defined(__alpha__)
-#    ifdef linux
+#   if (defined(linux) || defined(__FreeBSD__) || defined(__NetBSD__) || defined(__OpenBSD__)) && defined(__alpha__)
 
+#    ifdef linux
 /* for Linux on Alpha, we use the LIBC _inx/_outx routines */
 /* note that the appropriate setup via "ioperm" needs to be done */
 /*  *before* any inx/outx is done. */
 
-extern void _outb(char val, unsigned short port);
+extern void (*_alpha_outb)(char val, unsigned long port);
 static __inline__ void
-outb(unsigned short port, unsigned char val)
+outb(unsigned long port, unsigned char val)
 {
-    _outb(val, port);
+    _alpha_outb(val, port);
 }
 
-extern void _outw(short val, unsigned short port);
+extern void (*_alpha_outw)(short val, unsigned long port);
 static __inline__ void
-outw(unsigned short port, unsigned short val)
+outw(unsigned long port, unsigned short val)
 {
-    _outw(val, port);
+    _alpha_outw(val, port);
 }
 
-extern void _outl(int val, unsigned short port);
+extern void (*_alpha_outl)(int val, unsigned long port);
 static __inline__ void
-outl(unsigned short port, unsigned int val)
+outl(unsigned long port, unsigned int val)
 {
-    _outl(val, port);
+    _alpha_outl(val, port);
 }
 
-extern unsigned int _inb(unsigned short port);
+extern unsigned int (*_alpha_inb)(unsigned long port);
 static __inline__ unsigned int
-inb(unsigned short port)
+inb(unsigned long port)
 {
-  return _inb(port);
+  return _alpha_inb(port);
 }
 
-extern unsigned int _inw(unsigned short port);
+extern unsigned int (*_alpha_inw)(unsigned long port);
 static __inline__ unsigned int
-inw(unsigned short port)
+inw(unsigned long port)
 {
-  return _inw(port);
+  return _alpha_inw(port);
 }
 
-extern unsigned int _inl(unsigned short port);
+extern unsigned int (*_alpha_inl)(unsigned long port);
 static __inline__ unsigned int
-inl(unsigned short port)
+inl(unsigned long port)
 {
-  return _inl(port);
+  return _alpha_inl(port);
 }
 
 #    endif /* linux */
 
-#    if defined(__FreeBSD__) && !defined(DO_PROTOTYPES)
+#    if (defined(__FreeBSD__) || defined(__OpenBSD__)) \
+      && !defined(DO_PROTOTYPES)
 
-/* for FreeBSD on Alpha, we use the libio inx/outx routines */
+/* for FreeBSD and OpenBSD on Alpha, we use the libio (resp. libalpha) */
+/*  inx/outx routines */
 /* note that the appropriate setup via "ioperm" needs to be done */
 /*  *before* any inx/outx is done. */
 
@@ -188,7 +191,8 @@ extern unsigned char inb(unsigned int port);
 extern unsigned short inw(unsigned int port);
 extern unsigned int inl(unsigned int port);
 
-#    endif /* __FreeBSD__ && !DO_PROTOTYPES */
+#    endif /* (__FreeBSD__ || __OpenBSD__ ) && !DO_PROTOTYPES */
+
 
 #if defined(__NetBSD__)
 #include <machine/pio.h>
@@ -215,7 +219,7 @@ struct __una_u16 { unsigned short x __attribute__((packed)); };
 
 static __inline__ unsigned long ldq_u(unsigned long * r11)
 {
-#    if __GNUC__ > 2 || __GNUC_MINOR__ >= 91
+#    if defined(__GNUC__) && ((__GNUC__ > 2) || (__GNUC_MINOR__ >= 91))
 	const struct __una_u64 *ptr = (const struct __una_u64 *) r11;
 	return ptr->x;
 #    else
@@ -234,7 +238,7 @@ static __inline__ unsigned long ldq_u(unsigned long * r11)
 
 static __inline__ unsigned long ldl_u(unsigned int * r11)
 {
-#    if __GNUC__ > 2 || __GNUC_MINOR__ >= 91
+#    if defined(__GNUC__) && ((__GNUC__ > 2) || (__GNUC_MINOR__ >= 91))
 	const struct __una_u32 *ptr = (const struct __una_u32 *) r11;
 	return ptr->x;
 #    else
@@ -253,7 +257,7 @@ static __inline__ unsigned long ldl_u(unsigned int * r11)
 
 static __inline__ unsigned long ldw_u(unsigned short * r11)
 {
-#    if __GNUC__ > 2 || __GNUC_MINOR__ >= 91
+#    if defined(__GNUC__) && ((__GNUC__ > 2) || (__GNUC_MINOR__ >= 91))
 	const struct __una_u16 *ptr = (const struct __una_u16 *) r11;
 	return ptr->x;
 #    else
@@ -276,7 +280,7 @@ static __inline__ unsigned long ldw_u(unsigned short * r11)
 
 static __inline__ void stq_u(unsigned long r5, unsigned long * r11)
 {
-#    if __GNUC__ > 2 || __GNUC_MINOR__ >= 91
+#    if defined(__GNUC__) && ((__GNUC__ > 2) || (__GNUC_MINOR__ >= 91))
 	struct __una_u64 *ptr = (struct __una_u64 *) r11;
 	ptr->x = r5;
 #    else
@@ -301,7 +305,7 @@ static __inline__ void stq_u(unsigned long r5, unsigned long * r11)
 
 static __inline__ void stl_u(unsigned long r5, unsigned int * r11)
 {
-#    if __GNUC__ > 2 || __GNUC_MINOR__ >= 91
+#    if defined(__GNUC__) && ((__GNUC__ > 2) || (__GNUC_MINOR__ >= 91))
 	struct __una_u32 *ptr = (struct __una_u32 *) r11;
 	ptr->x = r5;
 #    else
@@ -326,7 +330,7 @@ static __inline__ void stl_u(unsigned long r5, unsigned int * r11)
 
 static __inline__ void stw_u(unsigned long r5, unsigned short * r11)
 {
-#    if __GNUC__ > 2 || __GNUC_MINOR__ >= 91
+#    if defined(__GNUC__) && ((__GNUC__ > 2) || (__GNUC_MINOR__ >= 91))
 	struct __una_u16 *ptr = (struct __una_u16 *) r11;
 	ptr->x = r5;
 #    else
@@ -766,7 +770,7 @@ struct __una_u16 { unsigned short x __attribute__((packed)); };
 
 static __inline__ unsigned long ldq_u(unsigned long *p)
 {
-#    if __GNUC__ > 2 || __GNUC_MINOR__ >= 91
+#    if defined(__GNUC__) && ((__GNUC__ > 2) || (__GNUC_MINOR__ >= 91))
 #     if defined(__arch64__) || defined(__sparcv9)
 	const struct __una_u64 *ptr = (const struct __una_u64 *) p;
 #     else
@@ -782,7 +786,7 @@ static __inline__ unsigned long ldq_u(unsigned long *p)
 
 static __inline__ unsigned long ldl_u(unsigned int *p)
 {
-#    if __GNUC__ > 2 || __GNUC_MINOR__ >= 91
+#    if defined(__GNUC__) && ((__GNUC__ > 2) || (__GNUC_MINOR__ >= 91))
 	const struct __una_u32 *ptr = (const struct __una_u32 *) p;
 	return ptr->x;
 #    else
@@ -794,7 +798,7 @@ static __inline__ unsigned long ldl_u(unsigned int *p)
 
 static __inline__ unsigned long ldw_u(unsigned short *p)
 {
-#    if __GNUC__ > 2 || __GNUC_MINOR__ >= 91
+#    if defined(__GNUC__) && ((__GNUC__ > 2) || (__GNUC_MINOR__ >= 91))
 	const struct __una_u16 *ptr = (const struct __una_u16 *) p;
 	return ptr->x;
 #    else
@@ -806,7 +810,7 @@ static __inline__ unsigned long ldw_u(unsigned short *p)
 
 static __inline__ void stq_u(unsigned long val, unsigned long *p)
 {
-#    if __GNUC__ > 2 || __GNUC_MINOR__ >= 91
+#    if defined(__GNUC__) && ((__GNUC__ > 2) || (__GNUC_MINOR__ >= 91))
 #     if defined(__arch64__) || defined(__sparcv9)
 	struct __una_u64 *ptr = (struct __una_u64 *) p;
 #     else
@@ -821,7 +825,7 @@ static __inline__ void stq_u(unsigned long val, unsigned long *p)
 
 static __inline__ void stl_u(unsigned long val, unsigned int *p)
 {
-#    if __GNUC__ > 2 || __GNUC_MINOR__ >= 91
+#    if defined(__GNUC__) && ((__GNUC__ > 2) || (__GNUC_MINOR__ >= 91))
 	struct __una_u32 *ptr = (struct __una_u32 *) p;
 	ptr->x = val;
 #    else
@@ -832,7 +836,7 @@ static __inline__ void stl_u(unsigned long val, unsigned int *p)
 
 static __inline__ void stw_u(unsigned long val, unsigned short *p)
 {
-#    if __GNUC__ > 2 || __GNUC_MINOR__ >= 91
+#    if defined(__GNUC__) && ((__GNUC__ > 2) || (__GNUC_MINOR__ >= 91))
 	struct __una_u16 *ptr = (struct __una_u16 *) p;
 	ptr->x = val;
 #    else
@@ -1021,7 +1025,7 @@ xf86WriteMmio32Be(__volatile__ void *base, const unsigned long offset,
 
 extern volatile unsigned char *ioBase;
 
-#    define eieio()		__asm__ __volatile__ ("eieio")
+#    define eieio()		__asm__ __volatile__ ("eieio" ::: "memory")
 
 static __inline__ unsigned char
 xf86ReadMmio8(__volatile__ void *base, const unsigned long offset)
@@ -1237,7 +1241,7 @@ inl(unsigned short port)
 #    define stw_u(v,p)	(*(unsigned char *)(p)) = (v); \
 				(*((unsigned char *)(p)+1)) = ((v) >> 8)
 
-#    define mem_barrier()		eieio()
+#    define mem_barrier()	eieio()
 #    define write_mem_barrier()	eieio()
 
 #   else /* ix86 */
diff --git a/xc/programs/Xserver/hw/xfree86/common/xf86.h b/xc/programs/Xserver/hw/xfree86/common/xf86.h
index 598faa593..119adc5a6 100644
--- a/xc/programs/Xserver/hw/xfree86/common/xf86.h
+++ b/xc/programs/Xserver/hw/xfree86/common/xf86.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86.h,v 3.165 2002/10/11 01:40:29 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86.h,v 3.169 2003/02/13 10:49:38 eich Exp $ */
 
 /*
  * Copyright (c) 1997 by The XFree86 Project, Inc.
@@ -43,6 +43,7 @@ extern Bool fbSlotClaimed;
 extern Bool sbusSlotClaimed;
 #endif
 extern confDRIRec xf86ConfigDRI;
+extern Bool xf86inSuspend;
 
 #define XF86SCRNINFO(p) ((ScrnInfoPtr)((p)->devPrivates[xf86ScreenIndex].ptr))
 
@@ -176,6 +177,7 @@ void xf86ZoomViewport(ScreenPtr pScreen, int zoom);
 Bool xf86SwitchMode(ScreenPtr pScreen, DisplayModePtr mode);
 void *xf86GetPointerScreenFuncs(void);
 void xf86InitOrigins(void);
+void xf86ReconfigureLayout(void);
  
 /* xf86DPMS.c */
 
@@ -197,6 +199,7 @@ void xf86EnableInputHandler(pointer handler);
 void xf86InterceptSignals(int *signo);
 Bool xf86EnableVTSwitch(Bool new);
 Bool xf86CommonSpecialKey(int key, Bool down, int modifiers);
+void xf86ProcessActionEvent(ActionEvent action, void *arg);
 
 /* xf86Helper.c */
 
@@ -265,6 +268,7 @@ Bool xf86GetModInDevAllowNonLocal(void);
 Bool xf86GetModInDevEnabled(void);
 Bool xf86GetAllowMouseOpenFail(void);
 Bool xf86IsPc98(void);
+void xf86DisableRandR(void);
 CARD32 xf86GetVersion(void);
 CARD32 xf86GetModuleVersion(pointer module);
 pointer xf86LoadDrvSubModule(DriverPtr drv, const char *name);
diff --git a/xc/programs/Xserver/hw/xfree86/common/xf86Bus.c b/xc/programs/Xserver/hw/xfree86/common/xf86Bus.c
index 2da70a59b..fd9e3c3d1 100644
--- a/xc/programs/Xserver/hw/xfree86/common/xf86Bus.c
+++ b/xc/programs/Xserver/hw/xfree86/common/xf86Bus.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86Bus.c,v 1.74 2002/10/14 23:07:54 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86Bus.c,v 1.76 2003/02/21 17:19:34 tsi Exp $ */
 /*
  * Copyright (c) 1997-1999 by The XFree86 Project, Inc.
  */
@@ -1279,14 +1279,15 @@ xf86PrintResList(int verb, resPtr list)
 	    if ((list->res_type & ResPhysMask) == type) {
 		switch (list->res_type & ResExtMask) {
 		case ResBlock:
-		    xf86ErrorFVerb(verb, "\t[%d] %d\t%d\t0x%08x - 0x%08x (0x%x)",
+		    xf86ErrorFVerb(verb,
+				   "\t[%d] %d\t%d\t0x%08lx - 0x%08lx (0x%lx)",
 				   i, list->entityIndex,
 				   (list->res_type & ResDomain) >> 24,
 				   list->block_begin, list->block_end,
 				   list->block_end - list->block_begin + 1);
 		    break;
 		case ResSparse:
-		    xf86ErrorFVerb(verb, "\t[%d] %d\t%d\t0x%08x - 0x%08x ",
+		    xf86ErrorFVerb(verb, "\t[%d] %d\t%d\t0x%08lx - 0x%08lx ",
 				   i, list->entityIndex,
 				   (list->res_type & ResDomain) >> 24,
 				   list->sparse_base,list->sparse_mask);
@@ -1935,7 +1936,7 @@ setAccess(EntityPtr pEnt, xf86State state)
      */
     if (!pEnt->access->pAccess
 	&& (pEnt->entityProp & (state == SETUP ? NEED_VGA_ROUTED_SETUP :
-				NEED_VGA_ROUTED))) 
+				NEED_VGA_ROUTED)))
 	((BusAccPtr)pEnt->busAcc)->set_f(pEnt->busAcc);
 }
 
@@ -1967,6 +1968,7 @@ xf86EnterServerState(xf86State state)
     EntityPtr pEnt;
     ScrnInfoPtr pScrn;
     int i,j;
+    int needVGA = 0;
     resType rt;
     /* 
      * This is a good place to block SIGIO during SETUP state.
@@ -1993,9 +1995,11 @@ xf86EnterServerState(xf86State state)
  	for (j = 0; j<xf86Screens[i]->numEntities; j++) {
  	    pEnt = xf86Entities[xf86Screens[i]->entityList[j]];
  	    if (pEnt->entityProp & (state == SETUP ? NEED_VGA_ROUTED_SETUP
- 				    : NEED_VGA_ROUTED))
+ 				    : NEED_VGA_ROUTED)) 
 		xf86Screens[i]->busAccess = pEnt->busAcc;
  	}
+	if (xf86Screens[i]->busAccess)
+	    needVGA ++;
     }
     
     /*
@@ -2032,7 +2036,8 @@ xf86EnterServerState(xf86State state)
 	xf86Screens[i]->resourceType = rt;
 	if (rt == NONE) {
 	    xf86Screens[i]->access = NULL;
-	    xf86Screens[i]->busAccess = NULL;
+	    if (needVGA < 2)
+		xf86Screens[i]->busAccess = NULL;
 	}
 	
 #ifdef DEBUG
@@ -2248,10 +2253,31 @@ checkRoutingForScreens(xf86State state)
 				    "different buses - deleting\n",i);
 			    xf86DeleteScreen(i--,0);
 			}
+#ifdef DEBUG
+			{
+			    resPtr rlist = xf86AddResToList(NULL,&pAcc->val,
+							    pAcc->entityIndex);
+			    xf86MsgVerb(X_INFO,3,"====== %s\n",
+					state == OPERATING ? "OPERATING"
+					: "SETUP");
+			    xf86MsgVerb(X_INFO,3,"%s Resource:\n",
+					(pAcc->val.type) & ResMem ? "Mem" :"Io");
+			    xf86PrintResList(3,rlist);
+			    xf86FreeResList(rlist);
+			    xf86MsgVerb(X_INFO,3,"Conflicts with:\n");
+			    xf86PrintResList(3,pResVGAHost);
+			    xf86MsgVerb(X_INFO,3,"=====\n");
+			}
+#endif
 			vga = pEnt->busAcc;
 			pEnt->entityProp |= (state == SETUP
 			    ? NEED_VGA_ROUTED_SETUP : NEED_VGA_ROUTED);
-			break;
+			if (state == OPERATING) {
+			    if (pAcc->val.type & ResMem)
+				pEnt->entityProp |= NEED_VGA_MEM;
+			    else
+				pEnt->entityProp |= NEED_VGA_IO;
+			}
 		    }
 		pAcc = pAcc->next;
 	    }
@@ -2502,6 +2528,18 @@ xf86PostScreenInit(void)
     }
     
     if (xf86Screens && needRAC) {
+	int needRACforVga = 0;
+
+	for (i = 0; i < xf86NumScreens; i++) {
+	    for (j = 0; j < xf86Screens[i]->numEntities; j++) {
+		if (xf86Entities[xf86Screens[i]->entityList[j]]->entityProp
+		    & NEED_VGA_ROUTED) {
+		    needRACforVga ++;
+		    break; /* only count each screen once */
+		}
+	    }
+	}
+	
 	for (i = 0; i < xf86NumScreens; i++) {
 	    Bool needRACforMem = FALSE, needRACforIo = FALSE;
 	    
@@ -2512,8 +2550,21 @@ xf86PostScreenInit(void)
 		if (xf86Entities[xf86Screens[i]->entityList[j]]->entityProp
 		    & NEED_IO_SHARED)
 		    needRACforIo = TRUE;
+		/*
+		 * We may need RAC although we don't share any resources
+		 * as we need to route VGA to the correct bus. This can
+		 * only be done simultaniously for MEM and IO.
+		 */
+		if (needRACforVga > 1) {
+		    if (xf86Entities[xf86Screens[i]->entityList[j]]->entityProp
+			& NEED_VGA_MEM)
+			needRACforMem = TRUE;
+		    if (xf86Entities[xf86Screens[i]->entityList[j]]->entityProp
+			& NEED_VGA_IO)
+			needRACforIo = TRUE;		
+		}
 	    }
-	    
+		
 	    pScreen = xf86Screens[i]->pScreen;
 	    flags = 0;
 	    if (needRACforMem) {
diff --git a/xc/programs/Xserver/hw/xfree86/common/xf86Bus.h b/xc/programs/Xserver/hw/xfree86/common/xf86Bus.h
index 05fa80253..6a129ad56 100644
--- a/xc/programs/Xserver/hw/xfree86/common/xf86Bus.h
+++ b/xc/programs/Xserver/hw/xfree86/common/xf86Bus.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86Bus.h,v 1.20 2002/04/04 14:05:39 eich Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86Bus.h,v 1.21 2002/11/25 14:04:56 eich Exp $ */
 /*
  * Copyright (c) 1997 by The XFree86 Project, Inc.
  */
@@ -67,6 +67,8 @@ typedef struct _AsyncQRec {
 #define ACCEL_IS_SHARABLE 0x0100
 #define IS_SHARED_ACCEL 0x0200
 #define SA_PRIM_INIT_DONE 0x0400
+#define NEED_VGA_MEM 0x1000
+#define NEED_VGA_IO  0x2000
 
 #define NEED_SHARED (NEED_MEM_SHARED | NEED_IO_SHARED)
 
diff --git a/xc/programs/Xserver/hw/xfree86/common/xf86Config.c b/xc/programs/Xserver/hw/xfree86/common/xf86Config.c
index 836d909c3..1738222f5 100644
--- a/xc/programs/Xserver/hw/xfree86/common/xf86Config.c
+++ b/xc/programs/Xserver/hw/xfree86/common/xf86Config.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86Config.c,v 3.263 2002/10/11 01:40:29 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86Config.c,v 3.269 2003/02/20 04:36:07 dawes Exp $ */
 
 
 /*
@@ -38,6 +38,10 @@ extern DeviceAssocRec mouse_assoc;
 #include "XKBsrv.h"
 #endif
 
+#ifdef RENDER
+#include "picture.h"
+#endif
+
 #if (defined(i386) || defined(__i386__)) && \
     (defined(__FreeBSD__) || defined(__NetBSD__) || defined(linux) || \
      (defined(SVR4) && !defined(sun)) || defined(__GNU__))
@@ -675,6 +679,7 @@ configFiles(XF86ConfFilesPtr fileconf)
 
 typedef enum {
     FLAG_NOTRAPSIGNALS,
+    FLAG_DONTVTSWITCH,
     FLAG_DONTZAP,
     FLAG_DONTZOOM,
     FLAG_DISABLEVIDMODE,
@@ -702,12 +707,17 @@ typedef enum {
     FLAG_XINERAMA,
     FLAG_ALLOW_DEACTIVATE_GRABS,
     FLAG_ALLOW_CLOSEDOWN_GRABS,
-    FLAG_LOG
+    FLAG_LOG,
+    FLAG_RENDER_COLORMAP_MODE,
+    FLAG_HANDLE_SPECIAL_KEYS,
+    FLAG_RANDR
 } FlagValues;
    
 static OptionInfoRec FlagOptions[] = {
   { FLAG_NOTRAPSIGNALS,		"NoTrapSignals",		OPTV_BOOLEAN,
 	{0}, FALSE },
+  { FLAG_DONTVTSWITCH,		"DontVTSwitch",			OPTV_BOOLEAN,
+	{0}, FALSE },
   { FLAG_DONTZAP,		"DontZap",			OPTV_BOOLEAN,
 	{0}, FALSE },
   { FLAG_DONTZOOM,		"DontZoom",			OPTV_BOOLEAN,
@@ -764,6 +774,12 @@ static OptionInfoRec FlagOptions[] = {
 	{0}, FALSE },
   { FLAG_LOG,			"Log",				OPTV_STRING,
 	{0}, FALSE },
+  { FLAG_RENDER_COLORMAP_MODE,	"RenderColormapMode",		OPTV_STRING,
+        {0}, FALSE },
+  { FLAG_HANDLE_SPECIAL_KEYS,	"HandleSpecialKeys",		OPTV_STRING,
+        {0}, FALSE },
+  { FLAG_RANDR,			"RandR",			OPTV_BOOLEAN,
+	{0}, FALSE },
   { -1,				NULL,				OPTV_NONE,
 	{0}, FALSE },
 };
@@ -814,6 +830,7 @@ configServerFlags(XF86ConfFlagsPtr flagsconf, XF86OptionPtr layoutopts)
     xf86ProcessOptions(-1, optp, FlagOptions);
 
     xf86GetOptValBool(FlagOptions, FLAG_NOTRAPSIGNALS, &xf86Info.notrapSignals);
+    xf86GetOptValBool(FlagOptions, FLAG_DONTVTSWITCH, &xf86Info.dontVTSwitch);
     xf86GetOptValBool(FlagOptions, FLAG_DONTZAP, &xf86Info.dontZap);
     xf86GetOptValBool(FlagOptions, FLAG_DONTZOOM, &xf86Info.dontZoom);
 
@@ -897,6 +914,47 @@ configServerFlags(XF86ConfFlagsPtr flagsconf, XF86OptionPtr layoutopts)
         }
     }
     
+#ifdef RENDER
+    {
+	const char *s;
+
+	if ((s = xf86GetOptValString(FlagOptions, FLAG_RENDER_COLORMAP_MODE))){
+	    int policy = PictureParseCmapPolicy (s);
+	    if (policy == PictureCmapPolicyInvalid)
+		xf86Msg(X_WARNING, "Unknown colormap policy \"%s\"\n", s);
+	    else
+	    {
+		xf86Msg(X_CONFIG, "Render colormap policy set to %s\n", s);
+		PictureCmapPolicy = policy;
+	    }
+	}
+    }
+#endif
+    {
+	const char *s;
+	if ((s = xf86GetOptValString(FlagOptions, FLAG_HANDLE_SPECIAL_KEYS))) {
+	    if (!xf86NameCmp(s,"always")) {
+		xf86Msg(X_CONFIG, "Always handling special keys in DDX\n");
+		xf86Info.ddxSpecialKeys = SKAlways;
+	    } else if (!xf86NameCmp(s,"whenneeded")) {
+		xf86Msg(X_CONFIG, "Special keys handled in DDX only if needed\n");
+		xf86Info.ddxSpecialKeys = SKWhenNeeded;
+	    } else if (!xf86NameCmp(s,"never")) {
+		xf86Msg(X_CONFIG, "Never handling special keys in DDX\n");
+		xf86Info.ddxSpecialKeys = SKNever;
+	    } else {
+		xf86Msg(X_WARNING,"Unknown HandleSpecialKeys option\n");
+	    }
+        }
+    }
+#ifdef RANDR
+    xf86Info.disableRandR = FALSE;
+    xf86Info.randRFrom = X_DEFAULT;
+    if (xf86GetOptValBool(FlagOptions, FLAG_RANDR, &value)) {
+	xf86Info.disableRandR = !value;
+	xf86Info.randRFrom = X_CONFIG;
+    }
+#endif
     i = -1;
     xf86GetOptValInteger(FlagOptions, FLAG_ESTIMATE_SIZES_AGGRESSIVELY, &i);
     if (i >= 0)
@@ -1007,7 +1065,7 @@ configInputKbd(IDevPtr inputp)
 #ifdef XKB
   if (!xf86IsPc98()) {
     xf86Info.xkbrules      = "xfree86";
-    xf86Info.xkbmodel      = "pc101";
+    xf86Info.xkbmodel      = "pc105";
     xf86Info.xkblayout     = "us";
     xf86Info.xkbvariant    = NULL;
     xf86Info.xkboptions    = NULL;
@@ -2167,6 +2225,7 @@ xf86HandleConfigFile(void)
     filename = xf86openConfigFile(searchpath, xf86ConfigFile, PROJECTROOT);
     if (filename) {
 	xf86MsgVerb(from, 0, "Using config file: \"%s\"\n", filename);
+	xf86ConfigFile = xnfstrdup(filename);
     } else {
 	xf86Msg(X_ERROR, "Unable to locate/open config file");
 	if (xf86ConfigFile)
diff --git a/xc/programs/Xserver/hw/xfree86/common/xf86Configure.c b/xc/programs/Xserver/hw/xfree86/common/xf86Configure.c
index 12087c2b5..687730ea5 100644
--- a/xc/programs/Xserver/hw/xfree86/common/xf86Configure.c
+++ b/xc/programs/Xserver/hw/xfree86/common/xf86Configure.c
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86Configure.c,v 3.75 2002/09/16 18:05:44 eich Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86Configure.c,v 3.78 2003/01/18 07:27:13 paulo Exp $ */
 /*
- * Copyright 2000 by Alan Hourihane, Sychdyn, North Wales.
+ * Copyright 2000-2002 by Alan Hourihane, Flint Mountain, North Wales.
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
@@ -79,6 +79,9 @@ static char *DFLT_MOUSE_DEV = "/dev/mouse";
 #elif defined(__QNXNTO__)
 static char *DFLT_MOUSE_PROTO = "OSMouse";
 static char *DFLT_MOUSE_DEV = "/dev/devi/mouse0";
+#elif defined(__FreeBSD__)
+static char *DFLT_MOUSE_DEV = "/dev/sysmouse";
+static char *DFLT_MOUSE_PROTO = "auto";
 #else
 static char *DFLT_MOUSE_DEV = "/dev/mouse";
 static char *DFLT_MOUSE_PROTO = "auto";
@@ -169,8 +172,14 @@ xf86AddBusDeviceToConfigure(const char *driver, BusType bus, void *busData, int
 				 NOVENDOR, NOSUBSYS,
 				 &VendorName, &CardName, NULL, NULL);
 
-	if (!VendorName || !CardName) {
-   	    FatalError("\nXFree86 has found a valid card configuration.\nUnfortunately the appropriate data has not been added to xf86PciInfo.h.\nPlease forward 'scanpci -v' output to XFree86 support team.");
+	if (!VendorName) {
+	    VendorName = xnfalloc(15);
+	    sprintf((char*)VendorName, "Unknown Vendor");
+	}
+
+	if (!CardName) {
+	    CardName = xnfalloc(14);
+	    sprintf((char*)CardName, "Unknown Board");
 	}
 
 	NewDevice.GDev.identifier =
@@ -621,6 +630,8 @@ configureModuleSection (void)
             /* Add only those font backends which are referenced by fontpath */
             /* 'strstr(dFP,"/dir")' is meant as 'dFP =~ m(/dir\W)' */
     	    if (defaultFontPath && (
+		(strcmp(*el, "xtt")  == 0 &&
+		 strstr(defaultFontPath, "/TrueType")) ||
     	        (strcmp(*el, "type1")  == 0 &&
 		 strstr(defaultFontPath, "/Type1")) ||
     	        (strcmp(*el, "speedo") == 0 &&
diff --git a/xc/programs/Xserver/hw/xfree86/common/xf86Cursor.c b/xc/programs/Xserver/hw/xfree86/common/xf86Cursor.c
index 8dac07864..1a214c4ad 100644
--- a/xc/programs/Xserver/hw/xfree86/common/xf86Cursor.c
+++ b/xc/programs/Xserver/hw/xfree86/common/xf86Cursor.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86Cursor.c,v 3.34 2002/09/29 23:54:33 keithp Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86Cursor.c,v 3.35 2003/02/13 10:49:38 eich Exp $ */
 /* $XConsortium: xf86Cursor.c /main/10 1996/10/19 17:58:23 kaleb $ */
 
 #define NEED_EVENTS
@@ -731,3 +731,22 @@ xf86InitOrigins(void)
 	}
     }
 }
+
+void
+xf86ReconfigureLayout(void)
+{
+    int i;
+
+    for (i = 0; i < MAXSCREENS; i++) {
+	xf86ScreenLayoutPtr sl = &xf86ScreenLayout[i];
+	/* we don't have to zero these, xf86InitOrigins() takes care of that */
+	if (sl->left) xfree(sl->left);
+	if (sl->right) xfree(sl->right);
+	if (sl->up) xfree(sl->up);
+	if (sl->down) xfree(sl->down);
+    }
+
+    xf86InitOrigins();
+}
+
+	
diff --git a/xc/programs/Xserver/hw/xfree86/common/xf86DGA.c b/xc/programs/Xserver/hw/xfree86/common/xf86DGA.c
index 60bfbc04a..1ad8b42ff 100644
--- a/xc/programs/Xserver/hw/xfree86/common/xf86DGA.c
+++ b/xc/programs/Xserver/hw/xfree86/common/xf86DGA.c
@@ -3,7 +3,7 @@
 
    Written by Mark Vojkovich
 */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86DGA.c,v 1.44 2002/09/16 18:05:45 eich Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86DGA.c,v 1.46 2002/12/03 18:17:40 tsi Exp $ */
 
 #include "xf86.h"
 #include "xf86str.h"
@@ -13,7 +13,6 @@
 #include "colormapst.h"
 #include "pixmapstr.h"
 #include "inputstr.h"
-#include "XIproto.h"
 #include "globals.h"
 #include "servermd.h"
 #include "micmap.h"
@@ -28,6 +27,7 @@ static int DGAScreenIndex = -1;
 static Bool DGACloseScreen(int i, ScreenPtr pScreen);
 static void DGADestroyColormap(ColormapPtr pmap);
 static void DGAInstallColormap(ColormapPtr pmap);
+static void DGAUninstallColormap(ColormapPtr pmap);
 
 static void
 DGACopyModeInfo(
@@ -59,6 +59,7 @@ typedef struct {
    CloseScreenProcPtr	CloseScreen;
    DestroyColormapProcPtr DestroyColormap;
    InstallColormapProcPtr InstallColormap;
+   UninstallColormapProcPtr UninstallColormap;
    DGADevicePtr		current;
    DGAFunctionPtr	funcs;
    int			input;
@@ -129,6 +130,8 @@ DGAInit(
     pScreen->DestroyColormap = DGADestroyColormap;
     pScreenPriv->InstallColormap = pScreen->InstallColormap;
     pScreen->InstallColormap = DGAInstallColormap;
+    pScreenPriv->UninstallColormap = pScreen->UninstallColormap;
+    pScreen->UninstallColormap = DGAUninstallColormap;
 
     /*
      * This is now set in InitOutput().
@@ -180,6 +183,7 @@ DGACloseScreen(int i, ScreenPtr pScreen)
    pScreen->CloseScreen = pScreenPriv->CloseScreen;
    pScreen->DestroyColormap = pScreenPriv->DestroyColormap;
    pScreen->InstallColormap = pScreenPriv->InstallColormap;
+   pScreen->UninstallColormap = pScreenPriv->UninstallColormap;
 
    /* DGAShutdown() should have ensured that no DGA
 	screen were active by here */
@@ -237,6 +241,23 @@ DGAInstallColormap(ColormapPtr pmap)
     pScreen->InstallColormap = DGAInstallColormap;
 }
 
+static void 
+DGAUninstallColormap(ColormapPtr pmap)
+{
+    ScreenPtr pScreen = pmap->pScreen;
+    DGAScreenPtr pScreenPriv = DGA_GET_SCREEN_PRIV(pScreen);
+
+    if(pScreenPriv->current && pScreenPriv->dgaColormap) {
+	if (pmap == pScreenPriv->dgaColormap) {
+	    pScreenPriv->dgaColormap = NULL;
+	}
+    }
+
+    pScreen->UninstallColormap = pScreenPriv->UninstallColormap;
+    (*pScreen->UninstallColormap)(pmap);
+    pScreen->UninstallColormap = DGAUninstallColormap;
+}
+
 int
 xf86SetDGAMode(
    int index,
diff --git a/xc/programs/Xserver/hw/xfree86/common/xf86DPMS.c b/xc/programs/Xserver/hw/xfree86/common/xf86DPMS.c
index 5ef99b23b..0de054ff3 100644
--- a/xc/programs/Xserver/hw/xfree86/common/xf86DPMS.c
+++ b/xc/programs/Xserver/hw/xfree86/common/xf86DPMS.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86DPMS.c,v 1.7 2001/10/28 03:33:18 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86DPMS.c,v 1.8 2003/02/13 02:41:09 dawes Exp $ */
 
 /*
  * Copyright (c) 1997-1998 by The XFree86 Project, Inc.
@@ -79,7 +79,13 @@ xf86DPMSInit(ScreenPtr pScreen, DPMSSetProcPtr set, int flags)
 static Bool
 DPMSClose(int i, ScreenPtr pScreen)
 {
-    DPMSPtr pDPMS = (DPMSPtr)pScreen->devPrivates[DPMSIndex].ptr;
+    DPMSPtr pDPMS;
+
+    /* This shouldn't happen */
+    if (DPMSIndex < 0)
+	return FALSE;
+
+    pDPMS = (DPMSPtr)pScreen->devPrivates[DPMSIndex].ptr;
 
     /* This shouldn't happen */
     if (!pDPMS)
@@ -88,7 +94,7 @@ DPMSClose(int i, ScreenPtr pScreen)
     pScreen->CloseScreen = pDPMS->CloseScreen;
 
     xfree((pointer)pDPMS);
-    pDPMS = NULL;
+    pScreen->devPrivates[DPMSIndex].ptr = NULL;
     if (--DPMSCount == 0)
 	DPMSIndex = -1;
     return pScreen->CloseScreen(i, pScreen);
diff --git a/xc/programs/Xserver/hw/xfree86/common/xf86DefModes.c b/xc/programs/Xserver/hw/xfree86/common/xf86DefModes.c
index b78b1f228..abef13110 100644
--- a/xc/programs/Xserver/hw/xfree86/common/xf86DefModes.c
+++ b/xc/programs/Xserver/hw/xfree86/common/xf86DefModes.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86DefModes.c,v 1.8 2002/06/05 19:43:04 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86DefModes.c,v 1.9 2002/11/11 04:24:40 dawes Exp $ */
 
 /* THIS FILE IS AUTOMATICALLY GENERATED -- DO NOT EDIT -- LOOK at
  * modeline2c.pl */
@@ -137,5 +137,17 @@ DisplayModeRec xf86DefaultModes [] = {
 /* 1600x1024 @ 60Hz (SGI 1600SW) hsync: 64.0kHz */
 	{MODEPREFIX("1600x1024"),106910, 1600,1620,1640,1670,0, 1024,1027,1030,1067,0, V_NHSYNC | V_NVSYNC, MODESUFFIX},
 	{MODEPREFIX("800x512"),53455, 800,810,820,835,0, 512,513,515,533,0, V_NHSYNC | V_NVSYNC | V_DBLSCAN, MODESUFFIX},
+/* 1920x1440 @ 85Hz (VESA GTF) hsync: 128.5kHz */
+	{MODEPREFIX("1920x1440"),341350, 1920,2072,2288,2656,0, 1440,1441,1444,1512,0, V_NHSYNC | V_PVSYNC, MODESUFFIX},
+	{MODEPREFIX("960x720"),170675, 960,1036,1144,1328,0, 720,720,722,756,0, V_NHSYNC | V_PVSYNC | V_DBLSCAN, MODESUFFIX},
+/* 2048x1536 @ 60Hz (VESA GTF) hsync: 95.3kHz */
+	{MODEPREFIX("2048x1536"),266950, 2048,2200,2424,2800,0, 1536,1537,1540,1589,0, V_NHSYNC | V_PVSYNC, MODESUFFIX},
+	{MODEPREFIX("1024x768"),133475, 1024,1100,1212,1400,0, 768,768,770,794,0, V_NHSYNC | V_PVSYNC | V_DBLSCAN, MODESUFFIX},
+/* 2048x1536 @ 75Hz (VESA GTF) hsync: 120.2kHz */
+	{MODEPREFIX("2048x1536"),340480, 2048,2216,2440,2832,0, 1536,1537,1540,1603,0, V_NHSYNC | V_PVSYNC, MODESUFFIX},
+	{MODEPREFIX("1024x768"),170240, 1024,1108,1220,1416,0, 768,768,770,801,0, V_NHSYNC | V_PVSYNC | V_DBLSCAN, MODESUFFIX},
+/* 2048x1536 @ 85Hz (VESA GTF) hsync: 137.0kHz */
+	{MODEPREFIX("2048x1536"),388040, 2048,2216,2440,2832,0, 1536,1537,1540,1612,0, V_NHSYNC | V_PVSYNC, MODESUFFIX},
+	{MODEPREFIX("1024x768"),194020, 1024,1108,1220,1416,0, 768,768,770,806,0, V_NHSYNC | V_PVSYNC | V_DBLSCAN, MODESUFFIX},
 	{MODEPREFIX(NULL),0,0,0,0,0,0,0,0,0,0,0,0,MODESUFFIX}
 };
diff --git a/xc/programs/Xserver/hw/xfree86/common/xf86Events.c b/xc/programs/Xserver/hw/xfree86/common/xf86Events.c
index 7be7ce8ca..4d0efbcb9 100644
--- a/xc/programs/Xserver/hw/xfree86/common/xf86Events.c
+++ b/xc/programs/Xserver/hw/xfree86/common/xf86Events.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86Events.c,v 3.133 2002/10/11 01:40:30 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86Events.c,v 3.146 2003/02/20 04:20:52 dawes Exp $ */
 /*
  * Copyright 1990,91 by Thomas Roell, Dinkelscherben, Germany.
  *
@@ -46,11 +46,12 @@
 #ifdef XINPUT
 #include "XI.h"
 #include "XIproto.h"
-#include "xf86Xinput.h"
 #else
 #include "inputstr.h"
 #endif
+#include "xf86Xinput.h"
 
+#include "mi.h"
 #include "mipointer.h"
 
 #ifdef XF86BIGFONT
@@ -103,13 +104,13 @@ extern void  XTestStealMotionData();
 #endif
 
 /*
- * The first of many hack's to get VT switching to work under
+ * The first of many hacks to get VT switching to work under
  * Solaris 2.1 for x86. The basic problem is that Solaris is supposed
  * to be SVR4. It is for the most part, except where the video interface
  * is concerned.  These hacks work around those problems.
- * See the comments for Linux, and SCO. 
+ * See the comments for Linux, and SCO.
  *
- * This is a toggleling variable:
+ * This is a toggling variable:
  *  FALSE = No VT switching keys have been pressed last time around
  *  TRUE  = Possible VT switch Pending
  * (DWH - 12/2/93)
@@ -253,6 +254,103 @@ xf86GrabServerCallback(CallbackListPtr *callbacks, pointer data, pointer args)
 }
 
 /*
+ * Handle keyboard events that cause some kind of "action"
+ * (i.e., server termination, video mode changes, VT switches, etc.)
+ */
+void
+xf86ProcessActionEvent(ActionEvent action, void *arg)
+{
+#ifdef DEBUG
+    ErrorF("ProcessActionEvent(%d,%x)\n", (int) action, arg);
+#endif
+    switch (action) {
+    case ACTION_TERMINATE:
+	if (!xf86Info.dontZap) {
+#ifdef XFreeXDGA
+	    DGAShutdown();
+#endif
+	    GiveUp(0);
+	}
+	break;
+    case ACTION_NEXT_MODE:
+	if (!xf86Info.dontZoom)
+	    xf86ZoomViewport(xf86Info.currentScreen,  1);
+	break;
+    case ACTION_PREV_MODE:
+	if (!xf86Info.dontZoom)
+	    xf86ZoomViewport(xf86Info.currentScreen, -1);
+	break;
+    case ACTION_DISABLEGRAB:
+	if (!xf86Info.grabInfo.disabled && xf86Info.grabInfo.allowDeactivate) {
+	  if (inputInfo.pointer && inputInfo.pointer->grab != NULL &&
+	      inputInfo.pointer->DeactivateGrab)
+	    inputInfo.pointer->DeactivateGrab(inputInfo.pointer);
+	  if (inputInfo.keyboard && inputInfo.keyboard->grab != NULL &&
+	      inputInfo.keyboard->DeactivateGrab)
+	    inputInfo.keyboard->DeactivateGrab(inputInfo.keyboard);
+	}
+	break;
+    case ACTION_CLOSECLIENT:
+	if (!xf86Info.grabInfo.disabled && xf86Info.grabInfo.allowClosedown) {
+	  ClientPtr pointer, keyboard, server;
+
+	  pointer = keyboard = server = NULL;
+	  if (inputInfo.pointer && inputInfo.pointer->grab != NULL)
+	    pointer = clients[CLIENT_ID(inputInfo.pointer->grab->resource)];
+	  if (inputInfo.keyboard && inputInfo.keyboard->grab != NULL) {
+	    keyboard = clients[CLIENT_ID(inputInfo.keyboard->grab->resource)];
+	    if (keyboard == pointer)
+	      keyboard = NULL;
+	  }
+	  if ((xf86Info.grabInfo.server.grabstate == SERVER_GRABBED) &&
+	      (((server = xf86Info.grabInfo.server.client) == pointer) ||
+	       (server == keyboard)))
+	      server = NULL;
+
+	  if (pointer)
+	    CloseDownClient(pointer);
+	  if (keyboard)
+	    CloseDownClient(keyboard);
+	  if (server)
+	    CloseDownClient(server);
+	}
+	break;
+#if !defined(__SOL8__) && (!defined(sun) || defined(i386))
+    case ACTION_SWITCHSCREEN:
+	if (VTSwitchEnabled && !xf86Info.dontVTSwitch && arg) {
+	    int vtno = *((int *) arg);
+#if defined(QNX4)
+	    xf86Info.vtRequestsPending = vtno;
+#else
+	    if (ioctl(xf86Info.consoleFd, VT_ACTIVATE, vtno) < 0)
+		ErrorF("Failed to switch consoles (%s)\n", strerror(errno));
+#endif
+	}
+	break;
+    case ACTION_SWITCHSCREEN_NEXT:
+	if (VTSwitchEnabled && !xf86Info.dontVTSwitch) {
+	    if (ioctl(xf86Info.consoleFd, VT_ACTIVATE, xf86Info.vtno + 1) < 0)
+#if defined(SCO) || (defined(sun) && defined (i386) && defined (SVR4))
+		if (ioctl(xf86Info.consoleFd, VT_ACTIVATE, 0) < 0)
+#else
+		if (ioctl(xf86Info.consoleFd, VT_ACTIVATE, 1) < 0)
+#endif
+		    ErrorF("Failed to switch consoles (%s)\n", strerror(errno));
+	}
+	break;
+    case ACTION_SWITCHSCREEN_PREV:
+	if (VTSwitchEnabled && !xf86Info.dontVTSwitch) {
+	    if (ioctl(xf86Info.consoleFd, VT_ACTIVATE, xf86Info.vtno - 1) < 0)
+		ErrorF("Failed to switch consoles (%s)\n", strerror(errno));
+	}
+	break;
+#endif
+    default:
+	break;
+    }
+}
+
+/*
  * xf86PostKbdEvent --
  *	Translate the raw hardware KbdEvent into an XEvent, and tell DIX
  *	about it. Scancode preprocessing and so on is done ...
@@ -506,77 +604,42 @@ special:
   }
 #endif /* defined (__sparc__) */
 
-  if ((ModifierDown(ControlMask | AltMask)) ||
-      (ModifierDown(ControlMask | AltLangMask)))
+#ifdef XKB
+  if ((xf86Info.ddxSpecialKeys == SKWhenNeeded &&
+       !xf86Info.ActionKeyBindingsSet) ||
+      noXkbExtension || xf86Info.ddxSpecialKeys == SKAlways) {
+#endif
+  if (!(ModifierDown(ShiftMask)) &&
+      ((ModifierDown(ControlMask | AltMask)) ||
+       (ModifierDown(ControlMask | AltLangMask))))
     {
-      
       switch (specialkey) {
 	
       case KEY_BackSpace:
-	if (!xf86Info.dontZap) {
-#ifdef XFreeXDGA
-	 DGAShutdown();
-#endif
-	 GiveUp(0);
-        }
+	xf86ProcessActionEvent(ACTION_TERMINATE, NULL);
 	break;
 
       /*
        * Check grabs
        */
       case KEY_KP_Divide:
-	if (!xf86Info.grabInfo.disabled && xf86Info.grabInfo.allowDeactivate) {
-	  if (inputInfo.pointer && inputInfo.pointer->grab != NULL &&
-	      inputInfo.pointer->DeactivateGrab)
-	    inputInfo.pointer->DeactivateGrab(inputInfo.pointer);
-	  if (inputInfo.keyboard && inputInfo.keyboard->grab != NULL &&
-	      inputInfo.keyboard->DeactivateGrab)
-	    inputInfo.keyboard->DeactivateGrab(inputInfo.keyboard);
-	}
+	xf86ProcessActionEvent(ACTION_DISABLEGRAB, NULL);
 	break;
       case KEY_KP_Multiply:
-	if (!xf86Info.grabInfo.disabled && xf86Info.grabInfo.allowClosedown) {
-	  ClientPtr pointer, keyboard, server;
-
-	  pointer = keyboard = server = NULL;
-	  if (inputInfo.pointer && inputInfo.pointer->grab != NULL)
-	    pointer = clients[CLIENT_ID(inputInfo.pointer->grab->resource)];
-	  if (inputInfo.keyboard && inputInfo.keyboard->grab != NULL) {
-	    keyboard = clients[CLIENT_ID(inputInfo.keyboard->grab->resource)];
-	    if (keyboard == pointer)
-	      keyboard = NULL;
-	  }
-	  if ((xf86Info.grabInfo.server.grabstate == SERVER_GRABBED) &&
-	      (((server = xf86Info.grabInfo.server.client) == pointer) ||
-	       (server == keyboard)))
-	      server = NULL;
-
-	  if (pointer)
-	    CloseDownClient(pointer);
-	  if (keyboard)
-	    CloseDownClient(keyboard);
-	  if (server)
-	    CloseDownClient(server);
-	}
+	xf86ProcessActionEvent(ACTION_CLOSECLIENT, NULL);
 	break;
-	
-	/*
-	 * The idea here is to pass the scancode down to a list of
-	 * registered routines. There should be some standard conventions
-	 * for processing certain keys.
-	 */
+
+      /*
+       * Video mode switches
+       */
       case KEY_KP_Minus:   /* Keypad - */
-	if (!xf86Info.dontZoom) {
-	  if (down) xf86ZoomViewport(xf86Info.currentScreen, -1);
-	  return;
-	}
+	if (down) xf86ProcessActionEvent(ACTION_PREV_MODE, NULL);
+	if (!xf86Info.dontZoom) return;
 	break;
 	
       case KEY_KP_Plus:   /* Keypad + */
-	if (!xf86Info.dontZoom) {
-	  if (down) xf86ZoomViewport(xf86Info.currentScreen,  1);
-	  return;
-	}
+	if (down) xf86ProcessActionEvent(ACTION_NEXT_MODE, NULL);
+	if (!xf86Info.dontZoom) return;
 	break;
 
 	/* Under QNX4, we set the vtPending flag for VT switching and 
@@ -593,12 +656,14 @@ special:
       case KEY_7:
       case KEY_8:
       case KEY_9:
-		if (down){
-			xf86Info.vtRequestsPending = 
-				specialkey - KEY_1 + 1;
-			return;
-			}
-		break;
+	if (VTSwitchEnabled && !xf86Info.dontVTSwitch) {
+	  if (down) {
+	    int vtno = specialkey - KEY_1 + 1;
+	    xf86ProcessActionEvent(ACTION_SWITCHSCREEN, (void *) &vtno);
+	  }
+	  return;
+	}
+	break;
 #endif
 
 #if defined(linux) || (defined(CSRG_BASED) && (defined(SYSCONS_SUPPORT) || defined(PCVT_SUPPORT) || defined(WSCONS_SUPPORT))) || defined(SCO)
@@ -617,37 +682,23 @@ special:
       case KEY_F8:
       case KEY_F9:
       case KEY_F10:
-        if (VTSwitchEnabled && !xf86Info.vtSysreq
-#if (defined(CSRG_BASED) && (defined(SYSCONS_SUPPORT) || defined(PCVT_SUPPORT) || defined(WSCONS_SUPPORT)))
-	    && (xf86Info.consType == SYSCONS || xf86Info.consType == PCVT)
-#endif
-	    )
-        {
-	  if (down)
-#ifdef SCO325
-            ioctl(xf86Info.consoleFd, VT_ACTIVATE, specialkey - KEY_F1);
-#else
-            ioctl(xf86Info.consoleFd, VT_ACTIVATE, specialkey - KEY_F1 + 1);
-#endif
-          return;
-        }
-	break;
       case KEY_F11:
       case KEY_F12:
-        if (VTSwitchEnabled && !xf86Info.vtSysreq
+	if ((VTSwitchEnabled && !xf86Info.vtSysreq && !xf86Info.dontVTSwitch)
 #if (defined(CSRG_BASED) && (defined(SYSCONS_SUPPORT) || defined(PCVT_SUPPORT) || defined(WSCONS_SUPPORT)))
 	    && (xf86Info.consType == SYSCONS || xf86Info.consType == PCVT)
 #endif
-	    )
-        {
-	  if (down)
+	   ) {
+	    int vtno = specialkey - KEY_F1 + 1;
+	    if (specialkey == KEY_F11 || specialkey == KEY_F12)
+		vtno = specialkey - KEY_F11 + 11;
 #ifdef SCO325
-            ioctl(xf86Info.consoleFd, VT_ACTIVATE, specialkey - KEY_F11 + 10);
-#else
-            ioctl(xf86Info.consoleFd, VT_ACTIVATE, specialkey - KEY_F11 + 11);
+	    vtno--;
 #endif
-          return;
-        }
+	    if (down)
+		xf86ProcessActionEvent(ACTION_SWITCHSCREEN, (void *) &vtno);
+	    return;
+	}
 	break;
 #endif /* linux || BSD with VTs */
 
@@ -667,7 +718,7 @@ special:
      */
 
 #ifdef USE_VT_SYSREQ
-    if (VTSwitchEnabled && xf86Info.vtSysreq)
+    if (VTSwitchEnabled && xf86Info.vtSysreq && !xf86Info.dontVTSwitch)
     {
       switch (specialkey)
       {
@@ -679,7 +730,7 @@ special:
       case KEY_H: 
 	if (VTSysreqToggle && down)
         {
-          ioctl(xf86Info.consoleFd, VT_ACTIVATE, 0);
+	  xf86ProcessActionEvent(ACTION_SWITCHSCREEN, NULL);
           VTSysreqToggle = 0;
           return; 
         }
@@ -694,8 +745,7 @@ special:
       case KEY_N:
 	if (VTSysreqToggle && down)
 	{
-          if (ioctl(xf86Info.consoleFd, VT_ACTIVATE, xf86Info.vtno - 1 ) < 0)
-            ErrorF("Failed to switch consoles (%s)\n", strerror(errno));
+	  xf86ProcessActionEvent(ACTION_SWITCHSCREEN_NEXT, NULL);
           VTSysreqToggle = FALSE;
           return;
         }
@@ -704,9 +754,7 @@ special:
       case KEY_P:
 	if (VTSysreqToggle && down)
 	{
-          if (ioctl(xf86Info.consoleFd, VT_ACTIVATE, xf86Info.vtno + 1 ) < 0)
-            if (ioctl(xf86Info.consoleFd, VT_ACTIVATE, 0) < 0)
-              ErrorF("Failed to switch consoles (%s)\n", strerror(errno));
+	  xf86ProcessActionEvent(ACTION_SWITCHSCREEN_NEXT, NULL);
           VTSysreqToggle = FALSE;
           return;
         }
@@ -723,21 +771,13 @@ special:
       case KEY_F8:
       case KEY_F9:
       case KEY_F10:
-	if (VTSysreqToggle && down)
-	{
-          if (ioctl(xf86Info.consoleFd, VT_ACTIVATE, specialkey-KEY_F1 + 1) < 0)
-            ErrorF("Failed to switch consoles (%s)\n", strerror(errno));
-          VTSysreqToggle = FALSE;
-          return;
-        }
-	break;
-
       case KEY_F11:
       case KEY_F12:
 	if (VTSysreqToggle && down)
-	{
-          if (ioctl(xf86Info.consoleFd, VT_ACTIVATE, specialkey-KEY_F11 + 11) < 0)
-            ErrorF("Failed to switch consoles (%s)\n", strerror(errno));
+	{ int vtno = specialkey - KEY_F1 + 1;
+	  if (specialkey == KEY_F11 || specialkey == KEY_F12)
+	    vtno = specialkey - KEY_F11 + 11;
+	  xf86ProcessActionEvent(ACTION_SWITCHSCREEN, (void *) &vtno);
           VTSysreqToggle = FALSE;
           return;
         }
@@ -780,14 +820,26 @@ special:
      */
     if (specialkey == KEY_Print && ModifierDown(ControlMask)) {
       if (down)
-        if (ioctl(xf86Info.consoleFd, VT_ACTIVATE, xf86Info.vtno + 1) < 0)
-          if (ioctl(xf86Info.consoleFd, VT_ACTIVATE, 0) < 0)
-            ErrorF("Failed to switch consoles (%s)\n", strerror(errno));
+	xf86ProcessActionEvent(ACTION_SWITCHSCREEN_NEXT, NULL);
       return;
     }
 #endif /* SCO */
+#ifdef XKB
+    }
+#endif
 
   /*
+   * PC keyboards generate separate key codes for
+   * Alt+Print and Control+Pause but in the X keyboard model
+   * they need to get the same key code as the base key on the same
+   * physical keyboard key.
+   */
+  if (scanCode == KEY_SysReqest)
+    scanCode = KEY_Print;
+  else if (scanCode == KEY_Break)
+    scanCode = KEY_Pause;
+  
+  /*
    * Now map the scancodes to real X-keycodes ...
    */
   keycode = scanCode + MIN_KEYCODE;
@@ -953,51 +1005,17 @@ xf86CommonSpecialKey(int key, Bool down, int modifiers)
       switch (key) {
 	
       case KEY_BackSpace:
-	if (!xf86Info.dontZap) {
-#ifdef XFreeXDGA
-	 DGAShutdown();
-#endif
-	 GiveUp(0);
-        }
+	xf86ProcessActionEvent(ACTION_TERMINATE, NULL);
 	break;
 
       /*
        * Check grabs
        */
       case KEY_KP_Divide:
-	if (!xf86Info.grabInfo.disabled && xf86Info.grabInfo.allowDeactivate) {
-	  if (inputInfo.pointer && inputInfo.pointer->grab != NULL &&
-	      inputInfo.pointer->DeactivateGrab)
-	    inputInfo.pointer->DeactivateGrab(inputInfo.pointer);
-	  if (inputInfo.keyboard && inputInfo.keyboard->grab != NULL &&
-	      inputInfo.keyboard->DeactivateGrab)
-	    inputInfo.keyboard->DeactivateGrab(inputInfo.keyboard);
-	}
+	xf86ProcessActionEvent(ACTION_DISABLEGRAB, NULL);
 	break;
       case KEY_KP_Multiply:
-	if (!xf86Info.grabInfo.disabled && xf86Info.grabInfo.allowClosedown) {
-	  ClientPtr pointer, keyboard, server;
-
-	  pointer = keyboard = server = NULL;
-	  if (inputInfo.pointer && inputInfo.pointer->grab != NULL)
-	    pointer = clients[CLIENT_ID(inputInfo.pointer->grab->resource)];
-	  if (inputInfo.keyboard && inputInfo.keyboard->grab != NULL) {
-	    keyboard = clients[CLIENT_ID(inputInfo.keyboard->grab->resource)];
-	    if (keyboard == pointer)
-	      keyboard = NULL;
-	  }
-	  if ((xf86Info.grabInfo.server.grabstate == SERVER_GRABBED) &&
-	      (((server = xf86Info.grabInfo.server.client) == pointer) ||
-	       (server == keyboard)))
-	      server = NULL;
-
-	  if (pointer)
-	    CloseDownClient(pointer);
-	  if (keyboard)
-	    CloseDownClient(keyboard);
-	  if (server)
-	    CloseDownClient(server);
-	}
+	xf86ProcessActionEvent(ACTION_CLOSECLIENT, NULL);
 	break;
 	
 	/*
@@ -1006,17 +1024,13 @@ xf86CommonSpecialKey(int key, Bool down, int modifiers)
 	 * for processing certain keys.
 	 */
       case KEY_KP_Minus:   /* Keypad - */
-	if (!xf86Info.dontZoom) {
-	  if (down) xf86ZoomViewport(xf86Info.currentScreen, -1);
-	  return TRUE;
-	}
+	if (down) xf86ProcessActionEvent(ACTION_PREV_MODE, NULL);
+	if (!xf86Info.dontZoom) return TRUE;
 	break;
 	
       case KEY_KP_Plus:   /* Keypad + */
-	if (!xf86Info.dontZoom) {
-	  if (down) xf86ZoomViewport(xf86Info.currentScreen,  1);
-	  return TRUE;
-	}
+	if (down) xf86ProcessActionEvent(ACTION_NEXT_MODE, NULL);
+	if (!xf86Info.dontZoom) return TRUE;
 	break;
       }
   }
@@ -1197,7 +1211,7 @@ xf86SigMemDebug(int signo)
 static void
 xf86VTSwitch()
 {
-  int i;
+  int i, prevSIGIO;
   InputInfoPtr pInfo;
   IHPtr ih;
 
@@ -1255,6 +1269,7 @@ xf86VTSwitch()
 #ifdef DEBUG
       ErrorF("xf86VTSwitch: Leave failed\n");
 #endif
+      prevSIGIO = xf86BlockSIGIO();
       xf86AccessEnter();
       xf86EnterServerState(SETUP);
       for (i = 0; i < xf86NumScreens; i++) {
@@ -1278,8 +1293,10 @@ xf86VTSwitch()
 	pInfo = pInfo->next;
       }
 #endif /* !__UNIXOS2__ */
-    for (ih = InputHandlers; ih; ih = ih->next)
-      xf86EnableInputHandler(ih);
+      for (ih = InputHandlers; ih; ih = ih->next)
+        xf86EnableInputHandler(ih);
+
+      xf86UnblockSIGIO(prevSIGIO);
 
     } else {
 	  if (xf86OSPMClose)
@@ -1298,10 +1315,13 @@ xf86VTSwitch()
       xf86DisableIO();
     }
   } else {
+
 #ifdef DEBUG
     ErrorF("xf86VTSwitch: Entering\n");
 #endif
     if (!xf86VTSwitchTo()) return;
+
+    prevSIGIO = xf86BlockSIGIO();
     xf86OSPMClose = xf86OSPMOpen();
 
     xf86EnableIO();
@@ -1332,6 +1352,8 @@ xf86VTSwitch()
     
     for (ih = InputHandlers; ih; ih = ih->next)
       xf86EnableInputHandler(ih);
+
+    xf86UnblockSIGIO(prevSIGIO);
   }
 }
 
diff --git a/xc/programs/Xserver/hw/xfree86/common/xf86Globals.c b/xc/programs/Xserver/hw/xfree86/common/xf86Globals.c
index 47ec667d2..99c53fb0b 100644
--- a/xc/programs/Xserver/hw/xfree86/common/xf86Globals.c
+++ b/xc/programs/Xserver/hw/xfree86/common/xf86Globals.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86Globals.c,v 1.37 2002/09/16 18:05:45 eich Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86Globals.c,v 1.40 2003/02/20 04:05:14 dawes Exp $ */
 
 /*
  * Copyright (c) 1997 by The XFree86 Project, Inc.
@@ -89,6 +89,8 @@ xf86InfoRec xf86Info = {
 	FALSE,		/* modeSwitchLock */
 	FALSE,		/* composeLock */
 	FALSE,		/* vtSysreq */
+	SKWhenNeeded,	/* ddxSpecialKeys */
+	FALSE,		/* ActionKeyBindingsSet */
 #if defined(SVR4) && defined(i386)
 	FALSE,		/* panix106 */
 #endif
@@ -102,6 +104,7 @@ xf86InfoRec xf86Info = {
 	-1,		/* lastEventTime */
 	FALSE,		/* vtRequestsPending */
 	FALSE,		/* inputPending */
+	FALSE,		/* dontVTSwitch */
 	FALSE,		/* dontZap */
 	FALSE,		/* dontZoom */
 	FALSE,		/* notrapSignals */
@@ -140,7 +143,9 @@ xf86InfoRec xf86Info = {
 	TRUE,		/* pmFlag */
 	LogNone,	/* syncLog */
 	0,		/* estimateSizesAggressively */
-	FALSE           /* kbdCustomKeycodes */
+	FALSE,		/* kbdCustomKeycodes */
+	FALSE,		/* disableRandR */
+	X_DEFAULT	/* randRFrom */
 };
 const char *xf86ConfigFile = NULL;
 const char *xf86InputDeviceList = NULL;
diff --git a/xc/programs/Xserver/hw/xfree86/common/xf86Helper.c b/xc/programs/Xserver/hw/xfree86/common/xf86Helper.c
index 2f1b5ebf7..73050eab7 100644
--- a/xc/programs/Xserver/hw/xfree86/common/xf86Helper.c
+++ b/xc/programs/Xserver/hw/xfree86/common/xf86Helper.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86Helper.c,v 1.126 2002/09/29 23:54:33 keithp Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86Helper.c,v 1.128 2003/02/26 23:45:24 dawes Exp $ */
 
 /*
  * Copyright (c) 1997-1998 by The XFree86 Project, Inc.
@@ -1004,7 +1004,7 @@ xf86SetBlackWhitePixels(ScreenPtr pScreen)
  */
 
 static void
-xf86SetRootClip (ScreenPtr pScreen, BOOL enable)
+xf86SetRootClip (ScreenPtr pScreen, Bool enable)
 {
     WindowPtr	pWin = WindowTable[pScreen->myNum];
     WindowPtr	pChild;
@@ -2362,6 +2362,13 @@ xf86IsPc98()
 #endif
 }
 
+void
+xf86DisableRandR()
+{
+    xf86Info.disableRandR = TRUE;
+    xf86Info.randRFrom = X_PROBED;
+}
+
 CARD32
 xf86GetVersion()
 {
diff --git a/xc/programs/Xserver/hw/xfree86/common/xf86Init.c b/xc/programs/Xserver/hw/xfree86/common/xf86Init.c
index 1828229ba..7c65ce888 100644
--- a/xc/programs/Xserver/hw/xfree86/common/xf86Init.c
+++ b/xc/programs/Xserver/hw/xfree86/common/xf86Init.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86Init.c,v 3.192 2002/10/19 20:04:21 herrb Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86Init.c,v 3.198 2003/02/26 09:21:38 dawes Exp $ */
 
 /*
  * Copyright 1991-1999 by The XFree86 Project, Inc.
@@ -20,6 +20,7 @@
 #include "windowstr.h"
 #include "scrnintstr.h"
 #include "site.h"
+#include "mi.h"
 
 #include "compiler.h"
 
@@ -36,6 +37,8 @@
 #include "xf86Config.h"
 #include "xf86_OSlib.h"
 #include "xf86Version.h"
+#include "xf86Date.h"
+#include "xf86Build.h"
 #include "mipointer.h"
 #ifdef XINPUT
 #include "XI.h"
@@ -850,17 +853,21 @@ InitOutput(ScreenInfo *pScreenInfo, int argc, char **argv)
       xf86Screens[i]->pScreen->CreateWindow = xf86CreateRootWindow;
 
 #ifdef RENDER
+    if (PictureGetSubpixelOrder (xf86Screens[i]->pScreen) == SubPixelUnknown)
     {
 	xf86MonPtr DDC = (xf86MonPtr)(xf86Screens[i]->monitor->DDC); 
 	PictureSetSubpixelOrder (xf86Screens[i]->pScreen,
 				 DDC ?
 				 (DDC->features.input_type ?
 				  SubPixelHorizontalRGB : SubPixelNone) :
-				 SubPixelUnknown);;
+				 SubPixelUnknown);
     }
 #endif
 #ifdef RANDR
-    xf86RandRInit (screenInfo.screens[scr_index]);
+    if (!xf86Info.disableRandR)
+	xf86RandRInit (screenInfo.screens[scr_index]);
+    xf86Msg(xf86Info.randRFrom, "RandR %s\n",
+	    xf86Info.disableRandR ? "disabled" : "enabled");
 #endif
 #ifdef NOT_USED
       /*
@@ -1024,7 +1031,7 @@ InitInput(argc, argv)
 #ifdef XINPUT
   xf86eqInit ((DevicePtr)xf86Info.pKeyboard, (DevicePtr)xf86Info.pMouse);
 #else
-  mieqInit (xf86Info.pKeyboard, xf86Info.pMouse);
+  mieqInit ((DevicePtr)xf86Info.pKeyboard, (DevicePtr)xf86Info.pMouse);
 #endif
 }
 
@@ -1187,7 +1194,7 @@ OsVendorFatalError()
 	 "the full server output, not just the last messages.\n");
   if (xf86LogFile && xf86LogFileWasOpened)
     ErrorF("This can be found in the log file \"%s\".\n", xf86LogFile);
-  ErrorF("Please report problems to %s.\n",BUILDERADDR);
+  ErrorF("Please report problems to %s.\n", BUILDERADDR);
   ErrorF("\n");
 }
 
@@ -1632,7 +1639,7 @@ xf86PrintBanner()
     "way.  Bugs may be reported to XFree86@XFree86.Org and patches submitted\n"
     "to fixes@XFree86.Org.  Before reporting bugs in pre-release versions,\n"
     "please check the latest version in the XFree86 CVS repository\n"
-    "(http://www.XFree86.Org/cvs)\n");
+    "(http://www.XFree86.Org/cvs).\n");
 #endif
   ErrorF("\nXFree86 Version %d.%d.%d", XF86_VERSION_MAJOR, XF86_VERSION_MINOR,
 					XF86_VERSION_PATCH);
@@ -1648,17 +1655,29 @@ xf86PrintBanner()
 #ifdef XF86_CUSTOM_VERSION
   ErrorF(" (%s)", XF86_CUSTOM_VERSION);
 #endif
-  ErrorF(" / X Window System\n");
-  ErrorF("(protocol Version %d, revision %d, vendor release %d)\n",
-         X_PROTOCOL, X_PROTOCOL_REVISION, VENDOR_RELEASE );
-  ErrorF("Release Date: %s\n", XF86_DATE);
-  ErrorF("\tIf the server is older than 6-12 months, or if your card is\n"
-	 "\tnewer than the above date, look for a newer version before\n"
-	 "\treporting problems.  (See http://www.XFree86.Org/)\n");
+  ErrorF("\nRelease Date: %s\n", XF86_DATE);
+  ErrorF("X Protocol Version %d, Revision %d, %s\n",
+         X_PROTOCOL, X_PROTOCOL_REVISION, XORG_RELEASE );
   ErrorF("Build Operating System:%s%s\n", OSNAME, OSVENDOR);
+#ifdef BUILD_DATE
+  {
+    struct tm t;
+    char buf[100];
+
+    bzero(&t, sizeof(t));
+    bzero(buf, sizeof(buf));
+    t.tm_mday = BUILD_DATE % 100;
+    t.tm_mon = (BUILD_DATE / 100) % 100 - 1;
+    t.tm_year = BUILD_DATE / 10000 - 1900;
+    if (strftime(buf, sizeof(buf), "%d %B %Y", &t))
+       ErrorF("Build Date: %s\n", buf);
+  }
+#endif
 #if defined(BUILDERSTRING)
   ErrorF("%s \n",BUILDERSTRING);
 #endif
+  ErrorF("\tBefore reporting problems, check http://www.XFree86.Org/\n"
+	 "\tto make sure that you have the latest version.\n");
 #ifdef XFree86LOADER
   ErrorF("Module Loader present\n");
 #endif
diff --git a/xc/programs/Xserver/hw/xfree86/common/xf86Io.c b/xc/programs/Xserver/hw/xfree86/common/xf86Io.c
index a2a5652f3..06819bccf 100644
--- a/xc/programs/Xserver/hw/xfree86/common/xf86Io.c
+++ b/xc/programs/Xserver/hw/xfree86/common/xf86Io.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86Io.c,v 3.52 2002/10/11 13:32:07 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86Io.c,v 3.53 2003/01/15 03:29:05 dawes Exp $ */
 /*
  * Copyright 1990,91 by Thomas Roell, Dinkelscherben, Germany.
  *
@@ -328,7 +328,10 @@ xf86KbdProc (pKeyboard, what)
 			     (KbdCtrlProcPtr)xf86KbdCtrl);
 #ifdef XKB
     } else {
- 	XkbComponentNamesRec names;
+ 	XkbComponentNamesRec	names;
+	XkbDescPtr		desc;
+	Bool			foundTerminate = FALSE;
+	int			keyc;
 	if (XkbInitialMap) {
 	    if ((xf86Info.xkbkeymap = strchr(XkbInitialMap, '/')) != NULL)
 		xf86Info.xkbkeymap++;
@@ -364,6 +367,23 @@ xf86KbdProc (pKeyboard, what)
 				    modMap, 
 				    xf86KbdBell,
 				    (KbdCtrlProcPtr)xf86KbdCtrl);
+
+	/* Search keymap for Terminate action */
+	desc  = pKeyboard->key->xkbInfo->desc;
+	for (keyc = desc->min_key_code; keyc <= desc->max_key_code; keyc++) {
+	    int i;
+	    for (i = 1; i <= XkbKeyNumActions(desc, keyc); i++) {
+		if (XkbKeyAction(desc, keyc, i)
+		  && XkbKeyAction(desc, keyc, i)->type == XkbSA_Terminate) {
+		    foundTerminate = TRUE;
+		    goto searchdone;
+		}
+	    }
+  	}
+searchdone:
+	xf86Info.ActionKeyBindingsSet = foundTerminate;
+	if (!foundTerminate)
+	    xf86Msg(X_INFO, "Server_Terminate keybinding not found\n");
     }
 #endif
     
diff --git a/xc/programs/Xserver/hw/xfree86/common/xf86MiscExt.c b/xc/programs/Xserver/hw/xfree86/common/xf86MiscExt.c
index c5ae7a9c3..f04a0b8d8 100644
--- a/xc/programs/Xserver/hw/xfree86/common/xf86MiscExt.c
+++ b/xc/programs/Xserver/hw/xfree86/common/xf86MiscExt.c
@@ -1,7 +1,7 @@
 /*
  * Copyright (c) 1999 by The XFree86 Project, Inc.
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86MiscExt.c,v 1.10 2002/09/16 18:05:46 eich Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86MiscExt.c,v 1.11 2002/11/20 04:04:57 dawes Exp $ */
 
 /*
  * This file contains the Pointer/Keyboard functions needed by the 
@@ -595,5 +595,18 @@ MiscExtApply(pointer structure, MiscExtStructType mse_or_kbd)
     return MISC_RET_SUCCESS;
 }
 
+Bool
+MiscExtGetFilePaths(const char **configfile, const char **modulepath,
+		    const char **logfile)
+{
+    DEBUG_P("MiscExtGetFilePaths");
+
+    *configfile = xf86ConfigFile;
+    *modulepath = xf86ModulePath;
+    *logfile    = xf86LogFile;
+
+    return TRUE;
+}
+
 #endif /* XF86MISC */
 
diff --git a/xc/programs/Xserver/hw/xfree86/common/xf86Mode.c b/xc/programs/Xserver/hw/xfree86/common/xf86Mode.c
index 1a0913659..fd7eec7e8 100644
--- a/xc/programs/Xserver/hw/xfree86/common/xf86Mode.c
+++ b/xc/programs/Xserver/hw/xfree86/common/xf86Mode.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86Mode.c,v 1.58 2002/10/16 17:53:55 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86Mode.c,v 1.63 2003/01/22 21:44:09 tsi Exp $ */
 
 /*
  * Copyright (c) 1997,1998 by The XFree86 Project, Inc.
@@ -11,6 +11,7 @@
 
 #include "X.h"
 #include "os.h"
+#include "servermd.h"
 #include "mibank.h"
 #include "xf86.h"
 #include "xf86Priv.h"
@@ -363,7 +364,7 @@ xf86LookupMode(ScrnInfoPtr scrp, DisplayModePtr modep,
     Bool allowDiv2 = (strategy & LOOKUP_CLKDIV2) != 0;
     Bool haveBuiltin;
 
-    strategy &= ~LOOKUP_CLKDIV2;
+    strategy &= ~(LOOKUP_CLKDIV2 | LOOKUP_OPTIONAL_TOLERANCES);
 
     /* Some sanity checking */
     if (scrp == NULL || scrp->modePool == NULL ||
@@ -761,6 +762,55 @@ xf86CheckModeForMonitor(DisplayModePtr mode, MonPtr monitor)
 }
 
 /*
+ * xf86CheckModeSize
+ *
+ * An internal routine to check if a mode fits in video memory.  This tries to
+ * avoid overflows that would otherwise occur when video memory size is greater
+ * than 256MB.
+ */
+static Bool
+xf86CheckModeSize(ScrnInfoPtr scrp, int w, int x, int y)
+{
+    int bpp = scrp->fbFormat.bitsPerPixel,
+	pad = scrp->fbFormat.scanlinePad;
+    int lineWidth, lastWidth;
+
+    if (scrp->depth == 4)
+	pad *= 4;		/* 4 planes */
+
+    /* Sanity check */
+    if ((w < 0) || (x < 0) || (y <= 0))
+	return FALSE;
+
+    lineWidth = (((w * bpp) + pad - 1) / pad) * pad;
+    lastWidth = x * bpp;
+
+    /*
+     * At this point, we need to compare
+     *
+     *	(lineWidth * (y - 1)) + lastWidth
+     *
+     * against
+     *
+     *	scrp->videoRam * (1024 * 8)
+     *
+     * These are bit quantities.  To avoid overflows, do the comparison in
+     * terms of BITMAP_SCANLINE_PAD units.  This assumes BITMAP_SCANLINE_PAD
+     * is a power of 2.  We currently use 32, which limits us to a video
+     * memory size of 8GB.
+     */
+
+    lineWidth = (lineWidth + (BITMAP_SCANLINE_PAD - 1)) / BITMAP_SCANLINE_PAD;
+    lastWidth = (lastWidth + (BITMAP_SCANLINE_PAD - 1)) / BITMAP_SCANLINE_PAD;
+
+    if ((lineWidth * (y - 1) + lastWidth) >
+	(scrp->videoRam * ((1024 * 8) / BITMAP_SCANLINE_PAD)))
+	return FALSE;
+
+    return TRUE;
+}
+
+/*
  * xf86InitialCheckModeForDriver
  *
  * This function checks if a mode satisfies a driver's initial requirements:
@@ -817,8 +867,8 @@ xf86InitialCheckModeForDriver(ScrnInfoPtr scrp, DisplayModePtr mode,
 	mode->VSyncStart >= mode->VSyncEnd || mode->VSyncEnd >= mode->VTotal)
 	return MODE_V_ILLEGAL;
 
-    if (mode->HDisplay * mode->VDisplay * scrp->fbFormat.bitsPerPixel >
-        scrp->videoRam * (1024 * 8))
+    if (!xf86CheckModeSize(scrp, mode->HDisplay, mode->HDisplay,
+				 mode->VDisplay))
         return MODE_MEM;
 
     if (maxPitch > 0 && mode->HDisplay > maxPitch)
@@ -1135,9 +1185,7 @@ xf86ValidateModes(ScrnInfoPtr scrp, DisplayModePtr availModes,
     ModeStatus status;
     int linePitch = -1, virtX = 0, virtY = 0;
     int newLinePitch, newVirtX, newVirtY;
-    int pixelArea = scrp->videoRam * (1024 * 8);	/* in bits */
     int modeSize;					/* in pixels */
-    int bitsPerPixel, pixmapPad;
     Bool validateAllDefaultModes;
     Bool userModes = FALSE;
     int saveType;
@@ -1315,18 +1363,10 @@ xf86ValidateModes(ScrnInfoPtr scrp, DisplayModePtr availModes,
     else
 	BankFormat = xf86GetPixFormat(scrp, 1);	/* >not< scrp->depth! */
 
-    bitsPerPixel = scrp->fbFormat.bitsPerPixel;
-    pixmapPad = scrp->fbFormat.scanlinePad;
-    if (scrp->depth == 4)
-	pixmapPad *= 4;		/* 4 planes */
-
     if (scrp->xInc <= 0)
         scrp->xInc = 8;		/* Suitable for VGA and others */
 
 #define _VIRTUALX(x) ((((x) + scrp->xInc - 1) / scrp->xInc) * scrp->xInc)
-#define _VIDEOSIZE(w, x, y) \
-    ((((((w) * bitsPerPixel) + pixmapPad - 1) / pixmapPad) * pixmapPad * \
-     ((y) - 1)) + ((x) * bitsPerPixel))
 
     /*
      * Determine maxPitch if it wasn't given explicitly.  Note linePitches
@@ -1386,7 +1426,7 @@ xf86ValidateModes(ScrnInfoPtr scrp, DisplayModePtr availModes,
 	    return -1;
 	}
 
-	if (_VIDEOSIZE(linePitch, virtualX, virtualY) > pixelArea) {
+	if (!xf86CheckModeSize(scrp, linePitch, virtualX, virtualY)) {
 	    xf86DrvMsg(scrp->scrnIndex, X_ERROR,
 		      "Virtual size (%dx%d) (pitch %d) exceeds video memory\n",
 		      virtualX, virtualY, linePitch);
@@ -1597,6 +1637,19 @@ xf86ValidateModes(ScrnInfoPtr scrp, DisplayModePtr availModes,
 	newVirtY = virtY;
 
 	/*
+	 * Don't let non-user defined modes increase the virtual size
+	 */
+	if (!(p->type & M_T_USERDEF)) {
+	    if (p->HDisplay > virtX) {
+		p->status = MODE_VIRTUAL_X;
+		goto lookupNext;
+	    }
+	    if (p->VDisplay > virtY) {
+		p->status = MODE_VIRTUAL_Y;
+		goto lookupNext;
+	    }
+	}
+	/*
 	 * Adjust virtual width and height if the mode is too large for the
 	 * current values and if they are not fixed.
 	 */
@@ -1642,7 +1695,7 @@ xf86ValidateModes(ScrnInfoPtr scrp, DisplayModePtr availModes,
 	     * Check that the pixel area required by the new virtual height
 	     * and line pitch isn't too large.
 	     */
-	    if (_VIDEOSIZE(newLinePitch, newVirtX, newVirtY) > pixelArea) {
+	    if (!xf86CheckModeSize(scrp, newLinePitch, newVirtX, newVirtY)) {
 		p->status = MODE_MEM_VIRT;
 		goto lookupNext;
 	    }
@@ -1673,7 +1726,6 @@ xf86ValidateModes(ScrnInfoPtr scrp, DisplayModePtr availModes,
     }
 
 #undef _VIRTUALX
-#undef _VIDEOSIZE
 
     /* Update the ScrnInfoRec parameters */
     
@@ -1855,6 +1907,9 @@ PrintModeline(int scrnIndex,DisplayModePtr mode)
     if (mode->Flags & V_NVSYNC) add(&flags, "-vsync");
     if (mode->Flags & V_PCSYNC) add(&flags, "+csync");
     if (mode->Flags & V_NCSYNC) add(&flags, "-csync");
+#if 0
+    if (mode->Flags & V_CLKDIV2) add(&flags, "vclk/2");
+#endif
     xf86DrvMsgVerb(scrnIndex, X_INFO, 3,
 		   "Modeline \"%s\"  %6.2f  %i %i %i %i  %i %i %i %i%s\n",
 		   mode->name, mode->Clock/1000., mode->HDisplay,
diff --git a/xc/programs/Xserver/hw/xfree86/common/xf86Module.h b/xc/programs/Xserver/hw/xfree86/common/xf86Module.h
index cf9870ec2..21b9aa590 100644
--- a/xc/programs/Xserver/hw/xfree86/common/xf86Module.h
+++ b/xc/programs/Xserver/hw/xfree86/common/xf86Module.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86Module.h,v 1.33 2002/07/30 18:36:18 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86Module.h,v 1.35 2002/12/22 02:03:25 dawes Exp $ */
 
 /*
  * Copyright (c) 1997-2001 by The XFree86 Project, Inc.
@@ -61,11 +61,11 @@ typedef enum {
  * changed.  The minor revision mask is 0x0000FFFF and the major revision
  * mask is 0xFFFF0000.
  */
-#define ABI_ANSIC_VERSION	SET_ABI_VERSION(0, 1)
+#define ABI_ANSIC_VERSION	SET_ABI_VERSION(0, 2)
 #define ABI_VIDEODRV_VERSION	SET_ABI_VERSION(0, 6)
-#define ABI_XINPUT_VERSION	SET_ABI_VERSION(0, 3)
-#define ABI_EXTENSION_VERSION	SET_ABI_VERSION(0, 1)
-#define ABI_FONT_VERSION	SET_ABI_VERSION(0, 3)
+#define ABI_XINPUT_VERSION	SET_ABI_VERSION(0, 4)
+#define ABI_EXTENSION_VERSION	SET_ABI_VERSION(0, 2)
+#define ABI_FONT_VERSION	SET_ABI_VERSION(0, 4)
 
 #define MODINFOSTRING1	0xef23fdc5
 #define MODINFOSTRING2	0x10dc023a
diff --git a/xc/programs/Xserver/hw/xfree86/common/xf86PciInfo.h b/xc/programs/Xserver/hw/xfree86/common/xf86PciInfo.h
index 621a3256c..14f86cf89 100644
--- a/xc/programs/Xserver/hw/xfree86/common/xf86PciInfo.h
+++ b/xc/programs/Xserver/hw/xfree86/common/xf86PciInfo.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86PciInfo.h,v 1.137 2002/10/18 21:40:38 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86PciInfo.h,v 1.144 2003/02/07 20:41:11 martin Exp $ */
 /*
  * Copyright 1995-2002 by The XFree86 Project, Inc.
  *
@@ -46,6 +46,7 @@
 #define PCI_VENDOR_MIRO			0x1031
 #define PCI_VENDOR_NEC			0x1033
 #define PCI_VENDOR_SIS			0x1039
+#define PCI_VENDOR_HP			0x103C
 #define PCI_VENDOR_SGS			0x104A
 #define PCI_VENDOR_TI			0x104C
 #define PCI_VENDOR_SONY			0x104D
@@ -88,6 +89,10 @@
 #define PCI_CHIP_QV1280			0x3033
 
 /* ATI */
+#define PCI_CHIP_R300_AD		0x4144
+#define PCI_CHIP_R300_AE		0x4145
+#define PCI_CHIP_R300_AF		0x4146
+#define PCI_CHIP_R300_AG		0x4147
 #define PCI_CHIP_MACH32			0x4158
 #define PCI_CHIP_R200_BB		0x4242
 #define PCI_CHIP_MACH64CT		0x4354
@@ -141,31 +146,70 @@
 #define PCI_CHIP_R300_NE		0x4E45
 #define PCI_CHIP_R300_NF		0x4E46
 #define PCI_CHIP_R300_NG		0x4E47
+#define PCI_CHIP_RAGE128PA		0x5041
+#define PCI_CHIP_RAGE128PB		0x5042
+#define PCI_CHIP_RAGE128PC		0x5043
 #define PCI_CHIP_RAGE128PD		0x5044
+#define PCI_CHIP_RAGE128PE		0x5045
 #define PCI_CHIP_RAGE128PF		0x5046
+#define PCI_CHIP_RAGE128PG		0x5047
+#define PCI_CHIP_RAGE128PH		0x5048
+#define PCI_CHIP_RAGE128PI		0x5049
+#define PCI_CHIP_RAGE128PJ		0x504A
+#define PCI_CHIP_RAGE128PK		0x504B
+#define PCI_CHIP_RAGE128PL		0x504C
+#define PCI_CHIP_RAGE128PM		0x504D
+#define PCI_CHIP_RAGE128PN		0x504E
+#define PCI_CHIP_RAGE128PO		0x504F
 #define PCI_CHIP_RAGE128PP		0x5050
+#define PCI_CHIP_RAGE128PQ		0x5051
 #define PCI_CHIP_RAGE128PR		0x5052
+#define PCI_CHIP_RAGE128PS		0x5053
+#define PCI_CHIP_RAGE128PT		0x5054
+#define PCI_CHIP_RAGE128PU		0x5055
+#define PCI_CHIP_RAGE128PV		0x5056
+#define PCI_CHIP_RAGE128PW		0x5057
+#define PCI_CHIP_RAGE128PX		0x5058
 #define PCI_CHIP_RADEON_QD		0x5144
 #define PCI_CHIP_RADEON_QE		0x5145
 #define PCI_CHIP_RADEON_QF		0x5146
 #define PCI_CHIP_RADEON_QG		0x5147
+#define PCI_CHIP_R200_QH		0x5148
+#define PCI_CHIP_R200_QI		0x5149
+#define PCI_CHIP_R200_QJ		0x514A
+#define PCI_CHIP_R200_QK		0x514B
 #define PCI_CHIP_R200_QL		0x514C
+#define PCI_CHIP_R200_QM		0x514D
 #define PCI_CHIP_R200_QN		0x514E
 #define PCI_CHIP_R200_QO		0x514F
 #define PCI_CHIP_RV200_QW		0x5157
 #define PCI_CHIP_RV200_QX		0x5158
-#define PCI_CHIP_RADEON_QY		0x5159
-#define PCI_CHIP_RADEON_QZ		0x515A
-#define PCI_CHIP_R200_Ql		0x516C
+#define PCI_CHIP_RV100_QY		0x5159
+#define PCI_CHIP_RV100_QZ		0x515A
+#define PCI_CHIP_R200_Qh		0x5168
+#define PCI_CHIP_R200_Qi		0x5169
+#define PCI_CHIP_R200_Qj		0x516A
+#define PCI_CHIP_R200_Qk		0x516B
+#define PCI_CHIP_R200_Ql		0x516C /* Undocumented in all ATI manuals */
 #define PCI_CHIP_RAGE128RE		0x5245
 #define PCI_CHIP_RAGE128RF		0x5246
 #define PCI_CHIP_RAGE128RG		0x5247
 #define PCI_CHIP_RAGE128RK		0x524B
 #define PCI_CHIP_RAGE128RL		0x524C
+#define PCI_CHIP_RAGE128SE		0x5345
+#define PCI_CHIP_RAGE128SF		0x5346
+#define PCI_CHIP_RAGE128SG		0x5347
+#define PCI_CHIP_RAGE128SH		0x5348
+#define PCI_CHIP_RAGE128SK		0x534B
+#define PCI_CHIP_RAGE128SL		0x534C
 #define PCI_CHIP_RAGE128SM		0x534D
+#define PCI_CHIP_RAGE128SN		0x534E
 #define PCI_CHIP_RAGE128TF		0x5446
 #define PCI_CHIP_RAGE128TL		0x544C
 #define PCI_CHIP_RAGE128TR		0x5452
+#define PCI_CHIP_RAGE128TS		0x5453
+#define PCI_CHIP_RAGE128TT		0x5454
+#define PCI_CHIP_RAGE128TU		0x5455
 #define PCI_CHIP_MACH64VT		0x5654
 #define PCI_CHIP_MACH64VU		0x5655
 #define PCI_CHIP_MACH64VV		0x5656
@@ -308,6 +352,11 @@
 #define PCI_CHIP_SIS650                 0x6325 
 #define PCI_CHIP_SIS730                 0x7300
 
+/* Hewlett-Packard */
+#define PCI_CHIP_ELROY			0x1054
+#define PCI_CHIP_ZX1_SBA		0x1229
+#define PCI_CHIP_ZX1_IOC		0x122A
+#define PCI_CHIP_ZX1_LBA		0x122E	/* a.k.a. Mercury */
 
 /* SGS */
 #define PCI_CHIP_STG2000		0x0008
@@ -394,6 +443,7 @@
 #define PCI_CHIP_IMSTT3D		0x9135
 
 /* VIA Technologies */
+#define PCI_CHIP_APOLLOVP1		0x0585
 #define PCI_CHIP_APOLLOPRO133X		0x0691
 
 /* Alliance Semiconductor */
@@ -489,6 +539,7 @@
 #define PCI_CHIP_I815_BRIDGE		0x1130
 #define PCI_CHIP_I815			0x1132
 #define PCI_CHIP_430HX_BRIDGE		0x1250
+#define PCI_CHIP_82801_P2P		0x244E
 #define PCI_CHIP_845_G_BRIDGE		0x2560
 #define PCI_CHIP_845_G			0x2562
 #define PCI_CHIP_I830_M_BRIDGE		0x3575
diff --git a/xc/programs/Xserver/hw/xfree86/common/xf86Priv.h b/xc/programs/Xserver/hw/xfree86/common/xf86Priv.h
index bd010699f..308e7a72c 100644
--- a/xc/programs/Xserver/hw/xfree86/common/xf86Priv.h
+++ b/xc/programs/Xserver/hw/xfree86/common/xf86Priv.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86Priv.h,v 3.79 2002/10/11 01:40:30 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86Priv.h,v 3.80 2002/12/12 18:29:10 eich Exp $ */
 
 /*
  * Copyright (c) 1997 by The XFree86 Project, Inc.
@@ -53,7 +53,6 @@ extern Bool xf86BestRefresh;
 extern Gamma xf86Gamma;
 extern char *xf86ServerName;
 extern Bool xf86ShowUnresolved;
-extern Bool xf86inSuspend;
 
 /* Other parameters */
 
diff --git a/xc/programs/Xserver/hw/xfree86/common/xf86Privstr.h b/xc/programs/Xserver/hw/xfree86/common/xf86Privstr.h
index 9efda701f..ff704b912 100644
--- a/xc/programs/Xserver/hw/xfree86/common/xf86Privstr.h
+++ b/xc/programs/Xserver/hw/xfree86/common/xf86Privstr.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86Privstr.h,v 1.34 2002/09/18 16:31:57 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86Privstr.h,v 1.37 2003/02/20 04:05:14 dawes Exp $ */
 
 /*
  * Copyright (c) 1997,1998 by The XFree86 Project, Inc.
@@ -32,6 +32,12 @@ typedef enum {
     LogSync
 } Log;
 
+typedef enum {
+    SKNever,
+    SKWhenNeeded,
+    SKAlways
+} SpecialKeysInDDX;
+
 /*
  * xf86InfoRec contains global parameters which the video drivers never
  * need to access.  Global parameters which the video drivers do need
@@ -63,6 +69,8 @@ typedef struct {
     Bool		modeSwitchLock;
     Bool		composeLock;
     Bool		vtSysreq;
+    SpecialKeysInDDX	ddxSpecialKeys;
+    Bool		ActionKeyBindingsSet;
 #if defined(SVR4) && defined(i386)
     Bool		panix106;
 #endif  /* SVR4 && i386 */
@@ -80,6 +88,7 @@ typedef struct {
     int			lastEventTime;
     Bool		vtRequestsPending;
     Bool		inputPending;
+    Bool		dontVTSwitch;
     Bool		dontZap;
     Bool		dontZoom;
     Bool		notrapSignals;	/* don't exit cleanly - die at fault */
@@ -131,6 +140,8 @@ typedef struct {
     Log			log;
     int			estimateSizesAggressively;
     Bool		kbdCustomKeycodes;
+    Bool		disableRandR;
+    MessageType		randRFrom;
     struct {
 	Bool		disabled;		/* enable/disable deactivating
 						 * grabs or closing the
diff --git a/xc/programs/Xserver/hw/xfree86/common/xf86RandR.c b/xc/programs/Xserver/hw/xfree86/common/xf86RandR.c
index 53ca91b42..c2dbcc170 100644
--- a/xc/programs/Xserver/hw/xfree86/common/xf86RandR.c
+++ b/xc/programs/Xserver/hw/xfree86/common/xf86RandR.c
@@ -1,5 +1,5 @@
 /*
- * $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86RandR.c,v 1.2 2002/10/14 18:01:39 keithp Exp $
+ * $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86RandR.c,v 1.4 2003/02/13 10:49:38 eich Exp $
  *
  * Copyright © 2002 Keith Packard, member of The XFree86 Project, Inc.
  *
@@ -32,6 +32,18 @@
 #include "mipointer.h"
 #include <randrstr.h>
 
+typedef struct _xf86RandRInfo {
+    CreateScreenResourcesProcPtr    CreateScreenResources;
+    CloseScreenProcPtr		    CloseScreen;
+    int				    virtualX;
+    int				    virtualY;
+} XF86RandRInfoRec, *XF86RandRInfoPtr;
+    
+static int	    xf86RandRIndex;
+static int	    xf86RandRGeneration;
+
+#define XF86RANDRINFO(p)    ((XF86RandRInfoPtr) (p)->devPrivates[xf86RandRIndex].ptr)
+
 static int
 xf86RandRModeRefresh (DisplayModePtr mode)
 {
@@ -46,40 +58,77 @@ xf86RandRGetInfo (ScreenPtr pScreen, Rotation *rotations)
 {
     RRScreenSizePtr	    pSize;
     ScrnInfoPtr		    scrp = XF86SCRNINFO(pScreen);
+    XF86RandRInfoPtr	    randrp = XF86RANDRINFO(pScreen);
     DisplayModePtr	    mode;
+    Bool		    reportVirtual = TRUE;
+    int			    refresh0 = 60;
     
     *rotations = RR_Rotate_0;
 
     for (mode = scrp->modes; ; mode = mode->next)
     {
 	int refresh = xf86RandRModeRefresh (mode);
+	if (mode == scrp->modes)
+	    refresh0 = refresh;
 	pSize = RRRegisterSize (pScreen,
 				mode->HDisplay, mode->VDisplay,
 				pScreen->mmWidth, pScreen->mmHeight);
 	if (!pSize)
 	    return FALSE;
+	if (mode->HDisplay == randrp->virtualX && 
+	    mode->VDisplay == randrp->virtualY)
+	    reportVirtual = FALSE;
 	RRRegisterRate (pScreen, pSize, refresh);
-	if (mode == scrp->currentMode)
+	if (mode == scrp->currentMode &&
+	    mode->HDisplay == pScreen->width && mode->VDisplay == pScreen->height)
 	    RRSetCurrentConfig (pScreen, RR_Rotate_0, refresh, pSize);
 	if (mode->next == scrp->modes)
 	    break;
     }
+    if (reportVirtual)
+    {
+	mode = scrp->modes;
+	pSize = RRRegisterSize (pScreen,
+				randrp->virtualX, randrp->virtualY,
+				pScreen->mmWidth * randrp->virtualX / mode->HDisplay,
+				pScreen->mmHeight * randrp->virtualY / mode->VDisplay);
+	if (!pSize)
+	    return FALSE;
+	RRRegisterRate (pScreen, pSize, refresh0);
+	if (pScreen->width == randrp->virtualX && 
+	    pScreen->height == randrp->virtualY)
+	{
+	    RRSetCurrentConfig (pScreen, RR_Rotate_0, refresh0, pSize);
+	}
+    }
     return TRUE;
 }
 
 static Bool
 xf86RandRSetMode (ScreenPtr	    pScreen,
-		  DisplayModePtr    mode)
+		  DisplayModePtr    mode,
+		  Bool		    useVirtual)
 {
-    ScrnInfoPtr	    scrp = XF86SCRNINFO(pScreen);
-    int		    oldWidth = pScreen->width;
-    int		    oldHeight = pScreen->height;
-    WindowPtr	    pRoot = WindowTable[pScreen->myNum];
+    ScrnInfoPtr		scrp = XF86SCRNINFO(pScreen);
+    XF86RandRInfoPtr	randrp = XF86RANDRINFO(pScreen);
+    int			oldWidth = pScreen->width;
+    int			oldHeight = pScreen->height;
+    WindowPtr		pRoot = WindowTable[pScreen->myNum];
     
     if (pRoot)
 	xf86EnableDisableFBAccess (pScreen->myNum, FALSE);
-    scrp->virtualX = pScreen->width = mode->HDisplay;
-    scrp->virtualY = pScreen->height = mode->VDisplay;
+    if (useVirtual)
+    {
+	scrp->virtualX = randrp->virtualX;
+	scrp->virtualY = randrp->virtualY;
+    }
+    else
+    {
+	scrp->virtualX = mode->HDisplay;
+	scrp->virtualY = mode->VDisplay;
+    }
+    pScreen->width = scrp->virtualX;
+    pScreen->height = scrp->virtualY;
     if (!xf86SwitchMode (pScreen, mode))
     {
 	scrp->virtualX = pScreen->width = oldWidth;
@@ -87,6 +136,11 @@ xf86RandRSetMode (ScreenPtr	    pScreen,
 	return FALSE;
     }
     /*
+     * Make sure the layout is correct
+     */
+    xf86ReconfigureLayout();
+
+    /*
      * Make sure the whole screen is visible
      */
     xf86SetViewport (pScreen, pScreen->width, pScreen->height);
@@ -103,8 +157,10 @@ xf86RandRSetConfig (ScreenPtr		pScreen,
 		    RRScreenSizePtr	pSize)
 {
     ScrnInfoPtr		    scrp = XF86SCRNINFO(pScreen);
+    XF86RandRInfoPtr	    randrp = XF86RANDRINFO(pScreen);
     DisplayModePtr	    mode;
     int			    px, py;
+    Bool		    useVirtual = FALSE;
 
     miPointerPosition (&px, &py);
     for (mode = scrp->modes; ; mode = mode->next)
@@ -114,9 +170,18 @@ xf86RandRSetConfig (ScreenPtr		pScreen,
 	    (rate == 0 || xf86RandRModeRefresh (mode) == rate))
 	    break;
 	if (mode->next == scrp->modes)
+	{
+	    if (pSize->width == randrp->virtualX &&
+		pSize->height == randrp->virtualY)
+	    {
+		mode = scrp->modes;
+		useVirtual = TRUE;
+		break;
+	    }
 	    return FALSE;
+	}
     }
-    if (!xf86RandRSetMode (pScreen, mode))
+    if (!xf86RandRSetMode (pScreen, mode, useVirtual))
 	return FALSE;
     /*
      * Move the cursor back where it belongs; SwitchMode repositions it
@@ -129,18 +194,6 @@ xf86RandRSetConfig (ScreenPtr		pScreen,
     return TRUE;
 }
 
-typedef struct _xf86RandRInfo {
-    CreateScreenResourcesProcPtr    CreateScreenResources;
-    CloseScreenProcPtr		    CloseScreen;
-    int				    virtualX;
-    int				    virtualY;
-} XF86RandRInfoRec, *XF86RandRInfoPtr;
-    
-static int	    xf86RandRIndex;
-static int	    xf86RandRGeneration;
-
-#define XF86RANDRINFO(p)    ((XF86RandRInfoPtr) (p)->devPrivates[xf86RandRIndex].ptr)
-
 /*
  * Wait until the screen is initialized before whacking the
  * sizes around; otherwise the screen pixmap will be allocated
@@ -159,7 +212,7 @@ xf86RandRCreateScreenResources (ScreenPtr pScreen)
     
     mode = scrp->currentMode;
     if (mode)
-	xf86RandRSetMode (pScreen, mode);
+	xf86RandRSetMode (pScreen, mode, TRUE);
     
     return TRUE;
 }
diff --git a/xc/programs/Xserver/hw/xfree86/common/xf86VidMode.c b/xc/programs/Xserver/hw/xfree86/common/xf86VidMode.c
index 647d3068b..f766f899e 100644
--- a/xc/programs/Xserver/hw/xfree86/common/xf86VidMode.c
+++ b/xc/programs/Xserver/hw/xfree86/common/xf86VidMode.c
@@ -1,7 +1,7 @@
 /*
  * Copyright (c) 1999 by The XFree86 Project, Inc.
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86VidMode.c,v 1.13 2002/05/02 15:20:19 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86VidMode.c,v 1.14 2003/01/28 20:52:28 tsi Exp $ */
 
 /*
  * This file contains the VidMode functions required by the extension.
@@ -329,12 +329,17 @@ VidModeGetViewPort(int scrnIndex, int *x, int *y)
 Bool
 VidModeSwitchMode(int scrnIndex, pointer mode)
 {
+    ScrnInfoPtr pScrn;
+
     DEBUG_P("VidModeSwitchMode");
 
     if (!VidModeAvailable(scrnIndex))
 	return FALSE;
 
-    return xf86SwitchMode(xf86Screens[scrnIndex]->pScreen, mode);
+    pScrn = xf86Screens[scrnIndex];
+    /* Force a mode switch */
+    pScrn->currentMode = NULL;
+    return xf86SwitchMode(pScrn->pScreen, mode);
 }
 
 Bool
diff --git a/xc/programs/Xserver/hw/xfree86/common/xf86pciBus.c b/xc/programs/Xserver/hw/xfree86/common/xf86pciBus.c
index 8988c716a..74f5e74b2 100644
--- a/xc/programs/Xserver/hw/xfree86/common/xf86pciBus.c
+++ b/xc/programs/Xserver/hw/xfree86/common/xf86pciBus.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86pciBus.c,v 3.64 2002/10/11 21:27:26 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86pciBus.c,v 3.68 2003/02/18 15:42:11 tsi Exp $ */
 /*
  * Copyright (c) 1997-2002 by The XFree86 Project, Inc.
  */
@@ -204,6 +204,7 @@ FindPCIVideoInfo(void)
 	    info->biosSize = pciGetBaseSize(pcrp->tag, 6, TRUE, NULL);
 	    info->thisCard = pcrp;
 	    info->validate = FALSE;
+#ifdef INCLUDE_XF86_NO_DOMAIN
 	    if ((PCISHAREDIOCLASSES(baseclass, subclass))
 		&& (pcrp->pci_command & PCI_CMD_IO_ENABLE) &&
 		(pcrp->pci_prog_if == 0)) {
@@ -237,6 +238,7 @@ FindPCIVideoInfo(void)
 		    j = pBus->primary;
 		}
 	    }
+#endif
 	    
 	    for (j = 0; j < 6; j++) {
 		info->memBase[j] = 0;
@@ -1527,10 +1529,10 @@ getValidBIOSBase(PCITAG tag, int num)
     if (biosSize > 24)
 	biosSize = 24;
 
-      switch ((romBaseSource)num) {
-      case ROM_BASE_PRESET:
+    switch ((romBaseSource)num) {
+    case ROM_BASE_PRESET:
 	return 0; /* This should not happen */
-      case ROM_BASE_BIOS:
+    case ROM_BASE_BIOS:
 	/* In some cases the BIOS base register contains the size mask */
 	if ((memType)(-1 << biosSize) == PCIGETROM(pvp->biosBase))
 	    return 0;
@@ -1545,85 +1547,87 @@ getValidBIOSBase(PCITAG tag, int num)
 	P_M_RANGE(range, TAG(pvp),pvp->biosBase,biosSize,ResExcMemBlock);
 	ret = pvp->biosBase;
 	break;
-      case ROM_BASE_MEM0:
-      case ROM_BASE_MEM1:
-      case ROM_BASE_MEM2:
-      case ROM_BASE_MEM3:
-      case ROM_BASE_MEM4:
-      case ROM_BASE_MEM5:
+    case ROM_BASE_MEM0:
+    case ROM_BASE_MEM1:
+    case ROM_BASE_MEM2:
+    case ROM_BASE_MEM3:
+    case ROM_BASE_MEM4:
+    case ROM_BASE_MEM5:
 	if (!pvp->memBase[num] || (pvp->size[num] < biosSize))
 	    return 0;
 	P_M_RANGE(range, TAG(pvp),pvp->memBase[num],biosSize,
 		  ResExcMemBlock);
 	ret = pvp->memBase[num];
 	break;
-      case ROM_BASE_FIND:
+    case ROM_BASE_FIND:
 	ret = 0;
 	break;
-      default:
+    default:
 	return 0; /* This should not happen */
-      }
+    }
 
-      /* Now find the ranges for validation */
-      avoid = xf86DupResList(pciAvoidRes);
-      pbp = xf86PciBus;
-      while (pbp) {
-	  if (pbp->secondary == pvp->bus) {
-	      if (pbp->preferred_pmem)
-		  tmp = xf86DupResList(pbp->preferred_pmem);
-	      else
-		  tmp = xf86DupResList(pbp->pmem);
-	      m = xf86JoinResLists(m,tmp);
-	      if (pbp->preferred_mem)
-	          tmp = xf86DupResList(pbp->preferred_mem);
-	      else
-	          tmp = xf86DupResList(pbp->mem);
-	      m = xf86JoinResLists(m,tmp);
-	      tmp = m;
-	      while (tmp) {
-		  tmp->block_end = MIN(tmp->block_end,PCI_MEM32_LENGTH_MAX);
-		  tmp = tmp->next;
-	      }
-	  } else if (pbp->primary == pvp->bus) {
-	      tmp = xf86DupResList(pbp->preferred_pmem);
-	      avoid = xf86JoinResLists(avoid, tmp);
-	      tmp = xf86DupResList(pbp->pmem);
-	      avoid = xf86JoinResLists(avoid, tmp);
-	      tmp = xf86DupResList(pbp->preferred_mem);
-	      avoid = xf86JoinResLists(avoid, tmp);
-	      tmp = xf86DupResList(pbp->mem);
-	      avoid = xf86JoinResLists(avoid, tmp);
-	  }	
-	  pbp = pbp->next;
-      }	
-      pciConvertListToHost(pvp->bus,pvp->device,pvp->func, avoid);
-      if (mem)
-	  pciConvertListToHost(pvp->bus,pvp->device,pvp->func, mem);
-
-      if (!ret) {
-	 /* Return a possible window */
-	 while (m) {
-	     range = xf86GetBlock(RANGE_TYPE(ResExcMemBlock, xf86GetPciDomain(tag)),
-				  PCI_SIZE(ResMem, TAG(pvp), 1 << biosSize),
-				  m->block_begin, m->block_end,
-				  PCI_SIZE(ResMem, TAG(pvp), alignment), 
-				  avoid);
-	     if (range.type != ResEnd) {
-		 ret =  M2B(TAG(pvp), range.rBase);
-		 break;
-	     }
-	     m = m->next;
-	 }
-      } else {
-	  if (!xf86IsSubsetOf(range, m) || 
-	      ChkConflict(&range, avoid, SETUP) 
-	      || (mem && ChkConflict(&range, mem, SETUP))) 
-	      ret = 0;
-      }
+    /* Now find the ranges for validation */
+    avoid = xf86DupResList(pciAvoidRes);
+    pbp = xf86PciBus;
+    while (pbp) {
+	if (pbp->secondary == pvp->bus) {
+	    if (pbp->preferred_pmem)
+		tmp = xf86DupResList(pbp->preferred_pmem);
+	    else
+		tmp = xf86DupResList(pbp->pmem);
+	    m = xf86JoinResLists(m,tmp);
+	    if (pbp->preferred_mem)
+		tmp = xf86DupResList(pbp->preferred_mem);
+	    else
+		tmp = xf86DupResList(pbp->mem);
+	    m = xf86JoinResLists(m,tmp);
+	    tmp = m;
+	    while (tmp) {
+		tmp->block_end = MIN(tmp->block_end,PCI_MEM32_LENGTH_MAX);
+		tmp = tmp->next;
+	    }
+	} else if ((pbp->primary == pvp->bus) &&
+		   (pbp->secondary >= 0) &&
+		   (pbp->primary != pbp->secondary)) {
+	    tmp = xf86DupResList(pbp->preferred_pmem);
+	    avoid = xf86JoinResLists(avoid, tmp);
+	    tmp = xf86DupResList(pbp->pmem);
+	    avoid = xf86JoinResLists(avoid, tmp);
+	    tmp = xf86DupResList(pbp->preferred_mem);
+	    avoid = xf86JoinResLists(avoid, tmp);
+	    tmp = xf86DupResList(pbp->mem);
+	    avoid = xf86JoinResLists(avoid, tmp);
+	}
+	pbp = pbp->next;
+    }	
+    pciConvertListToHost(pvp->bus,pvp->device,pvp->func, avoid);
+    if (mem)
+	pciConvertListToHost(pvp->bus,pvp->device,pvp->func, mem);
+
+    if (!ret) {
+	/* Return a possible window */
+	while (m) {
+	    range = xf86GetBlock(RANGE_TYPE(ResExcMemBlock, xf86GetPciDomain(tag)),
+				 PCI_SIZE(ResMem, TAG(pvp), 1 << biosSize),
+				 m->block_begin, m->block_end,
+				 PCI_SIZE(ResMem, TAG(pvp), alignment), 
+				 avoid);
+	    if (range.type != ResEnd) {
+		ret =  M2B(TAG(pvp), range.rBase);
+		break;
+	    }
+	    m = m->next;
+	}
+    } else {
+	if (!xf86IsSubsetOf(range, m) || 
+	    ChkConflict(&range, avoid, SETUP) 
+	    || (mem && ChkConflict(&range, mem, SETUP))) 
+	    ret = 0;
+    }
 
-      xf86FreeResList(avoid);
-      xf86FreeResList(m);
-      return ret;
+    xf86FreeResList(avoid);
+    xf86FreeResList(m);
+    return ret;
 }
 
 /*
@@ -1760,7 +1764,8 @@ xf86GetPciBridgeInfo(void)
 							   &primary,
 							   &secondary,
 							   &subordinate);
-		if (primary >= secondary) {
+
+		if (!pcrp->fakeDevice && (primary >= secondary)) {
 		    xf86MsgVerb(X_WARNING, 3, "Misconfigured PCI bridge"
 				" %x:%x:%x (%x,%x)\n",
 				pcrp->busnum, pcrp->devnum, pcrp->funcnum,
@@ -2162,6 +2167,7 @@ xf86GetPciBridgeInfo(void)
 		PciBus->primary = -1;
 		PciBus->secondary = i;
 		PciBus->subclass = PCI_SUBCLASS_BRIDGE_HOST;
+		PciBus->brcontrol = PCI_PCI_BRIDGE_VGA_EN;
 		PciBus->preferred_io =
 		    xf86ExtractTypeFromList(pciBusAccWindows,
 					    RANGE_TYPE(ResIo, domain));
@@ -2219,7 +2225,8 @@ alignBridgeRanges(PciBusPtr PciBusBase, PciBusPtr primary)
     PciBusPtr PciBus;
 
     for (PciBus = PciBusBase; PciBus; PciBus = PciBus->next) {
-	if ((PciBus != primary) && (PciBus->primary == primary->secondary)) {
+	if ((PciBus != primary) && (PciBus->primary != -1)
+	    && (PciBus->primary == primary->secondary)) {
 	    resPtr tmp;
 	    tmp = xf86FindIntersectOfLists(primary->preferred_io,
 					   PciBus->preferred_io);
@@ -2405,35 +2412,37 @@ ValidatePci(void)
 	    if (pbp->secondary == pvp->bus) {
 		if (pbp->preferred_pmem) {
 		    /* keep prefetchable separate */
-		    res_mp = xf86FindIntersectOfLists(pbp->preferred_pmem,
-						      ResRange);
+		    res_mp =
+			xf86FindIntersectOfLists(pbp->preferred_pmem, ResRange);
 		}
 		if (pbp->pmem) {
 		    res_mp = xf86FindIntersectOfLists(pbp->pmem, ResRange);
 		}
 		if (pbp->preferred_mem) {
-		    res_m_io = xf86FindIntersectOfLists(pbp->preferred_mem,
-							ResRange);
+		    res_m_io =
+			xf86FindIntersectOfLists(pbp->preferred_mem, ResRange);
 		}
 		if (pbp->mem) {
 		    res_m_io = xf86FindIntersectOfLists(pbp->mem, ResRange);
 		}
 		if (pbp->preferred_io) {
 		    res_m_io = xf86JoinResLists(res_m_io,
-			xf86FindIntersectOfLists(pbp->preferred_io,ResRange));
+			xf86FindIntersectOfLists(pbp->preferred_io, ResRange));
 		}
 		if (pbp->io) {
 		    res_m_io = xf86JoinResLists(res_m_io,
-			xf86FindIntersectOfLists(pbp->preferred_io,ResRange));
+			xf86FindIntersectOfLists(pbp->preferred_io, ResRange));
 		}
-	    } else if (pbp->primary == pvp->bus) {
+	    } else if ((pbp->primary == pvp->bus) &&
+		       (pbp->secondary >= 0) &&
+		       (pbp->primary != pbp->secondary)) {
 		tmp = xf86DupResList(pbp->preferred_pmem);
 		avoid = xf86JoinResLists(avoid, tmp);
 		tmp = xf86DupResList(pbp->preferred_mem);
 		avoid = xf86JoinResLists(avoid, tmp);
 		tmp = xf86DupResList(pbp->preferred_io);
 		avoid = xf86JoinResLists(avoid, tmp);
-	    }	
+	    }
 	    pbp = pbp->next;
 	}
 	if (res_m_io == NULL)
@@ -3435,6 +3444,19 @@ pciConvertListToHost(int bus, int dev, int func, resPtr list)
     }
 }
 
+static void
+updateAccessInfoStatusControlInfo(PCITAG tag, CARD32 ctrl)
+{
+    int i;
+
+    if (!xf86PciAccInfo)
+	return;
+    
+    for (i = 0; xf86PciAccInfo[i] != NULL; i++) {
+	if (xf86PciAccInfo[i]->arg.tag == tag)
+	    xf86PciAccInfo[i]->arg.ctrl = ctrl;
+    }
+}
 
 void
 pciConvertRange2Host(int entityIndex, resRange *pRange)
@@ -3460,9 +3482,12 @@ xf86EnablePciBusMaster(pciVideoPtr pPci, Bool enable)
 
     tag = pciTag(pPci->bus, pPci->device, pPci->func);
     temp = pciReadLong(tag, PCI_CMD_STAT_REG);
-    if (enable)
+    if (enable) {
+	updateAccessInfoStatusControlInfo(tag, temp | PCI_CMD_MASTER_ENABLE);
 	pciWriteLong(tag, PCI_CMD_STAT_REG, temp | PCI_CMD_MASTER_ENABLE);
-    else
+    } else {
+	updateAccessInfoStatusControlInfo(tag, temp & ~PCI_CMD_MASTER_ENABLE);
 	pciWriteLong(tag, PCI_CMD_STAT_REG, temp & ~PCI_CMD_MASTER_ENABLE);
+    }
 }
 #endif /* INCLUDE_DEPRECATED */
diff --git a/xc/programs/Xserver/hw/xfree86/common/xf86sbusBus.h b/xc/programs/Xserver/hw/xfree86/common/xf86sbusBus.h
index a0d28e405..0816c63a1 100644
--- a/xc/programs/Xserver/hw/xfree86/common/xf86sbusBus.h
+++ b/xc/programs/Xserver/hw/xfree86/common/xf86sbusBus.h
@@ -20,7 +20,7 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86sbusBus.h,v 3.4 2001/10/28 03:33:19 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86sbusBus.h,v 3.5 2002/12/10 02:42:35 tsi Exp $ */
 
 #ifndef _XF86_SBUSBUS_H
 #define _XF86_SBUSBUS_H
@@ -80,7 +80,7 @@ void xf86SbusHideOsHwCursor(sbusDevicePtr psdp);
 void xf86SbusSetOsHwCursorCmap(sbusDevicePtr psdp, int bg, int fg);
 Bool xf86SbusHandleColormaps(ScreenPtr pScreen, sbusDevicePtr psdp);
 
-int promRootNode;
+extern int promRootNode;
 
 int promGetSibling(int node);
 int promGetChild(int node);
diff --git a/xc/programs/Xserver/hw/xfree86/common/xf86str.h b/xc/programs/Xserver/hw/xfree86/common/xf86str.h
index 9c94e270c..2b6deed33 100644
--- a/xc/programs/Xserver/hw/xfree86/common/xf86str.h
+++ b/xc/programs/Xserver/hw/xfree86/common/xf86str.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86str.h,v 1.87 2002/09/29 23:54:34 keithp Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86str.h,v 1.90 2002/11/25 14:04:56 eich Exp $ */
 
 /*
  * Copyright (c) 1997-2000 by The XFree86 Project, Inc.
@@ -247,6 +247,15 @@ typedef struct _ModuleInfoRec {
  * function prototypes added to xf86.h.
  */
 
+/* Tolerate prior #include <linux/input.h> */
+#if defined(linux) && defined(_INPUT_H)
+#undef BUS_NONE
+#undef BUS_ISA
+#undef BUS_PCI
+#undef BUS_SBUS
+#undef BUS_last
+#endif
+
 typedef enum {
     BUS_NONE,
     BUS_ISA,
@@ -567,7 +576,11 @@ typedef struct _CurrAccRec {
 #define ResBus		0x010000
 #define ResOverlap	0x020000
 
-#define ResDomain	0xff000000ul
+#if defined(__alpha__) && defined(linux)
+# define ResDomain	0x1ff000000ul
+#else
+# define ResDomain	0xff000000ul
+#endif
 #define ResTypeMask	(ResPhysMask | ResDomain)	/* For conflict check */
 
 #define ResEnd		ResNone
@@ -608,7 +621,8 @@ typedef struct {
     memType b;
 } resRange, *resList;
 
-#define RANGE_TYPE(type, domain) (((domain) << 24) | ((type) & ~ResBus))
+#define RANGE_TYPE(type, domain) \
+               (((unsigned long)(domain) << 24) | ((type) & ~ResBus))
 #define RANGE(r,u,v,t) {\
                        (r).a = (u);\
                        (r).b = (v);\
@@ -1000,4 +1014,16 @@ typedef struct {
 #define MF_CLEAR_DTR       1
 #define MF_CLEAR_RTS       2
 
+/* Action Events */
+typedef enum {
+    ACTION_TERMINATE		= 0,	/* Terminate Server */
+    ACTION_NEXT_MODE		= 10,	/* Switch to next video mode */
+    ACTION_PREV_MODE,
+    ACTION_DISABLEGRAB		= 20,	/* Cancel server/pointer/kbd grabs */
+    ACTION_CLOSECLIENT,			/* Kill client holding grab */
+    ACTION_SWITCHSCREEN		= 100,	/* VT switch */
+    ACTION_SWITCHSCREEN_NEXT,
+    ACTION_SWITCHSCREEN_PREV
+} ActionEvent;
+
 #endif /* _XF86STR_H */
diff --git a/xc/programs/Xserver/hw/xfree86/common/xf86xv.c b/xc/programs/Xserver/hw/xfree86/common/xf86xv.c
index 0fb0659c4..c6a09121b 100644
--- a/xc/programs/Xserver/hw/xfree86/common/xf86xv.c
+++ b/xc/programs/Xserver/hw/xfree86/common/xf86xv.c
@@ -6,7 +6,7 @@
 
 */
 
-/* $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86xv.c,v 1.32 2001/08/22 22:13:43 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86xv.c,v 1.33 2002/11/09 01:18:11 keithp Exp $ */
 
 #include "misc.h"
 #include "xf86.h"
@@ -72,7 +72,6 @@ static int xf86XVQueryImageAttributes(ClientPtr, XvPortPtr, XvImagePtr,
 
 /* ScreenRec fields */
 
-static Bool xf86XVCreateWindow(WindowPtr pWin);
 static Bool xf86XVDestroyWindow(WindowPtr pWin);
 static void xf86XVWindowExposures(WindowPtr pWin, RegionPtr r1, RegionPtr r2);
 static void xf86XVClipNotify(WindowPtr pWin, int dx, int dy);
@@ -190,7 +189,7 @@ xf86XVScreenInit(
 	XF86XVGeneration = serverGeneration;
   }
 
-  if(!AllocateWindowPrivate(pScreen,XF86XVWindowIndex,sizeof(XF86XVWindowRec)))
+  if(!AllocateWindowPrivate(pScreen,XF86XVWindowIndex,0))
         return FALSE;
 
   if(Success != (*XvScreenInitProc)(pScreen)) return FALSE;
@@ -220,7 +219,6 @@ xf86XVScreenInit(
 
   ScreenPriv->videoGC = NULL;  /* for the helper */
 
-  ScreenPriv->CreateWindow = pScreen->CreateWindow;
   ScreenPriv->DestroyWindow = pScreen->DestroyWindow;
   ScreenPriv->WindowExposures = pScreen->WindowExposures;
   ScreenPriv->ClipNotify = pScreen->ClipNotify;
@@ -228,7 +226,6 @@ xf86XVScreenInit(
   ScreenPriv->LeaveVT = pScrn->LeaveVT;
   ScreenPriv->AdjustFrame = pScrn->AdjustFrame;
 
-  pScreen->CreateWindow = xf86XVCreateWindow;
   pScreen->DestroyWindow = xf86XVDestroyWindow;
   pScreen->WindowExposures = xf86XVWindowExposures;
   pScreen->ClipNotify = xf86XVClipNotify;
@@ -960,24 +957,6 @@ xf86XVRemovePortFromWindow(WindowPtr pWin, XvPortRecPrivatePtr portPriv)
 
 /****  ScreenRec fields ****/
 
-
-static Bool
-xf86XVCreateWindow(WindowPtr pWin)
-{
-  ScreenPtr pScreen = pWin->drawable.pScreen;
-  XF86XVScreenPtr ScreenPriv = GET_XF86XV_SCREEN(pScreen);
-  int ret;
-
-  pScreen->CreateWindow = ScreenPriv->CreateWindow;
-  ret = (*pScreen->CreateWindow)(pWin);
-  pScreen->CreateWindow = xf86XVCreateWindow;
-
-  if(ret) pWin->devPrivates[XF86XVWindowIndex].ptr = NULL;
-
-  return ret;
-}
-
-
 static Bool
 xf86XVDestroyWindow(WindowPtr pWin)
 {
@@ -1150,7 +1129,6 @@ xf86XVCloseScreen(int i, ScreenPtr pScreen)
      ScreenPriv->videoGC = NULL;
   }
 
-  pScreen->CreateWindow = ScreenPriv->CreateWindow;
   pScreen->DestroyWindow = ScreenPriv->DestroyWindow;
   pScreen->WindowExposures = ScreenPriv->WindowExposures;
   pScreen->ClipNotify = ScreenPriv->ClipNotify;
diff --git a/xc/programs/Xserver/hw/xfree86/common/xf86xv.h b/xc/programs/Xserver/hw/xfree86/common/xf86xv.h
index 98d36ea40..9fd6b4edf 100644
--- a/xc/programs/Xserver/hw/xfree86/common/xf86xv.h
+++ b/xc/programs/Xserver/hw/xfree86/common/xf86xv.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86xv.h,v 1.22 2001/06/16 21:57:42 mvojkovi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86xv.h,v 1.23 2002/11/09 01:18:33 keithp Exp $ */
 
 #ifndef _XF86XV_H_
 #define _XF86XV_H_
@@ -223,7 +223,6 @@ xf86XVClipVideoHelper(
 extern int XF86XvScreenIndex;
 
 typedef struct {
-   CreateWindowProcPtr		CreateWindow;
    DestroyWindowProcPtr		DestroyWindow;
    ClipNotifyProcPtr		ClipNotify;
    WindowExposuresProcPtr	WindowExposures;
diff --git a/xc/programs/Xserver/hw/xfree86/ddc/ddcPriv.h b/xc/programs/Xserver/hw/xfree86/ddc/ddcPriv.h
new file mode 100644
index 000000000..b5cb9b836
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/ddc/ddcPriv.h
@@ -0,0 +1,9 @@
+extern unsigned char *GetEDID_DDC1(
+    unsigned int *
+);
+
+extern int DDC_checksum(
+    unsigned char *,
+    int
+);
+
diff --git a/xc/programs/Xserver/hw/xfree86/ddc/edid.c b/xc/programs/Xserver/hw/xfree86/ddc/edid.c
index 7a878abb5..a61940cfa 100644
--- a/xc/programs/Xserver/hw/xfree86/ddc/edid.c
+++ b/xc/programs/Xserver/hw/xfree86/ddc/edid.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/ddc/edid.c,v 1.3 2000/11/03 18:46:08 eich Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/ddc/edid.c,v 1.4 2003/02/17 16:08:27 dawes Exp $ */
 
 /* edid.c:  retrieve EDID record from raw DDC1 data stream: data 
  * is contained in an array of unsigned int each unsigned int 
@@ -12,8 +12,8 @@
 #include "xf86_ansic.h"
 #include "xf86_OSproc.h"
 #include "xf86DDC.h"
+#include "ddcPriv.h"
 
-int checksum(unsigned char *, int);
 static int find_start(unsigned int *);
 static unsigned char * find_header(unsigned char *);
 static unsigned char * resort(unsigned char *);
@@ -44,12 +44,12 @@ GetEDID_DDC1(unsigned int *s_ptr)
 	d_pos++;
     }
     xfree(s_ptr);
-    if (d_block && checksum(d_block,EDID1_LEN)) return NULL;
+    if (d_block && DDC_checksum(d_block,EDID1_LEN)) return NULL;
     return (resort(d_block));
 }
 
 int
-checksum(unsigned char *block, int len)
+DDC_checksum(unsigned char *block, int len)
 {
     int i, result = 0;
     int not_null = 0;
diff --git a/xc/programs/Xserver/hw/xfree86/ddc/print_vdif.c b/xc/programs/Xserver/hw/xfree86/ddc/print_vdif.c
index 71d81bbb7..c65d1a0c9 100644
--- a/xc/programs/Xserver/hw/xfree86/ddc/print_vdif.c
+++ b/xc/programs/Xserver/hw/xfree86/ddc/print_vdif.c
@@ -1,7 +1,8 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/ddc/print_vdif.c,v 1.2 2000/04/14 12:16:04 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/ddc/print_vdif.c,v 1.3 2003/02/17 16:08:27 dawes Exp $ */
 
 #include "vdif.h"
 #include "misc.h"
+#include "xf86DDC.h"
 
 static void print_vdif(xf86VdifPtr l, char *s);
 static void print_timings(xf86VdifTimingPtr *pt);
diff --git a/xc/programs/Xserver/hw/xfree86/ddc/xf86DDC.c b/xc/programs/Xserver/hw/xfree86/ddc/xf86DDC.c
index 1c163b2bf..736fb741b 100644
--- a/xc/programs/Xserver/hw/xfree86/ddc/xf86DDC.c
+++ b/xc/programs/Xserver/hw/xfree86/ddc/xf86DDC.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/ddc/xf86DDC.c,v 1.22 2002/10/08 22:14:03 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/ddc/xf86DDC.c,v 1.23 2003/02/17 16:08:27 dawes Exp $ */
 
 /* xf86DDC.c 
  * 
@@ -9,6 +9,7 @@
 #include "xf86_ansic.h"
 #include "xf86_OSproc.h"
 #include "xf86DDC.h"
+#include "ddcPriv.h"
 
 #ifdef XFree86LOADER
 static const OptionInfoRec *DDCAvailableOptions(void *unused);
@@ -79,15 +80,6 @@ ddcSetup(pointer module, pointer opts, int *errmaj, int *errmin)
 
 #define RETRIES 4
 
-extern unsigned char *GetEDID_DDC1(
-    unsigned int *
-);
-
-extern int checksum(
-    unsigned char *,
-    int
-);
-
 static unsigned char *EDIDRead_DDC1(
     ScrnInfoPtr pScrn,
     void (*)(ScrnInfoPtr,xf86ddcSpeed), 
@@ -366,7 +358,7 @@ DDCRead_DDC2(int scrnIndex, I2CBusPtr pBus, int start, int len)
 					* (len));
     for (i=0; i<RETRIES; i++) {
 	if (xf86I2CWriteRead(dev, W_Buffer,w_bytes, R_Buffer,len)) {
-	    if (!checksum(R_Buffer,len)) { 
+	    if (!DDC_checksum(R_Buffer,len)) { 
 		xf86DestroyI2CDevRec(dev,TRUE);
 		return R_Buffer;
 	    }
diff --git a/xc/programs/Xserver/hw/xfree86/ddc/xf86DDC.h b/xc/programs/Xserver/hw/xfree86/ddc/xf86DDC.h
index 53663955f..b4252ef6b 100644
--- a/xc/programs/Xserver/hw/xfree86/ddc/xf86DDC.h
+++ b/xc/programs/Xserver/hw/xfree86/ddc/xf86DDC.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/ddc/xf86DDC.h,v 1.10 2000/06/07 22:03:09 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/ddc/xf86DDC.h,v 1.11 2003/02/17 16:08:27 dawes Exp $ */
 
 /* xf86DDC.h
  *
@@ -48,8 +48,12 @@ extern xf86vdifPtr xf86InterpretVdif(
 );
 
 extern Bool xf86SetDDCproperties(
-     ScrnInfoPtr pScreen,
-     xf86MonPtr DDC
+    ScrnInfoPtr pScreen,
+    xf86MonPtr DDC
+);
+
+extern void xf86print_vdif(
+    xf86vdifPtr v
 );
 
 #endif
diff --git a/xc/programs/Xserver/hw/xfree86/doc/BUILD b/xc/programs/Xserver/hw/xfree86/doc/BUILD
index 9431f9016..902468864 100644
--- a/xc/programs/Xserver/hw/xfree86/doc/BUILD
+++ b/xc/programs/Xserver/hw/xfree86/doc/BUILD
@@ -2,7 +2,7 @@
 
                          David Dawes, Matthieu Herrb
 
-                                 27 May 2001
+                              26 February 2003
 
                                   Abstract
 
@@ -17,62 +17,76 @@
 We highly recommend using gcc to build XFree86, but it generally also builds
 with the native compiler for each platform;
 
-1.  How to get the XFree86 4.2.0 source
-
-There are a few starting points for getting the XFree86 source.  One option
-is to start directly with the XFree86 4.2.0 source distribution.  In this
-case, the procedure is as follows:
-
-   o The XFree86 source is contained in files X420src-1.tgz, X420src-2.tgz
-     and X420src-3.tgz.  These can be found at
-     ftp://ftp.xfree86.org/pub/XFree86/4.2.0/source/ and similar locations on
-     XFree86 mirror sites.  X420src-2.tgz contains the fonts and documenta-
-     tion source.  X420src-3.tgz contains the hardcopy documentation.
-     X420src-1.tgz contains everything else.  If you don't need the docs or
-     fonts you can get by with only X420src-1.tgz.
+1.  How to get the XFree86 4.3.0 source
+
+The recommended way of getting the XFree86 4.3.0 source is to get it directly
+from the XFree86 CVS repository.  There are several ways of doing that, and
+they are described at our CVS web page <URL:http://www.xfree86.org/cvs/>  The
+CVS tag for this release is "xf-4_3_0", and the tag for the maintenance
+branch for this release is "xf-4_3-branch".
+
+Another method of getting the XFree86 4.3.0 source is to either download the
+4.3.0 source tarballs from the XFree86 ftp site.  The procedure for this is
+as follows:
+
+   o The XFree86 4.3.0 source is contained in the files X430src-1.tgz,
+     X430src-2.tgz, X430src-3.tgz, X430src-4.tgz, X430src-5.tgz,
+     X430src-6.tgz and X430src-7.tgz.  These can be found at
+     ftp://ftp.xfree86.org/pub/XFree86/4.3.0/source/ and similar locations on
+     XFree86 mirror sites.  X430src-4.tgz and X430src-5.tgz contains the
+     fonts.  X430src-6.tgz contains the documentation source.  X430src-7.tgz
+     contains the hardcopy documentation.  X430src-1.tgz, X430src-2.tgz and
+     X430src-3.tgz contains everything else.  If you don't need the docs or
+     fonts you can get by with only X430src-1.tgz, X430src-2.tgz and
+     X430src-3.tgz.
 
    o Extract each of these files by running the following from a directory on
      a filesystem containing enough space (the full source requires around
-     270MB, and a similar amount is required in addition to this for the com-
+     305MB, and a similar amount is required in addition to this for the com-
      piled binaries):
 
-          gzip -d < X420src-1.tgz | tar vxf -
+          gzip -d < X430src-1.tgz | tar vxf -
 
-          gzip -d < X420src-2.tgz | tar vxf -
+          gzip -d < X430src-2.tgz | tar vxf -
 
-          gzip -d < X420src-3.tgz | tar vxf -
+          gzip -d < X430src-3.tgz | tar vxf -
 
-   o If the release is not a full release, it is available as a patch against
-     the previous full release in the
-     ftp://ftp.xfree86.org/pub/XFree86/4.2.0/patches/ directory. Get the
-     patch file from there and apply it by running the following command:
+          gzip -d < X430src-4.tgz | tar vxf -
 
-          cd the directory containing the xc directory
+          gzip -d < X430src-5.tgz | tar vxf -
 
-          gzip -d < file | patch -s -p0 -E
+          gzip -d < X430src-6.tgz | tar vxf -
 
-     Look for special patching instructions in the Release Notes.
+          gzip -d < X430src-7.tgz | tar vxf -
 
-Another option is to get the source by anonymous CVS or CVSup.  See
-http://www.xfree86.org/cvs/ for details on the different procedure available.
+Alternatively, if you already have a pristine copy of the XFree86 4.2.0
+source, you can download patches from
+ftp://ftp.xfree86.org/pub/XFree86/4.3.0/patches/ that will allow you to con-
+vert it to 4.3.0.  Information about which patch files to download and how to
+apply them can be found in the "How to get XFree86" section of the README for
+this release.
 
-All method will produce one main source directory called xc.
+All methods will produce one main source directory called xc.
 
 2.  Configuring the source before building
 
-It is recommended that you start the configuration process by going to the
-xc/config/cf directory, and copying the file xf86site.def to host.def.  Then
-read through the host.def file (which is heavily commented), and set any
-parameters that you want for your configuration.  You can usually find out
-what the default settings are by checking the .cf file(s) relevant to your
-OS.
+In most cases it shouldn't be necessary to configure anything before build-
+ing.
+
+If you do want to make configuration changes, it is recommended that you
+start by going to the xc/config/cf directory, and copying the file
+xf86site.def to host.def.  Then read through the host.def file (which is
+heavily commented), and set any parameters that you want for your configura-
+tion.  You can usually find out what the default settings are by checking the
+.cf file(s) relevant to your OS.
 
-Unlike previous versions, imake can now automatically detect and set the var-
-ious OS*Version parameters, so you shouldn't need to enter those settings
-explicitly.
+A general rule to follow is to only change things that you understand and
+have a good reason to change.  It is easy to create build problems by chang-
+ing the default configuration.  Many of the configuration parameters are doc-
+umented in xc/config/cf/README.
 
-If you are using just the X420src-1.tgz part of the source dist, you will
-need to define BuildFonts to NO.
+If you are using just the X430src-1.tgz, X430src-2.tgz and X430src-3.tgz
+parts of the source dist, you will need to define BuildFonts to NO.
 
 3.  Using a shadow directory of symbolic links for the build
 
@@ -85,11 +99,11 @@ during the build, which has the following benefits:
      trol of CVS.
 
    o It is possible to build XFree86 for several different Operating System
-     or architectures from the same sources, shared by NFS.
+     or architectures from the same sources, shared by read-only NFS mounts.
 
    o It is possible to build XFree86 with different configuration options,
-     just by putting a real copyhost.def in each build tree and by customiz-
-     ing it separately in each build tree.
+     just by putting a real copy of the host.def file in each build tree and
+     by customizing it separately in each build tree.
 
 To make a shadow directory of symbolic links, use the following steps:
 
@@ -100,7 +114,7 @@ To make a shadow directory of symbolic links, use the following steps:
 
           mkdir build
 
-   o use the lndircommand to make the shadow tree:
+   o use the "lndir" command to make the shadow tree:
 
           lndir ../xc
 
@@ -118,16 +132,24 @@ from the XFree86 sources by running the following commands:
 
      cp lndir some directory in your PATH
 
+From time to time there may be some stale links in the build tree, for exam-
+ple, when files in the source tree are removed or renamed.  These can be
+cleaned up by running the "cleanlinks" script from the build directory (see
+the cleanlinks(1) manual page).  Rarely there will be changes that will
+require the build tree to be re-created from scratch.  A symptom of this can
+be mysterious build problems.  The best solution for this is to remove the
+build tree, and then re-create it using the steps outlined above.
+
 4.  Building and installing the distribution
 
 Before building the distribution, read through the OS-specific README file in
 xc/programs/Xserver/hw/xfree86/doc that is relevant to you.  Once those OS-
 specific details have been taken care of, go your build directory (either the
-xc directory or the shadow tree created before) and run ``make World'' with
-the BOOTSTRAPCFLAGS set as described in the OS-specific README (if necessary,
-but most systems supported by XFree86 don't need BOOTSTRAPCFLAGS).  It is
-advisable to redirect stdout and stderr to World.Log so that you can track
-down problems that might occur during the build.
+xc directory or the shadow tree created before) and run "make World" with the
+BOOTSTRAPCFLAGS set as described in the OS-specific README (if necessary, but
+most systems supported by XFree86 don't need BOOTSTRAPCFLAGS).  It is advis-
+able to redirect stdout and stderr to World.Log so that you can track down
+problems that might occur during the build.
 
 With Bourne-like shells (Bash, the Korn shell, zsh, etc.) use a command like:
 
@@ -143,9 +165,27 @@ You can follow the progress of the build by running:
 
  in a terminal.
 
-When the build is finished, you should check World.Log to see if there were
-any problems.  If there weren't any then you can install the binaries.  To do
-the install, run ``make install'' and ``make install.man''.  Make sure you
+When the build is finished, you should check the World.Log file to see if
+there were any problems.  If there weren't any then you can install the bina-
+ries.  By default the "make World" process will ignore errors and build as
+much as possible.  If there were problems and they are not corrected at this
+stage, the installation process will fail.  To restart the build process
+after correcting the problems, just run 'make'.  If Imakefiles or part of the
+build configuration was changed as part of correcting the problem, either re-
+run "make World", or run "make Everything".
+
+If you would prefer "make World" to exit at the first error, run it in the
+following way instead of the way described above:
+
+for Bourne-like shells:
+
+     make WORLDOPTS= World > World.log 2>&1
+
+for C-shell variants:
+
+     make WORLDOPTS= World >& World.log
+
+To do the install, run "make install" and "make install.man".  Make sure you
 have enough space in /usr/X11R6 for the install to succeed.  If you want to
 install on a filesystem other than /usr, make a symbolic link to /usr/X11R6
 before installing.
@@ -167,7 +207,7 @@ drivers installed:
 
                 make Makefile
                 make Makefiles
-                   make includes
+                make includes
                 make depend
                 make
 
@@ -176,7 +216,7 @@ drivers installed:
 There are some other useful targets defined in the top level Makefileof
 XFree86:
 
-   o Everything after a make World, make Everythingdoes everything a make
+   o Everything after a make World, make Everything does everything a make
      World does, except the cleaning of the tree. It is a way to quickly
      rebuild the tree after a source patch, but it is not 100% bullet proof.
      There are cases were it is better to force a full build by using make
@@ -206,9 +246,9 @@ XFree86:
 
    o VerifyOS displays the detected operating system version. If the numbers
      shown do not match your system, you probably need to set them manually
-     in host.def and report the problem to XFree86@XFree86.org.
+     in host.def and report the problem to <XFree86@XFree86.org>.
 
-     Generated from XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/BUILD.sgml,v 3.6 2001/11/15 17:32:16 dawes Exp $
+     Generated from XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/BUILD.sgml,v 3.11 2003/02/27 01:17:36 dawes Exp $
 
 
-$XFree86: xc/programs/Xserver/hw/xfree86/doc/BUILD,v 3.7 2001/11/15 17:37:21 dawes Exp $
+$XFree86: xc/programs/Xserver/hw/xfree86/doc/BUILD,v 3.16 2003/02/27 01:44:03 dawes Exp $
diff --git a/xc/programs/Xserver/hw/xfree86/doc/DESIGN b/xc/programs/Xserver/hw/xfree86/doc/DESIGN
index 8f6970083..3e073c820 100644
--- a/xc/programs/Xserver/hw/xfree86/doc/DESIGN
+++ b/xc/programs/Xserver/hw/xfree86/doc/DESIGN
@@ -2,7 +2,7 @@
 
                           The XFree86 Project, Inc
 
-                          Last modified 18 May 2002
+                        Last modified 2003 January 22
 
 NOTE: This is a DRAFT document, and the interfaces described here are subject
 to change without notice.
@@ -1509,8 +1509,6 @@ XF86Config file to the devices:
 
                SymTabPtr chipsets, PciChipsets *PCIchipsets,
 
-               GDevPtr *devList, int numDevs,
-
                GDevPtr *devList, int numDevs, DriverPtr drvp,
 
                int **foundEntities)
@@ -1666,17 +1664,27 @@ able at the driver level:
 Two helper functions are provided to aid configuring entities:
 
      ScrnInfoPtr xf86ConfigPciEntity(ScrnInfoPtr pScrn,
+
                int scrnFlag, int entityIndex,
+
                PciChipsets *p_chip,
+
                resList res, EntityProc init,
+
                EntityProc enter, EntityProc leave,
+
                pointer private)
+
      ScrnInfoPtr xf86ConfigIsaEntity(ScrnInfoPtr pScrn,
+
                int scrnFlag, int entityIndex,
+
                IsaChipsets *i_chip,
 
                resList res, EntityProc init,
+
                EntityProc enter, EntityProc leave,
+
                pointer private)
 
           These functions are used to register the non-relocatable
@@ -1694,8 +1702,8 @@ Two helper functions are provided to aid configuring entities:
                          pointer private)
 
           They are passed the entity index and a pointer to a pri-
-          vate scratch area.  This are can be set up during Probe()
-          and its address can be passed to xf86ConfigIsaEntity()
+          vate scratch area.  This can be set up during Probe() and
+          its address can be passed to xf86ConfigIsaEntity() and
           xf86ConfigPciEntity() as the last argument.
 
 These two helper functions make use of several core functions that are avail-
@@ -1724,12 +1732,12 @@ able at the driver level:
 
 9.3.2  PreInit Phase
 
-During this phase the remaining resource should be registered.  PreInit()
-should call xf86GetEntityInfo() To obtain a pointer to an EntityInfoRec for
+During this phase the remaining resources should be registered.  PreInit()
+should call xf86GetEntityInfo() to obtain a pointer to an EntityInfoRec for
 each entity it is able to drive and check if any resource are listed in its
 resources field.  If resources registered in the Probe phase have been
-rejected in the post-Probe phase (resources == NULL), then the driver should
-decide if it can continue without using these or if it should fail.
+rejected in the post-Probe phase (resources is non-NULL), then the driver
+should decide if it can continue without using these or if it should fail.
 
      EntityInfoPtr xf86GetEntityInfo(int entityIndex)
 
@@ -1742,10 +1750,8 @@ Several functions are provided to simplify resource registration:
      Bool xf86IsEntityPrimary(int entityIndex)
 
           This function returns TRUE if the entity referenced by
-          entityIndex is the display device that primary display
-          device (i.e., the one initialised at boot time and used
-          in text mode).
-
+          entityIndex is the primary display device (i.e., the one
+          initialised at boot time and used in text mode).
      Bool xf86IsScreenPrimary(int scrnIndex)
 
           This function returns TRUE if the primary entity is reg-
@@ -1784,10 +1790,11 @@ The primary function for registration of resources is:
      resPtr xf86ReallocatePciResources(int entityIndex, resPtr pRes)
 
           This function takes a list of PCI resources that need to
-          be reallocated and returns a list of the reallocated
-          resource.  This list needs to be passed to xf86Register-
-          Resources() again to be registered with the broker.  If
-          the reallocation fails, NULL is returned.
+          be reallocated and returns NULL when all relocations are
+          successful.  xf86RegisterResources() should be called
+          again to register the relocated resources with the bro-
+          ker.  If the reallocation fails, a list of the resources
+          that could not be relocated is returned.
 
 Two functions are provided to obtain a resource range of a given type:
 
@@ -1804,7 +1811,7 @@ Two functions are provided to obtain a resource range of a given type:
           avoided within the window can be supplied.  On failure a
           zero-length range of type ResEnd will be returned.
 
-     resRange xf86GetSparse(long type,  memType fixed_bits,
+     resRange xf86GetSparse(long type, memType fixed_bits,
 
                memType decode_mask, memType address_mask,
 
@@ -1835,14 +1842,14 @@ xf86FixPciResource() can be used to do this:
           parameter contains the number of the PCI base register
           that needs to be fixed (0-5, and 6 for the BIOS base reg-
           ister).  The size is specified by the alignment.  Since
-          PCI resources need to span an integral range of the size
-          2^n the alignment also specifies the number of addresses
-          that will be decoded.  If the driver specifies a type
-          mask it can override the default type for PCI resources
-          which is ResShared.  The resource broker needs to know
-          that to find a matching resource range.  This function
-          should be called before calling xf86RegisterResources().
-          The return value is TRUE when the function succeeds.
+          PCI resources need to span an integral range of size 2^n,
+          the alignment also specifies the number of addresses that
+          will be decoded.  If the driver specifies a type mask it
+          can override the default type for PCI resources which is
+          ResShared.  The resource broker needs to know that to
+          find a matching resource range.  This function should be
+          called before calling xf86RegisterResources().  The
+          return value is TRUE when the function succeeds.
 
      Bool xf86CheckPciMemBase(pciVideoPtr pPci, memType base)
 
@@ -1853,13 +1860,16 @@ xf86FixPciResource() can be used to do this:
           config file) matches an actual value allocated to a
           device.
 
-The driver may replace the generic access control functions for an entity by
-it's own ones.  This is done with the xf86SetAccessFuncs():
+The driver may replace the generic access control functions for an entity.
+This is done with the xf86SetAccessFuncs():
 
      void xf86SetAccessFuncs(EntityInfoPtr pEnt,
+
                xf86SetAccessFuncPtr funcs,
 
-               xf86SetAccessFuncPtr oldFuncs) with:
+               xf86SetAccessFuncPtr oldFuncs)
+
+          with:
 
                 typedef struct {
                     xf86AccessPtr mem;
@@ -1876,27 +1886,27 @@ it's own ones.  This is done with the xf86SetAccessFuncs():
           access functions are the same it is assumed that I/O can
           not be controlled independently.  If memory and I/O have
           to be controlled together all three values should be the
-          same.  If a non NULL value is passed as fifth argument it
+          same.  If a non NULL value is passed as third argument it
           is interpreted as an address where to store the old
-          access record.  If the fifth argument is NULL it will be
+          access record.  If the third argument is NULL it will be
           assumed that the generic access should be enabled before
           replacing the access functions.  Otherwise it will be
           disabled.  The driver may enable them itself using the
-          returned values.  It should do this from his replacement
+          returned values.  It should do this from its replacement
           access functions as the generic access may be disabled by
           the common level on certain occasions.  If replacement
           functions are specified they must control all resources
           of the specific type registered for the entity.
 
-To find out if specific resource range is conflicting with another resource
-the xf86ChkConflict() function may be used:
+To find out if a specific resource range conflicts with another resource the
+xf86ChkConflict() function may be used:
 
      memType xf86ChkConflict(resRange *rgp, int entityIndex)
 
           This function checks if the resource range rgp of for the
           specified entity conflicts with with another resource.
-          If it a conflict is found, the address of the start of
-          the conflict is returned.  The return value is zero when
+          If a conflict is found, the address of the start of the
+          conflict is returned.  The return value is zero when
           there is no conflict.
 
 The OPERATING state properties of previously registered fixed resources can
@@ -2049,42 +2059,42 @@ Next, the higher level functions that most drivers would use.
 
           The OptionInfoRec is defined as follows:
 
-                       typedef struct {
-                           double freq;
-                           int units;
-                       } OptFrequency;
-
-                       typedef union {
-                           unsigned long       num;
-                           char *              str;
-                           double              realnum;
-                           Bool                bool;
-                           OptFrequency        freq;
-                       } ValueUnion;
-
-                       typedef enum {
-                           OPTV_NONE = 0,
-                           OPTV_INTEGER,
-                           OPTV_STRING,     /* a non-empty string */
-                           OPTV_ANYSTR,     /* Any string, including an empty one */
-                           OPTV_REAL,
-                           OPTV_BOOLEAN,
-                           OPTV_FREQ
-                       } OptionValueType;
-
-                       typedef enum {
-                           OPTUNITS_HZ = 1,
-                           OPTUNITS_KHZ,
-                           OPTUNITS_MHZ
-                       } OptFreqUnits;
-
-                       typedef struct {
-                           int                 token;
-                           const char*         name;
-                           OptionValueType     type;
-                           ValueUnion          value;
-                           Bool                found;
-                       } OptionInfoRec, *OptionInfoPtr;
+                     typedef struct {
+                         double freq;
+                         int units;
+                     } OptFrequency;
+
+                     typedef union {
+                         unsigned long       num;
+                         char *              str;
+                         double              realnum;
+                         Bool                bool;
+                         OptFrequency        freq;
+                     } ValueUnion;
+
+                     typedef enum {
+                         OPTV_NONE = 0,
+                         OPTV_INTEGER,
+                         OPTV_STRING,  /* a non-empty string */
+                         OPTV_ANYSTR,  /* Any string, including an empty one */
+                         OPTV_REAL,
+                         OPTV_BOOLEAN,
+                         OPTV_FREQ
+                     } OptionValueType;
+
+                     typedef enum {
+                         OPTUNITS_HZ = 1,
+                         OPTUNITS_KHZ,
+                         OPTUNITS_MHZ
+                     } OptFreqUnits;
+
+                     typedef struct {
+                         int                 token;
+                         const char*         name;
+                         OptionValueType     type;
+                         ValueUnion          value;
+                         Bool                found;
+                     } OptionInfoRec, *OptionInfoPtr;
 
           OPTV_FREQ can be used for options values that are fre-
           quencies.  These values are a floating point number with
@@ -2109,11 +2119,12 @@ Next, the higher level functions that most drivers would use.
           of options that isn't marked as used.  This is intended
           to show options that the driver hasn't recognised.  It
           would normally be called near the end of the Chip-
-          ScreenInit() function, but only when
-          serverGeneration == 1.
+          ScreenInit() function, but only when serverGenera-
+          tion == 1.
+
+     OptionInfoPtr xf86TokenToOptinfo(const OptionInfoRec *table,
 
-     OptionInfoPtr xf86TokenToOptinfo(const OptionInfoRec *table, int
-     token)
+               int token)
 
           Returns a pointer to the OptionInfoRec in table with a
           token field matching token.  Returns NULL if no match is
@@ -2443,7 +2454,7 @@ remove all removable FBArea allocations.
 
 Initialization of the XFree86 framebuffer manager is done via
 
-     Bool xf86InitFBManager(ScreenPtr pScreen,  BoxPtr FullBox)
+     Bool xf86InitFBManager(ScreenPtr pScreen, BoxPtr FullBox)
 
 FullBox represents the area of the framebuffer that the manager is allowed to
 manage.  This is typically a box with a width of pScrn->displayWidth and a
@@ -2529,7 +2540,7 @@ use the colormap layer, a driver calls the xf86HandleColormaps() function.
 
                LOCO *colors, VisualPtr pVisual)
 
-          LoadPalette() is a driver-provide function for loading a
+          LoadPalette() is a driver-provided function for loading a
           colormap into hardware.  colors is the array of RGB val-
           ues that represent the full colormap.  indices is a list
           of index values into the colors array.  These indices
@@ -2895,6 +2906,7 @@ passing a list of XF86VideoAdaptorPtr pointers to the following function:
      Bool xf86XVScreenInit(
 
                ScreenPtr pScreen,
+
                XF86VideoAdaptorPtr *adaptPtrs,
 
                int num)
@@ -3105,6 +3117,7 @@ The XF86VideoAdaptorRec:
           visible.
 
      typedef  int (* PutVideoFuncPtr)( ScrnInfoPtr pScrn,
+
                short vid_x, short vid_y, short drw_x, short drw_y,
 
                short vid_w, short vid_h, short drw_w, short drw_h,
@@ -3125,6 +3138,7 @@ The XF86VideoAdaptorRec:
           turn on the video.
 
      typedef  int (* PutStillFuncPtr)( ScrnInfoPtr pScrn,
+
                short vid_x, short vid_y, short drw_x, short drw_y,
 
                short vid_w, short vid_h, short drw_w, short drw_h,
@@ -3135,6 +3149,7 @@ The XF86VideoAdaptorRec:
           place only one frame from the stream on the screen.
 
      typedef int (* GetVideoFuncPtr)( ScrnInfoPtr pScrn,
+
                short vid_x, short vid_y, short drw_x, short drw_y,
 
                short vid_w, short vid_h, short drw_w, short drw_h,
@@ -3147,6 +3162,7 @@ The XF86VideoAdaptorRec:
           rect without reading from an area larger than requested.
 
      typedef int (* GetStillFuncPtr)( ScrnInfoPtr pScrn,
+
                short vid_x, short vid_y, short drw_x, short drw_y,
 
                short vid_w, short vid_h, short drw_w, short drw_h,
@@ -3158,6 +3174,7 @@ The XF86VideoAdaptorRec:
           put stream.
 
      typedef void (* StopVideoFuncPtr)(ScrnInfoPtr pScrn,
+
                pointer data, Bool cleanup)
 
           This indicates the driver should stop displaying the
@@ -3178,6 +3195,7 @@ The XF86VideoAdaptorRec:
                Atom attribute,INT32 value, pointer data)
 
      typedef int (* GetPortAttributeFuncPtr)(ScrnInfoPtr pScrn,
+
                Atom attribute,INT32 *value, pointer data)
 
           A port may have particular attributes such as hue, satu-
@@ -3214,6 +3232,7 @@ The XF86VideoAdaptorRec:
                Bool motion, short vid_w, short vid_h,
 
                short drw_w, short drw_h,
+
                unsigned int *p_w, unsigned int *p_h, pointer data)
 
           QueryBestSize provides the client with a way to query
@@ -3225,6 +3244,7 @@ The XF86VideoAdaptorRec:
           important that the driver provide this function.
 
      typedef  int (* PutImageFuncPtr)( ScrnInfoPtr pScrn,
+
                short src_x, short src_y, short drw_x, short drw_y,
 
                short src_w, short src_h, short drw_w, short drw_h,
@@ -3443,6 +3463,10 @@ unresolved symbols can be controlled by the caller of the loader.  Typically
 the caller identifies which symbols can safely remain unresolved and which
 cannot.
 
+NOTE:  Now that ISO-C allows pointers to functions and pointers to data to
+have different internal representations, some of the following interfaces
+will need to be revisited.
+
 17.2  Semi-private Loader Interface
 
 The following is the semi-private loader interface that is available to the
@@ -3601,8 +3625,7 @@ XFree86 common layer.
 
                An optional pointer to a variable holding the
                major part or the error code.  When provided,
-               it *errmaj is filled in when LoadModule()
-               fails.
+               *errmaj is filled in when LoadModule() fails.
 
           errmin
 
@@ -3615,7 +3638,8 @@ XFree86 common layer.
           dle mod.  All child modules are also unloaded recur-
           sively.  This function must not be used to directly
           unload modules that are child modules (i.e., those that
-          have been loaded with LoadSubModule()).
+          have been loaded with the LoadSubModule() described
+          below).
 
 17.3  Module Requirements
 
@@ -3851,7 +3875,7 @@ server, and may also be used from within modules.
 
           This function unloads the module with handle module.  If
           that module itself has children, they are also unloaded.
-          It is like LoadModule(), except that it is safe to use
+          It is like UnloadModule(), except that it is safe to use
           for unloading child modules.
 
      pointer LoaderSymbol(const char *symbol)
@@ -3904,7 +3928,9 @@ server, and may also be used from within modules.
           solved symbols with the loader.  When LoaderCheckUnre-
           solved() is run it won't generate warnings for symbols
           registered in this way unless they were also registered
-          as required symbols.
+          as required symbols.  The function takes one or more NULL
+          terminated lists of symbols.  The end of the argument
+          list is indicated by a NULL argument.
 
      void LoaderRefSymbols(const char *sym0, ...)
 
@@ -4084,11 +4110,11 @@ improve the consistency of driver behaviour.
           If scrnIndex is negative, this function behaves exactly
           like xf86Msg().
           NOTE: This function can only be used after the ScrnIn-
-          foRec and its name field have been allocated.  That means
-          that it can not be used before the END of the ChipProbe()
-          function.  Prior to that, use xf86Msg(), providing the
-          driver's name explicitly.  No screen number can be sup-
-          plied at that point.
+          foRec and its name field have been allocated.  Normally,
+          this means that it can not be used before the END of the
+          ChipProbe() function.  Prior to that, use xf86Msg(), pro-
+          viding the driver's name explicitly.  No screen number
+          can be supplied at that point.
 
      xf86DrvMsgVerb(int scrnIndex, MessageType type, int verb,
 
@@ -4359,9 +4385,9 @@ the helpers.
 
           linePitches
 
-               List of supported line pitches supported by the
-               driver.  This is optional and should be NULL
-               when not used.
+               List of line pitches supported by the driver.
+               This is optional and should be NULL when not
+               used.
 
           minPitch
 
@@ -4667,11 +4693,11 @@ the helpers.
      void xf86PrintModes(ScrnInfoPtr scrp)
 
           This function prints out the virtual size setting, and
-          the line pitch being used.  It also prints out one line
-          for each mode being used, including its pixel clock, hor-
-          izontal sync rate, refresh rate, and whether it is inter-
-          laced or multiscan.
-
+          the line pitch being used.  It also prints out two lines
+          for each mode being used.  The first line includes the
+          mode's pixel clock, horizontal sync rate, refresh rate,
+          and whether it is interlaced, doublescanned and/or multi-
+          scanned.  The second line is the mode's Modeline.
           This function is normally called after calling
           xf86SetCrtcForModes().
 
@@ -4990,20 +5016,10 @@ WRec.  They are defined in vgaHW.h.
           must be called before attempting to write to those regis-
           ters.
 
-          A macro VGAHW_UNLOCK(base) is also available in vgaHW.h
-          that does the same thing, and this may be used when the
-          vgahw module is not loaded (for example, in the Chip-
-          Probe() function).
-
      void vgaHWLock(vgaHWPtr hwp)
 
           This function locks the VGA CRTC[0-7] registers.
 
-          A macro VGAHW_LOCK(base) is also available in vgaHW.h
-          that does the same thing, and this may be used when the
-          vgahw module is not loaded (for example, in the Chip-
-          Probe() function).
-
      void vgaHWEnable(vgaHWPtr hwp)
 
           This function enables the VGA subsystem.  (Note, this
@@ -5044,12 +5060,12 @@ WRec.  They are defined in vgaHW.h.
           vgaHWSave() uses the three functions below in the order
           vgaHWSaveColormap(), vgaHWSaveMode(), vgaHWSaveFonts() to
           carry out the different save phases.  It is undecided at
-          this stage whether they will be part of the vgahw mod-
-          ule's public interface or not.
+          this stage whether they will remain part of the vgahw
+          module's public interface or not.
 
      void vgaHWSaveMode(ScrnInfoPtr pScrn, vgaRegPtr save)
 
-          This functions saves the VGA mode registers.  They are
+          This function saves the VGA mode registers.  They are
           saved to the vgaRegRec pointed to by save.  The registers
           saved are:
 
@@ -5063,13 +5079,15 @@ WRec.  They are defined in vgaHW.h.
 
                Sequencer[0-4]
 
+          The number of registers actually saved may be modified by
+          a prior call to vgaHWSetRegCounts().
+
      void vgaHWSaveFonts(ScrnInfoPtr pScrn, vgaRegPtr save)
 
-          This functions saves the text mode font and text data
-          held in the video memory.  If called while in a graphics
-          mode, no save is done.  The VGA memory window must be
-          mapped with vgaHWMapMem() before to calling this func-
-          tion.
+          This function saves the text mode font and text data held
+          in the video memory.  If called while in a graphics mode,
+          no save is done.  The VGA memory window must be mapped
+          with vgaHWMapMem() before to calling this function.
 
           On some platforms, one or more of the font/text plane
           saves may be no-ops.  This is the case when the plat-
@@ -5098,12 +5116,13 @@ WRec.  They are defined in vgaHW.h.
           order vgaHWRestoreFonts(), vgaHWRestoreMode(), vgaHWRe-
           storeColormap() to carry out the different restore
           phases.  It is undecided at this stage whether they will
-          be part of the vgahw module's public interface or not.
+          remain part of the vgahw module's public interface or
+          not.
 
      void vgaHWRestoreMode(ScrnInfoPtr pScrn, vgaRegPtr restore)
 
-          This functions restores the VGA mode registers.  They are
-          restore from the data in the vgaRegRec pointed to by
+          This function restores the VGA mode registers.  They are
+          restored from the data in the vgaRegRec pointed to by
           restore.  The registers restored are:
 
                MiscOut
@@ -5116,9 +5135,12 @@ WRec.  They are defined in vgaHW.h.
 
                Sequencer[0-4]
 
+          The number of registers actually restored may be modified
+          by a prior call to vgaHWSetRegCounts().
+
      void vgaHWRestoreFonts(ScrnInfoPtr pScrn, vgaRegPtr restore)
 
-          This functions restores the text mode font and text data
+          This function restores the text mode font and text data
           to the video memory.  The VGA memory window must be
           mapped with vgaHWMapMem() before to calling this func-
           tion.
@@ -5163,12 +5185,12 @@ WRec.  They are defined in vgaHW.h.
           This function blanks and unblanks the screen.  It is
           blanked when on is FALSE, and unblanked when on is TRUE.
           This function is provided for use in cases where the
-          ScrnInfoRec can't be derived from the ScreenRec, like
-          probing for clocks.
+          ScrnInfoRec can't be derived from the ScreenRec (while
+          probing for clocks, for example).
 
 19.3  VGA Colormap Functions
 
-The vgahw modules uses the standard colormap support (see the Colormap Han-
+The vgahw module uses the standard colormap support (see the Colormap Han-
 dling (section 13., page 1) section.  This is initialised with the following
 function:
 
@@ -5405,8 +5427,6 @@ Drivers must NOT include the following:
           #define ZZZ_MINOR_VERSION <int>
           #define ZZZ_PATCHLEVEL    <int>
 
-     XXX Probably want to remove one of these version.
-
      NOTE: ZZZ_DRIVER_NAME should match the name of the driver module without
      things like the "lib" prefix, the "_drv" suffix or filename extensions.
 
@@ -6315,23 +6335,16 @@ pScreen->CloseScreen, and finishes by calling it.
 Define the SaveScreen() function (the screen blanking function).  When using
 the vgahw module, this will typically be:
 
-This function is mandatory. Before modifying any hardware register directly
-this function needs to make sure that the Xserver is active by checking if
-
-     pScrn
-
- is non-NULL and for
-
-     pScrn->vtSema == TRUE
-
-.
-
      static Bool
      ZZZSaveScreen(ScreenPtr pScreen, int mode)
      {
          return vgaHWSaveScreen(pScreen, mode);
      }
 
+This function is mandatory.  Before modifying any hardware register directly
+this function needs to make sure that the Xserver is active by checking if
+pScrn is non-NULL and for pScrn->vtSema == TRUE.
+
 20.3.16  FreeScreen
 
 Define the FreeScreen() function.  This function is optional.  It should be
@@ -6351,7 +6364,7 @@ eScreen() function.
          ZZZFreeRec(xf86Screens[scrnIndex]);
      }
 
-     Generated from XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/DESIGN.sgml,v 1.49 2002/05/18 20:52:22 herrb Exp $
+     Generated from XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/DESIGN.sgml,v 1.52 2003/02/25 19:31:00 dawes Exp $
 
 
-$XFree86: xc/programs/Xserver/hw/xfree86/doc/DESIGN,v 1.42 2002/05/18 20:58:41 herrb Exp $
+$XFree86: xc/programs/Xserver/hw/xfree86/doc/DESIGN,v 1.47 2003/02/25 21:32:33 dawes Exp $
diff --git a/xc/programs/Xserver/hw/xfree86/doc/Imakefile b/xc/programs/Xserver/hw/xfree86/doc/Imakefile
index dca78369c..2187c7060 100644
--- a/xc/programs/Xserver/hw/xfree86/doc/Imakefile
+++ b/xc/programs/Xserver/hw/xfree86/doc/Imakefile
@@ -4,7 +4,7 @@ XCOMM $XConsortium: Imakefile /main/33 1996/10/28 05:12:24 kaleb $
 
 
 
-XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/doc/Imakefile,v 3.80 2002/06/03 21:22:08 dawes Exp $
+XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/doc/Imakefile,v 3.81 2002/12/10 03:54:15 dawes Exp $
 
 #include <Server.tmpl>
 #include <lnxdoc.rules>
@@ -81,11 +81,17 @@ MAINDOCS = LICENSE README /*ReadmeFile(Config)*/ BUILD RELNOTES \
 	   Install Status DESIGN Versions
 
 OTHERDOCS = /*VideoModes.doc*/ /*QuickStart.doc*/ /*xinput*/ \
-	    ReadmeFile(fonts) ReadmeFile(mouse) ReadmeFile(DRI) \
-	    ReadmeFile(DRIcomp) ReadmeFile(dps)
+	ReadmeFile(fonts) \
+	ReadmeFile(mouse) \
+	ReadmeFile(DGA) \
+	ReadmeFile(DRI) \
+	ReadmeFile(DRIcomp) \
+	ReadmeFile(dps) \
+	ReadmeFile(XKB-Config) \
+	ReadmeFile(XKB-Enhancing)
 #endif
 
-MISCDOCS = ServersOnly /*LbxproxyOnly*/ $(REPORTFORM) ReadmeFile(DGA) \
+MISCDOCS = ServersOnly /*LbxproxyOnly*/ $(REPORTFORM) \
 	   VideoBoard98 ReadmeFile(rapidaccess)
 
 DATABASE = /* modeDB.txt */ /* AccelCards Monitors Devices */
diff --git a/xc/programs/Xserver/hw/xfree86/doc/Install b/xc/programs/Xserver/hw/xfree86/doc/Install
index 2a392ebd7..65c0082fa 100644
--- a/xc/programs/Xserver/hw/xfree86/doc/Install
+++ b/xc/programs/Xserver/hw/xfree86/doc/Install
@@ -1,8 +1,8 @@
-                 Installation Details for XFree86[tm] 4.2.0
+                 Installation Details for XFree86[tm] 4.3.0
 
                           The XFree86 Project, Inc
 
-                               16 January 2002
+                              24 February 2003
 
                                   Abstract
 
@@ -18,13 +18,15 @@ Solaris, etc) are packaged in a platform-independent gzipped tar format (aka
 "tarballs" identified by the .tgz suffix).  Along with the binaries we pro-
 vide a customized version of the GNU tar utility called "extract" and an
 installation script.  We recommend that these be used to install the bina-
-ries.
+ries.  (The source for this customized version of GNU tar can be found in the
+XFree86 CVS repository's "utils" module, and from our ftp site
+<URL:ftp://ftp.xfree86.org/pub/XFree86/misc/utils-1.1.0.tgz>.)
 
-2.  Downloading the XFree86 4.2.0 binaries
+2.  Downloading the XFree86 4.3.0 binaries
 
-We provide XFree86 4.2.0 binaries for a range of operating systems at our ftp
-site <URL:ftp://ftp.xfree86.org/pub/XFree86/4.2.0/binaries/> and our web site
-<URL:http://ftp.xfree86.org/pub/XFree86/4.2.0/binaries/>.  Often during
+We provide XFree86 4.3.0 binaries for a range of operating systems at our ftp
+site <URL:ftp://ftp.xfree86.org/pub/XFree86/4.3.0/binaries/> and our web site
+<URL:http://ftp.xfree86.org/pub/XFree86/4.3.0/binaries/>.  Often during
 releases our site is heavily loaded.  Instead of downloading directly from us
 we recommend that instead you use one of our mirror sites.
 
@@ -71,9 +73,9 @@ NOTES:
      looking soon after the release date.  The second possibility is that we
      won't have it available at all for this release.  This is likely if it's
      still not there about two weeks after the release date.  Check here
-     <URL:http://www.xfree86.org/4.2.0/UPDATES.html> for information about
+     <URL:http://www.xfree86.org/4.3.0/UPDATES.html> for information about
      updates to our binary distributions, and here
-     <URL:http://www.xfree86.org/4.2.0/ERRATA.html> for errata related to
+     <URL:http://www.xfree86.org/4.3.0/ERRATA.html> for errata related to
      this release.
 
 Once you're run the Xinstall.sh script and found which binary distribution is
@@ -133,9 +135,9 @@ NOTES:
 If you miss some and want to install them later, go to the Manual Installa-
 tion (section 4., page 1) section.
 
-3.  Installing XFree86 4.2.0 using the Xinstall.sh script
+3.  Installing XFree86 4.3.0 using the Xinstall.sh script
 
-We strongly recommend that our XFree86 4.2.0 binaries be installed using the
+We strongly recommend that our XFree86 4.3.0 binaries be installed using the
 Xinstall.sh script that we provide.  There are a lot of steps in the manual
 installation process, and those steps can vary according to the platform and
 hardware setup.  There is a description of the manual installation process
@@ -252,7 +254,7 @@ later that you need it, you can create it easily by running:
 
 The next step is to configure the X server.  That is covered in detail in an
 as-yet unwritten document :-(.  In the meantime, there are three ways to cre-
-ate a basic X server configuration file for XFree86 4.2.0.  One is to run the
+ate a basic X server configuration file for XFree86 4.3.0.  One is to run the
 xf86config utility.  Another is to run the xf86cfg utility.  The third option
 is to use the new -configure X server option:
 
@@ -271,9 +273,9 @@ old XF86_* and/or XF98_* X server binaries from /usr/X11R6/bin.
 After the X server configuration is done, it may be advisable to reboot,
 especially if you run xdm (or equivalent) or the font server (xfs).
 
-4.  Installing XFree86 4.2.0 manually
+4.  Installing XFree86 4.3.0 manually
 
-This section contains information about manually installing the XFree86 4.2.0
+This section contains information about manually installing the XFree86 4.3.0
 binary distributions.  You should only use this method if you know what
 you're doing.  The information here covers some common cases, but not every
 possible case.  It also may not be complete or up to date.  Use at your own
@@ -378,7 +380,7 @@ Once that's done, the main part of the installation can be done:
      /sbin/ldconfig -m /usr/X11R6/lib    # For FreeBSD, NetBSD, OpenBSD
      /usr/X11R6/bin/mkfontdir /usr/X11R6/lib/X11/fonts/misc
 
-     Generated from XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/Install.sgml,v 1.13 2002/01/16 20:38:44 dawes Exp $
+     Generated from XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/Install.sgml,v 1.17 2003/02/24 17:09:16 dawes Exp $
 
 
-$XFree86: xc/programs/Xserver/hw/xfree86/doc/Install,v 1.14 2002/01/16 20:51:01 dawes Exp $
+$XFree86: xc/programs/Xserver/hw/xfree86/doc/Install,v 1.21 2003/02/25 05:29:10 dawes Exp $
diff --git a/xc/programs/Xserver/hw/xfree86/doc/LICENSE b/xc/programs/Xserver/hw/xfree86/doc/LICENSE
index 2e528f285..bf55a7c1f 100644
--- a/xc/programs/Xserver/hw/xfree86/doc/LICENSE
+++ b/xc/programs/Xserver/hw/xfree86/doc/LICENSE
@@ -2,14 +2,14 @@
 
                              The XFree86 Project
 
-                                January 2002
+                                February 2003
 
 1.  XFree86 License
 
 XFree86 code without an explicit copyright is covered by the following copy-
 right/license:
 
-Copyright (C) 1994-2002 The XFree86 Project, Inc.  All Rights Reserved.
+Copyright (C) 1994-2003 The XFree86 Project, Inc.  All Rights Reserved.
 
 Permission is hereby granted, free of charge, to any person obtaining a copy
 of this software and associated documentation files (the "Software"), to deal
@@ -618,7 +618,7 @@ For further information, contact:
 
 info@urwpp.de or design@bigelowandholmes.com
 
-     Generated from XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/LICENSE.sgml,v 1.11 2002/01/16 20:38:45 dawes Exp $
+     Generated from XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/LICENSE.sgml,v 1.12 2003/02/24 03:41:16 dawes Exp $
 
 
-$XFree86: xc/programs/Xserver/hw/xfree86/doc/LICENSE,v 1.16 2002/01/16 20:51:01 dawes Exp $
+$XFree86: xc/programs/Xserver/hw/xfree86/doc/LICENSE,v 1.17 2003/02/24 04:03:20 dawes Exp $
diff --git a/xc/programs/Xserver/hw/xfree86/doc/OS2.Notes b/xc/programs/Xserver/hw/xfree86/doc/OS2.Notes
index fb95153c9..69b56b002 100644
--- a/xc/programs/Xserver/hw/xfree86/doc/OS2.Notes
+++ b/xc/programs/Xserver/hw/xfree86/doc/OS2.Notes
@@ -23,10 +23,11 @@ earlier versions, may now no longer work, or work differently.  Be aware that
 for OS/2, XFree86-4.0 is considered to be alpha software.
 
 If you want to join the XFree86 developer team, e.g. to add support for cer-
-tain hardware, please send a request to BOD@XFree86.org. Please think about
-such a step carefully before, though, since much work is involved. Please use
-the XFree86-4.0 source code as a test example how to compile the system. The
-ability to manage that is a basic requirement for becoming a developer.
+tain hardware, please send a request to <BOD@XFree86.org>.  Please think
+about such a step carefully before, though, since much work is involved.
+Please use the XFree86-4.0 source code as a test example how to compile the
+system. The ability to manage that is a basic requirement for becoming a
+developer.
 
 2.  Tools required
 
@@ -221,9 +222,7 @@ installed them. Nor did I install the test subtree.
 
 Well, you see, this was quite easy :-)
 
-     Generated from XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/OS2Notes.sgml,v 1.1 2001/06/04 13:50:15 dawes Exp $
+     Generated from XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/OS2Notes.sgml,v 1.2 2003/01/04 04:20:23 dawes Exp $
 
-     $XConsortium: OS2note.sgml /main/1 1996/02/24 10:08:59 kaleb $
 
-
-$XFree86: xc/programs/Xserver/hw/xfree86/doc/OS2.Notes,v 3.19 2001/06/30 22:58:09 tsi Exp $
+$XFree86: xc/programs/Xserver/hw/xfree86/doc/OS2.Notes,v 3.20 2003/01/04 04:28:27 dawes Exp $
diff --git a/xc/programs/Xserver/hw/xfree86/doc/README b/xc/programs/Xserver/hw/xfree86/doc/README
index 34de7b68c..53509ab2d 100644
--- a/xc/programs/Xserver/hw/xfree86/doc/README
+++ b/xc/programs/Xserver/hw/xfree86/doc/README
@@ -1,47 +1,47 @@
-                        README for XFree86[tm] 4.2.0
+                        README for XFree86[tm] 4.3.0
 
                           The XFree86 Project, Inc
 
-                               16 January 2002
+                              26 February 2003
 
                                   Abstract
 
-     XFree86 is the Open Source port of X.Org's X11R6.6 release that
-     supports several UNIX(R) and UNIX-like (such as Linux, the BSDs and
-     Solaris x86) operating systems on Intel and other platforms.
+     XFree86 is an Open Source version of the X Window System that sup-
+     ports many UNIX(R) and UNIX-like operating systems (such as Linux,
+     FreeBSD, NetBSD, OpenBSD and Solaris x86) on Intel and other plat-
+     forms.  This version is compatible with X11R6.6.
 
-1.  What is XFree86 4.2.0?
+1.  What is XFree86 4.3.0?
 
-XFree86 4.2.0 is the fifth full release in the XFree86 4 series.
+XFree86 4.3.0 is the sixth full release in the XFree86 4.x series.
 
-XFree86 release 4 is a major re-design of the basic architectural underpin-
-nings of XFree86's implementation of the original X Consortium's X Server.
-This re-design allows for a modular interaction between the hardware drivers
-and the XFree86 core X server.  With 4.x, upgrades to the X server with new
-and unsupported hardware can be easily done and installed without undergoing
-the previous process of rebuilding an X server.  All that is required is
-installing the new driver module and updating the configuration file.
+XFree86 4.x is the current XFree86 release series.  The first release in this
+series was in early 2000.  The core of XFree86 4.x is a modular X server.
+The 4.3.0 version is a new release that includes additional hardware support,
+functional enhancements and bug fixes.  Specific release enhancements can be
+viewed in the Release Notes.
 
-The road to XFree86 release 4 began as an architectural concept in mid 1997,
-with the serious framework being implemented in code the beginning of 1998.
-There were several snapshots on the road to 4.0 which are now part of the 4.0
-base release.  The 4.2.0 version is an upgrade to 4.1.0, which include more
-hardware ports, code enhancements and bug fixes.
+Most modern PC video hardware is supported in XFree86 4.3.0, and most PC
+video hardware that isn't supported explicitly can be used with the "vesa"
+driver.  The Driver Status document has a summary of what hardware is sup-
+ported in 4.3.0 compared with the old 3.3.x (3.3.6) series.  It is a good
+idea to check there before upgrading if you are currently running 3.3.6 with
+older hardware.
 
-Release 4 also included the long-awaited integration of the DRI (Direct Ren-
-dering Infrastructure).  This upgrade into the code base  gives XFree86 the
-abilities of accelerated direct 3-D graphics rendering, used widely in games
-and other visualization programs.
+XFree86 is produced by The XFree86 Project, Inc, which is a group of mostly
+volunteer independent developers.  XFree86 is a non-commercial organisation,
+and would not be viable without the invaluable development contributions of
+volunteers.  This release is dedicated to all who have supported and con-
+tributed to XFree86 over the last eleven years.
 
-While some driver available in the old 3.3.x release series have not been
-converted over to the 4.x series, those required for most modern video hard-
-ware are available.  Please check the Driver Status document first to see
-whether your hardware is supported before upgrading to the 4.x series.
+2.  Pointers to additional information
 
-Specific release enhancements can be viewed in the Release Notes.
-
-The XFree86 version numbering system has had some changes as of the 4.0.2
-release.  Information about this can be found in the Versions Document.
+The documentation for this release can be found online at the XFree86 web
+site <URL:http://www.xfree86.org/4.3.0/>.  Documentation for the latest
+release version can always be found here <URL:http://www.xfree86.org/cur-
+rent/>, and documentation for the latest pre-release snapshot can be found
+here <URL:http://www.xfree86.org/snapshot/>.  Checking those last two links
+is a good way of finding out the latest versions available from XFree86.
 
 Information about binary distributions and the attendant installation
 instructions can be found in the Installation Document.
@@ -49,134 +49,110 @@ instructions can be found in the Installation Document.
 Copyright and Licensing information for this release and all XFree86 releases
 can be found in the License Document.
 
-2.  Joining The Team
-
-2.1  Development
-
-If you would like to work on the development of XFree86 4, either by helping
-with the conversion of our older drivers to the new 4.x design, or assisting
-in the addition of new drivers or platforms to the code base then send a
-request to join the XFree86 development team
-<URL:http://www.xfree86.org:/developer.html>.  This will give you direct
-access to the latest XFree86 related development topics and discussions.
-Include in your note, your name, email address, reason for joining (what you
-will work on) and, level of expertise (coder, DRI, core, specific driver) and
-area of interest.
-
-2.2  Documentation
-
-If instead your interests are on the Documentation side of the Project, or
-you want to contribute and are not ready for plunging into the code, you can
-join the Documentation Team (those hardy souls responsible for the content
-you are reading :-).  Amongst the Doc Team's activities are converting our
-SGML based documentation into an XML based one and updating and creating
-technical documentation used by staff and public.  If this sounds interesting
-then please send a request to join the XFree86 documentation team
-<URL:mailto:signup@xfree86.org>.  Include in your note, you name, email
-address, reason for joining (what you will work on) and level of expertise
-and whether you are interested in the tools or content side of the group.
-
-3.  The Public Mailing Lists
-
-3.1  Newbie
+The XFree86 version numbering system (including historical information) can
+be found in the Versions Document.
 
-For those who are new to XFree86  and want to learn more about our Project we
-recommend that you join our Newbie list, located at Public Mailing Lists
-<URL:http://www.xfree86.org/mailman/listinfo>, where this and other discus-
-sions occur with our senior all-volunteer staff.  This is great forum to get
-introduced to XFree86 and ask for help on how to set up the XServer or
-whether your hardware is supported, and why not?,  and make suggestions for
-future releases of XFree86.  This list is supported by our volunteer staff
-who needs to know how you are using and interacting with XFree86 and what is
-wrong and could be better.  Tell them, they want to know!
+Additional information may be available at the XFree86 web site
+<URL:http://www.xfree86.org/>, and pointers to other information are avail-
+able at the XFree86 support page <URL:http://www.xfree86.org/support.html>.
 
-3.2  Announce
-
-For those who just want to know  the release schedule this is a good list  to
-join.
+3.  The Public Mailing Lists
 
-3.3  CVS Commit
+3.1  CVS Commit
 
 For those who want to see what has been committed recently to our CVS reposi-
 tory this is the list that will show you those updates.  This list is updated
 dynamically every time the repository is updated after the the commit hap-
 pens.
 
-3.4  Xpert
+3.2  Devel
+
+This list is available for discussions about XFree86 development and for fol-
+lowing up well-defined bug reports.  Many experienced XFree86 developers are
+present on this list.
 
-If instead you are the lone developer who is improving XFree86 on an ad hoc
-basis for your particular environment (I want to get my mouse or video card
-to work), and need a specific question asked then you should go over to our
-Xpert list where such questions are raised and answered by our technical
-development staff.  Remember you do not have to be a member to write fixes to
-our code base and if your changes are discrete and self-contained the volume
-of developer mail may just be too noisy.
+3.3  XFree86
 
-Once your work is finished (coded, debugged and documented) please send your
-fix to <fixes@XFree86.org>.  This will ensure that they are included in
-future releases. And thanks!  You make this truly an Open group.
+This list is available for any discussions and questions related to XFree86.
+Support related questions should be sent here.  Many experienced XFree86
+developers monitor this list.
 
-4.  How to get XFree86 4.2.0
+4.  Contributing to XFree86
 
-XFree86 4.2.0 can be found at the XFree86 ftp server
-<URL:ftp://ftp.xfree86.org/pub/XFree86/4.2.0/>, and at mirrors of this
+If you have any new work or enhancements/bug fixes for existing work, please
+submit them to <fixes@XFree86.org>.  This will ensure that they are included
+in future releases.  For new work, it's usually a good idea to discuss it
+first on the <devel@XFree86.org> list.
+
+5.  How to get XFree86 4.3.0
+
+XFree86 4.3.0 can be found at the XFree86 ftp server
+<URL:ftp://ftp.xfree86.org/pub/XFree86/4.3.0/>, and at mirrors of this
 server.  Information about obtaining and installing binary distributions of
 this release can be found in the Installation Document.  Information about
 obtaining the release in source form is given below.
 
-The source for version 4.2.0 is split into three tarballs: X420src-1.tgz,
-X420src-2.tgz, X420src-3.tgz.  The first contains everything except the fonts
-and general X11 documentation.  It is sufficient for building XFree86 if you
-already have a set of fonts.  The second contains the fonts and the source
-for the general X11 documentation.  The third contains the general X11 docu-
-mentation in hardcopy format.
-
-A source patch relative to version 4.1.0 is also available.  Because of its
-size, it is split into four parts.  The patch files are 4.1.0-4.2.0.diff1.gz,
-4.1.0-4.2.0.diff2.gz, 4.1.0-4.2.0.diff3.gz and 4.1.0-4.2.0.diff4.gz.  There
+The source for version 4.3.0 is split into seven tarballs: X430src-1.tgz,
+X430src-2.tgz, X430src-3.tgz, X430src-4.tgz, X430src-5.tgz, X430src-6.tgz and
+X430src-7.tgz.  The first three contain everything except the fonts and gen-
+eral X11 documentation.  Those three are sufficient for building XFree86 if
+you already have a set of fonts.  The fourth and fifth contain the fonts.
+The sixth contains the source for the general X11 documentation.  The seventh
+contains the general X11 documentation in hardcopy format.
+
+A source patch relative to version 4.2.0 is also available.  Because of its
+size, it is split into four parts.  The patch files are 4.2.0-4.3.0.diff1.gz,
+4.2.0-4.3.0.diff2.gz, 4.2.0-4.3.0.diff3.gz and 4.2.0-4.3.0.diff4.gz.  There
 is also a tarball that contains some files that have components that can't be
-included in a diff.  It is 4.2.0.tgz.  These patches should be applied to a
-clean 4.1.0 source tree, working from the directory containing the xc/ direc-
+included in a diff.  It is 4.3.0.tgz.  These patches should be applied to a
+clean 4.2.0 source tree, working from the directory containing the xc/ direc-
 tory.  The patches should be applied by running:
 
-     gzip -d < 4.1.0-4.2.0.diff1.gz | patch -p0 -E
-     gzip -d < 4.1.0-4.2.0.diff2.gz | patch -p0 -E
-     gzip -d < 4.1.0-4.2.0.diff3.gz | patch -p0 -E
-     gzip -d < 4.1.0-4.2.0.diff4.gz | patch -p0 -E
-
-     rm -f xc/extras/freetype2/builds/mac/ftlib.prj
-     rm -fr xc/extras/freetype2/docs/design
-     rm -fr xc/extras/freetype2/docs/glyphs
-     rm -fr xc/extras/freetype2/docs/image
-     rm -fr xc/extras/freetype2/docs/tutorial
-     rm -f xc/programs/Xserver/hw/darwin/bundle/English.lproj/MainMenu.nib/objects.nib
-     rm -f xc/programs/Xserver/hw/darwin/bundle/Japanese.lproj/Localizable.strings
-     rm -f xc/programs/Xserver/hw/darwin/bundle/Japanese.lproj/MainMenu.nib/objects.nib
-
-     gzip -d < 4.2.0.tgz | tar vxf -
-
-The contrib part of the distribution was folded into the main source tree a
-while ago, so a separate contrib tarball is not required.
+     gzip -d < 4.2.0-4.3.0.diff1.gz | patch -p0 -E
+     gzip -d < 4.2.0-4.3.0.diff2.gz | patch -p0 -E
+     gzip -d < 4.2.0-4.3.0.diff3.gz | patch -p0 -E
+     gzip -d < 4.2.0-4.3.0.diff4.gz | patch -p0 -E
+
+     rm -f xc/doc/hardcopy/Xext/mit-shm.PS.gz
+     rm -f xc/doc/hardcopy/saver/saver.PS.gz
+     rm -fr xc/fonts/scaled/Ethiopic
+     rm -fr xc/fonts/scaled/Meltho
+     rm -fr xc/programs/Xserver/hw/darwin/bundle
+     rm -f xc/programs/Xserver/hw/hp/input/drivers/XHPKeymaps
+     rm -f xc/programs/Xserver/hw/hp/ngle/ngledoblt.o.8.07
+     rm -f xc/programs/Xserver/hw/xwin/X.ico
+     rm -fr xc/programs/xcursorgen/redglass
+     rm -fr xc/programs/xcursorgen/whiteglass
+     touch xc/extras/Mesa/src/Trace/tr_attrib.c
+     touch xc/lib/fontconfig/NEWS
+
+     gzip -d < 4.3.0.tgz | tar vxf -
 
 To format the XFree86 documentation use the latest version of our doctools
-package available as doctools-1.3.tgz.
+package available from the XFree86 CVS repository's "doctools" module, and
+from our ftp site <URL:ftp://ftp.xfree86.org/pub/XFree86/misc/doc-
+tools-1.3.1.tgz>.
 
-The XFree86 source code can also be accessed via the XFree86 CVS repository.
-Information about accessing this can be found at the CVS page
+The XFree86 source code for this and all releases/snapshots as well as devel-
+opment versions can also be accessed via the XFree86 CVS repository.  Infor-
+mation about accessing this can be found at the CVS page
 <URL:http://www.xfree86.org/cvs/> on our web site.  It's also possible to
 browse the XFree86 CVS repository at our CVSWeb server
-<URL:http://cvsweb.xfree86.org/>.
+<URL:http://cvsweb.xfree86.org/>.  The CVS tag for this version is
+"xf-4_3_0".  The CVS tag for the stable branch for this release is
+"xf-4_3-branch".  To check out the latest development version, don't specify
+any tag.
 
-5.  Reporting Bugs
+6.  Reporting Bugs
 
 Bugs should be reported to <XFree86@XFree86.org>.  Before reporting bugs,
-please check the X server log file, which can be found at
+please check the XFree86 server log file, which can be found at
 /var/log/XFree86.0.log on most platforms.  If you can't resolve the problem
 yourself, send the entire log file with your bug report but not the operating
 system core dump.  Do not edit  the log file as our developers use it to
 reproduce and debug your problem.
 
-     Generated from XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/README.sgml,v 3.119 2002/01/16 19:40:48 dawes Exp $
+     Generated from XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/README.sgml,v 3.134 2003/02/27 01:19:32 dawes Exp $
 
 
-$XFree86: xc/programs/Xserver/hw/xfree86/doc/README,v 3.116 2002/01/16 20:51:01 dawes Exp $
+$XFree86: xc/programs/Xserver/hw/xfree86/doc/README,v 3.129 2003/02/27 02:16:18 dawes Exp $
diff --git a/xc/programs/Xserver/hw/xfree86/doc/README.DECtga b/xc/programs/Xserver/hw/xfree86/doc/README.DECtga
index 5a723281a..8a7f3fdd9 100644
--- a/xc/programs/Xserver/hw/xfree86/doc/README.DECtga
+++ b/xc/programs/Xserver/hw/xfree86/doc/README.DECtga
@@ -6,7 +6,7 @@
 
 1.  DEC 21030
 
-   o The DEC 21030 is supported by XFree86 4.2.0.  The driver is now par-
+   o The DEC 21030 is supported by XFree86 4.3.0.  The driver is now par-
      tially accelerated.  The built-in graphics on the Multia is supported in
      8-plane mode, and PCI cards with 8 or 16 MB framebuffers are supported
      in 24-plane mode.  TGA2 (aka PowerStorm 3D30/4D20) cards are not cur-
@@ -65,4 +65,4 @@
      Generated from XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/DECtga.sgml,v 3.9 2000/03/06 22:59:23 dawes Exp $
 
 
-$XFree86: xc/programs/Xserver/hw/xfree86/doc/README.DECtga,v 3.19 2001/11/15 17:37:21 dawes Exp $
+$XFree86: xc/programs/Xserver/hw/xfree86/doc/README.DECtga,v 3.24 2003/02/24 04:03:21 dawes Exp $
diff --git a/xc/programs/Xserver/hw/xfree86/doc/README.DRI b/xc/programs/Xserver/hw/xfree86/doc/README.DRI
index 689b6d1c7..66a5a5ff8 100644
--- a/xc/programs/Xserver/hw/xfree86/doc/README.DRI
+++ b/xc/programs/Xserver/hw/xfree86/doc/README.DRI
@@ -30,7 +30,7 @@ tive owners.
 
 2.  Introduction
 
-With XFree86 4.0 and the Direct Rendering Interface (DRI), hardware acceler-
+With XFree86 4.x and the Direct Rendering Interface (DRI), hardware acceler-
 ated 3D graphics can be considered a standard feature on Linux workstations.
 Support for other operating systems, such as FreeBSD, is underway.
 
@@ -39,9 +39,9 @@ which may occur.  Readers should have a basic understanding of Linux, X and
 OpenGL.  See the resources section at the end for more documentation and
 software downloads.
 
-This document does not cover compilation or installation of XFree86 4.0.  It
+This document does not cover compilation or installation of XFree86 4.x.  It
 is assumed that you've already installed a Linux distribution which includes
-XFree86 4.0 or that you're an experienced Linux developer who has compiled
+XFree86 4.x or that you're an experienced Linux developer who has compiled
 the DRI for himself.  DRI download, compilation and installation instructions
 can be found at http://dri.sourceforge.net/DRIcompile.html
 
@@ -72,7 +72,7 @@ performance.  See the DRI Compilation Guide for details.
 
 3.2  Graphics Hardware
 
-XFree86 4.0 (or later versions) includes 3D acceleration for the following
+XFree86 4.2 (or later versions) includes 3D acceleration for the following
 graphics hardware:
 
    o 3dfx, supported on Intel x86, AMD and Alpha:
@@ -104,7 +104,7 @@ graphics hardware:
 
         o Matrox G400
 
-   o Intel i810 (motherboard chipset)
+   o Intel i810/i815/i830 (motherboard chipsets)
 
         o i810
 
@@ -112,6 +112,10 @@ graphics hardware:
 
         o i810e
 
+        o i815
+
+        o i830
+
    o ATI Rage 128, supported on Intel x86, AMD and Alpha:
 
         o Rage Fury
@@ -139,6 +143,16 @@ graphics hardware:
 
         o Radeon 32MB SDR PCI (Alpha-based systems)
 
+        o Radeon 7000, M6 (RV100)
+
+        o Radeon 7200 (R100)
+
+        o Radeon 7500, M7 (RV200)
+
+        o Radeon 8500, 9100 (R200)
+
+        o Radeon 9000, M9 (RV250)
+
    o 3Dlabs, supported on Intel x86 and AMD:
 
         o Oxygen GMX 2000 (MX/Gamma based).  Note:  this driver is no longer
@@ -271,10 +285,10 @@ that you are in fact using 3D acceleration.
 8.1  libGL.so
 
 Your OpenGL program must link with the libGL.so.1.2 library provided by
-XFree86 4.0.  The libGL.so.1.2 library contains a GLX protocol encoder for
-indirect/remote rendering and DRI code for accessing hardware drivers.  In
-particular, be sure you're not using libGL.so from another source such as
-Mesa or the Utah GLX project.
+XFree86.  The libGL.so.1.2 library contains a GLX protocol encoder for indi-
+rect/remote rendering and DRI code for accessing hardware drivers.  In par-
+ticular, be sure you're not using libGL.so from another source such as Mesa
+or the Utah GLX project.
 
 Unless it was built in a special way, the libGL.so library does not contain
 any 3D hardware driver code.  Instead, libGL.so dynamically loads the appro-
@@ -1237,7 +1251,7 @@ demo programs is available from http://dri.sourceforge.net/res.phtml
    o In the future there may be IHV and Linux vendor support resources for
      the DRI.
 
-     Generated from XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/DRI.sgml,v 1.27 2002/01/07 22:05:57 dawes Exp $
+     Generated from XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/DRI.sgml,v 1.29 2003/02/17 03:57:29 dawes Exp $
 
 
-$XFree86: xc/programs/Xserver/hw/xfree86/doc/README.DRI,v 1.19 2002/01/07 22:07:16 dawes Exp $
+$XFree86: xc/programs/Xserver/hw/xfree86/doc/README.DRI,v 1.21 2003/02/17 04:04:07 dawes Exp $
diff --git a/xc/programs/Xserver/hw/xfree86/doc/README.DRIcomp b/xc/programs/Xserver/hw/xfree86/doc/README.DRIcomp
index b1e97f2bd..1e9773ccc 100644
--- a/xc/programs/Xserver/hw/xfree86/doc/README.DRIcomp
+++ b/xc/programs/Xserver/hw/xfree86/doc/README.DRIcomp
@@ -30,59 +30,55 @@ tive owners.
 
 2.  Introduction
 
-This document describes how to download, compile and install the DRI project.
-The DRI provides 3D graphics hardware acceleration for the XFree86 project.
-This information is intended for experienced Linux developers.  Beginners are
+This document describes how to download, compile and install the DRI.  The
+DRI provides 3D graphics hardware acceleration for the XFree86 project.  This
+information is intended for experienced Linux developers.  Beginners are
 probably better off installing precompiled packages.
 
 Edits, corrections and updates to this document may be mailed to <brian@tung-
-stengrahpics.com>.
+stengraphics.com>.
+
+Last updated on 13 February 2002 by Brian Paul.
 
 3.  Prerequisites
 
 You'll need the following:
 
+   o An installation of XFree86 4.1 or later.  The DRI tree has been pruned
+     down to minimize its size.  But in order to build the DRI tree you need
+     to have recent X header files, etc. already installed.  If you don't
+     have XFree86 4.1 (or later) installed you can probably install it from
+     RPMs (or another package format).  Or, you can download XFree86 as
+     sources and compile/install it yourself.
+
    o At least 200MB of free disk space.  If you compile for debugging (the -g
      option) then you'll need about 600MB.
 
    o GCC compiler and related tools.
 
-   o ssh (secure shell) for registered developer downloading of the DRI
-     source tree
+   o ssh (secure shell) if you're a DRI developer and don't want to use
+     anonymous CVS download.
 
-   o A recent Linux Kernel.  See below for details.
+   o A 2.4.x Linux Kernel.  See below for details.
 
    o FreeBSD support is not currently being maintained and may not work.
 
 The DRI 3D drivers generally work on systems with Intel or AMD CPUs.  How-
-ever, there is limited support for Alpha and PowerPC support is underway.
-
-For 3dfx Voodoo3 hardware, you'll also need:
-
-   o Glide3 headers and runtime library if you want to use the 3dfx driver.
-     These can be obtained from linux.3dfx.com.
-
-   o A recent Linux 2.4.x kernel.  AGP support is not required.
+ever, limited support for Alpha and PowerPC support is underway.
 
-For Matrox G200/G400 hardware, you'll also need:
+For 3dfx Voodoo hardware, you'll also need the Glide3 runtime library
+(libglide3-v3.so for Voodoo3 or libglide3-v5.so for Voodoo4/5).  These can be
+downloaded from the DRI website.  You can compile them yourself, but it's
+often a painful process.
 
-   o A recent Linux 2.4.x kernel with AGP support.
-
-For Intel i810 hardware, you'll also need:
-
-   o A recent Linux 2.4.x kernel with AGP support.
-
-For ATI Rage 128 and Radeon hardware, you'll also need:
-
-   o A recent Linux 2.4.x kernel with AGP support.
+For Matrox G200/G400, Intel i810/i830 or ATI Rage128/Radeon hardware, you'll
+also need AGP support in your Linux kernel, either built-in or as a loadable
+module.
 
 4.  Linux Kernel Preparation
 
-The DRI project closely tracks Linux kernel development.  Since the internal
-Linux data structures might change in the 2.4 Linux kernel, it's important to
-use the most recent Linux kernel and not an old, intermediate development
-release.  As of this writing (Jan 2001), 2.4.0 is the most recent version of
-Linux which the DRI is synchronized to.
+Only the Linux 2.4.x kernels are currently supported by the DRI hardware
+drivers.  2.5.x kernels may work, but aren't tested.
 
 Most of the DRI drivers require AGP support and using Intel Pentium III SSE
 optimizations also requires an up-to-date Linux kernel.  Configuring your
@@ -188,10 +184,9 @@ should be used and enable them where appropriate.
 
 5.1  Intel Pentium III Features
 
-The Pentium III SSE (Katmai) instructions are used in optimized vertex trans-
-formation functions in the Mesa-based DRI drivers.  On Linux, SSE requires a
-recent kernel (such as 2.4.0-test11 or later) both at compile time and run-
-time.
+The Pentium III SSE instructions are used in optimized vertex transformation
+functions in the Mesa-based DRI drivers.  On Linux, SSE requires a recent
+kernel (such as 2.4.0-test11 or later) both at compile time and runtime.
 
 5.2  AMD 3DNow! Features
 
@@ -225,9 +220,8 @@ The host.def file is explained below.
 
 6.  Downloading the XFree86/DRI CVS Sources
 
-The DRI project is hosted by VA Linux Systems' SourceForge.  The DRI source
-code, which is a subset of the XFree86 source tree, is kept in a CVS reposi-
-tory there.
+The DRI project is hosted by SourceForge.  The DRI source code, which is a
+subset of the XFree86 source tree, is kept in a CVS repository there.
 
 The DRI CVS sources may be accessed either anonymously or as a registered
 SourceForge user.  It's recommended that you become a registered SourceForge
@@ -341,7 +335,6 @@ The default host.def file will look something like this:
                  #define LinuxDistribution LinuxRedHat
                  #define DefaultCCOptions -ansi GccWarningOptions -pipe
                  #define BuildXF86DRI YES
-                 #define HasGlide3 YES
                  /* Optionally turn these on for debugging */
                  /* #define GlxBuiltInTdfx YES */
                  /* #define GlxBuiltInMga YES */
@@ -351,24 +344,26 @@ The default host.def file will look something like this:
                  #define SharedLibFont NO
 
 The ProjectRoot variable specifies where the XFree86 files will be installed.
-You probably don't want to use /usr/X11R6/ because that would overwrite your
-default X files.  The following is recommended:
-
-                 #define ProjectRoot /usr/X11R6-DRI
+We recommend installing the DRI files over your existing XFree86 installation
+- it's generally safe to do and less error-prone.  This policy is different
+than what we used to recommend.
 
-Especially note the XF86CardDrivers line to be sure your driver is listed.
+If XFree86 4.x is not installed in /usr/X11R6/ you'll have to add the follow-
+ing to the host.def file:
 
-If you have 3dfx hardware be sure that the Glide 3x headers are installed in
-/usr/include/glide3/ and that the Glide 3x library is installed at
-/usr/lib/libglide3.so.
+                 #define ProjectRoot pathToYourXFree86installation
 
-If you do not have 3dfx hardware comment out the HasGlide3 line in host.def.
+Note the XF86CardDrivers line to be sure your card's driver is listed.
 
 If you want to enable 3DNow! optimizations in Mesa and the DRI drivers, you
 should add the following:
 
                  #define MesaUse3DNow YES
 
+You don't have to be using an AMD processor in order to enable this option.
+The DRI will look for 3DNow! support and runtime and only enable it if appli-
+cable.
+
 If you want to enable SSE optimizations in Mesa and the DRI drivers, you must
 upgrade to a Linux 2.4.x kernel.  Mesa will verify that SSE is supported by
 both your processor and your operating system, but to build Mesa inside the
@@ -377,20 +372,20 @@ you enable SSE optimizations with an earlier version of the Linux kernel in
 /usr/src/linux, Mesa will not compile.  You have been warned.  If you do have
 a 2.4.x kernel, you should add the following:
 
-                 #define MesaUseKatmai YES
+                 #define MesaUseSSE YES
 
 8.3  Compilation
 
 To compile the complete DRI tree:
 
                  cd ~/DRI-CVS/build/xc/
-                 make World >& World.LOG
+                 make World >& world.log
 
 Or if you want to watch the compilation progress:
 
                  cd ~/DRI-CVS/build/xc/
-                 make World >& World.LOG &
-                 tail -f World.LOG
+                 make World >& world.log &
+                 tail -f world.log
 
 With the default compilation flags it's normal to get a lot of warnings dur-
 ing compilation.
@@ -403,7 +398,7 @@ work with XFree86/DRI.
 
 8.4  Check for compilation errors
 
-Using your text editor, examine World.LOG for errors by searching for the
+Using your text editor, examine world.log for errors by searching for the
 pattern ***.
 
 Verify that the DRI kernel module(s) for your system were built:
@@ -435,7 +430,7 @@ first.
 
 8.5  DRI kernel module installation
 
-The DRI kernel modules are in ~/DRI-CVS/build/xc/pro-
+The DRI kernel modules will be in ~/DRI-CVS/build/xc/pro-
 grams/Xserver/hw/xfree86/os-support/linux/drm/kernel/.
 
 To load the appropriate DRM module in your running kernel you can either use
@@ -450,110 +445,54 @@ Note that some DRM modules require that the agpgart module be loaded first.
 
 9.  Normal Installation and Configuration
 
-Most users will want to install the new X server and use it instead of the
-original X server.  This section explains how to do that.  We assume that the
-user is upgrading from XFree86 3.3.x.
+Most users will want to install the new X server and use it in place of their
+old X server.  This section explains how to do that.
 
 Developers, on the other hand, may just want to test the X server without
 actually installing it as their default server.  If you want to do that, skip
 to the next section.
 
-9.1  X Installation
+9.1  Installation
 
-You'll need to run as root to do the following commands:
+Here are the installation commands:
 
                 su
-
-As mentioned above, the installation directory is specified by the Project-
-Root variable in the host.def file.  Create that directory now if it doesn't
-already exist, then run the install commands:
-
-                mkdir /usr/X11R6-DRI
                 cd ~/DRI-CVS/build/xc
                 make install
 
-9.2  Linker configuration
-
-Edit your /etc/ld.so.conf file and put /usr/X11R6-DRI/lib as the first line.
-Then run:
-
-                ldconfig
-
-This will ensure that you use the new X libraries when you run X programs.
-
-9.3  Update Locale Information
-
-To update your X locale information do the following:
-
-                  cd ~/DRI-CVS/build/xc/nls
-                  ../config/util/xmkmf -a
-                  make
-                  make install
+9.2  Update the XF86Config File
 
-This will prevent a locale error message from being printed when you run Xlib
-programs.
+You may need to edit your XF86Config file to enable the DRI.  The config file
+is usually installed as /etc/X11/XF86Config-4.  See the DRI User Guide for
+details, but basically, you need to load the "glx" and "dri" modules and add
+a "DRI" section.
 
-9.4  Setup Miscellaneous Files
-
-Issue the following commands:
-
-                  cd /usr/X11R6-DRI/lib/X11
-                  ln -s /usr/X11R6/lib/X11/rgb.txt .
-                  ln -s /usr/X11R6/lib/X11/fonts .
-                  ln -s /usr/X11R6/lib/X11/app-defaults .
-
-This will allow applications to use the fonts and resources that they used in
-the past.
-
-9.5  Disable the Old X Server and Enable the New One
-
-Assuming that an installation of XFree86 3.3.x is present, we need to disable
-the old 3.3.x X server and enable the new 4.0.x X server.
+On the DRI web site, in the resources section, you'll find example XF86Config
+files for a number of graphics cards.  These configuration files also setup
+DRI options so it's highly recommended that you look at these examples.
 
-Issue the following commands:
+The XFree86 4.x server can generate a basic configuration file itself.  Sim-
+ply do this:
 
                   cd /usr/X11R6/bin
-                  mv Xwrapper Xwrapper.old
-                  rm X
-                  ln -s /usr/X11R6-DRI/bin/XFree86  X
-
-This will cause the new X server to be used instead of the original one.
-
-9.6  Create the XF86Config File
-
-Configuration files for XFree86 3.3.x will not work with XFree86 4.0.x.
-
-The new 4.0.x server can generate a basic configuration file itself.  Simply
-do this:
-
-                  cd /usr/X11R6-DRI/bin
                   ./XFree86 -configure
 
 A file named /root/XF86Config.new will be created.  It should allow you to
 try your X server but you'll almost certainly have to edit it.  For example,
 you should add HorizSync and VertRefresh options to the Monitor section and
 Modes options to the Screen section.  Also, the ModulePath option in the
-Files section should be set to /usr/X11R6-DRI/lib/modules.
-
-On the DRI web site, in the resources section, you'll find example XF86Config
-files for a number of graphics cards.  These configuration files also setup
-DRI options so it's highly recommended that you look at these examples.
-
-In any case, your new XF86Config file should be placed in /etc/X11/XF86Con-
-fig-4.  This configuration file will be recognized by the 4.0.x server but
-not by 3.3.x servers.  You can instead name it /etc/X11/XF86Config but
-that'll overwrite your old config file, which you may want to preserve.
+Files section should be set to /usr/X11R6/lib/modules.
 
-9.7  Start the New X Server
+9.3  Start the New X Server
 
 The new X server should be ready to use now.  Start your X server in your
-usual manner.  Typically, the startx command is used:
+usual manner.  Often times the startx command is used:
 
                   startx
 
 10.  Testing the Server Without Installing It
 
-As mentioned at the start of section 8, developers may want to simply run the
+As mentioned at the start of section 9, developers may want to simply run the
 X server without installing it.  This can save some time and allow you to
 keep a number of X servers available for testing.
 
@@ -563,7 +502,7 @@ As described in the preceding section, you'll need to create a configuration
 file for the new server.  Put the XF86Config file in your ~/DRI-
 CVS/build/xc/programs/Xserver directory.
 
-Be sure the ModulePath option is set correctly.
+Be sure the ModulePath option in your XF86Config file is set correctly.
 
 10.2  A Startup Script
 
@@ -598,7 +537,7 @@ At this point your X server should be up and running with hardware-acceler-
 ated direct rendering.  Please read the DRI User Guide for information about
 trouble shooting and how to use the DRI-enabled X server for 3D applications.
 
-     Generated from XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/DRIcomp.sgml,v 1.16 2002/01/07 22:05:57 dawes Exp $
+     Generated from XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/DRIcomp.sgml,v 1.19 2002/11/26 01:05:50 dawes Exp $
 
 
-$XFree86: xc/programs/Xserver/hw/xfree86/doc/README.DRIcomp,v 3.13 2002/01/07 22:07:16 dawes Exp $
+$XFree86: xc/programs/Xserver/hw/xfree86/doc/README.DRIcomp,v 3.16 2002/11/26 02:24:01 dawes Exp $
diff --git a/xc/programs/Xserver/hw/xfree86/doc/README.Darwin b/xc/programs/Xserver/hw/xfree86/doc/README.Darwin
index 802b208d7..41741ad2a 100644
--- a/xc/programs/Xserver/hw/xfree86/doc/README.Darwin
+++ b/xc/programs/Xserver/hw/xfree86/doc/README.Darwin
@@ -66,7 +66,7 @@ Developers' Tools.
 
 If you don't feel the need to live on the cutting edge, you can save some
 time and effort by using the precompiled binaries available on the XFree86
-FTP server at <URL:ftp://ftp.xfree86.org/pub/XFree86/4.2.0/binaries/>.  Fol-
+FTP server at <URL:ftp://ftp.xfree86.org/pub/XFree86/4.3.0/binaries/>.  Fol-
 low the instructions in the Install document to install it. This will create
 two new directory trees, /usr/X11R6 and /etc/X11 For Mac OS X Quartz support,
 download the optional Xquartz.tgz tarball. With Quartz support, the XDarwin
@@ -187,4 +187,4 @@ Good luck!
      Generated from XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/Darwin.sgml,v 1.9 2001/12/13 07:09:05 torrey Exp $
 
 
-$XFree86: xc/programs/Xserver/hw/xfree86/doc/README.Darwin,v 1.8 2001/12/20 00:15:41 dawes Exp $
+$XFree86: xc/programs/Xserver/hw/xfree86/doc/README.Darwin,v 1.13 2003/02/24 04:03:21 dawes Exp $
diff --git a/xc/programs/Xserver/hw/xfree86/doc/README.LynxOS b/xc/programs/Xserver/hw/xfree86/doc/README.LynxOS
index a70b064bd..d5baef983 100644
--- a/xc/programs/Xserver/hw/xfree86/doc/README.LynxOS
+++ b/xc/programs/Xserver/hw/xfree86/doc/README.LynxOS
@@ -1,4 +1,4 @@
-                     README for XFree86 4.2.0 on LynxOS
+                     README for XFree86 4.3.0 on LynxOS
 
                                Thomas Mueller
 
@@ -13,19 +13,19 @@ ments as well as many bug fixes.
 
 See the Copyright Notice.
 
-The sources for XFree86 4.2.0 are available by anonymous ftp from:
+The sources for XFree86 4.3.0 are available by anonymous ftp from:
 
-ftp://ftp.XFree86.org/pub/XFree86/4.2.0
+ftp://ftp.XFree86.org/pub/XFree86/4.3.0
 
 Binaries of XFree86 for LynxOS x86 are available from:
 
-ftp://ftp.XFree86.org/pub/XFree86/4.2.0/binaries/LynxOS
+ftp://ftp.XFree86.org/pub/XFree86/4.3.0/binaries/LynxOS
 
 A list of mirror sites is provided by ftp://ftp.XFree86.org/pub/XFree86/MIR-
 RORS
 
 The binaries on the FTP site were built on the latest released LynxOS version
-at the time XFree86 4.2.0 was released. In this case it is `LynxOS x86
+at the time XFree86 4.3.0 was released. In this case it is `LynxOS x86
 3.0.1'. Because of changes made to the object format they don't run on LynxOS
 versions earlier than 3.0.0.
 
@@ -37,7 +37,7 @@ this OS release was not available long enough for serious testing `LynxOS
 3.1.0' support has to be considered to be in `alpha state'.  Initial tests
 were performed on LynxOS x86 only!
 
-XFree86 4.2.0 supports LynxOS on the x86 and on the PowerPC platform. X
+XFree86 4.3.0 supports LynxOS on the x86 and on the PowerPC platform. X
 servers are currently available only on the x86 platform. The X server may
 work with some PowerPC platforms supported by LynxOS though this has not
 (yet) been thoroughly tested.
@@ -163,7 +163,7 @@ to
 3.5  X Server debug diagnostics output and other VT peculiarities
 
 Output made by the XFree86 X on its stdout or stderr will be lost after the
-server switches to graphics mode. The XFree86 4.2.0 server stores its output
+server switches to graphics mode. The XFree86 4.3.0 server stores its output
 in /usr/adm/XFree86.n.log (where n is the screen number).
 
 When the X server is running output made to other consoles will be lost.
@@ -266,4 +266,4 @@ duplicate entries:
      Generated from XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/LynxOS.sgml,v 3.20 2000/06/17 00:27:32 dawes Exp $
 
 
-$XFree86: xc/programs/Xserver/hw/xfree86/doc/README.LynxOS,v 3.30 2001/11/15 17:37:22 dawes Exp $
+$XFree86: xc/programs/Xserver/hw/xfree86/doc/README.LynxOS,v 3.35 2003/02/24 04:03:21 dawes Exp $
diff --git a/xc/programs/Xserver/hw/xfree86/doc/README.NetBSD b/xc/programs/Xserver/hw/xfree86/doc/README.NetBSD
index a07cccd2a..c4616f1cf 100644
--- a/xc/programs/Xserver/hw/xfree86/doc/README.NetBSD
+++ b/xc/programs/Xserver/hw/xfree86/doc/README.NetBSD
@@ -1,23 +1,24 @@
-                     README for XFree86 4.2.0 on NetBSD
+                     README for XFree86 4.3.0 on NetBSD
 
 Rich  Murphey, David Dawes, Marc  Wandschneider, Mark  Weaver, Matthieu Herrb
 
-                      Last modified on: 16 January 2002
+                      Last modified on: 9 November 2002
 
 1.  What and Where is XFree86?
 
-XFree86 is the Open Source port of X.Org's X11R6.6 release that supports sev-
-eral UNIX(R) and UNIX-like (such as Linux, the BSDs and Solaris x86) operat-
-ing systems on Intel and other platforms.
+XFree86 is an Open Source version of the X Window System that supports sev-
+eral UNIX(R) and UNIX-like operating systems (such as Linux, the BSDs and
+Solaris x86) on Intel and other platforms.  This version is compatible with
+X11R6.6.
 
 See the Copyright Notice.
 
 The sources for XFree86 are available by anonymous ftp from:
 
-ftp://ftp.XFree86.org/pub/XFree86/4.2.0
+ftp://ftp.XFree86.org/pub/XFree86/4.3.0
 
-Binaries for NetBSD 1.4 and later are available from:
-ftp://ftp.XFree86.org/pub/XFree86/4.2.0/binaries/NetBSD
+Binaries for NetBSD 1.5 and later are available from:
+ftp://ftp.XFree86.org/pub/XFree86/4.3.0/binaries/NetBSD
 
 A list of mirror sites is provided by http://www.xfree86.org/MIRRORS.shtml
 
@@ -33,7 +34,7 @@ if you have comments or suggestions about this file and we'll revise it.
 
 3.  New OS dependent features
 
-See the Release Notes for non-OS dependent new features in XFree86 4.2.0.
+See the Release Notes for non-OS dependent new features in XFree86 4.3.0.
 
 3.1  New OS dependent features in 4.2.0
 
@@ -111,7 +112,7 @@ the xvidtune utility.
 
 5.1  About mouse configuration
 
-XFree86 4.2.0 has support for the mouse driver included in the wscons console
+XFree86 4.3.0 has support for the mouse driver included in the wscons console
 driver introduced by NetBSD 1.4. Specify ``wsmouse'' as the protocol and
 ``/dev/wsmouse0'' as the device in /etc/X11/XF86Config if you're using NetBSD
 1.4 or later with a PS/2 mouse.
@@ -229,14 +230,14 @@ By default NetBSD include the BSD 4.4 kernel security feature that disable
 access to the /dev/mem device when in multi-users mode. But XFree86 servers
 can take advantage (or require) linear access to the display memory.
 
-Most XFree86 4.2.0 card drivers require linear memory access.  There are two
+Most XFree86 4.3.0 card drivers require linear memory access.  There are two
 ways to allow XFree86 to access linear memory:
 
 The first way is to disable the kernel security feature by adding ``option
 INSECURE'' in the kernel configuration file and build a new kernel.
 
 The second way is to install the aperture driver, included in source form in
-xc/programs/Xserver/hw/xfree86/etc/apNetBSD.shar in the XFree86 4.2.0 source
+xc/programs/Xserver/hw/xfree86/etc/apNetBSD.shar in the XFree86 4.3.0 source
 distribution. Unpack it in a new directory of your choice by running:
 
        sh apNetBSD.shar
@@ -374,10 +375,11 @@ __bsdi__ for BSD/386.
 10.  Thanks
 
 Many thanks to all people who contributed to make XFree86 work on *BSD, in
-particular, David Dawes, Pace Willison, Amancio Hasty, Christoph Robitschko,
-Nate Williams, Rod Grimes, Jack Velte and Michael Smith.
+particular: David Dawes, Todd Fries, Rod Grimes, Charles Hannum, Amancio
+Hasty, Christoph Robitschko, Matthias Scheler, Michael Smith, Ignatios Sou-
+vatzis, Jack Velte, Nate Williams and Pace Willison.
 
-     Generated from XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/NetBSD.sgml,v 3.63 2002/01/16 22:35:18 herrb Exp $
+     Generated from XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/NetBSD.sgml,v 3.68 2003/02/16 17:21:11 dawes Exp $
 
 
-$XFree86: xc/programs/Xserver/hw/xfree86/doc/README.NetBSD,v 3.80 2002/01/16 22:37:23 herrb Exp $
+$XFree86: xc/programs/Xserver/hw/xfree86/doc/README.NetBSD,v 3.87 2003/02/24 04:03:22 dawes Exp $
diff --git a/xc/programs/Xserver/hw/xfree86/doc/README.OpenBSD b/xc/programs/Xserver/hw/xfree86/doc/README.OpenBSD
index 32a30b90d..e96c9cbe6 100644
--- a/xc/programs/Xserver/hw/xfree86/doc/README.OpenBSD
+++ b/xc/programs/Xserver/hw/xfree86/doc/README.OpenBSD
@@ -1,29 +1,30 @@
-                     README for XFree86 4.2.0 on OpenBSD
+                     README for XFree86 4.3.0 on OpenBSD
 
                                Matthieu Herrb
 
-                      Last modified on: 16 January 2002
+                      Last modified on: 9 November 2002
 
 1.  What and Where is XFree86?
 
-XFree86 is the Open Source port of X.Org's X11R6.6 release that supports sev-
-eral UNIX(R) and UNIX-like (such as Linux, the BSDs and Solaris x86) operat-
-ing systems on Intel and other platforms.
+XFree86 is an Open Source version of the X Window System that supports sev-
+eral UNIX(R) and UNIX-like operating systems (such as Linux, the BSDs and
+Solaris x86) on Intel and other platforms.  This version is compatible with
+X11R6.6.
 
 See the Copyright Notice.
 
-The sources for XFree86 4.2.0 are available by anonymous ftp from:
+The sources for XFree86 4.3.0 are available by anonymous ftp from:
 
-ftp://ftp.XFree86.org/pub/XFree86/4.2.0
+ftp://ftp.XFree86.org/pub/XFree86/4.3.0
 
-Binaries for OpenBSD/i386 3.0 and later are available from:
+Binaries for OpenBSD/i386 3.2 and later are available from:
 
-ftp://ftp.XFree86.org/pub/XFree86/4.2.0/binaries/OpenBSD
+ftp://ftp.XFree86.org/pub/XFree86/4.3.0/binaries/OpenBSD
 
 A list of mirror sites is provided by http://www.xfree86.org/MIRRORS.shtml
 
 XFree86 also builds on other OpenBSD architectures. See section Building on
-other architectures (section 8.2, page 1) for details.
+other architectures (section 8., page 1) for details.
 
 2.  Bug Reports for This Document
 
@@ -32,21 +33,25 @@ if you have comments or suggestions about this file and we'll revise it.
 
 3.  New OS dependent features
 
-See the Release Notes for non-OS dependent new features in XFree86 4.2.0.
+See the Release Notes for non-OS dependent new features in XFree86 4.3.0.
 
-3.1  New OS dependent features in 4.2
+3.1  New OS related features in 4.3
 
-   o Support for OpenBSD/macppc on the ATI Rage128 based Power Macintosh.
+   o Support for some VGA cards on OpenBSD/alpha
+
+3.2  New OS dependent features in 4.2
+
+   o Support for OpenBSD/macppc on the ATI Rage128 based Power Macintoshes.
 
    o Support for building clients on OpenBSD/sparc64.
 
-3.2  New OS dependent features in 4.0.3
+3.3  New OS dependent features in 4.0.3
 
    o Support for the wscons console driver in post 2.8 OpenBSD.
 
    o A fix for multi-threaded libraries support.
 
-3.3  New OS dependent features in 4.0.2
+3.4  New OS dependent features in 4.0.2
 
    o Support for the OpenBSD ports tree,
 
@@ -57,7 +62,7 @@ See the Release Notes for non-OS dependent new features in XFree86 4.2.0.
 
    o startx now creates an Xauthority magic cookie for the display.
 
-3.4  New OS dependent features in 4.0.1
+3.5  New OS dependent features in 4.0.1
 
    o Several features from the OpenBSD X11 tree were merged into xdm:
 
@@ -76,21 +81,21 @@ See the Release Notes for non-OS dependent new features in XFree86 4.2.0.
 
    o The Xsun server can be built again on OpenBSD/sparc.
 
-3.5  New OS dependent features in 4.0
+3.6  New OS dependent features in 4.0
 
    o Multi-thread safe libraries are built by default on OpenBSD 2.6 and
      later,
 
    o Preliminary APM support.
 
-3.6  New OS dependent features in 3.9.18
+3.7  New OS dependent features in 3.9.18
 
    o Support for USB mices has been added on OpenBSD.
 
    o Soft-booting secondary cards through the int10 BIOS interface is now
      possible using the x86emu real mode emulator.
 
-3.7  New OS dependent features in 3.9.17
+3.8  New OS dependent features in 3.9.17
 
    o Silken mouse is supported for serial mices, and, under post 2.6 OpenBSD-
      current for PS/2 mices.
@@ -128,7 +133,7 @@ the xvidtune utility.
 
 5.1  About mouse configuration
 
-XFree86 4.2.0 has support for the mouse driver included in the new wscons
+XFree86 4.3.0 has support for the mouse driver included in the new wscons
 console driver introduced by OpenBSD-2.9.  Specify ``wsmouse'' as the proto-
 col and ``/dev/wsmouse0'' as the  device in /etc/X11/XF86Config if you're
 using OpenBSD-2.9 or later with a PS/2 or USB mouse.
@@ -171,7 +176,6 @@ directory as described in the xinit and startx man pages.
 To make sure X support is enabled under  OpenBSD, the following line must be
 in your config file in /sys/arch/i386/conf:
 
-     option XSERVER
      option APERTURE
 
 7.1  Console drivers
@@ -217,60 +221,42 @@ in /etc/rc.securelevel.
 OpenBSD supports System V shared memory. If XFree86 detects this support in
 your kernel, it will support the MIT-SHM extension.
 
-To add support for system V shared memory to your kernel add the lines:
-
-      # System V-like IPC
-      options         SYSVMSG
-      options         SYSVSEM
-      options         SYSVSHM
-
-to your kernel config file.
-
 8.  Rebuilding the XFree86 Distribution
 
 You should configure the distribution by editing xc/config/cf/host.def
 before compiling.  To compile the sources, invoke ``make World'' in the xc
 directory."
 
-8.1  Console drivers
-
-XFree86 has a configuration option to select the console drivers to use in
-host.def:
-
-   o  if you're using pccons only put:
-
-           #define XFree86ConsoleDefines -DPCCONS_SUPPORT
-
-   o if you're using pcvt only put:
+Note that OpenBSD project now has its own source tree, based on the XFree86
+source tree, with some local modifications. You may want to start with this
+tree to rebuild from sources.  The OpenBSD XF4 source tree is available by
+anoncvs from all OpenBSD anoncvs servers. See http://www.openbsd.org/anon-
+cvs.html for details on anoncvs.
 
-           #define XFree86ConsoleDefines -DPCVT_SUPPORT
+XFree86  also compiles on other OpenBSD architectures.
 
-If you don't define XFree86ConsoleDefines in host.def the pccons and pcvt
-drivers will be supported by default.
+8.1  XFree86 on OpenBSD/alpha
 
-Native support for the wscons console driver found on OpenBSD/macppc and on
-OpenBSD/i386 2.9 and later is built by adding:
+The XFree86 server is known to work on some VGA cards in alpha machines that
+support BWX I/O, with OpenBSD 3.2 and higher.
 
-      #define XFree86ConsoleDefines -DWSCONS_SUPPORT
+The following cards have been successfully tested for now:
 
-to xc/config/host.def before rebuilding the server.
+   o 3DLabs Permedia 2 (8, 15, 16 and 24 bits depth)
 
-For the i386, you should include both pcvt and wscons support in order to use
-the pcvt compatibility mode of wscons:
+   o ATI Rage Pro (works with 'Option "NoAccel"')
 
-      #define XFree86ConsoleDefines -DPCVT_SUPPORT -DWSCONS_SUPPORT
+   o Cirrus Logic CL5430 (works with 'Option "NoAccel"')
 
-8.2  Building on other architectures
+   o Cirrus Logic GD5446 (8, 16 and 24 bits depth)
 
-XFree86  also compiles on other OpenBSD architectures.
+   o Matrox MGA 2064 (8, 16 and 24 bits depth)
 
-Note that OpenBSD project now has its own source tree, based on the XFree86
-source tree, with some local modifications. You may want to start with this
-tree to rebuild from sources.  The OpenBSD XF4 source tree is available by
-anoncvs from all OpenBSD anoncvs servers. See http://www.openbsd.org/anon-
-cvs.html for details on anoncvs.
+Note that this version of XFree86 doesn't work on TGA cards. The version
+shipped with OpenBSD 3.1 and higher includes an OS-specific driver wsfb that
+is used to support TGA cards.
 
-8.2.1  XFree86 on OpenBSD/macppc
+8.2  XFree86 on OpenBSD/macppc
 
 The XFree86 server is currently known to work on the G4 Macs and new iBooks
 with ATI Rage 128 cards running OpenBSD 3.0 or later.  Other machines are
@@ -280,17 +266,22 @@ it.
 Use xf86config to build a /etc/X11/XF86Config file before starting the server
 for the first time.
 
-Tou configure the keyboard, the protocol should be specified as wskbd and the
-device as /dev/wskbd0.  Using a wsmux device as the keyboard device doesn't
-work (yet). Use macintosh as XkbModel.
-
 For the Titanium Powerbook G4, you can try the following mode line in
 /etc/X11/XF86Config to match the flat panel resolution:
 
-     Modeline "1152x768" 78.741 1152 1173 1269 1440  768 769 772 800 +HSync +VSync
+     Modeline "1152x768" 64.995 1152 1213 1349 1472  768 771 777 806 -HSync -VSync
+
+8.3  XFree86 on OpenBSD/sparc
+
+OpenBSD 3.2 on sparc switched to the wscons device driver and now uses the OS
+specific wsfb driver in the XFree86 server. This driver is not included in
+XFree86 4.3. Please use the version shipped with OpenBSD instead.
+
+8.4  XFree86 on OpenBSD/sparc64
 
-You need to set securelevel to -1 in the /etc/rc.securelevel configuration
-file to run XFree86 on OpenBSD/macppc.
+This version of XFree68 only has support for X clients on OpenBSD/sparc64.
+Note that the version shipped with OpenBSD also has support for the X server
+on both SBus and PCI based machines.
 
 9.  Building New X Clients
 
@@ -303,10 +294,11 @@ whatis /usr/X11R6/man''.
 10.  Thanks
 
 Many thanks to all people who contributed to make XFree86 work on *BSD, in
-particular, David Dawes, Pace Willison, Amancio Hasty, Christoph Robitschko,
-Nate Williams, Rod Grimes, Jack Velte and Michael Smith.
+particular: David Dawes, Todd Fries, Rod Grimes, Charles Hannum, Amancio
+Hasty, Christoph Robitschko, Matthias Scheler, Michael Smith, Ignatios Sou-
+vatzis, Jack Velte, Nate Williams and Pace Willison.
 
-     Generated from XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/OpenBSD.sgml,v 1.24 2002/01/16 22:35:17 herrb Exp $
+     Generated from XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/OpenBSD.sgml,v 1.30 2003/02/25 19:31:01 dawes Exp $
 
 
-$XFree86: xc/programs/Xserver/hw/xfree86/doc/README.OpenBSD,v 1.30 2002/01/16 22:37:23 herrb Exp $
+$XFree86: xc/programs/Xserver/hw/xfree86/doc/README.OpenBSD,v 1.38 2003/02/25 21:32:34 dawes Exp $
diff --git a/xc/programs/Xserver/hw/xfree86/doc/README.SCO b/xc/programs/Xserver/hw/xfree86/doc/README.SCO
index 9bdb000df..f5f87481e 100644
--- a/xc/programs/Xserver/hw/xfree86/doc/README.SCO
+++ b/xc/programs/Xserver/hw/xfree86/doc/README.SCO
@@ -2,129 +2,85 @@
 
                        J. Kean Johnston (jkj@sco.com)
 
-                                 21 May 2001
-
-1.  Binary Distribution
-
-The following files are provided in the binary distribution:
-
-           README.SCO
-                 This file.
-
-           gunzip.Z
-                 The GNU uncompress utility.
-
-           *X312Xdoc.tgz
-                 The XFree86 specific documentation.
-
-           X312Mono.tgz
-                 The Mono server
-
-           X312VG16.tgz
-                 The 16 colour VGA server
-
-           X312SVGA.tgz
-                 The Super VGA server
-
-           X312S3.tgz
-                 The S3 server
-
-           X3128514.tgz
-                 The 8514 server
-
-           X312AGX.tgz
-                 The AGX server
-
-           X312Mc32.tgz
-                 The Mach 32 server
-
-           X312Mc64.tgz
-                 The Mach 64 server
-
-           X312Mc8.tgz
-                 The Mach 8 server
-
-           X312P9k.tgz
-                 The P9000 server
-
-           *X312cfg.tgz
-                 The local configuration files for xdm/fs/xinit.
-
-           *X312bin.tgz
-                 The bin directory, contains most executables.
-
-           *X312lib.tgz
-                 The shared and unshared libraries.
-
-           *X312fnt1.tgz
-                 75dpi and misc fonts.
-
-           X312fnt2.tgz
-                 100dpi and Speedo fonts.
-
-           *X312inc.tgz
-                 The X11 include files.
-
-           X312man.tgz
-                 The formatted man pages.
-
-           X312lkit.tgz
-                 The server link kit (all drivers + PEX).
-
-           X312util.tgz
-                 Lots of PD utilities provided as is.
-
-           X312pex.tgz
-                 All files relating to PEX including libraries and
-                 header files.  The LinkKit is required to obtain
-                 servers capable of running PEX.
-
-To obtain a minimum XFree86 installation you will require the archives marked
-with a `*' above, the server binary best suited to your machine and option-
-ally "gunzip.Z".  All the files are compressed with "gzip" except of course
-"gunzip.Z" which is compressed using the conventional compress program.
-
-To install the XFree86 binaries just follow these steps.
-
-  1.  Obtain the files you require.
-
-      The rest of this procedure must be done as root.  If you do not run the
-      extraction as root the permissions on the files will not be correct.
-      For example,  the `X' server is s-bit root and will not function cor-
-      rectly if extracted as an ordinary user.
-
-  2.  create a directory /usr/X11R6, permissions 755 should do nicely.
-
-  3.  cd /usr/X11R6
-
-  4.  extract the archives, for example:
-
-                       gunzip < X312bin.tgz | tar xvpf -
-
-  5.  if you have installed man pages see the later section on setting up man
-      pages.
-
-  6.  Look through /usr/X11R6/lib/X11/doc/INSTALL, especially section 2 on
-      configuring and using XFree86.   This should allow you to get a server
-      up and running.  Before starting the server check in the later section
-      Before Running XFree86 (section 3., page 1), in this document, to see
-      if there are any system requirements you have to make for the server to
-      operate correctly.
-
-2.  Source Distribution
-
-The SCO port comes as part of the standard XFree86 distribution.  Consult the
-XFree86 README for more information on the location of sources.
-
-Please note that as of XFree86 3.2, Only SCO Open Server Release 5 and
-onwards are supported.  If you are using a previous version of SCO UNIX and
-you want to use XFree86, use the 3.1 series, or be prepared for build fail-
-ures.
-
-For people who want and need to look around the source, there are now two
-files in ``xc/config/cf''. Firstly, ``sco.cf'' is the old original SCO con-
-figuration file, and ``sco5.cf'', which is the currently used configuration
-file.
+                              14 February 2003
+
+1.  Requirements
+
+Before you can either compile or execute a binary distribution of XFree86,
+the following conditions must be met:
+
+   o Ensure that you are running Release 5.0.4 or later. This is required
+     because OSS646 is only supported on those platforms. There are no plans
+     to support XFree86 on earlier releases of OpenServer.
+
+   o Ensure that OSS646, the ``Execution Environment Update'' package is
+     installed, if appropriate.  Check the release notes for that update to
+     see whether or not your current operating system requires this update.
+     This supplement will be available to the public in February 2003.
+
+   o Ensure that OSS631, the "Graphics, Web and X11 Libraries" package is
+     installed.  This ships standard with release 5.0.7 and later, and is
+     only required for 5.0.[456] users.  This package will be updated fairly
+     frequently, and it us always suggested you have the latest possible ver-
+     sion installed.  At some point in the future it may even update the
+     libraries in 5.0.7, so it is worth checking the release notes for this
+     supplement.
+
+   o To compile XFree86, you must use the SCO-supported version of the GNU C
+     Compiler.  It is possible that Skunkware versions of the compiler will
+     work too, but this has not been tested.  The ``GNU Development System''
+     is available for all releases from (and including) SCO OpenServer
+     Release 5.0.5.  It is provided with the operating system in all versions
+     from Release 5.0.7, although you need to run ``custom'' to install it
+     from the media.  You can always download the latest latest version of
+     the GNU Development System from the SCO Web site
+     <URL:http://www.sco.com>.
+
+   o If you are not using OSR 5.0.7 or later, you need to get an updated con-
+     sole driver.  See <URL:http://www.sco.com> for details on OpenServer
+     supplements.  If you can't or don't want to upgrade your console driver,
+     XFree86 will still compile, but you may run into problems with some
+     cards such as the Riva TNT and ATI Rage cards.  The problem with the
+     console driver in 5.0.6A and earlier is that when the X server sets
+     graphics mode, the driver does not set a status bit, so any text that is
+     sent directly to /dev/console, such as kernel warning or notice messages
+     when you access tape drives or NFS notices, will be sent to the console
+     video memory.  This just happens to be slap bang in the middle of
+     palette data for the Riva TNT, so you get color map corruption.  The
+     updated console driver also has an improved mechanism for allocating
+     video memory that XFree86 detects at compile time, and it will use it if
+     it exists.  It is STRONGLY recommended that you get the console driver
+     update.
+
+2.  Compiling XFree86
+
+Using the GNU Development System, compiling XFree86 should be fairly
+straightforward.  Before attempting to compile the system though, you should
+make sure that you have met all of the requirements above.  To actually start
+the compilation, perform the following steps:
+
+   o Copy the unmodified xf86site.def in xc/config/cf to host.def. Edit
+     host.def and make any changes you think you need. The most useful
+     options to change are HasTcl, HasTk, HasXdmAuth if you have the file
+     WrapHelp.c and GccWarningOptions. Due to the nature of OpenServer's
+     header files, the default options for this last setting are a bit
+     aggressive, and I recommend you set this option to -Wpointer-arith.
+
+   o Make sure that the official version of the GNU Development System is
+     first in your PATH.  The official version lives in /usr/gnu/bin, and the
+     Skunkware version (if any) lives in /usr/local/bin. You must ensure that
+     /usr/gnu/bin appears first in your PATH.
+
+   o Go to the top level of the source tree and execute the command CC=gcc
+     make World BOOTSTRAPCFLAGS=-DSCO5 2>&1 | tee world.log.  This will do a
+     full build, and send all of the build results to the file world.log.
+
+   o If the build succeeded, install the new server by executing the command
+     make install 2>&1 | tee install.log as root.  This will send the install
+     results to the file install.log.
+
+   o If you want to install the manual pages, execute the command make
+     install.man 2>&1 | tee -a install.log as root.
 
 3.  Before Running XFree86
 
@@ -132,76 +88,11 @@ The SCO xterm terminfo description is not compatible with the xterm in the R5
 distribution.
 
 To use a Bus/Keyboard or PS2 mouse you should configure the mouse drivers
-under SCO as above using 'mkdev mouse'. You may then use the OsMouse option
-in your XF86Config to specify that XFree86 should use the SCO mouse drivers.
-To do this, set the Protocol to "OsMouse" in the Pointer section of your
-XF86Config file.  You can also use "OsMouse" for your serial mouse, espe-
-cially if you are having trouble getting your mouse to work using the XFree86
-mouse drivers.
-
-If you do not have the SCO TCP/IP package installed do not panic.  XFree86
-will work fine without TCP/IP but you will most likely have to do some or all
-of these things:
-
-   o Do not worry about errors from the X server complaining about
-     ``/dev/socksys''.  The X server is configured to run on systems with and
-     without TCP/IP.  This error is just pointing out that you do not have
-     TCP/IP and that this method of connecting to the server has been dis-
-     abled.
-
-   o Do worry about errors involving ``/dev/spx'' or the ``sco'' connection
-     type.  This means something is wrong with the streams pipes that are
-     used for connections on the local machine.  First be sure that your
-     server has the ``s-bit'' set.  You can do this by running this command
-     for the X server you are using:
-
-     ls -al /usr/X11R6/bin/XF86_XXXXXX
-
-     The output should contain the `s' character instead of the `x' charac-
-     ter.  For example:
-
-               -rwsr-xr-x   1 root     bin      1074060 Jul 24 11:54 XF86_S3
-
-     is correct while:
-
-               -rwxr-xr-x   1 root     bin      1074060 Jul 24 11:54 XF86_S3
-
-     is not.
-
-   o you may have to install streams into the kernel with ``mkdev streams''
-     Check the SCO Manuals for more information on this.
-
-   o you may have to configure some devices in /dev,  check in the "Trouble
-     Shooting" section of this document for the entry which comments on
-     ``/dev/spx'' and ``Xsco''.
-
-   o Your streams resources may be configured too low.  You should check your
-     streams parameters against the following values,  if the are higher then
-     you do not need to changes them.  To check these values, login as root,
-     change directory to ``/etc/conf/cf.d'' and then run ``./configure''.
-
-     Once you are running configure,  choose the ``Streams Data'' option and
-     step through the entries.  Just press <ENTER> at each prompt unless you
-     want to change a value.  The values to look for,  and their minimum val-
-     ues, are:
-
-                                  NSTREAM      128
-                                  NQUEUE       512
-                                  NBLK4096     4
-                                  NBLK2048     32
-                                  NBLK1024     32
-                                  NBLK512      32
-                                  NBLK256      64
-                                  NBLK128      256
-                                  NBLK64       256
-                                  NBLK16       256
-                                  NBLK4        128
-                                  NUMSP        128
-
-     You will not normally need to change any of these,  if however you do
-     have to change some,  configure will confirm that you want to save the
-     changes before exiting,  and will give you further instructions on
-     rebuilding the unix kernel.
+using 'mkdev mouse'.  You may then use the OsMouse option in your XF86Config
+to specify that XFree86 should use the SCO mouse drivers.  To do this, set
+the Protocol to "OsMouse" in the Pointer section of your XF86Config file.
+You can also use "OsMouse" for your serial mouse, especially if you are hav-
+ing trouble getting your mouse to work using the XFree86 mouse drivers.
 
 4.  Switching Consoles
 
@@ -210,17 +101,21 @@ That is, Ctrl-PrntScr takes you to the next console along from the one X is
 running on.  If this is the last console it will take you to console 1. Ctrl-
 Alt-FXX, where XX is a function key between F1 and F12 will switch you to the
 console number assigned to that function key. F1 corresponds to tty01 (or
-console 1), F2 corresponds to tty02 (or console 2) etc.  Those interested in
-modifying the console switching should look in xc/pro-
-grams/Xserver/hw/xfree86/common/xf86Events.c.
+console 1), F2 corresponds to tty02 (or console 2) etc.
+
+Unlike the SCO X server, the "kill me now" key is Alt+Ctrl+Backspace.  This
+does not ask for confirmation, it simply kills the X server as immediately as
+possible.  Use with extreme caution.  This may cause applications to termi-
+nate in an unpredictable way.  You can set the DontZap option in the Server-
+Flags section of your XF86Config file to disable this.
 
 5.  Setting up Man Pages
 
 After compiling the tree, or after installing the binary distribution you can
 get man to recognise the XFree86 man pages by adding /usr/X11R6/man to the
-MANPATH in /etc/default/man, the line should look similar to:
+MANPATH in /etc/default/man. The line should look similar to:
 
-         MANPATH=/usr/man:/usr/X11R6/man
+         MANPATH=/usr/man:/usr/gnu/man:/usr/X11R6/man:/usr/local/man
 
 This allows all users to view the X man pages.  You may change your own MAN-
 PATH environment variable if you do not want everyone to access the man
@@ -228,325 +123,21 @@ pages.
 
 By default the man pages are compressed using ``compress'' to conserve space.
 If you do not want to compress the man pages change CompressManPages to NO in
-your ``xf86site.def'' file.  Those using the binary distribution can use
-``uncompress'' to uncompress the man pages.
+your ``host.def'' file.  Those using the binary distribution can use ``uncom-
+press'' to uncompress the man pages.  Binary distributions contain pre-for-
+matted versions of all man pages.  If you are compiling the server yourself,
+you need to have the GNU Tools package installed to get groff, the GNU nroff
+replacement, to format the man pages.  Use the manroff script to format the
+manual pages yourself.
 
 6.  Using SCO binaries/servers.
 
 XFree86 will accept connections from SCO binaries (R3 upwards) and the SCO R5
 server will also accept connections from XFree86 binaries. This means you may
 mix and match the two if you have ODT.  For example you may still use the
-Motif window manager (mwm) if you prefer.
-
-7.  Compiling XFree86 under Open Server 5
-
-As of GCC version 2.8.0, Open Server is supported. Configure it by using the
-following:
-
-         ./configure i486-sco3.2v5.0
-
-There is no reason to modify gcc in any way.  It compiles cleanly on Open
-Server 5.
-
-SCO Open Server 5.0 is recognised automatically by XFree86. You do not need
-to specify any BOOTSTRAPCFLAGS parameters when doing a make World. You can
-ignore the warning message about BOOTSTRAPCFLAGS at the very beginning of a
-make World.
-
-  1.  Fine tune ``site.def/xf86site.def''
-
-      Use GCC if you can. XFree should compile with the DevSys cc, but GCC
-      has better optimizations, and is guaranteed to work.
-
-  2.  SCO Open Server comes with Visual TCL, which is an old (and incompati-
-      ble) version of TCL. If you want to use XF86Setup you will have to com-
-      pile Tcl and Tk yourself. Both are supported well on SCO Open Server 5.
-      Tcl 7.6 and Tk 4.2 are available from ftp://ftp.smli.com/pub/tcl.
-
-  3.  You may want to disable dynamic loading support. Several users have
-      reported trouble with this. XIE and PEX5 definitely do not work. If you
-      want to experiment, try enabling this. Please report successes or fail-
-      ures to me.
-
-  4.  Do not enable the HasSVR3mmapDrv as you may have done in older versions
-      of SCO. Open Server 5 has full mmap() support, and this is used for
-      direct frame buffer access.
-
-  5.  If you know you will not ever be using COFF binaries, and you are short
-      of space, set ForceNormalLib to NO. Doing this will cause only the ELF
-      versions of the libraries to be built.  ``sco5.cf'' sets this to YES by
-      default, so you must explicitly set it to NO in ``xf86site.def''.  All
-      binaries are compiled in ELF mode to reduce space.
-
-8.  Relevant Documentation
-
-Some relevant documentation for SCO Users and Developers can be found in the
-following files.
-
-      README
-            the standard XFree86 README (/usr/X11R6/lib/X11/doc)
-
-      README.SVR3
-            Although a lot of this readme is based on Interactive a substan-
-            tial proportion is still relevant.
-
-      All of the VGA/Config documentation.
-            /usr/X11R6/lib/X11/doc/VideoModes.doc and the README files for
-            particular video cards.
-
-9.  Known Problems
-
-   o After running the server you may see some strange characters in your
-     input to the shell.  This is due to some unprocessed scancodes and is of
-     no concern.  This will be fixed in a future release.
-
-   o Not all of the applications in /usr/X11R6/bin have been debugged.
-
-10.  Trouble Shooting
-
-      Problem:
-
-                 The server does not start up,  and I cannot tell what
-                 is going wrong as it did not print any error messages.
-
-      Causes:
-
-                 There can be any number of causes why the server
-                 doesn't start.  The first step is to find out what the
-                 server has to say.  To do this we have to catch the
-                 error output of the server into a file.  This output
-                 contains a log of what the server is finding/doing as
-                 it starts up.  To get this output run:
-
-                                     startx 2> /tmp/errs
-
-                 The output of the server will now be in "/tmp/errs".
-                 You should look through this output for possible prob-
-                 lems,  and then check here in this document for any
-                 references to the problems you are seeing.
-
-      Problem:
-
-                 The server starts up,  the screen goes blank,  and I
-                 never see anything else.  It appears that my machine
-                 has hung.
-
-      Causes:
-
-                 Again this can have many causes.  Most likely your
-                 XF86Config is wrong.  You should be able to kill the
-                 server by typing Ctrl-Alt-BackSpace,  if it is still
-                 running.  If this does not restore your display then
-                 you may have to drive your system blind.  Always keep
-                 another login running at the shell prompt so that you
-                 may switch to that screen and run commands even if you
-                 cannot see anything on the screen.  Try these things,
-                 usually in the order given:
-
-                    o log out of the login where you started ``X'' and
-                      then change consoles.  This will cause the SCO
-                      screen switching code to try to reset the card.
-
-                    o run ``vidi v80x25'',  this command will also try
-                      to set your card into a viewable mode.
-
-                    o shutdown the machine cleanly with ``shutdown'' and
-                      try again.
-
-                 When first trying to get XFree86 to run,  be sure to
-                 use a simple setup.  Get 640x480 working first then
-                 move on to higher resolutions.  Always trap the output
-                 of the server as shown earlier.  Once you have the
-                 valid clocks for your video card (as provided in the
-                 server output),  hard code them into your XF86Config as
-                 this will take some strain off your monitor during
-                 XFree86 startup where it usually probes the various
-                 clock frequencies.  Getting the ``X'' screen to appear
-                 can be a painfully slow task.  Be patient and read as
-                 much of the doco as you can handle.  You will get it to
-                 work.
-
-      Problem:
-
-                                 Fatal server error:
-                                 xf86MapVidMem:No class map defined for (XXXXX,XXXXX)
-
-      Causes:
-
-                   1.  Your system does not have the correct
-                       /etc/conf/pack.d/cn/class.h, You can confirm this
-                       by editing the file and looking for the string
-                       "SVGA", if it is not there then you should re-
-                       install this file from the "Extended Utilities"
-                       diskettes provided with your OS.  If this is not
-                       possible then installing the "dmmap" driver from
-                       the distribution may allow the server to operate
-                       correctly.
-
-      Problem:
-
-                 xf86install does not work.
-
-      Causes:
-
-                 You should not be running xf86install when using the
-                 XFree86 server under SCO.  It is used for Interactive
-                 (ISC) installations.
-
-      Problem:
-
-                 The server starts but the screen is not aligned cor-
-                 rectly or is shaky and impossible to view.
-
-      Causes:
-
-                 This is most likely due to an incorrect XF86Config
-                 setup.  Look for the files README.Config  Video-
-                 Modes.doc (in /usr/X11R6/lib/X11/doc with the binary
-                 distribution).  These files explains how to fix up your
-                 video modes.
-
-      Problem:
-
-              1.  Can only run a limited number of xterms.
-
-              2.  xterm does not work but other programs like xclock do work.
-
-      Causes:
-
-                 Not enough or no pseudo ttys devices are present on
-                 your system.  Run "mkdev ptty" and increase the number
-                 of ptty's.
-
-      Problem:
-
-                 When running curses/termcap applications in an xterm
-                 the output gets corrupted especially when scrolling.
-
-      Causes:
-
-              1.  You are running an original 1.3 distribution of XFree86.
-                  Update to the latest version (3.2 or greater).
-
-              2.  You have resized the window and not ran "eval `resize`"
-                  before using your application.  The SCO operating system
-                  does not support dynamic resizing of xterms fully so this
-                  command must be run after resizing an xterm in order for
-                  curses/termcap applications to operate correctly.
-
-      Problem:
-
-              1.  When starting X it dies with an error "Cannot access a
-                  needed shared library".
-
-              2.  When starting an X application is dies with the above
-                  error.
-
-      Causes:
-
-              1.  You do not have the binaries installed in the correct
-                  directory.  Check that they are in /usr/X11R6
-
-              2.  You have upgraded to a new binary distribution which has a
-                  new version of the shared libraries which are not compati-
-                  ble with your old binaries.  To fix this you will need to
-                  re-install the old shared libraries or recompile your
-                  application against the new libraries.
-
-      Problem:
-
-                 When linking against the SCO motif library I get an
-                 unresolved external for "XtDisplayStringConversionWarn-
-                 ing" when using gcc.
-
-      Causes:
-
-                 The SCO library is compiled with limited length identi-
-                 fiers.  To work around this add the following code to
-                 your application when compiling under XFree86 with gcc
-                 and SCO motif.
-
-                          #ifdef SCO
-                          void XtDisplayStringConversionWarnin(dpy, from, toType)
-                              Display*  dpy;
-                              String    from;
-                              String    toType;
-                          { XtDisplayStringConversionWarning(dpy, from, toType); }
-                          #endif
-
-      Problem:
-
-                 The server fails to run and prints out a line similar
-                 to:
-
-                 XFree86: Cannot open /dev/spx for ???? listener: No
-                 such file or directory
-
-      Causes:
-
-                 All SCO unix installations appear to have the Streams
-                 pseudo tty driver installed, but not all the devices
-                 are present.
-
-                   1.  there should be a /etc/conf/pack.d/sp directory,
-
-                   2.  /etc/conf/sdevice.d/sp should have a 'Y' in it.
-
-                   3.  You need a file in /etc/conf/node.d which con-
-                       tains something like:
-
-                                    clone  spx       c    sp
-                                    sp     X0S       c    127
-                                    sp     X0R       c    126
-                                    sp     X1S       c    125
-                                    sp     X1R       c    124
-                                    sp     X2S       c    123
-                                    sp     X2R       c    122
-                                    sp     X3S       c    121
-                                    sp     X3R       c    120
-                                    sp     X4S       c    119
-                                    sp     X4R       c    118
-                                    sp     X5S       c    117
-                                 sp   X5R       c    116
-                                    sp     X6S       c    115
-                                    sp     X6R       c    114
-                                    sp     X7S       c    113
-                                    sp     X7R       c    112
-
-                 if you don't have something like this (maybe called
-                 "Xsco") then create one and that should fix your prob-
-                 lem.  As far as I can tell the streams pseudo tty
-                 driver should be there.
-
-                 The simplest way to get the devices if you had to cre-
-                 ate this file is to rebuild the kernel and the environ-
-                 ment.  If you don't want to do this then:
-
-                              touch /etc/.new_unix
-                              cd /etc/conf/bin
-                              ./idmkenv
-
-                 and try it out.
-
-11.  Acknowledgements
-
-Thanks to the Core team for their previous and continuing help with the SCO
-work.  Many thanks to Stacey Campbell at SCO for all the advice and insights
-provided.  Thanks to SCO in general for making information available for
-XFree86 development.
-
-Thanks also to Peter Eubert (peter.eubert@iwb.mw.tu-muenchen.dbp.de) and Kent
-Hamilton (kenth@stl.scscom.COM) for input on compiling under 3.2.4 systems.
-Larry Plona (faxi@world.std.com) and Didier Poirot (dp@chorus.fr) for their
-input on xdm and 3.2.4 compilation under 3.1.   And of course the beta list
-for its input on everything.
-
-Special thanks to Jerry Whelan (guru@stasi.bradley.edu) for providing an ftp
-site for the binary distribution.
-
-     Generated from XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/SCO.sgml,v 3.18 2001/06/30 22:41:48 tsi Exp $
+Panning Motif window manager (pmwm) if you prefer.
 
-     $XConsortium: SCO.sgml /main/11 1996/10/23 11:45:55 kaleb $
+     Generated from XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/SCO.sgml,v 3.22 2003/02/17 18:58:07 dawes Exp $
 
 
-$XFree86: xc/programs/Xserver/hw/xfree86/doc/README.SCO,v 3.32 2001/06/30 22:58:10 tsi Exp $
+$XFree86: xc/programs/Xserver/hw/xfree86/doc/README.SCO,v 3.34 2003/02/17 18:59:41 dawes Exp $
diff --git a/xc/programs/Xserver/hw/xfree86/doc/README.Solaris b/xc/programs/Xserver/hw/xfree86/doc/README.Solaris
index eccf3615c..b02a89c9a 100644
--- a/xc/programs/Xserver/hw/xfree86/doc/README.Solaris
+++ b/xc/programs/Xserver/hw/xfree86/doc/README.Solaris
@@ -212,11 +212,9 @@ ever a number of ioctl() calls are broken.
 
 6.  Bug Notification
 
-Bug reports should be sent to one of the XFree86@XFree86.org,
-Xpert@XFree86.org, or Newbie@XFree86.org (depending on your level of com-
-fort).
+Bug reports should be sent to <XFree86@XFree86.org>.
 
-     Generated from XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/Solaris.sgml,v 1.3 2002/01/25 21:55:53 tsi Exp $
+     Generated from XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/Solaris.sgml,v 1.4 2003/01/04 04:20:23 dawes Exp $
 
 
-$XFree86: xc/programs/Xserver/hw/xfree86/doc/README.Solaris,v 1.3 2002/01/28 22:24:17 tsi Exp $
+$XFree86: xc/programs/Xserver/hw/xfree86/doc/README.Solaris,v 1.4 2003/01/04 04:28:27 dawes Exp $
diff --git a/xc/programs/Xserver/hw/xfree86/doc/README.XKB-Config b/xc/programs/Xserver/hw/xfree86/doc/README.XKB-Config
new file mode 100644
index 000000000..a2faba586
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/doc/README.XKB-Config
@@ -0,0 +1,198 @@
+                         The XKB Configuration Guide
+
+                         Kamil Toman, Ivan U. Pascal
+
+                              25 November 2002
+
+                                  Abstract
+
+     This document describes how to configure XFree86 XKB from a user's
+     point a few. It converts basic configuration syntax and gives also
+     a few examples.
+
+1.  Overview
+
+The XKB configuration is decomposed into a number of components. Selecting
+proper parts and combining them back you can achieve most of configurations
+you might need. Unless you have a completely atypical keyboard you really
+don't need to touch any of xkb configuration files.
+
+2.  Selecting XKB Configuration
+
+The easiest and the most natural way how to specify a keyboard mapping is tu
+use rules component. As its name suggests it describes a number of general
+rules how to combine all bits and pieces into a valid and useful keyboard
+mapping. All you need to do is to select a suitable rules file and then to
+feed it with a few parameters that will adjust the keyboard behaviour to ful-
+fill your needs.
+
+The parameters are:
+
+   o XkbRules - files of rules to be used for keyboard mapping composition
+
+   o XkbModel - name of model of your keyboard type
+
+   o XkbLayout - layout(s) you intend to use
+
+   o XkbVariant - variant(s) of layout you intend to use
+
+   o XkbOptions - extra xkb configuration options
+
+The proper rules file depends on your vendor. In reality, the commonest file
+of rules is xfree86. For each rules file there is a description file named
+<vendor-rules>.lst, for instance xfree86.lst which is located in xkb configu-
+ration subdirectory rules (for example /etc/X11/xkb/rules).
+
+2.1  Basic Configuration
+
+Let's say you want to configure a PC style America keyboard with 104 keys as
+described in xfree86.lst. It can be done by simply writing several lines from
+below to you XFree86 configuration file (often found as /etc/X11/XF86Config-4
+or /etc/X11/XF86Config):
+
+     Section "InputDevice"
+         Identifier "Keyboard1"
+         Driver "Keyboard"
+
+         Option "XkbModel" "pc104"
+         Option "XkbLayout" "us"
+         Option "XKbOptions" ""
+     EndSection
+
+The values of parameters XkbModel and XkbLayout are really not surprising.
+The parameters XkbOptions has been explicitly set to empty set of parameters.
+The parameter XkbVariant has been left out.  That means the default variant
+named basic is loaded.
+
+Of course, this can be also done at runtime using utility setxkbmap.  Shell
+command loading the same keyboard mapping would look like:
+
+     setxkbmap -rules xfree86 -model pc104 -layout us -option ""
+
+The configuration and the shell command would be very analogical for most
+other layouts (internationalized mappings).
+
+2.2  Advanced Configuration
+
+Since XFree86 4.3.x you can use multi-layouts xkb configuration.  What does
+it mean? Basically it allows to load up to four different keyboard layouts at
+a time. Each such layout would reside in its own group. The groups (unlike
+complete keyboard remapping) can be switched very fast from one to another by
+a combination of keys.
+
+Let's say you want to configure your new Logitech cordless desktop keyboard,
+you intend to use three different layouts at the same time - us, czech and
+german (in this order), and that you are used to Alt-Shift combination for
+switching among them.
+
+Then the configuration snippet could look like this:
+
+     Section "InputDevice"
+         Identifier "Keyboard1"
+         Driver "Keyboard"
+
+         Option "XkbModel" "logicordless"
+         Option "XkbLayout" "us,cz,de"
+         Option "XKbOptions" "grp:alt_shift_toggle"
+     EndSection
+
+Of course, this can be also done at runtime using utility setxkbmap.  Shell
+command loading the same keyboard mapping would look like:
+
+     setxkmap -rules xfree86 -model logicordless -layout "us,cz,de" \
+              -option "grp:alt_shift_toggle"
+
+2.3  Even More Advanced Configuration
+
+Okay, let's say you are more demanding. You do like the example above but you
+want it to change a bit. Let's imagine you want the czech keyboard mapping to
+use another variant but basic.  The configuration snippet then changes into:
+
+     Section "InputDevice"
+         Identifier "Keyboard1"
+         Driver "Keyboard"
+
+         Option "XkbModel" "logicordless"
+         Option "XkbLayout" "us,cz,de"
+         Option "XkbVariant" ",bksl,"
+         Option "XKbOptions" "grp:alt_shift_toggle"
+     EndSection
+
+That's seems tricky but it is not. The logic for settings of variants is the
+same as for layouts, that means the first and the third variant settings are
+left out (set to basic), the second is set to bksl (a special variant with an
+enhanced definition of the backslash key).
+
+Analogically, the loading runtime will change to:
+
+     setxkmap -rules xfree86 -model logicordless -layout "us,cz,de" \
+              -variant ",bksl," -option "grp:alt_shift_toggle"
+
+2.4  Basic Global Options
+
+See rules/*.lst files.
+
+3.  Direct XKB Configuration
+
+Generally, you can directly prescribe what configuration of each of basic xkb
+components should be used to form the resulting keyboard mapping.  This
+method is rather "brute force". You precisely need to know the structure and
+the meaning of all of used configuration components.
+
+This method also exposes all xkb configuration details directly into XFree86
+configuration file which is a not very fortunate fact.  In rare occasions it
+may be needed, though. So how does it work?
+
+3.1  Basic Components
+
+There are five basic components used to form a keyboard mapping:
+
+   o key codes - a translation of the scan codes produced by the keyboard
+     into a suitable symbolic form
+
+   o types - a specification of what various combinations of modifiers pro-
+     duce
+
+   o key symbols - a translation of symbolic key codes into actual symbols
+
+   o geometry - a description of physical keyboard geometry
+
+   o compatibility maps - a specification of what action should each key pro-
+     duce in order to preserve compatibility with XKB-unware clients
+
+3.2  Example Configuration
+
+Look at the following example:
+
+     Section "InputDevice"
+         Identifier "Keyboard0"
+         Driver "Keyboard"
+
+         Option "XkbKeycodes" "xfree86"
+         Option "XkbTypes"    "default"
+         Option "XkbSymbols"  "en_US(pc104)+de+swapcaps"
+         Option "XkbGeometry" "pc(pc104)"
+         Option "XkbCompat"   "basic+pc+iso9995"
+     EndSection
+
+This configuration sets the standard XFree86 default interpretation of key-
+board keycodes, sets the default modificator types. The symbol table is com-
+posed of extended US keyboard layout in its variant for pc keyboards with 104
+keys plus all keys for german layout are redefined respectively. Also the
+logical meaning of Caps-lock and Control keys is swapped.  The standard key-
+board geometry (physical look) is set to pc style keyboard with 104 keys. The
+compatibility map is set to allow basic shifting, to allow Alt keys to be
+interpreted and also to allow iso9995 group shifting.
+
+4.  Keymap XKB Configuration
+
+It is the formerly used way to configure xkb. The user included a special
+keymap file which specified the direct xkb configuration. This method has
+been obsoleted by previously described rules files which are far more flexi-
+ble and allow simpler and more intuitive syntax. It is preserved merely for
+compatibility reasons. Avoid using it if it is possible.
+
+     Generated from XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/XKB-Config.sgml,v 1.2 2003/02/25 19:31:02 dawes Exp $
+
+
+$XFree86: xc/programs/Xserver/hw/xfree86/doc/README.XKB-Config,v 1.2 2003/02/25 21:32:35 dawes Exp $
diff --git a/xc/programs/Xserver/hw/xfree86/doc/README.XKB-Enhancing b/xc/programs/Xserver/hw/xfree86/doc/README.XKB-Enhancing
new file mode 100644
index 000000000..0c5a0b5fb
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/doc/README.XKB-Enhancing
@@ -0,0 +1,511 @@
+                  How to further enhance XKB configuration
+
+                         Kamil Toman, Ivan U. Pascal
+
+                              25 November 2002
+
+                                  Abstract
+
+     This guide is aimed to relieve one's labour to create a new (inter-
+     nationalized) keyboard layout. Unlike other documents this guide
+     accents the keymap developer's point of view.
+
+1.  Overview
+
+The developer of a new layout should read the xkb protocol specification (The
+X Keyboard Extension: Protocol Specification <URL:http://www.x-
+docs.org/XKB/XKBproto.pdf>) at least to clarify for himself some xkb-specific
+terms used in this document and elsewhere in xkb configuration. Also it shows
+wise to understand how the X server and a client digest their keyboard inputs
+(with and without xkb).
+
+A useful source is also Ivan  Pascal's text about xkb configuration
+<URL:http://www.tsu.ru/~pascal/en/xkb> often referenced throughout this docu-
+ment.
+
+Note that this document covers only enhancements which are to be made to
+XFree86 version 4.3.x and above.
+
+2.  The Basics
+
+At the startup (or at later at user's command) X server starts its xkb key-
+board module extension and reads data from a compiled configuration file.
+
+This compiled configuration file is prepared by the program xkbcomp which
+behaves altogether as an ordinary compiler (see man xkbcomp).  Its input are
+human readable xkb configuration files which are verified and then composed
+into a useful xkb configuration. Users don't need to mess with xkbcomp them-
+selves, for them it is invisible. Usually, it is started upon X server
+startup.
+
+As you probably already know, the xkb configuration consists of five main
+modules:
+
+      Keycodes
+            Tables that defines translation from keyboard scan codes into
+            reasonable symbolic names, maximum, minimum legal keycodes, sym-
+            bolic aliases and description of physically present LED-indica-
+            tors. The primary sence of this component is to allow definitions
+            of maps of symbols (see below) to be independent of physical key-
+            board scancodes. There are two main naming conventions for sym-
+            bolic names (always four bytes long):
+
+               o  names which express some traditional meaning like <SPCE>
+                 (stands for space bar) or
+
+               o  names which express some relative positioning on a key-
+                 board, for example <AE01> (an exclamation mark on US key-
+                 boards), on the right there are keys <AE02>, <AE03> etc.
+
+      Types
+            Types describe how the produced key is changed by active modi-
+            fiers (like Shift, Control, Alt, ...). There are several prede-
+            fined types which cover most of used combinations.
+
+      Compat
+            Compatibility component defines internal behaviour of modifiers.
+            Using compat component you can assign various actions (elabo-
+            rately described in xkb specification) to key events. This is
+            also the place where LED-indicators behaviour is defined.
+
+      Symbols
+            For i18n purposes, this is the most important table. It defines
+            what values (=symbols) are assigned to what keycodes (represented
+            by their symbolic name, see above). There may be defined more
+            than one value for each key and then it depends on a key type and
+            on modifiers state (respective compat component) which value will
+            be the resulting one.
+
+      Geometry
+            Geometry files aren't used by xkb itself but they may be used by
+            some external programs to depict a keyboard image.
+
+All these components have the files located in xkb configuration tree in sub-
+directories with the same names (usually in /usr/lib/X11/xkb).
+
+3.  Enhancing XKB Configuration
+
+Most of xkb enhancements concerns a need to define new output symbols for the
+some input key events. In other words, a need to define a new symbol map (for
+a new language, standard or just to feel more comfortable when typing text).
+
+What do you need to do? Generally, you have to define following things:
+
+   o  the map of symbols itself
+
+   o  the rules to allow users to select the new mapping
+
+   o  the description of the new layout
+
+First of all, it is good to go through existing layouts and to examine them
+if there is something you could easily adjust to fit your needs.  Even if
+there is nothing similar you may get some ideas about basic concepts and used
+tricks.
+
+3.1  Levels And Groups
+
+Since XFree86 4.3.0 you can use multi-layout concept of xkb configuration.
+Though it is still in boundaries of xkb protocol and general ideas, the
+keymap designer must obey new rules when creating new maps. In exchange we
+get a more powerful and cleaner configuration system.
+
+Remember that it is the application which must decide which symbol matches
+which keycode according to effective modifier state. The X server itself
+sends only an input event message to. Of course, usually the general inter-
+pretation is processed by Xlib, Xaw, Motif, Qt, Gtk and similar libraries.
+The X server only supplies its mapping table (usually upon an application
+startup).
+
+You can think of the X server's symbol table as of a irregular table where
+each keycode has its row and where each combination of modifiers determines
+exactly one column. The resulting cell then gives the proper symbolic value.
+Not all keycodes need to bind different values for different combination of
+modifiers.  <ENTER> key, for instance, usually doesn't depend on any modi-
+fiers so it its row has only one column defined.
+
+Note that in XKB there is no prior assumption that certain modifiers are
+bound to certain columns. By editing proper files (see keytypes (section 4.2,
+page 1)) this mapping can be changed as well.
+
+Unlike the original X protocol the XKB approach is far more flexible. It is
+comfortable to add one additional XKB term - group. You can think of a group
+as of a vector of columns per each keycode (naturally the dimension of this
+vector may differ for different keycodes). What is it good for? The group is
+not very useful unless you intend to use more than one logically different
+set of symbols (like more than one alphabet) defined in a single mapping
+table. But then, the group has a natural meaning - each symbol set has its
+own group and changing it means selecting a different one.  XKB approach
+allows up to four different groups. The columns inside each group are called
+(shift) levels. The X server knows the current group and reports it together
+with modifier set and with a keycode in key events.
+
+To sum it up:
+
+   o  for each keycode XKB keyboard map contains up to four one-dimensional
+     tables - groups (logically different symbol sets)
+
+   o  for each group of a keycode XKB keyboard map contains some columns -
+     shift levels (values reached by combinations of Shift, Ctrl, Alt, ...
+     modifiers)
+
+   o  different keycodes can have different number of groups
+
+   o  different groups of one keycode can have different number of shift lev-
+     els
+
+   o  the current group number is tracked by X server
+
+It is clear that if you sanely define levels, groups and sanely bind modi-
+fiers and associated actions you can have simultaneously loaded up to four
+different symbol sets where each of them would reside in its own group.
+
+The multi-layout concept provides a facility to manipulate xkb groups and
+symbol definitions in a way that allows almost arbitrary composition of pre-
+defined symbol tables. To keep it fully functional you have to:
+
+   o  define all symbols only in the first group
+
+   o  (re)define any modifiers with extra care to avoid strange (anisometric)
+     behaviour
+
+4.  Defining New Layouts
+
+See Some Words  About XKB internals <URL:http://www.tsu.ru/~pas-
+cal/en/xkb/internals.html> for explanation of used xkb terms and problems
+addressed by XKB extension.
+
+See Common  notes about XKB configuration files language
+<URL:http://www.tsu.ru/~pascal/en/xkb/gram-common.html> for more precise
+explanation of syntax of xkb configuration files.
+
+4.1  Predefined XKB Symbol Sets
+
+If you are about to define some European symbol map extension, you might want
+to use on of four predefined latin alphabet layouts.
+
+Okay, let's assume you want extend an existing keymap and you want to over-
+ride a few keys. Let's take a simple U.K. keyboard as an example (defined in
+pc/gb):
+
+     partial default alphanumeric_keys
+     xkb_symbols "basic" {
+       include "pc/latin"
+
+       name[Group1]="Great Britain";
+
+       key <AE02>  { [         2,   quotedbl,  twosuperior,    oneeighth ] };
+       key <AE03>  { [         3,   sterling, threesuperior,    sterling ] };
+       key <AC11>  { [apostrophe,         at, dead_circumflex, dead_caron] };
+       key <TLDE>  { [     grave,    notsign,          bar,          bar ] };
+       key <BKSL>  { [numbersign, asciitilde,   dead_grave,   dead_breve ] };
+       key <RALT>  { type[Group1]="TWO_LEVEL",
+                     [ ISO_Level3_Shift, Multi_key ]   };
+
+       modifier_map Mod5   { <RALT> };
+     };
+
+It defines a new layout in basic variant as an extension of common latin
+alphabet layout. The layout (symbol set) name is set to "Great Britain".
+Then there are redefinitions of a few keycodes and a modifiers binding. As
+you can see the number of shift levels is the same for <AE02>, <AE03>,
+<AC11>, <TLDE> and <BKSL> keys but it differs from number of shift levels of
+<RALT>.
+
+Note that the <RALT> key itself is a binding key for Mod5 and that it serves
+like a shift modifier for LevelThree, together with Shift as a multi-key. It
+is a good habit to respect this rule in a new similar layout.
+
+Okay, you could now define more variants of your new layout besides basic
+simply by including (augmenting/overriding/...) the basic definition and
+altering what may be needed.
+
+4.2  Key Types
+
+The differences in the number of columns (shift levels) are caused by a dif-
+ferent types of keys (see the types definition in section basics).  Most key-
+codes have implicitly set the keytype in the included "pc/latin" file to
+"FOUR_LEVEL_ALPHABETIC". The only exception is <RALT> keycode which is
+explicitly set "TWO_LEVEL" keytype.
+
+All those names refer to pre-defined shift level schemes. Usually you can
+choose a suitable shift level scheme from default types scheme list in proper
+xkb component's subdirectory.
+
+The most used schemes are:
+
+      ONE_LEVEL
+            The key does not depend on any modifiers. The symbol from first
+            level is always chosen.
+
+      TWO_LEVEL
+            The key uses a modifier Shift and may have two possible values.
+            The second level may be chosen by Shift modifier. If Lock modi-
+            fier (usually Caps-lock) applies the symbol is further processed
+            using system-specific capitalization rules. If both Shift+Lock
+            modifier apply the symbol from the second level is taken and cap-
+            italization rules are applied (and usually have no effect).
+
+      ALPHABETIC
+            The key uses modifiers Shift and Lock. It may have two possible
+            values. The second level may be chosen by Shift modifier. When
+            Lock modifier applies, the symbol from the first level is taken
+            and further processed using system-specific capitalization rules.
+            If both Shift+Lock modifier apply the symbol from the first level
+            is taken and no capitalization rules applied. This is often
+            called shift-cancels-caps behaviour.
+
+      THREE_LEVEL
+            Is the same as TWO_LEVEL but it considers an extra modifier -
+            LevelThree which can be used to gain the symbol value from the
+            third level. If both Shift+LevelThree modifiers apply the value
+            from the third level is also taken. As in TWO_LEVEL, the Lock
+            modifier doesn't influence the resulting level. Only Shift and
+            LevelThree are taken into that consideration. If the Lock modi-
+            fier is active capitalization rules are applied on the resulting
+            symbol.
+
+      FOUR_LEVEL
+            Is the same as THREE_LEVEL but unlike LEVEL_THREE if both
+            Shift+LevelThree modifiers apply the symbol is taken from the
+            fourth level.
+
+      FOUR_LEVEL_ALPHABETIC
+            Is similar to FOUR_LEVEL but also defines shift-cancels-caps
+            behaviour as in ALPHABETIC. If Lock+LevelThree apply the symbol
+            from the third level is taken and the capitalization rules are
+            applied.  If Lock+Shift+LevelThree apply the symbol from the
+            third level is taken and no capitalization rules are applied.
+
+      KEYPAD
+            As the name suggest this scheme is primarily used for numeric
+            keypads.  The scheme considers two modifiers - Shift and NumLock.
+            If none of modifiers applies the symbol from the first level is
+            taken. If either Shift or NumLock modifiers apply the symbol from
+            the second level is taken.  If both Shift+NumLock modifiers apply
+            the symbol from the first level is taken. Again, shift-cancels-
+            caps variant.
+
+      FOUR_LEVEL_KEYPAD
+            Is similar to KEYPAD scheme but considers also LevelThree modi-
+            fier.  If LevelThree modifier applies the symbol from the third
+            level is taken.  If Shift+LevelThree or NumLock+LevelThree apply
+            the symbol from the fourth level is taken. If all Shift+Num-
+            Lock+LevelThree modifiers apply the symbol from the third level
+            is taken. This also, shift-cancels-caps variant.
+
+Besides that, there are several schemes for special purposes:
+
+      PC_BREAK
+            It is similar to TWO_LEVEL scheme but it considers the Control
+            modifier rather than Shift. That means, the symbol from the sec-
+            ond level is chosen by Control rather than by Shift.
+
+      PC_SYSRQ
+            It is similar to TWO_LEVEL scheme but it considers the Alt modi-
+            fier rather than Shift. That means, the symbol from the second
+            level is chosen by Alt rather than by Shift.
+
+      CTRL+ALT
+            The key uses modifiers Alt and Control. It may have two possible
+            values. If only one modifier (Alt or Control) applies the symbol
+            from the first level is chosen. Only if both Alt+Control modi-
+            fiers apply the symbol from the second level is chosen.
+
+      SHIFT+ALT
+            The key uses modifiers Shift and Alt. It may have two possible
+            values.  If only one modifier (Alt or Shift) applies the symbol
+            from the first level is chosen. Only if both Alt+Shift modifiers
+            apply the symbol from the second level is chosen.
+
+If needed, special caps schemes may be used. They redefine the standard
+behaviour of all *ALPHABETIC types. The layouts (maps of symbols) with keys
+defined in respective types then automatically change their behaviour accord-
+ingly. Possible redefinitions are:
+
+   o internal
+
+   o internal_nocancel
+
+   o shift
+
+   o shift_nocancel
+
+None of these schemes should be used directly. They are defined merely for
+'caps:' xkb options (used to globally change the layouts behaviour).
+
+Don't alter any of existing key types. If you need a different behaviour cre-
+ate a new one.
+
+4.2.1  More On Definitions Of Types
+
+When the XKB software deals with a separate type description it gets a com-
+plete list of modifiers that should be taken into account from the 'modi-
+fiers=<list of modifiers>' list and expects that a set of 'map[<combination
+of modifiers>]=<list of modifiers>' instructions that contain the mapping for
+each combination of modifiers mentioned in that list. Modifiers that are not
+explicitly listed are NOT taken into account when the resulting shift level
+is computed.  If some combination is omitted the program (subroutine) should
+choose the first level for this combination (a quite reasonable behavior).
+
+Lets consider an example with two modifiers ModOne and ModTwo:
+
+     type "..." {
+         modifiers = ModOne+ModTwo;
+         map[None] = Level1;
+         map[ModOne] = Level2;
+     };
+
+In this case the map statements for ModTwo only and ModOne+ModTwo are omit-
+ted.  It means that if the ModTwo is active the subroutine can't found
+explicit mapping for such combination an will use the default level i.e.
+Level1.
+
+But in the case the type described as:
+
+     type "..." {
+         modifiers = ModOne;
+         map[None] = Level1;
+         map[ModOne] = Level2;
+     };
+
+the ModTwo will not be taken into account and the resulting level depends on
+the ModOne state only. That means, ModTwo alone produces the Level1 but the
+combination ModOne+ModTwo produces the Level2 as well as ModOne alone.
+
+What does it mean if the second modifier is the Lock? It means that in the
+first case (the Lock itself is included in the list of modifiers but combina-
+tions with this modifier aren't mentioned in the map statements) the internal
+capitalization rules will be applied to the symbol from the first level. But
+in the second case the capitalization will be applied to the symbol chosen
+accordingly to he first modifier - and this can be the symbol from the first
+as well as from the second level.
+
+Usually, all modifiers introduced in 'modifiers=<list of modifiers>' list are
+used for shift level calculation and then discarded. Sometimes this is not
+desirable. If you want to use a modifier for shift level calculation but you
+don't want to discard it, you may list in 'preserve[<combination of modi-
+fiers>]=<list of modifiers>'. That means, for a given combination all listed
+modifiers will be preserved. If the Lock modifier is preserved then the
+resulting symbol is passed to internal capitalization routine regardless
+whether it has been used for a shift level calculation or not.
+
+Any key type description can use both real and virtual modifiers. Since real
+modifiers always have standard names it is not necessary to explicitly
+declare them. Virtual modifiers can have arbitrary names and can be declared
+(prior using them) directly in key type definition:
+
+     virtual_modifiers <comma-separated list of modifiers>  ;
+
+as seen in for example basic, pc or mousekeys key type definitions.
+
+4.3  Rules
+
+Once you are finished with your symbol map you need to add it to rules file.
+The rules file describes how all the five basic keycodes, types, compat, sym-
+bols and geometry components should be composed to give a sensible resulting
+xkb configuration.
+
+The main advantage of rules over formerly used keymaps is a possibility to
+simply parameterize (once) fixed patterns of configurations and thus to ele-
+gantly allow substitutions of various local configurations into predefined
+templates.
+
+A pattern in a rules file (often located in /usr/lib/X11/xkb/rules) can be
+parameterized with four other arguments: Model, Layout, Variant and Options.
+For most cases parameters model and layout should be sufficient for choosing
+a functional keyboard mapping.
+
+The rules file itself is composed of pattern lines and lines with rules. The
+pattern line starts with an exclamation mark ('!') and describes how will the
+xkb interpret the following lines (rules). A sample rules file looks like
+this:
+
+     ! model                   =   keycodes
+       macintosh_old                     =   macintosh
+       ...
+       *                       =   xfree86
+
+     ! model                        =   symbols
+       hp                      =   +inet(%m)
+       microsoftpro                 =   +inet(%m)
+       geniuscomfy                  =   +inet(%m)
+
+     ! model       layout[1]          = symbols
+       macintosh    us           = macintosh/us%(v[1])
+       *             *               =       pc/pc(%m)+pc/%l[1]%(v[1])
+
+     ! model     layout[2]            = symbols
+       macintosh     us              =  +macintosh/us[2]%(v[2]):2
+       *       *               =   +pc/%l[2]%(v[2]):2
+
+     ! option            =    types
+       caps:internal               =    +caps(internal)
+       caps:internal_nocancel =    +caps(internal_nocancel)
+
+Each rule defines what certain combination of values on the left side of
+equal sign ('=') results in. For example a (keyboard) model macintosh_old
+instructs xkb to take definitions of keycodes from file keycodes/macintosh
+while the rest of models (represented by a wild card '*') instructs it to
+take them from file keycodes/xfree86. The wild card represents all possible
+values on the left side which were not found in any of the previous rules.
+The more specialized (more complete) rules have higher precedence than gen-
+eral ones, i.e. the more general rules supply reasonable default values.
+
+As you can see some lines contain substitution parameters - the parameters
+preceded by the percent sign ('%'). The first alphabetical character after
+the percent sign expands to the value which has been found on the left side.
+For example +%l%(v) expands into +cz(bksl) if the respective values on the
+left side were cz layout in its bksl variant. More, if the layout resp. vari-
+ant  parameter is followed by a pair of brackets ('[', ']') it means that xkb
+should place the layout resp. variant into specified xkb group. If the brack-
+ets are omitted the first group is the default value.
+
+So the second block of rules enhances symbol definitions for some particular
+keyboard models with extra keys (for internet, multimedia, ...) . Other mod-
+els are left intact. Similarly, the last block overrides some key type defi-
+nitions, so the common global behaviour ''shift cancels caps'' or ''shift
+doesn't cancel caps'' can be selected. The rest of rules produces special
+symbols for each variant us layout of macintosh keyboard and standard pc sym-
+bols in appropriate variants as a default.
+
+4.4  Descriptive Files of Rules
+
+Now you just need to add a detailed description to <rules>.xml description
+file so the other users (and external programs which often parse this file)
+know what is your work about.
+
+4.4.1  Old Descriptive Files
+
+The formerly used descriptive files were named <rules>.lst Its structure is
+very simple and quite self descriptive but such simplicity had also some cav-
+ities, for example there was no way how to describe local variants of layouts
+and there were problems with the localization of descriptions. To preserve
+compatibility with some older programs, new XML descriptive files can be con-
+verted to old format '.lst'.
+
+For each parameter of rules file should be described its meaning. For the
+rules file described above the .lst file could look like:
+
+     ! model
+       pc104        Generic 104-key PC
+       microsoft    Microsoft Natural
+       pc98         PC-98xx Series
+       macintosh     Original Macintosh
+       ...
+
+     ! layout
+       us      U.S. English
+       cz      Czech
+       de      German
+       ...
+
+     ! option
+       caps:internal           uses internal capitalization. Shift cancels Caps
+       caps:internal_nocancel uses internal capitalization. Shift doesn't cancel Caps
+
+And that should be it. Enjoy creating your own xkb mapping.
+
+     Generated from XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/XKB-Enhancing.sgml,v 1.2 2003/02/25 19:31:02 dawes Exp $
+
+
+$XFree86: xc/programs/Xserver/hw/xfree86/doc/README.XKB-Enhancing,v 1.2 2003/02/25 21:32:35 dawes Exp $
diff --git a/xc/programs/Xserver/hw/xfree86/doc/README.ati b/xc/programs/Xserver/hw/xfree86/doc/README.ati
index 1754d0b6a..a7bf1715c 100644
--- a/xc/programs/Xserver/hw/xfree86/doc/README.ati
+++ b/xc/programs/Xserver/hw/xfree86/doc/README.ati
@@ -40,7 +40,7 @@ able itself to allow other drivers to examine the system.
 
 Note that I am currently considering removing the driver's support for
 generic VGA.  If you have any concerns about this, please contact me at
-tsi@xfree86.org.
+<tsi@xfree86.org>.
 
 2.  A note on acceleration
 
@@ -610,7 +610,7 @@ driver.  They include:
      ``odd-ball'' dimensions, such as 1400x1050, a resolution not commonly
      possible on CRTs or projection equipment.
 
-     Also, the display of independant images on the panel and CRT is not cur-
+     Also, the display of independent images on the panel and CRT is not cur-
      rently implemented, and might never be, pending resolution of the previ-
      ous item.
 
@@ -645,8 +645,8 @@ uncertain.
 Secondly, please check XFree86's doc directory for additional information.
 
 Thirdly, a scan through the comp.windows.x.i386unix and comp.os.linux.x news-
-groups and the newbie or xpert mailing lists using your favourite archiving
-service can also prove useful in resolving problems.
+groups and the xfree86 mailing list using your favourite archiving service
+can also prove useful in resolving problems.
 
 If you are still experiencing problems, you can send me non-HTMLised e-mail
 at <tsi@xfree86.org>.  Please be as specific as possible when describing the
@@ -703,7 +703,7 @@ newer driver API of XFree86 4.0 and later.
 The introduction of version 6 is a first swipe at porting the driver to non-
 Intel architectures.
 
-     Generated from XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/ati.sgml,v 3.40 2002/02/14 22:08:00 tsi Exp $
+     Generated from XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/ati.sgml,v 3.43 2003/02/25 19:31:02 dawes Exp $
 
 
-$XFree86: xc/programs/Xserver/hw/xfree86/doc/README.ati,v 3.60 2002/02/14 22:21:35 tsi Exp $
+$XFree86: xc/programs/Xserver/hw/xfree86/doc/README.ati,v 3.63 2003/02/25 21:32:35 dawes Exp $
diff --git a/xc/programs/Xserver/hw/xfree86/doc/README.chips b/xc/programs/Xserver/hw/xfree86/doc/README.chips
index 21aaa651d..1d747be4c 100644
--- a/xc/programs/Xserver/hw/xfree86/doc/README.chips
+++ b/xc/programs/Xserver/hw/xfree86/doc/README.chips
@@ -7,7 +7,7 @@
 
 1.  Introduction
 
-With the release of XFree86 version 4.2.0, the Chips and Technologies driver
+With the release of XFree86 version 4.3.0, the Chips and Technologies driver
 has been extensively rewritten and contains many new features.  This driver
 must be considered work in progress, and those users wanting stability are
 encouraged to use the older XFree86 3.3.x versions. However this version of
@@ -956,7 +956,7 @@ cause damage.
 
                         startx -- -depth 24 -fbbpp 32   8-8-8 RGB truecolor
 
-            however as XFree86 version 4.2.0 allows 32bpp pixmaps to be used
+            however as XFree86 version 4.3.0 allows 32bpp pixmaps to be used
             with framebuffers operating in 24bpp, this mode of operating will
             cost performance for no gain in functionality.
 
@@ -1030,4 +1030,4 @@ bugs and extensively testing this server.
      Generated from XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/chips.sgml,v 3.38 2001/10/01 13:44:02 eich Exp $
 
 
-$XFree86: xc/programs/Xserver/hw/xfree86/doc/README.chips,v 3.38 2001/11/15 17:37:22 dawes Exp $
+$XFree86: xc/programs/Xserver/hw/xfree86/doc/README.chips,v 3.43 2003/02/24 04:03:23 dawes Exp $
diff --git a/xc/programs/Xserver/hw/xfree86/doc/README.dps b/xc/programs/Xserver/hw/xfree86/doc/README.dps
index 1be1901c8..a07cd88ce 100644
--- a/xc/programs/Xserver/hw/xfree86/doc/README.dps
+++ b/xc/programs/Xserver/hw/xfree86/doc/README.dps
@@ -164,7 +164,7 @@ Developers. 15 April 1993.
 
 [PSWRAP] Display PostScript System. pswrap Reference Manual. 15 April 1993.
 
-     Generated from XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/dps.sgml,v 1.1 2001/03/02 02:45:37 dawes Exp $
+     Generated from XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/dps.sgml,v 1.2 2003/01/20 03:43:07 dawes Exp $
 
 
-$XFree86: xc/programs/Xserver/hw/xfree86/doc/README.dps,v 1.3 2001/06/01 18:28:42 dawes Exp $
+$XFree86: xc/programs/Xserver/hw/xfree86/doc/README.dps,v 1.4 2003/01/20 04:10:01 dawes Exp $
diff --git a/xc/programs/Xserver/hw/xfree86/doc/README.fonts b/xc/programs/Xserver/hw/xfree86/doc/README.fonts
index ab3e6eb99..fb1c1f5fb 100644
--- a/xc/programs/Xserver/hw/xfree86/doc/README.fonts
+++ b/xc/programs/Xserver/hw/xfree86/doc/README.fonts
@@ -2,31 +2,188 @@
 
                     Juliusz Chroboczek, <jch@xfree86.org>
 
-                              26 November 2001
+                               17 January 2003
 
 1.  Introduction
 
-This document describes the support for fonts in XFree86.  Section Installing
-fonts (section 2., page 1) is aimed at the casual user wishing to install
-fonts in the X server; the rest of the document describes the font support in
-more detail.
-
-We only describe font support within the core X protocol.  Issues relating to
-fonts within the RENDER extension, the GLX (OpenGL) extension or the PEX
-extension are outside the scope of this document.
+This document describes the support for fonts in XFree86.  Installing fonts
+(section 2., page 1) is aimed at the casual user wishing to install fonts in
+XFree86; the rest of the document describes the font support in more detail.
 
 We assume some familiarity with digital fonts.  If anything is not clear to
-you, please consult Appendix Background (section 6., page 1) at the end of
+you, please consult Appendix: Background (section 5., page 1) at the end of
 this document for background information.
 
+1.1  Two font systems
+
+XFree86 includes two font systems: the core X11 fonts system, which is pre-
+sent in all implementations of X11, and the Xft fonts system, which is not
+currently distributed with implementations of X11 that are not based on
+XFree86 but will hopefully be included by them in the future
+
+The core X11 fonts system is directly derived from the fonts system included
+with X11R1 in 1987, which could only use monochrome bitmap fonts.  Over the
+years, it has been more or less happily coerced into dealing with scalable
+fonts and rotated glyphs.
+
+Xft was designed from the start to provide good support for scalable fonts,
+and do so efficiently.  Unlike the core fonts system, it supports features
+such as anti-aliasing and sub-pixel rasterisation.  Perhaps more importantly,
+it gives applications full control over the way glyphs are rendered, making
+fine typesetting and WYSIWIG display possible.  Finally, it allows applica-
+tions to use fonts that are not installed system-wide for displaying docu-
+ments with embedded fonts.
+
+Xft is not compatible with the core fonts system: usage of Xft requires mak-
+ing fairly extensive changes to toolkits (user-interface libraries).  While
+XFree86 will continue to maintain the core fonts system, toolkit authors are
+encouraged to switch to Xft as soon as possible.
+
 2.  Installing fonts
 
-Installing fonts in XFree86 is a two step process.  First, you need to create
-a font directory that contains all the relevant font files as well as some
-index files.  You then need to inform the X server of the existence of this
-new directory by including it in the font path.
+This section explains how to configure both Xft and the core fonts system to
+access newly-installed fonts.
+
+2.1  Configuring Xft
+
+Xft has no configuration mechanism itself, rather it relies upon the fontcon-
+fig library to configure and customize fonts.  That library is not specific
+to XFree86 or indeed on any particular font output mechanism.  This discus-
+sion describes how fontconfig, rather than Xft, works.
+
+2.1.1  Installing fonts in Xft
+
+Fontconfig looks for fonts in a set of well-known directories that include
+all of XFree86's standard font directories (`/usr/X11R6/lib/X11/lib/fonts/*')
+by default) as well as a directory called `.fonts/' in the user's home direc-
+tory.  Installing a font for use by Xft applications is as simple as copying
+a font file into one of these directories.
+
+     $ cp lucbr.ttf ~/.fonts/
+
+Fontconfig will notice the new font at the next opportunity and rebuild its
+list of fonts.  If you want to trigger this update from the command line (for
+example in order to globally update the system-wide Fontconfig information),
+you may run the command `fc-cache'.
+
+     $ fc-cache
+
+2.1.2  Fine-tuning Xft
+
+Fontconfig's behaviour is controlled by a set of configuration files: a sys-
+tem-wide configuration file, `/etc/fonts/fonts.conf', and a user-specific
+file called `.fonts.conf' in the user's home directory (this can be overrid-
+den with the `FONTCONFIG_FILE' environment variable).
+
+Every Fontconfig configuration file must start with the following boiler-
+plate:
+
+     <?xml version="1.0"?>
+     <!DOCTYPE fontconfig SYSTEM "fonts.dtd">
+     <fontconfig>
+
+In addition, every Fontconfig configuration file must end with the following
+line:
+
+     </fontconfig>
+
+The default Fontconfig configuration file includes the directory `~/.fonts/'
+in the list of directories searched for font files, and this is where user-
+specific font files should be installed.  In the unlikely case that a new
+font directory needs to be added, this can be done with the following syntax:
+
+     <dir>/usr/local/share/fonts/</dir>
+
+Another useful option is the ability to disable anti-aliasing (font smooth-
+ing) for selected fonts.  This can be done with the following syntax:
+
+     <match target="font">
+         <test qual="any" name="family">
+             <string>Lucida Console</string>
+         </test>
+         <edit name="antialias" mode="assign">
+             <bool>false</bool>
+         </edit>
+     </match>
+
+Anti-aliasing can be disabled for all fonts by the following incantation:
+
+     <match target="font">
+         <edit name="antialias" mode="assign">
+             <bool>false</bool>
+         </edit>
+     </match>
+
+Xft supports sub-pixel rasterisation on LCD displays.  XFree86 should auto-
+matically enable this feature on laptops and when using an LCD monitor con-
+nected with a DVI cable; you can check whether this was done by typing
+
+     $ xdpyinfo -ext RENDER | grep sub-pixel
+
+If this doesn't print anything, you will need to configure Render for your
+particular LCD hardware manually; this is done with the following syntax:
+
+     <match target="font">
+         <edit name="rgba" mode="assign">
+             <const>rgb</const>
+         </edit>
+     </match>
+
+The string `rgb' within the `<const>'...`</const>' specifies the order of
+pixel components on your display, and should be changed to match your hard-
+ware; it can be one of `rgb (normal LCD screen), `bgr' (backwards LCD
+screen), `vrgb' (LCD screen rotated clockwise) or `vbgr' (LCD screen rotated
+counterclockwise).
+
+2.1.3  Configuring applications
+
+Because most current applications use the core fonts system by default, it is
+necessary to explicitly configure them to use Xft.  How this is done depends
+on the application.
+
+XTerm can be set to use Xft by using the `-fa' command line option or by set-
+ting the `XTerm*faceName' resource:
+
+     XTerm*faceName: Courier
+
+or
+
+     $ xterm -fa "Courier"
+
+For applications based on GTK+ 2.0 (including GNOME 2 applications), the
+environment variable `GDK_USE_XFT' should be set to `1':
 
-2.1  Installing bitmap fonts
+     $ export GDK_USE_XFT=1
+
+GTK+ 2.2 uses Xft by default.
+
+For KDE applications, you should select ``Anti-alias fonts'' in the ``Fonts''
+panel of KDE's ``Control Center''.  Note that this option is misnamed: it
+switches KDE to using Xft but doesn't enable anti-aliasing in case it was
+disabled by your Xft configuration file.
+
+(What about Mozilla?)
+
+2.1.4  Troubleshooting
+
+If some Xft-based applications don't seem to notice the changes you are mak-
+ing to your configuration files, they may be linked against the XFree86 4.2
+version of Xft.  In order to fix the problem, you should relink them against
+a current version of Xft; on most systems, it is enough to install the cur-
+rent version of the Xft and Fontconfig libraries.
+
+If, for some reason, you cannot upgrade the shared libraries, please check
+the Xft(3) manual page included with XFree86 4.2 for the configuration mecha-
+nisms of the previous version of Xft.
+
+2.2  Configuring the core X11 fonts system
+
+Installing fonts in the core system is a two step process.  First, you need
+to create a font directory that contains all the relevant font files as well
+as some index files.  You then need to inform the X server of the existence
+of this new directory by including it in the font path.
+
+2.2.1  Installing bitmap fonts
 
 The XFree86 server can use bitmap fonts in both the cross-platform BDF format
 and the somewhat more efficient binary PCF format.  (XFree86 also supports
@@ -39,7 +196,7 @@ e.g.
 
      $ bdftopcf courier12.bdf
 
-You may then want to compress the resulting PCF font files:
+You will then want to compress the resulting PCF font files:
 
      $ gzip courier12.pcf
 
@@ -49,20 +206,19 @@ you wish to make available into a arbitrary directory, say
 `fonts.dir' by running the command `mkfontdir' (please see the mkfontdir(1)
 manual page for more information):
 
-     $ mkdir /usr/local/share/fonts/bitmap
-     $ cp *.pcf.gz /usr/local/share/fonts/bitmap
-     $ cd /usr/local/share/fonts/bitmap
-     $ mkfontdir
+     $ mkdir /usr/local/share/fonts/bitmap/
+     $ cp *.pcf.gz /usr/local/share/fonts/bitmap/
+     $ mkfontdir /usr/local/share/fonts/bitmap/
 
 All that remains is to tell the X server about the existence of the new font
-directory; see Section Setting the server font path (section 2.4, page 1).
+directory; see Setting the server font path (section 2.2.4, page 1) below.
 
-2.2  Installing scalable fonts
+2.2.2  Installing scalable fonts
 
 The XFree86 server supports scalable fonts in four formats: Type 1, Speedo,
 TrueType and CIDFont.  This section only applies to the former three; for
-information on CIDFonts, please see Section Installing CIDFonts (section 2.3,
-page 1) later in this document.
+information on CIDFonts, please see Installing CIDFonts (section 2.2.3, page
+1) later in this document.
 
 Installing scalable fonts is very similar to installing bitmap fonts: you
 create a directory with the font files, and run `mkfontdir' to create an
@@ -70,58 +226,23 @@ index file called `fonts.dir'.
 
 There is, however, a big difference: `mkfontdir' cannot automatically recog-
 nise scalable font files.  For that reason, you must first index all the font
-files in a file called `fonts.scale'.  This file has the same format as a
-`fonts.dir' file, and typically looks as follows:
-
-     4
-     cour.pfa -adobe-courier-medium-r-normal-0-0-0-0-p-0-iso8859-1
-     cour.pfa -adobe-courier-medium-r-normal-0-0-0-0-p-0-iso8859-2
-     couri.pfa -adobe-courier-medium-i-normal-0-0-0-0-p-0-iso8859-1
-     couri.pfa -adobe-courier-medium-i-normal-0-0-0-0-p-0-iso8859-2
-
-The first line indicates the number of entries in the file.  Each line after
-the first consists of two fields separated by a space; the first field is the
-name of the font file, and the second one is the name under which the font
-will appear to the server.  This name should obey the X Logical Font Descrip-
-tion conventions (see Section The X Logical Font Description (section 6.2,
-page 1)).  The format of this file is fully described in the mkfontdir(1)
-manual page.
-
-Note that multiple lines may point at the same font file.  This is most com-
-monly done in order to make a single font available under multiple encodings;
-please see Section Fonts and internationalisation (section 4., page 1).
-
-While it is possible to create the `fonts.scale' file by hand, it is simpler
-and more convenient to have it generated automatically.  Utilities to perform
-this task are available, but are not currently included with XFree86. For
-Type 1 fonts, you may use a utility called `type1inst' which is available
-from standard Free Software repositories <URL:http://www.ibib-
-lio.org/pub/Linux/X11/xutils/> throughout the world.
-
-For TrueType fonts, you may use `ttmkfdir', available from Joerg Pommnitz's
-xfsft page <URL:http://www.joerg-pommnitz.de/TrueType/xfsft.html>.
-
-After the `fonts.scale' is created, you may run `mkfontdir' as above; this
-time, however, you need to create an index of encoding files called `encod-
-ings.dir' in addition to the `fonts.dir' file.  This is done by using
-`mkfontdir' with the `-e' flag:
-
-     $ cd /usr/local/share/fonts/Type1
-     $ mkfontdir -e /usr/X11R6/lib/font/encodings
-
-For more information, please see the mkfontdir(1) manual page and Section
-Fonts and internationalisation (section 4., page 1) later in this document.
-
-2.3  Installing CID-keyed fonts
+files in a file called `fonts.scale'.  While this can be done by hand, it is
+best done by using the `mkfontscale' utility.
+
+     $ mkfontscale /usr/local/share/fonts/Type1/
+     $ mkfontdir /usr/local/share/fonts/Type1/
+
+Under some circumstances, it may be necessary to modify the `fonts.scale'
+file generated by mkfontscale; for more information, please see the mkfont-
+dir(1) and mkfontscale(1) manual pages and Core fonts and internationalisa-
+tion (section 4.1, page 1) later in this document.
+
+2.2.3  Installing CID-keyed fonts
 
 The CID-keyed font format was designed by Adobe Systems for fonts with large
 character sets.  A CID-keyed font, or CIDFont for short, contains a collec-
 tion of glyphs indexed by character ID (CID).
 
-Adobe make some sample CIDFonts and a complete set of CMaps available from
-O'Reilly's FTP site <URL:ftp://ftp.oreilly.com/pub/examples/nut-
-shell/cjkv/adobe/>.
-
 In order to map such glyphs to meaningful indices, Adobe provide a set of
 CMap files.  The PostScript name of a font generated from a CIDFont consists
 of the name of the CIDFont and the name of the CMap separated by two dashes.
@@ -130,8 +251,8 @@ CMap `UniKS-UCS2-H' is called
 
      Munhwa-Regular--UniKS-UCS2-H
 
-The CIDFont support in XFree86 requires a very rigid directory structure.
-The main directory must be called `CID' (its location defaults to
+The CIDFont code in XFree86 requires a very rigid directory structure.  The
+main directory must be called `CID' (its location defaults to
 `/usr/X11R6/lib/X11/fonts/CID' but it may be located anywhere), and it should
 contain a subdirectory for every CID collection.  Every subdirectory must
 contain subdirectories called CIDFont (containing the actual CIDFont files),
@@ -157,8 +278,8 @@ filenames:
      Adobe-Korea1/Munhwa-Regular--UniKS-UCS2-H.cid \
        -adobe-munhwa-medium-r-normal--0-0-0-0-p-0-iso10646-1
 
-(both names on the same line).  As above, running `mkfontdir' creates the
-`fonts.dir' file:
+(both names on the same line).  Running `mkfontdir' creates the `fonts.dir'
+file:
 
      $ cd /usr/local/share/fonts/CID
      $ mkfontdir
@@ -173,11 +294,11 @@ fonts but querying them will take a long time.  You should run `mkcfm' again
 whenever a change is made to any of the CID-keyed fonts, or when the CID-
 keyed fonts are copied to a machine with a different architecture.
 
-2.4  Setting the server's font path
+2.2.4  Setting the server's font path
 
 The list of directories where the server looks for fonts is known as the font
 path.  Informing the server of the existence of a new font directory consists
-in putting it on the font path.
+of putting it on the font path.
 
 The font path is an ordered list; if a client's request matches multiple
 fonts, the first one in the font path is the one that gets used.  When match-
@@ -195,7 +316,7 @@ You may check the font path of the running server by typing the command
 
      $ xset q
 
-2.4.1  Temporary modification of the font path
+2.2.4.1  Temporary modification of the font path
 
 The `xset' utility may be used to modify the font path for the current ses-
 sion.  The font path is set with the command xset fp; a new element is added
@@ -205,34 +326,36 @@ to the front with xset +fp, and added to the end with xset fp+.  For example,
      $ xset fp+ /usr/local/fonts/bitmap
 
 Conversely, an element may be removed from the front of the font path with
-`xset -fp', and removed from the end with `xset fp-'.
+`xset -fp', and removed from the end with `xset fp-'.  You may reset the font
+path to its default value with `xset fp default'.
 
 For more information, please consult the xset(1) manual page.
 
-2.4.2  Permanent modification of the font path
+2.2.4.2  Permanent modification of the font path
 
-The default font path (the one used just after server startup) is specified
-in the X server's `XF86Config' file.  It is computed by appending all the
-directories mentioned in the `FontPath' entries of the `Files' section in the
-order in which they appear.
+The default font path (the one used just after server startup or after `xset
+fp default') is specified in the X server's `XF86Config' file.  It is com-
+puted by appending all the directories mentioned in the `FontPath' entries of
+the `Files' section in the order in which they appear.
 
      FontPath "/usr/local/fonts/Type1"
      ...
      FontPath "/usr/local/fonts/bitmap"
 
-For more information, please consult the `XF86Config'(5) manual page.
+For more information, please consult the XF86Config(5) manual page.
 
-2.5  Troubleshooting
+2.2.5  Troubleshooting
 
 If you seem to be unable to use some of the fonts you have installed, the
 first thing to check is that the `fonts.dir' files are correct and that they
-are readable by the server.  If this doesn't help, it is quite possible that
+are readable by the server (the X server usually runs as root, beware of NFS-
+mounted font directories).  If this doesn't help, it is quite possible that
 you are trying to use a font in a format that is not supported by your
 server.
 
-XFree86 supports the BDF, PCF, SNF, Type 1, Speedo, TrueType and CIDFont font
-formats.  However, not all XFree86 servers come with all the font backends
-configured in.
+XFree86 supports the BDF, PCF, SNF, Type 1, Speedo, TrueType, OpenType and
+CIDFont font formats.  However, not all XFree86 servers come with all the
+font backends configured in.
 
 On most platforms, the XFree86 servers are modular: the font backends are
 included in modules that are loaded at runtime.  The modules to be loaded are
@@ -247,13 +370,15 @@ follows:
 
    o  "bitmap": bitmap fonts (`*.bdf', `*.pcf' and `*.snf');
 
-   o  "type1": Type 1 fonts (`*.pfa' and `*.pfb') and CIDFonts;
+   o  "freetype": TrueType fonts (`*.ttf' and `*.ttc'), OpenType fonts
+     (`*.otf' and `*.otc') and Type 1 fonts (`*.pfa' and `*.pfb');
 
-   o  "speedo": Bitstream Speedo fonts (`*.spd');
+   o  "type1": alternate Type 1 backend (`*.pfa' and `*.pfb') and CIDFont
+     backend;
 
-   o  "freetype": TrueType fonts (`*.ttf' and `*.ttc');
+   o  "xtt": alternate TrueType backend (`*.ttf' and `*.ttc');
 
-   o  "xtt": alternate TrueType backend (`*.ttf' and `*.ttc').
+   o  "speedo": Bitstream Speedo fonts (`*.spd').
 
 Please note that the argument of the `Load' directive is case-sensitive.
 
@@ -261,15 +386,15 @@ Please note that the argument of the `Load' directive is case-sensitive.
 
 3.1  Standard bitmap fonts
 
-The Sample Implementation of X11 comes with a large number of bitmap fonts,
-including the `fixed' family, and bitmap versions of Courier, Times and Hel-
-vetica.  In the SI, these fonts are provided in the ISO 8859-1 encoding (ISO
-Latin Western-European).
+The Sample Implementation of X11 (SI) comes with a large number of bitmap
+fonts, including the `fixed' family, and bitmap versions of Courier, Times,
+Helvetica and some members of the Lucida family.  In the SI, these fonts are
+provided in the ISO 8859-1 encoding (ISO Latin Western-European).
 
 In XFree86, a number of these fonts are provided in Unicode-encoded font
 files instead.  At build time, these fonts are split into font files encoded
-according to legacy encodings, a process which enables us to provide the
-standard fonts in a number of regional encodings with no duplication of work.
+according to legacy encodings, a process which allows us to provide the stan-
+dard fonts in a number of regional encodings with no duplication of work.
 
 For example, the font file
 
@@ -281,7 +406,7 @@ with XLFD
 
 is a Unicode-encoded version of the standard `fixed' font with added support
 for the Latin, Greek, Cyrillic, Georgian, Armenian, IPA and other scripts
-plus numerous technical symbols. It contains over 2800 glyphs, covering all
+plus numerous technical symbols.  It contains over 2800 glyphs, covering all
 characters of ISO 8859 parts 1-5, 7-10, 13-15, as well as all European IBM
 and Microsoft code pages, KOI8, WGL4, and the repertoires of many other char-
 acter sets.
@@ -290,29 +415,14 @@ This font is used at build time for generating the font files
 
      6x13-ISO8859-1.bdf
      6x13-ISO8859-2.bdf
-     6x13-ISO8859-3.bdf
-     6x13-ISO8859-4.bdf
-     6x13-ISO8859-5.bdf
-     6x13-ISO8859-7.bdf
-     6x13-ISO8859-8.bdf
-     6x13-ISO8859-9.bdf
-     6x13-ISO8859-10.bdf
-     6x13-ISO8859-13.bdf
+     ...
      6x13-ISO8859-15.bdf
      6x13-KOI8-R.bdf
 
 with respective XLFDs
 
      -misc-fixed-medium-r-normal--13-120-75-75-c-60-iso8859-1
-     -misc-fixed-medium-r-normal--13-120-75-75-c-60-iso8859-2
-     -misc-fixed-medium-r-normal--13-120-75-75-c-60-iso8859-3
-     -misc-fixed-medium-r-normal--13-120-75-75-c-60-iso8859-4
-     -misc-fixed-medium-r-normal--13-120-75-75-c-60-iso8859-5
-     -misc-fixed-medium-r-normal--13-120-75-75-c-60-iso8859-7
-     -misc-fixed-medium-r-normal--13-120-75-75-c-60-iso8859-8
-     -misc-fixed-medium-r-normal--13-120-75-75-c-60-iso8859-9
-     -misc-fixed-medium-r-normal--13-120-75-75-c-60-iso8859-10
-     -misc-fixed-medium-r-normal--13-120-75-75-c-60-iso8859-13
+     ...
      -misc-fixed-medium-r-normal--13-120-75-75-c-60-iso8859-15
      -misc-fixed-medium-r-normal--13-120-75-75-c-60-koi8-r
 
@@ -320,10 +430,6 @@ The standard short name `fixed' is normally an alias for
 
      -misc-fixed-medium-r-normal--13-120-75-75-c-60-iso8859-1
 
-(The conversion of the standard fonts to Unicode was mainly performed by
-Markus Kuhn.  Markus is a man of taste, which makes his use of Perl in the
-conversion process somewhat surprising.)
-
 3.2  The ClearlyU Unicode font family
 
 The ClearlyU family of fonts provides a set of 12 pt, 100 dpi proportional
@@ -361,10 +467,6 @@ standard.
 The Ligature font contains ligatures for various scripts that may be useful
 for improved presentation of text.
 
-(The ClearlyU family was designed by Mark Leisher.  Mark's usage of the
-foundry name mutt predates the mailer of the same name, but he won't say
-more.)
-
 3.3  Standard scalable fonts
 
 XFree86 includes all the scalable fonts distributed with X11R6.
@@ -403,7 +505,7 @@ and reside in the font files
 
 XFree86 includes Speedo versions of the Bitstream Courier and Charter fonts.
 In order to use these fonts, you should ensure that your X server is loading
-the `Speedo' font backend; see Section Troubleshooting (section 2.5, page 1).
+the `Speedo' font backend; see Troubleshooting (section 2.2.5, page 1).
 
 These fonts cover all of ISO 8859-1 and almost all of ISO 8859-2.  They have
 XLFD name
@@ -435,12 +537,12 @@ TrueType version have glyphs covering the basic ASCII Unicode range, the
 Latin 1 range, as well as the Extended Latin range and some additional punc-
 tuation characters.  In particular, these fonts include all the glyphs needed
 for ISO 8859 parts 1, 2, 3, 4, 9, 13 and 15, as well as all the glyphs in the
-Adobe Standard encoding and the Windows 3.1  character set.
+Adobe Standard encoding and the Windows 3.1 character set.
 
 The glyph coverage of the Type 1 versions is somewhat reduced, and only cov-
 ers ISO 8859 parts 1, 2 and 15 as well as the Adobe Standard encoding.
 
-The Luxi fonts are original designs by Kris Holmes and Charles Bigelow. Luxi
+The Luxi fonts are original designs by Kris Holmes and Charles Bigelow.  Luxi
 fonts include seriffed, sans serif, and monospaced styles, in roman and
 oblique, and normal and bold weights. The fonts share stem weight, x-height,
 capital height, ascent and descent, for graphical harmony.
@@ -463,14 +565,18 @@ For more information, please contact <design@bigelowandholmes.com> or
 
 An earlier version of the Luxi fonts was made available under the name
 Lucidux.  This name should no longer be used due to trademark uncertainties,
-and all traces of the Lucidux name have been removed from this version of
-XFree86.
+and all traces of the Lucidux name have been removed from XFree86.
+
+4.  More about core fonts
 
-4.  Fonts and internationalisation
+This section describes XFree86-specific enhancements to the core X11 fonts
+system.
 
-The scalable font backends (Type 1, Speedo and TrueType) can now automati-
-cally re-encode fonts to the encoding specified in the XLFD in fonts.dir.
-For example, a fonts.dir file can contain entries for the Type 1 Courier font
+4.1  Core fonts and internationalisation
+
+The scalable font backends (Type 1, Speedo and TrueType) can automatically
+re-encode fonts to the encoding specified in the XLFD in `fonts.dir'.  For
+example, a `fonts.dir' file can contain entries for the Type 1 Courier font
 such as
 
      cour.pfa -adobe-courier-medium-r-normal--0-0-0-0-m-0-iso8859-1
@@ -479,7 +585,7 @@ such as
 which will lead to the font being recoded to ISO 8859-1 and ISO 8859-2
 respectively.
 
-4.1  The fontenc layer
+4.1.1  The fontenc layer
 
 Three of the scalable backends (Type 1, Speedo, and the FreeType TrueType
 backend) use a common fontenc layer for font re-encoding.  This allows these
@@ -488,10 +594,9 @@ locales independently of font type.
 
 Please note: the X-TrueType (X-TT) backend does not use the fontenc layer,
 but instead uses its own method for font reencoding.  If you are only inter-
-ested in X-TT you may want to skip to Section Using Symbol Fonts (section
-4.5, page 1), as the intervening information does not apply to X-TT.  X-TT
-itself is described in more detail in Section X-TrueType (section 5.2, page
-1).
+ested in X-TT you may want to skip to Using Symbol Fonts (section 4.1.5, page
+1), as the intervening information does not apply to X-TT.  X-TT itself is
+described in more detail in X-TrueType (section 4.2.3, page 1).
 
 In the fontenc layer, an encoding is defined by a name (such as iso8859-1),
 possibly a number of aliases (alternate names), and an ordered collection of
@@ -531,7 +636,7 @@ include:
 
    o  koi8-u: KOI8 Ukrainian (see RFC 2319);
 
-   o  koi8-ru: KOI8 Russian/Ukrainian
+   o  koi8-ru: KOI8 Russian/Ukrainian;
 
    o  koi8-uni: KOI8 ``Unified'' (Russian, Ukrainian, and Byelorussian);
 
@@ -547,60 +652,61 @@ directory with fonts.dir!) for a file named `encodings.dir'.  If found, this
 file is scanned for the requested encoding, and the relevant encoding defini-
 tion file is read in.  The `mkfontdir' utility, when invoked with the `-e'
 option followed by the name of a directory containing encoding files, can be
-used to automatically build `encodings.dir' files.  See the mkfontdir(1) man-
-ual page for more details.
+used to automatically build `encodings.dir' files.  Please see the mkfont-
+dir(1) manual page for more details.
 
 A number of encoding files for common encodings are included with XFree86.
-Information on writing new encoding files can be found in Section Format of
-encodings directory files (section 4.3, page 1) and Format of encoding files
-(section 4.4, page 1) later in this document.
+Information on writing new encoding files can be found in Format of encodings
+directory files (section 4.1.3, page 1) and Format of encoding files (section
+4.1.4, page 1) later in this document.
+
+4.1.2  Backend-specific notes about fontenc
+
+4.1.2.1  The FreeType backend
 
-4.2  Backend-specific notes about fontenc
+For TrueType and OpenType fonts, the FreeType backend scans the mappings in
+order.  Mappings with a target of PostScript are ignored; mappings with a
+TrueType or Unicode target are checked against all the cmaps in the file.
+The first applicable mapping is used.
 
-4.2.1  Type 1
+For Type 1 fonts, the FreeType backend first searches for a mapping with a
+target of PostScript.  If one is found, it is used.  Otherwise, the backend
+searches for a mapping with target Unicode, which is then composed with a
+built-in table mapping codes to glyph names.  Note that this table only cov-
+ers part of the Unicode code points that have been assigned names by Adobe.
 
-The Type 1 backend first searches for a mapping with a target of PostScript.
-If one is found, it is used.  Otherwise, the backend searches for a mapping
-with target Unicode, which is then composed with a built-in table mapping
-codes to glyph names.  Note that this table only covers part of the Unicode
-code points that have been assigned names by Adobe.
+Specifying an encoding value of adobe-fontspecific for a Type 1 font disables
+the encoding mechanism.  This is useful with symbol and incorrectly encoded
+fonts (see Incorrectly encoded fonts (section 4.1.6, page 1) below).
 
-If neither a PostScript or Unicode mapping is found, the backend defaults to
+If a suitable mapping is not found, the FreeType backend defaults to
 ISO 8859-1.
 
-Specifying an encoding value of adobe-fontspecific disables the encoding
-mechanism.  This is useful with symbol and incorrectly encoded fonts (see
-Section Incorrectly encoded fonts (section 4.6, page 1) below).
+4.1.2.2  Type 1
 
-The Type 1 backend currently limits all encodings to 8-bit codes.
+The Type 1 backend behaves similarly to the FreeType backend with Type 1
+fonts, except that it limits all encodings to 8-bit codes.
 
-4.2.2  Speedo
+4.1.2.3  Speedo
 
 The Speedo backend searches for a mapping with a target of Unicode, and uses
 it if found.  If none is found, the backend defaults to ISO 8859-1.
 
 The Speedo backend limits all encodings to 8-bit codes.
 
-4.2.3  The FreeType TrueType backend
-
-The TrueType backend scans the mappings in order.  Mappings with a target of
-PostScript are ignored; mappings with a TrueType or Unicode target are
-checked against all the cmaps in the file.  The first applicable mapping is
-used.
-
-If you are writing an encoding file to be used with the TrueType backend, you
-should ensure that mappings are mentioned in decreasing order of preference.
-
-4.3  Format of encoding directory files
+4.1.3  Format of encoding directory files
 
 In order to use a font in an encoding that the font backend does not know
-about, you need to have an `encodings.dir' file in the same directory as the
-font file used.  The `encodings.dir' file has a similar format to
-`fonts.dir'.  Its first line specifies the number of encodings, while every
-successive line has two columns, the name of the encoding, and the name of
-the encoding file; this can be relative to the current directory, or abso-
-lute.  Every encoding name should agree with the encoding name defined in the
-encoding file.  For example,
+about, you need to have an `encodings.dir' file either in the same directory
+as the font file used or in a system-wide location
+(`/usr/X11R6/lib/X11/fonts/encodings/' by default).
+
+The `encodings.dir' file has a similar format to `fonts.dir'.  Its first line
+specifies the number of encodings, while every successive line has two
+columns, the name of the encoding, and the name of the encoding file; this
+can be relative to the current directory, or absolute.  Every encoding name
+should agree with the encoding name defined in the encoding file.  For exam-
+ple,
 
      3
      mulearabic-0 /usr/X11R6/lib/X11/fonts/encodings/mulearabic-0.enc
@@ -616,7 +722,7 @@ pressed or gzipped.
 The `encoding.dir' files are best maintained by the `mkfontdir' utility.
 Please see the mkfontdir(1) manual page for more information.
 
-4.4  Format of encoding files
+4.1.4  Format of encoding files
 
 The encoding files are ``free form,'' i.e. any string of whitespace is equiv-
 alent to a single space.  Keywords are parsed in a non-case-sensitive manner,
@@ -635,7 +741,6 @@ possibly its alternate names (aliases):
 
      STARTENCODING mulearabic-0
      ALIAS arabic-0
-     ALIAS something-else
 
 The name of the encoding and its aliases should be suitable for use in an
 XLFD font name, and therefore contain exactly one dash `-'.
@@ -755,7 +860,7 @@ In order to make future extensions to the format possible, lines starting
 with an unknown keyword are silently ignored, as are mapping sections with an
 unknown target.
 
-4.5  Using symbol fonts
+4.1.5  Using symbol fonts
 
 Type 1 symbol fonts should be installed using the adobe-fontspecific encod-
 ing.
@@ -768,21 +873,21 @@ microsoft-cp1252, or, for older fonts, microsoft-win3.1.
 In order to guarantee consistent results (especially between Type 1 and True-
 Type versions of the same font), it is possible to define a special encoding
 for a given font. This has already been done for the ZapfDingbats font; see
-the file encodings/adobe-dingbats.enc.
+the file `encodings/adobe-dingbats.enc'.
 
-4.6  Hints about using badly encoded fonts
+4.1.6  Hints about using badly encoded fonts
 
 A number of text fonts are incorrectly encoded. Incorrect encoding is some-
 times done by design, in order to make a font for an exotic script appear
-like an ordinary Western text font.  It is often the result of the font
-designer's laziness or incompetence; for some reason, most people seem to
-find it easier to invent idiosyncratic glyph names rather than follow the
-Adobe glyph list.
+like an ordinary Western text font on systems which are not easily extended
+with new locale data.  It is often the result of the font designer's laziness
+or incompetence; for some reason, most people seem to find it easier to
+invent idiosyncratic glyph names rather than follow the Adobe glyph list.
 
 There are two ways of dealing with such fonts: using them with the encoding
 they were designed for, and creating an ad hoc encoding file.
 
-4.6.1  Using fonts with the designer's encoding
+4.1.6.1  Using fonts with the designer's encoding
 
 In the case of Type 1 fonts, the font designer can specify a default encod-
 ing; this encoding is requested by using the `adobe-fontspecific' encoding in
@@ -796,48 +901,42 @@ are designed with either Microsoft or Apple platforms in mind, so one of
 `microsoft-symbol', `microsoft-cp1252', `microsoft-win3.1', or `apple-roman'
 should yield reasonable results.
 
-4.6.2  Specifying an ad hoc encoding file
+4.1.6.2  Specifying an ad hoc encoding file
 
 It is always possible to define an encoding file to put the glyphs in a font
 in any desired order. Again, see the `encodings/adobe-dingbats.enc' file to
 see how this is done.
 
-4.6.3  Specifying font aliases
+4.1.6.3  Specifying font aliases
 
 By following the directions above, you will find yourself with a number of
 fonts with unusual names --- with encodings such as `adobe-fontspecific',
 `microsoft-win3.1' etc.  In order to use these fonts with standard applica-
 tions, it may be useful to remap them to their proper names.
 
-This is done by writing a `fonts.alias' file. The format of this file is sim-
-ilar to the format of the `fonts.dir' file, except that it maps XLFD names to
-XLFD names. A `fonts.alias' file might look as follows:
+This is done by writing a `fonts.alias' file. The format of this file is very
+simple: it consists of a series of lines each mapping an alias name to a font
+name.  A `fonts.alias' file might look as follows:
 
-     1
      "-ogonki-alamakota-medium-r-normal--0-0-0-0-p-0-iso8859-2" \
        "-ogonki-alamakota-medium-r-normal--0-0-0-0-p-0-adobe-fontspecific"
 
 (both XLFD names on a single line).  The syntax of the `fonts.alias' file is
-precisely described in the mkfontdir(1) manual page.
-
-5.  Additional notes about TrueType support
+more precisely described in the mkfontdir(1) manual page.
 
-This version of XFree86 comes with two TrueType backends, FreeType (module
-`freetype', formerly known as xfsft) and X-TrueType (module `xtt').  These
-two backends are not compatible: only one of them can be used at any one
-time.
+4.2  Additional notes about scalable core fonts
 
-In order to use the FreeType backend, please check that the `Module' section
-of your `XF86Config' file contains a line that reads
+The FreeType backend (module `freetype', formerly known as xfsft) is able to
+deal with both TrueType and Type 1 fonts.  This puts it in conflict with the
+X-TT and Type 1 backends respectively.
 
-     Load "freetype"
+If both the FreeType and the Type 1 backends are loaded, the FreeType backend
+will be used for Type 1 fonts.  If both the FreeType and X-TT backends are
+loaded, X-TT will be used for TrueType fonts.
 
-In order to use the X-TrueType backend, replace the line in your XF86Config
-file that loads the freetype module with a line that reads
+4.2.1  Delayed glyph rasterisation
 
-         Load "xtt"
-
-Both TrueType backends delay glyph rasterisation up to the time at which a
+Both FreeType and X-TT delay glyph rasterisation up to the time at which a
 glyph is first used.  For this reason, they only provide an approximate value
 for the ``average width'' font property.
 
@@ -852,13 +951,15 @@ font really to be a character-cell font.  You are encouraged to make use of
 this optimisation when useful, but be warned that not all monospaced fonts
 are character-cell fonts.
 
-5.1  The FreeType TrueType backend
+4.2.2  About the FreeType backend
 
-The FreeType backend (formerly xfsft) is a backend based on the FreeType
-library (see the FreeType web site <URL:http://www.freetype.org/>) and has
-support for the ``fontenc'' style of internationalisation (see Section The
-fontenc layer (section 4.1, page 1)).  This backend supports TrueType Font
-files (`*.ttf') and TrueType Collections (`*.ttc').
+The FreeType backend (formerly xfsft) is a backend based on version 2 of the
+FreeType library (see the FreeType web site <URL:http://www.freetype.org/>)
+and has support for the ``fontenc'' style of internationalisation (see The
+fontenc layer (section 4.1.1, page 1)).  This backend supports TrueType font
+files (`*.ttf'), OpenType font files (`*.otf'), TrueType Collections
+(`*.ttc'), OpenType Collections (`*.otc') and Type 1 font files (`*.pfa' and
+`*.pfb').
 
 In order to access the faces in a TrueType Collection file, the face number
 must be specified in the fonts.dir file before the filename within colons.
@@ -869,20 +970,18 @@ For example,
 refers to face 2 in the `mincho.ttc' TrueType Collection file.
 
 The FreeType backend uses the fontenc layer in order to support recoding of
-fonts; this was described in Section The fontenc layer (section 4.1, page 1)
-and especially Section FreeType-specific notes about fontenc (section 4.2.3,
-page 1) earlier in this document.
+fonts; this was described in The fontenc layer (section 4.1.1, page 1) and
+especially FreeType-specific notes about fontenc (section 4.1.2.1, page 1)
+earlier in this document.
 
-5.2  The X-TrueType TrueType backend
+4.2.3  About the X-TrueType TrueType backend
 
-The `X-TrueType' backend is another backend based on the FreeType library.
-X-TrueType doesn't use the `fontenc' layer for managing font encodings, but
-instead uses its own database of encodings.  However, X-TrueType includes a
-large number of encodings, and any encoding you need is likely to be present
-in X-TrueType.
+The `X-TrueType' backend is a backend based on version 1 of the FreeType
+library.  X-TrueType doesn't use the `fontenc' layer for managing font encod-
+ings, but instead uses its own database of encodings.
 
-X-TrueType extends the `fonts.dir' syntax with a number of options, known as
-`TTCap'.  A `TTCap' entry follows the general syntax
+X-TrueType extends the `fonts.dir' syntax with a number of options, collec-
+tively known as `TTCap'.  A `TTCap' entry follows the general syntax
 
      :option=value:
 
@@ -897,47 +996,48 @@ cho.ttc' is specified using:
 More information on the TTCap syntax, and on X-TrueType in general, may be
 found on the X-TrueType home page <URL:http://x-tt.dsl.gr.jp/>.
 
-6.  Appendix: background and terminology
+5.  Appendix: background and terminology
 
-6.1  Characters and glyphs
+5.1  Characters and glyphs
 
 A computer text-processing system inputs keystrokes and outputs glyphs, small
 pictures that are assembled on paper or on a computer screen.  Keystrokes and
 glyphs do not, in general, coincide: for example, if the system does generate
-ligatures, then to the two keystrokes <f><i> will typically correspond a sin-
-gle glyph.  Similarly, if the system shapes Arabic glyphs in a reasonable
-manner, then multiple different glyphs may correspond to a single keystroke.
+ligatures, then to the sequence of two keystrokes <f><i> will typically cor-
+respond a single glyph.  Similarly, if the system shapes Arabic glyphs in a
+vaguely reasonable manner, then multiple different glyphs may correspond to a
+single keystroke.
 
 The complex transformation rules from keystrokes to glyphs are usually fac-
-tored into two simpler transformations, going through the intermediary of
-characters.  You may want to think of characters as the basic unit of data
-that is stored e.g. in the buffer of your text editor.  While the definition
-of a character is intrinsically application-specific, a number of standard-
-ised collections of characters have been defined.
+tored into two simpler transformations, from keystrokes to characters and
+from characters to glyphs.  You may want to think of characters as the basic
+unit of text that is stored e.g. in the buffer of your text editor.  While
+the definition of a character is intrinsically application-specific, a number
+of standardised collections of characters have been defined.
 
 A coded character set is a set of characters together with a mapping from
 integer codes --- known as codepoints --- to characters.  Examples of coded
 character sets include US-ASCII, ISO 8859-1, KOI8-R, and JIS X 0208(1990).
 
-A coded character set need not use 8 bit integers to index characters. Many
-early mainframes used 6 bit character sets, while 16 bit (or more) character
+A coded character set need not use 8 bit integers to index characters.  Many
+early systems used 6 bit character sets, while 16 bit (or more) character
 sets are necessary for ideographic writing systems.
 
-6.2  Font files, fonts, and XLFD
+5.2  Font files, fonts, and XLFD
 
 Traditionally, typographers speak about typefaces and founts.  A typeface is
 a particular style or design, such as Times Italic, while a fount is a
 molten-lead incarnation of a given typeface at a given size.
 
-Digital fonts come in font files.  A font file contains all the information
-necessary for generating glyphs of a given typeface, and applications using
-font files may access glyph information in an arbitrary order.
+Digital fonts come in font files.  A font file contains the information nec-
+essary for generating glyphs of a given typeface, and applications using font
+files may access glyph information in an arbitrary order.
 
 Digital fonts may consist of bitmap data, in which case they are said to be
 bitmap fonts.  They may also consist of a mathematical description of glyph
 shapes, in which case they are said to be scalable fonts.  Common formats for
 scalable font files are Type 1 (sometimes incorrectly called ATM fonts or
-PostScript fonts), Speedo and TrueType.
+PostScript fonts), TrueType and Speedo.
 
 The glyph data in a digital font needs to be indexed somehow.  How this is
 done depends on the font file format.  In the case of Type 1 fonts, glyphs
@@ -945,33 +1045,38 @@ are identified by glyph names.  In the case of TrueType fonts, glyphs are
 indexed by integers corresponding to one of a number of indexing schemes
 (usually Unicode --- see below).
 
-The X11 system uses the data in font file to generate font instances, which
-are collections of glyphs at a given size indexed according to a given encod-
-ing.
+The X11 core fonts system uses the data in a font file to generate font
+instances, which are collections of glyphs at a given size indexed according
+to a given encoding.
 
-X11 font instances are usually specified using a notation known as the X Log-
-ical Font Description (XLFD).  An XLFD starts with a dash `-', and consists
-of fourteen fields separated by dashes, for example
+X11 core font instances are usually specified using a notation known as the X
+Logical Font Description (XLFD).  An XLFD starts with a dash `-', and con-
+sists of fourteen fields separated by dashes, for example:
 
-     -adobe-courier-medium-r-normal--0-0-0-0-m-0-iso8859-1
+     -adobe-courier-medium-r-normal--12-120-75-75-m-70-iso8859-1
 
 Or particular interest are the last two fields `iso8859-1', which specify the
 font instance's encoding.
 
+A scalable font is specified by an XLFD which contains zeroes instead of some
+fields:
+
+     -adobe-courier-medium-r-normal--0-0-0-0-m-0-iso8859-1
+
 X11 font instances may also be specified by short name.  Unlike an XLFD, a
 short name has no structure and is simply a conventional name for a font
-instance.  Two short names are of particular interest, as they are handled
-specially by the server, and the server will not start if font instances with
-these names cannot be opened.  These are `fixed', which specifies the fall-
-back font to use when the requested font cannot be opened, and `cursor',
-which specifies the set of glyphs to be used by the mouse pointer.
+instance.  Two short names are of particular interest, as the server will not
+start if font instances with these names cannot be opened.  These are
+`fixed', which specifies the fallback font to use when the requested font
+cannot be opened, and `cursor', which specifies the set of glyphs to be used
+by the mouse pointer.
 
-Short names are usually implemented as aliases to XLFDs; the `fixed' and
-`cursor' aliases are defined in
+Short names are usually implemented as aliases to XLFDs; the standard `fixed'
+and `cursor' aliases are defined in
 
      /usr/X11R6/lib/X11/font/misc/fonts.alias
 
-6.3  Unicode
+5.3  Unicode
 
 Unicode (<URL:http://www.unicode.org>) is a coded character set with the goal
 of uniquely identifying all characters for all scripts, current and histori-
@@ -980,34 +1085,46 @@ it is often possible to use it as such.
 
 Unicode is an open character set, meaning that codepoint assignments may be
 added to Unicode at any time (once specified, though, an assignment can never
-be changed).  For this reason, a Unicode font will be sparse, and only define
-glyphs for a subset of the character registry of Unicode.
+be changed).  For this reason, a Unicode font will be sparse, meaning that it
+only defines glyphs for a subset of the character registry of Unicode.
 
 The Unicode standard is defined in parallel with the international standard
-ISO 10646.  Assignments in the two standards are always equivalent, and this
-document uses the terms Unicode and ISO 10646 interchangeably.
+ISO 10646.  Assignments in the two standards are always equivalent, and we
+often use the terms Unicode and ISO 10646 interchangeably.
 
-When used in X11, Unicode-encoded fonts should have the last two fields of
-their XLFD set to `iso10646-1'.
+When used in the X11 core fonts system, Unicode-encoded fonts should have the
+last two fields of their XLFD set to `iso10646-1'.
 
-7.  References
+6.  References
 
 XFree86 comes with extensive documentation in the form of manual pages and
-typeset documents.  Before installing fonts, you really should read the
-mkfontdir(1) manual page; other manual pages of interest include X(1),
-Xserver(1), xset(1), xlsfonts(1) and showfont(1).  In addition, you may want
-to read the X Logical Font Description document, by Jim Flowers, which is
-provided in the file `xc/doc/xlfd.PS.Z'.
+typeset documents.  Before installing fonts, you really should read the font-
+config(3) and mkfontdir(1) manual pages; other manual pages of interest
+include X(7), Xserver(1), xset(1), Xft(3), xlsfonts(1) and showfont(1).  In
+addition, you may want to read the X Logical Font Description document, by
+Jim Flowers, which is provided in the file `xc/doc/xlfd.PS.Z'.
+
+The latest released version of the XFree86 documentation (including this doc-
+ument and all manual pages) is available as current XFree86 documentation
+<URL:http://www.xfree86.org/current/>.
 
 The comp.fonts FAQ <URL:http://www.netmeg.net/faq/computers/fonts/>, which is
 unfortunately no longer being maintained, contains a wealth of information
 about digital fonts.
 
+Xft and Fontconfig are described on Keith Packard's Fontconfig site
+<URL:http://www.fontconfig.org>.
+
 The xfsft home page <URL:http://www.dcs.ed.ac.uk/home/jec/programs/xfsft/>
 has been superseded by this document, and is now obsolete; you may however
-still find some of the information it contains useful.  Joerg Pommnitz' xfsft
-page <URL:http://www.joerg-pommnitz.de/TrueType/xfsft.html> is the canonical
-source for the `ttmkfdir' utility.
+still find some of the information that it contains useful.  Joerg Pommnitz'
+xfsft page <URL:http://www.joerg-pommnitz.de/TrueType/xfsft.html> is the
+canonical source for the `ttmkfdir' utility, which is the ancestor of
+mkfontscale.
+
+The author's software pages <URL:http://www.pps.jussieu.fr/~jch/software/>
+might or might not contain related scribbles and development versions of
+software.
 
 The documentation of X-TrueType is available from the X-TrueType home page
 <URL:http://x-tt.dsl.gr.jp/>.
@@ -1015,15 +1132,15 @@ The documentation of X-TrueType is available from the X-TrueType home page
 A number of East-Asian CIDFonts are available from O'Reilly's FTP site
 <URL:ftp://ftp.oreilly.com/pub/examples/nutshell/cjkv/adobe/>.
 
-The Unicode consortium site <URL:http://www.unicode.org> may be of interest.
-But you are more likely to find what you need on Markus Kuhn's UTF-8 and Uni-
-code FAQ <URL:http://www.cl.cam.ac.uk/~mgk25/unicode.html>.
+While the Unicode consortium site <URL:http://www.unicode.org> may be of
+interest,  you are more likely to find what you need in Markus Kuhn's UTF-8
+and Unicode FAQ <URL:http://www.cl.cam.ac.uk/~mgk25/unicode.html>.
 
 The IANA RFC documents, available from a number of sites throughout the
-world, often provide interesting information about character set issues; my
-favourite is RFC 373.
+world, often provide interesting information about character set issues; see
+for example RFC 373.
 
-     Generated from XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/fonts.sgml,v 1.15 2001/12/17 19:25:36 dawes Exp $
+     Generated from XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/fonts.sgml,v 1.20 2003/01/20 03:43:07 dawes Exp $
 
 
-$XFree86: xc/programs/Xserver/hw/xfree86/doc/README.fonts,v 1.19 2001/12/20 00:15:41 dawes Exp $
+$XFree86: xc/programs/Xserver/hw/xfree86/doc/README.fonts,v 1.22 2003/01/20 04:10:01 dawes Exp $
diff --git a/xc/programs/Xserver/hw/xfree86/doc/README.mouse b/xc/programs/Xserver/hw/xfree86/doc/README.mouse
index cd71b3e2c..653b026de 100644
--- a/xc/programs/Xserver/hw/xfree86/doc/README.mouse
+++ b/xc/programs/Xserver/hw/xfree86/doc/README.mouse
@@ -2,11 +2,11 @@
 
                                Kazutaka Yokota
 
-                               9 February 2000
+                              17 December 2002
 
 1.  Introduction
 
-This document describes mouse support in XFree86 4.2.0.
+This document describes mouse support in XFree86 4.3.0.
 
 Mouse configuration has often been mysterious task for novice users.  How-
 ever, once you learn several basics, it is straightforward to write the mouse
@@ -311,7 +311,7 @@ the guidelines below.
 
                o IntelliMouse
 
-               o Logictech
+               o Logitech
 
                o Microsoft
 
@@ -451,6 +451,33 @@ inch, if possible:
 Not all mice and OSs can support this option.  This option can be set in the
 XF86Setup program.
 
+5.4  Drag Lock Buttons
+
+Some people find it difficult or inconvenient to hold a trackball button
+down, while at the same time moving the ball. Drag lock buttons simulate the
+holding down of another button. When a drag lock button is  first pressed,
+its target buttons is "locked" down until the second time the lock button is
+released, or until the button itself is pressed and released. This allows the
+starting of a drag, the movement of the trackball, and the ending of the drag
+to be separate operations.
+
+          Option    "DragLockButtons"   "W X Y Z"
+
+This option consists of pairs of buttons. Each lock button number is followed
+by the number of the button that it locks. In the above, button number "W" is
+a drag lock button for button "X" and button number "Y" is a drag lock button
+for button "Z".
+
+It may not be desirable to use multiple buttons as drag locks.  Instead, a
+"master drag lock button" may be defined. A master drag lock button acts as a
+"META" key. After a master lock button is released, the next button pressed
+is "locked" and not released until the second time the real button is
+released.
+
+          Option    "DragLockButtons"   "M"
+
+Since button "M" is unpaired it is a master drag lock button.
+
 6.  Mouse Gallery
 
 In all of the examples below, it is assumed that /dev/mouse is a link to the
@@ -520,10 +547,10 @@ detection:
 
           Option    "Protocol"     "Auto"
 
-6.3  Kensington Thinking Mouse (serial, PS/2)
+6.3  Kensington Thinking Mouse and Kensington Expert Mouse (serial, PS/2)
 
-This mouse has four buttons.  Thinking Mouse supports the PnP COM device
-specification.
+These mice have four buttons.  The Kensington Expert Mouse is really a track-
+ball.  Both Thinking mice  support the PnP COM device specification.
 
 To use this mouse as a serial device:
 
@@ -925,7 +952,40 @@ have the following InputDevice section.
 The movement of the first wheel is mapped to the button 4 and 5.  The second
 wheel's movement will be reported as the buttons 6 and 7.
 
-     Generated from XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/mouse.sgml,v 1.11 2000/03/01 00:25:23 dawes Exp $
+The Kensington Expert mouse is really a trackball. It has 4 buttons arranged
+in a rectangle around the ball.
+
+     Section "InputDevice"
+          Identifier  "DLB"
+          Driver      "mouse"
+          Option      "Protocol" "ThinkingMousePS/2"
+          Option      "Buttons" "3"
+          Option      "Emulate3Buttons"
+          Option      "Device" "/dev/mouse"
+          Option      "DragLockButtons" "2 1 4 3"
+     EndSection
+
+In this example, button 2 is a drag lock button for button number 1, and but-
+ton 4 is a drag lock button for button 3.  Since button 2 is above button 1
+and button 4 is above button 3 in the layout of this trackball, this is rea-
+sonable.
+
+Because button 2 is being used as a drag lock, it can not be used as an ordi-
+nary button. However, it can be activated by using the "Emulate3Buttons" fea-
+ture. However, some people my be unable to press two buttons at the same
+time. They may prefer the following InputDevice section which defines button
+4 as a master drag lock button, and leaves button 2 free for ordinary use.
+
+     Section "InputDevice"
+          Identifier  "MasterDLB"
+          Driver      "mouse"
+          Option      "Protocol" "ThinkingMousePS/2"
+          Option      "Buttons" "3"
+          Option      "Device" "/dev/mouse"
+          Option      "DragLockButtons" "4"
+     EndSection
+
+     Generated from XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/mouse.sgml,v 1.13 2002/12/17 20:55:22 dawes Exp $
 
 
-$XFree86: xc/programs/Xserver/hw/xfree86/doc/README.mouse,v 1.13 2001/11/15 17:37:23 dawes Exp $
+$XFree86: xc/programs/Xserver/hw/xfree86/doc/README.mouse,v 1.20 2003/02/24 04:03:24 dawes Exp $
diff --git a/xc/programs/Xserver/hw/xfree86/doc/README.neomagic b/xc/programs/Xserver/hw/xfree86/doc/README.neomagic
index ae3b2b005..7cd1b9d30 100644
--- a/xc/programs/Xserver/hw/xfree86/doc/README.neomagic
+++ b/xc/programs/Xserver/hw/xfree86/doc/README.neomagic
@@ -184,7 +184,7 @@ age your LCD.
 
 8.  Authors
 
-Jens Owen jens@precisioninsight.com Kevin E. Martin kevin@precisionin-
+Jens Owen jens@tungstengraphics.com Kevin E. Martin kevin@precisionin-
 sight.com
 
 This driver was donated to The XFree86 Project by Precision Insight, Inc.
@@ -195,4 +195,4 @@ http://www.precisioninsight.com
      Generated from XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/neomagic.sgml,v 1.1 1999/08/23 06:59:39 dawes Exp $
 
 
-$XFree86: xc/programs/Xserver/hw/xfree86/doc/README.neomagic,v 1.3 2000/03/01 01:48:26 dawes Exp $
+$XFree86: xc/programs/Xserver/hw/xfree86/doc/README.neomagic,v 1.4 2002/10/30 12:52:10 alanh Exp $
diff --git a/xc/programs/Xserver/hw/xfree86/doc/README.newport b/xc/programs/Xserver/hw/xfree86/doc/README.newport
index 9e63ccca0..ca392ea52 100644
--- a/xc/programs/Xserver/hw/xfree86/doc/README.newport
+++ b/xc/programs/Xserver/hw/xfree86/doc/README.newport
@@ -2,41 +2,47 @@
 
                                 Guido Günther
 
-                               16 January 2002
+                              24 February 2003
 
 1.  Supported Hardware
 
-This is an unaccelerated driver for the SGI Indy's newport cards. Both the
-8bit and 24bit versions are tested and working.
+This is an unaccelerated driver for the SGI newport cards (a.k.a. XL) as
+found in the SGI Indy and Indigo2. Both the 8bit and 24bit versions are
+tested and working.
 
 2.  Features
 
-   o  support for 8 and 24 bit pixel depths
+   o Support for 8 and 24 bit pixel depths
 
-3.  Notes
+   o Hardware cursor support to reduce flicker
 
-   o X -configure does not generate a XF86Config file
+3.  Notes
 
-   o Restoration of the console fails on some variants of the newport (Cmap
-     revision C)
+   o X -configure does not generate a XF86Config file.
 
-   o There's only a 1280x1024 mode
+   o There's only a 1280x1024 mode.
 
 4.  Configuration
 
 The driver auto-detects all device information necessary to initialize the
-card.  The only lines you need in the "Device" section of your XF86Config
-file are:
+card on the Indy. The only lines you need in the "Device" section of your
+XF86Config file are:
 
             Section "Device"
                 Identifier "SGI newport"
                 Driver     "newport"
             EndSection
 
+Indigo2 users have to use the BusID option as documented below.
+
 However, if you have problems with auto-detection, you can specify:
 
    o bitplanes - number of physical bitplanes (8 or 24)
 
+   o HWCursor - enable or disable hardware cursor
+
+   o BusID - set this to "1" on the Indigo2 XL
+
 5.  Authors
 
    o Guido Guenther <agx@sigxcpu.org>
@@ -54,7 +60,7 @@ However, if you have problems with auto-detection, you can specify:
 
    o all the guys who wrote the newport_con linux kernel code
 
-     Generated from XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/newport.sgml,v 1.4 2002/01/16 18:21:04 dawes Exp $
+     Generated from XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/newport.sgml,v 1.6 2003/02/25 19:31:02 dawes Exp $
 
 
-$XFree86: xc/programs/Xserver/hw/xfree86/doc/README.newport,v 1.5 2002/01/16 20:51:03 dawes Exp $
+$XFree86: xc/programs/Xserver/hw/xfree86/doc/README.newport,v 1.7 2003/02/25 21:32:35 dawes Exp $
diff --git a/xc/programs/Xserver/hw/xfree86/doc/README.s3virge b/xc/programs/Xserver/hw/xfree86/doc/README.s3virge
index 7e1909d69..fe1ba8a26 100644
--- a/xc/programs/Xserver/hw/xfree86/doc/README.s3virge
+++ b/xc/programs/Xserver/hw/xfree86/doc/README.s3virge
@@ -6,11 +6,10 @@
 
 1.  Supported hardware
 
-The s3virge driver in XFree86 4.2.0 supports the S3 ViRGE, ViRGE DX, GX, GX2,
+The s3virge driver in XFree86 4.3.0 supports the S3 ViRGE, ViRGE DX, GX, GX2,
 MX, MX+, and VX chipsets.  It also supports Trio3D and Trio3D/2x chips.  A
 majority of testing is done on ViRGE DX chips, making them the most stable to
-date.  This release has some stabilization fixes for MX, GX2 and Trio3D, and
-XVideo support for MX and GX2.
+date.  This release has added support for doublescan modes on DX.
 
 This driver is moderately stable, however please use caution with any new
 install.  Please report any problems to <XFree86@XFree86.org> using the
@@ -24,11 +23,15 @@ appropriate bug report sheet.
 
    o supports resolutions up to 2048x2048
 
-   o supports color depths of 8, 15, 16, 24.
+   o supports color depths of 8, 15, 16 and 24
 
    o full use of video card memory for acceleration caching when visible
      framebuffer leaves extra memory
 
+   o XVideo on DX, GX, GX2, MX, MX+ and Trio3D/2X at depth 16 and 24
+
+   o Doublescan modes on DX, possibly others (untested)
+
 3.  Configuration:
 
 The driver auto-detects RAM size, RAMDAC and ClockChip. Do not bother putting
@@ -43,9 +46,8 @@ options.
 5.  Support:
 
 For support with XFree86 video drivers please refer to our web site at
-XFree86 <URL:http://www.XFree86.org>.  The web page has a  bug reporting form
-available.  For problems not addressed in the web page please contact our
-support email address  <XFree86@XFree86.org>
+XFree86 <URL:http://www.XFree86.org>.  For problems not addressed in the web
+page please contact our support email address  <XFree86@XFree86.org>
 
 6.  Authors
 
@@ -59,7 +61,7 @@ support email address  <XFree86@XFree86.org>
 
    o Kevin Brosius <cobra@compuserve.com>
 
-     Generated from XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/s3virge.sgml,v 1.5 2001/12/21 21:01:57 dawes Exp $
+     Generated from XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/s3virge.sgml,v 1.6 2003/02/13 03:21:33 dawes Exp $
 
 
-$XFree86: xc/programs/Xserver/hw/xfree86/doc/README.s3virge,v 1.9 2002/01/07 22:07:16 dawes Exp $
+$XFree86: xc/programs/Xserver/hw/xfree86/doc/README.s3virge,v 1.15 2003/02/24 04:03:24 dawes Exp $
diff --git a/xc/programs/Xserver/hw/xfree86/doc/RELNOTES b/xc/programs/Xserver/hw/xfree86/doc/RELNOTES
index 6c5d6cebb..5e5d93bbe 100644
--- a/xc/programs/Xserver/hw/xfree86/doc/RELNOTES
+++ b/xc/programs/Xserver/hw/xfree86/doc/RELNOTES
@@ -1,222 +1,203 @@
-                     Release Notes for XFree86[tm] 4.2.0
+                     Release Notes for XFree86[tm] 4.3.0
 
                           The XFree86 Project, Inc
 
-                               17 January 2002
+                              26 February 2003
 
                                   Abstract
 
      This document contains some information about features present in
-     XFree86 4.2.0 and their status.
+     XFree86 4.3.0 and their status.
 
 1.  Introduction to the 4.x Release Series
 
 XFree86 4.0 was the first official release of the new XFree86 4 series.  The
-current release (4.2.0) is the latest in that series.  XFree86 4 represents a
+current release (4.3.0) is the latest in that series.  XFree86 4 represents a
 significant redesign of the XFree86 X server.  Not all of the hardware
-drivers from 3.3.x have been ported to 4.x yet, but conversely, 4.x has some
-hardware support not present in 3.3.x.  Our Driver Status document summarizes
-how the hardware driver support compares between 3.3.6 and 4.2.0.  Please
-check there first before downloading 4.2.0.
+drivers from 3.3.x have been ported to 4.x yet, but conversely, 4.x has sup-
+port for a lot of hardware that is not supported in 3.3.x.  Our Driver Status
+document summarizes how the hardware driver support compares between 3.3.6
+and 4.3.0.  Please check there first before downloading 4.3.0.
 
 The 4.0.1 release introduced a new graphical configuration tool, "xf86cfg",
-and a text mode interface was added to it for the 4.0.2 release.  It is work
-in progress, but definitely worth trying out.  The trusty old text-based tool
-"xf86config" can also be used for generating X server config files.  In addi-
-tion to these tools, we've been working on a configuration tool that is
-built-in to the X server.  It is included in the release, and it works well
-for some hardware.  To try it out, just run (as root) "XFree86 -configure".
+and a text mode interface was added to it for the 4.0.2 release.  It is the
+preferred configuration tool provided by with XFree86.  The trusty old text-
+based tool "xf86config" can also be used for generating X server config
+files.  In addition to these tools, the XFree86 server has some built in
+capabilities for generating a base config file.  This works well for most
+hardware, and in most cases is the easiest way to get an initial config file.
+To try it out, just run (as root):
+
+     XFree86 -configure
+
 Each of these configuration options will give you a reasonable starting point
 for a suitable configuration file.  We've put some effort into documenting
-the 4.2.0 config file format, and you can find that information in the
-XF86Config manual page. Check that, the driver manual pages and the related
-documentation for further information.
+the 4.3.0 config file format, and you can find that information in the
+XF86Config manual page.  Check there and the driver-specific manual pages and
+the related documentation for further information.  References to this
+driver-specific information can be found in the tables below (section 3.,
+page 1).
+
+We have plans to make the configuration file optional in a future release.
+The XFree86 server is close to being able to automatically determine a com-
+plete base configuration for most popular hardware configurations.
 
 Before you go to download and install the binary distributions for this
 release, please have a quick read through the Installation Document.  It may
 save you some time and help you figure out which of the binary releases you
 need.
 
-The next section describes what is new in the latest version (4.2.0) compared
-with the previous full release (4.1.0).  The other sections below describe
+The next section describes what is new in the latest version (4.3.0) compared
+with the previous full release (4.2.0).  The other sections below describe
 some of the new features and changes between 3.3.x and 4.0.  There are lot's
 of new features, and we definitely don't have enough space to cover them all
 here.
 
-2.  Summary of new features in 4.2.0.
+2.  Summary of new features in 4.3.0.
 
 2.1  Video Driver Enhancements
 
-   o  An s3 driver is added, which provides support for many of the older
-     non-ViRGE and non-Savage S3 chipsets.
-
-   o  Some vmware driver problems are fixed, and the driver is updated to
-     take advantage of VMWare Workstation 3.0 features.  These include
-     improved hardware cursor handling and support for 8 bit emulation.
-
-   o  Support added for Trident *BladeXP chipsets (currently not-acceler-
-     ated).
-
-   o  Xv support added for Trident TGUI series chips (not 9440 though).
-
-   o  Support added for the older Trident chipsets again for ISA/VLBus (not
-     tested)
-
-   o  Support added to the glint driver for 3DLabs Permedia4, GLINT R4 and
-     Gamma 2 chipsets.
+   o  ATI Radeon 9x00 2D support added, and 3D support added for the Radeon
+     8500, 9000, 9100, and M9.  The 3D support for the Radeon now includes
+     hardware TCL.
 
-   o  Support added to the i810 driver for Intel i830 (tested on Linux only).
+   o  Support added to the i810 driver for Intel 845G, 852GM, 855GM and 865G
+     integrated graphics chipsets, including 2D, 3D (DRI) and XVideo.  Sup-
+     port for the 830M has been improved, and XVideo support added.
 
-   o  Support added to the ATI radeon driver for Radeon 7500 (2D and 3D),
-     Radeon 8500 (2D only), and Rage128ProII.
+   o  National Semiconductor SC1x00, GX1, and GX2 chipset support added with
+     the "nsc" driver.
 
-   o  Support added for the Matrox G550 support.  This included dual-head
-     support.
+   o  Support added for the NVIDIA nForce2 integrated graphics, GeForce 4,
+     and GeForce FX.
 
-   o  Support added for NVIDIA nForce integrated graphics.
+   o  Major SiS driver updates for some of the latest chipsets.  Unfortu-
+     nately the SiS 3D driver has had to be disabled because no one has yet
+     taken up the challenge to port it to Mesa 4.x.
 
-   o  The NVIDIA nv driver now has preliminary powerpc support for the NV11
-     and NV20.
+   o  The s3virge driver now has support for double scan modes on the DX
+     (with XVideo disabled).
 
-   o  Support added to the NVIDIA nv driver for interlaced modes on hardware
-     that supports this, and support for resolutions higher than 1600x1200.
+   o  Updates to the savage driver, including fixing problems with the
+     TwisterK, and problems with incorrect memory size detection.
 
-   o  Fixes for the savage driver on 64-bit platforms, XVideo support for the
-     SuperSavage, and other savage driver updates.
+   o  2D acceleration added for the Trident CyberBladeXP/Ai1 chipsets.
 
-   o  The ATI r128 driver now uses the CCE DMA engine for 2D acceleration
-     when direct rendering is enabled, which reduces context switching over-
-     head and improves stability and performance for XVideo and some 2D oper-
-     ations.
+   o  Support for big endian architectures has been added to the C&T driver.
 
-   o  The fbdev driver now supports rotation.
-
-   o  Various updates to the apm, ark, chips (C&T), cirrus, i128, neomagic,
-     newport, s3virge, siliconmotion, sis, tdfx, tseng, vesa, and vga
-     drivers.
+   o  Various updates and bug fixes have been made to most other drivers.
 
 2.2  Input Driver Enhancements
 
-   o  The mouse driver now has support for mouse wheel emulation.
-
-   o  The mouse driver can now handle replug events on Linux for PS/2 mice.
-
-   o  The "Min/Max X/Y Position" options in the elographics and mutouch
-     drivers are changed to "Min/Max X/Y" to be consistent with the other
-     input drivers.
-
-   o  Linux USB keyboard access is fixed when no PS/2 controller is present.
+   o  The mouse driver now has automatic protocol detection for PS/2 mice.
 
-   o  Added calcomp input driver.
-
-   o  Added DMC input driver.
-
-   o  Added hyperpen input driver.
+   o  Several new input drivers have been added, including tek4957, jamstudio
+     (js_x), fpit, palmax, and ur98 (Linux only).
 
 2.3  X Server and Extension Updates
 
-   o  Resynced with X.Org's X11R6.6.
-
-   o  Mesa updated to the post-3.4.2 3.4 branch version as of November 2001.
-
-   o  DRI drivers resynced with the latest from the DRI project.
-
-   o  Various updates to the Xft library.
-
-   o  The DEC-XTRAP extension is now available.
-
-   o  The PEX and XIE extensions are no longer built/distributed by default.
-
-   o  A security problem related to glyph clipping for large origins is
-     fixed.
+   o  Support for the RandR extension has been partially integrated into the
+     XFree86 server, providing support for resizing the root window at run-
+     time.
 
-   o  An i810 XvMC (motion compensation) driver is now available (Linux
-     only).
+   o  The Mesa version used for OpenGL® 1.3 and DRI driver support has been
+     updated to 4.0.4.
 
-   o  A fatal bug XVideo Xineramification bug is fixed.
+   o  The XFree86 server's hot keys (including those for switching modes and
+     virtual terminals) can now be configured via XKB.  Previously they were
+     hard coded.  An X server configuration option has been added to allow
+     the VT switching hot keys to be disabled.
 
 2.4  Client and Library Updates
 
-   o  FreeType2 updated to version 2.0.6.
+   o  An Xcursor library providing support for alpha blended (ARGB) and ani-
+     mated cursors.  Two Xcursor themes are provided (redglass and white-
+     glass), as well as the default "core" theme (the traditional cursors).
 
-   o  Added libGL man pages.
+   o  Xterm updated to patch level 173, including the following bugfixes:
 
-   o  Xload now has support for displaying the load of remote hosts.
+        o  Fix two infinite loops (special cases of mouse hilite tracking,
+          DECUDK parsing).
 
-   o  Xterm updated to patch level 165.
+        o  Make repainting of the 256-color example work properly.
 
-   o  SuperProbe is removed.
+        o  Modify parser tables to improve detection of malformed control
+          sequences, making xterm behave more like a real DEC terminal.
 
-   o  Sample xtrap clients added.
-
-2.5  I18N and Font Updates
+        o  Fix a problem with the blinking cursor which occasionally caused
+          xterm to pause until a key was pressed.
 
-   o  New Luxi scalable fonts (TrueType and Type 1) from Bigelow & Holmes.
-     These fonts are original designs by Kris Holmes and Charles Bigelow.
-     See below (section 4.22, page 1) for further information.
+        o  Fix improper parsing of multiple items in the ttyModes resource.
 
-   o  More locale/international keyboards supported.
+     and the following improvements:
 
-   o  Modularized I18N support in Xlib is included from X11R6.6.
+        o  Modify xterm to invoke luit.
 
-   o  A problem that caused bdftopcf to sometimes write corrupted fonts is
-     fixed.
+        o  Add simple session management client capabilities.
 
-   o  Some problem with Xlib's handling of CTEXT and multi-byte characters
-     are fixed.
+        o  Add a modifyCursorKeys resource to control how the shift- and sim-
+          ilar modifiers are used to make a cursor escape sequence.
 
-   o  The fontenc layer is updated, and the fontenc library is now installed
-     and available for other applications.
+        o  Check if the printerCommand resource string is empty, and use this
+          to allow the user to disable printer function.
 
-   o  Improvements to the input method framework in Xlib for UTF-8 locales.
+        o  Sort the options list which is displayed in help- and syntax-mes-
+          sages at runtime to simplify maintenance.
 
-   o  A filter called ``luit'' is added, which provides locale and ISO 2022
-     support to any Unicode terminal, notably xterm.  Use of luit is still
-     experimental in this release.
+2.5  I18N and Font Updates
 
-2.6  OS Support Updates
+   o  FreeType2 updated to version 2.1.1.
 
-   o  Build problems on both QNX4 and QNX6 are fixed.
+   o  The "freetype" X server font backend has undergone a partial rewrite.
+     The new version is based on FreeType 2, and handles TrueType (including
+     OpenType/TTF), OpenType/CFF and Type 1 fonts.  The old "type1" backend
+     is now deprecated, and is only used for CIDFonts by default.
 
-   o  VT switching problems with the i810 driver on FreeBSD are worked
-     around.
+   o  A new utility called "mkfontscale", which builds fonts.scale files, has
+     been added.
 
-   o  Problems building modules with some enhanced versions of gcc are fixed.
+   o  The Xft library has undergone a major restructuring, and is now split
+     into fontconfig (which deals with font discovery and configuration and
+     is independent from X), and Xft itself (which uses fontconfig and deals
+     with font rasterisation and rendering.  The format of the Xft font con-
+     figuration files has changed in an incompatible manner.
 
-   o  Lots of updates for Darwin/Mac OS X, including:
+   o  Support has been added to the Xft library to do rendering with the core
+     X11 protocol.  This allows clients using this library to render to X
+     servers that don't have support for the RENDER extension.
 
-        o  On Mac OS X, a new rootless mode is added to the XDarwin X server.
-          This allows X clients to display windows on the Aqua desktop.
+   o  There has been a significant reworking of the XKB support to allow
+     multi-layout configurations.  Multi-layout configurations provide a
+     flexible way of supporting multiple language layouts and switching
+     between them.
 
-        o  Xinerama support added to XDarwin
+2.6  OS Support Updates
 
-        o  With XDarwin in full screen mode, the depth, size, and refresh
-          rate can now be chosen to be different from the settings used by
-          Aqua.
+   o  Updates for Darwin/Mac OS X, including:
 
-        o  GLX support added for Darwin and Mac OS X with software rendering.
+        o  Indirect GLX acceleration added.
 
-        o  Keymap setup in XDarwin is improved, particularly for interna-
-          tional keyboards.
+        o  Smaller memory footprint and faster 2-D drawing in rootless mode.
 
-        o  In addition to English and Japanese, the XDarwin user interface is
-          now localized in Dutch, French, German, Spanish, and Korean.
+        o  Full screen mode now uses shadowfb for much faster 2-D drawing.
 
-   o  Lots of Cygwin support updates.
+        o  Native fonts can be used on MacOS X.
 
-   o  Support added for OpenBSD/powerpc.
+   o  Various Cygwin support updates, including an experimental rootless X
+     server for Cygwin/XFree86.
 
-   o  Build support added for Linux on IBM S/390.
+   o  AMD x86-64 support (primarily for Linux so far) has been added.
 
-   o  Removed stale support for Amoeba and Minix.
+   o  Support added for OpenBSD/sparc64.
 
-   o  Client-side support added for sparc64 on NetBSD and OpenBSD.
+   o  Major OS/2 support updates.
 
-   o  Support added for building the X server on Linux/m68k.
+   o  Major SCO OpenServer updates.
 
-   o  Support added for building on Linux/arm32.
+   o  Multi-head support has been added for 460GX-based Itanium systems, and
+     for ZX1-based Itanium2 systems.
 
-   o  Updates to Linux/mips support.
+   o  Experimental support for SunOS/Solaris on UltraSPARC systems.
 
 A more complete list of changes can be found in the CHANGELOG that is part of
 the XFree86 source tree.  It can also be viewed online at our CVSweb server
@@ -227,49 +208,50 @@ grams/Xserver/hw/xfree86/CHANGELOG?rev=HEAD>.
 
 3.1  Video Drivers
 
-XFree86 4.2.0 includes the following video drivers:
-
-+--------------+--------------------------+----------------------------------+
-|Driver Name   | Description              | Further Information              |
-+--------------+--------------------------+----------------------------------+
-|apm           | Alliance Pro Motion      | README.apm                       |
-|ark           | Ark Logic                |                                  |
-|ati           | ATI                      | README.ati, README.r128, r128(4) |
-|chips         | Chips & Technologies     | README.chips, chips(4)           |
-|cirrus        | Cirrus Logic             |                                  |
-|cyrix (*)     | Cyrix MediaGX            | README.cyrix                     |
-|fbdev         | Linux framebuffer device | fbdev(4)                         |
-|glide         | Glide2x (3Dfx)           | glide(4)                         |
-|glint         | 3Dlabs, TI               | glint(4)                         |
-|i128          | Number Nine              | README.I128, i128(4)             |
-|i740          | Intel i740               | README.i740                      |
-|i810          | Intel i810               | README.i810, i810(4)             |
-|imstt         | Integrated Micro Solns   |                                  |
-|mga           | Matrox                   | mga(4)                           |
-|neomagic      | NeoMagic                 | neomagic(4)                      |
-|newport (-)   | SGI Newport              | README.newport, newport(4)       |
-|nv            | NVIDIA                   | nv(4)                            |
-|rendition     | Rendition                | README.rendition, rendition(4)   |
-|s3            | S3 (not ViRGE or Savage) |                                  |
-|s3virge       | S3 ViRGE                 | README.s3virge, s3virge(4)       |
-|savage        | S3 Savage                | savage(4)                        |
-|siliconmotion | Silicon Motion           | siliconmotion(4)                 |
-|sis           | SiS                      | README.SiS                       |
-|sunbw2 (+)    | Sun bw2                  |                                  |
-|suncg14 (+)   | Sun cg14                 |                                  |
-|suncg3 (+)    | Sun cg3                  |                                  |
-|suncg6 (+)    | Sun GX and Turbo GX      |                                  |
-|sunffb (+)    | Sun Creator/3D, Elite 3D |                                  |
-|sunleo (+)    | Sun Leo (ZX)             |                                  |
-|suntcx (+)    | Sun TCX                  |                                  |
-|tdfx          | 3Dfx                     |                                  |
-|tga           | DEC TGA                  | README.DECtga                    |
-|trident       | Trident                  | trident(4)                       |
-|tseng         | Tseng Labs               |                                  |
-|vesa          | VESA                     | vesa(4)                          |
-|vga           | Generic VGA              | vga(4)                           |
-|vmware        | VMWare guest OS          | vmware(4)                        |
-+--------------+--------------------------+----------------------------------+
+XFree86 4.3.0 includes the following video drivers:
+
++--------------+--------------------------+---------------------------------------------+
+|Driver Name   | Description              | Further Information                         |
++--------------+--------------------------+---------------------------------------------+
+|apm           | Alliance Pro Motion      | README.apm                                  |
+|ark           | Ark Logic                |                                             |
+|ati           | ATI                      | README.ati, README.r128, r128(4), radeon(4) |
+|chips         | Chips & Technologies     | README.chips, chips(4)                      |
+|cirrus        | Cirrus Logic             |                                             |
+|cyrix (*)     | Cyrix MediaGX            | README.cyrix                                |
+|fbdev         | Linux framebuffer device | fbdev(4)                                    |
+|glide         | Glide2x (3Dfx)           | glide(4)                                    |
+|glint         | 3Dlabs, TI               | glint(4)                                    |
+|i128          | Number Nine              | README.I128, i128(4)                        |
+|i740          | Intel i740               | README.i740                                 |
+|i810          | Intel i8xx               | README.i810, i810(4)                        |
+|imstt         | Integrated Micro Solns   |                                             |
+|mga           | Matrox                   | mga(4)                                      |
+|neomagic      | NeoMagic                 | neomagic(4)                                 |
+|newport (-)   | SGI Newport              | README.newport, newport(4)                  |
+|nsc           | National Semiconductor   | nsc(4)                                      |
+|nv            | NVIDIA                   | nv(4)                                       |
+|rendition     | Rendition                | README.rendition, rendition(4)              |
+|s3            | S3 (not ViRGE or Savage) |                                             |
+|s3virge       | S3 ViRGE                 | README.s3virge, s3virge(4)                  |
+|savage        | S3 Savage                | savage(4)                                   |
+|siliconmotion | Silicon Motion           | siliconmotion(4)                            |
+|sis           | SiS                      | README.SiS, sis(4)                          |
+|sunbw2 (+)    | Sun bw2                  |                                             |
+|suncg14 (+)   | Sun cg14                 |                                             |
+|suncg3 (+)    | Sun cg3                  |                                             |
+|suncg6 (+)    | Sun GX and Turbo GX      |                                             |
+|sunffb (+)    | Sun Creator/3D, Elite 3D |                                             |
+|sunleo (+)    | Sun Leo (ZX)             |                                             |
+|suntcx (+)    | Sun TCX                  |                                             |
+|tdfx          | 3Dfx                     | tdfx(4)                                     |
+|tga           | DEC TGA                  | README.DECtga                               |
+|trident       | Trident                  | trident(4)                                  |
+|tseng         | Tseng Labs               |                                             |
+|vesa          | VESA                     | vesa(4)                                     |
+|vga           | Generic VGA              | vga(4)                                      |
+|vmware        | VMWare guest OS          | vmware(4)                                   |
++--------------+--------------------------+---------------------------------------------+
 
 Drivers marked with (*) are present in a preliminary form in this release,
 but are not complete and/or stable yet.
@@ -281,40 +263,49 @@ Drivers marked with (-) are for Linux/mips only.
 Darwin/Mac OS X uses IOKit drivers and does not use the module loader drivers
 listed above. Further information can be found in README.Darwin.
 
-XFree86 4.2.0 includes the following input drivers:
+XFree86 4.3.0 includes the following input drivers:
 
 3.2  Input Drivers
 
-          +------------+--------------------+---------------------+
-          |Driver Name | Description        | Further Information |
-          +------------+--------------------+---------------------+
-          |calcomp     | Calcomp            |                     |
-          |citron      | Citron             | citron(4)           |
-          |digitaledge | DigitalEdge        |                     |
-          |dmc         | DMC                | dmc(4)              |
-          |dynapro     | Dynapro            |                     |
-          |elographics | EloGraphics        |                     |
-          |hyperpen    | HyperPen           |                     |
-          |keyboard    | generic keyboards  | keyboard(4)         |
-          |microtouch  | MicroTouch         |                     |
-          |mouse       | most mouse devices | mouse(4)            |
-          |mutouch     | MicroTouch         |                     |
-          |penmount    | PenMount           |                     |
-          |spaceorb    | SpaceOrb           |                     |
-          |summa       | SummaGraphics      |                     |
-          |void        | dummy device       | void(4)             |
-          |wacom       | Wacom tablets      | wacom(4)            |
-          +------------+--------------------+---------------------+
+   +------------+----------------------------------+---------------------+
+   |Driver Name | Description                      | Further Information |
+   +------------+----------------------------------+---------------------+
+   |calcomp     | Calcomp                          |                     |
+   |citron      | Citron                           | citron(4)           |
+   |digitaledge | DigitalEdge                      |                     |
+   |dmc         | DMC                              | dmc(4)              |
+   |dynapro     | Dynapro                          |                     |
+   |elographics | EloGraphics                      |                     |
+   |elographics | EloGraphics                      |                     |
+   |fpit        | Fujitsu Stylistic Tablet PCs     | fpit(4)             |
+   |hyperpen    | HyperPen                         |                     |
+   |js_x        | JamStudio pentablet              | js_x(4)             |
+   |kbd         | generic keyboards (alternate)    | kbd(4)              |
+   |keyboard    | generic keyboards                | keyboard(4)         |
+   |microtouch  | MicroTouch                       |                     |
+   |mouse       | most mouse devices               | mouse(4)            |
+   |mutouch     | MicroTouch                       |                     |
+   |palmax      | Palmax PD1000/PD1100             | palmax(4)           |
+   |penmount    | PenMount                         |                     |
+   |spaceorb    | SpaceOrb                         |                     |
+   |summa       | SummaGraphics                    |                     |
+   |tek4957     | Tektronix 4957 tablet            | tek4957(4)          |
+   |ur98(*)     | Union Reality UR-F98 headtracker | ur98(4)             |
+   |void        | dummy device                     | void(4)             |
+   |wacom       | Wacom tablets                    | wacom(4)            |
+   +------------+----------------------------------+---------------------+
+
+Drivers marked with (*) are available for Linux only.
 
 4.  Overview of XFree86 4.x.
 
 Unlike XFree86 3.3.x where there are multiple X server binaries, each of
-which drive different hardware, XFree86 4.2.0 has a single X server binary
+which drive different hardware, XFree86 4.3.0 has a single X server binary
 called XFree86.  This binary can either have one or more video drivers linked
 in statically, or, more usually, dynamically load the video drivers and other
 modules that are needed.
 
-XFree86 4.2.0 has X server support for most UNIX(R) and UNIX-like operating
+XFree86 4.3.0 has X server support for most UNIX(R) and UNIX-like operating
 systems on Intel/x86 platforms, plus support for Linux on Alpha, PowerPC,
 IA-64, Sparc, and Mips platforms, and for Darwin on PowerPC.  Work on support
 for additional architectures and operating systems is in progress, and is
@@ -336,7 +327,7 @@ they do not need to be recompiled for every different operating system.  In
 the future we plan to take advantage of this to provide more frequent driver
 module updates in between major releases.
 
-The loader in version 4.2.0 has support for Intel (x86), Alpha and PowerPC
+The loader in version 4.3.0 has support for Intel (x86), Alpha and PowerPC
 platforms.  It also has preliminary support for Sparc platforms.
 
 The X server makes use of modules for video drivers, X server extensions,
@@ -442,7 +433,7 @@ ual page for more comprehensive information:
 
      The new option AllowDeactivateGrabs allows deactivating any active grab
      with the key sequence Ctrl+Alt+Keypad-Divide and the new option Allow-
-     ClosedownGrabs allows closing the conection to the grabbing client with
+     ClosedownGrabs allows closing the connection to the grabbing client with
      the key sequence Ctrl+Alt+Keypad-Multiply. Note that these options are
      off by default as they allow users to remove the grab used by screen
      saver/locker programs.
@@ -517,8 +508,8 @@ ual page for more comprehensive information:
                    Option      "BlankTime"  "5"
                EndSection
 
-     See the XF86Config man page for a more detailed explanation of the for-
-     mat of the new ServerLayout section.
+     See the XF86Config(5) man page for a more detailed explanation of the
+     format of the new ServerLayout section.
 
 The config file search patch has been extended, with the directories /etc/X11
 and /usr/X11R6/etc/X11 being added.  The full search path details are docu-
@@ -684,7 +675,7 @@ Known problems:
 
 4.7  DGA version 2
 
-DGA 2.0 is included in 4.2.0, but is not implemented by all drivers.  Prelim-
+DGA 2.0 is included in 4.3.0, but is not implemented by all drivers.  Prelim-
 inary documentation for the client libraries can be found in the README.DGA
 document.  A good degree of backwards compatibility with version 1.0 is pro-
 vided.
@@ -753,7 +744,7 @@ anti-aliased text and geometric objects as well as perform translucent image
 overlays and other image operations not possible with the core X rendering
 system.
 
-XFree86 4.2.0 provides a partial implementation of Render sufficient for
+XFree86 4.3.0 provides a partial implementation of Render sufficient for
 drawing anti-aliased text and image composition.  Still to be implemented are
 geometric primitives and affine transformation of images.
 
@@ -784,31 +775,16 @@ XFree86 to use an existing FreeType installation.
 The Xft library uses a configuration file, XftConfig, which contains informa-
 tion about which directories contain font files and also provides a sophisti-
 cated font aliasing mechanism.  Documentation for that file is included in
-the Xft man page.
+the Xft(3) man page.
 
 4.11.2  FreeType support in Xft
 
-XFree86 4.2.0 includes sources for FreeType version 2.0.6, and, by default,
+XFree86 4.3.0 includes sources for FreeType version 2.1.1, and, by default,
 they are built and installed automatically.
 
-If you prefer, you can configure XFree86 4.2.0 to use an existing Freetype2
-installation by telling XFree86 not to build the internal copy and indicating
-where that external version has been installed. Edit (or create) con-
-fig/cf/host.def to include:
-
-   o #define BuildFreetype2Library NO
-
-   o #define Freetype2Dir /usr/local
-
-Note that XFree86 assumes you'll be using a release FreeType no older than
-version 2.0.1.  Early FreeType version 2 releases used a different header
-file installation and aren't compatible with XFree86. Instructions for build-
-ing and installing FreeType can be found in the INSTALL file included with
-the FreeType release.
-
 4.11.3  Application Support For Anti-Aliased Text
 
-Only three applications have been modified in XFree86 4.2.0 to work with the
+Only three applications have been modified in XFree86 4.3.0 to work with the
 Render extension and the Xft and FreeType libraries to provide anti-aliased
 text.  Xterm, xditview and x11perf.  Migration of other applications may
 occur in future releases.
@@ -837,120 +813,31 @@ The xgamma utility makes use of this feature.  Compatibility with the 3.3.x
 version of the extension is provided.  The missing parts of this extension
 and some new features should be completed in a future release.
 
-4.13  Xaw
-
-Two versions of the Xaw library are provided with XFree86 4.x. A version with
-bug fixes and a few binary compatible improvements and a new version with
-several new features.
-
-New features:
-
-   o A displayList resource is available to all Xaw widgets. It basically
-     consists of a list of drawing commands, fully described in the Xaw(3)
-     manual page, that enables a integration of Xaw programs with the new
-     window/desktop managers that allows for configurable themes.
-
-   o Some new actions were added to all Xaw widgets, to allow more config-
-     urable control of the widgets, and to allow setting resources at run
-     time.
-
-   o Since Xpm was integrated into XFree86, programs linked with the new Xaw
-     library     will also link with Xpm. This allows for color background
-     pixmaps, and also for shaped widgets.
-
-   o The text widget is the widget that will present more changes. These
-     include:
-
-        o Block cursor.
-
-        o Compile time limit of 16384 undo/redo levels (that will automati-
-          cally grow if the text is not saved when this mark is reached).
-
-        o Overwrite mode.
-
-        o Text killed is inserted in a kill ring list, this text is not for-
-          gotten, pressing M-y allows traversing the kill ring list.
-
-        o International support for latin languages is available even if the
-          international resource is not set. Users will need to properly set
-          the locale environment to make complete use of this feature.
-
-        o A better multiply interface is provided. Pressing C-u,<number>
-          (where number can be negative) allows passing parameters for text
-          actions.
-
-        o Text can be formatted to have left, right, center or full justifi-
-          cation.
-
-        o Text indentation support is also available.
-
-Bug fixes:
-
-   o The simple menu widget geometry management code was improved to solve
-     problems with menu entries not visible in the screen.
-
-   o The form widget geometry code was changed to solve problems with integer
-     round problems in the child widgets geometry when resizing the parent
-     form widget.
-
-   o Several bugs were fixed in the text code, while some code was rewritten
-     from scratch.
-
-4.14  Xpm
-
-Version 3.4k of the Xpm (X pixmap) library is now integrated into XFree86.
-
-4.15  xedit
-
-Xedit have been changed to use most of the new features added to the new ver-
-sion of the Xaw library, and some xedit only features were added. Emacs users
-will find that several of the emacs key bindings work with the new version of
-xedit. These include:
-
-   o File name tab completion. Including a Emacs dired like window, that will
-     be shown when there are more than one match, when C-x,d is pressed, or
-     when a directory name is specified.
-
-   o An unlimited number of files can be edited at the same time. Including
-     multiple views of the same or different files.
-
-   o The line number of the cursor position is always visible. It can also be
-     customized to show the column number, the position offset and the cur-
-     rent size of the file.
-
-   o There is an autoReplace resource, that enables automatic text replace-
-     ment at the time text is typed. This feature is useful to create simple
-     macros, or to correct common spelling errors.
-
-   o A fully featured ispell interface is also available. This interface is
-     expected to provide most of the features of the terminal interface of
-     the ispell program, with some extra features that include:
-
-        o A compile time limit of 16 undo levels.
+4.13  xedit
 
-        o Terse mode switch.
+Xedit has several new features, including:
 
-        o Dictionary change.
+   o An embedded lisp interpreter that allows easier extension of the editor.
 
-        o The interface also checks for repeated words.
+   o Several new syntax highlight modes, and indentation rules for C and
+     Lisp.
 
-   o A first tentative to add programming modes was done. Currently, there is
-     one mode:
+   o Flexible search/replace interface that allows regex matches.
 
-        o C-mode: this mode is expected to be stable, and fully usable.
+   o Please refer to xedit(1) for more details.
 
-4.16  Font support
+4.14  Font support
 
 Details about the font support in XFree86 4.x can be found in the
 README.fonts document.
 
-4.17  TrueType support
+4.15  TrueType support
 
 XFree86 4.x comes with two TrueType backends, known as `xfsft' (the
 "freetype" module) and `X-TrueType' (the "xtt" module).  Both of these back-
 ends are based on the FreeType library.
 
-4.18  CID font support
+4.16  CID font support
 
 Support for CID-keyed fonts is included in XFree86 4.x.  The CID-keyed font
 format was designed by Adobe Systems <URL:http://www.adobe.com> for fonts
@@ -958,7 +845,7 @@ with large character sets.  The CID-keyed font support in XFree86 was donated
 by SGI <URL:http://www.sgi.com>.  See the LICENSE document for a copy of the
 CID Font Code Public License.
 
-4.19  Internationalisation of the scalable font backends
+4.17  Internationalisation of the scalable font backends
 
 XFree86 4.x has a ``fontenc'' layer to allow the scalable font backends to
 use a common method of font re-encoding.  This re-encoding makes it possible
@@ -967,14 +854,14 @@ layer is used by the Type1 and Speedo backends and the `xfsft' version of the
 TrueType backend.  The `X-TrueType' version of the TrueType backend uses a
 different re-encoding method based on loadable encoding modules.
 
-4.20  Large font optimisation
+4.18  Large font optimisation
 
 The glyph metrics array, which all the X clients using a particular font have
 access to, is placed in shared memory, so as to reduce redundant memory con-
 sumption.  For non-local clients, the glyph metrics array is transmitted in a
 compressed format.
 
-4.21  Unicode/ISO 10646 support
+4.19  Unicode/ISO 10646 support
 
 What is included in 4.x:
 
@@ -1007,7 +894,7 @@ What is included in 4.x:
    o Both the xfsft (the "freetype" module) and the X-TrueType (the "xtt"
      module) TrueType font backends support Unicode-encoded fonts.
 
-4.22  Luxi fonts from Bigelow and Holmes
+4.20  Luxi fonts from Bigelow and Holmes
 
 XFree86 now includes the ``Luxi'' family of Type 1 fonts and TrueType fonts.
 This family consists of the fonts ``Luxi Serif'', ``Luxi Sans'' and
@@ -1032,7 +919,7 @@ as well as in the License document.  For further information, please contact
 <design@bigelowandholmes.com> or <info@urwpp.de>, or consult the URW++ web
 site <URL:http://www.urwpp.de>.
 
-4.23  Directory rearrangements
+4.21  Directory rearrangements
 
 Some changes to the installed XFree86 directory structure have been imple-
 mented for 4.x.  One important change is a modified search path for the X
@@ -1043,7 +930,7 @@ location pointing to the new location.  Some run-time generated files are now
 located under the appropriate subdirectories of /var, again with the relevant
 symbolic links in the old location.
 
-     Generated from XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/RELNOTES.sgml,v 1.71 2002/01/21 19:01:35 dawes Exp $
+     Generated from XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/RELNOTES.sgml,v 1.81 2003/02/27 00:45:05 dawes Exp $
 
 
-$XFree86: xc/programs/Xserver/hw/xfree86/doc/RELNOTES,v 3.105 2002/01/22 22:26:10 dawes Exp $
+$XFree86: xc/programs/Xserver/hw/xfree86/doc/RELNOTES,v 3.115 2003/02/27 01:44:03 dawes Exp $
diff --git a/xc/programs/Xserver/hw/xfree86/doc/Status b/xc/programs/Xserver/hw/xfree86/doc/Status
index afa704489..04834e7ef 100644
--- a/xc/programs/Xserver/hw/xfree86/doc/Status
+++ b/xc/programs/Xserver/hw/xfree86/doc/Status
@@ -1,24 +1,23 @@
-                     Driver Status for XFree86[tm] 4.2.0
+                     Driver Status for XFree86[tm] 4.3.0
 
                           The XFree86 Project, Inc
 
-                               16 January 2002
+                              23 February 2003
 
                                   Abstract
 
      This document provides information about the status of the driver
-     and hardware support in XFree86 4.2.0 compared with that in XFree86
+     and hardware support in XFree86 4.3.0 compared with that in XFree86
      3.3.6.  Please send updates for this document to
-     <fixes@xfree86.org>.  Please do not send requests for information
-     or support to that address (they will not be answered).
+     <XFree86@XFree86.org>.
 
 1.  Introduction
 
 This document contains one section per vendor (organised alphabetically) for
-each chipset family that is supported in XFree86 3.3.6 or XFree86 4.2.0.  It
+each chipset family that is supported in XFree86 3.3.6 or XFree86 4.3.0.  It
 includes information about the status of the drivers and the hardware they
 support, including a comparison of the level of support between versions
-3.3.6 and 4.2.0.  Unless otherwise stated, hardware is classified as "sup-
+3.3.6 and 4.3.0.  Unless otherwise stated, hardware is classified as "sup-
 ported" if its driver provides basic 2D support.  Support for additional fea-
 tures may or may not be present.
 
@@ -27,9 +26,9 @@ XF86_SVGA server, which has a set of driver modules that are built into it at
 compile time.  In other cases, X servers for specific chips (or families of
 chips) are provided (such as XF86_AGX, XF86_Mach64, etc.).
 
-In XFree86 4.2.0, there is only one X server, called "XFree86", which can
+In XFree86 4.3.0, there is only one X server, called "XFree86", which can
 load driver modules at runtime.  Thus there is no specific mention of a
-server binary when 4.2.0 is discussed; only the XFree86 server is used.
+server binary when 4.3.0 is discussed; only the XFree86 server is used.
 Third-party vendors (often the manufacturers of various video chipsets) may
 provide their own drivers for the XFree86 server, but these third-party mod-
 ules are beyond the scope of this document.
@@ -45,7 +44,7 @@ architectures known to work on (e.g., Alpha, PPC), etc.
             Support (including acceleration) for Voodoo Banshee and Voodoo3
             cards is provided by the XF86_SVGA server with the tdfx driver.
 
-      4.2.0:
+      4.3.0:
             Support for Voodoo Graphics and Voodoo2 chips is provided by the
             "glide" driver (this requires version 2.x of the Glide library,
             which is not part of the XFree86 distribution).
@@ -54,9 +53,9 @@ architectures known to work on (e.g., Alpha, PPC), etc.
             Voodoo4, and Voodoo5 is provided by the "tdfx" driver.
 
       Summary:
-            All hardware supported in 3.3.6 is also supported in 4.2.0.  The
+            All hardware supported in 3.3.6 is also supported in 4.3.0.  The
             Voodoo Graphics, Voodoo2, Voodoo4, and Voodoo5 are supported only
-            in 4.2.0.
+            in 4.3.0.
 
 3.  3Dlabs
 
@@ -66,16 +65,16 @@ architectures known to work on (e.g., Alpha, PPC), etc.
             RAMDACs), Permedia with IBM RGB526 RAMDAC, and Permedia 2, 2a, 2v
             is provided by the XF86_3DLabs server.
 
-      4.2.0:
+      4.3.0:
             Support (including acceleration) for the Permedia series (includ-
             ing 1, 2, 2a, 2v, 3, and 4) and GLINT series (including 300SX,
             500TX, MX, R3 and R4) with the Gamma, Gamma2 or Delta coprocessor
             is provided by the "glint" driver.
 
       Summary:
-            All hardware supported in 3.3.6 is also supported in 4.2.0.  The
+            All hardware supported in 3.3.6 is also supported in 4.3.0.  The
             Permedia 3, Permedia 4, GLINT R3, GLINT R4 and Gamma2 are sup-
-            ported only in 4.2.0.
+            ported only in 4.3.0.
 
 4.  Alliance
 
@@ -83,15 +82,15 @@ architectures known to work on (e.g., Alpha, PPC), etc.
             Support (including acceleration) for the AT24, AP6422, AT3D is
             provided by the XF86_SVGA server with the apm driver.
 
-      4.2.0:
+      4.3.0:
             Support (including acceleration) for the AT24, AT25 and AT3D is
             provided by the "apm" driver.  This driver currently has only
             incomplete support for the AP6422.
 
       Summary:
-            The AP6422 is supported in 3.3.6 but not fully in 4.2.0.  All
-            other hardware supported in 3.3.6 is also supported in 4.2.0.
-            The AT25 is supported only in 4.2.0.
+            The AP6422 is supported in 3.3.6 but not fully in 4.3.0.  All
+            other hardware supported in 3.3.6 is also supported in 4.3.0.
+            The AT25 is supported only in 4.3.0.
 
 5.  ARK Logic
 
@@ -100,12 +99,12 @@ architectures known to work on (e.g., Alpha, PPC), etc.
             and ARK2000MT is provided by the XF86_SVGA server with the ark
             driver.
 
-      4.2.0:
+      4.3.0:
             Support (including acceleration) for the ARK1000PV, ARK2000PV,
             and ARK2000MT is provided by the "ark" driver.
 
       Summary:
-            All hardware supported in 3.3.6 is also supported in 4.2.0.
+            All hardware supported in 3.3.6 is also supported in 4.3.0.
 
 6.  ATI
 
@@ -123,13 +122,13 @@ architectures known to work on (e.g., Alpha, PPC), etc.
             driver.  Accelerated support is provided for the Rage 128 chips
             by the XF86_SVGA server with the r128 driver.
 
-      4.2.0:
+      4.3.0:
             Accelerated support is provided for Mach64, Rage, Rage 128 and
             Radeon chips by the "ati" driver, as is unaccelerated support for
             all of the others except the Mach8 and some early Mach32 chips.
 
       Summary:
-            All hardware supported in 3.3.6 is also supported in 4.2.0 except
+            All hardware supported in 3.3.6 is also supported in 4.3.0 except
             for Mach8 and some old Mach32 chips.
 
 7.  Avance Logic
@@ -141,12 +140,12 @@ architectures known to work on (e.g., Alpha, PPC), etc.
             the others.  These drivers reportedly work, but they have no
             maintainer.
 
-      4.2.0:
+      4.3.0:
             No Avance Logic chips are supported because the old drivers have
             not been ported.
 
       Summary:
-            No Avance Logic chips are supported in 4.2.0.
+            No Avance Logic chips are supported in 4.3.0.
 
 8.  Chips and Technologies
 
@@ -155,13 +154,13 @@ architectures known to work on (e.g., Alpha, PPC), etc.
             65545, 65546, 65548, 65550, 65554, 65555, 68554, 69000, 64200 and
             64300 is provided by the XF86_SVGA server with the chips driver.
 
-      4.2.0:
+      4.3.0:
             Support (accelerated) for the 65520, 65525, 65530, 65535, 65540,
             65545, 65546, 65548, 65550, 65554, 65555, 68554, 69000, 64200 and
             64300 is provided by the "chips" driver.
 
       Summary:
-            All hardware supported in 3.3.6 is also supported in 4.2.0.
+            All hardware supported in 3.3.6 is also supported in 4.3.0.
 
 9.  Cirrus Logic
 
@@ -173,13 +172,13 @@ architectures known to work on (e.g., Alpha, PPC), etc.
             7541, 7542, 7543, 7548, 7555 and 7556 is provided by the
             XF86_SVGA server with the cirrus driver.
 
-      4.2.0:
+      4.3.0:
             Support (accelerated) for the Alpine (5430, 5434, 5436, 5446,
             5480, 7548), and Laguna (5462, 5464, 5465) chips is provided by
             the "cirrus" driver.
 
       Summary:
-            The following chips are supported in 3.3.6 but not in 4.2.0:
+            The following chips are supported in 3.3.6 but not in 4.3.0:
             6410, 6412, 6420, 6440, 5420, 5422, 5424, 5426, 5428, 5429, 6205,
             6215, 6225, 6235, 7541, 7542, 7543, 7555 and 7556.
 
@@ -195,7 +194,7 @@ architectures known to work on (e.g., Alpha, PPC), etc.
             24 plane 3D chips (on Alpha platforms) is provided by the
             XF86_TGA server.
 
-      4.2.0:
+      4.3.0:
             No support exists for the Compaq AVGA (its driver hasn't been
             ported).
 
@@ -204,8 +203,8 @@ architectures known to work on (e.g., Alpha, PPC), etc.
             the "tga" driver.
 
       Summary:
-            No Compaq AVGA chips are supported in 4.2.0.  DEC TGA support is
-            equivalent in both 3.3.6 and 4.2.0.
+            No Compaq AVGA chips are supported in 4.3.0.  DEC TGA support is
+            equivalent in both 3.3.6 and 4.3.0.
 
 11.  Cyrix
 
@@ -213,13 +212,13 @@ architectures known to work on (e.g., Alpha, PPC), etc.
             Support (accelerated) for the Cyrix MediaGX is provided by the
             XF86_SVGA server with the cyrix driver.
 
-      4.2.0:
-            The 3.3.6 driver has been ported to 4.2.0, including acceleration
+      4.3.0:
+            The 3.3.6 driver has been ported to 4.3.0, including acceleration
             support, and is provided by the "cyrix" driver.  Feedback is
             wanted.
 
       Summary:
-            Cyrix MediaGX users are encouraged to test its support in 4.2.0.
+            Cyrix MediaGX users are encouraged to test its support in 4.3.0.
 
 12.  Epson
 
@@ -227,12 +226,12 @@ architectures known to work on (e.g., Alpha, PPC), etc.
             Support (accelerated) for the Epson SPC8110 is provided by the
             XF86_SVGA server with the spc8100 driver.
 
-      4.2.0:
+      4.3.0:
             No Epson chips are supported, because the old driver has not been
             ported.
 
       Summary:
-            No Epson chips are supported in 4.2.0.
+            No Epson chips are supported in 4.3.0.
 
 13.  Genoa
 
@@ -242,12 +241,12 @@ architectures known to work on (e.g., Alpha, PPC), etc.
             because we don't have any recent test reports, and this driver
             has no maintainer.
 
-      4.2.0:
+      4.3.0:
             No Genoa chips are supported, because the old driver has not been
             ported.
 
       Summary:
-            No Genoa chips are supported in 4.2.0.
+            No Genoa chips are supported in 4.3.0.
 
 14.  IBM
 
@@ -262,7 +261,7 @@ architectures known to work on (e.g., Alpha, PPC), etc.
             Support for the IBM XGA-2 chip is provided by the XF86_AGX
             server.
 
-      4.2.0:
+      4.3.0:
             Support for the standard IBM VGA chip (and compatibles) is pro-
             vided by the "vga" driver.
 
@@ -271,7 +270,7 @@ architectures known to work on (e.g., Alpha, PPC), etc.
 
       Summary:
             The standard VGA core is supported in both versions, but there is
-            no support for the 8514/A or XGA-2 in 4.2.0.
+            no support for the 8514/A or XGA-2 in 4.3.0.
 
 15.  IIT
 
@@ -279,12 +278,12 @@ architectures known to work on (e.g., Alpha, PPC), etc.
             Support (accelerated) for the AGX-016, AGX-015 and AGX-014 is
             provided by the XF86_AGX server.
 
-      4.2.0:
+      4.3.0:
             No IIT chips are supported, because the old driver has not been
             ported.
 
       Summary:
-            No IIT chips are supported in 4.2.0.
+            No IIT chips are supported in 4.3.0.
 
 16.  Integrated Micro Solutions (IMS)
 
@@ -292,12 +291,12 @@ architectures known to work on (e.g., Alpha, PPC), etc.
             Support (accelerated) for the IMS Twin Turbo 128 and Twin Turbo
             3D is provided by the XF86_SVGA server with the imstt driver.
 
-      4.2.0:
+      4.3.0:
             Support (accelerated) for the IMS Twin Turbo 128 and Twin Turbo
             3D is provided by the "imstt" driver.
 
       Summary:
-            All hardware supported in 3.3.6 is also supported in 4.2.0.
+            All hardware supported in 3.3.6 is also supported in 4.3.0.
 
 17.  Intel
 
@@ -308,19 +307,22 @@ architectures known to work on (e.g., Alpha, PPC), etc.
             requires the agpgart.o kernel module in order to use modes that
             require more than 1MB of video memory.
 
-      4.2.0:
+      4.3.0:
             Support (accelerated) for the Intel i740 is provided by the
-            "i740" driver, and support for the Intel i810 (including
-            i810-dc100 and i810e), i815, and i830 is provided by the "i810"
-            driver.  The "i810" driver is currently supported only on Linux
-            and FreeBSD (4.1 and later), and requires AGP GART kernel sup-
-            port.
+            "i740" driver, and support for the Intel integrated graphics
+            chipsets i810, i810-dc100, i810e, i815, 830M, 845G, 852GM, 855GM
+            and 865G is provided by the "i810" driver.  The i810 and i815
+            chipsets require kernel-level AGP GART support (available on
+            Linux, FreeBSD, and some other BSDs).  The 830M and later can be
+            used without AGP GART support, but it is required for full func-
+            tionality.
 
       Summary:
             The i740 and and original i810 are supported in both versions,
-            but the i810 is supported only on Linux/x86 and recent
-            FreeBSD/i386 platforms at present.  Support for later versions of
-            the i810 chipset, such as the i815, exists only in 4.2.0.
+            but the i810/i815 is supported only on Linux, FreeBSD, and some
+            recent NetBSD/OpenBSD versions at present.  platforms at present.
+            Support for later versions of the i810 chipset, such as the i815,
+            and for the 830M and later exists only in 4.3.0.
 
 18.  Matrox
 
@@ -329,14 +331,14 @@ architectures known to work on (e.g., Alpha, PPC), etc.
             (Mystique), MGA2164W (Millennium II) (PCI and AGP), G100, G200
             and G400 is provided by the XF86_SVGA server with the mga driver.
 
-      4.2.0:
+      4.3.0:
             Support (accelerated) for the MGA2064W (Millennium I), MGA1064SG
             (Mystique), MGA2164W (Millennium II) (PCI and AGP), G100, G200,
             G400, G450, and G550 is provided by the "mga" driver.
 
       Summary:
-            All hardware supported in 3.3.6 is also supported in 4.2.0.  The
-            G450 and G550 are supported only in 4.2.0.
+            All hardware supported in 3.3.6 is also supported in 4.3.0.  The
+            G450 and G550 are supported only in 4.3.0.
 
 19.  Micronix, Inc. (MX)
 
@@ -346,88 +348,94 @@ architectures known to work on (e.g., Alpha, PPC), etc.
             is unknown because we don't have any recent test reports, and
             this driver has no maintainer.
 
-      4.2.0:
+      4.3.0:
             No MX chips are supported, because the old driver has not been
             ported.
 
       Summary:
-            No MX chips are supported in 4.2.0.
+            No MX chips are supported in 4.3.0.
 
-20.  NCR
+20.  National Semiconductor
+
+      4.3.0:
+            Support for the SC1x00, GX1, and GX2 is provided by the "nsc"
+            driver.
+
+21.  NCR
 
       3.3.6:
             Support for the old NCR 77C22 and 77C22E chips is provided by the
             XF86_SVGA server and the ncr77c22 driver.  The status of this
             support is unknown because we don't have any recent test reports.
 
-      4.2.0:
+      4.3.0:
             No NCR chips are supported, because the old driver has not been
             ported.
 
       Summary:
-            No NCR chips are supported in 4.2.0.
+            No NCR chips are supported in 4.3.0.
 
-21.  NeoMagic
+22.  NeoMagic
 
       3.3.6:
             Support (accelerated) for the NeoMagic NM2070, NM2090, NM2093,
             NM2097, NM2160 and NM2200 chipsets is provided by the XF86_SVGA
             server with the neo driver.
 
-      4.2.0:
+      4.3.0:
             Support (accelerated) for the NeoMagic NM2070, NM2090, NM2093,
             NM2097, NM2160, NM2200, NM2230, NM2360 and NM2380 chipsets is
             provided by the "neomagic" driver.
 
       Summary:
-            All hardware supported in 3.3.6 is also supported in 4.2.0.  The
-            NM2230 and later chips are supported only in 4.2.0.
+            All hardware supported in 3.3.6 is also supported in 4.3.0.  The
+            NM2230 and later chips are supported only in 4.3.0.
 
-22.  NVIDIA
+23.  NVIDIA
 
       3.3.6:
             Support (accelerated) for the NV1, Riva 128, 128ZX, TNT, TNT2
             (Ultra, Vanta, M64), GeForce (DDR, 256) and Quadro is provided by
             the XF86_SVGA server and the nv driver.
 
-      4.2.0:
+      4.3.0:
             Support (accelerated) for the Riva 128, 128ZX, TNT, TNT2 (Ultra,
             Vanta, M64), GeForce (DDR, 256), Quadro, GeForce2 (GTS, Ultra,
             MX), GeForce3, and Quadro2 is provided by the "nv" driver.
 
       Summary:
             All chipsets supported in 3.3.6 except the NV1 are also supported
-            in 4.2.0.  Support for the newer chips listed above (starting
-            with the GeForce2) is available only in 4.2.0.
+            in 4.3.0.  Support for the newer chips listed above (starting
+            with the GeForce2) is available only in 4.3.0.
 
-23.  Number Nine
+24.  Number Nine
 
       3.3.6:
             Support (accelerated) for the Imagine 128, Ticket 2 Ride, Revolu-
             tion 3D and Revolution IV is provided by the XF86_I128 server.
 
-      4.2.0:
+      4.3.0:
             Support (accelerated) for the Imagine 128, Ticket 2 Ride, Revolu-
             tion 3D and Revolution IV is provided by the "i128" driver.
 
       Summary:
-            All hardware supported in 3.3.6 is also supported in 4.2.0.
+            All hardware supported in 3.3.6 is also supported in 4.3.0.
 
-24.  Oak Technologies, Inc.
+25.  Oak Technologies, Inc.
 
       3.3.6:
             Support for the OTI067, OTI077, and OTI087 (the latter with some
             acceleration) is provided by the XF86_SVGA server and the oak
             driver.
 
-      4.2.0:
+      4.3.0:
             No Oak chips are supported, because the old driver has not been
             ported.
 
       Summary:
-            No Oak chips are supported in 4.2.0.
+            No Oak chips are supported in 4.3.0.
 
-25.  Paradise/Western Digital
+26.  Paradise/Western Digital
 
       3.3.6:
             Support for the Paradise PVGA1 and the Western Digital WD90C00,
@@ -436,14 +444,14 @@ architectures known to work on (e.g., Alpha, PPC), etc.
             port for some of these chipsets is uncertain because we don't
             have any recent test reports, and this driver has no maintainer.
 
-      4.2.0:
+      4.3.0:
             No Paradise/Western Digital chips are supported, because the old
             driver has not been ported.
 
       Summary:
-            No Paradise/Western Digital chips are supported in 4.2.0.
+            No Paradise/Western Digital chips are supported in 4.3.0.
 
-26.  RealTek
+27.  RealTek
 
       3.3.6:
             Support for the RealTek RTG3106 is provided by the XF86_SVGA
@@ -451,27 +459,27 @@ architectures known to work on (e.g., Alpha, PPC), etc.
             unknown because we don't have any recent test reports, and this
             driver has no maintainer.
 
-      4.2.0:
+      4.3.0:
             No RealTek chips are supported, because the old driver has not
             been ported.
 
       Summary:
-            No RealTek chips are supported in 4.2.0.
+            No RealTek chips are supported in 4.3.0.
 
-27.  Rendition/Micron
+28.  Rendition/Micron
 
       3.3.6:
             Support for the Verite 1000, 2100 and 2200 is provided by the
             XF86_SVGA server with the rendition driver.
 
-      4.2.0:
+      4.3.0:
             Support for the Verite 1000, 2100 and 2200 is provided by the
             "rendition" driver.
 
       Summary:
-            All hardware supported in 3.3.6 is also supported in 4.2.0.
+            All hardware supported in 3.3.6 is also supported in 4.3.0.
 
-28.  S3
+29.  S3
 
       3.3.6:
             Support (accelerated) for the S3 911, 924, 801, 805, 928, 864,
@@ -486,7 +494,7 @@ architectures known to work on (e.g., Alpha, PPC), etc.
             Savage4, and Savage2000, is provided by the XF86_SVGA server with
             the s3_savage driver on some OSes (Linux, *BSD).
 
-      4.2.0:
+      4.3.0:
             Support (accelerated) for the 964 (revisions 0 and 1), 968,
             Trio32, Trio64, Trio64, Trio64V+, Trio64UV+, Aurora64V+,
             Trio64V2, and PLATO/PX is provided by the "s3" driver (however,
@@ -500,61 +508,62 @@ architectures known to work on (e.g., Alpha, PPC), etc.
             yet been ported.
 
       Summary:
-            All hardware supported in 3.3.6 is also supported in 4.2.0 except
+            All hardware supported in 3.3.6 is also supported in 4.3.0 except
             for the 911, 924, 801, 805, 928, 864, and 868, and versions of
             the 964 and 968 that do not use the RAMDAC chips listed above.
-            The SuperSavage chipset is supported only in 4.2.0.
+            The SuperSavage chipset is supported only in 4.3.0.
 
-29.  Silicon Graphics, Inc. (SGI)
+30.  Silicon Graphics, Inc. (SGI)
 
       3.3.6:
             No SGI hardware is supported in 3.3.6.
 
-      4.2.0:
+      4.3.0:
             Unaccelerated support for the SGI Indy's Newport (a.k.a. "XL")
             cards is provided by the "newport" driver.
 
       Summary:
-            SGI hardware is supported only in 4.2.0.
+            SGI hardware is supported only in 4.3.0.
 
-30.  Silicon Integrated Systems (SiS)
+31.  Silicon Integrated Systems (SiS)
 
       3.3.6:
             Support (accelerated) for the SiS 86C201, 86C202, 86C205, 86C215,
             86C225, 5597, 5598, 6326, 530, 620, 300, 630 and 540 is provided
             by the XF86_SVGA server with the sis driver.
 
-      4.2.0:
-            Support (accelerated) for the SiS
-             530, 620, 6326 is provided by the "sis" driver.  The 630, 300,
-            and 540 are also supported, but this code is new and there are
-            some problems with it in this version.
+      4.3.0:
+            Support (accelerated) for the SiS 5597, 5598, 6326, 530, 620,
+            300, 540, 630, 730, 315, 550, 650, 651 and 740 is provided by the
+            "sis" driver. The Xabre (SiS 330) might be supported by this is
+            completely untested.
 
       Summary:
-            Support for the 86C201, 86C202, 86C205, 86C215, 86C225, 5597 and
-            5598 is currently only available in 3.3.6.
+            Support for the 86C201, 86C202, 86C205, 86C215 and 86C225 is cur-
+            rently only available in 3.3.6.  Support for some newer chipsets
+            is only available in 4.3.0.
 
-31.  Silicon Motion, Inc.
+32.  Silicon Motion, Inc.
 
       3.3.6:
             Support (accelerated) for the Lynx, LynxE, Lynx3D, LynxEM,
             LynxEM+ and Lynx3DM chips is provided by the XF86_SVGA server
             with the smi driver.
 
-      4.2.0:
+      4.3.0:
             Support (accelerated) for the Lynx, LynxE, Lynx3D, LynxEM,
             LynxEM+ and Lynx3DM chips is provided by the "siliconmotion"
             driver.
 
       Summary:
-            All hardware supported in 3.3.6 is also supported in 4.2.0.
+            All hardware supported in 3.3.6 is also supported in 4.3.0.
 
-32.  Sun Microsystems
+33.  Sun Microsystems
 
       3.3.6:
             No Sun hardware is supported in 3.3.6.
 
-      4.2.0:
+      4.3.0:
             Sun BW2 framebuffers are supported by the "sunbw2" driver.  Sun
             CG3 framebuffers are supported by the "suncg3" driver.  Sun CG6
             framebuffers are supported by the "suncg6" driver.  Sun CG14
@@ -564,9 +573,9 @@ architectures known to work on (e.g., Alpha, PPC), etc.
             framebuffers are supported by the "suntcx" driver.
 
       Summary:
-            Sun hardware is supported only in 4.2.0.
+            Sun hardware is supported only in 4.3.0.
 
-33.  Trident Microsystems
+34.  Trident Microsystems
 
       3.3.6:
             Support (accelerated where the chip supports it) for the
@@ -579,7 +588,7 @@ architectures known to work on (e.g., Alpha, PPC), etc.
             CyberBlade/DSTN/i7, CyberBlade/i1, and CyberBlade/i7 is provided
             by the XF86_SVGA server with the tvga8900 driver.
 
-      4.2.0:
+      4.3.0:
             Support (accelerated where the chip supports it) for the
             TVGA8900B, TVGA8900C, TVGA8900CL, TVGA9000, TVGA9000i, TVGA9100B,
             TVGA9200CXr, TVGA8900D, TGUI9440AGi, TGUI9660, TGUI9680, ProVidia
@@ -593,9 +602,7 @@ architectures known to work on (e.g., Alpha, PPC), etc.
 
       Summary:
             The following (older) chipsets are supported in 3.3.6 and not in
-            4.2.0: TVGA8200LX, TVGA8800CS, TVGA8900B, TVGA8900C, TVGA8900CL,
-            TVGA9000, TVGA9000i, TVGA9100B, TVGA9200CXr, TGUI9400CXi,
-            TGUI9420, and TGUI9430DGi.
+            4.3.0: TVGA8200LX, TVGA8800CS, TGUI9420, TGUI9430DGi.
 
             The TVGA8900B, TVGA8900C, TVGA8900CL, TVGA9000, TVGA9000i,
             TVGA9100B, TVGA9200CXr, TGUI9400CXi, TGUI9440AGi, TGUI9660,
@@ -603,12 +610,12 @@ architectures known to work on (e.g., Alpha, PPC), etc.
             Blade3D, Cyber9320, Cyber9382, Cyber9385, Cyber9388, Cyber9397,
             Cyber9397/DVD, CyberBlade/DSTN/i1, CyberBlade/DSTN/i7,
             CyberBlade/i1 and CyberBlade/i7 are supported in both 3.3.6 and
-            4.2.0.
+            4.3.0.
 
             The CyberBlade/Ai1, CyberBlade/DSTN/Ai1, CyberBlade/e4,
-            CyberBladeXP, and BladeXP are supported only in 4.2.0.
+            CyberBladeXP, and BladeXP are supported only in 4.3.0.
 
-34.  Tseng Labs
+35.  Tseng Labs
 
       3.3.6:
             Support for the ET3000 is provided by the XF86_SVGA server with
@@ -618,16 +625,16 @@ architectures known to work on (e.g., Alpha, PPC), etc.
             driver.  Support (accelerated) for the ET4000/W32 series and the
             ET6000 is also provided by the deprecated XF86_W32 server.
 
-      4.2.0:
+      4.3.0:
             Support for the ET4000AX, and accelerated support for the
             ET4000/W32, ET4000/W32i, ET4000/W32p, ET6000 and ET6100 is pro-
             vided by the "tseng" driver.
 
       Summary:
-            All cards supported by 3.3.6 are also supported by 4.2.0 except
+            All cards supported by 3.3.6 are also supported by 4.3.0 except
             for the old ET3000.
 
-35.  Video 7
+36.  Video 7
 
       3.3.6:
             Support for the Video 7 chipset is provided by the XF86_SVGA
@@ -635,28 +642,28 @@ architectures known to work on (e.g., Alpha, PPC), etc.
             unknown because we don't have any recent test reports, and this
             driver has no maintainer.
 
-      4.2.0:
+      4.3.0:
             No Video 7 chips are supported, because the old driver has not
             been ported.
 
       Summary:
-            No Video 7 chips are supported in 4.2.0.
+            No Video 7 chips are supported in 4.3.0.
 
-36.  Weitek
+37.  Weitek
 
       3.3.6:
             Support (accelerated) for the P9000 is provided by the XF86_P9000
             server and accelerated support for the P9100 is provided by the
             XF86_SVGA server with the p9x00 driver.
 
-      4.2.0:
+      4.3.0:
             No Weitek chips are supported, because the old drivers have not
             been ported.
 
       Summary:
-            No Weitek chips are supported in 4.2.0.
+            No Weitek chips are supported in 4.3.0.
 
-     Generated from XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/Status.sgml,v 1.37 2002/01/16 20:38:45 dawes Exp $
+     Generated from XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/Status.sgml,v 1.43 2003/02/25 16:32:41 dawes Exp $
 
 
-$XFree86: xc/programs/Xserver/hw/xfree86/doc/Status,v 1.29 2002/01/16 20:51:04 dawes Exp $
+$XFree86: xc/programs/Xserver/hw/xfree86/doc/Status,v 1.40 2003/02/25 21:32:35 dawes Exp $
diff --git a/xc/programs/Xserver/hw/xfree86/doc/Versions b/xc/programs/Xserver/hw/xfree86/doc/Versions
index 382183cf4..f1491b2fd 100644
--- a/xc/programs/Xserver/hw/xfree86/doc/Versions
+++ b/xc/programs/Xserver/hw/xfree86/doc/Versions
@@ -2,7 +2,7 @@
 
                           The XFree86 Project, Inc
 
-                               16 January 2002
+                              23 February 2003
 
                                   Abstract
 
@@ -16,9 +16,9 @@ As of the release of version 4.0.2 in December 2000, XFree86 has three
 release branches.  First is trunk of the CVS repository.  This is the main
 development stream, where all new work and work for future releases is done.
 
-Second is the stable bugfix branch for the latest full release (4.2.0).  It
+Second is the stable bugfix branch for the latest full release (4.3.0).  It
 is created around the time of the release.  The branch for this one is called
-"xf-4_2-branch".  Fixes for bugs found in the release will be added to this
+"xf-4_3-branch".  Fixes for bugs found in the release will be added to this
 branch (as well as the trunk), and updates to this release (if any) will be
 cut from this branch.  Similar stable branches are present for previous full
 releases.
@@ -28,21 +28,21 @@ While this branch is not actively being maintained, it does include some
 important post-3.3.6 bug fixes and security updates.  Relevant security
 updates in particular are usually back-ported to this branch.
 
-XFree86 is planning to make full releases from the main development stream
-approximately every six months, in late May and November of each year.  The
-feature freezes for these releases will be 1 April and 1 October respec-
-tively.  These are target dates, not a binding commitment.  How effectively
-these dates can be met will depend to a large degree on the resource avail-
-able to XFree86.  Full releases consist of full source code tarballs, plus
-full binary distributions for a range of supported platforms.  Update/bugfix
-releases will be made on an as-required basis, depending also on the avail-
-ability of resources.  Update/bugfix releases will not be full releases, and
-will consist of source code patches, plus binary updates to be layered on top
-of the previous full release.
-
-The next full release will be version 4.3.0, tentatively scheduled for late
-May 2002.  There is no scheduled update release.  If there is one, the ver-
-sion will be 4.2.1.
+XFree86 is planning to make full releases from the main development stream at
+regular intervals in the 6-12 month range.  The feature freezes for these
+releases will usually be 2-3 months before the release dates.  This general
+plan is a goal, not a binding commitment.  The actual release intervals and
+dates will depend to a large degree on the resource available to XFree86.
+Full releases consist of full source code tarballs, plus full binary distri-
+butions for a range of supported platforms.  Update/bugfix releases will be
+made on an as-required basis, depending also on the availability of
+resources, and will generally be limited to serious bug and security fixes.
+New features will not usually be added in update releases.  Update/bugfix
+releases will not be full releases, and will consist of source code patches,
+plus binary updates to be layered on top of the previous full release.
+
+The next full release will be version 4.4.0.  There is no scheduled update
+release, but if one is needed, the version will be 4.3.1.
 
 Aside from actual releases, snapshots of the active release branches are
 tagged in the CVS repository from time to time.  Each such snapshot has an
@@ -338,7 +338,7 @@ VendorRelease information can be interpreted.
              }
          }
 
-     Generated from XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/Versions.sgml,v 1.2 2002/01/16 20:38:45 dawes Exp $
+     Generated from XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/Versions.sgml,v 1.4 2003/02/24 03:41:23 dawes Exp $
 
 
-$XFree86: xc/programs/Xserver/hw/xfree86/doc/Versions,v 1.3 2002/01/16 20:51:04 dawes Exp $
+$XFree86: xc/programs/Xserver/hw/xfree86/doc/Versions,v 1.7 2003/02/24 04:03:25 dawes Exp $
diff --git a/xc/programs/Xserver/hw/xfree86/doc/man/Imakefile b/xc/programs/Xserver/hw/xfree86/doc/man/Imakefile
index 74b2ab03e..614c73249 100644
--- a/xc/programs/Xserver/hw/xfree86/doc/man/Imakefile
+++ b/xc/programs/Xserver/hw/xfree86/doc/man/Imakefile
@@ -1,4 +1,4 @@
-XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/doc/man/Imakefile,v 3.7 2002/10/12 16:06:43 herrb Exp $
+XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/doc/man/Imakefile,v 3.8 2002/12/22 00:46:53 dawes Exp $
 
 MANDIR = $(LIBMANDIR)
 MANSUFFIX = $(LIBMANSUFFIX)
@@ -25,5 +25,5 @@ InstallManPageAliases(XF86Misc,$(MANDIR),XF86MiscQueryExtension XF86MiscQueryVer
 
 InstallManPageLong(XF86VM,$(MANDIR),XF86VidMode)
 #if ExpandManNames
-InstallManPageAliases(XF86VidMode,$(MANDIR),XF86VidModeQueryExtension XF86VidModeQueryVersion XF86VidModeGetModeLine XF86VidModeGetAllModeLines XF86VidModeDeleteModeLine XF86VidModeModModeLine XF86VidModeSwitchMode XF86VidModeSwitchToMode XF86VidModeLockModeSwitch XF86VidModeGetMonitor XF86VidModeGetViewPort XF86VidModeSetViewPort XF86VidModeValidateModeLine XF86VidModeSetClientVersion XF86VidModeGetDotClocks XF86VidModeGetGamma XF86VidModeSetGamma XF86VidModeSetGammaRamp XF86VidModeGetGammaRamp XF86VidModeGetGammaRampSize)
+InstallManPageAliases(XF86VidMode,$(MANDIR),XF86VidModeQueryExtension XF86VidModeQueryVersion XF86VidModeGetModeLine XF86VidModeGetAllModeLines XF86VidModeDeleteModeLine XF86VidModeModModeLine XF86VidModeSwitchMode XF86VidModeSwitchToMode XF86VidModeLockModeSwitch XF86VidModeGetMonitor XF86VidModeGetViewPort XF86VidModeSetViewPort XF86VidModeValidateModeLine XF86VidModeSetClientVersion XF86VidModeGetDotClocks XF86VidModeGetGamma XF86VidModeSetGamma XF86VidModeSetGammaRamp XF86VidModeGetGammaRamp XF86VidModeGetGammaRampSize XF86VidModeGetPermissions)
 #endif
diff --git a/xc/programs/Xserver/hw/xfree86/doc/man/XF86DGA.man b/xc/programs/Xserver/hw/xfree86/doc/man/XF86DGA.man
index b4c98f739..e8b1a7b33 100644
--- a/xc/programs/Xserver/hw/xfree86/doc/man/XF86DGA.man
+++ b/xc/programs/Xserver/hw/xfree86/doc/man/XF86DGA.man
@@ -1,5 +1,5 @@
 .\" Copyright (c) 1996  The XFree86 Project
-.\" $XFree86: xc/programs/Xserver/hw/xfree86/doc/man/XF86DGA.man,v 3.8 2001/02/07 22:35:22 tsi Exp $
+.\" $XFree86: xc/programs/Xserver/hw/xfree86/doc/man/XF86DGA.man,v 3.9 2002/12/22 00:46:53 dawes Exp $
 .\" $TOG: XF86DGA.man /main/9 1997/11/11 12:08:52 kaleb $
 .\" 
 .de ZN
@@ -195,7 +195,7 @@ The function
 returns the lowest numbered error and event values
 assigned to the extension.
 .SH SEE ALSO
-XFree86(1), XF86Config(4/5)
+XFree86(1), XF86Config(__filemansuffix__)
 .SH AUTHORS
 Jon Tombs, Harm Hanemaayer, Mark Vojkovich.
 
diff --git a/xc/programs/Xserver/hw/xfree86/doc/man/XF86Misc.man b/xc/programs/Xserver/hw/xfree86/doc/man/XF86Misc.man
index b225dc8ef..f9f9891ca 100644
--- a/xc/programs/Xserver/hw/xfree86/doc/man/XF86Misc.man
+++ b/xc/programs/Xserver/hw/xfree86/doc/man/XF86Misc.man
@@ -4,7 +4,7 @@
 .\"
 .\" Copyright (c) 1996  Joe Moss, The XFree86 Project
 .\" 
-.\" $XFree86: xc/programs/Xserver/hw/xfree86/doc/man/XF86Misc.man,v 3.11 2001/02/07 22:35:22 tsi Exp $
+.\" $XFree86: xc/programs/Xserver/hw/xfree86/doc/man/XF86Misc.man,v 3.12 2002/12/22 00:46:54 dawes Exp $
 .de ZN
 .ie t \fB\^\\$1\^\fR\\$2
 .el \fI\^\\$1\^\fP\\$2
@@ -210,7 +210,7 @@ Keyboard types
 .IP \fBMF_\fP* 1i
 Mouse flags
 .SH "SEE ALSO"
-xset(1)
+xset(1), XF86Config(__filemansuffix__)
 .SH AUTHORS
 Joe Moss and David Dawes, The XFree86 Project, Inc.
 
diff --git a/xc/programs/Xserver/hw/xfree86/doc/man/XF86VM.man b/xc/programs/Xserver/hw/xfree86/doc/man/XF86VM.man
index cccca39f4..c7d83f242 100644
--- a/xc/programs/Xserver/hw/xfree86/doc/man/XF86VM.man
+++ b/xc/programs/Xserver/hw/xfree86/doc/man/XF86VM.man
@@ -4,7 +4,7 @@
 .\"
 .\"
 .\" Copyright (c) 1996  Joe Moss, The XFree86 Project
-.\" $XFree86: xc/programs/Xserver/hw/xfree86/doc/man/XF86VM.man,v 3.11 2002/10/12 16:06:43 herrb Exp $
+.\" $XFree86: xc/programs/Xserver/hw/xfree86/doc/man/XF86VM.man,v 3.12 2002/12/22 00:46:54 dawes Exp $
 .\" 
 .de ZN
 .ie t \fB\^\\$1\^\fR\\$2
@@ -12,7 +12,7 @@
 ..
 .TH XF86VIDMODE 3X11 __vendorversion__ "X FUNCTIONS"
 .SH NAME
-XF86VidModeQueryExtension, XF86VidModeQueryVersion, XF86VidModeSetClientVersion, XF86VidModeGetModeLine, XF86VidModeGetAllModeLines, XF86VidModeDeleteModeLine, XF86VidModeModModeLine, XF86VidModeValidateModeLine, XF86VidModeSwitchMode, XF86VidModeSwitchToMode, XF86VidModeLockModeSwitch, XF86VidModeGetMonitor, XF86VidModeGetViewPort, XF86VidModeSetViewPort, XF86VidModeGetDotClocks, XF86VidModeGetGamma, XF86VidModeSetGamma, XF86VidModeGetGammaRamp, XF86VidModeSetGammaRamp, XF86VidModeGetGammaRampSize \- XFree86-VidMode extension interface functions
+XF86VidModeQueryExtension, XF86VidModeQueryVersion, XF86VidModeSetClientVersion, XF86VidModeGetModeLine, XF86VidModeGetAllModeLines, XF86VidModeDeleteModeLine, XF86VidModeModModeLine, XF86VidModeValidateModeLine, XF86VidModeSwitchMode, XF86VidModeSwitchToMode, XF86VidModeLockModeSwitch, XF86VidModeGetMonitor, XF86VidModeGetViewPort, XF86VidModeSetViewPort, XF86VidModeGetDotClocks, XF86VidModeGetGamma, XF86VidModeSetGamma, XF86VidModeGetGammaRamp, XF86VidModeSetGammaRamp, XF86VidModeGetGammaRampSize, XF86VidModeGetPermissions \- XFree86-VidMode extension interface functions
 .SH SYNTAX
 .nf
 .LP
@@ -404,10 +404,12 @@ XF86VidModeGetGamma,
 XF86VidModeSetGamma,
 XF86VidModeSetGammaRamp,
 XF86VidModeGetGammaRamp,
+XF86VidModeGetGammaRampSize,
 and
-XF86VidModeGetGammaRampSize
-functions need to be documented.
+XF86VidModeGetPermissions
+functions need to be documented.  In the meantime, check the source
+code for information about how to use them.
 .SH SEE ALSO
-XFree86(1), XF86Config(4/5), xvidtune(1)
+XFree86(1), XF86Config(__filemansuffix__), xvidtune(1)
 .SH AUTHORS
 Kaleb Keithley, Jon Tombs, David Dawes, and Joe Moss
diff --git a/xc/programs/Xserver/hw/xfree86/doc/sgml/BUILD.sgml b/xc/programs/Xserver/hw/xfree86/doc/sgml/BUILD.sgml
index fe47754b5..f2f3bfa1e 100644
--- a/xc/programs/Xserver/hw/xfree86/doc/sgml/BUILD.sgml
+++ b/xc/programs/Xserver/hw/xfree86/doc/sgml/BUILD.sgml
@@ -5,7 +5,11 @@
 <article>
 <title>Building XFree86 from a Source Distribution
 <author>David Dawes, Matthieu Herrb
-<Date>27 May 2001
+<Date>26 February 2003
+
+<ident>
+$XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/BUILD.sgml,v 3.11 2003/02/27 01:17:36 dawes Exp $
+</ident>
 
 <abstract>
 This document describes how to build XFree86 from the <bf>source</bf>
@@ -27,35 +31,53 @@ We highly recommend using gcc to build XFree86, but it generally also
 builds with the native compiler for each platform; 
 
 <sect>How to get the XFree86 &relvers; source
-
 <p>
-There are a few starting points for getting the XFree86 source.  One option
-is to start directly with the XFree86 &fullrelvers; source
-distribution<![ %updaterel; [ and updating it to &relvers; with a source
-patch]]>.  In this
-case, the procedure is as follows:
+
+The recommended way of getting the XFree86 &relvers; source is to
+get it directly from the XFree86 CVS repository.  There are several
+ways of doing that, and they are described at our <url name="CVS web page"
+url="http://www.xfree86.org/cvs/">  The CVS tag for this release is
+"<tt>&reltag;</tt>", and the tag for the maintenance branch for this
+release is "<tt>&relbranchtag;</tt>".
+
+<![ %notsnapshot; [
+Another method of getting the XFree86 &relvers; source is to
+either download the &fullrelvers; source tarballs from the XFree86 ftp
+site<![ %updaterel; [ and the source patch that updates &fullrelvers; to
+&relvers]]>.  The procedure for this is as follows:
 <itemize>
-  <item>The XFree86 source is contained in files
-	<tt>X&fullsrcvers;src-1.tgz</tt>, <tt>X&fullsrcvers;src-2.tgz</tt>
-	and <tt>X&fullsrcvers;src-3.tgz</tt>.  These can be found at
+  <item>The XFree86 &fullrelvers; source is contained in the files
+	<tt>X&fullsrcvers;src-1.tgz</tt>, <tt>X&fullsrcvers;src-2.tgz</tt>,
+	<tt>X&fullsrcvers;src-3.tgz</tt>, <tt>X&fullsrcvers;src-4.tgz</tt>,
+	<tt>X&fullsrcvers;src-5.tgz</tt>, <tt>X&fullsrcvers;src-6.tgz</tt>
+	and <tt>X&fullsrcvers;src-7.tgz</tt>.  These can be found at
 	<htmlurl
 	name="ftp://ftp.xfree86.org/pub/XFree86/&fullrelvers;/source/"
 	url="ftp://ftp.xfree86.org/pub/XFree86/&fullrelvers;/source/">
 	and similar locations on XFree86 mirror sites.
-	<tt>X&fullsrcvers;src-2.tgz</tt> contains the fonts and
-	documentation source.  <tt>X&fullsrcvers;src-3.tgz</tt> contains
-	the hardcopy documentation.  <tt>X&fullsrcvers;src-1.tgz</tt>
-	contains everything else.  If you don't need the docs or fonts
-	you can get by with only <tt>X&fullsrcvers;src-1.tgz</tt>.
+	<tt>X&fullsrcvers;src-4.tgz</tt> and
+	<tt>X&fullsrcvers;src-5.tgz</tt> contains the fonts.
+	<tt>X&fullsrcvers;src-6.tgz</tt> contains the documentation
+	source.  <tt>X&fullsrcvers;src-7.tgz</tt> contains the hardcopy
+	documentation.  <tt>X&fullsrcvers;src-1.tgz</tt>,
+	<tt>X&fullsrcvers;src-2.tgz</tt> and
+	<tt>X&fullsrcvers;src-3.tgz</tt> contains everything else.  If
+	you don't need the docs or fonts you can get by with only
+	<tt>X&fullsrcvers;src-1.tgz</tt>, <tt>X&fullsrcvers;src-2.tgz</tt>
+	and <tt>X&fullsrcvers;src-3.tgz</tt>.
 
   <item>Extract each of these files by running the following from a directory
 	on a filesystem containing enough space (the full source requires
-	around 270MB, and a similar amount is required in addition to this
+	around 305MB, and a similar amount is required in addition to this
 	for the compiled binaries):
 	<quote><tt>
 	gzip -d &lt; X&fullsrcvers;src-1.tgz | tar vxf -<newline>
 	gzip -d &lt; X&fullsrcvers;src-2.tgz | tar vxf -<newline>
 	gzip -d &lt; X&fullsrcvers;src-3.tgz | tar vxf -<newline>
+	gzip -d &lt; X&fullsrcvers;src-4.tgz | tar vxf -<newline>
+	gzip -d &lt; X&fullsrcvers;src-5.tgz | tar vxf -<newline>
+	gzip -d &lt; X&fullsrcvers;src-6.tgz | tar vxf -<newline>
+	gzip -d &lt; X&fullsrcvers;src-7.tgz | tar vxf -<newline>
 	</tt></quote>
 
 <![ %updaterel; [
@@ -71,34 +93,64 @@ case, the procedure is as follows:
 	gzip -d &lt; &fullrelvers;-&relvers;.diff.gz | patch -s -p0 -E 
 	</tt>
 	</quote>
-	Look for special patching instructions in the <htmlurl name="Release
-	Notes" url="http://www.xfree86.org/&relvers;/RELNOTES.html">.
+	Look for special patching instructions in the "How to get XFree86"
+	section of the <htmlurl name="README" url="README.html"> for
+	this release.
 ]]>
 </itemize>
 
-Another option is to get the source by anonymous CVS or CVSup. 
-See <htmlurl name="http://www.xfree86.org/cvs/"
-url="http://www.xfree86.org/cvs/"> for details on the different
-procedure available. 
+<![ %fullrel; [
+Alternatively, if you already have a pristine copy of the XFree86
+&prevfullrelvers; source, you can download patches from
+<htmlurl name="ftp://ftp.xfree86.org/pub/XFree86/&relvers;/patches/"
+url="ftp://ftp.xfree86.org/pub/XFree86/&relvers;/patches/"> that will allow
+you to convert it to &relvers;.  Information about which patch files to
+download and how to apply them can be found in the "How to get XFree86"
+section of the <htmlurl name="README" url="README.html"> for this release.
+]]>
 
 All methods will produce one main source directory called <tt>xc</tt>. 
+]]>
+
+<![ %snapshot; [
+<p>
+The source for the XFree86 &relvers; snapshot is available from the XFree86
+CVS repository.  See See <htmlurl name="http://www.xfree86.org/cvs/"
+url="http://www.xfree86.org/cvs/"> for details.  The tag for this snapshot
+is "&reltag;".  To get the current development version, don't specify any
+tag.
+]]>
+
 
 <sect>Configuring the source before building
 <p>
-It is recommended that you start the configuration process by going to the
-<tt>xc/config/cf</tt> directory, and copying the file <tt>xf86site.def</tt>
-to <tt>host.def</tt>.  Then read through the <tt>host.def</tt> file
-(which is heavily commented), and set any parameters that you want for
-your configuration.  You can usually find out what the default settings
-are by checking the <tt>.cf</tt> file(s) relevant to your OS.
-
-Unlike previous versions, imake can now automatically detect and set
-the various <bf>OS*Version</bf> parameters, so you shouldn't need to
-enter those settings explicitly.
-
-If you are using just the <tt>X&srcvers;src-1.tgz</tt> part of the
-source dist, you will need to define <bf>BuildFonts</bf> to
+In most cases it shouldn't be necessary to configure anything before building.
+
+If you do want to make configuration changes, it is recommended that
+you start by going to the <tt>xc/config/cf</tt> directory, and copying
+the file <tt>xf86site.def</tt> to <tt>host.def</tt>.  Then read through
+the <tt>host.def</tt> file (which is heavily commented), and set any
+parameters that you want for your configuration.  You can usually find
+out what the default settings are by checking the <tt>.cf</tt> file(s)
+relevant to your OS.
+
+A general rule to follow is to only change things that you understand
+and have a good reason to change.  It is easy to create build problems
+by changing the default configuration.  Many of the configuration
+parameters are documented in <tt>xc/config/cf/README</tt>.
+
+<!--
+There's also
+a section <ref name="below" id="config_params"> with information about
+some configuration settings.
+-->
+
+<![ %notsnapshot; [
+If you are using just the <tt>X&srcvers;src-1.tgz</tt>,
+<tt>X&srcvers;src-2.tgz</tt> and <tt>X&srcvers;src-3.tgz</tt> parts of
+the source dist, you will need to define <bf>BuildFonts</bf> to
 <bf>NO</bf>.
+]]>
 
 <sect>Using a shadow directory of symbolic links for the build
 <p>
@@ -110,10 +162,11 @@ unmodified during the build, which has the following benefits:
 date, the update process is not disturbed by foreign files not under
 the control of CVS. 
 <item>It is possible to build XFree86 for several different Operating
-System or architectures from the same sources, shared by NFS.
+System or architectures from the same sources, shared by read-only NFS
+mounts.
 <item>It is possible to build XFree86 with different configuration
-options, just by putting a real copy<tt>host.def</tt> in each build
-tree and by customizing it separately in each build tree.
+options, just by putting a real copy of the <tt>host.def</tt> file in
+each build tree and by customizing it separately in each build tree.
 </itemize>
 <p>
 To make a shadow directory of symbolic links, use the following steps:
@@ -125,15 +178,16 @@ not mandatory.
 cd <em>the directory containing the </em>xc<em>directory</em><newline>
 mkdir build
 </tt></quote>
-<item>use the <tt>lndir</tt>command to make the shadow tree:
+<item>use the "<tt>lndir</tt>" command to make the shadow tree:
 <quote><tt>
 lndir ../xc
 </tt></quote>
 Note that you can refer to the <tt>xc</tt> directory with an absolute
 path if needed. 
 <p>
-See the <htmlurl name="lndir(1) manual page"
-url="http://www.xfree86.org/&relvers;/lndir.1.html"> for details. 
+See the <htmlurl name="lndir(1)"
+url="http://www.xfree86.org/&relvers;/lndir.1.html"> manual page for
+details.
 </itemize>
 If <tt>lndir</tt> is not already installed on your system, you can
 build it manually from the XFree86 sources by running the following
@@ -144,6 +198,15 @@ make -f Makefile.ini lndir<newline>
 cp lndir <em>some directory in your PATH</em>
 </tt></quote>
 
+From time to time there may be some stale links in the build tree, for
+example, when files in the source tree are removed or renamed.  These can
+be cleaned up by running the "<tt>cleanlinks</tt>" script from the build
+directory (see the <htmlurl name="cleanlinks(1)" url="cleanlinks.1.html">
+manual page).  Rarely there will be changes that will require the build
+tree to be re-created from scratch.  A symptom of this can be mysterious
+build problems.  The best solution for this is to remove the build tree,
+and then re-create it using the steps outlined above.
+
 <sect>Building and installing the distribution
 <p>
 Before building the distribution, read through the OS-specific <tt/README/
@@ -151,7 +214,7 @@ file in <tt>xc/programs/Xserver/hw/xfree86/doc</tt> that is relevant to
 you.  Once those OS-specific details have been taken care of, go your
 build directory 
 (either the <tt/xc/ directory or the shadow tree created before) and
-run ``<tt/make World/'' with the <bf/BOOTSTRAPCFLAGS/ 
+run "<tt/make World/" with the <bf/BOOTSTRAPCFLAGS/ 
 set as described in the OS-specific README (if necessary, but most
 systems supported by XFree86 don't need <bf/BOOTSTRAPCFLAGS/).  It is
 advisable to redirect stdout and stderr to <tt/World.Log/ so that you
@@ -172,15 +235,34 @@ tail -f World.log
 </tt></quote> in a terminal. 
 
 <p>
-When the build is finished, you should check <tt/World.Log/ to see
-if there were any problems.  If there weren't any then you can install
-the binaries.  
-To do
-the install, run ``<tt/make
-install/'' and ``<tt/make install.man/''.  Make sure you have enough
-space in <tt>/usr/X11R6</tt> for the install to succeed.  If you want
-to install on a filesystem other than <tt>/usr</tt>, make a symbolic
-link to <tt>/usr/X11R6</tt> before installing.
+When the build is finished, you should check the <tt/World.Log/ file to
+see if there were any problems.  If there weren't any then you can
+install the binaries.  By default the "make World" process will ignore
+errors and build as much as possible.  If there were problems and they
+are not corrected at this stage, the installation process will fail.
+To restart the build process after correcting the problems, just
+run 'make'.  If Imakefiles or part of the build configuration was
+changed as part of correcting the problem, either re-run "make World",
+or run "make Everything".
+
+If you would prefer "make World" to exit at the first error, run it in the
+following way instead of the way described above:
+
+for Bourne-like shells:
+<quote><tt>
+make WORLDOPTS= World &gt; World.log 2&gt;&amp;1
+</tt></quote>
+for C-shell variants:
+<quote><tt>
+make WORLDOPTS= World &gt;&amp; World.log
+</tt></quote>
+
+To do the install, run "<tt/make install/" and "<tt/make install.man/".
+Make sure you have enough space in <tt>/usr/X11R6</tt> for the install
+to succeed.  If you want to install on a filesystem other than
+<tt>/usr</tt>, make a symbolic link to <tt>/usr/X11R6</tt> before
+installing.
+
 
 <sect>Reconfiguring the server (source distribution)
 <p>
@@ -199,7 +281,7 @@ wish to build.  Also, change the driver lists to suit your needs.
 <tscreen><verb>
 	make Makefile
 	make Makefiles
-        make includes
+	make includes
 	make depend
 	make
 </verb></tscreen>
@@ -210,7 +292,7 @@ wish to build.  Also, change the driver lists to suit your needs.
 <tt>Makefile</tt>of XFree86: 
 <itemize>
 <item><bf/Everything/ after a <tt>make World</tt>, <tt>make
-Everything</tt>does everything a <tt>make World</tt> does, except the
+Everything</tt> does everything a <tt>make World</tt> does, except the
 cleaning of the tree. It is a way to quickly rebuild the tree after a
 source patch, but it is not 100% bullet proof. There are cases were it
 is better to force a full build by using <tt>make World</tt>. 
@@ -245,12 +327,15 @@ produced by <tt>make includes</tt>.
 <item><bf/VerifyOS/ displays the detected operating system version. If
 the numbers shown do not match your system, you probably need to set
 them manually in <tt>host.def</tt> and report the problem to
-XFree86@XFree86.org. 
+<email>XFree86@XFree86.org</email>.
 </itemize>
 
-<verb>
-$XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/BUILD.sgml,v 3.7 2002/09/04 03:31:10 dawes Exp $
-</verb>
+<!--
+<sect>Various Configuration settings<label id="config_params">
+<p>
+
+Fill in this section.
+-->
 
 </article>
 
diff --git a/xc/programs/Xserver/hw/xfree86/doc/sgml/DESIGN.sgml b/xc/programs/Xserver/hw/xfree86/doc/sgml/DESIGN.sgml
index 3310d3437..322ab00e0 100644
--- a/xc/programs/Xserver/hw/xfree86/doc/sgml/DESIGN.sgml
+++ b/xc/programs/Xserver/hw/xfree86/doc/sgml/DESIGN.sgml
@@ -27,7 +27,7 @@
 
 <title>XFree86 X server ``New Design'' (DRAFT)
 <author>The XFree86 Project, Inc
-<date>Last modified 18 May 2002
+<date>Last modified 2003 January 22
 
 
 
@@ -36,7 +36,7 @@
 
 
 <ident>
-$XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/DESIGN.sgml,v 1.49 2002/05/18 20:52:22 herrb Exp $
+$XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/DESIGN.sgml,v 1.52 2003/02/25 19:31:00 dawes Exp $
 </ident>
 
 
@@ -369,31 +369,31 @@ mechanism for this.
     cards.  Currently HOST-PCI bridges are not yet handled by RAC as they
     require specific drivers.
 
-<sect2>Entity 
+<sect2>Entity
 <p>
 
     The smallest independently addressable unit on a system bus is
     referred to as an entity.  So far we know ISA and PCI entities.  PCI
     entities can be located on the PCI bus by an unique ID consisting of
     the bus, card and function number.
-    
+
 <sect2>Resource
 <p>
-    
+
     ``Resource'' refers to a range of memory or I/O addresses an entity
     can decode.
-    
+
     If a device is capable of disabling this decoding the resource is
     called sharable.  For PCI devices a generic method is provided to
     control resource decoding.  Other devices will have to provide a
     device specific function to control decoding.
-    
+
     If the entity is capable of decoding this range at a different
     location this resource is considered relocatable.
 
     Resources which start at a specific address and occupy a single
     continuous range are called block resources.
-    
+
     Alternatively resource addresses can be decoded in a way that they
     satisfy the conditions:
     <quote><verb>
@@ -645,13 +645,13 @@ is what &s.code;InitOutput()&e.code; does:
 
       Allocate a &s.code;ScrnInfoRec&e.code; for each active instance of the
       hardware found, and fill in the basic information, including the
-      other driver entry points.   This is best done with the 
-      &s.code;xf86ConfigIsaEntity()&e.code; helper function for ISA 
-      instances or &s.code;xf86ConfigPciEntity()&e.code; for PCI instances. 
+      other driver entry points.   This is best done with the
+      &s.code;xf86ConfigIsaEntity()&e.code; helper function for ISA
+      instances or &s.code;xf86ConfigPciEntity()&e.code; for PCI instances.
       These functions allocate a &s.code;ScrnInfoRec&e.code; for active
       entities. Optionally &s.code;xf86AllocateScreen()&e.code;
       function may also be used to allocate the &s.code;ScrnInfoRec&e.code;.
-      Any of these functions take care of initialising fields to defined 
+      Any of these functions take care of initialising fields to defined
       ``unused'' values.
 
       Claim the entities for each instance of the hardware found.  This
@@ -851,12 +851,12 @@ is what &s.code;InitOutput()&e.code; does:
 
       Modules may be loaded at any point in this function, and all
       modules that the driver will need must be loaded before the end
-      of this function.  Either the  &s.code;xf86LoadSubModule()&e.code; 
-      or the &s.code;xf86LoadDrvSubModule()&e.code; function should be 
-      used to load modules depending on whether a 
-      &s.code;ScrnInfoRec&e.code; has been set up. A driver may unload 
-      a module within this function if it was only needed temporarily, 
-      and the &s.code;xf86UnloadSubModule()&e.code; function should be used 
+      of this function.  Either the  &s.code;xf86LoadSubModule()&e.code;
+      or the &s.code;xf86LoadDrvSubModule()&e.code; function should be
+      used to load modules depending on whether a
+      &s.code;ScrnInfoRec&e.code; has been set up. A driver may unload
+      a module within this function if it was only needed temporarily,
+      and the &s.code;xf86UnloadSubModule()&e.code; function should be used
       to do that.  Otherwise there is no need to explicitly unload modules
       because the loader takes care of module dependencies and will
       unload submodules automatically if/when the driver module is
@@ -950,7 +950,7 @@ is what &s.code;InitOutput()&e.code; does:
     <quote><p>
       Unloads the module referenced by &s.code;module&e.code;.
       &s.code;module&e.code; should be a pointer returned previously
-      by &s.code;xf86LoadSubModule()&e.code; or 
+      by &s.code;xf86LoadSubModule()&e.code; or
       &s.code;xf86LoadDrvSubModule()&e.code; .
 
     </quote>
@@ -1871,7 +1871,6 @@ XF86Config file to the devices:
     <quote><p>
     &s.code;int xf86MatchPciInstances(const char *driverName, int vendorID,
 		&f.indent;SymTabPtr chipsets, PciChipsets *PCIchipsets,
-		&f.indent;GDevPtr *devList, int numDevs,
                 &f.indent;GDevPtr *devList, int numDevs, DriverPtr drvp,
                 &f.indent;int **foundEntities)&e.code;
     <quote><p>
@@ -2046,26 +2045,26 @@ available at the driver level:
 
 Two helper functions are provided to aid configuring entities:
     <quote><p>
-    &s.code;ScrnInfoPtr xf86ConfigPciEntity(ScrnInfoPtr pScrn, 
-                                 &f.indent;int scrnFlag, int entityIndex, 
-                                 &f.indent;PciChipsets *p_chip, 
-                                 &f.indent;resList res, EntityProc init, 
-                                 &f.indent;EntityProc enter, EntityProc leave, 
+    &s.code;ScrnInfoPtr xf86ConfigPciEntity(ScrnInfoPtr pScrn,
+                                 &f.indent;int scrnFlag, int entityIndex,
+                                 &f.indent;PciChipsets *p_chip,
+                                 &f.indent;resList res, EntityProc init,
+                                 &f.indent;EntityProc enter, EntityProc leave,
                                  &f.indent;pointer private)&e.code;
     <p>
-    &s.code;ScrnInfoPtr xf86ConfigIsaEntity(ScrnInfoPtr pScrn, 
-                                 &f.indent;int scrnFlag, int entityIndex, 
+    &s.code;ScrnInfoPtr xf86ConfigIsaEntity(ScrnInfoPtr pScrn,
+                                 &f.indent;int scrnFlag, int entityIndex,
                                  &f.indent;IsaChipsets *i_chip,
-                                 &f.indent;resList res, EntityProc init, 
-                                 &f.indent;EntityProc enter, EntityProc leave, 
+                                 &f.indent;resList res, EntityProc init,
+                                 &f.indent;EntityProc enter, EntityProc leave,
                                  &f.indent;pointer private)&e.code;
     <quote><p>
       These functions are used to register the non-relocatable resources
       for an entity, and the optional entity-specific &s.code;Init&e.code;, &s.code;Enter&e.code; and
       &s.code;Leave&e.code; functions.  Usually the list of fixed resources is obtained
       from the Isa/PciChipsets lists.  However an additional list of
-      resources may be passed.  Generally this is not required.  
-      For active entities a &s.code;ScrnInfoRec&e.code; is allocated 
+      resources may be passed.  Generally this is not required.
+      For active entities a &s.code;ScrnInfoRec&e.code; is allocated
       if the &s.code;pScrn&e.code; argument is &s.code;NULL&e.code;.
 The
       return value is &s.code;TRUE&e.code; when successful.  The init, enter, leave
@@ -2077,9 +2076,9 @@ The
         </quote>
 
       They are passed the entity index and a pointer to a private scratch
-      area.  This are can be set up during &s.code;Probe()&e.code; and
+      area.  This can be set up during &s.code;Probe()&e.code; and
       its address can be passed to
-      &s.code;xf86ConfigIsaEntity()&e.code;
+      &s.code;xf86ConfigIsaEntity()&e.code; and
       &s.code;xf86ConfigPciEntity()&e.code; as the last argument.
 
     </quote>
@@ -2118,13 +2117,13 @@ available at the driver level:
 <sect2>PreInit Phase
 <p>
 
-During this phase the remaining resource should be registered.
+During this phase the remaining resources should be registered.
 &s.code;PreInit()&e.code; should call &s.code;xf86GetEntityInfo()&e.code;
-To obtain a pointer to an &s.code;EntityInfoRec&e.code; for each entity
+to obtain a pointer to an &s.code;EntityInfoRec&e.code; for each entity
 it is able to drive and check if any resource are listed in its
 &s.code;resources&e.code; field.  If resources registered in the Probe
 phase have been rejected in the post-Probe phase
-(&s.code;resources&nbsp;==&nbsp;NULL&e.code;), then the driver should
+(&s.code;resources&e.code; is non-&s.code;NULL&e.code;), then the driver should
 decide if it can continue without using these or if it should fail.
 
     <quote><p>
@@ -2142,9 +2141,8 @@ Several functions are provided to simplify resource registration:
     &s.code;Bool xf86IsEntityPrimary(int entityIndex)&e.code;
     <quote><p>
       This function returns &s.code;TRUE&e.code; if the entity referenced
-      by &s.code;entityIndex&e.code; is the display device that primary
-      display device (i.e., the one initialised at boot time and used
-      in text mode).
+      by &s.code;entityIndex&e.code; is the primary display device (i.e.,
+      the one initialised at boot time and used in text mode).
 
     </quote>
 
@@ -2193,10 +2191,12 @@ The primary function for registration of resources is:
     &s.code;resPtr xf86ReallocatePciResources(int entityIndex, resPtr pRes)&e.code;
     <quote><p>
       This function takes a list of PCI resources that need to be
-      reallocated and returns a list of the reallocated resource.  This
-      list needs to be passed to &s.code;xf86RegisterResources()&e.code; again to be
-      registered with the broker.  If the reallocation fails, &s.code;NULL&e.code; is
-      returned.
+      reallocated and returns &s.code;NULL&e.code when all relocations are
+      successful.
+      &s.code;xf86RegisterResources()&e.code; should be called again to
+      register the relocated resources with the broker.
+      If the reallocation fails, a list of the resources that could not be
+      relocated is returned.
 
     </quote>
     </quote>
@@ -2216,7 +2216,7 @@ Two functions are provided to obtain a resource range of a given type:
       type &s.code;ResEnd&e.code; will be returned.
 
     </quote>
-    &s.code;resRange xf86GetSparse(long type,  memType fixed_bits,
+    &s.code;resRange xf86GetSparse(long type, memType fixed_bits,
 			&f.indent;memType decode_mask, memType address_mask,
 			&f.indent;resPtr avoid)&e.code;
     <quote><p>
@@ -2248,7 +2248,7 @@ The function &s.code;xf86FixPciResource()&e.code; can be used to do this:
       register that needs to be fixed (&s.code;0-5&e.code;, and
       &s.code;6&e.code; for the BIOS base register).  The size is
       specified by the alignment.  Since PCI resources need to span an
-      integral range of the size &s.code;2^n&e.code; the alignment also
+      integral range of size &s.code;2^n&e.code;, the alignment also
       specifies the number of addresses that will be decoded.  If the
       driver specifies a type mask it can override the default type for
       PCI resources which is &s.code;ResShared&e.code;.  The resource
@@ -2270,13 +2270,15 @@ The function &s.code;xf86FixPciResource()&e.code; can be used to do this:
     </quote>
     </quote>
 
-The driver may replace the generic access control functions for an entity
-by it's own ones.  This is done with the &s.code;xf86SetAccessFuncs()&e.code;:
+The driver may replace the generic access control functions for an entity.
+This is done with the &s.code;xf86SetAccessFuncs()&e.code;:
     <quote><p>
-    &s.code;void xf86SetAccessFuncs(EntityInfoPtr pEnt, 
+    &s.code;void xf86SetAccessFuncs(EntityInfoPtr pEnt,
                         &f.indent;xf86SetAccessFuncPtr funcs,
 			&f.indent;xf86SetAccessFuncPtr oldFuncs)&e.code;
+    <quote><p>
      with:
+    </quote>
 
     <verb>
       typedef struct {
@@ -2295,13 +2297,13 @@ by it's own ones.  This is done with the &s.code;xf86SetAccessFuncs()&e.code;:
       combined access functions are the same it is assumed that I/O can
       not be controlled independently.  If memory and I/O have to be
       controlled together all three values should be the same.  If a
-      non &s.code;NULL&e.code; value is passed as fifth argument it is
+      non &s.code;NULL&e.code; value is passed as third argument it is
       interpreted as an address where to store the old access record.
-      If the fifth argument is &s.code;NULL&e.code; it will be assumed
+      If the third argument is &s.code;NULL&e.code; it will be assumed
       that the generic access should be enabled before replacing the
       access functions.  Otherwise it will be disabled.  The driver may
       enable them itself using the returned values.  It should do this
-      from his replacement access functions as the generic access may
+      from its replacement access functions as the generic access may
       be disabled by the common level on certain occasions.  If replacement
       functions are specified they must control all resources of the
       specific type registered for the entity.
@@ -2309,14 +2311,14 @@ by it's own ones.  This is done with the &s.code;xf86SetAccessFuncs()&e.code;:
     </quote>
     </quote>
 
-To find out if specific resource range is conflicting with another
+To find out if a specific resource range conflicts with another
 resource the &s.code;xf86ChkConflict()&e.code; function may be used:
     <quote><p>
     &s.code;memType xf86ChkConflict(resRange *rgp, int entityIndex)&e.code;
     <quote><p>
       This function checks if the resource range &s.code;rgp&e.code; of
       for the specified entity conflicts with with another resource.
-      If it a conflict is found, the address of the start of the conflict
+      If a conflict is found, the address of the start of the conflict
       is returned.  The return value is zero when there is no conflict.
 
     </quote>
@@ -2503,44 +2505,44 @@ Next, the higher level functions that most drivers would use.
 
       The &s.code;OptionInfoRec&e.code; is defined as follows:
 
-        <verb>
-        typedef struct {
-            double freq;
-            int units;
-        } OptFrequency;
-
-        typedef union {
-            unsigned long       num;
-            char *              str;
-            double              realnum;
-            Bool                bool;
-            OptFrequency        freq;
-        } ValueUnion;
-
-        typedef enum {
-            OPTV_NONE = 0,
-            OPTV_INTEGER,
-            OPTV_STRING,     /* a non-empty string */
-            OPTV_ANYSTR,     /* Any string, including an empty one */
-            OPTV_REAL,
-            OPTV_BOOLEAN,
-            OPTV_FREQ
-        } OptionValueType;
-
-        typedef enum {
-            OPTUNITS_HZ = 1,
-            OPTUNITS_KHZ,
-            OPTUNITS_MHZ
-        } OptFreqUnits;
-
-        typedef struct {
-            int                 token;
-            const char*         name;
-            OptionValueType     type;
-            ValueUnion          value;
-            Bool                found;
-        } OptionInfoRec, *OptionInfoPtr;
-        </verb>
+      <verb>
+      typedef struct {
+          double freq;
+          int units;
+      } OptFrequency;
+
+      typedef union {
+          unsigned long       num;
+          char *              str;
+          double              realnum;
+          Bool                bool;
+          OptFrequency        freq;
+      } ValueUnion;
+
+      typedef enum {
+          OPTV_NONE = 0,
+          OPTV_INTEGER,
+          OPTV_STRING,  /* a non-empty string */
+          OPTV_ANYSTR,  /* Any string, including an empty one */
+          OPTV_REAL,
+          OPTV_BOOLEAN,
+          OPTV_FREQ
+      } OptionValueType;
+
+      typedef enum {
+          OPTUNITS_HZ = 1,
+          OPTUNITS_KHZ,
+          OPTUNITS_MHZ
+      } OptFreqUnits;
+
+      typedef struct {
+          int                 token;
+          const char*         name;
+          OptionValueType     type;
+          ValueUnion          value;
+          Bool                found;
+      } OptionInfoRec, *OptionInfoPtr;
+      </verb>
 
       &s.code;OPTV_FREQ&e.code; can be used for options values that are
       frequencies.  These values are a floating point number with an
@@ -2572,7 +2574,9 @@ Next, the higher level functions that most drivers would use.
 
     </quote>
 
-    &s.code;OptionInfoPtr xf86TokenToOptinfo(const OptionInfoRec *table, int token)&e.code;
+    &s.code;OptionInfoPtr xf86TokenToOptinfo(const OptionInfoRec *table,
+			&f.indent;int token)&e.code;
+
     <quote><p>
       Returns a pointer to the &s.code;OptionInfoRec&e.code; in
       &s.code;table&e.code; with a token field matching
@@ -2712,7 +2716,7 @@ The following include files are typically required by video drivers:
     &s.code;"compiler.h"&e.code;
   </quote>
   Note: in drivers, this must be included after &s.code;"xf86_ansic.h"&e.code;.
-   
+
   Drivers that need to access PCI vendor/device definitions need this:
   <quote>
     &s.code;"xf86PciInfo.h"&e.code;
@@ -2778,7 +2782,7 @@ The following include files are typically required by video drivers:
     &s.code;"xf86fbman.h"&e.code;
   </quote>
   </quote>
- 
+
 Non-driver modules should include &s.code;"xf86_ansic.h"&e.code; to get the correct
 wrapping of ANSI C/libc functions.
 
@@ -2801,7 +2805,7 @@ included implicitly by "xf86_ansic.h".
 Management of offscreen video memory may be handled by the XFree86
 framebuffer manager.  Once the offscreen memory manager is running,
 drivers or extensions may allocate, free or resize areas of offscreen
-video memory using the following functions (definitions taken from 
+video memory using the following functions (definitions taken from
 &s.code;xf86fbman.h&e.code;):
 
 <code>
@@ -2948,7 +2952,7 @@ will remove all removable &s.code;FBArea&e.code; allocations.
 Initialization of the XFree86 framebuffer manager is done via
 
   <quote>
-    &s.code;Bool xf86InitFBManager(ScreenPtr pScreen,  BoxPtr FullBox)&e.code;
+    &s.code;Bool xf86InitFBManager(ScreenPtr pScreen, BoxPtr FullBox)&e.code;
   </quote>
 
 &s.code;FullBox&e.code; represents the area of the framebuffer that the
@@ -3024,9 +3028,9 @@ To use the colormap layer, a driver calls the
 				    reload the colormap automatically
                                     after mode switches.  This is useful
                                     for when the driver is resetting the
-                                    hardware during mode switches and 
+                                    hardware during mode switches and
                                     corrupting or erasing the hardware
-                                    palette.  
+                                    palette.
 
       </quote>
 
@@ -3045,15 +3049,15 @@ To use the colormap layer, a driver calls the
       The colormap layer normally reloads the palette after VT enters so it
       is not necessary for the driver to save and restore the palette
       when switching VTs.  The driver must, however, still save the
-      initial palette during server start up and restore it during 
-      server exit. 
+      initial palette during server start up and restore it during
+      server exit.
 
     </quote>
 
     &s.code;void LoadPalette(ScrnInfoPtr pScrn, int numColors, int *indices,
 		&f.indent;LOCO *colors, VisualPtr pVisual)&e.code;
     <quote><p>
-      &s.code;LoadPalette()&e.code; is a driver-provide function for
+      &s.code;LoadPalette()&e.code; is a driver-provided function for
       loading a colormap into hardware.  &s.code;colors&e.code; is the
       array of RGB values that represent the full colormap.
       &s.code;indices&e.code; is a list of index values into the colors
@@ -3138,29 +3142,29 @@ passing them to DGAInit.
 /** The DGAModeRec **/
 
 typedef struct {
-  int num;             
+  int num;
   DisplayModePtr mode;
-  int flags;          
+  int flags;
   int imageWidth;
   int imageHeight;
   int pixmapWidth;
-  int pixmapHeight;   
-  int bytesPerScanline; 
-  int byteOrder;  
-  int depth;           
+  int pixmapHeight;
+  int bytesPerScanline;
+  int byteOrder;
+  int depth;
   int bitsPerPixel;
   unsigned long red_mask;
   unsigned long green_mask;
   unsigned long blue_mask;
   int viewportWidth;
   int viewportHeight;
-  int xViewportStep;   
+  int xViewportStep;
   int yViewportStep;
-  int maxViewportX; 
+  int maxViewportX;
   int maxViewportY;
-  int viewportFlags;   
-  int offset;     
-  unsigned char *address;      
+  int viewportFlags;
+  int offset;
+  unsigned char *address;
   int reserved1;
   int reserved2;
 } DGAModeRec, *DGAModePtr;
@@ -3198,7 +3202,7 @@ typedef struct {
 
         &s.code;DGA_PIXMAP_AVAILABLE&e.code;
 	    <quote><p>
-	    Indicates that Xlib may be used on the framebuffer.  
+	    Indicates that Xlib may be used on the framebuffer.
             This flag will usually be set unless the driver wishes
             to prohibit this for some reason.
 
@@ -3211,12 +3215,11 @@ typedef struct {
 
 	    </quote>
 	</quote>
-           
 
       &s.code;imageWidth&nl;
       imageHeight&e.code;
 	<quote><p>
-		    These are the dimensions of the linear framebuffer 
+		    These are the dimensions of the linear framebuffer
                      accessible by the client.
 
 	</quote>
@@ -3245,7 +3248,7 @@ typedef struct {
       &s.code;depth&e.code;
 	<quote><p>
 		     The depth of the framebuffer in this mode.
-    
+
 	</quote>
 
       &s.code;bitsPerPixel&e.code;
@@ -3274,15 +3277,15 @@ typedef struct {
       &s.code;xViewportStep&nl;
       yViewportStep&e.code;
 	<quote><p>
-		     The granularity of x and y viewport positions that 
-                     the driver supports in this mode.     
+		     The granularity of x and y viewport positions that
+                     the driver supports in this mode.
 
 	</quote>
 
       &s.code;maxViewportX&nl;
       maxViewportY&e.code;
 	<quote><p>
-		      The maximum viewport position supported by the 
+		      The maximum viewport position supported by the
                        driver in this mode.
 
 	</quote>
@@ -3298,7 +3301,7 @@ typedef struct {
 	    </quote>
        &s.code;DGA_FLIP_RETRACE&e.code;
 	    <quote<p>
-		The driver supports viewport changes at retrace. 
+		The driver supports viewport changes at retrace.
 
 	    </quote>
 	</quote>
@@ -3306,7 +3309,7 @@ typedef struct {
       &s.code;offset&e.code;
 	<quote><p>
 	        The offset into the linear framebuffer that corresponds to
-                pixel (0,0) for this mode.     
+                pixel (0,0) for this mode.
 
 	</quote>
 
@@ -3322,9 +3325,9 @@ typedef struct {
 
 typedef struct {
   Bool (*OpenFramebuffer)(
-       ScrnInfoPtr pScrn, 
+       ScrnInfoPtr pScrn,
        char **name,
-       unsigned char **mem, 
+       unsigned char **mem,
        int *size,
        int *offset,
        int *extra
@@ -3335,20 +3338,20 @@ typedef struct {
   int  (*GetViewport)(ScrnInfoPtr pScrn);
   void (*Sync)(ScrnInfoPtr);
   void (*FillRect)(
-       ScrnInfoPtr pScrn, 
-       int x, int y, int w, int h, 
+       ScrnInfoPtr pScrn,
+       int x, int y, int w, int h,
        unsigned long color
   );
   void (*BlitRect)(
-       ScrnInfoPtr pScrn, 
-       int srcx, int srcy, 
-       int w, int h, 
+       ScrnInfoPtr pScrn,
+       int srcx, int srcy,
+       int w, int h,
        int dstx, int dsty
   );
   void (*BlitTransRect)(
-       ScrnInfoPtr pScrn, 
-       int srcx, int srcy, 
-       int w, int h, 
+       ScrnInfoPtr pScrn,
+       int srcx, int srcy,
+       int w, int h,
        int dstx, int dsty,
        unsigned long color
   );
@@ -3496,11 +3499,10 @@ as described later in this document and passing a list of
 
   <quote>
   &s.code;Bool xf86XVScreenInit(
-	&f.indent;ScreenPtr pScreen,  
+	&f.indent;ScreenPtr pScreen,
 	&f.indent;XF86VideoAdaptorPtr *adaptPtrs,
 	&f.indent;int num)&e.code;
   </quote>
- 
 
 After doing this, the extension will report video adaptors as being
 available, providing the data in their respective
@@ -3516,13 +3518,13 @@ The &s.code;XF86VideoAdaptorRec&e.code;:
 <quote><p>
 <verb>
 typedef struct {
-	unsigned int type; 
+	unsigned int type;
 	int flags;
 	char *name;
 	int nEncodings;
-	XF86VideoEncodingPtr pEncodings;  
+	XF86VideoEncodingPtr pEncodings;
 	int nFormats;
-	XF86VideoFormatPtr pFormats;  
+	XF86VideoFormatPtr pFormats;
 	int nPorts;
 	DevUnion *pPortPrivates;
 	int nAttributes;
@@ -3544,7 +3546,7 @@ typedef struct {
 
    Each adaptor will have its own XF86VideoAdaptorRec.  The fields are
    as follows:
-    
+
      &s.code;type&e.code;
      <quote><p>
 	This can be any of the following flags OR'd together.
@@ -3552,7 +3554,7 @@ typedef struct {
 	&s.code;XvInputMask&e.code;
 	&s.code;XvOutputMask&e.code;
 	<quote><p>
-	    These refer to the target drawable and are similar to a Window's 
+	    These refer to the target drawable and are similar to a Window's
 	    class. &s.code;XvInputMask&e.code; indicates that the adaptor
 	    can put video into a drawable.  &s.code;XvOutputMask&e.code;
 	    indicates that the adaptor can get video from a drawable.
@@ -3596,7 +3598,7 @@ typedef struct {
 	&s.code;VIDEO_INVERT_CLIPLIST&e.code;
 	<quote><p>
 	   This indicates that the video driver requires the clip
-	   list to contain the regions which are obscured rather 
+	   list to contain the regions which are obscured rather
 	   than the regions which are are visible.
 
 	</quote>
@@ -3683,7 +3685,7 @@ typedef struct {
      &s.code;nImages&nl;
      pImages&e.code;
      <quote><p>
-	The number of &s.code;XF86ImageRecs&e.code; supported by the adaptor 
+	The number of &s.code;XF86ImageRecs&e.code; supported by the adaptor
 	and a pointer to the array of &s.code;XF86ImageRecs&e.code;. The
 	&s.code;XF86ImageRec&e.code; is described later on.
 
@@ -3701,8 +3703,8 @@ typedef struct {
 
 	<enum>
 	 <item>&s.code;PutVideo&e.code;, &s.code;PutStill&e.code; and
-	     the image routines &s.code;PutImage&e.code; and 
-	     &s.code;QueryImageAttributes&e.code; are not required when the 
+	     the image routines &s.code;PutImage&e.code; and
+	     &s.code;QueryImageAttributes&e.code; are not required when the
 	     adaptor type does not contain &s.code;XvInputMask&e.code;.
 
 	 <item>&s.code;GetVideo&e.code; and &s.code;GetStill&e.code;
@@ -3725,7 +3727,7 @@ typedef struct {
 
 	With the exception of &s.code;QueryImageAttributes&e.code;, these
 	functions should return &s.code;Success&e.code; if the operation was
-	completed successfully.  They can return &s.code;XvBadAlloc&e.code; 
+	completed successfully.  They can return &s.code;XvBadAlloc&e.code;
 	otherwise. &s.code;QueryImageAttributes&e.code; returns the size
 	of the XvImage queried.
 
@@ -3737,14 +3739,14 @@ typedef struct {
 	by &s.code;drw_x&e.code;, &s.code;drw_y&e.code;,
 	&s.code;drw_w&e.code; and &s.code;drw_h&e.code; in the Get/Put
 	function.  The boxes are in screen coordinates, are guaranteed
-	not to overlap and an empty region will never be passed.  
+	not to overlap and an empty region will never be passed.
 	If the driver has specified &s.code;VIDEO_INVERT_CLIPLIST&e.code;,
 	&s.code;clipBoxes&e.code; will indicate the areas of the primitive
-	which are obscured rather than the areas visible. 
+	which are obscured rather than the areas visible.
 
     </quote>
 
-	&s.code;typedef  int (* PutVideoFuncPtr)( ScrnInfoPtr pScrn, 
+	&s.code;typedef  int (* PutVideoFuncPtr)( ScrnInfoPtr pScrn,
 		&f.indent;short vid_x, short vid_y, short drw_x, short drw_y,
 		&f.indent;short vid_w, short vid_h, short drw_w, short drw_h,
 		&f.indent;RegionPtr clipBoxes, pointer data )&e.code;
@@ -3764,17 +3766,17 @@ typedef struct {
 
     </quote>
 
-	&s.code;typedef  int (* PutStillFuncPtr)( ScrnInfoPtr pScrn, 
+	&s.code;typedef  int (* PutStillFuncPtr)( ScrnInfoPtr pScrn,
 		&f.indent;short vid_x, short vid_y, short drw_x, short drw_y,
 		&f.indent;short vid_w, short vid_h, short drw_w, short drw_h,
 		&f.indent;RegionPtr clipBoxes, pointer data )&e.code;
     <quote><p>
 	  This is same as &s.code;PutVideo&e.code; except that the driver
 	  should place only one frame from the stream on the screen.
-	
+
     </quote>
 
-	&s.code;typedef int (* GetVideoFuncPtr)( ScrnInfoPtr pScrn, 
+	&s.code;typedef int (* GetVideoFuncPtr)( ScrnInfoPtr pScrn,
 		&f.indent;short vid_x, short vid_y, short drw_x, short drw_y,
 		&f.indent;short vid_w, short vid_h, short drw_w, short drw_h,
 		&f.indent;RegionPtr clipBoxes, pointer data )&e.code;
@@ -3786,7 +3788,7 @@ typedef struct {
 
     </quote>
 
-	&s.code;typedef int (* GetStillFuncPtr)( ScrnInfoPtr pScrn, 
+	&s.code;typedef int (* GetStillFuncPtr)( ScrnInfoPtr pScrn,
 		&f.indent;short vid_x, short vid_y, short drw_x, short drw_y,
 		&f.indent;short vid_w, short vid_h, short drw_w, short drw_h,
 		&f.indent;RegionPtr clipBoxes, pointer data )&e.code;
@@ -3797,7 +3799,7 @@ typedef struct {
 
     </quote>
 
-	&s.code;typedef void (* StopVideoFuncPtr)(ScrnInfoPtr pScrn, 
+	&s.code;typedef void (* StopVideoFuncPtr)(ScrnInfoPtr pScrn,
 			&f.indent;pointer data, Bool cleanup)&e.code;
     <quote><p>
 	  This indicates the driver should stop displaying the video.
@@ -3816,14 +3818,14 @@ typedef struct {
 	&s.code;typedef int (* SetPortAttributeFuncPtr)(ScrnInfoPtr pScrn,
 		 &f.indent;Atom attribute,INT32 value, pointer data)&e.code;
 
-	&s.code;typedef int (* GetPortAttributeFuncPtr)(ScrnInfoPtr pScrn, 
+	&s.code;typedef int (* GetPortAttributeFuncPtr)(ScrnInfoPtr pScrn,
 		&f.indent;Atom attribute,INT32 *value, pointer data)&e.code;
 
     <quote><p>
 	  A port may have particular attributes such as hue,
 	  saturation, brightness or contrast.  Xv clients set and
-	  get these attribute values by sending attribute strings 
-	  (Atoms) to the server.  Such requests end up at these 
+	  get these attribute values by sending attribute strings
+	  (Atoms) to the server.  Such requests end up at these
 	  driver functions.  It is recommended that the driver provide
 	  at least the following attributes mentioned in the Xv client
 	  library docs:
@@ -3849,7 +3851,7 @@ typedef struct {
 
 	&s.code;typedef void (* QueryBestSizeFuncPtr)(ScrnInfoPtr pScrn,
 		&f.indent;Bool motion, short vid_w, short vid_h,
-		&f.indent;short drw_w, short drw_h, 
+		&f.indent;short drw_w, short drw_h,
 		&f.indent;unsigned int *p_w, unsigned int *p_h, pointer data)&e.code;
     <quote><p>
 	   &s.code;QueryBestSize&e.code; provides the client with a way
@@ -3864,23 +3866,23 @@ typedef struct {
 
     </quote>
 
-	&s.code;typedef  int (* PutImageFuncPtr)( ScrnInfoPtr pScrn, 
+	&s.code;typedef  int (* PutImageFuncPtr)( ScrnInfoPtr pScrn,
 		&f.indent;short src_x, short src_y, short drw_x, short drw_y,
 		&f.indent;short src_w, short src_h, short drw_w, short drw_h,
 		&f.indent;int image, char *buf, short width, short height,
 		&f.indent;Bool sync, RegionPtr clipBoxes, pointer data )&e.code;
     <quote><p>
 	  This is similar to &s.code;PutStill&e.code; except that the
-	  source of the video is not a port but the data stored in a system 
-	  memory buffer at &s.code;buf&e.code;.  The data is in the format 
-	  indicated by the &s.code;image&e.code; descriptor and represents a 
+	  source of the video is not a port but the data stored in a system
+	  memory buffer at &s.code;buf&e.code;.  The data is in the format
+	  indicated by the &s.code;image&e.code; descriptor and represents a
 	  source of size &s.code;width&e.code; by &s.code;height&e.code;.
 	  If &s.code;sync&e.code; is TRUE the driver should not return
 	  from this function until it is through reading the data
 	  from &s.code;buf&e.code;.  Returning when &s.code;sync&e.code;
 	  is TRUE indicates that it is safe for the data at &s.code;buf&e.code;
 	  to be replaced, freed, or modified.
-	
+
     </quote>
 
 	&s.code;typedef  int (* QueryImageAttributesFuncPtr)( ScrnInfoPtr pScrn,
@@ -3893,17 +3895,17 @@ typedef struct {
 	  the size and corrected width and height are needed.  In that
 	  case &s.code;pitches&e.code; and &s.code;offsets&e.code; are
 	  NULL.  The size of the memory required for the image is returned
-	  by this function.  The &s.code;width&e.code; and 
+	  by this function.  The &s.code;width&e.code; and
 	  &s.code;height&e.code; of the requested image can be altered by
 	  the driver to reflect format limitations (such as component
-	  sampling periods that are larger than one).  If 
+	  sampling periods that are larger than one).  If
 	  &s.code;pitches&e.code; and &s.code;offsets&e.code; are not NULL,
 	  these will be arrays with as many elements in them as there
 	  are planes in the &s.code;image&e.code; format.  The driver
 	  should specify the pitch (in bytes) of each scanline in the
 	  particular plane as well as the offset to that plane (in bytes)
 	  from the beginning of the image.
-	
+
     </quote>
 
     </quote>
@@ -3928,12 +3930,12 @@ typedef struct {
 
 </quote>
 
-The XF86VideoFormatRec:  
+The XF86VideoFormatRec:
 
 <quote><p>
 <verb>
 typedef struct {
-	char  depth;  
+	char  depth;
 	short class;
 } XF86VideoFormatRec, *XF86VideoFormatPtr;
 </verb>
@@ -3961,10 +3963,10 @@ typedef struct {
 </verb>
 
    Each adaptor may have an array of these advertising the attributes
-   for its ports.  Currently defined flags are &s.code;XvGettable&e.code; 
-   and &s.code;XvSettable&e.code; which may be OR'd together indicating that 
-   attribute is ``gettable'' or ``settable'' by the client.  The 
-   &s.code;min&e.code; and &s.code;max&e.code; field specify the valid range 
+   for its ports.  Currently defined flags are &s.code;XvGettable&e.code;
+   and &s.code;XvSettable&e.code; which may be OR'd together indicating that
+   attribute is ``gettable'' or ``settable'' by the client.  The
+   &s.code;min&e.code; and &s.code;max&e.code; field specify the valid range
    for the value.  &s.code;Name&e.code; is a text string describing the
    attribute by name.
 
@@ -3978,21 +3980,21 @@ typedef struct {
 	int id;
 	int type;
 	int byte_order;
-	char guid[16];               
+	char guid[16];
 	int bits_per_pixel;
 	int format;
 	int num_planes;
 
 	/* for RGB formats */
 	int depth;
-	unsigned int red_mask;       
-	unsigned int green_mask;   
-	unsigned int blue_mask;   
+	unsigned int red_mask;
+	unsigned int green_mask;
+	unsigned int blue_mask;
 
 	/* for YUV formats */
 	unsigned int y_sample_bits;
 	unsigned int u_sample_bits;
-	unsigned int v_sample_bits;   
+	unsigned int v_sample_bits;
 	unsigned int horz_y_period;
 	unsigned int horz_u_period;
 	unsigned int horz_v_period;
@@ -4001,7 +4003,7 @@ typedef struct {
 	unsigned int vert_v_period;
 	char component_order[32];
 	int scanline_order;
-} XF86ImageRec, *XF86ImagePtr; 
+} XF86ImageRec, *XF86ImagePtr;
 </verb>
 
    XF86ImageRec describes how video source data is laid out in memory.
@@ -4010,23 +4012,23 @@ typedef struct {
     &s.code;id&e.code;
     <quote><p>
 	This is a unique descriptor for the format.  It is often good to
-        set this value to the FOURCC for the format when applicable. 
+        set this value to the FOURCC for the format when applicable.
     </quote>
 
     &s.code;type&e.code;
     <quote><p>
-	This is &s.code;XvRGB&e.code; or &s.code;XvYUV&e.code;. 
+	This is &s.code;XvRGB&e.code; or &s.code;XvYUV&e.code;.
     </quote>
 
     &s.code;byte_order&e.code;
     <quote><p>
-	This is &s.code;LSBFirst&e.code; or &s.code;MSBFirst&e.code;. 
+	This is &s.code;LSBFirst&e.code; or &s.code;MSBFirst&e.code;.
     </quote>
 
     &s.code;guid&e.code;
     <quote><p>
 	This is the Globally Unique IDentifier for the format.  When
-	not applicable, all characters should be NULL. 
+	not applicable, all characters should be NULL.
     </quote>
 
     &s.code;bits_per_pixel&e.code;
@@ -4038,7 +4040,7 @@ typedef struct {
 
     &s.code;format&e.code;
     <quote><p>
-	This is &s.code;XvPlanar&e.code; or &s.code;XvPacked&e.code;. 
+	This is &s.code;XvPlanar&e.code; or &s.code;XvPacked&e.code;.
     </quote>
 
    &s.code;num_planes&e.code;
@@ -4083,7 +4085,7 @@ typedef struct {
 
    &s.code;component_order&e.code;
     <quote><p>
-	Uppercase ascii characters representing the order that 
+	Uppercase ascii characters representing the order that
 	samples are stored within packed formats.  For planar formats
 	this represents the ordering of the planes.  Unused characters
 	in the 32 byte string should be set to NULL.
@@ -4091,12 +4093,12 @@ typedef struct {
 
    &s.code;scanline_order&e.code;
     <quote><p>
-	This is &s.code;XvTopToBottom&e.code; or &s.code;XvBottomToTop&e.code;. 
+	This is &s.code;XvTopToBottom&e.code; or &s.code;XvBottomToTop&e.code;.
     </quote>
 
   Since some formats (particular some planar YUV formats) may not
 be completely defined by the parameters above, the guid, when
-available, should provide the most accurate description of the 
+available, should provide the most accurate description of the
 format.
 
 </quote>
@@ -4132,6 +4134,10 @@ and the action to be taken for unresolved symbols can be controlled by
 the caller of the loader.  Typically the caller identifies which symbols
 can safely remain unresolved and which cannot.
 
+NOTE:  Now that ISO-C allows pointers to functions and pointers to data to
+have different internal representations, some of the following interfaces
+will need to be revisited.
+
 <sect1>Semi-private Loader Interface
 <p>
 
@@ -4277,7 +4283,7 @@ typedef struct {
 				   specified and matches.
 
 			</quote>
-                    &s.code;patchlevel&e.code;  
+                    &s.code;patchlevel&e.code;
 			<quote><p>
 				   The module's patchlevel must be no
 				   less than this value.  This comparison
@@ -4286,20 +4292,20 @@ typedef struct {
 				   specified and matches.
 
 			</quote>
-                    &s.code;abiclass&e.code;    
+                    &s.code;abiclass&e.code;
 			<quote><p>
 				   String must match the module's abiclass
 				   string.
 
 			</quote>
-                    &s.code;abiversion&e.code;  
+                    &s.code;abiversion&e.code;
 			<quote><p>
 				   Must be consistent with the module's
 				   abiversion (major equal, minor no
 				   older).
 
 			</quote>
-                    &s.code;moduleclass&e.code; 
+                    &s.code;moduleclass&e.code;
 			<quote><p>
 				   String must match the module's
 				   moduleclass string.
@@ -4311,7 +4317,7 @@ typedef struct {
       &s.code;errmaj&e.code;
 	<quote><p>
 		  An optional pointer to a variable holding the major
-		  part or the error code.  When provided, it
+		  part or the error code.  When provided,
 		  &s.code;*errmaj&e.code; is filled in when
 		  &s.code;LoadModule()&e.code; fails.
 
@@ -4331,7 +4337,8 @@ typedef struct {
     This function unloads the module referred to by the handle mod.
     All child modules are also unloaded recursively.  This function must
     not be used to directly unload modules that are child modules (i.e.,
-    those that have been loaded with &s.code;LoadSubModule()&e.code;).
+    those that have been loaded with the &s.code;LoadSubModule()&e.code;
+    described below).
 
   </quote>
   </quote>
@@ -4361,7 +4368,7 @@ typedef struct {
     CARD32       abiversion;   /* ABI version */
     const char * moduleclass;  /* module class */
     CARD32       checksum[4];  /* contains a digital signature of the */
-                               /* version info structure */ 
+                               /* version info structure */
 } XF86ModuleVersionInfo;
 </verb>
 
@@ -4547,15 +4554,15 @@ as
     and maybe used by the &s.code;SetupProc&e.code; if it calls other
     loader functions that require a reference to it.   The remaining
     arguments are those that were passed to the
-    &s.code;LoadModule()&e.code; (or &s.code;LoadSubModule()&e.code;), 
-    and are described above. When the &s.code;SetupProc&e.code; is 
-    successful it must return a non-&s.code;NULL&e.code; value.  The 
-    loader checks this, and if it is &s.code;NULL&e.code; it unloads 
-    the module and reports the failure to the caller of 
-    &s.code;LoadModule()&e.code;.  If the &s.code;SetupProc&e.code; 
-    does things that need to be undone when the module is unloaded, 
-    it should define a &s.code;TearDownProc&e.code;, and return a 
-    pointer that the &s.code;TearDownProc&e.code; can use to undo what 
+    &s.code;LoadModule()&e.code; (or &s.code;LoadSubModule()&e.code;),
+    and are described above. When the &s.code;SetupProc&e.code; is
+    successful it must return a non-&s.code;NULL&e.code; value.  The
+    loader checks this, and if it is &s.code;NULL&e.code; it unloads
+    the module and reports the failure to the caller of
+    &s.code;LoadModule()&e.code;.  If the &s.code;SetupProc&e.code;
+    does things that need to be undone when the module is unloaded,
+    it should define a &s.code;TearDownProc&e.code;, and return a
+    pointer that the &s.code;TearDownProc&e.code; can use to undo what
     has been done.
 
     When a module is loaded multiple times, the &s.code;SetupProc&e.code;
@@ -4603,7 +4610,7 @@ the server, and may also be used from within modules.
   <quote><p>
     This function unloads the module with handle &s.code;module&e.code;.
     If that module itself has children, they are also unloaded.  It is
-    like &s.code;LoadModule()&e.code;, except that it is safe to use
+    like &s.code;UnloadModule()&e.code;, except that it is safe to use
     for unloading child modules.
 
   </quote>
@@ -4644,9 +4651,9 @@ the server, and may also be used from within modules.
     &s.code;LoadSubModule()&e.code;.  If any symbols registered in this
     way are found to be unresolved when
     &s.code;LoaderCheckUnresolved()&e.code; is called then
-    &s.code;LoaderCheckUnresolved()&e.code; will report a failure.  The
-    function takes one or more &s.code;NULL&e.code; terminated lists of
-    symbols.  The end of the argument list is indicated by a
+    &s.code;LoaderCheckUnresolved()&e.code; will report a failure.
+    The function takes one or more &s.code;NULL&e.code; terminated
+    lists of symbols.  The end of the argument list is indicated by a
     &s.code;NULL&e.code; argument.
 
   </quote>
@@ -4668,6 +4675,9 @@ the server, and may also be used from within modules.
     with the loader.  When &s.code;LoaderCheckUnresolved()&e.code; is
     run it won't generate warnings for symbols registered in this way
     unless they were also registered as required symbols.
+    The function takes one or more &s.code;NULL&e.code; terminated
+    lists of symbols.  The end of the argument list is indicated by a
+    &s.code;NULL&e.code; argument.
 
   </quote>
 
@@ -4874,10 +4884,11 @@ strongly encouraged to improve the consistency of driver behaviour.
 
       NOTE: This function can only be used after the
       &s.code;ScrnInfoRec&e.code; and its &s.code;name&e.code; field
-      have been allocated.  That means that it can not be used before
-      the END of the &s.code;ChipProbe()&e.code; function.  Prior to
-      that, use &s.code;xf86Msg()&e.code;, providing the driver's name
-      explicitly.  No screen number can be supplied at that point.
+      have been allocated.  Normally, this means that it can not be
+      used before the END of the &s.code;ChipProbe()&e.code; function.
+      Prior to that, use &s.code;xf86Msg()&e.code;, providing the
+      driver's name explicitly.  No screen number can be supplied at
+      that point.
 
     </quote>
 
@@ -5180,7 +5191,7 @@ be catered for the by the helpers.
 	</quote>
         &s.code;linePitches&e.code;
 	<quote><p>
-		List of supported line pitches supported by the driver.
+		List of line pitches supported by the driver.
 		This is optional and should be &s.code;NULL&e.code; when
 		not used.
 
@@ -5447,7 +5458,7 @@ be catered for the by the helpers.
       to be programmed in the chip when it has a programmable clock, or
       the clock that will be picked from the clocks list when it is not
       a programmable one.  Thus:
-      
+
          &s.code;mode-&gt;SynthClock =
 		&f.indent;(mode-&gt;Clock * ClockMulFactor) / ClockDivFactor&e.code;
 
@@ -5483,9 +5494,10 @@ be catered for the by the helpers.
     &s.code;void xf86PrintModes(ScrnInfoPtr scrp)&e.code;
     <quote><p>
       This function prints out the virtual size setting, and the line
-      pitch being used.  It also prints out one line for each mode being
-      used, including its pixel clock, horizontal sync rate, refresh
-      rate, and whether it is interlaced or multiscan.
+      pitch being used.  It also prints out two lines for each mode being
+      used.  The first line includes the mode's pixel clock, horizontal sync
+      rate, refresh rate, and whether it is interlaced, doublescanned and/or
+      multi-scanned.  The second line is the mode's Modeline.
 
       This function is normally called after calling
       &s.code;xf86SetCrtcForModes()&e.code;.
@@ -5767,7 +5779,7 @@ programming the standard VGA registers, and for handling VGA colourmaps.
 #define VGA_NUM_GFX   9
 #define VGA_NUM_ATTR 21
       </verb></quote>
-      
+
     </quote>
 
     &s.code;Bool vgaHWCopyReg(vgaRegPtr dst, vgaRegPtr src)&e.code;
@@ -5864,22 +5876,12 @@ programming the standard VGA registers, and for handling VGA colourmaps.
       This function unlocks the VGA &s.code;CRTC[0-7]&e.code; registers,
       and must be called before attempting to write to those registers.
 
-      A macro &s.code;VGAHW_UNLOCK(base)&e.code; is also available in
-      &s.code;vgaHW.h&e.code; that does the same thing, and this may be
-      used when the vgahw module is not loaded (for example, in the
-      &s.code;ChipProbe()&e.code; function).
-
     </quote>
 
     &s.code;void vgaHWLock(vgaHWPtr hwp)&e.code;
     <quote><p>
       This function locks the VGA &s.code;CRTC[0-7]&e.code; registers.
 
-      A macro &s.code;VGAHW_LOCK(base)&e.code; is also available in
-      &s.code;vgaHW.h&e.code; that does the same thing, and this may be
-      used when the vgahw module is not loaded (for example, in the
-      &s.code;ChipProbe()&e.code; function).
-
     </quote>
 
     &s.code;void vgaHWEnable(vgaHWPtr hwp)&e.code;
@@ -5922,14 +5924,14 @@ programming the standard VGA registers, and for handling VGA colourmaps.
       below in the order &s.code;vgaHWSaveColormap()&e.code;,
       &s.code;vgaHWSaveMode()&e.code;, &s.code;vgaHWSaveFonts()&e.code; to
       carry out the different save phases.  It is undecided at this
-      stage whether they will be part of the vgahw module's public
+      stage whether they will remain part of the vgahw module's public
       interface or not.
 
     </quote>
 
     &s.code;void vgaHWSaveMode(ScrnInfoPtr pScrn, vgaRegPtr save)&e.code;
     <quote><p>
-      This functions saves the VGA mode registers.  They are saved to
+      This function saves the VGA mode registers.  They are saved to
       the &s.code;vgaRegRec&e.code; pointed to by &s.code;save&e.code;.
       The registers saved are:
 
@@ -5941,11 +5943,14 @@ programming the standard VGA registers, and for handling VGA colourmaps.
         Sequencer[0-4]&e.code;
 	</quote>
 
+    The number of registers actually saved may be modified by a prior call
+    to &s.code;vgaHWSetRegCounts()&e.code;.
+
     </quote>
 
     &s.code;void vgaHWSaveFonts(ScrnInfoPtr pScrn, vgaRegPtr save)&e.code;
     <quote><p>
-      This functions saves the text mode font and text data held in the
+      This function saves the text mode font and text data held in the
       video memory.  If called while in a graphics mode, no save is
       done.  The VGA memory window must be mapped with
       &s.code;vgaHWMapMem()&e.code; before to calling this function.
@@ -5982,13 +5987,13 @@ programming the standard VGA registers, and for handling VGA colourmaps.
       &s.code;vgaHWRestoreMode()&e.code;,
       &s.code;vgaHWRestoreColormap()&e.code; to carry out the different
       restore phases.  It is undecided at this stage whether they will
-      be part of the vgahw module's public interface or not.
+      remain part of the vgahw module's public interface or not.
 
     </quote>
 
     &s.code;void vgaHWRestoreMode(ScrnInfoPtr pScrn, vgaRegPtr restore)&e.code;
     <quote><p>
-      This functions restores the VGA mode registers.  They are restore
+      This function restores the VGA mode registers.  They are restored
       from the data in the &s.code;vgaRegRec&e.code; pointed to by
       &s.code;restore&e.code;.  The registers restored are:
 
@@ -6000,11 +6005,14 @@ programming the standard VGA registers, and for handling VGA colourmaps.
         Sequencer[0-4]&e.code;
 	</quote>
 
+    The number of registers actually restored may be modified by a prior call
+    to &s.code;vgaHWSetRegCounts()&e.code;.
+
     </quote>
 
     &s.code;void vgaHWRestoreFonts(ScrnInfoPtr pScrn, vgaRegPtr restore)&e.code;
     <quote><p>
-      This functions restores the text mode font and text data to the
+      This function restores the text mode font and text data to the
       video memory.  The VGA memory window must be mapped with
       &s.code;vgaHWMapMem()&e.code; before to calling this function.
 
@@ -6063,8 +6071,8 @@ programming the standard VGA registers, and for handling VGA colourmaps.
       &s.code;on&e.code; is &s.code;FALSE&e.code;, and unblanked when
       &s.code;on&e.code; is &s.code;TRUE&e.code;.  This function is
       provided for use in cases where the &s.code;ScrnInfoRec&e.code;
-      can't be derived from the &s.code;ScreenRec&e.code;, like probing
-      for clocks.
+      can't be derived from the &s.code;ScreenRec&e.code; (while probing
+      for clocks, for example).
 
     </quote>
   </quote>
@@ -6072,7 +6080,7 @@ programming the standard VGA registers, and for handling VGA colourmaps.
 <sect1>VGA Colormap Functions
 <p>
 
-    The vgahw modules uses the standard colormap support (see the
+    The vgahw module uses the standard colormap support (see the
     <ref id="cmap" name="Colormap Handling"> section.  This is initialised
     with the following function:
 
@@ -6278,7 +6286,7 @@ visible symbols.
     &s.code;"compiler.h"&e.code;
   </quote>
   Note: in drivers, this must be included after &s.code;"xf86_ansic.h"&e.code;.
-   
+
   Drivers that need to access PCI vendor/device definitions need this:
   <quote>
     &s.code;"xf86PciInfo.h"&e.code;
@@ -6370,8 +6378,6 @@ visible symbols.
 #define ZZZ_PATCHLEVEL    <int>
     </code>
 <p>
-    XXX Probably want to remove one of these version.
-<p>
     NOTE: &s.code;ZZZ_DRIVER_NAME&e.code; should match the name of the
     driver module without things like the "lib" prefix, the "_drv" suffix
     or filename extensions.
@@ -6548,10 +6554,10 @@ zzzSetup(pointer module, pointer opts, int *errmaj, int *errmin)
     it is zeroed, and if the allocation fails the server exits.
 <p>
     NOTE:
-    When allocating structures from inside the driver which are defined 
-    on the common level it is important to initialize the structure to 
-    zero. 
-    Only this guarantees that the server remains source compatible to 
+    When allocating structures from inside the driver which are defined
+    on the common level it is important to initialize the structure to
+    zero.
+    Only this guarantees that the server remains source compatible to
     future changes in common level structures.
 
     <code>
@@ -6655,7 +6661,7 @@ ZZZProbe(DriverPtr drv, int flags)
      */
     /* test if PCI bus present */
     if (xf86GetPciVideoInfo()) {
-      
+
         numUsed = xf86MatchPciInstances(ZZZ_NAME, PCI_VENDOR_ZZZ,
                             ZZZChipsets, ZZZPciChipsets, devSections,
                             numDevSections, drv, &amp;usedChips);
@@ -6663,7 +6669,7 @@ ZZZProbe(DriverPtr drv, int flags)
         for (i = 0; i < numUsed; i++) {
             ScrnInfoPtr pScrn = NULL;
             if ((pScrn = xf86ConfigPciEntity(pScrn, flags, usedChips[i],
-                                             ZZZPciChipsets, NULL, NULL, 
+                                             ZZZPciChipsets, NULL, NULL,
                                              NULL, NULL, NULL))) {
                /* Allocate a ScrnInfoRec */
                pScrn->driverVersion = VERSION;
@@ -6695,10 +6701,10 @@ ZZZProbe(DriverPtr drv, int flags)
                              devSections, numDevSections, &amp;usedChips);
     for (i = 0; i < numUsed; i++) {
         ScrnInfoPtr pScrn = NULL;
-	if ((pScrn = xf86ConfigIsaEntity(pScrn, flags, usedChips[i], 
-					 ZZZIsaChipsets, NULL, NULL, NULL, 
+	if ((pScrn = xf86ConfigIsaEntity(pScrn, flags, usedChips[i],
+					 ZZZIsaChipsets, NULL, NULL, NULL,
 					 NULL, NULL))) {
-            pScrn->driverVersion = VERSION;		
+            pScrn->driverVersion = VERSION;
             pScrn->driverName    = ZZZ_DRIVER_NAME;
             pScrn->name          = ZZZ_NAME;
             pScrn->Probe         = ZZZProbe;
@@ -7353,7 +7359,7 @@ ZZZCloseScreen(int scrnIndex, ScreenPtr pScreen)
 {
     ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
     if (pScrn->vtSema) {
-        ZZZRestore(pScrn); 
+        ZZZRestore(pScrn);
         ZZZUnmapMem(pScrn);
     }
     pScrn->vtSema = FALSE;
@@ -7369,11 +7375,6 @@ ZZZCloseScreen(int scrnIndex, ScreenPtr pScreen)
     blanking function).  When using the vgahw module, this will typically
     be:
 
-This function is mandatory. Before modifying any hardware register directly
-this function needs to make sure that the Xserver is active by checking
-if <code>pScrn</code> is non-NULL and for <code>pScrn->vtSema == TRUE</code>.
-
-
     <code>
 static Bool
 ZZZSaveScreen(ScreenPtr pScreen, int mode)
@@ -7382,6 +7383,11 @@ ZZZSaveScreen(ScreenPtr pScreen, int mode)
 }
     </code>
 
+    This function is mandatory.  Before modifying any hardware register
+    directly this function needs to make sure that the Xserver is active
+    by checking if &s.code;pScrn&e.code; is non-NULL and for
+    &s.code;pScrn->vtSema == TRUE&e.code;.
+
 <sect2>FreeScreen
 <p>
 
diff --git a/xc/programs/Xserver/hw/xfree86/doc/sgml/DRI.sgml b/xc/programs/Xserver/hw/xfree86/doc/sgml/DRI.sgml
index 15722d3c1..b6c6d51ec 100644
--- a/xc/programs/Xserver/hw/xfree86/doc/sgml/DRI.sgml
+++ b/xc/programs/Xserver/hw/xfree86/doc/sgml/DRI.sgml
@@ -13,7 +13,7 @@
     <date>15 June 2001
 
     <ident>
-    $XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/DRI.sgml,v 1.28 2002/02/22 21:45:13 dawes Exp $
+    $XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/DRI.sgml,v 1.29 2003/02/17 03:57:29 dawes Exp $
     </ident>
 
     <toc>
@@ -148,6 +148,11 @@
               <item>Radeon SDR AGP
               <item>Radeon DDR AGP
               <item>Radeon 32MB SDR PCI (Alpha-based systems)
+              <item>Radeon 7000, M6 (RV100)
+              <item>Radeon 7200 (R100)
+              <item>Radeon 7500, M7 (RV200)
+              <item>Radeon 8500, 9100 (R200)
+	      <item>Radeon 9000, M9 (RV250)
             </itemize>
           <item>3Dlabs, supported on Intel x86 and AMD:
             <itemize>
diff --git a/xc/programs/Xserver/hw/xfree86/doc/sgml/DRIcomp.sgml b/xc/programs/Xserver/hw/xfree86/doc/sgml/DRIcomp.sgml
index 46bc98d5d..5d47ed51a 100644
--- a/xc/programs/Xserver/hw/xfree86/doc/sgml/DRIcomp.sgml
+++ b/xc/programs/Xserver/hw/xfree86/doc/sgml/DRIcomp.sgml
@@ -13,7 +13,7 @@
     <date>21 April 2001
 
     <ident>
-    $XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/DRIcomp.sgml,v 1.17 2002/02/22 21:45:13 dawes Exp $
+    $XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/DRIcomp.sgml,v 1.19 2002/11/26 01:05:50 dawes Exp $
     </ident>
 
     <toc>
@@ -209,7 +209,7 @@
 
         <sect1>Intel Pentium III Features <p>
 
-            The Pentium III SSE (Katmai) instructions are used in
+            The Pentium III SSE instructions are used in
             optimized vertex transformation functions in the Mesa-based
             DRI drivers.
             On Linux, SSE requires a recent kernel (such as 2.4.0-test11
@@ -432,7 +432,7 @@
 	  <bf>will not compile</bf>.  You have been warned.  If you do
 	  have a 2.4.x kernel, you should add the following: 
           <verb>
-            #define MesaUseKatmai YES
+            #define MesaUseSSE YES
           </verb>
 	<p>
 
diff --git a/xc/programs/Xserver/hw/xfree86/doc/sgml/Imakefile b/xc/programs/Xserver/hw/xfree86/doc/sgml/Imakefile
index af193d934..3b81cfb69 100644
--- a/xc/programs/Xserver/hw/xfree86/doc/sgml/Imakefile
+++ b/xc/programs/Xserver/hw/xfree86/doc/sgml/Imakefile
@@ -3,7 +3,7 @@ XCOMM $XConsortium: Imakefile /main/16 1996/10/28 05:13:04 kaleb $
 
 
 
-XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/Imakefile,v 3.80 2002/06/03 21:22:09 dawes Exp $
+XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/Imakefile,v 3.83 2003/02/26 21:59:44 dawes Exp $
 
 #include <Server.tmpl>
 #include <lnxdoc.rules>
@@ -20,8 +20,9 @@ RELNOTES=RELNOTES.sgml
 SGMLDEPENDS = defs.ent
 MANSGMLDEPENDS = mdefs.ent
   INDEXLIST = README.sgml $(RELNOTES) Status.sgml LICENSE.sgml Install.sgml \
-	      DESIGN.sgml Versions.sgml \
+	      BUILD.sgml DESIGN.sgml Versions.sgml \
 	      mouse.sgml fonts.sgml DRI.sgml DRIcomp.sgml dps.sgml \
+	      XKB-Config.sgml XKB-Enhancing.sgml \
 	      Darwin.sgml isc.sgml LynxOS.sgml NetBSD.sgml OpenBSD.sgml \
 	      OS2Notes.sgml SCO.sgml Solaris.sgml \
               apm.sgml ati.sgml chips.sgml cyrix.sgml DECtga.sgml \
@@ -130,6 +131,8 @@ LinuxDocTarget(xinput)
 LinuxDocReadmeTarget(DRI)
 LinuxDocReadmeTarget(DRIcomp)
 LinuxDocReadmeTarget(dps)
+LinuxDocReadmeTarget(XKB-Config)
+LinuxDocReadmeTarget(XKB-Enhancing)
 
 SGMLMANDEFS=-D__drivermansuffix__='"$(DRIVERMANSUFFIX)"' \
 	    -D__filemansuffix__='"$(FILEMANSUFFIX)"' \
@@ -165,3 +168,7 @@ FORMATTEDDIR = ..
 UpdateFormattedDoc(RELNOTES,$(TOP))
 #endif
 
+/* Update the README files in xc/programs/xkbcomp */
+UpdateFormattedDocLong(README.XKB-Config,$(PROGRAMSRC)/xkbcomp,README.config)
+UpdateFormattedDocLong(README.XKB-Enhancing,$(PROGRAMSRC)/xkbcomp,README.enhancing)
+
diff --git a/xc/programs/Xserver/hw/xfree86/doc/sgml/Install.sgml b/xc/programs/Xserver/hw/xfree86/doc/sgml/Install.sgml
index f24c95c3b..fd2cf4be8 100644
--- a/xc/programs/Xserver/hw/xfree86/doc/sgml/Install.sgml
+++ b/xc/programs/Xserver/hw/xfree86/doc/sgml/Install.sgml
@@ -6,10 +6,10 @@
 
 <title>Installation Details for XFree86&trade; &relvers;
 <author>The XFree86 Project, Inc
-<date>16 January 2002
+<date>24 February 2003
 
 <ident>
-$XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/Install.sgml,v 1.13 2002/01/16 20:38:44 dawes Exp $
+$XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/Install.sgml,v 1.17 2003/02/24 17:09:16 dawes Exp $
 </ident>
 
 <abstract>
@@ -26,12 +26,21 @@ This document contains information about installing the XFree86 binaries
 as provided by The XFree86 Project.
 
 <p>
-The XFree86 binaries that we provide for UNIX-like OS's (Linux, the BSDs,
-Solaris, etc) are packaged in a platform-independent gzipped tar format (aka
-"tarballs" identified by the <tt>.tgz</tt> suffix).  Along with the
-binaries we provide a customized version of the GNU tar utility called
-"extract" and an installation script.  We recommend that these be
-used to install the binaries.
+The XFree86 binaries that we provide for UNIX-like OS's (Linux, the
+BSDs, Solaris, etc) are packaged in a platform-independent gzipped tar
+format (aka "tarballs" identified by the <tt>.tgz</tt> suffix).  Along
+with the binaries we provide a customized version of the GNU tar utility
+called "extract" and an installation script.  We recommend that these
+be used to install the binaries.  (The source for this customized version
+of GNU tar can be found in the XFree86 CVS repository's "utils" module,
+and from our <url name="ftp site"
+url="ftp://ftp.xfree86.org/pub/XFree86/misc/utils-&utilsvers;.tgz">.)
+
+<![ %snapshot [
+<p>
+Note: for snapshot releases like this one, binaries are only available for
+a small number of platforms.
+]]>
 
 
 <sect>Downloading the XFree86 &relvers; binaries
@@ -43,7 +52,7 @@ XFree86 &relvers; is an update release.  The most recent full release
 Information about downloading and installing &fullrelvers; can be found
 in the installation document for that version, which can be found
 on the <url name="XFree86 web site"
-url="http://www.xfree86.org/pub/XFree86/&fullrelvers/Install.html">.
+url="http://www.xfree86.org/&fullrelvers/Install.html">.
 ]]>
 
 We provide XFree86 &relvers; <![ %updaterel [update ]]>binaries for a range
@@ -129,12 +138,12 @@ distribution.
 
 Once you're run the <tt>Xinstall.sh</tt> script and found which binary
 <![ %updaterel; [update ]]>distribution is suitable for your system,
-download the necessary files.  The <![ %fullrel [twelve (12)]]><![
+download the necessary files.  The <![ %fullbinaries [twelve (12)]]><![
 %updaterel [four (4)]]> mandatory files for all installations are listed
 below.  If you have not downloaded all of the files, the installer script
 will complain.
 
-<![ %fullrel [
+<![ %fullbinaries [
 <quote><verb>
 1.   Xinstall.sh    The installer script
 2.   extract        The utility for extracting tarballs
@@ -167,14 +176,14 @@ NOTES:
 	version called <tt>extract.exe</tt> instead.  This should fix the
 	problem.  (This is not a DOS/Windows executable.)
 
-<![ %fullrel [
+<![ %fullbinaries [
   <item>A few distributions don't have or require the <tt>Xvar.tgz</tt>
 	tarball.  If it is present in the <tt>binaries</tt> sub-directory
 	for your platform, then it is required.
 ]]>
 
   <item>The Darwin/Mac OS X distribution doesn't have or require the
-	<![ %fullrel [<tt>Xmod.tgz</tt>]]><![ %updaterel
+	<![ %fullbinaries [<tt>Xmod.tgz</tt>]]><![ %updaterel
 	[<tt>Xdrivers.tgz</tt>]]> tarball.
 
   <item>Some distributions may have additional mandatory tarballs.
@@ -182,7 +191,7 @@ NOTES:
 
 </itemize>
 
-<![ %fullrel [
+<![ %fullbinaries [
 The following eleven (11) tarballs are optional.  You should download
 the ones you want to install.
 
@@ -221,7 +230,7 @@ script to install this update.  Older versions may not be able to do it
 correctly.]]>
 There are a lot of
 steps in the manual installation process, and those steps can vary
-according to the platform and hardware setup.  <![ %fullrel [There is a description of
+according to the platform and hardware setup.  <![ %fullbinaries [There is a description of
 the manual installation process for the most common cases <ref
 id="manual-install" name="below">.]]>
 
@@ -253,7 +262,7 @@ be a problem, you should exit your X session, including stopping xdm or
 equivalent if it is running, before continuing.  If you ignore this
 warning and run into problems, well, you were warned!
 
-<![ %fullrel [If you have an existing X installation, you]]>
+<![ %fullbinaries [If you have an existing X installation, you]]>
 <![ %updaterel [You ]]>
 will be warned that proceeding
 with this installation will overwrite it.  Only those things that are
@@ -274,7 +283,7 @@ script may remove some old files or directories that would get in the
 way of the new installation.  It will list which files/directories have
 been removed.  If none are listed, then none were removed.
 
-<![ %fullrel [
+<![ %fullbinaries [
 The next step when installing over an existing version is to check for
 existing configuration files.  As of XFree86 version 3.9.18, the run-time
 configuration files are installed by default under <tt>/etc/X11</tt>
@@ -375,7 +384,7 @@ operation of the new X server, you can safely remove the old
 After the X server configuration is done, it may be advisable to reboot,
 especially if you run xdm (or equivalent) or the font server (xfs).
 
-<![ %fullrel [
+<![ %fullbinaries [
 <sect>Installing XFree86 &relvers; manually<label id="manual-install">
 <p>
 This section contains information about manually installing the XFree86
diff --git a/xc/programs/Xserver/hw/xfree86/doc/sgml/LICENSE.sgml b/xc/programs/Xserver/hw/xfree86/doc/sgml/LICENSE.sgml
index 4f271a325..d928d7c66 100644
--- a/xc/programs/Xserver/hw/xfree86/doc/sgml/LICENSE.sgml
+++ b/xc/programs/Xserver/hw/xfree86/doc/sgml/LICENSE.sgml
@@ -5,10 +5,10 @@
 <article>
 <title>Licenses</title>
 <author>The XFree86 Project</author>
-<date>January 2002</date>
+<date>February 2003</date>
 
 <ident>
-$XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/LICENSE.sgml,v 1.11 2002/01/16 20:38:45 dawes Exp $
+$XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/LICENSE.sgml,v 1.12 2003/02/24 03:41:16 dawes Exp $
 </ident>
 
 <sect>XFree86 License
@@ -17,7 +17,7 @@ XFree86 code without an explicit copyright is covered by the following
 copyright/license:
 
 <p>
-Copyright (C) 1994-2002 The XFree86 Project, Inc.  All Rights Reserved.
+Copyright (C) 1994-2003 The XFree86 Project, Inc.  All Rights Reserved.
 
 Permission is hereby granted, free of charge, to any person obtaining a
 copy of this software and associated documentation files (the "Software"),
diff --git a/xc/programs/Xserver/hw/xfree86/doc/sgml/NetBSD.sgml b/xc/programs/Xserver/hw/xfree86/doc/sgml/NetBSD.sgml
index 4b670edee..b94384236 100644
--- a/xc/programs/Xserver/hw/xfree86/doc/sgml/NetBSD.sgml
+++ b/xc/programs/Xserver/hw/xfree86/doc/sgml/NetBSD.sgml
@@ -9,10 +9,10 @@ David Dawes,
 Marc  Wandschneider,
 Mark  Weaver,
 Matthieu Herrb
-<Date>Last modified on: 16 January 2002
+<Date>Last modified on: 9 November 2002
 
 <ident>
-$XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/NetBSD.sgml,v 3.63 2002/01/16 22:35:18 herrb Exp $
+$XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/NetBSD.sgml,v 3.68 2003/02/16 17:21:11 dawes Exp $
 </ident>
 <toc>
 
@@ -20,18 +20,20 @@ $XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/NetBSD.sgml,v 3.63 2002/01/16
 <sect>What and Where is XFree86?
 
 <p>
-XFree86 is the Open Source port of X.Org's X11R6.6 release that supports
-several UNIX(R) and UNIX-like (such as Linux, the BSDs and Solaris x86)
-operating systems on Intel and other platforms.
+XFree86 is an Open Source version of the X Window System that supports
+several UNIX(R) and UNIX-like operating systems (such as Linux, the BSDs
+and Solaris x86) on Intel and other platforms.  This version is compatible
+with X11R6.6.
 
 See the <htmlurl url="COPYRIGHT.html" name="Copyright Notice">.
 
+<![ %notsnapshot [
 The sources for XFree86 are available by anonymous ftp from:
 
 <htmlurl name="ftp://ftp.XFree86.org/pub/XFree86/&relvers;"
 url="ftp://ftp.XFree86.org/pub/XFree86/&relvers;">
 
-Binaries for NetBSD 1.4 and later are available from:
+Binaries for NetBSD 1.5 and later are available from:
 <htmlurl name="ftp://ftp.XFree86.org/pub/XFree86/&relvers;/binaries/NetBSD"
 url="ftp://ftp.XFree86.org/pub/XFree86/&relvers;/NetBSD">
 
@@ -39,6 +41,7 @@ url="ftp://ftp.XFree86.org/pub/XFree86/&relvers;/NetBSD">
 A list of mirror sites is provided by
 <htmlurl name="http://www.xfree86.org/MIRRORS.shtml"
 url="http://www.xfree86.org/MIRRORS.shtml">
+]]>
 
 
 XFree86 also builds on other NetBSD architectures. See section
@@ -145,7 +148,7 @@ sample file installed as <tt>/usr/X11R6/lib/X11/XF86Config.eg</tt>,
 which can be used as a starting point.
 
 For details about the <tt/XF86Config/ file format, refer to the
-<em>XF86Config(5)</em> manual page.
+<em><htmlurl name="XF86Config(5)" url="XF86Config.5.html"></em> manual page.
 
 Once you've set up a XF86Config file, you can fine tune the video
 modes with the <tt>xvidtune</tt> utility. 
@@ -466,8 +469,18 @@ and <bf/__bsdi__/ for BSD/386.
 <sect> Thanks
 <p>
 Many thanks to all people who contributed to make XFree86 work on
-*BSD, in particular, <bf/David Dawes/,
-<bf/Pace Willison/, <bf/Amancio Hasty/, <bf/Christoph Robitschko/,
-<bf/Nate Williams/, <bf/Rod Grimes/, <bf/Jack Velte/ and <bf/Michael Smith/.
+*BSD, in particular:
+<bf/David Dawes/,
+<bf/Todd Fries/,
+<bf/Rod Grimes/,
+<bf/Charles Hannum/,
+<bf/Amancio Hasty/, 
+<bf/Christoph Robitschko/,
+<bf/Matthias Scheler/,
+<bf/Michael Smith/,
+<bf/Ignatios Souvatzis/,
+<bf/Jack Velte/,
+<bf/Nate Williams/ and
+<bf/Pace Willison/.
 
 </article>
diff --git a/xc/programs/Xserver/hw/xfree86/doc/sgml/OS2Notes.sgml b/xc/programs/Xserver/hw/xfree86/doc/sgml/OS2Notes.sgml
index 832e9f63a..6bdc7d1cf 100644
--- a/xc/programs/Xserver/hw/xfree86/doc/sgml/OS2Notes.sgml
+++ b/xc/programs/Xserver/hw/xfree86/doc/sgml/OS2Notes.sgml
@@ -5,6 +5,10 @@
 <author>Holger Veit
 <date>Last modified March 8th, 2000
 
+<ident>
+$XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/OS2Notes.sgml,v 1.2 2003/01/04 04:20:23 dawes Exp $
+</ident>
+
 <toc>
 
 <sect>Preface
@@ -27,11 +31,11 @@ have worked in earlier versions, may now no longer work, or work differently.
 Be aware that for OS/2, XFree86-4.0 is considered to be alpha software.
 
 If you want to join the XFree86 developer team, e.g. to add support for
-certain hardware, please send a request to BOD@XFree86.org. Please
-think about such a step carefully before, though, since much work is 
-involved. Please use the XFree86-4.0 source code as a test example how
-to compile the system. The ability to manage that is a basic requirement
-for becoming a developer.
+certain hardware, please send a request to <email>BOD@XFree86.org</email>.
+Please think about such a step carefully before, though, since much work
+is involved. Please use the XFree86-4.0 source code as a test example
+how to compile the system. The ability to manage that is a basic
+requirement for becoming a developer.
 
 
 <sect>Tools required
@@ -201,14 +205,5 @@ Well, you see, this was quite easy :-)
 
 
 
-<verb>
-$XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/OS2Notes.sgml,v 1.1 2001/06/04 13:50:15 dawes Exp $
-
-
-
-
-
-$XConsortium: OS2note.sgml /main/1 1996/02/24 10:08:59 kaleb $
-</verb>
 
 </article>
diff --git a/xc/programs/Xserver/hw/xfree86/doc/sgml/OpenBSD.sgml b/xc/programs/Xserver/hw/xfree86/doc/sgml/OpenBSD.sgml
index 2586aa5e3..142ae16a3 100644
--- a/xc/programs/Xserver/hw/xfree86/doc/sgml/OpenBSD.sgml
+++ b/xc/programs/Xserver/hw/xfree86/doc/sgml/OpenBSD.sgml
@@ -6,10 +6,10 @@
 <title>README for XFree86 &relvers; on OpenBSD
 <author>
 Matthieu Herrb
-<Date>Last modified on: 16 January 2002
+<Date>Last modified on: 9 November 2002
 
 <ident>
-$XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/OpenBSD.sgml,v 1.24 2002/01/16 22:35:17 herrb Exp $
+$XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/OpenBSD.sgml,v 1.30 2003/02/25 19:31:01 dawes Exp $
 </ident>
 
 <toc>
@@ -18,18 +18,20 @@ $XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/OpenBSD.sgml,v 1.24 2002/01/16
 <sect>What and Where is XFree86?
 
 <p>
-XFree86 is the Open Source port of X.Org's X11R6.6 release that supports
-several UNIX(R) and UNIX-like (such as Linux, the BSDs and Solaris x86)
-operating systems on Intel and other platforms.
+XFree86 is an Open Source version of the X Window System that supports
+several UNIX(R) and UNIX-like operating systems (such as Linux, the BSDs
+and Solaris x86) on Intel and other platforms.  This version is compatible
+with X11R6.6.
 
 See the <htmlurl url="COPYRIGHT.html" name="Copyright Notice">.
 
+<![ %notsnapshot [
 The sources for XFree86 &relvers; are available by anonymous ftp from:
 
 <htmlurl name="ftp://ftp.XFree86.org/pub/XFree86/&relvers;"
 url="ftp://ftp.XFree86.org/pub/XFree86/&relvers;">
 
-Binaries for OpenBSD/i386 3.0 and later are available from:
+Binaries for OpenBSD/i386 3.2 and later are available from:
 
 <htmlurl name="ftp://ftp.XFree86.org/pub/XFree86/&relvers;/binaries/OpenBSD"
 url="ftp://ftp.XFree86.org/pub/XFree86/&relvers;/binaries/OpenBSD">
@@ -37,6 +39,7 @@ url="ftp://ftp.XFree86.org/pub/XFree86/&relvers;/binaries/OpenBSD">
 A list of mirror sites is provided by
 <htmlurl name="http://www.xfree86.org/MIRRORS.shtml"
 url="http://www.xfree86.org/MIRRORS.shtml">
+]]>
 
 <p>
 
@@ -56,11 +59,17 @@ this file and we'll revise it.
 See the <htmlurl url="RELNOTES.html" name="Release Notes"> for
 non-OS dependent new features in XFree86 &relvers;.
 
+<sect1>New OS related features in 4.3
+<p>
+<itemize>
+<item>Support for some VGA cards on OpenBSD/alpha
+</itemize>
+
 <sect1>New OS dependent features in 4.2
 <p>
 <itemize>
 <item>Support for OpenBSD/macppc on the ATI Rage128 based
-Power Macintosh. 
+Power Macintoshes. 
 <item>Support for building clients on OpenBSD/sparc64.
 </itemize>
 
@@ -149,7 +158,7 @@ which can be used as a starting point.
 
 
 For details about the <tt/XF86Config/ file format, refer to the
-<em>XF86Config(5)</em> manual page.
+<em><htmlurl name="XF86Config(5)" url="XF86Config.5.html"></em> manual page.
 
 Once you've set up a XF86Config file, you can fine tune the video
 modes with the <tt>xvidtune</tt> utility. 
@@ -211,7 +220,6 @@ To make sure X support is enabled under  OpenBSD, the following
 line must be in your config file in <tt>/sys/arch/i386/conf</tt>:
 
 <tscreen>
- option XSERVER
  option APERTURE
 </tscreen>
 
@@ -267,62 +275,12 @@ OpenBSD supports System V shared memory. If XFree86
 detects this support in your kernel, it will support the MIT-SHM
 extension.
 
-To add support for system V shared memory to your kernel add the
-lines:
-
-<tscreen><verb>
- # System V-like IPC
- options         SYSVMSG
- options         SYSVSEM
- options         SYSVSHM
-</verb></tscreen>
- 
-to your kernel config file. 
-
 <sect> Rebuilding the XFree86 Distribution
 
 You should configure the distribution by editing
 <tt>xc/config/cf/host.def</tt>  before compiling.  To compile the
 sources, invoke ``<tt/make World/'' in the xc directory.
 
-<sect1>Console drivers<label id="console-drivers">
-
-<p>
-XFree86 has a configuration option to select the console
-drivers to use in <tt/host.def/:
-<itemize>
-<item> if you're using pccons only put:
-<tscreen><verb>
- #define XFree86ConsoleDefines -DPCCONS_SUPPORT
-</verb></tscreen>
-<item>if you're using pcvt only put:
-<tscreen><verb>
- #define XFree86ConsoleDefines -DPCVT_SUPPORT
-</verb></tscreen>
-</itemize>
-If you don't define <bf/XFree86ConsoleDefines/ in <tt/host.def/ the
-pccons and pcvt drivers will be supported by default.
-
-<p>
-Native support for the wscons console driver found on
-OpenBSD/macppc and on OpenBSD/i386 2.9 and later is built
-by adding:
-<tscreen><verb>
- #define XFree86ConsoleDefines -DWSCONS_SUPPORT
-</verb></tscreen>
-to <tt>xc/config/host.def</tt> before rebuilding the server. 
-
-For the i386, you should include both pcvt and wscons support in order
-to use the pcvt compatibility mode of wscons:
-<tscreen><verb>
- #define XFree86ConsoleDefines -DPCVT_SUPPORT -DWSCONS_SUPPORT
-</verb></tscreen>
-
-
-<sect1>Building on other architectures<label id="otherarch">
-
-<p>
-XFree86  also compiles on other OpenBSD architectures. 
 
 <p> 
 Note that OpenBSD project now has its own source tree, based on
@@ -332,7 +290,29 @@ source tree is available by anoncvs from all OpenBSD anoncvs
 servers. See <htmlurl url="http://www.openbsd.org/anoncvs.html"
 name="http://www.openbsd.org/anoncvs.html"> for details on anoncvs.
 
-<sect2>XFree86 on OpenBSD/macppc
+<label id="otherarch">
+
+<p>
+XFree86  also compiles on other OpenBSD architectures. 
+<sect1>XFree86 on OpenBSD/alpha
+<p>
+The XFree86 server is known to work on some VGA cards in alpha
+machines that support BWX I/O, with OpenBSD 3.2 and higher. 
+<p>
+The following cards have been successfully tested for now:
+<itemize>
+<item>3DLabs Permedia 2 (8, 15, 16 and 24 bits depth) 
+<item>ATI Rage Pro (works with 'Option "NoAccel"')
+<item>Cirrus Logic CL5430 (works with 'Option "NoAccel"')
+<item>Cirrus Logic GD5446 (8, 16 and 24 bits depth)
+<item>Matrox MGA 2064 (8, 16 and 24 bits depth)
+</itemize>
+<p>
+Note that this version of XFree86 doesn't work on TGA cards. The
+version shipped with OpenBSD 3.1 and higher includes an OS-specific
+driver <em/wsfb/ that is used to support TGA cards. 
+
+<sect1>XFree86 on OpenBSD/macppc
 <p>
 The XFree86 server is currently known to work on the G4 Macs and new
 iBooks with ATI Rage 128 cards running OpenBSD 3.0 or later.
@@ -341,22 +321,26 @@ lack some kernel support for it.
 <p>
 Use xf86config to build a /etc/X11/XF86Config file before starting 
 the server for the first time. 
-<p> 
-Tou configure the keyboard, the protocol should be specified as
-<bf/wskbd/ and the device as <tt>/dev/wskbd0</tt>.
-Using a wsmux device as the keyboard device doesn't work (yet). Use 
-<bf/macintosh/ as XkbModel. 
 <p>
 For the Titanium Powerbook G4, you can try the following mode line in
 <tt>/etc/X11/XF86Config</tt> to match the flat panel resolution:
 
 <tscreen><verb>
-Modeline "1152x768" 78.741 1152 1173 1269 1440  768 769 772 800 +HSync +VSync
+Modeline "1152x768" 64.995 1152 1213 1349 1472  768 771 777 806 -HSync -VSync
 </verb></tscreen>
+
+<sect1>XFree86 on OpenBSD/sparc
+<p>
+OpenBSD 3.2 on sparc switched to the wscons device driver and now uses
+the OS specific <em/wsfb/ driver in the XFree86 server. This driver is
+not included in XFree86 4.3. Please use the version shipped with
+OpenBSD instead. 
+
+<sect1>XFree86 on OpenBSD/sparc64
 <p>
-You need to set <tt/securelevel/ to -1 in the
-<tt>/etc/rc.securelevel</tt> 
-configuration file to run XFree86 on OpenBSD/macppc. 
+This version of XFree68 only has support for X clients on
+OpenBSD/sparc64. Note that the version shipped with OpenBSD also has
+support for the X server on both SBus and PCI based machines. 
 
 
 <sect>Building New X Clients
@@ -372,8 +356,18 @@ pages you should update <tt/whatis.db/ by running ``<tt>makewhatis
 <sect> Thanks
 <p>
 Many thanks to all people who contributed to make XFree86 work on
-*BSD, in particular, <bf/David Dawes/,
-<bf/Pace Willison/, <bf/Amancio Hasty/, <bf/Christoph Robitschko/,
-<bf/Nate Williams/, <bf/Rod Grimes/, <bf/Jack Velte/ and <bf/Michael Smith/.
+*BSD, in particular:
+<bf/David Dawes/,
+<bf/Todd Fries/,
+<bf/Rod Grimes/,
+<bf/Charles Hannum/,
+<bf/Amancio Hasty/, 
+<bf/Christoph Robitschko/,
+<bf/Matthias Scheler/,
+<bf/Michael Smith/,
+<bf/Ignatios Souvatzis/,
+<bf/Jack Velte/,
+<bf/Nate Williams/ and
+<bf/Pace Willison/.
 
 </article>
diff --git a/xc/programs/Xserver/hw/xfree86/doc/sgml/README.sgml b/xc/programs/Xserver/hw/xfree86/doc/sgml/README.sgml
index 1c3a3becf..eb115af83 100644
--- a/xc/programs/Xserver/hw/xfree86/doc/sgml/README.sgml
+++ b/xc/programs/Xserver/hw/xfree86/doc/sgml/README.sgml
@@ -13,17 +13,18 @@
 
 <title>README for XFree86&tm; &relvers;
 <author>The XFree86 Project, Inc
-<date>16 January 2002
+<date>26 February 2003
 
 <ident>
-$XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/README.sgml,v 3.120 2002/09/09 16:04:22 dawes Exp $
+$XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/README.sgml,v 3.134 2003/02/27 01:19:32 dawes Exp $
 </ident>
 
 <abstract>
 
-XFree86 is the Open Source port of X.Org's X11R6.6 release that supports
-several UNIX(R) and UNIX-like (such as Linux, the BSDs and Solaris x86)
-operating systems on Intel and other platforms.
+XFree86 is an Open Source version of the X Window System that supports
+many UNIX(R) and UNIX-like operating systems (such as Linux, FreeBSD,
+NetBSD, OpenBSD and Solaris x86) on Intel and other platforms.  This
+version is compatible with X11R6.6.
 
 </abstract>
 
@@ -36,7 +37,7 @@ operating systems on Intel and other platforms.
 XFree86 &relvers; is the &whichupdaterel; update to &fullrelvers;,
 the &whichfullrel; full release in the
 <![ %earlyrel; [new]]>
-XFree86 4 series.
+XFree86 4.x series.
 
 Update releases are taken from a stable/maintenance branch.  They are
 designed to be installed on top of the full release that they are
@@ -48,166 +49,123 @@ stability.
 <![ %fullrel [
 XFree86 &relvers; is the &whichfullrel; full release in the
 <![ %earlyrel; [new]]>
-XFree86 4 series.
+XFree86 4.x series.
 ]]>
 
-<p>
-XFree86 release 4 is a major re-design of the basic architectural
-underpinnings of XFree86's implementation of the original X Consortium's
-X Server.  This re-design allows for a modular interaction between the
-hardware drivers and the XFree86 core X server.  With 4.x, upgrades to
-the X server with new and unsupported hardware can be easily done and
-installed without undergoing the previous process of rebuilding an X
-server.  All that is required is installing the new driver module and
-updating the configuration file.
-
-The road to XFree86 release 4 began as an architectural concept in mid
-1997, with the serious framework being implemented in code the beginning
-of 1998.  There were several snapshots on the road to 4.0 which are now
-part of the 4.0 base release.
-<![ %fullrel [The &relvers; version is an upgrade to
-&prevrelvers;, which include more hardware ports, code enhancements and
-bug fixes.]]>
-
-Release 4 also included the long-awaited integration of the DRI (Direct
-Rendering Infrastructure).  This upgrade into the code base  gives
-XFree86 the abilities of accelerated direct 3-D graphics rendering, used
-widely in games and other visualization programs.
-
-While some driver available in the old 3.3.x release series have not
-been converted over to the 4.x series, those required for most modern
-video hardware are available.  Please check the <htmlurl name="Driver
-Status document" url="Status.html"> first to see whether your hardware
-is supported before upgrading to the 4.x series.
+<![ %snapshot [
+XFree86 &relvers; is a pre-release snapshot of XFree86 &nextfullrelvers;.
+<![ %relcandidate [
+This snapshot is release candidate &rcnum; for version &nextfullrelvers;.
+]]>
+Pre-release snapshots are provided for beta testing.  You should only install
+snapshots if you're comfortable dealing with possibly unstable beta-level
+software.  If you find problems with this snapshot, you are encouraged
+to report your findings to the public XFree86 mailing list:
+<email>XFree86@XFree86.org</email>.
 
+XFree86 &relvers; is a feature-complete snapshot of XFree86
+&nextfullrelvers;.
+]]> 
+
+<p>
+XFree86 4.x is the current XFree86 release series.  The first release in
+this series was in early 2000.  The core of XFree86 4.x is a modular
+X server.
+<![ %fullrel [The &relvers; version is a new release that includes
+additional hardware support, functional enhancements and bug fixes.]]>
 <![ %haverelnotes [
 Specific release enhancements can be viewed in the
 <htmlurl name="Release Notes" url="RELNOTES.html">.
 ]]>
 
-The XFree86 version numbering system has had some changes as of the
-4.0.2 release.  Information about this can be found in the
-<htmlurl name="Versions Document" url="Versions.html">.
+Most modern PC video hardware is supported in XFree86 &relvers;, and
+most PC video hardware that isn't supported explicitly can be used with
+the "vesa" driver.  The <htmlurl name="Driver Status document"
+url="Status.html"> has a summary of what hardware is supported in
+&relvers; compared with the old 3.3.x (&legacyvers;) series.  It is a
+good idea to check there before upgrading if you are currently running
+&legacyvers; with older hardware.
 
-Information about binary distributions and the attendant installation
-instructions can be found in the <htmlurl name="Installation Document"
-url="Install.html">.
-
-Copyright and Licensing information for this release and all XFree86
-releases can be found in the <htmlurl name="License Document"
-url="LICENSE.html">.
+XFree86 is produced by The XFree86 Project, Inc, which is a group of
+mostly volunteer independent developers.  XFree86 is a non-commercial
+organisation, and would not be viable without the invaluable development
+contributions of volunteers.  This release is dedicated to all who have
+supported and contributed to XFree86 over the last eleven years.
 
 <![ %snapshot [
-<sect>Redistribution of the Snapshots
+<sect>Redistribution of Snapshots
 <p>
 
 While the XFree86 <htmlurl name="License" url="LICENSE.html"> doesn't
-prohibit vendors and others redistributing binaries of this release, we
-don't recommend it.  We ask that if you do distribute such binaries,
-you make it clear that people using then should contact you for support
-and not XFree86.
+prohibit vendors and others redistributing binaries of this snapshot
+release, we don't recommend including them in production releases.
 ]]>
 
-<sect>Joining The Team
-<sect1> Development
+<sect>Pointers to additional information
 <p>
 
-If you would like to work on the development of XFree86 4, either by
-helping with the conversion of our older drivers to the new 4.x design,
-or assisting in the addition of new drivers or platforms to the code base
-then send a request to <url name="join the XFree86 development team"
-url="http://www.xfree86.org/developer.html">.  This will give you direct
-access to the latest XFree86 related development topics and discussions.
-Include in your note, your name, email address, reason for joining (what
-you will work on) and, level of expertise (coder, DRI, core, specific
-driver) and area of interest.
-
-</sect1>
-
+The documentation for this release can be found online at the <url
+name="XFree86 web site" url="http://www.xfree86.org/&relvers;/">.
+Documentation for the latest release version can always be found <url
+name="here" url="http://www.xfree86.org/current/">, and documentation
+for the latest pre-release snapshot can be found <url name="here"
+url="http://www.xfree86.org/snapshot/">.  Checking those last two links
+is a good way of finding out the latest versions available from XFree86.
 
-<sect1> Documentation
-<p>
-If instead your interests are on the Documentation side of the Project,
-or you want to contribute and are not ready for plunging into the code,
-you can join the Documentation Team (those hardy souls responsible for
-the content you are reading :-).  Amongst the Doc Team's activities are
-converting our SGML based documentation into an XML based one and updating
-and creating technical documentation used by staff and public.  If this
-sounds interesting then please send a request to <url name="join the
-XFree86 documentation team" url="mailto:signup@xfree86.org">.
-Include in your note, you name, email address, reason for joining (what
-you will work on) and level of expertise and whether you are interested
-in the tools or content side of the group.
+Information about binary distributions and the attendant installation
+instructions can be found in the <htmlurl name="Installation Document"
+url="Install.html">.
 
-</sect1>
-</sect> 
-
-<sect> The Public Mailing Lists
-<sect1>  Newbie
-<p> 
-For those who are new to XFree86  and want to learn more about our
-Project we recommend that you join our Newbie list, located at <url name
-= "Public Mailing Lists" url = "http://www.xfree86.org/mailman/listinfo">,
-where this and other discussions occur with our senior all-volunteer
-staff.  This is great forum to get introduced to XFree86 and ask for
-help on how to set up the XServer or whether your hardware is supported,
-and why not?,  and make suggestions for future releases of XFree86.
-This list is supported by our volunteer staff who needs to know how you
-are using and interacting with XFree86 and what is wrong and could be
-better.  Tell them, they want to know!
+Copyright and Licensing information for this release and all XFree86
+releases can be found in the <htmlurl name="License Document"
+url="LICENSE.html">.
 
-</sect1>
+The XFree86 version numbering system (including historical information)
+can be found in the <htmlurl name="Versions Document" url="Versions.html">.
 
-<sect1> Announce
-<p>
-For those who just want to know  the release schedule 
-this is a good list  to join.
+Additional information may be available at the <url
+name="XFree86 web site" url="http://www.xfree86.org/">, and pointers to
+other information are available at the <url name="XFree86 support page"
+url="http://www.xfree86.org/support.html">.
 
-<sect1> CVS Commit
+<sect>The Public Mailing Lists
+<sect1>CVS Commit
 <p>
 For those who want to see what has been committed recently to our CVS
 repository this is the list that will show you those updates.  This list
 is updated dynamically every time the repository is updated after the
 the commit happens.
 
-<!--
+<sect1>Devel
 <p>
-A followup to the commit list is the soon to be public, patch archives.
-This archive will be available on our web-site and will show what patches
-have been submitted and will soon be committed.  This is helpful for
-people who are interested in a specific area and want to know what work
-is happening there.  When this goes public we will announce it
-on our web site and our Announce mailing list, so keep watching.
--->
-
+This list is available for discussions about XFree86 development and
+for following up well-defined bug reports.  Many experienced XFree86
+developers are present on this list.
 
-<sect1>  Xpert
+<sect1>XFree86
 <p>
-If instead you are the lone developer who is improving XFree86 on an
-ad hoc basis for your particular environment (I want to get my mouse or
-video card to work), and need a specific question asked then you should
-go over to our Xpert list where such questions are raised and answered
-by our technical development staff.  Remember you do not have to be a
-member to write fixes to our code base and if your changes are discrete
-and self-contained the volume of developer mail may just be too noisy.
-
-
-Once your work is finished (coded, debugged and documented) please send
-your fix to <email>fixes@XFree86.org</email>.  This will ensure that
-they are included in future releases. And thanks!  You make this truly
-an Open group.
+This list is available for any discussions and questions related to XFree86.
+Support related questions should be sent here.  Many experienced XFree86
+developers monitor this list.
 
 </sect1>
 </sect>
 
+<sect>Contributing to XFree86
+<p>
+If you have any new work or enhancements/bug fixes for existing work,
+please submit them to <email>fixes@XFree86.org</email>.  This will ensure
+that they are included in future releases.  For new work, it's usually
+a good idea to discuss it first on the <email>devel@XFree86.org</email>
+list.
+
 <sect>How to get XFree86 &relvers;
 <p>
 <![ %snapshot; [
 XFree86 &relvers; can be found at the <url name="XFree86 ftp server"
 url="ftp://ftp.xfree86.org/pub/XFree86/snapshots/&relvers;/">, and at
-mirrors of this server.  This snapshot is available primarily in source
-form.  Binaries for some platforms may be made available at a later
-time.
+mirrors of this server.  This snapshot is available primarily in binary
+form for several popular platforms.
 ]]>
 
 <![ %release; [
@@ -239,13 +197,16 @@ README file for that version, which can be found on the
 ]]>
 
 <![ %fullrel [
-The source for version &fullrelvers; is split into three tarballs:
+The source for version &fullrelvers; is split into seven tarballs:
 <tt>X&fullsrcvers;src-1.tgz</tt>, <tt>X&fullsrcvers;src-2.tgz</tt>,
-<tt>X&fullsrcvers;src-3.tgz</tt>.  The first contains everything except the
-fonts and general X11 documentation.  It is sufficient for building
-XFree86 if you already have a set of fonts.  The second contains the
-fonts and the source for the general X11 documentation.  The third
-contains the general X11 documentation in hardcopy format.
+<tt>X&fullsrcvers;src-3.tgz</tt>, <tt>X&fullsrcvers;src-4.tgz</tt>,
+<tt>X&fullsrcvers;src-5.tgz</tt>, <tt>X&fullsrcvers;src-6.tgz</tt> and
+<tt>X&fullsrcvers;src-7.tgz</tt>.  The first three contain everything
+except the fonts and general X11 documentation.  Those three are sufficient
+for building XFree86 if you already have a set of fonts.  The fourth
+and fifth contain the fonts.  The sixth contains the source for the
+general X11 documentation.  The seventh contains the general X11
+documentation in hardcopy format.
 
 <![ %onediff; [
 A source patch relative to version &prevfullrelvers; is also available.
@@ -346,14 +307,18 @@ gzip -d &lt; &prevfullrelvers;-&fullrelvers;.diff4.gz | patch -p0 -E
 <![ %difftar; [
 <![ %removefiles; [
 <tscreen><verb>
-rm -f xc/extras/freetype2/builds/mac/ftlib.prj
-rm -fr xc/extras/freetype2/docs/design 
-rm -fr xc/extras/freetype2/docs/glyphs
-rm -fr xc/extras/freetype2/docs/image
-rm -fr xc/extras/freetype2/docs/tutorial
-rm -f xc/programs/Xserver/hw/darwin/bundle/English.lproj/MainMenu.nib/objects.nib
-rm -f xc/programs/Xserver/hw/darwin/bundle/Japanese.lproj/Localizable.strings
-rm -f xc/programs/Xserver/hw/darwin/bundle/Japanese.lproj/MainMenu.nib/objects.nib
+rm -f xc/doc/hardcopy/Xext/mit-shm.PS.gz
+rm -f xc/doc/hardcopy/saver/saver.PS.gz
+rm -fr xc/fonts/scaled/Ethiopic
+rm -fr xc/fonts/scaled/Meltho
+rm -fr xc/programs/Xserver/hw/darwin/bundle
+rm -f xc/programs/Xserver/hw/hp/input/drivers/XHPKeymaps
+rm -f xc/programs/Xserver/hw/hp/ngle/ngledoblt.o.8.07
+rm -f xc/programs/Xserver/hw/xwin/X.ico
+rm -fr xc/programs/xcursorgen/redglass
+rm -fr xc/programs/xcursorgen/whiteglass
+touch xc/extras/Mesa/src/Trace/tr_attrib.c
+touch xc/lib/fontconfig/NEWS
 </verb></tscreen>
 ]]>
 <tscreen><verb>
@@ -362,34 +327,42 @@ gzip -d &lt; &fullrelvers;.tgz | tar vxf -
 ]]>
 ]]>
 
+<!--
 <![ %prevrelwasupdate; [
 Patches might also be available relative to &prevrelvers;.  If so, the
 instructions for applying them are the same, except that you should start 
 with a clean &prevrelvers; source tree.
 ]]>
-
-The contrib part of the distribution was folded into the main source
-tree a while ago, so a separate contrib tarball is not required.
+-->
 
 To format the XFree86 documentation use the latest version of our doctools
-package available as <tt>doctools-&doctoolsvers;.tgz</tt>.
+package available from the XFree86 CVS repository's "doctools" module,
+and from our <url name="ftp site"
+url="ftp://ftp.xfree86.org/pub/XFree86/misc/doctools-&doctoolsvers;.tgz">.
 ]]>  <!-- fullrel -->
 
-The XFree86 source code can also be accessed via the XFree86 CVS repository.
+The XFree86 source code for this and all releases/snapshots as well as
+development versions can also be accessed via the XFree86 CVS repository.
 Information about accessing this can be found at the <url name="CVS page"
 url="http://www.xfree86.org/cvs/"> on our web site.  It's also possible
 to browse the XFree86 CVS repository at our <url name="CVSWeb server"
-url="http://cvsweb.xfree86.org/">.
+url="http://cvsweb.xfree86.org/">.  The CVS tag for this version is
+"&reltag;".
+<![ %notsnapshot [
+The CVS tag for the stable branch for this release is "&relbranchtag;".
+]]>
+To check out the latest development version, don't specify any tag.
+
 
 <sect>Reporting Bugs
 <p>
 
 Bugs should be reported to <email>XFree86@XFree86.org</email>.  Before
-reporting bugs, please check the X server log file, which can be found
-at <tt>/var/log/XFree86.0.log</tt> on most platforms.  If you can't
-resolve the problem yourself, send the entire log file with your bug
-report but not the operating system core dump.  Do not edit  the log
-file as our developers use it to reproduce and debug your problem.
+reporting bugs, please check the XFree86 server log file, which can be
+found at <tt>/var/log/XFree86.0.log</tt> on most platforms.  If you
+can't resolve the problem yourself, send the entire log file with your
+bug report but not the operating system core dump.  Do not edit  the
+log file as our developers use it to reproduce and debug your problem.
 
 
 
diff --git a/xc/programs/Xserver/hw/xfree86/doc/sgml/RELNOTES.sgml b/xc/programs/Xserver/hw/xfree86/doc/sgml/RELNOTES.sgml
index cc5965009..4fb915d06 100644
--- a/xc/programs/Xserver/hw/xfree86/doc/sgml/RELNOTES.sgml
+++ b/xc/programs/Xserver/hw/xfree86/doc/sgml/RELNOTES.sgml
@@ -6,10 +6,10 @@
 
 <title>Release Notes for XFree86&trade; &relvers;
 <author>The XFree86 Project, Inc
-<date>17 January 2002
+<date>26 February 2003
 
 <ident>
-$XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/RELNOTES.sgml,v 1.71 2002/01/21 19:01:35 dawes Exp $
+$XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/RELNOTES.sgml,v 1.81 2003/02/27 00:45:05 dawes Exp $
 </ident>
 
 <abstract>
@@ -21,6 +21,8 @@ in XFree86 &relvers; and their status.
 
 <toc>
 
+<p>
+
 <sect>Introduction to the 4.x Release Series
 <p>
 XFree86 4.0 was the first official release of the new XFree86 4 series.
@@ -32,35 +34,39 @@ is the latest full release in that series.
 The current release (&relvers;) is the latest in that series.
 ]]>
 XFree86
-4 represents a significant redesign of the XFree86 X server.
-Not all of the hardware drivers from 3.3.x have been ported to 4.x yet,
-but conversely, 4.x has some hardware support not present in 3.3.x.
-Our <htmlurl name="Driver Status document" url="Status.html"> summarizes
-how the hardware driver support compares between &legacyvers; and &relvers;.
-Please check there first before downloading &relvers;.
+4 represents a significant redesign of the XFree86 X server.  Not all
+of the hardware drivers from 3.3.x have been ported to 4.x yet, but
+conversely, 4.x has support for a lot of hardware that is not supported
+in 3.3.x.  Our <htmlurl name="Driver Status document" url="Status.html">
+summarizes how the hardware driver support compares between &legacyvers;
+and &relvers;.  Please check there first before downloading &relvers;.
 
 The 4.0.1 release introduced a new graphical configuration tool,
 "<tt>xf86cfg</tt>", and a text mode interface was added to it for the
-4.0.2 release.  It is work in progress, but definitely worth trying out.
-The trusty old text-based tool "<tt>xf86config</tt>" can also be used
-for generating X server config files.  In addition to these tools, we've
-been working on a configuration tool that is built-in to the X
-server.  It is included in the release, and it works well for some
-hardware.  To try it out, just run (as root) "<tt>XFree86 -configure</tt>".
+4.0.2 release.  It is the preferred configuration tool provided by with
+XFree86.  The trusty old text-based tool "<tt>xf86config</tt>" can also
+be used for generating X server config files.  In addition to these
+tools, the XFree86 server has some built in capabilities for generating
+a base config file.  This works well for most hardware, and in most
+cases is the easiest way to get an initial config file.  To try it out,
+just run (as root):
+
+<tscreen><verb>
+XFree86 -configure
+</verb></tscreen>
+
 Each of these configuration options will give you a reasonable starting
 point for a suitable configuration file.  We've put some effort into
 documenting the &relvers; config file format, and you can find that
-information in the XF86Config manual page. Check that, the driver manual
-pages and the related documentation for further information.
+information in the <htmlurl name="XF86Config manual page"
+url="XF86Config.5.html">.  Check there and the driver-specific manual
+pages and the related documentation for further information.  References
+to this driver-specific information can be found in the <ref id="drivertables"
+name="tables below">.
 
-<!--
-Oh, another thing you might notice is that our documentation is rather
-patchy.  Most of what is present should be in reasonable shape, but
-there are gaps.  We thought it better to leave out docs that were very
-out of date rather than providing inaccurate and misleading information.
-We are looking for people to also help fill those gaps in &lt;hint hint
-:-&gt;.
--->
+We have plans to make the configuration file optional in a future release.
+The XFree86 server is close to being able to automatically determine
+a complete base configuration for most popular hardware configurations.
 
 Before you go to download and install the binary distributions for
 this release, please have a quick read through the <htmlurl
@@ -94,38 +100,37 @@ don't have enough space to cover them all here.
 
 <p>
 <itemize>
-<item> An s3 driver is added, which provides support for many of the
-	older non-ViRGE and non-Savage S3 chipsets.
-<item> Some vmware driver problems are fixed, and the driver is updated
-	to take advantage of VMWare Workstation 3.0 features.  These
-	include improved hardware cursor handling and support for 8 bit
-	emulation.
-<item> Support added for Trident *BladeXP chipsets (currently not-accelerated).
-<item> Xv support added for Trident TGUI series chips (not 9440 though).
-<item> Support added for the older Trident chipsets again for ISA/VLBus (not tested)
-<item> Support added to the glint driver for 3DLabs Permedia4, GLINT R4 and
-	Gamma 2 chipsets.
-<item> Support added to the i810 driver for Intel i830 (tested on Linux only).
-<item> Support added to the ATI radeon driver for Radeon 7500 (2D and 3D),
-	Radeon 8500 (2D only), and Rage128ProII.
-<item> Support added for the Matrox G550 support.  This included dual-head
-	support.
-<item> Support added for NVIDIA nForce integrated graphics.
-<item> The NVIDIA nv driver now has preliminary powerpc support for the
-	NV11 and NV20.
-<item> Support added to the NVIDIA nv driver for interlaced modes on
-	hardware that supports this, and support for resolutions higher
-	than 1600x1200.
-<item> Fixes for the savage driver on 64-bit platforms, XVideo support for the
-	SuperSavage, and other savage driver updates.
-<item> The ATI r128 driver now uses the CCE DMA engine for 2D acceleration
-	when direct rendering is enabled, which reduces context switching
-	overhead and improves stability and performance for XVideo and some 2D
-	operations.
-<item> The fbdev driver now supports rotation.
-<item> Various updates to the apm, ark, chips (C&amp;T), cirrus, i128,
-	neomagic, newport, s3virge, siliconmotion, sis, tdfx, tseng, vesa,
-	and vga drivers.
+<item> ATI Radeon 9x00 2D support added, and 3D support added for the
+	Radeon 8500, 9000, 9100, and M9.  The 3D support for the Radeon
+	now includes hardware TCL.
+
+<item> Support added to the i810 driver for Intel 845G, 852GM, 855GM
+	and 865G integrated graphics chipsets, including 2D, 3D (DRI)
+	and XVideo.  Support for the 830M has been improved, and XVideo
+	support added.
+
+<item> National Semiconductor SC1x00, GX1, and GX2 chipset support added
+	with the "nsc" driver.
+
+<item> Support added for the NVIDIA nForce2 integrated graphics, GeForce 4,
+	and GeForce FX.
+
+<item> Major SiS driver updates for some of the latest chipsets.  Unfortunately
+	the SiS 3D driver has had to be disabled because no one has yet
+	taken up the challenge to port it to Mesa 4.x.
+
+<item> The s3virge driver now has support for double scan modes on the DX
+	(with XVideo disabled).
+	
+<item> Updates to the savage driver, including fixing problems with the
+	TwisterK, and problems with incorrect memory size detection.
+
+<item> 2D acceleration added for the Trident CyberBladeXP/Ai1 chipsets.
+
+<item> Support for big endian architectures has been added to the C&amp;T
+	driver.
+
+<item> Various updates and bug fixes have been made to most other drivers.
 
 </itemize>
 
@@ -133,98 +138,130 @@ don't have enough space to cover them all here.
 
 <p>
 <itemize>
-<item> The mouse driver now has support for mouse wheel emulation.
-<item> The mouse driver can now handle replug events on Linux for PS/2 mice.
-<item> The "Min/Max X/Y Position" options in the elographics and mutouch
-	drivers are changed to "Min/Max X/Y" to be consistent with the other
-	input drivers.
-<item> Linux USB keyboard access is fixed when no PS/2 controller is present.
-<item> Added calcomp input driver.
-<item> Added DMC input driver.
-<item> Added hyperpen input driver.
+<item> The mouse driver now has automatic protocol detection for PS/2 mice.
+
+<item> Several new input drivers have been added, including tek4957,
+	jamstudio (js_x), fpit, palmax, and ur98 (Linux only).
 </itemize>
 
 <sect1>X Server and Extension Updates
 
 <p>
 <itemize>
-<item> Resynced with X.Org's X11R6.6.
-<item> Mesa updated to the post-3.4.2 3.4 branch version as of November 2001.
-<item> DRI drivers resynced with the latest from the DRI project.
-<item> Various updates to the Xft library.
-<item> The DEC-XTRAP extension is now available.
-<item> The PEX and XIE extensions are no longer built/distributed by default.
-<item> A security problem related to glyph clipping for large origins is fixed.
-<item> An i810 XvMC (motion compensation) driver is now available (Linux only).
-<item> A fatal bug XVideo Xineramification bug is fixed.
+<item> Support for the RandR extension has been partially integrated
+	into the XFree86 server, providing support for resizing the root
+	window at run-time.
+
+<item> The Mesa version used for OpenGL&reg; 1.3 and DRI 
+	driver support has been updated to 4.0.4.
+
+<item> The XFree86 server's hot keys (including those for switching
+	modes and virtual terminals) can now be configured via XKB.
+	Previously they were hard coded.  An X server configuration
+	option has been added to allow the VT switching hot keys to be
+	disabled.
+
 </itemize>
 
 <sect1>Client and Library Updates
 
 <p>
 <itemize>
-<item> FreeType2 updated to version 2.0.6.
-<item> Added libGL man pages.
-<item> Xload now has support for displaying the load of remote hosts.
-<item> Xterm updated to patch level 165.
-<item> SuperProbe is removed.
-<item> Sample xtrap clients added.
+<item> An Xcursor library providing support for alpha blended (ARGB)
+	and animated cursors.  Two Xcursor themes are provided (redglass
+	and whiteglass), as well as the default "core" theme (the traditional
+	cursors).
+
+<item> Xterm updated to patch level 173, including the following bugfixes:
+	<itemize>
+	<item> Fix two infinite loops (special cases of mouse hilite tracking,
+		DECUDK parsing).
+	<item> Make repainting of the 256-color example work properly.
+	<item> Modify parser tables to improve detection of malformed
+		control sequences, making xterm behave more like a real
+		DEC terminal.
+	<item> Fix a problem with the blinking cursor which occasionally caused
+		xterm to pause until a key was pressed.
+	<item> Fix improper parsing of multiple items in the ttyModes resource.
+
+	</itemize>
+	and the following improvements:
+	<itemize>
+	<item> Modify xterm to invoke luit.
+	<item> Add simple session management client capabilities.
+	<item> Add a modifyCursorKeys resource to control how the shift- and
+		similar modifiers are used to make a cursor escape sequence.
+	<item> Check if the printerCommand resource string is empty,
+		and use this to allow the user to disable printer function.
+	<item> Sort the options list which is displayed in help- and
+		syntax-messages at runtime to simplify maintenance.
+	</itemize>
+
 </itemize>
 
 <sect1>I18N and Font Updates
 
 <p>
 <itemize>
-<item> New Luxi scalable fonts (TrueType and Type&nbsp;1) from Bigelow &amp;
-	Holmes.
-	These fonts are original designs by Kris Holmes and Charles Bigelow.
-	See <ref id="luxi" name="below"> for further information.
-<item> More locale/international keyboards supported.
-<item> Modularized I18N support in Xlib is included from X11R6.6.
-<item> A problem that caused bdftopcf to sometimes write corrupted fonts
-	is fixed.
-<item> Some problem with Xlib's handling of CTEXT and multi-byte
-	characters are fixed.
-<item> The fontenc layer is updated, and the fontenc library is now installed
-	and available for other applications.
-<item> Improvements to the input method framework in Xlib for UTF-8 locales.
-<item> A filter called ``luit'' is added, which provides locale and
-	ISO&nbsp;2022 support to any Unicode terminal, notably xterm.
-	Use of luit is still experimental in this release.
+<item> FreeType2 updated to version 2.1.1.
+
+<item> The "freetype" X server font backend has undergone a partial rewrite.
+	The new version is based on FreeType 2, and handles TrueType
+	(including OpenType/TTF), OpenType/CFF and Type 1 fonts.  The old
+	"type1" backend is now deprecated, and is only used for CIDFonts
+	by default.
+
+<item> A new utility called "mkfontscale", which builds fonts.scale files,
+	has been added.
+
+<item> The Xft library has undergone a major restructuring, and is now
+	split into fontconfig (which deals with font discovery and
+	configuration and is independent from X), and Xft itself (which
+	uses fontconfig and deals with font rasterisation and rendering.
+	The format of the Xft font configuration files has changed in
+	an incompatible manner.
+
+<item> Support has been added to the Xft library to do rendering with the
+	core X11 protocol.  This allows clients using this library to
+	render to X servers that don't have support for the RENDER extension.
+
+<item> There has been a significant reworking of the XKB support to allow
+	multi-layout configurations.  Multi-layout configurations provide
+	a flexible way of supporting multiple language layouts and switching
+	between them.
+
 </itemize>
 
 <sect1>OS Support Updates
 
 <p>
 <itemize>
-<item> Build problems on both QNX4 and QNX6 are fixed.
-<item> VT switching problems with the i810 driver on FreeBSD are worked around.
-<item> Problems building modules with some enhanced versions of gcc are fixed.
-<item> Lots of updates for Darwin/Mac OS X, including:
+<item> Updates for Darwin/Mac OS X, including:
 	<itemize>
-	<item> On Mac OS X, a new rootless mode is added to the XDarwin
-		X server.  This allows X clients to display windows on
-		the Aqua desktop.
-	<item> Xinerama support added to XDarwin
-	<item> With XDarwin in full screen mode, the depth, size, and refresh
-		rate can now be chosen to be different from the settings
-		used by Aqua.
-	<item> GLX support added for Darwin and Mac OS X with software
-		rendering.
-	<item> Keymap setup in XDarwin is improved, particularly for
-		international keyboards.
-	<item> In addition to English and Japanese, the XDarwin user
-		interface is now localized in Dutch, French, German, Spanish,
-		and Korean.
+	<item> Indirect GLX acceleration added.
+	<item> Smaller memory footprint and faster 2-D drawing in rootless
+		mode.
+	<item> Full screen mode now uses shadowfb for much faster 2-D drawing.
+	<item> Native fonts can be used on MacOS X.
 	</itemize>
-<item> Lots of Cygwin support updates.
-<item> Support added for OpenBSD/powerpc.
-<item> Build support added for Linux on IBM S/390.
-<item> Removed stale support for Amoeba and Minix.
-<item> Client-side support added for sparc64 on NetBSD and OpenBSD.
-<item> Support added for building the X server on Linux/m68k.
-<item> Support added for building on Linux/arm32.
-<item> Updates to Linux/mips support.
+
+<item> Various Cygwin support updates, including an experimental rootless
+	X server for Cygwin/XFree86.
+
+<item> AMD x86-64 support (primarily for Linux so far) has been added.
+
+<item> Support added for OpenBSD/sparc64.
+
+<item> Major OS/2 support updates.
+
+<item> Major SCO OpenServer updates.
+
+<item> Multi-head support has been added for 460GX-based Itanium systems,
+	and for ZX1-based Itanium2 systems.
+
+<item> Experimental support for SunOS/Solaris on UltraSPARC systems.
+
+
 </itemize>
 
 A more complete list of changes can be found in the CHANGELOG that is
@@ -237,7 +274,7 @@ url="http://cvsweb.xfree86.org/cvsweb/xc/programs/Xserver/hw/xfree86/CHANGELOG?r
 <p>
 -->
 
-<sect>Drivers
+<sect>Drivers<label id="drivertables">
 <p>
 
 <sect1>Video Drivers
@@ -255,7 +292,8 @@ XFree86 &relvers; includes the following video drivers:
    <tabrow><tt>ati</tt><colsep>ATI<colsep><htmlurl
 		name="README.ati" url="ati.html">, <htmlurl
 		name="README.r128" url="r128.html">, <htmlurl
-		name="r128(4)" url="r128.4.html"></tabrow>
+		name="r128(4)" url="r128.4.html">, <htmlurl
+		name="radeon(4)" url="radeon.4.html"></tabrow>
    <tabrow><tt>chips</tt><colsep>Chips &amp; Technologies<colsep><htmlurl
 		name="README.chips" url="chips.html">, <htmlurl
 		name="chips(4)" url="chips.4.html"></tabrow>
@@ -273,7 +311,7 @@ XFree86 &relvers; includes the following video drivers:
 		name="i128(4)" url="i128.4.html"></tabrow>
    <tabrow><tt>i740</tt><colsep>Intel i740<colsep><htmlurl
 		name="README.i740" url="i740.html"></tabrow>
-   <tabrow><tt>i810</tt><colsep>Intel i810<colsep><htmlurl
+   <tabrow><tt>i810</tt><colsep>Intel i8xx<colsep><htmlurl
 		name="README.i810" url="i810.html">, <htmlurl
 		name="i810(4)" url="i810.4.html"></tabrow>
    <tabrow><tt>imstt</tt><colsep>Integrated Micro Solns<colsep>&nbsp;</tabrow>
@@ -284,6 +322,8 @@ XFree86 &relvers; includes the following video drivers:
    <tabrow><tt>newport</tt> (-)<colsep>SGI Newport<colsep><htmlurl
 		name="README.newport" url="newport.html">, <htmlurl
 		name="newport(4)" url="newport.4.html"></tabrow>
+   <tabrow><tt>nsc</tt><colsep>National Semiconductor<colsep><htmlurl
+		name="nsc(4)" url="nsc.4.html"></tabrow>
    <tabrow><tt>nv</tt><colsep>NVIDIA<colsep><htmlurl
 		name="nv(4)" url="nv.4.html"></tabrow>
    <tabrow><tt>rendition</tt><colsep>Rendition<colsep><htmlurl
@@ -298,7 +338,8 @@ XFree86 &relvers; includes the following video drivers:
    <tabrow><tt>siliconmotion</tt><colsep>Silicon Motion<colsep><htmlurl
 		name="siliconmotion(4)" url="siliconmotion.4.html"></tabrow>
    <tabrow><tt>sis</tt><colsep>SiS<colsep><htmlurl
-		name="README.SiS" url="SiS.html"></tabrow>
+		name="README.SiS" url="SiS.html">, <htmlurl
+		name="sis(4)" url="sis.4.html"></tabrow>
    <tabrow><tt>sunbw2</tt> (+)<colsep>Sun bw2<colsep>&nbsp;</tabrow>
    <tabrow><tt>suncg14</tt> (+)<colsep>Sun cg14<colsep>&nbsp;</tabrow>
    <tabrow><tt>suncg3</tt> (+)<colsep>Sun cg3<colsep>&nbsp;</tabrow>
@@ -306,7 +347,8 @@ XFree86 &relvers; includes the following video drivers:
    <tabrow><tt>sunffb</tt> (+)<colsep>Sun Creator/3D, Elite 3D<colsep>&nbsp;</tabrow>
    <tabrow><tt>sunleo</tt> (+)<colsep>Sun Leo (ZX)<colsep>&nbsp;</tabrow>
    <tabrow><tt>suntcx</tt> (+)<colsep>Sun TCX<colsep>&nbsp;</tabrow>
-   <tabrow><tt>tdfx</tt><colsep>3Dfx<colsep>&nbsp;</tabrow>
+   <tabrow><tt>tdfx</tt><colsep>3Dfx<colsep><htmlurl
+		name="tdfx(4)" url="tdfx.4.html"></tabrow>
    <tabrow><tt>tga</tt><colsep>DEC TGA<colsep><htmlurl
 		name="README.DECtga" url="DECtga.html"></tabrow>
    <tabrow><tt>trident</tt><colsep>Trident<colsep><htmlurl
@@ -355,16 +397,29 @@ XFree86 &relvers; includes the following input drivers:
 		name="dmc(4)" url="dmc.4.html"></tabrow>
    <tabrow><tt>dynapro</tt><colsep>Dynapro<colsep>&nbsp;</tabrow>
    <tabrow><tt>elographics</tt><colsep>EloGraphics<colsep>&nbsp;</tabrow>
+   <tabrow><tt>elographics</tt><colsep>EloGraphics<colsep>&nbsp;</tabrow>
+   <tabrow><tt>fpit</tt><colsep>Fujitsu Stylistic Tablet PCs<colsep><htmlurl
+		name="fpit(4)" url="fpit.4.html"></tabrow>
    <tabrow><tt>hyperpen</tt><colsep>HyperPen<colsep>&nbsp;</tabrow>
+   <tabrow><tt>js_x</tt><colsep>JamStudio pentablet<colsep><htmlurl
+		name="js_x(4)" url="js_x.4.html"></tabrow>
+   <tabrow><tt>kbd</tt><colsep>generic keyboards (alternate)<colsep><htmlurl
+		name="kbd(4)" url="kbd.4.html"></tabrow>
    <tabrow><tt>keyboard</tt><colsep>generic keyboards<colsep><htmlurl
 		name="keyboard(4)" url="keyboard.4.html"></tabrow>
    <tabrow><tt>microtouch</tt><colsep>MicroTouch<colsep>&nbsp;</tabrow>
    <tabrow><tt>mouse</tt><colsep>most mouse devices<colsep><htmlurl
 		name="mouse(4)" url="mouse.4.html"></tabrow>
    <tabrow><tt>mutouch</tt><colsep>MicroTouch<colsep>&nbsp;</tabrow>
+   <tabrow><tt>palmax</tt><colsep>Palmax PD1000/PD1100<colsep><htmlurl
+		name="palmax(4)" url="palmax.4.html"></tabrow>
    <tabrow><tt>penmount</tt><colsep>PenMount<colsep>&nbsp;</tabrow>
    <tabrow><tt>spaceorb</tt><colsep>SpaceOrb<colsep>&nbsp;</tabrow>
    <tabrow><tt>summa</tt><colsep>SummaGraphics<colsep>&nbsp;</tabrow>
+   <tabrow><tt>tek4957</tt><colsep>Tektronix 4957 tablet<colsep><htmlurl
+		name="tek4957(4)" url="tek4957.4.html"></tabrow>
+   <tabrow><tt>ur98(*)</tt><colsep>Union Reality UR-F98 headtracker<colsep><htmlurl
+		name="ur98(4)" url="ur98.4.html"></tabrow>
    <tabrow><tt>void</tt><colsep>dummy device<colsep><htmlurl
 		name="void(4)" url="void.4.html"></tabrow>
    <tabrow><tt>wacom</tt><colsep>Wacom tablets<colsep><htmlurl
@@ -372,6 +427,8 @@ XFree86 &relvers; includes the following input drivers:
 </tabular>
 </table>
 
+Drivers marked with (*) are available for Linux only.
+
 <sect>Overview of XFree86 4.x.
 <p>
 Unlike XFree86 3.3.x where there are multiple X server binaries, each
@@ -534,7 +591,7 @@ EndSection
 	The new option <tt>AllowDeactivateGrabs</tt> allows deactivating
 	any active grab with the key sequence <tt>Ctrl+Alt+Keypad-Divide</tt>
 	and the new option <tt>AllowClosedownGrabs</tt> allows closing the
-	conection to the grabbing client with the key sequence
+	connection to the grabbing client with the key sequence
 	<tt>Ctrl+Alt+Keypad-Multiply</tt>. Note that these options are off
 	by default as they allow users to remove the grab used by screen
 	saver/locker programs.
@@ -617,8 +674,9 @@ Section "ServerLayout"
 EndSection
 </verb></quote>
 
-See the XF86Config man page for a more detailed explanation of the format
-of the new ServerLayout section.
+See the <htmlurl name="XF86Config(5)" url="XF86Config.5.html"> man page
+for a more detailed explanation of the format of the new ServerLayout
+section.
 
 
 </itemize>
@@ -949,33 +1007,15 @@ configuring XFree86 to use an existing FreeType installation.
 The Xft library uses a configuration file, <tt>XftConfig</tt>, which
 contains information about which directories contain font files and also
 provides a sophisticated font aliasing mechanism.  Documentation for that
-file is included in the Xft man page.
+file is included in the <htmlurl name="Xft(3)" url="Xft.3.man"> man page.
 
 </sect2>
 <sect2>FreeType support in Xft
 <p>
 
-XFree86 &relvers; includes sources for FreeType version 2.0.6, and, by
+XFree86 &relvers; includes sources for FreeType version 2.1.1, and, by
 default, they are built and installed automatically.
 
-<p>
-
-If you prefer, you can configure XFree86 &relvers; to use an existing
-Freetype2 installation by telling XFree86 not to build the internal copy and
-indicating where that external version has been installed. Edit (or create)
-<tt>config/cf/host.def</tt> to include:
-
-<itemize>
-	<item><tt>#define BuildFreetype2Library NO</tt>
-	<item><tt>#define Freetype2Dir /usr/local</tt>
-</itemize>
-
-Note that XFree86 assumes you'll be using a release FreeType no older than
-version 2.0.1.  Early FreeType version 2 releases used a different header file 
-installation and aren't compatible with XFree86. Instructions for building and
-installing FreeType can be found in the <tt>INSTALL</tt> file included with
-the FreeType release.
-
 </sect2>
 
 <sect2>Application Support For Anti-Aliased Text
@@ -1024,143 +1064,18 @@ new features should be completed in a future release.
 <p>
 -->
 
-<sect1>Xaw
-<p>
-
-Two versions of the Xaw library are provided with XFree86 4.x. A version with
-bug fixes and a few binary compatible improvements and a new version with
-several new features.
-
-New features:
-
-<itemize>
-
-  <item>A <tt>displayList</tt> resource is available to all Xaw widgets. It
-	basically consists of a list of drawing commands, fully described in
-	the <tt>Xaw(3)</tt> manual page, that enables a integration of Xaw
-	programs with the new window/desktop managers that allows for
-	configurable themes.
-
-  <item>Some new actions were added to all Xaw widgets, to allow more
-	configurable control of the widgets, and to allow setting resources
-	at run time.
-
-  <item>Since Xpm was integrated into XFree86, programs linked with the
-	new Xaw library	will also link with Xpm. This allows for color
-	background pixmaps, and also for shaped widgets.
-
-  <item>The text widget is the widget that will present more changes. These
-	include:
-
-	<itemize>
-
-	  <item>Block cursor.
-
-	  <item>Compile time limit of 16384 undo/redo levels (that will
-		automatically grow if the text is not saved when this mark is
-		reached).
-
-	  <item>Overwrite mode.
-
-	  <item>Text killed is inserted in a kill ring list, this text is not
-		forgotten, pressing <tt>M-y</tt> allows traversing the kill
-		ring list.
-
-	  <item>International support for latin languages is available even
-		if the <tt>international</tt> resource is not set. Users will
-		need to properly set the <it>locale</it> environment to make
-		complete use of this feature.
-
-	  <item>A better <tt>multiply</tt> interface is provided. Pressing
-		<tt>C-u,&lt;number&gt;</tt> (where number can be negative)
-		allows passing parameters for text actions.
-
-	  <item>Text can be formatted to have left, right, center or full
-		justification.
-
-	  <item>Text indentation support is also available.
-
-	</itemize>
-
-</itemize>
-
-Bug fixes:
-
-<itemize>
-
-  <item>The simple menu widget geometry management code was improved to solve
-	problems with menu entries not visible in the screen.
-
-  <item>The form widget geometry code was changed to solve problems with integer
-	round problems in the child widgets geometry when resizing the parent
-	form widget.
-
-  <item>Several bugs were fixed in the text code, while some code was rewritten
-	from scratch.
-
-</itemize>
-
-<p>
-
-<sect1>Xpm
-<p>
-
-Version 3.4k of the Xpm (X pixmap) library is now integrated into XFree86.
-
 <sect1>xedit
 <p>
 
-Xedit have been changed to use most of the new features added to the new
-version of the Xaw library, and some xedit only features were added. Emacs
-users will find that several of the emacs key bindings work with the new
-version of xedit. These include:
-
+Xedit has several new features, including:
 <itemize>
-
-  <item>File name tab completion. Including a <it>Emacs dired</it> like window,
-	that will be shown when there are more than one match, when
-	<tt>C-x,d</tt> is pressed, or when a directory name is specified.
-
-  <item>An unlimited number of files can be edited at the same time. Including
-	multiple views of the same or different files.
-
-  <item>The line number of the cursor position is always visible. It can also
-	be customized to show the column number, the position offset and the
-	current size of the file.
-
-  <item>There is an <tt>autoReplace</tt> resource, that enables automatic text
-	replacement at the time text is typed. This feature is useful to create
-	simple macros, or to correct common spelling errors.
-
-  <item>A fully featured ispell interface is also available. This interface
-	is expected to provide most of the features of the terminal interface
-	of the ispell program, with some extra features that include:
-
-	<itemize>
-
-	  <item>A compile time limit of 16 undo levels.
-
-	  <item>Terse mode switch.
-
-	  <item>Dictionary change.
-
-	  <item>The interface also checks for repeated words.
-
-	</itemize>
-
-  <item>A first tentative to add programming modes was done. Currently, there
-	is one mode:
-	<itemize>
-
-	  <item><bf>C-mode:</bf> this mode is expected to be stable, and fully
-		usable.
-	</itemize>
-
+  <item>An embedded lisp interpreter that allows easier extension of the editor.
+  <item>Several new syntax highlight modes, and indentation rules for C and Lisp.
+  <item>Flexible search/replace interface that allows regex matches.
+  <item>Please refer to <tt><htmlurl name="xedit(1)" url="xedit.1.html"></tt>
+	for more details.
 </itemize>
 
-<p>
-
-
 <!--
 <sect>Fonts and Internationalisation
 <p>
diff --git a/xc/programs/Xserver/hw/xfree86/doc/sgml/SCO.sgml b/xc/programs/Xserver/hw/xfree86/doc/sgml/SCO.sgml
index 17b376a36..b13bde41b 100644
--- a/xc/programs/Xserver/hw/xfree86/doc/sgml/SCO.sgml
+++ b/xc/programs/Xserver/hw/xfree86/doc/sgml/SCO.sgml
@@ -4,11 +4,11 @@
 <!-- TitleS information -->
 
 <title>Information for SCO OpenServer Users
-<author>J. Kean Johnston (jkj@caldera.com)
-<date>22 January 2002
+<author>J. Kean Johnston (jkj@sco.com)
+<date>14 February 2003
 
 <ident>
-$XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/SCO.sgml,v 3.20 2002/06/03 21:22:09 dawes Exp $
+$XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/SCO.sgml,v 3.22 2003/02/17 18:58:07 dawes Exp $
 </ident>
 
 <!-- Table of contents -->
@@ -21,23 +21,46 @@ $XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/SCO.sgml,v 3.20 2002/06/03 21:
 Before you can either compile or execute a binary distribution of
 XFree86, the following conditions must be met:
 <itemize>
-  <item>Ensure that you are running Release 5.0.5 or later. This is required
+  <item>Ensure that you are running Release 5.0.4 or later. This is required
     because OSS646 is only supported on those platforms. There are no plans
     to support XFree86 on earlier releases of OpenServer.
-  <item>Ensure OSS646, the ``Linkers and Libraries Update'' package is
+  <item>Ensure that OSS646, the ``Execution Environment Update'' package is
     installed, if appropriate.  Check the release notes for that update
     to see whether or not your current operating system requires this
-    update.  This supplement will be available to the public in March
-    2002.
-  <item>To compile XFree86, you must use the Caldera-supported version of
+    update.  This supplement will be available to the public in February
+    2003.
+  <item>Ensure that OSS631, the "Graphics, Web and X11 Libraries" package
+    is installed.  This ships standard with release 5.0.7 and later, and
+    is only required for 5.0.[456] users.  This package will be updated fairly
+    frequently, and it us always suggested you have the latest possible
+    version installed.  At some point in the future it may even update the
+    libraries in 5.0.7, so it is worth checking the release notes for this
+    supplement.
+  <item>To compile XFree86, you must use the SCO-supported version of
     the GNU C Compiler.  It is possible that Skunkware versions of the
     compiler will work too, but this has not been tested.  The ``GNU
     Development System'' is available for all releases from (and including)
     SCO OpenServer Release 5.0.5.  It is provided with the operating system
     in all versions from Release 5.0.7, although you need to run ``custom''
     to install it from the media.  You can always download the latest
-    latest version of the GNU Development System from the Caldera Web
-    site at <tt>http://www.caldera.com</tt>.
+    latest version of the GNU Development System from the <url
+    name="SCO Web site" url="http://www.sco.com">.
+  <item>If you are not using OSR 5.0.7 or later, you need to get an updated
+    console driver.  See <url url="http://www.sco.com"> for details on
+    OpenServer supplements.  If you can't or don't want to upgrade your
+    console driver, XFree86 will still compile, but you may run into
+    problems with some cards such as the Riva TNT and ATI Rage cards.
+    The problem with the console driver in 5.0.6A and earlier is that
+    when the X server sets graphics mode, the driver does not set a
+    status bit, so any text that is sent directly to <tt>/dev/console</tt>,
+    such as kernel warning or notice messages when you access tape drives
+    or NFS notices, will be sent to the console video memory.  This just
+    happens to be slap bang in the middle of palette data for the Riva
+    TNT, so you get color map corruption.  The updated console driver
+    also has an improved mechanism for allocating video memory that
+    XFree86 detects at compile time, and it will use it if it exists.
+    It is STRONGLY recommended that you get the console driver update.
+
 </itemize>
 
 <sect>Compiling XFree86<p>
@@ -71,6 +94,9 @@ To actually start the compilation, perform the following steps:
   <item>If the build succeeded, install the new server by executing the
     command <tt>make install 2&gt;&amp;1 | tee install.log</tt> as root.
     This will send the install results to the file <tt>install.log</tt>.
+
+  <item>If you want to install the manual pages, execute the command
+    <tt>make install.man 2&gt;&amp;1 | tee -a install.log</tt> as root.
 </itemize>
 
 <sect>Before Running XFree86<p><label id="sec-runxf86">
@@ -79,15 +105,13 @@ The SCO <tt/xterm/ terminfo description is not compatible with the <tt/xterm/
 in the R5 distribution.<p>
 
 To use a Bus/Keyboard or PS2 mouse you should configure the mouse drivers
-under SCO as above using '<tt>mkdev mouse</tt>'. You may then use the 
-<tt>OsMouse</tt> option
-in your XF86Config to specify that XFree86 should use the SCO mouse drivers.
-To do this, set the <tt>Protocol</tt> to "<tt>OsMouse</tt>" in the 
-Pointer section of your
-XF86Config file.  You can also use "<tt>OsMouse</tt>" for your 
-serial mouse,
-especially if you are having trouble getting your mouse to work using the
-XFree86 mouse drivers.<p>
+using '<tt>mkdev mouse</tt>'.  You may then use the 
+<tt>OsMouse</tt> option in your <tt>XF86Config</tt> to specify that XFree86
+should use the SCO mouse drivers.  To do this, set the <tt>Protocol</tt> to
+"<tt>OsMouse</tt>" in the <tt>Pointer</tt> section of your
+<tt>XF86Config</tt> file.  You can also use "<tt>OsMouse</tt>" for your 
+serial mouse, especially if you are having trouble getting your mouse to
+work using the XFree86 mouse drivers.<p>
 
 <sect>Switching Consoles<p>
 
@@ -98,18 +122,24 @@ you to console 1. <tt>Ctrl-Alt-FXX</tt>, where <tt>XX</tt> is a function
 key between <tt>F1</tt> and <tt>F12</tt> will switch you to the console
 number assigned to that function key. <tt>F1</tt> corresponds to
 <tt>tty01</tt> (or console 1), <tt>F2</tt> corresponds to <tt>tty02</tt>
-(or console 2) etc.  Those interested in modifying the console switching
-should look in <tt>xc/programs/Xserver/hw/xfree86/common/xf86Events.c</tt>.
+(or console 2) etc.<p>
+
+Unlike the SCO X server, the "kill me now" key is <tt>Alt+Ctrl+Backspace</tt>.
+This does not ask for confirmation, it simply kills the X server as
+immediately as possible.  Use with extreme caution.  This may cause
+applications to terminate in an unpredictable way.  You can set the
+<tt>DontZap</tt> option in the <tt>ServerFlags</tt> section of your
+<tt>XF86Config</tt> file to disable this.
 
 <sect>Setting up Man Pages<p>
 
 After compiling the tree, or after installing the binary distribution you
-can get man to recognise the XFree86 man pages by adding 
+can get <tt>man</tt> to recognise the XFree86 man pages by adding 
 <tt>/usr/X11R6/man</tt> to
 the <tt>MANPATH</tt> in <tt>/etc/default/man</tt>. The line should 
 look similar to:
 <tscreen><verb>
-    MANPATH=/usr/man:/usr/X11R6/man
+    MANPATH=/usr/man:/usr/gnu/man:/usr/X11R6/man:/usr/local/man
 </verb></tscreen>
 This allows all users to view the X man pages.  You may change your own
 <tt>MANPATH</tt> environment variable if you do not want everyone to access the
@@ -119,13 +149,17 @@ By default the man pages are compressed using ``<tt>compress</tt>'' to
 conserve space.  If you do not want to compress the man pages change
 <tt>CompressManPages</tt> to <tt>NO</tt> in your ``<tt>host.def</tt>''
 file.  Those using the binary distribution can use ``<tt>uncompress</tt>''
-to uncompress the man pages.
+to uncompress the man pages.  Binary distributions contain pre-formatted
+versions of all man pages.  If you are compiling the server yourself, you
+need to have the GNU Tools package installed to get groff, the GNU
+nroff replacement, to format the man pages.  Use the <tt>manroff</tt>
+script to format the manual pages yourself.
 
 <sect>Using SCO binaries/servers.<p>
 
 XFree86 will accept connections from SCO binaries (R3 upwards) and the
 SCO R5 server will also accept connections from XFree86 binaries. This
 means you may mix and match the two if you have ODT.  For example you may
-still use the Motif window manager (mwm) if you prefer.
+still use the Panning Motif window manager (pmwm) if you prefer.
 
 </article>
diff --git a/xc/programs/Xserver/hw/xfree86/doc/sgml/Solaris.sgml b/xc/programs/Xserver/hw/xfree86/doc/sgml/Solaris.sgml
index 97a48f082..8061af855 100644
--- a/xc/programs/Xserver/hw/xfree86/doc/sgml/Solaris.sgml
+++ b/xc/programs/Xserver/hw/xfree86/doc/sgml/Solaris.sgml
@@ -6,6 +6,10 @@
 <author>David Holland, modified by Marc Aurele La France
 <date>2001 October 01
 
+<ident>
+$XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/Solaris.sgml,v 1.4 2003/01/04 04:20:23 dawes Exp $
+</ident>
+
 <!-- Table of contents -->
 <toc>
 
@@ -208,10 +212,5 @@ reported!).
 It might even have broken some aspects of the x86 port.<p>
 </enum>
 <sect>Bug Notification<p>
-Bug reports should be sent to one of the <bf/XFree86@XFree86.org/,
-<bf>Xpert@XFree86.org</bf>, or <bf>Newbie@XFree86.org</bf> (depending on your
-level of comfort).
-<verb>
-$XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/Solaris.sgml,v 1.3 2002/01/25 21:55:53 tsi Exp $
-</verb>
+Bug reports should be sent to <email>XFree86@XFree86.org</email>.
 </article>
diff --git a/xc/programs/Xserver/hw/xfree86/doc/sgml/Status.sgml b/xc/programs/Xserver/hw/xfree86/doc/sgml/Status.sgml
index f491a90ed..297c135bb 100644
--- a/xc/programs/Xserver/hw/xfree86/doc/sgml/Status.sgml
+++ b/xc/programs/Xserver/hw/xfree86/doc/sgml/Status.sgml
@@ -6,10 +6,10 @@
 
 <title>Driver Status for XFree86&trade; &relvers;
 <author>The XFree86 Project, Inc
-<date>16 January 2002
+<date>23 February 2003
 
 <ident>
-$XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/Status.sgml,v 1.37 2002/01/16 20:38:45 dawes Exp $
+$XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/Status.sgml,v 1.43 2003/02/25 16:32:41 dawes Exp $
 </ident>
 
 <abstract>
@@ -17,8 +17,7 @@ $XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/Status.sgml,v 1.37 2002/01/16
 This document provides information about the status of the driver and
 hardware support in XFree86 &relvers; compared with that in XFree86
 &legacyvers;.  Please send updates for this document to
-<email>fixes@xfree86.org</email>.  Please do not send requests for
-information or support to that address (they will not be answered).
+<email>XFree86@XFree86.org</email>.
 
 </abstract>
 
@@ -369,17 +368,21 @@ other architectures known to work on (e.g., Alpha, PPC), etc.
 	than 1MB of video memory.
 
 <tag>&relvers;:</tag>
-	Support (accelerated) for the Intel i740 is provided by the "i740"
-	driver, and support for the Intel i810 (including i810-dc100 and
-	i810e), i815, and i830 is provided by the "i810" driver.  The
-	"i810" driver is currently supported only on Linux and FreeBSD (4.1
-	and later), and requires AGP GART kernel support.
+	Support (accelerated) for the Intel i740 is provided by the
+	"i740" driver, and support for the Intel integrated graphics
+	chipsets i810, i810-dc100, i810e, i815, 830M, 845G, 852GM, 855GM
+	and 865G is provided by the "i810" driver.  The i810 and i815
+	chipsets require kernel-level AGP GART support (available on
+	Linux, FreeBSD, and some other BSDs).  The 830M and later can
+	be used without AGP GART support, but it is required for full
+	functionality.
 
 <tag>Summary:</tag>
 	The i740 and and original i810 are supported in both versions, but
-	the i810 is supported only on Linux/x86 and recent FreeBSD/i386
-	platforms at present.  Support for later versions of the i810
-	chipset, such as the i815, exists only in &relvers;.
+	the i810/i815 is supported only on Linux, FreeBSD, and some recent
+	NetBSD/OpenBSD versions at present.  platforms at present.
+	Support for later versions of the i810 chipset, such as the
+	i815, and for the 830M and later exists only in &relvers;.
 
 </descrip>
 
@@ -420,6 +423,15 @@ other architectures known to work on (e.g., Alpha, PPC), etc.
 
 </descrip>
 
+<sect>National Semiconductor
+<p>
+<descrip>
+<tag>&relvers;:</tag>
+	Support for the SC1x00, GX1, and GX2 is provided by the "nsc"
+	driver.
+
+</descrip>
+
 <sect>NCR
 <p>
 <descrip>
@@ -624,14 +636,15 @@ other architectures known to work on (e.g., Alpha, PPC), etc.
 	by the XF86_SVGA server with the sis driver.
 
 <tag>&relvers;:</tag>
-	Support (accelerated) for the SiS <!-- 86C205, 86C215, 86C225, -->
-	<!-- 5597, 5598, --> 530, 620, 6326 is provided by the "sis" driver.
-	The 630, 300, and 540 are also supported, but this code is new and
-	there are some problems with it in this version.
+	Support (accelerated) for the SiS 5597, 5598, 6326, 530, 620,
+	300, 540, 630, 730, 315, 550, 650, 651 and 740 is provided by
+	the "sis" driver. The Xabre (SiS 330) might be supported by this
+	is completely untested.
 
 <tag>Summary:</tag>
-	Support for the 86C201, 86C202, 86C205, 86C215, 86C225, 5597 and 5598
-	is currently only available in &legacyvers;.
+	Support for the 86C201, 86C202, 86C205, 86C215 and 86C225 is
+	currently only available in &legacyvers;.  Support for some
+	newer chipsets is only available in &relvers;.
 
 </descrip>
 
@@ -702,9 +715,7 @@ other architectures known to work on (e.g., Alpha, PPC), etc.
 
 <tag>Summary:</tag>
 	The following (older) chipsets are supported in &legacyvers; and
-	not in &relvers;: TVGA8200LX, TVGA8800CS, TVGA8900B, TVGA8900C,
-	TVGA8900CL, TVGA9000, TVGA9000i, TVGA9100B, TVGA9200CXr,
-	TGUI9400CXi, TGUI9420, and TGUI9430DGi.
+	not in &relvers;: TVGA8200LX, TVGA8800CS, TGUI9420, TGUI9430DGi.
 
 	The TVGA8900B, TVGA8900C, TVGA8900CL, TVGA9000, TVGA9000i,
 	TVGA9100B, TVGA9200CXr, TGUI9400CXi, TGUI9440AGi, TGUI9660,
diff --git a/xc/programs/Xserver/hw/xfree86/doc/sgml/Versions.sgml b/xc/programs/Xserver/hw/xfree86/doc/sgml/Versions.sgml
index c84307280..4eea959f8 100644
--- a/xc/programs/Xserver/hw/xfree86/doc/sgml/Versions.sgml
+++ b/xc/programs/Xserver/hw/xfree86/doc/sgml/Versions.sgml
@@ -7,10 +7,10 @@
 
 <title>XFree86 Version Numbering Schemes
 <author>The XFree86 Project, Inc
-<date>16 January 2002
+<date>23 February 2003
 
 <ident>
-$XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/Versions.sgml,v 1.2 2002/01/16 20:38:45 dawes Exp $
+$XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/Versions.sgml,v 1.4 2003/02/24 03:41:23 dawes Exp $
 </ident>
 
 <abstract>
@@ -31,7 +31,7 @@ main development stream, where all new work and work for future releases
 is done.
 
 Second is the stable bugfix branch for the latest full release
-(&relvers;).  It is created around the time of the release.  The branch
+(&fullrelvers;).  It is created around the time of the release.  The branch
 for this one is called "<tt>&relbranchtag;</tt>".  Fixes for bugs found
 in the release will be added to this branch (as well as the trunk), and
 updates to this release (if any) will be cut from this branch.  Similar
@@ -44,19 +44,21 @@ security updates.  Relevant security updates in particular are usually
 back-ported to this branch.
 
 XFree86 is planning to make full releases from the main development
-stream approximately every six months, in late May and November of each
-year.  The feature freezes for these releases will be 1 April and 1
-October respectively.  These are target dates, not a binding commitment.
-How effectively these dates can be met will depend to a large degree on
-the resource available to XFree86.  Full releases consist of full source
+stream at regular intervals in the 6-12 month range.  The feature
+freezes for these releases will usually be 2-3 months before the release
+dates.  This general plan is a goal, not a binding commitment.  The
+actual release intervals and dates will depend to a large degree on the
+resource available to XFree86.  Full releases consist of full source
 code tarballs, plus full binary distributions for a range of supported
 platforms.  Update/bugfix releases will be made on an as-required basis,
-depending also on the availability of resources.  Update/bugfix releases
-will not be full releases, and will consist of source code patches, plus
-binary updates to be layered on top of the previous full release.
-
-The next full release will be version &nextfullrelvers;, tentatively scheduled for late &nextfullreldate;.
-There is no scheduled update release.  If there is one, the version will be
+depending also on the availability of resources, and will generally be
+limited to serious bug and security fixes.  New features will not usually
+be added in update releases.  Update/bugfix releases will not be full
+releases, and will consist of source code patches, plus binary updates
+to be layered on top of the previous full release.
+
+The next full release will be version &nextfullrelvers;.  There is no
+scheduled update release, but if one is needed, the version will be
 &nextupdrelvers;.
 
 <!--
diff --git a/xc/programs/Xserver/hw/xfree86/doc/sgml/XKB-Config.sgml b/xc/programs/Xserver/hw/xfree86/doc/sgml/XKB-Config.sgml
new file mode 100644
index 000000000..564fe03a1
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/doc/sgml/XKB-Config.sgml
@@ -0,0 +1,221 @@
+<!DOCTYPE linuxdoc PUBLIC "-//XFree86//DTD linuxdoc//EN">
+
+<article>
+<title>The XKB Configuration Guide
+<author>Kamil Toman, Ivan U. Pascal
+<date>25 November 2002
+
+<ident>
+$XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/XKB-Config.sgml,v 1.2 2003/02/25 19:31:02 dawes Exp $
+</ident>
+
+<abstract>
+This document describes how to configure XFree86 XKB from a user's point
+a few. It converts basic configuration syntax and gives also a few examples.
+</abstract>
+
+<toc>
+
+<p>
+<sect>Overview
+<p>
+The XKB configuration is decomposed into a number of components. Selecting
+proper parts and combining them back you can achieve most of configurations
+you might need. Unless you have a completely atypical keyboard you really don't
+need to touch any of xkb configuration files.
+
+<sect>Selecting XKB Configuration
+<p>
+The easiest and the most natural way how to specify a keyboard mapping is
+tu use <tt>rules</tt> component. As its name suggests it describes a number of general
+rules how to combine all bits and pieces into a valid and useful keyboard 
+mapping. All you need to do is to select a suitable rules file and then to
+feed it with a few parameters that will adjust the keyboard behaviour to
+fulfill your needs.
+<p>
+The parameters are:
+<itemize>
+<item><tt>XkbRules </tt>- files of rules to be used for keyboard mapping 
+composition
+<item><tt>XkbModel </tt>- name of model of your keyboard type
+<item><tt>XkbLayout </tt>- layout(s) you intend to use
+<item><tt>XkbVariant </tt>- variant(s) of layout you intend to use
+<item><tt>XkbOptions </tt>- extra xkb configuration options
+</itemize>
+<p>
+The proper rules file depends on your vendor. In reality, the commonest
+file of rules is <tt>xfree86</tt>. For each rules file there is a description
+file named <tt>&lt;vendor-rules&gt;.lst</tt>, for instance <tt>xfree86.lst</tt> 
+which is located in xkb configuration subdirectory <tt>rules</tt> (for example 
+<tt>/etc/X11/xkb/rules</tt>).
+
+<sect1>Basic Configuration
+<p>
+Let's say you want to configure a PC style America keyboard with 104
+keys as described in <tt>xfree86.lst</tt>. It can be done by simply writing
+several lines from below to you XFree86 configuration file (often
+found as <tt>/etc/X11/XF86Config-4</tt> or <tt>/etc/X11/XF86Config</tt>):
+<tscreen><verb>
+Section "InputDevice"
+    Identifier "Keyboard1"
+    Driver "Keyboard"
+
+    Option "XkbModel" "pc104"
+    Option "XkbLayout" "us"
+    Option "XKbOptions" ""
+EndSection
+</verb></tscreen>
+The values of parameters <tt>XkbModel</tt> and <tt>XkbLayout</tt> are really 
+not surprising. The parameters <tt>XkbOptions</tt> has been explicitly set to 
+empty set of parameters. The parameter <tt>XkbVariant</tt> has been left out. 
+That means the default variant named <tt>basic</tt> is loaded.
+<p>
+Of course, this can be also done at runtime using utility setxkbmap.
+Shell command loading the same keyboard mapping would look like:
+<tscreen><verb>
+setxkbmap -rules xfree86 -model pc104 -layout us -option ""
+</verb></tscreen>
+The configuration and the shell command would be very analogical
+for most other layouts (internationalized mappings). 
+
+<sect1>Advanced Configuration
+<p>
+Since XFree86 4.3.x you can use multi-layouts xkb configuration.
+What does it mean? Basically it allows to load up to four different
+keyboard layouts at a time. Each such layout would reside in its
+own group. The groups (unlike complete keyboard remapping) can be
+switched very fast from one to another by a combination of keys.
+<p>
+Let's say you want to configure your new Logitech cordless desktop
+keyboard, you intend to use three different layouts at the same
+time - us, czech and german (in this order), and that you are used
+to <tt>Alt-Shift</tt> combination for switching among them.
+<p>
+Then the configuration snippet could look like this:
+<tscreen><verb>
+Section "InputDevice"
+    Identifier "Keyboard1"
+    Driver "Keyboard"
+
+    Option "XkbModel" "logicordless"
+    Option "XkbLayout" "us,cz,de"
+    Option "XKbOptions" "grp:alt_shift_toggle"
+EndSection
+</verb></tscreen>
+Of course, this can be also done at runtime using utility setxkbmap.
+Shell command loading the same keyboard mapping would look like:
+<tscreen><verb>
+setxkmap -rules xfree86 -model logicordless -layout "us,cz,de" \
+         -option "grp:alt_shift_toggle"
+</verb></tscreen>
+
+
+<sect1>Even More Advanced Configuration
+<p>
+Okay, let's say you are more demanding. You do like the example
+above but you want it to change a bit. Let's imagine you want
+the czech keyboard mapping to use another variant but basic.
+The configuration snippet then changes into:
+<tscreen><verb>
+Section "InputDevice"
+    Identifier "Keyboard1"
+    Driver "Keyboard"
+
+    Option "XkbModel" "logicordless"
+    Option "XkbLayout" "us,cz,de"
+    Option "XkbVariant" ",bksl,"
+    Option "XKbOptions" "grp:alt_shift_toggle"
+EndSection
+</verb></tscreen>
+That's seems tricky but it is not. The logic for settings of variants
+is the same as for layouts, that means the first and the third variant
+settings are left out (set to <tt>basic</tt>), the second is set to 
+<tt>bksl</tt> (a special variant with an enhanced definition of the backslash 
+key).
+<p>
+Analogically, the loading runtime will change to:
+<tscreen><verb>
+setxkmap -rules xfree86 -model logicordless -layout "us,cz,de" \
+         -variant ",bksl," -option "grp:alt_shift_toggle"
+</verb></tscreen>
+
+<sect1>Basic Global Options
+<p>
+See rules/*.lst files.
+
+<!-- 
+  TODO: More detailed descriptions of options. User's often get confused.
+-->
+
+<sect>Direct XKB Configuration
+<p>
+Generally, you can directly prescribe what configuration of each of basic
+xkb components should be used to form the resulting keyboard mapping.
+This method is rather "brute force". You precisely need to know the structure
+and the meaning of all of used configuration components. 
+<p>
+This method also exposes all xkb configuration details directly into XFree86
+configuration file which is a not very fortunate fact.
+In rare occasions it may be needed, though. So how does it work?
+
+<sect1>Basic Components
+<p>
+There are five basic components used to form a keyboard mapping:
+<itemize>
+<item><em>key codes</em> - a translation of the scan codes produced by the 
+                        keyboard into a suitable symbolic form
+              
+<item><em>types</em> - a specification of what various combinations of 
+modifiers produce
+
+<item><em>key symbols</em> - a translation of symbolic key codes into actual 
+symbols
+
+<item><em>geometry</em> - a description of physical keyboard geometry
+
+<item><em>compatibility maps</em> - a specification of what action should
+each key produce in order to preserve compatibility with XKB-unware clients
+</itemize>
+
+<sect1>Example Configuration
+<p>
+Look at the following example:
+<tscreen><verb>
+Section "InputDevice"
+    Identifier "Keyboard0"
+    Driver "Keyboard"
+
+    Option "XkbKeycodes" "xfree86"
+    Option "XkbTypes"    "default"
+    Option "XkbSymbols"  "en_US(pc104)+de+swapcaps"
+    Option "XkbGeometry" "pc(pc104)"
+    Option "XkbCompat"   "basic+pc+iso9995"
+EndSection
+</verb></tscreen>
+
+This configuration sets the standard XFree86 default interpretation of keyboard 
+keycodes, sets the default modificator types. The
+symbol table is composed of extended US keyboard layout in its
+variant for pc keyboards with 104 keys plus all keys
+for german layout are redefined respectively. Also the logical
+meaning of <tt>Caps-lock</tt> and <tt>Control</tt> keys is swapped.
+The standard keyboard geometry (physical look) is set to pc style
+keyboard with 104 keys. The compatibility map is set to allow
+basic shifting, to allow Alt keys to be interpreted and also
+to allow iso9995 group shifting.
+
+<!--
+    TODO: add information about layout shifting:
+    TODO: us+ru(winkeys):2+de:3
+-->
+
+<sect>Keymap XKB Configuration
+<p>
+It is the formerly used way to configure xkb. The user included a special
+keymap file which specified the direct xkb configuration. This method
+has been obsoleted by previously described rules files which are far
+more flexible and allow simpler and more intuitive syntax. It is
+preserved merely for compatibility reasons. Avoid using it if it is possible.
+<p>
+
+</article>
diff --git a/xc/programs/Xserver/hw/xfree86/doc/sgml/XKB-Enhancing.sgml b/xc/programs/Xserver/hw/xfree86/doc/sgml/XKB-Enhancing.sgml
new file mode 100644
index 000000000..44bc10f1c
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/doc/sgml/XKB-Enhancing.sgml
@@ -0,0 +1,557 @@
+<!DOCTYPE linuxdoc PUBLIC "-//XFree86//DTD linuxdoc//EN">
+
+<article>
+<title>How to further enhance XKB configuration
+<author>Kamil Toman, Ivan U. Pascal
+<date>25 November 2002
+
+<ident>
+$XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/XKB-Enhancing.sgml,v 1.2 2003/02/25 19:31:02 dawes Exp $
+</ident>
+
+<abstract>
+This guide is aimed to relieve one's labour to create a new (internationalized)
+keyboard layout. Unlike other documents this guide accents the keymap 
+developer's point of view.
+</abstract>
+
+<toc>
+
+<p>
+
+<sect>Overview
+<p>
+The developer of a new layout should read the xkb
+protocol specification (<url url="http://www.x-docs.org/XKB/XKBproto.pdf"
+name="The X Keyboard Extension: Protocol Specification">) at least
+to clarify for himself some xkb-specific terms used in this document
+and elsewhere in xkb configuration. Also it shows wise to understand
+how the X server and a client digest their keyboard inputs 
+(with and without xkb).
+<p>
+A useful source is also <url url="http://www.tsu.ru/~pascal/en/xkb" name="Ivan 
+Pascal's text about xkb configuration"> often referenced throughout this 
+document.
+
+<p>
+Note that this document covers only enhancements which
+are to be made to XFree86 version 4.3.x and above.
+
+
+<sect>The Basics
+<p>
+At the startup (or at later at user's command) X server starts its xkb
+keyboard module extension and reads data from a compiled configuration
+file.
+<p>
+This compiled configuration file is prepared by the program <tt>xkbcomp</tt>
+which behaves altogether as an ordinary compiler (see <tt>man xkbcomp</tt>). 
+Its input are human readable xkb configuration files which are verified and
+then composed into a useful xkb configuration. Users don't need to mess with
+<tt>xkbcomp</tt> themselves, for them it is invisible. Usually, it is started 
+upon X server startup.
+<p>
+As you probably already know, the xkb configuration consists of five
+main modules:
+<descrip>
+<tag/Keycodes/
+     Tables that defines translation from keyboard scan codes into reasonable
+     symbolic names, maximum, minimum legal keycodes, symbolic aliases and
+     description of physically present LED-indicators. The primary sence of 
+     this component is to allow definitions of maps of symbols (see below) 
+     to be independent of physical keyboard scancodes. There are two main 
+     naming conventions for symbolic names (always four bytes long): 
+     <itemize>
+       <item> names which express some traditional meaning like 
+       <tt>&lt;SPCE&gt;</tt> (stands for space bar) or 
+       <item> names which express some relative positioning on a keyboard, for 
+       example <tt>&lt;AE01&gt;</tt> (an exclamation mark on US keyboards), on 
+       the right there are keys <tt>&lt;AE02&gt;</tt>, <tt>&lt;AE03&gt;</tt> 
+       etc.
+     </itemize>
+
+<tag/Types/
+    Types describe how the produced key is changed by active modifiers (like
+    Shift, Control, Alt, ...). There are several predefined types which
+    cover most of used combinations.
+
+<tag/Compat/
+    Compatibility component defines internal behaviour of modifiers. Using
+    compat component you can assign various actions (elaborately described
+    in xkb specification) to key events. This is also the place where
+    LED-indicators behaviour is defined.
+
+<tag/Symbols/
+    For i18n purposes, this is the most important table. It defines what
+    values (=symbols) are assigned to what keycodes (represented by their
+    symbolic name, see above). There may be defined more than one value
+    for each key and then it depends on a key type and on modifiers state
+    (respective compat component) which value will be the resulting one.
+
+<tag/Geometry/
+    Geometry files aren't used by xkb itself but they may be used by some
+    external programs to depict a keyboard image.
+</descrip>
+All these components have the files located in xkb configuration tree
+in subdirectories with the same names (usually in <tt>/usr/lib/X11/xkb</tt>).
+
+
+<sect>Enhancing XKB Configuration
+<p>
+Most of xkb enhancements concerns a need to define new output symbols
+for the some input key events. In other words, a need to define a new
+symbol map (for a new language, standard or just to feel more comfortable
+when typing text).
+<p>
+What do you need to do? Generally, you have to define following things:
+<itemize>
+<item> the map of symbols itself
+<item> the rules to allow users to select the new mapping
+<item> the description of the new layout
+</itemize>
+<p>
+First of all, it is good to go through existing layouts and to examine
+them if there is something you could easily adjust to fit your needs.
+Even if there is nothing similar you may get some ideas about basic
+concepts and used tricks.
+<p>
+<sect1>Levels And Groups
+<p>
+Since XFree86 4.3.0 you can use <bf>multi-layout</bf> concept of xkb 
+configuration.
+Though it is still in boundaries of xkb protocol and general ideas, the
+keymap designer must obey new rules when creating new maps. In exchange
+we get a more powerful and cleaner configuration system.
+<p>
+Remember that it is the application which must decide which symbol
+matches which keycode according to effective modifier state. The X server
+itself sends only an input event message to. Of course, usually
+the general interpretation is processed by Xlib, Xaw, Motif, Qt, Gtk
+and similar libraries. The X server only supplies its mapping table
+(usually upon an application startup).
+<p>
+You can think of the X server's symbol table as of a irregular table where each
+keycode has its row and where each combination of modifiers determines exactly
+one column. The resulting cell then gives the proper symbolic value. Not all
+keycodes need to bind different values for different combination of modifiers.
+<tt>&lt;ENTER&gt;</tt> key, for instance, usually doesn't depend on any
+modifiers so it its row has only one column defined.
+<p>
+Note that in XKB there is no prior assumption that certain modifiers are bound
+to certain columns. By editing proper files (see <ref id="keytypes">) this 
+mapping can be changed as well.
+<p>
+Unlike the original X protocol the XKB approach is far more
+flexible. It is comfortable to add one additional XKB term - group. You can
+think of a group as of a vector of columns per each keycode (naturally the
+dimension of this vector may differ for different keycodes). What is it good
+for? The group is not very useful unless you intend to use more than one
+logically different set of symbols (like more than one alphabet) defined in a
+single mapping table. But then, the group has a natural meaning - each symbol
+set has its own group and changing it means selecting a different one.
+XKB approach allows up to four different groups. The columns inside each group 
+are called (shift) levels. The X server knows the current group and reports it 
+together with modifier set and with a keycode in key events.
+<p>
+To sum it up:
+<p>
+<itemize>
+<item> for each keycode XKB keyboard map contains up to four one-dimensional
+   tables - groups (logically different symbol sets)
+<item> for each group of a keycode XKB keyboard map contains some columns 
+   - shift levels (values reached by combinations of Shift, Ctrl, Alt, ... 
+     modifiers)
+<item> different keycodes can have different number of groups
+<item> different groups of one keycode can have different number of shift levels
+<item> the current group number is tracked by X server 
+</itemize>
+<p>
+It is clear that if you sanely define levels, groups and sanely bind
+modifiers and associated actions you can have simultaneously loaded up to
+four different symbol sets where each of them would reside in its own group.
+<p>
+The multi-layout concept provides a facility to manipulate xkb groups
+and symbol definitions in a way that allows almost arbitrary composition of 
+predefined symbol tables. To keep it fully functional you have to:
+<itemize>
+<item> define all symbols only in the first group
+<item> (re)define any modifiers with extra care to avoid strange (anisometric)
+   behaviour
+</itemize>
+<p>
+<sect>Defining New Layouts
+<p>
+<!--
+  TODO: It may be better to merge IP01 docs and this guide.
+-->
+See <url url="http://www.tsu.ru/~pascal/en/xkb/internals.html" name="Some Words 
+About XKB internals"> for explanation of used xkb terms and problems
+addressed by XKB extension.
+<p>
+See <url url="http://www.tsu.ru/~pascal/en/xkb/gram-common.html" name="Common 
+notes about XKB configuration files language"> for more precise explanation of 
+syntax of xkb configuration files.
+<p>
+<sect1>Predefined XKB Symbol Sets
+<p>
+If you are about to define some European symbol map extension, you might
+want to use on of four predefined latin alphabet layouts.
+<!--
+    TODO: more details
+    TODO: something similiar for phonetic layouts
+    TODO: what are pc/pc layouts good for???
+-->
+<p>
+Okay, let's assume you want extend an existing keymap and you want to override
+a few keys. Let's take a simple U.K. keyboard as an example (defined in 
+<tt>pc/gb</tt>):
+<p>
+<tscreen><verb>
+partial default alphanumeric_keys
+xkb_symbols "basic" {
+  include "pc/latin"
+
+  name[Group1]="Great Britain";
+
+  key <AE02>  { [         2,   quotedbl,  twosuperior,    oneeighth ] };
+  key <AE03>  { [         3,   sterling, threesuperior,    sterling ] };
+  key <AC11>  { [apostrophe,         at, dead_circumflex, dead_caron] };
+  key <TLDE>  { [     grave,    notsign,          bar,          bar ] };
+  key <BKSL>  { [numbersign, asciitilde,   dead_grave,   dead_breve ] };
+  key <RALT>  { type[Group1]="TWO_LEVEL",
+                [ ISO_Level3_Shift, Multi_key ]   };
+
+  modifier_map Mod5   { <RALT> };
+};
+</verb></tscreen>
+<!--
+    TODO: ref IP01 file syntax TODO: some words about symbolic names like 
+    'sterling' and also about
+    TODO: unicode characters (for non-latin alphabets),
+    TODO: ref to compatibility symbolic names vs. unicode
+-->
+<p>
+It defines a new layout in <tt>basic</tt> variant as an extension of common 
+latin alphabet layout. The layout (symbol set) name is set to "Great Britain".
+Then there are redefinitions of a few keycodes and a modifiers binding. As you 
+can see the number of shift levels is the same for <tt>&lt;AE02&gt;</tt>, 
+<tt>&lt;AE03&gt;</tt>, <tt>&lt;AC11&gt;</tt>, <tt>&lt;TLDE&gt;</tt> and 
+<tt>&lt;BKSL&gt;</tt> keys but it differs from number of shift levels of 
+<tt>&lt;RALT&gt;</tt>.
+<p>
+Note that the <tt>&lt;RALT&gt;</tt> key itself is a binding key for Mod5 and 
+that it
+serves like a shift modifier for LevelThree, together with Shift
+as a multi-key. It is a good habit to respect this rule in a new similar
+layout.
+<p>
+Okay, you could now define more variants of your new layout besides
+<tt>basic</tt> simply by including (augmenting/overriding/...) the basic 
+definition and altering what may be needed.
+
+<sect1>Key Types<label id="keytypes">
+<p>
+
+The differences in the number of columns (shift levels) are caused by 
+a different types of keys (see the types definition in section basics).  Most 
+keycodes have implicitly set the keytype in the included 
+<tt>&dquot;pc/latin&dquot;</tt> file to 
+<tt>&dquot;FOUR_LEVEL_ALPHABETIC&dquot;</tt>. The only exception is 
+<tt>&lt;RALT&gt;</tt> keycode which is explicitly set 
+<tt>&dquot;TWO_LEVEL&dquot;</tt> keytype.
+<p>
+All those names refer to pre-defined shift level schemes. Usually you can
+choose a suitable shift level scheme from <tt>default</tt> types scheme list
+in proper xkb component's subdirectory. 
+<p>
+The most used schemes are:
+<descrip>
+<tag/ONE_LEVEL/
+   The key does not depend on any modifiers. The symbol from first level
+   is always chosen.
+
+<tag/TWO_LEVEL/
+   The key uses a modifier Shift and may have two possible values.
+   The second level may be chosen by Shift modifier. If Lock modifier
+   (usually Caps-lock) applies the symbol is further processed using
+   system-specific capitalization rules. If both Shift+Lock modifier apply the
+   symbol from the second level is taken and capitalization rules are applied
+   (and usually have no effect).
+    
+<tag/ALPHABETIC/
+   The key uses modifiers Shift and Lock. It may have two possible
+   values. The second level may be chosen by Shift modifier. When Lock
+   modifier applies, the symbol from the first level is taken and further
+   processed using system-specific capitalization rules. If both Shift+Lock
+   modifier apply the symbol from the first level is taken and no
+   capitalization rules applied. This is often called shift-cancels-caps
+   behaviour.
+
+<tag/THREE_LEVEL/
+   Is the same as TWO_LEVEL but it considers an extra modifier -
+   LevelThree which can be used to gain the symbol value from the third
+   level. If both Shift+LevelThree modifiers apply the value from the third
+   level is also taken. As in TWO_LEVEL, the Lock modifier doesn't influence
+   the resulting level. Only Shift and LevelThree are taken into that
+   consideration. If the Lock modifier is active capitalization rules
+   are applied on the resulting symbol.
+   
+<tag/FOUR_LEVEL/
+   Is the same as THREE_LEVEL but unlike LEVEL_THREE if both Shift+LevelThree
+   modifiers apply the symbol is taken from the fourth level.
+
+<tag/FOUR_LEVEL_ALPHABETIC/
+   Is similar to FOUR_LEVEL but also defines shift-cancels-caps behaviour
+   as in ALPHABETIC. If Lock+LevelThree apply the symbol from the
+   third level is taken and the capitalization rules are applied.
+   If Lock+Shift+LevelThree apply the symbol from the third level is taken
+   and no capitalization rules are applied.
+ 
+<tag/KEYPAD/
+   As the name suggest this scheme is primarily used for numeric keypads.
+   The scheme considers two modifiers - Shift and NumLock. If none
+   of modifiers applies the symbol from the first level is taken. If either 
+   Shift or NumLock modifiers apply the symbol from the second level is taken.
+   If both Shift+NumLock modifiers apply the symbol from the first level
+   is taken. Again, shift-cancels-caps variant.
+   
+<tag/FOUR_LEVEL_KEYPAD/
+   Is similar to KEYPAD scheme but considers also LevelThree modifier.
+   If LevelThree modifier applies the symbol from the third level is taken.
+   If Shift+LevelThree or NumLock+LevelThree apply the symbol from the fourth
+   level is taken. If all Shift+NumLock+LevelThree modifiers apply the symbol
+   from the third level is taken. This also, shift-cancels-caps variant.
+</descrip>
+<p>
+Besides that, there are several schemes for special purposes:
+<descrip>
+<tag/PC_BREAK/
+    It is similar to TWO_LEVEL scheme but it considers the Control
+    modifier rather than Shift. That means, the symbol from the second level
+    is chosen by Control rather than by Shift.
+<tag/PC_SYSRQ/
+    It is similar to TWO_LEVEL scheme but it considers the Alt modifier rather 
+    than Shift. That means, the symbol from the second level
+    is chosen by Alt rather than by Shift.
+<tag/CTRL+ALT/
+    The key uses modifiers Alt and Control. It may have two possible
+    values. If only one modifier (Alt or Control) applies the symbol
+    from the first level is chosen. Only if both Alt+Control modifiers apply
+    the symbol from the second level is chosen.
+<tag/SHIFT+ALT/
+    The key uses modifiers Shift and Alt. It may have two possible values.
+    If only one modifier (Alt or Shift) applies the symbol
+    from the first level is chosen. Only if both Alt+Shift modifiers apply
+    the symbol from the second level is chosen.
+</descrip>
+<p>
+If needed, special <tt>caps</tt> schemes may be used. They redefine the 
+standard behaviour of all <tt>*ALPHABETIC</tt> types. The layouts (maps of 
+symbols) with keys defined in respective types then automatically change
+their behaviour accordingly. Possible redefinitions are:
+<itemize>
+<item>internal
+<item>internal_nocancel
+<item>shift
+<item>shift_nocancel
+</itemize>
+None of these schemes should be used directly. They are defined merely
+for <tt>'caps:'</tt> xkb options (used to globally change the layouts 
+behaviour).
+<p>
+Don't alter any of existing key types. If you need a different behaviour
+create a new one.
+
+<sect2>More On Definitions Of Types
+<p>
+When the XKB software deals with a separate type description it gets
+a complete list of modifiers that should be taken into account from the 
+<tt>'modifiers=&lt;list of modifiers&gt;'</tt> list and expects that a set
+of <tt>'map[&lt;combination of modifiers&gt;]=&lt;list of modifiers&gt;'</tt>
+instructions that contain the mapping for each combination of modifiers 
+mentioned in that list. Modifiers that are not explicitly listed are NOT taken 
+into account
+when the resulting shift level is computed.
+If some combination is omitted the program (subroutine) should choose the first
+level for this combination (a quite reasonable behavior).
+<p>
+Lets consider an example with two modifiers <tt>ModOne</tt> and <tt>ModTwo</tt>:
+<tscreen><verb>
+type "..." {
+    modifiers = ModOne+ModTwo;
+    map[None] = Level1;
+    map[ModOne] = Level2;
+};
+</verb></tscreen>
+In this case the map statements for <tt>ModTwo</tt> only and 
+<tt>ModOne+ModTwo</tt> are omitted.  It means that if the <tt>ModTwo</tt> is 
+active the subroutine can't found explicit mapping for such combination an will 
+use the <em>default level</em> i.e. Level1.
+<p>
+But in the case the type described as:
+<tscreen><verb>
+type "..." {
+    modifiers = ModOne;
+    map[None] = Level1;
+    map[ModOne] = Level2;
+};
+</verb></tscreen>
+the ModTwo will not be taken into account and the resulting level depends on 
+the ModOne state only. That means, ModTwo alone produces the Level1 but the 
+combination ModOne+ModTwo produces the Level2 as well as ModOne alone.
+<p>
+What does it mean if the second modifier is the Lock? It means that in
+the first case (the Lock itself is included in the list of modifiers but 
+combinations with this modifier aren't mentioned in the map statements) 
+the internal capitalization rules will be applied to the symbol from the first 
+level. But in the second case the capitalization will be applied to the symbol
+chosen accordingly to he first modifier - and this can be the symbol from the
+first as well as from the second level.
+<p>
+Usually, all modifiers introduced in <tt>'modifiers=&lt;list of 
+modifiers&gt;'</tt> list are used for shift level calculation and then 
+discarded. Sometimes this is not desirable. If you want to use a modifier
+for shift level calculation but you don't want to discard it, you may
+list in '<tt>preserve[&lt;combination of modifiers&gt;]=&lt;list of 
+modifiers&gt;'</tt>. That means, for a given combination all listed modifiers
+will be preserved. If the Lock modifier is preserved then the resulting
+symbol is passed to internal capitalization routine regardless whether
+it has been used for a shift level calculation or not.
+<p>
+Any key type description can use both real and virtual modifiers. Since real 
+modifiers always have standard names it is not necessary to explicitly declare  
+them. Virtual modifiers can have arbitrary names and can be declared (prior
+using them) directly in key type definition:
+<tscreen><verb>
+virtual_modifiers &lt;comma-separated list of modifiers&gt;  ;
+</verb></tscreen>
+as seen in for example <tt>basic</tt>, <tt>pc</tt> or <tt>mousekeys</tt> key 
+type definitions.
+
+<sect1>Rules
+<p>
+Once you are finished with your symbol map you need to add it
+to rules file. The rules file describes how all the
+five basic keycodes, types, compat, symbols and geometry components
+should be composed to give a sensible resulting xkb configuration.
+<p>
+The main advantage of rules over formerly used keymaps is a possibility
+to simply parameterize (once) fixed patterns of configurations and thus
+to elegantly allow substitutions of various local configurations
+into predefined templates.
+<p>
+A pattern in a rules file (often located in 
+<tt>/usr/lib/X11/xkb/rules</tt>) can be parameterized with four other arguments:
+<tt>Model</tt>, <tt>Layout</tt>, <tt>Variant</tt> and <tt>Options</tt>.
+For most cases parameters <tt>model</tt> and <tt>layout</tt> should
+be sufficient for choosing a functional keyboard mapping.
+<p>
+The rules file itself is composed of pattern lines and lines with rules. The pattern line starts with an exclamation mark ('<tt>!</tt>') 
+and describes how will the xkb interpret the following lines (rules). A sample 
+rules file looks like this:
+<tscreen><verb>
+! model 	                =	keycodes
+  macintosh_old	                =	macintosh
+  ...
+  *		                =	xfree86
+  
+! model		                =	symbols
+  hp		                =	+inet(&percnt;m)
+  microsoftpro	                =	+inet(&percnt;m)
+  geniuscomfy	                =	+inet(&percnt;m)
+
+! model	    layout[1]	        =	symbols
+  macintosh	us	        =	macintosh/us&percnt;(v[1])
+  *             *               =       pc/pc(&percnt;m)+pc/&percnt;l[1]&percnt;(v[1])
+  
+! model     layout[2]	        =	symbols
+  macintosh     us              =	+macintosh/us[2]&percnt;(v[2]):2
+  *		*               =	+pc/&percnt;l[2]&percnt;(v[2]):2
+  
+! option			=	types
+  caps:internal			=	+caps(internal)
+  caps:internal_nocancel	=	+caps(internal_nocancel)
+</verb></tscreen>
+
+Each rule defines what certain combination of values on the left side
+of equal sign ('<tt>=</tt>') results in. For example a (keyboard) model 
+<tt>macintosh_old</tt> instructs xkb to take definitions of keycodes
+from file <tt>keycodes/macintosh</tt> while the rest of models
+(represented by a wild card '<tt>*</tt>') instructs it to take them from
+file <tt>keycodes/xfree86</tt>. The wild card represents all possible
+values on the left side which were not found in any of the previous rules.
+The more specialized (more complete) rules have higher precedence than general 
+ones, i.e. the more general rules supply reasonable default values.
+<p>
+As you can see some lines contain substitution parameters - the parameters 
+preceded by the percent sign ('<tt>&percnt;</tt>'). The first alphabetical character 
+after the percent sign expands to the value which has been found on the left 
+side. For example <tt>+&percnt;l&percnt;(v)</tt> expands into <tt>+cz(bksl)</tt> if the 
+respective values on the left side were <tt>cz</tt> layout in its <tt>bksl</tt> 
+variant. More, if the layout resp. variant  parameter is followed by a pair of 
+brackets ('<tt>[</tt>', '<tt>]</tt>') it means that xkb should <em>place the 
+layout resp. variant into specified xkb group</em>. If the brackets are omitted
+the first group is the default value.
+<p>
+So the second block of rules enhances symbol definitions for some particular 
+keyboard models with extra keys (for internet, multimedia, ...) . Other models 
+are left intact. Similarly, the last block overrides some key type definitions,
+so the common global behaviour ''shift cancels caps'' or ''shift doesn't cancel 
+caps'' can be selected. The rest of rules produces special symbols for each 
+variant <tt>us</tt> layout of <tt>macintosh</tt> keyboard and standard pc 
+symbols in appropriate variants as a default. 
+
+<!--
+  TODO: more words about group switching (XkbOptions grp:...)?
+-->
+
+<!--
+    TODO: user & 3rd party xkb tree?
+    TODO: better and more complex explanation of rules
+-->
+
+<sect1>Descriptive Files of Rules
+<p>
+Now you just need to add a detailed description to <tt>&lt;rules&gt;.xml</tt> 
+description file so the other users (and external programs which often parse 
+this file) know what is your work about.
+
+
+<!-- 
+    TODO: format and semantics
+-->
+
+<sect2>Old Descriptive Files
+<p>
+The formerly used descriptive files were named <tt>&lt;rules&gt;.lst</tt>
+Its structure is very simple and quite self descriptive but such simplicity
+had also some cavities, for example there was no way how to describe local 
+variants of layouts and there were problems with the localization of 
+descriptions. To preserve compatibility with some older programs,
+new XML descriptive files can be converted to old format '.lst'.
+<p>
+For each parameter of rules file should be described its meaning. For the rules 
+file described above the <tt>.lst</tt> file could look like:
+<tscreen><verb>
+! model
+  pc104		Generic 104-key PC
+  microsoft	Microsoft Natural
+  pc98		PC-98xx Series
+  macintosh     Original Macintosh
+  ...
+
+! layout
+  us		U.S. English
+  cz		Czech
+  de		German
+  ...
+
+! option
+  caps:internal		 uses internal capitalization. Shift cancels Caps
+  caps:internal_nocancel uses internal capitalization. Shift doesn't cancel Caps  
+  
+</verb></tscreen>
+<p>
+And that should be it. Enjoy creating your own xkb mapping.
+
+</article>
diff --git a/xc/programs/Xserver/hw/xfree86/doc/sgml/ati.sgml b/xc/programs/Xserver/hw/xfree86/doc/sgml/ati.sgml
index 5ece3380a..53e936943 100644
--- a/xc/programs/Xserver/hw/xfree86/doc/sgml/ati.sgml
+++ b/xc/programs/Xserver/hw/xfree86/doc/sgml/ati.sgml
@@ -15,7 +15,7 @@
 
 
 <ident>
-$XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/ati.sgml,v 3.40 2002/02/14 22:08:00 tsi Exp $
+$XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/ati.sgml,v 3.43 2003/02/25 19:31:02 dawes Exp $
 </ident>
 
 <abstract>
@@ -53,7 +53,7 @@ disable itself to allow other drivers to examine the system.<p>
 Note that I am currently considering removing the driver's support for generic
 VGA.
 If you have any concerns about this, please contact me at
-<it>tsi@xfree86.org</it>.
+<email>tsi@xfree86.org</email>.
 <sect>A note on acceleration<p>
 The meaning of ``acceleration'', as used in this document, needs to be
 clarified.
@@ -534,7 +534,8 @@ mode.
 In the first case, the workaround is to use some other means of restoring the
 text font.
 On Linux, this can be accomplished with the kbd or svgalib packages.
-In the second case, xrefresh(1) will usually clean up the image.
+In the second case, <htmlurl name="xrefresh(1)" url="xrefresh.1.html">
+will usually clean up the image.
 No complete solution to this problem is currently known.
 It appears this corruption occurs due to either video memory bandwidth or
 RAMDAC limitations, and so the driver will limit mode clocks to 40MHz.
@@ -558,7 +559,7 @@ of the panel's native resolution.
 This is quite evident when the panel has ``odd-ball'' dimensions, such as
 1400x1050, a resolution not commonly possible on CRTs or projection
 equipment.<p>
-Also, the display of independant images on the panel and CRT is not currently
+Also, the display of independent images on the panel and CRT is not currently
 implemented, and might never be, pending resolution of the previous item.<p>
 </itemize>
 Support for the following will be added in a future release:
@@ -585,7 +586,7 @@ name="ftp://ftp.xfree86.org/pub/XFree86"
 url="ftp://ftp.xfree86.org/pub/XFree86"> if you are uncertain.<p>
 Secondly, please check XFree86's doc directory for additional information.<p>
 Thirdly, a scan through the comp.windows.x.i386unix and comp.os.linux.x
-newsgroups and the newbie or xpert mailing lists using your favourite archiving
+newsgroups and the xfree86 mailing list using your favourite archiving
 service can also prove useful in resolving problems.<p>
 If you are still experiencing problems, you can send me <it>non-HTMLised</it>
 e-mail at <email>tsi@xfree86.org</email>.
diff --git a/xc/programs/Xserver/hw/xfree86/doc/sgml/defs.ent b/xc/programs/Xserver/hw/xfree86/doc/sgml/defs.ent
index 18f8f5a27..38a0c2378 100644
--- a/xc/programs/Xserver/hw/xfree86/doc/sgml/defs.ent
+++ b/xc/programs/Xserver/hw/xfree86/doc/sgml/defs.ent
@@ -1,40 +1,48 @@
-<!-- $XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/defs.ent,v 1.22 2002/01/16 20:38:45 dawes Exp $ -->
+<!-- $XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/defs.ent,v 1.29 2003/02/27 02:03:07 dawes Exp $ -->
 
 <!-- shared entity definitions for the XFree86 documentation -->
 
 <!-- XFree86 version string -->
-<!ENTITY relvers CDATA "4.2.0">
-<!ENTITY prevrelvers CDATA "4.1.0">
-<!ENTITY fullrelvers CDATA "4.2.0">
-<!ENTITY prevfullrelvers CDATA "4.1.0">
-<!ENTITY nextfullrelvers CDATA "4.3.0">
-<!ENTITY nextfullreldate CDATA "May 2002">
-<!ENTITY nextupdrelvers CDATA "4.2.1">
-<!ENTITY srcvers CDATA "420">
-<!ENTITY prevsrcvers CDATA "410">
-<!ENTITY fullsrcvers CDATA "420">
-<!ENTITY prevfullsrcvers CDATA "410">
-<!ENTITY whichfullrel CDATA "fifth">
+<!ENTITY relvers CDATA "4.3.0">
+<!ENTITY prevrelvers CDATA "4.2.1">
+<!ENTITY fullrelvers CDATA "4.3.0">
+<!ENTITY prevfullrelvers CDATA "4.2.0">
+<!ENTITY nextfullrelvers CDATA "4.4.0">
+<!ENTITY nextfullreldate CDATA "not scheduled">
+<!ENTITY nextupdrelvers CDATA "4.3.1">
+<!ENTITY srcvers CDATA "430">
+<!ENTITY prevsrcvers CDATA "421">
+<!ENTITY fullsrcvers CDATA "430">
+<!ENTITY prevfullsrcvers CDATA "420">
+<!ENTITY whichfullrel CDATA "sixth">
 <!ENTITY whichupdaterel CDATA "none">
-<!ENTITY relbranchtag CDATA "xf-4_2-branch">
+<!ENTITY reltag CDATA "xf-4_3_0">
+<!ENTITY relbranchtag CDATA "xf-4_3-branch">
+<!ENTITY rcnum CDATA "0">
 
 <!-- Version of the most recent 3.3.x release -->
 <!ENTITY legacyvers CDATA "3.3.6">
 
 <!-- doctools version strings -->
-<!ENTITY doctoolsvers CDATA "1.3">
+<!ENTITY doctoolsvers CDATA "1.3.1">
+
+<!-- utils version strings -->
+<!ENTITY utilsvers CDATA "1.1.0">
 
 <!-- These should be set according to which snapshot/release this is -->
 <!ENTITY % firstsnap 'IGNORE'>
-<!ENTITY % latersnap 'INCLUDE'>
+<!ENTITY % latersnap 'IGNORE'>
 <!ENTITY % snapshot 'IGNORE'>
+<!ENTITY % notsnapshot 'INCLUDE'>
+<!ENTITY % relcandidate 'IGNORE'>
 <!ENTITY % release 'INCLUDE'>
 <!ENTITY % firstrel 'IGNORE'>
 <!ENTITY % earlyrel 'IGNORE'>
 <!ENTITY % laterrel 'INCLUDE'>
 <!ENTITY % fullrel 'INCLUDE'>
+<!ENTITY % fullbinaries 'INCLUDE'>
 <!ENTITY % updaterel 'IGNORE'>
-<!ENTITY % prevrelwasupdate 'IGNORE'>
+<!ENTITY % prevrelwasupdate 'INCLUDE'>
 
 <!-- Set this to INCLUDE when references to the RELNOTES are to be included -->
 <!ENTITY % haverelnotes 'INCLUDE'>
diff --git a/xc/programs/Xserver/hw/xfree86/doc/sgml/dps.sgml b/xc/programs/Xserver/hw/xfree86/doc/sgml/dps.sgml
index b691d7652..77b43410e 100644
--- a/xc/programs/Xserver/hw/xfree86/doc/sgml/dps.sgml
+++ b/xc/programs/Xserver/hw/xfree86/doc/sgml/dps.sgml
@@ -8,7 +8,7 @@
 <author>Juliusz Chroboczek, <email/jch@xfree86.org/
 <date>27 February 2001</date>
 
-<ident>$XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/dps.sgml,v 1.1 2001/03/02 02:45:37 dawes Exp $</ident>
+<ident>$XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/dps.sgml,v 1.2 2003/01/20 03:43:07 dawes Exp $</ident>
 
 <toc>
 
@@ -111,7 +111,8 @@ The <tt/makepsres/ utility is used for managing PostScript resources.
 Its basic operation consists in walking recursively a filesystem tree,
 noting all resources, and then writing out a ``Unix PostScript
 Resources,'' file, basically a directory of all the resources found.
-This utility is documented in the makepsres(1) manual page.
+This utility is documented in the <htmlurl name="makepsres(1)"
+url="makepsres.1.html"> manual page.
 
 The <tt/pswrap/ utility is a stub generator for PostScript clients.
 Roughly speaking, it takes as its input textual PostScript code, and
diff --git a/xc/programs/Xserver/hw/xfree86/doc/sgml/fonts.sgml b/xc/programs/Xserver/hw/xfree86/doc/sgml/fonts.sgml
index 859801b76..1feab532a 100644
--- a/xc/programs/Xserver/hw/xfree86/doc/sgml/fonts.sgml
+++ b/xc/programs/Xserver/hw/xfree86/doc/sgml/fonts.sgml
@@ -6,41 +6,216 @@
 
 <title>Fonts in XFree86
 <author>Juliusz Chroboczek, <email/jch@xfree86.org/
-<date>29 September 2002</date>
+<date>17 January 2003</date>
 
 <ident>
-$XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/fonts.sgml,v 1.16 2002/10/17 00:49:02 dawes Exp $
+$XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/fonts.sgml,v 1.20 2003/01/20 03:43:07 dawes Exp $
 </ident>
 
 <toc>
 
 <sect>Introduction
 
-<!-- I hate SGML.  What's wrong with texinfo? -->
-
-<p>This document describes the support for fonts in XFree86.  Section
-<ref id="sec:installing" name="Installing fonts"> is aimed at the
-casual user wishing to install fonts in the X server; the rest of the
+<p>This document describes the support for fonts in XFree86.  <ref
+id="sec:installing" name="Installing fonts"> is aimed at the 
+casual user wishing to install fonts in XFree86; the rest of the
 document describes the font support in more detail.
 
-We only describe font support within the core X protocol.  Issues
-relating to fonts within the RENDER extension, the GLX (OpenGL)
-extension or the PEX extension are outside the scope of this document.
-
 We assume some familiarity with digital fonts.  If anything is not
-clear to you, please consult Appendix <ref id="sec:background"
-name="Background"> at the end of this document for background
+clear to you, please consult <ref id="sec:background"
+name="Appendix: Background"> at the end of this document for background
 information.
 
-<sect>Installing fonts <label id="sec:installing">
+<sect1>Two font systems
+
+<p>XFree86 includes two font systems: the core X11 fonts system, which
+is present in all implementations of X11, and the Xft fonts system,
+which is not currently distributed with implementations of X11 that
+are not based on XFree86 but will hopefully be included by them in
+the future
+
+The core X11 fonts system is directly derived from the fonts system
+included with X11R1 in 1987, which could only use monochrome bitmap
+fonts.  Over the years, it has been more or less happily coerced into
+dealing with scalable fonts and rotated glyphs.
+
+Xft was designed from the start to provide good support for scalable
+fonts, and do so efficiently.  Unlike the core fonts system, it
+supports features such as anti-aliasing and sub-pixel rasterisation.
+Perhaps more importantly, it gives applications full control over the
+way glyphs are rendered, making fine typesetting and WYSIWIG display
+possible.  Finally, it allows applications to use fonts that are not
+installed system-wide for displaying documents with embedded fonts.
+
+Xft is not compatible with the core fonts system: usage of Xft
+requires making fairly extensive changes to toolkits (user-interface
+libraries).  While XFree86 will continue to maintain the core fonts
+system, toolkit authors are encouraged to switch to Xft as soon as
+possible.
+
+<sect>Installing fonts<label id="sec:installing">
+
+<p>This section explains how to configure both Xft and the core fonts
+system to access newly-installed fonts.
+
+<sect1>Configuring Xft<label id="sec:configuring-xft">
+
+<p>Xft has no configuration mechanism itself, rather it relies upon
+the fontconfig library to configure and customize fonts.  That library
+is not specific to XFree86 or indeed on any particular font output
+mechanism.  This discussion describes how fontconfig, rather than Xft,
+works.
+
+<sect2>Installing fonts in Xft
+
+<p>Fontconfig looks for fonts in a set of well-known directories that
+include all of XFree86's standard font directories
+(`<tt>/usr/X11R6/lib/X11/lib/fonts/*</tt>') by default) as well as a
+directory called `<tt>.fonts/</tt>' in the user's home directory.
+Installing a font for use by Xft applications is as simple
+as copying a font file into one of these directories.
+<tscreen><verb>
+$ cp lucbr.ttf ~/.fonts/
+</verb></tscreen>
+Fontconfig will notice the new font at the next opportunity and rebuild its
+list of fonts.  If you want to trigger this update from the command
+line (for example in order to globally update the system-wide Fontconfig
+information), you may run the command `<tt/fc-cache/'.
+<tscreen><verb>
+$ fc-cache
+</verb></tscreen>
+
+<sect2>Fine-tuning Xft
+
+<p>Fontconfig's behaviour is controlled by a set of configuration files: a
+system-wide configuration file, `<tt>/etc/fonts/fonts.conf</tt>', and
+a user-specific file called `<tt>.fonts.conf</tt>' in the user's home
+directory (this can be overridden with the `<tt/FONTCONFIG_FILE/'
+environment variable).
+
+Every Fontconfig configuration file must start with the following
+boilerplate:
+<tscreen><verb>
+&lt;?xml version="1.0"?&gt;
+&lt;!DOCTYPE fontconfig SYSTEM "fonts.dtd"&gt;
+&lt;fontconfig&gt;
+</verb></tscreen>
+In addition, every Fontconfig configuration file must end with the
+following line:
+<tscreen><verb>
+&lt;/fontconfig&gt;
+</verb></tscreen>
+
+The default Fontconfig configuration file includes the directory
+`<tt>~/.fonts/</tt>' in the list of directories searched for font
+files, and this is where user-specific font files should be installed.
+In the unlikely case that a new font directory needs to be added, this
+can be done with the following syntax:
+<tscreen><verb>
+&lt;dir&gt;/usr/local/share/fonts/&lt;/dir&gt;
+</verb></tscreen>
+
+Another useful option is the ability to disable anti-aliasing (font
+smoothing) for selected fonts.  This can be done with the following
+syntax:
+<tscreen><verb>
+&lt;match target="font"&gt;
+    &lt;test qual="any" name="family"&gt;
+        &lt;string&gt;Lucida Console&lt;/string&gt;
+    &lt;/test&gt;
+    &lt;edit name="antialias" mode="assign"&gt;
+        &lt;bool&gt;false&lt;/bool&gt;
+    &lt;/edit&gt;
+&lt;/match&gt;
+</verb></tscreen>
+Anti-aliasing can be disabled for all fonts by the following incantation:
+<tscreen><verb>
+&lt;match target="font"&gt;
+    &lt;edit name="antialias" mode="assign"&gt;
+        &lt;bool&gt;false&lt;/bool&gt;
+    &lt;/edit&gt;
+&lt;/match&gt;
+</verb></tscreen>
+
+Xft supports sub-pixel rasterisation on LCD displays.  XFree86 should
+automatically enable this feature on laptops and when using an LCD
+monitor connected with a DVI cable; you can check whether this was
+done by typing
+<tscreen><verb>
+$ xdpyinfo -ext RENDER | grep sub-pixel
+</verb></tscreen>
+If this doesn't print anything, you will need to configure Render for
+your particular LCD hardware manually; this is done with the following
+syntax:
+<tscreen><verb>
+&lt;match target="font"&gt;
+    &lt;edit name="rgba" mode="assign"&gt;
+        &lt;const&gt;rgb&lt;/const&gt;
+    &lt;/edit&gt;
+&lt;/match&gt;
+</verb></tscreen>
+The string `<tt/rgb/' within the
+`<tt/&lt;const&gt;/'...`<tt>&lt;/const&gt;</tt>'
+specifies the order of pixel components on your display, and should be
+changed to match your hardware; it can be one of `<tt/rgb/ (normal
+LCD screen), `<tt/bgr/' (backwards LCD screen), `<tt/vrgb/' (LCD
+screen rotated clockwise) or `<tt/vbgr/' (LCD screen rotated
+counterclockwise).
+
+<sect2>Configuring applications
+
+<p>Because most current applications use the core fonts system by
+default, it is necessary to explicitly configure them to use Xft.
+How this is done depends on the application.
+
+XTerm can be set to use Xft by using the `<tt/-fa/' command line
+option or by setting the `<tt/XTerm*faceName/' resource:
+<tscreen><verb>
+XTerm*faceName: Courier
+</verb></tscreen>
+or
+<tscreen><verb>
+$ xterm -fa "Courier"
+</verb></tscreen>
+
+For applications based on GTK+ 2.0 (including GNOME 2 applications),
+the environment variable `<tt/GDK_USE_XFT/' should be set to `<tt/1/':
+<tscreen><verb>
+$ export GDK_USE_XFT=1
+</verb></tscreen>
+
+GTK+ 2.2 uses Xft by default.
+
+For KDE applications, you should select ``Anti-alias fonts'' in the
+``Fonts'' panel of KDE's ``Control Center''.  Note that this option is
+misnamed: it switches KDE to using Xft but doesn't enable
+anti-aliasing in case it was disabled by your Xft configuration file.
 
-<p>Installing fonts in XFree86 is a two step process.  First, you need
-to create a <it/font directory/ that contains all the relevant font
-files as well as some index files.  You then need to inform the X
-server of the existence of this new directory by including it in the
-<it/font path/.
+<it>(What about Mozilla?)</it>
 
-<sect1>Installing bitmap fonts
+<sect2>Troubleshooting <label id="sec:troubleshooting-xft">
+
+<p>If some Xft-based applications don't seem to notice the changes you
+are making to your configuration files, they may be linked against the
+XFree86 4.2 version of Xft.  In order to fix the problem, you should
+relink them against a current version of Xft; on most systems, it is
+enough to install the current version of the Xft and Fontconfig
+libraries.
+
+If, for some reason, you cannot upgrade the shared libraries, please
+check the <htmlurl name="Xft(3)" url="Xft.3.html"> manual page included
+with XFree86 4.2 for the configuration mechanisms of the previous version
+of Xft.
+
+<sect1>Configuring the core X11 fonts system
+
+<p>Installing fonts in the core system is a two step process.  First,
+you need to create a <it/font directory/ that contains all the
+relevant font files as well as some index files.  You then need to
+inform the X server of the existence of this new directory by
+including it in the <it/font path/.
+
+<sect2>Installing bitmap fonts
 
 <p>The XFree86 server can use bitmap fonts in both the cross-platform
 BDF format and the somewhat more efficient binary PCF format.
@@ -53,7 +228,7 @@ command `<tt/bdftopcf/', <it/e.g./
 <tscreen><verb>
 $ bdftopcf courier12.bdf
 </verb></tscreen>
-You may then want to compress the resulting PCF font files:
+You will then want to compress the resulting PCF font files:
 <tscreen><verb>
 $ gzip courier12.pcf
 </verb></tscreen>
@@ -62,23 +237,23 @@ After the fonts have been converted, you should copy all the font
 files that you wish to make available into a arbitrary directory, say
 `<tt>/usr/local/share/fonts/bitmap/</tt>'.  You should then create the
 index file `<tt/fonts.dir/' by running the command `<tt/mkfontdir/'
-(please see the <tt/mkfontdir/(1) manual page for more information):
+(please see the <htmlurl name="mkfontdir(1)" url="mkfontdir.1.html">
+manual page for more information):
 <tscreen><verb>
-$ mkdir /usr/local/share/fonts/bitmap 
-$ cp *.pcf.gz /usr/local/share/fonts/bitmap
-$ cd /usr/local/share/fonts/bitmap 
-$ mkfontdir 
+$ mkdir /usr/local/share/fonts/bitmap/
+$ cp *.pcf.gz /usr/local/share/fonts/bitmap/
+$ mkfontdir /usr/local/share/fonts/bitmap/
 </verb></tscreen>
 
 All that remains is to tell the X server about the existence of the
-new font directory; see Section <ref id="sec:set-font-path"
-name="Setting the server font path">.
+new font directory; see <ref id="sec:set-font-path" name="Setting the
+server font path"> below.
 
-<sect1>Installing scalable fonts
+<sect2>Installing scalable fonts
 
 <p>The XFree86 server supports scalable fonts in four formats:
 Type&nbsp;1, Speedo, TrueType and CIDFont.  This section only applies
-to the former three; for information on CIDFonts, please see Section
+to the former three; for information on CIDFonts, please see
 <ref id="sec:cid-fonts" name="Installing CIDFonts"> later in this
 document.
 
@@ -89,65 +264,26 @@ to create an index file called `<tt/fonts.dir/'.
 There is, however, a big difference: `<tt/mkfontdir/' cannot
 automatically recognise scalable font files.  For that reason, you
 must first index all the font files in a file called
-`<tt/fonts.scale/'.  This file has the same format as a
-`<tt/fonts.dir/' file, and typically looks as follows: 
-<tscreen><verb>
-4
-cour.pfa -adobe-courier-medium-r-normal-0-0-0-0-p-0-iso8859-1
-cour.pfa -adobe-courier-medium-r-normal-0-0-0-0-p-0-iso8859-2
-couri.pfa -adobe-courier-medium-i-normal-0-0-0-0-p-0-iso8859-1
-couri.pfa -adobe-courier-medium-i-normal-0-0-0-0-p-0-iso8859-2 
-</verb></tscreen>
-The first line indicates the number of entries in the file.
-Each line after the first consists of two fields separated by a space;
-the first field is the name of the font file, and the second one is
-the name under which the font will appear to the server.  This name
-should obey the X Logical Font Description conventions (see Section
-<ref id="sec:xlfd" name="The X Logical Font Description">).  The
-format of this file is fully described in the <tt/mkfontdir/(1) manual
-page.
-
-Note that multiple lines may point at the same font file.  This is
-most commonly done in order to make a single font available under
-multiple encodings; please see Section 
-<ref id="sec:internationalisation" name="Fonts and internationalisation">.
-
-While it is possible to create the `<tt/fonts.scale/' file by hand, it
-is simpler and more convenient to have it generated automatically.
-Utilities to perform this task are available, but are not currently
-included with XFree86. For Type&nbsp;1 fonts, you may use a utility
-called `<tt/type1inst/' which is available from
-<url url="http://www.ibiblio.org/pub/Linux/X11/xutils/" name="standard
-Free Software repositories"> throughout the world.
-
-For TrueType fonts, you may use `<tt/ttmkfdir/', available from
-<url name="Joerg Pommnitz's xfsft page"
-     url="http://www.joerg-pommnitz.de/TrueType/xfsft.html">.
-
-After the `<tt/fonts.scale/' is created, you may run `<tt/mkfontdir/' as
-above; this time, however, you need to create an index of encoding
-files called `<tt>encodings.dir</tt>' in addition to the
-`<tt>fonts.dir</tt>' file.  This is done by using `<tt/mkfontdir/' with
-the `<tt/-e/' flag:
-<tscreen><verb>
-$ cd /usr/local/share/fonts/Type1
-$ mkfontdir -e /usr/X11R6/lib/font/encodings
-</verb></tscreen>
-For more information, please see the <tt/mkfontdir/(1) manual page and
-Section <ref id="sec:internationalisation" name="Fonts and
-internationalisation"> later in this document.
-
-<sect1>Installing CID-keyed fonts <label id="sec:cid-fonts">
+`<tt/fonts.scale/'.  While this can be done by hand, it is best done
+by using the `<tt/mkfontscale/' utility.
+<tscreen><verb>
+$ mkfontscale /usr/local/share/fonts/Type1/
+$ mkfontdir /usr/local/share/fonts/Type1/
+</verb></tscreen>
+Under some circumstances, it may be necessary to modify the
+`<tt/fonts.scale/' file generated by <tt/mkfontscale/; for more
+information, please see the <htmlurl name="mkfontdir(1)"
+url="mkfontdir.1.html"> and <htmlurl name="mkfontscale(1)"
+url="mkfontscale.1.html"> manual pages and <ref
+id="sec:internationalisation" name="Core fonts and internationalisation">
+later in this document.
+
+<sect2>Installing CID-keyed fonts <label id="sec:cid-fonts">
 
 <p>The CID-keyed font format was designed by Adobe Systems for fonts
 with large character sets.  A CID-keyed font, or CIDFont for short,
 contains a collection of glyphs indexed by <it/character ID/ (CID).
 
-Adobe make some sample CIDFonts and a complete set of CMaps
-available from 
-<url name="O'Reilly's FTP site"
-     url="ftp://ftp.oreilly.com/pub/examples/nutshell/cjkv/adobe/">.
-
 In order to map such glyphs to meaningful indices, Adobe provide a set
 of <it/CMap/ files.  The PostScript name of a font generated from a
 CIDFont consists of the name of the CIDFont and the name of the CMap
@@ -158,7 +294,7 @@ called
 Munhwa-Regular--UniKS-UCS2-H
 </verb></tscreen>
 
-The CIDFont support in XFree86 requires a very rigid directory
+The CIDFont code in XFree86 requires a very rigid directory
 structure.  The main directory must be called `<tt/CID/' (its location
 defaults to `<tt>/usr/X11R6/lib/X11/fonts/CID</tt>' but it may be
 located anywhere), and it should contain a subdirectory for every CID
@@ -187,7 +323,7 @@ its first column contains PostScript font names with the extension
 Adobe-Korea1/Munhwa-Regular--UniKS-UCS2-H.cid \
   -adobe-munhwa-medium-r-normal--0-0-0-0-p-0-iso10646-1
 </verb></tscreen>
-(both names on the same line).  As above, running `<tt/mkfontdir/'
+(both names on the same line).  Running `<tt/mkfontdir/'
 creates the `<tt/fonts.dir/' file:
 <tscreen><verb>
 $ cd /usr/local/share/fonts/CID
@@ -205,11 +341,11 @@ the CID fonts but querying them will take a long time.  You should run
 fonts, or when the CID-keyed fonts are copied to a machine with a
 different architecture.
 
-<sect1>Setting the server's font path <label id="sec:set-font-path">
+<sect2>Setting the server's font path <label id="sec:set-font-path">
 
 <p>The list of directories where the server looks for fonts is known
 as the <it/font path/.  Informing the server of the existence of a new
-font directory consists in putting it on the font path.
+font directory consists of putting it on the font path.
 
 The font path is an ordered list; if a client's request matches
 multiple fonts, the first one in the font path is the one that gets
@@ -229,7 +365,7 @@ You may check the font path of the running server by typing the command
 $ xset q
 </verb></tscreen>
 
-<sect2>Temporary modification of the font path
+<sect3>Temporary modification of the font path
 
 <p>The `<tt/xset/' utility may be used to modify the font path for the
 current session.  The font path is set with the command <tt/xset fp/;
@@ -242,35 +378,40 @@ $ xset fp+ /usr/local/fonts/bitmap
 
 Conversely, an element may be removed from the front of the font path
 with `<tt/xset -fp/', and removed from the end with `<tt/xset fp-/'.
+You may reset the font path to its default value with 
+`<tt/xset fp default/'.
 
-For more information, please consult the <tt/xset/(1) manual page.
+For more information, please consult the <htmlurl name="xset(1)"
+url="xset.1.html"> manual page.
 
-<sect2>Permanent modification of the font path
+<sect3>Permanent modification of the font path
 
-<p>The default font path (the one used just after server startup) is
-specified in the X server's `<tt/XF86Config/' file.  It is computed by
-appending all the directories mentioned in the `<tt/FontPath/' entries
-of the `<tt/Files/' section in the order in which they appear.
+<p>The default font path (the one used just after server startup or
+after `<tt/xset fp default/') is specified in the X server's
+`<tt/XF86Config/' file.  It is computed by appending all the
+directories mentioned in the `<tt/FontPath/' entries of the
+`<tt/Files/' section in the order in which they appear.
 <tscreen><verb>
 FontPath "/usr/local/fonts/Type1"
 ...
 FontPath "/usr/local/fonts/bitmap"
 </verb></tscreen>
 
-For more information, please consult the `<tt/XF86Config/'(5) manual
-page.
+For more information, please consult the <htmlurl name="XF86Config(5)"
+url="XF86Config.5.html"> manual page.
 
-<sect1>Troubleshooting <label id="sec:troubleshooting">
+<sect2>Troubleshooting <label id="sec:troubleshooting-core">
 
 <p>If you seem to be unable to use some of the fonts you have
 installed, the first thing to check is that the `<tt/fonts.dir/' files
-are correct and that they are readable by the server.  If this doesn't
-help, it is quite possible that you are trying to use a font in a
-format that is not supported by your server.
+are correct and that they are readable by the server (the X server
+usually runs as root, beware of NFS-mounted font directories).  If
+this doesn't help, it is quite possible that you are trying to use a
+font in a format that is not supported by your server.
 
-XFree86 supports the BDF, PCF, SNF, Type 1, Speedo, TrueType and
-CIDFont font formats.  However, not all XFree86 servers come with all
-the font backends configured in.
+XFree86 supports the BDF, PCF, SNF, Type 1, Speedo, TrueType, OpenType
+and CIDFont font formats.  However, not all XFree86 servers come with
+all the font backends configured in.
 
 On most platforms, the XFree86 servers are <it/modular/: the font
 backends are included in modules that are loaded at runtime.  The
@@ -286,12 +427,14 @@ distributed with XFree86 is as follows:
 <itemize>
 <item> <tt/"bitmap"/: bitmap fonts (`<tt/*.bdf/', `<tt/*.pcf/'
 and `<tt/*.snf/');
-<item> <tt/"type1"/: Type&nbsp;1 fonts (`<tt/*.pfa/' and
-`<tt/*.pfb/') and CIDFonts;
-<item> <tt/"speedo"/: Bitstream Speedo fonts (`<tt/*.spd/');
-<item> <tt/"freetype"/: TrueType fonts (`<tt/*.ttf/' and `<tt/*.ttc/');
+<item> <tt/"freetype"/: TrueType fonts (`<tt/*.ttf/' and
+`<tt/*.ttc/'), OpenType fonts (`<tt/*.otf/' and `<tt/*.otc/') and
+Type&nbsp;1 fonts (`<tt/*.pfa/' and `<tt/*.pfb/');
+<item> <tt/"type1"/: alternate Type&nbsp;1 backend (`<tt/*.pfa/' and
+`<tt/*.pfb/') and CIDFont backend;
 <item> <tt/"xtt"/: alternate TrueType backend (`<tt/*.ttf/' and
-`<tt/*.ttc/').
+`<tt/*.ttc/');
+<item> <tt/"speedo"/: Bitstream Speedo fonts (`<tt/*.spd/').
 </itemize>
 Please note that the argument of the `<tt/Load/' directive is
 case-sensitive.
@@ -300,14 +443,15 @@ case-sensitive.
 
 <sect1>Standard bitmap fonts
 
-<p>The Sample Implementation of X11 comes with a large number of
+<p>The Sample Implementation of X11 (SI) comes with a large number of
 bitmap fonts, including the `<tt/fixed/' family, and bitmap versions
-of Courier, Times and Helvetica.  In the SI, these fonts are provided
-in the ISO&nbsp;8859-1 encoding (ISO Latin Western-European).
+of Courier, Times, Helvetica and some members of the Lucida family.  In
+the SI, these fonts are provided in the ISO&nbsp;8859-1 encoding (ISO
+Latin Western-European).
 
 In XFree86, a number of these fonts are provided in Unicode-encoded
 font files instead.  At build time, these fonts are split into font
-files encoded according to legacy encodings, a process which enables
+files encoded according to legacy encodings, a process which allows
 us to provide the standard fonts in a number of regional encodings
 with no duplication of work.
 
@@ -321,7 +465,7 @@ with XLFD
 </verb></tscreen>
 is a Unicode-encoded version of the standard `<tt/fixed/' font with
 added support for the Latin, Greek, Cyrillic, Georgian, Armenian, IPA
-and other scripts plus numerous technical symbols. It contains over
+and other scripts plus numerous technical symbols.  It contains over
 2800 glyphs, covering all characters of ISO&nbsp;8859 parts 1-5,
 7-10, 13-15, as well as all European IBM and Microsoft code pages,
 KOI8, WGL4, and the repertoires of many other character sets.
@@ -330,29 +474,14 @@ This font is used at build time for generating the font files
 <tscreen><verb>
 6x13-ISO8859-1.bdf
 6x13-ISO8859-2.bdf
-6x13-ISO8859-3.bdf
-6x13-ISO8859-4.bdf
-6x13-ISO8859-5.bdf
-6x13-ISO8859-7.bdf
-6x13-ISO8859-8.bdf
-6x13-ISO8859-9.bdf
-6x13-ISO8859-10.bdf
-6x13-ISO8859-13.bdf
+...
 6x13-ISO8859-15.bdf
 6x13-KOI8-R.bdf
 </verb></tscreen>
 with respective XLFDs
 <tscreen><verb>
 -misc-fixed-medium-r-normal--13-120-75-75-c-60-iso8859-1
--misc-fixed-medium-r-normal--13-120-75-75-c-60-iso8859-2
--misc-fixed-medium-r-normal--13-120-75-75-c-60-iso8859-3
--misc-fixed-medium-r-normal--13-120-75-75-c-60-iso8859-4
--misc-fixed-medium-r-normal--13-120-75-75-c-60-iso8859-5
--misc-fixed-medium-r-normal--13-120-75-75-c-60-iso8859-7
--misc-fixed-medium-r-normal--13-120-75-75-c-60-iso8859-8
--misc-fixed-medium-r-normal--13-120-75-75-c-60-iso8859-9
--misc-fixed-medium-r-normal--13-120-75-75-c-60-iso8859-10
--misc-fixed-medium-r-normal--13-120-75-75-c-60-iso8859-13
+...
 -misc-fixed-medium-r-normal--13-120-75-75-c-60-iso8859-15
 -misc-fixed-medium-r-normal--13-120-75-75-c-60-koi8-r
 </verb></tscreen>
@@ -361,10 +490,6 @@ The standard short name `<tt/fixed/' is normally an alias for
 -misc-fixed-medium-r-normal--13-120-75-75-c-60-iso8859-1
 </verb></tscreen>
 
-(The conversion of the standard fonts to Unicode was mainly performed
-by Markus Kuhn.  Markus is a man of taste, which makes his use of Perl
-in the conversion process somewhat surprising.)
-
 <sect1>The ClearlyU Unicode font family
 
 <p>The ClearlyU family of fonts provides a set of 12&nbsp;pt,
@@ -403,10 +528,6 @@ of the characters in the ISO&nbsp;10646 standard.
 The <it/Ligature/ font contains ligatures for various scripts that
 may be useful for improved presentation of text.
 
-(The ClearlyU family was designed by Mark Leisher.  Mark's usage of
-the foundry name <it/mutt/ predates the mailer of the same name, but
-he won't say more.)
-
 <sect1>Standard scalable fonts
 
 <p>XFree86 includes all the scalable fonts distributed with X11R6.
@@ -449,8 +570,8 @@ and reside in the font files
 
 <p>XFree86 includes Speedo versions of the Bitstream Courier and
 Charter fonts.  In order to use these fonts, you should ensure that
-your X server is loading the `<tt/Speedo/' font backend; see Section
-<ref id="sec:troubleshooting" name="Troubleshooting">.
+your X server is loading the `<tt/Speedo/' font backend; see 
+<ref id="sec:troubleshooting-core" name="Troubleshooting">.
 
 These fonts cover all of ISO&nbsp;8859-1 and almost all of
 ISO&nbsp;8859-2.  They have XLFD name
@@ -485,14 +606,14 @@ range, the Latin&nbsp;1 range, as well as the <it/Extended Latin/
 range and some additional punctuation characters.  In particular,
 these fonts include all the glyphs needed for ISO&nbsp;8859 parts 1,
 2, 3, 4, 9, 13 and 15, as well as all the glyphs in the Adobe Standard
-encoding and the Windows 3.1  character set.
+encoding and the Windows 3.1 character set.
 
 The glyph coverage of the Type&nbsp;1 versions is somewhat reduced,
 and only covers ISO&nbsp;8859 parts 1, 2 and 15 as well as the Adobe
 Standard encoding.
 
 The Luxi fonts are original designs by Kris Holmes and Charles 
-Bigelow. Luxi fonts include seriffed, sans serif, and monospaced 
+Bigelow.  Luxi fonts include seriffed, sans serif, and monospaced 
 styles, in roman and oblique, and normal and bold weights. The fonts 
 share stem weight, x-height, capital height, ascent and descent, for 
 graphical harmony.
@@ -519,13 +640,18 @@ For more information, please contact
 An earlier version of the Luxi fonts was made available under the
 name <em/Lucidux/.  This name should no longer be used due to trademark
 uncertainties, and all traces of the <em/Lucidux/ name have been
-removed from this version of XFree86.
+removed from XFree86.
+
+<sect>More about core fonts <label id="sec:more-core">
 
-<sect>Fonts and internationalisation <label id="sec:internationalisation">
+<p>This section describes XFree86-specific enhancements to the core
+X11 fonts system.
+
+<sect1>Core fonts and internationalisation <label id="sec:internationalisation">
 
 <p>The scalable font backends (Type&nbsp;1, Speedo and TrueType) can
-now automatically re-encode fonts to the encoding specified in the
-XLFD in <tt/fonts.dir/.  For example, a <tt/fonts.dir/ file can
+automatically re-encode fonts to the encoding specified in the
+XLFD in `<tt/fonts.dir/'.  For example, a `<tt/fonts.dir/' file can
 contain entries for the Type&nbsp;1 Courier font such as
 <tscreen><verb>
 cour.pfa -adobe-courier-medium-r-normal--0-0-0-0-m-0-iso8859-1 
@@ -534,7 +660,7 @@ cour.pfa -adobe-courier-medium-r-normal--0-0-0-0-m-0-iso8859-2
 which will lead to the font being recoded to ISO&nbsp;8859-1 and
 ISO&nbsp;8859-2 respectively.
 
-<sect1>The <it/fontenc/ layer <label id="sec:fontenc">
+<sect2>The <it/fontenc/ layer <label id="sec:fontenc">
 
 <p>Three of the scalable backends (Type&nbsp;1, Speedo, and the
 <it/FreeType/ TrueType backend) use a common <it/fontenc/ layer for
@@ -545,10 +671,9 @@ font type.
 <it/Please note:/ the X-TrueType (X-TT) backend does not use the
 <it/fontenc/ layer, but instead uses its own method for font
 reencoding.  If you are only interested in X-TT you may want to skip
-to Section <ref id="sec:symbol-fonts" name="Using Symbol Fonts">, as
+to <ref id="sec:symbol-fonts" name="Using Symbol Fonts">, as
 the intervening information does not apply to X-TT.  X-TT itself is
-described in more detail in Section <ref id="sec:X-TT"
-name="X-TrueType">.
+described in more detail in <ref id="sec:X-TT" name="X-TrueType">.
 
 In the <it/fontenc/ layer, an encoding is defined by a name (such as
 <tt/iso8859-1/), possibly a number of aliases (alternate names), and
@@ -576,7 +701,7 @@ redefined.  These include:
   Western-European);
 <item> <tt/koi8-r/: KOI8 Russian;
 <item> <tt/koi8-u/: KOI8 Ukrainian (see RFC 2319);
-<item> <tt/koi8-ru/: KOI8 Russian/Ukrainian
+<item> <tt/koi8-ru/: KOI8 Russian/Ukrainian;
 <item> <tt/koi8-uni/: KOI8 ``Unified'' (Russian, Ukrainian, and
   Byelorussian);
 <item> <tt/koi8-e/: KOI8 ``European,'' ISO-IR-111, or ECMA-Cyrillic;
@@ -592,39 +717,47 @@ file named `<tt/encodings.dir/'.  If found, this file is scanned for
 the requested encoding, and the relevant encoding definition file is
 read in.  The `<tt/mkfontdir/' utility, when invoked with the
 `<tt/-e/' option followed by the name of a directory containing
-encoding files, can be used to automatically build
-`<tt/encodings.dir/' files.  See the <tt/mkfontdir/(1) manual page for
-more details.
+encoding files, can be used to automatically build `<tt/encodings.dir/'
+files.  Please see the <htmlurl name="mkfontdir(1)" url="mkfontdir.1.html">
+manual page for more details.
 
 A number of encoding files for common encodings are included with
 XFree86.  Information on writing new encoding files can be found in
-Section <ref id="sec:format-encoding-directory-files" name="Format of
+<ref id="sec:format-encoding-directory-files" name="Format of
 encodings directory files"> and <ref id="sec:format-encoding-files"
 name="Format of encoding files"> later in this document.
 
-<sect1>Backend-specific notes about fontenc
+<sect2>Backend-specific notes about fontenc
+
+<sect3>The <it/FreeType/ backend <label id="sec:fontenc-freetype"
 
-<sect2>Type&nbsp;1
+<p>For TrueType and OpenType fonts, the FreeType backend scans the
+mappings in order.  Mappings with a target of PostScript are ignored;
+mappings with a TrueType or Unicode target are checked against all the
+cmaps in the file.  The first applicable mapping is used.
 
-<p>The Type&nbsp;1 backend first searches for a mapping with a target
-of PostScript.  If one is found, it is used.  Otherwise, the
-backend searches for a mapping with target Unicode, which is then
-composed with a built-in table mapping codes to glyph names.  Note
-that this table only covers part of the Unicode code points that have
-been assigned names by Adobe.
+For Type&nbsp;1 fonts, the FreeType backend first searches for a
+mapping with a target of PostScript.  If one is found, it is used.
+Otherwise, the backend searches for a mapping with target Unicode,
+which is then composed with a built-in table mapping codes to glyph
+names.  Note that this table only covers part of the Unicode code
+points that have been assigned names by Adobe.
 
-If neither a PostScript or Unicode mapping is found, the backend
-defaults to ISO&nbsp;8859-1.
+Specifying an encoding value of <tt/adobe-fontspecific/ for a
+Type&nbsp;1 font disables the encoding mechanism.  This is useful with
+symbol and incorrectly encoded fonts (see <ref
+id="sec:incorrect-encoding" name="Incorrectly encoded fonts"> below).
 
-Specifying an encoding value of <tt/adobe-fontspecific/ disables
-the encoding mechanism.  This is useful with symbol and incorrectly
-encoded fonts (see Section 
-<ref id="sec:incorrect-encoding" name="Incorrectly encoded fonts">
-below).
+If a suitable mapping is not found, the FreeType backend defaults to
+ISO&nbsp;8859-1.
+
+<sect3>Type&nbsp;1
 
-The Type&nbsp;1 backend currently limits all encodings to 8-bit codes.
+<p>The Type&nbsp;1 backend behaves similarly to the FreeType backend
+with Type&nbsp;1 fonts, except that it limits all encodings to 8-bit
+codes.
 
-<sect2>Speedo
+<sect3>Speedo
 
 <p>The Speedo backend searches for a mapping with a target of Unicode,
 and uses it if found.  If none is found, the backend defaults to
@@ -632,28 +765,19 @@ ISO&nbsp;8859-1.
 
 The Speedo backend limits all encodings to 8-bit codes.
 
-<sect2>The <it/FreeType/ TrueType backend <label id="sec:fontenc-freetype"
-
-<p>The TrueType backend scans the mappings in order.  Mappings with a
-target of PostScript are ignored; mappings with a TrueType or Unicode
-target are checked against all the cmaps in the file.  The first
-applicable mapping is used.
-
-If you are writing an encoding file to be used with the TrueType
-backend, you should ensure that mappings are mentioned in decreasing
-order of preference.
-
-<sect1>Format of encoding directory files <label id="sec:format-encoding-directory-files">
+<sect2>Format of encoding directory files <label id="sec:format-encoding-directory-files">
 
 <p>In order to use a font in an encoding that the font backend does
-not know about, you need to have an `<tt/encodings.dir/' file in the
-same directory as the font file used.  The `<tt/encodings.dir/' file
-has a similar format to `<tt/fonts.dir/'.  Its first line specifies
-the number of encodings, while every successive line has two columns,
-the name of the encoding, and the name of the encoding file; this can
-be relative to the current directory, or absolute.  Every encoding
-name should agree with the encoding name defined in the encoding file.
-For example,
+not know about, you need to have an `<tt/encodings.dir/' file either
+in the same directory as the font file used or in a system-wide
+location (`<tt>/usr/X11R6/lib/X11/fonts/encodings/</tt>' by default).
+
+The `<tt/encodings.dir/' file has a similar format to
+`<tt/fonts.dir/'.  Its first line specifies the number of encodings,
+while every successive line has two columns, the name of the encoding,
+and the name of the encoding file; this can be relative to the current
+directory, or absolute.  Every encoding name should agree with the
+encoding name defined in the encoding file.  For example,
 
 <tscreen><verb>
 3
@@ -670,10 +794,10 @@ If your platform supports it (it probably does), encoding files may be
 compressed or gzipped.
 
 The `<tt/encoding.dir/' files are best maintained by the
-`<tt/mkfontdir/' utility.  Please see the <tt/mkfontdir/(1) manual
-page for more information.
+`<tt/mkfontdir/' utility.  Please see the <htmlurl name="mkfontdir(1)"
+url="mkfontdir.1.html"> manual page for more information.
 
-<sect1>Format of encoding files <label id="sec:format-encoding-files">
+<sect2>Format of encoding files <label id="sec:format-encoding-files">
 
 <p>The encoding files are ``free form,'' <it/i.e./ any string of
 whitespace is equivalent to a single space.  Keywords are parsed in a
@@ -693,7 +817,6 @@ encoding, and possibly its alternate names (aliases):
 <tscreen><verb>
 STARTENCODING mulearabic-0
 ALIAS arabic-0
-ALIAS something-else
 </verb></tscreen>
 The name of the encoding and its aliases should be suitable for use in
 an XLFD font name, and therefore contain exactly one dash `<tt/-/'.
@@ -818,7 +941,7 @@ In order to make future extensions to the format possible, lines
 starting with an unknown keyword are silently ignored, as are mapping
 sections with an unknown target.
 
-<sect1>Using symbol fonts <label id="sec:symbol-fonts">
+<sect2>Using symbol fonts <label id="sec:symbol-fonts">
 
 <p>Type&nbsp;1 symbol fonts should be installed using the
 <tt/adobe-fontspecific/ encoding.
@@ -833,22 +956,23 @@ In order to guarantee consistent results (especially between
 Type&nbsp;1 and TrueType versions of the same font), it is possible to
 define a special encoding for a given font. This has already been done
 for the <tt/ZapfDingbats/ font; see the file
-<tt>encodings/adobe-dingbats.enc</tt>.
+`<tt>encodings/adobe-dingbats.enc</tt>'.
 
-<sect1>Hints about using badly encoded fonts <label id="sec:incorrect-encoding">
+<sect2>Hints about using badly encoded fonts <label id="sec:incorrect-encoding">
 
 <p>A number of text fonts are incorrectly encoded. Incorrect encoding
 is sometimes done by design, in order to make a font for an exotic
-script appear like an ordinary Western text font.  It is often the
-result of the font designer's laziness or incompetence; for some
-reason, most people seem to find it easier to invent idiosyncratic
-glyph names rather than follow the Adobe glyph list.
+script appear like an ordinary Western text font on systems which are
+not easily extended with new locale data.  It is often the result of
+the font designer's laziness or incompetence; for some reason, most
+people seem to find it easier to invent idiosyncratic glyph names
+rather than follow the Adobe glyph list.
 
 There are two ways of dealing with such fonts: using them with the
 encoding they were designed for, and creating an <it/ad hoc/ encoding
 file.
 
-<sect2>Using fonts with the designer's encoding
+<sect3>Using fonts with the designer's encoding
 
 <p>In the case of Type&nbsp;1 fonts, the font designer can specify a
 default encoding; this encoding is requested by using the
@@ -865,13 +989,13 @@ so one of `<tt/microsoft-symbol/', `<tt/microsoft-cp1252/',
 `<tt/microsoft-win3.1/', or `<tt/apple-roman/' should yield reasonable
 results.
 
-<sect2>Specifying an <it/ad hoc/ encoding file
+<sect3>Specifying an <it/ad hoc/ encoding file
 
 <p>It is always possible to define an encoding file to put the glyphs
 in a font in any desired order. Again, see the
 `<tt>encodings/adobe-dingbats.enc</tt>' file to see how this is done.
 
-<sect2>Specifying font aliases
+<sect3>Specifying font aliases
 
 <p>By following the directions above, you will find yourself with a
 number of fonts with unusual names --- with encodings such as
@@ -880,37 +1004,31 @@ to use these fonts with standard applications, it may be useful to
 remap them to their proper names.
 
 This is done by writing a `<tt/fonts.alias/' file. The format of this file
-is very simple: it consists of a series of lines each mapping an alias name to a font name.  A `<tt/fonts.alias/' file might look as follows:
+is very simple: it consists of a series of lines each mapping an alias 
+name to a font name.  A `<tt/fonts.alias/' file might look as follows:
 <tscreen><verb>
 "-ogonki-alamakota-medium-r-normal--0-0-0-0-p-0-iso8859-2" \
   "-ogonki-alamakota-medium-r-normal--0-0-0-0-p-0-adobe-fontspecific"
 </verb></tscreen>
 (both XLFD names on a single line).  The syntax of the
 `<tt/fonts.alias/' file is more precisely described in the
-<tt/mkfontdir/(1) manual page.
+<htmlurl name="mkfontdir(1)" url="mkfontdir.1.html"> manual page.
 
-<sect>Additional notes about TrueType support
+<sect1>Additional notes about scalable core fonts
 
-<p>This version of XFree86 comes with two TrueType backends,
-<it/FreeType/ (module `<tt/freetype/', formerly known as <it/xfsft/) and
-<it/X-TrueType/ (module `<tt/xtt/').  These two backends are <it/not/
-compatible: only one of them can be used at any one time.
+<p>The FreeType backend (module `<tt/freetype/', formerly known
+as <it/xfsft/) is able to deal with both TrueType and Type&nbsp;1
+fonts.  This puts it in conflict with the X-TT and Type&nbsp;1
+backends respectively.
 
-In order to use the <it/FreeType/ backend, please check that the
-`<tt/Module/' section of your `<tt/XF86Config/' file contains a line
-that reads
-<tscreen><verb>
-Load "freetype"
-</verb></tscreen>
+If both the FreeType and the Type&nbsp;1 backends are loaded, the
+FreeType backend will be used for Type&nbsp;1 fonts.  If both the
+FreeType and X-TT backends are loaded, X-TT will be used for TrueType
+fonts.
 
-In order to use the <it/X-TrueType/ backend, replace the line in your
-<tt/XF86Config/ file that loads the <tt/freetype/ module with a
-line that reads
-<tscreen><verb>
-    Load "xtt"
-</verb></tscreen>
+<sect2>Delayed glyph rasterisation
 
-Both TrueType backends delay glyph rasterisation up to the time at
+<p>Both FreeType and X-TT delay glyph rasterisation up to the time at
 which a glyph is first used.  For this reason, they only provide an
 approximate value for the ``average width'' font property.
 
@@ -925,14 +1043,17 @@ trust the font really to be a character-cell font.  You are
 encouraged to make use of this optimisation when useful, but be warned
 that not all monospaced fonts are character-cell fonts.
 
-<sect1>The <it/FreeType/ TrueType backend
+<sect2>About the <it/FreeType/ backend
 
-<p>The <it/FreeType/ backend (formerly <it/xfsft/) is a backend based on
-the FreeType library (see <url url="http://www.freetype.org/"
-name="the FreeType web site">) and has support for the ``fontenc''
-style of internationalisation (see Section <ref id="sec:fontenc"
-name="The fontenc layer">).  This backend supports TrueType Font files
-(`<tt/*.ttf/') and TrueType Collections (`<tt/*.ttc/').
+<p>The <it/FreeType/ backend (formerly <it/xfsft/) is a backend based
+on version 2 of the FreeType library (see <url
+url="http://www.freetype.org/" name="the FreeType web site">) and has
+support for the ``fontenc'' style of internationalisation (see 
+<ref id="sec:fontenc" name="The fontenc layer">).  This backend
+supports TrueType font files (`<tt/*.ttf/'), OpenType font files
+(`<tt/*.otf/'), TrueType Collections (`<tt/*.ttc/'), OpenType
+Collections (`<tt/*.otc/') and Type 1 font files (`<tt/*.pfa/' and
+`<tt/*.pfb/').
 
 In order to access the faces in a TrueType Collection file, the face
 number must be specified in the fonts.dir file before the filename
@@ -943,21 +1064,21 @@ within colons.  For example,
 refers to face 2 in the `<tt/mincho.ttc/' TrueType Collection file.
 
 The <it/FreeType/ backend uses the <it/fontenc/ layer in order to
-support recoding of fonts; this was described in Section <ref
-id="sec:fontenc" name="The fontenc layer"> and especially Section <ref
+support recoding of fonts; this was described in <ref
+id="sec:fontenc" name="The fontenc layer"> and especially <ref
 id="sec:fontenc-freetype" name="FreeType-specific notes about
 fontenc"> earlier in this document.
 
-<sect1>The <it/X-TrueType/ TrueType backend <label id="sec:X-TT">
+<sect2>About the <it/X-TrueType/ TrueType backend <label id="sec:X-TT">
 
-<p>The `X-TrueType' backend is another backend based on the FreeType
-library.  X-TrueType doesn't use the `fontenc' layer for managing font
-encodings, but instead uses its own database of encodings.  However,
-X-TrueType includes a large number of encodings, and any encoding you
-need is likely to be present in X-TrueType.
+<p>The `X-TrueType' backend is a backend based on version 1 of the
+FreeType library.  X-TrueType doesn't use the `fontenc' layer for
+managing font encodings, but instead uses its own database of
+encodings.
 
 X-TrueType extends the `<tt/fonts.dir/' syntax with a number of options,
-known as `TTCap'.  A `TTCap' entry follows the general syntax
+collectively known as `TTCap'.  A `TTCap' entry follows the general
+syntax
 <tscreen><verb>
 :option=value:
 </verb></tscreen>
@@ -979,29 +1100,28 @@ home page">.
 <p>A computer text-processing system inputs keystrokes and outputs
 <it/glyphs/, small pictures that are assembled on paper or on a
 computer screen.  Keystrokes and glyphs do not, in general, coincide:
-for example, if the system does generate ligatures, then to the two
-keystrokes &lt;<tt/f/&gt;&lt<tt/i/&gt; will typically correspond a
-single glyph.  Similarly, if the system shapes Arabic glyphs in a
-reasonable manner, then multiple different glyphs may correspond to
-a single keystroke.
+for example, if the system does generate ligatures, then to the
+sequence of two keystrokes &lt;<tt/f/&gt;&lt<tt/i/&gt; will typically
+correspond a single glyph.  Similarly, if the system shapes Arabic
+glyphs in a vaguely reasonable manner, then multiple different glyphs
+may correspond to a single keystroke.
 
 The complex transformation rules from keystrokes to glyphs are usually
-factored into two simpler transformations, going through the
-intermediary of <it/characters/.  You may want to think of characters
-as the basic unit of data that is stored <it/e.g./ in the buffer of
-your text editor.  While the definition of a character is intrinsically
-application-specific, a number of standardised collections of
-characters have been defined.
+factored into two simpler transformations, from keystrokes to
+<it/characters/ and from characters to glyphs.  You may want to think
+of characters as the basic unit of text that is stored <it/e.g./ in
+the buffer of your text editor.  While the definition of a character
+is intrinsically application-specific, a number of standardised
+collections of characters have been defined.
 
 A <it/coded character set/ is a set of characters together with a
 mapping from integer codes --- known as <it/codepoints/ --- to
 characters.  Examples of coded character sets include US-ASCII,
 ISO&nbsp;8859-1, KOI8-R, and JIS&nbsp;X&nbsp;0208(1990).
 
-A coded character set need not use 8 bit integers to index
-characters. Many early mainframes used 6 bit character sets, while
-16 bit (or more) character sets are necessary for ideographic writing
-systems.
+A coded character set need not use 8 bit integers to index characters.
+Many early systems used 6 bit character sets, while 16 bit (or more)
+character sets are necessary for ideographic writing systems.
 
 <sect1>Font files, fonts, and XLFD <label id="sec:xlfd">
 
@@ -1010,7 +1130,7 @@ systems.
 Times Italic, while a fount is a molten-lead incarnation of a given
 typeface at a given size.
 
-Digital fonts come in <it/font files/.  A font file contains all the
+Digital fonts come in <it/font files/.  A font file contains the
 information necessary for generating glyphs of a given typeface, and
 applications using font files may access glyph information in an
 arbitrary order.
@@ -1020,7 +1140,7 @@ to be <it/bitmap fonts/.  They may also consist of a mathematical
 description of glyph shapes, in which case they are said to be
 <it/scalable fonts/.  Common formats for scalable font files are
 <it/Type&nbsp;1/ (sometimes incorrectly called <it/ATM fonts/ or
-<it/PostScript fonts/), <it/Speedo/ and <it/TrueType/.
+<it/PostScript fonts/), <it/TrueType/ and <it/Speedo/.
 
 The glyph data in a digital font needs to be indexed somehow.  How
 this is done depends on the font file format.  In the case of
@@ -1028,31 +1148,36 @@ Type&nbsp;1 fonts, glyphs are identified by <it/glyph names/.  In the
 case of TrueType fonts, glyphs are indexed by integers corresponding
 to one of a number of indexing schemes (usually Unicode --- see below).
 
-The X11 system uses the data in font file to generate <it/font
-instances/, which are collections of glyphs at a given size indexed
-according to a given encoding.
+The X11 core fonts system uses the data in a font file to generate
+<it/font instances/, which are collections of glyphs at a given size
+indexed according to a given encoding.
 
-X11 font instances are usually specified using a notation known as the
-<it/X Logical Font Description/ (XLFD).  An XLFD starts with a dash
-`<tt/-/', and consists of fourteen fields separated by dashes, for
-example
+X11 core font instances are usually specified using a notation known
+as the <it/X Logical Font Description/ (XLFD).  An XLFD starts with a
+dash `<tt/-/', and consists of fourteen fields separated by dashes,
+for example:
 <tscreen><verb>
--adobe-courier-medium-r-normal--0-0-0-0-m-0-iso8859-1
+-adobe-courier-medium-r-normal--12-120-75-75-m-70-iso8859-1
 </verb></tscreen>
 Or particular interest are the last two fields `<tt/iso8859-1/', which
 specify the font instance's encoding.
 
+A scalable font is specified by an XLFD which contains zeroes instead
+of some fields:
+<tscreen><verb>
+-adobe-courier-medium-r-normal--0-0-0-0-m-0-iso8859-1
+</verb></tscreen>
+
 X11 font instances may also be specified by short name.  Unlike an
 XLFD, a short name has no structure and is simply a conventional name
 for a font instance.  Two short names are of particular interest, as
-they are handled specially by the server, and the server will not
-start if font instances with these names cannot be opened.  These are
-`<tt/fixed/', which specifies the fallback font to use when the
-requested font cannot be opened, and `<tt/cursor/', which specifies
-the set of glyphs to be used by the mouse pointer.
+the server will not start if font instances with these names cannot be
+opened.  These are `<tt/fixed/', which specifies the fallback font to
+use when the requested font cannot be opened, and `<tt/cursor/', which
+specifies the set of glyphs to be used by the mouse pointer.
 
 Short names are usually implemented as aliases to XLFDs; the
-`<tt/fixed/' and `<tt/cursor/' aliases are defined in
+standard `<tt/fixed/' and `<tt/cursor/' aliases are defined in
 <tscreen><verb>
 /usr/X11R6/lib/X11/font/misc/fonts.alias
 </verb></tscreen>
@@ -1068,40 +1193,59 @@ such.
 Unicode is an <it/open/ character set, meaning that codepoint
 assignments may be added to Unicode at any time (once specified,
 though, an assignment can never be changed).  For this reason, a
-Unicode font will be <it/sparse/, and only define glyphs for a subset
-of the character registry of Unicode.
+Unicode font will be <it/sparse/, meaning that it only defines glyphs
+for a subset of the character registry of Unicode.
 
 The Unicode standard is defined in parallel with the international
 standard ISO&nbsp;10646.  Assignments in the two standards are always
-equivalent, and this document uses the terms <it/Unicode/ and
+equivalent, and we often use the terms <it/Unicode/ and
 <it/ISO&nbsp;10646/ interchangeably.
 
-When used in X11, Unicode-encoded fonts should have the last two
-fields of their XLFD set to `<tt/iso10646-1/'.
+When used in the X11 core fonts system, Unicode-encoded fonts should
+have the last two fields of their XLFD set to `<tt/iso10646-1/'.
 
 <sect>References
 
 <p>XFree86 comes with extensive documentation in the form of manual
-pages and typeset documents.  Before installing fonts, you really
-should read the <tt/mkfontdir/(1) manual page; other manual pages of
-interest include <tt/X/(1), <tt/Xserver/(1), <tt/xset/(1),
-<tt/xlsfonts/(1) and <tt/showfont/(1).  In addition, you may want to
-read the X Logical Font Description document, by Jim Flowers, which is
-provided in the file `<tt>xc/doc/xlfd.PS.Z</tt>'.
+pages and typeset documents.  Before installing fonts, you really should
+read the <htmlurl name="fontconfig(3)" url="fontconfig.3.html"> and
+<htmlurl name="mkfontdir(1)" url="mkfontdir.1.html"> manual pages; other
+manual pages of interest include <htmlurl name="X(7)" url="X.7.html">,
+<htmlurl name="Xserver(1)" url="Xserver.1.html">, <htmlurl name="xset(1)"
+url="xset.1.html">, <htmlurl name="Xft(3)" url="Xft.3.html">, <htmlurl
+name="xlsfonts(1)" url="xlsfonts.1.html"> and <htmlurl name="showfont(1)"
+url="showfont.1.html">.  In addition, you may want to read the X Logical
+Font Description document, by Jim Flowers, which is provided in the file
+`<tt>xc/doc/xlfd.PS.Z</tt>'.
+
+The latest released version of the XFree86 documentation (including
+this document and all manual pages) is available as
+<url name="current XFree86 documentation"
+     url="http://www.xfree86.org/current/">.
 
 The <url name="comp.fonts FAQ"
-url="http://www.netmeg.net/faq/computers/fonts/">, which is
-unfortunately no longer being maintained, contains a wealth of
-information about digital fonts.
+         url="http://www.netmeg.net/faq/computers/fonts/">, 
+which is unfortunately no longer being maintained, contains a wealth
+of information about digital fonts.
+
+Xft and Fontconfig are described on
+<url name="Keith Packard's Fontconfig site"
+     url="http://www.fontconfig.org">.
 
 The 
 <url name="xfsft home page"
      url="http://www.dcs.ed.ac.uk/home/jec/programs/xfsft/">
 has been superseded by this document, and is now obsolete; you may
-however still find some of the information it contains useful.  <url
-name="Joerg Pommnitz' xfsft page"
-url="http://www.joerg-pommnitz.de/TrueType/xfsft.html"> is the
-canonical source for the `<tt/ttmkfdir/' utility.
+however still find some of the information that it contains useful.
+<url name="Joerg Pommnitz' xfsft page"
+     url="http://www.joerg-pommnitz.de/TrueType/xfsft.html"> 
+is the canonical source for the `<tt/ttmkfdir/' utility, which is the
+ancestor of <tt/mkfontscale/.
+
+<url name="The author's software pages"
+     url="http://www.pps.jussieu.fr/~jch/software/">
+might or might not contain related scribbles and development versions
+of software.
 
 The documentation of <it/X-TrueType/ is available from
 <url url="http://x-tt.dsl.gr.jp/" name="the X-TrueType home page">.
@@ -1110,15 +1254,14 @@ A number of East-Asian CIDFonts are available from
 <url name="O'Reilly's FTP site"
      url="ftp://ftp.oreilly.com/pub/examples/nutshell/cjkv/adobe/">. 
 
-The <url url="http://www.unicode.org" name="Unicode consortium site">
-may be of interest.  But you are more likely to find what you need on
+While the <url url="http://www.unicode.org" name="Unicode consortium site">
+may be of interest,  you are more likely to find what you need in
 Markus Kuhn's <url url="http://www.cl.cam.ac.uk/~mgk25/unicode.html"
 name="UTF-8 and Unicode FAQ">.
 
 The IANA RFC documents, available from a number of sites throughout
 the world, often provide interesting information about character set
-issues; my favourite is RFC&nbsp;373.
+issues; see for example RFC&nbsp;373.
 
 </article>
-<!-- Who was it who wrote the Linuxdoc DTD, and was he drunk at the
-     time ? -->
+<!-- Who was it who designed Linuxdoc, and was he drunk at the time? -->
diff --git a/xc/programs/Xserver/hw/xfree86/doc/sgml/index.pre b/xc/programs/Xserver/hw/xfree86/doc/sgml/index.pre
index 7dc538a9b..35b97ac29 100644
--- a/xc/programs/Xserver/hw/xfree86/doc/sgml/index.pre
+++ b/xc/programs/Xserver/hw/xfree86/doc/sgml/index.pre
@@ -8,10 +8,10 @@
 <!-- Title information -->
 <title>Documentation for XFree86&trade; version &relvers;
 <author>The XFree86 Project, Inc
-<date>18 January 2002
+<date>27 February 2003
 
 <!--
-$XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/index.pre,v 1.13 2002/01/15 21:24:46 dawes Exp $ 
+$XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/index.pre,v 1.19 2003/02/24 03:41:25 dawes Exp $ 
 -->
 
 <p>
diff --git a/xc/programs/Xserver/hw/xfree86/doc/sgml/mouse.sgml b/xc/programs/Xserver/hw/xfree86/doc/sgml/mouse.sgml
index f0d960394..88c647c7f 100644
--- a/xc/programs/Xserver/hw/xfree86/doc/sgml/mouse.sgml
+++ b/xc/programs/Xserver/hw/xfree86/doc/sgml/mouse.sgml
@@ -5,10 +5,10 @@
 <article>
 <title>Mouse Support in XFree86
 <author>Kazutaka Yokota
-<date>9 February 2000
+<date>17 December 2002
 
 <ident>
-$XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/mouse.sgml,v 1.12 2002/02/22 21:45:13 dawes Exp $
+$XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/mouse.sgml,v 1.13 2002/12/17 20:55:22 dawes Exp $
 </ident>
 
 <toc>
@@ -493,6 +493,36 @@ counts per inch, if possible:
 Not all mice and OSs can support this option.
 This option can be set in the <tt>XF86Setup</tt> program.
 
+<sect1>Drag Lock Buttons <p>
+Some people find it difficult or inconvenient to hold a trackball
+button down, while at the same time moving the ball. Drag lock buttons
+simulate the holding down of another button. When a drag lock button
+is  first pressed, its target buttons is "locked" down until the
+second time the lock button is released, or until the button itself
+is pressed and released. This allows the starting of a drag, the movement
+of the trackball, and the ending of the drag to be separate operations.
+
+<verb>
+	Option	"DragLockButtons"	"W X Y Z"
+</verb>
+
+This option consists of pairs of buttons. Each lock button number
+is followed by the number of the button that it locks. In the above,
+button number "W" is a drag lock button for button "X" and button number
+"Y" is a drag lock button for button "Z".
+
+It may not be desirable to use multiple buttons as drag locks.
+Instead, a "master drag lock button" may be defined. A master drag
+lock button acts as a "META" key. After a master lock button is released,
+the next button pressed is "locked" and not released until the
+second time the real button is released.
+
+<verb>
+	Option	"DragLockButtons"	"M"
+</verb>
+
+Since button "M" is unpaired it is a master drag lock button.
+
 <sect>Mouse Gallery <p>
 
 In all of the examples below, it is assumed that <tt>/dev/mouse</tt> is
@@ -571,9 +601,10 @@ mouse detection:
 	Option	"Protocol"	"Auto"
 </verb>
 
-<sect1>Kensington Thinking Mouse (serial, PS/2) <p>
-This mouse has four buttons.
-Thinking Mouse supports the PnP COM device specification.
+<sect1>Kensington Thinking Mouse and Kensington Expert Mouse (serial, PS/2) <p>
+These mice have four buttons.
+The Kensington Expert Mouse is really a trackball.
+Both Thinking mice  support the PnP COM device specification.
 <p>
 To use this mouse as a serial device:
 <verb>
@@ -1032,5 +1063,41 @@ EndSection
 The movement of the first wheel is mapped to the button 4 and 5.  The
 second wheel's movement will be reported as the buttons 6 and 7.
 
+The Kensington Expert mouse is really a trackball. It has 4 buttons
+arranged in a rectangle around the ball.
+
+<code>
+Section "InputDevice"
+	Identifier  "DLB"
+	Driver      "mouse"
+	Option      "Protocol" "ThinkingMousePS/2"
+	Option      "Buttons" "3"
+	Option      "Emulate3Buttons"
+	Option      "Device" "/dev/mouse"
+	Option      "DragLockButtons" "2 1 4 3"
+EndSection
+</code>
+In this example, button 2 is a drag lock button for button
+number 1, and button 4 is a drag lock button for button 3.
+Since button 2 is above button 1 and button 4 is above button 3
+in the layout of this trackball, this is reasonable.
+
+Because button 2 is being used as a drag lock, it can not be
+used as an ordinary button. However, it can be activated by
+using the "Emulate3Buttons" feature. However, some people my
+be unable to press two buttons at the same time. They may
+prefer the following <tt>InputDevice</tt> section which
+defines button 4 as a master drag lock button, and leaves
+button 2 free for ordinary use.
+<code>
+Section "InputDevice"
+	Identifier  "MasterDLB"
+	Driver      "mouse"
+	Option      "Protocol" "ThinkingMousePS/2"
+	Option      "Buttons" "3"
+	Option      "Device" "/dev/mouse"
+	Option      "DragLockButtons" "4"
+EndSection
+</code>
 
 </article>
diff --git a/xc/programs/Xserver/hw/xfree86/doc/sgml/neomagic.sgml b/xc/programs/Xserver/hw/xfree86/doc/sgml/neomagic.sgml
index 6d3698e4e..f7e55ddaf 100644
--- a/xc/programs/Xserver/hw/xfree86/doc/sgml/neomagic.sgml
+++ b/xc/programs/Xserver/hw/xfree86/doc/sgml/neomagic.sgml
@@ -154,7 +154,7 @@
 <sect> Authors
 
 <p>
-   Jens Owen <it>jens@precisioninsight.com</it>
+   Jens Owen <it>jens@tungstengraphics.com</it>
    Kevin E. Martin <it>kevin@precisioninsight.com</it>
 
    This driver was donated to The XFree86 Project by 
@@ -165,6 +165,6 @@
 	    url="http://www.precisioninsight.com">
 
 <verb>
-$XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/neomagic.sgml,v 1.1 1999/08/23 06:59:39 dawes Exp $
+$XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/neomagic.sgml,v 1.2 2002/10/30 12:52:10 alanh Exp $
 </verb>
 </article>
diff --git a/xc/programs/Xserver/hw/xfree86/doc/sgml/newport.sgml b/xc/programs/Xserver/hw/xfree86/doc/sgml/newport.sgml
index ff3ae33dc..15791c46a 100644
--- a/xc/programs/Xserver/hw/xfree86/doc/sgml/newport.sgml
+++ b/xc/programs/Xserver/hw/xfree86/doc/sgml/newport.sgml
@@ -5,38 +5,37 @@
 <article>
 <title>Information for newport Users
 <author>Guido Günther
-<date>16 January 2002
+<date>24 February 2003
 <ident>
-$XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/newport.sgml,v 1.4 2002/01/16 18:21:04 dawes Exp $
+$XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/newport.sgml,v 1.6 2003/02/25 19:31:02 dawes Exp $
 </ident>
 <toc>
 
 <sect>Supported Hardware
 <p>
-This is an unaccelerated driver for the SGI Indy's newport cards. Both the
- 8bit and 24bit versions are tested and working.
-
+This is an unaccelerated driver for the SGI newport cards (a.k.a. XL) as found
+in the SGI Indy and Indigo2. Both the 8bit and 24bit versions are tested and
+working.
 
 <sect>Features
 <p>
 <itemize>
-  <item> support for 8 and 24 bit pixel depths
+  <item>Support for 8 and 24 bit pixel depths
+  <item>Hardware cursor support to reduce flicker
 </itemize>
 
 <sect>Notes
 <p>
 <itemize>
-  <item>X -configure does not generate a XF86Config file
-  <item>Restoration of the console fails on some variants of the newport
-  (Cmap revision C)
-  <item>There's only a 1280x1024 mode
+  <item>X -configure does not generate a XF86Config file.
+  <item>There's only a 1280x1024 mode.
 </itemize>
 
 
 <sect>Configuration
 <p>
 The driver auto-detects all device information necessary to
-initialize the card.  The only lines you need in the "Device"
+initialize the card on the Indy. The only lines you need in the "Device"
 section of your XF86Config file are:
 <verb>
        Section "Device"
@@ -44,10 +43,13 @@ section of your XF86Config file are:
            Driver     "newport"
        EndSection
 </verb>
+Indigo2 users have to use the BusID option as documented below.
 
 However, if you have problems with auto-detection, you can specify:
 <itemize>
   <item>bitplanes - number of physical bitplanes (8 or 24)
+  <item>HWCursor - enable or disable hardware cursor
+  <item>BusID - set this to "1" on the Indigo2 XL
 </itemize>
 
 <sect>Authors
diff --git a/xc/programs/Xserver/hw/xfree86/doc/sgml/s3virge.sgml b/xc/programs/Xserver/hw/xfree86/doc/sgml/s3virge.sgml
index 671d11d9e..a85b932aa 100644
--- a/xc/programs/Xserver/hw/xfree86/doc/sgml/s3virge.sgml
+++ b/xc/programs/Xserver/hw/xfree86/doc/sgml/s3virge.sgml
@@ -8,14 +8,14 @@
 <date>19 Dec 2001
 
 <ident>
-$XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/s3virge.sgml,v 1.5 2001/12/21 21:01:57 dawes Exp $
+$XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/s3virge.sgml,v 1.6 2003/02/13 03:21:33 dawes Exp $
 </ident>
 
 <toc>
 
 <sect> Supported hardware
 <p>
-The s3virge driver in XFree86 &relvers; supports the S3 ViRGE, ViRGE DX, GX, GX2, MX, MX+, and VX chipsets.  It also supports Trio3D and Trio3D/2x chips.  A majority of testing is done on ViRGE DX chips, making them the most stable to date.  This release has some stabilization fixes for MX, GX2 and Trio3D, and XVideo support for MX and GX2.
+The s3virge driver in XFree86 &relvers; supports the S3 ViRGE, ViRGE DX, GX, GX2, MX, MX+, and VX chipsets.  It also supports Trio3D and Trio3D/2x chips.  A majority of testing is done on ViRGE DX chips, making them the most stable to date.  This release has added support for doublescan modes on DX.
 
 This driver is moderately stable, however please use caution with any new install.  Please report any problems to
 <email>XFree86@XFree86.org</email>
@@ -28,8 +28,10 @@ using the appropriate bug report sheet.
 <item>Fully accelerated support for S3 ViRGE family video adapters
 <item>uses linear frame buffer
 <item>supports resolutions up to 2048x2048
-<item>supports color depths of 8, 15, 16, 24.
+<item>supports color depths of 8, 15, 16 and 24
 <item>full use of video card memory for acceleration caching when visible framebuffer leaves extra memory
+<item>XVideo on DX, GX, GX2, MX, MX+ and Trio3D/2X at depth 16 and 24
+<item>Doublescan modes on DX, possibly others (untested)
 </itemize>
 
 <sect>Configuration:
@@ -46,7 +48,7 @@ page.  Please refer to it for additional details about XF86Config options.
 
 <sect>Support:
 <p>
-For support with XFree86 video drivers please refer to our web site at <url name="XFree86" url="http://www.XFree86.org">.  The web page has a <!-- FAQ and --> bug reporting form available.  For problems not addressed in the web page please contact our support email address  <email>XFree86@XFree86.org</email>
+For support with XFree86 video drivers please refer to our web site at <url name="XFree86" url="http://www.XFree86.org">.  For problems not addressed in the web page please contact our support email address  <email>XFree86@XFree86.org</email>
 
 <sect>Authors
 <p>
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/apm/Imakefile b/xc/programs/Xserver/hw/xfree86/drivers/apm/Imakefile
index 3fba86e4b..40c7574ac 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/apm/Imakefile
+++ b/xc/programs/Xserver/hw/xfree86/drivers/apm/Imakefile
@@ -1,4 +1,4 @@
-XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/drivers/apm/Imakefile,v 1.23 2002/05/07 12:53:49 alanh Exp $
+XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/drivers/apm/Imakefile,v 1.24 2003/02/17 17:06:41 dawes Exp $
 
 #define IHaveModules
 #include <Server.tmpl>
@@ -26,7 +26,7 @@ INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86OSSRC) \
 	   -I$(XF86SRC)/i2c -I$(XF86SRC)/ddc \
            -I$(SERVERSRC)/Xext -I$(EXTINCSRC) -I$(SERVERSRC)/render \
            -I$(SERVERSRC)/include -I$(XINCLUDESRC) \
-	   -I$(XF86OSSRC)/vbe -I$(FONTINCSRC)
+	   -I$(XF86SRC)/vbe -I$(FONTINCSRC)
 #endif
 
 #if MakeHasPosixVariableSubstitutions
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/apm/apm_rush.c b/xc/programs/Xserver/hw/xfree86/drivers/apm/apm_rush.c
index 7cab40ac9..9b4da9669 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/apm/apm_rush.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/apm/apm_rush.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/apm/apm_rush.c,v 1.11 2002/01/25 21:55:55 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/apm/apm_rush.c,v 1.12 2003/02/12 21:46:42 tsi Exp $ */
 /*
  * Copyright Loïc Grenié 1999
  */
@@ -326,7 +326,9 @@ static DISPATCH_PROC(ProcXF86RushLockPixmap);
 static DISPATCH_PROC(ProcXF86RushUnlockPixmap);
 static DISPATCH_PROC(ProcXF86RushUnlockAllPixmaps);
 static DISPATCH_PROC(ProcXF86RushSetCopyMode);
+#if 0
 static DISPATCH_PROC(ProcXF86RushSetPixelStride);
+#endif
 static DISPATCH_PROC(ProcXF86RushOverlayPixmap);
 static DISPATCH_PROC(ProcXF86RushStatusRegOffset);
 static DISPATCH_PROC(ProcXF86RushAT3DEnableRegs);
@@ -462,6 +464,7 @@ ProcXF86RushSetCopyMode(register ClientPtr client)
   return client->noClientException;
 }
 
+#if 0
 static int
 ProcXF86RushSetPixelStride(register ClientPtr client)
 {
@@ -471,6 +474,7 @@ ProcXF86RushSetPixelStride(register ClientPtr client)
   APMPTR(xf86Screens[stuff->screen])->pixelStride = stuff->PixelStride;
   return client->noClientException;
 }
+#endif
 
 int
 ProcXF86RushDispatch (register ClientPtr client)
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ark/ark_accel.c b/xc/programs/Xserver/hw/xfree86/drivers/ark/ark_accel.c
index 0640a09fe..11b478cfb 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ark/ark_accel.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ark/ark_accel.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ark/ark_accel.c,v 1.6 2002/01/25 21:55:56 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ark/ark_accel.c,v 1.7 2002/12/11 17:09:39 dawes Exp $ */
 /*
  *      Copyright 2000  Ani Joshi <ajoshi@unixbox.com>
  *
@@ -41,7 +41,7 @@
 #include "ark_reg.h"
 
 
-int curx, cury, cmd_flags;
+static int curx, cury, cmd_flags;
 
 
 static void ARKSync(ScrnInfoPtr pScrn)
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/Imakefile b/xc/programs/Xserver/hw/xfree86/drivers/ati/Imakefile
index e464a8363..fef87db9c 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/Imakefile
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/Imakefile
@@ -1,6 +1,6 @@
-XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/Imakefile,v 1.39 2002/09/12 00:33:43 tsi Exp $
+XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/Imakefile,v 1.45 2003/02/17 17:06:41 dawes Exp $
 XCOMM
-XCOMM Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+XCOMM Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
 XCOMM
 XCOMM Permission to use, copy, modify, distribute, and sell this software and
 XCOMM its documentation for any purpose is hereby granted without fee, provided
@@ -180,7 +180,7 @@ OBJS = $(OBJS1) $(OBJS2) $(OBJS3) $(OBJS4)
 INCLUDES = -I. -I../../include
 #else
 INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86OSSRC) -I$(XF86SRC) \
-           -I$(XF86OSSRC)/vbe -I$(XF86SRC)/int10 \
+           -I$(XF86SRC)/vbe -I$(XF86SRC)/int10 \
            -I$(XF86SRC)/ddc -I$(XF86SRC)/i2c \
            -I$(XF86SRC)/rac -I$(XF86SRC)/ramdac \
            -I$(XF86SRC)/shadowfb -I$(XF86SRC)/xaa -I$(XF86SRC)/xf24_32bpp \
@@ -188,7 +188,7 @@ INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86OSSRC) -I$(XF86SRC) \
            -I$(XF86SRC)/vgahw -I$(XF86SRC)/fbdevhw \
            -I$(SERVERSRC)/cfb -I$(SERVERSRC)/mfb \
            -I$(SERVERSRC)/fb -I$(SERVERSRC)/mi \
-	   -I$(SERVERSRC)/miext/shadow \
+           -I$(SERVERSRC)/miext/shadow \
            -I$(SERVERSRC)/render -I$(SERVERSRC)/Xext -I$(SERVERSRC)/include \
            $(DRIINCLUDES) -I$(FONTINCSRC) -I$(EXTINCSRC) -I$(XINCLUDESRC)
 #endif
@@ -215,6 +215,8 @@ InstallModuleManPage(ati)
 
 InstallModuleManPage(r128)
 
+InstallModuleManPage(radeon)
+
 DependTarget()
 
 InstallDriverSDKNonExecFile(Imakefile,$(DRIVERSDKDIR)/drivers/ati)
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/ati.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/ati.c
index f8c529f3c..3928b8be2 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/ati.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/ati.c
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/ati.c,v 1.20 2002/01/29 03:42:27 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/ati.c,v 1.21 2003/01/01 19:16:30 tsi Exp $ */
 /*
- * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/ati.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/ati.h
index 0ebc118b9..3861a9e16 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/ati.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/ati.h
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/ati.h,v 1.8 2002/01/16 16:22:25 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/ati.h,v 1.9 2003/01/01 19:16:30 tsi Exp $ */
 /*
- * Copyright 1999 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 1999 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiaccel.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiaccel.c
index 1d06901b4..02a59b269 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiaccel.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiaccel.c
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiaccel.c,v 1.10 2002/01/16 16:22:25 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiaccel.c,v 1.11 2003/01/01 19:16:30 tsi Exp $ */
 /*
- * Copyright 2001 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 2001 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiaccel.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiaccel.h
index 990fd337f..df59ab0a3 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiaccel.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiaccel.h
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiaccel.h,v 1.3 2002/01/16 16:22:25 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiaccel.h,v 1.4 2003/01/01 19:16:30 tsi Exp $ */
 /*
- * Copyright 2001 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 2001 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiadapter.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiadapter.c
index 0b8d2cdb1..897788bae 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiadapter.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiadapter.c
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiadapter.c,v 1.16 2002/01/16 16:22:25 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiadapter.c,v 1.17 2003/01/01 19:16:30 tsi Exp $ */
 /*
- * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiadapter.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiadapter.h
index 3df9c1110..8db366e80 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiadapter.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiadapter.h
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiadapter.h,v 1.9 2002/01/16 16:22:25 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiadapter.h,v 1.10 2003/01/01 19:16:30 tsi Exp $ */
 /*
- * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiadjust.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiadjust.c
index be8cd94e6..df2ac649d 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiadjust.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiadjust.c
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiadjust.c,v 1.13 2002/01/16 16:22:25 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiadjust.c,v 1.14 2003/01/01 19:16:30 tsi Exp $ */
 /*
- * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiadjust.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiadjust.h
index f2012e1e5..0ac15ae24 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiadjust.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiadjust.h
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiadjust.h,v 1.7 2002/01/16 16:22:25 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiadjust.h,v 1.8 2003/01/01 19:16:30 tsi Exp $ */
 /*
- * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atibank.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/atibank.c
index f9df5d332..82d591ac4 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atibank.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atibank.c
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atibank.c,v 1.11 2002/01/16 16:22:25 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atibank.c,v 1.12 2003/01/01 19:16:30 tsi Exp $ */
 /*
- * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atibank.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atibank.h
index 758b72201..43a91acd5 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atibank.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atibank.h
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atibank.h,v 1.7 2002/01/16 16:22:25 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atibank.h,v 1.8 2003/01/01 19:16:30 tsi Exp $ */
 /*
- * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atibus.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/atibus.c
index f46fb4b06..c06c69663 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atibus.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atibus.c
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atibus.c,v 1.16 2002/01/16 16:22:25 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atibus.c,v 1.18 2003/01/22 21:44:10 tsi Exp $ */
 /*
- * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
@@ -136,10 +136,14 @@ ATIClaimResources
 #endif /* AVOID_CPIO */
 
     /* Register unshared relocatable resources for inactive adapters */
-    pResources = xf86RegisterResources(pATI->iEntity, NULL, ResExclusive);
-    pResources = xf86ReallocatePciResources(pATI->iEntity, pResources);
-    if (!pResources)
-        return;
+    do
+    {
+        pResources = xf86RegisterResources(pATI->iEntity, NULL, ResExclusive);
+        if (!pResources)
+            return;
+
+        pResources = xf86ReallocatePciResources(pATI->iEntity, pResources);
+    } while (!pResources);
 
     xf86Msg(X_WARNING,
         ATI_NAME ":  Unable to register the following resources for inactive"
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atibus.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atibus.h
index e696d63a9..c5f35e089 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atibus.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atibus.h
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atibus.h,v 1.9 2002/01/16 16:22:25 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atibus.h,v 1.11 2003/01/01 19:16:30 tsi Exp $ */
 /*
- * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
@@ -53,7 +53,7 @@ typedef enum
 
 extern const char *ATIBusNames[];
 
-extern int  ATIClaimBusSlot    FunctionPrototype((DriverPtr, int, GDevPtr,
-                                                  Bool, ATIPtr));
+extern int ATIClaimBusSlot FunctionPrototype((DriverPtr, int, GDevPtr, Bool,
+                                              ATIPtr));
 
 #endif /* ___ATIBUS_H___ */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atichip.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/atichip.c
index 407e3ab8f..c27ca1f47 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atichip.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atichip.c
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atichip.c,v 1.27 2002/10/12 01:38:06 martin Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atichip.c,v 1.33 2003/02/19 15:07:46 tsi Exp $ */
 /*
- * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
@@ -537,19 +537,34 @@ ATIChipID
 
         case NewChipID('R', 'E'):
         case NewChipID('R', 'F'):
+        case NewChipID('R', 'G'):
         case NewChipID('S', 'K'):
         case NewChipID('S', 'L'):
         case NewChipID('S', 'M'):
+        /* "SN" is listed as ATI_CHIP_RAGE128_4X in ATI docs */
         case NewChipID('S', 'N'):
             return ATI_CHIP_RAGE128GL;
 
         case NewChipID('R', 'K'):
         case NewChipID('R', 'L'):
+        /*
+         * ATI documentation lists SE/SF/SG under both ATI_CHIP_RAGE128VR
+         * and ATI_CHIP_RAGE128_4X, and lists SH/SK/SL under Rage 128 4X only.
+         * I'm stuffing them here for now until this can be clarified as ATI
+         * documentation doesn't mention their details. <mharris@redhat.com>
+         */
         case NewChipID('S', 'E'):
         case NewChipID('S', 'F'):
         case NewChipID('S', 'G'):
+        case NewChipID('S', 'H'):
             return ATI_CHIP_RAGE128VR;
 
+     /* case NewChipID('S', 'H'): */
+     /* case NewChipID('S', 'K'): */
+     /* case NewChipID('S', 'L'): */
+     /* case NewChipID('S', 'N'): */
+     /*     return ATI_CHIP_RAGE128_4X; */
+
         case NewChipID('P', 'A'):
         case NewChipID('P', 'B'):
         case NewChipID('P', 'C'):
@@ -581,10 +596,17 @@ ATIChipID
         case NewChipID('T', 'F'):
         case NewChipID('T', 'L'):
         case NewChipID('T', 'R'):
+        case NewChipID('T', 'S'):
+        case NewChipID('T', 'T'):
+        case NewChipID('T', 'U'):
             return ATI_CHIP_RAGE128PROULTRA;
 
         case NewChipID('L', 'E'):
         case NewChipID('L', 'F'):
+        /*
+         * "LK" and "LL" are not in any ATI documentation I can find
+         * - mharris
+         */
         case NewChipID('L', 'K'):
         case NewChipID('L', 'L'):
             return ATI_CHIP_RAGE128MOBILITY3;
@@ -611,9 +633,18 @@ ATIChipID
         case NewChipID('L', 'X'):
             return ATI_CHIP_RADEONMOBILITY7;
 
+        case NewChipID('Q', 'H'):
+        case NewChipID('Q', 'I'):
+        case NewChipID('Q', 'J'):
+        case NewChipID('Q', 'K'):
         case NewChipID('Q', 'L'):
+        case NewChipID('Q', 'M'):
         case NewChipID('Q', 'N'):
         case NewChipID('Q', 'O'):
+        case NewChipID('Q', 'h'):
+        case NewChipID('Q', 'i'):
+        case NewChipID('Q', 'j'):
+        case NewChipID('Q', 'k'):
         case NewChipID('Q', 'l'):
         case NewChipID('B', 'B'):
             return ATI_CHIP_R200;
@@ -634,6 +665,10 @@ ATIChipID
         case NewChipID('L', 'g'):
             return ATI_CHIP_RADEONMOBILITY9;
 
+        case NewChipID('A', 'D'):
+        case NewChipID('A', 'E'):
+        case NewChipID('A', 'F'):
+        case NewChipID('A', 'G'):
         case NewChipID('N', 'D'):
         case NewChipID('N', 'E'):
         case NewChipID('N', 'F'):
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atichip.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atichip.h
index 78850af05..ce911c56f 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atichip.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atichip.h
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atichip.h,v 1.21 2002/10/12 01:38:06 martin Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atichip.h,v 1.22 2003/01/01 19:16:30 tsi Exp $ */
 /*
- * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/aticlock.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/aticlock.c
index 0af8a34e5..0fc3d6b37 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/aticlock.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/aticlock.c
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/aticlock.c,v 1.19 2002/09/18 17:11:48 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/aticlock.c,v 1.20 2003/01/01 19:16:31 tsi Exp $ */
 /*
- * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/aticlock.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/aticlock.h
index 66de21f55..641ba6959 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/aticlock.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/aticlock.h
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/aticlock.h,v 1.7 2002/01/16 16:22:26 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/aticlock.h,v 1.8 2003/01/01 19:16:31 tsi Exp $ */
 /*
- * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/aticonfig.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/aticonfig.c
index adb02152a..aa1f23b98 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/aticonfig.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/aticonfig.c
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/aticonfig.c,v 1.11 2002/02/14 22:08:01 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/aticonfig.c,v 1.12 2003/01/01 19:16:31 tsi Exp $ */
 /*
- * Copyright 2000 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 2000 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/aticonfig.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/aticonfig.h
index 3148ff9ba..bf9c24b2d 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/aticonfig.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/aticonfig.h
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/aticonfig.h,v 1.3 2002/01/16 16:22:26 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/aticonfig.h,v 1.5 2003/01/01 19:16:31 tsi Exp $ */
 /*
- * Copyright 2000 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 2000 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
@@ -29,7 +29,6 @@
 
 #include "xf86str.h"
 
-extern void          ATIProcessOptions   FunctionPrototype((ScrnInfoPtr,
-                                                            ATIPtr));
+extern void ATIProcessOptions FunctionPrototype((ScrnInfoPtr, ATIPtr));
 
 #endif /* ___ATICONFIG_H___ */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/aticonsole.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/aticonsole.c
index 03aa925a2..803dd52a4 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/aticonsole.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/aticonsole.c
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/aticonsole.c,v 1.19 2002/01/16 16:22:26 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/aticonsole.c,v 1.20 2003/01/01 19:16:31 tsi Exp $ */
 /*
- * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/aticonsole.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/aticonsole.h
index 0380dc66f..8157d8348 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/aticonsole.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/aticonsole.h
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/aticonsole.h,v 1.8 2002/01/16 16:22:26 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/aticonsole.h,v 1.9 2003/01/01 19:16:31 tsi Exp $ */
 /*
- * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/aticrtc.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/aticrtc.h
index eb99d57d0..9f6ec388d 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/aticrtc.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/aticrtc.h
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/aticrtc.h,v 1.7 2002/01/16 16:22:26 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/aticrtc.h,v 1.8 2003/01/01 19:16:31 tsi Exp $ */
 /*
- * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/aticursor.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/aticursor.c
index ec25d9a10..627b05ef1 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/aticursor.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/aticursor.c
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/aticursor.c,v 1.2 2002/01/16 16:22:26 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/aticursor.c,v 1.3 2003/01/01 19:16:31 tsi Exp $ */
 /*
- * Copyright 2001 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 2001 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/aticursor.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/aticursor.h
index 7733e2453..9f8790dc3 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/aticursor.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/aticursor.h
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/aticursor.h,v 1.2 2002/01/16 16:22:26 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/aticursor.h,v 1.3 2003/01/01 19:16:31 tsi Exp $ */
 /*
- * Copyright 2001 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 2001 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atidac.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/atidac.c
index cea80dff5..1d3e943b9 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atidac.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atidac.c
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atidac.c,v 1.16 2002/10/15 20:26:05 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atidac.c,v 1.18 2003/02/25 17:58:13 tsi Exp $ */
 /*
- * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
@@ -94,7 +94,7 @@ ATISetDACIOPorts
             pATI->CPIO_DAC_MASK = ATIIOPort(DAC_REGS) + 2;
             pATI->CPIO_DAC_READ = ATIIOPort(DAC_REGS) + 3;
             pATI->CPIO_DAC_WRITE = ATIIOPort(DAC_REGS) + 0;
-            pATI->CPIO_DAC_WAIT = pATI->CPIO_DAC_MASK;
+            pATI->CPIO_DAC_WAIT = pATI->CPIOBase;
             break;
 
         default:
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atidac.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atidac.h
index aa4662679..fc3b75894 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atidac.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atidac.h
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atidac.h,v 1.13 2002/10/15 20:26:05 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atidac.h,v 1.15 2003/01/01 19:16:31 tsi Exp $ */
 /*
- * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
@@ -41,36 +41,36 @@
 /*
  * RAMDAC-related definitions.
  */
-#define ATI_DAC_MAX_TYPE                MaxBits(DACTYPE)
-#define ATI_DAC_MAX_SUBTYPE             MaxBits(BIOS_INIT_DAC_SUBTYPE)
-
-#define ATI_DAC(_Type, _Subtype)        (((_Type) << 4) | (_Subtype))
-
-#define ATI_DAC_ATI68830                ATI_DAC(0x0U, 0x0U)
-#define ATI_DAC_SC11483                 ATI_DAC(0x1U, 0x0U)
-#define ATI_DAC_ATI68875                ATI_DAC(0x2U, 0x0U)
-#define ATI_DAC_TVP3026_A               ATI_DAC(0x2U, 0x7U)
-#define ATI_DAC_GENERIC                 ATI_DAC(0x3U, 0x0U)
-#define ATI_DAC_BT481                   ATI_DAC(0x4U, 0x0U)
-#define ATI_DAC_ATT20C491               ATI_DAC(0x4U, 0x1U)
-#define ATI_DAC_SC15026                 ATI_DAC(0x4U, 0x2U)
-#define ATI_DAC_MU9C1880                ATI_DAC(0x4U, 0x3U)
-#define ATI_DAC_IMSG174                 ATI_DAC(0x4U, 0x4U)
-#define ATI_DAC_ATI68860_B              ATI_DAC(0x5U, 0x0U)
-#define ATI_DAC_ATI68860_C              ATI_DAC(0x5U, 0x1U)
-#define ATI_DAC_TVP3026_B               ATI_DAC(0x5U, 0x7U)
-#define ATI_DAC_STG1700                 ATI_DAC(0x6U, 0x0U)
-#define ATI_DAC_ATT20C498               ATI_DAC(0x6U, 0x1U)
-#define ATI_DAC_STG1702                 ATI_DAC(0x7U, 0x0U)
-#define ATI_DAC_SC15021                 ATI_DAC(0x7U, 0x1U)
-#define ATI_DAC_ATT21C498               ATI_DAC(0x7U, 0x2U)
-#define ATI_DAC_STG1703                 ATI_DAC(0x7U, 0x3U)
-#define ATI_DAC_CH8398                  ATI_DAC(0x7U, 0x4U)
-#define ATI_DAC_ATT20C408               ATI_DAC(0x7U, 0x5U)
-#define ATI_DAC_INTERNAL                ATI_DAC(0x8U, 0x0U)
-#define ATI_DAC_IBMRGB514               ATI_DAC(0x9U, 0x0U)
-#define ATI_DAC_UNKNOWN                 ATI_DAC((ATI_DAC_MAX_TYPE << 2) + 3, \
-                                                ATI_DAC_MAX_SUBTYPE)
+#define ATI_DAC_MAX_TYPE         MaxBits(DACTYPE)
+#define ATI_DAC_MAX_SUBTYPE      MaxBits(BIOS_INIT_DAC_SUBTYPE)
+
+#define ATI_DAC(_Type, _Subtype) (((_Type) << 4) | (_Subtype))
+
+#define ATI_DAC_ATI68830         ATI_DAC(0x0U, 0x0U)
+#define ATI_DAC_SC11483          ATI_DAC(0x1U, 0x0U)
+#define ATI_DAC_ATI68875         ATI_DAC(0x2U, 0x0U)
+#define ATI_DAC_TVP3026_A        ATI_DAC(0x2U, 0x7U)
+#define ATI_DAC_GENERIC          ATI_DAC(0x3U, 0x0U)
+#define ATI_DAC_BT481            ATI_DAC(0x4U, 0x0U)
+#define ATI_DAC_ATT20C491        ATI_DAC(0x4U, 0x1U)
+#define ATI_DAC_SC15026          ATI_DAC(0x4U, 0x2U)
+#define ATI_DAC_MU9C1880         ATI_DAC(0x4U, 0x3U)
+#define ATI_DAC_IMSG174          ATI_DAC(0x4U, 0x4U)
+#define ATI_DAC_ATI68860_B       ATI_DAC(0x5U, 0x0U)
+#define ATI_DAC_ATI68860_C       ATI_DAC(0x5U, 0x1U)
+#define ATI_DAC_TVP3026_B        ATI_DAC(0x5U, 0x7U)
+#define ATI_DAC_STG1700          ATI_DAC(0x6U, 0x0U)
+#define ATI_DAC_ATT20C498        ATI_DAC(0x6U, 0x1U)
+#define ATI_DAC_STG1702          ATI_DAC(0x7U, 0x0U)
+#define ATI_DAC_SC15021          ATI_DAC(0x7U, 0x1U)
+#define ATI_DAC_ATT21C498        ATI_DAC(0x7U, 0x2U)
+#define ATI_DAC_STG1703          ATI_DAC(0x7U, 0x3U)
+#define ATI_DAC_CH8398           ATI_DAC(0x7U, 0x4U)
+#define ATI_DAC_ATT20C408        ATI_DAC(0x7U, 0x5U)
+#define ATI_DAC_INTERNAL         ATI_DAC(0x8U, 0x0U)
+#define ATI_DAC_IBMRGB514        ATI_DAC(0x9U, 0x0U)
+#define ATI_DAC_UNKNOWN          ATI_DAC((ATI_DAC_MAX_TYPE << 2) + 3, \
+                                         ATI_DAC_MAX_SUBTYPE)
 extern const SymTabRec ATIDACDescriptors[];
 
 #ifdef AVOID_CPIO
@@ -90,13 +90,14 @@ extern const SymTabRec ATIDACDescriptors[];
 
 #endif /* AVOID_CPIO */
 
-extern CARD8 ATIGetDACCmdReg FunctionPrototype((ATIPtr));
+extern CARD8 ATIGetDACCmdReg     FunctionPrototype((ATIPtr));
 
-extern void ATIDACPreInit FunctionPrototype((ScrnInfoPtr, ATIPtr, ATIHWPtr));
-extern void ATIDACSave    FunctionPrototype((ATIPtr, ATIHWPtr));
-extern void ATIDACSet     FunctionPrototype((ATIPtr, ATIHWPtr));
+extern void ATIDACPreInit        FunctionPrototype((ScrnInfoPtr, ATIPtr,
+                                                    ATIHWPtr));
+extern void ATIDACSave           FunctionPrototype((ATIPtr, ATIHWPtr));
+extern void ATIDACSet            FunctionPrototype((ATIPtr, ATIHWPtr));
 
-extern void ATILoadPalette FunctionPrototype((ScrnInfoPtr, int, int *, LOCO *,
-                                              VisualPtr));
+extern void ATILoadPalette       FunctionPrototype((ScrnInfoPtr, int, int *,
+                                                    LOCO *, VisualPtr));
 
 #endif /* ___ATIDAC_H___ */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atidga.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/atidga.c
index a516cfe38..beca2d8ed 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atidga.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atidga.c
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atidga.c,v 1.8 2002/01/16 16:22:26 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atidga.c,v 1.9 2003/01/01 19:16:31 tsi Exp $ */
 /*
- * Copyright 2000 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 2000 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atidga.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atidga.h
index 3751ee196..1011a89ba 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atidga.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atidga.h
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atidga.h,v 1.5 2002/01/16 16:22:26 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atidga.h,v 1.6 2003/01/01 19:16:31 tsi Exp $ */
 /*
- * Copyright 2000 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 2000 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atidsp.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/atidsp.c
index 63c0d7a92..7ca232991 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atidsp.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atidsp.c
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atidsp.c,v 1.18 2002/05/16 19:35:41 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atidsp.c,v 1.19 2003/01/01 19:16:31 tsi Exp $ */
 /*
- * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atidsp.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atidsp.h
index 33842dd22..d6881cf7d 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atidsp.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atidsp.h
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atidsp.h,v 1.9 2002/01/16 16:22:26 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atidsp.h,v 1.10 2003/01/01 19:16:32 tsi Exp $ */
 /*
- * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiident.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiident.c
index b90994ced..1fb9dbbfd 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiident.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiident.c
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiident.c,v 1.10 2002/09/24 15:23:54 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiident.c,v 1.11 2003/01/01 19:16:32 tsi Exp $ */
 /*
- * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiident.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiident.h
index 47ba26ebc..74677c5c9 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiident.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiident.h
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiident.h,v 1.9 2002/01/16 16:22:26 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiident.h,v 1.10 2003/01/01 19:16:32 tsi Exp $ */
 /*
- * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiio.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiio.h
index 6166cb63f..f6f871b76 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiio.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiio.h
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiio.h,v 1.13 2002/01/16 16:22:26 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiio.h,v 1.14 2003/01/01 19:16:32 tsi Exp $ */
 /*
- * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiload.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiload.c
index b2b3f9dd9..927087226 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiload.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiload.c
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiload.c,v 1.10 2002/04/06 19:06:04 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiload.c,v 1.12 2003/01/01 19:16:32 tsi Exp $ */
 /*
- * Copyright 2000 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 2000 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
@@ -151,6 +151,7 @@ const char *ATIramdacSymbols[] =
     "xf86CreateCursorInfoRec",
     "xf86DestroyCursorInfoRec",
     "xf86InitCursor",
+    "xf86ForceHWCursor",
     NULL
 };
 
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiload.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiload.h
index 6c44bfc0f..e056b5244 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiload.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiload.h
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiload.h,v 1.4 2002/02/14 22:08:02 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiload.h,v 1.5 2003/01/01 19:16:32 tsi Exp $ */
 /*
- * Copyright 2000 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 2000 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atilock.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/atilock.c
index cf9d480fd..9c02e830f 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atilock.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atilock.c
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atilock.c,v 1.16 2002/05/16 19:35:42 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atilock.c,v 1.18 2003/01/10 20:57:57 tsi Exp $ */
 /*
- * Copyright 1999 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 1999 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
@@ -111,6 +111,8 @@ ATIUnlock
         tmp = pATI->LockData.bus_cntl & ~BUS_ROM_DIS;
         if (pATI->Chip < ATI_CHIP_264VTB)
             tmp |= SetBits(15, BUS_FIFO_WS);
+        else
+            tmp &= ~BUS_MASTER_DIS;
         if (pATI->Chip >= ATI_CHIP_264VT)
             tmp |= BUS_EXT_REG_EN;              /* Enable Block 1 */
         outr(BUS_CNTL, tmp);
@@ -175,20 +177,34 @@ ATIUnlock
 
         outr(DAC_CNTL, tmp);
 
-        /* Save Multimedia Peripheral Port and TVOut state */
         if (pATI->Chip >= ATI_CHIP_264VTB)
         {
             pATI->LockData.mpp_config = inr(MPP_CONFIG);
             pATI->LockData.mpp_strobe_seq = inr(MPP_STROBE_SEQ);
             pATI->LockData.tvo_cntl = inr(TVO_CNTL);
 
-            /* Save hardware-assisted I2C control registers */
-            if (pATI->Chip >= ATI_CHIP_264GTPRO)
+            if (pATI->Chip >= ATI_CHIP_264GT2C)
             {
-                pATI->LockData.i2c_cntl_0 =
-                    inr(I2C_CNTL_0) | (I2C_CNTL_STAT | I2C_CNTL_HPTR_RST);
-                outr(I2C_CNTL_0, pATI->LockData.i2c_cntl_0 & ~I2C_CNTL_INT_EN);
-                pATI->LockData.i2c_cntl_1 = inr(I2C_CNTL_1);
+                pATI->LockData.hw_debug = inr(HW_DEBUG);
+
+                if (pATI->Chip >= ATI_CHIP_264GTPRO)
+                {
+                    if (!(pATI->LockData.hw_debug & CMDFIFO_SIZE_EN))
+                        outr(HW_DEBUG,
+                            pATI->LockData.hw_debug | CMDFIFO_SIZE_EN);
+
+                    pATI->LockData.i2c_cntl_0 =
+                        inr(I2C_CNTL_0) | (I2C_CNTL_STAT | I2C_CNTL_HPTR_RST);
+                    outr(I2C_CNTL_0,
+                        pATI->LockData.i2c_cntl_0 & ~I2C_CNTL_INT_EN);
+                    pATI->LockData.i2c_cntl_1 = inr(I2C_CNTL_1);
+                }
+                else
+                {
+                    if (pATI->LockData.hw_debug & CMDFIFO_SIZE_DIS)
+                        outr(HW_DEBUG,
+                            pATI->LockData.hw_debug & ~CMDFIFO_SIZE_DIS);
+                }
             }
         }
 
@@ -561,10 +577,14 @@ ATILock
             outr(MPP_CONFIG, pATI->LockData.mpp_config);
             outr(MPP_STROBE_SEQ, pATI->LockData.mpp_strobe_seq);
             outr(TVO_CNTL, pATI->LockData.tvo_cntl);
-            if (pATI->Chip >= ATI_CHIP_264GTPRO)
+            if (pATI->Chip >= ATI_CHIP_264GT2C)
             {
-                outr(I2C_CNTL_0, pATI->LockData.i2c_cntl_0);
-                outr(I2C_CNTL_1, pATI->LockData.i2c_cntl_1);
+                outr(HW_DEBUG, pATI->LockData.hw_debug);
+                if (pATI->Chip >= ATI_CHIP_264GTPRO)
+                {
+                    outr(I2C_CNTL_0, pATI->LockData.i2c_cntl_0);
+                    outr(I2C_CNTL_1, pATI->LockData.i2c_cntl_1);
+                }
             }
         }
     }
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atilock.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atilock.h
index 2b5b67bf7..9b949436a 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atilock.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atilock.h
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atilock.h,v 1.4 2002/01/16 16:22:26 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atilock.h,v 1.5 2003/01/01 19:16:32 tsi Exp $ */
 /*
- * Copyright 1999 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 1999 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atimach64.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/atimach64.c
index 5d5335321..9de90a15e 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atimach64.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atimach64.c
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atimach64.c,v 1.48 2002/04/06 19:06:04 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atimach64.c,v 1.51 2003/02/24 20:46:54 tsi Exp $ */
 /*
- * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
@@ -116,6 +116,13 @@ ATIMach64PreInit
         pATIHW->crtc_off_pitch = SetBits(pATI->displayWidth >> 3, CRTC_PITCH);
     }
 
+    if ((pATI->LockData.crtc_gen_cntl & CRTC_CSYNC_EN) && !pATI->OptionCSync)
+    {
+        xf86DrvMsg(pScreenInfo->scrnIndex, X_NOTICE,
+            "Using composite sync to match input timing.\n");
+        pATI->OptionCSync = TRUE;
+    }
+
     pATIHW->bus_cntl = bus_cntl = inr(BUS_CNTL);
     if (pATI->Chip < ATI_CHIP_264VT4)
         pATIHW->bus_cntl = (pATIHW->bus_cntl & ~BUS_HOST_ERR_INT_EN) |
@@ -386,7 +393,7 @@ ATIMach64Save
 
     pATIHW->config_cntl = inr(CONFIG_CNTL);
 
-    pATIHW->gen_test_cntl = inr(GEN_TEST_CNTL);
+    pATIHW->gen_test_cntl = inr(GEN_TEST_CNTL) & ~GEN_CUR_EN;
 
     if (pATI->Chip >= ATI_CHIP_264VTB)
     {
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atimach64.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atimach64.h
index 6849d559f..e6e1eaa77 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atimach64.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atimach64.h
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atimach64.h,v 1.15 2002/01/16 16:22:27 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atimach64.h,v 1.16 2003/01/01 19:16:32 tsi Exp $ */
 /*
- * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atimach64io.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/atimach64io.c
index 4e03c3a5e..3197f3ca4 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atimach64io.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atimach64io.c
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atimach64io.c,v 1.4 2002/01/16 16:22:27 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atimach64io.c,v 1.5 2003/01/01 19:16:32 tsi Exp $ */
 /*
- * Copyright 2000 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 2000 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atimach64io.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atimach64io.h
index 2dd3d87d6..d9661ca71 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atimach64io.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atimach64io.h
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atimach64io.h,v 1.13 2002/01/16 16:22:27 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atimach64io.h,v 1.14 2003/01/01 19:16:32 tsi Exp $ */
 /*
- * Copyright 2000 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 2000 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atimisc.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/atimisc.c
index 85404d781..e847b60e6 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atimisc.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atimisc.c
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atimisc.c,v 1.5 2002/04/06 19:06:05 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atimisc.c,v 1.6 2003/01/01 19:16:32 tsi Exp $ */
 /*
- * Copyright 2000 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 2000 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atimode.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/atimode.c
index b3f522fda..d470ae492 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atimode.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atimode.c
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atimode.c,v 1.13 2002/04/06 19:06:05 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atimode.c,v 1.16 2003/01/01 19:16:32 tsi Exp $ */
 /*
- * Copyright 2000 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 2000 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
@@ -699,6 +699,9 @@ ATIModeCalculate
         if (pMode->Flags & V_INTERLACE)
             VDisplay >>= 1;
 
+        /* Ensure secondary CRTC is completely disabled */
+        pATIHW->crtc_gen_cntl &= ~(CRTC2_EN | CRTC2_PIX_WIDTH);
+
         if (pATI->Chip == ATI_CHIP_264LT)
             pATIHW->horz_stretching = inr(HORZ_STRETCHING);
         else /* if ((pATI->Chip == ATI_CHIP_264LTPRO) ||
@@ -709,7 +712,7 @@ ATIModeCalculate
             pATIHW->horz_stretching = ATIGetMach64LCDReg(LCD_HORZ_STRETCHING);
             pATIHW->ext_vert_stretch =
                 ATIGetMach64LCDReg(LCD_EXT_VERT_STRETCH) &
-                ~(AUTO_VERT_RATIO | VERT_STRETCH_MODE);
+                ~(AUTO_VERT_RATIO | VERT_STRETCH_MODE | VERT_STRETCH_RATIO3);
 
             /*
              * Don't use vertical blending if the mode is too wide or not
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atimode.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atimode.h
index 0da7ed0f4..63cb7650e 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atimode.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atimode.h
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atimode.h,v 1.4 2002/01/16 16:22:27 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atimode.h,v 1.5 2003/01/01 19:16:32 tsi Exp $ */
 /*
- * Copyright 2000 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 2000 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atimodule.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/atimodule.c
index f32113dd1..842d659ce 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atimodule.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atimodule.c
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atimodule.c,v 1.14 2002/04/06 19:06:05 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atimodule.c,v 1.15 2003/01/01 19:16:32 tsi Exp $ */
 /*
- * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atimodule.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atimodule.h
index 21310bb48..833e421bf 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atimodule.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atimodule.h
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atimodule.h,v 1.8 2002/01/16 16:22:27 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atimodule.h,v 1.9 2003/01/01 19:16:32 tsi Exp $ */
 /*
- * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atimono.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atimono.h
index c9f57a729..6325cbe41 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atimono.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atimono.h
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atimono.h,v 1.6 2002/01/16 16:22:27 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atimono.h,v 1.7 2003/01/01 19:16:33 tsi Exp $ */
 /*
- * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atioption.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/atioption.c
index dbecec231..7a731ce5f 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atioption.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atioption.c
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atioption.c,v 1.20 2002/02/14 22:08:03 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atioption.c,v 1.21 2003/01/01 19:16:33 tsi Exp $ */
 /*
- * Copyright 1999 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 1999 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atioption.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atioption.h
index f8f386b20..73231543a 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atioption.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atioption.h
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atioption.h,v 1.10 2002/02/14 22:08:03 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atioption.h,v 1.11 2003/01/01 19:16:33 tsi Exp $ */
 /*
- * Copyright 1999 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 1999 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atipreinit.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/atipreinit.c
index fae47b43d..675b036d3 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atipreinit.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atipreinit.c
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atipreinit.c,v 1.62 2002/08/27 22:07:06 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atipreinit.c,v 1.65 2003/01/01 19:16:33 tsi Exp $ */
 /*
- * Copyright 1999 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 1999 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
@@ -1634,11 +1634,6 @@ ATIPreInit
                 pATI->LCDVBlankWidth =
                     ((pATIHW->crt[22] - pATIHW->crt[21]) & 0xFFU) + 1;
 
-                HDisplay = pATIHW->crt[0] + 5 - pATI->LCDHBlankWidth;
-                VDisplay = (((pATIHW->crt[7] << 4) & 0x0200U) |
-                            ((pATIHW->crt[7] << 8) & 0x0100U) |
-                            pATIHW->crt[6]) + 3 - pATI->LCDVBlankWidth;
-
                 pATI->LCDHSyncStart =
                     ((pATIHW->crt[4] - pATIHW->crt[2]) & 0xFFU) + 1;
                 pATI->LCDVSyncStart = (((((pATIHW->crt[7] << 2) & 0x0200U) |
@@ -1647,6 +1642,20 @@ ATIPreInit
                                         (((pATIHW->crt[9] << 4) & 0x0200U) |
                                          ((pATIHW->crt[7] << 5) & 0x0100U) |
                                          pATIHW->crt[21])) & 0xFFU) + 1;
+
+                HDisplay = pATI->LCDHSyncStart + pATI->LCDHSyncWidth -
+                    pATI->LCDHBlankWidth;
+                if (HDisplay > 0)
+                    pATI->LCDHBlankWidth += (HDisplay + 0x3FU) & ~0x3FU;
+                VDisplay = pATI->LCDVSyncStart + pATI->LCDVSyncWidth -
+                    pATI->LCDVBlankWidth;
+                if (VDisplay > 0)
+                    pATI->LCDVBlankWidth += (VDisplay + 0xFFU) & ~0xFFU;
+
+                HDisplay = pATIHW->crt[0] + 5 - pATI->LCDHBlankWidth;
+                VDisplay = (((pATIHW->crt[7] << 4) & 0x0200U) |
+                            ((pATIHW->crt[7] << 8) & 0x0100U) |
+                            pATIHW->crt[6]) + 3 - pATI->LCDVBlankWidth;
             }
             else
 
@@ -1848,7 +1857,8 @@ ATIPreInit
             if (!(pATIHW->horz_stretching & HORZ_STRETCH_EN) &&
                 ((HDisplay = pATI->LCDHorizontal - HDisplay) > 0))
             {
-                if ((pATI->LCDHSyncStart -= HDisplay) < 0)
+                pATI->LCDHSyncStart -= HDisplay;
+                if (pATI->LCDHSyncStart < 0)
                     pATI->LCDHSyncStart = 0;
                 pATI->LCDHBlankWidth -= HDisplay;
                 HDisplay = pATI->LCDHSyncStart + pATI->LCDHSyncWidth;
@@ -1859,7 +1869,8 @@ ATIPreInit
             if (!(pATIHW->vert_stretching & VERT_STRETCH_EN) &&
                 ((VDisplay = pATI->LCDVertical - VDisplay) > 0))
             {
-                if ((pATI->LCDVSyncStart -= VDisplay) < 0)
+                pATI->LCDVSyncStart -= VDisplay;
+                if (pATI->LCDVSyncStart < 0)
                     pATI->LCDVSyncStart = 0;
                 pATI->LCDVBlankWidth -= VDisplay;
                 VDisplay = pATI->LCDVSyncStart + pATI->LCDVSyncWidth;
@@ -2939,6 +2950,68 @@ ATIPreInit
         }
 
         pScreenInfo->monitor->Last = pMode;
+
+        /*
+         * Defeat Xconfigurator brain damage.  Ignore all HorizSync and
+         * VertRefresh specifications.  For now, this does not take
+         * SYNC_TOLERANCE into account.
+         */
+        if (pScreenInfo->monitor->nHsync > 0)
+        {
+            double hsync = (double)pMode->Clock /
+                           (pATI->LCDHorizontal + pATI->LCDHBlankWidth);
+
+            for (i = 0;  ;  i++)
+            {
+                if (i >= pScreenInfo->monitor->nHsync)
+                {
+                    xf86DrvMsg(pScreenInfo->scrnIndex, X_NOTICE,
+                        "Conflicting XF86Config HorizSync specification(s)"
+                        " ignored.\n");
+                    break;
+                }
+
+                if ((hsync >= pScreenInfo->monitor->hsync[i].lo) &&
+                    (hsync <= pScreenInfo->monitor->hsync[i].hi))
+                {
+                    xf86DrvMsg(pScreenInfo->scrnIndex, X_WARNING,
+                        "Extraneous XF86Config HorizSync specification(s)"
+                        " ignored.\n");
+                    break;
+                }
+            }
+
+            pScreenInfo->monitor->nHsync = 0;
+        }
+
+        if (pScreenInfo->monitor->nVrefresh > 0)
+        {
+            double vrefresh = ((double)pMode->Clock * 1000.0) /
+                              ((pATI->LCDHorizontal + pATI->LCDHBlankWidth) *
+                               (pATI->LCDVertical + pATI->LCDVBlankWidth));
+
+            for (i = 0;  ;  i++)
+            {
+                if (i >= pScreenInfo->monitor->nVrefresh)
+                {
+                    xf86DrvMsg(pScreenInfo->scrnIndex, X_NOTICE,
+                        "Conflicting XF86Config VertRefresh specification(s)"
+                        " ignored.\n");
+                    break;
+                }
+
+                if ((vrefresh >= pScreenInfo->monitor->vrefresh[i].lo) &&
+                    (vrefresh <= pScreenInfo->monitor->vrefresh[i].hi))
+                {
+                    xf86DrvMsg(pScreenInfo->scrnIndex, X_WARNING,
+                        "Extraneous XF86Config VertRefresh specification(s)"
+                        " ignored.\n");
+                    break;
+                }
+            }
+
+            pScreenInfo->monitor->nVrefresh = 0;
+        }
     }
 
     i = xf86ValidateModes(pScreenInfo,
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atipreinit.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atipreinit.h
index 4c86e9f43..5404c2c29 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atipreinit.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atipreinit.h
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atipreinit.h,v 1.5 2002/01/16 16:22:27 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atipreinit.h,v 1.6 2003/01/01 19:16:33 tsi Exp $ */
 /*
- * Copyright 1999 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 1999 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiprint.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiprint.c
index 25a2fae08..96444040e 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiprint.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiprint.c
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiprint.c,v 1.24 2002/04/06 19:06:05 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiprint.c,v 1.25 2003/01/01 19:16:33 tsi Exp $ */
 /*
- * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiprint.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiprint.h
index 73b89b404..d44cbdf84 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiprint.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiprint.h
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiprint.h,v 1.9 2002/01/16 16:22:27 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiprint.h,v 1.10 2003/01/01 19:16:33 tsi Exp $ */
 /*
- * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atipriv.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atipriv.h
index e62c470bf..69341ba67 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atipriv.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atipriv.h
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atipriv.h,v 1.4 2002/01/16 16:22:27 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atipriv.h,v 1.5 2003/01/01 19:16:33 tsi Exp $ */
 /*
- * Copyright 1999 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 1999 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiprobe.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiprobe.c
index e60db350d..05d2f340a 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiprobe.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiprobe.c
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiprobe.c,v 1.53 2002/10/12 01:38:07 martin Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiprobe.c,v 1.54 2003/01/01 19:16:33 tsi Exp $ */
 /*
- * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiprobe.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiprobe.h
index ac2a7222e..6f3d8554f 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiprobe.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiprobe.h
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiprobe.h,v 1.7 2002/01/16 16:22:28 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiprobe.h,v 1.8 2003/01/01 19:16:33 tsi Exp $ */
 /*
- * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiproto.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiproto.h
index 1fedd54e6..708b8f4cc 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiproto.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiproto.h
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiproto.h,v 1.6 2002/01/16 16:22:28 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiproto.h,v 1.7 2003/01/01 19:16:34 tsi Exp $ */
 /*
- * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiregs.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiregs.h
index 81482fc74..2e8af8317 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiregs.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiregs.h
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiregs.h,v 1.21 2002/05/16 19:35:42 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiregs.h,v 1.23 2003/01/10 17:43:40 tsi Exp $ */
 /*
- * Copyright 1994 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 1994 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
@@ -863,7 +863,7 @@
 #define DBL_BUFFER_EN			0x00000400ul	/* GTPro */
 #define MEM_WE_FIX_DIS			0x00000800ul
 #define MEM_OE_PULLBACK_B		0x00000800ul	/* GT2c/VT4 */
-#define CMDFIFO_SIZE_DIS_P		0x00000800ul	/* GTPro */
+#define CMDFIFO_SIZE_EN			0x00000800ul	/* GTPro */
 #define RD_EN_FIX_DIS			0x00001000ul
 #define MEM_WE_FIX_DIS_B		0x00001000ul
 #define AUTO_FF_DIS			0x00001000ul	/* GTPro */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atirgb514.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/atirgb514.c
index 9d8d9401f..bedb7940c 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atirgb514.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atirgb514.c
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atirgb514.c,v 1.3 2002/01/16 16:22:28 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atirgb514.c,v 1.4 2003/01/01 19:16:34 tsi Exp $ */
 /*
- * Copyright 2001 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 2001 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atirgb514.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atirgb514.h
index a422168e7..71f44d2d7 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atirgb514.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atirgb514.h
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atirgb514.h,v 1.2 2002/01/16 16:22:28 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atirgb514.h,v 1.3 2003/01/01 19:16:34 tsi Exp $ */
 /*
- * Copyright 2001 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 2001 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiscreen.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiscreen.c
index c4dbb5e0a..ea3cfb77f 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiscreen.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiscreen.c
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiscreen.c,v 1.28 2002/01/16 16:22:28 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiscreen.c,v 1.29 2003/01/01 19:16:34 tsi Exp $ */
 /*
- * Copyright 1999 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 1999 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiscreen.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiscreen.h
index 00087432a..7397042b1 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiscreen.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiscreen.h
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiscreen.h,v 1.5 2002/01/16 16:22:28 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiscreen.h,v 1.6 2003/01/01 19:16:34 tsi Exp $ */
 /*
- * Copyright 1999 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 1999 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atistruct.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atistruct.h
index ad6a51ae7..bd90d54a4 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atistruct.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atistruct.h
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atistruct.h,v 1.35 2002/10/15 20:26:05 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atistruct.h,v 1.37 2003/01/10 20:57:58 tsi Exp $ */
 /*
- * Copyright 1999 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 1999 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
@@ -365,9 +365,9 @@ typedef struct _ATIRec
     struct
     {
         /* Mach64 registers */
-        CARD32 crtc_int_cntl, crtc_gen_cntl, i2c_cntl_0, scratch_reg3,
-               bus_cntl, lcd_index, mem_cntl, i2c_cntl_1, dac_cntl,
-               gen_test_cntl, mpp_config, mpp_strobe_seq, tvo_cntl;
+        CARD32 crtc_int_cntl, crtc_gen_cntl, i2c_cntl_0, hw_debug,
+               scratch_reg3, bus_cntl, lcd_index, mem_cntl, i2c_cntl_1,
+               dac_cntl, gen_test_cntl, mpp_config, mpp_strobe_seq, tvo_cntl;
 
 #ifndef AVOID_CPIO
 
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiutil.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiutil.c
index 055fec21b..e7bb41227 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiutil.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiutil.c
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiutil.c,v 1.7 2002/01/16 16:22:28 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiutil.c,v 1.8 2003/01/01 19:16:34 tsi Exp $ */
 /*
- * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiutil.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiutil.h
index 5f7cd0c74..f43295d90 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiutil.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiutil.h
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiutil.h,v 1.7 2002/01/16 16:22:28 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiutil.h,v 1.8 2003/01/01 19:16:34 tsi Exp $ */
 /*
- * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/ativalid.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/ativalid.c
index a7a1a4db4..adc873428 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/ativalid.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/ativalid.c
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/ativalid.c,v 1.14 2002/02/14 22:08:03 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/ativalid.c,v 1.15 2003/01/01 19:16:34 tsi Exp $ */
 /*
- * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/ativalid.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/ativalid.h
index fe7e142b7..055ed509b 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/ativalid.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/ativalid.h
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/ativalid.h,v 1.7 2002/01/16 16:22:28 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/ativalid.h,v 1.8 2003/01/01 19:16:34 tsi Exp $ */
 /*
- * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/ativersion.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/ativersion.h
index 82999fd3e..082cbb142 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/ativersion.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/ativersion.h
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/ativersion.h,v 1.53 2002/10/15 20:26:05 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/ativersion.h,v 1.58 2003/01/10 20:57:58 tsi Exp $ */
 /*
- * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
@@ -24,14 +24,26 @@
 #ifndef ___ATIVERSION_H___
 #define ___ATIVERSION_H___ 1
 
+#undef  ATI_NAME
+#undef  ATI_DRIVER_NAME
+#undef  ATI_VERSION_MAJOR
+#undef  ATI_VERSION_MINOR
+#undef  ATI_VERSION_PATCH
+#undef  ATI_VERSION_CURRENT
+#undef  ATI_VERSION_EVALUATE
+#undef  ATI_VERSION_STRINGIFY
+#undef  ATI_VERSION_NAME
+
 #define ATI_NAME          "ATI"
 #define ATI_DRIVER_NAME   "ati"
 
 #define ATI_VERSION_MAJOR 6
 #define ATI_VERSION_MINOR 4
-#define ATI_VERSION_PATCH 14
+#define ATI_VERSION_PATCH 18
 
+#ifndef ATI_VERSION_EXTRA
 #define ATI_VERSION_EXTRA ""
+#endif
 
 #define ATI_VERSION_CURRENT \
     ((ATI_VERSION_MAJOR << 20) | (ATI_VERSION_MINOR << 10) | ATI_VERSION_PATCH)
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/ativga.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/ativga.c
index 52ab3648e..9a732a37e 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/ativga.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/ativga.c
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/ativga.c,v 1.17 2002/02/26 05:10:56 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/ativga.c,v 1.19 2003/01/01 19:16:34 tsi Exp $ */
 /*
- * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
@@ -202,10 +202,24 @@ ATIVGACalculate
         Index = pMode->CrtcHBlankEnd - pMode->CrtcHBlankStart - 0x3F;
         if (Index > 0)
         {
-            pMode->CrtcHBlankStart += Index / 2;
-            if (pMode->CrtcHBlankStart >= pMode->CrtcHSyncStart)
-                pMode->CrtcHBlankStart = pMode->CrtcHSyncStart - 1;
-            pMode->CrtcHBlankEnd = pMode->CrtcHBlankStart + 0x3F;
+            if ((pMode->CrtcHBlankEnd - Index) > pMode->CrtcHSyncEnd)
+            {
+                pMode->CrtcHBlankStart += Index / 2;
+                if (pMode->CrtcHBlankStart >= pMode->CrtcHSyncStart)
+                    pMode->CrtcHBlankStart = pMode->CrtcHSyncStart - 1;
+                pMode->CrtcHBlankEnd = pMode->CrtcHBlankStart + 0x3F;
+            }
+            else
+            {
+                Index -= 0x40;
+                if (Index > 0)
+                {
+                    pMode->CrtcHBlankStart += Index / 2;
+                    if (pMode->CrtcHBlankStart >= pMode->CrtcHSyncStart)
+                        pMode->CrtcHBlankStart = pMode->CrtcHSyncStart - 1;
+                    pMode->CrtcHBlankEnd = pMode->CrtcHBlankStart + 0x7F;
+                }
+            }
         }
     }
 
@@ -326,13 +340,27 @@ ATIVGACalculate
     }
 
     /* Check blank pulse width */
-    Index = pMode->CrtcVBlankEnd - pMode->CrtcVBlankStart - 0x0FF;
+    Index = pMode->CrtcVBlankEnd - pMode->CrtcVBlankStart - 0x00FF;
     if (Index > 0)
     {
-        pMode->CrtcVBlankStart += Index / 2;
-        if (pMode->CrtcVBlankStart >= pMode->CrtcVSyncStart)
-            pMode->CrtcVBlankStart = pMode->CrtcVSyncStart - 1;
-        pMode->CrtcVBlankEnd = pMode->CrtcVBlankStart + 0x0FF;
+        if ((pMode->CrtcVBlankEnd - Index) > pMode->CrtcVSyncEnd)
+        {
+            pMode->CrtcVBlankStart += Index / 2;
+            if (pMode->CrtcVBlankStart >= pMode->CrtcVSyncStart)
+                pMode->CrtcVBlankStart = pMode->CrtcVSyncStart - 1;
+            pMode->CrtcVBlankEnd = pMode->CrtcVBlankStart + 0x00FF;
+        }
+        else
+        {
+            Index -= 0x0100;
+            if (Index > 0)
+            {
+                pMode->CrtcVBlankStart += Index / 2;
+                if (pMode->CrtcVBlankStart >= pMode->CrtcVSyncStart)
+                    pMode->CrtcVBlankStart = pMode->CrtcVSyncStart - 1;
+                pMode->CrtcVBlankEnd = pMode->CrtcVBlankStart + 0x01FF;
+            }
+        }
     }
 
     /* Set up sequencer register values */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/ativga.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/ativga.h
index 643342fd5..ff65b3540 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/ativga.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/ativga.h
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/ativga.h,v 1.9 2002/01/16 16:22:28 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/ativga.h,v 1.10 2003/01/01 19:16:34 tsi Exp $ */
 /*
- * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/ativgaio.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/ativgaio.c
index 2ffbe41df..def54e24b 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/ativgaio.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/ativgaio.c
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/ativgaio.c,v 1.3 2002/01/16 16:22:28 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/ativgaio.c,v 1.4 2003/01/01 19:16:34 tsi Exp $ */
 /*
- * Copyright 2000 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 2000 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/ativgaio.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/ativgaio.h
index b7321c5ef..e08ecff8b 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/ativgaio.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/ativgaio.h
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/ativgaio.h,v 1.4 2002/01/16 16:22:28 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/ativgaio.h,v 1.5 2003/01/01 19:16:34 tsi Exp $ */
 /*
- * Copyright 2000 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 2000 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atividmem.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/atividmem.c
index 43fab9def..32ea23fc0 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atividmem.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atividmem.c
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atividmem.c,v 1.13 2002/01/16 16:22:28 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atividmem.c,v 1.14 2003/01/01 19:16:34 tsi Exp $ */
 /*
- * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atividmem.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atividmem.h
index 0eaf858ca..7e4c26cdd 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atividmem.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atividmem.h
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atividmem.h,v 1.8 2002/01/16 16:22:28 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atividmem.h,v 1.9 2003/01/01 19:16:35 tsi Exp $ */
 /*
- * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiwonder.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiwonder.c
index bce969667..404aeaf02 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiwonder.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiwonder.c
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiwonder.c,v 1.13 2002/01/16 16:22:28 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiwonder.c,v 1.14 2003/01/01 19:16:35 tsi Exp $ */
 /*
- * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiwonder.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiwonder.h
index 9790ae604..34f19cfeb 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiwonder.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiwonder.h
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiwonder.h,v 1.8 2002/01/16 16:22:28 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiwonder.h,v 1.9 2003/01/01 19:16:35 tsi Exp $ */
 /*
- * Copyright 1997 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 1997 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiwonderio.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiwonderio.c
index 09759402b..064e49edf 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiwonderio.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiwonderio.c
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiwonderio.c,v 1.3 2002/01/16 16:22:28 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiwonderio.c,v 1.4 2003/01/01 19:16:35 tsi Exp $ */
 /*
- * Copyright 2000 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 2000 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiwonderio.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiwonderio.h
index 544f68a6f..dd0fa5858 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atiwonderio.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atiwonderio.h
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiwonderio.h,v 1.3 2002/01/16 16:22:28 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atiwonderio.h,v 1.4 2003/01/01 19:16:35 tsi Exp $ */
 /*
- * Copyright 2000 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 2000 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atixv.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/atixv.c
index 627c10321..b15aa53f9 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atixv.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atixv.c
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atixv.c,v 1.2 2002/01/16 16:22:28 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atixv.c,v 1.3 2003/01/01 19:16:35 tsi Exp $ */
 /*
- * Copyright 2001 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 2001 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/atixv.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/atixv.h
index bc4a1e312..a5a3de604 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/atixv.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/atixv.h
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atixv.h,v 1.2 2002/01/16 16:22:28 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atixv.h,v 1.3 2003/01/01 19:16:35 tsi Exp $ */
 /*
- * Copyright 2001 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 2001 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128.h
index 7b3e6702f..d856fd8c1 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128.h,v 1.20 2002/06/04 23:04:50 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128.h,v 1.24 2002/12/16 16:19:10 dawes Exp $ */
 /*
  * Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario,
  *                      Precision Insight, Inc., Cedar Park, Texas, and
@@ -61,9 +61,10 @@
 #include "GL/glxint.h"
 #endif
 
-#define R128_DEBUG    0         /* Turn off debugging output                */
+#define R128_DEBUG          0   /* Turn off debugging output               */
+#define R128_IDLE_RETRY    32   /* Fall out of idle loops after this count */
 #define R128_TIMEOUT  2000000   /* Fall out of wait loops after this count */
-#define R128_MMIOSIZE 0x80000
+#define R128_MMIOSIZE  0x4000
 
 #define R128_VBIOS_SIZE 0x00010000
 
@@ -379,6 +380,9 @@ typedef struct {
 
     CARD32            aux_sc_cntl;
 
+    int               irq;
+    CARD32            gen_int_cntl;
+
     Bool              DMAForXv;
 #endif
 
@@ -425,7 +429,7 @@ extern Bool        R128DRIFinishScreenInit(ScreenPtr pScreen);
 
 #define R128CCE_START(pScrn, info)					\
 do {									\
-    int _ret = drmR128StartCCE(info->drmFD);				\
+    int _ret = drmCommandNone(info->drmFD, DRM_R128_CCE_START);		\
     if (_ret) {								\
 	xf86DrvMsg(pScrn->scrnIndex, X_ERROR,				\
 		   "%s: CCE start %d\n", __FUNCTION__, _ret);		\
@@ -434,7 +438,7 @@ do {									\
 
 #define R128CCE_STOP(pScrn, info)					\
 do {									\
-    int _ret = drmR128StopCCE(info->drmFD);				\
+    int _ret = R128CCEStop(pScrn);					\
     if (_ret) {								\
 	xf86DrvMsg(pScrn->scrnIndex, X_ERROR,				\
 		   "%s: CCE stop %d\n", __FUNCTION__, _ret);		\
@@ -445,7 +449,7 @@ do {									\
 do {									\
     if (info->directRenderingEnabled					\
 	&& R128CCE_USE_RING_BUFFER(info->CCEMode)) {			\
-	int _ret = drmR128ResetCCE(info->drmFD);			\
+	int _ret = drmCommandNone(info->drmFD, DRM_R128_CCE_RESET);	\
 	if (_ret) {							\
 	    xf86DrvMsg(pScrn->scrnIndex, X_ERROR,			\
 		       "%s: CCE reset %d\n", __FUNCTION__, _ret);	\
@@ -453,14 +457,13 @@ do {									\
     }									\
 } while (0)
 
-#endif
-
-#ifdef XF86DRI
 extern drmBufPtr   R128CCEGetBuffer(ScrnInfoPtr pScrn);
 #endif
+
 extern void        R128CCEFlushIndirect(ScrnInfoPtr pScrn, int discard);
 extern void        R128CCEReleaseIndirect(ScrnInfoPtr pScrn);
 extern void        R128CCEWaitForIdle(ScrnInfoPtr pScrn);
+extern int         R128CCEStop(ScrnInfoPtr pScrn);
 
 
 #define CCE_PACKET0( reg, n )						\
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_accel.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_accel.c
index 898162c99..9329ad251 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_accel.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_accel.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_accel.c,v 1.14 2002/02/14 23:10:11 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_accel.c,v 1.16 2002/11/15 03:01:35 dawes Exp $ */
 /*
  * Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario,
  *                      Precision Insight, Inc., Cedar Park, Texas, and
@@ -32,7 +32,7 @@
  * Authors:
  *   Rickard E. Faith <faith@valinux.com>
  *   Kevin E. Martin <martin@valinux.com>
- *   Alan Hourihane <ahourihane@valinux.com>
+ *   Alan Hourihane <alanh@fairlite.demon.co.uk>
  *
  * Credits:
  *
@@ -229,13 +229,16 @@ void R128WaitForIdle(ScrnInfoPtr pScrn)
 void R128CCEWaitForIdle(ScrnInfoPtr pScrn)
 {
     R128InfoPtr info = R128PTR(pScrn);
-    int         ret;
+    int         ret, i;
 
     FLUSH_RING();
 
     for (;;) {
-        /* The ioctl already has a timeout */
-        ret = drmR128WaitForIdleCCE(info->drmFD);
+        i = 0;
+        do {
+            ret = drmCommandNone(info->drmFD, DRM_R128_CCE_IDLE);
+        } while ( ret && errno == EBUSY && i++ < R128_IDLE_RETRY );
+
 	if (ret && ret != -EBUSY) {
 	    xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
 		       "%s: CCE idle %d\n", __FUNCTION__, ret);
@@ -252,6 +255,49 @@ void R128CCEWaitForIdle(ScrnInfoPtr pScrn)
 	R128CCE_START(pScrn, info);
     }
 }
+
+int R128CCEStop(ScrnInfoPtr pScrn)
+{
+    R128InfoPtr    info = R128PTR(pScrn);
+    drmR128CCEStop stop;
+    int            ret, i;
+
+    stop.flush = 1;
+    stop.idle  = 1;
+
+    ret = drmCommandWrite( info->drmFD, DRM_R128_CCE_STOP,
+                           &stop, sizeof(drmR128CCEStop) );
+
+    if ( ret == 0 ) {
+        return 0;
+    } else if ( errno != EBUSY ) {
+        return -errno;
+    }
+
+    stop.flush = 0;
+
+    i = 0;
+    do {
+        ret = drmCommandWrite( info->drmFD, DRM_R128_CCE_STOP,
+                               &stop, sizeof(drmR128CCEStop) );
+    } while ( ret && errno == EBUSY && i++ < R128_IDLE_RETRY );
+
+    if ( ret == 0 ) {
+        return 0;
+    } else if ( errno != EBUSY ) {
+        return -errno;
+    }
+
+    stop.idle = 0;
+
+    if ( drmCommandWrite( info->drmFD, DRM_R128_CCE_STOP,
+                          &stop, sizeof(drmR128CCEStop) )) {
+        return -errno;
+    } else {
+        return 0;
+    }
+}
+
 #endif
 
 /* Setup for XAA SolidFill. */
@@ -1001,10 +1047,19 @@ void R128EngineInit(ScrnInfoPtr pScrn)
     OUTREG(R128_DP_WRITE_MASK,     0xffffffff);
 
     R128WaitForFifo(pScrn, 1);
+
 #if X_BYTE_ORDER == X_BIG_ENDIAN
-    OUTREGP(R128_DP_DATATYPE,
-	    R128_HOST_BIG_ENDIAN_EN, ~R128_HOST_BIG_ENDIAN_EN);
-#else
+    /* FIXME: this is a kludge for texture uploads in the 3D driver. Look at
+     * how the radeon driver handles HOST_DATA_SWAP if you want to implement
+     * CCE ImageWrite acceleration or anything needing this bit */
+#ifdef XF86DRI
+    if (info->directRenderingEnabled)
+	OUTREGP(R128_DP_DATATYPE, 0, ~R128_HOST_BIG_ENDIAN_EN);
+    else
+#endif
+	OUTREGP(R128_DP_DATATYPE,
+		R128_HOST_BIG_ENDIAN_EN, ~R128_HOST_BIG_ENDIAN_EN);
+#else /* X_LITTLE_ENDIAN */
     OUTREGP(R128_DP_DATATYPE, 0, ~R128_HOST_BIG_ENDIAN_EN);
 #endif
 
@@ -1502,11 +1557,11 @@ drmBufPtr R128CCEGetBuffer( ScrnInfoPtr pScrn )
     while ( 1 ) {
 	do {
 	    ret = drmDMA( info->drmFD, &dma );
-	    if ( ret && ret != -EBUSY ) {
+	    if ( ret && ret != -EAGAIN ) {
 		xf86DrvMsg( pScrn->scrnIndex, X_ERROR,
 			    "%s: CCE GetBuffer %d\n", __FUNCTION__, ret );
 	    }
-	} while ( ( ret == -EBUSY ) && ( i++ < R128_TIMEOUT ) );
+	} while ( ( ret == -EAGAIN ) && ( i++ < R128_TIMEOUT ) );
 
 	if ( ret == 0 ) {
 	    buf = &info->buffers->list[indx];
@@ -1536,6 +1591,7 @@ void R128CCEFlushIndirect( ScrnInfoPtr pScrn, int discard )
     R128InfoPtr   info = R128PTR(pScrn);
     drmBufPtr buffer = info->indirectBuffer;
     int start = info->indirectStart;
+    drmR128Indirect indirect;
 
     if ( !buffer )
 	return;
@@ -1543,8 +1599,13 @@ void R128CCEFlushIndirect( ScrnInfoPtr pScrn, int discard )
     if ( (start == buffer->used) && !discard )
         return;
 
-    drmR128FlushIndirectBuffer( info->drmFD, buffer->idx,
-				start, buffer->used, discard );
+    indirect.idx = buffer->idx;
+    indirect.start = start;
+    indirect.end = buffer->used;
+    indirect.discard = discard;
+
+    drmCommandWriteRead( info->drmFD, DRM_R128_INDIRECT,
+                         &indirect, sizeof(drmR128Indirect));
 
     if ( discard )
         buffer = info->indirectBuffer = R128CCEGetBuffer( pScrn );
@@ -1563,6 +1624,7 @@ void R128CCEReleaseIndirect( ScrnInfoPtr pScrn )
     R128InfoPtr   info = R128PTR(pScrn);
     drmBufPtr buffer = info->indirectBuffer;
     int start = info->indirectStart;
+    drmR128Indirect indirect;
 
     info->indirectBuffer = NULL;
     info->indirectStart = 0;
@@ -1570,8 +1632,13 @@ void R128CCEReleaseIndirect( ScrnInfoPtr pScrn )
     if ( !buffer )
 	return;
 
-    drmR128FlushIndirectBuffer( info->drmFD, buffer->idx,
-				start, buffer->used, 1 );
+    indirect.idx = buffer->idx;
+    indirect.start = start;
+    indirect.end = buffer->used;
+    indirect.discard = 1;
+
+    drmCommandWriteRead( info->drmFD, DRM_R128_INDIRECT,
+                         &indirect, sizeof(drmR128Indirect));
 }
 
 static void R128CCEAccelInit(ScrnInfoPtr pScrn, XAAInfoRecPtr a)
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_cursor.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_cursor.c
index 4b52c8d25..5a2ac4f09 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_cursor.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_cursor.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_cursor.c,v 1.5 2001/03/03 22:26:09 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_cursor.c,v 1.6 2003/02/13 20:28:40 tsi Exp $ */
 /*
  * Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario,
  *                      Precision Insight, Inc., Cedar Park, Texas, and
@@ -216,7 +216,8 @@ Bool R128CursorInit(ScreenPtr pScreen)
     cursor->MaxWidth          = 64;
     cursor->MaxHeight         = 64;
     cursor->Flags             = (HARDWARE_CURSOR_TRUECOLOR_AT_8BPP
-
+				 | HARDWARE_CURSOR_SHOW_TRANSPARENT
+				 | HARDWARE_CURSOR_UPDATE_UNHIDDEN
 #if X_BYTE_ORDER == X_LITTLE_ENDIAN
 				 | HARDWARE_CURSOR_BIT_ORDER_MSBFIRST
 #endif
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dga.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dga.c
index 18c06d5bf..6c0013afb 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dga.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dga.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dga.c,v 1.8 2002/05/29 22:48:38 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dga.c,v 1.9 2002/10/30 12:52:12 alanh Exp $ */
 /*
  * Authors:
  *   Ove Kåven <ovek@transgaming.com>,
@@ -16,7 +16,7 @@
 #include "dgaproc.h"
 
 #ifdef XF86DRI
-#include "xf86drmR128.h"
+#include "r128_common.h"
 #endif
 
 static Bool R128_OpenFramebuffer(ScrnInfoPtr, char **, unsigned char **,
@@ -207,7 +207,7 @@ R128DGAInit(ScreenPtr pScreen)
    info->DGAFuncs.BlitTransRect      = NULL;
 
    if (info->accel) {
-      info->DGAFuncs.Sync            = R128WaitForIdle;
+      info->DGAFuncs.Sync            = info->accel->Sync;
       if (info->accel->SetupForSolidFill &&
 	  info->accel->SubsequentSolidFillRect)
 	info->DGAFuncs.FillRect      = R128_FillRect;
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dri.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dri.c
index fce12713b..63cedb59f 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dri.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dri.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dri.c,v 1.24 2002/10/08 22:14:04 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dri.c,v 1.28 2003/02/07 20:41:14 martin Exp $ */
 /*
  * Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario,
  *                      Precision Insight, Inc., Cedar Park, Texas, and
@@ -76,7 +76,7 @@ static Bool R128InitVisualConfigs(ScreenPtr pScreen)
     __GLXvisualConfig *pConfigs        = 0;
     R128ConfigPrivPtr pR128Configs     = 0;
     R128ConfigPrivPtr *pR128ConfigPtrs = 0;
-    int               i, accum, stencil;
+    int               i, accum, stencil, db;
 
     switch (info->CurrentLayout.pixel_code) {
     case 8:  /* 8bpp mode is not support */
@@ -89,11 +89,13 @@ static Bool R128InitVisualConfigs(ScreenPtr pScreen)
 
 #define R128_USE_ACCUM   1
 #define R128_USE_STENCIL 1
+#define R128_USE_DB      1
 
     case 16:
 	numConfigs = 1;
 	if (R128_USE_ACCUM)   numConfigs *= 2;
 	if (R128_USE_STENCIL) numConfigs *= 2;
+	if (R128_USE_DB)      numConfigs *= 2;
 
 	if (!(pConfigs
 	      = (__GLXvisualConfig*)xcalloc(sizeof(__GLXvisualConfig),
@@ -115,7 +117,8 @@ static Bool R128InitVisualConfigs(ScreenPtr pScreen)
 	}
 
 	i = 0;
-	for (accum = 0; accum <= R128_USE_ACCUM; accum++) {
+	for (db = 0; db <= R128_USE_DB; db++) {
+	  for (accum = 0; accum <= R128_USE_ACCUM; accum++) {
 	    for (stencil = 0; stencil <= R128_USE_STENCIL; stencil++) {
 		pR128ConfigPtrs[i] = &pR128Configs[i];
 
@@ -141,7 +144,10 @@ static Bool R128InitVisualConfigs(ScreenPtr pScreen)
 		    pConfigs[i].accumBlueSize  = 0;
 		    pConfigs[i].accumAlphaSize = 0;
 		}
-		pConfigs[i].doubleBuffer       = TRUE;
+		if (db) 
+		    pConfigs[i].doubleBuffer       = TRUE;
+		else
+		    pConfigs[i].doubleBuffer       = FALSE;
 		pConfigs[i].stereo             = FALSE;
 		pConfigs[i].bufferSize         = 16;
 		pConfigs[i].depthSize          = 16;
@@ -164,6 +170,7 @@ static Bool R128InitVisualConfigs(ScreenPtr pScreen)
 		pConfigs[i].transparentIndex   = 0;
 		i++;
 	    }
+	  }
 	}
 	break;
 
@@ -171,6 +178,7 @@ static Bool R128InitVisualConfigs(ScreenPtr pScreen)
 	numConfigs = 1;
 	if (R128_USE_ACCUM)   numConfigs *= 2;
 	if (R128_USE_STENCIL) numConfigs *= 2;
+	if (R128_USE_DB)      numConfigs *= 2;
 
 	if (!(pConfigs
 	      = (__GLXvisualConfig*)xcalloc(sizeof(__GLXvisualConfig),
@@ -192,7 +200,8 @@ static Bool R128InitVisualConfigs(ScreenPtr pScreen)
 	}
 
 	i = 0;
-	for (accum = 0; accum <= R128_USE_ACCUM; accum++) {
+	for (db = 0; db <= R128_USE_DB; db++) {
+	  for (accum = 0; accum <= R128_USE_ACCUM; accum++) {
 	    for (stencil = 0; stencil <= R128_USE_STENCIL; stencil++) {
 		pR128ConfigPtrs[i] = &pR128Configs[i];
 
@@ -218,7 +227,10 @@ static Bool R128InitVisualConfigs(ScreenPtr pScreen)
 		    pConfigs[i].accumBlueSize  = 0;
 		    pConfigs[i].accumAlphaSize = 0;
 		}
-		pConfigs[i].doubleBuffer       = TRUE;
+		if (db)
+		    pConfigs[i].doubleBuffer       = TRUE;
+		else
+		    pConfigs[i].doubleBuffer       = FALSE;
 		pConfigs[i].stereo             = FALSE;
 		pConfigs[i].bufferSize         = 24;
 		if (stencil) {
@@ -243,6 +255,7 @@ static Bool R128InitVisualConfigs(ScreenPtr pScreen)
 		pConfigs[i].transparentIndex   = 0;
 		i++;
 	    }
+	  }
 	}
 	break;
     }
@@ -420,6 +433,7 @@ static Bool R128DRIAgpInit(R128InfoPtr info, ScreenPtr pScreen)
     unsigned long cntl, chunk;
     int           s, l;
     int           flags;
+    unsigned long agpBase;
 
     if (drmAgpAcquire(info->drmFD) < 0) {
 	xf86DrvMsg(pScreen->myNum, X_WARNING, "[agp] AGP not available\n");
@@ -591,7 +605,8 @@ static Bool R128DRIAgpInit(R128InfoPtr info, ScreenPtr pScreen)
 		   info->agpSize*1024);
 	return FALSE;
     }
-    OUTREG(R128_AGP_BASE, info->ringHandle); /* Ring buf is at AGP offset 0 */
+    agpBase = drmAgpBase(info->drmFD);
+    OUTREG(R128_AGP_BASE, agpBase); 
     OUTREG(R128_AGP_CNTL, cntl);
 
 				/* Disable Rage 128's PCIGART registers */
@@ -727,6 +742,40 @@ static Bool R128DRIPciInit(R128InfoPtr info, ScreenPtr pScreen)
     case PCI_CHIP_RAGE128TF:
     case PCI_CHIP_RAGE128TL:
     case PCI_CHIP_RAGE128TR:
+    /* FIXME: ATI documentation does not specify if the following chips are
+     * AGP or PCI, it just mentions their PCI IDs.  I'm assuming they're AGP
+     * until I get more correct information. <mharris@redhat.com>
+     */
+    case PCI_CHIP_RAGE128PA:
+    case PCI_CHIP_RAGE128PB:
+    case PCI_CHIP_RAGE128PC:
+    case PCI_CHIP_RAGE128PE:
+    case PCI_CHIP_RAGE128PG:
+    case PCI_CHIP_RAGE128PH:
+    case PCI_CHIP_RAGE128PI:
+    case PCI_CHIP_RAGE128PJ:
+    case PCI_CHIP_RAGE128PK:
+    case PCI_CHIP_RAGE128PL:
+    case PCI_CHIP_RAGE128PM:
+    case PCI_CHIP_RAGE128PN:
+    case PCI_CHIP_RAGE128PO:
+    case PCI_CHIP_RAGE128PQ:
+    case PCI_CHIP_RAGE128PS:
+    case PCI_CHIP_RAGE128PT:
+    case PCI_CHIP_RAGE128PU:
+    case PCI_CHIP_RAGE128PV:
+    case PCI_CHIP_RAGE128PW:
+    case PCI_CHIP_RAGE128PX:
+    case PCI_CHIP_RAGE128SE:
+    case PCI_CHIP_RAGE128SF:
+    case PCI_CHIP_RAGE128SG:
+    case PCI_CHIP_RAGE128SH:
+    case PCI_CHIP_RAGE128SK:
+    case PCI_CHIP_RAGE128SL:
+    case PCI_CHIP_RAGE128SN:
+    case PCI_CHIP_RAGE128TS:
+    case PCI_CHIP_RAGE128TT:
+    case PCI_CHIP_RAGE128TU:
     default:
 	/* This is really an AGP card, force PCI GART mode */
         chunk = INREG(R128_BM_CHUNK_0_VAL);
@@ -767,6 +816,9 @@ static int R128DRIKernelInit(R128InfoPtr info, ScreenPtr pScreen)
 {
     drmR128Init drmInfo;
 
+    memset( &drmInfo, 0, sizeof(drmR128Init) );
+
+    drmInfo.func                = DRM_R128_INIT_CCE;
     drmInfo.sarea_priv_offset   = sizeof(XF86DRISAREARec);
     drmInfo.is_pci              = info->IsPCI;
     drmInfo.cce_mode            = info->CCEMode;
@@ -787,14 +839,16 @@ static int R128DRIKernelInit(R128InfoPtr info, ScreenPtr pScreen)
     drmInfo.depth_pitch         = info->depthPitch;
     drmInfo.span_offset         = info->spanOffset;
 
-    drmInfo.fb_offset           = info->LinearAddr;
+    drmInfo.fb_offset           = info->fbHandle;
     drmInfo.mmio_offset         = info->registerHandle;
     drmInfo.ring_offset         = info->ringHandle;
     drmInfo.ring_rptr_offset    = info->ringReadPtrHandle;
     drmInfo.buffers_offset      = info->bufHandle;
     drmInfo.agp_textures_offset = info->agpTexHandle;
 
-    if (drmR128InitCCE(info->drmFD, &drmInfo) < 0) return FALSE;
+    if (drmCommandWrite(info->drmFD, DRM_R128_INIT,
+                        &drmInfo, sizeof(drmR128Init)) < 0)
+        return FALSE;
 
     return TRUE;
 }
@@ -838,6 +892,35 @@ static Bool R128DRIBufInit(R128InfoPtr info, ScreenPtr pScreen)
     return TRUE;
 }
 
+static void R128DRIIrqInit(R128InfoPtr info, ScreenPtr pScreen)
+{
+   ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
+
+   if (!info->irq) {
+      info->irq = drmGetInterruptFromBusID(
+	 info->drmFD,
+	 ((pciConfigPtr)info->PciInfo->thisCard)->busnum,
+	 ((pciConfigPtr)info->PciInfo->thisCard)->devnum,
+	 ((pciConfigPtr)info->PciInfo->thisCard)->funcnum);
+
+      if((drmCtlInstHandler(info->drmFD, info->irq)) != 0) {
+	 xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+		    "[drm] failure adding irq handler, "
+		    "there is a device already using that irq\n"
+		    "[drm] falling back to irq-free operation\n");
+	 info->irq = 0;
+      } else {
+          unsigned char *R128MMIO = info->MMIO;
+          info->gen_int_cntl = INREG( R128_GEN_INT_CNTL );
+      }
+   }
+
+   if (info->irq)
+      xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+		 "[drm] dma control initialized, using IRQ %d\n",
+		 info->irq);
+}
+
 /* Initialize the CCE state, and start the CCE (if used by the X server) */
 static void R128DRICCEInit(ScrnInfoPtr pScrn)
 {
@@ -994,6 +1077,42 @@ Bool R128DRIScreenInit(ScreenPtr pScreen)
 	return FALSE;
     }
 
+    /* Check the DRM lib version.
+       drmGetLibVersion was not supported in version 1.0, so check for
+       symbol first to avoid possible crash or hang.
+     */
+    if (xf86LoaderCheckSymbol("drmGetLibVersion")) {
+        version = drmGetLibVersion(info->drmFD);
+    }
+    else {
+        /* drmlib version 1.0.0 didn't have the drmGetLibVersion
+           entry point.  Fake it by allocating a version record
+           via drmGetVersion and changing it to version 1.0.0
+         */
+        version = drmGetVersion(info->drmFD);
+        version->version_major      = 1;
+        version->version_minor      = 0;
+        version->version_patchlevel = 0;
+    }
+
+    if (version) {
+	if (version->version_major != 1 ||
+	    version->version_minor < 1) {
+            /* incompatible drm library version */
+            xf86DrvMsg(pScreen->myNum, X_ERROR,
+		"[dri] R128DRIScreenInit failed because of a version mismatch.\n"
+		"[dri] libdrm.a module version is %d.%d.%d but version 1.1.x is needed.\n"
+		"[dri] Disabling DRI.\n",
+                version->version_major,
+                version->version_minor,
+                version->version_patchlevel);
+            drmFreeVersion(version);
+	    R128DRICloseScreen(pScreen);
+            return FALSE;
+	}
+	drmFreeVersion(version);
+    }
+
     /* Check the r128 DRM version */
     version = drmGetVersion(info->drmFD);
     if (version) {
@@ -1037,6 +1156,18 @@ Bool R128DRIScreenInit(ScreenPtr pScreen)
 	return FALSE;
     }
 
+				/* DRIScreenInit adds the frame buffer
+				   map, but we need it as well */
+    {
+	void *scratch_ptr;
+        int scratch_int;
+	
+	DRIGetDeviceInfo(pScreen, &info->fbHandle,
+                         &scratch_int, &scratch_int, 
+                         &scratch_int, &scratch_int,
+                         &scratch_ptr);
+    }
+
 				/* FIXME: When are these mappings unmapped? */
 
     if (!R128InitVisualConfigs(pScreen)) {
@@ -1082,6 +1213,9 @@ Bool R128DRIFinishScreenInit(ScreenPtr pScreen)
 	return FALSE;
     }
 
+    /* Initialize IRQ */
+    R128DRIIrqInit(info, pScreen);
+
     /* Initialize and start the CCE if required */
     R128DRICCEInit(pScrn);
 
@@ -1128,12 +1262,18 @@ void R128DRICloseScreen(ScreenPtr pScreen)
 {
     ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
     R128InfoPtr info = R128PTR(pScrn);
+    drmR128Init drmInfo;
 
 				/* Stop the CCE if it is still in use */
     if (info->directRenderingEnabled) {
 	R128CCE_STOP(pScrn, info);
     }
 
+    if (info->irq) {
+	drmCtlUninstHandler(info->drmFD);
+	info->irq = 0;
+    }
+
 				/* De-allocate vertex buffers */
     if (info->buffers) {
 	drmUnmapBufs(info->buffers);
@@ -1141,7 +1281,10 @@ void R128DRICloseScreen(ScreenPtr pScreen)
     }
 
 				/* De-allocate all kernel resources */
-    drmR128CleanupCCE(info->drmFD);
+    memset(&drmInfo, 0, sizeof(drmR128Init));
+    drmInfo.func = DRM_R128_CLEANUP_CCE;
+    drmCommandWrite(info->drmFD, DRM_R128_INIT,
+                    &drmInfo, sizeof(drmR128Init));
 
 				/* De-allocate all AGP resources */
     if (info->agpTex) {
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dri.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dri.h
index 5ef9cdfee..1339a4502 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dri.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dri.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dri.h,v 1.6 2001/03/21 17:02:21 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dri.h,v 1.7 2002/10/30 12:52:12 alanh Exp $ */
 /*
  * Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario,
  *                      Precision Insight, Inc., Cedar Park, Texas, and
@@ -40,7 +40,7 @@
 #define _R128_DRI_
 
 #include "xf86drm.h"
-#include "xf86drmR128.h"
+#include "r128_common.h"
 
 /* DRI Driver defaults */
 #define R128_DEFAULT_CCE_PIO_MODE R128_PM4_64PIO_64VCBM_64INDBM
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_driver.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_driver.c
index 02b4a847a..b02cd7ab9 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_driver.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_driver.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_driver.c,v 1.68 2002/10/08 22:14:04 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_driver.c,v 1.75 2003/02/19 01:19:41 dawes Exp $ */
 /*
  * Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario,
  *                      Precision Insight, Inc., Cedar Park, Texas, and
@@ -284,18 +284,20 @@ static const char *drmSymbols[] = {
     "drmAgpUnbind",
     "drmAgpVendorId",
     "drmAvailable",
+    "drmCommandNone",
+    "drmCommandRead",
+    "drmCommandWrite",
+    "drmCommandWriteRead",
+    "drmCtlInstHandler",
+    "drmCtlUninstHandler",
+    "drmFreeBufs",
     "drmFreeVersion",
+    "drmGetInterruptFromBusID",
+    "drmGetLibVersion",
     "drmGetVersion",
     "drmMap",
     "drmMapBufs",
     "drmDMA",
-    "drmR128CleanupCCE",
-    "drmR128InitCCE",
-    "drmR128ResetCCE",
-    "drmR128StartCCE",
-    "drmR128StopCCE",
-    "drmR128WaitForIdleCCE",
-    "drmR128FlushIndirectBuffer",
     "drmScatterGatherAlloc",
     "drmScatterGatherFree",
     "drmUnmap",
@@ -351,6 +353,7 @@ void R128LoaderRefSymLists(void)
 		      driSymbols,
 #endif
 		      fbdevHWSymbols,
+		      int10Symbols,
 		      vbeSymbols,
 		      /* ddcsymbols, */
 		      i2cSymbols,
@@ -929,10 +932,44 @@ static Bool R128PreInitConfig(ScrnInfoPtr pScrn)
 	switch (info->Chipset) {
 	/* R128 Pro and Pro2 can have DFP, we will deal with it.
 	   No support for dual-head/xinerama yet.
-          M3 can also have DFP, no support for now */	
+           M3 can also have DFP, no support for now */	
 	case PCI_CHIP_RAGE128TF: 
 	case PCI_CHIP_RAGE128TL:
-	case PCI_CHIP_RAGE128TR: info->isPro2 = TRUE; 
+	case PCI_CHIP_RAGE128TR:
+	/* FIXME: RAGE128 TS/TT/TU are assumed to be PRO2 as all 6 chips came
+	 *        out at the same time, so are of the same family likely.
+	 *        This requires confirmation however to be fully correct.
+	 *        Mike A. Harris <mharris@redhat.com>
+	 */
+	case PCI_CHIP_RAGE128TS: 
+	case PCI_CHIP_RAGE128TT:
+	case PCI_CHIP_RAGE128TU: info->isPro2 = TRUE; 
+	/* FIXME: RAGE128 P[ABCEGHIJKLMNOQSTUVWX] are assumed to have DFP
+	 *        capability, as the comment at the top suggests.
+	 *        This requires confirmation however to be fully correct.
+	 *        Mike A. Harris <mharris@redhat.com>
+	 */
+	case PCI_CHIP_RAGE128PA:
+	case PCI_CHIP_RAGE128PB:
+	case PCI_CHIP_RAGE128PC:
+	case PCI_CHIP_RAGE128PE:
+	case PCI_CHIP_RAGE128PG:
+	case PCI_CHIP_RAGE128PH:
+	case PCI_CHIP_RAGE128PI:
+	case PCI_CHIP_RAGE128PJ:
+	case PCI_CHIP_RAGE128PK:
+	case PCI_CHIP_RAGE128PL:
+	case PCI_CHIP_RAGE128PM:
+	case PCI_CHIP_RAGE128PN:
+	case PCI_CHIP_RAGE128PO:
+	case PCI_CHIP_RAGE128PQ:
+	case PCI_CHIP_RAGE128PS:
+	case PCI_CHIP_RAGE128PT:
+	case PCI_CHIP_RAGE128PU:
+	case PCI_CHIP_RAGE128PV:
+	case PCI_CHIP_RAGE128PW:
+	case PCI_CHIP_RAGE128PX:
+
 	case PCI_CHIP_RAGE128PD:
 	case PCI_CHIP_RAGE128PF:
 	case PCI_CHIP_RAGE128PP:
@@ -948,6 +985,18 @@ static Bool R128PreInitConfig(ScrnInfoPtr pScrn)
 	case PCI_CHIP_RAGE128RK:
 	case PCI_CHIP_RAGE128RL:
 	case PCI_CHIP_RAGE128SM:
+	/* FIXME: RAGE128 S[EFGHKLN] are assumed to be like the SM above as
+	 *        all of them are listed as "Rage 128 4x" in ATI docs.
+	 *        This requires confirmation however to be fully correct.
+	 *        Mike A. Harris <mharris@redhat.com>
+	 */
+	case PCI_CHIP_RAGE128SE:
+	case PCI_CHIP_RAGE128SF:
+	case PCI_CHIP_RAGE128SG:
+	case PCI_CHIP_RAGE128SH:
+	case PCI_CHIP_RAGE128SK:
+	case PCI_CHIP_RAGE128SL:
+	case PCI_CHIP_RAGE128SN:
 	default:                 info->HasPanelRegs = FALSE; break;
 	}
     }
@@ -1088,20 +1137,53 @@ static Bool R128PreInitConfig(ScrnInfoPtr pScrn)
 	case PCI_CHIP_RAGE128LE:
 	case PCI_CHIP_RAGE128RE:
 	case PCI_CHIP_RAGE128RK:
-	case PCI_CHIP_RAGE128PP:
+	case PCI_CHIP_RAGE128PD:
 	case PCI_CHIP_RAGE128PR:
-	case PCI_CHIP_RAGE128PD: info->IsPCI = TRUE;  break;
+	case PCI_CHIP_RAGE128PP: info->IsPCI = TRUE;  break;
 	case PCI_CHIP_RAGE128LF:
 	case PCI_CHIP_RAGE128MF:
 	case PCI_CHIP_RAGE128ML:
+	case PCI_CHIP_RAGE128PF:
 	case PCI_CHIP_RAGE128RF:
 	case PCI_CHIP_RAGE128RG:
 	case PCI_CHIP_RAGE128RL:
 	case PCI_CHIP_RAGE128SM:
-	case PCI_CHIP_RAGE128PF:
 	case PCI_CHIP_RAGE128TF:
 	case PCI_CHIP_RAGE128TL:
 	case PCI_CHIP_RAGE128TR:
+	/* FIXME: Rage 128 S[EFGHKLN], T[STU], P[ABCEGHIJKLMNOQSTUVWX] are
+	 * believed to be AGP, but need confirmation. <mharris@redhat.com>
+	 */
+	case PCI_CHIP_RAGE128PA:
+	case PCI_CHIP_RAGE128PB:
+	case PCI_CHIP_RAGE128PC:
+	case PCI_CHIP_RAGE128PE:
+	case PCI_CHIP_RAGE128PG:
+	case PCI_CHIP_RAGE128PH:
+	case PCI_CHIP_RAGE128PI:
+	case PCI_CHIP_RAGE128PJ:
+	case PCI_CHIP_RAGE128PK:
+	case PCI_CHIP_RAGE128PL:
+	case PCI_CHIP_RAGE128PM:
+	case PCI_CHIP_RAGE128PN:
+	case PCI_CHIP_RAGE128PO:
+	case PCI_CHIP_RAGE128PQ:
+	case PCI_CHIP_RAGE128PS:
+	case PCI_CHIP_RAGE128PT:
+	case PCI_CHIP_RAGE128PU:
+	case PCI_CHIP_RAGE128PV:
+	case PCI_CHIP_RAGE128PW:
+	case PCI_CHIP_RAGE128PX:
+	case PCI_CHIP_RAGE128TS:
+	case PCI_CHIP_RAGE128TT:
+	case PCI_CHIP_RAGE128TU:
+	case PCI_CHIP_RAGE128SE:
+	case PCI_CHIP_RAGE128SF:
+	case PCI_CHIP_RAGE128SG:
+	case PCI_CHIP_RAGE128SH:
+	case PCI_CHIP_RAGE128SK:
+	case PCI_CHIP_RAGE128SL:
+	case PCI_CHIP_RAGE128SN:
 	default:                 info->IsPCI = FALSE; break;
 	}
     }
@@ -2352,12 +2434,6 @@ Bool R128ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
 	    }
 	}
     }
-				/* Backing store setup */
-    miInitializeBackingStore(pScreen);
-    xf86SetBackingStore(pScreen);
-
-				/* Set Silken Mouse */
-    xf86SetSilkenMouse(pScreen);
 
 				/* Acceleration setup */
     if (!xf86ReturnOptValBool(info->Options, OPTION_NOACCEL, FALSE)) {
@@ -2378,6 +2454,13 @@ Bool R128ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
 				/* DGA setup */
     R128DGAInit(pScreen);
 
+				/* Backing store setup */
+    miInitializeBackingStore(pScreen);
+    xf86SetBackingStore(pScreen);
+
+				/* Set Silken Mouse */
+    xf86SetSilkenMouse(pScreen);
+
 				/* Cursor setup */
     miDCInitialize(pScreen, xf86GetPointerScreenFuncs());
 
@@ -2401,6 +2484,7 @@ Bool R128ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
 	    xf86DrvMsg(scrnIndex, X_INFO, "Using software cursor\n");
 	}
     } else {
+	info->cursor_start = 0;
 	xf86DrvMsg(scrnIndex, X_INFO, "Using software cursor\n");
     }
 
@@ -3442,6 +3526,11 @@ Bool R128EnterVT(int scrnIndex, int flags)
 
 #ifdef XF86DRI
     if (info->directRenderingEnabled) {
+	if (info->irq) {
+	    /* Need to make sure interrupts are enabled */
+	    unsigned char *R128MMIO = info->MMIO;
+	    OUTREG(R128_GEN_INT_CNTL, info->gen_int_cntl);
+	}
 	R128CCE_START(pScrn, info);
 	DRIUnlock(pScrn->pScreen);
     }
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_misc.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_misc.c
index 4d70d2023..8841f34ba 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_misc.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_misc.c
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_misc.c,v 1.4 2002/04/06 19:06:06 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_misc.c,v 1.5 2003/01/01 19:16:35 tsi Exp $ */
 /*
- * Copyright 2000 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 2000 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_probe.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_probe.c
index 34d781b34..a5cd42fea 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_probe.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_probe.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_probe.c,v 1.16 2001/11/05 23:37:50 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_probe.c,v 1.18 2003/02/09 15:33:17 tsi Exp $ */
 /*
  * Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario,
  *                      Precision Insight, Inc., Cedar Park, Texas, and
@@ -75,44 +75,108 @@ static xf86ValidModeProc   * const volatile ValidModeProc   = R128ValidMode;
 #endif
 
 SymTabRec R128Chipsets[] = {
-    { PCI_CHIP_RAGE128RE, "ATI Rage 128 RE (PCI)" },
-    { PCI_CHIP_RAGE128RF, "ATI Rage 128 RF (AGP)" },
+    /* FIXME: The chipsets with (PCI/AGP) are not known wether they are AGP or
+     *        PCI, so I've labeled them as such in hopes users will submit
+     *        data if we're unable to gather it from official documentation
+     */
+    { PCI_CHIP_RAGE128LE, "ATI Rage 128 Mobility M3 LE (PCI)" },
+    { PCI_CHIP_RAGE128LF, "ATI Rage 128 Mobility M3 LF (AGP)" },
+    { PCI_CHIP_RAGE128MF, "ATI Rage 128 Mobility M4 MF (AGP)" },
+    { PCI_CHIP_RAGE128ML, "ATI Rage 128 Mobility M4 ML (AGP)" },
+    { PCI_CHIP_RAGE128PA, "ATI Rage 128 Pro GL PA (PCI/AGP)" },
+    { PCI_CHIP_RAGE128PB, "ATI Rage 128 Pro GL PB (PCI/AGP)" },
+    { PCI_CHIP_RAGE128PC, "ATI Rage 128 Pro GL PC (PCI/AGP)" },
+    { PCI_CHIP_RAGE128PD, "ATI Rage 128 Pro GL PD (PCI)" },
+    { PCI_CHIP_RAGE128PE, "ATI Rage 128 Pro GL PE (PCI/AGP)" },
+    { PCI_CHIP_RAGE128PF, "ATI Rage 128 Pro GL PF (AGP)" },
+    { PCI_CHIP_RAGE128PG, "ATI Rage 128 Pro VR PG (PCI/AGP)" },
+    { PCI_CHIP_RAGE128PH, "ATI Rage 128 Pro VR PH (PCI/AGP)" },
+    { PCI_CHIP_RAGE128PI, "ATI Rage 128 Pro VR PI (PCI/AGP)" },
+    { PCI_CHIP_RAGE128PJ, "ATI Rage 128 Pro VR PJ (PCI/AGP)" },
+    { PCI_CHIP_RAGE128PK, "ATI Rage 128 Pro VR PK (PCI/AGP)" },
+    { PCI_CHIP_RAGE128PL, "ATI Rage 128 Pro VR PL (PCI/AGP)" },
+    { PCI_CHIP_RAGE128PM, "ATI Rage 128 Pro VR PM (PCI/AGP)" },
+    { PCI_CHIP_RAGE128PN, "ATI Rage 128 Pro VR PN (PCI/AGP)" },
+    { PCI_CHIP_RAGE128PO, "ATI Rage 128 Pro VR PO (PCI/AGP)" },
+    { PCI_CHIP_RAGE128PP, "ATI Rage 128 Pro VR PP (PCI)" },
+    { PCI_CHIP_RAGE128PQ, "ATI Rage 128 Pro VR PQ (PCI/AGP)" },
+    { PCI_CHIP_RAGE128PR, "ATI Rage 128 Pro VR PR (PCI)" },
+    { PCI_CHIP_RAGE128PS, "ATI Rage 128 Pro VR PS (PCI/AGP)" },
+    { PCI_CHIP_RAGE128PT, "ATI Rage 128 Pro VR PT (PCI/AGP)" },
+    { PCI_CHIP_RAGE128PU, "ATI Rage 128 Pro VR PU (PCI/AGP)" },
+    { PCI_CHIP_RAGE128PV, "ATI Rage 128 Pro VR PV (PCI/AGP)" },
+    { PCI_CHIP_RAGE128PW, "ATI Rage 128 Pro VR PW (PCI/AGP)" },
+    { PCI_CHIP_RAGE128PX, "ATI Rage 128 Pro VR PX (PCI/AGP)" },
+    { PCI_CHIP_RAGE128RE, "ATI Rage 128 GL RE (PCI)" },
+    { PCI_CHIP_RAGE128RF, "ATI Rage 128 GL RF (AGP)" },
     { PCI_CHIP_RAGE128RG, "ATI Rage 128 RG (AGP)" },
-    { PCI_CHIP_RAGE128RK, "ATI Rage 128 RK (PCI)" },
-    { PCI_CHIP_RAGE128RL, "ATI Rage 128 RL (AGP)" },
-    { PCI_CHIP_RAGE128SM, "ATI Rage 128 SM (AGP)" },
-    { PCI_CHIP_RAGE128PD, "ATI Rage 128 Pro PD (PCI)" },
-    { PCI_CHIP_RAGE128PF, "ATI Rage 128 Pro PF (AGP)" },
-    { PCI_CHIP_RAGE128PP, "ATI Rage 128 Pro PP (PCI)" },
-    { PCI_CHIP_RAGE128PR, "ATI Rage 128 Pro PR (PCI)" },
+    { PCI_CHIP_RAGE128RK, "ATI Rage 128 VR RK (PCI)" },
+    { PCI_CHIP_RAGE128RL, "ATI Rage 128 VR RL (AGP)" },
+    { PCI_CHIP_RAGE128SE, "ATI Rage 128 4X SE (PCI/AGP)" },
+    { PCI_CHIP_RAGE128SF, "ATI Rage 128 4X SF (PCI/AGP)" },
+    { PCI_CHIP_RAGE128SG, "ATI Rage 128 4X SG (PCI/AGP)" },
+    { PCI_CHIP_RAGE128SH, "ATI Rage 128 4X SH (PCI/AGP)" },
+    { PCI_CHIP_RAGE128SK, "ATI Rage 128 4X SK (PCI/AGP)" },
+    { PCI_CHIP_RAGE128SL, "ATI Rage 128 4X SL (PCI/AGP)" },
+    { PCI_CHIP_RAGE128SM, "ATI Rage 128 4X SM (AGP)" },
+    { PCI_CHIP_RAGE128SN, "ATI Rage 128 4X SN (PCI/AGP)" },
     { PCI_CHIP_RAGE128TF, "ATI Rage 128 Pro ULTRA TF (AGP)" },
     { PCI_CHIP_RAGE128TL, "ATI Rage 128 Pro ULTRA TL (AGP)" },
     { PCI_CHIP_RAGE128TR, "ATI Rage 128 Pro ULTRA TR (AGP)" },
-    { PCI_CHIP_RAGE128LE, "ATI Rage 128 Mobility LE (PCI)" },
-    { PCI_CHIP_RAGE128LF, "ATI Rage 128 Mobility LF (AGP)" },
-    { PCI_CHIP_RAGE128MF, "ATI Rage 128 Mobility MF (AGP)" },
-    { PCI_CHIP_RAGE128ML, "ATI Rage 128 Mobility ML (AGP)" },
+    { PCI_CHIP_RAGE128TS, "ATI Rage 128 Pro ULTRA TS (AGP?)" },
+    { PCI_CHIP_RAGE128TT, "ATI Rage 128 Pro ULTRA TT (AGP?)" },
+    { PCI_CHIP_RAGE128TU, "ATI Rage 128 Pro ULTRA TU (AGP?)" },
     { -1,                 NULL }
 };
 
 PciChipsets R128PciChipsets[] = {
+    { PCI_CHIP_RAGE128LE, PCI_CHIP_RAGE128LE, RES_SHARED_VGA },
+    { PCI_CHIP_RAGE128LF, PCI_CHIP_RAGE128LF, RES_SHARED_VGA },
+    { PCI_CHIP_RAGE128MF, PCI_CHIP_RAGE128MF, RES_SHARED_VGA },
+    { PCI_CHIP_RAGE128ML, PCI_CHIP_RAGE128ML, RES_SHARED_VGA },
+    { PCI_CHIP_RAGE128PA, PCI_CHIP_RAGE128PA, RES_SHARED_VGA },
+    { PCI_CHIP_RAGE128PB, PCI_CHIP_RAGE128PB, RES_SHARED_VGA },
+    { PCI_CHIP_RAGE128PC, PCI_CHIP_RAGE128PC, RES_SHARED_VGA },
+    { PCI_CHIP_RAGE128PD, PCI_CHIP_RAGE128PD, RES_SHARED_VGA },
+    { PCI_CHIP_RAGE128PE, PCI_CHIP_RAGE128PE, RES_SHARED_VGA },
+    { PCI_CHIP_RAGE128PF, PCI_CHIP_RAGE128PF, RES_SHARED_VGA },
+    { PCI_CHIP_RAGE128PG, PCI_CHIP_RAGE128PG, RES_SHARED_VGA },
+    { PCI_CHIP_RAGE128PH, PCI_CHIP_RAGE128PH, RES_SHARED_VGA },
+    { PCI_CHIP_RAGE128PI, PCI_CHIP_RAGE128PI, RES_SHARED_VGA },
+    { PCI_CHIP_RAGE128PJ, PCI_CHIP_RAGE128PJ, RES_SHARED_VGA },
+    { PCI_CHIP_RAGE128PK, PCI_CHIP_RAGE128PK, RES_SHARED_VGA },
+    { PCI_CHIP_RAGE128PL, PCI_CHIP_RAGE128PL, RES_SHARED_VGA },
+    { PCI_CHIP_RAGE128PM, PCI_CHIP_RAGE128PM, RES_SHARED_VGA },
+    { PCI_CHIP_RAGE128PN, PCI_CHIP_RAGE128PN, RES_SHARED_VGA },
+    { PCI_CHIP_RAGE128PO, PCI_CHIP_RAGE128PO, RES_SHARED_VGA },
+    { PCI_CHIP_RAGE128PP, PCI_CHIP_RAGE128PP, RES_SHARED_VGA },
+    { PCI_CHIP_RAGE128PQ, PCI_CHIP_RAGE128PQ, RES_SHARED_VGA },
+    { PCI_CHIP_RAGE128PR, PCI_CHIP_RAGE128PR, RES_SHARED_VGA },
+    { PCI_CHIP_RAGE128PS, PCI_CHIP_RAGE128PS, RES_SHARED_VGA },
+    { PCI_CHIP_RAGE128PT, PCI_CHIP_RAGE128PT, RES_SHARED_VGA },
+    { PCI_CHIP_RAGE128PU, PCI_CHIP_RAGE128PU, RES_SHARED_VGA },
+    { PCI_CHIP_RAGE128PV, PCI_CHIP_RAGE128PV, RES_SHARED_VGA },
+    { PCI_CHIP_RAGE128PW, PCI_CHIP_RAGE128PW, RES_SHARED_VGA },
+    { PCI_CHIP_RAGE128PX, PCI_CHIP_RAGE128PX, RES_SHARED_VGA },
     { PCI_CHIP_RAGE128RE, PCI_CHIP_RAGE128RE, RES_SHARED_VGA },
     { PCI_CHIP_RAGE128RF, PCI_CHIP_RAGE128RF, RES_SHARED_VGA },
     { PCI_CHIP_RAGE128RG, PCI_CHIP_RAGE128RG, RES_SHARED_VGA },
     { PCI_CHIP_RAGE128RK, PCI_CHIP_RAGE128RK, RES_SHARED_VGA },
     { PCI_CHIP_RAGE128RL, PCI_CHIP_RAGE128RL, RES_SHARED_VGA },
+    { PCI_CHIP_RAGE128SE, PCI_CHIP_RAGE128SE, RES_SHARED_VGA },
+    { PCI_CHIP_RAGE128SF, PCI_CHIP_RAGE128SF, RES_SHARED_VGA },
+    { PCI_CHIP_RAGE128SG, PCI_CHIP_RAGE128SG, RES_SHARED_VGA },
+    { PCI_CHIP_RAGE128SH, PCI_CHIP_RAGE128SH, RES_SHARED_VGA },
+    { PCI_CHIP_RAGE128SK, PCI_CHIP_RAGE128SK, RES_SHARED_VGA },
+    { PCI_CHIP_RAGE128SL, PCI_CHIP_RAGE128SL, RES_SHARED_VGA },
     { PCI_CHIP_RAGE128SM, PCI_CHIP_RAGE128SM, RES_SHARED_VGA },
-    { PCI_CHIP_RAGE128PD, PCI_CHIP_RAGE128PD, RES_SHARED_VGA },
-    { PCI_CHIP_RAGE128PF, PCI_CHIP_RAGE128PF, RES_SHARED_VGA },
-    { PCI_CHIP_RAGE128PP, PCI_CHIP_RAGE128PP, RES_SHARED_VGA },
-    { PCI_CHIP_RAGE128PR, PCI_CHIP_RAGE128PR, RES_SHARED_VGA },
+    { PCI_CHIP_RAGE128SN, PCI_CHIP_RAGE128SN, RES_SHARED_VGA },
     { PCI_CHIP_RAGE128TF, PCI_CHIP_RAGE128TF, RES_SHARED_VGA },
     { PCI_CHIP_RAGE128TL, PCI_CHIP_RAGE128TL, RES_SHARED_VGA },
     { PCI_CHIP_RAGE128TR, PCI_CHIP_RAGE128TR, RES_SHARED_VGA },
-    { PCI_CHIP_RAGE128LE, PCI_CHIP_RAGE128LE, RES_SHARED_VGA },
-    { PCI_CHIP_RAGE128LF, PCI_CHIP_RAGE128LF, RES_SHARED_VGA },
-    { PCI_CHIP_RAGE128MF, PCI_CHIP_RAGE128MF, RES_SHARED_VGA },
-    { PCI_CHIP_RAGE128ML, PCI_CHIP_RAGE128ML, RES_SHARED_VGA },
+    { PCI_CHIP_RAGE128TS, PCI_CHIP_RAGE128TS, RES_SHARED_VGA },
+    { PCI_CHIP_RAGE128TT, PCI_CHIP_RAGE128TT, RES_SHARED_VGA },
+    { PCI_CHIP_RAGE128TU, PCI_CHIP_RAGE128TU, RES_SHARED_VGA },
     { -1,                 -1,                 RES_UNDEFINED }
 };
 
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_reg.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_reg.h
index ac461d0d0..3968bd579 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_reg.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_reg.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_reg.h,v 1.14 2002/04/29 04:15:54 anderson Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_reg.h,v 1.15 2002/12/16 16:19:11 dawes Exp $ */
 /*
  * Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario,
  *                      Precision Insight, Inc., Cedar Park, Texas, and
@@ -48,7 +48,9 @@
 #ifndef _R128_REG_H_
 #define _R128_REG_H_
 
+#ifdef XFree86Module
 #include "xf86_ansic.h"
+#endif
 #include "compiler.h"
 
 				/* Memory mapped register access macros */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_version.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_version.h
index 420ea718e..589d8d40b 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_version.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_version.h
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_version.h,v 1.4 2002/04/06 19:06:06 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_version.h,v 1.6 2003/01/01 19:16:35 tsi Exp $ */
 /*
- * Copyright 2000 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 2000 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
@@ -24,6 +24,16 @@
 #ifndef _R128_VERSION_H_
 #define _R128_VERSION_H_ 1
 
+#undef  R128_NAME
+#undef  R128_DRIVER_NAME
+#undef  R128_VERSION_MAJOR
+#undef  R128_VERSION_MINOR
+#undef  R128_VERSION_PATCH
+#undef  R128_VERSION_CURRENT
+#undef  R128_VERSION_EVALUATE
+#undef  R128_VERSION_STRINGIFY
+#undef  R128_VERSION_NAME
+
 #define R128_NAME          "R128"
 #define R128_DRIVER_NAME   "r128"
 
@@ -31,7 +41,9 @@
 #define R128_VERSION_MINOR 0
 #define R128_VERSION_PATCH 1
 
+#ifndef R128_VERSION_EXTRA
 #define R128_VERSION_EXTRA ""
+#endif
 
 #define R128_VERSION_CURRENT \
     ((R128_VERSION_MAJOR << 20) | \
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_video.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_video.c
index 28583c2a0..119971fdd 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_video.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_video.c
@@ -1,10 +1,10 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_video.c,v 1.21 2002/06/04 23:04:51 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_video.c,v 1.26 2003/02/19 01:19:41 dawes Exp $ */
 
 #include "r128.h"
 #include "r128_reg.h"
 
 #ifdef XF86DRI
-#include "xf86drmR128.h"
+#include "r128_common.h"
 #include "r128_sarea.h"
 #endif
 
@@ -377,6 +377,8 @@ R128StopVideo(ScrnInfoPtr pScrn, pointer data, Bool cleanup)
   if(cleanup) {
      if(pPriv->videoStatus & CLIENT_VIDEO_ON) {
 	OUTREG(R128_OV0_SCALE_CNTL, 0);
+	if (info->cursor_start)
+	   xf86ForceHWCursor (pScrn->pScreen, FALSE);
      }
      if(pPriv->linear) {
 	xf86FreeOffscreenLinear(pPriv->linear);
@@ -509,6 +511,7 @@ R128DMA(
     int err=-1, i, idx, offset, hpass, passes, srcpassbytes, dstpassbytes;
     int sizes[MAXPASSES], list[MAXPASSES];
     drmDMAReq req;
+    drmR128Blit blit;
 
     /* Verify conditions and bail out as early as possible */
     if (!info->directRenderingEnabled || !info->DMAForXv)
@@ -567,8 +570,17 @@ R128DMA(
 	    }
 	}
 
-	if ((err = drmR128TextureBlit(info->drmFD, idx, offset, dstPitch,
-		  (R128_DATATYPE_CI8 >> 16), (offset % 32), 0, w, hpass)) < 0)
+        blit.idx = idx;
+        blit.offset = offset;
+        blit.pitch = dstPitch;
+        blit.format = (R128_DATATYPE_CI8 >> 16);
+        blit.x = (offset % 32);
+        blit.y = 0;
+        blit.width = w;
+        blit.height = hpass;
+
+	if ((err = drmCommandWrite(info->drmFD, DRM_R128_BLIT,
+                                   &blit, sizeof(drmR128Blit))) < 0)
 	    break;
     }
 
@@ -875,6 +887,14 @@ R128PutImage(
    int top, left, npixels, nlines, bpp;
    BoxRec dstBox;
    CARD32 tmp;
+#if X_BYTE_ORDER == X_BIG_ENDIAN
+   unsigned char *R128MMIO = info->MMIO;
+   CARD32 config_cntl = INREG(R128_CONFIG_CNTL);
+
+   /* We need to disable byte swapping, or the data gets mangled */
+   OUTREG(R128_CONFIG_CNTL, config_cntl &
+	  ~(APER_0_BIG_ENDIAN_16BPP_SWAP | APER_0_BIG_ENDIAN_32BPP_SWAP));
+#endif
 
    /*
     * s1offset, s2offset, s3offset - byte offsets to the Y, U and V planes
@@ -983,24 +1003,9 @@ R128PutImage(
 	}
 
 	nlines = ((((yb + 0xffff) >> 16) + 1) & ~1) - top;
-	{
-#if X_BYTE_ORDER == X_BIG_ENDIAN
-	   unsigned char *R128MMIO = info->MMIO;
-	   CARD32 config_cntl;
-
-	   /* We need to disable byte swapping, or the data gets mangled */
-	   config_cntl = INREG(R128_CONFIG_CNTL);
-	   OUTREG(R128_CONFIG_CNTL, config_cntl &
-		 ~(APER_0_BIG_ENDIAN_16BPP_SWAP|APER_0_BIG_ENDIAN_32BPP_SWAP));
-#endif
-	   R128CopyData420(info, buf + s1offset, buf + s2offset, buf + s3offset,
-			  info->FB+d1offset, info->FB+d2offset, info->FB+d3offset,
-			  srcPitch, srcPitch2, dstPitch, nlines, npixels);
-#if X_BYTE_ORDER == X_BIG_ENDIAN
-	   /* restore byte swapping */
-	   OUTREG(R128_CONFIG_CNTL, config_cntl);
-#endif
-	}
+	R128CopyData420(info, buf + s1offset, buf + s2offset, buf + s3offset,
+			info->FB+d1offset, info->FB+d2offset, info->FB+d3offset,
+			srcPitch, srcPitch2, dstPitch, nlines, npixels);
 	break;
     case FOURCC_UYVY:
     case FOURCC_YUY2:
@@ -1019,6 +1024,10 @@ R128PutImage(
 	break;
     }
 
+#if X_BYTE_ORDER == X_BIG_ENDIAN
+    /* restore byte swapping */
+    OUTREG(R128_CONFIG_CNTL, config_cntl);
+#endif
 
     /* update cliplist */
     if(!RegionsEqual(&pPriv->clip, clipBoxes)) {
@@ -1046,6 +1055,8 @@ R128PutImage(
 	break;
     }
 
+    if (info->cursor_start && !(pPriv->videoStatus & CLIENT_VIDEO_ON))
+	xf86ForceHWCursor (pScrn->pScreen, TRUE);
     pPriv->videoStatus = CLIENT_VIDEO_ON;
 
     info->VideoTimerCallback = R128VideoTimerCallback;
@@ -1107,6 +1118,8 @@ R128VideoTimerCallback(ScrnInfoPtr pScrn, Time now)
 	    if(pPriv->offTime < now) {
 		unsigned char *R128MMIO = info->MMIO;
 		OUTREG(R128_OV0_SCALE_CNTL, 0);
+		if (info->cursor_start && pPriv->videoStatus & CLIENT_VIDEO_ON)
+		    xf86ForceHWCursor (pScrn->pScreen, FALSE);
 		pPriv->videoStatus = FREE_TIMER;
 		pPriv->freeTime = now + FREE_DELAY;
 	    }
@@ -1116,6 +1129,8 @@ R128VideoTimerCallback(ScrnInfoPtr pScrn, Time now)
 		   xf86FreeOffscreenLinear(pPriv->linear);
 		   pPriv->linear = NULL;
 		}
+		if (info->cursor_start && pPriv->videoStatus & CLIENT_VIDEO_ON)
+		    xf86ForceHWCursor (pScrn->pScreen, FALSE);
 		pPriv->videoStatus = 0;
 		info->VideoTimerCallback = NULL;
 	    }
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon.h
index 54aed36f2..81e0db7b7 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon.h,v 1.29 2002/10/12 01:38:07 martin Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon.h,v 1.37 2003/02/23 23:28:48 dawes Exp $ */
 /*
  * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and
  *                VA Linux Systems Inc., Fremont, California.
@@ -31,7 +31,7 @@
  * Authors:
  *   Kevin E. Martin <martin@xfree86.org>
  *   Rickard E. Faith <faith@valinux.com>
- *   Alan Hourihane <ahourihane@valinux.com>
+ *   Alan Hourihane <alanh@fairlite.demon.co.uk>
  *
  */
 
@@ -66,9 +66,10 @@
 #include "picturestr.h"
 #endif
 
-#define RADEON_DEBUG    0       /* Turn off debugging output                 */
-#define RADEON_TIMEOUT  2000000 /* Fall out of wait loops after this count   */
-#define RADEON_MMIOSIZE 0x80000
+#define RADEON_DEBUG            0 /* Turn off debugging output               */
+#define RADEON_IDLE_RETRY      16 /* Fall out of idle loops after this count */
+#define RADEON_TIMEOUT    2000000 /* Fall out of wait loops after this count */
+#define RADEON_MMIOSIZE   0x80000
 
 #define RADEON_VBIOS_SIZE 0x00010000
 #define RADEON_USE_RMX 0x80000000 /* mode flag for using RMX 
@@ -193,10 +194,6 @@ typedef struct {
     CARD32            p2pll_div_0;
     CARD32            htotal_cntl2;
 
-				/* DDA register */
-    CARD32            dda_config;
-    CARD32            dda_on_off;
-
 				/* Pallet */
     Bool              palette_valid;
     CARD32            palette[256];
@@ -305,6 +302,7 @@ typedef struct {
     Bool              ddc_mode;         /* Validate mode by matching exactly  
 					 * the modes supported in DDC data
 					 */
+    Bool              R300CGWorkaround;
 
 				/* EDID or BIOS values for FPs */
     int               PanelXRes;
@@ -341,6 +339,11 @@ typedef struct {
     xf86CursorInfoPtr cursor;
     unsigned long     cursor_start;
     unsigned long     cursor_end;
+#ifdef ARGB_CURSOR
+    Bool	      cursor_argb;
+#endif
+    int               cursor_fg;
+    int               cursor_bg;
 
     /*
      * XAAForceTransBlit is used to change the behavior of the XAA
@@ -394,6 +397,7 @@ typedef struct {
 
     RADEONFBLayout    CurrentLayout;
 #ifdef XF86DRI
+    Bool              noBackBuffer;
     Bool              directRenderingEnabled;
     DRIInfoPtr        pDRIInfo;
     int               drmFD;
@@ -412,15 +416,20 @@ typedef struct {
     unsigned char     *PCI;             /* Map */
 
     Bool              depthMoves;       /* Enable depth moves -- slow! */
+    Bool              allowPageFlip;    /* Enable 3d page flipping */
+    Bool              have3DWindows;    /* Are there any 3d clients? */
+    int               drmMinor;
 
     drmSize           agpSize;
     drmHandle         agpMemHandle;     /* Handle from drmAgpAlloc */
     unsigned long     agpOffset;
     unsigned char     *AGP;             /* Map */
     int               agpMode;
+    int               agpFastWrite;
 
     CARD32            pciCommand;
 
+    Bool              CPRuns;           /* CP is running */
     Bool              CPInUse;          /* CP has been used by X server */
     Bool              CPStarted;        /* CP has started */
     int               CPMode;           /* CP mode that server/clients use */
@@ -485,6 +494,12 @@ typedef struct {
 
     CARD32            dst_pitch_offset;
 
+				/* offscreen memory management */
+    int               backLines;
+    FBAreaPtr         backArea;
+    int               depthTexLines;
+    FBAreaPtr         depthTexArea;
+
 				/* Saved scissor values */
     CARD32            sc_left;
     CARD32            sc_right;
@@ -496,16 +511,25 @@ typedef struct {
 
     CARD32            aux_sc_cntl;
 
+    int               irq;
+
 #ifdef PER_CONTEXT_SAREA
-    int 	      perctx_sarea_size;
+    int               perctx_sarea_size;
 #endif
 #endif
 
+				/* XVideo */
     XF86VideoAdaptorPtr adaptor;
     void              (*VideoTimerCallback)(ScrnInfoPtr, Time);
+    FBLinearPtr       videoLinear;
     int               videoKey;
+
+				/* general */
     Bool              showCache;
     OptionInfoPtr     Options;
+#ifdef XFree86LOADER
+    XF86ModReqInfo    xaaReq;
+#endif
 } RADEONInfoRec, *RADEONInfoPtr;
 
 #define RADEONWaitForFifo(pScrn, entries)				\
@@ -521,12 +545,16 @@ extern void        RADEONWaitForIdleMMIO(ScrnInfoPtr pScrn);
 extern void        RADEONWaitForIdleCP(ScrnInfoPtr pScrn);
 #endif
 
+extern void        RADEONDoAdjustFrame(ScrnInfoPtr pScrn, int x, int y,
+				       int clone);
+
 extern void        RADEONEngineReset(ScrnInfoPtr pScrn);
 extern void        RADEONEngineFlush(ScrnInfoPtr pScrn);
 extern void        RADEONEngineRestore(ScrnInfoPtr pScrn);
 
 extern unsigned    RADEONINPLL(ScrnInfoPtr pScrn, int addr);
 extern void        RADEONWaitForVerticalSync(ScrnInfoPtr pScrn);
+extern void        RADEONWaitForVerticalSync2(ScrnInfoPtr pScrn);
 
 extern void        RADEONSelectBuffer(ScrnInfoPtr pScrn, int buffer);
 
@@ -549,11 +577,12 @@ extern Bool        RADEONDRIFinishScreenInit(ScreenPtr pScreen);
 extern drmBufPtr   RADEONCPGetBuffer(ScrnInfoPtr pScrn);
 extern void        RADEONCPFlushIndirect(ScrnInfoPtr pScrn, int discard);
 extern void        RADEONCPReleaseIndirect(ScrnInfoPtr pScrn);
+extern int         RADEONCPStop(ScrnInfoPtr pScrn,  RADEONInfoPtr info);
 
 
 #define RADEONCP_START(pScrn, info)					\
 do {									\
-    int _ret = drmRadeonStartCP(info->drmFD);				\
+    int _ret = drmCommandNone(info->drmFD, DRM_RADEON_CP_START);	\
     if (_ret) {								\
 	xf86DrvMsg(pScrn->scrnIndex, X_ERROR,				\
 		   "%s: CP start %d\n", __FUNCTION__, _ret);		\
@@ -563,19 +592,23 @@ do {									\
 
 #define RADEONCP_STOP(pScrn, info)					\
 do {									\
-    int _ret = drmRadeonStopCP(info->drmFD);				\
-    if (_ret) {								\
-	xf86DrvMsg(pScrn->scrnIndex, X_ERROR,				\
+    int _ret;								\
+     if (info->CPStarted) {						\
+        _ret = RADEONCPStop(pScrn, info);				\
+        if (_ret) {							\
+	    xf86DrvMsg(pScrn->scrnIndex, X_ERROR,			\
 		   "%s: CP stop %d\n", __FUNCTION__, _ret);		\
-    }									\
-    info->CPStarted = FALSE;                                            \
+        }								\
+        info->CPStarted = FALSE;                                        \
+   }									\
     RADEONEngineRestore(pScrn);						\
+    info->CPRuns = FALSE;						\
 } while (0)
 
 #define RADEONCP_RESET(pScrn, info)					\
 do {									\
     if (RADEONCP_USE_RING_BUFFER(info->CPMode)) {			\
-	int _ret = drmRadeonResetCP(info->drmFD);			\
+	int _ret = drmCommandNone(info->drmFD, DRM_RADEON_CP_RESET);	\
 	if (_ret) {							\
 	    xf86DrvMsg(pScrn->scrnIndex, X_ERROR,			\
 		       "%s: CP reset %d\n", __FUNCTION__, _ret);	\
@@ -609,7 +642,7 @@ do {									\
 
 #define RADEON_VERBOSE	0
 
-#define RING_LOCALS	CARD32 *__head; int __count;
+#define RING_LOCALS	CARD32 *__head = NULL; int __count = 0
 
 #define BEGIN_RING(n) do {						\
     if (RADEON_VERBOSE) {						\
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon.man b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon.man
new file mode 100644
index 000000000..d0c6547db
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon.man
@@ -0,0 +1,218 @@
+.\" $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon.man,v 1.0 2003/01/31 23:04:50
+.ds q \N'34'
+.TH RADEON __drivermansuffix__ __vendorversion__
+.SH NAME
+radeon \- ATI RADEON video driver
+.SH SYNOPSIS
+.nf 
+.B "Section \*qDevice\*q"
+.BI "  Identifier \*q"  devname \*q
+.B  "  Driver \*qradeon\*q"
+\ \ ...
+.B EndSection
+.fi 
+.SH DESCRIPTION
+.B radeon
+is a XFree86 driver for ATI RADEON based video cards.  It contains
+full support for 8, 15, 16 and 24 bit pixel depths, dual-head setup, 
+flat panel, hardware 2D acceleration, hardware 3D acceleration 
+(except R300 cards), hardware cursor, XV extension, Xinerama extension.
+.SH SUPPORTED HARDWARE
+The
+.B radeon
+driver supports PCI and AGP video cards based on the following ATI chips
+.TP 12
+.B R100
+Radeon 7200
+.TP 12
+.B RV100
+Radeon 7000(VE), M6
+.TP 12
+.B RV200
+Radeon 7500, M7
+.TP 12
+.B R200
+Radeon 8500, 9100, FireGL 8800/8700
+.TP 12
+.B RV250
+Radeon 9000, M9
+.TP 12
+.B R300
+Radeon 9700PRO/9700/9500PRO/9500, FireGL X1/Z1
+
+.SH CONFIGURATION DETAILS
+Please refer to XF86Config(__filemansuffix__) for general configuration
+details.  This section only covers configuration details specific to this
+driver.
+.PP 
+The driver auto\-detects all device information necessary to initialize
+the card.  However, if you have problems with auto\-detection, you can
+specify:
+.PP 
+.RS 4
+VideoRam \- in kilobytes
+.br 
+MemBase  \- physical address of the linear framebuffer
+.br 
+IOBase   \- physical address of the MMIO registers
+.br 
+ChipID   \- PCI DEVICE ID
+.RE
+.PP 
+In addition, the following driver
+.B Options
+are supported:
+.TP 
+.BI "Option \*qSWcursor\*q \*q" boolean \*q
+Selects software cursor.  The default is
+.B off.
+.TP 
+.BI "Option \*qNoAccel\*q \*q" boolean \*q
+Enables or disables all hardware acceleration.  
+.br
+The default is to
+.B enable
+hardware acceleration.
+.TP 
+.BI "Option \*qDac6Bit\*q \*q" boolean \*q
+Enables or disables the use of 6 bits per color component when in 8 bpp
+mode (emulates VGA mode).  By default, all 8 bits per color component
+are used.  
+.br
+The default is
+.B off.
+.TP 
+.BI "Option \*qVideoKey\*q \*q" integer \*q
+This overrides the default pixel value for the YUV video overlay key.
+.br
+The default value is
+.B undefined.
+.TP 
+.BI "Option \*qUseFBDev\*q \*q" boolean \*q
+Enable or disable use of an OS\-specific framebuffer device interface
+(which is not supported on all OSs).  See fbdevhw(__drivermansuffix__)
+for further information. 
+.br
+The default is
+.B off.
+.TP 
+.BI "Option \*qAGPMode\*q \*q" integer \*q
+Set AGP data transfer rate.
+(used only when DRI is enabled)
+.br
+1      \-\- x1 (default)
+.br
+2      \-\- x2
+.br
+4      \-\- x4
+.br
+others \-\- invalid
+.TP 
+.BI "Option \*qAGPFastWrite\*q \*q" boolean \*q
+Enable AGP fast write.
+.br
+(used only when DRI is enabled)
+.br
+The default is
+.B off.
+.TP 
+.BI "Option \*qForcePCIMode\*q \*q" boolean \*q
+Force to use PCI GART for DRI acceleration.
+.br
+(used only when DRI is enabled)
+.br
+The default is
+.B off.
+.TP 
+.BI "Option \*qDDCMode\*q \*q" boolean \*q
+Force to use the modes queried from the connected monitor.
+.br
+The default is
+.B off.
+.TP 
+.BI "Option \*qCloneDisplay\*q \*q" integer \*q
+.br 
+This option is only used for dual\-head cards with only single 
+screen section specified in the configuration file.
+
+0      \-\- disable
+.br 
+1      \-\- auto\-detect (default)
+.br 
+2      \-\- force on
+.br 
+3      \-\- auto\-detect + 2nd head overlay
+.br 
+4      \-\- force on + 2nd head overlay
+.br 
+others \-\- auto\-detect
+
+.B disable 
+means only one CRTC is used for both heads.
+.B auto\-detect 
+means the secondary head will be driven by CRTC2 
+if a monitor is detected there.
+.B force on
+means the secondary head will be driven by CRTC2
+even no monitor is detected there.
+.B 2nd-head overlay 
+means the only hardware overlay will be placed to the secondary head.
+
+Primary/Secondary head for dual\-head cards:
+.br 
+(when only one port is used, it will be treated as the primary regardless)
+.br 
+.B Primary head:
+.br 
+DVI port on DVI+VGA cards
+.br 
+LCD output on laptops
+.br 
+Internal TMDS prot on DVI+DVI cards
+.br 
+.B Secondary head:
+.br 
+VGA port on DVI+VGA cards
+.br 
+VGA port on laptops
+.br 
+External TMDS port on DVI+DVI cards
+ 
+.TP 
+.BI "Option \*qCloneMode\*q \*q" "string" \*q
+Set the first mode for the secondary head.
+It can be different from the modes used for the primary head. If you don't
+have this line while clone is on, the modes specified for the primary head
+will be used for the secondary head.
+.TP 
+.BI "Option \*qCloneHSync\*q \*q" "string" \*q
+Set the horizontal sync range for the secondary  monitor. 
+It is not required if a DDC\-capable monitor is connected.
+.br
+The default value is
+.B undefined.
+.TP 
+.BI "Option \*qCloneVRefresh\*q \*q" "string" \*q
+Set the vertical refresh range for the secondary monitor. 
+It is not required if a DDC\-capable monitor is connected.
+.br
+The default value is
+.B undefined.
+.TP 
+.BI "Option \*qPanelOff\*q \*q" boolean \*q
+Disable panel output. Only used when clone is enabled.
+.br
+The default value is
+.B off.
+.TP 
+.BI "Option \*qEnablePageFlip\*q \*q" boolean \*q
+Enable page flipping for 3D acceleration. This will increase performance
+but not work correctly in some rare cases, hence the default is
+.B off.
+
+
+.SH SEE ALSO
+XFree86(1), XF86Config(__filemansuffix__), xf86config(1), Xserver(1), X(__miscmansuffix__)
+.SH AUTHORS
+.nf 
+Authors include: ...
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_accel.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_accel.c
index 9d852f0e3..1d9fbcf3f 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_accel.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_accel.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_accel.c,v 1.29 2002/10/12 01:38:07 martin Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_accel.c,v 1.32 2003/01/17 19:54:03 martin Exp $ */
 /*
  * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and
  *                VA Linux Systems Inc., Fremont, California.
@@ -31,7 +31,7 @@
  * Authors:
  *   Kevin E. Martin <martin@xfree86.org>
  *   Rickard E. Faith <faith@valinux.com>
- *   Alan Hourihane <ahourihane@valinux.com>
+ *   Alan Hourihane <alanh@fairlite.demon.co.uk>
  *
  * Credits:
  *
@@ -72,6 +72,7 @@
 
 				/* Driver data structures */
 #include "radeon.h"
+#include "radeon_macros.h"
 #include "radeon_probe.h"
 #include "radeon_reg.h"
 #include "radeon_version.h"
@@ -171,8 +172,7 @@ void RADEONEngineReset(ScrnInfoPtr pScrn)
     RADEONEngineFlush(pScrn);
 
     clock_cntl_index = INREG(RADEON_CLOCK_CNTL_INDEX);
-    if (info->ChipFamily == CHIP_FAMILY_R300)
-	R300CGWorkaround(pScrn);
+    if (info->R300CGWorkaround) R300CGWorkaround(pScrn);
 
     /* Some ASICs have bugs with dynamic-on feature, which are
      * ASIC-version dependent, so we force all blocks on for now
@@ -248,8 +248,7 @@ void RADEONEngineReset(ScrnInfoPtr pScrn)
 
     OUTREG(RADEON_CLOCK_CNTL_INDEX, clock_cntl_index);
     OUTPLL(RADEON_MCLK_CNTL, mclk_cntl);
-    if (info->ChipFamily == CHIP_FAMILY_R300)
-	R300CGWorkaround(pScrn);
+    if (info->R300CGWorkaround) R300CGWorkaround(pScrn);
 }
 
 /* Restore the acceleration hardware to its previous state */
@@ -405,6 +404,48 @@ void RADEONEngineInit(ScrnInfoPtr pScrn)
 #undef OUT_ACCEL_REG
 #undef FINISH_ACCEL
 
+/* Stop the CP */
+int RADEONCPStop(ScrnInfoPtr pScrn, RADEONInfoPtr info)
+{
+    drmRadeonCPStop  stop;
+    int              ret, i;
+
+    stop.flush = 1;
+    stop.idle  = 1;
+
+    ret = drmCommandWrite(info->drmFD, DRM_RADEON_CP_STOP, &stop, 
+			  sizeof(drmRadeonCPStop));
+
+    if (ret == 0) {
+	return 0;
+    } else if (errno != EBUSY) {
+	return -errno;
+    }
+
+    stop.flush = 0;
+ 
+    i = 0;
+    do {
+	ret = drmCommandWrite(info->drmFD, DRM_RADEON_CP_STOP, &stop, 
+			      sizeof(drmRadeonCPStop));
+    } while (ret && errno == EBUSY && i++ < RADEON_IDLE_RETRY);
+
+    if (ret == 0) {
+	return 0;
+    } else if (errno != EBUSY) {
+	return -errno;
+    }
+
+    stop.idle = 0;
+
+    if (drmCommandWrite(info->drmFD, DRM_RADEON_CP_STOP,
+			&stop, sizeof(drmRadeonCPStop))) {
+	return -errno;
+    } else {
+	return 0;
+    }
+}
+
 /* Get an indirect buffer for the CP 2D acceleration commands  */
 drmBufPtr RADEONCPGetBuffer(ScrnInfoPtr pScrn)
 {
@@ -472,9 +513,10 @@ drmBufPtr RADEONCPGetBuffer(ScrnInfoPtr pScrn)
 /* Flush the indirect buffer to the kernel for submission to the card */
 void RADEONCPFlushIndirect(ScrnInfoPtr pScrn, int discard)
 {
-    RADEONInfoPtr  info   = RADEONPTR(pScrn);
-    drmBufPtr      buffer = info->indirectBuffer;
-    int            start  = info->indirectStart;
+    RADEONInfoPtr      info   = RADEONPTR(pScrn);
+    drmBufPtr          buffer = info->indirectBuffer;
+    int                start  = info->indirectStart;
+    drmRadeonIndirect  indirect;
 
     if (!buffer) return;
     if (start == buffer->used && !discard) return;
@@ -483,8 +525,14 @@ void RADEONCPFlushIndirect(ScrnInfoPtr pScrn, int discard)
 	xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Flushing buffer %d\n",
 		   buffer->idx);
     }
-    drmRadeonFlushIndirectBuffer(info->drmFD, buffer->idx,
-				 start, buffer->used, discard);
+
+    indirect.idx     = buffer->idx;
+    indirect.start   = start;
+    indirect.end     = buffer->used;
+    indirect.discard = discard;
+
+    drmCommandWriteRead(info->drmFD, DRM_RADEON_INDIRECT,
+			&indirect, sizeof(drmRadeonIndirect));
 
     if (discard) {
 	info->indirectBuffer = RADEONCPGetBuffer(pScrn);
@@ -502,9 +550,10 @@ void RADEONCPFlushIndirect(ScrnInfoPtr pScrn, int discard)
 /* Flush and release the indirect buffer */
 void RADEONCPReleaseIndirect(ScrnInfoPtr pScrn)
 {
-    RADEONInfoPtr  info   = RADEONPTR(pScrn);
-    drmBufPtr      buffer = info->indirectBuffer;
-    int            start  = info->indirectStart;
+    RADEONInfoPtr      info   = RADEONPTR(pScrn);
+    drmBufPtr          buffer = info->indirectBuffer;
+    int                start  = info->indirectStart;
+    drmRadeonIndirect  indirect;
 
     info->indirectBuffer = NULL;
     info->indirectStart  = 0;
@@ -515,8 +564,14 @@ void RADEONCPReleaseIndirect(ScrnInfoPtr pScrn)
 	xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Releasing buffer %d\n",
 		   buffer->idx);
     }
-    drmRadeonFlushIndirectBuffer(info->drmFD, buffer->idx,
-				 start, buffer->used, 1);
+
+    indirect.idx     = buffer->idx;
+    indirect.start   = start;
+    indirect.end     = buffer->used;
+    indirect.discard = 1;
+
+    drmCommandWriteRead(info->drmFD, DRM_RADEON_INDIRECT,
+			&indirect, sizeof(drmRadeonIndirect));
 }
 #endif
 
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_accelfuncs.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_accelfuncs.c
index 76200ecee..06dcfd63e 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_accelfuncs.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_accelfuncs.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_accelfuncs.c,v 1.1 2002/09/18 18:14:58 martin Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_accelfuncs.c,v 1.6 2003/01/29 18:06:06 martin Exp $ */
 /*
  * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and
  *                VA Linux Systems Inc., Fremont, California.
@@ -31,7 +31,7 @@
  * Authors:
  *   Kevin E. Martin <martin@xfree86.org>
  *   Rickard E. Faith <faith@valinux.com>
- *   Alan Hourihane <ahourihane@valinux.com>
+ *   Alan Hourihane <alanh@fairlite.demon.co.uk>
  *   Michel Dänzer <michel@daenzer.net>
  *
  * Credits:
@@ -106,16 +106,43 @@ void
 FUNC_NAME(RADEONWaitForIdle)(ScrnInfoPtr pScrn)
 {
     RADEONInfoPtr  info = RADEONPTR(pScrn);
+    unsigned char *RADEONMMIO = info->MMIO;
     int            i    = 0;
 
-#ifdef ACCEL_MMIO
-
-    unsigned char *RADEONMMIO = info->MMIO;
+#ifdef ACCEL_CP
+    /* Make sure the CP is idle first */
+    if (info->CPStarted) {
+	int  ret;
+	FLUSH_RING();
+
+	for (;;) {
+	    do {
+		ret = drmCommandNone(info->drmFD, DRM_RADEON_CP_IDLE);
+		if (ret && ret != -EBUSY) {
+		    xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+			       "%s: CP idle %d\n", __FUNCTION__, ret);
+		}
+	    } while ((ret == -EBUSY) && (i++ < RADEON_TIMEOUT));
+
+	    if (ret == 0) return;
+
+	    xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+		       "Idle timed out, resetting engine...\n");
+	    RADEONEngineReset(pScrn);
+	    RADEONEngineRestore(pScrn);
+
+	    /* Always restart the engine when doing CP 2D acceleration */
+	    RADEONCP_RESET(pScrn, info);
+	    RADEONCP_START(pScrn, info);
+	}
+    }
+#endif
 
     RADEONTRACE(("WaitForIdle (entering): %d entries, stat=0x%08x\n",
 		     INREG(RADEON_RBBM_STATUS) & RADEON_RBBM_FIFOCNT_MASK,
 		     INREG(RADEON_RBBM_STATUS)));
 
+    /* Wait for the engine to go idle */
     RADEONWaitForFifoFunction(pScrn, 64);
 
     for (;;) {
@@ -139,35 +166,6 @@ FUNC_NAME(RADEONWaitForIdle)(ScrnInfoPtr pScrn)
 	}
 #endif
     }
-
-#else /* ACCEL_CP */
-
-    int  ret;
-
-    FLUSH_RING();
-
-    for (;;) {
-	do {
-	    ret = drmRadeonWaitForIdleCP(info->drmFD);
-	    if (ret && ret != -EBUSY) {
-		xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-			   "%s: CP idle %d\n", __FUNCTION__, ret);
-	    }
-	} while ((ret == -EBUSY) && (i++ < RADEON_TIMEOUT));
-
-	if (ret == 0) return;
-
-	xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-		   "Idle timed out, resetting engine...\n");
-	RADEONEngineReset(pScrn);
-	RADEONEngineRestore(pScrn);
-
-	/* Always restart the engine when doing CP 2D acceleration */
-	RADEONCP_RESET(pScrn, info);
-	RADEONCP_START(pScrn, info);
-    }
-
-#endif
 }
 
 /* This callback is required for multiheader cards using XAA */
@@ -280,6 +278,12 @@ FUNC_NAME(RADEONSetupForSolidLine)(ScrnInfoPtr pScrn,
 				     | RADEON_GMC_SRC_DATATYPE_COLOR
 				     | RADEON_ROP[rop].pattern);
 
+    if (info->ChipFamily >= CHIP_FAMILY_RV200) {
+	BEGIN_ACCEL(1);
+	OUT_ACCEL_REG(RADEON_DST_LINE_PATCOUNT,
+		      0x55 << RADEON_BRES_CNTL_SHIFT);
+    }
+
     BEGIN_ACCEL(3);
 
     OUT_ACCEL_REG(RADEON_DP_GUI_MASTER_CNTL, info->dp_gui_master_cntl_clip);
@@ -578,15 +582,33 @@ FUNC_NAME(RADEONSetupForMono8x8PatternFill)(ScrnInfoPtr pScrn,
 					    unsigned int planemask)
 {
     RADEONInfoPtr  info = RADEONPTR(pScrn);
+#if X_BYTE_ORDER == X_BIG_ENDIAN
+    unsigned char  pattern[8];
+#endif
     ACCEL_PREAMBLE();
 
+#if X_BYTE_ORDER == X_BIG_ENDIAN
+    /* Take care of endianness */
+    pattern[0] = (patternx & 0x000000ff);
+    pattern[1] = (patternx & 0x0000ff00) >> 8;
+    pattern[2] = (patternx & 0x00ff0000) >> 16;
+    pattern[3] = (patternx & 0xff000000) >> 24;
+    pattern[4] = (patterny & 0x000000ff);
+    pattern[5] = (patterny & 0x0000ff00) >> 8;
+    pattern[6] = (patterny & 0x00ff0000) >> 16;
+    pattern[7] = (patterny & 0xff000000) >> 24;
+#endif
+
     /* Save for later clipping */
     info->dp_gui_master_cntl_clip = (info->dp_gui_master_cntl
 				     | (bg == -1
 					? RADEON_GMC_BRUSH_8X8_MONO_FG_LA
 					: RADEON_GMC_BRUSH_8X8_MONO_FG_BG)
 				     | RADEON_ROP[rop].pattern
-				     | RADEON_GMC_BYTE_MSB_TO_LSB);
+#if X_BYTE_ORDER == X_LITTLE_ENDIAN
+				     | RADEON_GMC_BYTE_MSB_TO_LSB
+#endif
+				    );
 
     BEGIN_ACCEL((bg == -1) ? 5 : 6);
 
@@ -595,8 +617,13 @@ FUNC_NAME(RADEONSetupForMono8x8PatternFill)(ScrnInfoPtr pScrn,
     OUT_ACCEL_REG(RADEON_DP_BRUSH_FRGD_CLR,  fg);
     if (bg != -1)
 	OUT_ACCEL_REG(RADEON_DP_BRUSH_BKGD_CLR, bg);
+#if X_BYTE_ORDER == X_LITTLE_ENDIAN
     OUT_ACCEL_REG(RADEON_BRUSH_DATA0,        patternx);
     OUT_ACCEL_REG(RADEON_BRUSH_DATA1,        patterny);
+#else
+    OUT_ACCEL_REG(RADEON_BRUSH_DATA0,        *(CARD32 *)(pointer)&pattern[0]);
+    OUT_ACCEL_REG(RADEON_BRUSH_DATA1,        *(CARD32 *)(pointer)&pattern[4]);
+#endif
 
     FINISH_ACCEL();
 }
@@ -778,7 +805,7 @@ FUNC_NAME(RADEONSetupForScanlineCPUToScreenColorExpandFill)(ScrnInfoPtr pScrn,
 #else
     BEGIN_ACCEL(2);
 
-    OUT_ACCEL_REG(RADEON_RBBM_GUICNTL,       RADEON_HOST_DATA_SWAP_NONE);
+    OUT_ACCEL_REG(RADEON_RBBM_GUICNTL,       RADEON_HOST_DATA_SWAP_32BIT);
 #endif
     OUT_ACCEL_REG(RADEON_DP_WRITE_MASK,      planemask);
 
@@ -1187,8 +1214,16 @@ FUNC_NAME(RADEONAccelInit)(ScreenPtr pScreen, XAAInfoRecPtr a)
 	= FUNC_NAME(RADEONSubsequentMono8x8PatternFillRect);
     a->Mono8x8PatternFillFlags          = (HARDWARE_PATTERN_PROGRAMMED_BITS
 					   | HARDWARE_PATTERN_PROGRAMMED_ORIGIN
-					   | HARDWARE_PATTERN_SCREEN_ORIGIN
-					   | BIT_ORDER_IN_BYTE_LSBFIRST);
+					   | HARDWARE_PATTERN_SCREEN_ORIGIN);
+
+#if X_BYTE_ORDER == X_LITTLE_ENDIAN
+    if (info->ChipFamily >= CHIP_FAMILY_RV200)
+	a->Mono8x8PatternFillFlags |= BIT_ORDER_IN_BYTE_MSBFIRST;
+    else
+	a->Mono8x8PatternFillFlags |= BIT_ORDER_IN_BYTE_LSBFIRST;
+#else
+    a->Mono8x8PatternFillFlags |= BIT_ORDER_IN_BYTE_LSBFIRST;
+#endif
 
 				/* Indirect CPU-To-Screen Color Expand */
 
@@ -1216,6 +1251,10 @@ FUNC_NAME(RADEONAccelInit)(ScreenPtr pScreen, XAAInfoRecPtr a)
     a->SubsequentSolidHorVertLine
 	= FUNC_NAME(RADEONSubsequentSolidHorVertLine);
 
+#ifdef XFree86LOADER
+    if (info->xaaReq.minorversion >= 1) {
+#endif
+
     /* RADEON only supports 14 bits for lines and clipping and only
      * draws lines that are completely on-screen correctly.  This will
      * cause display corruption problem in the cases when out-of-range
@@ -1237,21 +1276,30 @@ FUNC_NAME(RADEONAccelInit)(ScreenPtr pScreen, XAAInfoRecPtr a)
     a->SubsequentSolidTwoPointLine
 	= FUNC_NAME(RADEONSubsequentSolidTwoPointLine);
 
-    /* Disabled because it does not pass XTest */
-    a->SetupForDashedLine
-	= FUNC_NAME(RADEONSetupForDashedLine);
-    a->SubsequentDashedTwoPointLine
-	= FUNC_NAME(RADEONSubsequentDashedTwoPointLine);
-    a->DashPatternMaxLength             = 32;
-    /* ROP3 doesn't seem to work properly for dashedline with GXinvert */
-    a->DashedLineFlags                  = (LINE_PATTERN_LSBFIRST_LSBJUSTIFIED
+    /* Disabled on RV200 and newer because it does not pass XTest */
+    if (info->ChipFamily < CHIP_FAMILY_RV200) {
+	a->SetupForDashedLine
+	    = FUNC_NAME(RADEONSetupForDashedLine);
+	a->SubsequentDashedTwoPointLine
+	    = FUNC_NAME(RADEONSubsequentDashedTwoPointLine);
+	a->DashPatternMaxLength         = 32;
+	/* ROP3 doesn't seem to work properly for dashedline with GXinvert */
+	a->DashedLineFlags              = (LINE_PATTERN_LSBFIRST_LSBJUSTIFIED
 					   | LINE_PATTERN_POWER_OF_2_ONLY
 					   | LINE_LIMIT_COORDS
 					   | ROP_NEEDS_SOURCE);
-    a->DashedLineLimits.x1 = 0;
-    a->DashedLineLimits.y1 = 0;
-    a->DashedLineLimits.x2 = pScrn->virtualX-1;
-    a->DashedLineLimits.y2 = pScrn->virtualY-1;
+	a->DashedLineLimits.x1 = 0;
+	a->DashedLineLimits.y1 = 0;
+	a->DashedLineLimits.x2 = pScrn->virtualX-1;
+	a->DashedLineLimits.y2 = pScrn->virtualY-1;
+    }
+
+#ifdef XFree86LOADER
+    } else {
+	xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+		   "libxaa too old, can't accelerate TwoPoint lines\n");
+    }
+#endif
 
     /* Clipping, note that without this, all line accelerations will
      * not be called
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_cursor.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_cursor.c
index 284411972..868703d96 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_cursor.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_cursor.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_cursor.c,v 1.15 2002/10/12 01:38:07 martin Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_cursor.c,v 1.23 2003/02/24 20:34:55 tsi Exp $ */
 /*
  * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and
  *                VA Linux Systems Inc., Fremont, California.
@@ -46,45 +46,84 @@
 
 				/* Driver data structures */
 #include "radeon.h"
+#include "radeon_macros.h"
 #include "radeon_reg.h"
 
 				/* X and server generic header files */
 #include "xf86.h"
 
+/* Mono ARGB cursor colours (premultiplied). */
+static CARD32 mono_cursor_color[] = {
+	0x00000000, /* White, fully transparent. */
+	0x00000000, /* Black, fully transparent. */
+	0xffffffff, /* White, fully opaque. */
+	0xff000000, /* Black, fully opaque. */
+};
+
+#define CURSOR_WIDTH	64
+#define CURSOR_HEIGHT	64
+
+/*
+ * The cursor bits are always 32bpp.  On MSBFirst busses,
+ * configure byte swapping to swap 32 bit units when writing
+ * the cursor image.  Byte swapping must always be returned
+ * to its previous value before returning.
+ */
 #if X_BYTE_ORDER == X_BIG_ENDIAN
-#define P_SWAP32(a, b)							\
-do {									\
-    ((char *)a)[0] = ((char *)b)[3];					\
-    ((char *)a)[1] = ((char *)b)[2];					\
-    ((char *)a)[2] = ((char *)b)[1];					\
-    ((char *)a)[3] = ((char *)b)[0];					\
-} while (0)
-
-#define P_SWAP16(a, b)							\
-do {									\
-    ((char *)a)[0] = ((char *)b)[1];					\
-    ((char *)a)[1] = ((char *)b)[0];					\
-    ((char *)a)[2] = ((char *)b)[3];					\
-    ((char *)a)[3] = ((char *)b)[2];					\
-} while (0)
-#endif
 
+#define CURSOR_SWAPPING_DECL_MMIO   unsigned char *RADEONMMIO = info->MMIO;
+#define CURSOR_SWAPPING_DECL	    CARD32  __surface_cntl;
+#define CURSOR_SWAPPING_START() \
+    OUTREG(RADEON_SURFACE_CNTL, \
+	   ((__surface_cntl = INREG(RADEON_SURFACE_CNTL)) | \
+	    RADEON_NONSURF_AP0_SWP_32BPP) & \
+	   ~RADEON_NONSURF_AP0_SWP_16BPP)
+#define CURSOR_SWAPPING_END()	(OUTREG(RADEON_SURFACE_CNTL, __surface_cntl))
+
+#else
+
+#define CURSOR_SWAPPING_DECL_MMIO
+#define CURSOR_SWAPPING_DECL
+#define CURSOR_SWAPPING_START()
+#define CURSOR_SWAPPING_END()
+
+#endif
 
 /* Set cursor foreground and background colors */
 static void RADEONSetCursorColors(ScrnInfoPtr pScrn, int bg, int fg)
 {
     RADEONInfoPtr  info       = RADEONPTR(pScrn);
-    unsigned char *RADEONMMIO = info->MMIO;
-
-    if (info->IsSecondary || info->Clone) {
-	OUTREG(RADEON_CUR2_CLR0, bg);
-	OUTREG(RADEON_CUR2_CLR1, fg);
-    }
-
-    if (!info->IsSecondary) {
-	OUTREG(RADEON_CUR_CLR0, bg);
-	OUTREG(RADEON_CUR_CLR1, fg);
-    }
+    CARD32        *pixels     = (CARD32 *)(pointer)(info->FB + info->cursor_start);
+    int            pixel, i;
+    CURSOR_SWAPPING_DECL_MMIO
+    CURSOR_SWAPPING_DECL
+
+#ifdef ARGB_CURSOR
+    /* Don't recolour cursors set with SetCursorARGB. */
+    if (info->cursor_argb)
+       return;
+#endif
+    
+    fg |= 0xff000000;
+    bg |= 0xff000000;
+    
+    /* Don't recolour the image if we don't have to. */
+    if (fg == info->cursor_fg && bg == info->cursor_bg)
+       return;
+
+    CURSOR_SWAPPING_START();
+    
+    /* Note: We assume that the pixels are either fully opaque or fully
+     * transparent, so we won't premultiply them, and we can just
+     * check for non-zero pixel values; those are either fg or bg
+     */
+    for (i = 0; i < CURSOR_WIDTH * CURSOR_HEIGHT; i++, pixels++)
+       if ((pixel = *pixels))
+           *pixels = (pixel == info->cursor_fg) ? fg : bg;
+
+    CURSOR_SWAPPING_END();
+    info->cursor_fg = fg;
+    info->cursor_bg = bg;
 }
 
 
@@ -101,6 +140,7 @@ static void RADEONSetCursorPosition(ScrnInfoPtr pScrn, int x, int y)
     int                total_y    = pScrn->frameY1 - pScrn->frameY0;
     int                X2         = pScrn->frameX0 + x;
     int                Y2         = pScrn->frameY0 + y;
+    int		       stride     = 256;
 
     if (x < 0)                        xorigin = -x+1;
     if (y < 0)                        yorigin = -y+1;
@@ -154,7 +194,7 @@ static void RADEONSetCursorPosition(ScrnInfoPtr pScrn, int x, int y)
 
 	if ((X0 >= 0 || Y0 >= 0) &&
 	    ((info->CloneFrameX0 != X0) || (info->CloneFrameY0 != Y0))) {
-	    pScrn->AdjustFrame(pScrn->scrnIndex, X0, Y0, 1);
+	    RADEONDoAdjustFrame(pScrn, X0, Y0, TRUE);
 	    info->CloneFrameX0 = X0;
 	    info->CloneFrameY0 = Y0;
 	}
@@ -167,7 +207,7 @@ static void RADEONSetCursorPosition(ScrnInfoPtr pScrn, int x, int y)
 	OUTREG(RADEON_CUR_HORZ_VERT_POSN, (RADEON_CUR_LOCK
 					   | ((xorigin ? 0 : x) << 16)
 					   | (yorigin ? 0 : y)));
-	OUTREG(RADEON_CUR_OFFSET, info->cursor_start + yorigin * 16);
+	OUTREG(RADEON_CUR_OFFSET, info->cursor_start + yorigin * stride);
     } else {
 	OUTREG(RADEON_CUR2_HORZ_VERT_OFF,  (RADEON_CUR2_LOCK
 					    | (xorigin << 16)
@@ -176,7 +216,7 @@ static void RADEONSetCursorPosition(ScrnInfoPtr pScrn, int x, int y)
 					    | ((xorigin ? 0 : x) << 16)
 					    | (yorigin ? 0 : y)));
 	OUTREG(RADEON_CUR2_OFFSET,
-	       info->cursor_start + pScrn->fbOffset + yorigin * 16);
+	       info->cursor_start + pScrn->fbOffset + yorigin * stride);
     }
 
     if (info->Clone) {
@@ -194,7 +234,7 @@ static void RADEONSetCursorPosition(ScrnInfoPtr pScrn, int x, int y)
 					    | ((xorigin ? 0 : X2) << 16)
 					    | (yorigin ? 0 : Y2)));
 	OUTREG(RADEON_CUR2_OFFSET,
-	       info->cursor_start + pScrn->fbOffset + yorigin * 16);
+	       info->cursor_start + pScrn->fbOffset + yorigin * stride);
     }
 }
 
@@ -205,80 +245,56 @@ static void RADEONLoadCursorImage(ScrnInfoPtr pScrn, unsigned char *image)
 {
     RADEONInfoPtr  info       = RADEONPTR(pScrn);
     unsigned char *RADEONMMIO = info->MMIO;
-    CARD32        *s          = (CARD32 *)(pointer)image;
+    CARD8         *s          = (CARD8 *)(pointer)image;
     CARD32        *d          = (CARD32 *)(pointer)(info->FB + info->cursor_start);
-    int            y;
     CARD32         save1      = 0;
     CARD32         save2      = 0;
+    CARD8	   chunk;
+    CARD32         i, j;
+    CURSOR_SWAPPING_DECL
 
     if (!info->IsSecondary) {
-	save1 = INREG(RADEON_CRTC_GEN_CNTL);
+	save1 = INREG(RADEON_CRTC_GEN_CNTL) & ~(CARD32) (3 << 20);
+	save1 |= (CARD32) (2 << 20);
 	OUTREG(RADEON_CRTC_GEN_CNTL, save1 & (CARD32)~RADEON_CRTC_CUR_EN);
     }
 
     if (info->IsSecondary || info->Clone) {
-	save2 = INREG(RADEON_CRTC2_GEN_CNTL);
+	save2 = INREG(RADEON_CRTC2_GEN_CNTL) & ~(CARD32) (3 << 20);
+	save2 |= (CARD32) (2 << 20);
 	OUTREG(RADEON_CRTC2_GEN_CNTL, save2 & (CARD32)~RADEON_CRTC2_CUR_EN);
     }
 
-#if X_BYTE_ORDER == X_BIG_ENDIAN
-    switch(info->CurrentLayout.pixel_bytes) {
-    case 4:
-    case 3:
-	for (y = 0; y < 64; y++) {
-	    P_SWAP32(d,s);
-	    d++; s++;
-	    P_SWAP32(d,s);
-	    d++; s++;
-	    P_SWAP32(d,s);
-	    d++; s++;
-	    P_SWAP32(d,s);
-	    d++; s++;
-	}
-	break;
-    case 2:
-	for (y = 0; y < 64; y++) {
-	    P_SWAP16(d,s);
-	    d++; s++;
-	    P_SWAP16(d,s);
-	    d++; s++;
-	    P_SWAP16(d,s);
-	    d++; s++;
-	    P_SWAP16(d,s);
-	    d++; s++;
-	}
-	break;
-    default:
-	for (y = 0; y < 64; y++) {
-	    *d++ = *s++;
-	    *d++ = *s++;
-	    *d++ = *s++;
-	    *d++ = *s++;
-	}
-    }
-#else
-    for (y = 0; y < 64; y++) {
-	*d++ = *s++;
-	*d++ = *s++;
-	*d++ = *s++;
-	*d++ = *s++;
-    }
+#ifdef ARGB_CURSOR
+    info->cursor_argb = FALSE;
 #endif
 
-    /* Set the area after the cursor to be all transparent so that we
-       won't display corrupted cursors on the screen */
-    for (y = 0; y < 64; y++) {
-	*d++ = 0xffffffff; /* The AND bits */
-	*d++ = 0xffffffff;
-	*d++ = 0x00000000; /* The XOR bits */
-	*d++ = 0x00000000;
+    /*
+     * Convert the bitmap to ARGB32.
+     *
+     * HARDWARE_CURSOR_SOURCE_MASK_INTERLEAVE_1 always places
+     * source in the low bit of the pair and mask in the high bit,
+     * and MSBFirst machines set HARDWARE_CURSOR_BIT_ORDER_MSBFIRST
+     * (which actually bit swaps the image) to make the bits LSBFirst
+     */
+    CURSOR_SWAPPING_START();
+#define ARGB_PER_CHUNK	(8 * sizeof (chunk) / 2)
+    for (i = 0; i < CURSOR_WIDTH * CURSOR_HEIGHT / ARGB_PER_CHUNK; i++) {
+        chunk = *s++;
+	for (j = 0; j < ARGB_PER_CHUNK; j++, chunk >>= 2)
+	    *d++ = mono_cursor_color[chunk & 3];
     }
+    CURSOR_SWAPPING_END();
+    
+    info->cursor_bg = mono_cursor_color[2];
+    info->cursor_fg = mono_cursor_color[3];
 
     if (!info->IsSecondary)
 	OUTREG(RADEON_CRTC_GEN_CNTL, save1);
 
     if (info->IsSecondary || info->Clone)
 	OUTREG(RADEON_CRTC2_GEN_CNTL, save2);
+
 }
 
 /* Hide hardware cursor. */
@@ -318,6 +334,87 @@ static Bool RADEONUseHWCursor(ScreenPtr pScreen, CursorPtr pCurs)
     return info->cursor_start ? TRUE : FALSE;
 }
 
+#ifdef ARGB_CURSOR
+#include "cursorstr.h"
+
+static Bool RADEONUseHWCursorARGB (ScreenPtr pScreen, CursorPtr pCurs)
+{
+    ScrnInfoPtr    pScrn = xf86Screens[pScreen->myNum];
+    RADEONInfoPtr  info  = RADEONPTR(pScrn);
+
+    if (info->cursor_start &&
+	pCurs->bits->height <= CURSOR_HEIGHT && pCurs->bits->width <= CURSOR_WIDTH)
+	return TRUE;
+    return FALSE;
+}
+
+static void RADEONLoadCursorARGB (ScrnInfoPtr pScrn, CursorPtr pCurs)
+{
+    RADEONInfoPtr  info       = RADEONPTR(pScrn);
+    unsigned char *RADEONMMIO = info->MMIO;
+    CARD32        *d          = (CARD32 *)(pointer)(info->FB + info->cursor_start);
+    int            x, y, w, h;
+    CARD32         save1      = 0;
+    CARD32         save2      = 0;
+    CARD32	  *image = pCurs->bits->argb;
+    CARD32	  *i;
+    CURSOR_SWAPPING_DECL
+
+    if (!image)
+	return;	/* XXX can't happen */
+    
+    if (!info->IsSecondary) {
+	save1 = INREG(RADEON_CRTC_GEN_CNTL) & ~(CARD32) (3 << 20);
+	save1 |= (CARD32) (2 << 20);
+	OUTREG(RADEON_CRTC_GEN_CNTL, save1 & (CARD32)~RADEON_CRTC_CUR_EN);
+    }
+
+    if (info->IsSecondary || info->Clone) {
+	save2 = INREG(RADEON_CRTC_GEN_CNTL) & ~(CARD32) (3 << 20);
+	save2 |= (CARD32) (2 << 20);
+	OUTREG(RADEON_CRTC2_GEN_CNTL, save2 & (CARD32)~RADEON_CRTC2_CUR_EN);
+    }
+
+#ifdef ARGB_CURSOR
+    info->cursor_argb = TRUE;
+#endif
+    
+    CURSOR_SWAPPING_START();
+
+    w = pCurs->bits->width;
+    if (w > CURSOR_WIDTH)
+	w = CURSOR_WIDTH;
+    h = pCurs->bits->height;
+    if (h > CURSOR_HEIGHT)
+	h = CURSOR_HEIGHT;
+    for (y = 0; y < h; y++)
+    {
+	i = image;
+	image += pCurs->bits->width;
+	for (x = 0; x < w; x++)
+	    *d++ = *i++;
+	/* pad to the right with transparent */
+	for (; x < CURSOR_WIDTH; x++)
+	    *d++ = 0;
+    }
+    /* pad below with transparent */
+    for (; y < CURSOR_HEIGHT; y++)
+	for (x = 0; x < CURSOR_WIDTH; x++)
+	    *d++ = 0;
+
+    CURSOR_SWAPPING_END ();
+
+    if (!info->IsSecondary)
+	OUTREG(RADEON_CRTC_GEN_CNTL, save1);
+
+    if (info->IsSecondary || info->Clone)
+	OUTREG(RADEON_CRTC2_GEN_CNTL, save2);
+
+}
+
+#endif
+    
+
 /* Initialize hardware cursor support. */
 Bool RADEONCursorInit(ScreenPtr pScreen)
 {
@@ -326,23 +423,25 @@ Bool RADEONCursorInit(ScreenPtr pScreen)
     xf86CursorInfoPtr  cursor;
     FBAreaPtr          fbarea;
     int                width;
+    int		       width_bytes;
     int                height;
-    int                size;
-
+    int                size_bytes;
 
     if (!(cursor = info->cursor = xf86CreateCursorInfoRec())) return FALSE;
 
-    cursor->MaxWidth          = 64;
-    cursor->MaxHeight         = 64;
+    cursor->MaxWidth          = CURSOR_WIDTH;
+    cursor->MaxHeight         = CURSOR_HEIGHT;
     cursor->Flags             = (HARDWARE_CURSOR_TRUECOLOR_AT_8BPP
-
-#if X_BYTE_ORDER == X_LITTLE_ENDIAN
+				 | HARDWARE_CURSOR_AND_SOURCE_WITH_MASK
+#if X_BYTE_ORDER == X_BIG_ENDIAN
+				 /* this is a lie -- 
+				  * HARDWARE_CURSOR_BIT_ORDER_MSBFIRST
+				  * actually inverts the bit order, so
+				  * this switches to LSBFIRST
+				  */
 				 | HARDWARE_CURSOR_BIT_ORDER_MSBFIRST
 #endif
-				 | HARDWARE_CURSOR_INVERT_MASK
-				 | HARDWARE_CURSOR_AND_SOURCE_WITH_MASK
-				 | HARDWARE_CURSOR_SOURCE_MASK_INTERLEAVE_64
-				 | HARDWARE_CURSOR_SWAP_SOURCE_AND_MASK);
+				 | HARDWARE_CURSOR_SOURCE_MASK_INTERLEAVE_1);
 
     cursor->SetCursorColors   = RADEONSetCursorColors;
     cursor->SetCursorPosition = RADEONSetCursorPosition;
@@ -351,13 +450,18 @@ Bool RADEONCursorInit(ScreenPtr pScreen)
     cursor->ShowCursor        = RADEONShowCursor;
     cursor->UseHWCursor       = RADEONUseHWCursor;
 
-    size                      = (cursor->MaxWidth/4) * cursor->MaxHeight;
+#ifdef ARGB_CURSOR
+    cursor->UseHWCursorARGB   = RADEONUseHWCursorARGB;
+    cursor->LoadCursorARGB    = RADEONLoadCursorARGB;
+#endif
+    size_bytes                = CURSOR_WIDTH * 4 * CURSOR_HEIGHT;
     width                     = pScrn->displayWidth;
-    height                    = (size*2 + 1023) / pScrn->displayWidth;
+    width_bytes		      = width * (pScrn->bitsPerPixel / 8);
+    height                    = (size_bytes + width_bytes - 1) / width_bytes;
     fbarea                    = xf86AllocateOffscreenArea(pScreen,
 							  width,
 							  height,
-							  16,
+							  256,
 							  NULL,
 							  NULL,
 							  NULL);
@@ -368,11 +472,11 @@ Bool RADEONCursorInit(ScreenPtr pScreen)
 		   "Hardware cursor disabled"
 		   " due to insufficient offscreen memory\n");
     } else {
-	info->cursor_start    = RADEON_ALIGN((fbarea->box.x1
-					      + width * fbarea->box.y1)
-					     * info->CurrentLayout.pixel_bytes,
-					     16);
-	info->cursor_end      = info->cursor_start + size;
+	info->cursor_start    = RADEON_ALIGN((fbarea->box.x1 + 
+					      fbarea->box.y1 * width) *
+					     info->CurrentLayout.pixel_bytes,
+					     256);
+	info->cursor_end      = info->cursor_start + size_bytes;
     }
 
     RADEONTRACE(("RADEONCursorInit (0x%08x-0x%08x)\n",
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dri.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dri.c
index 20a3217db..099641a5e 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dri.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dri.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dri.c,v 1.19 2002/10/12 01:38:07 martin Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dri.c,v 1.32 2003/02/19 09:17:30 alanh Exp $ */
 /*
  * Copyright 2000 ATI Technologies Inc., Markham, Ontario,
  *                VA Linux Systems Inc., Fremont, California.
@@ -38,6 +38,7 @@
 
 				/* Driver data structures */
 #include "radeon.h"
+#include "radeon_macros.h"
 #include "radeon_dri.h"
 #include "radeon_reg.h"
 #include "radeon_version.h"
@@ -47,18 +48,14 @@
 #include "windowstr.h"
 #include "xf86PciInfo.h"
 
+
+#include "shadowfb.h"
 				/* GLX/DRI/DRM definitions */
 #define _XF86DRI_SERVER_
 #include "GL/glxtokens.h"
 #include "sarea.h"
 #include "radeon_sarea.h"
 
-#if defined(__alpha__)
-# define PCIGART_ENABLED
-#else
-# undef PCIGART_ENABLED
-#endif
-
 /* HACK - for now, put this here... */
 /* Alpha - this may need to be a variable to handle UP1x00 vs TITAN */
 #if defined(__alpha__)
@@ -69,6 +66,16 @@
 # define DRM_PAGE_SIZE 4096
 #endif
 
+
+static Bool RADEONDRICloseFullScreen(ScreenPtr pScreen);
+static Bool RADEONDRIOpenFullScreen(ScreenPtr pScreen);
+static void RADEONDRITransitionTo2d(ScreenPtr pScreen);
+static void RADEONDRITransitionTo3d(ScreenPtr pScreen);
+static void RADEONDRITransitionMultiToSingle3d(ScreenPtr pScreen);
+static void RADEONDRITransitionSingleToMulti3d(ScreenPtr pScreen);
+
+static void RADEONDRIRefreshArea(ScrnInfoPtr pScrn, int num, BoxPtr pbox);
+
 /* Initialize the visual configs that are supported by the hardware.
  * These are combined with the visual configs that the indirect
  * rendering core supports, and the intersection is exported to the
@@ -82,7 +89,9 @@ static Bool RADEONInitVisualConfigs(ScreenPtr pScreen)
     __GLXvisualConfig   *pConfigs          = 0;
     RADEONConfigPrivPtr  pRADEONConfigs    = 0;
     RADEONConfigPrivPtr *pRADEONConfigPtrs = 0;
-    int                  i, accum, stencil;
+    int                  i, accum, stencil, db, use_db;
+
+    use_db = !info->noBackBuffer ? 1 : 0;
 
     switch (info->CurrentLayout.pixel_code) {
     case 8:  /* 8bpp mode is not support */
@@ -101,6 +110,7 @@ static Bool RADEONInitVisualConfigs(ScreenPtr pScreen)
 	numConfigs = 1;
 	if (RADEON_USE_ACCUM)   numConfigs *= 2;
 	if (RADEON_USE_STENCIL) numConfigs *= 2;
+	if (use_db)             numConfigs *= 2;
 
 	if (!(pConfigs
 	      = (__GLXvisualConfig *)xcalloc(sizeof(__GLXvisualConfig),
@@ -122,7 +132,8 @@ static Bool RADEONInitVisualConfigs(ScreenPtr pScreen)
 	}
 
 	i = 0;
-	for (accum = 0; accum <= RADEON_USE_ACCUM; accum++) {
+	for (db = 0; db <= use_db; db++) {
+	  for (accum = 0; accum <= RADEON_USE_ACCUM; accum++) {
 	    for (stencil = 0; stencil <= RADEON_USE_STENCIL; stencil++) {
 		pRADEONConfigPtrs[i] = &pRADEONConfigs[i];
 
@@ -148,7 +159,10 @@ static Bool RADEONInitVisualConfigs(ScreenPtr pScreen)
 		    pConfigs[i].accumBlueSize  = 0;
 		    pConfigs[i].accumAlphaSize = 0;
 		}
-		pConfigs[i].doubleBuffer       = TRUE;
+		if (db)
+		    pConfigs[i].doubleBuffer   = TRUE;
+		else
+		    pConfigs[i].doubleBuffer   = FALSE;
 		pConfigs[i].stereo             = FALSE;
 		pConfigs[i].bufferSize         = 16;
 		pConfigs[i].depthSize          = 16;
@@ -171,6 +185,7 @@ static Bool RADEONInitVisualConfigs(ScreenPtr pScreen)
 		pConfigs[i].transparentIndex   = 0;
 		i++;
 	    }
+	  }
 	}
 	break;
 
@@ -178,6 +193,7 @@ static Bool RADEONInitVisualConfigs(ScreenPtr pScreen)
 	numConfigs = 1;
 	if (RADEON_USE_ACCUM)   numConfigs *= 2;
 	if (RADEON_USE_STENCIL) numConfigs *= 2;
+	if (use_db)             numConfigs *= 2;
 
 	if (!(pConfigs
 	      = (__GLXvisualConfig *)xcalloc(sizeof(__GLXvisualConfig),
@@ -199,7 +215,8 @@ static Bool RADEONInitVisualConfigs(ScreenPtr pScreen)
 	}
 
 	i = 0;
-	for (accum = 0; accum <= RADEON_USE_ACCUM; accum++) {
+	for (db = 0; db <= use_db; db++) {
+	  for (accum = 0; accum <= RADEON_USE_ACCUM; accum++) {
 	    for (stencil = 0; stencil <= RADEON_USE_STENCIL; stencil++) {
 		pRADEONConfigPtrs[i] = &pRADEONConfigs[i];
 
@@ -225,9 +242,12 @@ static Bool RADEONInitVisualConfigs(ScreenPtr pScreen)
 		    pConfigs[i].accumBlueSize  = 0;
 		    pConfigs[i].accumAlphaSize = 0;
 		}
-		pConfigs[i].doubleBuffer       = TRUE;
+		if (db)
+		    pConfigs[i].doubleBuffer   = TRUE;
+		else
+		    pConfigs[i].doubleBuffer   = FALSE;
 		pConfigs[i].stereo             = FALSE;
-		pConfigs[i].bufferSize         = 24;
+		pConfigs[i].bufferSize         = 32;
 		if (stencil) {
 		    pConfigs[i].depthSize      = 24;
 		    pConfigs[i].stencilSize    = 8;
@@ -250,6 +270,7 @@ static Bool RADEONInitVisualConfigs(ScreenPtr pScreen)
 		pConfigs[i].transparentIndex   = 0;
 		i++;
 	    }
+	  }
 	}
 	break;
     }
@@ -494,86 +515,9 @@ static void RADEONScreenToScreenCopyDepth(ScrnInfoPtr pScrn,
 /* Initialize the state of the back and depth buffers */
 static void RADEONDRIInitBuffers(WindowPtr pWin, RegionPtr prgn, CARD32 indx)
 {
-    /* FIXME: This routine needs to have acceleration turned on */
-    ScreenPtr           pScreen = pWin->drawable.pScreen;
-    ScrnInfoPtr         pScrn   = xf86Screens[pScreen->myNum];
-    RADEONInfoPtr       info    = RADEONPTR(pScrn);
-    RADEONSAREAPrivPtr  pSAREAPriv;
-    BoxPtr              pbox;
-    int                 nbox;
-    unsigned int        color, depth, stencil;
-    unsigned int        color_mask, depth_mask, flags;
-
-    /* FIXME: This should be based on the __GLXvisualConfig info */
-    color = 0;
-    switch (pScrn->bitsPerPixel) {
-    case 16:
-       depth = 0x0000ffff;
-       color_mask = 0x0000ffff;
-       depth_mask = 0xffffffff;
-       stencil = 0x00000000;
-       flags = RADEON_BACK | RADEON_DEPTH;
-       break;
-
-    case 32:
-       depth = 0x00ffffff;
-       color_mask = 0xffffffff;
-       depth_mask = 0x00ffffff;
-       stencil = 0xff000000;
-       flags = RADEON_BACK | RADEON_DEPTH /* | RADEON_STENCIL */;
-       break;
-
-    default:
-       return;
-    }
-
-    /* FIXME: Copy XAAPaintWindow() and use REGION_TRANSLATE() */
-
-    /* FIXME: Only initialize the back and depth buffers for contexts
-     * that request them
-     */
-
-    FLUSH_RING();
-
-    pSAREAPriv = (RADEONSAREAPrivPtr)DRIGetSAREAPrivate(pScreen);
-
-    pbox = REGION_RECTS(prgn);
-    nbox = REGION_NUM_RECTS(prgn);
-
-    for (; nbox; nbox--, pbox++) {
-	int ret;
-
-	/* drmRadeonClear uses the clip rects to draw instead of the
-	 * rect passed to it; however, it uses the rect for the depth
-	 * clears
-	 */
-	pSAREAPriv->boxes[0].x1 = pbox->x1;
-	pSAREAPriv->boxes[0].x2 = pbox->x2;
-	pSAREAPriv->boxes[0].y1 = pbox->y1;
-	pSAREAPriv->boxes[0].y2 = pbox->y2;
-	pSAREAPriv->nbox = 1;
-
-	ret = drmRadeonClear(info->drmFD,
-			     flags,
-			     color, depth, color_mask, depth_mask,
-			     pSAREAPriv->boxes, pSAREAPriv->nbox);
-	if (ret) {
-	    xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-		       "[dri] DRIInitBuffers timed out, "
-		       "resetting engine...\n");
-	    RADEONEngineReset(pScrn);
-	    RADEONEngineRestore(pScrn);
-	    RADEONCP_RESET(pScrn, info);
-	    RADEONCP_START(pScrn, info);
-	    return;
-	}
-    }
-
-    /* Mark the X server as the last context owner */
-    pSAREAPriv->ctxOwner = DRIGetContext(pScreen);
-
-    RADEONSelectBuffer(pScrn, RADEON_FRONT);
-    info->accel->NeedToSync = TRUE;
+   /* NOOP.  There's no need for the 2d driver to be clearing buffers
+    * for the 3d client.  It knows how to do that on its own. 
+    */
 }
 
 /* Copy the back and depth buffers when the X server moves a window.
@@ -720,13 +664,14 @@ static void RADEONDRIMoveBuffers(WindowPtr pParent, DDXPointRec ptOldOrg,
 						     xa, ya,
 						     destx, desty,
 						     w, h);
-	RADEONSelectBuffer(pScrn, RADEON_DEPTH);
 
-	if (info->depthMoves)
+	if (info->depthMoves) {
+	    RADEONSelectBuffer(pScrn, RADEON_DEPTH);
 	    RADEONScreenToScreenCopyDepth(pScrn,
 					  xa, ya,
 					  destx, desty,
 					  w, h);
+	}
     }
 
     RADEONSelectBuffer(pScrn, RADEON_FRONT);
@@ -747,6 +692,7 @@ static Bool RADEONDRIAgpInit(RADEONInfoPtr info, ScreenPtr pScreen)
     unsigned char *RADEONMMIO = info->MMIO;
     unsigned long  mode;
     unsigned int   vendor, device;
+    unsigned long agpBase;
     int            ret;
     int            s, l;
 
@@ -757,7 +703,7 @@ static Bool RADEONDRIAgpInit(RADEONInfoPtr info, ScreenPtr pScreen)
 
     /* Workaround for some hardware bugs */
     if (info->ChipFamily < CHIP_FAMILY_R200)
-	OUTREG(RADEON_AGP_CNTL, INREG(RADEON_AGP_CNTL) | 0x000e0020);
+	OUTREG(RADEON_AGP_CNTL, INREG(RADEON_AGP_CNTL) | 0x000e0000);
 
 				/* Modify the mode if the default mode
 				 * is not appropriate for this
@@ -776,6 +722,8 @@ static Bool RADEONDRIAgpInit(RADEONInfoPtr info, ScreenPtr pScreen)
     case 1: default: mode |= RADEON_AGP_1X_MODE;
     }
 
+    if (info->agpFastWrite) mode |= RADEON_AGP_FW_MODE;
+    
     if ((vendor == PCI_VENDOR_AMD) &&
 	(device == PCI_CHIP_AMD761)) {
 	/* The combination of 761 with MOBILITY chips will lockup the
@@ -783,8 +731,7 @@ static Bool RADEONDRIAgpInit(RADEONInfoPtr info, ScreenPtr pScreen)
 	 * market, so this is not yet a problem.
 	 */
 	if ((info->ChipFamily == CHIP_FAMILY_M6) ||
-	    (info->ChipFamily == CHIP_FAMILY_M7) || 
-	    (info->ChipFamily == CHIP_FAMILY_M9))
+	    (info->ChipFamily == CHIP_FAMILY_M7))
 	    return FALSE;
 
 	/* Disable fast write for AMD 761 chipset, since they cause
@@ -924,13 +871,13 @@ static Bool RADEONDRIAgpInit(RADEONInfoPtr info, ScreenPtr pScreen)
 	       (unsigned long)info->agpTex);
 
 				/* Initialize Radeon's AGP registers */
-    /* Ring buffer is at AGP offset 0 */
-    OUTREG(RADEON_AGP_BASE, info->ringHandle);
+
+    agpBase = drmAgpBase(info->drmFD);
+    OUTREG(RADEON_AGP_BASE, agpBase);
 
     return TRUE;
 }
 
-#if defined(PCIGART_ENABLED)
 /* Initialize the PCIGART state.  Request memory for use in PCI space,
  * and initialize the Radeon registers to point to that memory.
  */
@@ -984,7 +931,7 @@ static Bool RADEONDRIPciInit(RADEONInfoPtr info, ScreenPtr pScreen)
 	       (unsigned long)info->ring);
     xf86DrvMsg(pScreen->myNum, X_INFO,
 	       "[pci] Ring contents 0x%08lx\n",
-	       *(unsigned long *)info->ring);
+	       *(unsigned long *)(pointer)info->ring);
 
     if (drmAddMap(info->drmFD, info->ringReadOffset, info->ringReadMapSize,
 		  DRM_SCATTER_GATHER, flags, &info->ringReadPtrHandle) < 0) {
@@ -1007,7 +954,7 @@ static Bool RADEONDRIPciInit(RADEONInfoPtr info, ScreenPtr pScreen)
 	       (unsigned long)info->ringReadPtr);
     xf86DrvMsg(pScreen->myNum, X_INFO,
 	       "[pci] Ring read ptr contents 0x%08lx\n",
-	       *(unsigned long *)info->ringReadPtr);
+	       *(unsigned long *)(pointer)info->ringReadPtr);
 
     if (drmAddMap(info->drmFD, info->bufStart, info->bufMapSize,
 		  DRM_SCATTER_GATHER, 0, &info->bufHandle) < 0) {
@@ -1030,11 +977,10 @@ static Bool RADEONDRIPciInit(RADEONInfoPtr info, ScreenPtr pScreen)
 	       (unsigned long)info->buf);
     xf86DrvMsg(pScreen->myNum, X_INFO,
 	       "[pci] Vertex/indirect buffers contents 0x%08lx\n",
-	       *(unsigned long *)info->buf);
+	       *(unsigned long *)(pointer)info->buf);
 
     return TRUE;
 }
-#endif
 
 /* Add a map for the MMIO registers that will be accessed by any
  * DRI-based clients.
@@ -1060,6 +1006,15 @@ static int RADEONDRIKernelInit(RADEONInfoPtr info, ScreenPtr pScreen)
     int            cpp   = info->CurrentLayout.pixel_bytes;
     drmRadeonInit  drmInfo;
 
+    memset(&drmInfo, 0, sizeof(drmRadeonInit));
+
+    if ( (info->ChipFamily == CHIP_FAMILY_R200) ||
+		 (info->ChipFamily == CHIP_FAMILY_RV250) ||
+		 (info->ChipFamily == CHIP_FAMILY_M9) )
+       drmInfo.func             = DRM_RADEON_INIT_R200_CP;
+    else
+       drmInfo.func             = DRM_RADEON_INIT_CP;
+
     drmInfo.sarea_priv_offset   = sizeof(XF86DRISAREARec);
     drmInfo.is_pci              = info->IsPCI;
     drmInfo.cp_mode             = info->CPMode;
@@ -1077,16 +1032,18 @@ static int RADEONDRIKernelInit(RADEONInfoPtr info, ScreenPtr pScreen)
     drmInfo.depth_offset        = info->depthOffset;
     drmInfo.depth_pitch         = info->depthPitch * cpp;
 
-    drmInfo.fb_offset           = info->LinearAddr;
+    drmInfo.fb_offset           = info->fbHandle;
     drmInfo.mmio_offset         = info->registerHandle;
     drmInfo.ring_offset         = info->ringHandle;
     drmInfo.ring_rptr_offset    = info->ringReadPtrHandle;
     drmInfo.buffers_offset      = info->bufHandle;
     drmInfo.agp_textures_offset = info->agpTexHandle;
 
-    if (drmRadeonInitCP(info->drmFD, &drmInfo) < 0) return FALSE;
+    if (drmCommandWrite(info->drmFD, DRM_RADEON_CP_INIT,
+			&drmInfo, sizeof(drmRadeonInit)) < 0)
+	return FALSE;
 
-    /* drmRadeonInitCP does an engine reset, which resets some engine
+    /* DRM_RADEON_CP_INIT does an engine reset, which resets some engine
      * registers back to their default values, so we need to restore
      * those engine register here.
      */
@@ -1095,6 +1052,32 @@ static int RADEONDRIKernelInit(RADEONInfoPtr info, ScreenPtr pScreen)
     return TRUE;
 }
 
+static void RADEONDRIAgpHeapInit(RADEONInfoPtr info, ScreenPtr pScreen)
+{
+    drmRadeonMemInitHeap drmHeap;
+
+    /* Start up the simple memory manager for agp space */
+    if (info->drmMinor >= 6) {
+	drmHeap.region = RADEON_MEM_REGION_AGP;
+	drmHeap.start  = 0;
+	drmHeap.size   = info->agpTexMapSize;
+    
+	if (drmCommandWrite(info->drmFD, DRM_RADEON_INIT_HEAP,
+			    &drmHeap, sizeof(drmHeap))) {
+	    xf86DrvMsg(pScreen->myNum, X_ERROR,
+		       "[drm] Failed to initialized agp heap manager\n");
+	} else {
+	    xf86DrvMsg(pScreen->myNum, X_INFO,
+		       "[drm] Initialized kernel agp heap manager, %d\n",
+		       info->agpTexMapSize);
+	}
+    } else {
+	xf86DrvMsg(pScreen->myNum, X_INFO,
+		   "[drm] Kernel module too old (1.%d) for agp heap manager\n",
+		   info->drmMinor);
+    }
+}
+
 /* Add a map for the vertex buffers that will be accessed by any
  * DRI-based clients.
  */
@@ -1102,15 +1085,11 @@ static Bool RADEONDRIBufInit(RADEONInfoPtr info, ScreenPtr pScreen)
 {
 				/* Initialize vertex buffers */
     if (info->IsPCI) {
-#if !defined(PCIGART_ENABLED)
-	return TRUE;
-#else
 	info->bufNumBufs = drmAddBufs(info->drmFD,
 				      info->bufMapSize / RADEON_BUFFER_SIZE,
 				      RADEON_BUFFER_SIZE,
 				      DRM_SG_BUFFER,
 				      info->bufStart);
-#endif
     } else {
 	info->bufNumBufs = drmAddBufs(info->drmFD,
 				      info->bufMapSize / RADEON_BUFFER_SIZE,
@@ -1139,6 +1118,36 @@ static Bool RADEONDRIBufInit(RADEONInfoPtr info, ScreenPtr pScreen)
     return TRUE;
 }
 
+static void RADEONDRIIrqInit(RADEONInfoPtr info, ScreenPtr pScreen)
+{
+    ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
+
+    if (!info->irq) {
+	info->irq = drmGetInterruptFromBusID(
+	    info->drmFD,
+	    ((pciConfigPtr)info->PciInfo->thisCard)->busnum,
+	    ((pciConfigPtr)info->PciInfo->thisCard)->devnum,
+	    ((pciConfigPtr)info->PciInfo->thisCard)->funcnum);
+
+	if ((drmCtlInstHandler(info->drmFD, info->irq)) != 0) {
+	    xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+		       "[drm] failure adding irq handler, "
+		       "there is a device already using that irq\n"
+		       "[drm] falling back to irq-free operation\n");
+	    info->irq = 0;
+	} else {
+	    unsigned char *RADEONMMIO = info->MMIO;
+	    info->ModeReg.gen_int_cntl = INREG( RADEON_GEN_INT_CNTL );
+	}
+    }
+
+    if (info->irq)
+	xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+		   "[drm] dma control initialized, using IRQ %d\n",
+		   info->irq);
+}
+
+
 /* Initialize the CP state, and start the CP (if used by the X server) */
 static void RADEONDRICPInit(ScrnInfoPtr pScrn)
 {
@@ -1152,196 +1161,6 @@ static void RADEONDRICPInit(ScrnInfoPtr pScrn)
     RADEONSelectBuffer(pScrn, RADEON_FRONT);
 }
 
-/* Initialize the DRI specific hardware state stored in the SAREA.
- * Currently, this involves setting up the 3D hardware state.
- */
-static void RADEONDRISAREAInit(ScreenPtr pScreen,
-			       RADEONSAREAPrivPtr pSAREAPriv)
-{
-    ScrnInfoPtr            pScrn = xf86Screens[pScreen->myNum];
-    RADEONInfoPtr          info  = RADEONPTR(pScrn);
-    radeon_context_regs_t *ctx;
-    radeon_texture_regs_t *tex;
-    CARD32                 color_fmt, depth_fmt;
-    int                    i;
-
-    switch (info->CurrentLayout.pixel_code) {
-    case 16:
-	color_fmt = RADEON_COLOR_FORMAT_RGB565;
-	depth_fmt = RADEON_DEPTH_FORMAT_16BIT_INT_Z;
-	break;
-
-    case 32:
-	color_fmt = RADEON_COLOR_FORMAT_ARGB8888;
-	depth_fmt = RADEON_DEPTH_FORMAT_24BIT_INT_Z;
-	break;
-
-    default:
-	xf86DrvMsg(pScreen->myNum, X_ERROR,
-		   "[dri] RADEONDRISAREAInit failed: Unsupported depth "
-		   "(%d bpp).  Disabling DRI.\n",
-		   info->CurrentLayout.pixel_code);
-	return;
-    }
-
-    /* Initialize the context state */
-    ctx = &pSAREAPriv->ContextState;
-
-    ctx->pp_misc = (RADEON_ALPHA_TEST_PASS |
-		    RADEON_CHROMA_FUNC_FAIL |
-		    RADEON_CHROMA_KEY_NEAREST |
-		    RADEON_SHADOW_FUNC_EQUAL |
-		    RADEON_SHADOW_PASS_1 |
-		    RADEON_RIGHT_HAND_CUBE_OGL);
-
-    ctx->pp_fog_color = ((0x00000000 & RADEON_FOG_COLOR_MASK) |
-			 RADEON_FOG_VERTEX |
-			 RADEON_FOG_USE_DEPTH);
-
-    ctx->re_solid_color = 0x00000000;
-
-    ctx->rb3d_blendcntl = (RADEON_SRC_BLEND_GL_ONE |
-			   RADEON_DST_BLEND_GL_ZERO );
-
-    ctx->rb3d_depthoffset = info->depthOffset;
-
-    ctx->rb3d_depthpitch = ((info->depthPitch & RADEON_DEPTHPITCH_MASK) |
-			    RADEON_DEPTH_ENDIAN_NO_SWAP);
-
-    ctx->rb3d_zstencilcntl = (depth_fmt |
-			      RADEON_Z_TEST_LESS |
-			      RADEON_STENCIL_TEST_ALWAYS |
-			      RADEON_STENCIL_FAIL_KEEP |
-			      RADEON_STENCIL_ZPASS_KEEP |
-			      RADEON_STENCIL_ZFAIL_KEEP |
-			      RADEON_Z_WRITE_ENABLE);
-
-    ctx->pp_cntl = (RADEON_SCISSOR_ENABLE |
-		    RADEON_ANTI_ALIAS_NONE);
-
-    ctx->rb3d_cntl = (RADEON_PLANE_MASK_ENABLE |
-		      color_fmt |
-		      RADEON_ZBLOCK16);
-
-    ctx->rb3d_coloroffset = (info->backOffset & RADEON_COLOROFFSET_MASK);
-
-    ctx->re_width_height = ((0x7ff << RADEON_RE_WIDTH_SHIFT) |
-			    (0x7ff << RADEON_RE_HEIGHT_SHIFT));
-
-    ctx->rb3d_colorpitch = ((info->backPitch & RADEON_COLORPITCH_MASK) |
-			    RADEON_COLOR_ENDIAN_NO_SWAP);
-
-    ctx->se_cntl = (RADEON_FFACE_CULL_CW |
-		    RADEON_BFACE_SOLID |
-		    RADEON_FFACE_SOLID |
-		    RADEON_FLAT_SHADE_VTX_LAST |
-		    RADEON_DIFFUSE_SHADE_GOURAUD |
-		    RADEON_ALPHA_SHADE_GOURAUD |
-		    RADEON_SPECULAR_SHADE_GOURAUD |
-		    RADEON_FOG_SHADE_GOURAUD |
-		    RADEON_VPORT_XY_XFORM_ENABLE |
-		    RADEON_VTX_PIX_CENTER_OGL |
-		    RADEON_ROUND_MODE_TRUNC |
-		    RADEON_ROUND_PREC_8TH_PIX);
-
-    ctx->se_coord_fmt = (RADEON_VTX_XY_PRE_MULT_1_OVER_W0 |
-			 RADEON_VTX_Z_PRE_MULT_1_OVER_W0 |
-			 RADEON_TEX1_W_ROUTING_USE_Q1);
-
-    ctx->re_line_pattern = ((0x0000 & RADEON_LINE_PATTERN_MASK) |
-			    (0 << RADEON_LINE_REPEAT_COUNT_SHIFT) |
-			    (0 << RADEON_LINE_PATTERN_START_SHIFT) |
-			    RADEON_LINE_PATTERN_LITTLE_BIT_ORDER);
-
-    ctx->re_line_state = ((0 << RADEON_LINE_CURRENT_PTR_SHIFT) |
-			  (0 << RADEON_LINE_CURRENT_COUNT_SHIFT));
-
-    ctx->se_line_width = 0x0000000;
-
-    ctx->pp_lum_matrix = 0x00000000;
-
-    ctx->pp_rot_matrix_0 = 0x00000000;
-    ctx->pp_rot_matrix_1 = 0x00000000;
-
-    ctx->rb3d_stencilrefmask =
-	(CARD32)((0x000 << RADEON_STENCIL_REF_SHIFT) |
-		 (0x0ff << RADEON_STENCIL_MASK_SHIFT) |
-		 (0x0ff << RADEON_STENCIL_WRITEMASK_SHIFT));
-
-    ctx->rb3d_ropcntl   = 0x00000000;
-    ctx->rb3d_planemask = 0xffffffff;
-
-    ctx->se_vport_xscale  = 0x00000000;
-    ctx->se_vport_xoffset = 0x00000000;
-    ctx->se_vport_yscale  = 0x00000000;
-    ctx->se_vport_yoffset = 0x00000000;
-    ctx->se_vport_zscale  = 0x00000000;
-    ctx->se_vport_zoffset = 0x00000000;
-
-    ctx->se_cntl_status = (RADEON_VC_NO_SWAP |
-			   RADEON_TCL_BYPASS);
-
-#ifdef TCL_ENABLE
-   /* FIXME: Obviously these need to be properly initialized */
-    ctx->se_tcl_material_emmissive.red   = 0x00000000;
-    ctx->se_tcl_material_emmissive.green = 0x00000000;
-    ctx->se_tcl_material_emmissive.blue  = 0x00000000;
-    ctx->se_tcl_material_emmissive.alpha = 0x00000000;
-
-    ctx->se_tcl_material_ambient.red     = 0x00000000;
-    ctx->se_tcl_material_ambient.green   = 0x00000000;
-    ctx->se_tcl_material_ambient.blue    = 0x00000000;
-    ctx->se_tcl_material_ambient.alpha   = 0x00000000;
-
-    ctx->se_tcl_material_diffuse.red     = 0x00000000;
-    ctx->se_tcl_material_diffuse.green   = 0x00000000;
-    ctx->se_tcl_material_diffuse.blue    = 0x00000000;
-    ctx->se_tcl_material_diffuse.alpha   = 0x00000000;
-
-    ctx->se_tcl_material_specular.red    = 0x00000000;
-    ctx->se_tcl_material_specular.green  = 0x00000000;
-    ctx->se_tcl_material_specular.blue   = 0x00000000;
-    ctx->se_tcl_material_specular.alpha  = 0x00000000;
-
-    ctx->se_tcl_shininess                = 0x00000000;
-    ctx->se_tcl_output_vtx_fmt           = 0x00000000;
-    ctx->se_tcl_output_vtx_sel           = 0x00000000;
-    ctx->se_tcl_matrix_select_0          = 0x00000000;
-    ctx->se_tcl_matrix_select_1          = 0x00000000;
-    ctx->se_tcl_ucp_vert_blend_ctl       = 0x00000000;
-    ctx->se_tcl_texture_proc_ctl         = 0x00000000;
-    ctx->se_tcl_light_model_ctl          = 0x00000000;
-    for ( i = 0 ; i < 4 ; i++ ) {
-	ctx->se_tcl_per_light_ctl[i]     = 0x00000000;
-    }
-#endif
-
-    ctx->re_top_left = ((0 << RADEON_RE_LEFT_SHIFT) |
-			(0 << RADEON_RE_TOP_SHIFT) );
-
-    ctx->re_misc = ((0 << RADEON_STIPPLE_X_OFFSET_SHIFT) |
-		    (0 << RADEON_STIPPLE_Y_OFFSET_SHIFT) |
-		    RADEON_STIPPLE_LITTLE_BIT_ORDER);
-
-    /* Initialize the texture state */
-    for (i = 0; i < RADEON_MAX_TEXTURE_UNITS; i++) {
-	tex = &pSAREAPriv->TexState[i];
-
-	tex->pp_txfilter     = 0x00000000;
-	tex->pp_txformat     = 0x00000000;
-	tex->pp_txoffset     = 0x00000000;
-	tex->pp_txcblend     = 0x00000000;
-	tex->pp_txablend     = 0x00000000;
-	tex->pp_tfactor      = 0x00000000;
-	tex->pp_border_color = 0x00000000;
-    }
-
-    /* Mark the context as dirty */
-    pSAREAPriv->dirty    = RADEON_UPLOAD_ALL;
-
-    /* Mark the X server as the last context owner */
-    pSAREAPriv->ctxOwner = DRIGetContext(pScreen);
-}
 
 /* Initialize the screen-specific data structures for the DRI and the
  * Radeon.  This is the main entry point to the device-specific
@@ -1406,7 +1225,15 @@ Bool RADEONDRIScreenInit(ScreenPtr pScreen)
 
     info->pDRIInfo                       = pDRIInfo;
     pDRIInfo->drmDriverName              = RADEON_DRIVER_NAME;
-    pDRIInfo->clientDriverName           = RADEON_DRIVER_NAME;
+
+    if (info->ChipFamily == CHIP_FAMILY_R200)
+       pDRIInfo->clientDriverName        = R200_DRIVER_NAME;
+	else if ((info->ChipFamily == CHIP_FAMILY_RV250) ||
+			 (info->ChipFamily == CHIP_FAMILY_M9))
+       pDRIInfo->clientDriverName        = RV250_DRIVER_NAME;
+    else 
+       pDRIInfo->clientDriverName        = RADEON_DRIVER_NAME;
+
     pDRIInfo->busIdString                = xalloc(64);
     sprintf(pDRIInfo->busIdString,
 	    "PCI:%d:%d:%d",
@@ -1425,6 +1252,7 @@ Bool RADEONDRIScreenInit(ScreenPtr pScreen)
 					    < RADEON_MAX_DRAWABLES
 					    ? SAREA_MAX_DRAWABLES
 					    : RADEON_MAX_DRAWABLES);
+
 #ifdef PER_CONTEXT_SAREA
     /* This is only here for testing per-context SAREAs.  When used, the
        magic number below would be properly defined in a header file. */
@@ -1442,7 +1270,7 @@ Bool RADEONDRIScreenInit(ScreenPtr pScreen)
     /* For now the mapping works by using a fixed size defined
      * in the SAREA header
      */
-    if (sizeof(XF86DRISAREARec)+sizeof(RADEONSAREAPriv)>SAREA_MAX) {
+    if (sizeof(XF86DRISAREARec)+sizeof(RADEONSAREAPriv) > SAREA_MAX) {
 	ErrorF("Data does not fit in SAREA\n");
 	return FALSE;
     }
@@ -1464,6 +1292,12 @@ Bool RADEONDRIScreenInit(ScreenPtr pScreen)
     pDRIInfo->InitBuffers    = RADEONDRIInitBuffers;
     pDRIInfo->MoveBuffers    = RADEONDRIMoveBuffers;
     pDRIInfo->bufferRequests = DRI_ALL_WINDOWS;
+    pDRIInfo->OpenFullScreen = RADEONDRIOpenFullScreen;
+    pDRIInfo->CloseFullScreen = RADEONDRICloseFullScreen;
+    pDRIInfo->TransitionTo2d = RADEONDRITransitionTo2d;
+    pDRIInfo->TransitionTo3d = RADEONDRITransitionTo3d;
+    pDRIInfo->TransitionSingleToMulti3D = RADEONDRITransitionSingleToMulti3d;
+    pDRIInfo->TransitionMultiToSingle3D = RADEONDRITransitionMultiToSingle3d;
 
     pDRIInfo->createDummyCtx     = TRUE;
     pDRIInfo->createDummyCtxPriv = FALSE;
@@ -1478,17 +1312,32 @@ Bool RADEONDRIScreenInit(ScreenPtr pScreen)
 	return FALSE;
     }
 
-    /* Check the radeon DRM version */
-    version = drmGetVersion(info->drmFD);
+    /* Check the DRM lib version.
+     * drmGetLibVersion was not supported in version 1.0, so check for
+     * symbol first to avoid possible crash or hang.
+     */
+    if (xf86LoaderCheckSymbol("drmGetLibVersion")) {
+	version = drmGetLibVersion(info->drmFD);
+    } else {
+	/* drmlib version 1.0.0 didn't have the drmGetLibVersion
+	 * entry point.  Fake it by allocating a version record
+	 * via drmGetVersion and changing it to version 1.0.0.
+	 */
+	version = drmGetVersion(info->drmFD);
+	version->version_major      = 1;
+	version->version_minor      = 0;
+	version->version_patchlevel = 0;
+    }
+
     if (version) {
 	if (version->version_major != 1 ||
 	    version->version_minor < 1) {
-	    /* Incompatible drm version */
+	    /* incompatible drm library version */
 	    xf86DrvMsg(pScreen->myNum, X_ERROR,
 		       "[dri] RADEONDRIScreenInit failed because of a "
 		       "version mismatch.\n"
-		       "[dri] radeon.o kernel module version is %d.%d.%d "
-		       "but version 1.1.x is needed.\n"
+		       "[dri] libdrm.a module version is %d.%d.%d but "
+		       "version 1.1.x is needed.\n"
 		       "[dri] Disabling DRI.\n",
 		       version->version_major,
 		       version->version_minor,
@@ -1500,30 +1349,76 @@ Bool RADEONDRIScreenInit(ScreenPtr pScreen)
 	drmFreeVersion(version);
     }
 
-#if !defined(PCIGART_ENABLED)
-				/* Initialize AGP */
-    if (!info->IsPCI && !RADEONDRIAgpInit(info, pScreen)) {
-	RADEONDRICloseScreen(pScreen);
-	return FALSE;
-    }
+    /* Check the radeon DRM version */
+    version = drmGetVersion(info->drmFD);
+    if (version) {
+	int req_minor, req_patch;
+
+   	if ((info->ChipFamily == CHIP_FAMILY_R200) ||
+		(info->ChipFamily == CHIP_FAMILY_RV250) ||
+		(info->ChipFamily == CHIP_FAMILY_M9)) {
+	    req_minor = 5;
+	    req_patch = 0;	
+	} else {
+#if X_BYTE_ORDER == X_LITTLE_ENDIAN
+	    req_minor = 1;
+	    req_patch = 0;
+#else
+	    req_minor = 2;
+	    req_patch = 1;	     
+#endif
+	}
 
-				/* Initialize PCI */
-    if (info->IsPCI) {
-	xf86DrvMsg(pScreen->myNum, X_ERROR, "[dri] PCI cards not yet "
-		   "supported.  Disabling DRI.\n");
-	RADEONDRICloseScreen(pScreen);
-	return FALSE;
+	if (version->version_major != 1 ||
+	    version->version_minor < req_minor ||
+	    (version->version_minor == req_minor && 
+	     version->version_patchlevel < req_patch)) {
+	    /* Incompatible drm version */
+	    xf86DrvMsg(pScreen->myNum, X_ERROR,
+		       "[dri] RADEONDRIScreenInit failed because of a version "
+		       "mismatch.\n"
+		       "[dri] radeon.o kernel module version is %d.%d.%d "
+		       "but version 1.%d.%d or newer is needed.\n"
+		       "[dri] Disabling DRI.\n",
+		       version->version_major,
+		       version->version_minor,
+		       version->version_patchlevel,
+		       req_minor,
+		       req_patch);
+	    drmFreeVersion(version);
+	    RADEONDRICloseScreen(pScreen);
+	    return FALSE;
+	}
+
+	if (version->version_minor < 3) {
+	    xf86DrvMsg(pScreen->myNum, X_WARNING,
+		       "[dri] Some DRI features disabled because of version "
+		       "mismatch.\n"
+		       "[dri] radeon.o kernel module version is %d.%d.%d but "
+		       "1.3.1 or later is preferred.\n",
+		       version->version_major,
+		       version->version_minor,
+		       version->version_patchlevel);
+	}
+	info->drmMinor = version->version_minor;
+	drmFreeVersion(version);
     }
-#else
+
 				/* Initialize AGP */
     if (!info->IsPCI && !RADEONDRIAgpInit(info, pScreen)) {
+#if defined(__alpha__) || defined(__powerpc__)
 	info->IsPCI = TRUE;
 	xf86DrvMsg(pScreen->myNum, X_WARNING,
 		   "[agp] AGP failed to initialize "
 		   "-- falling back to PCI mode.\n");
 	xf86DrvMsg(pScreen->myNum, X_WARNING,
-		   "[agp] Make sure you have the agpgart kernel module "
-		   "loaded.\n");
+		   "[agp] If this is an AGP card, you may want to make sure "
+		   "the agpgart\nkernel module is loaded before the radeon "
+		   "kernel module.\n");
+#else
+	RADEONDRICloseScreen(pScreen);
+	return FALSE;
+#endif
     }
 
 				/* Initialize PCI */
@@ -1531,7 +1426,6 @@ Bool RADEONDRIScreenInit(ScreenPtr pScreen)
 	RADEONDRICloseScreen(pScreen);
 	return FALSE;
     }
-#endif
 
 				/* DRIScreenInit doesn't add all the
 				 * common mappings.  Add additional
@@ -1542,6 +1436,18 @@ Bool RADEONDRIScreenInit(ScreenPtr pScreen)
 	return FALSE;
     }
 
+				/* DRIScreenInit adds the frame buffer
+				   map, but we need it as well */
+    {
+	void *scratch_ptr;
+        int scratch_int;
+	
+	DRIGetDeviceInfo(pScreen, &info->fbHandle,
+                         &scratch_int, &scratch_int, 
+                         &scratch_int, &scratch_int,
+                         &scratch_ptr);
+    }
+
 				/* FIXME: When are these mappings unmapped? */
 
     if (!RADEONInitVisualConfigs(pScreen)) {
@@ -1589,6 +1495,12 @@ Bool RADEONDRIFinishScreenInit(ScreenPtr pScreen)
 	return FALSE;
     }
 
+    /* Initialize IRQ */
+    RADEONDRIIrqInit(info, pScreen);
+
+    /* Initialize kernel agp memory manager */
+    RADEONDRIAgpHeapInit(info, pScreen);
+
     /* Initialize and start the CP if required */
     RADEONDRICPInit(pScrn);
 
@@ -1596,8 +1508,6 @@ Bool RADEONDRIFinishScreenInit(ScreenPtr pScreen)
     pSAREAPriv = (RADEONSAREAPrivPtr)DRIGetSAREAPrivate(pScreen);
     memset(pSAREAPriv, 0, sizeof(*pSAREAPriv));
 
-    RADEONDRISAREAInit(pScreen, pSAREAPriv);
-
     pRADEONDRI                    = (RADEONDRIPtr)info->pDRIInfo->devPrivate;
 
     pRADEONDRI->deviceID          = info->Chipset;
@@ -1637,6 +1547,13 @@ Bool RADEONDRIFinishScreenInit(ScreenPtr pScreen)
     pRADEONDRI->perctx_sarea_size = info->perctx_sarea_size;
 #endif
 
+    /* Have shadowfb run only while there is 3d active. */
+    if (info->allowPageFlip /* && info->drmMinor >= 3 */) {
+	ShadowFBInit( pScreen, RADEONDRIRefreshArea );
+    } else {
+       info->allowPageFlip = 0;
+    }
+
     return TRUE;
 }
 
@@ -1645,13 +1562,30 @@ Bool RADEONDRIFinishScreenInit(ScreenPtr pScreen)
  */
 void RADEONDRICloseScreen(ScreenPtr pScreen)
 {
-    ScrnInfoPtr   pScrn = xf86Screens[pScreen->myNum];
-    RADEONInfoPtr info  = RADEONPTR(pScrn);
+    ScrnInfoPtr    pScrn = xf86Screens[pScreen->myNum];
+    RADEONInfoPtr  info  = RADEONPTR(pScrn);
+    drmRadeonInit  drmInfo;
+    RING_LOCALS;
 
 				/* Stop the CP */
     if (info->directRenderingEnabled) {
-	if (info->CPStarted) RADEONCP_STOP(pScrn, info);
-	else                 DRIUnlock(pScreen);
+	/* If we've generated any CP commands, we must flush them to the
+	 * kernel module now.
+	 */
+	if (info->CPInUse) {
+	    RADEON_FLUSH_CACHE();
+	    RADEON_WAIT_UNTIL_IDLE();
+	    RADEONCPReleaseIndirect(pScrn);
+
+	    info->CPInUse = FALSE;
+	}
+	RADEONCP_STOP(pScrn, info);
+    }
+
+    if (info->irq) {
+	drmCtlUninstHandler(info->drmFD);
+	info->irq = 0;
+	info->ModeReg.gen_int_cntl = 0;
     }
 
 				/* De-allocate vertex buffers */
@@ -1661,7 +1595,10 @@ void RADEONDRICloseScreen(ScreenPtr pScreen)
     }
 
 				/* De-allocate all kernel resources */
-    drmRadeonCleanupCP(info->drmFD);
+    memset(&drmInfo, 0, sizeof(drmRadeonInit));
+    drmInfo.func = DRM_RADEON_CLEANUP_CP;
+    drmCommandWrite(info->drmFD, DRM_RADEON_CP_INIT,
+		    &drmInfo, sizeof(drmRadeonInit));
 
 				/* De-allocate all AGP resources */
     if (info->agpTex) {
@@ -1712,3 +1649,213 @@ void RADEONDRICloseScreen(ScreenPtr pScreen)
 	info->pVisualConfigsPriv = NULL;
     }
 }
+
+
+
+/* Fullscreen hooks.  The DRI fullscreen mode can probably be removed as
+ * it adds little or nothing above the mechanism below (and isn't widely
+ * used).
+ */
+static Bool RADEONDRIOpenFullScreen(ScreenPtr pScreen)
+{
+    return TRUE;
+}
+
+static Bool RADEONDRICloseFullScreen(ScreenPtr pScreen)
+{
+    return TRUE;
+}
+
+
+
+/* Use callbacks from dri.c to support pageflipping mode for a single
+ * 3d context without need for any specific full-screen extension.
+ *
+ * Also use these callbacks to allocate and free 3d-specific memory on
+ * demand.
+ */
+
+
+/* Use the shadowfb module to maintain a list of dirty rectangles.
+ * These are blitted to the back buffer to keep both buffers clean
+ * during page-flipping when the 3d application isn't fullscreen.
+ *
+ * Unlike most use of the shadowfb code, both buffers are in video memory.
+ *
+ * An alternative to this would be to organize for all on-screen drawing
+ * operations to be duplicated for the two buffers.  That might be
+ * faster, but seems like a lot more work...
+ */
+
+
+static void RADEONDRIRefreshArea(ScrnInfoPtr pScrn, int num, BoxPtr pbox)
+{
+    RADEONInfoPtr       info       = RADEONPTR(pScrn);
+    int                 i;
+    RADEONSAREAPrivPtr  pSAREAPriv = DRIGetSAREAPrivate(pScrn->pScreen);
+
+    /* Don't want to do this when no 3d is active and pages are
+     * right-way-round
+     */
+    if (!pSAREAPriv->pfAllowPageFlip && pSAREAPriv->pfCurrentPage == 0)
+	return;
+
+    (*info->accel->SetupForScreenToScreenCopy)(pScrn,
+					       1, 1, GXcopy,
+					       (CARD32)(-1), -1);
+
+    for (i = 0 ; i < num ; i++, pbox++) {
+	int xa = max(pbox->x1, 0), xb = min(pbox->x2, pScrn->virtualX-1);
+	int ya = max(pbox->y1, 0), yb = min(pbox->y2, pScrn->virtualY-1);
+
+	if (xa <= xb && ya <= yb) {
+	    (*info->accel->SubsequentScreenToScreenCopy)(pScrn, xa, ya,
+							 xa + info->backX,
+							 ya + info->backY,
+							 xb - xa + 1,
+							 yb - ya + 1);
+	}
+    }
+}
+
+static void RADEONEnablePageFlip(ScreenPtr pScreen)
+{
+    ScrnInfoPtr         pScrn      = xf86Screens[pScreen->myNum];
+    RADEONInfoPtr       info       = RADEONPTR(pScrn);
+    RADEONSAREAPrivPtr  pSAREAPriv = DRIGetSAREAPrivate(pScreen);
+
+    if (info->allowPageFlip) {
+	/* Duplicate the frontbuffer to the backbuffer */
+	(*info->accel->SetupForScreenToScreenCopy)(pScrn,
+						   1, 1, GXcopy,
+						   (CARD32)(-1), -1);
+
+	(*info->accel->SubsequentScreenToScreenCopy)(pScrn,
+						     0,
+						     0,
+						     info->backX,
+						     info->backY,
+						     pScrn->virtualX,
+						     pScrn->virtualY);
+
+	pSAREAPriv->pfAllowPageFlip = 1;
+    }
+}
+
+static void RADEONDisablePageFlip(ScreenPtr pScreen)
+{
+    /* Tell the clients not to pageflip.  How?
+     *   -- Field in sarea, plus bumping the window counters.
+     *   -- DRM needs to cope with Front-to-Back swapbuffers.
+     */
+    RADEONSAREAPrivPtr  pSAREAPriv = DRIGetSAREAPrivate(pScreen);
+
+    pSAREAPriv->pfAllowPageFlip = 0;
+}
+
+static void RADEONDRITransitionSingleToMulti3d(ScreenPtr pScreen)
+{
+    RADEONDisablePageFlip(pScreen);
+}
+
+static void RADEONDRITransitionMultiToSingle3d(ScreenPtr pScreen)
+{
+    /* Let the remaining 3d app start page flipping again */
+    RADEONEnablePageFlip(pScreen);
+}
+
+static void RADEONDRITransitionTo3d(ScreenPtr pScreen)
+{
+    ScrnInfoPtr    pScrn = xf86Screens[pScreen->myNum];
+    RADEONInfoPtr  info  = RADEONPTR(pScrn);
+    FBAreaPtr      fbarea;
+    int            width, height;
+
+    /* reserve offscreen area for back and depth buffers and textures */
+
+    /* If we still have an area for the back buffer reserved, free it
+     * first so we always start with all free offscreen memory, except
+     * maybe for Xv
+     */
+    if (info->backArea) {
+	xf86FreeOffscreenArea(info->backArea);
+	info->backArea = NULL;
+    }
+
+    xf86PurgeUnlockedOffscreenAreas(pScreen);
+
+    xf86QueryLargestOffscreenArea(pScreen, &width, &height, 0, 0, 0);
+
+    /* Free Xv linear offscreen memory if necessary */
+    if (height < (info->depthTexLines + info->backLines)) {
+	xf86FreeOffscreenLinear(info->videoLinear);
+	info->videoLinear = NULL;
+	xf86QueryLargestOffscreenArea(pScreen, &width, &height, 0, 0, 0);
+    }
+
+    /* Reserve placeholder area so the other areas will match the
+     * pre-calculated offsets
+     */
+    fbarea = xf86AllocateOffscreenArea(pScreen, pScrn->displayWidth,
+				       height
+				       - info->depthTexLines
+				       - info->backLines,
+				       pScrn->displayWidth,
+				       NULL, NULL, NULL);
+    if (!fbarea)
+	xf86DrvMsg(pScreen->myNum, X_ERROR, "Unable to reserve placeholder "
+		   "offscreen area, you might experience screen corruption\n");
+
+    info->backArea = xf86AllocateOffscreenArea(pScreen, pScrn->displayWidth,
+					       info->backLines,
+					       pScrn->displayWidth,
+					       NULL, NULL, NULL);
+    if (!info->backArea)
+	xf86DrvMsg(pScreen->myNum, X_ERROR, "Unable to reserve offscreen "
+		   "area for back buffer, you might experience screen "
+		   "corruption\n");
+
+    info->depthTexArea = xf86AllocateOffscreenArea(pScreen,
+						   pScrn->displayWidth,
+						   info->depthTexLines,
+						   pScrn->displayWidth,
+						   NULL, NULL, NULL);
+    if (!info->depthTexArea)
+	xf86DrvMsg(pScreen->myNum, X_ERROR, "Unable to reserve offscreen "
+		   "area for depth buffer and textures, you might "
+		   "experience screen corruption\n");
+
+    xf86FreeOffscreenArea(fbarea);
+
+    RADEONEnablePageFlip(pScreen);
+
+    info->have3DWindows = 1;
+
+    if (info->cursor_start)
+	xf86ForceHWCursor (pScreen, TRUE);
+}
+
+static void RADEONDRITransitionTo2d(ScreenPtr pScreen)
+{
+    ScrnInfoPtr         pScrn      = xf86Screens[pScreen->myNum];
+    RADEONInfoPtr       info       = RADEONPTR(pScrn);
+    RADEONSAREAPrivPtr  pSAREAPriv = DRIGetSAREAPrivate(pScreen);
+
+    /* Shut down shadowing if we've made it back to the front page */
+    if (pSAREAPriv->pfCurrentPage == 0) {
+	RADEONDisablePageFlip(pScreen);
+	xf86FreeOffscreenArea(info->backArea);
+	info->backArea = NULL;
+    } else {
+	xf86DrvMsg(pScreen->myNum, X_WARNING,
+		   "[dri] RADEONDRITransitionTo2d: "
+		   "kernel failed to unflip buffers.\n"); 
+    }
+
+    xf86FreeOffscreenArea(info->depthTexArea); 
+
+    info->have3DWindows = 0;
+
+    if (info->cursor_start)
+	    xf86ForceHWCursor (pScreen, FALSE);
+}
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dri.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dri.h
index fbad78d60..abfcb4ef0 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dri.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dri.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dri.h,v 1.3 2002/04/24 16:20:40 martin Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dri.h,v 1.4 2002/10/30 12:52:13 alanh Exp $ */
 /*
  * Copyright 2000 ATI Technologies Inc., Markham, Ontario,
  *                VA Linux Systems Inc., Fremont, California.
@@ -38,25 +38,26 @@
 #define _RADEON_DRI_
 
 #include "xf86drm.h"
-#include "xf86drmRadeon.h"
+#include "radeon_common.h"
 
 /* DRI Driver defaults */
-#define RADEON_DEFAULT_CP_PIO_MODE  RADEON_CSQ_PRIPIO_INDPIO
-#define RADEON_DEFAULT_CP_BM_MODE   RADEON_CSQ_PRIBM_INDBM
-#define RADEON_DEFAULT_AGP_MODE     1
-#define RADEON_DEFAULT_AGP_SIZE     8 /* MB (must be a power of 2 and > 4MB) */
-#define RADEON_DEFAULT_RING_SIZE    1 /* MB (must be page aligned) */
-#define RADEON_DEFAULT_BUFFER_SIZE  2 /* MB (must be page aligned) */
-#define RADEON_DEFAULT_AGP_TEX_SIZE 1 /* MB (must be page aligned) */
+#define RADEON_DEFAULT_CP_PIO_MODE    RADEON_CSQ_PRIPIO_INDPIO
+#define RADEON_DEFAULT_CP_BM_MODE     RADEON_CSQ_PRIBM_INDBM
+#define RADEON_DEFAULT_AGP_MODE       1
+#define RADEON_DEFAULT_AGP_FAST_WRITE 0
+#define RADEON_DEFAULT_AGP_SIZE       8 /* MB (must be 2^n and > 4MB) */
+#define RADEON_DEFAULT_RING_SIZE      1 /* MB (must be page aligned) */
+#define RADEON_DEFAULT_BUFFER_SIZE    2 /* MB (must be page aligned) */
+#define RADEON_DEFAULT_AGP_TEX_SIZE   1 /* MB (must be page aligned) */
 
-#define RADEON_DEFAULT_CP_TIMEOUT   10000  /* usecs */
+#define RADEON_DEFAULT_CP_TIMEOUT     10000  /* usecs */
 
-#define RADEON_AGP_MAX_MODE         4
+#define RADEON_AGP_MAX_MODE           4
 
-#define RADEON_CARD_TYPE_RADEON     1
+#define RADEON_CARD_TYPE_RADEON       1
 
 /* Buffer are aligned on 4096 byte boundaries */
-#define RADEON_BUFFER_ALIGN         0x00000fff
+#define RADEON_BUFFER_ALIGN           0x00000fff
 
 #define RADEONCP_USE_RING_BUFFER(m)					\
     (((m) == RADEON_CSQ_PRIBM_INDDIS) ||				\
@@ -99,7 +100,7 @@ typedef struct {
     unsigned int  sarea_priv_offset;
 
 #ifdef PER_CONTEXT_SAREA
-    drmSize	  perctx_sarea_size;
+    drmSize      perctx_sarea_size;
 #endif
 } RADEONDRIRec, *RADEONDRIPtr;
 
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dripriv.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dripriv.h
index d4e4a8ce4..5f011928d 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dripriv.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dripriv.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dripriv.h,v 1.3 2002/04/24 16:20:40 martin Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dripriv.h,v 1.4 2002/10/30 12:52:13 alanh Exp $ */
 /*
  * Copyright 2000 ATI Technologies Inc., Markham, Ontario,
  *                VA Linux Systems Inc., Fremont, California.
@@ -39,7 +39,7 @@
 
 #include "GL/glxint.h"
 #include "xf86drm.h"
-#include "xf86drmRadeon.h"
+#include "radeon_common.h"
 
 #define RADEON_MAX_DRAWABLES 256
 
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_driver.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_driver.c
index 752575b4f..ae584332e 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_driver.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_driver.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_driver.c,v 1.67 2002/10/16 04:53:15 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_driver.c,v 1.91 2003/02/25 03:50:15 dawes Exp $ */
 /*
  * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and
  *                VA Linux Systems Inc., Fremont, California.
@@ -31,7 +31,7 @@
  * Authors:
  *   Kevin E. Martin <martin@xfree86.org>
  *   Rickard E. Faith <faith@valinux.com>
- *   Alan Hourihane <ahourihane@valinux.com>
+ *   Alan Hourihane <alanh@fairlite.demon.co.uk>
  *
  * Credits:
  *
@@ -51,7 +51,8 @@
  *
  * This server does not yet support these XFree86 4.0 features:
  * !!!! FIXME !!!!
- *   shadowfb
+ *   DDC1 & DDC2
+ *   shadowfb (Note: dri uses shadowfb for another purpose in radeon_dri.c)
  *   overlay planes
  *
  * Modified by Marc Aurele La France (tsi@xfree86.org) for ATI driver merge.
@@ -59,6 +60,7 @@
 
 				/* Driver data structures */
 #include "radeon.h"
+#include "radeon_macros.h"
 #include "radeon_probe.h"
 #include "radeon_reg.h"
 #include "radeon_version.h"
@@ -122,13 +124,15 @@ typedef enum {
 #ifdef XF86DRI
     OPTION_IS_PCI,
     OPTION_CP_PIO,
-    OPTION_NO_SECURITY,
     OPTION_USEC_TIMEOUT,
     OPTION_AGP_MODE,
+    OPTION_AGP_FW,
     OPTION_AGP_SIZE,
     OPTION_RING_SIZE,
     OPTION_BUFFER_SIZE,
     OPTION_DEPTH_MOVE,
+    OPTION_PAGE_FLIP,
+    OPTION_NO_BACKBUFFER,
 #endif
     OPTION_PANEL_OFF,
     OPTION_DDC_MODE,
@@ -150,10 +154,13 @@ const OptionInfoRec RADEONOptions[] = {
     { OPTION_CP_PIO,         "CPPIOMode",        OPTV_BOOLEAN, {0}, FALSE },
     { OPTION_USEC_TIMEOUT,   "CPusecTimeout",    OPTV_INTEGER, {0}, FALSE },
     { OPTION_AGP_MODE,       "AGPMode",          OPTV_INTEGER, {0}, FALSE },
+    { OPTION_AGP_FW,         "AGPFastWrite",     OPTV_BOOLEAN, {0}, FALSE },
     { OPTION_AGP_SIZE,       "AGPSize",          OPTV_INTEGER, {0}, FALSE },
     { OPTION_RING_SIZE,      "RingSize",         OPTV_INTEGER, {0}, FALSE },
     { OPTION_BUFFER_SIZE,    "BufferSize",       OPTV_INTEGER, {0}, FALSE },
     { OPTION_DEPTH_MOVE,     "EnableDepthMoves", OPTV_BOOLEAN, {0}, FALSE },
+    { OPTION_PAGE_FLIP,      "EnablePageFlip",   OPTV_BOOLEAN, {0}, FALSE },
+    { OPTION_NO_BACKBUFFER,  "NoBackBuffer",     OPTV_BOOLEAN, {0}, FALSE },
 #endif
     { OPTION_PANEL_OFF,      "PanelOff",         OPTV_BOOLEAN, {0}, FALSE },
     { OPTION_DDC_MODE,       "DDCMode",          OPTV_BOOLEAN, {0}, FALSE },
@@ -252,16 +259,21 @@ static const char *xf8_32bppSymbols[] = {
 static const char *ramdacSymbols[] = {
     "xf86CreateCursorInfoRec",
     "xf86DestroyCursorInfoRec",
+    "xf86ForceHWCursor",
     "xf86InitCursor",
     NULL
 };
 
 #ifdef XF86DRI
 static const char *drmSymbols[] = {
+    "drmGetInterruptFromBusID",
+    "drmCtlInstHandler",
+    "drmCtlUninstHandler",
     "drmAddBufs",
     "drmAddMap",
     "drmAgpAcquire",
     "drmAgpAlloc",
+    "drmAgpBase",
     "drmAgpBind",
     "drmAgpDeviceId",
     "drmAgpEnable",
@@ -270,8 +282,13 @@ static const char *drmSymbols[] = {
     "drmAgpRelease",
     "drmAgpUnbind",
     "drmAgpVendorId",
+    "drmCommandNone",
+    "drmCommandRead",
+    "drmCommandWrite",
+    "drmCommandWriteRead",
     "drmDMA",
     "drmFreeVersion",
+    "drmGetLibVersion",
     "drmGetVersion",
     "drmMap",
     "drmMapBufs",
@@ -283,6 +300,7 @@ static const char *drmSymbols[] = {
     "drmRadeonStartCP",
     "drmRadeonStopCP",
     "drmRadeonWaitForIdleCP",
+    "drmScatterGatherAlloc",
     "drmScatterGatherFree",
     "drmUnmap",
     "drmUnmapBufs",
@@ -295,6 +313,7 @@ static const char *driSymbols[] = {
     "DRIDestroyInfoRec",
     "DRIFinishScreenInit",
     "DRIGetContext",
+    "DRIGetDeviceInfo",
     "DRIGetSAREAPrivate",
     "DRILock",
     "DRIQueryVersion",
@@ -303,6 +322,11 @@ static const char *driSymbols[] = {
     "GlxSetVisualConfigs",
     NULL
 };
+
+static const char *driShadowFBSymbols[] = {
+    "ShadowFBInit",
+    NULL
+};
 #endif
 
 static const char *vbeSymbols[] = {
@@ -344,13 +368,13 @@ void RADEONLoaderRefSymLists(void)
 #ifdef XF86DRI
 			  drmSymbols,
 			  driSymbols,
+			  driShadowFBSymbols,
 #endif
 			  fbdevHWSymbols,
 			  vbeSymbols,
 			  int10Symbols,
+			  i2cSymbols,
 			  ddcSymbols,
-			  /* i2csymbols, */
-			  /* shadowSymbols, */
 			  NULL);
 }
 
@@ -381,16 +405,23 @@ static struct
 
 extern int gRADEONEntityIndex;
 
-#if !defined(__alpha__)
-# define RADEONPreInt10Save(s, r1, r2)
-# define RADEONPostInt10Check(s, r1, r2)
-#else /* __alpha__ */
+struct RADEONInt10Save {
+	CARD32 MEM_CNTL;
+	CARD32 MEMSIZE;
+	CARD32 MPP_TB_CONFIG;
+};
+
+static Bool RADEONMapMMIO(ScrnInfoPtr pScrn);
+static Bool RADEONUnmapMMIO(ScrnInfoPtr pScrn);
+
 static void
-RADEONSaveRegsZapMemCntl(ScrnInfoPtr pScrn, CARD32 *MEM_CNTL, CARD32 *MEMSIZE)
+RADEONPreInt10Save(ScrnInfoPtr pScrn, void **pPtr)
 {
     RADEONInfoPtr  info   = RADEONPTR(pScrn);
     unsigned char *RADEONMMIO;
     int            mapped = 0;
+    CARD32 CardTmp;
+    static struct RADEONInt10Save SaveStruct = { 0, 0, 0 };
 
     /*
      * First make sure we have the pci and mmio info and that mmio is mapped
@@ -409,9 +440,19 @@ RADEONSaveRegsZapMemCntl(ScrnInfoPtr pScrn, CARD32 *MEM_CNTL, CARD32 *MEMSIZE)
     RADEONMMIO = info->MMIO;
 
     /* Save the values and zap MEM_CNTL */
-    *MEM_CNTL = INREG(RADEON_MEM_CNTL);
-    *MEMSIZE = INREG(RADEON_CONFIG_MEMSIZE);
+    SaveStruct.MEM_CNTL = INREG(RADEON_MEM_CNTL);
+    SaveStruct.MEMSIZE = INREG(RADEON_CONFIG_MEMSIZE);
+    SaveStruct.MPP_TB_CONFIG = INREG(RADEON_MPP_TB_CONFIG);
+
+    /* 
+     * Zap MEM_CNTL and set MPP_TB_CONFIG<31:24> to 4
+     */
     OUTREG(RADEON_MEM_CNTL, 0);
+    CardTmp = SaveStruct.MPP_TB_CONFIG & 0x00ffffffu;
+    CardTmp |= 0x04 << 24;
+    OUTREG(RADEON_MPP_TB_CONFIG, CardTmp);
+
+    *pPtr = (void *)&SaveStruct;
 
     /* Unmap mmio space if we mapped it */
     if (mapped)
@@ -419,15 +460,16 @@ RADEONSaveRegsZapMemCntl(ScrnInfoPtr pScrn, CARD32 *MEM_CNTL, CARD32 *MEMSIZE)
 }
 
 static void
-RADEONCheckRegs(ScrnInfoPtr pScrn, CARD32 Saved_MEM_CNTL, CARD32 Saved_MEMSIZE)
+RADEONPostInt10Check(ScrnInfoPtr pScrn, void *ptr)
 {
     RADEONInfoPtr  info   = RADEONPTR(pScrn);
     unsigned char *RADEONMMIO;
-    CARD32         MEM_CNTL;
+    struct RADEONInt10Save *pSave = ptr;
+    CARD32 CardTmp;
     int            mapped = 0;
 
     /* If we don't have a valid (non-zero) saved MEM_CNTL, get out now */
-    if (!Saved_MEM_CNTL)
+    if (!pSave || !pSave->MEM_CNTL)
 	return;
 
     /* First make sure that mmio is mapped */
@@ -442,20 +484,33 @@ RADEONCheckRegs(ScrnInfoPtr pScrn, CARD32 Saved_MEM_CNTL, CARD32 Saved_MEMSIZE)
      * two channels with the two channels configured differently), restore
      * the saved registers.
      */
-    MEM_CNTL = INREG(RADEON_MEM_CNTL);
-    if (!MEM_CNTL ||
-	((MEM_CNTL & 1) &&
-	 (((MEM_CNTL >> 8) & 0xff) != ((MEM_CNTL >> 24) & 0xff)))) {
+    CardTmp = INREG(RADEON_MEM_CNTL);
+    if (!CardTmp || 
+	((CardTmp & 1) && 
+	 (((CardTmp >> 8) & 0xff) != ((CardTmp >> 24) & 0xff)))) {
 	/* Restore the saved registers */
 	xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
 		   "Restoring MEM_CNTL (%08x), setting to %08x\n",
-		   MEM_CNTL, Saved_MEM_CNTL);
-	OUTREG(RADEON_MEM_CNTL, Saved_MEM_CNTL);
+		   CardTmp, pSave->MEM_CNTL);
+	OUTREG(RADEON_MEM_CNTL, pSave->MEM_CNTL);
+
+	CardTmp = INREG(RADEON_CONFIG_MEMSIZE);
+	if (CardTmp != pSave->MEMSIZE) {
+	    xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+		       "Restoring CONFIG_MEMSIZE (%08x), setting to %08x\n",
+		       CardTmp, pSave->MEMSIZE);
+	    OUTREG(RADEON_CONFIG_MEMSIZE, pSave->MEMSIZE);
+	}
+    }
 
+    CardTmp = INREG(RADEON_MPP_TB_CONFIG);
+    if ((CardTmp & 0xff000000u) != (pSave->MPP_TB_CONFIG & 0xff000000u)) {
 	xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
-		   "Restoring CONFIG_MEMSIZE (%08x), setting to %08x\n",
-		   INREG(RADEON_CONFIG_MEMSIZE), Saved_MEMSIZE);
-	OUTREG(RADEON_CONFIG_MEMSIZE, Saved_MEMSIZE);
+	           "Restoring MPP_TB_CONFIG<31:24> (%02x), setting to %02x\n",
+	 	   CardTmp >> 24, pSave->MPP_TB_CONFIG >> 24);
+	CardTmp &= 0x00ffffffu;
+	CardTmp |= (pSave->MPP_TB_CONFIG & 0xff000000u);
+	OUTREG(RADEON_MPP_TB_CONFIG, CardTmp);
     }
 
     /* Unmap mmio space if we mapped it */
@@ -463,12 +518,6 @@ RADEONCheckRegs(ScrnInfoPtr pScrn, CARD32 Saved_MEM_CNTL, CARD32 Saved_MEMSIZE)
 	RADEONUnmapMMIO(pScrn);
 }
 
-# define RADEONPreInt10Save(s, r1, r2)					\
-	RADEONSaveRegsZapMemCntl((s), (r1), (r2))
-# define RADEONPostInt10Check(s, r1, r2)				\
-	RADEONCheckRegs((s), (r1), (r2))
-#endif /* __alpha__ */
-
 /* Allocate our private RADEONInfoRec */
 static Bool RADEONGetRec(ScrnInfoPtr pScrn)
 {
@@ -599,8 +648,7 @@ unsigned RADEONINPLL(ScrnInfoPtr pScrn, int addr)
 
     OUTREG8(RADEON_CLOCK_CNTL_INDEX, addr & 0x3f);
     data = INREG(RADEON_CLOCK_CNTL_DATA);
-    if (info->ChipFamily == CHIP_FAMILY_R300)
-	R300CGWorkaround(pScrn);
+    if (info->R300CGWorkaround) R300CGWorkaround(pScrn);
 
     return data;
 }
@@ -617,16 +665,37 @@ static int RADEONINPAL(int idx)
 }
 #endif
 
-/* Wait for vertical sync */
+/* Wait for vertical sync on primary CRTC */
 void RADEONWaitForVerticalSync(ScrnInfoPtr pScrn)
 {
     RADEONInfoPtr  info       = RADEONPTR(pScrn);
     unsigned char *RADEONMMIO = info->MMIO;
     int            i;
 
-    OUTREG(RADEON_GEN_INT_STATUS, RADEON_VSYNC_INT_AK);
-    for (i = 0; i < RADEON_TIMEOUT; i++) {
-	if (INREG(RADEON_GEN_INT_STATUS) & RADEON_VSYNC_INT) break;
+    /* Clear the CRTC_VBLANK_SAVE bit */
+    OUTREG(RADEON_CRTC_STATUS, RADEON_CRTC_VBLANK_SAVE_CLEAR);
+
+    /* Wait for it to go back up */
+    for (i = 0; i < RADEON_TIMEOUT/1000; i++) {
+	if (INREG(RADEON_CRTC_STATUS) & RADEON_CRTC_VBLANK_SAVE) break;
+	usleep(1);
+    }
+}
+
+/* Wait for vertical sync on secondary CRTC */
+void RADEONWaitForVerticalSync2(ScrnInfoPtr pScrn)
+{
+    RADEONInfoPtr  info       = RADEONPTR(pScrn);
+    unsigned char *RADEONMMIO = info->MMIO;
+    int            i;
+
+    /* Clear the CRTC2_VBLANK_SAVE bit */
+    OUTREG(RADEON_CRTC2_STATUS, RADEON_CRTC2_VBLANK_SAVE_CLEAR);
+
+    /* Wait for it to go back up */
+    for (i = 0; i < RADEON_TIMEOUT/1000; i++) {
+	if (INREG(RADEON_CRTC2_STATUS) & RADEON_CRTC2_VBLANK_SAVE) break;
+	usleep(1);
     }
 }
 
@@ -903,23 +972,23 @@ static Bool RADEONGetBIOSParameters(ScrnInfoPtr pScrn, xf86Int10InfoPtr pInt10)
 				     &(CloneDispOption))) {
 		char *s = NULL;
 
+		if (CloneDispOption < 0 || CloneDispOption > 4) {
+		    xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+			       "Illegal CloneDisplay Option set, "
+			       "using default\n");
+		    CloneDispOption = 1;
+		}
+
 		switch (CloneDispOption) {
 		case 0: s = "Disable"; break;
 		case 1: s = "Auto-detect"; break;
 		case 2: s = "Force On"; break;
 		case 3: s = "Auto-detect -- use 2nd head overlay"; break;
 		case 4: s = "Force On -- use 2nd head overlay"; break;
-		default:
-		    xf86DrvMsg(pScrn->scrnIndex, X_INFO,
-			       "Illegal CloneDisplay Option set, "
-			       "using default\n");
-		    CloneDispOption = 1;
-		    break;
 		}
-		if (s)
-		    xf86DrvMsg(pScrn->scrnIndex, X_INFO,
-			       "CloneDisplay option: %s (%d)\n",
-			       s, CloneDispOption);
+		xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+			   "CloneDisplay option: %s (%d)\n",
+			   s, CloneDispOption);
 	    } else {
 		/* Default to auto-detect */
 		CloneDispOption = 1;
@@ -1297,16 +1366,25 @@ static Bool RADEONPreInitConfig(ScrnInfoPtr pScrn)
 	info->ChipFamily = CHIP_FAMILY_M6;
 	break;
 
-    case PCI_CHIP_RADEON_QY:
-    case PCI_CHIP_RADEON_QZ:
+    case PCI_CHIP_RV100_QY:
+    case PCI_CHIP_RV100_QZ:
 	info->ChipFamily = CHIP_FAMILY_VE;
 	break;
 
+    case PCI_CHIP_R200_BB:
+    case PCI_CHIP_R200_QH:
+    case PCI_CHIP_R200_QI:
+    case PCI_CHIP_R200_QJ:
+    case PCI_CHIP_R200_QK:
     case PCI_CHIP_R200_QL:
+    case PCI_CHIP_R200_QM:
     case PCI_CHIP_R200_QN:
     case PCI_CHIP_R200_QO:
+    case PCI_CHIP_R200_Qh:
+    case PCI_CHIP_R200_Qi:
+    case PCI_CHIP_R200_Qj:
+    case PCI_CHIP_R200_Qk:
     case PCI_CHIP_R200_Ql:
-    case PCI_CHIP_R200_BB:
 	info->ChipFamily = CHIP_FAMILY_R200;
 	break;
 
@@ -1334,6 +1412,10 @@ static Bool RADEONPreInitConfig(ScrnInfoPtr pScrn)
 	info->ChipFamily = CHIP_FAMILY_M9;
 	break;
 
+    case PCI_CHIP_R300_AD:
+    case PCI_CHIP_R300_AE:
+    case PCI_CHIP_R300_AF:
+    case PCI_CHIP_R300_AG:
     case PCI_CHIP_R300_ND:
     case PCI_CHIP_R300_NE:
     case PCI_CHIP_R300_NF:
@@ -1459,6 +1541,11 @@ static Bool RADEONPreInitConfig(ScrnInfoPtr pScrn)
 	info1->CurCloneMode = NULL;
     }
 
+    info->R300CGWorkaround =
+	(info->ChipFamily == CHIP_FAMILY_R300 &&
+	 (INREG(RADEON_CONFIG_CNTL) & RADEON_CFG_ATI_REV_ID_MASK)
+	 == RADEON_CFG_ATI_REV_A11);
+
     info->MemCntl            = INREG(RADEON_SDRAM_MODE_REG);
     info->BusCntl            = INREG(RADEON_BUS_CNTL);
     RADEONMMIO               = NULL;
@@ -1495,8 +1582,8 @@ static Bool RADEONPreInitConfig(ScrnInfoPtr pScrn)
 #if 0
 	case PCI_CHIP_RADEON_XX: info->IsPCI = TRUE;  break;
 #endif
-	case PCI_CHIP_RADEON_QY:
-	case PCI_CHIP_RADEON_QZ:
+	case PCI_CHIP_RV100_QY:
+	case PCI_CHIP_RV100_QZ:
 	case PCI_CHIP_RADEON_LW:
 	case PCI_CHIP_RADEON_LX:
 	case PCI_CHIP_RADEON_LY:
@@ -1505,12 +1592,38 @@ static Bool RADEONPreInitConfig(ScrnInfoPtr pScrn)
 	case PCI_CHIP_RADEON_QE:
 	case PCI_CHIP_RADEON_QF:
 	case PCI_CHIP_RADEON_QG:
+	case PCI_CHIP_R200_BB:
+	case PCI_CHIP_R200_QH:
+	case PCI_CHIP_R200_QI:
+	case PCI_CHIP_R200_QJ:
+	case PCI_CHIP_R200_QK:
 	case PCI_CHIP_R200_QL:
+	case PCI_CHIP_R200_QM:
 	case PCI_CHIP_R200_QN:
 	case PCI_CHIP_R200_QO:
+	case PCI_CHIP_R200_Qh:
+	case PCI_CHIP_R200_Qi:
+	case PCI_CHIP_R200_Qj:
+	case PCI_CHIP_R200_Qk:
 	case PCI_CHIP_R200_Ql:
-	case PCI_CHIP_R200_BB:
 	case PCI_CHIP_RV200_QW:
+	case PCI_CHIP_RV200_QX:
+	case PCI_CHIP_RV250_Id:
+	case PCI_CHIP_RV250_Ie:
+	case PCI_CHIP_RV250_If:
+	case PCI_CHIP_RV250_Ig:
+	case PCI_CHIP_RV250_Ld:
+	case PCI_CHIP_RV250_Le:
+	case PCI_CHIP_RV250_Lf:
+	case PCI_CHIP_RV250_Lg:
+	case PCI_CHIP_R300_AD:
+	case PCI_CHIP_R300_AE:
+	case PCI_CHIP_R300_AF:
+	case PCI_CHIP_R300_AG:
+	case PCI_CHIP_R300_ND:
+	case PCI_CHIP_R300_NE:
+	case PCI_CHIP_R300_NF:
+	case PCI_CHIP_R300_NG:
 	default:                 info->IsPCI = FALSE; break;
 	}
     }
@@ -1882,6 +1995,8 @@ static DisplayModePtr RADEONDDCModes(ScrnInfoPtr pScrn)
 	    new->VSyncEnd   = new->VSyncStart + d_timings->v_sync_width;
 	    new->Clock      = d_timings->clock / 1000;
 	    new->Flags      = (d_timings->interlaced ? V_INTERLACE : 0);
+	    new->status     = MODE_OK;
+	    new->type       = M_T_DEFAULT;
 
 	    if (d_timings->sync == 3) {
 		switch (d_timings->misc) {
@@ -1898,7 +2013,6 @@ static DisplayModePtr RADEONDDCModes(ScrnInfoPtr pScrn)
 		       new->name);
 
 	    RADEONSortModes(&new, &first, &last);
-	    break;
 	}
     }
 
@@ -1918,6 +2032,7 @@ static DisplayModePtr RADEONDDCModes(ScrnInfoPtr pScrn)
 		    new->name = xnfalloc(strlen(p->name) + 1);
 		    strcpy(new->name, p->name);
 		    new->status = MODE_OK;
+		    new->type   = M_T_DEFAULT;
 
 		    count++;
 
@@ -1949,6 +2064,7 @@ static DisplayModePtr RADEONDDCModes(ScrnInfoPtr pScrn)
 			new->name = xnfalloc(strlen(p->name) + 1);
 			strcpy(new->name, p->name);
 			new->status = MODE_OK;
+			new->type   = M_T_DEFAULT;
 		    
 			count++;
 
@@ -1987,7 +2103,6 @@ static int RADEONValidateDDCModes(ScrnInfoPtr pScrn, char **ppModeName,
     pScrn->virtualX = pScrn->display->virtualX;
     pScrn->virtualY = pScrn->display->virtualY;
 
-    /* We have a flat panel connected */
     if (pScrn->monitor->DDC) {
 	int  maxVirtX = pScrn->virtualX;
 	int  maxVirtY = pScrn->virtualY;
@@ -2007,7 +2122,8 @@ static int RADEONValidateDDCModes(ScrnInfoPtr pScrn, char **ppModeName,
 	for (p = ddcModes; p; p = p->next) {
 
 	    /* If primary head is a flat panel, use RMX by default */
-	    if (!info->IsSecondary && DisplayType != MT_CRT) {
+	    if ((!info->IsSecondary && DisplayType != MT_CRT) &&
+		!info->ddc_mode) {
 		/* These values are effective values after expansion.
 		 * They are not really used to set CRTC registers.
 		 */
@@ -2077,9 +2193,41 @@ static int RADEONValidateDDCModes(ScrnInfoPtr pScrn, char **ppModeName,
 		}
 	    }
 
+	    /* 
+	     * Add remaining DDC modes if they're smaller than the user
+	     * specified modes
+	     */
+	    for (p = ddcModes; p; p = next) {
+		next = p->next;
+		if (p->HDisplay <= maxVirtX && p->VDisplay <= maxVirtY) {
+		    /* Unhook from DDC modes */
+		    if (p->prev) p->prev->next = p->next;
+		    if (p->next) p->next->prev = p->prev;
+		    if (p == ddcModes) ddcModes = p->next;
+
+		    /* Add to used modes */
+		    if (last) {
+			last->next = p;
+			p->prev = last;
+		    } else {
+			first = p;
+			p->prev = NULL;
+		    }
+		    p->next = NULL;
+		    last = p;
+		}
+	    }
+
 	    /* Delete unused modes */
 	    while (ddcModes)
 		xf86DeleteMode(&ddcModes, ddcModes);
+	} else {
+	    /*
+	     * No modes were configured, so we make the DDC modes
+	     * available for the user to cycle through.
+	     */
+	    for (p = ddcModes; p; p = p->next)
+		p->type |= M_T_USERDEF;
 	}
 
 	pScrn->virtualX = pScrn->display->virtualX = maxVirtX;
@@ -2130,6 +2278,7 @@ static DisplayModePtr RADEONFPNativeMode(ScrnInfoPtr pScrn)
 
 	new->Clock      = info->DotClock;
 	new->Flags      = 0;
+	new->type       = M_T_USERDEF;
 
 	new->next       = NULL;
 	new->prev       = NULL;
@@ -2220,7 +2369,10 @@ static int RADEONValidateFPModes(ScrnInfoPtr pScrn, char **ppModeName)
     }
 
     /* If all else fails, add the native mode */
-    if (!count) first = last = RADEONFPNativeMode(pScrn);
+    if (!count) {
+	first = last = RADEONFPNativeMode(pScrn);
+	if (first) count = 1;
+    }
 
     /* Close the doubly-linked mode list, if we found any usable modes */
     if (last) {
@@ -2440,6 +2592,11 @@ static int RADEONValidateCloneModes(ScrnInfoPtr pScrn)
 		   "DDC detection (type %d) for clone modes\n",
 		   info->CloneDDCType);
 
+	/* When primary head has an invalid DDC type, I2C is not
+         * initialized, so we do it here.
+	 */
+	if (!info->ddc2) info->ddc2 = xf86I2CBusInit(info->pI2CBus);
+
 	pScrn->monitor->DDC = RADEONDoDDC(pScrn, NULL);
 	if (pScrn->monitor->DDC) {
 	    if (info->CloneType == MT_CRT) {
@@ -2474,8 +2631,10 @@ static int RADEONValidateCloneModes(ScrnInfoPtr pScrn)
 			      LOOKUP_BEST_REFRESH);
     } else {
 	/* Try to add DDC modes */
+	info->IsSecondary = TRUE; /* Fake it */
 	modesFound = RADEONValidateDDCModes(pScrn, clone_mode_names,
 					    info->CloneType);
+	info->IsSecondary = FALSE; /* Restore it!!! */
 
 	/* If that fails and we're connect to a flat panel, then try to
          * add the flat panel modes
@@ -2488,7 +2647,7 @@ static int RADEONValidateCloneModes(ScrnInfoPtr pScrn)
 	xf86SetCrtcForModes(pScrn, 0);
 	xf86PrintModes(pScrn);
 	for (i = 0; i < modesFound; i++) {
-	    while(pScrn->modes->status != MODE_OK) {
+	    while (pScrn->modes->status != MODE_OK) {
 		pScrn->modes = pScrn->modes->next;
 	    }
 	    if (!pScrn->modes) break;
@@ -2534,6 +2693,16 @@ static int RADEONValidateCloneModes(ScrnInfoPtr pScrn)
     pScrn->monitor->nHsync      = save_n_hsync;
     pScrn->monitor->nVrefresh   = save_n_vrefresh;
 
+    /*
+     * Also delete the clockRanges (if it was setup) since it will be
+     * set up during the primary head initialization.
+     */
+    while (pScrn->clockRanges) {
+	ClockRangesPtr CRtmp = pScrn->clockRanges;
+	pScrn->clockRanges = pScrn->clockRanges->next;
+	xfree(CRtmp);
+    }
+
     /* modePool is no longer needed, free it */
     while (pScrn->modePool)
 	xf86DeleteMode(&pScrn->modePool, pScrn->modePool);
@@ -2637,37 +2806,36 @@ static Bool RADEONPreInitModes(ScrnInfoPtr pScrn, xf86Int10InfoPtr pInt10)
 		   "No DDC data available, DDCMode option is dismissed\n");
     }
 
+    if (pScrn->monitor->DDC) {
+	/* If we still don't know sync range yet, let's try EDID.
+	 *
+	 * Note that, since we can have dual heads, Xconfigurator
+	 * may not be able to probe both monitors correctly through
+	 * vbe probe function (RADEONProbeDDC). Here we provide an
+	 * additional way to auto-detect sync ranges if they haven't
+	 * been added to XF86Config manually.
+	 */
+	if (pScrn->monitor->nHsync <= 0)
+	    RADEONSetSyncRangeFromEdid(pScrn, 1);
+	if (pScrn->monitor->nVrefresh <= 0)
+	    RADEONSetSyncRangeFromEdid(pScrn, 0);
+    }
+
+    pScrn->progClock               = TRUE;
+
+    clockRanges                    = xnfcalloc(sizeof(*clockRanges), 1);
+    clockRanges->next              = NULL;
+    clockRanges->minClock          = info->pll.min_pll_freq;
+    clockRanges->maxClock          = info->pll.max_pll_freq * 10;
+    clockRanges->clockIndex        = -1;
+    clockRanges->interlaceAllowed  = (info->DisplayType == MT_CRT);
+    clockRanges->doubleScanAllowed = (info->DisplayType == MT_CRT);
+
     /* We'll use our own mode validation routine for DFP/LCD, since
      * xf86ValidateModes does not work correctly with the DFP/LCD modes
      * 'stretched' from their native mode.
      */
     if (info->DisplayType == MT_CRT && !info->ddc_mode) {
-
-				/* Get mode information */
-	pScrn->progClock               = TRUE;
-	clockRanges                    = xnfcalloc(sizeof(*clockRanges), 1);
-	clockRanges->next              = NULL;
-	clockRanges->minClock          = info->pll.min_pll_freq;
-	clockRanges->maxClock          = info->pll.max_pll_freq * 10;
-	clockRanges->clockIndex        = -1;
-	clockRanges->interlaceAllowed  = TRUE;
-	clockRanges->doubleScanAllowed = TRUE;
-
-	if (pScrn->monitor->DDC) {
-	    /* If we still don't know sync range yet, let's try EDID.
-	     *
-	     * Note that, since we can have dual heads, Xconfigurator
-	     * may not be able to probe both monitors correctly through
-	     * vbe probe function (RADEONProbeDDC). Here we provide an
-	     * additional way to auto-detect sync ranges if they haven't
-	     * been added to XF86Config manually.
-	     */
-	    if (pScrn->monitor->nHsync <= 0)
-		RADEONSetSyncRangeFromEdid(pScrn, 1);
-	    if (pScrn->monitor->nVrefresh <= 0)
-		RADEONSetSyncRangeFromEdid(pScrn, 0);
-	}
-
 	modesFound =
 	    xf86ValidateModes(pScrn,
 			      pScrn->monitor->Modes,
@@ -2729,6 +2897,11 @@ static Bool RADEONPreInitModes(ScrnInfoPtr pScrn, xf86Int10InfoPtr pInt10)
 	    }
 	    return FALSE;
 	}
+
+	/* Setup the screen's clockRanges for the VidMode extension */
+	pScrn->clockRanges = xnfcalloc(sizeof(*(pScrn->clockRanges)), 1);
+	memcpy(pScrn->clockRanges, clockRanges, sizeof(*clockRanges));
+	pScrn->clockRanges->strategy = LOOKUP_BEST_REFRESH;
     }
 
     xf86SetCrtcForModes(pScrn, 0);
@@ -2798,12 +2971,29 @@ static Bool RADEONPreInitCursor(ScrnInfoPtr pScrn)
 /* This is called by RADEONPreInit to initialize hardware acceleration */
 static Bool RADEONPreInitAccel(ScrnInfoPtr pScrn)
 {
+#ifdef XFree86LOADER
     RADEONInfoPtr  info = RADEONPTR(pScrn);
 
     if (!xf86ReturnOptValBool(info->Options, OPTION_NOACCEL, FALSE)) {
-	if (!xf86LoadSubModule(pScrn, "xaa")) return FALSE;
+	int errmaj = 0, errmin = 0;
+
+	info->xaaReq.majorversion = 1;
+	info->xaaReq.minorversion = 1;
+
+	if (!LoadSubModule(pScrn->module, "xaa", NULL, NULL, NULL,
+			   &info->xaaReq, &errmaj, &errmin)) {
+	    info->xaaReq.minorversion = 0;
+
+	    if (!LoadSubModule(pScrn->module, "xaa", NULL, NULL, NULL,
+			       &info->xaaReq, &errmaj, &errmin)) {
+		LoaderErrorMsg(NULL, "xaa", errmaj, errmin);
+		return FALSE;
+	    }
+	}
 	xf86LoaderReqSymLists(xaaSymbols, NULL);
     }
+#endif
+
     return TRUE;
 }
 
@@ -2838,6 +3028,7 @@ static Bool RADEONPreInitDRI(ScrnInfoPtr pScrn)
     info->ringSize      = RADEON_DEFAULT_RING_SIZE;
     info->bufSize       = RADEON_DEFAULT_BUFFER_SIZE;
     info->agpTexSize    = RADEON_DEFAULT_AGP_TEX_SIZE;
+    info->agpFastWrite  = RADEON_DEFAULT_AGP_FAST_WRITE;
 
     info->CPusecTimeout = RADEON_DEFAULT_CP_TIMEOUT;
 
@@ -2853,6 +3044,16 @@ static Bool RADEONPreInitDRI(ScrnInfoPtr pScrn)
 		       "Using AGP %dx mode\n", info->agpMode);
 	}
 
+	if ((info->agpFastWrite = xf86ReturnOptValBool(info->Options,
+						       OPTION_AGP_FW,
+						       FALSE))) {
+	    xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
+		       "Enabling AGP Fast Write\n");
+	} else {
+	    xf86DrvMsg(pScrn->scrnIndex, X_INFO, 
+		       "AGP Fast Write disabled by default\n");
+	}
+
 	if (xf86GetOptValInteger(info->Options,
 				 OPTION_AGP_SIZE, (int *)&(info->agpSize))) {
 	    switch (info->agpSize) {
@@ -2924,6 +3125,30 @@ static Bool RADEONPreInitDRI(ScrnInfoPtr pScrn)
 		   "Depth moves disabled by default\n");
     }
 
+    /* Two options to try and squeeze as much texture memory as possible
+     * for dedicated 3d rendering boxes
+     */
+    info->noBackBuffer = xf86ReturnOptValBool(info->Options,
+					      OPTION_NO_BACKBUFFER, 
+					      FALSE);
+
+    if (info->noBackBuffer) {
+	info->allowPageFlip = 0;
+    } else if (!xf86LoadSubModule(pScrn, "shadowfb")) {
+	info->allowPageFlip = 0;
+	xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+		   "Couldn't load shadowfb module:\n");
+    } else {
+	xf86LoaderReqSymLists(driShadowFBSymbols, NULL);
+
+	info->allowPageFlip = xf86ReturnOptValBool(info->Options,
+						   OPTION_PAGE_FLIP,
+						   FALSE);
+    }
+
+    xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Page flipping %sabled\n",
+	       info->allowPageFlip ? "en" : "dis");
+
     return TRUE;
 }
 #endif
@@ -2944,10 +3169,8 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags)
 {
     RADEONInfoPtr     info;
     xf86Int10InfoPtr  pInt10 = NULL;
-#ifdef __alpha__
-    CARD32            save1, save2;
-#endif
-
+    void *int10_save = NULL;
+    
     RADEONTRACE(("RADEONPreInit\n"));
     if (pScrn->numEntities != 1) return FALSE;
 
@@ -2963,7 +3186,23 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags)
     info->pEnt         = xf86GetEntityInfo(pScrn->entityList[0]);
     if (info->pEnt->location.type != BUS_PCI) goto fail;
 
-    RADEONPreInt10Save(pScrn, &save1, &save2);
+    info->PciInfo = xf86GetPciInfoForEntity(info->pEnt->index);
+    info->PciTag  = pciTag(info->PciInfo->bus,
+			   info->PciInfo->device,
+			   info->PciInfo->func);
+
+#if !defined(__alpha__)
+    if (xf86GetPciDomain(info->PciTag) ||
+	!xf86IsPrimaryPci(info->PciInfo))
+	RADEONPreInt10Save(pScrn, &int10_save);
+#else
+    /* [Alpha] On the primary, the console already ran the BIOS and we're
+     *         going to run it again - so make sure to "fix up" the card
+     *         so that (1) we can read the BIOS ROM and (2) the BIOS will
+     *         get the memory config right.
+     */         
+    RADEONPreInt10Save(pScrn, &int10_save);
+#endif
 
     if (xf86IsEntityShared(pScrn->entityList[0])) {
 	if (xf86IsPrimInitDone(pScrn->entityList[0])) {
@@ -3001,7 +3240,7 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags)
 
     if (flags & PROBE_DETECT) {
 	RADEONProbeDDC(pScrn, info->pEnt->index);
-	RADEONPostInt10Check(pScrn, save1, save2);
+	RADEONPostInt10Check(pScrn, int10_save);
 	return TRUE;
     }
 
@@ -3014,11 +3253,6 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags)
 
     vgaHWGetIOBase(VGAHWPTR(pScrn));
 
-    info->PciInfo = xf86GetPciInfoForEntity(info->pEnt->index);
-    info->PciTag  = pciTag(info->PciInfo->bus,
-			   info->PciInfo->device,
-			   info->PciInfo->func);
-
     xf86DrvMsg(pScrn->scrnIndex, X_INFO,
 	       "PCI bus %d card %d func %d\n",
 	       info->PciInfo->bus,
@@ -3058,25 +3292,31 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags)
     }
 
     if (xf86ReturnOptValBool(info->Options, OPTION_FBDEV, FALSE)) {
-	info->FBDev = TRUE;
-	xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Using framebuffer device\n");
-    }
+	/* check for Linux framebuffer device */
 
-    if (info->FBDev) {
-	/* Check for linux framebuffer device */
-	if (!xf86LoadSubModule(pScrn, "fbdevhw")) return FALSE;
-	xf86LoaderReqSymLists(fbdevHWSymbols, NULL);
-	if (!fbdevHWInit(pScrn, info->PciInfo, NULL)) return FALSE;
-	pScrn->SwitchMode  = fbdevHWSwitchMode;
-	pScrn->AdjustFrame = fbdevHWAdjustFrame;
-	pScrn->ValidMode   = fbdevHWValidMode;
+	if (xf86LoadSubModule(pScrn, "fbdevhw")) {
+	    xf86LoaderReqSymLists(fbdevHWSymbols, NULL);
+
+	    if (fbdevHWInit(pScrn, info->PciInfo, NULL)) {
+		pScrn->ValidMode     = fbdevHWValidMode;
+		info->FBDev = TRUE;
+		xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
+			   "Using framebuffer device\n");
+	    } else {
+		xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+			   "fbdevHWInit failed, not using framebuffer device\n");
+	    }
+	} else {
+	    xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+		       "Couldn't load fbdevhw module, not using framebuffer device\n");
+	}
     }
 
     if (!info->FBDev)
 	if (!RADEONPreInitInt10(pScrn, &pInt10))
 	    goto fail;
 
-    RADEONPostInt10Check(pScrn, save1, save2);
+    RADEONPostInt10Check(pScrn, int10_save);
 
     if (!RADEONPreInitConfig(pScrn))
 	goto fail;
@@ -3151,67 +3391,30 @@ static void RADEONLoadPalette(ScrnInfoPtr pScrn, int numColors,
     int            idx, j;
     unsigned char  r, g, b;
 
-    /* If the second monitor is connected, we also need to deal with the
-     * secondary palette
-     */
-    if (info->IsSecondary) j = 1;
-    else j = 0;
-
-    PAL_SELECT(j);
-
-    if (info->CurrentLayout.depth == 15) {
-	/* 15bpp mode.  This sends 32 values. */
-	for (i = 0; i < numColors; i++) {
-	    idx = indices[i];
-	    r   = colors[idx].red;
-	    g   = colors[idx].green;
-	    b   = colors[idx].blue;
-	    OUTPAL(idx * 8, r, g, b);
-	}
-    } else if (info->CurrentLayout.depth == 16) {
-	/* 16bpp mode.  This sends 64 values.
-	 *
-	 * There are twice as many green values as there are values for
-	 * red and blue.  So, we take each red and blue pair, and
-	 * combine it with each of the two green values.
-	 */
-	for (i = 0; i < numColors; i++) {
-	    idx = indices[i];
-	    r   = colors[idx / 2].red;
-	    g   = colors[idx].green;
-	    b   = colors[idx / 2].blue;
-	    OUTPAL(idx * 4, r, g, b);
-
-	    /* AH - Added to write extra green data - How come this isn't
-	     * needed on R128 ? We didn't load the extra green data in the
-	     * other routine */
-	    if (idx <= 31) {
-		r   = colors[idx].red;
-		g   = colors[(idx * 2) + 1].green;
-		b   = colors[idx].blue;
-		OUTPAL(idx * 8, r, g, b);
-	    }
-	}
+#ifdef XF86DRI
+    if (info->CPStarted) DRILock(pScrn->pScreen, 0);
+#endif
+
+    if (info->accelOn) info->accel->Sync(pScrn);
+
+    if (info->FBDev) {
+	fbdevHWLoadPalette(pScrn, numColors, indices, colors, pVisual);
     } else {
-	/* 8bpp mode.  This sends 256 values. */
-	for (i = 0; i < numColors; i++) {
-	    idx = indices[i];
-	    r   = colors[idx].red;
-	    b   = colors[idx].blue;
-	    g   = colors[idx].green;
-	    OUTPAL(idx, r, g, b);
-	}
-    }
+	/* If the second monitor is connected, we also need to deal with
+	 * the secondary palette
+	 */
+	if (info->IsSecondary) j = 1;
+	else j = 0;
+
+	PAL_SELECT(j);
 
-    if (info->Clone) {
-	PAL_SELECT(1);
 	if (info->CurrentLayout.depth == 15) {
 	    /* 15bpp mode.  This sends 32 values. */
 	    for (i = 0; i < numColors; i++) {
 		idx = indices[i];
-		r = colors[idx].red;
-		g = colors[idx].green;
-		b = colors[idx].blue;
+		r   = colors[idx].red;
+		g   = colors[idx].green;
+		b   = colors[idx].blue;
 		OUTPAL(idx * 8, r, g, b);
 	    }
 	} else if (info->CurrentLayout.depth == 16) {
@@ -3223,18 +3426,21 @@ static void RADEONLoadPalette(ScrnInfoPtr pScrn, int numColors,
 	     */
 	    for (i = 0; i < numColors; i++) {
 		idx = indices[i];
-		r = colors[idx / 2].red;
-		g = colors[idx].green;
-		b = colors[idx / 2].blue;
+		r   = colors[idx / 2].red;
+		g   = colors[idx].green;
+		b   = colors[idx / 2].blue;
+		RADEONWaitForFifo(pScrn, 32); /* delay */
 		OUTPAL(idx * 4, r, g, b);
 
 		/* AH - Added to write extra green data - How come this isn't
-		 * needed on R128 ? We didn't load the extra green data in the
-		 * other routine */
+		 * needed on R128?  We didn't load the extra green data in the
+		 * other routine
+		 */
 		if (idx <= 31) {
-		    r = colors[idx].red;
-		    g = colors[(idx * 2) + 1].green;
-		    b = colors[idx].blue;
+		    r   = colors[idx].red;
+		    g   = colors[(idx * 2) + 1].green;
+		    b   = colors[idx].blue;
+		    RADEONWaitForFifo(pScrn, 32); /* delay */
 		    OUTPAL(idx * 8, r, g, b);
 		}
 	    }
@@ -3242,13 +3448,66 @@ static void RADEONLoadPalette(ScrnInfoPtr pScrn, int numColors,
 	    /* 8bpp mode.  This sends 256 values. */
 	    for (i = 0; i < numColors; i++) {
 		idx = indices[i];
-		r = colors[idx].red;
-		b = colors[idx].blue;
-		g = colors[idx].green;
+		r   = colors[idx].red;
+		b   = colors[idx].blue;
+		g   = colors[idx].green;
+		RADEONWaitForFifo(pScrn, 32); /* delay */
 		OUTPAL(idx, r, g, b);
 	    }
 	}
+
+	if (info->Clone) {
+	    PAL_SELECT(1);
+	    if (info->CurrentLayout.depth == 15) {
+		/* 15bpp mode.  This sends 32 values. */
+		for (i = 0; i < numColors; i++) {
+		    idx = indices[i];
+		    r   = colors[idx].red;
+		    g   = colors[idx].green;
+		    b   = colors[idx].blue;
+		    OUTPAL(idx * 8, r, g, b);
+		}
+	    } else if (info->CurrentLayout.depth == 16) {
+		/* 16bpp mode.  This sends 64 values.
+		 *
+		 * There are twice as many green values as there are values
+		 * for red and blue.  So, we take each red and blue pair,
+		 * and combine it with each of the two green values.
+		 */
+		for (i = 0; i < numColors; i++) {
+		    idx = indices[i];
+		    r   = colors[idx / 2].red;
+		    g   = colors[idx].green;
+		    b   = colors[idx / 2].blue;
+		    OUTPAL(idx * 4, r, g, b);
+		    
+		    /* AH - Added to write extra green data - How come
+		     * this isn't needed on R128?  We didn't load the
+		     * extra green data in the other routine.
+		     */
+		    if (idx <= 31) {
+			r   = colors[idx].red;
+			g   = colors[(idx * 2) + 1].green;
+			b   = colors[idx].blue;
+			OUTPAL(idx * 8, r, g, b);
+		    }
+		}
+	    } else {
+		/* 8bpp mode.  This sends 256 values. */
+		for (i = 0; i < numColors; i++) {
+		    idx = indices[i];
+		    r   = colors[idx].red;
+		    b   = colors[idx].blue;
+		    g   = colors[idx].green;
+		    OUTPAL(idx, r, g, b);
+		}
+	    }
+	}
     }
+
+#ifdef XF86DRI
+    if (info->CPStarted) DRIUnlock(pScrn->pScreen);
+#endif
 }
 
 static void RADEONBlockHandler(int i, pointer blockData,
@@ -3284,11 +3543,12 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
 
 #ifdef XF86DRI
 				/* Turn off the CP for now. */
-    info->CPInUse = FALSE;
-    info->indirectBuffer = NULL;
+    info->CPInUse      = FALSE;
+    info->CPStarted    = FALSE;
+    info->directRenderingEnabled = FALSE;
 #endif
-
-    pScrn->fbOffset = 0;
+    info->accelOn      = FALSE;
+    pScrn->fbOffset    = 0;
     if (info->IsSecondary) pScrn->fbOffset = pScrn->videoRam * 1024;
     if (!RADEONMapMem(pScrn)) return FALSE;
 
@@ -3318,8 +3578,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
 	    (pScrn->virtualX - info->CurCloneMode->HDisplay) / 2;
 	info->CloneFrameY0 =
 	    (pScrn->virtualY - info->CurCloneMode->VDisplay) / 2;
-	pScrn->AdjustFrame(scrnIndex,
-			   info->CloneFrameX0, info->CloneFrameY0, 1);
+	RADEONDoAdjustFrame(pScrn, info->CloneFrameX0, info->CloneFrameY0, TRUE);
     }
 
 				/* Visual setup */
@@ -3356,11 +3615,11 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
 		       (pScrn->displayWidth * pScrn->virtualY *
 			info->CurrentLayout.pixel_bytes * 3 + 1023) / 1024);
 	    info->directRenderingEnabled = FALSE;
-	} else if (info->ChipFamily >= CHIP_FAMILY_R200) {
+	} else if (info->ChipFamily >= CHIP_FAMILY_R300) {
 	    info->directRenderingEnabled = FALSE;
 	    xf86DrvMsg(scrnIndex, X_WARNING,
 		       "Direct rendering not yet supported on "
-		       "Radeon 8500 and newer cards\n");
+		       "Radeon 9500/9700 and newer cards\n");
 	} else {
 	    if (info->IsSecondary)
 		info->directRenderingEnabled = FALSE;
@@ -3449,6 +3708,20 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
     fbPictureInit (pScreen, 0, 0);
 #endif
 
+#ifdef RENDER
+    if (PictureGetSubpixelOrder (pScreen) == SubPixelUnknown)
+    {
+	int subPixelOrder;
+
+	switch (info->DisplayType) {
+	case MT_NONE:	subPixelOrder = SubPixelUnknown; break;
+	case MT_LCD:	subPixelOrder = SubPixelHorizontalRGB; break;
+	case MT_DFP:	subPixelOrder = SubPixelHorizontalRGB; break;
+	default:	subPixelOrder = SubPixelNone; break;
+	}
+	PictureSetSubpixelOrder (pScreen, subPixelOrder);
+    }
+#endif
 				/* Memory manager setup */
 #ifdef XF86DRI
     if (info->directRenderingEnabled) {
@@ -3459,6 +3732,9 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
 	int        bufferSize  = ((pScrn->virtualY * width_bytes
 				   + RADEON_BUFFER_ALIGN)
 				  & ~RADEON_BUFFER_ALIGN);
+	int        depthSize   = ((((pScrn->virtualY+15) & ~15) * width_bytes
+				   + RADEON_BUFFER_ALIGN)
+				  & ~RADEON_BUFFER_ALIGN);
 	int        l;
 	int        scanlines;
 
@@ -3490,7 +3766,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
 	 * pixmap cache.  Should be enough for a fullscreen background
 	 * image plus some leftovers.
 	 */
-	info->textureSize = info->FbMapSize - 6 * bufferSize;
+	info->textureSize = info->FbMapSize - 5 * bufferSize - depthSize;
 
 	/* If that gives us less than half the available memory, let's
 	 * be greedy and grab some more.  Sorry, I care more about 3D
@@ -3498,18 +3774,28 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
 	 * framebuffer's worth of pixmap cache anyway.
 	 */
 	if (info->textureSize < (int)info->FbMapSize / 2) {
-	    info->textureSize = info->FbMapSize - 5 * bufferSize;
+	    info->textureSize = info->FbMapSize - 4 * bufferSize - depthSize;
 	}
 	if (info->textureSize < (int)info->FbMapSize / 2) {
-	    info->textureSize = info->FbMapSize - 4 * bufferSize;
+ 	    info->textureSize = info->FbMapSize - 3 * bufferSize - depthSize;
+	}
+	/* If there's still no space for textures, try without pixmap cache */
+	if (info->textureSize < 0) {
+	    info->textureSize = info->FbMapSize - 2 * bufferSize - depthSize
+				- 64/4*64;
 	}
 
 	/* Check to see if there is more room available after the 8192nd
 	   scanline for textures */
-	if ((int)info->FbMapSize - 8192*width_bytes - bufferSize*2
+	if ((int)info->FbMapSize - 8192*width_bytes - bufferSize - depthSize
 	    > info->textureSize) {
 	    info->textureSize =
-		info->FbMapSize - 8192*width_bytes - bufferSize*2;
+		info->FbMapSize - 8192*width_bytes - bufferSize - depthSize;
+	}
+
+	/* If backbuffer is disabled, don't allocate memory for it */
+	if (info->noBackBuffer) {
+	   info->textureSize += bufferSize;
 	}
 
 	if (info->textureSize > 0) {
@@ -3542,18 +3828,26 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
 				/* Reserve space for the shared depth
                                  * buffer.
 				 */
-	info->depthOffset = ((info->textureOffset - bufferSize +
+	info->depthOffset = ((info->textureOffset - depthSize +
 			      RADEON_BUFFER_ALIGN) &
 			     ~(CARD32)RADEON_BUFFER_ALIGN);
 	info->depthPitch = pScrn->displayWidth;
 
 				/* Reserve space for the shared back buffer */
-	info->backOffset = ((info->depthOffset - bufferSize +
-			     RADEON_BUFFER_ALIGN) &
-			    ~(CARD32)RADEON_BUFFER_ALIGN);
-	info->backPitch = pScrn->displayWidth;
+	if (info->noBackBuffer) {
+	   info->backOffset = info->depthOffset;
+	   info->backPitch = pScrn->displayWidth;
+	} else {
+	   info->backOffset = ((info->depthOffset - bufferSize +
+				RADEON_BUFFER_ALIGN) &
+			       ~(CARD32)RADEON_BUFFER_ALIGN);
+	   info->backPitch = pScrn->displayWidth;
+	}
 
-	scanlines = info->backOffset / width_bytes - 1;
+	info->backY = info->backOffset / width_bytes;
+	info->backX = (info->backOffset - (info->backY * width_bytes)) / cpp;
+
+	scanlines = info->FbMapSize / width_bytes;
 	if (scanlines > 8191) scanlines = 8191;
 
 	MemBox.x1 = 0;
@@ -3589,17 +3883,32 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
 		xf86DrvMsg(scrnIndex, X_INFO,
 			   "Largest offscreen area available: %d x %d\n",
 			   width, height);
+
+		/* Lines in offscreen area needed for depth buffer and
+		 * textures
+		 */
+		info->depthTexLines = (scanlines
+				       - info->depthOffset / width_bytes);
+		info->backLines	    = (scanlines
+				       - info->backOffset / width_bytes
+				       - info->depthTexLines);
+		info->backArea	    = NULL;
+	    } else {
+		xf86DrvMsg(scrnIndex, X_ERROR,
+			   "Unable to determine largest offscreen area "
+			   "available\n");
+		return FALSE;
 	    }
 	}
 
 	xf86DrvMsg(scrnIndex, X_INFO,
-		   "Reserved back buffer at offset 0x%x\n",
+		   "Will use back buffer at offset 0x%x\n",
 		   info->backOffset);
 	xf86DrvMsg(scrnIndex, X_INFO,
-		   "Reserved depth buffer at offset 0x%x\n",
+		   "Will use depth buffer at offset 0x%x\n",
 		   info->depthOffset);
 	xf86DrvMsg(scrnIndex, X_INFO,
-		   "Reserved %d kb for textures at offset 0x%x\n",
+		   "Will use %d kb for textures at offset 0x%x\n",
 		   info->textureSize/1024, info->textureOffset);
 
 	info->frontPitchOffset = (((info->frontPitch * cpp / 64) << 22) |
@@ -3660,18 +3969,15 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
 	}
     }
 
-				/* Backing store setup */
-    miInitializeBackingStore(pScreen);
-    xf86SetBackingStore(pScreen);
-
-				/* Set Silken Mouse */
-    xf86SetSilkenMouse(pScreen);
-
 				/* Acceleration setup */
     if (!xf86ReturnOptValBool(info->Options, OPTION_NOACCEL, FALSE)) {
 	if (RADEONAccelInit(pScreen)) {
 	    xf86DrvMsg(scrnIndex, X_INFO, "Acceleration enabled\n");
 	    info->accelOn = TRUE;
+
+	    /* FIXME: Figure out why this was added because it shouldn't be! */
+	    /* This is needed by the DRI and XAA code for shared entities */
+	    pScrn->pScreen = pScreen;
 	} else {
 	    xf86DrvMsg(scrnIndex, X_ERROR,
 		       "Acceleration initialization failed\n");
@@ -3686,6 +3992,13 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
 				/* DGA setup */
     RADEONDGAInit(pScreen);
 
+				/* Backing store setup */
+    miInitializeBackingStore(pScreen);
+    xf86SetBackingStore(pScreen);
+
+				/* Set Silken Mouse */
+    xf86SetSilkenMouse(pScreen);
+
 				/* Cursor setup */
     miDCInitialize(pScreen, xf86GetPointerScreenFuncs());
 
@@ -3696,7 +4009,8 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
 
 	    xf86DrvMsg(pScrn->scrnIndex, X_INFO,
 		       "Using hardware cursor (scanline %d)\n",
-		       info->cursor_start / pScrn->displayWidth);
+		       info->cursor_start / pScrn->displayWidth
+		       / info->CurrentLayout.pixel_bytes);
 	    if (xf86QueryLargestOffscreenArea(pScreen, &width, &height,
 					      0, 0, 0)) {
 		xf86DrvMsg(scrnIndex, X_INFO,
@@ -3709,14 +4023,14 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
 	    xf86DrvMsg(scrnIndex, X_INFO, "Using software cursor\n");
 	}
     } else {
+	info->cursor_start = 0;
 	xf86DrvMsg(scrnIndex, X_INFO, "Using software cursor\n");
     }
 
 				/* Colormap setup */
     if (!miCreateDefColormap(pScreen)) return FALSE;
     if (!xf86HandleColormaps(pScreen, 256, info->dac6bits ? 6 : 8,
-			     (info->FBDev ? fbdevHWLoadPalette :
-			     RADEONLoadPalette), NULL,
+			     RADEONLoadPalette, NULL,
 			     CMAP_PALETTED_TRUECOLOR
 #if 0 /* This option messes up text mode! (eich@suse.de) */
 			     | CMAP_LOAD_EVEN_IF_OFFSCREEN
@@ -3725,10 +4039,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
 
 				/* DPMS setup */
 #ifdef DPMSExtension
-    if (info->FBDev)
-	xf86DPMSInit(pScreen, fbdevHWDPMSSet, 0);
-    else
-	xf86DPMSInit(pScreen, RADEONDisplayPowerManagementSet, 0);
+    xf86DPMSInit(pScreen, RADEONDisplayPowerManagementSet, 0);
 #endif
 
     RADEONInitVideo(pScreen);
@@ -3790,6 +4101,7 @@ static void RADEONRestoreCommonRegisters(ScrnInfoPtr pScrn,
      * CRT are connected.
      */
     if (info->HasCRTC2 &&
+	!info->IsSwitching &&
 	info->ChipFamily != CHIP_FAMILY_R200 &&
 	info->ChipFamily != CHIP_FAMILY_R300) {
 	DevUnion     *pPriv;
@@ -3807,6 +4119,31 @@ static void RADEONRestoreCommonRegisters(ScrnInfoPtr pScrn,
     }
 }
 
+/* Write miscellaneous registers which might have been destroyed by an fbdevHW
+ * call
+ */
+static void RADEONRestoreFBDevRegisters(ScrnInfoPtr pScrn,
+					 RADEONSavePtr restore)
+{
+#ifdef XF86DRI
+    RADEONInfoPtr  info       = RADEONPTR(pScrn);
+    unsigned char *RADEONMMIO = info->MMIO;
+
+    /* Restore register for vertical blank interrupts */
+    if (info->irq) {
+	OUTREG(RADEON_GEN_INT_CNTL, restore->gen_int_cntl);
+    }
+
+    /* Restore registers for page flipping */
+    if (info->allowPageFlip) {
+	OUTREG(RADEON_CRTC_OFFSET_CNTL, restore->crtc_offset_cntl);
+	if (info->HasCRTC2) {
+	    OUTREG(RADEON_CRTC2_OFFSET_CNTL, restore->crtc2_offset_cntl);
+	}
+    }
+#endif
+}
+
 /* Write CRTC registers */
 static void RADEONRestoreCrtcRegisters(ScrnInfoPtr pScrn,
 				       RADEONSavePtr restore)
@@ -3861,7 +4198,7 @@ static void RADEONRestoreCrtc2Registers(ScrnInfoPtr pScrn,
 	     * TV_DAC_CNTL to a correct value which causes too high
 	     * contrast for the second CRT (using TV_DAC).
 	     */
-	    OUTREG(0x88c, 0x00280203);
+	    OUTREG(RADEON_TV_DAC_CNTL, 0x00280203);
 	}
     }
 
@@ -3996,9 +4333,25 @@ static void RADEONRestorePLLRegisters(ScrnInfoPtr pScrn,
 	    RADEON_PLL_DIV_SEL,
 	    ~(RADEON_PLL_DIV_SEL));
 
-    OUTPLLP(pScrn, RADEON_PPLL_REF_DIV,
-	    restore->ppll_ref_div,
-	    ~RADEON_PPLL_REF_DIV_MASK);
+    if (info->ChipFamily == CHIP_FAMILY_R300) {
+	if (restore->ppll_ref_div & R300_PPLL_REF_DIV_ACC_MASK) {
+	    /* When restoring console mode, use saved PPLL_REF_DIV
+	     * setting.
+	     */
+	    OUTPLLP(pScrn, RADEON_PPLL_REF_DIV,
+		    restore->ppll_ref_div,
+		    0);
+	} else {
+	    /* R300 uses ref_div_acc field as real ref divider */
+	    OUTPLLP(pScrn, RADEON_PPLL_REF_DIV,
+		    (restore->ppll_ref_div << R300_PPLL_REF_DIV_ACC_SHIFT), 
+		    ~R300_PPLL_REF_DIV_ACC_MASK);
+	}
+    } else {
+	OUTPLLP(pScrn, RADEON_PPLL_REF_DIV,
+		restore->ppll_ref_div,
+		~RADEON_PPLL_REF_DIV_MASK);
+    }
 
     OUTPLLP(pScrn, RADEON_PPLL_DIV_3,
 	    restore->ppll_div_3,
@@ -4232,6 +4585,28 @@ static void RADEONSaveCommonRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save)
     save->surface_cntl	     = INREG(RADEON_SURFACE_CNTL);
 }
 
+/* Read miscellaneous registers which might be destroyed by an fbdevHW call */
+static void RADEONSaveFBDevRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save)
+{
+#ifdef XF86DRI
+    RADEONInfoPtr  info       = RADEONPTR(pScrn);
+    unsigned char *RADEONMMIO = info->MMIO;
+
+    /* Save register for vertical blank interrupts */
+    if (info->irq) {
+	save->gen_int_cntl = INREG(RADEON_GEN_INT_CNTL);
+    }
+
+    /* Save registers for page flipping */
+    if (info->allowPageFlip) {
+	save->crtc_offset_cntl = INREG(RADEON_CRTC_OFFSET_CNTL);
+	if (info->HasCRTC2) {
+	    save->crtc2_offset_cntl = INREG(RADEON_CRTC2_OFFSET_CNTL);
+	}
+    }
+#endif
+}
+
 /* Read CRTC registers */
 static void RADEONSaveCrtcRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save)
 {
@@ -4407,8 +4782,7 @@ static void RADEONSave(ScrnInfoPtr pScrn)
 	save->dp_datatype      = INREG(RADEON_DP_DATATYPE);
 	save->rbbm_soft_reset  = INREG(RADEON_RBBM_SOFT_RESET);
 	save->clock_cntl_index = INREG(RADEON_CLOCK_CNTL_INDEX);
-	if (info->ChipFamily == CHIP_FAMILY_R300)
-	    R300CGWorkaround(pScrn);
+	if (info->R300CGWorkaround) R300CGWorkaround(pScrn);
     }
 
     RADEONSaveMode(pScrn, save);
@@ -4423,6 +4797,12 @@ static void RADEONRestore(ScrnInfoPtr pScrn)
     vgaHWPtr       hwp        = VGAHWPTR(pScrn);
 
     RADEONTRACE(("RADEONRestore\n"));
+
+#if X_BYTE_ORDER == X_BIG_ENDIAN
+    RADEONWaitForFifo(pScrn, 1);
+    OUTREG(RADEON_RBBM_GUICNTL, RADEON_HOST_DATA_SWAP_NONE);
+#endif
+
     if (info->FBDev) {
 	fbdevHWRestore(pScrn);
 	return;
@@ -4430,8 +4810,7 @@ static void RADEONRestore(ScrnInfoPtr pScrn)
     RADEONBlank(pScrn);
 
     OUTREG(RADEON_CLOCK_CNTL_INDEX, restore->clock_cntl_index);
-    if (info->ChipFamily == CHIP_FAMILY_R300)
-	R300CGWorkaround(pScrn);
+    if (info->R300CGWorkaround) R300CGWorkaround(pScrn);
     OUTREG(RADEON_RBBM_SOFT_RESET,  restore->rbbm_soft_reset);
     OUTREG(RADEON_DP_DATATYPE,      restore->dp_datatype);
 
@@ -4515,6 +4894,8 @@ static void RADEONInitCommonRegisters(RADEONSavePtr save, RADEONInfoPtr info)
 static Bool RADEONInitCrtcRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save,
 				  DisplayModePtr mode, RADEONInfoPtr info)
 {
+    unsigned char *RADEONMMIO = info->MMIO;
+
     int  format;
     int  hsync_start;
     int  hsync_wid;
@@ -4594,12 +4975,11 @@ static Bool RADEONInitCrtcRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save,
 				  << 16));
 
     hsync_wid = (mode->CrtcHSyncEnd - mode->CrtcHSyncStart) / 8;
-    if (!hsync_wid)       hsync_wid = 1;
-    if (hsync_wid > 0x3f) hsync_wid = 0x3f;
+    if (!hsync_wid) hsync_wid = 1;
     hsync_start = mode->CrtcHSyncStart - 8 + hsync_fudge;
 
     save->crtc_h_sync_strt_wid = ((hsync_start & 0x1fff)
-				  | (hsync_wid << 16)
+				  | ((hsync_wid & 0x3f) << 16)
 				  | ((mode->Flags & V_NHSYNC)
 				     ? RADEON_CRTC_H_SYNC_POL
 				     : 0));
@@ -4619,24 +4999,24 @@ static Bool RADEONInitCrtcRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save,
 #endif
 
     vsync_wid = mode->CrtcVSyncEnd - mode->CrtcVSyncStart;
-    if (!vsync_wid)       vsync_wid = 1;
-    if (vsync_wid > 0x1f) vsync_wid = 0x1f;
+    if (!vsync_wid) vsync_wid = 1;
 
     save->crtc_v_sync_strt_wid = (((mode->CrtcVSyncStart - 1) & 0xfff)
-				  | (vsync_wid << 16)
+				  | ((vsync_wid & 0x1f) << 16)
 				  | ((mode->Flags & V_NVSYNC)
 				     ? RADEON_CRTC_V_SYNC_POL
 				     : 0));
 
     save->crtc_offset      = 0;
-    save->crtc_offset_cntl = 0;
+    save->crtc_offset_cntl = INREG(RADEON_CRTC_OFFSET_CNTL);
 
     save->crtc_pitch  = (((pScrn->displayWidth * pScrn->bitsPerPixel) +
 			  ((pScrn->bitsPerPixel * 8) -1)) /
 			 (pScrn->bitsPerPixel * 8));
     save->crtc_pitch |= save->crtc_pitch << 16;
 
-    save->surface_cntl = RADEON_SURF_TRANSLATION_DIS;
+    save->surface_cntl = 0;
+
 #if X_BYTE_ORDER == X_BIG_ENDIAN
     switch (pScrn->bitsPerPixel) {
     case 16:
@@ -4659,6 +5039,8 @@ static Bool RADEONInitCrtcRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save,
 static Bool RADEONInitCrtc2Registers(ScrnInfoPtr pScrn, RADEONSavePtr save,
 				     DisplayModePtr mode, RADEONInfoPtr info)
 {
+    unsigned char *RADEONMMIO = info->MMIO;
+
     int  format;
     int  hsync_start;
     int  hsync_wid;
@@ -4728,15 +5110,14 @@ static Bool RADEONInitCrtc2Registers(ScrnInfoPtr pScrn, RADEONSavePtr save,
 	 | ((((mode->CrtcHDisplay / 8) - 1) & 0x1ff) << 16));
 
     hsync_wid = (mode->CrtcHSyncEnd - mode->CrtcHSyncStart) / 8;
-    if (!hsync_wid)       hsync_wid = 1;
-    if (hsync_wid > 0x3f) hsync_wid = 0x3f;
+    if (!hsync_wid) hsync_wid = 1;
     hsync_start = mode->CrtcHSyncStart - 8 + hsync_fudge;
 
     save->crtc2_h_sync_strt_wid = ((hsync_start & 0x1fff)
-				   | (hsync_wid << 16)
+				   | ((hsync_wid & 0x3f) << 16)
 				   | ((mode->Flags & V_NHSYNC)
 				      ? RADEON_CRTC_H_SYNC_POL
-				      : RADEON_CRTC_H_SYNC_POL));
+				      : 0));
 
 #if 1
 				/* This works for double scan mode. */
@@ -4753,17 +5134,16 @@ static Bool RADEONInitCrtc2Registers(ScrnInfoPtr pScrn, RADEONSavePtr save,
 #endif
 
     vsync_wid = mode->CrtcVSyncEnd - mode->CrtcVSyncStart;
-    if (!vsync_wid)       vsync_wid = 1;
-    if (vsync_wid > 0x1f) vsync_wid = 0x1f;
+    if (!vsync_wid) vsync_wid = 1;
 
     save->crtc2_v_sync_strt_wid = (((mode->CrtcVSyncStart - 1) & 0xfff)
-				   | (vsync_wid << 16)
+				   | ((vsync_wid & 0x1f) << 16)
 				   | ((mode->Flags & V_NVSYNC)
 				      ? RADEON_CRTC2_V_SYNC_POL
-				      : RADEON_CRTC2_V_SYNC_POL));
+				      : 0));
 
     save->crtc2_offset      = 0;
-    save->crtc2_offset_cntl = 0;
+    save->crtc2_offset_cntl = INREG(RADEON_CRTC2_OFFSET_CNTL);
 
     save->crtc2_pitch  = (((pScrn->displayWidth * pScrn->bitsPerPixel) +
 			   ((pScrn->bitsPerPixel * 8) -1)) /
@@ -4778,6 +5158,11 @@ static Bool RADEONInitCrtc2Registers(ScrnInfoPtr pScrn, RADEONSavePtr save,
 				     RADEON_FP2_PANEL_FORMAT |
 				     RADEON_FP2_ON);
 
+	if (pScrn->rgbBits == 8) 
+	    save->fp2_gen_cntl |= RADEON_FP2_PANEL_FORMAT; /* 24 bit format */
+	else
+	    save->fp2_gen_cntl &= ~RADEON_FP2_PANEL_FORMAT;/* 18 bit format */
+
 	/* FIXME: When there are two DFPs, the 2nd DFP is driven by the
 	 *        external TMDS transmitter.  It may have a problem at
 	 *        high dot clock for certain panels.  Since we don't
@@ -4883,12 +5268,18 @@ static void RADEONInitFPRegisters(ScrnInfoPtr pScrn, RADEONSavePtr orig,
     save->fp_gen_cntl |= (RADEON_FP_CRTC_DONT_SHADOW_VPAR |
 			  RADEON_FP_CRTC_DONT_SHADOW_HEND );
 
+    if (pScrn->rgbBits == 8) 
+        save->fp_gen_cntl |= RADEON_FP_PANEL_FORMAT;  /* 24 bit format */
+    else
+        save->fp_gen_cntl &= ~RADEON_FP_PANEL_FORMAT;/* 18 bit format */
+
     save->lvds_gen_cntl = orig->lvds_gen_cntl;
     save->lvds_pll_cntl = orig->lvds_pll_cntl;
 
     /* This is needed for some panel at high resolution (>=1600x1200) 
      */
-    if (save->dot_clock_freq > 15000)
+    if ((save->dot_clock_freq > 15000) &&
+	(info->ChipFamily != CHIP_FAMILY_R300))
 	save->tmds_pll_cntl = 0xA3F;
     else
 	save->tmds_pll_cntl = orig->tmds_pll_cntl;
@@ -5099,8 +5490,7 @@ static Bool RADEONInit(ScrnInfoPtr pScrn, DisplayModePtr mode,
     info->Flags = mode->Flags;
 
     if (info->IsSecondary) {
-	if (!RADEONInitCrtc2Registers(pScrn, save,
-				      pScrn->currentMode,info))
+	if (!RADEONInitCrtc2Registers(pScrn, save, mode, info))
 	    return FALSE;
 	RADEONInitPLL2Registers(save, &info->pll, dot_clock);
     } else {
@@ -5109,23 +5499,7 @@ static Bool RADEONInit(ScrnInfoPtr pScrn, DisplayModePtr mode,
 	    return FALSE;
 	dot_clock = mode->Clock/1000.0;
 	if (dot_clock) {
-	    if (info->ChipFamily == CHIP_FAMILY_R300) {
-		CARD16  ref_div = info->pll.reference_div;
-
-		/* When using a DFP on R300, the BIOS seems to configure
-		 * the reference divider to a value different from the
-		 * value in PLL information table.  Here we use the
-		 * register value set by the BIOS.  We need to restore
-		 * the PLL info table value back in case it needs to be
-		 * used for the 2nd head.
-		 */
-		info->pll.reference_div = (INPLL(pScrn, RADEON_PPLL_REF_DIV) &
-					   RADEON_PPLL_REF_DIV_MASK);
-		RADEONInitPLLRegisters(save, &info->pll, dot_clock);
-		info->pll.reference_div = ref_div;
-	    } else {
-		RADEONInitPLLRegisters(save, &info->pll, dot_clock);
-	    }
+	    RADEONInitPLLRegisters(save, &info->pll, dot_clock);
 	} else {
 	    save->ppll_ref_div = info->SavedReg.ppll_ref_div;
 	    save->ppll_div_3   = info->SavedReg.ppll_div_3;
@@ -5156,7 +5530,6 @@ static Bool RADEONModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
     RADEONInfoPtr  info = RADEONPTR(pScrn);
 
     if (!RADEONInit(pScrn, mode, &info->ModeReg)) return FALSE;
-				/* FIXME?  DRILock/DRIUnlock here? */
 
     pScrn->vtSema = TRUE;
     RADEONBlank(pScrn);
@@ -5184,72 +5557,93 @@ static Bool RADEONSaveScreen(ScreenPtr pScreen, int mode)
 
 Bool RADEONSwitchMode(int scrnIndex, DisplayModePtr mode, int flags)
 {
-    ScrnInfoPtr    pScrn = xf86Screens[scrnIndex];
-    RADEONInfoPtr  info  = RADEONPTR(pScrn);
-    Bool           ret   = FALSE;
+    ScrnInfoPtr    pScrn       = xf86Screens[scrnIndex];
+    RADEONInfoPtr  info        = RADEONPTR(pScrn);
+    Bool           ret;
+#ifdef XF86DRI
+    Bool           CPStarted   = info->CPStarted;
 
-    info->IsSwitching = TRUE;
-    if (info->Clone && info->CloneModes) {
-	DisplayModePtr  clone_mode = info->CloneModes;
+    if (CPStarted) {
+	DRILock(pScrn->pScreen, 0);
+	RADEONCP_STOP(pScrn, info);
+    }
+#endif
 
-	/* Try to match a mode on primary head 
-	 * FIXME: This may not be good if both heads don't have
-	 *        exactly the same list of mode.
-	 */
-	while (1) {
-	    if ((clone_mode->HDisplay == mode->HDisplay) &&
-		(clone_mode->VDisplay == mode->VDisplay) &&
-		(!info->PanelOff)) {
-		info->CloneFrameX0 = (info->CurCloneMode->HDisplay +
-				      info->CloneFrameX0 -
-				      clone_mode->HDisplay - 1) / 2;
-		info->CloneFrameY0 =
-		    (info->CurCloneMode->VDisplay + info->CloneFrameY0 -
-		     clone_mode->VDisplay - 1) / 2;
-		info->CurCloneMode = clone_mode;
-		break;
-	    }
+    if (info->accelOn) info->accel->Sync(pScrn);
+
+    if (info->FBDev) {
+	RADEONSaveFBDevRegisters(pScrn, &info->ModeReg);
 
-	    if (!clone_mode->next) {
-		if (info->CurCloneMode->next)
-		    info->CurCloneMode = info->CurCloneMode->next;
-		else
+	ret = fbdevHWSwitchMode(scrnIndex, mode, flags);
+
+	RADEONRestoreFBDevRegisters(pScrn, &info->ModeReg);
+    } else {
+	info->IsSwitching = TRUE;
+	if (info->Clone && info->CloneModes) {
+	    DisplayModePtr  clone_mode = info->CloneModes;
+
+	    /* Try to match a mode on primary head 
+	     * FIXME: This may not be good if both heads don't have
+	     *        exactly the same list of mode.
+	     */
+	    while (1) {
+		if ((clone_mode->HDisplay == mode->HDisplay) &&
+		    (clone_mode->VDisplay == mode->VDisplay) &&
+		    (!info->PanelOff)) {
+		    info->CloneFrameX0 = (info->CurCloneMode->HDisplay +
+					  info->CloneFrameX0 -
+					  clone_mode->HDisplay - 1) / 2;
+		    info->CloneFrameY0 =
+			(info->CurCloneMode->VDisplay + info->CloneFrameY0 -
+			 clone_mode->VDisplay - 1) / 2;
+		    info->CurCloneMode = clone_mode;
+		    break;
+		}
+
+		if (!clone_mode->next) {
 		    info->CurCloneMode = info->CloneModes;
+		    break;
+		}
 
-		info->CloneFrameX0 = (info->CurCloneMode->HDisplay +
-				      info->CloneFrameX0 -
-				      clone_mode->HDisplay - 1) / 2;
-		info->CloneFrameY0 =
-		    (info->CurCloneMode->VDisplay + info->CloneFrameY0 -
-		     clone_mode->VDisplay - 1) / 2;
-		break;
+		clone_mode = clone_mode->next;
 	    }
+	}
+	ret = RADEONModeInit(xf86Screens[scrnIndex], mode);
+
+	if (info->CurCloneMode) {
+	    if (info->CloneFrameX0 + info->CurCloneMode->HDisplay >=
+		pScrn->virtualX)
+		info->CloneFrameX0 =
+		    pScrn->virtualX - info->CurCloneMode->HDisplay;
+	    else if (info->CloneFrameX0 < 0)
+		info->CloneFrameX0 = 0;
+
+	    if (info->CloneFrameY0 + info->CurCloneMode->VDisplay >=
+		pScrn->virtualY)
+		info->CloneFrameY0 =
+		    pScrn->virtualY - info->CurCloneMode->VDisplay;
+	    else if (info->CloneFrameY0 < 0)
+		info->CloneFrameY0 = 0;
 
-	    clone_mode = clone_mode->next;
+	    RADEONDoAdjustFrame(pScrn, info->CloneFrameX0, info->CloneFrameY0,
+				TRUE);
 	}
-    }
-    ret = RADEONModeInit(xf86Screens[scrnIndex], mode);
 
-    if (info->CurCloneMode) {
-	if (info->CloneFrameX0 + info->CurCloneMode->HDisplay >=
-	    pScrn->virtualX)
-	    info->CloneFrameX0 =
-		pScrn->virtualX - info->CurCloneMode->HDisplay;
-	else if (info->CloneFrameX0 < 0)
-	    info->CloneFrameX0 = 0;
+	info->IsSwitching = FALSE;
+    }
 
-	if (info->CloneFrameY0 + info->CurCloneMode->VDisplay >=
-	    pScrn->virtualY)
-	    info->CloneFrameY0 =
-		pScrn->virtualY - info->CurCloneMode->VDisplay;
-	else if (info->CloneFrameY0 < 0)
-	    info->CloneFrameY0 = 0;
+    if (info->accelOn) {
+	info->accel->Sync(pScrn);
+	RADEONEngineRestore(pScrn);
+    }
 
-	pScrn->AdjustFrame(scrnIndex,
-			   info->CloneFrameX0, info->CloneFrameY0, 1);
+#ifdef XF86DRI
+    if (CPStarted) {
+	RADEONCP_START(pScrn, info);
+	DRIUnlock(pScrn->pScreen);
     }
+#endif
 
-    info->IsSwitching = FALSE;
     return ret;
 }
 
@@ -5267,14 +5661,14 @@ int RADEONValidMode(int scrnIndex, DisplayModePtr mode,
 /* Adjust viewport into virtual desktop such that (0,0) in viewport
  * space is (x,y) in virtual space.
  */
-void RADEONAdjustFrame(int scrnIndex, int x, int y, int flags)
+void RADEONDoAdjustFrame(ScrnInfoPtr pScrn, int x, int y, int clone)
 {
-    ScrnInfoPtr    pScrn      = xf86Screens[scrnIndex];
     RADEONInfoPtr  info       = RADEONPTR(pScrn);
     unsigned char *RADEONMMIO = info->MMIO;
-    int            Base;
-
-    Base = y * info->CurrentLayout.displayWidth + x;
+    int            reg, Base = y * info->CurrentLayout.displayWidth + x;
+#ifdef XF86DRI
+    RADEONSAREAPrivPtr pSAREAPriv;
+#endif
 
     switch (info->CurrentLayout.pixel_code) {
     case 15:
@@ -5285,17 +5679,51 @@ void RADEONAdjustFrame(int scrnIndex, int x, int y, int flags)
 
     Base &= ~7;                 /* 3 lower bits are always 0 */
 
-    if (info->Clone && (flags == 1)) {
+    if (clone || info->IsSecondary) {
 	Base += pScrn->fbOffset;
-	OUTREG(RADEON_CRTC2_OFFSET, Base);
+	reg = RADEON_CRTC2_OFFSET;
     } else {
-	if (info->IsSecondary) {
-	    Base += pScrn->fbOffset;
-	    OUTREG(RADEON_CRTC2_OFFSET, Base);
-	} else {
-	    OUTREG(RADEON_CRTC_OFFSET, Base);
+	reg = RADEON_CRTC_OFFSET;
+    }
+
+#ifdef XF86DRI
+    if (info->directRenderingEnabled) {
+
+    	pSAREAPriv = DRIGetSAREAPrivate(pScrn->pScreen);
+
+	if (pSAREAPriv->pfCurrentPage == 1) {
+	    Base += info->backOffset;
+	}
+
+	if (clone || info->IsSecondary) {
+	    pSAREAPriv->crtc2_base = Base;
 	}
     }
+#endif
+
+    OUTREG(reg, Base);
+}
+
+void RADEONAdjustFrame(int scrnIndex, int x, int y, int flags)
+{
+    ScrnInfoPtr    pScrn      = xf86Screens[scrnIndex];
+    RADEONInfoPtr  info       = RADEONPTR(pScrn);
+
+#ifdef XF86DRI
+    if (info->CPStarted) DRILock(pScrn->pScreen, 0);
+#endif
+
+    if (info->accelOn) info->accel->Sync(pScrn);
+
+    if (info->FBDev) {
+	fbdevHWAdjustFrame(scrnIndex, x, y, flags);
+    } else {
+	RADEONDoAdjustFrame(pScrn, x, y, FALSE);
+    }
+
+#ifdef XF86DRI
+	if (info->CPStarted) DRIUnlock(pScrn->pScreen);
+#endif
 }
 
 /* Called when VT switching back to the X server.  Reinitialize the
@@ -5313,6 +5741,8 @@ Bool RADEONEnterVT(int scrnIndex, int flags)
 	if (!fbdevHWEnterVT(scrnIndex,flags)) return FALSE;
 	info->PaletteSavedOnVT = FALSE;
 	info->ModeReg.surface_cntl = INREG(RADEON_SURFACE_CNTL);
+
+	RADEONRestoreFBDevRegisters(pScrn, &info->ModeReg);
     } else
 	if (!RADEONModeInit(pScrn, pScrn->currentMode)) return FALSE;
 
@@ -5326,10 +5756,9 @@ Bool RADEONEnterVT(int scrnIndex, int flags)
     }
 #endif
 
-    RADEONAdjustFrame(scrnIndex, pScrn->frameX0, pScrn->frameY0, 0);
+    pScrn->AdjustFrame(scrnIndex, pScrn->frameX0, pScrn->frameY0, 0);
     if (info->CurCloneMode) {
-	pScrn->AdjustFrame(scrnIndex,
-			   info->CloneFrameX0, info->CloneFrameY0, 1);
+	RADEONDoAdjustFrame(pScrn, info->CloneFrameX0, info->CloneFrameY0, TRUE);
     }
 
     return TRUE;
@@ -5355,9 +5784,13 @@ void RADEONLeaveVT(int scrnIndex, int flags)
     if (info->FBDev) {
 	RADEONSavePalette(pScrn, save);
 	info->PaletteSavedOnVT = TRUE;
+
+	RADEONSaveFBDevRegisters(pScrn, &info->ModeReg);
+
 	fbdevHWLeaveVT(scrnIndex,flags);
-    } else
-	RADEONRestore(pScrn);
+    }
+
+    RADEONRestore(pScrn);
 }
 
 /* Called at the end of each server generation.  Restore the original
@@ -5427,70 +5860,85 @@ static void RADEONDisplayPowerManagementSet(ScrnInfoPtr pScrn,
 {
     RADEONInfoPtr  info       = RADEONPTR(pScrn);
     unsigned char *RADEONMMIO = info->MMIO;
-    int             mask1     = (RADEON_CRTC_DISPLAY_DIS |
-				 RADEON_CRTC_HSYNC_DIS |
-				 RADEON_CRTC_VSYNC_DIS);
-    int             mask2     = (RADEON_CRTC2_DISP_DIS |
-				 RADEON_CRTC2_VSYNC_DIS |
-				 RADEON_CRTC2_HSYNC_DIS);
-
-    /* TODO: additional handling for LCD ? */
-
-    switch (PowerManagementMode) {
-    case DPMSModeOn:
-	/* Screen: On; HSync: On, VSync: On */
-	if (info->IsSecondary)
-	    OUTREGP(RADEON_CRTC2_GEN_CNTL, 0, ~mask2);
-	else {
-	    if (info->Clone)
+
+#ifdef XF86DRI
+    if (info->CPStarted) DRILock(pScrn->pScreen, 0);
+#endif
+
+    if (info->accelOn) info->accel->Sync(pScrn);
+
+    if (info->FBDev) {
+	fbdevHWDPMSSet(pScrn, PowerManagementMode, flags);
+    } else {
+	int             mask1     = (RADEON_CRTC_DISPLAY_DIS |
+				     RADEON_CRTC_HSYNC_DIS |
+				     RADEON_CRTC_VSYNC_DIS);
+	int             mask2     = (RADEON_CRTC2_DISP_DIS |
+				     RADEON_CRTC2_VSYNC_DIS |
+				     RADEON_CRTC2_HSYNC_DIS);
+
+	/* TODO: additional handling for LCD ? */
+
+	switch (PowerManagementMode) {
+	case DPMSModeOn:
+	    /* Screen: On; HSync: On, VSync: On */
+	    if (info->IsSecondary)
 		OUTREGP(RADEON_CRTC2_GEN_CNTL, 0, ~mask2);
-	    OUTREGP(RADEON_CRTC_EXT_CNTL, 0, ~mask1);
-	}
-	break;
+	    else {
+		if (info->Clone)
+		    OUTREGP(RADEON_CRTC2_GEN_CNTL, 0, ~mask2);
+		OUTREGP(RADEON_CRTC_EXT_CNTL, 0, ~mask1);
+	    }
+	    break;
 
-    case DPMSModeStandby:
-	/* Screen: Off; HSync: Off, VSync: On */
-	if (info->IsSecondary)
-	    OUTREGP(RADEON_CRTC2_GEN_CNTL,
-		    RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_HSYNC_DIS,
-		    ~mask2);
-	else {
-	    if (info->Clone)
+	case DPMSModeStandby:
+	    /* Screen: Off; HSync: Off, VSync: On */
+	    if (info->IsSecondary)
 		OUTREGP(RADEON_CRTC2_GEN_CNTL,
 			RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_HSYNC_DIS,
 			~mask2);
-	    OUTREGP(RADEON_CRTC_EXT_CNTL,
-		    RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_HSYNC_DIS,
-		    ~mask1);
-	}
-	break;
+	    else {
+		if (info->Clone)
+		    OUTREGP(RADEON_CRTC2_GEN_CNTL,
+			    RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_HSYNC_DIS,
+			    ~mask2);
+		OUTREGP(RADEON_CRTC_EXT_CNTL,
+			RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_HSYNC_DIS,
+			~mask1);
+	    }
+	    break;
 
-    case DPMSModeSuspend:
-	/* Screen: Off; HSync: On, VSync: Off */
-	if (info->IsSecondary)
-	    OUTREGP(RADEON_CRTC2_GEN_CNTL,
-		    RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_VSYNC_DIS,
-		    ~mask2);
-	else {
-	    if (info->Clone)
+	case DPMSModeSuspend:
+	    /* Screen: Off; HSync: On, VSync: Off */
+	    if (info->IsSecondary)
 		OUTREGP(RADEON_CRTC2_GEN_CNTL,
 			RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_VSYNC_DIS,
 			~mask2);
-	    OUTREGP(RADEON_CRTC_EXT_CNTL,
-		    RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_VSYNC_DIS,
-		    ~mask1);
-	}
-	break;
+	    else {
+		if (info->Clone)
+		    OUTREGP(RADEON_CRTC2_GEN_CNTL,
+			    RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_VSYNC_DIS,
+			    ~mask2);
+		OUTREGP(RADEON_CRTC_EXT_CNTL,
+			RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_VSYNC_DIS,
+			~mask1);
+	    }
+	    break;
 
-    case DPMSModeOff:
-	/* Screen: Off; HSync: Off, VSync: Off */
-	if (info->IsSecondary)
-	    OUTREGP(RADEON_CRTC2_GEN_CNTL, mask2, ~mask2);
-	else {
-	    if (info->Clone)
+	case DPMSModeOff:
+	    /* Screen: Off; HSync: Off, VSync: Off */
+	    if (info->IsSecondary)
 		OUTREGP(RADEON_CRTC2_GEN_CNTL, mask2, ~mask2);
-	    OUTREGP(RADEON_CRTC_EXT_CNTL, mask1, ~mask1);
+	    else {
+		if (info->Clone)
+		    OUTREGP(RADEON_CRTC2_GEN_CNTL, mask2, ~mask2);
+		OUTREGP(RADEON_CRTC_EXT_CNTL, mask1, ~mask1);
+	    }
+	    break;
 	}
-	break;
     }
+
+#ifdef XF86DRI
+    if (info->CPStarted) DRIUnlock(pScrn->pScreen);
+#endif
 }
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_misc.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_misc.c
index 751e561cf..d9c978fee 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_misc.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_misc.c
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_misc.c,v 1.6 2002/04/24 16:20:40 martin Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_misc.c,v 1.7 2003/01/01 19:16:35 tsi Exp $ */
 /*
- * Copyright 2000 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 2000 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
@@ -63,13 +63,13 @@ RADEONSetup
     static Bool Inited = FALSE;
 
     if (!Inited) {
-	/* Ensure main driver module is loaded, but not as a submodule */
-	if (!xf86ServerIsOnlyDetecting() && !LoaderSymbol(ATI_NAME))
-	    xf86LoadOneModule(ATI_DRIVER_NAME, Options);
+        /* Ensure main driver module is loaded, but not as a submodule */
+        if (!xf86ServerIsOnlyDetecting() && !LoaderSymbol(ATI_NAME))
+            xf86LoadOneModule(ATI_DRIVER_NAME, Options);
 
-	RADEONLoaderRefSymLists();
+        RADEONLoaderRefSymLists();
 
-	Inited = TRUE;
+        Inited = TRUE;
     }
 
     return (pointer)TRUE;
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_probe.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_probe.c
index 64c575365..bcf80c188 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_probe.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_probe.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_probe.c,v 1.20 2002/10/12 01:38:07 martin Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_probe.c,v 1.24 2003/02/07 20:41:15 martin Exp $ */
 /*
  * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and
  *                VA Linux Systems Inc., Fremont, California.
@@ -78,15 +78,24 @@ SymTabRec RADEONChipsets[] = {
     { PCI_CHIP_RADEON_QE, "ATI Radeon QE (AGP)" },
     { PCI_CHIP_RADEON_QF, "ATI Radeon QF (AGP)" },
     { PCI_CHIP_RADEON_QG, "ATI Radeon QG (AGP)" },
-    { PCI_CHIP_RADEON_QY, "ATI Radeon VE QY (AGP)" },
-    { PCI_CHIP_RADEON_QZ, "ATI Radeon VE QZ (AGP)" },
+    { PCI_CHIP_RV100_QY, "ATI Radeon VE/7000 QY (AGP)" },
+    { PCI_CHIP_RV100_QZ, "ATI Radeon VE/7000 QZ (AGP)" },
     { PCI_CHIP_RADEON_LW, "ATI Radeon Mobility M7 LW (AGP)" },
-    { PCI_CHIP_RADEON_LX, "ATI Radeon Mobility M7 LX (AGP)" },
+    { PCI_CHIP_RADEON_LX, "ATI Mobility FireGL 7800 M7 LX (AGP)" },
     { PCI_CHIP_RADEON_LY, "ATI Radeon Mobility M6 LY (AGP)" },
     { PCI_CHIP_RADEON_LZ, "ATI Radeon Mobility M6 LZ (AGP)" },
+    { PCI_CHIP_R200_QH, "ATI FireGL 8700/8800 QH (AGP)" },
+    { PCI_CHIP_R200_QI, "ATI Radeon 8500 QI (AGP)" },
+    { PCI_CHIP_R200_QJ, "ATI Radeon 8500 QJ (AGP)" },
+    { PCI_CHIP_R200_QK, "ATI Radeon 8500 QK (AGP)" },
     { PCI_CHIP_R200_QL, "ATI Radeon 8500 QL (AGP)" },
+    { PCI_CHIP_R200_QM, "ATI Radeon 9100 QM (AGP)" },
     { PCI_CHIP_R200_QN, "ATI Radeon 8500 QN (AGP)" },
     { PCI_CHIP_R200_QO, "ATI Radeon 8500 QO (AGP)" },
+    { PCI_CHIP_R200_Qh, "ATI Radeon 8500 Qh (AGP)" },
+    { PCI_CHIP_R200_Qi, "ATI Radeon 8500 Qi (AGP)" },
+    { PCI_CHIP_R200_Qj, "ATI Radeon 8500 Qj (AGP)" },
+    { PCI_CHIP_R200_Qk, "ATI Radeon 8500 Qk (AGP)" },
     { PCI_CHIP_R200_Ql, "ATI Radeon 8500 Ql (AGP)" },
     { PCI_CHIP_R200_BB, "ATI Radeon 8500 BB (AGP)" },
     { PCI_CHIP_RV200_QW, "ATI Radeon 7500 QW (AGP)" },
@@ -99,10 +108,14 @@ SymTabRec RADEONChipsets[] = {
     { PCI_CHIP_RV250_Le, "ATI Radeon Mobility M9 Le (AGP)" },
     { PCI_CHIP_RV250_Lf, "ATI Radeon Mobility M9 Lf (AGP)" },
     { PCI_CHIP_RV250_Lg, "ATI Radeon Mobility M9 Lg (AGP)" },
-    { PCI_CHIP_R300_ND, "ATI Radeon 9700 ND (AGP)" },
-    { PCI_CHIP_R300_NE, "ATI Radeon 9700 NE (AGP)" },
+    { PCI_CHIP_R300_AD, "ATI Radeon 9500 AD (AGP)" },
+    { PCI_CHIP_R300_AE, "ATI Radeon 9500 AE (AGP)" },
+    { PCI_CHIP_R300_AF, "ATI Radeon 9500 AF (AGP)" },
+    { PCI_CHIP_R300_AG, "ATI FireGL Z1/X1 AG (AGP)" },
+    { PCI_CHIP_R300_ND, "ATI Radeon 9700 Pro ND (AGP)" },
+    { PCI_CHIP_R300_NE, "ATI Radeon 9700/9500Pro NE (AGP)" },
     { PCI_CHIP_R300_NF, "ATI Radeon 9700 NF (AGP)" },
-    { PCI_CHIP_R300_NG, "ATI Radeon 9700 NG (AGP)" },
+    { PCI_CHIP_R300_NG, "ATI FireGL X1 NG (AGP)" },
     { -1,                 NULL }
 };
 
@@ -111,15 +124,24 @@ PciChipsets RADEONPciChipsets[] = {
     { PCI_CHIP_RADEON_QE, PCI_CHIP_RADEON_QE, RES_SHARED_VGA },
     { PCI_CHIP_RADEON_QF, PCI_CHIP_RADEON_QF, RES_SHARED_VGA },
     { PCI_CHIP_RADEON_QG, PCI_CHIP_RADEON_QG, RES_SHARED_VGA },
-    { PCI_CHIP_RADEON_QY, PCI_CHIP_RADEON_QY, RES_SHARED_VGA },
-    { PCI_CHIP_RADEON_QZ, PCI_CHIP_RADEON_QZ, RES_SHARED_VGA },
+    { PCI_CHIP_RV100_QY, PCI_CHIP_RV100_QY, RES_SHARED_VGA },
+    { PCI_CHIP_RV100_QZ, PCI_CHIP_RV100_QZ, RES_SHARED_VGA },
     { PCI_CHIP_RADEON_LW, PCI_CHIP_RADEON_LW, RES_SHARED_VGA },
     { PCI_CHIP_RADEON_LX, PCI_CHIP_RADEON_LX, RES_SHARED_VGA },
     { PCI_CHIP_RADEON_LY, PCI_CHIP_RADEON_LY, RES_SHARED_VGA },
     { PCI_CHIP_RADEON_LZ, PCI_CHIP_RADEON_LZ, RES_SHARED_VGA },
+    { PCI_CHIP_R200_QH, PCI_CHIP_R200_QH, RES_SHARED_VGA },
+    { PCI_CHIP_R200_QI, PCI_CHIP_R200_QI, RES_SHARED_VGA },
+    { PCI_CHIP_R200_QJ, PCI_CHIP_R200_QJ, RES_SHARED_VGA },
+    { PCI_CHIP_R200_QK, PCI_CHIP_R200_QK, RES_SHARED_VGA },
     { PCI_CHIP_R200_QL, PCI_CHIP_R200_QL, RES_SHARED_VGA },
+    { PCI_CHIP_R200_QM, PCI_CHIP_R200_QM, RES_SHARED_VGA },
     { PCI_CHIP_R200_QN, PCI_CHIP_R200_QN, RES_SHARED_VGA },
     { PCI_CHIP_R200_QO, PCI_CHIP_R200_QO, RES_SHARED_VGA },
+    { PCI_CHIP_R200_Qh, PCI_CHIP_R200_Qh, RES_SHARED_VGA },
+    { PCI_CHIP_R200_Qi, PCI_CHIP_R200_Qi, RES_SHARED_VGA },
+    { PCI_CHIP_R200_Qj, PCI_CHIP_R200_Qj, RES_SHARED_VGA },
+    { PCI_CHIP_R200_Qk, PCI_CHIP_R200_Qk, RES_SHARED_VGA },
     { PCI_CHIP_R200_Ql, PCI_CHIP_R200_Ql, RES_SHARED_VGA },
     { PCI_CHIP_R200_BB, PCI_CHIP_R200_BB, RES_SHARED_VGA },
     { PCI_CHIP_RV200_QW, PCI_CHIP_RV200_QW, RES_SHARED_VGA },
@@ -132,6 +154,10 @@ PciChipsets RADEONPciChipsets[] = {
     { PCI_CHIP_RV250_Le, PCI_CHIP_RV250_Le, RES_SHARED_VGA },
     { PCI_CHIP_RV250_Lf, PCI_CHIP_RV250_Lf, RES_SHARED_VGA },
     { PCI_CHIP_RV250_Lg, PCI_CHIP_RV250_Lg, RES_SHARED_VGA },
+    { PCI_CHIP_R300_AD, PCI_CHIP_R300_AD, RES_SHARED_VGA },
+    { PCI_CHIP_R300_AE, PCI_CHIP_R300_AE, RES_SHARED_VGA },
+    { PCI_CHIP_R300_AF, PCI_CHIP_R300_AF, RES_SHARED_VGA },
+    { PCI_CHIP_R300_AG, PCI_CHIP_R300_AG, RES_SHARED_VGA },
     { PCI_CHIP_R300_ND, PCI_CHIP_R300_ND, RES_SHARED_VGA },
     { PCI_CHIP_R300_NE, PCI_CHIP_R300_NE, RES_SHARED_VGA },
     { PCI_CHIP_R300_NF, PCI_CHIP_R300_NF, RES_SHARED_VGA },
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_reg.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_reg.h
index 3a61991cf..adf38650d 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_reg.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_reg.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_reg.h,v 1.20 2002/10/12 01:38:07 martin Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_reg.h,v 1.25 2003/02/07 18:08:59 martin Exp $ */
 /*
  * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and
  *                VA Linux Systems Inc., Fremont, California.
@@ -31,7 +31,7 @@
  * Authors:
  *   Kevin E. Martin <martin@xfree86.org>
  *   Rickard E. Faith <faith@valinux.com>
- *   Alan Hourihane <ahourihane@valinux.com>
+ *   Alan Hourihane <alanh@fairlite.demon.co.uk>
  *
  * References:
  *
@@ -53,85 +53,6 @@
 #ifndef _RADEON_REG_H_
 #define _RADEON_REG_H_
 
-#include "xf86_ansic.h"
-#include "compiler.h"
-
-				/* Memory mapped register access macros */
-#define INREG8(addr)        MMIO_IN8(RADEONMMIO, addr)
-#define INREG16(addr)       MMIO_IN16(RADEONMMIO, addr)
-#define INREG(addr)         MMIO_IN32(RADEONMMIO, addr)
-#define OUTREG8(addr, val)  MMIO_OUT8(RADEONMMIO, addr, val)
-#define OUTREG16(addr, val) MMIO_OUT16(RADEONMMIO, addr, val)
-#define OUTREG(addr, val)   MMIO_OUT32(RADEONMMIO, addr, val)
-
-#define ADDRREG(addr)       ((volatile CARD32 *)(pointer)(RADEONMMIO + (addr)))
-
-
-#define OUTREGP(addr, val, mask)					\
-do {									\
-    CARD32 tmp = INREG(addr);						\
-    tmp &= (mask);							\
-    tmp |= (val);							\
-    OUTREG(addr, tmp);							\
-} while (0)
-
-#define INPLL(pScrn, addr) RADEONINPLL(pScrn, addr)
-
-#define OUTPLL(addr, val)						\
-do {									\
-    OUTREG8(RADEON_CLOCK_CNTL_INDEX, (((addr) & 0x3f) |			\
-				      RADEON_PLL_WR_EN));		\
-    OUTREG(RADEON_CLOCK_CNTL_DATA, val);				\
-} while (0)
-
-#define OUTPLLP(pScrn, addr, val, mask)					\
-do {									\
-    CARD32 tmp = INPLL(pScrn, addr);					\
-    tmp &= (mask);							\
-    tmp |= (val);							\
-    OUTPLL(addr, tmp);							\
-} while (0)
-
-#define OUTPAL_START(idx)						\
-do {									\
-    OUTREG8(RADEON_PALETTE_INDEX, (idx));				\
-} while (0)
-
-#define OUTPAL_NEXT(r, g, b)						\
-do {									\
-    OUTREG(RADEON_PALETTE_DATA, ((r) << 16) | ((g) << 8) | (b));	\
-} while (0)
-
-#define OUTPAL_NEXT_CARD32(v)						\
-do {									\
-    OUTREG(RADEON_PALETTE_DATA, (v & 0x00ffffff));			\
-} while (0)
-
-#define OUTPAL(idx, r, g, b)						\
-do {									\
-    OUTPAL_START((idx));						\
-    OUTPAL_NEXT((r), (g), (b));						\
-} while (0)
-
-#define INPAL_START(idx)						\
-do {									\
-    OUTREG(RADEON_PALETTE_INDEX, (idx) << 16);				\
-} while (0)
-
-#define INPAL_NEXT() INREG(RADEON_PALETTE_DATA)
-
-#define PAL_SELECT(idx)							\
-do {									\
-    if (!idx) {								\
-	OUTREG(RADEON_DAC_CNTL2, INREG(RADEON_DAC_CNTL2) &		\
-	       (CARD32)~RADEON_DAC2_PALETTE_ACC_CTL);			\
-    } else {								\
-	OUTREG(RADEON_DAC_CNTL2, INREG(RADEON_DAC_CNTL2) |		\
-	       RADEON_DAC2_PALETTE_ACC_CTL);				\
-    }									\
-} while (0)
-
-
 				/* Registers for 2D/Video/Overlay */
 #define RADEON_ADAPTER_ID                   0x0f2c /* PCI */
 #define RADEON_AGP_BASE                     0x0170
@@ -150,7 +71,8 @@ do {									\
 #       define RADEON_AGP_1X_MODE           0x01
 #       define RADEON_AGP_2X_MODE           0x02
 #       define RADEON_AGP_4X_MODE           0x04
-#       define RADEON_AGP_MODE_MASK         0x07
+#       define RADEON_AGP_FW_MODE           0x10
+#       define RADEON_AGP_MODE_MASK         0x17
 #define RADEON_ATTRDR                       0x03c1 /* VGA */
 #define RADEON_ATTRDW                       0x03c0 /* VGA */
 #define RADEON_ATTRX                        0x03c0 /* VGA */
@@ -295,6 +217,10 @@ do {									\
 #define RADEON_CONFIG_APER_SIZE             0x0108
 #define RADEON_CONFIG_BONDS                 0x00e8
 #define RADEON_CONFIG_CNTL                  0x00e0
+#       define RADEON_CFG_ATI_REV_A11       (0   << 16)
+#       define RADEON_CFG_ATI_REV_A12       (1   << 16)
+#       define RADEON_CFG_ATI_REV_A13       (2   << 16)
+#       define RADEON_CFG_ATI_REV_ID_MASK   (0xf << 16)
 #define RADEON_CONFIG_MEMSIZE               0x00f8
 #define RADEON_CONFIG_MEMSIZE_EMBEDDED      0x0114
 #define RADEON_CONFIG_REG_1_BASE            0x010c
@@ -307,7 +233,6 @@ do {									\
 #define RADEON_CRC_CMDFIFO_ADDR             0x0740
 #define RADEON_CRC_CMDFIFO_DOUT             0x0744
 #define RADEON_CRTC_CRNT_FRAME              0x0214
-#define RADEON_CRTC_DEBUG                   0x021c
 #define RADEON_CRTC_EXT_CNTL                0x0054
 #       define RADEON_CRTC_VGA_XOVERSCAN    (1 <<  0)
 #       define RADEON_VGA_ATI_LINEAR        (1 <<  3)
@@ -382,6 +307,10 @@ do {									\
 #define RADEON_CRTC2_PITCH                  0x032c
 #define RADEON_CRTC_STATUS                  0x005c
 #       define RADEON_CRTC_VBLANK_SAVE      (1 <<  1)
+#       define RADEON_CRTC_VBLANK_SAVE_CLEAR  (1 <<  1)
+#define RADEON_CRTC2_STATUS                  0x03fc
+#       define RADEON_CRTC2_VBLANK_SAVE      (1 <<  1)
+#       define RADEON_CRTC2_VBLANK_SAVE_CLEAR  (1 <<  1)
 #define RADEON_CRTC_V_SYNC_STRT_WID         0x020c
 #       define RADEON_CRTC_V_SYNC_STRT        (0x7ff <<  0)
 #       define RADEON_CRTC_V_SYNC_STRT_SHIFT  0
@@ -407,7 +336,6 @@ do {									\
 #define RADEON_CRTC_VLINE_CRNT_VLINE        0x0210
 #       define RADEON_CRTC_CRNT_VLINE_MASK  (0x7ff << 16)
 #define RADEON_CRTC2_CRNT_FRAME             0x0314
-#define RADEON_CRTC2_DEBUG                  0x031c
 #define RADEON_CRTC2_GUI_TRIG_VLINE         0x0318
 #define RADEON_CRTC2_STATUS                 0x03fc
 #define RADEON_CRTC2_VLINE_CRNT_VLINE       0x0310
@@ -573,6 +501,7 @@ do {									\
 #define RADEON_DST_LINE_START               0x1600
 #define RADEON_DST_LINE_END                 0x1604
 #define RADEON_DST_LINE_PATCOUNT            0x1608
+#       define RADEON_BRES_CNTL_SHIFT       8
 #define RADEON_DST_OFFSET                   0x1404
 #define RADEON_DST_PITCH                    0x1408
 #define RADEON_DST_PITCH_OFFSET             0x142c
@@ -635,6 +564,7 @@ do {									\
 #define RADEON_FP_GEN_CNTL                  0x0284
 #       define RADEON_FP_FPON                  (1 <<  0)
 #       define RADEON_FP_TMDS_EN               (1 <<  2)
+#       define RADEON_FP_PANEL_FORMAT          (1 <<  3)
 #       define RADEON_FP_EN_TMDS               (1 <<  7)
 #       define RADEON_FP_DETECT_SENSE          (1 <<  8)
 #       define RADEON_FP_SEL_CRTC2             (1 << 13)
@@ -693,6 +623,8 @@ do {									\
 #define RADEON_GEN_INT_STATUS               0x0044
 #       define RADEON_VSYNC_INT_AK          (1 <<  2)
 #       define RADEON_VSYNC_INT             (1 <<  2)
+#       define RADEON_VSYNC2_INT_AK         (1 <<  6)
+#       define RADEON_VSYNC2_INT            (1 <<  6)
 #define RADEON_GENENB                       0x03c3 /* VGA */
 #define RADEON_GENFC_RD                     0x03ca /* VGA */
 #define RADEON_GENFC_WT                     0x03da /* VGA, 0x03ba */
@@ -717,13 +649,6 @@ do {									\
 #       define RADEON_GPIO_MASK_1           (1 << 25) /*??*/
 #define RADEON_GRPH8_DATA                   0x03cf /* VGA */
 #define RADEON_GRPH8_IDX                    0x03ce /* VGA */
-#define RADEON_GUI_DEBUG0                   0x16a0
-#define RADEON_GUI_DEBUG1                   0x16a4
-#define RADEON_GUI_DEBUG2                   0x16a8
-#define RADEON_GUI_DEBUG3                   0x16ac
-#define RADEON_GUI_DEBUG4                   0x16b0
-#define RADEON_GUI_DEBUG5                   0x16b4
-#define RADEON_GUI_DEBUG6                   0x16b8
 #define RADEON_GUI_SCRATCH_REG0             0x15e0
 #define RADEON_GUI_SCRATCH_REG1             0x15e4
 #define RADEON_GUI_SCRATCH_REG2             0x15e8
@@ -745,8 +670,6 @@ do {									\
 #       define RADEON_HDP_SOFT_RESET        (1 << 26)
 #define RADEON_HTOTAL_CNTL                  0x0009 /* PLL */
 #define RADEON_HTOTAL2_CNTL                 0x002e /* PLL */
-#define RADEON_HW_DEBUG                     0x0128
-#define RADEON_HW_DEBUG2                    0x011c
 
 #define RADEON_I2C_CNTL_1                   0x0094 /* ? */
 #define RADEON_DVI_I2C_CNTL_1               0x02e4 /* ? */
@@ -798,6 +721,9 @@ do {									\
 #define RADEON_MM_DATA                      0x0004
 #define RADEON_MM_INDEX                     0x0000
 #define RADEON_MPLL_CNTL                    0x000e /* PLL */
+#define RADEON_MPP_TB_CONFIG                0x01c0 /* ? */
+#define RADEON_MPP_GP_CONFIG                0x01c8 /* ? */
+
 
 #define RADEON_N_VIF_COUNT                  0x0248
 
@@ -953,6 +879,8 @@ do {									\
 #       define RADEON_P2PLL_REF_DIV_MASK    0x03ff
 #       define RADEON_P2PLL_ATOMIC_UPDATE_R (1 << 15) /* same as _W */
 #       define RADEON_P2PLL_ATOMIC_UPDATE_W (1 << 15) /* same as _R */
+#       define R300_PPLL_REF_DIV_ACC_MASK   (0x3ff < 18)
+#       define R300_PPLL_REF_DIV_ACC_SHIFT  18
 #define RADEON_PALETTE_DATA                 0x00b4
 #define RADEON_PALETTE_30_DATA              0x00b8
 #define RADEON_PALETTE_INDEX                0x00b0
@@ -1208,7 +1136,7 @@ do {									\
 #       define RADEON_MAX_ANISO_8_TO_1                     (3  <<  5)
 #       define RADEON_MAX_ANISO_16_TO_1                    (4  <<  5)
 #       define RADEON_MAX_ANISO_MASK                       (7  <<  5)
-#       define RADEON_LOD_BIAS_MASK                        (0xffff <<  8)
+#       define RADEON_LOD_BIAS_MASK                        (0xff <<  8)
 #       define RADEON_LOD_BIAS_SHIFT                       8
 #       define RADEON_MAX_MIP_LEVEL_MASK                   (0x0f << 16)
 #       define RADEON_MAX_MIP_LEVEL_SHIFT                  16
@@ -1251,6 +1179,10 @@ do {									\
 #       define RADEON_TXFORMAT_WIDTH_SHIFT        8
 #       define RADEON_TXFORMAT_HEIGHT_MASK        (15 << 12)
 #       define RADEON_TXFORMAT_HEIGHT_SHIFT       12
+#       define RADEON_TXFORMAT_F5_WIDTH_MASK      (15 << 16)
+#       define RADEON_TXFORMAT_F5_WIDTH_SHIFT     16
+#       define RADEON_TXFORMAT_F5_HEIGHT_MASK     (15 << 20)
+#       define RADEON_TXFORMAT_F5_HEIGHT_SHIFT    20
 #       define RADEON_TXFORMAT_ST_ROUTE_STQ0      (0  << 24)
 #       define RADEON_TXFORMAT_ST_ROUTE_MASK      (3  << 24)
 #       define RADEON_TXFORMAT_ST_ROUTE_STQ1      (1  << 24)
@@ -1263,6 +1195,26 @@ do {									\
 #       define RADEON_TXFORMAT_CHROMA_KEY_ENABLE  (1  << 29)
 #       define RADEON_TXFORMAT_CUBIC_MAP_ENABLE   (1  << 30)
 #       define RADEON_TXFORMAT_PERSPECTIVE_ENABLE (1  << 31)
+#define RADEON_PP_CUBIC_FACES_0             0x1d24
+#define RADEON_PP_CUBIC_FACES_1             0x1d28
+#define RADEON_PP_CUBIC_FACES_2             0x1d2c
+#       define RADEON_FACE_WIDTH_1_SHIFT          0
+#       define RADEON_FACE_HEIGHT_1_SHIFT         4
+#       define RADEON_FACE_WIDTH_1_MASK           (0xf << 0)
+#       define RADEON_FACE_HEIGHT_1_MASK          (0xf << 4)
+#       define RADEON_FACE_WIDTH_2_SHIFT          8
+#       define RADEON_FACE_HEIGHT_2_SHIFT         12
+#       define RADEON_FACE_WIDTH_2_MASK           (0xf << 8)
+#       define RADEON_FACE_HEIGHT_2_MASK          (0xf << 12)
+#       define RADEON_FACE_WIDTH_3_SHIFT          16
+#       define RADEON_FACE_HEIGHT_3_SHIFT         20
+#       define RADEON_FACE_WIDTH_3_MASK           (0xf << 16)
+#       define RADEON_FACE_HEIGHT_3_MASK          (0xf << 20)
+#       define RADEON_FACE_WIDTH_4_SHIFT          24
+#       define RADEON_FACE_HEIGHT_4_SHIFT         28
+#       define RADEON_FACE_WIDTH_4_MASK           (0xf << 24)
+#       define RADEON_FACE_HEIGHT_4_MASK          (0xf << 28)
+
 #define RADEON_PP_TXOFFSET_0                0x1c5c
 #define RADEON_PP_TXOFFSET_1                0x1c74
 #define RADEON_PP_TXOFFSET_2                0x1c8c
@@ -1277,6 +1229,35 @@ do {									\
 #       define RADEON_TXO_MICRO_TILE_OPT     (2 << 3)
 #       define RADEON_TXO_OFFSET_MASK        0xffffffe0
 #       define RADEON_TXO_OFFSET_SHIFT       5
+
+#define RADEON_PP_CUBIC_OFFSET_T0_0         0x1dd0  /* bits [31:5] */
+#define RADEON_PP_CUBIC_OFFSET_T0_1         0x1dd4
+#define RADEON_PP_CUBIC_OFFSET_T0_2         0x1dd8
+#define RADEON_PP_CUBIC_OFFSET_T0_3         0x1ddc
+#define RADEON_PP_CUBIC_OFFSET_T0_4         0x1de0
+#define RADEON_PP_CUBIC_OFFSET_T1_0         0x1e00
+#define RADEON_PP_CUBIC_OFFSET_T1_1         0x1e04
+#define RADEON_PP_CUBIC_OFFSET_T1_2         0x1e08
+#define RADEON_PP_CUBIC_OFFSET_T1_3         0x1e0c
+#define RADEON_PP_CUBIC_OFFSET_T1_4         0x1e10
+#define RADEON_PP_CUBIC_OFFSET_T2_0         0x1e14
+#define RADEON_PP_CUBIC_OFFSET_T2_1         0x1e18
+#define RADEON_PP_CUBIC_OFFSET_T2_2         0x1e1c
+#define RADEON_PP_CUBIC_OFFSET_T2_3         0x1e20
+#define RADEON_PP_CUBIC_OFFSET_T2_4         0x1e24
+
+#define RADEON_PP_TEX_SIZE_0                0x1d04  /* NPOT */
+#define RADEON_PP_TEX_SIZE_1                0x1d0c
+#define RADEON_PP_TEX_SIZE_2                0x1d14
+#       define RADEON_TEX_USIZE_MASK        (0x7ff << 0)
+#       define RADEON_TEX_USIZE_SHIFT       0
+#       define RADEON_TEX_VSIZE_MASK        (0x7ff << 16)
+#       define RADEON_TEX_VSIZE_SHIFT       16
+#       define RADEON_SIGNED_RGB_MASK       (1 << 30)
+#       define RADEON_SIGNED_RGB_SHIFT      30
+#       define RADEON_SIGNED_ALPHA_MASK     (1 << 31)
+#       define RADEON_SIGNED_ALPHA_SHIFT    31
+
 #define RADEON_PP_TXCBLEND_0                0x1c60
 #define RADEON_PP_TXCBLEND_1                0x1c78
 #define RADEON_PP_TXCBLEND_2                0x1c90
@@ -1455,8 +1436,6 @@ do {									\
 #       define RADEON_COLOR_FORMAT_aYUV444     (14 << 10)
 #       define RADEON_COLOR_FORMAT_ARGB4444    (15 << 10)
 #       define RADEON_CLRCMP_FLIP_ENABLE       (1  << 14)
-#       define RADEON_ZBLOCK8                  (0  << 15)
-#       define RADEON_ZBLOCK16                 (1  << 15)
 #define RADEON_RB3D_COLOROFFSET             0x1c40
 #       define RADEON_COLOROFFSET_MASK      0xfffffff0
 #define RADEON_RB3D_COLORPITCH              0x1c48
@@ -1517,7 +1496,6 @@ do {									\
 #       define RADEON_Z_TEST_NEQUAL              (6  <<  4)
 #       define RADEON_Z_TEST_ALWAYS              (7  <<  4)
 #       define RADEON_Z_TEST_MASK                (7  <<  4)
-#       define RADEON_HIERARCHICAL_Z_ENABLE      (1  <<  8)
 #       define RADEON_STENCIL_TEST_NEVER         (0  << 12)
 #       define RADEON_STENCIL_TEST_LESS          (1  << 12)
 #       define RADEON_STENCIL_TEST_LEQUAL        (2  << 12)
@@ -1551,7 +1529,6 @@ do {									\
 #       define RADEON_Z_COMPRESSION_ENABLE       (1  << 28)
 #       define RADEON_FORCE_Z_DIRTY              (1  << 29)
 #       define RADEON_Z_WRITE_ENABLE             (1  << 30)
-#       define RADEON_Z_DECOMPRESSION_ENABLE     (1  << 31)
 #define RADEON_RE_LINE_PATTERN              0x1cd0
 #       define RADEON_LINE_PATTERN_MASK             0x0000ffff
 #       define RADEON_LINE_REPEAT_COUNT_SHIFT       16
@@ -1647,6 +1624,24 @@ do {									\
 #       define RADEON_TEX1_W_ROUTING_USE_Q1      (1 << 26)
 #define RADEON_SE_LINE_WIDTH                0x1db8
 #define RADEON_SE_TCL_LIGHT_MODEL_CTL       0x226c
+#       define RADEON_LIGHTING_ENABLE              (1 << 0)
+#       define RADEON_LIGHT_IN_MODELSPACE          (1 << 1)
+#       define RADEON_LOCAL_VIEWER                 (1 << 2)
+#       define RADEON_NORMALIZE_NORMALS            (1 << 3)
+#       define RADEON_RESCALE_NORMALS              (1 << 4)
+#       define RADEON_SPECULAR_LIGHTS              (1 << 5)
+#       define RADEON_DIFFUSE_SPECULAR_COMBINE     (1 << 6)
+#       define RADEON_LIGHT_ALPHA                  (1 << 7)
+#       define RADEON_LOCAL_LIGHT_VEC_GL           (1 << 8)
+#       define RADEON_LIGHT_NO_NORMAL_AMBIENT_ONLY (1 << 9)
+#       define RADEON_LM_SOURCE_STATE_PREMULT      0
+#       define RADEON_LM_SOURCE_STATE_MULT         1
+#       define RADEON_LM_SOURCE_VERTEX_DIFFUSE     2
+#       define RADEON_LM_SOURCE_VERTEX_SPECULAR    3
+#       define RADEON_EMISSIVE_SOURCE_SHIFT        16
+#       define RADEON_AMBIENT_SOURCE_SHIFT         18
+#       define RADEON_DIFFUSE_SOURCE_SHIFT         20
+#       define RADEON_SPECULAR_SOURCE_SHIFT        22
 #define RADEON_SE_TCL_MATERIAL_AMBIENT_RED     0x2220
 #define RADEON_SE_TCL_MATERIAL_AMBIENT_GREEN   0x2224
 #define RADEON_SE_TCL_MATERIAL_AMBIENT_BLUE    0x2228
@@ -1664,16 +1659,158 @@ do {									\
 #define RADEON_SE_TCL_MATERIAL_SPECULAR_BLUE   0x2248
 #define RADEON_SE_TCL_MATERIAL_SPECULAR_ALPHA  0x224c
 #define RADEON_SE_TCL_MATRIX_SELECT_0       0x225c
+#       define RADEON_MODELVIEW_0_SHIFT        0
+#       define RADEON_MODELVIEW_1_SHIFT        4
+#       define RADEON_MODELVIEW_2_SHIFT        8
+#       define RADEON_MODELVIEW_3_SHIFT        12
+#       define RADEON_IT_MODELVIEW_0_SHIFT     16
+#       define RADEON_IT_MODELVIEW_1_SHIFT     20
+#       define RADEON_IT_MODELVIEW_2_SHIFT     24
+#       define RADEON_IT_MODELVIEW_3_SHIFT     28
 #define RADEON_SE_TCL_MATRIX_SELECT_1       0x2260
+#       define RADEON_MODELPROJECT_0_SHIFT     0
+#       define RADEON_MODELPROJECT_1_SHIFT     4
+#       define RADEON_MODELPROJECT_2_SHIFT     8
+#       define RADEON_MODELPROJECT_3_SHIFT     12
+#       define RADEON_TEXMAT_0_SHIFT           16
+#       define RADEON_TEXMAT_1_SHIFT           20
+#       define RADEON_TEXMAT_2_SHIFT           24
+#       define RADEON_TEXMAT_3_SHIFT           28
+
+
 #define RADEON_SE_TCL_OUTPUT_VTX_FMT        0x2254
+#       define RADEON_TCL_VTX_W0                 (1 <<  0)
+#       define RADEON_TCL_VTX_FP_DIFFUSE         (1 <<  1)
+#       define RADEON_TCL_VTX_FP_ALPHA           (1 <<  2)
+#       define RADEON_TCL_VTX_PK_DIFFUSE         (1 <<  3)
+#       define RADEON_TCL_VTX_FP_SPEC            (1 <<  4)
+#       define RADEON_TCL_VTX_FP_FOG             (1 <<  5)
+#       define RADEON_TCL_VTX_PK_SPEC            (1 <<  6)
+#       define RADEON_TCL_VTX_ST0                (1 <<  7)
+#       define RADEON_TCL_VTX_ST1                (1 <<  8)
+#       define RADEON_TCL_VTX_Q1                 (1 <<  9)
+#       define RADEON_TCL_VTX_ST2                (1 << 10)
+#       define RADEON_TCL_VTX_Q2                 (1 << 11)
+#       define RADEON_TCL_VTX_ST3                (1 << 12)
+#       define RADEON_TCL_VTX_Q3                 (1 << 13)
+#       define RADEON_TCL_VTX_Q0                 (1 << 14)
+#       define RADEON_TCL_VTX_WEIGHT_COUNT_SHIFT 15
+#       define RADEON_TCL_VTX_NORM0              (1 << 18)
+#       define RADEON_TCL_VTX_XY1                (1 << 27)
+#       define RADEON_TCL_VTX_Z1                 (1 << 28)
+#       define RADEON_TCL_VTX_W1                 (1 << 29)
+#       define RADEON_TCL_VTX_NORM1              (1 << 30)
+#       define RADEON_TCL_VTX_Z0                 (1 << 31)
+
 #define RADEON_SE_TCL_OUTPUT_VTX_SEL        0x2258
+#       define RADEON_TCL_COMPUTE_XYZW           (1 << 0)
+#       define RADEON_TCL_COMPUTE_DIFFUSE        (1 << 1)
+#       define RADEON_TCL_COMPUTE_SPECULAR       (1 << 2)
+#       define RADEON_TCL_FORCE_NAN_IF_COLOR_NAN (1 << 3)
+#       define RADEON_TCL_FORCE_INORDER_PROC     (1 << 4)
+#       define RADEON_TCL_TEX_INPUT_TEX_0        0
+#       define RADEON_TCL_TEX_INPUT_TEX_1        1
+#       define RADEON_TCL_TEX_INPUT_TEX_2        2
+#       define RADEON_TCL_TEX_INPUT_TEX_3        3
+#       define RADEON_TCL_TEX_COMPUTED_TEX_0     8
+#       define RADEON_TCL_TEX_COMPUTED_TEX_1     9
+#       define RADEON_TCL_TEX_COMPUTED_TEX_2     10
+#       define RADEON_TCL_TEX_COMPUTED_TEX_3     11
+#       define RADEON_TCL_TEX_0_OUTPUT_SHIFT     16
+#       define RADEON_TCL_TEX_1_OUTPUT_SHIFT     20
+#       define RADEON_TCL_TEX_2_OUTPUT_SHIFT     24
+#       define RADEON_TCL_TEX_3_OUTPUT_SHIFT     28
+
 #define RADEON_SE_TCL_PER_LIGHT_CTL_0       0x2270
+#       define RADEON_LIGHT_0_ENABLE               (1 <<  0)
+#       define RADEON_LIGHT_0_ENABLE_AMBIENT       (1 <<  1)
+#       define RADEON_LIGHT_0_ENABLE_SPECULAR      (1 <<  2)
+#       define RADEON_LIGHT_0_IS_LOCAL             (1 <<  3)
+#       define RADEON_LIGHT_0_IS_SPOT              (1 <<  4)
+#       define RADEON_LIGHT_0_DUAL_CONE            (1 <<  5)
+#       define RADEON_LIGHT_0_ENABLE_RANGE_ATTEN   (1 <<  6)
+#       define RADEON_LIGHT_0_CONSTANT_RANGE_ATTEN (1 <<  7)
+#       define RADEON_LIGHT_0_SHIFT                0
+#       define RADEON_LIGHT_1_ENABLE               (1 << 16)
+#       define RADEON_LIGHT_1_ENABLE_AMBIENT       (1 << 17)
+#       define RADEON_LIGHT_1_ENABLE_SPECULAR      (1 << 18)
+#       define RADEON_LIGHT_1_IS_LOCAL             (1 << 19)
+#       define RADEON_LIGHT_1_IS_SPOT              (1 << 20)
+#       define RADEON_LIGHT_1_DUAL_CONE            (1 << 21)
+#       define RADEON_LIGHT_1_ENABLE_RANGE_ATTEN   (1 << 22)
+#       define RADEON_LIGHT_1_CONSTANT_RANGE_ATTEN (1 << 23)
+#       define RADEON_LIGHT_1_SHIFT                16
 #define RADEON_SE_TCL_PER_LIGHT_CTL_1       0x2274
+#       define RADEON_LIGHT_2_SHIFT            0
+#       define RADEON_LIGHT_3_SHIFT            16
 #define RADEON_SE_TCL_PER_LIGHT_CTL_2       0x2278
+#       define RADEON_LIGHT_4_SHIFT            0
+#       define RADEON_LIGHT_5_SHIFT            16
 #define RADEON_SE_TCL_PER_LIGHT_CTL_3       0x227c
+#       define RADEON_LIGHT_6_SHIFT            0
+#       define RADEON_LIGHT_7_SHIFT            16
+
 #define RADEON_SE_TCL_SHININESS             0x2250
+
 #define RADEON_SE_TCL_TEXTURE_PROC_CTL      0x2268
+#       define RADEON_TEXGEN_TEXMAT_0_ENABLE      (1 << 0)
+#       define RADEON_TEXGEN_TEXMAT_1_ENABLE      (1 << 1)
+#       define RADEON_TEXGEN_TEXMAT_2_ENABLE      (1 << 2)
+#       define RADEON_TEXGEN_TEXMAT_3_ENABLE      (1 << 3)
+#       define RADEON_TEXMAT_0_ENABLE             (1 << 4)
+#       define RADEON_TEXMAT_1_ENABLE             (1 << 5)
+#       define RADEON_TEXMAT_2_ENABLE             (1 << 6)
+#       define RADEON_TEXMAT_3_ENABLE             (1 << 7)
+#       define RADEON_TEXGEN_INPUT_MASK           0xf
+#       define RADEON_TEXGEN_INPUT_TEXCOORD_0     0
+#       define RADEON_TEXGEN_INPUT_TEXCOORD_1     1
+#       define RADEON_TEXGEN_INPUT_TEXCOORD_2     2
+#       define RADEON_TEXGEN_INPUT_TEXCOORD_3     3
+#       define RADEON_TEXGEN_INPUT_OBJ            4
+#       define RADEON_TEXGEN_INPUT_EYE            5
+#       define RADEON_TEXGEN_INPUT_EYE_NORMAL     6
+#       define RADEON_TEXGEN_INPUT_EYE_REFLECT    7
+#       define RADEON_TEXGEN_INPUT_EYE_NORMALIZED 8
+#       define RADEON_TEXGEN_0_INPUT_SHIFT        16
+#       define RADEON_TEXGEN_1_INPUT_SHIFT        20
+#       define RADEON_TEXGEN_2_INPUT_SHIFT        24
+#       define RADEON_TEXGEN_3_INPUT_SHIFT        28
+
 #define RADEON_SE_TCL_UCP_VERT_BLEND_CTL    0x2264
+#       define RADEON_UCP_IN_CLIP_SPACE            (1 <<  0)
+#       define RADEON_UCP_IN_MODEL_SPACE           (1 <<  1)
+#       define RADEON_UCP_ENABLE_0                 (1 <<  2)
+#       define RADEON_UCP_ENABLE_1                 (1 <<  3)
+#       define RADEON_UCP_ENABLE_2                 (1 <<  4)
+#       define RADEON_UCP_ENABLE_3                 (1 <<  5)
+#       define RADEON_UCP_ENABLE_4                 (1 <<  6)
+#       define RADEON_UCP_ENABLE_5                 (1 <<  7)
+#       define RADEON_TCL_FOG_MASK                 (3 <<  8)
+#       define RADEON_TCL_FOG_DISABLE              (0 <<  8)
+#       define RADEON_TCL_FOG_EXP                  (1 <<  8)
+#       define RADEON_TCL_FOG_EXP2                 (2 <<  8)
+#       define RADEON_TCL_FOG_LINEAR               (3 <<  8)
+#       define RADEON_RNG_BASED_FOG                (1 << 10)
+#       define RADEON_LIGHT_TWOSIDE                (1 << 11)
+#       define RADEON_BLEND_OP_COUNT_MASK          (7 << 12)
+#       define RADEON_BLEND_OP_COUNT_SHIFT         12
+#       define RADEON_POSITION_BLEND_OP_ENABLE     (1 << 16)
+#       define RADEON_NORMAL_BLEND_OP_ENABLE       (1 << 17)
+#       define RADEON_VERTEX_BLEND_SRC_0_PRIMARY   (1 << 18)
+#       define RADEON_VERTEX_BLEND_SRC_0_SECONDARY (1 << 18)
+#       define RADEON_VERTEX_BLEND_SRC_1_PRIMARY   (1 << 19)
+#       define RADEON_VERTEX_BLEND_SRC_1_SECONDARY (1 << 19)
+#       define RADEON_VERTEX_BLEND_SRC_2_PRIMARY   (1 << 20)
+#       define RADEON_VERTEX_BLEND_SRC_2_SECONDARY (1 << 20)
+#       define RADEON_VERTEX_BLEND_SRC_3_PRIMARY   (1 << 21)
+#       define RADEON_VERTEX_BLEND_SRC_3_SECONDARY (1 << 21)
+#       define RADEON_VERTEX_BLEND_WGT_MINUS_ONE   (1 << 22)
+#       define RADEON_CULL_FRONT_IS_CW             (0 << 28)
+#       define RADEON_CULL_FRONT_IS_CCW            (1 << 28)
+#       define RADEON_CULL_FRONT                   (1 << 29)
+#       define RADEON_CULL_BACK                    (1 << 30)
+#       define RADEON_FORCE_W_TO_ONE               (1 << 31)
+
 #define RADEON_SE_VPORT_XSCALE              0x1d98
 #define RADEON_SE_VPORT_XOFFSET             0x1d9c
 #define RADEON_SE_VPORT_YSCALE              0x1da0
@@ -1701,29 +1838,29 @@ do {									\
 #define RADEON_CP_IB_BUFSZ                  0x073c
 
 #define RADEON_CP_CSQ_CNTL                  0x0740
-#       define RADEON_CSQ_CNT_PRIMARY_MASK  (0xff << 0)
-#       define RADEON_CSQ_PRIDIS_INDDIS     (0    << 28)
-#       define RADEON_CSQ_PRIPIO_INDDIS     (1    << 28)
-#       define RADEON_CSQ_PRIBM_INDDIS      (2    << 28)
-#       define RADEON_CSQ_PRIPIO_INDBM      (3    << 28)
-#       define RADEON_CSQ_PRIBM_INDBM       (4    << 28)
-#       define RADEON_CSQ_PRIPIO_INDPIO     (15   << 28)
+#       define RADEON_CSQ_CNT_PRIMARY_MASK     (0xff << 0)
+#       define RADEON_CSQ_PRIDIS_INDDIS        (0    << 28)
+#       define RADEON_CSQ_PRIPIO_INDDIS        (1    << 28)
+#       define RADEON_CSQ_PRIBM_INDDIS         (2    << 28)
+#       define RADEON_CSQ_PRIPIO_INDBM         (3    << 28)
+#       define RADEON_CSQ_PRIBM_INDBM          (4    << 28)
+#       define RADEON_CSQ_PRIPIO_INDPIO        (15   << 28)
 #define RADEON_CP_CSQ_STAT                  0x07f8
-#       define RADEON_CSQ_RPTR_PRIMARY_MASK  (0xff <<  0)
-#       define RADEON_CSQ_WPTR_PRIMARY_MASK  (0xff <<  8)
-#       define RADEON_CSQ_RPTR_INDIRECT_MASK (0xff << 16)
-#       define RADEON_CSQ_WPTR_INDIRECT_MASK (0xff << 24)
+#       define RADEON_CSQ_RPTR_PRIMARY_MASK    (0xff <<  0)
+#       define RADEON_CSQ_WPTR_PRIMARY_MASK    (0xff <<  8)
+#       define RADEON_CSQ_RPTR_INDIRECT_MASK   (0xff << 16)
+#       define RADEON_CSQ_WPTR_INDIRECT_MASK   (0xff << 24)
 #define RADEON_CP_CSQ_ADDR                  0x07f0
 #define RADEON_CP_CSQ_DATA                  0x07f4
 #define RADEON_CP_CSQ_APER_PRIMARY          0x1000
 #define RADEON_CP_CSQ_APER_INDIRECT         0x1300
 
 #define RADEON_CP_RB_WPTR_DELAY             0x0718
-#       define RADEON_PRE_WRITE_TIMER_SHIFT 0
-#       define RADEON_PRE_WRITE_LIMIT_SHIFT 23
+#       define RADEON_PRE_WRITE_TIMER_SHIFT    0
+#       define RADEON_PRE_WRITE_LIMIT_SHIFT    23
 
 #define RADEON_AIC_CNTL                     0x01d0
-#       define RADEON_PCIGART_TRANSLATE_EN  (1 << 0)
+#       define RADEON_PCIGART_TRANSLATE_EN     (1 << 0)
 
 
 
@@ -1755,14 +1892,12 @@ do {									\
 #define RADEON_CP_PACKET3_SET_SCISSORS              0xC0001E00
 #define RADEON_CP_PACKET3_3D_RNDR_GEN_INDX_PRIM     0xC0002300
 #define RADEON_CP_PACKET3_LOAD_MICROCODE            0xC0002400
-#define RADEON_CP_PACKET3_3D_RNDR_GEN_PRIM          0xC0002500
 #define RADEON_CP_PACKET3_WAIT_FOR_IDLE             0xC0002600
 #define RADEON_CP_PACKET3_3D_DRAW_VBUF              0xC0002800
 #define RADEON_CP_PACKET3_3D_DRAW_IMMD              0xC0002900
 #define RADEON_CP_PACKET3_3D_DRAW_INDX              0xC0002A00
 #define RADEON_CP_PACKET3_LOAD_PALETTE              0xC0002C00
 #define RADEON_CP_PACKET3_3D_LOAD_VBPNTR            0xC0002F00
-#define RADEON_CP_PACKET3_3D_CLEAR_ZMASK            0xC0003200
 #define RADEON_CP_PACKET3_CNTL_PAINT                0xC0009100
 #define RADEON_CP_PACKET3_CNTL_BITBLT               0xC0009200
 #define RADEON_CP_PACKET3_CNTL_SMALLTEXT            0xC0009300
@@ -1817,6 +1952,47 @@ do {									\
 #define RADEON_CP_VC_CNTL_MAOS_ENABLE               0x00000080
 #define RADEON_CP_VC_CNTL_VTX_FMT_NON_RADEON_MODE   0x00000000
 #define RADEON_CP_VC_CNTL_VTX_FMT_RADEON_MODE       0x00000100
+#define RADEON_CP_VC_CNTL_TCL_DISABLE               0x00000000
+#define RADEON_CP_VC_CNTL_TCL_ENABLE                0x00000200
 #define RADEON_CP_VC_CNTL_NUM_SHIFT                 16
 
+#define RADEON_VS_MATRIX_0_ADDR                   0
+#define RADEON_VS_MATRIX_1_ADDR                   4
+#define RADEON_VS_MATRIX_2_ADDR                   8
+#define RADEON_VS_MATRIX_3_ADDR                  12
+#define RADEON_VS_MATRIX_4_ADDR                  16
+#define RADEON_VS_MATRIX_5_ADDR                  20
+#define RADEON_VS_MATRIX_6_ADDR                  24
+#define RADEON_VS_MATRIX_7_ADDR                  28
+#define RADEON_VS_MATRIX_8_ADDR                  32
+#define RADEON_VS_MATRIX_9_ADDR                  36
+#define RADEON_VS_MATRIX_10_ADDR                 40
+#define RADEON_VS_MATRIX_11_ADDR                 44
+#define RADEON_VS_MATRIX_12_ADDR                 48
+#define RADEON_VS_MATRIX_13_ADDR                 52
+#define RADEON_VS_MATRIX_14_ADDR                 56
+#define RADEON_VS_MATRIX_15_ADDR                 60
+#define RADEON_VS_LIGHT_AMBIENT_ADDR             64
+#define RADEON_VS_LIGHT_DIFFUSE_ADDR             72
+#define RADEON_VS_LIGHT_SPECULAR_ADDR            80
+#define RADEON_VS_LIGHT_DIRPOS_ADDR              88
+#define RADEON_VS_LIGHT_HWVSPOT_ADDR             96
+#define RADEON_VS_LIGHT_ATTENUATION_ADDR        104
+#define RADEON_VS_MATRIX_EYE2CLIP_ADDR          112
+#define RADEON_VS_UCP_ADDR                      116
+#define RADEON_VS_GLOBAL_AMBIENT_ADDR           122
+#define RADEON_VS_FOG_PARAM_ADDR                123
+#define RADEON_VS_EYE_VECTOR_ADDR               124
+
+#define RADEON_SS_LIGHT_DCD_ADDR                  0
+#define RADEON_SS_LIGHT_SPOT_EXPONENT_ADDR        8
+#define RADEON_SS_LIGHT_SPOT_CUTOFF_ADDR         16
+#define RADEON_SS_LIGHT_SPECULAR_THRESH_ADDR     24
+#define RADEON_SS_LIGHT_RANGE_CUTOFF_ADDR        32
+#define RADEON_SS_VERT_GUARD_CLIP_ADJ_ADDR       48
+#define RADEON_SS_VERT_GUARD_DISCARD_ADJ_ADDR    49
+#define RADEON_SS_HORZ_GUARD_CLIP_ADJ_ADDR       50
+#define RADEON_SS_HORZ_GUARD_DISCARD_ADJ_ADDR    51
+#define RADEON_SS_SHININESS                      60
+
 #endif
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_sarea.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_sarea.h
index 2de92bd8a..788c6f690 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_sarea.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_sarea.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_sarea.h,v 1.4 2002/04/24 16:20:41 martin Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_sarea.h,v 1.5 2002/10/30 12:52:14 alanh Exp $ */
 /*
  * Copyright 2000 ATI Technologies Inc., Markham, Ontario,
  *                VA Linux Systems Inc., Fremont, California.
@@ -168,23 +168,6 @@ typedef struct {
     /* Setup state */
     unsigned int se_cntl_status;
 
-#ifdef TCL_ENABLE
-    /* TCL state */
-    radeon_color_regs_t se_tcl_material_emmissive;
-    radeon_color_regs_t se_tcl_material_ambient;
-    radeon_color_regs_t se_tcl_material_diffuse;
-    radeon_color_regs_t se_tcl_material_specular;
-    unsigned int se_tcl_shininess;
-    unsigned int se_tcl_output_vtx_fmt;
-    unsigned int se_tcl_output_vtx_sel;
-    unsigned int se_tcl_matrix_select_0;
-    unsigned int se_tcl_matrix_select_1;
-    unsigned int se_tcl_ucp_vert_blend_ctl;
-    unsigned int se_tcl_texture_proc_ctl;
-    unsigned int se_tcl_light_model_ctl;
-    unsigned int se_tcl_per_light_ctl[4];
-#endif
-
     /* Misc state */
     unsigned int re_top_left;
     unsigned int re_misc;
@@ -198,13 +181,7 @@ typedef struct {
     unsigned int pp_txcblend;
     unsigned int pp_txablend;
     unsigned int pp_tfactor;
-
     unsigned int pp_border_color;
-
-#ifdef CUBIC_ENABLE
-    unsigned int pp_cubic_faces;
-    unsigned int pp_cubic_offset[5];
-#endif
 } radeon_texture_regs_t;
 
 typedef struct {
@@ -252,6 +229,9 @@ typedef struct {
     int texAge[RADEON_NR_TEX_HEAPS];
 
     int ctxOwner;		/* last context to upload state */
+    int pfAllowPageFlip;	/* set by the 2d driver, read by the client */
+    int pfCurrentPage;		/* set by kernel, read by others */
+    int crtc2_base;		/* for pageflipping with CloneMode */
 } RADEONSAREAPriv, *RADEONSAREAPrivPtr;
 
 #endif
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_version.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_version.h
index 460277c87..a1170d389 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_version.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_version.h
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_version.h,v 1.4 2002/04/06 19:06:07 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_version.h,v 1.8 2003/01/01 19:16:35 tsi Exp $ */
 /*
- * Copyright 2000 through 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 2000 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
@@ -24,14 +24,29 @@
 #ifndef _RADEON_VERSION_H_
 #define _RADEON_VERSION_H_ 1
 
+#undef  RADEON_NAME
+#undef  RADEON_DRIVER_NAME
+#undef  R200_DRIVER_NAME
+#undef  RADEON_VERSION_MAJOR
+#undef  RADEON_VERSION_MINOR
+#undef  RADEON_VERSION_PATCH
+#undef  RADEON_VERSION_CURRENT
+#undef  RADEON_VERSION_EVALUATE
+#undef  RADEON_VERSION_STRINGIFY
+#undef  RADEON_VERSION_NAME
+
 #define RADEON_NAME          "RADEON"
 #define RADEON_DRIVER_NAME   "radeon"
+#define R200_DRIVER_NAME     "r200"
+#define RV250_DRIVER_NAME    "r200"
 
 #define RADEON_VERSION_MAJOR 4
 #define RADEON_VERSION_MINOR 0
 #define RADEON_VERSION_PATCH 1
 
+#ifndef RADEON_VERSION_EXTRA
 #define RADEON_VERSION_EXTRA ""
+#endif
 
 #define RADEON_VERSION_CURRENT \
     ((RADEON_VERSION_MAJOR << 20) | \
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_video.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_video.c
index ed5e1738c..44ee2e688 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_video.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_video.c
@@ -1,6 +1,8 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_video.c,v 1.18 2002/10/12 01:38:08 martin Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_video.c,v 1.24 2003/02/19 01:19:43 dawes Exp $ */
 
 #include "radeon.h"
+#include "radeon_macros.h"
+#include "radeon_probe.h"
 #include "radeon_reg.h"
 
 #include "xf86.h"
@@ -18,6 +20,8 @@
 
 #define TIMER_MASK      (OFF_TIMER | FREE_TIMER)
 
+extern int gRADEONEntityIndex;
+
 #ifndef XvExtension
 void RADEONInitVideo(ScreenPtr pScreen) {}
 #else
@@ -60,7 +64,6 @@ typedef struct {
 
    Bool          doubleBuffer;
    unsigned char currentBuffer;
-   FBLinearPtr   linear;
    RegionRec     clip;
    CARD32        colorKey;
    CARD32        videoStatus;
@@ -384,6 +387,7 @@ RADEONResetVideo(ScrnInfoPtr pScrn)
     unsigned char *RADEONMMIO = info->MMIO;
     RADEONPortPrivPtr pPriv = info->adaptor->pPortPrivates[0].ptr;
 
+    if (info->accelOn) info->accel->Sync(pScrn);
 
     RADEONWaitForIdleMMIO(pScrn);
     OUTREG(RADEON_OV0_SCALE_CNTL, 0x80000000);
@@ -400,21 +404,14 @@ RADEONResetVideo(ScrnInfoPtr pScrn)
     
     if (info->ChipFamily == CHIP_FAMILY_R200 ||
 	info->ChipFamily == CHIP_FAMILY_R300) {
+	int i;
+
 	OUTREG(RADEON_OV0_LIN_TRANS_A, 0x12a20000);
 	OUTREG(RADEON_OV0_LIN_TRANS_B, 0x198a190e);
 	OUTREG(RADEON_OV0_LIN_TRANS_C, 0x12a2f9da);
 	OUTREG(RADEON_OV0_LIN_TRANS_D, 0xf2fe0442);
 	OUTREG(RADEON_OV0_LIN_TRANS_E, 0x12a22046);
 	OUTREG(RADEON_OV0_LIN_TRANS_F, 0x175f);
-    } else {
-	int i;
-
-	OUTREG(RADEON_OV0_LIN_TRANS_A, 0x12a00000);
-	OUTREG(RADEON_OV0_LIN_TRANS_B, 0x1990190e);
-	OUTREG(RADEON_OV0_LIN_TRANS_C, 0x12a0f9c0);
-	OUTREG(RADEON_OV0_LIN_TRANS_D, 0xf3000442);
-	OUTREG(RADEON_OV0_LIN_TRANS_E, 0x12a02040);
-	OUTREG(RADEON_OV0_LIN_TRANS_F, 0x175f);
 
 	/*
 	 * Set default Gamma ramp:
@@ -427,6 +424,13 @@ RADEONResetVideo(ScrnInfoPtr pScrn)
 	    OUTREG(def_gamma[i].gammaReg,
 		   (def_gamma[i].gammaSlope<<16) | def_gamma[i].gammaOffset);
 	}
+    } else {
+	OUTREG(RADEON_OV0_LIN_TRANS_A, 0x12a00000);
+	OUTREG(RADEON_OV0_LIN_TRANS_B, 0x1990190e);
+	OUTREG(RADEON_OV0_LIN_TRANS_C, 0x12a0f9c0);
+	OUTREG(RADEON_OV0_LIN_TRANS_D, 0xf3000442);
+	OUTREG(RADEON_OV0_LIN_TRANS_E, 0x12a02040);
+	OUTREG(RADEON_OV0_LIN_TRANS_F, 0x175f);
     }
 }
 
@@ -676,10 +680,12 @@ RADEONStopVideo(ScrnInfoPtr pScrn, pointer data, Bool cleanup)
      if(pPriv->videoStatus & CLIENT_VIDEO_ON) {
 	RADEONWaitForFifo(pScrn, 2);
 	OUTREG(RADEON_OV0_SCALE_CNTL, 0);
+	if (info->cursor_start)
+	    xf86ForceHWCursor (pScrn->pScreen, FALSE);
      }
-     if(pPriv->linear) {
-	xf86FreeOffscreenLinear(pPriv->linear);
-	pPriv->linear = NULL;
+     if(info->videoLinear) {
+	xf86FreeOffscreenLinear(info->videoLinear);
+	info->videoLinear = NULL;
      }
      pPriv->videoStatus = 0;
   } else {
@@ -800,7 +806,7 @@ RADEONGetPortAttribute(ScrnInfoPtr  pScrn,
     RADEONInfoPtr	info = RADEONPTR(pScrn);
     RADEONPortPrivPtr	pPriv = (RADEONPortPrivPtr)data;
 
-    info->accel->Sync(pScrn);
+    if (info->accelOn) info->accel->Sync(pScrn);
 
     if(attribute == xvAutopaintColorkey)
 	*value = pPriv->autopaint_colorkey;
@@ -1003,6 +1009,11 @@ RADEONDisplayVideo(
     offset1 += ((left >> 16) & ~7) << 1;
     offset2 += ((left >> 16) & ~7) << 1;
 
+    if (info->IsSecondary) {
+	offset1 += info->FbMapSize;
+	offset2 += info->FbMapSize;
+    }
+
     tmp = (left & 0x0003ffff) + 0x00028000 + (h_inc << 3);
     p1_h_accum_init = ((tmp <<  4) & 0x000f8000) |
 		      ((tmp << 12) & 0xf0000000);
@@ -1018,7 +1029,7 @@ RADEONDisplayVideo(
 
     RADEONWaitForFifo(pScrn, 2);
     OUTREG(RADEON_OV0_REG_LOAD_CNTL, 1);
-    RADEONWaitForIdleMMIO(pScrn);
+    if (info->accelOn) info->accel->Sync(pScrn);
     while(!(INREG(RADEON_OV0_REG_LOAD_CNTL) & (1 << 3)));
 
     RADEONWaitForFifo(pScrn, 14);
@@ -1034,14 +1045,12 @@ RADEONDisplayVideo(
 	x_off = 0;
 
     /* Put the hardware overlay on CRTC2:
-     * For now, the CRTC2 overlay is only implemented for clone mode.
-     * Xinerama 2nd head will be similar, but there are other issues.
      *
      * Since one hardware overlay can not be displayed on two heads 
      * at the same time, we might need to consider using software
-     * rendering for the second head (do we really need it?).
+     * rendering for the second head.
      */
-    if (info->Clone && info->OverlayOnCRTC2) {
+    if ((info->Clone && info->OverlayOnCRTC2) || info->IsSecondary) {
 	x_off = 0;
 	OUTREG(RADEON_OV1_Y_X_START, ((dstBox->x1
 				       + x_off
@@ -1133,6 +1142,13 @@ RADEONPutImage(
    int top, left, npixels, nlines, bpp;
    BoxRec dstBox;
    CARD32 tmp;
+#if X_BYTE_ORDER == X_BIG_ENDIAN
+   unsigned char *RADEONMMIO = info->MMIO;
+   CARD32 surface_cntl = INREG(RADEON_SURFACE_CNTL);
+
+   OUTREG(RADEON_SURFACE_CNTL, (surface_cntl | 
+		RADEON_NONSURF_AP0_SWP_32BPP) & ~RADEON_NONSURF_AP0_SWP_16BPP);
+#endif
 
    /*
     * s2offset, s3offset - byte offsets into U and V plane of the
@@ -1194,7 +1210,7 @@ RADEONPutImage(
 	break;
    }
 
-   if(!(pPriv->linear = RADEONAllocateMemory(pScrn, pPriv->linear,
+   if(!(info->videoLinear = RADEONAllocateMemory(pScrn, info->videoLinear,
 		pPriv->doubleBuffer ? (new_size << 1) : new_size)))
    {
 	return BadAlloc;
@@ -1207,9 +1223,10 @@ RADEONPutImage(
    left = (xa >> 16) & ~1;
    npixels = ((((xb + 0xffff) >> 16) + 1) & ~1) - left;
 
-   offset = (pPriv->linear->offset * bpp) + (top * dstPitch);
+   offset = (info->videoLinear->offset * bpp) + (top * dstPitch);
    if(pPriv->doubleBuffer)
 	offset += pPriv->currentBuffer * new_size * bpp;
+
    dst_start = info->FB + offset;
 
    switch(id) {
@@ -1226,24 +1243,13 @@ RADEONPutImage(
 	   s3offset = tmp;
 	}
 	nlines = ((((yb + 0xffff) >> 16) + 1) & ~1) - top;
-	{
-
 #if X_BYTE_ORDER == X_BIG_ENDIAN
-       unsigned char *RADEONMMIO = info->MMIO;
-	CARD32 surface_cntl;
-
-	surface_cntl = INREG(RADEON_SURFACE_CNTL);
-	OUTREG(RADEON_SURFACE_CNTL, (surface_cntl | 
-		RADEON_NONSURF_AP0_SWP_32BPP) & ~RADEON_NONSURF_AP0_SWP_16BPP);
+	OUTREG(RADEON_SURFACE_CNTL, (surface_cntl | RADEON_NONSURF_AP0_SWP_32BPP)
+				    & ~RADEON_NONSURF_AP0_SWP_16BPP);
 #endif
 	RADEONCopyMungedData(buf + (top * srcPitch) + left, buf + s2offset,
-			   buf + s3offset, dst_start, srcPitch, srcPitch2,
-			   dstPitch, nlines, npixels);
-#if X_BYTE_ORDER == X_BIG_ENDIAN
-	/* restore byte swapping */
-	OUTREG(RADEON_SURFACE_CNTL, surface_cntl);
-#endif
-	}
+			     buf + s3offset, dst_start, srcPitch, srcPitch2,
+			     dstPitch, nlines, npixels);
 	break;
     case FOURCC_UYVY:
     case FOURCC_YUY2:
@@ -1252,10 +1258,18 @@ RADEONPutImage(
 	buf += (top * srcPitch) + left;
 	nlines = ((yb + 0xffff) >> 16) - top;
 	dst_start += left;
+#if X_BYTE_ORDER == X_BIG_ENDIAN
+	OUTREG(RADEON_SURFACE_CNTL, surface_cntl & ~(RADEON_NONSURF_AP0_SWP_32BPP
+						   | RADEON_NONSURF_AP0_SWP_16BPP));
+#endif
 	RADEONCopyData(buf, dst_start, srcPitch, dstPitch, nlines, npixels);
 	break;
     }
 
+#if X_BYTE_ORDER == X_BIG_ENDIAN
+    /* restore byte swapping */
+    OUTREG(RADEON_SURFACE_CNTL, surface_cntl);
+#endif
 
     /* update cliplist */
     if(!RegionsEqual(&pPriv->clip, clipBoxes)) 
@@ -1269,6 +1283,9 @@ RADEONPutImage(
 					   REGION_RECTS(clipBoxes));
     }
 
+    if (info->cursor_start && !(pPriv->videoStatus & CLIENT_VIDEO_ON))
+	xf86ForceHWCursor (pScrn->pScreen, TRUE);
+
     RADEONDisplayVideo(pScrn, id, offset, offset, width, height, dstPitch,
 		     xa, xb, ya, &dstBox, src_w, src_h, drw_w, drw_h);
 
@@ -1333,15 +1350,19 @@ RADEONVideoTimerCallback(ScrnInfoPtr pScrn, Time now)
 	    if(pPriv->offTime < now) {
 		unsigned char *RADEONMMIO = info->MMIO;
 		OUTREG(RADEON_OV0_SCALE_CNTL, 0);
+		if (info->cursor_start && pPriv->videoStatus & CLIENT_VIDEO_ON)
+		    xf86ForceHWCursor (pScrn->pScreen, FALSE);
 		pPriv->videoStatus = FREE_TIMER;
 		pPriv->freeTime = now + FREE_DELAY;
 	    }
 	} else {  /* FREE_TIMER */
 	    if(pPriv->freeTime < now) {
-		if(pPriv->linear) {
-		   xf86FreeOffscreenLinear(pPriv->linear);
-		   pPriv->linear = NULL;
+		if(info->videoLinear) {
+		   xf86FreeOffscreenLinear(info->videoLinear);
+		   info->videoLinear = NULL;
 		}
+		if (info->cursor_start && pPriv->videoStatus & CLIENT_VIDEO_ON)
+		    xf86ForceHWCursor (pScrn->pScreen, FALSE);
 		pPriv->videoStatus = 0;
 		info->VideoTimerCallback = NULL;
 	    }
@@ -1523,6 +1544,8 @@ RADEONDisplaySurface(
     if (portPriv->videoStatus & CLIENT_VIDEO_ON) {
 	REGION_EMPTY(pScrn->pScreen, &portPriv->clip);   
 	UpdateCurrentTime();
+	if (info->cursor_start)
+	    xf86ForceHWCursor (pScrn->pScreen, FALSE);
 	portPriv->videoStatus = FREE_TIMER;
 	portPriv->freeTime = currentTime.milliseconds + FREE_DELAY;
 	info->VideoTimerCallback = RADEONVideoTimerCallback;
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/chips/Imakefile b/xc/programs/Xserver/hw/xfree86/drivers/chips/Imakefile
index 9c8bb68d1..41a58c609 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/chips/Imakefile
+++ b/xc/programs/Xserver/hw/xfree86/drivers/chips/Imakefile
@@ -4,7 +4,7 @@ XCOMM $XConsortium: Imakefile /main/13 1996/10/27 11:49:09 kaleb $
 
 
 
-XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/drivers/chips/Imakefile,v 1.29 2002/05/31 18:45:59 dawes Exp $
+XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/drivers/chips/Imakefile,v 1.30 2003/02/17 17:06:41 dawes Exp $
 
 #define IHaveModules
 #include <Server.tmpl>
@@ -28,7 +28,7 @@ INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86OSSRC) -I$(XF86SRC)/fbdevhw\
 	   -I$(XF86SRC)/ramdac -I$(XF86SRC)/rac -I$(XF86SRC)/ddc \
 	   -I$(XF86SRC)/i2c -I$(XF86SRC)/xf24_32bpp -I$(XF86SRC)/shadowfb \
 	   -I$(XF86SRC)/xf8_16bpp -I$(XF86SRC)/int10 \
-	   -I$(XF86OSSRC)/vbe -I$(EXTINCSRC) -I$(SERVERSRC)/render
+	   -I$(XF86SRC)/vbe -I$(EXTINCSRC) -I$(SERVERSRC)/render
 #endif
 
 #if MakeHasPosixVariableSubstitutions
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/chips/ct_BlitMM.h b/xc/programs/Xserver/hw/xfree86/drivers/chips/ct_BlitMM.h
index 424eb2175..766024116 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/chips/ct_BlitMM.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/chips/ct_BlitMM.h
@@ -4,7 +4,7 @@
 
 
 
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/chips/ct_BlitMM.h,v 1.4 1998/08/29 05:43:05 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/chips/ct_BlitMM.h,v 1.5 2002/11/25 14:04:58 eich Exp $ */
 
 /* Definitions for the Chips and Technology BitBLT engine communication. */
 /* These are done using Memory Mapped IO, of the registers */
@@ -33,41 +33,40 @@
 /* Macros to do useful things with the C&T BitBLT engine */
 #define ctBLTWAIT \
   {HW_DEBUG(0x4); \
-   while(*(volatile unsigned int *)(cPtr->MMIOBase + MR(0x4)) & \
-   0x00100000){};}
+   while(MMIO_IN32(cPtr->MMIOBase, MR(0x4)) & 0x00100000){};}
 
 #define ctSETROP(op) \
-  {HW_DEBUG(0x4); *(unsigned int *)(cPtr->MMIOBase + MR(0x4)) = (op);}
+  {HW_DEBUG(0x4);   MMIO_OUT32(cPtr->MMIOBase, MR(0x4), op);}
 
 #define ctSETSRCADDR(srcAddr) \
   {HW_DEBUG(0x5); \
-   *(unsigned int *)(cPtr->MMIOBase + MR(0x5)) = (srcAddr)&0x7FFFFFL;}
+  MMIO_OUT32(cPtr->MMIOBase, MR(0x5),(srcAddr)&0x7FFFFFL);}
 
 #define ctSETDSTADDR(dstAddr) \
 {HW_DEBUG(0x6); \
-  *(unsigned int *)(cPtr->MMIOBase + MR(0x6)) = (dstAddr)&0x7FFFFFL;}
+  MMIO_OUT32(cPtr->MMIOBase, MR(0x6), (dstAddr)&0x7FFFFFL);}
 
 #define ctSETPITCH(srcPitch,dstPitch) \
 {HW_DEBUG(0x0); \
-  *(unsigned int *)(cPtr->MMIOBase + MR(0x0)) = (((dstPitch)&0xFFFF)<<16)| \
-      ((srcPitch)&0xFFFF);}
+  MMIO_OUT32(cPtr->MMIOBase, MR(0x0),(((dstPitch)&0xFFFF)<<16)| \
+      ((srcPitch)&0xFFFF));}
 
 #define ctSETHEIGHTWIDTHGO(Height,Width)\
 {HW_DEBUG(0x7); \
-  *(unsigned int *)(cPtr->MMIOBase + MR(0x7)) = (((Height)&0xFFFF)<<16)| \
-      ((Width)&0xFFFF);}
+  MMIO_OUT32(cPtr->MMIOBase, MR(0x7), (((Height)&0xFFFF)<<16)| \
+      ((Width)&0xFFFF));}
 
 #define ctSETPATSRCADDR(srcAddr)\
 {HW_DEBUG(0x1); \
-  *(unsigned int *)(cPtr->MMIOBase + MR(0x1)) = (srcAddr)&0x1FFFFFL;}
+  MMIO_OUT32(cPtr->MMIOBase, MR(0x1),(srcAddr)&0x1FFFFFL);}
 
 #define ctSETBGCOLOR8(c) {\
     HW_DEBUG(0x2); \
     if ((cAcl->bgColor != (c)) || (cAcl->bgColor == -1)) { \
 	cAcl->bgColor = (c); \
-	*(unsigned int *)(cPtr->MMIOBase + MR(0x2)) = \
-	   ((((((c)&0xFF)<<8)|((c)&0xFF))<<16) | \
-	   ((((c)&0xFF)<<8)|((c)&0xFF))); \
+        MMIO_OUT32(cPtr->MMIOBase, MR(0x2),\
+           ((((((c)&0xFF)<<8)|((c)&0xFF))<<16) | \
+	   ((((c)&0xFF)<<8)|((c)&0xFF)))); \
     } \
 }
 
@@ -75,8 +74,8 @@
     HW_DEBUG(0x2); \
     if ((cAcl->bgColor != (c)) || (cAcl->bgColor == -1)) { \
 	cAcl->bgColor = (c); \
-	*(unsigned int *)(cPtr->MMIOBase + MR(0x2)) = \
-	   ((((c)&0xFFFF)<<16)|((c)&0xFFFF)); \
+        MMIO_OUT32(cPtr->MMIOBase, MR(0x2), \
+             ((((c)&0xFFFF)<<16)|((c)&0xFFFF))); \
     } \
 }
 
@@ -86,7 +85,7 @@
     HW_DEBUG(0x2); \
     if ((cAcl->bgColor != (c)) || (cAcl->bgColor == -1)) { \
 	cAcl->bgColor = (c); \
-	*(unsigned int *)(cPtr->MMIOBase + MR(0x2)) = ((c)&0xFFFFFF); \
+        MMIO_OUT32(cPtr->MMIOBase, MR(0x2),((c)&0xFFFFFF)); \
     } \
 }
 
@@ -94,9 +93,9 @@
     HW_DEBUG(0x3); \
     if ((cAcl->fgColor != (c)) || (cAcl->fgColor == -1)) { \
 	cAcl->fgColor = (c); \
-	*(unsigned int *)(cPtr->MMIOBase + MR(0x3)) = \
+        MMIO_OUT32(cPtr->MMIOBase, MR(0x3), \
            ((((((c)&0xFF)<<8)|((c)&0xFF))<<16) | \
-	   ((((c)&0xFF)<<8)|((c)&0xFF))); \
+	   ((((c)&0xFF)<<8)|((c)&0xFF)))); \
     } \
 }
 
@@ -104,8 +103,8 @@
     HW_DEBUG(0x3); \
     if ((cAcl->fgColor != (c)) || (cAcl->fgColor == -1)) { \
 	cAcl->fgColor = (c); \
-	*(unsigned int *)(cPtr->MMIOBase + MR(0x3)) = \
-           ((((c)&0xFFFF)<<16)|((c)&0xFFFF)); \
+        MMIO_OUT32(cPtr->MMIOBase, MR(0x3), \
+           ((((c)&0xFFFF)<<16)|((c)&0xFFFF))); \
     } \
 }
 
@@ -115,7 +114,7 @@
     HW_DEBUG(0x3); \
     if ((cAcl->fgColor != (c)) || (cAcl->fgColor == -1)) { \
 	cAcl->fgColor = (c); \
-	*(unsigned int *)(cPtr->MMIOBase + MR(0x3)) = ((c)&0xFFFFFF); \
+        MMIO_OUT32(cPtr->MMIOBase, MR(0x3),((c)&0xFFFFFF)); \
     } \
 }
 
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/chips/ct_BltHiQV.h b/xc/programs/Xserver/hw/xfree86/drivers/chips/ct_BltHiQV.h
index 4f23ae612..6f135bd8a 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/chips/ct_BltHiQV.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/chips/ct_BltHiQV.h
@@ -4,7 +4,7 @@
 
 
 
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/chips/ct_BltHiQV.h,v 1.11 2002/04/04 14:05:41 eich Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/chips/ct_BltHiQV.h,v 1.12 2002/11/25 14:04:58 eich Exp $ */
 
 /* Definitions for the Chips and Technology BitBLT engine communication. */
 /* These are done using Memory Mapped IO, of the registers */
@@ -78,7 +78,8 @@
                             if (!(cPtr->readXR(cPtr,0x20) & 0x1)) break; \
                          } \
                          timeout++; \
-                         if (timeout == 100000) { \
+                         if ((cPtr->Chipset < CHIPS_CT69000 && \
+			     (timeout > 100000)) || timeout > 300000) { \
 			    unsigned char tmp; \
                             ErrorF("timeout\n"); \
 			    tmp = cPtr->readXR(cPtr, 0x20); \
@@ -91,67 +92,67 @@
 		    }
 
 #define ctSETROP(op) \
-  *(unsigned int *)(cPtr->MMIOBase + BR(0x4)) = (op)
+  MMIO_OUT32(cPtr->MMIOBase, BR(0x4), op)
 
 #define ctSETMONOCTL(op) \
-  *(unsigned int *)(cPtr->MMIOBase + BR(0x3)) = (op)
+  MMIO_OUT32(cPtr->MMIOBase, BR(0x3), op)
 
 #define ctSETSRCADDR(srcAddr) \
-  *(unsigned int *)(cPtr->MMIOBase + BR(0x6)) = (srcAddr)&0x7FFFFFL
+  MMIO_OUT32(cPtr->MMIOBase, BR(0x6), (srcAddr)&0x7FFFFFL)
 
 #define ctSETDSTADDR(dstAddr) \
-  *(unsigned int *)(cPtr->MMIOBase + BR(0x7)) = (dstAddr)&0x7FFFFFL
+  MMIO_OUT32(cPtr->MMIOBase, BR(0x7), (dstAddr)&0x7FFFFFL)
 
 #define ctSETPITCH(srcPitch,dstPitch) \
-  *(unsigned int *)(cPtr->MMIOBase + BR(0x0)) = (((dstPitch)&0xFFFF)<<16)| \
-      ((srcPitch)&0xFFFF)
+  MMIO_OUT32(cPtr->MMIOBase, BR(0x0), (((dstPitch)&0xFFFF)<<16)| \
+      ((srcPitch)&0xFFFF))
 
 #define ctSETHEIGHTWIDTHGO(Height,Width)\
-  *(unsigned int *)(cPtr->MMIOBase + BR(0x8)) = (((Height)&0xFFFF)<<16)| \
-      ((Width)&0xFFFF)
+  MMIO_OUT32(cPtr->MMIOBase, BR(0x8), (((Height)&0xFFFF)<<16)| \
+      ((Width)&0xFFFF))
 
 #define ctSETPATSRCADDR(srcAddr)\
-  *(unsigned int *)(cPtr->MMIOBase + BR(0x5)) = (srcAddr)&0x7FFFFFL
+  MMIO_OUT32(cPtr->MMIOBase, BR(0x5), (srcAddr)&0x7FFFFFL)
 
 #define ctSETBGCOLOR8(c) {\
     if ((cAcl->bgColor != (c)) || (cAcl->bgColor == -1)) { \
 	cAcl->bgColor = (c); \
-	*(unsigned int *)(cPtr->MMIOBase + BR(0x1)) = ((c)&0xFF); \
+        MMIO_OUT32(cPtr->MMIOBase, BR(0x1), ((c)&0xFF)); \
     } \
 }
 
 #define ctSETBGCOLOR16(c) {\
     if ((cAcl->bgColor != (c)) || (cAcl->bgColor == -1)) { \
 	cAcl->bgColor = (c); \
-	*(unsigned int *)(cPtr->MMIOBase + BR(0x1)) = ((c)&0xFFFF); \
+        MMIO_OUT32(cPtr->MMIOBase, BR(0x1), ((c)&0xFFFF)); \
     } \
 }
 
 #define ctSETBGCOLOR24(c) {\
     if ((cAcl->bgColor != (c)) || (cAcl->bgColor == -1)) { \
 	cAcl->bgColor = (c); \
-	*(unsigned int *)(cPtr->MMIOBase + BR(0x1)) = ((c)&0xFFFFFF); \
+        MMIO_OUT32(cPtr->MMIOBase, BR(0x1), ((c)&0xFFFFFF)); \
     } \
 }
 
 #define ctSETFGCOLOR8(c) {\
     if ((cAcl->fgColor != (c)) || (cAcl->fgColor == -1)) { \
 	cAcl->fgColor = (c); \
-	*(unsigned int *)(cPtr->MMIOBase + BR(0x2)) = ((c)&0xFF); \
+        MMIO_OUT32(cPtr->MMIOBase, BR(0x2), ((c)&0xFF)); \
     } \
 }
 
 #define ctSETFGCOLOR16(c) {\
     if ((cAcl->fgColor != (c)) || (cAcl->fgColor == -1)) { \
 	cAcl->fgColor = (c); \
-	*(unsigned int *)(cPtr->MMIOBase + BR(0x2)) = ((c)&0xFFFF); \
+        MMIO_OUT32(cPtr->MMIOBase, BR(0x2), ((c)&0xFFFF)); \
     } \
 }
 
 #define ctSETFGCOLOR24(c) {\
     if ((cAcl->fgColor != (c)) || (cAcl->fgColor == -1)) { \
 	cAcl->fgColor = (c); \
-	*(unsigned int *)(cPtr->MMIOBase + BR(0x2)) = ((c)&0xFFFFFF); \
+        MMIO_OUT32(cPtr->MMIOBase, BR(0x2), ((c)&0xFFFFFF)); \
     } \
 }
 
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/chips/ct_accel.c b/xc/programs/Xserver/hw/xfree86/drivers/chips/ct_accel.c
index 92fe4c5c0..d93629143 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/chips/ct_accel.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/chips/ct_accel.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/chips/ct_accel.c,v 1.39 2002/04/04 14:05:42 eich Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/chips/ct_accel.c,v 1.40 2002/11/25 14:04:58 eich Exp $ */
 /*
  * Copyright 1996, 1997, 1998 by David Bateman <dbateman@ee.uts.edu.au>
  *   Modified 1997, 1998 by Nozomi Ytow
@@ -278,8 +278,8 @@ CTNAME(AccelInit)(ScreenPtr pScreen)
 	LEFT_EDGE_CLIPPING | LEFT_EDGE_CLIPPING_NEGATIVE_X |
 	ROP_NEEDS_SOURCE;
 #ifdef UNDOCUMENTED_FEATURE
-    infoPtr->ScreenToScreenColorExpandFillFlags = BIT_ORDER_IN_BYTE_MSBFIRST |
-	LEFT_EDGE_CLIPPING;
+    infoPtr->ScreenToScreenColorExpandFillFlags = BIT_ORDER_IN_BYTE_MSBFIRST
+	| LEFT_EDGE_CLIPPING;
 #endif        
     if (cAcl->BitsPerPixel == 24) {
 	infoPtr->CPUToScreenColorExpandFillFlags |= NO_PLANEMASK;
@@ -287,6 +287,15 @@ CTNAME(AccelInit)(ScreenPtr pScreen)
 	infoPtr->ScreenToScreenColorExpandFillFlags |= NO_PLANEMASK;
 #endif
     }
+    /* The ct65550 has problems with transparency which leads to video
+     * corruption unless disabled.
+     */
+    if (!(cPtr->Flags & ChipsColorTransparency)) {
+	infoPtr->CPUToScreenColorExpandFillFlags |= NO_TRANSPARENCY;
+#ifdef UNDOCUMENTED_FEATURE
+	infoPtr->ScreenToScreenColorExpandFillFlags |= NO_TRANSPARENCY;
+#endif
+    }
 #else
     infoPtr->CPUToScreenColorExpandFillFlags =
 	BIT_ORDER_IN_BYTE_MSBFIRST | CPU_TRANSFER_PAD_DWORD |
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/chips/ct_cursor.c b/xc/programs/Xserver/hw/xfree86/drivers/chips/ct_cursor.c
index b8be20372..44a7e8a63 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/chips/ct_cursor.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/chips/ct_cursor.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/chips/ct_cursor.c,v 1.26 2002/04/04 14:05:42 eich Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/chips/ct_cursor.c,v 1.27 2002/11/25 14:04:58 eich Exp $ */
 
 /*
  * Copyright 1994  The XFree86 Project
@@ -57,6 +57,20 @@
 	} \
     }
 
+/* Swing your cursor bytes round and round... yeehaw! */
+#if X_BYTE_ORDER == X_BIG_ENDIAN
+#define P_SWAP32( a , b )                \
+       ((char *)a)[0] = ((char *)b)[3];  \
+       ((char *)a)[1] = ((char *)b)[2];  \
+       ((char *)a)[2] = ((char *)b)[1];  \
+       ((char *)a)[3] = ((char *)b)[0]
+
+#define P_SWAP16( a , b )                \
+       ((char *)a)[0] = ((char *)b)[1];  \
+       ((char *)a)[1] = ((char *)b)[0];  \
+       ((char *)a)[2] = ((char *)b)[3];  \
+       ((char *)a)[3] = ((char *)b)[2]
+#endif
 
 static void
 CHIPSShowCursor(ScrnInfoPtr pScrn)
@@ -293,6 +307,11 @@ CHIPSLoadCursorImage(ScrnInfoPtr pScrn, unsigned char *src)
 {
     CHIPSPtr cPtr = CHIPSPTR(pScrn);
     CHIPSACLPtr cAcl = CHIPSACLPTR(pScrn);
+#if X_BYTE_ORDER == X_BIG_ENDIAN
+    CARD32 *s = (pointer)src;
+    CARD32 *d = (pointer)(cPtr->FbBase + cAcl->CursorAddress);
+    int y;
+#endif
 
     CURSOR_SYNC(pScrn); 
 
@@ -312,9 +331,49 @@ CHIPSLoadCursorImage(ScrnInfoPtr pScrn, unsigned char *src)
 	}
     } else {
 	if (cPtr->Flags & ChipsLinearSupport) {
+#if X_BYTE_ORDER == X_BIG_ENDIAN
+	    /* On big endian machines we must flip our cursor image around. */
+    	    switch(cAcl->BytesPerPixel) {
+    	        case 4:
+    	        case 3:
+        	    for (y = 0; y < 64; y++) {
+            	        P_SWAP32(d,s);
+            	        d++; s++;
+            	        P_SWAP32(d,s);
+            	        d++; s++;
+            	        P_SWAP32(d,s);
+            	        d++; s++;
+            	        P_SWAP32(d,s);
+            	        d++; s++;
+        	    }
+        	    break;
+    	        case 2:
+           	    for (y = 0; y < 64; y++) {
+            	        P_SWAP16(d,s);
+            	        d++; s++;
+                        P_SWAP16(d,s);
+                        d++; s++;
+                        P_SWAP16(d,s);
+                        d++; s++;
+                        P_SWAP16(d,s);
+                        d++; s++;
+                        P_SWAP16(d,s);
+                        d++; s++;
+                    }
+                    break;
+                default:
+                    for (y = 0; y < 64; y++) {
+                        *d++ = *s++;
+                        *d++ = *s++;
+                        *d++ = *s++;
+                        *d++ = *s++;
+                    }
+            }
+#else
 	    memcpy((unsigned char *)cPtr->FbBase + cAcl->CursorAddress,
 			src, cPtr->CursorInfoRec->MaxWidth * 
 			cPtr->CursorInfoRec->MaxHeight / 4);
+#endif
 	} else {
 	    /*
 	     * The cursor can only be in the last 16K of video memory,
@@ -388,7 +447,10 @@ CHIPSCursorInit(ScreenPtr pScreen)
 
     cPtr->CursorInfoRec = infoPtr;
 
-    infoPtr->Flags = HARDWARE_CURSOR_BIT_ORDER_MSBFIRST |
+    infoPtr->Flags =
+#if X_BYTE_ORDER == X_LITTLE_ENDIAN
+	HARDWARE_CURSOR_BIT_ORDER_MSBFIRST |
+#endif
 	HARDWARE_CURSOR_INVERT_MASK |
 	HARDWARE_CURSOR_SWAP_SOURCE_AND_MASK |
 	HARDWARE_CURSOR_TRUECOLOR_AT_8BPP;
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/chips/ct_dga.c b/xc/programs/Xserver/hw/xfree86/drivers/chips/ct_dga.c
index 7055364ab..3d0fe26b9 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/chips/ct_dga.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/chips/ct_dga.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/chips/ct_dga.c,v 1.4 2002/10/08 22:14:06 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/chips/ct_dga.c,v 1.5 2002/11/25 14:04:58 eich Exp $ */
 
 #include "xf86.h"
 #include "xf86_OSproc.h"
@@ -131,7 +131,7 @@ SECOND_PASS:
 	currentMode->viewportHeight = pMode->VDisplay;
 	currentMode->xViewportStep = 1;
 	currentMode->yViewportStep = 1;
-	currentMode->viewportFlags = DGA_FLIP_RETRACE;
+ 	currentMode->viewportFlags = DGA_FLIP_RETRACE | DGA_FLIP_IMMEDIATE;
 	currentMode->offset = 0;
 	currentMode->address = cPtr->FbBase;
 
@@ -232,11 +232,17 @@ CHIPS_SetViewport(
    ScrnInfoPtr pScrn, 
    int x, int y, 
    int flags
-){
-   CHIPSPtr cPtr = CHIPSPTR(pScrn);
+   ){
+    vgaHWPtr hwp = VGAHWPTR(pScrn);
+    CHIPSPtr cPtr = CHIPSPTR(pScrn);
+  
+    if (flags & DGA_FLIP_RETRACE) {
+ 	while ((hwp->readST01(hwp)) & 0x08){};
+ 	while (!(hwp->readST01(hwp)) & 0x08){};
+    }
 
-   CHIPSAdjustFrame(pScrn->pScreen->myNum, x, y, flags);
-   cPtr->DGAViewportStatus = 0;  /* CHIPSAdjustFrame loops until finished */
+    CHIPSAdjustFrame(pScrn->pScreen->myNum, x, y, flags);
+    cPtr->DGAViewportStatus = 0;  /* CHIPSAdjustFrame loops until finished */
 }
 
 static void 
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/chips/ct_driver.c b/xc/programs/Xserver/hw/xfree86/drivers/chips/ct_driver.c
index 680030657..2aa6cc22f 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/chips/ct_driver.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/chips/ct_driver.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/chips/ct_driver.c,v 1.121 2002/09/16 18:05:52 eich Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/chips/ct_driver.c,v 1.122 2002/11/25 14:04:58 eich Exp $ */
 
 /*
  * Copyright 1993 by Jon Block <block@frc.com>
@@ -1525,7 +1525,12 @@ chipsPreInitHiQV(ScrnInfoPtr pScrn, int flags)
     /* linear base */
     if (cPtr->Flags & ChipsLinearSupport) {
 	if (cPtr->pEnt->location.type == BUS_PCI) {
+	    /* Tack on 0x800000 to access the big-endian aperture? */
+#if X_BYTE_ORDER == X_BIG_ENDIAN
+	    cPtr->FbAddress =  (cPtr->PciInfo->memBase[0] & 0xff800000) + 0x800000L;
+#else
 	    cPtr->FbAddress =  cPtr->PciInfo->memBase[0] & 0xff800000;
+#endif
 	    from = X_PROBED;
 	    if (xf86RegisterResources(cPtr->pEnt->index,NULL,ResNone))
 		cPtr->Flags &= ~ChipsLinearSupport;
@@ -1558,7 +1563,6 @@ chipsPreInitHiQV(ScrnInfoPtr pScrn, int flags)
 	xf86DrvMsg(pScrn->scrnIndex, from,
 		   "Disabling linear addressing\n");
 
-    
     if ((s = xf86GetOptValString(cPtr->Options, OPTION_ROTATE))
 	|| xf86ReturnOptValBool(cPtr->Options, OPTION_SHADOW_FB, FALSE)) {
 	if (!(cPtr->Flags & ChipsLinearSupport)) {
@@ -1786,6 +1790,7 @@ chipsPreInitHiQV(ScrnInfoPtr pScrn, int flags)
 		pScrn->videoRam = 2048;
 		break;
 	    }
+	    break;
 	default:
 	    /* XRE0: Software reg     */
 	    /* bit 3-0: memory size   */
@@ -1815,10 +1820,10 @@ chipsPreInitHiQV(ScrnInfoPtr pScrn, int flags)
 		pScrn->videoRam = 1024;
 		break;
 	    }
+	    break;
 	}
     }
 
-
     if ((cPtr->Flags & ChipsDualChannelSupport) &&
 		(xf86IsEntityShared(pScrn->entityList[0]))) {
        /* 
@@ -4220,12 +4225,11 @@ CHIPSScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
 		cAcl->CacheEnd = 0;
 	    }
 
-	    if (IS_HiQV(cPtr)) {
-		cAcl->BltDataWindow = (unsigned char *)cPtr->MMIOBase + 
-				0x10000L;
-	    } else {
+	    if (IS_HiQV(cPtr)) 
+		cAcl->BltDataWindow = (unsigned char *)cPtr->MMIOBase
+		    + 0x10000L;
+	    else
 		cAcl->BltDataWindow = cPtr->FbBase;
-	    }
 	    
 	}
 	/*
@@ -4309,8 +4313,7 @@ CHIPSScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
 	    return FALSE;
     }
     
-    if (pScrn->bitsPerPixel <= 8)
-        racflag = RAC_COLORMAP;
+    racflag = RAC_COLORMAP;
     if (cAcl->UseHWCursor)
         racflag |= RAC_CURSOR;
     racflag |= (RAC_FB | RAC_VIEWPORT);
@@ -6975,11 +6978,11 @@ chipsMapMem(ScrnInfoPtr pScrn)
 	    if (IS_HiQV(cPtr)) {
 		if (cPtr->Bus == ChipsPCI)
 		    cPtr->MMIOBase = xf86MapPciMem(pScrn->scrnIndex,
-			  VIDMEM_MMIO_32BIT,cPtr->PciTag, cPtr->IOAddress,
-			  0x20000L);
-		else
+			   VIDMEM_MMIO_32BIT,cPtr->PciTag, cPtr->IOAddress,
+			   0x20000L);
+		 else 
 		    cPtr->MMIOBase = xf86MapVidMem(pScrn->scrnIndex,
-			  VIDMEM_MMIO_32BIT, cPtr->IOAddress, 0x20000L);
+			   VIDMEM_MMIO_32BIT, cPtr->IOAddress, 0x20000L);
 	    } else {
 		if (cPtr->Bus == ChipsPCI)
 		    cPtr->MMIOBase = xf86MapPciMem(pScrn->scrnIndex,
@@ -7063,6 +7066,10 @@ chipsUnmapMem(ScrnInfoPtr pScrn)
 	    if (cPtr->MMIOBase)
 		xf86UnMapVidMem(pScrn->scrnIndex, (pointer)cPtr->MMIOBase,
 				0x20000);
+	    if (cPtr->MMIOBasePipeB)
+		xf86UnMapVidMem(pScrn->scrnIndex, (pointer)cPtr->MMIOBasePipeB,
+				0x20000);
+	    cPtr->MMIOBasePipeB = NULL;
 	} else {
 	  if (cPtr->MMIOBase)
 	      xf86UnMapVidMem(pScrn->scrnIndex, (pointer)cPtr->MMIOBase,
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/chips/ct_video.c b/xc/programs/Xserver/hw/xfree86/drivers/chips/ct_video.c
index 0aa1bb504..f5a824e90 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/chips/ct_video.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/chips/ct_video.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/chips/ct_video.c,v 1.11 2002/09/16 18:05:53 eich Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/chips/ct_video.c,v 1.12 2002/11/25 14:04:58 eich Exp $ */
 
 #include "xf86.h"
 #include "xf86_OSproc.h"
@@ -130,7 +130,7 @@ static XF86ImageRec Images[NUM_IMAGES] =
 	16,
 	XvPacked,
 	1,
-	15, 0x001F, 0x03E0, 0x7C00,
+	15, 0x7C00, 0x03E0, 0x001F,
 	0, 0, 0,
 	0, 0, 0,
 	0, 0, 0,
@@ -147,7 +147,7 @@ static XF86ImageRec Images[NUM_IMAGES] =
 	16,
 	XvPacked,
 	1,
-	16, 0x001F, 0x07E0, 0xF800,
+	16, 0xF800, 0x07E0, 0x001F,
 	0, 0, 0,
 	0, 0, 0,
 	0, 0, 0,
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/cirrus/Imakefile b/xc/programs/Xserver/hw/xfree86/drivers/cirrus/Imakefile
index 005263bbf..ad31df7a4 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/cirrus/Imakefile
+++ b/xc/programs/Xserver/hw/xfree86/drivers/cirrus/Imakefile
@@ -1,4 +1,4 @@
-XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/drivers/cirrus/Imakefile,v 1.32 2001/02/15 17:39:28 eich Exp $
+XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/drivers/cirrus/Imakefile,v 1.33 2003/02/17 17:06:41 dawes Exp $
 XCOMM
 XCOMM This is an Imakefile for the Cirrus Logic driver.  
 XCOMM
@@ -30,7 +30,7 @@ INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86OSSRC) \
            -I$(FONTINCSRC)     -I$(SERVERSRC)/include \
            -I$(XINCLUDESRC)    -I$(EXTINCSRC) \
 	   -I$(XF86OSSRC)/int10 -I$(XF86SRC)/shadowfb \
-	   -I$(SERVERSRC)/render -I$(XF86OSSRC)/vbe
+	   -I$(SERVERSRC)/render -I$(XF86SRC)/vbe
 #endif
 
 #if MakeHasPosixVariableSubstitutions
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/cyrix/ChangeLog b/xc/programs/Xserver/hw/xfree86/drivers/cyrix/ChangeLog
new file mode 100644
index 000000000..99f2789c5
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/cyrix/ChangeLog
@@ -0,0 +1,11 @@
+
+Release 0.2
+-----------
+First release to the unsuspecting masses.
+
+Release 0.3
+-----------
+Fix segv on X -configure				(Bruce Montague)
+Fix hang with weird video layouts			(Bruce Montague)
+Initial (not yet used) code for VSA free mode setup	(Alan Cox)
+
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/cyrix/Imakefile b/xc/programs/Xserver/hw/xfree86/drivers/cyrix/Imakefile
index d6a31c7bf..6e70b0f31 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/cyrix/Imakefile
+++ b/xc/programs/Xserver/hw/xfree86/drivers/cyrix/Imakefile
@@ -1,4 +1,4 @@
-XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/drivers/cyrix/Imakefile,v 1.6 2002/02/13 21:32:50 dawes Exp $
+XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/drivers/cyrix/Imakefile,v 1.8 2003/02/17 17:06:42 dawes Exp $
 XCOMM
 XCOMM This is an Imakefile for the CYRIX driver.  
 XCOMM
@@ -6,18 +6,19 @@ XCOMM
 #define IHaveModules
 #include <Server.tmpl>
 
-SRCS = cyrix_driver.c cyrix_accel.c cyrix_bank.c cyrix_helper.c
-OBJS = cyrix_driver.o cyrix_accel.o cyrix_bank.o cyrix_helper.o
+SRCS = cyrix_driver.c cyrix_accel.c cyrix_bank.c cyrix_helper.c cyrix_shadow.c
+OBJS = cyrix_driver.o cyrix_accel.o cyrix_bank.o cyrix_helper.o cyrix_shadow.o
 
 #if defined(XF86DriverSDK)
 INCLUDES = -I. -I../../include
 #else
 INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86OSSRC) -I$(SERVERSRC)/Xext \
            -I$(SERVERSRC)/fb -I$(SERVERSRC)/mi -I$(XF86SRC)/i2c \
-           -I$(XF86SRC)/xaa -I$(XF86SRC)/rac \
+           -I$(XF86SRC)/xaa -I$(XF86SRC)/rac -I$(XF86SRC)/shadowfb \
            -I$(XF86SRC)/vgahw -I$(XF86SRC)/ddc -I$(XF86SRC)/ramdac \
            -I$(FONTINCSRC) -I$(SERVERSRC)/include -I$(XINCLUDESRC) \
-	   -I$(EXTINCSRC) -I$(SERVERSRC)/render
+	   -I$(XTOP)/include/extensions -I$(SERVERSRC)/render \
+	   -I$(XF86SRC)/vbe -I$(XF86SRC)/int10
 #endif
 
 #if MakeHasPosixVariableSubstitutions
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/cyrix/README b/xc/programs/Xserver/hw/xfree86/drivers/cyrix/README
new file mode 100644
index 000000000..f25e7590c
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/cyrix/README
@@ -0,0 +1,59 @@
+
+MediaGX Fun
+-----------
+
+This tries to document the "gotcha's" associated with the Cyrix
+hardware and also the SoftVGA (SMM BIOS emulation of video) implementation. 
+
+o	Palette Handling
+
+	In theory 8bit modes can use the VGA colour control. In practice
+	this doesn't work at least on some 5530 based systems with LCD
+	displays.
+
+	Some 5510 based systems need special handling for external LCD
+	RAMDAC. We don't currently do this.
+
+o	Mode Switches
+
+	If you load unsuitable data into the Soft VGA mode switching
+	registers or forgot to set the ModeSwitch disable before you
+	load the registers up mode switches may fail. In a few cases
+	you get bogus illegal instructions reported
+
+o	BIOS Versions
+
+	The VSA1/VSA2 firmware that does all the magic on the Cyrix
+	processors is an SMM mode software block in the BIOS. This means
+	the Cyrix is one system where different BIOSes have different bugs
+	instead of just having to fight the hardware
+
+	The BIOS is just plain unusable in a few systems. Code exists to
+	do some mode switches the hard way without VSA getting involved.
+
+o	Compression Buffer
+
+	To cut down on the memory usage the display scan checks dirty
+	bits on each scan line (per frame in some situations) and if the
+	line is dirty it scans it from the original buffer and writes back
+	a compressed line if it can do so. If it does this it clears the
+	dirty bit. We have to handle dirty bits ourselves and getting it
+	wrong produces interesting visuals.
+
+o	Memory Layout
+
+	When you use VSA to do mode set up it makes certain assumptions 
+	about memory layout. Typically it lays out the frame buffer
+	with the compression buffer at the end. When there is enough
+	space between the lines (the chip only handles 1024/2048 bytes
+	stride) it will hide them in the gaps
+
+
+
+To Do
+-----
+-	Add bare-metal setup option for the BIOS afflicted
+-	Add 5510 external ics5432 RAMDAC support
+-	Restore hardware cursor support
+-	DDC/EDID and friends
+-	RandR would be nice for the tablet pc systems
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/cyrix/cyrix.h b/xc/programs/Xserver/hw/xfree86/drivers/cyrix/cyrix.h
index 3fa584906..c75c22223 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/cyrix/cyrix.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/cyrix/cyrix.h
@@ -1,5 +1,6 @@
 /*
  * Copyright 2000 by Richard A. Hecker, California, United States
+ * Copyright 2002 by Red Hat Inc.
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
@@ -19,14 +20,24 @@
  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  * PERFORMANCE OF THIS SOFTWARE.
  *
+ * RED HAT DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+ * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+ * EVENT SHALL RICHARD HECKER BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+ * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
+ * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ *
  * Author:  Richard Hecker, hecker@cat.dfrc.nasa.gov
  *          Re-written for XFree86 v4.0
+ * Chunks re-written again for XFree86 v4.2
+ *	    Alan Cox <alan@redhat.com>
  * Previous driver (pre-XFree86 v4.0) by
  *          Annius V. Groenink (A.V.Groenink@zfc.nl, avg@cwi.nl),
  *          Dirk H. Hohndel (hohndel@suse.de),
  *          Portions: the GGI project & confidential CYRIX databooks.
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/cyrix/cyrix.h,v 1.3 2001/05/04 19:05:36 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/cyrix/cyrix.h,v 1.4 2002/11/06 11:38:59 alanh Exp $ */
 
 #ifndef _CYRIX_H_
 #define _CYRIX_H_
@@ -52,6 +63,7 @@ typedef struct {
     unsigned char cyrixRegsDAC[0x01];
     unsigned char cyrixRegsClock[0x03];
     unsigned char DacRegs[0x300];
+    unsigned int Colormap[0x100];	/* Actually 18bit values */
 } CYRIXRegRec, *CYRIXRegPtr;
 
 typedef struct {
@@ -59,6 +71,7 @@ typedef struct {
 	unsigned char VerticalTimingExtension;
 	unsigned char ExtendedAddressControl;
 	unsigned char ExtendedOffset;
+	unsigned char Offset;
 	unsigned char ExtendedColorControl;
 	unsigned char DisplayCompression;
 	unsigned char DriverControl;
@@ -113,9 +126,15 @@ typedef struct {
 	vgaHWRec		std;
 	prevExt			PrevExt;
 	Bool			HWCursor;
-	Bool			IsCyber;
-	Bool			NewClockCode;
+/*	Bool			IsCyber;
+	Bool			NewClockCode;*/
 	Bool			NoAccel;
+	Bool			NoCompress;
+	Bool			ShadowFB;
+	unsigned char *		ShadowPtr;
+	int			ShadowPitch;
+	int			Rotate;
+	void			(*PointerMoved)(int index, int x, int y);
 	OptionInfoPtr		Options;
     /* accel stuff */
         int bltBufWidth;
@@ -139,8 +158,12 @@ extern int	CyrixInit(ScrnInfoPtr pScrn, DisplayModePtr mode);
 extern void    	CyrixRestore(ScrnInfoPtr pScrn, CYRIXRegPtr cyrixReg);
 extern void *  	CyrixSave(ScrnInfoPtr pScrn, CYRIXRegPtr cyrixReg);
 
+/* Shadow routines */
+extern void	CYRIXRefreshArea(ScrnInfoPtr pScrn, int num, BoxPtr pbox);
+extern void	CYRIXPointerMoved(int index, int x, int y);
+extern void	CYRIXRefreshArea8(ScrnInfoPtr pScrn, int num, BoxPtr pbox);
+extern void	CYRIXRefreshArea16(ScrnInfoPtr pScrn, int num, BoxPtr pbox);
 
-/* externs in cyrix_asm.s */
 extern void CYRIXsetBlitBuffers(void);
 extern void CYRIXsetBlitBuffersOnOldChip(void);
 
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/cyrix/cyrix.man b/xc/programs/Xserver/hw/xfree86/drivers/cyrix/cyrix.man
index 9810a8a87..f8fb670c3 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/cyrix/cyrix.man
+++ b/xc/programs/Xserver/hw/xfree86/drivers/cyrix/cyrix.man
@@ -1,4 +1,4 @@
-.\" $XFree86: xc/programs/Xserver/hw/xfree86/drivers/cyrix/cyrix.man,v 1.2 2001/01/27 18:20:47 dawes Exp $ 
+.\" $XFree86: xc/programs/Xserver/hw/xfree86/drivers/cyrix/cyrix.man,v 1.3 2002/11/06 11:38:59 alanh Exp $ 
 .\" shorthand for double quote that works everywhere.
 .ds q \N'34'
 .TH CYRIX __drivermansuffix__ __vendorversion__
@@ -14,17 +14,62 @@ cyrix \- Cyrix video driver
 .fi
 .SH DESCRIPTION
 .B cyrix 
-is an XFree86 driver for Cyrix video chips.
-THIS MAN PAGE NEEDS TO BE FILLED IN.
+is an XFree86 driver for the Cyrix MediaGX (now Natsemi Geode) series of
+processors when using the built in video.
 .SH SUPPORTED HARDWARE
 The
 .B cyrix
-driver supports...
+driver supports the MediaGX, MediaGXi and MediaGXm processors, as well as
+the Natsemi 'Geode' branded processors. It supports the CS5510, CS5520,
+CS5530 and CS5530A companion chips. The driver supports 4, 8, 15 and 16 bit
+deep displays with video compression and acceleration.
+.PP
+The MediaGX run length compresses its shared framebuffer, for the best
+performance on a MediaGX machine pick backgrounds that compress well
+horizonally.
 .SH CONFIGURATION DETAILS
 Please refer to XF86Config(__filemansuffix__) for general configuration
 details.  This section only covers configuration details specific to this
 driver.
+.PP
+The following driver
+.B options
+are supported
+.TP
+.BI "Option \*qNoAccel\*q \*q" boolean \*q
+Disable or enable acceleration. Default: acceleration is enabled.
+.TP
+.BI "Option \*qSWCursor\*q \*q" boolean \*q
+Disable or enable software cursor. Default software cursor is enabled and a
+hardware cursor is used.
+.TP
+.BI "Option \*qHWCursor\*q \*q" boolean \*q
+Disable or enable hardware cursor. Default hardware cursor is disabled.
+.TP
+.BI "Option \*qShadowFB\*q \*q" boolean \*q
+Disable or enable shadow frame buffer. The shadow buffer is normally only
+used when rotating the screen. The default is false.
+.TP
+.BI "Option \*qRotate\*q \*qCW\*q"
+.TP
+.BI "Option \*qRotate\*q \*qCCW\*q"
+.PP
+Rotate the display clockwise or counterclockwise for use on Cyrix based
+tablet PC systems. This mode is currently unaccelerated.
+.SH "BUGS"
+This driver has not been tested on the original 5510 hardware for some
+considerable time.
+.PP
+8bit mode does not currently work on the CS5510 with external RAMDAC.
+.PP
+The 5530A video overlay facility is not currently supported.
+.PP
+XFree86 uses the MediaGX 'SoftVGA' interface. On a small number of boards
+this is buggy and may result in strange illegal instruction traps.
+.PP
+Hardware cursors are not currently supported.
 .SH "SEE ALSO"
 XFree86(1), XF86Config(__filemansuffix__), xf86config(1), Xserver(1), X(__miscmansuffix__)
 .SH AUTHORS
-Authors include: ...
+Authors include: Richard Hecker, Annius Groenink, Dirk Hohndel, The GGI
+Project, Alan Cox.
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/cyrix/cyrix_accel.c b/xc/programs/Xserver/hw/xfree86/drivers/cyrix/cyrix_accel.c
index 92252e92f..652c1d845 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/cyrix/cyrix_accel.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/cyrix/cyrix_accel.c
@@ -26,7 +26,7 @@
  *          Dirk H. Hohndel (hohndel@suse.de),
  *          Portions: the GGI project & confidential CYRIX databooks.
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/cyrix/cyrix_accel.c,v 1.4 2002/01/07 18:46:04 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/cyrix/cyrix_accel.c,v 1.5 2002/11/06 11:38:59 alanh Exp $ */
 
 #include "vgaHW.h"
 #include "xf86.h"
@@ -55,9 +55,6 @@ static const int windowsROPsrcMask[16] = { 0x22, 0xA2, 0x62, 0xE2,
                                            0x26, 0xA6, 0x66, 0xE6,
                                            0x2E, 0xAE, 0x6E, 0xEE };
 
-#if 0
-#endif
-
 /* Forward declaration of functions used in the driver */
 void CYRIXAccelSync(ScrnInfoPtr pScrn);
 void CYRIXSetupForSolidFill(ScrnInfoPtr pScrn, int color, int rop,
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/cyrix/cyrix_bank.c b/xc/programs/Xserver/hw/xfree86/drivers/cyrix/cyrix_bank.c
index bcff1c0e4..e06d6dd2d 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/cyrix/cyrix_bank.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/cyrix/cyrix_bank.c
@@ -26,7 +26,7 @@
  *          Dirk H. Hohndel (hohndel@suse.de),
  *          Portions: the GGI project & confidential CYRIX databooks.
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/cyrix/cyrix_bank.c,v 1.2 2000/07/26 01:52:18 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/cyrix/cyrix_bank.c,v 1.3 2002/11/06 11:38:59 alanh Exp $ */
 
 #define PSZ 8
 
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/cyrix/cyrix_driver.c b/xc/programs/Xserver/hw/xfree86/drivers/cyrix/cyrix_driver.c
index 2a6227ee2..990847839 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/cyrix/cyrix_driver.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/cyrix/cyrix_driver.c
@@ -1,5 +1,6 @@
 /*
  * Copyright 2000 by Richard A. Hecker, California, United States
+ * Copyright 2002 by Red Hat Inc.
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
@@ -19,14 +20,37 @@
  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  * PERFORMANCE OF THIS SOFTWARE.
  *
+ * RED HAT DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+ * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+ * EVENT SHALL RICHARD HECKER BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+ * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
+ * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ *
  * Author:  Richard Hecker, hecker@cat.dfrc.nasa.gov
  *          Re-written for XFree86 v4.0
+ *
+ * Chunks re-written again for XFree86 v4.2
+ *	    Alan Cox <alan@redhat.com>
+ *		- Fixed cursor handling
+ *		- Rewrote parts of the broken mode switch code
+ *		- Added proper PCI detection
+ *		- Added ShadowFB support
+ *		- Added rotate support
+ *		- Fixed palette loading/restore
+ *		- Added "Nocompression" option
+ *		- Fixed line length loading
+ *		- Fixed panning logic
+ *
  * Previous driver (pre-XFree86 v4.0) by
  *          Annius V. Groenink (A.V.Groenink@zfc.nl, avg@cwi.nl),
  *          Dirk H. Hohndel (hohndel@suse.de),
  *          Portions: the GGI project & confidential CYRIX databooks.
+ *		(note that most of the data books have been released by
+ *		 NatSemi and are downloadable for free as pdf files)
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/cyrix/cyrix_driver.c,v 1.24 2002/01/04 21:22:29 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/cyrix/cyrix_driver.c,v 1.26 2003/01/07 00:05:13 alanh Exp $ */
 
 #include "fb.h"
 #include "mibank.h"
@@ -38,10 +62,14 @@
 #include "xf86PciInfo.h"
 #include "xf86Pci.h"
 #include "xf86cmap.h"
+#include "shadowfb.h"
 #include "vgaHW.h"
+#include "xf86DDC.h"
 #include "xf86RAC.h"
 #include "xf86Resources.h"
 #include "compiler.h"
+#include "xf86int10.h"
+#include "vbe.h"
 
 #include "cyrix.h"
 
@@ -75,12 +103,11 @@ static int	CYRIXValidMode(int scrnIndex, DisplayModePtr mode, Bool verbose,
 			     int flags);
 
 /* Internally used functions */
-#if 0
-static void     CYRIXEnterLeave(Bool enter);
-#endif
 static void	CYRIXSave(ScrnInfoPtr pScrn);
 static void	CYRIXRestore(ScrnInfoPtr pScrn);
 static Bool	CYRIXModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode);
+static void	CYRIXRestorePalette(ScrnInfoPtr pScrn);
+static void	CYRIXSavePalette(ScrnInfoPtr pScrn);
 
 /* Misc additional routines */
 void     CYRIXSetRead(int bank);
@@ -130,13 +157,19 @@ static IsaChipsets CYRIXISAChipsets[] = {
 typedef enum {
     OPTION_SW_CURSOR,
     OPTION_HW_CURSOR,
-    OPTION_NOACCEL
+    OPTION_NOACCEL,
+    OPTION_NOCOMPRESS,
+    OPTION_SHADOW_FB,
+    OPTION_ROTATE
 } CYRIXOpts;
 
 static const OptionInfoRec CYRIXOptions[] = {
     { OPTION_SW_CURSOR,		"SWcursor",	OPTV_BOOLEAN,	{0}, FALSE },
-    { OPTION_HW_CURSOR,		"HWcursor",	OPTV_BOOLEAN,	{0}, FALSE  },
+    { OPTION_HW_CURSOR,		"HWcursor",	OPTV_BOOLEAN,	{0}, FALSE },
     { OPTION_NOACCEL,		"NoAccel",	OPTV_BOOLEAN,	{0}, FALSE },
+    { OPTION_NOCOMPRESS,	"NoCompression",OPTV_BOOLEAN,   {0}, FALSE },
+    { OPTION_SHADOW_FB,		"ShadowFB",	OPTV_BOOLEAN,	{0}, FALSE },
+    { OPTION_ROTATE,		"Rotate",	OPTV_ANYSTR,	{0}, FALSE },
     { -1,			NULL,		OPTV_NONE,	{0}, FALSE }
 };
 
@@ -169,6 +202,18 @@ static const char *xaaSymbols[] = {
     NULL
 };
 
+static const char *shadowSymbols[] = {
+    "ShadowFBInit",
+    NULL
+};
+
+static const char *vbeSymbols[] = {
+    "VBEInit",
+    "vbeDoEDID",
+    "vbeFree",
+    NULL
+};
+
 /* access to the MediaGX video hardware registers */
 
 
@@ -204,7 +249,7 @@ cyrixSetup(pointer module, pointer opts, int *errmaj, int *errmin)
     if (!setupDone) {
 	setupDone = TRUE;
 	xf86AddDriver(&CYRIX, module, 0);
-	LoaderRefSymLists(vgahwSymbols, fbSymbols, xaaSymbols, NULL);
+	LoaderRefSymLists(vgahwSymbols, fbSymbols, xaaSymbols, vbeSymbols, shadowSymbols, NULL);
 	return (pointer)TRUE;
     } 
 
@@ -294,6 +339,18 @@ CYRIXAvailableOptions(int chip, int busid)
     return CYRIXOptions;
 }
 
+#define PCI_CHIP_CYRIX5510	0x0000
+#define PCI_CHIP_CYRIX5520	0x0002
+#define PCI_CHIP_CYRIX5530	0x0104
+
+/* Conversion PCI ID to chipset name */
+static PciChipsets CYRIXPCIchipsets[] = {
+	{ CHIP_CYRIXmediagx, PCI_CHIP_CYRIX5510, RES_EXCLUSIVE_VGA },
+	{ CHIP_CYRIXmediagx, PCI_CHIP_CYRIX5520, RES_EXCLUSIVE_VGA },
+	{ CHIP_CYRIXmediagx, PCI_CHIP_CYRIX5530, RES_EXCLUSIVE_VGA },
+	{ -1,        -1,                 RES_UNDEFINED }
+};
+
 /* Mandatory */
 static Bool
 CYRIXProbe(DriverPtr drv, int flags)
@@ -324,43 +381,80 @@ CYRIXProbe(DriverPtr drv, int flags)
 	 */
 	return FALSE;
     }
+#ifdef DEBUG
     xf86ErrorFVerb(3,"%s: Device Sections found: %d\n",CYRIX_NAME, numDevSections);
+#endif
+
     /* Should look like an ISA device */
 
+    /* PCI BUS */
+    if (xf86GetPciVideoInfo() ) {
+	numUsed = xf86MatchPciInstances(CYRIX_NAME, PCI_VENDOR_CYRIX,
+					CYRIXChipsets, CYRIXPCIchipsets, 
+					devSections,numDevSections,
+					drv, &usedChips);
+
+	if (numUsed > 0) {
+	    if (flags & PROBE_DETECT)
+		foundScreen = TRUE;
+	    else for (i = 0; i < numUsed; i++) {
+		ScrnInfoPtr pScrn = NULL;
+		/* Allocate a ScrnInfoRec and claim the slot */
+		if ((pScrn = xf86ConfigPciEntity(pScrn, 0, usedChips[i],
+						       CYRIXPCIchipsets,NULL, NULL,
+						       NULL, NULL, NULL))) {
+		    pScrn->driverVersion = VERSION;
+		    pScrn->driverName    = CYRIX_DRIVER_NAME;
+		    pScrn->name          = CYRIX_NAME;
+		    pScrn->Probe         = CYRIXProbe;
+		    pScrn->PreInit       = CYRIXPreInit;
+		    pScrn->ScreenInit    = CYRIXScreenInit;
+		    pScrn->SwitchMode    = CYRIXSwitchMode;
+		    pScrn->AdjustFrame   = CYRIXAdjustFrame;
+		    pScrn->LeaveVT       = CYRIXLeaveVT;
+		    pScrn->EnterVT       = CYRIXEnterVT;
+		    pScrn->FreeScreen    = CYRIXFreeScreen;
+		    pScrn->ValidMode     = CYRIXValidMode;
+		    foundScreen = TRUE;
+		}
+	    }
+	    xfree(usedChips);
+	}
+    }
+    
+
     numUsed = xf86MatchIsaInstances(CYRIX_NAME,CYRIXChipsets,
 					CYRIXISAChipsets,drv,
 					CYRIXFindIsaDevice,devSections,
 					numDevSections,&usedChips);
+    if(numUsed > 0) {
+        foundScreen = TRUE;
 
-    if (numUsed <= 0)
-	return FALSE;
-
-    foundScreen = TRUE;
+        /* Free it since we don't need that list after this */
+        xfree(devSections);
 
-    /* Free it since we don't need that list after this */
-    xfree(devSections);
+        if (!(flags & PROBE_DETECT)) {
+          for (i=0; i < numUsed; i++) {
 
-    if (!(flags & PROBE_DETECT)) {
-      for (i=0; i < numUsed; i++) {
-
-      /* Fill in what we can of the ScrnInfoRec */
-	    pScrn = NULL;
-	    if ((pScrn = xf86ConfigIsaEntity(pScrn, 0, usedChips[i],
+          /* Fill in what we can of the ScrnInfoRec */
+	        pScrn = NULL;
+	        if ((pScrn = xf86ConfigIsaEntity(pScrn, 0, usedChips[i],
 						   CYRIXISAChipsets, NULL,
 						   NULL, NULL, NULL, NULL))){
-		pScrn->driverVersion = VERSION;
-		pScrn->driverName    = CYRIX_DRIVER_NAME;
-		pScrn->name          = CYRIX_NAME;
-		pScrn->Probe         = CYRIXProbe;
-		pScrn->PreInit       = CYRIXPreInit;
-		pScrn->ScreenInit    = CYRIXScreenInit;
-		pScrn->SwitchMode    = CYRIXSwitchMode;
-		pScrn->AdjustFrame   = CYRIXAdjustFrame;
-		pScrn->LeaveVT       = CYRIXLeaveVT;
-		pScrn->EnterVT       = CYRIXEnterVT;
-		pScrn->FreeScreen    = CYRIXFreeScreen;
-		pScrn->ValidMode     = CYRIXValidMode;
-	    }
+		    pScrn->driverVersion = VERSION;
+		    pScrn->driverName    = CYRIX_DRIVER_NAME;
+		    pScrn->name          = CYRIX_NAME;
+		    pScrn->Probe         = CYRIXProbe;
+		    pScrn->PreInit       = CYRIXPreInit;
+		    pScrn->ScreenInit    = CYRIXScreenInit;
+		    pScrn->SwitchMode    = CYRIXSwitchMode;
+		    pScrn->AdjustFrame   = CYRIXAdjustFrame;
+		    pScrn->LeaveVT       = CYRIXLeaveVT;
+		    pScrn->EnterVT       = CYRIXEnterVT;
+		    pScrn->FreeScreen    = CYRIXFreeScreen;
+		    pScrn->ValidMode     = CYRIXValidMode;
+	        }
+	 }
       }
     }
     xfree(usedChips);
@@ -423,6 +517,7 @@ CYRIXFindIsaDevice(GDevPtr dev)
     /* Unprotect MediaGX extended registers */
     outb(vgaIOBase + 4, CrtcExtendedRegisterLock);
     outb(vgaIOBase + 5, 0x00);
+
     return (int)CHIP_CYRIXmediagx;
 
  fail:
@@ -431,6 +526,17 @@ CYRIXFindIsaDevice(GDevPtr dev)
     outb(vgaIOBase + 5, 0x00);
     return -1;
 }
+
+static void
+CYRIXProbeDDC(ScrnInfoPtr pScrn, int index)
+{
+    vbeInfoPtr pVbe;
+    if (xf86LoadSubModule(pScrn, "vbe")) {
+	pVbe = VBEInit(NULL,index);
+	ConfiguredMonitor = vbeDoEDID(pVbe, NULL);
+	vbeFree(pVbe);
+    }
+}
 	
 /* Mandatory */
 static Bool
@@ -446,8 +552,8 @@ CYRIXPreInit(ScrnInfoPtr pScrn, int flags)
     int device_step, device_revision;
     int vgaIOBase;
     unsigned char gcr;
-
-    if (flags & PROBE_DETECT) return FALSE;
+    static int accelWidths[3]= {2,1024, 2048};
+    const char *s;
 
     /* Allocate the CYRIXRec driverPrivate */
     if (!CYRIXGetRec(pScrn)) return FALSE;
@@ -466,6 +572,16 @@ CYRIXPreInit(ScrnInfoPtr pScrn, int flags)
      */
     pCyrix = CYRIXPTR(pScrn);
 
+    pCyrix->pEnt = xf86GetEntityInfo(pScrn->entityList[0]);
+
+    if (pCyrix->pEnt->location.type != BUS_PCI)
+      return FALSE;
+
+    if (flags & PROBE_DETECT) {
+	CYRIXProbeDDC(pScrn, pCyrix->pEnt->index);
+	return TRUE;
+    }
+
     /* The vgahw module should be loaded here when needed */
     if (!xf86LoadSubModule(pScrn, "vgahw"))
 	return FALSE;
@@ -497,7 +613,6 @@ CYRIXPreInit(ScrnInfoPtr pScrn, int flags)
     physbase = (gcr & 3) << 30;
     padsize = (gcr & 12) ? (((gcr & 12) >> 2) + 1) : 0;
 
-
     /*      end GGI MediaGX driver based code */
     if (padsize == 0) return (FALSE);
 
@@ -623,20 +738,10 @@ CYRIXPreInit(ScrnInfoPtr pScrn, int flags)
     xf86ProcessOptions(pScrn->scrnIndex, pScrn->options, pCyrix->Options);
 
     /* Set the bits per RGB for 8bpp mode */
-    if (pScrn->depth == 8) {
-	/* XXX This is here just to test options. */
-	/* Default to 8 */
-	pScrn->rgbBits = 8;
-#if 0
-	if (xf86GetOptValInteger(pCyrix->Options, OPTION_RGB_BITS,
-				 &pScrn->rgbBits)) {
-	    xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Bits per RGB set to %d\n",
-		       pScrn->rgbBits);
-	}
-#endif
-    }
+    pScrn->rgbBits = 6;
+
     from = X_DEFAULT;
-    pCyrix->HWCursor = TRUE;
+    pCyrix->HWCursor = FALSE;
     if (xf86IsOptionSet(pCyrix->Options, OPTION_HW_CURSOR)) {
 	from = X_CONFIG;
 	pCyrix->HWCursor = TRUE;
@@ -645,6 +750,39 @@ CYRIXPreInit(ScrnInfoPtr pScrn, int flags)
 	from = X_CONFIG;
 	pCyrix->HWCursor = FALSE;
     }
+    if (pCyrix->HWCursor == TRUE)
+    	xf86DrvMsg(pScrn->scrnIndex, from, "Hardware cursor is disabled in this release\n");
+
+    if (xf86ReturnOptValBool(pCyrix->Options, OPTION_SHADOW_FB, FALSE)) {
+	pCyrix->ShadowFB = TRUE;
+	pCyrix->NoAccel = TRUE;
+	xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
+		"Using \"Shadow Framebuffer\" - acceleration disabled\n");
+    }
+    pCyrix->Rotate = 0;
+    if ((s = xf86GetOptValString(pCyrix->Options, OPTION_ROTATE))) {
+      if(!xf86NameCmp(s, "CW")) {
+	pCyrix->ShadowFB = TRUE;
+	pCyrix->NoAccel = TRUE;
+	pCyrix->HWCursor = FALSE;
+	pCyrix->Rotate = 1;
+	xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
+		"Rotating screen clockwise - acceleration disabled\n");
+      } else
+      if(!xf86NameCmp(s, "CCW")) {
+	pCyrix->ShadowFB = TRUE;
+	pCyrix->NoAccel = TRUE;
+	pCyrix->HWCursor = FALSE;
+	pCyrix->Rotate = -1;
+	xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
+		"Rotating screen counter clockwise - acceleration disabled\n");
+      } else {
+	xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
+		"\"%s\" is not a valid value for Option \"Rotate\"\n", s);
+	xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+		"Valid options are \"CW\" or \"CCW\"\n");
+      }
+    }
     xf86DrvMsg(pScrn->scrnIndex, from, "Using %s cursor\n",
 		pCyrix->HWCursor ? "HW" : "SW");
     if (xf86IsOptionSet(pCyrix->Options, OPTION_NOACCEL)) {
@@ -652,6 +790,12 @@ CYRIXPreInit(ScrnInfoPtr pScrn, int flags)
 	xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Acceleration disabled\n");
     }
 
+    pCyrix->NoCompress = FALSE;
+    if (xf86IsOptionSet(pCyrix->Options, OPTION_NOCOMPRESS)) {
+	pCyrix->NoCompress = TRUE;
+	xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Compression disabled\n");
+    }
+
     pCyrix->PciInfo = NULL;
     pCyrix->RamDac = -1;
 
@@ -672,8 +816,6 @@ CYRIXPreInit(ScrnInfoPtr pScrn, int flags)
 
 
     pCyrix->EngineOperation = 0x00;
-    pCyrix->IsCyber = FALSE;
-    pCyrix->NewClockCode = FALSE;
 
     xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Found %s chip\n", pScrn->chipset);
     
@@ -751,7 +893,7 @@ CYRIXPreInit(ScrnInfoPtr pScrn, int flags)
      */
     i = xf86ValidateModes(pScrn, pScrn->monitor->Modes,
 			pScrn->display->modes, clockRanges,
-			NULL, 256, 2048,
+			accelWidths, 256, 2048,
 			pScrn->bitsPerPixel, 128, 2048,
 			pScrn->display->virtualX,
 			pScrn->display->virtualY,
@@ -823,6 +965,15 @@ CYRIXPreInit(ScrnInfoPtr pScrn, int flags)
 	}
     }
 
+    /* Load shadowfb if needed */
+    if (pCyrix->ShadowFB) {
+	if (!xf86LoadSubModule(pScrn, "shadowfb")) {
+	    CYRIXFreeRec(pScrn);
+	    return FALSE;
+	}
+	xf86LoaderReqSymLists(shadowSymbols, NULL);
+    }
+
     return TRUE;
 }
 
@@ -843,6 +994,7 @@ CYRIXSave(ScrnInfoPtr pScrn)
 
     vgaHWSave(pScrn, vgaReg, VGA_SR_ALL);
     CyrixSave(pScrn, cyrixReg); 
+    CYRIXSavePalette(pScrn);
 }
 
 
@@ -869,7 +1021,6 @@ CYRIXModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
         return FALSE;
     pScrn->vtSema = TRUE;
 
-
     pCyrix = CYRIXPTR(pScrn);
 
     /* Do the guts of this work */
@@ -883,7 +1034,7 @@ CYRIXModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
     cyrixReg = &pCyrix->ModeReg;
 
     CyrixRestore(pScrn, cyrixReg);
-    /*vgaHWRestore(pScrn, vgaReg, VGA_SR_MODE); */
+/*    vgaHWRestore(pScrn, vgaReg, VGA_SR_MODE);*/
 
     return TRUE;
 }
@@ -907,12 +1058,80 @@ CYRIXRestore(ScrnInfoPtr pScrn)
     vgaHWProtect(pScrn, TRUE);
 
     /*CyrixRestore(pScrn, cyrixReg);*/
-
+    CYRIXRestorePalette(pScrn);
     vgaHWRestore(pScrn, vgaReg, VGA_SR_ALL);
 
     vgaHWProtect(pScrn, FALSE);
 }
 
+/* Needed because we are not VGA enough in all cases (eg 5530 LCD) */
+
+static void
+CYRIXLoadPalette(
+   ScrnInfoPtr pScrn,
+   int numColors,
+   int *indices,
+   LOCO *colors,
+   VisualPtr pVisual
+){
+   int i;
+   unsigned int locked;
+   CYRIXPrvPtr pCyrix = CYRIXPTR(pScrn);
+   
+   switch(pScrn->depth) {
+   case 15:	
+   case 16:
+	return;
+   }
+
+   locked = GX_REG(DC_UNLOCK);
+   GX_REG(DC_UNLOCK) = DC_UNLOCK_VALUE;
+   
+   for(i = 0; i < numColors; i++) {
+        unsigned int red, green, blue;
+        int index = indices[i];
+        
+        red = colors[index].red;
+        green = colors[index].green;
+        blue = colors[index].blue;;
+        
+        GX_REG(DC_PAL_ADDRESS) = index;
+        GX_REG(DC_PAL_DATA) = (red << 12) | (green << 6) | blue;
+   } 
+   GX_REG(DC_UNLOCK) = locked;
+}
+
+static void CYRIXSavePalette(ScrnInfoPtr pScrn)
+{
+   int i;
+   unsigned int locked;
+   CYRIXPrvPtr pCyrix = CYRIXPTR(pScrn);
+   
+   locked = GX_REG(DC_UNLOCK);
+   GX_REG(DC_UNLOCK) = DC_UNLOCK_VALUE;
+   
+   for(i = 0; i < 256; i++) {
+        GX_REG(DC_PAL_ADDRESS) = i;
+        pCyrix->SavedReg.Colormap[i] = GX_REG(DC_PAL_DATA);
+   } 
+   GX_REG(DC_UNLOCK) = locked;
+}
+
+static void CYRIXRestorePalette(ScrnInfoPtr pScrn)
+{
+   int i;
+   unsigned int locked;
+   CYRIXPrvPtr pCyrix = CYRIXPTR(pScrn);
+   
+   locked = GX_REG(DC_UNLOCK);
+   GX_REG(DC_UNLOCK) = DC_UNLOCK_VALUE;
+   
+   for(i = 0; i < 256; i++) {
+        GX_REG(DC_PAL_ADDRESS) = i;
+        GX_REG(DC_PAL_DATA) = pCyrix->SavedReg.Colormap[i];
+   } 
+   GX_REG(DC_UNLOCK) = locked;
+}
 
 /* Mandatory */
 
@@ -927,7 +1146,8 @@ CYRIXScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
     CYRIXPrvPtr pCyrix;
     int ret;
     VisualPtr visual;
-
+    int width, height, displayWidth;
+    unsigned char *FBStart;
     /* 
      * First get the ScrnInfoRec
      */
@@ -981,6 +1201,9 @@ CYRIXScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
 			      pScrn->defaultVisual))
 	    return FALSE;
     } else {
+	if (!xf86SetDefaultVisual(pScrn, -1))
+	    return FALSE;
+
 	if (!miSetVisualTypes(pScrn->depth, 
 			      miGetDefaultVisualMask(pScrn->depth),
 			      pScrn->rgbBits, pScrn->defaultVisual))
@@ -989,6 +1212,25 @@ CYRIXScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
 
     miSetPixmapDepths ();
     
+    width = pScrn->virtualX;
+    height = pScrn->virtualY;
+    displayWidth = pScrn->displayWidth;
+
+
+    if(pCyrix->Rotate) {
+	height = pScrn->virtualX;
+	width = pScrn->virtualY;
+    }
+
+    if(pCyrix->ShadowFB) {
+ 	pCyrix->ShadowPitch = BitmapBytePad(pScrn->bitsPerPixel * width);
+	pCyrix->ShadowPtr = xalloc(pCyrix->ShadowPitch * height);
+	displayWidth = pCyrix->ShadowPitch / (pScrn->bitsPerPixel >> 3);
+        FBStart = pCyrix->ShadowPtr;
+    } else {
+	pCyrix->ShadowPtr = NULL;
+	FBStart = pCyrix->FbBase;
+    }
     /*
      * Call the framebuffer layer's ScreenInit function, and fill in other
      * pScreen fields.
@@ -999,9 +1241,9 @@ CYRIXScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
     case 4:
     case 8:
     case 16:
-	ret = fbScreenInit(pScreen, pCyrix->FbBase, pScrn->virtualX,
-			pScrn->virtualY, pScrn->xDpi, pScrn->yDpi, 
-			pScrn->displayWidth, pScrn->bitsPerPixel);
+	ret = fbScreenInit(pScreen, FBStart, width,
+			height, pScrn->xDpi, pScrn->yDpi, 
+			displayWidth, pScrn->bitsPerPixel);
 	break;
     default:
 	xf86DrvMsg(scrnIndex, X_ERROR,
@@ -1079,14 +1321,34 @@ CYRIXScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
     if (!miCreateDefColormap(pScreen))
 	return FALSE;
 
-    if (!vgaHWHandleColormaps(pScreen))
-	return FALSE;
+    if (!xf86HandleColormaps(pScreen, 256, pScrn->rgbBits, 
+    			CYRIXLoadPalette, NULL,
+    			CMAP_RELOAD_ON_MODE_SWITCH))
+	return FALSE;    			
 
     xf86DPMSInit(pScreen, (DPMSSetProcPtr)CYRIXDisplayPowerManagementSet, 0);
 
     pScrn->memPhysBase = pCyrix->FbAddress;
     pScrn->fbOffset = 0;
 
+    if(pCyrix->ShadowFB) {
+	RefreshAreaFuncPtr refreshArea = CYRIXRefreshArea;
+
+	if(pCyrix->Rotate) {
+	    if (!pCyrix->PointerMoved) {
+		    pCyrix->PointerMoved = pScrn->PointerMoved;
+		    pScrn->PointerMoved = CYRIXPointerMoved;
+	    }
+
+	   switch(pScrn->bitsPerPixel) {
+	   case 8:	refreshArea = CYRIXRefreshArea8;	break;
+	   case 16:	refreshArea = CYRIXRefreshArea16;	break;
+	   }
+	}
+
+	ShadowFBInit(pScreen, refreshArea);
+    }
+
     pCyrix->CloseScreen = pScreen->CloseScreen;
     pScreen->CloseScreen = CYRIXCloseScreen;
     pScreen->SaveScreen = CYRIXSaveScreen;
@@ -1126,18 +1388,23 @@ CYRIXAdjustFrame(int scrnIndex, int x, int y, int flags)
 
     switch (pScrn->bitsPerPixel) {
 	case 4:
-	    base /= 2;
+/*	    base /= 2; */
+	    base = base >> 4;
 	    break;
 	case 8:
 	    base = (base & 0xFFFFFFF8) >> 2; 
 	    break;
 	case 16:
-	    base *= (pScrn->bitsPerPixel / 8);
+/*	    base *= (pScrn->bitsPerPixel / 8); */
+	    base /= 2;
 	    break;
     }
 
     GX_REG(DC_UNLOCK) = DC_UNLOCK_VALUE;
     
+    /* If you switch to poking FB_ST_OFFSET directly it expects to be
+       fed different values to the SoftVGA emulation code */
+       
     /*GX_REG(DC_FB_ST_OFFSET) = base; */
     /* CRT bits 0-15 */
     outw(vgaIOBase + 4, (base & 0x00FF00) | 0x0C); 
@@ -1209,6 +1476,8 @@ CYRIXCloseScreen(int scrnIndex, ScreenPtr pScreen)
     pCyrix = CYRIXPTR(pScrn);
     if(pCyrix->AccelInfoRec)
 	XAADestroyInfoRec(pCyrix->AccelInfoRec);
+    if (pCyrix->ShadowPtr)
+	xfree(pCyrix->ShadowPtr);
     pScrn->vtSema = FALSE;
     
     pScreen->CloseScreen = pCyrix->CloseScreen;
@@ -1245,34 +1514,3 @@ CYRIXSaveScreen(ScreenPtr pScreen, int mode)
     return vgaHWSaveScreen(pScreen, mode);
 }
 
-#if 0
-static void
-CYRIXEnterLeave(enter)
-Bool enter;
-{
-    unsigned char temp;
-
-    if (enter) {
-    	GX_REG(DC_UNLOCK) = DC_UNLOCK_VALUE;
-
-	/* Unprotect CRTC[0-7] */
-	outb(vgaIOBase + 4, 0x11); temp = inb(vgaIOBase + 5);
-	outb(vgaIOBase + 5, temp & 0x7F);
-
-	/* Unprotect MediaGX extended registers */
-	outb(vgaIOBase + 4, CrtcExtendedRegisterLock);
-	outb(vgaIOBase + 5, 0x57);
-	outb(vgaIOBase + 5, 0x4C);
-
-    } else {
-	/* Protect MediaGX extended registers */
-	outb(vgaIOBase + 4, CrtcExtendedRegisterLock);
-	outb(vgaIOBase + 5, 0x00);
-
-	/* Protect CRTC[0-7] */
-	outb(vgaIOBase + 4, 0x11); temp = inb(vgaIOBase + 5);
-	outb(vgaIOBase + 5, (temp & 0x7F) | 0x80);
-    	GX_REG(DC_UNLOCK) = 0;
-    }
-}
-#endif
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/cyrix/cyrix_helper.c b/xc/programs/Xserver/hw/xfree86/drivers/cyrix/cyrix_helper.c
index 42b41ede2..22c46a264 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/cyrix/cyrix_helper.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/cyrix/cyrix_helper.c
@@ -1,5 +1,6 @@
 /*
  * Copyright 2000 by Richard A. Hecker, California, United States
+ * Copyright 2002 by Red Hat Inc.
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
@@ -19,14 +20,26 @@
  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  * PERFORMANCE OF THIS SOFTWARE.
  *
+ * RED HAT DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+ * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+ * EVENT SHALL RICHARD HECKER BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+ * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
+ * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ *
  * Author:  Richard Hecker, hecker@cat.dfrc.nasa.gov
  *          Re-written for XFree86 v4.0
+ *
+ * Chunks re-written again for XFree86 v4.2
+ *	    Alan Cox <alan@redhat.com>
+ *
  * Previous driver (pre-XFree86 v4.0) by
  *          Annius V. Groenink (A.V.Groenink@zfc.nl, avg@cwi.nl),
  *          Dirk H. Hohndel (hohndel@suse.de),
  *          Portions: the GGI project & confidential CYRIX databooks.
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/cyrix/cyrix_helper.c,v 1.3 2000/07/26 01:52:19 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/cyrix/cyrix_helper.c,v 1.4 2002/11/06 11:38:59 alanh Exp $ */
 
 #include "cyrix.h"
 #include "vgaHW.h"
@@ -43,47 +56,43 @@
 
 static void CYRIXresetVGA(ScrnInfoPtr pScrn, unsigned long vgaIOBase);
 
-void 
-Cyrix1bppColorMap(ScrnInfoPtr pScrn)
+void  Cyrix1bppColorMap(ScrnInfoPtr pScrn)
 {	/* use dedicated color map routines on new chipsets in 8bpp */
-	ErrorF("%s: Cyrix 1BPP is only a stub for now.\n",X_PROBED);
-
+	ErrorF("%s: Cyrix 1BPP is only a stub for now.\n", X_PROBED);
 	return;
 }
 
 
-int
-CyrixHWCursor(ScreenPtr pScreen)
+int CyrixHWCursor(ScreenPtr pScreen)
 {
-	int pitch;
-
-	pitch=1024;
-
-
-	return pitch;
+	return 1024;
 }
 
-void
-CyrixRestore(ScrnInfoPtr pScrn, CYRIXRegPtr cyrixReg)
-{	unsigned char temp;
+void CyrixRestore(ScrnInfoPtr pScrn, CYRIXRegPtr cyrixReg)
+{
+	unsigned char temp;
 	CYRIXPrvPtr pCyrix;
+	vgaHWPtr hwp;
 	vgaRegPtr vgaReg;
 	unsigned long vgaIOBase;
 
 	vgaHWProtect(pScrn, TRUE);		/* Blank the screen */
 	pCyrix = CYRIXPTR(pScrn);
-	vgaReg = &VGAHWPTR(pScrn)->SavedReg;
-	vgaIOBase = VGAHWPTR(pScrn)->IOBase;
+/*	vgaReg = &VGAHWPTR(pScrn)->SavedReg; */
+	hwp = VGAHWPTR(pScrn);
+	vgaHWUnlock(hwp);
+	vgaReg = &hwp->ModeReg;
 
-	/* it would be ideal to be able to use the ModeSwitchControl
-	   register to protect SoftVGA from reading the configuration
-	   before all registers have been written.  But that bit must be
-	   set somewhere in the middle of vgaHWRestore (after restoring
-	   the font). Luckily things seem to work without it. */
+	vgaIOBase = VGAHWPTR(pScrn)->IOBase;
 
 	/* restore standard VGA portion */
+	outb(vgaIOBase + 4, CrtcModeSwitchControl);
+        outb(vgaIOBase + 5, 0x01);
 	CYRIXresetVGA(pScrn,vgaIOBase);
 	vgaHWRestore(pScrn, vgaReg, VGA_SR_ALL);
+
+	vgaHWProtect(pScrn, TRUE);		/* Blank the screen */
+
 	CYRIXmarkLinesDirty;
 
 	/* restore miscellaneous output registers */
@@ -105,9 +114,12 @@ CyrixRestore(ScrnInfoPtr pScrn, CYRIXRegPtr cyrixReg)
 	outb(vgaIOBase + 5, (pCyrix->PrevExt.ExtendedAddressControl & 0x07)
 	                  | (temp & 0xf8));
 
+	outb(vgaIOBase + 4, 19);
+	outb(vgaIOBase + 5, pCyrix->PrevExt.Offset);
+	
 	outb(vgaIOBase + 4, CrtcExtendedOffset);
 	temp = inb(vgaIOBase + 5);
-	outb(vgaIOBase + 5, (pCyrix->PrevExt.ExtendedOffset & 0x03)
+	outb(vgaIOBase + 5, ((pCyrix->PrevExt.ExtendedOffset) & 0x03)
 	                  | (temp & 0xfc));
 
 	outb(vgaIOBase + 4, CrtcExtendedColorControl);
@@ -125,6 +137,9 @@ CyrixRestore(ScrnInfoPtr pScrn, CYRIXRegPtr cyrixReg)
 	outb(vgaIOBase + 5, (pCyrix->PrevExt.DACControl & 0x0e)
 	                  | (temp & 0xf1));
 
+	outb(vgaIOBase + 4, CrtcModeSwitchControl);
+        outb(vgaIOBase + 5, 0x00);
+
 	/* let SoftVGA programming settle before we access DC registers,
 	   but don't wait too long */
 	usleep(1000);
@@ -132,7 +147,7 @@ CyrixRestore(ScrnInfoPtr pScrn, CYRIXRegPtr cyrixReg)
 
 	/* restore display controller hardware registers */
 #ifndef MONOVGA
-#define DCFG_MASK       (DC_GCFG_FDTY | DC_GCFG_DECE | DC_GCFG_CMPE)
+#define DCFG_MASK       (DC_GCFG_FDTY | DC_GCFG_DECE | DC_GCFG_CMPE | DC_GCFG_FBLC | DC_GCFG_CURE)
 #define GPBS_MASK       (BC_16BPP | BC_FB_WIDTH_2048)
 
 	GX_REG(DC_UNLOCK) = DC_UNLOCK_VALUE;
@@ -168,6 +183,12 @@ CyrixSave(ScrnInfoPtr pScrn, CYRIXRegPtr cyrixReg)
 	unsigned long	vgaIOBase;
 
 #ifndef MONOVGA
+	/* If we don't turn on the screen we end up restoring a 
+	   blanked display on some boxes whose APM is a bit too smart.
+	   Save the display turned -on- therefore */
+	   
+	vgaHWProtect(pScrn, FALSE);		/* Turn on screen */
+	
 	/* save graphics pipeline registers */
 	pCyrix = CYRIXPTR(pScrn);
 	vgaIOBase = VGAHWPTR(pScrn)->IOBase;
@@ -198,6 +219,9 @@ CyrixSave(ScrnInfoPtr pScrn, CYRIXRegPtr cyrixReg)
 	outb(vgaIOBase + 4, CrtcExtendedAddressControl);
 	pCyrix->PrevExt.ExtendedAddressControl = inb(vgaIOBase + 5);
 
+	outb(vgaIOBase + 4, 19);
+	pCyrix->PrevExt.Offset = inb(vgaIOBase + 5);
+	
 	outb(vgaIOBase + 4, CrtcExtendedOffset);
 	pCyrix->PrevExt.ExtendedOffset = inb(vgaIOBase + 5);
 
@@ -260,6 +284,7 @@ CyrixInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
 		                                       EAC_PACKED_CHAIN4;
 
 	pCyrix->PrevExt.ExtendedOffset = ((line_offset >> 8) & 0x03);
+	pCyrix->PrevExt.Offset = line_offset;
 
 	pCyrix->PrevExt.ExtendedColorControl = (pScrn->bitsPerPixel == 16)
                                            ? ECC_16BPP | ECC_565_FORMAT
@@ -299,13 +324,16 @@ CyrixInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
 	   screen.  If the line delta is not 1024 or 2048, entire frames
 	   will be flagged dirty as opposed to lines.  Problems with 16bpp
 	   and line-dirty flagging seem to have been solved now.  */
-	if (mode->CrtcVDisplay == pScrn->virtualY &&
-	    mode->CrtcHDisplay == pScrn->virtualX)
-	{	pCyrix->PrevExt.DcGeneralCfg = DC_GCFG_DECE
-		                           | DC_GCFG_CMPE;
-		if (/* pScrn->bitsPerPixel != 8 ||   -- this is OK now */
-		   (pScrn->displayWidth * (pScrn->bitsPerPixel / 8)) & 0x03FF)
-			pCyrix->PrevExt.DcGeneralCfg |= DC_GCFG_FDTY;
+	   
+	if (pCyrix->NoCompress == FALSE &&
+		mode->CrtcVDisplay == pScrn->virtualY &&
+		mode->CrtcHDisplay == pScrn->virtualX &&
+		0 == GX_REG(DC_FB_ST_OFFSET))
+	{
+			pCyrix->PrevExt.DcGeneralCfg = DC_GCFG_DECE | DC_GCFG_CMPE;
+			if (/* pScrn->bitsPerPixel != 8 ||   -- this is OK now */
+			   (pScrn->displayWidth * (pScrn->bitsPerPixel / 8)) & 0x03FF)
+				pCyrix->PrevExt.DcGeneralCfg |= DC_GCFG_FDTY;
 	}
 	else
 		pCyrix->PrevExt.DcGeneralCfg = 0;
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/cyrix/cyrix_shadow.c b/xc/programs/Xserver/hw/xfree86/drivers/cyrix/cyrix_shadow.c
new file mode 100644
index 000000000..479ad36dd
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/cyrix/cyrix_shadow.c
@@ -0,0 +1,155 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/cyrix/cyrix_shadow.c,v 1.1 2002/11/06 11:38:59 alanh Exp $ */
+
+/*
+   Copyright (c) 1999,  The XFree86 Project Inc. 
+   Written by Mark Vojkovich <markv@valinux.com>
+*/
+
+#include "xf86.h"
+#include "xf86_OSproc.h"
+#include "xf86Resources.h"
+#include "xf86_ansic.h"
+#include "xf86PciInfo.h"
+#include "xf86Pci.h"
+#include "cyrix.h"
+#include "shadowfb.h"
+#include "servermd.h"
+
+
+
+void
+CYRIXRefreshArea(ScrnInfoPtr pScrn, int num, BoxPtr pbox)
+{
+    CYRIXPrvPtr pCyrix = CYRIXPTR(pScrn);
+    int width, height, Bpp, FBPitch;
+    unsigned char *src, *dst;
+   
+    Bpp = pScrn->bitsPerPixel >> 3;
+    FBPitch = BitmapBytePad(pScrn->displayWidth * pScrn->bitsPerPixel);
+
+    while(num--) {
+	width = (pbox->x2 - pbox->x1) * Bpp;
+	height = pbox->y2 - pbox->y1;
+	src = pCyrix->ShadowPtr + (pbox->y1 * pCyrix->ShadowPitch) + 
+						(pbox->x1 * Bpp);
+	dst = pCyrix->FbBase + (pbox->y1 * FBPitch) + (pbox->x1 * Bpp);
+
+	while(height--) {
+	    memcpy(dst, src, width);
+	    dst += FBPitch;
+	    src += pCyrix->ShadowPitch;
+	}
+	
+	pbox++;
+    }
+} 
+
+void
+CYRIXPointerMoved(int index, int x, int y)
+{
+    ScrnInfoPtr pScrn = xf86Screens[index];
+    CYRIXPrvPtr pCyrix = CYRIXPTR(pScrn);
+    int newX, newY;
+
+    if(pCyrix->Rotate == 1) {
+	newX = pScrn->pScreen->height - y - 1;
+	newY = x;
+    } else {
+	newX = y;
+	newY = pScrn->pScreen->width - x - 1;
+    }
+
+    (*pCyrix->PointerMoved)(index, newX, newY);
+}
+
+void
+CYRIXRefreshArea8(ScrnInfoPtr pScrn, int num, BoxPtr pbox)
+{
+    CYRIXPrvPtr pCyrix = CYRIXPTR(pScrn);
+    int count, width, height, y1, y2, dstPitch, srcPitch;
+    CARD8 *dstPtr, *srcPtr, *src;
+    CARD32 *dst;
+
+    dstPitch = pScrn->displayWidth;
+    srcPitch = -pCyrix->Rotate * pCyrix->ShadowPitch;
+
+    while(num--) {
+	width = pbox->x2 - pbox->x1;
+	y1 = pbox->y1 & ~3;
+	y2 = (pbox->y2 + 3) & ~3;
+	height = (y2 - y1) >> 2;  /* in dwords */
+
+	if(pCyrix->Rotate == 1) {
+	    dstPtr = pCyrix->FbBase + 
+			(pbox->x1 * dstPitch) + pScrn->virtualX - y2;
+	    srcPtr = pCyrix->ShadowPtr + ((1 - y2) * srcPitch) + pbox->x1;
+	} else {
+	    dstPtr = pCyrix->FbBase + 
+			((pScrn->virtualY - pbox->x2) * dstPitch) + y1;
+	    srcPtr = pCyrix->ShadowPtr + (y1 * srcPitch) + pbox->x2 - 1;
+	}
+
+	while(width--) {
+	    src = srcPtr;
+	    dst = (CARD32*)dstPtr;
+	    count = height;
+	    while(count--) {
+		*(dst++) = src[0] | (src[srcPitch] << 8) | 
+					(src[srcPitch * 2] << 16) | 
+					(src[srcPitch * 3] << 24);
+		src += srcPitch * 4;
+	    }
+	    srcPtr += pCyrix->Rotate;
+	    dstPtr += dstPitch;
+	}
+
+	pbox++;
+    }
+} 
+
+
+void
+CYRIXRefreshArea16(ScrnInfoPtr pScrn, int num, BoxPtr pbox)
+{
+    CYRIXPrvPtr pCyrix = CYRIXPTR(pScrn);
+    int count, width, height, y1, y2, dstPitch, srcPitch;
+    CARD16 *dstPtr, *srcPtr, *src;
+    CARD32 *dst;
+
+    dstPitch = pScrn->displayWidth;
+    srcPitch = -pCyrix->Rotate * pCyrix->ShadowPitch >> 1;
+
+    while(num--) {
+	width = pbox->x2 - pbox->x1;
+	y1 = pbox->y1 & ~1;
+	y2 = (pbox->y2 + 1) & ~1;
+	height = (y2 - y1) >> 1;  /* in dwords */
+
+	if(pCyrix->Rotate == 1) {
+	    dstPtr = (CARD16*)pCyrix->FbBase + 
+			(pbox->x1 * dstPitch) + pScrn->virtualX - y2;
+	    srcPtr = (CARD16*)pCyrix->ShadowPtr + 
+			((1 - y2) * srcPitch) + pbox->x1;
+	} else {
+	    dstPtr = (CARD16*)pCyrix->FbBase + 
+			((pScrn->virtualY - pbox->x2) * dstPitch) + y1;
+	    srcPtr = (CARD16*)pCyrix->ShadowPtr + 
+			(y1 * srcPitch) + pbox->x2 - 1;
+	}
+
+	while(width--) {
+	    src = srcPtr;
+	    dst = (CARD32*)dstPtr;
+	    count = height;
+	    while(count--) {
+		*(dst++) = src[0] | (src[srcPitch] << 16);
+		src += srcPitch * 2;
+	    }
+	    srcPtr += pCyrix->Rotate;
+	    dstPtr += dstPitch;
+	}
+
+	pbox++;
+    }
+}
+
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/Imakefile b/xc/programs/Xserver/hw/xfree86/drivers/geode/Imakefile
deleted file mode 100644
index e424d7ed3..000000000
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/Imakefile
+++ /dev/null
@@ -1,85 +0,0 @@
-XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/Imakefile,v 1.2 2002/10/18 20:52:41 dawes Exp $
-XCOMM Imakefile for the National Semiconductor Geode driver
-XCOMM that is based on the durango code.
-XCOMM
-XCOMM (c) 2000 National Semiconductor corporation
-XCOMM (c) 2000 by Juergen Schneider, Infomatec IAS GmbH
-XCOMM
-#define IHaveModules
-#include <Server.tmpl>
-
-XCOMM Turn this off for the Set-Top-Box (STB) mode which uses 
-XCOMM the linux kernel driver interface.
-#if 1
-DURANGOSRCS = durango.c panel.c
-DURANGOOBJS = durango.o panel.o
-EXTINCLUDES = -I./gfx -I./panel
-#else
-DEFINES = -DSTB_X
-STBSRCS = galstub.c
-STBOBJS = galstub.o
-EXTINCLUDES = -I/usr/src/nsm -I/usr/src/linux/drivers/video/geode/gfx \
-              -I/usr/src/linux/drivers/video/geode/panel
-#endif
- 
- 
-
-SRCS = geode_driver.c \
-		geode_accel.c \
-		geode_cursor.c \
-		$(STBSRCS) \
-		geode_dga.c \
-		geode_video.c \
-		geode_shadow.c \
-		$(DURANGOSRCS)
-
-OBJS = geode_driver.o \
-		geode_accel.o \
-		geode_cursor.o \
-		$(STBOBJS) \
-		geode_dga.o \
-		geode_video.o \
-		geode_shadow.o \
-		$(DURANGOOBJS)
-
-#if defined(XF86DriverSDK)
-INCLUDES = -I. -I../../include
-#else
-INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86OSSRC) -I$(SERVERSRC)/Xext \
-		-I$(SERVERSRC)/mfb -I$(SERVERSRC)/mi \
-		-I$(SERVERSRC)/cfb -I$(SERVERSRC)/fb -I$(XF86SRC)/xaa \
-		-I$(XF86SRC)/vgahw -I$(XF86SRC)/ramdac \
-		-I$(XF86SRC)/ddc -I$(XF86SRC)/i2c \
-		-I$(XF86SRC)/rac -I$(XF86SRC)/int10 \
-		-I$(XF86SRC)/xf24_32bpp -I$(FONTINCSRC) \
-		-I$(XF86SRC)/xf8_32bpp -I$(XF86SRC)/xf1bpp \
-		-I$(XF86SRC)/xf4bpp -I$(SERVERSRC)/include -I$(XINCLUDESRC) \
-		-I$(XF86SRC)/ddc -I$(XF86SRC)/i2c -I$(EXTINCSRC) $(DRIINCLUDES) \
-		-I$(XF86SRC)/shadowfb -I$(XF86SRC)/fbdevhw \
-		-I$(XTOP)/include -I$(XF86OSSRC)/vbe -I$(SERVERSRC)/render \
-		$(EXTINCLUDES)
-#endif
-
-
-#if MakeHasPosixVariableSubstitutions
-SubdirLibraryRule($(OBJS))
-#endif
-
-ModuleObjectRule()
-
-ObjectModuleTarget(geode,$(OBJS))
-
-InstallObjectModule(geode,$(MODULEDIR),drivers)
-
-#if !defined(XF86DriverSDK)
-CppManTarget(geode,)
-InstallModuleManPage(geode)
-#endif 
-
-DependTarget()
-
-InstallDriverSDKNonExecFile(Imakefile,$(DRIVERSDKDIR)/drivers/geode)
-
-InstallDriverSDKNonExecFile(geode.c,$(DRIVERSDKDIR)/drivers/geode)
-
-InstallDriverSDKObjectModule(geode,$(DRIVERSDKMODULEDIR),drivers)
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/geode.man b/xc/programs/Xserver/hw/xfree86/drivers/geode/geode.man
deleted file mode 100644
index f9ee9190c..000000000
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/geode.man
+++ /dev/null
@@ -1,31 +0,0 @@
-.\" $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/geode.man,v 1.1 2002/10/11 14:32:58 alanh Exp $
-.\" shorthand for double quote that works everywhere.
-.ds q \N'34'
-.TH GEODE __drivermansuffix__ __vendorversion__
-.SH NAME
-geode \- Geode video driver
-.SH SYNOPSIS
-.nf
-.B "Section \*qDevice\*q"
-.BI "  Identifier \*q"  devname \*q
-.B  "  Driver \*qgeode\*q"
-\ \ ...
-.B EndSection
-.fi
-.SH DESCRIPTION
-.B geode 
-is an driver for National Semiconductors GEODE processor family.
-It uses the DURANGO kit provided by National Semiconductors.
-.SH SUPPORTED HARDWARE
-The
-.B geode
-driver supports GXLV (5530 companion chip), SC1200, SC1400
-.SH CONFIGURATION DETAILS
-Please refer to XF86Config(5x) for general configuration
-details.  This section only covers configuration details specific to this
-driver.
-.SH "SEE ALSO"
-XFree86(1), XF86Config(5x), xf86config(1), Xserver(1), X(1)
-.SH AUTHORS
-Juergen Schneider, Infomatec IAS GmbH
-Alan Hourihane <alanh@fairlite.demon.co.uk>
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/geode_accel.c b/xc/programs/Xserver/hw/xfree86/drivers/geode/geode_accel.c
deleted file mode 100644
index fd6cd5f26..000000000
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/geode_accel.c
+++ /dev/null
@@ -1,1076 +0,0 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/geode_accel.c,v 1.1 2002/10/11 14:32:58 alanh Exp $ */
-/*
- * $Workfile: geode_accel.c $
- * $Revision: 1.1.1.1 $
- *
- * File Contents: This file is consists of main Xfree
- *                acceleration supported routines like solid fill used
- *                here.
- * Project:       Geode Xfree Frame buffer device driver.
- *
- *     
- */
-
-/* 
- * NSC_LIC_ALTERNATIVE_PREAMBLE
- *
- * Revision 1.0
- *
- * National Semiconductor Alternative GPL-BSD License
- *
- * National Semiconductor Corporation licenses this software 
- * ("Software"):
- *
- * Geode Xfree frame buffer driver
- *
- * under one of the two following licenses, depending on how the 
- * Software is received by the Licensee.
- * 
- * If this Software is received as part of the Linux Framebuffer or
- * other GPL licensed software, then the GPL license designated 
- * NSC_LIC_GPL applies to this Software; in all other circumstances 
- * then the BSD-style license designated NSC_LIC_BSD shall apply.
- *
- * END_NSC_LIC_ALTERNATIVE_PREAMBLE */
-
-/* NSC_LIC_BSD
- *
- * National Semiconductor Corporation Open Source License for 
- *
- * Geode Xfree frame buffer driver
- *
- * (BSD License with Export Notice)
- *
- * Copyright (c) 1999-2001
- * National Semiconductor Corporation.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without 
- * modification, are permitted provided that the following conditions 
- * are met: 
- *
- *   * Redistributions of source code must retain the above copyright 
- *     notice, this list of conditions and the following disclaimer. 
- *
- *   * Redistributions in binary form must reproduce the above 
- *     copyright notice, this list of conditions and the following 
- *     disclaimer in the documentation and/or other materials provided 
- *     with the distribution. 
- *
- *   * Neither the name of the National Semiconductor Corporation nor 
- *     the names of its contributors may be used to endorse or promote 
- *     products derived from this software without specific prior 
- *     written permission. 
- * 
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
- * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
- * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE,
- * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
- * OF SUCH DAMAGE.
- *
- * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
- * YOUR JURISDICTION. It is licensee's responsibility to comply with 
- * any export regulations applicable in licensee's jurisdiction. Under 
- * CURRENT (2001) U.S. export regulations this software 
- * is eligible for export from the U.S. and can be downloaded by or 
- * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
- * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
- * Syria, Sudan, Afghanistan and any other country to which the U.S. 
- * has embargoed goods and services. 
- *
- * END_NSC_LIC_BSD */
-
-/* NSC_LIC_GPL
- *
- * National Semiconductor Corporation Gnu General Public License for 
- *
- * Geode Xfree frame buffer driver
- *
- * (GPL License with Export Notice)
- *
- * Copyright (c) 1999-2001
- * National Semiconductor Corporation.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without 
- * modification, are permitted under the terms of the GNU General 
- * Public License as published by the Free Software Foundation; either 
- * version 2 of the License, or (at your option) any later version  
- *
- * In addition to the terms of the GNU General Public License, neither 
- * the name of the National Semiconductor Corporation nor the names of 
- * its contributors may be used to endorse or promote products derived 
- * from this software without specific prior written permission. 
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
- * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
- * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, 
- * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
- * OF SUCH DAMAGE. See the GNU General Public License for more details. 
- *
- * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
- * YOUR JURISDICTION. It is licensee's responsibility to comply with 
- * any export regulations applicable in licensee's jurisdiction. Under 
- * CURRENT (2001) U.S. export regulations this software 
- * is eligible for export from the U.S. and can be downloaded by or 
- * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
- * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
- * Syria, Sudan, Afghanistan and any other country to which the U.S. 
- * has embargoed goods and services. 
- *
- * You should have received a copy of the GNU General Public License 
- * along with this file; if not, write to the Free Software Foundation, 
- * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 
- *
- * END_NSC_LIC_GPL */
-
-/*
- * Fixes by
- * Alan Hourihane <alanh@fairlite.demon.co.uk>
- */
-
-/* Xfree86 header files */
-#include "vgaHW.h"
-#include "xf86.h"
-#include "xf86_ansic.h"
-#include "xaalocal.h"
-#include "xf86fbman.h"
-#include "miline.h"
-#include "xf86_libc.h"
-#include "xaarop.h"
-#include "geode.h"
-
-/* The following ROPs only use pattern and destination data.
- * They are used when the planemask specifies all planes (no mask).
- */
-
-static const int windowsROPpat[16] = {
-   0x00, 0xA0, 0x50, 0xF0, 0x0A, 0xAA, 0x5A, 0xFA,
-   0x05, 0xA5, 0x55, 0xF5, 0x0F, 0xAF, 0x5F, 0xFF
-};
-
-/* The following ROPs use source data to specify a planemask.
- * If the planemask (src) is one, then the result is the appropriate
- * combination of pattern and destination data.  If the planemask (src)
- * is zero, then the result is always just destination data.
- */
-
-static const int windowsROPsrcMask[16] = {
-   0x22, 0xA2, 0x62, 0xE2, 0x2A, 0xAA, 0x6A, 0xEA,
-   0x26, 0xA6, 0x66, 0xE6, 0x2E, 0xAE, 0x6E, 0xEE
-};
-
-/* The following ROPs use pattern data to specify a planemask.
- * If the planemask (pat) is one, then the result is the appropriate
- * combination of source and destination data.  If the planemask (pat)
- * is zero, then the result is always just destination data.
- */
-
-static const int windowsROPpatMask[16] = {
-   0x0A, 0x8A, 0x4A, 0xCA, 0x2A, 0xAA, 0x6A, 0xEA,
-   0x1A, 0x9A, 0x5A, 0xDA, 0x3A, 0xBA, 0x7A, 0xFA
-};
-
-/* STATIC VARIABLES FOR THIS FILE
- * Used to maintain state between setup and rendering calls.
- */
-
-static int GeodeTransparent;
-static int GeodeTransColor;
-static int Geodedstx;
-static int Geodedsty;
-static int Geodesrcx;
-static int Geodesrcy;
-static int Geodewidth;
-static int Geodeheight;
-static int Geodebpp;
-static int GeodeCounter;
-
-/* DECLARATION OF ROUTINES THAT ARE HOOKED */
-
-Bool GeodeAccelInit(ScreenPtr pScreen);
-void GeodeAccelSync(ScrnInfoPtr pScreenInfo);
-void GeodeSetupForFillRectSolid(ScrnInfoPtr pScreenInfo, int color, int rop,
-				unsigned int planemask);
-void GeodeSubsequentFillRectSolid(ScrnInfoPtr pScreenInfo, int x, int y,
-				  int w, int h);
-void GeodeSetupFor8x8PatternMonoExpand(ScrnInfoPtr pScreenInfo,
-				       int patternx, int patterny, int fg,
-				       int bg, int rop,
-				       unsigned int planemask);
-void GeodeSubsequent8x8PatternMonoExpand(ScrnInfoPtr pScreenInfo,
-					 int patternx, int patterny, int x,
-					 int y, int w, int h);
-void GeodeSetupForScreenToScreenCopy(ScrnInfoPtr pScreenInfo, int xdir,
-				     int ydir, int rop,
-				     unsigned int planemask,
-				     int transparency_color);
-void GeodeSubsequentScreenToScreenCopy(ScrnInfoPtr pScreenInfo, int x1,
-				       int y1, int x2, int y2, int w, int h);
-void GeodeSetupForSolidLine(ScrnInfoPtr pScreenInfo, int color, int rop,
-			    unsigned int planemask);
-void GeodeSetupForDashedLine(ScrnInfoPtr pScrn, int fg, int bg, int rop,
-			     unsigned int planemask, int length,
-			     unsigned char *pattern);
-void GeodeSubsequentBresenhamLine(ScrnInfoPtr pScreenInfo, int x1, int y1,
-				  int absmaj, int absmin, int err, int len,
-				  int octant);
-void GeodeSubsequentHorVertLine(ScrnInfoPtr pScreenInfo, int x, int y,
-				int len, int dir);
-
-void GeodeSetupForScanlineImageWrite(ScrnInfoPtr pScreenInfo,
-				     int rop, unsigned int planemask,
-				     int transparency_color, int bpp,
-				     int depth);
-
-void GeodeSubsequentScanlineImageWriteRect(ScrnInfoPtr pScreenInfo,
-					   int x, int y, int w, int h,
-					   int skipleft);
-
-void GeodeSubsequentImageWriteScanline(ScrnInfoPtr pScreenInfo, int bufno);
-
-#if 0
-void GeodeFillCacheBltRects(ScrnInfoPtr pScrn,
-			    int rop, unsigned int planemask,
-			    int nBox, BoxPtr pBox, int xorg, int yorg,
-			    XAACacheInfoPtr pCache);
-#endif
-
-static XAAInfoRecPtr localRecPtr;
-
-/*----------------------------------------------------------------------------
- * GeodeAccelInit.
- *
- * Description	:This function sets up the supported acceleration routines and
- *                 appropriate flags.
- *
- * Parameters:
- *      pScreen	:Screeen pointer structure.
- *
- * Returns		:TRUE on success and FALSE on Failure
- *
- * Comments		:This function is called in GeodeScreenInit in
-                     geode_driver.c to set  * the acceleration.
-*----------------------------------------------------------------------------
-*/
-Bool
-GeodeAccelInit(ScreenPtr pScreen)
-{
-   GeodePtr pGeode;
-   ScrnInfoPtr pScreenInfo;
-   BoxRec AvailBox;
-   RegionRec OffscreenRegion;
-   unsigned long offset;
-
-   pScreenInfo = xf86Screens[pScreen->myNum];
-   pGeode = GEODEPTR(pScreenInfo);
-
-   /* Getting the pointer for acceleration Inforecord */
-   pGeode->AccelInfoRec = localRecPtr = XAACreateInfoRec();
-
-   /* SET ACCELERATION FLAGS */
-   localRecPtr->Flags = PIXMAP_CACHE | OFFSCREEN_PIXMAPS | LINEAR_FRAMEBUFFER;
-
-   /* HOOK SYNCRONIZATION ROUTINE */
-   localRecPtr->Sync = GeodeAccelSync;
-
-   /* HOOK FILLED RECTANGLES */
-   localRecPtr->SetupForSolidFill = GeodeSetupForFillRectSolid;
-   localRecPtr->SubsequentSolidFillRect = GeodeSubsequentFillRectSolid;
-   localRecPtr->SolidFillFlags = 0;
-
-   /* HOOK 8x8 COLOR EXPAND PATTERNS */
-   localRecPtr->SetupForMono8x8PatternFill =
-	 GeodeSetupFor8x8PatternMonoExpand;
-   localRecPtr->SubsequentMono8x8PatternFillRect =
-	 GeodeSubsequent8x8PatternMonoExpand;
-   localRecPtr->Mono8x8PatternFillFlags = BIT_ORDER_IN_BYTE_MSBFIRST |
-	 HARDWARE_PATTERN_PROGRAMMED_BITS | HARDWARE_PATTERN_SCREEN_ORIGIN;
-
-   /* HOOK SCREEN TO SCREEN COPIES
-    * * Set flag to only allow copy if transparency is enabled.
-    */
-   localRecPtr->SetupForScreenToScreenCopy = GeodeSetupForScreenToScreenCopy;
-   localRecPtr->SubsequentScreenToScreenCopy =
-	 GeodeSubsequentScreenToScreenCopy;
-
-   localRecPtr->ScreenToScreenCopyFlags = GXCOPY_ONLY | NO_TRANSPARENCY;
-
-   /* HOOK BRESENHAM SOLID LINES */
-   /* Do not hook unless flag can be set preventing use of planemask. */
-   localRecPtr->SolidLineFlags = NO_PLANEMASK;
-   localRecPtr->SetupForSolidLine = GeodeSetupForSolidLine;
-   localRecPtr->SubsequentSolidBresenhamLine = GeodeSubsequentBresenhamLine;
-   localRecPtr->SubsequentSolidHorVertLine = GeodeSubsequentHorVertLine;
-   localRecPtr->SolidBresenhamLineErrorTermBits = 15;
-
-#if 0
-   /* HOOK BRESENHAM DASHED LINES */
-   localRecPtr->DashedLineFlags = NO_PLANEMASK;
-   localRecPtr->DashPatternMaxLength = 64;
-   localRecPtr->SetupForDashedLine = GeodeSetupForDashedLine;
-   localRecPtr->SubsequentDashedBresenhamLine = GeodeSubsequentBresenhamLine;
-   localRecPtr->DashedBresenhamLineErrorTermBits = 15;
-#endif
-
-   /*
-    * ImageWrite.
-    *
-    * SInce this uses off-screen scanline buffers, it is only of use when
-    * complex ROPs are used. But since the current XAA pixmap cache code
-    * only works when an ImageWrite is provided, the NO_GXCOPY flag is
-    * temporarily disabled.
-    */
-   if (pGeode->AccelImageWriteBufferOffsets) {
-      localRecPtr->ScanlineImageWriteFlags = NO_GXCOPY | NO_TRANSPARENCY;
-      localRecPtr->NumScanlineImageWriteBuffers = pGeode->NoOfImgBuffers;
-      localRecPtr->SetupForScanlineImageWrite =
-	    GeodeSetupForScanlineImageWrite;
-      localRecPtr->SubsequentScanlineImageWriteRect =
-	    GeodeSubsequentScanlineImageWriteRect;
-      localRecPtr->SubsequentImageWriteScanline =
-	    GeodeSubsequentImageWriteScanline;
-
-      localRecPtr->ScanlineImageWriteBuffers =
-	    pGeode->AccelImageWriteBufferOffsets;
-
-      offset = (unsigned long)pGeode->AccelImageWriteBufferOffsets[0] -
-	    (unsigned long)pGeode->FBBase;
-      Geodesrcy = offset / pGeode->Pitch;
-
-      Geodesrcx = offset & (pGeode->Pitch - 1);
-      Geodesrcx >>= (Geodebpp >> 3) - 1;
-   }
-
-   /* CACHE COPY FUNCTION
-    * *
-    * *    localRecPtr->FillCacheBltRects = GeodeFillCacheBltRects;
-    * *    localRecPtr->FillCacheBltRectsFlags = NO_TRANSPARENCY;
-    */
-
-   /* SET UP GRAPHICS MEMORY AVAILABLE FOR PIXMAP CACHE */
-   AvailBox.x1 = 0;
-   AvailBox.x2 = pScreenInfo->displayWidth;
-   AvailBox.y1 = pGeode->OffscreenStartOffset / pGeode->Pitch;
-   AvailBox.y2 = AvailBox.y1 +
-	 ((pGeode->OffscreenSize / pGeode->Pitch /
-	   (pScreenInfo->bitsPerPixel >> 3)));
-
-   REGION_INIT(pScreen, &OffscreenRegion, &AvailBox, 2);
-   if (!xf86InitFBManagerRegion(pScreen, &OffscreenRegion)) {
-      xf86DrvMsg(pScreenInfo->scrnIndex, X_ERROR,
-		 "Region (%d,%d,%d,%d) at 0x%08lX not provided for pixmap caching.\n",
-		 OffscreenRegion.extents.x1,
-		 OffscreenRegion.extents.y1,
-		 OffscreenRegion.extents.x2,
-		 OffscreenRegion.extents.y2, OffscreenRegion.data);
-      xf86DrvMsg(pScreenInfo->scrnIndex, X_ERROR,
-		 "Couln't initialize the offscreen memory manager.\n");
-   } else {
-      xf86DrvMsg(pScreenInfo->scrnIndex, X_PROBED,
-		 "Region (%d,%d,%d,%d) at 0x%08lX provided for pixmap caching.\n",
-		 OffscreenRegion.extents.x1,
-		 OffscreenRegion.extents.y1,
-		 OffscreenRegion.extents.x2,
-		 OffscreenRegion.extents.y2, OffscreenRegion.data);
-   }
-   REGION_UNINIT(pScreen, &OffscreenRegion);
-
-   /* TEXT IS NOT HOOKED */
-   /* Actually faster to not accelerate it.  To accelerate, the data */
-   /* is copied from the font data to a buffer by the OS, then the */
-   /* driver copies it from the buffer to the BLT buffer, then the */
-   /* rendering engine reads it from the BLT buffer.  May be worthwhile */
-   /* to hook text later with the second generation graphics unit that */
-   /* can take the data directly. */
-
-   return (XAAInit(pScreen, localRecPtr));
-}
-
-/*----------------------------------------------------------------------------
- * GeodeAccelSync.
- *
- * Description	:This function is called to syncronize with the graphics
- *               engine and it waits the graphic engine is idle.This is
- *               required before allowing   direct access to the
- *               framebuffer.
- * Parameters.
- *   pScreenInfo:Screeen info pointer structure.
- *
- * Returns		:none
- *
- * Comments		:This function is called on geode_video routines.
-*----------------------------------------------------------------------------
-*/
-void
-GeodeAccelSync(ScrnInfoPtr pScreenInfo)
-{
-   GFX(wait_until_idle());
-}
-
-/*----------------------------------------------------------------------------
- * GeodeSetupForFillRectSolid.
- *
- * Description	:This routine is called to setup the solid pattern
- *               color for   future  rectangular fills or vectors.
- *
- * Parameters.
- * pScreenInfo
- *		Ptr		:Screen handler pointer having screen information.
- *    color     :Specifies the color to be filled up in defined area.
- *    rop       :Specifies the raster operation value.
- *   planemask	:Specifies the masking value based rop srcdata.
- *
- * Returns		:none
- *
- * Comments		:none
- *
-*----------------------------------------------------------------------------
-*/
-void
-GeodeSetupForFillRectSolid(ScrnInfoPtr pScreenInfo,
-			   int color, int rop, unsigned int planemask)
-{
-   GFX(set_solid_pattern((unsigned long)color));
-
-   /* CHECK IF PLANEMASK IS NOT USED (ALL PLANES ENABLED) */
-   if (planemask == (unsigned int)-1) {
-      /* USE NORMAL PATTERN ROPs IF ALL PLANES ARE ENABLED */
-      GFX(set_raster_operation(windowsROPpat[rop & 0x0F]));
-   } else {
-      /* SELECT ROP THAT USES SOURCE DATA FOR PLANEMASK */
-      GFX(set_solid_source((unsigned long)planemask));
-      GFX(set_raster_operation(windowsROPsrcMask[rop & 0x0F]));
-   }
-}
-
- /*----------------------------------------------------------------------------
- * GeodeSubsequentFillRectSolid.
- *
- * Description	:This routine is used to fill the rectangle of previously
- *               specified  solid pattern.
- *
- * Parameters.
- *  pScreenInfo :Screen handler pointer having screen information.
- *     x and y	:Specifies the x and y co-ordinatesarea.
- *      w and h	:Specifies width and height respectively.
- *
- * Returns		:none
- *
- * Comments		:desired pattern can be set before this function by
- *               gfx_set_solid_pattern.
- * Sample application uses:
- *   - Window backgrounds. 
- *   - x11perf: rectangle tests (-rect500).
- *   - x11perf: fill trapezoid tests (-trap100).
- *   - x11perf: horizontal line segments (-hseg500).
- *----------------------------------------------------------------------------
-*/
-void
-GeodeSubsequentFillRectSolid(ScrnInfoPtr pScreenInfo, int x, int y, int w,
-			     int h)
-{
-   /* SIMPLY PASS THE PARAMETERS TO THE DURANGO ROUTINE */
-   GeodePtr pGeode;
-
-   pGeode = GEODEPTR(pScreenInfo);
-
-   if (pGeode->TV_Overscan_On) {
-      x += pGeode->TVOx;
-      y += pGeode->TVOy;
-   }
-
-   GFX(pattern_fill((unsigned short)x, (unsigned short)y,
-		    (unsigned short)w, (unsigned short)h));
-}
-
-/*----------------------------------------------------------------------------
- * GeodeSetupFor8x8PatternMonoExpand
- *
- * Description	:This routine is called to fill the monochrome pattern of
- *                 8x8.
- * Parameters.
- * 	pScreenInfo :Screen handler pointer having screen information.
- *      patternx:This is set from on rop data.
- *      patterny:This is set based on rop data.
- *       fg		:Specifies the foreground color
- *       bg     :Specifies the background color
- *	planemask	:Specifies the value of masking from rop data
-
- * Returns		:none.
- *
- * Comments     :none.
- *
-*----------------------------------------------------------------------------
-*/
-void
-GeodeSetupFor8x8PatternMonoExpand(ScrnInfoPtr pScreenInfo,
-				  int patternx, int patterny, int fg,
-				  int bg, int rop, unsigned int planemask)
-{
-   int trans = (bg == -1);
-
-   /* LOAD PATTERN COLORS AND DATA */
-   GFX(set_mono_pattern((unsigned long)bg, (unsigned long)fg,
-			(unsigned long)patternx, (unsigned long)patterny,
-			(unsigned char)trans));
-
-   /* CHECK IF PLANEMASK IS NOT USED (ALL PLANES ENABLED) */
-   if (planemask == (unsigned int)-1) {
-      /* USE NORMAL PATTERN ROPs IF ALL PLANES ARE ENABLED */
-      GFX(set_raster_operation(windowsROPpat[rop & 0x0F]));
-   } else {
-      /* SELECT ROP THAT USES SOURCE DATA FOR PLANEMASK */
-      GFX(set_solid_source((unsigned long)planemask));
-      GFX(set_raster_operation(windowsROPsrcMask[rop & 0x0F]));
-   }
-}
-
-/*----------------------------------------------------------------------------
- * GeodeSubsequent8x8PatternMonoExpand
- *
- * Description	:This routine is called to fill  a ractanglethe
- *                 monochrome pattern of previusly loaded pattern.
- *
- * Parameters.
- *	pScreenInfo	:Screen handler pointer having screen information.
- *  patternx	:This is set from on rop data.
- *  patterny	:This is set based on rop data.
- *       fg		:Specifies the foreground color
- *       bg		:Specifies the background color
- *  planemask	:Specifies the value of masking from rop data
-
- * Returns		:none
- *
- * Comments		:The patterns specified is ignored inside the function
- * Sample application uses:
- *   - Patterned desktops
- *   - x11perf: stippled rectangle tests (-srect500).
- *   - x11perf: opaque stippled rectangle tests (-osrect500).
-*----------------------------------------------------------------------------
-*/
-void
-GeodeSubsequent8x8PatternMonoExpand(ScrnInfoPtr pScreenInfo,
-				    int patternx, int patterny, int x, int y,
-				    int w, int h)
-{
-   GeodePtr pGeode;
-
-   pGeode = GEODEPTR(pScreenInfo);
-
-   if (pGeode->TV_Overscan_On) {
-      x += pGeode->TVOx;
-      y += pGeode->TVOy;
-   }
-
-   /* SIMPLY PASS THE PARAMETERS TO THE DURANGO ROUTINE */
-   /* Ignores specified pattern. */
-   GFX(pattern_fill((unsigned short)x, (unsigned short)y,
-		    (unsigned short)w, (unsigned short)h));
-}
-
-/*----------------------------------------------------------------------------
- * GeodeSetupForScreenToScreenCopy
- *
- * Description	:This function is used to set up the planemask and raster
- *                 for future Bliting functionality.
- *
- * Parameters:
- *	pScreenInfo :Screen handler pointer having screen information.
- *      xdir	:This is set based on rop data.
- *      ydir    :This is set based on rop data.
- *      rop		:sets the raster operation
- *	transparency:tobeadded
- *  planemask	:Specifies the value of masking from rop data
-
- * Returns		:none
- *
- * Comments		:The patterns specified is ignored inside the function
-*----------------------------------------------------------------------------
-*/
-void
-GeodeSetupForScreenToScreenCopy(ScrnInfoPtr pScreenInfo,
-				int xdir, int ydir, int rop,
-				unsigned int planemask,
-				int transparency_color)
-{
-   GFX(set_solid_pattern((unsigned long)planemask));
-   /* SET RASTER OPERATION FOR USING PATTERN AS PLANE MASK */
-   GFX(set_raster_operation(windowsROPpatMask[rop & 0x0F]));
-
-   /* SAVE TRANSPARENCY FLAG */
-   GeodeTransparent = (transparency_color == -1) ? 0 : 1;
-   GeodeTransColor = transparency_color;
-}
-
-/*----------------------------------------------------------------------------
- * GeodeSubsquentScreenToScreenCopy
- *
- * Description	:This function is called to perform a screen to screen
- *                 BLT  using the previously  specified planemask,raster
- *                 operation and  * transparency flag
- *
- * Parameters.
- * 	pScreenInfo :Screen handler pointer having screen information.
- *  	x1	 	:x -coordinates of the source window
- *      y1      :y-co-ordinates of the source window
- *      x2		:x -coordinates of the destination window
- *      y2      :y-co-ordinates of the destination window
- *      w	    :Specifies width of the window to be copied
- *      h       :Height of the window to be copied.
- * Returns		:none
- *
- * Comments		:The patterns specified is ignored inside the function
- * Sample application uses (non-transparent):
- *   - Moving windows.
- *   - x11perf: scroll tests (-scroll500).
- *   - x11perf: copy from window to window (-copywinwin500).
- *
- * No application found using transparency.
-*----------------------------------------------------------------------------
-*/
-void
-GeodeSubsequentScreenToScreenCopy(ScrnInfoPtr pScreenInfo,
-				  int x1, int y1, int x2, int y2, int w,
-				  int h)
-{
-   GeodePtr pGeode;
-
-   pGeode = GEODEPTR(pScreenInfo);
-
-   if (pGeode->TV_Overscan_On) {
-      x1 += pGeode->TVOx;
-      y1 += pGeode->TVOy;
-      x2 += pGeode->TVOx;
-      y2 += pGeode->TVOy;
-   }
-
-   if (GeodeTransparent) {
-      /* CALL ROUTINE FOR TRANSPARENT SCREEN TO SCREEN BLT
-       * * Should only be called for the "copy" raster operation.
-       */
-      GFX(screen_to_screen_xblt((unsigned short)x1, (unsigned short)y1,
-				(unsigned short)x2, (unsigned short)y2,
-				(unsigned short)w, (unsigned short)h,
-				(unsigned short)GeodeTransColor));
-   } else {
-      /* CALL ROUTINE FOR NORMAL SCREEN TO SCREEN BLT */
-      GFX(screen_to_screen_blt((unsigned short)x1, (unsigned short)y1,
-			       (unsigned short)x2, (unsigned short)y2,
-			       (unsigned short)w, (unsigned short)h));
-   }
-}
-
-void
-GeodeSetupForScanlineImageWrite(ScrnInfoPtr pScreenInfo,
-				int rop, unsigned int planemask,
-				int transparency_color, int bpp, int depth)
-{
-   GFX(set_solid_pattern((unsigned long)planemask));
-   /* SET RASTER OPERATION FOR USING PATTERN AS PLANE MASK */
-   GFX(set_raster_operation(windowsROPpatMask[rop & 0x0F]));
-
-   /* SAVE TRANSPARENCY FLAG */
-   GeodeTransparent = (transparency_color == -1) ? 0 : 1;
-   GeodeTransColor = transparency_color;
-   Geodebpp = bpp;
-}
-
-void
-GeodeSubsequentScanlineImageWriteRect(ScrnInfoPtr pScreenInfo,
-				      int x, int y, int w, int h,
-				      int skipleft)
-{
-   GeodePtr pGeode;
-
-   pGeode = GEODEPTR(pScreenInfo);
-
-   Geodedstx = x;
-   Geodedsty = y;
-
-   if (pGeode->TV_Overscan_On) {
-      Geodedstx += pGeode->TVOx;
-      Geodedsty += pGeode->TVOy;
-   }
-
-   Geodewidth = w;
-   Geodeheight = h;
-
-   GeodeCounter = 0;
-}
-
-void
-GeodeSubsequentImageWriteScanline(ScrnInfoPtr pScreenInfo, int bufno)
-{
-
-   GeodePtr pGeode;
-   int blt_height = 0;
-   char blit = FALSE;
-
-   pGeode = GEODEPTR(pScreenInfo);
-
-   GeodeCounter++;
-
-   if ((Geodeheight <= pGeode->NoOfImgBuffers) &&
-       (GeodeCounter == Geodeheight)) {
-      blit = TRUE;
-      blt_height = Geodeheight;
-   } else if ((Geodeheight > pGeode->NoOfImgBuffers)
-	      && (GeodeCounter == pGeode->NoOfImgBuffers)) {
-      blit = TRUE;
-      Geodeheight -= pGeode->NoOfImgBuffers;
-      blt_height = pGeode->NoOfImgBuffers;
-   } else
-      return;
-
-   if (blit) {
-
-      blit = FALSE;
-
-      GeodeCounter = 0;
-
-      if (GeodeTransparent) {
-	 /* CALL ROUTINE FOR TRANSPARENT SCREEN TO SCREEN BLT
-	  * * Should only be called for the "copy" raster operation.
-	  */
-	 GFX(screen_to_screen_xblt((unsigned short)Geodesrcx,
-				   (unsigned short)Geodesrcy,
-				   (unsigned short)Geodedstx,
-				   (unsigned short)Geodedsty,
-				   (unsigned short)Geodewidth,
-				   (unsigned short)blt_height,
-				   (unsigned short)GeodeTransColor));
-      } else {
-	 /* CALL ROUTINE FOR NORMAL SCREEN TO SCREEN BLT */
-	 GFX(screen_to_screen_blt((unsigned short)Geodesrcx,
-				  (unsigned short)Geodesrcy,
-				  (unsigned short)Geodedstx,
-				  (unsigned short)Geodedsty,
-				  (unsigned short)Geodewidth,
-				  (unsigned short)blt_height));
-      }
-      Geodedsty += blt_height;
-      GeodeAccelSync(pScreenInfo);
-   }
-
-}
-
-/*----------------------------------------------------------------------------
- * GeodeSetupForSolidLine
- *
- * Description	:This function is used setup the solid line color for
- *               future line draws.
- *
- *
- * Parameters.
- * 	pScreenInfo :Screen handler pointer having screen information.
- *      color	:Specifies the color value od line
- *      rop     :Specifies rop values.
- *  Planemask	:Specifies planemask value.
- * Returns		:none
- *
- * Comments		:none
-*----------------------------------------------------------------------------
-*/
-void
-GeodeSetupForSolidLine(ScrnInfoPtr pScreenInfo,
-		       int color, int rop, unsigned int planemask)
-{
-   /* LOAD THE SOLID PATTERN COLOR */
-   GFX(set_solid_pattern((unsigned long)color));
-
-   /* USE NORMAL PATTERN ROPs IF ALL PLANES ARE ENABLED */
-   GFX(set_raster_operation(windowsROPpat[rop & 0x0F]));
-}
-
-unsigned short vector_mode_table[] = {
-   VM_MAJOR_INC | VM_MINOR_INC | VM_X_MAJOR,
-   VM_MAJOR_INC | VM_MINOR_INC | VM_Y_MAJOR,
-   VM_MAJOR_INC | VM_Y_MAJOR,
-   VM_MINOR_INC | VM_X_MAJOR,
-   VM_X_MAJOR,
-   VM_Y_MAJOR,
-   VM_MINOR_INC | VM_Y_MAJOR,
-   VM_MAJOR_INC | VM_X_MAJOR,
-};
-
-/*---------------------------------------------------------------------------
- * GeodeSubsequentBresenhamLine
- *
- * Description	:This function is used to render a vector using the
- *                 specified bresenham parameters.
- *
- * Parameters:
- * pScreenInfo 	:Screen handler pointer having screen information.
- *      x1  	:Specifies the starting x position
- *      y1      :Specifies starting y possition
- *      absmaj	:Specfies the Bresenman absolute major.
- *	  absmin	:Specfies the Bresenman absolute minor.
- *	  err       :Specifies the bresenham err term.
- *	  len       :Specifies the length of the vector interms of pixels.
- *	  octant    :not used in this function,may be added for standard
- *                    interface.
- * Returns		:none
- *
- * Comments     :none
- * Sample application uses:
- *   - Window outlines on window move.
- *   - x11perf: line segments (-seg500).
-*----------------------------------------------------------------------------
-*/
-void
-GeodeSubsequentBresenhamLine(ScrnInfoPtr pScreenInfo,
-			     int x1, int y1, int absmaj, int absmin, int err,
-			     int len, int octant)
-{
-   unsigned short flags;
-   int octant_reg;
-   int axial, init, diag;
-   GeodePtr pGeode;
-
-   pGeode = GEODEPTR(pScreenInfo);
-
-   if (pGeode->TV_Overscan_On) {
-      x1 += pGeode->TVOx;
-      y1 += pGeode->TVOy;
-   }
-
-   /*ErrorF("BresenhamLine(%d, %d, %d, %d, %d, %d, %d)\n",
-    * x1, y1, absmaj, absmin, err, len, octant);
-    */
-
-   /* DETERMINE YMAJOR AND DIRECTION FLAGS */
-   if (octant & YMAJOR) {
-      if (!(octant & YDECREASING)) {
-	 if (!(octant & XDECREASING))
-	    octant_reg = 1;
-	 else
-	    octant_reg = 2;
-      } else {
-	 if (!(octant & XDECREASING))
-	    octant_reg = 6;
-	 else
-	    octant_reg = 5;
-      }
-   } else {
-      if (!(octant & YDECREASING)) {
-	 if (!(octant & XDECREASING))
-	    octant_reg = 0;
-	 else
-	    octant_reg = 3;
-      } else {
-	 if (!(octant & XDECREASING))
-	    octant_reg = 7;
-	 else
-	    octant_reg = 4;
-      }
-   }
-
-   flags = vector_mode_table[octant_reg & 7];
-
-   /* DETERMINE BRESENHAM PARAMETERS */
-
-   axial = ((int)absmin << 1);
-   init = axial - (int)absmaj;
-   diag = init - (int)absmaj;
-
-   /* ADJUST INITIAL ERROR
-    * * Adjust by -1 for certain directions so that the vector 
-    * * hits the same pixels when drawn in either direction.
-    * * The Gamma value is assumed to account for the initial 
-    * * error adjustment for clipped lines.
-    */
-
-   init += err;
-
-   /* CALL ROUTINE TO DRAW VECTOR */
-
-   GFX(bresenham_line((unsigned short)x1, (unsigned short)y1,
-		      (unsigned short)len, (unsigned short)init,
-		      (unsigned short)axial, (unsigned short)diag,
-		      (unsigned short)flags);
-	 )
-}
-
-/*---------------------------------------------------------------------------
- * GeodeSubsequentHorVertLine
- *
- * This routine is called to render a vector using the specified Bresenham
- * parameters.  
- *
- * Sample application uses:
- *   - Window outlines on window move.
- *   - x11perf: line segments (-hseg500).
- *   - x11perf: line segments (-vseg500).
- *---------------------------------------------------------------------------
- */
-void
-GeodeSubsequentHorVertLine(ScrnInfoPtr pScreenInfo,
-			   int x, int y, int len, int dir)
-{
-   GeodePtr pGeode;
-
-   pGeode = GEODEPTR(pScreenInfo);
-
-   if (pGeode->TV_Overscan_On) {
-      x += pGeode->TVOx;
-      y += pGeode->TVOy;
-   }
-   GFX(pattern_fill((unsigned short)x, (unsigned short)y,
-		    (unsigned short)((dir == DEGREES_0) ? len : 1),
-		    (unsigned short)((dir == DEGREES_0) ? 1 : len)));
-}
-
-void
-GeodeSetupForDashedLine(ScrnInfoPtr pScrn, int fg, int bg, int rop,
-			unsigned int planemask, int length,
-			unsigned char *pattern)
-{
-   int trans = (bg == -1);
-   unsigned long *pat = (unsigned long *)pattern;
-
-   /* LOAD PATTERN COLORS AND DATA */
-
-   GFX(set_mono_pattern((unsigned long)bg, (unsigned long)fg,
-			(unsigned long)pat, (unsigned long)pat,
-			(unsigned char)trans));
-
-   /* CHECK IF PLANEMASK IS NOT USED (ALL PLANES ENABLED) */
-
-   if (planemask == (unsigned int)-1) {
-      /* USE NORMAL PATTERN ROPs IF ALL PLANES ARE ENABLED */
-
-      GFX(set_raster_operation(windowsROPpat[rop & 0x0F]));
-   } else {
-      /* SELECT ROP THAT USES SOURCE DATA FOR PLANEMASK */
-
-      GFX(set_solid_source((unsigned long)planemask));
-      GFX(set_raster_operation(windowsROPsrcMask[rop & 0x0F]));
-   }
-}
-
-#if 0
-void
-GeodeFillCacheBltRects(ScrnInfoPtr pScrn, int rop, unsigned int planemask,
-		       int nBox, BoxPtr pBox, int xorg, int yorg,
-		       XAACacheInfoPtr pCache)
-{
-   XAAInfoRecPtr infoRec = GET_XAAINFORECPTR_FROM_SCRNINFOPTR(pScrn);
-   int x, y;
-   int phaseY, phaseX, skipleft, height, width, w, blit_w, blit_h, start;
-
-   ErrorF("FillCacheBltRects\n");
-
-   (*infoRec->SetupForScreenToScreenCopy) (pScrn, 1, 1, rop, planemask,
-					   pCache->trans_color);
-
-   while (nBox--) {
-      y = pBox->y1;
-      phaseY = (y - yorg) % pCache->orig_h;
-      if (phaseY < 0)
-	 phaseY += pCache->orig_h;
-      phaseX = (pBox->x1 - xorg) % pCache->orig_w;
-      if (phaseX < 0)
-	 phaseX += pCache->orig_w;
-      height = pBox->y2 - y;
-      width = pBox->x2 - pBox->x1;
-      start = phaseY ? (pCache->orig_h - phaseY) : 0;
-
-      /* This is optimized for WRAM */
-
-      if ((rop == GXcopy) && (height >= (pCache->orig_h + start))) {
-	 w = width;
-	 skipleft = phaseX;
-	 x = pBox->x1;
-	 blit_h = pCache->orig_h;
-
-	 while (1) {
-	    blit_w = pCache->w - skipleft;
-	    if (blit_w > w)
-	       blit_w = w;
-	    (*infoRec->SubsequentScreenToScreenCopy) (pScrn,
-						      pCache->x + skipleft,
-						      pCache->y, x, y + start,
-						      blit_w, blit_h);
-	    w -= blit_w;
-	    if (!w)
-	       break;
-	    x += blit_w;
-	    skipleft = (skipleft + blit_w) % pCache->orig_w;
-	 }
-	 height -= blit_h;
-	 if (start) {
-	    (*infoRec->SubsequentScreenToScreenCopy) (pScrn,
-						      pBox->x1, y + blit_h,
-						      pBox->x1, y, width,
-						      start);
-	    height -= start;
-	    y += start;
-	 }
-	 start = blit_h;
-
-	 while (height) {
-	    if (blit_h > height)
-	       blit_h = height;
-	    (*infoRec->SubsequentScreenToScreenCopy) (pScrn,
-						      pBox->x1, y,
-						      pBox->x1, y + start,
-						      width, blit_h);
-	    height -= blit_h;
-	    start += blit_h;
-	    blit_h <<= 1;
-	 }
-      } else {
-	 while (1) {
-	    w = width;
-	    skipleft = phaseX;
-	    x = pBox->x1;
-	    blit_h = pCache->h - phaseY;
-	    if (blit_h > height)
-	       blit_h = height;
-
-	    while (1) {
-	       blit_w = pCache->w - skipleft;
-	       if (blit_w > w)
-		  blit_w = w;
-	       (*infoRec->SubsequentScreenToScreenCopy) (pScrn,
-							 pCache->x + skipleft,
-							 pCache->y + phaseY,
-							 x, y, blit_w,
-							 blit_h);
-	       w -= blit_w;
-	       if (!w)
-		  break;
-	       x += blit_w;
-	       skipleft = (skipleft + blit_w) % pCache->orig_w;
-	    }
-	    height -= blit_h;
-	    if (!height)
-	       break;
-	    y += blit_h;
-	    phaseY = (phaseY + blit_h) % pCache->orig_h;
-	 }
-      }
-      pBox++;
-   }
-
-   SET_SYNC_FLAG(infoRec);
-}
-#endif
-/* END OF FILE */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/geode_video.c b/xc/programs/Xserver/hw/xfree86/drivers/geode/geode_video.c
deleted file mode 100644
index 126b25561..000000000
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/geode_video.c
+++ /dev/null
@@ -1,1220 +0,0 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/geode_video.c,v 1.1 2002/10/11 14:32:59 alanh Exp $ */
-/*
- * $Workfile: geode_video.c $
- * $Revision: 1.1.1.1 $
- *
- * File Contents: This file consists of main Xfree video supported routines.
- *
- * Project:       Geode Xfree Frame buffer device driver.
- *
- */
-
-/* 
- * NSC_LIC_ALTERNATIVE_PREAMBLE
- *
- * Revision 1.0
- *
- * National Semiconductor Alternative GPL-BSD License
- *
- * National Semiconductor Corporation licenses this software 
- * ("Software"):
- *
- * Geode Xfree frame buffer driver
- *
- * under one of the two following licenses, depending on how the 
- * Software is received by the Licensee.
- * 
- * If this Software is received as part of the Linux Framebuffer or
- * other GPL licensed software, then the GPL license designated 
- * NSC_LIC_GPL applies to this Software; in all other circumstances 
- * then the BSD-style license designated NSC_LIC_BSD shall apply.
- *
- * END_NSC_LIC_ALTERNATIVE_PREAMBLE */
-
-/* NSC_LIC_BSD
- *
- * National Semiconductor Corporation Open Source License for 
- *
- * Geode Xfree frame buffer driver
- *
- * (BSD License with Export Notice)
- *
- * Copyright (c) 1999-2001
- * National Semiconductor Corporation.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without 
- * modification, are permitted provided that the following conditions 
- * are met: 
- *
- *   * Redistributions of source code must retain the above copyright 
- *     notice, this list of conditions and the following disclaimer. 
- *
- *   * Redistributions in binary form must reproduce the above 
- *     copyright notice, this list of conditions and the following 
- *     disclaimer in the documentation and/or other materials provided 
- *     with the distribution. 
- *
- *   * Neither the name of the National Semiconductor Corporation nor 
- *     the names of its contributors may be used to endorse or promote 
- *     products derived from this software without specific prior 
- *     written permission. 
- * 
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
- * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
- * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE,
- * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
- * OF SUCH DAMAGE.
- *
- * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
- * YOUR JURISDICTION. It is licensee's responsibility to comply with 
- * any export regulations applicable in licensee's jurisdiction. Under 
- * CURRENT (2001) U.S. export regulations this software 
- * is eligible for export from the U.S. and can be downloaded by or 
- * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
- * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
- * Syria, Sudan, Afghanistan and any other country to which the U.S. 
- * has embargoed goods and services. 
- *
- * END_NSC_LIC_BSD */
-
-/* NSC_LIC_GPL
- *
- * National Semiconductor Corporation Gnu General Public License for 
- *
- * Geode Xfree frame buffer driver
- *
- * (GPL License with Export Notice)
- *
- * Copyright (c) 1999-2001
- * National Semiconductor Corporation.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without 
- * modification, are permitted under the terms of the GNU General 
- * Public License as published by the Free Software Foundation; either 
- * version 2 of the License, or (at your option) any later version  
- *
- * In addition to the terms of the GNU General Public License, neither 
- * the name of the National Semiconductor Corporation nor the names of 
- * its contributors may be used to endorse or promote products derived 
- * from this software without specific prior written permission. 
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
- * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
- * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, 
- * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
- * OF SUCH DAMAGE. See the GNU General Public License for more details. 
- *
- * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
- * YOUR JURISDICTION. It is licensee's responsibility to comply with 
- * any export regulations applicable in licensee's jurisdiction. Under 
- * CURRENT (2001) U.S. export regulations this software 
- * is eligible for export from the U.S. and can be downloaded by or 
- * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
- * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
- * Syria, Sudan, Afghanistan and any other country to which the U.S. 
- * has embargoed goods and services. 
- *
- * You should have received a copy of the GNU General Public License 
- * along with this file; if not, write to the Free Software Foundation, 
- * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 
- *
- * END_NSC_LIC_GPL */
-
-/* 
- * Fixes & Extensions to support Y800 greyscale modes 
- * Alan Hourihane <alanh@fairlite.demon.co.uk>
- */
-
-#include "xf86.h"
-#include "xf86_OSproc.h"
-#include "xf86Resources.h"
-#include "xf86_ansic.h"
-#include "compiler.h"
-#include "xf86PciInfo.h"
-#include "xf86Pci.h"
-#include "xf86fbman.h"
-#include "regionstr.h"
-
-#include "geode.h"
-#include "Xv.h"
-#include "xaa.h"
-#include "xaalocal.h"
-#include "dixstruct.h"
-#include "fourcc.h"
-#include "geode_fourcc.h"
-
-#define OFF_DELAY 	200		/* milliseconds */
-#define FREE_DELAY 	60000
-
-#define OFF_TIMER 	0x01
-#define FREE_TIMER	0x02
-#define CLIENT_VIDEO_ON	0x04
-
-#define TIMER_MASK      (OFF_TIMER | FREE_TIMER)
-
-#ifndef XvExtension
-void
-GeodeInitVideo(ScreenPtr pScreen)
-{
-}
-
-void
-GeodeResetVideo(ScrnInfoPtr pScrn)
-{
-}
-#else
-
-void GeodeInitVideo(ScreenPtr pScreen);
-void GeodeResetVideo(ScrnInfoPtr pScrn);
-static XF86VideoAdaptorPtr GeodeSetupImageVideo(ScreenPtr);
-static void GeodeInitOffscreenImages(ScreenPtr);
-static void GeodeStopVideo(ScrnInfoPtr, pointer, Bool);
-static int GeodeSetPortAttribute(ScrnInfoPtr, Atom, INT32, pointer);
-static int GeodeGetPortAttribute(ScrnInfoPtr, Atom, INT32 *, pointer);
-static void GeodeQueryBestSize(ScrnInfoPtr, Bool,
-			       short, short, short, short, unsigned int *,
-			       unsigned int *, pointer);
-static int GeodePutImage(ScrnInfoPtr, short, short, short, short, short,
-			 short, short, short, int, unsigned char *, short,
-			 short, Bool, RegionPtr, pointer);
-static int GeodeQueryImageAttributes(ScrnInfoPtr, int, unsigned short *,
-				     unsigned short *, int *, int *);
-
-static void GeodeBlockHandler(int, pointer, pointer, pointer);
-
-extern void GeodeAccelSync(ScrnInfoPtr pScreenInfo);
-
-#define MAKE_ATOM(a) MakeAtom(a, sizeof(a) - 1, TRUE)
-
-#define DBUF 0
-
-static Atom xvColorKey, xvColorKeyMode, xvFilter
-#if DBUF
-  , xvDoubleBuffer
-#endif
-  ;
-
-void
-GeodeInitVideo(ScreenPtr pScreen)
-{
-   ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
-   XF86VideoAdaptorPtr *adaptors, *newAdaptors = NULL;
-   XF86VideoAdaptorPtr newAdaptor = NULL;
-   GeodePtr pGeode = GEODEPTR(pScrn);
-   int num_adaptors;
-
-   DEBUGMSG(0, (0, X_NONE, "InitVideo\n"));
-
-   if (pGeode->HWVideo) {
-      newAdaptor = GeodeSetupImageVideo(pScreen);
-      GeodeInitOffscreenImages(pScreen);
-   }
-
-   num_adaptors = xf86XVListGenericAdaptors(pScrn, &adaptors);
-
-   if (newAdaptor) {
-      if (!num_adaptors) {
-	 num_adaptors = 1;
-	 adaptors = &newAdaptor;
-      } else {
-	 newAdaptors =			/* need to free this someplace */
-	       xalloc((num_adaptors + 1) * sizeof(XF86VideoAdaptorPtr *));
-	 if (newAdaptors) {
-	    memcpy(newAdaptors, adaptors, num_adaptors *
-		   sizeof(XF86VideoAdaptorPtr));
-	    newAdaptors[num_adaptors] = newAdaptor;
-	    adaptors = newAdaptors;
-	    num_adaptors++;
-	 }
-      }
-   }
-
-   if (num_adaptors)
-      xf86XVScreenInit(pScreen, adaptors, num_adaptors);
-
-   if (newAdaptors)
-      xfree(newAdaptors);
-}
-
-/* client libraries expect an encoding */
-static XF86VideoEncodingRec DummyEncoding[1] = {
-   {
-    0,
-    "XV_IMAGE",
-    1024, 1024,
-    {1, 1}
-    }
-};
-
-#define NUM_FORMATS 4
-
-static XF86VideoFormatRec Formats[NUM_FORMATS] = {
-   {8, PseudoColor}, {15, TrueColor}, {16, TrueColor}, {24, TrueColor}
-};
-
-#if DBUF
-#define NUM_ATTRIBUTES 4
-#else
-#define NUM_ATTRIBUTES 3
-#endif
-
-static XF86AttributeRec Attributes[NUM_ATTRIBUTES] = {
-#if DBUF
-   {XvSettable | XvGettable, 0, 1, "XV_DOUBLE_BUFFER"},
-#endif
-   {XvSettable | XvGettable, 0, (1 << 24) - 1, "XV_COLORKEY"},
-   {XvSettable | XvGettable, 0, 1, "XV_FILTER"},
-   {XvSettable | XvGettable, 0, 1, "XV_COLORKEYMODE"},
-};
-
-#define NUM_IMAGES 7
-
-static XF86ImageRec Images[NUM_IMAGES] = {
-   XVIMAGE_UYVY,
-   XVIMAGE_YUY2,
-   XVIMAGE_Y2YU,
-   XVIMAGE_YVYU,
-   XVIMAGE_Y800,
-   XVIMAGE_I420,
-   XVIMAGE_YV12
-};
-
-typedef struct
-{
-   FBAreaPtr area;
-   FBLinearPtr linear;
-   RegionRec clip;
-   CARD32 colorKey;
-   CARD32 colorKeyMode;
-   CARD32 filter;
-   CARD32 videoStatus;
-   Time offTime;
-   Time freeTime;
-#if DBUF
-   Bool doubleBuffer;
-   int currentBuffer;
-#endif
-}
-GeodePortPrivRec, *GeodePortPrivPtr;
-
-#define GET_PORT_PRIVATE(pScrn) \
-   (GeodePortPrivPtr)((GEODEPTR(pScrn))->adaptor->pPortPrivates[0].ptr)
-
-static INT32
-GeodeSetColorkey(ScrnInfoPtr pScrn, GeodePortPrivPtr pPriv)
-{
-   int red, green, blue;
-   unsigned long key;
-
-   DEBUGMSG(0, (0, X_NONE, "ColorKey\n"));
-   switch (pScrn->depth) {
-   case 8:
-      GFX(get_display_palette_entry(pPriv->colorKey & 0xFF, &key));
-      red = ((key >> 16) & 0xFF);
-      green = ((key >> 8) & 0xFF);
-      blue = (key & 0xFF);
-      break;
-   default:
-      red = (pPriv->colorKey & pScrn->mask.red) >> pScrn->offset.red << (8 -
-									 pScrn->
-									 weight.
-									 red);
-      green =
-	    (pPriv->colorKey & pScrn->mask.green) >> pScrn->offset.
-	    green << (8 - pScrn->weight.green);
-      blue = (pPriv->colorKey & pScrn->mask.blue) >> pScrn->offset.
-	    blue << (8 - pScrn->weight.blue);
-      break;
-   }
-   GFX(set_video_color_key
-       ((blue | (green << 8) | (red << 16)), 0xFCFCFC,
-	(pPriv->colorKeyMode == 0)));
-   REGION_EMPTY(pScrn->pScreen, &pPriv->clip);
-   return 0;
-}
-
-void
-GeodeResetVideo(ScrnInfoPtr pScrn)
-{
-   GeodePtr pGeode = GEODEPTR(pScrn);
-   GeodePortPrivPtr pPriv = pGeode->adaptor->pPortPrivates[0].ptr;
-
-   DEBUGMSG(0, (0, X_NONE, "ResetVideo\n"));
-   GeodeAccelSync(pScrn);
-   GFX(set_video_palette(NULL));
-   GeodeSetColorkey(pScrn, pPriv);
-   GFX(set_video_filter(pPriv->filter, pPriv->filter));
-}
-
-static XF86VideoAdaptorPtr
-GeodeSetupImageVideo(ScreenPtr pScreen)
-{
-   ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
-   GeodePtr pGeode = GEODEPTR(pScrn);
-   XF86VideoAdaptorPtr adapt;
-   GeodePortPrivPtr pPriv;
-
-   DEBUGMSG(0, (0, X_NONE, "SetupImageVideo\n"));
-   if (!(adapt = xcalloc(1, sizeof(XF86VideoAdaptorRec) +
-			 sizeof(GeodePortPrivRec) + sizeof(DevUnion))))
-      return NULL;
-
-   adapt->type = XvWindowMask | XvInputMask | XvImageMask;
-   adapt->flags = VIDEO_OVERLAID_IMAGES | VIDEO_CLIP_TO_VIEWPORT;
-   adapt->name = "National Semiconductor Corporation";
-   adapt->nEncodings = 1;
-   adapt->pEncodings = DummyEncoding;
-   adapt->nFormats = NUM_FORMATS;
-   adapt->pFormats = Formats;
-   adapt->nPorts = 1;
-   adapt->pPortPrivates = (DevUnion *) (&adapt[1]);
-   pPriv = (GeodePortPrivPtr) (&adapt->pPortPrivates[1]);
-   adapt->pPortPrivates[0].ptr = (pointer) (pPriv);
-   adapt->pAttributes = Attributes;
-   adapt->nImages = NUM_IMAGES;
-   adapt->nAttributes = NUM_ATTRIBUTES;
-   adapt->pImages = Images;
-   adapt->PutVideo = NULL;
-   adapt->PutStill = NULL;
-   adapt->GetVideo = NULL;
-   adapt->GetStill = NULL;
-   adapt->StopVideo = GeodeStopVideo;
-   adapt->SetPortAttribute = GeodeSetPortAttribute;
-   adapt->GetPortAttribute = GeodeGetPortAttribute;
-   adapt->QueryBestSize = GeodeQueryBestSize;
-   adapt->PutImage = GeodePutImage;
-   adapt->QueryImageAttributes = GeodeQueryImageAttributes;
-
-   pPriv->colorKey = pGeode->videoKey;
-   pPriv->colorKeyMode = 0;
-   pPriv->filter = 0;
-   pPriv->videoStatus = 0;
-#if DBUF
-   pPriv->doubleBuffer = TRUE;
-   pPriv->currentBuffer = 0;		/* init to first buffer */
-#endif
-
-   /* gotta uninit this someplace */
-   REGION_INIT(pScreen, &pPriv->clip, NullBox, 0);
-
-   pGeode->adaptor = adapt;
-
-   pGeode->BlockHandler = pScreen->BlockHandler;
-   pScreen->BlockHandler = GeodeBlockHandler;
-
-   xvColorKey = MAKE_ATOM("XV_COLORKEY");
-   xvColorKeyMode = MAKE_ATOM("XV_COLORKEYMODE");
-   xvFilter = MAKE_ATOM("XV_FILTER");
-#if DBUF
-   xvDoubleBuffer = MAKE_ATOM("XV_DOUBLE_BUFFER");
-#endif
-
-   GeodeResetVideo(pScrn);
-
-   return adapt;
-}
-
-static Bool
-RegionsEqual(RegionPtr A, RegionPtr B)
-{
-   int *dataA, *dataB;
-   int num;
-
-   num = REGION_NUM_RECTS(A);
-   if (num != REGION_NUM_RECTS(B))
-      return FALSE;
-
-   if ((A->extents.x1 != B->extents.x1) ||
-       (A->extents.x2 != B->extents.x2) ||
-       (A->extents.y1 != B->extents.y1) || (A->extents.y2 != B->extents.y2))
-      return FALSE;
-
-   dataA = (int *)REGION_RECTS(A);
-   dataB = (int *)REGION_RECTS(B);
-
-   while (num--) {
-      if ((dataA[0] != dataB[0]) || (dataA[1] != dataB[1]))
-	 return FALSE;
-      dataA += 2;
-      dataB += 2;
-   }
-
-   return TRUE;
-}
-
-static void
-GeodeStopVideo(ScrnInfoPtr pScrn, pointer data, Bool exit)
-{
-   GeodePortPrivPtr pPriv = (GeodePortPrivPtr) data;
-
-   REGION_EMPTY(pScrn->pScreen, &pPriv->clip);
-
-   GeodeAccelSync(pScrn);
-   if (exit) {
-      if (pPriv->videoStatus & CLIENT_VIDEO_ON) {
-	 GFX(set_video_enable(0));
-      }
-      if (pPriv->area) {
-	 xf86FreeOffscreenArea(pPriv->area);
-	 pPriv->area = NULL;
-      }
-      pPriv->videoStatus = 0;
-   } else {
-      if (pPriv->videoStatus & CLIENT_VIDEO_ON) {
-	 pPriv->videoStatus |= OFF_TIMER;
-	 pPriv->offTime = currentTime.milliseconds + OFF_DELAY;
-      }
-   }
-}
-
-static int
-GeodeSetPortAttribute(ScrnInfoPtr pScrn,
-		      Atom attribute, INT32 value, pointer data)
-{
-   GeodePortPrivPtr pPriv = (GeodePortPrivPtr) data;
-
-   GeodeAccelSync(pScrn);
-   DEBUGMSG(0, (0, X_NONE, "SetPortAttribute\n"));
-   if (attribute == xvColorKey) {
-      pPriv->colorKey = value;
-      GeodeSetColorkey(pScrn, pPriv);
-#if DBUF
-   } else if (attribute == xvDoubleBuffer) {
-      if ((value < 0) || (value > 1))
-	 return BadValue;
-      pPriv->doubleBuffer = value;
-#endif
-   } else if (attribute == xvColorKeyMode) {
-      pPriv->colorKeyMode = value;
-      GeodeSetColorkey(pScrn, pPriv);
-   } else if (attribute == xvFilter) {
-      pPriv->filter = value;
-      GFX(set_video_filter(pPriv->filter, pPriv->filter));
-   } else
-      return BadMatch;
-
-   return Success;
-}
-
-static int
-GeodeGetPortAttribute(ScrnInfoPtr pScrn,
-		      Atom attribute, INT32 * value, pointer data)
-{
-   GeodePortPrivPtr pPriv = (GeodePortPrivPtr) data;
-
-   if (attribute == xvColorKey) {
-      *value = pPriv->colorKey;
-#if DBUF
-   } else if (attribute == xvDoubleBuffer) {
-      *value = pPriv->doubleBuffer ? 1 : 0;
-#endif
-   } else if (attribute == xvColorKeyMode) {
-      *value = pPriv->colorKeyMode;
-   } else if (attribute == xvFilter) {
-      *value = pPriv->filter;
-   } else
-      return BadMatch;
-
-   return Success;
-}
-
-static void
-GeodeQueryBestSize(ScrnInfoPtr pScrn,
-		   Bool motion,
-		   short vid_w, short vid_h,
-		   short drw_w, short drw_h,
-		   unsigned int *p_w, unsigned int *p_h, pointer data)
-{
-   DEBUGMSG(0, (0, X_NONE, "QueryBestSize\n"));
-   *p_w = drw_w;
-   *p_h = drw_h;
-
-   if (*p_w > 16384)
-      *p_w = 16384;
-}
-
-static void
-GeodeCopyGreyscale(unsigned char *src,
-		   unsigned char *dst,
-		   int srcPitch, int dstPitch, int h, int w)
-{
-   int i;
-   unsigned char *src2 = src;
-   unsigned char *dst2 = dst;
-   unsigned char *dst3;
-   unsigned char *src3;
-
-   dstPitch <<= 1;
-
-   while (h--) {
-      dst3 = dst2;
-      src3 = src2;
-      for (i = 0; i < w; i++) {
-	 *dst3++ = *src3++;		/* Copy Y data */
-	 *dst3++ = 0x80;		/* Fill UV with 0x80 - greyscale */
-      }
-      src3 = src2;
-      for (i = 0; i < w; i++) {
-	 *dst3++ = *src3++;		/* Copy Y data */
-	 *dst3++ = 0x80;		/* Fill UV with 0x80 - greyscale */
-      }
-      dst2 += dstPitch;
-      src2 += srcPitch;
-   }
-}
-
-#if 1
-static void
-GeodeCopyData(unsigned char *src,
-	      unsigned char *dst, int srcPitch, int dstPitch, int h, int w)
-{
-   w <<= 1;
-   while (h--) {
-      memcpy(dst, src, w);
-      src += srcPitch;
-      dst += dstPitch;
-   }
-}
-#else
-static void
-GeodeCopyData(unsigned char *src, unsigned char *dst,
-	      int srcPitch, int dstPitch, int h, int w)
-{
-   /* calc the # of dwords to xfer */
-   int d = w >> 1;
-
-   srcPitch -= (w << 1);
-   dstPitch -= (w << 1);
-   /* Any left words, if dwords w will be even */
-   w &= 1;
-   while (h--) {			/* this is equivalent of memcpy */
-      /* copy the dwords first */
-      __asm__ __volatile__("rep\n\t" "movsl\n\t"::"S"(src), "D"(dst), "c"(d));
-
-      if (w) {				/* any words left */
-	 __asm__ __volatile__("movsw (%esi), (%edi)\n\t");
-      }
-      /* reint the counter in ecx */
-      __asm__ __volatile__("movl %0, %%ecx\n\t"::"m"(d));
-
-      /* set the ptr's for the next xfer */
-      src += srcPitch;
-      dst += dstPitch;
-   }
-}
-#endif
-
-static void
-GeodeCopyMungedData(unsigned char *src1,
-		    unsigned char *src2,
-		    unsigned char *src3,
-		    unsigned char *dst1,
-		    int srcPitch, int srcPitch2, int dstPitch, int h, int w)
-{
-   CARD32 *dstCur = (CARD32 *) dst1;
-   CARD32 *dstNext = (CARD32 *) dst1;
-   int i, j, k, m, n;
-   CARD32 crcb;
-
-#if 0
-   long oldtime, newtime;
-#endif
-
-   DEBUGMSG(0, (0, X_NONE, "CopyMungedData\n"));
-   /* dstPitch is in byte count, but we write longs.
-    * so divide dstpitch by 4 
-    */
-   dstPitch >>= 2;
-   /* Width is in byte but video data is 16bit
-    */
-   w >>= 1;
-   /* We render 2 scanlines at one shot, handle the odd count */
-   m = h & 1;
-   /* decrement the height since we write 2 scans */
-   h -= 1;
-   /* we traverse by 2 bytes in src Y */
-   srcPitch <<= 1;
-#if 0
-   UpdateCurrentTime();
-   oldtime = currentTime.milliseconds;
-#endif
-
-   for (j = 0; j < h; j += 2) {
-      /* calc the next dest scan start */
-      dstNext = dstCur + dstPitch;
-      for (i = 0; i < w; i++) {
-	 /* crcb is same for the x pixel for 2 scans */
-	 crcb = (src3[i] << 8) | (src2[i] << 24);
-
-	 n = i << 1;
-
-	 /* write the first scan pixel DWORD */
-	 dstCur[i] = src1[n] | (src1[n + 1] << 16) | crcb;
-
-	 /* calc the offset of next pixel */
-	 k = n + srcPitch;
-
-	 /* write the 2nd scan pixel DWORD */
-	 dstNext[i] = src1[k] | (src1[k + 1] << 16) | crcb;
-      }
-      /* increment the offsets */
-
-      /* Y */
-      src1 += srcPitch;
-      /* crcb */
-      src2 += srcPitch2;
-      src3 += srcPitch2;
-      /* processed dest */
-      dstCur += (dstPitch << 1);
-   }
-
-   /* if any scans remaining */
-   if (m) {
-      for (i = 0, k = 0; i < w; i++, k += 2)
-      {
-	 dstCur[i] = src1[k] | (src1[k + 1] << 16) |
-	       (src3[i] << 8) | (src2[i] << 24);
-      }
-   }
-#if 0
-   UpdateCurrentTime();
-   newtime = currentTime.milliseconds;
-   DEBUGMSG(1, (0, X_NONE, "CMD %d\n", newtime - oldtime));
-#endif
-}
-
-static FBAreaPtr
-GeodeAllocateMemory(ScrnInfoPtr pScrn, FBAreaPtr area, int numlines)
-{
-   ScreenPtr pScreen = screenInfo.screens[pScrn->scrnIndex];
-   FBAreaPtr new_area;
-
-   DEBUGMSG(0, (0, X_NONE, "AllocateMemory\n"));
-
-   if (area) {
-      if ((area->box.y2 - area->box.y1) >= numlines)
-	 return area;
-
-      if (xf86ResizeOffscreenArea(area, pScrn->displayWidth, numlines))
-	 return area;
-
-      xf86FreeOffscreenArea(area);
-   }
-
-   new_area = xf86AllocateOffscreenArea(pScreen, pScrn->displayWidth,
-					numlines, 0, NULL, NULL, NULL);
-
-   if (!new_area) {
-      int max_w, max_h;
-
-      xf86QueryLargestOffscreenArea(pScreen, &max_w, &max_h, 0,
-				    FAVOR_WIDTH_THEN_AREA, PRIORITY_EXTREME);
-
-      if ((max_w < pScrn->displayWidth) || (max_h < numlines))
-	 return NULL;
-
-      xf86PurgeUnlockedOffscreenAreas(pScreen);
-      new_area = xf86AllocateOffscreenArea(pScreen, pScrn->displayWidth,
-					   numlines, 0, NULL, NULL, NULL);
-   }
-
-   return new_area;
-}
-
-static void
-GeodeDisplayVideo(ScrnInfoPtr pScrn,
-		  int id,
-		  int offset,
-		  short width, short height,
-		  int pitch,
-		  int x1, int y1, int x2, int y2,
-		  BoxPtr dstBox,
-		  short src_w, short src_h, short drw_w, short drw_h)
-{
-   GeodePtr pGeode = GEODEPTR(pScrn);
-
-/*    DisplayModePtr mode = pScrn->currentMode; */
-   GeodeAccelSync(pScrn);
-
-   DEBUGMSG(0, (0, X_NONE, "DisplayVideo %x, %d %d, %d %d\n",
-		id, width, height, drw_w, drw_h));
-   GFX(set_video_enable(1));
-
-   switch (id) {
-   case FOURCC_UYVY:			/* UYVY */
-      GFX(set_video_format(VIDEO_FORMAT_UYVY));
-      break;
-   case FOURCC_Y800:			/* Y800 - greyscale - we munge it! */
-   case FOURCC_YV12:
-   case FOURCC_I420:
-   case FOURCC_YUY2:			/* YUY2 */
-      GFX(set_video_format(VIDEO_FORMAT_YUYV));
-      break;
-   case FOURCC_Y2YU:			/* Y2YU */
-      GFX(set_video_format(VIDEO_FORMAT_Y2YU));
-      break;
-   case FOURCC_YVYU:			/* YVYU */
-      GFX(set_video_format(VIDEO_FORMAT_YVYU));
-      break;
-   }
-
-   if (pGeode->TV_Overscan_On) {
-      dstBox->x1 += pGeode->TVOx;
-      dstBox->y1 += pGeode->TVOy;
-   }
-
-   GFX(set_video_size(width, height));
-   GFX(set_video_offset(offset));
-   GFX(set_video_window(dstBox->x1, dstBox->y1, drw_w, drw_h));
-   GFX(set_video_scale(src_w, src_h, drw_w, drw_h));
-
-   /* enable color conversion from YUV to RGB */
-#if defined(STB_X)
-   Gal_set_video_color_space(0);
-#else
-   gfx_set_color_space_YUV(0);
-#endif /* STB_X */
-}
-
-#define DummyScreen screenInfo.screens[0]
-
-static int
-GeodePutImage(ScrnInfoPtr pScrn,
-	      short src_x, short src_y,
-	      short drw_x, short drw_y,
-	      short src_w, short src_h,
-	      short drw_w, short drw_h,
-	      int id, unsigned char *buf,
-	      short width, short height,
-	      Bool sync, RegionPtr clipBoxes, pointer data)
-{
-   GeodePortPrivPtr pPriv = (GeodePortPrivPtr) data;
-   GeodePtr pGeode = GEODEPTR(pScrn);
-   BoxRec dstBox;
-   int srcPitch = 0, srcPitch2 = 0, dstPitch = 0;
-   INT32 x1, x2, y1, y2;
-   int top, left, npixels, nlines;
-   int offset, s1offset = 0, s2offset = 0, s3offset = 0;
-   unsigned char *dst_start;
-   int pitch, new_h;
-
-   DEBUGMSG(0, (0, X_NONE, "PutImage %x\n", id));
-
-   if (drw_w > 16384)
-      drw_w = 16384;
-
-   /* Clip */
-   x1 = src_x;
-   x2 = src_x + src_w;
-   y1 = src_y;
-   y2 = src_y + src_h;
-
-   if ((x1 >= x2) || (y1 >= y2))
-      return Success;
-
-   dstBox.x1 = drw_x;
-   dstBox.x2 = drw_x + drw_w;
-   dstBox.y1 = drw_y;
-   dstBox.y2 = drw_y + drw_h;
-
-   dstBox.x1 -= pScrn->frameX0;
-   dstBox.x2 -= pScrn->frameX0;
-   dstBox.y1 -= pScrn->frameY0;
-   dstBox.y2 -= pScrn->frameY0;
-
-   pitch = pScrn->bitsPerPixel * pScrn->displayWidth >> 3;
-
-   dstPitch = ((width << 1) + 3) & ~3;
-
-   switch (id) {
-   case FOURCC_YV12:
-   case FOURCC_I420:
-      srcPitch = (width + 3) & ~3;	/* of luma */
-      s2offset = srcPitch * height;
-      srcPitch2 = ((width >> 1) + 3) & ~3;
-      s3offset = (srcPitch2 * (height >> 1)) + s2offset;
-      break;
-   case FOURCC_UYVY:
-   case FOURCC_YUY2:
-   case FOURCC_Y800:
-   default:
-      srcPitch = (width << 1);
-      break;
-   }
-
-   /* Find how many pitch scanlines required to store the data */
-   new_h = ((dstPitch * height) + pitch - 1) / pitch;
-
-#if DBUF
-   if (pPriv->doubleBuffer)
-      new_h <<= 1;
-#endif
-
-   if (!(pPriv->area = GeodeAllocateMemory(pScrn, pPriv->area, new_h)))
-      return BadAlloc;
-
-   /* copy data */
-   top = y1;
-   left = x1 & ~1;
-   npixels = ((x2 + 1) & ~1) - left;
-
-   switch (id) {
-   case FOURCC_YV12:
-   case FOURCC_I420:
-      {
-	 int tmp;
-
-	 top &= ~1;
-	 offset = (pPriv->area->box.y1 * pitch) + (top * dstPitch);
-
-#if DBUF
-	 if (pPriv->doubleBuffer && pPriv->currentBuffer)
-	    offset += (new_h >> 1) * pitch;
-#endif
-
-	 dst_start = pGeode->FBBase + offset + left;
-	 tmp = ((top >> 1) * srcPitch2) + (left >> 1);
-	 s2offset += tmp;
-	 s3offset += tmp;
-	 if (id == FOURCC_I420) {
-	    tmp = s2offset;
-	    s2offset = s3offset;
-	    s3offset = tmp;
-	 }
-	 nlines = ((y2 + 1) & ~1) - top;
-	 s1offset = (top * srcPitch) + left;
-      }
-      break;
-   case FOURCC_UYVY:
-   case FOURCC_YUY2:
-   case FOURCC_Y800:
-   default:
-      left <<= 1;
-      buf += (top * srcPitch) + left;
-      nlines = y2 - top;
-      offset = (pPriv->area->box.y1 * pitch) + (top * dstPitch);
-
-#if DBUF
-      if (pPriv->doubleBuffer && pPriv->currentBuffer)
-	 offset += (new_h >> 1) * pitch;
-#endif
-
-      dst_start = pGeode->FBBase + offset + left;
-      break;
-   }
-
-   /* update cliplist */
-   if (!RegionsEqual(&pPriv->clip, clipBoxes)) {
-      REGION_COPY(pScreen, &pPriv->clip, clipBoxes);
-      if (pPriv->colorKeyMode == 0) {
-	 /* draw these */
-	 xf86XVFillKeyHelper(pScrn->pScreen, pPriv->colorKey, clipBoxes);
-      }
-   }
-
-   switch (id) {
-   case FOURCC_Y800:
-      GeodeCopyGreyscale(buf, dst_start, srcPitch, dstPitch, nlines, npixels);
-      break;
-   case FOURCC_YV12:
-   case FOURCC_I420:
-      GeodeCopyMungedData(buf + s1offset, buf + s2offset,
-			  buf + s3offset, dst_start, srcPitch, srcPitch2,
-			  dstPitch, nlines, npixels);
-      break;
-   case FOURCC_UYVY:
-   case FOURCC_YUY2:
-   default:
-      GeodeCopyData(buf, dst_start, srcPitch, dstPitch, nlines, npixels);
-      break;
-   }
-
-   GeodeDisplayVideo(pScrn, id, offset, width, height, dstPitch,
-		     x1, y1, x2, y2, &dstBox, src_w, src_h, drw_w, drw_h);
-
-#if DBUF
-   pPriv->currentBuffer ^= 1;
-#endif
-
-   pPriv->videoStatus = CLIENT_VIDEO_ON;
-
-   return Success;
-}
-
-static int
-GeodeQueryImageAttributes(ScrnInfoPtr pScrn,
-			  int id,
-			  unsigned short *w, unsigned short *h,
-			  int *pitches, int *offsets)
-{
-   int size;
-   int tmp;
-
-   DEBUGMSG(0, (0, X_NONE, "QueryImageAttributes %X\n", id));
-
-   if (*w > 1024)
-      *w = 1024;
-   if (*h > 1024)
-      *h = 1024;
-
-   *w = (*w + 1) & ~1;
-   if (offsets)
-      offsets[0] = 0;
-
-   switch (id) {
-   case FOURCC_YV12:
-   case FOURCC_I420:
-      *h = (*h + 1) & ~1;
-      size = (*w + 3) & ~3;
-      if (pitches)
-	 pitches[0] = size;
-      size *= *h;
-      if (offsets)
-	 offsets[1] = size;
-      tmp = ((*w >> 1) + 3) & ~3;
-      if (pitches)
-	 pitches[1] = pitches[2] = tmp;
-      tmp *= (*h >> 1);
-      size += tmp;
-      if (offsets)
-	 offsets[2] = size;
-      size += tmp;
-      break;
-   case FOURCC_UYVY:
-   case FOURCC_YUY2:
-   case FOURCC_Y800:
-   default:
-      size = *w << 1;
-      if (pitches)
-	 pitches[0] = size;
-      size *= *h;
-      break;
-   }
-   return size;
-}
-
-static void
-GeodeBlockHandler(int i,
-		  pointer blockData, pointer pTimeout, pointer pReadmask)
-{
-   ScreenPtr pScreen = screenInfo.screens[i];
-   ScrnInfoPtr pScrn = xf86Screens[i];
-   GeodePtr pGeode = GEODEPTR(pScrn);
-   GeodePortPrivPtr pPriv = GET_PORT_PRIVATE(pScrn);
-
-   pScreen->BlockHandler = pGeode->BlockHandler;
-   (*pScreen->BlockHandler) (i, blockData, pTimeout, pReadmask);
-   pScreen->BlockHandler = GeodeBlockHandler;
-
-   if (pPriv->videoStatus & TIMER_MASK) {
-      UpdateCurrentTime();
-      if (pPriv->videoStatus & OFF_TIMER) {
-	 if (pPriv->offTime < currentTime.milliseconds) {
-	    GFX(set_video_enable(0));
-	    pPriv->videoStatus = FREE_TIMER;
-	    pPriv->freeTime = currentTime.milliseconds + FREE_DELAY;
-	 }
-      } else {				/* FREE_TIMER */
-	 if (pPriv->freeTime < currentTime.milliseconds) {
-	    if (pPriv->area) {
-	       xf86FreeOffscreenArea(pPriv->area);
-	       pPriv->area = NULL;
-	    }
-	    pPriv->videoStatus = 0;
-	 }
-      }
-   }
-}
-
-/****************** Offscreen stuff ***************/
-
-typedef struct
-{
-   FBAreaPtr area;
-   FBLinearPtr linear;
-   Bool isOn;
-}
-OffscreenPrivRec, *OffscreenPrivPtr;
-
-static int
-GeodeAllocateSurface(ScrnInfoPtr pScrn,
-		     int id,
-		     unsigned short w,
-		     unsigned short h, XF86SurfacePtr surface)
-{
-   FBAreaPtr area;
-   int pitch, fbpitch, numlines;
-   OffscreenPrivPtr pPriv;
-
-   if ((w > 1024) || (h > 1024))
-      return BadAlloc;
-
-   w = (w + 1) & ~1;
-   pitch = ((w << 1) + 15) & ~15;
-   fbpitch = pScrn->bitsPerPixel * pScrn->displayWidth >> 3;
-   numlines = ((pitch * h) + fbpitch - 1) / fbpitch;
-
-   if (!(area = GeodeAllocateMemory(pScrn, NULL, numlines)))
-      return BadAlloc;
-
-   surface->width = w;
-   surface->height = h;
-
-   if (!(surface->pitches = xalloc(sizeof(int))))
-      return BadAlloc;
-   if (!(surface->offsets = xalloc(sizeof(int)))) {
-      xfree(surface->pitches);
-      return BadAlloc;
-   }
-   if (!(pPriv = xalloc(sizeof(OffscreenPrivRec)))) {
-      xfree(surface->pitches);
-      xfree(surface->offsets);
-      return BadAlloc;
-   }
-
-   pPriv->area = area;
-
-   pPriv->isOn = FALSE;
-
-   surface->pScrn = pScrn;
-   surface->id = id;
-   surface->pitches[0] = pitch;
-   surface->offsets[0] = area->box.y1 * fbpitch;
-   surface->devPrivate.ptr = (pointer) pPriv;
-
-   return Success;
-}
-
-static int
-GeodeStopSurface(XF86SurfacePtr surface)
-{
-   OffscreenPrivPtr pPriv = (OffscreenPrivPtr) surface->devPrivate.ptr;
-
-   if (pPriv->isOn) {
-      pPriv->isOn = FALSE;
-   }
-
-   return Success;
-}
-
-static int
-GeodeFreeSurface(XF86SurfacePtr surface)
-{
-   OffscreenPrivPtr pPriv = (OffscreenPrivPtr) surface->devPrivate.ptr;
-
-   if (pPriv->isOn)
-      GeodeStopSurface(surface);
-   xf86FreeOffscreenArea(pPriv->area);
-   xfree(surface->pitches);
-   xfree(surface->offsets);
-   xfree(surface->devPrivate.ptr);
-
-   return Success;
-}
-
-static int
-GeodeGetSurfaceAttribute(ScrnInfoPtr pScrn, Atom attribute, INT32 * value)
-{
-   return GeodeGetPortAttribute(pScrn, attribute, value,
-				(pointer) (GET_PORT_PRIVATE(pScrn)));
-}
-
-static int
-GeodeSetSurfaceAttribute(ScrnInfoPtr pScrn, Atom attribute, INT32 value)
-{
-   return GeodeSetPortAttribute(pScrn, attribute, value,
-				(pointer) (GET_PORT_PRIVATE(pScrn)));
-}
-
-static int
-GeodeDisplaySurface(XF86SurfacePtr surface,
-		    short src_x, short src_y,
-		    short drw_x, short drw_y,
-		    short src_w, short src_h,
-		    short drw_w, short drw_h, RegionPtr clipBoxes)
-{
-   OffscreenPrivPtr pPriv = (OffscreenPrivPtr) surface->devPrivate.ptr;
-   ScrnInfoPtr pScrn = surface->pScrn;
-   GeodePortPrivPtr portPriv = GET_PORT_PRIVATE(pScrn);
-   INT32 x1, y1, x2, y2;
-   BoxRec dstBox;
-
-   x1 = src_x;
-   x2 = src_x + src_w;
-   y1 = src_y;
-   y2 = src_y + src_h;
-
-   dstBox.x1 = drw_x;
-   dstBox.x2 = drw_x + drw_w;
-   dstBox.y1 = drw_y;
-   dstBox.y2 = drw_y + drw_h;
-
-   if ((x1 >= x2) || (y1 >= y2))
-      return Success;
-
-   dstBox.x1 -= pScrn->frameX0;
-   dstBox.x2 -= pScrn->frameX0;
-   dstBox.y1 -= pScrn->frameY0;
-   dstBox.y2 -= pScrn->frameY0;
-
-   xf86XVFillKeyHelper(pScrn->pScreen, portPriv->colorKey, clipBoxes);
-
-   GeodeDisplayVideo(pScrn, surface->id, surface->offsets[0],
-		     surface->width, surface->height, surface->pitches[0],
-		     x1, y1, x2, y2, &dstBox, src_w, src_h, drw_w, drw_h);
-
-   pPriv->isOn = TRUE;
-   if (portPriv->videoStatus & CLIENT_VIDEO_ON) {
-      REGION_EMPTY(pScrn->pScreen, &portPriv->clip);
-      UpdateCurrentTime();
-      portPriv->videoStatus = FREE_TIMER;
-      portPriv->freeTime = currentTime.milliseconds + FREE_DELAY;
-   }
-
-   return Success;
-}
-
-static void
-GeodeInitOffscreenImages(ScreenPtr pScreen)
-{
-   XF86OffscreenImagePtr offscreenImages;
-
-   /* need to free this someplace */
-   if (!(offscreenImages = xalloc(sizeof(XF86OffscreenImageRec))))
-      return;
-
-   offscreenImages[0].image = &Images[0];
-   offscreenImages[0].flags = VIDEO_OVERLAID_IMAGES | VIDEO_CLIP_TO_VIEWPORT;
-   offscreenImages[0].alloc_surface = GeodeAllocateSurface;
-   offscreenImages[0].free_surface = GeodeFreeSurface;
-   offscreenImages[0].display = GeodeDisplaySurface;
-   offscreenImages[0].stop = GeodeStopSurface;
-   offscreenImages[0].setAttribute = GeodeSetSurfaceAttribute;
-   offscreenImages[0].getAttribute = GeodeGetSurfaceAttribute;
-   offscreenImages[0].max_width = 1024;
-   offscreenImages[0].max_height = 1024;
-   offscreenImages[0].num_attributes = NUM_ATTRIBUTES;
-   offscreenImages[0].attributes = Attributes;
-
-   xf86XVRegisterOffscreenImages(pScreen, offscreenImages, 1);
-}
-
-#endif /* !XvExtension */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/disp_gu1.c b/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/disp_gu1.c
deleted file mode 100644
index 8fb952404..000000000
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/disp_gu1.c
+++ /dev/null
@@ -1,2503 +0,0 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/disp_gu1.c,v 1.2 2002/10/18 20:02:39 tsi Exp $ */
-/*
- * $Workfile: disp_gu1.c $
- *
- * This file contains routines for the first generation display controller.  
- *
- * NSC_LIC_ALTERNATIVE_PREAMBLE
- *
- * Revision 1.0
- *
- * National Semiconductor Alternative GPL-BSD License
- *
- * National Semiconductor Corporation licenses this software 
- * ("Software"):
- *
- *      Durango
- *
- * under one of the two following licenses, depending on how the 
- * Software is received by the Licensee.
- * 
- * If this Software is received as part of the Linux Framebuffer or
- * other GPL licensed software, then the GPL license designated 
- * NSC_LIC_GPL applies to this Software; in all other circumstances 
- * then the BSD-style license designated NSC_LIC_BSD shall apply.
- *
- * END_NSC_LIC_ALTERNATIVE_PREAMBLE */
-
-/* NSC_LIC_BSD
- *
- * National Semiconductor Corporation Open Source License for Durango
- *
- * (BSD License with Export Notice)
- *
- * Copyright (c) 1999-2001
- * National Semiconductor Corporation.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without 
- * modification, are permitted provided that the following conditions 
- * are met: 
- *
- *   * Redistributions of source code must retain the above copyright 
- *     notice, this list of conditions and the following disclaimer. 
- *
- *   * Redistributions in binary form must reproduce the above 
- *     copyright notice, this list of conditions and the following 
- *     disclaimer in the documentation and/or other materials provided 
- *     with the distribution. 
- *
- *   * Neither the name of the National Semiconductor Corporation nor 
- *     the names of its contributors may be used to endorse or promote 
- *     products derived from this software without specific prior 
- *     written permission. 
- * 
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
- * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
- * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE,
- * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
- * OF SUCH DAMAGE.
- *
- * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
- * YOUR JURISDICTION. It is licensee's responsibility to comply with 
- * any export regulations applicable in licensee's jurisdiction. Under 
- * CURRENT (2001) U.S. export regulations this software 
- * is eligible for export from the U.S. and can be downloaded by or 
- * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
- * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
- * Syria, Sudan, Afghanistan and any other country to which the U.S. 
- * has embargoed goods and services. 
- *
- * END_NSC_LIC_BSD */
-
-/* NSC_LIC_GPL
- *
- * National Semiconductor Corporation Gnu General Public License for Durango
- *
- * (GPL License with Export Notice)
- *
- * Copyright (c) 1999-2001
- * National Semiconductor Corporation.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without 
- * modification, are permitted under the terms of the GNU General 
- * Public License as published by the Free Software Foundation; either 
- * version 2 of the License, or (at your option) any later version  
- *
- * In addition to the terms of the GNU General Public License, neither 
- * the name of the National Semiconductor Corporation nor the names of 
- * its contributors may be used to endorse or promote products derived 
- * from this software without specific prior written permission. 
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
- * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
- * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, 
- * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
- * OF SUCH DAMAGE. See the GNU General Public License for more details. 
- *
- * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
- * YOUR JURISDICTION. It is licensee's responsibility to comply with 
- * any export regulations applicable in licensee's jurisdiction. Under 
- * CURRENT (2001) U.S. export regulations this software 
- * is eligible for export from the U.S. and can be downloaded by or 
- * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
- * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
- * Syria, Sudan, Afghanistan and any other country to which the U.S. 
- * has embargoed goods and services. 
- *
- * You should have received a copy of the GNU General Public License 
- * along with this file; if not, write to the Free Software Foundation, 
- * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 
- *
- * END_NSC_LIC_GPL */
-
-
-void gu1_enable_compression(void);		            /* private routine definition */
-void gu1_disable_compression(void);		            /* private routine definition */
-void gfx_reset_video(void);				            /* private routine definition */
-int gfx_set_display_control(int sync_polarities);	/* private routine definition */
-
-/* VIDEO BUFFER SIZE */
-
-unsigned long vid_buf_size = 0;
-int vid_enabled = 0;
-
-/*-----------------------------------------------------------------------------
- * GU1_DELAY_APPROXIMATE (PRIVATE ROUTINE - NOT PART OF DURANGO API)
- *
- * Delay the requested number of milliseconds by reading a register.  This function
- * generally takes longer than the requested time.
- *-----------------------------------------------------------------------------*/
-void gu1_delay_approximate (unsigned long milliseconds)
-{
-	/* ASSUME 300 MHz, 5 CLOCKS PER READ */
-
-#	define READS_PER_MILLISECOND 60000L
-
-	unsigned long loop;
-	loop = milliseconds * READS_PER_MILLISECOND;
-	while (loop-- > 0)
-	{
-		READ_REG32(DC_UNLOCK);
-	}
-}
-
-/*-----------------------------------------------------------------------------
- * GU1_DELAY_PRECISE (PRIVATE ROUTINE - NOT PART OF DURANGO API)
- *
- * Delay the number of milliseconds on a more precise level, varying only by 
- * 1/10 of a ms.  This function should only be called if an SC1200 is present.
- *-----------------------------------------------------------------------------*/
-void gu1_delay_precise (unsigned long milliseconds)
-{
-#if GFX_VIDEO_SC1200
-
-#define LOOP 1000
-	unsigned long i, timer_start, timer_end, total_ticks, previous_ticks, temp_ticks;
-
-	/* Get current time */
-	timer_start = IND(SC1200_CB_BASE_ADDR + SC1200_CB_TMVALUE);
-	
-	/* Calculate expected end time */
-	if (INB(SC1200_CB_BASE_ADDR + SC1200_CB_TMCNFG) & SC1200_TMCLKSEL_27MHZ)
-		total_ticks = 27000 * milliseconds;      /* timer resolution is 27 MHz */
-	else
-		total_ticks = 1000 * milliseconds;	    /* timer resolution is 1 MHz */
-		
-	if (total_ticks > ((unsigned long)0xffffffff - timer_start)) /* wrap-around */
-		timer_end = total_ticks - ((unsigned long)0xffffffff - timer_start);
-	else
-		timer_end = timer_start + total_ticks;
-	
-	/* in case of wrap around */
-	if (timer_end < timer_start)
-	{
-		previous_ticks = timer_start;
-		while (1)
-		{
-			temp_ticks = IND(SC1200_CB_BASE_ADDR + SC1200_CB_TMVALUE);
-			if (temp_ticks < previous_ticks)
-				break;
-			else
-				previous_ticks = temp_ticks;
-			for (i = 0; i < LOOP; i++)
-				READ_REG32(DC_UNLOCK);
-		}
-	}
-	/* now the non-wrap around part */
-	while (1)
-	{
-		for (i = 0; i < LOOP; i++)
-			READ_REG32(DC_UNLOCK);
-		if(IND(SC1200_CB_BASE_ADDR + SC1200_CB_TMVALUE) > timer_end)
-			break;
-	}
-
-#endif /* GFX_VIDEO_SC1200 */
-}
-
-/*-----------------------------------------------------------------------------
- * WARNING!!!! INACCURATE DELAY MECHANISM
- *
- * In an effort to keep the code self contained and operating system 
- * independent, the delay loop just performs reads of a display controller
- * register.  This time will vary for faster processors.  The delay can always
- * be longer than intended, only effecting the time of the mode switch 
- * (obviously want it to still be under a second).  Problems with the hardware
- * only arise if the delay is not long enough.
- *
- * For the SC1200, the high resolution timer can be used as an accurate mechanism
- * for keeping time. However, in order to avoid a busy loop of IO reads, the
- * timer is polled in-between busy loops, and therefore the actual delay might
- * be longer than the requested delay by the time of one busy loop
- * (which on a 200 MHz system took 95 us)
- *
- * There are thus two delay functions which are called from the main API routine.
- * One is meant to be more precise and should only called if an SC1200 is present.
- *-----------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-void gu1_delay_milliseconds(unsigned long milliseconds)
-#else
-void gfx_delay_milliseconds(unsigned long milliseconds)
-#endif
-{
-#if GFX_VIDEO_SC1200
-
-#if GFX_VIDEO_DYNAMIC
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-	{
-#endif
-		gu1_delay_precise(milliseconds);
-		return;
-#if GFX_VIDEO_DYNAMIC
-	}
-#endif
-
-#endif /* GFX_VIDEO_SC1200 */
-
-	gu1_delay_approximate(milliseconds);
-}
-
-#if GFX_DISPLAY_DYNAMIC
-void gu1_delay_microseconds(unsigned long microseconds)
-#else
-void gfx_delay_microseconds(unsigned long microseconds)
-#endif
-{
-	/* ASSUME 300 MHz, 2 CLOCKS PER INCREMENT */
-
-	unsigned long loop_count = microseconds * 150;
-	
-	while (loop_count-- > 0)
-	{
-		;
-	}
-}
-/*-----------------------------------------------------------------------------
- * GFX_VIDEO_SHUTDOWN
- *
- * This routine disables the display controller output.
- *-----------------------------------------------------------------------------
- */
-void gu1_video_shutdown(void)
-{
-	unsigned long unlock;
-	unsigned long gcfg, tcfg;
-
-	/* DISABLE COMPRESSION */
-
-	gu1_disable_compression();
-
-	/* ALSO DISABLE VIDEO */
-	/* Use private "reset video" routine to do all that is needed. */
-	/* SC1200, for example, also disables the alpha blending regions. */
-
-	gfx_reset_video();
-
-	/* UNLOCK THE DISPLAY CONTROLLER REGISTERS */
-
-	unlock = READ_REG32(DC_UNLOCK);
-	WRITE_REG32(DC_UNLOCK, DC_UNLOCK_VALUE);
-
-	/* READ THE CURRENT GX VALUES */
-
-    gcfg = READ_REG32(DC_GENERAL_CFG);
-    tcfg = READ_REG32(DC_TIMING_CFG);
-
-    /* BLANK THE GX DISPLAY AND DISABLE THE TIMING GENERATOR */
-
-	tcfg &= ~((unsigned long)DC_TCFG_BLKE | (unsigned long)DC_TCFG_TGEN);	  
-    WRITE_REG32(DC_TIMING_CFG, tcfg);
-
-	/* DELAY: WAIT FOR PENDING MEMORY REQUESTS */ 
-	/* This delay is used to make sure that all pending requests to the */ 
-	/* memory controller have completed before disabling the FIFO load. */
-
-	gfx_delay_milliseconds(1);
-
-    /* DISABLE DISPLAY FIFO LOAD AND DISABLE COMPRESSION */
-
-    gcfg &= ~(unsigned long)(DC_GCFG_DFLE | DC_GCFG_CMPE | DC_GCFG_DECE);
-    WRITE_REG32(DC_GENERAL_CFG, gcfg);
-	WRITE_REG32(DC_UNLOCK, unlock);
-	return;
-}
-
-/*-----------------------------------------------------------------------------
- * GFX_SET_DISPLAY_BPP
- *
- * This routine programs the bpp in the display controller.
- *-----------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-int gu1_set_display_bpp(unsigned short bpp)
-#else
-int gfx_set_display_bpp(unsigned short bpp)
-#endif
-{
-    unsigned long ocfg, lock;
-
-	lock = READ_REG32 (DC_UNLOCK);
-	ocfg = READ_REG32 (DC_OUTPUT_CFG) & ~(DC_OCFG_8BPP | DC_OCFG_555);
-
-	/* SET DC PIXEL FORMAT */
-
-	if (bpp == 8) ocfg |= DC_OCFG_8BPP;
-	else if (bpp == 15) ocfg |= DC_OCFG_555;
-	else if (bpp != 16) return GFX_STATUS_BAD_PARAMETER;
-
-	WRITE_REG32 (DC_UNLOCK, DC_UNLOCK_VALUE);
-	WRITE_REG32 (DC_OUTPUT_CFG, ocfg);
-	WRITE_REG32 (DC_UNLOCK, lock);
-
-	/* SET BPP IN GRAPHICS PIPELINE */
-
-	gfx_set_bpp (bpp);
-
-	return 0;
-}
-
-/*-----------------------------------------------------------------------------
- * GFX_SET_SPECIFIED_MODE
- * This routine uses the parameters in the specified display mode structure
- * to program the display controller hardware.  
- *-----------------------------------------------------------------------------
- */
-int gu1_set_specified_mode(DISPLAYMODE *pMode, int bpp)
-{
-	unsigned long unlock, value;
-	unsigned long gcfg, tcfg, ocfg;
-	unsigned long size, pitch;
-	unsigned long vid_buf_size;
-	unsigned long hactive, vactive;
-	gbpp = bpp;  
-
-	/* CHECK WHETHER TIMING CHANGE IS ALLOWED */
-	/* Flag used for locking also overrides timing change restriction */
-
-	if (gfx_timing_lock && !(pMode->flags & GFX_MODE_LOCK_TIMING))
-		return GFX_STATUS_ERROR;
-		
-	/* SET GLOBAL FLAG */
-	
-	if (pMode->flags & GFX_MODE_LOCK_TIMING)
-		gfx_timing_lock = 1;
-
-	/* DISABLE COMPRESSION */
-
-	gu1_disable_compression();
-
-	/* ALSO DISABLE VIDEO */
-	/* Use private "reset video" routine to do all that is needed. */
-	/* SC1200, for example, also disables the alpha blending regions. */
-
-	gfx_reset_video();
-
-	/* UNLOCK THE DISPLAY CONTROLLER REGISTERS */
-
-	unlock = READ_REG32(DC_UNLOCK);
-	WRITE_REG32(DC_UNLOCK, DC_UNLOCK_VALUE);
-
-	/* READ THE CURRENT GX VALUES */
-
-    gcfg = READ_REG32(DC_GENERAL_CFG);
-    tcfg = READ_REG32(DC_TIMING_CFG);
-
-    /* BLANK THE GX DISPLAY AND DISABLE THE TIMING GENERATOR */
-
-	tcfg &= ~((unsigned long)DC_TCFG_BLKE | (unsigned long)DC_TCFG_TGEN);	  
-    WRITE_REG32(DC_TIMING_CFG, tcfg);
-
-	/* DELAY: WAIT FOR PENDING MEMORY REQUESTS 
-	 * This delay is used to make sure that all pending requests to the 
-	 * memory controller have completed before disabling the FIFO load.
-     */
-
-	gfx_delay_milliseconds(1);
-	
-    /* DISABLE DISPLAY FIFO LOAD AND DISABLE COMPRESSION */
-
-    gcfg &= ~(unsigned long)(DC_GCFG_DFLE | DC_GCFG_CMPE | DC_GCFG_DECE);
-    WRITE_REG32(DC_GENERAL_CFG, gcfg);
-
-	/* CLEAR THE "DCLK_MUL" FIELD */ 
-
-	gcfg &= ~(unsigned long)(DC_GCFG_DDCK | DC_GCFG_DPCK | DC_GCFG_DFCK);
-	gcfg &= ~(unsigned long)DC_GCFG_DCLK_MASK;
-	WRITE_REG32(DC_GENERAL_CFG, gcfg);
-
-	/* SET THE DOT CLOCK FREQUENCY */
-	/* Mask off the divide by two bit (bit 31) */
-
-	gfx_set_clock_frequency(pMode->frequency & 0x7FFFFFFF);
-
-	/* DELAY: WAIT FOR THE PLL TO SETTLE */
-	/* This allows the dot clock frequency that was just set to settle. */
-
-	gfx_delay_milliseconds(1);
-
-	/* SET THE "DCLK_MUL" FIELD OF DC_GENERAL_CFG */
-	/* The GX hardware divides the dot clock, so 2x really means that the */ 
-	/* internal dot clock equals the external dot clock. */ 
-
-	if (pMode->frequency & 0x80000000) gcfg |= 0x0040;
-	else gcfg |= 0x0080;
-	WRITE_REG32(DC_GENERAL_CFG, gcfg);
-	
-	/* DELAY: WAIT FOR THE ADL TO LOCK */
-	/* This allows the clock generatation within GX to settle.  This is */
-	/* needed since some of the register writes that follow require that */
-	/* clock to be present. */
-
-	/* We do a few to ensure we're synced */
-	gfx_delay_milliseconds(1);
-	gfx_delay_milliseconds(1);
-	gfx_delay_milliseconds(1);
-	gfx_delay_milliseconds(1);
-	gfx_delay_milliseconds(1);
-	gfx_delay_milliseconds(1);
-
-	/* SET THE GX DISPLAY CONTROLLER PARAMETERS */
-
-	WRITE_REG32(DC_FB_ST_OFFSET, 0);
-	WRITE_REG32(DC_CB_ST_OFFSET, 0);
-	WRITE_REG32(DC_CURS_ST_OFFSET, 0);
-
-	/* SET LINE SIZE AND PITCH */
-	/* Flat panels use the current flat panel line size to    */
-	/* calculate the pitch, but load the true line size       */
-	/* for the mode into the "Frame Buffer Line Size" field   */
-	/* of DC_BUF_SIZE.                                        */
-
-	if (PanelEnable) 
-		size = ModeWidth;
-	else 
-		size = pMode->hactive;
-
-	if (bpp > 8) size <<= 1;
-
-	/* ONLY PYRAMID SUPPORTS 4K LINE SIZE */
-
-	if (size <= 1024)
-	{
-		pitch = 1024;
-
-		/* SPECIAL CASE  */
-		/* Graphics acceleration in 16-bit pixel line double modes */
-		/* requires a pitch of 2048.                               */
-
-		if ((pMode->flags & GFX_MODE_LINE_DOUBLE) && bpp > 8)
-			pitch <<= 1;
-	}
-	else
-	{
-		if (gfx_cpu_version == GFX_CPU_PYRAMID)
-			pitch = (size <= 2048) ? 2048 : 4096;
-		else 
-			pitch = 2048;
-	}
-	WRITE_REG32(DC_LINE_DELTA, pitch >> 2);
-
-	if (PanelEnable) 
-	{
-		size = pMode->hactive;
-		if (bpp > 8) 
-			size <<= 1;
-	}
-
-	/* SAVE PREVIOUSLY STORED VIDEO BUFFER SIZE */
-
-	vid_buf_size = READ_REG32(DC_BUF_SIZE) & 0x3FFF0000; 
-
-	/* ADD 2 TO SIZE FOR POSSIBLE START ADDRESS ALIGNMENTS */
-
-	WRITE_REG32(DC_BUF_SIZE, ((size >> 3) + 2) | vid_buf_size);
-
-	/* ALWAYS ENABLE "PANEL" DATA FROM MEDIAGX */
-    /* That is really just the 18 BPP data bus to the companion chip */
-
-	ocfg = DC_OCFG_PCKE | DC_OCFG_PDEL | DC_OCFG_PDEH;
-
-	/* SET PIXEL FORMAT */
-
-	if (bpp == 8) ocfg |= DC_OCFG_8BPP;
-	else if (bpp == 15) ocfg |= DC_OCFG_555;
-
-	/* ENABLE TIMING GENERATOR, SYNCS, AND FP DATA */
-
-	tcfg = DC_TCFG_FPPE | DC_TCFG_HSYE | DC_TCFG_VSYE | DC_TCFG_BLKE |
-		DC_TCFG_TGEN;
-
-	/* SET FIFO PRIORITY, DCLK MULTIPLIER, AND FIFO ENABLE */
-	/* Default 6/5 for FIFO, 2x for DCLK multiplier. */
-
-	gcfg = (6 << DC_GCFG_DFHPEL_POS) | (5 << DC_GCFG_DFHPSL_POS) | DC_GCFG_DFLE;
-
-	/* INCREASE FIFO PRIORITY FOR LARGE MODES */
-
-	if (pMode->hactive==1280 && pMode->vactive==1024) 
-	{
-		if ((bpp == 8) && (pMode->flags & GFX_MODE_85HZ))
-			gcfg = (8l << DC_GCFG_DFHPEL_POS) | (7l << DC_GCFG_DFHPSL_POS) | DC_GCFG_DFLE;
-		if ((bpp > 8)  && (pMode->flags & GFX_MODE_75HZ))
-			gcfg = (7l << DC_GCFG_DFHPEL_POS) | (6l << DC_GCFG_DFHPSL_POS) | DC_GCFG_DFLE;
-		if ((bpp > 8)  && (pMode->flags & GFX_MODE_85HZ))
-			gcfg = (9l << DC_GCFG_DFHPEL_POS) | (8l << DC_GCFG_DFHPSL_POS) | DC_GCFG_DFLE;
-	}
-
-	/* SET DOT CLOCK MULTIPLIER */
-	/* Bit 31 of frequency indicates divide frequency by two */
-
-	if (pMode->frequency & 0x80000000) gcfg |= (1l << DC_GCFG_DCLK_POS);
-	else gcfg |= (2l << DC_GCFG_DCLK_POS);
-
-	/* DIVIDE VIDEO CLOCK */
-	/* CPU core frequencies above 266 MHz will divide the video */
-	/* clock by 4 to ensure that we are running below 150 MHz.  */
-
-	if(gfx_cpu_frequency > 266) 
-		gcfg |= DC_GCFG_VCLK_DIV; 
-
-	/* SET THE PIXEL AND LINE DOUBLE BITS IF NECESSARY */
-
-	hactive = pMode->hactive;
-	vactive = pMode->vactive;
-	gfx_line_double  = 0;
-	gfx_pixel_double = 0;
-
-	if (pMode->flags & GFX_MODE_LINE_DOUBLE)
-	{
-		gcfg |= DC_GCFG_LDBL;
-		hactive <<= 1;
-		
-		/* SET GLOBAL FLAG */
-		
-		gfx_line_double = 1;
-	}
-
-	if (pMode->flags & GFX_MODE_PIXEL_DOUBLE)
-	{
-		tcfg |= DC_TCFG_PXDB;
-		vactive <<= 1;
-
-		/* SET GLOBAL FLAG */
-		
-		gfx_pixel_double = 1;
-	}
-
-	/* COMBINE AND SET TIMING VALUES */
-
-	if (!gfx_dont_program) {
-	value = (unsigned long) (hactive - 1) |
-		(((unsigned long) (pMode->htotal - 1)) << 16);
-	WRITE_REG32(DC_H_TIMING_1, value);
-	value = (unsigned long) (pMode->hblankstart - 1) |
-		(((unsigned long) (pMode->hblankend - 1)) << 16);
-	WRITE_REG32(DC_H_TIMING_2, value);
-	value = (unsigned long) (pMode->hsyncstart - 1) |
-		(((unsigned long) (pMode->hsyncend - 1)) << 16);
-	WRITE_REG32(DC_H_TIMING_3, value);
-	WRITE_REG32(DC_FP_H_TIMING, value);
-	value = (unsigned long) (vactive - 1) |
-		(((unsigned long) (pMode->vtotal - 1)) << 16);
-	WRITE_REG32(DC_V_TIMING_1, value);
-	value = (unsigned long) (pMode->vblankstart - 1) |
-		(((unsigned long) (pMode->vblankend - 1)) << 16);
-	WRITE_REG32(DC_V_TIMING_2, value);
-	value = (unsigned long) (pMode->vsyncstart - 1) |
-		(((unsigned long) (pMode->vsyncend - 1)) << 16);
-	WRITE_REG32(DC_V_TIMING_3, value);
-	value = (unsigned long) (pMode->vsyncstart - 2) |
-		(((unsigned long) (pMode->vsyncend - 2)) << 16);
-	WRITE_REG32(DC_FP_V_TIMING, value);
-	}
-
-	WRITE_REG32(DC_OUTPUT_CFG, ocfg);
-	WRITE_REG32(DC_TIMING_CFG, tcfg);
-	gfx_delay_milliseconds(1); /* delay after TIMING_CFG */ 
-	WRITE_REG32(DC_GENERAL_CFG, gcfg);
-
-	/* ENABLE FLAT PANEL CENTERING */
-	/* For 640x480 modes displayed with the 9211 within a 800x600 */
-	/* flat panel display, turn on flat panel centering.          */
-
-	if (PanelEnable) 
-	{
-		if (ModeWidth < PanelWidth) 
-		{
-		    tcfg = READ_REG32(DC_TIMING_CFG);
-			tcfg = tcfg | DC_TCFG_FCEN;
-			WRITE_REG32(DC_TIMING_CFG, tcfg);
-			gfx_delay_milliseconds(1); /* delay after TIMING_CFG */
-		}
-	}
-
-	/* CONFIGURE DISPLAY OUTPUT FROM VIDEO PROCESSOR */
-
-	gfx_set_display_control (((pMode->flags & GFX_MODE_NEG_HSYNC) ? 1 : 0) |
-		                     ((pMode->flags & GFX_MODE_NEG_VSYNC) ? 2 : 0));
-
-	/* RESTORE VALUE OF DC_UNLOCK */
-
-	WRITE_REG32(DC_UNLOCK, unlock);
-
-	/* ALSO WRITE GP_BLIT_STATUS FOR PITCH AND 8/18 BPP */
-	/* Remember, only Pyramid supports 4K line pitch    */
-
-	value = 0;
-	if (bpp > 8) value |= BC_16BPP;
-	if( (gfx_cpu_version == GFX_CPU_PYRAMID) && ( pitch > 2048 ))
-		value |= BC_FB_WIDTH_4096;
-	else if (pitch > 1024)
-		value |= BC_FB_WIDTH_2048;
-	WRITE_REG16(GP_BLIT_STATUS, (unsigned short) value);
-
-	return GFX_STATUS_OK;
-
-} /* end gfx_set_specified_mode() */
-
-/*----------------------------------------------------------------------------
- * GFX_IS_DISPLAY_MODE_SUPPORTED
- *
- * This routine sets the specified display mode.
- *
- * Returns the index of the mode if successful and mode returned, -1 if the mode 
- * could not be found.
- *----------------------------------------------------------------------------  
- */
-#if GFX_DISPLAY_DYNAMIC
-int gu1_is_display_mode_supported(int xres, int yres, int bpp, int hz)
-#else
-int gfx_is_display_mode_supported(int xres, int yres, int bpp, int hz)
-#endif
-{
-	int mode=0;
-	unsigned long hz_flag = 0, bpp_flag = 0;
-
-	/* SET FLAGS TO MATCH REFRESH RATE */
-
-	if (hz == 56) hz_flag = GFX_MODE_56HZ;
-	else if (hz == 60) hz_flag = GFX_MODE_60HZ;
-	else if (hz == 70) hz_flag = GFX_MODE_70HZ;
-	else if (hz == 72) hz_flag = GFX_MODE_72HZ;
-	else if (hz == 75) hz_flag = GFX_MODE_75HZ;
-	else if (hz == 85) hz_flag = GFX_MODE_85HZ;
-	else return -1;
-
-	/* SET BPP FLAGS TO LIMIT MODE SELECTION */
-
-	if (bpp == 8)  bpp_flag = GFX_MODE_8BPP;
-	else if (bpp == 15) bpp_flag = GFX_MODE_15BPP;
-	else if (bpp == 16) bpp_flag = GFX_MODE_16BPP;
-	else return -1;
-	
-	/* ONLY PYRAMID SUPPORTS 4K PITCH */
-
-	if (gfx_cpu_version != GFX_CPU_PYRAMID && xres > 1024)
-	{
-		if (bpp > 8) 
-			return (-1); /* return with mode not found */
-	}
-
-	/* LOOP THROUGH THE AVAILABLE MODES TO FIND A MATCH */
-
-	for (mode = 0; mode < NUM_GX_DISPLAY_MODES; mode++) {
-		if ((DisplayParams[mode].hactive == (unsigned short)xres) &&
-			(DisplayParams[mode].vactive == (unsigned short)yres) &&
-			(DisplayParams[mode].flags & hz_flag) &&
-			(DisplayParams[mode].flags & bpp_flag)) {
-
-			/* SET THE DISPLAY CONTROLLER FOR THE SELECTED MODE */
-
-			return(mode);
-			}
-		} 
-	return(-1);
-}
-
-/*----------------------------------------------------------------------------
- * GFX_SET_DISPLAY_MODE
- *
- * This routine sets the specified display mode.
- *
- * Returns 1 if successful, 0 if mode could not be set.
- *----------------------------------------------------------------------------  
- */
-#if GFX_DISPLAY_DYNAMIC
-int gu1_set_display_mode(int xres, int yres, int bpp, int hz)
-#else
-int gfx_set_display_mode(int xres, int yres, int bpp, int hz)
-#endif
-{
-	int mode;
-
-	/* DISABLE FLAT PANEL */
-	/* Flat Panel settings are enabled by the function gfx_set_fixed_timings */
-	/* and disabled by gfx_set_display_mode.                                 */
-
-	PanelEnable = 0;
-
-	mode = gfx_is_display_mode_supported(xres, yres, bpp, hz);
-	if(mode >= 0) {
-		if (gu1_set_specified_mode(&DisplayParams[mode], bpp) == GFX_STATUS_OK)
-			return(1);
-	}
-	return(0);
-} 
-
-/*----------------------------------------------------------------------------
- * GFX_SET_DISPLAY_TIMINGS
- *
- * This routine sets the display controller mode using the specified timing
- * values (as opposed to using the tables internal to Durango).
- *
- * Returns GFX_STATUS_OK on success, GFX_STATUS_ERROR otherwise.
- *----------------------------------------------------------------------------  
- */
-#if GFX_DISPLAY_DYNAMIC
-int gu1_set_display_timings(unsigned short bpp, unsigned short flags, 
-	unsigned short hactive, unsigned short hblankstart, 
-	unsigned short hsyncstart, unsigned short hsyncend,
-	unsigned short hblankend, unsigned short htotal,
-	unsigned short vactive, unsigned short vblankstart, 
-	unsigned short vsyncstart, unsigned short vsyncend,
-	unsigned short vblankend, unsigned short vtotal,
-	unsigned long frequency)
-#else
-int gfx_set_display_timings(unsigned short bpp, unsigned short flags, 
-	unsigned short hactive, unsigned short hblankstart, 
-	unsigned short hsyncstart, unsigned short hsyncend,
-	unsigned short hblankend, unsigned short htotal,
-	unsigned short vactive, unsigned short vblankstart, 
-	unsigned short vsyncstart, unsigned short vsyncend,
-	unsigned short vblankend, unsigned short vtotal,
-	unsigned long frequency)
-#endif
-{
-	/* SET MODE STRUCTURE WITH SPECIFIED VALUES */
-
-	gfx_display_mode.flags = 0;
-	if (flags & 1) gfx_display_mode.flags |= GFX_MODE_NEG_HSYNC;
-	if (flags & 2) gfx_display_mode.flags |= GFX_MODE_NEG_VSYNC;
-	if (flags & 0x1000) gfx_display_mode.flags |= GFX_MODE_LOCK_TIMING;
-	gfx_display_mode.hactive = hactive;
-	gfx_display_mode.hblankstart = hblankstart;
-	gfx_display_mode.hsyncstart = hsyncstart;
-	gfx_display_mode.hsyncend = hsyncend;
-	gfx_display_mode.hblankend = hblankend;
-	gfx_display_mode.htotal = htotal;
-	gfx_display_mode.vactive = vactive;
-	gfx_display_mode.vblankstart = vblankstart;
-	gfx_display_mode.vsyncstart = vsyncstart;
-	gfx_display_mode.vsyncend = vsyncend;
-	gfx_display_mode.vblankend = vblankend;
-	gfx_display_mode.vtotal = vtotal;
-	gfx_display_mode.frequency = frequency;
-
-	/* CALL ROUTINE TO SET MODE */
-
-	return (gu1_set_specified_mode(&gfx_display_mode, bpp));
-}
-
-/*----------------------------------------------------------------------------
- * GFX_SET_VTOTAL
- *
- * This routine sets the display controller vertical total to
- * "vtotal". As a side effect it also sets vertical blank end.
- * It should be used when only this value needs to be changed,
- * due to speed considerations.
- *
- * Note: it is the caller's responsibility to make sure that
- * a legal vtotal is used, i.e. that "vtotal" is greater than or
- * equal to vsync end.
- *
- * Always returns 0.
- *----------------------------------------------------------------------------  
- */
-#if GFX_DISPLAY_DYNAMIC
-int gu1_set_vtotal(unsigned short vtotal)
-#else
-int gfx_set_vtotal(unsigned short vtotal)
-#endif
-{
-	unsigned long unlock, tcfg, timing1, timing2;
-	
-	/* UNLOCK THE DISPLAY CONTROLLER REGISTERS */
-
-	unlock = READ_REG32(DC_UNLOCK);
-	WRITE_REG32(DC_UNLOCK, DC_UNLOCK_VALUE);
-
-	/* READ THE CURRENT GX VALUES */
-
-    tcfg = READ_REG32(DC_TIMING_CFG);
-	timing1 = READ_REG32(DC_V_TIMING_1);
-	timing2 = READ_REG32(DC_V_TIMING_2);
-	
-    /* DISABLE THE TIMING GENERATOR */
-					  
-    WRITE_REG32(DC_TIMING_CFG, tcfg &  ~(unsigned long)DC_TCFG_TGEN);
-    
-    /* WRITE NEW TIMING VALUES */
-    
-	WRITE_REG32(DC_V_TIMING_1, (timing1 & 0xffff) | (unsigned long)(vtotal - 1) << 16);
-    WRITE_REG32(DC_V_TIMING_2, (timing2 & 0xffff) | (unsigned long)(vtotal - 1) << 16);
-
-	/* RESTORE GX VALUES */
-
-	WRITE_REG32(DC_TIMING_CFG, tcfg);
-	WRITE_REG32(DC_UNLOCK, unlock);
-
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_display_pitch
- *
- * This routine sets the pitch of the frame buffer to the specified value.
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-void gu1_set_display_pitch(unsigned short pitch)
-#else
-void gfx_set_display_pitch(unsigned short pitch)
-#endif
-{
-	unsigned long value = 0;
-	unsigned long lock = READ_REG32(DC_UNLOCK);
-
-	value = READ_REG32(DC_LINE_DELTA) & 0xFFFFF000;
-	value |= (pitch >> 2);
-	WRITE_REG32(DC_UNLOCK, DC_UNLOCK_VALUE);
-	WRITE_REG32(DC_LINE_DELTA, value);
-	WRITE_REG32(DC_UNLOCK, lock);
-
-	/* ALSO UPDATE PITCH IN GRAPHICS ENGINE */
-	/* Pyramid alone supports 4K line pitch */
-
-	value = (unsigned long) READ_REG16(GP_BLIT_STATUS);
-	value &= ~(BC_FB_WIDTH_2048 | BC_FB_WIDTH_4096);
-
-	if((gfx_cpu_version == GFX_CPU_PYRAMID) && ( pitch > 2048 )) 	
-		value |= BC_FB_WIDTH_4096;
-
-	else if( pitch > 1024 ) 
-		value |= BC_FB_WIDTH_2048;
-
-	WRITE_REG16(GP_BLIT_STATUS, (unsigned short) value);	
-	return;
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_display_offset
- *
- * This routine sets the start address of the frame buffer.  It is 
- * typically used to pan across a virtual desktop (frame buffer larger than 
- * the displayed screen) or to flip the display between multiple buffers.
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-void gu1_set_display_offset(unsigned long offset)
-#else
-void gfx_set_display_offset(unsigned long offset)
-#endif
-{
-	/* UPDATE FRAME BUFFER OFFSET */
-
-	unsigned long lock;
-	lock = READ_REG32(DC_UNLOCK);
-	WRITE_REG32(DC_UNLOCK, DC_UNLOCK_VALUE);
-
-	/* START ADDRESS EFFECTS DISPLAY COMPRESSION */
-	/* Disable compression for non-zero start addresss values.            */
-	/* Enable compression if offset is zero and comression is intended to */
-	/* be enabled from a previous call to "gfx_set_compression_enable".   */
-	/* Compression should be disabled BEFORE the offset is changed        */
-	/* and enabled AFTER the offset is changed.                           */
-	
-	if (offset == 0)
-	{
-		WRITE_REG32(DC_FB_ST_OFFSET, offset);
-		if (gfx_compression_enabled)
-		{
-			/* WAIT FOR THE OFFSET TO BE LATCHED */
-			gfx_wait_vertical_blank ();
-			gu1_enable_compression();
-		}
-	}
-	else
-	{
-		/* ONLY DISABLE COMPRESSION ONCE */
-
-		if (gfx_compression_active)
-			gu1_disable_compression();
-
-		WRITE_REG32(DC_FB_ST_OFFSET, offset);
-	}
-
-	WRITE_REG32(DC_UNLOCK, lock);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_display_palette_entry
- *
- * This routine sets an palette entry in the display controller.
- * A 32-bit X:R:G:B value.
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-int gu1_set_display_palette_entry(unsigned long index, unsigned long palette)
-#else
-int gfx_set_display_palette_entry(unsigned long index, unsigned long palette)
-#endif
-{
-	unsigned long data;
-
-	if (index > 0xFF)
-		return GFX_STATUS_BAD_PARAMETER;
-
-	WRITE_REG32(DC_PAL_ADDRESS, index);
-	data = ((palette >> 2) & 0x0003F) | 
-	   	   ((palette >> 4) & 0x00FC0) |
-		   ((palette >> 6) & 0x3F000);
-	WRITE_REG32(DC_PAL_DATA, data);
-
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_display_palette
- *
- * This routine sets the entire palette in the display controller.
- * A pointer is provided to a 256 entry table of 32-bit X:R:G:B values.
- * Restriction:
- * Due to SC1200 Issue #748 (in Notes DB) this function should be called only
- * when DCLK is active, i.e PLL is already powered up and genlock is not active.
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-int gu1_set_display_palette(unsigned long *palette)
-#else
-int gfx_set_display_palette(unsigned long *palette)
-#endif
-{
-	unsigned long data, i;
-	WRITE_REG32(DC_PAL_ADDRESS, 0);
-	if (palette)
-	{
-		for (i = 0; i < 256; i++)
-		{
-			/* CONVERT 24 BPP COLOR DATA TO 18 BPP COLOR DATA */
-
-			data = ((palette[i] >> 2) & 0x0003F) | 
-				((palette[i] >> 4) & 0x00FC0) |
-				((palette[i] >> 6) & 0x3F000);
-			WRITE_REG32(DC_PAL_DATA, data);
-		}
-	}
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_cursor_enable
- *
- * This routine enables or disables the hardware cursor.  
- *
- * WARNING: The cusrsor start offset must be set by setting the cursor 
- * position before calling this routine to assure that memory reads do not
- * go past the end of graphics memory (this can hang GXm).
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-void gu1_set_cursor_enable(int enable)
-#else
-void gfx_set_cursor_enable(int enable)
-#endif
-{
-	unsigned long unlock, gcfg;
-	
-	/* SET OR CLEAR CURSOR ENABLE BIT */
-
-	unlock = READ_REG32(DC_UNLOCK);
-	gcfg = READ_REG32(DC_GENERAL_CFG);
-	if (enable) gcfg |= DC_GCFG_CURE;
-	else gcfg &= ~(DC_GCFG_CURE);
-
-	/* WRITE NEW REGISTER VALUE */
-
-	WRITE_REG32(DC_UNLOCK, DC_UNLOCK_VALUE);
-	WRITE_REG32(DC_GENERAL_CFG, gcfg);
-	WRITE_REG32(DC_UNLOCK, unlock);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_cursor_colors
- *
- * This routine sets the colors of the hardware cursor.
- * Restriction:
- * Due to SC1200 Issue #748 (in Notes DB) this function should be called only
- * when DCLK is active, i.e PLL is already powered up.
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-void gu1_set_cursor_colors(unsigned long bkcolor, unsigned long fgcolor)
-#else
-void gfx_set_cursor_colors(unsigned long bkcolor, unsigned long fgcolor)
-#endif
-{
-	unsigned long value;
-	
-	/* If genlock is enabled DCLK might be disabled in vertical blank. */
-	/* Due to SC1200 Issue #748 in Notes DB this would fail the cursor color settings */
-	/* So Wait for vertical blank to end */
-
-#if GFX_VIDEO_SC1200
-	if (gfx_test_timing_active())
-		while ((gfx_get_vline()) > gfx_get_vactive());
-#endif
-
-	/* SET CURSOR COLORS */
-
-	WRITE_REG32(DC_PAL_ADDRESS, 0x100);
-	value = ((bkcolor & 0x000000FC) >> 2) |
-		((bkcolor & 0x0000FC00) >> (2+8-6)) |
-		((bkcolor & 0x00FC0000) >> (2+16-12));
-	WRITE_REG32(DC_PAL_DATA, value);
-	value = ((fgcolor & 0x000000FC) >> 2) |
-		((fgcolor & 0x0000FC00) >> (2+8-6)) |
-		((fgcolor & 0x00FC0000) >> (2+16-12));
-	WRITE_REG32(DC_PAL_DATA, value);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_cursor_position
- *
- * This routine sets the position of the hardware cusror.  The starting
- * offset of the cursor buffer must be specified so that the routine can 
- * properly clip scanlines if the cursor is off the top of the screen.
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-void gu1_set_cursor_position(unsigned long memoffset, 
-	unsigned short xpos, unsigned short ypos, 
-	unsigned short xhotspot, unsigned short yhotspot)
-#else
-void gfx_set_cursor_position(unsigned long memoffset, 
-	unsigned short xpos, unsigned short ypos, 
-	unsigned short xhotspot, unsigned short yhotspot)
-#endif
-{
-	unsigned long unlock;
-
-	short x, y;
-	short xoffset = 0;
-	short yoffset = 0;
-
-	/* SUPPORT CURSOR IN EMULATED VGA MODES */
-	/* Timings are for twice the resolution */
-
-	if (gfx_pixel_double)
-		xpos <<= 1;
-	if (gfx_line_double)
-		ypos <<= 1;
-
-	x = (short) xpos - (short) xhotspot;
-	y = (short) ypos - (short) yhotspot;
-	if (x < -31) return;
-	if (y < -31) return;
-	if (x < 0) { xoffset = -x; x = 0; }
-	if (y < 0) { yoffset = -y; y = 0; }
-	memoffset += (unsigned long) yoffset << 3;
-
-	if (PanelEnable) {
-		if (( ModeWidth > PanelWidth) || (ModeHeight > PanelHeight)) { 
-			gfx_enable_panning (xpos, ypos);
-			x = x - (short)panelLeft;
-			y = y - (short)panelTop;
-		}
-	}
-
-	/* SET CURSOR POSITION */
-
-	unlock = READ_REG32(DC_UNLOCK);
-	WRITE_REG32(DC_UNLOCK, DC_UNLOCK_VALUE);
-	WRITE_REG32(DC_CURS_ST_OFFSET, memoffset);
-	WRITE_REG32(DC_CURSOR_X, (unsigned long) x |
-		(((unsigned long) xoffset) << 11));
-	WRITE_REG32(DC_CURSOR_Y, (unsigned long) y | 
-		(((unsigned long) yoffset) << 11));
-	WRITE_REG32(DC_UNLOCK, unlock);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_cursor_shape32
- *
- * This routine loads 32x32 cursor data into the specified location in 
- * graphics memory.
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-void gu1_set_cursor_shape32(unsigned long memoffset, 
-	unsigned long *andmask, unsigned long *xormask)
-#else
-void gfx_set_cursor_shape32(unsigned long memoffset, 
-	unsigned long *andmask, unsigned long *xormask)
-#endif
-{
-	int i;
-	unsigned long value;
-	for (i = 0; i < 32; i++)
-	{
-		/* CONVERT TO 16 BITS AND MASK, 16 BITS XOR MASK PER DWORD */
-
-		value = (andmask[i] & 0xFFFF0000) | (xormask[i] >> 16);
-		WRITE_FB32(memoffset, value);
-		memoffset += 4;
-		value = (andmask[i] << 16) | (xormask[i] & 0x0000FFFF);
-		WRITE_FB32(memoffset, value);
-		memoffset += 4;
-	}
-}
-
-/*---------------------------------------------------------------------------
- * gu1_enable_compression
- *
- * This is a private routine to this module (not exposed in the Durango API).
- * It enables display compression.
- *---------------------------------------------------------------------------
- */
-void gu1_enable_compression(void)
-{
-	int i;
-	unsigned long unlock, gcfg, offset;
-
-	/* DO NOT ENABLE IF START ADDRESS IS NOT ZERO */
-
-	offset = READ_REG32(DC_FB_ST_OFFSET) & 0x003FFFFF;
-	if (offset != 0) return;
-
-	/* DO NOT ENABLE IF WE ARE WITHIN AN EMULATED VGA MODE */
-
-	if (gfx_line_double || gfx_pixel_double)
-		return;
-
-	/* SET GLOBAL INDICATOR */
-
-	gfx_compression_active = 1;
-
-	/* CLEAR DIRTY/VALID BITS IN MEMORY CONTROLLER */
-	/* Software is required to do this before enabling compression. */
-	/* Don't want controller to think that old lines are still valid. */
-
-	for (i = 0; i < 1024; i++)
-	{
-		WRITE_REG32(MC_DR_ADD, i);
-		WRITE_REG32(MC_DR_ACC, 0);
-	}
-
-	/* TURN ON COMPRESSION CONTROL BITS */
-
-	unlock = READ_REG32(DC_UNLOCK);
-	gcfg = READ_REG32(DC_GENERAL_CFG);
-	gcfg |= DC_GCFG_CMPE | DC_GCFG_DECE;
-	WRITE_REG32(DC_UNLOCK, DC_UNLOCK_VALUE);
-	WRITE_REG32(DC_GENERAL_CFG, gcfg);
-	WRITE_REG32(DC_UNLOCK, unlock);
-}
-
-/*---------------------------------------------------------------------------
- * gu1_disable_compression
- *
- * This is a private routine to this module (not exposed in the Durango API).
- * It disables display compression.
- *---------------------------------------------------------------------------
- */
-void gu1_disable_compression(void)
-{
-	unsigned long unlock, gcfg;
-
-	/* SET GLOBAL INDICATOR */
-
-	gfx_compression_active = 0;
-
-	/* TURN OFF COMPRESSION CONTROL BITS */
-
-	unlock = READ_REG32(DC_UNLOCK);
-	gcfg = READ_REG32(DC_GENERAL_CFG);
-	gcfg &= ~(DC_GCFG_CMPE | DC_GCFG_DECE);
-	WRITE_REG32(DC_UNLOCK, DC_UNLOCK_VALUE);
-	WRITE_REG32(DC_GENERAL_CFG, gcfg);
-	WRITE_REG32(DC_UNLOCK, unlock);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_compression_enable
- *
- * This routine enables or disables display compression.
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-int gu1_set_compression_enable(int enable)
-#else
-int gfx_set_compression_enable(int enable)
-#endif
-{
-	/* SET GLOBAL VARIABLE FOR INTENDED STATE */
-	/* Compression can only be enabled for non-zero start address values. */
-	/* Keep state to enable compression on start address changes. */
-
-	gfx_compression_enabled = enable;
-	if (enable) gu1_enable_compression();
-	else gu1_disable_compression();
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_compression_offset
- *
- * This routine sets the base offset for the compression buffer.
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-int gu1_set_compression_offset(unsigned long offset)
-#else
-int gfx_set_compression_offset(unsigned long offset)
-#endif
-{
-	unsigned long lock;
-	
-	/* MUST BE 16-BYTE ALIGNED FOR GXLV */
-
-	if (offset & 0x0F) return(1);
-
-	/* SET REGISTER VALUE */
-
-	lock = READ_REG32(DC_UNLOCK);
-	WRITE_REG32(DC_UNLOCK, DC_UNLOCK_VALUE);
-	WRITE_REG32(DC_CB_ST_OFFSET, offset);
-	WRITE_REG32(DC_UNLOCK, lock);
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_compression_pitch
- *
- * This routine sets the pitch, in bytes, of the compression buffer. 
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-int gu1_set_compression_pitch(unsigned short pitch)
-#else
-int gfx_set_compression_pitch(unsigned short pitch)
-#endif
-{
-	unsigned long lock, line_delta;
-	
-	/* SET REGISTER VALUE */
-
-	lock = READ_REG32(DC_UNLOCK);
-	line_delta = READ_REG32(DC_LINE_DELTA) & 0xFF800FFF;
-	line_delta |= ((unsigned long)pitch << 10l) & 0x007FF000;
-	WRITE_REG32(DC_UNLOCK, DC_UNLOCK_VALUE);
-	WRITE_REG32(DC_LINE_DELTA, line_delta);
-	WRITE_REG32(DC_UNLOCK, lock);
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_compression_size
- *
- * This routine sets the line size of the compression buffer, which is the
- * maximum number of bytes allowed to store a compressed line.
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-int gu1_set_compression_size(unsigned short size)
-#else
-int gfx_set_compression_size(unsigned short size)
-#endif
-{
-	unsigned long lock, buf_size;
-
-	/* SUBTRACT 16 FROM SIZE                          */
-	/* The display controller will actually write     */
-	/* 2 extra QWords.  So, if we assume that "size"  */
-	/* refers to the allocated size, we must subtract */
-	/* 16 bytes.                                      */
-
-	size -= 16;
-	
-	/* SET REGISTER VALUE */
-
-	lock = READ_REG32(DC_UNLOCK);
-	buf_size = READ_REG32(DC_BUF_SIZE) & 0xFFFF01FF;
-	buf_size |= (((size >> 2) + 1) & 0x7F) << 9;
-	WRITE_REG32(DC_UNLOCK, DC_UNLOCK_VALUE);
-	WRITE_REG32(DC_BUF_SIZE, buf_size);
-	WRITE_REG32(DC_UNLOCK, lock);
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_display_video_enable (PRIVATE ROUTINE - NOT PART OF API)
- *
- * This routine enables/disables video on GX.
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-void gu1_set_display_video_enable(int enable)
-#else
-void gfx_set_display_video_enable(int enable)
-#endif
-{
-	unsigned long lock, gcfg, buf_size;
-	lock     = READ_REG32 (DC_UNLOCK);
-	gcfg     = READ_REG32 (DC_GENERAL_CFG);
-	buf_size = READ_REG32 (DC_BUF_SIZE);
-
-	WRITE_REG32(DC_UNLOCK, DC_UNLOCK_VALUE);
-
-	vid_enabled = enable;
-
-	/* SET THE BUFFER SIZE TO A NON-ZERO VALUE ONLY WHEN */
-	/* ENABLING VIDEO                                    */
-
-	if (enable)
-	{
-		gcfg |= (DC_GCFG_VIDE | DC_GCFG_VRDY);
-		WRITE_REG32 (DC_GENERAL_CFG, gcfg);
-
-		WRITE_REG32 (DC_BUF_SIZE, (buf_size & 0x0000FFFFl) | vid_buf_size);
-	}
-
-	/* CLEAR THE VIDEO BUFFER SIZE WHEN DISABLING VIDEO  */
-
-	else
-	{
-		gcfg &= ~(DC_GCFG_VIDE);
-		WRITE_REG32 (DC_GENERAL_CFG, gcfg);
-	
-		vid_buf_size = buf_size & 0xFFFF0000l;
-		WRITE_REG32 (DC_BUF_SIZE, buf_size & 0x0000FFFFl);
-	}
-
-	WRITE_REG32(DC_UNLOCK, lock);
-	return;
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_display_video_size (PRIVATE ROUTINE - NOT PART OF API)
- *
- * This routine is called by "gfx_set_video_size".  It abstracts the 
- * version of the display controller from the video overlay routines.
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-void gu1_set_display_video_size(unsigned short width, unsigned short height)
-#else
-void gfx_set_display_video_size(unsigned short width, unsigned short height)
-#endif
-{
-	unsigned long lock, size, value;
-	size = (unsigned long) (width << 1) * (unsigned long) height;
-
-	/* STORE THE VIDEO BUFFER SIZE AS A GLOBAL */
-	
-	vid_buf_size = ((size + 63) >> 6) << 16;
-
-	/* DO NOT SET THE VIDEO SIZE IF VIDEO IS DISABLED */
-
-	if (!vid_enabled)
-		return;
-
-	lock = READ_REG32(DC_UNLOCK);
-	WRITE_REG32(DC_UNLOCK, DC_UNLOCK_VALUE);
-	value = READ_REG32(DC_BUF_SIZE) & 0x0000FFFF;
-	value |= vid_buf_size;
-	WRITE_REG32(DC_BUF_SIZE, value);
-	WRITE_REG32(DC_UNLOCK, lock);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_display_video_offset (PRIVATE ROUTINE - NOT PART OF API)
- *
- * This routine is called by "gfx_set_video_offset".  It abstracts the 
- * version of the display controller from the video overlay routines.
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-void gu1_set_display_video_offset(unsigned long offset)
-#else
-void gfx_set_display_video_offset(unsigned long offset)
-#endif
-{
-	unsigned long lock;
-	lock = READ_REG32(DC_UNLOCK);
-	WRITE_REG32(DC_UNLOCK, DC_UNLOCK_VALUE);
-	offset &= 0x003FFFFF;
-	WRITE_REG32(DC_VID_ST_OFFSET, offset);
-	WRITE_REG32(DC_UNLOCK, lock);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_display_priority_high
- *
- * This routine controls the x-bus round robin arbitration mechanism.
- * When enable is TRUE, graphics pipeline requests and non-critical display
- * controller requests are arbitrated at the same priority as processor
- * requests. When FALSE processor requests are arbitrated at a higher priority.
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-void gu1_set_display_priority_high(int enable)
-#else
-void gfx_set_display_priority_high(int enable)
-#endif
-{
-	unsigned long lock, control;
-	lock = READ_REG32(DC_UNLOCK);
-	control = READ_REG32(MC_MEM_CNTRL1);
-	WRITE_REG32(DC_UNLOCK, DC_UNLOCK_VALUE);
-	if (enable)
-		control |= MC_XBUSARB;
-	else control &= ~(MC_XBUSARB);
-	WRITE_REG32(MC_MEM_CNTRL1, control);
-	WRITE_REG32(DC_UNLOCK, lock);
-	return;
-}
-
-/*---------------------------------------------------------------------------
- * gfx_test_timing_active
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-int gu1_test_timing_active(void)
-#else
-int gfx_test_timing_active(void)
-#endif
-{
-	if (READ_REG32(DC_TIMING_CFG) & DC_TCFG_TGEN)
-		return(1);
-	else return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_test_vertical_active
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-int gu1_test_vertical_active(void)
-#else
-int gfx_test_vertical_active(void)
-#endif
-{
-	if (READ_REG32(DC_TIMING_CFG) & DC_TCFG_VNA)
-		return(0);
-	else return(1);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_wait_vertical_blank
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-int gu1_wait_vertical_blank(void)
-#else
-int gfx_wait_vertical_blank(void)
-#endif
-{
-	if (gfx_test_timing_active())
-	{
-		while(!gfx_test_vertical_active());
-		while(gfx_test_vertical_active());
-	}
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_enable_panning 
- *
- * This routine  enables the panning when the Mode is bigger than the panel
- * size.
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-void gu1_enable_panning(int x, int y)
-#else
-void gfx_enable_panning(int x, int y)
-#endif
-{
-    unsigned long modeBytesPerPixel;
-    unsigned long modeBytesPerScanline = 0;
-    unsigned long startAddress = 0;
-        
-    modeBytesPerPixel    =   (gbpp + 7)/8;
-	modeBytesPerScanline = (((ModeWidth + 1023) / 1024) * 1024) * modeBytesPerPixel;
-
-	/* TEST FOR NO-WORK */
-
-	if (x >= DeltaX && (unsigned short)x < (PanelWidth  + DeltaX) && 
-		y >= DeltaY && (unsigned short)y < (PanelHeight + DeltaY))
-		return;
-
-
-	/* ADJUST PANNING VARIABLES WHEN CURSOR EXCEEDS BOUNDARY       */
-	/* Test the boundary conditions for each coordinate and update */
-	/* all variables and the starting offset accordingly.          */
-	
-	if (x < DeltaX)
-		DeltaX = x;
-
-	else if ((unsigned short)x >= (DeltaX + PanelWidth))
-		DeltaX = x - PanelWidth + 1;
-
-	if (y < DeltaY)
-		DeltaY = y;
-
-	else if ((unsigned short)y >= (DeltaY + PanelHeight))
-		DeltaY = y - PanelHeight + 1; 
-
-
-	/* CALCULATE THE START OFFSET */
-
-	startAddress = (DeltaX * modeBytesPerPixel) + (DeltaY * modeBytesPerScanline);
-	
-	gfx_set_display_offset(startAddress);
-
-
-	/* SET PANEL COORDINATES                    */
-	/* Panel's x position must be DWORD aligned */
-
-    panelTop  = DeltaY;
-	panelLeft = DeltaX * modeBytesPerPixel;
-
-	if (panelLeft & 3)
-		panelLeft = (panelLeft & 0xFFFFFFFC) + 4;
-
-	panelLeft /= modeBytesPerPixel;
-
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_fixed_timings
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-int gu1_set_fixed_timings(int panelResX, int panelResY, unsigned short width, unsigned short height, unsigned short bpp)
-#else
-int gfx_set_fixed_timings(int panelResX, int panelResY, unsigned short width, unsigned short height, unsigned short bpp)
-#endif
-{
-	int mode;
-
-	ModeWidth = width;
-	ModeHeight = height;
-	PanelWidth  = (unsigned short)panelResX;
-	PanelHeight = (unsigned short)panelResY;
-	PanelEnable = 1;
-		
-	/* LOOP THROUGH THE AVAILABLE MODES TO FIND A MATCH */
-	for (mode = 0; mode < NUM_FIXED_TIMINGS_MODES; mode++) {
-		if ((FixedParams[mode].xres == width) &&
-			(FixedParams[mode].yres == height) &&
-			(FixedParams[mode].panelresx == panelResX) &&
-			(FixedParams[mode].panelresy == panelResY)) {
-
-			/* SET THE 92xx FOR THE SELECTED MODE */
-			FIXEDTIMINGS *fmode = &FixedParams[mode];
-
-			gfx_set_display_timings(bpp, 3, fmode->hactive,fmode->hblankstart, fmode->hsyncstart, fmode->hsyncend,
-				fmode->hblankend, fmode->htotal, fmode->vactive, fmode->vblankstart, 
-				fmode->vsyncstart,	fmode->vsyncend, fmode->vblankend, fmode->vtotal, fmode->frequency);  										
-	
-			return(1);
-			} /* end if() */
-		} /* end for() */
-
-	return(-1);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_panel_present
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-int gu1_set_panel_present(int panelResX, int panelResY, unsigned short width, unsigned short height, unsigned short bpp)
-#else
-int gfx_set_panel_present(int panelResX, int panelResY, unsigned short width, unsigned short height, unsigned short bpp)
-#endif
-{
-	/* SET VALID BPP         */
-	/* 16BPP is the default. */
-
-	if (bpp != 8 && bpp != 15 && bpp != 16)
-		bpp = 16;
-
-	/* RECORD PANEL PARAMETERS */
-	/* This routine does not touch any panel timings.  It is used when custom panel */
-	/* settings are set up in advance by the BIOS or an application, but the        */
-	/* application still requires access to other panel functionality provided by   */
-	/* Durango (i.e. panning).                                                      */
-
-	ModeWidth   = width;
-	ModeHeight  = height;
-	PanelWidth  = (unsigned short)panelResX;
-	PanelHeight = (unsigned short)panelResY;
-	PanelEnable = 1;
-	gbpp        = bpp;
-
-	/* PROGRAM THE BPP IN THE DISPLAY CONTROLLER */
-
-	gfx_set_display_bpp (bpp);
-
-	return(GFX_STATUS_OK);
-}
-
-/*-----------------------------------------------------------------------*
- * THE FOLLOWING READ ROUTINES ARE ALWAYS INCLUDED:                      *                      
- * gfx_get_hsync_end, gfx_get_htotal, gfx_get_vsync_end, gfx_get_vtotal  *
- * are used by the video overlay routines.                               *
- *                                                                       *
- * gfx_get_vline and gfx_vactive are used to prevent an issue for the    *
- * SC1200.                                                               *
- *                                                                       *
- * The others are part of the Durango API.                               *
- *-----------------------------------------------------------------------*/
-
-/*---------------------------------------------------------------------------
- * gfx_get_display_pitch
- *
- * This routine returns the current pitch of the frame buffer, in bytes.
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-unsigned short gu1_get_display_pitch(void)
-#else
-unsigned short gfx_get_display_pitch(void)
-#endif
-{
-	unsigned long value;
-	if (gfx_cpu_version == GFX_CPU_PYRAMID) {/* Pyramid update for 4KB line pitch */
-		value = (READ_REG32(DC_LINE_DELTA) & 0x07FF) << 2;
-	} else {
-		value = (READ_REG32(DC_LINE_DELTA) & 0x03FF) << 2;
-	}
-
-	return((unsigned short) value);
-}
-
-/*----------------------------------------------------------------------------
- * GFX_GET_DISPLAY_DETAILS
- *
- * This routine gets the specified display mode.
- *
- * Returns 1 if successful, 0 if mode could not be get.
- *----------------------------------------------------------------------------  
- */
-#if GFX_DISPLAY_DYNAMIC
-int gu1_get_display_details(unsigned int mode, int *xres, int *yres, int *hz)
-#else
-int gfx_get_display_details(unsigned int mode, int *xres, int *yres, int *hz)
-#endif
-{
-	if(mode < NUM_GX_DISPLAY_MODES){
-		if(DisplayParams[mode].flags & GFX_MODE_56HZ)
-			*hz = 56;
-		else if(DisplayParams[mode].flags & GFX_MODE_60HZ)
-			*hz = 60;
-		else if(DisplayParams[mode].flags & GFX_MODE_70HZ)
-			*hz = 70;
-		else if(DisplayParams[mode].flags & GFX_MODE_72HZ)
-			*hz = 72;
-		else if(DisplayParams[mode].flags & GFX_MODE_75HZ)
-			*hz = 75;
-		else if(DisplayParams[mode].flags & GFX_MODE_85HZ)
-			*hz = 85;
-
-		*xres = DisplayParams[mode].hactive;
-		*yres = DisplayParams[mode].vactive;
-
-		return(1);
-	}
-	return(0);
-}
-
-/*----------------------------------------------------------------------------
- * GFX_GET_DISPLAY_MODE_COUNT
- *
- * Returns number of modes supported.
- *----------------------------------------------------------------------------  
- */
-#if GFX_DISPLAY_DYNAMIC
-int gu1_get_display_mode_count(void)
-#else
-int gfx_get_display_mode_count(void)
-#endif
-{
-	return(NUM_GX_DISPLAY_MODES);
-}
-
-/*----------------------------------------------------------------------------
- * gfx_get_frame_buffer_line_size
- *
- * Returns the current frame buffer line size, in bytes
- *----------------------------------------------------------------------------  
- */
-#if GFX_DISPLAY_DYNAMIC
-unsigned long gu1_get_frame_buffer_line_size(void)
-#else
-unsigned long gfx_get_frame_buffer_line_size(void)
-#endif
-{
-	return ((READ_REG32 (DC_BUF_SIZE) & 0x1FF) << 3);
-}
-
-/*----------------------------------------------------------------------------
- * gfx_mode_frequency_supported
- *
- * This routine examines if the requested mode with pixel frequency is supported.
- *
- * Returns >0 if successful , <0 if freq. could not be found and matched.
- *----------------------------------------------------------------------------  
- */
-#if GFX_DISPLAY_DYNAMIC
-int gu1_mode_frequency_supported(int xres, int yres, int bpp, unsigned long frequency)
-#else
-int gfx_mode_frequency_supported(int xres, int yres, int bpp, unsigned long frequency)
-#endif
-{
-	int index;
-	unsigned long value;
-	unsigned long bpp_flag = 0;
-
-	bpp_flag = GFX_MODE_8BPP;
-	if (bpp > 8) bpp_flag = GFX_MODE_16BPP;
-
-	for (index = 0; index < NUM_GX_DISPLAY_MODES; index++)
-	{
-		if ((DisplayParams[index].hactive == (unsigned short)xres) &&
-			(DisplayParams[index].vactive == (unsigned short)yres) &&
-			(DisplayParams[index].flags & bpp_flag) &&
-			(DisplayParams[index].frequency == frequency))
-		{
-			int hz=0;
-			value = DisplayParams[index].flags;
-
-			if (value & GFX_MODE_60HZ) hz = 60;
-			else if (value & GFX_MODE_70HZ) hz = 70;
-			else if (value & GFX_MODE_72HZ) hz = 72;
-			else if (value & GFX_MODE_75HZ) hz = 75;
-			else if (value & GFX_MODE_85HZ) hz = 85;
-			return(hz);
-		}
-	}
-	return(-1);
-}
-
-/*----------------------------------------------------------------------------
- * gfx_refreshrate_from_frequency
- *
- * This routine maps the frequency to close match refresh rate
- *
- * Returns .
- *----------------------------------------------------------------------------  
- */
-#if GFX_DISPLAY_DYNAMIC
-int gu1_get_refreshrate_from_frequency(int xres, int yres, int bpp, int *hz, unsigned long frequency)
-#else
-int gfx_get_refreshrate_from_frequency(int xres, int yres, int bpp, int *hz, unsigned long frequency)
-#endif
-{
-	int index, closematch=0;
-	unsigned long value;
-	unsigned long bpp_flag = 0;
-	long min, diff;
-	
-	*hz = 60;
-
-	bpp_flag = GFX_MODE_8BPP;
-	if (bpp > 8) bpp_flag = GFX_MODE_16BPP;
-
-	/* FIND THE REGISTER VALUES FOR THE DESIRED FREQUENCY */
-	/* Search the table for the closest frequency (16.16 format). */
-
-	min = 0x7fffffff;
-	for (index = 0; index < NUM_GX_DISPLAY_MODES; index++)
-	{
-		if ((DisplayParams[index].htotal == (unsigned short)xres) &&
-			(DisplayParams[index].vtotal == (unsigned short)yres) &&
-			(DisplayParams[index].flags & bpp_flag)) 
-		{
-			diff = (long)frequency - (long)DisplayParams[index].frequency;
-			if(diff < 0) diff = -diff;
-			
-			if (diff < min)
-			{
-				min = diff; 
-				closematch = index;
-			} 
-		}
-	}
-	
-	value = DisplayParams[closematch].flags;
-
-	if (value & GFX_MODE_60HZ) *hz = 60;
-	else if (value & GFX_MODE_70HZ) *hz = 70;
-	else if (value & GFX_MODE_72HZ) *hz = 72;
-	else if (value & GFX_MODE_75HZ) *hz = 75;
-	else if (value & GFX_MODE_85HZ) *hz = 85;
-
-	return(1);
-}
-
-/*----------------------------------------------------------------------------
- * gfx_refreshrate_from_mode
- *
- * This routine is identical to the gfx_get_refreshrate_from_frequency,
- * except that the active timing values are compared instead of the total
- * values.  Some modes (such as 70Hz and 72Hz) may be confused in this routine.
- *
- * Returns .
- *----------------------------------------------------------------------------  
- */
-#if GFX_DISPLAY_DYNAMIC
-int gu1_get_refreshrate_from_mode(int xres, int yres, int bpp, int *hz, unsigned long frequency)
-#else
-int gfx_get_refreshrate_from_mode(int xres, int yres, int bpp, int *hz, unsigned long frequency)
-#endif
-{
-	int index, closematch=0;
-	unsigned long value;
-	unsigned long bpp_flag = 0;
-	long min, diff;
-	
-	*hz = 60;
-
-	bpp_flag = GFX_MODE_8BPP;
-	if (bpp > 8) bpp_flag = GFX_MODE_16BPP;
-
-	/* FIND THE REGISTER VALUES FOR THE DESIRED FREQUENCY */
-	/* Search the table for the closest frequency (16.16 format). */
-
-	min = 0x7fffffff;
-	for (index = 0; index < NUM_GX_DISPLAY_MODES; index++)
-	{
-		if ((DisplayParams[index].hactive == (unsigned short)xres) &&
-			(DisplayParams[index].vactive == (unsigned short)yres) &&
-			(DisplayParams[index].flags & bpp_flag)) 
-		{
-			diff = (long)frequency - (long)DisplayParams[index].frequency;
-			if(diff < 0) diff = -diff;
-			
-			if (diff < min)
-			{
-				min = diff; 
-				closematch = index;
-			} 
-		}
-	}
-	
-	value = DisplayParams[closematch].flags;
-
-	if (value & GFX_MODE_60HZ) *hz = 60;
-	else if (value & GFX_MODE_70HZ) *hz = 70;
-	else if (value & GFX_MODE_72HZ) *hz = 72;
-	else if (value & GFX_MODE_75HZ) *hz = 75;
-	else if (value & GFX_MODE_85HZ) *hz = 85;
-
-	return(1);
-}
-
-/*----------------------------------------------------------------------------
- * gfx_get_frequency_from_refreshrate
- *
- * This routine maps the refresh rate to the closest matching PLL frequency.
- *----------------------------------------------------------------------------  
- */
-#if GFX_DISPLAY_DYNAMIC
-int gu1_get_frequency_from_refreshrate(int xres, int yres, int bpp, int hz, int *frequency)
-#else
-int gfx_get_frequency_from_refreshrate(int xres, int yres, int bpp, int hz, int *frequency)
-#endif
-{
-	int index, retval = -1;
-	unsigned long hz_flag  = 0;
-	unsigned long bpp_flag = 0;
-	
-	*frequency = 0;
-
-	if      (hz == 60) hz_flag = GFX_MODE_60HZ;
-	else if (hz == 70) hz_flag = GFX_MODE_70HZ;
-	else if (hz == 72) hz_flag = GFX_MODE_72HZ;
-	else if (hz == 75) hz_flag = GFX_MODE_75HZ;
-	else if (hz == 85) hz_flag = GFX_MODE_85HZ;
-
-	bpp_flag = GFX_MODE_8BPP;
-	if (bpp > 8) bpp_flag = GFX_MODE_16BPP;
-
-	/* FIND THE REGISTER VALUES FOR THE DESIRED FREQUENCY */
-
-	for (index = 0; index < NUM_GX_DISPLAY_MODES; index++)
-	{
-		if ((DisplayParams[index].hactive == (unsigned short)xres) &&
-			(DisplayParams[index].vactive == (unsigned short)yres) &&
-			(DisplayParams[index].flags & bpp_flag)  &&
-			(DisplayParams[index].flags & hz_flag)) 
-		{
-			*frequency = DisplayParams[index].frequency;
-			retval = 1;
-		}
-	}	
-	return retval;
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_max_supported_pixel_clock
- *
- * This routine returns the maximum recommended speed for the pixel clock.  The 
- * return value is an integer of the format xxxyyy, where xxx.yyy is the maximum
- * floating point pixel clock speed.
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-unsigned long gu1_get_max_supported_pixel_clock (void)
-#else
-unsigned long gfx_get_max_supported_pixel_clock (void)
-#endif
-
-{
-	/* PYRAMID CAN HANDLE 157.5 MHz */
-	
-	if (gfx_cpu_version == GFX_CPU_PYRAMID)
-		return 157500;
-
-	/* EVERYTHING ELSE IS 135.0 MHz */	
-
-	return 135000;
-}
-
-/*----------------------------------------------------------------------------
- * gfx_get_display_mode
- *
- * This routine gets the specified display mode.
- *
- * Returns >0 if successful and mode returned, <0 if mode could not be found.
- *----------------------------------------------------------------------------  
- */
-#if GFX_DISPLAY_DYNAMIC
-int gu1_get_display_mode(int *xres, int *yres, int *bpp, int *hz)
-#else
-int gfx_get_display_mode(int *xres, int *yres, int *bpp, int *hz)
-#endif
-{
-	int mode=0;
-	unsigned long pll_freq = 0, bpp_flag = 0;
-
-	*xres = gfx_get_hactive();
-	*yres = gfx_get_vactive();
-	*bpp  = gfx_get_display_bpp();
-	pll_freq = gfx_get_clock_frequency();
-
-	/* SUPPORT EMULATED VGA MODES */
-
-	if (gfx_pixel_double)
-		*xres >>= 1;
-
-	if (gfx_line_double)
-		*yres >>= 1;
-
-	/* SET BPP FLAGS TO LIMIT MODE SELECTION */
-
-	bpp_flag = GFX_MODE_8BPP;
-	if (*bpp > 8) bpp_flag = GFX_MODE_16BPP;
-
-	for (mode = 0; mode < NUM_GX_DISPLAY_MODES; mode++) {
-		if ((DisplayParams[mode].hactive == (unsigned short)*xres) &&
-			(DisplayParams[mode].vactive == (unsigned short)*yres) &&
-			(DisplayParams[mode].frequency == pll_freq) &&
-			(DisplayParams[mode].flags & bpp_flag)) {
-
-				pll_freq = DisplayParams[mode].flags;
-
-				if (pll_freq & GFX_MODE_56HZ) *hz = 56;
-				else if (pll_freq & GFX_MODE_60HZ) *hz = 60;
-				else if (pll_freq & GFX_MODE_70HZ) *hz = 70;
-				else if (pll_freq & GFX_MODE_72HZ) *hz = 72;
-				else if (pll_freq & GFX_MODE_75HZ) *hz = 75;
-				else if (pll_freq & GFX_MODE_85HZ) *hz = 85;
-
-				return(1);
-			}
-		} 
-	return(-1);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_hactive
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-unsigned short gu1_get_hactive(void)
-#else
-unsigned short gfx_get_hactive(void)
-#endif
-{
-	return((unsigned short)((READ_REG32(DC_H_TIMING_1) & 0x07F8) + 8));
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_hsync_start
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-unsigned short gu1_get_hsync_start(void)
-#else
-unsigned short gfx_get_hsync_start(void)
-#endif
-{
-	return((unsigned short)((READ_REG32(DC_H_TIMING_3) & 0x07F8) + 8));
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_hsync_end
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-unsigned short gu1_get_hsync_end(void)
-#else
-unsigned short gfx_get_hsync_end(void)
-#endif
-{
-	return((unsigned short)(((READ_REG32(DC_H_TIMING_3) >> 16) & 0x07F8) + 8));
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_htotal
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-unsigned short gu1_get_htotal(void)
-#else
-unsigned short gfx_get_htotal(void)
-#endif
-{
-	return((unsigned short)(((READ_REG32(DC_H_TIMING_1) >> 16) & 0x07F8) + 8));
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_vactive
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-unsigned short gu1_get_vactive(void)
-#else
-unsigned short gfx_get_vactive(void)
-#endif
-{
-	return((unsigned short)((READ_REG32(DC_V_TIMING_1) & 0x07FF) + 1));
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_vsync_end
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-unsigned short gu1_get_vsync_end(void)
-#else
-unsigned short gfx_get_vsync_end(void)
-#endif
-{
-	return((unsigned short)(((READ_REG32(DC_V_TIMING_3) >> 16) & 0x07FF) + 1));
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_vtotal
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-unsigned short gu1_get_vtotal(void)
-#else
-unsigned short gfx_get_vtotal(void)
-#endif
-{
-	return((unsigned short)(((READ_REG32(DC_V_TIMING_1) >> 16) & 0x07FF) + 1));
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_get_display_bpp
- *
- * This routine returns the current color depth of the active display.
- *-----------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-unsigned short gu1_get_display_bpp(void)
-#else
-unsigned short gfx_get_display_bpp(void)
-#endif
-{
-	switch(READ_REG32(DC_OUTPUT_CFG) & 3)
-	{
-		case 0: return(16);
-		case 2: return(15);
-	}
-	return(8);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_vline
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-unsigned short gu1_get_vline(void)
-#else
-unsigned short gfx_get_vline(void)
-#endif
-{
-	unsigned short current_scan_line;
-	
-	/* Read similar value twice to ensure that the value is not transitioning */
-	
-	do    current_scan_line = (unsigned short)READ_REG32(DC_V_LINE_CNT) & 0x07FF;
-	while(current_scan_line != (unsigned short)(READ_REG32(DC_V_LINE_CNT) & 0x07FF));
-		
-	return(current_scan_line);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_get_display_offset
- *-----------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-unsigned long gu1_get_display_offset(void)
-#else
-unsigned long gfx_get_display_offset(void)
-#endif
-{
-	return(READ_REG32(DC_FB_ST_OFFSET) & 0x003FFFFF);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_get_cursor_offset
- *-----------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-unsigned long gu1_get_cursor_offset(void)
-#else
-unsigned long gfx_get_cursor_offset(void)
-#endif
-{
-	return(READ_REG32(DC_CURS_ST_OFFSET) & 0x003FFFFF);
-}
-
-
-#if GFX_READ_ROUTINES
-
-/*************************************************************/
-/*  READ ROUTINES  |  INCLUDED FOR DIAGNOSTIC PURPOSES ONLY  */
-/*************************************************************/
-
-/*---------------------------------------------------------------------------
- * gfx_get_hblank_start
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-unsigned short gu1_get_hblank_start(void)
-#else
-unsigned short gfx_get_hblank_start(void)
-#endif
-{
-	return((unsigned short)((READ_REG32(DC_H_TIMING_2) & 0x07F8) + 8));
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_hblank_end
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-unsigned short gu1_get_hblank_end(void)
-#else
-unsigned short gfx_get_hblank_end(void)
-#endif
-{
-	return((unsigned short)(((READ_REG32(DC_H_TIMING_2) >> 16) & 0x07F8) + 8));
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_vblank_start
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-unsigned short gu1_get_vblank_start(void)
-#else
-unsigned short gfx_get_vblank_start(void)
-#endif
-{
-	return((unsigned short)((READ_REG32(DC_V_TIMING_2) & 0x07FF) + 1));
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_vsync_start
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-unsigned short gu1_get_vsync_start(void)
-#else
-unsigned short gfx_get_vsync_start(void)
-#endif
-{
-	return((unsigned short)((READ_REG32(DC_V_TIMING_3) & 0x07FF) + 1));
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_vblank_end
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-unsigned short gu1_get_vblank_end(void)
-#else
-unsigned short gfx_get_vblank_end(void)
-#endif
-{
-	return((unsigned short)(((READ_REG32(DC_V_TIMING_2) >> 16) & 0x07FF) + 1));
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_get_display_palette_entry
- *-----------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-int gu1_get_display_palette_entry(unsigned long index, unsigned long *palette)
-#else
-int gfx_get_display_palette_entry(unsigned long index, unsigned long *palette)
-#endif
-{
-	unsigned long data;
-
-	if (index > 0xFF)
-		return GFX_STATUS_BAD_PARAMETER;
-
-	WRITE_REG32(DC_PAL_ADDRESS, index);
-	data = READ_REG32(DC_PAL_DATA);
-	data = ((data << 2) & 0x000000FC) |
-		   ((data << 4) & 0x0000FC00) |
-		   ((data << 6) & 0x00FC0000);
-	
-	*palette = data;
-
-	return 0;
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_get_display_palette
- *-----------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-void gu1_get_display_palette(unsigned long *palette)
-#else
-void gfx_get_display_palette(unsigned long *palette)
-#endif
-{
-	unsigned long i, data;
-	WRITE_REG32(DC_PAL_ADDRESS, 0);
-	for (i = 0; i < 256; i++)
-	{
-		data = READ_REG32(DC_PAL_DATA);
-		data = ((data << 2) & 0x000000FC) |
-			((data << 4) & 0x0000FC00) |
-			((data << 6) & 0x00FC0000);
-		palette[i] = data;
-	}
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_get_cursor_enable
- *-----------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-unsigned long gu1_get_cursor_enable(void)
-#else
-unsigned long gfx_get_cursor_enable(void)
-#endif
-{
-	return(READ_REG32(DC_GENERAL_CFG) & DC_GCFG_CURE);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_get_cursor_position
- *-----------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-unsigned long gu1_get_cursor_position(void)
-#else
-unsigned long gfx_get_cursor_position(void)
-#endif
-{
-	return((READ_REG32(DC_CURSOR_X) & 0x07FF) |
-		((READ_REG32(DC_CURSOR_Y) << 16) & 0x03FF0000));
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_get_cursor_clip
- *-----------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-unsigned long gu1_get_cursor_clip(void)
-#else
-unsigned long gfx_get_cursor_clip(void)
-#endif
-{
-	return(((READ_REG32(DC_CURSOR_X) >> 11) & 0x01F) |
-		((READ_REG32(DC_CURSOR_Y) << 5) & 0x1F0000));
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_get_cursor_color
- *-----------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-unsigned long gu1_get_cursor_color(int color)
-#else
-unsigned long gfx_get_cursor_color(int color)
-#endif
-{
-	unsigned long data;
-	if (color) 
-	{
-		WRITE_REG32(DC_PAL_ADDRESS, 0x101);
-	}
-	else
-	{
-		WRITE_REG32(DC_PAL_ADDRESS, 0x100);
-	}
-	data = READ_REG32(DC_PAL_DATA);
-	data = ((data << 6) & 0x00FC0000) |
-		((data << 4) & 0x0000FC00) |
-		((data << 2) & 0x000000FC);
-	return(data);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_get_compression_enable
- *-----------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-int gu1_get_compression_enable(void)
-#else
-int gfx_get_compression_enable(void)
-#endif
-{
-	unsigned long gcfg;
-	gcfg = READ_REG32(DC_GENERAL_CFG);
-	if (gcfg & DC_GCFG_CMPE) return(1);
-	else return(0);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_get_compression_offset
- *-----------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-unsigned long gu1_get_compression_offset(void)
-#else
-unsigned long gfx_get_compression_offset(void)
-#endif
-{
-	unsigned long offset;
-	offset = READ_REG32(DC_CB_ST_OFFSET) & 0x003FFFFF;
-	return(offset);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_get_compression_pitch
- *-----------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-unsigned short gu1_get_compression_pitch(void)
-#else
-unsigned short gfx_get_compression_pitch(void)
-#endif
-{
-	unsigned short pitch;
-	pitch = (unsigned short) (READ_REG32(DC_LINE_DELTA) >> 12) & 0x07FF;
-	return(pitch << 2);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_get_compression_size
- *-----------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-unsigned short gu1_get_compression_size(void)
-#else
-unsigned short gfx_get_compression_size(void)
-#endif
-{
-	unsigned short size;
-	size = (unsigned short) ((READ_REG32(DC_BUF_SIZE) >> 9) & 0x7F) - 1;
-	return((size << 2) + 16);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_get_valid_bit
- *-----------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-int gu1_get_valid_bit(int line)
-#else
-int gfx_get_valid_bit(int line)
-#endif
-{
-	int valid;
-	WRITE_REG32(MC_DR_ADD, line);
-	valid = (int)READ_REG32(MC_DR_ACC) & 1;
-	return(valid);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_display_video_offset (PRIVATE ROUTINE - NOT PART OF API)
- *
- * This routine is called by "gfx_get_video_offset".  It abstracts the 
- * version of the display controller from the video overlay routines.
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-unsigned long gu1_get_display_video_offset(void)
-#else
-unsigned long gfx_get_display_video_offset(void)
-#endif
-{
-	return(READ_REG32(DC_VID_ST_OFFSET) & 0x003FFFFF);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_display_video_size (PRIVATE ROUTINE - NOT PART OF API)
- *
- * This routine is called by "gfx_get_video_size".  It abstracts the 
- * version of the display controller from the video overlay routines.
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-unsigned long gu1_get_display_video_size(void)
-#else
-unsigned long gfx_get_display_video_size(void)
-#endif
-{
-	/* RETURN TOTAL SIZE, IN BYTES */
-
-	return((READ_REG32(DC_BUF_SIZE) >> 10) & 0x000FFFC0);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_get_display_priority_high
- *-----------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-int gu1_get_display_priority_high(void)
-#else
-int gfx_get_display_priority_high(void)
-#endif
-{
-	if (READ_REG32(MC_MEM_CNTRL1) & MC_XBUSARB) return(1);
-	else return(0);
-}
-
-#endif /* GFX_READ_ROUTINES */
-
-/* END OF FILE */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/disp_gu2.c b/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/disp_gu2.c
deleted file mode 100644
index 2b423183c..000000000
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/disp_gu2.c
+++ /dev/null
@@ -1,2694 +0,0 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/disp_gu2.c,v 1.2 2002/10/18 20:02:39 tsi Exp $ */
-/*
- * $Workfile: disp_gu2.c $
- *
- * This file contains routines for the second generation display controller.  
- *
- * NSC_LIC_ALTERNATIVE_PREAMBLE
- *
- * Revision 1.0
- *
- * National Semiconductor Alternative GPL-BSD License
- *
- * National Semiconductor Corporation licenses this software 
- * ("Software"):
- *
- *      Durango
- *
- * under one of the two following licenses, depending on how the 
- * Software is received by the Licensee.
- * 
- * If this Software is received as part of the Linux Framebuffer or
- * other GPL licensed software, then the GPL license designated 
- * NSC_LIC_GPL applies to this Software; in all other circumstances 
- * then the BSD-style license designated NSC_LIC_BSD shall apply.
- *
- * END_NSC_LIC_ALTERNATIVE_PREAMBLE */
-
-/* NSC_LIC_BSD
- *
- * National Semiconductor Corporation Open Source License for Durango
- *
- * (BSD License with Export Notice)
- *
- * Copyright (c) 1999-2001
- * National Semiconductor Corporation.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without 
- * modification, are permitted provided that the following conditions 
- * are met: 
- *
- *   * Redistributions of source code must retain the above copyright 
- *     notice, this list of conditions and the following disclaimer. 
- *
- *   * Redistributions in binary form must reproduce the above 
- *     copyright notice, this list of conditions and the following 
- *     disclaimer in the documentation and/or other materials provided 
- *     with the distribution. 
- *
- *   * Neither the name of the National Semiconductor Corporation nor 
- *     the names of its contributors may be used to endorse or promote 
- *     products derived from this software without specific prior 
- *     written permission. 
- * 
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
- * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
- * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE,
- * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
- * OF SUCH DAMAGE.
- *
- * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
- * YOUR JURISDICTION. It is licensee's responsibility to comply with 
- * any export regulations applicable in licensee's jurisdiction. Under 
- * CURRENT (2001) U.S. export regulations this software 
- * is eligible for export from the U.S. and can be downloaded by or 
- * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
- * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
- * Syria, Sudan, Afghanistan and any other country to which the U.S. 
- * has embargoed goods and services. 
- *
- * END_NSC_LIC_BSD */
-
-/* NSC_LIC_GPL
- *
- * National Semiconductor Corporation Gnu General Public License for Durango
- *
- * (GPL License with Export Notice)
- *
- * Copyright (c) 1999-2001
- * National Semiconductor Corporation.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without 
- * modification, are permitted under the terms of the GNU General 
- * Public License as published by the Free Software Foundation; either 
- * version 2 of the License, or (at your option) any later version  
- *
- * In addition to the terms of the GNU General Public License, neither 
- * the name of the National Semiconductor Corporation nor the names of 
- * its contributors may be used to endorse or promote products derived 
- * from this software without specific prior written permission. 
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
- * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
- * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, 
- * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
- * OF SUCH DAMAGE. See the GNU General Public License for more details. 
- *
- * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
- * YOUR JURISDICTION. It is licensee's responsibility to comply with 
- * any export regulations applicable in licensee's jurisdiction. Under 
- * CURRENT (2001) U.S. export regulations this software 
- * is eligible for export from the U.S. and can be downloaded by or 
- * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
- * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
- * Syria, Sudan, Afghanistan and any other country to which the U.S. 
- * has embargoed goods and services. 
- *
- * You should have received a copy of the GNU General Public License 
- * along with this file; if not, write to the Free Software Foundation, 
- * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 
- *
- * END_NSC_LIC_GPL */
-
-
-void gu2_enable_compression(void);		            /* private routine definition */
-void gu2_disable_compression(void);		            /* private routine definition */
-int gfx_set_display_control(int sync_polarities);	/* private routine definition */
-void gfx_reset_video (void);	
-		 
- /*-----------------------------------------------------------------------------
- * WARNING!!!! INACCURATE DELAY MECHANISM
- *
- * In an effort to keep the code self contained and operating system 
- * independent, the delay loop just performs reads of a display controller
- * register.  This time will vary for faster processors.  The delay can always
- * be longer than intended, only effecting the time of the mode switch 
- * (obviously want it to still be under a second).  Problems with the hardware
- * only arise if the delay is not long enough.  
- *-----------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-void gu2_delay_milliseconds(unsigned long milliseconds)
-#else
-void gfx_delay_milliseconds(unsigned long milliseconds)
-#endif
-{
-	/* ASSUME 300 MHz, 2 CLOCKS PER INCREMENT */
-
-#	define RC_READS_PER_MILLISECOND 150000L
-
-	unsigned long loop;
-	loop = milliseconds * RC_READS_PER_MILLISECOND;
-	while (loop-- > 0)
-	{
-		;
-	}
-}
-
-#if GFX_DISPLAY_DYNAMIC
-void gu2_delay_microseconds(unsigned long microseconds)
-#else
-void gfx_delay_microseconds(unsigned long microseconds)
-#endif
-{
-	/* ASSUME 400 MHz, 2 CLOCKS PER INCREMENT */
-
-
-	unsigned long loop_count = microseconds * 200;
-	
-	while (loop_count-- > 0)
-	{
-		;
-	}
-}
-	
-/*-----------------------------------------------------------------------------
- * GFX_SET_DISPLAY_BPP
- *
- * This routine programs the bpp in the display controller.
- *-----------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-int gu2_set_display_bpp(unsigned short bpp)
-#else
-int gfx_set_display_bpp(unsigned short bpp)
-#endif
-{
-    unsigned long dcfg, lock;
-
-	dcfg = READ_REG32 (MDC_DISPLAY_CFG) & ~(MDC_DCFG_DISP_MODE_MASK | MDC_DCFG_16BPP_MODE_MASK);
-	lock = READ_REG32 (MDC_UNLOCK);
-
-	switch (bpp)
-	{
-	    case 12: dcfg |= (MDC_DCFG_DISP_MODE_16BPP | MDC_DCFG_12BPP); break;
-		case 15: dcfg |= (MDC_DCFG_DISP_MODE_16BPP | MDC_DCFG_15BPP); break;
-		case 16: dcfg |= (MDC_DCFG_DISP_MODE_16BPP | MDC_DCFG_16BPP); break;
-		case 32: dcfg |= (MDC_DCFG_DISP_MODE_24BPP);  break;
-		case 8:  dcfg |= (MDC_DCFG_DISP_MODE_8BPP);   break;
-		default: return GFX_STATUS_BAD_PARAMETER;
-	}
-
-	WRITE_REG32 (MDC_UNLOCK, MDC_UNLOCK_VALUE);
-	WRITE_REG32 (MDC_DISPLAY_CFG, dcfg);
-	WRITE_REG32 (MDC_UNLOCK, lock);
-
-	/* SET BPP IN GRAPHICS PIPELINE */
-
-	gfx_set_bpp (bpp);
-
-	return 0;
-}
-
-/*-----------------------------------------------------------------------------
- * gu2_set_specified_mode (private routine)
- * This routine uses the parameters in the specified display mode structure
- * to program the display controller hardware.  
- *-----------------------------------------------------------------------------
- */
-int gu2_set_specified_mode(DISPLAYMODE *pMode, int bpp)
-{
-	unsigned long unlock, value;
-	unsigned long gcfg, dcfg;
-	unsigned long size, pitch;
-	unsigned long vid_buf_size;
-	unsigned long bpp_mask, temp, dv_size;
-	
-	/* CHECK WHETHER TIMING CHANGE IS ALLOWED */
-	/* Flag used for locking also overrides timing change restriction */
-
-	if (gfx_timing_lock && !(pMode->flags & GFX_MODE_LOCK_TIMING))
-		return GFX_STATUS_ERROR;
-	
-	/* CLEAR PANNING OFFSETS */
-
-	DeltaX = 0;
-	DeltaY = 0;
-
-	/* SET GLOBAL FLAG */
-	
-	if (pMode->flags & GFX_MODE_LOCK_TIMING)
-		gfx_timing_lock = 1;
-
-	/* CHECK FOR VALID BPP                          */
-	/* As this function can be called directly from */
-	/* gfx_set_display_timings, we must correct any */
-	/* invalid bpp settings.                        */
-
-	switch (bpp)
-	{
-	    case 12: bpp_mask = 0x00000900; break;
-		case 15: bpp_mask = 0x00000500; break;
-		case 16: bpp_mask = 0x00000100; break;
-		case 32: bpp_mask = 0x00000200; break;
-		default: bpp_mask = 0x00000000; bpp = 8; break;
-	}
-
-	gbpp = bpp;
-
-	/* DISABLE COMPRESSION */
-
-	gu2_disable_compression();
-
-	/* ALSO DISABLE VIDEO */
-	/* Use private "reset video" routine to do all that is needed. */
-	/* SC1200, for example, also disables the alpha blending regions. */
-
-	gfx_reset_video();
-
-	/* UNLOCK THE DISPLAY CONTROLLER REGISTERS */
-
-	unlock = READ_REG32 (MDC_UNLOCK);
-	WRITE_REG32 (MDC_UNLOCK, MDC_UNLOCK_VALUE);
-
-	/* READ THE CURRENT REGISTER VALUES */
-
-    gcfg = READ_REG32 (MDC_GENERAL_CFG);
-    dcfg = READ_REG32 (MDC_DISPLAY_CFG);
-
-    /* BLANK THE DISPLAY IN THE DISPLAY FILTER */
-
-	gfx_set_crt_enable (0);
-
-    /* DISABLE THE TIMING GENERATOR */
-
-    dcfg &= ~(unsigned long)MDC_DCFG_TGEN;						  
-    WRITE_REG32 (MDC_DISPLAY_CFG, dcfg);
-	
-	/* DELAY: WAIT FOR PENDING MEMORY REQUESTS                            */
-	/* This delay is used to make sure that all pending requests to the   */
-	/* memory controller have completed before disabling the FIFO load.   */
-    
-	gfx_delay_milliseconds(5);
-
-    /* DISABLE DISPLAY FIFO LOAD */
-
-    gcfg &= ~(unsigned long)MDC_GCFG_DFLE;
-    WRITE_REG32 (MDC_GENERAL_CFG, gcfg);
-
-	/* PRESERVE VIDEO INFORMATION */
-
-	gcfg &= (unsigned long)(MDC_GCFG_YUVM | MDC_GCFG_VDSE);
-	dcfg  = 0;
-
-	/* SET THE DOT CLOCK FREQUENCY             */
-	/* Mask off the divide by two bit (bit 31) */
-
-	gfx_set_clock_frequency(pMode->frequency & 0x7FFFFFFF);
-
-	/* DELAY: WAIT FOR THE PLL TO SETTLE */
-	/* This allows the dot clock frequency that was just set to settle. */
-
-	gfx_delay_milliseconds(10);
-
-	/* SET THE GX DISPLAY CONTROLLER PARAMETERS */
-
-	WRITE_REG32 (MDC_FB_ST_OFFSET,   0);
-	WRITE_REG32 (MDC_CB_ST_OFFSET,   0);
-	WRITE_REG32 (MDC_CURS_ST_OFFSET, 0);
-	WRITE_REG32 (MDC_ICON_ST_OFFSET, 0);
-
-	/* SET LINE SIZE AND PITCH */
-	/* 1. Flat Panels must use the mode width and not  */
-	/*    the timing width to set the pitch.           */
-	/* 2. Mode sets will use a pitch that is aligned   */
-	/*    on a 1K boundary to preserve legacy.  The    */
-	/*    pitch can be overridden by a subsequent call */
-	/*    to gfx_set_display_pitch.                    */
-
-	if (PanelEnable) 
-		size = ModeWidth;
-	else 
-		size = pMode->hactive;
-	
-	if (bpp > 8)  size <<= 1;
-	if (bpp > 16) size <<= 1;
-		
-	pitch = 1024;
-	dv_size = MDC_DV_LINE_SIZE_1024;
-	
-	if (size > 1024)
-	{
-		pitch = 2048;
-		dv_size = MDC_DV_LINE_SIZE_2048;
-	}
-	if (size > 2048) 
-	{
-		pitch = 4096;
-		dv_size = MDC_DV_LINE_SIZE_4096;
-	}
-	if (size > 4096)
-	{
-		pitch = 8192;
-		dv_size = MDC_DV_LINE_SIZE_8192;
-	}
-	WRITE_REG32(MDC_GFX_PITCH, pitch >> 3);
-
-	/* WRITE DIRTY/VALID CONTROL WITH LINE LENGTH */
-
-	temp = READ_REG32 (MDC_DV_CTL);
-	WRITE_REG32 (MDC_DV_CTL, (temp & ~MDC_DV_LINE_SIZE_MASK) | dv_size);
-
-	if (PanelEnable) 
-	{
-		size = pMode->hactive;
-		if (bpp > 8)  size <<= 1;
-		if (bpp > 16) size <<= 1;
-	}
-
-	/* SAVE PREVIOUSLY STORED VIDEO LINE SIZE */
-
-	vid_buf_size = READ_REG32(MDC_LINE_SIZE) & 0xFF000000; 
-
-	/* ADD 2 TO SIZE FOR POSSIBLE START ADDRESS ALIGNMENTS */
-
-	WRITE_REG32 (MDC_LINE_SIZE, ((size >> 3) + 2) | vid_buf_size);
-
-
-	/* ALWAYS ENABLE VIDEO AND GRAPHICS DATA            */
-	/* These bits are relics from a previous design and */
-	/* should always be enabled.                        */
-
-	dcfg |= (unsigned long)(MDC_DCFG_VDEN | MDC_DCFG_GDEN);
-	
-	/* SET PIXEL FORMAT */
-
-	dcfg |= bpp_mask;
-
-	/* ENABLE TIMING GENERATOR, TIM. REG. UPDATES, PALETTE BYPASS */
-	/* AND VERT. INT. SELECT                                      */
-
-	dcfg |= (unsigned long)(MDC_DCFG_TGEN | MDC_DCFG_TRUP | MDC_DCFG_PALB | MDC_DCFG_VISL);
-
-    /* DISABLE ADDRESS MASKS */
-    
-    dcfg |= MDC_DCFG_A20M;
-    dcfg |= MDC_DCFG_A18M;
-
-	/* SET FIFO PRIORITIES AND DISPLAY FIFO LOAD ENABLE     */
-	/* Set the priorities higher for high resolution modes. */
-
-	if (pMode->hactive > 1024 || bpp == 32)
-		gcfg |= 0x000A901;
-	else
-		gcfg |= 0x0006501;
-
-    
-	/* ENABLE FLAT PANEL CENTERING                          */
-	/* For panel modes having a resolution smaller than the */
-	/* panel resolution, turn on data centering.            */
-
-	if (PanelEnable && ModeWidth < PanelWidth) 
-	    dcfg |= MDC_DCFG_DCEN;
-
-	/* COMBINE AND SET TIMING VALUES */
-
-	value = (unsigned long) (pMode->hactive - 1) |
-		  (((unsigned long) (pMode->htotal  - 1)) << 16);
-	WRITE_REG32(MDC_H_ACTIVE_TIMING, value);
-	value = (unsigned long) (pMode->hblankstart - 1) |
-		  (((unsigned long) (pMode->hblankend   - 1)) << 16);
-	WRITE_REG32(MDC_H_BLANK_TIMING, value);
-	value = (unsigned long) (pMode->hsyncstart - 1) |
-		  (((unsigned long) (pMode->hsyncend   - 1)) << 16);
-	WRITE_REG32(MDC_H_SYNC_TIMING, value);
-	value = (unsigned long) (pMode->vactive - 1) |
-		  (((unsigned long) (pMode->vtotal  - 1)) << 16);
-	WRITE_REG32(MDC_V_ACTIVE_TIMING, value);
-	value = (unsigned long) (pMode->vblankstart - 1) |
-		  (((unsigned long) (pMode->vblankend - 1)) << 16);
-	WRITE_REG32(MDC_V_BLANK_TIMING, value);
-	value = (unsigned long) (pMode->vsyncstart - 1) |
-		  (((unsigned long) (pMode->vsyncend - 1)) << 16);
-	WRITE_REG32(MDC_V_SYNC_TIMING, value);
-		
-	WRITE_REG32 (MDC_DISPLAY_CFG, dcfg);
-	WRITE_REG32 (MDC_GENERAL_CFG, gcfg);	
-
-	/* CONFIGURE DISPLAY OUTPUT FROM VIDEO PROCESSOR */
-
-	gfx_set_display_control (((pMode->flags & GFX_MODE_NEG_HSYNC) ? 1 : 0) |
-		                     ((pMode->flags & GFX_MODE_NEG_VSYNC) ? 2 : 0));
-
-	/* RESTORE VALUE OF MDC_UNLOCK */
-
-	WRITE_REG32(MDC_UNLOCK, unlock);
-
-	/* RESET THE PITCH VALUES IN THE GP */
-	
-	gfx_reset_pitch ((unsigned short)pitch);
-
-	gfx_set_bpp ((unsigned short)bpp);
-
-	return GFX_STATUS_OK;
-}
-
- /*----------------------------------------------------------------------------
- * GFX_IS_DISPLAY_MODE_SUPPORTED
- *
- * This routine sets the specified display mode.
- *
- * Returns 1 if successful, 0 if mode could not be set.
- *----------------------------------------------------------------------------  
- */
-#if GFX_DISPLAY_DYNAMIC
-int gu2_is_display_mode_supported(int xres, int yres, int bpp, int hz)
-#else
-int gfx_is_display_mode_supported(int xres, int yres, int bpp, int hz)
-#endif
-{
-	int mode;
-	unsigned long hz_flag = 0, bpp_flag = 0;
-
-	/* SET FLAGS TO MATCH REFRESH RATE */
-
-	if (hz == 56) hz_flag = GFX_MODE_56HZ;
-	if (hz == 60) hz_flag = GFX_MODE_60HZ;
-	if (hz == 70) hz_flag = GFX_MODE_70HZ;
-	if (hz == 72) hz_flag = GFX_MODE_72HZ;
-	if (hz == 75) hz_flag = GFX_MODE_75HZ;
-	if (hz == 85) hz_flag = GFX_MODE_85HZ;
-	
-	/* SET BPP FLAGS TO LIMIT MODE SELECTION */
-
-	switch (bpp)
-	{
-	    case 8:  bpp_flag = GFX_MODE_8BPP;  break;
-		case 12: bpp_flag = GFX_MODE_12BPP; break;
-		case 15: bpp_flag = GFX_MODE_15BPP; break;
-		case 16: bpp_flag = GFX_MODE_16BPP; break;
-		case 32: bpp_flag = GFX_MODE_24BPP; break;
-		default: return (-1);
-	}
-
-	/* LOOP THROUGH THE AVAILABLE MODES TO FIND A MATCH */
-
-	for (mode = 0; mode < NUM_RC_DISPLAY_MODES; mode++) 
-	{
-		if ((DisplayParams[mode].hactive == (unsigned short)xres) &&
-			(DisplayParams[mode].vactive == (unsigned short)yres) &&
-			(DisplayParams[mode].flags & hz_flag) &&
-			(DisplayParams[mode].flags & bpp_flag)) 
-		{
-
-			/* REDCLOUD DOES NOT SUPPORT EMULATED VGA MODES */
-
-			if ((DisplayParams[mode].flags & GFX_MODE_PIXEL_DOUBLE) ||
-				(DisplayParams[mode].flags & GFX_MODE_LINE_DOUBLE))
-				continue;
-
-			/* SET THE DISPLAY CONTROLLER FOR THE SELECTED MODE */
-
-			return(mode);
-		}
-	} 
-	return(-1);
-} 
-
-/*----------------------------------------------------------------------------
- * gfx_set_display_mode
- *
- * This routine sets the specified display mode.
- *
- * Returns 1 if successful, 0 if mode could not be set.
- *----------------------------------------------------------------------------  
- */
-#if GFX_DISPLAY_DYNAMIC
-int gu2_set_display_mode(int xres, int yres, int bpp, int hz)
-#else
-int gfx_set_display_mode(int xres, int yres, int bpp, int hz)
-#endif
-{
-	int mode;
-
-	/* DISABLE FLAT PANEL */
-	/* Flat Panel settings are enabled by the function gfx_set_fixed_timings */
-	/* and disabled by gfx_set_display_mode.                                 */
-
-	PanelEnable = 0;
-
-	mode = gfx_is_display_mode_supported(xres, yres, bpp, hz);
-	if(mode >= 0)
-	{
-		if (gu2_set_specified_mode(&DisplayParams[mode], bpp) == GFX_STATUS_OK)
-			return(1);
-	}
-	return(0);
-} 
-
-/*----------------------------------------------------------------------------
- * GFX_SET_DISPLAY_TIMINGS
- *
- * This routine sets the display controller mode using the specified timing
- * values (as opposed to using the tables internal to Durango).
- *
- * Returns GFX_STATUS_OK ON SUCCESS, GFX_STATUS_ERROR otherwise.
- *----------------------------------------------------------------------------  
- */
-#if GFX_DISPLAY_DYNAMIC
-int gu2_set_display_timings(unsigned short bpp, unsigned short flags, 
-	unsigned short hactive, unsigned short hblankstart, 
-	unsigned short hsyncstart, unsigned short hsyncend,
-	unsigned short hblankend, unsigned short htotal,
-	unsigned short vactive, unsigned short vblankstart, 
-	unsigned short vsyncstart, unsigned short vsyncend,
-	unsigned short vblankend, unsigned short vtotal,
-	unsigned long frequency)
-#else
-int gfx_set_display_timings(unsigned short bpp, unsigned short flags, 
-	unsigned short hactive, unsigned short hblankstart, 
-	unsigned short hsyncstart, unsigned short hsyncend,
-	unsigned short hblankend, unsigned short htotal,
-	unsigned short vactive, unsigned short vblankstart, 
-	unsigned short vsyncstart, unsigned short vsyncend,
-	unsigned short vblankend, unsigned short vtotal,
-	unsigned long frequency)
-#endif
-{
-	/* SET MODE STRUCTURE WITH SPECIFIED VALUES */
-
-	gfx_display_mode.flags = 0;
-	if (flags & 1) gfx_display_mode.flags |= GFX_MODE_NEG_HSYNC;
-	if (flags & 2) gfx_display_mode.flags |= GFX_MODE_NEG_VSYNC;
-	if (flags & 0x1000) gfx_display_mode.flags |= GFX_MODE_LOCK_TIMING;
-	gfx_display_mode.hactive = hactive;
-	gfx_display_mode.hblankstart = hblankstart;
-	gfx_display_mode.hsyncstart = hsyncstart;
-	gfx_display_mode.hsyncend = hsyncend;
-	gfx_display_mode.hblankend = hblankend;
-	gfx_display_mode.htotal = htotal;
-	gfx_display_mode.vactive = vactive;
-	gfx_display_mode.vblankstart = vblankstart;
-	gfx_display_mode.vsyncstart = vsyncstart;
-	gfx_display_mode.vsyncend = vsyncend;
-	gfx_display_mode.vblankend = vblankend;
-	gfx_display_mode.vtotal = vtotal;
-	gfx_display_mode.frequency = frequency;
-
-	/* CALL ROUTINE TO SET MODE */
-
-	return (gu2_set_specified_mode(&gfx_display_mode, bpp));
-}
-
-/*----------------------------------------------------------------------------
- * GFX_SET_VTOTAL
- *
- * This routine sets the display controller vertical total to
- * "vtotal". As a side effect it also sets vertical blank end.
- * It should be used when only this value needs to be changed,
- * due to speed considerations.
- *
- * Note: it is the caller's responsibility to make sure that
- * a legal vtotal is used, i.e. that "vtotal" is greater than or
- * equal to vsync end.
- *
- * Always returns 0.
- *----------------------------------------------------------------------------  
- */
-#if GFX_DISPLAY_DYNAMIC
-int gu2_set_vtotal(unsigned short vtotal)
-#else
-int gfx_set_vtotal(unsigned short vtotal)
-#endif
-{
-	unsigned long unlock, dcfg, vactive, vblank;
-
-    /* UNLOCK THE DISPLAY CONTROLLER REGISTERS */
-
-	unlock = READ_REG32(MDC_UNLOCK);
-	WRITE_REG32(MDC_UNLOCK, MDC_UNLOCK_VALUE);
-
-	/* READ THE CURRENT RC VALUES */
-
-    dcfg = READ_REG32 (MDC_DISPLAY_CFG);
-	vactive = READ_REG32 (MDC_V_ACTIVE_TIMING);
-	vblank  = READ_REG32 (MDC_V_BLANK_TIMING);
-
-	/* DISABLE TIMING REGISTER UPDATES */
-
-	WRITE_REG32 (MDC_DISPLAY_CFG, dcfg & ~(unsigned long)MDC_DCFG_TRUP);
-
-	/* WRITE NEW TIMING VALUES */
-
-	WRITE_REG32 (MDC_V_ACTIVE_TIMING, (vactive & MDC_VAT_VA_MASK)  | (unsigned long)(vtotal - 1) << 16);
-	WRITE_REG32 (MDC_V_BLANK_TIMING,  (vblank  & MDC_VBT_VBS_MASK) | (unsigned long)(vtotal - 1) << 16);
-
-	/* RESTORE OLD RC VALUES */
-
-	WRITE_REG32 (MDC_DISPLAY_CFG, dcfg);
-	WRITE_REG32 (MDC_UNLOCK, unlock);
-
-	return (0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_display_pitch
- *
- * This routine sets the pitch of the frame buffer to the specified value.
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-void gu2_set_display_pitch(unsigned short pitch)
-#else
-void gfx_set_display_pitch(unsigned short pitch)
-#endif
-{		
-	unsigned long value = 0;
-	unsigned long lock = READ_REG32(MDC_UNLOCK);
-	
-	value = READ_REG32(MDC_GFX_PITCH) & 0xFFFF0000;
-	value |= (pitch >> 3);
-	WRITE_REG32(MDC_UNLOCK, MDC_UNLOCK_VALUE);
-	WRITE_REG32(MDC_GFX_PITCH, value);
-
-	/* SET RENDERING PITCHES TO MATCH */
-
-	gfx_reset_pitch(pitch);
-
-	/* SET THE FRAME DIRTY MODE                  */
-	/* Non-standard pitches, i.e. pitches that   */
-	/* are not 1K, 2K or 4K must mark the entire */
-	/* frame as dirty when writing to the frame  */
-	/* buffer.                                   */
-
-	value = READ_REG32 (MDC_GENERAL_CFG);
-
-	if (pitch == 1024 || pitch == 2048 || pitch == 4096 || pitch == 8192)
-		value &= ~(unsigned long)(MDC_GCFG_FDTY);
-	else
-		value |=  (unsigned long)(MDC_GCFG_FDTY);
-
-	WRITE_REG32 (MDC_GENERAL_CFG, value);
-	WRITE_REG32(MDC_UNLOCK, lock);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_display_offset
- *
- * This routine sets the start address of the frame buffer.  It is 
- * typically used to pan across a virtual desktop (frame buffer larger than 
- * the displayed screen) or to flip the display between multiple buffers.
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-void gu2_set_display_offset(unsigned long offset)
-#else
-void gfx_set_display_offset(unsigned long offset)
-#endif
-{
-	/* UPDATE FRAME BUFFER OFFSET */
-	unsigned long lock;
-	lock = READ_REG32(MDC_UNLOCK);
-	WRITE_REG32(MDC_UNLOCK, MDC_UNLOCK_VALUE);
-
-	
-	/* START ADDRESS EFFECTS DISPLAY COMPRESSION */
-	/* Disable compression for non-zero start addresss values.            */
-	/* Enable compression if offset is zero and comression is intended to */
-	/* be enabled from a previous call to "gfx_set_compression_enable".   */
-	/* Compression should be disabled BEFORE the offset is changed        */
-	/* and enabled AFTER the offset is changed.                           */
-	
-	if (offset == 0)
-	{
-		WRITE_REG32(MDC_FB_ST_OFFSET, offset);
-		if (gfx_compression_enabled)
-		{
-			/* WAIT FOR THE OFFSET TO BE LATCHED */
-			gfx_wait_vertical_blank ();
-			gu2_enable_compression();
-		}
-	}
-	else
-	{
-		/* ONLY DISABLE COMPRESSION ONCE */
-
-		if (gfx_compression_active)
-			gu2_disable_compression();
-
-		WRITE_REG32(MDC_FB_ST_OFFSET, offset);
-	}
-
-	WRITE_REG32(MDC_UNLOCK, lock);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_display_palette_entry
- *
- * This routine sets an palette entry in the display controller.
- * A 32-bit X:R:G:B value.
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-int gu2_set_display_palette_entry(unsigned long index, unsigned long palette)
-#else
-int gfx_set_display_palette_entry(unsigned long index, unsigned long palette)
-#endif
-{
-	if (index > 0xFF)
-		return GFX_STATUS_BAD_PARAMETER;
-
-	WRITE_REG32(MDC_PAL_ADDRESS, index);
-	WRITE_REG32(MDC_PAL_DATA, palette);
-
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_display_palette
- *
- * This routine sets the entire palette in the display controller.
- * A pointer is provided to a 256 entry table of 32-bit X:R:G:B values.
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-int gu2_set_display_palette(unsigned long *palette)
-#else
-int gfx_set_display_palette(unsigned long *palette)
-#endif
-{
-	unsigned long i;
-	WRITE_REG32(MDC_PAL_ADDRESS, 0);
-	
-	if (palette)
-	{
-		for (i = 0; i < 256; i++)
-		{
-		    WRITE_REG32(MDC_PAL_DATA, palette[i]);
-		}
-	}
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_cursor_enable
- *
- * This routine enables or disables the hardware cursor.  
- *
- * WARNING: The cursor start offset must be set by setting the cursor 
- * position before calling this routine to assure that memory reads do not
- * go past the end of graphics memory (this can hang GXm).
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-void gu2_set_cursor_enable(int enable)
-#else
-void gfx_set_cursor_enable(int enable)
-#endif
-{
-    unsigned long unlock, gcfg;
-	
-	/* SET OR CLEAR CURSOR ENABLE BIT */
-
-	unlock = READ_REG32(MDC_UNLOCK);
-	gcfg   = READ_REG32(MDC_GENERAL_CFG);
-	if (enable) gcfg |=   MDC_GCFG_CURE;
-	else        gcfg &= ~(MDC_GCFG_CURE);
-
-	/* WRITE NEW REGISTER VALUE */
-
-	WRITE_REG32(MDC_UNLOCK, MDC_UNLOCK_VALUE);
-	WRITE_REG32(MDC_GENERAL_CFG, gcfg);
-	WRITE_REG32(MDC_UNLOCK, unlock);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_cursor_colors
- *
- * This routine sets the colors of the hardware cursor.
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-void gu2_set_cursor_colors(unsigned long bkcolor, unsigned long fgcolor)
-#else
-void gfx_set_cursor_colors(unsigned long bkcolor, unsigned long fgcolor)
-#endif
-{
-	/* SET CURSOR COLORS */
-
-	WRITE_REG32(MDC_PAL_ADDRESS, 0x100);
-	WRITE_REG32(MDC_PAL_DATA, bkcolor);
-	WRITE_REG32(MDC_PAL_DATA, fgcolor);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_cursor_position
- *
- * This routine sets the position of the hardware cusror.  The starting
- * offset of the cursor buffer must be specified so that the routine can 
- * properly clip scanlines if the cursor is off the top of the screen.
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-void gu2_set_cursor_position(unsigned long memoffset, 
-	unsigned short xpos, unsigned short ypos, 
-	unsigned short xhotspot, unsigned short yhotspot)
-#else
-void gfx_set_cursor_position(unsigned long memoffset, 
-	unsigned short xpos, unsigned short ypos, 
-	unsigned short xhotspot, unsigned short yhotspot)
-#endif
-{
-    unsigned long unlock;
-
-	short x = (short) xpos - (short) xhotspot;
-	short y = (short) ypos - (short) yhotspot;
-	short xoffset = 0;
-	short yoffset = 0;
-	if (x < -63) return;
-	if (y < -63) return;
-	if (x < 0) { xoffset = -x; x = 0; }
-	if (y < 0) { yoffset = -y; y = 0; }
-	memoffset += (unsigned long) yoffset << 4;
-
-	if (PanelEnable) 
-	{
-		if (( ModeWidth > PanelWidth) || (ModeHeight > PanelHeight)) 
-		{ 
-			gfx_enable_panning(xpos, ypos);
-			x = x - (unsigned short)panelLeft;
-			y = y - (unsigned short)panelTop;
-		}
-	}
-
-	/* SET CURSOR POSITION */
-
-	unlock = READ_REG32(MDC_UNLOCK);
-	WRITE_REG32(MDC_UNLOCK, MDC_UNLOCK_VALUE);
-	WRITE_REG32(MDC_CURS_ST_OFFSET, memoffset);
-	WRITE_REG32(MDC_CURSOR_X, (unsigned long) x |
-		(((unsigned long) xoffset) << 11));
-	WRITE_REG32(MDC_CURSOR_Y, (unsigned long) y | 
-		(((unsigned long) yoffset) << 11));
-	WRITE_REG32(MDC_UNLOCK, unlock);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_cursor_shape32
- *
- * This routine loads 32x32 cursor data into the cursor buffer in graphics memory.
- * As the Redcloud cursor is actually 64x64, we must pad the outside of the 
- * cursor data with transparent pixels.
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-void gu2_set_cursor_shape32(unsigned long memoffset, 
-	unsigned long *andmask, unsigned long *xormask)
-#else
-void gfx_set_cursor_shape32(unsigned long memoffset, 
-	unsigned long *andmask, unsigned long *xormask)
-#endif
-{
-	int i;
-
-	for (i = 0; i < 32; i++)
-	{
-		/* EVEN QWORDS CONTAIN THE AND MASK */
-
-		WRITE_FB32 (memoffset, 0xFFFFFFFF);
-		WRITE_FB32 (memoffset + 4, andmask[i]);
-
-		/* ODD QWORDS CONTAIN THE XOR MASK  */
-
-		WRITE_FB32 (memoffset + 8, 0x00000000);
-		WRITE_FB32 (memoffset + 12, xormask[i]);
-
-		memoffset += 16;
-	}
-
-	/* FILL THE LOWER HALF OF THE BUFFER WITH TRANSPARENT PIXELS */
-
-	for (i = 0; i < 32; i++)
-	{
-		WRITE_FB32 (memoffset,      0xFFFFFFFF);
-		WRITE_FB32 (memoffset + 4,  0xFFFFFFFF);
-		WRITE_FB32 (memoffset + 8,  0x00000000);
-		WRITE_FB32 (memoffset + 12, 0x00000000);
-
-		memoffset += 16;
-	}
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_cursor_shape64
- *
- * This routine loads 64x64 cursor data into the cursor buffer in graphics memory.
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-void gu2_set_cursor_shape64(unsigned long memoffset, 
-	unsigned long *andmask, unsigned long *xormask)
-#else
-void gfx_set_cursor_shape64(unsigned long memoffset, 
-	unsigned long *andmask, unsigned long *xormask)
-#endif
-{	
-	int i;
-
-	for (i = 0; i < 128; i += 2)
-	{
-		/* EVEN QWORDS CONTAIN THE AND MASK */
-		/* We invert the dwords to prevent the calling            */
-		/* application from having to think in terms of Qwords.   */
-		/* The hardware data order is actually 63:0, or 31:0 of   */
-		/* the second dword followed by 31:0 of the first dword.  */
-		
-		WRITE_FB32 (memoffset, andmask[i + 1]);
-		WRITE_FB32 (memoffset + 4, andmask[i]);
-
-		/* ODD QWORDS CONTAIN THE XOR MASK  */
-
-		WRITE_FB32 (memoffset + 8, xormask[i + 1]);
-		WRITE_FB32 (memoffset + 12, xormask[i]);
-
-		memoffset += 16;
-	}
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_icon_enable
- *
- * This routine enables or disables the hardware icon.  The icon position
- * and colors should be programmed prior to calling this routine for the
- * first time.
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-void gu2_set_icon_enable(int enable)
-#else
-void gfx_set_icon_enable(int enable)
-#endif
-{	
-    unsigned long unlock, gcfg;
-	
-	/* SET OR CLEAR ICON ENABLE BIT */
-
-	unlock = READ_REG32(MDC_UNLOCK);
-	gcfg   = READ_REG32(MDC_GENERAL_CFG);
-	if (enable) gcfg |=   MDC_GCFG_ICNE;
-	else        gcfg &= ~(MDC_GCFG_ICNE);
-
-	/* WRITE NEW REGISTER VALUE */
-
-	WRITE_REG32(MDC_UNLOCK, MDC_UNLOCK_VALUE);
-	WRITE_REG32(MDC_GENERAL_CFG, gcfg);
-	WRITE_REG32(MDC_UNLOCK, unlock);	
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_icon_colors
- *
- * This routine sets the three icon colors.
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-void gu2_set_icon_colors(unsigned long color0, unsigned long color1, unsigned long color2)
-#else
-void gfx_set_icon_colors(unsigned long color0, unsigned long color1, unsigned long color2)
-#endif
-{
-	/* ICON COLORS LOCATED AT PALETTE INDEXES 102-104h */
-	
-    WRITE_REG32 (MDC_PAL_ADDRESS, 0x102);
-	
-	WRITE_REG32 (MDC_PAL_DATA, color0);
-	WRITE_REG32 (MDC_PAL_DATA, color1);
-	WRITE_REG32 (MDC_PAL_DATA, color2);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_icon_position
- *
- * This routine sets the starting X coordinate for the hardware icon and the 
- * memory offset for the icon buffer.
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-void gu2_set_icon_position(unsigned long memoffset, unsigned short xpos)
-#else
-void gfx_set_icon_position(unsigned long memoffset, unsigned short xpos)
-#endif
-{
-	unsigned long lock = READ_REG32 (MDC_UNLOCK);
-
-	WRITE_REG32 (MDC_UNLOCK, MDC_UNLOCK_VALUE);
-
-	/* PROGRAM THE MEMORY OFFSET */
-
-	WRITE_REG32 (MDC_ICON_ST_OFFSET, memoffset & 0x0FFFFFFF);
-
-	/* PROGRAM THE XCOORDINATE */
-
-	WRITE_REG32 (MDC_ICON_X, (unsigned long)(xpos & 0x07FF));
-
-	WRITE_REG32 (MDC_UNLOCK, lock);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_icon_shape64
- *
- * This routine initializes the icon buffer according to the current mode.
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-void gu2_set_icon_shape64(unsigned long memoffset, unsigned long *andmask, unsigned long *xormask, unsigned int lines)
-#else
-void gfx_set_icon_shape64(unsigned long memoffset, unsigned long *andmask, unsigned long *xormask, unsigned int lines)
-#endif
-{
-	unsigned short i, height;
-
-	height = lines << 1;
-	
-	for (i = 0; i < height; i += 2)
-	{
-		/* EVEN QWORDS CONTAIN THE AND MASK     */
-		/* Swap dwords to hide qword constraint */
-
-		WRITE_FB32 (memoffset, andmask[i + 1]);
-		WRITE_FB32 (memoffset + 4, andmask[i]);
-
-		/* ODD QWORDS CONTAIN THE XOR MASK */
-
-		WRITE_FB32 (memoffset + 8,  xormask[i + 1]);
-		WRITE_FB32 (memoffset + 12, xormask[i]);
-
-		memoffset += 16;
-	}
-}
-
-/*---------------------------------------------------------------------------
- * gu2_enable_compression
- *
- * This is a private routine to this module (not exposed in the Durango API).
- * It enables display compression.
- *---------------------------------------------------------------------------
- */
-void gu2_enable_compression(void)
-{
-	unsigned long unlock, gcfg, temp;
-
-	/* DO NOT ENABLE IF START ADDRESS IS NOT ZERO */
-
-	if (READ_REG32(MDC_FB_ST_OFFSET) & 0x0FFFFFFF)
-		return;
-	
-	/* SET GLOBAL INDICATOR */
-
-	gfx_compression_active = 1;
-
-	/* CLEAR DIRTY/VALID BITS IN MEMORY CONTROLLER */
-	/* Software is required to do this before enabling compression.   */
-	/* Don't want controller to think that old lines are still valid. */
-	/* Writing a 1 to bit 0 of the DV Control register will force the */
-	/* hardware to clear all the valid bits.                          */
-
-	temp = READ_REG32 (MDC_DV_CTL);
-	WRITE_REG32 (MDC_DV_CTL, temp | 0x00000001);
-
-	/* TURN ON COMPRESSION CONTROL BITS */
-
-	unlock = READ_REG32 (MDC_UNLOCK);
-	gcfg   = READ_REG32 (MDC_GENERAL_CFG);
-	gcfg  |= MDC_GCFG_CMPE | MDC_GCFG_DECE;
-	WRITE_REG32 (MDC_UNLOCK, MDC_UNLOCK_VALUE);
-	WRITE_REG32 (MDC_GENERAL_CFG, gcfg);
-	WRITE_REG32 (MDC_UNLOCK, unlock);
-}
-
-/*---------------------------------------------------------------------------
- * gu2_disable_compression
- *
- * This is a private routine to this module (not exposed in the Durango API).
- * It disables display compression.
- *---------------------------------------------------------------------------
- */
-void gu2_disable_compression(void)
-{
-	unsigned long unlock, gcfg;
-
-	/* SET GLOBAL INDICATOR */
-
-	gfx_compression_active = 0;
-
-	/* TURN OFF COMPRESSION CONTROL BITS */
-
-	unlock = READ_REG32(MDC_UNLOCK);
-	gcfg = READ_REG32(MDC_GENERAL_CFG);
-	gcfg &= ~(MDC_GCFG_CMPE | MDC_GCFG_DECE);
-	WRITE_REG32 (MDC_UNLOCK, MDC_UNLOCK_VALUE);
-	WRITE_REG32 (MDC_GENERAL_CFG, gcfg);
-	WRITE_REG32 (MDC_UNLOCK, unlock);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_compression_enable
- *
- * This routine enables or disables display compression.
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-int gu2_set_compression_enable(int enable)
-#else
-int gfx_set_compression_enable(int enable)
-#endif
-{
-	/* SET GLOBAL VARIABLE FOR INDENDED STATE */
-	/* Compression can only be enabled for non-zero start address values. */
-	/* Keep state to enable compression on start address changes. */
-
-	gfx_compression_enabled = enable;
-	if (enable) gu2_enable_compression();
-	else gu2_disable_compression();
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_compression_offset
- *
- * This routine sets the base offset for the compression buffer.
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-int gu2_set_compression_offset(unsigned long offset)
-#else
-int gfx_set_compression_offset(unsigned long offset)
-#endif
-{
-	unsigned long lock;
-	
-	/* MUST BE 16-BYTE ALIGNED FOR REDCLOUD */
-
-	if (offset & 0x0F) return(1);
-
-	/* SET REGISTER VALUE */
-
-	lock = READ_REG32(MDC_UNLOCK);
-	WRITE_REG32(MDC_UNLOCK, MDC_UNLOCK_VALUE);
-	WRITE_REG32(MDC_CB_ST_OFFSET, offset & 0x0FFFFFFF);
-	WRITE_REG32(MDC_UNLOCK, lock);
-
-	return (0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_compression_pitch
- *
- * This routine sets the pitch, in bytes, of the compression buffer. 
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-int gu2_set_compression_pitch(unsigned short pitch)
-#else
-int gfx_set_compression_pitch(unsigned short pitch)
-#endif
-{
-	unsigned long lock, line_delta;
-	
-	lock = READ_REG32(MDC_UNLOCK);
-
-	/* SET REGISTER VALUE */
-
-	line_delta = READ_REG32(MDC_GFX_PITCH) & 0x0000FFFF;
-	line_delta |= (((unsigned long)pitch << 13) & 0xFFFF0000);
-	WRITE_REG32(MDC_UNLOCK, MDC_UNLOCK_VALUE);
-	WRITE_REG32(MDC_GFX_PITCH, line_delta);
-	WRITE_REG32(MDC_UNLOCK, lock);
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_compression_size
- *
- * This routine sets the line size of the compression buffer, which is the
- * maximum number of bytes allowed to store a compressed line.
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-int gu2_set_compression_size(unsigned short size)
-#else
-int gfx_set_compression_size(unsigned short size)
-#endif
-{
-	unsigned long lock, buf_size;
-
-	/* SUBTRACT 32 FROM SIZE                          */
-	/* The display controller will actually write     */
-	/* 4 extra QWords.  So, if we assume that "size"  */
-	/* refers to the allocated size, we must subtract */
-	/* 32 bytes.                                      */
-
-	size -= 32;
-	
-	/* SET REGISTER VALUE */
-
-	lock = READ_REG32(MDC_UNLOCK);
-	buf_size = READ_REG32(MDC_LINE_SIZE) & 0xFF80FFFF;
-	buf_size |= ((((unsigned long)size >> 3) + 1) & 0x7F) << 16;
-	WRITE_REG32(MDC_UNLOCK, MDC_UNLOCK_VALUE);
-	WRITE_REG32(MDC_LINE_SIZE, buf_size);
-	WRITE_REG32(MDC_UNLOCK, lock);
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_display_video_format (PRIVATE ROUTINE - NOT PART OF API)
- *
- * This routine is called by "gfx_set_video_format".  It abstracts the 
- * version of the display controller from the video overlay routines.
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-void gu2_set_display_video_format(unsigned long format)
-#else
-void gfx_set_display_video_format(unsigned long format)
-#endif
-{
-	unsigned long gcfg, lock;
-
-	lock = READ_REG32 (MDC_UNLOCK);
-	gcfg = READ_REG32 (MDC_GENERAL_CFG);
-
-   	switch (format)
-	{
-		case VIDEO_FORMAT_Y0Y1Y2Y3:
-		case VIDEO_FORMAT_Y3Y2Y1Y0:
-		case VIDEO_FORMAT_Y1Y0Y3Y2:
-		case VIDEO_FORMAT_Y1Y2Y3Y0:
-
-			gcfg |= MDC_GCFG_YUVM;
-			break;
-
-		default:
-
-			gcfg &= ~MDC_GCFG_YUVM;
-			break;
-	}
-
-	WRITE_REG32 (MDC_UNLOCK, MDC_UNLOCK_VALUE);
-	WRITE_REG32 (MDC_GENERAL_CFG, gcfg);
-	WRITE_REG32 (MDC_UNLOCK, lock);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_display_video_enable (PRIVATE ROUTINE - NOT PART OF API)
- *
- * This routine is called by "gfx_set_video_enable".  It abstracts the 
- * version of the display controller from the video overlay routines.
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-void gu2_set_display_video_enable(int enable)
-#else
-void gfx_set_display_video_enable(int enable)
-#endif
-{
-   	unsigned long lock, gcfg, dcfg;
-
-	/* READ CURRENT VALUES */
-
-	lock = READ_REG32 (MDC_UNLOCK);
-	gcfg = READ_REG32 (MDC_GENERAL_CFG);
-	dcfg = READ_REG32 (MDC_DISPLAY_CFG);
-
-	/* SET OR CLEAR VIDEO ENABLE IN GENERAL_CFG */
-
-	if (enable) gcfg |=  MDC_GCFG_VIDE;
-	else        gcfg &= ~MDC_GCFG_VIDE;
-
-	/* WRITE REGISTER */
-
-	WRITE_REG32 (MDC_UNLOCK, MDC_UNLOCK_VALUE);
-	WRITE_REG32 (MDC_GENERAL_CFG, gcfg);
-	WRITE_REG32 (MDC_UNLOCK, lock);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_display_video_size (PRIVATE ROUTINE - NOT PART OF API)
- *
- * This routine is called by "gfx_set_video_size".  It abstracts the 
- * version of the display controller from the video overlay routines.
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-void gu2_set_display_video_size(unsigned short width, unsigned short height)
-#else
-void gfx_set_display_video_size(unsigned short width, unsigned short height)
-#endif
-{
-	unsigned long lock, value, yuv_420;
-
-	/* READ CURRENT VALUES */
-
-	lock     = READ_REG32 (MDC_UNLOCK);
-	value    = READ_REG32 (MDC_LINE_SIZE) & 0x00FFFFFF;
-	yuv_420  = READ_REG32 (MDC_GENERAL_CFG) & MDC_GCFG_YUVM;
-		
-	/* LINE WIDTH IS 1/4 FOR 4:2:0 VIDEO */
-	/* All data must be 32-byte aligned. */
-	
-	if (yuv_420)
-	{
-		width >>= 1;
-		width = (width + 7) & 0xFFF8;
-	}
-	else
-	{
-	    width <<= 1;
-		width = (width + 31) & 0xFFE0;
-	}
-	
-	/* ONLY THE LINE SIZE IS PROGRAMMED IN THE DISPLAY CONTROLLER */
-
-	value |= ((unsigned long)width << 21);
-	
-	/* WRITE THE REGISTER */
-
-	WRITE_REG32 (MDC_UNLOCK, MDC_UNLOCK_VALUE);
-	WRITE_REG32 (MDC_LINE_SIZE, value);
-	WRITE_REG32 (MDC_UNLOCK, lock);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_display_video_offset (PRIVATE ROUTINE - NOT PART OF API)
- *
- * This routine is called by "gfx_set_video_offset".  It abstracts the 
- * version of the display controller from the video overlay routines.
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-void gu2_set_display_video_offset(unsigned long offset)
-#else
-void gfx_set_display_video_offset(unsigned long offset)
-#endif
-{
-	unsigned long lock;
-	
-	lock = READ_REG32(MDC_UNLOCK);
-	WRITE_REG32(MDC_UNLOCK, MDC_UNLOCK_VALUE);
-	offset &= 0x0FFFFFF0;
-	WRITE_REG32(MDC_VID_Y_ST_OFFSET, offset);
-	WRITE_REG32(MDC_UNLOCK, lock);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_display_video_yuv_offsets (PRIVATE ROUTINE - NOT PART OF API)
- *
- * This routine is called by gfx_set_video_yuv_offsets.  It abstracts the version
- * of the display controller from the video overlay routines.
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-void gu2_set_display_video_yuv_offsets(unsigned long yoffset, unsigned long uoffset, 
-									   unsigned long voffset)
-#else
-void gfx_set_display_video_yuv_offsets(unsigned long yoffset, unsigned long uoffset, 
-									   unsigned long voffset)
-#endif
-{
-	unsigned long lock;
-	
-	lock = READ_REG32(MDC_UNLOCK);
-	
-	yoffset &= 0x0FFFFFF0;
-	uoffset &= 0x0FFFFFF8;
-	voffset &= 0x0FFFFFF8;
-
-	WRITE_REG32(MDC_UNLOCK, MDC_UNLOCK_VALUE);
-	WRITE_REG32(MDC_VID_Y_ST_OFFSET, yoffset);
-	WRITE_REG32(MDC_VID_U_ST_OFFSET, uoffset);
-	WRITE_REG32(MDC_VID_V_ST_OFFSET, voffset);
-	WRITE_REG32(MDC_UNLOCK, lock);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_display_video_yuv_pitch (PRIVATE ROUTINE - NOT PART OF API)
- *
- * This routine is called by gfx_set_video_yuv_pitch.  It abstracts the version
- * of the display controller from the video overlay routines.
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-void gu2_set_display_video_yuv_pitch (unsigned long ypitch, unsigned long uvpitch)
-#else
-void gfx_set_display_video_yuv_pitch (unsigned long ypitch, unsigned long uvpitch)
-#endif
-{
-	unsigned long lock, pitch;
-	
-	lock = READ_REG32(MDC_UNLOCK);
-	
-	pitch = ((uvpitch << 13) & 0xFFFF0000) | ((ypitch >> 3) & 0xFFFF);
-
-	WRITE_REG32(MDC_UNLOCK, MDC_UNLOCK_VALUE);
-	WRITE_REG32(MDC_VID_YUV_PITCH, pitch);
-	WRITE_REG32(MDC_UNLOCK, lock);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_display_video_downscale (PRIVATE ROUTINE - NOT PART OF API)
- *
- * This routine is called by gfx_set_video_vertical_downscale.  It abstracts the version
- * of the display controller from the video overlay routines.
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-void gu2_set_display_video_downscale (unsigned short srch, unsigned short dsth)
-#else
-void gfx_set_display_video_downscale (unsigned short srch, unsigned short dsth)
-#endif
-{
-	unsigned long lock, delta;
-	
-	lock = READ_REG32 (MDC_UNLOCK);
-
-	/* CLIP SCALING LIMITS */
-	/* Upscaling is performed in a separate function. */
-	/* Maximum scale ratio is 1/2.                    */
-
-	if (dsth > srch || dsth <= (srch >> 1))
-		delta = 0;
-	else
-		delta = (((unsigned long)srch << 14) / (unsigned long)dsth) << 18;
-
-	WRITE_REG32 (MDC_UNLOCK, MDC_UNLOCK_VALUE);
-	WRITE_REG32 (MDC_VID_DS_DELTA, delta);
-	WRITE_REG32 (MDC_UNLOCK, lock);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_display_video_downscale_enable (PRIVATE ROUTINE - NOT PART OF API)
- *
- * This routine is called by "gfx_set_video_vertical_downscale_enable".  It abstracts the 
- * version of the display controller from the video overlay routines.
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-void gu2_set_display_video_vertical_downscale_enable(int enable) 
-#else
-void gfx_set_display_video_vertical_downscale_enable(int enable) 
-#endif
-{
-	unsigned long gcfg, unlock;
-
-	unlock = READ_REG32 (MDC_UNLOCK);
-	gcfg   = READ_REG32 (MDC_GENERAL_CFG);
-
-	if (enable) gcfg |=  MDC_GCFG_VDSE;
-	else        gcfg &= ~MDC_GCFG_VDSE;
-
-	WRITE_REG32 (MDC_UNLOCK, MDC_UNLOCK_VALUE);
-	WRITE_REG32 (MDC_GENERAL_CFG, gcfg);
-	WRITE_REG32 (MDC_UNLOCK, unlock);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_test_timing_active
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-int gu2_test_timing_active(void)
-#else
-int gfx_test_timing_active(void)
-#endif
-{
-	if (READ_REG32 (MDC_DISPLAY_CFG) & MDC_DCFG_TGEN)
-		return(1);
-	else return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_test_vertical_active
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-int gu2_test_vertical_active(void)
-#else
-int gfx_test_vertical_active(void)
-#endif
-{
-	if (READ_REG32 (MDC_LINE_CNT_STATUS) & MDC_LNCNT_VNA)
-		return(0);
-
-	return(1);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_wait_vertical_blank
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-int gu2_wait_vertical_blank(void)
-#else
-int gfx_wait_vertical_blank(void)
-#endif
-{
-	if (gfx_test_timing_active())
-	{
-		while(!gfx_test_vertical_active());
-		while(gfx_test_vertical_active());
-	}
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_enable_panning 
- *
- * This routine  enables the panning when the Mode is bigger than the panel
- * size.
- *---------------------------------------------------------------------------
- */
-
-#if GFX_DISPLAY_DYNAMIC
-void gu2_enable_panning( int x, int y)
-#else
-void gfx_enable_panning(int x, int y) 
-#endif
-{
-    unsigned long modeBytesPerPixel;
-    unsigned long modeBytesPerScanline = 0;
-    unsigned long startAddress = 0;
-        
-    modeBytesPerPixel    =   (gbpp + 7)/8;
-	modeBytesPerScanline = (((ModeWidth + 1023) / 1024) * 1024) * modeBytesPerPixel;
-
-	/* TEST FOR NO-WORK */
-
-	if (x >= DeltaX && x < ((int)PanelWidth  + DeltaX) && 
-		y >= DeltaY && y < ((int)PanelHeight + DeltaY))
-		return;
-
-
-	/* ADJUST PANNING VARIABLES WHEN CURSOR EXCEEDS BOUNDARY       */
-	/* Test the boundary conditions for each coordinate and update */
-	/* all variables and the starting offset accordingly.          */
-	
-	if (x < DeltaX)
-		DeltaX = x;
-
-	else if (x >= (DeltaX + (int)PanelWidth))
-		DeltaX = x - (int)PanelWidth + 1;
-
-	if (y < DeltaY)
-		DeltaY = y;
-
-	else if (y >= (DeltaY + (int)PanelHeight))
-		DeltaY = y - (int)PanelHeight + 1; 
-
-
-	/* CALCULATE THE START OFFSET */
-
-	startAddress = (DeltaX * modeBytesPerPixel) + (DeltaY * modeBytesPerScanline);
-	
-	gfx_set_display_offset(startAddress);
-
-	/* SET PANEL COORDINATES                    */
-	/* Panel's x position must be DWORD aligned */
-
-    panelTop  = DeltaY;
-	panelLeft = DeltaX * modeBytesPerPixel;
-
-	if (panelLeft & 3)
-		panelLeft = (panelLeft & 0xFFFFFFFC) + 4;
-
-	panelLeft /= modeBytesPerPixel;
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_fixed_timings
- *---------------------------------------------------------------------------
- */
-
-#if GFX_DISPLAY_DYNAMIC
-int gu2_set_fixed_timings(int panelResX, int panelResY, unsigned short width, unsigned short height, unsigned short bpp)
-#else
-int gfx_set_fixed_timings(int panelResX, int panelResY, unsigned short width, unsigned short height,  unsigned short bpp)
-#endif
-{
-	int mode;
-
-	ModeWidth   = width;
-	ModeHeight  = height;
-	PanelWidth  = (unsigned short)panelResX;
-	PanelHeight = (unsigned short)panelResY;
-	PanelEnable = 1;
-
-	/* LOOP THROUGH THE AVAILABLE MODES TO FIND A MATCH */
-	for (mode = 0; mode < NUM_FIXED_TIMINGS_MODES; mode++) {
-		if ((FixedParams[mode].xres == width) &&
-			(FixedParams[mode].yres == height) &&
-			(FixedParams[mode].panelresx == panelResX) &&
-			(FixedParams[mode].panelresy == panelResY)) {
-
-			/* SET THE 92xx FOR THE SELECTED MODE */
-			FIXEDTIMINGS *fmode = &FixedParams[mode];
-
-			gfx_set_display_timings(bpp, 3, fmode->hactive,fmode->hblankstart, fmode->hsyncstart, fmode->hsyncend,
-				fmode->hblankend, fmode->htotal, fmode->vactive, fmode->vblankstart, 
-				fmode->vsyncstart,	fmode->vsyncend, fmode->vblankend, fmode->vtotal, fmode->frequency);  										
-	
-			return(1);
-			} /* end if() */
-		} /* end for() */
-
-	return(-1);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_panel_present
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-int gu2_set_panel_present(int panelResX, int panelResY, unsigned short width, unsigned short height, unsigned short bpp)
-#else
-int gfx_set_panel_present(int panelResX, int panelResY, unsigned short width, unsigned short height, unsigned short bpp)
-#endif
-{
-	/* SET VALID BPP         */
-	/* 16BPP is the default. */
-
-	if (bpp != 8 && bpp != 12 && bpp != 15 && bpp != 16 && bpp != 32)
-		bpp = 16;
-
-	/* RECORD PANEL PARAMETERS */
-	/* This routine does not touch any panel timings.  It is used when custom panel */
-	/* settings are set up in advance by the BIOS or an application, but the        */
-	/* application still requires access to other panel functionality provided by   */
-	/* Durango (i.e. panning).                                                      */
-
-	ModeWidth   = width;
-	ModeHeight  = height;
-	PanelWidth  = (unsigned short)panelResX;
-	PanelHeight = (unsigned short)panelResY;
-	PanelEnable = 1;
-	gbpp        = bpp;
-
-	/* PROGRAM THE BPP IN THE DISPLAY CONTROLLER */
-
-	gfx_set_display_bpp (bpp);
-
-	return(GFX_STATUS_OK);
-}
-
-/* THE FOLLOWING READ ROUTINES ARE ALWAYS INCLUDED: */
-
-/*---------------------------------------------------------------------------
- * gfx_get_display_pitch
- *
- * This routine returns the current pitch of the frame buffer, in bytes.
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-unsigned short gu2_get_display_pitch(void)
-#else
-unsigned short gfx_get_display_pitch(void)
-#endif
-{	
-	return ((unsigned short)(READ_REG32 (MDC_GFX_PITCH) & 0x0000FFFF) << 3);
-}
-
-/*----------------------------------------------------------------------------
- * gfx_mode_frequency_supported
- *
- * This routine examines if the requested mode with pixel frequency is supported.
- *
- * Returns >0 if successful , <0 if freq. could not be found and matched.
- *----------------------------------------------------------------------------  
- */
-#if GFX_DISPLAY_DYNAMIC
-int gu2_mode_frequency_supported(int xres, int yres, int bpp, unsigned long frequency)
-#else
-int gfx_mode_frequency_supported(int xres, int yres, int bpp, unsigned long frequency)
-#endif
-{
-	int index;
-	unsigned long value;
-	unsigned long bpp_flag = 0;
-
-	switch (bpp)
-	{
-	    case 8:  bpp_flag = GFX_MODE_8BPP;  break;
-		case 12: bpp_flag = GFX_MODE_12BPP; break;
-		case 15: bpp_flag = GFX_MODE_15BPP; break;
-		case 16: bpp_flag = GFX_MODE_16BPP; break;
-		case 32: bpp_flag = GFX_MODE_24BPP; break;
-		default: bpp_flag = GFX_MODE_8BPP;  break;
-	}
-
-	for (index = 0; index < NUM_RC_DISPLAY_MODES; index++)
-	{
-		if ((DisplayParams[index].hactive == (unsigned int)xres) &&
-			(DisplayParams[index].vactive == (unsigned int)yres) &&
-			(DisplayParams[index].flags & bpp_flag) &&
-			(DisplayParams[index].frequency == frequency))
-		{
-			int hz=0;
-			value = DisplayParams[index].flags;
-
-			if (value & GFX_MODE_60HZ)      hz = 60;
-			else if (value & GFX_MODE_70HZ) hz = 70;
-			else if (value & GFX_MODE_72HZ) hz = 72;
-			else if (value & GFX_MODE_75HZ) hz = 75;
-			else if (value & GFX_MODE_85HZ) hz = 85;
-			return(hz);
-		}
-	}
-
-	return(-1);
-}
-
-/*----------------------------------------------------------------------------
- * gfx_refreshrate_from_frequency
- *
- * This routine maps the frequency to close match refresh rate
- *
- * Returns .
- *----------------------------------------------------------------------------  
- */
-#if GFX_DISPLAY_DYNAMIC
-int gu2_get_refreshrate_from_frequency(int xres, int yres, int bpp, int *hz, unsigned long frequency)
-#else
-int gfx_get_refreshrate_from_frequency(int xres, int yres, int bpp, int *hz, unsigned long frequency)
-#endif
-{
-	int index, closematch=0;
-	unsigned long value;
-	unsigned long bpp_flag = 0;
-	long min, diff;
-	
-	*hz = 60;
-
-	switch (bpp)
-	{
-	    case 8:  bpp_flag = GFX_MODE_8BPP;  break;
-		case 12: bpp_flag = GFX_MODE_12BPP; break;
-		case 15: bpp_flag = GFX_MODE_15BPP; break;
-		case 16: bpp_flag = GFX_MODE_16BPP; break;
-		case 32: bpp_flag = GFX_MODE_24BPP; break;
-		default: bpp_flag = GFX_MODE_8BPP;  break;
-	}
-
-	/* FIND THE REGISTER VALUES FOR THE DESIRED FREQUENCY */
-	/* Search the table for the closest frequency (16.16 format). */
-
-	min = 0x7fffffff;
-	for (index = 0; index < NUM_RC_DISPLAY_MODES; index++)
-	{
-		if ((DisplayParams[index].htotal == (unsigned int)xres) &&
-			(DisplayParams[index].vtotal == (unsigned int)yres) &&
-			(DisplayParams[index].flags & bpp_flag)) 
-		{
-			diff = (long)frequency - (long)DisplayParams[index].frequency;
-			if(diff < 0) diff = -diff;
-			
-			if (diff < min)
-			{
-				min = diff; 
-				closematch = index;
-			} 
-		}
-	}
-	
-	value = DisplayParams[closematch].flags;
-
-	if      (value & GFX_MODE_56HZ) *hz = 56;
-	else if (value & GFX_MODE_60HZ) *hz = 60;
-	else if (value & GFX_MODE_70HZ) *hz = 70;
-	else if (value & GFX_MODE_72HZ) *hz = 72;
-	else if (value & GFX_MODE_75HZ) *hz = 75;
-	else if (value & GFX_MODE_85HZ) *hz = 85;
-
-	return(1);
-}
-
-/*----------------------------------------------------------------------------
- * gfx_refreshrate_from_mode
- *
- * This routine is identical to the gfx_get_refreshrate_from_frequency,
- * except that the active timing values are compared instead of the total
- * values.  Some modes (such as 70Hz and 72Hz) may be confused in this routine.
- *
- * Returns .
- *----------------------------------------------------------------------------  
- */
-#if GFX_DISPLAY_DYNAMIC
-int gu2_get_refreshrate_from_mode(int xres, int yres, int bpp, int *hz, unsigned long frequency)
-#else
-int gfx_get_refreshrate_from_mode(int xres, int yres, int bpp, int *hz, unsigned long frequency)
-#endif
-{
-	int index, closematch=0;
-	unsigned long value;
-	unsigned long bpp_flag = 0;
-	long min, diff;
-	
-	*hz = 60;
-
-	switch (bpp)
-	{
-	    case 8:  bpp_flag = GFX_MODE_8BPP;  break;
-		case 12: bpp_flag = GFX_MODE_12BPP; break;
-		case 15: bpp_flag = GFX_MODE_15BPP; break;
-		case 16: bpp_flag = GFX_MODE_16BPP; break;
-		case 32: bpp_flag = GFX_MODE_24BPP; break;
-		default: bpp_flag = GFX_MODE_8BPP;  break;
-	}
-
-	/* FIND THE REGISTER VALUES FOR THE DESIRED FREQUENCY */
-	/* Search the table for the closest frequency (16.16 format). */
-
-	min = 0x7fffffff;
-	for (index = 0; index < NUM_RC_DISPLAY_MODES; index++)
-	{
-		if ((DisplayParams[index].hactive == (unsigned int)xres) &&
-			(DisplayParams[index].vactive == (unsigned int)yres) &&
-			(DisplayParams[index].flags & bpp_flag)) 
-		{
-			diff = (long)frequency - (long)DisplayParams[index].frequency;
-			if(diff < 0) diff = -diff;
-			
-			if (diff < min)
-			{
-				min = diff; 
-				closematch = index;
-			} 
-		}
-	}
-	
-	value = DisplayParams[closematch].flags;
-
-	if      (value & GFX_MODE_56HZ) *hz = 56;
-	else if (value & GFX_MODE_60HZ) *hz = 60;
-	else if (value & GFX_MODE_70HZ) *hz = 70;
-	else if (value & GFX_MODE_72HZ) *hz = 72;
-	else if (value & GFX_MODE_75HZ) *hz = 75;
-	else if (value & GFX_MODE_85HZ) *hz = 85;
-
-	return(1);
-}
-
-/*----------------------------------------------------------------------------
- * gfx_get_frequency_from_refreshrate
- *
- * This routine maps the refresh rate to the closest matching PLL frequency.
- *----------------------------------------------------------------------------  
- */
-#if GFX_DISPLAY_DYNAMIC
-int gu2_get_frequency_from_refreshrate(int xres, int yres, int bpp, int hz, int *frequency)
-#else
-int gfx_get_frequency_from_refreshrate(int xres, int yres, int bpp, int hz, int *frequency)
-#endif
-{
-	int index, retval = -1;
-	unsigned long hz_flag  = 0;
-	unsigned long bpp_flag = 0;
-	
-	*frequency = 0;
-
-	if      (hz == 60) hz_flag = GFX_MODE_60HZ;
-	else if (hz == 70) hz_flag = GFX_MODE_70HZ;
-	else if (hz == 72) hz_flag = GFX_MODE_72HZ;
-	else if (hz == 75) hz_flag = GFX_MODE_75HZ;
-	else if (hz == 85) hz_flag = GFX_MODE_85HZ;
-
-	switch (bpp)
-	{
-	    case 8:  bpp_flag = GFX_MODE_8BPP;  break;
-		case 12: bpp_flag = GFX_MODE_12BPP; break;
-		case 15: bpp_flag = GFX_MODE_15BPP; break;
-		case 16: bpp_flag = GFX_MODE_16BPP; break;
-		case 32: bpp_flag = GFX_MODE_24BPP; break;
-		default: bpp_flag = GFX_MODE_8BPP;  break;
-	}
-
-	/* FIND THE REGISTER VALUES FOR THE DESIRED FREQUENCY */
-	/* Search the table for the closest frequency (16.16 format). */
-
-	for (index = 0; index < NUM_RC_DISPLAY_MODES; index++)
-	{
-		if ((DisplayParams[index].hactive == (unsigned short)xres) &&
-			(DisplayParams[index].vactive == (unsigned short)yres) &&
-			(DisplayParams[index].flags & bpp_flag)  &&
-			(DisplayParams[index].flags & hz_flag)) 
-		{
-			*frequency = DisplayParams[index].frequency;
-			retval = 1;
-		}
-	}
-	return retval;
-}
-
-
-/*---------------------------------------------------------------------------
- * gfx_get_max_supported_pixel_clock
- *
- * This routine returns the maximum recommended speed for the pixel clock.  The 
- * return value is an integer of the format xxxyyy, where xxx.yyy is the maximum
- * floating point pixel clock speed.
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-unsigned long gu2_get_max_supported_pixel_clock (void)
-#else
-unsigned long gfx_get_max_supported_pixel_clock (void)
-#endif
-
-{
-    return 229500;
-}
-
-/*----------------------------------------------------------------------------
- * gfx_get_display_mode
- *
- * This routine gets the specified display mode.
- *
- * Returns >0 if successful and mode returned, <0 if mode could not be found.
- *----------------------------------------------------------------------------  
- */
-#if GFX_DISPLAY_DYNAMIC
-int gu2_get_display_mode(int *xres, int *yres, int *bpp, int *hz)
-#else
-int gfx_get_display_mode(int *xres, int *yres, int *bpp, int *hz)
-#endif
-{
-	int mode=0;
-	unsigned long pll_freq = 0, bpp_flag = 0;
-
-	*xres    = gfx_get_hactive();
-	*yres    = gfx_get_vactive();
-	*bpp     = gfx_get_display_bpp();
-	pll_freq = gfx_get_clock_frequency();
-
-	/* SET BPP FLAGS TO LIMIT MODE SELECTION */
-
-	switch (*bpp)
-	{
-	    case 8:  bpp_flag = GFX_MODE_8BPP;  break;
-		case 12: bpp_flag = GFX_MODE_12BPP; break;
-		case 15: bpp_flag = GFX_MODE_15BPP; break;
-		case 16: bpp_flag = GFX_MODE_16BPP; break;
-		case 32: bpp_flag = GFX_MODE_24BPP; break;
-		default: bpp_flag = GFX_MODE_8BPP;  break;
-	}
-
-	for (mode = 0; mode < NUM_RC_DISPLAY_MODES; mode++) {
-		if ((DisplayParams[mode].hactive == (unsigned int)*xres) &&
-			(DisplayParams[mode].vactive == (unsigned int)*yres) &&
-			(DisplayParams[mode].frequency == pll_freq) &&
-			(DisplayParams[mode].flags & bpp_flag)) {
-
-				pll_freq = DisplayParams[mode].flags;
-
-				if      (pll_freq & GFX_MODE_56HZ) *hz = 56;
-				else if (pll_freq & GFX_MODE_60HZ) *hz = 60;
-				else if (pll_freq & GFX_MODE_70HZ) *hz = 70;
-				else if (pll_freq & GFX_MODE_72HZ) *hz = 72;
-				else if (pll_freq & GFX_MODE_75HZ) *hz = 75;
-				else if (pll_freq & GFX_MODE_85HZ) *hz = 85;
-
-				return(1);
-			}
-		} 
-	return(-1);
-}
-
-/*----------------------------------------------------------------------------
- * GFX_GET_DISPLAY_DETAILS
- *
- * This routine gets the specified display mode.
- *
- * Returns 1 if successful, 0 if mode could not be get.
- *----------------------------------------------------------------------------  
- */
-#if GFX_DISPLAY_DYNAMIC
-int gu2_get_display_details(unsigned int mode, int *xres, int *yres, int *hz)
-#else
-int gfx_get_display_details(unsigned int mode, int *xres, int *yres, int *hz)
-#endif
-{
-	if(mode < NUM_RC_DISPLAY_MODES)
-	{
-		if(DisplayParams[mode].flags & GFX_MODE_56HZ)
-			*hz = 56;
-		else if(DisplayParams[mode].flags & GFX_MODE_60HZ)
-			*hz = 60;
-		else if(DisplayParams[mode].flags & GFX_MODE_70HZ)
-			*hz = 70;
-		else if(DisplayParams[mode].flags & GFX_MODE_72HZ)
-			*hz = 72;
-		else if(DisplayParams[mode].flags & GFX_MODE_75HZ)
-			*hz = 75;
-		else if(DisplayParams[mode].flags & GFX_MODE_85HZ)
-			*hz = 85;
-
-		*xres = DisplayParams[mode].hactive;
-		*yres = DisplayParams[mode].vactive;
-
-		if (DisplayParams[mode].flags & GFX_MODE_PIXEL_DOUBLE)
-			*xres >>= 1;
-		if (DisplayParams[mode].flags & GFX_MODE_LINE_DOUBLE)
-			*yres >>= 1;
-
-		return(1);
-	}
-	return(0);
-}
-
-/*----------------------------------------------------------------------------
- * GFX_GET_DISPLAY_MODE_COUNT
- *
- * This routine gets the number of available display modes.
- *----------------------------------------------------------------------------  
- */
-#if GFX_DISPLAY_DYNAMIC
-int gu2_get_display_mode_count(void)
-#else
-int gfx_get_display_mode_count(void)
-#endif
-{
-	return(NUM_RC_DISPLAY_MODES);
-}
-
-/*----------------------------------------------------------------------------
- * gfx_get_frame_buffer_line_size
- *
- * Returns the current frame buffer line size, in bytes
- *----------------------------------------------------------------------------  
- */
-#if GFX_DISPLAY_DYNAMIC
-unsigned long gu2_get_frame_buffer_line_size(void)
-#else
-unsigned long gfx_get_frame_buffer_line_size(void)
-#endif
-{
-	return ((READ_REG32 (MDC_LINE_SIZE) & 0x7FF) << 3);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_hactive
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-unsigned short gu2_get_hactive(void)
-#else
-unsigned short gfx_get_hactive(void)
-#endif
-{
-	return((unsigned short)((READ_REG32(MDC_H_ACTIVE_TIMING) & 0x0FF8) + 8));
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_hsync_start
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-unsigned short gu2_get_hsync_start(void)
-#else
-unsigned short gfx_get_hsync_start(void)
-#endif
-{
-	return ((unsigned short)((READ_REG32(MDC_H_SYNC_TIMING) & 0x0FF8) + 8));
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_hsync_end
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-unsigned short gu2_get_hsync_end(void)
-#else
-unsigned short gfx_get_hsync_end(void)
-#endif
-{
-	return((unsigned short)(((READ_REG32(MDC_H_SYNC_TIMING) >> 16) & 0x0FF8) + 8));
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_htotal
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-unsigned short gu2_get_htotal(void)
-#else
-unsigned short gfx_get_htotal(void)
-#endif
-{
-	return((unsigned short)(((READ_REG32(MDC_H_ACTIVE_TIMING) >> 16) & 0x0FF8) + 8));
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_vactive
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-unsigned short gu2_get_vactive(void)
-#else
-unsigned short gfx_get_vactive(void)
-#endif
-{
-    return((unsigned short)((READ_REG32(MDC_V_ACTIVE_TIMING) & 0x07FF) + 1));
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_vsync_end
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-unsigned short gu2_get_vsync_end(void)
-#else
-unsigned short gfx_get_vsync_end(void)
-#endif
-{
-	return((unsigned short)(((READ_REG32(MDC_V_SYNC_TIMING) >> 16) & 0x07FF) + 1));
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_vtotal
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-unsigned short gu2_get_vtotal(void)
-#else
-unsigned short gfx_get_vtotal(void)
-#endif
-{
-	return((unsigned short)(((READ_REG32(MDC_V_ACTIVE_TIMING) >> 16) & 0x07FF) + 1));
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_get_display_bpp
- *
- * This routine returns the current color depth of the active display.
- *-----------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-unsigned short gu2_get_display_bpp(void)
-#else
-unsigned short gfx_get_display_bpp(void)
-#endif
-{
-	unsigned long dcfg = READ_REG32 (MDC_DISPLAY_CFG);
-
-	switch ((dcfg & MDC_DCFG_DISP_MODE_MASK) >> 8)
-	{
-	    case 0: return (8);
-		case 2: return (32);
-
-		case 1: 
-			
-			switch ((dcfg & MDC_DCFG_16BPP_MODE_MASK) >> 10)
-			{
-			    case 0:  return (16);
-				case 1:  return (15);
-				case 2:  return (12);
-				default: return (0);
-			}
-	}
-
-	/* INVALID SETTING */
-
-	return (0);        
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_vline
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-unsigned short gu2_get_vline(void)
-#else
-unsigned short gfx_get_vline(void)
-#endif
-{
-	unsigned short current_scan_line;
-	
-	/* Read similar value twice to ensure that the value is not transitioning */
-	
-	do    current_scan_line  = (unsigned short)(READ_REG32(MDC_LINE_CNT_STATUS) & MDC_LNCNT_V_LINE_CNT);
-	while(current_scan_line != (unsigned short)(READ_REG32(MDC_LINE_CNT_STATUS) & MDC_LNCNT_V_LINE_CNT));
-		
-	return (current_scan_line >> 16);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_get_display_offset
- *-----------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-unsigned long gu2_get_display_offset(void)
-#else
-unsigned long gfx_get_display_offset(void)
-#endif
-{
-	return (READ_REG32(MDC_FB_ST_OFFSET) & 0x0FFFFFFF);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_get_cursor_offset
- *-----------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-unsigned long gu2_get_cursor_offset(void)
-#else
-unsigned long gfx_get_cursor_offset(void)
-#endif
-{
-	return (READ_REG32(MDC_CURS_ST_OFFSET) & 0x0FFFFFFF);
-}
-
-#if GFX_READ_ROUTINES
-
-/*************************************************************/
-/*  READ ROUTINES  |  INCLUDED FOR DIAGNOSTIC PURPOSES ONLY  */
-/*************************************************************/
-
-/*---------------------------------------------------------------------------
- * gfx_get_hblank_start
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-unsigned short gu2_get_hblank_start(void)
-#else
-unsigned short gfx_get_hblank_start(void)
-#endif
-{
-	return ((unsigned short)((READ_REG32(MDC_H_BLANK_TIMING) & 0x0FF8) + 8));
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_hblank_end
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-unsigned short gu2_get_hblank_end(void)
-#else
-unsigned short gfx_get_hblank_end(void)
-#endif
-{
-	return ((unsigned short)(((READ_REG32(MDC_H_BLANK_TIMING) >> 16) & 0x0FF8) + 8));
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_vblank_start
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-unsigned short gu2_get_vblank_start(void)
-#else
-unsigned short gfx_get_vblank_start(void)
-#endif
-{
-	return ((unsigned short)((READ_REG32(MDC_V_BLANK_TIMING) & 0x07FF) + 1));
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_vsync_start
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-unsigned short gu2_get_vsync_start(void)
-#else
-unsigned short gfx_get_vsync_start(void)
-#endif
-{
-	return ((unsigned short)((READ_REG32(MDC_V_SYNC_TIMING) & 0x07FF) + 1));
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_vblank_end
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-unsigned short gu2_get_vblank_end(void)
-#else
-unsigned short gfx_get_vblank_end(void)
-#endif
-{
-	return ((unsigned short)(((READ_REG32(MDC_V_BLANK_TIMING) >> 16) & 0x07FF) + 1));
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_get_display_palette_entry
- *-----------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-int gu2_get_display_palette_entry(unsigned long index, unsigned long *palette)
-#else
-int gfx_get_display_palette_entry(unsigned long index, unsigned long *palette)
-#endif
-{
-	if (index > 0xFF)
-		return GFX_STATUS_BAD_PARAMETER;
-
-	WRITE_REG32(MDC_PAL_ADDRESS, index);
-	*palette = READ_REG32(MDC_PAL_DATA);
-	
-	return 0;
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_get_display_palette
- *-----------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-void gu2_get_display_palette(unsigned long *palette)
-#else
-void gfx_get_display_palette(unsigned long *palette)
-#endif
-{
-	unsigned long i;
-
-	WRITE_REG32(MDC_PAL_ADDRESS, 0);
-	for (i = 0; i < 256; i++)
-	{
-		palette[i] = READ_REG32(MDC_PAL_DATA);
-	}
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_get_cursor_enable
- *-----------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-unsigned long gu2_get_cursor_enable(void)
-#else
-unsigned long gfx_get_cursor_enable(void)
-#endif
-{
-	return (READ_REG32(MDC_GENERAL_CFG) & MDC_GCFG_CURE);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_get_cursor_position
- *-----------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-unsigned long gu2_get_cursor_position(void)
-#else
-unsigned long gfx_get_cursor_position(void)
-#endif
-{
-	return((READ_REG32(MDC_CURSOR_X) & 0x07FF) |
-		  ((READ_REG32(MDC_CURSOR_Y) << 16) & 0x03FF0000));
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_get_cursor_offset
- *-----------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-unsigned long gu2_get_cursor_clip(void)
-#else
-unsigned long gfx_get_cursor_clip(void)
-#endif
-{
-	return (((READ_REG32(MDC_CURSOR_X) >> 11) & 0x03F) |
-		    ((READ_REG32(MDC_CURSOR_Y) << 5)  & 0x3F0000));
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_get_cursor_color
- *-----------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-unsigned long gu2_get_cursor_color(int color)
-#else
-unsigned long gfx_get_cursor_color(int color)
-#endif
-{
-	if (color) 
-	{
-		WRITE_REG32(MDC_PAL_ADDRESS, 0x101);
-	}
-	else
-	{
-		WRITE_REG32(MDC_PAL_ADDRESS, 0x100);
-	}
-	return READ_REG32(MDC_PAL_DATA);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_get_icon_enable
- *-----------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-unsigned long gu2_get_icon_enable(void)
-#else
-unsigned long gfx_get_icon_enable(void)
-#endif
-{
-	return (READ_REG32(MDC_GENERAL_CFG) & MDC_GCFG_ICNE);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_get_icon_offset
- *-----------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-unsigned long gu2_get_icon_offset(void)
-#else
-unsigned long gfx_get_icon_offset(void)
-#endif
-{
-	return (READ_REG32(MDC_ICON_ST_OFFSET) & 0x0FFFFFFF);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_get_icon_position
- *-----------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-unsigned long gu2_get_icon_position(void)
-#else
-unsigned long gfx_get_icon_position(void)
-#endif
-{
-	return (READ_REG32(MDC_ICON_X) & 0x07FF);		  
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_get_icon_color
- *-----------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-unsigned long gu2_get_icon_color(int color)
-#else
-unsigned long gfx_get_icon_color(int color)
-#endif
-{
-	if (color >= 3)
-		return 0;
-
-	WRITE_REG32(MDC_PAL_ADDRESS, 0x102 + color);
-	
-	return READ_REG32(MDC_PAL_DATA);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_get_compression_enable
- *-----------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-int gu2_get_compression_enable(void)
-#else
-int gfx_get_compression_enable(void)
-#endif
-{
-	if (READ_REG32 (MDC_GENERAL_CFG) & MDC_GCFG_CMPE) 
-		return (1);
-	
-	return(0);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_get_compression_offset
- *-----------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-unsigned long gu2_get_compression_offset(void)
-#else
-unsigned long gfx_get_compression_offset(void)
-#endif
-{
-	return (READ_REG32(MDC_CB_ST_OFFSET) & 0x007FFFFF);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_get_compression_pitch
- *-----------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-unsigned short gu2_get_compression_pitch(void)
-#else
-unsigned short gfx_get_compression_pitch(void)
-#endif
-{
-	unsigned short pitch;
-	pitch = (unsigned short)(READ_REG32(MDC_GFX_PITCH) >> 16);
-	return (pitch << 3);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_get_compression_size
- *-----------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-unsigned short gu2_get_compression_size(void)
-#else
-unsigned short gfx_get_compression_size(void)
-#endif
-{
-	unsigned short size;
-	size = (unsigned short)((READ_REG32(MDC_LINE_SIZE) >> 16) & 0x7F) - 1;
-	return ((size << 3) + 32);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_get_valid_bit
- *-----------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-int gu2_get_valid_bit(int line)
-#else
-int gfx_get_valid_bit(int line)
-#endif
-{
-	unsigned long offset;
-	int valid;
-	
-	offset  = READ_REG32 (MDC_PHY_MEM_OFFSET) & 0xFF000000;
-	offset |= line;
-
-	WRITE_REG32(MDC_PHY_MEM_OFFSET, offset);
-	valid = (int)READ_REG32 (MDC_DV_ACC) & 2;
-	
-	if (valid) return 1;
-	return 0;
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_display_video_offset (PRIVATE ROUTINE - NOT PART OF API)
- *
- * This routine is called by "gfx_get_video_offset".  It abstracts the 
- * version of the display controller from the video overlay routines.
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-unsigned long gu2_get_display_video_offset(void)
-#else
-unsigned long gfx_get_display_video_offset(void)
-#endif
-{
-    return (READ_REG32(MDC_VID_Y_ST_OFFSET) & 0x0FFFFFFF);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_display_video_yuv_offsets (PRIVATE ROUTINE - NOT PART OF API)
- *
- * This routine is called by "gfx_get_video_yuv_offsets".  It abstracts the 
- * version of the display controller from the video overlay routines.
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-void gu2_get_display_video_yuv_offsets(unsigned long *yoffset, unsigned long *uoffset, 
-									   unsigned long *voffset)
-#else
-void gfx_get_display_video_yuv_offsets(unsigned long *yoffset, unsigned long *uoffset, 
-									   unsigned long *voffset)
-#endif
-{
-    *yoffset = (READ_REG32(MDC_VID_Y_ST_OFFSET) & 0x0FFFFFFF);
-	*uoffset = (READ_REG32(MDC_VID_U_ST_OFFSET) & 0x0FFFFFFF);
-	*voffset = (READ_REG32(MDC_VID_V_ST_OFFSET) & 0x0FFFFFFF);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_display_video_yuv_pitch (PRIVATE ROUTINE - NOT PART OF API)
- *
- * This routine is called by "gfx_get_video_yuv_pitch".  It abstracts the 
- * version of the display controller from the video overlay routines.
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-void gu2_get_display_video_yuv_pitch(unsigned long *ypitch, unsigned long *uvpitch) 
-#else
-void gfx_get_display_video_yuv_pitch(unsigned long *ypitch, unsigned long *uvpitch)
-#endif
-{
-	unsigned long pitch = READ_REG32 (MDC_VID_YUV_PITCH);
-	
-	*ypitch = ((pitch & 0xFFFF) << 3);
-	*uvpitch = (pitch >> 13) & 0x7FFF8;
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_display_video_downscale_delta (PRIVATE ROUTINE - NOT PART OF API)
- *
- * This routine is called by "gfx_get_video_downscale_delta".  It abstracts the 
- * version of the display controller from the video overlay routines.
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-unsigned long gu2_get_display_video_downscale_delta(void) 
-#else
-unsigned long gfx_get_display_video_downscale_delta(void) 
-#endif
-{
-	return (READ_REG32(MDC_VID_DS_DELTA) >> 18);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_display_video_downscale_enable (PRIVATE ROUTINE - NOT PART OF API)
- *
- * This routine is called by "gfx_get_video_vertical_downscale_enable".  It abstracts the 
- * version of the display controller from the video overlay routines.
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-int gu2_get_display_video_downscale_enable(void) 
-#else
-int gfx_get_display_video_downscale_enable(void) 
-#endif
-{
-	return ((int)((READ_REG32(MDC_GENERAL_CFG) >> 19) & 1));
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_display_video_size (PRIVATE ROUTINE - NOT PART OF API)
- *
- * This routine is called by "gfx_get_video_size".  It abstracts the 
- * version of the display controller from the video overlay routines.
- *---------------------------------------------------------------------------
- */
-#if GFX_DISPLAY_DYNAMIC
-unsigned long gu2_get_display_video_size(void)
-#else
-unsigned long gfx_get_display_video_size(void)
-#endif
-{
-	/* RETURN THE LINE SIZE, AS THIS IS ALL THAT IS AVAILABLE */
-
-	return((READ_REG32(MDC_LINE_SIZE) >> 21) & 0x000007FF);
-}
-
-#endif /* GFX_READ_ROUTINES */
-
-/* END OF FILE */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/gfx_disp.c b/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/gfx_disp.c
deleted file mode 100644
index c11900b6b..000000000
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/gfx_disp.c
+++ /dev/null
@@ -1,2153 +0,0 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/gfx_disp.c,v 1.2 2002/10/18 20:02:40 tsi Exp $ */
-/*
- * $Workfile: gfx_disp.c $
- *
- * This file contains routines to program the display controller.  
- *
- * The "disp_gu1.c" and "disp_gu2.c" files implement the following routines:
- *
- *    gfx_get_display_mode_count
- *    gfx_get_display_mode
- *    gfx_is_display_mode_supported
- *    gfx_get_display_details
- *    gfx_set_display_mode
- *    gfx_set_display_bpp
- *	  gfx_set_display_timings
- *    gfx_set_vtotal
- *    gfx_get_display_pitch
- *    gfx_set_display_pitch
- *    gfx_set_display_offset
- *    gfx_set_display_palette
- *    gfx_set_display_palette_entry
- *    gfx_set_cursor_enable
- *    gfx_set_cursor_colors
- *    gfx_set_cursor_position
- *	  gfx_set_cursor_shape32
- *	  gfx_set_cursor_shape64
- *    gfx_set_icon_enable
- *    gfx_set_icon_colors
- *    gfx_set_icon_position
- *    gfx_set_icon_shape64
- *    gfx_set_compression_enable
- *    gfx_set_compression_offset
- *    gfx_set_compression_pitch
- *    gfx_set_compression_size
- *    gfx_set_display_priority_high
- *    gfx_test_timing_active
- *    gfx_test_vertical_active
- *    gfx_wait_vertical_blank
- *    gfx_reset_timing_lock
- *
- * And the following routines if GFX_READ_ROUTINES is set:
- *	
- *	  gfx_get_hactive
- *    gfx_get_hblank_start
- *    gfx_get_hsync_start
- *    gfx_get_hsync_end
- *    gfx_get_hblank_end
- *    gfx_get_htotal
- *    gfx_get_vactive
- *    gfx_get_vblank_start
- *    gfx_get_vsync_start
- *    gfx_get_vsync_end
- *    gfx_get_vblank_end
- *    gfx_get_vtotal
- *    gfx_get_vline
- *    gfx_get_display_bpp
- *    gfx_get_display_offset
- *    gfx_get_display_palette
- *    gfx_get_cursor_enable
- *    gfx_get_cursor_base
- *    gfx_get_cursor_position
- *    gfx_get_cursor_offset
- *    gfx_get_cursor_color
- *    gfx_get_icon_enable
- *    gfx_get_icon_color
- *    gfx_get_icon_offset
- *    gfx_get_icon_position
- *    gfx_get_compression_enable
- *    gfx_get_compression_offset
- *    gfx_get_compression_pitch
- *    gfx_get_compression_size
- *    gfx_get_display_priority_high
- *    gfx_get_valid_bit
- *
- * NSC_LIC_ALTERNATIVE_PREAMBLE
- *
- * Revision 1.0
- *
- * National Semiconductor Alternative GPL-BSD License
- *
- * National Semiconductor Corporation licenses this software 
- * ("Software"):
- *
- *      Durango
- *
- * under one of the two following licenses, depending on how the 
- * Software is received by the Licensee.
- * 
- * If this Software is received as part of the Linux Framebuffer or
- * other GPL licensed software, then the GPL license designated 
- * NSC_LIC_GPL applies to this Software; in all other circumstances 
- * then the BSD-style license designated NSC_LIC_BSD shall apply.
- *
- * END_NSC_LIC_ALTERNATIVE_PREAMBLE */
-
-/* NSC_LIC_BSD
- *
- * National Semiconductor Corporation Open Source License for Durango
- *
- * (BSD License with Export Notice)
- *
- * Copyright (c) 1999-2001
- * National Semiconductor Corporation.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without 
- * modification, are permitted provided that the following conditions 
- * are met: 
- *
- *   * Redistributions of source code must retain the above copyright 
- *     notice, this list of conditions and the following disclaimer. 
- *
- *   * Redistributions in binary form must reproduce the above 
- *     copyright notice, this list of conditions and the following 
- *     disclaimer in the documentation and/or other materials provided 
- *     with the distribution. 
- *
- *   * Neither the name of the National Semiconductor Corporation nor 
- *     the names of its contributors may be used to endorse or promote 
- *     products derived from this software without specific prior 
- *     written permission. 
- * 
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
- * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
- * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE,
- * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
- * OF SUCH DAMAGE.
- *
- * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
- * YOUR JURISDICTION. It is licensee's responsibility to comply with 
- * any export regulations applicable in licensee's jurisdiction. Under 
- * CURRENT (2001) U.S. export regulations this software 
- * is eligible for export from the U.S. and can be downloaded by or 
- * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
- * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
- * Syria, Sudan, Afghanistan and any other country to which the U.S. 
- * has embargoed goods and services. 
- *
- * END_NSC_LIC_BSD */
-
-/* NSC_LIC_GPL
- *
- * National Semiconductor Corporation Gnu General Public License for Durango
- *
- * (GPL License with Export Notice)
- *
- * Copyright (c) 1999-2001
- * National Semiconductor Corporation.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without 
- * modification, are permitted under the terms of the GNU General 
- * Public License as published by the Free Software Foundation; either 
- * version 2 of the License, or (at your option) any later version  
- *
- * In addition to the terms of the GNU General Public License, neither 
- * the name of the National Semiconductor Corporation nor the names of 
- * its contributors may be used to endorse or promote products derived 
- * from this software without specific prior written permission. 
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
- * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
- * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, 
- * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
- * OF SUCH DAMAGE. See the GNU General Public License for more details. 
- *
- * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
- * YOUR JURISDICTION. It is licensee's responsibility to comply with 
- * any export regulations applicable in licensee's jurisdiction. Under 
- * CURRENT (2001) U.S. export regulations this software 
- * is eligible for export from the U.S. and can be downloaded by or 
- * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
- * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
- * Syria, Sudan, Afghanistan and any other country to which the U.S. 
- * has embargoed goods and services. 
- *
- * You should have received a copy of the GNU General Public License 
- * along with this file; if not, write to the Free Software Foundation, 
- * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 
- *
- * END_NSC_LIC_GPL */
-
-unsigned short PanelWidth=0;
-unsigned short PanelHeight=0;
-unsigned short PanelEnable=0;
-unsigned short ModeWidth; 
-unsigned short ModeHeight;
-
-int	DeltaX=0;
-int	DeltaY=0;
-unsigned long prevstartAddr =0;
-unsigned long panelTop      =0;
-unsigned long panelLeft     =0;
-
-int gbpp=8;
-
-int gfx_compression_enabled = 0;
-int gfx_compression_active  = 0;
-int gfx_line_double         = 0;
-int gfx_pixel_double        = 0;
-int gfx_timing_lock         = 0;
-int gfx_dont_program        = 0;
-DISPLAYMODE gfx_display_mode;
-
-/* DISPLAY MODE TIMINGS */
-
-DISPLAYMODE DisplayParams[] = {
-
-/* 320 x 200 */
-
-{ GFX_MODE_70HZ |                                   /* refresh rate = 60  */
-  GFX_MODE_8BPP | GFX_MODE_16BPP |					/* 8 and 16 BPP valid */
-  GFX_MODE_NEG_HSYNC |			                    /* negative HSYNC     */
-  GFX_MODE_PIXEL_DOUBLE |                           /* Double width       */
-  GFX_MODE_LINE_DOUBLE,                             /* Double height      */
-  0x140, 0x288, 0x290, 0x2F0, 0x318, 0x320,     	/* horizontal timings */
-  0x0C8, 0x197, 0x19C, 0x19E, 0x1BA, 0x1C1,         /* vertical timings   */
-  0x00192CCC, 										/* freq = 25.175 MHz  */
-},
-
-/* 320 x 240 */
-
-{ GFX_MODE_75HZ |									/* refresh rate = 75  */
-  GFX_MODE_8BPP | GFX_MODE_16BPP |					/* 8 and 16 BPP valid */
-  GFX_MODE_NEG_HSYNC | GFX_MODE_NEG_VSYNC |			/* negative syncs     */
-  GFX_MODE_PIXEL_DOUBLE |                           /* Double width       */
-  GFX_MODE_LINE_DOUBLE,                             /* Double height      */
-  0x0140, 0x0280, 0x0290, 0x02D0, 0x0348, 0x0348,	/* horizontal timings */
-  0x00F0, 0x01E0, 0x01E1, 0x01E4, 0x01F4, 0x01F4,	/* vertical timings   */
-  0x001F8000, 										/* freq = 31.5 MHz    */
-},
-
-/* 400 x 300 */
-
-{ GFX_MODE_75HZ |									/* refresh rate = 75  */
-  GFX_MODE_8BPP | GFX_MODE_16BPP |					/* 8 and 16 BPP valid */
-  GFX_MODE_PIXEL_DOUBLE |                           /* Double width       */
-  GFX_MODE_LINE_DOUBLE,                             /* Double height      */
-  0x0190, 0x0320, 0x0330, 0x0380, 0x0420, 0x0420,   /* horizontal timings */
-  0x012C, 0x0258, 0x0259, 0x025C, 0x0271, 0x0271,	/* vertical timings   */
-  0x00318000, 										/* freq = 49.5 MHz    */
-},
-
-/* 512 x 384 */
-
-{ GFX_MODE_75HZ |									/* refresh rate = 75  */
-  GFX_MODE_8BPP | GFX_MODE_16BPP |					/* 8 and 16 BPP valid */
-  GFX_MODE_PIXEL_DOUBLE |                           /* Double width       */
-  GFX_MODE_LINE_DOUBLE,                             /* Double height      */
-  0x0200, 0x0400, 0x0410, 0x0470, 0x0520, 0x0520,   /* horizontal timings */
-  0x0180, 0x0300, 0x0301, 0x0304, 0x0320, 0x0320,   /* vertical timings   */
-  0x004EC000,									    /* freq = 78.75 MHz   */
-},
-
-/* 640 x 400 */
-
-{ GFX_MODE_70HZ |                                   /* refresh rate = 60  */
-  GFX_MODE_8BPP | GFX_MODE_12BPP | GFX_MODE_15BPP | /* all BPP valid      */
-  GFX_MODE_16BPP | GFX_MODE_24BPP |
-  GFX_MODE_NEG_HSYNC,			                    /* negative HSYNC     */
-  0x280, 0x288, 0x290, 0x2F0, 0x318, 0x320,     	/* horizontal timings */
-  0x190, 0x197, 0x19C, 0x19E, 0x1BA, 0x1C1,         /* vertical timings   */
-  0x00192CCC, 										/* freq = 25.175 MHz  */
-},
-
-/* 640x480 */
-
-{ GFX_MODE_60HZ |									/* refresh rate = 60  */
-  GFX_MODE_8BPP | GFX_MODE_12BPP | GFX_MODE_15BPP | /* all BPP valid      */
-  GFX_MODE_16BPP | GFX_MODE_24BPP |
-  GFX_MODE_NEG_HSYNC | GFX_MODE_NEG_VSYNC,			/* negative syncs     */
-  0x0280, 0x0288, 0x0290, 0x02E8, 0x0318, 0x0320,	/* horizontal timings */
-  0x01E0, 0x01E8, 0x01EA, 0x01EC, 0x0205, 0x020D,   /* vertical timings   */
-  0x00192CCC, 										/* freq = 25.175 MHz  */
-},
-
-{ GFX_MODE_72HZ |									/* refresh rate = 72  */
-  GFX_MODE_8BPP | GFX_MODE_12BPP | GFX_MODE_15BPP | /* all BPP valid      */
-  GFX_MODE_16BPP | GFX_MODE_24BPP |
-  GFX_MODE_NEG_HSYNC | GFX_MODE_NEG_VSYNC,			/* negative syncs     */
-  0x0280, 0x0288, 0x0298, 0x02c0, 0x0338, 0x0340,	/* horizontal timings */
-  0x01e0, 0x01e8, 0x01e9, 0x01ec, 0x0200, 0x0208,   /* vertical timings   */
-  0x001F8000, 										/* freq = 31.5 MHz    */
-},
-
-{ GFX_MODE_75HZ |									/* refresh rate = 75  */
-  GFX_MODE_8BPP | GFX_MODE_12BPP | GFX_MODE_15BPP | /* all BPP valid      */
-  GFX_MODE_16BPP | GFX_MODE_24BPP |
-  GFX_MODE_NEG_HSYNC | GFX_MODE_NEG_VSYNC,			/* negative syncs     */
-  0x0280, 0x0280, 0x0290, 0x02D0, 0x0348, 0x0348,	/* horizontal timings */
-  0x01E0, 0x01E0, 0x01E1, 0x01E4, 0x01F4, 0x01F4,	/* vertical timings   */
-  0x001F8000, 										/* freq = 31.5 MHz    */
-},
-
-{ GFX_MODE_85HZ |									/* refresh rate = 85  */
-  GFX_MODE_8BPP | GFX_MODE_12BPP | GFX_MODE_15BPP | /* all BPP valid      */
-  GFX_MODE_16BPP | GFX_MODE_24BPP | 
-  GFX_MODE_NEG_HSYNC | GFX_MODE_NEG_VSYNC,			/* negative syncs     */
-  0x0280, 0x0280, 0x02B8, 0x02F0, 0x0340, 0x0340,   /* horizontal timings */
-  0x01E0, 0x01E0, 0x01E1, 0x01E4, 0x01FD, 0x01FD,   /* vertical timings   */
-  0x00240000,  									    /* freq = 36.0 MHz    */
-},
-
-/* 800x600 */
-
-{ GFX_MODE_56HZ |									/* refresh rate = 56  */
-  GFX_MODE_8BPP | GFX_MODE_12BPP | GFX_MODE_15BPP | /* all BPP valid      */
-  GFX_MODE_16BPP | GFX_MODE_24BPP,
-  0x0320, 0x0328, 0x0348, 0x03D0, 0x0418, 0x0420,	/* horizontal timings */
-  0x0258, 0x0258, 0x0259, 0x025D, 0x0274, 0x0274,   /* vertical timings   */
-  0x00240000, 										/* freq = 36.00 MHz   */
-},
-
-{ GFX_MODE_60HZ |									/* refresh rate = 60  */
-  GFX_MODE_8BPP | GFX_MODE_12BPP | GFX_MODE_15BPP | /* all BPP valid      */
-  GFX_MODE_16BPP | GFX_MODE_24BPP,
-  0x0320, 0x0328, 0x0348, 0x03D0, 0x0418, 0x0420,	/* horizontal timings */
-  0x0258, 0x0258, 0x0259, 0x025D, 0x0274, 0x0274,   /* vertical timings   */
-  0x00280000, 										/* freq = 40.00 MHz   */
-},
-
-{ GFX_MODE_72HZ |									/* refresh rate = 72  */
-  GFX_MODE_8BPP | GFX_MODE_12BPP | GFX_MODE_15BPP | /* all BPP valid      */
-  GFX_MODE_16BPP | GFX_MODE_24BPP,
-  0x0320, 0x0320, 0x0358, 0x03D0, 0x0410, 0x0410,   /* horizontal timings */
-  0x0258, 0x0258, 0x027D, 0x0283, 0x029A, 0x029A,	/* vertical timings   */
-  0x00320000, 										/* freq = 49.5 MHz    */
-},
-
-{ GFX_MODE_75HZ |									/* refresh rate = 75  */
-  GFX_MODE_8BPP | GFX_MODE_12BPP | GFX_MODE_15BPP | /* all BPP valid      */
-  GFX_MODE_16BPP | GFX_MODE_24BPP,
-  0x0320, 0x0320, 0x0330, 0x0380, 0x0420, 0x0420,   /* horizontal timings */
-  0x0258, 0x0258, 0x0259, 0x025C, 0x0271, 0x0271,	/* vertical timings   */
-  0x00318000, 										/* freq = 49.5 MHz    */
-},
-
-{ GFX_MODE_85HZ |									/* refresh rate = 85  */
-  GFX_MODE_8BPP | GFX_MODE_12BPP | GFX_MODE_15BPP | /* all BPP valid      */
-  GFX_MODE_16BPP | GFX_MODE_24BPP,
-  0x0320, 0x0320, 0x0340, 0x0380, 0x0418, 0x0418,   /* horizontal timings */
-  0x0258, 0x0258, 0x0259, 0x025C, 0x0277, 0x0277,   /* vertical timings   */
-  0x00384000, 									    /* freq = 56.25 MHz   */
-},
-
-/* 1024x768 */
-
-{ GFX_MODE_60HZ |									/* refresh rate = 60  */
-  GFX_MODE_8BPP | GFX_MODE_12BPP | GFX_MODE_15BPP | /* all BPP valid      */
-  GFX_MODE_16BPP | GFX_MODE_24BPP |
-  GFX_MODE_NEG_HSYNC | GFX_MODE_NEG_VSYNC,			/* negative syncs     */
-  0x0400, 0x0400, 0x0418, 0x04A0, 0x0540, 0x0540,	/* horizontal timings */
-  0x0300, 0x0300, 0x0303, 0x0309, 0x0326, 0x0326,   /* vertical timings   */
-  0x00410000, 									    /* freq = 65.00 MHz   */
-},
-
-{ GFX_MODE_70HZ |									/* refresh rate = 70  */
-  GFX_MODE_8BPP | GFX_MODE_12BPP | GFX_MODE_15BPP | /* all BPP valid      */
-  GFX_MODE_16BPP | GFX_MODE_24BPP |
-  GFX_MODE_NEG_HSYNC | GFX_MODE_NEG_VSYNC,			/* negative syncs     */
-  0x0400, 0x0400, 0x0418, 0x04A0, 0x0530, 0x0530,   /* horizontal timings */
-  0x0300, 0x0300, 0x0303, 0x0309, 0x0326, 0x0326,   /* vertical timings   */
-  0x004B0000,									    /* freq = 78.75 MHz   */
-},
-
-{ GFX_MODE_75HZ |									/* refresh rate = 75  */
-  GFX_MODE_8BPP | GFX_MODE_12BPP | GFX_MODE_15BPP | /* all BPP valid      */
-  GFX_MODE_16BPP | GFX_MODE_24BPP,
-  0x0400, 0x0400, 0x0410, 0x0470, 0x0520, 0x0520,   /* horizontal timings */
-  0x0300, 0x0300, 0x0301, 0x0304, 0x0320, 0x0320,   /* vertical timings   */
-  0x004EC000,									    /* freq = 78.75 MHz   */
-},
-
-{ GFX_MODE_85HZ |									/* refresh rate = 85  */
-  GFX_MODE_8BPP | GFX_MODE_12BPP | GFX_MODE_15BPP | /* all BPP valid      */
-  GFX_MODE_16BPP | GFX_MODE_24BPP,
-  0x0400, 0x0400, 0x0430, 0x0490, 0x0560, 0x0560,   /* horizontal timings */
-  0x0300, 0x0300, 0x0301, 0x0304, 0x0328, 0x0328,   /* vertical timings   */
-  0x005E8000,									    /* freq = 94.50 MHz   */
-},
-
-/* 1152x864 */
-
-{ GFX_MODE_75HZ |									/* refresh rate = 75  */
-  GFX_MODE_8BPP | GFX_MODE_12BPP | GFX_MODE_15BPP | /* all BPP valid      */
-  GFX_MODE_16BPP | GFX_MODE_24BPP,
-  0x0480, 0x0480, 0x04C0, 0x0540, 0x0640, 0x0640,   /* horizontal timings */
-  0x0360, 0x0360, 0x0361, 0x0364, 0x0384, 0x0384,   /* vertical timings   */
-  0x006C0000,                                       /* freq = 108.00 MHz  */
-},
-  	
-/* 1280x1024 */
-
-{ GFX_MODE_60HZ |									/* refresh rate = 60  */
-  GFX_MODE_8BPP | GFX_MODE_12BPP | GFX_MODE_15BPP | /* Up to 16 bpp       */
-  GFX_MODE_16BPP | GFX_MODE_24BPP,
-  0x0500, 0x0500, 0x0530, 0x05A0, 0x0698, 0x0698,   /* horizontal timings */
-  0x0400, 0x0400, 0x0401, 0x0404, 0x042A, 0x042A,   /* vertical timings   */
-  0x006C0000, 										/* freq = 108.0 MHz   */
-},
-
-{ GFX_MODE_75HZ |									/* refresh rate = 75  */
-  GFX_MODE_8BPP | GFX_MODE_12BPP | GFX_MODE_15BPP | /* Up to 16 bpp       */
-  GFX_MODE_16BPP | GFX_MODE_24BPP,
-  0x0500, 0x0500, 0x0510, 0x05A0, 0x0698, 0x0698,   /* horizontal timings */
-  0x0400, 0x0400, 0x0401, 0x0404, 0x042A, 0x042A,   /* vertical timings   */
-  0x00870000, 										/* freq = 135.0 MHz   */
-},
-
-{ GFX_MODE_85HZ |									/* refresh rate = 85  */
-  GFX_MODE_8BPP | GFX_MODE_12BPP | GFX_MODE_15BPP | /* Up to 16 bpp       */
-  GFX_MODE_16BPP | GFX_MODE_24BPP,
-  0x0500, 0x0500, 0x0540, 0x05E0, 0x06C0, 0x06C0,   /* horizontal timings */
-  0x0400, 0x0400, 0x0401, 0x0404, 0x0430, 0x0430,   /* vertical timings   */
-  0x009D8000, 									    /* freq = 157.5 MHz   */
-},
-
-/*********************************/
-/* BEGIN REDCLOUD-SPECIFIC MODES */
-/*-------------------------------*/
-
-/* 1600 x 1200 */
-
-{ GFX_MODE_60HZ |                                   /* refresh rate = 60  */
-  GFX_MODE_8BPP | GFX_MODE_12BPP | GFX_MODE_15BPP | /* Up to 32 bpp       */
-  GFX_MODE_16BPP | GFX_MODE_24BPP,
-  0x0640, 0x0640, 0x0680, 0x0740, 0x0870, 0x0870,   /* horizontal timings */
-  0x04B0, 0x04B0, 0x04B1, 0x04B4, 0x04E2, 0x04E2,   /* vertical timings   */
-  0x00A20000,                                       /* freq = 162.0 MHz   */
-},
-
-{ GFX_MODE_70HZ |                                   /* refresh rate = 70  */
-  GFX_MODE_8BPP | GFX_MODE_12BPP | GFX_MODE_15BPP | /* Up to 32 bpp       */
-  GFX_MODE_16BPP | GFX_MODE_24BPP,
-  0x0640, 0x0640, 0x0680, 0x0740, 0x0870, 0x0870,   /* horizontal timings */
-  0x04B0, 0x04B0, 0x04B1, 0x04B4, 0x04E2, 0x04E2,   /* vertical timings   */
-  0x00BD0000,                                       /* freq = 189.0 MHz   */
-},
-
-{ GFX_MODE_75HZ |                                   /* refresh rate = 75  */
-  GFX_MODE_8BPP | GFX_MODE_12BPP | GFX_MODE_15BPP | /* Up to 32 bpp       */
-  GFX_MODE_16BPP | GFX_MODE_24BPP,
-  0x0640, 0x0640, 0x0680, 0x0740, 0x0870, 0x0870,   /* horizontal timings */
-  0x04B0, 0x04B0, 0x04B1, 0x04B4, 0x04E2, 0x04E2,   /* vertical timings   */
-  0x00CA8000,                                       /* freq = 202.5 MHz   */
-},
-
-{ GFX_MODE_85HZ |                                   /* refresh rate = 85  */
-  GFX_MODE_8BPP | GFX_MODE_12BPP | GFX_MODE_15BPP | /* Up to 32 bpp       */
-  GFX_MODE_16BPP | GFX_MODE_24BPP,
-  0x0640, 0x0640, 0x0680, 0x0740, 0x0870, 0x0870,   /* horizontal timings */
-  0x04B0, 0x04B0, 0x04B1, 0x04B4, 0x04E2, 0x04E2,   /* vertical timings   */
-  0x00E58000,                                       /* freq = 229.5 MHz   */
-},
-};
-
-/* UPDATE THIS VARIABLE WHENEVER NEW REDCLOUD-SPECIFIC MODES ARE ADDED */
-
-#define REDCLOUD_SPECIFIC_MODES 4
-
-#define NUM_RC_DISPLAY_MODES sizeof(DisplayParams) / sizeof(DISPLAYMODE)
-#define NUM_GX_DISPLAY_MODES (NUM_RC_DISPLAY_MODES - REDCLOUD_SPECIFIC_MODES)
-
-
-FIXEDTIMINGS FixedParams[] = {
-/* 640x480 Panel */
-{ 640 , 480, 640, 480,									
-  0x0280, 0x280, 0x2a8, 0x328, 0x380, 0x380,	
-  0x1e0, 0x1e0, 0x1e1, 0x1e5, 0x1fc, 0x1fc,   
-  0x00192CCC, 										
-},
-
-{ 640 , 480, 800, 600,									
-  0x0280, 0x280, 0x2a8, 0x328, 0x380, 0x380,	
-  0x1e0, 0x1e0, 0x1e1, 0x1e5, 0x1fc, 0x1fc,   
-  0x00192CCC, 										
-},
-
-{ 640 , 480, 1024 , 768,									
-  0x0280, 0x280, 0x2a8, 0x328, 0x380, 0x380,	
-  0x1e0, 0x1e0, 0x1e1, 0x1e5, 0x1fc, 0x1fc,   
-  0x00192CCC, 										
-},
-
-{ 640 , 480, 1152 , 864,									
-  0x0280, 0x280, 0x2a8, 0x328, 0x380, 0x380,	
-  0x1e0, 0x1e0, 0x1e1, 0x1e5, 0x1fc, 0x1fc,   
-  0x00192CCC, 										
-},
-
-{ 640 , 480, 1280, 1024,									
-  0x0280, 0x280, 0x2a8, 0x328, 0x380, 0x380,	
-  0x1e0, 0x1e0, 0x1e1, 0x1e5, 0x1fc, 0x1fc,   
-  0x00192CCC, 										
-},
-
-{ 640 , 480, 1600, 1200,									
-  0x0280, 0x280, 0x2a8, 0x328, 0x380, 0x380,	
-  0x1e0, 0x1e0, 0x1e1, 0x1e5, 0x1fc, 0x1fc,   
-  0x00192CCC, 										
-},
-
-
-/* 800x600 Panel */
-{ 800 , 600, 640, 480,									
-  0x0280, 0x2d0, 0x2f8, 0x378, 0x3d0, 0x420,	
-  0x1e0, 0x21c, 0x21d, 0x221, 0x238, 0x274,   
-  0x00280000, 										
-},
-
-{ 800 , 600, 800, 600,									
-  0x320, 0x320, 0x348, 0x3c8, 0x420, 0x420,
-  0x258, 0x258, 0x259, 0x25d, 0x274, 0x274,
-  0x00280000, 										
-},
-
-{ 800 , 600, 1024, 768,									
-  0x320, 0x320, 0x348, 0x3c8, 0x420, 0x420,	
-  0x258, 0x258, 0x259, 0x25d, 0x274, 0x274,   
-  0x00280000, 										
-},
-
-{ 800 , 600, 1152, 864,									
-  0x320, 0x320, 0x348, 0x3c8, 0x420, 0x420,	
-  0x258, 0x258, 0x259, 0x25d, 0x274, 0x274,   
-  0x00280000, 										
-},
-
-{ 800 , 600, 1280, 1024,									
-  0x320, 0x320, 0x348, 0x3c8, 0x420, 0x420,	
-  0x258, 0x258, 0x259, 0x25d, 0x274, 0x274,   
-  0x00280000, 										
-},
-
-{ 800 , 600, 1600, 1200,									
-  0x320, 0x320, 0x348, 0x3c8, 0x420, 0x420,	
-  0x258, 0x258, 0x259, 0x25d, 0x274, 0x274,   
-  0x00280000, 										
-},
-
-/* 1024x768 panel */
-{ 1024 , 768, 640, 480,									
-  0x0280, 0x340, 0x368, 0x3e8, 0x440, 0x500,	
-  0x1e0, 0x270, 0x271, 0x275, 0x28c, 0x31c,   
-  0x00410000, 										
-},
-
-{ 1024 , 768, 800, 600,									
-  0x0320, 0x390, 0x3b8, 0x438, 0x490, 0x500,	
-  0x258, 0x2ac, 0x2ad, 0x2b1, 0x2c8, 0x31c,   
-  0x00410000, 										
-},
-
-{ 1024 , 768, 1024, 768,									
-  0x0400, 0x400, 0x428, 0x4a8, 0x500, 0x500,	
-  0x300, 0x300, 0x301, 0x305, 0x31c, 0x31c,   
-  0x00410000, 										
-},
-
-{ 1024 , 768, 1152, 864,									
-  0x0400, 0x400, 0x428, 0x4a8, 0x500, 0x500,	
-  0x300, 0x300, 0x301, 0x305, 0x31c, 0x31c,   
-  0x00410000, 										
-},
-
-{ 1024 , 768, 1280, 1024,									
-  0x0400, 0x400, 0x428, 0x4a8, 0x500, 0x500,	
-  0x300, 0x300, 0x301, 0x305, 0x31c, 0x31c,   
-  0x00410000, 										
-},
-
-{ 1024 , 768, 1600, 1200,									
-  0x0400, 0x400, 0x428, 0x4a8, 0x500, 0x500,	
-  0x300, 0x300, 0x301, 0x305, 0x31c, 0x31c,   
-  0x00410000, 										
-},
-
-};
-
-
-#define NUM_FIXED_TIMINGS_MODES sizeof(FixedParams)/sizeof(FIXEDTIMINGS)
-
-
-/* INCLUDE SUPPORT FOR FIRST GENERATION, IF SPECIFIED. */
-
-#if GFX_DISPLAY_GU1
-#include "disp_gu1.c"
-#endif
-
-/* INCLUDE SUPPORT FOR SECOND GENERATION, IF SPECIFIED. */
-
-#if GFX_DISPLAY_GU2
-#include "disp_gu2.c"
-#endif
-
-/*---------------------------------------------------------------------------
- * gfx_reset_timing_lock
- * 
- * This routine resets the timing change lock. The lock can only be set by
- * setting a flag when calling mode set.
- *---------------------------------------------------------------------------
- */
-void gfx_reset_timing_lock(void)
-{
-	gfx_timing_lock = 0;
-}
-
-/* WRAPPERS IF DYNAMIC SELECTION */
-/* Extra layer to call either first or second generation routines. */
-
-#if GFX_DISPLAY_DYNAMIC
-
-/*---------------------------------------------------------------------------
- * gfx_set_display_bpp
- *---------------------------------------------------------------------------
- */
-int gfx_set_display_bpp(unsigned short bpp)
-{
-	int retval = 0;
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		retval = gu1_set_display_bpp(bpp);
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		retval = gu2_set_display_bpp(bpp);
-#	endif
-	return(retval);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_is_display_mode_supported
- * check if given mode supported, 
- * return the supported mode on success, -1 on fail
- *---------------------------------------------------------------------------
- */
-int gfx_is_display_mode_supported(int xres, int yres, int bpp, int hz)
-{
-	int retval = -1;
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		retval = gu1_is_display_mode_supported(xres, yres, bpp, hz);
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		retval = gu2_is_display_mode_supported(xres, yres, bpp, hz);
-#	endif
-	return(retval);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_display_mode
- *---------------------------------------------------------------------------
- */
-int gfx_set_display_mode(int xres, int yres, int bpp, int hz)
-{
-	int retval = 0;
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		retval = gu1_set_display_mode(xres, yres, bpp, hz);
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		retval = gu2_set_display_mode(xres, yres, bpp, hz);
-#	endif
-	return(retval);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_display_timings
- *---------------------------------------------------------------------------
- */
-int gfx_set_display_timings(unsigned short bpp, unsigned short flags, 
-	unsigned short hactive, unsigned short hblankstart, 
-	unsigned short hsyncstart, unsigned short hsyncend,
-	unsigned short hblankend, unsigned short htotal,
-	unsigned short vactive, unsigned short vblankstart, 
-	unsigned short vsyncstart, unsigned short vsyncend,
-	unsigned short vblankend, unsigned short vtotal,
-	unsigned long frequency)
-{
-	int retval = 0;
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		retval = gu1_set_display_timings(bpp, flags, 
-			hactive, hblankstart, hsyncstart, hsyncend, hblankend, htotal,
-			vactive, vblankstart, vsyncstart, vsyncend, vblankend, vtotal,
-			frequency);
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		retval = gu2_set_display_timings(bpp, flags, 
-			hactive, hblankstart, hsyncstart, hsyncend, hblankend, htotal,
-			vactive, vblankstart, vsyncstart, vsyncend, vblankend, vtotal,
-			frequency);
-#	endif
-	return(retval);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_display_pitch
- *---------------------------------------------------------------------------
- */
-void gfx_set_display_pitch(unsigned short pitch)
-{
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		gu1_set_display_pitch(pitch);
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		gu2_set_display_pitch(pitch);
-#	endif
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_display_offset
- *---------------------------------------------------------------------------
- */
-void gfx_set_display_offset(unsigned long offset)
-{
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		gu1_set_display_offset(offset);
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		gu2_set_display_offset(offset);
-#	endif
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_display_palette_entry
- *---------------------------------------------------------------------------
- */
-int gfx_set_display_palette_entry(unsigned long index, unsigned long palette)
-{
-	int status = 0;
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		status = gu1_set_display_palette_entry(index, palette);
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		status = gu2_set_display_palette_entry(index, palette);
-#	endif
-	return(status);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_display_palette
- *---------------------------------------------------------------------------
- */
-int gfx_set_display_palette(unsigned long *palette)
-{
-	int status = 0;
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		status = gu1_set_display_palette(palette);
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		status = gu2_set_display_palette(palette);
-#	endif
-	return(status);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_cursor_enable
- *---------------------------------------------------------------------------
- */
-void gfx_set_cursor_enable(int enable)
-{
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		gu1_set_cursor_enable(enable);
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		gu2_set_cursor_enable(enable);
-#	endif
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_cursor_colors
- *---------------------------------------------------------------------------
- */
-void gfx_set_cursor_colors(unsigned long bkcolor, unsigned long fgcolor)
-{
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		gu1_set_cursor_colors(bkcolor, fgcolor);
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		gu2_set_cursor_colors(bkcolor, fgcolor);
-#	endif
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_cursor_position
- *---------------------------------------------------------------------------
- */
-void gfx_set_cursor_position(unsigned long memoffset, 
-	unsigned short xpos, unsigned short ypos, 
-	unsigned short xhotspot, unsigned short yhotspot)
-{
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		gu1_set_cursor_position(memoffset, xpos, ypos, xhotspot, yhotspot);
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		gu2_set_cursor_position(memoffset, xpos, ypos, xhotspot, yhotspot);
-#	endif
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_cursor_shape32
- *---------------------------------------------------------------------------
- */
-void gfx_set_cursor_shape32(unsigned long memoffset, 
-	unsigned long *andmask, unsigned long *xormask)
-{
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		gu1_set_cursor_shape32(memoffset, andmask, xormask);
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		gu2_set_cursor_shape32(memoffset, andmask, xormask);
-#	endif
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_cursor_shape64
- *---------------------------------------------------------------------------
- */
-void gfx_set_cursor_shape64(unsigned long memoffset, 
-	unsigned long *andmask, unsigned long *xormask)
-{
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		gu2_set_cursor_shape64(memoffset, andmask, xormask);
-#	endif
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_icon_enable
- *---------------------------------------------------------------------------
- */
-void gfx_set_icon_enable(int enable)
-{
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		gu2_set_icon_enable(enable);
-#	endif
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_icon_colors
- *---------------------------------------------------------------------------
- */
-void gfx_set_icon_colors (unsigned long color0, unsigned long color1, unsigned long color2)
-{
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		gu2_set_icon_colors (color0, color1, color2);
-#	endif
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_icon_position
- *---------------------------------------------------------------------------
- */
-void gfx_set_icon_position(unsigned long memoffset, unsigned short xpos)
-{
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		gu2_set_icon_position(memoffset, xpos);
-#	endif
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_icon_shape64
- *---------------------------------------------------------------------------
- */
-void gfx_set_icon_shape64(unsigned long memoffset, 
-	unsigned long *andmask, unsigned long *xormask, unsigned int lines)
-{
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		gu2_set_icon_shape64(memoffset, andmask, xormask, lines);
-#	endif
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_compression_enable
- *---------------------------------------------------------------------------
- */
-int gfx_set_compression_enable(int enable)
-{
-	int status = 0;
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		status = gu1_set_compression_enable(enable);
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		status = gu2_set_compression_enable(enable);
-#	endif
-	return(status);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_compression_offset
- *---------------------------------------------------------------------------
- */
-int gfx_set_compression_offset(unsigned long offset)
-{
-	int status = 0;
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		status = gu1_set_compression_offset(offset);
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		status = gu2_set_compression_offset(offset);
-#	endif
-	return(status);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_compression_pitch
- *---------------------------------------------------------------------------
- */
-int gfx_set_compression_pitch(unsigned short pitch)
-{
-	int status = 0;
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		status = gu1_set_compression_pitch(pitch);
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		status = gu2_set_compression_pitch(pitch);
-#	endif
-	return(status);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_compression_size
- *---------------------------------------------------------------------------
- */
-int gfx_set_compression_size(unsigned short size)
-{
-	int status = 0;
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		status = gu1_set_compression_size(size);
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		status = gu2_set_compression_size(size);
-#	endif
-	return(status);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_display_priority_high
- *---------------------------------------------------------------------------
- */
-void gfx_set_display_priority_high(int enable)
-{
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		gu1_set_display_priority_high(enable);
-#	endif
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_display_video_format (PRIVATE ROUTINE - NOT PART OF API)
- *
- * This routine is called by "gfx_set_video_format".  It abstracts the 
- * version of the display controller from the video overlay routines.
- *---------------------------------------------------------------------------
- */
-void gfx_set_display_video_format(unsigned long format)
-{
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		gu2_set_display_video_format(format);
-#	endif
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_display_video_enable (PRIVATE ROUTINE - NOT PART OF API)
- *
- * This routine is called by "gfx_set_video_enable".  It abstracts the 
- * version of the display controller from the video overlay routines.
- *---------------------------------------------------------------------------
- */
-void gfx_set_display_video_enable(int enable)
-{
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		gu1_set_display_video_enable(enable);
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		gu2_set_display_video_enable(enable);
-#	endif
-	return;
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_display_video_size (PRIVATE ROUTINE - NOT PART OF API)
- *
- * This routine is called by "gfx_set_video_size".  It abstracts the 
- * version of the display controller from the video overlay routines.
- *---------------------------------------------------------------------------
- */
-void gfx_set_display_video_size(unsigned short width, unsigned short height)
-{
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		gu1_set_display_video_size(width, height);
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		gu2_set_display_video_size(width, height);
-#	endif
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_display_video_offset (PRIVATE ROUTINE - NOT PART OF API)
- *
- * This routine is called by "gfx_set_video_offset".  It abstracts the 
- * version of the display controller from the video overlay routines.
- *---------------------------------------------------------------------------
- */
-void gfx_set_display_video_offset(unsigned long offset)
-{
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		gu1_set_display_video_offset(offset);
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		gu2_set_display_video_offset(offset);
-#	endif
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_display_video_yuv_offsets (PRIVATE ROUTINE - NOT PART OF API)
- *
- * This routine is called by "gfx_set_video_yuv_offsets".  It abstracts the 
- * version of the display controller from the video overlay routines.
- *---------------------------------------------------------------------------
- */
-void gfx_set_display_video_yuv_offsets(unsigned long yoffset, unsigned long uoffset,
-									   unsigned long voffset)
-{
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		gu2_set_display_video_yuv_offsets(yoffset, uoffset, voffset);
-#	endif
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_display_video_yuv_pitch (PRIVATE ROUTINE - NOT PART OF API)
- *
- * This routine is called by "gfx_set_video_yuv_pitch".  It abstracts the 
- * version of the display controller from the video overlay routines.
- *---------------------------------------------------------------------------
- */
-void gfx_set_display_video_yuv_pitch (unsigned long ypitch, unsigned long uvpitch)
-{
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		gu2_set_display_video_yuv_pitch (ypitch, uvpitch);
-#	endif
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_display_video_downscale (PRIVATE ROUTINE - NOT PART OF API)
- *
- * This routine is called by "gfx_set_video_vertical_downscale".  It abstracts the 
- * version of the display controller from the video overlay routines.
- *---------------------------------------------------------------------------
- */
-void gfx_set_display_video_downscale (unsigned short srch, unsigned short dsth)
-{
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		gu2_set_display_video_downscale (srch, dsth);
-#	endif
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_display_video_vertical_downscale_enable (PRIVATE ROUTINE - NOT PART OF API)
- *
- * This routine is called by "gfx_set_video_vertical_downscale_enable".  It abstracts the 
- * version of the display controller from the video overlay routines.
- *---------------------------------------------------------------------------
- */
-void gfx_set_display_video_vertical_downscale_enable (int enable)
-{
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		gu2_set_display_video_vertical_downscale_enable (enable);
-#	endif
-}
-
-/*---------------------------------------------------------------------------
- * gfx_test_timing_active
- *---------------------------------------------------------------------------
- */
-int gfx_test_timing_active(void)
-{
-	int status = 0;
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		status = gu1_test_timing_active();
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		status = gu2_test_timing_active();
-#	endif
-	return(status);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_test_vertical_active
- *---------------------------------------------------------------------------
- */
-int gfx_test_vertical_active(void)
-{
-	int status = 0;
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		status = gu1_test_vertical_active();
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		status = gu2_test_vertical_active();
-#	endif
-	return(status);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_wait_vertical_blank
- *---------------------------------------------------------------------------
- */
-int gfx_wait_vertical_blank(void)
-{
-	int status = 0;
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		status = gu1_wait_vertical_blank();
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		status = gu2_wait_vertical_blank();
-#	endif
-	return(status);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_delay_milliseconds
- *---------------------------------------------------------------------------
- */
-void gfx_delay_milliseconds(unsigned long milliseconds)
-{
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		gu1_delay_milliseconds(milliseconds);
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		gu2_delay_milliseconds(milliseconds);
-#	endif
-}
-
-/*---------------------------------------------------------------------------
- * gfx_delay_microseconds
- *---------------------------------------------------------------------------
- */
-void gfx_delay_microseconds(unsigned long microseconds)
-{
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		gu1_delay_microseconds(microseconds);
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		gu2_delay_microseconds(microseconds);
-#	endif
-}
-
-/*---------------------------------------------------------------------------
- * gfx_enable_panning 
- *
- * This routine  enables the panning when the Mode is bigger than the panel
- * size.
- *---------------------------------------------------------------------------
- */
-void gfx_enable_panning(int x, int y)
-{
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		gu1_enable_panning( x,  y);
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		gu2_enable_panning( x,  y);
-#	endif
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_fixed_timings
- *---------------------------------------------------------------------------
- */
-int gfx_set_fixed_timings(int panelResX, int panelResY, unsigned short width, unsigned short height, unsigned short bpp)
-{
-	int status = 0;
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		status = gu1_set_fixed_timings( panelResX,  panelResY,   width,   height,  bpp);
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		status = gu2_set_fixed_timings( panelResX,  panelResY,   width,   height,  bpp);
-#	endif
-	return (status);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_panel_present
- *---------------------------------------------------------------------------
- */
-int gfx_set_panel_present(int panelResX, int panelResY, unsigned short width, unsigned short height, unsigned short bpp)
-{
-	int status = 0;
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		status = gu1_set_panel_present( panelResX,  panelResY,   width,   height,  bpp);
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		status = gu2_set_panel_present( panelResX,  panelResY,   width,   height,  bpp);
-#	endif
-	return (status);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_vtotal
- *---------------------------------------------------------------------------
- */
-int gfx_set_vtotal(unsigned short vtotal)
-{
-	int retval = 0;
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		retval = gu1_set_vtotal(vtotal);
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		retval = gu2_set_vtotal(vtotal);
-#	endif
-	return(retval);
-}
-
-/*-----------------------------------------------------------------------*
- * THE FOLLOWING READ ROUTINES ARE ALWAYS INCLUDED:                      *                      
- * gfx_get_hsync_end, gfx_get_htotal, gfx_get_vsync_end, gfx_get_vtotal  *
- * are used by the video overlay routines.                               *
- *                                                                       *
- * gfx_get_vline and gfx_vactive are used to prevent an issue for the    *
- * SC1200.                                                               *
- *                                                                       *
- * The others are part of the Durango API.                               *
- *-----------------------------------------------------------------------*/
-
-/*----------------------------------------------------------------------------
- * gfx_mode_frequency_supported
- *----------------------------------------------------------------------------  
- */
-int gfx_mode_frequency_supported(int xres, int yres, int bpp, unsigned long frequency)
-{
-	int freq = 0;
-
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		freq = gu1_mode_frequency_supported(xres, yres, bpp, frequency);
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		freq = gu2_mode_frequency_supported(xres, yres, bpp, frequency);
-#	endif
-	return(freq);
-}
-
-/*----------------------------------------------------------------------------
- * gfx_refreshrate_from_frequency
- *----------------------------------------------------------------------------  
- */
-int gfx_get_refreshrate_from_frequency(int xres, int yres, int bpp, int *hz, unsigned long frequency)
-{
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		gu1_get_refreshrate_from_frequency(xres, yres, bpp, hz, frequency);
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		gu2_get_refreshrate_from_frequency(xres, yres, bpp, hz, frequency);
-#	endif
-
-	return(1);
-}
-
-/*----------------------------------------------------------------------------
- * gfx_refreshrate_from_mode
- *----------------------------------------------------------------------------  
- */
-int gfx_get_refreshrate_from_mode(int xres, int yres, int bpp, int *hz, unsigned long frequency)
-{
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		gu1_get_refreshrate_from_mode(xres, yres, bpp, hz, frequency);
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		gu2_get_refreshrate_from_mode(xres, yres, bpp, hz, frequency);
-#	endif
-
-	return(1);
-}
-
-/*----------------------------------------------------------------------------
- * gfx_get_frequency_from_refreshrate
- *----------------------------------------------------------------------------  
- */
-int gfx_get_frequency_from_refreshrate(int xres, int yres, int bpp, int hz, int *frequency)
-{
-	int retval = -1;
-
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		retval = gu1_get_frequency_from_refreshrate(xres, yres, bpp, hz, frequency);
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		retval = gu2_get_frequency_from_refreshrate(xres, yres, bpp, hz, frequency);
-#	endif
-
-	return retval;
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_max_supported_pixel_clock
- *---------------------------------------------------------------------------
- */
-unsigned long gfx_get_max_supported_pixel_clock (void)
-{
-	unsigned long status = 0;
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		status = gu1_get_max_supported_pixel_clock();
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		status = gu2_get_max_supported_pixel_clock();
-#	endif
-	return (status);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_display_pitch
- *---------------------------------------------------------------------------
- */
-unsigned short gfx_get_display_pitch(void)
-{
-	unsigned short pitch = 0;
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		pitch = gu1_get_display_pitch();
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		pitch = gu2_get_display_pitch();
-#	endif
-	return(pitch);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_display_mode_count 
- * return # of modes supported.
- *---------------------------------------------------------------------------
- */
-int gfx_get_display_mode_count(void)
-{
-	int retval = 0;
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		retval = gu1_get_display_mode_count();
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		retval = gu2_get_display_mode_count();
-#	endif
-	return(retval);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_frame_buffer_line_size
- *---------------------------------------------------------------------------
- */
-unsigned long gfx_get_frame_buffer_line_size(void)
-{
-	unsigned long retval = 0;
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		retval = gu1_get_frame_buffer_line_size();
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		retval = gu2_get_frame_buffer_line_size();
-#	endif
-	return(retval);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_display_mode
- * get the curent mode set, 
- * return the supported mode on success, -1 on fail
- *---------------------------------------------------------------------------
- */
-int gfx_get_display_mode(int *xres, int *yres, int *bpp, int *hz)
-{
-	int retval = -1;
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		retval = gu1_get_display_mode(xres, yres, bpp, hz);
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		retval = gu2_get_display_mode(xres, yres, bpp, hz);
-#	endif
-	return(retval);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_display_details
- * given the mode get's the resoultion details, width, height, freq
- *---------------------------------------------------------------------------
- */
-int gfx_get_display_details(unsigned int mode, int *xres, int *yres, int *hz)
-{
-	int retval = -1;
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		retval = gu1_get_display_details(mode, xres, yres, hz);
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		retval = gu2_get_display_details(mode, xres, yres, hz);
-#	endif
-	return(retval);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_hactive
- *---------------------------------------------------------------------------
- */
-unsigned short gfx_get_hactive(void)
-{
-	unsigned short hactive = 0;
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		hactive = gu1_get_hactive();
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		hactive = gu2_get_hactive();
-#	endif
-	return(hactive);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_hsync_start
- *---------------------------------------------------------------------------
- */
-unsigned short gfx_get_hsync_start(void)
-{
-	unsigned short hsync_start = 0;
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		hsync_start = gu1_get_hsync_start();
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		hsync_start = gu2_get_hsync_start();
-#	endif
-	return(hsync_start);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_hsync_end
- *---------------------------------------------------------------------------
- */
-unsigned short gfx_get_hsync_end(void)
-{
-	unsigned short hsync_end = 0;
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		hsync_end = gu1_get_hsync_end();
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		hsync_end = gu2_get_hsync_end();
-#	endif
-	return(hsync_end);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_htotal
- *---------------------------------------------------------------------------
- */
-unsigned short gfx_get_htotal(void)
-{
-	unsigned short htotal = 0;
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		htotal = gu1_get_htotal();
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		htotal = gu2_get_htotal();
-#	endif
-	return(htotal);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_vactive
- *---------------------------------------------------------------------------
- */
-unsigned short gfx_get_vactive(void)
-{
-	unsigned short vactive = 0;
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		vactive = gu1_get_vactive();
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		vactive = gu2_get_vactive();
-#	endif
-	return(vactive);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_vsync_end
- *---------------------------------------------------------------------------
- */
-unsigned short gfx_get_vsync_end(void)
-{
-	unsigned short vsync_end = 0;
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		vsync_end = gu1_get_vsync_end();
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		vsync_end = gu2_get_vsync_end();
-#	endif
-	return(vsync_end);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_vtotal
- *---------------------------------------------------------------------------
- */
-unsigned short gfx_get_vtotal(void)
-{
-	unsigned short vtotal = 0;
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		vtotal = gu1_get_vtotal();
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		vtotal = gu2_get_vtotal();
-#	endif
-	return(vtotal);
-}
-
-/*---------------------------------------------------------------------------
- *  gfx_get_display_bpp
- *---------------------------------------------------------------------------
- */
-unsigned short gfx_get_display_bpp(void)
-{
-	unsigned short bpp = 0;
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		bpp = gu1_get_display_bpp();
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		bpp = gu2_get_display_bpp();
-#	endif
-	return(bpp);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_vline
- *---------------------------------------------------------------------------
- */
-unsigned short gfx_get_vline(void)
-{
-	unsigned short vline = 0;
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		vline = gu1_get_vline();
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		vline = gu2_get_vline();
-#	endif
-	return(vline);
-}
-
-/*---------------------------------------------------------------------------
- *  gfx_get_display_offset
- *---------------------------------------------------------------------------
- */
-unsigned long gfx_get_display_offset(void)
-{
-	unsigned long offset = 0;
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		offset = gu1_get_display_offset();
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		offset = gu2_get_display_offset();
-#	endif
-	return(offset);
-}
-
-/*---------------------------------------------------------------------------
- *  gfx_get_cursor_offset
- *---------------------------------------------------------------------------
- */
-unsigned long gfx_get_cursor_offset(void)
-{
-	unsigned long base = 0;
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		base = gu1_get_cursor_offset();
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		base = gu2_get_cursor_offset();
-#	endif
-	return(base);
-}
-
-/*************************************************************/
-/*  READ ROUTINES  |  INCLUDED FOR DIAGNOSTIC PURPOSES ONLY  */
-/*************************************************************/
-
-#if GFX_READ_ROUTINES
-
-/*---------------------------------------------------------------------------
- * gfx_get_hblank_start
- *---------------------------------------------------------------------------
- */
-unsigned short gfx_get_hblank_start(void)
-{
-	unsigned short hblank_start = 0;
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		hblank_start = gu1_get_hblank_start();
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		hblank_start = gu2_get_hblank_start();
-#	endif
-	return(hblank_start);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_hblank_end
- *---------------------------------------------------------------------------
- */
-unsigned short gfx_get_hblank_end(void)
-{
-	unsigned short hblank_end = 0;
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		hblank_end = gu1_get_hblank_end();
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		hblank_end = gu2_get_hblank_end();
-#	endif
-	return(hblank_end);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_vblank_start
- *---------------------------------------------------------------------------
- */
-unsigned short gfx_get_vblank_start(void)
-{
-	unsigned short vblank_start = 0;
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		vblank_start = gu1_get_vblank_start();
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		vblank_start = gu2_get_vblank_start();
-#	endif
-	return(vblank_start);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_vsync_start
- *---------------------------------------------------------------------------
- */
-unsigned short gfx_get_vsync_start(void)
-{
-	unsigned short vsync_start = 0;
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		vsync_start = gu1_get_vsync_start();
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		vsync_start = gu2_get_vsync_start();
-#	endif
-	return(vsync_start);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_vblank_end
- *---------------------------------------------------------------------------
- */
-unsigned short gfx_get_vblank_end(void)
-{
-	unsigned short vblank_end = 0;
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		vblank_end = gu1_get_vblank_end();
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		vblank_end = gu2_get_vblank_end();
-#	endif
-	return(vblank_end);
-}
-
-/*---------------------------------------------------------------------------
- *  gfx_get_display_palette_entry
- *---------------------------------------------------------------------------
- */
-int gfx_get_display_palette_entry(unsigned long index, unsigned long *palette)
-{
-	int status = 0;
-
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		status = gu1_get_display_palette_entry(index, palette);
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		status = gu2_get_display_palette_entry(index, palette);
-#	endif
-
-	return status;
-}
-
-/*---------------------------------------------------------------------------
- *  gfx_get_display_palette
- *---------------------------------------------------------------------------
- */
-void gfx_get_display_palette(unsigned long *palette)
-{
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		gu1_get_display_palette(palette);
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		gu2_get_display_palette(palette);
-#	endif
-}
-
-/*---------------------------------------------------------------------------
- *  gfx_get_cursor_enable
- *---------------------------------------------------------------------------
- */
-unsigned long gfx_get_cursor_enable(void)
-{
-	unsigned long enable = 0;
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		enable = gu1_get_cursor_enable();
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		enable = gu2_get_cursor_enable();
-#	endif
-	return(enable);
-}
-
-/*---------------------------------------------------------------------------
- *  gfx_get_cursor_position
- *---------------------------------------------------------------------------
- */
-unsigned long gfx_get_cursor_position(void)
-{
-	unsigned long position = 0;
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		position = gu1_get_cursor_position();
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		position = gu2_get_cursor_position();
-#	endif
-	return(position);
-}
-
-/*---------------------------------------------------------------------------
- *  gfx_get_cursor_clip
- *---------------------------------------------------------------------------
- */
-unsigned long gfx_get_cursor_clip(void)
-{
-	unsigned long offset = 0;
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		offset = gu1_get_cursor_clip();
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		offset = gu2_get_cursor_clip();
-#	endif
-	return(offset);
-}
-
-/*---------------------------------------------------------------------------
- *  gfx_get_cursor_color
- *---------------------------------------------------------------------------
- */
-unsigned long gfx_get_cursor_color(int index)
-{
-	unsigned long color = 0;
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		color = gu1_get_cursor_color(index);
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		color = gu2_get_cursor_color(index);
-#	endif
-	return(color);
-}
-
-/*---------------------------------------------------------------------------
- *  gfx_get_icon_enable
- *---------------------------------------------------------------------------
- */
-unsigned long gfx_get_icon_enable(void)
-{
-	unsigned long enable = 0;
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		enable = gu2_get_icon_enable();
-#	endif
-	return(enable);
-}
-
-/*---------------------------------------------------------------------------
- *  gfx_get_icon_offset
- *---------------------------------------------------------------------------
- */
-unsigned long gfx_get_icon_offset(void)
-{
-	unsigned long base = 0;
-	
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		base = gu2_get_icon_offset();
-#	endif
-	
-	return(base);
-}
-
-/*---------------------------------------------------------------------------
- *  gfx_get_icon_position
- *---------------------------------------------------------------------------
- */
-unsigned long gfx_get_icon_position(void)
-{
-	unsigned long position = 0;
-	
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		position = gu2_get_icon_position();
-#	endif
-	
-	return(position);
-}
-
-/*---------------------------------------------------------------------------
- *  gfx_get_icon_color
- *---------------------------------------------------------------------------
- */
-unsigned long gfx_get_icon_color(int index)
-{
-	unsigned long color = 0;
-
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		color = gu2_get_icon_color(index);
-#	endif
-	
-	return(color);
-}
-
-/*---------------------------------------------------------------------------
- *  gfx_get_compression_enable
- *---------------------------------------------------------------------------
- */
-int gfx_get_compression_enable(void)
-{
-	int enable = 0;
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		enable = gu1_get_compression_enable();
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		enable = gu2_get_compression_enable();
-#	endif
-	return(enable);
-}
-
-/*---------------------------------------------------------------------------
- *  gfx_get_compression_offset
- *---------------------------------------------------------------------------
- */
-unsigned long gfx_get_compression_offset(void)
-{
-	unsigned long offset = 0;
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		offset = gu1_get_compression_offset();
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		offset = gu2_get_compression_offset();
-#	endif
-	return(offset);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_compression_pitch
- *---------------------------------------------------------------------------
- */
-unsigned short gfx_get_compression_pitch(void)
-{
-	unsigned short pitch = 0;
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		pitch = gu1_get_compression_pitch();
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		pitch = gu2_get_compression_pitch();
-#	endif
-	return(pitch);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_compression_size
- *---------------------------------------------------------------------------
- */
-unsigned short gfx_get_compression_size(void)
-{
-	unsigned short size = 0;
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		size = gu1_get_compression_size();
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		size = gu2_get_compression_size();
-#	endif
-	return(size);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_display_priority_high
- *---------------------------------------------------------------------------
- */
-int gfx_get_display_priority_high(void)
-{
-	int high = GFX_STATUS_UNSUPPORTED;
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		high = gu1_get_display_priority_high();
-#	endif
-	return(high);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_valid_bit
- *---------------------------------------------------------------------------
- */
-int gfx_get_valid_bit(int line)
-{
-	int valid = 0;
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		valid = gu1_get_valid_bit(line);
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		valid = gu2_get_valid_bit(line);
-#	endif
-	return(valid);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_display_video_offset
- *---------------------------------------------------------------------------
- */
-unsigned long gfx_get_display_video_offset(void)
-{
-	unsigned long offset = 0;
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		offset = gu1_get_display_video_offset();
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		offset = gu2_get_display_video_offset();
-#	endif
-	return(offset);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_display_video_yuv_offsets
- *---------------------------------------------------------------------------
- */
-void gfx_get_display_video_yuv_offsets(unsigned long *yoffset, unsigned long *uoffset,
-												unsigned long *voffset)
-{
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		gu2_get_display_video_yuv_offsets(yoffset, uoffset, voffset);
-#	endif
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_display_video_yuv_offsets
- *---------------------------------------------------------------------------
- */
-void gfx_get_display_video_yuv_pitch(unsigned long *ypitch, unsigned long *uvpitch)
-{
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		gu2_get_display_video_yuv_pitch(ypitch, uvpitch);
-#	endif
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_display_video_downscale_delta
- *---------------------------------------------------------------------------
- */
-unsigned long gfx_get_display_video_downscale_delta(void)
-{
-	unsigned long ret_value = 0;
-
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		ret_value = gu2_get_display_video_downscale_delta();
-#	endif
-
-	return ret_value;
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_display_video_downscale_delta
- *---------------------------------------------------------------------------
- */
-int gfx_get_display_video_downscale_enable(void)
-{
-	int ret_value = 0;
-
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		ret_value = gu2_get_display_video_downscale_enable();
-#	endif
-
-	return ret_value;
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_display_video_size
- *---------------------------------------------------------------------------
- */
-unsigned long gfx_get_display_video_size(void)
-{
-	unsigned long size = 0;
-#	if GFX_DISPLAY_GU1
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
-		size = gu1_get_display_video_size();
-#	endif
-#	if GFX_DISPLAY_GU2
-	if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
-		size = gu2_get_display_video_size();
-#	endif
-	return(size);
-}
-
-#endif /* GFX_READ_ROUTINES */
-
-#endif /* GFX_DISPLAY_DYNAMIC */
-
-/* END OF FILE */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/gfx_rtns.h b/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/gfx_rtns.h
deleted file mode 100644
index 388c9dbed..000000000
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/gfx_rtns.h
+++ /dev/null
@@ -1,666 +0,0 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/gfx_rtns.h,v 1.1 2002/10/11 14:33:00 alanh Exp $ */
-/*
- * $Workfile: gfx_rtns.h $
- *
- * This header file defines the Durango routines and variables used
- * to access the memory mapped regions.
- *
- * NSC_LIC_ALTERNATIVE_PREAMBLE
- *
- * Revision 1.0
- *
- * National Semiconductor Alternative GPL-BSD License
- *
- * National Semiconductor Corporation licenses this software 
- * ("Software"):
- *
- *      Durango
- *
- * under one of the two following licenses, depending on how the 
- * Software is received by the Licensee.
- * 
- * If this Software is received as part of the Linux Framebuffer or
- * other GPL licensed software, then the GPL license designated 
- * NSC_LIC_GPL applies to this Software; in all other circumstances 
- * then the BSD-style license designated NSC_LIC_BSD shall apply.
- *
- * END_NSC_LIC_ALTERNATIVE_PREAMBLE */
-
-/* NSC_LIC_BSD
- *
- * National Semiconductor Corporation Open Source License for Durango
- *
- * (BSD License with Export Notice)
- *
- * Copyright (c) 1999-2001
- * National Semiconductor Corporation.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without 
- * modification, are permitted provided that the following conditions 
- * are met: 
- *
- *   * Redistributions of source code must retain the above copyright 
- *     notice, this list of conditions and the following disclaimer. 
- *
- *   * Redistributions in binary form must reproduce the above 
- *     copyright notice, this list of conditions and the following 
- *     disclaimer in the documentation and/or other materials provided 
- *     with the distribution. 
- *
- *   * Neither the name of the National Semiconductor Corporation nor 
- *     the names of its contributors may be used to endorse or promote 
- *     products derived from this software without specific prior 
- *     written permission. 
- * 
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
- * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
- * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE,
- * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
- * OF SUCH DAMAGE.
- *
- * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
- * YOUR JURISDICTION. It is licensee's responsibility to comply with 
- * any export regulations applicable in licensee's jurisdiction. Under 
- * CURRENT (2001) U.S. export regulations this software 
- * is eligible for export from the U.S. and can be downloaded by or 
- * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
- * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
- * Syria, Sudan, Afghanistan and any other country to which the U.S. 
- * has embargoed goods and services. 
- *
- * END_NSC_LIC_BSD */
-
-/* NSC_LIC_GPL
- *
- * National Semiconductor Corporation Gnu General Public License for Durango
- *
- * (GPL License with Export Notice)
- *
- * Copyright (c) 1999-2001
- * National Semiconductor Corporation.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without 
- * modification, are permitted under the terms of the GNU General 
- * Public License as published by the Free Software Foundation; either 
- * version 2 of the License, or (at your option) any later version  
- *
- * In addition to the terms of the GNU General Public License, neither 
- * the name of the National Semiconductor Corporation nor the names of 
- * its contributors may be used to endorse or promote products derived 
- * from this software without specific prior written permission. 
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
- * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
- * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, 
- * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
- * OF SUCH DAMAGE. See the GNU General Public License for more details. 
- *
- * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
- * YOUR JURISDICTION. It is licensee's responsibility to comply with 
- * any export regulations applicable in licensee's jurisdiction. Under 
- * CURRENT (2001) U.S. export regulations this software 
- * is eligible for export from the U.S. and can be downloaded by or 
- * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
- * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
- * Syria, Sudan, Afghanistan and any other country to which the U.S. 
- * has embargoed goods and services. 
- *
- * You should have received a copy of the GNU General Public License 
- * along with this file; if not, write to the Free Software Foundation, 
- * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 
- *
- * END_NSC_LIC_GPL */
-
-
-#ifndef _gfx_rtns_h
-#define _gfx_rtns_h
-
-/* INCLUDE DURANGO DEFINITIONS */
-/* These definitions are placed in another file to allow their inclusion      */
-/* in a user application.  Such applications generally work through driver    */
-/* shell routines that simply pass their parameters to Durango routines.      */
-/* An external file provides an easy way to provide the definitions for these */
-/* parameters without the applications gaining any Durango visisbility.       */
-
-#include "gfx_type.h"
-
-/* COMPILER OPTION FOR C++ PROGRAMS */
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* DURANGO MEMORY POINTERS */
-
-extern unsigned char *gfx_virt_regptr;
-extern unsigned char *gfx_virt_fbptr;
-extern unsigned char *gfx_virt_vidptr;
-extern unsigned char *gfx_virt_vipptr;
-extern unsigned char *gfx_virt_spptr;
-extern unsigned char *gfx_virt_gpptr;
-
-extern unsigned char *gfx_phys_regptr;
-extern unsigned char *gfx_phys_fbptr;
-extern unsigned char *gfx_phys_vidptr;
-extern unsigned char *gfx_phys_vipptr;
-extern unsigned char *gfx_phys_spptr;
-extern unsigned char *gfx_phys_gpptr;
-
-/* DURANGO VARIBLES FOR RUNTIME SELECTION AND POSSIBLE VALUES */
-
-extern int gfx_display_type;
-#define GFX_DISPLAY_TYPE_GU1		0x0001
-#define GFX_DISPLAY_TYPE_GU2		0x0002
-
-extern int gfx_init_type;
-#define GFX_INIT_TYPE_GU1           0x0001
-#define GFX_INIT_TYPE_GU2           0x0002
-
-extern int gfx_msr_type;
-#define GFX_MSR_TYPE_REDCLOUD       0x0001
-
-extern int gfx_2daccel_type;
-#define GFX_2DACCEL_TYPE_GU1		0x0001
-#define GFX_2DACCEL_TYPE_GU2		0x0002
-
-extern int gfx_video_type;
-#define GFX_VIDEO_TYPE_CS5530		0x0001
-#define GFX_VIDEO_TYPE_SC1200		0x0002
-#define GFX_VIDEO_TYPE_REDCLOUD     0x0004
-
-extern int gfx_vip_type;
-#define GFX_VIP_TYPE_SC1200			0x0001
-
-extern int gfx_decoder_type;
-#define GFX_DECODER_TYPE_SAA7114	0x0001
-
-extern int gfx_tv_type;
-#define GFX_TV_TYPE_SC1200			0x0001
-#define GFX_TV_TYPE_FS451			0x0002
-
-extern int gfx_i2c_type;
-#define GFX_I2C_TYPE_ACCESS			0x0001
-#define GFX_I2C_TYPE_GPIO			0x0002
-
-/* GLOBAL CPU INFORMATION */
-
-extern unsigned long gfx_cpu_version;
-extern unsigned long gfx_cpu_frequency;
-extern unsigned long gfx_vid_version;
-extern ChipType gfx_chip_revision;
-
-/* ROUTINES IN GFX_INIT.C */
-
-unsigned long gfx_pci_config_read(unsigned long address);
-void gfx_pci_config_write(unsigned long address, unsigned long data);
-unsigned long gfx_get_core_freq(void);
-unsigned long gfx_detect_cpu(void);
-unsigned long gfx_detect_video(void);
-unsigned long gfx_get_cpu_register_base(void);
-unsigned long gfx_get_graphics_register_base(void);
-unsigned long gfx_get_frame_buffer_base(void);
-unsigned long gfx_get_frame_buffer_size(void);
-unsigned long gfx_get_vid_register_base(void);
-unsigned long gfx_get_vip_register_base(void);
- 
-/* ROUTINES IN GFX_MSR.C */
-
-int gfx_msr_init (void);
-DEV_STATUS gfx_id_msr_device (MSR *pDev, unsigned long address);
-DEV_STATUS gfx_get_msr_dev_address (unsigned int device, unsigned long *address);
-DEV_STATUS gfx_get_glink_id_at_address(unsigned int *device, unsigned long address);
-DEV_STATUS gfx_msr_read (unsigned int device, unsigned int msrRegister, Q_WORD *msrValue);
-DEV_STATUS gfx_msr_write (unsigned int device, unsigned int msrRegister, Q_WORD *msrValue);
-
-/* ROUTINES IN GFX_DISP.C */
-
-int gfx_set_display_bpp (unsigned short bpp);
-int gfx_is_display_mode_supported(int xres, int yres, int bpp, int hz);
-int gfx_set_display_mode(int xres, int yres, int bpp, int hz);
-int	gfx_set_display_timings(unsigned short bpp, unsigned short flags,
-	unsigned short hactive, unsigned short hblank_start, 
-	unsigned short hsync_start, unsigned short hsync_end, 
-	unsigned short hblank_end, unsigned short htotal, 
-    unsigned short vactive, unsigned short vblank_start, 
-	unsigned short vsync_start, unsigned short vsync_end, 
-	unsigned short vblank_end, unsigned short vtotal,
-	unsigned long frequency);
-int gfx_set_vtotal(unsigned short vtotal);	
-void gfx_set_display_pitch(unsigned short pitch);
-void gfx_set_display_offset(unsigned long offset);
-int gfx_set_display_palette_entry(unsigned long index, unsigned long palette);
-int gfx_set_display_palette(unsigned long *palette);
-void gfx_video_shutdown(void);
-void gfx_set_clock_frequency(unsigned long frequency);
-int gfx_set_crt_enable(int enable);
-void gfx_set_cursor_enable(int enable);
-void gfx_set_cursor_colors(unsigned long bkcolor, unsigned long fgcolor);
-void gfx_set_cursor_position(unsigned long memoffset, 
-	unsigned short xpos, unsigned short ypos, 
-	unsigned short xhotspot, unsigned short yhotspot);
-void gfx_set_cursor_shape32(unsigned long memoffset, 
-	unsigned long *andmask, unsigned long *xormask);
-void gfx_set_cursor_shape64(unsigned long memoffset, 
-	unsigned long *andmask, unsigned long *xormask);
-void gfx_set_icon_enable (int enable);
-void gfx_set_icon_colors (unsigned long color0, unsigned long color1, unsigned long color2);
-void gfx_set_icon_position (unsigned long memoffset, unsigned short xpos);
-void gfx_set_icon_shape64 (unsigned long memoffset, unsigned long *andmask, 
-						   unsigned long *xormask, unsigned int lines);
-
-int gfx_set_compression_enable(int enable);
-int gfx_set_compression_offset(unsigned long offset);
-int gfx_set_compression_pitch(unsigned short pitch);
-int gfx_set_compression_size(unsigned short size);
-void gfx_set_display_priority_high(int enable);
-int gfx_test_timing_active(void);
-int gfx_test_vertical_active(void);
-int gfx_wait_vertical_blank(void);
-void gfx_delay_milliseconds(unsigned long milliseconds);
-void gfx_delay_microseconds(unsigned long microseconds);
-void gfx_enable_panning(int x, int y);
-int gfx_set_fixed_timings(int panelResX, int panelResY, unsigned short width, unsigned short height, unsigned short bpp);
-int gfx_set_panel_present(int panelResX, int panelResY, unsigned short width, unsigned short height, unsigned short bpp);
-void gfx_reset_timing_lock(void);
-
-/* "READ" ROUTINES IN GFX_DISP.C */
-
-int gfx_get_display_details(unsigned int mode, int *xres, int *yres, int *hz);
-unsigned short gfx_get_display_pitch(void);
-int gfx_get_vsa2_softvga_enable(void);
-int gfx_get_sync_polarities(void);
-unsigned long gfx_get_clock_frequency(void);
-unsigned long gfx_get_max_supported_pixel_clock (void);
-int gfx_mode_frequency_supported(int xres, int yres, int bpp, unsigned long frequency);
-int gfx_get_refreshrate_from_frequency(int xres, int yres, int bpp, int *hz, unsigned long frequency);
-int gfx_get_refreshrate_from_mode(int xres, int yres, int bpp, int *hz, unsigned long frequency);
-int gfx_get_frequency_from_refreshrate(int xres, int yres, int bpp, int hz, int *frequency);
-int gfx_get_display_mode_count(void);
-int gfx_get_display_mode(int *xres, int *yres, int *bpp, int *hz);
-unsigned long gfx_get_frame_buffer_line_size (void);
-unsigned short gfx_get_hactive(void);
-unsigned short gfx_get_hblank_start(void);
-unsigned short gfx_get_hsync_start(void);
-unsigned short gfx_get_hsync_end(void);
-unsigned short gfx_get_hblank_end(void);
-unsigned short gfx_get_htotal(void);
-unsigned short gfx_get_vactive(void);
-unsigned short gfx_get_vline(void);
-unsigned short gfx_get_vblank_start(void);
-unsigned short gfx_get_vsync_start(void);
-unsigned short gfx_get_vsync_end(void);
-unsigned short gfx_get_vblank_end(void);
-unsigned short gfx_get_vtotal(void);
-unsigned short gfx_get_display_bpp(void);
-unsigned long gfx_get_display_offset(void);
-int gfx_get_display_palette_entry(unsigned long index, unsigned long *palette);
-void gfx_get_display_palette(unsigned long *palette);
-unsigned long gfx_get_cursor_enable(void);
-unsigned long gfx_get_cursor_offset(void);
-unsigned long gfx_get_cursor_position(void);
-unsigned long gfx_get_cursor_clip(void);
-unsigned long gfx_get_cursor_color(int color);
-unsigned long gfx_get_icon_enable(void);
-unsigned long gfx_get_icon_offset (void);
-unsigned long gfx_get_icon_position (void);
-unsigned long gfx_get_icon_color (int color);
-int gfx_get_compression_enable(void);
-unsigned long gfx_get_compression_offset(void);
-unsigned short gfx_get_compression_pitch(void);
-unsigned short gfx_get_compression_size(void);
-int gfx_get_display_priority_high(void);
-int gfx_get_valid_bit(int line);
-
-/* ROUTINES IN GFX_RNDR.C */
-
-void gfx_set_bpp(unsigned short bpp);
-void gfx_set_solid_pattern(unsigned long color);
-void gfx_set_mono_pattern(unsigned long bgcolor, unsigned long fgcolor, 
-	unsigned long data0, unsigned long data1, unsigned char transparency);
-void gfx_set_color_pattern(unsigned long bgcolor, unsigned long fgcolor, 
-	unsigned long data0, unsigned long data1,unsigned long data2,unsigned long data3, unsigned char transparency);
-void gfx_load_color_pattern_line (short y, unsigned long *pattern_8x8);
-void gfx_set_solid_source(unsigned long color);
-void gfx_set_mono_source(unsigned long bgcolor, unsigned long fgcolor,
-	unsigned short transparent);
-void gfx_set_pattern_flags(unsigned short flags);
-void gfx_set_raster_operation(unsigned char rop);
-void gfx_pattern_fill(unsigned short x, unsigned short y, 
-	unsigned short width, unsigned short height);
-void gfx_color_pattern_fill(unsigned short x, unsigned short y, 
-	unsigned short width, unsigned short height, unsigned long *pattern);
-void gfx_screen_to_screen_blt(unsigned short srcx, unsigned short srcy,
-	unsigned short dstx, unsigned short dsty, unsigned short width, 
-	unsigned short height);
-void gfx_screen_to_screen_xblt(unsigned short srcx, unsigned short srcy,
-	unsigned short dstx, unsigned short dsty, unsigned short width, 
-	unsigned short height, unsigned long color);
-void gfx_color_bitmap_to_screen_blt(unsigned short srcx, unsigned short srcy,
-	unsigned short dstx, unsigned short dsty, unsigned short width, 
-	unsigned short height, unsigned char *data, long pitch); 
-void gfx_color_bitmap_to_screen_xblt(unsigned short srcx, unsigned short srcy,
-	unsigned short dstx, unsigned short dsty, unsigned short width, 
-	unsigned short height, unsigned char *data, long pitch, 
-	unsigned long color); 
-void gfx_mono_bitmap_to_screen_blt(unsigned short srcx, unsigned short srcy,
-	unsigned short dstx, unsigned short dsty, unsigned short width, 
-	unsigned short height, unsigned char *data, short pitch); 
-void gfx_text_blt(unsigned short dstx, unsigned short dsty, unsigned short width, 
-	unsigned short height, unsigned char *data);
-void gfx_bresenham_line(unsigned short x, unsigned short y, 
-	unsigned short length, unsigned short initerr, 
-	unsigned short axialerr, unsigned short diagerr, 
-	unsigned short flags);
-void gfx_wait_until_idle(void);
-int gfx_test_blt_pending(void);
-
-/* SECOND GENERATION RENDERING ROUTINES */
-
-void gfx2_set_source_stride(unsigned short stride);
-void gfx2_set_destination_stride(unsigned short stride);
-void gfx2_set_pattern_origin(int x, int y);
-void gfx2_set_source_transparency(unsigned long color, unsigned long mask);
-void gfx2_set_alpha_mode(int mode);
-void gfx2_set_alpha_value(unsigned char value);
-void gfx2_pattern_fill(unsigned long dstoffset, unsigned short width, 
-	unsigned short height);
-void gfx2_color_pattern_fill(unsigned long dstoffset, unsigned short width, 
-	unsigned short height, unsigned long *pattern);
-void gfx2_screen_to_screen_blt(unsigned long srcoffset, unsigned long dstoffset, 
-	unsigned short width, unsigned short height, int flags);
-void gfx2_mono_expand_blt(unsigned long srcbase, unsigned short srcx, 
-	unsigned short srcy, unsigned long dstoffset, unsigned short width, 
-	unsigned short height, int byte_packed);
-void gfx2_color_bitmap_to_screen_blt(unsigned short srcx, unsigned short srcy,
-	unsigned long dstoffset, unsigned short width, unsigned short height, 
-	unsigned char *data, unsigned short pitch);
-void gfx2_mono_bitmap_to_screen_blt(unsigned short srcx, unsigned short srcy,
-	unsigned long dstoffset, unsigned short width, unsigned short height, 
-	unsigned char *data, unsigned short pitch);
-void gfx2_text_blt (unsigned long dstoffset, unsigned short width, unsigned short height, 
-					unsigned char *data);
-void gfx2_bresenham_line(unsigned long dstoffset, 
-	unsigned short length, unsigned short initerr, 
-	unsigned short axialerr, unsigned short diagerr, 
-	unsigned short flags);
-void gfx2_sync_to_vblank(void);
-
-/* ROUTINES IN GFX_VID.C */
-
-int gfx_set_video_enable(int enable);
-int gfx_set_video_format(unsigned long format);
-int gfx_set_video_size(unsigned short width, unsigned short height);
-int gfx_set_video_yuv_pitch (unsigned long ypitch, unsigned long uvpitch);
-int gfx_set_video_offset(unsigned long offset);
-int gfx_set_video_yuv_offsets (unsigned long yoffset, unsigned long uoffset,
-							   unsigned long voffset);
-int gfx_set_video_window(short x, short y, unsigned short w, unsigned short h);
-int gfx_set_video_left_crop(unsigned short x);
-int gfx_set_video_upscale(unsigned short srcw, unsigned short srch, 
-	unsigned short dstw, unsigned short dsth);
-int gfx_set_video_scale(unsigned short srcw, unsigned short srch, 
-	unsigned short dstw, unsigned short dsth);
-int gfx_set_video_vertical_downscale(unsigned short srch, unsigned short dsth);
-void gfx_set_video_vertical_downscale_enable (int enable);
-int gfx_set_video_downscale_config(unsigned short type, unsigned short m);
-int gfx_set_video_color_key(unsigned long key, unsigned long mask, 
-	int bluescreen);
-int gfx_set_video_filter(int xfilter, int yfilter);
-int gfx_set_video_palette(unsigned long *palette);
-int gfx_set_video_palette_entry (unsigned long index, unsigned long color);
-int gfx_set_video_downscale_coefficients(unsigned short coef1, unsigned short coef2,
-										 unsigned short coef3, unsigned short coef4) ;
-int gfx_set_video_downscale_enable(int enable);										 
-int gfx_set_video_source(VideoSourceType source);
-int gfx_set_vbi_source(VbiSourceType source);
-int gfx_set_vbi_lines(unsigned long even, unsigned long odd);
-int gfx_set_vbi_total(unsigned long even, unsigned long odd);
-int gfx_set_video_interlaced(int enable);
-int gfx_set_color_space_YUV(int enable);
-int gfx_set_vertical_scaler_offset(char offset);
-int gfx_set_top_line_in_odd(int enable);
-int gfx_set_genlock_delay(unsigned long delay);
-int gfx_set_genlock_enable(int flags);
-int gfx_set_video_cursor(unsigned long key, unsigned long mask, unsigned short select_color2,
-						 unsigned long color1, unsigned long color2);
-int gfx_set_video_cursor_enable (int enable);
-int gfx_set_video_request(short x, short y);
-
-int gfx_select_alpha_region(int region);
-int gfx_set_alpha_enable(int enable);
-int gfx_set_alpha_window(short x, short y, 
-	unsigned short width, unsigned short height);
-int gfx_set_alpha_value(unsigned char alpha, char delta);
-int gfx_set_alpha_priority(int priority);
-int gfx_set_alpha_color(unsigned long color);
-int gfx_set_alpha_color_enable(int enable);
-int gfx_set_no_ck_outside_alpha(int enable);
-int gfx_disable_softvga(void);
-int gfx_enable_softvga(void);
-int gfx_set_macrovision_enable(int enable);
-
-/* READ ROUTINES IN GFX_VID.C */
-
-int gfx_get_video_enable(void);
-int gfx_get_video_format(void);
-unsigned long gfx_get_video_src_size(void);
-unsigned long gfx_get_video_line_size(void);
-unsigned long gfx_get_video_xclip(void);
-unsigned long gfx_get_video_offset(void);
-void gfx_get_video_yuv_offsets (unsigned long *yoffset, unsigned long *uoffset, 
-								unsigned long *voffset);
-void gfx_get_video_yuv_pitch (unsigned long *ypitch, unsigned long *uvpitch);
-unsigned long gfx_get_video_upscale(void);
-unsigned long gfx_get_video_scale(void);
-unsigned long gfx_get_video_downscale_delta(void);
-int gfx_get_video_vertical_downscale_enable (void);
-int gfx_get_video_downscale_config(unsigned short *type, unsigned short *m);
-void gfx_get_video_downscale_coefficients(unsigned short *coef1, unsigned short *coef2,
-										  unsigned short *coef3, unsigned short *coef4);
-void gfx_get_video_downscale_enable(int *enable);									  
-unsigned long gfx_get_video_dst_size(void);
-unsigned long gfx_get_video_position(void);
-unsigned long gfx_get_video_color_key(void);
-unsigned long gfx_get_video_color_key_mask(void);
-int gfx_get_video_palette_entry(unsigned long index, unsigned long *palette);
-int gfx_get_video_color_key_src(void);
-int gfx_get_video_filter(void);
-int gfx_get_video_request(short *x, short *y);
-int gfx_get_video_source(VideoSourceType *source);
-int gfx_get_vbi_source(VbiSourceType *source);
-unsigned long gfx_get_vbi_lines(int odd);
-unsigned long gfx_get_vbi_total(int odd);
-int gfx_get_video_interlaced(void);
-int gfx_get_color_space_YUV(void);
-int gfx_get_vertical_scaler_offset(char *offset);
-unsigned long gfx_get_genlock_delay(void);
-int gfx_get_genlock_enable(void);
-int gfx_get_video_cursor(unsigned long *key, unsigned long *mask, unsigned short *select_color2,
-						 unsigned long *color1, unsigned short *color2);
-unsigned long gfx_read_crc(void);
-unsigned long gfx_read_crc32(void);
-unsigned long gfx_read_window_crc(int source, unsigned short x, unsigned short y,
-								  unsigned short width, unsigned short height, int crc32);
-int gfx_get_macrovision_enable(void);
-
-void gfx_get_alpha_enable(int *enable);
-void gfx_get_alpha_size(unsigned short *x, unsigned short *y, 
-	unsigned short *width, unsigned short *height);
-void gfx_get_alpha_value(unsigned char *alpha, char *delta);
-void gfx_get_alpha_priority(int *priority);
-void gfx_get_alpha_color(unsigned long *color);
-
-/* ROUTINES IN GFX_VIP.C */
-
-int gfx_set_vip_enable(int enable);
-int gfx_set_vip_capture_run_mode(int mode);
-int gfx_set_vip_base(unsigned long even, unsigned long odd);
-int gfx_set_vip_pitch(unsigned long pitch);
-int gfx_set_vip_mode(int mode);
-int gfx_set_vbi_enable(int enable);
-int gfx_set_vbi_mode(int mode);
-int gfx_set_vbi_base(unsigned long even, unsigned long odd);
-int gfx_set_vbi_pitch(unsigned long pitch);
-int gfx_set_vbi_direct(unsigned long even_lines, unsigned long odd_lines);
-int gfx_set_vbi_interrupt(int enable);
-int gfx_set_vip_bus_request_threshold_high(int enable);
-int gfx_set_vip_last_line(int last_line);
-int gfx_test_vip_odd_field(void);
-int gfx_test_vip_bases_updated(void);
-int gfx_test_vip_fifo_overflow(void);
-int gfx_get_vip_line(void);
-
-/* READ ROUTINES IN GFX_VIP.C */
-
-int gfx_get_vip_enable(void);
-unsigned long gfx_get_vip_base(int odd);
-unsigned long gfx_get_vip_pitch(void);
-int gfx_get_vip_mode(void);
-int gfx_get_vbi_enable(void);
-int gfx_get_vbi_mode(void);
-unsigned long gfx_get_vbi_base(int odd);
-unsigned long gfx_get_vbi_pitch(void);
-unsigned long gfx_get_vbi_direct(int odd);
-int gfx_get_vbi_interrupt(void);
-int gfx_get_vip_bus_request_threshold_high(void);
-
-/* ROUTINES IN GFX_DCDR.C */
-
-int gfx_set_decoder_defaults(void);
-int gfx_set_decoder_analog_input(unsigned char input);
-int gfx_set_decoder_brightness(unsigned char brightness);
-int gfx_set_decoder_contrast(unsigned char contrast);
-int gfx_set_decoder_hue(char hue);
-int gfx_set_decoder_saturation(unsigned char saturation);
-int gfx_set_decoder_input_offset(unsigned short x, unsigned short y);
-int gfx_set_decoder_input_size(unsigned short width, unsigned short height);
-int gfx_set_decoder_output_size(unsigned short width, unsigned short height);
-int gfx_set_decoder_scale(unsigned short srcw, unsigned short srch, 
-	unsigned short dstw, unsigned short dsth);
-int gfx_set_decoder_vbi_format(int start, int end, int format);
-int gfx_set_decoder_vbi_enable(int enable);
-int gfx_set_decoder_vbi_upscale(void);
-int gfx_set_decoder_TV_standard(TVStandardType TVStandard);
-int gfx_set_decoder_luminance_filter(unsigned char lufi);
-int gfx_decoder_software_reset(void);
-int gfx_decoder_detect_macrovision(void);
-int gfx_decoder_detect_video(void);
-
-/* READ ROUTINES IN GFX_DCDR.C */
-
-unsigned char gfx_get_decoder_brightness(void);
-unsigned char gfx_get_decoder_contrast(void);
-char gfx_get_decoder_hue(void);
-unsigned char gfx_get_decoder_saturation(void);
-unsigned long gfx_get_decoder_input_offset(void);
-unsigned long gfx_get_decoder_input_size(void);
-unsigned long gfx_get_decoder_output_size(void);
-int gfx_get_decoder_vbi_format(int line);
-
-/* ROUTINES IN GFX_I2C.C */
-
-int gfx_i2c_reset(unsigned char busnum, short adr, char freq);
-int gfx_i2c_write(unsigned char busnum, unsigned char chipadr, unsigned char subadr, 
-	unsigned char bytes, unsigned char * data);
-int gfx_i2c_read(unsigned char busnum, unsigned char chipadr, unsigned char subadr, 
-	unsigned char bytes, unsigned char * data);
-int gfx_i2c_select_gpio(int clock, int data);
-int gfx_i2c_init(void);
-void gfx_i2c_cleanup(void);
-
-/* ROUTINES IN GFX_TV.C */
-
-int gfx_set_tv_format(TVStandardType format, GfxOnTVType resolution);
-int gfx_set_tv_output(int output);
-int gfx_set_tv_enable(int enable);
-int gfx_set_tv_flicker_filter(int ff);
-int gfx_set_tv_sub_carrier_reset(int screset);
-int gfx_set_tv_vphase(int vphase);
-int gfx_set_tv_YC_delay(int delay);
-int gfx_set_tvenc_reset_interval(int interval);
-int gfx_set_tv_cc_enable(int enable);
-int gfx_set_tv_cc_data(unsigned char data1, unsigned char data2);
-int gfx_set_tv_display(int width, int height);
-int gfx_test_tvout_odd_field(void);
-int gfx_test_tvenc_odd_field(void);
-int gfx_set_tv_field_status_invert(int enable);
-int gfx_get_tv_vphase(void);
-int gfx_get_tv_enable(unsigned int *p_on);
-int gfx_get_tv_output(void);
-int gfx_get_tv_mode_count(TVStandardType format);
-int gfx_get_tv_display_mode (int *width, int *height, int *bpp, int *hz);
-int gfx_get_tv_display_mode_frequency (unsigned short width, unsigned short height, TVStandardType format, int *frequency);
-int gfx_is_tv_display_mode_supported (unsigned short width, unsigned short height, TVStandardType format);
-
-int gfx_get_tv_standard(unsigned long *p_standard);
-int gfx_get_available_tv_standards(unsigned long *p_standards);
-int gfx_set_tv_standard(unsigned long standard);
-int gfx_get_tv_vga_mode(unsigned long *p_vga_mode);
-int gfx_get_available_tv_vga_modes(unsigned long *p_vga_modes);
-int gfx_set_tv_vga_mode(unsigned long vga_mode);
-int gfx_get_tvout_mode(unsigned long *p_tvout_mode);
-int gfx_set_tvout_mode(unsigned long tvout_mode);
-int gfx_get_sharpness(int *p_sharpness);
-int gfx_set_sharpness(int sharpness);
-int gfx_get_flicker_filter(int *p_flicker);
-int gfx_set_flicker_filter(int flicker);
-int gfx_get_overscan(int *p_x, int *p_y);
-int gfx_set_overscan(int x, int y);
-int gfx_get_position(int *p_x, int *p_y);
-int gfx_set_position(int x, int y);
-int gfx_get_color(int *p_color);
-int gfx_set_color(int color);
-int gfx_get_brightness(int *p_brightness);
-int gfx_set_brightness(int brightness);
-int gfx_get_contrast(int *p_contrast);
-int gfx_set_contrast(int constrast);
-int gfx_get_yc_filter(unsigned int *p_yc_filter);
-int gfx_set_yc_filter(unsigned int yc_filter);
-int gfx_get_aps_trigger_bits(unsigned int *p_trigger_bits);
-int gfx_set_aps_trigger_bits(unsigned int trigger_bits);
-
-/* ROUTINES IN GFX_VGA.C */
-
-int gfx_get_softvga_active(void);
-int gfx_vga_test_pci(void);
-unsigned char gfx_vga_get_pci_command(void);
-int gfx_vga_set_pci_command(unsigned char command);
-int gfx_vga_seq_reset(int reset);
-int gfx_vga_set_graphics_bits(void);
-int gfx_vga_mode(gfx_vga_struct *vga, int xres, int yres, int bpp, int hz);
-int gfx_vga_pitch(gfx_vga_struct *vga, unsigned short pitch);
-int gfx_vga_save(gfx_vga_struct *vga, int flags);
-int gfx_vga_restore(gfx_vga_struct *vga, int flags);
-int gfx_vga_mode_switch(int active);
-void gfx_vga_clear_extended(void);
-
-/* CLOSE BRACKET FOR C++ COMPLILATION */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* !_gfx_rtns_h */
-
-/* END OF FILE */
-
-
-
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/rndr_gu1.c b/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/rndr_gu1.c
deleted file mode 100644
index 14f21d145..000000000
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/rndr_gu1.c
+++ /dev/null
@@ -1,1660 +0,0 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/rndr_gu1.c,v 1.1 2002/10/11 14:33:01 alanh Exp $ */
-/*
- * $Workfile: rndr_gu1.c $
- *
- * This file contains routines to program the 2D acceleration hardware for
- * the first generation graphics unit (GXLV, SC1200).
- * 
- *    gfx_set_bpp            
- *    gfx_set_solid_pattern  
- *    gfx_set_mono_pattern
- *    gfx_set_color_pattern
- *    gfx_set_solid_source  
- *    gfx_set_mono_source
- *    gfx_set_raster_operation
- *    gfx_pattern_fill
- *    gfx_screen_to_screen_blt
- *    gfx_screen_to_screen_xblt
- *    gfx_color_bitmap_to_screen_blt
- *    gfx_color_bitmap_to_screen_xblt
- *    gfx_mono_bitmap_to_screen_blt
- *    gfx_bresenham_line 
- *    gfx_wait_until_idle   
- *
- * NSC_LIC_ALTERNATIVE_PREAMBLE
- *
- * Revision 1.0
- *
- * National Semiconductor Alternative GPL-BSD License
- *
- * National Semiconductor Corporation licenses this software 
- * ("Software"):
- *
- *      Durango
- *
- * under one of the two following licenses, depending on how the 
- * Software is received by the Licensee.
- * 
- * If this Software is received as part of the Linux Framebuffer or
- * other GPL licensed software, then the GPL license designated 
- * NSC_LIC_GPL applies to this Software; in all other circumstances 
- * then the BSD-style license designated NSC_LIC_BSD shall apply.
- *
- * END_NSC_LIC_ALTERNATIVE_PREAMBLE */
-
-/* NSC_LIC_BSD
- *
- * National Semiconductor Corporation Open Source License for Durango
- *
- * (BSD License with Export Notice)
- *
- * Copyright (c) 1999-2001
- * National Semiconductor Corporation.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without 
- * modification, are permitted provided that the following conditions 
- * are met: 
- *
- *   * Redistributions of source code must retain the above copyright 
- *     notice, this list of conditions and the following disclaimer. 
- *
- *   * Redistributions in binary form must reproduce the above 
- *     copyright notice, this list of conditions and the following 
- *     disclaimer in the documentation and/or other materials provided 
- *     with the distribution. 
- *
- *   * Neither the name of the National Semiconductor Corporation nor 
- *     the names of its contributors may be used to endorse or promote 
- *     products derived from this software without specific prior 
- *     written permission. 
- * 
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
- * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
- * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE,
- * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
- * OF SUCH DAMAGE.
- *
- * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
- * YOUR JURISDICTION. It is licensee's responsibility to comply with 
- * any export regulations applicable in licensee's jurisdiction. Under 
- * CURRENT (2001) U.S. export regulations this software 
- * is eligible for export from the U.S. and can be downloaded by or 
- * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
- * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
- * Syria, Sudan, Afghanistan and any other country to which the U.S. 
- * has embargoed goods and services. 
- *
- * END_NSC_LIC_BSD */
-
-/* NSC_LIC_GPL
- *
- * National Semiconductor Corporation Gnu General Public License for Durango
- *
- * (GPL License with Export Notice)
- *
- * Copyright (c) 1999-2001
- * National Semiconductor Corporation.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without 
- * modification, are permitted under the terms of the GNU General 
- * Public License as published by the Free Software Foundation; either 
- * version 2 of the License, or (at your option) any later version  
- *
- * In addition to the terms of the GNU General Public License, neither 
- * the name of the National Semiconductor Corporation nor the names of 
- * its contributors may be used to endorse or promote products derived 
- * from this software without specific prior written permission. 
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
- * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
- * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, 
- * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
- * OF SUCH DAMAGE. See the GNU General Public License for more details. 
- *
- * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
- * YOUR JURISDICTION. It is licensee's responsibility to comply with 
- * any export regulations applicable in licensee's jurisdiction. Under 
- * CURRENT (2001) U.S. export regulations this software 
- * is eligible for export from the U.S. and can be downloaded by or 
- * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
- * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
- * Syria, Sudan, Afghanistan and any other country to which the U.S. 
- * has embargoed goods and services. 
- *
- * You should have received a copy of the GNU General Public License 
- * along with this file; if not, write to the Free Software Foundation, 
- * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 
- *
- * END_NSC_LIC_GPL */
-
-
-#if GFX_NO_IO_IN_WAIT_MACROS
-#define GFX_WAIT_PENDING while(READ_REG16(GP_BLIT_STATUS) & BS_BLIT_PENDING) { ; }
-#define GFX_WAIT_BUSY while(READ_REG16(GP_BLIT_STATUS) & BS_BLIT_BUSY) { ; }
-#define GFX_WAIT_PIPELINE while (READ_REG16(GP_BLIT_STATUS) & BS_PIPELINE_BUSY) { ; }
-#else
-#define GFX_WAIT_PENDING while(READ_REG16(GP_BLIT_STATUS) & BS_BLIT_PENDING) { INB (0x80); }
-#define GFX_WAIT_BUSY while(READ_REG16(GP_BLIT_STATUS) & BS_BLIT_BUSY) { INB (0x80); }
-#define GFX_WAIT_PIPELINE while (READ_REG16(GP_BLIT_STATUS) & BS_PIPELINE_BUSY) { INB (0x80); }
-#endif      
-
-void gu1_detect_blt_buffer_base(void);
-
-/*---------------------------------------------------------------------------
- * GFX_SET_BPP
- *
- * This routine sets the bits per pixel value in the graphics engine.
- * It is also stored in a static variable to use in the future calls to 
- * the rendering routines.
- *---------------------------------------------------------------------------
- */
-#if GFX_2DACCEL_DYNAMIC
-void gu1_set_bpp(unsigned short bpp)
-#else
-void gfx_set_bpp(unsigned short bpp)
-#endif
-{
-	int control = 0;
-	unsigned short pitch = gfx_get_display_pitch();
-	GFXbpp = bpp;
-
-	/* DETECT BASE ADDRESSES FOR BLT BUFFERS */
-	/* Different for 2K or 3K of scratchpad.  Also need to calculate */
-	/* the number of pixels that can fit in a BLT buffer - need to */
-	/* subtract 16 for alignment considerations.  The 2K case, for */
-	/* example, is 816 bytes wide, allowing 800 pixels in 8 BPP, which */
-	/* means rendering operations won't be split for 800x600. */
-
-	gu1_detect_blt_buffer_base();
-	GFXbufferWidthPixels = GFXbb1Base - GFXbb0Base - 16;
-	if( bpp > 8 ) {
-		/* If 16bpp, divide GFXbufferWidthPixels by 2 */
-		GFXbufferWidthPixels >>= 1; 
-	}
-
-	/* SET THE GRAPHICS CONTROLLER BPP AND PITCH */
-	if( bpp > 8 ) {
-		/* Set the 16bpp bit if necessary */
-		control = BC_16BPP;
-	}
-	if((gfx_cpu_version == GFX_CPU_PYRAMID) && ( pitch > 2048 )) { 
-		control |= BC_FB_WIDTH_4096;
-	} else if ( pitch > 1024) {
-		control |= BC_FB_WIDTH_2048;
-	}
-	GFX_WAIT_BUSY;
-	WRITE_REG32(GP_BLIT_STATUS, control); 
-}
-
-/*
-//---------------------------------------------------------------------------
-// GFX_SET_SOLID_SOURCE
-//
-// This routine is used to specify a solid source color.  For the Xfree96
-// display driver, the source color is used to specify a planemask and the 
-// ROP is adjusted accordingly.
-//---------------------------------------------------------------------------
-*/
-#if GFX_2DACCEL_DYNAMIC
-void gu1_set_solid_source(unsigned long color)
-#else
-void gfx_set_solid_source(unsigned long color)
-#endif
-{
-	/* CLEAR TRANSPARENCY FLAG */
-
-	GFXsourceFlags = 0;
-
-	/* FORMAT 8 BPP COLOR */
-	/* GX requires 8BPP color data be duplicated into bits [15:8]. */
-
-	if (GFXbpp == 8)
-	{
-		color &= 0x00FF;
-		color |= (color << 8);
-	}
-	
-	/* POLL UNTIL ABLE TO WRITE THE SOURCE COLOR */
-
-	GFX_WAIT_PENDING;
- 	WRITE_REG16(GP_SRC_COLOR_0, (unsigned short) color);
- 	WRITE_REG16(GP_SRC_COLOR_1, (unsigned short) color);
-}
-
-/*
-//---------------------------------------------------------------------------
-// GFX_SET_MONO_SOURCE
-//
-// This routine is used to specify the monochrome source colors.  
-// It must be called *after* loading any pattern data (those routines 
-// clear the source flags).
-//---------------------------------------------------------------------------
-*/
-#if GFX_2DACCEL_DYNAMIC
-void gu1_set_mono_source(unsigned long bgcolor, unsigned long fgcolor,
-	unsigned short transparent)
-#else
-void gfx_set_mono_source(unsigned long bgcolor, unsigned long fgcolor,
-	unsigned short transparent)
-#endif
-{
-	/* SET TRANSPARENCY FLAG */
-
-	GFXsourceFlags = transparent ? RM_SRC_TRANSPARENT : 0;
-
-	/* FORMAT 8 BPP COLOR */
-	/* GX requires 8BPP color data be duplicated into bits [15:8]. */
-
-	if (GFXbpp == 8)
-	{
-		bgcolor &= 0x00FF;
-		bgcolor |= (bgcolor << 8);
-		fgcolor &= 0x00FF;
-		fgcolor |= (fgcolor << 8);
-	}
-
-	/* POLL UNTIL ABLE TO WRITE THE SOURCE COLOR */
-
-	GFX_WAIT_PENDING;
- 	WRITE_REG16(GP_SRC_COLOR_0, (unsigned short) bgcolor);
- 	WRITE_REG16(GP_SRC_COLOR_1, (unsigned short) fgcolor);
-}
-
-/*
-//---------------------------------------------------------------------------
-// GFX_SET_SOLID_PATTERN
-//
-// This routine is used to specify a solid pattern color.  It is called 
-// before performing solid rectangle fills or more complicated BLTs that 
-// use a solid pattern color. 
-//
-// The driver should always call "gfx_load_raster_operation" after a call 
-// to this routine to make sure that the pattern flags are set appropriately.
-//---------------------------------------------------------------------------
-*/
-#if GFX_2DACCEL_DYNAMIC
-void gu1_set_solid_pattern(unsigned long color)
-#else
-void gfx_set_solid_pattern(unsigned long color)
-#endif
-{
-    /* CLEAR TRANSPARENCY FLAG */
-
-    GFXsourceFlags = 0;
-
-	/* SET PATTERN FLAGS */
-
-	GFXpatternFlags = 0;
-
-	/* FORMAT 8 BPP COLOR */
-	/* GX requires 8BPP color data be duplicated into bits [15:8]. */
-
-	if (GFXbpp == 8)
-	{
-		color &= 0x00FF;
-		color |= (color << 8);
-	}
-
-	/* SAVE THE REFORMATTED COLOR FOR LATER */
-	/* Used to call the "GFX_solid_fill" routine for special cases. */
-
-	GFXsavedColor = color;
-
-	/* POLL UNTIL ABLE TO WRITE THE PATTERN COLOR */
-
-	GFX_WAIT_PENDING;
- 	WRITE_REG16(GP_PAT_COLOR_0, (unsigned short) color);
-}
-
-/*
-//---------------------------------------------------------------------------
-// GFX_SET_MONO_PATTERN
-//
-// This routine is used to specify a monochrome pattern. 
-//---------------------------------------------------------------------------
-*/
-#if GFX_2DACCEL_DYNAMIC
-void gu1_set_mono_pattern(unsigned long bgcolor, unsigned long fgcolor, 
-	unsigned long data0, unsigned long data1, unsigned char transparent)
-#else
-void gfx_set_mono_pattern(unsigned long bgcolor, unsigned long fgcolor, 
-	unsigned long data0, unsigned long data1, unsigned char transparent)
-#endif
-{
-    /* CLEAR TRANSPARENCY FLAG */
-
-    GFXsourceFlags = 0;
-
-	/* SET PATTERN FLAGS */
-
-	GFXpatternFlags = transparent ? RM_PAT_MONO | RM_PAT_TRANSPARENT : 
-		RM_PAT_MONO;
-	
-	/* FORMAT 8 BPP COLOR */
-	/* GXm requires 8BPP color data be duplicated into bits [15:8]. */
-
-	if (GFXbpp == 8)
-	{
-		bgcolor &= 0x00FF;
-		bgcolor |= (bgcolor << 8);
-		fgcolor &= 0x00FF;
-		fgcolor |= (fgcolor << 8);
-	}
-
-	/* POLL UNTIL ABLE TO WRITE THE PATTERN COLORS AND DATA */
-
-	GFX_WAIT_PENDING;
- 	WRITE_REG16(GP_PAT_COLOR_0, (unsigned short) bgcolor);
- 	WRITE_REG16(GP_PAT_COLOR_1, (unsigned short) fgcolor);
- 	WRITE_REG32(GP_PAT_DATA_0, data0);
- 	WRITE_REG32(GP_PAT_DATA_1, data1);
-}
-
-/*
-//---------------------------------------------------------------------------
-// GFX_SET_COLOR_PATTERN
-//
-// This routine is used to specify a color pattern. 
-//---------------------------------------------------------------------------
-*/
-#if GFX_2DACCEL_DYNAMIC
-void gu1_set_color_pattern(unsigned long bgcolor, unsigned long fgcolor, 
-	unsigned long data0, unsigned long data1,unsigned long data2,unsigned long data3, unsigned char transparent)
-#else
-void gfx_set_color_pattern(unsigned long bgcolor, unsigned long fgcolor, 
-	unsigned long data0, unsigned long data1, unsigned long data2,unsigned long data3,unsigned char transparent)
-#endif
-{
-    /* CLEAR TRANSPARENCY FLAG */
-
-    GFXsourceFlags = 0;
-
-	/* SET PATTERN FLAGS */
-
-	GFXpatternFlags = transparent ? RM_PAT_MONO | RM_PAT_TRANSPARENT : 
-		RM_PAT_MONO;
-	
-	GFXpatternFlags |= RM_PAT_COLOR;
-	/* FORMAT 8 BPP COLOR */
-	/* GXm requires 8BPP color data be duplicated into bits [15:8]. */
-
-	if (GFXbpp == 8)
-	{
-		bgcolor &= 0x00FF;
-		bgcolor |= (bgcolor << 8);
-		fgcolor &= 0x00FF;
-		fgcolor |= (fgcolor << 8);
-	}
-
-	/* POLL UNTIL ABLE TO WRITE THE PATTERN COLORS AND DATA */
-
-	GFX_WAIT_PENDING;
- 	WRITE_REG16(GP_PAT_COLOR_0, (unsigned short) bgcolor);
- 	WRITE_REG16(GP_PAT_COLOR_1, (unsigned short) fgcolor);
- 	WRITE_REG32(GP_PAT_DATA_0, data0);
- 	WRITE_REG32(GP_PAT_DATA_1, data1);
- 	if (GFXbpp > 8)
-	{
-		WRITE_REG32(GP_PAT_DATA_2, data2);
-		WRITE_REG32(GP_PAT_DATA_3, data3);
-	}
-}
-
-/*
-//---------------------------------------------------------------------------
-// GFX_LOAD_COLOR_PATTERN_LINE
-//
-// This routine is used to load a single line of a 8x8 color pattern.   
-//---------------------------------------------------------------------------
-*/
-#if GFX_2DACCEL_DYNAMIC
-void gu1_load_color_pattern_line (short y, unsigned long *pattern_8x8)	
-#else
-void gfx_load_color_pattern_line (short y, unsigned long *pattern_8x8) 
-#endif
-{
-    /* CLEAR TRANSPARENCY FLAG */
-
-    GFXsourceFlags = 0;
-
-	/* SET PATTERN FLAGS */
-	
-	GFXpatternFlags = RM_PAT_COLOR;
-
-	y &= 7;
-
-	if (GFXbpp > 8)
-		pattern_8x8 += (y << 2);
-	else
-		pattern_8x8 += (y << 1);
-
-	/* POLL UNTIL ABLE TO WRITE THE PATTERN COLORS AND DATA */
-
-	GFX_WAIT_PENDING;
- 	WRITE_REG32(GP_PAT_DATA_0, pattern_8x8[0]);
- 	WRITE_REG32(GP_PAT_DATA_1, pattern_8x8[1]);
- 	if (GFXbpp > 8)
-	{
-		WRITE_REG32(GP_PAT_DATA_2, pattern_8x8[2]);
-		WRITE_REG32(GP_PAT_DATA_3, pattern_8x8[3]);
-	}
-}
-
-/*
-//---------------------------------------------------------------------------
-// GFX_SET_RASTER_OPERATION
-//
-// This routine loads the specified raster operation.  It sets the pattern
-// flags appropriately.
-//---------------------------------------------------------------------------
-*/
-#if GFX_2DACCEL_DYNAMIC
-void gu1_set_raster_operation(unsigned char rop)
-#else
-void gfx_set_raster_operation(unsigned char rop)
-#endif
-{
-	unsigned short rop16;
-
-	/* GENERATE 16-BIT VERSION OF ROP WITH PATTERN FLAGS */
-
-	rop16 = (unsigned short) rop | GFXpatternFlags;
-	if ((rop & 0x33) ^ ((rop >> 2) & 0x33))
-		rop16 |= GFXsourceFlags;
-
-	/* SAVE ROP FOR LATER COMPARISONS */
-	/* Need to have the pattern flags included */
-
-	GFXsavedRop = rop16;
-	
-	/* SET FLAG INDICATING ROP REQUIRES DESTINATION DATA */
-	/* True if even bits (0:2:4:6) do not equal the correspinding */
-	/* even bits (1:3:5:7). */
-
-	GFXusesDstData = ((rop & 0x55) ^ ((rop >> 1) & 0x55));
-
-	/* POLL UNTIL ABLE TO WRITE THE PATTERN COLOR */
-	/* Only one operation can be pending at a time. */ 
-
-	GFX_WAIT_PENDING;
- 	WRITE_REG16(GP_RASTER_MODE, rop16);
-}
-
-/*
-//---------------------------------------------------------------------------
-// GFX_SOLID_FILL
-//
-// This routine MUST be used when performing a solid rectangle fill with 
-// the ROPs of PATCOPY (0xF0), BLACKNESS (0x00), WHITENESS (0xFF), or 
-// PATINVERT (0x0F).  There is a bug in GXm for these cases that requires a 
-// workaround.  
-//
-// For BLACKNESS (ROP = 0x00), set the color to 0x0000.  
-// For WHITENESS (ROP = 0xFF), set the color to 0xFFFF.
-// For PATINVERT (ROP = 0x0F), invert the desired color.
-//
-//      X               screen X position (left)
-//      Y               screen Y position (top)
-//      WIDTH           width of rectangle, in pixels
-//      HEIGHT          height of rectangle, in scanlines
-//      COLOR           fill color
-//
-// THIS ROUTINE SHOULD NOT BE DIRECTLY CALLED FROM THE DRIVER.  The driver 
-// should always use GFX_pattern_fill and let that routine call this one
-// when approipriate.  This is to hide quirks specific to MediaGX hardware.
-//---------------------------------------------------------------------------
-*/
-void gu1_solid_fill(unsigned short x, unsigned short y, 
-	unsigned short width, unsigned short height, unsigned long color)
-{
-	unsigned short section;
-
-	/* POLL UNTIL ABLE TO WRITE TO THE REGISTERS */
-	/* Only one operation can be pending at a time. */ 
-
-	GFX_WAIT_PENDING;
-
-	/* SET REGISTERS TO DRAW RECTANGLE */
-
-	WRITE_REG16(GP_DST_XCOOR, x);
-	WRITE_REG16(GP_DST_YCOOR, y);
- 	WRITE_REG16(GP_HEIGHT, height);
- 	WRITE_REG16(GP_RASTER_MODE, 0x00F0); /* PATCOPY */
-	WRITE_REG16(GP_PAT_COLOR_0, (unsigned short) color);
-
-	/* CHECK WIDTH FOR GX BUG WORKAROUND */ 
-
-	if (width <= 16)
-	{
-		/* OK TO DRAW SMALL RECTANGLE IN ONE PASS */
-
-		WRITE_REG16(GP_WIDTH, width);
-	 	WRITE_REG16(GP_BLIT_MODE, 0);
-	}
-	else
-	{
-		/* DRAW FIRST PART OF RECTANGLE */
-		/* Get to a 16 pixel boundary. */
-
-		section = 0x10 - (x & 0x0F);
-		WRITE_REG16(GP_WIDTH, section);
-	 	WRITE_REG16(GP_BLIT_MODE, 0);
-
-		/* POLL UNTIL ABLE TO LOAD THE SECOND RECTANGLE */
-
-		GFX_WAIT_PENDING;
-		WRITE_REG16(GP_DST_XCOOR, x + section);
-		WRITE_REG16(GP_DST_YCOOR, y);
-		WRITE_REG16(GP_WIDTH, width - section);
-	 	WRITE_REG16(GP_BLIT_MODE, 0);
-	}
-}    
-
-/*
-//----------------------------------------------------------------------------
-// GFX_PATTERN_FILL
-//
-// This routine is used to fill a rectangular region.  The pattern must 
-// be previously loaded using one of GFX_load_*_pattern routines.  Also, the 
-// raster operation must be previously specified using the 
-// "GFX_load_raster_operation" routine.
-//
-//      X               screen X position (left)
-//      Y               screen Y position (top)
-//      WIDTH           width of rectangle, in pixels
-//      HEIGHT          height of rectangle, in scanlines
-//----------------------------------------------------------------------------
-*/
-#if GFX_2DACCEL_DYNAMIC
-void gu1_pattern_fill(unsigned short x, unsigned short y, 
-	unsigned short width, unsigned short height)
-#else
-void gfx_pattern_fill(unsigned short x, unsigned short y, 
-	unsigned short width, unsigned short height)
-#endif
-{
-	unsigned short section, buffer_width, blit_mode;
-
-	/* CHECK IF OPTIMIZED SOLID CASES */
-    /* Check all 16 bits of the ROP to include solid pattern flags. */
-
-	switch(GFXsavedRop)
-	{
-		/* CHECK FOR SPECIAL CASES WITHOUT DESTINATION DATA */
-		/* Need hardware workaround for fast "burst write" cases. */
-
-		case 0x00F0:
-			gu1_solid_fill(x, y, width, height, (unsigned short) GFXsavedColor);
-			break;
-		case 0x000F:
-			gu1_solid_fill(x, y, width, height, 
-				(unsigned short) ~GFXsavedColor);
-			break;
-		case 0x0000:
-			gu1_solid_fill(x, y, width, height, 0x0000);
-			break;
-		case 0x00FF:
-			gu1_solid_fill(x, y, width, height, 0xFFFF);
-			break;
-		
-		/* REMAINING CASES REQUIRE DESTINATION DATA OR NOT SOLID COLOR */
-
-		default:
-			
-			/* DETERMINE BLT MODE VALUE */
-			/* Still here for non-solid patterns without destination data. */
-
-			blit_mode = GFXusesDstData ? BM_READ_DST_FB0 : 0;
-
-			/* SET SOURCE EXPANSION MODE */
-			/* If the ROP requires source data, then the source data is all 1's */
-			/* and then expanded into the desired color in GP_SRC_COLOR_1. */
-
-			blit_mode |= BM_SOURCE_EXPAND;
-
-			/* POLL UNTIL ABLE TO WRITE TO THE REGISTERS */
-			/* Write the registers that do not change for each section. */
-
-			GFX_WAIT_PENDING;
- 			WRITE_REG16(GP_HEIGHT, height);
-
-			/* SINCE ONLY DESTINATION DATA, WE CAN USE BOTH BB0 AND BB1. */
-			/* Therefore, width available = BLT buffer width * 2. */
-
-			buffer_width = GFXbufferWidthPixels << 1;
-
-			/* REPEAT UNTIL FINISHED WITH RECTANGLE */
-			/* Perform BLT in vertical sections, as wide as the BLT buffer */
-			/* allows.  Hardware does not split the operations, so */
-			/* software must do it to avoid large scanlines that would */
-			/* overflow the BLT buffers. */
-
-			while(width > 0)
-			{
-				/* DETERMINE WIDTH OF SECTION */
-
-				if (width > buffer_width) section = buffer_width;
-				else section = width;
-
-				/* POLL UNTIL ABLE TO WRITE TO THE REGISTERS */
-
-				GFX_WAIT_PENDING;
-				WRITE_REG16(GP_DST_XCOOR, x);
-				WRITE_REG16(GP_DST_YCOOR, y);
-				WRITE_REG16(GP_WIDTH, section);
-				WRITE_REG16(GP_BLIT_MODE, blit_mode);
-
-				/* ADJUST PARAMETERS FOR NEXT SECTION */
-
-				width -= section;
-				x += section;
-			}
-			break;
-	}
-}    
-
-/*
-//----------------------------------------------------------------------------
-// GFX_COLOR_PATTERN_FILL
-//
-// This routine is used to render a rectangle using the current raster 
-// operation and the specified color pattern.  It allows an 8x8 color 
-// pattern to be rendered without multiple calls to the gfx_set_color_pattern
-// and gfx_pattern_fill routines.
-//
-//      X               screen X position (left)
-//      Y               screen Y position (top)
-//      WIDTH           width of rectangle, in pixels
-//      HEIGHT          height of rectangle, in scanlines
-//      *PATTERN		pointer to 8x8 color pattern data
-//----------------------------------------------------------------------------
-*/
-#if GFX_2DACCEL_DYNAMIC
-void gu1_color_pattern_fill(unsigned short x, unsigned short y, 
-	unsigned short width, unsigned short height, unsigned long *pattern)
-#else
-void gfx_color_pattern_fill(unsigned short x, unsigned short y, 
-	unsigned short width, unsigned short height, unsigned long *pattern)
-#endif
-{
-    unsigned short blit_mode, passes, cur_y, pat_y, i;
-	unsigned short buffer_width, line_width;
-	unsigned short bpp_shift, section, cur_x;
-
-	/* SET APPROPRIATE INCREMENT */
-
-	bpp_shift = (GFXbpp > 8) ? 2 : 1;
-	
-	/* SET DESTINATION REQUIRED */
-
-	blit_mode = GFXusesDstData ? BM_READ_DST_FB0 : 0;
-
-	/* SET SOURCE EXPANSION */
-	
-	blit_mode |= BM_SOURCE_EXPAND;
-
-	/* OVERRIDE RASTER MODE TO FORCE A COLOR PATTERN */
-
-	GFX_WAIT_PENDING;
-	WRITE_REG16 (GP_RASTER_MODE, (GFXsavedRop & ~RM_PAT_MASK & ~RM_PAT_TRANSPARENT) | RM_PAT_COLOR);
-
-	/* WRITE THE REGISTERS THAT DO NOT CHANGE         */
-	/* If destination data is required, the width and */
-	/* x position will be overwritten.                */
-
-	WRITE_REG16 (GP_HEIGHT, 1);
-	WRITE_REG16 (GP_WIDTH, width);
-	WRITE_REG16 (GP_DST_XCOOR, x);
-
-	/* THE ENTIRE PATTERN WILL NOT BE DRAWN IF THE HEIGHT IS LESS THAN 8 */
-
-	passes = (height < 8) ? height : 8;
-
-	/* SINCE ONLY DESTINATION DATA, WE CAN USE BOTH BB0 AND BB1. */
-	/* Therefore, width available = BLT buffer width * 2. */
-
-	buffer_width = GFXbufferWidthPixels << 1;
-
-
-	for (i = 0; i < passes; i++)
-	{	
-		pat_y = ((y + i) & 7) << bpp_shift;  
-		cur_y = y + i;
-
-		/* WRITE THE PATTERN DATA FOR THE ACTIVE LINE */
-		
-		GFX_WAIT_PENDING;
-		WRITE_REG32 (GP_PAT_DATA_0, pattern[pat_y]);
-		WRITE_REG32 (GP_PAT_DATA_1, pattern[pat_y + 1]);
-
-		if (GFXbpp > 8)
-		{
-		    WRITE_REG32 (GP_PAT_DATA_2, pattern[pat_y + 2]);
-			WRITE_REG32 (GP_PAT_DATA_3, pattern[pat_y + 3]);
-		}
-	
-		/* SPLIT BLT LINE INTO SECTIONS IF REQUIRED              */
-		/* If no destination data is required, we can ignore     */
-		/* the BLT buffers.  Otherwise, we must separate the BLT */
-		/* so as not to overflow the buffers                     */
-	
-		if (blit_mode & BM_READ_DST_BB0)
-		{
-		    line_width = width;
-			cur_x      = x;	
-			
-			while (line_width)
-			{
-				section = (line_width > buffer_width) ? buffer_width : line_width;
-				cur_y = y + i;
-
-				GFX_WAIT_PENDING;
-				WRITE_REG16 (GP_DST_XCOOR, cur_x);
-				WRITE_REG16 (GP_WIDTH, section);
-				
-				while (cur_y < y + height)
-				{
-					GFX_WAIT_PENDING;					 
-					WRITE_REG16 (GP_DST_YCOOR, cur_y);
-					WRITE_REG16 (GP_BLIT_MODE, blit_mode);
-					cur_y += 8;
-				}
-					
-				cur_x      += section;
-				line_width -= section;
-			}
-			
-		}
-		else
-		{
-		    while (cur_y < y + height)
-			{
-			    GFX_WAIT_PENDING;
-				WRITE_REG16 (GP_DST_YCOOR, cur_y);
-				WRITE_REG16 (GP_BLIT_MODE, blit_mode);
-				cur_y += 8;
-			}
-		}
-
-	}
-	
-		
-	/* RESTORE ORIGINAL ROP AND FLAGS */
-
-	GFX_WAIT_PENDING;
-	WRITE_REG16 (GP_RASTER_MODE, GFXsavedRop);
-	
-}
-
-/*
-//----------------------------------------------------------------------------
-// SCREEN TO SCREEN BLT
-//
-// This routine should be used to perform a screen to screen BLT when the 
-// ROP does not require destination data.
-//
-//      SRCX            screen X position to copy from
-//      SRCY            screen Y position to copy from
-//      DSTX            screen X position to copy to
-//      DSTY            screen Y position to copy to
-//      WIDTH           width of rectangle, in pixels
-//      HEIGHT          height of rectangle, in scanlines
-//----------------------------------------------------------------------------
-*/
-#if GFX_2DACCEL_DYNAMIC
-void gu1_screen_to_screen_blt(unsigned short srcx, unsigned short srcy,
-	unsigned short dstx, unsigned short dsty, unsigned short width, 
-	unsigned short height)
-#else
-void gfx_screen_to_screen_blt(unsigned short srcx, unsigned short srcy,
-	unsigned short dstx, unsigned short dsty, unsigned short width, 
-	unsigned short height)
-#endif
-{
-	unsigned short section, buffer_width;
-	unsigned short blit_mode;
-
-	/* CHECK IF RASTER OPERATION REQUIRES DESTINATION DATA */
-
-	blit_mode = GFXusesDstData ? BM_READ_DST_FB1 | BM_READ_SRC_FB : 
-		BM_READ_SRC_FB;
-
-	/* CHECK Y DIRECTION */
-	/* Hardware has support for negative Y direction. */
-
-	if (dsty > srcy) 
-	{
-		blit_mode |= BM_REVERSE_Y;
-		srcy += height - 1;
-		dsty += height - 1;
-	}
-
-	/* CHECK X DIRECTION */
-	/* Hardware does not support negative X direction since at the time */ 
-	/* of development all supported resolutions could fit a scanline of */ 
-	/* data at once into the BLT buffers (using both BB0 and BB1).  This */
-	/* code is more generic to allow for any size BLT buffer. */
-
-	if (dstx > srcx)
-	{
-		srcx += width;
-		dstx += width;
-	}
-
-	/* POLL UNTIL ABLE TO WRITE TO THE REGISTERS */
-	/* Write the registers that do not change for each section. */
-
-	GFX_WAIT_PENDING;
- 	WRITE_REG16(GP_HEIGHT, height);
-
-	/* CHECK AVAILABLE BLT BUFFER SIZE */
-	/* Can use both BLT buffers if no destination data is required. */
-
-	buffer_width = GFXusesDstData ? GFXbufferWidthPixels :
-		GFXbufferWidthPixels << 1;
-
-	/* REPEAT UNTIL FINISHED WITH RECTANGLE */
-	/* Perform BLT in vertical sections, as wide as the BLT buffer allows. */
-	/* Hardware does not split the operations, so software must do it to */ 
-	/* avoid large scanlines that would overflow the BLT buffers. */
-
-	while(width > 0)
-	{
-		/* CHECK WIDTH OF CURRENT SECTION */
-
-		if (width > buffer_width) section = buffer_width;
-		else section = width;
-
-		/* PROGRAM REGISTERS THAT ARE THE SAME FOR EITHER X DIRECTION */
-
-		GFX_WAIT_PENDING;
-		WRITE_REG16(GP_SRC_YCOOR, srcy);
-		WRITE_REG16(GP_DST_YCOOR, dsty);
-		WRITE_REG16(GP_WIDTH, section);
-
-		/* CHECK X DIRECTION */
-
-		if (dstx > srcx)
-		{
-			/* NEGATIVE X DIRECTION */
-			/* Still positive X direction within the section. */
-
-			srcx -= section;
-			dstx -= section;
-			WRITE_REG16(GP_SRC_XCOOR, srcx);
-			WRITE_REG16(GP_DST_XCOOR, dstx);
-			WRITE_REG16(GP_BLIT_MODE, blit_mode);
-		} 
-		else
-		{
-			/* POSITIVE X DIRECTION */
-
-			WRITE_REG16(GP_SRC_XCOOR, srcx);
-			WRITE_REG16(GP_DST_XCOOR, dstx);
-			WRITE_REG16(GP_BLIT_MODE, blit_mode);
-			dstx += section;
-			srcx += section;
-		}
-		width -= section;
-	}
-}    
-
-/*
-//----------------------------------------------------------------------------
-// SCREEN TO SCREEN TRANSPARENT BLT
-//
-// This routine should be used to perform a screen to screen BLT when a 
-// specified color should by transparent.  The only supported ROP is SRCCOPY.
-//
-//      SRCX            screen X position to copy from
-//      SRCY            screen Y position to copy from
-//      DSTX            screen X position to copy to
-//      DSTY            screen Y position to copy to
-//      WIDTH           width of rectangle, in pixels
-//      HEIGHT          height of rectangle, in scanlines
-//      COLOR           transparent color
-//----------------------------------------------------------------------------
-*/
-#if GFX_2DACCEL_DYNAMIC
-void gu1_screen_to_screen_xblt(unsigned short srcx, unsigned short srcy,
-	unsigned short dstx, unsigned short dsty, unsigned short width, 
-	unsigned short height, unsigned long color)
-#else
-void gfx_screen_to_screen_xblt(unsigned short srcx, unsigned short srcy,
-	unsigned short dstx, unsigned short dsty, unsigned short width, 
-	unsigned short height, unsigned long color)
-#endif
-{
-	unsigned short section, buffer_width;
-	unsigned short blit_mode = BM_READ_SRC_FB;
-
-	/* CHECK Y DIRECTION */
-	/* Hardware has support for negative Y direction. */
-
-	if (dsty > srcy) 
-	{
-		blit_mode |= BM_REVERSE_Y;
-		srcy += height - 1;
-		dsty += height - 1;
-	}
-
-	/* CHECK X DIRECTION */
-	/* Hardware does not support negative X direction since at the time */
-	/* of development all supported resolutions could fit a scanline of */ 
-	/* data at once into the BLT buffers (using both BB0 and BB1).  This */
-	/* code is more generic to allow for any size BLT buffer. */
-
-	if (dstx > srcx)
-	{
-		srcx += width;
-		dstx += width;
-	}
-
-	/* CALCULATE BLT BUFFER SIZE */
-	/* Need to use BB1 to store the BLT buffer data. */
-
-	buffer_width = GFXbufferWidthPixels;
-
-	/* WRITE TRANSPARENCY COLOR TO BLT BUFFER 1 */
-
-	if (GFXbpp == 8)
-	{
-		color &= 0x00FF;
-		color |= (color << 8);
-	}
-	color = (color & 0x0000FFFF) | (color << 16);
-
-	/* WAIT UNTIL PIPELINE IS NOT BUSY BEFORE LOADING DATA INTO BB1 */
-	/* Need to make sure any previous BLT using BB1 is complete. */
-	/* Only need to load 32 bits of BB1 for the 1 pixel BLT that follows. */
-    
-	GFX_WAIT_BUSY;
-	WRITE_SCRATCH32(GFXbb1Base, color);
-
-	/* DO BOGUS BLT TO LATCH DATA FROM BB1 */
-	/* Already know graphics pipeline is idle. */
-	/* Only need to latch data into the holding registers for the current */
-	/* data from BB1.  A 1 pixel wide BLT will suffice. */
-
- 	WRITE_REG32(GP_DST_XCOOR, 0);
- 	WRITE_REG32(GP_SRC_XCOOR, 0);
- 	WRITE_REG32(GP_WIDTH, 0x00010001);
- 	WRITE_REG16(GP_RASTER_MODE, 0x00CC);
- 	WRITE_REG16(GP_BLIT_MODE, BM_READ_SRC_FB | BM_READ_DST_BB1);
-	
-	/* WRITE REGISTERS FOR REAL SCREEN TO SCREEN BLT */
-
-	GFX_WAIT_PENDING;
-	WRITE_REG16(GP_HEIGHT, height);
- 	WRITE_REG16(GP_RASTER_MODE, 0x10C6);
-	WRITE_REG32(GP_PAT_COLOR_0, 0xFFFFFFFF);
-
-	/* REPEAT UNTIL FINISHED WITH RECTANGLE */
-	/* Perform BLT in vertical sections, as wide as the BLT buffer allows. */
-	/* Hardware does not split the operations, so software must do it to */
-	/* avoid large scanlines that would overflow the BLT buffers. */
-
-	while(width > 0)
-	{
-		/* CHECK WIDTH OF CURRENT SECTION */
-
-		if (width > buffer_width) section = buffer_width;
-		else section = width;
-
-		/* PROGRAM REGISTERS THAT ARE THE SAME FOR EITHER X DIRECTION */
-
-		GFX_WAIT_PENDING;
-		WRITE_REG16(GP_SRC_YCOOR, srcy);
-		WRITE_REG16(GP_DST_YCOOR, dsty);
-		WRITE_REG16(GP_WIDTH, section);
-
-		/* CHECK X DIRECTION */
-		/* Again, this must be done in software, and can be removed if the */
-		/* display driver knows that the BLT buffers will always be large  */
-		/* enough to contain an entire scanline of a screen to screen BLT. */
-
-		if (dstx > srcx)
-		{
-			/* NEGATIVE X DIRECTION */
-			/* Still positive X direction within the section. */
-
-			srcx -= section;
-			dstx -= section;
-			WRITE_REG16(GP_SRC_XCOOR, srcx);
-			WRITE_REG16(GP_DST_XCOOR, dstx);
-			WRITE_REG16(GP_BLIT_MODE, blit_mode);
-		} 
-		else
-		{
-			/* POSITIVE X DIRECTION */
-
-			WRITE_REG16(GP_SRC_XCOOR, srcx);
-			WRITE_REG16(GP_DST_XCOOR, dstx);
-			WRITE_REG16(GP_BLIT_MODE, blit_mode);
-			dstx += section;
-			srcx += section;
-		}
-		width -= section;
-	}
-}    
-
-/*
-//----------------------------------------------------------------------------
-// COLOR BITMAP TO SCREEN BLT
-//
-// This routine transfers color bitmap data to the screen.  For most cases,
-// when the ROP is SRCCOPY, it may be faster to write a separate routine that
-// copies the data to the frame buffer directly.  This routine should be 
-// used when the ROP requires destination data.
-//
-// Transparency is handled by another routine.
-//
-//      SRCX            X offset within source bitmap
-//      SRCY            Y offset within source bitmap
-//      DSTX            screen X position to render data
-//      DSTY            screen Y position to render data
-//      WIDTH           width of rectangle, in pixels
-//      HEIGHT          height of rectangle, in scanlines
-//      *DATA           pointer to bitmap data
-//      PITCH           pitch of bitmap data (bytes between scanlines)
-//----------------------------------------------------------------------------
-*/
-
-#if GFX_2DACCEL_DYNAMIC
-void gu1_color_bitmap_to_screen_blt(unsigned short srcx, unsigned short srcy,
-	unsigned short dstx, unsigned short dsty, unsigned short width, 
-	unsigned short height, unsigned char *data,  long pitch)
-#else
-void gfx_color_bitmap_to_screen_blt(unsigned short srcx, unsigned short srcy,
-	unsigned short dstx, unsigned short dsty, unsigned short width, 
-	unsigned short height, unsigned char *data,  long pitch)
-#endif
-{
-	unsigned short section, buffer_width;
-	unsigned short blit_mode = BM_READ_SRC_BB0;
-	unsigned short temp_height;
-	unsigned long  dword_bytes_needed, bytes_extra;
-	unsigned long  bpp_shift;
-	long array_offset;
-
-	/* CHECK SIZE OF BLT BUFFER */
-
-	buffer_width = GFXbufferWidthPixels;
-
-	/* CHECK IF RASTER OPERATION REQUIRES DESTINATION DATA */
-	/* If no destination data, we have twice the room for  */
-	/* source data.                                        */
-
-	if (GFXusesDstData) 
-		blit_mode |= BM_READ_DST_FB1;
-	else 
-		buffer_width <<= 1;
-	
-	/* SET THE SCRATCHPAD BASE */
-
-	SET_SCRATCH_BASE (GFXbb0Base);
-
-	/* POLL UNTIL ABLE TO WRITE TO THE REGISTERS                */
-	/* Write the registers that do not change for each section. */
-
-	GFX_WAIT_PENDING;
- 	WRITE_REG16(GP_HEIGHT, 1);
-
-	bpp_shift = (GFXbpp + 7) >> 4;
-
-	while (width > 0)
-	{
-		if (width > buffer_width) section = buffer_width;
-		else                      section = width;
-
-		dword_bytes_needed = (section << bpp_shift) & ~3l;
-		bytes_extra        = (section << bpp_shift) & 3l;
-
-		temp_height = height;
-
-		/* WRITE THE REGISTERS FOR EACH SECTION                          */
-		/* The GX hardware will auto-increment the Y coordinate, meaning */
-		/* that we don't have to.                                        */
-
-		WRITE_REG16 (GP_WIDTH, section);
-		WRITE_REG16 (GP_DST_XCOOR, dstx);
-		WRITE_REG16 (GP_DST_YCOOR, dsty);
-
-		/* CALCULATE THE BITMAP OFFSET */
-
-		array_offset = (unsigned long)srcy * (long)pitch + ((long)srcx << bpp_shift);
-
-		while (temp_height--)
-		{	
-			GFX_WAIT_PIPELINE;
-
-			/* WRITE ALL DATA TO THE BLT BUFFERS */
-			/* The WRITE_SCRATCH_STRING macro assumes that the data begins at the */
-			/* scratchpad offset set by the SET_SCRATCH_BASE macro.               */
-
-			WRITE_SCRATCH_STRING (dword_bytes_needed, bytes_extra, data, array_offset);
-			WRITE_REG16 (GP_BLIT_MODE, blit_mode);
-
-			array_offset += pitch;
-		}
-
-		width -= section;
-		srcx  += section;
-		dstx  += section;
-	}
-}    
-
-/*
-//----------------------------------------------------------------------------
-// COLOR BITMAP TO SCREEN TRANSPARENT BLT
-//
-// This routine transfers color bitmap data to the screen with transparency.
-// The transparent color is specified.  The only supported ROP is SRCCOPY, 
-// meaning that transparency cannot be applied if the ROP requires 
-// destination data (this is a hardware restriction).
-//
-//      SRCX            X offset within source bitmap
-//      SRCY            Y offset within source bitmap
-//      DSTX            screen X position to render data
-//      DSTY            screen Y position to render data
-//      WIDTH           width of rectangle, in pixels
-//      HEIGHT          height of rectangle, in scanlines
-//      *DATA           pointer to bitmap data
-//      PITCH           pitch of bitmap data (bytes between scanlines)
-//      COLOR           transparent color
-//----------------------------------------------------------------------------
-*/
-#if GFX_2DACCEL_DYNAMIC
-void gu1_color_bitmap_to_screen_xblt(unsigned short srcx, unsigned short srcy,
-	unsigned short dstx, unsigned short dsty, unsigned short width, 
-	unsigned short height, unsigned char *data,  long pitch, 
-	unsigned long color)
-#else
-void gfx_color_bitmap_to_screen_xblt(unsigned short srcx, unsigned short srcy,
-	unsigned short dstx, unsigned short dsty, unsigned short width, 
-	unsigned short height, unsigned char *data,  long pitch, 
-	unsigned long color)
-#endif
-{
-	unsigned short section, buffer_width;
-	unsigned short temp_height;
-	unsigned long  dword_bytes_needed, bytes_extra;
-	unsigned long  bpp_shift;
-	long array_offset;
-
-	/* CHECK SIZE OF BLT BUFFER */
-
-	buffer_width = GFXbufferWidthPixels;
-	
-	/* WRITE TRANSPARENCY COLOR TO BLT BUFFER 1 */
-
-	if (GFXbpp == 8)
-	{
-		color &= 0x00FF;
-		color |= (color << 8);
-	}
-	color = (color & 0x0000FFFF) | (color << 16);
-
-	/* WAIT UNTIL PIPELINE IS NOT BUSY BEFORE LOADING DATA INTO BB1 */
-	/* Need to make sure any previous BLT using BB1 is complete. */
-	/* Only need to load 32 bits of BB1 for the 1 pixel BLT that follows. */
-    
-	GFX_WAIT_PIPELINE;
-	GFX_WAIT_PENDING;
-	WRITE_SCRATCH32(GFXbb1Base, color);
-
-	/* DO BOGUS BLT TO LATCH DATA FROM BB1 */
-	/* Already know graphics pipeline is idle. */
-	/* Only need to latch data into the holding registers for the current */
-	/* data from BB1.  A 1 pixel wide BLT will suffice. */
-
- 	WRITE_REG32(GP_DST_XCOOR, 0);
- 	WRITE_REG32(GP_SRC_XCOOR, 0);
- 	WRITE_REG32(GP_WIDTH, 0x00010001);
- 	WRITE_REG16(GP_RASTER_MODE, 0x00CC);
- 	WRITE_REG16(GP_BLIT_MODE, BM_READ_SRC_FB | BM_READ_DST_BB1);
-
-	/* POLL UNTIL ABLE TO WRITE TO THE REGISTERS */
-	/* Write the registers that do not change for each section. */
-
-	GFX_WAIT_PENDING;
- 	WRITE_REG16(GP_HEIGHT, 1);
- 	WRITE_REG16(GP_RASTER_MODE, 0x10C6);
-	WRITE_REG32(GP_PAT_COLOR_0, 0xFFFFFFFF);
-
-	bpp_shift = (GFXbpp + 7) >> 4;
-
-	/* SET THE SCRATCHPAD BASE */
-
-	SET_SCRATCH_BASE (GFXbb0Base);
-
-	while (width > 0)
-	{
-		if (width > buffer_width) section = buffer_width;
-		else                      section = width;
-
-		dword_bytes_needed = (section << bpp_shift) & ~3l;
-		bytes_extra        = (section << bpp_shift) & 3l;
-
-		temp_height = height;
-
-		/* WRITE THE REGISTERS FOR EACH SECTION                          */
-		/* The GX hardware will auto-increment the Y coordinate, meaning */
-		/* that we don't have to.                                        */
-
-		WRITE_REG16 (GP_WIDTH, section);
-		WRITE_REG16 (GP_DST_XCOOR, dstx);
-		WRITE_REG16 (GP_DST_YCOOR, dsty);
-
-		/* CALCULATE THE BITMAP OFFSET */
-
-		array_offset = (unsigned long)srcy * (long)pitch + ((long)srcx << bpp_shift);
-
-		while (temp_height--)
-		{
-			GFX_WAIT_PIPELINE;
-
-			/* WRITE ALL DATA TO THE BLT BUFFERS */
-			/* The WRITE_SCRATCH_STRING macro assumes that the data begins at the */
-			/* scratchpad offset set by the SET_SCRATCH_BASE macro.               */
-
-			WRITE_SCRATCH_STRING (dword_bytes_needed, bytes_extra, data, array_offset);
-			WRITE_REG16 (GP_BLIT_MODE, BM_READ_SRC_BB0);
-
-			array_offset += pitch;
-		}
-
-		width -= section;
-		srcx  += section;
-		dstx  += section;
-	}	
-}    
-
-/*
-//----------------------------------------------------------------------------
-// MONOCHROME BITMAP TO SCREEN BLT
-//
-// This routine transfers monochrome bitmap data to the screen.  
-//
-//      SRCX            X offset within source bitmap
-//      SRCY            Y offset within source bitmap
-//      DSTX            screen X position to render data
-//      DSTY            screen Y position to render data
-//      WIDTH           width of rectangle, in pixels
-//      HEIGHT          height of rectangle, in scanlines
-//      *DATA           pointer to bitmap data
-//      PITCH           pitch of bitmap data (bytes between scanlines)
-//----------------------------------------------------------------------------
-*/
-#if GFX_2DACCEL_DYNAMIC
-void gu1_mono_bitmap_to_screen_blt(unsigned short srcx, unsigned short srcy,
-	unsigned short dstx, unsigned short dsty, unsigned short width, 
-	unsigned short height, unsigned char *data,  short pitch)
-#else
-void gfx_mono_bitmap_to_screen_blt(unsigned short srcx, unsigned short srcy,
-	unsigned short dstx, unsigned short dsty, unsigned short width, 
-	unsigned short height, unsigned char *data,  short pitch)
-#endif
-{
-	unsigned short section, buffer_width;
-	unsigned short blit_mode = BM_READ_SRC_BB0 | BM_SOURCE_EXPAND;
-	unsigned short temp_height;
-	unsigned long  dword_bytes_needed, bytes_extra;
-	long array_offset;
-
-	/* CHECK IF RASTER OPERATION REQUIRES DESTINATION DATA        */
-	/* If no destination data, the source data will always fit.   */
-	/* So, in that event we will set the buffer width to a        */
-	/* fictitiously large value such that the BLT is never split. */
-
-	if (GFXusesDstData)
-	{
-		buffer_width = GFXbufferWidthPixels;
-		blit_mode |= BM_READ_DST_FB1;
-	}
-	else
-		buffer_width = 3200;
-
-	/* CHECK IF DATA ALREADY IN BLIT BUFFER */
-	/* If the pointer is NULL, data for the full BLT is already there */
-	/* WARNING: This could cause problems if destination data is */
-	/* involved and it overflows the BLT buffer.  Need to remove */
-	/* this option and change the drivers to use a temporary buffer. */
-
-	if (!data)
-	{
-		GFX_WAIT_PENDING;
-		WRITE_REG16(GP_SRC_XCOOR, srcx & 7);
-		WRITE_REG16(GP_DST_XCOOR, dstx);
-		WRITE_REG16(GP_DST_YCOOR, dsty);
-		WRITE_REG16(GP_WIDTH, width);
- 		WRITE_REG16(GP_HEIGHT, height);
-		WRITE_REG16(GP_BLIT_MODE, blit_mode);
-		return;
-	}
-	
-	/* SET THE SCRATCHPAD BASE */
-
-	SET_SCRATCH_BASE (GFXbb0Base);
-
-	/* POLL UNTIL ABLE TO WRITE TO THE REGISTERS */
-	/* Write the registers that do not change for each section. */
-
-	GFX_WAIT_PENDING;
- 	WRITE_REG16(GP_HEIGHT, 1);
-
-	while (width > 0)
-	{
-		if (width > buffer_width) section = buffer_width;
-		else                      section = width;
-
-		/* CALCULATE BYTES NEEDED */
-		/* Add 1 for possible alignment issues. */
-
-		dword_bytes_needed = ((section + 7 + (srcx & 7)) >> 3) & ~3l;
-		bytes_extra        = ((section + 7 + (srcx & 7)) >> 3) &  3l;
-
-		temp_height = height;
-
-		/* WRITE THE REGISTERS FOR EACH SECTION                          */
-		/* The GX hardware will auto-increment the Y coordinate, meaning */
-		/* that we don't have to.                                        */
-
-		WRITE_REG16 (GP_WIDTH, section);
-		WRITE_REG16 (GP_DST_XCOOR, dstx);
-		WRITE_REG16 (GP_DST_YCOOR, dsty);
-		WRITE_REG16 (GP_SRC_XCOOR, srcx & 7);
-
-		/* CALCULATE THE BITMAP OFFSET */
-
-		array_offset = (unsigned long)srcy * (long)pitch + ((long)srcx >> 3);
-
-		while (temp_height--)
-		{
-			GFX_WAIT_PIPELINE;
-
-			/* WRITE ALL DATA TO THE BLT BUFFERS */
-			/* The WRITE_SCRATCH_STRING macro assumes that the data begins at the */
-			/* scratchpad offset set by the SET_SCRATCH_BASE macro.               */
-
-			WRITE_SCRATCH_STRING (dword_bytes_needed, bytes_extra, data, array_offset);
-			WRITE_REG16 (GP_BLIT_MODE, blit_mode);
-
-			array_offset += pitch;
-		}
-
-		width -= section;
-		srcx  += section;
-		dstx  += section;
-	}
-}    
-
-/*
-//----------------------------------------------------------------------------
-// MONOCHROME TEXT BLT
-//
-// This routine transfers contiguous monochrome text data to the screen.  
-//
-//      DSTX            screen X position to render data
-//      DSTY            screen Y position to render data
-//      WIDTH           width of rectangle, in pixels
-//      HEIGHT          height of rectangle, in scanlines
-//      *DATA           pointer to bitmap data
-//----------------------------------------------------------------------------
-*/
-#if GFX_2DACCEL_DYNAMIC
-void gu1_text_blt(unsigned short dstx, unsigned short dsty, unsigned short width, 
-	unsigned short height, unsigned char *data)
-#else
-void gfx_text_blt(unsigned short dstx, unsigned short dsty, unsigned short width, 
-	unsigned short height, unsigned char *data)
-#endif
-{
-	unsigned long  dword_bytes_needed, bytes_extra;
-	long pitch, buffer_bytes, data_bytes;
-
-	/* CALCULATE DATA SIZE */
-
-	pitch = (width + 7) >> 3;
-	data_bytes = (long)height * pitch;
-
-	/* CHECK FOR SIMPLE CASE */
-	/* This routine is designed to render a source copy text glyph.  If destination */
-	/* data is required or the source data will not fit, we will punt the operation */
-	/* to the more versatile (and slow) mono bitmap routine.                        */
-		
-	if (GFXbpp > 8) buffer_bytes = GFXbufferWidthPixels << 1;
-	else            buffer_bytes = GFXbufferWidthPixels;
-
-	if (GFXusesDstData || data_bytes > buffer_bytes)
-	{
-		gfx_mono_bitmap_to_screen_blt (0, 0, dstx, dsty, width, height, data, (short)pitch);
-		return;
-	}
-
-	/* SET THE SCRATCHPAD BASE */
-
-	SET_SCRATCH_BASE (GFXbb0Base);
-
-	/* POLL UNTIL ABLE TO WRITE TO THE REGISTERS */
-
-	dword_bytes_needed = data_bytes & ~3l;
-	bytes_extra        = data_bytes &  3l;
-
-	GFX_WAIT_PENDING;
- 	WRITE_REG16(GP_HEIGHT, height);
-	WRITE_REG16 (GP_WIDTH, width);
-	WRITE_REG16 (GP_DST_XCOOR, dstx);
-	WRITE_REG16 (GP_DST_YCOOR, dsty);
-	WRITE_REG16 (GP_SRC_XCOOR, 0);
-	
-	/* WRITE ALL DATA TO THE BLT BUFFERS */
-	/* The WRITE_SCRATCH_STRING macro assumes that the data begins at the */
-	/* scratchpad offset set by the SET_SCRATCH_BASE macro.               */
-	
-	GFX_WAIT_PIPELINE;
-		
-	WRITE_SCRATCH_STRING (dword_bytes_needed, bytes_extra, data, 0);
-	WRITE_REG16 (GP_BLIT_MODE, BM_READ_SRC_BB0 | BM_SOURCE_TEXT);
-}
-
-/*
-//----------------------------------------------------------------------------
-// BRESENHAM LINE
-//
-// This routine draws a vector using the specified Bresenham parameters.  
-// Currently this file does not support a routine that accepts the two 
-// endpoints of a vector and calculates the Bresenham parameters.  If it 
-// ever does, this routine is still required for vectors that have been 
-// clipped.
-//
-//      X               screen X position to start vector
-//      Y               screen Y position to start vector
-//      LENGTH          length of the vector, in pixels
-//      INITERR         Bresenham initial error term
-//      AXIALERR        Bresenham axial error term
-//      DIAGERR         Bresenham diagonal error term
-//      FLAGS           VM_YMAJOR, VM_MAJOR_INC, VM_MINOR_INC
-//----------------------------------------------------------------------------
-*/
-#if GFX_2DACCEL_DYNAMIC
-void gu1_bresenham_line(unsigned short x, unsigned short y, 
-		unsigned short length, unsigned short initerr, 
-		unsigned short axialerr, unsigned short diagerr, 
-		unsigned short flags)
-#else
-void gfx_bresenham_line(unsigned short x, unsigned short y, 
-		unsigned short length, unsigned short initerr, 
-		unsigned short axialerr, unsigned short diagerr, 
-		unsigned short flags)
-#endif
-{
-	unsigned short vector_mode = flags;
-	if (GFXusesDstData) vector_mode |= VM_READ_DST_FB;
-
-	/* CHECK NULL LENGTH */
-
-	if (!length) return;
-
-	/* LOAD THE REGISTERS FOR THE VECTOR */
-
-	GFX_WAIT_PENDING;
-	WRITE_REG16(GP_DST_XCOOR, x);
-	WRITE_REG16(GP_DST_YCOOR, y);
-	WRITE_REG16(GP_VECTOR_LENGTH, length);
-	WRITE_REG16(GP_INIT_ERROR, initerr);
-	WRITE_REG16(GP_AXIAL_ERROR, axialerr);
-	WRITE_REG16(GP_DIAG_ERROR, diagerr);
-	WRITE_REG16(GP_VECTOR_MODE, vector_mode);
-}
-
-/*---------------------------------------------------------------------------
- * GFX_WAIT_UNTIL_IDLE
- *
- * This routine waits until the graphics engine is idle.  This is required
- * before allowing direct access to the frame buffer.
- *---------------------------------------------------------------------------
- */
-#if GFX_2DACCEL_DYNAMIC
-void gu1_wait_until_idle(void)
-#else
-void gfx_wait_until_idle(void)
-#endif
-{
-	GFX_WAIT_BUSY;
-}
-
-/*---------------------------------------------------------------------------
- * GFX_TEST_BLT_PENDING
- *
- * This routine returns 1 if a BLT is pending, meaning that a call to 
- * perform a rendering operation would stall.  Otherwise it returns 0.
- * It is used by Darwin during random testing to only start a BLT 
- * operation when it knows the Durango routines won't spin on graphics
- * (so Darwin can continue to do frame buffer reads and writes).
- *---------------------------------------------------------------------------
- */
-#if GFX_2DACCEL_DYNAMIC
-int gu1_test_blt_pending(void)
-#else
-int gfx_test_blt_pending(void)
-#endif
-{
-	if(READ_REG16(GP_BLIT_STATUS) & BS_BLIT_PENDING) return(1);
-	else return(0);
-}
-
-/*---------------------------------------------------------------------------
- * BLT BUFFERS!!!!!
- *---------------------------------------------------------------------------
- */
-
-/* THE BOOT CODE MUST SET THE BLT BUFFER BASES USING THE "CPU_WRITE" */
-/* INSTRUCTION TO ONE OF THE FOLLOWING VALUES: */
-
-#define BB0_BASE_2K		0x800
-#define BB1_BASE_2K		0xB30
-#define BB0_BASE_3K		0x400
-#define BB1_BASE_3K		0x930
-
-/*---------------------------------------------------------------------------
- * gu1_detect_blt_buffer_base
- * 
- * This detection is hidden from the driver by being called from the 
- * "gfx_set_bpp" routine.  
- *
- * This is fairly ugly for the following reasons:
- *
- * - It is the boot code that must set the BLT buffer bases to the 
- *   appropriate values and load the scratchpad tags.  
- * - The old drivers would also set the base address values to what they
- *   knew they should be for the 2K or 3K scratchpad configuration.
- * - Unfortunately, to set the base addresses requires the use of the 
- *   CPU_WRITE instruction, an instruction specific to GX.
- * - Using the CPU_WRITE instruction requires the use of assembly to 
- *   produce the appropriate op codes.
- * - Assembly is something that is avoided in Durango because it is not
- *   platform independent.  Some compilers do not support inline assembly.
- * - Therefore Durango cannot use the CPU_WRITE instruction.
- * - Therefore drivers using Durango must rely on the boot code to set
- *   the appropriate values.  Durango uses this routine to check where
- *   the base addresses have been set.
- * - Unfortunately, it is not as simple as using IO to check for 2K or 3K 
- *   scratchpad size.  In VSA1, even though the boot code may set it for
- *   3K, SoftVGA comes along and resets it to 2K for it's use in text
- *   redraws.  It used to be that the display driver would set it back
- *   to 3K.  
- * - So, the Durango code was changed to just always use 2K.
- * - But, the XpressROM code sets it for 3K, and the newer versions of 
- *   SoftVGA do not interfere with that, so then Durango needs to use
- *   the 3K values to work properly.
- * - Therefore, Durango does somewhat of a kludge by writing to directly
- *   to the scratchpad at both the 2K and 3K locations, then performing
- *   a unobtrusive BLT that loads data into BB0 (the graphics engine 
- *   always knows the true base).  After the BLT, Durango looks to see
- *   which location changed to know where the base address is.
- * - This is a relatively simple way to allow Durango to work on old
- *   and new platforms without using theCPU_WRITE instructions.
- *
- * To summarize, the BLT buffers are one of the most painful aspects of 
- * the GX graphics unit design, and have been removed from future designs
- * (the graphics unit has its own dedicated RAM).  Durango has tried to 
- * hide the BLT buffer use from the drivers.
- *---------------------------------------------------------------------------
- */
-void gu1_detect_blt_buffer_base(void)
-{
-	/* ASSUME 2K */
-
-	GFXbb0Base = BB0_BASE_2K;
-	GFXbb1Base = BB1_BASE_2K;
-
-	/* CHECK IF SCRATCHPAD IS SET TO 3K OR 4K */
-	/* Boot code should still set 3K values for 4K. */
-
-	if (gfx_gxm_config_read(GXM_CONFIG_GCR) & 0x08) 
-	{
-		/* WRITE DATA TO 3K LOCATION */
-		
-		GFX_WAIT_BUSY;
-		WRITE_SCRATCH32(BB0_BASE_3K, 0xFEEDFACE);
-
-		/* HAVE THE GRAPHICS UNIT STORE SOMETHING IN BB0 */
-
-		WRITE_REG32(GP_DST_XCOOR, 0x00000000); /* AT (0,0) */
-		WRITE_REG32(GP_WIDTH, 0x00010004); /* 4x1 BLT */
-	 	WRITE_REG16(GP_RASTER_MODE, 0x00AA); /* KEEP DST */
-	 	WRITE_REG16(GP_BLIT_MODE, BM_READ_DST_FB0); /* STORE IN BB0 */
-
-		/* CHECK 3K LOCATION */
-		/* Breaks if data happened to be 0xFEEDFACE - unlikely. */
-			
-		GFX_WAIT_BUSY;
-		if (READ_SCRATCH32(BB0_BASE_3K) != 0xFEEDFACE)
-		{
-			GFXbb0Base = BB0_BASE_3K;
-			GFXbb1Base = BB1_BASE_3K;
-		}
-	}
-}
-
-/* END OF FILE */
-
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/rndr_gu2.c b/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/rndr_gu2.c
deleted file mode 100644
index 68952ac1e..000000000
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/rndr_gu2.c
+++ /dev/null
@@ -1,2208 +0,0 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/rndr_gu2.c,v 1.2 2002/10/18 20:02:40 tsi Exp $ */
-/*
- * $Workfile: rndr_gu2.c $
- *
- * This file contains routines to program the 2D acceleration hardware for
- * the second generation graphics unit.
- * 
- * Basic rendering routines (common to all Geode processors):
- *    gfx_set_bpp           
- *    gfx_set_solid_pattern  
- *    gfx_set_mono_pattern
- *    gfx_set_color_pattern
- *    gfx_set_solid_source  
- *    gfx_set_mono_source
- *    gfx_set_raster_operation
- *    gfx_pattern_fill
- *    gfx_color_pattern_fill
- *    gfx_screen_to_screen_blt
- *    gfx_screen_to_screen_xblt
- *    gfx_color_bitmap_to_screen_blt
- *    gfx_color_bitmap_to_screen_xblt
- *    gfx_mono_bitmap_to_screen_blt
- *    gfx_bresenham_line 
- *    gfx_wait_until_idle   
- *
- * Extended rendering routines for second generation functionality:
- *    gfx2_set_source_stride
- *    gfx2_set_destination_stride
- *    gfx2_set_pattern_origins
- *    gfx2_set_source_transparency
- *    gfx2_set_alpha_mode
- *    gfx2_set_alpha_value
- *    gfx2_pattern_fill
- *    gfx2_color_pattern_fill
- *    gfx2_screen_to_screen_blt
- *    gfx2_mono_expand_blt
- *    gfx2_color_bitmap_to_screen_blt
- *    gfx2_mono_bitmap_to_screen_blt
- *    gfx2_bresenham_line
- *    gfx2_sync_to_vblank
- *
- * NSC_LIC_ALTERNATIVE_PREAMBLE
- *
- * Revision 1.0
- *
- * National Semiconductor Alternative GPL-BSD License
- *
- * National Semiconductor Corporation licenses this software 
- * ("Software"):
- *
- *      Durango
- *
- * under one of the two following licenses, depending on how the 
- * Software is received by the Licensee.
- * 
- * If this Software is received as part of the Linux Framebuffer or
- * other GPL licensed software, then the GPL license designated 
- * NSC_LIC_GPL applies to this Software; in all other circumstances 
- * then the BSD-style license designated NSC_LIC_BSD shall apply.
- *
- * END_NSC_LIC_ALTERNATIVE_PREAMBLE */
-
-/* NSC_LIC_BSD
- *
- * National Semiconductor Corporation Open Source License for Durango
- *
- * (BSD License with Export Notice)
- *
- * Copyright (c) 1999-2001
- * National Semiconductor Corporation.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without 
- * modification, are permitted provided that the following conditions 
- * are met: 
- *
- *   * Redistributions of source code must retain the above copyright 
- *     notice, this list of conditions and the following disclaimer. 
- *
- *   * Redistributions in binary form must reproduce the above 
- *     copyright notice, this list of conditions and the following 
- *     disclaimer in the documentation and/or other materials provided 
- *     with the distribution. 
- *
- *   * Neither the name of the National Semiconductor Corporation nor 
- *     the names of its contributors may be used to endorse or promote 
- *     products derived from this software without specific prior 
- *     written permission. 
- * 
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
- * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
- * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE,
- * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
- * OF SUCH DAMAGE.
- *
- * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
- * YOUR JURISDICTION. It is licensee's responsibility to comply with 
- * any export regulations applicable in licensee's jurisdiction. Under 
- * CURRENT (2001) U.S. export regulations this software 
- * is eligible for export from the U.S. and can be downloaded by or 
- * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
- * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
- * Syria, Sudan, Afghanistan and any other country to which the U.S. 
- * has embargoed goods and services. 
- *
- * END_NSC_LIC_BSD */
-
-/* NSC_LIC_GPL
- *
- * National Semiconductor Corporation Gnu General Public License for Durango
- *
- * (GPL License with Export Notice)
- *
- * Copyright (c) 1999-2001
- * National Semiconductor Corporation.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without 
- * modification, are permitted under the terms of the GNU General 
- * Public License as published by the Free Software Foundation; either 
- * version 2 of the License, or (at your option) any later version  
- *
- * In addition to the terms of the GNU General Public License, neither 
- * the name of the National Semiconductor Corporation nor the names of 
- * its contributors may be used to endorse or promote products derived 
- * from this software without specific prior written permission. 
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
- * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
- * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, 
- * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
- * OF SUCH DAMAGE. See the GNU General Public License for more details. 
- *
- * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
- * YOUR JURISDICTION. It is licensee's responsibility to comply with 
- * any export regulations applicable in licensee's jurisdiction. Under 
- * CURRENT (2001) U.S. export regulations this software 
- * is eligible for export from the U.S. and can be downloaded by or 
- * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
- * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
- * Syria, Sudan, Afghanistan and any other country to which the U.S. 
- * has embargoed goods and services. 
- *
- * You should have received a copy of the GNU General Public License 
- * along with this file; if not, write to the Free Software Foundation, 
- * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 
- *
- * END_NSC_LIC_GPL */
-
-#define GU2_WAIT_PENDING while(READ_GP32(MGP_BLT_STATUS) & MGP_BS_BLT_PENDING)
-#define GU2_WAIT_BUSY while(READ_GP32(MGP_BLT_STATUS) & MGP_BS_BLT_BUSY)
-#define GU2_WAIT_HALF_EMPTY while(!(READ_GP32(MGP_BLT_STATUS) & MGP_BS_HALF_EMPTY))
-
-/* PATTERN SWIZZLES */
-
-#define WORD_SWIZZLE(x) (((x) << 16) | ((x) >> 16))
-#define BYTE_SWIZZLE(x) (((x) << 24) | ((x) >> 24) | (((x) << 8) & 0x00FF0000) | (((x) >> 8) & 0x0000FF00))
-
-/* GLOBAL VARIABLES USED BY THE RENDERING ROUTINES */
-
-unsigned long gu2_bpp;
-unsigned long gu2_pitch = 1280;
-unsigned long gu2_src_pitch = 1280;
-unsigned long gu2_dst_pitch = 1280;
-unsigned long gu2_xshift = 1;
-unsigned long gu2_pattern_origin = 0;
-unsigned long gu2_rop32;
-unsigned long gu2_alpha32      = 0;
-unsigned long gu2_alpha_value  = 0;
-unsigned long gu2_alpha_mode   = 0;
-unsigned long gu2_alpha_active = 0;
-unsigned short gu2_alpha_blt_mode = 0;
-unsigned short gu2_alpha_vec_mode = 0;
-unsigned short gu2_blt_mode       = 0;
-unsigned short gu2_vector_mode    = 0;
-unsigned short gu2_bm_throttle    = 0;
-unsigned short gu2_vm_throttle    = 0;
-int gu2_current_line = 0;
-
-/*---------------------------------------------------------------------------
- * GFX_RESET_PITCH (PRIVATE ROUTINE - NOT PART OF API)
- *
- * This routine resets all pitches in the graphics engine to one value.
- *---------------------------------------------------------------------------
- */
-#if GFX_2DACCEL_DYNAMIC
-void gu2_reset_pitch(unsigned short pitch)
-#else
-void gfx_reset_pitch(unsigned short pitch)
-#endif
-{
-	gu2_pitch     = pitch;
-	gu2_dst_pitch = pitch;
-	gu2_src_pitch = pitch;
-}
-
-/*---------------------------------------------------------------------------
- * GFX_SET_BPP
- *
- * This routine sets the bits per pixel value in the graphics engine.
- * It is also stored in the static variable "gu2_bpp" to use in the future 
- * calls to the rendering routines.  That variable contains the hardware 
- * specific value to load into the MGP_RASTER_MODE register.
- *---------------------------------------------------------------------------
- */
-#if GFX_2DACCEL_DYNAMIC
-void gu2_set_bpp(unsigned short bpp)
-#else
-void gfx_set_bpp(unsigned short bpp)
-#endif
-{
-	GFXbpp = bpp;
-
-	/* COVERT TO BPP/FORMAT VALUE */
-	/* Save in global to combine with ROP later. */
-	/* Could write register here and then use byte access for */
-	/* the ROP, but would need to set other 24 bits to make */
-	/* sure all are set to their appropriate values. */
-
-	switch(bpp)
-	{
-		case 8:	 gu2_bpp = MGP_RM_BPPFMT_332;  gu2_xshift = 0; break;
-		case 12: gu2_bpp = MGP_RM_BPPFMT_4444; gu2_xshift = 1; break;
-		case 15: gu2_bpp = MGP_RM_BPPFMT_1555; gu2_xshift = 1; break;
-		case 16: gu2_bpp = MGP_RM_BPPFMT_565;  gu2_xshift = 1; break;
-		case 32: gu2_bpp = MGP_RM_BPPFMT_8888; gu2_xshift = 2; break;
-	}
-
-	/* SET INITIAL ROP BASED ONLY ON BPP */
-	/* Needs to be set before loading any pattern or source colors. */
-	/* We must wait for BUSY because these bits are not pipelined   */
-	/* in the hardware.                                             */
-	
-	GU2_WAIT_BUSY;
- 	WRITE_GP32(MGP_RASTER_MODE, gu2_bpp);
-}
-
-/*
-//---------------------------------------------------------------------------
-// GFX_SET_SOLID_SOURCE
-//
-// This routine is used to specify a solid source color.  For the Xfree96
-// display driver, the source color is used to specify a planemask and the 
-// ROP is adjusted accordingly.
-//---------------------------------------------------------------------------
-*/
-#if GFX_2DACCEL_DYNAMIC
-void gu2_set_solid_source(unsigned long color)
-#else
-void gfx_set_solid_source(unsigned long color)
-#endif
-{
-	/* CLEAR TRANSPARENCY FLAG */
-
-	GFXsourceFlags = 0;
-
-	/* WRITE REGISTERS TO SPECIFY SOURCE COLOR */
-
-	GU2_WAIT_PENDING;
-	WRITE_GP32(MGP_SRC_COLOR_FG, color);
-}
-
-/*
-//---------------------------------------------------------------------------
-// GFX_SET_MONO_SOURCE
-//
-// This routine is used to specify the monochrome source colors.  
-// It must be called *after* loading any pattern data (those routines 
-// clear the source flags).
-//---------------------------------------------------------------------------
-*/
-#if GFX_2DACCEL_DYNAMIC
-void gu2_set_mono_source(unsigned long bgcolor, unsigned long fgcolor,
-	unsigned short transparent)
-#else
-void gfx_set_mono_source(unsigned long bgcolor, unsigned long fgcolor,
-	unsigned short transparent)
-#endif
-{
-	/* SET TRANSPARENCY FLAG */
-
-	GFXsourceFlags = transparent ? MGP_RM_SRC_TRANS : 0;
-
-	/* WRITE COLOR VALUES */
-	
-	GU2_WAIT_PENDING;
-	WRITE_GP32(MGP_SRC_COLOR_FG, fgcolor);
-	WRITE_GP32(MGP_SRC_COLOR_BG, bgcolor);
-}
-
-/*
-//---------------------------------------------------------------------------
-// GFX_SET_SOLID_PATTERN
-//
-// This routine is used to specify a solid pattern color.  It is called 
-// before performing solid rectangle fills or more complicated BLTs that 
-// use a solid pattern color. 
-//
-// The driver should always call "gfx_load_raster_operation" after a call 
-// to this routine to make sure that the pattern flags are set appropriately.
-//---------------------------------------------------------------------------
-*/
-#if GFX_2DACCEL_DYNAMIC
-void gu2_set_solid_pattern(unsigned long color)
-#else
-void gfx_set_solid_pattern(unsigned long color)
-#endif
-{
-    /* CLEAR TRANSPARENCY FLAG */
-
-    GFXsourceFlags = 0;
-
-	/* SET PATTERN FLAGS */
-
-	GFXpatternFlags = 0;
-
-	/* POLL UNTIL ABLE TO WRITE THE PATTERN COLOR */
-
-	GU2_WAIT_PENDING;
-	WRITE_GP32(MGP_RASTER_MODE, gu2_bpp);
- 	WRITE_GP32(MGP_PAT_COLOR_0, color);
-}
-
-/*
-//---------------------------------------------------------------------------
-// GFX_SET_MONO_PATTERN
-//
-// This routine is used to specify a monochrome pattern. 
-//---------------------------------------------------------------------------
-*/
-#if GFX_2DACCEL_DYNAMIC
-void gu2_set_mono_pattern(unsigned long bgcolor, unsigned long fgcolor, 
-	unsigned long data0, unsigned long data1, unsigned char transparent)
-#else
-void gfx_set_mono_pattern(unsigned long bgcolor, unsigned long fgcolor, 
-	unsigned long data0, unsigned long data1, unsigned char transparent)
-#endif
-{
-    /* CLEAR TRANSPARENCY FLAG */
-
-    GFXsourceFlags = 0;
-
-	/* SET PATTERN FLAGS */
-
-	if (transparent) 
-		GFXpatternFlags = MGP_RM_PAT_MONO | MGP_RM_PAT_TRANS;
-	else GFXpatternFlags = MGP_RM_PAT_MONO;
-
-	/* POLL UNTIL ABLE TO WRITE THE PATTERN COLOR */
-
-	GU2_WAIT_PENDING;
-	WRITE_GP32(MGP_RASTER_MODE, gu2_bpp | GFXpatternFlags);
- 	WRITE_GP32(MGP_PAT_COLOR_0, bgcolor);
- 	WRITE_GP32(MGP_PAT_COLOR_1, fgcolor);
- 	WRITE_GP32(MGP_PAT_DATA_0, data0);
- 	WRITE_GP32(MGP_PAT_DATA_1, data1);
-}
-
-/*
-//---------------------------------------------------------------------------
-// GFX_SET_COLOR_PATTERN
-//
-// This routine is used to specify a color pattern. 
-//---------------------------------------------------------------------------
-*/
-#if GFX_2DACCEL_DYNAMIC
-void gu2_set_color_pattern(unsigned long bgcolor, unsigned long fgcolor, 
-	unsigned long data0, unsigned long data1,unsigned long data2,unsigned long data3, unsigned char transparent)
-#else
-void gfx_set_color_pattern(unsigned long bgcolor, unsigned long fgcolor, 
-	unsigned long data0, unsigned long data1, unsigned long data2,unsigned long data3,unsigned char transparent)
-#endif
-{
-	/* REMOVE */
-}
-
-/*
-//---------------------------------------------------------------------------
-// GFX_LOAD_COLOR_PATTERN_LINE
-//
-// This routine is used to load a single line of a 8x8 color pattern.   
-//---------------------------------------------------------------------------
-*/
-#if GFX_2DACCEL_DYNAMIC
-void gu2_load_color_pattern_line (short y, unsigned long *pattern_8x8)
-	
-#else
-void gfx_load_color_pattern_line (short y, unsigned long *pattern_8x8) 
-#endif
-{
-	unsigned long temp1, temp2, temp3, temp4;
-
-	/* CLEAR TRANSPARENCY FLAG */
-
-    GFXsourceFlags = 0;
-
-	/* SET PATTERN FLAGS */
-
-	GFXpatternFlags = MGP_RM_PAT_COLOR;
-
-	/* OVERRIDE THE RASTER MODE REGISTER */
-	/* If the pattern format is set to anything but color  */
-	/* before loading the registers, some of the data will */
-	/* be duplicated according to the current mode.        */
-
-	GU2_WAIT_PENDING;
- 	WRITE_GP32(MGP_RASTER_MODE, (gu2_rop32 & ~MGP_RM_PAT_FLAGS) | MGP_RM_PAT_COLOR);
-
-	/* LOAD THE PATTERN DATA */
-	/* This routine is designed to work in tandem with gfx_pattern_fill.  */
-	/* It is used for cases when multiple BLTs with color pattern data    */
-	/* are desired on the same line.  It would be inefficient to          */
-	/* repeatedly call gfx_color_pattern_fill for each single-line BLT.   */
-	/* So, we will simply replicate the pattern data across all available */
-	/* lines such that the pattern y origin plays no part in the BLT.     */
-
-	/* 8 BPP */
-
-	if (gu2_xshift == 0)
-	{
-		pattern_8x8 += (y & 7) << 1;
-		temp1 = BYTE_SWIZZLE(pattern_8x8[0]);
-		temp2 = BYTE_SWIZZLE(pattern_8x8[1]);
-		WRITE_GP32 (MGP_PAT_DATA_1, temp1);
-		WRITE_GP32 (MGP_PAT_DATA_0, temp2);
-		WRITE_GP32 (MGP_PAT_COLOR_1, temp1);
-		WRITE_GP32 (MGP_PAT_COLOR_0, temp2);
-
-		GU2_WAIT_BUSY;
-		WRITE_GP32 (MGP_PAT_COLOR_3, temp1);
-		WRITE_GP32 (MGP_PAT_COLOR_2, temp2);
-		WRITE_GP32 (MGP_PAT_COLOR_5, temp1);
-		WRITE_GP32 (MGP_PAT_COLOR_4, temp2);
-	}
-	else if (gu2_xshift == 1)
-	{
-		pattern_8x8 += (y & 7) << 2;
-		temp1 = WORD_SWIZZLE(pattern_8x8[0]);
-		temp2 = WORD_SWIZZLE(pattern_8x8[1]);
-		temp3 = WORD_SWIZZLE(pattern_8x8[2]);
-		temp4 = WORD_SWIZZLE(pattern_8x8[3]);
-
-		WRITE_GP32 (MGP_PAT_COLOR_1, temp1);
-		WRITE_GP32 (MGP_PAT_COLOR_0, temp2);
-		WRITE_GP32 (MGP_PAT_DATA_1, temp3);
-		WRITE_GP32 (MGP_PAT_DATA_0, temp4);
-		
-		GU2_WAIT_BUSY;
-		WRITE_GP32 (MGP_PAT_COLOR_5, temp1);
-		WRITE_GP32 (MGP_PAT_COLOR_4, temp2);
-		WRITE_GP32 (MGP_PAT_COLOR_3, temp3);
-		WRITE_GP32 (MGP_PAT_COLOR_2, temp4);
-	}
-	else
-	{
-		pattern_8x8 += (y & 7) << 3;
-
-		WRITE_GP32(MGP_PAT_COLOR_1, pattern_8x8[4]);
-		WRITE_GP32(MGP_PAT_COLOR_0, pattern_8x8[5]);
-		WRITE_GP32(MGP_PAT_DATA_1, pattern_8x8[6]);
-		WRITE_GP32(MGP_PAT_DATA_0, pattern_8x8[7]);
-		
-		GU2_WAIT_BUSY;
-		WRITE_GP32(MGP_PAT_COLOR_5, pattern_8x8[0]);
-		WRITE_GP32(MGP_PAT_COLOR_4, pattern_8x8[1]);
-		WRITE_GP32(MGP_PAT_COLOR_3, pattern_8x8[2]);
-		WRITE_GP32(MGP_PAT_COLOR_2, pattern_8x8[3]);
-	}
-}
-
-/*
-//---------------------------------------------------------------------------
-// GFX_SET_RASTER_OPERATION
-//
-// This routine loads the specified raster operation.  It sets the pattern
-// flags appropriately.
-//---------------------------------------------------------------------------
-*/
-#if GFX_2DACCEL_DYNAMIC
-void gu2_set_raster_operation(unsigned char rop)
-#else
-void gfx_set_raster_operation(unsigned char rop)
-#endif
-{
-	/* DISABLE ALPHA BLENDING */
-
-	gu2_alpha_active = 0;
-
-	/* GENERATE 32-BIT VERSION OF ROP WITH PATTERN FLAGS */
-
-	gu2_rop32 = (unsigned long) rop | GFXpatternFlags | gu2_bpp;
-
-	/* CHECK IF SOURCE FLAGS SHOULD BE MERGED */
-
-	if ((rop & 0x33) ^ ((rop >> 2) & 0x33)) gu2_rop32 |= GFXsourceFlags;
-	
-	/* SET FLAG INDICATING ROP REQUIRES DESTINATION DATA */
-	/* True if even bits (0:2:4:6) do not equal the corresponding */
-	/* even bits (1:3:5:7). */
-
-	if ((rop & 0x55) ^ ((rop >> 1) & 0x55))
-	{
-		gu2_blt_mode = MGP_BM_DST_REQ;
-		gu2_vector_mode = MGP_VM_DST_REQ;
-	}
-	else 
-	{
-		gu2_blt_mode = 0;
-		gu2_vector_mode = 0;
-	}
-}
-
-/*
-//----------------------------------------------------------------------------
-// GFX_PATTERN_FILL
-//
-// This routine is used to fill a rectangular region.  The pattern must 
-// be previously loaded using one of GFX_load_*_pattern routines.  Also, the 
-// raster operation must be previously specified using the 
-// "GFX_load_raster_operation" routine.
-//
-//      X               screen X position (left)
-//      Y               screen Y position (top)
-//      WIDTH           width of rectangle, in pixels
-//      HEIGHT          height of rectangle, in scanlines
-//----------------------------------------------------------------------------
-*/
-#if GFX_2DACCEL_DYNAMIC
-void gu2_pattern_fill(unsigned short x, unsigned short y, 
-	unsigned short width, unsigned short height)
-#else
-void gfx_pattern_fill(unsigned short x, unsigned short y, 
-	unsigned short width, unsigned short height)
-#endif
-{
-	unsigned long offset = 0, size;
-	size = (((unsigned long) width) << 16) | height;
-
-	/* CALCULATE STARTING OFFSET */
-
-	offset = (unsigned long) y * gu2_pitch + 
-		(((unsigned long) x) << gu2_xshift);
-
-	/* CHECK IF PATTERN ORIGINS NEED TO BE SET */
-
-	if (GFXpatternFlags)
-	{
-		/* COMBINE X AND Y PATTERN ORIGINS WITH OFFSET */
-
-		offset |= ((unsigned long) (x & 7)) << 26;
-		offset |= ((unsigned long) (y & 7)) << 29;
-	}
-
-	/* POLL UNTIL ABLE TO WRITE TO THE REGISTERS */
-	/* Put off poll for as long as possible (do most calculations first). */
-
-	GU2_WAIT_PENDING;
-	WRITE_GP32(MGP_RASTER_MODE, gu2_rop32);
-	WRITE_GP32(MGP_DST_OFFSET, offset);
-	WRITE_GP32(MGP_WID_HEIGHT, size);
-	WRITE_GP32(MGP_STRIDE, gu2_pitch);
-	WRITE_GP16(MGP_BLT_MODE, gu2_blt_mode);
-}    
-
-/*
-//----------------------------------------------------------------------------
-// GFX_COLOR_PATTERN_FILL
-//
-// This routine is used to render a rectangle using the current raster 
-// operation and the specified color pattern.  It allows an 8x8 color 
-// pattern to be rendered without multiple calls to the gfx_set_color_pattern
-// and gfx_pattern_fill routines.
-//
-//      X               screen X position (left)
-//      Y               screen Y position (top)
-//      WIDTH           width of rectangle, in pixels
-//      HEIGHT          height of rectangle, in scanlines
-//      *PATTERN		pointer to 8x8 color pattern data
-//----------------------------------------------------------------------------
-*/
-#if GFX_2DACCEL_DYNAMIC
-void gu2_color_pattern_fill(unsigned short x, unsigned short y, 
-	unsigned short width, unsigned short height, unsigned long *pattern)
-#else
-void gfx_color_pattern_fill(unsigned short x, unsigned short y, 
-	unsigned short width, unsigned short height, unsigned long *pattern)
-#endif
-{
-	/* CALL GFX2 ROUTINE TO AVOID DUPLICATION OF CODE */
-
-	unsigned long offset = (unsigned long) y * gu2_pitch +
-		(((unsigned long) x) << gu2_xshift);
-	unsigned long origin = gu2_pattern_origin;
-	unsigned long pitch = gu2_dst_pitch;
-	gfx2_set_pattern_origin(x, y);
-	gfx2_set_destination_stride((unsigned short) gu2_pitch);
-	gfx2_color_pattern_fill(offset, width, height, pattern);
-
-	/* RESTORE GFX2 VALUES */
-
-	gu2_pattern_origin = origin;
-    gu2_dst_pitch = pitch;
-};
-
-/*
-//----------------------------------------------------------------------------
-// SCREEN TO SCREEN BLT
-//
-// This routine should be used to perform a screen to screen BLT when the 
-// ROP does not require destination data.
-//
-//      SRCX            screen X position to copy from
-//      SRCY            screen Y position to copy from
-//      DSTX            screen X position to copy to
-//      DSTY            screen Y position to copy to
-//      WIDTH           width of rectangle, in pixels
-//      HEIGHT          height of rectangle, in scanlines
-//----------------------------------------------------------------------------
-*/
-#if GFX_2DACCEL_DYNAMIC
-void gu2_screen_to_screen_blt(unsigned short srcx, unsigned short srcy,
-	unsigned short dstx, unsigned short dsty, unsigned short width, 
-	unsigned short height)
-#else
-void gfx_screen_to_screen_blt(unsigned short srcx, unsigned short srcy,
-	unsigned short dstx, unsigned short dsty, unsigned short width, 
-	unsigned short height)
-#endif
-{
-	unsigned long srcoffset, dstoffset, size;
-	unsigned short blt_mode;
-	size = (((unsigned long) width) << 16) | height;
-
-	/* CALCULATE THE DIRECTION OF THE BLT */
-
-	blt_mode = gu2_blt_mode | MGP_BM_SRC_FB;
-	if (dstx > srcx) 
-	{
-		blt_mode |= MGP_BM_NEG_XDIR;
-		srcx += width - 1;
-		dstx += width - 1;
-	}
-	if (dsty > srcy) 
-	{
-		blt_mode |= MGP_BM_NEG_YDIR;
-		srcy += height - 1;
-		dsty += height - 1;
-	}
-
-	/* CALCULATE STARTING OFFSETS */
-
-	srcoffset = (unsigned long) srcy * gu2_pitch + 
-		(((unsigned long) srcx) << gu2_xshift);
-	dstoffset = ((unsigned long) dsty * gu2_pitch + 
-		(((unsigned long) dstx) << gu2_xshift)) & 0xFFFFFF;
-
-	/* MERGE PATTERN INFORMATION */
-	/* This must be done after the x and y coordinates have been updated,  */
-	/* as the x and y pattern origins correspond to the first ROPed pixel. */
-
-	if (GFXpatternFlags)
-	{
-		/* COMBINE X AND Y PATTERN ORIGINS WITH OFFSET */
-
-		dstoffset |= ((unsigned long) (dstx & 7)) << 26;
-		dstoffset |= ((unsigned long) (dsty & 7)) << 29;
-	}
-	
-	/* TURN INTO BYTE ADDRESS IF NEGATIVE X DIRECTION */
-	/* This is a quirk of the hardware. */
-
-	if (blt_mode & MGP_BM_NEG_XDIR)
-	{
-		srcoffset += (1 << gu2_xshift) - 1;
-		dstoffset += (1 << gu2_xshift) - 1;
-	}
-
-	/* POLL UNTIL ABLE TO WRITE TO THE REGISTERS */
-	/* Put off poll for as long as possible (do most calculations first). */
-
-	GU2_WAIT_PENDING;
-	WRITE_GP32(MGP_RASTER_MODE, gu2_rop32);
-	WRITE_GP32(MGP_SRC_OFFSET, srcoffset);
-	WRITE_GP32(MGP_DST_OFFSET, dstoffset);
-	WRITE_GP32(MGP_WID_HEIGHT, size);
-	WRITE_GP32(MGP_STRIDE, gu2_pitch | (gu2_pitch << 16));
-	WRITE_GP16(MGP_BLT_MODE, blt_mode);
-}    
-
-/*
-//----------------------------------------------------------------------------
-// SCREEN TO SCREEN TRANSPARENT BLT
-//
-// This routine should be used to perform a screen to screen BLT when a 
-// specified color should by transparent.  The only supported ROP is SRCCOPY.
-//
-//      SRCX            screen X position to copy from
-//      SRCY            screen Y position to copy from
-//      DSTX            screen X position to copy to
-//      DSTY            screen Y position to copy to
-//      WIDTH           width of rectangle, in pixels
-//      HEIGHT          height of rectangle, in scanlines
-//      COLOR           transparent color
-//----------------------------------------------------------------------------
-*/
-#if GFX_2DACCEL_DYNAMIC
-void gu2_screen_to_screen_xblt(unsigned short srcx, unsigned short srcy,
-	unsigned short dstx, unsigned short dsty, unsigned short width, 
-	unsigned short height, unsigned long color)
-#else
-void gfx_screen_to_screen_xblt(unsigned short srcx, unsigned short srcy,
-	unsigned short dstx, unsigned short dsty, unsigned short width, 
-	unsigned short height, unsigned long color)
-#endif
-{
-	unsigned long rop32;
-
-	/* SAVE ORIGINAL RASTER MODE SETTINGS */
-	
-	rop32 = gu2_rop32;
-
-	/* WRITE REGISTERS TO SPECIFY COLOR TRANSPARENCY */
-	/* Match GU1 implementation that only allows SRCCOPY for the ROP. */
-
-	GU2_WAIT_PENDING;
-	WRITE_GP32(MGP_SRC_COLOR_FG, color);
-	WRITE_GP32(MGP_SRC_COLOR_BG, 0xFFFFFFFF);
-	
-	/* SET GLOBAL RASTER SETTINGS */
-	/* This is needed, as the screen-to-screen BLT      */
-	/* routine will overwrite the raster mode register. */
-
-	gu2_rop32 = gu2_bpp | MGP_RM_SRC_TRANS | 0xCC;
-
-	/* CALL NORMAL SCREEN TO SCREEN BLT ROUTINE */
-
-	gfx_screen_to_screen_blt(srcx, srcy, dstx, dsty, width, height);
-
-	/* RESTORE GLOBAL RASTER SETTINGS */
-
-	gu2_rop32 = rop32;
-}    
-
-/*
-//----------------------------------------------------------------------------
-// COLOR BITMAP TO SCREEN BLT
-//
-// This routine transfers color bitmap data to the screen.
-//
-//      SRCX            X offset within source bitmap
-//      SRCY            Y offset within source bitmap
-//      DSTX            screen X position to render data
-//      DSTY            screen Y position to render data
-//      WIDTH           width of rectangle, in pixels
-//      HEIGHT          height of rectangle, in scanlines
-//      *DATA           pointer to bitmap data
-//      PITCH           pitch of bitmap data (bytes between scanlines)
-//
-// Transparency is handled by another routine.
-//----------------------------------------------------------------------------
-*/
-
-#if GFX_2DACCEL_DYNAMIC
-void gu2_color_bitmap_to_screen_blt(unsigned short srcx, unsigned short srcy,
-	unsigned short dstx, unsigned short dsty, unsigned short width, 
-	unsigned short height, unsigned char *data, long pitch)
-#else
-void gfx_color_bitmap_to_screen_blt(unsigned short srcx, unsigned short srcy,
-	unsigned short dstx, unsigned short dsty, unsigned short width, 
-	unsigned short height, unsigned char *data, long pitch)
-#endif
-{
-	unsigned long dstoffset, srcoffset, size, bytes;
-	unsigned long offset, temp_offset;
-	unsigned long dword_bytes, bytes_extra;
-	unsigned short blt_mode;
-
-	blt_mode = gu2_blt_mode | MGP_BM_SRC_FB;
-	size = (((unsigned long) width) << 16) | 1;
-
-	/* CALCULATE STARTING OFFSETS */
-
-	offset = (unsigned long) srcy * pitch + ((unsigned long)srcx << gu2_xshift);
-
-	dstoffset = (unsigned long) dsty * gu2_pitch + 
-		(((unsigned long) dstx) << gu2_xshift);
-
-	/* CHECK IF PATTERN ORIGINS NEED TO BE SET */
-
-	if (GFXpatternFlags)
-	{
-		/* COMBINE X AND Y PATTERN ORIGINS WITH OFFSET */
-
-		dstoffset |= ((unsigned long) (dstx & 7)) << 26;
-		dstoffset |= ((unsigned long) (dsty & 7)) << 29;
-	}
-
-	bytes = width << gu2_xshift;
-	dword_bytes = bytes & ~0x3L;
-	bytes_extra = bytes &  0x3L;
-
-	/* POLL UNTIL ABLE TO WRITE TO THE REGISTERS */
-	/* Put off poll for as long as possible (do most calculations first).   */
-	/* The source offset is always 0 since we allow misaligned dword reads. */
-	/* We must wait for BLT busy because the GP may be executing a screen   */
-	/* to screen BLT from the scratchpad area.                              */
-
-	GU2_WAIT_BUSY;
-	WRITE_GP32(MGP_RASTER_MODE, gu2_rop32);
-	WRITE_GP32(MGP_WID_HEIGHT, size);
-	WRITE_GP32(MGP_STRIDE, gu2_pitch);
-	
-	/* WRITE DATA ONE LINE AT A TIME */
-	/* For speed reasons, data is written to an offscreen scratch area and then        */
-	/* BLTed using a screen to screen BLT. This is similar to the GX1 BLT buffers, but */
-	/* slightly more efficient in that we can queue up data while the GP is rendering  */
-	/* a line.                                                                         */
-
-	while (height--)
-	{
-		temp_offset = offset;
-		srcoffset   = gfx_gx2_scratch_base;
-		if (gu2_current_line)
-			srcoffset += 8192;
-	
-		GU2_WAIT_PENDING;
-		WRITE_GP32 (MGP_SRC_OFFSET, srcoffset);
-		WRITE_GP32 (MGP_DST_OFFSET, dstoffset);
-		dstoffset += gu2_pitch;
-		dstoffset += 0x20000000;
-
-		WRITE_FRAME_BUFFER_STRING32 (srcoffset, dword_bytes, data, temp_offset);
-		if (bytes_extra)
-		{
-			temp_offset += dword_bytes;
-			srcoffset   += dword_bytes;
-			WRITE_FRAME_BUFFER_STRING8  (srcoffset, bytes_extra, data, temp_offset);
-		}
-		WRITE_GP16 (MGP_BLT_MODE, blt_mode);
-		offset += pitch;
-		gu2_current_line = 1 - gu2_current_line;
-	}
-}    
-
-/*
-//----------------------------------------------------------------------------
-// COLOR BITMAP TO SCREEN TRANSPARENT BLT
-//
-// This routine transfers color bitmap data to the screen with transparency.
-// The transparent color is specified.  The only supported ROP is SRCCOPY, 
-// meaning that transparency cannot be applied if the ROP requires 
-// destination data (this is a hardware restriction).
-//
-//      SRCX            X offset within source bitmap
-//      SRCY            Y offset within source bitmap
-//      DSTX            screen X position to render data
-//      DSTY            screen Y position to render data
-//      WIDTH           width of rectangle, in pixels
-//      HEIGHT          height of rectangle, in scanlines
-//      *DATA           pointer to bitmap data
-//      PITCH           pitch of bitmap data (bytes between scanlines)
-//      COLOR           transparent color
-//----------------------------------------------------------------------------
-*/
-#if GFX_2DACCEL_DYNAMIC
-void gu2_color_bitmap_to_screen_xblt(unsigned short srcx, unsigned short srcy,
-	unsigned short dstx, unsigned short dsty, unsigned short width, 
-	unsigned short height, unsigned char *data,  long pitch, 
-	unsigned long color)
-#else
-void gfx_color_bitmap_to_screen_xblt(unsigned short srcx, unsigned short srcy,
-	unsigned short dstx, unsigned short dsty, unsigned short width, 
-	unsigned short height, unsigned char *data,  long pitch, 
-	unsigned long color)
-#endif
-{
-	unsigned long rop32;
-
-	/* SAVE EXISTING RASTER MODE SETTINGS */
-
-	rop32 = gu2_rop32;
-
-	/* WRITE REGISTERS TO SPECIFY COLOR TRANSPARENCY */
-	/* Match GU1 implementation that only allows SRCCOPY for the ROP. */
-
-	GU2_WAIT_PENDING;
-	WRITE_GP32(MGP_SRC_COLOR_FG, color);
-	WRITE_GP32(MGP_SRC_COLOR_BG, 0xFFFFFFFF);
-
-	/* SET GLOBAL RASTER SETTINGS */
-	/* This is needed, as the screen-to-screen BLT      */
-	/* routine will overwrite the raster mode register. */
-
-	gu2_rop32 = gu2_bpp | MGP_RM_SRC_TRANS | 0xCC;
-
-	/* CALL NORMAL COLOR BITMAP TO SCREEN BLT ROUTINE */
-
-	gfx_color_bitmap_to_screen_blt(srcx, srcy, dstx, dsty, width, height, 
-		data, pitch);
-
-	/* RESTORE RASTER SETTINGS */
-
-	gu2_rop32 = rop32;
-}    
-
-/*
-//----------------------------------------------------------------------------
-// MONOCHROME BITMAP TO SCREEN BLT
-//
-// This routine transfers monochrome bitmap data to the screen.  
-//
-//      SRCX            X offset within source bitmap
-//      SRCY            Y offset within source bitmap
-//      DSTX            screen X position to render data
-//      DSTY            screen Y position to render data
-//      WIDTH           width of rectangle, in pixels
-//      HEIGHT          height of rectangle, in scanlines
-//      *DATA           pointer to bitmap data
-//      PITCH           pitch of bitmap data (bytes between scanlines)
-//----------------------------------------------------------------------------
-*/
-#if GFX_2DACCEL_DYNAMIC
-void gu2_mono_bitmap_to_screen_blt(unsigned short srcx, unsigned short srcy,
-	unsigned short dstx, unsigned short dsty, unsigned short width, 
-	unsigned short height, unsigned char *data,  short pitch)
-#else
-void gfx_mono_bitmap_to_screen_blt(unsigned short srcx, unsigned short srcy,
-	unsigned short dstx, unsigned short dsty, unsigned short width, 
-	unsigned short height, unsigned char *data,  short pitch)
-#endif
-{
-	unsigned long dstoffset, size, bytes;
-	unsigned long offset, temp_offset, temp1 = 0, temp2 = 0;
-	unsigned long i, j = 0, fifo_lines, dwords_extra, bytes_extra;
-	unsigned long shift = 0;
-
-	size = (((unsigned long) width) << 16) | height;
-
-	/* CALCULATE STARTING OFFSETS */
-
-	offset = (unsigned long) srcy * pitch + ((unsigned long)srcx >> 3);
-
-	dstoffset = (unsigned long) dsty * gu2_pitch + 
-		(((unsigned long) dstx) << gu2_xshift);
-
-	/* CHECK IF PATTERN ORIGINS NEED TO BE SET */
-
-	if (GFXpatternFlags)
-	{
-		/* COMBINE X AND Y PATTERN ORIGINS WITH OFFSET */
-
-		dstoffset |= ((unsigned long) (dstx & 7)) << 26;
-		dstoffset |= ((unsigned long) (dsty & 7)) << 29;
-	}
-
-	bytes = ((srcx & 7) + width + 7) >> 3;
-	fifo_lines   =  bytes >> 5;
-	dwords_extra = (bytes & 0x0000001Cl) >> 2;
-	bytes_extra  =  bytes & 0x00000003l;
-
-	/* POLL UNTIL ABLE TO WRITE TO THE REGISTERS */
-	/* Put off poll for as long as possible (do most calculations first).   */
-	/* The source offset is always 0 since we allow misaligned dword reads. */
-	/* Need to wait for busy instead of pending, since hardware clears      */
-	/* the host data FIFO at the beginning of a BLT.                        */
-
-	GU2_WAIT_PENDING;
-	WRITE_GP32(MGP_RASTER_MODE, gu2_rop32);
-	WRITE_GP32(MGP_SRC_OFFSET, ((unsigned long) srcx & 7) << 26); 
-	WRITE_GP32(MGP_DST_OFFSET, dstoffset);
-	WRITE_GP32(MGP_WID_HEIGHT, size);
-	WRITE_GP32(MGP_STRIDE, gu2_pitch);
-	WRITE_GP16(MGP_BLT_MODE, gu2_blt_mode | MGP_BM_SRC_HOST | MGP_BM_SRC_MONO);
-	
-	/* WAIT FOR BLT TO BE LATCHED */
-
-	GU2_WAIT_PENDING;
-
-	/* WRITE ALL OF THE DATA TO THE HOST SOURCE REGISTER */
-
-	while (height--)
-	{
-		temp_offset = offset;
-
-		/* WRITE ALL FULL FIFO LINES */
-
-		for (i = 0; i < fifo_lines; i++)
-		{
-			GU2_WAIT_HALF_EMPTY;
-			WRITE_GPREG_STRING32 (MGP_HST_SOURCE, 8, j, data, temp_offset, temp1);
-			temp_offset += 32;
-		}
-
-		/* WRITE ALL FULL DWORDS */
-
-		GU2_WAIT_HALF_EMPTY;
-		if (dwords_extra)
-		{
-			WRITE_GPREG_STRING32 (MGP_HST_SOURCE, dwords_extra, i, data, temp_offset, temp1);
-			temp_offset += (dwords_extra << 2);
-		}
-
-		/* WRITE REMAINING BYTES */
-
-		shift = 0;
-		if (bytes_extra)
-			WRITE_GPREG_STRING8 (MGP_HST_SOURCE, bytes_extra, shift, i, data, temp_offset, temp1, temp2);
-
-		offset += pitch;
-	}
-}    
-
-/*---------------------------------------------------------------------------
- * GFX_TEXT_BLT	
- *
- * This routine is similar to the gfx_mono_bitmap_to_screen_blt routine 
- * but assumes that source data is byte-packed.
- *---------------------------------------------------------------------------
- */
-#if GFX_2DACCEL_DYNAMIC
-void gu2_text_blt(unsigned short dstx, unsigned short dsty, unsigned short width, 
-				  unsigned short height, unsigned char *data)
-#else
-void gfx_text_blt(unsigned short dstx, unsigned short dsty, unsigned short width, 
-				  unsigned short height, unsigned char *data)
-#endif
-{
-	unsigned long size, bytes;
-	unsigned long dstoffset, temp1 = 0, temp2 = 0, temp_offset = 0;
-	unsigned long i, j = 0, fifo_lines, dwords_extra, bytes_extra;
-	unsigned long shift;
-	
-	size = (((unsigned long) width) << 16) | height;
-
-	dstoffset = (unsigned long) dsty * gu2_pitch + 
-		(((unsigned long) dstx) << gu2_xshift);
-
-	/* CHECK IF PATTERN ORIGINS NEED TO BE SET */
-
-	if (GFXpatternFlags)
-	{
-		/* COMBINE X AND Y PATTERN ORIGINS WITH OFFSET */
-
-		dstoffset |= ((unsigned long) (dstx & 7)) << 26;
-		dstoffset |= ((unsigned long) (dsty & 7)) << 29;
-	}
-
-	/* CALCULATE STARTING OFFSETS */
-
-	bytes = ((width + 7) >> 3) * height;
-	fifo_lines   =  bytes >> 5;
-	dwords_extra = (bytes & 0x0000001Cl) >> 2;
-	bytes_extra  =  bytes & 0x00000003l;
-
-	/* POLL UNTIL ABLE TO WRITE TO THE REGISTERS */
-	
-	GU2_WAIT_PENDING;
-	WRITE_GP32(MGP_RASTER_MODE, gu2_rop32);
-	WRITE_GP32(MGP_SRC_OFFSET, 0); 
-	WRITE_GP32(MGP_DST_OFFSET, dstoffset);
-	WRITE_GP32(MGP_WID_HEIGHT, size);
-	WRITE_GP32(MGP_STRIDE, gu2_pitch);
-	WRITE_GP16(MGP_BLT_MODE, gu2_blt_mode | MGP_BM_SRC_HOST | 
-		MGP_BM_SRC_BP_MONO);
-	
-	/* WAIT FOR BLT TO BE LATCHED */
-
-	GU2_WAIT_PENDING;
-
-	/* WRITE ALL FULL FIFO LINES */
-
-	for (i = 0; i < fifo_lines; i++)
-	{
-		GU2_WAIT_HALF_EMPTY;
-		WRITE_GPREG_STRING32 (MGP_HST_SOURCE, 8, j, data, temp_offset, temp1);
-		temp_offset += 32;
-	}
-
-	/* WRITE ALL FULL DWORDS */
-
-	if (dwords_extra || bytes_extra)
-	{
-		GU2_WAIT_HALF_EMPTY;
-		if (dwords_extra)
-		{
-			WRITE_GPREG_STRING32 (MGP_HST_SOURCE, dwords_extra, i, data, temp_offset, temp1);
-			temp_offset += (dwords_extra << 2);
-		}
-		if (bytes_extra)
-		{
-			shift = 0;
-			WRITE_GPREG_STRING8 (MGP_HST_SOURCE, bytes_extra, shift, i, data, temp_offset, temp1, temp2);
-		}
-	}
-}
-
-/*
-//----------------------------------------------------------------------------
-// BRESENHAM LINE
-//
-// This routine draws a vector using the specified Bresenham parameters.  
-// Currently this file does not support a routine that accepts the two 
-// endpoints of a vector and calculates the Bresenham parameters.  If it 
-// ever does, this routine is still required for vectors that have been 
-// clipped.
-//
-//      X               screen X position to start vector
-//      Y               screen Y position to start vector
-//      LENGTH          length of the vector, in pixels
-//      INITERR         Bresenham initial error term
-//      AXIALERR        Bresenham axial error term
-//      DIAGERR         Bresenham diagonal error term
-//      FLAGS           VM_YMAJOR, VM_MAJOR_INC, VM_MINOR_INC
-//----------------------------------------------------------------------------
-*/
-#if GFX_2DACCEL_DYNAMIC
-void gu2_bresenham_line(unsigned short x, unsigned short y, 
-		unsigned short length, unsigned short initerr, 
-		unsigned short axialerr, unsigned short diagerr, 
-		unsigned short flags)
-#else
-void gfx_bresenham_line(unsigned short x, unsigned short y, 
-		unsigned short length, unsigned short initerr, 
-		unsigned short axialerr, unsigned short diagerr, 
-		unsigned short flags)
-#endif
-{
-	unsigned long  offset;
-	unsigned long  data1 = (((unsigned long) axialerr) << 16) | diagerr;
-	unsigned long  data2 = (((unsigned long) length) << 16) | initerr;
-	unsigned short vector_mode = gu2_vector_mode | flags;
-
-	/* CALCULATE STARTING OFFSET */
-
-	offset = (unsigned long) y * gu2_pitch + 
-		(((unsigned long) x) << gu2_xshift);
-
-	/* CHECK NULL LENGTH */
-
-	if (!length) return;
-
-	/* POLL UNTIL ABLE TO WRITE TO THE REGISTERS */
-	/* Put off poll for as long as possible (do most calculations first). */
-
-	GU2_WAIT_PENDING;
-	WRITE_GP32(MGP_RASTER_MODE, gu2_rop32);
-	WRITE_GP32(MGP_DST_OFFSET, offset);
-	WRITE_GP32(MGP_VEC_ERR, data1);
-	WRITE_GP32(MGP_VEC_LEN, data2);
-	WRITE_GP32(MGP_STRIDE, gu2_pitch);
-	WRITE_GP16(MGP_VECTOR_MODE, vector_mode);
-}
-
-/*---------------------------------------------------------------------------
- * GFX_WAIT_UNTIL_IDLE
- *
- * This routine waits until the graphics engine is idle.  This is required
- * before allowing direct access to the frame buffer.
- *---------------------------------------------------------------------------
- */
-#if GFX_2DACCEL_DYNAMIC
-void gu2_wait_until_idle(void)
-#else
-void gfx_wait_until_idle(void)
-#endif
-{
-	while(READ_GP32(MGP_BLT_STATUS) & MGP_BS_BLT_BUSY);
-}
-
-/*---------------------------------------------------------------------------
- * GFX_TEST_BLT_PENDING
- *
- * This routine returns 1 if a BLT is pending, meaning that a call to 
- * perform a rendering operation would stall.  Otherwise it returns 0.
- * It is used by Darwin during random testing to only start a BLT 
- * operation when it knows the Durango routines won't spin on graphics
- * (so Darwin can continue to do frame buffer reads and writes).
- *---------------------------------------------------------------------------
- */
-#if GFX_2DACCEL_DYNAMIC
-int gu2_test_blt_pending(void)
-#else
-int gfx_test_blt_pending(void)
-#endif
-{
-	if (READ_GP32(MGP_BLT_STATUS) & MGP_BS_BLT_PENDING) return(1);
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * NEW ROUTINES FOR REDCLOUD
- *---------------------------------------------------------------------------
- */
-
-/*---------------------------------------------------------------------------
- * GFX2_SET_SOURCE_STRIDE
- *
- * This routine sets the stride to be used in successive screen to screen 
- * BLTs (used by gfx2_screen_to_screen_blt and gfx2_mono_expand_blt).
- *---------------------------------------------------------------------------
- */
-#if GFX_2DACCEL_DYNAMIC
-void gu22_set_source_stride (unsigned short stride)
-#else
-void gfx2_set_source_stride (unsigned short stride)
-#endif
-{
-	/* SAVE STRIDE TO BE USED LATER */
-
-	gu2_src_pitch = (unsigned long) stride;
-}
-
-/*---------------------------------------------------------------------------
- * GFX2_SET_DESTINATION_STRIDE
- *
- * This routine sets the stride used when rendering to the screen.
- *---------------------------------------------------------------------------
- */
-#if GFX_2DACCEL_DYNAMIC
-void gu22_set_destination_stride(unsigned short stride)
-#else
-void gfx2_set_destination_stride(unsigned short stride)
-#endif
-{
-	/* SAVE STRIDE TO BE USED LATER */
-
-	gu2_dst_pitch = (unsigned long) stride;
-}
-
-/*---------------------------------------------------------------------------
- * GFX2_SET_PATTERN_ORIGIN
- *
- * This routine sets the origin within an 8x8 pattern.  It is needed if 
- * using a monochrome or color pattern (not used for a solid pattern).
- *---------------------------------------------------------------------------
- */
-#if GFX_2DACCEL_DYNAMIC
-void gu22_set_pattern_origin(int x, int y)
-#else
-void gfx2_set_pattern_origin(int x, int y)
-#endif
-{
-	/* STORE IN FORMAT THAT CAN BE COMBINED WITH THE DESTINATION OFFSET */
-	
-	gu2_pattern_origin = (((unsigned long) (x & 7)) << 26) |
-		(((unsigned long) (y & 7)) << 29);
-}
-
-/*---------------------------------------------------------------------------
- * GFX2_SET_SOURCE_TRANSPARENCY
- *
- * This routine sets the source transparency color and mask to be used
- * in future rendering operations.  If both the color and mask are set 
- * to zero (normally completely transparent), those values indicate that
- * transparency should be disabled.
- *---------------------------------------------------------------------------
- */
-#if GFX_2DACCEL_DYNAMIC
-void gu22_set_source_transparency(unsigned long color, unsigned long mask)
-#else
-void gfx2_set_source_transparency(unsigned long color, unsigned long mask)
-#endif
-{
-	/* WRITE REGISTERS TO SPECIFY COLOR TRANSPARENCY */
-
-	GU2_WAIT_PENDING;
-	WRITE_GP32(MGP_SRC_COLOR_FG, color);
-	WRITE_GP32(MGP_SRC_COLOR_BG, mask);
-
-	/* SET TRANSPARENCY FLAG */
-
-	GFXsourceFlags = (color || mask) ? MGP_RM_SRC_TRANS : 0;
-}
-
-/*---------------------------------------------------------------------------
- * GFX2_SET_ALPHA_MODE
- *
- * This routine sets the alpha blending mode to be used in successive 
- * rendering operations.
- *---------------------------------------------------------------------------
- */
-#if GFX_2DACCEL_DYNAMIC
-void gu22_set_alpha_mode(int mode)
-#else
-void gfx2_set_alpha_mode(int mode)
-#endif
-{
-	/* SAVE ALPHA MODE FOR LATER */
-
-	gu2_alpha_mode = mode;
-}
-
-/*---------------------------------------------------------------------------
- * GFX2_SET_ALPHA_VALUE
- *
- * This routine sets the alpha value to be used with certain alpha blending
- * modes (ALPHA_MODE_BLEND).
- *---------------------------------------------------------------------------
- */
-#if GFX_2DACCEL_DYNAMIC
-void gu22_set_alpha_value(unsigned char value)
-#else
-void gfx2_set_alpha_value(unsigned char value)
-#endif
-{
-    /* SAVE ALPHA VALUE TO BE USED LATER */
-
-	gu2_alpha_value = (unsigned long)value;
-
-	/* SET GLOBAL FLAG */
-	/* gfx2_* routines will use this flag to program alpha values */
-	/* appropriately.  Normal gfx_* routines will always write    */
-	/* the current ROP settings.  In this way, the alpha mode     */
-	/* affects only second generation routines.                   */
-
-	gu2_alpha_active = 1;
-
-    switch (gu2_alpha_mode)
-	{
-	    case ALPHA_MODE_BLEND:
-
-			/* GENERATE 32-BIT VERSION OF RASTER MODE REGISTER */
-			/* Pattern data is not involved in the operation.  */
-
-			gu2_alpha32 = gu2_alpha_value | gu2_bpp;
-
-			/* HANDLE SPECIAL CASES FOR ENDPOINTS              */
-			/* The 8-bit hardware alpha value is always        */
-			/* interpreted as a fraction.  Consequently, there */
-			/* is no way to use values of 255 or 0 to exclude  */
-			/* one of the inputs.                              */
-
-			switch (gu2_alpha_value)
-			{
-				/* DESTINATION ONLY                               */
-				/* Operation is alpha * A, where A is destination */
-				/* and alpha is 1.                                */
-			
-			    case 0:   
-					
-					gu2_alpha32 |= MGP_RM_SELECT_ALPHA_1 |
-							       MGP_RM_ALPHA_TIMES_A  |
-								   MGP_RM_ALPHA_TO_RGB   |
-						           MGP_RM_DEST_FROM_CHAN_A;
-					break;
-
-				/* SOURCE ONLY                                    */
-				/* Operation is alpha * A, where A is source and  */
-				/* alpha is 1.                                    */
-
-				case 255: 
-					
-					gu2_alpha32 |= MGP_RM_SELECT_ALPHA_1 |
-								   MGP_RM_ALPHA_TO_RGB   |
-							       MGP_RM_ALPHA_TIMES_A;
-					break;
-
-				/* DEFAULT                                        */
-				/* Operation is alpha * A + (1 - alpha) * B;      */
-			    /* A is source, B is destination and alpha is the */
-				/* programmed 8-bit value.                        */
-
-				default:
-
-					gu2_alpha32 |= MGP_RM_SELECT_ALPHA_R |
-								   MGP_RM_ALPHA_TO_RGB   |
-						           MGP_RM_ALPHA_A_PLUS_BETA_B;
-
-			}
-										 
-			/* CHECK IF SOURCE INFORMATION SHOULD BE MERGED    */
-			/* Alpha value of 0 indicates destination only.    */
-
-			if (gu2_alpha_value != 0)
-				gu2_alpha32 |= GFXsourceFlags;
-
-			/* SET FLAG FOR DESTINATION DATA IF NECESSARY      */
-			/* Alpha value of 255 indicates no destination     */
-	
-			if (gu2_alpha_value != 255)
-			{
-				gu2_alpha_blt_mode = MGP_BM_DST_REQ;
-				gu2_alpha_vec_mode = MGP_VM_DST_REQ;
-			}
-			
-			break;
-	}
-}
-
-/*---------------------------------------------------------------------------
- * GFX2_PATTERN_FILL
- *
- * This routine is similar to the gfx_pattern_fill routine, but allows the
- * use of an arbitrary destination stride.  The rendering position is 
- * also specified as an offset instead of an (x,y) position.
- *---------------------------------------------------------------------------
- */
-#if GFX_2DACCEL_DYNAMIC
-void gu22_pattern_fill(unsigned long dstoffset, unsigned short width, unsigned short height)
-#else
-void gfx2_pattern_fill(unsigned long dstoffset, unsigned short width, unsigned short height)
-#endif
-{
-	unsigned long size;
-	
-	size = (((unsigned long) width) << 16) | height;
-
-	/* POLL UNTIL ABLE TO WRITE TO THE REGISTERS */
-	/* Put off poll for as long as possible (do most calculations first). */
-
-	GU2_WAIT_PENDING;
-	WRITE_GP32(MGP_RASTER_MODE, gu2_rop32);
-	WRITE_GP32(MGP_DST_OFFSET, dstoffset | gu2_pattern_origin);
-	WRITE_GP32(MGP_WID_HEIGHT, size);
-	WRITE_GP32(MGP_STRIDE, gu2_dst_pitch);
-	WRITE_GP16(MGP_BLT_MODE, gu2_blt_mode | gu2_bm_throttle);
-	gu2_bm_throttle = 0;
-	gu2_vm_throttle = 0;
-}
-
-/*---------------------------------------------------------------------------
- * GFX2_COLOR_PATTERN_FILL
- *
- * This routine is used to render a rectangle using the current raster 
- * operation and the specified color pattern.  It allows an 8x8 color 
- * pattern to be rendered without multiple calls to the gfx_set_color_pattern
- * and gfx_pattern_fill routines.
- *---------------------------------------------------------------------------
- */
-#if GFX_2DACCEL_DYNAMIC
-void gu22_color_pattern_fill(unsigned long dstoffset, unsigned short width, unsigned short height, 
-							unsigned long *pattern)
-#else
-void gfx2_color_pattern_fill(unsigned long dstoffset, unsigned short width, unsigned short height, 
-							 unsigned long *pattern)
-#endif
-{
-	int pass;
-	unsigned long lines, size, patxorigin, patoffset;
-	
-	/* ONLY USE HW PATTERN ORIGIN FOR THE X DIRECTION */
-	/* Y direction handled by referencing proper location in pattern data. */
-
-	patxorigin = (gu2_pattern_origin) & 0x1C000000;
-	
-	/* OVERRIDE PATTERN FLAGS IN ROP TO FORCE COLOR PATTERN */
-	
-	GU2_WAIT_PENDING;
- 	WRITE_GP32(MGP_RASTER_MODE, (gu2_rop32 & ~MGP_RM_PAT_FLAGS) | MGP_RM_PAT_COLOR);
-
-	/* ATTEMPT TO OPTIMIZE */
-	/* If possible, we can perform the pattern fill in only a few passes    */
-	/* This is performed by multiplying the pitch by an appropriate amount. */
-	/* Consequently, if the multiplied pitch exceeds 16 bits, this          */
-	/* optimization is impossible.                                          */
-
-	if ((gu2_dst_pitch << (gu2_xshift + 1)) <= 0xFFFF)
-	{
-		/* HANDLE VARIOUS COLOR DEPTHS DIFFERENTLY */
-
-		switch (gu2_xshift)
-		{
-		case 0: /* 8 BPP */
-	
-			/* TWO PASSES FOR 8 BPP */
-			/* Render every other line per pass by doubling the pitch. */
-	
-			patoffset = (gu2_pattern_origin >> 28) & 0x0E;
-			for (pass = 0; pass < 2; pass++)
-			{	
-				/* CAN WRITE SOME PATTERN REGISTERS WHILE "PENDING" */
-	
-				GU2_WAIT_PENDING;
-				WRITE_GP32(MGP_DST_OFFSET, dstoffset | patxorigin);
-				lines = (height + 1 - pass) >> 1;
-				if (!lines) break;
-				size = (((unsigned long) width) << 16) | lines;
-				WRITE_GP32(MGP_WID_HEIGHT, size);
-				WRITE_GP32(MGP_STRIDE, gu2_dst_pitch << 1);
-				WRITE_GP32(MGP_PAT_DATA_1, BYTE_SWIZZLE (pattern[patoffset]));
-				WRITE_GP32(MGP_PAT_DATA_0, BYTE_SWIZZLE (pattern[patoffset+1]));
-				patoffset = (patoffset + 4) & 0x0E;
-				WRITE_GP32(MGP_PAT_COLOR_1, BYTE_SWIZZLE (pattern[patoffset]));
-				WRITE_GP32(MGP_PAT_COLOR_0, BYTE_SWIZZLE (pattern[patoffset+1]));
-				patoffset = (patoffset + 4) & 0x0E;
-		
-				/* NEED TO WAIT UNTIL IDLE FOR COLORS 2 THROUGH 5 */
-				/* Those registers are not pipelined. */
-	
-				GU2_WAIT_BUSY;
-				WRITE_GP32(MGP_PAT_COLOR_3, BYTE_SWIZZLE (pattern[patoffset]));
-				WRITE_GP32(MGP_PAT_COLOR_2, BYTE_SWIZZLE (pattern[patoffset+1]));
-				patoffset = (patoffset + 4) & 0x0E;
-				WRITE_GP32(MGP_PAT_COLOR_5, BYTE_SWIZZLE (pattern[patoffset]));
-				WRITE_GP32(MGP_PAT_COLOR_4, BYTE_SWIZZLE (pattern[patoffset+1]));
-				WRITE_GP16(MGP_BLT_MODE, gu2_blt_mode | gu2_bm_throttle);
-				gu2_bm_throttle = 0;
-				gu2_vm_throttle = 0;
-	
-				/* ADJUST FOR NEXT PASS */
-	
-				dstoffset += gu2_dst_pitch;
-				patoffset = (patoffset + 6) & 0x0E;
-			}
-			break;
-	
-		case 1: /* 12, 15, OR 16 BPP */
-	
-			/* FOUR PASSES FOR 16 BPP */
-			/* Render every 4th line per pass by quadrupling the pitch. */
-	
-			patoffset = (gu2_pattern_origin >> 27) & 0x1C;
-			for (pass = 0; pass < 4; pass++)
-			{
-				/* CAN WRITE SOME PATTERN REGISTERS WHILE "PENDING" */
-	
-				GU2_WAIT_PENDING;
-				WRITE_GP32(MGP_DST_OFFSET, dstoffset | patxorigin);
-				lines = (height + 3 - pass) >> 2;
-				if (!lines) break;
-				size = (((unsigned long) width) << 16) | lines;
-				WRITE_GP32(MGP_WID_HEIGHT, size);
-				WRITE_GP32(MGP_STRIDE, gu2_dst_pitch << 2);
-				WRITE_GP32(MGP_PAT_COLOR_1, WORD_SWIZZLE (pattern[patoffset]));
-				WRITE_GP32(MGP_PAT_COLOR_0, WORD_SWIZZLE (pattern[patoffset+1]));
-				WRITE_GP32(MGP_PAT_DATA_1, WORD_SWIZZLE (pattern[patoffset+2]));
-				WRITE_GP32(MGP_PAT_DATA_0, WORD_SWIZZLE (pattern[patoffset+3]));
-				patoffset = (patoffset + 16) & 0x1C;
-		
-				/* NEED TO WAIT UNTIL IDLE FOR COLORS 2 THROUGH 5 */
-				/* Those registers are not pipelined. */
-	
-				GU2_WAIT_BUSY;
-				WRITE_GP32(MGP_PAT_COLOR_5, WORD_SWIZZLE (pattern[patoffset]));
-				WRITE_GP32(MGP_PAT_COLOR_4, WORD_SWIZZLE (pattern[patoffset+1]));
-				WRITE_GP32(MGP_PAT_COLOR_3, WORD_SWIZZLE (pattern[patoffset+2]));
-				WRITE_GP32(MGP_PAT_COLOR_2, WORD_SWIZZLE (pattern[patoffset+3]));
-				WRITE_GP16(MGP_BLT_MODE, gu2_blt_mode | gu2_bm_throttle);
-				gu2_bm_throttle = 0;
-				gu2_vm_throttle = 0;
-	
-				/* ADJUST FOR NEXT PASS */
-	
-				dstoffset += gu2_dst_pitch;
-				patoffset = (patoffset + 20) & 0x1C;
-			}
-			break;
-	
-		case 2: /* 32 BPP */
-	
-			/* EIGHT PASSES FOR 32 BPP */
-			/* Render every 8th line per pass by setting pitch * 8. */
-	
-			patoffset = (gu2_pattern_origin >> 26) & 0x38;
-			for (pass = 0; pass < 8; pass++)
-			{
-				/* CAN WRITE SOME PATTERN REGISTERS WHILE "PENDING" */
-	
-				GU2_WAIT_PENDING;
-				WRITE_GP32(MGP_DST_OFFSET, dstoffset | patxorigin);
-				lines = (height + 7 - pass) >> 3;
-				if (!lines) break;
-				size = (((unsigned long) width) << 16) | lines;
-				WRITE_GP32(MGP_WID_HEIGHT, size);
-				WRITE_GP32(MGP_STRIDE, gu2_dst_pitch << 3);
-				WRITE_GP32(MGP_PAT_COLOR_1, pattern[patoffset+4]);
-				WRITE_GP32(MGP_PAT_COLOR_0, pattern[patoffset+5]);
-				WRITE_GP32(MGP_PAT_DATA_1, pattern[patoffset+6]);
-				WRITE_GP32(MGP_PAT_DATA_0, pattern[patoffset+7]);
-		
-				/* NEED TO WAIT UNTIL IDLE FOR COLORS 2 THROUGH 5 */
-				/* Those registers are not pipelined. */
-	
-				GU2_WAIT_BUSY;
-				WRITE_GP32(MGP_PAT_COLOR_5, pattern[patoffset]);
-				WRITE_GP32(MGP_PAT_COLOR_4, pattern[patoffset+1]);
-				WRITE_GP32(MGP_PAT_COLOR_3, pattern[patoffset+2]);
-				WRITE_GP32(MGP_PAT_COLOR_2, pattern[patoffset+3]);
-				WRITE_GP16(MGP_BLT_MODE, gu2_blt_mode | gu2_bm_throttle);
-				gu2_bm_throttle = 0;
-				gu2_vm_throttle = 0;
-	
-				/* ADJUST FOR NEXT PASS */
-	
-				dstoffset += gu2_dst_pitch;
-				patoffset = (patoffset + 8) & 0x38;
-			}
-			break;
-		}
-	}
-
-	else
-	{
-		WRITE_GP32 (MGP_STRIDE, gu2_dst_pitch);
-
-		switch (gu2_xshift)
-		{
-		case 0: /* 8 BPP - 4 LINES PER PASS */
-
-			patoffset = (gu2_pattern_origin >> 28) & 0x0E;
-			while (height)
-			{
-				lines = height > 4 ? 4 : height;
-
-				/* CAN WRITE SOME REGISTERS WHILE PENDING */
-
-				WRITE_GP32(MGP_DST_OFFSET, dstoffset | patxorigin);
-				WRITE_GP32(MGP_WID_HEIGHT, (((unsigned long) width) << 16) | lines);
-				WRITE_GP32(MGP_PAT_DATA_1,  BYTE_SWIZZLE (pattern[patoffset]));
-				WRITE_GP32(MGP_PAT_DATA_0,  BYTE_SWIZZLE (pattern[patoffset + 1]));
-				patoffset = (patoffset + 2) & 0x0E;
-				WRITE_GP32(MGP_PAT_COLOR_1, BYTE_SWIZZLE (pattern[patoffset]));
-				WRITE_GP32(MGP_PAT_COLOR_0, BYTE_SWIZZLE (pattern[patoffset + 1]));
-				patoffset = (patoffset + 2) & 0x0E;
-				
-				/* NEED TO WAIT UNTIL IDLE FOR COLORS 2 THROUGH 5 */
-				/* Those registers are not pipelined.             */
-
-				GU2_WAIT_BUSY;
-				WRITE_GP32(MGP_PAT_COLOR_3, BYTE_SWIZZLE (pattern[patoffset]));
-				WRITE_GP32(MGP_PAT_COLOR_2, BYTE_SWIZZLE (pattern[patoffset + 1]));
-				patoffset = (patoffset + 2) & 0x0E;
-				WRITE_GP32(MGP_PAT_COLOR_5, BYTE_SWIZZLE (pattern[patoffset]));
-				WRITE_GP32(MGP_PAT_COLOR_4, BYTE_SWIZZLE (pattern[patoffset + 1]));
-				patoffset = (patoffset + 2) & 0x0E;
-				WRITE_GP16(MGP_BLT_MODE, gu2_blt_mode | gu2_bm_throttle);
-
-				/* ADJUST FOR NEXT PASS */
-
-				dstoffset += gu2_dst_pitch << 2;
-				height -= (unsigned short)lines;
-			}
-			break;
-
-		case 1: /* 12, 15 AND 16 BPP - 2 LINES PER PASS */
-	
-			patoffset = (gu2_pattern_origin >> 27) & 0x1C;
-			while (height)
-			{
-				lines = height > 2 ? 2 : height;
-
-				/* CAN WRITE SOME REGISTERS WHILE PENDING */
-
-				WRITE_GP32(MGP_DST_OFFSET, dstoffset | patxorigin);
-				WRITE_GP32(MGP_WID_HEIGHT, (((unsigned long) width) << 16) | lines);
-				WRITE_GP32(MGP_PAT_COLOR_1, WORD_SWIZZLE (pattern[patoffset]));
-				WRITE_GP32(MGP_PAT_COLOR_0, WORD_SWIZZLE (pattern[patoffset + 1]));
-				WRITE_GP32(MGP_PAT_DATA_1,  WORD_SWIZZLE (pattern[patoffset + 2]));
-				WRITE_GP32(MGP_PAT_DATA_0,  WORD_SWIZZLE (pattern[patoffset + 3]));
-				patoffset = (patoffset + 4) & 0x1C;
-				
-				/* NEED TO WAIT UNTIL IDLE FOR COLORS 2 THROUGH 5 */
-				/* Those registers are not pipelined.             */
-
-				GU2_WAIT_BUSY;
-				WRITE_GP32(MGP_PAT_COLOR_5, WORD_SWIZZLE (pattern[patoffset]));
-				WRITE_GP32(MGP_PAT_COLOR_4, WORD_SWIZZLE (pattern[patoffset + 1]));
-				WRITE_GP32(MGP_PAT_COLOR_3, WORD_SWIZZLE (pattern[patoffset + 2]));
-				WRITE_GP32(MGP_PAT_COLOR_2, WORD_SWIZZLE (pattern[patoffset + 3]));
-				patoffset = (patoffset + 4) & 0x1C;
-				WRITE_GP16(MGP_BLT_MODE, gu2_blt_mode | gu2_bm_throttle);
-
-				/* ADJUST FOR NEXT PASS */
-
-				dstoffset += gu2_dst_pitch << 1;
-				height -= (unsigned short)lines;
-			}
-			break;
-
-		case 2: /* 32 BPP - 1 LINE PER PASS */
-	
-			patoffset = (gu2_pattern_origin >> 26) & 0x38;
-			while (height)
-			{
-				/* CAN WRITE SOME REGISTERS WHILE PENDING */
-
-				WRITE_GP32(MGP_DST_OFFSET, dstoffset | patxorigin);
-				WRITE_GP32(MGP_WID_HEIGHT, (((unsigned long) width) << 16) | 1l);
-				WRITE_GP32(MGP_PAT_COLOR_1, pattern[patoffset + 4]);
-				WRITE_GP32(MGP_PAT_COLOR_0, pattern[patoffset + 5]);
-				WRITE_GP32(MGP_PAT_DATA_1,  pattern[patoffset + 6]);
-				WRITE_GP32(MGP_PAT_DATA_0,  pattern[patoffset + 7]);
-				
-				/* NEED TO WAIT UNTIL IDLE FOR COLORS 2 THROUGH 5 */
-				/* Those registers are not pipelined.             */
-
-				GU2_WAIT_BUSY;
-				WRITE_GP32(MGP_PAT_COLOR_5, pattern[patoffset]);
-				WRITE_GP32(MGP_PAT_COLOR_4, pattern[patoffset + 1]);
-				WRITE_GP32(MGP_PAT_COLOR_3, pattern[patoffset + 2]);
-				WRITE_GP32(MGP_PAT_COLOR_2, pattern[patoffset + 3]);
-				patoffset = (patoffset + 8) & 0x38;
-				WRITE_GP16(MGP_BLT_MODE, gu2_blt_mode | gu2_bm_throttle);
-
-				/* ADJUST FOR NEXT PASS */
-
-				dstoffset += gu2_dst_pitch ;
-				height--;
-			}
-			break;
-		}
-
-	}
-
-}
-
-/*---------------------------------------------------------------------------
- * GFX2_SCREEN_TO_SCREEN_BLT
- *
- * This routine is similar to the gfx_screen_to_screen_blt routine but
- * allows the use of arbitrary source and destination strides and alpha
- * blending.  It also allows the use of an arbitrary ROP with transparency.
- *---------------------------------------------------------------------------
- */
-#if GFX_2DACCEL_DYNAMIC
-void gu22_screen_to_screen_blt(unsigned long srcoffset, unsigned long dstoffset, 
-							  unsigned short width, unsigned short height, int flags)
-#else
-void gfx2_screen_to_screen_blt(unsigned long srcoffset, unsigned long dstoffset, 
-							   unsigned short width, unsigned short height, int flags)
-#endif
-{
-	unsigned long size, xbytes;
-	unsigned short blt_mode;
-	size = (((unsigned long) width) << 16) | height;
-
-	/* USE ALPHA SETTINGS, IF REQUESTED */
-	
-	if (gu2_alpha_active)
-		blt_mode = gu2_alpha_blt_mode | MGP_BM_SRC_FB;
-
-	else
-	    blt_mode = gu2_blt_mode | MGP_BM_SRC_FB;
-
-		
-	/* CALCULATE THE DIRECTION OF THE BLT */
-    /* Using offsets, so flags from the calling routine are needed. */
-		
-	if (flags & 1)
-	{
-		xbytes = (width - 1) << gu2_xshift;
-		srcoffset += xbytes;
-		dstoffset += xbytes;
-		blt_mode |= MGP_BM_NEG_XDIR;
-	}
-	if (flags & 2)
-	{
-		srcoffset += (height - 1) * gu2_src_pitch;
-		dstoffset += (height - 1) * gu2_dst_pitch;
-		blt_mode |= MGP_BM_NEG_YDIR;
-	}
-	
-	/* TURN INTO BYTE ADDRESS IF NEGATIVE X DIRECTION */
-	/* This is a quirk of the hardware. */
-
-	if (blt_mode & MGP_BM_NEG_XDIR)
-	{
-		srcoffset += (1 << gu2_xshift) - 1;
-		dstoffset += (1 << gu2_xshift) - 1;
-	}
-
-	/* POLL UNTIL ABLE TO WRITE TO THE REGISTERS */
-	/* Put off poll for as long as possible (do most calculations first). */
-
-	GU2_WAIT_PENDING;
-
-	if (gu2_alpha_active) 
-	{
-		WRITE_GP32(MGP_RASTER_MODE, gu2_alpha32);
-	}
-	else
-	{
-		WRITE_GP32(MGP_RASTER_MODE, gu2_rop32);
-	}
-
-	WRITE_GP32(MGP_SRC_OFFSET, srcoffset);
-	WRITE_GP32(MGP_DST_OFFSET, dstoffset | gu2_pattern_origin);
-	WRITE_GP32(MGP_WID_HEIGHT, size);
-	WRITE_GP32(MGP_STRIDE, gu2_dst_pitch | (gu2_src_pitch << 16));
-	WRITE_GP16(MGP_BLT_MODE, blt_mode | gu2_bm_throttle);
-	gu2_bm_throttle = 0;
-	gu2_vm_throttle = 0;
-}
-
-/*---------------------------------------------------------------------------
- * GFX2_MONO_EXPAND_BLT
- *
- * This routine is similar to the gfx2_screen_to_screen_blt routine but
- * expands monochrome data stored in graphics memory.  
- * WARNING: This routine assumes that the regions in graphics memory 
- * will not overlap, and therefore does not check the BLT direction.
- *---------------------------------------------------------------------------
- */
-#if GFX_2DACCEL_DYNAMIC
-void gu22_mono_expand_blt(unsigned long srcbase, unsigned short srcx, unsigned short srcy, 
-						 unsigned long dstoffset, unsigned short width, unsigned short height, 
-						 int byte_packed)
-#else
-void gfx2_mono_expand_blt(unsigned long srcbase, unsigned short srcx, unsigned short srcy, 
-						  unsigned long dstoffset, unsigned short width, unsigned short height, 
-						  int byte_packed)
-#endif
-{
-	unsigned long size, srcoffset;
-	unsigned short blt_mode;
-
-	size = (((unsigned long) width) << 16) | height;
-
-	/* CALCULATE SOURCE OFFSET */
-
-	srcoffset = srcbase + (unsigned long) srcy * gu2_src_pitch;
-	srcoffset += srcx >> 3;
-	srcoffset |= ((unsigned long) srcx & 7) << 26; 
-
-	/* POLL UNTIL ABLE TO WRITE TO THE REGISTERS */
-	/* Put off poll for as long as possible (do most calculations first). */
-
-	GU2_WAIT_PENDING;
-
-	if (gu2_alpha_active)
-	{
-		blt_mode = gu2_alpha_blt_mode;
-
-		WRITE_GP32(MGP_RASTER_MODE, gu2_alpha32);
-	}
-	else
-	{
-		blt_mode = gu2_blt_mode;
-
-		WRITE_GP32(MGP_RASTER_MODE, gu2_rop32);
-	}
-
-	if (byte_packed) blt_mode |= MGP_BM_SRC_FB | MGP_BM_SRC_BP_MONO | gu2_bm_throttle;
-	else             blt_mode |= MGP_BM_SRC_FB | MGP_BM_SRC_MONO    | gu2_bm_throttle;
-
-	WRITE_GP32(MGP_SRC_OFFSET, srcoffset);
-	WRITE_GP32(MGP_DST_OFFSET, dstoffset | gu2_pattern_origin);
-	WRITE_GP32(MGP_WID_HEIGHT, size);
-	WRITE_GP32(MGP_STRIDE, gu2_dst_pitch | (gu2_src_pitch << 16));
-	WRITE_GP16(MGP_BLT_MODE, blt_mode);
-	gu2_bm_throttle = 0;
-	gu2_vm_throttle = 0;
-}
-
-/*---------------------------------------------------------------------------
- * GFX2_COLOR_BITMAP_TO_SCREEN_BLT	
- *
- * This routine is similar to the gfx_color_bitmap_to_screen_blt routine 
- * but allows the use of an arbitrary destination stride and alpha blending.
- * It also allows the use of an arbitrary ROP with transparency.
- *---------------------------------------------------------------------------
- */
-#if GFX_2DACCEL_DYNAMIC
-void gu22_color_bitmap_to_screen_blt(unsigned short srcx, unsigned short srcy, 
-									unsigned long dstoffset, unsigned short width, 
-									unsigned short height, unsigned char *data, unsigned short pitch)
-#else
-void gfx2_color_bitmap_to_screen_blt(unsigned short srcx, unsigned short srcy, 
-									 unsigned long dstoffset, unsigned short width, 
-									 unsigned short height, unsigned char *data, unsigned short pitch)
-#endif
-{
-	unsigned long size, bytes;
-	unsigned long offset, temp_offset;
-	unsigned long srcoffset, dword_bytes, bytes_extra;
-	unsigned short blt_mode;
-
-	size = (((unsigned long) width) << 16) | 1;
-	
-	/* CALCULATE STARTING OFFSETS */
-
-	offset = (unsigned long) srcy * pitch + ((unsigned long)srcx << gu2_xshift);
-
-	dstoffset |= gu2_pattern_origin;
-
-	bytes = width << gu2_xshift;
-	dword_bytes = bytes & ~0x3L;
-	bytes_extra = bytes &  0x3L;
-
-	/* POLL UNTIL ABLE TO WRITE TO THE REGISTERS */
-	/* Put off poll for as long as possible (do most calculations first).   */
-	/* The source offset is always 0 since we allow misaligned dword reads. */
-	/* We must wait for BLT busy because the GP may be executing a screen   */
-	/* to screen BLT from the scratchpad area.                              */
-
-	GU2_WAIT_BUSY;
-
-	if (gu2_alpha_active)
-	{
-		blt_mode = gu2_alpha_blt_mode;
-
-		WRITE_GP32(MGP_RASTER_MODE, gu2_alpha32);
-	}
-	else
-	{
-		blt_mode = gu2_blt_mode;
-
-		WRITE_GP32(MGP_RASTER_MODE, gu2_rop32);
-	}
-	blt_mode |= MGP_BM_SRC_FB | gu2_bm_throttle;
-	gu2_bm_throttle = 0;
-	gu2_vm_throttle = 0;
-
-	WRITE_GP32(MGP_WID_HEIGHT, size);
-	
-	/* WRITE DATA ONE LINE AT A TIME */
-	/* For speed reasons, data is written to an offscreen scratch area and then        */
-	/* BLTed using a screen to screen BLT. This is similar to the GX1 BLT buffers, but */
-	/* slightly more efficient in that we can queue up data while the GP is rendering  */
-	/* a line.                                                                         */
-
-	while (height--)
-	{
-		temp_offset = offset;
-		srcoffset   = gfx_gx2_scratch_base;
-		if (gu2_current_line)
-			srcoffset += 8192;
-	
-		GU2_WAIT_PENDING;
-		WRITE_GP32 (MGP_SRC_OFFSET, srcoffset);
-		WRITE_GP32 (MGP_DST_OFFSET, dstoffset);
-		dstoffset += gu2_dst_pitch;
-		dstoffset += 0x20000000;
-
-		WRITE_FRAME_BUFFER_STRING32 (srcoffset, dword_bytes, data, temp_offset);
-		if (bytes_extra)
-		{
-			temp_offset += dword_bytes;
-			srcoffset   += dword_bytes;
-			WRITE_FRAME_BUFFER_STRING8  (srcoffset, bytes_extra, data, temp_offset);
-		}
-		WRITE_GP16 (MGP_BLT_MODE, blt_mode);
-		offset += pitch;
-		gu2_current_line = 1 - gu2_current_line;
-	}
-}
-
-/*---------------------------------------------------------------------------
- * GFX2_TEXT_BLT	
- *
- * This routine is similar to the gfx2_mono_bitmap_to_screen_blt routine 
- * but assumes that source data is byte-packed.
- *---------------------------------------------------------------------------
- */
-#if GFX_2DACCEL_DYNAMIC
-void gu22_text_blt(unsigned long dstoffset, unsigned short width, unsigned short height, 
-				   unsigned char *data)
-#else
-void gfx2_text_blt(unsigned long dstoffset, unsigned short width, unsigned short height, 
-				   unsigned char *data)
-#endif
-{
-	unsigned long size, bytes;
-	unsigned long temp1 = 0, temp2 = 0, temp_offset = 0;
-	unsigned long i, j = 0, fifo_lines, dwords_extra, bytes_extra;
-	unsigned long shift;
-	unsigned short blt_mode;
-
-	size = (((unsigned long) width) << 16) | height;
-
-	/* CALCULATE STARTING OFFSETS */
-
-	bytes = ((width + 7) >> 3) * height;
-	fifo_lines   =  bytes >> 5;
-	dwords_extra = (bytes & 0x0000001Cl) >> 2;
-	bytes_extra  =  bytes & 0x00000003l;
-
-	/* POLL UNTIL ABLE TO WRITE TO THE REGISTERS */
-	
-	GU2_WAIT_PENDING;
-
-	if (gu2_alpha_active)
-	{
-		blt_mode = gu2_alpha_blt_mode;
-
-		WRITE_GP32(MGP_RASTER_MODE, gu2_alpha32);
-	}
-	else
-	{
-		blt_mode = gu2_blt_mode;
-
-		WRITE_GP32(MGP_RASTER_MODE, gu2_rop32);
-	}
-
-	WRITE_GP32(MGP_SRC_OFFSET, 0); 
-	WRITE_GP32(MGP_DST_OFFSET, dstoffset | gu2_pattern_origin);
-	WRITE_GP32(MGP_WID_HEIGHT, size);
-	WRITE_GP32(MGP_STRIDE, gu2_dst_pitch);
-	WRITE_GP16(MGP_BLT_MODE, blt_mode | MGP_BM_SRC_HOST | 
-		MGP_BM_SRC_BP_MONO | gu2_bm_throttle);
-	gu2_bm_throttle = 0;
-	gu2_vm_throttle = 0;
-
-	/* WAIT FOR BLT TO BE LATCHED */
-
-	GU2_WAIT_PENDING;
-
-	/* WRITE ALL FULL FIFO LINES */
-
-	for (i = 0; i < fifo_lines; i++)
-	{
-		GU2_WAIT_HALF_EMPTY;
-		WRITE_GPREG_STRING32 (MGP_HST_SOURCE, 8, j, data, temp_offset, temp1);
-		temp_offset += 32;
-	}
-
-	/* WRITE ALL FULL DWORDS */
-
-	if (dwords_extra || bytes_extra)
-	{
-		GU2_WAIT_HALF_EMPTY;
-		if (dwords_extra)
-		{
-			WRITE_GPREG_STRING32 (MGP_HST_SOURCE, dwords_extra, i, data, temp_offset, temp1);
-			temp_offset += (dwords_extra << 2);
-		}
-		if (bytes_extra)
-		{
-			shift = 0;
-			WRITE_GPREG_STRING8 (MGP_HST_SOURCE, bytes_extra, shift, i, data, temp_offset, temp1, temp2);
-		}
-	}
-}
-
-/*---------------------------------------------------------------------------
- * GFX2_MONO_BITMAP_TO_SCREEN_BLT	
- *
- * This routine is similar to the gfx_mono_bitmap_to_screen_blt routine 
- * but allows the use of an arbitrary destination stride and alpha blending.
- *---------------------------------------------------------------------------
- */
-#if GFX_2DACCEL_DYNAMIC
-void gu22_mono_bitmap_to_screen_blt(unsigned short srcx, unsigned short srcy, 
-								   unsigned long dstoffset, unsigned short width, 
-								   unsigned short height, unsigned char *data, unsigned short pitch)
-#else
-void gfx2_mono_bitmap_to_screen_blt(unsigned short srcx, unsigned short srcy, 
-									unsigned long dstoffset, unsigned short width, 
-									unsigned short height, unsigned char *data, unsigned short pitch)
-#endif
-{
-	unsigned long size, bytes;
-	unsigned long offset, temp_offset, temp1 = 0, temp2 = 0;
-	unsigned long i, j = 0, fifo_lines, dwords_extra, bytes_extra;
-	unsigned long shift = 0;
-	unsigned short blt_mode;
-
-	size = (((unsigned long) width) << 16) | height;
-
-	/* CALCULATE STARTING OFFSETS */
-
-	offset = (unsigned long) srcy * pitch + ((unsigned long)srcx >> 3);
-
-	bytes = ((srcx & 7) + width + 7) >> 3;
-	fifo_lines   =  bytes >> 5;
-	dwords_extra = (bytes & 0x0000001Cl) >> 2;
-	bytes_extra  =  bytes & 0x00000003l;
-
-	/* POLL UNTIL ABLE TO WRITE TO THE REGISTERS */
-	
-	GU2_WAIT_PENDING;
-
-	if (gu2_alpha_active)
-	{
-		blt_mode = gu2_alpha_blt_mode;
-
-		WRITE_GP32(MGP_RASTER_MODE, gu2_alpha32);
-	}
-	else
-	{
-		blt_mode = gu2_blt_mode;
-
-		WRITE_GP32(MGP_RASTER_MODE, gu2_rop32);
-	}
-
-	WRITE_GP32(MGP_SRC_OFFSET, ((unsigned long) srcx & 7) << 26); 
-	WRITE_GP32(MGP_DST_OFFSET, dstoffset | gu2_pattern_origin);
-	WRITE_GP32(MGP_WID_HEIGHT, size);
-	WRITE_GP32(MGP_STRIDE, gu2_dst_pitch);
-	WRITE_GP16(MGP_BLT_MODE, blt_mode | MGP_BM_SRC_HOST | 
-		MGP_BM_SRC_MONO | gu2_bm_throttle);
-	gu2_bm_throttle = 0;
-	gu2_vm_throttle = 0;
-
-	/* WAIT FOR BLT TO BE LATCHED */
-
-	GU2_WAIT_PENDING;
-
-	/* WRITE ALL OF THE DATA TO THE HOST SOURCE REGISTER */
-
-	while (height--)
-	{
-		temp_offset = offset;
-
-		/* WRITE ALL FULL FIFO LINES */
-
-		for (i = 0; i < fifo_lines; i++)
-		{
-			GU2_WAIT_HALF_EMPTY;
-			WRITE_GPREG_STRING32 (MGP_HST_SOURCE, 8, j, data, temp_offset, temp1);
-			temp_offset += 32;
-		}
-
-		/* WRITE ALL FULL DWORDS */
-
-		GU2_WAIT_HALF_EMPTY;
-		if (dwords_extra)
-			WRITE_GPREG_STRING32 (MGP_HST_SOURCE, dwords_extra, i, data, temp_offset, temp1);
-		temp_offset += (dwords_extra << 2);
-
-		/* WRITE REMAINING BYTES */
-
-		shift = 0;
-		if (bytes_extra)
-			WRITE_GPREG_STRING8 (MGP_HST_SOURCE, bytes_extra, shift, i, data, temp_offset, temp1, temp2);
-
-		offset += pitch;
-	}
-}
-
-/*---------------------------------------------------------------------------
- * GFX2_BRESENHAM_LINE
- *
- * This routine is similar to the gfx_bresenam_line routine but allows 
- * the use of an arbitrary destination stride.
- *---------------------------------------------------------------------------
- */
-#if GFX_2DACCEL_DYNAMIC
-void gu22_bresenham_line(unsigned long dstoffset, 
-	unsigned short length, unsigned short initerr, 
-	unsigned short axialerr, unsigned short diagerr, 
-	unsigned short flags)
-#else
-void gfx2_bresenham_line(unsigned long dstoffset, 
-	unsigned short length, unsigned short initerr, 
-	unsigned short axialerr, unsigned short diagerr, 
-	unsigned short flags)
-#endif
-{
-	unsigned long vector_mode = gu2_vector_mode | flags;
-	unsigned long data1 = (((unsigned long) axialerr) << 16) | diagerr;
-	unsigned long data2 = (((unsigned long) length) << 16) | initerr;
-
-	/* CHECK NULL LENGTH */
-
-	if (!length) return;
-
-	/* POLL UNTIL ABLE TO WRITE TO THE REGISTERS */
-	/* Put off poll for as long as possible (do most calculations first). */
-
-	GU2_WAIT_PENDING;
-
-	if (gu2_alpha_active)
-	{
-		vector_mode = gu2_alpha_vec_mode | flags;
-
-		WRITE_GP32(MGP_RASTER_MODE, gu2_alpha32);
-	}
-	else
-		WRITE_GP32(MGP_RASTER_MODE, gu2_rop32);
-
-
-	WRITE_GP32(MGP_DST_OFFSET, dstoffset | gu2_pattern_origin);
-	WRITE_GP32(MGP_VEC_ERR, data1);
-	WRITE_GP32(MGP_VEC_LEN, data2);
-	WRITE_GP32(MGP_STRIDE, gu2_dst_pitch);
-	WRITE_GP32(MGP_VECTOR_MODE, vector_mode | gu2_vm_throttle);
-	gu2_bm_throttle = 0;
-	gu2_vm_throttle = 0;
-}
-
-/*---------------------------------------------------------------------------
- * GFX2_SYNC_TO_VBLANK
- *
- * This routine sets a flag to synchronize the next rendering routine to 
- * VBLANK.  The flag is cleared by the rendering routine.
- *---------------------------------------------------------------------------
- */
-#if GFX_2DACCEL_DYNAMIC
-void gu22_sync_to_vblank(void)
-#else
-void gfx2_sync_to_vblank(void)
-#endif
-{
-	/* SET FLAGS TO THROTTLE NEXT RENDERING ROUTINE */
-
-	gu2_bm_throttle = MGP_BM_THROTTLE;
-	gu2_vm_throttle = MGP_VM_THROTTLE;
-}
-
-/* END OF FILE */
-
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/saa7114.c b/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/saa7114.c
deleted file mode 100644
index 31d48abe3..000000000
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/saa7114.c
+++ /dev/null
@@ -1,916 +0,0 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/saa7114.c,v 1.1 2002/10/11 14:33:01 alanh Exp $ */
-/*
- * $Workfile: saa7114.c $
- *
- * This file contains routines to control the Philips SAA7114 video decoder.
- *
- * NSC_LIC_ALTERNATIVE_PREAMBLE
- *
- * Revision 1.0
- *
- * National Semiconductor Alternative GPL-BSD License
- *
- * National Semiconductor Corporation licenses this software 
- * ("Software"):
- *
- *      Durango
- *
- * under one of the two following licenses, depending on how the 
- * Software is received by the Licensee.
- * 
- * If this Software is received as part of the Linux Framebuffer or
- * other GPL licensed software, then the GPL license designated 
- * NSC_LIC_GPL applies to this Software; in all other circumstances 
- * then the BSD-style license designated NSC_LIC_BSD shall apply.
- *
- * END_NSC_LIC_ALTERNATIVE_PREAMBLE */
-
-/* NSC_LIC_BSD
- *
- * National Semiconductor Corporation Open Source License for Durango
- *
- * (BSD License with Export Notice)
- *
- * Copyright (c) 1999-2001
- * National Semiconductor Corporation.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without 
- * modification, are permitted provided that the following conditions 
- * are met: 
- *
- *   * Redistributions of source code must retain the above copyright 
- *     notice, this list of conditions and the following disclaimer. 
- *
- *   * Redistributions in binary form must reproduce the above 
- *     copyright notice, this list of conditions and the following 
- *     disclaimer in the documentation and/or other materials provided 
- *     with the distribution. 
- *
- *   * Neither the name of the National Semiconductor Corporation nor 
- *     the names of its contributors may be used to endorse or promote 
- *     products derived from this software without specific prior 
- *     written permission. 
- * 
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
- * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
- * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE,
- * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
- * OF SUCH DAMAGE.
- *
- * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
- * YOUR JURISDICTION. It is licensee's responsibility to comply with 
- * any export regulations applicable in licensee's jurisdiction. Under 
- * CURRENT (2001) U.S. export regulations this software 
- * is eligible for export from the U.S. and can be downloaded by or 
- * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
- * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
- * Syria, Sudan, Afghanistan and any other country to which the U.S. 
- * has embargoed goods and services. 
- *
- * END_NSC_LIC_BSD */
-
-/* NSC_LIC_GPL
- *
- * National Semiconductor Corporation Gnu General Public License for Durango
- *
- * (GPL License with Export Notice)
- *
- * Copyright (c) 1999-2001
- * National Semiconductor Corporation.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without 
- * modification, are permitted under the terms of the GNU General 
- * Public License as published by the Free Software Foundation; either 
- * version 2 of the License, or (at your option) any later version  
- *
- * In addition to the terms of the GNU General Public License, neither 
- * the name of the National Semiconductor Corporation nor the names of 
- * its contributors may be used to endorse or promote products derived 
- * from this software without specific prior written permission. 
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
- * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
- * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, 
- * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
- * OF SUCH DAMAGE. See the GNU General Public License for more details. 
- *
- * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
- * YOUR JURISDICTION. It is licensee's responsibility to comply with 
- * any export regulations applicable in licensee's jurisdiction. Under 
- * CURRENT (2001) U.S. export regulations this software 
- * is eligible for export from the U.S. and can be downloaded by or 
- * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
- * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
- * Syria, Sudan, Afghanistan and any other country to which the U.S. 
- * has embargoed goods and services. 
- *
- * You should have received a copy of the GNU General Public License 
- * along with this file; if not, write to the Free Software Foundation, 
- * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 
- *
- * END_NSC_LIC_GPL */
-
-
-/*---------------------------*/
-/*  TABLE OF DEFAULT VALUES  */
-/*---------------------------*/
-
-typedef struct tagGFX_SAA7114_INIT
-{
-	unsigned char index;
-	unsigned char value;
-} GFX_SAA7114_INIT;
-
-/* Task A is for VBI raw data and task B is for video */
-
-GFX_SAA7114_INIT gfx_saa7114_init_values[] = {
-	{ 0x01, 0x08 }, { 0x02, 0xC0 }, { 0x03, 0x00 }, { 0x04, 0x90 }, 
-	{ 0x05, 0x90 }, { 0x06, 0xEB }, { 0x07, 0xE0 }, { 0x08, 0x88 }, 
-	{ 0x09, 0x40 }, { 0x0A, 0x80 }, { 0x0B, 0x44 }, { 0x0C, 0x40 }, 
-	{ 0x0D, 0x00 }, { 0x0E, 0x89 }, { 0x0F, 0x2E }, { 0x10, 0x0E }, 
-	{ 0x11, 0x00 }, { 0x12, 0x05 }, { 0x13, 0x00 }, { 0x14, 0x08 }, 
-	{ 0x15, 0x11 }, { 0x16, 0xFE }, { 0x17, 0x00 }, { 0x18, 0x40 }, 
-	{ 0x19, 0x80 }, { 0x30, 0xBC }, { 0x31, 0xDF }, { 0x32, 0x02 }, 
-	{ 0x34, 0xCD }, { 0x35, 0xCC }, { 0x36, 0x3A }, { 0x38, 0x03 },
-	{ 0x39, 0x10 }, { 0x3A, 0x00 }, { 0x40, 0x00 }, { 0x41, 0xFF }, 
-	{ 0x42, 0xFF }, { 0x43, 0xFF }, { 0x44, 0xFF }, { 0x45, 0xFF }, 
-	{ 0x46, 0xFF }, { 0x47, 0xFF }, { 0x48, 0xFF }, { 0x49, 0xFF },
-	{ 0x4A, 0xFF }, { 0x4B, 0xFF }, { 0x4C, 0xFF }, { 0x4D, 0xFF },
-	{ 0x4E, 0xFF }, { 0x4F, 0xFF }, { 0x50, 0xFF }, { 0x51, 0xFF },
-	{ 0x52, 0xFF }, { 0x53, 0xFF }, { 0x54, 0xFF }, { 0x55, 0xFF },
-	{ 0x56, 0xFF }, { 0x57, 0xFF }, { 0x58, 0x00 }, { 0x59, 0x47 },
-	{ 0x5A, 0x06 }, { 0x5B, 0x43 }, { 0x5D, 0x3E }, { 0x5E, 0x00 },
-	{ 0x80, 0x30 }, { 0x83, 0x00 }, { 0x84, 0x60 }, { 0x85, 0x00 }, 
-	{ 0x86, 0xE5 }, { 0x87, 0x01 }, { 0x88, 0xF8 },
-	
-	/* VBI task */
-	
-	{ 0x90, 0x01 }, { 0x91, 0xC8 }, { 0x92, 0x08 }, { 0x93, 0x84 },
-	{ 0x94, 0x10 }, { 0x95, 0x00 }, { 0x96, 0xD0 }, { 0x97, 0x02 },
-	{ 0x98, 0x05 }, { 0x99, 0x00 }, { 0x9A, 0x0B }, { 0x9B, 0x00 },
-	{ 0x9C, 0xA0 }, { 0x9D, 0x05 }, { 0x9E, 0x0B }, { 0x9F, 0x00 },
-	{ 0xA0, 0x01 }, { 0xA1, 0x00 }, { 0xA2, 0x00 }, { 0xA4, 0x80 },
-	{ 0xA5, 0x40 }, { 0xA6, 0x40 }, { 0xA8, 0x00 }, { 0xA9, 0x02 },
-	{ 0xAA, 0x00 }, { 0xAC, 0x00 }, { 0xAD, 0x01 }, { 0xAE, 0x00 },
-	{ 0xB0, 0x00 }, { 0xB1, 0x04 }, { 0xB2, 0x00 }, { 0xB3, 0x04 },
-	{ 0xB4, 0x00 }, { 0xB8, 0x00 }, { 0xB9, 0x00 }, { 0xBA, 0x00 },
-	{ 0xBB, 0x00 }, { 0xBC, 0x00 }, { 0xBD, 0x00 }, { 0xBE, 0x00 },
-	{ 0xBF, 0x00 },
-
-	/* Video task */
-	
-	{ 0xC0, 0x80 }, { 0xC1, 0x08 }, { 0xC2, 0x00 }, { 0xC3, 0x80 },
-	{ 0xC4, 0x10 }, { 0xC5, 0x00 }, { 0xC6, 0xD0 }, { 0xC7, 0x02 },
-	{ 0xC8, 0x11 }, { 0xC9, 0x00 }, { 0xCA, 0xF1 }, { 0xCB, 0x00 }, 
-	{ 0xCC, 0xD0 }, { 0xCD, 0x02 }, { 0xCE, 0xF1 }, { 0xCF, 0x00 },
-	{ 0xD0, 0x01 }, { 0xD1, 0x00 }, { 0xD2, 0x00 }, { 0xD4, 0x80 },
-	{ 0xD5, 0x40 }, { 0xD6, 0x40 }, { 0xD8, 0x00 }, { 0xD9, 0x04 },
-	{ 0xDA, 0x00 }, { 0xDC, 0x00 }, { 0xDD, 0x02 }, { 0xDE, 0x00 },
-	{ 0xE0, 0x00 }, { 0xE1, 0x04 }, { 0xE2, 0x00 }, { 0xE3, 0x04 },
-	{ 0xE4, 0x00 }, { 0xE8, 0x00 }, { 0xE9, 0x00 }, { 0xEA, 0x00 },
-	{ 0xEB, 0x00 }, { 0xEC, 0x00 }, { 0xED, 0x00 }, { 0xEE, 0x00 }, 
-	{ 0xEF, 0x00 },
-};
-
-#define GFX_NUM_SAA7114_INIT_VALUES sizeof(gfx_saa7114_init_values)/sizeof(GFX_SAA7114_INIT)
-
-/*-----------------------------------------------------*/
-/*	  TABLE OF FIR PREFILTER RECOMMENDED VALUES        */
-/*-----------------------------------------------------*/
-
-int optimize_for_aliasing = 0;
-
-typedef struct tagGFX_SAA7114_FIR_PREFILTER
-{
-	unsigned char prescaler;
-	unsigned char acl_low;
-	unsigned char prefilter_low;
-	unsigned char acl_high;	
-	unsigned char prefilter_high;
-} GFX_SAA7114_FIR_PREFILTER;
-
-GFX_SAA7114_FIR_PREFILTER gfx_saa7114_fir_values[] = {
-	{ 0x01, 0x00, 0x00, 0x00, 0x00 }, { 0x02, 0x02, 0x5A, 0x01, 0x51 },
-	{ 0x03, 0x04, 0xAB, 0x03, 0xA2 }, { 0x04, 0x07, 0xA3, 0x04, 0xAB },
-	{ 0x05, 0x08, 0xAC, 0x07, 0xA3 }, { 0x06, 0x08, 0xFC, 0x07, 0xF3 }, 
-	{ 0x07, 0x08, 0xFC, 0x07, 0xF3 }, { 0x08, 0x0F, 0xF4, 0x08, 0xFC }, 
-	{ 0x09, 0x0F, 0xF4, 0x08, 0xFC }, { 0x0A, 0x10, 0xFD, 0x08, 0xFC },
-	{ 0x0B, 0x10, 0xFD, 0x08, 0xFC }, { 0x0C, 0x10, 0xFD, 0x08, 0xFC },
-	{ 0x0D, 0x10, 0xFD, 0x10, 0xFD }, { 0x0E, 0x10, 0xFD, 0x10, 0xFD },
-	{ 0x0F, 0x1F, 0xF5, 0x10, 0xFD }, { 0x10, 0x20, 0xFE, 0x10, 0xFD },
-	{ 0x11, 0x20, 0xFE, 0x10, 0xFD }, { 0x12, 0x20, 0xFE, 0x10, 0xFD },
-	{ 0x13, 0x20, 0xFE, 0x20, 0xFE }, { 0x14, 0x20, 0xFE, 0x20, 0xFE },
-	{ 0x15, 0x20, 0xFE, 0x20, 0xFE }, { 0x16, 0x20, 0xFE, 0x20, 0xFE },
-	{ 0x17, 0x20, 0xFE, 0x20, 0xFE }, { 0x18, 0x20, 0xFE, 0x20, 0xFE },
-	{ 0x19, 0x20, 0xFE, 0x20, 0xFE }, { 0x1A, 0x20, 0xFE, 0x20, 0xFE },
-	{ 0x1B, 0x20, 0xFE, 0x20, 0xFE }, { 0x1C, 0x20, 0xFE, 0x20, 0xFE },
-	{ 0x1D, 0x20, 0xFE, 0x20, 0xFE }, { 0x1E, 0x20, 0xFE, 0x20, 0xFE },
-	{ 0x1F, 0x20, 0xFE, 0x20, 0xFE }, { 0x20, 0x3F, 0xFF, 0x20, 0xFE },
-	{ 0x21, 0x3F, 0xFF, 0x20, 0xFE }, { 0x22, 0x3F, 0xFF, 0x20, 0xFE },
-	{ 0x23, 0x3F, 0xFF, 0x20, 0xFF }
-};
-
-int saa7114_write_reg(unsigned char reg, unsigned char val)
-{
-	return gfx_i2c_write(2, SAA7114_CHIPADDR, reg, 1, &val);
-}
-
-int saa7114_read_reg(unsigned char reg, unsigned char * val)
-{
-    return gfx_i2c_read(2, SAA7114_CHIPADDR, reg, 1, val);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_set_decoder_vbi_upscale
- *
- * This routine configures the video decoder task A to upscale raw VBI data
- * horizontally to match a different system clock.
- * The upscale is from 13.5 MHz (SAA7114) to 14.318 MHz (Bt835).
- *-----------------------------------------------------------------------------
- */
-#if GFX_DECODER_DYNAMIC
-int saa7114_set_decoder_vbi_upscale(void)
-#else
-int gfx_set_decoder_vbi_upscale(void)
-#endif
-{
-	/* Set horizontal output length to 1528 (720 * 2 * 14.318 / 13.5) */
-	saa7114_write_reg(SAA7114_TASK_A_HORZ_OUTPUT_LO,   0xF8);
-	saa7114_write_reg(SAA7114_TASK_A_HORZ_OUTPUT_HI,   0x05);
-
-	/* Set horizontal luminance scaling increment to 484 (1024 * 13.5 / 28.636) */
-	saa7114_write_reg(SAA7114_TASK_A_HSCALE_LUMA_LO,   0xE4);
-	saa7114_write_reg(SAA7114_TASK_A_HSCALE_LUMA_HI,   0x01);
-
-	/* Set horizontal chrominance scaling increment to 242 */
-	saa7114_write_reg(SAA7114_TASK_A_HSCALE_CHROMA_LO, 0xF2);
-	saa7114_write_reg(SAA7114_TASK_A_HSCALE_CHROMA_HI, 0x00);
-
-	return GFX_STATUS_OK;
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_decoder_software_reset
- *
- * This routine performs a software reset of the decoder.
- *-----------------------------------------------------------------------------
- */
-#if GFX_DECODER_DYNAMIC
-int saa7114_decoder_software_reset(void)
-#else
-int gfx_decoder_software_reset(void)
-#endif
-{
-	saa7114_write_reg(0x88, 0xC0);
-	/* I2C-bus latency should be sufficient for resetting the internal state machine. */
-	/* gfx_delay_milliseconds(10); */
-	saa7114_write_reg(0x88, 0xF0);
-	return GFX_STATUS_OK;
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_decoder_detect_macrovision
- *
- * This routine detects if macrovision exists in the input of the video decoder.
- *-----------------------------------------------------------------------------
- */
-#if GFX_DECODER_DYNAMIC
-int saa7114_decoder_detect_macrovision(void)
-#else
-int gfx_decoder_detect_macrovision(void)
-#endif
-{
-	unsigned char macrovision = 0xff;
-	saa7114_read_reg(SAA7114_STATUS, &macrovision);
-	return ((macrovision & 0x02) >> 1);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_decoder_detect_video
- *
- * This routine detects if video exists in the input of the video decoder.
- *-----------------------------------------------------------------------------
- */
-#if GFX_DECODER_DYNAMIC
-int saa7114_decoder_detect_video(void)
-#else
-int gfx_decoder_detect_video(void)
-#endif
-{
-	unsigned char video = 0xff;
-	saa7114_read_reg(SAA7114_STATUS, &video);
-	return !((video & 0x40) >> 6);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_set_decoder_defaults
- *
- * This routine is called to set the initial register values of the 
- * video decoder.
- *-----------------------------------------------------------------------------
- */
-#if GFX_DECODER_DYNAMIC
-int saa7114_set_decoder_defaults(void)
-#else
-int gfx_set_decoder_defaults(void)
-#endif
-{
-	int i;
-
-	/* LOOP THROUGH INDEX/DATA PAIRS IN THE TABLE */
-
-	for (i = 0; i < GFX_NUM_SAA7114_INIT_VALUES; i++)
-	{
-		saa7114_write_reg(gfx_saa7114_init_values[i].index, 
-			              gfx_saa7114_init_values[i].value);
-	}
-
-	gfx_decoder_software_reset();
-	return(0);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_set_decoder_analog_input
- *
- * This routine sets the analog input of the video decoder. 
- *-----------------------------------------------------------------------------
- */
-#if GFX_DECODER_DYNAMIC
-int saa7114_set_decoder_analog_input(unsigned char input)
-#else
-int gfx_set_decoder_analog_input(unsigned char input)
-#endif
-{
-	saa7114_write_reg(SAA7114_ANALOG_INPUT_CTRL1, input); 
-	return(0);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_set_decoder_brightness
- *
- * This routine sets the brightness of the video decoder. 
- *-----------------------------------------------------------------------------
- */
-#if GFX_DECODER_DYNAMIC
-int saa7114_set_decoder_brightness(unsigned char brightness)
-#else
-int gfx_set_decoder_brightness(unsigned char brightness)
-#endif
-{
-	saa7114_write_reg(SAA7114_BRIGHTNESS, brightness); 
-	return(0);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_set_decoder_contrast
- *
- * This routine sets the contrast of the video decoder. 
- *-----------------------------------------------------------------------------
- */
-#if GFX_DECODER_DYNAMIC
-int saa7114_set_decoder_contrast(unsigned char contrast)
-#else
-int gfx_set_decoder_contrast(unsigned char contrast)
-#endif
-{
-	saa7114_write_reg(SAA7114_CONTRAST, (unsigned char) (contrast >> 1)); 
-	return(0);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_set_decoder_hue
- *
- * This routine sets the hue control of the video decoder. 
- *-----------------------------------------------------------------------------
- */
-#if GFX_DECODER_DYNAMIC
-int saa7114_set_decoder_hue(char hue)
-#else
-int gfx_set_decoder_hue(char hue)
-#endif
-{
-	saa7114_write_reg(SAA7114_HUE, (unsigned char) hue); 
-	return(0);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_set_decoder_saturation
- *
- * This routine sets the saturation adjustment of the video decoder. 
- *-----------------------------------------------------------------------------
- */
-#if GFX_DECODER_DYNAMIC
-int saa7114_set_decoder_saturation(unsigned char saturation)
-#else
-int gfx_set_decoder_saturation(unsigned char saturation)
-#endif
-{
-	saa7114_write_reg(SAA7114_SATURATION, (unsigned char) (saturation >> 1)); 
-	return(0);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_set_decoder_input_offset
- *
- * This routine sets the size of the decoder input window.
- *-----------------------------------------------------------------------------
- */
-#if GFX_DECODER_DYNAMIC
-int saa7114_set_decoder_input_offset(unsigned short x, unsigned short y)
-#else
-int gfx_set_decoder_input_offset(unsigned short x, unsigned short y)
-#endif
-{
-	/* SET THE INPUT WINDOW OFFSET */
-
-	saa7114_write_reg(SAA7114_HORZ_OFFSET_LO, (unsigned char) (x & 0x00FF));
-	saa7114_write_reg(SAA7114_HORZ_OFFSET_HI, (unsigned char) (x >> 8));
-	saa7114_write_reg(SAA7114_VERT_OFFSET_LO, (unsigned char) (y & 0x00FF));
-	saa7114_write_reg(SAA7114_VERT_OFFSET_HI, (unsigned char) (y >> 8));
-
-	gfx_decoder_software_reset();
-	return(0);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_set_decoder_input_size
- *
- * This routine sets the size of the decoder input window.
- *-----------------------------------------------------------------------------
- */
-#if GFX_DECODER_DYNAMIC
-int saa7114_set_decoder_input_size(unsigned short width, unsigned short height)
-#else
-int gfx_set_decoder_input_size(unsigned short width, unsigned short height)
-#endif
-{
-	/* DIVIDE HEIGHT BY TWO FOR INTERLACING */
-
-	height = (height + 1) >> 1;
-
-	/* SET THE INPUT WINDOW SIZE */
-
-	saa7114_write_reg(SAA7114_HORZ_INPUT_LO, (unsigned char) (width & 0x00FF));
-	saa7114_write_reg(SAA7114_HORZ_INPUT_HI, (unsigned char) (width >> 8));
-	saa7114_write_reg(SAA7114_VERT_INPUT_LO, (unsigned char) (height & 0x00FF));
-	saa7114_write_reg(SAA7114_VERT_INPUT_HI, (unsigned char) (height >> 8));
-
-	gfx_decoder_software_reset();
-	return(0);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_set_decoder_output_size
- *
- * This routine sets the size of the decoder output window.
- *-----------------------------------------------------------------------------
- */
-#if GFX_DECODER_DYNAMIC
-int saa7114_set_decoder_output_size(unsigned short width, unsigned short height)
-#else
-int gfx_set_decoder_output_size(unsigned short width, unsigned short height)
-#endif
-{
-	/* ROUND WIDTH UP TO EVEN NUMBER TO PREVENT DECODER BECOMING STUCK */
-	
-	width = ((width + 1) >> 1) << 1;
-	
-	/* DIVIDE HEIGHT BY TWO FOR INTERLACING */
-
-	height = (height + 1) >> 1;
-
-	/* SET THE OUTPUT WINDOW SIZE */
-
-	saa7114_write_reg(SAA7114_HORZ_OUTPUT_LO, (unsigned char) (width & 0x00FF));
-	saa7114_write_reg(SAA7114_HORZ_OUTPUT_HI, (unsigned char) (width >> 8));
-	saa7114_write_reg(SAA7114_VERT_OUTPUT_LO, (unsigned char) (height & 0x00FF));
-	saa7114_write_reg(SAA7114_VERT_OUTPUT_HI, (unsigned char) (height >> 8));
-
-	gfx_decoder_software_reset();
-	return(0);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_set_decoder_scale
- *
- * This routine sets the scaling of the video decoder.
- *-----------------------------------------------------------------------------
- */
-#if GFX_DECODER_DYNAMIC
-int saa7114_set_decoder_scale(unsigned short srcw, unsigned short srch, 
-	unsigned short dstw, unsigned short dsth)
-#else
-int gfx_set_decoder_scale(unsigned short srcw, unsigned short srch, 
-	unsigned short dstw, unsigned short dsth)
-#endif
-{
-	unsigned char prescale = 0;
-	int scale = 0;
-
-	/* SET THE HORIZONTAL PRESCALE */
-	/* Downscale from 1 to 1/63 source size. */
-
-	if (dstw) prescale = (unsigned char) (srcw/dstw);
-	if (!prescale) prescale = 1;
-	if (prescale > 63) return(1);
-	saa7114_write_reg(SAA7114_HORZ_PRESCALER, prescale);
-
-	/* USE FIR PREFILTER FUNCTIONALITY (OPTIMISATION) */
-
-	if ( prescale < 36 ) {
-		if (optimize_for_aliasing) {
-			saa7114_write_reg(SAA7114_HORZ_ACL,
-						  gfx_saa7114_fir_values[prescale-1].acl_low );
-			saa7114_write_reg(SAA7114_HORZ_FIR_PREFILTER,
-						  gfx_saa7114_fir_values[prescale-1].prefilter_low );
-		} else {
-			saa7114_write_reg(SAA7114_HORZ_ACL,
-						  gfx_saa7114_fir_values[prescale-1].acl_high );
-			saa7114_write_reg(SAA7114_HORZ_FIR_PREFILTER,
-						  gfx_saa7114_fir_values[prescale-1].prefilter_high );
-		}
-	} else {
-		/* SAME SETTINGS FOR RATIO 1/35 DOWNTO 1/63 */
-		if (optimize_for_aliasing) {
-			saa7114_write_reg(SAA7114_HORZ_ACL,
-						  gfx_saa7114_fir_values[34].acl_low );
-			saa7114_write_reg(SAA7114_HORZ_FIR_PREFILTER,
-						  gfx_saa7114_fir_values[34].prefilter_low );
-		} else {
-			saa7114_write_reg(SAA7114_HORZ_ACL,
-						  gfx_saa7114_fir_values[34].acl_high );
-			saa7114_write_reg(SAA7114_HORZ_FIR_PREFILTER,
-						  gfx_saa7114_fir_values[34].prefilter_high );
-		}
-	}
-
-	/* SET THE HORIZONTAL SCALING */
-
-	if (!dstw) return(1);
-	scale = ( (1024 * srcw * 1000) / (dstw * prescale) ) / 1000;
-	if ((scale > 8191) || (scale < 300)) return(1);
-	saa7114_write_reg(SAA7114_HSCALE_LUMA_LO, (unsigned char) (scale & 0x00FF));
-	saa7114_write_reg(SAA7114_HSCALE_LUMA_HI, (unsigned char) (scale >> 8));
-	scale >>= 1;
-	saa7114_write_reg(SAA7114_HSCALE_CHROMA_LO, (unsigned char) (scale & 0x00FF));
-	saa7114_write_reg(SAA7114_HSCALE_CHROMA_HI, (unsigned char) (scale >> 8));
-
-	/* SET THE VERTICAL SCALING (INTERPOLATION MODE) */
-
-	if (!dsth) return(1);
-
-	/* ROUND DESTINATION HEIGHT UP TO EVEN NUMBER TO PREVENT DECODER BECOMING STUCK */
-	
-	dsth = ((dsth + 1) >> 1) << 1;
-
-	scale = (int)((1024 * srch) / dsth);
-	saa7114_write_reg(SAA7114_VSCALE_LUMA_LO, (unsigned char) (scale & 0x00FF));
-	saa7114_write_reg(SAA7114_VSCALE_LUMA_HI, (unsigned char) (scale >> 8));
-	saa7114_write_reg(SAA7114_VSCALE_CHROMA_LO, (unsigned char) (scale & 0x00FF));
-	saa7114_write_reg(SAA7114_VSCALE_CHROMA_HI, (unsigned char) (scale >> 8));
-
-	if (dsth >= (srch >> 1))
-	{
-		/* USE INTERPOLATION MODE FOR SCALE FACTOR ABOVE 0.5 */
-
-		saa7114_write_reg(SAA7114_VSCALE_CONTROL, 0x00);
-
-		/* SET VERTICAL PHASE REGISTER FOR CORRECT SCALED INTERLACED OUTPUT (OPTIMISATION) */
-		/* THE OPTIMISATION IS BASED ON OFIDC = 0 (REG 90h[6] = 0 ) */
-		saa7114_write_reg(SAA7114_VSCALE_CHROMA_OFFS0, SAA7114_VSCALE_PHO );
-		saa7114_write_reg(SAA7114_VSCALE_CHROMA_OFFS1, SAA7114_VSCALE_PHO );
-		saa7114_write_reg(SAA7114_VSCALE_CHROMA_OFFS2, (unsigned char)(SAA7114_VSCALE_PHO+scale/64-16) );
-		saa7114_write_reg(SAA7114_VSCALE_CHROMA_OFFS3, (unsigned char)(SAA7114_VSCALE_PHO+scale/64-16) );
-
-		saa7114_write_reg(SAA7114_VSCALE_LUMINA_OFFS0, SAA7114_VSCALE_PHO );
-		saa7114_write_reg(SAA7114_VSCALE_LUMINA_OFFS1, SAA7114_VSCALE_PHO );
-		saa7114_write_reg(SAA7114_VSCALE_LUMINA_OFFS2, (unsigned char)(SAA7114_VSCALE_PHO+scale/64-16) );
-		saa7114_write_reg(SAA7114_VSCALE_LUMINA_OFFS3, (unsigned char)(SAA7114_VSCALE_PHO+scale/64-16) );
-
-		/* RESTORE CONTRAST AND SATURATION FOR INTERPOLATION MODE */
-
-		saa7114_write_reg(SAA7114_FILTER_CONTRAST,   (unsigned char) 0x40);
-		saa7114_write_reg(SAA7114_FILTER_SATURATION, (unsigned char) 0x40);
-	}
-	else
-	{
-		/* USE ACCUMULATION MODE FOR DOWNSCALING BY MORE THAN 2x */
-
-		saa7114_write_reg(SAA7114_VSCALE_CONTROL, 0x01);
-
-		/* SET VERTICAL PHASE OFFSETS OFF (OPTIMISATION) */
-		saa7114_write_reg(SAA7114_VSCALE_CHROMA_OFFS0, 0x00 );
-		saa7114_write_reg(SAA7114_VSCALE_CHROMA_OFFS1, 0x00 );
-		saa7114_write_reg(SAA7114_VSCALE_CHROMA_OFFS2, 0x00 );
-		saa7114_write_reg(SAA7114_VSCALE_CHROMA_OFFS3, 0x00 );
-
-		saa7114_write_reg(SAA7114_VSCALE_LUMINA_OFFS0, 0x00 );
-		saa7114_write_reg(SAA7114_VSCALE_LUMINA_OFFS1, 0x00 );
-		saa7114_write_reg(SAA7114_VSCALE_LUMINA_OFFS2, 0x00 );
-		saa7114_write_reg(SAA7114_VSCALE_LUMINA_OFFS3, 0x00 );
-
-		/* ADJUST CONTRAST AND SATURATION FOR ACCUMULATION MODE */
-
-		if (srch) scale = (64 * dsth) / srch;
-		saa7114_write_reg(SAA7114_FILTER_CONTRAST,   (unsigned char) scale);
-		saa7114_write_reg(SAA7114_FILTER_SATURATION, (unsigned char) scale);
-	}
-
-	gfx_decoder_software_reset();
-	return(0);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_set_decoder_vbi_format
- *
- * This routine programs the decoder to produce the specified format of VBI
- * data for the specified lines.
- *-----------------------------------------------------------------------------
- */
-#if GFX_DECODER_DYNAMIC
-int saa7114_set_decoder_vbi_format(int start, int end, int format)
-#else
-int gfx_set_decoder_vbi_format(int start, int end, int format)
-#endif
-{
-	int i;
-	unsigned char data;
-	
-	for (i = start; i <= end; i++)
-	{
-		switch (format)
-		{
-			case VBI_FORMAT_VIDEO:	data = 0xFF; break; /* Active video */
-			case VBI_FORMAT_RAW:	data = 0x77; break; /* Raw VBI data */
-			case VBI_FORMAT_CC:		data = 0x55; break; /* US CC        */
-			case VBI_FORMAT_NABTS:	data = 0xCC; break; /* US NABTS     */
-			default:
-				return GFX_STATUS_BAD_PARAMETER;
-		}
-		saa7114_write_reg((unsigned char)(0x3F + i), data);
-	}
-	return GFX_STATUS_OK;
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_set_decoder_vbi_enable
- *
- * This routine enables or disables VBI transfer in the decoder.
- *-----------------------------------------------------------------------------
- */
-#if GFX_DECODER_DYNAMIC
-int saa7114_set_decoder_vbi_enable(int enable)
-#else
-int gfx_set_decoder_vbi_enable(int enable)
-#endif
-{
-	unsigned char data;
-	saa7114_read_reg(SAA7114_IPORT_CONTROL, &data);
-	if (enable) data |= 0x80;
-	else data &= ~0x80;
-	saa7114_write_reg(SAA7114_IPORT_CONTROL, data);
-	return GFX_STATUS_OK;
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_set_decoder_TV_standard
- *
- * This routine configures the decoder for the required TV standard.
- *-----------------------------------------------------------------------------
- */
-#if GFX_DECODER_DYNAMIC
-int saa7114_set_decoder_TV_standard(TVStandardType TVStandard)
-#else
-int gfx_set_decoder_TV_standard(TVStandardType TVStandard)
-#endif
-{
-	switch (TVStandard) {
-		case TV_STANDARD_NTSC:
-			saa7114_write_reg(0x0E, 0x89);
-			saa7114_write_reg(0x5A, 0x06);
-			break;						
-		case TV_STANDARD_PAL:
-			saa7114_write_reg(0x0E, 0x81);
-			saa7114_write_reg(0x5A, 0x03);
-			break;
-		default:
-			return GFX_STATUS_BAD_PARAMETER;	
-	}
-	gfx_decoder_software_reset();
-	return GFX_STATUS_OK;
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_set_decoder_luminance_filter
- *
- * This routine sets the hue control of the video decoder. 
- *-----------------------------------------------------------------------------
- */
-#if GFX_DECODER_DYNAMIC
-int saa7114_set_decoder_luminance_filter(unsigned char lufi)
-#else
-int gfx_set_decoder_luminance_filter(unsigned char lufi)
-#endif
-{
-	unsigned char data;
-	saa7114_read_reg(SAA7114_LUMINANCE_CONTROL, &data);
-	saa7114_write_reg(SAA7114_LUMINANCE_CONTROL, (unsigned char)((data & ~0x0F) | (lufi & 0x0F))); 
-	return(0);
-}
-
-/*************************************************************/
-/*  READ ROUTINES  |  INCLUDED FOR DIAGNOSTIC PURPOSES ONLY  */
-/*************************************************************/
-
-#if GFX_READ_ROUTINES
-
-/*-----------------------------------------------------------------------------
- * gfx_get_decoder_brightness
- *
- * This routine returns the current brightness of the video decoder.  
- *-----------------------------------------------------------------------------
- */
-#if GFX_DECODER_DYNAMIC
-unsigned char saa7114_get_decoder_brightness(void)
-#else
-unsigned char gfx_get_decoder_brightness(void)
-#endif
-{
-	unsigned char brightness = 0;
-	saa7114_read_reg(SAA7114_BRIGHTNESS, &brightness);
-	return(brightness);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_get_decoder_contrast
- *
- * This routine returns the current contrast of the video decoder.  
- *-----------------------------------------------------------------------------
- */
-#if GFX_DECODER_DYNAMIC
-unsigned char saa7114_get_decoder_contrast(void)
-#else
-unsigned char gfx_get_decoder_contrast(void)
-#endif
-{
-	unsigned char contrast = 0;
-	saa7114_read_reg(SAA7114_CONTRAST, &contrast);
-	contrast <<= 1;
-	return(contrast);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_get_decoder_hue
- *
- * This routine returns the current hue of the video decoder.  
- *-----------------------------------------------------------------------------
- */
-#if GFX_DECODER_DYNAMIC
-char saa7114_get_decoder_hue(void)
-#else
-char gfx_get_decoder_hue(void)
-#endif
-{
-	unsigned char hue = 0;
-	saa7114_read_reg(SAA7114_HUE, &hue);
-	return((char)hue);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_get_decoder_saturation
- *
- * This routine returns the current saturation of the video decoder.  
- *-----------------------------------------------------------------------------
- */
-#if GFX_DECODER_DYNAMIC
-unsigned char saa7114_get_decoder_saturation(void)
-#else
-unsigned char gfx_get_decoder_saturation(void)
-#endif
-{
-	unsigned char saturation = 0;
-	saa7114_read_reg(SAA7114_SATURATION, &saturation);
-	saturation <<= 1;
-	return(saturation);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_get_decoder_input_offset
- *
- * This routine returns the offset into the input window.
- *-----------------------------------------------------------------------------
- */
-#if GFX_DECODER_DYNAMIC
-unsigned long saa7114_get_decoder_input_offset(void)
-#else
-unsigned long gfx_get_decoder_input_offset(void)
-#endif
-{
-	unsigned long value = 0;
-	unsigned char data;
-	saa7114_read_reg(SAA7114_HORZ_OFFSET_LO, &data);
-	value = (unsigned long) data;
-	saa7114_read_reg(SAA7114_HORZ_OFFSET_HI, &data);
-	value |= ((unsigned long) data) << 8;
-	saa7114_read_reg(SAA7114_VERT_OFFSET_LO, &data);
-	value |= ((unsigned long) data) << 16;
-	saa7114_read_reg(SAA7114_VERT_OFFSET_HI, &data);
-	value |= ((unsigned long) data) << 24;
-	return(value);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_get_decoder_input_size
- *
- * This routine returns the current size of the input window
- *-----------------------------------------------------------------------------
- */
-#if GFX_DECODER_DYNAMIC
-unsigned long saa7114_get_decoder_input_size(void)
-#else
-unsigned long gfx_get_decoder_input_size(void)
-#endif
-{
-	unsigned long value = 0;
-	unsigned char data;
-	saa7114_read_reg(SAA7114_HORZ_INPUT_LO, &data);
-	value = (unsigned long) data;
-	saa7114_read_reg(SAA7114_HORZ_INPUT_HI, &data);
-	value |= ((unsigned long) data) << 8;
-	saa7114_read_reg(SAA7114_VERT_INPUT_LO, &data);
-	value |= ((unsigned long) data) << 17;
-	saa7114_read_reg(SAA7114_VERT_INPUT_HI, &data);
-	value |= ((unsigned long) data) << 25;
-	return(value);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_get_decoder_output_size
- *
- * This routine returns the current size of the output window.
- *-----------------------------------------------------------------------------
- */
-#if GFX_DECODER_DYNAMIC
-unsigned long saa7114_get_decoder_output_size(void)
-#else
-unsigned long gfx_get_decoder_output_size(void)
-#endif
-{
-	unsigned long value = 0;
-	unsigned char data;
-	saa7114_read_reg(SAA7114_HORZ_OUTPUT_LO, &data);
-	value = (unsigned long) data;
-	saa7114_read_reg(SAA7114_HORZ_OUTPUT_HI, &data);
-	value |= ((unsigned long) data) << 8;
-	saa7114_read_reg(SAA7114_VERT_OUTPUT_LO, &data);
-	value |= ((unsigned long) data) << 17;
-	saa7114_read_reg(SAA7114_VERT_OUTPUT_HI, &data);
-	value |= ((unsigned long) data) << 25;
-	return(value);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_get_decoder_vbi_format
- *
- * This routine returns the current format of VBI data for the specified line.
- *-----------------------------------------------------------------------------
- */
-#if GFX_DECODER_DYNAMIC
-int saa7114_get_decoder_vbi_format(int line)
-#else
-int gfx_get_decoder_vbi_format(int line)
-#endif
-{
-	unsigned char format = 0, data;
-	saa7114_read_reg((unsigned char)(0x3F + line), &data);
-	switch (data)
-	{
-		case 0xFF:	format = VBI_FORMAT_VIDEO;	break; /* Active video */
-		case 0x77:	format = VBI_FORMAT_RAW;	break; /* Raw VBI data */
-		case 0x55:	format = VBI_FORMAT_CC;		break; /* US CC        */
-		case 0xCC:	format = VBI_FORMAT_NABTS;	break; /* US NABTS     */
-	}
-	return(format);
-}
-
-#endif /* GFX_READ_ROUTINES */
-
-/* END OF FILE */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/tv_1200.c b/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/tv_1200.c
deleted file mode 100644
index 34bc08507..000000000
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/tv_1200.c
+++ /dev/null
@@ -1,969 +0,0 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/tv_1200.c,v 1.1 2002/10/11 14:33:01 alanh Exp $ */
-/*
- * $Workfile: tv_1200.c $
- *
- * This file contains routines to control the SC1200 TVOUT and TV encoder.
- *
- * NSC_LIC_ALTERNATIVE_PREAMBLE
- *
- * Revision 1.0
- *
- * National Semiconductor Alternative GPL-BSD License
- *
- * National Semiconductor Corporation licenses this software 
- * ("Software"):
- *
- *      Durango
- *
- * under one of the two following licenses, depending on how the 
- * Software is received by the Licensee.
- * 
- * If this Software is received as part of the Linux Framebuffer or
- * other GPL licensed software, then the GPL license designated 
- * NSC_LIC_GPL applies to this Software; in all other circumstances 
- * then the BSD-style license designated NSC_LIC_BSD shall apply.
- *
- * END_NSC_LIC_ALTERNATIVE_PREAMBLE */
-
-/* NSC_LIC_BSD
- *
- * National Semiconductor Corporation Open Source License for Durango
- *
- * (BSD License with Export Notice)
- *
- * Copyright (c) 1999-2001
- * National Semiconductor Corporation.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without 
- * modification, are permitted provided that the following conditions 
- * are met: 
- *
- *   * Redistributions of source code must retain the above copyright 
- *     notice, this list of conditions and the following disclaimer. 
- *
- *   * Redistributions in binary form must reproduce the above 
- *     copyright notice, this list of conditions and the following 
- *     disclaimer in the documentation and/or other materials provided 
- *     with the distribution. 
- *
- *   * Neither the name of the National Semiconductor Corporation nor 
- *     the names of its contributors may be used to endorse or promote 
- *     products derived from this software without specific prior 
- *     written permission. 
- * 
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
- * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
- * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE,
- * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
- * OF SUCH DAMAGE.
- *
- * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
- * YOUR JURISDICTION. It is licensee's responsibility to comply with 
- * any export regulations applicable in licensee's jurisdiction. Under 
- * CURRENT (2001) U.S. export regulations this software 
- * is eligible for export from the U.S. and can be downloaded by or 
- * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
- * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
- * Syria, Sudan, Afghanistan and any other country to which the U.S. 
- * has embargoed goods and services. 
- *
- * END_NSC_LIC_BSD */
-
-/* NSC_LIC_GPL
- *
- * National Semiconductor Corporation Gnu General Public License for Durango
- *
- * (GPL License with Export Notice)
- *
- * Copyright (c) 1999-2001
- * National Semiconductor Corporation.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without 
- * modification, are permitted under the terms of the GNU General 
- * Public License as published by the Free Software Foundation; either 
- * version 2 of the License, or (at your option) any later version  
- *
- * In addition to the terms of the GNU General Public License, neither 
- * the name of the National Semiconductor Corporation nor the names of 
- * its contributors may be used to endorse or promote products derived 
- * from this software without specific prior written permission. 
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
- * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
- * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, 
- * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
- * OF SUCH DAMAGE. See the GNU General Public License for more details. 
- *
- * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
- * YOUR JURISDICTION. It is licensee's responsibility to comply with 
- * any export regulations applicable in licensee's jurisdiction. Under 
- * CURRENT (2001) U.S. export regulations this software 
- * is eligible for export from the U.S. and can be downloaded by or 
- * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
- * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
- * Syria, Sudan, Afghanistan and any other country to which the U.S. 
- * has embargoed goods and services. 
- *
- * You should have received a copy of the GNU General Public License 
- * along with this file; if not, write to the Free Software Foundation, 
- * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 
- *
- * END_NSC_LIC_GPL */
-
-
-/*-----------------------------------------------------------------------------
- * gfx_set_tv_format
- *
- * This routine sets the TV encoder registers to the specified format
- * and resolution.
- *-----------------------------------------------------------------------------
- */
-#if GFX_TV_DYNAMIC
-int sc1200_set_tv_format(TVStandardType format, GfxOnTVType resolution)
-#else
-int gfx_set_tv_format(TVStandardType format, GfxOnTVType resolution)
-#endif
-{
-	unsigned long ctrl2, mode;
-	
-	/* Save TV output mode */
-	ctrl2 = READ_VID32(SC1200_TVENC_TIM_CTRL_2) & (SC1200_TVENC_OUTPUT_YCBCR | SC1200_TVENC_CFS_MASK);
-	/* Save flicker filter setting */
-	mode = READ_VID32(SC1200_TVOUT_HORZ_SCALING) & SC1200_TVOUT_FLICKER_FILTER_MASK;
-
-	switch (format) {
-		case TV_STANDARD_NTSC :
-			/* Horizontal Sync Start is 848 */
-			/* Horizontal Sync End is 856 */
-			WRITE_VID32(SC1200_TVOUT_HORZ_SYNC, 0x03580350);
-			/* Vertical Sync Start is 0 */
-			/* Vertical Sync End is 1 */
-			/* Vertical Display Start Skew is 1 */
-			/* Vertical Display End Skew is 1 */
-			WRITE_VID32(SC1200_TVOUT_VERT_SYNC, 0x05001000);
-			/* Disable vertical down scaling, take all lines */
-			if (gfx_chip_revision <= SC1200_REV_B3)
-				WRITE_VID32(SC1200_TVOUT_VERT_DOWNSCALE, 0xffffffff);
-			/* Enable video timing */
-			/* Never reset sub carrier */
-			/* Disable BLANK */
-			/* Enable color burst */
-			/* Add the IRE offset */
-			/* NTSC color encoding */
-			/* Video generator timing is 525 lines / 60Hz */
-			/* Horizontal and Vertical counters are initialized to HPHASE & VPHASE */
-			/* VPHASE is 2, HPHASE is 0x50 */
-			WRITE_VID32(SC1200_TVENC_TIM_CTRL_1, 0x82a01050);
-			/* Increase horizontal blanking interval */
-			/* Low Water Mark for Y is 0x1F */
-			/* Low Water Mark for Cb is 0xF */
-			/* HUE is 0 */
-			/* SCPHASE is 0xF9 */
-			WRITE_VID32(SC1200_TVENC_TIM_CTRL_2, 0x9ff000f9 | ctrl2);
-			/* Subcarrier Frequency is 3.579545 MHz */
-			WRITE_VID32(SC1200_TVENC_SUB_FREQ, 0x21f07c1f);
-			/* VSTART is 18, HSTART is 113 */
-			WRITE_VID32(SC1200_TVENC_DISP_POS, 0x00120071);
-			/* Display size: HEIGHT is 239, WIDTH is 719 */
-			WRITE_VID32(SC1200_TVENC_DISP_SIZE, 0x00ef02cf);
-			switch (resolution) {
-				case GFX_ON_TV_SQUARE_PIXELS :
-					if (gfx_chip_revision <= SC1200_REV_B3) {
-						/* Horizontal Display start is 116 */
-						/* Total number of pixels per line is 857 */
-						WRITE_VID32(SC1200_TVOUT_HORZ_TIM, 0x00740359);
-						/* HSYNC generated in the TV Encoder module */
-						/* Interval between resets of TV Encoder is once every odd field */
-						/* Enable Horizontal interpolation */
-						/* Enable Horizontal up scaling 9/8 */
-						/* Disable Horizontal downscale */
-						WRITE_VID32(SC1200_TVOUT_HORZ_SCALING, 0x10020700 | mode);
-						/* Horizontal display end is 919, i.e. 720 active pixels */
-						/* Total number of display lines per field is 240 */
-						WRITE_VID32(SC1200_TVOUT_LINE_END, 0x039700f0);
-					} else { /* Use new scaler available in Rev. C */	
-						/* Horizontal Display start is 111 */
-						/* Total number of pixels per line is 857 */
-						WRITE_VID32(SC1200_TVOUT_HORZ_TIM, 0x006f0359);
-						/* HSYNC generated in the TV Encoder module */
-						/* Interval between resets of TV Encoder is once every odd field */
-						/* Enable Horizontal interpolation */
-						/* Disable Horizontal up scaling 9/8 */
-						/* Disable Horizontal downscale */
-						WRITE_VID32(SC1200_TVOUT_HORZ_SCALING, 0x10020500 | mode);
-						/* Set Horizontal upscaling to 64/58 (~ 11/10) */
-						WRITE_VID32(SC1200_TVOUT_HORZ_PRE_ENCODER_SCALE, 0x3A000000);
-						/* Horizontal display end is 900, i.e. 706 active pixels */
-						/* Total number of display lines per field is 240 */
-						WRITE_VID32(SC1200_TVOUT_LINE_END, 0x038400f0);
-					}
-					break;
-				case GFX_ON_TV_NO_SCALING :
-					/* Horizontal Display start is 116 */
-					/* Total number of pixels per line is 857 */
-					WRITE_VID32(SC1200_TVOUT_HORZ_TIM, 0x00740359);
-					/* HSYNC generated in the TV Encoder module */
-					/* Interval between resets of TV Encoder is once every odd field */
-					/* Enable Horizontal interpolation */
-					/* Disable Horizontal up scaling 9/8 */
-					/* Disable Horizontal downscale */
-					WRITE_VID32(SC1200_TVOUT_HORZ_SCALING, 0x10020500 | mode);
-					/* Disable Horizontal scaling (set to 64/64) */
-					if (gfx_chip_revision >= SC1200_REV_C1)
-						WRITE_VID32(SC1200_TVOUT_HORZ_PRE_ENCODER_SCALE, 0x40000000);
-					/* Horizontal display end is 919, i.e. 720 active pixels */
-					/* Total number of display lines per field is 240 */
-					WRITE_VID32(SC1200_TVOUT_LINE_END, 0x039700f0);
-					break;
-				default :
-					return(GFX_STATUS_BAD_PARAMETER);
-			}
-			break;
-		case TV_STANDARD_PAL :
-			/* Horizontal Sync Start is 854 */
-			/* Horizontal Sync End is 862 */
-			WRITE_VID32(SC1200_TVOUT_HORZ_SYNC, 0x035e0356);
-			/* Vertical Sync Start is 0 */
-			/* Vertical Sync End is 1 */
-			/* Vertical Display Start Skew is 1 */
-			/* Vertical Display End Skew is 1 */
-			WRITE_VID32(SC1200_TVOUT_VERT_SYNC, 0x05001000);
-			/* Disable vertical down scaling, take all lines */
-			if (gfx_chip_revision <= SC1200_REV_B3)
-				WRITE_VID32(SC1200_TVOUT_VERT_DOWNSCALE, 0xffffffff);
-			/* Enable video timing */
-			/* Never reset sub carrier (should be every 4 frames but doesn't work with genlock) */
-			/* Disable BLANK */
-			/* Enable color burst */
-			/* Do not add the IRE offset */
-			/* NTSC color encoding */
-			/* Video generator timing is 625 lines / 50Hz */
-			/* Horizontal and Vertical counters are initialized to HPHASE & VPHASE */
-			/* VPHASE is 2, HPHASE is 50 */
-			WRITE_VID32(SC1200_TVENC_TIM_CTRL_1, 0x81201050);
-			/* Increase horizontal blanking interval */
-			/* Low Water Mark for Y is 0x1F */
-			/* Low Water Mark for Cb is 0xF */
-			/* HUE is 0 */
-			/* SCPHASE is 0xD9 */
-			WRITE_VID32(SC1200_TVENC_TIM_CTRL_2, 0x9ff000d9 | ctrl2);
-			/* Subcarrier Frequency is 4.43361875 MHz */
-			WRITE_VID32(SC1200_TVENC_SUB_FREQ, 0x2a098acb);
-			/* VSTART is 22, HSTART is 123 */
-			WRITE_VID32(SC1200_TVENC_DISP_POS, 0x0016007b);
-			/* Display size: HEIGHT is 287, WIDTH is 719 */
-			WRITE_VID32(SC1200_TVENC_DISP_SIZE, 0x011f02cf);
-			switch (resolution) {
-				case GFX_ON_TV_NO_SCALING :
-					/* Horizontal Display start is 124 */
-					/* Total number of pixels per line is 863 */
-					WRITE_VID32(SC1200_TVOUT_HORZ_TIM, 0x007c035f);
-					/* HSYNC generated in the TV Encoder module */
-					/* Interval between resets of TV Encoder is once every odd field */
-					/* Enable Horizontal interpolation */
-					/* Disable Horizontal up scaling 9/8 */
-					/* Disable Horizontal downscale */
-					WRITE_VID32(SC1200_TVOUT_HORZ_SCALING, 0x10020500 | mode);
-					/* Disable Horizontal scaling (set to 64/64) */
-					if (gfx_chip_revision >= SC1200_REV_C1)
-						WRITE_VID32(SC1200_TVOUT_HORZ_PRE_ENCODER_SCALE, 0x40000000);
-					/* Horizontal display end is 924, i.e. 720 active pixels */
-					/* Total number of display lines per field is 288 */
-					WRITE_VID32(SC1200_TVOUT_LINE_END, 0x039c0120);
-					break;		
-				case GFX_ON_TV_SQUARE_PIXELS :
-					/* Horizontal Display start is 122 */
-					/* Total number of pixels per line is 863 */
-					WRITE_VID32(SC1200_TVOUT_HORZ_TIM, 0x007a035f);
-					if (gfx_chip_revision <= SC1200_REV_B3) {
-						/* HSYNC generated in the TV Encoder module */
-						/* Interval between resets of TV Encoder is once every odd field */
-						/* Enable Horizontal interpolation */
-						/* Disable Horizontal up scaling 9/8 */
-						/* Horizontal downscale m/(m+1), m = 11, (i.e. 11/12 - closest possible to 54/59) */
-						WRITE_VID32(SC1200_TVOUT_HORZ_SCALING, 0x1002040b | mode);
-						/* Horizontal display end is 906, i.e. 704 active pixels */
-						/* Total number of display lines per field is 288 */
-						WRITE_VID32(SC1200_TVOUT_LINE_END, 0x038a0120);
-					 } else	{			
-						/* HSYNC generated in the TV Encoder module */
-						/* Interval between resets of TV Encoder is once every odd field */
-						/* Enable Horizontal interpolation */
-						/* Disable Horizontal up scaling 9/8 */
-						/* Disable Horizontal downscale */
-						WRITE_VID32(SC1200_TVOUT_HORZ_SCALING, 0x10020500 | mode);
-						/* Set Horizontal down scaling to 64/70 (closest possible to 54/59) */
-						WRITE_VID32(SC1200_TVOUT_HORZ_PRE_ENCODER_SCALE, 0x46000000);
-						/* Horizontal display end is 904, i.e. 702 active pixels */
-						/* Total number of display lines per field is 288 */
-						WRITE_VID32(SC1200_TVOUT_LINE_END, 0x03880120);
-					}						
-					break;
-				default :
-					return(GFX_STATUS_BAD_PARAMETER);
-			}
-			break;
-		default :
-			return(GFX_STATUS_BAD_PARAMETER);
-	}
-	return(GFX_STATUS_OK);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_set_tv_output
- *
- * This routine sets the TV encoder registers to the specified output type.
- * Supported output types are : S-VIDEO, Composite, YUV and SCART.
- *-----------------------------------------------------------------------------
- */
-#if GFX_TV_DYNAMIC
-int sc1200_set_tv_output(int output)
-#else
-int gfx_set_tv_output(int output)
-#endif
-{
-	unsigned long ctrl2, ctrl3;
-
-	ctrl2 = READ_VID32(SC1200_TVENC_TIM_CTRL_2);
-	ctrl3 = READ_VID32(SC1200_TVENC_TIM_CTRL_3);
-	ctrl2 &= ~(SC1200_TVENC_OUTPUT_YCBCR | SC1200_TVENC_CFS_MASK);
-	ctrl3 &= ~(SC1200_TVENC_CM | SC1200_TVENC_SYNCMODE_MASK | SC1200_TVENC_CS);
-	switch (output) {
-		case TV_OUTPUT_COMPOSITE :
-			/* Analog outputs provide Y, C and CVBS */
-			/* Chrominance Lowpass filter is 1.3MHz (for composite video output) */
-			WRITE_VID32(SC1200_TVENC_TIM_CTRL_2, ctrl2 | SC1200_TVENC_CFS_CVBS);
-			WRITE_VID32(SC1200_TVENC_TIM_CTRL_3, ctrl3);
-			break;
-		case TV_OUTPUT_S_VIDEO :
-			/* Analog outputs provide Y, C and CVBS */
-			/* Chrominance Lowpass filter is 1.8MHz (for S-video output) */
-			WRITE_VID32(SC1200_TVENC_TIM_CTRL_2, ctrl2 | SC1200_TVENC_CFS_SVIDEO);
-			WRITE_VID32(SC1200_TVENC_TIM_CTRL_3, ctrl3);
-		break;
-		case TV_OUTPUT_YUV :
-			/* Analog outputs provide Y, Cb and Cr */
-			/* A 7.5 IRE setup is applied to the output */
-			WRITE_VID32(SC1200_TVENC_TIM_CTRL_2, ctrl2 | SC1200_TVENC_OUTPUT_YCBCR | SC1200_TVENC_CFS_BYPASS);
-			WRITE_VID32(SC1200_TVENC_TIM_CTRL_3, ctrl3 | SC1200_TVENC_CM | SC1200_TVENC_CS);
-			break;
-		case TV_OUTPUT_SCART :
-			/* Analog outputs provide SCART (RGB and CVBS) */
-			/* Sync is added to green signal */
-			WRITE_VID32(SC1200_TVENC_TIM_CTRL_2, ctrl2 | SC1200_TVENC_CFS_CVBS);
-			WRITE_VID32(SC1200_TVENC_TIM_CTRL_3, ctrl3 | SC1200_TVENC_CM | SC1200_TVENC_SYNC_ON_GREEN);
-			break;
-		default :
-			return(GFX_STATUS_BAD_PARAMETER);
-	}
-
-	/* Adjusts the internal voltage reference */
-	ctrl2 = READ_VID32(SC1200_TVENC_DAC_CONTROL);
-	ctrl2 &= ~SC1200_TVENC_TRIM_MASK;
-	
-	/* Bypass for issue #926 : Inadequate chroma level of S-Video output */
-	if ((gfx_chip_revision == SC1200_REV_B3) && (output == TV_OUTPUT_S_VIDEO))
-		ctrl2 |= 0x7;
-	else
-		ctrl2 |= 0x5;
-
-	WRITE_VID32(SC1200_TVENC_DAC_CONTROL, ctrl2);
-
-	/* Disable 4:2:2 to 4:4:4 converter interpolation */
-	WRITE_VID32(SC1200_TVOUT_DEBUG, SC1200_TVOUT_CONVERTER_INTERPOLATION);
-
-	return(GFX_STATUS_OK);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_set_tv_enable
- *
- * This routine enables or disables the TV output.
- *-----------------------------------------------------------------------------
- */
-#if GFX_TV_DYNAMIC
-int sc1200_set_tv_enable(int enable)
-#else
-int gfx_set_tv_enable(int enable)
-#endif
-{
-	unsigned long value_tim, value_dac;
-	value_tim = READ_VID32(SC1200_TVENC_TIM_CTRL_1);
-	value_dac = READ_VID32(SC1200_TVENC_DAC_CONTROL);
-	
-	if (enable) {
-		value_tim |= SC1200_TVENC_VIDEO_TIMING_ENABLE;
-		value_dac &= ~SC1200_TVENC_POWER_DOWN;
-		/* ENABLE GRAPHICS DISPLAY LOGIC IN VIDEO PROCESSOR */
-		gfx_set_screen_enable(1);
-	} else {
-		value_tim &= ~SC1200_TVENC_VIDEO_TIMING_ENABLE;
-		value_dac |= SC1200_TVENC_POWER_DOWN;
-		/* Do not disable the graphics display logic because it might be needed for CRT */
-	}		
-
-	WRITE_VID32(SC1200_TVENC_TIM_CTRL_1, value_tim);		
-	WRITE_VID32(SC1200_TVENC_DAC_CONTROL, value_dac);
-	
-	return(GFX_STATUS_OK);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_set_tv_flicker_filter
- *
- * This routine configures the TV out flicker filter.
- *-----------------------------------------------------------------------------
- */
-#if GFX_TV_DYNAMIC
-int sc1200_set_tv_flicker_filter(int ff)
-#else
-int gfx_set_tv_flicker_filter(int ff)
-#endif
-{
-	unsigned long mode;
-	mode = READ_VID32(SC1200_TVOUT_HORZ_SCALING);
-	mode &= ~SC1200_TVOUT_FLICKER_FILTER_MASK;
-	switch (ff)
-	{
-	case TV_FLICKER_FILTER_NONE:
-		WRITE_VID32(SC1200_TVOUT_HORZ_SCALING, mode | SC1200_TVOUT_FLICKER_FILTER_DISABLED);
-		break;
-	case TV_FLICKER_FILTER_NORMAL:
-		WRITE_VID32(SC1200_TVOUT_HORZ_SCALING, mode | SC1200_TVOUT_FLICKER_FILTER_FOURTH_HALF_FOURTH);
-		break;
-	case TV_FLICKER_FILTER_INTERLACED:
-		WRITE_VID32(SC1200_TVOUT_HORZ_SCALING, mode | SC1200_TVOUT_FLICKER_FILTER_HALF_ONE_HALF);
-		break;
-	default:
-		return GFX_STATUS_BAD_PARAMETER;
-	}
-	return(GFX_STATUS_OK);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_set_tv_sub_carrier_reset
- *
- * This routine configures the TV encoder sub carrier reset interval.
- *-----------------------------------------------------------------------------
- */
-#if GFX_TV_DYNAMIC
-int sc1200_set_tv_sub_carrier_reset(int screset)
-#else
-int gfx_set_tv_sub_carrier_reset(int screset)
-#endif
-{
-	unsigned long mode;
-	mode = READ_VID32(SC1200_TVENC_TIM_CTRL_1);
-	mode &= ~SC1200_TVENC_SUB_CARRIER_RESET_MASK;
-	switch (screset)
-	{
-	case TV_SUB_CARRIER_RESET_NEVER:
-		WRITE_VID32(SC1200_TVENC_TIM_CTRL_1, mode | SC1200_TVENC_SUB_CARRIER_RESET_NEVER);
-		break;
-	case TV_SUB_CARRIER_RESET_EVERY_TWO_LINES:
-		WRITE_VID32(SC1200_TVENC_TIM_CTRL_1, mode | SC1200_TVENC_SUB_CARRIER_RESET_EVERY_TWO_LINES);
-		break;
-	case TV_SUB_CARRIER_RESET_EVERY_TWO_FRAMES:
-		WRITE_VID32(SC1200_TVENC_TIM_CTRL_1, mode | SC1200_TVENC_SUB_CARRIER_RESET_EVERY_TWO_FRAMES);
-		break;
-	case TV_SUB_CARRIER_RESET_EVERY_FOUR_FRAMES:
-		WRITE_VID32(SC1200_TVENC_TIM_CTRL_1, mode | SC1200_TVENC_SUB_CARRIER_RESET_EVERY_FOUR_FRAMES);
-		break;
-	default:
-		return GFX_STATUS_BAD_PARAMETER;
-	}
-	return(GFX_STATUS_OK);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_set_tv_vphase
- *
- * This routine sets the tv encoder VPHASE value.
- *-----------------------------------------------------------------------------
- */
-#if GFX_TV_DYNAMIC
-int sc1200_set_tv_vphase(int vphase)
-#else
-int gfx_set_tv_vphase(int vphase)
-#endif
-{
-	unsigned long mode = READ_VID32(SC1200_TVENC_TIM_CTRL_1);
-	mode &= ~SC1200_TVENC_VPHASE_MASK;
-	mode |= (vphase << SC1200_TVENC_VPHASE_POS) & SC1200_TVENC_VPHASE_MASK;
-	WRITE_VID32(SC1200_TVENC_TIM_CTRL_1, mode);
-	return(GFX_STATUS_OK);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_set_tv_YC_delay
- *
- * This routine configures the TV out Y/C delay.
- *-----------------------------------------------------------------------------
- */
-#if GFX_TV_DYNAMIC
-int sc1200_set_tv_YC_delay(int delay)
-#else
-int gfx_set_tv_YC_delay(int delay)
-#endif
-{
-	unsigned long mode;
-	
-	/* This feature is implemented in Rev C1 */
-	if (gfx_chip_revision < SC1200_REV_C1) return(GFX_STATUS_OK);
-
-	mode = READ_VID32(SC1200_TVOUT_HORZ_PRE_ENCODER_SCALE);
-	mode &= ~SC1200_TVOUT_YC_DELAY_MASK;
-	switch (delay)
-	{
-	case TV_YC_DELAY_NONE:
-		WRITE_VID32(SC1200_TVOUT_HORZ_PRE_ENCODER_SCALE, mode | SC1200_TVOUT_YC_DELAY_NONE);
-		break;
-	case TV_Y_DELAY_ONE_PIXEL:
-		WRITE_VID32(SC1200_TVOUT_HORZ_PRE_ENCODER_SCALE, mode | SC1200_TVOUT_Y_DELAY_ONE_PIXEL);
-		break;
-	case TV_C_DELAY_ONE_PIXEL:
-		WRITE_VID32(SC1200_TVOUT_HORZ_PRE_ENCODER_SCALE, mode | SC1200_TVOUT_C_DELAY_ONE_PIXEL);
-		break;
-	case TV_C_DELAY_TWO_PIXELS:
-		WRITE_VID32(SC1200_TVOUT_HORZ_PRE_ENCODER_SCALE, mode | SC1200_TVOUT_C_DELAY_TWO_PIXELS);
-		break;
-	default:
-		return GFX_STATUS_BAD_PARAMETER;
-	}
-	return(GFX_STATUS_OK);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_set_tvenc_reset_interval
- *
- * This routine sets the interval between external resets of the TV encoder
- * timing generator by the TV out.
- *-----------------------------------------------------------------------------
- */
-#if GFX_TV_DYNAMIC
-int sc1200_set_tvenc_reset_interval(int interval)
-#else
-int gfx_set_tvenc_reset_interval(int interval)
-#endif
-{
-	unsigned long value;
-	value = READ_VID32(SC1200_TVOUT_HORZ_SCALING);
-	value &= ~SC1200_TVENC_EXTERNAL_RESET_INTERVAL_MASK;
-	switch (interval)
-	{
-	case TVENC_RESET_EVERY_ODD_FIELD:
-		WRITE_VID32(SC1200_TVOUT_HORZ_SCALING, value | SC1200_TVENC_EXTERNAL_RESET_EVERY_ODD_FIELD);
-		break;
-	case TVENC_RESET_EVERY_EVEN_FIELD:
-		WRITE_VID32(SC1200_TVOUT_HORZ_SCALING, value | SC1200_TVENC_EXTERNAL_RESET_EVERY_EVEN_FIELD);
-		break;
-	case TVENC_RESET_NEXT_ODD_FIELD:
-		WRITE_VID32(SC1200_TVOUT_HORZ_SCALING, value | SC1200_TVENC_EXTERNAL_RESET_NEXT_ODD_FIELD);
-		break;
-	case TVENC_RESET_NEXT_EVEN_FIELD:
-		WRITE_VID32(SC1200_TVOUT_HORZ_SCALING, value | SC1200_TVENC_EXTERNAL_RESET_NEXT_EVEN_FIELD);
-		break;
-	case TVENC_RESET_EVERY_FIELD:
-		WRITE_VID32(SC1200_TVOUT_HORZ_SCALING, value | SC1200_TVENC_EXTERNAL_RESET_EVERY_FIELD);
-		break;
-	case TVENC_RESET_EVERY_X_ODD_FIELDS:
-	case TVENC_RESET_EVERY_X_EVEN_FIELDS:
-		return GFX_STATUS_UNSUPPORTED;		
-	default:
-		return GFX_STATUS_BAD_PARAMETER;
-	}
-	return(GFX_STATUS_OK);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_set_tv_cc_enable
- *
- * This routine enables or disables the use of the hardware CC registers 
- * in the TV encoder.
- *-----------------------------------------------------------------------------
- */
-#if GFX_TV_DYNAMIC
-int sc1200_set_tv_cc_enable(int enable)
-#else
-int gfx_set_tv_cc_enable(int enable)
-#endif
-{
-	unsigned long value;
-	value = READ_VID32(SC1200_TVENC_CC_CONTROL);
-	value &= ~(0x0005F);
-	if (enable) value |= 0x51;
-	WRITE_VID32(SC1200_TVENC_CC_CONTROL, value);
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_tv_display
- *
- * This routine sets the timings in the display controller to support a 
- * TV resolution.
- *---------------------------------------------------------------------------
- */
-#if GFX_TV_DYNAMIC
-int sc1200_set_tv_display(int width, int height)
-#else
-int gfx_set_tv_display(int width, int height)
-#endif
-{
-	DISPLAYMODE *pMode;
-	int i;
-
-	for (i = 0; i < NUM_TV_MODES; i++)
-	{
-		pMode = &TVTimings[i];
-		if ((unsigned)width == pMode->hactive && (unsigned)height == pMode->vactive)
-			break;
-	}
-	
-	if (i == NUM_TV_MODES)
-		return 0;
-
-	gfx_set_display_timings (gfx_get_display_bpp(), (unsigned short)pMode->flags,      pMode->hactive,  pMode->hblankstart,
-		                                                            pMode->hsyncstart, pMode->hsyncend, pMode->hblankend,
-								                                    pMode->htotal,     pMode->vactive,  pMode->vblankstart, 
-								                                    pMode->vsyncstart, pMode->vsyncend, pMode->vblankend, 
-								                                    pMode->vtotal,     pMode->frequency);
-
-	return 1;
-}
-
-/*-----------------------------------------------------------------------------
- * cc_add_parity_bit
- *
- * This routine adds the (odd) parity bit to the data character.
- *-----------------------------------------------------------------------------
- */
-unsigned char cc_add_parity_bit(unsigned char data)
-{
-	int i, num = 0;
-	unsigned char d = data;
-
-	for (i = 0; i < 7; i++)
-	{
-		if (d & 0x1)
-			num++;
-		d >>= 1;
-	}
-	if (num & 0x1)
-		return (data & ~0x80);
-	else
-		return (data | 0x80);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_set_tv_cc_data
- *
- * This routine writes the two specified characters to the CC data register 
- * of the TV encoder.
- *-----------------------------------------------------------------------------
- */
-#if GFX_TV_DYNAMIC
-int sc1200_set_tv_cc_data(unsigned char data1, unsigned char data2)
-#else
-int gfx_set_tv_cc_data(unsigned char data1, unsigned char data2)
-#endif
-{
-	unsigned long value;
-	value = cc_add_parity_bit(data1) | (cc_add_parity_bit(data2) << 8);
-	WRITE_VID32(SC1200_TVENC_CC_DATA, value);
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_test_tvout_odd_field
- * 
- * This routine returns 1 if the current TVout field is odd. Otherwise returns 0.
- *---------------------------------------------------------------------------
- */
-#if GFX_TV_DYNAMIC
-int sc1200_test_tvout_odd_field(void)
-#else
-int gfx_test_tvout_odd_field(void)
-#endif
-{
-	unsigned long debug = READ_VID32(SC1200_TVOUT_DEBUG);
-	WRITE_VID32(SC1200_TVOUT_DEBUG, debug | SC1200_TVOUT_FIELD_STATUS_TV);
-	if (READ_VID32(SC1200_TVOUT_DEBUG) & SC1200_TVOUT_FIELD_STATUS_EVEN)
-		return(0);
-	else return(1);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_test_tvenc_odd_field
- * 
- * This routine returns 1 if the current TV encoder field is odd. Otherwise returns 0.
- *---------------------------------------------------------------------------
- */
-#if GFX_TV_DYNAMIC
-int sc1200_test_tvenc_odd_field(void)
-#else
-int gfx_test_tvenc_odd_field(void)
-#endif
-{
-	unsigned long debug = READ_VID32(SC1200_TVOUT_DEBUG);
-	WRITE_VID32(SC1200_TVOUT_DEBUG, debug & ~SC1200_TVOUT_FIELD_STATUS_TV);
-	if (READ_VID32(SC1200_TVOUT_DEBUG) & SC1200_TVOUT_FIELD_STATUS_EVEN)
-		return(0);
-	else return(1);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_set_tv_field_status_invert
- *
- * This routines determines whether the tvout/tvencoder field status bit is
- * inverted (enable = 1) or not (enable = 0).
- *-----------------------------------------------------------------------------
- */
-#if GFX_TV_DYNAMIC
-int sc1200_set_tv_field_status_invert(int enable)
-#else
-int gfx_set_tv_field_status_invert(int enable)
-#endif
-{
-	unsigned long value;
-	value = READ_VID32(SC1200_TVOUT_DEBUG);
-	
-	if (enable) {
-		value |= SC1200_TVOUT_FIELD_STATUS_INVERT;
-	} else {
-		value &= ~(SC1200_TVOUT_FIELD_STATUS_INVERT);
-	}		
-		
-	WRITE_VID32(SC1200_TVOUT_DEBUG, value);
-	
-	return(GFX_STATUS_OK);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_tv_vphase
- * 
- * This routine returns the tv encoder vertical phase.
- *---------------------------------------------------------------------------
- */
-#if GFX_TV_DYNAMIC
-int sc1200_get_tv_vphase(void)
-#else
-int gfx_get_tv_vphase(void)
-#endif
-{
-	unsigned long mode = READ_VID32(SC1200_TVENC_TIM_CTRL_1);
-	return (int)((mode & SC1200_TVENC_VPHASE_MASK) >> SC1200_TVENC_VPHASE_POS);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_tv_enable
- * 
- * This routine returns the current tv enable status
- *---------------------------------------------------------------------------
- */
-#if GFX_TV_DYNAMIC
-int sc1200_get_tv_enable(unsigned int *p_on)
-#else
-int gfx_get_tv_enable(unsigned int *p_on)
-#endif
-{
-	unsigned long control = READ_VID32 (SC1200_TVENC_DAC_CONTROL);
-
-	*p_on = (unsigned int)(!(control & SC1200_TVENC_POWER_DOWN));
-	
-	return GFX_STATUS_OK;
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_tv_output
- * 
- * This routine returns the current programmed TV output type.  It does not
- * detect invalid configurations.
- *---------------------------------------------------------------------------
- */
-#if GFX_TV_DYNAMIC
-int sc1200_get_tv_output(void)
-#else
-int gfx_get_tv_output(void)
-#endif
-{
-	unsigned long ctrl2, ctrl3;
-	int format = 0;
-	
-	ctrl2 = READ_VID32 (SC1200_TVENC_TIM_CTRL_2);
-	ctrl3 = READ_VID32 (SC1200_TVENC_TIM_CTRL_3);
-
-	if ((ctrl2 & SC1200_TVENC_CFS_MASK) == SC1200_TVENC_CFS_SVIDEO)  
-		format = TV_OUTPUT_S_VIDEO;
-	else if (ctrl2 & SC1200_TVENC_OUTPUT_YCBCR) 
-		format = TV_OUTPUT_YUV;
-	else if ((ctrl2 & SC1200_TVENC_CFS_MASK) == SC1200_TVENC_CFS_CVBS)
-	{
-		if (ctrl3 & SC1200_TVENC_CM) format = TV_OUTPUT_SCART;
-		else format = TV_OUTPUT_COMPOSITE;
-	}
-	
-	return format;
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_tv_mode_count
- * 
- * This routine returns the number of valid TV out resolutions.
- *---------------------------------------------------------------------------
- */
-#if GFX_TV_DYNAMIC
-int sc1200_get_tv_mode_count(TVStandardType format)
-#else
-int gfx_get_tv_mode_count(TVStandardType format)
-#endif
-{
-	int mode, count = 0;
-	unsigned long flag;
-
-	switch (format)
-	{
-		case TV_STANDARD_NTSC: flag = GFX_MODE_TV_NTSC; break;
-		case TV_STANDARD_PAL:  flag = GFX_MODE_TV_PAL;  break;
-		default: return 0;
-	}
-
-	for (mode = 0; mode < NUM_TV_MODES; mode++)
-	{
-		if (TVTimings[mode].flags & flag) 
-			count++;
-	}
-
-	return count;
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_tv_display_mode
- * 
- * This routine returns the current TV display parameters.
- *---------------------------------------------------------------------------
- */
-#if GFX_TV_DYNAMIC
-int sc1200_get_tv_display_mode (int *width, int *height, int *bpp, int *hz)
-#else
-int gfx_get_tv_display_mode (int *width, int *height, int *bpp, int *hz)
-#endif
-{
-	unsigned long frequency;
-	unsigned long mode, flags;
-
-	*width    = gfx_get_hactive();
-	*height   = gfx_get_vactive();
-	*bpp      = gfx_get_display_bpp ();
-	frequency = gfx_get_clock_frequency ();
-	
-	for (mode = 0; mode < NUM_TV_MODES; mode++)
-	{
-		if (TVTimings[mode].hactive == (unsigned short)(*width)  &&
-			TVTimings[mode].vactive == (unsigned short)(*height) &&
-			TVTimings[mode].frequency == frequency)
-		{
-			flags = TVTimings[mode].flags;
-			
-			if (flags & GFX_MODE_TV_NTSC)     *hz = 60;
-			else if (flags & GFX_MODE_TV_PAL) *hz = 50;
-			else                              *hz = 0;
-			return (1);
-		}
-	}
-
-	return -1;
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_tv_display_mode_frequency
- *
- * This routine returns the PLL frequency of a given TV mode.
- *---------------------------------------------------------------------------
- */
-#if GFX_TV_DYNAMIC
-int sc1200_get_tv_display_mode_frequency (unsigned short width, unsigned short height, 
-									   TVStandardType format, int *frequency)
-#else
-int gfx_get_tv_display_mode_frequency (unsigned short width, unsigned short height, 
-									   TVStandardType format, int *frequency)
-#endif
-{
-	unsigned long mode, flag;
-	int retval = -1;
-	
-	*frequency = 0;
-
-	switch (format)
-	{
-		case TV_STANDARD_NTSC: flag = GFX_MODE_TV_NTSC; break;
-		case TV_STANDARD_PAL:  flag = GFX_MODE_TV_PAL;  break;
-		default: return -1;
-	}
-
-	for (mode = 0; mode < NUM_TV_MODES; mode++)
-	{
-		if ((TVTimings[mode].hactive == width)  &&
-			(TVTimings[mode].vactive == height) &&
-			(TVTimings[mode].flags & flag))
-		{
-			*frequency = TVTimings[mode].frequency;
-			retval = 1;
-		}
-	}
-	return retval;
-}
-
-/*---------------------------------------------------------------------------
- * gfx_is_tv_display_mode_supported
- * 
- * Returns >= 0 if the mode is available, -1 if the mode could not be found
- *---------------------------------------------------------------------------
- */
-#if GFX_TV_DYNAMIC
-int sc1200_is_tv_display_mode_supported (unsigned short width, unsigned short height, TVStandardType format)
-#else
-int gfx_is_tv_display_mode_supported (unsigned short width, unsigned short height, TVStandardType format)
-#endif
-{
-	unsigned long mode, flag;
-	
-	switch (format)
-	{
-		case TV_STANDARD_NTSC: flag = GFX_MODE_TV_NTSC; break;
-		case TV_STANDARD_PAL:  flag = GFX_MODE_TV_PAL;  break;
-		default: return -1;
-	}
-
-	for (mode = 0; mode < NUM_TV_MODES; mode++)
-	{
-		if (TVTimings[mode].hactive == width  &&
-			TVTimings[mode].vactive == height &&
-			(TVTimings[mode].flags & flag))
-		{
-			return ((int)mode);
-		}
-	}
-
-	return -1;
-}
-
-
-/* END OF FILE */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/tv_fs450.c b/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/tv_fs450.c
deleted file mode 100644
index 488d07506..000000000
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/tv_fs450.c
+++ /dev/null
@@ -1,3437 +0,0 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/tv_fs450.c,v 1.2 2002/10/18 20:02:40 tsi Exp $ */
-/*
- * $Workfile: tv_fs450.c $
- *
- * This file contains routines to control the FS450 tvout encoder.
- *
- * NSC_LIC_ALTERNATIVE_PREAMBLE
- *
- * Revision 1.0
- *
- * National Semiconductor Alternative GPL-BSD License
- *
- * National Semiconductor Corporation licenses this software 
- * ("Software"):
- *
- *      Durango
- *
- * under one of the two following licenses, depending on how the 
- * Software is received by the Licensee.
- * 
- * If this Software is received as part of the Linux Framebuffer or
- * other GPL licensed software, then the GPL license designated 
- * NSC_LIC_GPL applies to this Software; in all other circumstances 
- * then the BSD-style license designated NSC_LIC_BSD shall apply.
- *
- * END_NSC_LIC_ALTERNATIVE_PREAMBLE */
-
-/* NSC_LIC_BSD
- *
- * National Semiconductor Corporation Open Source License for Durango
- *
- * (BSD License with Export Notice)
- *
- * Copyright (c) 1999-2001
- * National Semiconductor Corporation.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without 
- * modification, are permitted provided that the following conditions 
- * are met: 
- *
- *   * Redistributions of source code must retain the above copyright 
- *     notice, this list of conditions and the following disclaimer. 
- *
- *   * Redistributions in binary form must reproduce the above 
- *     copyright notice, this list of conditions and the following 
- *     disclaimer in the documentation and/or other materials provided 
- *     with the distribution. 
- *
- *   * Neither the name of the National Semiconductor Corporation nor 
- *     the names of its contributors may be used to endorse or promote 
- *     products derived from this software without specific prior 
- *     written permission. 
- * 
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
- * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
- * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE,
- * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
- * OF SUCH DAMAGE.
- *
- * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
- * YOUR JURISDICTION. It is licensee's responsibility to comply with 
- * any export regulations applicable in licensee's jurisdiction. Under 
- * CURRENT (2001) U.S. export regulations this software 
- * is eligible for export from the U.S. and can be downloaded by or 
- * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
- * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
- * Syria, Sudan, Afghanistan and any other country to which the U.S. 
- * has embargoed goods and services. 
- *
- * END_NSC_LIC_BSD */
-
-/* NSC_LIC_GPL
- *
- * National Semiconductor Corporation Gnu General Public License for Durango
- *
- * (GPL License with Export Notice)
- *
- * Copyright (c) 1999-2001
- * National Semiconductor Corporation.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without 
- * modification, are permitted under the terms of the GNU General 
- * Public License as published by the Free Software Foundation; either 
- * version 2 of the License, or (at your option) any later version  
- *
- * In addition to the terms of the GNU General Public License, neither 
- * the name of the National Semiconductor Corporation nor the names of 
- * its contributors may be used to endorse or promote products derived 
- * from this software without specific prior written permission. 
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
- * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
- * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, 
- * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
- * OF SUCH DAMAGE. See the GNU General Public License for more details. 
- *
- * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
- * YOUR JURISDICTION. It is licensee's responsibility to comply with 
- * any export regulations applicable in licensee's jurisdiction. Under 
- * CURRENT (2001) U.S. export regulations this software 
- * is eligible for export from the U.S. and can be downloaded by or 
- * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
- * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
- * Syria, Sudan, Afghanistan and any other country to which the U.S. 
- * has embargoed goods and services. 
- *
- * You should have received a copy of the GNU General Public License 
- * along with this file; if not, write to the Free Software Foundation, 
- * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 
- *
- * END_NSC_LIC_GPL */
-
-
-#define	FS450_DIRECTREG	0
-
-#include "tv_fs450.h"
-
-/*==========================================================================
-*
-*	Macros
-*
-*==========================================================================
-*/
-
-#undef		fsmax
-#undef		fsmin
-#define		fsmax(a, b)		((a) > (b) ? (a) : (b))
-#define		fsmin(a, b)		((a) < (b) ? (a) : (b))
-
-#undef range_limit
-#define range_limit(val,min_val,max_val) (fsmax((min_val),fsmin((val),(max_val))))
-
-/*==========================================================================
-*
-*	Registers
-*
-*==========================================================================
-*/
-
-#define MAX_REGISTERS	32
-#define MAX_BITS		32
-
-#define READ	1
-#define WRITE	2
-#define READ_WRITE (READ | WRITE)
-
-typedef struct
-{
-	char *name;
-	unsigned long offset;
-	unsigned char bit_length;
-	unsigned char valid_bits;
-	unsigned char read_write;
-	char *bitfield_names[MAX_BITS];
-} S_REGISTER_DESCRIP;
-
-typedef struct
-{
-	int source;
-	char *name;
-	S_REGISTER_DESCRIP registers[MAX_REGISTERS];
-} S_SET_DESCRIP;
-
-const S_SET_DESCRIP *houston_regs(void);
-const S_SET_DESCRIP *encoder_regs(void);
-const S_SET_DESCRIP *macrovision_regs(void);
-const S_SET_DESCRIP *gcc_regs(void);
-
-/*==========================================================================
-*
-*	Houston Register Addresses & Bit Definitions
-*
-*==========================================================================
-*/
-
-#define	HOUSTON_IHO				0x00	/*Input Horizontal Offset*/
-#define	HOUSTON_IVO				0x02	/*Input Vertical Offset*/
-#define	HOUSTON_IHA				0x04	/*Input Horizontal Active Width*/
-#define	HOUSTON_VSC				0x06	/*Vertical Scaling Coeficient*/
-#define	HOUSTON_HSC				0x08	/*Horizontal Scaling Coeficient*/
-#define	HOUSTON_BYP				0x0A	/*Bypass Register*/
-#define	HOUSTON_CR				0x0C	/*Control Register*/
-#define	HOUSTON_SP				0x0E	/*Status*/
-#define	HOUSTON_NCONL			0x10	/*NCO numerator low word*/
-#define	HOUSTON_NCONH			0x12	/*NCO numerator high word*/
-#define	HOUSTON_NCODL			0x14	/*NCO denominator low word*/
-#define	HOUSTON_NCODH			0x16	/*NCO denominator high word*/
-#define	HOUSTON_APO				0x18	/**/
-#define	HOUSTON_ALO				0x1A	/**/
-#define	HOUSTON_AFO				0x1C	/**/
-#define	HOUSTON_HSOUTWID		0x1E	/**/
-#define	HOUSTON_HSOUTST			0x20	/**/
-#define	HOUSTON_HSOUTEND		0x22	/**/
-#define	HOUSTON_SHP				0x24	/*Sharpness*/
-#define	HOUSTON_FLK				0x26	/*Flicker Filter*/
-#define	HOUSTON_BCONTL			0x28	/**/
-#define	HOUSTON_BCONTH			0x2A	/**/
-#define	HOUSTON_BDONE			0x2C	/**/
-#define	HOUSTON_BDIAGL			0x2E	/**/
-#define	HOUSTON_BDIAGH			0x30	/**/
-#define	HOUSTON_REV				0x32	/**/
-#define	HOUSTON_MISC			0x34	/**/
-#define	HOUSTON_FFO				0x36	/**/
-#define	HOUSTON_FFO_LAT			0x38	/**/
-#define HOUSTON_VSOUTWID		0x3A
-#define HOUSTON_VSOUTST			0x3C
-#define HOUSTON_VSOUTEND		0x3E
-
-/*//	BYP Register Bits*/
-#define	BYP_RGB_BYPASS			0x0001
-#define	BYP_HDS_BYPASS			0x0002
-#define	BYP_HDS_TBYPASS			0x0004
-#define	BYP_CAC_BYPASS			0x0008
-#define	BYP_R2V_SBYPASS			0x0010
-#define	BYP_R2V_BYPASS			0x0020
-#define	BYP_VDS_BYPASS			0x0040
-#define	BYP_FFT_BYPASS			0x0080
-#define	BYP_FIF_BYPASS			0x0100
-#define	BYP_FIF_TBYPASS			0x0200
-#define	BYP_HUS_BYPASS			0x0400
-#define	BYP_HUS_TBYPASS			0x0800
-#define	BYP_CCR_BYPASS			0x1000
-#define	BYP_PLL_BYPASS			0x2000
-#define	BYP_NCO_BYPASS			0x4000
-#define	BYP_ENC_BYPASS			0x8000
-
-/*//	CR Register Bits*/
-#define	CR_RESET				0x0001
-#define	CR_CLKOFF				0x0002
-#define	CR_NCO_EN				0x0004
-#define	CR_COMPOFF				0x0008
-#define	CR_YCOFF				0x0010
-#define	CR_LP_EN				0x0020
-#define	CR_CACQ_CLR				0x0040
-#define	CR_FFO_CLR				0x0080
-#define	CR_656_PAL_NTSC			0x0100
-#define	CR_656_STD_VMI			0x0200
-#define	CR_OFMT					0x0400
-#define	CR_UIM_CLK				0x0800
-#define	CR_UIM_DEC				0x1000
-#define	CR_BIPGEN_EN1			0x2000
-#define	CR_UIM_MOD0				0x4000
-#define	CR_UIM_MOD1				0x8000
-
-/*//	Status Register Bits*/
-#define	SP_CACQ_ST				0x0001
-#define	SP_FFO_ST				0x0002
-#define	SP_REVID_MASK			0x7FFC
-#define	SP_MV_EN				0x8000
-
-/*//	BDONE Register Bits*/
-#define	BDONE_BIST_DONE_A		0x0001
-#define	BDONE_BIST_DONE_B		0x0002
-#define	BDONE_BIST_DONE_C		0x0004
-#define	BDONE_BIST_DONE_D		0x0008
-#define	BDONE_BIST_DONE_E		0x0010
-#define	BDONE_BIST_DONE_F		0x0020
-#define	BDONE_BIST_DONE_G		0x0040
-
-/*//	BDIAGL Register Bits*/
-#define	BDIAGL_BIST_DIAG_A		0x000F
-#define	BDIAGL_BIST_DIAG_B		0x00F0
-#define	BDIAGL_BIST_DIAG_C		0x0F00
-#define	BDIAGL_BIST_DIAG_D		0xF000
-
-/*//	BDIAGH Register Bits*/
-#define	BDIAGH_BIST_DIAG_E		0x000F
-#define	BDIAGH_BIST_DIAG_F		0x000F
-#define	BDIAGH_BIST_DIAG_G		0x000F
-
-/*//	MISC Register Bits*/
-#define	MISC_TV_SHORT_FLD		0x0001
-#define	MISC_ENC_TEST			0x0002
-#define	MISC_DAC_TEST			0x0004
-#define	MISC_MV_SOFT_EN			0x0008
-#define	MISC_NCO_LOAD0			0x0010
-#define	MISC_NCO_LOAD1			0x0020
-#define	MISC_VGACKDIV			0x0200
-#define	MISC_BRIDGE_SYNC		0x0400
-#define	MISC_GTLIO_PD			0x8000
-
-
-/*==========================================================================
-*
-*	Encoder Registers & Bit Definitions
-*
-*==========================================================================
-*/
-
-#define	ENC_CHROMA_FREQ		0x40
-#define	ENC_CHROMA_PHASE	0x44
-#define	ENC_REG05			0x45
-#define	ENC_REG06			0x46
-#define	ENC_REG07			0x47
-#define	ENC_HSYNC_WIDTH		0x48
-#define	ENC_BURST_WIDTH		0x49
-#define	ENC_BACK_PORCH		0x4A
-#define	ENC_CB_BURST_LEVEL	0x4B
-#define	ENC_CR_BURST_LEVEL	0x4C
-#define	ENC_SLAVE_MODE		0x4D
-#define	ENC_BLACK_LEVEL		0x4e
-#define	ENC_BLANK_LEVEL		0x50
-#define	ENC_NUM_LINES		0x57
-#define	ENC_WHITE_LEVEL		0x5e
-#define	ENC_CB_GAIN			0x60
-#define	ENC_CR_GAIN			0x62
-#define	ENC_TINT			0x65
-#define	ENC_BREEZE_WAY		0x69
-#define	ENC_FRONT_PORCH		0x6C
-#define	ENC_ACTIVELINE		0x71
-#define	ENC_FIRST_LINE		0x73
-#define	ENC_REG34			0x74
-#define	ENC_SYNC_LEVEL		0x75
-#define	ENC_VBI_BLANK_LEVEL	0x7C
-#define	ENC_RESET			0x7e
-#define	ENC_NOTCH_FILTER	0x8d
-
-/*==========================================================================
-*
-*	Macrovision Registers & Bit Definitions
-*
-*==========================================================================
-*/
-
-#define		MV_N0			0x59	
-#define		MV_N1			0x52	
-#define		MV_N2			0x7b	
-#define		MV_N3			0x53	
-#define		MV_N4			0x79	
-#define		MV_N5			0x5d	
-#define		MV_N6			0x7a	
-#define		MV_N7			0x64	
-#define		MV_N8			0x54	
-#define		MV_N9			0x55	
-#define		MV_N10			0x56	
-#define		MV_N11			0x6d	
-#define		MV_N12			0x6f	
-#define		MV_N13			0x5a	
-#define		MV_N14			0x5b	
-#define		MV_N15			0x5c	
-#define		MV_N16			0x63	
-#define		MV_N17			0x66	
-#define		MV_N18			0x68	
-#define		MV_N19			0x67	
-#define		MV_N20			0x61	
-#define		MV_N21			0x6a	
-#define		MV_N22			0x76	
-#define		MV_AGC_PULSE_LEVEL	0x77	
-#define		MV_BP_PULSE_LEVEL	0x78	
-
-/*==========================================================================
-*
-*	The TRACE macro can be used to display debug information.  It can display
-*	one or more parameters in a formatted string like printf.  No code will be
-*	generated for a release build.  Use double parentheses for compatibility
-*	with C #define statements.  Newline characters are not added
-*	automatically.  Usage example:
-*
-*	TRACE(("Number is %d, Name is %s.\n",iNumber,lpszName))
-*
-*==========================================================================
-*/
-
-/*//#ifdef _DEBUG*/
-/*//void trace(const char *p_fmt,...);*/
-/*//#define TRACE(parameters) {trace parameters;}*/
-/*//#else*/
-#define TRACE(parameters) {}
-/*//#endif*/
-
-/****/
-/*//	GCC timing structure.*/
-/****/
-typedef struct _S_TIMING_SPECS
-{
-	int vga_width;
-	int vga_lines;
-	int tv_width;
-	int tv_lines;
-	int h_total;
-	int h_sync;
-	int v_total;
-	int v_sync;
-} S_TIMING_SPECS;
-
-/****/
-/*//	Revision of Houston chip*/
-/****/
-#define HOUSTON_REV_A 0
-#define HOUSTON_REV_B 1
-static int houston_Rev(void);
-
-/*==========================================================================
-*
-*	Functions
-*
-*==========================================================================
-*/
-
-static int houston_init(void);
-
-static unsigned char PLAL_FS450_i2c_address(void);
-static int PLAL_FS450_UIM_mode(void);
-static int PLAL_ReadRegister(S_REG_INFO *p_reg);
-static int PLAL_WriteRegister(const S_REG_INFO *p_reg);
-static int PLAL_IsTVOn(void);
-static int PLAL_EnableVga(void);
-static int PLAL_PrepForTVout(void);
-static int PLAL_SetTVTimingRegisters(const S_TIMING_SPECS *p_specs);
-static int PLAL_FinalEnableTVout(unsigned long vga_mode);
-
-/****/
-/*Direct Memory Access Functions*/
-/****/
-/*NOTE: Cx5530 is assumed hardcoded at 0x10000 offset*/
-/*from MediaGX base. F4Bar is bogus as described in the*/
-/*Cx5530 datasheet (actually points to GX frame buffer).*/
-/****/
-static int DMAL_ReadUInt32(unsigned long phys_addr, unsigned long *p_data)
-{
-	*p_data = READ_REG32(phys_addr);
-	return 0;
-}
-
-static int DMAL_WriteUInt32(unsigned long phys_addr, unsigned long data)
-{
-	WRITE_REG32(phys_addr, data);
-	return 0;
-}
-
-/****/
-/*Houston register access functions.*/
-/****/
-static int houston_ReadReg(unsigned int reg, unsigned long *p_value, unsigned int bytes)
-{
-	return gfx_i2c_read(1, PLAL_FS450_i2c_address(), (unsigned char)reg,
-		               (unsigned char)bytes, (unsigned char *)p_value);
-}
-
-static int houston_WriteReg(unsigned int reg, unsigned long value, unsigned int bytes)
-{
-	return gfx_i2c_write(1, PLAL_FS450_i2c_address(), (unsigned char)reg,
-		                (unsigned char)bytes, (unsigned char *)&value);
-}
-
-/****/
-/*TV configuration functions.*/
-/****/
-static int config_init(void);
-static const S_TIMING_SPECS *p_specs(void);
-static void config_power(int on);
-static void config_vga_mode(unsigned long vga_mode);
-static void config_tv_std(unsigned long tv_std, unsigned int trigger_bits);
-static void conget_tv_std(unsigned long *p_tv_std);
-static unsigned long supported_standards(void);
-static void config_tvout_mode(unsigned long tvout_mode);
-static void conget_tvout_mode(unsigned long *p_tvout_mode);
-static void config_overscan_xy( unsigned long tv_std, unsigned long vga_mode,
-	int overscan_x, int overscan_y, int pos_x, int pos_y);
-static void config_nco(unsigned long tv_std,unsigned long vga_mode);
-static void config_sharpness(int sharpness);
-static void conget_sharpness(int *p_sharpness);
-static void config_flicker(int flicker);
-static void conget_flicker(int *p_flicker);
-static void config_color(int color);
-static void conget_color(int *p_color);
-static void config_brightness_contrast(unsigned long tv_std, unsigned int trigger_bits,
-		int brightness, int contrast);
-static void conget_brightness_contrast(unsigned long tv_std, unsigned int trigger_bits,
-		int *p_brightness,int *p_contrast);
-static void config_yc_filter(unsigned long tv_std,int luma_filter, int chroma_filter);
-static void conget_yc_filter(int *p_luma_filter, int *p_chroma_filter);
-static void config_macrovision(unsigned long tv_std, unsigned int cp_trigger_bits);
-static void conget_macrovision(unsigned long tv_std, unsigned int *p_cp_trigger_bits);
-
-/****/
-/*Device settings.*/
-/****/
-typedef struct _S_DEVICE_SETTINGS
-{
-	int tv_on;
-	unsigned long vga_mode;
-	unsigned long tv_std;
-	unsigned long tvout_mode;
-	int overscan_x;
-	int overscan_y;
-	int position_x;
-	int position_y;
-	int sharpness;
-	int flicker;
-	int color;
-	int brightness;
-	int contrast;
-	unsigned char yc_filter;
-	unsigned int aps_trigger_bits;
-	int last_overscan_y;
-} S_DEVICE_SETTINGS;
-
-static S_DEVICE_SETTINGS d;
-
-/*//==========================================================================*/
-/****/
-/*TV Setup Parameters*/
-/****/
-/*//==========================================================================*/
-
-static const struct
-{
-	unsigned long chroma_freq[5];
-	unsigned short chroma_phase[5];
-	unsigned short cphase_rst[5];
-	unsigned short color[5];
-	unsigned short cr_burst_level[5];
-	unsigned short cb_burst_level[5];
-	unsigned short sys625_50[5];
-	unsigned short vsync5[5];
-	unsigned short pal_mode[5];
-	unsigned short hsync_width[5];
-	unsigned short burst_width[5];
-	unsigned short back_porch[5];
-	unsigned short front_porch[5];
-	unsigned short breeze_way[5];
-	unsigned short activeline[5];
-	unsigned short blank_level[5];
-	unsigned short vbi_blank_level[5];
-	unsigned short black_level[5];
-	unsigned short white_level[5];
-	unsigned short hamp_offset[5];
-	unsigned short sync_level[5];
-	unsigned short tv_lines[5];
-	unsigned short tv_width[5];
-	unsigned short tv_active_lines[5];
-	unsigned short tv_active_width[5];
-	unsigned char	notch_filter[5];
-	unsigned short	houston_cr[5];
-	unsigned short	houston_ncodl[5];
-	unsigned short	houston_ncodh[5];
-} tvsetup =
-{
-	/*     ntsc,        pal,   ntsc-eij,      pal-m,      pal-n*/
-	{ 0x1f7cf021, 0xcb8a092a, 0x1f7cf021, 0xe3efe621, 0xcb8a092a },    /*chroma_freq*/
-	{          0,          0,          0,          0,          0 },    /*chroma_phase*/
-	{          2,          0,          2,          0,          0 },    /*cphase_rst*/
-	{         54,         43,         54,         43,         43 },    /*color*/
-	{          0,         31,          0,         29,         29 },    /*cr_burst_level*/
-	{         59,         44,         59,         41,         41 },    /*cb_burst_level*/
-	{          0,          1,          0,          0,          1 },    /*sys625_50*/
-	{          0,          1,          0,          0,          0 },    /*vsync5*/
-	{          0,          1,          0,          1,          1 },    /*pal_mode*/
-	{       0x7a,		0x7a,		0x7a,		0x7a,		0x7a },    /*hsync_width*/
-	{       0x40,		0x3c,		0x40,		0x40,		0x3c },    /*burst_width*/
-	{       0x80,		0x9a,		0x80,		0x80,		0x9a },    /*back_porch*/
-	{       0x24,		0x1e,		0x24,		0x24,		0x1e },    /*front_porch*/
-	{       0x19,		0x1a,		0x19,		0x12,		0x1a },    /*breeze_way*/
-	{       0xb4,       0xb4,       0xb4,       0xb4,       0xb4 },    /*active_line*/
-	{        240,        251,        240,        240,        240 },    /*blank_level*/
-	{        240,        251,        240,        240,        240 },    /*vbi_blank_level*/
-	{        284,        252,        240,        252,        252 },    /*black_level*/
-	{        823,        821,        823,        821,        821 },    /*white_level*/
-	{         60,		  48,		  60,   	  48,		  48 },	   /*hamp_offset*/
-	{       0x08,		0x08,		0x08,		0x08,		0x08 },    /*sync_level*/
-	{        525,        625,        525,        525,        625 },    /*tv_lines*/
-	{        858,        864,        858,        858,        864 },    /*tv_width*/
-	{        487,        576,        487,        487,        576 },    /*tv_active_lines*/
-	{        800,        800,        800,        800,        800 },    /*tv_active_width*/
-	{       0x1a,       0x1d,       0x1a,       0x1d,       0x1d },    /*notch filter enabled*/
-	{     0x0000,     0x0100,     0x0000,     0x0000,     0x0100 },    /*houston cr pal*/
-	{     0x7e48,     0xf580,     0x7e48,     0x7e48,     0xf580 },    /*houston ncodl*/
-	{     0x001b,     0x0020,     0x001b,     0x001b,     0x0020 }     /*houston ncodh*/
-};
-
-/****/
-/*MediaGX default underscan and centered position setups.*/
-/****/
-#define	SCANTABLE_ENTRIES	5
-struct _scantable
-{
-	unsigned long mode;
-	unsigned short	v_total[5];
-	unsigned short	v_sync[5];
-	unsigned short	iha[5];
-	signed short	iho[5];
-	signed short	hsc[5];
-};
-
-static struct _scantable  scantable[SCANTABLE_ENTRIES] =
-{
-	{
-		GFX_VGA_MODE_640X480,
-		{ 617,	624,	617,	624,	624 },	/*v_total*/
-		{ 69,	88,		69,		88,		88 },	/*v_sync*/
-		{ 720,	720,	720,	720,	720 },	/*iha */
-		{   0,	 0,		 0,		0,		0 },	/*iho */
-		{ -12,	 0,		-6,		0,		0 }		/*hsc*/
-	},
-	{
-		GFX_VGA_MODE_800X600,
-		{ 740,	740,	740,	740,	740 },	/*v_total*/
-		{ 90,	88,		90,		88,		88  },	/*v_sync*/
-		{ 720,	720,	508,	720,	720 },	/*iha */
-		{ -8,   11,	    -8,	    -8,		11  },	/*iho */
-		{ -27,	-27,	-27,	-27,	-27 }	/*hsc*/
-	},
-	{
-		GFX_VGA_MODE_720X487,
-		{ 525,	720,	525,	720,	720 },	/*v_total*/
-		{ 23,	230,	23,		230,	230 },	/*v_sync*/
-		{ 720,	720,	720,	720,	720 },	/*iha */
-		{ 0xa2,	0xa2,	0xa2,	0xa2,	0xa2 },	/*iho */
-		{ 0,	0,		0,		0,		0 }		/*hsc*/
-	},
-	{
-		GFX_VGA_MODE_720X576,
-		{ 720,	625,	720,	625,	625 },	/*v_total*/
-		{ 129,	25,		129,	25,		25 },	/*v_sync*/
-		{ 720,	720,	720,	720,	720 },	/*iha */
-		{ 0xaa,	0xaa,	0xaa,	0xaa,	0xaa },	/*iho */
-		{ 0,	0,		0,		0,		0 }		/*hsc*/
-	},
-	{
-		GFX_VGA_MODE_1024X768,
-		{ 933,	942,	933,	806,	806 },	/*v_total*/
-		{ 121,	112,	121,	88,		88 },	/*v_sync*/
-		{ 600,	600,	600,	600,	600 },	/*iha */
-		{ 0x3c,	0x23,	0x3c,	0x65,	0x65 },	/*iho */
-		{ 35,	26,		35,		26,		26 }	/*hsc*/
-	},
-};
-
-/****/
-/*Houston fifo configuration constants.*/
-/****/
-struct _ffolat
-{
-	int v_total;
-	unsigned short ffolat;
-};
-
-struct _ffolativo
-{
-	int v_total;
-	unsigned short ivo;
-	unsigned short ffolat;
-};
-
-/*h_total=832, ivo=40, tv_width=858, tv_lines=525, vga_lines=480*/
-#define SIZE6X4NTSC		66
-static struct _ffolat ffo6x4ntsc[SIZE6X4NTSC+1] =
-{
-	{ 541, 0x40 }, { 545, 0x40 }, { 549, 0x40 }, { 553, 0x40 },
-	{ 557, 0x58 }, { 561, 0x40 }, { 565, 0x40 }, { 569, 0x40 },
-	{ 573, 0x48 }, { 577, 0x40 }, { 581, 0x40 }, { 585, 0x40 },
-	{ 589, 0x40 }, { 593, 0x48 }, { 597, 0x40 }, { 601, 0x40 },
-	{ 605, 0x40 }, { 609, 0x40 }, { 613, 0x5b }, { 617, 0x48 },
-	{ 621, 0x60 }, { 625, 0x48 }, { 629, 0x48 }, { 633, 0x40 },
-	{ 637, 0x5e }, { 641, 0x40 }, { 645, 0x50 }, { 649, 0x56 },
-	{ 653, 0x58 }, { 657, 0x6c }, { 661, 0x40 }, { 665, 0x40 },
-	{ 669, 0x40 }, { 673, 0x40 }, { 677, 0x40 }, { 681, 0x40 },
-	{ 685, 0x40 }, { 689, 0x40 }, { 693, 0x40 }, { 697, 0x40 },
-	{ 701, 0x40 }, { 705, 0x40 }, { 709, 0x40 }, { 713, 0x40 },
-	{ 717, 0x40 }, { 721, 0x40 }, { 725, 0x40 }, { 729, 0x40 },
-	{ 733, 0x40 }, { 737, 0x40 }, { 741, 0x40 }, { 745, 0x40 },
-	{ 749, 0x40 }, { 753, 0x40 }, { 757, 0x40 }, { 761, 0x40 },
-	{ 765, 0x40 }, { 769, 0x40 }, { 773, 0x40 }, { 777, 0x40 },
-	{ 781, 0x40 }, { 785, 0x40 }, { 789, 0x40 }, { 793, 0x40 },
-	{ 797, 0x30 }, { 801, 0x40 },
-	{ -1, 0 }
-};
-
-#define SIZE6X4PAL		45
-static struct _ffolat ffo6x4pal[SIZE6X4PAL+1] =
-{
-	{ 625, 0x60 }, { 629, 0x60 }, { 633, 0x60 }, { 637, 0x60 },
-	{ 641, 0x50 }, { 645, 0x60 }, { 649, 0x60 }, { 653, 0x60 },
-	{ 657, 0x60 }, { 661, 0x60 }, { 665, 0x60 }, { 669, 0x60 },
-	{ 673, 0x60 }, { 677, 0x60 }, { 681, 0x60 }, { 685, 0x60 },
-	{ 689, 0x60 }, { 693, 0x60 }, { 697, 0x60 }, { 701, 0x60 },
-	{ 705, 0x60 }, { 709, 0x60 }, { 713, 0x60 }, { 717, 0x60 },
-	{ 721, 0x60 }, { 725, 0x60 }, { 729, 0x60 }, { 733, 0x60 },
-	{ 737, 0x60 }, { 741, 0x60 }, { 745, 0x60 }, { 749, 0x60 },
-	{ 753, 0x60 }, { 757, 0x60 }, { 761, 0x60 }, { 765, 0x60 },
-	{ 769, 0x60 }, { 773, 0x60 }, { 777, 0x60 }, { 781, 0x60 },
-	{ 785, 0x60 }, { 789, 0x60 }, { 793, 0x60 }, { 797, 0x60 },
-	{ 801, 0x60 },
-	{ -1, 0 }
-};
-
-#define SIZE7X4NTSC		40
-static struct _ffolat ffo7x4ntsc[SIZE7X4NTSC+1] =
-{
-	{ 525, 0x52 }, { 529, 0x52 }, { 533, 0x52 }, { 537, 0x52 },
-	{ 541, 0x52 }, { 545, 0x40 }, { 549, 0x40 }, { 553, 0x40 },
-	{ 557, 0x58 }, { 561, 0x40 }, { 565, 0x58 }, { 569, 0x40 },
-	{ 573, 0x48 }, { 577, 0x40 }, { 581, 0x40 }, { 585, 0x40 },
-	{ 589, 0x40 }, { 593, 0x48 }, { 597, 0x40 }, { 601, 0x40 },
-	{ 605, 0x40 }, { 609, 0x40 }, { 613, 0x5b }, { 617, 0x48 },
-	{ 621, 0x60 }, { 625, 0x48 }, { 629, 0x48 }, { 633, 0x40 },
-	{ 637, 0x5e }, { 641, 0x40 }, { 645, 0x50 }, { 649, 0x56 },
-	{ 653, 0x58 }, { 657, 0x6c }, { 661, 0x40 }, { 665, 0x40 },
-	{ 669, 0x40 }, { 673, 0x40 }, { 677, 0x40 }, { 681, 0x40 },
-	{ -1, 0 }
-};
-
-#define SIZE7X4PAL		24
-static struct _ffolat ffo7x4pal[SIZE7X4PAL+1] =
-{
-	{ 625, 0x60 }, { 629, 0x60 }, { 633, 0x60 }, { 637, 0x60 },
-	{ 641, 0x50 }, { 645, 0x60 }, { 649, 0x60 }, { 653, 0x60 },
-	{ 657, 0x60 }, { 661, 0x60 }, { 665, 0x60 }, { 669, 0x60 },
-	{ 673, 0x60 }, { 677, 0x60 }, { 681, 0x60 }, { 685, 0x60 },
-	{ 689, 0x60 }, { 693, 0x60 }, { 697, 0x60 }, { 701, 0x60 },
-	{ 705, 0x60 }, { 709, 0x60 }, { 713, 0x60 }, { 717, 0x60 },
-	{ -1, 0 }
-};
-
-#define SIZE7X5NTSC		54
-static struct _ffolat ffo7x5ntsc[SIZE7X5NTSC+1] =
-{
-	{ 590, 0x40 }, { 594, 0x48 }, { 598, 0x40 }, { 602, 0x40 },
-	{ 606, 0x40 }, { 610, 0x40 }, { 614, 0x5b }, { 618, 0x48 },
-	{ 622, 0x60 }, { 626, 0x48 }, { 630, 0x48 }, { 634, 0x40 },
-	{ 638, 0x5e }, { 642, 0x40 }, { 646, 0x50 }, { 650, 0x56 },
-	{ 654, 0x58 }, { 658, 0x6c }, { 662, 0x40 }, { 666, 0x40 },
-	{ 670, 0x40 }, { 674, 0x40 }, { 678, 0x40 }, { 682, 0x40 },
-	{ 686, 0x40 }, { 690, 0x40 }, { 694, 0x40 }, { 698, 0x40 },
-	{ 702, 0x40 }, { 706, 0x40 }, { 710, 0x40 }, { 714, 0x40 },
-	{ 718, 0x40 }, { 722, 0x40 }, { 726, 0x40 }, { 730, 0x40 },
-	{ 734, 0x40 }, { 738, 0x40 }, { 742, 0x40 }, { 746, 0x40 },
-	{ 750, 0x40 }, { 754, 0x40 }, { 758, 0x40 }, { 762, 0x40 },
-	{ 766, 0x40 }, { 770, 0x40 }, { 774, 0x40 }, { 778, 0x40 },
-	{ 782, 0x40 }, { 786, 0x40 }, { 790, 0x40 }, { 794, 0x40 },
-	{ 798, 0x30 }, { 802, 0x40 },
-	{ -1, 0 }
-};
-
-#define SIZE7X5PAL		45
-static struct _ffolat ffo7x5pal[SIZE7X5PAL+1] =
-{
-	{ 625, 0x60 }, { 629, 0x60 }, { 633, 0x60 }, { 637, 0x60 },
-	{ 641, 0x50 }, { 645, 0x60 }, { 649, 0x60 }, { 653, 0x60 },
-	{ 657, 0x60 }, { 661, 0x60 }, { 665, 0x60 }, { 669, 0x60 },
-	{ 673, 0x60 }, { 677, 0x60 }, { 681, 0x60 }, { 685, 0x60 },
-	{ 689, 0x60 }, { 693, 0x60 }, { 697, 0x60 }, { 701, 0x60 },
-	{ 705, 0x60 }, { 709, 0x60 }, { 713, 0x60 }, { 717, 0x60 },
-	{ 721, 0x60 }, { 725, 0x60 }, { 729, 0x60 }, { 733, 0x60 },
-	{ 737, 0x60 }, { 741, 0x60 }, { 745, 0x60 }, { 749, 0x60 },
-	{ 753, 0x60 }, { 757, 0x60 }, { 761, 0x60 }, { 765, 0x60 },
-	{ 769, 0x60 }, { 773, 0x60 }, { 777, 0x60 }, { 781, 0x60 },
-	{ 785, 0x60 }, { 789, 0x60 }, { 793, 0x60 }, { 797, 0x60 },
-	{ 801, 0x60 },
-	{ -1, 0 }
-};
-
-/*h_total=1056, vga_lines=600*/
-#define	SIZE8X6NTSC		37
-static struct _ffolat ffo8x6ntsc[SIZE8X6NTSC+1] = {
-	{ 620, 0x40 },	/*v_total_min >= vsync+10 >= vga_lines+10 = 610*/
-	{ 625, 0x58 }, { 630, 0x40 }, { 635, 0x40 }, { 640, 0x40 },
-	{ 645, 0x46 }, { 650, 0x46 }, { 655, 0x4f }, { 660, 0x4c },
-	{ 665, 0x4a }, { 670, 0x50 }, { 675, 0x2f }, { 680, 0x48 },
-	{ 685, 0x38 }, { 690, 0x31 }, { 695, 0x40 }, { 700, 0x21 },
-	{ 705, 0x25 }, { 710, 0x40 }, { 715, 0x48 }, { 720, 0x50 },
-	{ 725, 0x30 }, { 730, 0x50 }, { 735, 0x50 }, { 740, 0x50 },
-	{ 745, 0x40 }, { 750, 0x38 }, { 755, 0x50 }, { 760, 0x50 },
-	{ 765, 0x40 }, { 770, 0x38 }, { 775, 0x40 }, { 780, 0x40 },
-	{ 785, 0x40 }, { 790, 0x38 }, { 795, 0x50 }, { 800, 0x50 },
-	{ -1, 0 }
-};
-
-/*h_total=1056, vga_lines=600*/
-#define	SIZE8X6PAL		36
-static struct _ffolat ffo8x6pal[SIZE8X6PAL+1] = {
-	{ 625, 0x80 }, { 630, 0x80 }, { 635, 0x5a }, { 640, 0x55 },
-	{ 645, 0x48 }, { 650, 0x65 }, { 655, 0x65 }, { 660, 0x50 },
-	{ 665, 0x80 }, { 670, 0x70 }, { 675, 0x56 }, { 680, 0x80 },
-	{ 685, 0x58 }, { 690, 0x31 }, { 695, 0x80 }, { 700, 0x60 },
-	{ 705, 0x45 }, { 710, 0x4a }, { 715, 0x50 }, { 720, 0x50 },
-	{ 725, 0x50 }, { 730, 0x45 }, { 735, 0x50 }, { 740, 0x50 },
-	{ 745, 0x50 }, { 750, 0x50 }, { 755, 0x50 }, { 760, 0x50 },
-	{ 765, 0x50 }, { 770, 0x50 }, { 775, 0x50 }, { 780, 0x50 },
-	{ 785, 0x50 }, { 790, 0x50 }, { 795, 0x50 }, { 800, 0x50 },
-	{ -1, 0 }
-};
-
-/*h_total=1344, vga_lines=768*/
-#define	SIZE10X7NTSC		45
-static struct _ffolativo ffo10x7ntsc[SIZE10X7NTSC] = {
-	{ 783, 0x4d, 0x40 },
-	{ 789, 0x47, 0x14 },
-	{ 795, 0x47, 0x7f },
-	{ 801, 0x47, 0x53 },
-	{ 807, 0x47, 0x11 },
-	{ 813, 0x47, 0x78 },
-	{ 819, 0x47, 0x54 },
-	{ 825, 0x47, 0x40 },
-	{ 831, 0x47, 0x0f },
-	{ 837, 0x4d, 0x40 },
-	{ 843, 0x47, 0x5a },
-	{ 849, 0x4d, 0x40 },
-	{ 855, 0x47, 0x4b },
-	{ 861, 0x4d, 0x40 },
-	{ 867, 0x47, 0x4b },
-	{ 873, 0x4d, 0x40 },
-	{ 879, 0x47, 0x07 },
-	{ 885, 0x48, 0x20 },
-	{ 891, 0x47, 0x82 },
-	{ 897, 0x47, 0x60 },
-	{ 903, 0x47, 0x7f },
-	{ 909, 0x4d, 0x40 },
-	{ 915, 0x48, 0x40 },
-	{ 921, 0x4c, 0x40 },
-	{ 927, 0x49, 0x40 },
-	{ 933, 0x48, 0x40 },
-	{ 939, 0x4a, 0x40 },
-	{ 945, 0x46, 0x40 },
-	{ 951, 0x4a, 0x40 },
-	{ 957, 0x4a, 0x40 },
-	{ 963, 0x4b, 0x40 },
-	{ 969, 0x4b, 0x40 },
-	{ 975, 0x48, 0x40 },
-	{ 981, 0x47, 0x40 },
-	{ 987, 0x47, 0x40 },
-	{ 993, 0x47, 0x40 },
-	{ 999, 0x48, 0x40 },
-	{ 1005, 0x48, 0x40 },
-	{ 1011, 0x47, 0x40 },
-	{ 1017, 0x47, 0x40 },
-	{ 1023, 0x48, 0x40 },
-	{ 1029, 0x48, 0x40 },
-	{ 1035, 0x46, 0x40 },
-	{ 1041, 0x47, 0x40 },
-	{ 1047, 0x47, 0x40 }
-};
-
-/*h_total=1344, vga_lines=768*/
-#define	SIZE10X7PAL		46
-static struct _ffolativo ffo10x7pal[SIZE10X7PAL] = {
-	{ 781, 0x49, 0x40 },
-	{ 787, 0x46, 0x40 },
-	{ 793, 0x48, 0x40 },
-	{ 799, 0x46, 0x40 },
-	{ 805, 0x49, 0x40 },
-	{ 811, 0x47, 0x40 },
-	{ 817, 0x46, 0x40 },
-	{ 823, 0x46, 0x56 },
-	{ 829, 0x46, 0x2d },
-	{ 835, 0x46, 0x40 },
-	{ 841, 0x46, 0x2d },
-	{ 847, 0x46, 0x3f },
-	{ 853, 0x46, 0x10 },
-	{ 859, 0x46, 0x86 },
-	{ 865, 0x46, 0xc9 },
-	{ 871, 0x46, 0x83 },
-	{ 877, 0x46, 0xa8 },
-	{ 883, 0x46, 0x81 },
-	{ 889, 0x46, 0xa5 },
-	{ 895, 0x46, 0xa9 },
-	{ 901, 0x46, 0x81 },
-	{ 907, 0x46, 0xa4 },
-	{ 913, 0x46, 0xa5 },
-	{ 919, 0x46, 0x7f },
-	{ 925, 0x46, 0xa2 },
-	{ 931, 0x46, 0x9d },
-	{ 937, 0x46, 0xc1 },
-	{ 943, 0x46, 0x96 },
-	{ 949, 0x46, 0xb7 },
-	{ 955, 0x46, 0xb1 },
-	{ 961, 0x46, 0x8a },
-	{ 967, 0x46, 0xa9 },
-	{ 973, 0x46, 0xa0 },
-	{ 979, 0x46, 0x40 },
-	{ 985, 0x46, 0x97 },
-	{ 991, 0x46, 0xb5 },
-	{ 997, 0x46, 0xaa },
-	{ 1003, 0x46, 0x83 },
-	{ 1009, 0x46, 0x9f },
-	{ 1015, 0x47, 0x40 },
-	{ 1021, 0x46, 0xad },
-	{ 1027, 0x46, 0x87 },
-	{ 1033, 0x46, 0xa2 },
-	{ 1039, 0x47, 0x40 },
-	{ 1045, 0x46, 0xac },
-	{ 1051, 0x46, 0x86 }
-};
-
-/*//==========================================================================*/
-/****/
-/*FS450 API Functions.*/
-/****/
-/*//==========================================================================*/
-
-/****/
-/*Initialize device settings*/
-/****/
-static void initialize_houston_static_registers(void)
-{
-	houston_WriteReg(HOUSTON_BYP,	0, 2);
-	houston_WriteReg(HOUSTON_APO,	0, 2);
-	houston_WriteReg(HOUSTON_ALO,	0, 2);
-	houston_WriteReg(HOUSTON_AFO,	0, 2);
-	houston_WriteReg(HOUSTON_BCONTL,0, 2);
-	houston_WriteReg(HOUSTON_BCONTH,0, 2);
-	houston_WriteReg(HOUSTON_BDONE, 0, 2);
-	houston_WriteReg(HOUSTON_BDIAGL,0, 2);
-	houston_WriteReg(HOUSTON_BDIAGH,0, 2);
-	houston_WriteReg(HOUSTON_MISC,  0, 2);
-}
-
-int FS450_init(void)
-{
-	int err;
-
-	TRACE(("FS450_Init()\n"))
-
-	err = houston_init();
-	if (err)
-		return err;
-
-	
-	initialize_houston_static_registers();
-
-#if 1
-	d.tv_on = PLAL_IsTVOn() ? 1 : 0;
-#else
-	d.tv_on = 0;
-#endif
-
-#if 1
-	/*get the current tv standard*/
-	conget_tv_std(&d.tv_std);
-#else
-	/*default to VP_TV_STANDARD_NTSC_M*/
-	d.tv_std = VP_TV_STANDARD_NTSC_M;
-	config_tv_std(d.tv_std);
-#endif
-
-	d.vga_mode = 0;
-
-#if 0
-	/*get the current tvout mode*/
-	conget_tvout_mode(&d.tvout_mode);
-#else
-	/*default to VP_TVOUT_MODE_CVBS_YC*/
-	d.tvout_mode = GFX_TVOUT_MODE_CVBS_YC;
-#endif
-
-#if 0
-	/*get the current sharpness*/
-	conget_sharpness(d.sharpness);
-#else
-	/*default to 1000 out of 1000*/
-	d.sharpness = 1000;
-	config_sharpness(d.sharpness);
-#endif
-
-#if 0
-	/*get the current flicker*/
-	conget_flicker(d.flicker);
-#else
-	/*default to 800 out of 1000*/
-	d.flicker = 800;
-	config_flicker(d.flicker);
-#endif
-
-#if 0
-	/*get the current size and position*/
-#else
-	/*default to zeros*/
-	d.overscan_x = 0;
-	d.overscan_y = 0;
-	d.position_x = 0;
-	d.position_y = 0;
-#endif
-
-#if 0
-	/*get the current color*/
-	conget_color(d.color);
-#else
-	d.color = 50;
-	/*//d.color = tvsetup.color[k];*/
-	config_color(d.color);
-#endif
-
-#if 0
-	/*get the current brightness and contrast*/
-	conget_brightness_contrast(d.tv_std,d.aps_trigger_bits,d.brightness,d.contrast);
-#else
-	/*default*/
-	d.brightness = 50;
-	d.contrast = 60;
-	config_brightness_contrast(d.tv_std,d.aps_trigger_bits,d.brightness,d.contrast);
-#endif
-
-#if 1
-	/*get the current yc filtering*/
-	{
-		int luma_filter,chroma_filter;
-
-		conget_yc_filter(&luma_filter,&chroma_filter);
-		d.yc_filter = 0;
-		if (luma_filter)
-			d.yc_filter |= GFX_LUMA_FILTER;
-		if (chroma_filter)
-			d.yc_filter |= GFX_CHROMA_FILTER;
-	}
-#else
-	/*default*/
-	d.yc_filter = GFX_LUMA_FILTER + GFX_CHROMA_FILTER;
-#endif
-
-#if 0
-	/*get the current cp settings*/
-	conget_macrovision(d.tv_std,&d.aps_trigger_bits);
-#else
-	d.aps_trigger_bits = 0;
-	config_macrovision(d.tv_std,d.aps_trigger_bits);
-#endif
-
-	d.last_overscan_y = -10000;
-
-	return 0;
-}
-
-void FS450_cleanup(void)
-{
-}
-
-/*//==========================================================================*/
-/****/
-/*//	Required configuration calls to write new settings to the device*/
-
-#define REQ_TV_STANDARD_BIT			0x0002
-#define REQ_VGA_MODE_BIT			0x0004
-#define REQ_TVOUT_MODE_BIT			0x0008
-#define REQ_SHARPNESS_BIT			0x0010
-#define REQ_FLICKER_BIT				0x0020
-#define REQ_OVERSCAN_POSITION_BIT	0x0040
-#define REQ_COLOR_BIT				0x0080
-#define REQ_BRIGHTNESS_CONTRAST_BIT 0x0100
-#define REQ_YC_FILTER_BIT			0x0200
-#define REQ_MACROVISION_BIT			0x0400
-#define REQ_NCO_BIT					0x1000
-
-#define REQ_TV_STANDARD			(REQ_TV_STANDARD_BIT | REQ_OVERSCAN_POSITION | REQ_BRIGHTNESS_CONTRAST | REQ_MACROVISION_BIT | REQ_YC_FILTER)
-#define REQ_VGA_MODE			(REQ_VGA_MODE_BIT | REQ_OVERSCAN_POSITION)
-#define REQ_TVOUT_MODE			(REQ_TVOUT_MODE_BIT)
-#define REQ_SHARPNESS			(REQ_SHARPNESS_BIT)
-#define REQ_FLICKER				(REQ_FLICKER_BIT)
-#define REQ_OVERSCAN_POSITION	(REQ_OVERSCAN_POSITION_BIT | REQ_NCO)
-#define REQ_COLOR				(REQ_COLOR_BIT)
-#define REQ_BRIGHTNESS_CONTRAST	(REQ_BRIGHTNESS_CONTRAST_BIT)
-#define REQ_YC_FILTER			(REQ_YC_FILTER_BIT)
-#define REQ_MACROVISION			(REQ_TV_STANDARD_BIT | REQ_BRIGHTNESS_CONTRAST_BIT | REQ_MACROVISION_BIT)
-#define REQ_NCO					(REQ_NCO_BIT)
-#define REQ_ENCODER				(REQ_TV_STANDARD | REQ_COLOR | REQ_BRIGHTNESS_CONTRAST | REQ_YC_FILTER)
-
-static int write_config(int req)
-{
-	unsigned long reg, reg_encoder_reset = 0;
-	int reset;
-
-	/*if we're changing the nco, and the vertical scaling has changed...*/
-	reset = ((REQ_NCO_BIT & req) && (d.overscan_y != d.last_overscan_y));
-	if (reset)
-	{
-		/*put the encoder into reset while making changes*/
-		houston_ReadReg(ENC_RESET, &reg, 1);
-		houston_WriteReg(ENC_RESET, reg | 0x01, 1);
-		reg_encoder_reset = reg & 0x01;
-	}
-
-	if (REQ_TV_STANDARD_BIT & req)
-		config_tv_std(d.tv_std, d.aps_trigger_bits);
-
-	if (REQ_VGA_MODE_BIT & req)
-		config_vga_mode(d.vga_mode);
-
-	if (REQ_TVOUT_MODE_BIT & req)
-		config_tvout_mode(d.tvout_mode);
-
-	if (REQ_OVERSCAN_POSITION_BIT & req)
-	{
-		config_overscan_xy(
-			d.tv_std,
-			d.vga_mode,
-			d.overscan_x,
-			d.overscan_y,
-			d.position_x,
-			d.position_y);
-
-		/*h_timing and v_timing and syncs.*/
-		if (PLAL_IsTVOn())
-			PLAL_SetTVTimingRegisters(p_specs());
-	}
-
-	if (REQ_NCO_BIT & req)
-		config_nco(d.tv_std,d.vga_mode);
-
-	if (REQ_SHARPNESS_BIT & req)
-		config_sharpness(d.sharpness);
-
-	if (REQ_FLICKER_BIT & req)
-		config_flicker(d.flicker);
-
-	if (REQ_COLOR_BIT & req)
-		config_color(d.color);
-
-	if (REQ_BRIGHTNESS_CONTRAST_BIT & req)
-	{
-		config_brightness_contrast(
-			d.tv_std,
-			d.aps_trigger_bits,
-			d.brightness,
-			d.contrast);
-	}
-
-	if (REQ_YC_FILTER_BIT & req)
-	{
-		config_yc_filter(
-			d.tv_std,
-			(d.yc_filter & GFX_LUMA_FILTER),
-			(d.yc_filter & GFX_CHROMA_FILTER));
-	}
-
-	if (REQ_MACROVISION_BIT & req)
-		config_macrovision(d.tv_std,d.aps_trigger_bits);
-
-	/*if we decided to put the encoder into reset, put it back*/
-	if (reset)
-	{
-		houston_ReadReg(ENC_RESET, &reg, 1);
-		houston_WriteReg(ENC_RESET, reg_encoder_reset | (reg & ~0x01), 1);
-
-		d.last_overscan_y = d.overscan_y;
-	}
-	return 0;
-}
-
-/*==========================================================================*/
-/****/
-/*//	TV On*/
-
-#if GFX_TV_DYNAMIC
-int fs450_get_tv_enable(unsigned int *p_on)
-#else
-int gfx_get_tv_enable(unsigned int *p_on)
-#endif
-{
-	if (!p_on)
-		return ERR_INVALID_PARAMETER;
-
-	*p_on = d.tv_on;
-
-	return 0;
-}
-
-/*//int FS450_set_tv_on(unsigned int on)*/
-#if GFX_TV_DYNAMIC
-int fs450_set_tv_enable(int on)
-#else
-int gfx_set_tv_enable(int on)
-#endif
-{
-	unsigned long reg;
-
-	/*if not mode change, just return*/
-	if ((d.tv_on && on) || (!d.tv_on && !on))
-		return 0;
-
-	/*if turning off...*/
-	if (!on)
-	{
-		/*reenable vga.*/
-		PLAL_EnableVga();
-		
-		/*power down houston*/
-		config_power(0);
-
-		d.tv_on = 0;
-		
-		return 0;
-	}
-
-	/*turning on...*/
-
-	/*power up houston	*/
-	config_power(1);
-
-	/*assert encoder reset.*/
-	houston_WriteReg(ENC_RESET, 0x01, 1);
-
-	/*initial platform preparation*/
-	PLAL_PrepForTVout();
-
-	/*configure encoder and nco.*/
-	write_config(
-		REQ_VGA_MODE |
-		REQ_TV_STANDARD |
-		REQ_TVOUT_MODE |
-		REQ_OVERSCAN_POSITION |
-		REQ_YC_FILTER |
-		REQ_MACROVISION);
-
-	/*set LP_EN and UIM*/
-	houston_ReadReg(HOUSTON_CR, &reg, 2);
-	reg |= CR_LP_EN;
-	reg &= ~(CR_UIM_MOD0 | CR_UIM_MOD1);
-	reg |= (PLAL_FS450_UIM_mode() << 14);
-	houston_WriteReg(HOUSTON_CR,reg,2);
-
-	/*set platform timing registers*/
-	PLAL_SetTVTimingRegisters(p_specs());
-
-	PLAL_FinalEnableTVout(d.vga_mode);
-
-	/*sync bridge*/
-	{
-		int retry_count = 0;
-
-		/*sync 50 times*/
-		while (retry_count++ < 50)
-		{
-			/*sync bridge.*/
-			houston_ReadReg(HOUSTON_MISC, &reg, 2);
-			reg |= MISC_BRIDGE_SYNC;
-			houston_WriteReg(HOUSTON_MISC, reg, 2);
-			reg &= ~MISC_BRIDGE_SYNC;
-			houston_WriteReg(HOUSTON_MISC, reg, 2);
-		}
-	}			
-
-	/*deassert encoder reset.*/
-	houston_WriteReg(ENC_RESET, 0x00, 1);
-
-	d.tv_on = 1;
-
-	return 0;
-}
-
-#if GFX_TV_DYNAMIC
-int fs450_set_tv_defaults(int format)
-#else
-int gfx_set_tv_defaults(int format)
-#endif
-{
-	return 0;
-}
-
-/*==========================================================================*/
-/****/
-/*//	TV standard*/
-
-#if GFX_TV_DYNAMIC
-int fs450_get_tv_standard(unsigned long *p_standard)
-#else
-int gfx_get_tv_standard(unsigned long *p_standard)
-#endif
-{
-	if (!p_standard)
-		return ERR_INVALID_PARAMETER;
-
-	*p_standard = d.tv_std;
-
-	return 0;
-}
-
-#if GFX_TV_DYNAMIC
-int fs450_get_available_tv_standards(unsigned long *p_standards)
-#else
-int gfx_get_available_tv_standards(unsigned long *p_standards)
-#endif
-{
-	if (!p_standards)
-		return ERR_INVALID_PARAMETER;
-
-	*p_standards = supported_standards();
-
-	return 0;
-}
-
-#if GFX_TV_DYNAMIC
-int fs450_set_tv_standard(unsigned long standard)
-#else
-int gfx_set_tv_standard(unsigned long standard)
-#endif
-{
-	/*verify supported standard.*/
-	if (!(standard & supported_standards()))
-		return ERR_INVALID_PARAMETER;
-
-	/*disallow if tv is on*/
-	if (d.tv_on)
-		return ERR_CANNOT_CHANGE_WHILE_TV_ON;
-
-	d.tv_std = standard;
-/*//	d.color = tvsetup.color[k];*/
-
-	return write_config(REQ_TV_STANDARD);
-}
-
-/*==========================================================================*/
-/****/
-/*//	vga mode as known by the driver*/
-#if GFX_TV_DYNAMIC
-int fs450_get_tv_vga_mode(unsigned long *p_vga_mode)
-#else
-int gfx_get_tv_vga_mode(unsigned long *p_vga_mode)
-#endif
-
-{
-	if (!p_vga_mode)
-		return ERR_INVALID_PARAMETER;
-
-	*p_vga_mode = d.vga_mode;
-
-	return 0;
-}
-
-#if GFX_TV_DYNAMIC
-int fs450_get_available_tv_vga_modes(unsigned long *p_vga_modes)
-#else
-int gfx_get_available_tv_vga_modes(unsigned long *p_vga_modes)
-#endif
-{
-	if (!p_vga_modes)
-		return ERR_INVALID_PARAMETER;
-
-	*p_vga_modes =
-		GFX_VGA_MODE_640X480 |
-		GFX_VGA_MODE_720X487 |
-		GFX_VGA_MODE_720X576 |
-		GFX_VGA_MODE_800X600;
-	if (houston_Rev() >= HOUSTON_REV_B)
-		*p_vga_modes |= GFX_VGA_MODE_1024X768;
-
-	return 0;
-}
-
-#if GFX_TV_DYNAMIC
-int fs450_set_tv_vga_mode(unsigned long vga_mode)
-#else
-int gfx_set_tv_vga_mode(unsigned long vga_mode)
-#endif
-{
-	/*reject if not a single valid VGA mode*/
-	switch (vga_mode)
-	{
-		default:
-		return ERR_INVALID_PARAMETER;
-
-		case GFX_VGA_MODE_640X480:
-		case GFX_VGA_MODE_720X487:
-		case GFX_VGA_MODE_720X576:
-		case GFX_VGA_MODE_800X600:
-		break;
-
-		case GFX_VGA_MODE_1024X768:
-			if (houston_Rev() >= HOUSTON_REV_B)
-				break;
-		return ERR_INVALID_PARAMETER;
-	}
-
-	/*if the mode has changed...*/
-	if (vga_mode != d.vga_mode)
-	{
-		d.vga_mode = vga_mode;
-
-		return write_config(REQ_VGA_MODE);
-	}
-
-	return 0;
-}
-
-/*==========================================================================*/
-/****/
-/*//	tvout mode*/
-
-#if GFX_TV_DYNAMIC
-int fs450_get_tvout_mode(unsigned long *p_tvout_mode)
-#else
-int gfx_get_tvout_mode(unsigned long *p_tvout_mode)
-#endif
-{
-	if (!p_tvout_mode)
-		return ERR_INVALID_PARAMETER;
-
-	*p_tvout_mode = d.tvout_mode;
-
-	return 0;
-}
-
-#if GFX_TV_DYNAMIC
-int fs450_set_tvout_mode(unsigned long tvout_mode)
-#else
-int gfx_set_tvout_mode(unsigned long tvout_mode)
-#endif
-{
-	d.tvout_mode = tvout_mode;
-
-	return write_config(REQ_TVOUT_MODE);
-}
-
-/*==========================================================================*/
-/****/
-/*//	Sharpness*/
-
-#if GFX_TV_DYNAMIC
-int fs450_get_sharpness(int *p_sharpness)
-#else
-int gfx_get_sharpness(int *p_sharpness)
-#endif
-{
-	if (!p_sharpness)
-		return ERR_INVALID_PARAMETER;
-
-	*p_sharpness = d.sharpness;
-
-	return 0;
-}
-
-#if GFX_TV_DYNAMIC
-int fs450_set_sharpness(int sharpness)
-#else
-int gfx_set_sharpness(int sharpness)
-#endif
-{
-	d.sharpness = range_limit(sharpness, 0, 1000);
-
-	return write_config(REQ_SHARPNESS);
-}
-
-/*==========================================================================*/
-/****/
-/*flicker filter control.*/
-
-#if GFX_TV_DYNAMIC
-int fs450_get_flicker_filter(int *p_flicker)
-#else
-int gfx_get_flicker_filter(int *p_flicker)
-#endif
-{
-	if (!p_flicker)
-		return ERR_INVALID_PARAMETER;
-
-	*p_flicker = d.flicker;
-
-	return 0;
-}
-
-#if GFX_TV_DYNAMIC
-int fs450_set_flicker_filter(int flicker)
-#else
-int gfx_set_flicker_filter(int flicker)
-#endif
-{
-	d.flicker = range_limit(flicker, 0, 1000);
-
-	return write_config(REQ_FLICKER);
-}
-
-/*==========================================================================*/
-/****/
-/*//	Overscan and Position*/
-
-#if GFX_TV_DYNAMIC
-int fs450_get_overscan(int *p_x, int *p_y)
-#else
-int gfx_get_overscan(int *p_x, int *p_y)
-#endif
-{
-	if (!p_x || !p_y)
-		return ERR_INVALID_PARAMETER;
-
-	*p_x = d.overscan_x;
-	*p_y = d.overscan_y;
-
-	return 0;
-}
-                           
-#if GFX_TV_DYNAMIC
-int fs450_set_overscan(int x, int y)
-#else
-int gfx_set_overscan(int x, int y)
-#endif
-{
-	d.overscan_x = range_limit(x, -1000, 1000);
-	d.overscan_y = range_limit(y, -1000, 1000);
-
-	return write_config(REQ_OVERSCAN_POSITION);
-}
-
-#if GFX_TV_DYNAMIC
-int fs450_get_position(int *p_x, int *p_y)
-#else
-int gfx_get_position(int *p_x, int *p_y)
-#endif
-{
-	if (!p_x || !p_y)
-		return ERR_INVALID_PARAMETER;
-
-	*p_x = d.position_x;
-	*p_y = d.position_y;
-
-	return 0;
-}
-
-#if GFX_TV_DYNAMIC
-int fs450_set_position(int x, int y)
-#else
-int gfx_set_position(int x, int y)
-#endif
-{
-	d.position_x = range_limit(x, -1000, 1000);
-	d.position_y = range_limit(y, -1000, 1000);
-
-	return write_config(REQ_OVERSCAN_POSITION);
-}
-
-/*==========================================================================*/
-/****/
-/*//	Color, Brightness, and Contrast*/
-
-#if GFX_TV_DYNAMIC
-int fs450_get_color(int *p_color)
-#else
-int gfx_get_color(int *p_color)
-#endif
-{
-	if (!p_color)
-		return ERR_INVALID_PARAMETER;
-
-	*p_color = d.color;
-
-	return 0;
-}
-
-#if GFX_TV_DYNAMIC
-int fs450_set_color(int color)
-#else
-int gfx_set_color(int color)
-#endif
-{
-	d.color = range_limit(color, 0, 100);
-
-	return write_config(REQ_COLOR);
-}
-
-#if GFX_TV_DYNAMIC
-int fs450_get_brightness(int *p_brightness)
-#else
-int gfx_get_brightness(int *p_brightness)
-#endif
-{
-	if (!p_brightness)
-		return ERR_INVALID_PARAMETER;
-
-	*p_brightness = d.brightness;
-
-	return 0;
-}
-
-#if GFX_TV_DYNAMIC
-int fs450_set_brightness(int brightness)
-#else
-int gfx_set_brightness(int brightness)
-#endif
-{
-	d.brightness = range_limit(brightness, 0, 100);
-
-	return write_config(REQ_BRIGHTNESS_CONTRAST);
-}
-
-#if GFX_TV_DYNAMIC
-int fs450_get_contrast(int *p_contrast)
-#else
-int gfx_get_contrast(int *p_contrast)
-#endif
-{
-	if (!p_contrast)
-		return ERR_INVALID_PARAMETER;
-
-	*p_contrast = d.contrast;
-
-	return 0;
-}
-
-#if GFX_TV_DYNAMIC
-int fs450_set_contrast(int constrast)
-#else
-int gfx_set_contrast(int constrast)
-#endif
-{
-	d.contrast = range_limit(constrast, 0, 100);
-
-	return write_config(REQ_BRIGHTNESS_CONTRAST);
-}
-
-/*==========================================================================*/
-/****/
-/*//	YC filters*/
-
-#if GFX_TV_DYNAMIC
-int fs450_get_yc_filter(unsigned int *p_yc_filter)
-#else
-int gfx_get_yc_filter(unsigned int *p_yc_filter)
-#endif
-{
-	if (!p_yc_filter)
-		return ERR_INVALID_PARAMETER;
-
-	if (houston_Rev() < HOUSTON_REV_B)
-		return ERR_NOT_SUPPORTED;
-
-	*p_yc_filter = d.yc_filter;
-
-	return 0;
-}
-
-#if GFX_TV_DYNAMIC
-int fs450_set_yc_filter(unsigned int yc_filter)
-#else
-int gfx_set_yc_filter(unsigned int yc_filter)
-#endif
-{
-	if (houston_Rev() < HOUSTON_REV_B)
-		return ERR_NOT_SUPPORTED;
-
-	/*luma filter.*/
-	if (yc_filter & GFX_LUMA_FILTER)
-		d.yc_filter |= GFX_LUMA_FILTER;
-	else
-		d.yc_filter &= ~GFX_LUMA_FILTER;
-
-	/*chroma filter.*/
-	if (yc_filter & GFX_CHROMA_FILTER)
-		d.yc_filter |= GFX_CHROMA_FILTER;
-	else
-		d.yc_filter &= ~GFX_CHROMA_FILTER;
-
-	return write_config(REQ_YC_FILTER);
-}
-
-
-#if GFX_TV_DYNAMIC
-int fs450_get_aps_trigger_bits(unsigned int *p_trigger_bits)
-#else
-int gfx_get_aps_trigger_bits(unsigned int *p_trigger_bits)
-#endif
-{
-	if (!p_trigger_bits)
-		return ERR_INVALID_PARAMETER;
-
-	*p_trigger_bits = d.aps_trigger_bits;
-
-	return 0;
-}
-
-#if GFX_TV_DYNAMIC
-int fs450_set_aps_trigger_bits(unsigned int trigger_bits)
-#else
-int gfx_set_aps_trigger_bits(unsigned int trigger_bits)
-#endif
-{
-	d.aps_trigger_bits = trigger_bits;
-
-	return write_config(REQ_MACROVISION);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_set_tv_format
- *
- * This routine sets the TV encoder registers to the specified format
- * and resolution.
- * Currently only NTSC 640x480 is supported.
- *-----------------------------------------------------------------------------
- */
-#if GFX_TV_DYNAMIC
-int fs450_set_tv_format(TVStandardType format, GfxOnTVType resolution)
-#else
-int gfx_set_tv_format(TVStandardType format, GfxOnTVType resolution)
-#endif
-{
-	/* ### ADD ### IMPLEMENTATION */
-	return(0);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_set_tv_output
- *
- * This routine sets the TV encoder registers to the specified output type.
- * Supported output types are : S-VIDEO and Composite.
- *-----------------------------------------------------------------------------
- */
-#if GFX_TV_DYNAMIC
-int fs450_set_tv_output(int output)
-#else
-int gfx_set_tv_output(int output)
-#endif
-{
-	/* ### ADD ### IMPLEMENTATION */
-	return(0);
-}
-
-
-/*-----------------------------------------------------------------------------
- * gfx_set_tv_cc_enable
- *
- * This routine enables or disables the use of the hardware CC registers 
- * in the TV encoder.
- *-----------------------------------------------------------------------------
- */
-#if GFX_TV_DYNAMIC
-int fs450_set_tv_cc_enable(int enable)
-#else
-int gfx_set_tv_cc_enable(int enable)
-#endif
-{
-	/* ### ADD ### IMPLEMENTATION */
-	return(0);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_set_tv_cc_data
- *
- * This routine writes the two specified characters to the CC data register 
- * of the TV encoder.
- *-----------------------------------------------------------------------------
- */
-#if GFX_TV_DYNAMIC
-int fs450_set_tv_cc_data(unsigned char data1, unsigned char data2)
-#else
-int gfx_set_tv_cc_data(unsigned char data1, unsigned char data2)
-#endif
-{
-	/* ### ADD ### IMPLEMENTATION */
-	return(0);
-}
-
-#ifdef FS450_DIRECTREG
-
-/*//==========================================================================*/
-/****/
-/*//	Direct Read and Write registers*/
-
-int FS450_ReadRegister(S_REG_INFO *p_reg)
-{
-	unsigned long tmp;
-
-	if (PLAL_ReadRegister(p_reg))
-		return 0;
-
-	if (SOURCE_HOUSTON == p_reg->source)
-	{
-		switch(p_reg->size)
-		{
-			case 1:
-			case 2:
-			{
-				houston_ReadReg((int)p_reg->offset, &tmp, (int)p_reg->size);
-				p_reg->value = tmp;
-			}
-			return 0;
-
-			case 4:
-			{
-				houston_ReadReg((unsigned int)p_reg->offset, &tmp, 2);
-				p_reg->value = (tmp << 16);
-				houston_ReadReg((unsigned int)(p_reg->offset+2), &tmp, 2);
-				p_reg->value |= tmp;
-			}
-			return 0;
-		}
-	}
-
-	return ERR_INVALID_PARAMETER;
-}
-
-int FS450_WriteRegister(S_REG_INFO *p_reg)
-{
-	if (PLAL_WriteRegister(p_reg))
-		return 0;
-
-	if (SOURCE_HOUSTON == p_reg->source)
-	{
-		houston_WriteReg((unsigned int)p_reg->offset, p_reg->value, p_reg->size);
-
-		return 0;
-	}
-
-	return ERR_INVALID_PARAMETER;
-}
-
-#endif
-
-/****/
-/*Houston initialization function.*/
-/****/
-static int g_houston_rev = -1;
-
-static int houston_init(void)
-{
-	/*//int errc;*/
-	unsigned long write, read;
-
-	TRACE(("houston_init()\n"))
-	
-	/*initialize I2C*/
-	/*errc = I2C_init();
-	if (errc)
-		return errc;
-	*/
-
-	/*Before we begin, we must enable power to the TFT*/
-	read = READ_VID32 (CS5530_DISPLAY_CONFIG);
-	read |= CS5530_DCFG_FP_PWR_EN | CS5530_DCFG_FP_DATA_EN;
-	WRITE_VID32 (CS5530_DISPLAY_CONFIG, read);
-
-
-	/*simple w/r test.*/
-	write = 0x0055;
-	read = 0;
-
-	houston_WriteReg(HOUSTON_IHO, write, 2);
-	houston_ReadReg(HOUSTON_IHO, &read, 2);
-	if (read != write)
-	{
-		houston_WriteReg(HOUSTON_IHO, write, 2);
-		houston_ReadReg(HOUSTON_IHO, &read, 2);
-		if (read != write)
-		{
-			/*chip is not there, do something appropriate?*/
-			TRACE(("wrote HOUSTON_IHO=0x0055, read 0x%04x\n",read))
-			return ERR_DEVICE_NOT_FOUND;
-		}
-	}
-
-	/*read chip revision.*/
-	houston_ReadReg(HOUSTON_REV, &read, 2);
-	g_houston_rev = (int) read;
-
-	/*ok.*/
-	return 0;
-}
-
-static int houston_Rev(void)
-{
-	return g_houston_rev;
-}
-
-static S_TIMING_SPECS g_specs;
-
-static const S_TIMING_SPECS *p_specs(void)
-{
-	return &g_specs;
-}
-
-/*//==========================================================================*/
-/****/
-/*FS450 configuration functions.*/
-/****/
-/*//==========================================================================*/
-static int config_init(void)
-{
-	int err;
-
-	TRACE(("config_init()\n"))
-
-	err = houston_init();
-	if (err)
-		return err;
-
-	return 0;
-}
-
-
-/*==========================================================================*/
-/****/
-/*convert word to encoder 10 bit value.*/
-
-static unsigned short w10bit2z(unsigned short w)
-{
-	return (w >> 2) | ((w & 0x03) << 8);
-}
-
-static unsigned short z2w10bit(unsigned short z)
-{
-	return (0x03 & (z >> 8)) | ((0xFF & z) << 2);
-}
-
-
-/*==========================================================================*/
-/****/
-/*//	TV Standards*/
-
-static const struct
-{
-	unsigned long standard;
-	int tvsetup_index;
-} g_tv_standards[] =
-{
-	{GFX_TV_STANDARD_NTSC_M, 0},
-	{GFX_TV_STANDARD_NTSC_M_J, 2},
-	{GFX_TV_STANDARD_PAL_B, 1},
-	{GFX_TV_STANDARD_PAL_D, 1},
-	{GFX_TV_STANDARD_PAL_H, 1},
-	{GFX_TV_STANDARD_PAL_I, 1},
-	{GFX_TV_STANDARD_PAL_M, 3},
-	{GFX_TV_STANDARD_PAL_N, 4},
-	{GFX_TV_STANDARD_PAL_G, 1},
-};
-
-static int map_tvstd_to_index(unsigned long tv_std)
-{
-	unsigned int i;
-
-	for (i = 0; i < sizeof(g_tv_standards) / sizeof(*g_tv_standards); i++)
-	{
-		if (tv_std == g_tv_standards[i].standard)
-			return g_tv_standards[i].tvsetup_index;
-	}
-
-	return -1;
-}
-
-static unsigned long supported_standards(void)
-{
-	unsigned long standards = 0;
-	unsigned int i;
-
-	for (i = 0; i < sizeof(g_tv_standards) / sizeof(*g_tv_standards); i++)
-	{
-		if (g_tv_standards[i].tvsetup_index >= 0)
-			standards |= g_tv_standards[i].standard;
-	}
-	
-	return standards;
-}
-
-
-/*==========================================================================*/
-
-static void config_power(int on)
-{
-	unsigned long reg;
-
-	if (houston_Rev() < HOUSTON_REV_B)
-	{
-		/*no power down supported, but still turn of clock in off mode*/
-		if (on)
-		{
-			houston_ReadReg(HOUSTON_CR, &reg, 2);
-			reg &= ~(CR_CLKOFF | CR_RESET);
-			houston_WriteReg(HOUSTON_CR, reg, 2);
-			reg |= CR_RESET;
-			houston_WriteReg(HOUSTON_CR, reg, 2);
-			reg &= ~CR_RESET;
-			houston_WriteReg(HOUSTON_CR, reg, 2);
-		}
-		else
-		{
-			houston_ReadReg(HOUSTON_CR, &reg, 2);
-			reg |= CR_CLKOFF;
-			houston_WriteReg(HOUSTON_CR, reg, 2);
-		}
-
-		return;
-	}
-
-	if (on)
-	{
-		/*!CLKOFF, !COMPOFF, !YCOFF*/
-		/*and reset Houston*/
-		houston_ReadReg(HOUSTON_CR, &reg, 2);
-		reg &= ~(CR_CLKOFF | CR_RESET | CR_COMPOFF | CR_YCOFF);
-		houston_WriteReg(HOUSTON_CR, reg, 2);
-		reg |= CR_RESET;
-		houston_WriteReg(HOUSTON_CR, reg, 2);
-		reg &= ~CR_RESET;
-		houston_WriteReg(HOUSTON_CR, reg, 2);
-
-		/*!GTLIO_PD*/
-		houston_ReadReg(HOUSTON_MISC, &reg, 2);
-		reg &= ~MISC_GTLIO_PD;
-		houston_WriteReg(HOUSTON_MISC,reg,2);
-	}
-	else
-	{
-		/*CLKOFF, COMPOFF, YCOFF*/
-		houston_ReadReg(HOUSTON_CR, &reg, 2);
-		reg |= (CR_CLKOFF | CR_COMPOFF | CR_YCOFF);
-		houston_WriteReg(HOUSTON_CR, reg, 2);
-
-		/*GTLIO_PD*/
-		houston_ReadReg(HOUSTON_MISC, &reg, 2);
-		reg |= MISC_GTLIO_PD;
-		houston_WriteReg(HOUSTON_MISC,reg,2);
-	}
-}
-
-
-/*==========================================================================*/
-/****/
-/*//	VGA mode*/
-
-static void config_vga_mode(unsigned long vga_mode)
-{
-	/*h_total must be evenly divisible by 32?*/
-
-	static struct
-	{
-		 unsigned long mode;
-		int	width;
-		int lines;
-		int h_total;
-	} vgaparams[] =
-	{
-		{GFX_VGA_MODE_640X480, 640, 480, 1056},
-		{GFX_VGA_MODE_720X487, 720, 487, 1056},
-		{GFX_VGA_MODE_720X576, 720, 576, 1056},
-		{GFX_VGA_MODE_800X600, 800, 600, 1056},
-		{GFX_VGA_MODE_1024X768, 1024, 768, 1344},
-	};
-
-	unsigned long cr, misc, byp;
-	unsigned int i;
-
-	g_specs.vga_width = 0;
-	g_specs.vga_lines = 0;
-	g_specs.h_total = 0;
-
-	for (i = 0; i < sizeof(vgaparams) / sizeof(*vgaparams); i++)
-	{
-		if (vga_mode == vgaparams[i].mode)
-		{
-			g_specs.vga_width = vgaparams[i].width;
-			g_specs.vga_lines = vgaparams[i].lines;
-			g_specs.h_total = vgaparams[i].h_total;
-			break;
-		}
-	}
-	if (!g_specs.h_total)
-		return;
-
-	/*clock mux decimator and vga dual.*/
-	houston_ReadReg(HOUSTON_CR, &cr, 2);
-	houston_ReadReg(HOUSTON_MISC, &misc, 2);
-	houston_ReadReg(HOUSTON_BYP, &byp, 2);
-
-	if (vga_mode == GFX_VGA_MODE_1024X768)
-	{
-		/*XGA*/
-		cr |= CR_UIM_DEC;
-		misc |= MISC_VGACKDIV;
-		byp |= (BYP_HDS_BYPASS | BYP_CAC_BYPASS);
-	}
-	else
-	{
-		/*VGA,SVGA*/
-		cr &= ~CR_UIM_DEC;
-		misc &= ~MISC_VGACKDIV;
-		byp &= ~(BYP_HDS_BYPASS | BYP_CAC_BYPASS);
-	}
-
-	houston_WriteReg(HOUSTON_CR, cr, 2);
-	houston_WriteReg(HOUSTON_MISC, misc, 2);
-	houston_WriteReg(HOUSTON_BYP, byp, 2);
-}
-
-
-/*==========================================================================*/
-/****/
-/*//	Write settings for TV standard to device*/
-
-static void config_tv_std(unsigned long tv_std, unsigned int trigger_bits)
-{
-	int k;
-	unsigned short reg34;
-	unsigned long cr, w;
-	unsigned long l;
-
-	/*verify supported standard.*/
-	k = map_tvstd_to_index(tv_std);
-	if (k < 0)
-		return;
-
-	/*store tv width and lines*/
-	g_specs.tv_width = tvsetup.tv_width[k];
-	g_specs.tv_lines = tvsetup.tv_lines[k];
-
-	/*houston CR register.*/
-	houston_ReadReg(HOUSTON_CR, &cr, 2);
-	cr &= ~CR_656_PAL_NTSC;
-	cr |= tvsetup.houston_cr[k];
-	houston_WriteReg(HOUSTON_CR, cr, 2);
-
-	/*setup the encoder.*/
-	l = tvsetup.chroma_freq[k];
-	houston_WriteReg(ENC_CHROMA_FREQ, (int)(l & 0x00ff), 1);
-	houston_WriteReg(ENC_CHROMA_FREQ+1, (int)((l>>8) & 0x00ff), 1);
-	houston_WriteReg(ENC_CHROMA_FREQ+2, (int)((l>>16) & 0x00ff), 1);
-	houston_WriteReg(ENC_CHROMA_FREQ+3, (int)((l>>24) & 0x00ff), 1);
-
-	houston_WriteReg(ENC_CHROMA_PHASE, tvsetup.chroma_phase[k], 1);
-	houston_WriteReg(ENC_REG05, 0x00, 1);			/*reg 0x05*/
-	houston_WriteReg(ENC_REG06, 0x89, 1);			/*reg 0x06*/
-	houston_WriteReg(ENC_REG07, 0x00, 1);			/*reg 0x07*/
-	houston_WriteReg(ENC_HSYNC_WIDTH, tvsetup.hsync_width[k], 1);
-	houston_WriteReg(ENC_BURST_WIDTH, tvsetup.burst_width[k], 1);
-	houston_WriteReg(ENC_BACK_PORCH, tvsetup.back_porch[k], 1);
-	houston_WriteReg(ENC_CB_BURST_LEVEL, tvsetup.cb_burst_level[k], 1);
-	houston_WriteReg(ENC_CR_BURST_LEVEL, tvsetup.cr_burst_level[k], 1);
-	houston_WriteReg(ENC_SLAVE_MODE, 0x01, 1);		/*slave mode*/
-	if (trigger_bits == 0)
-		w = w10bit2z(tvsetup.blank_level[k]);		/*blank level*/
-	else
-		w = w10bit2z((unsigned short)(tvsetup.blank_level[k]-tvsetup.hamp_offset[k]));
-	houston_WriteReg(ENC_BLANK_LEVEL, w & 0x00ff, 1);
-	houston_WriteReg(ENC_BLANK_LEVEL+1, w >> 8, 1);
-	w = w10bit2z(tvsetup.tv_lines[k]);				/*num_lines*/
-	houston_WriteReg(ENC_NUM_LINES, w & 0x00ff, 1);
-	houston_WriteReg(ENC_NUM_LINES+1, w >> 8, 1);
-
-	houston_WriteReg(ENC_TINT, 0x00, 1);			/*tint*/
-	houston_WriteReg(ENC_BREEZE_WAY, tvsetup.breeze_way[k], 1);
-	houston_WriteReg(ENC_FRONT_PORCH, tvsetup.front_porch[k], 1);
-	houston_WriteReg(ENC_ACTIVELINE, tvsetup.activeline[k], 1);
-	houston_WriteReg(ENC_FIRST_LINE, 0x15, 1);		/*firstvideoline*/
-	reg34 =
-		0x80 |
-		(tvsetup.pal_mode[k] << 6) |
-		(tvsetup.sys625_50[k] << 3) |
-		(tvsetup.cphase_rst[k] << 1) |
-		(tvsetup.vsync5[k]);
-	houston_WriteReg(ENC_REG34, reg34, 1);			/*reg 0x34*/
-	houston_WriteReg(ENC_SYNC_LEVEL, tvsetup.sync_level[k], 1);
-	if (trigger_bits == 0)
-		w = w10bit2z(tvsetup.vbi_blank_level[k]);	/*blank level*/
-	else
-		w = w10bit2z((unsigned short)(tvsetup.vbi_blank_level[k]-1));
-	houston_WriteReg(ENC_VBI_BLANK_LEVEL, w & 0x00ff, 1);
-	houston_WriteReg(ENC_VBI_BLANK_LEVEL+1, w >> 8, 1);
-}
-
-static void conget_tv_std(unsigned long *p_tv_standard)
-{
-	unsigned long cr;
-	
-	if (!p_tv_standard)
-		return;
-
-	/*just pick between NTSC and PAL*/
-	houston_ReadReg(HOUSTON_CR, &cr, 2);
-	if (CR_656_PAL_NTSC & cr)
-		*p_tv_standard = GFX_TV_STANDARD_PAL_B;
-	else
-		*p_tv_standard = GFX_TV_STANDARD_NTSC_M;
-}
-
-/*==========================================================================*/
-/****/
-/*//	TVout mode*/
-
-static void config_tvout_mode(unsigned long tvout_mode)
-{
-	unsigned long cr;
-	
-	houston_ReadReg(HOUSTON_CR, &cr, 2);
-
-	/*all dacs off*/
-	cr |= (CR_COMPOFF | CR_YCOFF);
-	/*not rgb*/
-	cr &= ~CR_OFMT;
-
-	/*turn on requested output*/
-	if (GFX_TVOUT_MODE_CVBS & tvout_mode)
-		cr &= ~CR_COMPOFF;
-	if (GFX_TVOUT_MODE_YC & tvout_mode)
-		cr &= ~CR_YCOFF;
-	if (GFX_TVOUT_MODE_RGB & tvout_mode)
-	{
-		cr &= ~(CR_COMPOFF | CR_YCOFF);
-		cr |= CR_OFMT;
-	}
-
-	houston_WriteReg(HOUSTON_CR, cr, 2);
-}
-
-static void conget_tvout_mode(unsigned long *p_tvout_mode)
-{
-	unsigned long cr;
-
-	if (!p_tvout_mode)
-		return;
-		
-	houston_ReadReg(HOUSTON_CR, &cr, 2);
-
-	if (CR_OFMT & cr)
-		*p_tvout_mode = GFX_TVOUT_MODE_RGB;
-	else
-	{
-		*p_tvout_mode = 0;
-		if (!(CR_YCOFF & cr))
-			*p_tvout_mode |= GFX_TVOUT_MODE_YC;
-		if (!(CR_COMPOFF & cr))
-			*p_tvout_mode |= GFX_TVOUT_MODE_CVBS;
-	}
-}
-
-
-/*==========================================================================*/
-/****/
-/*//	Size & Position*/
-
-#define IS_NTSC(tv_std) (tv_std & ( \
-	GFX_TV_STANDARD_NTSC_M |   \
-	GFX_TV_STANDARD_NTSC_M_J | \
-	GFX_TV_STANDARD_PAL_M))
-#define IS_PAL(tv_std) (tv_std & ( \
-	GFX_TV_STANDARD_PAL_B | \
-	GFX_TV_STANDARD_PAL_D | \
-	GFX_TV_STANDARD_PAL_H | \
-	GFX_TV_STANDARD_PAL_I | \
-	GFX_TV_STANDARD_PAL_N | \
-	GFX_TV_STANDARD_PAL_G))
-
-/*return fifo delay setting for mode, std, and total lines.*/
-
-static void get_ffolat_ivo(
-	unsigned long vga_mode,
-	unsigned long tv_std,
-	long i,
-	unsigned short *ffolat,
-	unsigned short *ivo)
-{
-	switch (vga_mode)
-	{
-		case GFX_VGA_MODE_640X480:
-			if (IS_NTSC(tv_std))
-			{
-				if (i > SIZE6X4NTSC-1) i = SIZE6X4NTSC-1;
-				*ffolat = ffo6x4ntsc[i].ffolat;
-				*ivo = 0x20;
-			}
-			else
-			{
-				if (i > SIZE6X4PAL-1) i = SIZE6X4PAL-1;
-				*ffolat = ffo6x4pal[i].ffolat;
-				*ivo = 0x28;
-			}
-			break;
-	
-		case GFX_VGA_MODE_800X600:
-			if (IS_NTSC(tv_std))
-			{
-				if (i > SIZE8X6NTSC-1) i = SIZE8X6NTSC-1;
-				*ffolat = ffo8x6ntsc[i].ffolat;
-				*ivo = 0x3a;
-			}
-			else
-			{
-				if (i > SIZE8X6PAL-1) i = SIZE8X6PAL-1;
-				*ffolat = ffo8x6pal[i].ffolat;
-				*ivo = 0x39;
-			}
-			break;
-
-		case GFX_VGA_MODE_720X487:
-			*ffolat = 0x40; /*//FFO7x4;*/
-			*ivo = 0x1a;
-			break;
-
-		case GFX_VGA_MODE_720X576:
-			*ffolat = 0x40; /*//FFO7x5;*/
-			*ivo = 0x1a;
-			break;
-
-		case GFX_VGA_MODE_1024X768:
-		default:
-			if (IS_NTSC(tv_std))
-			{
-				if (i > SIZE10X7NTSC-1) i = SIZE10X7NTSC-1;
-				*ffolat = ffo10x7ntsc[i].ffolat;
-				*ivo = ffo10x7ntsc[i].ivo;
-			}
-			else
-			{
-				if (i > SIZE10X7PAL-1) i = SIZE10X7PAL-1;
-				*ffolat = ffo10x7pal[i].ffolat;
-				*ivo = ffo10x7pal[i].ivo;
-			}
-			break;
-	}
-}
-
-
-/*get vertical line min and max for mode and std.*/
-
-static void get_vtotal_min_max(
-	unsigned long vga_mode,
-	unsigned long tv_std,
-	int *v_total_min,
-	int *v_total_max,
-	int *v_step)
-{
-	int k = map_tvstd_to_index(tv_std);
-
-	switch (vga_mode)
-	{
-		case GFX_VGA_MODE_640X480:
-			if (IS_NTSC(tv_std))
-			{
-				*v_total_min = ffo6x4ntsc[0].v_total;
-				*v_total_max = ffo6x4ntsc[SIZE6X4NTSC-1].v_total;
-			}
-			else
-			{
-				*v_total_min = ffo6x4pal[0].v_total;
-				*v_total_max = ffo6x4pal[SIZE6X4PAL-1].v_total;
-			}
-			*v_step = 4;
-			break;
-
-		case GFX_VGA_MODE_800X600:
-			if (IS_NTSC(tv_std))
-			{
-				*v_total_min = ffo8x6ntsc[0].v_total;
-				*v_total_max = ffo8x6ntsc[SIZE8X6NTSC-1].v_total;
-			}
-			else
-			{
-				*v_total_min = ffo8x6pal[0].v_total;
-				*v_total_max = ffo8x6pal[SIZE8X6PAL-1].v_total;
-			}
-			*v_step = 5;
-			break;
-	
-		case GFX_VGA_MODE_720X487:
-		case GFX_VGA_MODE_720X576:
-			*v_total_min = tvsetup.tv_lines[k];
-			*v_total_max = tvsetup.tv_lines[k];
-			*v_step = 4;
-			break;
-
-		case GFX_VGA_MODE_1024X768:
-			if (IS_NTSC(tv_std))
-			{
-				*v_total_min = ffo10x7ntsc[0].v_total;
-				*v_total_max = ffo10x7ntsc[SIZE10X7NTSC-1].v_total;
-			}
-			else
-			{
-				*v_total_min = ffo10x7pal[0].v_total;
-				*v_total_max = ffo10x7pal[SIZE10X7PAL-1].v_total;
-			}
-			*v_step = 6;
-			break;
-	}
-}
-
-static void config_overscan_xy(
-	unsigned long tv_std,
-	unsigned long vga_mode,
-	int overscan_x,
-	int overscan_y,
-	int pos_x,
-	int pos_y)
-{
-	unsigned int vga_index;
-	unsigned long reg;
-	double vsc;
-	int k;
-	unsigned short ffolat, ivo;
-	int base_v_total, range, v_offset;
-	int v_total_min, v_total_max, v_step;
-	float r, f;
-	int vga_pixels,pre_pixels;
-	float hscale, hscale_min, hscale_max;
-	int hsc;
-	int iho, iho_max, ihw;
-
-	/*tv_std is valid.*/
-	k = map_tvstd_to_index(tv_std);
-
-	/*store tv width and lines*/
-	g_specs.tv_width = tvsetup.tv_width[k];
-	g_specs.tv_lines = tvsetup.tv_lines[k];
-
-	/*determine vga mode index*/
-	for (vga_index = 0; vga_index < SCANTABLE_ENTRIES; vga_index++)
-	{
-		if (scantable[vga_index].mode == vga_mode)
-			break;
-	}
-	if (vga_index >= SCANTABLE_ENTRIES)
-		return;
-
-	/****/
-	/*vertical scaling (v_total setup).*/
-	/****/
-	/*calculate vertical range.*/
-	get_vtotal_min_max(vga_mode, tv_std, &v_total_min, &v_total_max, &v_step);
-	TRACE(("v_total min=%d, max=%d\n", v_total_min, v_total_max))
-	base_v_total = scantable[vga_index].v_total[k];
-	range = fsmax(base_v_total - v_total_min, v_total_max - base_v_total);
-	TRACE(("v_total range = %d\n",range))
-
-	/*map +/-1000 overscan y into +/-range.*/
-	v_offset = (int) ((((float)overscan_y * range) / 1000.f) + .5f);
-	TRACE(("v_offset = %d\n", v_offset))
-
-	/*range limit v_total.*/
-	g_specs.v_total = range_limit(base_v_total + v_offset, v_total_min, v_total_max);
-
-	/*round to calibrated value.*/
-	v_offset = (g_specs.v_total - v_total_min + (v_step/2)) / v_step;
-	g_specs.v_total = v_total_min + v_offset * v_step;
-	TRACE(("desired v_total=%d\n", g_specs.v_total))
-
-	/****/
-	/*vertical positioning (vsync setup).*/
-	/****/
-	get_ffolat_ivo(vga_mode, tv_std, v_offset, &ffolat, &ivo);
-	houston_WriteReg(HOUSTON_IVO, ivo, 2);
-
-	/*scale base sync offset by scaling ratio.*/
-	r = (float) g_specs.v_total / (float) base_v_total;
-	v_offset = (int) (r * (float) scantable[vga_index].v_sync[k]);
-
-	/*scale ivo.*/
-	f = (float) ivo;
-	v_offset -= (int) (f - f/r);
-
-	/*compensate for center screen.*/
-	f = (float) tvsetup.tv_active_lines[k] / 2.f;
-	v_offset += (int) (f * r - f);
-
-	/*calculate vsync.*/
-	g_specs.v_sync = g_specs.v_total-v_offset + pos_y;
-	TRACE(("desired v_total=%d, desired v_sync=%d\n", g_specs.v_total, g_specs.v_sync))
-	if (g_specs.v_sync < g_specs.vga_lines+10)
-	{
-		TRACE(("vsync too low\n"))
-		/*//d.v_total += d.vga_lines+10-d.v_sync;*/
-		g_specs.v_sync = g_specs.vga_lines+10;
-	}
-	else if (g_specs.v_sync > g_specs.v_total-10)
-	{
-		TRACE(("vsync too high\n"))
-		g_specs.v_sync = g_specs.v_total-10;
-	}
-	TRACE(("v_total=%d v_sync=%d\n", g_specs.v_total, g_specs.v_sync))
-
-	/*FFOLAT.*/
-	houston_WriteReg(HOUSTON_FFO_LAT, ffolat, 2);
-
-	/*VSC.*/
-	vsc = (65536.0f * (1.0f - (double)g_specs.tv_lines / (double)g_specs.v_total)) + 0.5f;
-	reg = ((unsigned long) -vsc) & 0xffff;
-	TRACE(("vsc=%04x, tv_lines=%d, v_total=%d\n", reg, g_specs.tv_lines, g_specs.v_total))
-	houston_WriteReg(HOUSTON_VSC, (int)reg, 2);
-
-	/****/
-	/*horizontal scaling.*/
-	/****/
-
-	/*vga pixels is vga width, except in 1024x768, where it's half that.*/
-	vga_pixels = g_specs.vga_width;
-	if (1024 == vga_pixels)
-		vga_pixels /= 2;
-
-	/*maximum scaling coefficient is tv_width / vga_pixels*/
-	/*minimum is about 1/2, but that is quite small.  arbitrarily set minimum at 75% maximum.*/
-	hscale_max = (720.0f / vga_pixels);
-	hscale_min = fsmax((0.75f * hscale_max),(1.0f - (63.0f / 128.0f)));
-	TRACE((
-		"hscale_min = %u.%u, hscale_max = %u.%u\n",
-		(int)hscale_min,
-		(int)((hscale_min - (int)hscale_min) * 1000),
-		(int)hscale_max,
-		(int)((hscale_max - (int)hscale_max) * 1000)))
-
-	/*map overscan_x into min to max.*/
-	hscale = hscale_min + ((overscan_x + 1000.0f) / 2000.0f) * (hscale_max - hscale_min);
-	TRACE(("hscale = %u.%u\n",(int)hscale,(int)((hscale - (int)hscale) * 1000)))
-
-	/*determine hsc where hscale = (1 + hsc/128)*/
-	if (hscale >= 1.0f)
-		hsc = (int)(128.f * (hscale - 1.0f) + .5f);
-	else
-		hsc = (int)(128.f * (hscale - 1.0f) - .5f);
-	TRACE(("hsc = %d\n",hsc))
-	if (hsc >= 0)
-		houston_WriteReg(HOUSTON_HSC, hsc << 8, 2);
-	else
-		houston_WriteReg(HOUSTON_HSC, hsc & 0xFF, 2);
-			
-	/*recalculate hscale for future formulas*/
-	hscale = 1.0f + (hsc / 128.0f);
-	TRACE(("recalculated hscale = %u.%u\n",(int)hscale,(int)((hscale - (int)hscale) * 1000)))
-
-	/****/
-	/*horizontal offset.*/
-	/****/
-
-	/*place hsync 40 before halfway from vga_width to htotal*/
-	/*but not less than vga_width + 10*/
-	g_specs.h_sync = fsmax((g_specs.h_total + g_specs.vga_width) / 2 - 40, g_specs.vga_width + 10);
-	/*also, make it even*/
-	g_specs.h_sync &= ~1;
-	TRACE(("hsync = %u\n",g_specs.h_sync))
-
-	/*iho range is 0 to iho_max.*/
-	/*iho_max is 2 * iho_center.*/
-	/*iho_center is pre_pixels - (tvwidth / hscale - vga pixels) / 2.*/
-	/*pre_pixels = (htotal - hsync) * (vga_pixels / vga_width)*/
-	/*note that the range is inverted also, because it specifies the number of pixels*/
-	/*to skip, or subtract.  iho=0 maps to farthest right.*/
-	/*map -pos_x = +/-1000 into (0 to iho_max)*/
-	pre_pixels = (int)((long)(g_specs.h_total - g_specs.h_sync) * vga_pixels / g_specs.vga_width);
-	iho_max = (2 * pre_pixels) - ((int)(720.0f / hscale + 0.5f) - vga_pixels);
-	TRACE(("iho_max = %u\n",iho_max))
-	iho = (int) range_limit(((long)(1000 - pos_x) * iho_max / 2000)+scantable[vga_index].iho[k], 0, iho_max);
-	TRACE(("iho = %u\n",iho))
-	houston_WriteReg(HOUSTON_IHO, iho, 2);
-
-	/****/
-	/*input horizontal width.*/
-	/****/
-	
-	/*input horizontal width is vga pixels + pre_pixels - iho*/
-	/*additionally, ihw cannot exceed tv width / hscale*/
-	/*and if hsc is negative, (ihw)(-hsc/128) cannot exceed ~250.*/
-	/*and ihw should be even.*/
-	ihw = fsmin(
-		vga_pixels + pre_pixels - iho,
-		(int)(720.0f / hscale));
-	if (hsc < 0)
-		ihw = (int)fsmin(ihw,253L * 128 / (-hsc));
-	ihw &= ~1;
-	TRACE(("ihw = %u\n",ihw))
-	houston_WriteReg(HOUSTON_IHA, ihw, 2);
-
-	f = (((float)g_specs.h_total * g_specs.v_total)*27.f) /
-		((float)g_specs.tv_width * g_specs.tv_lines);
-			
-	TRACE(("freq=%u.%uMHz\n",(int)f,(int)((f - (int)f) * 1000)))
-}
-
-/*==========================================================================*/
-/****/
-/*configure houston nco.*/
-
-static void config_nco(unsigned long tv_std,unsigned long vga_mode)
-{
-	unsigned long cr, misc;
-	unsigned long reg;
-	int k = map_tvstd_to_index(tv_std);
-
-	/*read and store CR.*/
-	houston_ReadReg(HOUSTON_CR, &cr, 2);
-
-	/*make sure NCO_EN (enable latch) bit is clear*/
-	cr &= ~CR_NCO_EN;
-	houston_WriteReg(HOUSTON_CR, cr, 2);
-
-	/*clear NCO_LOADX.*/
-	houston_ReadReg(HOUSTON_MISC, &misc, 2);
-	misc &= ~(MISC_NCO_LOAD1 + MISC_NCO_LOAD0);
-	houston_WriteReg(HOUSTON_MISC, misc, 2);
-
-	if (vga_mode == GFX_VGA_MODE_1024X768)
-	{
-		/*setup for M and N load (Nco_load=1).*/
-		misc |= (MISC_NCO_LOAD0);
-		houston_WriteReg(HOUSTON_MISC, misc, 2);
-
-		/*M and N.*/
-		houston_WriteReg(HOUSTON_NCONL, 1024-2, 2);
-		houston_WriteReg(HOUSTON_NCODL, 128-1, 2);
-
-		/*latch M/N in.*/
-		cr |= CR_NCO_EN;
-		houston_WriteReg(HOUSTON_CR, cr, 2);
-		cr &= ~CR_NCO_EN;
-		houston_WriteReg(HOUSTON_CR, cr, 2);
-		
-		/*setup ncon and ncod load (Nco_load=0).*/
-		misc &= ~(MISC_NCO_LOAD1 + MISC_NCO_LOAD0);
-		houston_WriteReg(HOUSTON_MISC, misc, 2);
-
-		/*NCON.*/
-		reg = ((unsigned long)g_specs.v_total * g_specs.h_total) / 2;
-		houston_WriteReg(HOUSTON_NCONH, reg >> 16, 2);
-		houston_WriteReg(HOUSTON_NCONL, reg & 0xffff, 2);
-
-		/*NCOD.*/
-		houston_WriteReg(HOUSTON_NCODL, tvsetup.houston_ncodl[k], 2);
-		houston_WriteReg(HOUSTON_NCODH, tvsetup.houston_ncodh[k], 2);
-	}
-	else
-	{
-		/*setup for M and N load (Nco_load=2).*/
-		misc |= (MISC_NCO_LOAD1);
-		houston_WriteReg(HOUSTON_MISC, misc, 2);
-
-		/*NCON.*/
-		reg = (unsigned long)g_specs.v_total * g_specs.h_total;
-		houston_WriteReg(HOUSTON_NCONH, reg >> 16, 2);
-		houston_WriteReg(HOUSTON_NCONL, reg & 0xffff, 2);
-
-		/*NCOD.*/
-		houston_WriteReg(HOUSTON_NCODL, tvsetup.houston_ncodl[k], 2);
-		houston_WriteReg(HOUSTON_NCODH, tvsetup.houston_ncodh[k], 2);
-
-		TRACE((
-			"NCON = %lu (0x%08lx), NCOD = %lu (0x%08lx)\n",
-			reg,
-			reg,
-			((unsigned long)tvsetup.houston_ncodh[k] << 16) + tvsetup.houston_ncodl[k],
-			((unsigned long)tvsetup.houston_ncodh[k] << 16) + tvsetup.houston_ncodl[k]))
-	}
-
-	/*latch M/N and NCON/NCOD in.*/
-	cr |= CR_NCO_EN;
-	houston_WriteReg(HOUSTON_CR, cr, 2);
-	cr &= ~CR_NCO_EN;
-	houston_WriteReg(HOUSTON_CR, cr, 2);
-}
-
-
-/*==========================================================================*/
-/****/
-/*//	Write sharpness settings to device*/
-
-static void config_sharpness(int sharpness)
-{
-	unsigned int shp;
-
-	/*map 0-1000 to 0-20.*/
-	shp = (unsigned int)(0.5f + ((float)sharpness * 20.0f / 1000.0f));
-	shp = range_limit(shp, 0, 20);
-
-	houston_WriteReg(HOUSTON_SHP, shp, 2);
-}
-
-static void conget_sharpness(int *p_sharpness)
-{
-	unsigned long shp;
-	
-	if (!p_sharpness)
-		return;
-
-	houston_ReadReg(HOUSTON_SHP, &shp, 2);
-
-	/*map 0-20 to 0-1000.*/
-	*p_sharpness = (int)(0.5f + ((float)shp * 1000.0f / 20.0f));
-}
-
-
-/*==========================================================================*/
-/****/
-/*//	Write flicker settings to device*/
-
-static void config_flicker(int flicker)
-{
-	unsigned int flk;
-
-	/*map 0-1000 to 0-16.*/
-	flk = (unsigned int)(0.5f + ((float)flicker * 16.0f / 1000.0f));
-	flk = range_limit(flk,0,16);
-
-	houston_WriteReg(HOUSTON_FLK, flk, 2);
-}
-
-static void conget_flicker(int *p_flicker)
-{
-	unsigned long flk;
-	
-	if (!p_flicker)
-		return;
-
-	houston_ReadReg(HOUSTON_FLK, &flk, 2);
-
-	/*map 0-16 to 0-1000.*/
-	*p_flicker = (int)(0.5f + ((float)flk * 1000.0f / 16.0f));
-}
-
-
-/*==========================================================================*/
-/****/
-/*//	Write color settings to device*/
-
-static void config_color(int color)
-{
-	unsigned long clr;
-
-	/*map 0-100 to 0-255.*/
-	/*montreal production test needs 169 to be mappable, so*/
-	/*use .8 rounding factor, 169=(int)(66.*2.55+.8).*/
-	clr = (unsigned long)(0.8f + ((float)color * 255.0f / 100.0f));
-	clr = range_limit(clr,0,255);
-
-	houston_WriteReg(ENC_CR_GAIN, clr, 1);
-	houston_WriteReg(ENC_CB_GAIN, clr, 1);
-}
-
-static void conget_color(int *p_color)
-{
-	unsigned long cr_gain;
-	
-	if (!p_color)
-		return;
-
-	/*just get CR GAIN, CB GAIN should match.*/
-	houston_ReadReg(ENC_CR_GAIN, &cr_gain, 1);
-
-	/*map 0-255 to 0-100.*/
-	*p_color = (int)(0.5f + ((float)cr_gain * 100.0f / 255.0f));
-}
-
-
-/*==========================================================================*/
-/****/
-/*//	Write brightness and contrast settings to device*/
-
-#define	NTSC_BLANK_LEVEL	240
-
-static const int min_black_level = NTSC_BLANK_LEVEL+1;
-static const int max_white_level = 1023;
-
-static void config_brightness_contrast(unsigned long tv_std, unsigned int trigger_bits,
-	int brightness, int contrast)
-{
-	int brightness_off;
-	float contrast_mult;
-	int black, white;
-	unsigned short w;
-	int k = map_tvstd_to_index(tv_std);
-
-	/*0-100 maps to +/-220.*/
-	brightness_off = (int)(0.5f + ((float)brightness * 440.0f / 100.0f)) - 220;
-
-	/*0-100 maps to .75-1.25.*/
-	contrast_mult = ((float) contrast * 0.5f / 100.0f) + 0.75f;
-
-	black = tvsetup.black_level[k];
-	if (trigger_bits != 0)
-		black -= tvsetup.hamp_offset[k];
-
-	white = tvsetup.white_level[k];
-	if (trigger_bits != 0)
-		white -= tvsetup.hamp_offset[k];
-
-	black = (int) ((float) (black + brightness_off) * contrast_mult);
-	white = (int) ((float) (white + brightness_off) * contrast_mult);
-	if (black < min_black_level)
-		black = min_black_level;
-	if (white > max_white_level)
-		white = max_white_level;
-	
-	w = w10bit2z((unsigned short) black);
-	houston_WriteReg(ENC_BLACK_LEVEL, w & 0x00ff, 1);
-	houston_WriteReg(ENC_BLACK_LEVEL+1, w >> 8, 1);
-	w = w10bit2z((unsigned short) white);
-	houston_WriteReg(ENC_WHITE_LEVEL, w & 0x00ff, 1);
-	houston_WriteReg(ENC_WHITE_LEVEL+1, w >> 8, 1);
-}
-
-static void conget_brightness_contrast(unsigned long tv_std, unsigned int trigger_bits,
-	int *p_brightness, int *p_contrast)
-{
-	int brightness_off;
-	float contrast_mult;
-	unsigned short black, white;
-	unsigned long zh,zl;
-	int k;
-	
-	if (!p_brightness || !p_contrast)
-		return;
-	
-	k = map_tvstd_to_index(tv_std);
-
-	houston_ReadReg(ENC_BLACK_LEVEL, &zl, 1);
-	houston_ReadReg(ENC_BLACK_LEVEL+1, &zh, 1);
-	black = z2w10bit((unsigned short)(zl + (zh << 8)));
-	if (trigger_bits != 0)
-		black += tvsetup.hamp_offset[k];
-	houston_ReadReg(ENC_WHITE_LEVEL, &zl, 1);
-	houston_ReadReg(ENC_WHITE_LEVEL+1, &zh, 1);
-	white = z2w10bit((unsigned short)(zl + (zh << 8)));
-	if (trigger_bits != 0)
-		white += tvsetup.hamp_offset[k];
-
-	/*this reverse computation does not account for clipping, but should*/
-	/*provide somewhat reasonable numbers*/
-	contrast_mult = ((float)white - (float)black) / ((float)tvsetup.white_level[k] - (float)tvsetup.black_level[k]);
-	brightness_off = (int)(((float)black / contrast_mult) - tvsetup.black_level[k]);
-
-	/*+/-220 maps to 0-100.*/
-	*p_brightness = range_limit((int)(0.5f + ((float)(brightness_off + 220) * 100.0f / 440.0f)),0,100);
-
-	/*.75-1.25 maps to 0-100.*/
-	*p_contrast = range_limit((int)(0.5f + ((float)(contrast_mult - 0.75f) * 100.0f / 0.5f)),0,100);
-}
-
-
-/*==========================================================================*/
-/****/
-/*configure luma/chroma filters.*/
-
-static void config_yc_filter(unsigned long tv_std,int luma_filter, int chroma_filter)
-{
-	unsigned long reg, reg07, reg34;
-
-	if (houston_Rev() < HOUSTON_REV_B)
-		return;
-
-	/*luma filter.*/
-	if (luma_filter)
-		reg = tvsetup.notch_filter[map_tvstd_to_index(tv_std)];
-	else
-		reg = 0;
-	houston_WriteReg(ENC_NOTCH_FILTER, reg, 1);
-
-	/*chroma filter.*/
-	houston_ReadReg(ENC_REG07, &reg07, 1);
-	houston_ReadReg(ENC_REG34, &reg34, 1);
-	if (chroma_filter)
-	{
-		reg07 &= ~0x08;
-		reg34 &= ~0x20;
-	}
-	else
-	{
-		reg07 |= 0x08;
-		reg34 |= 0x20;
-	}
-	houston_WriteReg(ENC_REG07, reg07, 1);
-	houston_WriteReg(ENC_REG34, reg34, 1);
-}
-
-static void conget_yc_filter(int *p_luma_filter, int *p_chroma_filter)
-{
-	unsigned long reg, reg07, reg34;
-
-	if (!p_luma_filter || !p_chroma_filter)
-		return;
-		
-	if (houston_Rev() < HOUSTON_REV_B)
-	{
-		*p_luma_filter = 0;
-		*p_chroma_filter = 0;
-		return;
-	}
-
-	/*luma filter.*/
-	houston_ReadReg(ENC_NOTCH_FILTER, &reg, 1);
-	*p_luma_filter = (reg ? 1 : 0);
-
-	/*chroma filter.*/
-	houston_ReadReg(ENC_REG07, &reg07, 1);
-	houston_ReadReg(ENC_REG34, &reg34, 1);
-	*p_chroma_filter = !((0x08 & reg07) || (0x20 & reg34));
-}
-
-
-/*==========================================================================*/
-/****/
-/*//	Macrovision*/
-
-static void config_macrovision(unsigned long tv_std, unsigned int trigger_bits)
-{
-/****/
-/*Constants to index into mvsetup columns.*/
-/****/
-#define	nNTSC_APS00		0	/*ntsc mv off.*/
-#define	nNTSC_APS01		1	/*ntsc AGC only.*/
-#define	nNTSC_APS10		2	/*ntsc AGC + 2-line CS.*/
-#define	nNTSC_APS11		3	/*ntsc AGC + 4-line CS.*/
-#define	nPAL_APS00		4	/*pal mv off.*/
-#define	nPAL_APSXX		5	/*pal mv on.*/
-#define	nMVModes		6
-
-/****/
-/*Macrovision setup table.*/
-/****/
-static  const  struct  mvparms
-	{
-	unsigned  short  n0[nMVModes];
-	unsigned  short  n1[nMVModes];
-	unsigned  short  n2[nMVModes];
-	unsigned  short  n3[nMVModes];
-	unsigned  short  n4[nMVModes];
-	unsigned  short  n5[nMVModes];
-	unsigned  short  n6[nMVModes];
-	unsigned  short  n7[nMVModes];
-	unsigned  short  n8[nMVModes];
-	unsigned  short  n9[nMVModes];
-	unsigned  short  n10[nMVModes];
-	unsigned  short  n11[nMVModes];
-	unsigned  short  n12[nMVModes];
-	unsigned  short  n13[nMVModes];
-	unsigned  short  n14[nMVModes];
-	unsigned  short  n15[nMVModes];
-	unsigned  short  n16[nMVModes];
-	unsigned  short  n17[nMVModes];
-	unsigned  short  n18[nMVModes];
-	unsigned  short  n19[nMVModes];
-	unsigned  short  n20[nMVModes];
-	unsigned  short  n21[nMVModes];
-	unsigned  short  n22[nMVModes];
-	unsigned  short  agc_pulse_level[nMVModes];
-	unsigned  short  bp_pulse_level[nMVModes];
-	}
-
-mvsetup =
-
-	{	/*//	ntsc	ntsc	ntsc	ntsc	pal		pal*/
-		/*//	MV		AGC		AGC +	AGC +	MV		MV*/
-		/*//	off.	only	2-line	4-line	off.	on.*/
-		/*//					CS.		CS.*/
-		{	0x00,	0x36,	0x3e,	0x3e,	0x00,	0x3e	}, /*n0*/
-		{	0x1d,	0x1d,	0x1d,	0x17,	0x1a,	0x1a	}, /*n1*/
-		{	0x11,	0x11,	0x11,	0x15,	0x22,	0x22	}, /*n2*/
-		{	0x25,	0x25,	0x25,	0x21,	0x2a,	0x2a	}, /*n3*/
-		{	0x11,	0x11,	0x11,	0x15,	0x22,	0x22	}, /*n4*/
-		{	0x01,	0x01,	0x01,	0x05,	0x05,	0x05	}, /*n5*/
-		{	0x07,	0x07,	0x07,	0x05,	0x02,	0x02	}, /*n6*/
-		{	0x00,	0x00,	0x00,	0x02,	0x00,	0x00	}, /*n7*/
-		{	0x1b,	0x1b,	0x1b,	0x1b,	0x1c,	0x1c	}, /*n8*/
-		{	0x1b,	0x1b,	0x1b,	0x1b,	0x3d,	0x3d	}, /*n9*/
-		{	0x24,	0x24,	0x24,	0x24,	0x14,	0x14	}, /*n10*/
-		{	0x780f,	0x780f,	0x780f,	0x780f,	0x7e07,	0x7e07	}, /*n11*/
-		{	0x0000,	0x0000,	0x0000,	0x0000,	0x5402,	0x5402	}, /*n12*/
-		{	0x0f,	0x0f,	0x0f,	0x0f,	0xfe,	0xfe	}, /*n13*/
-		{	0x0f,	0x0f,	0x0f,	0x0f,	0x7e,	0x7e	}, /*n14*/
-		{	0x60,	0x60,	0x60,	0x60,	0x60,	0x60	}, /*n15*/
-		{	0x01,	0x01,	0x01,	0x01,	0x00,	0x00	}, /*n16*/
-		{	0x0a,	0x0a,	0x0a,	0x0a,	0x08,	0x08	}, /*n17*/
-		{	0x00,	0x00,	0x00,	0x00,	0x00,	0x00	}, /*n18*/
-		{	0x05,	0x05,	0x05,	0x05,	0x04,	0x04	}, /*n19*/
-		{	0x04,	0x04,	0x04,	0x04,	0x07,	0x07	}, /*n20*/
-		{	0x03ff,	0x03ff,	0x03ff,	0x03ff,	0x0155,	0x0155	}, /*n21*/
-		{	0x00,	0x00,	0x00,	0x00,	0x00,	0x00	}, /*n22*/
-		{	0xa3,	0xa3,	0xa3,	0xa3,	0xa3,	0xa3	}, /*agc_pulse_level*/
-		{	0xc8,	0xc8,	0xc8,	0xc8,	0xc8,	0xc8	}, /*bp_pulse_level*/
-	};
-
-	int nMode;
-	unsigned long misc;
-	unsigned short n0;
-
-	trigger_bits &= 0x3;
-
-	/*Determine the OEM Macrovision Program Mode and Register 0 Data.*/
-	if (IS_NTSC(tv_std))
-	{
-		/*NTSC TV Standard.*/
-		if (trigger_bits == 0)	
-		{
-			/*turn Macrovision OFF.*/
-			nMode = nNTSC_APS00;
-		}
-		else if (trigger_bits == 1)
-		{
-			/*AGC Only.*/
-			nMode = nNTSC_APS01;
-		}
-		else if (trigger_bits == 2)
-		{
-			/*AGC + 2-line CS.*/
-			nMode = nNTSC_APS10;
-		}
-		else
-		{
-			/*AGC + 4-line CS.*/
-			nMode = nNTSC_APS11;
-		}
-	}
-	else
-	{
-		/*PAL TV Standard.*/
-		if (trigger_bits == 0)
-		{
-			/*turn Macrovision OFF.*/
-			nMode = nPAL_APS00;
-		}
-		else
-		{
-			/*APS 01, 10, or 11.*/
-			nMode = nPAL_APSXX;
-		}
-	}
-
-	/*Retrieve the Macrovision Program Mode Data*/
-	if (tv_std != GFX_TV_STANDARD_PAL_M)
-		n0 = mvsetup.n0[nMode];
-	else
-	{
-		/*PAL-M sets up like NTSC except for n0.*/
-		if ((trigger_bits & 0x03) == 0)
-			n0 = mvsetup.n0[nPAL_APS00];
-		else
-			n0 = mvsetup.n0[nPAL_APSXX];
-	}
-
-	/*download settings now.*/
-	houston_WriteReg(MV_N0, n0, 1);
-	houston_WriteReg(MV_N1, mvsetup.n1[nMode], 1);
-	houston_WriteReg(MV_N2, mvsetup.n2[nMode], 1);
-	houston_WriteReg(MV_N3, mvsetup.n3[nMode], 1);
-	houston_WriteReg(MV_N4, mvsetup.n4[nMode], 1);
-	houston_WriteReg(MV_N5, mvsetup.n5[nMode], 1);
-	houston_WriteReg(MV_N6, mvsetup.n6[nMode], 1);
-	houston_WriteReg(MV_N7, mvsetup.n7[nMode], 1);
-	houston_WriteReg(MV_N8, mvsetup.n8[nMode], 1);
-	houston_WriteReg(MV_N9, mvsetup.n9[nMode], 1);
-	houston_WriteReg(MV_N10, mvsetup.n10[nMode], 1);
-	houston_WriteReg(MV_N11, mvsetup.n11[nMode] & 0xff, 1);
-	houston_WriteReg(MV_N11+1, mvsetup.n11[nMode] >> 8, 1);
-	houston_WriteReg(MV_N12, mvsetup.n12[nMode] & 0xff, 1);
-	houston_WriteReg(MV_N12+1, mvsetup.n12[nMode] >> 8, 1);
-	houston_WriteReg(MV_N13, mvsetup.n13[nMode], 1);
-	houston_WriteReg(MV_N14, mvsetup.n14[nMode], 1);
-	houston_WriteReg(MV_N15, mvsetup.n15[nMode], 1);
-	houston_WriteReg(MV_N16, mvsetup.n16[nMode], 1);
-	houston_WriteReg(MV_N17, mvsetup.n17[nMode], 1);
-	houston_WriteReg(MV_N18, mvsetup.n18[nMode], 1);
-	houston_WriteReg(MV_N19, mvsetup.n19[nMode], 1);
-	houston_WriteReg(MV_N20, mvsetup.n20[nMode], 1);
-	houston_WriteReg(MV_N21, mvsetup.n21[nMode] & 0xff, 1);
-	houston_WriteReg(MV_N21+1, mvsetup.n21[nMode] >> 8, 1);
-	houston_WriteReg(MV_N22, mvsetup.n22[nMode], 1);
-	houston_WriteReg(MV_AGC_PULSE_LEVEL, mvsetup.agc_pulse_level[nMode], 1);
-	houston_WriteReg(MV_BP_PULSE_LEVEL, mvsetup.bp_pulse_level[nMode], 1);
-
-	houston_ReadReg(HOUSTON_MISC, &misc, 2);
-	if (trigger_bits == 0)
-		misc &= ~MISC_MV_SOFT_EN;
-	else
-		misc |= MISC_MV_SOFT_EN;
-	houston_WriteReg(HOUSTON_MISC, misc, 2);
-}
-
-static void conget_macrovision(unsigned long tv_std, unsigned int *p_cp_trigger_bits)
-{
-	unsigned long n0,n1;
-	
-	if (!p_cp_trigger_bits)
-		return;
-
-	houston_ReadReg(MV_N0,&n0,1);
-	houston_ReadReg(MV_N1,&n1,1);
-
-	*p_cp_trigger_bits = 0;
-
-	if (IS_NTSC(tv_std))
-	{
-		switch(n0)
-		{
-			case 0:
-				*p_cp_trigger_bits = 0;
-			break;
-
-			case 0x36:
-				*p_cp_trigger_bits = 1;
-			break;
-
-			case 0x3E:
-			{
-				if (0x1D == n1)
-					*p_cp_trigger_bits = 2;
-				else
-					*p_cp_trigger_bits = 3;
-			}
-			break;
-		}
-	}
-	else if (IS_PAL(tv_std))
-	{
-		if (0 == n0)
-			*p_cp_trigger_bits = 0;
-		else
-		{
-			/*don't know here what the non-zero trigger bits were*/
-			*p_cp_trigger_bits = 1;
-		}
-	}
-}
-
-/*//	PLAL_MediaGX.cpp*/
-/*//==========================================================================*/
-/****/
-/*These functions provides implementation of platform-specific functions*/
-/*MediaGX platform.*/
-/****/
-/*//==========================================================================*/
-
-/*MediaGX control registers.*/
-#define CCR3	0xC3
-#define	GCR		0xb8
-
-/*Media GX registers*/
-/*
-#define	DC_UNLOCK			0x8300
-#define	DC_GENERAL_CFG		0x8304
-#define	DC_TIMING_CFG		0x8308
-#define	DC_OUTPUT_CFG		0x830c
-#define	DC_H_TIMING_1		0X8330
-#define	DC_H_TIMING_2		0X8334
-#define	DC_H_TIMING_3		0X8338
-#define	DC_FP_H_TIMING		0X833c
-#define	DC_V_TIMING_1		0X8340
-#define	DC_V_TIMING_2		0X8344
-#define	DC_V_TIMING_3		0X8348
-#define	DC_FP_V_TIMING		0X834c
-*/
-/*Media GX general config register.*/
-#define	GX_DCLK_MUL			0x00c0
-#define	GX_DCLKx1			0x0040
-#define	GX_DCLKx2			0x0080
-#define GX_DCLKx4			0x00c0
-
-/*Media GX timing config register.*/
-#define	GX_TGEN				0x0020
-
-/*Cx5530 register offsets (from GX_BASE).*/
-#define	CX_DISPLAY_CONFIG	0x10004
-#define	CX_DOT_CLK			0x10024
-#define	CX_TV_CONFIG		0x10028
-
-/*Cx5530 display configuration register.*/
-#define	CX_FPVSYNC_POL		0x0800
-#define	CX_FPHSYNC_POL		0x0400
-#define	CX_FPDATA_ENB		0x0080
-#define	CX_FPPOWER_ENB		0x0040
-#define CX_CRTVSYNC_POL		0x0200
-#define CX_CRTHSYNC_POL		0x0100
-
-/*Cx5530 dot clock configuration register.*/
-#define	CX_TVCLK_SELECT		0x0400
-
-/*Cx5530 tv configuration register*/
-#define CX_INVERT_FPCLK (1 << 6)
-
-/*//==========================================================================*/
-/****/
-/*//	FS450 I2C Address*/
-/****/
-/*//	There are two possible 7-bit addresses, 0x4A and 0x6A.*/
-/*//	The address if selectable via pins on the FS450.*/
-/*//	There are also two possible 10-bit addresses, 0x224 and 0x276, but this*/
-/*//	source is not designed to use them.*/
-/****/
-
-#define	FS450_I2C_ADDRESS (0x4A)
-
-static unsigned char PLAL_FS450_i2c_address(void)
-{
-	return FS450_I2C_ADDRESS;
-}
-
-
-/*//==========================================================================*/
-/****/
-/*//	FS450 UIM mode*/
-/****/
-/*//	This mode is programmed in the FS450 command register when enabling TV*/
-/*//	out.*/
-
-static int PLAL_FS450_UIM_mode(void)
-{
-	return 3;
-}
-
-/*//==========================================================================*/
-/****/
-/*//	Read and Write MediaGX registers*/
-
-static unsigned long ReadGx(unsigned long inRegAddr)
-{
-	unsigned long data;
-
-	DMAL_ReadUInt32(inRegAddr, &data);
-
-	return data;
-}
-
-static void WriteGx(unsigned long inRegAddr, unsigned long inData)
-{
-	int is_timing_register;
-	unsigned long reg_timing_cfg;
-
-	/*because the unlock register for the MediaGx video registers may not*/
-	/*persist, we will write the unlock code before every write.*/
-	DMAL_WriteUInt32(DC_UNLOCK, 0x4758);
-
-	/*see if register is a timing register*/
-	is_timing_register =
-		(DC_H_TIMING_1 == inRegAddr) ||
-		(DC_H_TIMING_2 == inRegAddr) ||
-		(DC_H_TIMING_3 == inRegAddr) ||
-		(DC_FP_H_TIMING == inRegAddr) ||
-		(DC_V_TIMING_1 == inRegAddr) ||
-		(DC_V_TIMING_2 == inRegAddr) ||
-		(DC_V_TIMING_3 == inRegAddr) ||
-		(DC_FP_V_TIMING == inRegAddr);
-
-	/*if the register is a timing register, clear the TGEN bit to allow modification*/
-	if (is_timing_register)
-	{
-		DMAL_ReadUInt32(DC_TIMING_CFG, &reg_timing_cfg);
-		DMAL_WriteUInt32(DC_TIMING_CFG, reg_timing_cfg & ~GX_TGEN);
-	}
-
-	/*write the requested register*/
-	DMAL_WriteUInt32(inRegAddr, inData);
-
-	/*reset the TGEN bit to previous state*/
-	if (is_timing_register)
-	{
-		DMAL_WriteUInt32(DC_TIMING_CFG, reg_timing_cfg);
-	}
-}
-
-#ifdef FS450_DIRECTREG
-
-/*//==========================================================================*/
-/****/
-/*//	Platform-specific processing for a Read or Write Register calls.*/
-/*//	The functions should return true if the specified register belongs to*/
-/*//	this platform.*/
-
-static int PLAL_ReadRegister(S_REG_INFO *p_reg)
-{
-	if (!p_reg)
-		return 0;
-
-	if (SOURCE_GCC == p_reg->source)
-	{
-		p_reg->value = ReadGx(p_reg->offset);
-
-		return 1;
-	}
-
-	return 0;
-}
-
-static int PLAL_WriteRegister(const S_REG_INFO *p_reg)
-{
-	if (!p_reg)
-		return 0;
-
-	if (SOURCE_GCC == p_reg->source)
-	{
-		WriteGx(p_reg->offset, p_reg->value);
-
-		return 1;
-	}
-
-	return 0;
-}
-
-#endif
-
-
-/*//==========================================================================*/
-/****/
-/*//	Determine if TV is on*/
-
-static int PLAL_IsTVOn(void)
-{
-	unsigned long reg;
-
-	/*check Cx5530 dot clock*/
-	reg = ReadGx(CX_DOT_CLK);
-	return (reg & CX_TVCLK_SELECT) ? 1 : 0;
-}
-
-
-/*//==========================================================================*/
-/****/
-/*//	Platform-specific actions to reset to VGA mode*/
-
-static int PLAL_EnableVga(void)
-{
-	unsigned long reg;
-
-	/*2 x dclk*/
-	reg = ReadGx(DC_GENERAL_CFG);
-	reg &= ~GX_DCLK_MUL;
-	reg |= GX_DCLKx2;
-	WriteGx(DC_GENERAL_CFG, reg);
-
-	/*select pll dot clock.*/
-	reg = ReadGx(CX_DOT_CLK);
-	reg &= ~CX_TVCLK_SELECT;
-	WriteGx(CX_DOT_CLK, reg);
-
-	/*timing config, reset everything on dclk.*/
-	reg = ReadGx(DC_TIMING_CFG);
-	reg &= ~GX_TGEN;
-	WriteGx(DC_TIMING_CFG, reg);
-	reg |= GX_TGEN;
-	WriteGx(DC_TIMING_CFG, reg);
-
-	/*un-invert FP clock*/
-	reg = ReadGx(CX_TV_CONFIG);
-	reg &= ~CX_INVERT_FPCLK;
-	WriteGx(CX_TV_CONFIG,reg);
-
-    return 0;
-}
-
-
-/*//==========================================================================*/
-/****/
-/*//	Platform-specific actions to enter TVout mode*/
-
-static int PLAL_PrepForTVout(void)
-{
-	unsigned int reg;
-
-	/*Cx5530 tv config.*/
-	reg = 0;
-	WriteGx(CX_TV_CONFIG, reg);
-
-	/*invert FP clock*/
-	reg = (int)ReadGx(CX_TV_CONFIG);
-	reg |= CX_INVERT_FPCLK;
-	WriteGx(CX_TV_CONFIG,reg);
-
-	return 0;
-}
-
-static int PLAL_SetTVTimingRegisters(const S_TIMING_SPECS *p_specs)
-{
-	unsigned long reg;
-	
-	/*timing config, reset everything on dclk.*/
-	reg = ReadGx(DC_TIMING_CFG);
-	reg &= ~GX_TGEN;
-	WriteGx(DC_TIMING_CFG, reg);
-
-	/*htotal and hactive.*/
-	reg = ((p_specs->h_total-1) << 16) | (p_specs->vga_width-1);
-	WriteGx(DC_H_TIMING_1, reg);
-	
-	/*hblank.*/
-	reg = ((p_specs->h_total-1) << 16) | (p_specs->vga_width-1);
-	WriteGx(DC_H_TIMING_2, reg);
-	
-	/*hsync.*/
-	reg = ((p_specs->h_sync+63) << 16) | p_specs->h_sync;
-	WriteGx(DC_H_TIMING_3, reg);
-
-	/*fp hsync.*/
-	WriteGx(DC_FP_H_TIMING, reg);
-
-	/*vtotal and vactive.*/
-	reg = ((p_specs->v_total-1) << 16) | (p_specs->vga_lines-1);
-	WriteGx(DC_V_TIMING_1, reg);
-	
-	/*vblank.*/
-	reg = ((p_specs->v_total-1) << 16) | (p_specs->vga_lines-1);
-	WriteGx(DC_V_TIMING_2, reg);
-
-	/*vsync.*/
-	reg = ((p_specs->v_sync) << 16) | (p_specs->v_sync-1);
-	WriteGx(DC_V_TIMING_3, reg);
-
-	/*fp vsync.*/
-	reg = ((p_specs->v_sync-1) << 16) | (p_specs->v_sync-2);
-	WriteGx(DC_FP_V_TIMING, reg);
-
-	/*timing config, reenable all dclk stuff.*/
-	reg = ReadGx(DC_TIMING_CFG);
-	reg |= GX_TGEN;
-	WriteGx(DC_TIMING_CFG, reg);
-
-	return 0;
-}
-
-static int PLAL_FinalEnableTVout(unsigned long vga_mode)
-{
-	unsigned int reg;
-
-	/*Cx5530 select tv dot clock.*/
-	reg = (int)ReadGx(CX_DOT_CLK);
-	reg |= CX_TVCLK_SELECT;
-	WriteGx(CX_DOT_CLK, reg);
-
-	/*2 x dclk (actually 1x)*/
-	reg = (int)ReadGx(DC_GENERAL_CFG);
-	reg &= ~GX_DCLK_MUL;
-	WriteGx(DC_GENERAL_CFG, reg);
-	
-	
-	reg |= GX_DCLKx2;
-	WriteGx(DC_GENERAL_CFG, reg);
-
-	/*Cx5530 display configuration register.*/
-	reg = (int)ReadGx(CX_DISPLAY_CONFIG);
-	reg |= (CX_FPVSYNC_POL | CX_FPHSYNC_POL | CX_FPDATA_ENB | CX_FPPOWER_ENB);
-	WriteGx(CX_DISPLAY_CONFIG, reg);
-
-/*disable, shouldn't be necessary*/
-#if 0
-	/*kick MediaGX clock multiplier to clean up clock*/
-	reg = ReadGx(DC_GENERAL_CFG);
-	reg &= ~GX_DCLK_MUL;
-	WriteGx(DC_GENERAL_CFG, reg);
-	reg |= GX_DCLKx2;
-	WriteGx(DC_GENERAL_CFG, reg);
-#endif
-
-	return 0;
-}
-
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/vid_1200.c b/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/vid_1200.c
deleted file mode 100644
index 4d1837d85..000000000
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/vid_1200.c
+++ /dev/null
@@ -1,2532 +0,0 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/vid_1200.c,v 1.1 2002/10/11 14:33:01 alanh Exp $ */
-/*
- * $Workfile: vid_1200.c $
- *
- * This file contains routines to control the SC1200 video overlay hardware.
- *
- * NSC_LIC_ALTERNATIVE_PREAMBLE
- *
- * Revision 1.0
- *
- * National Semiconductor Alternative GPL-BSD License
- *
- * National Semiconductor Corporation licenses this software 
- * ("Software"):
- *
- *      Durango
- *
- * under one of the two following licenses, depending on how the 
- * Software is received by the Licensee.
- * 
- * If this Software is received as part of the Linux Framebuffer or
- * other GPL licensed software, then the GPL license designated 
- * NSC_LIC_GPL applies to this Software; in all other circumstances 
- * then the BSD-style license designated NSC_LIC_BSD shall apply.
- *
- * END_NSC_LIC_ALTERNATIVE_PREAMBLE */
-
-/* NSC_LIC_BSD
- *
- * National Semiconductor Corporation Open Source License for Durango
- *
- * (BSD License with Export Notice)
- *
- * Copyright (c) 1999-2001
- * National Semiconductor Corporation.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without 
- * modification, are permitted provided that the following conditions 
- * are met: 
- *
- *   * Redistributions of source code must retain the above copyright 
- *     notice, this list of conditions and the following disclaimer. 
- *
- *   * Redistributions in binary form must reproduce the above 
- *     copyright notice, this list of conditions and the following 
- *     disclaimer in the documentation and/or other materials provided 
- *     with the distribution. 
- *
- *   * Neither the name of the National Semiconductor Corporation nor 
- *     the names of its contributors may be used to endorse or promote 
- *     products derived from this software without specific prior 
- *     written permission. 
- * 
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
- * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
- * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE,
- * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
- * OF SUCH DAMAGE.
- *
- * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
- * YOUR JURISDICTION. It is licensee's responsibility to comply with 
- * any export regulations applicable in licensee's jurisdiction. Under 
- * CURRENT (2001) U.S. export regulations this software 
- * is eligible for export from the U.S. and can be downloaded by or 
- * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
- * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
- * Syria, Sudan, Afghanistan and any other country to which the U.S. 
- * has embargoed goods and services. 
- *
- * END_NSC_LIC_BSD */
-
-/* NSC_LIC_GPL
- *
- * National Semiconductor Corporation Gnu General Public License for Durango
- *
- * (GPL License with Export Notice)
- *
- * Copyright (c) 1999-2001
- * National Semiconductor Corporation.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without 
- * modification, are permitted under the terms of the GNU General 
- * Public License as published by the Free Software Foundation; either 
- * version 2 of the License, or (at your option) any later version  
- *
- * In addition to the terms of the GNU General Public License, neither 
- * the name of the National Semiconductor Corporation nor the names of 
- * its contributors may be used to endorse or promote products derived 
- * from this software without specific prior written permission. 
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
- * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
- * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, 
- * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
- * OF SUCH DAMAGE. See the GNU General Public License for more details. 
- *
- * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
- * YOUR JURISDICTION. It is licensee's responsibility to comply with 
- * any export regulations applicable in licensee's jurisdiction. Under 
- * CURRENT (2001) U.S. export regulations this software 
- * is eligible for export from the U.S. and can be downloaded by or 
- * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
- * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
- * Syria, Sudan, Afghanistan and any other country to which the U.S. 
- * has embargoed goods and services. 
- *
- * You should have received a copy of the GNU General Public License 
- * along with this file; if not, write to the Free Software Foundation, 
- * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 
- *
- * END_NSC_LIC_GPL */
-
-
-/*----------------------------------------------------------------------------
- * SC1200 PLL TABLE
- *----------------------------------------------------------------------------
- */
-
-typedef struct tagSC1200PLL
-{
-	long frequency;					/* 16.16 fixed point frequency */
-	unsigned long clock_select;		/* clock select register (0x2C) */
-} SC1200PLL;
-
-SC1200PLL gfx_sc1200_clock_table[] = {
-    { (25L << 16) | ((1750L * 65536L) / 10000L), 0x0070E00C }, /* 25.1750 (sc=24.9231) */
-	{ (27L << 16) | ((0000L * 65536L) / 10000L), 0x00300100 }, /* 27.0000 */
-    { (28L << 16) | ((3220L * 65536L) / 10000L), 0x0070EC0C }, /* 28.3220 (SC=27.000) */
-    { (31L << 16) | ((5000L * 65536L) / 10000L), 0x00500D02 }, /* 31.5000 */
-    { (36L << 16) | ((0000L * 65536L) / 10000L), 0x00500F02 }, /* 36.0000 */
-    { (37L << 16) | ((5000L * 65536L) / 10000L), 0x0050B108 }, /* 37.5000 */
-    { (40L << 16) | ((0000L * 65536L) / 10000L), 0x0050D20D }, /* 40.0000 */
-    { (44L << 16) | ((9000L * 65536L) / 10000L), 0x0050DC0D }, /* 44.9000 */
-    { (49L << 16) | ((5000L * 65536L) / 10000L), 0x00501502 }, /* 49.5000 */
-    { (50L << 16) | ((0000L * 65536L) / 10000L), 0x0050A404 }, /* 50.0000 */
-    { (50L << 16) | ((3500L * 65536L) / 10000L), 0x0050E00C }, /* 50.3500 */
-    { (54L << 16) | ((0000L * 65536L) / 10000L), 0x00300300 }, /* 54.0000 */
-    { (56L << 16) | ((3916L * 65536L) / 10000L), 0x0050F40D }, /* 56.3916 */
-    { (56L << 16) | ((6440L * 65536L) / 10000L), 0x0050EC0C }, /* 56.6440 */
-    { (59L << 16) | ((0000L * 65536L) / 10000L), 0x0030A207 }, /* 59.0000 */
-    { (63L << 16) | ((0000L * 65536L) / 10000L), 0x00300D02 }, /* 63.0000 */
-    { (65L << 16) | ((0000L * 65536L) / 10000L), 0x0030CC0F }, /* 65.0000 */
-    { (67L << 16) | ((5000L * 65536L) / 10000L), 0x00300400 }, /* 67.5000 */
-    { (70L << 16) | ((8000L * 65536L) / 10000L), 0x00301403 }, /* 70.8000 */
-    { (72L << 16) | ((0000L * 65536L) / 10000L), 0x00300F02 }, /* 72.0000 */
-    { (75L << 16) | ((0000L * 65536L) / 10000L), 0x0030B108 }, /* 75.0000 */
-    { (78L << 16) | ((7500L * 65536L) / 10000L), 0x0030A205 }, /* 78.7500 */
-    { (80L << 16) | ((0000L * 65536L) / 10000L), 0x0030D20D }, /* 80.0000 */
-    { (87L << 16) | ((2728L * 65536L) / 10000L), 0x0030E00E }, /* 87.2728 */
-    { (89L << 16) | ((8000L * 65536L) / 10000L), 0x0030DC0D }, /* 89.8000 */
-    { (94L << 16) | ((5000L * 65536L) / 10000L), 0x00300600 }, /* 99.0000 */
-    { (99L << 16) | ((0000L * 65536L) / 10000L), 0x00301502 }, /* 99.0000 */
-    { (100L << 16) | ((0000L * 65536L) / 10000L), 0x0030A404 }, /* 100.00 */
-    { (108L << 16) | ((0000L * 65536L) / 10000L), 0x00100300 }, /* 108.00 */
-    { (112L << 16) | ((5000L * 65536L) / 10000L), 0x00301802 }, /* 108.00 */
-    { (130L << 16) | ((0000L * 65536L) / 10000L), 0x0010CC0F }, /* 130.00 */
-    { (135L << 16) | ((0000L * 65536L) / 10000L), 0x00100400 }, /* 135.00 */
-    { (157L << 16) | ((5000L * 65536L) / 10000L), 0x0010A205 }, /* 157.50 */
-    { (162L << 16) | ((0000L * 65536L) / 10000L), 0x00100500 }, /* 162.00 */
-    { (175L << 16) | ((0000L * 65536L) / 10000L), 0x0010E00E }, /* 175.50 */
-    { (189L << 16) | ((0000L * 65536L) / 10000L), 0x00100600 }, /* 189.00 */
-    { (202L << 16) | ((0000L * 65536L) / 10000L), 0x0010EF0E }, /* 202.50 */
-    { (232L << 16) | ((0000L * 65536L) / 10000L), 0x0010AA04 }, /* 232.50 */
-
-      /* Precomputed inidces in the hardware */
-	{ 0x0018EC4D, 0x000F0000 }, /*  24.923052 */
-	{ 0x00192CCC, 0x00000000 }, /*  25.1750 */
-	{ 0x001B0000, 0x00300100 }, /*  27.0000 */
-    { 0x001F8000, 0x00010000 }, /*  31.5000 */
-    { 0x00240000, 0x00020000 }, /*  36.0000 */
-    { 0x00280000, 0x00030000 }, /*  40.0000 */
-    { 0x00318000, 0x00050000 }, /*  49.5000 */
-    { 0x00320000, 0x00040000 }, /*  50.0000 */
-	{ 0x00384000, 0x00060000 }, /*  56.2500 */
-	{ 0x00410000, 0x00080000 }, /*  65.0000 */
-	{ 0x004E8000, 0x000A0000 }, /*  78.5000 */
-	{ 0x005E8000, 0x000B0000 }, /*  94.5000 */
-	{ 0x006C0000, 0x000C0000 }, /* 108.0000 */
-	{ 0x00870000, 0x000D0000 }, /* 135.0000 */
-};
-
-#define NUM_SC1200_FREQUENCIES sizeof(gfx_sc1200_clock_table)/sizeof(SC1200PLL)
-
-/*---------------------------------------------------------------------------
- * gfx_reset_video (PRIVATE ROUTINE: NOT PART OF DURANGO API)
- *
- * This routine is used to disable all components of video overlay before
- * performing a mode switch.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-void sc1200_reset_video(void)
-#else
-void gfx_reset_video(void)
-#endif
-{
-	int i;
-
-	gfx_set_video_enable(0);
-	
-	/* SET WINDOW 0 AFTER RESET */
-	
-	for (i = 2; i >= 0; i--)
-	{
-		gfx_select_alpha_region(i);
-		gfx_set_alpha_enable(0);
-		gfx_set_alpha_color_enable(0);
-	}
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_set_display_control (PRIVATE ROUTINE: NOT PART OF DURANGO API)
- *
- * This routine configures the display output.
- *
- * "sync_polarities" is used to set the polarities of the sync pulses according
- * to the following mask:
- *
- *     Bit 0: If set to 1, negative horizontal polarity is programmed,
- *            otherwise positive horizontal polarity is programmed.
- *     Bit 1: If set to 1, negative vertical polarity is programmed,
- *            otherwise positive vertical polarity is programmed.
- *
- *-----------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int sc1200_set_display_control(int sync_polarities)
-#else
-int gfx_set_display_control(int sync_polarities)
-#endif
-{
-	unsigned long dcfg;
-
-	/* CONFIGURE DISPLAY OUTPUT FROM VIDEO PROCESSOR */
-
-	dcfg = READ_VID32(SC1200_DISPLAY_CONFIG);
-	dcfg &= ~(SC1200_DCFG_CRT_SYNC_SKW_MASK | SC1200_DCFG_PWR_SEQ_DLY_MASK |
-		      SC1200_DCFG_CRT_HSYNC_POL | SC1200_DCFG_CRT_VSYNC_POL |
-			  SC1200_DCFG_FP_PWR_EN | SC1200_DCFG_FP_DATA_EN);
-
-	dcfg |= (SC1200_DCFG_CRT_SYNC_SKW_INIT |
-			 SC1200_DCFG_PWR_SEQ_DLY_INIT |
-			 SC1200_DCFG_GV_PAL_BYP);
-
-	if (PanelEnable)
-		dcfg |= SC1200_DCFG_FP_PWR_EN;
-		
-	/* SET APPROPRIATE SYNC POLARITIES */
-
-	if (sync_polarities & 0x1)
-		dcfg |= SC1200_DCFG_CRT_HSYNC_POL;
-	if (sync_polarities & 0x2)
-		dcfg |= SC1200_DCFG_CRT_VSYNC_POL;
-
-	WRITE_VID32(SC1200_DISPLAY_CONFIG, dcfg);
-
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_clock_frequency
- *
- * This routine sets the clock frequency, specified as a 16.16 fixed point
- * value (0x00318000 = 49.5 MHz).  It will set the closest frequency found
- * in the lookup table.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-void sc1200_set_clock_frequency(unsigned long frequency)
-#else
-void gfx_set_clock_frequency(unsigned long frequency)
-#endif
-{
-	int index;
-	unsigned long value, pll;
-	long min, diff;
-
-	/* FIND THE REGISTER VALUES FOR THE DESIRED FREQUENCY */
-	/* Search the table for the closest frequency (16.16 format). */
-
-	value = gfx_sc1200_clock_table[0].clock_select;
-	min = (long) gfx_sc1200_clock_table[0].frequency - frequency;
-	if (min < 0L) min = -min;
-	for (index = 1; index < NUM_SC1200_FREQUENCIES; index++)
-	{
-		diff = (long) gfx_sc1200_clock_table[index].frequency - frequency;
-		if (diff < 0L) diff = -diff;
-		if (diff < min)
-		{
-			min = diff; 
-			value = gfx_sc1200_clock_table[index].clock_select;
-		}
-	}
-
-	/* SET THE DOT CLOCK REGISTER */
-
-	pll = READ_VID32(SC1200_VID_MISC);
-	WRITE_VID32(SC1200_VID_MISC, pll | SC1200_PLL_POWER_NORMAL);
-	WRITE_VID32(SC1200_VID_CLOCK_SELECT, value);
-	return;
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_screen_enable (PRIVATE ROUTINE - NOT PART OF API)
- * 
- * This routine enables or disables the graphics display logic of the video processor.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int sc1200_set_screen_enable(int enable)
-#else
-int gfx_set_screen_enable(int enable)
-#endif
-{
-	unsigned long config;
-	config = READ_VID32(SC1200_DISPLAY_CONFIG);
-	if (enable)
-		WRITE_VID32(SC1200_DISPLAY_CONFIG, config | SC1200_DCFG_DIS_EN);
-	else
-		WRITE_VID32(SC1200_DISPLAY_CONFIG, config & ~SC1200_DCFG_DIS_EN);
-	return(GFX_STATUS_OK);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_crt_enable
- * 
- * This routine enables or disables the CRT output from the video processor.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int sc1200_set_crt_enable(int enable)
-#else
-int gfx_set_crt_enable(int enable)
-#endif
-{
-	unsigned long config, misc;
-	config = READ_VID32(SC1200_DISPLAY_CONFIG);
-	misc = READ_VID32(SC1200_VID_MISC);
-
-	/*
-	 *  IMPORTANT: For all modes do NOT disable the graphics display logic
-	 *  because it might be needed for TV
-	 */
-
-	switch (enable)
-	{
-		case CRT_DISABLE:  /* HSync:Off VSync:Off */
-			WRITE_VID32(SC1200_DISPLAY_CONFIG, config & ~(SC1200_DCFG_HSYNC_EN
-													    | SC1200_DCFG_VSYNC_EN 
-														| SC1200_DCFG_DAC_BL_EN));
-			WRITE_VID32(SC1200_VID_MISC, misc | SC1200_DAC_POWER_DOWN);
-			break;
-		case CRT_ENABLE:  /* Enable CRT display, including display logic */
-			WRITE_VID32(SC1200_DISPLAY_CONFIG, config | SC1200_DCFG_HSYNC_EN
-												      | SC1200_DCFG_VSYNC_EN 
-													  | SC1200_DCFG_DAC_BL_EN);
-			WRITE_VID32(SC1200_VID_MISC, misc & ~SC1200_DAC_POWER_DOWN);
-
-			/* ENABLE GRAPHICS DISPLAY LOGIC */
-			gfx_set_screen_enable(1);
-			break;
-		case CRT_STANDBY:  /* HSync:Off VSync:On */
-			WRITE_VID32(SC1200_DISPLAY_CONFIG, (config & ~(SC1200_DCFG_HSYNC_EN 
-												 		 | SC1200_DCFG_DAC_BL_EN))
-													     | SC1200_DCFG_VSYNC_EN);
-			WRITE_VID32(SC1200_VID_MISC, misc | SC1200_DAC_POWER_DOWN);
-			break;
-		case CRT_SUSPEND:  /* HSync:On VSync:Off */
-			WRITE_VID32(SC1200_DISPLAY_CONFIG, (config & ~(SC1200_DCFG_VSYNC_EN 
-														 | SC1200_DCFG_DAC_BL_EN))
-													     | SC1200_DCFG_HSYNC_EN);
-			WRITE_VID32(SC1200_VID_MISC, misc | SC1200_DAC_POWER_DOWN);
-			break;
-		default:
-			return GFX_STATUS_BAD_PARAMETER;
-	}
-	return(GFX_STATUS_OK);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_set_video_enable
- *
- * This routine enables or disables the video overlay functionality.
- *-----------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int sc1200_set_video_enable(int enable)
-#else
-int gfx_set_video_enable(int enable)
-#endif
-{
-	unsigned long vcfg;
-
-	/* WAIT FOR VERTICAL BLANK TO START */
-	/* Otherwise a glitch can be observed. */
-
-	if (gfx_test_timing_active())
-	{
-		if (!gfx_test_vertical_active())
-		{
-			while(!gfx_test_vertical_active());
-		}
-		while(gfx_test_vertical_active());
-	}
-
-	vcfg = READ_VID32(SC1200_VIDEO_CONFIG);
-	if (enable)
-	{
-		/* ENABLE VIDEO OVERLAY FROM DISPLAY CONTROLLER */
-		/* Use private routine to abstract the display controller. */
-
-		gfx_set_display_video_enable(1);
-
-		/* ENABLE SC1200 VIDEO OVERLAY */
-
-		vcfg |= SC1200_VCFG_VID_EN;
-		WRITE_VID32(SC1200_VIDEO_CONFIG, vcfg);
-	}
-	else
-	{
-		/* DISABLE SC1200 VIDEO OVERLAY */
-
-		vcfg &= ~SC1200_VCFG_VID_EN;
-		WRITE_VID32(SC1200_VIDEO_CONFIG, vcfg);
-
-		/* DISABLE VIDEO OVERLAY FROM DISPLAY CONTROLLER */
-		/* Use private routine to abstract the display controller. */
-
-		gfx_set_display_video_enable(0);
-	}
-	return(0);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_set_video_format
- *
- * Sets input video format type, to one of the YUV formats or to RGB.
- *-----------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int sc1200_set_video_format(unsigned long format)
-#else
-int gfx_set_video_format(unsigned long format)
-#endif
-{
-	unsigned long ctrl, vcfg = 0;
-
-	/* SET THE SC1200 VIDEO INPUT FORMAT */
-
-	vcfg = READ_VID32(SC1200_VIDEO_CONFIG);
-	ctrl = READ_VID32(SC1200_VID_ALPHA_CONTROL);
-	ctrl &= ~(SC1200_VIDEO_INPUT_IS_RGB);
-	vcfg &= ~(SC1200_VCFG_VID_INP_FORMAT | SC1200_VCFG_4_2_0_MODE);
-	switch(format)
-	{
-	case VIDEO_FORMAT_UYVY:
-		vcfg |= SC1200_VCFG_UYVY_FORMAT;
-		break;
-	case VIDEO_FORMAT_YUYV:
-		vcfg |= SC1200_VCFG_YUYV_FORMAT;
-		break;
-	case VIDEO_FORMAT_Y2YU:
-		vcfg |= SC1200_VCFG_Y2YU_FORMAT;
-		break;
-	case VIDEO_FORMAT_YVYU:
-		vcfg |= SC1200_VCFG_YVYU_FORMAT;
-		break;
-	case VIDEO_FORMAT_Y0Y1Y2Y3:
-		vcfg |= SC1200_VCFG_UYVY_FORMAT;
-		vcfg |= SC1200_VCFG_4_2_0_MODE;
-		break;
-	case VIDEO_FORMAT_Y3Y2Y1Y0:
-		vcfg |= SC1200_VCFG_Y2YU_FORMAT;
-		vcfg |= SC1200_VCFG_4_2_0_MODE;
-		break;
-	case VIDEO_FORMAT_Y1Y0Y3Y2:
-		vcfg |= SC1200_VCFG_YUYV_FORMAT;
-		vcfg |= SC1200_VCFG_4_2_0_MODE;
-		break;
-	case VIDEO_FORMAT_Y1Y2Y3Y0:
-		vcfg |= SC1200_VCFG_YVYU_FORMAT;
-		vcfg |= SC1200_VCFG_4_2_0_MODE;
-		break;
-	case VIDEO_FORMAT_RGB:
-		ctrl |= SC1200_VIDEO_INPUT_IS_RGB;
-		vcfg |= SC1200_VCFG_UYVY_FORMAT;
-		break;
-	case VIDEO_FORMAT_P2M_P2L_P1M_P1L:
-		ctrl |= SC1200_VIDEO_INPUT_IS_RGB;
-		vcfg |= SC1200_VCFG_Y2YU_FORMAT;
-		break;
-	case VIDEO_FORMAT_P1M_P1L_P2M_P2L:
-		ctrl |= SC1200_VIDEO_INPUT_IS_RGB;
-		vcfg |= SC1200_VCFG_YUYV_FORMAT;
-		break;
-	case VIDEO_FORMAT_P1M_P2L_P2M_P1L:
-		ctrl |= SC1200_VIDEO_INPUT_IS_RGB;
-		vcfg |= SC1200_VCFG_YVYU_FORMAT;
-		break;
-	default:
-		return GFX_STATUS_BAD_PARAMETER;
-	}
-
-	/* ALWAYS DISABLE GRAPHICS CSC */
-	/* This is enabled in the function gfx_set_color_space_YUV for */
-	/* YUV blending on TV.                                         */
-
-	ctrl &= ~SC1200_CSC_GFX_RGB_TO_YUV;
-
-	if (ctrl & SC1200_VIDEO_INPUT_IS_RGB)
-		ctrl &= ~SC1200_CSC_VIDEO_YUV_TO_RGB;
-	else
-		ctrl |= SC1200_CSC_VIDEO_YUV_TO_RGB;
-
-	WRITE_VID32(SC1200_VIDEO_CONFIG, vcfg);
-	WRITE_VID32(SC1200_VID_ALPHA_CONTROL, ctrl);
-
-	return(0);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_set_video_size
- *
- * This routine specifies the size of the source data.  It is used only 
- * to determine how much data to transfer per frame, and is not used to 
- * calculate the scaling value (that is handled by a separate routine).
- *-----------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int sc1200_set_video_size(unsigned short width, unsigned short height)
-#else
-int gfx_set_video_size(unsigned short width, unsigned short height)
-#endif
-{
-	unsigned long size, vcfg;
-
-	/* SET THE SC1200 VIDEO LINE SIZE */
-
-	vcfg = READ_VID32(SC1200_VIDEO_CONFIG);
-	vcfg &= ~(SC1200_VCFG_LINE_SIZE_LOWER_MASK | SC1200_VCFG_LINE_SIZE_UPPER);
-	size = (width >> 1);
-	vcfg |= (size & 0x00FF) << 8;
-	if (size & 0x0100) vcfg |= SC1200_VCFG_LINE_SIZE_UPPER;
-	WRITE_VID32(SC1200_VIDEO_CONFIG, vcfg);
-
-	/* SET TOTAL VIDEO BUFFER SIZE IN DISPLAY CONTROLLER */
-	/* Use private routine to abstract the display controller. */
-
-	/* Add 1 line to bypass issue #803 */
-	gfx_set_display_video_size(width, (unsigned short)(height + 2));
-	return(0);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_set_video_offset
- *
- * This routine sets the starting offset for the video buffer when only 
- * one offset needs to be specified.
- *-----------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int sc1200_set_video_offset(unsigned long offset)
-#else
-int gfx_set_video_offset(unsigned long offset)
-#endif
-{
-	/* SAVE VALUE FOR FUTURE CLIPPING OF THE TOP OF THE VIDEO WINDOW */
-
-	gfx_vid_offset = offset;
-
-	/* SET VIDEO BUFFER OFFSET IN DISPLAY CONTROLLER */
-	/* Use private routine to abstract the display controller. */
-
-	gfx_set_display_video_offset(offset);
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_video_upscale
- * 
- * This routine sets the scale factor for the video overlay window.  The 
- * size of the source and destination regions are specified in pixels.  
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int sc1200_set_video_upscale(unsigned short srcw, unsigned short srch, 
-	unsigned short dstw, unsigned short dsth)
-#else
-int gfx_set_video_upscale(unsigned short srcw, unsigned short srch, 
-	unsigned short dstw, unsigned short dsth)
-#endif
-{
-	unsigned long xscale, yscale;
-	
-	/* SAVE PARAMETERS (unless don't-care zero destination arguments are used) */
-	/* These are needed for clipping the video window later. */
-
-	if (dstw != 0) {
-		gfx_vid_srcw = srcw;
-		gfx_vid_dstw = dstw;
-	}
-	if (dsth != 0) {
-		gfx_vid_srch = srch;
-		gfx_vid_dsth = dsth;
-	}	
-
-	/* CALCULATE SC1200 SCALE FACTORS */
-
-	if (dstw == 0) xscale = READ_VID32(SC1200_VIDEO_UPSCALE) & 0xffff; /* keep previous if don't-care argument */
-	else if (dstw <= srcw) xscale = 0x2000l; /* horizontal downscaling is currently done in a separate function */
-	else if ((srcw == 1) || (dstw == 1)) return GFX_STATUS_BAD_PARAMETER;
-	else xscale = (0x2000l * (srcw - 1l)) / (dstw - 1l);
-
-	if (dsth == 0) yscale = (READ_VID32(SC1200_VIDEO_UPSCALE) & 0xffff0000) >> 16; /* keep previous if don't-care argument */
-	else if (dsth <= srch) yscale = 0x2000l; /* No vertical downscaling in SC1200 so force to 1x if attempted */
-	else if ((srch == 1) || (dsth == 1)) return GFX_STATUS_BAD_PARAMETER;
-	else yscale = (0x2000l * (srch - 1l)) / (dsth - 1l);
-	
-	WRITE_VID32(SC1200_VIDEO_UPSCALE, (yscale << 16) | xscale);
-
-	/* CALL ROUTINE TO UPDATE WINDOW POSITION */
-	/* This is required because the scale values effect the number of */
-	/* source data pixels that need to be clipped, as well as the */
-	/* amount of data that needs to be transferred. */
-
-	gfx_set_video_window(gfx_vid_xpos, gfx_vid_ypos, gfx_vid_width, gfx_vid_height);
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_video_scale
- * 
- * This routine sets the scale factor for the video overlay window.  The 
- * size of the source and destination regions are specified in pixels.  
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int sc1200_set_video_scale(unsigned short srcw, unsigned short srch, 
-	unsigned short dstw, unsigned short dsth)
-#else
-int gfx_set_video_scale(unsigned short srcw, unsigned short srch, 
-	unsigned short dstw, unsigned short dsth)
-#endif
-{
-	return gfx_set_video_upscale(srcw, srch, dstw, dsth);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_video_downscale_config
- * 
- * This routine sets the downscale type and factor for the video overlay window.
- * Note: No downscaling support for RGB565 and YUV420 video formats.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int sc1200_set_video_downscale_config(unsigned short type, unsigned short m) 
-#else
-int gfx_set_video_downscale_config(unsigned short type, unsigned short m)
-#endif
-{
-	unsigned long downscale;
-	
-	if ((m < 1) || (m > 16)) return GFX_STATUS_BAD_PARAMETER;
-	
-	downscale = READ_VID32(SC1200_VIDEO_DOWNSCALER_CONTROL);
-	downscale &= ~(SC1200_VIDEO_DOWNSCALE_FACTOR_MASK | SC1200_VIDEO_DOWNSCALE_TYPE_MASK);
-	downscale |= ((m - 1l) << SC1200_VIDEO_DOWNSCALE_FACTOR_POS);
-	switch(type)
-	{
-	case VIDEO_DOWNSCALE_KEEP_1_OF:
-		downscale |= SC1200_VIDEO_DOWNSCALE_TYPE_A;
-		break;
-	case VIDEO_DOWNSCALE_DROP_1_OF:
-		downscale |= SC1200_VIDEO_DOWNSCALE_TYPE_B;
-		break;
-	default:
-		return GFX_STATUS_BAD_PARAMETER;
-	}
-	WRITE_VID32(SC1200_VIDEO_DOWNSCALER_CONTROL, downscale);
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_video_downscale_coefficients
- * 
- * This routine sets the downscale filter coefficients.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int sc1200_set_video_downscale_coefficients(unsigned short coef1, unsigned short coef2,
-											unsigned short coef3, unsigned short coef4) 
-#else
-int gfx_set_video_downscale_coefficients(unsigned short coef1, unsigned short coef2,
-										 unsigned short coef3, unsigned short coef4) 
-#endif
-{
-	if ((coef1 + coef2 + coef3 + coef4) != 16)
-	    return GFX_STATUS_BAD_PARAMETER;
-
-	WRITE_VID32(SC1200_VIDEO_DOWNSCALER_COEFFICIENTS, ((unsigned long)coef1 << SC1200_VIDEO_DOWNSCALER_COEF1_POS) |
-													  ((unsigned long)coef2 << SC1200_VIDEO_DOWNSCALER_COEF2_POS) |
-													  ((unsigned long)coef3 << SC1200_VIDEO_DOWNSCALER_COEF3_POS) |
-													  ((unsigned long)coef4 << SC1200_VIDEO_DOWNSCALER_COEF4_POS));
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_video_downscale_enable
- * 
- * This routine enables or disables downscaling for the video overlay window.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int sc1200_set_video_downscale_enable(int enable) 
-#else
-int gfx_set_video_downscale_enable(int enable)
-#endif
-{
-	unsigned long downscale;
-	
-	downscale = READ_VID32(SC1200_VIDEO_DOWNSCALER_CONTROL);
-	downscale &= ~SC1200_VIDEO_DOWNSCALE_ENABLE;
-	if (enable)
-		downscale |= SC1200_VIDEO_DOWNSCALE_ENABLE;
-	WRITE_VID32(SC1200_VIDEO_DOWNSCALER_CONTROL, downscale);
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_video_window
- * 
- * This routine sets the position and size of the video overlay window.  The 
- * y position is specified in screen relative coordinates, and may be negative.  
- * The size of destination region is specified in pixels.  The line size
- * indicates the number of bytes of source data per scanline.
- * For the effect of negative x values, call the function
- * gfx_set_video_left_crop(). 
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int sc1200_set_video_window(short x, short y, unsigned short w, unsigned short h)
-#else
-int gfx_set_video_window(short x, short y, unsigned short w, unsigned short h)
-#endif
-{
-	unsigned long control;
-	unsigned long hadjust, vadjust;
-	unsigned long xstart, ystart, xend, yend;
-
-	/* For left cropping call the function gfx_set_video_left_crop() */
-
-	if (x < 0)
-		return GFX_STATUS_BAD_PARAMETER;
-
-	/* SAVE PARAMETERS */
-	/* These are needed to call this routine if the scale value changes. */
-	/* In the case of SC1200 they are also needed for restoring when video is re-enabled */
-
-	gfx_vid_xpos = x;
-	gfx_vid_ypos = y;
-	gfx_vid_width = w;
-	gfx_vid_height = h;
-
-	/* GET ADJUSTMENT VALUES */
-	/* Use routines to abstract version of display controller. */
-
-	hadjust = gfx_get_htotal() - gfx_get_hsync_end() - 14l;
-	vadjust = gfx_get_vtotal() - gfx_get_vsync_end() + 1l;
-	
-	/* HORIZONTAL START */
-
-	xstart = (unsigned long)x + hadjust;
-
-	/* HORIZONTAL END */
-	/* End positions in register are non-inclusive (one more than the actual end) */
-	
-	if ((x + w) < gfx_get_hactive())
-		xend = (unsigned long)x + (unsigned long)w + hadjust;
-	else                                       /* right clipping needed */
-		xend = (unsigned long)gfx_get_hactive() + hadjust;
-
-	/* VERTICAL START */
-	
-	ystart = (unsigned long)y + vadjust;
-	
-	/* VERTICAL END */
-	
-	if ((y + h) < gfx_get_vactive())
-		yend = (unsigned long)y + (unsigned long)h + vadjust;
-	else                                        /* bottom clipping needed */
-		yend = (unsigned long)gfx_get_vactive() + vadjust;
-
-	/* SET VIDEO LINE INVERT BIT */
-
-	control = READ_VID32(SC1200_VID_ALPHA_CONTROL);
-	if (y & 0x1)
-		WRITE_VID32(SC1200_VID_ALPHA_CONTROL, control | SC1200_VIDEO_LINE_OFFSET_ODD);
-	else
-		WRITE_VID32(SC1200_VID_ALPHA_CONTROL, control & ~SC1200_VIDEO_LINE_OFFSET_ODD);
-
-	/* SET VIDEO POSITION */
-
-	WRITE_VID32(SC1200_VIDEO_X_POS, (xend << 16) | xstart);
-	WRITE_VID32(SC1200_VIDEO_Y_POS, (yend << 16) | ystart);
-
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_video_left_crop
- * 
- * This routine sets the number of pixels which will be cropped from the
- * beginning of each video line. The video window will begin to display only
- * from the pixel following the cropped pixels, and the cropped pixels
- * will be ignored.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int sc1200_set_video_left_crop(unsigned short x)
-#else
-int gfx_set_video_left_crop(unsigned short x)
-#endif
-{
-	unsigned long vcfg, initread;
-
-	/* CLIPPING ON LEFT */
-	/* Adjust initial read for scale, checking for divide by zero */
-
-	if (gfx_vid_dstw) 
-		initread = (unsigned long)x * gfx_vid_srcw / gfx_vid_dstw;
-	else initread = 0l;
-	
-	/* SET INITIAL READ ADDRESS */
-
-	vcfg = READ_VID32(SC1200_VIDEO_CONFIG);
-	vcfg &= ~SC1200_VCFG_INIT_READ_MASK;
-	vcfg |= (initread << 15) & SC1200_VCFG_INIT_READ_MASK;
-	WRITE_VID32(SC1200_VIDEO_CONFIG, vcfg);
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_video_color_key
- * 
- * This routine specifies the color key value and mask for the video overlay
- * hardware. To disable color key, the color and mask should both be set to 
- * zero. The hardware uses the color key in the following equation:
- *
- * ((source data) & (color key mask)) == ((color key) & (color key mask))
- *
- * If "graphics" is set to TRUE, the source data is graphics, and color key
- * is an RGB value. If "graphics" is set to FALSE, the source data is the video,
- * and color key is a YUV value.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int sc1200_set_video_color_key(unsigned long key, unsigned long mask, 
-	int graphics)
-#else
-int gfx_set_video_color_key(unsigned long key, unsigned long mask, 
-	int graphics)
-#endif
-{
-	unsigned long dcfg = 0;
-
-	/* SET SC1200 COLOR KEY VALUE */
-
-	WRITE_VID32(SC1200_VIDEO_COLOR_KEY, key);
-	WRITE_VID32(SC1200_VIDEO_COLOR_MASK, mask);
-
-	/* SELECT GRAPHICS OR VIDEO DATA TO COMPARE TO THE COLOR KEY */
-
-	dcfg = READ_VID32(SC1200_DISPLAY_CONFIG);
-	if (graphics & 0x01) dcfg &= ~SC1200_DCFG_VG_CK;
-	else dcfg |= SC1200_DCFG_VG_CK;
-	WRITE_VID32(SC1200_DISPLAY_CONFIG, dcfg);
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_video_filter
- * 
- * This routine enables or disables the video overlay filters.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int sc1200_set_video_filter(int xfilter, int yfilter)
-#else
-int gfx_set_video_filter(int xfilter, int yfilter)
-#endif
-{
-	unsigned long vcfg = 0;
-
-	/* ENABLE OR DISABLE SC1200 VIDEO OVERLAY FILTERS */
-
-	vcfg = READ_VID32(SC1200_VIDEO_CONFIG);
-	vcfg &= ~(SC1200_VCFG_X_FILTER_EN | SC1200_VCFG_Y_FILTER_EN);
-	if (xfilter) vcfg |= SC1200_VCFG_X_FILTER_EN;
-	if (yfilter) vcfg |= SC1200_VCFG_Y_FILTER_EN;
-	WRITE_VID32(SC1200_VIDEO_CONFIG, vcfg);
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_video_palette
- * 
- * This routine loads the video hardware palette.  If a NULL pointer is 
- * specified, the palette is bypassed (for SC1200, this means loading the 
- * palette with identity values). 
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int sc1200_set_video_palette(unsigned long *palette)
-#else
-int gfx_set_video_palette(unsigned long *palette)
-#endif
-{
-	unsigned long i, entry;
-
-	/* WAIT FOR VERTICAL BLANK TO END */
-	/* Otherwise palette will not be written properly. */
-
-	if (gfx_test_timing_active())
-	{
-		if (gfx_test_vertical_active())
-		{
-			while(gfx_test_vertical_active());
-		}
-		while(!gfx_test_vertical_active());
-	}
-
-	/* LOAD SC1200 VIDEO PALETTE */
-
-	WRITE_VID32(SC1200_PALETTE_ADDRESS, 0);
-	for (i = 0; i < 256; i++)
-	{
-		if (palette) entry = palette[i];
-		else entry = (i << 8) | (i << 16) | (i << 24);
-		WRITE_VID32(SC1200_PALETTE_DATA, entry);
-	}
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_video_palette_entry
- * 
- * This routine loads a single entry of the video hardware palette.  
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int sc1200_set_video_palette_entry(unsigned long index, unsigned long palette)
-#else
-int gfx_set_video_palette_entry(unsigned long index, unsigned long palette)
-#endif
-{
-	if (index > 0xFF)
-		return GFX_STATUS_BAD_PARAMETER;
-
-	/* WAIT FOR VERTICAL BLANK TO END */
-	/* Otherwise palette will not be written properly. */
-
-	if (gfx_test_timing_active())
-	{
-		if (gfx_test_vertical_active())
-		{
-			while(gfx_test_vertical_active());
-		}
-		while(!gfx_test_vertical_active());
-	}
-
-	/* SET A SINGLE ENTRY */
-
-	WRITE_VID32(SC1200_PALETTE_ADDRESS, index);
-	WRITE_VID32(SC1200_PALETTE_DATA, palette);
-	
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_video_request()
- * 
- * This routine sets the horizontal (pixel) and vertical (line) video request
- * values.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int sc1200_set_video_request(short x, short y)
-#else
-int gfx_set_video_request(short x, short y)
-#endif
-{
-	/* SET SC1200 VIDEO REQUEST */
-	
-	x += gfx_get_htotal() - gfx_get_hsync_end() - 2;
-	y += gfx_get_vtotal() - gfx_get_vsync_end() + 1;
-	
-	if ((x < 0) || (x > SC1200_VIDEO_REQUEST_MASK) ||
-		(y < 0) || (y > SC1200_VIDEO_REQUEST_MASK))
-		return GFX_STATUS_BAD_PARAMETER;
-	
-	WRITE_VID32(SC1200_VIDEO_REQUEST, ((unsigned long)x << SC1200_VIDEO_X_REQUEST_POS) |
-									  ((unsigned long)y << SC1200_VIDEO_Y_REQUEST_POS));
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_video_source()
- * 
- * This routine sets the video source to either memory or Direct VIP.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int sc1200_set_video_source(VideoSourceType source)
-#else
-int gfx_set_video_source(VideoSourceType source)
-#endif
-{
-	unsigned long display_mode;	
-	display_mode = READ_VID32(SC1200_VIDEO_DISPLAY_MODE);
-	
-	/* SET SC1200 VIDEO SOURCE */
-	switch (source)
-	{
-	case VIDEO_SOURCE_MEMORY:
-		WRITE_VID32(SC1200_VIDEO_DISPLAY_MODE, (display_mode & ~SC1200_VIDEO_SOURCE_MASK) | SC1200_VIDEO_SOURCE_GX1);
-		break;
-	case VIDEO_SOURCE_DVIP:
-		WRITE_VID32(SC1200_VIDEO_DISPLAY_MODE, (display_mode & ~SC1200_VIDEO_SOURCE_MASK) | SC1200_VIDEO_SOURCE_DVIP);
-		break;
-	default:
-		return GFX_STATUS_BAD_PARAMETER;
-	}
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_vbi_source()
- * 
- * This routine sets the vbi source to either memory or Direct VIP.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int sc1200_set_vbi_source(VbiSourceType source)
-#else
-int gfx_set_vbi_source(VbiSourceType source)
-#endif
-{
-	unsigned long display_mode;	
-	display_mode = READ_VID32(SC1200_VIDEO_DISPLAY_MODE);
-
-	/* SET SC1200 VBI SOURCE */
-	switch (source)
-	{
-	case VBI_SOURCE_MEMORY:
-		WRITE_VID32(SC1200_VIDEO_DISPLAY_MODE, (display_mode & ~SC1200_VBI_SOURCE_MASK) | SC1200_VBI_SOURCE_GX1);
-		break;
-	case VBI_SOURCE_DVIP:
-		WRITE_VID32(SC1200_VIDEO_DISPLAY_MODE, (display_mode & ~SC1200_VBI_SOURCE_MASK) | SC1200_VBI_SOURCE_DVIP);
-		break;
-	default:
-		return GFX_STATUS_BAD_PARAMETER;
-	}
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_vbi_lines()
- * 
- * This routine sets the VBI lines to pass to the TV encoder.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int sc1200_set_vbi_lines(unsigned long even, unsigned long odd)
-#else
-int gfx_set_vbi_lines(unsigned long even, unsigned long odd)
-#endif
-{
-	/* SET SC1200 VBI LINES */
-	WRITE_VID32(SC1200_VIDEO_EVEN_VBI_LINE_ENABLE, even & SC1200_VIDEO_VBI_LINE_ENABLE_MASK);
-	WRITE_VID32(SC1200_VIDEO_ODD_VBI_LINE_ENABLE, odd & SC1200_VIDEO_VBI_LINE_ENABLE_MASK);
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_vbi_total()
- * 
- * This routine sets the total number of VBI bytes for each field.
- * The total is needed when both VBI and active video are received from memory.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int sc1200_set_vbi_total(unsigned long even, unsigned long odd)
-#else
-int gfx_set_vbi_total(unsigned long even, unsigned long odd)
-#endif
-{
-	/* SET SC1200 VBI TOTAL */
-	WRITE_VID32(SC1200_VIDEO_EVEN_VBI_TOTAL_COUNT, even & SC1200_VIDEO_VBI_TOTAL_COUNT_MASK);
-	WRITE_VID32(SC1200_VIDEO_ODD_VBI_TOTAL_COUNT, odd & SC1200_VIDEO_VBI_TOTAL_COUNT_MASK);
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_video_interlaced()
- * 
- * This routine configures the video processor video overlay mode to be
- * interlaced YUV.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int sc1200_set_video_interlaced(int enable)
-#else
-int gfx_set_video_interlaced(int enable)
-#endif
-{
-	unsigned long control;
-	control = READ_VID32(SC1200_VID_ALPHA_CONTROL);
-	/* SET INTERLACED VIDEO */
-	if (enable)
-		WRITE_VID32(SC1200_VID_ALPHA_CONTROL, control | SC1200_VIDEO_IS_INTERLACED);
-	else
-		WRITE_VID32(SC1200_VID_ALPHA_CONTROL, control & ~SC1200_VIDEO_IS_INTERLACED);
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_color_space_YUV()
- * 
- * This routine configures the video processor to process graphics and video
- * in either YUV or RGB color space. The mode should be set to tune image
- * quality.
- * Setting "enable" to TRUE improves image quality on TV,
- * but in this mode colors on CRT will not be correct.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int sc1200_set_color_space_YUV(int enable)
-#else
-int gfx_set_color_space_YUV(int enable)
-#endif
-{
-	unsigned long control;
-	control = READ_VID32(SC1200_VID_ALPHA_CONTROL);
-
-	/* SET SC1200 VIDEO COLOR SPACE TO YUV OR RGB */
-	
-	if (enable) 
-	{
-		/* ENABLE YUV BLENDING */
-		/* YUV blending cannot be enabled in RGB video formats */
-
-		control |=  SC1200_CSC_GFX_RGB_TO_YUV;       /* Convert graphics to YUV */
-		control &= ~SC1200_CSC_VIDEO_YUV_TO_RGB;     /* Leave video in YUV      */
-
-		if (control & SC1200_VIDEO_INPUT_IS_RGB)
-			return(GFX_STATUS_UNSUPPORTED);          /* Can't convert video from RGB to YUV */		
-	} 
-	else 
-	{
-		/* RGB BLENDING */
-
-		control &= ~SC1200_CSC_GFX_RGB_TO_YUV;       /* Leave graphics in RGB */
-		if (control & SC1200_VIDEO_INPUT_IS_RGB)
-			control &= ~SC1200_CSC_VIDEO_YUV_TO_RGB; /* Leave video in RGB */
-		else
-			control |= SC1200_CSC_VIDEO_YUV_TO_RGB;  /* Convert video to RGB */
-	}		
-	WRITE_VID32(SC1200_VID_ALPHA_CONTROL, control);
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_vertical_scaler_offset()
- * 
- * This routine sets the value by which the odd frame is shifted with respect
- * to the even frame. This is useful for de-interlacing in Bob method, by
- * setting the shift value to be one line.
- * If offset is 0, no shifting occurs.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int sc1200_set_vertical_scaler_offset(char offset)
-#else
-int gfx_set_vertical_scaler_offset(char offset)
-#endif
-{
-	unsigned long control;
-	control = READ_VID32(SC1200_VID_ALPHA_CONTROL);
-	if (offset == 1) {
-		control &= ~SC1200_VERTICAL_SCALER_SHIFT_MASK;  /* Clear shifting value */
-		control |= SC1200_VERTICAL_SCALER_SHIFT_INIT;   /* Set shifting value */
-		control |= SC1200_VERTICAL_SCALER_SHIFT_EN;     /* Enable odd frame shifting */
-	} else if (offset == 0) {
-		control &= ~SC1200_VERTICAL_SCALER_SHIFT_EN;    /* No shifting occurs */
-		control &= ~SC1200_VERTICAL_SCALER_SHIFT_MASK;  /* Clear shifting value */
-	}
-	else
-		return(GFX_STATUS_BAD_PARAMETER); /* TODO: how to program other values ? */
-	WRITE_VID32(SC1200_VID_ALPHA_CONTROL, control);
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_top_line_in_odd()
- * 
- * This routine sets the field in which the top line of input video resides.
- * If enable is "0", this is the even field (default). [not to be confused
- * with the odd field being the top field on TV].
- * If enable is "1", this is the odd field.
- * Use enable "1" for input devices whose field indication is reversed from
- * normal, i.e. an indication of "odd" field is given for even field data,
- * and vice versa.
- * This setting affects the video processor only when it is in either interlaced
- * or Bob (scaler offset active) modes.
-  *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int sc1200_set_top_line_in_odd(int enable)
-#else
-int gfx_set_top_line_in_odd(int enable)
-#endif
-{
-	unsigned long control;
-	control = READ_VID32(SC1200_VID_ALPHA_CONTROL);
-	if (enable) 
-		control |= SC1200_TOP_LINE_IN_ODD;   /* Set shifting value */
-	else
-		control &= ~SC1200_TOP_LINE_IN_ODD;    /* No shifting occurs */
-	WRITE_VID32(SC1200_VID_ALPHA_CONTROL, control);
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_genlock_delay()
- * 
- * This routine sets the delay between VIP VSYNC and display controller VSYNC.
- * The delay is in 27 MHz clocks.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int sc1200_set_genlock_delay(unsigned long delay)
-#else
-int gfx_set_genlock_delay(unsigned long delay)
-#endif
-{
-	/* SET SC1200 GENLOCK DELAY */
-	WRITE_VID32(SC1200_GENLOCK_DELAY, delay & SC1200_GENLOCK_DELAY_MASK);
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_genlock_enable()
- * 
- * This routine sets and configures the genlock according to the flags parameter.
- * Flags value of 0 disables genlock and resets its configuration.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int sc1200_set_genlock_enable(int flags)
-#else
-int gfx_set_genlock_enable(int flags)
-#endif
-{
-   unsigned long genlock = 0;
-   
-	if (flags)
-	{
-		/* SET SC1200 GENLOCK CONFIGURATION */
-		if (flags & GENLOCK_SINGLE)                   genlock |= SC1200_GENLOCK_SINGLE_ENABLE;
-		if (flags & GENLOCK_FIELD_SYNC)               genlock |= SC1200_GENLOCK_FIELD_SYNC_ENABLE;
-		if (flags & GENLOCK_CONTINUOUS)               genlock |= SC1200_GENLOCK_CONTINUOUS_ENABLE;
-		if (flags & GENLOCK_SYNCED_EDGE_FALLING)      genlock |= SC1200_GENLOCK_GX_VSYNC_FALLING_EDGE;
-		if (flags & GENLOCK_SYNCING_EDGE_FALLING)     genlock |= SC1200_GENLOCK_VIP_VSYNC_FALLING_EDGE;
-		if (flags & GENLOCK_TIMEOUT)                  genlock |= SC1200_GENLOCK_TIMEOUT_ENABLE;
-		if (flags & GENLOCK_TVENC_RESET_EVEN_FIELD)   genlock |= SC1200_GENLOCK_TVENC_RESET_EVEN_FIELD;
-		if (flags & GENLOCK_TVENC_RESET_BEFORE_DELAY) genlock |= SC1200_GENLOCK_TVENC_RESET_BEFORE_DELAY;
-		if (flags & GENLOCK_TVENC_RESET)              genlock |= SC1200_GENLOCK_TVENC_RESET_ENABLE;
-		if (flags & GENLOCK_SYNC_TO_TVENC)            genlock |= SC1200_GENLOCK_SYNC_TO_TVENC;
-	}
-	WRITE_VID32(SC1200_GENLOCK, genlock);
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_video_cursor()
- * 
- * This routine configures the video hardware cursor.
- * If the "mask"ed bits in the graphics pixel match "key", then either "color1"
- * or "color2" will be used for this pixel, according to the value of bit
- * number "select_color2" of the graphics pixel.
- *
- * key - 24 bit RGB value
- * mask - 24 bit mask
- * color1, color2 - RGB or YUV, depending on the current color space conversion
- * select_color2 - value between 0 to 23
- *
- * To disable match, a "mask" and "key" value of 0xffffff should be set,
- * because the graphics pixels incoming to the video processor have maximum 16
- * bits set (0xF8FCF8).
- *
- * This feature is useful for disabling alpha blending of the cursor.
- * Otherwise cursor image would be blurred (or completely invisible if video
- * alpha is maximum value).
- * Note: the cursor pixel replacements take place both inside and outside the
- * video overlay window.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int sc1200_set_video_cursor(unsigned long key, unsigned long mask, unsigned short select_color2,
-							unsigned long color1, unsigned long color2)
-#else
-int gfx_set_video_cursor(unsigned long key, unsigned long mask, unsigned short select_color2,
-						 unsigned long color1, unsigned long color2)
-#endif
-{
-	if (select_color2 > SC1200_CURSOR_COLOR_BITS) return GFX_STATUS_BAD_PARAMETER;
-	key = (key & SC1200_COLOR_MASK) | ((unsigned long)select_color2 << SC1200_CURSOR_COLOR_KEY_OFFSET_POS);
-	WRITE_VID32(SC1200_CURSOR_COLOR_KEY, key);
-	WRITE_VID32(SC1200_CURSOR_COLOR_MASK, mask);
-	WRITE_VID32(SC1200_CURSOR_COLOR_1, color1);
-	WRITE_VID32(SC1200_CURSOR_COLOR_2, color2);
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_alpha_enable
- * 
- * This routine enables or disables the currently selected alpha region.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int sc1200_set_alpha_enable(int enable)
-#else
-int gfx_set_alpha_enable(int enable)
-#endif
-{
-	unsigned long address = 0, value = 0;
-	if (gfx_alpha_select > 2) return(GFX_STATUS_UNSUPPORTED);
-	address = SC1200_ALPHA_CONTROL_1 + ((unsigned long)gfx_alpha_select << 4);
-	value = READ_VID32(address);
-	if (enable) value |= (SC1200_ACTRL_WIN_ENABLE | SC1200_ACTRL_LOAD_ALPHA);
-	else value &= ~(SC1200_ACTRL_WIN_ENABLE);
-	WRITE_VID32(address, value);
-	return(GFX_STATUS_OK);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_alpha_window
- * 
- * This routine sets the size of the currently selected alpha region.
- * Note: "x" and "y" are signed to enable using negative values needed for
- * implementing workarounds of hardware issues.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int sc1200_set_alpha_window(short x, short y, 
-	unsigned short width, unsigned short height)
-#else
-int gfx_set_alpha_window(short x, short y, 
-	unsigned short width, unsigned short height)
-#endif
-{
-	unsigned long address = 0;
-
-	/* CHECK FOR CLIPPING */
-	
-	if ((x + width) > gfx_get_hactive()) width = gfx_get_hactive() - x;
-	if ((y + height) > gfx_get_vactive()) height = gfx_get_vactive() - y;
-	
-	/* ADJUST POSITIONS */
-
-	x += gfx_get_htotal() - gfx_get_hsync_end() - 2;
-	y += gfx_get_vtotal() - gfx_get_vsync_end() + 1;
-	
-	if (gfx_alpha_select > 2) return(GFX_STATUS_UNSUPPORTED);
-	address = SC1200_ALPHA_XPOS_1 + ((unsigned long)gfx_alpha_select << 4);
-	
-	/* End positions in register are non-inclusive (one more than the actual end) */
-
-	WRITE_VID32(address, (unsigned long) x | 
-		((unsigned long) (x + width) << 16));
-	WRITE_VID32(address + 4l, (unsigned long) y | 
-		((unsigned long) (y + height) << 16));
-	return(GFX_STATUS_OK);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_alpha_value
- * 
- * This routine sets the alpha value for the currently selected alpha
- * region.  It also specifies an increment/decrement value for fading.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int sc1200_set_alpha_value(unsigned char alpha, char delta)
-#else
-int gfx_set_alpha_value(unsigned char alpha, char delta)
-#endif
-{
-	unsigned long address = 0, value = 0;
-	unsigned char new_value = 0;
-	int loop = 1;
-
-	if (gfx_alpha_select > 2) return(GFX_STATUS_UNSUPPORTED);
-	address = SC1200_ALPHA_CONTROL_1 + ((unsigned long)gfx_alpha_select << 4);
-	value = READ_VID32(address);
-	value &= SC1200_ACTRL_WIN_ENABLE; /* keep only enable bit */
-	value |= (unsigned long) alpha;
-	value |= (((unsigned long) delta) & 0xff) << 8;
-	value |= SC1200_ACTRL_LOAD_ALPHA;
-	WRITE_VID32(address, value);
-
-	/* WORKAROUND FOR ISSUE #1187 */
-	/* Need to verify that the alpha operation succeeded */
-
-	while (1) 
-	{
-		/* WAIT FOR VERTICAL BLANK TO END */
-		if (gfx_test_timing_active())
-		{
-			if (gfx_test_vertical_active())
-				while(gfx_test_vertical_active());
-			while(!gfx_test_vertical_active());
-		}
-		new_value = (unsigned char)((READ_VID32(SC1200_ALPHA_WATCH) >> (gfx_alpha_select << 3)) & 0xff);
-		if (new_value == alpha)
-			return GFX_STATUS_OK;
-		if (++loop > 10)
-			return GFX_STATUS_ERROR;
-		WRITE_VID32(address, value);
-	}
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_alpha_priority
- * 
- * This routine sets the priority of the currently selected alpha region.
- * A higher value indicates a higher priority.
- * Note: Priority of enabled alpha windows must be different.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int sc1200_set_alpha_priority(int priority)
-#else
-int gfx_set_alpha_priority(int priority)
-#endif
-{
-	unsigned long pos = 0, value = 0;
-	if (priority > 3) return(GFX_STATUS_BAD_PARAMETER);
-	if (gfx_alpha_select > 2) return(GFX_STATUS_UNSUPPORTED);
-	value = READ_VID32(SC1200_VID_ALPHA_CONTROL);
-	pos = 16 + (gfx_alpha_select << 1);
-	value &= ~(0x03l << pos);
-	value |= (unsigned long)priority << pos;
-	WRITE_VID32(SC1200_VID_ALPHA_CONTROL, value);
-	return(GFX_STATUS_OK);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_alpha_color
- * 
- * This routine sets the color to be displayed inside the currently selected
- * alpha window when there is a color key match (when the alpha color
- * mechanism is enabled).
- * "color" is a 24 bit RGB value (for RGB blending) or YUV value (for YUV blending).
- * In Interlaced YUV blending mode, Y/2 value should be used.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int sc1200_set_alpha_color(unsigned long color)
-#else
-int gfx_set_alpha_color(unsigned long color)
-#endif
-{
-	unsigned long address = 0;
-	if (gfx_alpha_select > 2) return(GFX_STATUS_UNSUPPORTED);
-	address = SC1200_ALPHA_COLOR_1 + ((unsigned long)gfx_alpha_select << 4);
-	
-	/* ONLY 24 VALID BITS */
-	color &= 0xffffffl;
-	
-	/* KEEP UPPER BYTE UNCHANGED */
-	WRITE_VID32(address, (color | (READ_VID32(address) & ~0xffffffl)));
-	return(GFX_STATUS_OK);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_alpha_color_enable
- * 
- * Enable or disable the color mechanism in the alpha window.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int sc1200_set_alpha_color_enable(int enable)
-#else
-int gfx_set_alpha_color_enable(int enable)
-#endif
-{
-	unsigned long color;
-	unsigned long address = 0;
-	
-	if (gfx_alpha_select > 2) return(GFX_STATUS_UNSUPPORTED);
-	address = SC1200_ALPHA_COLOR_1 + ((unsigned long)gfx_alpha_select << 4);
-	color = READ_VID32(address);
-	if (enable)
-		color |= SC1200_ALPHA_COLOR_ENABLE;
-	else
-		color &= ~SC1200_ALPHA_COLOR_ENABLE;
-	WRITE_VID32(address, color);
-	return(GFX_STATUS_OK);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_no_ck_outside_alpha
- * 
- * This function affects where inside the video window color key or chroma
- * key comparison is done:
- * If enable is TRUE, color/chroma key comparison is performed only inside
- * the enabled alpha windows. Outside the (enabled) alpha windows, only video
- * is displayed if color key is used, and only graphics is displayed if chroma
- * key is used.
- * If enable is FALSE, color/chroma key comparison is performed in all the
- * video window area.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int sc1200_set_no_ck_outside_alpha(int enable)
-#else
-int gfx_set_no_ck_outside_alpha(int enable)
-#endif
-{
-	unsigned long value;
-	value = READ_VID32(SC1200_VID_ALPHA_CONTROL);
-	if (enable)
-		WRITE_VID32(SC1200_VID_ALPHA_CONTROL, value | SC1200_NO_CK_OUTSIDE_ALPHA);
-	else		
-		WRITE_VID32(SC1200_VID_ALPHA_CONTROL, value & ~SC1200_NO_CK_OUTSIDE_ALPHA);
-	return(0);		
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_macrovision_enable
- * 
- * This routine enables or disables macrovision on the tv encoder output.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int sc1200_set_macrovision_enable(int enable)
-#else
-int gfx_set_macrovision_enable(int enable)
-#endif
-{
-	if (enable)
-		WRITE_VID32(SC1200_TVENC_MV_CONTROL, SC1200_TVENC_MV_ENABLE);
-	else
-		WRITE_VID32(SC1200_TVENC_MV_CONTROL, 0);
-	return(GFX_STATUS_OK);
-}
-
-#define SC1200_VIDEO_PCI_44 0x80009444
-
-/*---------------------------------------------------------------------------
- * gfx_disable_softvga
- *
- * Disables SoftVga. This function is only valid with VSA2, Returns 1 if
- * SoftVga can be disabled; 0 if not.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int sc1200_disable_softvga(void)
-#else
-int gfx_disable_softvga(void)
-#endif
-{
-	unsigned long reg_val;
-
-	/* get the current value */
-	reg_val = gfx_pci_config_read(SC1200_VIDEO_PCI_44);
-	/* setting video PCI register 44 bit 0 to 1 disables SoftVga */
-	reg_val |= 0x1;
-	gfx_pci_config_write(SC1200_VIDEO_PCI_44, reg_val);
-
-	/* see if we set the bit and return the appropriate value */
-	reg_val = gfx_pci_config_read(SC1200_VIDEO_PCI_44);
-	if((reg_val & 0x1) == 0x1)
-		return(1);
-	else
-		return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_enable_softvga
- *
- * Enables SoftVga. This function is only valid with VSA2, Returns 1 if
- * SoftVga can be enbled; 0 if not.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int sc1200_enable_softvga(void)
-#else
-int gfx_enable_softvga(void)
-#endif
-{
-	unsigned long reg_val;
-
-	/* get the current value */
-	reg_val = gfx_pci_config_read(SC1200_VIDEO_PCI_44);
-	/* clearing video PCI register 44 bit 0 enables SoftVga */
-	gfx_pci_config_write(SC1200_VIDEO_PCI_44, reg_val & 0xfffffffel);
-
-	/* see if we cleared the bit and return the appropriate value */
-	reg_val = gfx_pci_config_read(SC1200_VIDEO_PCI_44);
-	if((reg_val & 0x1) == 0)
-		return(1);
-	else
-		return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_clock_frequency
- *
- * This routine returns the current clock frequency in 16.16 format.
- * It reads the current register value and finds the match in the table.
- * If no match is found, this routine returns 0.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-unsigned long sc1200_get_clock_frequency(void)
-#else
-unsigned long gfx_get_clock_frequency(void)
-#endif
-{
-	int index;
-	unsigned long value, mask;
-	mask = 0x007FFF0F;
-	value = READ_VID32(SC1200_VID_CLOCK_SELECT) & mask;
-	for (index = 0; index < NUM_SC1200_FREQUENCIES; index++)
-	{
-		if ((gfx_sc1200_clock_table[index].clock_select & mask) == value)
-			return(gfx_sc1200_clock_table[index].frequency);
-	}
-	return(0);
-}
-
-/*************************************************************/
-/*  READ ROUTINES  |  INCLUDED FOR DIAGNOSTIC PURPOSES ONLY  */
-/*************************************************************/
-
-#if GFX_READ_ROUTINES
-
-/*---------------------------------------------------------------------------
- * gfx_get_vsa2_softvga_enable
- * 
- * This function returns the enable status of SoftVGA.  It is valid
- * only if VSAII is present.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int sc1200_get_vsa2_softvga_enable(void)
-#else
-int gfx_get_vsa2_softvga_enable(void)
-#endif
-{
-	unsigned long reg_val;
-
-	reg_val = gfx_pci_config_read(SC1200_VIDEO_PCI_44);
-	if((reg_val & 0x1) == 0)
-		return(1);
-	else 
-		return(0);
-		 
-} 
-
-/*---------------------------------------------------------------------------
- * gfx_get_sync_polarities
- *
- * This routine returns the polarities of the sync pulses:
- *     Bit 0: Set if negative horizontal polarity.
- *     Bit 1: Set if negative vertical polarity.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int sc1200_get_sync_polarities(void)
-#else
-int gfx_get_sync_polarities(void)
-#endif
-{
-	int polarities = 0;
-	if (READ_VID32(SC1200_DISPLAY_CONFIG) & SC1200_DCFG_CRT_HSYNC_POL) polarities |= 1;
-	if (READ_VID32(SC1200_DISPLAY_CONFIG) & SC1200_DCFG_CRT_VSYNC_POL) polarities |= 2;
-	return(polarities);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_video_palette_entry
- *
- * This routine returns a single palette entry.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int sc1200_get_video_palette_entry(unsigned long index, unsigned long *palette)
-#else
-int gfx_get_video_palette_entry(unsigned long index, unsigned long *palette)
-#endif
-{
-	if (index > 0xFF)
-		return GFX_STATUS_BAD_PARAMETER;
-
-	/* READ A SINGLE ENTRY */
-
-	WRITE_VID32 (SC1200_PALETTE_ADDRESS, index);
-	*palette = READ_VID32 (SC1200_PALETTE_DATA);
-
-	return (GFX_STATUS_OK);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_get_video_enable
- *
- * This routine returns the value "one" if video overlay is currently enabled,
- * otherwise it returns the value "zero".
- *-----------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int sc1200_get_video_enable(void)
-#else
-int gfx_get_video_enable(void)
-#endif
-{
-	if (READ_VID32(SC1200_VIDEO_CONFIG) & SC1200_VCFG_VID_EN) return(1);
-	return(0);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_get_video_format
- *
- * This routine returns the current video overlay format.
- *-----------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int sc1200_get_video_format(void)
-#else
-int gfx_get_video_format(void)
-#endif
-{
-	unsigned long ctrl, vcfg;
-
-	ctrl = READ_VID32(SC1200_VID_ALPHA_CONTROL);
-	vcfg = READ_VID32(SC1200_VIDEO_CONFIG);
-
-	if (ctrl & SC1200_VIDEO_INPUT_IS_RGB)
-	{
-		switch (vcfg & SC1200_VCFG_VID_INP_FORMAT)
-		{
-			case SC1200_VCFG_UYVY_FORMAT: return VIDEO_FORMAT_RGB;
-			case SC1200_VCFG_Y2YU_FORMAT: return VIDEO_FORMAT_P2M_P2L_P1M_P1L;
-			case SC1200_VCFG_YUYV_FORMAT: return VIDEO_FORMAT_P1M_P1L_P2M_P2L;
-			case SC1200_VCFG_YVYU_FORMAT: return VIDEO_FORMAT_P1M_P2L_P2M_P1L;
-		}
-	}
-
-	if (vcfg & SC1200_VCFG_4_2_0_MODE)
-	{
-		switch (vcfg & SC1200_VCFG_VID_INP_FORMAT)
-		{
-			case SC1200_VCFG_UYVY_FORMAT: return VIDEO_FORMAT_Y0Y1Y2Y3;
-			case SC1200_VCFG_Y2YU_FORMAT: return VIDEO_FORMAT_Y3Y2Y1Y0;
-			case SC1200_VCFG_YUYV_FORMAT: return VIDEO_FORMAT_Y1Y0Y3Y2;
-			case SC1200_VCFG_YVYU_FORMAT: return VIDEO_FORMAT_Y1Y2Y3Y0;
-		}
-	}
-	else
-	{
-		switch (vcfg & SC1200_VCFG_VID_INP_FORMAT)
-		{
-			case SC1200_VCFG_UYVY_FORMAT: return VIDEO_FORMAT_UYVY;
-			case SC1200_VCFG_Y2YU_FORMAT: return VIDEO_FORMAT_Y2YU;
-			case SC1200_VCFG_YUYV_FORMAT: return VIDEO_FORMAT_YUYV;
-			case SC1200_VCFG_YVYU_FORMAT: return VIDEO_FORMAT_YVYU;
-		}
-	}
-	return (GFX_STATUS_ERROR);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_get_video_src_size
- *
- * This routine returns the size of the source video overlay buffer.  The 
- * return value is (height << 16) | width.
- *-----------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-unsigned long sc1200_get_video_src_size(void)
-#else
-unsigned long gfx_get_video_src_size(void)
-#endif
-{
-	unsigned long width = 0, height = 0;
-
-	/* DETERMINE SOURCE WIDTH FROM THE SC1200 VIDEO LINE SIZE */
-
-	width = (READ_VID32(SC1200_VIDEO_CONFIG) >> 7) & 0x000001FE;
-	if (READ_VID32(SC1200_VIDEO_CONFIG) & SC1200_VCFG_LINE_SIZE_UPPER)
-		width += 512l;
-
-	if (width)
-	{
-		/* DETERMINE HEIGHT BY DIVIDING TOTAL SIZE BY WIDTH */
-		/* Get total size from display controller - abtracted. */
-
-		height = gfx_get_display_video_size() / (width << 1);
-	}
-	return((height << 16) | width);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_get_video_line_size
- *
- * This routine returns the line size of the source video overlay buffer, in
- * pixels.
- *-----------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-unsigned long sc1200_get_video_line_size(void)
-#else
-unsigned long gfx_get_video_line_size(void)
-#endif
-{
-	unsigned long width = 0;
-
-	/* DETERMINE SOURCE WIDTH FROM THE SC1200 VIDEO LINE SIZE */
-
-	width = (READ_VID32(SC1200_VIDEO_CONFIG) >> 7) & 0x000001FE;
-	if (READ_VID32(SC1200_VIDEO_CONFIG) & SC1200_VCFG_LINE_SIZE_UPPER)
-		width += 512l;
-	return(width);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_get_video_xclip
- *
- * This routine returns the number of bytes clipped on the left side of a
- * video overlay line (skipped at beginning).
- *-----------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-unsigned long sc1200_get_video_xclip(void)
-#else
-unsigned long gfx_get_video_xclip(void)
-#endif
-{
-	unsigned long clip = 0;
-
-	/* DETERMINE SOURCE WIDTH FROM THE SC1200 VIDEO LINE SIZE */
-
-	clip = (READ_VID32(SC1200_VIDEO_CONFIG) >> 14) & 0x000007FC;
-	return(clip);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_get_video_offset
- *
- * This routine returns the current offset for the video overlay buffer.
- *-----------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-unsigned long sc1200_get_video_offset(void)
-#else
-unsigned long gfx_get_video_offset(void)
-#endif
-{
-	return(gfx_get_display_video_offset());
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_video_upscale
- * 
- * This routine returns the scale factor for the video overlay window.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-unsigned long sc1200_get_video_upscale(void)
-#else
-unsigned long gfx_get_video_upscale(void)
-#endif
-{
-	return(READ_VID32(SC1200_VIDEO_UPSCALE));
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_video_scale
- * 
- * This routine returns the scale factor for the video overlay window.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-unsigned long sc1200_get_video_scale(void)
-#else
-unsigned long gfx_get_video_scale(void)
-#endif
-{
-	return gfx_get_video_upscale();
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_video_downscale_config
- * 
- * This routine returns the current type and value of video downscaling.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int sc1200_get_video_downscale_config(unsigned short *type, unsigned short *m)
-#else
-int gfx_get_video_downscale_config(unsigned short *type, unsigned short *m)
-#endif
-{
-	unsigned long downscale;
-	
-	downscale = READ_VID32(SC1200_VIDEO_DOWNSCALER_CONTROL);
-	*m = (unsigned short)((downscale & SC1200_VIDEO_DOWNSCALE_FACTOR_MASK) >> SC1200_VIDEO_DOWNSCALE_FACTOR_POS) + 1;
-
-	switch(downscale & SC1200_VIDEO_DOWNSCALE_TYPE_MASK)
-	{
-	case SC1200_VIDEO_DOWNSCALE_TYPE_A:
-		*type = VIDEO_DOWNSCALE_KEEP_1_OF;
-		break;
-	case SC1200_VIDEO_DOWNSCALE_TYPE_B:
-		*type = VIDEO_DOWNSCALE_DROP_1_OF;
-		break;
-	default:
-		return GFX_STATUS_ERROR;
-		break;		
-	}
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_video_downscale_coefficients
- * 
- * This routine returns the current video downscaling coefficients.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-void sc1200_get_video_downscale_coefficients(unsigned short *coef1, unsigned short *coef2,
-											 unsigned short *coef3, unsigned short *coef4)
-#else
-void gfx_get_video_downscale_coefficients(unsigned short *coef1, unsigned short *coef2,
-										  unsigned short *coef3, unsigned short *coef4)
-#endif
-{
-	unsigned long coef;
-	
-	coef = READ_VID32(SC1200_VIDEO_DOWNSCALER_COEFFICIENTS);
-	*coef1 = (unsigned short)((coef >> SC1200_VIDEO_DOWNSCALER_COEF1_POS) & SC1200_VIDEO_DOWNSCALER_COEF_MASK);
-	*coef2 = (unsigned short)((coef >> SC1200_VIDEO_DOWNSCALER_COEF2_POS) & SC1200_VIDEO_DOWNSCALER_COEF_MASK);
-	*coef3 = (unsigned short)((coef >> SC1200_VIDEO_DOWNSCALER_COEF3_POS) & SC1200_VIDEO_DOWNSCALER_COEF_MASK);
-	*coef4 = (unsigned short)((coef >> SC1200_VIDEO_DOWNSCALER_COEF4_POS) & SC1200_VIDEO_DOWNSCALER_COEF_MASK);
-	return;				
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_video_downscale_enable
- * 
- * This routine returns 1 if video downscaling is currently enabled,
- * or 0 if it is currently disabled.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-void sc1200_get_video_downscale_enable(int *enable)
-#else
-void gfx_get_video_downscale_enable(int *enable)
-#endif
-{
-	if (READ_VID32(SC1200_VIDEO_DOWNSCALER_CONTROL) & SC1200_VIDEO_DOWNSCALE_ENABLE)
-		*enable = 1;
-	else
-		*enable = 0;
-	return;				
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_video_dst_size
- * 
- * This routine returns the size of the displayed video overlay window.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-unsigned long sc1200_get_video_dst_size(void)
-#else
-unsigned long gfx_get_video_dst_size(void)
-#endif
-{
-	unsigned long xsize, ysize;
-
-	xsize = READ_VID32(SC1200_VIDEO_X_POS);
-	xsize = ((xsize >> 16) & 0x7FF) - (xsize & 0x7FF);
-	ysize = READ_VID32(SC1200_VIDEO_Y_POS);
-	ysize = ((ysize >> 16) & 0x7FF) - (ysize & 0x7FF);
-	return((ysize << 16) | xsize);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_video_position
- * 
- * This routine returns the position of the video overlay window.  The
- * return value is (ypos << 16) | xpos.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-unsigned long sc1200_get_video_position(void)
-#else
-unsigned long gfx_get_video_position(void)
-#endif
-{
-	unsigned long hadjust, vadjust;
-	unsigned long xpos, ypos;
-
-	/* READ HARDWARE POSITION */
-
-	xpos = READ_VID32(SC1200_VIDEO_X_POS) & 0x000007FF;
-	ypos = READ_VID32(SC1200_VIDEO_Y_POS) & 0x000007FF;
-	
-	/* GET ADJUSTMENT VALUES */
-	/* Use routines to abstract version of display controller. */
-
-	hadjust = (unsigned long)gfx_get_htotal() - (unsigned long)gfx_get_hsync_end() - 14l;
-	vadjust = (unsigned long)gfx_get_vtotal() - (unsigned long)gfx_get_vsync_end() + 1l;
-	xpos -= hadjust;
-	ypos -= vadjust;
-	return((ypos << 16) | (xpos & 0x0000FFFF));
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_video_color_key
- * 
- * This routine returns the current video color key value.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-unsigned long sc1200_get_video_color_key(void)
-#else
-unsigned long gfx_get_video_color_key(void)
-#endif
-{
-	return(READ_VID32(SC1200_VIDEO_COLOR_KEY));
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_video_color_key_mask
- * 
- * This routine returns the current video color mask value.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-unsigned long sc1200_get_video_color_key_mask(void)
-#else
-unsigned long gfx_get_video_color_key_mask(void)
-#endif
-{
-	return(READ_VID32(SC1200_VIDEO_COLOR_MASK));
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_video_color_key_src
- * 
- * This routine returns 0 for video data compare, 1 for graphics data.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int sc1200_get_video_color_key_src(void)
-#else
-int gfx_get_video_color_key_src(void)
-#endif
-{
-	if (READ_VID32(SC1200_DISPLAY_CONFIG) & SC1200_DCFG_VG_CK) return(0);
-	return(1);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_video_filter
- * 
- * This routine returns if the filters are currently enabled.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int sc1200_get_video_filter(void)
-#else
-int gfx_get_video_filter(void)
-#endif
-{
-	int retval = 0;
-	if (READ_VID32(SC1200_VIDEO_CONFIG) & SC1200_VCFG_X_FILTER_EN) 
-		retval |= 1;
-	if (READ_VID32(SC1200_VIDEO_CONFIG) & SC1200_VCFG_Y_FILTER_EN) 
-		retval |= 2;
-	return(retval);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_video_request
- * 
- * This routine returns the horizontal (pixel) and vertical (lines) video
- * request values.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int sc1200_get_video_request(short *x, short *y)
-#else
-int gfx_get_video_request(short *x, short *y)
-#endif
-{
-	int request = 0;
-	request = (int)(READ_VID32(SC1200_VIDEO_REQUEST));
-	*x = (request >> SC1200_VIDEO_X_REQUEST_POS) & SC1200_VIDEO_REQUEST_MASK;
-	*y = (request >> SC1200_VIDEO_Y_REQUEST_POS) & SC1200_VIDEO_REQUEST_MASK;
-	
-	*x -= gfx_get_htotal() - gfx_get_hsync_end() - 2;
-	*y -= gfx_get_vtotal() - gfx_get_vsync_end() + 1;
-
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_video_source
- * 
- * This routine returns the current video source.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int sc1200_get_video_source(VideoSourceType *source)
-#else
-int gfx_get_video_source(VideoSourceType *source)
-#endif
-{
-	switch(READ_VID32(SC1200_VIDEO_DISPLAY_MODE) & SC1200_VIDEO_SOURCE_MASK)
-	{
-	case SC1200_VIDEO_SOURCE_GX1:
-		*source = VIDEO_SOURCE_MEMORY;
-		break;
-	case SC1200_VIDEO_SOURCE_DVIP:
-		*source = VIDEO_SOURCE_DVIP;
-		break;
-	default:
-		return GFX_STATUS_ERROR;
-	}		
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_vbi_source
- * 
- * This routine returns the current vbi source.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int sc1200_get_vbi_source(VbiSourceType *source)
-#else
-int gfx_get_vbi_source(VbiSourceType *source)
-#endif
-{
-	switch(READ_VID32(SC1200_VIDEO_DISPLAY_MODE) & SC1200_VBI_SOURCE_MASK)
-	{
-	case SC1200_VBI_SOURCE_GX1:
-		*source = VBI_SOURCE_MEMORY;
-		break;
-	case SC1200_VBI_SOURCE_DVIP:
-		*source = VBI_SOURCE_DVIP;
-		break;
-	default:
-		return GFX_STATUS_ERROR;
-	}		
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_vbi_lines
- * 
- * This routine returns the VBI lines which are sent to the TV encoder.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-unsigned long sc1200_get_vbi_lines(int odd)
-#else
-unsigned long gfx_get_vbi_lines(int odd)
-#endif
-{
-	if (odd) return(READ_VID32(SC1200_VIDEO_ODD_VBI_LINE_ENABLE) & SC1200_VIDEO_VBI_LINE_ENABLE_MASK);
-	return(READ_VID32(SC1200_VIDEO_EVEN_VBI_LINE_ENABLE) & SC1200_VIDEO_VBI_LINE_ENABLE_MASK);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_vbi_total
- * 
- * This routine returns the total number of VBI bytes in the field.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-unsigned long sc1200_get_vbi_total(int odd)
-#else
-unsigned long gfx_get_vbi_total(int odd)
-#endif
-{
-	if (odd) return(READ_VID32(SC1200_VIDEO_ODD_VBI_TOTAL_COUNT) & SC1200_VIDEO_VBI_TOTAL_COUNT_MASK);
-	return(READ_VID32(SC1200_VIDEO_EVEN_VBI_TOTAL_COUNT) & SC1200_VIDEO_VBI_TOTAL_COUNT_MASK);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_video_interlaced()
- * 
- * This routine returns "1" if input video is currently in interlaced mode.
- * "0" otherwise.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int sc1200_get_video_interlaced(void)
-#else
-int gfx_get_video_interlaced(void)
-#endif
-{
-	if (READ_VID32(SC1200_VID_ALPHA_CONTROL) & SC1200_VIDEO_IS_INTERLACED)
-		return(1);
-	else
-		return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_color_space_YUV()
- * 
- * This routine returns "1" if video processor color space mode is currently
- * YUV. "0" otherwise.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int sc1200_get_color_space_YUV(void)
-#else
-int gfx_get_color_space_YUV(void)
-#endif
-{
-	unsigned long control;
-	control = READ_VID32(SC1200_VID_ALPHA_CONTROL);
-
-	/* IS SC1200 VIDEO COLOR SPACE RGB OR CONVERTED TO RGB */
-	if ((control & SC1200_VIDEO_INPUT_IS_RGB) || (control & SC1200_CSC_VIDEO_YUV_TO_RGB))
-		return(0);
-	else
-		return(1);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_vertical_scaler_offset()
- * 
- * This routine sets "offset" to the value by which odd frames are shifted,
- * if insert is enabled, and to 0 if no shifting occurs.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int sc1200_get_vertical_scaler_offset(char *offset)
-#else
-int gfx_get_vertical_scaler_offset(char *offset)
-#endif
-{
-	unsigned long control;
-	control = READ_VID32(SC1200_VID_ALPHA_CONTROL);
-	if (control & SC1200_VERTICAL_SCALER_SHIFT_EN) {
-		if ((control & SC1200_VERTICAL_SCALER_SHIFT_MASK) == SC1200_VERTICAL_SCALER_SHIFT_INIT)
-			*offset = 1;
-		else
-			return GFX_STATUS_ERROR; /* TODO: find the interpretation of other values */
-	} else
-		*offset = 0;			
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_genlock_delay
- * 
- * This routine returns the genlock delay in 27 MHz clocks.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-unsigned long sc1200_get_genlock_delay(void)
-#else
-unsigned long gfx_get_genlock_delay(void)
-#endif
-{
-	return(READ_VID32(SC1200_GENLOCK_DELAY) & SC1200_GENLOCK_DELAY_MASK);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_genlock_enable
- * 
- * This routine returns "1" if genlock is currently enabled, "0" otherwise.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int sc1200_get_genlock_enable(void)
-#else
-int gfx_get_genlock_enable(void)
-#endif
-{
-	if (READ_VID32(SC1200_GENLOCK) &
-				(SC1200_GENLOCK_SINGLE_ENABLE | SC1200_GENLOCK_CONTINUOUS_ENABLE))
-		return(1);
-	else
-		return(0);		
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_video_cursor()
- * 
- * This routine configures the video hardware cursor.
- * If the "mask"ed bits in the graphics pixel match "key", then either "color1"
- * or "color2" will be used for this pixel, according to the value of the bit
- * in offset "select_color2".
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int sc1200_get_video_cursor(unsigned long *key, unsigned long *mask, unsigned short *select_color2,
-							unsigned long *color1, unsigned short *color2)
-#else
-int gfx_get_video_cursor(unsigned long *key, unsigned long *mask, unsigned short *select_color2,
-							unsigned long *color1, unsigned short *color2)
-#endif
-{
-	*select_color2 = (unsigned short)(READ_VID32(SC1200_CURSOR_COLOR_KEY) >> SC1200_CURSOR_COLOR_KEY_OFFSET_POS);
-	*key = READ_VID32(SC1200_CURSOR_COLOR_KEY) & SC1200_COLOR_MASK;
-	*mask = READ_VID32(SC1200_CURSOR_COLOR_MASK) & SC1200_COLOR_MASK;
-	*color1 = READ_VID32(SC1200_CURSOR_COLOR_1) & SC1200_COLOR_MASK;
-	*color2 = (unsigned short)(READ_VID32(SC1200_CURSOR_COLOR_2) & SC1200_COLOR_MASK);
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_read_crc
- *
- * This routine returns the hardware CRC value, which is used for automated 
- * testing.  The value is like a checksum, but will change if pixels move
- * locations.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-unsigned long sc1200_read_crc(void)
-#else
-unsigned long gfx_read_crc(void)
-#endif
-{
-	unsigned long crc = 0xFFFFFFFF;
-	if (gfx_test_timing_active())
-	{
-		/* WAIT UNTIL ACTIVE DISPLAY */
-
-		while(!gfx_test_vertical_active());
-
-		/* RESET CRC DURING ACTIVE DISPLAY */
-
-		WRITE_VID32(SC1200_VID_CRC, 0);
-		WRITE_VID32(SC1200_VID_CRC, 1);
-
-		/* WAIT UNTIL NOT ACTIVE, THEN ACTIVE, NOT ACTIVE, THEN ACTIVE */
-		
-		while(gfx_test_vertical_active());
-		while(!gfx_test_vertical_active());
-		while(gfx_test_vertical_active());
-		while(!gfx_test_vertical_active());
-		crc = READ_VID32(SC1200_VID_CRC) >> 8;
-	}
-	return(crc);
-}	
-
-/*-----------------------------------------------------------------------------
- * gfx_get_macrovision_enable
- *
- * This routine returns the value "one" if macrovision currently enabled in the
- * TV encoder, otherwise it returns the value "zero".
- *-----------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int sc1200_get_macrovision_enable(void)
-#else
-int gfx_get_macrovision_enable(void)
-#endif
-{
-	if (READ_VID32(SC1200_TVENC_MV_CONTROL) == SC1200_TVENC_MV_ENABLE) return(1);
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_alpha_enable
- * 
- * This routine returns 1 if the selected alpha window is currently 
- * enabled, or 0 if it is currently disabled.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-void sc1200_get_alpha_enable(int *enable)
-#else
-void gfx_get_alpha_enable(int *enable)
-#endif
-{
-	unsigned long value = 0;
-	*enable = 0;
-	if (gfx_alpha_select <= 2)
-	{
-		value = READ_VID32(SC1200_ALPHA_CONTROL_1 + ((unsigned long)gfx_alpha_select << 4));
-		if (value & SC1200_ACTRL_WIN_ENABLE) *enable = 1;
-	}
-	return;
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_alpha_size
- * 
- * This routine returns the size of the currently selected alpha region.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-void sc1200_get_alpha_size(unsigned short *x, unsigned short *y, 
-	unsigned short *width, unsigned short *height)
-#else
-void gfx_get_alpha_size(unsigned short *x, unsigned short *y, 
-	unsigned short *width, unsigned short *height)
-#endif
-{
-	unsigned long value = 0;
-	*x = 0;
-	*y = 0;
-	*width = 0;
-	*height = 0;
-	if (gfx_alpha_select <= 2)
-	{
-		value = READ_VID32(SC1200_ALPHA_XPOS_1 + ((unsigned long)gfx_alpha_select << 4));
-		*x = (unsigned short) (value & 0x000007FF);
-		*width = (unsigned short) ((value >> 16) & 0x000007FF) - *x;
-		value = READ_VID32(SC1200_ALPHA_YPOS_1 + ((unsigned long)gfx_alpha_select << 4));
-		*y = (unsigned short) (value & 0x000007FF);
-		*height = (unsigned short) ((value >> 16) & 0x000007FF) - *y;
-	}
-	*x -= gfx_get_htotal() - gfx_get_hsync_end() - 2;
-	*y -= gfx_get_vtotal() - gfx_get_vsync_end() + 1;
-	return;
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_alpha_value
- * 
- * This routine returns the alpha value and increment/decrement value of 
- * the currently selected alpha region.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-void sc1200_get_alpha_value(unsigned char *alpha, char *delta)
-#else
-void gfx_get_alpha_value(unsigned char *alpha, char *delta)
-#endif
-{
-	unsigned long value = 0;
-	*alpha = 0;
-	*delta = 0;
-	if (gfx_alpha_select <= 2)
-	{
-		value = READ_VID32(SC1200_ALPHA_CONTROL_1 + ((unsigned long)gfx_alpha_select << 4));
-		*alpha = (unsigned char) (value & 0x00FF);
-		*delta = (char) ((value >> 8) & 0x00FF);
-	}
-	return;
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_alpha_priority
- * 
- * This routine returns the priority of the currently selected alpha region.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-void sc1200_get_alpha_priority(int *priority)
-#else
-void gfx_get_alpha_priority(int *priority)
-#endif
-{
-	unsigned long pos = 0, value = 0;
-	*priority = 0;
-	if (gfx_alpha_select <= 2)
-	{
-		value = READ_VID32(SC1200_VID_ALPHA_CONTROL);
-		pos = 16 + (gfx_alpha_select << 1);
-		*priority = (int) ((value >> pos) & 3);
-	}
-	return;
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_alpha_color
- * 
- * This routine returns the color register value for the currently selected 
- * alpha region.  Bit 24 is set if the color register is enabled.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-void sc1200_get_alpha_color(unsigned long *color)
-#else
-void gfx_get_alpha_color(unsigned long *color)
-#endif
-{
-	*color = 0;
-	if (gfx_alpha_select <= 2)
-	{
-		*color = READ_VID32(SC1200_ALPHA_COLOR_1 + ((unsigned long)gfx_alpha_select << 4));
-	}
-	return;
-}
-
-#endif /* GFX_READ_ROUTINES */
-
-/* END OF FILE */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/vid_5530.c b/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/vid_5530.c
deleted file mode 100644
index ddc559530..000000000
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/vid_5530.c
+++ /dev/null
@@ -1,1241 +0,0 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/vid_5530.c,v 1.1 2002/10/11 14:33:01 alanh Exp $ */
-/*
- * $Workfile: vid_5530.c $
- *
- * This file contains routines to control the CS5530 video overlay hardware.
- *
- * NSC_LIC_ALTERNATIVE_PREAMBLE
- *
- * Revision 1.0
- *
- * National Semiconductor Alternative GPL-BSD License
- *
- * National Semiconductor Corporation licenses this software 
- * ("Software"):
- *
- *      Durango
- *
- * under one of the two following licenses, depending on how the 
- * Software is received by the Licensee.
- * 
- * If this Software is received as part of the Linux Framebuffer or
- * other GPL licensed software, then the GPL license designated 
- * NSC_LIC_GPL applies to this Software; in all other circumstances 
- * then the BSD-style license designated NSC_LIC_BSD shall apply.
- *
- * END_NSC_LIC_ALTERNATIVE_PREAMBLE */
-
-/* NSC_LIC_BSD
- *
- * National Semiconductor Corporation Open Source License for Durango
- *
- * (BSD License with Export Notice)
- *
- * Copyright (c) 1999-2001
- * National Semiconductor Corporation.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without 
- * modification, are permitted provided that the following conditions 
- * are met: 
- *
- *   * Redistributions of source code must retain the above copyright 
- *     notice, this list of conditions and the following disclaimer. 
- *
- *   * Redistributions in binary form must reproduce the above 
- *     copyright notice, this list of conditions and the following 
- *     disclaimer in the documentation and/or other materials provided 
- *     with the distribution. 
- *
- *   * Neither the name of the National Semiconductor Corporation nor 
- *     the names of its contributors may be used to endorse or promote 
- *     products derived from this software without specific prior 
- *     written permission. 
- * 
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
- * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
- * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE,
- * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
- * OF SUCH DAMAGE.
- *
- * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
- * YOUR JURISDICTION. It is licensee's responsibility to comply with 
- * any export regulations applicable in licensee's jurisdiction. Under 
- * CURRENT (2001) U.S. export regulations this software 
- * is eligible for export from the U.S. and can be downloaded by or 
- * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
- * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
- * Syria, Sudan, Afghanistan and any other country to which the U.S. 
- * has embargoed goods and services. 
- *
- * END_NSC_LIC_BSD */
-
-/* NSC_LIC_GPL
- *
- * National Semiconductor Corporation Gnu General Public License for Durango
- *
- * (GPL License with Export Notice)
- *
- * Copyright (c) 1999-2001
- * National Semiconductor Corporation.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without 
- * modification, are permitted under the terms of the GNU General 
- * Public License as published by the Free Software Foundation; either 
- * version 2 of the License, or (at your option) any later version  
- *
- * In addition to the terms of the GNU General Public License, neither 
- * the name of the National Semiconductor Corporation nor the names of 
- * its contributors may be used to endorse or promote products derived 
- * from this software without specific prior written permission. 
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
- * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
- * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, 
- * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
- * OF SUCH DAMAGE. See the GNU General Public License for more details. 
- *
- * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
- * YOUR JURISDICTION. It is licensee's responsibility to comply with 
- * any export regulations applicable in licensee's jurisdiction. Under 
- * CURRENT (2001) U.S. export regulations this software 
- * is eligible for export from the U.S. and can be downloaded by or 
- * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
- * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
- * Syria, Sudan, Afghanistan and any other country to which the U.S. 
- * has embargoed goods and services. 
- *
- * You should have received a copy of the GNU General Public License 
- * along with this file; if not, write to the Free Software Foundation, 
- * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 
- *
- * END_NSC_LIC_GPL */
-
-
-/*----------------------------------------------------------------------------
- * CS5530 PLL TABLE
- *----------------------------------------------------------------------------
- */
-typedef struct tagCS5530PLLENTRY
-{
-	long frequency;					/* 16.16 fixed point frequency */
-	unsigned long pll_value;		/* associated register value */
-} CS5530PLLENTRY;
-
-CS5530PLLENTRY CS5530_PLLtable[] = {                                 
-	{ 0x00192CCC, 0x31C45801, }, /*  25.1750 */
-    { 0x001C526E, 0x20E36802, }, /*  28.3220 */
-    { 0x001F8000, 0x33915801, }, /*  31.5000 */
-    { 0x00240000, 0x31EC4801, }, /*  36.0000 */
-    { 0x00258000, 0x21E22801, }, /*  37.5000 */
-    { 0x00280000, 0x33088801, }, /*  40.0000 */
-    { 0x002CE666, 0x33E22801, }, /*  44.9000 */
-    { 0x00318000, 0x336C4801, }, /*  49.5000 */
-    { 0x00320000, 0x23088801, }, /*  50.0000 */
-    { 0x00325999, 0x23088801, }, /*  50.3500 */
-	{ 0x00360000, 0x3708A801, }, /*  54.0000 */
-	{ 0x00384000, 0x23E36802, }, /*  56.2500 */
-	{ 0x0038643F, 0x23E36802, }, /*  56.3916 */
-	{ 0x0038A4DD, 0x23E36802, }, /*  56.6444 */
-	{ 0x003B0000, 0x37C45801, }, /*  59.0000 */
-    { 0x003F0000, 0x23EC4801, }, /*  63.0000 */
-	{ 0x00410000, 0x37911801, }, /*  65.0000 */
-	{ 0x00438000, 0x37963803, }, /*  67.5000 */
-	{ 0x0046CCCC, 0x37058803, }, /*  70.8000 */
-	{ 0x00480000, 0x3710C805, }, /*  72.0000 */
-	{ 0x004B0000, 0x37E22801, }, /*  75.0000 */
-	{ 0x004EC000, 0x27915801, }, /*  78.7500 */
-	{ 0x00500000, 0x37D8D802, }, /*  80.0000 */
-	{ 0x0059CCCC, 0x27588802, }, /*  89.8000 */
-	{ 0x005E8000, 0x27EC4802, }, /*  94.5000 */
-	{ 0x00630000, 0x27AC6803, }, /*  99.0000 */
-	{ 0x00640000, 0x27088801, }, /* 100.0000 */
-	{ 0x006C0000, 0x2710C805, }, /* 108.0000 */
-	{ 0x00708000, 0x27E36802, }, /* 112.5000 */
-	{ 0x00820000, 0x27C58803, }, /* 130.0000 */
-	{ 0x00870000, 0x27316803, }, /* 135.0000 */
-    { 0x009D8000, 0x2F915801, }, /* 157.5000 */
-    { 0x00A20000, 0x2F08A801, }, /* 162.0000 */
-	{ 0x00AF0000, 0x2FB11802, }, /* 175.0000 */
-	{ 0x00BD0000, 0x2FEC4802, }, /* 189.0000 */
-	{ 0x00CA0000, 0x2F963803, }, /* 202.0000 */
-	{ 0x00E80000, 0x2FB1B802, }, /* 232.0000 */
-};
-
-#define NUM_CS5530_FREQUENCIES sizeof(CS5530_PLLtable)/sizeof(CS5530PLLENTRY)
-
-/*---------------------------------------------------------------------------
- * gfx_set_crt_enable
- * 
- * This routine enables or disables the CRT output from the video processor.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int cs5530_set_crt_enable(int enable)
-#else
-int gfx_set_crt_enable(int enable)
-#endif
-{
-	unsigned long config;
-	config = READ_VID32(CS5530_DISPLAY_CONFIG);
-	
-	switch (enable)
-	{
-	    case CRT_DISABLE: /* Disable everything */
-
-			WRITE_VID32(CS5530_DISPLAY_CONFIG, config & ~(CS5530_DCFG_DIS_EN   | CS5530_DCFG_HSYNC_EN
-												   	    | CS5530_DCFG_VSYNC_EN | CS5530_DCFG_DAC_BL_EN 
-													    | CS5530_DCFG_DAC_PWDNX));
-			break;
-
-		case CRT_ENABLE: /* Enable CRT display, including display logic */
-
-			WRITE_VID32(CS5530_DISPLAY_CONFIG, config | CS5530_DCFG_DIS_EN   | CS5530_DCFG_HSYNC_EN
-												      | CS5530_DCFG_VSYNC_EN | CS5530_DCFG_DAC_BL_EN
-												      | CS5530_DCFG_DAC_PWDNX);
-			break;
-
-		case CRT_STANDBY: /* HSync:Off VSync:On */
-
-			WRITE_VID32(CS5530_DISPLAY_CONFIG, (config & ~(CS5530_DCFG_DIS_EN    | CS5530_DCFG_HSYNC_EN
-												  	     | CS5530_DCFG_DAC_BL_EN | CS5530_DCFG_DAC_PWDNX))
-												         | CS5530_DCFG_VSYNC_EN );			
-			break;
-
-		case CRT_SUSPEND: /* HSync:On VSync:Off */
-
-			WRITE_VID32(CS5530_DISPLAY_CONFIG, (config & ~(CS5530_DCFG_DIS_EN    | CS5530_DCFG_VSYNC_EN
-												   	     | CS5530_DCFG_DAC_BL_EN | CS5530_DCFG_DAC_PWDNX))
-												         | CS5530_DCFG_HSYNC_EN );	
-			break;
-
-		default:
-			return (GFX_STATUS_BAD_PARAMETER);
-	}
-	return(GFX_STATUS_OK);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_reset_video (PRIVATE ROUTINE: NOT PART OF DURANGO API)
- *
- * This routine is used to disable all components of video overlay before
- * performing a mode switch.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-void cs5530_reset_video(void)
-#else
-void gfx_reset_video(void)
-#endif
-{
-	gfx_set_video_enable(0);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_set_display_control (PRIVATE ROUTINE: NOT PART OF DURANGO API)
- *
- * This routine configures the display output.
- *
- * "sync_polarities" is used to set the polarities of the sync pulses according
- * to the following mask:
- *
- *     Bit 0: If set to 1, negative horizontal polarity is programmed,
- *            otherwise positive horizontal polarity is programmed.
- *     Bit 1: If set to 1, negative vertical polarity is programmed,
- *            otherwise positive vertical polarity is programmed.
- *
- *-----------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int cs5530_set_display_control(int sync_polarities)
-#else
-int gfx_set_display_control(int sync_polarities)
-#endif
-{
-	unsigned long dcfg;
-
-	/* ENABLE DISPLAY OUTPUT FROM CX5530 */
-
-	dcfg = READ_VID32(CS5530_DISPLAY_CONFIG);
-
-	/* CLEAR RELEVANT FIELDS */
-
-	dcfg &= ~(CS5530_DCFG_CRT_SYNC_SKW_MASK | CS5530_DCFG_PWR_SEQ_DLY_MASK |
-		      CS5530_DCFG_CRT_HSYNC_POL     | CS5530_DCFG_CRT_VSYNC_POL    |
-			  CS5530_DCFG_FP_PWR_EN         | CS5530_DCFG_FP_DATA_EN);
-	
-	/* INITIALIZATION */
-
-	dcfg |= (CS5530_DCFG_CRT_SYNC_SKW_INIT | 
-			 CS5530_DCFG_PWR_SEQ_DLY_INIT  | 
-			 CS5530_DCFG_GV_PAL_BYP);
-	
-	if (PanelEnable) 
-	{
-		dcfg |= CS5530_DCFG_FP_PWR_EN;
-		dcfg |= CS5530_DCFG_FP_DATA_EN; 
-	}
-
-	/* SET APPROPRIATE SYNC POLARITIES */
-
-	if (sync_polarities & 1)
-		dcfg |= CS5530_DCFG_CRT_HSYNC_POL;
-	if (sync_polarities & 2)
-		dcfg |= CS5530_DCFG_CRT_VSYNC_POL;
-	
-	WRITE_VID32(CS5530_DISPLAY_CONFIG, dcfg);
-	return (0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_clock_frequency
- *
- * This routine sets the clock frequency, specified as a 16.16 fixed point
- * value (0x00318000 = 49.5 MHz).  It will set the closest frequency found
- * in the lookup table.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-void cs5530_set_clock_frequency(unsigned long frequency)
-#else
-void gfx_set_clock_frequency(unsigned long frequency)
-#endif
-{
-	int index;
-	unsigned long value;
-	long min, diff;
-
-	/* FIND THE REGISTER VALUES FOR THE DESIRED FREQUENCY */
-	/* Search the table for the closest frequency (16.16 format). */
-
-	value = CS5530_PLLtable[0].pll_value;
-	min = (long) CS5530_PLLtable[0].frequency - frequency;
-	if (min < 0L) min = -min;
-	for (index = 1; index < NUM_CS5530_FREQUENCIES; index++)
-	{
-		diff = (long) CS5530_PLLtable[index].frequency - frequency;
-		if (diff < 0L) diff = -diff;
-		if (diff < min)
-		{
-			min = diff; 
-			value = CS5530_PLLtable[index].pll_value;
-		}
-	}
-
-	/* SET THE DOT CLOCK REGISTER */
-
-	WRITE_VID32(CS5530_DOT_CLK_CONFIG, value);
-	WRITE_VID32(CS5530_DOT_CLK_CONFIG, value | 0x80000100); /* set reset/bypass */
-	gfx_delay_milliseconds(1); /* wait for PLL to settle */
-	WRITE_VID32(CS5530_DOT_CLK_CONFIG, value & 0x7FFFFFFF); /* clear reset */
-	WRITE_VID32(CS5530_DOT_CLK_CONFIG, value & 0x7FFFFEFF); /* clear bypass */
-	return;
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_set_video_enable
- *
- * This routine enables or disables the video overlay functionality.
- *-----------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int cs5530_set_video_enable(int enable)
-#else
-int gfx_set_video_enable(int enable)
-#endif
-{
-	unsigned long vcfg;
-
-	/* WAIT FOR VERTICAL BLANK TO START */
-	/* Otherwise a glitch can be observed. */
-
-	if (gfx_test_timing_active())
-	{
-		if (!gfx_test_vertical_active())
-		{
-			while(!gfx_test_vertical_active());
-		}
-		while(gfx_test_vertical_active());
-	}
-	vcfg = READ_VID32(CS5530_VIDEO_CONFIG);
-	if (enable)
-	{
-		/* ENABLE VIDEO OVERLAY FROM DISPLAY CONTROLLER */
-		/* Use private routine to abstract the display controller. */
-
-		gfx_set_display_video_enable(1);
-
-		/* SET CS5530 BUS CONTROL PARAMETERS */
-		/* Currently always high speed, 8-bit interface. */
-
-		vcfg |= CS5530_VCFG_HIGH_SPD_INT;
-		vcfg &= ~(CS5530_VCFG_EARLY_VID_RDY | CS5530_VCFG_16_BIT_EN);
-
-		/* ENABLE CS5530 VIDEO OVERLAY */
-
-		vcfg |= CS5530_VCFG_VID_EN;
-		WRITE_VID32(CS5530_VIDEO_CONFIG, vcfg);
-	}
-	else
-	{
-		/* DISABLE CS5530 VIDEO OVERLAY */
-
-		vcfg &= ~CS5530_VCFG_VID_EN;
-		WRITE_VID32(CS5530_VIDEO_CONFIG, vcfg);
-
-		/* DISABLE VIDEO OVERLAY FROM DISPLAY CONTROLLER */
-		/* Use private routine to abstract the display controller. */
-
-		gfx_set_display_video_enable(0);
-	}
-	return(0);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_set_video_format
- *
- * Currently only sets 4:2:0 format, Y1 V Y0 U.
- *-----------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int cs5530_set_video_format(unsigned long format)
-#else
-int gfx_set_video_format(unsigned long format)
-#endif
-{
-	unsigned long vcfg = 0;
-
-	/* SET THE CS5530 VIDEO INPUT FORMAT */
-
-	vcfg = READ_VID32(CS5530_VIDEO_CONFIG);
-	vcfg &= ~(CS5530_VCFG_VID_INP_FORMAT | CS5530_VCFG_4_2_0_MODE);
-	vcfg &= ~(CS5530_VCFG_CSC_BYPASS);
-	vcfg &= ~(CS5530_VCFG_GV_SEL);
-
-	if (format < 4) 
-		vcfg |= (format << 2);
-	else 
-	{
-		if (format == VIDEO_FORMAT_Y0Y1Y2Y3)
-		{
-			vcfg |= CS5530_VCFG_4_2_0_MODE;
-			vcfg |= 1 << 2;
-		}
-		if (format == VIDEO_FORMAT_RGB)
-		{
-		    vcfg |= CS5530_VCFG_CSC_BYPASS;
-			vcfg |= CS5530_VCFG_GV_SEL;
-		}
-	}
-
-	WRITE_VID32(CS5530_VIDEO_CONFIG, vcfg);
-	return(0);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_set_video_size
- *
- * This routine specifies the size of the source data.  It is used only 
- * to determine how much data to transfer per frame, and is not used to 
- * calculate the scaling value (that is handled by a separate routine).
- *-----------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int cs5530_set_video_size(unsigned short width, unsigned short height)
-#else
-int gfx_set_video_size(unsigned short width, unsigned short height)
-#endif
-{
-	unsigned long size, vcfg;
-
-	/* SET THE CS5530 VIDEO LINE SIZE */
-
-	vcfg = READ_VID32(CS5530_VIDEO_CONFIG);
-	vcfg &= ~(CS5530_VCFG_LINE_SIZE_LOWER_MASK | CS5530_VCFG_LINE_SIZE_UPPER);
-	size = (width >> 1);
-	vcfg |= (size & 0x00FF) << 8;
-	if (size & 0x0100) vcfg |= CS5530_VCFG_LINE_SIZE_UPPER;
-	WRITE_VID32(CS5530_VIDEO_CONFIG, vcfg);
-
-	/* SET TOTAL VIDEO BUFFER SIZE IN DISPLAY CONTROLLER */
-	/* Use private routine to abstract the display controller. */
-
-	gfx_set_display_video_size(width, height);
-	return(0);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_set_video_offset
- *
- * This routine sets the starting offset for the video buffer when only 
- * one offset needs to be specified.
- *-----------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int cs5530_set_video_offset(unsigned long offset)
-#else
-int gfx_set_video_offset(unsigned long offset)
-#endif
-{
-	/* SAVE VALUE FOR FUTURE CLIPPING OF THE TOP OF THE VIDEO WINDOW */
-
-	gfx_vid_offset = offset;
-
-	/* SET VIDEO BUFFER OFFSET IN DISPLAY CONTROLLER */
-	/* Use private routine to abstract the display controller. */
-
-	gfx_set_display_video_offset(offset);
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_video_scale
- * 
- * This routine sets the scale factor for the video overlay window.  The 
- * size of the source and destination regions are specified in pixels.  
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int cs5530_set_video_scale(unsigned short srcw, unsigned short srch, 
-	unsigned short dstw, unsigned short dsth)
-#else
-int gfx_set_video_scale(unsigned short srcw, unsigned short srch, 
-	unsigned short dstw, unsigned short dsth)
-#endif
-{
-	unsigned long xscale, yscale;
-
-	/* SAVE PARAMETERS */
-	/* These are needed for clipping the video window later. */
-
-	gfx_vid_srcw = srcw;
-	gfx_vid_srch = srch;
-	gfx_vid_dstw = dstw;
-	gfx_vid_dsth = dsth;
-
-	/* CALCULATE CS5530 SCALE FACTORS */
-	/* No downscaling in CS5530 so force to 1x if attempted. */
-
-	if (dstw <= srcw) xscale = 0x1FFF;
-	else if (dstw == 1 || srcw == 1) return GFX_STATUS_BAD_PARAMETER;
-	else xscale = (0x2000l * (srcw - 1l)) / (dstw - 1l);
-	if (dsth <= srch) yscale = 0x1FFF;
-	else if (dsth == 1 || srch == 1) return GFX_STATUS_BAD_PARAMETER;
-	else yscale = (0x2000l * (srch - 1l)) / (dsth - 1l);
-	WRITE_VID32(CS5530_VIDEO_SCALE, (yscale << 16) | xscale);
-
-	/* CALL ROUTINE TO UPDATE WINDOW POSITION */
-	/* This is required because the scale values effect the number of */
-	/* source data pixels that need to be clipped, as well as the */
-	/* amount of data that needs to be transferred. */
-
-	gfx_set_video_window(gfx_vid_xpos, gfx_vid_ypos, gfx_vid_width,
-		gfx_vid_height);
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_video_window
- * 
- * This routine sets the position and size of the video overlay window.  The 
- * position is specified in screen relative coordinates, and may be negative.  
- * The size of destination region is specified in pixels.  The line size
- * indicates the number of bytes of source data per scanline.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int cs5530_set_video_window(short x, short y, unsigned short w, 
-	unsigned short h)
-#else
-int gfx_set_video_window(short x, short y, unsigned short w, 
-	unsigned short h)
-#endif
-{
-	unsigned long vcfg = 0;
-	unsigned long hadjust, vadjust;
-	unsigned long initread;
-	unsigned long xstart, ystart, xend, yend;
-	unsigned long offset, line_size;
-
-	/* SAVE PARAMETERS */
-	/* These are needed to call this routine if the scale value changes. */
-
-	gfx_vid_xpos = x;
-	gfx_vid_ypos = y;
-	gfx_vid_width = w;
-	gfx_vid_height = h;
-
-	/* GET ADJUSTMENT VALUES */
-	/* Use routines to abstract version of display controller. */
-
-	hadjust = gfx_get_htotal() - gfx_get_hsync_end() - 13l;
-	vadjust = gfx_get_vtotal() - gfx_get_vsync_end() + 1l;
-
-	if (x > 0) 
-	{
-		/* NO CLIPPING ON LEFT */
-
-		xstart = x + hadjust;
-		initread = 0;
-	}
-	else 
-	{
-		/* CLIPPING ON LEFT */
-		/* Adjust initial read for scale, checking for divide by zero */
-
-		xstart = hadjust;
-		if (gfx_vid_dstw) 
-			initread = ((-x) * gfx_vid_srcw) / gfx_vid_dstw;
-		else initread = 0;
-	}
-	
-	/* CLIPPING ON RIGHT */
-
-	xend = x + w;
-	if (xend > gfx_get_hactive()) xend = gfx_get_hactive();
-	xend += hadjust;
-
-	/* CLIPPING ON TOP */
-
-	offset = gfx_vid_offset;
-	if (y >= 0) 
-	{
-		ystart = y + vadjust;
-	}
-	else 
-	{
-		ystart = vadjust;
-		line_size = (READ_VID32(CS5530_VIDEO_CONFIG) >> 7) & 0x000001FE;
-		if (READ_VID32(CS5530_VIDEO_CONFIG) & CS5530_VCFG_LINE_SIZE_UPPER)
-			line_size += 512l;
-		if (gfx_vid_dsth)
-			offset = gfx_vid_offset + (line_size << 1) * 
-				(((-y) * gfx_vid_srch) / gfx_vid_dsth);
-	}
-
-	/* CLIPPING ON BOTTOM */
-
-	yend = y + h;
-	if (yend >= gfx_get_vactive()) yend = gfx_get_vactive();
-	yend += vadjust;
-
-	/* SET VIDEO BUFFER OFFSET IN DISPLAY CONTROLLER */
-	/* Use private routine to abstract the display controller. */
-
-	gfx_set_display_video_offset(offset);
-
-	/* DISABLE REGISTER UPDATES */
-
-	vcfg = READ_VID32(CS5530_VIDEO_CONFIG);
-	vcfg &= ~CS5530_VCFG_VID_REG_UPDATE;
-	WRITE_VID32(CS5530_VIDEO_CONFIG, vcfg);
-
-	/* SET VIDEO POSITION */
-
-	WRITE_VID32(CS5530_VIDEO_X_POS, (xend << 16) | xstart);
-	WRITE_VID32(CS5530_VIDEO_Y_POS, (yend << 16) | ystart);
-
-	/* SET INITIAL READ ADDRESS AND ENABLE REGISTER UPDATES */
-
-	vcfg &= ~CS5530_VCFG_INIT_READ_MASK;
-	vcfg |= (initread << 15) & CS5530_VCFG_INIT_READ_MASK;
-	vcfg |= CS5530_VCFG_VID_REG_UPDATE;
-	WRITE_VID32(CS5530_VIDEO_CONFIG, vcfg);
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_video_color_key
- * 
- * This routine specifies the color key value and mask for the video overlay
- * hardware.  To disable color key, the color and mask should both be set to 
- * zero.  The hardware uses the color key in the following equation:
- *
- * ((source data) & (color key mask)) == ((color key) & (color key mask))
- *
- * The source data can be either graphics data or video data.  The bluescreen
- * parameter is set to have the hardware compare video data and clear to
- * comapare graphics data.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int cs5530_set_video_color_key(unsigned long key, unsigned long mask, 
-	int graphics)
-#else
-int gfx_set_video_color_key(unsigned long key, unsigned long mask, 
-	int graphics)
-#endif
-{
-	unsigned long dcfg = 0;
-
-	/* SET CS5530 COLOR KEY VALUE */
-
-	WRITE_VID32(CS5530_VIDEO_COLOR_KEY, key);
-	WRITE_VID32(CS5530_VIDEO_COLOR_MASK, mask);
-
-	/* SELECT GRAPHICS OR VIDEO DATA TO COMPARE TO THE COLOR KEY */
-
-	dcfg = READ_VID32(CS5530_DISPLAY_CONFIG);
-	if (graphics & 0x01) dcfg &= ~CS5530_DCFG_VG_CK;
-	else dcfg |= CS5530_DCFG_VG_CK;
-	WRITE_VID32(CS5530_DISPLAY_CONFIG, dcfg);
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_video_filter
- * 
- * This routine enables or disables the video overlay filters.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int cs5530_set_video_filter(int xfilter, int yfilter)
-#else
-int gfx_set_video_filter(int xfilter, int yfilter)
-#endif
-{
-	unsigned long vcfg = 0;
-
-	/* ENABLE OR DISABLE CS5530 VIDEO OVERLAY FILTERS */
-
-	vcfg = READ_VID32(CS5530_VIDEO_CONFIG);
-	vcfg &= ~(CS5530_VCFG_X_FILTER_EN | CS5530_VCFG_Y_FILTER_EN);
-	if (xfilter) vcfg |= CS5530_VCFG_X_FILTER_EN;
-	if (yfilter) vcfg |= CS5530_VCFG_Y_FILTER_EN;
-	WRITE_VID32(CS5530_VIDEO_CONFIG, vcfg);
- 
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_video_palette
- * 
- * This routine loads the video hardware palette.  If a NULL pointer is 
- * specified, the palette is bypassed (for CS5530, this means loading the 
- * palette with identity values). 
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int cs5530_set_video_palette(unsigned long *palette)
-#else
-int gfx_set_video_palette(unsigned long *palette)
-#endif
-{
-	unsigned long i, entry;
-
-	/* LOAD CS5530 VIDEO PALETTE */
-
-	WRITE_VID32(CS5530_PALETTE_ADDRESS, 0);
-	for (i = 0; i < 256; i++)
-	{
-		if (palette) entry = palette[i];
-		else entry = i | (i << 8) | (i << 16);
-		WRITE_VID32(CS5530_PALETTE_DATA, entry);
-	}
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_video_palette_entry
- * 
- * This routine loads a single entry of the video hardware palette.  
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int cs5530_set_video_palette_entry(unsigned long index, unsigned long palette)
-#else
-int gfx_set_video_palette_entry(unsigned long index, unsigned long palette)
-#endif
-{
-	if (index > 0xFF)
-		return GFX_STATUS_BAD_PARAMETER;
-
-	/* SET A SINGLE ENTRY */
-
-	WRITE_VID32(CS5530_PALETTE_ADDRESS, index);
-	WRITE_VID32(CS5530_PALETTE_DATA, palette);
-	
-	return(0);
-}
-
-#define CX55xx_VIDEO_PCI_44 0x80009444
-
-/*---------------------------------------------------------------------------
- * gfx_disable_softvga
- * 
- * Disables SoftVga. This function is only valid with VSA2, Returns 1 if
- * SoftVga can be disabled; 0 if not.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int cs5530_disable_softvga(void)
-#else
-int gfx_disable_softvga(void)
-#endif
-{
-	unsigned long reg_val;
-
-	/* get the current value */
-	reg_val = gfx_pci_config_read(CX55xx_VIDEO_PCI_44);
-	/* setting video PCI register 44 bit 0 to 1 disables SoftVga */
-	reg_val |= 0x1;
-	gfx_pci_config_write(CX55xx_VIDEO_PCI_44, reg_val);
-
-	/* see if we set the bit and return the appropriate value */
-	reg_val = gfx_pci_config_read(CX55xx_VIDEO_PCI_44);
-	if((reg_val & 0x1) == 0x1)
-		return(1);
-	else 
-		return(0);
-		 
-} 
-
-/*---------------------------------------------------------------------------
- * gfx_enable_softvga
- * 
- * Enables SoftVga. This function is only valid with VSA2, Returns 1 if
- * SoftVga can be enbled; 0 if not.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int cs5530_enable_softvga(void)
-#else
-int gfx_enable_softvga(void)
-#endif
-{
-	unsigned long reg_val;
-
-	/* get the current value */
-	reg_val = gfx_pci_config_read(CX55xx_VIDEO_PCI_44);
-	/* clearing video PCI register 44 bit 0 enables SoftVga */
-	gfx_pci_config_write(CX55xx_VIDEO_PCI_44, reg_val & 0xfffffffe);
-
-	/* see if we cleared the bit and return the appropriate value */
-	reg_val = gfx_pci_config_read(CX55xx_VIDEO_PCI_44);
-	if((reg_val & 0x1) == 0)
-		return(1);
-	else 
-		return(0);
-		 
-} 
-
-/*---------------------------------------------------------------------------
- * gfx_get_clock_frequency
- *
- * This routine returns the current clock frequency in 16.16 format.
- * It reads the current register value and finds the match in the table.
- * If no match is found, this routine returns 0.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-unsigned long cs5530_get_clock_frequency(void)
-#else
-unsigned long gfx_get_clock_frequency(void)
-#endif
-{
-	int index;
-	unsigned long value, mask;
-	mask = 0x7FFFFEDC;
-	value = READ_VID32(CS5530_DOT_CLK_CONFIG) & mask;
-	for (index = 0; index < NUM_CS5530_FREQUENCIES; index++)
-	{
-		if ((CS5530_PLLtable[index].pll_value & mask) == value)
-			return(CS5530_PLLtable[index].frequency);
-	}
-	return(0);
-}
-
-
-/*************************************************************/
-/*  READ ROUTINES  |  INCLUDED FOR DIAGNOSTIC PURPOSES ONLY  */
-/*************************************************************/
-
-#if GFX_READ_ROUTINES
-
-/*---------------------------------------------------------------------------
- * gfx_get_vsa2_softvga_enable
- * 
- * This function returns the enable status of SoftVGA.  It is valid
- * only if VSAII is present.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int cs5530_get_vsa2_softvga_enable(void)
-#else
-int gfx_get_vsa2_softvga_enable(void)
-#endif
-{
-	unsigned long reg_val;
-
-	reg_val = gfx_pci_config_read(CX55xx_VIDEO_PCI_44);
-	if((reg_val & 0x1) == 0)
-		return(1);
-	else 
-		return(0);
-		 
-} 
-
-/*---------------------------------------------------------------------------
- * gfx_get_sync_polarities
- *
- * This routine returns the polarities of the sync pulses:
- *     Bit 0: Set if negative horizontal polarity.
- *     Bit 1: Set if negative vertical polarity.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int cs5530_get_sync_polarities(void)
-#else
-int gfx_get_sync_polarities(void)
-#endif
-{
-	int polarities = 0;
-	if (READ_VID32(CS5530_DISPLAY_CONFIG) & 0x00000100) polarities |= 1;
-	if (READ_VID32(CS5530_DISPLAY_CONFIG) & 0x00000200) polarities |= 2;
-	return(polarities);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_video_palette_entry
- *
- * This routine returns a single palette entry.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int cs5530_get_video_palette_entry(unsigned long index, unsigned long *palette)
-#else
-int gfx_get_video_palette_entry(unsigned long index, unsigned long *palette)
-#endif
-{
-	if (index > 0xFF)
-		return GFX_STATUS_BAD_PARAMETER;
-
-	/* READ A SINGLE ENTRY */
-
-	WRITE_VID32 (CS5530_PALETTE_ADDRESS, index);
-	*palette = READ_VID32 (CS5530_PALETTE_DATA);
-
-	return (GFX_STATUS_OK);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_get_video_enable
- *
- * This routine returns the value "one" if video overlay is currently enabled,
- * otherwise it returns the value "zero".
- *-----------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int cs5530_get_video_enable(void)
-#else
-int gfx_get_video_enable(void)
-#endif
-{
-	if (READ_VID32(CS5530_VIDEO_CONFIG) & CS5530_VCFG_VID_EN) return(1);
-	return(0);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_get_video_format
- *
- * This routine returns the current video overlay format.
- *-----------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int cs5530_get_video_format(void)
-#else
-int gfx_get_video_format(void)
-#endif
-{
-	unsigned long vcfg;
-	vcfg = READ_VID32(CS5530_VIDEO_CONFIG);
-	if (vcfg & CS5530_VCFG_CSC_BYPASS) return(VIDEO_FORMAT_RGB);
-	if (vcfg & CS5530_VCFG_4_2_0_MODE) return(VIDEO_FORMAT_Y0Y1Y2Y3);
-	
-	return ((int)((vcfg >> 2) & 3));
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_get_video_src_size
- *
- * This routine returns the size of the source video overlay buffer.  The 
- * return value is (height << 16) | width.
- *-----------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-unsigned long cs5530_get_video_src_size(void)
-#else
-unsigned long gfx_get_video_src_size(void)
-#endif
-{
-	unsigned long width = 0, height = 0;
-
-	/* DETERMINE SOURCE WIDTH FROM THE CS5530 VIDEO LINE SIZE */
-
-	width = (READ_VID32(CS5530_VIDEO_CONFIG) >> 7) & 0x000001FE;
-	if (READ_VID32(CS5530_VIDEO_CONFIG) & CS5530_VCFG_LINE_SIZE_UPPER)
-		width += 512l;
-
-	if (width)
-	{
-		/* DETERMINE HEIGHT BY DIVIDING TOTAL SIZE BY WIDTH */
-		/* Get total size from display controller - abtracted. */
-
-		height = gfx_get_display_video_size() / (width << 1);
-	}
-	return((height << 16) | width);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_get_video_line_size
- *
- * This routine returns the line size of the source video overlay buffer, in 
- * pixels.
- *-----------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-unsigned long cs5530_get_video_line_size(void)
-#else
-unsigned long gfx_get_video_line_size(void)
-#endif
-{
-	unsigned long width = 0;
-
-	/* DETERMINE SOURCE WIDTH FROM THE CS5530 VIDEO LINE SIZE */
-
-	width = (READ_VID32(CS5530_VIDEO_CONFIG) >> 7) & 0x000001FE;
-	if (READ_VID32(CS5530_VIDEO_CONFIG) & CS5530_VCFG_LINE_SIZE_UPPER)
-		width += 512l;
-	return(width);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_get_video_xclip
- *
- * This routine returns the number of bytes clipped on the left side of a 
- * video overlay line (skipped at beginning).
- *-----------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-unsigned long cs5530_get_video_xclip(void)
-#else
-unsigned long gfx_get_video_xclip(void)
-#endif
-{
-	unsigned long clip = 0;
-
-	/* DETERMINE SOURCE WIDTH FROM THE CS5530 VIDEO LINE SIZE */
-
-	clip = (READ_VID32(CS5530_VIDEO_CONFIG) >> 14) & 0x000007FC;
-	return(clip);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_get_video_offset
- *
- * This routine returns the current offset for the video overlay buffer.
- *-----------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-unsigned long cs5530_get_video_offset(void)
-#else
-unsigned long gfx_get_video_offset(void)
-#endif
-{
-	return(gfx_get_display_video_offset());
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_video_scale
- * 
- * This routine returns the scale factor for the video overlay window.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-unsigned long cs5530_get_video_scale(void)
-#else
-unsigned long gfx_get_video_scale(void)
-#endif
-{
-	return(READ_VID32(CS5530_VIDEO_SCALE));
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_video_dst_size
- * 
- * This routine returns the size of the displayed video overlay window.
- * NOTE: This is the displayed window size, which may be different from 
- * the real window size if clipped.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-unsigned long cs5530_get_video_dst_size(void)
-#else
-unsigned long gfx_get_video_dst_size(void)
-#endif
-{
-	unsigned long xsize, ysize;
-
-	xsize = READ_VID32(CS5530_VIDEO_X_POS);
-	xsize = ((xsize >> 16) & 0x7FF) - (xsize & 0x07FF);
-	ysize = READ_VID32(CS5530_VIDEO_Y_POS);
-	ysize = ((ysize >> 16) & 0x7FF) - (ysize & 0x07FF);
-	return((ysize << 16) | xsize);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_video_position
- * 
- * This routine returns the position of the video overlay window.  The
- * return value is (ypos << 16) | xpos.
- * NOTE: This is the displayed window position, which may be different from 
- * the real window position if clipped.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-unsigned long cs5530_get_video_position(void)
-#else
-unsigned long gfx_get_video_position(void)
-#endif
-{
-	unsigned long hadjust, vadjust;
-	unsigned long xpos, ypos;
-
-	/* READ HARDWARE POSITION */
-
-	xpos = READ_VID32(CS5530_VIDEO_X_POS) & 0x000007FF;
-	ypos = READ_VID32(CS5530_VIDEO_Y_POS) & 0x000007FF;
-	
-	/* GET ADJUSTMENT VALUES */
-	/* Use routines to abstract version of display controller. */
-
-	hadjust = gfx_get_htotal() - gfx_get_hsync_end() - 13l;
-	vadjust = gfx_get_vtotal() - gfx_get_vsync_end() + 1l;
-	xpos -= hadjust;
-	ypos -= vadjust;
-	return((ypos << 16) | (xpos & 0x0000FFFF));
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_video_color_key
- * 
- * This routine returns the current video color key value.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-unsigned long cs5530_get_video_color_key(void)
-#else
-unsigned long gfx_get_video_color_key(void)
-#endif
-{
-	return(READ_VID32(CS5530_VIDEO_COLOR_KEY));
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_video_color_key_mask
- * 
- * This routine returns the current video color mask value.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-unsigned long cs5530_get_video_color_key_mask(void)
-#else
-unsigned long gfx_get_video_color_key_mask(void)
-#endif
-{
-	return(READ_VID32(CS5530_VIDEO_COLOR_MASK));
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_video_color_key_src
- * 
- * This routine returns 0 for video data compare, 1 for graphics data.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int cs5530_get_video_color_key_src(void)
-#else
-int gfx_get_video_color_key_src(void)
-#endif
-{
-	if (READ_VID32(CS5530_DISPLAY_CONFIG) & CS5530_DCFG_VG_CK) return(0);
-	return(1);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_video_filter
- * 
- * This routine returns if the filters are currently enabled.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int cs5530_get_video_filter(void)
-#else
-int gfx_get_video_filter(void)
-#endif
-{
-	int retval = 0;
-	if (READ_VID32(CS5530_VIDEO_CONFIG) & CS5530_VCFG_X_FILTER_EN) 
-		retval |= 1;
-	if (READ_VID32(CS5530_VIDEO_CONFIG) & CS5530_VCFG_Y_FILTER_EN) 
-		retval |= 2;
-	return(retval);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_read_crc
- *
- * This routine returns the hardware CRC value, which is used for automated 
- * testing.  The value is like a checksum, but will change if pixels move
- * locations.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-unsigned long cs5530_read_crc(void)
-#else
-unsigned long gfx_read_crc(void)
-#endif
-{
-	unsigned long crc = 0xFFFFFFFF;
-	if (gfx_test_timing_active())
-	{
-		/* WAIT UNTIL ACTIVE DISPLAY */
-
-		while(!gfx_test_vertical_active());
-
-		/* RESET CRC DURING ACTIVE DISPLAY */
-
-		WRITE_VID32(CS5530_CRCSIG_TFT_TV, 0);
-		WRITE_VID32(CS5530_CRCSIG_TFT_TV, 1);
-
-		/* WAIT UNTIL NOT ACTIVE, THEN ACTIVE, NOT ACTIVE, THEN ACTIVE */
-		
-		while(gfx_test_vertical_active());
-		while(!gfx_test_vertical_active());
-		while(gfx_test_vertical_active());
-		while(!gfx_test_vertical_active());
-		crc = READ_VID32(CS5530_CRCSIG_TFT_TV) >> 8;
-	}
-	return(crc);
-}	
-
-#endif /* GFX_READ_ROUTINES */
-
-/* END OF FILE */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/vid_rdcl.c b/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/vid_rdcl.c
deleted file mode 100644
index c2353e832..000000000
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/vid_rdcl.c
+++ /dev/null
@@ -1,2580 +0,0 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/vid_rdcl.c,v 1.1 2002/10/11 14:33:01 alanh Exp $ */
-/*
- * $Workfile: vid_rdcl.c $
- *
- * This file contains routines to control the Redcloud display filter video overlay hardware.
- *
- * NSC_LIC_ALTERNATIVE_PREAMBLE
- *
- * Revision 1.0
- *
- * National Semiconductor Alternative GPL-BSD License
- *
- * National Semiconductor Corporation licenses this software 
- * ("Software"):
- *
- *      Durango
- *
- * under one of the two following licenses, depending on how the 
- * Software is received by the Licensee.
- * 
- * If this Software is received as part of the Linux Framebuffer or
- * other GPL licensed software, then the GPL license designated 
- * NSC_LIC_GPL applies to this Software; in all other circumstances 
- * then the BSD-style license designated NSC_LIC_BSD shall apply.
- *
- * END_NSC_LIC_ALTERNATIVE_PREAMBLE */
-
-/* NSC_LIC_BSD
- *
- * National Semiconductor Corporation Open Source License for Durango
- *
- * (BSD License with Export Notice)
- *
- * Copyright (c) 1999-2001
- * National Semiconductor Corporation.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without 
- * modification, are permitted provided that the following conditions 
- * are met: 
- *
- *   * Redistributions of source code must retain the above copyright 
- *     notice, this list of conditions and the following disclaimer. 
- *
- *   * Redistributions in binary form must reproduce the above 
- *     copyright notice, this list of conditions and the following 
- *     disclaimer in the documentation and/or other materials provided 
- *     with the distribution. 
- *
- *   * Neither the name of the National Semiconductor Corporation nor 
- *     the names of its contributors may be used to endorse or promote 
- *     products derived from this software without specific prior 
- *     written permission. 
- * 
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
- * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
- * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE,
- * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
- * OF SUCH DAMAGE.
- *
- * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
- * YOUR JURISDICTION. It is licensee's responsibility to comply with 
- * any export regulations applicable in licensee's jurisdiction. Under 
- * CURRENT (2001) U.S. export regulations this software 
- * is eligible for export from the U.S. and can be downloaded by or 
- * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
- * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
- * Syria, Sudan, Afghanistan and any other country to which the U.S. 
- * has embargoed goods and services. 
- *
- * END_NSC_LIC_BSD */
-
-/* NSC_LIC_GPL
- *
- * National Semiconductor Corporation Gnu General Public License for Durango
- *
- * (GPL License with Export Notice)
- *
- * Copyright (c) 1999-2001
- * National Semiconductor Corporation.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without 
- * modification, are permitted under the terms of the GNU General 
- * Public License as published by the Free Software Foundation; either 
- * version 2 of the License, or (at your option) any later version  
- *
- * In addition to the terms of the GNU General Public License, neither 
- * the name of the National Semiconductor Corporation nor the names of 
- * its contributors may be used to endorse or promote products derived 
- * from this software without specific prior written permission. 
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
- * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
- * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, 
- * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
- * OF SUCH DAMAGE. See the GNU General Public License for more details. 
- *
- * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
- * YOUR JURISDICTION. It is licensee's responsibility to comply with 
- * any export regulations applicable in licensee's jurisdiction. Under 
- * CURRENT (2001) U.S. export regulations this software 
- * is eligible for export from the U.S. and can be downloaded by or 
- * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
- * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
- * Syria, Sudan, Afghanistan and any other country to which the U.S. 
- * has embargoed goods and services. 
- *
- * You should have received a copy of the GNU General Public License 
- * along with this file; if not, write to the Free Software Foundation, 
- * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 
- *
- * END_NSC_LIC_GPL */
- 
-/* REDCLOUD PLL TABLE  */
-
-typedef struct RCDFPLL
-{
-	long frequency;					/* 16.16 fixed point frequency            */
-	unsigned long post_div3;        /* MCP Frequency dividers and multipliers */
-	unsigned long pre_mul2;         
-	unsigned long pre_div2;         
-	unsigned long pll_value;		/* MCP DotPLL Register Upper 32(0x0015)   */
-} RCDFPLLENTRY;
-
-RCDFPLLENTRY RCDF_PLLtable48MHz[] = {                                 
-	{ 0x00192CCC, 0, 0, 0, 0x00000037 },       /*  25.1750 */
-    { 0x001C526E, 1, 1, 0, 0x00000B1A },       /*  28.3220 */
-    { 0x001F8000, 1, 0, 0, 0x000002D2 },       /*  31.5000 */
-    { 0x00240000, 1, 1, 0, 0x00000FE2 },       /*  36.0000 */
-    { 0x00258000, 1, 0, 0, 0x0000057A },       /*  37.5000 */
-    { 0x00280000, 1, 0, 0, 0x0000030A },       /*  40.0000 */
-    { 0x002CE666, 0, 0, 0, 0x00000063 },       /*  44.9000 */
-    { 0x00318000, 0, 0, 0, 0x0000054B },       /*  49.5000 */
-    { 0x00320000, 0, 0, 0, 0x0000026E },       /*  50.0000 */
-    { 0x00325999, 0, 1, 0, 0x00000037 },       /*  50.3500 */
-	{ 0x00360000, 1, 1, 0, 0x00000B0D },       /*  54.0000 */
-	{ 0x00384000, 0, 0, 0, 0x00000577 },       /*  56.2500 */
-	{ 0x0038643F, 0, 0, 0, 0x000007F7 },       /*  56.3916 */
-	{ 0x0038A4DD, 0, 0, 0, 0x0000057B },       /*  56.6444 */
-	{ 0x003B0000, 0, 1, 0, 0x00000707 },       /*  59.0000 */
-    { 0x003F0000, 1, 1, 0, 0x00000B39 },       /*  63.0000 */
-	{ 0x00410000, 1, 1, 0, 0x00000B45 },       /*  65.0000 */
-	{ 0x00438000, 1, 1, 0, 0x00000FC1 },       /*  67.5000 */
-	{ 0x0046CCCC, 1, 0, 0, 0x00000561 },       /*  70.8000 */
-	{ 0x00480000, 1, 0, 0, 0x000007E1 },       /*  72.0000 */
-	{ 0x004B0000, 0, 0, 0, 0x00000052 },       /*  75.0000 */
-	{ 0x004EC000, 0, 0, 0, 0x00000056 },       /*  78.7500 */
-	{ 0x00500000, 1, 1, 0, 0x00000709 },       /*  80.0000 */
-	{ 0x0059CCCC, 0, 1, 0, 0x00000262 },       /*  89.8000 */
-	{ 0x005E8000, 0, 0, 0, 0x000002D2 },       /*  94.5000 */
-	{ 0x00630000, 0, 1, 0, 0x00000B4A },       /*  99.0000 */
-	{ 0x00640000, 0, 1, 0, 0x00000036 },       /* 100.0000 */
-	{ 0x006C0000, 0, 0, 0, 0x000007E2 },       /* 108.0000 */
-	{ 0x00708000, 0, 0, 0, 0x000007F6 },       /* 112.5000 */
-	{ 0x00820000, 1, 1, 0, 0x00000FB0 },       /* 130.0000 */
-	{ 0x00870000, 1, 1, 0, 0x00000B50 },       /* 135.0000 */
-    { 0x009D8000, 0, 0, 0, 0x00000055 },       /* 157.5000 */
-    { 0x00A20000, 0, 0, 0, 0x000009C1 },       /* 162.0000 */
-	{ 0x00AF8000, 0, 0, 0, 0x000002C1 },       /* 175.5000 */
-	{ 0x00BD0000, 0, 0, 0, 0x000002D1 },       /* 189.0000 */
-	{ 0x00CA8000, 0, 0, 0, 0x00000551 },       /* 202.5000 */
-	{ 0x00E58000, 0, 0, 0, 0x0000057D },       /* 229.5000 */
-};
-
-RCDFPLLENTRY RCDF_PLLtable14MHz[] = {                                 
-	{ 0x00192CCC, 0, 0, 0, 0x00000037 },       /*  25.1750 */
-    { 0x001C526E, 0, 0, 0, 0x00000B7B },       /*  28.3220 */
-    { 0x001F8000, 0, 0, 0, 0x000004D3 },       /*  31.5000 */
-    { 0x00240000, 0, 0, 0, 0x00000BE3 },       /*  36.0000 */
-    { 0x00258000, 0, 0, 0, 0x0000074F },       /*  37.5000 */
-    { 0x00280000, 0, 0, 0, 0x0000050B },       /*  40.0000 */
-    { 0x002CE666, 0, 0, 0, 0x00000063 },       /*  44.9000 */
-    { 0x00318000, 0, 0, 0, 0x0000054B },       /*  49.5000 */
-    { 0x00320000, 0, 0, 0, 0x0000026E },       /*  50.0000 */
-    { 0x00325999, 0, 0, 0, 0x000007C3 },       /*  50.3500 */
-	{ 0x00360000, 0, 0, 0, 0x000007E3 },       /*  54.0000 */
-	{ 0x00384000, 0, 0, 0, 0x00000577 },       /*  56.2500 */
-	{ 0x0038643F, 0, 0, 0, 0x000002FB },       /*  56.3916 */
-	{ 0x0038A4DD, 0, 0, 0, 0x0000057B },       /*  56.6444 */
-	{ 0x003B0000, 0, 0, 0, 0x0000058B },       /*  59.0000 */
-    { 0x003F0000, 0, 0, 0, 0x0000095E },       /*  63.0000 */
-	{ 0x00410000, 0, 0, 0, 0x0000096A },       /*  65.0000 */
-	{ 0x00438000, 0, 0, 0, 0x00000BC2 },       /*  67.5000 */
-	{ 0x0046CCCC, 0, 0, 0, 0x0000098A },       /*  70.8000 */
-	{ 0x00480000, 0, 0, 0, 0x00000BE2 },       /*  72.0000 */
-	{ 0x004B0000, 0, 0, 0, 0x00000052 },       /*  75.0000 */
-	{ 0x004EC000, 0, 0, 0, 0x00000056 },       /*  78.7500 */
-	{ 0x00500000, 0, 0, 0, 0x0000050A },       /*  80.0000 */
-	{ 0x0059CCCC, 0, 0, 0, 0x0000078E },       /*  89.8000 */
-	{ 0x005E8000, 0, 0, 0, 0x000002D2 },       /*  94.5000 */
-	{ 0x00630000, 0, 0, 0, 0x000011F6 },       /*  99.0000 */
-	{ 0x00640000, 0, 0, 0, 0x0000054E },       /* 100.0000 */
-	{ 0x006C0000, 0, 0, 0, 0x000007E2 },       /* 108.0000 */
-	{ 0x00708000, 0, 0, 0, 0x000002FA },       /* 112.5000 */
-	{ 0x00820000, 0, 0, 0, 0x00000BB1 },       /* 130.0000 */
-	{ 0x00870000, 0, 0, 0, 0x00000975 },       /* 135.0000 */
-    { 0x009D8000, 0, 0, 0, 0x00000055 },       /* 157.5000 */
-    { 0x00A20000, 0, 0, 0, 0x000009C1 },       /* 162.0000 */
-	{ 0x00AF8000, 0, 0, 0, 0x000002C1 },       /* 175.5000 */
-	{ 0x00BD0000, 0, 0, 0, 0x00000539 },       /* 189.0000 */
-	{ 0x00CA8000, 0, 0, 0, 0x00000551 },       /* 202.5000 */
-	{ 0x00E58000, 0, 0, 0, 0x0000057D },       /* 229.5000 */
-};
-
-#define NUM_RCDF_FREQUENCIES sizeof(RCDF_PLLtable14MHz)/sizeof(RCDFPLLENTRY)
-  
-
-/*---------------------------------------------------------------------------
- * gfx_reset_video (PRIVATE ROUTINE: NOT PART OF DURANGO API)
- *
- * This routine is used to disable all components of video overlay before
- * performing a mode switch.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-void redcloud_reset_video(void)
-#else
-void gfx_reset_video(void)
-#endif
-{
-	gfx_set_video_enable(0);
-	gfx_select_alpha_region(1);
-	gfx_set_alpha_enable(0);
-	gfx_select_alpha_region(2);
-	gfx_set_alpha_enable(0);
-
-	/* SET REGION 0 AFTER RESET */
-
-	gfx_select_alpha_region(0);
-	gfx_set_alpha_enable(0);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_set_display_control (PRIVATE ROUTINE: NOT PART OF DURANGO API)
- *
- * This routine configures the display output.
- *
- * "sync_polarities" is used to set the polarities of the sync pulses according
- * to the following mask:
- *
- *     Bit 0: If set to 1, negative horizontal polarity is programmed,
- *            otherwise positive horizontal polarity is programmed.
- *     Bit 1: If set to 1, negative vertical polarity is programmed,
- *            otherwise positive vertical polarity is programmed.
- *
- *-----------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int redcloud_set_display_control(int sync_polarities)
-#else
-int gfx_set_display_control(int sync_polarities)
-#endif
-{
-	unsigned long power;
-	unsigned long dcfg;
-
-	/* CONFIGURE DISPLAY OUTPUT FROM VIDEO PROCESSOR */
-
-	dcfg = READ_VID32(RCDF_DISPLAY_CONFIG);
-	dcfg &= ~(RCDF_DCFG_CRT_SYNC_SKW_MASK | RCDF_DCFG_PWR_SEQ_DLY_MASK |
-		      RCDF_DCFG_CRT_HSYNC_POL     | RCDF_DCFG_CRT_VSYNC_POL |
-			  RCDF_DCFG_FP_PWR_EN         | RCDF_DCFG_FP_DATA_EN);
-
-	dcfg |= (RCDF_DCFG_CRT_SYNC_SKW_INIT |
-			 RCDF_DCFG_PWR_SEQ_DLY_INIT  |
-			 RCDF_DCFG_GV_PAL_BYP);
-
-	if (PanelEnable)
-	{
-		power = READ_VID32 (RCDF_POWER_MANAGEMENT);
-		power |= RCDF_PM_PANEL_POWER_ON;
-		WRITE_VID32 (RCDF_POWER_MANAGEMENT, power);
-	}
-
-	/* SET APPROPRIATE SYNC POLARITIES */
-
-	if (sync_polarities & 0x1)
-		dcfg |= RCDF_DCFG_CRT_HSYNC_POL;
-	if (sync_polarities & 0x2)
-		dcfg |= RCDF_DCFG_CRT_VSYNC_POL;
-
-	WRITE_VID32 (RCDF_DISPLAY_CONFIG, dcfg);	
-
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_clock_frequency
- *
- * This routine sets the clock frequency, specified as a 16.16 fixed point
- * value (0x00318000 = 49.5 MHz).  It will set the closest frequency found
- * in the lookup table.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-void redcloud_set_clock_frequency(unsigned long frequency)
-#else
-void gfx_set_clock_frequency(unsigned long frequency)
-#endif
-{
-	Q_WORD msr_value;
-	int i, index = 0;
-	unsigned long value;
-	long timeout = 1000;
-	long min, diff;
-	RCDFPLLENTRY *PllTable;
-
-	/* READ PLL REFERENCE FREQUENCY */
-	/* The reference frequency of GX2 1.x is different from 2.x and above. */
-
-	if ((gfx_cpu_version & 0xFF00) >= 0x0200)
-		PllTable = RCDF_PLLtable48MHz;
-	else
-		PllTable = RCDF_PLLtable14MHz;
-	
-	/* FIND THE REGISTER VALUES FOR THE DESIRED FREQUENCY */
-	/* Search the table for the closest frequency (16.16 format). */
-
-	value = PllTable[0].pll_value;
-	min = (long) PllTable[0].frequency - frequency;
-	if (min < 0L) min = -min;
-	for (i = 1; i < NUM_RCDF_FREQUENCIES; i++)
-	{
-		diff = (long) PllTable[i].frequency - frequency;
-		if (diff < 0L) diff = -diff;
-		if (diff < min)
-		{
-			min = diff; 
-			index = i;
-		}
-	}
-
-	/* PROGRAM THE SETTINGS WITH THE RESET BIT SET */
-
-	gfx_msr_read  (RC_ID_MCP, MCP_DOTPLL, &msr_value);
-	msr_value.high = PllTable[index].pll_value;
-	msr_value.low |= 0x00000001;
-	gfx_msr_write (RC_ID_MCP, MCP_DOTPLL, &msr_value);
-
-	/* PROGRAM THE MCP DIVIDER VALUES */
-
-	gfx_msr_read  (RC_ID_MCP, MCP_SYS_RSTPLL, &msr_value);
-	if (PllTable[index].post_div3) msr_value.low |=  MCP_DOTPOSTDIV3;
-	else                           msr_value.low &= ~MCP_DOTPOSTDIV3;
-	if (PllTable[index].pre_div2)  msr_value.low |=  MCP_DOTPREDIV2;
-	else                           msr_value.low &= ~MCP_DOTPREDIV2;
-	if (PllTable[index].pre_mul2)  msr_value.low |=  MCP_DOTPREMULT2;
-	else                           msr_value.low &= ~MCP_DOTPREMULT2;
-	gfx_msr_write (RC_ID_MCP, MCP_SYS_RSTPLL, &msr_value);
-
-	/* CLEAR THE RESET BIT */
-    
-	gfx_msr_read  (RC_ID_MCP, MCP_DOTPLL, &msr_value);
-	msr_value.low &= 0xFFFFFFFE;
-	gfx_msr_write (RC_ID_MCP, MCP_DOTPLL, &msr_value);
-
-	/* WAIT FOR LOCK BIT */
-
-	do
-	{
-		gfx_msr_read (RC_ID_MCP, MCP_DOTPLL, &msr_value);
-	} while (timeout-- && !(msr_value.low & MCP_DOTPLL_LOCK));
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_crt_enable
- * 
- * This routine enables or disables the CRT output from the video processor.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int redcloud_set_crt_enable(int enable)
-#else
-int gfx_set_crt_enable(int enable)
-#endif
-{
-	unsigned long config, misc;
-	config = READ_VID32(RCDF_DISPLAY_CONFIG);
-	misc   = READ_VID32(RCDF_VID_MISC);
-	
-	switch (enable)
-	{
-	    case CRT_DISABLE: /* DISABLE EVERYTHING */
-
-			WRITE_VID32(RCDF_DISPLAY_CONFIG, config & ~(RCDF_DCFG_DIS_EN   | RCDF_DCFG_HSYNC_EN
-												   	  | RCDF_DCFG_VSYNC_EN | RCDF_DCFG_DAC_BL_EN ));
-			WRITE_VID32(RCDF_VID_MISC, misc | RCDF_DAC_POWER_DOWN);
-			break;
-
-		case CRT_ENABLE: /* ENABLE CRT DISPLAY, INCLUDING DISPLAY LOGIC */
-
-			WRITE_VID32(RCDF_DISPLAY_CONFIG, config | RCDF_DCFG_DIS_EN   | RCDF_DCFG_HSYNC_EN
-												    | RCDF_DCFG_VSYNC_EN | RCDF_DCFG_DAC_BL_EN);
-			WRITE_VID32(RCDF_VID_MISC, misc & ~RCDF_DAC_POWER_DOWN & ~RCDF_ANALOG_POWER_DOWN);
-			break;
-
-		case CRT_STANDBY: /* HSYNC:OFF VSYNC:ON */
-
-			WRITE_VID32(RCDF_DISPLAY_CONFIG, (config & ~(RCDF_DCFG_DIS_EN     | RCDF_DCFG_HSYNC_EN
-											 		   | RCDF_DCFG_DAC_BL_EN)) | 
-													     RCDF_DCFG_VSYNC_EN );	
-			WRITE_VID32(RCDF_VID_MISC, misc | RCDF_DAC_POWER_DOWN);
-			break;
-
-		case CRT_SUSPEND: /* HSYNC:ON VSYNC:OFF */
-
-			WRITE_VID32(RCDF_DISPLAY_CONFIG, (config & ~(RCDF_DCFG_DIS_EN     | RCDF_DCFG_VSYNC_EN
-												  	   | RCDF_DCFG_DAC_BL_EN)) |
-												         RCDF_DCFG_HSYNC_EN );	
-			WRITE_VID32(RCDF_VID_MISC, misc | RCDF_DAC_POWER_DOWN);
-			break;
-
-		default:
-			return (GFX_STATUS_BAD_PARAMETER);
-	}
-	return(GFX_STATUS_OK);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_set_video_enable
- *
- * This routine enables or disables the video overlay functionality.
- *-----------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int redcloud_set_video_enable(int enable)
-#else
-int gfx_set_video_enable(int enable)
-#endif
-{
-	unsigned long vcfg;
-
-	/* WAIT FOR VERTICAL BLANK TO START */
-	/* Otherwise a glitch can be observed. */
-
-	if (gfx_test_timing_active())
-	{
-		if (!gfx_test_vertical_active())
-		{
-			while(!gfx_test_vertical_active());
-		}
-		while(gfx_test_vertical_active());
-	}
-
-	vcfg = READ_VID32(RCDF_VIDEO_CONFIG);
-	if (enable)
-	{
-		/* ENABLE VIDEO OVERLAY FROM DISPLAY CONTROLLER */
-		/* Use private routine to abstract the display controller. */
-
-		gfx_set_display_video_enable(1);
-
-		/* ENABLE DISPLAY FILTER VIDEO OVERLAY */
-
-		vcfg |= RCDF_VCFG_VID_EN;
-		WRITE_VID32(RCDF_VIDEO_CONFIG, vcfg);
-	}
-	else
-	{
-		/* DISABLE DISPLAY FILTER VIDEO OVERLAY */
-
-		vcfg &= ~RCDF_VCFG_VID_EN;
-		WRITE_VID32(RCDF_VIDEO_CONFIG, vcfg);
-
-		/* DISABLE VIDEO OVERLAY FROM DISPLAY CONTROLLER */
-		/* Use private routine to abstract the display controller. */
-
-		gfx_set_display_video_enable(0);
-	}
-	return(0);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_set_video_format
- *
- * Sets input video format type, to one of the YUV formats or to RGB.
- *-----------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int redcloud_set_video_format(unsigned long format)
-#else
-int gfx_set_video_format(unsigned long format)
-#endif
-{
-	unsigned long ctrl, vcfg = 0;
-
-	/* SET THE DISPLAY FILTER VIDEO INPUT FORMAT */
-
-	vcfg = READ_VID32(RCDF_VIDEO_CONFIG);
-	ctrl = READ_VID32(RCDF_VID_ALPHA_CONTROL);
-	ctrl &= ~(RCDF_VIDEO_INPUT_IS_RGB | RCDF_CSC_VIDEO_YUV_TO_RGB);
-	vcfg &= ~(RCDF_VCFG_VID_INP_FORMAT | RCDF_VCFG_4_2_0_MODE);
-	switch(format)
-	{
-	case VIDEO_FORMAT_UYVY:
-		vcfg |= RCDF_VCFG_UYVY_FORMAT;
-		ctrl |= RCDF_CSC_VIDEO_YUV_TO_RGB;
-		break;
-	case VIDEO_FORMAT_YUYV:
-		vcfg |= RCDF_VCFG_YUYV_FORMAT;
-		ctrl |= RCDF_CSC_VIDEO_YUV_TO_RGB;
-		break;
-	case VIDEO_FORMAT_Y2YU:
-		vcfg |= RCDF_VCFG_Y2YU_FORMAT;
-		ctrl |= RCDF_CSC_VIDEO_YUV_TO_RGB;
-		break;
-	case VIDEO_FORMAT_YVYU:
-		vcfg |= RCDF_VCFG_YVYU_FORMAT;
-		ctrl |= RCDF_CSC_VIDEO_YUV_TO_RGB;
-		break;
-	case VIDEO_FORMAT_Y0Y1Y2Y3:
-		vcfg |= RCDF_VCFG_UYVY_FORMAT;
-		ctrl |= RCDF_CSC_VIDEO_YUV_TO_RGB;
-		vcfg |= RCDF_VCFG_4_2_0_MODE;
-		break;
-	case VIDEO_FORMAT_Y3Y2Y1Y0:
-		vcfg |= RCDF_VCFG_Y2YU_FORMAT;
-		ctrl |= RCDF_CSC_VIDEO_YUV_TO_RGB;
-		vcfg |= RCDF_VCFG_4_2_0_MODE;
-		break;
-	case VIDEO_FORMAT_Y1Y0Y3Y2:
-		vcfg |= RCDF_VCFG_YUYV_FORMAT;
-		ctrl |= RCDF_CSC_VIDEO_YUV_TO_RGB;
-		vcfg |= RCDF_VCFG_4_2_0_MODE;
-		break;
-	case VIDEO_FORMAT_Y1Y2Y3Y0:
-		vcfg |= RCDF_VCFG_YVYU_FORMAT;
-		ctrl |= RCDF_CSC_VIDEO_YUV_TO_RGB;
-		vcfg |= RCDF_VCFG_4_2_0_MODE;
-		break;
-	case VIDEO_FORMAT_RGB:
-		ctrl |= RCDF_VIDEO_INPUT_IS_RGB;
-		vcfg |= RCDF_VCFG_UYVY_FORMAT;
-		break;
-	case VIDEO_FORMAT_P2M_P2L_P1M_P1L:
-		ctrl |= RCDF_VIDEO_INPUT_IS_RGB;
-		vcfg |= RCDF_VCFG_Y2YU_FORMAT;
-		break;
-	case VIDEO_FORMAT_P1M_P1L_P2M_P2L:
-		ctrl |= RCDF_VIDEO_INPUT_IS_RGB;
-		vcfg |= RCDF_VCFG_YUYV_FORMAT;
-		break;
-	case VIDEO_FORMAT_P1M_P2L_P2M_P1L:
-		ctrl |= RCDF_VIDEO_INPUT_IS_RGB;
-		vcfg |= RCDF_VCFG_YVYU_FORMAT;
-		break;
-	default:
-		return GFX_STATUS_BAD_PARAMETER;
-	}
-	WRITE_VID32(RCDF_VIDEO_CONFIG, vcfg);
-	WRITE_VID32(RCDF_VID_ALPHA_CONTROL, ctrl);
-
-	/* SET THE VIDEO FORMAT IN THE DISPLAY CONTROLLER      */
-	/* Use private routine to abstract display controller. */
-
-	gfx_set_display_video_format (format);
-	return(0);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_set_video_size
- *
- * This routine specifies the size of the source data.  It is used only 
- * to determine how much data to transfer per frame, and is not used to 
- * calculate the scaling value (that is handled by a separate routine).
- *-----------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int redcloud_set_video_size(unsigned short width, unsigned short height)
-#else
-int gfx_set_video_size(unsigned short width, unsigned short height)
-#endif
-{
-	unsigned long size, vcfg, vid_420, pitch;
-
-	/* SET THE DISPLAY FILTER VIDEO LINE SIZE                            */
-	/* Match the DC hardware alignment requirement.  The line size must  */
-	/* always be 32-byte aligned.  However, we can manage smaller        */
-	/* alignments by decreasing the pitch and clipping the video window. */
-	/* The VG will fetch extra data for each line, but the decreased     */
-	/* pitch will ensure that it always begins fetching at the start of  */
-	/* the video line.                                                   */
-
-	vcfg = READ_VID32(RCDF_VIDEO_CONFIG);
-
-	vid_420 = vcfg & RCDF_VCFG_4_2_0_MODE;
-
-	vcfg &= ~(RCDF_VCFG_LINE_SIZE_LOWER_MASK | RCDF_VCFG_LINE_SIZE_UPPER);
-
-	size  = ((width >> 1) + 7) & 0xFFF8;
-	pitch = ((width << 1) + 7) & 0xFFF8;
-
-	vcfg |= (size & 0x00FF) << 8;
-	if (size & 0x0100) vcfg |= RCDF_VCFG_LINE_SIZE_UPPER;
-	WRITE_VID32(RCDF_VIDEO_CONFIG, vcfg);
-
-	/* SET VIDEO BUFFER LINE SIZE IN DISPLAY CONTROLLER */
-	/* Use private routine to abstract the display controller. */
-
-	gfx_set_display_video_size (width, height);
-
-	/* SET VIDEO PITCH */
-	/* Set pitch to line width for GX1 legacy.         */
-	/* UV Pitch is 2x line width as GX1 required 4:2:0 */
-	/* data for every line, while Redcloud reads for   */
-	/* every other line.                               */
-	
-	gfx_set_video_yuv_pitch (pitch, pitch << 1);
-
-	/* SET VIDEO OFFSETS */
-	/* Set U and V Offsets to match legacy */
-
-	if (vid_420)
-		gfx_set_video_yuv_offsets (gfx_vid_offset, 
-			gfx_vid_offset + (pitch >> 1),
-			gfx_vid_offset + (pitch >> 1) + (pitch >> 2));
-
-	return(0);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_set_video_offset
- *
- * This routine sets the starting offset for the video buffer when only 
- * one offset needs to be specified.
- *-----------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int redcloud_set_video_offset(unsigned long offset)
-#else
-int gfx_set_video_offset(unsigned long offset)
-#endif
-{
-	/* SAVE VALUE FOR FUTURE CLIPPING OF THE TOP OF THE VIDEO WINDOW */
-
-	gfx_vid_offset = offset;
-
-	/* SET VIDEO BUFFER OFFSET IN DISPLAY CONTROLLER */
-	/* Use private routine to abstract the display controller. */
-
-	gfx_set_display_video_offset(offset);
-	return(0);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_set_video_yuv_offsets
- *
- * This routine sets the starting offset for the video buffer when displaying 
- * 4:2:0 video.
- *-----------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int redcloud_set_video_yuv_offsets(unsigned long yoffset, unsigned long uoffset, unsigned long voffset)
-#else
-int gfx_set_video_yuv_offsets(unsigned long yoffset, unsigned long uoffset, unsigned long voffset)
-#endif
-{
-	/* SAVE VALUE FOR FUTURE CLIPPING OF THE TOP OF THE VIDEO WINDOW */
-
-	gfx_vid_offset  = yoffset;
-	gfx_vid_uoffset = uoffset;
-	gfx_vid_voffset = voffset;
-
-	/* SET VIDEO BUFFER OFFSET IN DISPLAY CONTROLLER */
-	/* Use private routine to abstract the display controller. */
-
-	gfx_set_display_video_yuv_offsets(yoffset, uoffset, voffset);
-
-	return(0);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_set_video_yuv_pitch
- *
- * This routine sets the byte offset between consecutive scanlines of YUV video data
- *-----------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int redcloud_set_video_yuv_pitch(unsigned long ypitch, unsigned long uvpitch)
-#else
-int gfx_set_video_yuv_pitch(unsigned long ypitch, unsigned long uvpitch)
-#endif
-{
-	/* SET VIDEO PITCH IN DISPLAY CONTROLLER */
-	/* Use private routine to abstract the display controller. */
-
-	gfx_set_display_video_yuv_pitch (ypitch, uvpitch);
-
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_video_scale
- * 
- * This routine sets the scale factor for the video overlay window.  The 
- * size of the source and destination regions are specified in pixels.  
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int redcloud_set_video_scale(unsigned short srcw, unsigned short srch, 
-	unsigned short dstw, unsigned short dsth)
-#else
-int gfx_set_video_scale(unsigned short srcw, unsigned short srch, 
-	unsigned short dstw, unsigned short dsth)
-#endif
-{
-	unsigned long xscale, yscale;
-	
-	/* SAVE PARAMETERS (unless don't-care zero destination arguments are used) */
-	/* These are needed for clipping the video window later. */
-
-	if (dstw != 0) {
-		gfx_vid_srcw = srcw;
-		gfx_vid_dstw = dstw;
-	}
-	if (dsth != 0) {
-		gfx_vid_srch = srch;
-		gfx_vid_dsth = dsth;
-	}	
-
-	/* CALCULATE DISPLAY FILTER SCALE FACTORS */
-	/* Zero width and height indicate don't care conditions */
-	/* Downscaling is performed in a separate function.     */
-
-	if (dstw == 0) xscale = READ_VID32(RCDF_VIDEO_SCALE) & 0xffff; /* keep previous if don't-care argument */
-	else if (dstw <= srcw) xscale = 0x2000; /* horizontal downscaling is currently done in a separate function */
-	else if ((srcw == 1) || (dstw == 1)) return GFX_STATUS_BAD_PARAMETER;
-	else xscale = (0x2000l * (srcw - 1l)) / (dstw - 1l);
-
-	if (dsth == 0) yscale = (READ_VID32(RCDF_VIDEO_SCALE) & 0xffff0000) >> 16; /* keep previous if don't-care argument */
-	else if (dsth <= srch) yscale = 0x2000; /* vertical downscaling is handled in a separate function */
-	else if ((srch == 1) || (dsth == 1)) return GFX_STATUS_BAD_PARAMETER;
-	else yscale = (0x2000l * (srch - 1l)) / (dsth - 1l);
-	
-	WRITE_VID32(RCDF_VIDEO_SCALE, (yscale << 16) | xscale);
-
-	/* CALL ROUTINE TO UPDATE WINDOW POSITION */
-	/* This is required because the scale values affect the number of */
-	/* source data pixels that need to be clipped, as well as the     */
-	/* amount of data that needs to be transferred.                   */
-
-	gfx_set_video_window(gfx_vid_xpos, gfx_vid_ypos, gfx_vid_width, gfx_vid_height);
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_video_vertical_downscale
- * 
- * This routine sets the vertical downscale factor for the video overlay window.  
- * The height of the source and destination regions are specified in pixels.  
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int redcloud_set_video_vertical_downscale(unsigned short srch, unsigned short dsth) 
-#else
-int gfx_set_video_vertical_downscale(unsigned short srch, unsigned short dsth)
-#endif
-{
-	/* SET VIDEO SCALE IN DISPLAY CONTROLLER    */
-	/* Use private routine to abstract hardware */
-
-	gfx_set_display_video_downscale (srch, dsth);
-	return 0;
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_video_vertical_downscale_enable
- * 
- * This routine sets the vertical downscale enable for the video overlay window.  
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-void redcloud_set_video_vertical_downscale_enable(int enable) 
-#else
-void gfx_set_video_vertical_downscale_enable(int enable)
-#endif
-{
-	/* SET VIDEO SCALE IN DISPLAY CONTROLLER    */
-	/* Use private routine to abstract hardware */
-
-	gfx_set_display_video_vertical_downscale_enable (enable);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_video_downscale_config
- * 
- * This routine sets the downscale type and factor for the video overlay window.
- * Note: No downscaling support for RGB565 and YUV420 video formats.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int redcloud_set_video_downscale_config(unsigned short type, unsigned short m) 
-#else
-int gfx_set_video_downscale_config(unsigned short type, unsigned short m)
-#endif
-{
-	unsigned long downscale;
-	
-	if ((m < 1) || (m > 16)) return GFX_STATUS_BAD_PARAMETER;
-	
-	downscale = READ_VID32(RCDF_VIDEO_DOWNSCALER_CONTROL);
-	downscale &= ~(RCDF_VIDEO_DOWNSCALE_FACTOR_MASK | RCDF_VIDEO_DOWNSCALE_TYPE_MASK);
-	downscale |= ((unsigned long)(m - 1) << RCDF_VIDEO_DOWNSCALE_FACTOR_POS);
-	switch(type)
-	{
-	case VIDEO_DOWNSCALE_KEEP_1_OF:
-		downscale |= RCDF_VIDEO_DOWNSCALE_TYPE_A;
-		break;
-	case VIDEO_DOWNSCALE_DROP_1_OF:
-		downscale |= RCDF_VIDEO_DOWNSCALE_TYPE_B;
-		break;
-	default:
-		return GFX_STATUS_BAD_PARAMETER;
-	}
-	WRITE_VID32(RCDF_VIDEO_DOWNSCALER_CONTROL, downscale);
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_video_downscale_coefficients
- * 
- * This routine sets the downscale filter coefficients.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int redcloud_set_video_downscale_coefficients(unsigned short coef1, unsigned short coef2,
-											  unsigned short coef3, unsigned short coef4) 
-#else
-int gfx_set_video_downscale_coefficients(unsigned short coef1, unsigned short coef2,
-										 unsigned short coef3, unsigned short coef4) 
-#endif
-{
-	if ((coef1 + coef2 + coef3 + coef4) != 16)
-	    return GFX_STATUS_BAD_PARAMETER;
-
-	WRITE_VID32(RCDF_VIDEO_DOWNSCALER_COEFFICIENTS, 
-    						((unsigned long)coef1 << RCDF_VIDEO_DOWNSCALER_COEF1_POS) |
-							((unsigned long)coef2 << RCDF_VIDEO_DOWNSCALER_COEF2_POS) |
-							((unsigned long)coef3 << RCDF_VIDEO_DOWNSCALER_COEF3_POS) |
-							((unsigned long)coef4 << RCDF_VIDEO_DOWNSCALER_COEF4_POS));
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_video_downscale_enable
- * 
- * This routine enables or disables downscaling for the video overlay window.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int redcloud_set_video_downscale_enable(int enable) 
-#else
-int gfx_set_video_downscale_enable(int enable)
-#endif
-{
-	unsigned long downscale;
-	
-	downscale = READ_VID32(RCDF_VIDEO_DOWNSCALER_CONTROL);
-	if (enable)
-		downscale |= RCDF_VIDEO_DOWNSCALE_ENABLE;
-	else
-		downscale &= ~RCDF_VIDEO_DOWNSCALE_ENABLE;
-	WRITE_VID32(RCDF_VIDEO_DOWNSCALER_CONTROL, downscale);
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_video_window
- * 
- * This routine sets the position and size of the video overlay window.  The 
- * x and y positions are specified in screen relative coordinates, and may be negative.  
- * The size of destination region is specified in pixels.  The line size
- * indicates the number of bytes of source data per scanline.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int redcloud_set_video_window(short x, short y, unsigned short w, unsigned short h)
-#else
-int gfx_set_video_window(short x, short y, unsigned short w, unsigned short h)
-#endif
-{
-	unsigned long hadjust, vadjust;
-	unsigned long xstart, ystart, xend, yend;
-
-	/* SAVE PARAMETERS */
-	/* These are needed to call this routine if the scale value changes. */
-
-	gfx_vid_xpos   = x;
-	gfx_vid_ypos   = y;
-	gfx_vid_width  = w;
-	gfx_vid_height = h;
-
-	/* GET ADJUSTMENT VALUES */
-	/* Use routines to abstract version of display controller. */
-
-	hadjust = gfx_get_htotal() - gfx_get_hsync_end() - 14l;
-	vadjust = gfx_get_vtotal() - gfx_get_vsync_end() + 1l;
-	
-	/* LEFT CLIPPING */
-
-	if (x < 0)
-	{
-		gfx_set_video_left_crop ((unsigned short)(-x));
-		xstart = hadjust;
-	}
-	else
-	{
-		gfx_set_video_left_crop (0);
-		xstart = (unsigned long)x + hadjust;
-	}
-
-	/* HORIZONTAL END */
-	/* End positions in register are non-inclusive (one more than the actual end) */
-	
-	if ((x + w) < gfx_get_hactive())
-		xend = (unsigned long)x + (unsigned long)w + hadjust;
-
-	/* RIGHT-CLIPPING */
-	else                                       
-		xend = (unsigned long)gfx_get_hactive() + hadjust;
-
-	/* VERTICAL START */
-	
-	ystart = (unsigned long)y + vadjust;
-	
-	/* VERTICAL END */
-	
-	if ((y + h) < gfx_get_vactive())
-		yend = (unsigned long)y + (unsigned long)h + vadjust;
-
-	/* BOTTOM-CLIPPING */
-	else                                        
-		yend = (unsigned long)gfx_get_vactive() + vadjust;
-
-	/* SET VIDEO POSITION */
-
-	WRITE_VID32(RCDF_VIDEO_X_POS, (xend << 16) | xstart);
-	WRITE_VID32(RCDF_VIDEO_Y_POS, (yend << 16) | ystart);
-
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_video_left_crop
- * 
- * This routine sets the number of pixels which will be cropped from the
- * beginning of each video line. The video window will begin to display only
- * from the pixel following the cropped pixels, and the cropped pixels
- * will be ignored.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int redcloud_set_video_left_crop(unsigned short x)
-#else
-int gfx_set_video_left_crop(unsigned short x)
-#endif
-{
-	unsigned long vcfg, initread;
-
-	/* CLIPPING ON LEFT */
-	/* Adjust initial read for scale, checking for divide by zero */
-
-	if (gfx_vid_dstw) 
-		initread = (unsigned long)x * gfx_vid_srcw / gfx_vid_dstw;
-	else initread = 0;
-	
-	/* SET INITIAL READ ADDRESS */
-
-	vcfg = READ_VID32(RCDF_VIDEO_CONFIG);
-	vcfg &= ~RCDF_VCFG_INIT_READ_MASK;
-	vcfg |= (initread << 15) & RCDF_VCFG_INIT_READ_MASK;
-	WRITE_VID32(RCDF_VIDEO_CONFIG, vcfg);
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_video_color_key
- * 
- * This routine specifies the color key value and mask for the video overlay
- * hardware. To disable color key, the color and mask should both be set to 
- * zero. The hardware uses the color key in the following equation:
- *
- * ((source data) & (color key mask)) == ((color key) & (color key mask))
- *
- * If "graphics" is set to TRUE, the source data is graphics, and color key
- * is an RGB value. If "graphics" is set to FALSE, the source data is the video,
- * and color key is a YUV value.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int redcloud_set_video_color_key(unsigned long key, unsigned long mask, 
-	int graphics)
-#else
-int gfx_set_video_color_key(unsigned long key, unsigned long mask, 
-	int graphics)
-#endif
-{
-	unsigned long dcfg = 0;
-
-	/* SET RCDF COLOR KEY VALUE */
-
-	WRITE_VID32(RCDF_VIDEO_COLOR_KEY, key);
-	WRITE_VID32(RCDF_VIDEO_COLOR_MASK, mask);
-
-	/* SELECT GRAPHICS OR VIDEO DATA TO COMPARE TO THE COLOR KEY */
-
-	dcfg = READ_VID32(RCDF_DISPLAY_CONFIG);
-	if (graphics & 0x01) dcfg &= ~RCDF_DCFG_VG_CK;
-	else dcfg |= RCDF_DCFG_VG_CK;
-	WRITE_VID32(RCDF_DISPLAY_CONFIG, dcfg);
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_video_filter
- * 
- * This routine enables or disables the video overlay filters.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int redcloud_set_video_filter(int xfilter, int yfilter)
-#else
-int gfx_set_video_filter(int xfilter, int yfilter)
-#endif
-{
-	unsigned long vcfg = 0;
-
-	/* ENABLE OR DISABLE DISPLAY FILTER VIDEO OVERLAY FILTERS */
-
-	vcfg = READ_VID32(RCDF_VIDEO_CONFIG);
-	vcfg &= ~(RCDF_VCFG_X_FILTER_EN | RCDF_VCFG_Y_FILTER_EN);
-	if (xfilter) vcfg |= RCDF_VCFG_X_FILTER_EN;
-	if (yfilter) vcfg |= RCDF_VCFG_Y_FILTER_EN;
-	WRITE_VID32(RCDF_VIDEO_CONFIG, vcfg);
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_video_palette
- * 
- * This routine loads the video hardware palette.  If a NULL pointer is 
- * specified, the palette is bypassed (for Redcloud, this means loading the 
- * palette with identity values). 
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int redcloud_set_video_palette(unsigned long *palette)
-#else
-int gfx_set_video_palette(unsigned long *palette)
-#endif
-{
-	unsigned long i, entry;
-
-	/* LOAD REDCLOUD VIDEO PALETTE */
-
-	WRITE_VID32(RCDF_PALETTE_ADDRESS, 0);
-	for (i = 0; i < 256; i++)
-	{
-		if (palette) entry = palette[i];
-		else entry = i | (i << 8) | (i << 16);
-		WRITE_VID32(RCDF_PALETTE_DATA, entry);
-	}
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_video_palette_entry
- * 
- * This routine loads a single entry of the video hardware palette.  
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int redcloud_set_video_palette_entry(unsigned long index, unsigned long palette)
-#else
-int gfx_set_video_palette_entry(unsigned long index, unsigned long palette)
-#endif
-{
-	if (index > 0xFF)
-		return GFX_STATUS_BAD_PARAMETER;
-
-	/* SET A SINGLE ENTRY */
-
-	WRITE_VID32(RCDF_PALETTE_ADDRESS, index);
-	WRITE_VID32(RCDF_PALETTE_DATA, palette);
-	
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_video_request()
- * 
- * This routine sets the horizontal (pixel) and vertical (line) video request
- * values.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int redcloud_set_video_request(short x, short y)
-#else
-int gfx_set_video_request(short x, short y)
-#endif
-{
-	/* SET DISPLAY FILTER VIDEO REQUEST */
-	
-	x += gfx_get_htotal() - gfx_get_hsync_end() - 2;
-	y += gfx_get_vtotal() - gfx_get_vsync_end() + 1;
-	
-	if ((x < 0) || (x > RCDF_VIDEO_REQUEST_MASK) ||
-		(y < 0) || (y > RCDF_VIDEO_REQUEST_MASK))
-		return GFX_STATUS_BAD_PARAMETER;
-	
-	WRITE_VID32(RCDF_VIDEO_REQUEST, ((unsigned long)x << RCDF_VIDEO_X_REQUEST_POS) |
-									((unsigned long)y << RCDF_VIDEO_Y_REQUEST_POS));
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_video_cursor()
- * 
- * This routine configures the video hardware cursor.
- * If the "mask"ed bits in the graphics pixel match "key", then either "color1"
- * or "color2" will be used for this pixel, according to the value of bit
- * number "select_color2" of the graphics pixel.
- *
- * key - 24 bit RGB value
- * mask - 24 bit mask
- * color1, color2 - RGB or YUV, depending on the current color space conversion
- * select_color2 - value between 0 to 23
- *
- * To disable match, a "mask" and "key" value of 0xffffff should be set,
- * because the graphics pixels incoming to the video processor have maximum 16
- * bits set (0xF8FCF8).
- *
- * This feature is useful for disabling alpha blending of the cursor.
- * Otherwise cursor image would be blurred (or completely invisible if video
- * alpha is maximum value).
- * Note: the cursor pixel replacements take place both inside and outside the
- * video overlay window.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int redcloud_set_video_cursor(unsigned long key, unsigned long mask, unsigned short select_color2,
-							  unsigned long color1, unsigned long color2)
-#else
-int gfx_set_video_cursor(unsigned long key, unsigned long mask, unsigned short select_color2,
-						 unsigned long color1, unsigned long color2)
-#endif
-{
-	if (select_color2 > RCDF_CURSOR_COLOR_BITS) return GFX_STATUS_BAD_PARAMETER;
-	key = (key & RCDF_COLOR_MASK) | ((unsigned long)select_color2 << RCDF_CURSOR_COLOR_KEY_OFFSET_POS);
-	WRITE_VID32(RCDF_CURSOR_COLOR_KEY, key);
-	WRITE_VID32(RCDF_CURSOR_COLOR_MASK, mask);
-	WRITE_VID32(RCDF_CURSOR_COLOR_1, color1);
-	WRITE_VID32(RCDF_CURSOR_COLOR_2, color2);
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_video_cursor()
- * 
- * This routine configures the video hardware cursor.
- * If the "mask"ed bits in the graphics pixel match "key", then either "color1"
- * or "color2" will be used for this pixel, according to the value of bit
- * number "select_color2" of the graphics pixel.
- *
- * key - 24 bit RGB value
- * mask - 24 bit mask
- * color1, color2 - RGB or YUV, depending on the current color space conversion
- * select_color2 - value between 0 to 23
- *
- * To disable match, a "mask" and "key" value of 0xffffff should be set,
- * because the graphics pixels incoming to the video processor have maximum 16
- * bits set (0xF8FCF8).
- *
- * This feature is useful for disabling alpha blending of the cursor.
- * Otherwise cursor image would be blurred (or completely invisible if video
- * alpha is maximum value).
- * Note: the cursor pixel replacements take place both inside and outside the
- * video overlay window.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int redcloud_set_video_cursor_enable (int enable)
-#else
-int gfx_set_video_cursor_enable (int enable)
-#endif
-{
-	unsigned long temp = READ_VID32 (RCDF_CURSOR_COLOR_KEY);
-
-	if (enable) temp |=  RCDF_CURSOR_COLOR_KEY_ENABLE;
-	else        temp &= ~RCDF_CURSOR_COLOR_KEY_ENABLE;
-
-	WRITE_VID32 (RCDF_CURSOR_COLOR_KEY, temp);
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_alpha_enable
- * 
- * This routine enables or disables the currently selected alpha region.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int redcloud_set_alpha_enable(int enable)
-#else
-int gfx_set_alpha_enable(int enable)
-#endif
-{
-	unsigned long address = 0, value = 0;
-	if (gfx_alpha_select > 2) return(GFX_STATUS_UNSUPPORTED);
-	address = RCDF_ALPHA_CONTROL_1 + ((unsigned long)gfx_alpha_select << 5);
-	value = READ_VID32(address);
-	if (enable) value |= RCDF_ACTRL_WIN_ENABLE;
-	else value &= ~(RCDF_ACTRL_WIN_ENABLE);
-	WRITE_VID32(address, value);
-	return(GFX_STATUS_OK);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_alpha_window
- * 
- * This routine sets the size of the currently selected alpha region.
- * Note: "x" and "y" are signed to enable using negative values needed for
- * implementing workarounds of hardware issues.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int redcloud_set_alpha_window(short x, short y, 
-	unsigned short width, unsigned short height)
-#else
-int gfx_set_alpha_window(short x, short y, 
-	unsigned short width, unsigned short height)
-#endif
-{
-	unsigned long address = 0;
-
-	/* CHECK FOR CLIPPING */
-	
-	if ((x + width) > gfx_get_hactive()) width = gfx_get_hactive() - x;
-	if ((y + height) > gfx_get_vactive()) height = gfx_get_vactive() - y;
-	
-	/* ADJUST POSITIONS */
-
-	x += gfx_get_htotal() - gfx_get_hsync_end() - 2;
-	y += gfx_get_vtotal() - gfx_get_vsync_end() + 1;
-	
-	if (gfx_alpha_select > 2) return(GFX_STATUS_UNSUPPORTED);
-	address = RCDF_ALPHA_XPOS_1 + ((unsigned long)gfx_alpha_select << 5);
-	
-	/* END POSITIONS IN REGISTERS ARE NON-INCLUSIVE (ONE MORE THAN ACTUAL END) */
-
-	WRITE_VID32(address, (unsigned long) x | 
-		((unsigned long) (x + width) << 16));
-	WRITE_VID32(address + 8, (unsigned long) y | 
-		((unsigned long) (y + height) << 16));
-	return(GFX_STATUS_OK);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_alpha_value
- * 
- * This routine sets the alpha value for the currently selected alpha
- * region.  It also specifies an increment/decrement value for fading.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int redcloud_set_alpha_value(unsigned char alpha, char delta)
-#else
-int gfx_set_alpha_value(unsigned char alpha, char delta)
-#endif
-{
-	unsigned long address = 0, value = 0;
-	if (gfx_alpha_select > 2) return(GFX_STATUS_UNSUPPORTED);
-	address = RCDF_ALPHA_CONTROL_1 + ((unsigned long)gfx_alpha_select << 5);
-	value = READ_VID32(address);
-	value &= RCDF_ACTRL_WIN_ENABLE; /* keep only enable bit */
-	value |= (unsigned long) alpha;
-	value |= (((unsigned long) delta) & 0xff) << 8;
-	value |= RCDF_ACTRL_LOAD_ALPHA;
-	WRITE_VID32(address, value);
-	return(GFX_STATUS_OK);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_alpha_priority
- * 
- * This routine sets the priority of the currently selected alpha region.
- * A higher value indicates a higher priority.
- * Note: Priority of enabled alpha windows must be different.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int redcloud_set_alpha_priority(int priority)
-#else
-int gfx_set_alpha_priority(int priority)
-#endif
-{
-	unsigned long pos = 0, value = 0;
-	if (priority > 3) return(GFX_STATUS_BAD_PARAMETER);
-	if (gfx_alpha_select > 2) return(GFX_STATUS_UNSUPPORTED);
-	value = READ_VID32(RCDF_VID_ALPHA_CONTROL);
-	pos = 16 + (gfx_alpha_select << 1);
-	value &= ~(0x03l << pos);
-	value |= (unsigned long)priority << pos;
-	WRITE_VID32(RCDF_VID_ALPHA_CONTROL, value);
-	return(GFX_STATUS_OK);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_alpha_color
- * 
- * This routine sets the color to be displayed inside the currently selected
- * alpha window when there is a color key match (when the alpha color
- * mechanism is enabled).
- * "color" is an RGB value (for RGB blending) or a YUV value (for YUV blending).
- * In Interlaced YUV blending mode, Y/2 value should be used.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int redcloud_set_alpha_color(unsigned long color)
-#else
-int gfx_set_alpha_color(unsigned long color)
-#endif
-{
-	unsigned long address = 0;
-	if (gfx_alpha_select > 2) return(GFX_STATUS_UNSUPPORTED);
-	address = RCDF_ALPHA_COLOR_1 + ((unsigned long)gfx_alpha_select << 5);
-	WRITE_VID32(address, color);
-	return(GFX_STATUS_OK);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_alpha_color_enable
- * 
- * Enable or disable the color mechanism in the alpha window.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int redcloud_set_alpha_color_enable(int enable)
-#else
-int gfx_set_alpha_color_enable(int enable)
-#endif
-{
-	unsigned long color;
-	unsigned long address = 0;
-	
-	if (gfx_alpha_select > 2) return(GFX_STATUS_UNSUPPORTED);
-	address = RCDF_ALPHA_COLOR_1 + ((unsigned long)gfx_alpha_select << 5);
-	color = READ_VID32(address);
-	if (enable)
-		color |= RCDF_ALPHA_COLOR_ENABLE;
-	else
-		color &= ~RCDF_ALPHA_COLOR_ENABLE;
-	WRITE_VID32(address, color);
-	return(GFX_STATUS_OK);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_set_no_ck_outside_alpha
- * 
- * This function affects where inside the video window color key or chroma
- * key comparison is done:
- * If enable is TRUE, color/chroma key comparison is performed only inside
- * the enabled alpha windows. Outside the (enabled) alpha windows, only video
- * is displayed if color key is used, and only graphics is displayed if chroma
- * key is used.
- * If enable is FALSE, color/chroma key comparison is performed in all the
- * video window area.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int redcloud_set_no_ck_outside_alpha(int enable)
-#else
-int gfx_set_no_ck_outside_alpha(int enable)
-#endif
-{
-	unsigned long value;
-	value = READ_VID32(RCDF_VID_ALPHA_CONTROL);
-	if (enable)
-		WRITE_VID32(RCDF_VID_ALPHA_CONTROL, value | RCDF_NO_CK_OUTSIDE_ALPHA);
-	else		
-		WRITE_VID32(RCDF_VID_ALPHA_CONTROL, value & ~RCDF_NO_CK_OUTSIDE_ALPHA);
-	return(0);		
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_clock_frequency
- *
- * This routine returns the current clock frequency in 16.16 format.
- * It reads the current register value and finds the match in the table.
- * If no match is found, this routine returns 0.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-unsigned long redcloud_get_clock_frequency(void)
-#else
-unsigned long gfx_get_clock_frequency(void)
-#endif
-{
-	Q_WORD msr_value;
-	RCDFPLLENTRY *PLLTable;
-	int index;
-	unsigned long value, mask = 0x00001FFF;
-	unsigned long post_div3 = 0, pre_mult2 = 0;
-
-	/* READ PLL SETTING */
-
-	gfx_msr_read (RC_ID_MCP, MCP_DOTPLL, &msr_value);
-	value = msr_value.high & mask;
-	
-	/* READ DIVISOR SETTINGS */
-
-	if ((gfx_cpu_version & 0xFF00) == 0x200)
-	{
-		PLLTable = RCDF_PLLtable48MHz;
-
-		gfx_msr_read (RC_ID_MCP, MCP_SYS_RSTPLL, &msr_value);
-		post_div3 = (msr_value.low & MCP_DOTPOSTDIV3) ? 1 : 0;
-		pre_mult2 = (msr_value.low & MCP_DOTPREMULT2) ? 1 : 0;
-	}	
-	else
-		PLLTable = RCDF_PLLtable14MHz;
-	
-	/* SEARCH FOR A MATCH */
-
-	for (index = 0; index < NUM_RCDF_FREQUENCIES; index++)
-	{
-		if ((PLLTable[index].pll_value & mask) == value &&
-			post_div3 == PLLTable[index].post_div3 &&
-			pre_mult2 == PLLTable[index].pre_mul2)
-			return(PLLTable[index].frequency);
-	}
-	return(0);
-}
-
-/*************************************************************/
-/*  READ ROUTINES  |  INCLUDED FOR DIAGNOSTIC PURPOSES ONLY  */
-/*************************************************************/
-
-#if GFX_READ_ROUTINES
-
-/*---------------------------------------------------------------------------
- * gfx_get_sync_polarities
- *
- * This routine returns the polarities of the sync pulses:
- *     Bit 0: Set if negative horizontal polarity.
- *     Bit 1: Set if negative vertical polarity.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int redcloud_get_sync_polarities(void)
-#else
-int gfx_get_sync_polarities(void)
-#endif
-{
-	int polarities = 0;
-	if (READ_VID32(RCDF_DISPLAY_CONFIG) & RCDF_DCFG_CRT_HSYNC_POL) polarities |= 1;
-	if (READ_VID32(RCDF_DISPLAY_CONFIG) & RCDF_DCFG_CRT_VSYNC_POL) polarities |= 2;
-	return(polarities);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_video_palette_entry
- *
- * This routine returns a single palette entry.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int redcloud_get_video_palette_entry(unsigned long index, unsigned long *palette)
-#else
-int gfx_get_video_palette_entry(unsigned long index, unsigned long *palette)
-#endif
-{
-	if (index > 0xFF)
-		return GFX_STATUS_BAD_PARAMETER;
-
-	/* READ A SINGLE ENTRY */
-
-	WRITE_VID32 (RCDF_PALETTE_ADDRESS, index);
-	*palette = READ_VID32 (RCDF_PALETTE_DATA);
-
-	return (GFX_STATUS_OK);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_get_video_enable
- *
- * This routine returns the value "one" if video overlay is currently enabled,
- * otherwise it returns the value "zero".
- *-----------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int redcloud_get_video_enable(void)
-#else
-int gfx_get_video_enable(void)
-#endif
-{
-	if (READ_VID32(RCDF_VIDEO_CONFIG) & RCDF_VCFG_VID_EN) return(1);
-	return(0);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_get_video_format
- *
- * This routine returns the current video overlay format.
- *-----------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int redcloud_get_video_format(void)
-#else
-int gfx_get_video_format(void)
-#endif
-{
-	unsigned long ctrl, vcfg;
-
-	ctrl = READ_VID32(RCDF_VID_ALPHA_CONTROL);
-	vcfg = READ_VID32(RCDF_VIDEO_CONFIG);
-
-	if (ctrl & RCDF_VIDEO_INPUT_IS_RGB)
-	{
-		switch (vcfg & RCDF_VCFG_VID_INP_FORMAT)
-		{
-			case RCDF_VCFG_UYVY_FORMAT: return VIDEO_FORMAT_RGB;
-			case RCDF_VCFG_Y2YU_FORMAT: return VIDEO_FORMAT_P2M_P2L_P1M_P1L;
-			case RCDF_VCFG_YUYV_FORMAT: return VIDEO_FORMAT_P1M_P1L_P2M_P2L;
-			case RCDF_VCFG_YVYU_FORMAT: return VIDEO_FORMAT_P1M_P2L_P2M_P1L;
-		}
-	}
-
-	if (vcfg & RCDF_VCFG_4_2_0_MODE)
-	{
-		switch (vcfg & RCDF_VCFG_VID_INP_FORMAT)
-		{
-			case RCDF_VCFG_UYVY_FORMAT: return VIDEO_FORMAT_Y0Y1Y2Y3;
-			case RCDF_VCFG_Y2YU_FORMAT: return VIDEO_FORMAT_Y3Y2Y1Y0;
-			case RCDF_VCFG_YUYV_FORMAT: return VIDEO_FORMAT_Y1Y0Y3Y2;
-			case RCDF_VCFG_YVYU_FORMAT: return VIDEO_FORMAT_Y1Y2Y3Y0;
-		}
-	}
-	else
-	{
-		switch (vcfg & RCDF_VCFG_VID_INP_FORMAT)
-		{
-			case RCDF_VCFG_UYVY_FORMAT: return VIDEO_FORMAT_UYVY;
-			case RCDF_VCFG_Y2YU_FORMAT: return VIDEO_FORMAT_Y2YU;
-			case RCDF_VCFG_YUYV_FORMAT: return VIDEO_FORMAT_YUYV;
-			case RCDF_VCFG_YVYU_FORMAT: return VIDEO_FORMAT_YVYU;
-		}
-	}
-	return (GFX_STATUS_ERROR);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_get_video_src_size
- *
- * This routine returns the size of the source video overlay buffer.  The 
- * return value is (height << 16) | width.
- *-----------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-unsigned long redcloud_get_video_src_size(void)
-#else
-unsigned long gfx_get_video_src_size(void)
-#endif
-{
-	unsigned long width, height, scale, delta;
-	int down_enable;
-
-	/* DETERMINE SOURCE WIDTH FROM THE DISPLAY FILTER VIDEO LINE SIZE */
-
-	width = (READ_VID32(RCDF_VIDEO_CONFIG) >> 7) & 0x000001FE;
-	if (READ_VID32(RCDF_VIDEO_CONFIG) & RCDF_VCFG_LINE_SIZE_UPPER)
-		width += 512l;
-
-	/* DETERMINE SOURCE HEIGHT FROM THE DISPLAY FILTER HEIGHT AND SCALE VALUES     */
-	/* There is no true "source buffer size" in Redcloud.  Instead, the VG module  */
-	/* provides video data as needed on a per-line basis.  The source buffer size  */
-	/* is always assumed to equal the amount of required video data.  The returned */
-	/* height is equal to the height of the required video buffer data (before all */
-	/* scaling.)                                                                   */
-
-	scale  = (READ_VID32 (RCDF_VIDEO_SCALE) >> 16) & 0x3FFF;
-	height = ((READ_VID32 (RCDF_VIDEO_Y_POS) >> 16) & 0x7FF) - 
-			  (READ_VID32 (RCDF_VIDEO_Y_POS) & 0x7FF);
-	delta  = gfx_get_video_downscale_delta();
-	down_enable = gfx_get_video_vertical_downscale_enable();
-	
-	/* REVERSE UPSCALING */
-
-	if (height)
-		height = ((scale * (height - 1l)) / 0x2000l) + 2l;
-	
-	/* REVERSE DOWNSCALING */
-	/* Original lines = height * (0x3FFF + delta) / 0x3FFF */
-	/* As this may cause rounding errors, we add 1 to the  */
-	/* returned source size.  The return value of this     */
-	/* function could thus be off by 1.                    */
-	
-	if (down_enable && height)
-		height = ((height * (0x3FFFl + delta)) / 0x3FFFl) + 1;
-
-	return((height << 16) | width);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_get_video_line_size
- *
- * This routine returns the line size of the source video overlay buffer, in
- * pixels.
- *-----------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-unsigned long redcloud_get_video_line_size(void)
-#else
-unsigned long gfx_get_video_line_size(void)
-#endif
-{
-	unsigned long width = 0;
-
-	/* DETERMINE SOURCE WIDTH FROM THE RCDF VIDEO LINE SIZE */
-
-	width = (READ_VID32(RCDF_VIDEO_CONFIG) >> 7) & 0x000001FE;
-	if (READ_VID32(RCDF_VIDEO_CONFIG) & RCDF_VCFG_LINE_SIZE_UPPER)
-		width += 512l;
-	return(width);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_get_video_xclip
- *
- * This routine returns the number of bytes clipped on the left side of a
- * video overlay line (skipped at beginning).
- *-----------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-unsigned long redcloud_get_video_xclip(void)
-#else
-unsigned long gfx_get_video_xclip(void)
-#endif
-{
-	unsigned long clip = 0;
-
-	/* DETERMINE SOURCE WIDTH FROM THE RCDF VIDEO LINE SIZE */
-
-	clip = (READ_VID32(RCDF_VIDEO_CONFIG) >> 14) & 0x000007FC;
-	return(clip);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_get_video_offset
- *
- * This routine returns the current offset for the video overlay buffer.
- *-----------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-unsigned long redcloud_get_video_offset(void)
-#else
-unsigned long gfx_get_video_offset(void)
-#endif
-{
-	return(gfx_get_display_video_offset());
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_get_video_yuv_offsets
- *
- * This routine returns the current offsets for the video overlay buffer when in 4:2:0.
- *-----------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-void redcloud_get_video_yuv_offsets(unsigned long *yoffset, unsigned long *uoffset,
-									unsigned long *voffset)
-#else
-void gfx_get_video_yuv_offsets(unsigned long *yoffset, unsigned long *uoffset,
-							   unsigned long *voffset)
-#endif
-{
-	gfx_get_display_video_yuv_offsets(yoffset, uoffset, voffset);
-}
-
-/*-----------------------------------------------------------------------------
- * gfx_get_video_yuv_pitch
- *
- * This routine returns the current pitch values for the video overlay buffer.
- *-----------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-void redcloud_get_video_yuv_pitch(unsigned long *ypitch, unsigned long *uvpitch)
-#else
-void gfx_get_video_yuv_pitch(unsigned long *ypitch, unsigned long *uvpitch)
-#endif
-{
-	gfx_get_display_video_yuv_pitch(ypitch, uvpitch);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_video_scale
- * 
- * This routine returns the scale factor for the video overlay window.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-unsigned long redcloud_get_video_scale(void)
-#else
-unsigned long gfx_get_video_scale(void)
-#endif
-{
-	return(READ_VID32(RCDF_VIDEO_SCALE));
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_video_downscale_delta
- * 
- * This routine returns the vertical downscale factor for the video overlay window.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-unsigned long redcloud_get_video_downscale_delta(void)
-#else
-unsigned long gfx_get_video_downscale_delta(void)
-#endif
-{
-	/* USE PRIVATE ROUTINE TO ABSTRACT THE DIPSLAY CONTROLLER */
-
-	return (gfx_get_display_video_downscale_delta());
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_video_vertical_downscale_enable
- * 
- * This routine returns the vertical downscale enable for the video overlay window.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int redcloud_get_video_vertical_downscale_enable(void)
-#else
-int gfx_get_video_vertical_downscale_enable(void)
-#endif
-{
-	/* USE PRIVATE ROUTINE TO ABSTRACT THE DIPSLAY CONTROLLER */
-
-	return (gfx_get_display_video_downscale_enable ());
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_video_downscale_config
- * 
- * This routine returns the current type and value of video downscaling.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int redcloud_get_video_downscale_config(unsigned short *type, unsigned short *m)
-#else
-int gfx_get_video_downscale_config(unsigned short *type, unsigned short *m)
-#endif
-{
-	unsigned long downscale;
-	
-	downscale = READ_VID32(RCDF_VIDEO_DOWNSCALER_CONTROL);
-	*m = (unsigned short)((downscale & RCDF_VIDEO_DOWNSCALE_FACTOR_MASK) >> RCDF_VIDEO_DOWNSCALE_FACTOR_POS) + 1;
-
-	switch(downscale & RCDF_VIDEO_DOWNSCALE_TYPE_MASK)
-	{
-	case RCDF_VIDEO_DOWNSCALE_TYPE_A:
-		*type = VIDEO_DOWNSCALE_KEEP_1_OF;
-		break;
-	case RCDF_VIDEO_DOWNSCALE_TYPE_B:
-		*type = VIDEO_DOWNSCALE_DROP_1_OF;
-		break;
-	default:
-		return GFX_STATUS_ERROR;
-		break;		
-	}
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_video_downscale_coefficients
- * 
- * This routine returns the current video downscaling coefficients.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-void redcloud_get_video_downscale_coefficients(unsigned short *coef1, unsigned short *coef2,
-											 unsigned short *coef3, unsigned short *coef4)
-#else
-void gfx_get_video_downscale_coefficients(unsigned short *coef1, unsigned short *coef2,
-										  unsigned short *coef3, unsigned short *coef4)
-#endif
-{
-	unsigned long coef;
-	
-	coef = READ_VID32(RCDF_VIDEO_DOWNSCALER_COEFFICIENTS);
-	*coef1 = (unsigned short)((coef >> RCDF_VIDEO_DOWNSCALER_COEF1_POS) & RCDF_VIDEO_DOWNSCALER_COEF_MASK);
-	*coef2 = (unsigned short)((coef >> RCDF_VIDEO_DOWNSCALER_COEF2_POS) & RCDF_VIDEO_DOWNSCALER_COEF_MASK);
-	*coef3 = (unsigned short)((coef >> RCDF_VIDEO_DOWNSCALER_COEF3_POS) & RCDF_VIDEO_DOWNSCALER_COEF_MASK);
-	*coef4 = (unsigned short)((coef >> RCDF_VIDEO_DOWNSCALER_COEF4_POS) & RCDF_VIDEO_DOWNSCALER_COEF_MASK);
-	return;				
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_video_downscale_enable
- * 
- * This routine returns 1 if video downscaling is currently enabled,
- * or 0 if it is currently disabled.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-void redcloud_get_video_downscale_enable(int *enable)
-#else
-void gfx_get_video_downscale_enable(int *enable)
-#endif
-{
-	if (READ_VID32(RCDF_VIDEO_DOWNSCALER_CONTROL) & RCDF_VIDEO_DOWNSCALE_ENABLE)
-		*enable = 1;
-	else
-		*enable = 0;
-	return;				
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_video_dst_size
- * 
- * This routine returns the size of the displayed video overlay window.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-unsigned long redcloud_get_video_dst_size(void)
-#else
-unsigned long gfx_get_video_dst_size(void)
-#endif
-{
-	unsigned long xsize, ysize;
-
-	xsize = READ_VID32(RCDF_VIDEO_X_POS);
-	xsize = ((xsize >> 16) & 0x7FF) - (xsize & 0x7FF);
-	ysize = READ_VID32(RCDF_VIDEO_Y_POS);
-	ysize = ((ysize >> 16) & 0x7FF) - (ysize & 0x7FF);
-	return((ysize << 16) | xsize);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_video_position
- * 
- * This routine returns the position of the video overlay window.  The
- * return value is (ypos << 16) | xpos.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-unsigned long redcloud_get_video_position(void)
-#else
-unsigned long gfx_get_video_position(void)
-#endif
-{
-	unsigned long hadjust, vadjust;
-	unsigned long xpos, ypos;
-
-	/* READ HARDWARE POSITION */
-
-	xpos = READ_VID32(RCDF_VIDEO_X_POS) & 0x000007FF;
-	ypos = READ_VID32(RCDF_VIDEO_Y_POS) & 0x000007FF;
-	
-	/* GET ADJUSTMENT VALUES */
-	/* Use routines to abstract version of display controller. */
-
-	hadjust = (unsigned long)gfx_get_htotal() - (unsigned long)gfx_get_hsync_end() - 14l;
-	vadjust = (unsigned long)gfx_get_vtotal() - (unsigned long)gfx_get_vsync_end() + 1l;
-	xpos -= hadjust;
-	ypos -= vadjust;
-	return((ypos << 16) | (xpos & 0x0000FFFF));
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_video_color_key
- * 
- * This routine returns the current video color key value.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-unsigned long redcloud_get_video_color_key(void)
-#else
-unsigned long gfx_get_video_color_key(void)
-#endif
-{
-	return(READ_VID32(RCDF_VIDEO_COLOR_KEY));
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_video_color_key_mask
- * 
- * This routine returns the current video color mask value.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-unsigned long redcloud_get_video_color_key_mask(void)
-#else
-unsigned long gfx_get_video_color_key_mask(void)
-#endif
-{
-	return(READ_VID32(RCDF_VIDEO_COLOR_MASK));
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_video_color_key_src
- * 
- * This routine returns 0 for video data compare, 1 for graphics data.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int redcloud_get_video_color_key_src(void)
-#else
-int gfx_get_video_color_key_src(void)
-#endif
-{
-	if (READ_VID32(RCDF_DISPLAY_CONFIG) & RCDF_DCFG_VG_CK) return(0);
-	return(1);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_video_filter
- * 
- * This routine returns if the filters are currently enabled.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int redcloud_get_video_filter(void)
-#else
-int gfx_get_video_filter(void)
-#endif
-{
-	int retval = 0;
-	if (READ_VID32(RCDF_VIDEO_CONFIG) & RCDF_VCFG_X_FILTER_EN) 
-		retval |= 1;
-	if (READ_VID32(RCDF_VIDEO_CONFIG) & RCDF_VCFG_Y_FILTER_EN) 
-		retval |= 2;
-	return(retval);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_video_request
- * 
- * This routine returns the horizontal (pixel) and vertical (lines) video
- * request values.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int redcloud_get_video_request(short *x, short *y)
-#else
-int gfx_get_video_request(short *x, short *y)
-#endif
-{
-	unsigned long request = 0;
-	request = (READ_VID32(RCDF_VIDEO_REQUEST));
-	*x = (short)((request >> RCDF_VIDEO_X_REQUEST_POS) & RCDF_VIDEO_REQUEST_MASK);
-	*y = (short)((request >> RCDF_VIDEO_Y_REQUEST_POS) & RCDF_VIDEO_REQUEST_MASK);
-	
-	*x -= gfx_get_htotal() - gfx_get_hsync_end() - 2;
-	*y -= gfx_get_vtotal() - gfx_get_vsync_end() + 1;
-
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_video_cursor()
- * 
- * This routine configures the video hardware cursor.
- * If the "mask"ed bits in the graphics pixel match "key", then either "color1"
- * or "color2" will be used for this pixel, according to the value of the bit
- * in offset "select_color2".
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-int redcloud_get_video_cursor(unsigned long *key, unsigned long *mask, unsigned short *select_color2,
-							unsigned long *color1, unsigned short *color2)
-#else
-int gfx_get_video_cursor(unsigned long *key, unsigned long *mask, unsigned short *select_color2,
-							unsigned long *color1, unsigned short *color2)
-#endif
-{
-	*select_color2 = (unsigned short)(READ_VID32(RCDF_CURSOR_COLOR_KEY) >> RCDF_CURSOR_COLOR_KEY_OFFSET_POS);
-	*key = READ_VID32(RCDF_CURSOR_COLOR_KEY) & RCDF_COLOR_MASK;
-	*mask = READ_VID32(RCDF_CURSOR_COLOR_MASK) & RCDF_COLOR_MASK;
-	*color1 = READ_VID32(RCDF_CURSOR_COLOR_1) & RCDF_COLOR_MASK;
-	*color2 = (unsigned short)(READ_VID32(RCDF_CURSOR_COLOR_2) & RCDF_COLOR_MASK);
-	return(0);
-}
-
-/*---------------------------------------------------------------------------
- * gfx_read_crc
- *
- * This routine returns the hardware CRC value, which is used for automated 
- * testing.  The value is like a checksum, but will change if pixels move
- * locations.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-unsigned long redcloud_read_crc(void)
-#else
-unsigned long gfx_read_crc(void)
-#endif
-{
-	Q_WORD msr_value;
-	unsigned long crc = 0xFFFFFFFF;
-
-	/* DISABLE 32-BIT CRCS */
-	/* For GX1.x, this is a reserved bit, and is assumed to be a benign access */
-
-	gfx_msr_read  (RC_ID_DF, RCDF_MBD_MSR_DIAG_DF, &msr_value);
-	msr_value.low &= ~RCDF_DIAG_32BIT_CRC;
-	gfx_msr_write (RC_ID_DF, RCDF_MBD_MSR_DIAG_DF, &msr_value);
-
-	if (gfx_test_timing_active())
-	{
-		/* WAIT UNTIL ACTIVE DISPLAY */
-
-		while(!gfx_test_vertical_active());
-
-		/* RESET CRC DURING ACTIVE DISPLAY */
-
-		WRITE_VID32(RCDF_VID_CRC, 0);
-		WRITE_VID32(RCDF_VID_CRC, 1);
-
-		/* WAIT UNTIL NOT ACTIVE, THEN ACTIVE, NOT ACTIVE, THEN ACTIVE */
-		
-		while(gfx_test_vertical_active());
-		while(!gfx_test_vertical_active());
-		while(gfx_test_vertical_active());
-		while(!gfx_test_vertical_active());
-		crc = READ_VID32(RCDF_VID_CRC) >> 8;
-	}
-	return(crc);
-}	
-
-/*---------------------------------------------------------------------------
- * gfx_read_crc32
- *
- * This routine returns the 32-bit hardware CRC value, which is used for automated 
- * testing.  The value is like a checksum, but will change if pixels move
- * locations.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-unsigned long redcloud_read_crc32(void)
-#else
-unsigned long gfx_read_crc32(void)
-#endif
-{
-	Q_WORD msr_value;
-	unsigned long crc = 0xFFFFFFFF;
-
-	/* ENABLE 32-BIT CRCS */
-	/* For GX1.x, this is a reserved bit, and is assumed to be a benign access */
-
-	gfx_msr_read  (RC_ID_DF, RCDF_MBD_MSR_DIAG_DF, &msr_value);
-	msr_value.low |= RCDF_DIAG_32BIT_CRC;
-	gfx_msr_write (RC_ID_DF, RCDF_MBD_MSR_DIAG_DF, &msr_value);
-
-	if (gfx_test_timing_active())
-	{
-		/* WAIT UNTIL ACTIVE DISPLAY */
-
-		while(!gfx_test_vertical_active());
-
-		/* RESET CRC DURING ACTIVE DISPLAY */
-
-		WRITE_VID32(RCDF_VID_CRC, 0);
-		WRITE_VID32(RCDF_VID_CRC, 1);
-
-		/* WAIT UNTIL NOT ACTIVE, THEN ACTIVE, NOT ACTIVE, THEN ACTIVE */
-		
-		while(gfx_test_vertical_active());
-		while(!gfx_test_vertical_active());
-		while(gfx_test_vertical_active());
-		while(!gfx_test_vertical_active());
-		crc = READ_VID32(RCDF_VID_CRC32);
-	}
-	return(crc);
-}	
-
-/*---------------------------------------------------------------------------
- * gfx_read_window_crc
- *
- * This routine returns the hardware CRC value for a subsection of the display.
- * This value is used to debug whole-screen CRC failures.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-unsigned long redcloud_read_window_crc(int source, unsigned short x, unsigned short y,
-									   unsigned short width, unsigned short height, int crc32)
-#else
-unsigned long gfx_read_window_crc(int source, unsigned short x, unsigned short y,
-								  unsigned short width, unsigned short height, int crc32)
-#endif
-{
-	Q_WORD msr_value;
-	unsigned long xpos, ypos, crc = 0;
-	unsigned long old_fmt = 0;
-	unsigned int vsync_active_base,  vsync_inactive_base,  hsync_active_base;
-	unsigned int vsync_active_shift, vsync_inactive_shift, hsync_active_shift;
-	unsigned int vsync_bit, hsync_bit, sync_polarities = 0;
-
-	/* CONFIGURE DISPLAY FILTER TO LOAD DATA ONTO LOWER 32-BITS */
-
-	msr_value.high = 0;
-	msr_value.low  = (source == CRC_SOURCE_GFX_DATA) ? (RCDF_MBD_DIAG_EN0 | 0x0000000F) :
-	                                                   (RCDF_MBD_DIAG_EN0 | 0x0000000B);
-	gfx_msr_write (RC_ID_DF, MBD_MSR_DIAG, &msr_value);
-
-	/* CONFIGURE DISPLAY FILTER FOR APPROPRIATE OUTPUT */
-
-	if (source != CRC_SOURCE_GFX_DATA)
-	{
-		gfx_msr_read (RC_ID_DF, MBD_MSR_CONFIG, &msr_value);
-		old_fmt = msr_value.low;
-		msr_value.low &= ~(RCDF_CONFIG_FMT_MASK);
-		msr_value.low |= ((source == CRC_SOURCE_FP_DATA) ? RCDF_CONFIG_FMT_FP :
-													       RCDF_CONFIG_FMT_CRT);
-		gfx_msr_write (RC_ID_DF, MBD_MSR_CONFIG, &msr_value);
-	}
-
-	/* CONFIGURE MCP TO LOAD REGB DATA ONTO UPPER 32-BITS */
-
-	msr_value.low = MCP_MBD_DIAG_EN1 | 0x00050000;
-	gfx_msr_write (RC_ID_MCP, MBD_MSR_DIAG, &msr_value);
-
-	/* ENABLE HW CLOCK GATING AND SET MCP CLOCK TO DOT CLOCK */
-
-	msr_value.low = 1l;
-	gfx_msr_write (RC_ID_MCP, MBD_MSR_PM, &msr_value);
-	msr_value.low = 0;
-	gfx_msr_write (RC_ID_MCP, MCP_DBGCLKCTL, &msr_value);
-	msr_value.low = 3;
-	gfx_msr_write (RC_ID_MCP, MCP_DBGCLKCTL, &msr_value);
-
-	/* DISABLE MCP ACTIONS */
-
-	msr_value.high = 0x00000000;
-	msr_value.low  = 0x00000000;
-	gfx_msr_write (RC_ID_MCP, MCP_DIAGCTL, &msr_value);
-
-	/* SET APPROPRIATE BASE ADDRESS */
-	/* M-Sets use normal diag bits, while N-Sets use inverted diag bits */
-	/* We thus use the M-sets when polling for a high signal and the N  */
-	/* sets when polling for a low signal.                              */
-
-	if (source != CRC_SOURCE_GFX_DATA)
-	{
-		sync_polarities = gfx_get_sync_polarities ();
-		vsync_bit = 29;
-		hsync_bit = 30;
-	}
-	else
-	{
-		vsync_bit = 25;
-		hsync_bit = 26;
-	}
-	
-	if (sync_polarities & 1)
-	{
-		hsync_active_base  = MCP_SETM0CTL;
-		hsync_active_shift = 2;
-	}
-	else
-	{
-		hsync_active_base  = MCP_SETN0CTL;
-		hsync_active_shift = 1;
-	}
-	if (sync_polarities & 2)
-	{
-		vsync_active_base    = MCP_SETM0CTL;
-		vsync_inactive_base  = MCP_SETN0CTL;
-		vsync_active_shift   = 2;
-		vsync_inactive_shift = 1;
-	}
-	else
-	{
-		vsync_active_base    = MCP_SETN0CTL;
-		vsync_inactive_base  = MCP_SETM0CTL;
-		vsync_active_shift   = 1;
-		vsync_inactive_shift = 2;
-	}
-		
-	/* SET STATE TRANSITIONS          */
-
-	/* STATE 0-1 TRANSITION (SET 0)      */
-	/* XState = 00 and VSync Inactive    */
-	/* Note: DF VSync = Diag Bus Bit 29  */
-	/*       VG VSync = Diag Bus Bit 25  */
-
-	msr_value.low  = 0x000000A0;
-	msr_value.high = 0x00008000 | ((unsigned long)vsync_bit << 16) | 
-    							  ((unsigned long)vsync_bit << 21) | 
-                                  ((unsigned long)vsync_bit << 26);
-	gfx_msr_write (RC_ID_MCP, vsync_inactive_base, &msr_value);
-
-	/* STATE 1-2 TRANSITION (SET 4)   */
-	/* XState = 01 and VSync Active   */
-	
-	msr_value.low = 0x000000C0;
-	gfx_msr_write (RC_ID_MCP, vsync_active_base + 4, &msr_value);
-
-	/* STATE 2-3 TRANSITION (SET 1)   */
-	/* XState = 10 and VSync Inactive */
-
-	msr_value.low = 0x00000120;
-	gfx_msr_write (RC_ID_MCP, vsync_inactive_base + 1, &msr_value);
-
-	/* HORIZONTAL COUNTER (SET 5)         */
-	/* XState = 10 and HSync Active       */
-	/* Notes: DF HSync = Diag Bus Bit 30  */
-	/*        VG HSync = Diag Bus Bit 26  */
-	
-	msr_value.high = 0x00008000 | ((unsigned long)hsync_bit << 16) | 
-    							  ((unsigned long)hsync_bit << 21) |
-							      ((unsigned long)hsync_bit << 26);
-	msr_value.low  = 0x00000120;
-	gfx_msr_write (RC_ID_MCP, hsync_active_base + 5, &msr_value);
-
-	/* HORIZONTAL COUNTER RESET (SET 4)     */
-	/* XState = 10 and H. Counter = limit   */
-	/* Note: H. Counter is lower 16-bits of */
-	/*       RegB.                          */
-
-	msr_value.high = 0x00000000;
-	msr_value.low  = 0x00000128;
-	gfx_msr_write (RC_ID_MCP, vsync_inactive_base + 4, &msr_value);
-
-	/* CRC TRIGGER (SET 0)   */
-	/* Cmp0 <= xpos <  Cmp1  */
-	/* Cmp2 <= ypos <  Cmp2  */
-
-	msr_value.high = 0x00000000;
-	msr_value.low  = 0x10C20120;
-	gfx_msr_write (RC_ID_MCP, vsync_active_base, &msr_value);
-
-	/* SET COMPARATOR VALUES */
-	/* Note: The VG data outputs from the DF are delayed by one pixel clock. */
-	/*       In this mode, we thus add one to horizontal comparator limits.  */
-
-	/* COMPARATOR 0                                        */
-	/* Lower limit = xpos + (h_blank_pixels - 1) - 3       */
-	/* Notes:                                              */
-	/*   1. 3 is the pipeline delay for MCP register       */
-	/*      data to access the diag bus                    */
-	/*   2. h_blank_pixels = HTOTAL - HSYNC_END            */
-	
-	xpos = (unsigned long)x + ((unsigned long)gfx_get_htotal() - 
-    						   (unsigned long)gfx_get_hsync_end() - 1l) - 3l;
-	if (source == CRC_SOURCE_GFX_DATA) xpos++;
-	msr_value.high = 0x00000000;
-	msr_value.low  = xpos;
-	gfx_msr_write (RC_ID_MCP, MCP_CMPVAL0, &msr_value);
-
-	/* COMPARATOR 1                                          */
-	/* Upper limit = xpos + width + (h_blank_pixels - 1) - 3 */
-	
-	msr_value.low = xpos + (unsigned long)width;
-	gfx_msr_write (RC_ID_MCP, MCP_CMPVAL0 + 2, &msr_value);
-		
-	/* COMPARATOR 2                                  */
-	/* Lower limit = ypos + v_blank_pixels           */
-	/* Notes:                                        */
-	/*   1. v_blank_pixels = VTOTAL - VSYNC_END      */
-	
-	ypos = (unsigned long)y + (unsigned long)gfx_get_vtotal() - (unsigned long)gfx_get_vsync_end();
-	msr_value.low = ypos << 16;
-	gfx_msr_write (RC_ID_MCP, MCP_CMPVAL0 + 4, &msr_value);
-
-	/* COMPARATOR 3                                  */
-	/* Upper limit = ypos + height + v_blank_pixels  */
-	
-	msr_value.low = (ypos + (unsigned long)height) << 16;
-	gfx_msr_write (RC_ID_MCP, MCP_CMPVAL0 + 6, &msr_value);
-
-	/* SET COMPARATOR MASKS */
-
-	/* COMPARATORS 0 AND 1 REFER TO LOWER 16 BITS OF REGB */
-
-	msr_value.high = 0x00000000;
-	msr_value.low  = 0x0000FFFF;
-	gfx_msr_write (RC_ID_MCP, MCP_CMPMASK0, &msr_value);
-	gfx_msr_write (RC_ID_MCP, MCP_CMPMASK0 + 2, &msr_value);
-
-	/* COMPARATORS 2 AND 3 REFER TO UPPER 16 BITS OF REGB */
-
-	msr_value.low = 0xFFFF0000;
-	gfx_msr_write (RC_ID_MCP, MCP_CMPMASK0 + 4, &msr_value);
-	gfx_msr_write (RC_ID_MCP, MCP_CMPMASK0 + 6, &msr_value);
-
-	/* SET REGA MASK TO CRC ONLY 24 BITS OF DATA */
-
-	msr_value.high = 0x00000000;
-	msr_value.low  = 0x00FFFFFF;
-	gfx_msr_write (RC_ID_MCP, MCP_REGAMASK, &msr_value);
-
-	/* SET REGB VALUE */
-	/* Lower 16 bits use HTOTAL - SYNC TIME - 1 to set the counter rollover limit. */
-	/* Upper 16 bits use 0xFFFF to remove auto-clear behavior.     */
-
-	msr_value.high = 0x00000000;
-	msr_value.low  = 0xFFFF0000 | 
-		((gfx_get_htotal() - (gfx_get_hsync_end() - gfx_get_hsync_start()) - 1) & 0xFFFF);
-	gfx_msr_write (RC_ID_MCP, MCP_REGBVAL, &msr_value);
-
-	/* PROGRAM ACTIONS */
-
-	/* GOTO STATE 01 */
-
-	msr_value.high = 0x00000000;
-	msr_value.low  = 0x00000008 | (1l << vsync_inactive_shift);
-	gfx_msr_write (RC_ID_MCP, MCP_ACTION0 + 14, &msr_value);
-
-	/* GOTO STATE 10 */
-
-	msr_value.low = 0x00080000 | (1l << (vsync_active_shift + 16));
-	gfx_msr_write (RC_ID_MCP, MCP_ACTION0 + 15, &msr_value);
-
-	/* GOTO STATE 11 */
-
-	msr_value.low = 0x00000080 | (1l << (vsync_inactive_shift + 4));
-	gfx_msr_write (RC_ID_MCP, MCP_ACTION0 + 16, &msr_value);
-
-	/* CLEAR REGB (COUNTERS)  */
-	/* RegB is cleared upon transitioning to state 10              */
-	/* RegA is not cleared as the initial value must be 0x00000001 */
-
-	msr_value.low = 0x00080000 | (1l << (vsync_active_shift + 16));
-	gfx_msr_write (RC_ID_MCP, MCP_ACTION0, &msr_value);
-
-	/* CRC INTO REGA        */
-	/* INCREMENT H. COUNTER */
-	/* cmp0 <= xpos < cmp1  */
-	/* cmp2 <= ypos < cmp3  */
-	/* XState = 10          */
-
-	msr_value.low = 0x00000008 | (1l << vsync_active_shift) |
-		            0x00800000 | (1l << (hsync_active_shift + 20));
-	gfx_msr_write (RC_ID_MCP, MCP_ACTION0 + 1, &msr_value);
-
-	/* INCREMENT V. COUNTER */
-	/* V. Counter is incremented when the H. Counter */
-	/* rolls over.                                   */
-
-	msr_value.low = 0x00080000 | (1l << (vsync_inactive_shift + 16));
-	gfx_msr_write (RC_ID_MCP, MCP_ACTION0 + 2, &msr_value);
-
-	/* CLEAR ALL OTHER ACTIONS */
-	/* This prevents side-effects from previous accesses to the MCP */ 
-	/* debug logic.                                                 */
-	msr_value.low  = 0x00000000;
-	msr_value.high = 0x00000000;
-	gfx_msr_write (RC_ID_MCP, MCP_ACTION0 + 3, &msr_value);
-	gfx_msr_write (RC_ID_MCP, MCP_ACTION0 + 4, &msr_value);
-	gfx_msr_write (RC_ID_MCP, MCP_ACTION0 + 5, &msr_value);
-	gfx_msr_write (RC_ID_MCP, MCP_ACTION0 + 6, &msr_value);
-	gfx_msr_write (RC_ID_MCP, MCP_ACTION0 + 7, &msr_value);
-	gfx_msr_write (RC_ID_MCP, MCP_ACTION0 + 8, &msr_value);
-	gfx_msr_write (RC_ID_MCP, MCP_ACTION0 + 9, &msr_value);
-	gfx_msr_write (RC_ID_MCP, MCP_ACTION0 + 10, &msr_value);
-	gfx_msr_write (RC_ID_MCP, MCP_ACTION0 + 11, &msr_value);
-	gfx_msr_write (RC_ID_MCP, MCP_ACTION0 + 12, &msr_value);
-	gfx_msr_write (RC_ID_MCP, MCP_ACTION0 + 13, &msr_value);
-	gfx_msr_write (RC_ID_MCP, MCP_ACTION0 + 17, &msr_value);
-	gfx_msr_write (RC_ID_MCP, MCP_ACTION0 + 18, &msr_value);
-	gfx_msr_write (RC_ID_MCP, MCP_ACTION0 + 19, &msr_value);
-	gfx_msr_write (RC_ID_MCP, MCP_ACTION0 + 20, &msr_value);
-	
-	/* SET REGA CRC VALUE TO 1 OR 0 */
-
-	if (!crc32)
-		msr_value.low = 0x00000001;
-	gfx_msr_write (RC_ID_MCP, MCP_REGA, &msr_value);
-
-	/* SET XSTATE TO 0 */
-
-	msr_value.low  = 0;
-	msr_value.high = 0;
-	gfx_msr_write (RC_ID_MCP, MCP_XSTATE, &msr_value);
-
-	/* CONFIGURE DIAG CONTROL */
-	/* Set all four comparators to watch the upper diag bus.           */
-	/* Set REGA action1 to legacy CRC or 32-bit CRC.                   */
-	/* Set REGB action1 to increment lower 16 bits and clear at limit. */
-	/* Set REGB action2 to increment upper 16 bits.                    */
-	/* Enable all actions.                                             */
-
-	if (crc32)
-		msr_value.low = 0x9A820055;
-	else
-		msr_value.low = 0x9A840055;
-	msr_value.high = 0x00000000;
-	gfx_msr_write (RC_ID_MCP, MCP_DIAGCTL, &msr_value);
-	
-	/* DELAY TWO FRAMES */
-
-	while(gfx_test_vertical_active());
-	while(!gfx_test_vertical_active());
-	while(gfx_test_vertical_active());
-	while(!gfx_test_vertical_active());
-	
-	/* VERIFY THAT XSTATE = 11 */
-
-	gfx_msr_read (RC_ID_MCP, MCP_XSTATE, &msr_value);
-	if ((msr_value.low & 3) == 3)
-	{
-		gfx_msr_read (RC_ID_MCP, MCP_REGA, &msr_value);
-		
-		crc = msr_value.low;
-		if (!crc32)
-			crc &= 0xFFFFFF;			
-	}
-
-	/* DISABLE MCP AND DF DIAG BUS OUTPUTS */
-
-	msr_value.low  = 0x00000000;
-	msr_value.high = 0x00000000;
-	gfx_msr_write (RC_ID_DF,  MBD_MSR_DIAG, &msr_value);
-	gfx_msr_write (RC_ID_MCP, MBD_MSR_DIAG, &msr_value);
-	
-	/* DISABLE MCP ACTIONS */
-
-	msr_value.high = 0x00000000;
-	msr_value.low  = 0x00000000;
-	gfx_msr_write (RC_ID_MCP, MCP_DIAGCTL, &msr_value);
-
-	/* RESTORE PREVIOUS OUTPUT FORMAT */
-
-	if (source != CRC_SOURCE_GFX_DATA)
-	{
-		gfx_msr_read (RC_ID_DF, MBD_MSR_CONFIG, &msr_value);
-		msr_value.low = old_fmt;
-		gfx_msr_write (RC_ID_DF, MBD_MSR_CONFIG, &msr_value);
-	}
-	return crc;
-}	
-
-/*---------------------------------------------------------------------------
- * gfx_get_alpha_enable
- * 
- * This routine returns 1 if the selected alpha window is currently 
- * enabled, or 0 if it is currently disabled.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-void redcloud_get_alpha_enable(int *enable)
-#else
-void gfx_get_alpha_enable(int *enable)
-#endif
-{
-	unsigned long value = 0;
-	*enable = 0;
-	if (gfx_alpha_select <= 2)
-	{
-		value = READ_VID32(RCDF_ALPHA_CONTROL_1 + ((unsigned long)gfx_alpha_select << 5));
-		if (value & RCDF_ACTRL_WIN_ENABLE) *enable = 1;
-	}
-	return;
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_alpha_size
- * 
- * This routine returns the size of the currently selected alpha region.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-void redcloud_get_alpha_size(unsigned short *x, unsigned short *y, 
-	unsigned short *width, unsigned short *height)
-#else
-void gfx_get_alpha_size(unsigned short *x, unsigned short *y, 
-	unsigned short *width, unsigned short *height)
-#endif
-{
-	unsigned long value = 0;
-	*x = 0;
-	*y = 0;
-	*width = 0;
-	*height = 0;
-	if (gfx_alpha_select <= 2)
-	{
-		value = READ_VID32(RCDF_ALPHA_XPOS_1 + ((unsigned long)gfx_alpha_select << 5));
-		*x = (unsigned short) (value & 0x000007FF);
-		*width = (unsigned short) ((value >> 16) & 0x000007FF) - *x;
-		value = READ_VID32(RCDF_ALPHA_YPOS_1 + ((unsigned long)gfx_alpha_select << 5));
-		*y = (unsigned short) (value & 0x000007FF);
-		*height = (unsigned short) ((value >> 16) & 0x000007FF) - *y;
-	}
-	*x -= gfx_get_htotal() - gfx_get_hsync_end() - 2;
-	*y -= gfx_get_vtotal() - gfx_get_vsync_end() + 1;
-	return;
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_alpha_value
- * 
- * This routine returns the alpha value and increment/decrement value of 
- * the currently selected alpha region.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-void redcloud_get_alpha_value(unsigned char *alpha, char *delta)
-#else
-void gfx_get_alpha_value(unsigned char *alpha, char *delta)
-#endif
-{
-	unsigned long value = 0;
-	*alpha = 0;
-	*delta = 0;
-	if (gfx_alpha_select <= 2)
-	{
-		value = READ_VID32(RCDF_ALPHA_CONTROL_1 + ((unsigned long)gfx_alpha_select << 5));
-		*alpha = (unsigned char) (value & 0x00FF);
-		*delta = (char) ((value >> 8) & 0x00FF);
-	}
-	return;
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_alpha_priority
- * 
- * This routine returns the priority of the currently selected alpha region.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-void redcloud_get_alpha_priority(int *priority)
-#else
-void gfx_get_alpha_priority(int *priority)
-#endif
-{
-	unsigned long pos = 0, value = 0;
-	*priority = 0;
-	if (gfx_alpha_select <= 2)
-	{
-		value = READ_VID32(RCDF_VID_ALPHA_CONTROL);
-		pos = 16 + (gfx_alpha_select << 1);
-		*priority = (int) ((value >> pos) & 3);
-	}
-	return;
-}
-
-/*---------------------------------------------------------------------------
- * gfx_get_alpha_color
- * 
- * This routine returns the color register value for the currently selected 
- * alpha region.  Bit 24 is set if the color register is enabled.
- *---------------------------------------------------------------------------
- */
-#if GFX_VIDEO_DYNAMIC
-void redcloud_get_alpha_color(unsigned long *color)
-#else
-void gfx_get_alpha_color(unsigned long *color)
-#endif
-{
-	*color = 0;
-	if (gfx_alpha_select <= 2)
-	{
-		*color = READ_VID32(RCDF_ALPHA_COLOR_1 + ((unsigned long)gfx_alpha_select << 5));
-	}
-	return;
-}
-
-#endif /* GFX_READ_ROUTINES */
-
-/* END OF FILE */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/panel/92xx.h b/xc/programs/Xserver/hw/xfree86/drivers/geode/panel/92xx.h
deleted file mode 100644
index 3702e70d2..000000000
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/panel/92xx.h
+++ /dev/null
@@ -1,466 +0,0 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/panel/92xx.h,v 1.1 2002/10/11 14:33:01 alanh Exp $ */ 
-/*
- * $Workfile: 92xx.h $
- * $Revision: 1.1.1.1 $
- *
- * File Contents: This header file defines the Durango routines and 
- *                variables used to access the memory mapped regions.
- *
- * SubModule:     Geode FlatPanel library
- */
-
-/* 
- * NSC_LIC_ALTERNATIVE_PREAMBLE
- *
- * Revision 1.0
- *
- * National Semiconductor Alternative GPL-BSD License
- *
- * National Semiconductor Corporation licenses this software 
- * ("Software"):
- *
- * Panel Library
- *
- * under one of the two following licenses, depending on how the 
- * Software is received by the Licensee.
- * 
- * If this Software is received as part of the Linux Framebuffer or
- * other GPL licensed software, then the GPL license designated 
- * NSC_LIC_GPL applies to this Software; in all other circumstances 
- * then the BSD-style license designated NSC_LIC_BSD shall apply.
- *
- * END_NSC_LIC_ALTERNATIVE_PREAMBLE */
-
-/* NSC_LIC_BSD
- *
- * National Semiconductor Corporation Open Source License for 
- *
- * Panel Library
- *
- * (BSD License with Export Notice)
- *
- * Copyright (c) 1999-2001
- * National Semiconductor Corporation.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without 
- * modification, are permitted provided that the following conditions 
- * are met: 
- *
- *   * Redistributions of source code must retain the above copyright 
- *     notice, this list of conditions and the following disclaimer. 
- *
- *   * Redistributions in binary form must reproduce the above 
- *     copyright notice, this list of conditions and the following 
- *     disclaimer in the documentation and/or other materials provided 
- *     with the distribution. 
- *
- *   * Neither the name of the National Semiconductor Corporation nor 
- *     the names of its contributors may be used to endorse or promote 
- *     products derived from this software without specific prior 
- *     written permission. 
- * 
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
- * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
- * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE,
- * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
- * OF SUCH DAMAGE.
- *
- * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
- * YOUR JURISDICTION. It is licensee's responsibility to comply with 
- * any export regulations applicable in licensee's jurisdiction. Under 
- * CURRENT (2001) U.S. export regulations this software 
- * is eligible for export from the U.S. and can be downloaded by or 
- * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
- * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
- * Syria, Sudan, Afghanistan and any other country to which the U.S. 
- * has embargoed goods and services. 
- *
- * END_NSC_LIC_BSD */
-
-/* NSC_LIC_GPL
- *
- * National Semiconductor Corporation Gnu General Public License for 
- *
- * Panel Library
- *
- * (GPL License with Export Notice)
- *
- * Copyright (c) 1999-2001
- * National Semiconductor Corporation.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without 
- * modification, are permitted under the terms of the GNU General 
- * Public License as published by the Free Software Foundation; either 
- * version 2 of the License, or (at your option) any later version  
- *
- * In addition to the terms of the GNU General Public License, neither 
- * the name of the National Semiconductor Corporation nor the names of 
- * its contributors may be used to endorse or promote products derived 
- * from this software without specific prior written permission. 
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
- * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
- * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, 
- * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
- * OF SUCH DAMAGE. See the GNU General Public License for more details. 
- *
- * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
- * YOUR JURISDICTION. It is licensee's responsibility to comply with 
- * any export regulations applicable in licensee's jurisdiction. Under 
- * CURRENT (2001) U.S. export regulations this software 
- * is eligible for export from the U.S. and can be downloaded by or 
- * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
- * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
- * Syria, Sudan, Afghanistan and any other country to which the U.S. 
- * has embargoed goods and services. 
- *
- * You should have received a copy of the GNU General Public License 
- * along with this file; if not, write to the Free Software Foundation, 
- * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 
- *
- * END_NSC_LIC_GPL */
-
-#ifndef _92XX_h
-#define _92XX_h
-
-typedef unsigned long ULONG;
-typedef unsigned char UCHAR; 
-
-#define FALSE	         0
-#define TRUE             1
-#define NUM_92XX_MODES   13
-#define ONE_BYTE         1		
-#define TWO_BYTES        2		
-#define FOUR_BYTES       4		
-
-/* LCD Registers
- * The LCD memory area is shared by both TV and LCD. 
- * This offset is for LCD access. 
- */
-
-#define CS92xx_LCD_OFFSET     0x00000400
-
-/* LCD CONTROL REGISTERS */
-
-#define CS92xx_LCD_PAN_TIMING1	    CS92xx_LCD_OFFSET +	0x00
-
-/* flat panel(FP) timings */
-#define CS92xx_LCD_PAN_TIMING2      CS92xx_LCD_OFFSET +	0x04 
-
-/* FP panel timings */
-#define CS92xx_LCD_PWR_MAN          CS92xx_LCD_OFFSET +	0x08    
-
-/* FP power management */
-#define CS92xx_LCD_DITH_FR_CNTRL    CS92xx_LCD_OFFSET +	0x0C    
-
-/* FP dither and frame rate 
- * these defines are in revisions prior to C 
- */
-#define CS92xx_LCD_BLOCK_SEL1       CS92xx_LCD_OFFSET +	0x10    
-
-/* FRM register */
-#define CS92xx_LCD_BLOCK_SEL2       CS92xx_LCD_OFFSET +	0x14    
-
-/* FRM register */
-#define CS92xx_LCD_DISPER1          CS92xx_LCD_OFFSET +	0x18    
-
-/* FRM register */
-#define CS92xx_LCD_DISPER2          CS92xx_LCD_OFFSET +	0x1C    
-
-/* FRM register 
- * these defines are revision C 
- */
-#define CS92xx_BLUE_LSFR_SEED       CS92xx_LCD_OFFSET +	0x10    
-
-/* FRM register */
-#define CS92xx_RED_GREEN_LSFR_SEED  CS92xx_LCD_OFFSET +	0x14    
-
-/* FRM register */
-#define CS92xx_FRM_MEMORY_INDEX     CS92xx_LCD_OFFSET +	0x18    
-
-/* FRM register */
-#define CS92xx_FRM_MEMORY_DATA      CS92xx_LCD_OFFSET +	0x1C   
- 
-/* FRM register */
-#define CS92xx_LCD_MEM_CNTRL        CS92xx_LCD_OFFSET +	0x20   
-
-/* memory PLL register */
-#define CS92xx_LCD_RAM_CNTRL        CS92xx_LCD_OFFSET +	0x24   
-
-/* ram control */
-
-#define CS92xx_LCD_RAM_DATA         CS92xx_LCD_OFFSET +	0x28 /* ram data */	
-
-#define CS92xx_LCD_PAN_CRC_SIG      CS92xx_LCD_OFFSET +	0x2C 
-
-/* FP CRC signature */
-#define CS92xx_DEV_REV_ID           CS92xx_LCD_OFFSET +	0x30    
-
-/* Device and revision id */	
-#define CS92xx_LCD_GPIO_DATA        CS92xx_LCD_OFFSET +	0x34  /* GPIO Data */	
-
-#define CS92xx_LCD_GPIO_CNTRL       CS92xx_LCD_OFFSET +	0x38   
-
-/* GPIO Control */	
-int Pnl_Rev_ID;
-
-typedef struct
-{
-	/* DISPLAY MODE PARAMETERS */
-	int xres;
-	int yres;
-	int	bpp;
-	int	panel_type;
-	int color_type;
-	/* VALUES USED TO SET THE FLAT PANEL DISPLAY CONTROLLER */
-	unsigned long panel_timing1;
-	unsigned long panel_timing2;
-	unsigned long power_management;
-	/* the following 5 registers are prior to revision C */
-	unsigned long pre_C_dither_frc; 
-	unsigned long block_select1; 
-	unsigned long block_select2; 
-	unsigned long dispersion1;
-	unsigned long dispersion2;
-	/* the following 4 registers are revision C only */
-	unsigned long rev_C_dither_frc; 
-	unsigned long blue_lsfr_seed; 
-	unsigned long red_green_lsfr_seed; 
-	unsigned long frm_memory_index;
-	unsigned long frm_memory_data;
-	unsigned long memory_control;
-
-} CS92xx_MODE;
-
-/* VALUES USED TO SAVE AND RESTORE 9211 REGISTERS. */
-typedef struct
-{
-	unsigned long panel_state; 	
-	/* VALUES USED TO SET THE FLAT PANEL DISPLAY CONTROLLER */
-	unsigned long panel_timing1;
-	unsigned long panel_timing2;
-	unsigned long power_management;
-	unsigned long dither_frc_ctrl; 
-	unsigned long blue_lsfr_seed; 
-	unsigned long red_green_lsfr_seed; 
-	unsigned long frm_memory_index;
-	unsigned long frm_memory_data;
-	unsigned long memory_control;
-} CS92xx_REGS;
-
-CS92xx_REGS cs9211_regs;
-/*
- *------------------------------------------------------------------------
- * PANEL MODE TABLES:
- * GLOBAL ARRAY OF FLAT PANEL MODE STRUCTURES
- *------------------------------------------------------------------------
- */
-CS92xx_MODE FPModeParams[] = {
-
-{ 640, 480, 8, PNL_SSTN, PNL_COLOR_PANEL,	/* display parameters */
-  0x01e00000, 0x00034000,  		/* panel timing reg 1, panel timing reg 2 */
-  0x01000000, 			 		/* power management */
-  /* The next 5 values are prior to revision C */
-  0x00000050, 					/* dither and frame rate control  */
-  0x25cf3096, 0xad47b81e, 		/* block select 1, block select 2 */
-  0x21446450, 0x21446450, 		/* dispersion 1, dispersion 2 */
-  /* The next 5 values are for revision C */
-  0x00000050, 					/* dither and frame rate control */
-  0x00000000, 0x00000000, 		/* blue LSFR, red and green LSFR */
-  0x00000000, 0x00000000, 		/* FRM memory index, FRM memory data */
-  0x00000000,			 		/* memory control */
-},
-
-{ 640, 480, 12, PNL_TFT, PNL_COLOR_PANEL,	/* display parameters */
-  0x01e00000, 0x0f100000,  		/* panel timing reg 1, panel timing reg 2 */
-  0x01000000, 			 		/* power management */
-  /* The next 5 values are prior to revision C */
-  0x00000050, 					/* dither and frame rate control */
-  0x00000000, 0x00000000, 		/* block select 1, block select 2 */
-  0x00000000, 0x00000000, 		/* dispersion 1, dispersion 2 */
-  /* The next 5 values are for revision C */
-  0x00000050, 					/* dither and frame rate control  */
-  0x00000000, 0x00000000, 		/* blue LSFR, red and green LSFR */
-  0x00000000, 0x00000000, 		/* FRM memory index, FRM memory data */
-  0x00000000,			 		/* memory control */
-},
-
-{ 640, 480, 18, PNL_TFT, PNL_COLOR_PANEL,	/* display parameters */
-  0x01e00000, 0x0f100000,  		/* panel timing reg 1, panel timing reg 2 */
-  0x01000000, 			 		/* power management */
-  /* The next 5 values are prior to revision C */
-  0x00000050, 					/* dither and frame rate control */
-  0x00000000, 0x00000000, 		/* block select 1, block select 2 */
-  0x00000000, 0x00000000, 		/* dispersion 1, dispersion 2 */
-  /* The next 5 values are for revision C */
-  0x00000050, 					/* dither and frame rate control */
-  0x00000000, 0x00000000, 		/* blue LSFR, red and green LSFR */
-  0x00000000, 0x00000000, 		/* FRM memory index, FRM memory data */
-  0x00000000,			 		/* memory control */
-},
-
-{ 640, 480, 16, PNL_DSTN, PNL_COLOR_PANEL,	/* display parameters */
-  0x01e00000, 0x00014000,  		/* panel timing reg 1, panel timing reg 2 */
-  0x01000000, 			 		/* power management */
-  /* The next 5 values are prior to revision C */
-  0x00000050, 					/* dither and frame rate control */
-  0x048c26ae, 0x048c26ae, 		/* block select 1, block select 2 */
-  0x02468ace, 0x13579bdf, 		/* dispersion 1, dispersion 2 */
-  /* The next 5 values are for revision C */
-  0x0000004b, 					/* dither and frame rate control */
-  0x00000000, 0x00000000, 		/* blue LSFR, red and green LSFR */
-  0x00000000, 0x00000000, 		/* FRM memory index, FRM memory data */
-  0x00000007,			 		/* memory control */
-},
-
-{ 640, 480, 8, PNL_DSTN, PNL_MONO_PANEL,	/* display parameters */
-  0x01e00000, 0x00084000,  		/* panel timing reg 1, panel timing reg 2 */
-  0x01000000, 			 		/* power management */
-  /* The next 5 values are prior to revision C */
-  0x0000004b, 					/* dither and frame rate control */ 
-  0x25cf3096, 0xad47b81e, 		/* block select 1, block select 2 */
-  0x21446450, 0x21446450, 		/* dispersion 1, dispersion 2 */
-  /* The next 5 values are for revision C  */
-  0x00000050, 					/* dither and frame rate control */
-  0x00000000, 0x00000000, 		/* blue LSFR, red and green LSFR */
-  0x00000000, 0x00000000, 		/* FRM memory index, FRM memory data */
-  0x00000007,			 		/* memory control */
-},
-
-{ 640, 480, 16, PNL_DSTN, PNL_MONO_PANEL,	/* display parameters */
-  0x01e00000, 0x00094000,  		/* panel timing reg 1, panel timing reg 2 */
-  0x01000000, 			 		/* power management */
-  /* The next 5 values are prior to revision C */
-  0x00000050, 					/* dither and frame rate control  */
-  0x25cf3096, 0xad47b81e, 		/* block select 1, block select 2 */
-  0x81a5d470, 0x29cfb63e, 		/* dispersion 1, dispersion 2 */
-  /* The next 5 values are for revision C */
-  0x00000050, 					/* dither and frame rate control  */
-  0x00000000, 0x00000000, 		/* blue LSFR, red and green LSFR */
-  0x00000000, 0x00000000, 		/* FRM memory index, FRM memory data */
-  0x00000007,			 		/* memory control */
-},
-
-{ 800, 600, 12, PNL_TFT, PNL_COLOR_PANEL,	/* display parameters */
-  0x02580000, 0x0f100000,  		/* panel timing reg 1, panel timing reg 2 */
-  0x01000000, 			 		/* power management */
-  /* The next 5 values are prior to revision C */
-  0x00000050, 					/* dither and frame rate control  */
-  0x00000000, 0x00000000, 		/* block select 1, block select 2 */
-  0x00000000, 0x00000000, 		/* dispersion 1, dispersion 2 */
-  /* The next 5 values are for revision C */
-  0x00000050, 					/* dither and frame rate control  */
-  0x00000000, 0x00000000, 		/* blue LSFR, red and green LSFR */
-  0x00000000, 0x00000000, 		/* FRM memory index, FRM memory data */
-  0x00000000,			 		/* memory control */
-},
-
-{ 800, 600, 18, PNL_TFT, PNL_COLOR_PANEL,	/* display parameters */
-  0x02580000, 0x0f100000,  		/* panel timing reg 1, panel timing reg 2 */
-  0x01000000, 			 		/* power management */
-  /* The next 5 values are prior to revision C */
-  0x00000050, 					/* dither and frame rate control  */
-  0x00000000, 0x00000000, 		/* block select 1, block select 2 */
-  0x00000000, 0x00000000, 		/* dispersion 1, dispersion 2 */
-  /* The next 5 values are for revision C */
-  0x00000050, 					/* dither and frame rate control */
-  0x00000000, 0x00000000, 		/* blue LSFR, red and green LSFR */
-  0x00000000, 0x00000000, 		/* FRM memory index, FRM memory data */
-  0x00000000,			 		/* memory control */
-},
-
-{ 800, 600, 16, PNL_DSTN, PNL_COLOR_PANEL,	/* display parameters */
-  0x02580000, 0x00014000,  		/* panel timing reg 1, panel timing reg 2 */
-  0x01000000, 			 		/* power management */
-  /* The next 5 values are prior to revision C */
-  0x00000050, 					/* dither and frame rate control  */
-  0x048c26ae, 0x048c26ae, 		/* block select 1, block select 2 */
-  0x02468ace, 0x13579bdf, 		/* dispersion 1, dispersion 2 */
-  /* The next 5 values are for revision C */
-  0x0000004b, 					 /* dither and frame rate control */
-  0x00000000, 0x00000000, 		/* blue LSFR, red and green LSFR */
-  0x00000000, 0x00000000, 		/* FRM memory index, FRM memory data */
-  0x00000007,			 		/* memory control */
-},
-
-{ 800, 600, 8, PNL_DSTN, PNL_MONO_PANEL,	/* display parameters */
-  0x02580000, 0x00084000,  		/* panel timing reg 1, panel timing reg 2 */
-  0x01000000, 			 		/* power management */
-  /* The next 5 values are prior to revision C */
-  0x00000050, 					/* dither and frame rate control */
-  0x25cf3096, 0xad47b81e, 		/* block select 1, block select 2 */
-  0x21446450, 0x21446450, 		/* dispersion 1, dispersion 2 */
-  /* The next 5 values are for revision C */
-  0x0000004b, 					/* dither and frame rate control  */
-  0x00000000, 0x00000000, 		/* blue LSFR, red and green LSFR */
-  0x00000000, 0x00000000, 		/* FRM memory index, FRM memory data */
-  0x00000007,			 		/* memory control */
-},
-
-{ 800, 600, 16, PNL_DSTN, PNL_MONO_PANEL,	/* display parameters */
-  0x02580000, 0x00094000,  		/* panel timing reg 1, panel timing reg 2 */
-  0x01000000, 			 		/* power management */
-  /* The next 5 values are prior to revision C */
-  0x00000050, 					/* dither and frame rate control */
-  0x25cf3096, 0xad47b81e, 		/* block select 1, block select 2 */
-  0x81a5d470, 0x29cfb63e, 		/* dispersion 1, dispersion 2 */
-  /* The next 5 values are for revision C */
-  0x00000050, 					/* dither and frame rate control */
-  0x00000000, 0x00000000, 		/* blue LSFR, red and green LSFR */
-  0x00000000, 0x00000000, 		/* FRM memory index, FRM memory data */
-  0x00000007,			 		/* memory control */
-},
-
-{ 1024, 768, 18, PNL_TFT, PNL_COLOR_PANEL,	/* display parameters */
-  0x03000000, 0x0f100000,  		/* panel timing reg 1, panel timing reg 2 */
-  0x01000000, 			 		/* power management */
-  /*The next 5 values are prior to revision C */
-  0x00000050, 					/* dither and frame rate control */
-  0x00000000, 0x00000000, 		/* block select 1, block select 2 */
-  0x00000000, 0x00000000, 		/* dispersion 1, dispersion 2 */
-  /*The next 5 values are for revision C */
-  0x00000050, 					/* dither and frame rate control */
-  0x00000000, 0x00000000, 		/* blue LSFR, red and green LSFR */
-  0x00000000, 0x00000000, 		/* FRM memory index, FRM memory data */
-  0x00000000,			 		/* memory control */
-},
-
-{ 1024, 768, 24, PNL_DSTN, PNL_COLOR_PANEL,	/* display parameters */
-  0x03000000, 0x80024000,  		/* panel timing reg 1, panel timing reg 2 */
-  0x01000000, 			 		/* power management */
-  /*The next 5 values are prior to revision C */
-  0x00000050, 					/* dither and frame rate control */
-  0x048c26ae, 0x048c26ae, 		/* block select 1, block select 2 */
-  0x02468ace, 0x13579bdf, 		/* dispersion 1, dispersion 2 */
-  /*The next 5 values are for revision C */
-  0x0000004b, 					/* dither and frame rate control */
-  0x00000000, 0x00000000, 		/* blue LSFR, red and green LSFR */
-  0x00000000, 0x00000000, 		/* FRM memory index, FRM memory data */
-  0x00000005,			 		/* memory control */
-}
-};
-
-#endif /* !_92XX_h */
-
-/* END OF FILE */
-
-
-
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/panel/dora9211.c b/xc/programs/Xserver/hw/xfree86/drivers/geode/panel/dora9211.c
deleted file mode 100644
index 96732eaeb..000000000
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/panel/dora9211.c
+++ /dev/null
@@ -1,694 +0,0 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/panel/dora9211.c,v 1.1 2002/10/11 14:33:02 alanh Exp $ */ 
-/*
- * $Workfile: dora9211.c $
- * $Revision: 1.1.1.1 $
- *
- * File Contents: This file contains the panel functions to interface 
- *                the dorado platform.
- *
- * SubModule:     Geode FlatPanel library
- *
- */
-
-/* 
- * NSC_LIC_ALTERNATIVE_PREAMBLE
- *
- * Revision 1.0
- *
- * National Semiconductor Alternative GPL-BSD License
- *
- * National Semiconductor Corporation licenses this software 
- * ("Software"):
- *
- * Panel Library
- *
- * under one of the two following licenses, depending on how the 
- * Software is received by the Licensee.
- * 
- * If this Software is received as part of the Linux Framebuffer or
- * other GPL licensed software, then the GPL license designated 
- * NSC_LIC_GPL applies to this Software; in all other circumstances 
- * then the BSD-style license designated NSC_LIC_BSD shall apply.
- *
- * END_NSC_LIC_ALTERNATIVE_PREAMBLE */
-
-/* NSC_LIC_BSD
- *
- * National Semiconductor Corporation Open Source License for 
- *
- * Panel Library
- *
- * (BSD License with Export Notice)
- *
- * Copyright (c) 1999-2001
- * National Semiconductor Corporation.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without 
- * modification, are permitted provided that the following conditions 
- * are met: 
- *
- *   * Redistributions of source code must retain the above copyright 
- *     notice, this list of conditions and the following disclaimer. 
- *
- *   * Redistributions in binary form must reproduce the above 
- *     copyright notice, this list of conditions and the following 
- *     disclaimer in the documentation and/or other materials provided 
- *     with the distribution. 
- *
- *   * Neither the name of the National Semiconductor Corporation nor 
- *     the names of its contributors may be used to endorse or promote 
- *     products derived from this software without specific prior 
- *     written permission. 
- * 
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
- * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
- * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE,
- * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
- * OF SUCH DAMAGE.
- *
- * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
- * YOUR JURISDICTION. It is licensee's responsibility to comply with 
- * any export regulations applicable in licensee's jurisdiction. Under 
- * CURRENT (2001) U.S. export regulations this software 
- * is eligible for export from the U.S. and can be downloaded by or 
- * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
- * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
- * Syria, Sudan, Afghanistan and any other country to which the U.S. 
- * has embargoed goods and services. 
- *
- * END_NSC_LIC_BSD */
-
-/* NSC_LIC_GPL
- *
- * National Semiconductor Corporation Gnu General Public License for 
- *
- * Panel Library
- *
- * (GPL License with Export Notice)
- *
- * Copyright (c) 1999-2001
- * National Semiconductor Corporation.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without 
- * modification, are permitted under the terms of the GNU General 
- * Public License as published by the Free Software Foundation; either 
- * version 2 of the License, or (at your option) any later version  
- *
- * In addition to the terms of the GNU General Public License, neither 
- * the name of the National Semiconductor Corporation nor the names of 
- * its contributors may be used to endorse or promote products derived 
- * from this software without specific prior written permission. 
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
- * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
- * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, 
- * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
- * OF SUCH DAMAGE. See the GNU General Public License for more details. 
- *
- * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
- * YOUR JURISDICTION. It is licensee's responsibility to comply with 
- * any export regulations applicable in licensee's jurisdiction. Under 
- * CURRENT (2001) U.S. export regulations this software 
- * is eligible for export from the U.S. and can be downloaded by or 
- * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
- * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
- * Syria, Sudan, Afghanistan and any other country to which the U.S. 
- * has embargoed goods and services. 
- *
- * You should have received a copy of the GNU General Public License 
- * along with this file; if not, write to the Free Software Foundation, 
- * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 
- *
- * END_NSC_LIC_GPL */
-
- 
-  
- 
-#include "dora9211.h"
-
-void Dorado_Get_9211_Details(unsigned long flags, PPnl_PanelParams pParam)
-{
-   unsigned long DPanelType;
-   int i;
-	
-   for(i = 0; i < 0x7fff; i++){
-   }
-
-   Dorado9211GpioInit();
-
-   for(i =0; i<5; i++)
-      toggle_Centaurus_9211_clock();
-
-   if(flags & PNL_PANELCHIP) { 
-     DPanelType = Dorado9211ReadReg(0x430);	   	
-		
-     if((DPanelType & 0xFFFF0000) == 0x92110000) {     /* found 9211 */
-       /* check the values for revision ID */
-       if (DPanelType >= 0x92110301)
-           pParam->PanelChip = PNL_9211_C;
-       else if ((DPanelType >= 0x92110101) && (DPanelType < 0x92110301))
-               pParam->PanelChip = PNL_9211_A;
-             else 
-              pParam->PanelChip = PNL_UNKNOWN_CHIP;
-		} else { /* no 9211 present */
-	      pParam->PanelChip = PNL_UNKNOWN_CHIP;
-     }
-   } 
-	
-   if((pParam->PanelChip != PNL_UNKNOWN_CHIP) && (flags & PNL_PANELSTAT)) {
-       unsigned long PanelTypeOrg;
-       unsigned char Panel_2Byte;	
-							 
-       DPanelType = Dorado9211ReadReg(0x438);
-       DPanelType &= 0x00e8e8e8;
-       DPanelType |= 0x00170000;
-       Dorado9211WriteReg(0x438, DPanelType);
-       DPanelType = 0;
-		
-       DPanelType = Dorado9211ReadReg(0x434);	   
-       DPanelType = (DPanelType >> (DRD_LCDRESGPIO1 + 1));
-       PanelTypeOrg = DPanelType >> 8; 
-       Panel_2Byte = (unsigned char)PanelTypeOrg;
-       Panel_2Byte = (Panel_2Byte >> (DRD_LCDRESGPIO2 - DRD_LCDRESGPIO1 - 1));	       DPanelType = (DPanelType | ((unsigned int)Panel_2Byte << 8));
-       DPanelType = DPanelType >> 1; 
-       PanelTypeOrg = DPanelType >> 8; 
-       Panel_2Byte = (unsigned char)PanelTypeOrg;
-       Panel_2Byte = (Panel_2Byte >> (DRD_LCDRESGPIO3 - DRD_LCDRESGPIO2 - 1));		
-       DPanelType = (DPanelType | ((unsigned int)Panel_2Byte << 8));
-       DPanelType = DPanelType >> 1; 
-       PanelTypeOrg = DPanelType >> 8; 
-       Panel_2Byte = (unsigned char)PanelTypeOrg;
-       Panel_2Byte = (Panel_2Byte >> (DRD_LCDRESGPIO4 - DRD_LCDRESGPIO3 - 1));		
-       DPanelType = (DPanelType | ((unsigned int)Panel_2Byte << 8));
-       DPanelType = DPanelType >> 5; 
-       DPanelType &= 0xf;
-
-       switch (DPanelType) {
-              case 8:
-	              pParam->PanelStat.XRes = 800;
-		      pParam->PanelStat.YRes = 600;
-		      pParam->PanelStat.Depth = 18;
-		      pParam->PanelStat.MonoColor = PNL_COLOR_PANEL;
-		      pParam->PanelStat.Type = PNL_TFT;
-		      break;	
-		
-	      case 9:
-	               pParam->PanelStat.XRes = 640;
-		       pParam->PanelStat.YRes = 480;
-		       pParam->PanelStat.Depth = 8;
-		       pParam->PanelStat.MonoColor = PNL_COLOR_PANEL;
-		       pParam->PanelStat.Type = PNL_SSTN;
-		       break;	
-
-	      case 10:
-	              pParam->PanelStat.XRes = 1024;
-  		      pParam->PanelStat.YRes = 768;
-		      pParam->PanelStat.Depth = 18;
-		      pParam->PanelStat.MonoColor = PNL_COLOR_PANEL;
-		      pParam->PanelStat.Type = PNL_TFT;
-		      break;	
-	      case 0:
-	      case 1:
-	      case 2:
-	      case 3:
-	      case 4:
-	      case 5:
-	      case 6:
-	      case 7:
-	      case 11:
-              pParam->PanelStat.XRes = 640;
-		      pParam->PanelStat.YRes = 480;
-		      pParam->PanelStat.Depth = 16;
-		      pParam->PanelStat.MonoColor = PNL_COLOR_PANEL;
-		      pParam->PanelStat.Type = PNL_DSTN;
-		      break;
-		  case 12:
-		      pParam->PanelStat.XRes = 640;
-		      pParam->PanelStat.YRes = 480;
-		      pParam->PanelStat.Depth = 18;
-		      pParam->PanelStat.MonoColor = PNL_COLOR_PANEL;
-		      pParam->PanelStat.Type = PNL_TFT;
-		      break;	
-	      case 13:
-              pParam->PanelStat.XRes = 1024;
-		      pParam->PanelStat.YRes = 768;
-		      pParam->PanelStat.Depth = 24;
-			  pParam->PanelStat.MonoColor = PNL_COLOR_PANEL;
-		      pParam->PanelStat.Type = PNL_DSTN;
-		      break;	
-	      case 14:
-			  pParam->PanelStat.XRes = 640;
-		      pParam->PanelStat.YRes = 480;
-		      pParam->PanelStat.Depth = 8;
-		      pParam->PanelStat.MonoColor = PNL_MONO_PANEL;
-		      pParam->PanelStat.Type = PNL_DSTN;
-		      break;	
-		  case 15:
-		      pParam->PanelStat.XRes = 800;
-		      pParam->PanelStat.YRes = 600;
-		      pParam->PanelStat.Depth = 16;
-		      pParam->PanelStat.MonoColor = PNL_COLOR_PANEL;
-		      pParam->PanelStat.Type = PNL_DSTN;
-		      break;	
-	      default:
-               	break;
-	   }
-   }  /* if block end */
-		
-}
-
-void Dorado9211Init(Pnl_PanelStat *pstat)
-{
-   int mode;
-   unsigned long orig_value,pm_value;
-
-   gfx_delay_milliseconds(100);
-   Dorado9211GpioInit();
-
-   Dorado9211ToggleClock();
-   Dorado9211ToggleClock();
-   Dorado9211ToggleClock();
-   Dorado9211ToggleClock();
-   Dorado9211ToggleClock();
-	
-   gfx_delay_milliseconds(100);
-	
-   Dorado9211ToggleClock();
-   Dorado9211ToggleClock();
-   Dorado9211ToggleClock();
-   Dorado9211ToggleClock();
-   Dorado9211ToggleClock();
-		
-   Dorado9211WriteReg(CS92xx_LCD_PWR_MAN,0x0);
-
-   gfx_delay_milliseconds(100);
-   gfx_delay_milliseconds(100);
-
-   /* LOOP THROUGH THE AVAILABLE MODES TO FIND A MATCH */
-  for (mode = 0; mode < NUM_92XX_MODES; mode++) {
-      if ((FPModeParams[mode].xres == pstat->XRes) &&
-          (FPModeParams[mode].yres == pstat->YRes) &&
-          (FPModeParams[mode].bpp == pstat->Depth) &&
-          (FPModeParams[mode].panel_type == pstat->Type) &&
-          (FPModeParams[mode].color_type == pstat->MonoColor)) {
-   
-          /* SET THE 92xx FOR THE SELECTED MODE */
-           CS92xx_MODE *pMode = &FPModeParams[mode];
-   
-           Dorado9211WriteReg(CS92xx_LCD_PAN_TIMING1,pMode->panel_timing1);
-           Dorado9211WriteReg(CS92xx_LCD_PAN_TIMING2,pMode->panel_timing2);
-           Dorado9211WriteReg(CS92xx_LCD_DITH_FR_CNTRL,
-                              pMode->rev_C_dither_frc);			
-           Dorado9211WriteReg(CS92xx_BLUE_LSFR_SEED,pMode->blue_lsfr_seed);
-           Dorado9211WriteReg(CS92xx_RED_GREEN_LSFR_SEED,
-			      pMode->red_green_lsfr_seed);			
-           DoradoProgramFRMload();
-           Dorado9211WriteReg(CS92xx_LCD_MEM_CNTRL,pMode->memory_control);
-           Dorado9211WriteReg(CS92xx_LCD_PWR_MAN,pMode->power_management);
-           gfx_delay_milliseconds(100);
-           gfx_delay_milliseconds(100);
-           Dorado9211ClearCS();
-
-          /* This code is added to take care of Panel initialization.
-           * Irrespective of Xpressrom is enabling the panel or not. 
-           */
-           orig_value = READ_VID32(0X04);
-           WRITE_VID32(0x04, 0x00200141); 
-           gfx_delay_milliseconds(21);
-           pm_value = gfx_ind(0x9030);
-     
-           pm_value |= 0x400;
-           gfx_outd(0x9030, pm_value);
-           gfx_delay_milliseconds(4);
-           orig_value &= 0xfff1ffff;
-           WRITE_VID32(0X4, orig_value); 
-           return;
-       } /*end if() */
-   } /*end for() */
-
-}	
-
-void Dorado9211SetCS(void)
-{
-   unsigned long value;
-   value = gfx_ind(DRD_CSP9211IN);
-   gfx_outd(DRD_CSP9211OUT, value | DRD_CS9211);
-}
-
-void Dorado9211ClearCS(void)
-{
-    unsigned long value;
-    value = gfx_ind(DRD_CSP9211IN);
-    gfx_outd(DRD_CSP9211OUT, value & (~DRD_CS9211));
-}
-
-void Dorado9211SetDataOut(void)
-{
-   unsigned long value;
-   value = gfx_ind(DRD_DATAOUTP9211IN);
-   gfx_outd(DRD_DATAOUTP9211OUT, value | DRD_DATAIN9211);
-}
-
-
-void Dorado9211ClearDataOut(void)
-{
-   unsigned long value;
-   value = gfx_ind(DRD_DATAOUTP9211IN);
-   gfx_outd(DRD_DATAOUTP9211OUT, value & (~DRD_DATAIN9211));
-}
-
-
-unsigned char Dorado9211ReadDataIn(void)
-{
-  unsigned char readdata=0;
-  unsigned long value;
-  /* why to read 4 times ???*/
-  value = gfx_ind(DRD_DATAINP9211IN);
-  value = gfx_ind(DRD_DATAINP9211IN);
-  value = gfx_ind(DRD_DATAINP9211IN);
-  value = gfx_ind(DRD_DATAINP9211IN);
-  if(value & DRD_DATAOUT9211)
-     readdata=1;
-  return (readdata);
-}
-		
-
-void Dorado9211ToggleClock(void)
-{
-   Dorado9211SetClock();
-   Dorado9211ClearClock();
-}
-	
-
-void Dorado9211SetClock(void)
-{
-    unsigned long value;
-    value = gfx_ind(DRD_CLOCKP9211IN);
-    gfx_outd(DRD_CLOCKP9211OUT, value | DRD_CLOCK9211);
-}	
-
-
-void Dorado9211ClearClock(void)
-{
-   unsigned long value;
-   value = gfx_ind(DRD_CLOCKP9211IN);
-   gfx_outd(DRD_CLOCKP9211OUT, value & (~DRD_CLOCK9211));
-}
-
-void Dorado9211GpioInit(void)
-{
-	unsigned long value;
-
-	/* set output enable on gpio 7, 9, 11 */
-	gfx_outd((DRD_GEODE_GPIO_BASE + DRD_GEODE_GPPIN_SEL), DRD_CLOCK9211CFG);
-	gfx_outd((DRD_GEODE_GPIO_BASE + DRD_GEODE_GPPIN_CFG), 3);
-	/* set output enable on gpio 7, 9, 11 */
-	gfx_outd((DRD_GEODE_GPIO_BASE + DRD_GEODE_GPPIN_SEL), DRD_CS9211CFG);
-	gfx_outd((DRD_GEODE_GPIO_BASE + DRD_GEODE_GPPIN_CFG), 3);
-	/* set output enable on gpio 7, 9, 18 */
-	gfx_outd((DRD_GEODE_GPIO_BASE + DRD_GEODE_GPPIN_SEL), DRD_DATAIN9211CFG);
-	gfx_outd((DRD_GEODE_GPIO_BASE + DRD_GEODE_GPPIN_CFG), 3);
-	/* disable on gpio 11 - This is the output from the 9211 */
-	gfx_outd((DRD_GEODE_GPIO_BASE + DRD_GEODE_GPPIN_SEL), DRD_DATAOUT9211CFG);
-	gfx_outd((DRD_GEODE_GPIO_BASE + DRD_GEODE_GPPIN_CFG), 0);
-	/* Set all PINS low */
-	value = gfx_ind(DRD_GEODE_GPIO_BASE + DRD_GEODE_GPDI0);
-	value &= ~(DRD_CS9211 | DRD_CLOCK9211 | DRD_DATAIN9211);
-	gfx_outd((DRD_GEODE_GPIO_BASE + DRD_GEODE_GPDO0), value);
-}
-
-unsigned long Dorado9211ReadReg(unsigned short index)
-{
-
-    unsigned char i, readbit;
-    unsigned long data;
-
-    Dorado9211ClearDataOut();
-
-    Dorado9211SetCS();
-    Dorado9211ToggleClock();
-
-    Dorado9211SetDataOut();
-    Dorado9211ToggleClock();
-	
-    for (i=0; i < 12; i++) {
- 	if (index & 0x1) {
-            Dorado9211SetDataOut();
- 	} else {
-	    Dorado9211ClearDataOut();
-	  }
-	Dorado9211ToggleClock();
-	index >>= 1;
-    }
-    
-    Dorado9211ClearDataOut();
-    Dorado9211ToggleClock();
-    
-    /* Idle clock, 7 clocks, no data set */
-  
-     Dorado9211ToggleClock();
-     Dorado9211ToggleClock();
-     Dorado9211ToggleClock();
-     Dorado9211ToggleClock();
-     Dorado9211ToggleClock();
-     Dorado9211ToggleClock();
-     Dorado9211ToggleClock();
-
-     data = 0;
-     for ( i = 0; i < 32; i++) { 
-         Dorado9211ToggleClock();
- 	 readbit = Dorado9211ReadDataIn();
-	 data |= (((unsigned long)readbit) << i);
-     }
-		
-     Dorado9211ClearCS();
-     Dorado9211ToggleClock();
-     return(data);
-
-}
-
-void Dorado9211WriteReg(unsigned short index, unsigned long data)
-{
-
-	unsigned char i;
-		
-	Dorado9211ClearDataOut();
-	Dorado9211SetDataOut();
-	Dorado9211SetCS();
-	Dorado9211ToggleClock();
-	Dorado9211SetDataOut();
-	Dorado9211ToggleClock();
-
-	for (i=0; i < 12; i++) {
-		if (index & 0x1) {
-			Dorado9211SetDataOut();
-		} else {
-			Dorado9211ClearDataOut();
-		}
-		Dorado9211ToggleClock();
-		index >>= 1;
-	}
-			
-	Dorado9211SetDataOut();
-	Dorado9211ToggleClock();
-
-	for (i=0; i<32; i++) {
-            if (data & 0x1) {
-		Dorado9211SetDataOut();
-	    } else {
-	            Dorado9211ClearDataOut();
-	      }
-	    Dorado9211ToggleClock();
-	    data >>= 1;
-	}
-
-	Dorado9211ClearCS();
-
-	Dorado9211ToggleClock();
-	Dorado9211ToggleClock();
-	Dorado9211ToggleClock();
-	Dorado9211ToggleClock();
-}
-
-void DoradoProgramFRMload(void)
-{
-   unsigned long DoradoFRMtable[] = { 
-
-       	0x00000000,		
-	0x00000000,		
-	0x01000100,		
-	0x01000100,		
-	0x01010101,		
-	0x01010101,		
-	0x02081041,		
-	0x02081041,		
-	0x10111111,		
-	0x11111101,		
-	0x49249241,		
-	0x12412492,		
-	0x92244891,		
-	0x92244891,		
-	0x22252525,		
-	0x22252525,		
-	0x528294a5,		
-	0x2528494a,		
-	0x294a5295,		
-	0x294a5295,		
-	0x54a54a95,		
-	0x2952a52a,		
-	0x2a552a55,		
-	0x2a552a55,		
-	0x554aa955,		
-	0x2a9552aa,		
-	0x2aaa5555,		
-	0x2aaa5555,		
-	0x55555555,		
-	0x2aaaaaaa,		
-	0x55555555,		
-	0x55555555,		
-	0xaaaaaaab,		
-	0x55555555,		
-	0x5555aaab,		
-	0x5555aaab,		
-	0xaab556ab,		
-	0x556aad55,		
-	0x55ab55ab,		
-	0x55ab55ab,		
-	0xab5ab56b,		
-	0x56ad5ad5,		
-	0x56b5ad6b,		
-	0x56b5ad6b,		
-	0xad6d6b5b,		
-	0x5ad6b6b6,		
-	0x5b5b5b5b,		
-	0x5b5b5b5b,		
-	0x5F6db6db,		
-	0x5F6db6db,		
-	0xF776F776,		
-	0xF776F776,		
-	0xFBDEFBDE,		
-	0xFBDEFBDE,		
-	0x7eFFBFF7,		
-	0x7eFFBFF7,		
-	0xFF7FF7F7,		
-	0xFF7FF7F7,		
-	0xFF7FFF7F,		
-	0xFF7FFF7F,		
-	0xFFF7FFFF,		
-	0xFFF7FFFF,		
-	0xFFFFFFFF,		
-	0xFFFFFFFF,		
-};
-
- unsigned char i;
- unsigned short index;
- unsigned long data;
-
- Dorado9211WriteReg(CS92xx_FRM_MEMORY_INDEX,0);
- index = CS92xx_FRM_MEMORY_DATA;
- for (i = 0; i < 64; i+=2) {
-     data = DoradoFRMtable[i];
-     Dorado9211WriteReg(index,data);
-     data = DoradoFRMtable[i+1];
-     Dorado9211WriteReg(index,data);
- }
-
-/*
- * The first FRM location (64 bits) does not program correctly.
- * This location always reads back with the last value programmed.
- * ie. If 32 64-bit values are programmed, location 0 reads back as the 32nd
- * If 30 locations are programmed, location 0 reads back as the 30th, etc.
- * Fix this by re-writing location 0 after programming all 64 in the writeFRM 
- * loop in RevCFrmload() in CS9211.
- */
-
-  Dorado9211WriteReg(CS92xx_FRM_MEMORY_INDEX,0);
-  Dorado9211WriteReg(CS92xx_FRM_MEMORY_DATA,0);
-  Dorado9211WriteReg(CS92xx_FRM_MEMORY_DATA,0);
-
-}	
-
-/******************************************************************************
- * void Dorado_Enable_Power((void);
- * Enables the power of the CX9211 on Dorado board.
- ******************************************************************************
- */
-
-void Dorado_Power_Up(void)
-{
-   Dorado9211WriteReg(CS92xx_LCD_PWR_MAN,0x01000000);
-   return;
-
-} /* disable_Centaurus_Power */
-
-/******************************************************************************
- * void Dorado_Disable_Power((void);
- * Disables the power of the CX9211 on Dorado board.
- *****************************************************************************
- */
-
-void Dorado_Power_Down(void)
-{
-  Dorado9211WriteReg(CS92xx_LCD_PWR_MAN,0x0);
-  return;
-
-} /* disable_Centaurus_Power */
-
-
-void Dorado_Save_Panel_State(void)
-{
-
-      /* set 9211 registers using the desired panel settings	 */
-      cs9211_regs.panel_timing1=Dorado9211ReadReg(CS92xx_LCD_PAN_TIMING1);	   
-      cs9211_regs.panel_timing2=Dorado9211ReadReg(CS92xx_LCD_PAN_TIMING2);	   
-	
-      cs9211_regs.dither_frc_ctrl=Dorado9211ReadReg(CS92xx_LCD_DITH_FR_CNTRL);	   
-      cs9211_regs.blue_lsfr_seed=Dorado9211ReadReg(CS92xx_BLUE_LSFR_SEED);	   
-      cs9211_regs.red_green_lsfr_seed=Dorado9211ReadReg(CS92xx_RED_GREEN_LSFR_SEED);	   
-
-      /* CentaurusProgramFRMload(); */
-      cs9211_regs.memory_control=Dorado9211ReadReg(CS92xx_LCD_MEM_CNTRL);	   
-
-      /* Set the power register last. This will turn the panel on at the 9211.*/
-      cs9211_regs.power_management=Dorado9211ReadReg(CS92xx_LCD_PWR_MAN);	   
-      cs9211_regs.panel_state = cs9211_regs.power_management;
-}
-void Dorado_Restore_Panel_State(void) 
-{
-    unsigned long off_data = 0;
-
-      /* Before restoring the 9211 registers, power off the 9211. */ 
-	
-       Dorado9211WriteReg(CS92xx_LCD_PWR_MAN, off_data);	   
-
-       /* set 9211 registers using the desired panel settings	 */
-       Dorado9211WriteReg(CS92xx_LCD_PAN_TIMING1, cs9211_regs.panel_timing1);	   
-       Dorado9211WriteReg(CS92xx_LCD_PAN_TIMING2, cs9211_regs.panel_timing2);	   
-       /* load the LSFR seeds */
-       Dorado9211WriteReg(CS92xx_LCD_DITH_FR_CNTRL, cs9211_regs.dither_frc_ctrl);	   
-       Dorado9211WriteReg(CS92xx_BLUE_LSFR_SEED, cs9211_regs.blue_lsfr_seed);	   
-       Dorado9211WriteReg(CS92xx_RED_GREEN_LSFR_SEED, 
-		      cs9211_regs.red_green_lsfr_seed);	   
-	
-       Dorado9211WriteReg(CS92xx_LCD_MEM_CNTRL, cs9211_regs.memory_control);	   
-       /* Set the power register last. This will turn the panel on at the 9211.*/
-       Dorado9211WriteReg(CS92xx_LCD_PWR_MAN, cs9211_regs.power_management);	   
-}
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/panel/drac9210.c b/xc/programs/Xserver/hw/xfree86/drivers/geode/panel/drac9210.c
deleted file mode 100644
index 9f778315c..000000000
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/panel/drac9210.c
+++ /dev/null
@@ -1,775 +0,0 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/panel/drac9210.c,v 1.1 2002/10/11 14:33:02 alanh Exp $ */ 
-/*
- * $Workfile: drac9210.c $
- * $Revision: 1.1.1.1 $
- *
- * File Contents: This file contains the panel library files to the 
- *                platforms with 9210, and 9211 support.
- *
- * SubModule:     Geode FlatPanel library
- *
- */
-
-/* 
- * NSC_LIC_ALTERNATIVE_PREAMBLE
- *
- * Revision 1.0
- *
- * National Semiconductor Alternative GPL-BSD License
- *
- * National Semiconductor Corporation licenses this software 
- * ("Software"):
- *
- * Panel Library
- *
- * under one of the two following licenses, depending on how the 
- * Software is received by the Licensee.
- * 
- * If this Software is received as part of the Linux Framebuffer or
- * other GPL licensed software, then the GPL license designated 
- * NSC_LIC_GPL applies to this Software; in all other circumstances 
- * then the BSD-style license designated NSC_LIC_BSD shall apply.
- *
- * END_NSC_LIC_ALTERNATIVE_PREAMBLE */
-
-/* NSC_LIC_BSD
- *
- * National Semiconductor Corporation Open Source License for 
- *
- * Panel Library
- *
- * (BSD License with Export Notice)
- *
- * Copyright (c) 1999-2001
- * National Semiconductor Corporation.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without 
- * modification, are permitted provided that the following conditions 
- * are met: 
- *
- *   * Redistributions of source code must retain the above copyright 
- *     notice, this list of conditions and the following disclaimer. 
- *
- *   * Redistributions in binary form must reproduce the above 
- *     copyright notice, this list of conditions and the following 
- *     disclaimer in the documentation and/or other materials provided 
- *     with the distribution. 
- *
- *   * Neither the name of the National Semiconductor Corporation nor 
- *     the names of its contributors may be used to endorse or promote 
- *     products derived from this software without specific prior 
- *     written permission. 
- * 
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
- * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
- * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE,
- * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
- * OF SUCH DAMAGE.
- *
- * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
- * YOUR JURISDICTION. It is licensee's responsibility to comply with 
- * any export regulations applicable in licensee's jurisdiction. Under 
- * CURRENT (2001) U.S. export regulations this software 
- * is eligible for export from the U.S. and can be downloaded by or 
- * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
- * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
- * Syria, Sudan, Afghanistan and any other country to which the U.S. 
- * has embargoed goods and services. 
- *
- * END_NSC_LIC_BSD */
-
-/* NSC_LIC_GPL
- *
- * National Semiconductor Corporation Gnu General Public License for 
- *
- * Panel Library
- *
- * (GPL License with Export Notice)
- *
- * Copyright (c) 1999-2001
- * National Semiconductor Corporation.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without 
- * modification, are permitted under the terms of the GNU General 
- * Public License as published by the Free Software Foundation; either 
- * version 2 of the License, or (at your option) any later version  
- *
- * In addition to the terms of the GNU General Public License, neither 
- * the name of the National Semiconductor Corporation nor the names of 
- * its contributors may be used to endorse or promote products derived 
- * from this software without specific prior written permission. 
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
- * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
- * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, 
- * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
- * OF SUCH DAMAGE. See the GNU General Public License for more details. 
- *
- * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
- * YOUR JURISDICTION. It is licensee's responsibility to comply with 
- * any export regulations applicable in licensee's jurisdiction. Under 
- * CURRENT (2001) U.S. export regulations this software 
- * is eligible for export from the U.S. and can be downloaded by or 
- * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
- * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
- * Syria, Sudan, Afghanistan and any other country to which the U.S. 
- * has embargoed goods and services. 
- *
- * You should have received a copy of the GNU General Public License 
- * along with this file; if not, write to the Free Software Foundation, 
- * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 
- *
- * END_NSC_LIC_GPL */
-  
-
-
-
-#include "drac9210.h"
-
-#define	CS9210			0x40	/* Chip select pin */
-
-/* 9210 on Draco */
-#define CLOCK9210		0x04	/* Clock pin */
-#define	DATAIN9210		0x20	/* Data from 9210 */
-#define	DATAOUT9210		0x80	/* Data to 9210 */
-
-static void DracoWriteData(unsigned char data);
-static void DracoReadData(unsigned char *data);
-static void Draco9210GpioInit();
-static void Draco9210SetCS(void);
-static unsigned char Draco9210ReadReg(unsigned char index);
-static void Draco9210WriteReg(unsigned char index, unsigned char data);
-static void Draco9210ClearCS(void);
-static void Draco9210SetDataOut(void);
-static void Draco9210ClearDataOut(void);
-static unsigned char Draco9210ReadDataIn(void);
-static void Draco9210ToggleClock(void);
-
-void Draco9210Init(Pnl_PanelStat *pstat)
-{
-   unsigned char panelvalues[] = {
-    	        0x2,0x80,
-	        0x2, 0x24,
- 	        0x03, 0x00,
-	        0xc0, 0x00,
-	        0xc1, 0x00,
-		0xc2, 0x00,
-		0xc3, 0x00,
-		0xc4, 0x00,
-		0xc5, 0x01,
-		0xc6, 0xff,
-		0xc7, 0xff,
-		0xc8, 0x3,
-		0xc9, 0xfe,
-		0xca, 0x0,
-		0xcb, 0x3f,
-		0xcc, 0xc,
-		0xcd, 0x1,
-		0xce, 0xff,
-		0xcf, 0xc1,
-		0xd0, 0x0,
-		0xd1, 0x7e,
-		0xd2, 0x3,
-		0xd3, 0xfe,
-		0xd4, 0x3,
-		0xd5, 0x81,
-		0xd6, 0xfc,
-		0xd7, 0x3f,
-		0xd8, 0x14,
-		0xd9, 0x1e,
-		0xda, 0x0f,
-		0xdb, 0xc7,
-		0xdc, 0x29,
-		0xdd, 0xe1,
-		0xde, 0xf1,
-		0xdf, 0xf9,
-		0xe0, 0x2,
-		0xe1, 0xe,
-		0xe2, 0x1e,
-		0xe3, 0x3e,
-		0xe4, 0x04,
-		0xe5, 0x71,
-		0xe6, 0xe3,
-		0xe7, 0xcf,
-		0xe8, 0x1,
-		0xe9, 0x86,
-		0xea, 0x3c,
-		0xeb, 0xf3,
-		0xec, 0xa,
-		0xed, 0x39,
-		0xee, 0xc7,
-		0xef, 0x3d,
-
-		0xf0, 0x14,
-		0xf1, 0xc6,
-		0xf2, 0x39,
-		0xf3, 0xce,
-		0xf4, 0x3,
-		0xf5, 0x19,
-		0xf6, 0xce,
-		0xf7, 0x77,
-		0xf8, 0x0,
-		0xf9, 0x66,
-		0xfa, 0x33,
-		0xfb, 0xbb,
-		0xfc, 0x2d,
-		0xfd, 0x99,
-		0xfe, 0xdd,
-		0xff, 0xdd,
-	
-		0x3, 0x1,
-		0xc0, 0x2,
-		0xc1, 0x22,
-		0xc2, 0x66,
-		0xc3, 0x66,
-		0xc4, 0x0,
-		0xc5, 0xcd,
-		0xc6, 0x99,
-		0xc7, 0xbb,
-		0xc8, 0x5,
-		0xc9, 0x32,
-		0xca, 0x66,
-		0xcb, 0xdd,
-		0xcc, 0x1a,
-		0xcd, 0x4d,
-		0xce, 0x9b,
-		0xcf, 0x6f,
-		0xd0, 0x0,
-		0xd1, 0x92,
-		0xd2, 0x6d,
-		0xd3, 0xb6,
-		0xd4, 0x5,
-		0xd5, 0x25,
-		0xd6, 0xb6,
-		0xd7, 0xdb,
-		0xd8, 0x2,
-		0xd9, 0x5a,
-		0xda, 0x4b,
-		0xdb, 0x6d,
-		0xdc, 0x29,
-		0xdd, 0xa5,
-		0xde, 0xb5,
-		0xdf, 0xb7,
-		0xe0, 0x4,
-		0xe1, 0x4a,
-		0xe2, 0x5a,
-		0xe3, 0xda,
-		0xe4, 0x12,
-		0xe5, 0x95,
-		0xe6, 0xad,
-		0xe7, 0x6f,
-		0xe8, 0x1,
-		0xe9, 0x2a,
-		0xea, 0x56,
-		0xeb, 0xb5,
-		0xec, 0xe,
-		0xed, 0x55,
-		0xee, 0xab,
-		0xef, 0x5f,
-		0xf0, 0x0,
-		0xf1, 0xaa,
-		0xf2, 0x55,
-		0xf3, 0xea,
-		0xf4, 0x1,
-		0xf5, 0x55,
-		0xf6, 0xaa,
-		0xf7, 0xbf,
-		0xf8, 0x6,
-		0xf9, 0xaa,
-		0xfa, 0x55,
-		0xfb, 0x55,
-		0xfc, 0x39,
-		0xfd, 0x55,
-		0xfe, 0xff,
-		0xff, 0xff,
-	
-		0x3, 0x2,
-		0xc0, 0x0,
-		0xc1, 0x0,
-		0xc2, 0xaa,
-		0xc3, 0xaa,
-		0xc4, 0x6,
-		0xc5, 0xab,
-		0xc6, 0x55,
-		0xc7, 0x55,
-		0xc8, 0x01,
-		0xc9, 0x54,
-		0xca, 0xaa,
-		0xcb, 0xbf,
-		0xcc, 0x8,
-		0xcd, 0xab,
-		0xce, 0x55,
-		0xcf, 0xeb,
-		0xd0, 0x6,
-		0xd1, 0x54,
-		0xd2, 0xab,
-		0xd3, 0x5e,
-		0xd4, 0x1,
-		0xd5, 0x2b,
-		0xd6, 0x56,
-		0xd7, 0xb5,
-		0xd8, 0x12,
-		0xd9, 0x94,
-		0xda, 0xad,
-		0xdb, 0x6f,
-		0xdc, 0x2d,
-		0xdd, 0x4b,
-		0xde, 0x5b,
-		0xdf, 0xdb,
-		0xe0, 0x0,
-		0xe1, 0xa4,
-		0xe2, 0xb4,
-		0xe3, 0xb6,
-		0xe4, 0x2,
-		0xe5, 0x5b,
-		0xe6, 0x4b,
-		0xe7, 0x6d,
-		0xe8, 0x5,
-		0xe9, 0x24,
-		0xea, 0xb6,
-		0xeb, 0xdb,
-		0xec, 0x8,
-		0xed, 0x93,
-		0xee, 0x6d,
-		0xef, 0xb7,
-		0xf0, 0x12,
-		0xf1, 0x4c,
-		0xf2, 0x9b,
-		0xf3, 0x6e,
-		0xf4, 0x5,
-		0xf5, 0x33,
-		0xf6, 0x66,
-		0xf7, 0xdd,
-		0xf8, 0x0,
-		0xf9, 0xcc,
-		0xfa, 0x99,
-		0xfb, 0xbb,
-		0xfc, 0x2b,
-		0xfd, 0x33,
-		0xfe, 0x77,
-		0xff, 0x77,
-	
-		0x3, 0x3,
-		0xc0, 0x4,
-		0xc1, 0x88,
-		0xc2, 0xcc,
-		0xc3, 0xcc,
-		0xc4, 0x0,
-		0xc5, 0x67,
-		0xc6, 0x33,
-		0xc7, 0xbb,
-		0xc8, 0x3,
-		0xc9, 0x18,
-		0xca, 0xce,
-		0xcb, 0x77,
-		0xcc, 0x1c,
-		0xcd, 0xc7,
-		0xce, 0x39,
-		0xcf, 0xcf,
-
-		0xd0, 0x2,
-		0xd1, 0x38,
-		0xd2, 0xc7,
-		0xd3, 0x3c,
-		0xd4, 0x1,
-		0xd5, 0x87,
-		0xd6, 0x3c,
-		0xd7, 0xf3,
-		0xd8, 0x4,
-		0xd9, 0x70,
-		0xda, 0xe3,
-		0xdb, 0xcf,
-		0xdc, 0x2b,
-		0xdd, 0xf,
-		0xde, 0x1f,
-		0xdf, 0x3f,
-		0xe0, 0x00,
-		0xe1, 0xe0,
-		0xe2, 0xf0,
-		0xe3, 0xf8,
-		0xe4, 0x14,
-		0xe5, 0x1f,
-		0xe6, 0xf,
-		0xe7, 0xc7,
-		0xe8, 0x3,
-		0xe9, 0x80,
-		0xea, 0xfc,
-		0xeb, 0x3f,
-		0xec, 0x8,
-		0xed, 0x7f,
-		0xee, 0x3,
-		0xef, 0xff,
-		0xf0, 0x4,
-		0xf1, 0x0,
-		0xf2, 0xff,
-		0xf3, 0xc0,
-		0xf4, 0x3,
-		0xf5, 0xff,
-		0xf6, 0x0,
-		0xf7, 0x3f,
-		0xf8, 0x0,
-		0xf9, 0x0,
-		0xfa, 0xff,
-		0xfb, 0xff,
-		0xfc, 0x3f,
-		0xfd, 0xff,
-		0xfe, 0xff,
-		0xff, 0xff,
-		0x3, 0x4,
-	
-	/* Setup the Diter to Pattern33 */
-		0x80, 0xdd,
-		0x81, 0xdd,
-		0x82, 0x33,
-		0x83, 0x33,
-		0x84, 0xdd,
-		0x85, 0xdd,
-		0x86, 0x33,
-		0x87, 0x33,
-		0x88, 0x33,
-		0x89, 0x33,
-		0x8a, 0x77,
-		0x8b, 0x77,
-		0x8c, 0x33,
-		0x8d, 0x33,
-		0x8e, 0x77,
-		0x8f, 0x77,
-		0x90, 0xdd,
-		0x91, 0xdd,
-		0x92, 0x33,
-		0x93, 0x33,
-		0x94, 0xdd,
-		0x95, 0xdd,
-		0x96, 0x33,
-		0x97, 0x33,
-		0x98, 0x33,
-		0x99, 0x33,
-		0x9a, 0x77,
-		0x9b, 0x77,
-		0x9c, 0x33,
-		0x9d, 0x33,
-		0x9e, 0x77,
-		0x9f, 0x77,
-
-		0x4, 0x20,
-		0x5,  0x3,
-		0x6,  0x56,
-		0x7,  0x2,
-		0x8,  0x1c,
-		0x9,  0x0,
-		0xa, 0x26,
-		0xb, 0x0,
-		0xc, 0x15,
-		0xd, 0x4,
-		0xe, 0x50,
-		0xf, 0x4,
-		0x10, 0xfa,
-		0x11, 0x0,
-		0x12, 0xc8,
-		0x13, 0x0,
-		0x14, 0x31,
-		0x15, 0x23,
-		0x16, 0x0,
-
-        /* Enable DSTN panel */
-   		0x2,0x64			
-	};
-   unsigned char index,data;
-   int i;
-
-   gfx_delay_milliseconds(100);     
-   Draco9210GpioInit();
-   Draco9210SetCS();	
-   Draco9210ToggleClock();
-   Draco9210ToggleClock();
-   Draco9210ToggleClock();
-   Draco9210ToggleClock();
-   Draco9210ClearCS();
-   
-#if defined(_WIN32)	/* For Windows */
-	for(i=0;i<10;i++) {
-		_asm {	
-			out 0EDh, al	
-		}
-	} 
-
-#elif defined(linux) /* Linux */
-
-#endif
-
-   for (i=0; i < 630 ; i+=2) {		
-       index = panelvalues[i];
-       data =  panelvalues[i+1];
-       Draco9210WriteReg(index,data); 
-   }
-
-}
-
-static void DracoWriteData(unsigned char data)
-{
-   int i;
-   unsigned char mask = 0x80, databit;
-
-   for (i=0;i <8; i++) {
-
-       databit = data & mask; 
-       if(data & mask) {
-          Draco9210SetDataOut();
-       } else {
-            Draco9210ClearDataOut();
-	   }
-       mask >>= 1;
-       Draco9210ToggleClock();
-   }
-}
-
-static void DracoReadData(unsigned char *data)
-{
-   int i;
-   unsigned char tmp=0, readbit;
-   
-   Draco9210ClearDataOut();
-   Draco9210ToggleClock();
-   for (i=0;i<7;i++) {
-		readbit = Draco9210ReadDataIn();
-		tmp |= (readbit & 0x1);
-		tmp <<= 1;
-		Draco9210ToggleClock();
-   }
-   readbit = Draco9210ReadDataIn();
-   tmp |= (readbit & 0x1);
-   *data = tmp;
-}
-
-#if defined(_WIN32)	/* For Windows */
-
-void Draco9210GpioInit()
-{
-    _asm {
-  	   pushf
-	   cli
-	   mov     dx,  0CF8h
-	   mov     eax, CX55x0_ID+090h
-	   out     dx,  eax
-	   mov     dx,  0CFCh
-	   mov     al,  0CFh		
-	   mov     ah,  00h
-	   out	   dx,  ax
-	   popf    
-    }
-}
-
-void Draco9210SetCS()
-{
-    _asm {
-	pushf
-	mov	   dx,  0CF8h		; Point to PCI address register
-        mov	   eax, CX55x0_ID+090h	; 55XX GPIO data register
-        out	   dx,  eax
-        mov	   dx,  0CFCh		; Point to PCI data register (CFCh)
-
-        in	   ax, dx
-        and    ah, 30h
-        mov	   ah, c92DataReg
-        or	   ah, CS9210
-	mov	   c92DataReg, ah
-	out	   dx, ax
-	popf    
-    }
-}
-
-void Draco9210ClearCS()
-{
-    _asm {
-	pushf
-	mov	    dx,  0CF8h		; Point to PCI address register
-    	mov	    eax, CX55x0_ID+090h	; 55XX GPIO data register
-	out	    dx,  eax
-        mov	    dx,  0CFCh		; Point to PCI data register (CFCh)
-
-	; Set CS LOW
-        in	    ax, dx
-        mov	    ah, c92DataReg
-        and	    ah, NOT CS9210
-        mov	    c92DataReg, ah
-        out	    dx, ax
-        popf
-   }
-}
-
-void Draco9210SetDataOut()
-{
-	_asm {
-	    pushf
-	    mov    dx,  0CF8h	    ; Point to PCI address register
-	    mov    eax, CX55x0_ID+090h   ; 55XX GPIO data register
-	    out    dx,  eax
-	    mov    dx,  0CFCh	    ; Point to PCI data register (CFCh)
-	    ; Set DATA HIGH
-            in     ax, dx
-	    mov    ah, c92DataReg
-	    or     ah, DATAOUT9210
-	    mov    c92DataReg, ah
-	    out    dx, ax
-	    popf
-	}
-}
-
-void Draco9210ClearDataOut()
-{
-	_asm{
-		pushf
-	    mov     dx,  0CF8h	   ; Point to PCI address register
-	    mov     eax, CX55x0_ID+090h  ; 55XX GPIO data register
-	    out     dx,  eax
-	    mov     dx,  0CFCh	   ; Point to PCI data register (CFCh)
-	    ; Set Data LOW
-            in      ax, dx
-            mov     ah, c92DataReg
-	    and     ah, NOT DATAOUT9210
-            mov     c92DataReg, ah
-	    out     dx, ax
-            popf
-	}
-}
-
-unsigned char Draco9210ReadDataIn()
-{
-	unsigned char readdata;
-    _asm{
-	pushf
-        mov	dx,  0CF8h	     ; Point to PCI address register
-	mov	eax, CX55x0_ID+090h  ; 55XX GPIO data register
-	out	dx,  eax
-	mov	dx,  0CFCh	     ; Point to PCI data register (CFCh)
-
- 	in	ax, dx
-        and	ah, DATAIN9210       ; Preserve just Data IN bit
-        mov	al, ah
-        cmp	al, 0		     ; Is it LOW?
-        je		readDataLow
-        mov	al, 1		     ; must be HIGH
-            
-   readDataLow:
-	    mov readdata,al
-	    popf
-	}
-    return (readdata);
-}
-
-
-void Draco9210ToggleClock()
-{
-	_asm{
-	    pushf
-            mov	  dx,  0CF8h		; Point to PCI address register
-	    mov	  eax, CX55x0_ID+090h	; 55XX GPIO data register
-	    out	  dx,  eax
-	    mov	  dx,  0CFCh		; Point to PCI data register (CFCh)
-
-	    ; SET CLOCK
-            in	  ax, dx
-            mov	  ah, c92DataReg
-            or	  ah, CLOCK9210
-	    mov	  c92DataReg, ah
-	    out	  dx, ax
-	    out	  0EDh, al	/*	IOPAUSE */
-
-            mov	  dx,  0CF8h		; Point to PCI address register
-	    mov	  eax, CX55x0_ID+090h	; 55XX GPIO data register
-            out	  dx,  eax
-	    mov	  dx,  0CFCh		; Point to PCI data register (CFCh)
-
-	    ; CLEAR CLOCK
-            in	  ax, dx
-            mov	  ah, c92DataReg
-	    and	  ah, NOT CLOCK9210
-            mov	  c92DataReg, ah
-	    out	  dx, ax
-            popf
-	}
-}
-
-#elif defined(linux) /* Linux */
-
-	void Draco9210GpioInit(){}
-	void Draco9210SetCS(){}
-	void Draco9210ClearCS(){}
-	void Draco9210SetDataOut(){}
-	void Draco9210ClearDataOut(){}
-	unsigned char Draco9210ReadDataIn(){}
-	void Draco9210ToggleClock(){}
-
-#endif
-
-unsigned char Draco9210ReadReg(unsigned char index)
-{
-	unsigned char  data;
-
-	Draco9210SetCS();
-	Draco9210ToggleClock();
-	Draco9210SetDataOut();
-	Draco9210ToggleClock();
-	Draco9210ClearDataOut();
-	Draco9210ToggleClock();
-	Draco9210ClearDataOut();
-	Draco9210ToggleClock();
-	Draco9210ClearDataOut();
-	Draco9210ToggleClock();
-
-	DracoWriteData(index);
-	DracoReadData(&data);
-
-	return (data);
-}
-
-void Draco9210WriteReg(unsigned char index, unsigned char data)
-{
-   
-	Draco9210SetCS();
-	Draco9210ToggleClock();
-
-	Draco9210SetDataOut();
-	Draco9210ToggleClock();
-
-	Draco9210ClearDataOut();
-	Draco9210ToggleClock();
-
-	Draco9210ClearDataOut();
-	Draco9210ToggleClock();
-
-	Draco9210SetDataOut();
-	Draco9210ToggleClock();
-
-	DracoWriteData(index);
-	DracoWriteData(data);
-
-
-	Draco9210ClearDataOut();
-	Draco9210ToggleClock();
-
-	Draco9210ClearCS();
-	Draco9210ToggleClock();
-	Draco9210ToggleClock();
-
-}
-
-
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/panel/platform.c b/xc/programs/Xserver/hw/xfree86/drivers/geode/panel/platform.c
deleted file mode 100644
index cc5e04d99..000000000
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/panel/platform.c
+++ /dev/null
@@ -1,742 +0,0 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/panel/platform.c,v 1.2 2002/10/18 20:02:41 tsi Exp $ */ 
-/*
- * $Workfile: platform.c $
- * $Revision: 1.1.1.1 $
- *
- * File Contents: This file contains platform dependent functions
- *                which provide interface to that platform.
- *
- *
- * SubModule:     Geode FlatPanel library
- *
- */
-
-/* 
- * NSC_LIC_ALTERNATIVE_PREAMBLE
- *
- * Revision 1.0
- *
- * National Semiconductor Alternative GPL-BSD License
- *
- * National Semiconductor Corporation licenses this software 
- * ("Software"):
- *
- * Panel Library
- *
- * under one of the two following licenses, depending on how the 
- * Software is received by the Licensee.
- * 
- * If this Software is received as part of the Linux Framebuffer or
- * other GPL licensed software, then the GPL license designated 
- * NSC_LIC_GPL applies to this Software; in all other circumstances 
- * then the BSD-style license designated NSC_LIC_BSD shall apply.
- *
- * END_NSC_LIC_ALTERNATIVE_PREAMBLE */
-
-/* NSC_LIC_BSD
- *
- * National Semiconductor Corporation Open Source License for 
- *
- * Panel Library
- *
- * (BSD License with Export Notice)
- *
- * Copyright (c) 1999-2001
- * National Semiconductor Corporation.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without 
- * modification, are permitted provided that the following conditions 
- * are met: 
- *
- *   * Redistributions of source code must retain the above copyright 
- *     notice, this list of conditions and the following disclaimer. 
- *
- *   * Redistributions in binary form must reproduce the above 
- *     copyright notice, this list of conditions and the following 
- *     disclaimer in the documentation and/or other materials provided 
- *     with the distribution. 
- *
- *   * Neither the name of the National Semiconductor Corporation nor 
- *     the names of its contributors may be used to endorse or promote 
- *     products derived from this software without specific prior 
- *     written permission. 
- * 
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
- * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
- * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE,
- * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
- * OF SUCH DAMAGE.
- *
- * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
- * YOUR JURISDICTION. It is licensee's responsibility to comply with 
- * any export regulations applicable in licensee's jurisdiction. Under 
- * CURRENT (2001) U.S. export regulations this software 
- * is eligible for export from the U.S. and can be downloaded by or 
- * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
- * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
- * Syria, Sudan, Afghanistan and any other country to which the U.S. 
- * has embargoed goods and services. 
- *
- * END_NSC_LIC_BSD */
-
-/* NSC_LIC_GPL
- *
- * National Semiconductor Corporation Gnu General Public License for 
- *
- * Panel Library
- *
- * (GPL License with Export Notice)
- *
- * Copyright (c) 1999-2001
- * National Semiconductor Corporation.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without 
- * modification, are permitted under the terms of the GNU General 
- * Public License as published by the Free Software Foundation; either 
- * version 2 of the License, or (at your option) any later version  
- *
- * In addition to the terms of the GNU General Public License, neither 
- * the name of the National Semiconductor Corporation nor the names of 
- * its contributors may be used to endorse or promote products derived 
- * from this software without specific prior written permission. 
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
- * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
- * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, 
- * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
- * OF SUCH DAMAGE. See the GNU General Public License for more details. 
- *
- * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
- * YOUR JURISDICTION. It is licensee's responsibility to comply with 
- * any export regulations applicable in licensee's jurisdiction. Under 
- * CURRENT (2001) U.S. export regulations this software 
- * is eligible for export from the U.S. and can be downloaded by or 
- * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
- * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
- * Syria, Sudan, Afghanistan and any other country to which the U.S. 
- * has embargoed goods and services. 
- *
- * You should have received a copy of the GNU General Public License 
- * along with this file; if not, write to the Free Software Foundation, 
- * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 
- *
- * END_NSC_LIC_GPL */
-
-
-#define LINUX_ROM_SEGMENT 0x000F
-#define SEGMENT_LENGTH  0xFFFF
-#define PAGE_LENGTH     0x1000
-#define SYS_BOARD_NAME_LEN 24
-
-#define PLT_READ         0		
-#define PLT_WRITE        1		
-#define PLT_WRITE_BYTES  2		
-#define PLT_READ_BYTES   3		
-#define PLT_WRITE_WORDS  4		
-#define PLT_READ_WORDS   5		
-#define PLT_WRITE_DWORDS 6		
-#define PLT_READ_DWORDS  7		
-#define PLT_UNKNOWN 		0xFFFF
-
-typedef struct {
-	char sys_board_name[SYS_BOARD_NAME_LEN];
-	SYS_BOARD sys_board;
-} SYS_BOARD_INFO;
-
-static SYS_BOARD_INFO Sys_info;
-
-/*
- * The names in the sys_board_name string must exactly match the names in the
- * BIOS header. These names are used by FindStringInSeg() to find the names 
- * in the BIOS header space. The BIOS does not use OTHER; it is a dummy value 
- * for program useonly. 
- *
- */
- 
- SYS_BOARD_INFO Sys_board_info_array[] = {
-	{"Marmot", MARMOT_PLATFORM },
-	{"Unicorn", UNICORN_PLATFORM },
-	{"Centaurus", CENTAURUS_PLATFORM },
-	{"Aries", ARIES_PLATFORM },
-	{"Carmel", CARMEL_PLATFORM },
-	{"Hyrda", HYDRA_PLATFORM },
-	{"Dorado", DORADO_PLATFORM },
-	{"Redcloud", REDCLOUD_PLATFORM },
-	{"Other", OTHER_PLATFORM}
-};
-
-#define NUM_SYS_BOARD_TYPES sizeof(Sys_board_info_array)/sizeof(SYS_BOARD_INFO)
-
-static int Num_sys_board_type = NUM_SYS_BOARD_TYPES;
-SYS_BOARD_INFO *Sys_board_array_base = Sys_board_info_array;
-int FindStringInSeg(unsigned int, char *);
-static unsigned char get_sys_board_type(SYS_BOARD_INFO *, SYS_BOARD_INFO *);
-
-#if defined(linux) && !defined(__KERNEL__) 
-#if defined(XFree86Server) && !defined(IN_MODULE)
-static void protected_mode_access(unsigned int, unsigned int, 
-				unsigned long, unsigned char* );
-static void setup_pma();
-static void close_pma();
-static int     fd;
-#endif /* IN_MODULE */
-#endif /* __KERNEL__ */
-
-
-/* Detect the Platform */
-int Detect_Platform(void)
-{
-#if defined(linux) && !defined(__KERNEL__) 
-#if defined(XFree86Server) && !defined(IN_MODULE)
-	setup_pma();		
-
-#endif /* IN_MODULE */
-
-#endif /* __KERNEL__ */
-
-        /* See if we can find the board name using Xpressrom */
-	if (get_sys_board_type(&Sys_info, Sys_board_array_base) == TRUE ) {
-#if 0
-		if( Sys_info.sys_board == CENTAURUS_PLATFORM) { 
-			printk("CENTAURUS Platform Found\n");
-		} 
-		else 
-		if (Sys_info.sys_board == DORADO_PLATFORM) {
-			printk("DORADO Platform Found \n");
-		} 
-		else {
-			printk("UNKNOWN Platform Found \n");
-		}	
-#endif
-}
-
-#if defined(linux) && !defined(__KERNEL__) 
-#if defined(XFree86Server) && !defined(IN_MODULE)
-	close_pma();
-#endif /* IN_MODULE */
-#endif /* __KERNEL__ */
-
-return (Sys_info.sys_board);
-}
-
-static int Strncmp(char *str1, char *str2, int len ) 
-{
-	int i;
-	if((str1 == 0x0) || (str2 == 0x0) || (len == 0))
-		return (1);
-	for(i = 0; i < len; i++) {
-		if(*(str1+i) > *(str2+i)) {
-			return 1;
-		} 
-		else 
-			if(*(str1+i) < *(str2+i)) {
-				return -1;
-			}
-	}	
-	return 0;
-}
-		
-static char *Strcpy(char *dst, char *src) 
-{
-	int i;
-	if((dst == 0x0) || (src == 0x0))
-		return (0);
-	for(i = 0; src[i] != 0x0; i++)
-	{
-		dst[i] = src[i];
-	}
-	dst[i] = 0x0; /* NULL termination */
-		return dst;
-}
-		
-static int Strlen(char *str) 
-{
-	int i;
-	if(str == 0x0)
-		return 0;
-	for(i = 0; str[i] != 0x0; i++);
-		return i;
-}
-		
-/***********************************************************************/
-
-/* Platform Detection Code */
-
-/***********************************************************************/
-
-/************************************************************************
- * int FindStringInSeg( unsigned int segment_address, char *string_ptr )
- * Returns the offset where the NULL terminated string pointed to by 
- * string_ptr is located in the segment passed in segment_address.
- * Segment_address must be of the form 0xXXXX (i.e 0xf000 for segment f).
- * Returns NULL if the string is not found.
- ************************************************************************
- */
-int FindStringInSeg( unsigned int segment_address, char *string_ptr )
-{
-	int string_length = Strlen( string_ptr );
-	char *psegment_buf;
-	unsigned long mem_ptr = (unsigned long)segment_address << 16;
-	unsigned char segment_buffer[SEGMENT_LENGTH + 1 ];
-	int i, cursor;
-
-	/* silence compiler */
-	(void) cursor;
-	(void) mem_ptr;
-	(void) segment_buffer;
-	
-#if defined(linux) 
-#if defined(__KERNEL__) 
-	XpressROMPtr = (unsigned char *)ioremap(mem_ptr, SEGMENT_LENGTH+1);
-	psegment_buf = (char *)XpressROMPtr;
-#else
-#if defined(XFree86Server) && defined(IN_MODULE)
-	psegment_buf = (char *)XpressROMPtr;
-#else
-	/* Fill the segment_buffer with 16 page accesses */
-
-	for(cursor = 0; (cursor * PAGE_LENGTH) < SEGMENT_LENGTH; cursor++) {
-		protected_mode_access(PLT_READ_BYTES, PAGE_LENGTH, mem_ptr +
-			(cursor * PAGE_LENGTH ),
-			 &(segment_buffer[( cursor * PAGE_LENGTH )]) );
-	}
-	psegment_buf = segment_buffer;
-#endif /* defined(XFree86Server) && defined(IN_MODULE) */
-#endif /* __KERNEL__ */
-
-#elif defined(_WIN32) /* Windows */
-	psegment_buf = XpressROMPtr;
-#endif 
-	/* Now search for the first character of the string_ptr */
-	for(i = 0; i < SEGMENT_LENGTH + 1 ; i++) {
-		if(*(psegment_buf + i) == *string_ptr) {
-		
-			/* If we match the first character, do a
-			 * string compare.
-			 */
-
-			if(!Strncmp(string_ptr, (psegment_buf + i),
-				 string_length )) {
-				/* They match! */
-				return(1);
-			} 
-		}
-	}
-	/* if we got this far we didn't find anything.  Return NULL. */
-	return(0);
-
-} /* end FindStringInSeg() */
-	
-
-/**********************************************************************
-
- * TRUE_FALSE get_sys_board_type( SYS_BOARD_INFO *sys_info,
- * SYS_BOARD_INFO *sys_board_array_base)  Checks the system
- * BIOS area for Xpressrom information. If found, searches the  BIOS 
- * area for one of names in the array pointed to by sys_board_array_ptr.
- * If a match is found, sets the SYS_INFO system_board_name string 
- * and the system_board variable to the board name and returns TRUE. 
- * If Xpressrom or a board is not found, sets the variables to 
- * their default values and returns FALSE.
- * Uses the global string pointer *xpress_rom_string_ptr.
- *
- ***********************************************************************
- */
-
-static unsigned char get_sys_board_type( SYS_BOARD_INFO *sys_info, 
-				SYS_BOARD_INFO *sys_board_array_base )
-{
-	int index;
-	char *xpress_rom_string_ptr = "XpressStart";
-	unsigned int segment = LINUX_ROM_SEGMENT;
-
-	/* See if XpressStart is present in the BIOS area. 
-	 * If it is, search for a board string.  If not, Xpressrom is 
-	 * not present, set system_board information to UNKNOWN and 
-	 * return FALSE. 
-	 */
-	
-	if (!FindStringInSeg(segment, xpress_rom_string_ptr )) {
-		sys_info->sys_board = PLT_UNKNOWN;
-		Strcpy( sys_info->sys_board_name, "Unknown" );
-		return( FALSE );
-	} 
-	else {
-         
-		/* we have Xpressrom, so look for a board */
-		for(index = 0; index < Num_sys_board_type; index++) {
-			if (!FindStringInSeg(segment, (sys_board_array_base + 
-					index)->sys_board_name )) {
-				continue;
-			} 
-			else {
-	       
-				/* a match!! */
-				sys_info->sys_board = 
-				( sys_board_array_base + index )->sys_board;
-				Strcpy(sys_info->sys_board_name,
-				(sys_board_array_base+index )->sys_board_name );
-				return( TRUE );
-			}
-		} /* end for() */
-	} /* end else */
-
-	/* if we are here we have failed */
-	sys_info->sys_board = PLT_UNKNOWN;
-	Strcpy( sys_info->sys_board_name, "Unknown" );
-	return( FALSE );
-} /* end get_sys_board_type() */
-
-#if defined(linux) && !defined(__KERNEL__) 
-#if defined(XFree86Server) && !defined(IN_MODULE)
-
-/******************************************************************
- *
- * protected_mode_access( unsigned int mode, unsigned int width,
- * unsigned long addr, unsigned char* pdata )
- * This function provides access to physical memory
- * at the requested address.
- * mode is: PLT_READ or PLT_WRITE (accesses a single byte, word 
- * or double word depending on the value of "width". 
- * Only 1, 2 or 4 supported).
- * PLT_READ_BYTES, PLT_WRITE_BYTES accesses "width" number 
- * of bytes (8 bits)
- * PLT_READ_WORDS, PLT_WRITE_WORDS accesses "width" number
- * of words (16 bits) PLT_READ_DWORDS, PLT_WRITE_DWORDS accesses 
- * "width" number of dwords (32 bits)
- * width is: The size of the access.  
- * For PLT_READ or PLT_WRITE, only 1, 2 and 4 are
- * supported.  For other modes, width is not limited but 
- * will cause paging if the block traverses page boundaries.  
- * addr is: The physical address being accessed
- * pdata is: A pointer to the data to be read or written into.
- * NOTE! WORD or DWORD accesses can only be made on 
- * WORD or DWORD boundaries!
- *
- ******************************************************************
- */
-
-static void protected_mode_access( unsigned int mode, unsigned int width, 
-           			   unsigned long addr, unsigned char* pdata ) 
-{
-
-#define PMTRASH 0x12345678L
-
-	unsigned long base;	/* The physical page address */
-	int length = 0x1000;	/* the page size is 4k */
-	unsigned int offset = 0;	/* The physical addr offset into page */
-	unsigned int  index = 0;	/* Used to read/write from/to a block */
-	unsigned int  chunk = 0;    /* The amount to read/wr from THIS block */
-	unsigned int  size = 0;     /* Data size shift value (to avoid math) */
-	static void   *ptr;         /* pointer to real memory location. */
-
-	static unsigned long lastbase = PMTRASH;
-	
-	/* temp storage of previous base used. */
-	/* type specific buffer pointers */
-	unsigned char*  byte_data  =  (unsigned char*)pdata;
-	unsigned int*  word_data  =  (unsigned int*)pdata;
-	unsigned long*  dword_data = (unsigned long*)pdata; 
-	
-	switch( mode ) {
-		
-		case PLT_READ_WORDS:
-		case PLT_WRITE_WORDS: 
-
-			size = 1; 
-			break;
-
-		case PLT_READ_DWORDS:
-		case PLT_WRITE_DWORDS:
-			
-			size = 2;
-	}
-	
-	/* Check if we're in the user accessable range */
-	if (addr < 0xFF000000L ) {
-		
-		/* We get physical memory in "pages", defined by the 
-		 * following "base" address and the "offset" into it.
-		 * "base" will be used with mmap to get "ptr", which 
-		 * points to the memory mapped actual physical memory at 
-		 * the address pointed-to by "base". 
-		 * "width" and "chunk" are in units of whatever data 
-		 * type we're reading.  
-		 * "length" and "offset" are in units of bytes.  
-		 * "width" and "chunk" must be adjusted with "<<size" 
-		 * to use with "length" or "offset".  Similarly, the 
-		 * result must be adjusted with ">>size" to make into the 
-		 * proper type units when done.
-		*/
-		base   = addr & 0xFFFFF000L;
-		offset = addr & 0x00000FFFL;
-		do {
-			if (( offset + ( width << size )) > length ) {
-				
-				/* Block being read extends beyond the 
-				 * page boundary. Adjust things. 
- 				 */
-				chunk = (length - offset) >> size; 
-
-				/* Figure the chunk size */
-				width -= chunk; 
-
-				/* Reduce width by the current chunk */
-			} 
-			else {
-			
-				/* Block being read is within the 
-				 * page boundary.
-				 */
-				chunk = width;
-				width = 0;
-
-				/* set to zero so we'll exit at the end */
-
-			}
-			/* We keep the page around in case we need to
-			 * access it again.
-			 * This saves us some time if we have consecutive 
-			 * accesses.
-        	    	 */
-       
-			if (base != lastbase) {   
-			
-				/* we haven't mmap'd this address 
-				 * Have to get a new page.  Free the
-				 * previous page, if it's valid  (ie, not 
-				 * PMTRASH). If not, unmap it and get the 
-				 * new page. 
-				 */
-				if (lastbase != PMTRASH) 
-					munmap(ptr, length);
-				ptr = mmap(NULL, length, PROT_READ | PROT_WRITE, 						MAP_SHARED, fd, base);
-				if ( (int) ptr == -1 ) {
-					lastbase = PMTRASH;
-					return;  /* error */
-				}
-			} 
-      
-			/* Now we're ready to get the data.  
-			 * It's pure memory access now, no funny 
-			 * function calls, however we do cast things to get 
-			 * the right size data.
-			 */
-
-			/* Scale the offset for the data type size */
-			index = offset >> size;
-
-			/* Note that the above line and below lines, 
-			 * which shift "offset", discard address information 
-			 * if you happen to be trying to write, for example,
-			 * dwords on non-dword boundaries.
-			 */
-			/* Note that cases PLT_READ and PLT_WRITE don't 
-			 * use "index". They shift "offset"  on their own. 
-			 * This is because in PLT_READ and PLT_WRITE modes, 
-			 * the information on the size of the data 
-			 * transaction is in the "width" variable not "size".
-			 * We also need separate cases to cast the values 
-			 * right. 
-			 */
-			switch( mode ) {
-			
-				case PLT_READ: {
-
-				switch( chunk ) {
-					
-						case FOUR_BYTES: 
-						
-						*(dword_data) = 
-							(unsigned long)
-						(*(((unsigned long*)ptr) +
-						(offset>>2)));
-						break;
-						
-						case TWO_BYTES: 
-						
-						*(word_data) = 
-							(unsigned int)
-						(*(((unsigned int *)ptr) +
-						(offset>>1)));
-						break;
-                   
-						default:
-						
-						*(byte_data) = 
-						(unsigned char)
-						(*(((unsigned char *)ptr) +
-			                         ( offset )));
-						break;
-
-				} /* end switch() */
-				break;
-
-				} /* end case PLT_READ */
-        
-				case PLT_WRITE: {
-				
-				switch( chunk ) {
-					
-					case FOUR_BYTES: 
-					
-					*(((unsigned long*)ptr) +
-					(offset>>2)) = *dword_data;
-					break;
-				
-					case TWO_BYTES: 
-				
-					*(((unsigned int *)ptr) + 
-					(offset>>1)) = *word_data;
-					break;
-
-					default:
-
-					*(((unsigned char *)ptr) + 
-					( offset )) = *byte_data;
-					break;
-				} /* end switch() */
-				break;
-
-				} /* end case PLT_WRITE */
-        
-				case PLT_READ_BYTES: {
-				
-					for( ; chunk > 0; chunk-- ) {
-					
-						*(byte_data++) = (unsigned char)						(*(((unsigned char*)ptr) +
-						(index++)));
-					}
-					break;
-				} /* end case PLT_READ_BYTES */
-        
-				case PLT_WRITE_BYTES: {
-         
-				for( ; chunk > 0; chunk-- ) {
-					*(((unsigned char*)ptr)+(index++)) = 
-						*(byte_data++);
-				}
-				break;
-
-				}  /* end case PLT_WRITE_BYTES */
-
-				case PLT_READ_WORDS: {
-					
-				for( ; chunk > 0; chunk-- ) {
-
-					*(word_data++) = (unsigned int)
-					(*(((unsigned int*)ptr)+ (index++)));
-				}
-				break;
-
-				} /* end case PLT_READ_WORDS */
-        
-				case PLT_WRITE_WORDS: {
-        
-				for( ; chunk > 0; chunk-- ) {
-				
-					*(((unsigned int*)ptr)+(index++)) = 
-						*(word_data++);
-				}
-				break;
-
-				} /* end case PLT_WRITE_WORDS */
-
-				case PLT_READ_DWORDS: {
-
-				for( ; chunk > 0; chunk-- ) {
-				
-					*(dword_data++) = 
-					(*(((unsigned long*)ptr)+(index++)));
-				}
-				break;
-
-				} /* end case PLT_READ_DWORDS */
-
-				case PLT_WRITE_DWORDS: {
-
-				for( ; chunk > 0; chunk-- ) {
-				
-					*(((unsigned long*)ptr)+(index++)) 
-						= *(dword_data++);
-				}
-				break;
-
-				} /* end case PLT_WRITE_DWORDS */
-
-			} /* end switch(mode) */
-
-			lastbase = base;  
-			
-			/* Save the page we've just processed. */
-
-			if( width ) { 
-				
-				/* If there's still width left to get. */
-				
-				base += length;
-				/* Increment to the next page. */
-
-				offset = 0;
-				/* Set the offset to zero. */
-			}
-
-		} while( width );  /* While there's still data to get. */
-		return;
-
-	} /* end for if addr */ 
-	else {
-
-		printf( "PMA error: Unable to read ROM address space\n" );
-		exit( 1 );
-  	}
-	return;
-}
-
-/************************************************************************
- * setup_pma() loads the ROM memory access module and initializes 
- * memory access file descriptor (access is handled through a file-like 
- * interface).
- ************************************************************************
- */
-static void setup_pma() 
-{
-	fd = open( "/dev/mem", 2); /*  O_RDWR */
-	if (fd == -1 ) {
-		
-		printf( "Error: Unable to open /dev/mem !\a\n" );
-		exit( 1 );
-	}
-	return;
-}
-
-/**********************************************************************
- * close_pma() cleans up the open memory access devices and file 
- * descriptors.
- **********************************************************************
- */
-static void close_pma() 
-{
-	close( fd );
-	return;
-}
-#endif /* IN_MODULE */
-#endif /* linux && !__KERNEL__ */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/glint/Imakefile b/xc/programs/Xserver/hw/xfree86/drivers/glint/Imakefile
index d834a8ebe..2290d16b8 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/glint/Imakefile
+++ b/xc/programs/Xserver/hw/xfree86/drivers/glint/Imakefile
@@ -1,4 +1,4 @@
-XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/drivers/glint/Imakefile,v 1.37 2002/02/25 00:44:07 dawes Exp $
+XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/drivers/glint/Imakefile,v 1.39 2003/02/17 17:06:42 dawes Exp $
 XCOMM
 XCOMM This is an Imakefile for the GLINT driver.  
 XCOMM
@@ -42,7 +42,7 @@ INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86OSSRC) -I$(SERVERSRC)/Xext \
            -I$(XF86SRC)/xf4bpp -I$(SERVERSRC)/include -I$(XINCLUDESRC) \
 	   -I$(XF86SRC)/ddc -I$(XF86SRC)/i2c -I$(EXTINCSRC) $(DRIINCLUDES) \
 	   -I$(XF86SRC)/shadowfb -I$(XF86SRC)/fbdevhw \
-	   -I$(XF86OSSRC)/vbe \
+	   -I$(XF86SRC)/vbe \
 	   -I$(SERVERSRC)/render
 #endif
 
@@ -75,6 +75,7 @@ InstallDriverSDKNonExecFile(glint_driver.c,$(DRIVERSDKDIR)/drivers/glint)
 InstallDriverSDKNonExecFile(glint_dga.c,$(DRIVERSDKDIR)/drivers/glint)
 InstallDriverSDKNonExecFile(glint_regs.h,$(DRIVERSDKDIR)/drivers/glint)
 InstallDriverSDKNonExecFile(glint_shadow.c,$(DRIVERSDKDIR)/drivers/glint)
+InstallDriverSDKNonExecFile(glint_common.h,$(DRIVERSDKDIR)/drivers/glint)
 InstallDriverSDKNonExecFile(pm2_accel.c,$(DRIVERSDKDIR)/drivers/glint)
 InstallDriverSDKNonExecFile(pm2_dac.c,$(DRIVERSDKDIR)/drivers/glint)
 InstallDriverSDKNonExecFile(pm2_video.c,$(DRIVERSDKDIR)/drivers/glint)
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/glint/TIramdac.c b/xc/programs/Xserver/hw/xfree86/drivers/glint/TIramdac.c
index 0220a93f8..e471c01b3 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/glint/TIramdac.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/glint/TIramdac.c
@@ -22,12 +22,12 @@
  * Authors:  Alan Hourihane, <alanh@fairlite.demon.co.uk>
  *
  * Modified from IBMramdac.c to support TI RAMDAC routines 
- *   by Jens Owen, <jens@precisioninsight.com>.
+ *   by Jens Owen, <jens@tungstengraphics.com>.
  *
  * glintOutTIIndReg() and glintInTIIndReg() are used to access 
  * the indirect TI RAMDAC registers only.
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/glint/TIramdac.c,v 1.4 2001/01/31 16:14:52 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/glint/TIramdac.c,v 1.5 2002/10/30 12:52:15 alanh Exp $ */
 
 #include "xf86.h"
 #include "xf86_OSproc.h"
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/glint/glint.h b/xc/programs/Xserver/hw/xfree86/drivers/glint/glint.h
index 7a497b434..58c1a8cb3 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/glint/glint.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/glint/glint.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/glint/glint.h,v 1.56 2002/06/06 22:33:40 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/glint/glint.h,v 1.58 2003/02/17 16:08:28 dawes Exp $ */
 /*
  * Copyright 1997-2001 by Alan Hourihane <alanh@fairlite.demon.co.uk>
  *
@@ -71,6 +71,7 @@ typedef struct {
 typedef struct {
     pciVideoPtr		PciInfo;
     pciVideoPtr		MultiPciInfo[GLINT_MAX_MULTI_DEVICES];
+    int			MultiIndex;
     int			numMultiDevices;
     int			MultiChip;
     Bool		MultiAperture;
@@ -307,8 +308,6 @@ void Permedia2WriteAddress(ScrnInfoPtr pScrn, CARD32 index);
 void Permedia2ReadAddress(ScrnInfoPtr pScrn, CARD32 index);
 void Permedia2WriteData(ScrnInfoPtr pScrn, unsigned char data);
 unsigned char Permedia2ReadData(ScrnInfoPtr pScrn);
-void TIramdacLoadPalette(ScrnInfoPtr pScrn, int numColors, int *indices,
-    			  LOCO *colors, VisualPtr pVisual);
 void Permedia2LoadPalette(ScrnInfoPtr pScrn, int numColors, int *indices,
     			  LOCO *colors, VisualPtr pVisual);
 void Permedia2LoadPalette16(ScrnInfoPtr pScrn, int numColors, int *indices,
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/glint/glint.man b/xc/programs/Xserver/hw/xfree86/drivers/glint/glint.man
index bc5783bd6..166de51a8 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/glint/glint.man
+++ b/xc/programs/Xserver/hw/xfree86/drivers/glint/glint.man
@@ -1,4 +1,4 @@
-.\" $XFree86: xc/programs/Xserver/hw/xfree86/drivers/glint/glint.man,v 1.5 2001/12/17 20:52:32 dawes Exp $ 
+.\" $XFree86: xc/programs/Xserver/hw/xfree86/drivers/glint/glint.man,v 1.6 2003/02/14 12:03:09 alanh Exp $ 
 .\" shorthand for double quote that works everywhere.
 .ds q \N'34'
 .TH GLINT __drivermansuffix__ __vendorversion__
@@ -22,8 +22,8 @@ following framebuffer depths: 8, 15 (may give bad results with FBDev support),
 The
 .B glint
 driver supports 3Dlabs (GLINT MX, GLINT 500TX, GLINT 300SX, GLINT GAMMA, 
-GLINT DELTA, GLINT GAMMA2, Permedia, Permedia 2, Permedia 2v, Permedia 3, R4) 
-and Texas Instruments (Permedia, Permedia 2) chips.
+GLINT DELTA, GLINT GAMMA2, Permedia, Permedia 2, Permedia 2v, Permedia 3, R3, 
+R4) and Texas Instruments (Permedia, Permedia 2) chips.
 .SH CONFIGURATION DETAILS
 Please refer to XF86Config(__filemansuffix__) for general configuration
 details.  This section only covers configuration details specific to this
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_dri.c b/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_dri.c
index b6ec4fe78..9994b71c6 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_dri.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_dri.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/glint/glint_dri.c,v 1.29 2002/10/08 22:14:07 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/glint/glint_dri.c,v 1.32 2003/02/10 13:20:10 alanh Exp $ */
 /**************************************************************************
 
 Copyright 1998-1999 Precision Insight, Inc., Cedar Park, Texas.
@@ -29,7 +29,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 /*
  * Authors:
- *   Jens Owen <jens@precisioninsight.com>
+ *   Jens Owen <jens@tungstengraphics.com>
  *   Alan Hourihane <alanh@fairlite.demon.co.uk>
  *
  */
@@ -126,11 +126,11 @@ GLINTInitVisualConfigs(ScreenPtr pScreen)
                pConfigs[i].redSize		= 5;
                pConfigs[i].greenSize		= 5;
                pConfigs[i].blueSize		= 5;
-               pConfigs[i].alphaSize		= 5;
+               pConfigs[i].alphaSize		= 1;
                pConfigs[i].redMask		= 0x00007C00;
                pConfigs[i].greenMask		= 0x000003E0;
                pConfigs[i].blueMask		= 0x0000001F;
-               pConfigs[i].alphaMask		= 0x000F1000;
+               pConfigs[i].alphaMask		= 0x00008000;
                if ( accum ) {
                   pConfigs[i].accumRedSize	= 16;
                   pConfigs[i].accumGreenSize	= 16;
@@ -148,7 +148,7 @@ GLINTInitVisualConfigs(ScreenPtr pScreen)
                   pConfigs[i].doubleBuffer	= FALSE;
 	       }
                pConfigs[i].stereo		= FALSE;
-               pConfigs[i].bufferSize		= 16;
+               pConfigs[i].bufferSize		= 20;
                if ( depth ) {
                   pConfigs[i].depthSize		= 16;
                } else {
@@ -221,11 +221,11 @@ GLINTInitVisualConfigs(ScreenPtr pScreen)
                pConfigs[i].redSize		= 8;
                pConfigs[i].greenSize		= 8;
                pConfigs[i].blueSize		= 8;
-               pConfigs[i].alphaSize		= 0;
+               pConfigs[i].alphaSize		= 8;
                pConfigs[i].redMask		= 0x00FF0000;
                pConfigs[i].greenMask		= 0x0000FF00;
                pConfigs[i].blueMask		= 0x000000FF;
-               pConfigs[i].alphaMask		= 0;
+               pConfigs[i].alphaMask		= 0xFF000000;
                if ( accum ) {
                   pConfigs[i].accumRedSize	= 16;
                   pConfigs[i].accumGreenSize	= 16;
@@ -243,7 +243,7 @@ GLINTInitVisualConfigs(ScreenPtr pScreen)
                   pConfigs[i].doubleBuffer	= FALSE;
 	       }
                pConfigs[i].stereo		= FALSE;
-               pConfigs[i].bufferSize		= 32;
+               pConfigs[i].bufferSize		= 24;
                if ( depth ) {
 		     pConfigs[i].depthSize	= 16;
                      pConfigs[i].stencilSize	= 8;
@@ -406,6 +406,7 @@ static Bool GLINTDRIKernelInit( ScreenPtr pScreen )
 
    memset( &init, 0, sizeof(drmGAMMAInit) );
 
+   init.func = GAMMA_INIT_DMA;
    init.sarea_priv_offset = sizeof(XF86DRISAREARec);
 
    init.mmio0 = pGlintDRI->registers0.handle;
@@ -420,7 +421,8 @@ static Bool GLINTDRIKernelInit( ScreenPtr pScreen )
        init.pcimode = 1;
    }
 
-   ret = drmGAMMAInitDMA( pGlint->drmSubFD, &init );
+   ret = drmCommandWrite( pGlint->drmSubFD, DRM_GAMMA_INIT, 
+                          &init, sizeof(drmGAMMAInit) );
 
    if ( ret < 0 ) {
       xf86DrvMsg( pScrn->scrnIndex, X_ERROR,
@@ -553,9 +555,48 @@ GLINTDRIScreenInit(ScreenPtr pScreen)
 	return FALSE;
     }
 
-    /* Check the GLINT DRM version */
+    /* Check the DRM versioning */
     {
-        drmVersionPtr version = drmGetVersion(pGlint->drmSubFD);
+        drmVersionPtr version;
+
+	/* Check the DRM lib version.
+	   drmGetLibVersion was not supported in version 1.0, so check for
+	   symbol first to avoid possible crash or hang.
+	 */
+	if (xf86LoaderCheckSymbol("drmGetLibVersion")) {
+	    version = drmGetLibVersion(pGlint->drmSubFD);
+	}
+	else {
+	    /* drmlib version 1.0.0 didn't have the drmGetLibVersion
+	       entry point.  Fake it by allocating a version record
+	       via drmGetVersion and changing it to version 1.0.0
+	     */
+	    version = drmGetVersion(pGlint->drmSubFD);
+	    version->version_major      = 1;
+	    version->version_minor      = 0;
+	    version->version_patchlevel = 0;
+	}
+
+	if (version) {
+	    if (version->version_major != 1 ||
+		version->version_minor < 1) {
+		/* incompatible drm library version */
+		xf86DrvMsg(pScreen->myNum, X_ERROR,
+		    "[dri] GLINTDRIScreenInit failed because of a version mismatch.\n"
+		    "[dri] libdrm.a module version is %d.%d.%d but version 1.1.x is needed.\n"
+		    "[dri] Disabling DRI.\n",
+		    version->version_major,
+		    version->version_minor,
+		    version->version_patchlevel);
+		drmFreeVersion(version);
+		GLINTDRICloseScreen(pScreen);
+		return FALSE;
+	    }
+	    drmFreeVersion(version);
+	}
+
+        /* Check the GLINT DRM version */
+        version = drmGetVersion(pGlint->drmSubFD);
         if (version) {
             if (version->version_major != 2 ||
                 version->version_minor < 0) {
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_dri.h b/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_dri.h
index 0864bb099..3952759f8 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_dri.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_dri.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/glint/glint_dri.h,v 1.6 2002/02/22 21:45:16 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/glint/glint_dri.h,v 1.7 2002/10/30 12:52:16 alanh Exp $ */
 /**************************************************************************
 
 Copyright 1998-1999 Precision Insight, Inc., Cedar Park, Texas.
@@ -29,15 +29,15 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 /*
  * Author:
- *   Jens Owen <jens@precisioninsight.com>
+ *   Jens Owen <jens@tungstengraphics.com>
  *
  */
 
 #ifndef _GLINT_DRI_H_
 #define _GLINT_DRI_H_
 
-#include <xf86drm.h>
-#include <xf86drmGamma.h>
+#include "xf86drm.h"
+#include "glint_common.h"
 
 typedef struct {
 	unsigned int	GDeltaMode;
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_dripriv.h b/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_dripriv.h
index 83045b727..15d5e487e 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_dripriv.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_dripriv.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/glint/glint_dripriv.h,v 1.5 2000/06/17 10:00:13 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/glint/glint_dripriv.h,v 1.6 2002/10/30 12:52:16 alanh Exp $ */
 /**************************************************************************
 
 Copyright 1998-1999 Precision Insight, Inc., Cedar Park, Texas.
@@ -29,7 +29,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 /*
  * Author:
- *   Jens Owen <jens@precisioninsight.com>
+ *   Jens Owen <jens@tungstengraphics.com>
  *
  */
 
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_driver.c b/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_driver.c
index 449759400..de0c99209 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_driver.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_driver.c
@@ -28,7 +28,7 @@
  * this work is sponsored by S.u.S.E. GmbH, Fuerth, Elsa GmbH, Aachen, 
  * Siemens Nixdorf Informationssysteme and Appian Graphics.
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/glint/glint_driver.c,v 1.150 2002/10/08 22:14:07 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/glint/glint_driver.c,v 1.156 2003/02/17 16:08:28 dawes Exp $ */
 
 #include "fb.h"
 #include "cfb8_32.h"
@@ -275,12 +275,14 @@ static const char *shadowSymbols[] = {
     NULL
 };
 
+#ifdef XFree86LOADER
 static const char *vbeSymbols[] = {
     "VBEInit",
     "vbeDoEDID",
     "vbeFree",
     NULL
 };
+#endif
 
 static const char *ramdacSymbols[] = {
     "IBMramdac526CalculateMNPCForClock",
@@ -341,9 +343,11 @@ const char *GLINTint10Symbols[] = {
 static const char *drmSymbols[] = {
     "drmAddBufs",
     "drmAddMap",
+    "drmCommandWrite",
     "drmCtlInstHandler",
     "drmFreeVersion",
     "drmGetInterruptFromBusID",
+    "drmGetLibVersion",
     "drmGetVersion",
     "drmMapBufs",
     "drmUnmapBufs",
@@ -1383,22 +1387,25 @@ GLINTPreInit(ScrnInfoPtr pScrn, int flags)
     } else {
 	pGlint->IOAddress = pGlint->PciInfo->memBase[0] & 0xFFFFC000;
     }
-#if X_BYTE_ORDER == X_BIG_ENDIAN
-    pGlint->IOAddress += 0x10000;
-#endif
 
     if ((IS_J2000) && (pGlint->Chipset == PCI_VENDOR_3DLABS_CHIP_GAMMA)) {
-	/* Fix up for dual head mode, offset gamma registers at 0x10000 */
+	/* We know which head is the primary on the J2000 board, need a more
+	 * generix solution though.
+	 */
         if ((xf86IsEntityShared(pScrn->entityList[0])) &&
             (xf86IsPrimInitDone(pScrn->entityList[0]))) {
-#if 0 	/* When we need gamma & acceleration, this should be used instead */
 		pGlint->IOAddress += 0x10000;
-#endif
+		pGlint->MultiIndex = 2;
 	} else {
 		xf86SetPrimInitDone(pScrn->entityList[0]);
+		pGlint->MultiIndex = 1;
 	}
-#if 1   /* And then remove this */
-	pGlint->IOAddress = pGlint->MultiPciInfo[0]->memBase[0] & 0xFFFFC000;
+#if X_BYTE_ORDER == X_BIG_ENDIAN
+	GLINT_SLOW_WRITE_REG(
+		GLINT_READ_REG(GCSRAperture) | GCSRBitSwap
+		, GCSRAperture);
+    } else {
+    	pGlint->IOAddress += 0x10000;
 #endif
     }
 
@@ -1864,11 +1871,6 @@ GLINTPreInit(ScrnInfoPtr pScrn, int flags)
 		    RamDacDestroyInfoRec(pGlint->RamDacRec);
 		    return FALSE;
 	    	}
-#if 1 /* REMOVE LATER - see other IS_J2000 fixup code */
-		/* As we push the acceleration through the pm3 (for now) we can
-	 	 * safely set the FIFOSize to 120 again */
-		pGlint->FIFOSize = 120;
-#endif
 		break;
 	    }
 	    if (IS_GMX2000) {
@@ -1930,6 +1932,15 @@ GLINTPreInit(ScrnInfoPtr pScrn, int flags)
 	    break;
     }
 
+    if ( pGlint->RamDac &&
+	 (pGlint->RamDac->RamDacType != (IBM640_RAMDAC)) &&
+	 (pScrn->depth == 30) )
+    {
+    	xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 
+			"Depth 30 not supported for this chip\n");
+	return FALSE;
+    }
+
     if (pGlint->FIFOSize)
     	xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "FIFO Size is %d DWORDS\n",
 	       pGlint->FIFOSize);
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_regs.h b/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_regs.h
index c8f7e0e7a..122832d32 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_regs.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_regs.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/glint/glint_regs.h,v 1.34 2002/07/25 05:06:15 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/glint/glint_regs.h,v 1.36 2003/01/12 03:55:47 tsi Exp $ */
 
 /*
  * glint register file 
@@ -191,47 +191,47 @@
 #define PMRomControl							0x1040
 #define PMBootAddress							0x1080
 #define PMMemConfig							0x10C0
-    #define RowCharge8    1 << 10
-    #define TimeRCD8      1 <<  7
-    #define TimeRC8       0x6 << 3
-    #define TimeRP8       1
-    #define CAS3Latency8  0 << 16
-    #define BootAdress8   0x10
-    #define NumberBanks8  0x3 << 29
-    #define RefreshCount8 0x41 << 21
-    #define TimeRASMin8   1 << 13
-    #define DeadCycle8    1 << 17
-    #define BankDelay8    0 << 18
-    #define Burst1Cycle8  1 << 31
-    #define SDRAM8        0 << 4
-
-    #define RowCharge6    1 << 10
-    #define TimeRCD6      1 <<  7
-    #define TimeRC6       0x6 << 3
-    #define TimeRP6       0x2
-    #define CAS3Latency6  1 << 16
-    #define BootAdress6   0x60
-    #define NumberBanks6  0x2 << 29
-    #define RefreshCount6 0x41 << 21
-    #define TimeRASMin6   1 << 13
-    #define DeadCycle6    1 << 17
-    #define BankDelay6    0 << 18
-    #define Burst1Cycle6  1 << 31
-    #define SDRAM6        0 << 4
-
-    #define RowCharge4    0 << 10
-    #define TimeRCD4      0 <<  7
-    #define TimeRC4       0x4 << 3
-    #define TimeRP4       1 
-    #define CAS3Latency4  0 << 16
-    #define BootAdress4   0x10
-    #define NumberBanks4  1 << 29
-    #define RefreshCount4 0x30 << 21
-    #define TimeRASMin4   1 << 13
-    #define DeadCycle4    0 << 17
-    #define BankDelay4    0 << 18
-    #define Burst1Cycle4  1 << 31
-    #define SDRAM4        0 << 4
+#    define RowCharge8    1 << 10
+#    define TimeRCD8      1 <<  7
+#    define TimeRC8       0x6 << 3
+#    define TimeRP8       1
+#    define CAS3Latency8  0 << 16
+#    define BootAdress8   0x10
+#    define NumberBanks8  0x3 << 29
+#    define RefreshCount8 0x41 << 21
+#    define TimeRASMin8   1 << 13
+#    define DeadCycle8    1 << 17
+#    define BankDelay8    0 << 18
+#    define Burst1Cycle8  1 << 31
+#    define SDRAM8        0 << 4
+
+#    define RowCharge6    1 << 10
+#    define TimeRCD6      1 <<  7
+#    define TimeRC6       0x6 << 3
+#    define TimeRP6       0x2
+#    define CAS3Latency6  1 << 16
+#    define BootAdress6   0x60
+#    define NumberBanks6  0x2 << 29
+#    define RefreshCount6 0x41 << 21
+#    define TimeRASMin6   1 << 13
+#    define DeadCycle6    1 << 17
+#    define BankDelay6    0 << 18
+#    define Burst1Cycle6  1 << 31
+#    define SDRAM6        0 << 4
+
+#    define RowCharge4    0 << 10
+#    define TimeRCD4      0 <<  7
+#    define TimeRC4       0x4 << 3
+#    define TimeRP4       1 
+#    define CAS3Latency4  0 << 16
+#    define BootAdress4   0x10
+#    define NumberBanks4  1 << 29
+#    define RefreshCount4 0x30 << 21
+#    define TimeRASMin4   1 << 13
+#    define DeadCycle4    0 << 17
+#    define BankDelay4    0 << 18
+#    define Burst1Cycle4  1 << 31
+#    define SDRAM4        0 << 4
 
 /* Permedia 2 Control */
 #define MemControl							0x1040
@@ -509,6 +509,7 @@
 
 #define GCSRAperture							0x0878
 #define   GCSRSecondaryGLINTMapEn	1 << 0
+#define   GCSRBitSwap			1 << 1
 
 #define GPageTableAddr							0x0c00
 #define GPageTableLength						0x0c08
@@ -546,26 +547,26 @@
 #define dY									GLINT_TAG_ADDR(0x00,0x05)
 #define GLINTCount							GLINT_TAG_ADDR(0x00,0x06)
 #define Render								GLINT_TAG_ADDR(0x00,0x07)
-	#define AreaStippleEnable					0x00001
-	#define LineStippleEnable					0x00002
-	#define ResetLineStipple					0x00004
-	#define FastFillEnable						0x00008
-	#define PrimitiveLine						0
-	#define PrimitiveTrapezoid					0x00040
-	#define PrimitivePoint						0x00080
-	#define PrimitiveRectangle					0x000C0
-	#define AntialiasEnable         				0x00100
-	#define AntialiasingQuality     				0x00200
-	#define UsePointTable						0x00400
-	#define SyncOnBitMask						0x00800
-	#define SyncOnHostData						0x01000
-	#define TextureEnable           				0x02000
-	#define FogEnable               				0x04000
-	#define CoverageEnable						0x08000
-	#define SubPixelCorrectionEnable				0x10000
-	#define SpanOperation						0x40000
-	#define XPositive			1<<21
-	#define YPositive			1<<22
+#	define AreaStippleEnable					0x00001
+#	define LineStippleEnable					0x00002
+#	define ResetLineStipple					0x00004
+#	define FastFillEnable						0x00008
+#	define PrimitiveLine						0
+#	define PrimitiveTrapezoid					0x00040
+#	define PrimitivePoint						0x00080
+#	define PrimitiveRectangle					0x000C0
+#	define AntialiasEnable         				0x00100
+#	define AntialiasingQuality     				0x00200
+#	define UsePointTable						0x00400
+#	define SyncOnBitMask						0x00800
+#	define SyncOnHostData						0x01000
+#	define TextureEnable           				0x02000
+#	define FogEnable               				0x04000
+#	define CoverageEnable						0x08000
+#	define SubPixelCorrectionEnable				0x10000
+#	define SpanOperation						0x40000
+#	define XPositive			1<<21
+#	define YPositive			1<<22
 
 
 #define ContinueNewLine							GLINT_TAG_ADDR(0x00,0x08)
@@ -596,9 +597,9 @@
 #define PackedDataLimits						GLINT_TAG_ADDR(0x02,0x0a) /* PM only */
 
 #define ScissorMode							GLINT_TAG_ADDR(0x03,0x00)
-        #define                                    	        SCI_USER          0x01
-        #define                                                 SCI_SCREEN        0x02
-        #define                                                 SCI_USERANDSCREEN 0x03
+#	define                                    	        SCI_USER          0x01
+#	define                                                 SCI_SCREEN        0x02
+#	define                                                 SCI_USERANDSCREEN 0x03
 
 #define ScissorMinXY						GLINT_TAG_ADDR(0x03,0x01)
 #define ScissorMaxXY						GLINT_TAG_ADDR(0x03,0x02)
@@ -612,17 +613,17 @@
 	/* XAddress_1bit		*/
 	/* UNIT_DISABLE			*/
 
-	#define ASM_XAddress_2bit					1 << 1
-	#define ASM_XAddress_3bit					2 << 1
-	#define ASM_XAddress_4bit					3 << 1
-	#define ASM_XAddress_5bit					4 << 1
-	#define ASM_YAddress_2bit					1 << 4
-	#define ASM_YAddress_3bit					2 << 4
-	#define ASM_YAddress_4bit					3 << 4
-	#define ASM_YAddress_5bit					4 << 4
-	#define ASM_InvertPattern					1 << 17
-	#define ASM_MirrorX						1 << 18
-	#define ASM_MirrorY						1 << 19
+#	define ASM_XAddress_2bit					1 << 1
+#	define ASM_XAddress_3bit					2 << 1
+#	define ASM_XAddress_4bit					3 << 1
+#	define ASM_XAddress_5bit					4 << 1
+#	define ASM_YAddress_2bit					1 << 4
+#	define ASM_YAddress_3bit					2 << 4
+#	define ASM_YAddress_4bit					3 << 4
+#	define ASM_YAddress_5bit					4 << 4
+#	define ASM_InvertPattern					1 << 17
+#	define ASM_MirrorX						1 << 18
+#	define ASM_MirrorY						1 << 19
 
 #define LineStippleMode						GLINT_TAG_ADDR(0x03,0x05)
 #define LoadLineStippleCounters					GLINT_TAG_ADDR(0x03,0x06)
@@ -656,12 +657,12 @@
 
 #define TextureReadMode						GLINT_TAG_ADDR(0x09,0x00)
 #define TextureFormat						GLINT_TAG_ADDR(0x09,0x01)
-  #define Texture_4_Components 3 << 3
-  #define Texture_Texel        0
+#  define Texture_4_Components 3 << 3
+#  define Texture_Texel        0
 
 #define TextureCacheControl					GLINT_TAG_ADDR(0x09,0x02)
-  #define TextureCacheControlEnable     2
-  #define TextureCacheControlInvalidate 1
+#  define TextureCacheControlEnable     2
+#  define TextureCacheControlInvalidate 1
 
 #define GLINTBorderColor					GLINT_TAG_ADDR(0x09,0x05)
 
@@ -708,10 +709,10 @@
 #define TexelLUTMode						GLINT_TAG_ADDR(0x0c,0x0f)
 
 #define TextureColorMode					GLINT_TAG_ADDR(0x0d,0x00)
-  #define TextureTypeOpenGL 0
-  #define TextureTypeApple  1 << 4
-  #define TextureKsDDA      1 << 5 /* only Apple-Mode */
-  #define TextureKdDDA      1 << 6 /* only Apple-Mode */
+#  define TextureTypeOpenGL 0
+#  define TextureTypeApple  1 << 4
+#  define TextureKsDDA      1 << 5 /* only Apple-Mode */
+#  define TextureKdDDA      1 << 6 /* only Apple-Mode */
 
 #define TextureEnvColor						GLINT_TAG_ADDR(0x0d,0x01)
 #define FogMode							GLINT_TAG_ADDR(0x0d,0x02)
@@ -719,7 +720,7 @@
 	/* FOG RGBA			*/
 	/* UNIT_DISABLE			*/
 
-	#define FOG_CI							0x0002
+#	define FOG_CI							0x0002
 
 #define FogColor							GLINT_TAG_ADDR(0x0d,0x03)
 #define FStart								GLINT_TAG_ADDR(0x0d,0x04)
@@ -746,9 +747,9 @@
 #define dAdyDom								GLINT_TAG_ADDR(0x0f,0x0b)
 #define ColorDDAMode							GLINT_TAG_ADDR(0x0f,0x0c)
 	/* 0:					*/
-	#define CDDA_FlatShading			                0
+#	define CDDA_FlatShading			                0
 	/* UNIT_DISABLE			*/
-	#define CDDA_GouraudShading					0x0002
+#	define CDDA_GouraudShading					0x0002
         
 
 #define ConstantColor						GLINT_TAG_ADDR(0x0f,0x0d)
@@ -766,36 +767,36 @@
 	/* DstFBData				*/
 	/* UNIT_DISABLE				*/
 
-	#define ABM_SrcONE					1 << 1
-	#define ABM_SrcDST_COLOR				2 << 1
-	#define ABM_SrcONE_MINUS_DST_COLOR			3 << 1
-	#define ABM_SrcSRC_ALPHA				4 << 1
-	#define ABM_SrcONE_MINUS_SRC_ALPHA			5 << 1
-	#define ABM_SrcDST_ALPHA				6 << 1
-	#define ABM_SrcONE_MINUS_DST_ALPHA			7 << 1
-	#define ABM_SrcSRC_ALPHA_SATURATE			8 << 1
-	#define ABM_DstONE					1 << 5
-	#define ABM_DstSRC_COLOR				2 << 5
-	#define ABM_DstONE_MINUS_SRC_COLOR			3 << 5
-	#define ABM_DstSRC_ALPHA				4 << 5
-	#define ABM_DstONE_MINUS_SRC_ALPHA			5 << 5
-	#define ABM_DstDST_ALPHA				6 << 5
-	#define ABM_DstONE_MINUS_DST_ALPHA			7 << 5
-	#define ABM_ColorFormat5555				1 << 8
-	#define ABM_ColorFormat4444				2 << 8
-	#define ABM_ColorFormat4444_Front			3 << 8
-	#define ABM_ColorFormat4444_Back			4 << 8
-	#define ABM_ColorFormat332_Front			5 << 8
-	#define ABM_ColorFormat332_Back				6 << 8
-	#define ABM_ColorFormat121_Front			7 << 8
-	#define ABM_ColorFormat121_Back				8 << 8
-	#define ABM_ColorFormat555_Back				13 << 8
-	#define ABM_ColorFormat_CI8				14 << 8
-	#define ABM_ColorFormat_CI4				15 << 8
-	#define ABM_NoAlphaBuffer				0x1000
-	#define ABM_ColorOrderRGB				0x2000
-	#define ABM_TypeQuickDraw3D				0x4000
-	#define ABM_DstFBSourceData				0x8000
+#	define ABM_SrcONE					1 << 1
+#	define ABM_SrcDST_COLOR				2 << 1
+#	define ABM_SrcONE_MINUS_DST_COLOR			3 << 1
+#	define ABM_SrcSRC_ALPHA				4 << 1
+#	define ABM_SrcONE_MINUS_SRC_ALPHA			5 << 1
+#	define ABM_SrcDST_ALPHA				6 << 1
+#	define ABM_SrcONE_MINUS_DST_ALPHA			7 << 1
+#	define ABM_SrcSRC_ALPHA_SATURATE			8 << 1
+#	define ABM_DstONE					1 << 5
+#	define ABM_DstSRC_COLOR				2 << 5
+#	define ABM_DstONE_MINUS_SRC_COLOR			3 << 5
+#	define ABM_DstSRC_ALPHA				4 << 5
+#	define ABM_DstONE_MINUS_SRC_ALPHA			5 << 5
+#	define ABM_DstDST_ALPHA				6 << 5
+#	define ABM_DstONE_MINUS_DST_ALPHA			7 << 5
+#	define ABM_ColorFormat5555				1 << 8
+#	define ABM_ColorFormat4444				2 << 8
+#	define ABM_ColorFormat4444_Front			3 << 8
+#	define ABM_ColorFormat4444_Back			4 << 8
+#	define ABM_ColorFormat332_Front			5 << 8
+#	define ABM_ColorFormat332_Back				6 << 8
+#	define ABM_ColorFormat121_Front			7 << 8
+#	define ABM_ColorFormat121_Back				8 << 8
+#	define ABM_ColorFormat555_Back				13 << 8
+#	define ABM_ColorFormat_CI8				14 << 8
+#	define ABM_ColorFormat_CI4				15 << 8
+#	define ABM_NoAlphaBuffer				0x1000
+#	define ABM_ColorOrderRGB				0x2000
+#	define ABM_TypeQuickDraw3D				0x4000
+#	define ABM_DstFBSourceData				0x8000
 
 #define DitherMode						GLINT_TAG_ADDR(0x10,0x03)
 	/* 0:					*/
@@ -806,31 +807,31 @@
 	/* DitherDisable		*/
 	/* UNIT_DISABLE			*/
 
-	#define DTM_DitherEnable				1 << 1
-	#define DTM_ColorFormat5555				1 << 2
-	#define DTM_ColorFormat4444				2 << 2
-	#define DTM_ColorFormat4444_Front			3 << 2
-	#define DTM_ColorFormat4444_Back			4 << 2
-	#define DTM_ColorFormat332_Front			5 << 2
-	#define DTM_ColorFormat332_Back				6 << 2
-	#define DTM_ColorFormat121_Front			7 << 2
-	#define DTM_ColorFormat121_Back				8 << 2
-	#define DTM_ColorFormat555_Back				13 << 2
-	#define DTM_ColorFormat_CI8				14 << 2
-	#define DTM_ColorFormat_CI4				15 << 2
-	#define DTM_ColorOrderRGB				1 << 10
-	#define DTM_NoAlphaDither				1 << 14
-	#define DTM_RoundMode					1 << 15
+#	define DTM_DitherEnable				1 << 1
+#	define DTM_ColorFormat5555				1 << 2
+#	define DTM_ColorFormat4444				2 << 2
+#	define DTM_ColorFormat4444_Front			3 << 2
+#	define DTM_ColorFormat4444_Back			4 << 2
+#	define DTM_ColorFormat332_Front			5 << 2
+#	define DTM_ColorFormat332_Back				6 << 2
+#	define DTM_ColorFormat121_Front			7 << 2
+#	define DTM_ColorFormat121_Back				8 << 2
+#	define DTM_ColorFormat555_Back				13 << 2
+#	define DTM_ColorFormat_CI8				14 << 2
+#	define DTM_ColorFormat_CI4				15 << 2
+#	define DTM_ColorOrderRGB				1 << 10
+#	define DTM_NoAlphaDither				1 << 14
+#	define DTM_RoundMode					1 << 15
 
 #define FBSoftwareWriteMask					GLINT_TAG_ADDR(0x10,0x04)
 #define LogicalOpMode						GLINT_TAG_ADDR(0x10,0x05)
-        #define Use_ConstantFBWriteData 0x40
+#	define Use_ConstantFBWriteData 0x40
 
 
 #define FBWriteData						GLINT_TAG_ADDR(0x10,0x06)
 #define RouterMode						GLINT_TAG_ADDR(0x10,0x08)
-        #define ROUTER_Depth_Texture 1
-        #define ROUTER_Texture_Depth 0
+#	define ROUTER_Depth_Texture 1
+#	define ROUTER_Texture_Depth 0
 
 
 #define LBReadMode						GLINT_TAG_ADDR(0x11,0x00)
@@ -842,60 +843,60 @@
 	/* NoPatch			*/
 	/* ScanlineInterval1 		*/
 
-	#define LBRM_SrcEnable						1 << 9
-	#define LBRM_DstEnable						1 << 10
-	#define LBRM_DataLBStencil					1 << 16
-	#define LBRM_DataLBDepth					2 << 16
-	#define LBRM_WinBottomLeft					1 << 18
-	#define LBRM_DoPatch						1 << 19
+#	define LBRM_SrcEnable						1 << 9
+#	define LBRM_DstEnable						1 << 10
+#	define LBRM_DataLBStencil					1 << 16
+#	define LBRM_DataLBDepth					2 << 16
+#	define LBRM_WinBottomLeft					1 << 18
+#	define LBRM_DoPatch						1 << 19
 
-	#define LBRM_ScanlineInt2					1 << 20
-	#define LBRM_ScanlineInt4					2 << 20
-	#define LBRM_ScanlineInt8					3 << 20
+#	define LBRM_ScanlineInt2					1 << 20
+#	define LBRM_ScanlineInt4					2 << 20
+#	define LBRM_ScanlineInt8					3 << 20
 
 
 #define LBReadFormat						GLINT_TAG_ADDR(0x11,0x01)
-        #define LBRF_DepthWidth15   0x03  /* only permedia */
-        #define LBRF_DepthWidth16   0x00
-        #define LBRF_DepthWidth24   0x01
-        #define LBRF_DepthWidth32   0x02
-
-        #define LBRF_StencilWidth0  (0 << 2)
-        #define LBRF_StencilWidth4  (1 << 2)
-        #define LBRF_StencilWidth8  (2 << 2)
-
-        #define LBRF_StencilPos16   (0 << 4)
-        #define LBRF_StencilPos20   (1 << 4)
-        #define LBRF_StencilPos24   (2 << 4)
-        #define LBRF_StencilPos28   (3 << 4)
-        #define LBRF_StencilPos32   (4 << 4)
-
-        #define LBRF_FrameCount0    (0 << 7)
-        #define LBRF_FrameCount4    (1 << 7)
-        #define LBRF_FrameCount8    (2 << 7)
-
-        #define LBRF_FrameCountPos16  (0 << 9)
-        #define LBRF_FrameCountPos20  (1 << 9)
-        #define LBRF_FrameCountPos24  (2 << 9)
-        #define LBRF_FrameCountPos28  (3 << 9)
-        #define LBRF_FrameCountPos32  (4 << 9)
-        #define LBRF_FrameCountPos36  (5 << 9)
-        #define LBRF_FrameCountPos40  (6 << 9)
-
-        #define LBRF_GIDWidth0 (0 << 12)
-        #define LBRF_GIDWidth4 (1 << 12)
-
-        #define LBRF_GIDPos16  (0 << 13)
-        #define LBRF_GIDPos20  (1 << 13)
-        #define LBRF_GIDPos24  (2 << 13)
-        #define LBRF_GIDPos28  (3 << 13)
-        #define LBRF_GIDPos32  (4 << 13)
-        #define LBRF_GIDPos36  (5 << 13)
-        #define LBRF_GIDPos40  (6 << 13)
-        #define LBRF_GIDPos44  (7 << 13)
-        #define LBRF_GIDPos48  (8 << 13)
-
-        #define LBRF_Compact32  (1 << 17)
+#	define LBRF_DepthWidth15   0x03  /* only permedia */
+#	define LBRF_DepthWidth16   0x00
+#	define LBRF_DepthWidth24   0x01
+#	define LBRF_DepthWidth32   0x02
+
+#	define LBRF_StencilWidth0  (0 << 2)
+#	define LBRF_StencilWidth4  (1 << 2)
+#	define LBRF_StencilWidth8  (2 << 2)
+
+#	define LBRF_StencilPos16   (0 << 4)
+#	define LBRF_StencilPos20   (1 << 4)
+#	define LBRF_StencilPos24   (2 << 4)
+#	define LBRF_StencilPos28   (3 << 4)
+#	define LBRF_StencilPos32   (4 << 4)
+
+#	define LBRF_FrameCount0    (0 << 7)
+#	define LBRF_FrameCount4    (1 << 7)
+#	define LBRF_FrameCount8    (2 << 7)
+
+#	define LBRF_FrameCountPos16  (0 << 9)
+#	define LBRF_FrameCountPos20  (1 << 9)
+#	define LBRF_FrameCountPos24  (2 << 9)
+#	define LBRF_FrameCountPos28  (3 << 9)
+#	define LBRF_FrameCountPos32  (4 << 9)
+#	define LBRF_FrameCountPos36  (5 << 9)
+#	define LBRF_FrameCountPos40  (6 << 9)
+
+#	define LBRF_GIDWidth0 (0 << 12)
+#	define LBRF_GIDWidth4 (1 << 12)
+
+#	define LBRF_GIDPos16  (0 << 13)
+#	define LBRF_GIDPos20  (1 << 13)
+#	define LBRF_GIDPos24  (2 << 13)
+#	define LBRF_GIDPos28  (3 << 13)
+#	define LBRF_GIDPos32  (4 << 13)
+#	define LBRF_GIDPos36  (5 << 13)
+#	define LBRF_GIDPos40  (6 << 13)
+#	define LBRF_GIDPos44  (7 << 13)
+#	define LBRF_GIDPos48  (8 << 13)
+
+#	define LBRF_Compact32  (1 << 17)
 
 
 
@@ -904,9 +905,9 @@
 #define LBDepth							GLINT_TAG_ADDR(0x11,0x06)
 #define LBWindowBase						GLINT_TAG_ADDR(0x11,0x07)
 #define LBWriteMode						GLINT_TAG_ADDR(0x11,0x08)
-	#define LBWM_WriteEnable				0x1
-	#define LBWM_UpLoad_LBDepth				0x2
-	#define LBWM_UpLoad_LBStencil				0x4
+#	define LBWM_WriteEnable				0x1
+#	define LBWM_UpLoad_LBDepth				0x2
+#	define LBWM_UpLoad_LBStencil				0x4
 
 #define LBWriteFormat						GLINT_TAG_ADDR(0x11,0x09)
 
@@ -916,16 +917,16 @@
 #define LBWindowOffset						GLINT_TAG_ADDR(0x11,0x0f)
 
 #define GLINTWindow						GLINT_TAG_ADDR(0x13,0x00)
-        #define GWIN_UnitEnable          (1 << 0)
-        #define GWIN_ForceLBUpdate       (1 << 3)
-        #define GWIN_LBUpdateSourceREG   (1 << 4)
-        #define GWIN_LBUpdateSourceLB    (0 << 4)
-        #define GWIN_StencilFCP          (1 << 17)
-        #define GWIN_DepthFCP            (1 << 18)
-        #define GWIN_OverrideWriteFilter (1 << 19)
+#	define GWIN_UnitEnable          (1 << 0)
+#	define GWIN_ForceLBUpdate       (1 << 3)
+#	define GWIN_LBUpdateSourceREG   (1 << 4)
+#	define GWIN_LBUpdateSourceLB    (0 << 4)
+#	define GWIN_StencilFCP          (1 << 17)
+#	define GWIN_DepthFCP            (1 << 18)
+#	define GWIN_OverrideWriteFilter (1 << 19)
 
 	/* ??? is this needed, set by permedia (2) modules */
-        #define GWIN_DisableLBUpdate    0x40000 
+#	define GWIN_DisableLBUpdate    0x40000 
 
 #define StencilMode						GLINT_TAG_ADDR(0x13,0x01)
 #define StencilData						GLINT_TAG_ADDR(0x13,0x02)
@@ -937,17 +938,17 @@
 	/* CompFuncNEVER		*/
 	/* UNIT_DISABLE			*/
 
-	#define DPM_WriteEnable					1 << 1
-	#define DPM_SrcCompLBData				1 << 2
-	#define DPM_SrcCompDregister				2 << 2
-	#define DPM_SrcCompLBSourceData				3 << 2
-	#define DPM_CompFuncLESS				1 << 4
-	#define DPM_CompFuncEQUAL				2 << 4
-	#define DPM_CompFuncLESS_OR_EQ				3 << 4
-	#define DPM_CompFuncGREATER				4 << 4
-	#define DPM_CompFuncNOT_EQ				5 << 4
-	#define DPM_CompFuncGREATER_OR_EQ			6 << 4
-	#define DPM_CompFuncALWAYS				7 << 4
+#	define DPM_WriteEnable					1 << 1
+#	define DPM_SrcCompLBData				1 << 2
+#	define DPM_SrcCompDregister				2 << 2
+#	define DPM_SrcCompLBSourceData				3 << 2
+#	define DPM_CompFuncLESS				1 << 4
+#	define DPM_CompFuncEQUAL				2 << 4
+#	define DPM_CompFuncLESS_OR_EQ				3 << 4
+#	define DPM_CompFuncGREATER				4 << 4
+#	define DPM_CompFuncNOT_EQ				5 << 4
+#	define DPM_CompFuncGREATER_OR_EQ			6 << 4
+#	define DPM_CompFuncALWAYS				7 << 4
 
 #define GLINTDepth						GLINT_TAG_ADDR(0x13,0x05)
 #define ZStartU							GLINT_TAG_ADDR(0x13,0x06)
@@ -966,14 +967,14 @@
 	/* WinTopLeft			*/
 	/* ScanlineInterval1 		*/
 
-	#define FBRM_SrcEnable					1 << 9
-	#define FBRM_DstEnable					1 << 10
-	#define FBRM_DataFBColor				1 << 15
-	#define FBRM_WinBottomLeft				1 << 16
-	#define FBRM_Packed					1 << 19
-	#define FBRM_ScanlineInt2				1 << 23
-	#define FBRM_ScanlineInt4				2 << 23
-	#define FBRM_ScanlineInt8				3 << 23
+#	define FBRM_SrcEnable					1 << 9
+#	define FBRM_DstEnable					1 << 10
+#	define FBRM_DataFBColor				1 << 15
+#	define FBRM_WinBottomLeft				1 << 16
+#	define FBRM_Packed					1 << 19
+#	define FBRM_ScanlineInt2				1 << 23
+#	define FBRM_ScanlineInt4				2 << 23
+#	define FBRM_ScanlineInt8				3 << 23
 
 
 #define FBSourceOffset						GLINT_TAG_ADDR(0x15,0x01)
@@ -987,10 +988,10 @@
 	/* 0:			*/
 	/* FBWM_NoColorUpload	*/
 	/* FBWM_WriteDisable	*/
-	#define FBWM_WriteEnable				1
-	#define FBWM_UploadColor				1 << 3
+#	define FBWM_WriteEnable				1
+#	define FBWM_UploadColor				1 << 3
 /* Permedia3 extensions */
-	#define FBWM_Enable0					1 << 12
+#	define FBWM_Enable0					1 << 12
 
 #define FBHardwareWriteMask					GLINT_TAG_ADDR(0x15,0x08)
 #define FBBlockColor						GLINT_TAG_ADDR(0x15,0x09)
@@ -1019,16 +1020,16 @@
 	/* CullStatisticTag		*/
 	/* CullStatisticData		*/
 
-	#define FM_PassDepthTags					0x0010
-	#define FM_PassDepthData					0x0020
-	#define FM_PassStencilTags					0x0040
-	#define FM_PassStencilData					0x0080
-	#define FM_PassColorTag						0x0100
-	#define FM_PassColorData					0x0200
-	#define FM_PassSyncTag						0x0400
-	#define FM_PassSyncData						0x0800
-	#define FM_PassStatisticTag					0x1000
-	#define FM_PassStatisticData					0x2000
+#	define FM_PassDepthTags					0x0010
+#	define FM_PassDepthData					0x0020
+#	define FM_PassStencilTags					0x0040
+#	define FM_PassStencilData					0x0080
+#	define FM_PassColorTag						0x0100
+#	define FM_PassColorData					0x0200
+#	define FM_PassSyncTag						0x0400
+#	define FM_PassSyncData						0x0800
+#	define FM_PassStatisticTag					0x1000
+#	define FM_PassStatisticData					0x2000
 
 #define	Sync_tag							0x0188
 
@@ -1140,43 +1141,43 @@
 	/* GLINT_300SX			*/
 
 	/* DeltaMode Register Bit Field Assignments */
-	#define DM_GLINT_300SX					0x0000
-	#define DM_GLINT_500TX					0x0001
-	#define DM_PERMEDIA					0x0002
-	#define DM_Depth_16BPP					(1 << 2)
-	#define DM_Depth_24BPP					(2 << 2)
-	#define DM_Depth_32BPP					(3 << 2)
-	#define DM_FogEnable					0x0010
-	#define DM_TextureEnable				0x0020
-	#define DM_SmoothShadingEnable				0x0040
-	#define DM_DepthEnable					0x0080
-	#define DM_SpecularTextureEnable			0x0100
-	#define DM_DiffuseTextureEnable				0x0200
-	#define DM_SubPixelCorrectionEnable			0x0400
-	#define DM_DiamondExit					0x0800
-	#define DM_NoDraw					0x1000
-	#define DM_ClampEnable					0x2000
-	#define DM_ClampedTexParMode				0x4000 
-	#define DM_NormalizedTexParMode				0xC000 
-
-
-        #define DDCMD_AreaStrippleEnable                        0x0001
-	#define DDCMD_LineStrippleEnable                        0x0002
-	#define DDCMD_ResetLineStripple                         1 << 2
-        #define DDCMD_FastFillEnable                            1 << 3
+#	define DM_GLINT_300SX					0x0000
+#	define DM_GLINT_500TX					0x0001
+#	define DM_PERMEDIA					0x0002
+#	define DM_Depth_16BPP					(1 << 2)
+#	define DM_Depth_24BPP					(2 << 2)
+#	define DM_Depth_32BPP					(3 << 2)
+#	define DM_FogEnable					0x0010
+#	define DM_TextureEnable				0x0020
+#	define DM_SmoothShadingEnable				0x0040
+#	define DM_DepthEnable					0x0080
+#	define DM_SpecularTextureEnable			0x0100
+#	define DM_DiffuseTextureEnable				0x0200
+#	define DM_SubPixelCorrectionEnable			0x0400
+#	define DM_DiamondExit					0x0800
+#	define DM_NoDraw					0x1000
+#	define DM_ClampEnable					0x2000
+#	define DM_ClampedTexParMode				0x4000 
+#	define DM_NormalizedTexParMode				0xC000 
+
+
+#	define DDCMD_AreaStrippleEnable                        0x0001
+#	define DDCMD_LineStrippleEnable                        0x0002
+#	define DDCMD_ResetLineStripple                         1 << 2
+#	define DDCMD_FastFillEnable                            1 << 3
         /*  2 Bits reserved */
-	#define DDCMD_PrimitiveType_Point                       2 << 6
-	#define DDCMD_PrimitiveType_Line                        0 << 6
-	#define DDCMD_PrimitiveType_Trapezoid                   1 << 6
-	#define DDCMD_AntialiasEnable				1 << 8
-     	#define DDCMD_AntialiasingQuality			1 << 9
-        #define DDCMD_UsePointTable                             1 << 10
-	#define DDCMD_SyncOnBitMask                             1 << 11
-	#define DDCMD_SyncOnHostDate                            1 << 12
-     	#define DDCMD_TextureEnable			        1 << 13
-	#define DDCMD_FogEnable                                 1 << 14
-	#define DDCMD_CoverageEnable                            1 << 15
-	#define DDCMD_SubPixelCorrectionEnable                  1 << 16
+#	define DDCMD_PrimitiveType_Point                       2 << 6
+#	define DDCMD_PrimitiveType_Line                        0 << 6
+#	define DDCMD_PrimitiveType_Trapezoid                   1 << 6
+#	define DDCMD_AntialiasEnable				1 << 8
+#	define DDCMD_AntialiasingQuality			1 << 9
+#	define DDCMD_UsePointTable                             1 << 10
+#	define DDCMD_SyncOnBitMask                             1 << 11
+#	define DDCMD_SyncOnHostDate                            1 << 12
+#	define DDCMD_TextureEnable			        1 << 13
+#	define DDCMD_FogEnable                                 1 << 14
+#	define DDCMD_CoverageEnable                            1 << 15
+#	define DDCMD_SubPixelCorrectionEnable                  1 << 16
 
 
 
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/glint/pm2_video.c b/xc/programs/Xserver/hw/xfree86/drivers/glint/pm2_video.c
index 6771db69a..869906e7a 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/glint/pm2_video.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/glint/pm2_video.c
@@ -21,14 +21,13 @@
  *  OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  */
  
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/glint/pm2_video.c,v 1.22 2001/08/18 11:41:44 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/glint/pm2_video.c,v 1.23 2002/12/02 22:52:30 tsi Exp $ */
 
 #include "xf86.h"
 #include "xf86_OSproc.h"
 #include "xf86_ansic.h"
 #include "xf86Pci.h"
 #include "xf86PciInfo.h"
-#include "xf86Xinput.h"
 #include "xf86fbman.h"
 #include "xf86i2c.h"
 #include "xf86xv.h"
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/glint/pm3_accel.c b/xc/programs/Xserver/hw/xfree86/drivers/glint/pm3_accel.c
index 3a7d0191a..9599590b8 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/glint/pm3_accel.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/glint/pm3_accel.c
@@ -26,7 +26,7 @@
  * 
  * Permedia 3 accelerated options.
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/glint/pm3_accel.c,v 1.30 2002/05/21 14:38:04 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/glint/pm3_accel.c,v 1.31 2003/01/06 00:04:54 alanh Exp $ */
 
 #include "Xarch.h"
 #include "xf86.h"
@@ -139,7 +139,11 @@ Permedia3InitializeEngine(ScrnInfoPtr pScrn)
     /* Initialize the Accelerator Engine to defaults */
     TRACE_ENTER("Permedia3InitializeEngine");
 
+    if ((IS_J2000) && (pGlint->Chipset == PCI_VENDOR_3DLABS_CHIP_GAMMA)) {
+	GLINT_SLOW_WRITE_REG(pGlint->MultiIndex, BroadcastMask);
+    }
     if (pGlint->MultiAperture) {
+	ErrorF("pm3_accel: SVEN : multiAperture set\n");
     	/* Only write the following register to the first PM3 */
     	GLINT_SLOW_WRITE_REG(1, BroadcastMask);
     	GLINT_SLOW_WRITE_REG(0x00000001,    ScanLineOwnership);
@@ -1040,6 +1044,10 @@ Permedia3SubsequentImageWriteScanline(ScrnInfoPtr pScrn, int bufno)
 static void
 Permedia3RestoreAccelState(ScrnInfoPtr pScrn)
 {
+    GLINTPtr pGlint = GLINTPTR(pScrn);
+    if ((IS_J2000) && (pGlint->Chipset == PCI_VENDOR_3DLABS_CHIP_GAMMA)) {
+	GLINT_SLOW_WRITE_REG(pGlint->MultiIndex, BroadcastMask);
+    }
     Permedia3Sync(pScrn);
 }
 
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/glint/pm3_regs.h b/xc/programs/Xserver/hw/xfree86/drivers/glint/pm3_regs.h
index 8cfd2607d..be9fc510f 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/glint/pm3_regs.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/glint/pm3_regs.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/glint/pm3_regs.h,v 1.9 2001/11/20 00:09:15 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/glint/pm3_regs.h,v 1.10 2003/01/12 03:55:47 tsi Exp $ */
 
 /*
  * glint register file 
@@ -53,33 +53,33 @@
 *  GLINT Permedia3 Region 0 Bypass Controls   *
 ***********************************************/
 #define PM3ByAperture1Mode					0x0300
-	#define PM3ByApertureMode_BYTESWAP_ABCD			(0<<0)
-	#define PM3ByApertureMode_BYTESWAP_BADC			(1<<0)
-	#define PM3ByApertureMode_BYTESWAP_CDAB			(2<<0)
-	#define PM3ByApertureMode_BYTESWAP_DCBA			(3<<0)
-	#define PM3ByApertureMode_PATCH_DISABLE			(0<<2)
-	#define PM3ByApertureMode_PATCH_ENABLE			(1<<2)
-	#define PM3ByApertureMode_FORMAT_RAW			(0<<3)
-	#define PM3ByApertureMode_FORMAT_YUYV			(1<<3)
-	#define PM3ByApertureMode_FORMAT_UYVY			(2<<3)
-	#define PM3ByApertureMode_PIXELSIZE_8BIT		(0<<5)
-	#define PM3ByApertureMode_PIXELSIZE_16BIT		(1<<5)
-	#define PM3ByApertureMode_PIXELSIZE_32BIT		(2<<5)
-	#define PM3ByApertureMode_EFFECTIVE_STRIDE_1024		(0<<7)
-	#define PM3ByApertureMode_EFFECTIVE_STRIDE_2048		(1<<7)
-	#define PM3ByApertureMode_EFFECTIVE_STRIDE_4096		(2<<7)
-	#define PM3ByApertureMode_EFFECTIVE_STRIDE_8192		(3<<7)
-	#define PM3ByApertureMode_PATCH_OFFSET_X(off)	(((off)&7f)<<9)
-	#define PM3ByApertureMode_PATCH_OFFSET_Y(off)	(((off)&7f)<<16)
-	#define PM3ByApertureMode_FRAMEBUFFER			(0<<21)
-	#define PM3ByApertureMode_LOCALBUFFER			(1<<21)
-	#define PM3ByApertureMode_DOUBLE_WRITE_OFF		(0<<22)
-	#define PM3ByApertureMode_DOUBLE_WRITE_1MB		(1<<22)
-	#define PM3ByApertureMode_DOUBLE_WRITE_2MB		(2<<22)
-	#define PM3ByApertureMode_DOUBLE_WRITE_4MB		(3<<22)
-	#define PM3ByApertureMode_DOUBLE_WRITE_8MB		(4<<22)
-	#define PM3ByApertureMode_DOUBLE_WRITE_16MB		(5<<22)
-	#define PM3ByApertureMode_DOUBLE_WRITE_32MB		(6<<22)
+#	define PM3ByApertureMode_BYTESWAP_ABCD			(0<<0)
+#	define PM3ByApertureMode_BYTESWAP_BADC			(1<<0)
+#	define PM3ByApertureMode_BYTESWAP_CDAB			(2<<0)
+#	define PM3ByApertureMode_BYTESWAP_DCBA			(3<<0)
+#	define PM3ByApertureMode_PATCH_DISABLE			(0<<2)
+#	define PM3ByApertureMode_PATCH_ENABLE			(1<<2)
+#	define PM3ByApertureMode_FORMAT_RAW			(0<<3)
+#	define PM3ByApertureMode_FORMAT_YUYV			(1<<3)
+#	define PM3ByApertureMode_FORMAT_UYVY			(2<<3)
+#	define PM3ByApertureMode_PIXELSIZE_8BIT		(0<<5)
+#	define PM3ByApertureMode_PIXELSIZE_16BIT		(1<<5)
+#	define PM3ByApertureMode_PIXELSIZE_32BIT		(2<<5)
+#	define PM3ByApertureMode_EFFECTIVE_STRIDE_1024		(0<<7)
+#	define PM3ByApertureMode_EFFECTIVE_STRIDE_2048		(1<<7)
+#	define PM3ByApertureMode_EFFECTIVE_STRIDE_4096		(2<<7)
+#	define PM3ByApertureMode_EFFECTIVE_STRIDE_8192		(3<<7)
+#	define PM3ByApertureMode_PATCH_OFFSET_X(off)	(((off)&7f)<<9)
+#	define PM3ByApertureMode_PATCH_OFFSET_Y(off)	(((off)&7f)<<16)
+#	define PM3ByApertureMode_FRAMEBUFFER			(0<<21)
+#	define PM3ByApertureMode_LOCALBUFFER			(1<<21)
+#	define PM3ByApertureMode_DOUBLE_WRITE_OFF		(0<<22)
+#	define PM3ByApertureMode_DOUBLE_WRITE_1MB		(1<<22)
+#	define PM3ByApertureMode_DOUBLE_WRITE_2MB		(2<<22)
+#	define PM3ByApertureMode_DOUBLE_WRITE_4MB		(3<<22)
+#	define PM3ByApertureMode_DOUBLE_WRITE_8MB		(4<<22)
+#	define PM3ByApertureMode_DOUBLE_WRITE_16MB		(5<<22)
+#	define PM3ByApertureMode_DOUBLE_WRITE_32MB		(6<<22)
 
 #define PM3ByAperture2Mode					0x0328
 	
@@ -90,7 +90,7 @@
 #define PM3MemBypassWriteMask					0x1008
 #define PM3MemScratch						0x1010
 #define PM3LocalMemCaps						0x1018
-	#define PM3LocalMemCaps_NoWriteMask			(1<<28)
+#	define PM3LocalMemCaps_NoWriteMask			(1<<28)
 #define PM3LocalMemTimings					0x1020
 #define PM3LocalMemControl					0x1028
 #define PM3LocalMemRefresh					0x1030
@@ -113,43 +113,43 @@
 #define PM3VsStart						0x3048
 #define PM3VsEnd						0x3050
 #define PM3VideoControl						0x3058
-	#define PM3VideoControl_DISABLE				(0<<0)
-	#define PM3VideoControl_ENABLE				(1<<0)
-	#define PM3VideoControl_BLANK_ACTIVE_HIGH		(0<<1)
-	#define PM3VideoControl_BLANK_ACTIVE_LOW		(1<<1)
-	#define PM3VideoControl_LINE_DOUBLE_OFF			(0<<2)
-	#define PM3VideoControl_LINE_DOUBLE_ON			(1<<2)
-	#define PM3VideoControl_HSYNC_FORCE_HIGH		(0<<3)
-	#define PM3VideoControl_HSYNC_ACTIVE_HIGH		(1<<3)
-	#define PM3VideoControl_HSYNC_FORCE_LOW			(2<<3)
-	#define PM3VideoControl_HSYNC_ACTIVE_LOW		(3<<3)
-	#define PM3VideoControl_VSYNC_FORCE_HIGH		(0<<5)
-	#define PM3VideoControl_VSYNC_ACTIVE_HIGH		(1<<5)
-	#define PM3VideoControl_VSYNC_FORCE_LOW			(2<<5)
-	#define PM3VideoControl_VSYNC_ACTIVE_LOW		(3<<5)
-	#define PM3VideoControl_BYTE_DOUBLE_OFF			(0<<7)
-	#define PM3VideoControl_BYTE_DOUBLE_ON			(1<<7)
-	#define PM3VideoControl_BUFFER_SWAP_SYNCON_FRAMEBLANK	(0<<9)
-	#define PM3VideoControl_BUFFER_SWAP_FREE_RUNNING	(1<<9)
-	#define PM3VideoControl_BUFFER_SWAP_LIMITETO_FRAMERATE	(2<<9)
-	#define PM3VideoControl_STEREO_DISABLE			(0<<11)
-	#define PM3VideoControl_STEREO_ENABLE			(1<<11)
-	#define PM3VideoControl_RIGHT_EYE_ACTIVE_HIGH		(0<<12)
-	#define PM3VideoControl_RIGHT_EYE_ACTIVE_LOW		(1<<12)
-	#define PM3VideoControl_VIDEO_EXT_LOW			(0<<14)
-	#define PM3VideoControl_VIDEO_EXT_HIGH			(1<<14)
-	#define PM3VideoControl_SYNC_MODE_INDEPENDENT		(0<<16)
-	#define PM3VideoControl_SYNC_MODE_SYNCTO_VSA		(1<<16)
-	#define PM3VideoControl_SYNC_MODE_SYNCTO_VSB		(2<<16)
-	#define PM3VideoControl_PATCH_DISABLE			(0<<18)
-	#define PM3VideoControl_PATCH_ENABLE			(1<<18)
-	#define PM3VideoControl_PIXELSIZE_8BIT			(0<<19)
-	#define PM3VideoControl_PIXELSIZE_16BIT			(1<<19)
-	#define PM3VideoControl_PIXELSIZE_32BIT			(2<<19)
-	#define PM3VideoControl_DISPLAY_DISABLE			(0<<21)
-	#define PM3VideoControl_DISPLAY_ENABLE			(1<<21)
-	#define PM3VideoControl_PATCH_OFFSET_X(off)	(((off)&0x3f)<<22)
-	#define PM3VideoControl_PATCH_OFFSET_Y(off)	(((off)&0x3f)<<28)
+#	define PM3VideoControl_DISABLE				(0<<0)
+#	define PM3VideoControl_ENABLE				(1<<0)
+#	define PM3VideoControl_BLANK_ACTIVE_HIGH		(0<<1)
+#	define PM3VideoControl_BLANK_ACTIVE_LOW		(1<<1)
+#	define PM3VideoControl_LINE_DOUBLE_OFF			(0<<2)
+#	define PM3VideoControl_LINE_DOUBLE_ON			(1<<2)
+#	define PM3VideoControl_HSYNC_FORCE_HIGH		(0<<3)
+#	define PM3VideoControl_HSYNC_ACTIVE_HIGH		(1<<3)
+#	define PM3VideoControl_HSYNC_FORCE_LOW			(2<<3)
+#	define PM3VideoControl_HSYNC_ACTIVE_LOW		(3<<3)
+#	define PM3VideoControl_VSYNC_FORCE_HIGH		(0<<5)
+#	define PM3VideoControl_VSYNC_ACTIVE_HIGH		(1<<5)
+#	define PM3VideoControl_VSYNC_FORCE_LOW			(2<<5)
+#	define PM3VideoControl_VSYNC_ACTIVE_LOW		(3<<5)
+#	define PM3VideoControl_BYTE_DOUBLE_OFF			(0<<7)
+#	define PM3VideoControl_BYTE_DOUBLE_ON			(1<<7)
+#	define PM3VideoControl_BUFFER_SWAP_SYNCON_FRAMEBLANK	(0<<9)
+#	define PM3VideoControl_BUFFER_SWAP_FREE_RUNNING	(1<<9)
+#	define PM3VideoControl_BUFFER_SWAP_LIMITETO_FRAMERATE	(2<<9)
+#	define PM3VideoControl_STEREO_DISABLE			(0<<11)
+#	define PM3VideoControl_STEREO_ENABLE			(1<<11)
+#	define PM3VideoControl_RIGHT_EYE_ACTIVE_HIGH		(0<<12)
+#	define PM3VideoControl_RIGHT_EYE_ACTIVE_LOW		(1<<12)
+#	define PM3VideoControl_VIDEO_EXT_LOW			(0<<14)
+#	define PM3VideoControl_VIDEO_EXT_HIGH			(1<<14)
+#	define PM3VideoControl_SYNC_MODE_INDEPENDENT		(0<<16)
+#	define PM3VideoControl_SYNC_MODE_SYNCTO_VSA		(1<<16)
+#	define PM3VideoControl_SYNC_MODE_SYNCTO_VSB		(2<<16)
+#	define PM3VideoControl_PATCH_DISABLE			(0<<18)
+#	define PM3VideoControl_PATCH_ENABLE			(1<<18)
+#	define PM3VideoControl_PIXELSIZE_8BIT			(0<<19)
+#	define PM3VideoControl_PIXELSIZE_16BIT			(1<<19)
+#	define PM3VideoControl_PIXELSIZE_32BIT			(2<<19)
+#	define PM3VideoControl_DISPLAY_DISABLE			(0<<21)
+#	define PM3VideoControl_DISPLAY_ENABLE			(1<<21)
+#	define PM3VideoControl_PATCH_OFFSET_X(off)	(((off)&0x3f)<<22)
+#	define PM3VideoControl_PATCH_OFFSET_Y(off)	(((off)&0x3f)<<28)
 #define PM3InterruptLine					0x3060
 #define PM3DisplayData						0x3068
 #define PM3VerticalLineCount					0x3070
@@ -158,54 +158,54 @@
 #define PM3MiscControl						0x3088
 
 #define PM3VideoOverlayUpdate					0x3100
-	#define PM3VideoOverlayUpdate_DISABLE			(0<<0)
-	#define PM3VideoOverlayUpdate_ENABLE			(1<<0)
+#	define PM3VideoOverlayUpdate_DISABLE			(0<<0)
+#	define PM3VideoOverlayUpdate_ENABLE			(1<<0)
 #define PM3VideoOverlayMode					0x3108
-	#define PM3VideoOverlayMode_DISABLE			(0<<0)
-	#define PM3VideoOverlayMode_ENABLE			(1<<0)
-	#define PM3VideoOverlayMode_BUFFERSYNC_MANUAL		(0<<1)
-	#define PM3VideoOverlayMode_BUFFERSYNC_VIDEOSTREAMA	(1<<1)
-	#define PM3VideoOverlayMode_BUFFERSYNC_VIDEOSTREAMB	(2<<1)
-	#define PM3VideoOverlayMode_FIELDPOLARITY_NORMAL	(0<<4)
-	#define PM3VideoOverlayMode_FIELDPOLARITY_INVERT	(1<<4)
-	#define PM3VideoOverlayMode_PIXELSIZE_8BIT		(0<<5)
-	#define PM3VideoOverlayMode_PIXELSIZE_16BIT		(1<<5)
-	#define PM3VideoOverlayMode_PIXELSIZE_32BIT		(2<<5)
-	#define PM3VideoOverlayMode_COLORFORMAT_RGB8888	((0<<7)|(1<<12)|(2<<5))
-	#define PM3VideoOverlayMode_COLORFORMAT_RGB4444	((1<<7)|(1<<12)|(1<<5))
-	#define PM3VideoOverlayMode_COLORFORMAT_RGB5551	((2<<7)|(1<<12)|(1<<5))
-	#define PM3VideoOverlayMode_COLORFORMAT_RGB565	((3<<7)|(1<<12)|(1<<5))
-	#define PM3VideoOverlayMode_COLORFORMAT_RGB332	((4<<7)|(1<<12)|(0<<5))
-	#define PM3VideoOverlayMode_COLORFORMAT_BGR8888	((0<<7)|(2<<5))
-	#define PM3VideoOverlayMode_COLORFORMAT_BGR4444	((1<<7)|(1<<5))
-	#define PM3VideoOverlayMode_COLORFORMAT_BGR5551	((2<<7)|(1<<5))
-	#define PM3VideoOverlayMode_COLORFORMAT_BGR565	((3<<7)|(1<<5))
-	#define PM3VideoOverlayMode_COLORFORMAT_BGR332	((4<<7)|(0<<5))
-	#define PM3VideoOverlayMode_COLORFORMAT_CI8	((5<<7)|(1<<12)|(0<<5))
-	#define PM3VideoOverlayMode_COLORFORMAT_VUY444	((2<<10)|(1<<12)|(2<<5))
-	#define PM3VideoOverlayMode_COLORFORMAT_YUV444	((2<<10)|(2<<5))
-	#define PM3VideoOverlayMode_COLORFORMAT_VUY422	((1<<10)|(1<<12)|(1<<5))
-	#define PM3VideoOverlayMode_COLORFORMAT_YUV422	((1<<10)|(1<<5))
-	#define PM3VideoOverlayMode_COLORORDER_BGR		(0<<12)
-	#define PM3VideoOverlayMode_COLORORDER_RGB		(1<<12)
-	#define PM3VideoOverlayMode_LINEARCOLOREXT_OFF		(0<<13)
-	#define PM3VideoOverlayMode_LINEARCOLOREXT_ON		(1<<13)
-	#define PM3VideoOverlayMode_FILTER_MASK			(3<<14)
-	#define PM3VideoOverlayMode_FILTER_OFF			(0<<14)
-	#define PM3VideoOverlayMode_FILTER_FULL			(1<<14)
-	#define PM3VideoOverlayMode_FILTER_PARTIAL		(2<<14)
-	#define PM3VideoOverlayMode_DEINTERLACE_OFF		(0<<16)
-	#define PM3VideoOverlayMode_DEINTERLACE_BOB		(1<<16)
-	#define PM3VideoOverlayMode_PATCHMODE_OFF		(0<<18)
-	#define PM3VideoOverlayMode_PATCHMODE_ON		(1<<18)
-	#define PM3VideoOverlayMode_FLIP_VIDEO			(0<<20)
-	#define PM3VideoOverlayMode_FLIP_VIDEOSTREAMA		(1<<20)
-	#define PM3VideoOverlayMode_FLIP_VIDEOSTREAMB		(2<<20)
-	#define PM3VideoOverlayMode_MIRROR_MASK			(3<<23)
-	#define PM3VideoOverlayMode_MIRRORX_OFF			(0<<23)
-	#define PM3VideoOverlayMode_MIRRORX_ON			(1<<23)
-	#define PM3VideoOverlayMode_MIRRORY_OFF			(0<<24)
-	#define PM3VideoOverlayMode_MIRRORY_ON			(1<<24)
+#	define PM3VideoOverlayMode_DISABLE			(0<<0)
+#	define PM3VideoOverlayMode_ENABLE			(1<<0)
+#	define PM3VideoOverlayMode_BUFFERSYNC_MANUAL		(0<<1)
+#	define PM3VideoOverlayMode_BUFFERSYNC_VIDEOSTREAMA	(1<<1)
+#	define PM3VideoOverlayMode_BUFFERSYNC_VIDEOSTREAMB	(2<<1)
+#	define PM3VideoOverlayMode_FIELDPOLARITY_NORMAL	(0<<4)
+#	define PM3VideoOverlayMode_FIELDPOLARITY_INVERT	(1<<4)
+#	define PM3VideoOverlayMode_PIXELSIZE_8BIT		(0<<5)
+#	define PM3VideoOverlayMode_PIXELSIZE_16BIT		(1<<5)
+#	define PM3VideoOverlayMode_PIXELSIZE_32BIT		(2<<5)
+#	define PM3VideoOverlayMode_COLORFORMAT_RGB8888	((0<<7)|(1<<12)|(2<<5))
+#	define PM3VideoOverlayMode_COLORFORMAT_RGB4444	((1<<7)|(1<<12)|(1<<5))
+#	define PM3VideoOverlayMode_COLORFORMAT_RGB5551	((2<<7)|(1<<12)|(1<<5))
+#	define PM3VideoOverlayMode_COLORFORMAT_RGB565	((3<<7)|(1<<12)|(1<<5))
+#	define PM3VideoOverlayMode_COLORFORMAT_RGB332	((4<<7)|(1<<12)|(0<<5))
+#	define PM3VideoOverlayMode_COLORFORMAT_BGR8888	((0<<7)|(2<<5))
+#	define PM3VideoOverlayMode_COLORFORMAT_BGR4444	((1<<7)|(1<<5))
+#	define PM3VideoOverlayMode_COLORFORMAT_BGR5551	((2<<7)|(1<<5))
+#	define PM3VideoOverlayMode_COLORFORMAT_BGR565	((3<<7)|(1<<5))
+#	define PM3VideoOverlayMode_COLORFORMAT_BGR332	((4<<7)|(0<<5))
+#	define PM3VideoOverlayMode_COLORFORMAT_CI8	((5<<7)|(1<<12)|(0<<5))
+#	define PM3VideoOverlayMode_COLORFORMAT_VUY444	((2<<10)|(1<<12)|(2<<5))
+#	define PM3VideoOverlayMode_COLORFORMAT_YUV444	((2<<10)|(2<<5))
+#	define PM3VideoOverlayMode_COLORFORMAT_VUY422	((1<<10)|(1<<12)|(1<<5))
+#	define PM3VideoOverlayMode_COLORFORMAT_YUV422	((1<<10)|(1<<5))
+#	define PM3VideoOverlayMode_COLORORDER_BGR		(0<<12)
+#	define PM3VideoOverlayMode_COLORORDER_RGB		(1<<12)
+#	define PM3VideoOverlayMode_LINEARCOLOREXT_OFF		(0<<13)
+#	define PM3VideoOverlayMode_LINEARCOLOREXT_ON		(1<<13)
+#	define PM3VideoOverlayMode_FILTER_MASK			(3<<14)
+#	define PM3VideoOverlayMode_FILTER_OFF			(0<<14)
+#	define PM3VideoOverlayMode_FILTER_FULL			(1<<14)
+#	define PM3VideoOverlayMode_FILTER_PARTIAL		(2<<14)
+#	define PM3VideoOverlayMode_DEINTERLACE_OFF		(0<<16)
+#	define PM3VideoOverlayMode_DEINTERLACE_BOB		(1<<16)
+#	define PM3VideoOverlayMode_PATCHMODE_OFF		(0<<18)
+#	define PM3VideoOverlayMode_PATCHMODE_ON		(1<<18)
+#	define PM3VideoOverlayMode_FLIP_VIDEO			(0<<20)
+#	define PM3VideoOverlayMode_FLIP_VIDEOSTREAMA		(1<<20)
+#	define PM3VideoOverlayMode_FLIP_VIDEOSTREAMB		(2<<20)
+#	define PM3VideoOverlayMode_MIRROR_MASK			(3<<23)
+#	define PM3VideoOverlayMode_MIRRORX_OFF			(0<<23)
+#	define PM3VideoOverlayMode_MIRRORX_ON			(1<<23)
+#	define PM3VideoOverlayMode_MIRRORY_OFF			(0<<24)
+#	define PM3VideoOverlayMode_MIRRORY_ON			(1<<24)
 #define PM3VideoOverlayFifoControl				0x3110
 #define PM3VideoOverlayIndex					0x3118
 #define PM3VideoOverlayBase					0x3120
@@ -213,25 +213,25 @@
 #define PM3VideoOverlayBase1					0x3128
 #define PM3VideoOverlayBase2					0x3130
 #define PM3VideoOverlayStride					0x3138
-	#define PM3VideoOverlayStride_STRIDE(s)		(((s)&0xfff)<<0)
+#	define PM3VideoOverlayStride_STRIDE(s)		(((s)&0xfff)<<0)
 #define PM3VideoOverlayWidth					0x3140
-	#define PM3VideoOverlayWidth_WIDTH(w)		(((w)&0xfff)<<0)
+#	define PM3VideoOverlayWidth_WIDTH(w)		(((w)&0xfff)<<0)
 #define PM3VideoOverlayHeight					0x3148
-	#define PM3VideoOverlayHeight_HEIGHT(h)		(((h)&0xfff)<<0)
+#	define PM3VideoOverlayHeight_HEIGHT(h)		(((h)&0xfff)<<0)
 #define PM3VideoOverlayOrigin					0x3150
-	#define PM3VideoOverlayOrigin_XORIGIN(x)	(((x)&0xfff)<<0)
-	#define PM3VideoOverlayOrigin_YORIGIN(y)	(((y)&0xfff)<<16)
+#	define PM3VideoOverlayOrigin_XORIGIN(x)	(((x)&0xfff)<<0)
+#	define PM3VideoOverlayOrigin_YORIGIN(y)	(((y)&0xfff)<<16)
 #define PM3VideoOverlayShrinkXDelta				0x3158
-	#define PM3VideoOverlayShrinkXDelta_NONE		(1<<16)
-	#define PM3VideoOverlayShrinkXDelta_DELTA(s,d)		\
+#	define PM3VideoOverlayShrinkXDelta_NONE		(1<<16)
+#	define PM3VideoOverlayShrinkXDelta_DELTA(s,d)		\
 		((((s)<<16)/(d))&0x0ffffff0)
 #define PM3VideoOverlayZoomXDelta				0x3160
-	#define PM3VideoOverlayZoomXDelta_NONE			(1<<16)
-	#define PM3VideoOverlayZoomXDelta_DELTA(s,d)		\
+#	define PM3VideoOverlayZoomXDelta_NONE			(1<<16)
+#	define PM3VideoOverlayZoomXDelta_DELTA(s,d)		\
 		((((s)<<16)/(d))&0x0001fff0)
 #define PM3VideoOverlayYDelta					0x3168
-	#define PM3VideoOverlayYDelta_NONE			(1<<16)
-	#define PM3VideoOverlayYDelta_DELTA(s,d)			\
+#	define PM3VideoOverlayYDelta_NONE			(1<<16)
+#	define PM3VideoOverlayYDelta_DELTA(s,d)			\
 		((((s)<<16)/(d))&0x0ffffff0)
 #define PM3VideoOverlayFieldOffset				0x3170
 #define PM3VideoOverlayStatus					0x3178
@@ -249,102 +249,102 @@
 #define PM3RD_IndexHigh						0x4028
 #define PM3RD_IndexedData					0x4030
 #define PM3RD_IndexControl					0x4038
-	#define PM3RD_IndexControl_AUTOINCREMENT_ENABLE		(1<<0)
-	#define PM3RD_IndexControl_AUTOINCREMENT_DISABLE	(0<<0)
+#	define PM3RD_IndexControl_AUTOINCREMENT_ENABLE		(1<<0)
+#	define PM3RD_IndexControl_AUTOINCREMENT_DISABLE	(0<<0)
 
 /* Indirect Registers */
 #define PM3RD_MiscControl					0x000
-	#define PM3RD_MiscControl_HIGHCOLOR_RES_DISABLE		(0<<0)
-	#define PM3RD_MiscControl_HIGHCOLOR_RES_ENABLE		(1<<0)
-	#define PM3RD_MiscControl_PIXELDOUBLE_DISABLE		(0<<1)
-	#define PM3RD_MiscControl_PIXELDOUBLE_ENABLE		(1<<1)
-	#define PM3RD_MiscControl_LASTREAD_ADDR_DISABLE		(0<<2)
-	#define PM3RD_MiscControl_LASTREAD_ADDR_ENABLE		(1<<2)
-	#define PM3RD_MiscControl_DIRECTCOLOR_DISABLE		(0<<3)
-	#define PM3RD_MiscControl_DIRECTCOLOR_ENABLE		(1<<3)
-	#define PM3RD_MiscControl_OVERLAY_DISABLE		(0<<4)
-	#define PM3RD_MiscControl_OVERLAY_ENABLE		(1<<4)
-	#define PM3RD_MiscControl_PIXELDOUBLE_BUFFER_DISABLE	(0<<5)
-	#define PM3RD_MiscControl_PIXELDOUBLE_BUFFER_ENABLE	(1<<5)
-	#define PM3RD_MiscControl_VSB_OUTPUT_DISABLE		(0<<6)
-	#define PM3RD_MiscControl_VSB_OUTPUT_ENABLE		(1<<6)
-	#define PM3RD_MiscControl_STEREODOUBLE_BUFFER_DISABLE	(0<<7)
-	#define PM3RD_MiscControl_STEREODOUBLE_BUFFER_ENABLE	(1<<7)
+#	define PM3RD_MiscControl_HIGHCOLOR_RES_DISABLE		(0<<0)
+#	define PM3RD_MiscControl_HIGHCOLOR_RES_ENABLE		(1<<0)
+#	define PM3RD_MiscControl_PIXELDOUBLE_DISABLE		(0<<1)
+#	define PM3RD_MiscControl_PIXELDOUBLE_ENABLE		(1<<1)
+#	define PM3RD_MiscControl_LASTREAD_ADDR_DISABLE		(0<<2)
+#	define PM3RD_MiscControl_LASTREAD_ADDR_ENABLE		(1<<2)
+#	define PM3RD_MiscControl_DIRECTCOLOR_DISABLE		(0<<3)
+#	define PM3RD_MiscControl_DIRECTCOLOR_ENABLE		(1<<3)
+#	define PM3RD_MiscControl_OVERLAY_DISABLE		(0<<4)
+#	define PM3RD_MiscControl_OVERLAY_ENABLE		(1<<4)
+#	define PM3RD_MiscControl_PIXELDOUBLE_BUFFER_DISABLE	(0<<5)
+#	define PM3RD_MiscControl_PIXELDOUBLE_BUFFER_ENABLE	(1<<5)
+#	define PM3RD_MiscControl_VSB_OUTPUT_DISABLE		(0<<6)
+#	define PM3RD_MiscControl_VSB_OUTPUT_ENABLE		(1<<6)
+#	define PM3RD_MiscControl_STEREODOUBLE_BUFFER_DISABLE	(0<<7)
+#	define PM3RD_MiscControl_STEREODOUBLE_BUFFER_ENABLE	(1<<7)
 #define PM3RD_SyncControl					0x001
-	#define PM3RD_SyncControl_HSYNC_ACTIVE_LOW		(0<<0)
-	#define PM3RD_SyncControl_HSYNC_ACTIVE_HIGH		(1<<0)
-	#define PM3RD_SyncControl_HSYNC_FORCE_ACTIVE		(3<<0)
-	#define PM3RD_SyncControl_HSYNC_FORCE_INACTIVE		(4<<0)
-	#define PM3RD_SyncControl_HSYNC_TRI_STATE		(2<<0)
-	#define PM3RD_SyncControl_VSYNC_ACTIVE_LOW		(0<<3)
-	#define PM3RD_SyncControl_VSYNC_ACTIVE_HIGH		(1<<3)
-	#define PM3RD_SyncControl_VSYNC_TRI_STATE		(2<<3)
-	#define PM3RD_SyncControl_VSYNC_FORCE_ACTIVE		(3<<3)
-	#define PM3RD_SyncControl_VSYNC_FORCE_INACTIVE		(4<<3)
-	#define PM3RD_SyncControl_HSYNC_OVERRIDE_SETBY_HSYNC	(0<<6)
-	#define PM3RD_SyncControl_HSYNC_OVERRIDE_FORCE_HIGH	(1<<6)
-	#define PM3RD_SyncControl_VSYNC_OVERRIDE_SETBY_VSYNC	(0<<7)
-	#define PM3RD_SyncControl_VSYNC_OVERRIDE_FORCE_HIGH	(1<<7)
+#	define PM3RD_SyncControl_HSYNC_ACTIVE_LOW		(0<<0)
+#	define PM3RD_SyncControl_HSYNC_ACTIVE_HIGH		(1<<0)
+#	define PM3RD_SyncControl_HSYNC_FORCE_ACTIVE		(3<<0)
+#	define PM3RD_SyncControl_HSYNC_FORCE_INACTIVE		(4<<0)
+#	define PM3RD_SyncControl_HSYNC_TRI_STATE		(2<<0)
+#	define PM3RD_SyncControl_VSYNC_ACTIVE_LOW		(0<<3)
+#	define PM3RD_SyncControl_VSYNC_ACTIVE_HIGH		(1<<3)
+#	define PM3RD_SyncControl_VSYNC_TRI_STATE		(2<<3)
+#	define PM3RD_SyncControl_VSYNC_FORCE_ACTIVE		(3<<3)
+#	define PM3RD_SyncControl_VSYNC_FORCE_INACTIVE		(4<<3)
+#	define PM3RD_SyncControl_HSYNC_OVERRIDE_SETBY_HSYNC	(0<<6)
+#	define PM3RD_SyncControl_HSYNC_OVERRIDE_FORCE_HIGH	(1<<6)
+#	define PM3RD_SyncControl_VSYNC_OVERRIDE_SETBY_VSYNC	(0<<7)
+#	define PM3RD_SyncControl_VSYNC_OVERRIDE_FORCE_HIGH	(1<<7)
 #define PM3RD_DACControl					0x002
-	#define PM3RD_DACControl_DAC_POWER_ON			(0<<0)
-	#define PM3RD_DACControl_DAC_POWER_OFF			(1<<0)
-	#define PM3RD_DACControl_SYNC_ON_GREEN_DISABLE		(0<<3)
-	#define PM3RD_DACControl_SYNC_ON_GREEN_ENABLE		(1<<3)
-	#define PM3RD_DACControl_BLANK_RED_DAC_DISABLE		(0<<4)
-	#define PM3RD_DACControl_BLANK_RED_DAC_ENABLE		(1<<4)
-	#define PM3RD_DACControl_BLANK_GREEN_DAC_DISABLE	(0<<5)
-	#define PM3RD_DACControl_BLANK_GREEN_DAC_ENABLE		(1<<5)
-	#define PM3RD_DACControl_BLANK_BLUE_DAC_DISABLE		(0<<6)
-	#define PM3RD_DACControl_BLANK_BLUE_DAC_ENABLE		(1<<6)
-	#define PM3RD_DACControl_BLANK_PEDESTAL_DISABLE		(0<<7)
-	#define PM3RD_DACControl_BLANK_PEDESTAL_ENABLE		(1<<7)
+#	define PM3RD_DACControl_DAC_POWER_ON			(0<<0)
+#	define PM3RD_DACControl_DAC_POWER_OFF			(1<<0)
+#	define PM3RD_DACControl_SYNC_ON_GREEN_DISABLE		(0<<3)
+#	define PM3RD_DACControl_SYNC_ON_GREEN_ENABLE		(1<<3)
+#	define PM3RD_DACControl_BLANK_RED_DAC_DISABLE		(0<<4)
+#	define PM3RD_DACControl_BLANK_RED_DAC_ENABLE		(1<<4)
+#	define PM3RD_DACControl_BLANK_GREEN_DAC_DISABLE	(0<<5)
+#	define PM3RD_DACControl_BLANK_GREEN_DAC_ENABLE		(1<<5)
+#	define PM3RD_DACControl_BLANK_BLUE_DAC_DISABLE		(0<<6)
+#	define PM3RD_DACControl_BLANK_BLUE_DAC_ENABLE		(1<<6)
+#	define PM3RD_DACControl_BLANK_PEDESTAL_DISABLE		(0<<7)
+#	define PM3RD_DACControl_BLANK_PEDESTAL_ENABLE		(1<<7)
 #define PM3RD_PixelSize						0x003
-	#define PM3RD_PixelSize_24_BIT_PIXELS			(4<<0)
-	#define PM3RD_PixelSize_32_BIT_PIXELS			(2<<0)
-	#define PM3RD_PixelSize_16_BIT_PIXELS			(1<<0)
-	#define PM3RD_PixelSize_8_BIT_PIXELS			(0<<0)
+#	define PM3RD_PixelSize_24_BIT_PIXELS			(4<<0)
+#	define PM3RD_PixelSize_32_BIT_PIXELS			(2<<0)
+#	define PM3RD_PixelSize_16_BIT_PIXELS			(1<<0)
+#	define PM3RD_PixelSize_8_BIT_PIXELS			(0<<0)
 #define PM3RD_ColorFormat					0x004
-	#define PM3RD_ColorFormat_LINEAR_COLOR_EXT_ENABLE	(1<<6)
-	#define PM3RD_ColorFormat_LINEAR_COLOR_EXT_DISABLE	(0<<6)
-	#define PM3RD_ColorFormat_COLOR_ORDER_BLUE_LOW		(1<<5)
-	#define PM3RD_ColorFormat_COLOR_ORDER_RED_LOW		(0<<5)
-	#define PM3RD_ColorFormat_COLOR_FORMAT_MASK		(0x1f<<0)
-	#define PM3RD_ColorFormat_8888_COLOR			(0<<0)
-	#define PM3RD_ColorFormat_5551_FRONT_COLOR		(1<<0)
-	#define PM3RD_ColorFormat_4444_COLOR			(2<<0)
-	#define PM3RD_ColorFormat_332_FRONT_COLOR		(5<<0)
-	#define PM3RD_ColorFormat_332_BACK_COLOR		(6<<0)
-	#define PM3RD_ColorFormat_2321_FRONT_COLOR		(9<<0)
-	#define PM3RD_ColorFormat_2321_BACK_COLOR		(10<<0)
-	#define PM3RD_ColorFormat_232_FRONTOFF_COLOR		(11<<0)
-	#define PM3RD_ColorFormat_232_BACKOFF_COLOR		(12<<0)
-	#define PM3RD_ColorFormat_5551_BACK_COLOR		(13<<0)
-	#define PM3RD_ColorFormat_CI8_COLOR			(14<<0)
-	#define PM3RD_ColorFormat_565_FRONT_COLOR		(16<<0)
-	#define PM3RD_ColorFormat_565_BACK_COLOR		(17<<0)
+#	define PM3RD_ColorFormat_LINEAR_COLOR_EXT_ENABLE	(1<<6)
+#	define PM3RD_ColorFormat_LINEAR_COLOR_EXT_DISABLE	(0<<6)
+#	define PM3RD_ColorFormat_COLOR_ORDER_BLUE_LOW		(1<<5)
+#	define PM3RD_ColorFormat_COLOR_ORDER_RED_LOW		(0<<5)
+#	define PM3RD_ColorFormat_COLOR_FORMAT_MASK		(0x1f<<0)
+#	define PM3RD_ColorFormat_8888_COLOR			(0<<0)
+#	define PM3RD_ColorFormat_5551_FRONT_COLOR		(1<<0)
+#	define PM3RD_ColorFormat_4444_COLOR			(2<<0)
+#	define PM3RD_ColorFormat_332_FRONT_COLOR		(5<<0)
+#	define PM3RD_ColorFormat_332_BACK_COLOR		(6<<0)
+#	define PM3RD_ColorFormat_2321_FRONT_COLOR		(9<<0)
+#	define PM3RD_ColorFormat_2321_BACK_COLOR		(10<<0)
+#	define PM3RD_ColorFormat_232_FRONTOFF_COLOR		(11<<0)
+#	define PM3RD_ColorFormat_232_BACKOFF_COLOR		(12<<0)
+#	define PM3RD_ColorFormat_5551_BACK_COLOR		(13<<0)
+#	define PM3RD_ColorFormat_CI8_COLOR			(14<<0)
+#	define PM3RD_ColorFormat_565_FRONT_COLOR		(16<<0)
+#	define PM3RD_ColorFormat_565_BACK_COLOR		(17<<0)
 #define PM3RD_CursorMode					0x005
-	#define PM3RD_CursorMode_CURSOR_DISABLE			(0<<0)
-	#define PM3RD_CursorMode_CURSOR_ENABLE			(1<<0)
-	#define PM3RD_CursorMode_FORMAT_64x64_2BPE_P0123	(0<<2)
-	#define PM3RD_CursorMode_FORMAT_32x32_2BPE_P0		(1<<2)
-	#define PM3RD_CursorMode_FORMAT_32x32_2BPE_P1		(2<<2)
-	#define PM3RD_CursorMode_FORMAT_32x32_2BPE_P2		(3<<2)
-	#define PM3RD_CursorMode_FORMAT_32x32_2BPE_P3		(4<<2)
-	#define PM3RD_CursorMode_FORMAT_32x32_4BPE_P01		(5<<2)
-	#define PM3RD_CursorMode_FORMAT_32x32_4BPE_P23		(6<<2)
-	#define PM3RD_CursorMode_TYPE_MS			(0<<4)
-	#define PM3RD_CursorMode_TYPE_X				(1<<4)
-	#define PM3RD_CursorMode_REVERSE_PIXEL_ORDER_DISABLE	(0<<6)
-	#define PM3RD_CursorMode_REVERSE_PIXEL_ORDER_ENABLE	(1<<6)
-	#define PM3RD_CursorMode_REVERSE_PIXEL_ORDER_3_COLOR	(2<<6)
-	#define PM3RD_CursorMode_REVERSE_PIXEL_ORDER_15_COLOR	(3<<6)
+#	define PM3RD_CursorMode_CURSOR_DISABLE			(0<<0)
+#	define PM3RD_CursorMode_CURSOR_ENABLE			(1<<0)
+#	define PM3RD_CursorMode_FORMAT_64x64_2BPE_P0123	(0<<2)
+#	define PM3RD_CursorMode_FORMAT_32x32_2BPE_P0		(1<<2)
+#	define PM3RD_CursorMode_FORMAT_32x32_2BPE_P1		(2<<2)
+#	define PM3RD_CursorMode_FORMAT_32x32_2BPE_P2		(3<<2)
+#	define PM3RD_CursorMode_FORMAT_32x32_2BPE_P3		(4<<2)
+#	define PM3RD_CursorMode_FORMAT_32x32_4BPE_P01		(5<<2)
+#	define PM3RD_CursorMode_FORMAT_32x32_4BPE_P23		(6<<2)
+#	define PM3RD_CursorMode_TYPE_MS			(0<<4)
+#	define PM3RD_CursorMode_TYPE_X				(1<<4)
+#	define PM3RD_CursorMode_REVERSE_PIXEL_ORDER_DISABLE	(0<<6)
+#	define PM3RD_CursorMode_REVERSE_PIXEL_ORDER_ENABLE	(1<<6)
+#	define PM3RD_CursorMode_REVERSE_PIXEL_ORDER_3_COLOR	(2<<6)
+#	define PM3RD_CursorMode_REVERSE_PIXEL_ORDER_15_COLOR	(3<<6)
 #define PM3RD_CursorControl					0x006
-	#define PM3RD_CursorControl_DOUBLE_X_DISABLED		(0<<0)
-	#define PM3RD_CursorControl_DOUBLE_X_ENABLED		(1<<0)
-	#define PM3RD_CursorControl_DOUBLE_Y_DISABLED		(0<<1)
-	#define PM3RD_CursorControl_DOUBLE_Y_ENABLED		(1<<1)
-	#define PM3RD_CursorControl_READBACK_POS_DISABLED	(0<<2)
-	#define PM3RD_CursorControl_READBACK_POS_ENABLED	(1<<2)
+#	define PM3RD_CursorControl_DOUBLE_X_DISABLED		(0<<0)
+#	define PM3RD_CursorControl_DOUBLE_X_ENABLED		(1<<0)
+#	define PM3RD_CursorControl_DOUBLE_Y_DISABLED		(0<<1)
+#	define PM3RD_CursorControl_DOUBLE_Y_ENABLED		(1<<1)
+#	define PM3RD_CursorControl_READBACK_POS_DISABLED	(0<<2)
+#	define PM3RD_CursorControl_READBACK_POS_ENABLED	(1<<2)
 
 #define PM3RD_CursorXLow					0x007
 #define PM3RD_CursorXHigh					0x008
@@ -354,17 +354,17 @@
 #define PM3RD_CursorHotSpotY					0x00c
 #define PM3RD_OverlayKey					0x00d
 #define PM3RD_Pan						0x00e
-	#define PM3RD_Pan_DISABLE				(0<<0)
-	#define PM3RD_Pan_ENABLE				(1<<0)
-	#define PM3RD_Pan_GATE_DISABLE				(0<<1)
-	#define PM3RD_Pan_GATE_ENABLE				(1<<1)
+#	define PM3RD_Pan_DISABLE				(0<<0)
+#	define PM3RD_Pan_ENABLE				(1<<0)
+#	define PM3RD_Pan_GATE_DISABLE				(0<<1)
+#	define PM3RD_Pan_GATE_ENABLE				(1<<1)
 #define PM3RD_Sense						0x00f
 
 #define PM3RD_CheckControl					0x018
-	#define PM3RD_CheckControl_PIXEL_DISABLED		(0<<0)
-	#define PM3RD_CheckControl_PIXEL_ENABLED		(1<<0)
-	#define PM3RD_CheckControl_LUT_DISABLED			(0<<1)
-	#define PM3RD_CheckControl_LUT_ENABLED			(1<<1)
+#	define PM3RD_CheckControl_PIXEL_DISABLED		(0<<0)
+#	define PM3RD_CheckControl_PIXEL_ENABLED		(1<<0)
+#	define PM3RD_CheckControl_LUT_DISABLED			(0<<1)
+#	define PM3RD_CheckControl_LUT_ENABLED			(1<<1)
 #define PM3RD_CheckPixelRed					0x019
 #define PM3RD_CheckPixelGreen					0x01a
 #define PM3RD_CheckPixelBlue					0x01b
@@ -374,19 +374,19 @@
 #define PM3RD_Scratch						0x01f
 
 #define PM3RD_VideoOverlayControl				0x020
-	#define PM3RD_VideoOverlayControl_DISABLE		(0<<0)
-	#define PM3RD_VideoOverlayControl_ENABLE		(1<<0)
-	#define PM3RD_VideoOverlayControl_MODE_MASK		(3<<1)
-	#define PM3RD_VideoOverlayControl_MODE_MAINKEY		(0<<1)
-	#define PM3RD_VideoOverlayControl_MODE_OVERLAYKEY	(1<<1)
-	#define PM3RD_VideoOverlayControl_MODE_ALWAYS		(2<<1)
-	#define PM3RD_VideoOverlayControl_MODE_BLEND		(3<<1)
-	#define PM3RD_VideoOverlayControl_DIRECTCOLOR_DISABLED	(0<<3)
-	#define PM3RD_VideoOverlayControl_DIRECTCOLOR_ENABLED	(1<<3)
-	#define PM3RD_VideoOverlayControl_BLENDSRC_MAIN		(0<<4)
-	#define PM3RD_VideoOverlayControl_BLENDSRC_REGISTER	(1<<4)
-	#define PM3RD_VideoOverlayControl_KEY_COLOR		(0<<5)
-	#define PM3RD_VideoOverlayControl_KEY_ALPHA		(1<<5)
+#	define PM3RD_VideoOverlayControl_DISABLE		(0<<0)
+#	define PM3RD_VideoOverlayControl_ENABLE		(1<<0)
+#	define PM3RD_VideoOverlayControl_MODE_MASK		(3<<1)
+#	define PM3RD_VideoOverlayControl_MODE_MAINKEY		(0<<1)
+#	define PM3RD_VideoOverlayControl_MODE_OVERLAYKEY	(1<<1)
+#	define PM3RD_VideoOverlayControl_MODE_ALWAYS		(2<<1)
+#	define PM3RD_VideoOverlayControl_MODE_BLEND		(3<<1)
+#	define PM3RD_VideoOverlayControl_DIRECTCOLOR_DISABLED	(0<<3)
+#	define PM3RD_VideoOverlayControl_DIRECTCOLOR_ENABLED	(1<<3)
+#	define PM3RD_VideoOverlayControl_BLENDSRC_MAIN		(0<<4)
+#	define PM3RD_VideoOverlayControl_BLENDSRC_REGISTER	(1<<4)
+#	define PM3RD_VideoOverlayControl_KEY_COLOR		(0<<5)
+#	define PM3RD_VideoOverlayControl_KEY_ALPHA		(1<<5)
 #define PM3RD_VideoOverlayXStartLow				0x021
 #define PM3RD_VideoOverlayXStartHigh				0x022
 #define PM3RD_VideoOverlayYStartLow				0x023
@@ -399,10 +399,10 @@
 #define PM3RD_VideoOverlayKeyG					0x02a
 #define PM3RD_VideoOverlayKeyB					0x02b
 #define PM3RD_VideoOverlayBlend					0x02c
-	#define PM3RD_VideoOverlayBlend_FACTOR_0_PERCENT	(0<<6)
-	#define PM3RD_VideoOverlayBlend_FACTOR_25_PERCENT	(1<<6)
-	#define PM3RD_VideoOverlayBlend_FACTOR_75_PERCENT	(2<<6)
-	#define PM3RD_VideoOverlayBlend_FACTOR_100_PERCENT	(3<<6)
+#	define PM3RD_VideoOverlayBlend_FACTOR_0_PERCENT	(0<<6)
+#	define PM3RD_VideoOverlayBlend_FACTOR_25_PERCENT	(1<<6)
+#	define PM3RD_VideoOverlayBlend_FACTOR_75_PERCENT	(2<<6)
+#	define PM3RD_VideoOverlayBlend_FACTOR_100_PERCENT	(3<<6)
 
 #define PM3RD_DClkSetup1					0x1f0
 #define PM3RD_DClkSetup2					0x1f1
@@ -410,17 +410,17 @@
 #define PM3RD_KClkSetup2					0x1f3
 
 #define PM3RD_DClkControl					0x200
-	#define PM3RD_DClkControl_SOURCE_PLL			(0<<4)
-	#define PM3RD_DClkControl_SOURCE_VSA			(1<<4)
-	#define PM3RD_DClkControl_SOURCE_VSB			(2<<4)
-	#define PM3RD_DClkControl_SOURCE_EXT			(3<<4)
-	#define PM3RD_DClkControl_STATE_RUN			(2<<2)
-	#define PM3RD_DClkControl_STATE_HIGH			(1<<2)
-	#define PM3RD_DClkControl_STATE_LOW			(0<<2)
-	#define PM3RD_DClkControl_LOCKED			(1<<1)
-	#define PM3RD_DClkControl_NOT_LOCKED			(0<<1)
-	#define PM3RD_DClkControl_ENABLE			(1<<0)
-	#define PM3RD_DClkControl_DISABLE			(0<<0)
+#	define PM3RD_DClkControl_SOURCE_PLL			(0<<4)
+#	define PM3RD_DClkControl_SOURCE_VSA			(1<<4)
+#	define PM3RD_DClkControl_SOURCE_VSB			(2<<4)
+#	define PM3RD_DClkControl_SOURCE_EXT			(3<<4)
+#	define PM3RD_DClkControl_STATE_RUN			(2<<2)
+#	define PM3RD_DClkControl_STATE_HIGH			(1<<2)
+#	define PM3RD_DClkControl_STATE_LOW			(0<<2)
+#	define PM3RD_DClkControl_LOCKED			(1<<1)
+#	define PM3RD_DClkControl_NOT_LOCKED			(0<<1)
+#	define PM3RD_DClkControl_ENABLE			(1<<0)
+#	define PM3RD_DClkControl_DISABLE			(0<<0)
 #define PM3RD_DClk0PreScale					0x201
 #define PM3RD_DClk0FeedbackScale				0x202
 #define PM3RD_DClk0PostScale					0x203
@@ -434,53 +434,53 @@
 #define PM3RD_DClk3FeedbackScale				0x20b
 #define PM3RD_DClk3PostScale					0x20c
 #define PM3RD_KClkControl					0x20d
-	#define PM3RD_KClkControl_DISABLE			(0<<0)
-	#define PM3RD_KClkControl_ENABLE			(1<<0)
-	#define PM3RD_KClkControl_NOT_LOCKED			(0<<1)
-	#define PM3RD_KClkControl_LOCKED			(1<<1)
-	#define PM3RD_KClkControl_STATE_LOW			(0<<2)
-	#define PM3RD_KClkControl_STATE_HIGH			(1<<2)
-	#define PM3RD_KClkControl_STATE_RUN			(2<<2)
-	#define PM3RD_KClkControl_STATE_LOW_POWER		(3<<2)
-	#define PM3RD_KClkControl_SOURCE_PCLK			(0<<4)
-	#define PM3RD_KClkControl_SOURCE_HALF_PCLK		(1<<4)
-	#define PM3RD_KClkControl_SOURCE_PLL			(2<<4)
+#	define PM3RD_KClkControl_DISABLE			(0<<0)
+#	define PM3RD_KClkControl_ENABLE			(1<<0)
+#	define PM3RD_KClkControl_NOT_LOCKED			(0<<1)
+#	define PM3RD_KClkControl_LOCKED			(1<<1)
+#	define PM3RD_KClkControl_STATE_LOW			(0<<2)
+#	define PM3RD_KClkControl_STATE_HIGH			(1<<2)
+#	define PM3RD_KClkControl_STATE_RUN			(2<<2)
+#	define PM3RD_KClkControl_STATE_LOW_POWER		(3<<2)
+#	define PM3RD_KClkControl_SOURCE_PCLK			(0<<4)
+#	define PM3RD_KClkControl_SOURCE_HALF_PCLK		(1<<4)
+#	define PM3RD_KClkControl_SOURCE_PLL			(2<<4)
 #define PM3RD_KClkPreScale					0x20e
 #define PM3RD_KClkFeedbackScale					0x20f
 #define PM3RD_KClkPostScale					0x210
 #define PM3RD_MClkControl					0x211
-	#define PM3RD_MClkControl_DISABLE			(0<<0)
-	#define PM3RD_MClkControl_ENABLE			(1<<0)
-	#define PM3RD_MClkControl_NOT_LOCKED			(0<<1)
-	#define PM3RD_MClkControl_LOCKED			(1<<1)
-	#define PM3RD_MClkControl_STATE_LOW			(0<<2)
-	#define PM3RD_MClkControl_STATE_HIGH			(1<<2)
-	#define PM3RD_MClkControl_STATE_RUN			(2<<2)
-	#define PM3RD_MClkControl_STATE_LOW_POWER		(3<<2)
-	#define PM3RD_MClkControl_SOURCE_PCLK			(0<<4)
-	#define PM3RD_MClkControl_SOURCE_HALF_PCLK		(1<<4)
-	#define PM3RD_MClkControl_SOURCE_HALF_EXT		(3<<4)
-	#define PM3RD_MClkControl_SOURCE_EXT			(4<<4)
-	#define PM3RD_MClkControl_SOURCE_HALF_KCLK		(5<<4)
-	#define PM3RD_MClkControl_SOURCE_KCLK			(6<<4)
+#	define PM3RD_MClkControl_DISABLE			(0<<0)
+#	define PM3RD_MClkControl_ENABLE			(1<<0)
+#	define PM3RD_MClkControl_NOT_LOCKED			(0<<1)
+#	define PM3RD_MClkControl_LOCKED			(1<<1)
+#	define PM3RD_MClkControl_STATE_LOW			(0<<2)
+#	define PM3RD_MClkControl_STATE_HIGH			(1<<2)
+#	define PM3RD_MClkControl_STATE_RUN			(2<<2)
+#	define PM3RD_MClkControl_STATE_LOW_POWER		(3<<2)
+#	define PM3RD_MClkControl_SOURCE_PCLK			(0<<4)
+#	define PM3RD_MClkControl_SOURCE_HALF_PCLK		(1<<4)
+#	define PM3RD_MClkControl_SOURCE_HALF_EXT		(3<<4)
+#	define PM3RD_MClkControl_SOURCE_EXT			(4<<4)
+#	define PM3RD_MClkControl_SOURCE_HALF_KCLK		(5<<4)
+#	define PM3RD_MClkControl_SOURCE_KCLK			(6<<4)
 #define PM3RD_MClkPreScale					0x212
 #define PM3RD_MClkFeedbackScale					0x213
 #define PM3RD_MClkPostScale					0x214
 #define PM3RD_SClkControl					0x215
-	#define PM3RD_SClkControl_DISABLE			(0<<0)
-	#define PM3RD_SClkControl_ENABLE			(1<<0)
-	#define PM3RD_SClkControl_NOT_LOCKED			(0<<1)
-	#define PM3RD_SClkControl_LOCKED			(1<<1)
-	#define PM3RD_SClkControl_STATE_LOW			(0<<2)
-	#define PM3RD_SClkControl_STATE_HIGH			(1<<2)
-	#define PM3RD_SClkControl_STATE_RUN			(2<<2)
-	#define PM3RD_SClkControl_STATE_LOW_POWER		(3<<2)
-	#define PM3RD_SClkControl_SOURCE_PCLK			(0<<4)
-	#define PM3RD_SClkControl_SOURCE_HALF_PCLK		(1<<4)
-	#define PM3RD_SClkControl_SOURCE_HALF_EXT		(3<<4)
-	#define PM3RD_SClkControl_SOURCE_EXT			(4<<4)
-	#define PM3RD_SClkControl_SOURCE_HALF_KCLK		(5<<4)
-	#define PM3RD_SClkControl_SOURCE_KCLK			(6<<4)
+#	define PM3RD_SClkControl_DISABLE			(0<<0)
+#	define PM3RD_SClkControl_ENABLE			(1<<0)
+#	define PM3RD_SClkControl_NOT_LOCKED			(0<<1)
+#	define PM3RD_SClkControl_LOCKED			(1<<1)
+#	define PM3RD_SClkControl_STATE_LOW			(0<<2)
+#	define PM3RD_SClkControl_STATE_HIGH			(1<<2)
+#	define PM3RD_SClkControl_STATE_RUN			(2<<2)
+#	define PM3RD_SClkControl_STATE_LOW_POWER		(3<<2)
+#	define PM3RD_SClkControl_SOURCE_PCLK			(0<<4)
+#	define PM3RD_SClkControl_SOURCE_HALF_PCLK		(1<<4)
+#	define PM3RD_SClkControl_SOURCE_HALF_EXT		(3<<4)
+#	define PM3RD_SClkControl_SOURCE_EXT			(4<<4)
+#	define PM3RD_SClkControl_SOURCE_HALF_KCLK		(5<<4)
+#	define PM3RD_SClkControl_SOURCE_KCLK			(6<<4)
 #define PM3RD_SClkPreScale					0x216
 #define PM3RD_SClkFeedbackScale					0x217
 #define PM3RD_SClkPostScale					0x218
@@ -520,10 +520,10 @@
 #define PM3ColorDDAModeOr					0xabe8
 #define PM3CommandInterrupt					0xa990
 #define PM3ConstantColorDDA					0xafb0
-	#define PM3ConstantColorDDA_R(r)		((r)&0xff)
-	#define PM3ConstantColorDDA_G(g)		(((g)&0xff)<<8)
-	#define PM3ConstantColorDDA_B(b)		(((b)&0xff)<<16)
-	#define PM3ConstantColorDDA_A(a)		(((a)&0xff)<<24)
+#	define PM3ConstantColorDDA_R(r)		((r)&0xff)
+#	define PM3ConstantColorDDA_G(g)		(((g)&0xff)<<8)
+#	define PM3ConstantColorDDA_B(b)		(((b)&0xff)<<16)
+#	define PM3ConstantColorDDA_A(a)		(((a)&0xff)<<24)
 #define PM3ContextData						0x8dd0
 #define PM3ContextDump						0x8dc0
 #define PM3ContextRestore					0x8dc8
@@ -567,59 +567,59 @@
 #define PM3FBDestReadBufferOffset1				0xaea8
 #define PM3FBDestReadBufferOffset2				0xaeb0
 #define PM3FBDestReadBufferOffset3				0xaeb8
-	#define PM3FBDestReadBufferOffset_XOffset(x)	((x)&0xffff)
-	#define PM3FBDestReadBufferOffset_YOffset(y)	(((y)&0xffff)<<16)
+#	define PM3FBDestReadBufferOffset_XOffset(x)	((x)&0xffff)
+#	define PM3FBDestReadBufferOffset_YOffset(y)	(((y)&0xffff)<<16)
 #define PM3FBDestReadBufferWidth0				0xaec0
 #define PM3FBDestReadBufferWidth1				0xaec8
 #define PM3FBDestReadBufferWidth2				0xaed0
 #define PM3FBDestReadBufferWidth3				0xaed8
-	#define PM3FBDestReadBufferWidth_Width(w)	((w)&0x0fff)
+#	define PM3FBDestReadBufferWidth_Width(w)	((w)&0x0fff)
 
 #define PM3FBDestReadEnables					0xaee8
 #define PM3FBDestReadEnablesAnd					0xad20
 #define PM3FBDestReadEnablesOr					0xad28
-	#define PM3FBDestReadEnables_E(e)		((e)&0xff)
-	#define PM3FBDestReadEnables_E0				1<<0
-	#define PM3FBDestReadEnables_E1				1<<1
-	#define PM3FBDestReadEnables_E2				1<<2
-	#define PM3FBDestReadEnables_E3				1<<3
-	#define PM3FBDestReadEnables_E4				1<<4
-	#define PM3FBDestReadEnables_E5				1<<5
-	#define PM3FBDestReadEnables_E6				1<<6
-	#define PM3FBDestReadEnables_E7				1<<7
-	#define PM3FBDestReadEnables_R(r)		(((r)&0xff)<<8)
-	#define PM3FBDestReadEnables_R0				1<<8
-	#define PM3FBDestReadEnables_R1				1<<9
-	#define PM3FBDestReadEnables_R2				1<<10
-	#define PM3FBDestReadEnables_R3				1<<11
-	#define PM3FBDestReadEnables_R4				1<<12
-	#define PM3FBDestReadEnables_R5				1<<13
-	#define PM3FBDestReadEnables_R6				1<<14
-	#define PM3FBDestReadEnables_R7				1<<15
-	#define PM3FBDestReadEnables_ReferenceAlpha(a)	(((a)&0xff)<<24)
+#	define PM3FBDestReadEnables_E(e)		((e)&0xff)
+#	define PM3FBDestReadEnables_E0				1<<0
+#	define PM3FBDestReadEnables_E1				1<<1
+#	define PM3FBDestReadEnables_E2				1<<2
+#	define PM3FBDestReadEnables_E3				1<<3
+#	define PM3FBDestReadEnables_E4				1<<4
+#	define PM3FBDestReadEnables_E5				1<<5
+#	define PM3FBDestReadEnables_E6				1<<6
+#	define PM3FBDestReadEnables_E7				1<<7
+#	define PM3FBDestReadEnables_R(r)		(((r)&0xff)<<8)
+#	define PM3FBDestReadEnables_R0				1<<8
+#	define PM3FBDestReadEnables_R1				1<<9
+#	define PM3FBDestReadEnables_R2				1<<10
+#	define PM3FBDestReadEnables_R3				1<<11
+#	define PM3FBDestReadEnables_R4				1<<12
+#	define PM3FBDestReadEnables_R5				1<<13
+#	define PM3FBDestReadEnables_R6				1<<14
+#	define PM3FBDestReadEnables_R7				1<<15
+#	define PM3FBDestReadEnables_ReferenceAlpha(a)	(((a)&0xff)<<24)
 
 #define PM3FBDestReadMode					0xaee0
 #define PM3FBDestReadModeAnd					0xac90
 #define PM3FBDestReadModeOr					0xac98
-	#define PM3FBDestReadMode_ReadDisable			0<<0
-	#define PM3FBDestReadMode_ReadEnable			1<<0
-	#define PM3FBDestReadMode_StripePitch(sp)	(((sp)&0x7)<<2
-	#define PM3FBDestReadMode_StripeHeight(sh)	(((sh)&0x7)<<7
-	#define PM3FBDestReadMode_Enable0			1<<8
-	#define PM3FBDestReadMode_Enable1			1<<9
-	#define PM3FBDestReadMode_Enable2			1<<10
-	#define PM3FBDestReadMode_Enable3			1<<11
-	#define PM3FBDestReadMode_Layout0(l)		(((l)&0x3)<<12
-	#define PM3FBDestReadMode_Layout1(l)		(((l)&0x3)<<14
-	#define PM3FBDestReadMode_Layout2(l)		(((l)&0x3)<<16
-	#define PM3FBDestReadMode_Layout3(l)		(((l)&0x3)<<18
-	#define PM3FBDestReadMode_Origin0			1<<20
-	#define PM3FBDestReadMode_Origin1			1<<21
-	#define PM3FBDestReadMode_Origin2			1<<22
-	#define PM3FBDestReadMode_Origin3			1<<23
-	#define PM3FBDestReadMode_Blocking			1<<24
-	#define PM3FBDestReadMode_UseReadEnabled		1<<26
-	#define PM3FBDestReadMode_AlphaFiltering		1<<27
+#	define PM3FBDestReadMode_ReadDisable			0<<0
+#	define PM3FBDestReadMode_ReadEnable			1<<0
+#	define PM3FBDestReadMode_StripePitch(sp)	(((sp)&0x7)<<2
+#	define PM3FBDestReadMode_StripeHeight(sh)	(((sh)&0x7)<<7
+#	define PM3FBDestReadMode_Enable0			1<<8
+#	define PM3FBDestReadMode_Enable1			1<<9
+#	define PM3FBDestReadMode_Enable2			1<<10
+#	define PM3FBDestReadMode_Enable3			1<<11
+#	define PM3FBDestReadMode_Layout0(l)		(((l)&0x3)<<12
+#	define PM3FBDestReadMode_Layout1(l)		(((l)&0x3)<<14
+#	define PM3FBDestReadMode_Layout2(l)		(((l)&0x3)<<16
+#	define PM3FBDestReadMode_Layout3(l)		(((l)&0x3)<<18
+#	define PM3FBDestReadMode_Origin0			1<<20
+#	define PM3FBDestReadMode_Origin1			1<<21
+#	define PM3FBDestReadMode_Origin2			1<<22
+#	define PM3FBDestReadMode_Origin3			1<<23
+#	define PM3FBDestReadMode_Blocking			1<<24
+#	define PM3FBDestReadMode_UseReadEnabled		1<<26
+#	define PM3FBDestReadMode_AlphaFiltering		1<<27
 
 #define PM3FBHardwareWriteMask					0x8ac0
 #define PM3FBSoftwareWriteMask					0x8820
@@ -627,26 +627,26 @@
 #define PM3FBSourceData						0x8aa8
 #define PM3FBSourceReadBufferAddr				0xaf08
 #define PM3FBSourceReadBufferOffset				0xaf10
-	#define PM3FBSourceReadBufferOffset_XOffset(x)	((x)&0xffff)
-	#define PM3FBSourceReadBufferOffset_YOffset(y)	(((y)&0xffff)<<16)
+#	define PM3FBSourceReadBufferOffset_XOffset(x)	((x)&0xffff)
+#	define PM3FBSourceReadBufferOffset_YOffset(y)	(((y)&0xffff)<<16)
 #define PM3FBSourceReadBufferWidth				0xaf18
-	#define PM3FBSourceReadBufferWidth_Width(w)	((w)&0x0fff)
+#	define PM3FBSourceReadBufferWidth_Width(w)	((w)&0x0fff)
 #define PM3FBSourceReadMode					0xaf00
 #define PM3FBSourceReadModeAnd					0xaca0
 #define PM3FBSourceReadModeOr					0xaca8
-	#define PM3FBSourceReadMode_ReadDisable			(0<<0)
-	#define PM3FBSourceReadMode_ReadEnable			(1<<0)
-	#define PM3FBSourceReadMode_StripePitch(sp)	(((sp)&0x7)<<2
-	#define PM3FBSourceReadMode_StripeHeight(sh)	(((sh)&0x7)<<7
-	#define PM3FBSourceReadMode_Layout(l)		(((l)&0x3)<<8
-	#define PM3FBSourceReadMode_Origin			1<<10
-	#define PM3FBSourceReadMode_Blocking			1<<11
-	#define PM3FBSourceReadMode_UserTexelCoord		1<<13
-	#define PM3FBSourceReadMode_WrapXEnable			1<<14
-	#define PM3FBSourceReadMode_WrapYEnable			1<<15
-	#define PM3FBSourceReadMode_WrapX(w)		(((w)&0xf)<<16
-	#define PM3FBSourceReadMode_WrapY(w)		(((w)&0xf)<<20
-	#define PM3FBSourceReadMode_ExternalSourceData		1<<24
+#	define PM3FBSourceReadMode_ReadDisable			(0<<0)
+#	define PM3FBSourceReadMode_ReadEnable			(1<<0)
+#	define PM3FBSourceReadMode_StripePitch(sp)	(((sp)&0x7)<<2
+#	define PM3FBSourceReadMode_StripeHeight(sh)	(((sh)&0x7)<<7
+#	define PM3FBSourceReadMode_Layout(l)		(((l)&0x3)<<8
+#	define PM3FBSourceReadMode_Origin			1<<10
+#	define PM3FBSourceReadMode_Blocking			1<<11
+#	define PM3FBSourceReadMode_UserTexelCoord		1<<13
+#	define PM3FBSourceReadMode_WrapXEnable			1<<14
+#	define PM3FBSourceReadMode_WrapYEnable			1<<15
+#	define PM3FBSourceReadMode_WrapX(w)		(((w)&0xf)<<16
+#	define PM3FBSourceReadMode_WrapY(w)		(((w)&0xf)<<20
+#	define PM3FBSourceReadMode_ExternalSourceData		1<<24
 #define PM3FBWriteBufferAddr0                                   0xb000
 #define PM3FBWriteBufferAddr1                                   0xb008
 #define PM3FBWriteBufferAddr2                                   0xb010
@@ -656,36 +656,36 @@
 #define PM3FBWriteBufferOffset1                                 0xb028
 #define PM3FBWriteBufferOffset2                                 0xb030
 #define PM3FBWriteBufferOffset3                                 0xb038
-	#define PM3FBWriteBufferOffset_XOffset(x)		((x)&0xffff)
-	#define PM3FBWriteBufferOffset_YOffset(y)		(((y)&0xffff)<<16)
+#	define PM3FBWriteBufferOffset_XOffset(x)		((x)&0xffff)
+#	define PM3FBWriteBufferOffset_YOffset(y)		(((y)&0xffff)<<16)
 
 #define PM3FBWriteBufferWidth0                                  0xb040
 #define PM3FBWriteBufferWidth1                                  0xb048
 #define PM3FBWriteBufferWidth2                                  0xb050
 #define PM3FBWriteBufferWidth3                                  0xb058
-	#define PM3FBWriteBufferWidth_Width(w)			((w)&0x0fff)
+#	define PM3FBWriteBufferWidth_Width(w)			((w)&0x0fff)
 
 #define PM3FBWriteMode                                          0x8ab8
 #define PM3FBWriteModeAnd                                       0xacf0
 #define PM3FBWriteModeOr                                        0xacf8
-	#define PM3FBWriteMode_WriteDisable                     0<<0
-	#define PM3FBWriteMode_WriteEnable                      1<<0
-	#define PM3FBWriteMode_Replicate                        1<<4
-	#define PM3FBWriteMode_OpaqueSpan                       1<<5
-	#define PM3FBWriteMode_StripePitch(p)            (((p)&0x7)<<6)
-	#define PM3FBWriteMode_StripeHeight(h)           (((h)&0x7)<<9)
-	#define PM3FBWriteMode_Enable0                          1<<12
-	#define PM3FBWriteMode_Enable1                          1<<13
-	#define PM3FBWriteMode_Enable2                          1<<14
-	#define PM3FBWriteMode_Enable3                          1<<15
-	#define PM3FBWriteMode_Layout0(l)               (((l)&0x3)<<16)
-	#define PM3FBWriteMode_Layout1(l)               (((l)&0x3)<<18)
-	#define PM3FBWriteMode_Layout2(l)               (((l)&0x3)<<20)
-	#define PM3FBWriteMode_Layout3(l)               (((l)&0x3)<<22)
-	#define PM3FBWriteMode_Origin0                          1<<24
-	#define PM3FBWriteMode_Origin1                          1<<25
-	#define PM3FBWriteMode_Origin2                          1<<26
-	#define PM3FBWriteMode_Origin3                          1<<27
+#	define PM3FBWriteMode_WriteDisable                     0<<0
+#	define PM3FBWriteMode_WriteEnable                      1<<0
+#	define PM3FBWriteMode_Replicate                        1<<4
+#	define PM3FBWriteMode_OpaqueSpan                       1<<5
+#	define PM3FBWriteMode_StripePitch(p)            (((p)&0x7)<<6)
+#	define PM3FBWriteMode_StripeHeight(h)           (((h)&0x7)<<9)
+#	define PM3FBWriteMode_Enable0                          1<<12
+#	define PM3FBWriteMode_Enable1                          1<<13
+#	define PM3FBWriteMode_Enable2                          1<<14
+#	define PM3FBWriteMode_Enable3                          1<<15
+#	define PM3FBWriteMode_Layout0(l)               (((l)&0x3)<<16)
+#	define PM3FBWriteMode_Layout1(l)               (((l)&0x3)<<18)
+#	define PM3FBWriteMode_Layout2(l)               (((l)&0x3)<<20)
+#	define PM3FBWriteMode_Layout3(l)               (((l)&0x3)<<22)
+#	define PM3FBWriteMode_Origin0                          1<<24
+#	define PM3FBWriteMode_Origin1                          1<<25
+#	define PM3FBWriteMode_Origin2                          1<<26
+#	define PM3FBWriteMode_Origin3                          1<<27
 #define PM3ForegroundColor					0xb0c0
 /* ... */
 #define PM3GIDMode						0xb538
@@ -700,55 +700,55 @@
 #define PM3LBDestReadMode					0xb500
 #define PM3LBDestReadModeAnd					0xb580
 #define PM3LBDestReadModeOr					0xb588
-	#define PM3LBDestReadMode_Disable			0<<0
-	#define PM3LBDestReadMode_Enable			1<<0
-	#define PM3LBDestReadMode_StripePitch(p)		(((p)&0x7)<<2)
-	#define PM3LBDestReadMode_StripeHeight(h)		(((h)&0x7)<<5)
-	#define PM3LBDestReadMode_Layout			1<<8
-	#define PM3LBDestReadMode_Origin			1<<9
-	#define PM3LBDestReadMode_UserReadEnables		1<<10
-	#define PM3LBDestReadMode_Packed16			1<<11
-	#define PM3LBDestReadMode_Width(w)			(((w)&0xfff)<<12)
+#	define PM3LBDestReadMode_Disable			0<<0
+#	define PM3LBDestReadMode_Enable			1<<0
+#	define PM3LBDestReadMode_StripePitch(p)		(((p)&0x7)<<2)
+#	define PM3LBDestReadMode_StripeHeight(h)		(((h)&0x7)<<5)
+#	define PM3LBDestReadMode_Layout			1<<8
+#	define PM3LBDestReadMode_Origin			1<<9
+#	define PM3LBDestReadMode_UserReadEnables		1<<10
+#	define PM3LBDestReadMode_Packed16			1<<11
+#	define PM3LBDestReadMode_Width(w)			(((w)&0xfff)<<12)
 #define PM3LBReadFormat						0x8888
-	#define PM3LBReadFormat_DepthWidth(w)			(((w)&0x3)<<0)
-	#define PM3LBReadFormat_StencilWidth(w)			(((w)&0xf)<<2)
-	#define PM3LBReadFormat_StencilPosition(p)		(((p)&0x1f)<<6)
-	#define PM3LBReadFormat_FCPWidth(w)			(((w)&0xf)<<11)
-	#define PM3LBReadFormat_FCPPosition(p)			(((p)&0x1f)<<15)
-	#define PM3LBReadFormat_GIDWidth(w)			(((w)&0x7)<<20)
-	#define PM3LBReadFormat_GIDPosition(p)			(((p)&0x1f)<<23)
+#	define PM3LBReadFormat_DepthWidth(w)			(((w)&0x3)<<0)
+#	define PM3LBReadFormat_StencilWidth(w)			(((w)&0xf)<<2)
+#	define PM3LBReadFormat_StencilPosition(p)		(((p)&0x1f)<<6)
+#	define PM3LBReadFormat_FCPWidth(w)			(((w)&0xf)<<11)
+#	define PM3LBReadFormat_FCPPosition(p)			(((p)&0x1f)<<15)
+#	define PM3LBReadFormat_GIDWidth(w)			(((w)&0x7)<<20)
+#	define PM3LBReadFormat_GIDPosition(p)			(((p)&0x1f)<<23)
 #define PM3LBSourceReadBufferAddr				0xb528
 #define PM3LBSourceReadBufferOffset				0xb530
 #define PM3LBSourceReadMode					0xb520
 #define PM3LBSourceReadModeAnd					0xb5a0
 #define PM3LBSourceReadModeOr					0xb5a8
-	#define PM3LBSourceReadMode_Enable			1<<0
-	#define PM3LBSourceReadMode_StripePitch(p)		(((p)&0x7)<<2)
-	#define PM3LBSourceReadMode_StripeHeight(h)		(((h)&0x7)<<5)
-	#define PM3LBSourceReadMode_Layout			1<<8
-	#define PM3LBSourceReadMode_Origin			1<<9
-	#define PM3LBSourceReadMode_Packed16			1<<10
-	#define PM3LBSourceReadMode_Width(w)			(((w)&0xfff)<<11)
+#	define PM3LBSourceReadMode_Enable			1<<0
+#	define PM3LBSourceReadMode_StripePitch(p)		(((p)&0x7)<<2)
+#	define PM3LBSourceReadMode_StripeHeight(h)		(((h)&0x7)<<5)
+#	define PM3LBSourceReadMode_Layout			1<<8
+#	define PM3LBSourceReadMode_Origin			1<<9
+#	define PM3LBSourceReadMode_Packed16			1<<10
+#	define PM3LBSourceReadMode_Width(w)			(((w)&0xfff)<<11)
 #define PM3LBStencil						0x88a8
 #define PM3LBWriteBufferAddr					0xb540
 #define PM3LBWriteBufferOffset					0xb548
 #define PM3LBWriteFormat					0x88c8
-	#define PM3LBWriteFormat_DepthWidth(w)			(((w)&0x3)<<0)
-	#define PM3LBWriteFormat_StencilWidth(w)		(((w)&0xf)<<2)
-	#define PM3LBWriteFormat_StencilPosition(p)		(((p)&0x1f)<<6)
-	#define PM3LBWriteFormat_GIDWidth(w)			(((w)&0x7)<<20)
-	#define PM3LBWriteFormat_GIDPosition(p)			(((p)&0x1f)<<23)
+#	define PM3LBWriteFormat_DepthWidth(w)			(((w)&0x3)<<0)
+#	define PM3LBWriteFormat_StencilWidth(w)		(((w)&0xf)<<2)
+#	define PM3LBWriteFormat_StencilPosition(p)		(((p)&0x1f)<<6)
+#	define PM3LBWriteFormat_GIDWidth(w)			(((w)&0x7)<<20)
+#	define PM3LBWriteFormat_GIDPosition(p)			(((p)&0x1f)<<23)
 #define PM3LBWriteMode						0x88c0
 #define PM3LBWriteModeAnd					0xac80
 #define PM3LBWriteModeOr					0xac88
-	#define PM3LBWriteMode_WriteDisable			0<<0
-	#define PM3LBWriteMode_WriteEnable			1<<0
-	#define PM3LBWriteMode_StripePitch(p)			(((p)&0x7)<<3)
-	#define PM3LBWriteMode_StripeHeight(h)			(((h)&0x7)<<6)
-	#define PM3LBWriteMode_Layout				1<<9
-	#define PM3LBWriteMode_Origin				1<<10
-	#define PM3LBWriteMode_Packed16				1<<11
-	#define PM3LBWriteMode_Width(w)				(((w)&0xfff)<<12)
+#	define PM3LBWriteMode_WriteDisable			0<<0
+#	define PM3LBWriteMode_WriteEnable			1<<0
+#	define PM3LBWriteMode_StripePitch(p)			(((p)&0x7)<<3)
+#	define PM3LBWriteMode_StripeHeight(h)			(((h)&0x7)<<6)
+#	define PM3LBWriteMode_Layout				1<<9
+#	define PM3LBWriteMode_Origin				1<<10
+#	define PM3LBWriteMode_Packed16				1<<11
+#	define PM3LBWriteMode_Width(w)				(((w)&0xfff)<<12)
 /* ... */
 #define PM3LineStippleMode					0x81a8
 #define PM3LineStippleModeAnd					0xabc0
@@ -758,16 +758,16 @@
 #define PM3LogicalOpMode					0x8828
 #define PM3LogicalOpModeAnd					0xace0
 #define PM3LogicalOpModeOr					0xace8
-	#define PM3LogicalOpMode_Disable			(0<<0)
-	#define PM3LogicalOpMode_Enable				(1<<0)
-	#define PM3LogicalOpMode_LogicOp(op)			(((op)&0xf)<<1)
-	#define PM3LogicalOpMode_UseConstantWriteData_Disable	(0<<5)
-	#define PM3LogicalOpMode_UseConstantWriteData_Enable	(1<<5)
-	#define PM3LogicalOpMode_Background_Disable		(0<<6)
-	#define PM3LogicalOpMode_Background_Enable		(1<<6)
-	#define PM3LogicalOpMode_Background_LogicOp(op)		(((op)&0xf)<<7)
-	#define PM3LogicalOpMode_UseConstantSource_Disable	(0<<11)
-	#define PM3LogicalOpMode_UseConstantSource_Enable	(1<<11)
+#	define PM3LogicalOpMode_Disable			(0<<0)
+#	define PM3LogicalOpMode_Enable				(1<<0)
+#	define PM3LogicalOpMode_LogicOp(op)			(((op)&0xf)<<1)
+#	define PM3LogicalOpMode_UseConstantWriteData_Disable	(0<<5)
+#	define PM3LogicalOpMode_UseConstantWriteData_Enable	(1<<5)
+#	define PM3LogicalOpMode_Background_Disable		(0<<6)
+#	define PM3LogicalOpMode_Background_Enable		(1<<6)
+#	define PM3LogicalOpMode_Background_LogicOp(op)		(((op)&0xf)<<7)
+#	define PM3LogicalOpMode_UseConstantSource_Disable	(0<<11)
+#	define PM3LogicalOpMode_UseConstantSource_Enable	(1<<11)
 
 /* ... */
 #define PM3LUT							0x8e80
@@ -782,70 +782,70 @@
 #define PM3LUTTransfer						0x84d8
 /* ... */
 #define PM3PixelSize						0x80c0
-	#define PM3PixelSize_GLOBAL_32BIT			(0<<0)
-	#define PM3PixelSize_GLOBAL_16BIT			(1<<0)
-	#define PM3PixelSize_GLOBAL_8BIT			(2<<0)
-	#define PM3PixelSize_RASTERIZER_32BIT			(0<<2)
-	#define PM3PixelSize_RASTERIZER_16BIT			(1<<2)
-	#define PM3PixelSize_RASTERIZER_8BIT			(2<<2)
-	#define PM3PixelSize_SCISSOR_AND_STIPPLE_32BIT		(0<<4)
-	#define PM3PixelSize_SCISSOR_AND_STIPPLE_16BIT		(1<<4)
-	#define PM3PixelSize_SCISSOR_AND_STIPPLE_8BIT		(2<<4)
-	#define PM3PixelSize_TEXTURE_32BIT			(0<<6)
-	#define PM3PixelSize_TEXTURE_16BIT			(1<<6)
-	#define PM3PixelSize_TEXTURE_8BIT			(2<<6)
-	#define PM3PixelSize_LUT_32BIT				(0<<8)
-	#define PM3PixelSize_LUT_16BIT				(1<<8)
-	#define PM3PixelSize_LUT_8BIT				(2<<8)
-	#define PM3PixelSize_FRAMEBUFFER_32BIT			(0<<10)
-	#define PM3PixelSize_FRAMEBUFFER_16BIT			(1<<10)
-	#define PM3PixelSize_FRAMEBUFFER_8BIT			(2<<10)
-	#define PM3PixelSize_LOGICAL_OP_32BIT			(0<<12)
-	#define PM3PixelSize_LOGICAL_OP_16BIT			(1<<12)
-	#define PM3PixelSize_LOGICAL_OP_8BIT			(2<<12)
-	#define PM3PixelSize_LOCALBUFFER_32BIT			(0<<14)
-	#define PM3PixelSize_LOCALBUFFER_16BIT			(1<<14)
-	#define PM3PixelSize_LOCALBUFFER_8BIT			(2<<14)
-	#define PM3PixelSize_SETUP_32BIT			(0<<16)
-	#define PM3PixelSize_SETUP_16BIT			(1<<16)
-	#define PM3PixelSize_SETUP_8BIT				(2<<16)
-	#define PM3PixelSize_GLOBAL				(0<<31)
-	#define PM3PixelSize_INDIVIDUAL				(1<<31)
+#	define PM3PixelSize_GLOBAL_32BIT			(0<<0)
+#	define PM3PixelSize_GLOBAL_16BIT			(1<<0)
+#	define PM3PixelSize_GLOBAL_8BIT			(2<<0)
+#	define PM3PixelSize_RASTERIZER_32BIT			(0<<2)
+#	define PM3PixelSize_RASTERIZER_16BIT			(1<<2)
+#	define PM3PixelSize_RASTERIZER_8BIT			(2<<2)
+#	define PM3PixelSize_SCISSOR_AND_STIPPLE_32BIT		(0<<4)
+#	define PM3PixelSize_SCISSOR_AND_STIPPLE_16BIT		(1<<4)
+#	define PM3PixelSize_SCISSOR_AND_STIPPLE_8BIT		(2<<4)
+#	define PM3PixelSize_TEXTURE_32BIT			(0<<6)
+#	define PM3PixelSize_TEXTURE_16BIT			(1<<6)
+#	define PM3PixelSize_TEXTURE_8BIT			(2<<6)
+#	define PM3PixelSize_LUT_32BIT				(0<<8)
+#	define PM3PixelSize_LUT_16BIT				(1<<8)
+#	define PM3PixelSize_LUT_8BIT				(2<<8)
+#	define PM3PixelSize_FRAMEBUFFER_32BIT			(0<<10)
+#	define PM3PixelSize_FRAMEBUFFER_16BIT			(1<<10)
+#	define PM3PixelSize_FRAMEBUFFER_8BIT			(2<<10)
+#	define PM3PixelSize_LOGICAL_OP_32BIT			(0<<12)
+#	define PM3PixelSize_LOGICAL_OP_16BIT			(1<<12)
+#	define PM3PixelSize_LOGICAL_OP_8BIT			(2<<12)
+#	define PM3PixelSize_LOCALBUFFER_32BIT			(0<<14)
+#	define PM3PixelSize_LOCALBUFFER_16BIT			(1<<14)
+#	define PM3PixelSize_LOCALBUFFER_8BIT			(2<<14)
+#	define PM3PixelSize_SETUP_32BIT			(0<<16)
+#	define PM3PixelSize_SETUP_16BIT			(1<<16)
+#	define PM3PixelSize_SETUP_8BIT				(2<<16)
+#	define PM3PixelSize_GLOBAL				(0<<31)
+#	define PM3PixelSize_INDIVIDUAL				(1<<31)
 /* ... */
 #define PM3Render						0x8038
-	#define PM3Render_AreaStipple_Disable			(0<<0)
-	#define PM3Render_AreaStipple_Enable			(1<<0)
-	#define PM3Render_LineStipple_Disable			(0<<1)
-	#define PM3Render_LineStipple_Enable			(1<<1)
-	#define PM3Render_ResetLine_Disable			(0<<2)
-	#define PM3Render_ResetLine_Enable			(1<<2)
-	#define PM3Render_FastFill_Disable			(0<<3)
-	#define PM3Render_FastFill_Enable			(1<<3)
-	#define PM3Render_Primitive_Line			(0<<6)
-	#define PM3Render_Primitive_Trapezoid			(1<<6)
-	#define PM3Render_Primitive_Point			(2<<6)
-	#define PM3Render_Antialias_Disable			(0<<8)
-	#define PM3Render_Antialias_Enable			(1<<8)
-	#define PM3Render_Antialias_SubPixelRes_4x4		(0<<9)
-	#define PM3Render_Antialias_SubPixelRes_8x8		(1<<9)
-	#define PM3Render_UsePointTable_Disable			(0<<10)
-	#define PM3Render_UsePointTable_Enable			(1<<10)
-	#define PM3Render_SyncOnbitMask_Disable			(0<<11)
-	#define PM3Render_SyncOnBitMask_Enable			(1<<11)
-	#define PM3Render_SyncOnHostData_Disable		(0<<12)
-	#define PM3Render_SyncOnHostData_Enable			(1<<12)
-	#define PM3Render_Texture_Disable			(0<<13)
-	#define PM3Render_Texture_Enable			(1<<13)
-	#define PM3Render_Fog_Disable				(0<<14)
-	#define PM3Render_Fog_Enable				(1<<14)
-	#define PM3Render_Coverage_Disable			(0<<15)
-	#define PM3Render_Coverage_Enable			(1<<15)
-	#define PM3Render_SubPixelCorrection_Disable		(0<<16)
-	#define PM3Render_SubPixelCorrection_Enable		(1<<16)
-	#define PM3Render_SpanOperation_Disable			(0<<18)
-	#define PM3Render_SpanOperation_Enable			(1<<18)
-	#define PM3Render_FBSourceRead_Disable			(0<<27)
-	#define PM3Render_FBSourceRead_Enable			(1<<27)
+#	define PM3Render_AreaStipple_Disable			(0<<0)
+#	define PM3Render_AreaStipple_Enable			(1<<0)
+#	define PM3Render_LineStipple_Disable			(0<<1)
+#	define PM3Render_LineStipple_Enable			(1<<1)
+#	define PM3Render_ResetLine_Disable			(0<<2)
+#	define PM3Render_ResetLine_Enable			(1<<2)
+#	define PM3Render_FastFill_Disable			(0<<3)
+#	define PM3Render_FastFill_Enable			(1<<3)
+#	define PM3Render_Primitive_Line			(0<<6)
+#	define PM3Render_Primitive_Trapezoid			(1<<6)
+#	define PM3Render_Primitive_Point			(2<<6)
+#	define PM3Render_Antialias_Disable			(0<<8)
+#	define PM3Render_Antialias_Enable			(1<<8)
+#	define PM3Render_Antialias_SubPixelRes_4x4		(0<<9)
+#	define PM3Render_Antialias_SubPixelRes_8x8		(1<<9)
+#	define PM3Render_UsePointTable_Disable			(0<<10)
+#	define PM3Render_UsePointTable_Enable			(1<<10)
+#	define PM3Render_SyncOnbitMask_Disable			(0<<11)
+#	define PM3Render_SyncOnBitMask_Enable			(1<<11)
+#	define PM3Render_SyncOnHostData_Disable		(0<<12)
+#	define PM3Render_SyncOnHostData_Enable			(1<<12)
+#	define PM3Render_Texture_Disable			(0<<13)
+#	define PM3Render_Texture_Enable			(1<<13)
+#	define PM3Render_Fog_Disable				(0<<14)
+#	define PM3Render_Fog_Enable				(1<<14)
+#	define PM3Render_Coverage_Disable			(0<<15)
+#	define PM3Render_Coverage_Enable			(1<<15)
+#	define PM3Render_SubPixelCorrection_Disable		(0<<16)
+#	define PM3Render_SubPixelCorrection_Enable		(1<<16)
+#	define PM3Render_SpanOperation_Disable			(0<<18)
+#	define PM3Render_SpanOperation_Enable			(1<<18)
+#	define PM3Render_FBSourceRead_Disable			(0<<27)
+#	define PM3Render_FBSourceRead_Enable			(1<<27)
 #define PM3RasterizerMode					0x80a0
 #define PM3RasterizerModeAnd					0xaba0
 #define PM3RasterizerModeOr					0xabb8
@@ -922,13 +922,13 @@
 #define PM3TextureMapSize					0xb428
 #define PM3TextureMapWidth0					0x8580
 #define PM3TextureMapWidth1					0x8588
-	#define PM3TextureMapWidth_Width(w)		((w&0xfff)<<0)
-	#define PM3TextureMapWidth_BorderLayout			(1<<12)
-	#define PM3TextureMapWidth_Layout_Linear		(0<<13)
-	#define PM3TextureMapWidth_Layout_Patch64		(1<<13)
-	#define PM3TextureMapWidth_Layout_Patch32_2		(2<<13)
-	#define PM3TextureMapWidth_Layout_Patch2		(3<<13)
-	#define PM3TextureMapWidth_HostTexture			(1<<15)
+#	define PM3TextureMapWidth_Width(w)		((w&0xfff)<<0)
+#	define PM3TextureMapWidth_BorderLayout			(1<<12)
+#	define PM3TextureMapWidth_Layout_Linear		(0<<13)
+#	define PM3TextureMapWidth_Layout_Patch64		(1<<13)
+#	define PM3TextureMapWidth_Layout_Patch32_2		(2<<13)
+#	define PM3TextureMapWidth_Layout_Patch2		(3<<13)
+#	define PM3TextureMapWidth_HostTexture			(1<<15)
 #define PM3TextureReadMode0					0xb400
 #define PM3TextureReadMode0And					0xac30
 #define PM3TextureReadMode0Or					0xac38
@@ -938,12 +938,12 @@
 /* ... */
 #define PM3WaitForCompletion					0x80b8
 #define PM3Window						0x8980
-	#define PM3Window_ForceLBUpdate				1<<3
-	#define PM3Window_LBUpdateSource			1<<4
-	#define PM3Window_FrameCount(c)				(((c)&0xff)<<9
-	#define PM3Window_StencilFCP				1<<17
-	#define PM3Window_DepthFCP				1<<18
-	#define PM3Window_OverrideWriteFiltering		1<<19
+#	define PM3Window_ForceLBUpdate				1<<3
+#	define PM3Window_LBUpdateSource			1<<4
+#	define PM3Window_FrameCount(c)				(((c)&0xff)<<9
+#	define PM3Window_StencilFCP				1<<17
+#	define PM3Window_DepthFCP				1<<18
+#	define PM3Window_OverrideWriteFiltering		1<<19
 #define PM3WindowAnd						0xab80
 #define PM3WindowOr						0xab88
 #define PM3WindowOrigin						0x81c8
@@ -961,58 +961,58 @@
 *  GLINT Permedia3 2D setup Unit              *
 ***********************************************/
 #define PM3Config2D						0xb618
-	#define PM3Config2D_OpaqueSpan				1<<0
-	#define PM3Config2D_MultiRXBlit				1<<1
-	#define PM3Config2D_UserScissorEnable			1<<2
-	#define PM3Config2D_FBDestReadEnable			1<<3
-	#define PM3Config2D_AlphaBlendEnable			1<<4
-	#define PM3Config2D_DitherEnable			1<<5
-	#define PM3Config2D_ForegroundROPEnable			1<<6
-	#define PM3Config2D_ForegroundROP(rop)		(((rop)&0xf)<<7)
-	#define PM3Config2D_BackgroundROPEnable			1<<11
-	#define PM3Config2D_BackgroundROP(rop)		(((rop)&0xf)<<12)
-	#define PM3Config2D_UseConstantSource			1<<16
-	#define PM3Config2D_FBWriteEnable			1<<17
-	#define PM3Config2D_Blocking				1<<18
-	#define PM3Config2D_ExternalSourceData			1<<19
-	#define PM3Config2D_LUTModeEnable			1<<20
+#	define PM3Config2D_OpaqueSpan				1<<0
+#	define PM3Config2D_MultiRXBlit				1<<1
+#	define PM3Config2D_UserScissorEnable			1<<2
+#	define PM3Config2D_FBDestReadEnable			1<<3
+#	define PM3Config2D_AlphaBlendEnable			1<<4
+#	define PM3Config2D_DitherEnable			1<<5
+#	define PM3Config2D_ForegroundROPEnable			1<<6
+#	define PM3Config2D_ForegroundROP(rop)		(((rop)&0xf)<<7)
+#	define PM3Config2D_BackgroundROPEnable			1<<11
+#	define PM3Config2D_BackgroundROP(rop)		(((rop)&0xf)<<12)
+#	define PM3Config2D_UseConstantSource			1<<16
+#	define PM3Config2D_FBWriteEnable			1<<17
+#	define PM3Config2D_Blocking				1<<18
+#	define PM3Config2D_ExternalSourceData			1<<19
+#	define PM3Config2D_LUTModeEnable			1<<20
 #define PM3DownloadGlyphwidth					0xb658
-	#define PM3DownloadGlyphwidth_GlyphWidth(gw)	((gw)&0xffff)
+#	define PM3DownloadGlyphwidth_GlyphWidth(gw)	((gw)&0xffff)
 #define PM3DownloadTarget					0xb650
-	#define PM3DownloadTarget_TagName(tag)		((tag)&0x1fff)
+#	define PM3DownloadTarget_TagName(tag)		((tag)&0x1fff)
 #define PM3GlyphData						0xb660
 #define PM3GlyphPosition					0xb608
-	#define PM3GlyphPosition_XOffset(x)		((x)&0xffff)
-	#define PM3GlyphPosition_YOffset(y)		(((y)&0xffff)<<16)
+#	define PM3GlyphPosition_XOffset(x)		((x)&0xffff)
+#	define PM3GlyphPosition_YOffset(y)		(((y)&0xffff)<<16)
 #define PM3Packed4Pixels					0xb668
 #define PM3Packed8Pixels					0xb630
 #define PM3Packed16Pixels					0xb638
 #define PM3RectanglePosition					0xb600
-	#define PM3RectanglePosition_XOffset(x)		((x)&0xffff)
-	#define PM3RectanglePosition_YOffset(y)		(((y)&0xffff)<<16)
+#	define PM3RectanglePosition_XOffset(x)		((x)&0xffff)
+#	define PM3RectanglePosition_YOffset(y)		(((y)&0xffff)<<16)
 #define PM3Render2D						0xb640
-	#define PM3Render2D_Width(w)			((w)&0x0fff)
-	#define PM3Render2D_Operation_Normal			0<<12
-	#define PM3Render2D_Operation_SyncOnHostData		1<<12
-	#define PM3Render2D_Operation_SyncOnBitMask		2<<12
-	#define PM3Render2D_Operation_PatchOrderRendering	3<<12
-	#define PM3Render2D_FBSourceReadEnable			1<<14
-	#define PM3Render2D_SpanOperation			1<<15
-	#define PM3Render2D_Height(h)			(((h)&0x0fff)<<16)
-	#define PM3Render2D_XPositive				1<<28
-	#define PM3Render2D_YPositive				1<<29
-	#define PM3Render2D_AreaStippleEnable			1<<30
-	#define PM3Render2D_TextureEnable			1<<31
+#	define PM3Render2D_Width(w)			((w)&0x0fff)
+#	define PM3Render2D_Operation_Normal			0<<12
+#	define PM3Render2D_Operation_SyncOnHostData		1<<12
+#	define PM3Render2D_Operation_SyncOnBitMask		2<<12
+#	define PM3Render2D_Operation_PatchOrderRendering	3<<12
+#	define PM3Render2D_FBSourceReadEnable			1<<14
+#	define PM3Render2D_SpanOperation			1<<15
+#	define PM3Render2D_Height(h)			(((h)&0x0fff)<<16)
+#	define PM3Render2D_XPositive				1<<28
+#	define PM3Render2D_YPositive				1<<29
+#	define PM3Render2D_AreaStippleEnable			1<<30
+#	define PM3Render2D_TextureEnable			1<<31
 #define PM3Render2DGlyph					0xb648
-	#define PM3Render2DGlyph_Width(w)		((w)&0x7f)
-	#define PM3Render2DGlyph_Height(h)		(((h)&0x7f)<<7)
-	#define PM3Render2DGlyph_XOffset(x)		(((x)&0x1ff)<<14)
-	#define PM3Render2DGlyph_YOffset(y)		(((y)&0x1ff)<<23)
+#	define PM3Render2DGlyph_Width(w)		((w)&0x7f)
+#	define PM3Render2DGlyph_Height(h)		(((h)&0x7f)<<7)
+#	define PM3Render2DGlyph_XOffset(x)		(((x)&0x1ff)<<14)
+#	define PM3Render2DGlyph_YOffset(y)		(((y)&0x1ff)<<23)
 #define PM3RenderPatchOffset					0xb610
-	#define PM3RenderPatchOffset_XOffset(x)		((x)&0xffff)
-	#define PM3RenderPatchOffset_YOffset(y)		(((y)&0xffff)<<16)
+#	define PM3RenderPatchOffset_XOffset(x)		((x)&0xffff)
+#	define PM3RenderPatchOffset_YOffset(y)		(((y)&0xffff)<<16)
 #define PM3RLCount						0xb678
-	#define PM3RLCount_Count(c)			((c)&0x0fff)
+#	define PM3RLCount_Count(c)			((c)&0x0fff)
 #define PM3RLData						0xb670
 
 /**********************************************
@@ -1021,35 +1021,35 @@
 #define PM3FillBackgroundColor                                  0x8330
 #define PM3FillConfig2D0                                        0x8338
 #define PM3FillConfig2D1                                        0x8360
-	#define PM3FillConfig2D_OpaqueSpan                      1<<0
-	#define PM3FillConfig2D_MultiRXBlit                     1<<1
-	#define PM3FillConfig2D_UserScissorEnable               1<<2
-	#define PM3FillConfig2D_FBDestReadEnable                1<<3
-	#define PM3FillConfig2D_AlphaBlendEnable                1<<4
-	#define PM3FillConfig2D_DitherEnable                    1<<5
-	#define PM3FillConfig2D_ForegroundROPEnable             1<<6
-	#define PM3FillConfig2D_ForegroundROP(rop)              (((rop)&0xf)<<7)
-	#define PM3FillConfig2D_BackgroundROPEnable             1<<11
-	#define PM3FillConfig2D_BackgroundROP(rop)              (((rop)&0xf)<<12)
-	#define PM3FillConfig2D_UseConstantSource               1<<16
-	#define PM3FillConfig2D_FBWriteEnable                   1<<17
-	#define PM3FillConfig2D_Blocking                        1<<18
-	#define PM3FillConfig2D_ExternalSourceData              1<<19
-	#define PM3FillConfig2D_LUTModeEnable                   1<<20
+#	define PM3FillConfig2D_OpaqueSpan                      1<<0
+#	define PM3FillConfig2D_MultiRXBlit                     1<<1
+#	define PM3FillConfig2D_UserScissorEnable               1<<2
+#	define PM3FillConfig2D_FBDestReadEnable                1<<3
+#	define PM3FillConfig2D_AlphaBlendEnable                1<<4
+#	define PM3FillConfig2D_DitherEnable                    1<<5
+#	define PM3FillConfig2D_ForegroundROPEnable             1<<6
+#	define PM3FillConfig2D_ForegroundROP(rop)              (((rop)&0xf)<<7)
+#	define PM3FillConfig2D_BackgroundROPEnable             1<<11
+#	define PM3FillConfig2D_BackgroundROP(rop)              (((rop)&0xf)<<12)
+#	define PM3FillConfig2D_UseConstantSource               1<<16
+#	define PM3FillConfig2D_FBWriteEnable                   1<<17
+#	define PM3FillConfig2D_Blocking                        1<<18
+#	define PM3FillConfig2D_ExternalSourceData              1<<19
+#	define PM3FillConfig2D_LUTModeEnable                   1<<20
 #define PM3FillFBDestReadBufferAddr                             0x8310
 #define PM3FillFBSourceReadBufferAddr                           0x8308
 #define PM3FillFBSourceReadBufferOffset                         0x8340
-	#define PM3FillFBSourceReadBufferOffset_XOffset(x)     ((x)&0xffff)
-	#define PM3FillFBSourceReadBufferOffset_YOffset(y)      (((y)&0xffff)<<16)
+#	define PM3FillFBSourceReadBufferOffset_XOffset(x)     ((x)&0xffff)
+#	define PM3FillFBSourceReadBufferOffset_YOffset(y)      (((y)&0xffff)<<16)
 #define PM3FillFBWriteBufferAddr                                0x8300
 #define PM3FillForegroundColor0                                 0x8328
 #define PM3FillForegroundColor1                                 0x8358
 #define PM3FillGlyphPosition                                    0x8368
-        #define PM3FillGlyphPosition_XOffset(x)                        ((x)&0xffff)
-	#define PM3FillGlyphPosition_YOffset(y)                        (((y)&0xffff)<<16)
+#	define PM3FillGlyphPosition_XOffset(x)                        ((x)&0xffff)
+#	define PM3FillGlyphPosition_YOffset(y)                        (((y)&0xffff)<<16)
 #define PM3FillRectanglePosition                                0x8348
-	#define PM3FillRectanglePosition_XOffset(x)            ((x)&0xffff)
-	#define PM3FillRectanglePosition_YOffset(y)            (((y)&0xffff)<<16)
+#	define PM3FillRectanglePosition_XOffset(x)            ((x)&0xffff)
+#	define PM3FillRectanglePosition_YOffset(y)            (((y)&0xffff)<<16)
 
 #if 0
 
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/i128/Imakefile b/xc/programs/Xserver/hw/xfree86/drivers/i128/Imakefile
index 30bd22e5e..8c6de7ccb 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/i128/Imakefile
+++ b/xc/programs/Xserver/hw/xfree86/drivers/i128/Imakefile
@@ -1,4 +1,4 @@
-XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i128/Imakefile,v 1.4 2001/01/24 00:06:19 dawes Exp $
+XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i128/Imakefile,v 1.5 2003/02/17 17:06:42 dawes Exp $
 XCOMM
 XCOMM This is the Imakefile for the I128 driver.  
 XCOMM
@@ -20,7 +20,7 @@ INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86OSSRC) -I$(SERVERSRC)/fb \
            -I$(SERVERSRC)/Xext -I$(XF86SRC)/xf8_32bpp\
            -I$(FONTINCSRC) -I$(SERVERSRC)/include -I$(XINCLUDESRC) \
            -I$(XF86SRC)/xf24_32bpp -I$(XF86SRC)/shadowfb -I$(EXTINCSRC) \
-	   -I$(XF86OSSRC)/vbe $(DRIINCLUDES) -I$(SERVERSRC)/render
+	   -I$(XF86SRC)/vbe $(DRIINCLUDES) -I$(SERVERSRC)/render
 #endif
 
 DEFINES = $(DRIDEFINES)
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/i128/i128_driver.c b/xc/programs/Xserver/hw/xfree86/drivers/i128/i128_driver.c
index 454d1e66a..0cd103697 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/i128/i128_driver.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/i128/i128_driver.c
@@ -22,7 +22,7 @@
  *
  */
 
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i128/i128_driver.c,v 1.27 2002/06/07 20:45:39 robin Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i128/i128_driver.c,v 1.29 2003/02/17 16:08:28 dawes Exp $ */
 
 
 /* All drivers should typically include these */
@@ -217,6 +217,7 @@ static const char *i2cSymbols[] = {
     NULL
 };
 
+#ifdef XFree86LOADER
 /* XXX The vbe module isn't currently loaded. */
 static const char *vbeSymbols[] = {
     "VBEInit",
@@ -230,6 +231,7 @@ static const char *int10Symbols[] = {
     "xf86FreeInt10",
     NULL
 };
+#endif
 
 
 #ifdef XFree86LOADER
@@ -1076,7 +1078,7 @@ I128PreInit(ScrnInfoPtr pScrn, int flags)
      * Setup the ClockRanges, which describe what clock ranges are available,
      * and what sort of modes they can be used for.
      */
-    clockRanges = xnfalloc(sizeof(ClockRange));
+    clockRanges = xnfcalloc(sizeof(ClockRange),1);
     clockRanges->next = NULL;
     clockRanges->minClock = pI128->minClock;
     clockRanges->maxClock = pI128->maxClock;
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/i128/i128accel.c b/xc/programs/Xserver/hw/xfree86/drivers/i128/i128accel.c
index 6b32011e0..d1a3bb4f6 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/i128/i128accel.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/i128/i128accel.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i128/i128accel.c,v 1.7 2000/12/06 01:07:34 robin Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i128/i128accel.c,v 1.8 2003/02/17 16:08:28 dawes Exp $ */
 
 /*
  * Copyright 1997-2000 by Robin Cutshaw <robin@XFree86.Org>
@@ -38,7 +38,6 @@
 #include "i128.h"
 #include "i128reg.h"
 
-void I128EngineDone(ScrnInfoPtr pScrn);
 void I128BitBlit(ScrnInfoPtr pScrn, int x1, int y1, int x2, int y2,
 	int w, int h);
 void I128SetupForScreenToScreenCopy(ScrnInfoPtr pScrn, int xdir, int ydir,
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/i740/Imakefile b/xc/programs/Xserver/hw/xfree86/drivers/i740/Imakefile
index 96e0b2b8b..c6a80336d 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/i740/Imakefile
+++ b/xc/programs/Xserver/hw/xfree86/drivers/i740/Imakefile
@@ -1,4 +1,4 @@
-XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i740/Imakefile,v 1.9 2002/10/21 13:32:58 alanh Exp $
+XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i740/Imakefile,v 1.10 2003/02/17 17:06:42 dawes Exp $
 XCOMM
 XCOMM This is the Imakefile for the i740 driver.  
 XCOMM 
@@ -18,7 +18,7 @@ INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86OSSRC) \
 	   -I$(XF86SRC)/xaa -I$(XF86SRC)/rac \
            -I$(SERVERSRC)/cfb -I$(XF86SRC)/xaa -I$(XF86SRC)/ramdac \
 	   -I$(XF86SRC)/vgahw -I$(XF86SRC)/ddc -I$(XF86SRC)/i2c \
-	   -I$(SERVERSRC)/Xext -I$(XF86OSSRC)/vbe -I$(SERVERSRC)/fb\
+	   -I$(SERVERSRC)/Xext -I$(XF86SRC)/vbe -I$(SERVERSRC)/fb\
            -I$(FONTINCSRC) -I$(SERVERSRC)/include -I$(XINCLUDESRC) \
 	   -I$(EXTINCSRC) -I$(XF86SRC)/int10 -I$(SERVERSRC)/render
 #endif
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/i740/README b/xc/programs/Xserver/hw/xfree86/drivers/i740/README
index 33159398a..948c6516c 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/i740/README
+++ b/xc/programs/Xserver/hw/xfree86/drivers/i740/README
@@ -121,7 +121,9 @@
 
    http://www.precisioninsight.com
 
+   XVideo and DGA drivers by Patrick Lerda with some small modification by
+   Stephen Blackheath <stephen@blacksapphire.com>
 
 
 
-$XFree86: xc/programs/Xserver/hw/xfree86/drivers/i740/README,v 1.1 1999/08/29 12:20:57 dawes Exp $
+$XFree86: xc/programs/Xserver/hw/xfree86/drivers/i740/README,v 1.2 2003/01/15 03:39:42 dawes Exp $
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/i740/i740.h b/xc/programs/Xserver/hw/xfree86/drivers/i740/i740.h
index 5808bb592..63f78f2ed 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/i740/i740.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/i740/i740.h
@@ -25,7 +25,7 @@ TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
 SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i740/i740.h,v 1.6 2002/10/21 13:32:58 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i740/i740.h,v 1.7 2002/10/23 16:08:36 tsi Exp $ */
 
 /*
  * Authors:
@@ -95,8 +95,8 @@ typedef struct _I740Rec {
   int MaxClock;
   int CursorStart;
   int Chipset;
-  int LinearAddr;
-  int MMIOAddr;
+  unsigned long LinearAddr;
+  unsigned long MMIOAddr;
   EntityInfoPtr pEnt;
   pciVideoPtr PciInfo;
   PCITAG PciTag;
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/i740/i740_dga.c b/xc/programs/Xserver/hw/xfree86/drivers/i740/i740_dga.c
index 3390f00de..0edc0b908 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/i740/i740_dga.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/i740/i740_dga.c
@@ -21,7 +21,7 @@
  *
  * Authors:  Patrick LERDA
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i740/i740_dga.c,v 1.1 2002/10/21 13:32:58 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i740/i740_dga.c,v 1.2 2003/02/12 21:46:42 tsi Exp $ */
 
 
 #include "xf86.h"
@@ -44,7 +44,9 @@ static int  I740_GetViewport(ScrnInfoPtr);
 static void I740_SetViewport(ScrnInfoPtr, int, int, int);
 static void I740_FillRect(ScrnInfoPtr, int, int, int, int, unsigned long);
 static void I740_BlitRect(ScrnInfoPtr, int, int, int, int, int, int);
+#if 0
 static void I740_BlitTransRect(ScrnInfoPtr, int, int, int, int, int, int, unsigned long);
+#endif
 
 static DGAFunctionRec I740DGAFuncs = {
    I740_OpenFramebuffer,
@@ -217,7 +219,7 @@ static void I740_BlitRect(
   }
 }
 
-
+#if 0
 static void I740_BlitTransRect(ScrnInfoPtr pScrn, 
 			       int srcx, int srcy, 
 			       int w, int h, 
@@ -228,7 +230,7 @@ static void I740_BlitTransRect(ScrnInfoPtr pScrn,
   /* this one should be separate since the XAA function would
      prohibit usage of ~0 as the key */
 }
-
+#endif
 
 static Bool I740_OpenFramebuffer(
 				 ScrnInfoPtr pScrn, 
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/i740/i740_driver.c b/xc/programs/Xserver/hw/xfree86/drivers/i740/i740_driver.c
index 4e95ec461..51e8b6171 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/i740/i740_driver.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/i740/i740_driver.c
@@ -25,7 +25,7 @@ TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
 SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i740/i740_driver.c,v 1.38 2002/10/21 13:32:58 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i740/i740_driver.c,v 1.41 2003/02/17 16:59:02 dawes Exp $ */
 
 /*
  * Authors:
@@ -129,10 +129,6 @@ static Bool I740CloseScreen(int scrnIndex, ScreenPtr pScreen);
 /* Change screensaver state */
 static Bool I740SaveScreen(ScreenPtr pScreen, int mode);
 
-/* Allow mode switching */
-Bool I740SwitchMode(int scrnIndex, DisplayModePtr mode, int flags);
-/* Allow moving the viewport */
-
 /* Cleanup server private data */
 static void I740FreeScreen(int scrnIndex, int flags);
 
@@ -188,7 +184,7 @@ typedef enum {
   OPTION_SLOW_RAM,
   OPTION_DAC_6BIT,
   OPTION_USE_PIO,
-  OPTION_VGACOMPAT,
+  OPTION_VGACOMPAT
 } I740Opts;
 
 static const OptionInfoRec I740Options[] = {
@@ -647,7 +643,7 @@ I740PreInit(ScrnInfoPtr pScrn, int flags) {
     }
   }
   xf86DrvMsg(pScrn->scrnIndex, from, "Linear framebuffer at 0x%lX\n",
-	     (unsigned long)pI740->LinearAddr);
+	     pI740->LinearAddr);
 
   if (pI740->pEnt->device->IOBase != 0) {
     pI740->MMIOAddr = pI740->pEnt->device->IOBase;
@@ -664,7 +660,7 @@ I740PreInit(ScrnInfoPtr pScrn, int flags) {
     }
   }
   xf86DrvMsg(pScrn->scrnIndex, from, "IO registers at addr 0x%lX\n",
-	     (unsigned long)pI740->MMIOAddr);
+	     pI740->MMIOAddr);
 
   /* Calculate memory */
   if (pI740->pEnt->device->videoRam) {
@@ -1582,7 +1578,7 @@ I740ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv) {
   hwp = VGAHWPTR(pScrn);
 
   if (!I740MapMem(pScrn)) return FALSE;
-  pScrn->memPhysBase = (unsigned long)pI740->LinearAddr;
+  pScrn->memPhysBase = pI740->LinearAddr;
   pScrn->fbOffset = 0;
 
   if (!pI740->usePIO)
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/i740/i740_video.c b/xc/programs/Xserver/hw/xfree86/drivers/i740/i740_video.c
index 39e3cff2b..7ce7dfb8a 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/i740/i740_video.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/i740/i740_video.c
@@ -41,9 +41,10 @@
  *     the hardware.  The implementation of this is not quite complete.
  *   12 September 2002 - Better software scaling with some averaging, giving a nicer
  *     picture.
+ *   13 January 2003 - Fixed a minor bug where the video would occasionally stop updating,
+ *     which was worked around just by re-sizing the window.
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i740/i740_video.c,v 1.1 2002/10/21 13:32:58 alanh Exp $ */
-
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i740/i740_video.c,v 1.3 2003/01/17 22:22:52 tsi Exp $ */
 
 /*
  * i740_video.c: i740 Xv driver. Based on the mga Xv driver by Mark Vojkovich.
@@ -122,12 +123,6 @@ typedef struct {
 	Time         freeTime;
 	FBLinearPtr  linear;
 
-	unsigned long overlay_mem1, overlay_mem2;
-	unsigned long overlay_isrc_w, overlay_isrc_h;
-	unsigned long overlay_idst_w, overlay_idst_h;
-	unsigned long overlay_ddst_x, overlay_ddst_y;
-	unsigned long overlay_ddst_w, overlay_ddst_h;
-	unsigned long overlay_pitch;
 } I740PortPrivRec, *I740PortPrivPtr;        
 
 typedef struct {
@@ -193,23 +188,6 @@ __inline__ static void i740fb_overlay_set(ScrnInfoPtr pScrn, I740PortPrivPtr pPr
   ddst_x+=pI740->ov_offset_x;
   ddst_y+=pI740->ov_offset_y;
 
-  /* If any of the dimensions of the image have changed since last time,
-   * we re-program.
-   */
-  if (mem1 != pPriv->overlay_mem1 ||
-      mem2 != pPriv->overlay_mem2 ||
-      isrc_w != pPriv->overlay_isrc_w ||
-      isrc_h != pPriv->overlay_isrc_h ||
-      idst_w != pPriv->overlay_idst_w ||
-      idst_h != pPriv->overlay_idst_h ||
-      ddst_x != pPriv->overlay_ddst_x ||
-      ddst_y != pPriv->overlay_ddst_y ||
-      ddst_w != pPriv->overlay_ddst_w ||
-      ddst_h != pPriv->overlay_ddst_h ||
-      pitch != pPriv->overlay_pitch) {
-
-    /*xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "i740fb_overlay_set - changed parameters\n");*/
-
       /* Program the i740 overlay to use the new image dimensions. */
 
     i740_wc(fb_p, MRX, 0x24, mem1>>16);
@@ -244,21 +222,6 @@ __inline__ static void i740fb_overlay_set(ScrnInfoPtr pScrn, I740PortPrivPtr pPr
     i740_wc(fb_p, XRX, 0xD0, 0x3F);
       /* 0x3C = COL_KEY_CNTL_1 */
     i740_wc(fb_p, MRX, 0x3C, 0x05 | 0x02);
-    usleep(50000);
-
-      /* Remember what we programmed. */
-    pPriv->overlay_mem1 = mem1;
-    pPriv->overlay_mem2 = mem2;
-    pPriv->overlay_isrc_w = isrc_w;
-    pPriv->overlay_isrc_h = isrc_h;
-    pPriv->overlay_idst_w = idst_w;
-    pPriv->overlay_idst_h = idst_h;
-    pPriv->overlay_ddst_x = ddst_x;
-    pPriv->overlay_ddst_y = ddst_y;
-    pPriv->overlay_ddst_w = ddst_w;
-    pPriv->overlay_ddst_h = ddst_h;
-    pPriv->overlay_pitch = pitch;
-  }
 
   /*i740_wc(fb_p, MRX, 0x20, (flip ? 0x14 : 0x04));*/
   /*i740_wc(fb_p, MRX, 0x20, 0);*/
@@ -433,8 +396,6 @@ static void I740StopVideo(ScrnInfoPtr pScrn, pointer data, Bool exit)
 	  pPriv->linear = NULL;
 	}
       pPriv->videoStatus = 0;
-      pPriv->overlay_mem1 = (unsigned long)-1L;  /*SB*/
-      pPriv->overlay_mem2 = (unsigned long)-1L;  /*SB*/
     }
   else
     {
@@ -723,8 +684,6 @@ static int I740PutImage(ScrnInfoPtr pScrn,
 		REGION_EXTENTS(pScreen, clipBoxes), width, height);
 
   if((x1 >= x2) || (y1 >= y2)) {
-    pPriv->overlay_mem1 = (unsigned long)-1L;  /*SB*/
-    pPriv->overlay_mem2 = (unsigned long)-1L;  /*SB*/
     return Success;
   }
 
@@ -757,8 +716,6 @@ static int I740PutImage(ScrnInfoPtr pScrn,
     FBLinearPtr new_linear = I740AllocateMemory(pScrn, pPriv->linear, size);
     if (new_linear != pPriv->linear) {
       pPriv->linear = new_linear;
-      pPriv->overlay_mem1 = (unsigned long)-1L;  /*SB*/
-      pPriv->overlay_mem2 = (unsigned long)-1L;  /*SB*/
     }
   }
   if(!pPriv->linear)
@@ -922,8 +879,6 @@ static void I740BlockHandler(int i, pointer blockData, pointer pTimeout, pointer
               /*xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "I740BlockHandler: OFF_TIMER expired\n");*/  /* ### */
 	      /* Turn off the overlay */
 	      i740fb_overlay_off(pScrn);
-	      pPriv->overlay_mem1 = (unsigned long)-1L;  /*SB*/
-	      pPriv->overlay_mem2 = (unsigned long)-1L;  /*SB*/
 
 	      pPriv->videoStatus = FREE_TIMER;
 	      pPriv->freeTime = currentTime.milliseconds + FREE_DELAY;
@@ -938,8 +893,6 @@ static void I740BlockHandler(int i, pointer blockData, pointer pTimeout, pointer
                   /*xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "I740BlockHandler: FREE_TIMER expired\n");*/  /* ### */
 		  xf86FreeOffscreenLinear(pPriv->linear);
 		  pPriv->linear = NULL;
-		  pPriv->overlay_mem1 = (unsigned long)-1L;  /*SB*/
-		  pPriv->overlay_mem2 = (unsigned long)-1L;  /*SB*/
 		}
 	      pPriv->videoStatus = 0;
 	    }
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/i810/Imakefile b/xc/programs/Xserver/hw/xfree86/drivers/i810/Imakefile
index d4221652b..a4ede463d 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/i810/Imakefile
+++ b/xc/programs/Xserver/hw/xfree86/drivers/i810/Imakefile
@@ -1,4 +1,4 @@
-XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/Imakefile,v 1.21 2002/09/12 04:08:25 dawes Exp $
+XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/Imakefile,v 1.25 2003/02/17 17:06:42 dawes Exp $
 XCOMM
 XCOMM This is the Imakefile for the i810 driver.  
 XCOMM 
@@ -16,10 +16,6 @@ XCOMM
 #define I830XvSupport NO
 #endif
 
-#ifndef HaveDrmCommand
-#define HaveDrmCommand NO
-#endif
-
 #if BuildXF86DRI
 #if !I830Only
 I810DRISRCS = i810_dri.c i810_hwmc.c
@@ -31,10 +27,7 @@ DRISRCS = $(I810DRISRCS) $(I830DRISRCS)
 DRIOBJS = $(I810DRIOBJS) $(I830DRIOBJS)
 DRIINCLUDES = -I$(SERVERSRC)/GL/dri -I$(LIBSRC)/GL/dri \
 	-I$(XF86OSSRC)/linux/drm/kernel -I$(TOP)/include
-#if HaveDrmCommand
-DRMCOMMANDDEFINES = -DHAVE_DRM_COMMAND
-#endif
-DRIDEFINES = $(GLX_DEFINES) $(DRMCOMMANDDEFINES)
+DRIDEFINES = $(GLX_DEFINES)
 #endif
 
 #if I830XvSupport
@@ -42,7 +35,6 @@ I830SRCS1 = i830_video.c
 I830OBJS1 = i830_video.o
 #endif
 
-
 #if !I830Only
 I810SRCS = i810_cursor.c i810_accel.c i810_memory.c i810_wmark.c i810_dga.c \
 	   i810_video.c i810_io.c
@@ -74,9 +66,10 @@ INCLUDES = -I. -I../../include
 INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86OSSRC)				\
            -I$(SERVERSRC)/mfb -I$(SERVERSRC)/mi				\
 	   -I$(XF86SRC)/xaa -I$(XF86SRC)/rac				\
+	   -I$(SERVERSRC)/miext/shadow					\
            -I$(SERVERSRC)/fb -I$(XF86SRC)/xaa -I$(XF86SRC)/ramdac	\
 	   -I$(XF86SRC)/vgahw -I$(XF86SRC)/ddc -I$(XF86SRC)/i2c		\
-	   -I$(XF86OSSRC)/vbe -I$(XF86SRC)/int10			\
+	   -I$(XF86SRC)/vbe -I$(XF86SRC)/int10			\
 	   -I$(SERVERSRC)/Xext 						\
            -I$(FONTINCSRC) -I$(SERVERSRC)/include -I$(XINCLUDESRC)	\
 	   -I$(EXTINCSRC) -I$(SERVERSRC)/render				\
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/i810/common.h b/xc/programs/Xserver/hw/xfree86/drivers/i810/common.h
index 329667247..5e71cad82 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/i810/common.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/i810/common.h
@@ -27,11 +27,11 @@ TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
 SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/common.h,v 1.1 2002/09/11 00:29:31 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/common.h,v 1.6 2003/02/06 04:18:04 dawes Exp $ */
 
 /*
  * Authors:
- *   Keith Whitwell <keithw@precisioninsight.com>
+ *   Keith Whitwell <keith@tungstengraphics.com>
  *   David Dawes <dawes@tungstengraphics.com>
  *
  */
@@ -50,11 +50,11 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #ifdef I830DEBUG
 #define MARKER() ErrorF("\n### %s:%d: >>> %s <<< ###\n\n", \
 			 __FILE__, __LINE__,__FUNCTION__)
-#define DPRINTF DPRINTF_stub
+#define DPRINTF I830DPRINTF_stub
 #else /* #ifdef I830DEBUG */
 #define MARKER()
-/* this is a real ugle hack to get the compiler to optimize the debugging statements into oblivion */
-#define DPRINTF if(0) DPRINTF_stub
+/* this is a real ugly hack to get the compiler to optimize the debugging statements into oblivion */
+#define DPRINTF if(0) I830DPRINTF_stub
 #endif /* #ifdef I830DEBUG */
 
 #define KB(x) ((x) * 1024)
@@ -79,9 +79,10 @@ extern const char *I810vbeSymbols[];
 extern const char *I810ddcSymbols[];
 extern const char *I810fbSymbols[];
 extern const char *I810xaaSymbols[];
+extern const char *I810shadowSymbols[];
 
-extern void DPRINTF_stub(const char *filename, int line, const char *function,
-		         const char *fmt, ...);
+extern void I830DPRINTF_stub(const char *filename, int line,
+			     const char *function, const char *fmt, ...);
 
 #ifdef _I830_H_
 #define PrintErrorState I830PrintErrorState
@@ -151,21 +152,71 @@ extern void DPRINTF_stub(const char *filename, int line, const char *function,
    } while (_head != _tail);						\
 } while( 0)
 
+/*
+ * This is for debugging a potential problem writing the tail pointer
+ * close to the end of the ring buffer.
+ */
+#ifndef AVOID_TAIL_END
+#define AVOID_TAIL_END 0
+#endif
+#ifndef AVOID_SIZE
+#define AVOID_SIZE 64
+#endif
+
+#if AVOID_TAIL_END
+
 #define BEGIN_LP_RING(n)						\
    unsigned int outring, ringmask;					\
    volatile unsigned char *virt;					\
+   unsigned int needed;							\
    if ((n) & 1)								\
       ErrorF("BEGIN_LP_RING called with odd argument: %d\n", n);	\
    if ((n) > 2 && (I810_DEBUG&DEBUG_ALWAYS_SYNC))			\
       DO_RING_IDLE();							\
-   if (RecPtr->LpRing.space < (n) * 4)					\
-      WaitRingFunc(pScrn, (n) * 4, 0);					\
-   RecPtr->LpRing.space -= (n) * 4;					\
+   needed = (n) * 4;							\
+   if ((RecPtr->LpRing.tail > RecPtr->LpRing.tail_mask - AVOID_SIZE) ||	\
+       (RecPtr->LpRing.tail + needed) >					\
+	RecPtr->LpRing.tail_mask - AVOID_SIZE) {			\
+      needed += RecPtr->LpRing.tail_mask + 1 - RecPtr->LpRing.tail;	\
+      ErrorF("BEGIN_LP_RING: skipping last 64 bytes of "		\
+	     "ring (%d vs %d)\n", needed, (n) * 4);			\
+   }									\
+   if (RecPtr->LpRing.space < needed)					\
+      WaitRingFunc(pScrn, needed, 0);					\
+   RecPtr->LpRing.space -= needed;					\
+   outring = RecPtr->LpRing.tail;					\
+   ringmask = RecPtr->LpRing.tail_mask;					\
+   virt = RecPtr->LpRing.virtual_start;					\
+   while (needed > (n) * 4) {						\
+      ErrorF("BEGIN_LP_RING: putting MI_NOOP at 0x%x (remaining %d)\n",	\
+	     outring, needed - (n) * 4);				\
+      OUT_RING(MI_NOOP);						\
+      needed -= 4;							\
+   }									\
    if (I810_DEBUG & DEBUG_VERBOSE_RING)					\
-      ErrorF( "BEGIN_LP_RING %d in %s\n", n, FUNCTION_NAME);		\
+      ErrorF( "BEGIN_LP_RING %d in %s\n", n, FUNCTION_NAME);
+
+#else /* AVOID_TAIL_END */
+
+#define BEGIN_LP_RING(n)						\
+   unsigned int outring, ringmask;					\
+   volatile unsigned char *virt;					\
+   unsigned int needed;							\
+   if ((n) & 1)								\
+      ErrorF("BEGIN_LP_RING called with odd argument: %d\n", n);	\
+   if ((n) > 2 && (I810_DEBUG&DEBUG_ALWAYS_SYNC))			\
+      DO_RING_IDLE();							\
+   needed = (n) * 4;							\
+   if (RecPtr->LpRing.space < needed)					\
+      WaitRingFunc(pScrn, needed, 0);					\
+   RecPtr->LpRing.space -= needed;					\
    outring = RecPtr->LpRing.tail;					\
    ringmask = RecPtr->LpRing.tail_mask;					\
-   virt = RecPtr->LpRing.virtual_start;
+   virt = RecPtr->LpRing.virtual_start;					\
+   if (I810_DEBUG & DEBUG_VERBOSE_RING)					\
+      ErrorF( "BEGIN_LP_RING %d in %s\n", n, FUNCTION_NAME);
+
+#endif /* AVOID_TAIL_END */
 
 
 /* Memory mapped register access macros */
@@ -195,7 +246,7 @@ extern void DPRINTF_stub(const char *filename, int line, const char *function,
 } while (0)
 
 /* To remove all debugging, make sure I810_DEBUG is defined as a
- * preprocessor symbol, and equal to zero.  
+ * preprocessor symbol, and equal to zero.
  */
 #if 1
 #define I810_DEBUG 0
@@ -231,6 +282,15 @@ extern int I810_DEBUG;
 #define PCI_CHIP_I815_BRIDGE       0x1130
 #endif
 
+#ifndef PCI_CHIP_I855_GM
+#define PCI_CHIP_I855_GM	   0x3582
+#define PCI_CHIP_I855_GM_BRIDGE	   0x3580
+#endif
+
+#ifndef PCI_CHIP_I865_G
+#define PCI_CHIP_I865_G		   0x2572
+#define PCI_CHIP_I865_G_BRIDGE	   0x2570
+#endif
 
 #define IS_I810(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I810 ||	\
 			pI810->PciInfo->chipType == PCI_CHIP_I810_DC100 || \
@@ -238,14 +298,17 @@ extern int I810_DEBUG;
 #define IS_I815(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I815)
 #define IS_I830(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I830_M)
 #define IS_845G(pI810) (pI810->PciInfo->chipType == PCI_CHIP_845_G)
-#define IS_MOBILE(pI810) IS_I830(pI810)
+#define IS_I85X(pI810)  (pI810->PciInfo->chipType == PCI_CHIP_I855_GM)
+#define IS_I865G(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I865_G)
+
+#define IS_MOBILE(pI810) (IS_I830(pI810) || IS_I85X(pI810))
 
 #define GTT_PAGE_SIZE			KB(4)
 #define ROUND_TO(x, y)			(((x) + (y) - 1) / (y) * (y))
 #define ROUND_DOWN_TO(x, y)		((x) / (y) * (y))
 #define ROUND_TO_PAGE(x)		ROUND_TO((x), GTT_PAGE_SIZE)
 #define ROUND_TO_MB(x)			ROUND_TO((x), MB(1))
-#define PRIMARY_RINGBUFFER_SIZE		KB(64)
+#define PRIMARY_RINGBUFFER_SIZE		KB(128)
 #define MIN_SCRATCH_BUFFER_SIZE		KB(16)
 #define MAX_SCRATCH_BUFFER_SIZE		KB(64)
 #define HWCURSOR_SIZE			GTT_PAGE_SIZE
@@ -259,4 +322,6 @@ extern int I810_DEBUG;
 #define MAX_DISPLAY_PITCH		2048
 #define MAX_DISPLAY_HEIGHT		2048
 
+#define PIPE_NAME(n)			('A' + (n))
+
 #endif /* _INTEL_COMMON_H_ */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/i810/i810.h b/xc/programs/Xserver/hw/xfree86/drivers/i810/i810.h
index bfe10afc4..128b659a2 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/i810/i810.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/i810/i810.h
@@ -27,17 +27,15 @@ TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
 SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i810.h,v 1.33 2002/10/08 20:15:46 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i810.h,v 1.38 2003/02/26 04:19:36 dawes Exp $ */
 
 /*
  * Authors:
- *   Keith Whitwell <keithw@precisioninsight.com>
+ *   Keith Whitwell <keith@tungstengraphics.com>
  *   David Dawes <dawes@tungstengraphics.com>
  *
  */
 
-#define I830DEBUG
-
 #ifndef _I810_H_
 #define _I810_H_
 
@@ -69,9 +67,10 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #define I810_NAME "I810"
 #define I810_DRIVER_NAME "i810"
 #define I810_MAJOR_VERSION 1
-#define I810_MINOR_VERSION 1
+#define I810_MINOR_VERSION 3
 #define I810_PATCHLEVEL 0
 
+
 /* HWMC Surfaces */
 #define I810_MAX_SURFACES 7
 #define I810_MAX_SUBPICTURES 2
@@ -250,6 +249,9 @@ typedef struct _I810Rec {
    OptionInfoPtr Options;
 
    int configured_device;
+
+   Bool showCache;
+   Bool noAccel;
 } I810Rec;
 
 #define I810PTR(p) ((I810Ptr)((p)->driverPrivate))
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/i810/i810.man b/xc/programs/Xserver/hw/xfree86/drivers/i810/i810.man
index f97885480..b10e6421d 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/i810/i810.man
+++ b/xc/programs/Xserver/hw/xfree86/drivers/i810/i810.man
@@ -1,9 +1,9 @@
-.\" $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i810.man,v 1.2 2001/01/27 18:20:48 dawes Exp $ 
+.\" $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i810.man,v 1.3 2003/02/17 19:19:02 dawes Exp $ 
 .\" shorthand for double quote that works everywhere.
 .ds q \N'34'
 .TH I810 __drivermansuffix__ __vendorversion__
 .SH NAME
-i810 \- Intel i810 video driver
+i810 \- Intel 8xx integrated graphics chipsets
 .SH SYNOPSIS
 .nf
 .B "Section \*qDevice\*q"
@@ -14,31 +14,32 @@ i810 \- Intel i810 video driver
 .fi
 .SH DESCRIPTION
 .B i810
-is an XFree86 driver for the Intel i810 family of graphics chipsets.
+is an XFree86 driver for Intel integrated graphics chipsets.
 The driver supports depths 8, 15, 16 and 24.  All visual types are
 supported in depth 8, other depths only support TrueColor.  The driver
 supports hardware accelerated 3D via the Direct Rendering Infrastructure (DRI),
-but only in depth 16.
+but only in depth 16 for the i810/i815 and depths 16 and 24 for later chipsets.
 .SH SUPPORTED HARDWARE
 .B i810
-supports the i810, i810-DC100, i810e and i815 chipsets.
+supports the i810, i810-DC100, i810e, i815, 830M, 845G, 852GM, 855GM,
+and 865G chipsets.
 
 .SH CONFIGURATION DETAILS
 Please refer to XF86Config(__filemansuffix__) for general configuration
 details.  This section only covers configuration details specific to this
 driver.
 .PP
-The i810 has a unified memory architecture and uses system memory
-for video ram.  By default 8 Megabytes of system memory are used
-for graphics.  This amount may be changed with the
-.B VideoRam 
-entry in the config file 
+The Intel 8xx family of integrated graphics chipsets has a unified memory
+architecture and uses system memory for video ram.  By default 8 Megabytes
+of system memory are used for graphics.  For the 830M and later, the
+default is 8 Megabytes when DRI is not enabled and 32 Megabytes with
+DRI is enabled.  This amount may be changed with the
+.B VideoRam
+entry in the config file
 .B "Device"
-section.  It may be set to any power of two between 4 and 32 Megabytes
-inclusive to allow the user to customize the balance between main
-memory usage and graphics performance.  Too little memory reserved for
-graphics can result in decreased 3D and 2D graphics performance and
-features.
+section.  It may be set to any reasonable value up to 64MB for older
+chipsets or 128MB for newer chipets.  Note that increasing this value
+will reduce the amount of system memory available for other applications.
 .PP
 The following driver
 .B Options
@@ -68,4 +69,6 @@ Default: 256 to 768 depending on the resolution and depth.
 XFree86(1), XF86Config(__filemansuffix__), xf86config(1), Xserver(1), X(__miscmansuffix__)
 .SH AUTHORS
 Authors include: Keith Whitwell, and also Jonathan Bian, Matthew J Sottek, 
-Jeff Hartmann, Mark Vojkovich, Alan Hourihane, H. J. Lu.
+Jeff Hartmann, Mark Vojkovich, Alan Hourihane, H. J. Lu.  830M and 845G
+support reworked for XFree86 4.3 by David Dawes and Keith Whitwell.
+852GM, 855GM, and 865G support added by David Dawes and Keith Whitwell.
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_accel.c b/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_accel.c
index 1b41e8f14..17c24b375 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_accel.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_accel.c
@@ -25,7 +25,7 @@ TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
 SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i810_accel.c,v 1.14 2002/10/08 20:15:46 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i810_accel.c,v 1.17 2002/11/25 14:04:59 eich Exp $ */
 
 /*
  * Reformatted with GNU indent (2.2.8), using the following options:
@@ -42,7 +42,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 /*
  * Authors:
- *   Keith Whitwell <keithw@precisioninsight.com>
+ *   Keith Whitwell <keith@tungstengraphics.com>
  *
  */
 
@@ -50,7 +50,6 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "xf86.h"
 
 #include "i810.h"
-#include "i810_reg.h"
 
 static unsigned int i810Rop[16] = {
    0x00,				/* GXclear      */
@@ -390,42 +389,60 @@ void
 I810SubsequentScreenToScreenCopy(ScrnInfoPtr pScrn, int x1, int y1,
 				 int x2, int y2, int w, int h)
 {
-   I810Ptr pI810 = I810PTR(pScrn);
-   int src, dst;
-
-   if (I810_DEBUG & DEBUG_VERBOSE_ACCEL)
-      ErrorF("I810SubsequentScreenToScreenCopy %d,%d - %d,%d %dx%d\n",
-	     x1, y1, x2, y2, w, h);
-
-   if (pI810->BR[13] & BR13_PITCH_SIGN_BIT) {
-      src = (y1 + h - 1) * pScrn->displayWidth * pI810->cpp;
-      dst = (y2 + h - 1) * pScrn->displayWidth * pI810->cpp;
-   } else {
-      src = y1 * pScrn->displayWidth * pI810->cpp;
-      dst = y2 * pScrn->displayWidth * pI810->cpp;
-   }
-
-   if (pI810->BR[13] & BR13_RIGHT_TO_LEFT) {
-      src += (x1 + w - 1) * pI810->cpp + pI810->cpp - 1;
-      dst += (x2 + w - 1) * pI810->cpp + pI810->cpp - 1;
-   } else {
-      src += x1 * pI810->cpp;
-      dst += x2 * pI810->cpp;
-   }
-
-   /* SRC_COPY_BLT, p169 */
-   {
-      BEGIN_LP_RING(6);
-      OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_SRC_COPY_BLT | 0x4);
-      OUT_RING(pI810->BR[13]);
-
-      OUT_RING((h << 16) | (w * pI810->cpp));
-      OUT_RING(pI810->bufferOffset + dst);
-
-      OUT_RING(pI810->BR[13] & 0xFFFF);
-      OUT_RING(pI810->bufferOffset + src);
-      ADVANCE_LP_RING();
-   }
+    I810Ptr pI810 = I810PTR(pScrn);
+    int src, dst;
+    int w_back = w;
+
+    if (I810_DEBUG & DEBUG_VERBOSE_ACCEL)
+	ErrorF( "I810SubsequentScreenToScreenCopy %d,%d - %d,%d %dx%d\n",
+		x1,y1,x2,y2,w,h);
+    /* 
+     * This works around a bug in the i810 drawing engine.
+     * This was developed empirically so it may not catch all
+     * cases.
+     */
+    if ( !(pI810->BR[13] & BR13_RIGHT_TO_LEFT) && (y2 - y1) < 3 
+	 && (y2 - y1) >= 0 && (x2 - x1) <= (w + 4) && (w > 4))
+	w = 4;
+    do {
+
+	if (pI810->BR[13] & BR13_PITCH_SIGN_BIT) {
+	    src = (y1 + h - 1) * pScrn->displayWidth * pI810->cpp;
+	    dst = (y2 + h - 1) * pScrn->displayWidth * pI810->cpp;
+	} else {
+	    src = y1 * pScrn->displayWidth * pI810->cpp;
+	    dst = y2 * pScrn->displayWidth * pI810->cpp;
+	}
+
+	if (pI810->BR[13] & BR13_RIGHT_TO_LEFT) {
+	    src += (x1 + w - 1) * pI810->cpp + pI810->cpp - 1;
+	    dst += (x2 + w - 1) * pI810->cpp + pI810->cpp - 1;
+	} else {
+	    src += x1 * pI810->cpp;
+	    dst += x2 * pI810->cpp;
+	}
+
+
+	/* SRC_COPY_BLT, p169 */
+	{
+	    BEGIN_LP_RING(6);
+	    OUT_RING( BR00_BITBLT_CLIENT | BR00_OP_SRC_COPY_BLT | 0x4 );
+	    OUT_RING( pI810->BR[13]);
+
+	    OUT_RING( (h << 16) | (w * pI810->cpp));
+	    OUT_RING( pI810->bufferOffset + dst);
+
+	    OUT_RING( pI810->BR[13] & 0xFFFF);
+	    OUT_RING( pI810->bufferOffset + src);
+	    ADVANCE_LP_RING();
+	}
+	w_back -= w;
+	if (w_back <= 0)
+	    break;
+	x2 += w;
+	x1 += w;
+	w = w_back;
+    }  while (1);
 }
 
 static void
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_cursor.c b/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_cursor.c
index 4c348bfbf..26023f3f9 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_cursor.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_cursor.c
@@ -25,7 +25,7 @@ TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
 SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i810_cursor.c,v 1.6 2002/09/11 00:29:31 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i810_cursor.c,v 1.7 2002/10/30 12:52:17 alanh Exp $ */
 
 /*
  * Reformatted with GNU indent (2.2.8), using the following options:
@@ -42,7 +42,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 /*
  * Authors:
- *   Keith Whitwell <keithw@precisioninsight.com>
+ *   Keith Whitwell <keith@tungstengraphics.com>
  *
  */
 
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_dga.c b/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_dga.c
index a25fc06ea..0abac2bff 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_dga.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_dga.c
@@ -34,7 +34,7 @@
  * with <TAB> characters expanded at 8-column intervals.
  */
 
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i810_dga.c,v 1.5 2002/09/11 00:29:31 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i810_dga.c,v 1.6 2003/02/26 04:19:36 dawes Exp $ */
 
 #include "xf86.h"
 #include "xf86_OSproc.h"
@@ -108,7 +108,7 @@ I810DGAInit(ScreenPtr pScreen)
 
       currentMode->mode = pMode;
       currentMode->flags = DGA_CONCURRENT_ACCESS | DGA_PIXMAP_AVAILABLE;
-      if (pI810->AccelInfoRec)
+      if (!pI810->noAccel)
 	 currentMode->flags |= DGA_FILL_RECT | DGA_BLIT_RECT;
       if (pMode->Flags & V_DBLSCAN)
 	 currentMode->flags |= DGA_DOUBLESCAN;
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_dri.c b/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_dri.c
index f64de79fe..8daeaeac8 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_dri.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_dri.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i810_dri.c,v 1.29 2002/10/08 22:14:08 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i810_dri.c,v 1.33 2002/12/10 01:27:04 dawes Exp $ */
 /*
  * Reformatted with GNU indent (2.2.8), using the following options:
  *
@@ -49,10 +49,6 @@ extern void GlxSetVisualConfigs(int nconfigs,
 				__GLXvisualConfig * configs,
 				void **configprivs);
 
-#ifndef HAVE_DRM_COMMAND
-extern drmVersionPtr drmGetLibVersion(int fd);
-#endif
-
 static int i810_pitches[] = {
    512,
    1024,
@@ -69,7 +65,6 @@ static int i810_pitch_flags[] = {
    0
 };
 
-#ifdef HAVE_DRM_COMMAND
 Bool
 I810CleanupDma(ScrnInfoPtr pScrn)
 {
@@ -88,20 +83,7 @@ I810CleanupDma(ScrnInfoPtr pScrn)
 
    return TRUE;
 }
-#else
-Bool
-I810CleanupDma(ScrnInfoPtr pScrn)
-{
-   I810Ptr pI810 = I810PTR(pScrn);
-   if (!drmI810CleanupDma(pI810->drmSubFD)) {
-      xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "[dri] I810 Dma Cleanup Failed\n");
-      return FALSE;
-   }
-   return TRUE;
-}
-#endif
 
-#ifdef HAVE_DRM_COMMAND
 Bool
 I810InitDma(ScrnInfoPtr pScrn)
 {
@@ -140,40 +122,6 @@ I810InitDma(ScrnInfoPtr pScrn)
 
    return TRUE;
 }
-#else
-Bool
-I810InitDma(ScrnInfoPtr pScrn)
-{
-   I810Ptr pI810 = I810PTR(pScrn);
-   I810RingBuffer *ring = &(pI810->LpRing);
-   I810DRIPtr pI810DRI = (I810DRIPtr) pI810->pDRIInfo->devPrivate;
-   drmI810Init info;
-
-   info.start = ring->mem.Start;
-   info.end = ring->mem.End;
-   info.size = ring->mem.Size;
-   info.mmio_offset = (unsigned int)pI810DRI->regs;
-   info.buffers_offset = (unsigned int)pI810->buffer_map;
-   info.sarea_off = sizeof(XF86DRISAREARec);
-
-   info.front_offset = 0;
-   info.back_offset = pI810->BackBuffer.Start;
-   info.depth_offset = pI810->DepthBuffer.Start;
-   info.overlay_offset = pI810->OverlayStart;
-   info.overlay_physical = pI810->OverlayPhysical;
-   info.w = pScrn->virtualX;
-   info.h = pScrn->virtualY;
-   info.pitch = pI810->auxPitch;
-   info.pitch_bits = pI810->auxPitchBits;
-
-   if (!drmI810InitDma(pI810->drmSubFD, &info)) {
-      xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-                 "[drm] I810 Dma Initialization failed.\n");
-      return FALSE;
-   }
-   return TRUE;
-}
-#endif
 
 static Bool
 I810InitVisualConfigs(ScreenPtr pScreen)
@@ -427,7 +375,6 @@ I810DRIScreenInit(ScreenPtr pScreen)
    {
       drmVersionPtr version;
 
-#if defined(XFree86LOADER) || defined(HAVE_DRM_COMMAND)
       /* Check the DRM lib version.
        * drmGetLibVersion was not supported in version 1.0, so check for
        * symbol first to avoid possible crash or hang.
@@ -435,7 +382,6 @@ I810DRIScreenInit(ScreenPtr pScreen)
       if (xf86LoaderCheckSymbol("drmGetLibVersion")) {
 	 version = drmGetLibVersion(pI810->drmSubFD);
       } else
-#endif
       {
 	 /* drmlib version 1.0.0 didn't have the drmGetLibVersion
 	  * entry point.  Fake it by allocating a version record
@@ -448,11 +394,7 @@ I810DRIScreenInit(ScreenPtr pScreen)
       }
 
 #define REQ_MAJ 1
-#ifdef HAVE_DRM_COMMAND
 #define REQ_MIN 1
-#else
-#define REQ_MIN 0
-#endif
       if (version) {
 	 if (version->version_major != REQ_MAJ ||
 	     version->version_minor < REQ_MIN) {
@@ -990,6 +932,12 @@ I810DRICloseScreen(ScreenPtr pScreen)
 {
    ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
    I810Ptr pI810 = I810PTR(pScrn);
+   I810DRIPtr pI810DRI = (I810DRIPtr) pI810->pDRIInfo->devPrivate;
+
+   if (pI810DRI->irq) {
+       drmCtlUninstHandler(pI810->drmSubFD);
+       pI810DRI->irq = 0;
+   }
 
    I810CleanupDma(pScrn);
 
@@ -1069,6 +1017,8 @@ I810DRISwapContext(ScreenPtr pScreen, DRISyncType syncType,
       if (I810_DEBUG & DEBUG_VERBOSE_DRI)
 	 ErrorF("I810DRISwapContext (in)\n");
 
+      if (!pScrn->vtSema)
+	  return;
       pI810->LockHeld = 1;
       I810RefreshRing(pScrn);
    } else if (syncType == DRI_2D_SYNC &&
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_dri.h b/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_dri.h
index 9d2f512c2..cf0532cb5 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_dri.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_dri.h
@@ -1,19 +1,10 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i810_dri.h,v 1.8 2002/10/08 20:15:46 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i810_dri.h,v 1.10 2002/12/10 01:27:04 dawes Exp $ */
 
 #ifndef _I810_DRI_
 #define _I810_DRI_
 
 #include "xf86drm.h"
-#ifdef HAVE_DRM_COMMAND
 #include "i810_common.h"
-#else
-#include "xf86drmI810.h"
-#ifndef I810_CTX_SETUP_SIZE
-#define I810_CTX_SETUP_SIZE	20
-#define I810_DEST_SETUP_SIZE	10
-#define I810_TEX_SETUP_SIZE	8
-#endif
-#endif
 
 #define I810_MAX_DRAWABLES 256
 
@@ -102,7 +93,7 @@ typedef struct {
     * texture space, and can make informed decisions as to which
     * areas to kick out.  There is no need to choose whether to
     * kick out your own texture or someone else's - simply eject
-    * them all in LRU order.  
+    * them all in LRU order.
     */
    I810TexRegionRec texList[I810_NR_TEX_REGIONS + 1];	/* Last elt is sentinal */
 
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_driver.c b/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_driver.c
index 029a89180..a057f0d7d 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_driver.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_driver.c
@@ -25,7 +25,7 @@ TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
 SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i810_driver.c,v 1.71 2002/09/11 00:29:32 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i810_driver.c,v 1.80 2003/02/26 04:19:36 dawes Exp $ */
 
 /*
  * Reformatted with GNU indent (2.2.8), using the following options:
@@ -42,7 +42,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 /*
  * Authors:
- *   Keith Whitwell <keithw@precisioninsight.com>
+ *   Keith Whitwell <keith@tungstengraphics.com>
  *
  */
 
@@ -122,6 +122,8 @@ static SymTabRec I810Chipsets[] = {
 #endif
    {PCI_CHIP_I830_M,		"i830M"},
    {PCI_CHIP_845_G,		"845G"},
+   {PCI_CHIP_I855_GM,		"852GM/855GM"},
+   {PCI_CHIP_I865_G,		"865G"},
    {-1,				NULL}
 };
 
@@ -134,6 +136,8 @@ static PciChipsets I810PciChipsets[] = {
 #endif
    {PCI_CHIP_I830_M,		PCI_CHIP_I830_M,	RES_SHARED_VGA},
    {PCI_CHIP_845_G,		PCI_CHIP_845_G,		RES_SHARED_VGA},
+   {PCI_CHIP_I855_GM,		PCI_CHIP_I855_GM,	RES_SHARED_VGA},
+   {PCI_CHIP_I865_G,		PCI_CHIP_I865_G,	RES_SHARED_VGA},
    {-1,				-1, RES_UNDEFINED }
 };
 
@@ -146,6 +150,7 @@ typedef enum {
    OPTION_DAC_6BIT,
    OPTION_DRI,
    OPTION_NO_DDC,
+   OPTION_SHOW_CACHE,
    OPTION_XVMC_SURFACES
 } I810Opts;
  
@@ -157,6 +162,7 @@ static const OptionInfoRec I810Options[] = {
    {OPTION_DAC_6BIT,		"Dac6Bit",	OPTV_BOOLEAN,	{0}, FALSE},
    {OPTION_DRI,			"DRI",		OPTV_BOOLEAN,	{0}, FALSE},
    {OPTION_NO_DDC,		"NoDDC",	OPTV_BOOLEAN,	{0}, FALSE},
+   {OPTION_SHOW_CACHE,		"ShowCache",	OPTV_BOOLEAN,	{0}, FALSE},
    {OPTION_XVMC_SURFACES,	"XvMCSurfaces",	OPTV_INTEGER,	{0}, FALSE},
    {-1,				NULL,		OPTV_NONE,	{0}, FALSE}
 };
@@ -168,7 +174,6 @@ const char *I810vgahwSymbols[] = {
    "vgaHWGetHWRec",
    "vgaHWGetIOBase",
    "vgaHWGetIndex",
-   "vgaHWHandleColormaps",
    "vgaHWInit",
    "vgaHWLock",
    "vgaHWMapMem",
@@ -189,15 +194,25 @@ const char *I810fbSymbols[] = {
 };
 
 const char *I810vbeSymbols[] = {
-   "VBEInit",
-   "vbeDoEDID",
-   "vbeFree",
-   "VBEFindSupportedDepths",
+   "VBEFreeModeInfo",
+   "VBEFreeVBEInfo",
+   "VBEGetModeInfo",
    "VBEGetModePool",
+   "VBEGetVBEInfo",
+   "VBEGetVBEMode",
+   "VBEInit",
+   "VBEPrintModes",
+   "VBESaveRestore",
+   "VBESetDisplayStart",
+   "VBESetGetDACPaletteFormat",
+   "VBESetGetLogicalScanlineLength",
+   "VBESetGetPaletteData",
    "VBESetModeNames",
    "VBESetModeParameters",
+   "VBESetVBEMode",
    "VBEValidateModes",
-   "VBEPrintModes",
+   "vbeDoEDID",
+   "vbeFree",
    NULL
 };
 
@@ -224,14 +239,10 @@ const char *I810int10Symbols[] = {
 };
 
 const char *I810xaaSymbols[] = {
-   "XAACachePlanarMonoStipple",
    "XAACreateInfoRec",
    "XAADestroyInfoRec",
    "XAAFillSolidRects",
    "XAAInit",
-   "XAAOverlayFBfuncs",
-   "XAAScreenIndex",
-   "XAAStippleScanlineFuncLSBFirst",
    NULL
 };
 
@@ -254,46 +265,25 @@ static const char *drmSymbols[] = {
    "drmAgpEnable",
    "drmAgpFree",
    "drmAgpRelease",
-   "drmAvailable",
    "drmAuthMagic",
-#ifdef HAVE_DRM_COMMAND
-   "drmCommandNone",
-   "drmCommandRead",
    "drmCommandWrite",
-   "drmCommandWriteRead",
-#endif
    "drmCreateContext",
    "drmCtlInstHandler",
+   "drmCtlUninstHandler",
    "drmDestroyContext",
    "drmFreeVersion",
    "drmGetInterruptFromBusID",
-#ifdef HAVE_DRM_COMMAND
    "drmGetLibVersion",
-#endif
    "drmGetVersion",
-#ifndef HAVE_DRM_COMMAND
-   "drmI810CleanupDma",
-   "drmI810InitDma",
-   "drmI830CleanupDma",
-   "drmI830InitDma",
-#endif
    NULL
 };
 
-static const char *drmOptionalSymbols[] = {
-#ifndef HAVE_DRM_COMMAND
-   "drmGetLibVersion",
-#endif
-   NULL
-};
 
 static const char *driSymbols[] = {
    "DRICloseScreen",
    "DRICreateInfoRec",
    "DRIDestroyInfoRec",
    "DRIFinishScreenInit",
-   "DRIGetContext",
-   "DRIGetDrawableIndex",
    "DRIGetSAREAPrivate",
    "DRILock",
    "DRIQueryVersion",
@@ -302,7 +292,17 @@ static const char *driSymbols[] = {
    "GlxSetVisualConfigs",
    NULL
 };
+
+#endif
 #endif
+
+#ifdef XF86DRI
+const char *I810shadowSymbols[] = {
+   "shadowInit",
+   "shadowSetup",
+   "shadowAdd",
+   NULL
+};
 #endif
 
 #endif /* I830_ONLY */
@@ -356,7 +356,7 @@ i810Setup(pointer module, pointer opts, int *errmaj, int *errmin)
 {
    static Bool setupDone = 0;
 
-   /* This module should be loaded only once, but check to be sure. 
+   /* This module should be loaded only once, but check to be sure.
     */
    if (!setupDone) {
       setupDone = 1;
@@ -369,7 +369,9 @@ i810Setup(pointer module, pointer opts, int *errmaj, int *errmin)
       LoaderRefSymLists(I810vgahwSymbols,
 			I810fbSymbols, I810xaaSymbols, I810ramdacSymbols,
 #ifdef XF86DRI
-			drmSymbols, drmOptionalSymbols, driSymbols,
+			drmSymbols,
+			driSymbols,
+			I810shadowSymbols,
 #endif
 			I810vbeSymbols, vbeOptionalSymbols,
 			I810ddcSymbols, I810int10Symbols, NULL);
@@ -392,7 +394,7 @@ i810Setup(pointer module, pointer opts, int *errmaj, int *errmin)
 /*
  * I810GetRec and I810FreeRec --
  *
- * Private data for the driver is stored in the screen structure. 
+ * Private data for the driver is stored in the screen structure.
  * These two functions create and destroy that private data.
  *
  */
@@ -423,12 +425,12 @@ I810FreeRec(ScrnInfoPtr pScrn)
  *
  * Returns the string name for the driver based on the chipset. In this
  * case it will always be an I810, so we can return a static string.
- * 
+ *
  */
 static void
 I810Identify(int flags)
 {
-   xf86PrintChipsets(I810_NAME, "Driver for Intel i810 chipset",
+   xf86PrintChipsets(I810_NAME, "Driver for Intel Integrated Graphics Chipsets",
 		     I810Chipsets);
 }
 
@@ -472,7 +474,7 @@ I810Probe(DriverPtr drv, int flags)
       return FALSE;
    }
 
-   /* 
+   /*
     * This probing is just checking the PCI data the server already
     * collected.
     */
@@ -531,11 +533,15 @@ I810Probe(DriverPtr drv, int flags)
 	    pScrn->name = I810_NAME;
 	    pScrn->Probe = I810Probe;
 	    foundScreen = TRUE;
-	    if (pEnt->chipset == PCI_CHIP_I830_M ||
-		pEnt->chipset == PCI_CHIP_845_G)
+	    switch (pEnt->chipset) {
+	    case PCI_CHIP_I830_M:
+	    case PCI_CHIP_845_G:
+	    case PCI_CHIP_I855_GM:
+	    case PCI_CHIP_I865_G:
 	       I830InitpScrn(pScrn);
-	    else {
+	       break;
 #ifndef I830_ONLY
+	    default:
 	       pScrn->PreInit = I810PreInit;
 	       pScrn->ScreenInit = I810ScreenInit;
 	       pScrn->SwitchMode = I810SwitchMode;
@@ -544,6 +550,7 @@ I810Probe(DriverPtr drv, int flags)
 	       pScrn->LeaveVT = I810LeaveVT;
 	       pScrn->FreeScreen = I810FreeScreen;
 	       pScrn->ValidMode = I810ValidMode;
+	       break;
 #endif
 	    }
 	 }
@@ -708,6 +715,11 @@ I810PreInit(ScrnInfoPtr pScrn, int flags)
    if (xf86ReturnOptValBool(pI810->Options, OPTION_DAC_6BIT, FALSE))
       pScrn->rgbBits = 6;
 
+   if (xf86ReturnOptValBool(pI810->Options, OPTION_SHOW_CACHE, FALSE))
+     pI810->showCache = TRUE;
+   else
+     pI810->showCache = FALSE;
+
    /* 6-BIT dac isn't reasonable for modes with > 8bpp */
    if (xf86ReturnOptValBool(pI810->Options, OPTION_DAC_6BIT, FALSE) &&
        pScrn->bitsPerPixel > 8) {
@@ -813,7 +825,7 @@ I810PreInit(ScrnInfoPtr pScrn, int flags)
    /* Default to 4MB framebuffer, which is sufficient for all
     * supported 2d resolutions.  If the user has specified a different
     * size in the XF86Config, use that amount instead.
-    * 
+    *
     *  Changed to 8 Meg so we can have acceleration by default (Mark).
     */
    pScrn->videoRam = 8192;
@@ -954,7 +966,10 @@ I810PreInit(ScrnInfoPtr pScrn, int flags)
    }
    xf86LoaderReqSymLists(I810fbSymbols, NULL);
 
-   if (!xf86ReturnOptValBool(pI810->Options, OPTION_NOACCEL, FALSE)) {
+   if (xf86ReturnOptValBool(pI810->Options, OPTION_NOACCEL, FALSE))
+      pI810->noAccel = TRUE;
+
+   if (!pI810->noAccel) {
       if (!xf86LoadSubModule(pScrn, "xaa")) {
 	 I810FreeRec(pScrn);
 	 return FALSE;
@@ -1130,7 +1145,7 @@ DoSave(ScrnInfoPtr pScrn, vgaRegPtr vgaReg, I810RegPtr i810Reg,
       vgaHWSave(pScrn, vgaReg, VGA_SR_MODE | VGA_SR_CMAP);
 
    /*
-    * The port I/O code necessary to read in the extended registers 
+    * The port I/O code necessary to read in the extended registers
     * into the fields of the vgaI810Rec structure goes here.
     */
    i810Reg->IOControl = hwp->readCrtc(hwp, IO_CTNL);
@@ -1301,7 +1316,7 @@ DoRestore(ScrnInfoPtr pScrn, vgaRegPtr vgaReg, I810RegPtr i810Reg,
 
    /*
     * Code to restore any SVGA registers that have been saved/modified
-    * goes here.  Note that it is allowable, and often correct, to 
+    * goes here.  Note that it is allowable, and often correct, to
     * only modify certain bits in a register by a read/modify/write cycle.
     *
     * A special case - when using an external clock-setting program,
@@ -1335,9 +1350,17 @@ DoRestore(ScrnInfoPtr pScrn, vgaRegPtr vgaReg, I810RegPtr i810Reg,
    pI810->writeControl(pI810, GRX, ADDRESS_MAPPING, temp);
 
    /* Setting the OVRACT Register for video overlay */
-   OUTREG(0x6001C,
-	  (i810Reg->OverlayActiveEnd << 16) | i810Reg->OverlayActiveStart);
-
+   {
+       CARD32 LCD_TV_Control = INREG(LCD_TV_C);
+       
+       if(!(LCD_TV_Control & LCD_TV_ENABLE)
+	  || (LCD_TV_Control & LCD_TV_VGAMOD)) {
+	   OUTREG(LCD_TV_OVRACT,
+		  (i810Reg->OverlayActiveEnd << 16)
+		  | i810Reg->OverlayActiveStart);
+       }
+   }
+   
    /* Turn on DRAM Refresh */
    temp = INREG8(DRAM_ROW_CNTL_HI);
    temp &= ~DRAM_REFRESH_RATE;
@@ -1840,7 +1863,7 @@ I810AllocateFront(ScrnInfoPtr pScrn)
     * Not sure why 256 was initially subtracted from videoRam in the
     * maxCacheLines calculation, but that was causing a problem
     * for configurations that have exactly enough Ram for the framebuffer.
-    * Common code should catch the case where there isn't enough space for 
+    * Common code should catch the case where there isn't enough space for
     * framebuffer, we'll just check for no space for cache_lines.  -jens
     *
     */
@@ -2092,7 +2115,7 @@ I810ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
 
 #ifdef XF86DRI
    if (pI810->directRenderingEnabled) {
-      /* Now that mi, cfb, drm and others have done their thing, 
+      /* Now that mi, cfb, drm and others have done their thing,
        * complete the DRI setup.
        */
       pI810->directRenderingEnabled = I810DRIFinishScreenInit(pScreen);
@@ -2138,7 +2161,18 @@ I810AdjustFrame(int scrnIndex, int x, int y, int flags)
    ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
    I810Ptr pI810 = I810PTR(pScrn);
    vgaHWPtr hwp = VGAHWPTR(pScrn);
-   int Base = (y * pScrn->displayWidth + x) >> 2;
+   int Base;
+#if 1
+   if (pI810->showCache) {
+     int lastline = pI810->FbMapSize / 
+       ((pScrn->displayWidth * pScrn->bitsPerPixel) / 8);
+     lastline -= pScrn->currentMode->VDisplay;
+     if (y > 0)
+       y += pScrn->currentMode->VDisplay;
+     if (y > lastline) y = lastline;
+   }
+#endif
+   Base = (y * pScrn->displayWidth + x) >> 2;
 
    if (I810_DEBUG & DEBUG_VERBOSE_CURSOR)
       ErrorF("I810AdjustFrame %d,%d %x\n", x, y, flags);
@@ -2152,7 +2186,7 @@ I810AdjustFrame(int scrnIndex, int x, int y, int flags)
    case 24:
       /* KW: Need to do 16-pixel alignment for i810, otherwise you
        * get bad watermark problems.  Need to fixup the mouse
-       * pointer positioning to take this into account.  
+       * pointer positioning to take this into account.
        */
       pI810->CursorOffset = (Base & 0x3) * 4;
       Base &= ~0x3;
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_memory.c b/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_memory.c
index 2f2c98aa9..5efa23a94 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_memory.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_memory.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i810_memory.c,v 1.25 2002/09/11 00:29:32 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i810_memory.c,v 1.27 2002/12/10 01:27:05 dawes Exp $ */
 /**************************************************************************
 
 Copyright 1998-1999 Precision Insight, Inc., Cedar Park, Texas.
@@ -41,7 +41,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 /*
  * Authors:
- *   Keith Whitwell <keithw@precisioninsight.com>
+ *   Keith Whitwell <keith@tungstengraphics.com>
  *
  */
 
@@ -218,7 +218,7 @@ I810AllocateGARTMemory(ScrnInfoPtr pScrn)
  * Need to make it less likely that we miss out on this - probably
  * need to move the frontbuffer away from the 'guarenteed' alignment
  * of the first memory segment, or perhaps allocate a discontigous
- * framebuffer to get more alignment 'sweet spots'.  
+ * framebuffer to get more alignment 'sweet spots'.
  */
 void
 I810SetTiledMemory(ScrnInfoPtr pScrn, int nr, unsigned int start,
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_reg.h b/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_reg.h
index f7c84e5c4..c935982a7 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_reg.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_reg.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i810_reg.h,v 1.8 2002/09/12 04:08:25 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i810_reg.h,v 1.13 2003/02/06 04:18:04 dawes Exp $ */
 /**************************************************************************
 
 Copyright 1998-1999 Precision Insight, Inc., Cedar Park, Texas.
@@ -28,7 +28,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 /*
  * Authors:
- *   Keith Whitwell <keithw@precisioninsight.com>
+ *   Keith Whitwell <keith@tungstengraphics.com>
  *
  *   based on the i740 driver by
  *        Kevin E. Martin <kevin@precisioninsight.com> 
@@ -36,7 +36,10 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
  */
 
-/* I/O register offsets 
+#ifndef _I810_REG_H
+#define _I810_REG_H
+
+/* I/O register offsets
  */
 #define SRX 0x3C4		/* p208 */
 #define GRX 0x3CE		/* p213 */
@@ -147,7 +150,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 /* Cursor control registers, pp383-384
  */
-/* Desktop (845G) */
+/* Desktop (845G, 865G) */
 #define CURSOR_CONTROL     0x70080
 #define CURSOR_ENABLE          0x80000000
 #define CURSOR_GAMMA_ENABLE    0x40000000
@@ -610,6 +613,14 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #define CS_USE_CTX0              0
 #define CS_USE_CTX1              (1<<0)
 
+/* I810 LCD/TV registers */
+#define LCD_TV_HTOTAL	0x60000
+#define LCD_TV_C	0x60018
+#define LCD_TV_OVRACT   0x6001C
+
+#define LCD_TV_ENABLE (1 << 31)
+#define LCD_TV_VGAMOD (1 << 28)
+
 /* I830 CRTC registers */
 #define HTOTAL_A	0x60000
 #define HBLANK_A	0x60004
@@ -658,7 +669,9 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #define ADPA			0x61100
 #define ADPA_DAC_ENABLE 	(1<<31)
 #define ADPA_DAC_DISABLE	0
+#define ADPA_PIPE_SELECT_MASK	(1<<30)
 #define ADPA_PIPE_A_SELECT	0
+#define ADPA_PIPE_B_SELECT	(1<<30)
 #define ADPA_USE_VGA_HVPOLARITY (1<<15)
 #define ADPA_SETS_HVPOLARITY	0
 #define ADPA_VSYNC_CNTL_DISABLE (1<<11)
@@ -671,12 +684,16 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #define ADPA_HSYNC_ACTIVE_LOW	0
 
 
-#define DV0A			0x61120
-#define DV0A_DISABLE		(1<<31)
+#define DVOA			0x61120
+#define DVOB			0x61140
+#define DVOC			0x61160
+#define DVO_ENABLE		(1<<31)
 
-#define DV0B			0x61140
-#define DV0B_DISABLE		(1<<31)
+#define DVOA_SRCDIM		0x61124
+#define DVOB_SRCDIM		0x61144
+#define DVOC_SRCDIM		0x61164
 
+#define LVDS			0x61180
 
 #define PIPEACONF 0x70008
 #define PIPEACONF_ENABLE	(1<<31)
@@ -777,6 +794,21 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #define I830_RDRAM_ND(x)			(((x) & 0x20) >> 5)
 #define I830_RDRAM_DDT(x)			(((x) & 0x18) >> 3)
 
+#define I855_GMCH_GMS_MASK			(0x7 << 4)
+#define I855_GMCH_GMS_DISABLED			0x00
+#define I855_GMCH_GMS_STOLEN_1M			(0x1 << 4)
+#define I855_GMCH_GMS_STOLEN_4M			(0x2 << 4)
+#define I855_GMCH_GMS_STOLEN_8M			(0x3 << 4)
+#define I855_GMCH_GMS_STOLEN_16M		(0x4 << 4)
+#define I855_GMCH_GMS_STOLEN_32M		(0x5 << 4)
+
+#define I85X_CAPID			0x44
+#define I85X_VARIANT_MASK			0x7
+#define I85X_VARIANT_SHIFT			5
+#define I855_GME				0x0
+#define I855_GM					0x4
+#define I852_GME				0x2
+#define I852_GM					0x5
 
 /* BLT commands */
 #define COLOR_BLT_CMD		((2<<29)|(0x40<<22)|(0x3))
@@ -863,18 +895,40 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #define ENABLE_FOG_DENSITY	(1<<23)
 
 
+#define MAX_DISPLAY_PIPES	2
+
+typedef enum {
+   CrtIndex = 0,
+   TvIndex,
+   DfpIndex,
+   LfpIndex,
+   Tv2Index,
+   Dfp2Index,
+   UnknownIndex,
+   Unknown2Index,
+   NumDisplayTypes,
+   NumKnownDisplayTypes = UnknownIndex
+} DisplayType;
+
 /* What's connected to the pipes (as reported by the BIOS) */
 #define PIPE_ACTIVE_MASK		0xff
-#define PIPE_CRT_ACTIVE			0x01
-#define PIPE_TV_ACTIVE			0x02
-#define PIPE_DFP_ACTIVE			0x04
-#define PIPE_LCD_ACTIVE			0x08	/* LFP */
-#define PIPE_TV2_ACTIVE			0x10
-#define PIPE_DFP2_ACTIVE		0x20
-#define PIPE_UNKNOWN_ACTIVE		0xc0
+#define PIPE_CRT_ACTIVE			(1 << CrtIndex)
+#define PIPE_TV_ACTIVE			(1 << TvIndex)
+#define PIPE_DFP_ACTIVE			(1 << DfpIndex)
+#define PIPE_LCD_ACTIVE			(1 << LfpIndex)
+#define PIPE_TV2_ACTIVE			(1 << Tv2Index)
+#define PIPE_DFP2_ACTIVE		(1 << Dfp2Index)
+#define PIPE_UNKNOWN_ACTIVE		((1 << UnknownIndex) |	\
+					 (1 << Unknown2Index))
+
+#define PIPE_SIZED_DISP_MASK		(PIPE_DFP_ACTIVE |	\
+					 PIPE_LCD_ACTIVE |	\
+					 PIPE_DFP2_ACTIVE)
 
 #define PIPE_A_SHIFT			0
 #define PIPE_B_SHIFT			8
+#define PIPE_SHIFT(n)			((n) == 0 ? \
+					 PIPE_A_SHIFT : PIPE_B_SHIFT)
 
 /*
  * Some BIOS scratch area registers.  The 845 (and 830?) store the amount
@@ -889,6 +943,28 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #define SWF5			0x71424
 #define SWF6			0x71428
 
+/*
+ * 855 scratch registers.
+ */
+#define SWF00			0x70410
+#define SWF01			0x70414
+#define SWF02			0x70418
+#define SWF03			0x7041c
+#define SWF04			0x70420
+#define SWF05			0x70424
+#define SWF06			0x70428
+
+#define SWF10			SWF0
+#define SWF11			SWF1
+#define SWF12			SWF2
+#define SWF13			SWF3
+#define SWF14			SWF4
+#define SWF15			SWF5
+#define SWF16			SWF6
+
+#define SWF30			0x72414
+#define SWF31			0x72418
+#define SWF32			0x7241c
 
 /*
  * Overlay registers.  These are overlay registers accessed via MMIO.
@@ -913,3 +989,4 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #define PALETTE_A		0x0a000
 #define PALETTE_B		0x0a800
 
+#endif /* _I810_REG_H */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_wmark.c b/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_wmark.c
index 70b0e61f9..9a6bdd349 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_wmark.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_wmark.c
@@ -25,7 +25,7 @@ TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
 SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i810_wmark.c,v 1.7 2002/09/11 00:29:32 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i810_wmark.c,v 1.8 2002/10/30 12:52:18 alanh Exp $ */
 
 /*
  * Reformatted with GNU indent (2.2.8), using the following options:
@@ -42,7 +42,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 /*
  * Authors:
- *   Keith Whitwell <keithw@precisioninsight.com>
+ *   Keith Whitwell <keith@tungstengraphics.com>
  */
 
 #include "xf86.h"
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/i810/i830.h b/xc/programs/Xserver/hw/xfree86/drivers/i810/i830.h
index be0a5f963..e141931ac 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/i810/i830.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/i810/i830.h
@@ -27,11 +27,11 @@ TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
 SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i830.h,v 1.3 2002/10/08 20:15:46 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i830.h,v 1.7 2003/01/28 22:47:09 dawes Exp $ */
 
 /*
  * Authors:
- *   Keith Whitwell <keithw@precisioninsight.com>
+ *   Keith Whitwell <keith@tungstengraphics.com>
  *   David Dawes <dawes@tungstengraphics.com>
  *
  */
@@ -74,32 +74,19 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 /* I830 Video BIOS support */
 
 /*
- * The mode handling is based upon the VESA driver written by:
- * Paulo César Pereira de Andrade <pcpa@conectiva.com.br>
+ * The mode handling is based upon the VESA driver written by
+ * Paulo César Pereira de Andrade <pcpa@conectiva.com.br>.
  */
 
 typedef struct _VESARec {
-   vbeInfoPtr pVbe;
-   VbeInfoBlock *vbeInfo;
-   pointer state, pstate;		/* SVGA state */
+   /* SVGA state */
+   pointer state, pstate;
    int statePage, stateSize, stateMode;
    CARD32 *savedPal;
+   int savedScanlinePitch;
    xf86MonPtr monitor;
-   CARD8 saveSWF1;
-   CARD8 newSWF1;
-   Bool overrideBIOSMemSize;
-   Bool useDefaultRefresh;		/*
-					 * Don't try to set the refresh rate
-					 * for any modes.
-					 */
-   Bool enableDisplays;			/*
-					 * Use BIOS call 0x5f64 to explicitly
-					 * enable displays.
-					 */
-   Bool useExtendedRefresh;		/*
-					 * Use BIOS call 0x5f05 to set the
-					 * refresh rate.
-					 */
+   /* Don't try to set the refresh rate for any modes. */
+   Bool useDefaultRefresh;
 } VESARec, *VESAPtr;
 
 
@@ -118,7 +105,7 @@ typedef struct _I830MemRange *I830MemRangePtr;
 typedef struct _I830MemRange {
    long Start;
    long End;
-   unsigned long Size;
+   long Size;
    unsigned long Physical;
    unsigned long Offset;		/* Offset of AGP-allocated portion */
    unsigned long Alignment;
@@ -159,12 +146,14 @@ typedef struct _I830Rec {
    unsigned long FbMapSize;
    unsigned long TotalVideoRam;
    I830MemRange StolenMemory;		/* pre-allocated memory */
+   unsigned long BIOSMemorySize;	/* min stolen pool size */
 
    /* These change according to what has been allocated. */
-   unsigned long FreeMemory;
+   long FreeMemory;
    I830MemRange MemoryAperture;
    I830MemPool StolenPool;
-  
+   unsigned long allocatedMemory;
+
    /* Regions allocated either from the above pools, or from agpgart. */
    I830MemRange FrontBuffer;
    I830MemRange	CursorMem;
@@ -187,9 +176,12 @@ typedef struct _I830Rec {
    I830MemRange BufferMem;
    I830MemRange ContextMem;
    int TexGranularity;
+   int drmMinor;
+   Bool have3DWindows;
 #endif
 
    Bool NeedRingBufferLow;
+   Bool allowPageFlip;
 
    int auxPitch;
    int auxPitchBits;
@@ -208,6 +200,7 @@ typedef struct _I830Rec {
    EntityInfoPtr pEnt;
    pciVideoPtr PciInfo;
    PCITAG PciTag;
+   CARD8 variant;
 
    unsigned int BR[20];
 
@@ -222,6 +215,7 @@ typedef struct _I830Rec {
 
    Bool noAccel;
    Bool SWCursor;
+   Bool cursorOn;
    XAAInfoRecPtr AccelInfoRec;
    xf86CursorInfoPtr CursorInfoRec;
    CloseScreenProcPtr CloseScreen;
@@ -232,15 +226,16 @@ typedef struct _I830Rec {
    I830WriteByteFunc writeStandard;
    I830ReadByteFunc readStandard;
 
-   Bool XvEnabled;			/* false if I830_XV not defined. */
+   Bool XvDisabled;			/* Xv disabled in PreInit. */
+   Bool XvEnabled;			/* Xv enabled for this generation. */
 
 #ifdef I830_XV
    int colorKey;
    XF86VideoAdaptorPtr adaptor;
    Bool overlayOn;
 #endif
-   
-   Bool directRenderingDisabled;	/* DRI disabled always. */
+
+   Bool directRenderingDisabled;	/* DRI disabled in PreInit. */
    Bool directRenderingEnabled;		/* DRI enabled this generation. */
 
 #ifdef XF86DRI
@@ -260,16 +255,46 @@ typedef struct _I830Rec {
    /* Stolen memory support */
    Bool StolenOnly;
 
-   /* Video BIOS support */
+   /* Video BIOS support. */
+   vbeInfoPtr pVbe;
+   VbeInfoBlock *vbeInfo;
    VESAPtr vesa;
 
+   Bool overrideBIOSMemSize;
+   int saveBIOSMemSize;
+   int newBIOSMemSize;
+   Bool useSWF1;
+   int saveSWF1;
+
+   Bool swfSaved;
+   CARD32 saveSWF0;
+   CARD32 saveSWF4;
+
+   /* Use BIOS call 0x5f64 to explicitly enable displays. */
+   Bool enableDisplays;
+   /* Use BIOS call 0x5f05 to set the refresh rate. */
+   Bool useExtendedRefresh;
+
    int configuredDevices;
+
+   /* These are indexed by the display types */
+   Bool displayAttached[NumDisplayTypes];
+   Bool displayPresent[NumDisplayTypes];
+   BoxRec displaySize[NumDisplayTypes];
+
    /* [0] is Pipe A, [1] is Pipe B. */
-   int pipeDevices[2];
-   Bool pipeEnabled[2];
-   BoxRec pipeDisplaySize[2];
+   int availablePipes;
+   int pipeDevices[MAX_DISPLAY_PIPES];
    /* [0] is display plane A, [1] is display plane B. */
-   int planeEnabled[2];
+   Bool pipeEnabled[MAX_DISPLAY_PIPES];
+   BoxRec pipeDisplaySize[MAX_DISPLAY_PIPES];
+   int planeEnabled[MAX_DISPLAY_PIPES];
+
+   /* Driver phase/state information */
+   Bool starting;
+   Bool closing;
+   Bool suspended;
+
 } I830Rec;
 
 #define I830PTR(p) ((I830Ptr)((p)->driverPrivate))
@@ -295,18 +320,19 @@ extern void I830EmitFlush(ScrnInfoPtr pScrn);
 
 extern Bool I830DGAInit(ScreenPtr pScreen);
 
+#ifdef I830_XV
 extern void I830InitVideo(ScreenPtr pScreen);
+extern void I830VideoSwitchModeBefore(ScrnInfoPtr pScrn, DisplayModePtr mode);
+extern void I830VideoSwitchModeAfter(ScrnInfoPtr pScrn, DisplayModePtr mode);
+#endif
 
 #ifdef XF86DRI
-extern Bool I830Allocate3DMemory(ScrnInfoPtr pScrn);
+extern Bool I830Allocate3DMemory(ScrnInfoPtr pScrn, const int flags);
 extern void I830SetupMemoryTiling(ScrnInfoPtr pScrn);
-extern Bool I830DoPoolAllocation(ScrnInfoPtr pScrn, I830MemPool *pool);
 extern Bool I830DRIScreenInit(ScreenPtr pScreen);
 extern Bool I830DRIDoMappings(ScreenPtr pScreen);
 extern void I830DRICloseScreen(ScreenPtr pScreen);
 extern Bool I830DRIFinishScreenInit(ScreenPtr pScreen);
-extern Bool I830InitDma(ScrnInfoPtr pScrn);
-extern Bool I830CleanupDma(ScrnInfoPtr pScrn);
 #endif
 extern Bool I830AccelInit(ScreenPtr pScreen);
 extern void I830SetupForScreenToScreenCopy(ScrnInfoPtr pScrn, int xdir,
@@ -321,8 +347,11 @@ extern void I830SetupForSolidFill(ScrnInfoPtr pScrn, int color, int rop,
 extern void I830SubsequentSolidFillRect(ScrnInfoPtr pScrn, int x, int y,
 					int w, int h);
 
-extern int I830CheckAvailableMemory(ScrnInfoPtr pScrn);
-extern Bool I830Allocate2DMemory(ScrnInfoPtr pScrn, Bool initial);
+extern void I830ResetAllocations(ScrnInfoPtr pScrn, const int flags);
+extern long I830CheckAvailableMemory(ScrnInfoPtr pScrn);
+extern long I830GetExcessMemoryAllocations(ScrnInfoPtr pScrn);
+extern Bool I830Allocate2DMemory(ScrnInfoPtr pScrn, const int flags);
+extern Bool I830DoPoolAllocation(ScrnInfoPtr pScrn, I830MemPool *pool);
 extern Bool I830FixupOffsets(ScrnInfoPtr pScrn);
 extern Bool I830BindGARTMemory(ScrnInfoPtr pScrn);
 extern Bool I830UnbindGARTMemory(ScrnInfoPtr pScrn);
@@ -333,23 +362,34 @@ extern unsigned long I830AllocVidMem(ScrnInfoPtr pScrn, I830MemRange *result,
 extern void I830PrintAllRegisters(I830RegPtr i830Reg);
 extern void I830ReadAllRegisters(I830Ptr pI830, I830RegPtr i830Reg);
 
+extern void I830ChangeFrontbuffer(ScrnInfoPtr pScrn,int buffer);
+
 /*
- * 8000KB is the amount reported by VBE when 8MB is reserved.
- * 132K of that is used for tables, leaving 8060KB, but VBE reports in
- * multiples of 64K so rounding down gives 8000KB.
+ * 12288 is set as the maximum, chosen because it is enough for
+ * 1920x1440@32bpp with a 2048 pixel line pitch with some to spare.
  */
-#define I830_MINIMUM_VBIOS_MEM		8000
-#define I830_DEFAULT_VIDEOMEM		(MB(8) / 1024)
-
-/* Flags for I830AllocVidMem() */
-#define FROM_ANYWHERE			0x0000
-#define FROM_POOL_ONLY			0x0001
-#define FROM_NEW_ONLY			0x0002
-#define FROM_MASK			0x000f
-#define ALLOCATE_AT_TOP			0x0010
-#define ALLOCATE_AT_BOTTOM		0x0020
-#define	FORCE_GAPS			0x0040
-#define NEED_PHYSICAL_ADDR		0x0100
-#define ALIGN_BOTH_ENDS			0x0200
+#define I830_MAXIMUM_VBIOS_MEM		12288
+#define I830_DEFAULT_VIDEOMEM_2D	(MB(8) / 1024)
+#define I830_DEFAULT_VIDEOMEM_3D	(MB(32) / 1024)
+
+/* Flags for memory allocation function */
+#define FROM_ANYWHERE			0x00000000
+#define FROM_POOL_ONLY			0x00000001
+#define FROM_NEW_ONLY			0x00000002
+#define FROM_MASK			0x0000000f
+
+#define ALLOCATE_AT_TOP			0x00000010
+#define ALLOCATE_AT_BOTTOM		0x00000020
+#define FORCE_GAPS			0x00000040
+
+#define NEED_PHYSICAL_ADDR		0x00000100
+#define ALIGN_BOTH_ENDS			0x00000200
+#define FORCE_LOW			0x00000400
+
+#define ALLOC_NO_TILING			0x00001000
+#define ALLOC_INITIAL			0x00002000
+
+#define ALLOCATE_DRY_RUN		0x80000000
+
 
 #endif /* _I830_H_ */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/i810/i830_accel.c b/xc/programs/Xserver/hw/xfree86/drivers/i810/i830_accel.c
index 1b682c67d..1a071497e 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/i810/i830_accel.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/i810/i830_accel.c
@@ -32,7 +32,7 @@ TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
 SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i830_accel.c,v 1.2 2002/10/08 20:15:46 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i830_accel.c,v 1.4 2002/12/10 01:27:05 dawes Exp $ */
 
 /*
  * Reformatted with GNU indent (2.2.8), using the following options:
@@ -49,7 +49,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 /*
  * Authors:
- *   Keith Whitwell <keithw@precisioninsight.com>
+ *   Keith Whitwell <keith@tungstengraphics.com>
  *
  */
 
@@ -172,7 +172,7 @@ I830Sync(ScrnInfoPtr pScrn)
       ErrorF("I830Sync\n");
 
 #ifdef XF86DRI
-   /* VT switching tries to do this.  
+   /* VT switching tries to do this.
     */
    if (!pI830->LockHeld && pI830->directRenderingEnabled) {
       return;
@@ -243,39 +243,10 @@ I830RefreshRing(ScrnInfoPtr pScrn)
    if (pI830->LpRing.space < 0)
       pI830->LpRing.space += pI830->LpRing.mem.Size;
 
-   pI830->AccelInfoRec->NeedToSync = TRUE;
+   if (pI830->AccelInfoRec)
+      pI830->AccelInfoRec->NeedToSync = TRUE;
 }
 
-#if 0
-/* Emit on gaining VT?
- */
-void
-I830EmitInvarientState(ScrnInfoPtr pScrn)
-{
-   I830Ptr pI830 = I830PTR(pScrn);
-
-   BEGIN_LP_RING(10);
-
-   OUT_RING(MI_FLUSH | MI_WRITE_DIRTY_STATE | MI_INVALIDATE_MAP_CACHE);
-   OUT_RING(GFX_CMD_CONTEXT_SEL | CS_UPDATE_USE | CS_USE_CTX0);
-   OUT_RING(MI_FLUSH | MI_WRITE_DIRTY_STATE | MI_INVALIDATE_MAP_CACHE);
-   OUT_RING(MI_NOOP);
-
-   OUT_RING(GFX_OP_COLOR_CHROMA_KEY);
-   OUT_RING(CC1_UPDATE_KILL_WRITE |
-	    CC1_DISABLE_KILL_WRITE |
-	    CC1_UPDATE_COLOR_IDX |
-	    CC1_UPDATE_CHROMA_LOW | CC1_UPDATE_CHROMA_HI | 0);
-   OUT_RING(0);
-   OUT_RING(0);
-
-/*     OUT_RING( CMD_OP_Z_BUFFER_INFO ); */
-/*     OUT_RING( pI830->DepthBuffer.Start | pI830->auxPitchBits); */
-
-   ADVANCE_LP_RING();
-}
-#endif
-
 /* I830 Accel Functions */
 
 static void I830SetupForMono8x8PatternFill(ScrnInfoPtr pScrn,
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/i810/i830_common.h b/xc/programs/Xserver/hw/xfree86/drivers/i810/i830_common.h
index 16cb254e6..3367bfc16 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/i810/i830_common.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/i810/i830_common.h
@@ -26,7 +26,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
 
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i830_common.h,v 1.1 2002/09/11 00:29:32 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i830_common.h,v 1.2 2002/12/10 01:27:05 dawes Exp $ */
 
 /* Author: Jeff Hartmann <jhartmann@valinux.com> 
 
@@ -93,6 +93,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #define I830_UPLOAD_TEXBLEND_MASK	0xf00000
 #define I830_UPLOAD_TEX_PALETTE_N(n)    (0x1000000 << (n))
 #define I830_UPLOAD_TEX_PALETTE_SHARED	0x4000000
+#define I830_UPLOAD_STIPPLE         	0x8000000
 
 /* Indices into buf.Setup where various bits of state are mirrored per
  * context and per buffer.  These can be fired at the card as a unit,
@@ -145,9 +146,14 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #define I830_CTXREG_MCSB1		16
 #define I830_CTX_SETUP_SIZE		17
 
+/* 1.3: Stipple state
+ */ 
+#define I830_STPREG_ST0 0
+#define I830_STPREG_ST1 1
+#define I830_STP_SETUP_SIZE 2
+
 /* Texture state (per tex unit)
  */
-
 #define I830_TEXREG_MI0	0		/* GFX_OP_MAP_INFO (6 dwords) */
 #define I830_TEXREG_MI1	1
 #define I830_TEXREG_MI2	2
@@ -160,6 +166,21 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #define I830_TEXREG_MCS	9		/* GFX_OP_MAP_COORD_SETS */
 #define I830_TEX_SETUP_SIZE 10
 
+/* New version.  Kernel auto-detects.
+ */
+#define I830_TEXREG_TM0LI 	0 /* load immediate 2 texture map n */
+#define I830_TEXREG_TM0S0	1
+#define I830_TEXREG_TM0S1	2
+#define I830_TEXREG_TM0S2	3
+#define I830_TEXREG_TM0S3	4
+#define I830_TEXREG_TM0S4	5
+#define I830_TEXREG_NOP0	6	/* noop */
+#define I830_TEXREG_NOP1	7	/* noop */
+#define I830_TEXREG_NOP2	8	/* noop */
+#define __I830_TEXREG_MCS	9	/* GFX_OP_MAP_COORD_SETS -- shared */
+#define __I830_TEX_SETUP_SIZE   10
+
+
 #define I830_FRONT   0x1
 #define I830_BACK    0x2
 #define I830_DEPTH   0x4
@@ -176,6 +197,11 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #define DRM_I830_SWAP                     0x06
 #define DRM_I830_COPY                     0x07
 #define DRM_I830_DOCOPY                   0x08
+#define DRM_I830_FLIP                     0x09
+#define DRM_I830_IRQ_EMIT                 0x0a
+#define DRM_I830_IRQ_WAIT                 0x0b
+#define DRM_I830_GETPARAM                 0x0c
+#define DRM_I830_SETPARAM                 0x0d
 
 #endif /* _I830_DEFINES_ */
 
@@ -234,4 +260,29 @@ typedef struct {
    int granted;
 } drmI830DMA;
 
+typedef struct drm_i830_irq_emit {
+	int *irq_seq;
+} drmI830IrqEmit;
+
+typedef struct drm_i830_irq_wait {
+	int irq_seq;
+} drmI830IrqWait;
+
+typedef struct drm_i830_getparam {
+	int param;
+	int *value;
+} drmI830GetParam;
+
+#define I830_PARAM_IRQ_ACTIVE  1
+
+
+typedef struct drm_i830_setparam {
+	int param;
+	int value;
+} drmI830SetParam;
+
+#define I830_SETPARAM_USE_MI_BATCHBUFFER_START  1
+
+
+
 #endif /* _I830_DRM_H_ */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/i810/i830_cursor.c b/xc/programs/Xserver/hw/xfree86/drivers/i810/i830_cursor.c
index bea3c4a86..419fd5837 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/i810/i830_cursor.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/i810/i830_cursor.c
@@ -2,6 +2,7 @@
 /**************************************************************************
 
 Copyright 1998-1999 Precision Insight, Inc., Cedar Park, Texas.
+Copyright © 2002 David Dawes
 All Rights Reserved.
 
 Permission is hereby granted, free of charge, to any person obtaining a
@@ -25,7 +26,7 @@ TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
 SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i830_cursor.c,v 1.2 2002/09/12 22:25:18 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i830_cursor.c,v 1.6 2002/12/18 15:49:01 dawes Exp $ */
 
 /*
  * Reformatted with GNU indent (2.2.8), using the following options:
@@ -42,7 +43,8 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 /*
  * Authors:
- *   Keith Whitwell <keithw@precisioninsight.com>
+ *   Keith Whitwell <keith@tungstengraphics.com>
+ *   David Dawes <dawes@tungstengraphics.com>
  *
  */
 
@@ -206,10 +208,13 @@ I830SetCursorPosition(ScrnInfoPtr pScrn, int x, int y)
 
    OUTREG(CURSOR_A_POSITION, temp);
 
-   if (hide)
-      pI830->CursorInfoRec->HideCursor(pScrn);
-   else if (show)
-      pI830->CursorInfoRec->ShowCursor(pScrn);
+   if (pI830->cursorOn) {
+      if (hide)
+	 pI830->CursorInfoRec->HideCursor(pScrn);
+      else if (show)
+	 pI830->CursorInfoRec->ShowCursor(pScrn);
+      pI830->cursorOn = TRUE;
+   }
 }
 
 static void
@@ -224,6 +229,7 @@ I830ShowCursor(ScrnInfoPtr pScrn)
 	   " Value of CursorMem.Start is %x ",
 	   pI830->CursorMem.Physical, pI830->CursorMem.Start);
 
+   pI830->cursorOn = TRUE;
    if (IS_MOBILE(pI830)) {
       temp = INREG(CURSOR_A_CONTROL);
       temp &= ~CURSOR_MODE;
@@ -246,6 +252,7 @@ I830HideCursor(ScrnInfoPtr pScrn)
 
    DPRINTF(PFX, "I830HideCursor\n");
 
+   pI830->cursorOn = FALSE;
    if (IS_MOBILE(pI830)) {
       temp = INREG(CURSOR_A_CONTROL);
       temp &= ~CURSOR_MODE;
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/i810/i830_dga.c b/xc/programs/Xserver/hw/xfree86/drivers/i810/i830_dga.c
index 584ef0204..bb4c103a1 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/i810/i830_dga.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/i810/i830_dga.c
@@ -34,7 +34,7 @@
  * with <TAB> characters expanded at 8-column intervals.
  */
 
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i830_dga.c,v 1.1 2002/09/11 00:29:32 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i830_dga.c,v 1.3 2003/02/26 04:11:23 dawes Exp $ */
 
 #include "xf86.h"
 #include "xf86_OSproc.h"
@@ -108,7 +108,7 @@ I830DGAInit(ScreenPtr pScreen)
 
       currentMode->mode = pMode;
       currentMode->flags = DGA_CONCURRENT_ACCESS | DGA_PIXMAP_AVAILABLE;
-      if (pI830->AccelInfoRec)
+      if (!pI830->noAccel)
 	 currentMode->flags |= DGA_FILL_RECT | DGA_BLIT_RECT;
       if (pMode->Flags & V_DBLSCAN)
 	 currentMode->flags |= DGA_DOUBLESCAN;
@@ -280,9 +280,9 @@ I830_OpenFramebuffer(ScrnInfoPtr pScrn,
    MARKER();
 
    *name = NULL;			/* no special device */
-   *mem = (unsigned char *)pI830->LinearAddr;
-   *size = pI830->FbMapSize;
-   *offset = pScrn->fbOffset;
+   *mem = (unsigned char *)(pI830->LinearAddr + pScrn->fbOffset);
+   *size = pI830->FrontBuffer.Size;
+   *offset = 0;
    *flags = DGA_NEED_ROOT;
 
    DPRINTF(PFX,
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/i810/i830_dri.c b/xc/programs/Xserver/hw/xfree86/drivers/i810/i830_dri.c
index ae4fc5133..b6655c943 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/i810/i830_dri.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/i810/i830_dri.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i830_dri.c,v 1.6 2002/10/08 22:14:08 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i830_dri.c,v 1.12 2003/02/08 21:26:57 dawes Exp $ */
 /**************************************************************************
 
 Copyright 2001 VA Linux Systems Inc., Fremont, California.
@@ -41,8 +41,9 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
  */
 
 /*
- * Authors: Jeff Hartmann <jhartmann@valinux.com> 
+ * Authors: Jeff Hartmann <jhartmann@valinux.com>
  *          David Dawes <dawes@tungstengraphics.com>
+ *          Keith Whitwell <keith@tungstengraphics.com>
  */
 
 /*
@@ -66,6 +67,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "xf86Pci.h"
 
 #include "windowstr.h"
+#include "shadow.h"
 
 #include "GL/glxtokens.h"
 
@@ -91,16 +93,20 @@ static void I830DRIInitBuffers(WindowPtr pWin, RegionPtr prgn, CARD32 index);
 static void I830DRIMoveBuffers(WindowPtr pParent, DDXPointRec ptOldOrg,
 			       RegionPtr prgnSrc, CARD32 index);
 
+static Bool I830DRICloseFullScreen(ScreenPtr pScreen);
+static Bool I830DRIOpenFullScreen(ScreenPtr pScreen);
+static void I830DRITransitionTo2d(ScreenPtr pScreen);
+static void I830DRITransitionTo3d(ScreenPtr pScreen);
+static void I830DRITransitionMultiToSingle3d(ScreenPtr pScreen);
+static void I830DRITransitionSingleToMulti3d(ScreenPtr pScreen);
+
+static void I830DRIShadowUpdate (ScreenPtr pScreen, shadowBufPtr pBuf);
+
 extern void GlxSetVisualConfigs(int nconfigs,
 				__GLXvisualConfig * configs,
 				void **configprivs);
 
-#ifndef HAVE_DRM_COMMAND
-extern drmVersionPtr drmGetLibVersion(int fd);
-#endif
-
-#ifdef HAVE_DRM_COMMAND
-Bool
+static Bool
 I830CleanupDma(ScrnInfoPtr pScrn)
 {
    I830Ptr pI830 = I830PTR(pScrn);
@@ -117,22 +123,8 @@ I830CleanupDma(ScrnInfoPtr pScrn)
 
    return TRUE;
 }
-#else
-Bool
-I830CleanupDma(ScrnInfoPtr pScrn)
-{
-   I830Ptr pI830 = I830PTR(pScrn);
 
-   if (!drmI830CleanupDma(pI830->drmSubFD)) {
-      xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "I830 Dma Cleanup Failed\n");
-      return FALSE;
-   }
-   return TRUE;
-}
-#endif
-
-#ifdef HAVE_DRM_COMMAND
-Bool
+static Bool
 I830InitDma(ScrnInfoPtr pScrn)
 {
    I830Ptr pI830 = I830PTR(pScrn);
@@ -172,41 +164,25 @@ I830InitDma(ScrnInfoPtr pScrn)
 
    return TRUE;
 }
-#else
-Bool
-I830InitDma(ScrnInfoPtr pScrn)
+
+static Bool
+I830SetParam(ScrnInfoPtr pScrn, int param, int value)
 {
    I830Ptr pI830 = I830PTR(pScrn);
-   I830RingBuffer *ring = &(pI830->LpRing);
-   I830DRIPtr pI830DRI = (I830DRIPtr) pI830->pDRIInfo->devPrivate;
-   drmI830Init info;
-
-   info.start = ring->mem.Start + pI830->LinearAddr;
-   info.end = ring->mem.End + pI830->LinearAddr;
-   info.size = ring->mem.Size;
-
-   info.mmio_offset = (unsigned int)pI830DRI->regs;
-   info.buffers_offset = (unsigned int)pI830->buffer_map;
+   drmI830SetParam sp;
 
-   info.sarea_off = sizeof(XF86DRISAREARec);
+   memset(&sp, 0, sizeof(sp));
+   sp.param = param;
+   sp.value = value;
 
-   info.front_offset = pI830->FrontBuffer.Start;
-   info.back_offset = pI830->BackBuffer.Start;
-   info.depth_offset = pI830->DepthBuffer.Start;
-   info.w = pScrn->virtualX;
-   info.h = pScrn->virtualY;
-   info.pitch = pI830->auxPitch;
-   info.pitch_bits = pI830->auxPitchBits;
-   info.cpp = pI830->cpp;
-
-   if (!drmI830InitDma(pI830->drmSubFD, &info)) {
-      xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-		 "I830 Dma Initialization Failed\n");
+   if (drmCommandWrite(pI830->drmSubFD, DRM_I830_SETPARAM, &sp, sizeof(sp))) {
+      xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "I830 SetParam Failed\n");
       return FALSE;
    }
+
    return TRUE;
 }
-#endif
+
 
 static Bool
 I830InitVisualConfigs(ScreenPtr pScreen)
@@ -348,11 +324,11 @@ I830InitVisualConfigs(ScreenPtr pScreen)
 	       pConfigs[i].redSize = 8;
 	       pConfigs[i].greenSize = 8;
 	       pConfigs[i].blueSize = 8;
-	       pConfigs[i].alphaSize = 0;
+	       pConfigs[i].alphaSize = 8;
 	       pConfigs[i].redMask = 0x00FF0000;
 	       pConfigs[i].greenMask = 0x0000FF00;
 	       pConfigs[i].blueMask = 0x000000FF;
-	       pConfigs[i].alphaMask = 0xff000000;;
+	       pConfigs[i].alphaMask = 0xFF000000;;
 	       if (accum) {
 		  pConfigs[i].accumRedSize = 16;
 		  pConfigs[i].accumGreenSize = 16;
@@ -516,6 +492,12 @@ I830DRIScreenInit(ScreenPtr pScreen)
    pDRIInfo->InitBuffers = I830DRIInitBuffers;
    pDRIInfo->MoveBuffers = I830DRIMoveBuffers;
    pDRIInfo->bufferRequests = DRI_ALL_WINDOWS;
+   pDRIInfo->OpenFullScreen = I830DRIOpenFullScreen;
+   pDRIInfo->CloseFullScreen = I830DRICloseFullScreen;
+   pDRIInfo->TransitionTo2d = I830DRITransitionTo2d;
+   pDRIInfo->TransitionTo3d = I830DRITransitionTo3d;
+   pDRIInfo->TransitionSingleToMulti3D = I830DRITransitionSingleToMulti3d;
+   pDRIInfo->TransitionMultiToSingle3D = I830DRITransitionMultiToSingle3d;
 
    if (!DRIScreenInit(pScreen, pDRIInfo, &pI830->drmSubFD)) {
       xf86DrvMsg(pScreen->myNum, X_ERROR,
@@ -531,7 +513,6 @@ I830DRIScreenInit(ScreenPtr pScreen)
    {
       drmVersionPtr version;
 
-#if defined(XFree86LOADER) || defined(HAVE_DRM_COMMAND)
       /* Check the DRM lib version.
        * drmGetLibVersion was not supported in version 1.0, so check for
        * symbol first to avoid possible crash or hang.
@@ -539,7 +520,6 @@ I830DRIScreenInit(ScreenPtr pScreen)
       if (xf86LoaderCheckSymbol("drmGetLibVersion")) {
 	 version = drmGetLibVersion(pI830->drmSubFD);
       } else
-#endif
       {
 	 /* drmlib version 1.0.0 didn't have the drmGetLibVersion
 	  * entry point.  Fake it by allocating a version record
@@ -552,11 +532,7 @@ I830DRIScreenInit(ScreenPtr pScreen)
       }
 
 #define REQ_MAJ 1
-#ifdef HAVE_DRM_COMMAND
 #define REQ_MIN 1
-#else
-#define REQ_MIN 0
-#endif
       if (version) {
 	 if (version->version_major != REQ_MAJ ||
 	     version->version_minor < REQ_MIN) {
@@ -578,11 +554,11 @@ I830DRIScreenInit(ScreenPtr pScreen)
       /* Check the i830 DRM version */
       version = drmGetVersion(pI830->drmSubFD);
       if (version) {
-	 if (version->version_major != 1 || version->version_minor < 2) {
+	 if (version->version_major != 1 || version->version_minor < 3) {
 	    /* incompatible drm version */
 	    xf86DrvMsg(pScreen->myNum, X_ERROR,
 		       "[dri] %s failed because of a version mismatch.\n"
-		       "[dri] i830.o kernel module version is %d.%d.%d but version 1.2 or greater is needed.\n"
+		       "[dri] i830.o kernel module version is %d.%d.%d but version 1.3 or greater is needed.\n"
 		       "[dri] Disabling DRI.\n",
 		       "I830DRIScreenInit",
 		       version->version_major,
@@ -591,6 +567,7 @@ I830DRIScreenInit(ScreenPtr pScreen)
 	    drmFreeVersion(version);
 	    return FALSE;
 	 }
+	 pI830->drmMinor = version->version_minor;
 	 drmFreeVersion(version);
       }
    }
@@ -709,6 +686,11 @@ I830DRIDoMappings(ScreenPtr pScreen)
 
    I830InitDma(pScrn);
 
+   if (pI830->PciInfo->chipType != PCI_CHIP_845_G &&
+       pI830->PciInfo->chipType != PCI_CHIP_I830_M) {
+      I830SetParam(pScrn, I830_SETPARAM_USE_MI_BATCHBUFFER_START, 1 );
+   }
+
    /* Okay now initialize the dma engine */
    if (!pI830DRI->irq) {
       pI830DRI->irq = drmGetInterruptFromBusID(pI830->drmSubFD,
@@ -729,6 +711,7 @@ I830DRIDoMappings(ScreenPtr pScreen)
 #endif
    }
 
+
    xf86DrvMsg(pScrn->scrnIndex, X_INFO,
 	      "[drm] dma control initialized, using IRQ %d\n", pI830DRI->irq);
 
@@ -774,9 +757,15 @@ I830DRICloseScreen(ScreenPtr pScreen)
 {
    ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
    I830Ptr pI830 = I830PTR(pScrn);
+   I830DRIPtr pI830DRI = (I830DRIPtr) pI830->pDRIInfo->devPrivate;
 
    DPRINTF(PFX, "I830DRICloseScreen\n");
 
+   if (pI830DRI->irq) {
+       drmCtlUninstHandler(pI830->drmSubFD);
+       pI830DRI->irq = 0;
+   }
+
    I830CleanupDma(pScrn);
 
    DRICloseScreen(pScreen);
@@ -813,10 +802,22 @@ Bool
 I830DRIFinishScreenInit(ScreenPtr pScreen)
 {
    I830SAREARec *sPriv = (I830SAREARec *) DRIGetSAREAPrivate(pScreen);
+   ScrnInfoPtr        pScrn = xf86Screens[pScreen->myNum];
+   I830Ptr pI830 = I830PTR(pScrn);
 
    DPRINTF(PFX, "I830DRIFinishScreenInit\n");
 
    memset(sPriv, 0, sizeof(sPriv));
+
+   /* Have shadow run only while there is 3d active.
+    */
+   if (pI830->allowPageFlip && pI830->drmMinor >= 3) {
+      shadowSetup(pScreen);
+      shadowAdd(pScreen, 0, I830DRIShadowUpdate, 0, 0, 0);
+   }
+   else
+      pI830->allowPageFlip = 0;
+
    return DRIFinishScreenInit(pScreen);
 }
 
@@ -896,7 +897,7 @@ I830DRIInitBuffers(WindowPtr pWin, RegionPtr prgn, CARD32 index)
 /* This routine is a modified form of XAADoBitBlt with the calls to
  * ScreenToScreenBitBlt built in. My routine has the prgnSrc as source
  * instead of destination. My origin is upside down so the ydir cases
- * are reversed. 
+ * are reversed.
  */
 static void
 I830DRIMoveBuffers(WindowPtr pParent, DDXPointRec ptOldOrg,
@@ -1058,7 +1059,7 @@ I830EmitInvarientState(ScrnInfoPtr pScrn)
    I830DRIPtr pI830DRI = (I830DRIPtr) pI830->pDRIInfo->devPrivate;
    CARD32 ctx_addr, temp;
 
-   BEGIN_LP_RING(128-4);
+   BEGIN_LP_RING(128-2);
 
    ctx_addr = pI830->ContextMem.Start;
    /* Align to a 2k boundry */
@@ -1274,6 +1275,7 @@ I830EmitInvarientState(ScrnInfoPtr pScrn)
 	    TEX_STREAM_COORD_SET(3) |
 	    ENABLE_TEX_STREAM_MAP_IDX | TEX_STREAM_MAP_IDX(3));
 
+#if 0
    OUT_RING(STATE3D_MAP_FILTER_CMD |
 	    MAP_UNIT(0) |
 	    ENABLE_CHROMA_KEY_PARAMS |
@@ -1380,6 +1382,7 @@ I830EmitInvarientState(ScrnInfoPtr pScrn)
 	    MAP_UNIT(3) |
 	    ENABLE_MAX_MIP_LVL |
 	    ENABLE_MIN_MIP_LVL | LOD_MAX(0) | LOD_MIN(0));
+#endif 
 
    OUT_RING(STATE3D_MAP_COORD_TRANSFORM);
    OUT_RING(DISABLE_TEX_TRANSFORM | TEXTURE_SET(0));
@@ -1477,6 +1480,191 @@ I830EmitInvarientState(ScrnInfoPtr pScrn)
    OUT_RING(MAGIC_W_STATE_DWORD1);
    OUT_RING(0x3f800000 /* 1.0 in IEEE float */ );
 
+#define GFX_OP_STIPPLE           ((0x3<<29)|(0x1d<<24)|(0x83<<16))
+
+   OUT_RING(GFX_OP_STIPPLE);
+   OUT_RING(0);
+
    ADVANCE_LP_RING();
 }
 
+/* Fullscreen hooks.  The DRI fullscreen mode can probably be removed
+ * as it adds little or nothing above the mechanism below.  (and isn't
+ * widely used)
+ */
+static Bool
+I830DRIOpenFullScreen(ScreenPtr pScreen)
+{
+  return TRUE;
+}
+
+static Bool
+I830DRICloseFullScreen(ScreenPtr pScreen)
+{
+  return TRUE;
+}
+
+
+
+/* Use callbacks from dri.c to support pageflipping mode for a single
+ * 3d context without need for any specific full-screen extension.
+ *
+ * Also see tdfx driver for example of using these callbacks to
+ * allocate and free 3d-specific memory on demand.
+ */
+
+
+
+
+
+/* Use the miext/shadow module to maintain a list of dirty rectangles.
+ * These are blitted to the back buffer to keep both buffers clean
+ * during page-flipping when the 3d application isn't fullscreen.
+ *
+ * Unlike most use of the shadow code, both buffers are in video
+ * memory.
+ *
+ * An alternative to this would be to organize for all on-screen
+ * drawing operations to be duplicated for the two buffers.  That
+ * might be faster, but seems like a lot more work...
+ */
+
+
+/* This should be done *before* XAA syncs,
+ * Otherwise will have to sync again???
+ */
+static void
+I830DRIShadowUpdate (ScreenPtr pScreen, shadowBufPtr pBuf)
+{
+   ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
+   I830Ptr pI830 = I830PTR(pScrn);
+   RegionPtr damage = &pBuf->damage;
+   int i, num =  REGION_NUM_RECTS(damage);
+   BoxPtr pbox = REGION_RECTS(damage);
+   I830SAREARec *pSAREAPriv = DRIGetSAREAPrivate(pScreen);
+   int cmd, br13;
+
+   /* Don't want to do this when no 3d is active and pages are
+    * right-way-round :
+    */
+   if (!pSAREAPriv->pf_active && pSAREAPriv->pf_current_page == 0)
+      return;
+
+   br13 = (pScrn->displayWidth * pI830->cpp) | (0xcc << 16);
+
+   if (pScrn->bitsPerPixel == 32) {
+      cmd = (XY_SRC_COPY_BLT_CMD | XY_SRC_COPY_BLT_WRITE_ALPHA |
+	     XY_SRC_COPY_BLT_WRITE_RGB);
+      br13 |= 3 << 24;
+   } else {
+      cmd = (XY_SRC_COPY_BLT_CMD);
+      br13 |= 1 << 24;
+   }
+
+   for (i = 0 ; i < num ; i++, pbox++) {
+      BEGIN_LP_RING(8);
+      OUT_RING(cmd);
+      OUT_RING(br13);
+      OUT_RING((pbox->y1 << 16) | pbox->x1);
+      OUT_RING((pbox->y2 << 16) | pbox->x2);
+      OUT_RING(pI830->BackBuffer.Start);
+      OUT_RING((pbox->y1 << 16) | pbox->x1);
+      OUT_RING(br13 & 0xffff);
+      OUT_RING(pI830->FrontBuffer.Start);
+      ADVANCE_LP_RING();
+   }
+}
+
+
+static void
+I830EnablePageFlip(ScreenPtr pScreen)
+{
+   ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
+   I830Ptr pI830 = I830PTR(pScrn);
+   I830SAREARec *pSAREAPriv = DRIGetSAREAPrivate(pScreen);
+
+   pSAREAPriv->pf_enabled = pI830->allowPageFlip;
+   pSAREAPriv->pf_active = 0;
+
+   if (pI830->allowPageFlip) {
+      int br13 = (pScrn->displayWidth * pI830->cpp) | (0xcc << 16);
+
+      BEGIN_LP_RING(8);
+      if (pScrn->bitsPerPixel == 32) {
+	 OUT_RING(XY_SRC_COPY_BLT_CMD | XY_SRC_COPY_BLT_WRITE_ALPHA |
+		  XY_SRC_COPY_BLT_WRITE_RGB);
+	 br13 |= 3 << 24;
+      } else {
+	 OUT_RING(XY_SRC_COPY_BLT_CMD);
+	 br13 |= 1 << 24;
+      }
+
+      OUT_RING(br13);
+      OUT_RING(0);
+      OUT_RING((pScrn->virtualY << 16) | pScrn->virtualX);
+      OUT_RING(pI830->BackBuffer.Start);
+      OUT_RING(0);
+      OUT_RING(br13 & 0xffff);
+      OUT_RING(pI830->FrontBuffer.Start);
+      ADVANCE_LP_RING();
+
+      pSAREAPriv->pf_active = 1;
+   }
+}
+
+static void
+I830DisablePageFlip(ScreenPtr pScreen)
+{
+   I830SAREARec *pSAREAPriv = DRIGetSAREAPrivate(pScreen);
+
+   pSAREAPriv->pf_active = 0;
+}
+
+
+static void
+I830DRITransitionSingleToMulti3d(ScreenPtr pScreen)
+{
+   /* Tell the clients not to pageflip.  How?
+    *   -- Field in sarea, plus bumping the window counters.
+    *   -- DRM needs to cope with Front-to-Back swapbuffers.
+    */
+   I830DisablePageFlip(pScreen);
+}
+
+static void
+I830DRITransitionMultiToSingle3d(ScreenPtr pScreen)
+{
+   /* Let the remaining 3d app start page flipping again.
+    */
+   I830EnablePageFlip(pScreen);
+}
+
+
+static void
+I830DRITransitionTo3d(ScreenPtr pScreen)
+{
+   ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
+   I830Ptr pI830 = I830PTR(pScrn);
+
+   I830EnablePageFlip(pScreen);
+   pI830->have3DWindows = 1;
+}
+
+
+static void
+I830DRITransitionTo2d(ScreenPtr pScreen)
+{
+   ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
+   I830Ptr pI830 = I830PTR(pScrn);
+   I830SAREARec *sPriv = (I830SAREARec *) DRIGetSAREAPrivate(pScreen);
+
+   /* Shut down shadowing if we've made it back to the front page:
+    */
+   if (sPriv->pf_current_page == 0) {
+      I830DisablePageFlip(pScreen);
+   }
+
+   pI830->have3DWindows = 0;
+}
+
+
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/i810/i830_dri.h b/xc/programs/Xserver/hw/xfree86/drivers/i810/i830_dri.h
index ae60a79eb..b60c72019 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/i810/i830_dri.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/i810/i830_dri.h
@@ -1,19 +1,15 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i830_dri.h,v 1.3 2002/09/11 00:29:32 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i830_dri.h,v 1.5 2002/12/10 01:27:05 dawes Exp $ */
 
 #ifndef _I830_DRI_H
 #define _I830_DRI_H
 
 #include "xf86drm.h"
-#ifdef HAVE_DRM_COMMAND
 #include "i830_common.h"
-#else
-#include "xf86drmI830.h"
-#endif
 
 #define I830_MAX_DRAWABLES 256
 
 #define I830_MAJOR_VERSION 1
-#define I830_MINOR_VERSION 0
+#define I830_MINOR_VERSION 3
 #define I830_PATCHLEVEL 0
 
 #define I830_REG_SIZE 0x80000
@@ -119,6 +115,32 @@ typedef struct _I830SAREA {
    int ctxOwner;			/* last context to upload state */
 
    int vertex_prim;
+
+   int pf_enabled;                  /* is pageflipping allowed? */
+   int pf_active;                   /* is pageflipping active right now? */
+   int pf_current_page; 	    /* which buffer is being displayed? */
+
+   int perf_boxes;             /* performance boxes to be displayed */
+
+   /* Here's the state for texunits 2,3:
+    */
+   unsigned int TexState2[I830_TEX_SETUP_SIZE];
+   unsigned int TexBlendState2[I830_TEXBLEND_SIZE];
+   unsigned int TexBlendStateWordsUsed2;
+
+   unsigned int TexState3[I830_TEX_SETUP_SIZE];
+   unsigned int TexBlendState3[I830_TEXBLEND_SIZE];
+   unsigned int TexBlendStateWordsUsed3;
+   
+   unsigned int StippleState[I830_STP_SETUP_SIZE];
 } I830SAREARec, *I830SAREAPtr;
 
+/* Flags for perf_boxes
+ */
+#define I830_BOX_RING_EMPTY    0x1 /* populated by kernel */
+#define I830_BOX_FLIP          0x2 /* populated by kernel */
+#define I830_BOX_WAIT          0x4 /* populated by kernel & client */
+#define I830_BOX_TEXTURE_LOAD  0x8 /* populated by kernel */
+#define I830_BOX_LOST_CONTEXT  0x10 /* populated by client */
+
 #endif
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/i810/i830_driver.c b/xc/programs/Xserver/hw/xfree86/drivers/i810/i830_driver.c
index ced137311..073f8eb6f 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/i810/i830_driver.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/i810/i830_driver.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i830_driver.c,v 1.17 2002/10/16 21:13:47 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i830_driver.c,v 1.27 2003/02/14 17:12:42 dawes Exp $ */
 /**************************************************************************
 
 Copyright 2001 VA Linux Systems Inc., Fremont, California.
@@ -105,6 +105,10 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
  */
 /*
  *    07/2002 David Dawes
+ *        - Add Intel(R) 855GM/852GM support.
+ */
+/*
+ *    07/2002 David Dawes
  *        - Cleanup code formatting.
  *        - Improve VESA mode selection, and fix refresh rate selection.
  *        - Don't duplicate functions provided in 4.2 vbe modules.
@@ -127,8 +131,15 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
  *    08/2002 Alan Hourihane and David Dawes
  *        - Add XVideo support.
  */
+/*
+ *    10/2002 David Dawes
+ *        - Add Intel(R) 865G support.
+ */
+
 
-#define DEBUG
+#ifndef PRINT_MODE_INFO
+#define PRINT_MODE_INFO 0
+#endif
 
 #include "xf86.h"
 #include "xf86_ansic.h"
@@ -163,12 +174,16 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 static SymTabRec I830BIOSChipsets[] = {
    {PCI_CHIP_I830_M,		"i830"},
    {PCI_CHIP_845_G,		"845G"},
+   {PCI_CHIP_I855_GM,		"852GM/855GM"},
+   {PCI_CHIP_I865_G,		"865G"},
    {-1,				NULL}
 };
 
 static PciChipsets I830BIOSPciChipsets[] = {
    {PCI_CHIP_I830_M,		PCI_CHIP_I830_M,	RES_SHARED_VGA},
    {PCI_CHIP_845_G,		PCI_CHIP_845_G,		RES_SHARED_VGA},
+   {PCI_CHIP_I855_GM,		PCI_CHIP_I855_GM,	RES_SHARED_VGA},
+   {PCI_CHIP_I865_G,		PCI_CHIP_I865_G,	RES_SHARED_VGA},
    {-1,				-1,			RES_UNDEFINED}
 };
 
@@ -183,18 +198,20 @@ typedef enum {
    OPTION_SW_CURSOR,
    OPTION_CACHE_LINES,
    OPTION_DRI,
+   OPTION_PAGEFLIP,
    OPTION_XVIDEO,
    OPTION_VIDEO_KEY,
    OPTION_COLOR_KEY,
    OPTION_STRETCH,
    OPTION_CENTER
 } I830Opts;
-   
+
 static OptionInfoRec I830BIOSOptions[] = {
    {OPTION_NOACCEL,	"NoAccel",	OPTV_BOOLEAN,	{0},	FALSE},
    {OPTION_SW_CURSOR,	"SWcursor",	OPTV_BOOLEAN,	{0},	FALSE},
    {OPTION_CACHE_LINES,	"CacheLines",	OPTV_INTEGER,	{0},	FALSE},
    {OPTION_DRI,		"DRI",		OPTV_BOOLEAN,	{0},	TRUE},
+   {OPTION_PAGEFLIP,	"PageFlip",	OPTV_BOOLEAN,	{0},	FALSE},
    {OPTION_XVIDEO,	"XVideo",	OPTV_BOOLEAN,	{0},	TRUE},
    {OPTION_COLOR_KEY,	"ColorKey",	OPTV_INTEGER,	{0},	FALSE},
    {OPTION_VIDEO_KEY,	"VideoKey",	OPTV_INTEGER,	{0},	FALSE},
@@ -219,8 +236,8 @@ static Bool OffsetFrame = FALSE;
 
 #ifdef I830DEBUG
 void
-DPRINTF_stub(const char *filename, int line, const char *function,
-	     const char *fmt, ...)
+I830DPRINTF_stub(const char *filename, int line, const char *function,
+		 const char *fmt, ...)
 {
    va_list ap;
 
@@ -234,8 +251,8 @@ DPRINTF_stub(const char *filename, int line, const char *function,
 }
 #else /* #ifdef I830DEBUG */
 void
-DPRINTF_stub(const char *filename, int line, const char *function,
-	     const char *fmt, ...)
+I830DPRINTF_stub(const char *filename, int line, const char *function,
+		 const char *fmt, ...)
 {
    /* do nothing */
 }
@@ -280,7 +297,6 @@ I830BIOSFreeRec(ScrnInfoPtr pScrn)
 
    pI830 = I830PTR(pScrn);
    mode = pScrn->modes;
-   pVesa = pI830->vesa;
 
    if (mode) {
       do {
@@ -296,14 +312,18 @@ I830BIOSFreeRec(ScrnInfoPtr pScrn)
       } while (mode && mode != pScrn->modes);
    }
 
-   if (pVesa->vbeInfo)
-      VBEFreeVBEInfo(pVesa->vbeInfo);
-   if (pVesa->pVbe)
-      vbeFree(pVesa->pVbe);
+   if (pI830->vbeInfo)
+      VBEFreeVBEInfo(pI830->vbeInfo);
+   if (pI830->pVbe)
+      vbeFree(pI830->pVbe);
+
+   pVesa = pI830->vesa;
    if (pVesa->monitor)
       xfree(pVesa->monitor);
    if (pVesa->savedPal)
       xfree(pVesa->savedPal);
+   xfree(pVesa);
+
    xfree(pScrn->driverPrivate);
    pScrn->driverPrivate = NULL;
 }
@@ -319,155 +339,497 @@ I830BIOSProbeDDC(ScrnInfoPtr pScrn, int index)
    ConfiguredMonitor = vbeDoEDID(pVbe, NULL);
 }
 
+/* Various extended video BIOS functions. */
+static const int refreshes[] = {
+   43, 56, 60, 70, 72, 75, 85, 100, 120
+};
+static const int nrefreshes = sizeof(refreshes) / sizeof(refreshes[0]);
+
 static Bool
-I830DetectDisplayDevice(ScrnInfoPtr pScrn)
+Check5fStatus(ScrnInfoPtr pScrn, int func, int ax)
 {
-   I830Ptr pI830;
-   vbeInfoPtr pVbe;
-   int pipe, n;
+   if (ax == 0x005f)
+      return TRUE;
+   else if (ax == 0x015f) {
+      xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+		 "Extended BIOS function 0x%04x failed.\n", func);
+      return FALSE;
+   } else if ((ax & 0xff) != 0x5f) {
+      xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+		 "Extended BIOS function 0x%04x not supported.\n", func);
+      return FALSE;
+   } else {
+      xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+		 "Extended BIOS function 0x%04x returns 0x%04x.\n",
+		 func, ax & 0xffff);
+      return FALSE;
+   }
+}
 
-   pI830 = I830PTR(pScrn);
-   pVbe = pI830->vesa->pVbe;
+#if 0
+static int
+BitToRefresh(int bits)
+{
+   int i;
+
+   for (i = 0; i < nrefreshes; i++)
+      if (bits & (1 << i))
+	 return refreshes[i];
+   return 0;
+}
+
+static int
+GetRefreshRate(ScrnInfoPtr pScrn, int mode, int refresh, int *availRefresh)
+{
+   vbeInfoPtr pVbe = I830PTR(pScrn)->pVbe;
+
+   DPRINTF(PFX, "GetRefreshRate\n");
+
+   /* Only 8-bit mode numbers are supported. */
+   if (mode & 0x100)
+      return 0;
+
+   pVbe->pInt10->num = 0x10;
+   pVbe->pInt10->ax = 0x5f05;
+   pVbe->pInt10->bx = (mode & 0xff) | 0x100;
+
+   xf86ExecX86int10_wrapper(pVbe->pInt10, pScrn);
+   if (Check5fStatus(pScrn, 0x5f05, pVbe->pInt10->ax)) {
+      if (availRefresh)
+         *availRefresh = pVbe->pInt10->bx;
+      return BitToRefresh(pVbe->pInt10->cx);
+   } else
+      return 0;
+}
+#endif
+
+static int
+SetRefreshRate(ScrnInfoPtr pScrn, int mode, int refresh)
+{
+   int i;
+   vbeInfoPtr pVbe = I830PTR(pScrn)->pVbe;
+
+   DPRINTF(PFX, "SetRefreshRate: mode 0x%x, refresh: %d\n", mode, refresh);
+
+   /* Only 8-bit mode numbers are supported. */
+   if (mode & 0x100)
+      return 0;
+
+   pVbe->pInt10->num = 0x10;
+   pVbe->pInt10->ax = 0x5f05;
+   pVbe->pInt10->bx = mode & 0xff;
+
+   for (i = nrefreshes - 1; i >= 0; i--) {
+      /*
+       * Look for the highest value that the requested (refresh + 2) is
+       * greater than or equal to.
+       */
+      if (refreshes[i] <= (refresh + 2))
+	 break;
+   }
+   /* i can be 0 if the requested refresh was higher than the max. */
+   if (i == 0) {
+      if (refresh >= refreshes[nrefreshes - 1])
+         i = nrefreshes - 1;
+   }
+   DPRINTF(PFX, "Setting refresh rate to %dHz for mode 0x%02x\n",
+	   refreshes[i], mode & 0xff);
+   pVbe->pInt10->cx = 1 << i;
+   xf86ExecX86int10_wrapper(pVbe->pInt10, pScrn);
+   if (Check5fStatus(pScrn, 0x5f05, pVbe->pInt10->ax))
+      return refreshes[i];
+   else
+      return 0;
+}
+
+static Bool
+GetModeSupport(ScrnInfoPtr pScrn, int modePipeA, int modePipeB,
+	       int devicesPipeA, int devicesPipeB, int *maxBandwidth,
+	       int *bandwidthPipeA, int *bandwidthPipeB)
+{
+   vbeInfoPtr pVbe = I830PTR(pScrn)->pVbe;
+
+   DPRINTF(PFX, "GetModeSupport: modes 0x%x, 0x%x, devices: 0x%x, 0x%x\n",
+	   modePipeA, modePipeB, devicesPipeA, devicesPipeB);
+
+   /* Only 8-bit mode numbers are supported. */
+   if ((modePipeA & 0x100) || (modePipeB & 0x100))
+      return 0;
+
+   pVbe->pInt10->num = 0x10;
+   pVbe->pInt10->ax = 0x5f28;
+   pVbe->pInt10->bx = (modePipeA & 0xff) | ((modePipeB & 0xff) << 8);
+   if ((devicesPipeA & 0x80) || (devicesPipeB & 0x80))
+      pVbe->pInt10->cx = 0x8000;
+   else
+      pVbe->pInt10->cx = (devicesPipeA & 0xff) | ((devicesPipeB & 0xff) << 8);
+
+   xf86ExecX86int10_wrapper(pVbe->pInt10, pScrn);
+   if (Check5fStatus(pScrn, 0x5f28, pVbe->pInt10->ax)) {
+      if (maxBandwidth)
+	 *maxBandwidth = pVbe->pInt10->cx;
+      if (bandwidthPipeA)
+	 *bandwidthPipeA = pVbe->pInt10->dx & 0xffff;
+      /* XXX For XFree86 4.2.0 and earlier, ->dx is truncated to 16 bits. */
+      if (bandwidthPipeB)
+	 *bandwidthPipeB = (pVbe->pInt10->dx >> 16) & 0xffff;
+      return TRUE;
+   } else
+      return FALSE;
+}
+
+static int
+GetLFPCompMode(ScrnInfoPtr pScrn)
+{
+   vbeInfoPtr pVbe = I830PTR(pScrn)->pVbe;
+
+   DPRINTF(PFX, "GetLFPCompMode\n");
+
+   pVbe->pInt10->num = 0x10;
+   pVbe->pInt10->ax = 0x5f61;
+   pVbe->pInt10->bx = 0x100;
+
+   xf86ExecX86int10_wrapper(pVbe->pInt10, pScrn);
+   if (Check5fStatus(pScrn, 0x5f61, pVbe->pInt10->ax))
+      return pVbe->pInt10->cx & 0xffff;
+   else
+      return -1;
+}
+
+#if 0
+static Bool
+SetLFPCompMode(ScrnInfoPtr pScrn, int compMode)
+{
+   vbeInfoPtr pVbe = I830PTR(pScrn)->pVbe;
+
+   DPRINTF(PFX, "SetLFPCompMode: compMode %d\n", compMode);
+
+   pVbe->pInt10->num = 0x10;
+   pVbe->pInt10->ax = 0x5f61;
+   pVbe->pInt10->bx = 0;
+   pVbe->pInt10->cx = compMode;
+
+   xf86ExecX86int10_wrapper(pVbe->pInt10, pScrn);
+   return Check5fStatus(pScrn, 0x5f61, pVbe->pInt10->ax);
+}
+#endif
+
+static int
+GetDisplayDevices(ScrnInfoPtr pScrn)
+{
+   I830Ptr pI830 = I830PTR(pScrn);
+   vbeInfoPtr pVbe = pI830->pVbe;
+
+   DPRINTF(PFX, "GetDisplayDevices\n");
+
+#if 0
+   {
+      CARD32 temp;
+      ErrorF("ADPA is 0x%08x\n", INREG(ADPA));
+      ErrorF("DVOA is 0x%08x\n", INREG(DVOA));
+      ErrorF("DVOB is 0x%08x\n", INREG(DVOB));
+      ErrorF("DVOC is 0x%08x\n", INREG(DVOC));
+      ErrorF("LVDS is 0x%08x\n", INREG(LVDS));
+      temp = INREG(DVOA_SRCDIM);
+      ErrorF("DVOA_SRCDIM is 0x%08x (%d x %d)\n", temp,
+	     (temp >> 12) & 0xfff, temp & 0xfff);
+      temp = INREG(DVOB_SRCDIM);
+      ErrorF("DVOB_SRCDIM is 0x%08x (%d x %d)\n", temp,
+	     (temp >> 12) & 0xfff, temp & 0xfff);
+      temp = INREG(DVOC_SRCDIM);
+      ErrorF("DVOC_SRCDIM is 0x%08x (%d x %d)\n", temp,
+	     (temp >> 12) & 0xfff, temp & 0xfff);
+      ErrorF("SWF0 is 0x%08x\n", INREG(SWF0));
+      ErrorF("SWF4 is 0x%08x\n", INREG(SWF4));
+   }
+#endif
 
    pVbe->pInt10->num = 0x10;
    pVbe->pInt10->ax = 0x5f64;
-   pVbe->pInt10->bx = 0x0100;
+   pVbe->pInt10->bx = 0x100;
+
    xf86ExecX86int10_wrapper(pVbe->pInt10, pScrn);
+   if (Check5fStatus(pScrn, 0x5f64, pVbe->pInt10->ax))
+      return pVbe->pInt10->cx & 0xffff;
+   else
+      return -1;
+}
 
-   if (pVbe->pInt10->ax != 0x005f) {
-      xf86DrvMsg(pScrn->scrnIndex, X_INFO,
-		 "Failed to detect active display devices\n");
+static Bool
+SetDisplayDevices(ScrnInfoPtr pScrn, int devices)
+{
+   I830Ptr pI830 = I830PTR(pScrn);
+   vbeInfoPtr pVbe = pI830->pVbe;
+   CARD32 temp;
+
+   DPRINTF(PFX, "SetDisplayDevices: devices 0x%x\n", devices);
+
+   pVbe->pInt10->num = 0x10;
+   pVbe->pInt10->ax = 0x5f64;
+   pVbe->pInt10->bx = 0x1;
+   pVbe->pInt10->cx = devices;
+
+   xf86ExecX86int10_wrapper(pVbe->pInt10, pScrn);
+   if (Check5fStatus(pScrn, 0x5f64, pVbe->pInt10->ax))
+      return TRUE;
+   else {
+      ErrorF("Writing config directly to SWF0\n");
+      temp = INREG(SWF0);
+      OUTREG(SWF0, (temp & ~(0xffff)) | (devices & 0xffff));
+      ErrorF("SetDisplayDevices failed.  devices is 0x%x instead of 0x%x\n",
+	     GetDisplayDevices(pScrn), devices);
       return FALSE;
    }
+}
 
-   pI830->configuredDevices = pVbe->pInt10->cx;
+#if 0
+static Bool
+GetDevicePresence(ScrnInfoPtr pScrn, Bool *required, int *attached,
+		  int *encoderPresent)
+{
+   vbeInfoPtr pVbe = I830PTR(pScrn)->pVbe;
 
-   /* Check for active devices on pipes A and B */
-   for (n = 0; n < 2; n++) {
-      int shift;
+   DPRINTF(PFX, "GetDevicePresence\n");
 
-      if (n == 0)
-	 shift = PIPE_A_SHIFT;
-      else
-	 shift = PIPE_B_SHIFT;
+   pVbe->pInt10->num = 0x10;
+   pVbe->pInt10->ax = 0x5f64;
+   pVbe->pInt10->bx = 0x200;
 
-      pipe = ((pVbe->pInt10->cx >> shift) & PIPE_ACTIVE_MASK);
-      if (pipe) {
-	 pI830->pipeEnabled[n] = TRUE;
-	 pI830->pipeDevices[n] = pipe;
-	 xf86DrvMsg(pScrn->scrnIndex, X_INFO,
-		    "Currently active displays on Pipe %c:\n", 'A' + n);
-	 if (pipe & PIPE_CRT_ACTIVE)
-	    xf86DrvMsg(pScrn->scrnIndex, X_INFO, "\tCRT\n");
+   xf86ExecX86int10_wrapper(pVbe->pInt10, pScrn);
+   if (Check5fStatus(pScrn, 0x5f64, pVbe->pInt10->ax)) {
+      if (required)
+	 *required = ((pVbe->pInt10->bx & 0x1) == 0);
+      if (attached)
+	 *attached = (pVbe->pInt10->cx >> 8) & 0xff;
+      if (encoderPresent)
+	 *encoderPresent = pVbe->pInt10->cx & 0xff;
+      return TRUE;
+   } else
+      return FALSE;
+}
+#endif
+
+static Bool
+GetDisplayInfo(ScrnInfoPtr pScrn, int device, Bool *attached, Bool *present,
+	       short *x, short *y)
+{
+   vbeInfoPtr pVbe = I830PTR(pScrn)->pVbe;
 
-	 if (pipe & PIPE_TV_ACTIVE)
-	    xf86DrvMsg(pScrn->scrnIndex, X_INFO, "\tTV child device\n");
+   DPRINTF(PFX, "GetDisplayInfo: device: 0x%x\n", device);
 
-	 if (pipe & PIPE_DFP_ACTIVE)
-	    xf86DrvMsg(pScrn->scrnIndex, X_INFO, "\tDFP child device\n");
+   switch (device & 0xff) {
+   case 0x01:
+   case 0x02:
+   case 0x04:
+   case 0x08:
+   case 0x10:
+   case 0x20:
+      break;
+   default:
+      xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+		 "GetDisplayInfo: invalid device: 0x%x\n", device & 0xff);
+      return FALSE;
+   }
 
-	 if (pipe & PIPE_LCD_ACTIVE)
-	    xf86DrvMsg(pScrn->scrnIndex, X_INFO,
-		       "\tLFP (Local Flat Panel) child device\n");
+   pVbe->pInt10->num = 0x10;
+   pVbe->pInt10->ax = 0x5f64;
+   pVbe->pInt10->bx = 0x300;
+   pVbe->pInt10->cx = device & 0xff;
+
+   xf86ExecX86int10_wrapper(pVbe->pInt10, pScrn);
+   if (Check5fStatus(pScrn, 0x5f64, pVbe->pInt10->ax)) {
+      if (attached)
+	 *attached = ((pVbe->pInt10->bx & 0x2) != 0);
+      if (present)
+	 *present = ((pVbe->pInt10->bx & 0x1) != 0);
+      if (pVbe->pInt10->cx != (device & 0xff)) {
+	 if (y) {
+	    *y = pVbe->pInt10->cx & 0xffff;
+	 }
+	 if (x) {
+	    *x = (pVbe->pInt10->cx >> 16) & 0xffff;
+	 }
+      }
+      return TRUE;
+   } else
+      return FALSE;
+}
+
+/*
+ * Returns a string matching the device corresponding to the first bit set
+ * in "device".  savedDevice is then set to device with that bit cleared.
+ * Subsequent calls with device == -1 will use savedDevice.
+ */
+
+static const char *displayDevices[] = {
+   "CRT",
+   "TV",
+   "DFP (digital flat panel)",
+   "LFP (local flat panel)",
+   "TV2 (second TV)",
+   "DFP2 (second digital flat panel)",
+   NULL
+};
+
+static const char *
+DeviceToString(int device)
+{
+   static int savedDevice = -1;
+   static int bit = 0;
+   const char *name;
+
+   if (device == -1) {
+      device = savedDevice;
+      bit = 0;
+   }
+
+   if (device == -1)
+      return NULL;
+
+   while (displayDevices[bit]) {
+      if (device & (1 << bit)) {
+	 name = displayDevices[bit];
+	 savedDevice = device & ~(1 << bit);
+	 bit++;
+	 return name;
+      }
+      bit++;
+   }
+   return NULL;
+}
+
+static void
+PrintDisplayDeviceInfo(ScrnInfoPtr pScrn)
+{
+   I830Ptr pI830 = I830PTR(pScrn);
+   int pipe, n;
+   int displays;
+
+   DPRINTF(PFX, "PrintDisplayDeviceInfo\n");
+
+   displays = pI830->configuredDevices;
+   if (displays == -1) {
+      xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+		 "No active display devices.\n");
+      return;
+   }
 
-	 if (pipe & PIPE_TV2_ACTIVE)
-	    xf86DrvMsg(pScrn->scrnIndex, X_INFO, "\tSecond TV child device\n");
+   /* Check for active devices connected to each display pipe. */
+   for (n = 0; n < pI830->availablePipes; n++) {
+      pipe = ((displays >> PIPE_SHIFT(n)) & PIPE_ACTIVE_MASK);
+      if (pipe) {
+	 const char *name;
 
-	 if (pipe & PIPE_DFP2_ACTIVE)
-	    xf86DrvMsg(pScrn->scrnIndex, X_INFO, "\tSecond DFP child device\n");
+	 xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+		    "Currently active displays on Pipe %c:\n", PIPE_NAME(n));
+	 name = DeviceToString(pipe);
+	 do {
+	    xf86DrvMsg(pScrn->scrnIndex, X_INFO, "\t%s\n", name);
+	    name = DeviceToString(-1);
+	 } while (name);
 
 	 if (pipe & PIPE_UNKNOWN_ACTIVE)
 	    xf86DrvMsg(pScrn->scrnIndex, X_INFO,
 		       "\tSome unknown display devices may also be present\n");
 
-	 /* If a non-CRT device is attached, get its resolution. */
-
-	 pI830->pipeDisplaySize[n].x1 = pI830->pipeDisplaySize[n].y1 = 0;
-	 pI830->pipeDisplaySize[n].x2 = pI830->pipeDisplaySize[n].y2 = 4096;
-	 if (pipe & ~PIPE_CRT_ACTIVE) {
-	    static const unsigned char devices[] = {
-	       PIPE_DFP_ACTIVE,
-	       PIPE_LCD_ACTIVE,
-	       PIPE_DFP2_ACTIVE
-	    };
-	    int numdevs = sizeof(devices) / sizeof(devices[0]);
-	    int i, x, y;
-
-	    for (i = 0; i < numdevs; i++) {
-	       if (!(pipe & devices[i]))
-		  continue;
-
-	       pVbe->pInt10->num = 0x10;
-	       pVbe->pInt10->ax = 0x5f64;
-	       pVbe->pInt10->bx = 0x0300;
-	       pVbe->pInt10->cx = devices[i] << shift;
-
-	       xf86ExecX86int10_wrapper(pVbe->pInt10, pScrn);
-
-	       if (pVbe->pInt10->ax != 0x005f) {
-		     xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
-				"Get Display Device failed for %c:0x%x\n",
-				'A' + n, devices[i]);
-	       } else {
-		  if (pVbe->pInt10->bx & 0x02) {
-		     x = (pVbe->pInt10->cx >> 16) & 0xffff;
-		     y = (pVbe->pInt10->cx & 0xffff);
-		     xf86DrvMsg(pScrn->scrnIndex, X_INFO,
-			     "Size of device %c:0x%x is %d x %d\n",
-			     'A' + n, devices[i], x, y);
-		     if (x < pI830->pipeDisplaySize[n].x2)
-			pI830->pipeDisplaySize[n].x2 = x;
-		     if (y < pI830->pipeDisplaySize[n].y2)
-			pI830->pipeDisplaySize[n].y2 = y;
-		  }
-	       }
-	    }
-	 }
       } else {
 	 xf86DrvMsg(pScrn->scrnIndex, X_INFO,
-		    "No active displays on Pipe %c.\n", 'A' + n);
+		    "No active displays on Pipe %c.\n", PIPE_NAME(n));
       }
 
-      if (pI830->pipeDisplaySize[n].x2 == 4096)
-	 pI830->pipeDisplaySize[n].x2 = 0;
-      if (pI830->pipeDisplaySize[n].y2 == 4096)
-	 pI830->pipeDisplaySize[n].y2 = 0;
-      /* It seems that only x might be reported, so pick the best y. */
-      if (pI830->pipeDisplaySize[n].x2 != 0 &&
-	  pI830->pipeDisplaySize[n].y2 == 0) {
-	 switch (pI830->pipeDisplaySize[n].x2) {
-	 case 1280:
-	    pI830->pipeDisplaySize[n].y2 = 1024;
-	    break;
-	 default:
-	    pI830->pipeDisplaySize[n].y2 =
-		pI830->pipeDisplaySize[n].x2 * 3 / 4;
-	    break;
-	 }
-      }
       if (pI830->pipeDisplaySize[n].x2 != 0) {
 	 xf86DrvMsg(pScrn->scrnIndex, X_INFO,
 		    "Lowest common panel size for pipe %c is %d x %d\n",
-		    'A' + n, pI830->pipeDisplaySize[n].x2,
+		    PIPE_NAME(n), pI830->pipeDisplaySize[n].x2,
 		    pI830->pipeDisplaySize[n].y2);
       } else if (pI830->pipeEnabled[n] && pipe & ~PIPE_CRT_ACTIVE) {
 	 xf86DrvMsg(pScrn->scrnIndex, X_INFO,
 		    "No display size information available for pipe %c.\n",
-		    'A' + n);
+		    PIPE_NAME(n));
+      }
+   }
+}
+
+static void
+GetPipeSizes(ScrnInfoPtr pScrn)
+{
+   I830Ptr pI830 = I830PTR(pScrn);
+   int pipe, n;
+   DisplayType i;
+
+   DPRINTF(PFX, "GetPipeSizes\n");
+
+
+   for (n = 0; n < pI830->availablePipes; n++) {
+      pipe = (pI830->configuredDevices >> PIPE_SHIFT(n)) & PIPE_ACTIVE_MASK;
+      pI830->pipeDisplaySize[n].x1 = pI830->pipeDisplaySize[n].y1 = 0;
+      pI830->pipeDisplaySize[n].x2 = pI830->pipeDisplaySize[n].y2 = 4096;
+      for (i = 0; i < NumKnownDisplayTypes; i++) {
+         if (pipe & (1 << i) & PIPE_SIZED_DISP_MASK) {
+	    if (pI830->displaySize[i].x2 != 0) {
+	       xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+		          "Size of device %s is %d x %d\n",
+		          displayDevices[i],
+		          pI830->displaySize[i].x2,
+		          pI830->displaySize[i].y2);
+	       if (pI830->displaySize[i].x2 < pI830->pipeDisplaySize[n].x2)
+	          pI830->pipeDisplaySize[n].x2 = pI830->displaySize[i].x2;
+	       if (pI830->displaySize[i].y2 < pI830->pipeDisplaySize[n].y2)
+	          pI830->pipeDisplaySize[n].y2 = pI830->displaySize[i].y2;
+	    }
+         }
       }
+
+      if (pI830->pipeDisplaySize[n].x2 == 4096)
+         pI830->pipeDisplaySize[n].x2 = 0;
+      if (pI830->pipeDisplaySize[n].y2 == 4096)
+         pI830->pipeDisplaySize[n].y2 = 0;
    }
+}
+
+static Bool
+I830DetectDisplayDevice(ScrnInfoPtr pScrn)
+{
+   I830Ptr pI830 = I830PTR(pScrn);
+   int pipe, n;
+   DisplayType i;
+
+   for (i = 0; i < NumKnownDisplayTypes; i++) {
+      if (GetDisplayInfo(pScrn, 1 << i, &pI830->displayAttached[i],
+			 &pI830->displayPresent[i],
+			 &pI830->displaySize[i].x2,
+			 &pI830->displaySize[i].y2)) {
+	 xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+		    "Display Info: %s: attached: %s, present: %s, size: "
+		    "(%d,%d)\n", displayDevices[i],
+		    BOOLTOSTRING(pI830->displayAttached[i]),
+		    BOOLTOSTRING(pI830->displayPresent[i]),
+		    pI830->displaySize[i].x2, pI830->displaySize[i].y2);
+      }
+   }
+
+   pI830->configuredDevices = GetDisplayDevices(pScrn);
+   if (pI830->configuredDevices == -1) {
+      xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+		 "Failed to detect active display devices\n");
+      return FALSE;
+   }
+
+   /* Check for active devices connected to each display pipe. */
+   for (n = 0; n < pI830->availablePipes; n++) {
+      pipe = ((pI830->configuredDevices >> PIPE_SHIFT(n)) & PIPE_ACTIVE_MASK);
+      if (pipe) {
+	 pI830->pipeEnabled[n] = TRUE;
+      }
+   }
+
+   GetPipeSizes(pScrn);
+   PrintDisplayDeviceInfo(pScrn);
 
 #if 0
    /* A quick hack to change the set of enabled devices. */
-   pI830->configuredDevices = PIPE_CRT_ACTIVE;
-   /* Turn on the configured displays */
-   pVbe->pInt10->num = 0x10;
-   pVbe->pInt10->ax = 0x5f64;
-   pVbe->pInt10->bx = 0x0001;
-   pVbe->pInt10->cx = (CARD16)pI830->configuredDevices;
-   xf86ExecX86int10_wrapper(pVbe->pInt10, pScrn);
-
-   if (pVbe->pInt10->ax != 0x005f) {
+   enabledDevices = PIPE_CRT_ACTIVE;
+   if (!SetDisplayDevices(pScrn, enabledDevices)) {
       xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
 		 "Failed to switch to configured display devices\n");
    }
@@ -479,19 +841,34 @@ I830DetectDisplayDevice(ScrnInfoPtr pScrn)
 static int
 I830DetectMemory(ScrnInfoPtr pScrn)
 {
-   I830Ptr pI830;
-   vbeInfoPtr pVbe;
+   I830Ptr pI830 = I830PTR(pScrn);
    PCITAG bridge;
    CARD16 gmch_ctrl;
    int memsize = 0;
-   int local = 0;
-
-   pI830 = I830PTR(pScrn);
-   pVbe = pI830->vesa->pVbe;
 
    bridge = pciTag(0, 0, 0);		/* This is always the host bridge */
    gmch_ctrl = pciReadWord(bridge, I830_GMCH_CTRL);
 
+   if (IS_I85X(pI830) || IS_I865G(pI830))
+   {
+      switch (gmch_ctrl & I830_GMCH_GMS_MASK) {
+      case I855_GMCH_GMS_STOLEN_1M:
+	 memsize = MB(1) - KB(132);
+	 break;
+      case I855_GMCH_GMS_STOLEN_4M:
+	 memsize = MB(4) - KB(132);
+	 break;
+      case I855_GMCH_GMS_STOLEN_8M:
+	 memsize = MB(8) - KB(132);
+	 break;
+      case I855_GMCH_GMS_STOLEN_16M:
+	 memsize = MB(16) - KB(132);
+	 break;
+      case I855_GMCH_GMS_STOLEN_32M:
+	 memsize = MB(32) - KB(132);
+	 break;
+      }
+   } else
    {
       switch (gmch_ctrl & I830_GMCH_GMS_MASK) {
       case I830_GMCH_GMS_STOLEN_512:
@@ -504,27 +881,15 @@ I830DetectMemory(ScrnInfoPtr pScrn)
 	 memsize = MB(8) - KB(132);
 	 break;
       case I830_GMCH_GMS_LOCAL:
-	 /*
-	  * I'd like to use the VGA controller registers here, but
-	  * MMIOBase isn't yet, so for now, we'll just use the
-	  * BIOS instead...
-	  */
-	 /*
-	  * XXX Local memory isn't really handled elsewhere.
-	  * is it valid for the 830 and/or 845G?
-	  */
-	 pVbe->pInt10->num = 0x10;
-	 pVbe->pInt10->ax = 0x5f10;
-	 xf86ExecX86int10_wrapper(pVbe->pInt10, pScrn);
-	 memsize = pVbe->pInt10->cx * KB(1);
-	 local = 1;
+	 memsize = 0;
+	 xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+		    "Local memory found, but won't be used.\n");
 	 break;
       }
    }
    if (memsize > 0) {
       xf86DrvMsg(pScrn->scrnIndex, X_INFO,
-		 "detected %dK %s memory.\n", memsize / 1024,
-		 local ? "local" : "stolen");
+		 "detected %d kB stolen memory.\n", memsize / 1024);
    } else {
       xf86DrvMsg(pScrn->scrnIndex, X_INFO, "no video memory detected.\n");
    }
@@ -596,61 +961,174 @@ I830UnmapMem(ScrnInfoPtr pScrn)
    return TRUE;
 }
 
+#ifndef HAVE_GET_PUT_BIOSMEMSIZE
+#define HAVE_GET_PUT_BIOSMEMSIZE 1
+#endif
+
+#if HAVE_GET_PUT_BIOSMEMSIZE
 /*
- * These three functions use a BIOS scratch register that holds the BIOS's
- * view of the (pre-reserved) memory size.
+ * Tell the BIOS how much video memory is available.  The BIOS call used
+ * here won't always be available.
  */
-static void
+static Bool
+PutBIOSMemSize(ScrnInfoPtr pScrn, int memSize)
+{
+   vbeInfoPtr pVbe = I830PTR(pScrn)->pVbe;
+
+   DPRINTF(PFX, "PutBIOSMemSize: %d kB\n", memSize / 1024);
+
+   pVbe->pInt10->num = 0x10;
+   pVbe->pInt10->ax = 0x5f11;
+   pVbe->pInt10->bx = 0;
+   pVbe->pInt10->cx = memSize / GTT_PAGE_SIZE;
+
+   xf86ExecX86int10_wrapper(pVbe->pInt10, pScrn);
+   return Check5fStatus(pScrn, 0x5f11, pVbe->pInt10->ax);
+}
+
+/*
+ * This reports what the previous VBEGetVBEInfo() found.  Be sure to call
+ * VBEGetVBEInfo() after changing the BIOS memory size view.  If
+ * a separate BIOS call is added for this, it can be put here.  Only
+ * return a valid value if the funtionality for PutBIOSMemSize()
+ * is available.
+ */
+static int
+GetBIOSMemSize(ScrnInfoPtr pScrn)
+{
+   I830Ptr pI830 = I830PTR(pScrn);
+   int memSize = KB(pI830->vbeInfo->TotalMemory * 64);
+
+   DPRINTF(PFX, "GetBIOSMemSize\n");
+
+   if (PutBIOSMemSize(pScrn, memSize))
+      return memSize;
+   else
+      return -1;
+}
+#endif
+
+/*
+ * These three functions allow the video BIOS's view of the available video
+ * memory to be changed.  This is currently implemented only for the 830
+ * and 845G, which can do this via a BIOS scratch register that holds the
+ * BIOS's view of the (pre-reserved) memory size.  If another mechanism
+ * is available in the future, it can be plugged in here.  
+ *
+ * The mapping used for the 830/845G scratch register's low 4 bits is:
+ *
+ *             320k => 0
+ *             832k => 1
+ *            8000k => 8
+ *
+ * The "unusual" values are the 512k, 1M, 8M pre-reserved memory, less
+ * overhead, rounded down to the BIOS-reported 64k granularity.
+ */
+
+static Bool
 SaveBIOSMemSize(ScrnInfoPtr pScrn)
 {
    I830Ptr pI830 = I830PTR(pScrn);
-   VESAPtr pVesa = pI830->vesa;
+
+   DPRINTF(PFX, "SaveBIOSMemSize\n");
+
+   pI830->useSWF1 = FALSE;
+
+#if HAVE_GET_PUT_BIOSMEMSIZE
+   if ((pI830->saveBIOSMemSize = GetBIOSMemSize(pScrn)) != -1)
+      return TRUE;
+#endif
 
    if (IS_I830(pI830) || IS_845G(pI830)) {
-      pVesa->saveSWF1 = INREG(SWF1) & 0x0f;
+      pI830->useSWF1 = TRUE;
+      pI830->saveSWF1 = INREG(SWF1) & 0x0f;
+
+      /*
+       * This is for sample purposes only.  pI830->saveBIOSMemSize isn't used
+       * when pI830->useSWF1 is TRUE.
+       */
+      switch (pI830->saveSWF1) {
+      case 0:
+	 pI830->saveBIOSMemSize = KB(320);
+	 break;
+      case 1:
+	 pI830->saveBIOSMemSize = KB(832);
+	 break;
+      case 8:
+	 pI830->saveBIOSMemSize = KB(8000);
+	 break;
+      default:
+	 pI830->saveBIOSMemSize = 0;
+	 break;
+      }
+      return TRUE;
    }
+   return FALSE;
 }
 
 static void
 RestoreBIOSMemSize(ScrnInfoPtr pScrn)
 {
    I830Ptr pI830 = I830PTR(pScrn);
-   VESAPtr pVesa = pI830->vesa;
-   Bool mapped = (pI830->MMIOBase != NULL);
    CARD32 swf1;
 
-   if (!pVesa || !pVesa->overrideBIOSMemSize)
+   DPRINTF(PFX, "RestoreBIOSMemSize\n");
+
+   if (!pI830->overrideBIOSMemSize)
       return;
 
-   if ((IS_I830(pI830) || IS_845G(pI830))) {
-      if (!mapped)
-	 I830MapMMIO(pScrn);
+#if HAVE_GET_PUT_BIOSMEMSIZE
+   if (!pI830->useSWF1) {
+      PutBIOSMemSize(pScrn, pI830->saveBIOSMemSize);
+      return;
+   }
+#endif
+
+   if ((IS_I830(pI830) || IS_845G(pI830)) && pI830->useSWF1) {
       swf1 = INREG(SWF1);
       swf1 &= ~0x0f;
-      swf1 |= (pVesa->saveSWF1 & 0x0f);
+      swf1 |= (pI830->saveSWF1 & 0x0f);
       OUTREG(SWF1, swf1);
-      if (!mapped)
-	 I830UnmapMMIO(pScrn);
    }
 }
 
 static void
-SetBIOSMemSize(ScrnInfoPtr pScrn)
+SetBIOSMemSize(ScrnInfoPtr pScrn, int newSize)
 {
    I830Ptr pI830 = I830PTR(pScrn);
-   VESAPtr pVesa = pI830->vesa;
-   Bool mapped = (pI830->MMIOBase != NULL);
    CARD32 swf1;
+   Bool mapped;
+
+   DPRINTF(PFX, "SetBIOSMemSize: %d kB\n", newSize / 1024);
 
-   if (!pVesa || !pVesa->overrideBIOSMemSize)
+   if (!pI830->overrideBIOSMemSize)
       return;
 
-   if (IS_I830(pI830) || IS_845G(pI830)) {
+#if HAVE_GET_PUT_BIOSMEMSIZE
+   if (!pI830->useSWF1) {
+      PutBIOSMemSize(pScrn, newSize);
+      return;
+   }
+#endif
+
+   if ((IS_I830(pI830) || IS_845G(pI830)) && pI830->useSWF1) {
+      CARD32 newSWF1;
+
+      /* Need MMIO access here. */
+      mapped = (pI830->MMIOBase != NULL);
       if (!mapped)
 	 I830MapMMIO(pScrn);
+
+      if (newSize <= KB(832))
+	 newSWF1 = 1;
+      else
+	 newSWF1 = 8;
+
       swf1 = INREG(SWF1);
+      xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Before: SWF1 is 0x%08x\n", swf1);
       swf1 &= ~0x0f;
-      swf1 |= (pVesa->newSWF1 & 0x0f);
+      swf1 |= (newSWF1 & 0x0f);
+      xf86DrvMsg(pScrn->scrnIndex, X_INFO, "After: SWF1 is 0x%08x\n", swf1);
       OUTREG(SWF1, swf1);
       if (!mapped)
 	 I830UnmapMMIO(pScrn);
@@ -705,7 +1183,15 @@ I830LoadPalette(ScrnInfoPtr pScrn, int numColors, int *indices,
 static void
 PreInitCleanup(ScrnInfoPtr pScrn)
 {
+   I830Ptr pI830 = I830PTR(pScrn);
+
    RestoreBIOSMemSize(pScrn);
+   if (pI830->swfSaved) {
+      OUTREG(SWF0, pI830->saveSWF0);
+      OUTREG(SWF4, pI830->saveSWF4);
+   }
+   if (pI830->MMIOBase)
+      I830UnmapMMIO(pScrn);
    I830BIOSFreeRec(pScrn);
 }
 
@@ -716,14 +1202,14 @@ I830BIOSPreInit(ScrnInfoPtr pScrn, int flags)
    I830Ptr pI830;
    MessageType from;
    rgb defaultWeight = { 0, 0, 0 };
-   VESAPtr pVesa;
    vbeInfoPtr pVbe;
-   DisplayModePtr p, *pp, tmp;
    EntityInfoPtr pEnt;
-   int mem;
+   int mem, memsize;
    int flags24;
-   int i = 0;
+   int i, n;
    pointer pDDCModule, pVBEModule;
+   Bool enable;
+   const char *chipname;
 
    if (pScrn->numEntities != 1)
       return FALSE;
@@ -817,19 +1303,56 @@ I830BIOSPreInit(ScrnInfoPtr pScrn, int flags)
    /* We have to use PIO to probe, because we haven't mapped yet. */
    I830SetPIOAccess(pI830);
 
-   pVesa = pI830->vesa;
-   pVesa->useDefaultRefresh = FALSE;
-
    /* Initialize VBE record */
-
-   if ((pVesa->pVbe = VBEInit(NULL, pI830->pEnt->index)) == NULL) {
+   if ((pI830->pVbe = VBEInit(NULL, pI830->pEnt->index)) == NULL) {
       xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "VBE initialization failed.\n");
       return FALSE;
    }
 
-   pVbe = pVesa->pVbe;
+   switch (pI830->PciInfo->chipType) {
+   case PCI_CHIP_I830_M:
+      chipname = "830M";
+      break;
+   case PCI_CHIP_845_G:
+      chipname = "845G";
+      break;
+   case PCI_CHIP_I855_GM:
+      /* Check capid register to find the chipset variant */
+      pI830->variant = (pciReadLong(pI830->PciTag, I85X_CAPID)
+				>> I85X_VARIANT_SHIFT) & I85X_VARIANT_MASK;
+      switch (pI830->variant) {
+      case I855_GM:
+	 chipname = "855GM";
+	 break;
+      case I855_GME:
+	 chipname = "855GME";
+	 break;
+      case I852_GM:
+	 chipname = "852GM";
+	 break;
+      case I852_GME:
+	 chipname = "852GME";
+	 break;
+      default:
+	 xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+		    "Unknown 852GM/855GM variant: 0x%x)\n", pI830->variant);
+	 chipname = "852GM/855GM (unknown variant)";
+	 break;
+      }
+      break;
+   case PCI_CHIP_I865_G:
+      chipname = "865G";
+      break;
+   default:
+      chipname = "unknown chipset";
+      break;
+   }
+   xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+	      "Integrated Graphics Chipset: Intel(R) %s\n", chipname);
+
+   pVbe = pI830->pVbe;
 
-   pVesa->vbeInfo = VBEGetVBEInfo(pVbe);
+   pI830->vbeInfo = VBEGetVBEInfo(pVbe);
 
    /* Set the Chipset and ChipRev, allowing config file entries to override. */
    if (pI830->pEnt->device->chipset && *pI830->pEnt->device->chipset) {
@@ -892,6 +1415,22 @@ I830BIOSPreInit(ScrnInfoPtr pScrn, int flags)
    xf86DrvMsg(pScrn->scrnIndex, from, "IO registers at addr 0x%lX\n",
 	      (unsigned long)pI830->MMIOAddr);
 
+   /* Some of the probing needs MMIO access, so map it here. */
+   I830MapMMIO(pScrn);
+
+#if 1
+   pI830->saveSWF0 = INREG(SWF0);
+   pI830->saveSWF4 = INREG(SWF4);
+   pI830->swfSaved = TRUE;
+
+   /* Set "extended desktop" */
+   OUTREG(SWF0, pI830->saveSWF0 | (1 << 21));
+
+   /* Set "driver loaded",  "OS unknown", "APM 1.2" */
+   OUTREG(SWF4, (pI830->saveSWF4 & ~((3 << 19) | (7 << 16))) |
+		(1 << 23) | (2 << 16));
+#endif
+
    if (IS_I830(pI830) || IS_845G(pI830)) {
       PCITAG bridge;
       CARD16 gmch_ctrl;
@@ -904,6 +1443,10 @@ I830BIOSPreInit(ScrnInfoPtr pScrn, int flags)
 	 pI830->FbMapSize = 0x4000000;
       }
    }
+   else {
+      /* 128MB aperture for later chips */
+      pI830->FbMapSize = 0x8000000;
+   }
 
    /*
     * Get the pre-allocated (stolen) memory size.
@@ -913,40 +1456,18 @@ I830BIOSPreInit(ScrnInfoPtr pScrn, int flags)
    pI830->StolenMemory.End = pI830->StolenMemory.Size;
 
    /* Sanity check: compare with what the BIOS thinks. */
-   if (pVesa->vbeInfo->TotalMemory != pI830->StolenMemory.Size / 1024 / 64) {
+   if (pI830->vbeInfo->TotalMemory != pI830->StolenMemory.Size / 1024 / 64) {
       xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
-		 "Detected stolen memory (%dKB) doesn't match what the BIOS"
-		 " reports (%dKB)\n",
-		 pI830->StolenMemory.Size / 1024 / 64 * 64,
-		 pVesa->vbeInfo->TotalMemory * 64);
-   }
-
-   /*
-    * The "VideoRam" config file parameter specifies the total amount of
-    * memory that will be used/allocated.  When agpgart support isn't
-    * available (StolenOnly == TRUE), this is limited to the amount of
-    * pre-allocated ("stolen") memory.
-    */
-
-   /*
-    * Default to I830_DEFAULT_VIDEOMEM (8192KB).
-    */
-   if (!pI830->pEnt->device->videoRam) {
-      from = X_DEFAULT;
-      pScrn->videoRam = I830_DEFAULT_VIDEOMEM;
-   } else {
-      from = X_CONFIG;
-      pScrn->videoRam = pI830->pEnt->device->videoRam;
+		 "Detected stolen memory (%d kB) doesn't match what the BIOS"
+		 " reports (%d kB)\n",
+		 ROUND_DOWN_TO(pI830->StolenMemory.Size / 1024, 64),
+		 pI830->vbeInfo->TotalMemory * 64);
    }
 
    /* Find the maximum amount of agpgart memory available. */
    mem = I830CheckAvailableMemory(pScrn);
    pI830->StolenOnly = FALSE;
 
-   DPRINTF(PFX,
-	   "Available memory: %dk\n"
-	   "Requested memory: %dk\n", mem, pScrn->videoRam);
-
    if (mem <= 0) {
       if (pI830->StolenMemory.Size <= 0) {
 	 /* Shouldn't happen. */
@@ -964,41 +1485,135 @@ I830BIOSPreInit(ScrnInfoPtr pScrn, int flags)
       mem = 0;
       pI830->StolenOnly = TRUE;
    }
+
+   if (xf86ReturnOptValBool(pI830->Options, OPTION_NOACCEL, FALSE)) {
+      pI830->noAccel = TRUE;
+   }
+   if (xf86ReturnOptValBool(pI830->Options, OPTION_SW_CURSOR, FALSE)) {
+      pI830->SWCursor = TRUE;
+   }
+
+   pI830->directRenderingDisabled =
+	!xf86ReturnOptValBool(pI830->Options, OPTION_DRI, TRUE);
+
+#ifdef XF86DRI
+   if (!pI830->directRenderingDisabled) {
+      if (pI830->noAccel || pI830->SWCursor) {
+	 xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "DRI is disabled because it "
+		    "needs HW cursor and 2D acceleration.\n");
+	 pI830->directRenderingDisabled = TRUE;
+      } else if (pScrn->depth != 16 && pScrn->depth != 24) {
+	 xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "DRI is disabled because it "
+		    "runs only at depths 16 and 24.\n");
+	 pI830->directRenderingDisabled = TRUE;
+      }
+   }
+#endif
+
+   /*
+    * The "VideoRam" config file parameter specifies the total amount of
+    * memory that will be used/allocated.  When agpgart support isn't
+    * available (StolenOnly == TRUE), this is limited to the amount of
+    * pre-allocated ("stolen") memory.
+    */
+
+   /*
+    * Default to I830_DEFAULT_VIDEOMEM_2D (8192KB) for 2D-only,
+    * or I830_DEFAULT_VIDEOMEM_3D (32768KB) for 3D.  If the stolen memory
+    * amount is higher, default to it rounded up to the nearest MB.  This
+    * guarantees that by default there will be at least some run-time
+    * space for things that need a physical address.
+    */
+   if (!pI830->pEnt->device->videoRam) {
+      from = X_DEFAULT;
+#ifdef XF86DRI
+      if (!pI830->directRenderingDisabled)
+	 pScrn->videoRam = I830_DEFAULT_VIDEOMEM_3D;
+      else
+#endif
+	 pScrn->videoRam = I830_DEFAULT_VIDEOMEM_2D;
+      if (pI830->StolenMemory.Size / 1024 > pScrn->videoRam)
+	 pScrn->videoRam = ROUND_TO(pI830->StolenMemory.Size / 1024, 1024);
+   } else {
+      from = X_CONFIG;
+      pScrn->videoRam = pI830->pEnt->device->videoRam;
+   }
+
+   DPRINTF(PFX,
+	   "Available memory: %dk\n"
+	   "Requested memory: %dk\n", mem, pScrn->videoRam);
+
+
    if (mem + (pI830->StolenMemory.Size / 1024) < pScrn->videoRam) {
       pScrn->videoRam = mem + (pI830->StolenMemory.Size / 1024);
       from = X_PROBED;
       if (mem + (pI830->StolenMemory.Size / 1024) <
 	  pI830->pEnt->device->videoRam) {
 	 xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
-		    "VideoRam reduced to %dK\n", pScrn->videoRam);
+		    "VideoRAM reduced to %d kByte "
+		    "(limited to available sysmem)\n", pScrn->videoRam);
       }
    }
+
+   if (pScrn->videoRam > pI830->FbMapSize / 1024) {
+      pScrn->videoRam = pI830->FbMapSize / 1024;
+      if (pI830->FbMapSize / 1024 < pI830->pEnt->device->videoRam)
+	 xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+		    "VideoRam reduced to %d kByte (limited to aperture size)\n",
+		    pScrn->videoRam);
+   }
+      
    if (mem > 0) {
       /*
        * If the reserved (BIOS accessible) memory is less than the desired
-       * mimimum, try to increase it.  We only know how to do this for the
-       * 845G (and 830?) so far.
+       * amount, try to increase it.  So far this is only implemented for
+       * the 845G and 830, but those details are handled in SetBIOSMemSize().
+       * 
+       * The BIOS-accessible amount is only important for setting video
+       * modes.  The maximum amount we try to set is limited to what would
+       * be enough for 1920x1440 with a 2048 pitch.
+       *
+       * If ALLOCATE_ALL_BIOSMEM is enabled in i830_memory.c, all of the
+       * BIOS-aware memory will get allocated.  If it isn't then it may
+       * not be, and in that case there is an assumption that the video
+       * BIOS won't attempt to access memory beyond what is needed for
+       * modes that are actually used.  ALLOCATE_ALL_BIOSMEM is enabled by
+       * default.
        */
-      if (IS_I830(pI830) || IS_845G(pI830)) {
-	 if (pVesa->vbeInfo->TotalMemory * 64 < pScrn->videoRam &&
-	     pVesa->vbeInfo->TotalMemory * 64 < I830_MINIMUM_VBIOS_MEM) {
-	    CARD32 swf1;
-
-	    I830MapMMIO(pScrn);
-	    SaveBIOSMemSize(pScrn);
-	    swf1 = INREG(SWF1);
-	    ErrorF("Before: SWF1 is 0x%08x\n", swf1);
-	    pVesa->newSWF1 = 0x08;
-	    pVesa->overrideBIOSMemSize = TRUE;
-	    SetBIOSMemSize(pScrn);
-	    swf1 = INREG(SWF1);
-	    ErrorF("After: SWF1 is 0x%08x\n", swf1);
-	    VBEFreeVBEInfo(pVesa->vbeInfo);
-	    vbeFree(pVesa->pVbe);
-	    pVesa->pVbe = VBEInit(NULL, pI830->pEnt->index);
-	    pVbe = pVesa->pVbe;
-	    pVesa->vbeInfo = VBEGetVBEInfo(pVbe);
-	    I830UnmapMMIO(pScrn);
+
+      /* Try to keep HW cursor and Overlay amounts separate from this. */
+      int reserve = (HWCURSOR_SIZE + OVERLAY_SIZE) / 1024;
+
+      if (pScrn->videoRam - reserve >= I830_MAXIMUM_VBIOS_MEM)
+	 pI830->newBIOSMemSize = KB(I830_MAXIMUM_VBIOS_MEM);
+      else 
+	 pI830->newBIOSMemSize =
+			KB(ROUND_DOWN_TO(pScrn->videoRam - reserve, 64));
+
+      if (pI830->vbeInfo->TotalMemory * 64 < pI830->newBIOSMemSize / 1024) {
+
+	 xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+		    "Will attempt to tell the BIOS that there is "
+		    "%d kB VideoRAM\n", pI830->newBIOSMemSize / 1024);
+
+	 if (SaveBIOSMemSize(pScrn)) {
+	    pI830->overrideBIOSMemSize = TRUE;
+	    SetBIOSMemSize(pScrn, pI830->newBIOSMemSize);
+
+	    VBEFreeVBEInfo(pI830->vbeInfo);
+	    vbeFree(pI830->pVbe);
+	    pI830->pVbe = VBEInit(NULL, pI830->pEnt->index);
+	    pVbe = pI830->pVbe;
+	    pI830->vbeInfo = VBEGetVBEInfo(pVbe);
+
+	    pI830->BIOSMemorySize = KB(pI830->vbeInfo->TotalMemory * 64);
+	    xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+		       "BIOS now sees %d kB VideoRAM\n",
+		       pI830->BIOSMemorySize / 1024);
+	 } else {
+	    xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+		       "BIOS view of memory size can't be changed "
+		       "(this is not an error).\n");
 	 }
       }
    }
@@ -1008,25 +1623,14 @@ I830BIOSPreInit(ScrnInfoPtr pScrn, int flags)
    xf86DrvMsg(pScrn->scrnIndex, from, "VideoRAM: %d kByte\n", pScrn->videoRam);
    pI830->TotalVideoRam = KB(pScrn->videoRam);
 
-   if (xf86ReturnOptValBool(pI830->Options, OPTION_NOACCEL, FALSE)) {
-      pI830->noAccel = TRUE;
-   }
-   if (xf86ReturnOptValBool(pI830->Options, OPTION_SW_CURSOR, FALSE)) {
-      pI830->SWCursor = TRUE;
-   }
-
-   pI830->directRenderingDisabled =
-	!xf86ReturnOptValBool(pI830->Options, OPTION_DRI, TRUE);
-
-#ifdef XF86DRI
-   if (!pI830->directRenderingDisabled) {
-      if (pI830->noAccel || pI830->SWCursor) {
-	 xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "DRI is disabled because it "
-		    "needs HW cursor and 2D acceleration.\n");
-	 pI830->directRenderingDisabled = TRUE;
-      }
+   /*
+    * If the requested videoRam amount is less than the stolen memory size,
+    * reduce the stolen memory size accordingly.
+    */
+   if (pI830->StolenMemory.Size > pI830->TotalVideoRam) {
+      pI830->StolenMemory.Size = pI830->TotalVideoRam;
+      pI830->StolenMemory.End = pI830->TotalVideoRam;
    }
-#endif
 
    if (xf86GetOptValInteger(pI830->Options, OPTION_CACHE_LINES,
 			    &(pI830->CacheLines))) {
@@ -1036,6 +1640,9 @@ I830BIOSPreInit(ScrnInfoPtr pScrn, int flags)
       pI830->CacheLines = -1;
    }
 
+   pI830->XvDisabled =
+	!xf86ReturnOptValBool(pI830->Options, OPTION_XVIDEO, TRUE);
+
 #ifdef I830_XV
    if (xf86GetOptValInteger(pI830->Options, OPTION_VIDEO_KEY,
 			    &(pI830->colorKey))) {
@@ -1053,7 +1660,16 @@ I830BIOSPreInit(ScrnInfoPtr pScrn, int flags)
    xf86DrvMsg(pScrn->scrnIndex, from, "video overlay key set to 0x%x\n",
 	      pI830->colorKey);
 #endif
-   
+
+   pI830->allowPageFlip = FALSE;
+   enable = xf86ReturnOptValBool(pI830->Options, OPTION_PAGEFLIP, FALSE);
+#ifdef XF86DRI
+   if (!pI830->directRenderingDisabled) {
+      pI830->allowPageFlip = enable;
+      xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "page flipping %s\n",
+		 enable ? "enabled" : "disabled");
+   }
+#endif
 
    /* Check if the HW cursor needs physical address. */
    if (IS_MOBILE(pI830))
@@ -1061,6 +1677,10 @@ I830BIOSPreInit(ScrnInfoPtr pScrn, int flags)
    else
       pI830->CursorNeedsPhysical = FALSE;
 
+   /* Force ring buffer to be in low memory for the 845G. */
+   if (IS_845G(pI830))
+      pI830->NeedRingBufferLow = TRUE;
+
    /*
     * XXX If we knew the pre-initialised GTT format for certain, we could
     * probably figure out the physical address even in the StolenOnly case.
@@ -1077,6 +1697,8 @@ I830BIOSPreInit(ScrnInfoPtr pScrn, int flags)
     */
    if (!pI830->SWCursor)
       pScrn->videoRam -= (HWCURSOR_SIZE / 1024);
+   if (!pI830->XvDisabled)
+      pScrn->videoRam -= (OVERLAY_SIZE / 1024);
    if (!pI830->noAccel) {
       pScrn->videoRam -= (PRIMARY_RINGBUFFER_SIZE / 1024);
       pScrn->videoRam -= (MIN_SCRATCH_BUFFER_SIZE / 1024);
@@ -1096,6 +1718,13 @@ I830BIOSPreInit(ScrnInfoPtr pScrn, int flags)
 	 return FALSE;
    }
 
+   if (IS_MOBILE(pI830))
+      pI830->availablePipes = 2;
+   else
+      pI830->availablePipes = 1;
+   xf86DrvMsg(pScrn->scrnIndex, X_INFO, "%d display pipe%s available.\n",
+	      pI830->availablePipes, pI830->availablePipes > 1 ? "s" : "");
+
    if (!I830DetectDisplayDevice(pScrn)) {
       xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
 		 "Couldn't detect display devices.\n");
@@ -1106,16 +1735,19 @@ I830BIOSPreInit(ScrnInfoPtr pScrn, int flags)
    if ((pDDCModule = xf86LoadSubModule(pScrn, "ddc")) == NULL) {
       PreInitCleanup(pScrn);
       return FALSE;
-   } else {
-      if ((pVesa->monitor = vbeDoEDID(pVbe, pDDCModule)) != NULL) {
-	 xf86PrintEDID(pVesa->monitor);
-      }
-      xf86UnloadSubModule(pDDCModule);
    }
 
+   if ((pI830->vesa->monitor = vbeDoEDID(pVbe, pDDCModule)) != NULL) {
+      xf86PrintEDID(pI830->vesa->monitor);
+   }
+   if ((pScrn->monitor->DDC = pI830->vesa->monitor) != NULL)
+      xf86SetDDCproperties(pScrn, pI830->vesa->monitor);
+   xf86UnloadSubModule(pDDCModule);
+
    /* XXX Move this to a header. */
 #define VIDEO_BIOS_SCRATCH 0x18
 
+#if 1
    /*
     * XXX This should be in ScreenInit/EnterVT.  PreInit should not leave the
     * state changed.
@@ -1132,28 +1764,29 @@ I830BIOSPreInit(ScrnInfoPtr pScrn, int flags)
 					 */
       pI830->writeControl(pI830, GRX, VIDEO_BIOS_SCRATCH, gr18);
    }
+#endif
 
-   if ((pScrn->monitor->DDC = pVesa->monitor) != NULL)
-      xf86SetDDCproperties(pScrn, pVesa->monitor);
-
-   for (i = 0; i < 2; i++) {
-      if (pI830->pipeDevices[i] & (PIPE_ACTIVE_MASK & ~PIPE_CRT_ACTIVE)) {
+   for (i = 0; i < pI830->availablePipes; i++) {
+      int pipe =
+	  (pI830->configuredDevices >> PIPE_SHIFT(i)) & PIPE_ACTIVE_MASK;
+      if (pipe & ~PIPE_CRT_ACTIVE) {
 	 xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
 		    "A non-CRT device is attached to pipe %c.\n"
 		    "\tNo refresh rate overrides will be attempted.\n",
-		    'A' + i);
-	 pVesa->useDefaultRefresh = TRUE;
+		    PIPE_NAME(i));
+	 pI830->vesa->useDefaultRefresh = TRUE;
       }
+      /*
+       * Some desktop platforms might not have 0x5f05, so useExtendedRefresh
+       * would need to be set to FALSE for those cases.
+       */
+      if (!pI830->vesa->useDefaultRefresh)
+	 pI830->useExtendedRefresh = TRUE;
    }
 
-   /*
-    * Some desktop platforms might not have 0x5f05.
-    */
-   pVesa->useExtendedRefresh = !pVesa->useDefaultRefresh;
-   if (pVesa->useExtendedRefresh) {
+   if (pI830->useExtendedRefresh) {
       xf86DrvMsg(pScrn->scrnIndex, X_INFO,
-		 "Will use BIOS call 0x5f05 to set non-default refresh "
-		 "rates.\n");
+		 "Will use BIOS call 0x5f05 to set refresh rates for CRTs.\n");
    }
 
    /*
@@ -1161,71 +1794,39 @@ I830BIOSPreInit(ScrnInfoPtr pScrn, int flags)
     * using 0x5f05, or when not overriding the default refresh rate.
     * Also, 0x5f64 doesn't work correctly in i830 platforms.
     */
-   pVesa->enableDisplays = !IS_I830(pI830) &&
-			   (pVesa->useDefaultRefresh ||
-			    pVesa->useExtendedRefresh);
-   if (pVesa->enableDisplays) {
+   pI830->enableDisplays = !IS_I830(pI830) && pI830->useExtendedRefresh;
+
+   if (pI830->enableDisplays) {
       xf86DrvMsg(pScrn->scrnIndex, X_INFO,
 		 "Will use BIOS call 0x5f64 to enable displays.\n");
    }
 
    /*
-    * XXX This code is different from the previous 830/845 code because
-    * it uses a new VBE module function (if present, or a local copy of
-    * it if not) to get the list of modes.  It then uses the 5f28 extended
-    * function as a final check if it's valid for the current display
-    * device.
+    * Limit videoram available for mode selection to what the video
+    * BIOS can see.
     */
+   if (pScrn->videoRam > (pI830->vbeInfo->TotalMemory * 64))
+      memsize = pI830->vbeInfo->TotalMemory * 64;
+   else
+      memsize = pScrn->videoRam;
+   xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+	      "Maximum space available for video modes: %d kByte\n", memsize);
 
    /*
-    * Note: VBE modes (> 0x7f) won't work with Intel's extended BIOS functions.
-    * For that reason it's important to set only V_MODETYPE_VGA in the
-    * flags for VBEGetModePool().
+    * Note: VBE modes (> 0x7f) won't work with Intel's extended BIOS
+    * functions.  For that reason it's important to set only
+    * V_MODETYPE_VGA in the flags for VBEGetModePool().
     */
-   pScrn->modePool = VBEGetModePool(pScrn, pVbe, pVesa->vbeInfo,
+   pScrn->modePool = VBEGetModePool(pScrn, pVbe, pI830->vbeInfo,
 				    V_MODETYPE_VGA);
 
-   if (pScrn->modePool == NULL) {
+   if (!pScrn->modePool) {
       xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
 		 "No Video BIOS modes for chosen depth.\n");
       PreInitCleanup(pScrn);
       return FALSE;
    }
 
-#if 1
-   pp = &(pScrn->modePool);
-   p = pScrn->modePool;
-   while (p) {
-      VbeModeInfoData *data = (VbeModeInfoData *) p->Private;
-
-      if (!(data->mode & 0x100)) {
-	 pVbe->pInt10->num = 0x10;
-	 pVbe->pInt10->ax = 0x5f28;
-	 pVbe->pInt10->bx = 0x8000 | (data->mode & 0x7f);
-	 pVbe->pInt10->cx = 0x8000;	/* Current display device */
-	 xf86ExecX86int10_wrapper(pVbe->pInt10, pScrn);
-      }
-      tmp = p->next;
-      if (!(data->mode & 0x100) && pVbe->pInt10->ax != 0x005f) {
-	 xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
-		    "BIOS mode %x is rejected by 0x5f28.\n", data->mode);
-	 xfree(p->Private);
-	 *pp = p->next;
-	 xfree(p);
-      } else {
-	 pp = &(p->next);
-      }
-      p = tmp;
-   }
-#endif
-
-   if (pScrn->modePool == NULL) {
-      xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-		 "No Video BIOS modes suitable for the display.\n");
-      PreInitCleanup(pScrn);
-      return FALSE;
-   }
-
    VBESetModeNames(pScrn->modePool);
 
    /*
@@ -1235,69 +1836,151 @@ I830BIOSPreInit(ScrnInfoPtr pScrn, int flags)
     * there's code in vesa/vesa.c.
     */
 
+   /* XXX Need to get relevant modes and virtual parameters. */
+   /* Do the mode validation without regard to special scanline pitches. */
+   n = VBEValidateModes(pScrn, NULL, pScrn->display->modes, NULL,
+			NULL, 0, MAX_DISPLAY_PITCH, 1,
+			0, MAX_DISPLAY_HEIGHT,
+			pScrn->display->virtualX,
+			pScrn->display->virtualY,
+			memsize, LOOKUP_BEST_REFRESH);
+   if (n <= 0) {
+      xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "No valid modes.\n");
+      PreInitCleanup(pScrn);
+      return FALSE;
+   }
+
+   xf86PruneDriverModes(pScrn);
+
+   pScrn->currentMode = pScrn->modes;
+
+   if (pScrn->modes == NULL) {
+      xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "No modes.\n");
+      PreInitCleanup(pScrn);
+      return FALSE;
+   }
+
 #ifndef USE_PITCHES
-#define USE_PITCHES 0
+#define USE_PITCHES 1
 #endif
 
-   {
-#if USE_PITCHES
+   /*
+    * If DRI is potentially usable, check if there is enough memory available
+    * for it, and if there's also enough to allow tiling to be enabled.
+    */
+#if defined(XF86DRI)
+   if (!pI830->directRenderingDisabled) {
+      int savedDisplayWidth = pScrn->displayWidth;
+      int memNeeded = 0;
       /* Good pitches to allow tiling.  Don't care about pitches < 256. */
-      int i830_pitches[] = {
+      static const int pitches[] = {
 	 128 * 2,
 	 128 * 4,
 	 128 * 8,
 	 128 * 16,
+	 128 * 32,
+	 128 * 64,
 	 0
-      };   
-#endif
+      };
 
-      int memsize;
-      int *linePitches = NULL;
+#ifdef I830_XV
+      /*
+       * Set this so that the overlay allocation is factored in when
+       * appropriate.
+       */
+      pI830->XvEnabled = !pI830->XvDisabled;
+#endif
 
-#if USE_PITCHES && defined(XF86DRI)
-      if (!pI830->directRenderingDisabled)
-	 linePitches = i830_pitches;
+      for (i = 0; pitches[i] != 0; i++) {
+#if USE_PITCHES
+	 if (pitches[i] >= pScrn->displayWidth) {
+	    pScrn->displayWidth = pitches[i];
+	    break;
+	 }
+#else
+	 if (pitches[i] == pScrn->displayWidth)
+	    break;
 #endif
+      }
 
       /*
-       * Limit videoram available for mode selection to what the video
-       * BIOS can see.
+       * If the displayWidth is a tilable pitch, test if there's enough
+       * memory available to enable tiling.
        */
-      if (pScrn->videoRam > (pVesa->vbeInfo->TotalMemory * 64))
-	 memsize = pVesa->vbeInfo->TotalMemory * 64;
-      else
-	 memsize = pScrn->videoRam;
-      xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
-		 "Maximum space available for video modes: %d Kbyte\n",
-		 memsize);
-
-      i = VBEValidateModes(pScrn, NULL, pScrn->display->modes, NULL,
-			   linePitches, 0, MAX_DISPLAY_PITCH, 1,
-			   0, MAX_DISPLAY_HEIGHT,
-			   pScrn->display->virtualX,
-			   pScrn->display->virtualY,
-			   memsize, LOOKUP_BEST_REFRESH);
-   }
-
-   if (i <= 0) {
-      xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "No valid modes\n");
-      PreInitCleanup(pScrn);
-      return FALSE;
-   }
-
-   xf86PruneDriverModes(pScrn);
-
-   pScrn->currentMode = pScrn->modes;
-
-   if (pScrn->modes == NULL) {
-      xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "No modes\n");
-      PreInitCleanup(pScrn);
-      return FALSE;
+      if (pScrn->displayWidth == pitches[i]) {
+	 I830ResetAllocations(pScrn, 0);
+	 if (I830Allocate2DMemory(pScrn, ALLOCATE_DRY_RUN | ALLOC_INITIAL) &&
+	     I830Allocate3DMemory(pScrn, ALLOCATE_DRY_RUN)) {
+	    memNeeded = I830GetExcessMemoryAllocations(pScrn);
+	    if (memNeeded > 0 || pI830->MemoryAperture.Size < 0) {
+	       if (memNeeded > 0) {
+		  xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+			     "%d kBytes additional video memory is "
+			     "required to\n\tenable tiling mode for DRI.\n",
+			     (memNeeded + 1023) / 1024);
+	       }
+	       if (pI830->MemoryAperture.Size < 0) {
+		  xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+			     "Allocation with DRI tiling enabled would "
+			     "exceed the\n"
+			     "\tmemory aperture size (%d kB) by %d kB.\n"
+			     "\tReduce VideoRam amount to avoid this!\n",
+			     pI830->FbMapSize / 1024,
+			     -pI830->MemoryAperture.Size / 1024);
+	       }
+	       pScrn->displayWidth = savedDisplayWidth;
+	       pI830->allowPageFlip = FALSE;
+	    } else if (pScrn->displayWidth != savedDisplayWidth) {
+	       xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+			  "Increasing the scanline pitch to allow tiling mode "
+			  "(%d -> %d).\n",
+			  savedDisplayWidth, pScrn->displayWidth);
+	    }
+	 } else {
+	    memNeeded = 0;
+	    xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+		       "Unexpected dry run allocation failure (1).\n");
+	 }
+      }
+      if (memNeeded > 0 || pI830->MemoryAperture.Size < 0) {
+	 /*
+	  * Tiling can't be enabled.  Check if there's enough memory for DRI
+	  * without tiling.
+	  */
+	 I830ResetAllocations(pScrn, 0);
+	 if (I830Allocate2DMemory(pScrn, ALLOCATE_DRY_RUN | ALLOC_INITIAL) &&
+	     I830Allocate3DMemory(pScrn, ALLOCATE_DRY_RUN | ALLOC_NO_TILING)) {
+	    memNeeded = I830GetExcessMemoryAllocations(pScrn);
+	    if (memNeeded > 0 || pI830->MemoryAperture.Size < 0) {
+	       if (memNeeded > 0) {
+		  xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+			     "%d kBytes additional video memory is required "
+			     "to enable DRI.\n",
+			     (memNeeded + 1023) / 1024);
+	       }
+	       if (pI830->MemoryAperture.Size < 0) {
+		  xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+			     "Allocation with DRI enabled would "
+			     "exceed the\n"
+			     "\tmemory aperture size (%d kB) by %d kB.\n"
+			     "\tReduce VideoRam amount to avoid this!\n",
+			     pI830->FbMapSize / 1024,
+			     -pI830->MemoryAperture.Size / 1024);
+	       }
+	       pI830->directRenderingDisabled = TRUE;
+	       xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Disabling DRI.\n");
+	    }
+	 } else {
+	    xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+		       "Unexpected dry run allocation failure (2).\n");
+	 }
+      }
    }
+#endif
 
    VBEPrintModes(pScrn);
 
-   if (!pVesa->useDefaultRefresh) {
+   if (!pI830->vesa->useDefaultRefresh) {
       /*
        * This sets the parameters for the VBE modes according to the best
        * usable parameters from the Monitor sections modes (usually the
@@ -1311,6 +1994,13 @@ I830BIOSPreInit(ScrnInfoPtr pScrn, int flags)
    /* PreInit shouldn't leave any state changes, so restore this. */
    RestoreBIOSMemSize(pScrn);
 
+   /* Don't need MMIO access anymore. */
+   if (pI830->swfSaved) {
+      OUTREG(SWF0, pI830->saveSWF0);
+      OUTREG(SWF4, pI830->saveSWF4);
+   }
+   I830UnmapMMIO(pScrn);
+
    /* Set display resolution */
    xf86SetDpi(pScrn, 0, 0);
 
@@ -1343,9 +2033,19 @@ I830BIOSPreInit(ScrnInfoPtr pScrn, int flags)
    xf86SetOperatingState(resVgaIo, pI830->pEnt->index, ResUnusedOpr);
    xf86SetOperatingState(resVgaMem, pI830->pEnt->index, ResDisableOpr);
 
-   VBEFreeVBEInfo(pVesa->vbeInfo);
+   VBEFreeVBEInfo(pI830->vbeInfo);
    vbeFree(pVbe);
 
+#if defined(XF86DRI)
+   if (!pI830->directRenderingDisabled) {
+      if (!xf86LoadSubModule(pScrn, "shadow")) {
+	 PreInitCleanup(pScrn);
+	 return FALSE;
+      }
+      xf86LoaderReqSymLists(I810shadowSymbols, NULL);
+   }
+#endif
+
    return TRUE;
 }
 
@@ -1404,18 +2104,20 @@ CheckInheritedState(ScrnInfoPtr pScrn)
  * whoever gets control next should do.
  */
 static void
-ResetState(ScrnInfoPtr pScrn)
+ResetState(ScrnInfoPtr pScrn, Bool flush)
 {
    I830Ptr pI830 = I830PTR(pScrn);
    int i;
    unsigned long temp;
 
+   DPRINTF(PFX, "ResetState: flush is %s\n", BOOLTOSTRING(flush));
+
    /* Reset the fence registers to 0 */
    for (i = 0; i < 8; i++)
       OUTREG(FENCE + i * 4, 0);
 
    /* Flush the ring buffer (if enabled), then disable it. */
-   if (pI830->AccelInfoRec != NULL) {
+   if (pI830->AccelInfoRec != NULL && flush) {
       temp = INREG(LP_RING + RING_LEN);
       if (temp & 1) {
 	 I830RefreshRing(pScrn);
@@ -1438,6 +2140,8 @@ SetFenceRegs(ScrnInfoPtr pScrn)
    I830Ptr pI830 = I830PTR(pScrn);
    int i;
 
+   DPRINTF(PFX, "SetFenceRegs\n");
+
    for (i = 0; i < 8; i++) {
       OUTREG(FENCE + i * 4, pI830->ModeReg.Fence[i]);
       if (I810_DEBUG & DEBUG_VERBOSE_VGA)
@@ -1451,6 +2155,8 @@ SetRingRegs(ScrnInfoPtr pScrn)
    I830Ptr pI830 = I830PTR(pScrn);
    unsigned int itemp;
 
+   DPRINTF(PFX, "SetRingRegs\n");
+
    if (pI830->noAccel)
       return;
 
@@ -1479,6 +2185,7 @@ SetRingRegs(ScrnInfoPtr pScrn)
    itemp = (pI830->LpRing.mem.Size - 4096) & I830_RING_NR_PAGES;
    itemp |= (RING_NO_REPORT | RING_VALID);
    OUTREG(LP_RING + RING_LEN, itemp);
+   I830RefreshRing(pScrn);
 }
 
 /*
@@ -1491,6 +2198,7 @@ SetHWOperatingState(ScrnInfoPtr pScrn)
    I830Ptr pI830 = I830PTR(pScrn);
 
    DPRINTF(PFX, "SetHWOperatingState\n");
+
    if (!pI830->noAccel)
       SetRingRegs(pScrn);
    SetFenceRegs(pScrn);
@@ -1502,14 +2210,25 @@ static Bool
 SaveHWState(ScrnInfoPtr pScrn)
 {
    I830Ptr pI830 = I830PTR(pScrn);
-   VESAPtr pVesa = pI830->vesa;
-   vbeInfoPtr pVbe = pVesa->pVbe;
+   vbeInfoPtr pVbe = pI830->pVbe;
    vgaHWPtr hwp = VGAHWPTR(pScrn);
    vgaRegPtr vgaReg = &hwp->SavedReg;
+   VbeModeInfoBlock *modeInfo;
+   VESAPtr pVesa;
 
    DPRINTF(PFX, "SaveHWState\n");
+
+   pVesa = pI830->vesa;
    /* Make sure we save at least this information in case of failure. */
-   VBEGetVBEMode(pVesa->pVbe, &pVesa->stateMode);
+   VBEGetVBEMode(pVbe, &pVesa->stateMode);
+   modeInfo = VBEGetModeInfo(pVbe, pVesa->stateMode);
+   pVesa->savedScanlinePitch = 0;
+   if (modeInfo) {
+      if (VBE_MODE_GRAPHICS(modeInfo)) {
+         VBEGetLogicalScanline(pVbe, &pVesa->savedScanlinePitch, NULL, NULL);
+      }
+      VBEFreeModeInfo(modeInfo);
+   }
 
    vgaHWUnlock(hwp);
    vgaHWSave(pScrn, vgaReg, VGA_SR_FONTS);
@@ -1517,23 +2236,42 @@ SaveHWState(ScrnInfoPtr pScrn)
 #ifndef I845G_VBE_WORKAROUND
 #define I845G_VBE_WORKAROUND 1
 #endif
+
+   pVesa = pI830->vesa;
    /* This save/restore method doesn't work for 845G BIOS */
-   /* XXX If it's fixed in production versions, this could be removed. */
+   /*
+    * XXX If it's fixed in production versions, this could be removed.
+    *
+    * KW: This may have been because of the behaviour I've found on my
+    * board: The 'save' command actually modifies the interrupt
+    * registers, turning off the irq & breaking the kernel module
+    * behaviour.
+    */
    if (!I845G_VBE_WORKAROUND || !IS_845G(pI830)) {
+      CARD16 imr = INREG16(IMR);
+      CARD16 ier = INREG16(IER);
+      CARD16 hwstam = INREG16(HWSTAM);
+
       if (!VBESaveRestore(pVbe, MODE_SAVE, &pVesa->state, &pVesa->stateSize,
 			  &pVesa->statePage)) {
 	 xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-		    "SaveHWState: VBESaveRestore(MODE_SAVE) failed\n");
+		    "SaveHWState: VBESaveRestore(MODE_SAVE) failed.\n");
 	 return FALSE;
       }
+
+      OUTREG16(IMR, imr);
+      OUTREG16(IER, ier);
+      OUTREG16(HWSTAM, hwstam);
    }
+
    pVesa->savedPal = VBESetGetPaletteData(pVbe, FALSE, 0, 256,
-					  NULL, FALSE, FALSE);
+					     NULL, FALSE, FALSE);
    if (!pVesa->savedPal) {
       xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-		 "SaveHWState: VBESetGetPaletteData(GET) failed\n");
+		 "SaveHWState: VBESetGetPaletteData(GET) failed.\n");
       return FALSE;
    }
+
    return TRUE;
 }
 
@@ -1541,14 +2279,47 @@ static Bool
 RestoreHWState(ScrnInfoPtr pScrn)
 {
    I830Ptr pI830 = I830PTR(pScrn);
-   VESAPtr pVesa = pI830->vesa;
-   vbeInfoPtr pVbe = pVesa->pVbe;
+   vbeInfoPtr pVbe = pI830->pVbe;
    vgaHWPtr hwp = VGAHWPTR(pScrn);
    vgaRegPtr vgaReg = &hwp->SavedReg;
+   VESAPtr pVesa;
    Bool restored = FALSE;
 
    DPRINTF(PFX, "RestoreHWState\n");
+
+   pVesa = pI830->vesa;
+
+   /*
+    * Workaround for text mode restoration with some flat panels.
+    * Temporarily program a 640x480 mode before switching back to
+    * text mode.
+    */
+   if (pVesa->useDefaultRefresh) {
+      int mode = 0;
+
+      switch (pScrn->depth) {
+      case 8:
+	 mode = 0x30;
+	 break;
+      case 15:
+	 mode = 0x40;
+	 break;
+      case 16:
+	 mode = 0x41;
+	 break;
+      case 24:
+	 mode = 0x50;
+	 break;
+      }
+      mode |= (1 << 15) | (1 << 14);
+      I830VESASetVBEMode(pScrn, mode, NULL);
+   }
+
    if (pVesa->state && pVesa->stateSize) {
+      CARD16 imr = INREG16(IMR);
+      CARD16 ier = INREG16(IER);
+      CARD16 hwstam = INREG16(HWSTAM);
+
       /* Make a copy of the state.  Don't rely on it not being touched. */
       if (!pVesa->pstate) {
 	 pVesa->pstate = xalloc(pVesa->stateSize);
@@ -1556,14 +2327,18 @@ RestoreHWState(ScrnInfoPtr pScrn)
 	    memcpy(pVesa->pstate, pVesa->state, pVesa->stateSize);
       }
       restored = VBESaveRestore(pVbe, MODE_RESTORE, &pVesa->state,
-				&pVesa->stateSize, &pVesa->statePage);
+				   &pVesa->stateSize, &pVesa->statePage);
       if (!restored) {
 	 xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
-		    "RestoreHWState: VBESaveRestore failed\n");
+		    "RestoreHWState: VBESaveRestore failed.\n");
       }
       /* Copy back */
       if (pVesa->pstate)
 	 memcpy(pVesa->state, pVesa->pstate, pVesa->stateSize);
+
+      OUTREG16(IMR, imr);
+      OUTREG16(IER, ier);
+      OUTREG16(HWSTAM, hwstam);
    }
    /* If that failed, restore the original mode. */
    if (!restored) {
@@ -1572,6 +2347,8 @@ RestoreHWState(ScrnInfoPtr pScrn)
 		 "the saved state\n");
       I830VESASetVBEMode(pScrn, pVesa->stateMode, NULL);
    }
+   if (pVesa->savedScanlinePitch)
+       VBESetLogicalScanline(pVbe, pVesa->savedScanlinePitch);
 
    if (pVesa->savedPal)
       VBESetGetPaletteData(pVbe, TRUE, 0, 256, pVesa->savedPal, FALSE, TRUE);
@@ -1581,63 +2358,48 @@ RestoreHWState(ScrnInfoPtr pScrn)
    return TRUE;
 }
 
+#ifndef USE_VBE
+#define USE_VBE 1
+#endif
+
 static Bool
 I830VESASetVBEMode(ScrnInfoPtr pScrn, int mode, VbeCRTCInfoBlock * block)
 {
-   I830Ptr pI830;
-   Bool ret;
-
-#ifdef DEBUGSWF
-   CARD32 swf, offset;
-#endif
+   I830Ptr pI830 = I830PTR(pScrn);
 
-   pI830 = I830PTR(pScrn);
-#ifdef DEBUGSWF
-   for (offset = SWF00; offset <= SWF06; offset += 4) {
-      swf = INREG(offset);
-      ErrorF("SWF0%d is 0x%08x\n", (offset - SWF00) / 4, swf);
-   }
-   for (offset = SWF10; offset <= SWF16; offset += 4) {
-      swf = INREG(offset);
-      ErrorF("SWF1%d is 0x%08x\n", (offset - SWF10) / 4, swf);
-   }
-   for (offset = SWF30; offset <= SWF32; offset += 4) {
-      swf = INREG(offset);
-      ErrorF("SWF3%d is 0x%08x\n", (offset - SWF30) / 4, swf);
-   }
-#endif
    DPRINTF(PFX, "Setting mode 0x%.8x\n", mode);
-   ret = VBESetVBEMode(pI830->vesa->pVbe, mode, block);
-#ifdef DEBUGSWF
-   for (offset = SWF00; offset <= SWF06; offset += 4) {
-      swf = INREG(offset);
-      ErrorF("SWF0%d is 0x%08x\n", (offset - SWF00) / 4, swf);
-   }
-   for (offset = SWF10; offset <= SWF16; offset += 4) {
-      swf = INREG(offset);
-      ErrorF("SWF1%d is 0x%08x\n", (offset - SWF10) / 4, swf);
-   }
-   for (offset = SWF30; offset <= SWF32; offset += 4) {
-      swf = INREG(offset);
-      ErrorF("SWF3%d is 0x%08x\n", (offset - SWF30) / 4, swf);
+#if USE_VBE
+   return VBESetVBEMode(pI830->pVbe, mode, block);
+#else
+   {
+      vbeInfoPtr pVbe = pI830->pVbe;
+      pVbe->pInt10->num = 0x10;
+      pVbe->pInt10->ax = 0x80 | (mode & 0x7f);
+      xf86ExecX86int10_wrapper(pVbe->pInt10, pScrn);
+      pVbe->pInt10->ax = 0x0f00;
+      xf86ExecX86int10_wrapper(pVbe->pInt10, pScrn);
+      if ((pVbe->pInt10->ax & 0x7f) == (mode & 0x7f))
+	 return TRUE;
+      else
+	 return FALSE;
    }
 #endif
-   return ret;
 }
 
 static Bool
 I830VESASetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode)
 {
-   I830Ptr pI830;
-   VESAPtr pVesa;
-   vbeInfoPtr pVbe;
+   I830Ptr pI830 = I830PTR(pScrn);
+   vbeInfoPtr pVbe = pI830->pVbe;
    VbeModeInfoData *data;
-   int mode;
+   int mode, i;
    CARD32 planeA, planeB, temp;
+   int refresh = 60;
+#ifdef XF86DRI
+   Bool didLock = FALSE;
+#endif
 
-   pI830 = I830PTR(pScrn);
-   pVesa = pI830->vesa;
-   pVbe = pI830->vesa->pVbe;
+   DPRINTF(PFX, "I830VESASetMode\n");
 
    data = (VbeModeInfoData *) pMode->Private;
 
@@ -1645,9 +2407,10 @@ I830VESASetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode)
    mode = data->mode | (1 << 15) | (1 << 14);
 
 #ifdef XF86DRI
-   if (pI830->directRenderingEnabled) {
+   if (pI830->directRenderingEnabled && !pI830->LockHeld) {
       DRILock(screenInfo.screens[pScrn->scrnIndex], 0);
       pI830->LockHeld = 1;
+      didLock = TRUE;
    }
 #endif
 
@@ -1655,33 +2418,19 @@ I830VESASetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode)
 #define MODESWITCH_RESET_STATE 0
 #endif
 #if MODESWITCH_RESET_STATE
-   ResetState(pScrn);
+   ResetState(pScrn, TRUE);
 #endif
 
    /* XXX Add macros for the various mode parameter bits. */
 
-   if (pVesa->useDefaultRefresh)
+   if (pI830->vesa->useDefaultRefresh)
       mode &= ~(1 << 11);
 
-#if 0
-   /* Turn on the configured displays */
-   pVbe->pInt10->num = 0x10;
-   pVbe->pInt10->ax = 0x5f64;
-   pVbe->pInt10->bx = 0x0001;
-   pVbe->pInt10->cx = (CARD16)pI830->configuredDevices;
-   xf86ExecX86int10_wrapper(pVbe->pInt10, pScrn);
-
-   if (pVbe->pInt10->ax != 0x005f) {
-      xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
-		 "Failed to switch to configured display devices\n");
-   }
-#endif
-
    if (I830VESASetVBEMode(pScrn, mode, data->block) == FALSE) {
       if ((data->block && (mode & (1 << 11))) &&
 	  I830VESASetVBEMode(pScrn, (mode & ~(1 << 11)), NULL) == TRUE) {
 	 xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
-		    "Set VBE Mode rejected this modeline. "
+		    "Set VBE Mode rejected this modeline.\n\t"
 		    "Trying standard mode instead!\n");
 	 DPRINTF(PFX, "OOPS!\n");
 	 xfree(data->block);
@@ -1693,13 +2442,20 @@ I830VESASetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode)
       }
    }
 
+   /*
+    * The BIOS may not set a scanline pitch that would require more video
+    * memory than it's aware of.  We check for this later, and set it
+    * explicitly if necessary.
+    */
    if (data->data->XResolution != pScrn->displayWidth)
       VBESetLogicalScanline(pVbe, pScrn->displayWidth);
 
-   if (pScrn->bitsPerPixel >= 8 && pVesa->vbeInfo->Capabilities[0] & 0x01)
+   if (pScrn->bitsPerPixel >= 8 && pI830->vbeInfo->Capabilities[0] & 0x01)
       VBESetGetDACPaletteFormat(pVbe, 8);
 
    /*
+    * XXX This location of this isn't correct.
+    *
     * Turn on the configured displays.  This has the effect of resetting
     * the default refresh rates to values that the configured displays
     * can handle.  This seems to be the safest way to make sure that this
@@ -1710,14 +2466,8 @@ I830VESASetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode)
     *
     * XXX Need to test an 830 with a LFP.
     */
-   if (pVesa->enableDisplays) {
-      pVbe->pInt10->num = 0x10;
-      pVbe->pInt10->ax = 0x5f64;
-      pVbe->pInt10->bx = 0x0001;
-      pVbe->pInt10->cx = (CARD16)pI830->configuredDevices;
-      xf86ExecX86int10_wrapper(pVbe->pInt10, pScrn);
-
-      if (pVbe->pInt10->ax != 0x005f) {
+   if (pI830->enableDisplays) {
+      if (!SetDisplayDevices(pScrn, pI830->configuredDevices)) {
 	 xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
 		    "Failed to switch to configured display devices\n");
       }
@@ -1725,46 +2475,20 @@ I830VESASetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode)
 
    /*
     * When it's OK to set better than default refresh rates, set them here.
-    * NOTE: pVesa->useDefaultRefresh is used redundantly here and in some
-    * other places.  That redundancy may be removed one day.  For now,
-    * keep it to be safe.
     */
-   if (pVesa->useExtendedRefresh && !pVesa->useDefaultRefresh &&
+   if (pI830->useExtendedRefresh && !pI830->vesa->useDefaultRefresh &&
        (mode & (1 << 11)) && data && data->data && data->block) {
-      static const int refreshes[] = {
-	 43, 56, 60, 70, 72, 75, 85, 100, 120
-      };
-      int i, nrefreshes = sizeof(refreshes) / sizeof(refreshes[0]);
-
-      for (i = nrefreshes - 1; i >= 0; i--) {
-	 /*
-	  * Look for the highest value that the requested (refresh + 2) is
-	  * greater than or equal to.
-	  */
-	 if (refreshes[i] <= (data->block->RefreshRate / 100 + 2))
-	    break;
-      }
-      /* i can be 0 if the requested refresh was higher than the max. */
-      if (i == 0) {
-	 if (data->block->RefreshRate / 100 >= refreshes[nrefreshes - 1])
-	    i = nrefreshes - 1;
-      }
-      DPRINTF(PFX, "Setting refresh rate to %dHz for mode %d\n",
-	      refreshes[i], mode & 0xff);
-      pVbe->pInt10->num = 0x10;
-      pVbe->pInt10->ax = 0x5f05;
-      pVbe->pInt10->bx = mode & 0xff;
-      pVbe->pInt10->cx = 1 << i;
-      xf86ExecX86int10_wrapper(pVbe->pInt10, pScrn);
-
-      if (pVbe->pInt10->ax != 0x5f) {
+      refresh = SetRefreshRate(pScrn, mode, data->block->RefreshRate / 100);
+      if (!refresh) {
+	 refresh = 60;
 	 xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
 		    "Failed to set refresh rate to %dHz.\n",
-		    refreshes[i]);
+		    data->block->RefreshRate / 100);
       }
    }
 
 
+   /* XXX Fix plane A with pipe A, and plane B with pipe B. */
    planeA = INREG(DSPACNTR);
    planeB = INREG(DSPBCNTR);
 
@@ -1806,7 +2530,7 @@ I830VESASetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode)
 	 temp = INREG(DSPABASE);
 	 OUTREG(DSPABASE, temp);
       }
-      if (pI830->pipeEnabled[1]) {
+      if (pI830->planeEnabled[1]) {
 	 xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Enabling plane B.\n");
 	 planeB |= DISPLAY_PLANE_ENABLE;
 	 OUTREG(DSPBCNTR, planeB);
@@ -1828,13 +2552,87 @@ I830VESASetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode)
       xf86DrvMsg(pScrn->scrnIndex, X_INFO, "PIPEBCONF is 0x%08x\n", temp);
    }
 
+#if PRINT_MODE_INFO
+   /* Print out some CRTC/display information. */
+   temp = INREG(HTOTAL_A);
+   ErrorF("Horiz active: %d, Horiz total: %d\n", temp & 0x7ff,
+	  (temp >> 16) & 0xfff);
+   temp = INREG(HBLANK_A);
+   ErrorF("Horiz blank start: %d, Horiz blank end: %d\n", temp & 0xfff,
+	  (temp >> 16) & 0xfff);
+   temp = INREG(HSYNC_A);
+   ErrorF("Horiz sync start: %d, Horiz sync end: %d\n", temp & 0xfff,
+	  (temp >> 16) & 0xfff);
+   temp = INREG(VTOTAL_A);
+   ErrorF("Vert active: %d, Vert total: %d\n", temp & 0x7ff,
+	  (temp >> 16) & 0xfff);
+   temp = INREG(VBLANK_A);
+   ErrorF("Vert blank start: %d, Vert blank end: %d\n", temp & 0xfff,
+	  (temp >> 16) & 0xfff);
+   temp = INREG(VSYNC_A);
+   ErrorF("Vert sync start: %d, Vert sync end: %d\n", temp & 0xfff,
+	  (temp >> 16) & 0xfff);
+   temp = INREG(PIPEASRC);
+   ErrorF("Image size: %dx%d (%dx%d)\n",
+          (temp >> 16) & 0x7ff, temp & 0x7ff,
+	  (((temp >> 16) & 0x7ff) + 1), ((temp & 0x7ff) + 1));
+   ErrorF("Pixel multiply is %d\n", (planeA >> 20) & 0x3);
+   temp = INREG(DSPABASE);
+   ErrorF("Plane A start offset is %d\n", temp);
+   temp = INREG(DSPASTRIDE);
+   ErrorF("Plane A stride is %d bytes (%d pixels)\n", temp, temp / pI830->cpp);
+#endif
+
+   for (i = 0; i < MAX_DISPLAY_PIPES; i++) {
+      CARD32 stridereg = i ? DSPBSTRIDE : DSPASTRIDE;
+      CARD32 basereg = i ? DSPBBASE : DSPABASE;
+
+      if (!pI830->planeEnabled[i])
+	 continue;
+
+      temp = INREG(stridereg);
+      if (temp / pI830->cpp != pScrn->displayWidth) {
+	 xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+		    "Correcting plane %c stride (%d -> %d)\n", PIPE_NAME(i),
+		    temp / pI830->cpp, pScrn->displayWidth);
+	 OUTREG(stridereg, pScrn->displayWidth * pI830->cpp);
+	 /* Trigger update */
+	 temp = INREG(basereg);
+	 OUTREG(basereg, temp);
+      }
+   }
+
+   xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Mode bandwidth is %d Mpixel/s\n",
+	      pMode->HDisplay * pMode->VDisplay * refresh / 1000000);
+
+   {
+      int maxBandwidth, bandwidthA, bandwidthB;
+
+      if (GetModeSupport(pScrn, 0x80, 0x80, 0x80, 0x80,
+			&maxBandwidth, &bandwidthA, &bandwidthB)) {
+	 xf86DrvMsg(pScrn->scrnIndex, X_INFO, "maxBandwidth is %d Mbyte/s, "
+		    "pipe bandwidths are %d Mbyte/s, %d Mbyte/s\n",
+		    maxBandwidth, bandwidthA, bandwidthB);
+      }
+   }
+
+   {
+      int ret;
+
+      ret = GetLFPCompMode(pScrn);
+      if (ret != -1) {
+	 xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+		    "LFP compensation mode: 0x%x\n", ret);
+      }
+   }
+
 #if MODESWITCH_RESET_STATE
-   ResetState(pScrn);
+   ResetState(pScrn, TRUE);
    SetHWOperatingState(pScrn);
 #endif
 
 #ifdef XF86DRI
-   if (pI830->directRenderingEnabled) {
+   if (pI830->directRenderingEnabled && didLock) {
       DRIUnlock(screenInfo.screens[pScrn->scrnIndex]);
       pI830->LockHeld = 0;
    }
@@ -2078,7 +2876,6 @@ I830BIOSScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
    ScrnInfoPtr pScrn;
    vgaHWPtr hwp;
    I830Ptr pI830;
-   VESAPtr pVesa;
    VisualPtr visual;
 #ifdef XF86DRI
    Bool driDisabled;
@@ -2086,18 +2883,19 @@ I830BIOSScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
 
    pScrn = xf86Screens[pScreen->myNum];
    pI830 = I830PTR(pScrn);
-   pVesa = pI830->vesa;
    hwp = VGAHWPTR(pScrn);
 
+   pI830->starting = TRUE;
+
    /*
     * If we're changing the BIOS's view of the video memory size, do that
     * first, then re-initialise the VBE information.
     */
-   SetBIOSMemSize(pScrn);
-   pVesa->pVbe = VBEInit(NULL, pI830->pEnt->index);
-   if (!pVesa->pVbe)
+   pI830->pVbe = VBEInit(NULL, pI830->pEnt->index);
+   SetBIOSMemSize(pScrn, pI830->newBIOSMemSize);
+   if (!pI830->pVbe)
       return FALSE;
-   pVesa->vbeInfo = VBEGetVBEInfo(pVesa->pVbe);
+   pI830->vbeInfo = VBEGetVBEInfo(pI830->pVbe);
 
    miClearVisualTypes();
    if (!xf86SetDefaultVisual(pScrn, -1))
@@ -2115,10 +2913,8 @@ I830BIOSScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
    if (!miSetPixmapDepths())
       return FALSE;
 
-   pI830->XvEnabled =
-	xf86ReturnOptValBool(pI830->Options, OPTION_XVIDEO, TRUE);
-
 #ifdef I830_XV
+   pI830->XvEnabled = !pI830->XvDisabled;
    if (pI830->XvEnabled) {
       if (pI830->noAccel || pI830->StolenOnly) {
 	 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Xv is disabled because it "
@@ -2130,22 +2926,9 @@ I830BIOSScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
    pI830->XvEnabled = FALSE;
 #endif
 
-   /* Allocate 2D memory */
-   pI830->FreeMemory = pI830->TotalVideoRam - pI830->StolenMemory.Size;
-   pI830->MemoryAperture.Start = pI830->StolenMemory.End;
-   pI830->MemoryAperture.End = pI830->FbMapSize;
-   pI830->MemoryAperture.Size = pI830->FbMapSize - pI830->StolenMemory.Size;
-   pI830->StolenPool.Fixed = pI830->StolenMemory;
-   pI830->StolenPool.Free = pI830->StolenMemory;
-   pI830->StolenPool.Total = pI830->StolenMemory;
+   I830ResetAllocations(pScrn, 0);
 
-   /*
-    * Force ring buffer to be in low memory for the 845G.
-    */
-   if (IS_845G(pI830))
-      pI830->NeedRingBufferLow = TRUE;
-
-   I830Allocate2DMemory(pScrn, TRUE);
+   I830Allocate2DMemory(pScrn, ALLOC_INITIAL);
 
    if (!pI830->noAccel) {
       if (pI830->LpRing.mem.Size == 0) {
@@ -2157,7 +2940,7 @@ I830BIOSScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
    }
 
    if (!pI830->SWCursor) {
-      if (pI830->CursorMem.Key == -1) {
+      if (pI830->CursorMem.Size == 0) {
 	  xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
 		     "Disabling HW cursor because the cursor memory "
 		      "allocation failed.\n");
@@ -2203,17 +2986,15 @@ I830BIOSScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
       }
    }
 
-
    driDisabled = !pI830->directRenderingEnabled;
 
    if (pI830->directRenderingEnabled)
       pI830->directRenderingEnabled = I830DRIScreenInit(pScreen);
 
    if (pI830->directRenderingEnabled)
-      if (!(pI830->directRenderingEnabled = I830Allocate3DMemory(pScrn)))
+      if (!(pI830->directRenderingEnabled = I830Allocate3DMemory(pScrn, 0)))
 	  I830DRICloseScreen(pScreen);
- 
-   
+
 #else
    pI830->directRenderingEnabled = FALSE;
 #endif
@@ -2222,7 +3003,7 @@ I830BIOSScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
     * After the 3D allocations have been done, see if there's any free space
     * that can be added to the framebuffer allocation.
     */
-   I830Allocate2DMemory(pScrn, FALSE);
+   I830Allocate2DMemory(pScrn, 0);
 
    DPRINTF(PFX, "assert(if(!I830DoPoolAllocation(pScrn, pI830->StolenPool)))\n");
    if (!I830DoPoolAllocation(pScrn, &(pI830->StolenPool)))
@@ -2252,7 +3033,10 @@ I830BIOSScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
    if (!vgaHWMapMem(pScrn))
       return FALSE;
 
-   DPRINTF(PFX, "assert( if(!I830BISEnterVT(scrnIndex, 0)) )\n");
+   /* Clear SavedReg */
+   memset(&pI830->SavedReg, 0, sizeof(pI830->SavedReg));
+
+   DPRINTF(PFX, "assert( if(!I830BIOSEnterVT(scrnIndex, 0)) )\n");
    if (!I830BIOSEnterVT(scrnIndex, 0))
       return FALSE;
 
@@ -2344,14 +3128,8 @@ I830BIOSScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
    if (pI830->directRenderingEnabled) {
       pI830->directRenderingOpen = TRUE;
       xf86DrvMsg(pScrn->scrnIndex, X_INFO, "direct rendering: Enabled\n");
-      /* What about doing this on EnterVT too? */
       /* Setup 3D engine */
-#if 1
       I830EmitInvarientState(pScrn);
-#endif
-#if 0
-      I830EmitInvarientState2(pScrn);
-#endif
    } else {
       if (driDisabled)
 	 xf86DrvMsg(pScrn->scrnIndex, X_INFO, "direct rendering: Disabled\n");
@@ -2373,6 +3151,10 @@ I830BIOSScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
    I830_dump_registers(pScrn);
 #endif
 #endif
+
+   pI830->starting = FALSE;
+   pI830->closing = FALSE;
+   pI830->suspended = FALSE;
    return TRUE;
 }
 
@@ -2383,11 +3165,14 @@ I830BIOSAdjustFrame(int scrnIndex, int x, int y, int flags)
    I830Ptr pI830;
    vbeInfoPtr pVbe;
    static int xoffset = 0, yoffset = 0;
-   static unsigned long adjustGeneration = 0;
+   static int adjustGeneration = -1;
 
    pScrn = xf86Screens[scrnIndex];
    pI830 = I830PTR(pScrn);
-   pVbe = pI830->vesa->pVbe;
+   pVbe = pI830->pVbe;
+
+   DPRINTF(PFX, "I830BIOSAdjustFrame: y = %d (+ %d), x = %d (+ %d)\n",
+	   x, xoffset, y, yoffset);
 
    /* Calculate the offsets once per server generation. */
    if (adjustGeneration != serverGeneration) {
@@ -2396,8 +3181,6 @@ I830BIOSAdjustFrame(int scrnIndex, int x, int y, int flags)
       yoffset = (pScrn->fbOffset / pI830->cpp) / pScrn->displayWidth;
    }
 
-   DPRINTF(PFX, "y = %d (+ %d), x = %d (+ %d)\n", x, xoffset, y, yoffset);
-
    if (OffsetFrame) {
       y = (pI830->FbMemBox.y2 - pScrn->currentMode->VDisplay);
       ErrorF("AdjustFrame: OffsetFrame is set, setting y to %d\n", y);
@@ -2419,6 +3202,34 @@ I830BIOSFreeScreen(int scrnIndex, int flags)
       vgaHWFreeHWRec(xf86Screens[scrnIndex]);
 }
 
+#ifndef SAVERESTORE_HWSTATE
+#define SAVERESTORE_HWSTATE 0
+#endif
+
+#if SAVERESTORE_HWSTATE
+static void
+SaveHWOperatingState(ScrnInfoPtr pScrn)
+{
+   I830Ptr pI830 = I830PTR(pScrn);
+   I830RegPtr save = &pI830->SavedReg;
+
+   DPRINTF(PFX, "SaveHWOperatingState\n");
+
+   return;
+}
+
+static void
+RestoreHWOperatingState(ScrnInfoPtr pScrn)
+{
+   I830Ptr pI830 = I830PTR(pScrn);
+   I830RegPtr save = &pI830->SavedReg;
+
+   DPRINTF(PFX, "RestoreHWOperatingState\n");
+
+   return;
+}
+#endif
+
 static void
 I830BIOSLeaveVT(int scrnIndex, int flags)
 {
@@ -2437,7 +3248,12 @@ I830BIOSLeaveVT(int scrnIndex, int flags)
    }
 #endif
 
-   ResetState(pScrn);
+#if SAVERESTORE_HWSTATE
+   if (!pI830->closing)
+      SaveHWOperatingState(pScrn);
+#endif
+
+   ResetState(pScrn, TRUE);
    RestoreHWState(pScrn);
    RestoreBIOSMemSize(pScrn);
    I830UnbindGARTMemory(pScrn);
@@ -2451,7 +3267,7 @@ I830BIOSEnterVT(int scrnIndex, int flags)
 {
    ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
    I830Ptr pI830 = I830PTR(pScrn);
-   static unsigned long SaveGeneration = 0;
+   static int SaveGeneration = -1;
 
    DPRINTF(PFX, "Enter VT\n");
 
@@ -2459,7 +3275,8 @@ I830BIOSEnterVT(int scrnIndex, int flags)
       return FALSE;
 
    CheckInheritedState(pScrn);
-   SetBIOSMemSize(pScrn);
+   SetBIOSMemSize(pScrn, pI830->newBIOSMemSize);
+
    /*
     * Only save state once per server generation since that's what most
     * drivers do.  Could change this to save state at each VT enter.
@@ -2468,9 +3285,9 @@ I830BIOSEnterVT(int scrnIndex, int flags)
       SaveGeneration = serverGeneration;
       SaveHWState(pScrn);
    }
-   ResetState(pScrn);
+   ResetState(pScrn, FALSE);
    SetHWOperatingState(pScrn);
-   
+
 #if 1
    /* Clear the framebuffer */
    memset(pI830->FbBase + pScrn->fbOffset, 0,
@@ -2479,16 +3296,30 @@ I830BIOSEnterVT(int scrnIndex, int flags)
 
    if (!I830VESASetMode(pScrn, pScrn->currentMode))
       return FALSE;
+#ifdef I830_XV
+   I830VideoSwitchModeAfter(pScrn, pScrn->currentMode);
+#endif
 
-   ResetState(pScrn);
+   ResetState(pScrn, TRUE);
    SetHWOperatingState(pScrn);
 
    pScrn->AdjustFrame(scrnIndex, pScrn->frameX0, pScrn->frameY0, 0);
 
+#if SAVERESTORE_HWSTATE
+   RestoreHWOperatingState(pScrn);
+#endif
+
 #ifdef XF86DRI
    if (pI830->directRenderingEnabled) {
-      DPRINTF(PFX, "calling dri unlock\n");
-      DRIUnlock(screenInfo.screens[scrnIndex]);
+      if (!pI830->starting) {
+	 I830EmitInvarientState(pScrn);
+	 I830RefreshRing(pScrn);
+	 I830Sync(pScrn);
+	 DO_RING_IDLE();
+
+	 DPRINTF(PFX, "calling dri unlock\n");
+	 DRIUnlock(screenInfo.screens[scrnIndex]);
+      }
       pI830->LockHeld = 0;
    }
 #endif
@@ -2502,20 +3333,20 @@ I830BIOSSwitchMode(int scrnIndex, DisplayModePtr mode, int flags)
 
    int _head;
    int _tail;
-   I830Ptr pI830;
    ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
-   int ret;
+   I830Ptr pI830 = I830PTR(pScrn);
+   int ret = TRUE;
 
-   pI830 = I830PTR(pScrn);
+   DPRINTF(PFX, "I830BIOSSwitchMode: mode == %p\n", mode);
 
-   if (!pI830->noAccel && (1 || IS_845G(pI830))) {	/*Stops head pointer freezes for 845G */
+   /* Stops head pointer freezes for 845G */
+   if (!pI830->noAccel && (1 || IS_845G(pI830))) {
       do {
 	 _head = INREG(LP_RING + RING_HEAD) & I830_HEAD_MASK;
 	 _tail = INREG(LP_RING + RING_TAIL) & I830_TAIL_MASK;
 	 DELAY(1000);
       } while (_head != _tail);
    }
-   DPRINTF(PFX, "mode == %p\n", mode);
 
 #if 0
    OffsetFrame = !OffsetFrame;
@@ -2528,10 +3359,20 @@ I830BIOSSwitchMode(int scrnIndex, DisplayModePtr mode, int flags)
 #if BINDUNBIND
    I830UnbindGARTMemory(pScrn);
 #endif
-   ret = I830VESASetMode(xf86Screens[scrnIndex], mode);
+#ifdef I830_XV
+   /* Give the video overlay code a chance to see the new mode. */
+   I830VideoSwitchModeBefore(pScrn, mode);
+#endif
+   if (!I830VESASetMode(pScrn, mode))
+      ret = FALSE;
+#ifdef I830_XV
+   /* Give the video overlay code a chance to see the new mode. */
+   I830VideoSwitchModeAfter(pScrn, mode);
+#endif
 #if BINDUNBIND
    I830BindGARTMemory(pScrn);
 #endif
+
    return ret;
 }
 
@@ -2545,7 +3386,7 @@ I830BIOSSaveScreen(ScreenPtr pScreen, int mode)
 
    DPRINTF(PFX, "I830BIOSSaveScreen: %d, on is %s\n", mode, BOOLTOSTRING(on));
 
-   for (i = 0; i < 2; i++) {
+   for (i = 0; i < MAX_DISPLAY_PIPES; i++) {
       if (i == 0) {
 	 ctrl = DSPACNTR;
 	 base = DSPABASE;
@@ -2566,11 +3407,12 @@ I830BIOSSaveScreen(ScreenPtr pScreen, int mode)
       }
    }
 
-   if (pI830->CursorInfoRec) {
+   if (pI830->CursorInfoRec && !pI830->SWCursor && pI830->cursorOn) {
       if (on)
 	 pI830->CursorInfoRec->ShowCursor(pScrn);
       else
 	 pI830->CursorInfoRec->HideCursor(pScrn);
+      pI830->cursorOn = TRUE;
    }
 
    return TRUE;
@@ -2582,7 +3424,7 @@ I830DisplayPowerManagementSet(ScrnInfoPtr pScrn, int PowerManagementMode,
 			      int flags)
 {
    I830Ptr pI830 = I830PTR(pScrn);
-   vbeInfoPtr pVbe = pI830->vesa->pVbe;
+   vbeInfoPtr pVbe = pI830->pVbe;
 
    if (xf86LoaderCheckSymbol("VBEDPMSSet")) {
       VBEDPMSSet(pVbe, PowerManagementMode);
@@ -2615,6 +3457,7 @@ I830BIOSCloseScreen(int scrnIndex, ScreenPtr pScreen)
    I830Ptr pI830 = I830PTR(pScrn);
    XAAInfoRecPtr infoPtr = pI830->AccelInfoRec;
 
+   pI830->closing = TRUE;
 #ifdef XF86DRI
    if (pI830->directRenderingOpen) {
       pI830->directRenderingOpen = FALSE;
@@ -2650,6 +3493,7 @@ I830BIOSCloseScreen(int scrnIndex, ScreenPtr pScreen)
    xf86GARTCloseScreen(scrnIndex);
 
    pScrn->vtSema = FALSE;
+   pI830->closing = FALSE;
    pScreen->CloseScreen = pI830->CloseScreen;
    return (*pScreen->CloseScreen) (scrnIndex, pScreen);
 }
@@ -2667,6 +3511,66 @@ I830ValidMode(int scrnIndex, DisplayModePtr mode, Bool verbose, int flags)
    return MODE_OK;
 }
 
+#ifndef SUSPEND_SLEEP
+#define SUSPEND_SLEEP 0
+#endif
+#ifndef RESUME_SLEEP
+#define RESUME_SLEEP 0
+#endif
+
+/*
+ * This function is only required if we need to do anything differently from
+ * DoApmEvent() in common/xf86PM.c, including if we want to see events other
+ * than suspend/resume.
+ */
+static Bool
+I830PMEvent(int scrnIndex, pmEvent event, Bool undo)
+{
+   ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
+   I830Ptr pI830 = I830PTR(pScrn);
+
+   DPRINTF(PFX, "Enter VT, event %d, undo: %s\n", event, BOOLTOSTRING(undo));
+
+   switch(event) {
+   case XF86_APM_SYS_SUSPEND:
+   case XF86_APM_CRITICAL_SUSPEND: /*do we want to delay a critical suspend?*/
+   case XF86_APM_USER_SUSPEND:
+   case XF86_APM_SYS_STANDBY:
+   case XF86_APM_USER_STANDBY:
+      if (!undo && !pI830->suspended) {
+	 pScrn->LeaveVT(scrnIndex, 0);
+	 pI830->suspended = TRUE;
+	 sleep(SUSPEND_SLEEP);
+      } else if (undo && pI830->suspended) {
+	 sleep(RESUME_SLEEP);
+	 pScrn->EnterVT(scrnIndex, 0);
+	 pI830->suspended = FALSE;
+      }
+      break;
+   case XF86_APM_STANDBY_RESUME:
+   case XF86_APM_NORMAL_RESUME:
+   case XF86_APM_CRITICAL_RESUME:
+      if (pI830->suspended) {
+	 sleep(RESUME_SLEEP);
+	 pScrn->EnterVT(scrnIndex, 0);
+	 pI830->suspended = FALSE;
+	 /*
+	  * Turn the screen saver off when resuming.  This seems to be
+	  * needed to stop xscreensaver kicking in (when used).
+	  *
+	  * XXX DoApmEvent() should probably call this just like
+	  * xf86VTSwitch() does.  Maybe do it here only in 4.2
+	  * compatibility mode.
+	  */
+	 SaveScreens(SCREEN_SAVER_FORCER, ScreenSaverReset);
+      }
+      break;
+   default:
+      ErrorF("I830PMEvent: received APM event %d\n", event);
+   }
+   return TRUE;
+}
+
 void
 I830InitpScrn(ScrnInfoPtr pScrn)
 {
@@ -2678,4 +3582,5 @@ I830InitpScrn(ScrnInfoPtr pScrn)
    pScrn->LeaveVT = I830BIOSLeaveVT;
    pScrn->FreeScreen = I830BIOSFreeScreen;
    pScrn->ValidMode = I830ValidMode;
+   pScrn->PMEvent = I830PMEvent;
 }
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/i810/i830_memory.c b/xc/programs/Xserver/hw/xfree86/drivers/i810/i830_memory.c
index b9d0bdb34..16693d4aa 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/i810/i830_memory.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/i810/i830_memory.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i830_memory.c,v 1.3 2002/10/16 21:13:47 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i830_memory.c,v 1.6 2003/02/08 02:26:56 dawes Exp $ */
 /**************************************************************************
 
 Copyright 1998-1999 Precision Insight, Inc., Cedar Park, Texas.
@@ -43,7 +43,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 /*
  * Authors:
- *   Keith Whitwell <keithw@precisioninsight.com>
+ *   Keith Whitwell <keith@tungstengraphics.com>
  *   David Dawes <dawes@tungstengraphics.com>
  *
  */
@@ -65,6 +65,7 @@ AllocFromPool(ScrnInfoPtr pScrn, I830MemRange *result, I830MemPool *pool,
 {
    I830Ptr pI830 = I830PTR(pScrn);
    unsigned long needed, start, end;
+   Bool dryrun = ((flags & ALLOCATE_DRY_RUN) != 0);
 
    if (!result || !pool || !size)
       return 0;
@@ -85,7 +86,7 @@ AllocFromPool(ScrnInfoPtr pScrn, I830MemRange *result, I830MemPool *pool,
 	    end = ROUND_DOWN_TO(pool->Free.End, alignment);
 	 else
 	    end = pool->Free.End;
-	 
+
 	 start = ROUND_DOWN_TO(end - size, alignment);
 	 needed = pool->Free.End - start;
       }
@@ -93,12 +94,20 @@ AllocFromPool(ScrnInfoPtr pScrn, I830MemRange *result, I830MemPool *pool,
    if (needed > pool->Free.Size) {
       unsigned long extra;
       /* See if the pool can be grown. */
-      if (pI830->StolenOnly)
+      if (pI830->StolenOnly && !dryrun)
 	 return 0;
       extra = needed - pool->Free.Size;
       extra = ROUND_TO_PAGE(extra);
-      if (extra > pI830->FreeMemory)
+      if (extra > pI830->FreeMemory) {
+	 if (dryrun)
+	    pI830->FreeMemory = extra;
+	 else
+	    return 0;
+      }
+
+      if (!dryrun && (extra > pI830->MemoryAperture.Size))
 	 return 0;
+
       pool->Free.Size += extra;
       pool->Free.End += extra;
       pool->Total.Size += extra;
@@ -131,6 +140,7 @@ AllocFromAGP(ScrnInfoPtr pScrn, I830MemRange *result, unsigned long size,
    I830Ptr pI830 = I830PTR(pScrn);
    unsigned long start, end;
    unsigned long newApStart, newApEnd;
+   Bool dryrun = ((flags & ALLOCATE_DRY_RUN) != 0);
 
    if (!result || !size)
       return 0;
@@ -142,8 +152,12 @@ AllocFromAGP(ScrnInfoPtr pScrn, I830MemRange *result, unsigned long size,
       return 0;
    }
 
-   if (size > pI830->FreeMemory)
-      return 0;
+   if (size > pI830->FreeMemory) {
+      if (dryrun)
+	 pI830->FreeMemory = size;
+      else
+	 return 0;
+   }
 
    /* Calculate offset */
    if (flags & ALLOCATE_AT_BOTTOM) {
@@ -163,19 +177,22 @@ AllocFromAGP(ScrnInfoPtr pScrn, I830MemRange *result, unsigned long size,
       newApStart = pI830->MemoryAperture.Start;
       newApEnd = start;
    }
-   if (newApStart > newApEnd)
-      return 0;
 
-   if (flags & NEED_PHYSICAL_ADDR) {
-      result->Key = xf86AllocateGARTMemory(pScrn->scrnIndex, size, 2,
-					   &(result->Physical));
-   } else {
-      result->Key = xf86AllocateGARTMemory(pScrn->scrnIndex, size, 0, NULL);
-   }
+   if (!dryrun) {
+      if (newApStart > newApEnd)
+	 return 0;
 
-   if (result->Key == -1)
-      return 0;
+      if (flags & NEED_PHYSICAL_ADDR) {
+	 result->Key = xf86AllocateGARTMemory(pScrn->scrnIndex, size, 2,
+					      &(result->Physical));
+      } else {
+	 result->Key = xf86AllocateGARTMemory(pScrn->scrnIndex, size, 0, NULL);
+      }
+      if (result->Key == -1)
+	 return 0;
+   }
 
+   pI830->allocatedMemory += size;
    pI830->MemoryAperture.Start = newApStart;
    pI830->MemoryAperture.End = newApEnd;
    pI830->MemoryAperture.Size = newApEnd - newApStart;
@@ -196,6 +213,7 @@ I830AllocVidMem(ScrnInfoPtr pScrn, I830MemRange *result, I830MemPool *pool,
 		unsigned long size, unsigned long alignment, int flags)
 {
    I830Ptr pI830 = I830PTR(pScrn);
+   Bool dryrun = ((flags & ALLOCATE_DRY_RUN) != 0);
 
    if (!result)
       return 0;
@@ -212,11 +230,12 @@ I830AllocVidMem(ScrnInfoPtr pScrn, I830MemRange *result, I830MemPool *pool,
    case FROM_POOL_ONLY:
       return AllocFromPool(pScrn, result, pool, size, alignment, flags);
    case FROM_NEW_ONLY:
-      if (pI830->StolenOnly || (pI830->FreeMemory <= 0))
+      if (!dryrun && (pI830->StolenOnly || (pI830->FreeMemory <= 0)))
 	 return 0;
       return AllocFromAGP(pScrn, result, size, alignment, flags);
    case FROM_ANYWHERE:
-      if (!(flags & ALLOCATE_AT_BOTTOM) && (pI830->FreeMemory >= size))
+      if ((!(flags & ALLOCATE_AT_BOTTOM) && (pI830->FreeMemory >= size)) ||
+	  (flags & NEED_PHYSICAL_ADDR))
 	 return AllocFromAGP(pScrn, result, size, alignment, flags);
       else
 	 return AllocFromPool(pScrn, result, pool, size, alignment, flags);
@@ -227,11 +246,13 @@ I830AllocVidMem(ScrnInfoPtr pScrn, I830MemRange *result, I830MemPool *pool,
 }
 
 static Bool
-AllocateRingBuffer(ScrnInfoPtr pScrn, Bool forceLow)
+AllocateRingBuffer(ScrnInfoPtr pScrn, int flags)
 {
    I830Ptr pI830 = I830PTR(pScrn);
    unsigned long size, alloced;
-   int flags;
+   Bool dryrun = ((flags & ALLOCATE_DRY_RUN) != 0);
+   int verbosity = dryrun ? 4 : 1;
+   const char *s = dryrun ? "[dryrun] " : "";
 
    /* Clear ring buffer  info */
    memset(&(pI830->LpRing), 0, sizeof(pI830->LpRing));
@@ -242,36 +263,40 @@ AllocateRingBuffer(ScrnInfoPtr pScrn, Bool forceLow)
 
    /* Ring buffer */
    size = PRIMARY_RINGBUFFER_SIZE;
-   if (forceLow)
-      flags = FROM_POOL_ONLY | ALLOCATE_AT_BOTTOM;
+   if (flags & FORCE_LOW)
+      flags |= FROM_POOL_ONLY | ALLOCATE_AT_BOTTOM;
    else
-      flags = FROM_ANYWHERE | ALLOCATE_AT_TOP;
+      flags |= FROM_ANYWHERE | ALLOCATE_AT_TOP;
 
    alloced = I830AllocVidMem(pScrn, &(pI830->LpRing.mem),
 				&(pI830->StolenPool), size,
 				GTT_PAGE_SIZE, flags);
    if (alloced < size) {
-      xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-		 "Failed to allocate Ring Buffer space\n");
+      if (!dryrun) {
+	 xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+		    "Failed to allocate Ring Buffer space\n");
+      }
       return FALSE;
    }
-   xf86DrvMsg(pScrn->scrnIndex, X_INFO,
-	      "Allocated %d kB for the ring buffer at 0x%x\n",
-	      alloced / 1024, pI830->LpRing.mem.Start);
+   xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, verbosity,
+		  "%sAllocated %d kB for the ring buffer at 0x%x\n", s,
+		  alloced / 1024, pI830->LpRing.mem.Start);
    pI830->LpRing.tail_mask = pI830->LpRing.mem.Size - 1;
    return TRUE;
 }
 
 #ifdef I830_XV
 /*
- * Note, the forceLow argument is currently not used or supported.
+ * Note, the FORCE_LOW flag is currently not used or supported.
  */
 static Bool
-AllocateOverlay(ScrnInfoPtr pScrn, Bool forceLow)
+AllocateOverlay(ScrnInfoPtr pScrn, int flags)
 {
    I830Ptr pI830 = I830PTR(pScrn);
    unsigned long size, alloced;
-   int flags;
+   Bool dryrun = ((flags & ALLOCATE_DRY_RUN) != 0);
+   int verbosity = dryrun ? 4 : 1;
+   const char *s = dryrun ? "[dryrun] " : "";
 
    /* Clear overlay info */
    memset(&(pI830->OverlayMem), 0, sizeof(pI830->OverlayMem));
@@ -287,10 +312,10 @@ AllocateOverlay(ScrnInfoPtr pScrn, Bool forceLow)
     */
 
    size = OVERLAY_SIZE;
-   if (forceLow)
-      flags = FROM_POOL_ONLY | ALLOCATE_AT_BOTTOM | NEED_PHYSICAL_ADDR;
+   if (flags & FORCE_LOW)
+      flags |= FROM_POOL_ONLY | ALLOCATE_AT_BOTTOM | NEED_PHYSICAL_ADDR;
    else
-      flags = FROM_ANYWHERE | ALLOCATE_AT_TOP | NEED_PHYSICAL_ADDR;
+      flags |= FROM_ANYWHERE | ALLOCATE_AT_TOP | NEED_PHYSICAL_ADDR;
 
    alloced = I830AllocVidMem(pScrn, &(pI830->OverlayMem),
 			     &(pI830->StolenPool), size, GTT_PAGE_SIZE, flags);
@@ -299,20 +324,21 @@ AllocateOverlay(ScrnInfoPtr pScrn, Bool forceLow)
     * XXX For testing only.  Don't enable this unless you know how to set
     * physBase.
     */
-   if (forceLow) {
-      ErrorF("AllocateOverlay() doesn't support setting forceLow\n");
+   if (flags & FORCE_LOW) {
+      ErrorF("AllocateOverlay() doesn't support setting FORCE_LOW\n");
       return FALSE;
    }
 
-   if (alloced < size) {
+   if (!dryrun && (alloced < size)) {
       xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
 		 "Failed to allocate Overlay register space.\n");
 	 /* This failure isn't fatal. */
    } else {
-      xf86DrvMsg(pScrn->scrnIndex, X_INFO,
-		 "Allocated %d kB for Overlay registers at 0x%x (0x%08x).\n",
-		 alloced / 1024, pI830->OverlayMem.Start,
-		 pI830->OverlayMem.Physical);
+      xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, verbosity,
+		     "%sAllocated %d kB for Overlay registers at 0x%x "
+		     "(0x%08x).\n", s,
+		     alloced / 1024, pI830->OverlayMem.Start,
+		     pI830->OverlayMem.Physical);
    }
    return TRUE;
 }
@@ -334,186 +360,240 @@ GetFreeSpace(ScrnInfoPtr pScrn)
    return extra;
 }
 
+static Bool
+IsTileable(int pitch)
+{
+   /*
+    * Allow tiling for pitches that are a power of 2 multiple of 128 bytes,
+    * up to 64 * 128 (= 8192) bytes.
+    */
+   switch (pitch) {
+   case 128 * 1:
+   case 128 * 2:
+   case 128 * 4:
+   case 128 * 8:
+   case 128 * 16:
+   case 128 * 32:
+   case 128 * 64:
+      return TRUE;
+   default:
+      return FALSE;
+   }
+}
+
 /*
  * Allocate memory for 2D operation.  This includes the (front) framebuffer,
  * ring buffer, scratch memory, HW cursor.
  */
 
 Bool
-I830Allocate2DMemory(ScrnInfoPtr pScrn, Bool initial)
+I830Allocate2DMemory(ScrnInfoPtr pScrn, const int flags)
 {
    I830Ptr pI830 = I830PTR(pScrn);
    unsigned long size, alloced;
-   int flags;
+   Bool dryrun = ((flags & ALLOCATE_DRY_RUN) != 0);
+   int verbosity = dryrun ? 4 : 1;
+   const char *s = dryrun ? "[dryrun] " : "";
+   Bool tileable;
+   int align, alignflags;
 
-   DPRINTF(PFX, "I830Allocate2DMemory: inital is %s\n", BOOLTOSTRING(initial));
+   DPRINTF(PFX, "I830Allocate2DMemory: inital is %s\n",
+	   BOOLTOSTRING(flags & ALLOC_INITIAL));
 
    if (!pI830->StolenOnly &&
        (!xf86AgpGARTSupported() || !xf86AcquireGART(pScrn->scrnIndex))) {
-      xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-		 "AGP GART support is either not available or cannot be used.\n"
-		 "\tMake sure your kernel has agpgart support or has the\n"
-		 "\tagpgart module loaded.\n");
+      if (!dryrun) {
+	 xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+		    "AGP GART support is either not available or cannot "
+		    "be used.\n"
+		    "\tMake sure your kernel has agpgart support or has the\n"
+		    "\tagpgart module loaded.\n");
+      }
       return FALSE;
    }
 
-   {
-      /*
-       * The I830 is slightly different from the I830/I815, it has no
-       * dcache and it has stolen memory by default in its gtt.  All
-       * additional memory must go after it.
-       */
 
-      DPRINTF(PFX,
-	      "size == %luk (%lu bytes == pScrn->videoRam)\n"
-	      "pI830->StolenSize == %luk (%lu bytes)\n",
-	      pScrn->videoRam, pScrn->videoRam * 1024,
-	      pI830->StolenPool.Free.Size / 1024,
-	      pI830->StolenPool.Free.Size);
+   /*
+    * The I830 is slightly different from the I830/I815, it has no
+    * dcache and it has stolen memory by default in its gtt.  All
+    * additional memory must go after it.
+    */
 
-      if (initial) {
-	 unsigned long minspace, avail, lineSize;
-	 int cacheLines, maxCacheLines;
+   DPRINTF(PFX,
+	   "size == %luk (%lu bytes == pScrn->videoRam)\n"
+	   "pI830->StolenSize == %luk (%lu bytes)\n",
+	   pScrn->videoRam, pScrn->videoRam * 1024,
+	   pI830->StolenPool.Free.Size / 1024,
+	   pI830->StolenPool.Free.Size);
 
-	 if (pI830->NeedRingBufferLow)
-	    AllocateRingBuffer(pScrn, TRUE);
+   if (flags & ALLOC_INITIAL) {
+      unsigned long minspace, avail, lineSize;
+      int cacheLines, maxCacheLines;
 
-	 /* Clear everything first. */
-	 memset(&(pI830->FbMemBox), 0, sizeof(pI830->FbMemBox));
-	 memset(&(pI830->FrontBuffer), 0, sizeof(pI830->FrontBuffer));
-	 pI830->FrontBuffer.Key = -1;
+      if (pI830->NeedRingBufferLow)
+	 AllocateRingBuffer(pScrn, flags | FORCE_LOW);
 
-	 pI830->FbMemBox.x1 = 0;
-	 pI830->FbMemBox.x2 = pScrn->displayWidth;
-	 pI830->FbMemBox.y1 = 0;
-	 pI830->FbMemBox.y2 = pScrn->virtualY;
+      /* Clear everything first. */
+      memset(&(pI830->FbMemBox), 0, sizeof(pI830->FbMemBox));
+      memset(&(pI830->FrontBuffer), 0, sizeof(pI830->FrontBuffer));
+      pI830->FrontBuffer.Key = -1;
 
-	 /*
-	  * Calculate how much framebuffer memory to allocate.  For the
-	  * initial allocation, calculate a reasonable minimum.  This is
-	  * enough for the virtual screen size, plus some pixmap cache
-	  * space.
-	  */
+      pI830->FbMemBox.x1 = 0;
+      pI830->FbMemBox.x2 = pScrn->displayWidth;
+      pI830->FbMemBox.y1 = 0;
+      pI830->FbMemBox.y2 = pScrn->virtualY;
 
-	 lineSize = pScrn->displayWidth * pI830->cpp;
-	 minspace = lineSize * pScrn->virtualY;
-	 avail = pScrn->videoRam * 1024;
-	 maxCacheLines = (avail - minspace) / lineSize;
-	 /* This shouldn't happen. */
-	 if (maxCacheLines < 0) {
-	    xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-		       "Internal Error: "
-		       "maxCacheLines < 0 in I830Allocate2DMemory()\n");
-	    maxCacheLines = 0;
-	 }
-	 if (maxCacheLines > (MAX_DISPLAY_HEIGHT - pScrn->virtualY))
-	    maxCacheLines = MAX_DISPLAY_HEIGHT - pScrn->virtualY;
+      /*
+       * Calculate how much framebuffer memory to allocate.  For the
+       * initial allocation, calculate a reasonable minimum.  This is
+       * enough for the virtual screen size, plus some pixmap cache
+       * space.
+       */
 
-	 if (pI830->CacheLines >= 0) {
-	    cacheLines = pI830->CacheLines;
-	 } else {
+      lineSize = pScrn->displayWidth * pI830->cpp;
+      minspace = lineSize * pScrn->virtualY;
+      avail = pScrn->videoRam * 1024;
+      maxCacheLines = (avail - minspace) / lineSize;
+      /* This shouldn't happen. */
+      if (maxCacheLines < 0) {
+	 xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+		    "Internal Error: "
+		    "maxCacheLines < 0 in I830Allocate2DMemory()\n");
+	 maxCacheLines = 0;
+      }
+      if (maxCacheLines > (MAX_DISPLAY_HEIGHT - pScrn->virtualY))
+	 maxCacheLines = MAX_DISPLAY_HEIGHT - pScrn->virtualY;
+
+      if (pI830->CacheLines >= 0) {
+	 cacheLines = pI830->CacheLines;
+      } else {
 #if 1
-	    /* Make sure there is enough for two DVD sized YUV buffers */
-	    cacheLines = (pScrn->depth == 24) ? 256 : 384;
-	    if (pScrn->displayWidth <= 1024)
-	       cacheLines *= 2;
+	 /* Make sure there is enough for two DVD sized YUV buffers */
+	 cacheLines = (pScrn->depth == 24) ? 256 : 384;
+	 if (pScrn->displayWidth <= 1024)
+	    cacheLines *= 2;
 #else
-	    /*
-	     * Make sure there is enough for two DVD sized YUV buffers.
-	     * Make that 1.5MB, which is around what was allocated with
-	     * the old algorithm
-	     */
-	    cacheLines = (MB(1) + KB(512)) / pI830->cpp / pScrn->displayWidth;
+	 /*
+	  * Make sure there is enough for two DVD sized YUV buffers.
+	  * Make that 1.5MB, which is around what was allocated with
+	  * the old algorithm
+	  */
+	 cacheLines = (MB(1) + KB(512)) / pI830->cpp / pScrn->displayWidth;
 #endif
+      }
+      if (cacheLines > maxCacheLines)
+	 cacheLines = maxCacheLines;
+
+      pI830->FbMemBox.y2 += cacheLines;
+
+      xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, verbosity,
+		     "%sAllocating at least %d scanlines for pixmap cache\n",
+		     s, cacheLines);
+
+      tileable = !(flags & ALLOC_NO_TILING) && pI830->allowPageFlip &&
+		 IsTileable(pScrn->displayWidth * pI830->cpp);
+      if (tileable) {
+	 align = KB(512);
+	 alignflags = ALIGN_BOTH_ENDS;
+      } else {
+	 align = KB(64);
+	 alignflags = 0;
+      }
+
+      size = lineSize * (pScrn->virtualY + cacheLines);
+      size = ROUND_TO_PAGE(size);
+      xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, verbosity,
+		     "%sInitial framebuffer allocation size: %d kByte\n", s,
+		     size / 1024);
+      alloced = I830AllocVidMem(pScrn, &(pI830->FrontBuffer),
+				&(pI830->StolenPool), size, align,
+				flags | alignflags |
+				FROM_ANYWHERE | ALLOCATE_AT_BOTTOM);
+      if (alloced < size) {
+	 if (!dryrun) {
+	    xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+		       "Failed to allocate framebuffer.\n");
 	 }
-	 if (cacheLines > maxCacheLines)
-	    cacheLines = maxCacheLines;
+	 return FALSE;
+      }
+   } else {
+      unsigned long lineSize;
+      unsigned long extra = 0;
+      unsigned long maxFb = 0;
 
-	 pI830->FbMemBox.y2 += cacheLines;
+      /*
+       * XXX Need to "free" up any 3D allocations if the DRI ended up
+       * and make them available for 2D.  The best way to do this would
+       * be position all of those regions contiguously at the end of the
+       * StolenPool.
+       */
+      extra = GetFreeSpace(pScrn);
 
-	 xf86DrvMsg(pScrn->scrnIndex, X_INFO,
-		    "Allocating at least %d scanlines for pixmap cache\n",
-		    cacheLines);
-	 size = lineSize * (pScrn->virtualY + cacheLines);
-	 size = ROUND_TO_PAGE(size);
-	 xf86DrvMsg(pScrn->scrnIndex, X_INFO,
-		    "Initial framebuffer allocation size: %d kByte\n",
-		    size / 1024);
-	 alloced = I830AllocVidMem(pScrn, &(pI830->FrontBuffer),
-				   &(pI830->StolenPool), size, KB(64), 
-				   FROM_ANYWHERE | ALLOCATE_AT_BOTTOM);
-	 if (alloced < size) {
+      if (extra == 0)
+	 return TRUE;
+
+      maxFb = pI830->FrontBuffer.Size + extra;
+      lineSize = pScrn->displayWidth * pI830->cpp;
+      maxFb = ROUND_DOWN_TO(maxFb, lineSize);
+      if (maxFb > lineSize * MAX_DISPLAY_HEIGHT)
+	 maxFb = lineSize * MAX_DISPLAY_HEIGHT;
+      if (maxFb > pI830->FrontBuffer.Size) {
+	 unsigned long oldsize;
+	 /*
+	  * Sanity check -- the fb should be the last thing allocated at
+	  * the bottom of the stolen pool.
+	  */
+	 if (pI830->StolenPool.Free.Start != pI830->FrontBuffer.End) {
 	    xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-		       "Failed to allocate framebuffer\n");
+		       "Internal error in I830Allocate2DMemory():\n\t"
+		       "Framebuffer isn't the last allocation at the bottom"
+		       " of StolenPool\n\t(%x != %x).\n",
+		       pI830->FrontBuffer.End,
+		       pI830->StolenPool.Free.Start);
 	    return FALSE;
 	 }
-      } else {
-	 unsigned long lineSize;
-	 unsigned long extra = 0;
-	 unsigned long maxFb = 0;
-
 	 /*
-	  * XXX Need to "free" up any 3D allocations if the DRI ended up
-	  * and make them available for 2D.  The best way to do this would
-	  * be position all of those regions contiguously at the end of the
-	  * StolenPool.
+	  * XXX Maybe should have a "Free" function.  This should be
+	  * the only place where a region is resized, and we know that
+	  * the fb is always at the bottom of the aperture/stolen pool,
+	  * and is the only region that is allocated bottom-up.
+	  * Allowing for more general realloction would require a smarter
+	  * allocation system.
 	  */
-	 extra = GetFreeSpace(pScrn);
-
-	 if (extra == 0)
-	    return TRUE;
-
-	 maxFb = pI830->FrontBuffer.Size + extra;
-	 lineSize = pScrn->displayWidth * pI830->cpp;
-	 maxFb = ROUND_DOWN_TO(maxFb, lineSize);
-	 if (maxFb > lineSize * MAX_DISPLAY_HEIGHT)
-	    maxFb = lineSize * MAX_DISPLAY_HEIGHT;
-	 if (maxFb > pI830->FrontBuffer.Size) {
-	    unsigned long oldsize;
-	    /*
-	     * Sanity check -- the fb should be the last thing allocated at
-	     * the bottom of the stolen pool.
-	     */
-	    if (pI830->StolenPool.Free.Start != pI830->FrontBuffer.End) {
-	       xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-			  "Internal error in I830Allocate2DMemory():\n\t"
-			  "Framebuffer isn't the last allocation at the bottom"
-			  " of StolenPool\n\t(%x != %x).\n",
-			  pI830->FrontBuffer.End,
-			  pI830->StolenPool.Free.Start);
-	       return FALSE;
-	    }
-	    /*
-	     * XXX Maybe should have a "Free" function.  This should be
-	     * the only place where a region is resized, and we know that
-	     * the fb is always at the bottom of the aperture/stolen pool,
-	     * and is the only region that is allocated bottom-up.
-	     * Allowing for more general realloction would require a smarter
-	     * allocation system.
-	     */
-	    oldsize = pI830->FrontBuffer.Size;
-	    pI830->StolenPool.Free.Size += pI830->FrontBuffer.Size;
-	    pI830->StolenPool.Free.Start -= pI830->FrontBuffer.Size;
-	    xf86DrvMsg(pScrn->scrnIndex, X_INFO,
-		       "Updated framebuffer allocation size from %d "
-		       "to %d kByte\n", oldsize / 1024, maxFb / 1024);
-	    xf86DrvMsg(pScrn->scrnIndex, X_INFO,
-		       "Updated pixmap cache from %d scanlines to %d "
-		       "scanlines\n",
-		       oldsize / lineSize - pScrn->virtualY,
-		       maxFb / lineSize - pScrn->virtualY);
-	    pI830->FbMemBox.y2 = maxFb / lineSize;
-	    alloced = I830AllocVidMem(pScrn, &(pI830->FrontBuffer),
-				      &(pI830->StolenPool), maxFb, KB(64), 
-				      FROM_ANYWHERE | ALLOCATE_AT_BOTTOM);
-	    if (alloced < maxFb) {
+	 oldsize = pI830->FrontBuffer.Size;
+	 pI830->StolenPool.Free.Size += pI830->FrontBuffer.Size;
+	 pI830->StolenPool.Free.Start -= pI830->FrontBuffer.Size;
+	 xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, verbosity,
+			"%sUpdated framebuffer allocation size from %d "
+			"to %d kByte\n", s, oldsize / 1024, maxFb / 1024);
+	 xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, verbosity,
+			"%sUpdated pixmap cache from %d scanlines to %d "
+			"scanlines\n", s,
+			oldsize / lineSize - pScrn->virtualY,
+			maxFb / lineSize - pScrn->virtualY);
+	 pI830->FbMemBox.y2 = maxFb / lineSize;
+	 tileable = !(flags & ALLOC_NO_TILING) && pI830->allowPageFlip &&
+		 IsTileable(pScrn->displayWidth * pI830->cpp);
+	 if (tileable) {
+	    align = KB(512);
+	    alignflags = ALIGN_BOTH_ENDS;
+	 } else {
+	    align = KB(64);
+	    alignflags = 0;
+	 }
+	 alloced = I830AllocVidMem(pScrn, &(pI830->FrontBuffer),
+				   &(pI830->StolenPool), maxFb, align,
+				   flags | alignflags |
+				   FROM_ANYWHERE | ALLOCATE_AT_BOTTOM);
+	 if (alloced < maxFb) {
+	    if (!dryrun) {
 	       xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
 			  "Failed to re-allocate framebuffer\n");
-	       return FALSE;
 	    }
+	    return FALSE;
 	 }
-	 return TRUE;
       }
+      return TRUE;
    }
 
 #if REMAP_RESERVED
@@ -521,10 +601,12 @@ I830Allocate2DMemory(ScrnInfoPtr pScrn, Bool initial)
     * Allocate a dummy page to pass when attempting to rebind the
     * pre-allocated region.
     */
-   memset(&(pI830->Dummy), 0, sizeof(pI830->Dummy));
-   pI830->Dummy.Key =
-	xf86AllocateGARTMemory(pScrn->scrnIndex, size, 0, NULL);
-   pI830->Dummy.Offset = 0;
+   if (!dryrun) {
+      memset(&(pI830->Dummy), 0, sizeof(pI830->Dummy));
+      pI830->Dummy.Key =
+	   xf86AllocateGARTMemory(pScrn->scrnIndex, size, 0, NULL);
+      pI830->Dummy.Offset = 0;
+   }
 #endif
 
    /* Clear cursor info */
@@ -532,97 +614,113 @@ I830Allocate2DMemory(ScrnInfoPtr pScrn, Bool initial)
    pI830->CursorMem.Key = -1;
 
    if (!pI830->SWCursor) {
-
+      int cursFlags = 0;
       /*
-       * Mouse cursor -- The i810-i830 (crazy) need a physical address in
-       * system memory from which to upload the cursor.  We get this from
+       * Mouse cursor -- The i810-i830 need a physical address in system
+       * memory from which to upload the cursor.  We get this from
        * the agpgart module using a special memory type.
        */
 
-      /*
-       * 4k for the cursor is excessive, but the minimum allocation is
-       * one 4k page.
-       */
-
       size = HWCURSOR_SIZE;
-      flags = FROM_ANYWHERE | ALLOCATE_AT_TOP;
+      cursFlags = FROM_ANYWHERE | ALLOCATE_AT_TOP;
       if (pI830->CursorNeedsPhysical)
-	 flags |= NEED_PHYSICAL_ADDR;
+	 cursFlags |= NEED_PHYSICAL_ADDR;
 
       alloced = I830AllocVidMem(pScrn, &(pI830->CursorMem),
 				&(pI830->StolenPool), size,
-				GTT_PAGE_SIZE, flags);
+				GTT_PAGE_SIZE, flags | cursFlags);
       if (alloced < size) {
-	 xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-		    "Failed to allocate HW cursor space.\n");
-	 return FALSE;
+	 if (!dryrun) {
+	    xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+		       "Failed to allocate HW cursor space.\n");
+	 }
+      } else {
+	 xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, verbosity,
+			"%sAllocated %d kB for HW cursor at 0x%x", s,
+			alloced / 1024, pI830->CursorMem.Start);
+	 if (pI830->CursorNeedsPhysical)
+	    xf86ErrorFVerb(verbosity, " (0x%08x)", pI830->CursorMem.Physical);
+	 xf86ErrorFVerb(verbosity, "\n");
       }
-      xf86DrvMsg(pScrn->scrnIndex, X_INFO,
-		 "Allocated %d kB for HW cursor at 0x%x",
-		 alloced / 1024, pI830->CursorMem.Start);
-      if (pI830->CursorNeedsPhysical)
-	 xf86ErrorF(" (0x%08x)", pI830->CursorMem.Physical);
-      xf86ErrorF("\n");
-
    }
 
-
-   if (!pI830->NeedRingBufferLow)
-      AllocateRingBuffer(pScrn, FALSE);
-
 #ifdef I830_XV
-   AllocateOverlay(pScrn, FALSE);
+   AllocateOverlay(pScrn, flags);
 #endif
 
+   if (!pI830->NeedRingBufferLow)
+      AllocateRingBuffer(pScrn, flags);
+
    /* Clear scratch info */
    memset(&(pI830->Scratch), 0, sizeof(pI830->Scratch));
    pI830->Scratch.Key = -1;
 
    if (!pI830->noAccel) {
       size = MAX_SCRATCH_BUFFER_SIZE;
-      flags = FROM_ANYWHERE | ALLOCATE_AT_TOP;
       alloced = I830AllocVidMem(pScrn, &(pI830->Scratch), &(pI830->StolenPool),
-				size, GTT_PAGE_SIZE, flags);
+				size, GTT_PAGE_SIZE,
+				flags | FROM_ANYWHERE | ALLOCATE_AT_TOP);
       if (alloced < size) {
 	 size = MIN_SCRATCH_BUFFER_SIZE;
          alloced = I830AllocVidMem(pScrn, &(pI830->Scratch),
 				   &(pI830->StolenPool), size,
-				   GTT_PAGE_SIZE, flags);
+				   GTT_PAGE_SIZE,
+				   flags | FROM_ANYWHERE | ALLOCATE_AT_TOP);
       }
       if (alloced < size) {
-	 xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-		    "Failed to allocate scratch buffer space\n");
+	 if (!dryrun) {
+	    xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+		       "Failed to allocate scratch buffer space\n");
+	 }
 	 return FALSE;
       }
-      xf86DrvMsg(pScrn->scrnIndex, X_INFO,
-		 "Allocated %d kB for the scratch buffer at 0x%x\n",
-		 alloced / 1024, pI830->Scratch.Start);
+      xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, verbosity,
+		    "%sAllocated %d kB for the scratch buffer at 0x%x\n", s,
+		    alloced / 1024, pI830->Scratch.Start);
    }
    return TRUE;
 }
 
-#ifdef XF86DRI
-static Bool
-IsTileable(int pitch)
+#ifndef ALLOCATE_ALL_BIOSMEM
+#define ALLOCATE_ALL_BIOSMEM 1
+#endif
+
+void
+I830ResetAllocations(ScrnInfoPtr pScrn, const int flags)
 {
-   /*
-    * Allow tiling for pitches that are a power of 2 multiple of 128 bytes,
-    * up to 64 * 128 (= 8192) bytes.
-    */
-   switch (pitch) {
-   case 128 * 1:
-   case 128 * 2:
-   case 128 * 4:
-   case 128 * 8:
-   case 128 * 16:
-   case 128 * 32:
-   case 128 * 64:
-      return TRUE;
-   default:
-      return FALSE;
+   I830Ptr pI830 = I830PTR(pScrn);
+
+   pI830->MemoryAperture.Start = pI830->StolenMemory.End;
+   pI830->MemoryAperture.End = pI830->FbMapSize;
+   pI830->MemoryAperture.Size = pI830->FbMapSize - pI830->StolenMemory.Size;
+   pI830->StolenPool.Fixed = pI830->StolenMemory;
+   pI830->StolenPool.Total = pI830->StolenMemory;
+#if ALLOCATE_ALL_BIOSMEM
+   if (pI830->overrideBIOSMemSize &&
+       pI830->BIOSMemorySize > pI830->StolenMemory.Size) {
+      pI830->StolenPool.Total.End = pI830->BIOSMemorySize;
+      pI830->StolenPool.Total.Size = pI830->BIOSMemorySize;
    }
+#endif
+   pI830->StolenPool.Free = pI830->StolenPool.Total;
+   pI830->FreeMemory = pI830->TotalVideoRam - pI830->StolenPool.Total.Size;
+   pI830->allocatedMemory = 0;
 }
 
+long
+I830GetExcessMemoryAllocations(ScrnInfoPtr pScrn)
+{
+   I830Ptr pI830 = I830PTR(pScrn);
+   unsigned long allocated;
+
+   allocated = pI830->StolenPool.Total.Size + pI830->allocatedMemory;
+   if (allocated > pI830->TotalVideoRam)
+      return allocated - pI830->TotalVideoRam;
+   else
+      return 0;
+}
+
+#ifdef XF86DRI
 static unsigned long
 GetBestTileAlignment(unsigned long size)
 {
@@ -650,21 +748,32 @@ myLog2(unsigned int n)
 }
 
 Bool
-I830Allocate3DMemory(ScrnInfoPtr pScrn)
+I830Allocate3DMemory(ScrnInfoPtr pScrn, const int flags)
 {
    I830Ptr pI830 = I830PTR(pScrn);
    unsigned long size, alloced, align = 0;
-   int flags, i;
+   int i;
    Bool tileable;
+   Bool dryrun = ((flags & ALLOCATE_DRY_RUN) != 0);
+   int verbosity = dryrun ? 4 : 1;
+   const char *s = dryrun ? "[dryrun] " : "";
+   int lines;
 
    DPRINTF(PFX, "I830Allocate3DMemory\n");
 
    /* Back Buffer */
    memset(&(pI830->BackBuffer), 0, sizeof(pI830->BackBuffer));
    pI830->BackBuffer.Key = -1;
-   tileable = IsTileable(pScrn->displayWidth * pI830->cpp);
-   size = ROUND_TO_PAGE(pScrn->displayWidth * pScrn->virtualY * pI830->cpp);
-   flags = FROM_ANYWHERE | ALLOCATE_AT_TOP;
+   tileable = !(flags & ALLOC_NO_TILING) &&
+	      IsTileable(pScrn->displayWidth * pI830->cpp);
+   if (tileable) {
+      /* Make the height a multiple of the tile height (16) */
+      lines = (pScrn->virtualY + 15) / 16 * 16;
+   } else {
+      lines = pScrn->virtualY;
+   }
+
+   size = ROUND_TO_PAGE(pScrn->displayWidth * lines * pI830->cpp);
    /*
     * Try to allocate on the best tile-friendly boundaries.
     */
@@ -674,7 +783,8 @@ I830Allocate3DMemory(ScrnInfoPtr pScrn)
       for (align = GetBestTileAlignment(size); align >= KB(512); align >>= 1) {
 	 alloced = I830AllocVidMem(pScrn, &(pI830->BackBuffer),
 				   &(pI830->StolenPool), size, align,
-				   flags | ALIGN_BOTH_ENDS);
+				   flags | FROM_ANYWHERE | ALLOCATE_AT_TOP |
+				   ALIGN_BOTH_ENDS);
 	 if (alloced >= size)
 	    break;
       }
@@ -682,18 +792,22 @@ I830Allocate3DMemory(ScrnInfoPtr pScrn)
    if (alloced < size) {
       /* Give up on trying to tile */
       tileable = FALSE;
+      size = ROUND_TO_PAGE(pScrn->displayWidth * pScrn->virtualY * pI830->cpp);
       align = GTT_PAGE_SIZE;
       alloced = I830AllocVidMem(pScrn, &(pI830->BackBuffer),
-				   &(pI830->StolenPool), size, align, flags);
+				&(pI830->StolenPool), size, align,
+				flags | FROM_ANYWHERE | ALLOCATE_AT_TOP);
    }
    if (alloced < size) {
-      xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-		 "Failed to allocate back buffer space\n");
+      if (!dryrun) {
+	 xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+		    "Failed to allocate back buffer space.\n");
+      }
       return FALSE;
    }
-   xf86DrvMsg(pScrn->scrnIndex, X_INFO,
-	      "Allocated %d kB for the back buffer at 0x%x\n",
-	      alloced / 1024, pI830->BackBuffer.Start);
+   xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, verbosity,
+		  "%sAllocated %d kB for the back buffer at 0x%x.\n", s,
+		  alloced / 1024, pI830->BackBuffer.Start);
 
    /* Depth Buffer -- same size as the back buffer */
    memset(&(pI830->DepthBuffer), 0, sizeof(pI830->DepthBuffer));
@@ -707,7 +821,8 @@ I830Allocate3DMemory(ScrnInfoPtr pScrn)
       for (; align >= KB(512); align >>= 1) {
 	 alloced = I830AllocVidMem(pScrn, &(pI830->DepthBuffer),
 				   &(pI830->StolenPool), size, align,
-				   flags | ALIGN_BOTH_ENDS);
+				   flags | FROM_ANYWHERE | ALLOCATE_AT_TOP |
+				   ALIGN_BOTH_ENDS);
 	 if (alloced >= size)
 	    break;
       }
@@ -715,34 +830,40 @@ I830Allocate3DMemory(ScrnInfoPtr pScrn)
    if (alloced < size) {
       /* Give up on trying to tile */
       tileable = FALSE;
+      size = ROUND_TO_PAGE(pScrn->displayWidth * pScrn->virtualY * pI830->cpp);
       align = GTT_PAGE_SIZE;
       alloced = I830AllocVidMem(pScrn, &(pI830->DepthBuffer),
-				   &(pI830->StolenPool), size, align, flags);
+				&(pI830->StolenPool), size, align,
+				flags | FROM_ANYWHERE | ALLOCATE_AT_TOP);
    }
    if (alloced < size) {
-      xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-		 "Failed to allocate depth buffer space\n");
+      if (!dryrun) {
+	 xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+		    "Failed to allocate depth buffer space.\n");
+      }
       return FALSE;
    }
-   xf86DrvMsg(pScrn->scrnIndex, X_INFO,
-	      "Allocated %d kB for the depth buffer at 0x%x\n",
-	      alloced / 1024, pI830->DepthBuffer.Start);
+   xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, verbosity,
+		  "%sAllocated %d kB for the depth buffer at 0x%x.\n", s,
+		  alloced / 1024, pI830->DepthBuffer.Start);
 
    /* Space for logical context.  32k is fine for right now. */
    memset(&(pI830->ContextMem), 0, sizeof(pI830->ContextMem));
    pI830->ContextMem.Key = -1;
    size = KB(32);
-   flags = FROM_ANYWHERE | ALLOCATE_AT_TOP;
    alloced = I830AllocVidMem(pScrn, &(pI830->ContextMem),
-			     &(pI830->StolenPool), size, GTT_PAGE_SIZE, flags);
+			     &(pI830->StolenPool), size, GTT_PAGE_SIZE,
+			     flags | FROM_ANYWHERE | ALLOCATE_AT_TOP);
    if (alloced < size) {
-      xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-		 "Failed to allocate logical context space\n");
+      if (!dryrun) {
+	 xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+		    "Failed to allocate logical context space.\n");
+      }
       return FALSE;
    }
-   xf86DrvMsg(pScrn->scrnIndex, X_INFO,
-	      "Allocated %d kB for the logical context at 0x%x\n",
-	      alloced / 1024, pI830->ContextMem.Start);
+   xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, verbosity,
+		  "%sAllocated %d kB for the logical context at 0x%x.\n", s,
+		  alloced / 1024, pI830->ContextMem.Start);
 
    /*
     * Space for DMA buffers, only if there's enough free for at least 1MB
@@ -752,22 +873,26 @@ I830Allocate3DMemory(ScrnInfoPtr pScrn)
    pI830->BufferMem.Key = -1;
    /* This should already be a page multiple */
    size = I830_DMA_BUF_NR * I830_DMA_BUF_SZ;
-   if (GetFreeSpace(pScrn) >= size + MB(1)) {
-      flags = FROM_ANYWHERE | ALLOCATE_AT_TOP;
+   if (dryrun || (GetFreeSpace(pScrn) >= size + MB(1))) {
       alloced = I830AllocVidMem(pScrn, &(pI830->BufferMem),
 				&(pI830->StolenPool), size,
-				GTT_PAGE_SIZE, flags);
+				GTT_PAGE_SIZE,
+				flags | FROM_ANYWHERE | ALLOCATE_AT_TOP);
       if (alloced < size) {
-	 xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-		    "Failed to allocate DMA buffer space\n");
+	 if (!dryrun) {
+	    xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+		       "Failed to allocate DMA buffer space.\n");
+	 }
 	 return FALSE;
       }
-      xf86DrvMsg(pScrn->scrnIndex, X_INFO,
-		 "Allocated %d kB for the DMA buffers at 0x%x\n",
-		 alloced / 1024, pI830->BufferMem.Start);
+      xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, verbosity,
+		     "%sAllocated %d kB for the DMA buffers at 0x%x.\n", s,
+		     alloced / 1024, pI830->BufferMem.Start);
    } else {
-      xf86DrvMsg(pScrn->scrnIndex, X_INFO,
-		 "Not enough free space for DMA buffers\n");
+      if (!dryrun) {
+	 xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+		    "Not enough free space for DMA buffers.\n");
+      }
       return FALSE;
    }
 
@@ -775,6 +900,8 @@ I830Allocate3DMemory(ScrnInfoPtr pScrn)
    memset(&(pI830->TexMem), 0, sizeof(pI830->TexMem));
    pI830->TexMem.Key = -1;
    size = GetFreeSpace(pScrn);
+   if (dryrun && (size < MB(1)))
+      size = MB(1);
    i = myLog2(size / I830_NR_TEX_REGIONS);
    if (i < I830_LOG_MIN_TEX_REGION_SIZE)
       i = I830_LOG_MIN_TEX_REGION_SIZE;
@@ -783,21 +910,25 @@ I830Allocate3DMemory(ScrnInfoPtr pScrn)
    size >>= i;
    size <<= i;
    if (size < KB(512)) {
-      xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-		 "Less than %d kBytes for texture space\n", size / 1024);
+      if (!dryrun) {
+	 xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+		    "Less than %d kBytes for texture space.\n", size / 1024);
+      }
       return FALSE;
    }
-   flags = FROM_ANYWHERE | ALLOCATE_AT_TOP;
    alloced = I830AllocVidMem(pScrn, &(pI830->TexMem),
-			     &(pI830->StolenPool), size, GTT_PAGE_SIZE, flags);
+			     &(pI830->StolenPool), size, GTT_PAGE_SIZE,
+			     flags | FROM_ANYWHERE | ALLOCATE_AT_TOP);
    if (alloced < size) {
-      xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-		 "Failed to allocate texture space\n");
+      if (!dryrun) {
+	 xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+		    "Failed to allocate texture space.\n");
+      }
       return FALSE;
    }
-   xf86DrvMsg(pScrn->scrnIndex, X_INFO,
-	      "Allocated %d kB for textures at 0x%x\n",
-	      alloced / 1024, pI830->TexMem.Start);
+   xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, verbosity,
+		  "%sAllocated %d kB for textures at 0x%x\n", s,
+		  alloced / 1024, pI830->TexMem.Start);
 
    return TRUE;
 }
@@ -859,7 +990,7 @@ static unsigned long topOfMem = 0;
  * following options.
  *
  * XXX Write a better description.
- * 
+ *
  */
 #define PACK_RANGES 0
 #define POOL_RANGES 0
@@ -884,7 +1015,7 @@ FixOffset(ScrnInfoPtr pScrn, I830MemRange *mem)
     * a contiguous region in the aperture.  Normally most AGP-allocated areas
     * will be at the top of the aperture, making alignment requirements
     * easier to achieve.  This optin is primarily for debugging purposes,
-    * and using this option can break any special alignment requirements.  
+    * and using this option can break any special alignment requirements.
     */
    if (!mem->Pool && mem->Start != 0 && mem->Key != -1 && mem->Physical == 0 &&
 	mem->Offset != 0) {
@@ -961,7 +1092,7 @@ I830FixupOffsets(ScrnInfoPtr pScrn)
  * Need to make it less likely that we miss out on this - probably
  * need to move the frontbuffer away from the 'guarenteed' alignment
  * of the first memory segment, or perhaps allocate a discontigous
- * framebuffer to get more alignment 'sweet spots'.  
+ * framebuffer to get more alignment 'sweet spots'.
  */
 static void
 SetFence(ScrnInfoPtr pScrn, int nr, unsigned int start, unsigned int pitch,
@@ -1071,15 +1202,19 @@ SetFence(ScrnInfoPtr pScrn, int nr, unsigned int start, unsigned int pitch,
 }
 
 static Bool
-MakeTiles(ScrnInfoPtr pScrn, const I830MemRange *pMem)
+MakeTiles(ScrnInfoPtr pScrn, I830MemRange *pMem)
 {
    I830Ptr pI830 = I830PTR(pScrn);
    int pitch, ntiles, i;
    static int nextTile = 0;
-   static unsigned long tileGeneration = 0;
+   static int tileGeneration = -1;
 
-   DPRINTF(PFX, "MakeTiles: start 0x%08x, size %d kByte, align 0x%08x\n",
-	   pMem->Start, pMem->Size, pMem->Alignment);
+#if 0
+   /* Hack to "improve" the alignment of the front buffer.
+    */
+   while (!(pMem->Start & ~pMem->Alignment) && pMem->Alignment < 0x00400000 )
+      pMem->Alignment <<= 1;
+#endif
 
    if (tileGeneration != serverGeneration) {
       tileGeneration = serverGeneration;
@@ -1092,8 +1227,9 @@ MakeTiles(ScrnInfoPtr pScrn, const I830MemRange *pMem)
     * equal to the alignment.
     */
    ntiles = ROUND_TO(pMem->Size, pMem->Alignment) / pMem->Alignment;
-   if (ntiles >= 4)
+   if (ntiles >= 4) {
       return FALSE;
+   }
 
    for (i = 0; i < ntiles; i++, nextTile++) {
       SetFence(pScrn, nextTile, pMem->Start + i * pMem->Alignment,
@@ -1111,8 +1247,30 @@ I830SetupMemoryTiling(ScrnInfoPtr pScrn)
    if (!pI830->directRenderingEnabled)
       return;
 
-   if (!IsTileable(pScrn->displayWidth * pI830->cpp))
+   if (!IsTileable(pScrn->displayWidth * pI830->cpp)) {
+      xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+		 "I830SetupMemoryTiling: Not tileable 0x%x\n",
+		 pScrn->displayWidth * pI830->cpp);
+      pI830->allowPageFlip = FALSE;
       return;
+   }
+
+   if (pI830->allowPageFlip) {
+      if (pI830->allowPageFlip && pI830->FrontBuffer.Alignment >= KB(512)) {
+	 if (MakeTiles(pScrn, &(pI830->FrontBuffer))) {
+	    xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+		       "Activating tiled memory for the FRONT buffer\n");
+	 } else {
+	    pI830->allowPageFlip = FALSE;
+	    xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+		       "MakeTiles failed for the FRONT buffer\n");
+	 }
+      } else {
+	 pI830->allowPageFlip = FALSE;
+	 xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+		 "Alignment bad for the FRONT buffer\n");
+      }
+   }
 
    /*
     * We tried to get the best alignment during the allocation.  Check
@@ -1120,15 +1278,27 @@ I830SetupMemoryTiling(ScrnInfoPtr pScrn)
     * successful, the address range reserved is a multiple of the align
     * value.
     */
-   if (pI830->BackBuffer.Alignment >= KB(512))
-      if (MakeTiles(pScrn, &(pI830->BackBuffer)))
+   if (pI830->BackBuffer.Alignment >= KB(512)) {
+      if (MakeTiles(pScrn, &(pI830->BackBuffer))) {
 	 xf86DrvMsg(pScrn->scrnIndex, X_INFO,
 		    "Activating tiled memory for the back buffer.\n");
+      } else {
+	 xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+		    "MakeTiles failed for the back buffer.\n");
+	 pI830->allowPageFlip = FALSE;
+      }
+   }
 
-   if (pI830->DepthBuffer.Alignment >= KB(512))
-      if (MakeTiles(pScrn, &(pI830->DepthBuffer)))
+   if (pI830->DepthBuffer.Alignment >= KB(512)) {
+      if (MakeTiles(pScrn, &(pI830->DepthBuffer))) {
 	 xf86DrvMsg(pScrn->scrnIndex, X_INFO,
 		    "Activating tiled memory for the depth buffer.\n");
+      } else {
+	 xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+		    "MakeTiles failed for the back buffer.\n");
+      }
+   }
+	
 }
 #endif /* XF86DRI */
 
@@ -1164,7 +1334,7 @@ I830BindGARTMemory(ScrnInfoPtr pScrn)
       /* Rebind the pre-allocated region. */
       BindMemRange(pScrn, &(pI830->Dummy));
 #endif
-      
+
       if (!BindMemRange(pScrn, &(pI830->StolenPool.Allocated)))
 	 return FALSE;
       if (!BindMemRange(pScrn, &(pI830->FrontBuffer)))
@@ -1230,7 +1400,7 @@ I830UnbindGARTMemory(ScrnInfoPtr pScrn)
       /* "unbind" the pre-allocated region. */
       UnbindMemRange(pScrn, &(pI830->Dummy));
 #endif
-      
+
       if (!UnbindMemRange(pScrn, &(pI830->StolenPool.Allocated)))
 	 return FALSE;
       if (!UnbindMemRange(pScrn, &(pI830->FrontBuffer)))
@@ -1259,13 +1429,16 @@ I830UnbindGARTMemory(ScrnInfoPtr pScrn)
 	    return FALSE;
       }
 #endif
+      if (!xf86ReleaseGART(pScrn->scrnIndex))
+	 return FALSE;
+
       pI830->GttBound = 0;
    }
 
    return TRUE;
 }
 
-int
+long
 I830CheckAvailableMemory(ScrnInfoPtr pScrn)
 {
    AgpInfoPtr agpinf;
@@ -1278,7 +1451,7 @@ I830CheckAvailableMemory(ScrnInfoPtr pScrn)
       return -1;
 
    maxPages = agpinf->totalPages - agpinf->usedPages;
-   xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 2, "%s: %dk available\n",
+   xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 2, "%s: %d kB available\n",
 		  "I830CheckAvailableMemory", maxPages * 4);
 
    return maxPages * 4;
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/i810/i830_video.c b/xc/programs/Xserver/hw/xfree86/drivers/i810/i830_video.c
index 150ed6302..25f9716b5 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/i810/i830_video.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/i810/i830_video.c
@@ -24,7 +24,7 @@ OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR
 THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i830_video.c,v 1.1 2002/09/12 04:08:25 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i830_video.c,v 1.6 2003/02/06 04:18:05 dawes Exp $ */
 
 /*
  * Reformatted with GNU indent (2.2.8), using the following options:
@@ -78,6 +78,10 @@ THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "dixstruct.h"
 #include "fourcc.h"
 
+#ifndef USE_USLEEP_FOR_VIDEO
+#define USE_USLEEP_FOR_VIDEO 0
+#endif
+
 #define OFF_DELAY 	250		/* milliseconds */
 #define FREE_DELAY 	15000
 
@@ -205,6 +209,9 @@ Edummy(const char *dummy, ...)
 
 /* OCONFIG register */
 #define CC_OUT_8BIT		(0x1<<3)
+#define OVERLAY_PIPE_MASK	(0x1<<18)		
+#define OVERLAY_PIPE_A		(0x0<<18)		
+#define OVERLAY_PIPE_B		(0x1<<18)		
 
 /* DCLRKM register */
 #define DEST_KEY_ENABLE		(0x1<<31)
@@ -347,6 +354,9 @@ typedef struct {
    FBLinearPtr linear;
 
    I830OverlayStateRec hwstate;
+
+   Bool refreshOK;
+   int maxRate;
 } I830PortPrivRec, *I830PortPrivPtr;
 
 #define GET_PORT_PRIVATE(pScrn) \
@@ -484,6 +494,15 @@ I830ResetVideo(ScrnInfoPtr pScrn)
    overlay->SCLRKEN = 0;		/* source color key disable */
    overlay->OCONFIG = CC_OUT_8BIT;
 
+   /*
+    * Select which pipe the overlay is enabled on.  Give preference to
+    * pipe A.
+    */
+   if (pI830->pipeEnabled[0])
+      overlay->OCONFIG |= OVERLAY_PIPE_A;
+   else if (pI830->pipeEnabled[1])
+      overlay->OCONFIG |= OVERLAY_PIPE_B;
+
    overlay->OCMD = YUV_420;
 
    /* setup hwstate */
@@ -517,6 +536,25 @@ I830ResetVideo(ScrnInfoPtr pScrn)
 
 }
 
+/*
+ * Each chipset has a limit on the pixel rate that the video overlay can
+ * be used for.  Enabling the overlay above that limit can result in a
+ * lockup.  These two functions check the pixel rate for the new mode
+ * and turn the overlay off before switching to the new mode if it exceeds
+ * the limit, or turn it back on if the new mode is below the limit.
+ */
+
+/*
+ * Approximate pixel rate limits for the video overlay.
+ * The rate is calculated based on the mode resolution and refresh rate.
+ */
+#define I830_OVERLAY_RATE	 79	/* 1024x768@85, 1280x1024@60 */
+#define I845_OVERLAY_RATE	120	/* 1280x1024@85, 1600x1200@60 */
+#define I852_OVERLAY_RATE	 79	/* 1024x768@85, 1280x1024@60 */
+#define I855_OVERLAY_RATE	120	/* 1280x1024@85, 1600x1200@60 */
+#define I865_OVERLAY_RATE	170	/* 1600x1200@85, 1920x1440@60 */
+#define DEFAULT_OVERLAY_RATE	120
+
 static XF86VideoAdaptorPtr
 I830SetupImageVideo(ScreenPtr pScreen)
 {
@@ -533,7 +571,7 @@ I830SetupImageVideo(ScreenPtr pScreen)
 
    adapt->type = XvWindowMask | XvInputMask | XvImageMask;
    adapt->flags = VIDEO_OVERLAID_IMAGES | VIDEO_CLIP_TO_VIEWPORT;
-   adapt->name = "I830/I845G Video Overlay";
+   adapt->name = "Intel(R) 830M/845G/852GM/855GM/865G Video Overlay";
    adapt->nEncodings = 1;
    adapt->pEncodings = DummyEncoding;
    adapt->nFormats = NUM_FORMATS;
@@ -566,11 +604,40 @@ I830SetupImageVideo(ScreenPtr pScreen)
    pPriv->linear = NULL;
    pPriv->currentBuf = 0;
 
+   switch (pI830->PciInfo->chipType) {
+   case PCI_CHIP_I830_M:
+      pPriv->maxRate = I830_OVERLAY_RATE;
+      break;
+   case PCI_CHIP_845_G:
+      pPriv->maxRate = I845_OVERLAY_RATE;
+      break;
+   case PCI_CHIP_I855_GM:
+      switch (pI830->variant) {
+      case I852_GM:
+      case I852_GME:
+	 pPriv->maxRate = I852_OVERLAY_RATE;
+	 break;
+      default:
+	 pPriv->maxRate = I855_OVERLAY_RATE;
+	 break;
+      }
+      break;
+   case PCI_CHIP_I865_G:
+      pPriv->maxRate = I865_OVERLAY_RATE;
+      break;
+   default:
+      pPriv->maxRate = DEFAULT_OVERLAY_RATE;
+      break;
+   }
+
    /* gotta uninit this someplace */
    REGION_INIT(pScreen, &pPriv->clip, NullBox, 0);
 
    pI830->adaptor = adapt;
 
+   /* Initialise pPriv->refreshOK */
+   I830VideoSwitchModeAfter(pScrn, pScrn->currentMode);
+
    pI830->BlockHandler = pScreen->BlockHandler;
    pScreen->BlockHandler = I830BlockHandler;
 
@@ -659,13 +726,15 @@ I830SetPortAttribute(ScrnInfoPtr pScrn,
 	 return BadValue;
       pPriv->brightness = value;
       overlay->OCLRC0 = (pPriv->contrast << 18) | (pPriv->brightness & 0xff);
-      OVERLAY_UPDATE;
+      if (pPriv->refreshOK)
+         OVERLAY_UPDATE;
    } else if (attribute == xvContrast) {
       if ((value < 0) || (value > 255))
 	 return BadValue;
       pPriv->contrast = value;
       overlay->OCLRC0 = (pPriv->contrast << 18) | (pPriv->brightness & 0xff);
-      OVERLAY_UPDATE;
+      if (pPriv->refreshOK)
+         OVERLAY_UPDATE;
    } else if (attribute == xvColorKey) {
       pPriv->colorKey = value;
       switch (pScrn->depth) {
@@ -679,7 +748,8 @@ I830SetPortAttribute(ScrnInfoPtr pScrn,
 	 overlay->DCLRKV = pPriv->colorKey;
 	 break;
       }
-      OVERLAY_UPDATE;
+      if (pPriv->refreshOK)
+         OVERLAY_UPDATE;
       REGION_EMPTY(pScrn->pScreen, &pPriv->clip);
    } else
       return BadMatch;
@@ -968,6 +1038,9 @@ I830DisplayVideo(ScrnInfoPtr pScrn, int id, short width, short height,
    DPRINTF(PFX, "I830DisplayVideo: %dx%d (pitch %d)\n", width, height,
 	   dstPitch);
 
+   if (!pPriv->refreshOK)
+      return;
+
    CompareOverlay(pI830, (CARD32 *) overlay, 0x100);
 
    switch (id) {
@@ -1117,6 +1190,10 @@ I830DisplayVideo(ScrnInfoPtr pScrn, int id, short width, short height,
       }
 
       /* Recalculate coefficients if the scaling changed. */
+	
+      /*
+       * Only Horizontal coefficients so far.
+       */
       if (scaleChanged) {
 	 double fCutoffY;
 	 double fCutoffUV;
@@ -1311,6 +1388,9 @@ I830PutImage(ScrnInfoPtr pScrn,
    /* Make sure this buffer isn't in use */
    loops = 0;
    while (loops < 1000000) {
+#if USE_USLEEP_FOR_VIDEO
+      usleep(10);
+#endif
       if (((INREG(DOVSTA) & OC_BUF) >> 20) == pPriv->currentBuf) {
 	 break;
       }
@@ -1650,6 +1730,9 @@ I830DisplaySurface(XF86SurfacePtr surface,
 
    /* wait for the last rendered buffer to be flipped in */
    while (((INREG(DOVSTA) & OC_BUF) >> 20) != pI830Priv->currentBuf) {
+#if USE_USLEEP_FOR_VIDEO
+      usleep(10);
+#endif
       if (loops == 200000) {
 	 xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Overlay Lockup\n");
 	 break;
@@ -1709,3 +1792,49 @@ I830InitOffscreenImages(ScreenPtr pScreen)
 
    xf86XVRegisterOffscreenImages(pScreen, offscreenImages, 1);
 }
+
+void
+I830VideoSwitchModeBefore(ScrnInfoPtr pScrn, DisplayModePtr mode)
+{
+   I830PortPrivPtr pPriv;
+   int pixrate;
+
+   if (!I830PTR(pScrn)->adaptor) {
+      return;
+   }
+
+   pPriv = GET_PORT_PRIVATE(pScrn);
+
+   if (!pPriv) {
+      xf86ErrorF("pPriv isn't set\n");
+      return;
+   }
+
+   pixrate = mode->HDisplay * mode->VDisplay * mode->VRefresh;
+   if (pixrate > pPriv->maxRate && pPriv->refreshOK) {
+      I830StopVideo(pScrn, pPriv, TRUE);
+      pPriv->refreshOK = FALSE;
+   }
+}
+
+void
+I830VideoSwitchModeAfter(ScrnInfoPtr pScrn, DisplayModePtr mode)
+{
+   I830PortPrivPtr pPriv;
+   int pixrate;
+
+   if (!I830PTR(pScrn)->adaptor) {
+      return;
+   }
+   pPriv = GET_PORT_PRIVATE(pScrn);
+   if (!pPriv)
+      return;
+
+   /* If this isn't initialised, assume 60Hz. */
+   if (mode->VRefresh == 0)
+      mode->VRefresh = 60;
+
+   pixrate = (mode->HDisplay * mode->VDisplay * mode->VRefresh) / 1000000;
+   pPriv->refreshOK = (pixrate <= pPriv->maxRate);
+}
+
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/mga/Imakefile b/xc/programs/Xserver/hw/xfree86/drivers/mga/Imakefile
index bec8e9705..cb06de249 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/mga/Imakefile
+++ b/xc/programs/Xserver/hw/xfree86/drivers/mga/Imakefile
@@ -1,4 +1,4 @@
-XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/Imakefile,v 1.44 2002/09/16 18:05:55 eich Exp $
+XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/Imakefile,v 1.46 2003/02/17 17:06:42 dawes Exp $
 XCOMM
 XCOMM This is an Imakefile for the MGA driver.
 XCOMM
@@ -80,7 +80,7 @@ INCLUDES = -I. $(MGAHALINCLUDES) -I$(XF86COMSRC) -I$(XF86OSSRC) \
            -I$(FONTINCSRC) -I$(SERVERSRC)/include -I$(XINCLUDESRC) \
            -I$(XF86SRC)/xf24_32bpp -I$(XF86SRC)/shadowfb -I$(EXTINCSRC) \
 	   -I$(SERVERSRC)/render \
-	   -I$(XF86OSSRC)/vbe $(DRIINCLUDES)
+	   -I$(XF86SRC)/vbe $(DRIINCLUDES)
 #endif
 
 DEFINES = $(MGAHALDEFINES) $(DRIDEFINES)
@@ -132,6 +132,7 @@ InstallDriverSDKNonExecFile(mga_shadow.c,$(DRIVERSDKDIR)/drivers/mga)
 InstallDriverSDKNonExecFile(mga_storm.c,$(DRIVERSDKDIR)/drivers/mga)
 InstallDriverSDKNonExecFile(mga_video.c,$(DRIVERSDKDIR)/drivers/mga)
 InstallDriverSDKNonExecFile(mga_halmod.c,$(DRIVERSDKDIR)/drivers/mga)
+InstallDriverSDKNonExecFile(mga_common.h,$(DRIVERSDKDIR)/drivers/mga)
 
 InstallDriverSDKObjectModule(mga,$(DRIVERSDKMODULEDIR),drivers)
 #if BuildMatroxHal
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/mga/mga.h b/xc/programs/Xserver/hw/xfree86/drivers/mga/mga.h
index d875a3efb..5cb9750a7 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/mga/mga.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/mga/mga.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga.h,v 1.83 2002/09/16 18:05:55 eich Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga.h,v 1.85 2002/12/16 16:19:17 dawes Exp $ */
 /*
  * MGA Millennium (MGA2064W) functions
  *
@@ -401,8 +401,10 @@ typedef struct {
     void		(*GetQuiescence)(ScrnInfoPtr pScrn);
 
     int 		agpMode;
-    int		agpSize;
+    int                 agpSize;
 
+    int                 irq;
+    CARD32              reg_ien;
 #endif
     XF86VideoAdaptorPtr adaptor;
     Bool		DualHeadEnabled;
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/mga/mga.man b/xc/programs/Xserver/hw/xfree86/drivers/mga/mga.man
index a95cddab8..b1b3337a0 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/mga/mga.man
+++ b/xc/programs/Xserver/hw/xfree86/drivers/mga/mga.man
@@ -1,4 +1,4 @@
-.\" $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga.man,v 1.5 2002/02/20 17:17:50 dawes Exp $ 
+.\" $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga.man,v 1.6 2003/01/26 02:17:28 dawes Exp $ 
 .\" shorthand for double quote that works everywhere.
 .ds q \N'34'
 .TH MGA __drivermansuffix__ __vendorversion__
@@ -26,7 +26,10 @@ either
 or video overlay.  The second head of dual-head cards is supported for
 the G450 and G550.  Support for the second head on G400 cards requires
 a binary-only "mga_hal" module that is available from Matrox
-<http://www.matrox.com>.  That module also provides various other enhancements.
+<http://www.matrox.com>, and may be on the CD supplied with the card. 
+That module also provides various other enhancements,
+and may be necessary to use the DVI (digital) output on the G550
+(and other cards).
 .SH SUPPORTED HARDWARE
 The
 .B mga
@@ -150,4 +153,4 @@ XFree86(1), XF86Config(__filemansuffix__), xf86config(1), Xserver(1), X(__miscma
 .SH AUTHORS
 Authors include: Radoslaw Kapitan, Mark Vojkovich, and also David Dawes, Guy
 Desbief, Dirk Hohndel, Doug Merritt, Andrew E. Mileski, Andrew van der Stock,
-Leonard N. Zubkoff.
+Leonard N. Zubkoff, Andrew C. Aitchison.
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dri.c b/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dri.c
index fdc7c088e..37d3a9a6f 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dri.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dri.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dri.c,v 1.24 2002/10/08 22:14:08 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dri.c,v 1.28 2003/02/08 21:26:58 dawes Exp $ */
 
 /*
  * Copyright 2000 VA Linux Systems Inc., Fremont, California.
@@ -24,7 +24,7 @@
  * OTHER DEALINGS IN THE SOFTWARE.
  *
  * Authors:
- *    Keith WHitwell <keithw@valinux.com>
+ *    Keith Whitwell <keith@tungstengraphics.com>
  *    Gareth Hughes <gareth@valinux.com>
  */
 
@@ -251,11 +251,11 @@ static Bool MGAInitVisualConfigs( ScreenPtr pScreen )
                pConfigs[i].redSize		= 8;
                pConfigs[i].greenSize		= 8;
                pConfigs[i].blueSize		= 8;
-               pConfigs[i].alphaSize		= 8;
+               pConfigs[i].alphaSize		= 0;
                pConfigs[i].redMask		= 0x00FF0000;
                pConfigs[i].greenMask		= 0x0000FF00;
                pConfigs[i].blueMask		= 0x000000FF;
-               pConfigs[i].alphaMask		= 0;
+               pConfigs[i].alphaMask		= 0x0;
                if ( accum ) {
                   pConfigs[i].accumRedSize	= 16;
                   pConfigs[i].accumGreenSize	= 16;
@@ -273,7 +273,7 @@ static Bool MGAInitVisualConfigs( ScreenPtr pScreen )
                   pConfigs[i].doubleBuffer	= FALSE;
 	       }
                pConfigs[i].stereo		= FALSE;
-               pConfigs[i].bufferSize		= 32;
+               pConfigs[i].bufferSize		= 24;
                if ( depth ) {
 		     pConfigs[i].depthSize	= 24;
                      pConfigs[i].stencilSize	= 8;
@@ -342,13 +342,29 @@ static void MGADestroyContext( ScreenPtr pScreen, drmContext hwContext,
 static void MGAWaitForIdleDMA( ScrnInfoPtr pScrn )
 {
    MGAPtr pMga = MGAPTR(pScrn);
+   drmMGALock lock;
    int ret;
    int i = 0;
 
+   memset( &lock, 0, sizeof(drmMGALock) );
+
    for (;;) {
       do {
-	 ret = drmMGAFlushDMA( pMga->drmFD,
-			       DRM_LOCK_QUIESCENT | DRM_LOCK_FLUSH );
+         /* first ask for quiescent and flush */
+         lock.flags = DRM_MGA_LOCK_QUIESCENT | DRM_MGA_LOCK_FLUSH;
+         do {
+	    ret = drmCommandWrite( pMga->drmFD, DRM_MGA_FLUSH,
+                                   &lock, sizeof( drmMGALock ) );
+         } while ( ret == -EBUSY && i++ < DRM_MGA_IDLE_RETRY );
+
+         /* if it's still busy just try quiescent */
+         if ( ret == -EBUSY ) { 
+            lock.flags = DRM_MGA_LOCK_QUIESCENT;
+            do {
+	       ret = drmCommandWrite( pMga->drmFD, DRM_MGA_FLUSH,
+                                      &lock, sizeof( drmMGALock ) );
+            } while ( ret == -EBUSY && i++ < DRM_MGA_IDLE_RETRY );
+         }
       } while ( ( ret == -EBUSY ) && ( i++ < MGA_TIMEOUT ) );
 
       if ( ret == 0 )
@@ -357,7 +373,7 @@ static void MGAWaitForIdleDMA( ScrnInfoPtr pScrn )
       xf86DrvMsg( pScrn->scrnIndex, X_ERROR,
 		  "[dri] Idle timed out, resetting engine...\n" );
 
-      drmMGAEngineReset( pMga->drmFD );
+      drmCommandNone( pMga->drmFD, DRM_MGA_RESET );
    }
 }
 
@@ -843,6 +859,7 @@ static Bool MGADRIKernelInit( ScreenPtr pScreen )
 
    memset( &init, 0, sizeof(drmMGAInit) );
 
+   init.func = MGA_INIT_DMA;
    init.sarea_priv_offset = sizeof(XF86DRISAREARec);
 
    switch ( pMga->Chipset ) {
@@ -874,7 +891,7 @@ static Bool MGADRIKernelInit( ScreenPtr pScreen )
    init.texture_offset[0] = pMGADRIServer->textureOffset;
    init.texture_size[0] = pMGADRIServer->textureSize;
 
-   init.fb_offset = pMga->FbAddress;
+   init.fb_offset = pMGADRIServer->fb.handle;
    init.mmio_offset = pMGADRIServer->registers.handle;
    init.status_offset = pMGADRIServer->status.handle;
 
@@ -885,7 +902,7 @@ static Bool MGADRIKernelInit( ScreenPtr pScreen )
    init.texture_offset[1] = pMGADRIServer->agpTextures.handle;
    init.texture_size[1] = pMGADRIServer->agpTextures.size;
 
-   ret = drmMGAInitDMA( pMga->drmFD, &init );
+   ret = drmCommandWrite( pMga->drmFD, DRM_MGA_INIT, &init, sizeof(drmMGAInit));
    if ( ret < 0 ) {
       xf86DrvMsg( pScrn->scrnIndex, X_ERROR,
 		  "[drm] Failed to initialize DMA! (%d)\n", ret );
@@ -902,6 +919,38 @@ static Bool MGADRIKernelInit( ScreenPtr pScreen )
    return TRUE;
 }
 
+static void MGADRIIrqInit(MGAPtr pMga, ScreenPtr pScreen)
+{
+   ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
+
+   /*   version = drmGetVersion(pMga->drmFD);
+      if ( version ) {
+         if ( version->version_major != 3 ||
+	      version->version_minor < 0 ) {*/
+   if (!pMga->irq) {
+      pMga->irq = drmGetInterruptFromBusID(
+	 pMga->drmFD,
+	 ((pciConfigPtr)pMga->PciInfo->thisCard)->busnum,
+	 ((pciConfigPtr)pMga->PciInfo->thisCard)->devnum,
+	 ((pciConfigPtr)pMga->PciInfo->thisCard)->funcnum);
+
+      if((drmCtlInstHandler(pMga->drmFD, pMga->irq)) != 0) {
+	 xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+		    "[drm] failure adding irq handler, "
+		    "there is a device already using that irq\n"
+		    "[drm] falling back to irq-free operation\n");
+	 pMga->irq = 0;
+      } else {
+          pMga->reg_ien = INREG( MGAREG_IEN );
+      }
+   }
+
+   if (pMga->irq)
+      xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+		 "[drm] dma control initialized, using IRQ %d\n",
+		 pMga->irq);
+}
+
 static Bool MGADRIBuffersInit( ScreenPtr pScreen )
 {
    ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
@@ -1096,9 +1145,48 @@ Bool MGADRIScreenInit( ScreenPtr pScreen )
       return FALSE;
    }
 
-   /* Check the MGA DRM version */
+   /* Check the DRM versioning */
    {
-      drmVersionPtr version = drmGetVersion(pMga->drmFD);
+      drmVersionPtr version;
+
+      /* Check the DRM lib version.
+	 drmGetLibVersion was not supported in version 1.0, so check for
+	 symbol first to avoid possible crash or hang.
+       */
+      if (xf86LoaderCheckSymbol("drmGetLibVersion")) {
+         version = drmGetLibVersion(pMga->drmFD);
+      }
+      else {
+	 /* drmlib version 1.0.0 didn't have the drmGetLibVersion
+	    entry point.  Fake it by allocating a version record
+	    via drmGetVersion and changing it to version 1.0.0
+	  */
+	 version = drmGetVersion(pMga->drmFD);
+	 version->version_major      = 1;
+	 version->version_minor      = 0;
+	 version->version_patchlevel = 0;
+      }
+
+      if (version) {
+	 if (version->version_major != 1 ||
+	     version->version_minor < 1) {
+	     /* incompatible drm library version */
+	    xf86DrvMsg(pScreen->myNum, X_ERROR,
+		       "[dri] MGADRIScreenInit failed because of a version mismatch.\n"
+		       "[dri] libdrm.a module version is %d.%d.%d but version 1.1.x is needed.\n"
+		       "[dri] Disabling DRI.\n",
+		       version->version_major,
+		       version->version_minor,
+		       version->version_patchlevel);
+	    drmFreeVersion(version);
+	    MGADRICloseScreen( pScreen );		/* FIXME: ??? */
+	    return FALSE;
+	 }
+	 drmFreeVersion(version);
+      }
+
+      /* Check the MGA DRM version */
+      version = drmGetVersion(pMga->drmFD);
       if ( version ) {
          if ( version->version_major != 3 ||
 	      version->version_minor < 0 ) {
@@ -1145,6 +1233,15 @@ Bool MGADRIScreenInit( ScreenPtr pScreen )
       DRICloseScreen( pScreen );
       return FALSE;
    }
+   {
+       void *scratch_ptr;
+       int scratch_int;
+
+       DRIGetDeviceInfo(pScreen, &pMGADRIServer->fb.handle,
+			&scratch_int, &scratch_int, 
+			&scratch_int, &scratch_int,
+			&scratch_ptr);
+   }
 
    if ( !MGAInitVisualConfigs( pScreen ) ) {
       DRICloseScreen( pScreen );
@@ -1189,6 +1286,8 @@ Bool MGADRIFinishScreenInit( ScreenPtr pScreen )
       return FALSE;
    }
 
+   MGADRIIrqInit(pMga, pScreen);
+
    switch(pMga->Chipset) {
    case PCI_CHIP_MGAG550:
    case PCI_CHIP_MGAG400:
@@ -1250,13 +1349,22 @@ void MGADRICloseScreen( ScreenPtr pScreen )
    ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
    MGAPtr pMga = MGAPTR(pScrn);
    MGADRIServerPrivatePtr pMGADRIServer = pMga->DRIServerInfo;
+   drmMGAInit init;
 
    if ( pMGADRIServer->drmBuffers ) {
       drmUnmapBufs( pMGADRIServer->drmBuffers );
       pMGADRIServer->drmBuffers = NULL;
    }
 
-   drmMGACleanupDMA( pMga->drmFD );
+   if (pMga->irq) {
+      drmCtlUninstHandler(pMga->drmFD);
+      pMga->irq = 0;
+   }
+
+   /* Cleanup DMA */
+   memset( &init, 0, sizeof(drmMGAInit) );
+   init.func = MGA_CLEANUP_DMA;
+   drmCommandWrite( pMga->drmFD, DRM_MGA_INIT, &init, sizeof(drmMGAInit) );
 
    if ( pMGADRIServer->status.map ) {
       drmUnmap( pMGADRIServer->status.map, pMGADRIServer->status.size );
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dri.h b/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dri.h
index 0ab62aa32..b9ed1c215 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dri.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dri.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dri.h,v 1.6 2001/04/10 16:08:01 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dri.h,v 1.8 2002/11/29 11:06:42 eich Exp $ */
 
 /*
  * Copyright 2000 VA Linux Systems Inc., Fremont, California.
@@ -24,7 +24,7 @@
  * OTHER DEALINGS IN THE SOFTWARE.
  *
  * Authors:
- *   Keith WHitwell <keithw@valinux.com>
+ *   Keith Whitwell <keith@tungstengraphics.com>
  *   Gareth Hughes <gareth@valinux.com>
  */
 
@@ -32,7 +32,7 @@
 #define __MGA_DRI_H__
 
 #include "xf86drm.h"
-#include "xf86drmMga.h"
+#include "mga_common.h"
 
 #define MGA_DEFAULT_AGP_MODE     1
 #define MGA_MAX_AGP_MODE         4
@@ -66,6 +66,7 @@ typedef struct {
    drmRegion agp;
 
    /* PCI mappings */
+   drmRegion fb;
    drmRegion registers;
    drmRegion status;
 
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_driver.c b/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_driver.c
index 17e77afc0..1948b5dd4 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_driver.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_driver.c
@@ -45,7 +45,7 @@
  *		Added digital screen option for first head
  */
  
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_driver.c,v 1.222 2002/10/08 22:14:09 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_driver.c,v 1.231 2003/01/29 19:29:49 eich Exp $ */
 
 /*
  * This is a first cut at a non-accelerated version to work with the
@@ -287,6 +287,7 @@ static const char *ramdacSymbols[] = {
     NULL
 };
 
+#ifdef XFree86LOADER
 #ifdef XF86DRI
 static const char *drmSymbols[] = {
     "drmAddBufs",
@@ -301,14 +302,18 @@ static const char *drmSymbols[] = {
     "drmAgpRelease",
     "drmAgpUnbind",
     "drmAgpVendorId",
+    "drmCommandNone",
+    "drmCommandRead",
+    "drmCommandWrite",
+    "drmCommandWriteRead",
+    "drmCtlInstHandler",
+    "drmCtlUninstHandler",
     "drmFreeVersion",
+    "drmGetInterruptFromBusID",
+    "drmGetLibVersion",
     "drmGetVersion",
-    "drmMGACleanupDMA",
-    "drmMGAEngineReset",
-    "drmMGAFlushDMA",
-    "drmMGAInitDMA",
-    "drmMapBufs",
     "drmMap",
+    "drmMapBufs",
     "drmUnmap",
     "drmUnmapBufs",
     NULL
@@ -319,6 +324,7 @@ static const char *driSymbols[] = {
     "DRICreateInfoRec",
     "DRIDestroyInfoRec",
     "DRIFinishScreenInit",
+    "DRIGetDeviceInfo",
     "DRILock",
     "DRIQueryVersion",
     "DRIScreenInit",
@@ -327,6 +333,7 @@ static const char *driSymbols[] = {
     NULL
 };
 #endif
+#endif
 
 #define MGAuseI2C 1
 
@@ -351,12 +358,14 @@ static const char *shadowSymbols[] = {
     NULL
 };
 
+#ifdef XFree86LOADER
 static const char *vbeSymbols[] = {
     "VBEInit",
     "vbeDoEDID",
     "vbeFree",
     NULL
 };
+#endif
 
 static const char *int10Symbols[] = {
     "xf86FreeInt10",
@@ -365,30 +374,23 @@ static const char *int10Symbols[] = {
 };
 
 static const char *fbdevHWSymbols[] = {
-	"fbdevHWInit",
-	"fbdevHWUseBuildinMode",
-
-	"fbdevHWGetVidmem",
-
-	/* colormap */
-	"fbdevHWLoadPalette",
-
-	/* ScrnInfo hooks */
-	"fbdevHWAdjustFrame",
-	"fbdevHWEnterVT",
-	"fbdevHWLeaveVT",
-	"fbdevHWModeInit",
-	"fbdevHWRestore",
-	"fbdevHWSave",
-	"fbdevHWSwitchMode",
-	"fbdevHWValidMode",
-
-	"fbdevHWMapMMIO",
-	"fbdevHWMapVidmem",
-	"fbdevHWUnmapMMIO",
-	"fbdevHWUnmapVidmem",
-
-	NULL
+    "fbdevHWAdjustFrame",
+    "fbdevHWEnterVT",
+    "fbdevHWGetVidmem",
+    "fbdevHWInit",
+    "fbdevHWLeaveVT",
+    "fbdevHWLoadPalette",
+    "fbdevHWMapMMIO",
+    "fbdevHWMapVidmem",
+    "fbdevHWModeInit",
+    "fbdevHWRestore",
+    "fbdevHWSave",
+    "fbdevHWSwitchMode",
+    "fbdevHWUnmapMMIO",
+    "fbdevHWUnmapVidmem",
+    "fbdevHWUseBuildinMode",
+    "fbdevHWValidMode",
+    NULL
 };
 
 #ifdef USEMGAHAL
@@ -1057,7 +1059,7 @@ MGAdoDDC(ScrnInfoPtr pScrn)
     MonInfo = xf86DoEDID_DDC2(pScrn->scrnIndex,pMga->I2C);
     xf86DrvMsg(pScrn->scrnIndex, X_INFO, "I2C Monitor info: %p\n", MonInfo);
     xf86PrintEDID(MonInfo);
-    xf86DrvMsg(pScrn->scrnIndex, X_INFO, "end of I2C Monitor info\n\n");
+    xf86DrvMsg(pScrn->scrnIndex, X_INFO, "end of I2C Monitor info\n");
   }
   if (!MonInfo)
 #endif /* MGAuseI2C */
@@ -1068,7 +1070,21 @@ MGAdoDDC(ScrnInfoPtr pScrn)
 					 pMga->ddc1Read ) ;
     xf86DrvMsg(pScrn->scrnIndex, X_INFO, "DDC Monitor info: %p\n", MonInfo);
     xf86PrintEDID( MonInfo );
-    xf86DrvMsg(pScrn->scrnIndex, X_INFO, "end of DDC Monitor info\n\n");
+    xf86DrvMsg(pScrn->scrnIndex, X_INFO, "end of DDC Monitor info\n");
+  }
+  if (!MonInfo){
+    vbeInfoPtr pVbe;
+    if (xf86LoadSubModule(pScrn, "vbe")) {
+      pVbe = VBEInit(NULL,pMga->pEnt->index);
+      MonInfo = vbeDoEDID(pVbe, NULL);
+      vbeFree(pVbe);
+
+      if (MonInfo){
+	xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VBE DDC Monitor info: %p\n", MonInfo);
+	xf86PrintEDID( MonInfo );
+	xf86DrvMsg(pScrn->scrnIndex, X_INFO, "end of VBE DDC Monitor info\n\n");
+      }
+    }
   }
 
 
@@ -1305,12 +1321,14 @@ MGAPreInit(ScrnInfoPtr pScrn, int flags)
     }
 
     xf86DrvMsg(pScrn->scrnIndex, from, "Chipset: \"%s\"", pScrn->chipset);
-    if ((pMga->Chipset == PCI_CHIP_MGAG400) &&
-	(pMga->ChipRev >= 0x80))
-	xf86ErrorF(" (G450)\n");
-    else
-	xf86ErrorF(" (G400)\n");
-
+    if (pMga->Chipset == PCI_CHIP_MGAG400) {
+	if (pMga->ChipRev >= 0x80) 
+	    xf86ErrorF(" (G450)\n");
+	else
+	    xf86ErrorF(" (G400)\n");
+    } else {
+	xf86ErrorF("\n");
+    }
 #ifdef USEMGAHAL
     if (HAL_CHIPSETS) {
 	Bool loadHal = TRUE;
@@ -3671,8 +3689,13 @@ MGAEnterVT(int scrnIndex, int flags)
     pMga = MGAPTR(pScrn);
 
 #ifdef XF86DRI
-    if (pMga->directRenderingEnabled)
+    if (pMga->directRenderingEnabled) {
+	if (pMga->irq) {
+	    /* Need to make sure interrupts are enabled */
+	    OUTREG(MGAREG_IEN, pMga->reg_ien);
+	}
         DRIUnlock(screenInfo.screens[scrnIndex]);
+    }
 #endif
 
     if (!MGAModeInit(pScrn, pScrn->currentMode))
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_esc.c b/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_esc.c
index 7e9b218e4..dc0b7b3d8 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_esc.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_esc.c
@@ -70,7 +70,7 @@ static void GetVideoParameterStr(LPMGAMODEINFO pModeInfo, char *sResult);
 static Bool convertNumber(unsigned long *pulNumber, char *sNumber);
 
 
-MGAEscFuncRec FunctionTable[] = {
+static MGAEscFuncRec FunctionTable[] = {
     {"hal",  EscHal},
     {"test",  EscTest},
     {"read",  EscRead},
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_storm.c b/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_storm.c
index 14c8873eb..ff083ac37 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_storm.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_storm.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_storm.c,v 1.97 2002/10/21 13:33:01 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_storm.c,v 1.98 2003/01/16 16:09:10 eich Exp $ */
 
 
 /* All drivers should typically include these */
@@ -609,8 +609,7 @@ MGANAME(AccelInit)(ScreenPtr pScreen)
 	/* fallthrough */
     case PCI_CHIP_MGAG200:
     case PCI_CHIP_MGAG200_PCI:
-	if (pMga->SecondCrtc == FALSE)
-	    doRender = TRUE;
+	doRender = FALSE;
         pMga->AccelFlags = TRANSC_SOLID_FILL |
 			   TWO_PASS_COLOR_EXPAND;
 
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/mga/mgareg_flags.h b/xc/programs/Xserver/hw/xfree86/drivers/mga/mgareg_flags.h
index 901f18310..69050fc10 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/mga/mgareg_flags.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/mga/mgareg_flags.h
@@ -19,6 +19,7 @@
  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE 
  * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mgareg_flags.h,v 1.2 2003/01/12 03:55:47 tsi Exp $ */
 
 #ifndef _MGAREGS_H_
 #define _MGAREGS_H_
@@ -34,892 +35,892 @@
  * Power Graphic Mode Memory Space Registers
  */
 
-    #define AGP_PLL_agp2xpllen_MASK 	0xfffffffe 	/* bit 0 */
-    #define AGP_PLL_agp2xpllen_disable 	0x0 		
-    #define AGP_PLL_agp2xpllen_enable 	0x1 		
-
-    #define AC_src_MASK 		0xfffffff0 	/* bits 0-3 */
-    #define AC_src_zero 		0x0 		/* val 0, shift 0 */
-    #define AC_src_one 			0x1 		/* val 1, shift 0 */
-    #define AC_src_dst_color 		0x2 		/* val 2, shift 0 */
-    #define AC_src_om_dst_color 	0x3 		/* val 3, shift 0 */
-    #define AC_src_src_alpha 		0x4 		/* val 4, shift 0 */
-    #define AC_src_om_src_alpha 	0x5 		/* val 5, shift 0 */
-    #define AC_src_dst_alpha 		0x6 		/* val 6, shift 0 */
-    #define AC_src_om_dst_alpha 	0x7 		/* val 7, shift 0 */
-    #define AC_src_src_alpha_sat 	0x8 		/* val 8, shift 0 */
-    #define AC_dst_MASK 		0xffffff0f 	/* bits 4-7 */
-    #define AC_dst_zero 		0x0 		/* val 0, shift 4 */
-    #define AC_dst_one 			0x10 		/* val 1, shift 4 */
-    #define AC_dst_src_color 		0x20 		/* val 2, shift 4 */
-    #define AC_dst_om_src_color 	0x30 		/* val 3, shift 4 */
-    #define AC_dst_src_alpha 		0x40 		/* val 4, shift 4 */
-    #define AC_dst_om_src_alpha 	0x50 		/* val 5, shift 4 */
-    #define AC_dst_dst_alpha 		0x60 		/* val 6, shift 4 */
-    #define AC_dst_om_dst_alpha 	0x70 		/* val 7, shift 4 */
-    #define AC_amode_MASK 		0xfffffcff 	/* bits 8-9 */
-    #define AC_amode_FCOL 		0x0 		/* val 0, shift 8 */
-    #define AC_amode_alpha_channel 	0x100 		/* val 1, shift 8 */
-    #define AC_amode_video_alpha 	0x200 		/* val 2, shift 8 */
-    #define AC_amode_RSVD 		0x300 		/* val 3, shift 8 */
-    #define AC_astipple_MASK 		0xfffff7ff 	/* bit 11 */
-    #define AC_astipple_disable 	0x0 		
-    #define AC_astipple_enable 		0x800 		
-    #define AC_aten_MASK 		0xffffefff 	/* bit 12 */
-    #define AC_aten_disable 		0x0 		
-    #define AC_aten_enable 		0x1000 		
-    #define AC_atmode_MASK 		0xffff1fff 	/* bits 13-15 */
-    #define AC_atmode_noacmp 		0x0 		/* val 0, shift 13 */
-    #define AC_atmode_ae 		0x4000 		/* val 2, shift 13 */
-    #define AC_atmode_ane 		0x6000 		/* val 3, shift 13 */
-    #define AC_atmode_alt 		0x8000 		/* val 4, shift 13 */
-    #define AC_atmode_alte 		0xa000 		/* val 5, shift 13 */
-    #define AC_atmode_agt 		0xc000 		/* val 6, shift 13 */
-    #define AC_atmode_agte 		0xe000 		/* val 7, shift 13 */
-    #define AC_atref_MASK 		0xff00ffff 	/* bits 16-23 */
-    #define AC_atref_SHIFT 		16 		
-    #define AC_alphasel_MASK 		0xfcffffff 	/* bits 24-25 */
-    #define AC_alphasel_fromtex 	0x0 		/* val 0, shift 24 */
-    #define AC_alphasel_diffused 	0x1000000 	/* val 1, shift 24 */
-    #define AC_alphasel_modulated 	0x2000000 	/* val 2, shift 24 */
-    #define AC_alphasel_trans 		0x3000000 	/* val 3, shift 24 */
-
-    #define AR0_ar0_MASK 		0xfffc0000 	/* bits 0-17 */
-    #define AR0_ar0_SHIFT 		0 		
-
-    #define AR1_ar1_MASK 		0xff000000 	/* bits 0-23 */
-    #define AR1_ar1_SHIFT 		0 		
-
-    #define AR2_ar2_MASK 		0xfffc0000 	/* bits 0-17 */
-    #define AR2_ar2_SHIFT 		0 		
-
-    #define AR3_ar3_MASK 		0xff000000 	/* bits 0-23 */
-    #define AR3_ar3_SHIFT 		0 		
-    #define AR3_spage_MASK 		0xf8ffffff 	/* bits 24-26 */
-    #define AR3_spage_SHIFT 		24 		
-
-    #define AR4_ar4_MASK 		0xfffc0000 	/* bits 0-17 */
-    #define AR4_ar4_SHIFT 		0 		
-
-    #define AR5_ar5_MASK 		0xfffc0000 	/* bits 0-17 */
-    #define AR5_ar5_SHIFT 		0 		
-
-    #define AR6_ar6_MASK 		0xfffc0000 	/* bits 0-17 */
-    #define AR6_ar6_SHIFT 		0 		
-
-    #define BC_besen_MASK 		0xfffffffe 	/* bit 0 */
-    #define BC_besen_disable 		0x0 		
-    #define BC_besen_enable 		0x1 		
-    #define BC_besv1srcstp_MASK 	0xffffffbf 	/* bit 6 */
-    #define BC_besv1srcstp_even 	0x0 		
-    #define BC_besv1srcstp_odd 		0x40 		
-    #define BC_besv2srcstp_MASK 	0xfffffeff 	/* bit 8 */
-    #define BC_besv2srcstp_disable 	0x0 		
-    #define BC_besv2srcstp_enable 	0x100 		
-    #define BC_beshfen_MASK 		0xfffffbff 	/* bit 10 */
-    #define BC_beshfen_disable 		0x0 		
-    #define BC_beshfen_enable 		0x400 		
-    #define BC_besvfen_MASK 		0xfffff7ff 	/* bit 11 */
-    #define BC_besvfen_disable 		0x0 		
-    #define BC_besvfen_enable 		0x800 		
-    #define BC_beshfixc_MASK 		0xffffefff 	/* bit 12 */
-    #define BC_beshfixc_weight 		0x0 		
-    #define BC_beshfixc_coeff 		0x1000 		
-    #define BC_bescups_MASK 		0xfffeffff 	/* bit 16 */
-    #define BC_bescups_disable 		0x0 		
-    #define BC_bescups_enable 		0x10000 	
-    #define BC_bes420pl_MASK 		0xfffdffff 	/* bit 17 */
-    #define BC_bes420pl_422 		0x0 		
-    #define BC_bes420pl_420 		0x20000 	
-    #define BC_besdith_MASK 		0xfffbffff 	/* bit 18 */
-    #define BC_besdith_disable 		0x0 		
-    #define BC_besdith_enable 		0x40000 	
-    #define BC_beshmir_MASK 		0xfff7ffff 	/* bit 19 */
-    #define BC_beshmir_disable 		0x0 		
-    #define BC_beshmir_enable 		0x80000 	
-    #define BC_besbwen_MASK 		0xffefffff 	/* bit 20 */
-    #define BC_besbwen_color 		0x0 		
-    #define BC_besbwen_bw 		0x100000 	
-    #define BC_besblank_MASK 		0xffdfffff 	/* bit 21 */
-    #define BC_besblank_disable 	0x0 		
-    #define BC_besblank_enable 		0x200000 	
-    #define BC_besfselm_MASK 		0xfeffffff 	/* bit 24 */
-    #define BC_besfselm_soft 		0x0 		
-    #define BC_besfselm_hard 		0x1000000 	
-    #define BC_besfsel_MASK 		0xf9ffffff 	/* bits 25-26 */
-    #define BC_besfsel_a1 		0x0 		/* val 0, shift 25 */
-    #define BC_besfsel_a2 		0x2000000 	/* val 1, shift 25 */
-    #define BC_besfsel_b1 		0x4000000 	/* val 2, shift 25 */
-    #define BC_besfsel_b2 		0x6000000 	/* val 3, shift 25 */
-
-    #define BGC_beshzoom_MASK 		0xfffffffe 	/* bit 0 */
-    #define BGC_beshzoom_disable 	0x0 		
-    #define BGC_beshzoom_enable 	0x1 		
-    #define BGC_beshzoomf_MASK 		0xfffffffd 	/* bit 1 */
-    #define BGC_beshzoomf_disable 	0x0 		
-    #define BGC_beshzoomf_enable 	0x2 		
-    #define BGC_bescorder_MASK 		0xfffffff7 	/* bit 3 */
-    #define BGC_bescorder_even 		0x0 		
-    #define BGC_bescorder_odd 		0x8 		
-    #define BGC_besreghup_MASK 		0xffffffef 	/* bit 4 */
-    #define BGC_besreghup_disable 	0x0 		
-    #define BGC_besreghup_enable 	0x10 		
-    #define BGC_besvcnt_MASK 		0xf000ffff 	/* bits 16-27 */
-    #define BGC_besvcnt_SHIFT 		16 		
-
-    #define BHC_besright_MASK 		0xfffff800 	/* bits 0-10 */
-    #define BHC_besright_SHIFT 		0 		
-    #define BHC_besleft_MASK 		0xf800ffff 	/* bits 16-26 */
-    #define BHC_besleft_SHIFT 		16 		
-
-    #define BHISF_beshiscal_MASK 	0xffe00003 	/* bits 2-20 */
-    #define BHISF_beshiscal_SHIFT 	2 		
-
-    #define BHSE_beshsrcend_MASK 	0xfc000003 	/* bits 2-25 */
-    #define BHSE_beshsrcend_SHIFT 	2 		
-
-    #define BHSL_beshsrclst_MASK 	0xfc00ffff 	/* bits 16-25 */
-    #define BHSL_beshsrclst_SHIFT 	16 		
-
-    #define BHSS_beshsrcst_MASK 	0xfc000003 	/* bits 2-25 */
-    #define BHSS_beshsrcst_SHIFT 	2 		
-
-    #define BP_bespitch_MASK 		0xfffff000 	/* bits 0-11 */
-    #define BP_bespitch_SHIFT 		0 		
-
-    #define BS_besstat_MASK 		0xfffffffc 	/* bits 0-1 */
-    #define BS_besstat_a1 		0x0 		/* val 0, shift 0 */
-    #define BS_besstat_a2 		0x1 		/* val 1, shift 0 */
-    #define BS_besstat_b1 		0x2 		/* val 2, shift 0 */
-    #define BS_besstat_b2 		0x3 		/* val 3, shift 0 */
-
-    #define BSF_besv1srclast_MASK 	0xfffffc00 	/* bits 0-9 */
-    #define BSF_besv1srclast_SHIFT 	0 		
-
-    #define BSF_besv2srclst_MASK 	0xfffffc00 	/* bits 0-9 */
-    #define BSF_besv2srclst_SHIFT 	0 		
-
-    #define BSF_besv1wght_MASK 		0xffff0003 	/* bits 2-15 */
-    #define BSF_besv1wght_SHIFT 	2 		
-    #define BSF_besv1wghts_MASK 	0xfffeffff 	/* bit 16 */
-    #define BSF_besv1wghts_disable 	0x0 		
-    #define BSF_besv1wghts_enable 	0x10000 	
-
-    #define BSF_besv2wght_MASK 		0xffff0003 	/* bits 2-15 */
-    #define BSF_besv2wght_SHIFT 	2 		
-    #define BSF_besv2wghts_MASK 	0xfffeffff 	/* bit 16 */
-    #define BSF_besv2wghts_disable 	0x0 		
-    #define BSF_besv2wghts_enable 	0x10000 	
-
-    #define BVC_besbot_MASK 		0xfffff800 	/* bits 0-10 */
-    #define BVC_besbot_SHIFT 		0 		
-    #define BVC_bestop_MASK 		0xf800ffff 	/* bits 16-26 */
-    #define BVC_bestop_SHIFT 		16 		
-
-    #define BVISF_besviscal_MASK 	0xffe00003 	/* bits 2-20 */
-    #define BVISF_besviscal_SHIFT 	2 		
-
-    #define CXB_cxleft_MASK 		0xfffff000 	/* bits 0-11 */
-    #define CXB_cxleft_SHIFT 		0 		
-    #define CXB_cxright_MASK 		0xf000ffff 	/* bits 16-27 */
-    #define CXB_cxright_SHIFT 		16 		
-
-    #define DO_dstmap_MASK 		0xfffffffe 	/* bit 0 */
-    #define DO_dstmap_fb 		0x0 		
-    #define DO_dstmap_sys 		0x1 		
-    #define DO_dstacc_MASK 		0xfffffffd 	/* bit 1 */
-    #define DO_dstacc_pci 		0x0 		
-    #define DO_dstacc_agp 		0x2 		
-    #define DO_dstorg_MASK 		0x7 		/* bits 3-31 */
-    #define DO_dstorg_SHIFT 		3 		
-
-    #define DC_opcod_MASK 		0xfffffff0 	/* bits 0-3 */
-    #define DC_opcod_line_open 		0x0 		/* val 0, shift 0 */
-    #define DC_opcod_autoline_open 	0x1 		/* val 1, shift 0 */
-    #define DC_opcod_line_close 	0x2 		/* val 2, shift 0 */
-    #define DC_opcod_autoline_close 	0x3 		/* val 3, shift 0 */
-    #define DC_opcod_trap 		0x4 		/* val 4, shift 0 */
-    #define DC_opcod_texture_trap 	0x6 		/* val 6, shift 0 */
-    #define DC_opcod_bitblt 		0x8 		/* val 8, shift 0 */
-    #define DC_opcod_iload 		0x9 		/* val 9, shift 0 */
-    #define DC_atype_MASK 		0xffffff8f 	/* bits 4-6 */
-    #define DC_atype_rpl 		0x0 		/* val 0, shift 4 */
-    #define DC_atype_rstr 		0x10 		/* val 1, shift 4 */
-    #define DC_atype_zi 		0x30 		/* val 3, shift 4 */
-    #define DC_atype_blk 		0x40 		/* val 4, shift 4 */
-    #define DC_atype_i 			0x70 		/* val 7, shift 4 */
-    #define DC_linear_MASK 		0xffffff7f 	/* bit 7 */
-    #define DC_linear_xy 		0x0 		
-    #define DC_linear_linear 		0x80 		
-    #define DC_zmode_MASK 		0xfffff8ff 	/* bits 8-10 */
-    #define DC_zmode_nozcmp 		0x0 		/* val 0, shift 8 */
-    #define DC_zmode_ze 		0x200 		/* val 2, shift 8 */
-    #define DC_zmode_zne 		0x300 		/* val 3, shift 8 */
-    #define DC_zmode_zlt 		0x400 		/* val 4, shift 8 */
-    #define DC_zmode_zlte 		0x500 		/* val 5, shift 8 */
-    #define DC_zmode_zgt 		0x600 		/* val 6, shift 8 */
-    #define DC_zmode_zgte 		0x700 		/* val 7, shift 8 */
-    #define DC_solid_MASK 		0xfffff7ff 	/* bit 11 */
-    #define DC_solid_disable 		0x0 		
-    #define DC_solid_enable 		0x800 		
-    #define DC_arzero_MASK 		0xffffefff 	/* bit 12 */
-    #define DC_arzero_disable 		0x0 		
-    #define DC_arzero_enable 		0x1000 		
-    #define DC_sgnzero_MASK 		0xffffdfff 	/* bit 13 */
-    #define DC_sgnzero_disable 		0x0 		
-    #define DC_sgnzero_enable 		0x2000 		
-    #define DC_shftzero_MASK 		0xffffbfff 	/* bit 14 */
-    #define DC_shftzero_disable 	0x0 		
-    #define DC_shftzero_enable 		0x4000 		
-    #define DC_bop_MASK 		0xfff0ffff 	/* bits 16-19 */
-    #define DC_bop_SHIFT 		16 		
-    #define DC_trans_MASK 		0xff0fffff 	/* bits 20-23 */
-    #define DC_trans_SHIFT 		20 		
-    #define DC_bltmod_MASK 		0xe1ffffff 	/* bits 25-28 */
-    #define DC_bltmod_bmonolef 		0x0 		/* val 0, shift 25 */
-    #define DC_bltmod_bmonowf 		0x8000000 	/* val 4, shift 25 */
-    #define DC_bltmod_bplan 		0x2000000 	/* val 1, shift 25 */
-    #define DC_bltmod_bfcol 		0x4000000 	/* val 2, shift 25 */
-    #define DC_bltmod_bu32bgr 		0x6000000 	/* val 3, shift 25 */
-    #define DC_bltmod_bu32rgb 		0xe000000 	/* val 7, shift 25 */
-    #define DC_bltmod_bu24bgr 		0x16000000 	/* val 11, shift 25 */
-    #define DC_bltmod_bu24rgb 		0x1e000000 	/* val 15, shift 25 */
-    #define DC_pattern_MASK 		0xdfffffff 	/* bit 29 */
-    #define DC_pattern_disable 		0x0 		
-    #define DC_pattern_enable 		0x20000000 	
-    #define DC_transc_MASK 		0xbfffffff 	/* bit 30 */
-    #define DC_transc_disable 		0x0 		
-    #define DC_transc_enable 		0x40000000 	
-    #define DC_clipdis_MASK 		0x7fffffff 	/* bit 31 */
-    #define DC_clipdis_disable 		0x0 		
-    #define DC_clipdis_enable 		0x80000000 	
-
-    #define DS_dwgsyncaddr_MASK 	0x3 		/* bits 2-31 */
-    #define DS_dwgsyncaddr_SHIFT 	2 		
-
-    #define FS_fifocount_MASK 		0xffffff80 	/* bits 0-6 */
-    #define FS_fifocount_SHIFT 		0 		
-    #define FS_bfull_MASK 		0xfffffeff 	/* bit 8 */
-    #define FS_bfull_disable 		0x0 		
-    #define FS_bfull_enable 		0x100 		
-    #define FS_bempty_MASK 		0xfffffdff 	/* bit 9 */
-    #define FS_bempty_disable 		0x0 		
-    #define FS_bempty_enable 		0x200 		
-
-    #define XA_fxleft_MASK 		0xffff0000 	/* bits 0-15 */
-    #define XA_fxleft_SHIFT 		0 		
-    #define XA_fxright_MASK 		0xffff 		/* bits 16-31 */
-    #define XA_fxright_SHIFT 		16 		
-
-    #define IC_softrapiclr_MASK 	0xfffffffe 	/* bit 0 */
-    #define IC_softrapiclr_disable 	0x0 		
-    #define IC_softrapiclr_enable 	0x1 		
-    #define IC_pickiclr_MASK 		0xfffffffb 	/* bit 2 */
-    #define IC_pickiclr_disable 	0x0 		
-    #define IC_pickiclr_enable 		0x4 		
-    #define IC_vlineiclr_MASK 		0xffffffdf 	/* bit 5 */
-    #define IC_vlineiclr_disable 	0x0 		
-    #define IC_vlineiclr_enable 	0x20 		
-    #define IC_wiclr_MASK 		0xffffff7f 	/* bit 7 */
-    #define IC_wiclr_disable 		0x0 		
-    #define IC_wiclr_enable 		0x80 		
-    #define IC_wciclr_MASK 		0xfffffeff 	/* bit 8 */
-    #define IC_wciclr_disable 		0x0 		
-    #define IC_wciclr_enable 		0x100 		
-
-    #define IE_softrapien_MASK 		0xfffffffe 	/* bit 0 */
-    #define IE_softrapien_disable 	0x0 		
-    #define IE_softrapien_enable 	0x1 		
-    #define IE_pickien_MASK 		0xfffffffb 	/* bit 2 */
-    #define IE_pickien_disable 		0x0 		
-    #define IE_pickien_enable 		0x4 		
-    #define IE_vlineien_MASK 		0xffffffdf 	/* bit 5 */
-    #define IE_vlineien_disable 	0x0 		
-    #define IE_vlineien_enable 		0x20 		
-    #define IE_extien_MASK 		0xffffffbf 	/* bit 6 */
-    #define IE_extien_disable 		0x0 		
-    #define IE_extien_enable 		0x40 		
-    #define IE_wien_MASK 		0xffffff7f 	/* bit 7 */
-    #define IE_wien_disable 		0x0 		
-    #define IE_wien_enable 		0x80 		
-    #define IE_wcien_MASK 		0xfffffeff 	/* bit 8 */
-    #define IE_wcien_disable 		0x0 		
-    #define IE_wcien_enable 		0x100 		
-
-    #define MA_pwidth_MASK 		0xfffffffc 	/* bits 0-1 */
-    #define MA_pwidth_8 		0x0 		/* val 0, shift 0 */
-    #define MA_pwidth_16 		0x1 		/* val 1, shift 0 */
-    #define MA_pwidth_32 		0x2 		/* val 2, shift 0 */
-    #define MA_pwidth_24 		0x3 		/* val 3, shift 0 */
-    #define MA_zwidth_MASK 		0xffffffe7 	/* bits 3-4 */
-    #define MA_zwidth_16 		0x0 		/* val 0, shift 3 */
-    #define MA_zwidth_32 		0x8 		/* val 1, shift 3 */
-    #define MA_zwidth_15 		0x10 		/* val 2, shift 3 */
-    #define MA_zwidth_24 		0x18 		/* val 3, shift 3 */
-    #define MA_memreset_MASK 		0xffff7fff 	/* bit 15 */
-    #define MA_memreset_disable 	0x0 		
-    #define MA_memreset_enable 		0x8000 		
-    #define MA_fogen_MASK 		0xfbffffff 	/* bit 26 */
-    #define MA_fogen_disable 		0x0 		
-    #define MA_fogen_enable 		0x4000000 	
-    #define MA_tlutload_MASK 		0xdfffffff 	/* bit 29 */
-    #define MA_tlutload_disable 	0x0 		
-    #define MA_tlutload_enable 		0x20000000 	
-    #define MA_nodither_MASK 		0xbfffffff 	/* bit 30 */
-    #define MA_nodither_disable 	0x0 		
-    #define MA_nodither_enable 		0x40000000 	
-    #define MA_dit555_MASK 		0x7fffffff 	/* bit 31 */
-    #define MA_dit555_disable 		0x0 		
-    #define MA_dit555_enable 		0x80000000 	
-
-    #define MCWS_casltncy_MASK 		0xfffffff8 	/* bits 0-2 */
-    #define MCWS_casltncy_SHIFT 	0 		
-    #define MCWS_rrddelay_MASK 		0xffffffcf 	/* bits 4-5 */
-    #define MCWS_rcddelay_MASK 		0xfffffe7f 	/* bits 7-8 */
-    #define MCWS_rasmin_MASK 		0xffffe3ff 	/* bits 10-12 */
-    #define MCWS_rasmin_SHIFT 		10 		
-    #define MCWS_rpdelay_MASK 		0xffff3fff 	/* bits 14-15 */
-    #define MCWS_wrdelay_MASK 		0xfff3ffff 	/* bits 18-19 */
-    #define MCWS_rddelay_MASK 		0xffdfffff 	/* bit 21 */
-    #define MCWS_rddelay_disable 	0x0 		
-    #define MCWS_rddelay_enable 	0x200000 	
-    #define MCWS_smrdelay_MASK 		0xfe7fffff 	/* bits 23-24 */
-    #define MCWS_bwcdelay_MASK 		0xf3ffffff 	/* bits 26-27 */
-    #define MCWS_bpldelay_MASK 		0x1fffffff 	/* bits 29-31 */
-    #define MCWS_bpldelay_SHIFT 	29 		
-
-    #define MRB_mclkbrd0_MASK 		0xfffffff0 	/* bits 0-3 */
-    #define MRB_mclkbrd0_SHIFT 		0 		
-    #define MRB_mclkbrd1_MASK 		0xfffffe1f 	/* bits 5-8 */
-    #define MRB_mclkbrd1_SHIFT 		5 		
-    #define MRB_strmfctl_MASK 		0xff3fffff 	/* bits 22-23 */
-    #define MRB_mrsopcod_MASK 		0xe1ffffff 	/* bits 25-28 */
-    #define MRB_mrsopcod_SHIFT 		25 		
-
-    #define OM_dmamod_MASK 		0xfffffff3 	/* bits 2-3 */
-    #define OM_dmamod_general 		0x0 		/* val 0, shift 2 */
-    #define OM_dmamod_blit 		0x4 		/* val 1, shift 2 */
-    #define OM_dmamod_vector 		0x8 		/* val 2, shift 2 */
-    #define OM_dmamod_vertex 		0xc 		/* val 3, shift 2 */
-    #define OM_dmadatasiz_MASK 		0xfffffcff 	/* bits 8-9 */
-    #define OM_dmadatasiz_8 		0x0 		/* val 0, shift 8 */
-    #define OM_dmadatasiz_16 		0x100 		/* val 1, shift 8 */
-    #define OM_dmadatasiz_32 		0x200 		/* val 2, shift 8 */
-    #define OM_dirdatasiz_MASK 		0xfffcffff 	/* bits 16-17 */
-    #define OM_dirdatasiz_8 		0x0 		/* val 0, shift 16 */
-    #define OM_dirdatasiz_16 		0x10000 	/* val 1, shift 16 */
-    #define OM_dirdatasiz_32 		0x20000 	/* val 2, shift 16 */
-
-    #define P_iy_MASK 			0xffffe000 	/* bits 0-12 */
-    #define P_iy_SHIFT 			0 		
-    #define P_ylin_MASK 		0xffff7fff 	/* bit 15 */
-    #define P_ylin_disable 		0x0 		
-    #define P_ylin_enable 		0x8000 		
-
-    #define PDCA_primod_MASK 		0xfffffffc 	/* bits 0-1 */
-    #define PDCA_primod_general 	0x0 		/* val 0, shift 0 */
-    #define PDCA_primod_blit 		0x1 		/* val 1, shift 0 */
-    #define PDCA_primod_vector 		0x2 		/* val 2, shift 0 */
-    #define PDCA_primod_vertex 		0x3 		/* val 3, shift 0 */
-    #define PDCA_primaddress_MASK 	0x3 		/* bits 2-31 */
-    #define PDCA_primaddress_SHIFT 	2 		
-
-    #define PDEA_primnostart_MASK 	0xfffffffe 	/* bit 0 */
-    #define PDEA_primnostart_disable 	0x0 		
-    #define PDEA_primnostart_enable 	0x1 		
-    #define PDEA_pagpxfer_MASK 		0xfffffffd 	/* bit 1 */
-    #define PDEA_pagpxfer_disable 	0x0 		
-    #define PDEA_pagpxfer_enable 	0x2 		
-    #define PDEA_primend_MASK 		0x3 		/* bits 2-31 */
-    #define PDEA_primend_SHIFT 		2 		
-
-    #define PLS_primptren0_MASK 	0xfffffffe 	/* bit 0 */
-    #define PLS_primptren0_disable 	0x0 		
-    #define PLS_primptren0_enable 	0x1 		
-    #define PLS_primptren1_MASK 	0xfffffffd 	/* bit 1 */
-    #define PLS_primptren1_disable 	0x0 		
-    #define PLS_primptren1_enable 	0x2 		
-    #define PLS_primptr_MASK 		0x7 		/* bits 3-31 */
-    #define PLS_primptr_SHIFT 		3 		
-
-    #define R_softreset_MASK 		0xfffffffe 	/* bit 0 */
-    #define R_softreset_disable 	0x0 		
-    #define R_softreset_enable 		0x1 		
-    #define R_softextrst_MASK 		0xfffffffd 	/* bit 1 */
-    #define R_softextrst_disable 	0x0 		
-    #define R_softextrst_enable 	0x2 		
-
-    #define SDCA_secmod_MASK 		0xfffffffc 	/* bits 0-1 */
-    #define SDCA_secmod_general 	0x0 		/* val 0, shift 0 */
-    #define SDCA_secmod_blit 		0x1 		/* val 1, shift 0 */
-    #define SDCA_secmod_vector 		0x2 		/* val 2, shift 0 */
-    #define SDCA_secmod_vertex 		0x3 		/* val 3, shift 0 */
-    #define SDCA_secaddress_MASK 	0x3 		/* bits 2-31 */
-    #define SDCA_secaddress_SHIFT 	2 		
-
-    #define SDEA_sagpxfer_MASK 		0xfffffffd 	/* bit 1 */
-    #define SDEA_sagpxfer_disable 	0x0 		
-    #define SDEA_sagpxfer_enable 	0x2 		
-    #define SDEA_secend_MASK 		0x3 		/* bits 2-31 */
-    #define SDEA_secend_SHIFT 		2 		
-
-    #define SETDCA_setupmod_MASK 	0xfffffffc 	/* bits 0-1 */
-    #define SETDCA_setupmod_vertlist 	0x0 		/* val 0, shift 0 */
-    #define SETDCA_setupaddress_MASK 	0x3 		/* bits 2-31 */
-    #define SETDCA_setupaddress_SHIFT 	2 		
-
-    #define SETDEA_setupagpxfer_MASK 	0xfffffffd 	/* bit 1 */
-    #define SETDEA_setupagpxfer_disable 0x0 		
-    #define SETDEA_setupagpxfer_enable 	0x2 		
-    #define SETDEA_setupend_MASK 	0x3 		/* bits 2-31 */
-    #define SETDEA_setupend_SHIFT 	2 		
-
-    #define S_sdydxl_MASK 		0xfffffffe 	/* bit 0 */
-    #define S_sdydxl_y 			0x0 		
-    #define S_sdydxl_x 			0x1 		
-    #define S_scanleft_MASK 		0xfffffffe 	/* bit 0 */
-    #define S_scanleft_disable 		0x0 		
-    #define S_scanleft_enable 		0x1 		
-    #define S_sdxl_MASK 		0xfffffffd 	/* bit 1 */
-    #define S_sdxl_pos 			0x0 		
-    #define S_sdxl_neg 			0x2 		
-    #define S_sdy_MASK 			0xfffffffb 	/* bit 2 */
-    #define S_sdy_pos 			0x0 		
-    #define S_sdy_neg 			0x4 		
-    #define S_sdxr_MASK 		0xffffffdf 	/* bit 5 */
-    #define S_sdxr_pos 			0x0 		
-    #define S_sdxr_neg 			0x20 		
-    #define S_brkleft_MASK 		0xfffffeff 	/* bit 8 */
-    #define S_brkleft_disable 		0x0 		
-    #define S_brkleft_enable 		0x100 		
-    #define S_errorinit_MASK 		0x7fffffff 	/* bit 31 */
-    #define S_errorinit_disable 	0x0 		
-    #define S_errorinit_enable 		0x80000000 	
-
-    #define FSC_x_off_MASK 		0xfffffff0 	/* bits 0-3 */
-    #define FSC_x_off_SHIFT 		0 		
-    #define FSC_funcnt_MASK 		0xffffff80 	/* bits 0-6 */
-    #define FSC_funcnt_SHIFT 		0 		
-    #define FSC_y_off_MASK 		0xffffff8f 	/* bits 4-6 */
-    #define FSC_y_off_SHIFT 		4 		
-    #define FSC_funoff_MASK 		0xffc0ffff 	/* bits 16-21 */
-    #define FSC_funoff_SHIFT 		16 		
-    #define FSC_stylelen_MASK 		0xffc0ffff 	/* bits 16-21 */
-    #define FSC_stylelen_SHIFT 		16 		
-
-
-    #define STH_softraphand_MASK 	0x3 		/* bits 2-31 */
-    #define STH_softraphand_SHIFT 	2 		
-
-    #define SO_srcmap_MASK 		0xfffffffe 	/* bit 0 */
-    #define SO_srcmap_fb 		0x0 		
-    #define SO_srcmap_sys 		0x1 		
-    #define SO_srcacc_MASK 		0xfffffffd 	/* bit 1 */
-    #define SO_srcacc_pci 		0x0 		
-    #define SO_srcacc_agp 		0x2 		
-    #define SO_srcorg_MASK 		0x7 		/* bits 3-31 */
-    #define SO_srcorg_SHIFT 		3 		
-
-    #define STAT_softrapen_MASK 	0xfffffffe 	/* bit 0 */
-    #define STAT_softrapen_disable 	0x0 		
-    #define STAT_softrapen_enable 	0x1 		
-    #define STAT_pickpen_MASK 		0xfffffffb 	/* bit 2 */
-    #define STAT_pickpen_disable 	0x0 		
-    #define STAT_pickpen_enable 	0x4 		
-    #define STAT_vsyncsts_MASK 		0xfffffff7 	/* bit 3 */
-    #define STAT_vsyncsts_disable 	0x0 		
-    #define STAT_vsyncsts_enable 	0x8 		
-    #define STAT_vsyncpen_MASK 		0xffffffef 	/* bit 4 */
-    #define STAT_vsyncpen_disable 	0x0 		
-    #define STAT_vsyncpen_enable 	0x10 		
-    #define STAT_vlinepen_MASK 		0xffffffdf 	/* bit 5 */
-    #define STAT_vlinepen_disable 	0x0 		
-    #define STAT_vlinepen_enable 	0x20 		
-    #define STAT_extpen_MASK 		0xffffffbf 	/* bit 6 */
-    #define STAT_extpen_disable 	0x0 		
-    #define STAT_extpen_enable 		0x40 		
-    #define STAT_wpen_MASK 		0xffffff7f 	/* bit 7 */
-    #define STAT_wpen_disable 		0x0 		
-    #define STAT_wpen_enable 		0x80 		
-    #define STAT_wcpen_MASK 		0xfffffeff 	/* bit 8 */
-    #define STAT_wcpen_disable 		0x0 		
-    #define STAT_wcpen_enable 		0x100 		
-    #define STAT_dwgengsts_MASK 	0xfffeffff 	/* bit 16 */
-    #define STAT_dwgengsts_disable 	0x0 		
-    #define STAT_dwgengsts_enable 	0x10000 	
-    #define STAT_endprdmasts_MASK 	0xfffdffff 	/* bit 17 */
-    #define STAT_endprdmasts_disable 	0x0 		
-    #define STAT_endprdmasts_enable 	0x20000 	
-    #define STAT_wbusy_MASK 		0xfffbffff 	/* bit 18 */
-    #define STAT_wbusy_disable 		0x0 		
-    #define STAT_wbusy_enable 		0x40000 	
-    #define STAT_swflag_MASK 		0xfffffff 	/* bits 28-31 */
-    #define STAT_swflag_SHIFT 		28 		
-
-    #define S_sref_MASK 		0xffffff00 	/* bits 0-7 */
-    #define S_sref_SHIFT 		0 		
-    #define S_smsk_MASK 		0xffff00ff 	/* bits 8-15 */
-    #define S_smsk_SHIFT 		8 		
-    #define S_swtmsk_MASK 		0xff00ffff 	/* bits 16-23 */
-    #define S_swtmsk_SHIFT 		16 		
-
-    #define SC_smode_MASK 		0xfffffff8 	/* bits 0-2 */
-    #define SC_smode_salways 		0x0 		/* val 0, shift 0 */
-    #define SC_smode_snever 		0x1 		/* val 1, shift 0 */
-    #define SC_smode_se 		0x2 		/* val 2, shift 0 */
-    #define SC_smode_sne 		0x3 		/* val 3, shift 0 */
-    #define SC_smode_slt 		0x4 		/* val 4, shift 0 */
-    #define SC_smode_slte 		0x5 		/* val 5, shift 0 */
-    #define SC_smode_sgt 		0x6 		/* val 6, shift 0 */
-    #define SC_smode_sgte 		0x7 		/* val 7, shift 0 */
-    #define SC_sfailop_MASK 		0xffffffc7 	/* bits 3-5 */
-    #define SC_sfailop_keep 		0x0 		/* val 0, shift 3 */
-    #define SC_sfailop_zero 		0x8 		/* val 1, shift 3 */
-    #define SC_sfailop_replace 		0x10 		/* val 2, shift 3 */
-    #define SC_sfailop_incrsat 		0x18 		/* val 3, shift 3 */
-    #define SC_sfailop_decrsat 		0x20 		/* val 4, shift 3 */
-    #define SC_sfailop_invert 		0x28 		/* val 5, shift 3 */
-    #define SC_sfailop_incr 		0x30 		/* val 6, shift 3 */
-    #define SC_sfailop_decr 		0x38 		/* val 7, shift 3 */
-    #define SC_szfailop_MASK 		0xfffffe3f 	/* bits 6-8 */
-    #define SC_szfailop_keep 		0x0 		/* val 0, shift 6 */
-    #define SC_szfailop_zero 		0x40 		/* val 1, shift 6 */
-    #define SC_szfailop_replace 	0x80 		/* val 2, shift 6 */
-    #define SC_szfailop_incrsat 	0xc0 		/* val 3, shift 6 */
-    #define SC_szfailop_decrsat 	0x100 		/* val 4, shift 6 */
-    #define SC_szfailop_invert 		0x140 		/* val 5, shift 6 */
-    #define SC_szfailop_incr 		0x180 		/* val 6, shift 6 */
-    #define SC_szfailop_decr 		0x1c0 		/* val 7, shift 6 */
-    #define SC_szpassop_MASK 		0xfffff1ff 	/* bits 9-11 */
-    #define SC_szpassop_keep 		0x0 		/* val 0, shift 9 */
-    #define SC_szpassop_zero 		0x200 		/* val 1, shift 9 */
-    #define SC_szpassop_replace 	0x400 		/* val 2, shift 9 */
-    #define SC_szpassop_incrsat 	0x600 		/* val 3, shift 9 */
-    #define SC_szpassop_decrsat 	0x800 		/* val 4, shift 9 */
-    #define SC_szpassop_invert 		0xa00 		/* val 5, shift 9 */
-    #define SC_szpassop_incr 		0xc00 		/* val 6, shift 9 */
-    #define SC_szpassop_decr 		0xe00 		/* val 7, shift 9 */
-
-    #define TD1_color1arg2selMASK 	0xfffffffc 	/* bits 0-1 */
-    #define TD1_color1alphaselMASK 	0xffffffe3 	/* bits 2-4 */
-    #define TD1_color1alphaselSHIFT 	2 		
-    #define TD1_color1arg1alphaMASK 	0xffffffdf 	/* bit 5 */
-    #define TD1_color1arg1alphadisable 	0x0 		
-    #define TD1_color1arg1alphaenable 	0x20 		
-    #define TD1_color1arg1invMASK 	0xffffffbf 	/* bit 6 */
-    #define TD1_color1arg1invdisable 	0x0 		
-    #define TD1_color1arg1invenable 	0x40 		
-    #define TD1_color1arg2alphaMASK 	0xffffff7f 	/* bit 7 */
-    #define TD1_color1arg2alphadisable 	0x0 		
-    #define TD1_color1arg2alphaenable 	0x80 		
-    #define TD1_color1arg2invMASK 	0xfffffeff 	/* bit 8 */
-    #define TD1_color1arg2invdisable 	0x0 		
-    #define TD1_color1arg2invenable 	0x100 		
-    #define TD1_color1alpha1invMASK 	0xfffffdff 	/* bit 9 */
-    #define TD1_color1alpha1invdisable 	0x0 		
-    #define TD1_color1alpha1invenable 	0x200 		
-    #define TD1_color1alpha2invMASK 	0xfffffbff 	/* bit 10 */
-    #define TD1_color1alpha2invdisable 	0x0 		
-    #define TD1_color1alpha2invenable 	0x400 		
-    #define TD1_color1selMASK 		0xff9fffff 	/* bits 21-22 */
-    #define TD1_color1selarg1 		0x0 		/* val 0, shift 21 */
-    #define TD1_color1selarg2 		0x200000 	/* val 1, shift 21 */
-    #define TD1_color1seladd 		0x400000 	/* val 2, shift 21 */
-    #define TD1_color1selmul 		0x600000 	/* val 3, shift 21 */
-    #define TD1_alpha1selMASK 		0x3fffffff 	/* bits 30-31 */
-    #define TD1_alpha1selarg1 		0x0 		/* val 0, shift 30 */
-    #define TD1_alpha1selarg2 		0x40000000 	/* val 1, shift 30 */
-    #define TD1_alpha1seladd 		0x80000000 	/* val 2, shift 30 */
-    #define TD1_alpha1selmul 		0xc0000000 	/* val 3, shift 30 */
-
-    #define TST_ramtsten_MASK 		0xfffffffe 	/* bit 0 */
-    #define TST_ramtsten_disable 	0x0 		
-    #define TST_ramtsten_enable 	0x1 		
-    #define TST_ramtstdone_MASK 	0xfffffffd 	/* bit 1 */
-    #define TST_ramtstdone_disable 	0x0 		
-    #define TST_ramtstdone_enable 	0x2 		
-    #define TST_wramtstpass_MASK 	0xfffffffb 	/* bit 2 */
-    #define TST_wramtstpass_disable 	0x0 		
-    #define TST_wramtstpass_enable 	0x4 		
-    #define TST_tcachetstpass_MASK 	0xfffffff7 	/* bit 3 */
-    #define TST_tcachetstpass_disable 	0x0 		
-    #define TST_tcachetstpass_enable 	0x8 		
-    #define TST_tluttstpass_MASK 	0xffffffef 	/* bit 4 */
-    #define TST_tluttstpass_disable 	0x0 		
-    #define TST_tluttstpass_enable 	0x10 		
-    #define TST_luttstpass_MASK 	0xffffffdf 	/* bit 5 */
-    #define TST_luttstpass_disable 	0x0 		
-    #define TST_luttstpass_enable 	0x20 		
-    #define TST_besramtstpass_MASK 	0xffffffbf 	/* bit 6 */
-    #define TST_besramtstpass_disable 	0x0 		
-    #define TST_besramtstpass_enable 	0x40 		
-    #define TST_ringen_MASK 		0xfffffeff 	/* bit 8 */
-    #define TST_ringen_disable 		0x0 		
-    #define TST_ringen_enable 		0x100 		
-    #define TST_apllbyp_MASK 		0xfffffdff 	/* bit 9 */
-    #define TST_apllbyp_disable 	0x0 		
-    #define TST_apllbyp_enable 		0x200 		
-    #define TST_hiten_MASK 		0xfffffbff 	/* bit 10 */
-    #define TST_hiten_disable 		0x0 		
-    #define TST_hiten_enable 		0x400 		
-    #define TST_tmode_MASK 		0xffffc7ff 	/* bits 11-13 */
-    #define TST_tmode_SHIFT 		11 		
-    #define TST_tclksel_MASK 		0xfffe3fff 	/* bits 14-16 */
-    #define TST_tclksel_SHIFT 		14 		
-    #define TST_ringcnten_MASK 		0xfffdffff 	/* bit 17 */
-    #define TST_ringcnten_disable 	0x0 		
-    #define TST_ringcnten_enable 	0x20000 	
-    #define TST_ringcnt_MASK 		0xc003ffff 	/* bits 18-29 */
-    #define TST_ringcnt_SHIFT 		18 		
-    #define TST_ringcntclksl_MASK 	0xbfffffff 	/* bit 30 */
-    #define TST_ringcntclksl_disable 	0x0 		
-    #define TST_ringcntclksl_enable 	0x40000000 	
-    #define TST_biosboot_MASK 		0x7fffffff 	/* bit 31 */
-    #define TST_biosboot_disable 	0x0 		
-    #define TST_biosboot_enable 	0x80000000 	
-
-    #define TMC_tformat_MASK 		0xfffffff0 	/* bits 0-3 */
-    #define TMC_tformat_tw4 		0x0 		/* val 0, shift 0 */
-    #define TMC_tformat_tw8 		0x1 		/* val 1, shift 0 */
-    #define TMC_tformat_tw15 		0x2 		/* val 2, shift 0 */
-    #define TMC_tformat_tw16 		0x3 		/* val 3, shift 0 */
-    #define TMC_tformat_tw12 		0x4 		/* val 4, shift 0 */
-    #define TMC_tformat_tw32 		0x6 		/* val 6, shift 0 */
-    #define TMC_tformat_tw422 		0xa 		/* val 10, shift 0 */
-    #define TMC_tpitchlin_MASK 		0xfffffeff 	/* bit 8 */
-    #define TMC_tpitchlin_disable 	0x0 		
-    #define TMC_tpitchlin_enable 	0x100 		
-    #define TMC_tpitchext_MASK 		0xfff001ff 	/* bits 9-19 */
-    #define TMC_tpitchext_SHIFT 	9 		
-    #define TMC_tpitch_MASK 		0xfff8ffff 	/* bits 16-18 */
-    #define TMC_tpitch_SHIFT 		16 		
-    #define TMC_owalpha_MASK 		0xffbfffff 	/* bit 22 */
-    #define TMC_owalpha_disable 	0x0 		
-    #define TMC_owalpha_enable 		0x400000 	
-    #define TMC_azeroextend_MASK 	0xff7fffff 	/* bit 23 */
-    #define TMC_azeroextend_disable 	0x0 		
-    #define TMC_azeroextend_enable 	0x800000 	
-    #define TMC_decalckey_MASK 		0xfeffffff 	/* bit 24 */
-    #define TMC_decalckey_disable 	0x0 		
-    #define TMC_decalckey_enable 	0x1000000 	
-    #define TMC_takey_MASK 		0xfdffffff 	/* bit 25 */
-    #define TMC_takey_0 		0x0 		
-    #define TMC_takey_1 		0x2000000 	
-    #define TMC_tamask_MASK 		0xfbffffff 	/* bit 26 */
-    #define TMC_tamask_0 		0x0 		
-    #define TMC_tamask_1 		0x4000000 	
-    #define TMC_clampv_MASK 		0xf7ffffff 	/* bit 27 */
-    #define TMC_clampv_disable 		0x0 		
-    #define TMC_clampv_enable 		0x8000000 	
-    #define TMC_clampu_MASK 		0xefffffff 	/* bit 28 */
-    #define TMC_clampu_disable 		0x0 		
-    #define TMC_clampu_enable 		0x10000000 	
-    #define TMC_tmodulate_MASK 		0xdfffffff 	/* bit 29 */
-    #define TMC_tmodulate_disable 	0x0 		
-    #define TMC_tmodulate_enable 	0x20000000 	
-    #define TMC_strans_MASK 		0xbfffffff 	/* bit 30 */
-    #define TMC_strans_disable 		0x0 		
-    #define TMC_strans_enable 		0x40000000 	
-    #define TMC_itrans_MASK 		0x7fffffff 	/* bit 31 */
-    #define TMC_itrans_disable 		0x0 		
-    #define TMC_itrans_enable 		0x80000000 	
-
-    #define TMC_decalblend_MASK 	0xfffffffe 	/* bit 0 */
-    #define TMC_decalblend_disable 	0x0 		
-    #define TMC_decalblend_enable 	0x1 		
-    #define TMC_idecal_MASK 		0xfffffffd 	/* bit 1 */
-    #define TMC_idecal_disable 		0x0 		
-    #define TMC_idecal_enable 		0x2 		
-    #define TMC_decaldis_MASK 		0xfffffffb 	/* bit 2 */
-    #define TMC_decaldis_disable 	0x0 		
-    #define TMC_decaldis_enable 	0x4 		
-    #define TMC_ckstransdis_MASK 	0xffffffef 	/* bit 4 */
-    #define TMC_ckstransdis_disable 	0x0 		
-    #define TMC_ckstransdis_enable 	0x10 		
-    #define TMC_borderen_MASK 		0xffffffdf 	/* bit 5 */
-    #define TMC_borderen_disable 	0x0 		
-    #define TMC_borderen_enable 	0x20 		
-    #define TMC_specen_MASK 		0xffffffbf 	/* bit 6 */
-    #define TMC_specen_disable 		0x0 		
-    #define TMC_specen_enable 		0x40 		
-
-    #define TF_minfilter_MASK 		0xfffffff0 	/* bits 0-3 */
-    #define TF_minfilter_nrst 		0x0 		/* val 0, shift 0 */
-    #define TF_minfilter_bilin 		0x2 		/* val 2, shift 0 */
-    #define TF_minfilter_cnst 		0x3 		/* val 3, shift 0 */
-    #define TF_minfilter_mm1s 		0x8 		/* val 8, shift 0 */
-    #define TF_minfilter_mm2s 		0x9 		/* val 9, shift 0 */
-    #define TF_minfilter_mm4s 		0xa 		/* val 10, shift 0 */
-    #define TF_minfilter_mm8s 		0xc 		/* val 12, shift 0 */
-    #define TF_magfilter_MASK 		0xffffff0f 	/* bits 4-7 */
-    #define TF_magfilter_nrst 		0x0 		/* val 0, shift 4 */
-    #define TF_magfilter_bilin 		0x20 		/* val 2, shift 4 */
-    #define TF_magfilter_cnst 		0x30 		/* val 3, shift 4 */
-    #define TF_avgstride_MASK 		0xfff7ffff 	/* bit 19 */
-    #define TF_avgstride_disable 	0x0 		
-    #define TF_avgstride_enable 	0x80000 	
-    #define TF_filteralpha_MASK 	0xffefffff 	/* bit 20 */
-    #define TF_filteralpha_disable 	0x0 		
-    #define TF_filteralpha_enable 	0x100000 	
-    #define TF_fthres_MASK 		0xe01fffff 	/* bits 21-28 */
-    #define TF_fthres_SHIFT 		21 		
-    #define TF_mapnb_MASK 		0x1fffffff 	/* bits 29-31 */
-    #define TF_mapnb_SHIFT 		29 		
-
-    #define TH_th_MASK 			0xffffffc0 	/* bits 0-5 */
-    #define TH_th_SHIFT 		0 		
-    #define TH_rfh_MASK 		0xffff81ff 	/* bits 9-14 */
-    #define TH_rfh_SHIFT 		9 		
-    #define TH_thmask_MASK 		0xe003ffff 	/* bits 18-28 */
-    #define TH_thmask_SHIFT 		18 		
-
-    #define TO_texorgmap_MASK 		0xfffffffe 	/* bit 0 */
-    #define TO_texorgmap_fb 		0x0 		
-    #define TO_texorgmap_sys 		0x1 		
-    #define TO_texorgacc_MASK 		0xfffffffd 	/* bit 1 */
-    #define TO_texorgacc_pci 		0x0 		
-    #define TO_texorgacc_agp 		0x2 		
-    #define TO_texorg_MASK 		0x1f 		/* bits 5-31 */
-    #define TO_texorg_SHIFT 		5 		
-
-    #define TT_tckey_MASK 		0xffff0000 	/* bits 0-15 */
-    #define TT_tckey_SHIFT 		0 		
-    #define TT_tkmask_MASK 		0xffff 		/* bits 16-31 */
-    #define TT_tkmask_SHIFT 		16 		
-
-    #define TT_tckeyh_MASK 		0xffff0000 	/* bits 0-15 */
-    #define TT_tckeyh_SHIFT 		0 		
-    #define TT_tkmaskh_MASK 		0xffff 		/* bits 16-31 */
-    #define TT_tkmaskh_SHIFT 		16 		
-
-    #define TW_tw_MASK 			0xffffffc0 	/* bits 0-5 */
-    #define TW_tw_SHIFT 		0 		
-    #define TW_rfw_MASK 		0xffff81ff 	/* bits 9-14 */
-    #define TW_rfw_SHIFT 		9 		
-    #define TW_twmask_MASK 		0xe003ffff 	/* bits 18-28 */
-    #define TW_twmask_SHIFT 		18 		
-
-    #define WAS_seqdst0_MASK 		0xffffffc0 	/* bits 0-5 */
-    #define WAS_seqdst0_SHIFT 		0 		
-    #define WAS_seqdst1_MASK 		0xfffff03f 	/* bits 6-11 */
-    #define WAS_seqdst1_SHIFT 		6 		
-    #define WAS_seqdst2_MASK 		0xfffc0fff 	/* bits 12-17 */
-    #define WAS_seqdst2_SHIFT 		12 		
-    #define WAS_seqdst3_MASK 		0xff03ffff 	/* bits 18-23 */
-    #define WAS_seqdst3_SHIFT 		18 		
-    #define WAS_seqlen_MASK 		0xfcffffff 	/* bits 24-25 */
-    #define WAS_wfirsttag_MASK 		0xfbffffff 	/* bit 26 */
-    #define WAS_wfirsttag_disable 	0x0 		
-    #define WAS_wfirsttag_enable 	0x4000000 	
-    #define WAS_wsametag_MASK 		0xf7ffffff 	/* bit 27 */
-    #define WAS_wsametag_disable 	0x0 		
-    #define WAS_wsametag_enable 	0x8000000 	
-    #define WAS_seqoff_MASK 		0xefffffff 	/* bit 28 */
-    #define WAS_seqoff_disable 		0x0 		
-    #define WAS_seqoff_enable 		0x10000000 	
-
-    #define WMA_wcodeaddr_MASK 		0xff 		/* bits 8-31 */
-    #define WMA_wcodeaddr_SHIFT 	8 		
-
-    #define WF_walustsflag_MASK 	0xffffff00 	/* bits 0-7 */
-    #define WF_walustsflag_SHIFT 	0 		
-    #define WF_walucfgflag_MASK 	0xffff00ff 	/* bits 8-15 */
-    #define WF_walucfgflag_SHIFT 	8 		
-    #define WF_wprgflag_MASK 		0xffff 		/* bits 16-31 */
-    #define WF_wprgflag_SHIFT 		16 		
-
-    #define WF1_walustsflag1_MASK 	0xffffff00 	/* bits 0-7 */
-    #define WF1_walustsflag1_SHIFT 	0 		
-    #define WF1_walucfgflag1_MASK 	0xffff00ff 	/* bits 8-15 */
-    #define WF1_walucfgflag1_SHIFT 	8 		
-    #define WF1_wprgflag1_MASK 		0xffff 		/* bits 16-31 */
-    #define WF1_wprgflag1_SHIFT 	16 		
-
-    #define WGV_wgetmsbmin_MASK 	0xffffffe0 	/* bits 0-4 */
-    #define WGV_wgetmsbmin_SHIFT 	0 		
-    #define WGV_wgetmsbmax_MASK 	0xffffe0ff 	/* bits 8-12 */
-    #define WGV_wgetmsbmax_SHIFT 	8 		
-    #define WGV_wbrklefttop_MASK 	0xfffeffff 	/* bit 16 */
-    #define WGV_wbrklefttop_disable 	0x0 		
-    #define WGV_wbrklefttop_enable 	0x10000 	
-    #define WGV_wfastcrop_MASK 		0xfffdffff 	/* bit 17 */
-    #define WGV_wfastcrop_disable 	0x0 		
-    #define WGV_wfastcrop_enable 	0x20000 	
-    #define WGV_wcentersnap_MASK 	0xfffbffff 	/* bit 18 */
-    #define WGV_wcentersnap_disable 	0x0 		
-    #define WGV_wcentersnap_enable 	0x40000 	
-    #define WGV_wbrkrighttop_MASK 	0xfff7ffff 	/* bit 19 */
-    #define WGV_wbrkrighttop_disable 	0x0 		
-    #define WGV_wbrkrighttop_enable 	0x80000 	
-
-    #define WIA_wmode_MASK 		0xfffffffc 	/* bits 0-1 */
-    #define WIA_wmode_suspend 		0x0 		/* val 0, shift 0 */
-    #define WIA_wmode_resume 		0x1 		/* val 1, shift 0 */
-    #define WIA_wmode_jump 		0x2 		/* val 2, shift 0 */
-    #define WIA_wmode_start 		0x3 		/* val 3, shift 0 */
-    #define WIA_wagp_MASK 		0xfffffffb 	/* bit 2 */
-    #define WIA_wagp_pci 		0x0 		
-    #define WIA_wagp_agp 		0x4 		
-    #define WIA_wiaddr_MASK 		0x7 		/* bits 3-31 */
-    #define WIA_wiaddr_SHIFT 		3 		
-
-    #define WIA2_wmode_MASK 		0xfffffffc 	/* bits 0-1 */
-    #define WIA2_wmode_suspend 		0x0 		/* val 0, shift 0 */
-    #define WIA2_wmode_resume 		0x1 		/* val 1, shift 0 */
-    #define WIA2_wmode_jump 		0x2 		/* val 2, shift 0 */
-    #define WIA2_wmode_start 		0x3 		/* val 3, shift 0 */
-    #define WIA2_wagp_MASK 		0xfffffffb 	/* bit 2 */
-    #define WIA2_wagp_pci 		0x0 		
-    #define WIA2_wagp_agp 		0x4 		
-    #define WIA2_wiaddr_MASK 		0x7 		/* bits 3-31 */
-    #define WIA2_wiaddr_SHIFT 		3 		
-
-    #define WIMA_wimemaddr_MASK 	0xffffff00 	/* bits 0-7 */
-    #define WIMA_wimemaddr_SHIFT 	0 		
-
-    #define WM_wucodecache_MASK 	0xfffffffe 	/* bit 0 */
-    #define WM_wucodecache_disable 	0x0 		
-    #define WM_wucodecache_enable 	0x1 		
-    #define WM_wmaster_MASK 		0xfffffffd 	/* bit 1 */
-    #define WM_wmaster_disable 		0x0 		
-    #define WM_wmaster_enable 		0x2 		
-    #define WM_wcacheflush_MASK 	0xfffffff7 	/* bit 3 */
-    #define WM_wcacheflush_disable 	0x0 		
-    #define WM_wcacheflush_enable 	0x8 		
-
-    #define WVS_wvrtxsz_MASK 		0xffffffc0 	/* bits 0-5 */
-    #define WVS_wvrtxsz_SHIFT 		0 		
-    #define WVS_primsz_MASK 		0xffffc0ff 	/* bits 8-13 */
-    #define WVS_primsz_SHIFT 		8 		
-
-    #define XYEA_x_end_MASK 		0xffff0000 	/* bits 0-15 */
-    #define XYEA_x_end_SHIFT 		0 		
-    #define XYEA_y_end_MASK 		0xffff 		/* bits 16-31 */
-    #define XYEA_y_end_SHIFT 		16 		
-
-    #define XYSA_x_start_MASK 		0xffff0000 	/* bits 0-15 */
-    #define XYSA_x_start_SHIFT 		0 		
-    #define XYSA_y_start_MASK 		0xffff 		/* bits 16-31 */
-    #define XYSA_y_start_SHIFT 		16 		
-
-    #define YA_ydst_MASK 		0xff800000 	/* bits 0-22 */
-    #define YA_ydst_SHIFT 		0 		
-    #define YA_sellin_MASK 		0x1fffffff 	/* bits 29-31 */
-    #define YA_sellin_SHIFT 		29 		
-
-    #define YDL_length_MASK 		0xffff0000 	/* bits 0-15 */
-    #define YDL_length_SHIFT 		0 		
-    #define YDL_yval_MASK 		0xffff 		/* bits 16-31 */
-    #define YDL_yval_SHIFT 		16 		
-
-    #define ZO_zorgmap_MASK 		0xfffffffe 	/* bit 0 */
-    #define ZO_zorgmap_fb 		0x0 		
-    #define ZO_zorgmap_sys 		0x1 		
-    #define ZO_zorgacc_MASK 		0xfffffffd 	/* bit 1 */
-    #define ZO_zorgacc_pci 		0x0 		
-    #define ZO_zorgacc_agp 		0x2 		
-    #define ZO_zorg_MASK 		0x3 		/* bits 2-31 */
-    #define ZO_zorg_SHIFT 		2 		
+#    define AGP_PLL_agp2xpllen_MASK 	0xfffffffe 	/* bit 0 */
+#    define AGP_PLL_agp2xpllen_disable 	0x0 		
+#    define AGP_PLL_agp2xpllen_enable 	0x1 		
+
+#    define AC_src_MASK 		0xfffffff0 	/* bits 0-3 */
+#    define AC_src_zero 		0x0 		/* val 0, shift 0 */
+#    define AC_src_one 			0x1 		/* val 1, shift 0 */
+#    define AC_src_dst_color 		0x2 		/* val 2, shift 0 */
+#    define AC_src_om_dst_color 	0x3 		/* val 3, shift 0 */
+#    define AC_src_src_alpha 		0x4 		/* val 4, shift 0 */
+#    define AC_src_om_src_alpha 	0x5 		/* val 5, shift 0 */
+#    define AC_src_dst_alpha 		0x6 		/* val 6, shift 0 */
+#    define AC_src_om_dst_alpha 	0x7 		/* val 7, shift 0 */
+#    define AC_src_src_alpha_sat 	0x8 		/* val 8, shift 0 */
+#    define AC_dst_MASK 		0xffffff0f 	/* bits 4-7 */
+#    define AC_dst_zero 		0x0 		/* val 0, shift 4 */
+#    define AC_dst_one 			0x10 		/* val 1, shift 4 */
+#    define AC_dst_src_color 		0x20 		/* val 2, shift 4 */
+#    define AC_dst_om_src_color 	0x30 		/* val 3, shift 4 */
+#    define AC_dst_src_alpha 		0x40 		/* val 4, shift 4 */
+#    define AC_dst_om_src_alpha 	0x50 		/* val 5, shift 4 */
+#    define AC_dst_dst_alpha 		0x60 		/* val 6, shift 4 */
+#    define AC_dst_om_dst_alpha 	0x70 		/* val 7, shift 4 */
+#    define AC_amode_MASK 		0xfffffcff 	/* bits 8-9 */
+#    define AC_amode_FCOL 		0x0 		/* val 0, shift 8 */
+#    define AC_amode_alpha_channel 	0x100 		/* val 1, shift 8 */
+#    define AC_amode_video_alpha 	0x200 		/* val 2, shift 8 */
+#    define AC_amode_RSVD 		0x300 		/* val 3, shift 8 */
+#    define AC_astipple_MASK 		0xfffff7ff 	/* bit 11 */
+#    define AC_astipple_disable 	0x0 		
+#    define AC_astipple_enable 		0x800 		
+#    define AC_aten_MASK 		0xffffefff 	/* bit 12 */
+#    define AC_aten_disable 		0x0 		
+#    define AC_aten_enable 		0x1000 		
+#    define AC_atmode_MASK 		0xffff1fff 	/* bits 13-15 */
+#    define AC_atmode_noacmp 		0x0 		/* val 0, shift 13 */
+#    define AC_atmode_ae 		0x4000 		/* val 2, shift 13 */
+#    define AC_atmode_ane 		0x6000 		/* val 3, shift 13 */
+#    define AC_atmode_alt 		0x8000 		/* val 4, shift 13 */
+#    define AC_atmode_alte 		0xa000 		/* val 5, shift 13 */
+#    define AC_atmode_agt 		0xc000 		/* val 6, shift 13 */
+#    define AC_atmode_agte 		0xe000 		/* val 7, shift 13 */
+#    define AC_atref_MASK 		0xff00ffff 	/* bits 16-23 */
+#    define AC_atref_SHIFT 		16 		
+#    define AC_alphasel_MASK 		0xfcffffff 	/* bits 24-25 */
+#    define AC_alphasel_fromtex 	0x0 		/* val 0, shift 24 */
+#    define AC_alphasel_diffused 	0x1000000 	/* val 1, shift 24 */
+#    define AC_alphasel_modulated 	0x2000000 	/* val 2, shift 24 */
+#    define AC_alphasel_trans 		0x3000000 	/* val 3, shift 24 */
+
+#    define AR0_ar0_MASK 		0xfffc0000 	/* bits 0-17 */
+#    define AR0_ar0_SHIFT 		0 		
+
+#    define AR1_ar1_MASK 		0xff000000 	/* bits 0-23 */
+#    define AR1_ar1_SHIFT 		0 		
+
+#    define AR2_ar2_MASK 		0xfffc0000 	/* bits 0-17 */
+#    define AR2_ar2_SHIFT 		0 		
+
+#    define AR3_ar3_MASK 		0xff000000 	/* bits 0-23 */
+#    define AR3_ar3_SHIFT 		0 		
+#    define AR3_spage_MASK 		0xf8ffffff 	/* bits 24-26 */
+#    define AR3_spage_SHIFT 		24 		
+
+#    define AR4_ar4_MASK 		0xfffc0000 	/* bits 0-17 */
+#    define AR4_ar4_SHIFT 		0 		
+
+#    define AR5_ar5_MASK 		0xfffc0000 	/* bits 0-17 */
+#    define AR5_ar5_SHIFT 		0 		
+
+#    define AR6_ar6_MASK 		0xfffc0000 	/* bits 0-17 */
+#    define AR6_ar6_SHIFT 		0 		
+
+#    define BC_besen_MASK 		0xfffffffe 	/* bit 0 */
+#    define BC_besen_disable 		0x0 		
+#    define BC_besen_enable 		0x1 		
+#    define BC_besv1srcstp_MASK 	0xffffffbf 	/* bit 6 */
+#    define BC_besv1srcstp_even 	0x0 		
+#    define BC_besv1srcstp_odd 		0x40 		
+#    define BC_besv2srcstp_MASK 	0xfffffeff 	/* bit 8 */
+#    define BC_besv2srcstp_disable 	0x0 		
+#    define BC_besv2srcstp_enable 	0x100 		
+#    define BC_beshfen_MASK 		0xfffffbff 	/* bit 10 */
+#    define BC_beshfen_disable 		0x0 		
+#    define BC_beshfen_enable 		0x400 		
+#    define BC_besvfen_MASK 		0xfffff7ff 	/* bit 11 */
+#    define BC_besvfen_disable 		0x0 		
+#    define BC_besvfen_enable 		0x800 		
+#    define BC_beshfixc_MASK 		0xffffefff 	/* bit 12 */
+#    define BC_beshfixc_weight 		0x0 		
+#    define BC_beshfixc_coeff 		0x1000 		
+#    define BC_bescups_MASK 		0xfffeffff 	/* bit 16 */
+#    define BC_bescups_disable 		0x0 		
+#    define BC_bescups_enable 		0x10000 	
+#    define BC_bes420pl_MASK 		0xfffdffff 	/* bit 17 */
+#    define BC_bes420pl_422 		0x0 		
+#    define BC_bes420pl_420 		0x20000 	
+#    define BC_besdith_MASK 		0xfffbffff 	/* bit 18 */
+#    define BC_besdith_disable 		0x0 		
+#    define BC_besdith_enable 		0x40000 	
+#    define BC_beshmir_MASK 		0xfff7ffff 	/* bit 19 */
+#    define BC_beshmir_disable 		0x0 		
+#    define BC_beshmir_enable 		0x80000 	
+#    define BC_besbwen_MASK 		0xffefffff 	/* bit 20 */
+#    define BC_besbwen_color 		0x0 		
+#    define BC_besbwen_bw 		0x100000 	
+#    define BC_besblank_MASK 		0xffdfffff 	/* bit 21 */
+#    define BC_besblank_disable 	0x0 		
+#    define BC_besblank_enable 		0x200000 	
+#    define BC_besfselm_MASK 		0xfeffffff 	/* bit 24 */
+#    define BC_besfselm_soft 		0x0 		
+#    define BC_besfselm_hard 		0x1000000 	
+#    define BC_besfsel_MASK 		0xf9ffffff 	/* bits 25-26 */
+#    define BC_besfsel_a1 		0x0 		/* val 0, shift 25 */
+#    define BC_besfsel_a2 		0x2000000 	/* val 1, shift 25 */
+#    define BC_besfsel_b1 		0x4000000 	/* val 2, shift 25 */
+#    define BC_besfsel_b2 		0x6000000 	/* val 3, shift 25 */
+
+#    define BGC_beshzoom_MASK 		0xfffffffe 	/* bit 0 */
+#    define BGC_beshzoom_disable 	0x0 		
+#    define BGC_beshzoom_enable 	0x1 		
+#    define BGC_beshzoomf_MASK 		0xfffffffd 	/* bit 1 */
+#    define BGC_beshzoomf_disable 	0x0 		
+#    define BGC_beshzoomf_enable 	0x2 		
+#    define BGC_bescorder_MASK 		0xfffffff7 	/* bit 3 */
+#    define BGC_bescorder_even 		0x0 		
+#    define BGC_bescorder_odd 		0x8 		
+#    define BGC_besreghup_MASK 		0xffffffef 	/* bit 4 */
+#    define BGC_besreghup_disable 	0x0 		
+#    define BGC_besreghup_enable 	0x10 		
+#    define BGC_besvcnt_MASK 		0xf000ffff 	/* bits 16-27 */
+#    define BGC_besvcnt_SHIFT 		16 		
+
+#    define BHC_besright_MASK 		0xfffff800 	/* bits 0-10 */
+#    define BHC_besright_SHIFT 		0 		
+#    define BHC_besleft_MASK 		0xf800ffff 	/* bits 16-26 */
+#    define BHC_besleft_SHIFT 		16 		
+
+#    define BHISF_beshiscal_MASK 	0xffe00003 	/* bits 2-20 */
+#    define BHISF_beshiscal_SHIFT 	2 		
+
+#    define BHSE_beshsrcend_MASK 	0xfc000003 	/* bits 2-25 */
+#    define BHSE_beshsrcend_SHIFT 	2 		
+
+#    define BHSL_beshsrclst_MASK 	0xfc00ffff 	/* bits 16-25 */
+#    define BHSL_beshsrclst_SHIFT 	16 		
+
+#    define BHSS_beshsrcst_MASK 	0xfc000003 	/* bits 2-25 */
+#    define BHSS_beshsrcst_SHIFT 	2 		
+
+#    define BP_bespitch_MASK 		0xfffff000 	/* bits 0-11 */
+#    define BP_bespitch_SHIFT 		0 		
+
+#    define BS_besstat_MASK 		0xfffffffc 	/* bits 0-1 */
+#    define BS_besstat_a1 		0x0 		/* val 0, shift 0 */
+#    define BS_besstat_a2 		0x1 		/* val 1, shift 0 */
+#    define BS_besstat_b1 		0x2 		/* val 2, shift 0 */
+#    define BS_besstat_b2 		0x3 		/* val 3, shift 0 */
+
+#    define BSF_besv1srclast_MASK 	0xfffffc00 	/* bits 0-9 */
+#    define BSF_besv1srclast_SHIFT 	0 		
+
+#    define BSF_besv2srclst_MASK 	0xfffffc00 	/* bits 0-9 */
+#    define BSF_besv2srclst_SHIFT 	0 		
+
+#    define BSF_besv1wght_MASK 		0xffff0003 	/* bits 2-15 */
+#    define BSF_besv1wght_SHIFT 	2 		
+#    define BSF_besv1wghts_MASK 	0xfffeffff 	/* bit 16 */
+#    define BSF_besv1wghts_disable 	0x0 		
+#    define BSF_besv1wghts_enable 	0x10000 	
+
+#    define BSF_besv2wght_MASK 		0xffff0003 	/* bits 2-15 */
+#    define BSF_besv2wght_SHIFT 	2 		
+#    define BSF_besv2wghts_MASK 	0xfffeffff 	/* bit 16 */
+#    define BSF_besv2wghts_disable 	0x0 		
+#    define BSF_besv2wghts_enable 	0x10000 	
+
+#    define BVC_besbot_MASK 		0xfffff800 	/* bits 0-10 */
+#    define BVC_besbot_SHIFT 		0 		
+#    define BVC_bestop_MASK 		0xf800ffff 	/* bits 16-26 */
+#    define BVC_bestop_SHIFT 		16 		
+
+#    define BVISF_besviscal_MASK 	0xffe00003 	/* bits 2-20 */
+#    define BVISF_besviscal_SHIFT 	2 		
+
+#    define CXB_cxleft_MASK 		0xfffff000 	/* bits 0-11 */
+#    define CXB_cxleft_SHIFT 		0 		
+#    define CXB_cxright_MASK 		0xf000ffff 	/* bits 16-27 */
+#    define CXB_cxright_SHIFT 		16 		
+
+#    define DO_dstmap_MASK 		0xfffffffe 	/* bit 0 */
+#    define DO_dstmap_fb 		0x0 		
+#    define DO_dstmap_sys 		0x1 		
+#    define DO_dstacc_MASK 		0xfffffffd 	/* bit 1 */
+#    define DO_dstacc_pci 		0x0 		
+#    define DO_dstacc_agp 		0x2 		
+#    define DO_dstorg_MASK 		0x7 		/* bits 3-31 */
+#    define DO_dstorg_SHIFT 		3 		
+
+#    define DC_opcod_MASK 		0xfffffff0 	/* bits 0-3 */
+#    define DC_opcod_line_open 		0x0 		/* val 0, shift 0 */
+#    define DC_opcod_autoline_open 	0x1 		/* val 1, shift 0 */
+#    define DC_opcod_line_close 	0x2 		/* val 2, shift 0 */
+#    define DC_opcod_autoline_close 	0x3 		/* val 3, shift 0 */
+#    define DC_opcod_trap 		0x4 		/* val 4, shift 0 */
+#    define DC_opcod_texture_trap 	0x6 		/* val 6, shift 0 */
+#    define DC_opcod_bitblt 		0x8 		/* val 8, shift 0 */
+#    define DC_opcod_iload 		0x9 		/* val 9, shift 0 */
+#    define DC_atype_MASK 		0xffffff8f 	/* bits 4-6 */
+#    define DC_atype_rpl 		0x0 		/* val 0, shift 4 */
+#    define DC_atype_rstr 		0x10 		/* val 1, shift 4 */
+#    define DC_atype_zi 		0x30 		/* val 3, shift 4 */
+#    define DC_atype_blk 		0x40 		/* val 4, shift 4 */
+#    define DC_atype_i 			0x70 		/* val 7, shift 4 */
+#    define DC_linear_MASK 		0xffffff7f 	/* bit 7 */
+#    define DC_linear_xy 		0x0 		
+#    define DC_linear_linear 		0x80 		
+#    define DC_zmode_MASK 		0xfffff8ff 	/* bits 8-10 */
+#    define DC_zmode_nozcmp 		0x0 		/* val 0, shift 8 */
+#    define DC_zmode_ze 		0x200 		/* val 2, shift 8 */
+#    define DC_zmode_zne 		0x300 		/* val 3, shift 8 */
+#    define DC_zmode_zlt 		0x400 		/* val 4, shift 8 */
+#    define DC_zmode_zlte 		0x500 		/* val 5, shift 8 */
+#    define DC_zmode_zgt 		0x600 		/* val 6, shift 8 */
+#    define DC_zmode_zgte 		0x700 		/* val 7, shift 8 */
+#    define DC_solid_MASK 		0xfffff7ff 	/* bit 11 */
+#    define DC_solid_disable 		0x0 		
+#    define DC_solid_enable 		0x800 		
+#    define DC_arzero_MASK 		0xffffefff 	/* bit 12 */
+#    define DC_arzero_disable 		0x0 		
+#    define DC_arzero_enable 		0x1000 		
+#    define DC_sgnzero_MASK 		0xffffdfff 	/* bit 13 */
+#    define DC_sgnzero_disable 		0x0 		
+#    define DC_sgnzero_enable 		0x2000 		
+#    define DC_shftzero_MASK 		0xffffbfff 	/* bit 14 */
+#    define DC_shftzero_disable 	0x0 		
+#    define DC_shftzero_enable 		0x4000 		
+#    define DC_bop_MASK 		0xfff0ffff 	/* bits 16-19 */
+#    define DC_bop_SHIFT 		16 		
+#    define DC_trans_MASK 		0xff0fffff 	/* bits 20-23 */
+#    define DC_trans_SHIFT 		20 		
+#    define DC_bltmod_MASK 		0xe1ffffff 	/* bits 25-28 */
+#    define DC_bltmod_bmonolef 		0x0 		/* val 0, shift 25 */
+#    define DC_bltmod_bmonowf 		0x8000000 	/* val 4, shift 25 */
+#    define DC_bltmod_bplan 		0x2000000 	/* val 1, shift 25 */
+#    define DC_bltmod_bfcol 		0x4000000 	/* val 2, shift 25 */
+#    define DC_bltmod_bu32bgr 		0x6000000 	/* val 3, shift 25 */
+#    define DC_bltmod_bu32rgb 		0xe000000 	/* val 7, shift 25 */
+#    define DC_bltmod_bu24bgr 		0x16000000 	/* val 11, shift 25 */
+#    define DC_bltmod_bu24rgb 		0x1e000000 	/* val 15, shift 25 */
+#    define DC_pattern_MASK 		0xdfffffff 	/* bit 29 */
+#    define DC_pattern_disable 		0x0 		
+#    define DC_pattern_enable 		0x20000000 	
+#    define DC_transc_MASK 		0xbfffffff 	/* bit 30 */
+#    define DC_transc_disable 		0x0 		
+#    define DC_transc_enable 		0x40000000 	
+#    define DC_clipdis_MASK 		0x7fffffff 	/* bit 31 */
+#    define DC_clipdis_disable 		0x0 		
+#    define DC_clipdis_enable 		0x80000000 	
+
+#    define DS_dwgsyncaddr_MASK 	0x3 		/* bits 2-31 */
+#    define DS_dwgsyncaddr_SHIFT 	2 		
+
+#    define FS_fifocount_MASK 		0xffffff80 	/* bits 0-6 */
+#    define FS_fifocount_SHIFT 		0 		
+#    define FS_bfull_MASK 		0xfffffeff 	/* bit 8 */
+#    define FS_bfull_disable 		0x0 		
+#    define FS_bfull_enable 		0x100 		
+#    define FS_bempty_MASK 		0xfffffdff 	/* bit 9 */
+#    define FS_bempty_disable 		0x0 		
+#    define FS_bempty_enable 		0x200 		
+
+#    define XA_fxleft_MASK 		0xffff0000 	/* bits 0-15 */
+#    define XA_fxleft_SHIFT 		0 		
+#    define XA_fxright_MASK 		0xffff 		/* bits 16-31 */
+#    define XA_fxright_SHIFT 		16 		
+
+#    define IC_softrapiclr_MASK 	0xfffffffe 	/* bit 0 */
+#    define IC_softrapiclr_disable 	0x0 		
+#    define IC_softrapiclr_enable 	0x1 		
+#    define IC_pickiclr_MASK 		0xfffffffb 	/* bit 2 */
+#    define IC_pickiclr_disable 	0x0 		
+#    define IC_pickiclr_enable 		0x4 		
+#    define IC_vlineiclr_MASK 		0xffffffdf 	/* bit 5 */
+#    define IC_vlineiclr_disable 	0x0 		
+#    define IC_vlineiclr_enable 	0x20 		
+#    define IC_wiclr_MASK 		0xffffff7f 	/* bit 7 */
+#    define IC_wiclr_disable 		0x0 		
+#    define IC_wiclr_enable 		0x80 		
+#    define IC_wciclr_MASK 		0xfffffeff 	/* bit 8 */
+#    define IC_wciclr_disable 		0x0 		
+#    define IC_wciclr_enable 		0x100 		
+
+#    define IE_softrapien_MASK 		0xfffffffe 	/* bit 0 */
+#    define IE_softrapien_disable 	0x0 		
+#    define IE_softrapien_enable 	0x1 		
+#    define IE_pickien_MASK 		0xfffffffb 	/* bit 2 */
+#    define IE_pickien_disable 		0x0 		
+#    define IE_pickien_enable 		0x4 		
+#    define IE_vlineien_MASK 		0xffffffdf 	/* bit 5 */
+#    define IE_vlineien_disable 	0x0 		
+#    define IE_vlineien_enable 		0x20 		
+#    define IE_extien_MASK 		0xffffffbf 	/* bit 6 */
+#    define IE_extien_disable 		0x0 		
+#    define IE_extien_enable 		0x40 		
+#    define IE_wien_MASK 		0xffffff7f 	/* bit 7 */
+#    define IE_wien_disable 		0x0 		
+#    define IE_wien_enable 		0x80 		
+#    define IE_wcien_MASK 		0xfffffeff 	/* bit 8 */
+#    define IE_wcien_disable 		0x0 		
+#    define IE_wcien_enable 		0x100 		
+
+#    define MA_pwidth_MASK 		0xfffffffc 	/* bits 0-1 */
+#    define MA_pwidth_8 		0x0 		/* val 0, shift 0 */
+#    define MA_pwidth_16 		0x1 		/* val 1, shift 0 */
+#    define MA_pwidth_32 		0x2 		/* val 2, shift 0 */
+#    define MA_pwidth_24 		0x3 		/* val 3, shift 0 */
+#    define MA_zwidth_MASK 		0xffffffe7 	/* bits 3-4 */
+#    define MA_zwidth_16 		0x0 		/* val 0, shift 3 */
+#    define MA_zwidth_32 		0x8 		/* val 1, shift 3 */
+#    define MA_zwidth_15 		0x10 		/* val 2, shift 3 */
+#    define MA_zwidth_24 		0x18 		/* val 3, shift 3 */
+#    define MA_memreset_MASK 		0xffff7fff 	/* bit 15 */
+#    define MA_memreset_disable 	0x0 		
+#    define MA_memreset_enable 		0x8000 		
+#    define MA_fogen_MASK 		0xfbffffff 	/* bit 26 */
+#    define MA_fogen_disable 		0x0 		
+#    define MA_fogen_enable 		0x4000000 	
+#    define MA_tlutload_MASK 		0xdfffffff 	/* bit 29 */
+#    define MA_tlutload_disable 	0x0 		
+#    define MA_tlutload_enable 		0x20000000 	
+#    define MA_nodither_MASK 		0xbfffffff 	/* bit 30 */
+#    define MA_nodither_disable 	0x0 		
+#    define MA_nodither_enable 		0x40000000 	
+#    define MA_dit555_MASK 		0x7fffffff 	/* bit 31 */
+#    define MA_dit555_disable 		0x0 		
+#    define MA_dit555_enable 		0x80000000 	
+
+#    define MCWS_casltncy_MASK 		0xfffffff8 	/* bits 0-2 */
+#    define MCWS_casltncy_SHIFT 	0 		
+#    define MCWS_rrddelay_MASK 		0xffffffcf 	/* bits 4-5 */
+#    define MCWS_rcddelay_MASK 		0xfffffe7f 	/* bits 7-8 */
+#    define MCWS_rasmin_MASK 		0xffffe3ff 	/* bits 10-12 */
+#    define MCWS_rasmin_SHIFT 		10 		
+#    define MCWS_rpdelay_MASK 		0xffff3fff 	/* bits 14-15 */
+#    define MCWS_wrdelay_MASK 		0xfff3ffff 	/* bits 18-19 */
+#    define MCWS_rddelay_MASK 		0xffdfffff 	/* bit 21 */
+#    define MCWS_rddelay_disable 	0x0 		
+#    define MCWS_rddelay_enable 	0x200000 	
+#    define MCWS_smrdelay_MASK 		0xfe7fffff 	/* bits 23-24 */
+#    define MCWS_bwcdelay_MASK 		0xf3ffffff 	/* bits 26-27 */
+#    define MCWS_bpldelay_MASK 		0x1fffffff 	/* bits 29-31 */
+#    define MCWS_bpldelay_SHIFT 	29 		
+
+#    define MRB_mclkbrd0_MASK 		0xfffffff0 	/* bits 0-3 */
+#    define MRB_mclkbrd0_SHIFT 		0 		
+#    define MRB_mclkbrd1_MASK 		0xfffffe1f 	/* bits 5-8 */
+#    define MRB_mclkbrd1_SHIFT 		5 		
+#    define MRB_strmfctl_MASK 		0xff3fffff 	/* bits 22-23 */
+#    define MRB_mrsopcod_MASK 		0xe1ffffff 	/* bits 25-28 */
+#    define MRB_mrsopcod_SHIFT 		25 		
+
+#    define OM_dmamod_MASK 		0xfffffff3 	/* bits 2-3 */
+#    define OM_dmamod_general 		0x0 		/* val 0, shift 2 */
+#    define OM_dmamod_blit 		0x4 		/* val 1, shift 2 */
+#    define OM_dmamod_vector 		0x8 		/* val 2, shift 2 */
+#    define OM_dmamod_vertex 		0xc 		/* val 3, shift 2 */
+#    define OM_dmadatasiz_MASK 		0xfffffcff 	/* bits 8-9 */
+#    define OM_dmadatasiz_8 		0x0 		/* val 0, shift 8 */
+#    define OM_dmadatasiz_16 		0x100 		/* val 1, shift 8 */
+#    define OM_dmadatasiz_32 		0x200 		/* val 2, shift 8 */
+#    define OM_dirdatasiz_MASK 		0xfffcffff 	/* bits 16-17 */
+#    define OM_dirdatasiz_8 		0x0 		/* val 0, shift 16 */
+#    define OM_dirdatasiz_16 		0x10000 	/* val 1, shift 16 */
+#    define OM_dirdatasiz_32 		0x20000 	/* val 2, shift 16 */
+
+#    define P_iy_MASK 			0xffffe000 	/* bits 0-12 */
+#    define P_iy_SHIFT 			0 		
+#    define P_ylin_MASK 		0xffff7fff 	/* bit 15 */
+#    define P_ylin_disable 		0x0 		
+#    define P_ylin_enable 		0x8000 		
+
+#    define PDCA_primod_MASK 		0xfffffffc 	/* bits 0-1 */
+#    define PDCA_primod_general 	0x0 		/* val 0, shift 0 */
+#    define PDCA_primod_blit 		0x1 		/* val 1, shift 0 */
+#    define PDCA_primod_vector 		0x2 		/* val 2, shift 0 */
+#    define PDCA_primod_vertex 		0x3 		/* val 3, shift 0 */
+#    define PDCA_primaddress_MASK 	0x3 		/* bits 2-31 */
+#    define PDCA_primaddress_SHIFT 	2 		
+
+#    define PDEA_primnostart_MASK 	0xfffffffe 	/* bit 0 */
+#    define PDEA_primnostart_disable 	0x0 		
+#    define PDEA_primnostart_enable 	0x1 		
+#    define PDEA_pagpxfer_MASK 		0xfffffffd 	/* bit 1 */
+#    define PDEA_pagpxfer_disable 	0x0 		
+#    define PDEA_pagpxfer_enable 	0x2 		
+#    define PDEA_primend_MASK 		0x3 		/* bits 2-31 */
+#    define PDEA_primend_SHIFT 		2 		
+
+#    define PLS_primptren0_MASK 	0xfffffffe 	/* bit 0 */
+#    define PLS_primptren0_disable 	0x0 		
+#    define PLS_primptren0_enable 	0x1 		
+#    define PLS_primptren1_MASK 	0xfffffffd 	/* bit 1 */
+#    define PLS_primptren1_disable 	0x0 		
+#    define PLS_primptren1_enable 	0x2 		
+#    define PLS_primptr_MASK 		0x7 		/* bits 3-31 */
+#    define PLS_primptr_SHIFT 		3 		
+
+#    define R_softreset_MASK 		0xfffffffe 	/* bit 0 */
+#    define R_softreset_disable 	0x0 		
+#    define R_softreset_enable 		0x1 		
+#    define R_softextrst_MASK 		0xfffffffd 	/* bit 1 */
+#    define R_softextrst_disable 	0x0 		
+#    define R_softextrst_enable 	0x2 		
+
+#    define SDCA_secmod_MASK 		0xfffffffc 	/* bits 0-1 */
+#    define SDCA_secmod_general 	0x0 		/* val 0, shift 0 */
+#    define SDCA_secmod_blit 		0x1 		/* val 1, shift 0 */
+#    define SDCA_secmod_vector 		0x2 		/* val 2, shift 0 */
+#    define SDCA_secmod_vertex 		0x3 		/* val 3, shift 0 */
+#    define SDCA_secaddress_MASK 	0x3 		/* bits 2-31 */
+#    define SDCA_secaddress_SHIFT 	2 		
+
+#    define SDEA_sagpxfer_MASK 		0xfffffffd 	/* bit 1 */
+#    define SDEA_sagpxfer_disable 	0x0 		
+#    define SDEA_sagpxfer_enable 	0x2 		
+#    define SDEA_secend_MASK 		0x3 		/* bits 2-31 */
+#    define SDEA_secend_SHIFT 		2 		
+
+#    define SETDCA_setupmod_MASK 	0xfffffffc 	/* bits 0-1 */
+#    define SETDCA_setupmod_vertlist 	0x0 		/* val 0, shift 0 */
+#    define SETDCA_setupaddress_MASK 	0x3 		/* bits 2-31 */
+#    define SETDCA_setupaddress_SHIFT 	2 		
+
+#    define SETDEA_setupagpxfer_MASK 	0xfffffffd 	/* bit 1 */
+#    define SETDEA_setupagpxfer_disable 0x0 		
+#    define SETDEA_setupagpxfer_enable 	0x2 		
+#    define SETDEA_setupend_MASK 	0x3 		/* bits 2-31 */
+#    define SETDEA_setupend_SHIFT 	2 		
+
+#    define S_sdydxl_MASK 		0xfffffffe 	/* bit 0 */
+#    define S_sdydxl_y 			0x0 		
+#    define S_sdydxl_x 			0x1 		
+#    define S_scanleft_MASK 		0xfffffffe 	/* bit 0 */
+#    define S_scanleft_disable 		0x0 		
+#    define S_scanleft_enable 		0x1 		
+#    define S_sdxl_MASK 		0xfffffffd 	/* bit 1 */
+#    define S_sdxl_pos 			0x0 		
+#    define S_sdxl_neg 			0x2 		
+#    define S_sdy_MASK 			0xfffffffb 	/* bit 2 */
+#    define S_sdy_pos 			0x0 		
+#    define S_sdy_neg 			0x4 		
+#    define S_sdxr_MASK 		0xffffffdf 	/* bit 5 */
+#    define S_sdxr_pos 			0x0 		
+#    define S_sdxr_neg 			0x20 		
+#    define S_brkleft_MASK 		0xfffffeff 	/* bit 8 */
+#    define S_brkleft_disable 		0x0 		
+#    define S_brkleft_enable 		0x100 		
+#    define S_errorinit_MASK 		0x7fffffff 	/* bit 31 */
+#    define S_errorinit_disable 	0x0 		
+#    define S_errorinit_enable 		0x80000000 	
+
+#    define FSC_x_off_MASK 		0xfffffff0 	/* bits 0-3 */
+#    define FSC_x_off_SHIFT 		0 		
+#    define FSC_funcnt_MASK 		0xffffff80 	/* bits 0-6 */
+#    define FSC_funcnt_SHIFT 		0 		
+#    define FSC_y_off_MASK 		0xffffff8f 	/* bits 4-6 */
+#    define FSC_y_off_SHIFT 		4 		
+#    define FSC_funoff_MASK 		0xffc0ffff 	/* bits 16-21 */
+#    define FSC_funoff_SHIFT 		16 		
+#    define FSC_stylelen_MASK 		0xffc0ffff 	/* bits 16-21 */
+#    define FSC_stylelen_SHIFT 		16 		
+
+
+#    define STH_softraphand_MASK 	0x3 		/* bits 2-31 */
+#    define STH_softraphand_SHIFT 	2 		
+
+#    define SO_srcmap_MASK 		0xfffffffe 	/* bit 0 */
+#    define SO_srcmap_fb 		0x0 		
+#    define SO_srcmap_sys 		0x1 		
+#    define SO_srcacc_MASK 		0xfffffffd 	/* bit 1 */
+#    define SO_srcacc_pci 		0x0 		
+#    define SO_srcacc_agp 		0x2 		
+#    define SO_srcorg_MASK 		0x7 		/* bits 3-31 */
+#    define SO_srcorg_SHIFT 		3 		
+
+#    define STAT_softrapen_MASK 	0xfffffffe 	/* bit 0 */
+#    define STAT_softrapen_disable 	0x0 		
+#    define STAT_softrapen_enable 	0x1 		
+#    define STAT_pickpen_MASK 		0xfffffffb 	/* bit 2 */
+#    define STAT_pickpen_disable 	0x0 		
+#    define STAT_pickpen_enable 	0x4 		
+#    define STAT_vsyncsts_MASK 		0xfffffff7 	/* bit 3 */
+#    define STAT_vsyncsts_disable 	0x0 		
+#    define STAT_vsyncsts_enable 	0x8 		
+#    define STAT_vsyncpen_MASK 		0xffffffef 	/* bit 4 */
+#    define STAT_vsyncpen_disable 	0x0 		
+#    define STAT_vsyncpen_enable 	0x10 		
+#    define STAT_vlinepen_MASK 		0xffffffdf 	/* bit 5 */
+#    define STAT_vlinepen_disable 	0x0 		
+#    define STAT_vlinepen_enable 	0x20 		
+#    define STAT_extpen_MASK 		0xffffffbf 	/* bit 6 */
+#    define STAT_extpen_disable 	0x0 		
+#    define STAT_extpen_enable 		0x40 		
+#    define STAT_wpen_MASK 		0xffffff7f 	/* bit 7 */
+#    define STAT_wpen_disable 		0x0 		
+#    define STAT_wpen_enable 		0x80 		
+#    define STAT_wcpen_MASK 		0xfffffeff 	/* bit 8 */
+#    define STAT_wcpen_disable 		0x0 		
+#    define STAT_wcpen_enable 		0x100 		
+#    define STAT_dwgengsts_MASK 	0xfffeffff 	/* bit 16 */
+#    define STAT_dwgengsts_disable 	0x0 		
+#    define STAT_dwgengsts_enable 	0x10000 	
+#    define STAT_endprdmasts_MASK 	0xfffdffff 	/* bit 17 */
+#    define STAT_endprdmasts_disable 	0x0 		
+#    define STAT_endprdmasts_enable 	0x20000 	
+#    define STAT_wbusy_MASK 		0xfffbffff 	/* bit 18 */
+#    define STAT_wbusy_disable 		0x0 		
+#    define STAT_wbusy_enable 		0x40000 	
+#    define STAT_swflag_MASK 		0xfffffff 	/* bits 28-31 */
+#    define STAT_swflag_SHIFT 		28 		
+
+#    define S_sref_MASK 		0xffffff00 	/* bits 0-7 */
+#    define S_sref_SHIFT 		0 		
+#    define S_smsk_MASK 		0xffff00ff 	/* bits 8-15 */
+#    define S_smsk_SHIFT 		8 		
+#    define S_swtmsk_MASK 		0xff00ffff 	/* bits 16-23 */
+#    define S_swtmsk_SHIFT 		16 		
+
+#    define SC_smode_MASK 		0xfffffff8 	/* bits 0-2 */
+#    define SC_smode_salways 		0x0 		/* val 0, shift 0 */
+#    define SC_smode_snever 		0x1 		/* val 1, shift 0 */
+#    define SC_smode_se 		0x2 		/* val 2, shift 0 */
+#    define SC_smode_sne 		0x3 		/* val 3, shift 0 */
+#    define SC_smode_slt 		0x4 		/* val 4, shift 0 */
+#    define SC_smode_slte 		0x5 		/* val 5, shift 0 */
+#    define SC_smode_sgt 		0x6 		/* val 6, shift 0 */
+#    define SC_smode_sgte 		0x7 		/* val 7, shift 0 */
+#    define SC_sfailop_MASK 		0xffffffc7 	/* bits 3-5 */
+#    define SC_sfailop_keep 		0x0 		/* val 0, shift 3 */
+#    define SC_sfailop_zero 		0x8 		/* val 1, shift 3 */
+#    define SC_sfailop_replace 		0x10 		/* val 2, shift 3 */
+#    define SC_sfailop_incrsat 		0x18 		/* val 3, shift 3 */
+#    define SC_sfailop_decrsat 		0x20 		/* val 4, shift 3 */
+#    define SC_sfailop_invert 		0x28 		/* val 5, shift 3 */
+#    define SC_sfailop_incr 		0x30 		/* val 6, shift 3 */
+#    define SC_sfailop_decr 		0x38 		/* val 7, shift 3 */
+#    define SC_szfailop_MASK 		0xfffffe3f 	/* bits 6-8 */
+#    define SC_szfailop_keep 		0x0 		/* val 0, shift 6 */
+#    define SC_szfailop_zero 		0x40 		/* val 1, shift 6 */
+#    define SC_szfailop_replace 	0x80 		/* val 2, shift 6 */
+#    define SC_szfailop_incrsat 	0xc0 		/* val 3, shift 6 */
+#    define SC_szfailop_decrsat 	0x100 		/* val 4, shift 6 */
+#    define SC_szfailop_invert 		0x140 		/* val 5, shift 6 */
+#    define SC_szfailop_incr 		0x180 		/* val 6, shift 6 */
+#    define SC_szfailop_decr 		0x1c0 		/* val 7, shift 6 */
+#    define SC_szpassop_MASK 		0xfffff1ff 	/* bits 9-11 */
+#    define SC_szpassop_keep 		0x0 		/* val 0, shift 9 */
+#    define SC_szpassop_zero 		0x200 		/* val 1, shift 9 */
+#    define SC_szpassop_replace 	0x400 		/* val 2, shift 9 */
+#    define SC_szpassop_incrsat 	0x600 		/* val 3, shift 9 */
+#    define SC_szpassop_decrsat 	0x800 		/* val 4, shift 9 */
+#    define SC_szpassop_invert 		0xa00 		/* val 5, shift 9 */
+#    define SC_szpassop_incr 		0xc00 		/* val 6, shift 9 */
+#    define SC_szpassop_decr 		0xe00 		/* val 7, shift 9 */
+
+#    define TD1_color1arg2selMASK 	0xfffffffc 	/* bits 0-1 */
+#    define TD1_color1alphaselMASK 	0xffffffe3 	/* bits 2-4 */
+#    define TD1_color1alphaselSHIFT 	2 		
+#    define TD1_color1arg1alphaMASK 	0xffffffdf 	/* bit 5 */
+#    define TD1_color1arg1alphadisable 	0x0 		
+#    define TD1_color1arg1alphaenable 	0x20 		
+#    define TD1_color1arg1invMASK 	0xffffffbf 	/* bit 6 */
+#    define TD1_color1arg1invdisable 	0x0 		
+#    define TD1_color1arg1invenable 	0x40 		
+#    define TD1_color1arg2alphaMASK 	0xffffff7f 	/* bit 7 */
+#    define TD1_color1arg2alphadisable 	0x0 		
+#    define TD1_color1arg2alphaenable 	0x80 		
+#    define TD1_color1arg2invMASK 	0xfffffeff 	/* bit 8 */
+#    define TD1_color1arg2invdisable 	0x0 		
+#    define TD1_color1arg2invenable 	0x100 		
+#    define TD1_color1alpha1invMASK 	0xfffffdff 	/* bit 9 */
+#    define TD1_color1alpha1invdisable 	0x0 		
+#    define TD1_color1alpha1invenable 	0x200 		
+#    define TD1_color1alpha2invMASK 	0xfffffbff 	/* bit 10 */
+#    define TD1_color1alpha2invdisable 	0x0 		
+#    define TD1_color1alpha2invenable 	0x400 		
+#    define TD1_color1selMASK 		0xff9fffff 	/* bits 21-22 */
+#    define TD1_color1selarg1 		0x0 		/* val 0, shift 21 */
+#    define TD1_color1selarg2 		0x200000 	/* val 1, shift 21 */
+#    define TD1_color1seladd 		0x400000 	/* val 2, shift 21 */
+#    define TD1_color1selmul 		0x600000 	/* val 3, shift 21 */
+#    define TD1_alpha1selMASK 		0x3fffffff 	/* bits 30-31 */
+#    define TD1_alpha1selarg1 		0x0 		/* val 0, shift 30 */
+#    define TD1_alpha1selarg2 		0x40000000 	/* val 1, shift 30 */
+#    define TD1_alpha1seladd 		0x80000000 	/* val 2, shift 30 */
+#    define TD1_alpha1selmul 		0xc0000000 	/* val 3, shift 30 */
+
+#    define TST_ramtsten_MASK 		0xfffffffe 	/* bit 0 */
+#    define TST_ramtsten_disable 	0x0 		
+#    define TST_ramtsten_enable 	0x1 		
+#    define TST_ramtstdone_MASK 	0xfffffffd 	/* bit 1 */
+#    define TST_ramtstdone_disable 	0x0 		
+#    define TST_ramtstdone_enable 	0x2 		
+#    define TST_wramtstpass_MASK 	0xfffffffb 	/* bit 2 */
+#    define TST_wramtstpass_disable 	0x0 		
+#    define TST_wramtstpass_enable 	0x4 		
+#    define TST_tcachetstpass_MASK 	0xfffffff7 	/* bit 3 */
+#    define TST_tcachetstpass_disable 	0x0 		
+#    define TST_tcachetstpass_enable 	0x8 		
+#    define TST_tluttstpass_MASK 	0xffffffef 	/* bit 4 */
+#    define TST_tluttstpass_disable 	0x0 		
+#    define TST_tluttstpass_enable 	0x10 		
+#    define TST_luttstpass_MASK 	0xffffffdf 	/* bit 5 */
+#    define TST_luttstpass_disable 	0x0 		
+#    define TST_luttstpass_enable 	0x20 		
+#    define TST_besramtstpass_MASK 	0xffffffbf 	/* bit 6 */
+#    define TST_besramtstpass_disable 	0x0 		
+#    define TST_besramtstpass_enable 	0x40 		
+#    define TST_ringen_MASK 		0xfffffeff 	/* bit 8 */
+#    define TST_ringen_disable 		0x0 		
+#    define TST_ringen_enable 		0x100 		
+#    define TST_apllbyp_MASK 		0xfffffdff 	/* bit 9 */
+#    define TST_apllbyp_disable 	0x0 		
+#    define TST_apllbyp_enable 		0x200 		
+#    define TST_hiten_MASK 		0xfffffbff 	/* bit 10 */
+#    define TST_hiten_disable 		0x0 		
+#    define TST_hiten_enable 		0x400 		
+#    define TST_tmode_MASK 		0xffffc7ff 	/* bits 11-13 */
+#    define TST_tmode_SHIFT 		11 		
+#    define TST_tclksel_MASK 		0xfffe3fff 	/* bits 14-16 */
+#    define TST_tclksel_SHIFT 		14 		
+#    define TST_ringcnten_MASK 		0xfffdffff 	/* bit 17 */
+#    define TST_ringcnten_disable 	0x0 		
+#    define TST_ringcnten_enable 	0x20000 	
+#    define TST_ringcnt_MASK 		0xc003ffff 	/* bits 18-29 */
+#    define TST_ringcnt_SHIFT 		18 		
+#    define TST_ringcntclksl_MASK 	0xbfffffff 	/* bit 30 */
+#    define TST_ringcntclksl_disable 	0x0 		
+#    define TST_ringcntclksl_enable 	0x40000000 	
+#    define TST_biosboot_MASK 		0x7fffffff 	/* bit 31 */
+#    define TST_biosboot_disable 	0x0 		
+#    define TST_biosboot_enable 	0x80000000 	
+
+#    define TMC_tformat_MASK 		0xfffffff0 	/* bits 0-3 */
+#    define TMC_tformat_tw4 		0x0 		/* val 0, shift 0 */
+#    define TMC_tformat_tw8 		0x1 		/* val 1, shift 0 */
+#    define TMC_tformat_tw15 		0x2 		/* val 2, shift 0 */
+#    define TMC_tformat_tw16 		0x3 		/* val 3, shift 0 */
+#    define TMC_tformat_tw12 		0x4 		/* val 4, shift 0 */
+#    define TMC_tformat_tw32 		0x6 		/* val 6, shift 0 */
+#    define TMC_tformat_tw422 		0xa 		/* val 10, shift 0 */
+#    define TMC_tpitchlin_MASK 		0xfffffeff 	/* bit 8 */
+#    define TMC_tpitchlin_disable 	0x0 		
+#    define TMC_tpitchlin_enable 	0x100 		
+#    define TMC_tpitchext_MASK 		0xfff001ff 	/* bits 9-19 */
+#    define TMC_tpitchext_SHIFT 	9 		
+#    define TMC_tpitch_MASK 		0xfff8ffff 	/* bits 16-18 */
+#    define TMC_tpitch_SHIFT 		16 		
+#    define TMC_owalpha_MASK 		0xffbfffff 	/* bit 22 */
+#    define TMC_owalpha_disable 	0x0 		
+#    define TMC_owalpha_enable 		0x400000 	
+#    define TMC_azeroextend_MASK 	0xff7fffff 	/* bit 23 */
+#    define TMC_azeroextend_disable 	0x0 		
+#    define TMC_azeroextend_enable 	0x800000 	
+#    define TMC_decalckey_MASK 		0xfeffffff 	/* bit 24 */
+#    define TMC_decalckey_disable 	0x0 		
+#    define TMC_decalckey_enable 	0x1000000 	
+#    define TMC_takey_MASK 		0xfdffffff 	/* bit 25 */
+#    define TMC_takey_0 		0x0 		
+#    define TMC_takey_1 		0x2000000 	
+#    define TMC_tamask_MASK 		0xfbffffff 	/* bit 26 */
+#    define TMC_tamask_0 		0x0 		
+#    define TMC_tamask_1 		0x4000000 	
+#    define TMC_clampv_MASK 		0xf7ffffff 	/* bit 27 */
+#    define TMC_clampv_disable 		0x0 		
+#    define TMC_clampv_enable 		0x8000000 	
+#    define TMC_clampu_MASK 		0xefffffff 	/* bit 28 */
+#    define TMC_clampu_disable 		0x0 		
+#    define TMC_clampu_enable 		0x10000000 	
+#    define TMC_tmodulate_MASK 		0xdfffffff 	/* bit 29 */
+#    define TMC_tmodulate_disable 	0x0 		
+#    define TMC_tmodulate_enable 	0x20000000 	
+#    define TMC_strans_MASK 		0xbfffffff 	/* bit 30 */
+#    define TMC_strans_disable 		0x0 		
+#    define TMC_strans_enable 		0x40000000 	
+#    define TMC_itrans_MASK 		0x7fffffff 	/* bit 31 */
+#    define TMC_itrans_disable 		0x0 		
+#    define TMC_itrans_enable 		0x80000000 	
+
+#    define TMC_decalblend_MASK 	0xfffffffe 	/* bit 0 */
+#    define TMC_decalblend_disable 	0x0 		
+#    define TMC_decalblend_enable 	0x1 		
+#    define TMC_idecal_MASK 		0xfffffffd 	/* bit 1 */
+#    define TMC_idecal_disable 		0x0 		
+#    define TMC_idecal_enable 		0x2 		
+#    define TMC_decaldis_MASK 		0xfffffffb 	/* bit 2 */
+#    define TMC_decaldis_disable 	0x0 		
+#    define TMC_decaldis_enable 	0x4 		
+#    define TMC_ckstransdis_MASK 	0xffffffef 	/* bit 4 */
+#    define TMC_ckstransdis_disable 	0x0 		
+#    define TMC_ckstransdis_enable 	0x10 		
+#    define TMC_borderen_MASK 		0xffffffdf 	/* bit 5 */
+#    define TMC_borderen_disable 	0x0 		
+#    define TMC_borderen_enable 	0x20 		
+#    define TMC_specen_MASK 		0xffffffbf 	/* bit 6 */
+#    define TMC_specen_disable 		0x0 		
+#    define TMC_specen_enable 		0x40 		
+
+#    define TF_minfilter_MASK 		0xfffffff0 	/* bits 0-3 */
+#    define TF_minfilter_nrst 		0x0 		/* val 0, shift 0 */
+#    define TF_minfilter_bilin 		0x2 		/* val 2, shift 0 */
+#    define TF_minfilter_cnst 		0x3 		/* val 3, shift 0 */
+#    define TF_minfilter_mm1s 		0x8 		/* val 8, shift 0 */
+#    define TF_minfilter_mm2s 		0x9 		/* val 9, shift 0 */
+#    define TF_minfilter_mm4s 		0xa 		/* val 10, shift 0 */
+#    define TF_minfilter_mm8s 		0xc 		/* val 12, shift 0 */
+#    define TF_magfilter_MASK 		0xffffff0f 	/* bits 4-7 */
+#    define TF_magfilter_nrst 		0x0 		/* val 0, shift 4 */
+#    define TF_magfilter_bilin 		0x20 		/* val 2, shift 4 */
+#    define TF_magfilter_cnst 		0x30 		/* val 3, shift 4 */
+#    define TF_avgstride_MASK 		0xfff7ffff 	/* bit 19 */
+#    define TF_avgstride_disable 	0x0 		
+#    define TF_avgstride_enable 	0x80000 	
+#    define TF_filteralpha_MASK 	0xffefffff 	/* bit 20 */
+#    define TF_filteralpha_disable 	0x0 		
+#    define TF_filteralpha_enable 	0x100000 	
+#    define TF_fthres_MASK 		0xe01fffff 	/* bits 21-28 */
+#    define TF_fthres_SHIFT 		21 		
+#    define TF_mapnb_MASK 		0x1fffffff 	/* bits 29-31 */
+#    define TF_mapnb_SHIFT 		29 		
+
+#    define TH_th_MASK 			0xffffffc0 	/* bits 0-5 */
+#    define TH_th_SHIFT 		0 		
+#    define TH_rfh_MASK 		0xffff81ff 	/* bits 9-14 */
+#    define TH_rfh_SHIFT 		9 		
+#    define TH_thmask_MASK 		0xe003ffff 	/* bits 18-28 */
+#    define TH_thmask_SHIFT 		18 		
+
+#    define TO_texorgmap_MASK 		0xfffffffe 	/* bit 0 */
+#    define TO_texorgmap_fb 		0x0 		
+#    define TO_texorgmap_sys 		0x1 		
+#    define TO_texorgacc_MASK 		0xfffffffd 	/* bit 1 */
+#    define TO_texorgacc_pci 		0x0 		
+#    define TO_texorgacc_agp 		0x2 		
+#    define TO_texorg_MASK 		0x1f 		/* bits 5-31 */
+#    define TO_texorg_SHIFT 		5 		
+
+#    define TT_tckey_MASK 		0xffff0000 	/* bits 0-15 */
+#    define TT_tckey_SHIFT 		0 		
+#    define TT_tkmask_MASK 		0xffff 		/* bits 16-31 */
+#    define TT_tkmask_SHIFT 		16 		
+
+#    define TT_tckeyh_MASK 		0xffff0000 	/* bits 0-15 */
+#    define TT_tckeyh_SHIFT 		0 		
+#    define TT_tkmaskh_MASK 		0xffff 		/* bits 16-31 */
+#    define TT_tkmaskh_SHIFT 		16 		
+
+#    define TW_tw_MASK 			0xffffffc0 	/* bits 0-5 */
+#    define TW_tw_SHIFT 		0 		
+#    define TW_rfw_MASK 		0xffff81ff 	/* bits 9-14 */
+#    define TW_rfw_SHIFT 		9 		
+#    define TW_twmask_MASK 		0xe003ffff 	/* bits 18-28 */
+#    define TW_twmask_SHIFT 		18 		
+
+#    define WAS_seqdst0_MASK 		0xffffffc0 	/* bits 0-5 */
+#    define WAS_seqdst0_SHIFT 		0 		
+#    define WAS_seqdst1_MASK 		0xfffff03f 	/* bits 6-11 */
+#    define WAS_seqdst1_SHIFT 		6 		
+#    define WAS_seqdst2_MASK 		0xfffc0fff 	/* bits 12-17 */
+#    define WAS_seqdst2_SHIFT 		12 		
+#    define WAS_seqdst3_MASK 		0xff03ffff 	/* bits 18-23 */
+#    define WAS_seqdst3_SHIFT 		18 		
+#    define WAS_seqlen_MASK 		0xfcffffff 	/* bits 24-25 */
+#    define WAS_wfirsttag_MASK 		0xfbffffff 	/* bit 26 */
+#    define WAS_wfirsttag_disable 	0x0 		
+#    define WAS_wfirsttag_enable 	0x4000000 	
+#    define WAS_wsametag_MASK 		0xf7ffffff 	/* bit 27 */
+#    define WAS_wsametag_disable 	0x0 		
+#    define WAS_wsametag_enable 	0x8000000 	
+#    define WAS_seqoff_MASK 		0xefffffff 	/* bit 28 */
+#    define WAS_seqoff_disable 		0x0 		
+#    define WAS_seqoff_enable 		0x10000000 	
+
+#    define WMA_wcodeaddr_MASK 		0xff 		/* bits 8-31 */
+#    define WMA_wcodeaddr_SHIFT 	8 		
+
+#    define WF_walustsflag_MASK 	0xffffff00 	/* bits 0-7 */
+#    define WF_walustsflag_SHIFT 	0 		
+#    define WF_walucfgflag_MASK 	0xffff00ff 	/* bits 8-15 */
+#    define WF_walucfgflag_SHIFT 	8 		
+#    define WF_wprgflag_MASK 		0xffff 		/* bits 16-31 */
+#    define WF_wprgflag_SHIFT 		16 		
+
+#    define WF1_walustsflag1_MASK 	0xffffff00 	/* bits 0-7 */
+#    define WF1_walustsflag1_SHIFT 	0 		
+#    define WF1_walucfgflag1_MASK 	0xffff00ff 	/* bits 8-15 */
+#    define WF1_walucfgflag1_SHIFT 	8 		
+#    define WF1_wprgflag1_MASK 		0xffff 		/* bits 16-31 */
+#    define WF1_wprgflag1_SHIFT 	16 		
+
+#    define WGV_wgetmsbmin_MASK 	0xffffffe0 	/* bits 0-4 */
+#    define WGV_wgetmsbmin_SHIFT 	0 		
+#    define WGV_wgetmsbmax_MASK 	0xffffe0ff 	/* bits 8-12 */
+#    define WGV_wgetmsbmax_SHIFT 	8 		
+#    define WGV_wbrklefttop_MASK 	0xfffeffff 	/* bit 16 */
+#    define WGV_wbrklefttop_disable 	0x0 		
+#    define WGV_wbrklefttop_enable 	0x10000 	
+#    define WGV_wfastcrop_MASK 		0xfffdffff 	/* bit 17 */
+#    define WGV_wfastcrop_disable 	0x0 		
+#    define WGV_wfastcrop_enable 	0x20000 	
+#    define WGV_wcentersnap_MASK 	0xfffbffff 	/* bit 18 */
+#    define WGV_wcentersnap_disable 	0x0 		
+#    define WGV_wcentersnap_enable 	0x40000 	
+#    define WGV_wbrkrighttop_MASK 	0xfff7ffff 	/* bit 19 */
+#    define WGV_wbrkrighttop_disable 	0x0 		
+#    define WGV_wbrkrighttop_enable 	0x80000 	
+
+#    define WIA_wmode_MASK 		0xfffffffc 	/* bits 0-1 */
+#    define WIA_wmode_suspend 		0x0 		/* val 0, shift 0 */
+#    define WIA_wmode_resume 		0x1 		/* val 1, shift 0 */
+#    define WIA_wmode_jump 		0x2 		/* val 2, shift 0 */
+#    define WIA_wmode_start 		0x3 		/* val 3, shift 0 */
+#    define WIA_wagp_MASK 		0xfffffffb 	/* bit 2 */
+#    define WIA_wagp_pci 		0x0 		
+#    define WIA_wagp_agp 		0x4 		
+#    define WIA_wiaddr_MASK 		0x7 		/* bits 3-31 */
+#    define WIA_wiaddr_SHIFT 		3 		
+
+#    define WIA2_wmode_MASK 		0xfffffffc 	/* bits 0-1 */
+#    define WIA2_wmode_suspend 		0x0 		/* val 0, shift 0 */
+#    define WIA2_wmode_resume 		0x1 		/* val 1, shift 0 */
+#    define WIA2_wmode_jump 		0x2 		/* val 2, shift 0 */
+#    define WIA2_wmode_start 		0x3 		/* val 3, shift 0 */
+#    define WIA2_wagp_MASK 		0xfffffffb 	/* bit 2 */
+#    define WIA2_wagp_pci 		0x0 		
+#    define WIA2_wagp_agp 		0x4 		
+#    define WIA2_wiaddr_MASK 		0x7 		/* bits 3-31 */
+#    define WIA2_wiaddr_SHIFT 		3 		
+
+#    define WIMA_wimemaddr_MASK 	0xffffff00 	/* bits 0-7 */
+#    define WIMA_wimemaddr_SHIFT 	0 		
+
+#    define WM_wucodecache_MASK 	0xfffffffe 	/* bit 0 */
+#    define WM_wucodecache_disable 	0x0 		
+#    define WM_wucodecache_enable 	0x1 		
+#    define WM_wmaster_MASK 		0xfffffffd 	/* bit 1 */
+#    define WM_wmaster_disable 		0x0 		
+#    define WM_wmaster_enable 		0x2 		
+#    define WM_wcacheflush_MASK 	0xfffffff7 	/* bit 3 */
+#    define WM_wcacheflush_disable 	0x0 		
+#    define WM_wcacheflush_enable 	0x8 		
+
+#    define WVS_wvrtxsz_MASK 		0xffffffc0 	/* bits 0-5 */
+#    define WVS_wvrtxsz_SHIFT 		0 		
+#    define WVS_primsz_MASK 		0xffffc0ff 	/* bits 8-13 */
+#    define WVS_primsz_SHIFT 		8 		
+
+#    define XYEA_x_end_MASK 		0xffff0000 	/* bits 0-15 */
+#    define XYEA_x_end_SHIFT 		0 		
+#    define XYEA_y_end_MASK 		0xffff 		/* bits 16-31 */
+#    define XYEA_y_end_SHIFT 		16 		
+
+#    define XYSA_x_start_MASK 		0xffff0000 	/* bits 0-15 */
+#    define XYSA_x_start_SHIFT 		0 		
+#    define XYSA_y_start_MASK 		0xffff 		/* bits 16-31 */
+#    define XYSA_y_start_SHIFT 		16 		
+
+#    define YA_ydst_MASK 		0xff800000 	/* bits 0-22 */
+#    define YA_ydst_SHIFT 		0 		
+#    define YA_sellin_MASK 		0x1fffffff 	/* bits 29-31 */
+#    define YA_sellin_SHIFT 		29 		
+
+#    define YDL_length_MASK 		0xffff0000 	/* bits 0-15 */
+#    define YDL_length_SHIFT 		0 		
+#    define YDL_yval_MASK 		0xffff 		/* bits 16-31 */
+#    define YDL_yval_SHIFT 		16 		
+
+#    define ZO_zorgmap_MASK 		0xfffffffe 	/* bit 0 */
+#    define ZO_zorgmap_fb 		0x0 		
+#    define ZO_zorgmap_sys 		0x1 		
+#    define ZO_zorgacc_MASK 		0xfffffffd 	/* bit 1 */
+#    define ZO_zorgacc_pci 		0x0 		
+#    define ZO_zorgacc_agp 		0x2 		
+#    define ZO_zorg_MASK 		0x3 		/* bits 2-31 */
+#    define ZO_zorg_SHIFT 		2 		
 
 
 
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/neomagic/Imakefile b/xc/programs/Xserver/hw/xfree86/drivers/neomagic/Imakefile
index 23eeefe73..83d831c29 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/neomagic/Imakefile
+++ b/xc/programs/Xserver/hw/xfree86/drivers/neomagic/Imakefile
@@ -1,4 +1,4 @@
-XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/drivers/neomagic/Imakefile,v 1.12 2002/04/04 14:05:44 eich Exp $
+XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/drivers/neomagic/Imakefile,v 1.13 2003/02/17 17:06:43 dawes Exp $
 #define IHaveModules
 #include <Server.tmpl>
 
@@ -22,7 +22,7 @@ INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86OSSRC) \
 	   -I$(XF86SRC)/ramdac -I$(XF86SRC)/rac	-I$(XF86SRC)/ddc \
            -I$(XF86SRC)/i2c -I$(XF86SRC)/shadowfb -I$(XF86SRC)/xf24_32bpp \
 	   -I$(SERVERSRC)/Xext  -I$(EXTINCSRC) \
-	   -I$(XF86SRC)/int10 -I$(XF86OSSRC)/vbe -I$(SERVERSRC)/render
+	   -I$(XF86SRC)/int10 -I$(XF86SRC)/vbe -I$(SERVERSRC)/render
 #endif
 
 #if MakeHasPosixVariableSubstitutions
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/neomagic/README b/xc/programs/Xserver/hw/xfree86/drivers/neomagic/README
index 059be1857..b5b473043 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/neomagic/README
+++ b/xc/programs/Xserver/hw/xfree86/drivers/neomagic/README
@@ -134,7 +134,7 @@
    
    The original version of the driver - written for Xfree86 3.3 - 
    done by:
-   Jens Owen (jens@precisioninsight.com)
+   Jens Owen (jens@tungstengraphics.com)
    Kevin E. Martin (kevin@precisioninsight.com)
 
    Precision Insight, Inc.
@@ -147,4 +147,4 @@
 
 
 
-$XFree86: xc/programs/Xserver/hw/xfree86/drivers/neomagic/README,v 1.1 1999/04/17 07:06:15 dawes Exp $
+$XFree86: xc/programs/Xserver/hw/xfree86/drivers/neomagic/README,v 1.2 2002/10/30 12:52:20 alanh Exp $
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo.h b/xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo.h
index da1b4356f..8b070b4e0 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo.h
@@ -22,14 +22,14 @@ RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF
 CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
 CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 **********************************************************************/
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo.h,v 1.22 2002/09/16 18:05:57 eich Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo.h,v 1.23 2002/10/30 12:52:21 alanh Exp $ */
 
 /*
  * The original Precision Insight driver for
  * XFree86 v.3.3 has been sponsored by Red Hat.
  *
  * Authors:
- *   Jens Owen (jens@precisioninsight.com)
+ *   Jens Owen (jens@tungstengraphics.com)
  *   Kevin E. Martin (kevin@precisioninsight.com)
  *
  * Port to Xfree86 v.4.0
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_2070.c b/xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_2070.c
index 6a2704dd8..55fd637a4 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_2070.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_2070.c
@@ -22,14 +22,14 @@ RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF
 CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
 CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 **********************************************************************/
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_2070.c,v 1.4 2002/04/04 14:05:44 eich Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_2070.c,v 1.5 2002/10/30 12:52:21 alanh Exp $ */
 
 /*
  * The original Precision Insight driver for
  * XFree86 v.3.3 has been sponsored by Red Hat.
  *
  * Authors:
- *   Jens Owen (jens@precisioninsight.com)
+ *   Jens Owen (jens@tungstengraphics.com)
  *   Kevin E. Martin (kevin@precisioninsight.com)
  *
  * Port to Xfree86 v.4.0
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_2090.c b/xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_2090.c
index ce1c412b7..e424a9384 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_2090.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_2090.c
@@ -22,14 +22,14 @@ RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF
 CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
 CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 **********************************************************************/
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_2090.c,v 1.6 2002/04/04 14:05:44 eich Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_2090.c,v 1.7 2002/10/30 12:52:21 alanh Exp $ */
 
 /*
  * The original Precision Insight driver for
  * XFree86 v.3.3 has been sponsored by Red Hat.
  *
  * Authors:
- *   Jens Owen (jens@precisioninsight.com)
+ *   Jens Owen (jens@tungstengraphics.com)
  *   Kevin E. Martin (kevin@precisioninsight.com)
  *
  * Port to Xfree86 v.4.0
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_2097.c b/xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_2097.c
index b8c53e7a0..ce9b35b06 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_2097.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_2097.c
@@ -22,14 +22,14 @@ RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF
 CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
 CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 **********************************************************************/
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_2097.c,v 1.10 2002/10/08 22:14:09 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_2097.c,v 1.12 2002/12/10 17:36:29 dawes Exp $ */
 
 /*
  * The original Precision Insight driver for
  * XFree86 v.3.3 has been sponsored by Red Hat.
  *
  * Authors:
- *   Jens Owen (jens@precisioninsight.com)
+ *   Jens Owen (jens@tungstengraphics.com)
  *   Kevin E. Martin (kevin@precisioninsight.com)
  *
  * Port to Xfree86 v.4.0
@@ -192,7 +192,7 @@ Neo2097AccelInit(ScreenPtr pScreen)
 	Neo2097SubsequentMono8x8PatternFill;
 #endif
 
-    if (nPtr->strangeLockups) {
+    if (!nPtr->strangeLockups) {
 	/* image writes */
 	infoPtr->ScanlineImageWriteFlags =  ( CPU_TRANSFER_PAD_DWORD |
 					      SCANLINE_PAD_DWORD |
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_2200.c b/xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_2200.c
index 4fb01fdac..04bb5ad1e 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_2200.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_2200.c
@@ -22,13 +22,13 @@ RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF
 CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
 CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 **********************************************************************/
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_2200.c,v 1.18 2002/10/08 22:14:10 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_2200.c,v 1.20 2003/01/12 03:55:48 tsi Exp $ */
 /*
  * The original Precision Insight driver for
  * XFree86 v.3.3 has been sponsored by Red Hat.
  *
  * Authors:
- *   Jens Owen (jens@precisioninsight.com)
+ *   Jens Owen (jens@tungstengraphics.com)
  *   Kevin E. Martin (kevin@precisioninsight.com)
  *
  * Port to Xfree86 v.4.0
@@ -541,7 +541,7 @@ Neo2200SubsequentScanlineCPUToScreenColorExpandFill(ScrnInfoPtr pScrn,
 #endif
     OUTREG(NEOREG_BLTCNTL, nAcl->tmpBltCntlFlags 
 	   | ((skipleft << 2) & 0x1C));
- #ifdef NEO_DO_CLIPPING
+#ifdef NEO_DO_CLIPPING
     OUTREG(NEOREG_CLIPLT, (y << 16) | (x + skipleft));
     OUTREG(NEOREG_CLIPRB, ((y + h) << 16) | (x + w));
 #endif
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_bank.c b/xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_bank.c
index 731743132..8c40f4f2d 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_bank.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_bank.c
@@ -22,14 +22,14 @@ RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF
 CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
 CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 **********************************************************************/
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_bank.c,v 1.3 2002/01/25 21:56:05 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_bank.c,v 1.4 2002/10/30 12:52:21 alanh Exp $ */
 
 /*
  * The original Precision Insight driver for
  * XFree86 v.3.3 has been sponsored by Red Hat.
  *
  * Authors:
- *   Jens Owen (jens@precisioninsight.com)
+ *   Jens Owen (jens@tungstengraphics.com)
  *   Kevin E. Martin (kevin@precisioninsight.com)
  *
  * Port to Xfree86 v.4.0
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_cursor.c b/xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_cursor.c
index 7386e98fa..1863fe53e 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_cursor.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_cursor.c
@@ -22,14 +22,14 @@ RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF
 CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
 CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 **********************************************************************/
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_cursor.c,v 1.8 2001/10/28 03:33:42 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_cursor.c,v 1.9 2002/10/30 12:52:21 alanh Exp $ */
 
 /*
  * The original Precision Insight driver for
  * XFree86 v.3.3 has been sponsored by Red Hat.
  *
  * Authors:
- *   Jens Owen (jens@precisioninsight.com)
+ *   Jens Owen (jens@tungstengraphics.com)
  *   Kevin E. Martin (kevin@precisioninsight.com)
  *
  * Port to Xfree86 v.4.0
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_driver.c b/xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_driver.c
index fbf0a2189..bda060077 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_driver.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_driver.c
@@ -30,14 +30,14 @@ CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  * Copyright 2002 Shigehiro Nomura
  */
 
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_driver.c,v 1.63 2002/09/16 18:05:57 eich Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_driver.c,v 1.66 2002/12/09 11:32:48 eich Exp $ */
 
 /*
  * The original Precision Insight driver for
  * XFree86 v.3.3 has been sponsored by Red Hat.
  *
  * Authors:
- *   Jens Owen (jens@precisioninsight.com)
+ *   Jens Owen (jens@tungstengraphics.com)
  *   Kevin E. Martin (kevin@precisioninsight.com)
  *
  * Port to Xfree86 v.4.0
@@ -1640,7 +1640,6 @@ NEOScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
 	xf86DrvMsg(scrnIndex, X_PROBED,
 		   "%d bytes off-screen memory available\n", freespace);
 
-	nAcl->CursorAddress = 0;
 	if (nPtr->swCursor || !nPtr->NeoMMIOBase) {
 	    xf86DrvMsg(scrnIndex, X_CONFIG,
 		       "Using Software Cursor.\n");
@@ -2829,7 +2828,7 @@ neoModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
 		int HDisplay = mode->HDisplay
 		    << ((mode->VDisplay < 480) ? 1 : 0);
 		hoffset = ((nPtr->NeoPanelWidth - HDisplay) >> 4) - 1;
-		if (mode->VDisplay <= 480)
+		if (mode->VDisplay < 480)
 		    hoffset >>= 1;
 		doCenter = TRUE;
 	    } else {
@@ -2847,7 +2846,7 @@ neoModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
 	    if (noLcdStretch) {
 		/* Calculate the vertical offsets. */
 		int VDisplay = mode->VDisplay
-		    << ((mode->Flags | V_DBLSCAN) ? 1 : 0);
+		    << ((mode->Flags & V_DBLSCAN) ? 1 : 0);
 		voffset = ((nPtr->NeoPanelHeight - VDisplay) >> 1) - 2;
 		doCenter = TRUE;
 	    } else {
@@ -2907,7 +2906,7 @@ neoModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
     }
 #endif
 
-    if (mode->VDisplay <= 480) {
+    if (mode->VDisplay < 480) {
 	NeoStd->Sequencer[1] |= 0x8;
 	clockMul = 2;
     }
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_i2c.c b/xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_i2c.c
index 8f6c0691b..e97c7235e 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_i2c.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_i2c.c
@@ -22,14 +22,14 @@ RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF
 CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
 CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 **********************************************************************/
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_i2c.c,v 1.4 2002/09/16 18:05:58 eich Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_i2c.c,v 1.5 2002/10/30 12:52:22 alanh Exp $ */
 
 /*
  * The original Precision Insight driver for
  * XFree86 v.3.3 has been sponsored by Red Hat.
  *
  * Authors:
- *   Jens Owen (jens@precisioninsight.com)
+ *   Jens Owen (jens@tungstengraphics.com)
  *   Kevin E. Martin (kevin@precisioninsight.com)
  *
  * Port to Xfree86 v.4.0
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_macros.h b/xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_macros.h
index fdb4d44c1..7e535195e 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_macros.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_macros.h
@@ -22,14 +22,14 @@ RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF
 CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
 CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 **********************************************************************/
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_macros.h,v 1.1 1999/04/17 07:06:27 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_macros.h,v 1.2 2002/10/30 12:52:22 alanh Exp $ */
 
 /*
  * The original Precision Insight driver for
  * XFree86 v.3.3 has been sponsored by Red Hat.
  *
  * Authors:
- *   Jens Owen (jens@precisioninsight.com)
+ *   Jens Owen (jens@tungstengraphics.com)
  *   Kevin E. Martin (kevin@precisioninsight.com)
  *
  * Port to Xfree86 v.4.0
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_reg.h b/xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_reg.h
index 676719f75..389323db3 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_reg.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_reg.h
@@ -22,14 +22,14 @@ RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF
 CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
 CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 **********************************************************************/
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_reg.h,v 1.1 1999/04/17 07:06:29 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_reg.h,v 1.2 2002/10/30 12:52:22 alanh Exp $ */
 
 /*
  * The original Precision Insight driver for
  * XFree86 v.3.3 has been sponsored by Red Hat.
  *
  * Authors:
- *   Jens Owen (jens@precisioninsight.com)
+ *   Jens Owen (jens@tungstengraphics.com)
  *   Kevin E. Martin (kevin@precisioninsight.com)
  *
  * Port to Xfree86 v.4.0
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_video.c b/xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_video.c
index e4c0b8fab..ffbcff583 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_video.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_video.c
@@ -26,7 +26,7 @@ CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 /*
  * Copyright 2002 SuSE Linux AG, Author: Egbert Eich
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_video.c,v 1.3 2002/09/16 18:05:58 eich Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_video.c,v 1.4 2002/11/25 14:05:00 eich Exp $ */
 
 #include "neo.h"
 #include "neo_video.h"
@@ -193,7 +193,7 @@ static XF86ImageRec NEOVideoImages[] =
 	16,
 	XvPacked,
 	1,
-	16, 0x001F, 0x07E0, 0xF800,
+	16, 0xF800, 0x07E0, 0x001F,
 	0, 0, 0,
 	0, 0, 0,
 	0, 0, 0,
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/neomagic/neomagic.man b/xc/programs/Xserver/hw/xfree86/drivers/neomagic/neomagic.man
index e937950fd..b104aac18 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/neomagic/neomagic.man
+++ b/xc/programs/Xserver/hw/xfree86/drivers/neomagic/neomagic.man
@@ -1,4 +1,4 @@
-.\" $XFree86: xc/programs/Xserver/hw/xfree86/drivers/neomagic/neomagic.man,v 1.3 2001/12/17 20:52:32 dawes Exp $ 
+.\" $XFree86: xc/programs/Xserver/hw/xfree86/drivers/neomagic/neomagic.man,v 1.4 2003/02/20 03:22:52 dawes Exp $ 
 .\" shorthand for double quote that works everywhere.
 .ds q \N'34'
 .TH NEOMAGIC __drivermansuffix__ __vendorversion__
@@ -72,6 +72,13 @@ Default: no rotation.
 .TP
 .BI "Option \*qShadowFB\*q \*q" boolean \*q
 Enable or disable use of the shadow framebuffer layer.  Default: off.
+.TP
+.BI "Option \*qOverlayMem\*q \*q" integer \*q
+Reserve the given amount of memory (in bytes) for the XVideo overlay.  On
+boards with limited memory, display of large XVideo buffers might fail due
+to insufficient available memory.  Using this option solves the problem at
+the expense of reducing the memory avilable for other operations.  For
+full\-resolution DVDs, 829440 bytes (720x576x2) are necessary.
 .PP
 .B Note
 .br
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/newport/Imakefile b/xc/programs/Xserver/hw/xfree86/drivers/newport/Imakefile
index b0e2d67af..ab639c136 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/newport/Imakefile
+++ b/xc/programs/Xserver/hw/xfree86/drivers/newport/Imakefile
@@ -1,11 +1,11 @@
-XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/drivers/newport/Imakefile,v 1.4 2001/05/16 06:48:09 keithp Exp $
+XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/drivers/newport/Imakefile,v 1.5 2002/12/10 04:03:00 dawes Exp $
 
 #define IHaveModules
 #include <Server.tmpl>
 
-SRCS = newport_driver.c newport_regs.c newport_cmap.c newport_shadow.c
+SRCS = newport_driver.c newport_regs.c newport_cmap.c newport_shadow.c newport_cursor.c
 
-OBJS = newport_driver.o newport_regs.o newport_cmap.o newport_shadow.o
+OBJS = newport_driver.o newport_regs.o newport_cmap.o newport_shadow.o newport_cursor.o
 
 XF86CONFIG = XF86Config.indy
 
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/newport/XF86Config.indy b/xc/programs/Xserver/hw/xfree86/drivers/newport/XF86Config.indy
index 080fd3de1..3a1dcc6e1 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/newport/XF86Config.indy
+++ b/xc/programs/Xserver/hw/xfree86/drivers/newport/XF86Config.indy
@@ -27,7 +27,7 @@
 # dealings in this Software without prior written authorization from the
 # XFree86 Project.
 #
-# $XFree86: xc/programs/Xserver/hw/xfree86/drivers/newport/XF86Config.indy,v 1.2 2000/12/14 20:59:12 dawes Exp $
+# $XFree86: xc/programs/Xserver/hw/xfree86/drivers/newport/XF86Config.indy,v 1.3 2003/02/20 04:05:15 dawes Exp $
 
 # **********************************************************************
 # This is a configuration file for the Indy's Newport Graphics and the
@@ -107,6 +107,12 @@ Section "ServerFlags"
 
 #    Option	"NoTrapSignals"
 
+# Uncomment this to disable the <Crtl><Alt><Fn> VT switch sequence
+# (where n is 1 through 12).  This allows clients to receive these key
+# events.
+
+#    Option	"DontVTSwitch"
+
 # Uncomment this to disable the <Crtl><Alt><BS> server abort sequence
 # This allows clients to receive this key event.
 
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/newport/newport.h b/xc/programs/Xserver/hw/xfree86/drivers/newport/newport.h
index 584f72c41..ee71736f9 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/newport/newport.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/newport/newport.h
@@ -1,7 +1,7 @@
 /* 
  * Id: newport.h,v 1.4 2000/11/29 20:58:10 agx Exp $
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/newport/newport.h,v 1.9 2002/09/30 22:17:55 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/newport/newport.h,v 1.10 2002/12/10 04:03:00 dawes Exp $ */
 
 #ifndef __NEWPORT_H__
 #define __NEWPORT_H__
@@ -25,7 +25,7 @@
 #include "newport_regs.h"
 
 #define NEWPORT_BASE_ADDR0  0x1f0f0000
-#define NEWPORT_BASE_OFFSET 0x0040000
+#define NEWPORT_BASE_OFFSET 0x00400000
 #define NEWPORT_MAX_BOARDS 4
 
 #if 0
@@ -47,14 +47,21 @@ typedef struct {
 	int bitplanes; 
 	/* revision numbers of the various pieces of silicon */
 	unsigned int board_rev, cmap_rev, rex3_rev, xmap9_rev, bt445_rev;
+	/* shadow copies of frequently used registers */
 	NewportRegsPtr pNewportRegs;	/* Pointer to REX3 registers */
 	npireg_t drawmode1;		/* REX3 drawmode1 common to all drawing operations */
+	CARD16 vc2ctrl;                 /* VC2 control register */
 
 	/* ShadowFB stuff: */
 	CARD32* ShadowPtr;
 	unsigned long int ShadowPitch;
 	unsigned int Bpp;		/* Bytes per pixel */
 
+	/* HWCursour stuff: */
+	Bool hwCursor;
+	xf86CursorInfoPtr CursorInfoRec;
+	CARD16 curs_cmap_base;          /* MSB of the cursor's cmap */
+
 	/* wrapped funtions: */
 	CloseScreenProcPtr  CloseScreen;
 
@@ -68,12 +75,19 @@ typedef struct {
 	npireg_t txt_smask2y;
 	npireg_t txt_clipmode;		/* Rex3 clip mode register */
 
-	unsigned short txt_vc2ctrl;	/* VC2 control register */
+	CARD16 txt_vc2ctrl;             /* VC2 control register */
+	CARD16 txt_vc2cur_x;            /* VC2 hw cursor x location */
+	CARD16 txt_vc2cur_y;            /* VC2 hw cursor x location */
+	CARD32  txt_vc2cur_data[64];    /* VC2 hw cursor glyph data */
+
 	CARD8  txt_xmap9_cfg0;		/* 0. Xmap9's control register */
 	CARD8  txt_xmap9_cfg1;		/* 1. Xmap9's control register */
+	CARD8  txt_xmap9_ccmsb;         /* cursor cmap msb */
 	CARD8  txt_xmap9_mi;		/* Xmap9s' mode index register */
 	CARD32 txt_xmap9_mod0;		/* Xmap9s' mode 0 register */
+
 	LOCO txt_colormap[256];
+
 	OptionInfoPtr Options;
 } NewportRec, *NewportPtr;
 
@@ -91,15 +105,24 @@ void NewportBackupRex3( ScrnInfoPtr pScrn);
 void NewportRestoreRex3( ScrnInfoPtr pScrn);
 void NewportBackupXmap9s( ScrnInfoPtr pScrn);
 void NewportRestoreXmap9s( ScrnInfoPtr pScrn);
+void NewportBackupVc2( ScrnInfoPtr pScrn);
+void NewportRestoreVc2( ScrnInfoPtr pScrn);
+void NewportBackupVc2Cursor( ScrnInfoPtr pScrn);
+void NewportRestoreVc2Cursor( ScrnInfoPtr pScrn);
 
 /* newort_cmap.c */
 void NewportLoadPalette(ScrnInfoPtr pScrn, int numColors, int *indices, 
 			LOCO* colors, VisualPtr pVisual);
 void NewportRestorePalette(ScrnInfoPtr pScrn);
 void NewportBackupPalette(ScrnInfoPtr pScrn);
+void NewportCmapSetRGB( NewportRegsPtr pNewportRegs, unsigned short addr, LOCO color);
 
 /* newport_shadow.c */
 void NewportRefreshArea8(ScrnInfoPtr pScrn, int num, BoxPtr pbox);
 void NewportRefreshArea24(ScrnInfoPtr pScrn, int num, BoxPtr pbox);
 
+/* newport_cursor.c */
+Bool NewportHWCursorInit(ScreenPtr pScreen);
+void NewportLoadCursorImage(ScrnInfoPtr pScrn, unsigned char *bits);
+
 #endif /* __NEWPORT_H__ */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/newport/newport.man b/xc/programs/Xserver/hw/xfree86/drivers/newport/newport.man
index e73b789a9..19272c34e 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/newport/newport.man
+++ b/xc/programs/Xserver/hw/xfree86/drivers/newport/newport.man
@@ -1,4 +1,4 @@
-.\" $XFree86: xc/programs/Xserver/hw/xfree86/drivers/newport/newport.man,v 1.3 2001/11/23 19:50:45 dawes Exp $ 
+.\" $XFree86: xc/programs/Xserver/hw/xfree86/drivers/newport/newport.man,v 1.4 2003/02/17 23:06:11 dawes Exp $ 
 .\" shorthand for double quote that works everywhere.
 .ds q \N'34'
 .TH NEWPORT __drivermansuffix__ __vendorversion__
@@ -14,28 +14,32 @@ newport \- Newport video driver
 .fi
 .SH DESCRIPTION
 .B newport
-is an XFree86 driver for the SGI Indy's newport video cards.
+is an XFree86 driver for the SGI Indy's and Indigo2's newport video cards.
 .SH SUPPORTED HARDWARE
 The
 .B newport
-driver supports the Newport(sometimes called XL) cards found in SGI Indys. It 
-does not support the XZ boards. It supports both the 8bit and 24bit versions 
-of the Newport.
+driver supports the Newport (also called XL) cards found in SGI Indys and Indigo2s.
+It supports both the 8bit and 24bit versions of the Newport.
 .SH CONFIGURATION DETAILS
 Please refer to XF86Config(__filemansuffix__) for general configuration
 details.  This section only covers configuration details specific to this
 driver.
 .PP
-The driver auto-detects all device information necessary to initialize
-the card.  However, if you have problems with auto-detection, you can
-specify:
+The following driver options are supported:
 .br
 .TP
 .BI "Option \*qbitplanes\*q \*q" integer \*q
 number of bitplanes of the board (8 or 24)
 Default: auto-detected.
+.TP
+.BI "Option \*qHWCursor\*q \*q" boolean \*q
+Enable or disable the HW cursor. Default: on.
+.PP
+.TP
+.BI "Option \*qBusID\*q \*q"integer \*q
+Set to 1 for the Indigo2 XL. Default: 0
 .SH "SEE ALSO"
 XFree86(1), XF86Config(__filemansuffix__), xf86config(1), Xserver(1), X(__miscmansuffix__)
 .SH AUTHORS
 Authors:
-Guido GÜnther   \fIagx@sigxcpu.org\fP
+Guido GÜnther \fIagx@sigxcpu.org\fP
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/newport/newport_cmap.c b/xc/programs/Xserver/hw/xfree86/drivers/newport/newport_cmap.c
index b4c6e1714..8052bdb7e 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/newport/newport_cmap.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/newport/newport_cmap.c
@@ -1,12 +1,18 @@
 /*
  * Id: newport_cmap.c,v 1.1 2000/11/29 20:58:10 agx Exp $
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/newport/newport_cmap.c,v 1.2 2001/11/23 19:50:45 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/newport/newport_cmap.c,v 1.3 2002/12/10 04:03:00 dawes Exp $ */
 
 #include "newport.h"
 
-static void NewportCmapSetRGB( NewportRegsPtr pNewportRegs, unsigned short addr, LOCO color);
+#ifndef USEFIFOWAIT
+#define USEFIFOWAIT 0
+#endif
+
 static void NewportCmapGetRGB( NewportRegsPtr pNewportRegs, unsigned short addr, LOCO *color);
+#if USEFIFOWAIT
+static void NewportCmapFifoWait( NewportRegsPtr pNewportRegs);
+#endif
 
 /* Load a colormap into the hardware */
 void NewportLoadPalette(ScrnInfoPtr pScrn, int numColors, int *indices, \
@@ -33,19 +39,53 @@ void NewportBackupPalette(ScrnInfoPtr pScrn)
 	}
 }
 
+#ifdef linux
+/* stolen from kernel :) */
+static unsigned char color_table[] = { 0, 4, 2, 6, 1, 5, 3, 7,
+				       8,12,10,14, 9,13,11,15 };
+ 
+/* the default colour table, for VGA+ colour systems */
+static int default_red[] = {0x00,0xaa,0x00,0xaa,0x00,0xaa,0x00,0xaa,
+    0x55,0xff,0x55,0xff,0x55,0xff,0x55,0xff};
+static int default_grn[] = {0x00,0x00,0xaa,0x55,0x00,0x00,0xaa,0xaa,
+    0x55,0x55,0xff,0xff,0x55,0x55,0xff,0xff};
+static int default_blu[] = {0x00,0x00,0x00,0x00,0xaa,0xaa,0xaa,0xaa,
+    0x55,0x55,0x55,0x55,0xff,0xff,0xff,0xff};
+#endif
+
 /* restore the default colormap */
 void NewportRestorePalette(ScrnInfoPtr pScrn)
 {
 	int i;
 	NewportPtr pNewport = NEWPORTPTR(pScrn);
 	
+#ifdef linux
+        for (i = 0; i < 16; i++) {
+		pNewport->txt_colormap[color_table[i]].red = default_red[i];
+		pNewport->txt_colormap[color_table[i]].green = default_grn[i];
+		pNewport->txt_colormap[color_table[i]].blue = default_blu[i];
+	}
+#endif
 	for(i = 0; i < 256; i++) {
 		NewportCmapSetRGB(pNewport->pNewportRegs, i, pNewport->txt_colormap[i]);
 	}
 }
 
+#if USEFIFOWAIT
+/* wait 'til cmap fifo is completely empty */
+static void NewportCmapFifoWait(NewportRegsPtr pNewportRegs)
+{
+        while(1) {
+		pNewportRegs->set.dcbmode = (NPORT_DMODE_ACM0 |  NCMAP_PROTOCOL |
+						NCMAP_REGADDR_SREG | NPORT_DMODE_W1);
+		if(!(pNewportRegs->set.dcbdata0.bytes.b3 & 4))
+			break;
+        }
+}
+#endif
+
 /* set the colormap entry at addr to color */
-static void NewportCmapSetRGB( NewportRegsPtr pNewportRegs, unsigned short addr, LOCO color)
+void NewportCmapSetRGB( NewportRegsPtr pNewportRegs, unsigned short addr, LOCO color)
 {
 	NewportWait(pNewportRegs);	/* this one should not be necessary */
 	NewportBfwait(pNewportRegs);
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/newport/newport_cursor.c b/xc/programs/Xserver/hw/xfree86/drivers/newport/newport_cursor.c
new file mode 100644
index 000000000..b5328f8c4
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/newport/newport_cursor.c
@@ -0,0 +1,165 @@
+/*
+ * newport_cursor.c
+ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/newport/newport_cursor.c,v 1.1 2002/12/10 04:03:00 dawes Exp $ */
+
+#include "newport.h"
+#include "cursorstr.h"
+
+#include "servermd.h"
+
+#define MAX_CURS 32
+
+static void NewportShowCursor(ScrnInfoPtr pScrn);
+static void NewportHideCursor(ScrnInfoPtr pScrn);
+static void NewportSetCursorPosition(ScrnInfoPtr pScrn, int x, int y);
+static void NewportSetCursorColors(ScrnInfoPtr pScrn, int bg, int fg);
+/* static void NewportLoadCursorImage(ScrnInfoPtr pScrn, unsigned char *bits); */
+static unsigned char* NewportRealizeCursor(xf86CursorInfoPtr infoPtr, CursorPtr pCurs);
+
+Bool
+NewportHWCursorInit(ScreenPtr pScreen)
+{
+	ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
+	NewportPtr pNewport = NEWPORTPTR(pScrn);
+	NewportRegsPtr pNewportRegs = NEWPORTREGSPTR(pScrn);
+	xf86CursorInfoPtr infoPtr;
+	CARD16 tmp;
+
+	infoPtr = xf86CreateCursorInfoRec();
+	if(!infoPtr)
+		return FALSE;
+
+	pNewport->CursorInfoRec = infoPtr;
+	infoPtr->MaxWidth = MAX_CURS;
+	infoPtr->MaxHeight = MAX_CURS;
+	infoPtr->Flags = HARDWARE_CURSOR_TRUECOLOR_AT_8BPP;
+
+	infoPtr->SetCursorColors = NewportSetCursorColors;
+	infoPtr->SetCursorPosition = NewportSetCursorPosition;
+	infoPtr->LoadCursorImage = NewportLoadCursorImage;
+	infoPtr->HideCursor = NewportHideCursor;
+	infoPtr->ShowCursor = NewportShowCursor;
+	infoPtr->RealizeCursor = NewportRealizeCursor;
+	infoPtr->UseHWCursor = NULL;
+
+	/* enable cursor funtion in shadow register */
+	pNewport->vc2ctrl |= VC2_CTRL_ECURS;
+	/* enable glyph cursor, maximum size is 32x32x2 */
+	pNewport->vc2ctrl &= ~( VC2_CTRL_ECG64 | VC2_CTRL_ECCURS);
+	/* setup hw cursors cmap base address  */
+	NewportBfwait(pNewportRegs);
+	pNewportRegs->set.dcbmode = (DCB_XMAP0 | R_DCB_XMAP9_PROTOCOL |
+			XM9_CRS_CURS_CMAP_MSB | NPORT_DMODE_W1 );
+	tmp = pNewportRegs->set.dcbdata0.bytes.b3;
+#if 0
+	/* The docs say we can change base address of the cursors
+	 * cmap entries, but it doesn't work. */
+	tmp++;
+#endif
+	pNewportRegs->set.dcbmode = (DCB_XMAP0 | W_DCB_XMAP9_PROTOCOL |
+			XM9_CRS_CURS_CMAP_MSB | NPORT_DMODE_W1 );
+	pNewportRegs->set.dcbdata0.bytes.b3 = tmp;
+	pNewport->curs_cmap_base = (tmp << 5) & 0xffe0;
+
+	return xf86InitCursor(pScreen, infoPtr);
+}
+
+
+static void NewportShowCursor(ScrnInfoPtr pScrn)
+{
+	NewportPtr pNewport = NEWPORTPTR(pScrn);
+	NewportRegsPtr pNewportRegs = NEWPORTREGSPTR(pScrn);
+
+	pNewport->vc2ctrl |= VC2_CTRL_ECDISP;
+	NewportVc2Set( pNewportRegs, VC2_IREG_CONTROL, pNewport->vc2ctrl);
+}
+
+static void NewportHideCursor(ScrnInfoPtr pScrn)
+{
+	NewportPtr pNewport = NEWPORTPTR(pScrn);
+	NewportRegsPtr pNewportRegs = NEWPORTREGSPTR(pScrn);
+
+	pNewport->vc2ctrl &= ~VC2_CTRL_ECDISP;
+	NewportVc2Set( pNewportRegs, VC2_IREG_CONTROL, pNewport->vc2ctrl);
+}
+
+static void NewportSetCursorPosition(ScrnInfoPtr pScrn, int x, int y)
+{
+	CARD16 x_off;
+	NewportRegsPtr pNewportRegs = NEWPORTREGSPTR(pScrn);
+	NewportPtr pNewport = NEWPORTPTR(pScrn);
+		
+	/* the docu says this should always be 31, but it isn't */
+	x_off = 31;
+	if ( pNewport->board_rev < 6 )
+		x_off = 21;
+	NewportVc2Set( pNewportRegs, VC2_IREG_CURSX, (CARD16) x + x_off);
+	NewportVc2Set( pNewportRegs, VC2_IREG_CURSY, (CARD16) y + 31);
+}
+
+static void NewportSetCursorColors(ScrnInfoPtr pScrn, int bg, int fg)
+{
+	NewportPtr pNewport = NEWPORTPTR(pScrn);
+	NewportRegsPtr pNewportRegs = NEWPORTREGSPTR(pScrn);
+	LOCO color;
+
+	color.blue = bg & 0xff;
+	color.green = (bg & 0xff00) >> 8;
+	color.red = (bg & 0xff0000) >> 16;
+	NewportCmapSetRGB( pNewportRegs, pNewport->curs_cmap_base+2, color);
+
+	color.blue = fg & 0xff;
+	color.green = (fg & 0xff00) >> 8;
+	color.red = (fg & 0xff0000) >> 16;
+	NewportCmapSetRGB( pNewportRegs, pNewport->curs_cmap_base+1, color);
+}
+
+static unsigned char* NewportRealizeCursor(xf86CursorInfoPtr infoPtr, CursorPtr pCurs)
+{
+	int size = (infoPtr->MaxWidth * infoPtr->MaxHeight) >> 2;
+	CARD32 *mem, *SrcS, *SrcM, *DstS;
+	unsigned int i;
+
+	if (!(mem = xcalloc(1, size)))
+        	return NULL;
+
+	SrcS = (CARD32*)pCurs->bits->source;
+    	SrcM = (CARD32*)pCurs->bits->mask;
+    	DstS = mem;
+	/* first color: maximum is 32*4 Bytes */
+	for(i=0; i < pCurs->bits->height; i++) {
+		*DstS = *SrcS & *SrcM;
+		DstS++, SrcS++, SrcM++;
+	}
+	/* second color is the lower of mem: again 32*4 Bytes at most */
+	DstS = mem + MAX_CURS;
+	SrcS = (CARD32*)pCurs->bits->source;
+    	SrcM = (CARD32*)pCurs->bits->mask;
+	for(i=0; i < pCurs->bits->height; i++) {
+		*DstS = (~*SrcS) & *SrcM;
+		DstS++, SrcS++, SrcM++;
+	}
+	return (unsigned char*) mem;
+}
+
+void NewportLoadCursorImage(ScrnInfoPtr pScrn, unsigned char *bits)
+{
+	int i;
+	CARD16 tmp;
+	NewportRegsPtr pNewportRegs = NEWPORTREGSPTR(pScrn);
+
+	/* address of cursor data in vc2's ram */
+        tmp = NewportVc2Get( pNewportRegs, VC2_IREG_CENTRY);
+ 	/* this is where we want to write to: */
+        NewportVc2Set( pNewportRegs, VC2_IREG_RADDR, tmp);
+        pNewportRegs->set.dcbmode = (NPORT_DMODE_AVC2 | VC2_REGADDR_RAM |
+                               		NPORT_DMODE_W2 | VC2_PROTOCOL);
+	/* write cursor data */
+        for (i = 0; i < ((MAX_CURS * MAX_CURS) >> 3); i++) {
+		NewportBfwait(pNewportRegs);
+		pNewportRegs->set.dcbdata0.hwords.s1 = *(unsigned short*)bits;
+		bits += sizeof(unsigned short);
+        }
+}
+
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/newport/newport_driver.c b/xc/programs/Xserver/hw/xfree86/drivers/newport/newport_driver.c
index 3971a7548..e55354cd2 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/newport/newport_driver.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/newport/newport_driver.c
@@ -5,7 +5,7 @@
  * 
  * This driver is based on the newport.c & newport_con.c kernel code
  *
- * (c) 2000,2001 Guido Guenther <agx@sigxcpu.org>
+ * (c) 2000-2002 Guido Guenther <agx@sigxcpu.org>
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy
  * of this software and associated documentation files (the "Software"), to deal
@@ -30,7 +30,7 @@
  * Project.
  *
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/newport/newport_driver.c,v 1.20 2002/09/30 22:17:55 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/newport/newport_driver.c,v 1.24 2003/02/18 19:10:36 alanh Exp $ */
 
 /* function prototypes, common data structures & generic includes */
 #include "newport.h"
@@ -106,6 +106,12 @@ static const char *fbSymbols[] = {
 	NULL
 };	
 
+static const char *ramdacSymbols[] = {
+    "xf86CreateCursorInfoRec",
+    "xf86InitCursor",
+    NULL
+};
+
 static const char *shadowSymbols[] = {
 	"ShadowFBInit",
 	NULL
@@ -150,7 +156,7 @@ newportSetup(pointer module, pointer opts, int *errmaj, int *errmin)
 		 * might refer to.
 		 *
 		 */
-		LoaderRefSymLists( fbSymbols, shadowSymbols, NULL);
+		LoaderRefSymLists( fbSymbols, ramdacSymbols, shadowSymbols, NULL);
 
 
 		/*
@@ -168,13 +174,15 @@ newportSetup(pointer module, pointer opts, int *errmaj, int *errmin)
 
 typedef enum {
 	OPTION_BITPLANES,
-	OPTION_BUS_ID
+	OPTION_BUS_ID,
+	OPTION_HWCURSOR
 } NewportOpts;
 
 /* Supported options */
 static const OptionInfoRec NewportOptions [] = {
 	{ OPTION_BITPLANES, "bitplanes", OPTV_INTEGER, {0}, FALSE },
 	{ OPTION_BUS_ID, "BusID", OPTV_INTEGER, {0}, FALSE },
+	{ OPTION_HWCURSOR, "HWCursor", OPTV_BOOLEAN, {0}, FALSE },
 	{ -1, NULL, OPTV_NONE, {0}, FALSE }
 };
 
@@ -243,7 +251,8 @@ NewportProbe(DriverPtr drv, int flags)
 					 * Set it as an ISA entity to get the entity field set up right.
 					 */
 					entity = xf86ClaimIsaSlot(drv, 0, dev, TRUE);
-					base = (NEWPORT_BASE_ADDR0 + busID * NEWPORT_BASE_OFFSET);
+					base = (NEWPORT_BASE_ADDR0
+						+ busID * NEWPORT_BASE_OFFSET);
 					RANGE(range[0], base, base + sizeof(NewportRegs),\
 							ResExcMemBlock);
 					pScrn = xf86ConfigIsaEntity(pScrn, 0, entity, NULL, range, \
@@ -385,11 +394,17 @@ NewportPreInit(ScrnInfoPtr pScrn, int flags)
 			pNewport->bitplanes);
 		return FALSE;
 	}
+
+	from=X_DEFAULT;
+	pNewport->hwCursor = TRUE;
+    	if (xf86GetOptValBool(pNewport->Options, OPTION_HWCURSOR, &pNewport->hwCursor))
+        	from = X_CONFIG;
+	xf86DrvMsg(pScrn->scrnIndex, from, "Using %s cursor\n",
+        	pNewport->hwCursor ? "HW" : "SW");
 	
 	/* Set up clock ranges that are alway ok */
-	
 	/* XXX: Use information from VC2 here */
-	clockRanges = xnfalloc(sizeof(ClockRange));
+	clockRanges = xnfcalloc(sizeof(ClockRange),1);
 	clockRanges->next = NULL;
 	clockRanges->minClock = 10000;
 	clockRanges->maxClock = 300000;
@@ -437,6 +452,15 @@ NewportPreInit(ScrnInfoPtr pScrn, int flags)
 	}
 	xf86LoaderReqSymLists( fbSymbols, NULL);
 
+	/* Load ramdac modules */
+    	if (pNewport->hwCursor) {
+        	if (!xf86LoadSubModule(pScrn, "ramdac")) {
+			NewportFreeRec(pScrn);
+            		return FALSE;
+        	}
+        	xf86LoaderReqSymLists(ramdacSymbols, NULL);
+    	}
+
 	/* Load ShadowFB module */
 	if (!xf86LoadSubModule(pScrn, "shadowfb")) {
 		NewportFreeRec(pScrn);
@@ -478,7 +502,7 @@ NewportScreenInit(int index, ScreenPtr pScreen, int argc, char **argv)
 	/* Setup the stuff for the shadow framebuffer */
 	pNewport->ShadowPitch = (( pScrn->virtualX * pNewport->Bpp ) + 3) & ~3L;
 	pNewport->ShadowPtr = xnfalloc(pNewport->ShadowPitch * pScrn->virtualY);
-	
+
 	if (!NewportModeInit(pScrn, pScrn->currentMode))
 			return FALSE;
 
@@ -517,19 +541,35 @@ NewportScreenInit(int index, ScreenPtr pScreen, int argc, char **argv)
 	/* Initialize software cursor */
 	if(!miDCInitialize(pScreen, xf86GetPointerScreenFuncs()))
 		return FALSE;
-	
+
+	/* Initialize hardware cursor */
+	if(pNewport->hwCursor)
+		if(!NewportHWCursorInit(pScreen)) {
+			xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+               		"Hardware cursor initialization failed\n");
+			return FALSE;
+	}
+
 	/* Initialise default colourmap */
 	if (!miCreateDefColormap(pScreen))
 		return FALSE;
 
 	/* Install our LoadPalette funciton */
 	if(!xf86HandleColormaps(pScreen, 256, 8, NewportLoadPalette, 0,
-				CMAP_RELOAD_ON_MODE_SWITCH ))
+				CMAP_RELOAD_ON_MODE_SWITCH )) {
+		xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+                   "Colormap initialization failed\n");
 		return FALSE;
+	}
 
 	/* Initialise shadow frame buffer */
-	ShadowFBInit(pScreen, (pNewport->Bpp == 1) ? &NewportRefreshArea8 :
-				&NewportRefreshArea24);
+	if(!ShadowFBInit(pScreen, (pNewport->Bpp == 1) ? &NewportRefreshArea8 :
+				&NewportRefreshArea24)) {
+		xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+                   "ShadowFB initialization failed\n");
+		return FALSE;
+	}
+
 
 #ifdef XvExtension
 	{
@@ -596,9 +636,9 @@ static Bool
 NewportSaveScreen(ScreenPtr pScreen, int mode)
 {
 	ScrnInfoPtr pScrn;
+	NewportPtr pNewport;
 	NewportRegsPtr pNewportRegs;
 	Bool unblank;
-	unsigned short treg;
 
 	if (!pScreen)
 		return TRUE;
@@ -609,15 +649,14 @@ NewportSaveScreen(ScreenPtr pScreen, int mode)
 	if (!pScrn->vtSema)
 		return TRUE;
 
+	pNewport = NEWPORTPTR(pScrn);
 	pNewportRegs = NEWPORTPTR(pScrn)->pNewportRegs;
 	
-	if (unblank) {
-		treg = NewportVc2Get(pNewportRegs, VC2_IREG_CONTROL);
-	        NewportVc2Set( pNewportRegs, VC2_IREG_CONTROL, (treg | VC2_CTRL_EDISP));
-    	} else {
-		treg = NewportVc2Get(pNewportRegs, VC2_IREG_CONTROL);
-		NewportVc2Set( pNewportRegs, VC2_IREG_CONTROL, (treg & ~(VC2_CTRL_EDISP)));
-        }
+	if (unblank)
+		pNewport->vc2ctrl |= VC2_CTRL_EDISP;            
+	else
+		pNewport->vc2ctrl &= ~VC2_CTRL_EDISP;           
+	NewportVc2Set( pNewportRegs, VC2_IREG_CONTROL, pNewport->vc2ctrl);
 	return TRUE;
 }
 
@@ -648,11 +687,11 @@ NewportModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
 	pScrn->vtSema = TRUE;
 	/* first backup the necessary registers... */
 	NewportBackupRex3(pScrn);
-	pNewport->txt_vc2ctrl = NewportVc2Get( pNewportRegs, VC2_IREG_CONTROL);
+	if( pNewport->hwCursor )
+		NewportBackupVc2Cursor( pScrn );
+	NewportBackupVc2(pScrn);
 	NewportBackupPalette(pScrn);
-	if( pNewport->Bpp == 3) { /* at 24bpp we have to backup some more registers */
-		NewportBackupXmap9s( pScrn );
-	}
+	NewportBackupXmap9s( pScrn );
 	/* ...then  setup the hardware */
 	pNewport->drawmode1 = DM1_RGBPLANES | 
 				NPORT_DMODE1_CCLT | 
@@ -668,7 +707,7 @@ NewportModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
 
 		/* tell the xmap9s that we are using 24bpp */
 		NewportBfwait(pNewport->pNewportRegs);
-		pNewportRegs->set.dcbmode = (DCB_XMAP_ALL | R_DCB_XMAP9_PROTOCOL |
+		pNewportRegs->set.dcbmode = (DCB_XMAP_ALL | W_DCB_XMAP9_PROTOCOL |
 				XM9_CRS_CONFIG | NPORT_DMODE_W1 );
 		pNewportRegs->set.dcbdata0.bytes.b3 &= ~(XM9_8_BITPLANES | XM9_PUPMODE);
 		NewportBfwait(pNewport->pNewportRegs);
@@ -710,6 +749,9 @@ NewportModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
 	NewportWait(pNewportRegs);
 	pNewportRegs->set.drawmode1 = pNewport->drawmode1;
 
+	/* XXX: Lazy mode on: just use the textmode value */
+	pNewport->vc2ctrl = pNewport->txt_vc2ctrl;
+
 	return TRUE;
 }
 
@@ -723,15 +765,14 @@ static void
 NewportRestore(ScrnInfoPtr pScrn, Bool Closing)
 {
 	NewportPtr pNewport = NEWPORTPTR(pScrn);
-	NewportRegsPtr pNewportRegs = pNewport->pNewportRegs;
 
 	/* Restore backed up registers */
 	NewportRestoreRex3( pScrn );
-	NewportVc2Set( pNewportRegs, VC2_IREG_CONTROL, pNewport->txt_vc2ctrl );
+	if( pNewport->hwCursor )
+		NewportRestoreVc2Cursor( pScrn );
+	NewportRestoreVc2( pScrn );
 	NewportRestorePalette( pScrn );
-	if( pNewport->Bpp == 3) {
-		NewportRestoreXmap9s( pScrn);
-	}
+	NewportRestoreXmap9s( pScrn );
 }
 
 
@@ -740,21 +781,26 @@ NewportRestore(ScrnInfoPtr pScrn, Bool Closing)
 static unsigned
 NewportHWProbe(unsigned probedIDs[])
 {
-	FILE* cpuinfo;		
+	FILE* cpuinfo;
 	char line[80];
 	unsigned hasNewport = 0;
+
 	if ((cpuinfo = fopen("/proc/cpuinfo", "r"))) {
-		while(fgets(line, 80, cpuinfo) != NULL) {	
+		while(fgets(line, 80, cpuinfo) != NULL) {
 			if(strstr(line, "SGI Indy") != NULL) {
 				hasNewport = 1;
+				probedIDs[0] = 0;
+				break;
+			}
+			if(strstr(line, "SGI Indigo2") != NULL) {
+				hasNewport = 1;
+				probedIDs[0] = 1;
 				break;
 			}
 		}
-		fclose(cpuinfo);	
+		fclose(cpuinfo);
 	}
-
-	probedIDs[0] = 0;
-	return hasNewport;	
+	return hasNewport;
 }
 
 /* Probe for Chipset revisions */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/newport/newport_regs.c b/xc/programs/Xserver/hw/xfree86/drivers/newport/newport_regs.c
index 3cf4a6570..30028d12a 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/newport/newport_regs.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/newport/newport_regs.c
@@ -1,7 +1,7 @@
 /*
  * Id: newport_regs.c,v 1.3 2000/11/29 20:58:10 agx Exp $
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/newport/newport_regs.c,v 1.6 2001/12/21 15:37:23 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/newport/newport_regs.c,v 1.7 2002/12/10 04:03:00 dawes Exp $ */
 
 #include "newport.h"
 
@@ -26,6 +26,57 @@ NewportVc2Get(NewportRegsPtr pNewportRegs, unsigned char vc2Ireg)
 	return pNewportRegs->set.dcbdata0.hwords.s1;
 }
 
+void 
+NewportBackupVc2( ScrnInfoPtr pScrn)
+{
+	NewportPtr pNewport = NEWPORTPTR(pScrn);
+	NewportRegsPtr pNewportRegs = NEWPORTREGSPTR(pScrn);
+
+	pNewport->txt_vc2ctrl = NewportVc2Get( pNewportRegs, VC2_IREG_CONTROL );
+	pNewport->txt_vc2cur_x = NewportVc2Get( pNewportRegs, VC2_IREG_CURSX );
+	pNewport->txt_vc2cur_y = NewportVc2Get( pNewportRegs, VC2_IREG_CURSY );
+}
+
+void 
+NewportRestoreVc2( ScrnInfoPtr pScrn)
+{
+	NewportPtr pNewport = NEWPORTPTR(pScrn);
+	NewportRegsPtr pNewportRegs = NEWPORTREGSPTR(pScrn);
+
+	NewportVc2Set( pNewportRegs, VC2_IREG_CONTROL, pNewport->txt_vc2ctrl );
+	NewportVc2Set( pNewportRegs, VC2_IREG_CURSX, pNewport->txt_vc2cur_x );
+	NewportVc2Set( pNewportRegs, VC2_IREG_CURSY, pNewport->txt_vc2cur_y );
+}
+
+void
+NewportRestoreVc2Cursor( ScrnInfoPtr pScrn)
+{
+	NewportPtr pNewport = NEWPORTPTR(pScrn);
+	NewportLoadCursorImage( pScrn, (CARD8*)pNewport->txt_vc2cur_data);
+}
+
+void
+NewportBackupVc2Cursor( ScrnInfoPtr pScrn)
+{
+	int i;
+	CARD16 tmp, *data;
+	NewportPtr pNewport = NEWPORTPTR(pScrn);
+	NewportRegsPtr pNewportRegs = NEWPORTREGSPTR(pScrn);
+
+	data = (CARD16*)pNewport->txt_vc2cur_data;
+	/* address of cursor data in vc2's ram */
+        tmp = NewportVc2Get( pNewportRegs, VC2_IREG_CENTRY);
+ 	/* this is where we want to write to: */
+        NewportVc2Set( pNewportRegs, VC2_IREG_RADDR, tmp);
+        pNewportRegs->set.dcbmode = (NPORT_DMODE_AVC2 | VC2_REGADDR_RAM |
+                               		NPORT_DMODE_W2 | VC2_PROTOCOL);
+	/* read cursor data */
+        for (i = 0; i < 128; i++) {
+		NewportBfwait(pNewportRegs);
+		*data = pNewportRegs->set.dcbdata0.hwords.s1;
+		data++;
+        }
+}
 
 /* Sometimes we just have to wait until we can do anything */
 void
@@ -148,6 +199,10 @@ void NewportBackupXmap9s( ScrnInfoPtr pScrn)
 	pNewport->txt_xmap9_mi = pNewportRegs->set.dcbdata0.bytes.b3; 
 	/* mode register 0 of xmap 0 */
 	pNewport->txt_xmap9_mod0 = NewportXmap9GetModeRegister(pNewportRegs, 0, 0);
+	/* cursor cmap msb */
+	pNewportRegs->set.dcbmode = (DCB_XMAP0 | R_DCB_XMAP9_PROTOCOL |
+			XM9_CRS_CURS_CMAP_MSB | NPORT_DMODE_W1 );
+	pNewport->txt_xmap9_ccmsb = pNewportRegs->set.dcbdata0.bytes.b3;
 }
 
 void NewportRestoreXmap9s( ScrnInfoPtr pScrn)
@@ -172,5 +227,9 @@ void NewportRestoreXmap9s( ScrnInfoPtr pScrn)
 	pNewportRegs->set.dcbmode = (DCB_XMAP1 | W_DCB_XMAP9_PROTOCOL |
 				XM9_CRS_CONFIG | NPORT_DMODE_W1 );
 	pNewportRegs->set.dcbdata0.bytes.b3 = pNewport->txt_xmap9_cfg1;
+	/* cursor cmap msb */
+	pNewportRegs->set.dcbmode = (DCB_XMAP0 | R_DCB_XMAP9_PROTOCOL |
+			XM9_CRS_CURS_CMAP_MSB | NPORT_DMODE_W1 );
+	pNewportRegs->set.dcbdata0.bytes.b3 = pNewport->txt_xmap9_ccmsb;
 }
 
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/newport/newport_regs.h b/xc/programs/Xserver/hw/xfree86/drivers/newport/newport_regs.h
index f3bf170db..f4b04cbd4 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/newport/newport_regs.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/newport/newport_regs.h
@@ -4,7 +4,7 @@
  * Register Layouts of the various newport chips
  * mostly as found in linux/include/asm/newport.h 
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/newport/newport_regs.h,v 1.2 2001/11/23 19:50:45 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/newport/newport_regs.h,v 1.3 2002/12/10 04:03:00 dawes Exp $ */
 
 typedef volatile unsigned long npireg_t;
 
@@ -427,7 +427,7 @@ struct Newport_regs {
 #define XM9_MREG_BUF_SEL	(1 << 0)
 #define XM9_MREG_OVL_BUF_SEL	(1 << 1)	
 #define XM9_MREG_GAMMA_BYPASS	(1 << 2)
-#define XM9_MREG_MSB_CMAP	(31 << 3
+#define XM9_MREG_MSB_CMAP	(31 << 3)
 #define XM9_MREG_PIX_MODE_MASK	(3 << 8)
 #define XM9_MREG_PIX_MODE_RGB0	(1 << 8)
 #define XM9_MREG_PIX_MODE_RGB1	(1 << 9)
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/nsc/Imakefile b/xc/programs/Xserver/hw/xfree86/drivers/nsc/Imakefile
new file mode 100644
index 000000000..caab37f73
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/Imakefile
@@ -0,0 +1,178 @@
+XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/Imakefile,v 1.6 2003/02/19 10:10:49 alanh Exp $
+XCOMM Imakefile for the National Semiconductor display driver
+XCOMM that is based on the durango code.
+XCOMM
+XCOMM (c) 2000 National Semiconductor corporation
+XCOMM (c) 2000 by Juergen Schneider, Infomatec IAS GmbH
+XCOMM
+#define IHaveModules
+#include <Server.tmpl>
+
+XCOMM Turn this on for the Set-Top-Box (STB) mode which uses 
+XCOMM the NSC linux kernel frame buffer driver interface.
+
+XCOMM #define NSC_STB
+ 
+#if !defined(NSC_STB)
+DEFINES = -DOPT_ACCEL
+DURANGOSRCS = durango.c panel.c
+DURANGOOBJS = durango.o panel.o
+EXTINCLUDES = -I./gfx -I./panel
+#else
+DEFINES = -DSTB_X
+STBSRCS = nsc_galstub.c
+STBOBJS = nsc_galstub.o
+EXTINCLUDES = -I/usr/src/linux/drivers/video/nsc/gfx \
+              -I/usr/src/linux/drivers/video/nsc/panel \
+              -I/usr/src/linux/drivers/video/nsc/
+#endif
+
+#ifdef i386Architecture
+I86SRC = nsc_msr_asm.S
+I86OBJ = nsc_msr_asm.o
+#endif
+
+SRCS =  nsc_driver.c \
+		nsc_gx1_driver.c \
+		nsc_gx1_dga.c \
+		nsc_gx1_accel.c \
+		nsc_gx1_cursor.c \
+		nsc_gx1_video.c \
+		nsc_gx1_shadow.c \
+		nsc_gx2_driver.c\
+		nsc_gx2_accel.c \
+		nsc_gx2_cursor.c \
+		nsc_gx2_dga.c \
+		nsc_gx2_video.c \
+		nsc_gx2_shadow.c $(I86SRC) $(STBSRCS) $(DURANGOSRCS)
+
+OBJS =  nsc_driver.o \
+		nsc_gx1_driver.o \
+		nsc_gx1_accel.o \
+		nsc_gx1_cursor.o \
+		nsc_gx1_dga.o \
+		nsc_gx1_shadow.o \
+		nsc_gx1_video.o \
+		nsc_gx2_driver.o \
+		nsc_gx2_accel.o \
+		nsc_gx2_cursor.o \
+		nsc_gx2_dga.o \
+		nsc_gx2_video.o \
+		nsc_gx2_shadow.o $(I86OBJ) $(STBOBJS) $(DURANGOOBJS)
+
+#if defined(XF86DriverSDK)
+INCLUDES = -I. -I../../include
+#else
+INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86OSSRC) -I$(SERVERSRC)/Xext \
+		-I$(SERVERSRC)/mfb -I$(SERVERSRC)/mi \
+		-I$(SERVERSRC)/cfb -I$(SERVERSRC)/fb -I$(XF86SRC)/xaa \
+		-I$(XF86SRC)/vgahw -I$(XF86SRC)/ramdac \
+		-I$(XF86SRC)/ddc -I$(XF86SRC)/i2c \
+		-I$(XF86SRC)/rac -I$(XF86SRC)/int10 \
+		-I$(XF86SRC)/xf24_32bpp -I$(FONTINCSRC) \
+		-I$(XF86SRC)/xf8_32bpp -I$(XF86SRC)/xf1bpp \
+		-I$(XF86SRC)/xf4bpp -I$(SERVERSRC)/include -I$(XINCLUDESRC) \
+		-I$(XF86SRC)/ddc -I$(XF86SRC)/i2c -I$(EXTINCSRC) $(DRIINCLUDES) \
+		-I$(XF86SRC)/shadowfb -I$(XF86SRC)/fbdevhw \
+		-I$(XTOP)/include -I$(XF86SRC)/vbe -I$(SERVERSRC)/render \
+		$(EXTINCLUDES)
+#endif
+
+
+#if MakeHasPosixVariableSubstitutions
+SubdirLibraryRule($(OBJS))
+#endif
+
+ModuleObjectRule()
+
+ObjectModuleTarget(nsc,$(OBJS))
+
+InstallObjectModule(nsc,$(MODULEDIR),drivers)
+
+#if !defined(XF86DriverSDK)
+CppManTarget(nsc,)
+InstallModuleManPage(nsc)
+#endif 
+
+DependTarget()
+
+#ifdef i386Architecture
+ObjectFromAsmSource(nsc_msr_asm,NullParameter)
+#endif
+
+InstallDriverSDKNonExecFile(Imakefile,$(DRIVERSDKDIR)/drivers/nsc)
+
+InstallDriverSDKNonExecFile(durango.c,$(DRIVERSDKDIR)/drivers/nsc)
+InstallDriverSDKNonExecFile(nsc.h,$(DRIVERSDKDIR)/drivers/nsc)
+InstallDriverSDKNonExecFile(nsc_driver.c,$(DRIVERSDKDIR)/drivers/nsc)
+InstallDriverSDKNonExecFile(nsc_fourcc.h,$(DRIVERSDKDIR)/drivers/nsc)
+InstallDriverSDKNonExecFile(nsc_galfns.c,$(DRIVERSDKDIR)/drivers/nsc)
+InstallDriverSDKNonExecFile(nsc_galstub.c,$(DRIVERSDKDIR)/drivers/nsc)
+InstallDriverSDKNonExecFile(nsc_gx1_accel.c,$(DRIVERSDKDIR)/drivers/nsc)
+InstallDriverSDKNonExecFile(nsc_gx1_cursor.c,$(DRIVERSDKDIR)/drivers/nsc)
+InstallDriverSDKNonExecFile(nsc_gx1_dga.c,$(DRIVERSDKDIR)/drivers/nsc)
+InstallDriverSDKNonExecFile(nsc_gx1_driver.c,$(DRIVERSDKDIR)/drivers/nsc)
+InstallDriverSDKNonExecFile(nsc_gx1_shadow.c,$(DRIVERSDKDIR)/drivers/nsc)
+InstallDriverSDKNonExecFile(nsc_gx1_video.c,$(DRIVERSDKDIR)/drivers/nsc)
+InstallDriverSDKNonExecFile(nsc_gx2_accel.c,$(DRIVERSDKDIR)/drivers/nsc)
+InstallDriverSDKNonExecFile(nsc_gx2_cursor.c,$(DRIVERSDKDIR)/drivers/nsc)
+InstallDriverSDKNonExecFile(nsc_gx2_dga.c,$(DRIVERSDKDIR)/drivers/nsc)
+InstallDriverSDKNonExecFile(nsc_gx2_driver.c,$(DRIVERSDKDIR)/drivers/nsc)
+InstallDriverSDKNonExecFile(nsc_gx2_shadow.c,$(DRIVERSDKDIR)/drivers/nsc)
+InstallDriverSDKNonExecFile(nsc_gx2_vga.c,$(DRIVERSDKDIR)/drivers/nsc)
+InstallDriverSDKNonExecFile(nsc_gx2_video.c,$(DRIVERSDKDIR)/drivers/nsc)
+InstallDriverSDKNonExecFile(nsc_msr_asm.S,$(DRIVERSDKDIR)/drivers/nsc)
+InstallDriverSDKNonExecFile(nsc_regacc.c,$(DRIVERSDKDIR)/drivers/nsc)
+InstallDriverSDKNonExecFile(panel.c,$(DRIVERSDKDIR)/drivers/nsc)
+InstallDriverSDKNonExecFile(gfx/disp_gu1.c,$(DRIVERSDKDIR)/drivers/nsc/gfx)
+InstallDriverSDKNonExecFile(gfx/disp_gu2.c,$(DRIVERSDKDIR)/drivers/nsc/gfx)
+InstallDriverSDKNonExecFile(gfx/durango.c,$(DRIVERSDKDIR)/drivers/nsc/gfx)
+InstallDriverSDKNonExecFile(gfx/gfx_dcdr.c,$(DRIVERSDKDIR)/drivers/nsc/gfx)
+InstallDriverSDKNonExecFile(gfx/gfx_defs.h,$(DRIVERSDKDIR)/drivers/nsc/gfx)
+InstallDriverSDKNonExecFile(gfx/gfx_disp.c,$(DRIVERSDKDIR)/drivers/nsc/gfx)
+InstallDriverSDKNonExecFile(gfx/gfx_i2c.c,$(DRIVERSDKDIR)/drivers/nsc/gfx)
+InstallDriverSDKNonExecFile(gfx/gfx_init.c,$(DRIVERSDKDIR)/drivers/nsc/gfx)
+InstallDriverSDKNonExecFile(gfx/gfx_mode.h,$(DRIVERSDKDIR)/drivers/nsc/gfx)
+InstallDriverSDKNonExecFile(gfx/gfx_msr.c,$(DRIVERSDKDIR)/drivers/nsc/gfx)
+InstallDriverSDKNonExecFile(gfx/gfx_regs.h,$(DRIVERSDKDIR)/drivers/nsc/gfx)
+InstallDriverSDKNonExecFile(gfx/gfx_rndr.c,$(DRIVERSDKDIR)/drivers/nsc/gfx)
+InstallDriverSDKNonExecFile(gfx/gfx_rtns.h,$(DRIVERSDKDIR)/drivers/nsc/gfx)
+InstallDriverSDKNonExecFile(gfx/gfx_tv.c,$(DRIVERSDKDIR)/drivers/nsc/gfx)
+InstallDriverSDKNonExecFile(gfx/gfx_type.h,$(DRIVERSDKDIR)/drivers/nsc/gfx)
+InstallDriverSDKNonExecFile(gfx/gfx_vga.c,$(DRIVERSDKDIR)/drivers/nsc/gfx)
+InstallDriverSDKNonExecFile(gfx/gfx_vid.c,$(DRIVERSDKDIR)/drivers/nsc/gfx)
+InstallDriverSDKNonExecFile(gfx/gfx_vip.c,$(DRIVERSDKDIR)/drivers/nsc/gfx)
+InstallDriverSDKNonExecFile(gfx/history.h,$(DRIVERSDKDIR)/drivers/nsc/gfx)
+InstallDriverSDKNonExecFile(gfx/i2c_acc.c,$(DRIVERSDKDIR)/drivers/nsc/gfx)
+InstallDriverSDKNonExecFile(gfx/i2c_gpio.c,$(DRIVERSDKDIR)/drivers/nsc/gfx)
+InstallDriverSDKNonExecFile(gfx/init_gu1.c,$(DRIVERSDKDIR)/drivers/nsc/gfx)
+InstallDriverSDKNonExecFile(gfx/init_gu2.c,$(DRIVERSDKDIR)/drivers/nsc/gfx)
+InstallDriverSDKNonExecFile(gfx/msr_rdcl.c,$(DRIVERSDKDIR)/drivers/nsc/gfx)
+InstallDriverSDKNonExecFile(gfx/release.txt,$(DRIVERSDKDIR)/drivers/nsc/gfx)
+InstallDriverSDKNonExecFile(gfx/rndr_gu1.c,$(DRIVERSDKDIR)/drivers/nsc/gfx)
+InstallDriverSDKNonExecFile(gfx/rndr_gu2.c,$(DRIVERSDKDIR)/drivers/nsc/gfx)
+InstallDriverSDKNonExecFile(gfx/saa7114.c,$(DRIVERSDKDIR)/drivers/nsc/gfx)
+InstallDriverSDKNonExecFile(gfx/tv_1200.c,$(DRIVERSDKDIR)/drivers/nsc/gfx)
+InstallDriverSDKNonExecFile(gfx/tv_fs450.c,$(DRIVERSDKDIR)/drivers/nsc/gfx)
+InstallDriverSDKNonExecFile(gfx/tv_fs450.h,$(DRIVERSDKDIR)/drivers/nsc/gfx)
+InstallDriverSDKNonExecFile(gfx/vga_gu1.c,$(DRIVERSDKDIR)/drivers/nsc/gfx)
+InstallDriverSDKNonExecFile(gfx/vid_1200.c,$(DRIVERSDKDIR)/drivers/nsc/gfx)
+InstallDriverSDKNonExecFile(gfx/vid_5530.c,$(DRIVERSDKDIR)/drivers/nsc/gfx)
+InstallDriverSDKNonExecFile(gfx/vid_rdcl.c,$(DRIVERSDKDIR)/drivers/nsc/gfx)
+InstallDriverSDKNonExecFile(gfx/vip_1200.c,$(DRIVERSDKDIR)/drivers/nsc/gfx)
+InstallDriverSDKNonExecFile(panel/92xx.h,$(DRIVERSDKDIR)/drivers/nsc/panel)
+InstallDriverSDKNonExecFile(panel/cen9211.c,$(DRIVERSDKDIR)/drivers/nsc/panel)
+InstallDriverSDKNonExecFile(panel/cen9211.h,$(DRIVERSDKDIR)/drivers/nsc/panel)
+InstallDriverSDKNonExecFile(panel/dora9211.c,$(DRIVERSDKDIR)/drivers/nsc/panel)
+InstallDriverSDKNonExecFile(panel/dora9211.h,$(DRIVERSDKDIR)/drivers/nsc/panel)
+InstallDriverSDKNonExecFile(panel/drac9210.c,$(DRIVERSDKDIR)/drivers/nsc/panel)
+InstallDriverSDKNonExecFile(panel/drac9210.h,$(DRIVERSDKDIR)/drivers/nsc/panel)
+InstallDriverSDKNonExecFile(panel/panel.c,$(DRIVERSDKDIR)/drivers/nsc/panel)
+InstallDriverSDKNonExecFile(panel/panel.h,$(DRIVERSDKDIR)/drivers/nsc/panel)
+InstallDriverSDKNonExecFile(panel/platform.c,$(DRIVERSDKDIR)/drivers/nsc/panel)
+InstallDriverSDKNonExecFile(panel/pnl_bios.c,$(DRIVERSDKDIR)/drivers/nsc/panel)
+InstallDriverSDKNonExecFile(panel/pnl_defs.h,$(DRIVERSDKDIR)/drivers/nsc/panel)
+InstallDriverSDKNonExecFile(panel/pnl_init.c,$(DRIVERSDKDIR)/drivers/nsc/panel)
+InstallDriverSDKNonExecFile(panel/readme.txt,$(DRIVERSDKDIR)/drivers/nsc/panel)
+
+InstallDriverSDKObjectModule(nsc,$(DRIVERSDKMODULEDIR),drivers)
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/durango.c b/xc/programs/Xserver/hw/xfree86/drivers/nsc/durango.c
index 630fd74cd..c054ed515 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/durango.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/durango.c
@@ -1,6 +1,8 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/durango.c,v 1.1 2002/10/11 14:32:59 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/durango.c,v 1.5 2003/01/24 17:16:52 tsi Exp $ */
 /*
  * $Workfile: durango.c $
+ * $Revision: 1.2.2.1 $
+ * $Author: ldelgass $
  *
  * This is the main file used to add Durango graphics support to a software 
  * project.  The main reason to have a single file include the other files
@@ -13,7 +15,9 @@
  * once when a software project starts, and then maintained as necessary.  
  * It should not be recopied with new versions of Durango unless the 
  * developer is willing to tune the file again for the specific project.
- *
+ */
+
+/*
  * NSC_LIC_ALTERNATIVE_PREAMBLE
  *
  * Revision 1.0
@@ -138,7 +142,6 @@
  *
  * END_NSC_LIC_GPL */
 
-
 /* COMPILER OPTIONS
  * These compiler options specify how the Durango routines are compiled 
  * for the different hardware platforms.  For best performance, a driver 
@@ -154,42 +157,42 @@
 #define GFX_DISPLAY_GU1				1	/* 1st generation display controller */
 #define GFX_DISPLAY_GU2				1	/* 2nd generation display controller */
 
-#define GFX_INIT_DYNAMIC            1   /* runtime selection */
-#define GFX_INIT_GU1                1   /* Geode family      */
-#define GFX_INIT_GU2                1   /* Redcloud          */
+#define GFX_INIT_DYNAMIC            1	/* runtime selection */
+#define GFX_INIT_GU1                1	/* Geode family      */
+#define GFX_INIT_GU2                1	/* Redcloud          */
 
-#define GFX_MSR_DYNAMIC             1   /* runtime selection */
-#define GFX_MSR_REDCLOUD            1   /* Redcloud          */
+#define GFX_MSR_DYNAMIC             1	/* runtime selection */
+#define GFX_MSR_REDCLOUD            1	/* Redcloud          */
 
-#define GFX_2DACCEL_DYNAMIC			1	/* runtime selection */			
+#define GFX_2DACCEL_DYNAMIC			1	/* runtime selection */
 #define GFX_2DACCEL_GU1				1	/* 1st generation 2D accelerator */
-#define GFX_2DACCEL_GU2				1   /* 2nd generation 2D accelerator */
+#define GFX_2DACCEL_GU2				1	/* 2nd generation 2D accelerator */
 
 #define GFX_VIDEO_DYNAMIC			1	/* runtime selection */
-#define GFX_VIDEO_CS5530			1   /* support for CS5530 */
-#define GFX_VIDEO_SC1200			1   /* support for SC1200 */
-#define GFX_VIDEO_REDCLOUD          1   /* support for Redcloud */
+#define GFX_VIDEO_CS5530			1	/* support for CS5530 */
+#define GFX_VIDEO_SC1200			1	/* support for SC1200 */
+#define GFX_VIDEO_REDCLOUD          1	/* support for Redcloud */
 
 #define GFX_VIP_DYNAMIC				1	/* runtime selection */
-#define GFX_VIP_SC1200				1   /* support for SC1200 */
+#define GFX_VIP_SC1200				1	/* support for SC1200 */
 
 #define GFX_DECODER_DYNAMIC			1	/* runtime selection */
 #define GFX_DECODER_SAA7114			1	/* Philips SAA7114 decoder */
 
 #define GFX_TV_DYNAMIC				1	/* runtime selection */
-#define GFX_TV_FS451				1   /* Focus Enhancements FS450 */
-#define GFX_TV_SC1200				1   /* SC1200 integrated TV encoder */
+#define GFX_TV_FS451				0	/* Focus Enhancements FS450 */
+#define GFX_TV_SC1200				1	/* SC1200 integrated TV encoder */
 
 #define GFX_I2C_DYNAMIC				1	/* runtime selection */
-#define GFX_I2C_ACCESS				1   /* support for ACCESS.BUS */
-#define GFX_I2C_GPIO				1   /* support for CS5530 GPIOs */
+#define GFX_I2C_ACCESS				1	/* support for ACCESS.BUS */
+#define GFX_I2C_GPIO				1	/* support for CS5530 GPIOs */
 
 #define GFX_VGA_DYNAMIC				1	/* runtime selection */
-#define GFX_VGA_GU1					1   /* 1st generation graphics unit */
+#define GFX_VGA_GU1					1	/* 1st generation graphics unit */
 
-#define FB4MB						1   /* Set to use 4Mb video ram for Pyramid */
+#define FB4MB						1	/* Set to use 4Mb video ram for Pyramid */
 
-#define GFX_NO_IO_IN_WAIT_MACROS    0   /* Set to remove I/O accesses in GP bit testing */
+#define GFX_NO_IO_IN_WAIT_MACROS    1	/* Set to remove I/O accesses in GP bit testing */
 
 /* ROUTINES TO READ VALUES
  * These are routines used by Darwin or other diagnostics to read the 
@@ -198,6 +201,12 @@
  */
 #define GFX_READ_ROUTINES			1	/* add routines to read values */
 
+/* HEADER FILE FOR DURANGO ROUTINE DEFINITIONS
+ * Needed since some of the Durango routines call other Durango routines.
+ * Also defines the size of chipset array (GFX_CSPTR_SIZE).
+ */
+#include "gfx_rtns.h"			/* routine definitions */
+
 /* VARIABLES USED FOR RUNTIME SELECTION
  * If part of the graphics subsystem is declared as dynamic, then the 
  * following variables are used to specify which platform has been detected.
@@ -245,12 +254,6 @@ int gfx_i2c_type = 0;
 int gfx_vga_type = 0;
 #endif
 
-/* HEADER FILE FOR DURANGO ROUTINE DEFINITIONS
- * Needed since some of the Durango routines call other Durango routines.
- * Also defines the size of chipset array (GFX_CSPTR_SIZE).
- */
-#include "gfx_rtns.h"		/* routine definitions */
-
 /* DEFINE POINTERS TO MEMORY MAPPED REGIONS
  * These pointers are used by the Durango routines to access the hardware. 
  * The variables must be set by the project's initialization code after
@@ -269,25 +272,25 @@ int gfx_vga_type = 0;
 /*       the WRITE_REG* macros are modified to subtract 0x8000 from  */
 /*       the offset.                                                 */
 
-unsigned char *gfx_virt_regptr = (unsigned char *) 0x40000000;
-unsigned char *gfx_virt_fbptr  = (unsigned char *) 0x40800000;
-unsigned char *gfx_virt_vidptr = (unsigned char *) 0x40010000;
-unsigned char *gfx_virt_vipptr = (unsigned char *) 0x40015000;
-unsigned char *gfx_virt_spptr  = (unsigned char *) 0x40000000;
-unsigned char *gfx_virt_gpptr  = (unsigned char *) 0x40000000;
+unsigned char *gfx_virt_regptr = (unsigned char *)0x40000000;
+unsigned char *gfx_virt_fbptr = (unsigned char *)0x40800000;
+unsigned char *gfx_virt_vidptr = (unsigned char *)0x40010000;
+unsigned char *gfx_virt_vipptr = (unsigned char *)0x40015000;
+unsigned char *gfx_virt_spptr = (unsigned char *)0x40000000;
+unsigned char *gfx_virt_gpptr = (unsigned char *)0x40000000;
 
 /* DEFINE PHYSICAL ADDRESSES */
 
-unsigned char *gfx_phys_regptr = (unsigned char *) 0x40000000;
-unsigned char *gfx_phys_fbptr  = (unsigned char *) 0x40800000;
-unsigned char *gfx_phys_vidptr = (unsigned char *) 0x40010000;
-unsigned char *gfx_phys_vipptr = (unsigned char *) 0x40015000;
+unsigned char *gfx_phys_regptr = (unsigned char *)0x40000000;
+unsigned char *gfx_phys_fbptr = (unsigned char *)0x40800000;
+unsigned char *gfx_phys_vidptr = (unsigned char *)0x40010000;
+unsigned char *gfx_phys_vipptr = (unsigned char *)0x40015000;
 
 /* HEADER FILE FOR GRAPHICS REGISTER DEFINITIONS 
  * This contains only constant definitions, so it should be able to be 
  * included in any software project as is.
  */
-#include "gfx_regs.h"		/* graphics register definitions */
+#include "gfx_regs.h"			/* graphics register definitions */
 
 /* HEADER FILE FOR REGISTER ACCESS MACROS
  * This file contains the definitions of the WRITE_REG32 and similar macros
@@ -296,245 +299,365 @@ unsigned char *gfx_phys_vipptr = (unsigned char *) 0x40015000;
  * the case, or if there are special requirements, then this header file 
  * should not be included and the project must define the macros itself.
  * (A project may define WRITE_REG32 to call a routine, for example).
- */	
-#include "gfx_defs.h"		/* register access macros */
+ */
+#include "gfx_defs.h"			/* register access macros */
 
 /* IO MACROS AND ROUTINES
  * These macros must be defined before the initialization or I2C 
  * routines will work properly. 
  */
 
-#if defined(OS_WIN32)	/* For Windows */
+#if defined(OS_WIN32)			/* For Windows */
 
 /* VSA II CALL */
 
-void gfx_msr_asm_read (unsigned short msrReg, unsigned long msrAddr, unsigned long *ptrHigh, unsigned long *ptrLow)
+void
+gfx_msr_asm_read(unsigned short msrReg, unsigned long msrAddr,
+		 unsigned long *ptrHigh, unsigned long *ptrLow)
 {
-	unsigned long temp1, temp2;
-
-	_asm {
-		mov     dx, 0x0AC1C
-		mov     eax, 0x0FC530007
-		out     dx, eax
-
-		add     dl, 2
-		mov     ecx, msrAddr
-		mov		cx, msrReg
-		in      ax, dx
+   unsigned long temp1, temp2;
+
+   _asm {
+      mov dx, 0x0AC1C
+      mov eax, 0x0FC530007
+      out dx, eax 
+      add dl, 2 
+      mov ecx, msrAddr 
+      mov cx, msrReg 
+      in ax, dx;
+      ;EDX:EAX will contain MSR contents.
+      mov temp1, edx 
+      mov temp2, eax
+   }
+
+   *ptrHigh = temp1;
+   *ptrLow = temp2;
+}
 
-		; EDX:EAX will contain MSR contents.
+void
+gfx_msr_asm_write(unsigned short msrReg, unsigned long msrAddr,
+		  unsigned long *ptrHigh, unsigned long *ptrLow)
+{
+   unsigned long temp1 = *ptrHigh;
+   unsigned long temp2 = *ptrLow;
+
+   _asm {
+      mov dx, 0x0AC1C
+      mov eax, 0x0FC530007 
+      out dx, eax i
+      add dl, 2 
+      ;ECX contains msrAddr | msrReg 
+      mov ecx, msrAddr
+      mov cx, msrReg
+      ;<OR_mask_hi > 
+      mov ebx, temp1
+
+      ;<OR_mask_hi > 
+      mov eax, temp2
+      ;<AND_mask_hi > 
+      mov esi, 0
+      ;<AND_mask_lo > 
+      mov edi, 0
+      ;MSR is written at this point
+      out dx, ax
+   }
+}
 
-		mov		temp1, edx
-		mov     temp2, eax
-	}
+unsigned char
+gfx_inb(unsigned short port)
+{
+   unsigned char data;
+
+   _asm {
+      pushf 
+      mov dx, port 
+      in al, dx 
+      mov data, al 
+      popf
+   }
+   return (data);
+}
 
-	*ptrHigh = temp1;
-	*ptrLow  = temp2;
+unsigned short
+gfx_inw(unsigned short port)
+{
+   unsigned short data;
+
+   _asm {
+      pushf 
+      mov dx, port 
+      in ax, dx 
+      mov data, ax 
+      popf
+   }
+   return (data);
 }
 
-void gfx_msr_asm_write (unsigned short msrReg, unsigned long msrAddr, unsigned long *ptrHigh, unsigned long *ptrLow)
+unsigned long
+gfx_ind(unsigned short port)
 {
-	unsigned long temp1 = *ptrHigh;
-	unsigned long temp2 = *ptrLow;
-
-	_asm {
-
-		mov     dx, 0x0AC1C
-		mov     eax, 0x0FC530007
-		out     dx, eax
-    
-		add     dl, 2
-		mov     ecx, msrAddr			; ECX contains msrAddr | msrReg
-		mov		cx, msrReg				;
-	    mov     ebx, temp1				; <OR_mask_hi>
-	    mov     eax, temp2				; <OR_mask_hi>
-
-	    mov     esi, 0					; <AND_mask_hi>
-	    mov     edi, 0					; <AND_mask_lo>
-	    out     dx, ax	
-
-		; MSR is written at this point
-	}
+   unsigned long data;
+
+   _asm {
+      pushf 
+      mov dx, port 
+      in eax, dx 
+      mov data, eax 
+      popf
+   }
+   return (data);
 }
 
-unsigned char gfx_inb(unsigned short port)
+void
+gfx_outb(unsigned short port, unsigned char data)
 {
-	unsigned char data;
-	_asm {
-		pushf
-		mov		dx, port
-		in		al, dx
-		mov		data, al
-		popf
-	}
-	return(data);
+   _asm {
+      pushf 
+      mov al, data 
+      mov dx, port 
+      out dx, al 
+      popf
+   }
 }
 
-unsigned short gfx_inw(unsigned short port)
+void
+gfx_outw(unsigned short port, unsigned short data)
 {
-	unsigned short data;
-	_asm {
-		pushf
-		mov		dx, port
-		in		ax, dx
-		mov		data, ax
-		popf
-	}
-	return(data);
+   _asm {
+      pushf 
+      mov ax, data 
+      mov dx, port 
+      out dx, ax 
+      popf
+   }
 }
 
-unsigned long gfx_ind(unsigned short port)
+void
+gfx_outd(unsigned short port, unsigned long data)
 {
-	unsigned long data;
-	_asm {
-		pushf
-		mov		dx, port
-		in		eax, dx
-		mov		data, eax
-		popf
-	}
-	return(data);
+   _asm {
+      pushf 
+      mov eax, data 
+      mov dx, port 
+      out dx, eax 
+      popf
+   }
 }
 
-void gfx_outb(unsigned short port, unsigned char data)
+#elif defined(OS_VXWORKS) || defined (OS_LINUX)	/* VxWorks and Linux */
+
+extern unsigned long nsc_asm_msr_vsa_rd(unsigned long, unsigned long *,
+					unsigned long *);
+extern unsigned long nsc_asm_msr_vsa_wr(unsigned long, unsigned long,
+					unsigned long);
+
+void
+gfx_msr_asm_read(unsigned short msrReg, unsigned long msrAddr,
+		 unsigned long *ptrHigh, unsigned long *ptrLow)
 {
-	_asm {
-		pushf
-		mov		al, data
-		mov		dx, port
-		out		dx, al
-		popf
-	}
+   unsigned long addr, val1, val2;
+
+   addr = msrAddr | (unsigned long)msrReg;
+   nsc_asm_msr_vsa_rd(addr, &val2, &val1);
+   *ptrHigh = val2;
+   *ptrLow = val1;
 }
 
-void gfx_outw(unsigned short port, unsigned short data)
+void
+gfx_msr_asm_write(unsigned short msrReg, unsigned long msrAddr,
+		  unsigned long *ptrHigh, unsigned long *ptrLow)
 {
-	_asm {
-		pushf
-		mov		ax, data
-		mov		dx, port
-		out		dx, ax
-		popf
-	}
+   unsigned long addr, val1, val2;
+
+   val2 = *ptrHigh;
+   val1 = *ptrLow;
+   addr = (msrAddr & 0xFFFF0000) | (unsigned long)msrReg;
+   nsc_asm_msr_vsa_wr(addr, val2, val1);
 }
 
-void gfx_outd(unsigned short port, unsigned long data)
+unsigned char
+gfx_inb(unsigned short port)
 {
-	_asm {
-		pushf
-		mov		eax, data
-		mov		dx, port
-		out		dx, eax
-		popf
-	}
+   unsigned char value;
+   __asm__ volatile ("inb %1,%0":"=a" (value):"d"(port));
+
+   return value;
 }
 
-#elif defined(OS_VXWORKS) || defined (OS_LINUX) /* VxWorks and Linux */
+unsigned short
+gfx_inw(unsigned short port)
+{
+   unsigned short value;
+   __asm__ volatile ("in %1,%0":"=a" (value):"d"(port));
 
-#if defined(OS_LINUX)
-#include "asm/msr.h"
-#endif
+   return value;
+}
 
-void gfx_msr_asm_read (unsigned short msrReg, unsigned long msrAddr, unsigned long *ptrHigh, unsigned long *ptrLow)
+unsigned long
+gfx_ind(unsigned short port)
 {
-	unsigned long addr, val1, val2;
+   unsigned long value;
+   __asm__ volatile ("inl %1,%0":"=a" (value):"d"(port));
 
-	addr = msrAddr | (unsigned long)msrReg;
-	rdmsr(addr, val1, val2);
+   return value;
+}
 
-	*ptrHigh = val2;
-	*ptrLow  = val1;
+void
+gfx_outb(unsigned short port, unsigned char data)
+{
+   __asm__ volatile ("outb %0,%1"::"a" (data), "d"(port));
 }
 
-void gfx_msr_asm_write (unsigned short msrReg, unsigned long msrAddr, unsigned long *ptrHigh, unsigned long *ptrLow)
+void
+gfx_outw(unsigned short port, unsigned short data)
 {
-	unsigned long addr, val1, val2;
+   __asm__ volatile ("out %0,%1"::"a" (data), "d"(port));
+}
 
-	val2 = *ptrHigh;
-	val1 = *ptrLow;
+void
+gfx_outd(unsigned short port, unsigned long data)
+{
+   __asm__ volatile ("outl %0,%1"::"a" (data), "d"(port));
+}
 
-	addr = (msrAddr & 0xFFFF0000) | (unsigned long)msrReg;
-	wrmsr(addr, val1, val2);
+#elif defined(XFree86Server)
+
+#include <xf86_ansic.h>
+#include <compiler.h>
+#define INB(port) inb(port)
+#define INW(port) inw(port)
+#define IND(port) inl(port)
+#define OUTB(port,data) outb(port, data)
+#define OUTW(port,data) outw(port, data)
+#define OUTD(port,data) outl(port, data)
+
+unsigned char gfx_inb(unsigned short port);
+unsigned short gfx_inw(unsigned short port);
+unsigned long gfx_ind(unsigned short port);
+void gfx_outb(unsigned short port, unsigned char data);
+void gfx_outw(unsigned short port, unsigned short data);
+void gfx_outd(unsigned short port, unsigned long data);
+
+unsigned char
+gfx_inb(unsigned short port)
+{
+   return inb(port);
 }
 
-unsigned char gfx_inb(unsigned short port)
+unsigned short
+gfx_inw(unsigned short port)
 {
-	unsigned char value;
-    __asm__ volatile ("inb %1,%0" : "=a" (value) : "d" (port));
-    return value;
+   return inw(port);
 }
 
-unsigned short gfx_inw(unsigned short port)
+unsigned long
+gfx_ind(unsigned short port)
 {
-	unsigned short value;
-    __asm__ volatile ("in %1,%0" : "=a" (value) : "d" (port));
-    return value;
+   return inl(port);
 }
 
-unsigned long gfx_ind(unsigned short port)
+void
+gfx_outb(unsigned short port, unsigned char data)
 {
-	unsigned long value;
-    __asm__ volatile ("inl %1,%0" : "=a" (value) : "d" (port));
-    return value;
+   outb(port, data);
 }
 
-void gfx_outb(unsigned short port, unsigned char data)
+void
+gfx_outw(unsigned short port, unsigned short data)
 {
-	__asm__ volatile ("outb %0,%1" : : "a" (data),"d" (port));
+   outw(port, data);
 }
 
-void gfx_outw(unsigned short port, unsigned short data)
+void
+gfx_outd(unsigned short port, unsigned long data)
 {
-	__asm__ volatile ("out %0,%1" : : "a" (data),"d" (port));
+   outl(port, data);
 }
 
-void gfx_outd(unsigned short port, unsigned long data)
+#ifdef __i386__
+extern unsigned long nsc_asm_msr_vsa_rd(unsigned long, unsigned long *,
+					unsigned long *);
+extern unsigned long nsc_asm_msr_vsa_wr(unsigned long, unsigned long,
+					unsigned long);
+#endif
+
+void
+gfx_msr_asm_read(unsigned short msrReg, unsigned long msrAddr,
+		 unsigned long *ptrHigh, unsigned long *ptrLow)
 {
-	__asm__ volatile ("outl %0,%1" : : "a" (data),"d" (port));
+#ifdef __i386__
+   unsigned long addr, val1, val2;
+
+   addr = msrAddr | (unsigned long)msrReg;
+   nsc_asm_msr_vsa_rd(addr, &val2, &val1);
+   *ptrHigh = val2;
+   *ptrLow = val1;
+#endif
 }
 
+void
+gfx_msr_asm_write(unsigned short msrReg, unsigned long msrAddr,
+		  unsigned long *ptrHigh, unsigned long *ptrLow)
+{
+#ifdef __i386__
+   unsigned long addr, val1, val2;
+
+   val2 = *ptrHigh;
+   val1 = *ptrLow;
+   addr = (msrAddr & 0xFFFF0000) | (unsigned long)msrReg;
+   nsc_asm_msr_vsa_wr(addr, val2, val1);
+#endif
+}
 #else /* else nothing */
 
-unsigned char gfx_inb(unsigned short port)
+unsigned char
+gfx_inb(unsigned short port)
 {
-	/* ADD OS SPECIFIC IMPLEMENTATION */
-	return(0);
+   /* ADD OS SPECIFIC IMPLEMENTATION */
+   return (0);
 }
 
-unsigned short gfx_inw(unsigned short port)
+unsigned short
+gfx_inw(unsigned short port)
 {
-	/* ADD OS SPECIFIC IMPLEMENTATION */
-	return(0);
+   /* ADD OS SPECIFIC IMPLEMENTATION */
+   return (0);
 }
 
-unsigned long gfx_ind(unsigned short port)
+unsigned long
+gfx_ind(unsigned short port)
 {
-	/* ADD OS SPECIFIC IMPLEMENTATION */
-	return(0);
+   /* ADD OS SPECIFIC IMPLEMENTATION */
+   return (0);
 }
 
-void gfx_outb(unsigned short port, unsigned char data)
+void
+gfx_outb(unsigned short port, unsigned char data)
 {
-	/* ADD OS SPECIFIC IMPLEMENTATION */
+   /* ADD OS SPECIFIC IMPLEMENTATION */
 }
 
-void gfx_outw(unsigned short port, unsigned short data)
+void
+gfx_outw(unsigned short port, unsigned short data)
 {
-	/* ADD OS SPECIFIC IMPLEMENTATION */
+   /* ADD OS SPECIFIC IMPLEMENTATION */
 }
 
-void gfx_outd(unsigned short port, unsigned long data)
+void
+gfx_outd(unsigned short port, unsigned long data)
 {
-	/* ADD OS SPECIFIC IMPLEMENTATION */
+   /* ADD OS SPECIFIC IMPLEMENTATION */
 }
 #endif
 
+#ifndef XFree86Server
 #define INB(port) gfx_inb(port)
 #define INW(port) gfx_inw(port)
 #define IND(port) gfx_ind(port)
 #define OUTB(port, data) gfx_outb(port, data)
 #define OUTW(port, data) gfx_outw(port, data)
 #define OUTD(port, data) gfx_outd(port, data)
+#endif
 
 /* INITIALIZATION ROUTINES 
  * These routines are used during the initialization of the driver to 
@@ -544,7 +667,7 @@ void gfx_outd(unsigned short port, unsigned long data)
  * properly.
  */
 
-#include "gfx_init.c"    
+#include "gfx_init.c"
 
 /* INCLUDE MSR ACCESS ROUTINES */
 
@@ -555,42 +678,45 @@ void gfx_outd(unsigned short port, unsigned long data)
  * the project does not use graphics acceleration (direct frame buffer
  * access only), then this file does not need to be included. 
  */
-#include "gfx_rndr.c"		/* graphics engine routines */
+#include "gfx_rndr.c"			/* graphics engine routines */
 
 /* INCLUDE DISPLAY CONTROLLER ROUTINES 
  * These routines are used if the display mode is set directly.  If the 
  * project uses VGA registers to set a display mode, then these files
  * do not need to be included.
  */
-#include "gfx_mode.h"		/* display mode tables */
-#include "gfx_disp.c"		/* display controller routines */
+#include "gfx_mode.h"			/* display mode tables */
+#include "gfx_disp.c"			/* display controller routines */
 
 /* INCLUDE VIDEO OVERLAY ROUTINES
  * These routines control the video overlay hardware. 
  */
-#include "gfx_vid.c"		/* video overlay routines */
+#include "gfx_vid.c"			/* video overlay routines */
 
 /* VIDEO PORT AND VIDEO DECODER ROUTINES
  * These routines rely on the I2C routines.
  */
-#include "gfx_vip.c"		/* video port routines */
-#include "gfx_dcdr.c"		/* video decoder routines */
+#include "gfx_vip.c"			/* video port routines */
+#include "gfx_dcdr.c"			/* video decoder routines */
 
 /* I2C BUS ACCESS ROUTINES
  * These routines are used by the video decoder and possibly an 
  * external TV encoer. 
  */
-#include "gfx_i2c.c"		/* I2C bus access routines */
+#include "gfx_i2c.c"			/* I2C bus access routines */
 
 /* TV ENCODER ROUTINES
  * This file does not need to be included if the system does not
  * support TV output.
  */
-#include "gfx_tv.c"		    /* TV encoder routines */
+#include "gfx_tv.c"			/* TV encoder routines */
 
 /* VGA ROUTINES
  * This file is used if setting display modes using VGA registers.
  */
-#include "gfx_vga.c"		/* VGA routines */
+#include "gfx_vga.c"			/* VGA routines */
+
+/* Hardware Register reading functions */
+#include "nsc_regacc.c"
 
 /* END OF FILE */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/disp_gu1.c b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/disp_gu1.c
new file mode 100644
index 000000000..b17726410
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/disp_gu1.c
@@ -0,0 +1,2835 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/disp_gu1.c,v 1.4 2003/02/06 17:46:02 alanh Exp $ */
+/*
+ * $Workfile: disp_gu1.c $
+ *
+ * This file contains routines for the first generation display controller.  
+ *
+ * NSC_LIC_ALTERNATIVE_PREAMBLE
+ *
+ * Revision 1.0
+ *
+ * National Semiconductor Alternative GPL-BSD License
+ *
+ * National Semiconductor Corporation licenses this software 
+ * ("Software"):
+ *
+ *      Durango
+ *
+ * under one of the two following licenses, depending on how the 
+ * Software is received by the Licensee.
+ * 
+ * If this Software is received as part of the Linux Framebuffer or
+ * other GPL licensed software, then the GPL license designated 
+ * NSC_LIC_GPL applies to this Software; in all other circumstances 
+ * then the BSD-style license designated NSC_LIC_BSD shall apply.
+ *
+ * END_NSC_LIC_ALTERNATIVE_PREAMBLE */
+
+/* NSC_LIC_BSD
+ *
+ * National Semiconductor Corporation Open Source License for Durango
+ *
+ * (BSD License with Export Notice)
+ *
+ * Copyright (c) 1999-2001
+ * National Semiconductor Corporation.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met: 
+ *
+ *   * Redistributions of source code must retain the above copyright 
+ *     notice, this list of conditions and the following disclaimer. 
+ *
+ *   * Redistributions in binary form must reproduce the above 
+ *     copyright notice, this list of conditions and the following 
+ *     disclaimer in the documentation and/or other materials provided 
+ *     with the distribution. 
+ *
+ *   * Neither the name of the National Semiconductor Corporation nor 
+ *     the names of its contributors may be used to endorse or promote 
+ *     products derived from this software without specific prior 
+ *     written permission. 
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+ * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE,
+ * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE.
+ *
+ * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
+ * YOUR JURISDICTION. It is licensee's responsibility to comply with 
+ * any export regulations applicable in licensee's jurisdiction. Under 
+ * CURRENT (2001) U.S. export regulations this software 
+ * is eligible for export from the U.S. and can be downloaded by or 
+ * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
+ * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
+ * Syria, Sudan, Afghanistan and any other country to which the U.S. 
+ * has embargoed goods and services. 
+ *
+ * END_NSC_LIC_BSD */
+
+/* NSC_LIC_GPL
+ *
+ * National Semiconductor Corporation Gnu General Public License for Durango
+ *
+ * (GPL License with Export Notice)
+ *
+ * Copyright (c) 1999-2001
+ * National Semiconductor Corporation.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted under the terms of the GNU General 
+ * Public License as published by the Free Software Foundation; either 
+ * version 2 of the License, or (at your option) any later version  
+ *
+ * In addition to the terms of the GNU General Public License, neither 
+ * the name of the National Semiconductor Corporation nor the names of 
+ * its contributors may be used to endorse or promote products derived 
+ * from this software without specific prior written permission. 
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+ * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, 
+ * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE. See the GNU General Public License for more details. 
+ *
+ * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
+ * YOUR JURISDICTION. It is licensee's responsibility to comply with 
+ * any export regulations applicable in licensee's jurisdiction. Under 
+ * CURRENT (2001) U.S. export regulations this software 
+ * is eligible for export from the U.S. and can be downloaded by or 
+ * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
+ * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
+ * Syria, Sudan, Afghanistan and any other country to which the U.S. 
+ * has embargoed goods and services. 
+ *
+ * You should have received a copy of the GNU General Public License 
+ * along with this file; if not, write to the Free Software Foundation, 
+ * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 
+ *
+ * END_NSC_LIC_GPL */
+
+void gu1_enable_compression(void);	/* private routine definition */
+void gu1_disable_compression(void);	/* private routine definition */
+void gfx_reset_video(void);		/* private routine definition */
+int gfx_set_display_control(int sync_polarities);	/* private routine definition */
+void gu1_delay_approximate(unsigned long milliseconds);
+void gu1_delay_precise(unsigned long milliseconds);
+int gu1_set_display_bpp(unsigned short bpp);
+int gu1_is_display_mode_supported(int xres, int yres, int bpp, int hz);
+int gu1_set_display_mode(int xres, int yres, int bpp, int hz);
+int gu1_set_display_timings(unsigned short bpp, unsigned short flags,
+			    unsigned short hactive,
+			    unsigned short hblank_start,
+			    unsigned short hsync_start,
+			    unsigned short hsync_end,
+			    unsigned short hblank_end, unsigned short htotal,
+			    unsigned short vactive,
+			    unsigned short vblank_start,
+			    unsigned short vsync_start,
+			    unsigned short vsync_end,
+			    unsigned short vblank_end, unsigned short vtotal,
+			    unsigned long frequency);
+int gu1_set_vtotal(unsigned short vtotal);
+void gu1_set_display_pitch(unsigned short pitch);
+void gu1_set_display_offset(unsigned long offset);
+int gu1_set_display_palette_entry(unsigned long index, unsigned long palette);
+int gu1_set_display_palette(unsigned long *palette);
+void gu1_video_shutdown(void);
+void gu1_set_clock_frequency(unsigned long frequency);
+int gu1_set_crt_enable(int enable);
+void gu1_set_cursor_enable(int enable);
+void gu1_set_cursor_colors(unsigned long bkcolor, unsigned long fgcolor);
+void gu1_set_cursor_position(unsigned long memoffset,
+			     unsigned short xpos, unsigned short ypos,
+			     unsigned short xhotspot,
+			     unsigned short yhotspot);
+void gu1_set_cursor_shape32(unsigned long memoffset, unsigned long *andmask,
+			    unsigned long *xormask);
+void gu1_set_cursor_shape64(unsigned long memoffset, unsigned long *andmask,
+			    unsigned long *xormask);
+void gu1_set_icon_enable(int enable);
+void gu1_set_icon_colors(unsigned long color0, unsigned long color1,
+			 unsigned long color2);
+void gu1_set_icon_position(unsigned long memoffset, unsigned short xpos);
+void gu1_set_icon_shape64(unsigned long memoffset, unsigned long *andmask,
+			  unsigned long *xormask, unsigned int lines);
+
+int gu1_set_compression_enable(int enable);
+int gu1_set_compression_offset(unsigned long offset);
+int gu1_set_compression_pitch(unsigned short pitch);
+int gu1_set_compression_size(unsigned short size);
+void gu1_set_display_priority_high(int enable);
+int gu1_test_timing_active(void);
+int gu1_test_vertical_active(void);
+int gu1_wait_vertical_blank(void);
+void gu1_delay_milliseconds(unsigned long milliseconds);
+void gu1_delay_microseconds(unsigned long microseconds);
+void gu1_enable_panning(int x, int y);
+int gu1_set_fixed_timings(int panelResX, int panelResY, unsigned short width,
+			  unsigned short height, unsigned short bpp);
+int gu1_set_panel_present(int panelResX, int panelResY, unsigned short width,
+			  unsigned short height, unsigned short bpp);
+void gu1_reset_timing_lock(void);
+
+int gu1_get_display_details(unsigned int mode, int *xres, int *yres, int *hz);
+unsigned short gu1_get_display_pitch(void);
+int gu1_get_vsa2_softvga_enable(void);
+int gu1_get_sync_polarities(void);
+unsigned long gu1_get_clock_frequency(void);
+unsigned long gu1_get_max_supported_pixel_clock(void);
+int gu1_mode_frequency_supported(int xres, int yres, int bpp,
+				 unsigned long frequency);
+int gu1_get_refreshrate_from_frequency(int xres, int yres, int bpp, int *hz,
+				       unsigned long frequency);
+int gu1_get_refreshrate_from_mode(int xres, int yres, int bpp, int *hz,
+				  unsigned long frequency);
+int gu1_get_frequency_from_refreshrate(int xres, int yres, int bpp, int hz,
+				       int *frequency);
+int gu1_get_display_mode_count(void);
+int gu1_get_display_mode(int *xres, int *yres, int *bpp, int *hz);
+unsigned long gu1_get_frame_buffer_line_size(void);
+unsigned short gu1_get_hactive(void);
+unsigned short gu1_get_hblank_start(void);
+unsigned short gu1_get_hsync_start(void);
+unsigned short gu1_get_hsync_end(void);
+unsigned short gu1_get_hblank_end(void);
+unsigned short gu1_get_htotal(void);
+unsigned short gu1_get_vactive(void);
+unsigned short gu1_get_vline(void);
+unsigned short gu1_get_vblank_start(void);
+unsigned short gu1_get_vsync_start(void);
+unsigned short gu1_get_vsync_end(void);
+unsigned short gu1_get_vblank_end(void);
+unsigned short gu1_get_vtotal(void);
+unsigned short gu1_get_display_bpp(void);
+unsigned long gu1_get_display_offset(void);
+int gu1_get_display_palette_entry(unsigned long index,
+				  unsigned long *palette);
+void gu1_get_display_palette(unsigned long *palette);
+unsigned long gu1_get_cursor_enable(void);
+unsigned long gu1_get_cursor_offset(void);
+unsigned long gu1_get_cursor_position(void);
+unsigned long gu1_get_cursor_clip(void);
+unsigned long gu1_get_cursor_color(int color);
+unsigned long gu1_get_icon_enable(void);
+unsigned long gu1_get_icon_offset(void);
+unsigned long gu1_get_icon_position(void);
+unsigned long gu1_get_icon_color(int color);
+int gu1_get_compression_enable(void);
+unsigned long gu1_get_compression_offset(void);
+unsigned short gu1_get_compression_pitch(void);
+unsigned short gu1_get_compression_size(void);
+int gu1_get_display_priority_high(void);
+int gu1_get_valid_bit(int line);
+void gu1_set_display_video_enable(int enable);
+int gu1_set_specified_mode(DISPLAYMODE * pMode, int bpp);
+void gu1_set_display_video_size(unsigned short width, unsigned short height);
+void gu1_set_display_video_offset(unsigned long offset);
+unsigned long gu1_get_display_video_offset(void);
+unsigned long gu1_get_display_video_size(void);
+
+/* VIDEO BUFFER SIZE */
+
+unsigned long vid_buf_size = 0;
+int vid_enabled = 0;
+
+/*-----------------------------------------------------------------------------
+ * GU1_DELAY_APPROXIMATE (PRIVATE ROUTINE - NOT PART OF DURANGO API)
+ *
+ * Delay the requested number of milliseconds by reading a register.  This function
+ * generally takes longer than the requested time.
+ *-----------------------------------------------------------------------------*/
+void
+gu1_delay_approximate(unsigned long milliseconds)
+{
+   /* ASSUME 300 MHz, 5 CLOCKS PER READ */
+
+#	define READS_PER_MILLISECOND 60000L
+
+   unsigned long loop;
+
+   loop = milliseconds * READS_PER_MILLISECOND;
+   while (loop-- > 0) {
+      READ_REG32(DC_UNLOCK);
+   }
+}
+
+/*-----------------------------------------------------------------------------
+ * GU1_DELAY_PRECISE (PRIVATE ROUTINE - NOT PART OF DURANGO API)
+ *
+ * Delay the number of milliseconds on a more precise level, varying only by 
+ * 1/10 of a ms.  This function should only be called if an SC1200 is present.
+ *-----------------------------------------------------------------------------*/
+void
+gu1_delay_precise(unsigned long milliseconds)
+{
+#if GFX_VIDEO_SC1200
+
+#define LOOP 1000
+   unsigned long i, timer_start, timer_end, total_ticks, previous_ticks,
+	 temp_ticks;
+
+   /* Get current time */
+   timer_start = IND(SC1200_CB_BASE_ADDR + SC1200_CB_TMVALUE);
+
+   /* Calculate expected end time */
+   if (INB(SC1200_CB_BASE_ADDR + SC1200_CB_TMCNFG) & SC1200_TMCLKSEL_27MHZ)
+      total_ticks = 27000 * milliseconds;	/* timer resolution is 27 MHz */
+   else
+      total_ticks = 1000 * milliseconds;	/* timer resolution is 1 MHz */
+
+   if (total_ticks > ((unsigned long)0xffffffff - timer_start))	/* wrap-around */
+      timer_end = total_ticks - ((unsigned long)0xffffffff - timer_start);
+   else
+      timer_end = timer_start + total_ticks;
+
+   /* in case of wrap around */
+   if (timer_end < timer_start) {
+      previous_ticks = timer_start;
+      while (1) {
+	 temp_ticks = IND(SC1200_CB_BASE_ADDR + SC1200_CB_TMVALUE);
+	 if (temp_ticks < previous_ticks)
+	    break;
+	 else
+	    previous_ticks = temp_ticks;
+	 for (i = 0; i < LOOP; i++)
+	    READ_REG32(DC_UNLOCK);
+      }
+   }
+   /* now the non-wrap around part */
+   while (1) {
+      for (i = 0; i < LOOP; i++)
+	 READ_REG32(DC_UNLOCK);
+      if (IND(SC1200_CB_BASE_ADDR + SC1200_CB_TMVALUE) > timer_end)
+	 break;
+   }
+
+#endif /* GFX_VIDEO_SC1200 */
+}
+
+/*-----------------------------------------------------------------------------
+ * WARNING!!!! INACCURATE DELAY MECHANISM
+ *
+ * In an effort to keep the code self contained and operating system 
+ * independent, the delay loop just performs reads of a display controller
+ * register.  This time will vary for faster processors.  The delay can always
+ * be longer than intended, only effecting the time of the mode switch 
+ * (obviously want it to still be under a second).  Problems with the hardware
+ * only arise if the delay is not long enough.
+ *
+ * For the SC1200, the high resolution timer can be used as an accurate mechanism
+ * for keeping time. However, in order to avoid a busy loop of IO reads, the
+ * timer is polled in-between busy loops, and therefore the actual delay might
+ * be longer than the requested delay by the time of one busy loop
+ * (which on a 200 MHz system took 95 us)
+ *
+ * There are thus two delay functions which are called from the main API routine.
+ * One is meant to be more precise and should only called if an SC1200 is present.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+void
+gu1_delay_milliseconds(unsigned long milliseconds)
+#else
+void
+gfx_delay_milliseconds(unsigned long milliseconds)
+#endif
+{
+#if GFX_VIDEO_SC1200
+
+#if GFX_VIDEO_DYNAMIC
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200) {
+#endif
+      gu1_delay_precise(milliseconds);
+      return;
+#if GFX_VIDEO_DYNAMIC
+   }
+#endif
+
+#endif /* GFX_VIDEO_SC1200 */
+
+   gu1_delay_approximate(milliseconds);
+}
+
+#if GFX_DISPLAY_DYNAMIC
+void
+gu1_delay_microseconds(unsigned long microseconds)
+#else
+void
+gfx_delay_microseconds(unsigned long microseconds)
+#endif
+{
+   /* ASSUME 300 MHz, 2 CLOCKS PER INCREMENT */
+
+   unsigned long loop_count = microseconds * 150;
+
+   while (loop_count-- > 0) {
+      ;
+   }
+}
+
+/*-----------------------------------------------------------------------------
+ * GFX_VIDEO_SHUTDOWN
+ *
+ * This routine disables the display controller output.
+ *-----------------------------------------------------------------------------
+ */
+void
+gu1_video_shutdown(void)
+{
+   unsigned long unlock;
+   unsigned long gcfg, tcfg;
+
+   /* DISABLE COMPRESSION */
+
+   gu1_disable_compression();
+
+   /* ALSO DISABLE VIDEO */
+   /* Use private "reset video" routine to do all that is needed. */
+   /* SC1200, for example, also disables the alpha blending regions. */
+
+   gfx_reset_video();
+
+   /* UNLOCK THE DISPLAY CONTROLLER REGISTERS */
+
+   unlock = READ_REG32(DC_UNLOCK);
+   WRITE_REG32(DC_UNLOCK, DC_UNLOCK_VALUE);
+
+   /* READ THE CURRENT GX VALUES */
+
+   gcfg = READ_REG32(DC_GENERAL_CFG);
+   tcfg = READ_REG32(DC_TIMING_CFG);
+
+   /* BLANK THE GX DISPLAY AND DISABLE THE TIMING GENERATOR */
+
+   tcfg &= ~((unsigned long)DC_TCFG_BLKE | (unsigned long)DC_TCFG_TGEN);
+   WRITE_REG32(DC_TIMING_CFG, tcfg);
+
+   /* DELAY: WAIT FOR PENDING MEMORY REQUESTS */
+   /* This delay is used to make sure that all pending requests to the */
+   /* memory controller have completed before disabling the FIFO load. */
+
+   gfx_delay_milliseconds(1);
+
+   /* DISABLE DISPLAY FIFO LOAD AND DISABLE COMPRESSION */
+
+   gcfg &= ~(unsigned long)(DC_GCFG_DFLE | DC_GCFG_CMPE | DC_GCFG_DECE);
+   WRITE_REG32(DC_GENERAL_CFG, gcfg);
+   WRITE_REG32(DC_UNLOCK, unlock);
+   return;
+}
+
+/*-----------------------------------------------------------------------------
+ * GFX_SET_DISPLAY_BPP
+ *
+ * This routine programs the bpp in the display controller.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+int
+gu1_set_display_bpp(unsigned short bpp)
+#else
+int
+gfx_set_display_bpp(unsigned short bpp)
+#endif
+{
+   unsigned long ocfg, lock;
+
+   lock = READ_REG32(DC_UNLOCK);
+   ocfg = READ_REG32(DC_OUTPUT_CFG) & ~(DC_OCFG_8BPP | DC_OCFG_555);
+
+   /* SET DC PIXEL FORMAT */
+
+   if (bpp == 8)
+      ocfg |= DC_OCFG_8BPP;
+   else if (bpp == 15)
+      ocfg |= DC_OCFG_555;
+   else if (bpp != 16)
+      return GFX_STATUS_BAD_PARAMETER;
+
+   WRITE_REG32(DC_UNLOCK, DC_UNLOCK_VALUE);
+   WRITE_REG32(DC_OUTPUT_CFG, ocfg);
+   WRITE_REG32(DC_UNLOCK, lock);
+
+   /* SET BPP IN GRAPHICS PIPELINE */
+
+   gfx_set_bpp(bpp);
+
+   return 0;
+}
+
+/*-----------------------------------------------------------------------------
+ * GFX_SET_SPECIFIED_MODE
+ * This routine uses the parameters in the specified display mode structure
+ * to program the display controller hardware.  
+ *-----------------------------------------------------------------------------
+ */
+int
+gu1_set_specified_mode(DISPLAYMODE * pMode, int bpp)
+{
+   unsigned long unlock, value;
+   unsigned long gcfg, tcfg, ocfg;
+   unsigned long size, pitch;
+   unsigned long vid_buffer_size;
+   unsigned long hactive, vactive;
+
+   gbpp = bpp;
+
+   /* CHECK WHETHER TIMING CHANGE IS ALLOWED */
+   /* Flag used for locking also overrides timing change restriction */
+
+   if (gfx_timing_lock && !(pMode->flags & GFX_MODE_LOCK_TIMING))
+      return GFX_STATUS_ERROR;
+
+   /* SET GLOBAL FLAG */
+
+   if (pMode->flags & GFX_MODE_LOCK_TIMING)
+      gfx_timing_lock = 1;
+
+   /* DISABLE COMPRESSION */
+
+   gu1_disable_compression();
+
+   /* ALSO DISABLE VIDEO */
+   /* Use private "reset video" routine to do all that is needed. */
+   /* SC1200, for example, also disables the alpha blending regions. */
+
+   gfx_reset_video();
+
+   /* UNLOCK THE DISPLAY CONTROLLER REGISTERS */
+
+   unlock = READ_REG32(DC_UNLOCK);
+   WRITE_REG32(DC_UNLOCK, DC_UNLOCK_VALUE);
+
+   /* READ THE CURRENT GX VALUES */
+
+   gcfg = READ_REG32(DC_GENERAL_CFG);
+   tcfg = READ_REG32(DC_TIMING_CFG);
+
+   /* BLANK THE GX DISPLAY AND DISABLE THE TIMING GENERATOR */
+
+   tcfg &= ~((unsigned long)DC_TCFG_BLKE | (unsigned long)DC_TCFG_TGEN);
+   WRITE_REG32(DC_TIMING_CFG, tcfg);
+
+   /* DELAY: WAIT FOR PENDING MEMORY REQUESTS 
+    * This delay is used to make sure that all pending requests to the 
+    * memory controller have completed before disabling the FIFO load.
+    */
+
+   gfx_delay_milliseconds(1);
+
+   /* DISABLE DISPLAY FIFO LOAD AND DISABLE COMPRESSION */
+
+   gcfg &= ~(unsigned long)(DC_GCFG_DFLE | DC_GCFG_CMPE | DC_GCFG_DECE);
+   WRITE_REG32(DC_GENERAL_CFG, gcfg);
+
+   /* CLEAR THE "DCLK_MUL" FIELD */
+
+   gcfg &= ~(unsigned long)(DC_GCFG_DDCK | DC_GCFG_DPCK | DC_GCFG_DFCK);
+   gcfg &= ~(unsigned long)DC_GCFG_DCLK_MASK;
+   WRITE_REG32(DC_GENERAL_CFG, gcfg);
+
+   /* SET THE DOT CLOCK FREQUENCY */
+   /* Mask off the divide by two bit (bit 31) */
+
+   gfx_set_clock_frequency(pMode->frequency & 0x7FFFFFFF);
+
+   /* DELAY: WAIT FOR THE PLL TO SETTLE */
+   /* This allows the dot clock frequency that was just set to settle. */
+
+   gfx_delay_milliseconds(1);
+
+   /* SET THE "DCLK_MUL" FIELD OF DC_GENERAL_CFG */
+   /* The GX hardware divides the dot clock, so 2x really means that the */
+   /* internal dot clock equals the external dot clock. */
+
+   if (pMode->frequency & 0x80000000)
+      gcfg |= 0x0040;
+   else
+      gcfg |= 0x0080;
+   WRITE_REG32(DC_GENERAL_CFG, gcfg);
+
+   /* DELAY: WAIT FOR THE ADL TO LOCK */
+   /* This allows the clock generatation within GX to settle.  This is */
+   /* needed since some of the register writes that follow require that */
+   /* clock to be present. */
+
+   /* We do a few to ensure we're synced */
+   gfx_delay_milliseconds(1);
+   gfx_delay_milliseconds(1);
+   gfx_delay_milliseconds(1);
+   gfx_delay_milliseconds(1);
+   gfx_delay_milliseconds(1);
+   gfx_delay_milliseconds(1);
+
+   /* SET THE GX DISPLAY CONTROLLER PARAMETERS */
+
+   WRITE_REG32(DC_FB_ST_OFFSET, 0);
+   WRITE_REG32(DC_CB_ST_OFFSET, 0);
+   WRITE_REG32(DC_CURS_ST_OFFSET, 0);
+
+   /* SET LINE SIZE AND PITCH */
+   /* Flat panels use the current flat panel line size to    */
+   /* calculate the pitch, but load the true line size       */
+   /* for the mode into the "Frame Buffer Line Size" field   */
+   /* of DC_BUF_SIZE.                                        */
+
+   if (PanelEnable)
+      size = ModeWidth;
+   else
+      size = pMode->hactive;
+
+   if (bpp > 8)
+      size <<= 1;
+
+   /* ONLY PYRAMID SUPPORTS 4K LINE SIZE */
+
+   if (size <= 1024) {
+      pitch = 1024;
+
+      /* SPECIAL CASE  */
+      /* Graphics acceleration in 16-bit pixel line double modes */
+      /* requires a pitch of 2048.                               */
+
+      if ((pMode->flags & GFX_MODE_LINE_DOUBLE) && bpp > 8)
+	 pitch <<= 1;
+   } else {
+      if (gfx_cpu_version == GFX_CPU_PYRAMID)
+	 pitch = (size <= 2048) ? 2048 : 4096;
+      else
+	 pitch = 2048;
+   }
+   WRITE_REG32(DC_LINE_DELTA, pitch >> 2);
+
+   if (PanelEnable) {
+      size = pMode->hactive;
+      if (bpp > 8)
+	 size <<= 1;
+   }
+
+   /* SAVE PREVIOUSLY STORED VIDEO BUFFER SIZE */
+
+   vid_buffer_size = READ_REG32(DC_BUF_SIZE) & 0x3FFF0000;
+
+   /* ADD 2 TO SIZE FOR POSSIBLE START ADDRESS ALIGNMENTS */
+
+   WRITE_REG32(DC_BUF_SIZE, ((size >> 3) + 2) | vid_buffer_size);
+
+   /* ALWAYS ENABLE "PANEL" DATA FROM MEDIAGX */
+   /* That is really just the 18 BPP data bus to the companion chip */
+
+   ocfg = DC_OCFG_PCKE | DC_OCFG_PDEL | DC_OCFG_PDEH;
+
+   /* SET PIXEL FORMAT */
+
+   if (bpp == 8)
+      ocfg |= DC_OCFG_8BPP;
+   else if (bpp == 15)
+      ocfg |= DC_OCFG_555;
+
+   /* ENABLE TIMING GENERATOR, SYNCS, AND FP DATA */
+
+   tcfg = DC_TCFG_FPPE | DC_TCFG_HSYE | DC_TCFG_VSYE | DC_TCFG_BLKE |
+	 DC_TCFG_TGEN;
+
+   /* SET FIFO PRIORITY, DCLK MULTIPLIER, AND FIFO ENABLE */
+   /* Default 6/5 for FIFO, 2x for DCLK multiplier. */
+
+   gcfg = (6 << DC_GCFG_DFHPEL_POS) | (5 << DC_GCFG_DFHPSL_POS) |
+	 DC_GCFG_DFLE;
+
+   /* INCREASE FIFO PRIORITY FOR LARGE MODES */
+
+   if (pMode->hactive == 1280 && pMode->vactive == 1024) {
+      if ((bpp == 8) && (pMode->flags & GFX_MODE_85HZ))
+	 gcfg = (8l << DC_GCFG_DFHPEL_POS) | (7l << DC_GCFG_DFHPSL_POS) |
+	       DC_GCFG_DFLE;
+      if ((bpp > 8) && (pMode->flags & GFX_MODE_75HZ))
+	 gcfg = (7l << DC_GCFG_DFHPEL_POS) | (6l << DC_GCFG_DFHPSL_POS) |
+	       DC_GCFG_DFLE;
+      if ((bpp > 8) && (pMode->flags & GFX_MODE_85HZ))
+	 gcfg = (9l << DC_GCFG_DFHPEL_POS) | (8l << DC_GCFG_DFHPSL_POS) |
+	       DC_GCFG_DFLE;
+   }
+
+   /* SET DOT CLOCK MULTIPLIER */
+   /* Bit 31 of frequency indicates divide frequency by two */
+
+   if (pMode->frequency & 0x80000000)
+      gcfg |= (1l << DC_GCFG_DCLK_POS);
+   else
+      gcfg |= (2l << DC_GCFG_DCLK_POS);
+
+   /* DIVIDE VIDEO CLOCK */
+   /* CPU core frequencies above 266 MHz will divide the video */
+   /* clock by 4 to ensure that we are running below 150 MHz.  */
+
+   if (gfx_cpu_frequency > 266)
+      gcfg |= DC_GCFG_VCLK_DIV;
+
+   /* SET THE PIXEL AND LINE DOUBLE BITS IF NECESSARY */
+
+   hactive = pMode->hactive;
+   vactive = pMode->vactive;
+   gfx_line_double = 0;
+   gfx_pixel_double = 0;
+
+   if (pMode->flags & GFX_MODE_LINE_DOUBLE) {
+      gcfg |= DC_GCFG_LDBL;
+      hactive <<= 1;
+
+      /* SET GLOBAL FLAG */
+
+      gfx_line_double = 1;
+   }
+
+   if (pMode->flags & GFX_MODE_PIXEL_DOUBLE) {
+      tcfg |= DC_TCFG_PXDB;
+      vactive <<= 1;
+
+      /* SET GLOBAL FLAG */
+
+      gfx_pixel_double = 1;
+   }
+
+   /* COMBINE AND SET TIMING VALUES */
+
+   value = (unsigned long)(hactive - 1) |
+	 (((unsigned long)(pMode->htotal - 1)) << 16);
+   WRITE_REG32(DC_H_TIMING_1, value);
+   value = (unsigned long)(pMode->hblankstart - 1) |
+	 (((unsigned long)(pMode->hblankend - 1)) << 16);
+   WRITE_REG32(DC_H_TIMING_2, value);
+   value = (unsigned long)(pMode->hsyncstart - 1) |
+	 (((unsigned long)(pMode->hsyncend - 1)) << 16);
+   WRITE_REG32(DC_H_TIMING_3, value);
+   WRITE_REG32(DC_FP_H_TIMING, value);
+   value = (unsigned long)(vactive - 1) |
+	 (((unsigned long)(pMode->vtotal - 1)) << 16);
+   WRITE_REG32(DC_V_TIMING_1, value);
+   value = (unsigned long)(pMode->vblankstart - 1) |
+	 (((unsigned long)(pMode->vblankend - 1)) << 16);
+   WRITE_REG32(DC_V_TIMING_2, value);
+   value = (unsigned long)(pMode->vsyncstart - 1) |
+	 (((unsigned long)(pMode->vsyncend - 1)) << 16);
+   WRITE_REG32(DC_V_TIMING_3, value);
+   value = (unsigned long)(pMode->vsyncstart - 2) |
+	 (((unsigned long)(pMode->vsyncend - 2)) << 16);
+   WRITE_REG32(DC_FP_V_TIMING, value);
+
+   WRITE_REG32(DC_OUTPUT_CFG, ocfg);
+   WRITE_REG32(DC_TIMING_CFG, tcfg);
+   gfx_delay_milliseconds(1);		/* delay after TIMING_CFG */
+   WRITE_REG32(DC_GENERAL_CFG, gcfg);
+
+   /* ENABLE FLAT PANEL CENTERING */
+   /* For 640x480 modes displayed with the 9211 within a 800x600 */
+   /* flat panel display, turn on flat panel centering.          */
+
+   if (PanelEnable) {
+      if (ModeWidth < PanelWidth) {
+	 tcfg = READ_REG32(DC_TIMING_CFG);
+	 tcfg = tcfg | DC_TCFG_FCEN;
+	 WRITE_REG32(DC_TIMING_CFG, tcfg);
+	 gfx_delay_milliseconds(1);	/* delay after TIMING_CFG */
+      }
+   }
+
+   /* CONFIGURE DISPLAY OUTPUT FROM VIDEO PROCESSOR */
+
+   gfx_set_display_control(((pMode->flags & GFX_MODE_NEG_HSYNC) ? 1 : 0) |
+			   ((pMode->flags & GFX_MODE_NEG_VSYNC) ? 2 : 0));
+
+   /* RESTORE VALUE OF DC_UNLOCK */
+
+   WRITE_REG32(DC_UNLOCK, unlock);
+
+   /* ALSO WRITE GP_BLIT_STATUS FOR PITCH AND 8/18 BPP */
+   /* Remember, only Pyramid supports 4K line pitch    */
+
+   value = 0;
+   if (bpp > 8)
+      value |= BC_16BPP;
+   if ((gfx_cpu_version == GFX_CPU_PYRAMID) && (pitch > 2048))
+      value |= BC_FB_WIDTH_4096;
+   else if (pitch > 1024)
+      value |= BC_FB_WIDTH_2048;
+   WRITE_REG16(GP_BLIT_STATUS, (unsigned short)value);
+
+   return GFX_STATUS_OK;
+
+}					/* end gfx_set_specified_mode() */
+
+/*----------------------------------------------------------------------------
+ * GFX_IS_DISPLAY_MODE_SUPPORTED
+ *
+ * This routine sets the specified display mode.
+ *
+ * Returns the index of the mode if successful and mode returned, -1 if the mode 
+ * could not be found.
+ *----------------------------------------------------------------------------  
+ */
+#if GFX_DISPLAY_DYNAMIC
+int
+gu1_is_display_mode_supported(int xres, int yres, int bpp, int hz)
+#else
+int
+gfx_is_display_mode_supported(int xres, int yres, int bpp, int hz)
+#endif
+{
+   unsigned int mode = 0;
+   unsigned long hz_flag = 0, bpp_flag = 0;
+
+   /* SET FLAGS TO MATCH REFRESH RATE */
+
+   if (hz == 56)
+      hz_flag = GFX_MODE_56HZ;
+   else if (hz == 60)
+      hz_flag = GFX_MODE_60HZ;
+   else if (hz == 70)
+      hz_flag = GFX_MODE_70HZ;
+   else if (hz == 72)
+      hz_flag = GFX_MODE_72HZ;
+   else if (hz == 75)
+      hz_flag = GFX_MODE_75HZ;
+   else if (hz == 85)
+      hz_flag = GFX_MODE_85HZ;
+   else
+      return -1;
+
+   /* SET BPP FLAGS TO LIMIT MODE SELECTION */
+
+   if (bpp == 8)
+      bpp_flag = GFX_MODE_8BPP;
+   else if (bpp == 15)
+      bpp_flag = GFX_MODE_15BPP;
+   else if (bpp == 16)
+      bpp_flag = GFX_MODE_16BPP;
+   else
+      return -1;
+
+   /* ONLY PYRAMID SUPPORTS 4K PITCH */
+
+   if (gfx_cpu_version != GFX_CPU_PYRAMID && xres > 1024) {
+      if (bpp > 8)
+	 return (-1);			/* return with mode not found */
+   }
+
+   /* LOOP THROUGH THE AVAILABLE MODES TO FIND A MATCH */
+
+   for (mode = 0; mode < NUM_GX_DISPLAY_MODES; mode++) {
+      if ((DisplayParams[mode].hactive == (unsigned short)xres) &&
+	  (DisplayParams[mode].vactive == (unsigned short)yres) &&
+	  (DisplayParams[mode].flags & hz_flag) &&
+	  (DisplayParams[mode].flags & bpp_flag)) {
+
+	 /* SET THE DISPLAY CONTROLLER FOR THE SELECTED MODE */
+
+	 return (mode);
+      }
+   }
+   return (-1);
+}
+
+/*----------------------------------------------------------------------------
+ * GFX_SET_DISPLAY_MODE
+ *
+ * This routine sets the specified display mode.
+ *
+ * Returns 1 if successful, 0 if mode could not be set.
+ *----------------------------------------------------------------------------  
+ */
+#if GFX_DISPLAY_DYNAMIC
+int
+gu1_set_display_mode(int xres, int yres, int bpp, int hz)
+#else
+int
+gfx_set_display_mode(int xres, int yres, int bpp, int hz)
+#endif
+{
+   int mode;
+
+   /* DISABLE FLAT PANEL */
+   /* Flat Panel settings are enabled by the function gfx_set_fixed_timings */
+   /* and disabled by gfx_set_display_mode.                                 */
+
+   PanelEnable = 0;
+
+   mode = gfx_is_display_mode_supported(xres, yres, bpp, hz);
+   if (mode >= 0) {
+      if (gu1_set_specified_mode(&DisplayParams[mode], bpp) == GFX_STATUS_OK)
+	 return (1);
+   }
+   return (0);
+}
+
+/*----------------------------------------------------------------------------
+ * GFX_SET_DISPLAY_TIMINGS
+ *
+ * This routine sets the display controller mode using the specified timing
+ * values (as opposed to using the tables internal to Durango).
+ *
+ * Returns GFX_STATUS_OK on success, GFX_STATUS_ERROR otherwise.
+ *----------------------------------------------------------------------------  
+ */
+#if GFX_DISPLAY_DYNAMIC
+int
+gu1_set_display_timings(unsigned short bpp, unsigned short flags,
+			unsigned short hactive, unsigned short hblankstart,
+			unsigned short hsyncstart, unsigned short hsyncend,
+			unsigned short hblankend, unsigned short htotal,
+			unsigned short vactive, unsigned short vblankstart,
+			unsigned short vsyncstart, unsigned short vsyncend,
+			unsigned short vblankend, unsigned short vtotal,
+			unsigned long frequency)
+#else
+int
+gfx_set_display_timings(unsigned short bpp, unsigned short flags,
+			unsigned short hactive, unsigned short hblankstart,
+			unsigned short hsyncstart, unsigned short hsyncend,
+			unsigned short hblankend, unsigned short htotal,
+			unsigned short vactive, unsigned short vblankstart,
+			unsigned short vsyncstart, unsigned short vsyncend,
+			unsigned short vblankend, unsigned short vtotal,
+			unsigned long frequency)
+#endif
+{
+   /* SET MODE STRUCTURE WITH SPECIFIED VALUES */
+
+   gfx_display_mode.flags = 0;
+   if (flags & 1)
+      gfx_display_mode.flags |= GFX_MODE_NEG_HSYNC;
+   if (flags & 2)
+      gfx_display_mode.flags |= GFX_MODE_NEG_VSYNC;
+   if (flags & 0x1000)
+      gfx_display_mode.flags |= GFX_MODE_LOCK_TIMING;
+   gfx_display_mode.hactive = hactive;
+   gfx_display_mode.hblankstart = hblankstart;
+   gfx_display_mode.hsyncstart = hsyncstart;
+   gfx_display_mode.hsyncend = hsyncend;
+   gfx_display_mode.hblankend = hblankend;
+   gfx_display_mode.htotal = htotal;
+   gfx_display_mode.vactive = vactive;
+   gfx_display_mode.vblankstart = vblankstart;
+   gfx_display_mode.vsyncstart = vsyncstart;
+   gfx_display_mode.vsyncend = vsyncend;
+   gfx_display_mode.vblankend = vblankend;
+   gfx_display_mode.vtotal = vtotal;
+   gfx_display_mode.frequency = frequency;
+
+   /* CALL ROUTINE TO SET MODE */
+
+   return (gu1_set_specified_mode(&gfx_display_mode, bpp));
+}
+
+/*----------------------------------------------------------------------------
+ * GFX_SET_VTOTAL
+ *
+ * This routine sets the display controller vertical total to
+ * "vtotal". As a side effect it also sets vertical blank end.
+ * It should be used when only this value needs to be changed,
+ * due to speed considerations.
+ *
+ * Note: it is the caller's responsibility to make sure that
+ * a legal vtotal is used, i.e. that "vtotal" is greater than or
+ * equal to vsync end.
+ *
+ * Always returns 0.
+ *----------------------------------------------------------------------------  
+ */
+#if GFX_DISPLAY_DYNAMIC
+int
+gu1_set_vtotal(unsigned short vtotal)
+#else
+int
+gfx_set_vtotal(unsigned short vtotal)
+#endif
+{
+   unsigned long unlock, tcfg, timing1, timing2;
+
+   /* UNLOCK THE DISPLAY CONTROLLER REGISTERS */
+
+   unlock = READ_REG32(DC_UNLOCK);
+   WRITE_REG32(DC_UNLOCK, DC_UNLOCK_VALUE);
+
+   /* READ THE CURRENT GX VALUES */
+
+   tcfg = READ_REG32(DC_TIMING_CFG);
+   timing1 = READ_REG32(DC_V_TIMING_1);
+   timing2 = READ_REG32(DC_V_TIMING_2);
+
+   /* DISABLE THE TIMING GENERATOR */
+
+   WRITE_REG32(DC_TIMING_CFG, tcfg & ~(unsigned long)DC_TCFG_TGEN);
+
+   /* WRITE NEW TIMING VALUES */
+
+   WRITE_REG32(DC_V_TIMING_1,
+	       (timing1 & 0xffff) | (unsigned long)(vtotal - 1) << 16);
+   WRITE_REG32(DC_V_TIMING_2,
+	       (timing2 & 0xffff) | (unsigned long)(vtotal - 1) << 16);
+
+   /* RESTORE GX VALUES */
+
+   WRITE_REG32(DC_TIMING_CFG, tcfg);
+   WRITE_REG32(DC_UNLOCK, unlock);
+
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_display_pitch
+ *
+ * This routine sets the pitch of the frame buffer to the specified value.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+void
+gu1_set_display_pitch(unsigned short pitch)
+#else
+void
+gfx_set_display_pitch(unsigned short pitch)
+#endif
+{
+   unsigned long value = 0;
+   unsigned long lock = READ_REG32(DC_UNLOCK);
+
+   value = READ_REG32(DC_LINE_DELTA) & 0xFFFFF000;
+   value |= (pitch >> 2);
+   WRITE_REG32(DC_UNLOCK, DC_UNLOCK_VALUE);
+   WRITE_REG32(DC_LINE_DELTA, value);
+   WRITE_REG32(DC_UNLOCK, lock);
+
+   /* ALSO UPDATE PITCH IN GRAPHICS ENGINE */
+   /* Pyramid alone supports 4K line pitch */
+
+   value = (unsigned long)READ_REG16(GP_BLIT_STATUS);
+   value &= ~(BC_FB_WIDTH_2048 | BC_FB_WIDTH_4096);
+
+   if ((gfx_cpu_version == GFX_CPU_PYRAMID) && (pitch > 2048))
+      value |= BC_FB_WIDTH_4096;
+
+   else if (pitch > 1024)
+      value |= BC_FB_WIDTH_2048;
+
+   WRITE_REG16(GP_BLIT_STATUS, (unsigned short)value);
+   return;
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_display_offset
+ *
+ * This routine sets the start address of the frame buffer.  It is 
+ * typically used to pan across a virtual desktop (frame buffer larger than 
+ * the displayed screen) or to flip the display between multiple buffers.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+void
+gu1_set_display_offset(unsigned long offset)
+#else
+void
+gfx_set_display_offset(unsigned long offset)
+#endif
+{
+   /* UPDATE FRAME BUFFER OFFSET */
+
+   unsigned long lock;
+
+   lock = READ_REG32(DC_UNLOCK);
+   WRITE_REG32(DC_UNLOCK, DC_UNLOCK_VALUE);
+
+   /* START ADDRESS EFFECTS DISPLAY COMPRESSION */
+   /* Disable compression for non-zero start addresss values.            */
+   /* Enable compression if offset is zero and comression is intended to */
+   /* be enabled from a previous call to "gfx_set_compression_enable".   */
+   /* Compression should be disabled BEFORE the offset is changed        */
+   /* and enabled AFTER the offset is changed.                           */
+
+   if (offset == 0) {
+      WRITE_REG32(DC_FB_ST_OFFSET, offset);
+      if (gfx_compression_enabled) {
+	 /* WAIT FOR THE OFFSET TO BE LATCHED */
+	 gfx_wait_vertical_blank();
+	 gu1_enable_compression();
+      }
+   } else {
+      /* ONLY DISABLE COMPRESSION ONCE */
+
+      if (gfx_compression_active)
+	 gu1_disable_compression();
+
+      WRITE_REG32(DC_FB_ST_OFFSET, offset);
+   }
+
+   WRITE_REG32(DC_UNLOCK, lock);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_display_palette_entry
+ *
+ * This routine sets an palette entry in the display controller.
+ * A 32-bit X:R:G:B value.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+int
+gu1_set_display_palette_entry(unsigned long index, unsigned long palette)
+#else
+int
+gfx_set_display_palette_entry(unsigned long index, unsigned long palette)
+#endif
+{
+   unsigned long data;
+
+   if (index > 0xFF)
+      return GFX_STATUS_BAD_PARAMETER;
+
+   WRITE_REG32(DC_PAL_ADDRESS, index);
+   data = ((palette >> 2) & 0x0003F) |
+	 ((palette >> 4) & 0x00FC0) | ((palette >> 6) & 0x3F000);
+   WRITE_REG32(DC_PAL_DATA, data);
+
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_display_palette
+ *
+ * This routine sets the entire palette in the display controller.
+ * A pointer is provided to a 256 entry table of 32-bit X:R:G:B values.
+ * Restriction:
+ * Due to SC1200 Issue #748 (in Notes DB) this function should be called only
+ * when DCLK is active, i.e PLL is already powered up and genlock is not active.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+int
+gu1_set_display_palette(unsigned long *palette)
+#else
+int
+gfx_set_display_palette(unsigned long *palette)
+#endif
+{
+   unsigned long data, i;
+
+   WRITE_REG32(DC_PAL_ADDRESS, 0);
+   if (palette) {
+      for (i = 0; i < 256; i++) {
+	 /* CONVERT 24 BPP COLOR DATA TO 18 BPP COLOR DATA */
+
+	 data = ((palette[i] >> 2) & 0x0003F) |
+	       ((palette[i] >> 4) & 0x00FC0) | ((palette[i] >> 6) & 0x3F000);
+	 WRITE_REG32(DC_PAL_DATA, data);
+      }
+   }
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_cursor_enable
+ *
+ * This routine enables or disables the hardware cursor.  
+ *
+ * WARNING: The cusrsor start offset must be set by setting the cursor 
+ * position before calling this routine to assure that memory reads do not
+ * go past the end of graphics memory (this can hang GXm).
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+void
+gu1_set_cursor_enable(int enable)
+#else
+void
+gfx_set_cursor_enable(int enable)
+#endif
+{
+   unsigned long unlock, gcfg;
+
+   /* SET OR CLEAR CURSOR ENABLE BIT */
+
+   unlock = READ_REG32(DC_UNLOCK);
+   gcfg = READ_REG32(DC_GENERAL_CFG);
+   if (enable)
+      gcfg |= DC_GCFG_CURE;
+   else
+      gcfg &= ~(DC_GCFG_CURE);
+
+   /* WRITE NEW REGISTER VALUE */
+
+   WRITE_REG32(DC_UNLOCK, DC_UNLOCK_VALUE);
+   WRITE_REG32(DC_GENERAL_CFG, gcfg);
+   WRITE_REG32(DC_UNLOCK, unlock);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_cursor_colors
+ *
+ * This routine sets the colors of the hardware cursor.
+ * Restriction:
+ * Due to SC1200 Issue #748 (in Notes DB) this function should be called only
+ * when DCLK is active, i.e PLL is already powered up.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+void
+gu1_set_cursor_colors(unsigned long bkcolor, unsigned long fgcolor)
+#else
+void
+gfx_set_cursor_colors(unsigned long bkcolor, unsigned long fgcolor)
+#endif
+{
+   unsigned long value;
+
+   /* If genlock is enabled DCLK might be disabled in vertical blank. */
+   /* Due to SC1200 Issue #748 in Notes DB this would fail the cursor color settings */
+   /* So Wait for vertical blank to end */
+
+#if GFX_VIDEO_SC1200
+   if (gfx_test_timing_active())
+      while ((gfx_get_vline()) > gfx_get_vactive()) ;
+#endif
+
+   /* SET CURSOR COLORS */
+
+   WRITE_REG32(DC_PAL_ADDRESS, 0x100);
+   value = ((bkcolor & 0x000000FC) >> 2) |
+	 ((bkcolor & 0x0000FC00) >> (2 + 8 - 6)) |
+	 ((bkcolor & 0x00FC0000) >> (2 + 16 - 12));
+   WRITE_REG32(DC_PAL_DATA, value);
+   value = ((fgcolor & 0x000000FC) >> 2) |
+	 ((fgcolor & 0x0000FC00) >> (2 + 8 - 6)) |
+	 ((fgcolor & 0x00FC0000) >> (2 + 16 - 12));
+   WRITE_REG32(DC_PAL_DATA, value);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_cursor_position
+ *
+ * This routine sets the position of the hardware cusror.  The starting
+ * offset of the cursor buffer must be specified so that the routine can 
+ * properly clip scanlines if the cursor is off the top of the screen.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+void
+gu1_set_cursor_position(unsigned long memoffset,
+			unsigned short xpos, unsigned short ypos,
+			unsigned short xhotspot, unsigned short yhotspot)
+#else
+void
+gfx_set_cursor_position(unsigned long memoffset,
+			unsigned short xpos, unsigned short ypos,
+			unsigned short xhotspot, unsigned short yhotspot)
+#endif
+{
+   unsigned long unlock;
+
+   short x, y;
+   short xoffset = 0;
+   short yoffset = 0;
+
+   /* SUPPORT CURSOR IN EMULATED VGA MODES */
+   /* Timings are for twice the resolution */
+
+   if (gfx_pixel_double)
+      xpos <<= 1;
+   if (gfx_line_double)
+      ypos <<= 1;
+
+   x = (short)xpos - (short)xhotspot;
+   y = (short)ypos - (short)yhotspot;
+   if (x < -31)
+      return;
+   if (y < -31)
+      return;
+   if (x < 0) {
+      xoffset = -x;
+      x = 0;
+   }
+   if (y < 0) {
+      yoffset = -y;
+      y = 0;
+   }
+   memoffset += (unsigned long)yoffset << 3;
+
+   if (PanelEnable) {
+      if ((ModeWidth > PanelWidth) || (ModeHeight > PanelHeight)) {
+	 gfx_enable_panning(xpos, ypos);
+	 x = x - (short)panelLeft;
+	 y = y - (short)panelTop;
+      }
+   }
+
+   /* SET CURSOR POSITION */
+
+   unlock = READ_REG32(DC_UNLOCK);
+   WRITE_REG32(DC_UNLOCK, DC_UNLOCK_VALUE);
+   WRITE_REG32(DC_CURS_ST_OFFSET, memoffset);
+   WRITE_REG32(DC_CURSOR_X, (unsigned long)x |
+	       (((unsigned long)xoffset) << 11));
+   WRITE_REG32(DC_CURSOR_Y, (unsigned long)y |
+	       (((unsigned long)yoffset) << 11));
+   WRITE_REG32(DC_UNLOCK, unlock);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_cursor_shape32
+ *
+ * This routine loads 32x32 cursor data into the specified location in 
+ * graphics memory.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+void
+gu1_set_cursor_shape32(unsigned long memoffset,
+		       unsigned long *andmask, unsigned long *xormask)
+#else
+void
+gfx_set_cursor_shape32(unsigned long memoffset,
+		       unsigned long *andmask, unsigned long *xormask)
+#endif
+{
+   int i;
+   unsigned long value;
+
+   for (i = 0; i < 32; i++) {
+      /* CONVERT TO 16 BITS AND MASK, 16 BITS XOR MASK PER DWORD */
+
+      value = (andmask[i] & 0xFFFF0000) | (xormask[i] >> 16);
+      WRITE_FB32(memoffset, value);
+      memoffset += 4;
+      value = (andmask[i] << 16) | (xormask[i] & 0x0000FFFF);
+      WRITE_FB32(memoffset, value);
+      memoffset += 4;
+   }
+}
+
+/*---------------------------------------------------------------------------
+ * gu1_enable_compression
+ *
+ * This is a private routine to this module (not exposed in the Durango API).
+ * It enables display compression.
+ *---------------------------------------------------------------------------
+ */
+void
+gu1_enable_compression(void)
+{
+   int i;
+   unsigned long unlock, gcfg, offset;
+
+   /* DO NOT ENABLE IF START ADDRESS IS NOT ZERO */
+
+   offset = READ_REG32(DC_FB_ST_OFFSET) & 0x003FFFFF;
+   if (offset != 0)
+      return;
+
+   /* DO NOT ENABLE IF WE ARE WITHIN AN EMULATED VGA MODE */
+
+   if (gfx_line_double || gfx_pixel_double)
+      return;
+
+   /* SET GLOBAL INDICATOR */
+
+   gfx_compression_active = 1;
+
+   /* CLEAR DIRTY/VALID BITS IN MEMORY CONTROLLER */
+   /* Software is required to do this before enabling compression. */
+   /* Don't want controller to think that old lines are still valid. */
+
+   for (i = 0; i < 1024; i++) {
+      WRITE_REG32(MC_DR_ADD, i);
+      WRITE_REG32(MC_DR_ACC, 0);
+   }
+
+   /* TURN ON COMPRESSION CONTROL BITS */
+
+   unlock = READ_REG32(DC_UNLOCK);
+   gcfg = READ_REG32(DC_GENERAL_CFG);
+   gcfg |= DC_GCFG_CMPE | DC_GCFG_DECE;
+   WRITE_REG32(DC_UNLOCK, DC_UNLOCK_VALUE);
+   WRITE_REG32(DC_GENERAL_CFG, gcfg);
+   WRITE_REG32(DC_UNLOCK, unlock);
+}
+
+/*---------------------------------------------------------------------------
+ * gu1_disable_compression
+ *
+ * This is a private routine to this module (not exposed in the Durango API).
+ * It disables display compression.
+ *---------------------------------------------------------------------------
+ */
+void
+gu1_disable_compression(void)
+{
+   unsigned long unlock, gcfg;
+
+   /* SET GLOBAL INDICATOR */
+
+   gfx_compression_active = 0;
+
+   /* TURN OFF COMPRESSION CONTROL BITS */
+
+   unlock = READ_REG32(DC_UNLOCK);
+   gcfg = READ_REG32(DC_GENERAL_CFG);
+   gcfg &= ~(DC_GCFG_CMPE | DC_GCFG_DECE);
+   WRITE_REG32(DC_UNLOCK, DC_UNLOCK_VALUE);
+   WRITE_REG32(DC_GENERAL_CFG, gcfg);
+   WRITE_REG32(DC_UNLOCK, unlock);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_compression_enable
+ *
+ * This routine enables or disables display compression.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+int
+gu1_set_compression_enable(int enable)
+#else
+int
+gfx_set_compression_enable(int enable)
+#endif
+{
+   /* SET GLOBAL VARIABLE FOR INTENDED STATE */
+   /* Compression can only be enabled for non-zero start address values. */
+   /* Keep state to enable compression on start address changes. */
+
+   gfx_compression_enabled = enable;
+   if (enable)
+      gu1_enable_compression();
+   else
+      gu1_disable_compression();
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_compression_offset
+ *
+ * This routine sets the base offset for the compression buffer.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+int
+gu1_set_compression_offset(unsigned long offset)
+#else
+int
+gfx_set_compression_offset(unsigned long offset)
+#endif
+{
+   unsigned long lock;
+
+   /* MUST BE 16-BYTE ALIGNED FOR GXLV */
+
+   if (offset & 0x0F)
+      return (1);
+
+   /* SET REGISTER VALUE */
+
+   lock = READ_REG32(DC_UNLOCK);
+   WRITE_REG32(DC_UNLOCK, DC_UNLOCK_VALUE);
+   WRITE_REG32(DC_CB_ST_OFFSET, offset);
+   WRITE_REG32(DC_UNLOCK, lock);
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_compression_pitch
+ *
+ * This routine sets the pitch, in bytes, of the compression buffer. 
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+int
+gu1_set_compression_pitch(unsigned short pitch)
+#else
+int
+gfx_set_compression_pitch(unsigned short pitch)
+#endif
+{
+   unsigned long lock, line_delta;
+
+   /* SET REGISTER VALUE */
+
+   lock = READ_REG32(DC_UNLOCK);
+   line_delta = READ_REG32(DC_LINE_DELTA) & 0xFF800FFF;
+   line_delta |= ((unsigned long)pitch << 10l) & 0x007FF000;
+   WRITE_REG32(DC_UNLOCK, DC_UNLOCK_VALUE);
+   WRITE_REG32(DC_LINE_DELTA, line_delta);
+   WRITE_REG32(DC_UNLOCK, lock);
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_compression_size
+ *
+ * This routine sets the line size of the compression buffer, which is the
+ * maximum number of bytes allowed to store a compressed line.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+int
+gu1_set_compression_size(unsigned short size)
+#else
+int
+gfx_set_compression_size(unsigned short size)
+#endif
+{
+   unsigned long lock, buf_size;
+
+   /* SUBTRACT 16 FROM SIZE                          */
+   /* The display controller will actually write     */
+   /* 2 extra QWords.  So, if we assume that "size"  */
+   /* refers to the allocated size, we must subtract */
+   /* 16 bytes.                                      */
+
+   size -= 16;
+
+   /* SET REGISTER VALUE */
+
+   lock = READ_REG32(DC_UNLOCK);
+   buf_size = READ_REG32(DC_BUF_SIZE) & 0xFFFF01FF;
+   buf_size |= (((size >> 2) + 1) & 0x7F) << 9;
+   WRITE_REG32(DC_UNLOCK, DC_UNLOCK_VALUE);
+   WRITE_REG32(DC_BUF_SIZE, buf_size);
+   WRITE_REG32(DC_UNLOCK, lock);
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_display_video_enable (PRIVATE ROUTINE - NOT PART OF API)
+ *
+ * This routine enables/disables video on GX.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+void
+gu1_set_display_video_enable(int enable)
+#else
+void
+gfx_set_display_video_enable(int enable)
+#endif
+{
+   unsigned long lock, gcfg, buf_size;
+
+   lock = READ_REG32(DC_UNLOCK);
+   gcfg = READ_REG32(DC_GENERAL_CFG);
+   buf_size = READ_REG32(DC_BUF_SIZE);
+
+   WRITE_REG32(DC_UNLOCK, DC_UNLOCK_VALUE);
+
+   vid_enabled = enable;
+
+   /* SET THE BUFFER SIZE TO A NON-ZERO VALUE ONLY WHEN */
+   /* ENABLING VIDEO                                    */
+
+   if (enable) {
+      gcfg |= (DC_GCFG_VIDE | DC_GCFG_VRDY);
+      WRITE_REG32(DC_GENERAL_CFG, gcfg);
+
+      WRITE_REG32(DC_BUF_SIZE, (buf_size & 0x0000FFFFl) | vid_buf_size);
+   }
+
+   /* CLEAR THE VIDEO BUFFER SIZE WHEN DISABLING VIDEO  */
+
+   else {
+      gcfg &= ~(DC_GCFG_VIDE);
+      WRITE_REG32(DC_GENERAL_CFG, gcfg);
+
+      vid_buf_size = buf_size & 0xFFFF0000l;
+      WRITE_REG32(DC_BUF_SIZE, buf_size & 0x0000FFFFl);
+   }
+
+   WRITE_REG32(DC_UNLOCK, lock);
+   return;
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_display_video_size (PRIVATE ROUTINE - NOT PART OF API)
+ *
+ * This routine is called by "gfx_set_video_size".  It abstracts the 
+ * version of the display controller from the video overlay routines.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+void
+gu1_set_display_video_size(unsigned short width, unsigned short height)
+#else
+void
+gfx_set_display_video_size(unsigned short width, unsigned short height)
+#endif
+{
+   unsigned long lock, size, value;
+
+   size = (unsigned long)(width << 1) * (unsigned long)height;
+
+   /* STORE THE VIDEO BUFFER SIZE AS A GLOBAL */
+
+   vid_buf_size = ((size + 63) >> 6) << 16;
+
+   /* DO NOT SET THE VIDEO SIZE IF VIDEO IS DISABLED */
+
+   if (!vid_enabled)
+      return;
+
+   lock = READ_REG32(DC_UNLOCK);
+   WRITE_REG32(DC_UNLOCK, DC_UNLOCK_VALUE);
+   value = READ_REG32(DC_BUF_SIZE) & 0x0000FFFF;
+   value |= vid_buf_size;
+   WRITE_REG32(DC_BUF_SIZE, value);
+   WRITE_REG32(DC_UNLOCK, lock);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_display_video_offset (PRIVATE ROUTINE - NOT PART OF API)
+ *
+ * This routine is called by "gfx_set_video_offset".  It abstracts the 
+ * version of the display controller from the video overlay routines.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+void
+gu1_set_display_video_offset(unsigned long offset)
+#else
+void
+gfx_set_display_video_offset(unsigned long offset)
+#endif
+{
+   unsigned long lock;
+
+   lock = READ_REG32(DC_UNLOCK);
+   WRITE_REG32(DC_UNLOCK, DC_UNLOCK_VALUE);
+   offset &= 0x003FFFFF;
+   WRITE_REG32(DC_VID_ST_OFFSET, offset);
+   WRITE_REG32(DC_UNLOCK, lock);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_display_priority_high
+ *
+ * This routine controls the x-bus round robin arbitration mechanism.
+ * When enable is TRUE, graphics pipeline requests and non-critical display
+ * controller requests are arbitrated at the same priority as processor
+ * requests. When FALSE processor requests are arbitrated at a higher priority.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+void
+gu1_set_display_priority_high(int enable)
+#else
+void
+gfx_set_display_priority_high(int enable)
+#endif
+{
+   unsigned long lock, control;
+
+   lock = READ_REG32(DC_UNLOCK);
+   control = READ_REG32(MC_MEM_CNTRL1);
+   WRITE_REG32(DC_UNLOCK, DC_UNLOCK_VALUE);
+   if (enable)
+      control |= MC_XBUSARB;
+   else
+      control &= ~(MC_XBUSARB);
+   WRITE_REG32(MC_MEM_CNTRL1, control);
+   WRITE_REG32(DC_UNLOCK, lock);
+   return;
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_test_timing_active
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+int
+gu1_test_timing_active(void)
+#else
+int
+gfx_test_timing_active(void)
+#endif
+{
+   if (READ_REG32(DC_TIMING_CFG) & DC_TCFG_TGEN)
+      return (1);
+   else
+      return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_test_vertical_active
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+int
+gu1_test_vertical_active(void)
+#else
+int
+gfx_test_vertical_active(void)
+#endif
+{
+   if (READ_REG32(DC_TIMING_CFG) & DC_TCFG_VNA)
+      return (0);
+   else
+      return (1);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_wait_vertical_blank
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+int
+gu1_wait_vertical_blank(void)
+#else
+int
+gfx_wait_vertical_blank(void)
+#endif
+{
+   if (gfx_test_timing_active()) {
+      while (!gfx_test_vertical_active()) ;
+      while (gfx_test_vertical_active()) ;
+   }
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_enable_panning 
+ *
+ * This routine  enables the panning when the Mode is bigger than the panel
+ * size.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+void
+gu1_enable_panning(int x, int y)
+#else
+void
+gfx_enable_panning(int x, int y)
+#endif
+{
+   unsigned long modeBytesPerPixel;
+   unsigned long modeBytesPerScanline = 0;
+   unsigned long startAddress = 0;
+
+   modeBytesPerPixel = (gbpp + 7) / 8;
+   modeBytesPerScanline =
+	 (((ModeWidth + 1023) / 1024) * 1024) * modeBytesPerPixel;
+
+   /* TEST FOR NO-WORK */
+
+   if (x >= DeltaX && (unsigned short)x < (PanelWidth + DeltaX) &&
+       y >= DeltaY && (unsigned short)y < (PanelHeight + DeltaY))
+      return;
+
+   /* ADJUST PANNING VARIABLES WHEN CURSOR EXCEEDS BOUNDARY       */
+   /* Test the boundary conditions for each coordinate and update */
+   /* all variables and the starting offset accordingly.          */
+
+   if (x < DeltaX)
+      DeltaX = x;
+
+   else if ((unsigned short)x >= (DeltaX + PanelWidth))
+      DeltaX = x - PanelWidth + 1;
+
+   if (y < DeltaY)
+      DeltaY = y;
+
+   else if ((unsigned short)y >= (DeltaY + PanelHeight))
+      DeltaY = y - PanelHeight + 1;
+
+   /* CALCULATE THE START OFFSET */
+
+   startAddress =
+	 (DeltaX * modeBytesPerPixel) + (DeltaY * modeBytesPerScanline);
+
+   gfx_set_display_offset(startAddress);
+
+   /* SET PANEL COORDINATES                    */
+   /* Panel's x position must be DWORD aligned */
+
+   panelTop = DeltaY;
+   panelLeft = DeltaX * modeBytesPerPixel;
+
+   if (panelLeft & 3)
+      panelLeft = (panelLeft & 0xFFFFFFFC) + 4;
+
+   panelLeft /= modeBytesPerPixel;
+
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_fixed_timings
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+int
+gu1_set_fixed_timings(int panelResX, int panelResY, unsigned short width,
+		      unsigned short height, unsigned short bpp)
+#else
+int
+gfx_set_fixed_timings(int panelResX, int panelResY, unsigned short width,
+		      unsigned short height, unsigned short bpp)
+#endif
+{
+   unsigned int mode;
+
+   ModeWidth = width;
+   ModeHeight = height;
+   PanelWidth = (unsigned short)panelResX;
+   PanelHeight = (unsigned short)panelResY;
+   PanelEnable = 1;
+
+   /* LOOP THROUGH THE AVAILABLE MODES TO FIND A MATCH */
+   for (mode = 0; mode < NUM_FIXED_TIMINGS_MODES; mode++) {
+      if ((FixedParams[mode].xres == width) &&
+	  (FixedParams[mode].yres == height) &&
+	  (FixedParams[mode].panelresx == panelResX) &&
+	  (FixedParams[mode].panelresy == panelResY)) {
+
+	 /* SET THE 92xx FOR THE SELECTED MODE */
+	 FIXEDTIMINGS *fmode = &FixedParams[mode];
+
+	 gfx_set_display_timings(bpp, 3, fmode->hactive, fmode->hblankstart,
+				 fmode->hsyncstart, fmode->hsyncend,
+				 fmode->hblankend, fmode->htotal,
+				 fmode->vactive, fmode->vblankstart,
+				 fmode->vsyncstart, fmode->vsyncend,
+				 fmode->vblankend, fmode->vtotal,
+				 fmode->frequency);
+
+	 return (1);
+      }					/* end if() */
+   }					/* end for() */
+
+   return (-1);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_panel_present
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+int
+gu1_set_panel_present(int panelResX, int panelResY, unsigned short width,
+		      unsigned short height, unsigned short bpp)
+#else
+int
+gfx_set_panel_present(int panelResX, int panelResY, unsigned short width,
+		      unsigned short height, unsigned short bpp)
+#endif
+{
+   /* SET VALID BPP         */
+   /* 16BPP is the default. */
+
+   if (bpp != 8 && bpp != 15 && bpp != 16)
+      bpp = 16;
+
+   /* RECORD PANEL PARAMETERS */
+   /* This routine does not touch any panel timings.  It is used when custom panel */
+   /* settings are set up in advance by the BIOS or an application, but the        */
+   /* application still requires access to other panel functionality provided by   */
+   /* Durango (i.e. panning).                                                      */
+
+   ModeWidth = width;
+   ModeHeight = height;
+   PanelWidth = (unsigned short)panelResX;
+   PanelHeight = (unsigned short)panelResY;
+   PanelEnable = 1;
+   gbpp = bpp;
+
+   /* PROGRAM THE BPP IN THE DISPLAY CONTROLLER */
+
+   gfx_set_display_bpp(bpp);
+
+   return (GFX_STATUS_OK);
+}
+
+/*-----------------------------------------------------------------------*
+ * THE FOLLOWING READ ROUTINES ARE ALWAYS INCLUDED:                      *                      
+ * gfx_get_hsync_end, gfx_get_htotal, gfx_get_vsync_end, gfx_get_vtotal  *
+ * are used by the video overlay routines.                               *
+ *                                                                       *
+ * gfx_get_vline and gfx_vactive are used to prevent an issue for the    *
+ * SC1200.                                                               *
+ *                                                                       *
+ * The others are part of the Durango API.                               *
+ *-----------------------------------------------------------------------*/
+
+/*---------------------------------------------------------------------------
+ * gfx_get_display_pitch
+ *
+ * This routine returns the current pitch of the frame buffer, in bytes.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+unsigned short
+gu1_get_display_pitch(void)
+#else
+unsigned short
+gfx_get_display_pitch(void)
+#endif
+{
+   unsigned long value;
+
+   if (gfx_cpu_version == GFX_CPU_PYRAMID) {	/* Pyramid update for 4KB line pitch */
+      value = (READ_REG32(DC_LINE_DELTA) & 0x07FF) << 2;
+   } else {
+      value = (READ_REG32(DC_LINE_DELTA) & 0x03FF) << 2;
+   }
+
+   return ((unsigned short)value);
+}
+
+/*----------------------------------------------------------------------------
+ * GFX_GET_DISPLAY_DETAILS
+ *
+ * This routine gets the specified display mode.
+ *
+ * Returns 1 if successful, 0 if mode could not be get.
+ *----------------------------------------------------------------------------  
+ */
+#if GFX_DISPLAY_DYNAMIC
+int
+gu1_get_display_details(unsigned int mode, int *xres, int *yres, int *hz)
+#else
+int
+gfx_get_display_details(unsigned int mode, int *xres, int *yres, int *hz)
+#endif
+{
+   if (mode < NUM_GX_DISPLAY_MODES) {
+      if (DisplayParams[mode].flags & GFX_MODE_56HZ)
+	 *hz = 56;
+      else if (DisplayParams[mode].flags & GFX_MODE_60HZ)
+	 *hz = 60;
+      else if (DisplayParams[mode].flags & GFX_MODE_70HZ)
+	 *hz = 70;
+      else if (DisplayParams[mode].flags & GFX_MODE_72HZ)
+	 *hz = 72;
+      else if (DisplayParams[mode].flags & GFX_MODE_75HZ)
+	 *hz = 75;
+      else if (DisplayParams[mode].flags & GFX_MODE_85HZ)
+	 *hz = 85;
+
+      *xres = DisplayParams[mode].hactive;
+      *yres = DisplayParams[mode].vactive;
+
+      return (1);
+   }
+   return (0);
+}
+
+/*----------------------------------------------------------------------------
+ * GFX_GET_DISPLAY_MODE_COUNT
+ *
+ * Returns number of modes supported.
+ *----------------------------------------------------------------------------  
+ */
+#if GFX_DISPLAY_DYNAMIC
+int
+gu1_get_display_mode_count(void)
+#else
+int
+gfx_get_display_mode_count(void)
+#endif
+{
+   return (NUM_GX_DISPLAY_MODES);
+}
+
+/*----------------------------------------------------------------------------
+ * gfx_get_frame_buffer_line_size
+ *
+ * Returns the current frame buffer line size, in bytes
+ *----------------------------------------------------------------------------  
+ */
+#if GFX_DISPLAY_DYNAMIC
+unsigned long
+gu1_get_frame_buffer_line_size(void)
+#else
+unsigned long
+gfx_get_frame_buffer_line_size(void)
+#endif
+{
+   return ((READ_REG32(DC_BUF_SIZE) & 0x1FF) << 3);
+}
+
+/*----------------------------------------------------------------------------
+ * gfx_mode_frequency_supported
+ *
+ * This routine examines if the requested mode with pixel frequency is supported.
+ *
+ * Returns >0 if successful , <0 if freq. could not be found and matched.
+ *----------------------------------------------------------------------------  
+ */
+#if GFX_DISPLAY_DYNAMIC
+int
+gu1_mode_frequency_supported(int xres, int yres, int bpp,
+			     unsigned long frequency)
+#else
+int
+gfx_mode_frequency_supported(int xres, int yres, int bpp,
+			     unsigned long frequency)
+#endif
+{
+   unsigned int index;
+   unsigned long value;
+   unsigned long bpp_flag = 0;
+
+   bpp_flag = GFX_MODE_8BPP;
+   if (bpp > 8)
+      bpp_flag = GFX_MODE_16BPP;
+
+   for (index = 0; index < NUM_GX_DISPLAY_MODES; index++) {
+      if ((DisplayParams[index].hactive == (unsigned short)xres) &&
+	  (DisplayParams[index].vactive == (unsigned short)yres) &&
+	  (DisplayParams[index].flags & bpp_flag) &&
+	  (DisplayParams[index].frequency == frequency)) {
+	 int hz = 0;
+
+	 value = DisplayParams[index].flags;
+
+	 if (value & GFX_MODE_60HZ)
+	    hz = 60;
+	 else if (value & GFX_MODE_70HZ)
+	    hz = 70;
+	 else if (value & GFX_MODE_72HZ)
+	    hz = 72;
+	 else if (value & GFX_MODE_75HZ)
+	    hz = 75;
+	 else if (value & GFX_MODE_85HZ)
+	    hz = 85;
+	 return (hz);
+      }
+   }
+   return (-1);
+}
+
+/*----------------------------------------------------------------------------
+ * gfx_refreshrate_from_frequency
+ *
+ * This routine maps the frequency to close match refresh rate
+ *
+ * Returns .
+ *----------------------------------------------------------------------------  
+ */
+#if GFX_DISPLAY_DYNAMIC
+int
+gu1_get_refreshrate_from_frequency(int xres, int yres, int bpp, int *hz,
+				   unsigned long frequency)
+#else
+int
+gfx_get_refreshrate_from_frequency(int xres, int yres, int bpp, int *hz,
+				   unsigned long frequency)
+#endif
+{
+   unsigned int index, closematch = 0;
+   unsigned long value;
+   unsigned long bpp_flag = 0;
+   long min, diff;
+
+   *hz = 60;
+
+   bpp_flag = GFX_MODE_8BPP;
+   if (bpp > 8)
+      bpp_flag = GFX_MODE_16BPP;
+
+   /* FIND THE REGISTER VALUES FOR THE DESIRED FREQUENCY */
+   /* Search the table for the closest frequency (16.16 format). */
+
+   min = 0x7fffffff;
+   for (index = 0; index < NUM_GX_DISPLAY_MODES; index++) {
+      if ((DisplayParams[index].htotal == (unsigned short)xres) &&
+	  (DisplayParams[index].vtotal == (unsigned short)yres) &&
+	  (DisplayParams[index].flags & bpp_flag)) {
+	 diff = (long)frequency - (long)DisplayParams[index].frequency;
+	 if (diff < 0)
+	    diff = -diff;
+
+	 if (diff < min) {
+	    min = diff;
+	    closematch = index;
+	 }
+      }
+   }
+
+   value = DisplayParams[closematch].flags;
+
+   if (value & GFX_MODE_60HZ)
+      *hz = 60;
+   else if (value & GFX_MODE_70HZ)
+      *hz = 70;
+   else if (value & GFX_MODE_72HZ)
+      *hz = 72;
+   else if (value & GFX_MODE_75HZ)
+      *hz = 75;
+   else if (value & GFX_MODE_85HZ)
+      *hz = 85;
+
+   return (1);
+}
+
+/*----------------------------------------------------------------------------
+ * gfx_refreshrate_from_mode
+ *
+ * This routine is identical to the gfx_get_refreshrate_from_frequency,
+ * except that the active timing values are compared instead of the total
+ * values.  Some modes (such as 70Hz and 72Hz) may be confused in this routine.
+ *
+ * Returns .
+ *----------------------------------------------------------------------------  
+ */
+#if GFX_DISPLAY_DYNAMIC
+int
+gu1_get_refreshrate_from_mode(int xres, int yres, int bpp, int *hz,
+			      unsigned long frequency)
+#else
+int
+gfx_get_refreshrate_from_mode(int xres, int yres, int bpp, int *hz,
+			      unsigned long frequency)
+#endif
+{
+   unsigned int index, closematch = 0;
+   unsigned long value;
+   unsigned long bpp_flag = 0;
+   long min, diff;
+
+   *hz = 60;
+
+   bpp_flag = GFX_MODE_8BPP;
+   if (bpp > 8)
+      bpp_flag = GFX_MODE_16BPP;
+
+   /* FIND THE REGISTER VALUES FOR THE DESIRED FREQUENCY */
+   /* Search the table for the closest frequency (16.16 format). */
+
+   min = 0x7fffffff;
+   for (index = 0; index < NUM_GX_DISPLAY_MODES; index++) {
+      if ((DisplayParams[index].hactive == (unsigned short)xres) &&
+	  (DisplayParams[index].vactive == (unsigned short)yres) &&
+	  (DisplayParams[index].flags & bpp_flag)) {
+	 diff = (long)frequency - (long)DisplayParams[index].frequency;
+	 if (diff < 0)
+	    diff = -diff;
+
+	 if (diff < min) {
+	    min = diff;
+	    closematch = index;
+	 }
+      }
+   }
+
+   value = DisplayParams[closematch].flags;
+
+   if (value & GFX_MODE_60HZ)
+      *hz = 60;
+   else if (value & GFX_MODE_70HZ)
+      *hz = 70;
+   else if (value & GFX_MODE_72HZ)
+      *hz = 72;
+   else if (value & GFX_MODE_75HZ)
+      *hz = 75;
+   else if (value & GFX_MODE_85HZ)
+      *hz = 85;
+
+   return (1);
+}
+
+/*----------------------------------------------------------------------------
+ * gfx_get_frequency_from_refreshrate
+ *
+ * This routine maps the refresh rate to the closest matching PLL frequency.
+ *----------------------------------------------------------------------------  
+ */
+#if GFX_DISPLAY_DYNAMIC
+int
+gu1_get_frequency_from_refreshrate(int xres, int yres, int bpp, int hz,
+				   int *frequency)
+#else
+int
+gfx_get_frequency_from_refreshrate(int xres, int yres, int bpp, int hz,
+				   int *frequency)
+#endif
+{
+   int retval = -1;
+   unsigned long hz_flag = 0;
+   unsigned long index, bpp_flag = 0;
+
+   *frequency = 0;
+
+   if (hz == 60)
+      hz_flag = GFX_MODE_60HZ;
+   else if (hz == 70)
+      hz_flag = GFX_MODE_70HZ;
+   else if (hz == 72)
+      hz_flag = GFX_MODE_72HZ;
+   else if (hz == 75)
+      hz_flag = GFX_MODE_75HZ;
+   else if (hz == 85)
+      hz_flag = GFX_MODE_85HZ;
+
+   bpp_flag = GFX_MODE_8BPP;
+   if (bpp > 8)
+      bpp_flag = GFX_MODE_16BPP;
+
+   /* FIND THE REGISTER VALUES FOR THE DESIRED FREQUENCY */
+
+   for (index = 0; index < NUM_GX_DISPLAY_MODES; index++) {
+      if ((DisplayParams[index].hactive == (unsigned short)xres) &&
+	  (DisplayParams[index].vactive == (unsigned short)yres) &&
+	  (DisplayParams[index].flags & bpp_flag) &&
+	  (DisplayParams[index].flags & hz_flag)) {
+	 *frequency = DisplayParams[index].frequency;
+	 retval = 1;
+      }
+   }
+   return retval;
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_max_supported_pixel_clock
+ *
+ * This routine returns the maximum recommended speed for the pixel clock.  The 
+ * return value is an integer of the format xxxyyy, where xxx.yyy is the maximum
+ * floating point pixel clock speed.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+unsigned long
+gu1_get_max_supported_pixel_clock(void)
+#else
+unsigned long
+gfx_get_max_supported_pixel_clock(void)
+#endif
+{
+   /* ALL CHIPS CAN HANDLE 1280X1024@85HZ - 157.5 MHz */
+
+   return 157500;
+}
+
+/*----------------------------------------------------------------------------
+ * gfx_get_display_mode
+ *
+ * This routine gets the specified display mode.
+ *
+ * Returns >0 if successful and mode returned, <0 if mode could not be found.
+ *----------------------------------------------------------------------------  
+ */
+#if GFX_DISPLAY_DYNAMIC
+int
+gu1_get_display_mode(int *xres, int *yres, int *bpp, int *hz)
+#else
+int
+gfx_get_display_mode(int *xres, int *yres, int *bpp, int *hz)
+#endif
+{
+   unsigned int mode = 0;
+   unsigned long pll_freq = 0, bpp_flag = 0;
+
+   *xres = gfx_get_hactive();
+   *yres = gfx_get_vactive();
+   *bpp = gfx_get_display_bpp();
+   pll_freq = gfx_get_clock_frequency();
+
+   /* SUPPORT EMULATED VGA MODES */
+
+   if (gfx_pixel_double)
+      *xres >>= 1;
+
+   if (gfx_line_double)
+      *yres >>= 1;
+
+   /* SET BPP FLAGS TO LIMIT MODE SELECTION */
+
+   bpp_flag = GFX_MODE_8BPP;
+   if (*bpp > 8)
+      bpp_flag = GFX_MODE_16BPP;
+
+   for (mode = 0; mode < NUM_GX_DISPLAY_MODES; mode++) {
+      if ((DisplayParams[mode].hactive == (unsigned short)*xres) &&
+	  (DisplayParams[mode].vactive == (unsigned short)*yres) &&
+	  (DisplayParams[mode].frequency == pll_freq) &&
+	  (DisplayParams[mode].flags & bpp_flag)) {
+
+	 pll_freq = DisplayParams[mode].flags;
+
+	 if (pll_freq & GFX_MODE_56HZ)
+	    *hz = 56;
+	 else if (pll_freq & GFX_MODE_60HZ)
+	    *hz = 60;
+	 else if (pll_freq & GFX_MODE_70HZ)
+	    *hz = 70;
+	 else if (pll_freq & GFX_MODE_72HZ)
+	    *hz = 72;
+	 else if (pll_freq & GFX_MODE_75HZ)
+	    *hz = 75;
+	 else if (pll_freq & GFX_MODE_85HZ)
+	    *hz = 85;
+
+	 return (1);
+      }
+   }
+   return (-1);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_hactive
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+unsigned short
+gu1_get_hactive(void)
+#else
+unsigned short
+gfx_get_hactive(void)
+#endif
+{
+   return ((unsigned short)((READ_REG32(DC_H_TIMING_1) & 0x07F8) + 8));
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_hsync_start
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+unsigned short
+gu1_get_hsync_start(void)
+#else
+unsigned short
+gfx_get_hsync_start(void)
+#endif
+{
+   return ((unsigned short)((READ_REG32(DC_H_TIMING_3) & 0x07F8) + 8));
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_hsync_end
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+unsigned short
+gu1_get_hsync_end(void)
+#else
+unsigned short
+gfx_get_hsync_end(void)
+#endif
+{
+   return ((unsigned short)(((READ_REG32(DC_H_TIMING_3) >> 16) & 0x07F8) +
+			    8));
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_htotal
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+unsigned short
+gu1_get_htotal(void)
+#else
+unsigned short
+gfx_get_htotal(void)
+#endif
+{
+   return ((unsigned short)(((READ_REG32(DC_H_TIMING_1) >> 16) & 0x07F8) +
+			    8));
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_vactive
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+unsigned short
+gu1_get_vactive(void)
+#else
+unsigned short
+gfx_get_vactive(void)
+#endif
+{
+   return ((unsigned short)((READ_REG32(DC_V_TIMING_1) & 0x07FF) + 1));
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_vsync_end
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+unsigned short
+gu1_get_vsync_end(void)
+#else
+unsigned short
+gfx_get_vsync_end(void)
+#endif
+{
+   return ((unsigned short)(((READ_REG32(DC_V_TIMING_3) >> 16) & 0x07FF) +
+			    1));
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_vtotal
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+unsigned short
+gu1_get_vtotal(void)
+#else
+unsigned short
+gfx_get_vtotal(void)
+#endif
+{
+   return ((unsigned short)(((READ_REG32(DC_V_TIMING_1) >> 16) & 0x07FF) +
+			    1));
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_display_bpp
+ *
+ * This routine returns the current color depth of the active display.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+unsigned short
+gu1_get_display_bpp(void)
+#else
+unsigned short
+gfx_get_display_bpp(void)
+#endif
+{
+   switch (READ_REG32(DC_OUTPUT_CFG) & 3) {
+   case 0:
+      return (16);
+   case 2:
+      return (15);
+   }
+   return (8);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_vline
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+unsigned short
+gu1_get_vline(void)
+#else
+unsigned short
+gfx_get_vline(void)
+#endif
+{
+   unsigned short current_scan_line;
+
+   /* Read similar value twice to ensure that the value is not transitioning */
+
+   do
+      current_scan_line = (unsigned short)READ_REG32(DC_V_LINE_CNT) & 0x07FF;
+   while (current_scan_line !=
+	  (unsigned short)(READ_REG32(DC_V_LINE_CNT) & 0x07FF));
+
+   return (current_scan_line);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_display_offset
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+unsigned long
+gu1_get_display_offset(void)
+#else
+unsigned long
+gfx_get_display_offset(void)
+#endif
+{
+   return (READ_REG32(DC_FB_ST_OFFSET) & 0x003FFFFF);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_cursor_offset
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+unsigned long
+gu1_get_cursor_offset(void)
+#else
+unsigned long
+gfx_get_cursor_offset(void)
+#endif
+{
+   return (READ_REG32(DC_CURS_ST_OFFSET) & 0x003FFFFF);
+}
+
+#if GFX_READ_ROUTINES
+
+/*************************************************************/
+/*  READ ROUTINES  |  INCLUDED FOR DIAGNOSTIC PURPOSES ONLY  */
+/*************************************************************/
+
+/*---------------------------------------------------------------------------
+ * gfx_get_hblank_start
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+unsigned short
+gu1_get_hblank_start(void)
+#else
+unsigned short
+gfx_get_hblank_start(void)
+#endif
+{
+   return ((unsigned short)((READ_REG32(DC_H_TIMING_2) & 0x07F8) + 8));
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_hblank_end
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+unsigned short
+gu1_get_hblank_end(void)
+#else
+unsigned short
+gfx_get_hblank_end(void)
+#endif
+{
+   return ((unsigned short)(((READ_REG32(DC_H_TIMING_2) >> 16) & 0x07F8) +
+			    8));
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_vblank_start
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+unsigned short
+gu1_get_vblank_start(void)
+#else
+unsigned short
+gfx_get_vblank_start(void)
+#endif
+{
+   return ((unsigned short)((READ_REG32(DC_V_TIMING_2) & 0x07FF) + 1));
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_vsync_start
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+unsigned short
+gu1_get_vsync_start(void)
+#else
+unsigned short
+gfx_get_vsync_start(void)
+#endif
+{
+   return ((unsigned short)((READ_REG32(DC_V_TIMING_3) & 0x07FF) + 1));
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_vblank_end
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+unsigned short
+gu1_get_vblank_end(void)
+#else
+unsigned short
+gfx_get_vblank_end(void)
+#endif
+{
+   return ((unsigned short)(((READ_REG32(DC_V_TIMING_2) >> 16) & 0x07FF) +
+			    1));
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_display_palette_entry
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+int
+gu1_get_display_palette_entry(unsigned long index, unsigned long *palette)
+#else
+int
+gfx_get_display_palette_entry(unsigned long index, unsigned long *palette)
+#endif
+{
+   unsigned long data;
+
+   if (index > 0xFF)
+      return GFX_STATUS_BAD_PARAMETER;
+
+   WRITE_REG32(DC_PAL_ADDRESS, index);
+   data = READ_REG32(DC_PAL_DATA);
+   data = ((data << 2) & 0x000000FC) |
+	 ((data << 4) & 0x0000FC00) | ((data << 6) & 0x00FC0000);
+
+   *palette = data;
+
+   return 0;
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_display_palette
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+void
+gu1_get_display_palette(unsigned long *palette)
+#else
+void
+gfx_get_display_palette(unsigned long *palette)
+#endif
+{
+   unsigned long i, data;
+
+   WRITE_REG32(DC_PAL_ADDRESS, 0);
+   for (i = 0; i < 256; i++) {
+      data = READ_REG32(DC_PAL_DATA);
+      data = ((data << 2) & 0x000000FC) |
+	    ((data << 4) & 0x0000FC00) | ((data << 6) & 0x00FC0000);
+      palette[i] = data;
+   }
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_cursor_enable
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+unsigned long
+gu1_get_cursor_enable(void)
+#else
+unsigned long
+gfx_get_cursor_enable(void)
+#endif
+{
+   return (READ_REG32(DC_GENERAL_CFG) & DC_GCFG_CURE);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_cursor_position
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+unsigned long
+gu1_get_cursor_position(void)
+#else
+unsigned long
+gfx_get_cursor_position(void)
+#endif
+{
+   return ((READ_REG32(DC_CURSOR_X) & 0x07FF) |
+	   ((READ_REG32(DC_CURSOR_Y) << 16) & 0x03FF0000));
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_cursor_clip
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+unsigned long
+gu1_get_cursor_clip(void)
+#else
+unsigned long
+gfx_get_cursor_clip(void)
+#endif
+{
+   return (((READ_REG32(DC_CURSOR_X) >> 11) & 0x01F) |
+	   ((READ_REG32(DC_CURSOR_Y) << 5) & 0x1F0000));
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_cursor_color
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+unsigned long
+gu1_get_cursor_color(int color)
+#else
+unsigned long
+gfx_get_cursor_color(int color)
+#endif
+{
+   unsigned long data;
+
+   if (color) {
+      WRITE_REG32(DC_PAL_ADDRESS, 0x101);
+   } else {
+      WRITE_REG32(DC_PAL_ADDRESS, 0x100);
+   }
+   data = READ_REG32(DC_PAL_DATA);
+   data = ((data << 6) & 0x00FC0000) |
+	 ((data << 4) & 0x0000FC00) | ((data << 2) & 0x000000FC);
+   return (data);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_compression_enable
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+int
+gu1_get_compression_enable(void)
+#else
+int
+gfx_get_compression_enable(void)
+#endif
+{
+   unsigned long gcfg;
+
+   gcfg = READ_REG32(DC_GENERAL_CFG);
+   if (gcfg & DC_GCFG_CMPE)
+      return (1);
+   else
+      return (0);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_compression_offset
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+unsigned long
+gu1_get_compression_offset(void)
+#else
+unsigned long
+gfx_get_compression_offset(void)
+#endif
+{
+   unsigned long offset;
+
+   offset = READ_REG32(DC_CB_ST_OFFSET) & 0x003FFFFF;
+   return (offset);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_compression_pitch
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+unsigned short
+gu1_get_compression_pitch(void)
+#else
+unsigned short
+gfx_get_compression_pitch(void)
+#endif
+{
+   unsigned short pitch;
+
+   pitch = (unsigned short)(READ_REG32(DC_LINE_DELTA) >> 12) & 0x07FF;
+   return (pitch << 2);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_compression_size
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+unsigned short
+gu1_get_compression_size(void)
+#else
+unsigned short
+gfx_get_compression_size(void)
+#endif
+{
+   unsigned short size;
+
+   size = (unsigned short)((READ_REG32(DC_BUF_SIZE) >> 9) & 0x7F) - 1;
+   return ((size << 2) + 16);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_valid_bit
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+int
+gu1_get_valid_bit(int line)
+#else
+int
+gfx_get_valid_bit(int line)
+#endif
+{
+   int valid;
+
+   WRITE_REG32(MC_DR_ADD, line);
+   valid = (int)READ_REG32(MC_DR_ACC) & 1;
+   return (valid);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_display_video_offset (PRIVATE ROUTINE - NOT PART OF API)
+ *
+ * This routine is called by "gfx_get_video_offset".  It abstracts the 
+ * version of the display controller from the video overlay routines.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+unsigned long
+gu1_get_display_video_offset(void)
+#else
+unsigned long
+gfx_get_display_video_offset(void)
+#endif
+{
+   return (READ_REG32(DC_VID_ST_OFFSET) & 0x003FFFFF);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_display_video_size (PRIVATE ROUTINE - NOT PART OF API)
+ *
+ * This routine is called by "gfx_get_video_size".  It abstracts the 
+ * version of the display controller from the video overlay routines.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+unsigned long
+gu1_get_display_video_size(void)
+#else
+unsigned long
+gfx_get_display_video_size(void)
+#endif
+{
+   /* RETURN TOTAL SIZE, IN BYTES */
+
+   return ((READ_REG32(DC_BUF_SIZE) >> 10) & 0x000FFFC0);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_display_priority_high
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+int
+gu1_get_display_priority_high(void)
+#else
+int
+gfx_get_display_priority_high(void)
+#endif
+{
+   if (READ_REG32(MC_MEM_CNTRL1) & MC_XBUSARB)
+      return (1);
+   else
+      return (0);
+}
+
+#endif /* GFX_READ_ROUTINES */
+
+/* END OF FILE */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/disp_gu2.c b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/disp_gu2.c
new file mode 100644
index 000000000..ba72e88aa
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/disp_gu2.c
@@ -0,0 +1,3156 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/disp_gu2.c,v 1.4 2003/02/06 17:46:02 alanh Exp $ */
+/*
+ * $Workfile: disp_gu2.c $
+ *
+ * This file contains routines for the second generation display controller.  
+ *
+ * NSC_LIC_ALTERNATIVE_PREAMBLE
+ *
+ * Revision 1.0
+ *
+ * National Semiconductor Alternative GPL-BSD License
+ *
+ * National Semiconductor Corporation licenses this software 
+ * ("Software"):
+ *
+ *      Durango
+ *
+ * under one of the two following licenses, depending on how the 
+ * Software is received by the Licensee.
+ * 
+ * If this Software is received as part of the Linux Framebuffer or
+ * other GPL licensed software, then the GPL license designated 
+ * NSC_LIC_GPL applies to this Software; in all other circumstances 
+ * then the BSD-style license designated NSC_LIC_BSD shall apply.
+ *
+ * END_NSC_LIC_ALTERNATIVE_PREAMBLE */
+
+/* NSC_LIC_BSD
+ *
+ * National Semiconductor Corporation Open Source License for Durango
+ *
+ * (BSD License with Export Notice)
+ *
+ * Copyright (c) 1999-2001
+ * National Semiconductor Corporation.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met: 
+ *
+ *   * Redistributions of source code must retain the above copyright 
+ *     notice, this list of conditions and the following disclaimer. 
+ *
+ *   * Redistributions in binary form must reproduce the above 
+ *     copyright notice, this list of conditions and the following 
+ *     disclaimer in the documentation and/or other materials provided 
+ *     with the distribution. 
+ *
+ *   * Neither the name of the National Semiconductor Corporation nor 
+ *     the names of its contributors may be used to endorse or promote 
+ *     products derived from this software without specific prior 
+ *     written permission. 
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+ * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE,
+ * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE.
+ *
+ * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
+ * YOUR JURISDICTION. It is licensee's responsibility to comply with 
+ * any export regulations applicable in licensee's jurisdiction. Under 
+ * CURRENT (2001) U.S. export regulations this software 
+ * is eligible for export from the U.S. and can be downloaded by or 
+ * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
+ * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
+ * Syria, Sudan, Afghanistan and any other country to which the U.S. 
+ * has embargoed goods and services. 
+ *
+ * END_NSC_LIC_BSD */
+
+/* NSC_LIC_GPL
+ *
+ * National Semiconductor Corporation Gnu General Public License for Durango
+ *
+ * (GPL License with Export Notice)
+ *
+ * Copyright (c) 1999-2001
+ * National Semiconductor Corporation.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted under the terms of the GNU General 
+ * Public License as published by the Free Software Foundation; either 
+ * version 2 of the License, or (at your option) any later version  
+ *
+ * In addition to the terms of the GNU General Public License, neither 
+ * the name of the National Semiconductor Corporation nor the names of 
+ * its contributors may be used to endorse or promote products derived 
+ * from this software without specific prior written permission. 
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+ * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, 
+ * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE. See the GNU General Public License for more details. 
+ *
+ * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
+ * YOUR JURISDICTION. It is licensee's responsibility to comply with 
+ * any export regulations applicable in licensee's jurisdiction. Under 
+ * CURRENT (2001) U.S. export regulations this software 
+ * is eligible for export from the U.S. and can be downloaded by or 
+ * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
+ * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
+ * Syria, Sudan, Afghanistan and any other country to which the U.S. 
+ * has embargoed goods and services. 
+ *
+ * You should have received a copy of the GNU General Public License 
+ * along with this file; if not, write to the Free Software Foundation, 
+ * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 
+ *
+ * END_NSC_LIC_GPL */
+
+void gu2_enable_compression(void);	/* private routine definition */
+void gu2_disable_compression(void);	/* private routine definition */
+int gu2_set_display_bpp(unsigned short bpp);
+int gu2_is_display_mode_supported(int xres, int yres, int bpp, int hz);
+int gu2_set_display_mode(int xres, int yres, int bpp, int hz);
+int gu2_set_display_timings(unsigned short bpp, unsigned short flags,
+			    unsigned short hactive,
+			    unsigned short hblank_start,
+			    unsigned short hsync_start,
+			    unsigned short hsync_end,
+			    unsigned short hblank_end, unsigned short htotal,
+			    unsigned short vactive,
+			    unsigned short vblank_start,
+			    unsigned short vsync_start,
+			    unsigned short vsync_end,
+			    unsigned short vblank_end, unsigned short vtotal,
+			    unsigned long frequency);
+int gu2_set_vtotal(unsigned short vtotal);
+void gu2_set_display_pitch(unsigned short pitch);
+void gu2_set_display_offset(unsigned long offset);
+int gu2_set_display_palette_entry(unsigned long index, unsigned long palette);
+int gu2_set_display_palette(unsigned long *palette);
+void gu2_video_shutdown(void);
+void gu2_set_clock_frequency(unsigned long frequency);
+int gu2_set_crt_enable(int enable);
+void gu2_set_cursor_enable(int enable);
+void gu2_set_cursor_colors(unsigned long bkcolor, unsigned long fgcolor);
+void gu2_set_cursor_position(unsigned long memoffset,
+			     unsigned short xpos, unsigned short ypos,
+			     unsigned short xhotspot,
+			     unsigned short yhotspot);
+void gu2_set_cursor_shape32(unsigned long memoffset, unsigned long *andmask,
+			    unsigned long *xormask);
+void gu2_set_cursor_shape64(unsigned long memoffset, unsigned long *andmask,
+			    unsigned long *xormask);
+void gu2_set_icon_enable(int enable);
+void gu2_set_icon_colors(unsigned long color0, unsigned long color1,
+			 unsigned long color2);
+void gu2_set_icon_position(unsigned long memoffset, unsigned short xpos);
+void gu2_set_icon_shape64(unsigned long memoffset, unsigned long *andmask,
+			  unsigned long *xormask, unsigned int lines);
+
+int gu2_set_compression_enable(int enable);
+int gu2_set_compression_offset(unsigned long offset);
+int gu2_set_compression_pitch(unsigned short pitch);
+int gu2_set_compression_size(unsigned short size);
+void gu2_set_display_priority_high(int enable);
+int gu2_test_timing_active(void);
+int gu2_test_vertical_active(void);
+int gu2_wait_vertical_blank(void);
+void gu2_delay_milliseconds(unsigned long milliseconds);
+void gu2_delay_microseconds(unsigned long microseconds);
+void gu2_enable_panning(int x, int y);
+int gu2_set_fixed_timings(int panelResX, int panelResY, unsigned short width,
+			  unsigned short height, unsigned short bpp);
+int gu2_set_panel_present(int panelResX, int panelResY, unsigned short width,
+			  unsigned short height, unsigned short bpp);
+void gu2_reset_timing_lock(void);
+
+int gu2_get_display_details(unsigned int mode, int *xres, int *yres, int *hz);
+unsigned short gu2_get_display_pitch(void);
+int gu2_get_vsa2_softvga_enable(void);
+int gu2_get_sync_polarities(void);
+unsigned long gu2_get_clock_frequency(void);
+unsigned long gu2_get_max_supported_pixel_clock(void);
+int gu2_mode_frequency_supported(int xres, int yres, int bpp,
+				 unsigned long frequency);
+int gu2_get_refreshrate_from_frequency(int xres, int yres, int bpp, int *hz,
+				       unsigned long frequency);
+int gu2_get_refreshrate_from_mode(int xres, int yres, int bpp, int *hz,
+				  unsigned long frequency);
+int gu2_get_frequency_from_refreshrate(int xres, int yres, int bpp, int hz,
+				       int *frequency);
+int gu2_get_display_mode_count(void);
+int gu2_get_display_mode(int *xres, int *yres, int *bpp, int *hz);
+unsigned long gu2_get_frame_buffer_line_size(void);
+unsigned short gu2_get_hactive(void);
+unsigned short gu2_get_hblank_start(void);
+unsigned short gu2_get_hsync_start(void);
+unsigned short gu2_get_hsync_end(void);
+unsigned short gu2_get_hblank_end(void);
+unsigned short gu2_get_htotal(void);
+unsigned short gu2_get_vactive(void);
+unsigned short gu2_get_vline(void);
+unsigned short gu2_get_vblank_start(void);
+unsigned short gu2_get_vsync_start(void);
+unsigned short gu2_get_vsync_end(void);
+unsigned short gu2_get_vblank_end(void);
+unsigned short gu2_get_vtotal(void);
+unsigned short gu2_get_display_bpp(void);
+unsigned long gu2_get_display_offset(void);
+int gu2_get_display_palette_entry(unsigned long index,
+				  unsigned long *palette);
+void gu2_get_display_palette(unsigned long *palette);
+unsigned long gu2_get_cursor_enable(void);
+unsigned long gu2_get_cursor_offset(void);
+unsigned long gu2_get_cursor_position(void);
+unsigned long gu2_get_cursor_clip(void);
+unsigned long gu2_get_cursor_color(int color);
+unsigned long gu2_get_icon_enable(void);
+unsigned long gu2_get_icon_offset(void);
+unsigned long gu2_get_icon_position(void);
+unsigned long gu2_get_icon_color(int color);
+int gu2_get_compression_enable(void);
+unsigned long gu2_get_compression_offset(void);
+unsigned short gu2_get_compression_pitch(void);
+unsigned short gu2_get_compression_size(void);
+int gu2_get_display_priority_high(void);
+int gu2_get_valid_bit(int line);
+int gu2_set_specified_mode(DISPLAYMODE * pMode, int bpp);
+void gu2_set_display_video_size(unsigned short width, unsigned short height);
+void gu2_set_display_video_offset(unsigned long offset);
+unsigned long gu2_get_display_video_offset(void);
+unsigned long gu2_get_display_video_size(void);
+void gu2_get_display_video_yuv_pitch(unsigned long *ypitch,
+				     unsigned long *uvpitch);
+int gu2_get_display_video_downscale_enable(void);
+void gu2_set_display_video_format(unsigned long format);
+void gu2_set_display_video_enable(int enable);
+void gu2_set_display_video_yuv_offsets(unsigned long yoffset,
+				       unsigned long uoffset,
+				       unsigned long voffset);
+void gu2_set_display_video_yuv_pitch(unsigned long ypitch,
+				     unsigned long uvpitch);
+void gu2_set_display_video_downscale(unsigned short srch,
+				     unsigned short dsth);
+void gu2_set_display_video_vertical_downscale_enable(int enable);
+void gu2_get_display_video_yuv_offsets(unsigned long *yoffset,
+				       unsigned long *uoffset,
+				       unsigned long *voffset);
+unsigned long gu2_get_display_video_downscale_delta(void);
+
+ /*-----------------------------------------------------------------------------
+ * WARNING!!!! INACCURATE DELAY MECHANISM
+ *
+ * In an effort to keep the code self contained and operating system 
+ * independent, the delay loop just performs reads of a display controller
+ * register.  This time will vary for faster processors.  The delay can always
+ * be longer than intended, only effecting the time of the mode switch 
+ * (obviously want it to still be under a second).  Problems with the hardware
+ * only arise if the delay is not long enough.  
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+void
+gu2_delay_milliseconds(unsigned long milliseconds)
+#else
+void
+gfx_delay_milliseconds(unsigned long milliseconds)
+#endif
+{
+   /* ASSUME 300 MHZ 20 CLOCKS PER READ */
+
+#	define RC_READS_PER_MILLISECOND 15000L
+
+   unsigned long loop;
+
+   loop = milliseconds * RC_READS_PER_MILLISECOND;
+   while (loop-- > 0) {
+      READ_REG32(MDC_UNLOCK);
+   }
+}
+
+#if GFX_DISPLAY_DYNAMIC
+void
+gu2_delay_microseconds(unsigned long microseconds)
+#else
+void
+gfx_delay_microseconds(unsigned long microseconds)
+#endif
+{
+   /* ASSUME 400 MHz, 2 CLOCKS PER INCREMENT */
+
+   unsigned long loop_count = microseconds * 15;
+
+   while (loop_count-- > 0) {
+      READ_REG32(MDC_UNLOCK);
+   }
+}
+
+/*-----------------------------------------------------------------------------
+ * GFX_SET_DISPLAY_BPP
+ *
+ * This routine programs the bpp in the display controller.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+int
+gu2_set_display_bpp(unsigned short bpp)
+#else
+int
+gfx_set_display_bpp(unsigned short bpp)
+#endif
+{
+   unsigned long dcfg, lock;
+
+   dcfg = READ_REG32(MDC_DISPLAY_CFG) & ~(MDC_DCFG_DISP_MODE_MASK |
+					  MDC_DCFG_16BPP_MODE_MASK);
+   lock = READ_REG32(MDC_UNLOCK);
+
+   switch (bpp) {
+   case 12:
+      dcfg |= (MDC_DCFG_DISP_MODE_16BPP | MDC_DCFG_12BPP);
+      break;
+   case 15:
+      dcfg |= (MDC_DCFG_DISP_MODE_16BPP | MDC_DCFG_15BPP);
+      break;
+   case 16:
+      dcfg |= (MDC_DCFG_DISP_MODE_16BPP | MDC_DCFG_16BPP);
+      break;
+   case 32:
+      dcfg |= (MDC_DCFG_DISP_MODE_24BPP);
+      break;
+   case 8:
+      dcfg |= (MDC_DCFG_DISP_MODE_8BPP);
+      break;
+   default:
+      return GFX_STATUS_BAD_PARAMETER;
+   }
+
+   WRITE_REG32(MDC_UNLOCK, MDC_UNLOCK_VALUE);
+   WRITE_REG32(MDC_DISPLAY_CFG, dcfg);
+   WRITE_REG32(MDC_UNLOCK, lock);
+
+   /* SET BPP IN GRAPHICS PIPELINE */
+
+   gfx_set_bpp(bpp);
+
+   return 0;
+}
+
+/*-----------------------------------------------------------------------------
+ * gu2_set_specified_mode (private routine)
+ * This routine uses the parameters in the specified display mode structure
+ * to program the display controller hardware.  
+ *-----------------------------------------------------------------------------
+ */
+int
+gu2_set_specified_mode(DISPLAYMODE * pMode, int bpp)
+{
+   unsigned long unlock, value;
+   unsigned long gcfg, dcfg;
+   unsigned long size, pitch;
+   unsigned long vid_buf_size;
+   unsigned long bpp_mask, temp, dv_size;
+
+   /* CHECK WHETHER TIMING CHANGE IS ALLOWED */
+   /* Flag used for locking also overrides timing change restriction */
+
+   if (gfx_timing_lock && !(pMode->flags & GFX_MODE_LOCK_TIMING))
+      return GFX_STATUS_ERROR;
+
+   /* CLEAR PANNING OFFSETS */
+
+   DeltaX = 0;
+   DeltaY = 0;
+   panelLeft = 0;
+   panelTop = 0;
+
+   /* SET GLOBAL FLAG */
+
+   if (pMode->flags & GFX_MODE_LOCK_TIMING)
+      gfx_timing_lock = 1;
+
+   /* CHECK FOR VALID BPP                          */
+   /* As this function can be called directly from */
+   /* gfx_set_display_timings, we must correct any */
+   /* invalid bpp settings.                        */
+
+   switch (bpp) {
+   case 12:
+      bpp_mask = 0x00000900;
+      break;
+   case 15:
+      bpp_mask = 0x00000500;
+      break;
+   case 16:
+      bpp_mask = 0x00000100;
+      break;
+   case 32:
+      bpp_mask = 0x00000200;
+      break;
+   default:
+      bpp_mask = 0x00000000;
+      bpp = 8;
+      break;
+   }
+
+   gbpp = bpp;
+
+   /* DISABLE COMPRESSION */
+
+   gu2_disable_compression();
+
+   /* ALSO DISABLE VIDEO */
+   /* Use private "reset video" routine to do all that is needed. */
+   /* SC1200, for example, also disables the alpha blending regions. */
+
+   gfx_reset_video();
+
+   /* UNLOCK THE DISPLAY CONTROLLER REGISTERS */
+
+   unlock = READ_REG32(MDC_UNLOCK);
+   WRITE_REG32(MDC_UNLOCK, MDC_UNLOCK_VALUE);
+
+   /* READ THE CURRENT REGISTER VALUES */
+
+   gcfg = READ_REG32(MDC_GENERAL_CFG);
+   dcfg = READ_REG32(MDC_DISPLAY_CFG);
+
+   /* BLANK THE DISPLAY IN THE DISPLAY FILTER */
+
+   gfx_set_crt_enable(0);
+
+   /* DISABLE THE TIMING GENERATOR */
+
+   dcfg &= ~(unsigned long)MDC_DCFG_TGEN;
+   WRITE_REG32(MDC_DISPLAY_CFG, dcfg);
+
+   /* DELAY: WAIT FOR PENDING MEMORY REQUESTS                            */
+   /* This delay is used to make sure that all pending requests to the   */
+   /* memory controller have completed before disabling the FIFO load.   */
+
+   gfx_delay_milliseconds(5);
+
+   /* DISABLE DISPLAY FIFO LOAD */
+
+   gcfg &= ~(unsigned long)MDC_GCFG_DFLE;
+   WRITE_REG32(MDC_GENERAL_CFG, gcfg);
+
+   /* PRESERVE VIDEO INFORMATION */
+
+   gcfg &= (unsigned long)(MDC_GCFG_YUVM | MDC_GCFG_VDSE);
+   dcfg = 0;
+
+   /* SET THE DOT CLOCK FREQUENCY             */
+   /* Mask off the divide by two bit (bit 31) */
+
+   gfx_set_clock_frequency(pMode->frequency & 0x7FFFFFFF);
+
+   /* DELAY: WAIT FOR THE PLL TO SETTLE */
+   /* This allows the dot clock frequency that was just set to settle. */
+
+   gfx_delay_milliseconds(10);
+
+   /* SET THE GX DISPLAY CONTROLLER PARAMETERS */
+
+   WRITE_REG32(MDC_FB_ST_OFFSET, 0);
+   WRITE_REG32(MDC_CB_ST_OFFSET, 0);
+   WRITE_REG32(MDC_CURS_ST_OFFSET, 0);
+   WRITE_REG32(MDC_ICON_ST_OFFSET, 0);
+
+   /* SET LINE SIZE AND PITCH */
+   /* 1. Flat Panels must use the mode width and not  */
+   /*    the timing width to set the pitch.           */
+   /* 2. Mode sets will use a pitch that is aligned   */
+   /*    on a 1K boundary to preserve legacy.  The    */
+   /*    pitch can be overridden by a subsequent call */
+   /*    to gfx_set_display_pitch.                    */
+
+   if (PanelEnable)
+      size = ModeWidth;
+   else
+      size = pMode->hactive;
+
+   if (bpp > 8)
+      size <<= 1;
+   if (bpp > 16)
+      size <<= 1;
+
+   pitch = 1024;
+   dv_size = MDC_DV_LINE_SIZE_1024;
+
+   if (size > 1024) {
+      pitch = 2048;
+      dv_size = MDC_DV_LINE_SIZE_2048;
+   }
+   if (size > 2048) {
+      pitch = 4096;
+      dv_size = MDC_DV_LINE_SIZE_4096;
+   }
+   if (size > 4096) {
+      pitch = 8192;
+      dv_size = MDC_DV_LINE_SIZE_8192;
+   }
+   WRITE_REG32(MDC_GFX_PITCH, pitch >> 3);
+
+   /* WRITE DIRTY/VALID CONTROL WITH LINE LENGTH */
+
+   temp = READ_REG32(MDC_DV_CTL);
+   WRITE_REG32(MDC_DV_CTL, (temp & ~MDC_DV_LINE_SIZE_MASK) | dv_size);
+
+   if (PanelEnable) {
+      size = pMode->hactive;
+      if (bpp > 8)
+	 size <<= 1;
+      if (bpp > 16)
+	 size <<= 1;
+   }
+
+   /* SAVE PREVIOUSLY STORED VIDEO LINE SIZE */
+
+   vid_buf_size = READ_REG32(MDC_LINE_SIZE) & 0xFF000000;
+
+   /* ADD 2 TO SIZE FOR POSSIBLE START ADDRESS ALIGNMENTS */
+
+   WRITE_REG32(MDC_LINE_SIZE, ((size >> 3) + 2) | vid_buf_size);
+
+   /* ALWAYS ENABLE VIDEO AND GRAPHICS DATA            */
+   /* These bits are relics from a previous design and */
+   /* should always be enabled.                        */
+
+   dcfg |= (unsigned long)(MDC_DCFG_VDEN | MDC_DCFG_GDEN);
+
+   /* SET PIXEL FORMAT */
+
+   dcfg |= bpp_mask;
+
+   /* ENABLE TIMING GENERATOR, TIM. REG. UPDATES, PALETTE BYPASS */
+   /* AND VERT. INT. SELECT                                      */
+
+   dcfg |=
+	 (unsigned long)(MDC_DCFG_TGEN | MDC_DCFG_TRUP | MDC_DCFG_PALB |
+			 MDC_DCFG_VISL);
+
+   /* DISABLE ADDRESS MASKS */
+
+   dcfg |= MDC_DCFG_A20M;
+   dcfg |= MDC_DCFG_A18M;
+
+   /* SET FIFO PRIORITIES AND DISPLAY FIFO LOAD ENABLE     */
+   /* Set the priorities higher for high resolution modes. */
+
+   if (pMode->hactive > 1024 || bpp == 32)
+      gcfg |= 0x000A901;
+   else
+      gcfg |= 0x0006501;
+
+   /* ENABLE FLAT PANEL CENTERING                          */
+   /* For panel modes having a resolution smaller than the */
+   /* panel resolution, turn on data centering.            */
+
+   if (PanelEnable && ModeWidth < PanelWidth)
+      dcfg |= MDC_DCFG_DCEN;
+
+   /* COMBINE AND SET TIMING VALUES */
+
+   value = (unsigned long)(pMode->hactive - 1) |
+	 (((unsigned long)(pMode->htotal - 1)) << 16);
+   WRITE_REG32(MDC_H_ACTIVE_TIMING, value);
+   value = (unsigned long)(pMode->hblankstart - 1) |
+	 (((unsigned long)(pMode->hblankend - 1)) << 16);
+   WRITE_REG32(MDC_H_BLANK_TIMING, value);
+   value = (unsigned long)(pMode->hsyncstart - 1) |
+	 (((unsigned long)(pMode->hsyncend - 1)) << 16);
+   WRITE_REG32(MDC_H_SYNC_TIMING, value);
+   value = (unsigned long)(pMode->vactive - 1) |
+	 (((unsigned long)(pMode->vtotal - 1)) << 16);
+   WRITE_REG32(MDC_V_ACTIVE_TIMING, value);
+   value = (unsigned long)(pMode->vblankstart - 1) |
+	 (((unsigned long)(pMode->vblankend - 1)) << 16);
+   WRITE_REG32(MDC_V_BLANK_TIMING, value);
+   value = (unsigned long)(pMode->vsyncstart - 1) |
+	 (((unsigned long)(pMode->vsyncend - 1)) << 16);
+   WRITE_REG32(MDC_V_SYNC_TIMING, value);
+
+   WRITE_REG32(MDC_DISPLAY_CFG, dcfg);
+   WRITE_REG32(MDC_GENERAL_CFG, gcfg);
+
+   /* CONFIGURE DISPLAY OUTPUT FROM VIDEO PROCESSOR */
+
+   gfx_set_display_control(((pMode->flags & GFX_MODE_NEG_HSYNC) ? 1 : 0) |
+			   ((pMode->flags & GFX_MODE_NEG_VSYNC) ? 2 : 0));
+
+   /* RESTORE VALUE OF MDC_UNLOCK */
+
+   WRITE_REG32(MDC_UNLOCK, unlock);
+
+   /* RESET THE PITCH VALUES IN THE GP */
+
+   gfx_reset_pitch((unsigned short)pitch);
+
+   gfx_set_bpp((unsigned short)bpp);
+
+   return GFX_STATUS_OK;
+}
+
+ /*----------------------------------------------------------------------------
+ * GFX_IS_DISPLAY_MODE_SUPPORTED
+ *
+ * This routine sets the specified display mode.
+ *
+ * Returns 1 if successful, 0 if mode could not be set.
+ *----------------------------------------------------------------------------  
+ */
+#if GFX_DISPLAY_DYNAMIC
+int
+gu2_is_display_mode_supported(int xres, int yres, int bpp, int hz)
+#else
+int
+gfx_is_display_mode_supported(int xres, int yres, int bpp, int hz)
+#endif
+{
+   unsigned int mode;
+   unsigned long hz_flag = 0, bpp_flag = 0;
+
+   /* SET FLAGS TO MATCH REFRESH RATE */
+
+   if (hz == 56)
+      hz_flag = GFX_MODE_56HZ;
+   if (hz == 60)
+      hz_flag = GFX_MODE_60HZ;
+   if (hz == 70)
+      hz_flag = GFX_MODE_70HZ;
+   if (hz == 72)
+      hz_flag = GFX_MODE_72HZ;
+   if (hz == 75)
+      hz_flag = GFX_MODE_75HZ;
+   if (hz == 85)
+      hz_flag = GFX_MODE_85HZ;
+
+   /* SET BPP FLAGS TO LIMIT MODE SELECTION */
+
+   switch (bpp) {
+   case 8:
+      bpp_flag = GFX_MODE_8BPP;
+      break;
+   case 12:
+      bpp_flag = GFX_MODE_12BPP;
+      break;
+   case 15:
+      bpp_flag = GFX_MODE_15BPP;
+      break;
+   case 16:
+      bpp_flag = GFX_MODE_16BPP;
+      break;
+   case 32:
+      bpp_flag = GFX_MODE_24BPP;
+      break;
+   default:
+      return (-1);
+   }
+
+   /* LOOP THROUGH THE AVAILABLE MODES TO FIND A MATCH */
+
+   for (mode = 0; mode < NUM_RC_DISPLAY_MODES; mode++) {
+      if ((DisplayParams[mode].hactive == (unsigned short)xres) &&
+	  (DisplayParams[mode].vactive == (unsigned short)yres) &&
+	  (DisplayParams[mode].flags & hz_flag) &&
+	  (DisplayParams[mode].flags & bpp_flag)) {
+
+	 /* REDCLOUD DOES NOT SUPPORT EMULATED VGA MODES */
+
+	 if ((DisplayParams[mode].flags & GFX_MODE_PIXEL_DOUBLE) ||
+	     (DisplayParams[mode].flags & GFX_MODE_LINE_DOUBLE))
+	    continue;
+
+	 /* SET THE DISPLAY CONTROLLER FOR THE SELECTED MODE */
+
+	 return (mode);
+      }
+   }
+   return (-1);
+}
+
+/*----------------------------------------------------------------------------
+ * gfx_set_display_mode
+ *
+ * This routine sets the specified display mode.
+ *
+ * Returns 1 if successful, 0 if mode could not be set.
+ *----------------------------------------------------------------------------  
+ */
+#if GFX_DISPLAY_DYNAMIC
+int
+gu2_set_display_mode(int xres, int yres, int bpp, int hz)
+#else
+int
+gfx_set_display_mode(int xres, int yres, int bpp, int hz)
+#endif
+{
+   int mode;
+
+   /* DISABLE FLAT PANEL */
+   /* Flat Panel settings are enabled by the function gfx_set_fixed_timings */
+   /* and disabled by gfx_set_display_mode.                                 */
+
+   PanelEnable = 0;
+
+   mode = gfx_is_display_mode_supported(xres, yres, bpp, hz);
+   if (mode >= 0) {
+      if (gu2_set_specified_mode(&DisplayParams[mode], bpp) == GFX_STATUS_OK)
+	 return (1);
+   }
+   return (0);
+}
+
+/*----------------------------------------------------------------------------
+ * GFX_SET_DISPLAY_TIMINGS
+ *
+ * This routine sets the display controller mode using the specified timing
+ * values (as opposed to using the tables internal to Durango).
+ *
+ * Returns GFX_STATUS_OK ON SUCCESS, GFX_STATUS_ERROR otherwise.
+ *----------------------------------------------------------------------------  
+ */
+#if GFX_DISPLAY_DYNAMIC
+int
+gu2_set_display_timings(unsigned short bpp, unsigned short flags,
+			unsigned short hactive, unsigned short hblankstart,
+			unsigned short hsyncstart, unsigned short hsyncend,
+			unsigned short hblankend, unsigned short htotal,
+			unsigned short vactive, unsigned short vblankstart,
+			unsigned short vsyncstart, unsigned short vsyncend,
+			unsigned short vblankend, unsigned short vtotal,
+			unsigned long frequency)
+#else
+int
+gfx_set_display_timings(unsigned short bpp, unsigned short flags,
+			unsigned short hactive, unsigned short hblankstart,
+			unsigned short hsyncstart, unsigned short hsyncend,
+			unsigned short hblankend, unsigned short htotal,
+			unsigned short vactive, unsigned short vblankstart,
+			unsigned short vsyncstart, unsigned short vsyncend,
+			unsigned short vblankend, unsigned short vtotal,
+			unsigned long frequency)
+#endif
+{
+   /* SET MODE STRUCTURE WITH SPECIFIED VALUES */
+
+   gfx_display_mode.flags = 0;
+   if (flags & 1)
+      gfx_display_mode.flags |= GFX_MODE_NEG_HSYNC;
+   if (flags & 2)
+      gfx_display_mode.flags |= GFX_MODE_NEG_VSYNC;
+   if (flags & 0x1000)
+      gfx_display_mode.flags |= GFX_MODE_LOCK_TIMING;
+   gfx_display_mode.hactive = hactive;
+   gfx_display_mode.hblankstart = hblankstart;
+   gfx_display_mode.hsyncstart = hsyncstart;
+   gfx_display_mode.hsyncend = hsyncend;
+   gfx_display_mode.hblankend = hblankend;
+   gfx_display_mode.htotal = htotal;
+   gfx_display_mode.vactive = vactive;
+   gfx_display_mode.vblankstart = vblankstart;
+   gfx_display_mode.vsyncstart = vsyncstart;
+   gfx_display_mode.vsyncend = vsyncend;
+   gfx_display_mode.vblankend = vblankend;
+   gfx_display_mode.vtotal = vtotal;
+   gfx_display_mode.frequency = frequency;
+
+   /* CALL ROUTINE TO SET MODE */
+
+   return (gu2_set_specified_mode(&gfx_display_mode, bpp));
+}
+
+/*----------------------------------------------------------------------------
+ * GFX_SET_VTOTAL
+ *
+ * This routine sets the display controller vertical total to
+ * "vtotal". As a side effect it also sets vertical blank end.
+ * It should be used when only this value needs to be changed,
+ * due to speed considerations.
+ *
+ * Note: it is the caller's responsibility to make sure that
+ * a legal vtotal is used, i.e. that "vtotal" is greater than or
+ * equal to vsync end.
+ *
+ * Always returns 0.
+ *----------------------------------------------------------------------------  
+ */
+#if GFX_DISPLAY_DYNAMIC
+int
+gu2_set_vtotal(unsigned short vtotal)
+#else
+int
+gfx_set_vtotal(unsigned short vtotal)
+#endif
+{
+   unsigned long unlock, dcfg, vactive, vblank;
+
+   /* UNLOCK THE DISPLAY CONTROLLER REGISTERS */
+
+   unlock = READ_REG32(MDC_UNLOCK);
+   WRITE_REG32(MDC_UNLOCK, MDC_UNLOCK_VALUE);
+
+   /* READ THE CURRENT RC VALUES */
+
+   dcfg = READ_REG32(MDC_DISPLAY_CFG);
+   vactive = READ_REG32(MDC_V_ACTIVE_TIMING);
+   vblank = READ_REG32(MDC_V_BLANK_TIMING);
+
+   /* DISABLE TIMING REGISTER UPDATES */
+
+   WRITE_REG32(MDC_DISPLAY_CFG, dcfg & ~(unsigned long)MDC_DCFG_TRUP);
+
+   /* WRITE NEW TIMING VALUES */
+
+   WRITE_REG32(MDC_V_ACTIVE_TIMING,
+	       (vactive & MDC_VAT_VA_MASK) | (unsigned long)(vtotal -
+							     1) << 16);
+   WRITE_REG32(MDC_V_BLANK_TIMING,
+	       (vblank & MDC_VBT_VBS_MASK) | (unsigned long)(vtotal -
+							     1) << 16);
+
+   /* RESTORE OLD RC VALUES */
+
+   WRITE_REG32(MDC_DISPLAY_CFG, dcfg);
+   WRITE_REG32(MDC_UNLOCK, unlock);
+
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_display_pitch
+ *
+ * This routine sets the pitch of the frame buffer to the specified value.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+void
+gu2_set_display_pitch(unsigned short pitch)
+#else
+void
+gfx_set_display_pitch(unsigned short pitch)
+#endif
+{
+   unsigned long value = 0;
+   unsigned long lock = READ_REG32(MDC_UNLOCK);
+
+   value = READ_REG32(MDC_GFX_PITCH) & 0xFFFF0000;
+   value |= (pitch >> 3);
+   WRITE_REG32(MDC_UNLOCK, MDC_UNLOCK_VALUE);
+   WRITE_REG32(MDC_GFX_PITCH, value);
+
+   /* SET RENDERING PITCHES TO MATCH */
+
+   gfx_reset_pitch(pitch);
+
+   /* SET THE FRAME DIRTY MODE                  */
+   /* Non-standard pitches, i.e. pitches that   */
+   /* are not 1K, 2K or 4K must mark the entire */
+   /* frame as dirty when writing to the frame  */
+   /* buffer.                                   */
+
+   value = READ_REG32(MDC_GENERAL_CFG);
+
+   if (pitch == 1024 || pitch == 2048 || pitch == 4096 || pitch == 8192)
+      value &= ~(unsigned long)(MDC_GCFG_FDTY);
+   else
+      value |= (unsigned long)(MDC_GCFG_FDTY);
+
+   WRITE_REG32(MDC_GENERAL_CFG, value);
+   WRITE_REG32(MDC_UNLOCK, lock);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_display_offset
+ *
+ * This routine sets the start address of the frame buffer.  It is 
+ * typically used to pan across a virtual desktop (frame buffer larger than 
+ * the displayed screen) or to flip the display between multiple buffers.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+void
+gu2_set_display_offset(unsigned long offset)
+#else
+void
+gfx_set_display_offset(unsigned long offset)
+#endif
+{
+   /* UPDATE FRAME BUFFER OFFSET */
+   unsigned long lock;
+
+   lock = READ_REG32(MDC_UNLOCK);
+   WRITE_REG32(MDC_UNLOCK, MDC_UNLOCK_VALUE);
+
+   /* START ADDRESS EFFECTS DISPLAY COMPRESSION */
+   /* Disable compression for non-zero start addresss values.            */
+   /* Enable compression if offset is zero and comression is intended to */
+   /* be enabled from a previous call to "gfx_set_compression_enable".   */
+   /* Compression should be disabled BEFORE the offset is changed        */
+   /* and enabled AFTER the offset is changed.                           */
+
+   if (offset == 0) {
+      WRITE_REG32(MDC_FB_ST_OFFSET, offset);
+      if (gfx_compression_enabled) {
+	 /* WAIT FOR THE OFFSET TO BE LATCHED */
+	 gfx_wait_vertical_blank();
+	 gu2_enable_compression();
+      }
+   } else {
+      /* ONLY DISABLE COMPRESSION ONCE */
+
+      if (gfx_compression_active)
+	 gu2_disable_compression();
+
+      WRITE_REG32(MDC_FB_ST_OFFSET, offset);
+   }
+
+   WRITE_REG32(MDC_UNLOCK, lock);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_display_palette_entry
+ *
+ * This routine sets an palette entry in the display controller.
+ * A 32-bit X:R:G:B value.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+int
+gu2_set_display_palette_entry(unsigned long index, unsigned long palette)
+#else
+int
+gfx_set_display_palette_entry(unsigned long index, unsigned long palette)
+#endif
+{
+   if (index > 0xFF)
+      return GFX_STATUS_BAD_PARAMETER;
+
+   WRITE_REG32(MDC_PAL_ADDRESS, index);
+   WRITE_REG32(MDC_PAL_DATA, palette);
+
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_display_palette
+ *
+ * This routine sets the entire palette in the display controller.
+ * A pointer is provided to a 256 entry table of 32-bit X:R:G:B values.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+int
+gu2_set_display_palette(unsigned long *palette)
+#else
+int
+gfx_set_display_palette(unsigned long *palette)
+#endif
+{
+   unsigned long i;
+
+   WRITE_REG32(MDC_PAL_ADDRESS, 0);
+
+   if (palette) {
+      for (i = 0; i < 256; i++) {
+	 WRITE_REG32(MDC_PAL_DATA, palette[i]);
+      }
+   }
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_cursor_enable
+ *
+ * This routine enables or disables the hardware cursor.  
+ *
+ * WARNING: The cursor start offset must be set by setting the cursor 
+ * position before calling this routine to assure that memory reads do not
+ * go past the end of graphics memory (this can hang GXm).
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+void
+gu2_set_cursor_enable(int enable)
+#else
+void
+gfx_set_cursor_enable(int enable)
+#endif
+{
+   unsigned long unlock, gcfg;
+
+   /* SET OR CLEAR CURSOR ENABLE BIT */
+
+   unlock = READ_REG32(MDC_UNLOCK);
+   gcfg = READ_REG32(MDC_GENERAL_CFG);
+   if (enable)
+      gcfg |= MDC_GCFG_CURE;
+   else
+      gcfg &= ~(MDC_GCFG_CURE);
+
+   /* WRITE NEW REGISTER VALUE */
+
+   WRITE_REG32(MDC_UNLOCK, MDC_UNLOCK_VALUE);
+   WRITE_REG32(MDC_GENERAL_CFG, gcfg);
+   WRITE_REG32(MDC_UNLOCK, unlock);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_cursor_colors
+ *
+ * This routine sets the colors of the hardware cursor.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+void
+gu2_set_cursor_colors(unsigned long bkcolor, unsigned long fgcolor)
+#else
+void
+gfx_set_cursor_colors(unsigned long bkcolor, unsigned long fgcolor)
+#endif
+{
+   /* SET CURSOR COLORS */
+
+   WRITE_REG32(MDC_PAL_ADDRESS, 0x100);
+   WRITE_REG32(MDC_PAL_DATA, bkcolor);
+   WRITE_REG32(MDC_PAL_DATA, fgcolor);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_cursor_position
+ *
+ * This routine sets the position of the hardware cusror.  The starting
+ * offset of the cursor buffer must be specified so that the routine can 
+ * properly clip scanlines if the cursor is off the top of the screen.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+void
+gu2_set_cursor_position(unsigned long memoffset,
+			unsigned short xpos, unsigned short ypos,
+			unsigned short xhotspot, unsigned short yhotspot)
+#else
+void
+gfx_set_cursor_position(unsigned long memoffset,
+			unsigned short xpos, unsigned short ypos,
+			unsigned short xhotspot, unsigned short yhotspot)
+#endif
+{
+   unsigned long unlock;
+
+   short x = (short)xpos - (short)xhotspot;
+   short y = (short)ypos - (short)yhotspot;
+   short xoffset = 0;
+   short yoffset = 0;
+
+   if (x < -63)
+      return;
+   if (y < -63)
+      return;
+
+   if (PanelEnable) {
+      if ((ModeWidth > PanelWidth) || (ModeHeight > PanelHeight)) {
+	 gfx_enable_panning(xpos, ypos);
+	 x = x - (unsigned short)panelLeft;
+	 y = y - (unsigned short)panelTop;
+      }
+   }
+
+   /* ADJUST OFFSETS */
+   /* Cursor movement and panning work as follows:  The cursor position   */
+   /* refers to where the hotspot of the cursor is located.  However, for */
+   /* non-zero hotspots, the cursor buffer actually begins before the     */
+   /* specified position.                                                 */
+
+   if (x < 0) {
+      xoffset = -x;
+      x = 0;
+   }
+   if (y < 0) {
+      yoffset = -y;
+      y = 0;
+   }
+   memoffset += (unsigned long)yoffset << 4;
+
+   /* SET CURSOR POSITION */
+
+   unlock = READ_REG32(MDC_UNLOCK);
+   WRITE_REG32(MDC_UNLOCK, MDC_UNLOCK_VALUE);
+   WRITE_REG32(MDC_CURS_ST_OFFSET, memoffset);
+   WRITE_REG32(MDC_CURSOR_X, (unsigned long)x |
+	       (((unsigned long)xoffset) << 11));
+   WRITE_REG32(MDC_CURSOR_Y, (unsigned long)y |
+	       (((unsigned long)yoffset) << 11));
+   WRITE_REG32(MDC_UNLOCK, unlock);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_cursor_shape32
+ *
+ * This routine loads 32x32 cursor data into the cursor buffer in graphics memory.
+ * As the Redcloud cursor is actually 64x64, we must pad the outside of the 
+ * cursor data with transparent pixels.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+void
+gu2_set_cursor_shape32(unsigned long memoffset,
+		       unsigned long *andmask, unsigned long *xormask)
+#else
+void
+gfx_set_cursor_shape32(unsigned long memoffset,
+		       unsigned long *andmask, unsigned long *xormask)
+#endif
+{
+   int i;
+
+   for (i = 0; i < 32; i++) {
+      /* EVEN QWORDS CONTAIN THE AND MASK */
+
+      WRITE_FB32(memoffset, 0xFFFFFFFF);
+      WRITE_FB32(memoffset + 4, andmask[i]);
+
+      /* ODD QWORDS CONTAIN THE XOR MASK  */
+
+      WRITE_FB32(memoffset + 8, 0x00000000);
+      WRITE_FB32(memoffset + 12, xormask[i]);
+
+      memoffset += 16;
+   }
+
+   /* FILL THE LOWER HALF OF THE BUFFER WITH TRANSPARENT PIXELS */
+
+   for (i = 0; i < 32; i++) {
+      WRITE_FB32(memoffset, 0xFFFFFFFF);
+      WRITE_FB32(memoffset + 4, 0xFFFFFFFF);
+      WRITE_FB32(memoffset + 8, 0x00000000);
+      WRITE_FB32(memoffset + 12, 0x00000000);
+
+      memoffset += 16;
+   }
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_cursor_shape64
+ *
+ * This routine loads 64x64 cursor data into the cursor buffer in graphics memory.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+void
+gu2_set_cursor_shape64(unsigned long memoffset,
+		       unsigned long *andmask, unsigned long *xormask)
+#else
+void
+gfx_set_cursor_shape64(unsigned long memoffset,
+		       unsigned long *andmask, unsigned long *xormask)
+#endif
+{
+   int i;
+
+   for (i = 0; i < 128; i += 2) {
+      /* EVEN QWORDS CONTAIN THE AND MASK */
+      /* We invert the dwords to prevent the calling            */
+      /* application from having to think in terms of Qwords.   */
+      /* The hardware data order is actually 63:0, or 31:0 of   */
+      /* the second dword followed by 31:0 of the first dword.  */
+
+      WRITE_FB32(memoffset, andmask[i + 1]);
+      WRITE_FB32(memoffset + 4, andmask[i]);
+
+      /* ODD QWORDS CONTAIN THE XOR MASK  */
+
+      WRITE_FB32(memoffset + 8, xormask[i + 1]);
+      WRITE_FB32(memoffset + 12, xormask[i]);
+
+      memoffset += 16;
+   }
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_icon_enable
+ *
+ * This routine enables or disables the hardware icon.  The icon position
+ * and colors should be programmed prior to calling this routine for the
+ * first time.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+void
+gu2_set_icon_enable(int enable)
+#else
+void
+gfx_set_icon_enable(int enable)
+#endif
+{
+   unsigned long unlock, gcfg;
+
+   /* SET OR CLEAR ICON ENABLE BIT */
+
+   unlock = READ_REG32(MDC_UNLOCK);
+   gcfg = READ_REG32(MDC_GENERAL_CFG);
+   if (enable)
+      gcfg |= MDC_GCFG_ICNE;
+   else
+      gcfg &= ~(MDC_GCFG_ICNE);
+
+   /* WRITE NEW REGISTER VALUE */
+
+   WRITE_REG32(MDC_UNLOCK, MDC_UNLOCK_VALUE);
+   WRITE_REG32(MDC_GENERAL_CFG, gcfg);
+   WRITE_REG32(MDC_UNLOCK, unlock);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_icon_colors
+ *
+ * This routine sets the three icon colors.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+void
+gu2_set_icon_colors(unsigned long color0, unsigned long color1,
+		    unsigned long color2)
+#else
+void
+gfx_set_icon_colors(unsigned long color0, unsigned long color1,
+		    unsigned long color2)
+#endif
+{
+   /* ICON COLORS LOCATED AT PALETTE INDEXES 102-104h */
+
+   WRITE_REG32(MDC_PAL_ADDRESS, 0x102);
+
+   WRITE_REG32(MDC_PAL_DATA, color0);
+   WRITE_REG32(MDC_PAL_DATA, color1);
+   WRITE_REG32(MDC_PAL_DATA, color2);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_icon_position
+ *
+ * This routine sets the starting X coordinate for the hardware icon and the 
+ * memory offset for the icon buffer.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+void
+gu2_set_icon_position(unsigned long memoffset, unsigned short xpos)
+#else
+void
+gfx_set_icon_position(unsigned long memoffset, unsigned short xpos)
+#endif
+{
+   unsigned long lock = READ_REG32(MDC_UNLOCK);
+
+   WRITE_REG32(MDC_UNLOCK, MDC_UNLOCK_VALUE);
+
+   /* PROGRAM THE MEMORY OFFSET */
+
+   WRITE_REG32(MDC_ICON_ST_OFFSET, memoffset & 0x0FFFFFFF);
+
+   /* PROGRAM THE XCOORDINATE */
+
+   WRITE_REG32(MDC_ICON_X, (unsigned long)(xpos & 0x07FF));
+
+   WRITE_REG32(MDC_UNLOCK, lock);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_icon_shape64
+ *
+ * This routine initializes the icon buffer according to the current mode.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+void
+gu2_set_icon_shape64(unsigned long memoffset, unsigned long *andmask,
+		     unsigned long *xormask, unsigned int lines)
+#else
+void
+gfx_set_icon_shape64(unsigned long memoffset, unsigned long *andmask,
+		     unsigned long *xormask, unsigned int lines)
+#endif
+{
+   unsigned short i, height;
+
+   height = lines << 1;
+
+   for (i = 0; i < height; i += 2) {
+      /* EVEN QWORDS CONTAIN THE AND MASK     */
+      /* Swap dwords to hide qword constraint */
+
+      WRITE_FB32(memoffset, andmask[i + 1]);
+      WRITE_FB32(memoffset + 4, andmask[i]);
+
+      /* ODD QWORDS CONTAIN THE XOR MASK */
+
+      WRITE_FB32(memoffset + 8, xormask[i + 1]);
+      WRITE_FB32(memoffset + 12, xormask[i]);
+
+      memoffset += 16;
+   }
+}
+
+/*---------------------------------------------------------------------------
+ * gu2_enable_compression
+ *
+ * This is a private routine to this module (not exposed in the Durango API).
+ * It enables display compression.
+ *---------------------------------------------------------------------------
+ */
+void
+gu2_enable_compression(void)
+{
+   unsigned long unlock, gcfg, temp;
+
+   /* DO NOT ENABLE IF START ADDRESS IS NOT ZERO */
+
+   if (READ_REG32(MDC_FB_ST_OFFSET) & 0x0FFFFFFF)
+      return;
+
+   /* SET GLOBAL INDICATOR */
+
+   gfx_compression_active = 1;
+
+   /* CLEAR DIRTY/VALID BITS IN MEMORY CONTROLLER */
+   /* Software is required to do this before enabling compression.   */
+   /* Don't want controller to think that old lines are still valid. */
+   /* Writing a 1 to bit 0 of the DV Control register will force the */
+   /* hardware to clear all the valid bits.                          */
+
+   temp = READ_REG32(MDC_DV_CTL);
+   WRITE_REG32(MDC_DV_CTL, temp | 0x00000001);
+
+   /* TURN ON COMPRESSION CONTROL BITS */
+
+   unlock = READ_REG32(MDC_UNLOCK);
+   gcfg = READ_REG32(MDC_GENERAL_CFG);
+   gcfg |= MDC_GCFG_CMPE | MDC_GCFG_DECE;
+   WRITE_REG32(MDC_UNLOCK, MDC_UNLOCK_VALUE);
+   WRITE_REG32(MDC_GENERAL_CFG, gcfg);
+   WRITE_REG32(MDC_UNLOCK, unlock);
+}
+
+/*---------------------------------------------------------------------------
+ * gu2_disable_compression
+ *
+ * This is a private routine to this module (not exposed in the Durango API).
+ * It disables display compression.
+ *---------------------------------------------------------------------------
+ */
+void
+gu2_disable_compression(void)
+{
+   unsigned long unlock, gcfg;
+
+   /* SET GLOBAL INDICATOR */
+
+   gfx_compression_active = 0;
+
+   /* TURN OFF COMPRESSION CONTROL BITS */
+
+   unlock = READ_REG32(MDC_UNLOCK);
+   gcfg = READ_REG32(MDC_GENERAL_CFG);
+   gcfg &= ~(MDC_GCFG_CMPE | MDC_GCFG_DECE);
+   WRITE_REG32(MDC_UNLOCK, MDC_UNLOCK_VALUE);
+   WRITE_REG32(MDC_GENERAL_CFG, gcfg);
+   WRITE_REG32(MDC_UNLOCK, unlock);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_compression_enable
+ *
+ * This routine enables or disables display compression.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+int
+gu2_set_compression_enable(int enable)
+#else
+int
+gfx_set_compression_enable(int enable)
+#endif
+{
+   /* SET GLOBAL VARIABLE FOR INDENDED STATE */
+   /* Compression can only be enabled for non-zero start address values. */
+   /* Keep state to enable compression on start address changes. */
+
+   gfx_compression_enabled = enable;
+   if (enable)
+      gu2_enable_compression();
+   else
+      gu2_disable_compression();
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_compression_offset
+ *
+ * This routine sets the base offset for the compression buffer.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+int
+gu2_set_compression_offset(unsigned long offset)
+#else
+int
+gfx_set_compression_offset(unsigned long offset)
+#endif
+{
+   unsigned long lock;
+
+   /* MUST BE 16-BYTE ALIGNED FOR REDCLOUD */
+
+   if (offset & 0x0F)
+      return (1);
+
+   /* SET REGISTER VALUE */
+
+   lock = READ_REG32(MDC_UNLOCK);
+   WRITE_REG32(MDC_UNLOCK, MDC_UNLOCK_VALUE);
+   WRITE_REG32(MDC_CB_ST_OFFSET, offset & 0x0FFFFFFF);
+   WRITE_REG32(MDC_UNLOCK, lock);
+
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_compression_pitch
+ *
+ * This routine sets the pitch, in bytes, of the compression buffer. 
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+int
+gu2_set_compression_pitch(unsigned short pitch)
+#else
+int
+gfx_set_compression_pitch(unsigned short pitch)
+#endif
+{
+   unsigned long lock, line_delta;
+
+   lock = READ_REG32(MDC_UNLOCK);
+
+   /* SET REGISTER VALUE */
+
+   line_delta = READ_REG32(MDC_GFX_PITCH) & 0x0000FFFF;
+   line_delta |= (((unsigned long)pitch << 13) & 0xFFFF0000);
+   WRITE_REG32(MDC_UNLOCK, MDC_UNLOCK_VALUE);
+   WRITE_REG32(MDC_GFX_PITCH, line_delta);
+   WRITE_REG32(MDC_UNLOCK, lock);
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_compression_size
+ *
+ * This routine sets the line size of the compression buffer, which is the
+ * maximum number of bytes allowed to store a compressed line.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+int
+gu2_set_compression_size(unsigned short size)
+#else
+int
+gfx_set_compression_size(unsigned short size)
+#endif
+{
+   unsigned long lock, buf_size;
+
+   /* SUBTRACT 32 FROM SIZE                          */
+   /* The display controller will actually write     */
+   /* 4 extra QWords.  So, if we assume that "size"  */
+   /* refers to the allocated size, we must subtract */
+   /* 32 bytes.                                      */
+
+   size -= 32;
+
+   /* SET REGISTER VALUE */
+
+   lock = READ_REG32(MDC_UNLOCK);
+   buf_size = READ_REG32(MDC_LINE_SIZE) & 0xFF80FFFF;
+   buf_size |= ((((unsigned long)size >> 3) + 1) & 0x7F) << 16;
+   WRITE_REG32(MDC_UNLOCK, MDC_UNLOCK_VALUE);
+   WRITE_REG32(MDC_LINE_SIZE, buf_size);
+   WRITE_REG32(MDC_UNLOCK, lock);
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_display_video_format (PRIVATE ROUTINE - NOT PART OF API)
+ *
+ * This routine is called by "gfx_set_video_format".  It abstracts the 
+ * version of the display controller from the video overlay routines.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+void
+gu2_set_display_video_format(unsigned long format)
+#else
+void
+gfx_set_display_video_format(unsigned long format)
+#endif
+{
+   unsigned long gcfg, lock;
+
+   lock = READ_REG32(MDC_UNLOCK);
+   gcfg = READ_REG32(MDC_GENERAL_CFG);
+
+   switch (format) {
+   case VIDEO_FORMAT_Y0Y1Y2Y3:
+   case VIDEO_FORMAT_Y3Y2Y1Y0:
+   case VIDEO_FORMAT_Y1Y0Y3Y2:
+   case VIDEO_FORMAT_Y1Y2Y3Y0:
+
+      gcfg |= MDC_GCFG_YUVM;
+      break;
+
+   default:
+
+      gcfg &= ~MDC_GCFG_YUVM;
+      break;
+   }
+
+   WRITE_REG32(MDC_UNLOCK, MDC_UNLOCK_VALUE);
+   WRITE_REG32(MDC_GENERAL_CFG, gcfg);
+   WRITE_REG32(MDC_UNLOCK, lock);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_display_video_enable (PRIVATE ROUTINE - NOT PART OF API)
+ *
+ * This routine is called by "gfx_set_video_enable".  It abstracts the 
+ * version of the display controller from the video overlay routines.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+void
+gu2_set_display_video_enable(int enable)
+#else
+void
+gfx_set_display_video_enable(int enable)
+#endif
+{
+   unsigned long lock, gcfg, dcfg;
+
+   /* READ CURRENT VALUES */
+
+   lock = READ_REG32(MDC_UNLOCK);
+   gcfg = READ_REG32(MDC_GENERAL_CFG);
+   dcfg = READ_REG32(MDC_DISPLAY_CFG);
+
+   /* SET OR CLEAR VIDEO ENABLE IN GENERAL_CFG */
+
+   if (enable)
+      gcfg |= MDC_GCFG_VIDE;
+   else
+      gcfg &= ~MDC_GCFG_VIDE;
+
+   /* WRITE REGISTER */
+
+   WRITE_REG32(MDC_UNLOCK, MDC_UNLOCK_VALUE);
+   WRITE_REG32(MDC_GENERAL_CFG, gcfg);
+   WRITE_REG32(MDC_UNLOCK, lock);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_display_video_size (PRIVATE ROUTINE - NOT PART OF API)
+ *
+ * This routine is called by "gfx_set_video_size".  It abstracts the 
+ * version of the display controller from the video overlay routines.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+void
+gu2_set_display_video_size(unsigned short width, unsigned short height)
+#else
+void
+gfx_set_display_video_size(unsigned short width, unsigned short height)
+#endif
+{
+   unsigned long lock, value, yuv_420;
+
+   /* READ CURRENT VALUES */
+
+   lock = READ_REG32(MDC_UNLOCK);
+   value = READ_REG32(MDC_LINE_SIZE) & 0x00FFFFFF;
+   yuv_420 = READ_REG32(MDC_GENERAL_CFG) & MDC_GCFG_YUVM;
+
+   /* LINE WIDTH IS 1/4 FOR 4:2:0 VIDEO */
+   /* All data must be 32-byte aligned. */
+
+   if (yuv_420) {
+      width >>= 1;
+      width = (width + 7) & 0xFFF8;
+   } else {
+      width <<= 1;
+      width = (width + 31) & 0xFFE0;
+   }
+
+   /* ONLY THE LINE SIZE IS PROGRAMMED IN THE DISPLAY CONTROLLER */
+
+   value |= ((unsigned long)width << 21);
+
+   /* WRITE THE REGISTER */
+
+   WRITE_REG32(MDC_UNLOCK, MDC_UNLOCK_VALUE);
+   WRITE_REG32(MDC_LINE_SIZE, value);
+   WRITE_REG32(MDC_UNLOCK, lock);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_display_video_offset (PRIVATE ROUTINE - NOT PART OF API)
+ *
+ * This routine is called by "gfx_set_video_offset".  It abstracts the 
+ * version of the display controller from the video overlay routines.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+void
+gu2_set_display_video_offset(unsigned long offset)
+#else
+void
+gfx_set_display_video_offset(unsigned long offset)
+#endif
+{
+   unsigned long lock;
+
+   lock = READ_REG32(MDC_UNLOCK);
+   WRITE_REG32(MDC_UNLOCK, MDC_UNLOCK_VALUE);
+   offset &= 0x0FFFFFF0;
+   WRITE_REG32(MDC_VID_Y_ST_OFFSET, offset);
+   WRITE_REG32(MDC_UNLOCK, lock);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_display_video_yuv_offsets (PRIVATE ROUTINE - NOT PART OF API)
+ *
+ * This routine is called by gfx_set_video_yuv_offsets.  It abstracts the version
+ * of the display controller from the video overlay routines.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+void
+gu2_set_display_video_yuv_offsets(unsigned long yoffset,
+				  unsigned long uoffset,
+				  unsigned long voffset)
+#else
+void
+gfx_set_display_video_yuv_offsets(unsigned long yoffset,
+				  unsigned long uoffset,
+				  unsigned long voffset)
+#endif
+{
+   unsigned long lock;
+
+   lock = READ_REG32(MDC_UNLOCK);
+
+   yoffset &= 0x0FFFFFF0;
+   uoffset &= 0x0FFFFFF8;
+   voffset &= 0x0FFFFFF8;
+
+   WRITE_REG32(MDC_UNLOCK, MDC_UNLOCK_VALUE);
+   WRITE_REG32(MDC_VID_Y_ST_OFFSET, yoffset);
+   WRITE_REG32(MDC_VID_U_ST_OFFSET, uoffset);
+   WRITE_REG32(MDC_VID_V_ST_OFFSET, voffset);
+   WRITE_REG32(MDC_UNLOCK, lock);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_display_video_yuv_pitch (PRIVATE ROUTINE - NOT PART OF API)
+ *
+ * This routine is called by gfx_set_video_yuv_pitch.  It abstracts the version
+ * of the display controller from the video overlay routines.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+void
+gu2_set_display_video_yuv_pitch(unsigned long ypitch, unsigned long uvpitch)
+#else
+void
+gfx_set_display_video_yuv_pitch(unsigned long ypitch, unsigned long uvpitch)
+#endif
+{
+   unsigned long lock, pitch;
+
+   lock = READ_REG32(MDC_UNLOCK);
+
+   pitch = ((uvpitch << 13) & 0xFFFF0000) | ((ypitch >> 3) & 0xFFFF);
+
+   WRITE_REG32(MDC_UNLOCK, MDC_UNLOCK_VALUE);
+   WRITE_REG32(MDC_VID_YUV_PITCH, pitch);
+   WRITE_REG32(MDC_UNLOCK, lock);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_display_video_downscale (PRIVATE ROUTINE - NOT PART OF API)
+ *
+ * This routine is called by gfx_set_video_vertical_downscale.  It abstracts the version
+ * of the display controller from the video overlay routines.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+void
+gu2_set_display_video_downscale(unsigned short srch, unsigned short dsth)
+#else
+void
+gfx_set_display_video_downscale(unsigned short srch, unsigned short dsth)
+#endif
+{
+   unsigned long lock, delta;
+
+   lock = READ_REG32(MDC_UNLOCK);
+
+   /* CLIP SCALING LIMITS */
+   /* Upscaling is performed in a separate function. */
+   /* Maximum scale ratio is 1/2.                    */
+
+   if (dsth > srch || dsth <= (srch >> 1))
+      delta = 0;
+   else
+      delta = (((unsigned long)srch << 14) / (unsigned long)dsth) << 18;
+
+   WRITE_REG32(MDC_UNLOCK, MDC_UNLOCK_VALUE);
+   WRITE_REG32(MDC_VID_DS_DELTA, delta);
+   WRITE_REG32(MDC_UNLOCK, lock);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_display_video_downscale_enable (PRIVATE ROUTINE - NOT PART OF API)
+ *
+ * This routine is called by "gfx_set_video_vertical_downscale_enable".  It abstracts the 
+ * version of the display controller from the video overlay routines.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+void
+gu2_set_display_video_vertical_downscale_enable(int enable)
+#else
+void
+gfx_set_display_video_vertical_downscale_enable(int enable)
+#endif
+{
+   unsigned long gcfg, unlock;
+
+   unlock = READ_REG32(MDC_UNLOCK);
+   gcfg = READ_REG32(MDC_GENERAL_CFG);
+
+   if (enable)
+      gcfg |= MDC_GCFG_VDSE;
+   else
+      gcfg &= ~MDC_GCFG_VDSE;
+
+   WRITE_REG32(MDC_UNLOCK, MDC_UNLOCK_VALUE);
+   WRITE_REG32(MDC_GENERAL_CFG, gcfg);
+   WRITE_REG32(MDC_UNLOCK, unlock);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_test_timing_active
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+int
+gu2_test_timing_active(void)
+#else
+int
+gfx_test_timing_active(void)
+#endif
+{
+   if (READ_REG32(MDC_DISPLAY_CFG) & MDC_DCFG_TGEN)
+      return (1);
+   else
+      return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_test_vertical_active
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+int
+gu2_test_vertical_active(void)
+#else
+int
+gfx_test_vertical_active(void)
+#endif
+{
+   if (READ_REG32(MDC_LINE_CNT_STATUS) & MDC_LNCNT_VNA)
+      return (0);
+
+   return (1);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_wait_vertical_blank
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+int
+gu2_wait_vertical_blank(void)
+#else
+int
+gfx_wait_vertical_blank(void)
+#endif
+{
+   if (gfx_test_timing_active()) {
+      while (!gfx_test_vertical_active()) ;
+      while (gfx_test_vertical_active()) ;
+   }
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_enable_panning 
+ *
+ * This routine  enables the panning when the Mode is bigger than the panel
+ * size.
+ *---------------------------------------------------------------------------
+ */
+
+#if GFX_DISPLAY_DYNAMIC
+void
+gu2_enable_panning(int x, int y)
+#else
+void
+gfx_enable_panning(int x, int y)
+#endif
+{
+   unsigned long modeBytesPerPixel;
+   unsigned long modeBytesPerScanline = 0;
+   unsigned long startAddress = 0;
+
+   modeBytesPerPixel = (gbpp + 7) / 8;
+   modeBytesPerScanline = (READ_REG32(MDC_GFX_PITCH) & 0x0000FFFF) << 3;
+
+   /* TEST FOR NO-WORK */
+
+   if (x >= DeltaX && x < ((int)PanelWidth + DeltaX) &&
+       y >= DeltaY && y < ((int)PanelHeight + DeltaY))
+      return;
+
+   /* ADJUST PANNING VARIABLES WHEN CURSOR EXCEEDS BOUNDARY       */
+   /* Test the boundary conditions for each coordinate and update */
+   /* all variables and the starting offset accordingly.          */
+
+   if (x < DeltaX)
+      DeltaX = x;
+
+   else if (x >= (DeltaX + (int)PanelWidth))
+      DeltaX = x - (int)PanelWidth + 1;
+
+   if (y < DeltaY)
+      DeltaY = y;
+
+   else if (y >= (DeltaY + (int)PanelHeight))
+      DeltaY = y - (int)PanelHeight + 1;
+
+   /* CALCULATE THE START OFFSET */
+
+   startAddress =
+	 (DeltaX * modeBytesPerPixel) + (DeltaY * modeBytesPerScanline);
+
+   gfx_set_display_offset(startAddress);
+
+   /* SET PANEL COORDINATES                    */
+   /* Panel's x position must be DWORD aligned */
+
+   panelTop = DeltaY;
+   panelLeft = DeltaX * modeBytesPerPixel;
+
+   if (panelLeft & 3)
+      panelLeft = (panelLeft & 0xFFFFFFFC) + 4;
+
+   panelLeft /= modeBytesPerPixel;
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_fixed_timings
+ *---------------------------------------------------------------------------
+ */
+
+#if GFX_DISPLAY_DYNAMIC
+int
+gu2_set_fixed_timings(int panelResX, int panelResY, unsigned short width,
+		      unsigned short height, unsigned short bpp)
+#else
+int
+gfx_set_fixed_timings(int panelResX, int panelResY, unsigned short width,
+		      unsigned short height, unsigned short bpp)
+#endif
+{
+   unsigned int mode;
+
+   ModeWidth = width;
+   ModeHeight = height;
+   PanelWidth = (unsigned short)panelResX;
+   PanelHeight = (unsigned short)panelResY;
+   PanelEnable = 1;
+
+   /* LOOP THROUGH THE AVAILABLE MODES TO FIND A MATCH */
+   for (mode = 0; mode < NUM_FIXED_TIMINGS_MODES; mode++) {
+      if ((FixedParams[mode].xres == width) &&
+	  (FixedParams[mode].yres == height) &&
+	  (FixedParams[mode].panelresx == panelResX) &&
+	  (FixedParams[mode].panelresy == panelResY)) {
+
+	 /* SET THE 92xx FOR THE SELECTED MODE */
+	 FIXEDTIMINGS *fmode = &FixedParams[mode];
+
+	 gfx_set_display_timings(bpp, 3, fmode->hactive, fmode->hblankstart,
+				 fmode->hsyncstart, fmode->hsyncend,
+				 fmode->hblankend, fmode->htotal,
+				 fmode->vactive, fmode->vblankstart,
+				 fmode->vsyncstart, fmode->vsyncend,
+				 fmode->vblankend, fmode->vtotal,
+				 fmode->frequency);
+
+	 return (1);
+      }					/* end if() */
+   }					/* end for() */
+
+   return (-1);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_panel_present
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+int
+gu2_set_panel_present(int panelResX, int panelResY, unsigned short width,
+		      unsigned short height, unsigned short bpp)
+#else
+int
+gfx_set_panel_present(int panelResX, int panelResY, unsigned short width,
+		      unsigned short height, unsigned short bpp)
+#endif
+{
+   /* SET VALID BPP         */
+   /* 16BPP is the default. */
+
+   if (bpp != 8 && bpp != 12 && bpp != 15 && bpp != 16 && bpp != 32)
+      bpp = 16;
+
+   /* RECORD PANEL PARAMETERS */
+   /* This routine does not touch any panel timings.  It is used when custom panel */
+   /* settings are set up in advance by the BIOS or an application, but the        */
+   /* application still requires access to other panel functionality provided by   */
+   /* Durango (i.e. panning).                                                      */
+
+   ModeWidth = width;
+   ModeHeight = height;
+   PanelWidth = (unsigned short)panelResX;
+   PanelHeight = (unsigned short)panelResY;
+   PanelEnable = 1;
+   gbpp = bpp;
+
+   /* PROGRAM THE BPP IN THE DISPLAY CONTROLLER */
+
+   gfx_set_display_bpp(bpp);
+
+   return (GFX_STATUS_OK);
+}
+
+/* THE FOLLOWING READ ROUTINES ARE ALWAYS INCLUDED: */
+
+/*---------------------------------------------------------------------------
+ * gfx_get_display_pitch
+ *
+ * This routine returns the current pitch of the frame buffer, in bytes.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+unsigned short
+gu2_get_display_pitch(void)
+#else
+unsigned short
+gfx_get_display_pitch(void)
+#endif
+{
+   return ((unsigned short)(READ_REG32(MDC_GFX_PITCH) & 0x0000FFFF) << 3);
+}
+
+/*----------------------------------------------------------------------------
+ * gfx_mode_frequency_supported
+ *
+ * This routine examines if the requested mode with pixel frequency is supported.
+ *
+ * Returns >0 if successful , <0 if freq. could not be found and matched.
+ *----------------------------------------------------------------------------  
+ */
+#if GFX_DISPLAY_DYNAMIC
+int
+gu2_mode_frequency_supported(int xres, int yres, int bpp,
+			     unsigned long frequency)
+#else
+int
+gfx_mode_frequency_supported(int xres, int yres, int bpp,
+			     unsigned long frequency)
+#endif
+{
+   unsigned int index;
+   unsigned long value;
+   unsigned long bpp_flag = 0;
+
+   switch (bpp) {
+   case 8:
+      bpp_flag = GFX_MODE_8BPP;
+      break;
+   case 12:
+      bpp_flag = GFX_MODE_12BPP;
+      break;
+   case 15:
+      bpp_flag = GFX_MODE_15BPP;
+      break;
+   case 16:
+      bpp_flag = GFX_MODE_16BPP;
+      break;
+   case 32:
+      bpp_flag = GFX_MODE_24BPP;
+      break;
+   default:
+      bpp_flag = GFX_MODE_8BPP;
+      break;
+   }
+
+   for (index = 0; index < NUM_RC_DISPLAY_MODES; index++) {
+      if ((DisplayParams[index].hactive == (unsigned int)xres) &&
+	  (DisplayParams[index].vactive == (unsigned int)yres) &&
+	  (DisplayParams[index].flags & bpp_flag) &&
+	  (DisplayParams[index].frequency == frequency)) {
+	 int hz = 0;
+
+	 value = DisplayParams[index].flags;
+
+	 if (value & GFX_MODE_60HZ)
+	    hz = 60;
+	 else if (value & GFX_MODE_70HZ)
+	    hz = 70;
+	 else if (value & GFX_MODE_72HZ)
+	    hz = 72;
+	 else if (value & GFX_MODE_75HZ)
+	    hz = 75;
+	 else if (value & GFX_MODE_85HZ)
+	    hz = 85;
+	 return (hz);
+      }
+   }
+
+   return (-1);
+}
+
+/*----------------------------------------------------------------------------
+ * gfx_refreshrate_from_frequency
+ *
+ * This routine maps the frequency to close match refresh rate
+ *
+ * Returns .
+ *----------------------------------------------------------------------------  
+ */
+#if GFX_DISPLAY_DYNAMIC
+int
+gu2_get_refreshrate_from_frequency(int xres, int yres, int bpp, int *hz,
+				   unsigned long frequency)
+#else
+int
+gfx_get_refreshrate_from_frequency(int xres, int yres, int bpp, int *hz,
+				   unsigned long frequency)
+#endif
+{
+   unsigned int index, closematch = 0;
+   unsigned long value;
+   unsigned long bpp_flag = 0;
+   long min, diff;
+
+   *hz = 60;
+
+   switch (bpp) {
+   case 8:
+      bpp_flag = GFX_MODE_8BPP;
+      break;
+   case 12:
+      bpp_flag = GFX_MODE_12BPP;
+      break;
+   case 15:
+      bpp_flag = GFX_MODE_15BPP;
+      break;
+   case 16:
+      bpp_flag = GFX_MODE_16BPP;
+      break;
+   case 32:
+      bpp_flag = GFX_MODE_24BPP;
+      break;
+   default:
+      bpp_flag = GFX_MODE_8BPP;
+      break;
+   }
+
+   /* FIND THE REGISTER VALUES FOR THE DESIRED FREQUENCY */
+   /* Search the table for the closest frequency (16.16 format). */
+
+   min = 0x7fffffff;
+   for (index = 0; index < NUM_RC_DISPLAY_MODES; index++) {
+      if ((DisplayParams[index].htotal == (unsigned int)xres) &&
+	  (DisplayParams[index].vtotal == (unsigned int)yres) &&
+	  (DisplayParams[index].flags & bpp_flag)) {
+	 diff = (long)frequency - (long)DisplayParams[index].frequency;
+	 if (diff < 0)
+	    diff = -diff;
+
+	 if (diff < min) {
+	    min = diff;
+	    closematch = index;
+	 }
+      }
+   }
+
+   value = DisplayParams[closematch].flags;
+
+   if (value & GFX_MODE_56HZ)
+      *hz = 56;
+   else if (value & GFX_MODE_60HZ)
+      *hz = 60;
+   else if (value & GFX_MODE_70HZ)
+      *hz = 70;
+   else if (value & GFX_MODE_72HZ)
+      *hz = 72;
+   else if (value & GFX_MODE_75HZ)
+      *hz = 75;
+   else if (value & GFX_MODE_85HZ)
+      *hz = 85;
+
+   return (1);
+}
+
+/*----------------------------------------------------------------------------
+ * gfx_refreshrate_from_mode
+ *
+ * This routine is identical to the gfx_get_refreshrate_from_frequency,
+ * except that the active timing values are compared instead of the total
+ * values.  Some modes (such as 70Hz and 72Hz) may be confused in this routine.
+ *
+ * Returns .
+ *----------------------------------------------------------------------------  
+ */
+#if GFX_DISPLAY_DYNAMIC
+int
+gu2_get_refreshrate_from_mode(int xres, int yres, int bpp, int *hz,
+			      unsigned long frequency)
+#else
+int
+gfx_get_refreshrate_from_mode(int xres, int yres, int bpp, int *hz,
+			      unsigned long frequency)
+#endif
+{
+   unsigned int index, closematch = 0;
+   unsigned long value;
+   unsigned long bpp_flag = 0;
+   long min, diff;
+
+   *hz = 60;
+
+   switch (bpp) {
+   case 8:
+      bpp_flag = GFX_MODE_8BPP;
+      break;
+   case 12:
+      bpp_flag = GFX_MODE_12BPP;
+      break;
+   case 15:
+      bpp_flag = GFX_MODE_15BPP;
+      break;
+   case 16:
+      bpp_flag = GFX_MODE_16BPP;
+      break;
+   case 32:
+      bpp_flag = GFX_MODE_24BPP;
+      break;
+   default:
+      bpp_flag = GFX_MODE_8BPP;
+      break;
+   }
+
+   /* FIND THE REGISTER VALUES FOR THE DESIRED FREQUENCY */
+   /* Search the table for the closest frequency (16.16 format). */
+
+   min = 0x7fffffff;
+   for (index = 0; index < NUM_RC_DISPLAY_MODES; index++) {
+      if ((DisplayParams[index].hactive == (unsigned int)xres) &&
+	  (DisplayParams[index].vactive == (unsigned int)yres) &&
+	  (DisplayParams[index].flags & bpp_flag)) {
+	 diff = (long)frequency - (long)DisplayParams[index].frequency;
+	 if (diff < 0)
+	    diff = -diff;
+
+	 if (diff < min) {
+	    min = diff;
+	    closematch = index;
+	 }
+      }
+   }
+
+   value = DisplayParams[closematch].flags;
+
+   if (value & GFX_MODE_56HZ)
+      *hz = 56;
+   else if (value & GFX_MODE_60HZ)
+      *hz = 60;
+   else if (value & GFX_MODE_70HZ)
+      *hz = 70;
+   else if (value & GFX_MODE_72HZ)
+      *hz = 72;
+   else if (value & GFX_MODE_75HZ)
+      *hz = 75;
+   else if (value & GFX_MODE_85HZ)
+      *hz = 85;
+
+   return (1);
+}
+
+/*----------------------------------------------------------------------------
+ * gfx_get_frequency_from_refreshrate
+ *
+ * This routine maps the refresh rate to the closest matching PLL frequency.
+ *----------------------------------------------------------------------------  
+ */
+#if GFX_DISPLAY_DYNAMIC
+int
+gu2_get_frequency_from_refreshrate(int xres, int yres, int bpp, int hz,
+				   int *frequency)
+#else
+int
+gfx_get_frequency_from_refreshrate(int xres, int yres, int bpp, int hz,
+				   int *frequency)
+#endif
+{
+   int retval = -1;
+   unsigned long hz_flag = 0;
+   unsigned long index, bpp_flag = 0;
+
+   *frequency = 0;
+
+   if (hz == 60)
+      hz_flag = GFX_MODE_60HZ;
+   else if (hz == 70)
+      hz_flag = GFX_MODE_70HZ;
+   else if (hz == 72)
+      hz_flag = GFX_MODE_72HZ;
+   else if (hz == 75)
+      hz_flag = GFX_MODE_75HZ;
+   else if (hz == 85)
+      hz_flag = GFX_MODE_85HZ;
+
+   switch (bpp) {
+   case 8:
+      bpp_flag = GFX_MODE_8BPP;
+      break;
+   case 12:
+      bpp_flag = GFX_MODE_12BPP;
+      break;
+   case 15:
+      bpp_flag = GFX_MODE_15BPP;
+      break;
+   case 16:
+      bpp_flag = GFX_MODE_16BPP;
+      break;
+   case 32:
+      bpp_flag = GFX_MODE_24BPP;
+      break;
+   default:
+      bpp_flag = GFX_MODE_8BPP;
+      break;
+   }
+
+   /* FIND THE REGISTER VALUES FOR THE DESIRED FREQUENCY */
+   /* Search the table for the closest frequency (16.16 format). */
+
+   for (index = 0; index < NUM_RC_DISPLAY_MODES; index++) {
+      if ((DisplayParams[index].hactive == (unsigned short)xres) &&
+	  (DisplayParams[index].vactive == (unsigned short)yres) &&
+	  (DisplayParams[index].flags & bpp_flag) &&
+	  (DisplayParams[index].flags & hz_flag)) {
+	 *frequency = DisplayParams[index].frequency;
+	 retval = 1;
+      }
+   }
+   return retval;
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_max_supported_pixel_clock
+ *
+ * This routine returns the maximum recommended speed for the pixel clock.  The 
+ * return value is an integer of the format xxxyyy, where xxx.yyy is the maximum
+ * floating point pixel clock speed.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+unsigned long
+gu2_get_max_supported_pixel_clock(void)
+#else
+unsigned long
+gfx_get_max_supported_pixel_clock(void)
+#endif
+{
+   return 229500;
+}
+
+/*----------------------------------------------------------------------------
+ * gfx_get_display_mode
+ *
+ * This routine gets the specified display mode.
+ *
+ * Returns >0 if successful and mode returned, <0 if mode could not be found.
+ *----------------------------------------------------------------------------  
+ */
+#if GFX_DISPLAY_DYNAMIC
+int
+gu2_get_display_mode(int *xres, int *yres, int *bpp, int *hz)
+#else
+int
+gfx_get_display_mode(int *xres, int *yres, int *bpp, int *hz)
+#endif
+{
+   unsigned int mode = 0;
+   unsigned long pll_freq = 0, bpp_flag = 0;
+
+   *xres = gfx_get_hactive();
+   *yres = gfx_get_vactive();
+   *bpp = gfx_get_display_bpp();
+   pll_freq = gfx_get_clock_frequency();
+
+   /* SET BPP FLAGS TO LIMIT MODE SELECTION */
+
+   switch (*bpp) {
+   case 8:
+      bpp_flag = GFX_MODE_8BPP;
+      break;
+   case 12:
+      bpp_flag = GFX_MODE_12BPP;
+      break;
+   case 15:
+      bpp_flag = GFX_MODE_15BPP;
+      break;
+   case 16:
+      bpp_flag = GFX_MODE_16BPP;
+      break;
+   case 32:
+      bpp_flag = GFX_MODE_24BPP;
+      break;
+   default:
+      bpp_flag = GFX_MODE_8BPP;
+      break;
+   }
+
+   for (mode = 0; mode < NUM_RC_DISPLAY_MODES; mode++) {
+      if ((DisplayParams[mode].hactive == (unsigned int)*xres) &&
+	  (DisplayParams[mode].vactive == (unsigned int)*yres) &&
+	  (DisplayParams[mode].frequency == pll_freq) &&
+	  (DisplayParams[mode].flags & bpp_flag)) {
+
+	 pll_freq = DisplayParams[mode].flags;
+
+	 if (pll_freq & GFX_MODE_56HZ)
+	    *hz = 56;
+	 else if (pll_freq & GFX_MODE_60HZ)
+	    *hz = 60;
+	 else if (pll_freq & GFX_MODE_70HZ)
+	    *hz = 70;
+	 else if (pll_freq & GFX_MODE_72HZ)
+	    *hz = 72;
+	 else if (pll_freq & GFX_MODE_75HZ)
+	    *hz = 75;
+	 else if (pll_freq & GFX_MODE_85HZ)
+	    *hz = 85;
+
+	 return (1);
+      }
+   }
+   return (-1);
+}
+
+/*----------------------------------------------------------------------------
+ * GFX_GET_DISPLAY_DETAILS
+ *
+ * This routine gets the specified display mode.
+ *
+ * Returns 1 if successful, 0 if mode could not be get.
+ *----------------------------------------------------------------------------  
+ */
+#if GFX_DISPLAY_DYNAMIC
+int
+gu2_get_display_details(unsigned int mode, int *xres, int *yres, int *hz)
+#else
+int
+gfx_get_display_details(unsigned int mode, int *xres, int *yres, int *hz)
+#endif
+{
+   if (mode < NUM_RC_DISPLAY_MODES) {
+      if (DisplayParams[mode].flags & GFX_MODE_56HZ)
+	 *hz = 56;
+      else if (DisplayParams[mode].flags & GFX_MODE_60HZ)
+	 *hz = 60;
+      else if (DisplayParams[mode].flags & GFX_MODE_70HZ)
+	 *hz = 70;
+      else if (DisplayParams[mode].flags & GFX_MODE_72HZ)
+	 *hz = 72;
+      else if (DisplayParams[mode].flags & GFX_MODE_75HZ)
+	 *hz = 75;
+      else if (DisplayParams[mode].flags & GFX_MODE_85HZ)
+	 *hz = 85;
+
+      *xres = DisplayParams[mode].hactive;
+      *yres = DisplayParams[mode].vactive;
+
+      if (DisplayParams[mode].flags & GFX_MODE_PIXEL_DOUBLE)
+	 *xres >>= 1;
+      if (DisplayParams[mode].flags & GFX_MODE_LINE_DOUBLE)
+	 *yres >>= 1;
+
+      return (1);
+   }
+   return (0);
+}
+
+/*----------------------------------------------------------------------------
+ * GFX_GET_DISPLAY_MODE_COUNT
+ *
+ * This routine gets the number of available display modes.
+ *----------------------------------------------------------------------------  
+ */
+#if GFX_DISPLAY_DYNAMIC
+int
+gu2_get_display_mode_count(void)
+#else
+int
+gfx_get_display_mode_count(void)
+#endif
+{
+   return (NUM_RC_DISPLAY_MODES);
+}
+
+/*----------------------------------------------------------------------------
+ * gfx_get_frame_buffer_line_size
+ *
+ * Returns the current frame buffer line size, in bytes
+ *----------------------------------------------------------------------------  
+ */
+#if GFX_DISPLAY_DYNAMIC
+unsigned long
+gu2_get_frame_buffer_line_size(void)
+#else
+unsigned long
+gfx_get_frame_buffer_line_size(void)
+#endif
+{
+   return ((READ_REG32(MDC_LINE_SIZE) & 0x7FF) << 3);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_hactive
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+unsigned short
+gu2_get_hactive(void)
+#else
+unsigned short
+gfx_get_hactive(void)
+#endif
+{
+   return ((unsigned short)((READ_REG32(MDC_H_ACTIVE_TIMING) & 0x0FF8) + 8));
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_hsync_start
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+unsigned short
+gu2_get_hsync_start(void)
+#else
+unsigned short
+gfx_get_hsync_start(void)
+#endif
+{
+   return ((unsigned short)((READ_REG32(MDC_H_SYNC_TIMING) & 0x0FF8) + 8));
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_hsync_end
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+unsigned short
+gu2_get_hsync_end(void)
+#else
+unsigned short
+gfx_get_hsync_end(void)
+#endif
+{
+   return ((unsigned short)(((READ_REG32(MDC_H_SYNC_TIMING) >> 16) & 0x0FF8) +
+			    8));
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_htotal
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+unsigned short
+gu2_get_htotal(void)
+#else
+unsigned short
+gfx_get_htotal(void)
+#endif
+{
+   return ((unsigned short)(((READ_REG32(MDC_H_ACTIVE_TIMING) >> 16) & 0x0FF8)
+			    + 8));
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_vactive
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+unsigned short
+gu2_get_vactive(void)
+#else
+unsigned short
+gfx_get_vactive(void)
+#endif
+{
+   return ((unsigned short)((READ_REG32(MDC_V_ACTIVE_TIMING) & 0x07FF) + 1));
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_vsync_end
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+unsigned short
+gu2_get_vsync_end(void)
+#else
+unsigned short
+gfx_get_vsync_end(void)
+#endif
+{
+   return ((unsigned short)(((READ_REG32(MDC_V_SYNC_TIMING) >> 16) & 0x07FF) +
+			    1));
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_vtotal
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+unsigned short
+gu2_get_vtotal(void)
+#else
+unsigned short
+gfx_get_vtotal(void)
+#endif
+{
+   return ((unsigned short)(((READ_REG32(MDC_V_ACTIVE_TIMING) >> 16) & 0x07FF)
+			    + 1));
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_display_bpp
+ *
+ * This routine returns the current color depth of the active display.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+unsigned short
+gu2_get_display_bpp(void)
+#else
+unsigned short
+gfx_get_display_bpp(void)
+#endif
+{
+   unsigned long dcfg = READ_REG32(MDC_DISPLAY_CFG);
+
+   switch ((dcfg & MDC_DCFG_DISP_MODE_MASK) >> 8) {
+   case 0:
+      return (8);
+   case 2:
+      return (32);
+
+   case 1:
+
+      switch ((dcfg & MDC_DCFG_16BPP_MODE_MASK) >> 10) {
+      case 0:
+	 return (16);
+      case 1:
+	 return (15);
+      case 2:
+	 return (12);
+      default:
+	 return (0);
+      }
+   }
+
+   /* INVALID SETTING */
+
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_vline
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+unsigned short
+gu2_get_vline(void)
+#else
+unsigned short
+gfx_get_vline(void)
+#endif
+{
+   unsigned short current_scan_line;
+
+   /* Read similar value twice to ensure that the value is not transitioning */
+
+   do
+      current_scan_line =
+	    (unsigned short)(READ_REG32(MDC_LINE_CNT_STATUS) &
+			     MDC_LNCNT_V_LINE_CNT);
+   while (current_scan_line !=
+	  (unsigned short)(READ_REG32(MDC_LINE_CNT_STATUS) &
+			   MDC_LNCNT_V_LINE_CNT));
+
+   return (current_scan_line >> 16);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_display_offset
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+unsigned long
+gu2_get_display_offset(void)
+#else
+unsigned long
+gfx_get_display_offset(void)
+#endif
+{
+   return (READ_REG32(MDC_FB_ST_OFFSET) & 0x0FFFFFFF);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_cursor_offset
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+unsigned long
+gu2_get_cursor_offset(void)
+#else
+unsigned long
+gfx_get_cursor_offset(void)
+#endif
+{
+   return (READ_REG32(MDC_CURS_ST_OFFSET) & 0x0FFFFFFF);
+}
+
+#if GFX_READ_ROUTINES
+
+/*************************************************************/
+/*  READ ROUTINES  |  INCLUDED FOR DIAGNOSTIC PURPOSES ONLY  */
+/*************************************************************/
+
+/*---------------------------------------------------------------------------
+ * gfx_get_hblank_start
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+unsigned short
+gu2_get_hblank_start(void)
+#else
+unsigned short
+gfx_get_hblank_start(void)
+#endif
+{
+   return ((unsigned short)((READ_REG32(MDC_H_BLANK_TIMING) & 0x0FF8) + 8));
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_hblank_end
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+unsigned short
+gu2_get_hblank_end(void)
+#else
+unsigned short
+gfx_get_hblank_end(void)
+#endif
+{
+   return ((unsigned short)(((READ_REG32(MDC_H_BLANK_TIMING) >> 16) & 0x0FF8)
+			    + 8));
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_vblank_start
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+unsigned short
+gu2_get_vblank_start(void)
+#else
+unsigned short
+gfx_get_vblank_start(void)
+#endif
+{
+   return ((unsigned short)((READ_REG32(MDC_V_BLANK_TIMING) & 0x07FF) + 1));
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_vsync_start
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+unsigned short
+gu2_get_vsync_start(void)
+#else
+unsigned short
+gfx_get_vsync_start(void)
+#endif
+{
+   return ((unsigned short)((READ_REG32(MDC_V_SYNC_TIMING) & 0x07FF) + 1));
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_vblank_end
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+unsigned short
+gu2_get_vblank_end(void)
+#else
+unsigned short
+gfx_get_vblank_end(void)
+#endif
+{
+   return ((unsigned short)(((READ_REG32(MDC_V_BLANK_TIMING) >> 16) & 0x07FF)
+			    + 1));
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_display_palette_entry
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+int
+gu2_get_display_palette_entry(unsigned long index, unsigned long *palette)
+#else
+int
+gfx_get_display_palette_entry(unsigned long index, unsigned long *palette)
+#endif
+{
+   if (index > 0xFF)
+      return GFX_STATUS_BAD_PARAMETER;
+
+   WRITE_REG32(MDC_PAL_ADDRESS, index);
+   *palette = READ_REG32(MDC_PAL_DATA);
+
+   return 0;
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_display_palette
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+void
+gu2_get_display_palette(unsigned long *palette)
+#else
+void
+gfx_get_display_palette(unsigned long *palette)
+#endif
+{
+   unsigned long i;
+
+   WRITE_REG32(MDC_PAL_ADDRESS, 0);
+   for (i = 0; i < 256; i++) {
+      palette[i] = READ_REG32(MDC_PAL_DATA);
+   }
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_cursor_enable
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+unsigned long
+gu2_get_cursor_enable(void)
+#else
+unsigned long
+gfx_get_cursor_enable(void)
+#endif
+{
+   return (READ_REG32(MDC_GENERAL_CFG) & MDC_GCFG_CURE);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_cursor_position
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+unsigned long
+gu2_get_cursor_position(void)
+#else
+unsigned long
+gfx_get_cursor_position(void)
+#endif
+{
+   return ((READ_REG32(MDC_CURSOR_X) & 0x07FF) |
+	   ((READ_REG32(MDC_CURSOR_Y) << 16) & 0x03FF0000));
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_cursor_offset
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+unsigned long
+gu2_get_cursor_clip(void)
+#else
+unsigned long
+gfx_get_cursor_clip(void)
+#endif
+{
+   return (((READ_REG32(MDC_CURSOR_X) >> 11) & 0x03F) |
+	   ((READ_REG32(MDC_CURSOR_Y) << 5) & 0x3F0000));
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_cursor_color
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+unsigned long
+gu2_get_cursor_color(int color)
+#else
+unsigned long
+gfx_get_cursor_color(int color)
+#endif
+{
+   if (color) {
+      WRITE_REG32(MDC_PAL_ADDRESS, 0x101);
+   } else {
+      WRITE_REG32(MDC_PAL_ADDRESS, 0x100);
+   }
+   return READ_REG32(MDC_PAL_DATA);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_icon_enable
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+unsigned long
+gu2_get_icon_enable(void)
+#else
+unsigned long
+gfx_get_icon_enable(void)
+#endif
+{
+   return (READ_REG32(MDC_GENERAL_CFG) & MDC_GCFG_ICNE);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_icon_offset
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+unsigned long
+gu2_get_icon_offset(void)
+#else
+unsigned long
+gfx_get_icon_offset(void)
+#endif
+{
+   return (READ_REG32(MDC_ICON_ST_OFFSET) & 0x0FFFFFFF);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_icon_position
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+unsigned long
+gu2_get_icon_position(void)
+#else
+unsigned long
+gfx_get_icon_position(void)
+#endif
+{
+   return (READ_REG32(MDC_ICON_X) & 0x07FF);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_icon_color
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+unsigned long
+gu2_get_icon_color(int color)
+#else
+unsigned long
+gfx_get_icon_color(int color)
+#endif
+{
+   if (color >= 3)
+      return 0;
+
+   WRITE_REG32(MDC_PAL_ADDRESS, 0x102 + color);
+
+   return READ_REG32(MDC_PAL_DATA);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_compression_enable
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+int
+gu2_get_compression_enable(void)
+#else
+int
+gfx_get_compression_enable(void)
+#endif
+{
+   if (READ_REG32(MDC_GENERAL_CFG) & MDC_GCFG_CMPE)
+      return (1);
+
+   return (0);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_compression_offset
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+unsigned long
+gu2_get_compression_offset(void)
+#else
+unsigned long
+gfx_get_compression_offset(void)
+#endif
+{
+   return (READ_REG32(MDC_CB_ST_OFFSET) & 0x007FFFFF);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_compression_pitch
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+unsigned short
+gu2_get_compression_pitch(void)
+#else
+unsigned short
+gfx_get_compression_pitch(void)
+#endif
+{
+   unsigned short pitch;
+
+   pitch = (unsigned short)(READ_REG32(MDC_GFX_PITCH) >> 16);
+   return (pitch << 3);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_compression_size
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+unsigned short
+gu2_get_compression_size(void)
+#else
+unsigned short
+gfx_get_compression_size(void)
+#endif
+{
+   unsigned short size;
+
+   size = (unsigned short)((READ_REG32(MDC_LINE_SIZE) >> 16) & 0x7F) - 1;
+   return ((size << 3) + 32);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_valid_bit
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+int
+gu2_get_valid_bit(int line)
+#else
+int
+gfx_get_valid_bit(int line)
+#endif
+{
+   unsigned long offset;
+   int valid;
+
+   offset = READ_REG32(MDC_PHY_MEM_OFFSET) & 0xFF000000;
+   offset |= line;
+
+   WRITE_REG32(MDC_PHY_MEM_OFFSET, offset);
+   valid = (int)READ_REG32(MDC_DV_ACC) & 2;
+
+   if (valid)
+      return 1;
+   return 0;
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_display_video_offset (PRIVATE ROUTINE - NOT PART OF API)
+ *
+ * This routine is called by "gfx_get_video_offset".  It abstracts the 
+ * version of the display controller from the video overlay routines.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+unsigned long
+gu2_get_display_video_offset(void)
+#else
+unsigned long
+gfx_get_display_video_offset(void)
+#endif
+{
+   return (READ_REG32(MDC_VID_Y_ST_OFFSET) & 0x0FFFFFFF);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_display_video_yuv_offsets (PRIVATE ROUTINE - NOT PART OF API)
+ *
+ * This routine is called by "gfx_get_video_yuv_offsets".  It abstracts the 
+ * version of the display controller from the video overlay routines.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+void
+gu2_get_display_video_yuv_offsets(unsigned long *yoffset,
+				  unsigned long *uoffset,
+				  unsigned long *voffset)
+#else
+void
+gfx_get_display_video_yuv_offsets(unsigned long *yoffset,
+				  unsigned long *uoffset,
+				  unsigned long *voffset)
+#endif
+{
+   *yoffset = (READ_REG32(MDC_VID_Y_ST_OFFSET) & 0x0FFFFFFF);
+   *uoffset = (READ_REG32(MDC_VID_U_ST_OFFSET) & 0x0FFFFFFF);
+   *voffset = (READ_REG32(MDC_VID_V_ST_OFFSET) & 0x0FFFFFFF);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_display_video_yuv_pitch (PRIVATE ROUTINE - NOT PART OF API)
+ *
+ * This routine is called by "gfx_get_video_yuv_pitch".  It abstracts the 
+ * version of the display controller from the video overlay routines.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+void
+gu2_get_display_video_yuv_pitch(unsigned long *ypitch, unsigned long *uvpitch)
+#else
+void
+gfx_get_display_video_yuv_pitch(unsigned long *ypitch, unsigned long *uvpitch)
+#endif
+{
+   unsigned long pitch = READ_REG32(MDC_VID_YUV_PITCH);
+
+   *ypitch = ((pitch & 0xFFFF) << 3);
+   *uvpitch = (pitch >> 13) & 0x7FFF8;
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_display_video_downscale_delta (PRIVATE ROUTINE - NOT PART OF API)
+ *
+ * This routine is called by "gfx_get_video_downscale_delta".  It abstracts the 
+ * version of the display controller from the video overlay routines.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+unsigned long
+gu2_get_display_video_downscale_delta(void)
+#else
+unsigned long
+gfx_get_display_video_downscale_delta(void)
+#endif
+{
+   return (READ_REG32(MDC_VID_DS_DELTA) >> 18);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_display_video_downscale_enable (PRIVATE ROUTINE - NOT PART OF API)
+ *
+ * This routine is called by "gfx_get_video_vertical_downscale_enable".  It abstracts the 
+ * version of the display controller from the video overlay routines.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+int
+gu2_get_display_video_downscale_enable(void)
+#else
+int
+gfx_get_display_video_downscale_enable(void)
+#endif
+{
+   return ((int)((READ_REG32(MDC_GENERAL_CFG) >> 19) & 1));
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_display_video_size (PRIVATE ROUTINE - NOT PART OF API)
+ *
+ * This routine is called by "gfx_get_video_size".  It abstracts the 
+ * version of the display controller from the video overlay routines.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_DISPLAY_DYNAMIC
+unsigned long
+gu2_get_display_video_size(void)
+#else
+unsigned long
+gfx_get_display_video_size(void)
+#endif
+{
+   /* RETURN THE LINE SIZE, AS THIS IS ALL THAT IS AVAILABLE */
+
+   return ((READ_REG32(MDC_LINE_SIZE) >> 21) & 0x000007FF);
+}
+
+#endif /* GFX_READ_ROUTINES */
+
+/* END OF FILE */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/durango.c b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/durango.c
index b442035eb..56bc65a91 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/durango.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/durango.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/durango.c,v 1.2 2002/10/18 20:52:41 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/durango.c,v 1.1 2002/12/10 15:12:25 alanh Exp $ */
 /*
  * $Workfile: durango.c $
  *
@@ -149,41 +149,41 @@
  * of chipsets. 
  */
 
-#define GFX_DISPLAY_DYNAMIC			0	/* runtime selection */
+#define GFX_DISPLAY_DYNAMIC			1	/* runtime selection */
 #define GFX_DISPLAY_GU1				1	/* 1st generation display controller */
-#define GFX_DISPLAY_GU2				0	/* 2nd generation display controller */
+#define GFX_DISPLAY_GU2				1	/* 2nd generation display controller */
 
-#define GFX_INIT_DYNAMIC            0	/* runtime selection */
+#define GFX_INIT_DYNAMIC            1	/* runtime selection */
 #define GFX_INIT_GU1                1	/* Geode family      */
-#define GFX_INIT_GU2                0	/* Redcloud          */
+#define GFX_INIT_GU2                1	/* Redcloud          */
 
-#define GFX_MSR_DYNAMIC             0	/* runtime selection */
-#define GFX_MSR_REDCLOUD            0	/* Redcloud          */
+#define GFX_MSR_DYNAMIC             1	/* runtime selection */
+#define GFX_MSR_REDCLOUD            1	/* Redcloud          */
 
-#define GFX_2DACCEL_DYNAMIC			0	/* runtime selection */
+#define GFX_2DACCEL_DYNAMIC			1	/* runtime selection */
 #define GFX_2DACCEL_GU1				1	/* 1st generation 2D accelerator */
-#define GFX_2DACCEL_GU2				0	/* 2nd generation 2D accelerator */
+#define GFX_2DACCEL_GU2				1	/* 2nd generation 2D accelerator */
 
 #define GFX_VIDEO_DYNAMIC			1	/* runtime selection */
 #define GFX_VIDEO_CS5530			1	/* support for CS5530 */
 #define GFX_VIDEO_SC1200			1	/* support for SC1200 */
-#define GFX_VIDEO_REDCLOUD          0	/* support for Redcloud */
+#define GFX_VIDEO_REDCLOUD          1	/* support for Redcloud */
 
-#define GFX_VIP_DYNAMIC				0	/* runtime selection */
-#define GFX_VIP_SC1200				0	/* support for SC1200 */
+#define GFX_VIP_DYNAMIC				1	/* runtime selection */
+#define GFX_VIP_SC1200				1	/* support for SC1200 */
 
-#define GFX_DECODER_DYNAMIC			0	/* runtime selection */
-#define GFX_DECODER_SAA7114			0	/* Philips SAA7114 decoder */
+#define GFX_DECODER_DYNAMIC			1	/* runtime selection */
+#define GFX_DECODER_SAA7114			1	/* Philips SAA7114 decoder */
 
-#define GFX_TV_DYNAMIC				0	/* runtime selection */
-#define GFX_TV_FS451				0	/* Focus Enhancements FS450 */
+#define GFX_TV_DYNAMIC				1	/* runtime selection */
+#define GFX_TV_FS451				1	/* Focus Enhancements FS450 */
 #define GFX_TV_SC1200				1	/* SC1200 integrated TV encoder */
 
 #define GFX_I2C_DYNAMIC				1	/* runtime selection */
 #define GFX_I2C_ACCESS				1	/* support for ACCESS.BUS */
 #define GFX_I2C_GPIO				1	/* support for CS5530 GPIOs */
 
-#define GFX_VGA_DYNAMIC				0	/* runtime selection */
+#define GFX_VGA_DYNAMIC				1	/* runtime selection */
 #define GFX_VGA_GU1					1	/* 1st generation graphics unit */
 
 #define FB4MB						1	/* Set to use 4Mb video ram for Pyramid */
@@ -276,6 +276,7 @@ unsigned char *gfx_virt_spptr = (unsigned char *)0x40000000;
 unsigned char *gfx_virt_gpptr = (unsigned char *)0x40000000;
 
 /* DEFINE PHYSICAL ADDRESSES */
+
 unsigned char *gfx_phys_regptr = (unsigned char *)0x40000000;
 unsigned char *gfx_phys_fbptr = (unsigned char *)0x40800000;
 unsigned char *gfx_phys_vidptr = (unsigned char *)0x40010000;
@@ -314,9 +315,16 @@ gfx_msr_asm_read(unsigned short msrReg, unsigned long msrAddr,
 
    _asm {
       mov dx, 0x0AC1C
-	    mov eax, 0x0FC530007
-	    out dx, eax add dl, 2 mov ecx, msrAddr mov cx, msrReg in ax, dx;
- EDX:EAX will contain MSR contents.mov temp1, edx mov temp2, eax}
+      mov eax, 0x0FC530007
+      out dx, eax 
+      add dl, 2 
+      mov ecx, msrAddr 
+      mov cx, msrReg 
+      in ax, dx;
+      ;EDX:EAX will contain MSR contents.
+      mov temp1, edx 
+      mov temp2, eax
+   }
 
    *ptrHigh = temp1;
    *ptrLow = temp2;
@@ -330,17 +338,25 @@ gfx_msr_asm_write(unsigned short msrReg, unsigned long msrAddr,
    unsigned long temp2 = *ptrLow;
 
    _asm {
-
       mov dx, 0x0AC1C
-	    mov eax, 0x0FC530007 out dx, eax add dl, 2 mov ecx, msrAddr;
-      ECX contains msrAddr | msrReg mov cx, msrReg;
-      mov ebx, temp1;
-
-      <OR_mask_hi > mov eax, temp2;
-      <OR_mask_hi > mov esi, 0;
-      <AND_mask_hi > mov edi, 0;
-      <AND_mask_lo > out dx, ax;
-   MSR is written at this point}
+      mov eax, 0x0FC530007 
+      out dx, eax i
+      add dl, 2 
+      ;ECX contains msrAddr | msrReg 
+      mov ecx, msrAddr
+      mov cx, msrReg
+      ;<OR_mask_hi > 
+      mov ebx, temp1
+
+      ;<OR_mask_hi > 
+      mov eax, temp2
+      ;<AND_mask_hi > 
+      mov esi, 0
+      ;<AND_mask_lo > 
+      mov edi, 0
+      ;MSR is written at this point
+      out dx, ax
+   }
 }
 
 unsigned char
@@ -349,7 +365,12 @@ gfx_inb(unsigned short port)
    unsigned char data;
 
    _asm {
-   pushf mov dx, port in al, dx mov data, al popf}
+      pushf 
+      mov dx, port 
+      in al, dx 
+      mov data, al 
+      popf
+   }
    return (data);
 }
 
@@ -359,7 +380,12 @@ gfx_inw(unsigned short port)
    unsigned short data;
 
    _asm {
-   pushf mov dx, port in ax, dx mov data, ax popf}
+      pushf 
+      mov dx, port 
+      in ax, dx 
+      mov data, ax 
+      popf
+   }
    return (data);
 }
 
@@ -369,7 +395,12 @@ gfx_ind(unsigned short port)
    unsigned long data;
 
    _asm {
-   pushf mov dx, port in eax, dx mov data, eax popf}
+      pushf 
+      mov dx, port 
+      in eax, dx 
+      mov data, eax 
+      popf
+   }
    return (data);
 }
 
@@ -377,39 +408,69 @@ void
 gfx_outb(unsigned short port, unsigned char data)
 {
    _asm {
-   pushf mov al, data mov dx, port out dx, al popf}
+      pushf 
+      mov al, data 
+      mov dx, port 
+      out dx, al 
+      popf
+   }
 }
 
 void
 gfx_outw(unsigned short port, unsigned short data)
 {
    _asm {
-   pushf mov ax, data mov dx, port out dx, ax popf}
+      pushf 
+      mov ax, data 
+      mov dx, port 
+      out dx, ax 
+      popf
+   }
 }
 
 void
 gfx_outd(unsigned short port, unsigned long data)
 {
    _asm {
-   pushf mov eax, data mov dx, port out dx, eax popf}
+      pushf 
+      mov eax, data 
+      mov dx, port 
+      out dx, eax 
+      popf
+   }
 }
 
-#elif defined(OS_VXWORKS) || defined (OS_UNIX)	/* VxWorks and Linux etc. */
+
+#elif defined(OS_VXWORKS) || defined (OS_LINUX)	/* VxWorks and Linux */
+
+#if defined(OS_LINUX)
+#include "asm/msr.h"
+#endif
 
 void
 gfx_msr_asm_read(unsigned short msrReg, unsigned long msrAddr,
 		 unsigned long *ptrHigh, unsigned long *ptrLow)
 {
-   /* ADD LINUX IMPLEMENTATION */
-   ;
+   unsigned long addr, val1, val2;
+
+   addr = msrAddr | (unsigned long)msrReg;
+   rdmsr(addr, val1, val2);
+
+   *ptrHigh = val2;
+   *ptrLow = val1;
 }
 
 void
 gfx_msr_asm_write(unsigned short msrReg, unsigned long msrAddr,
 		  unsigned long *ptrHigh, unsigned long *ptrLow)
 {
-   /* ADD LINUX IMPLEMENTATION */
-   ;
+   unsigned long addr, val1, val2;
+
+   val2 = *ptrHigh;
+   val1 = *ptrLow;
+
+   addr = (msrAddr & 0xFFFF0000) | (unsigned long)msrReg;
+   wrmsr(addr, val1, val2);
 }
 
 unsigned char
@@ -457,53 +518,6 @@ gfx_outd(unsigned short port, unsigned long data)
    __asm__ volatile ("outl %0,%1"::"a" (data), "d"(port));
 }
 
-#elif defined(XFree86Server)
-
-#include <xf86_ansic.h>
-#include <compiler.h>
-#define INB(port) inb(port)
-#define INW(port) inw(port)
-#define IND(port) inl(port)
-#define OUTB(port,data) outb(port, data)
-#define OUTW(port,data) outw(port, data)
-#define OUTD(port,data) outl(port, data)
-
-unsigned char
-gfx_inb(unsigned short port)
-{
-   return inb(port);
-}
-
-unsigned short
-gfx_inw(unsigned short port)
-{
-   return inw(port);
-}
-
-unsigned long
-gfx_ind(unsigned short port)
-{
-   return inl(port);
-}
-
-void
-gfx_outb(unsigned short port, unsigned char data)
-{
-   outb(port, data);
-}
-
-void
-gfx_outw(unsigned short port, unsigned short data)
-{
-   outw(port, data);
-}
-
-void
-gfx_outd(unsigned short port, unsigned long data)
-{
-   outl(port, data);
-}
-
 #else /* else nothing */
 
 unsigned char
@@ -546,14 +560,12 @@ gfx_outd(unsigned short port, unsigned long data)
 }
 #endif
 
-#ifndef XFree86Server
 #define INB(port) gfx_inb(port)
 #define INW(port) gfx_inw(port)
 #define IND(port) gfx_ind(port)
 #define OUTB(port, data) gfx_outb(port, data)
 #define OUTW(port, data) gfx_outw(port, data)
 #define OUTD(port, data) gfx_outd(port, data)
-#endif
 
 /* INITIALIZATION ROUTINES 
  * These routines are used during the initialization of the driver to 
@@ -612,7 +624,4 @@ gfx_outd(unsigned short port, unsigned long data)
  */
 #include "gfx_vga.c"			/* VGA routines */
 
-/* ROUTINES added accessing hardware reg */
-#include "regacc.c"
-
 /* END OF FILE */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/gfx_dcdr.c b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/gfx_dcdr.c
index 12754619d..187b44065 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/gfx_dcdr.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/gfx_dcdr.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/gfx_dcdr.c,v 1.2 2002/10/18 20:02:40 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/gfx_dcdr.c,v 1.1 2002/12/10 15:12:25 alanh Exp $ */
 /*
  * $Workfile: gfx_dcdr.c $
  *
@@ -158,7 +158,6 @@
  *
  * END_NSC_LIC_GPL */
 
-
 /* INCLUDE SUPPORT FOR PHILIPS SAA7114 DECODER, IF SPECIFIED */
 
 #if GFX_DECODER_SAA7114
@@ -175,253 +174,289 @@
  * gfx_set_decoder_defaults
  *-----------------------------------------------------------------------------
  */
-int gfx_set_decoder_defaults(void)
+int
+gfx_set_decoder_defaults(void)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if	GFX_DECODER_SAA7114
-	if (gfx_decoder_type == GFX_DECODER_SAA7114)
-		status = saa7114_set_decoder_defaults();
+   if (gfx_decoder_type == GFX_DECODER_SAA7114)
+      status = saa7114_set_decoder_defaults();
 #	endif
-	return(status);
+   return (status);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_set_decoder_analog_input
  *-----------------------------------------------------------------------------
  */
-int gfx_set_decoder_analog_input(unsigned char input)
+int
+gfx_set_decoder_analog_input(unsigned char input)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if	GFX_DECODER_SAA7114
-	if (gfx_decoder_type == GFX_DECODER_SAA7114)
-		status = saa7114_set_decoder_analog_input(input);
+   if (gfx_decoder_type == GFX_DECODER_SAA7114)
+      status = saa7114_set_decoder_analog_input(input);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_set_decoder_brightness
  *-----------------------------------------------------------------------------
  */
-int gfx_set_decoder_brightness(unsigned char brightness)
+int
+gfx_set_decoder_brightness(unsigned char brightness)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if	GFX_DECODER_SAA7114
-	if (gfx_decoder_type == GFX_DECODER_SAA7114)
-		status = saa7114_set_decoder_brightness(brightness);
+   if (gfx_decoder_type == GFX_DECODER_SAA7114)
+      status = saa7114_set_decoder_brightness(brightness);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_set_decoder_contrast
  *-----------------------------------------------------------------------------
  */
-int gfx_set_decoder_contrast(unsigned char contrast)
+int
+gfx_set_decoder_contrast(unsigned char contrast)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if	GFX_DECODER_SAA7114
-	if (gfx_decoder_type == GFX_DECODER_SAA7114)
-		status = saa7114_set_decoder_contrast(contrast);
+   if (gfx_decoder_type == GFX_DECODER_SAA7114)
+      status = saa7114_set_decoder_contrast(contrast);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_set_decoder_hue
  *-----------------------------------------------------------------------------
  */
-int gfx_set_decoder_hue(char hue)
+int
+gfx_set_decoder_hue(char hue)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if	GFX_DECODER_SAA7114
-	if (gfx_decoder_type == GFX_DECODER_SAA7114)
-		status = saa7114_set_decoder_hue(hue);
+   if (gfx_decoder_type == GFX_DECODER_SAA7114)
+      status = saa7114_set_decoder_hue(hue);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_set_decoder_saturation
  *-----------------------------------------------------------------------------
  */
-int gfx_set_decoder_saturation(unsigned char saturation)
+int
+gfx_set_decoder_saturation(unsigned char saturation)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if	GFX_DECODER_SAA7114
-	if (gfx_decoder_type == GFX_DECODER_SAA7114)
-		status = saa7114_set_decoder_saturation(saturation);
+   if (gfx_decoder_type == GFX_DECODER_SAA7114)
+      status = saa7114_set_decoder_saturation(saturation);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_set_decoder_input_offset
  *-----------------------------------------------------------------------------
  */
-int gfx_set_decoder_input_offset(unsigned short x, unsigned short y)
+int
+gfx_set_decoder_input_offset(unsigned short x, unsigned short y)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if	GFX_DECODER_SAA7114
-	if (gfx_decoder_type == GFX_DECODER_SAA7114)
-		status = saa7114_set_decoder_input_offset(x, y);
+   if (gfx_decoder_type == GFX_DECODER_SAA7114)
+      status = saa7114_set_decoder_input_offset(x, y);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_set_decoder_input_size
  *-----------------------------------------------------------------------------
  */
-int gfx_set_decoder_input_size(unsigned short width, unsigned short height)
+int
+gfx_set_decoder_input_size(unsigned short width, unsigned short height)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if	GFX_DECODER_SAA7114
-	if (gfx_decoder_type == GFX_DECODER_SAA7114)
-		status = saa7114_set_decoder_input_size(width, height);
+   if (gfx_decoder_type == GFX_DECODER_SAA7114)
+      status = saa7114_set_decoder_input_size(width, height);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_set_decoder_output_size
  *-----------------------------------------------------------------------------
  */
-int gfx_set_decoder_output_size(unsigned short width, unsigned short height)
+int
+gfx_set_decoder_output_size(unsigned short width, unsigned short height)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if	GFX_DECODER_SAA7114
-	if (gfx_decoder_type == GFX_DECODER_SAA7114)
-		status = saa7114_set_decoder_output_size(width, height);
+   if (gfx_decoder_type == GFX_DECODER_SAA7114)
+      status = saa7114_set_decoder_output_size(width, height);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_set_decoder_scale
  *-----------------------------------------------------------------------------
  */
-int gfx_set_decoder_scale(unsigned short srcw, unsigned short srch, 
-	unsigned short dstw, unsigned short dsth)
+int
+gfx_set_decoder_scale(unsigned short srcw, unsigned short srch,
+		      unsigned short dstw, unsigned short dsth)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if	GFX_DECODER_SAA7114
-	if (gfx_decoder_type == GFX_DECODER_SAA7114)
-		status = saa7114_set_decoder_scale(srcw, srch, dstw, dsth);
+   if (gfx_decoder_type == GFX_DECODER_SAA7114)
+      status = saa7114_set_decoder_scale(srcw, srch, dstw, dsth);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_set_decoder_vbi_format
  *-----------------------------------------------------------------------------
  */
-int gfx_set_decoder_vbi_format(int start, int end, int format)
+int
+gfx_set_decoder_vbi_format(int start, int end, int format)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if	GFX_DECODER_SAA7114
-	if (gfx_decoder_type == GFX_DECODER_SAA7114)
-		status = saa7114_set_decoder_vbi_format(start, end, format);
+   if (gfx_decoder_type == GFX_DECODER_SAA7114)
+      status = saa7114_set_decoder_vbi_format(start, end, format);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_set_decoder_vbi_enable
  *-----------------------------------------------------------------------------
  */
-int gfx_set_decoder_vbi_enable(int enable)
+int
+gfx_set_decoder_vbi_enable(int enable)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if	GFX_DECODER_SAA7114
-	if (gfx_decoder_type == GFX_DECODER_SAA7114)
-		status = saa7114_set_decoder_vbi_enable(enable);
+   if (gfx_decoder_type == GFX_DECODER_SAA7114)
+      status = saa7114_set_decoder_vbi_enable(enable);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_set_decoder_vbi_upscale
  *-----------------------------------------------------------------------------
  */
-int gfx_set_decoder_vbi_upscale(void)
+int
+gfx_set_decoder_vbi_upscale(void)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if	GFX_DECODER_SAA7114
-	if (gfx_decoder_type == GFX_DECODER_SAA7114)
-		status = saa7114_set_decoder_vbi_upscale();
+   if (gfx_decoder_type == GFX_DECODER_SAA7114)
+      status = saa7114_set_decoder_vbi_upscale();
 #	endif
-	return(status);
+   return (status);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_set_decoder_TV_standard
  *-----------------------------------------------------------------------------
  */
-int gfx_set_decoder_TV_standard(TVStandardType TVStandard)
+int
+gfx_set_decoder_TV_standard(TVStandardType TVStandard)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if	GFX_DECODER_SAA7114
-	if (gfx_decoder_type == GFX_DECODER_SAA7114)
-		status = saa7114_set_decoder_TV_standard(TVStandard);
+   if (gfx_decoder_type == GFX_DECODER_SAA7114)
+      status = saa7114_set_decoder_TV_standard(TVStandard);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_set_decoder_luminance_filter
  *-----------------------------------------------------------------------------
  */
-int gfx_set_decoder_luminance_filter(unsigned char lufi)
+int
+gfx_set_decoder_luminance_filter(unsigned char lufi)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if	GFX_DECODER_SAA7114
-	if (gfx_decoder_type == GFX_DECODER_SAA7114)
-		status = saa7114_set_decoder_luminance_filter(lufi);
+   if (gfx_decoder_type == GFX_DECODER_SAA7114)
+      status = saa7114_set_decoder_luminance_filter(lufi);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_decoder_software_reset
  *-----------------------------------------------------------------------------
  */
-int gfx_decoder_software_reset(void)
+int
+gfx_decoder_software_reset(void)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if	GFX_DECODER_SAA7114
-	if (gfx_decoder_type == GFX_DECODER_SAA7114)
-		status = saa7114_decoder_software_reset();
+   if (gfx_decoder_type == GFX_DECODER_SAA7114)
+      status = saa7114_decoder_software_reset();
 #	endif
-	return(status);
+   return (status);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_decoder_detect_macrovision
  *-----------------------------------------------------------------------------
  */
-int gfx_decoder_detect_macrovision(void)
+int
+gfx_decoder_detect_macrovision(void)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if	GFX_DECODER_SAA7114
-	if (gfx_decoder_type == GFX_DECODER_SAA7114)
-		status = saa7114_decoder_detect_macrovision();
+   if (gfx_decoder_type == GFX_DECODER_SAA7114)
+      status = saa7114_decoder_detect_macrovision();
 #	endif
-	return(status);
+   return (status);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_decoder_detect_video
  *-----------------------------------------------------------------------------
  */
-int gfx_decoder_detect_video(void)
+int
+gfx_decoder_detect_video(void)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if	GFX_DECODER_SAA7114
-	if (gfx_decoder_type == GFX_DECODER_SAA7114)
-		status = saa7114_decoder_detect_video();
+   if (gfx_decoder_type == GFX_DECODER_SAA7114)
+      status = saa7114_decoder_detect_video();
 #	endif
-	return(status);
+   return (status);
 }
 
 /*************************************************************/
@@ -434,112 +469,128 @@ int gfx_decoder_detect_video(void)
  * gfx_get_decoder_brightness
  *-----------------------------------------------------------------------------
  */
-unsigned char gfx_get_decoder_brightness(void)
+unsigned char
+gfx_get_decoder_brightness(void)
 {
-	unsigned char brightness = 0;
+   unsigned char brightness = 0;
+
 #	if	GFX_DECODER_SAA7114
-	if (gfx_decoder_type == GFX_DECODER_SAA7114)
-		brightness = saa7114_get_decoder_brightness();
+   if (gfx_decoder_type == GFX_DECODER_SAA7114)
+      brightness = saa7114_get_decoder_brightness();
 #	endif
-	return(brightness);
+   return (brightness);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_get_decoder_contrast
  *-----------------------------------------------------------------------------
  */
-unsigned char gfx_get_decoder_contrast(void)
+unsigned char
+gfx_get_decoder_contrast(void)
 {
-	unsigned char contrast = 0;
+   unsigned char contrast = 0;
+
 #	if	GFX_DECODER_SAA7114
-	if (gfx_decoder_type == GFX_DECODER_SAA7114)
-		contrast = saa7114_get_decoder_contrast();
+   if (gfx_decoder_type == GFX_DECODER_SAA7114)
+      contrast = saa7114_get_decoder_contrast();
 #	endif
-	return(contrast);
+   return (contrast);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_get_decoder_hue
  *-----------------------------------------------------------------------------
  */
-char gfx_get_decoder_hue(void)
+char
+gfx_get_decoder_hue(void)
 {
-	unsigned char hue = 0;
+   unsigned char hue = 0;
+
 #	if	GFX_DECODER_SAA7114
-	if (gfx_decoder_type == GFX_DECODER_SAA7114)
-		hue = saa7114_get_decoder_hue();
+   if (gfx_decoder_type == GFX_DECODER_SAA7114)
+      hue = saa7114_get_decoder_hue();
 #	endif
-	return((char)hue);
+   return ((char)hue);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_get_decoder_saturation
  *-----------------------------------------------------------------------------
  */
-unsigned char gfx_get_decoder_saturation(void)
+unsigned char
+gfx_get_decoder_saturation(void)
 {
-	unsigned char saturation = 0;
+   unsigned char saturation = 0;
+
 #	if	GFX_DECODER_SAA7114
-	if (gfx_decoder_type == GFX_DECODER_SAA7114)
-		saturation = saa7114_get_decoder_saturation();
+   if (gfx_decoder_type == GFX_DECODER_SAA7114)
+      saturation = saa7114_get_decoder_saturation();
 #	endif
-	return(saturation);
+   return (saturation);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_get_decoder_input_offset
  *-----------------------------------------------------------------------------
  */
-unsigned long gfx_get_decoder_input_offset()
+unsigned long
+gfx_get_decoder_input_offset()
 {
-	unsigned long offset = 0;
+   unsigned long offset = 0;
+
 #	if	GFX_DECODER_SAA7114
-	if (gfx_decoder_type == GFX_DECODER_SAA7114)
-		offset = saa7114_get_decoder_input_offset();
+   if (gfx_decoder_type == GFX_DECODER_SAA7114)
+      offset = saa7114_get_decoder_input_offset();
 #	endif
-	return(offset);
+   return (offset);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_get_decoder_input_size
  *-----------------------------------------------------------------------------
  */
-unsigned long gfx_get_decoder_input_size()
+unsigned long
+gfx_get_decoder_input_size()
 {
-	unsigned long size = 0;
+   unsigned long size = 0;
+
 #	if	GFX_DECODER_SAA7114
-	if (gfx_decoder_type == GFX_DECODER_SAA7114)
-		size = saa7114_get_decoder_input_size();
+   if (gfx_decoder_type == GFX_DECODER_SAA7114)
+      size = saa7114_get_decoder_input_size();
 #	endif
-	return(size);
+   return (size);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_get_decoder_output_size
  *-----------------------------------------------------------------------------
  */
-unsigned long gfx_get_decoder_output_size()
+unsigned long
+gfx_get_decoder_output_size()
 {
-	unsigned long size = 0;
+   unsigned long size = 0;
+
 #	if	GFX_DECODER_SAA7114
-	if (gfx_decoder_type == GFX_DECODER_SAA7114)
-		size = saa7114_get_decoder_output_size();
+   if (gfx_decoder_type == GFX_DECODER_SAA7114)
+      size = saa7114_get_decoder_output_size();
 #	endif
-	return(size);
+   return (size);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_get_decoder_vbi_format
  *-----------------------------------------------------------------------------
  */
-int gfx_get_decoder_vbi_format(int line)
+int
+gfx_get_decoder_vbi_format(int line)
 {
-	int format = 0;
+   int format = 0;
+
 #	if	GFX_DECODER_SAA7114
-	if (gfx_decoder_type == GFX_DECODER_SAA7114)
-		format = saa7114_get_decoder_vbi_format(line);
+   if (gfx_decoder_type == GFX_DECODER_SAA7114)
+      format = saa7114_get_decoder_vbi_format(line);
 #	endif
-	return(format);
+   return (format);
 }
 
 #endif /* GFX_READ_ROUTINES */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/gfx_defs.h b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/gfx_defs.h
index eef6e1e1a..8847e5b33 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/gfx_defs.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/gfx_defs.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/gfx_defs.h,v 1.1 2002/10/11 14:33:00 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/gfx_defs.h,v 1.2 2002/12/11 22:51:01 dawes Exp $ */
 /*
  * $Workfile: gfx_defs.h $
  *
@@ -132,9 +132,11 @@
  *
  * END_NSC_LIC_GPL */
 
+#ifndef _gfx_defs_h
+#define _gfx_defs_h
 
 /* ACCESS TO THE CPU REGISTERS */
- 
+
 #define WRITE_REG8(offset, value) \
 	(*(volatile unsigned char *)(gfx_virt_regptr + (offset))) = (value)
 
@@ -213,8 +215,10 @@
 
 /* ACCESS TO MSRS */
 
-void gfx_msr_asm_write (unsigned short msrReg, unsigned long msrAddr, unsigned long *ptrHigh, unsigned long *ptrLow);
-void gfx_msr_asm_read (unsigned short msrReg, unsigned long msrAddr, unsigned long *ptrHigh, unsigned long *ptrLow);
+void gfx_msr_asm_write(unsigned short msrReg, unsigned long msrAddr,
+		       unsigned long *ptrHigh, unsigned long *ptrLow);
+void gfx_msr_asm_read(unsigned short msrReg, unsigned long msrAddr,
+		      unsigned long *ptrHigh, unsigned long *ptrLow);
 
 #define MSR_READ( MBD_MSR_CAP, address, valueHigh_ptr, valueLow_ptr ) \
 					 gfx_msr_asm_read( ((unsigned short)(MBD_MSR_CAP)), address, valueHigh_ptr, valueLow_ptr )
@@ -426,7 +430,6 @@ void gfx_msr_asm_read (unsigned short msrReg, unsigned long msrAddr, unsigned lo
 		WRITE_GP32 (regoffset, temp2);                                                      \
 	}                                                                                       \
 }
-
+#endif /* _gfx_defs_h */
 
 /* END OF FILE */
-
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/gfx_disp.c b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/gfx_disp.c
new file mode 100644
index 000000000..54adcb3ee
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/gfx_disp.c
@@ -0,0 +1,2322 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/gfx_disp.c,v 1.2 2003/01/14 09:34:34 alanh Exp $ */
+/*
+ * $Workfile: gfx_disp.c $
+ *
+ * This file contains routines to program the display controller.  
+ *
+ * The "disp_gu1.c" and "disp_gu2.c" files implement the following routines:
+ *
+ *    gfx_get_display_mode_count
+ *    gfx_get_display_mode
+ *    gfx_is_display_mode_supported
+ *    gfx_get_display_details
+ *    gfx_set_display_mode
+ *    gfx_set_display_bpp
+ *	  gfx_set_display_timings
+ *    gfx_set_vtotal
+ *    gfx_get_display_pitch
+ *    gfx_set_display_pitch
+ *    gfx_set_display_offset
+ *    gfx_set_display_palette
+ *    gfx_set_display_palette_entry
+ *    gfx_set_cursor_enable
+ *    gfx_set_cursor_colors
+ *    gfx_set_cursor_position
+ *	  gfx_set_cursor_shape32
+ *	  gfx_set_cursor_shape64
+ *    gfx_set_icon_enable
+ *    gfx_set_icon_colors
+ *    gfx_set_icon_position
+ *    gfx_set_icon_shape64
+ *    gfx_set_compression_enable
+ *    gfx_set_compression_offset
+ *    gfx_set_compression_pitch
+ *    gfx_set_compression_size
+ *    gfx_set_display_priority_high
+ *    gfx_test_timing_active
+ *    gfx_test_vertical_active
+ *    gfx_wait_vertical_blank
+ *    gfx_reset_timing_lock
+ *
+ * And the following routines if GFX_READ_ROUTINES is set:
+ *	
+ *	  gfx_get_hactive
+ *    gfx_get_hblank_start
+ *    gfx_get_hsync_start
+ *    gfx_get_hsync_end
+ *    gfx_get_hblank_end
+ *    gfx_get_htotal
+ *    gfx_get_vactive
+ *    gfx_get_vblank_start
+ *    gfx_get_vsync_start
+ *    gfx_get_vsync_end
+ *    gfx_get_vblank_end
+ *    gfx_get_vtotal
+ *    gfx_get_vline
+ *    gfx_get_display_bpp
+ *    gfx_get_display_offset
+ *    gfx_get_display_palette
+ *    gfx_get_cursor_enable
+ *    gfx_get_cursor_base
+ *    gfx_get_cursor_position
+ *    gfx_get_cursor_offset
+ *    gfx_get_cursor_color
+ *    gfx_get_icon_enable
+ *    gfx_get_icon_color
+ *    gfx_get_icon_offset
+ *    gfx_get_icon_position
+ *    gfx_get_compression_enable
+ *    gfx_get_compression_offset
+ *    gfx_get_compression_pitch
+ *    gfx_get_compression_size
+ *    gfx_get_display_priority_high
+ *    gfx_get_valid_bit
+ *
+ * NSC_LIC_ALTERNATIVE_PREAMBLE
+ *
+ * Revision 1.0
+ *
+ * National Semiconductor Alternative GPL-BSD License
+ *
+ * National Semiconductor Corporation licenses this software 
+ * ("Software"):
+ *
+ *      Durango
+ *
+ * under one of the two following licenses, depending on how the 
+ * Software is received by the Licensee.
+ * 
+ * If this Software is received as part of the Linux Framebuffer or
+ * other GPL licensed software, then the GPL license designated 
+ * NSC_LIC_GPL applies to this Software; in all other circumstances 
+ * then the BSD-style license designated NSC_LIC_BSD shall apply.
+ *
+ * END_NSC_LIC_ALTERNATIVE_PREAMBLE */
+
+/* NSC_LIC_BSD
+ *
+ * National Semiconductor Corporation Open Source License for Durango
+ *
+ * (BSD License with Export Notice)
+ *
+ * Copyright (c) 1999-2001
+ * National Semiconductor Corporation.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met: 
+ *
+ *   * Redistributions of source code must retain the above copyright 
+ *     notice, this list of conditions and the following disclaimer. 
+ *
+ *   * Redistributions in binary form must reproduce the above 
+ *     copyright notice, this list of conditions and the following 
+ *     disclaimer in the documentation and/or other materials provided 
+ *     with the distribution. 
+ *
+ *   * Neither the name of the National Semiconductor Corporation nor 
+ *     the names of its contributors may be used to endorse or promote 
+ *     products derived from this software without specific prior 
+ *     written permission. 
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+ * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE,
+ * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE.
+ *
+ * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
+ * YOUR JURISDICTION. It is licensee's responsibility to comply with 
+ * any export regulations applicable in licensee's jurisdiction. Under 
+ * CURRENT (2001) U.S. export regulations this software 
+ * is eligible for export from the U.S. and can be downloaded by or 
+ * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
+ * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
+ * Syria, Sudan, Afghanistan and any other country to which the U.S. 
+ * has embargoed goods and services. 
+ *
+ * END_NSC_LIC_BSD */
+
+/* NSC_LIC_GPL
+ *
+ * National Semiconductor Corporation Gnu General Public License for Durango
+ *
+ * (GPL License with Export Notice)
+ *
+ * Copyright (c) 1999-2001
+ * National Semiconductor Corporation.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted under the terms of the GNU General 
+ * Public License as published by the Free Software Foundation; either 
+ * version 2 of the License, or (at your option) any later version  
+ *
+ * In addition to the terms of the GNU General Public License, neither 
+ * the name of the National Semiconductor Corporation nor the names of 
+ * its contributors may be used to endorse or promote products derived 
+ * from this software without specific prior written permission. 
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+ * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, 
+ * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE. See the GNU General Public License for more details. 
+ *
+ * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
+ * YOUR JURISDICTION. It is licensee's responsibility to comply with 
+ * any export regulations applicable in licensee's jurisdiction. Under 
+ * CURRENT (2001) U.S. export regulations this software 
+ * is eligible for export from the U.S. and can be downloaded by or 
+ * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
+ * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
+ * Syria, Sudan, Afghanistan and any other country to which the U.S. 
+ * has embargoed goods and services. 
+ *
+ * You should have received a copy of the GNU General Public License 
+ * along with this file; if not, write to the Free Software Foundation, 
+ * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 
+ *
+ * END_NSC_LIC_GPL */
+
+unsigned short PanelWidth = 0;
+unsigned short PanelHeight = 0;
+unsigned short PanelEnable = 0;
+unsigned short ModeWidth;
+unsigned short ModeHeight;
+
+int DeltaX = 0;
+int DeltaY = 0;
+unsigned long prevstartAddr = 0;
+unsigned long panelTop = 0;
+unsigned long panelLeft = 0;
+
+int gbpp = 8;
+
+int gfx_compression_enabled = 0;
+int gfx_compression_active = 0;
+int gfx_line_double = 0;
+int gfx_pixel_double = 0;
+int gfx_timing_lock = 0;
+DISPLAYMODE gfx_display_mode;
+
+/* DISPLAY MODE TIMINGS */
+
+DISPLAYMODE DisplayParams[] = {
+
+/* 320 x 200 */
+
+   {GFX_MODE_70HZ |			/* refresh rate = 60  */
+    GFX_MODE_8BPP | GFX_MODE_16BPP |	/* 8 and 16 BPP valid */
+    GFX_MODE_NEG_HSYNC |		/* negative HSYNC     */
+    GFX_MODE_PIXEL_DOUBLE |		/* Double width       */
+    GFX_MODE_LINE_DOUBLE,		/* Double height      */
+    0x140, 0x288, 0x290, 0x2F0, 0x318, 0x320,	/* horizontal timings */
+    0x0C8, 0x197, 0x19C, 0x19E, 0x1BA, 0x1C1,	/* vertical timings   */
+    0x00192CCC,				/* freq = 25.175 MHz  */
+    },
+
+/* 320 x 240 */
+
+   {GFX_MODE_75HZ |			/* refresh rate = 75  */
+    GFX_MODE_8BPP | GFX_MODE_16BPP |	/* 8 and 16 BPP valid */
+    GFX_MODE_NEG_HSYNC | GFX_MODE_NEG_VSYNC |	/* negative syncs     */
+    GFX_MODE_PIXEL_DOUBLE |		/* Double width       */
+    GFX_MODE_LINE_DOUBLE,		/* Double height      */
+    0x0140, 0x0280, 0x0290, 0x02D0, 0x0348, 0x0348,	/* horizontal timings */
+    0x00F0, 0x01E0, 0x01E1, 0x01E4, 0x01F4, 0x01F4,	/* vertical timings   */
+    0x001F8000,				/* freq = 31.5 MHz    */
+    },
+
+/* 400 x 300 */
+
+   {GFX_MODE_75HZ |			/* refresh rate = 75  */
+    GFX_MODE_8BPP | GFX_MODE_16BPP |	/* 8 and 16 BPP valid */
+    GFX_MODE_PIXEL_DOUBLE |		/* Double width       */
+    GFX_MODE_LINE_DOUBLE,		/* Double height      */
+    0x0190, 0x0320, 0x0330, 0x0380, 0x0420, 0x0420,	/* horizontal timings */
+    0x012C, 0x0258, 0x0259, 0x025C, 0x0271, 0x0271,	/* vertical timings   */
+    0x00318000,				/* freq = 49.5 MHz    */
+    },
+
+/* 512 x 384 */
+
+   {GFX_MODE_75HZ |			/* refresh rate = 75  */
+    GFX_MODE_8BPP | GFX_MODE_16BPP |	/* 8 and 16 BPP valid */
+    GFX_MODE_PIXEL_DOUBLE |		/* Double width       */
+    GFX_MODE_LINE_DOUBLE,		/* Double height      */
+    0x0200, 0x0400, 0x0410, 0x0470, 0x0520, 0x0520,	/* horizontal timings */
+    0x0180, 0x0300, 0x0301, 0x0304, 0x0320, 0x0320,	/* vertical timings   */
+    0x004EC000,				/* freq = 78.75 MHz   */
+    },
+
+/* 640 x 400 */
+
+   {GFX_MODE_70HZ |			/* refresh rate = 60  */
+    GFX_MODE_8BPP | GFX_MODE_12BPP | GFX_MODE_15BPP |	/* all BPP valid      */
+    GFX_MODE_16BPP | GFX_MODE_24BPP | GFX_MODE_NEG_HSYNC,	/* negative HSYNC     */
+    0x280, 0x288, 0x290, 0x2F0, 0x318, 0x320,	/* horizontal timings */
+    0x190, 0x197, 0x19C, 0x19E, 0x1BA, 0x1C1,	/* vertical timings   */
+    0x00192CCC,				/* freq = 25.175 MHz  */
+    },
+
+/* 640x480 */
+
+   {GFX_MODE_60HZ |			/* refresh rate = 60  */
+    GFX_MODE_8BPP | GFX_MODE_12BPP | GFX_MODE_15BPP |	/* all BPP valid      */
+    GFX_MODE_16BPP | GFX_MODE_24BPP | GFX_MODE_NEG_HSYNC | GFX_MODE_NEG_VSYNC,	/* negative syncs     */
+    0x0280, 0x0288, 0x0290, 0x02E8, 0x0318, 0x0320,	/* horizontal timings */
+    0x01E0, 0x01E8, 0x01EA, 0x01EC, 0x0205, 0x020D,	/* vertical timings   */
+    0x00192CCC,				/* freq = 25.175 MHz  */
+    },
+
+   {GFX_MODE_72HZ |			/* refresh rate = 72  */
+    GFX_MODE_8BPP | GFX_MODE_12BPP | GFX_MODE_15BPP |	/* all BPP valid      */
+    GFX_MODE_16BPP | GFX_MODE_24BPP | GFX_MODE_NEG_HSYNC | GFX_MODE_NEG_VSYNC,	/* negative syncs     */
+    0x0280, 0x0288, 0x0298, 0x02c0, 0x0338, 0x0340,	/* horizontal timings */
+    0x01e0, 0x01e8, 0x01e9, 0x01ec, 0x0200, 0x0208,	/* vertical timings   */
+    0x001F8000,				/* freq = 31.5 MHz    */
+    },
+
+   {GFX_MODE_75HZ |			/* refresh rate = 75  */
+    GFX_MODE_8BPP | GFX_MODE_12BPP | GFX_MODE_15BPP |	/* all BPP valid      */
+    GFX_MODE_16BPP | GFX_MODE_24BPP | GFX_MODE_NEG_HSYNC | GFX_MODE_NEG_VSYNC,	/* negative syncs     */
+    0x0280, 0x0280, 0x0290, 0x02D0, 0x0348, 0x0348,	/* horizontal timings */
+    0x01E0, 0x01E0, 0x01E1, 0x01E4, 0x01F4, 0x01F4,	/* vertical timings   */
+    0x001F8000,				/* freq = 31.5 MHz    */
+    },
+
+   {GFX_MODE_85HZ |			/* refresh rate = 85  */
+    GFX_MODE_8BPP | GFX_MODE_12BPP | GFX_MODE_15BPP |	/* all BPP valid      */
+    GFX_MODE_16BPP | GFX_MODE_24BPP | GFX_MODE_NEG_HSYNC | GFX_MODE_NEG_VSYNC,	/* negative syncs     */
+    0x0280, 0x0280, 0x02B8, 0x02F0, 0x0340, 0x0340,	/* horizontal timings */
+    0x01E0, 0x01E0, 0x01E1, 0x01E4, 0x01FD, 0x01FD,	/* vertical timings   */
+    0x00240000,				/* freq = 36.0 MHz    */
+    },
+
+/* 800x600 */
+
+   {GFX_MODE_56HZ |			/* refresh rate = 56  */
+    GFX_MODE_8BPP | GFX_MODE_12BPP | GFX_MODE_15BPP |	/* all BPP valid      */
+    GFX_MODE_16BPP | GFX_MODE_24BPP,
+    0x0320, 0x0328, 0x0348, 0x03D0, 0x0418, 0x0420,	/* horizontal timings */
+    0x0258, 0x0258, 0x0259, 0x025D, 0x0274, 0x0274,	/* vertical timings   */
+    0x00240000,				/* freq = 36.00 MHz   */
+    },
+
+   {GFX_MODE_60HZ |			/* refresh rate = 60  */
+    GFX_MODE_8BPP | GFX_MODE_12BPP | GFX_MODE_15BPP |	/* all BPP valid      */
+    GFX_MODE_16BPP | GFX_MODE_24BPP,
+    0x0320, 0x0328, 0x0348, 0x03D0, 0x0418, 0x0420,	/* horizontal timings */
+    0x0258, 0x0258, 0x0259, 0x025D, 0x0274, 0x0274,	/* vertical timings   */
+    0x00280000,				/* freq = 40.00 MHz   */
+    },
+
+   {GFX_MODE_72HZ |			/* refresh rate = 72  */
+    GFX_MODE_8BPP | GFX_MODE_12BPP | GFX_MODE_15BPP |	/* all BPP valid      */
+    GFX_MODE_16BPP | GFX_MODE_24BPP,
+    0x0320, 0x0320, 0x0358, 0x03D0, 0x0410, 0x0410,	/* horizontal timings */
+    0x0258, 0x0258, 0x027D, 0x0283, 0x029A, 0x029A,	/* vertical timings   */
+    0x00320000,				/* freq = 49.5 MHz    */
+    },
+
+   {GFX_MODE_75HZ |			/* refresh rate = 75  */
+    GFX_MODE_8BPP | GFX_MODE_12BPP | GFX_MODE_15BPP |	/* all BPP valid      */
+    GFX_MODE_16BPP | GFX_MODE_24BPP,
+    0x0320, 0x0320, 0x0330, 0x0380, 0x0420, 0x0420,	/* horizontal timings */
+    0x0258, 0x0258, 0x0259, 0x025C, 0x0271, 0x0271,	/* vertical timings   */
+    0x00318000,				/* freq = 49.5 MHz    */
+    },
+
+   {GFX_MODE_85HZ |			/* refresh rate = 85  */
+    GFX_MODE_8BPP | GFX_MODE_12BPP | GFX_MODE_15BPP |	/* all BPP valid      */
+    GFX_MODE_16BPP | GFX_MODE_24BPP,
+    0x0320, 0x0320, 0x0340, 0x0380, 0x0418, 0x0418,	/* horizontal timings */
+    0x0258, 0x0258, 0x0259, 0x025C, 0x0277, 0x0277,	/* vertical timings   */
+    0x00384000,				/* freq = 56.25 MHz   */
+    },
+
+/* 1024x768 */
+
+   {GFX_MODE_60HZ |			/* refresh rate = 60  */
+    GFX_MODE_8BPP | GFX_MODE_12BPP | GFX_MODE_15BPP |	/* all BPP valid      */
+    GFX_MODE_16BPP | GFX_MODE_24BPP | GFX_MODE_NEG_HSYNC | GFX_MODE_NEG_VSYNC,	/* negative syncs     */
+    0x0400, 0x0400, 0x0418, 0x04A0, 0x0540, 0x0540,	/* horizontal timings */
+    0x0300, 0x0300, 0x0303, 0x0309, 0x0326, 0x0326,	/* vertical timings   */
+    0x00410000,				/* freq = 65.00 MHz   */
+    },
+
+   {GFX_MODE_70HZ |			/* refresh rate = 70  */
+    GFX_MODE_8BPP | GFX_MODE_12BPP | GFX_MODE_15BPP |	/* all BPP valid      */
+    GFX_MODE_16BPP | GFX_MODE_24BPP | GFX_MODE_NEG_HSYNC | GFX_MODE_NEG_VSYNC,	/* negative syncs     */
+    0x0400, 0x0400, 0x0418, 0x04A0, 0x0530, 0x0530,	/* horizontal timings */
+    0x0300, 0x0300, 0x0303, 0x0309, 0x0326, 0x0326,	/* vertical timings   */
+    0x004B0000,				/* freq = 78.75 MHz   */
+    },
+
+   {GFX_MODE_75HZ |			/* refresh rate = 75  */
+    GFX_MODE_8BPP | GFX_MODE_12BPP | GFX_MODE_15BPP |	/* all BPP valid      */
+    GFX_MODE_16BPP | GFX_MODE_24BPP,
+    0x0400, 0x0400, 0x0410, 0x0470, 0x0520, 0x0520,	/* horizontal timings */
+    0x0300, 0x0300, 0x0301, 0x0304, 0x0320, 0x0320,	/* vertical timings   */
+    0x004EC000,				/* freq = 78.75 MHz   */
+    },
+
+   {GFX_MODE_85HZ |			/* refresh rate = 85  */
+    GFX_MODE_8BPP | GFX_MODE_12BPP | GFX_MODE_15BPP |	/* all BPP valid      */
+    GFX_MODE_16BPP | GFX_MODE_24BPP,
+    0x0400, 0x0400, 0x0430, 0x0490, 0x0560, 0x0560,	/* horizontal timings */
+    0x0300, 0x0300, 0x0301, 0x0304, 0x0328, 0x0328,	/* vertical timings   */
+    0x005E8000,				/* freq = 94.50 MHz   */
+    },
+
+/* 1152x864 */
+
+   {GFX_MODE_75HZ |			/* refresh rate = 75  */
+    GFX_MODE_8BPP | GFX_MODE_12BPP | GFX_MODE_15BPP |	/* all BPP valid      */
+    GFX_MODE_16BPP | GFX_MODE_24BPP,
+    0x0480, 0x0480, 0x04C0, 0x0540, 0x0640, 0x0640,	/* horizontal timings */
+    0x0360, 0x0360, 0x0361, 0x0364, 0x0384, 0x0384,	/* vertical timings   */
+    0x006C0000,				/* freq = 108.00 MHz  */
+    },
+
+/* 1280x1024 */
+
+   {GFX_MODE_60HZ |			/* refresh rate = 60  */
+    GFX_MODE_8BPP | GFX_MODE_12BPP | GFX_MODE_15BPP |	/* Up to 16 bpp       */
+    GFX_MODE_16BPP | GFX_MODE_24BPP,
+    0x0500, 0x0500, 0x0530, 0x05A0, 0x0698, 0x0698,	/* horizontal timings */
+    0x0400, 0x0400, 0x0401, 0x0404, 0x042A, 0x042A,	/* vertical timings   */
+    0x006C0000,				/* freq = 108.0 MHz   */
+    },
+
+   {GFX_MODE_75HZ |			/* refresh rate = 75  */
+    GFX_MODE_8BPP | GFX_MODE_12BPP | GFX_MODE_15BPP |	/* Up to 16 bpp       */
+    GFX_MODE_16BPP | GFX_MODE_24BPP,
+    0x0500, 0x0500, 0x0510, 0x05A0, 0x0698, 0x0698,	/* horizontal timings */
+    0x0400, 0x0400, 0x0401, 0x0404, 0x042A, 0x042A,	/* vertical timings   */
+    0x00870000,				/* freq = 135.0 MHz   */
+    },
+
+   {GFX_MODE_85HZ |			/* refresh rate = 85  */
+    GFX_MODE_8BPP | GFX_MODE_12BPP | GFX_MODE_15BPP |	/* Up to 16 bpp       */
+    GFX_MODE_16BPP | GFX_MODE_24BPP,
+    0x0500, 0x0500, 0x0540, 0x05E0, 0x06C0, 0x06C0,	/* horizontal timings */
+    0x0400, 0x0400, 0x0401, 0x0404, 0x0430, 0x0430,	/* vertical timings   */
+    0x009D8000,				/* freq = 157.5 MHz   */
+    },
+
+/*********************************/
+/* BEGIN REDCLOUD-SPECIFIC MODES */
+/*-------------------------------*/
+
+/* 1600 x 1200 */
+
+   {GFX_MODE_60HZ |			/* refresh rate = 60  */
+    GFX_MODE_8BPP | GFX_MODE_12BPP | GFX_MODE_15BPP |	/* Up to 32 bpp       */
+    GFX_MODE_16BPP | GFX_MODE_24BPP,
+    0x0640, 0x0640, 0x0680, 0x0740, 0x0870, 0x0870,	/* horizontal timings */
+    0x04B0, 0x04B0, 0x04B1, 0x04B4, 0x04E2, 0x04E2,	/* vertical timings   */
+    0x00A20000,				/* freq = 162.0 MHz   */
+    },
+
+   {GFX_MODE_70HZ |			/* refresh rate = 70  */
+    GFX_MODE_8BPP | GFX_MODE_12BPP | GFX_MODE_15BPP |	/* Up to 32 bpp       */
+    GFX_MODE_16BPP | GFX_MODE_24BPP,
+    0x0640, 0x0640, 0x0680, 0x0740, 0x0870, 0x0870,	/* horizontal timings */
+    0x04B0, 0x04B0, 0x04B1, 0x04B4, 0x04E2, 0x04E2,	/* vertical timings   */
+    0x00BD0000,				/* freq = 189.0 MHz   */
+    },
+
+   {GFX_MODE_75HZ |			/* refresh rate = 75  */
+    GFX_MODE_8BPP | GFX_MODE_12BPP | GFX_MODE_15BPP |	/* Up to 32 bpp       */
+    GFX_MODE_16BPP | GFX_MODE_24BPP,
+    0x0640, 0x0640, 0x0680, 0x0740, 0x0870, 0x0870,	/* horizontal timings */
+    0x04B0, 0x04B0, 0x04B1, 0x04B4, 0x04E2, 0x04E2,	/* vertical timings   */
+    0x00CA8000,				/* freq = 202.5 MHz   */
+    },
+
+   {GFX_MODE_85HZ |			/* refresh rate = 85  */
+    GFX_MODE_8BPP | GFX_MODE_12BPP | GFX_MODE_15BPP |	/* Up to 32 bpp       */
+    GFX_MODE_16BPP | GFX_MODE_24BPP,
+    0x0640, 0x0640, 0x0680, 0x0740, 0x0870, 0x0870,	/* horizontal timings */
+    0x04B0, 0x04B0, 0x04B1, 0x04B4, 0x04E2, 0x04E2,	/* vertical timings   */
+    0x00E58000,				/* freq = 229.5 MHz   */
+    },
+};
+
+/* UPDATE THIS VARIABLE WHENEVER NEW REDCLOUD-SPECIFIC MODES ARE ADDED */
+
+#define REDCLOUD_SPECIFIC_MODES 4
+
+#define NUM_RC_DISPLAY_MODES sizeof(DisplayParams) / sizeof(DISPLAYMODE)
+#define NUM_GX_DISPLAY_MODES (NUM_RC_DISPLAY_MODES - REDCLOUD_SPECIFIC_MODES)
+
+FIXEDTIMINGS FixedParams[] = {
+/* 640x480 Panel */
+   {640, 480, 640, 480,
+    0x0280, 0x280, 0x2a8, 0x328, 0x380, 0x380,
+    0x1e0, 0x1e0, 0x1e1, 0x1e5, 0x1fc, 0x1fc,
+    0x00192CCC,
+    },
+
+   {640, 480, 800, 600,
+    0x0280, 0x280, 0x2a8, 0x328, 0x380, 0x380,
+    0x1e0, 0x1e0, 0x1e1, 0x1e5, 0x1fc, 0x1fc,
+    0x00192CCC,
+    },
+
+   {640, 480, 1024, 768,
+    0x0280, 0x280, 0x2a8, 0x328, 0x380, 0x380,
+    0x1e0, 0x1e0, 0x1e1, 0x1e5, 0x1fc, 0x1fc,
+    0x00192CCC,
+    },
+
+   {640, 480, 1152, 864,
+    0x0280, 0x280, 0x2a8, 0x328, 0x380, 0x380,
+    0x1e0, 0x1e0, 0x1e1, 0x1e5, 0x1fc, 0x1fc,
+    0x00192CCC,
+    },
+
+   {640, 480, 1280, 1024,
+    0x0280, 0x280, 0x2a8, 0x328, 0x380, 0x380,
+    0x1e0, 0x1e0, 0x1e1, 0x1e5, 0x1fc, 0x1fc,
+    0x00192CCC,
+    },
+
+   {640, 480, 1600, 1200,
+    0x0280, 0x280, 0x2a8, 0x328, 0x380, 0x380,
+    0x1e0, 0x1e0, 0x1e1, 0x1e5, 0x1fc, 0x1fc,
+    0x00192CCC,
+    },
+
+/* 800x600 Panel */
+   {800, 600, 640, 480,
+    0x0280, 0x2d0, 0x2f8, 0x378, 0x3d0, 0x420,
+    0x1e0, 0x21c, 0x21d, 0x221, 0x238, 0x274,
+    0x00280000,
+    },
+
+   {800, 600, 800, 600,
+    0x320, 0x320, 0x348, 0x3c8, 0x420, 0x420,
+    0x258, 0x258, 0x259, 0x25d, 0x274, 0x274,
+    0x00280000,
+    },
+
+   {800, 600, 1024, 768,
+    0x320, 0x320, 0x348, 0x3c8, 0x420, 0x420,
+    0x258, 0x258, 0x259, 0x25d, 0x274, 0x274,
+    0x00280000,
+    },
+
+   {800, 600, 1152, 864,
+    0x320, 0x320, 0x348, 0x3c8, 0x420, 0x420,
+    0x258, 0x258, 0x259, 0x25d, 0x274, 0x274,
+    0x00280000,
+    },
+
+   {800, 600, 1280, 1024,
+    0x320, 0x320, 0x348, 0x3c8, 0x420, 0x420,
+    0x258, 0x258, 0x259, 0x25d, 0x274, 0x274,
+    0x00280000,
+    },
+
+   {800, 600, 1600, 1200,
+    0x320, 0x320, 0x348, 0x3c8, 0x420, 0x420,
+    0x258, 0x258, 0x259, 0x25d, 0x274, 0x274,
+    0x00280000,
+    },
+
+/* 1024x768 panel */
+   {1024, 768, 640, 480,
+    0x0280, 0x340, 0x368, 0x3e8, 0x440, 0x500,
+    0x1e0, 0x270, 0x271, 0x275, 0x28c, 0x31c,
+    0x00410000,
+    },
+
+   {1024, 768, 800, 600,
+    0x0320, 0x390, 0x3b8, 0x438, 0x490, 0x500,
+    0x258, 0x2ac, 0x2ad, 0x2b1, 0x2c8, 0x31c,
+    0x00410000,
+    },
+
+   {1024, 768, 1024, 768,
+    0x0400, 0x400, 0x428, 0x4a8, 0x500, 0x500,
+    0x300, 0x300, 0x301, 0x305, 0x31c, 0x31c,
+    0x00410000,
+    },
+
+   {1024, 768, 1152, 864,
+    0x0400, 0x400, 0x428, 0x4a8, 0x500, 0x500,
+    0x300, 0x300, 0x301, 0x305, 0x31c, 0x31c,
+    0x00410000,
+    },
+
+   {1024, 768, 1280, 1024,
+    0x0400, 0x400, 0x428, 0x4a8, 0x500, 0x500,
+    0x300, 0x300, 0x301, 0x305, 0x31c, 0x31c,
+    0x00410000,
+    },
+
+   {1024, 768, 1600, 1200,
+    0x0400, 0x400, 0x428, 0x4a8, 0x500, 0x500,
+    0x300, 0x300, 0x301, 0x305, 0x31c, 0x31c,
+    0x00410000,
+    },
+
+};
+
+#define NUM_FIXED_TIMINGS_MODES sizeof(FixedParams)/sizeof(FIXEDTIMINGS)
+
+/* INCLUDE SUPPORT FOR FIRST GENERATION, IF SPECIFIED. */
+
+#if GFX_DISPLAY_GU1
+#include "disp_gu1.c"
+#endif
+
+/* INCLUDE SUPPORT FOR SECOND GENERATION, IF SPECIFIED. */
+
+#if GFX_DISPLAY_GU2
+#include "disp_gu2.c"
+#endif
+
+void gfx_set_display_video_format(unsigned long format);
+void gfx_set_display_video_enable(int enable);
+void gfx_set_display_video_yuv_offsets(unsigned long yoffset,
+				       unsigned long uoffset,
+				       unsigned long voffset);
+void gfx_set_display_video_yuv_pitch(unsigned long ypitch,
+				     unsigned long uvpitch);
+void gfx_set_display_video_downscale(unsigned short srch,
+				     unsigned short dsth);
+void gfx_set_display_video_vertical_downscale_enable(int enable);
+void gfx_get_display_video_yuv_offsets(unsigned long *yoffset,
+				       unsigned long *uoffset,
+				       unsigned long *voffset);
+void gfx_get_display_video_yuv_pitch(unsigned long *ypitch,
+				     unsigned long *uvpitch);
+unsigned long gfx_get_display_video_downscale_delta(void);
+int gfx_get_display_video_downscale_enable(void);
+unsigned long gfx_get_display_video_size(void);
+void gfx_set_display_video_size(unsigned short width, unsigned short height);
+void gfx_set_display_video_offset(unsigned long offset);
+unsigned long gfx_get_display_video_offset(void);
+
+/*---------------------------------------------------------------------------
+ * gfx_reset_timing_lock
+ * 
+ * This routine resets the timing change lock. The lock can only be set by
+ * setting a flag when calling mode set.
+ *---------------------------------------------------------------------------
+ */
+void
+gfx_reset_timing_lock(void)
+{
+   gfx_timing_lock = 0;
+}
+
+/* WRAPPERS IF DYNAMIC SELECTION */
+/* Extra layer to call either first or second generation routines. */
+
+#if GFX_DISPLAY_DYNAMIC
+
+/*---------------------------------------------------------------------------
+ * gfx_set_display_bpp
+ *---------------------------------------------------------------------------
+ */
+int
+gfx_set_display_bpp(unsigned short bpp)
+{
+   int retval = 0;
+
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      retval = gu1_set_display_bpp(bpp);
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      retval = gu2_set_display_bpp(bpp);
+#	endif
+   return (retval);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_is_display_mode_supported
+ * check if given mode supported, 
+ * return the supported mode on success, -1 on fail
+ *---------------------------------------------------------------------------
+ */
+int
+gfx_is_display_mode_supported(int xres, int yres, int bpp, int hz)
+{
+   int retval = -1;
+
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      retval = gu1_is_display_mode_supported(xres, yres, bpp, hz);
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      retval = gu2_is_display_mode_supported(xres, yres, bpp, hz);
+#	endif
+   return (retval);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_display_mode
+ *---------------------------------------------------------------------------
+ */
+int
+gfx_set_display_mode(int xres, int yres, int bpp, int hz)
+{
+   int retval = 0;
+
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      retval = gu1_set_display_mode(xres, yres, bpp, hz);
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      retval = gu2_set_display_mode(xres, yres, bpp, hz);
+#	endif
+   return (retval);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_display_timings
+ *---------------------------------------------------------------------------
+ */
+int
+gfx_set_display_timings(unsigned short bpp, unsigned short flags,
+			unsigned short hactive, unsigned short hblankstart,
+			unsigned short hsyncstart, unsigned short hsyncend,
+			unsigned short hblankend, unsigned short htotal,
+			unsigned short vactive, unsigned short vblankstart,
+			unsigned short vsyncstart, unsigned short vsyncend,
+			unsigned short vblankend, unsigned short vtotal,
+			unsigned long frequency)
+{
+   int retval = 0;
+
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      retval = gu1_set_display_timings(bpp, flags,
+				       hactive, hblankstart, hsyncstart,
+				       hsyncend, hblankend, htotal, vactive,
+				       vblankstart, vsyncstart, vsyncend,
+				       vblankend, vtotal, frequency);
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      retval = gu2_set_display_timings(bpp, flags,
+				       hactive, hblankstart, hsyncstart,
+				       hsyncend, hblankend, htotal, vactive,
+				       vblankstart, vsyncstart, vsyncend,
+				       vblankend, vtotal, frequency);
+#	endif
+   return (retval);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_display_pitch
+ *---------------------------------------------------------------------------
+ */
+void
+gfx_set_display_pitch(unsigned short pitch)
+{
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      gu1_set_display_pitch(pitch);
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      gu2_set_display_pitch(pitch);
+#	endif
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_display_offset
+ *---------------------------------------------------------------------------
+ */
+void
+gfx_set_display_offset(unsigned long offset)
+{
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      gu1_set_display_offset(offset);
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      gu2_set_display_offset(offset);
+#	endif
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_display_palette_entry
+ *---------------------------------------------------------------------------
+ */
+int
+gfx_set_display_palette_entry(unsigned long index, unsigned long palette)
+{
+   int status = 0;
+
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      status = gu1_set_display_palette_entry(index, palette);
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      status = gu2_set_display_palette_entry(index, palette);
+#	endif
+   return (status);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_display_palette
+ *---------------------------------------------------------------------------
+ */
+int
+gfx_set_display_palette(unsigned long *palette)
+{
+   int status = 0;
+
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      status = gu1_set_display_palette(palette);
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      status = gu2_set_display_palette(palette);
+#	endif
+   return (status);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_cursor_enable
+ *---------------------------------------------------------------------------
+ */
+void
+gfx_set_cursor_enable(int enable)
+{
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      gu1_set_cursor_enable(enable);
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      gu2_set_cursor_enable(enable);
+#	endif
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_cursor_colors
+ *---------------------------------------------------------------------------
+ */
+void
+gfx_set_cursor_colors(unsigned long bkcolor, unsigned long fgcolor)
+{
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      gu1_set_cursor_colors(bkcolor, fgcolor);
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      gu2_set_cursor_colors(bkcolor, fgcolor);
+#	endif
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_cursor_position
+ *---------------------------------------------------------------------------
+ */
+void
+gfx_set_cursor_position(unsigned long memoffset,
+			unsigned short xpos, unsigned short ypos,
+			unsigned short xhotspot, unsigned short yhotspot)
+{
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      gu1_set_cursor_position(memoffset, xpos, ypos, xhotspot, yhotspot);
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      gu2_set_cursor_position(memoffset, xpos, ypos, xhotspot, yhotspot);
+#	endif
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_cursor_shape32
+ *---------------------------------------------------------------------------
+ */
+void
+gfx_set_cursor_shape32(unsigned long memoffset,
+		       unsigned long *andmask, unsigned long *xormask)
+{
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      gu1_set_cursor_shape32(memoffset, andmask, xormask);
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      gu2_set_cursor_shape32(memoffset, andmask, xormask);
+#	endif
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_cursor_shape64
+ *---------------------------------------------------------------------------
+ */
+void
+gfx_set_cursor_shape64(unsigned long memoffset,
+		       unsigned long *andmask, unsigned long *xormask)
+{
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      gu2_set_cursor_shape64(memoffset, andmask, xormask);
+#	endif
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_icon_enable
+ *---------------------------------------------------------------------------
+ */
+void
+gfx_set_icon_enable(int enable)
+{
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      gu2_set_icon_enable(enable);
+#	endif
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_icon_colors
+ *---------------------------------------------------------------------------
+ */
+void
+gfx_set_icon_colors(unsigned long color0, unsigned long color1,
+		    unsigned long color2)
+{
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      gu2_set_icon_colors(color0, color1, color2);
+#	endif
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_icon_position
+ *---------------------------------------------------------------------------
+ */
+void
+gfx_set_icon_position(unsigned long memoffset, unsigned short xpos)
+{
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      gu2_set_icon_position(memoffset, xpos);
+#	endif
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_icon_shape64
+ *---------------------------------------------------------------------------
+ */
+void
+gfx_set_icon_shape64(unsigned long memoffset,
+		     unsigned long *andmask, unsigned long *xormask,
+		     unsigned int lines)
+{
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      gu2_set_icon_shape64(memoffset, andmask, xormask, lines);
+#	endif
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_compression_enable
+ *---------------------------------------------------------------------------
+ */
+int
+gfx_set_compression_enable(int enable)
+{
+   int status = 0;
+
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      status = gu1_set_compression_enable(enable);
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      status = gu2_set_compression_enable(enable);
+#	endif
+   return (status);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_compression_offset
+ *---------------------------------------------------------------------------
+ */
+int
+gfx_set_compression_offset(unsigned long offset)
+{
+   int status = 0;
+
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      status = gu1_set_compression_offset(offset);
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      status = gu2_set_compression_offset(offset);
+#	endif
+   return (status);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_compression_pitch
+ *---------------------------------------------------------------------------
+ */
+int
+gfx_set_compression_pitch(unsigned short pitch)
+{
+   int status = 0;
+
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      status = gu1_set_compression_pitch(pitch);
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      status = gu2_set_compression_pitch(pitch);
+#	endif
+   return (status);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_compression_size
+ *---------------------------------------------------------------------------
+ */
+int
+gfx_set_compression_size(unsigned short size)
+{
+   int status = 0;
+
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      status = gu1_set_compression_size(size);
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      status = gu2_set_compression_size(size);
+#	endif
+   return (status);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_display_priority_high
+ *---------------------------------------------------------------------------
+ */
+void
+gfx_set_display_priority_high(int enable)
+{
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      gu1_set_display_priority_high(enable);
+#	endif
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_display_video_format (PRIVATE ROUTINE - NOT PART OF API)
+ *
+ * This routine is called by "gfx_set_video_format".  It abstracts the 
+ * version of the display controller from the video overlay routines.
+ *---------------------------------------------------------------------------
+ */
+void
+gfx_set_display_video_format(unsigned long format)
+{
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      gu2_set_display_video_format(format);
+#	endif
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_display_video_enable (PRIVATE ROUTINE - NOT PART OF API)
+ *
+ * This routine is called by "gfx_set_video_enable".  It abstracts the 
+ * version of the display controller from the video overlay routines.
+ *---------------------------------------------------------------------------
+ */
+void
+gfx_set_display_video_enable(int enable)
+{
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      gu1_set_display_video_enable(enable);
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      gu2_set_display_video_enable(enable);
+#	endif
+   return;
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_display_video_size (PRIVATE ROUTINE - NOT PART OF API)
+ *
+ * This routine is called by "gfx_set_video_size".  It abstracts the 
+ * version of the display controller from the video overlay routines.
+ *---------------------------------------------------------------------------
+ */
+void
+gfx_set_display_video_size(unsigned short width, unsigned short height)
+{
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      gu1_set_display_video_size(width, height);
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      gu2_set_display_video_size(width, height);
+#	endif
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_display_video_offset (PRIVATE ROUTINE - NOT PART OF API)
+ *
+ * This routine is called by "gfx_set_video_offset".  It abstracts the 
+ * version of the display controller from the video overlay routines.
+ *---------------------------------------------------------------------------
+ */
+void
+gfx_set_display_video_offset(unsigned long offset)
+{
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      gu1_set_display_video_offset(offset);
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      gu2_set_display_video_offset(offset);
+#	endif
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_display_video_yuv_offsets (PRIVATE ROUTINE - NOT PART OF API)
+ *
+ * This routine is called by "gfx_set_video_yuv_offsets".  It abstracts the 
+ * version of the display controller from the video overlay routines.
+ *---------------------------------------------------------------------------
+ */
+void
+gfx_set_display_video_yuv_offsets(unsigned long yoffset,
+				  unsigned long uoffset,
+				  unsigned long voffset)
+{
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      gu2_set_display_video_yuv_offsets(yoffset, uoffset, voffset);
+#	endif
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_display_video_yuv_pitch (PRIVATE ROUTINE - NOT PART OF API)
+ *
+ * This routine is called by "gfx_set_video_yuv_pitch".  It abstracts the 
+ * version of the display controller from the video overlay routines.
+ *---------------------------------------------------------------------------
+ */
+void
+gfx_set_display_video_yuv_pitch(unsigned long ypitch, unsigned long uvpitch)
+{
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      gu2_set_display_video_yuv_pitch(ypitch, uvpitch);
+#	endif
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_display_video_downscale (PRIVATE ROUTINE - NOT PART OF API)
+ *
+ * This routine is called by "gfx_set_video_vertical_downscale".  It abstracts the 
+ * version of the display controller from the video overlay routines.
+ *---------------------------------------------------------------------------
+ */
+void
+gfx_set_display_video_downscale(unsigned short srch, unsigned short dsth)
+{
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      gu2_set_display_video_downscale(srch, dsth);
+#	endif
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_display_video_vertical_downscale_enable (PRIVATE ROUTINE - NOT PART OF API)
+ *
+ * This routine is called by "gfx_set_video_vertical_downscale_enable".  It abstracts the 
+ * version of the display controller from the video overlay routines.
+ *---------------------------------------------------------------------------
+ */
+void
+gfx_set_display_video_vertical_downscale_enable(int enable)
+{
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      gu2_set_display_video_vertical_downscale_enable(enable);
+#	endif
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_test_timing_active
+ *---------------------------------------------------------------------------
+ */
+int
+gfx_test_timing_active(void)
+{
+   int status = 0;
+
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      status = gu1_test_timing_active();
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      status = gu2_test_timing_active();
+#	endif
+   return (status);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_test_vertical_active
+ *---------------------------------------------------------------------------
+ */
+int
+gfx_test_vertical_active(void)
+{
+   int status = 0;
+
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      status = gu1_test_vertical_active();
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      status = gu2_test_vertical_active();
+#	endif
+   return (status);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_wait_vertical_blank
+ *---------------------------------------------------------------------------
+ */
+int
+gfx_wait_vertical_blank(void)
+{
+   int status = 0;
+
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      status = gu1_wait_vertical_blank();
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      status = gu2_wait_vertical_blank();
+#	endif
+   return (status);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_delay_milliseconds
+ *---------------------------------------------------------------------------
+ */
+void
+gfx_delay_milliseconds(unsigned long milliseconds)
+{
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      gu1_delay_milliseconds(milliseconds);
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      gu2_delay_milliseconds(milliseconds);
+#	endif
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_delay_microseconds
+ *---------------------------------------------------------------------------
+ */
+void
+gfx_delay_microseconds(unsigned long microseconds)
+{
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      gu1_delay_microseconds(microseconds);
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      gu2_delay_microseconds(microseconds);
+#	endif
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_enable_panning 
+ *
+ * This routine  enables the panning when the Mode is bigger than the panel
+ * size.
+ *---------------------------------------------------------------------------
+ */
+void
+gfx_enable_panning(int x, int y)
+{
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      gu1_enable_panning(x, y);
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      gu2_enable_panning(x, y);
+#	endif
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_fixed_timings
+ *---------------------------------------------------------------------------
+ */
+int
+gfx_set_fixed_timings(int panelResX, int panelResY, unsigned short width,
+		      unsigned short height, unsigned short bpp)
+{
+   int status = 0;
+
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      status =
+	    gu1_set_fixed_timings(panelResX, panelResY, width, height, bpp);
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      status =
+	    gu2_set_fixed_timings(panelResX, panelResY, width, height, bpp);
+#	endif
+   return (status);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_panel_present
+ *---------------------------------------------------------------------------
+ */
+int
+gfx_set_panel_present(int panelResX, int panelResY, unsigned short width,
+		      unsigned short height, unsigned short bpp)
+{
+   int status = 0;
+
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      status =
+	    gu1_set_panel_present(panelResX, panelResY, width, height, bpp);
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      status =
+	    gu2_set_panel_present(panelResX, panelResY, width, height, bpp);
+#	endif
+   return (status);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_vtotal
+ *---------------------------------------------------------------------------
+ */
+int
+gfx_set_vtotal(unsigned short vtotal)
+{
+   int retval = 0;
+
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      retval = gu1_set_vtotal(vtotal);
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      retval = gu2_set_vtotal(vtotal);
+#	endif
+   return (retval);
+}
+
+/*-----------------------------------------------------------------------*
+ * THE FOLLOWING READ ROUTINES ARE ALWAYS INCLUDED:                      *                      
+ * gfx_get_hsync_end, gfx_get_htotal, gfx_get_vsync_end, gfx_get_vtotal  *
+ * are used by the video overlay routines.                               *
+ *                                                                       *
+ * gfx_get_vline and gfx_vactive are used to prevent an issue for the    *
+ * SC1200.                                                               *
+ *                                                                       *
+ * The others are part of the Durango API.                               *
+ *-----------------------------------------------------------------------*/
+
+/*----------------------------------------------------------------------------
+ * gfx_mode_frequency_supported
+ *----------------------------------------------------------------------------  
+ */
+int
+gfx_mode_frequency_supported(int xres, int yres, int bpp,
+			     unsigned long frequency)
+{
+   int freq = 0;
+
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      freq = gu1_mode_frequency_supported(xres, yres, bpp, frequency);
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      freq = gu2_mode_frequency_supported(xres, yres, bpp, frequency);
+#	endif
+   return (freq);
+}
+
+/*----------------------------------------------------------------------------
+ * gfx_refreshrate_from_frequency
+ *----------------------------------------------------------------------------  
+ */
+int
+gfx_get_refreshrate_from_frequency(int xres, int yres, int bpp, int *hz,
+				   unsigned long frequency)
+{
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      gu1_get_refreshrate_from_frequency(xres, yres, bpp, hz, frequency);
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      gu2_get_refreshrate_from_frequency(xres, yres, bpp, hz, frequency);
+#	endif
+
+   return (1);
+}
+
+/*----------------------------------------------------------------------------
+ * gfx_refreshrate_from_mode
+ *----------------------------------------------------------------------------  
+ */
+int
+gfx_get_refreshrate_from_mode(int xres, int yres, int bpp, int *hz,
+			      unsigned long frequency)
+{
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      gu1_get_refreshrate_from_mode(xres, yres, bpp, hz, frequency);
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      gu2_get_refreshrate_from_mode(xres, yres, bpp, hz, frequency);
+#	endif
+
+   return (1);
+}
+
+/*----------------------------------------------------------------------------
+ * gfx_get_frequency_from_refreshrate
+ *----------------------------------------------------------------------------  
+ */
+int
+gfx_get_frequency_from_refreshrate(int xres, int yres, int bpp, int hz,
+				   int *frequency)
+{
+   int retval = -1;
+
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      retval =
+	    gu1_get_frequency_from_refreshrate(xres, yres, bpp, hz,
+					       frequency);
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      retval =
+	    gu2_get_frequency_from_refreshrate(xres, yres, bpp, hz,
+					       frequency);
+#	endif
+
+   return retval;
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_max_supported_pixel_clock
+ *---------------------------------------------------------------------------
+ */
+unsigned long
+gfx_get_max_supported_pixel_clock(void)
+{
+   unsigned long status = 0;
+
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      status = gu1_get_max_supported_pixel_clock();
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      status = gu2_get_max_supported_pixel_clock();
+#	endif
+   return (status);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_display_pitch
+ *---------------------------------------------------------------------------
+ */
+unsigned short
+gfx_get_display_pitch(void)
+{
+   unsigned short pitch = 0;
+
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      pitch = gu1_get_display_pitch();
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      pitch = gu2_get_display_pitch();
+#	endif
+   return (pitch);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_display_mode_count 
+ * return # of modes supported.
+ *---------------------------------------------------------------------------
+ */
+int
+gfx_get_display_mode_count(void)
+{
+   int retval = 0;
+
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      retval = gu1_get_display_mode_count();
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      retval = gu2_get_display_mode_count();
+#	endif
+   return (retval);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_frame_buffer_line_size
+ *---------------------------------------------------------------------------
+ */
+unsigned long
+gfx_get_frame_buffer_line_size(void)
+{
+   unsigned long retval = 0;
+
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      retval = gu1_get_frame_buffer_line_size();
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      retval = gu2_get_frame_buffer_line_size();
+#	endif
+   return (retval);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_display_mode
+ * get the curent mode set, 
+ * return the supported mode on success, -1 on fail
+ *---------------------------------------------------------------------------
+ */
+int
+gfx_get_display_mode(int *xres, int *yres, int *bpp, int *hz)
+{
+   int retval = -1;
+
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      retval = gu1_get_display_mode(xres, yres, bpp, hz);
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      retval = gu2_get_display_mode(xres, yres, bpp, hz);
+#	endif
+   return (retval);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_display_details
+ * given the mode get's the resoultion details, width, height, freq
+ *---------------------------------------------------------------------------
+ */
+int
+gfx_get_display_details(unsigned int mode, int *xres, int *yres, int *hz)
+{
+   int retval = -1;
+
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      retval = gu1_get_display_details(mode, xres, yres, hz);
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      retval = gu2_get_display_details(mode, xres, yres, hz);
+#	endif
+   return (retval);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_hactive
+ *---------------------------------------------------------------------------
+ */
+unsigned short
+gfx_get_hactive(void)
+{
+   unsigned short hactive = 0;
+
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      hactive = gu1_get_hactive();
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      hactive = gu2_get_hactive();
+#	endif
+   return (hactive);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_hsync_start
+ *---------------------------------------------------------------------------
+ */
+unsigned short
+gfx_get_hsync_start(void)
+{
+   unsigned short hsync_start = 0;
+
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      hsync_start = gu1_get_hsync_start();
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      hsync_start = gu2_get_hsync_start();
+#	endif
+   return (hsync_start);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_hsync_end
+ *---------------------------------------------------------------------------
+ */
+unsigned short
+gfx_get_hsync_end(void)
+{
+   unsigned short hsync_end = 0;
+
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      hsync_end = gu1_get_hsync_end();
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      hsync_end = gu2_get_hsync_end();
+#	endif
+   return (hsync_end);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_htotal
+ *---------------------------------------------------------------------------
+ */
+unsigned short
+gfx_get_htotal(void)
+{
+   unsigned short htotal = 0;
+
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      htotal = gu1_get_htotal();
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      htotal = gu2_get_htotal();
+#	endif
+   return (htotal);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_vactive
+ *---------------------------------------------------------------------------
+ */
+unsigned short
+gfx_get_vactive(void)
+{
+   unsigned short vactive = 0;
+
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      vactive = gu1_get_vactive();
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      vactive = gu2_get_vactive();
+#	endif
+   return (vactive);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_vsync_end
+ *---------------------------------------------------------------------------
+ */
+unsigned short
+gfx_get_vsync_end(void)
+{
+   unsigned short vsync_end = 0;
+
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      vsync_end = gu1_get_vsync_end();
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      vsync_end = gu2_get_vsync_end();
+#	endif
+   return (vsync_end);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_vtotal
+ *---------------------------------------------------------------------------
+ */
+unsigned short
+gfx_get_vtotal(void)
+{
+   unsigned short vtotal = 0;
+
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      vtotal = gu1_get_vtotal();
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      vtotal = gu2_get_vtotal();
+#	endif
+   return (vtotal);
+}
+
+/*---------------------------------------------------------------------------
+ *  gfx_get_display_bpp
+ *---------------------------------------------------------------------------
+ */
+unsigned short
+gfx_get_display_bpp(void)
+{
+   unsigned short bpp = 0;
+
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      bpp = gu1_get_display_bpp();
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      bpp = gu2_get_display_bpp();
+#	endif
+   return (bpp);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_vline
+ *---------------------------------------------------------------------------
+ */
+unsigned short
+gfx_get_vline(void)
+{
+   unsigned short vline = 0;
+
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      vline = gu1_get_vline();
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      vline = gu2_get_vline();
+#	endif
+   return (vline);
+}
+
+/*---------------------------------------------------------------------------
+ *  gfx_get_display_offset
+ *---------------------------------------------------------------------------
+ */
+unsigned long
+gfx_get_display_offset(void)
+{
+   unsigned long offset = 0;
+
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      offset = gu1_get_display_offset();
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      offset = gu2_get_display_offset();
+#	endif
+   return (offset);
+}
+
+/*---------------------------------------------------------------------------
+ *  gfx_get_cursor_offset
+ *---------------------------------------------------------------------------
+ */
+unsigned long
+gfx_get_cursor_offset(void)
+{
+   unsigned long base = 0;
+
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      base = gu1_get_cursor_offset();
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      base = gu2_get_cursor_offset();
+#	endif
+   return (base);
+}
+
+/*************************************************************/
+/*  READ ROUTINES  |  INCLUDED FOR DIAGNOSTIC PURPOSES ONLY  */
+/*************************************************************/
+
+#if GFX_READ_ROUTINES
+
+/*---------------------------------------------------------------------------
+ * gfx_get_hblank_start
+ *---------------------------------------------------------------------------
+ */
+unsigned short
+gfx_get_hblank_start(void)
+{
+   unsigned short hblank_start = 0;
+
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      hblank_start = gu1_get_hblank_start();
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      hblank_start = gu2_get_hblank_start();
+#	endif
+   return (hblank_start);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_hblank_end
+ *---------------------------------------------------------------------------
+ */
+unsigned short
+gfx_get_hblank_end(void)
+{
+   unsigned short hblank_end = 0;
+
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      hblank_end = gu1_get_hblank_end();
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      hblank_end = gu2_get_hblank_end();
+#	endif
+   return (hblank_end);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_vblank_start
+ *---------------------------------------------------------------------------
+ */
+unsigned short
+gfx_get_vblank_start(void)
+{
+   unsigned short vblank_start = 0;
+
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      vblank_start = gu1_get_vblank_start();
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      vblank_start = gu2_get_vblank_start();
+#	endif
+   return (vblank_start);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_vsync_start
+ *---------------------------------------------------------------------------
+ */
+unsigned short
+gfx_get_vsync_start(void)
+{
+   unsigned short vsync_start = 0;
+
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      vsync_start = gu1_get_vsync_start();
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      vsync_start = gu2_get_vsync_start();
+#	endif
+   return (vsync_start);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_vblank_end
+ *---------------------------------------------------------------------------
+ */
+unsigned short
+gfx_get_vblank_end(void)
+{
+   unsigned short vblank_end = 0;
+
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      vblank_end = gu1_get_vblank_end();
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      vblank_end = gu2_get_vblank_end();
+#	endif
+   return (vblank_end);
+}
+
+/*---------------------------------------------------------------------------
+ *  gfx_get_display_palette_entry
+ *---------------------------------------------------------------------------
+ */
+int
+gfx_get_display_palette_entry(unsigned long index, unsigned long *palette)
+{
+   int status = 0;
+
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      status = gu1_get_display_palette_entry(index, palette);
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      status = gu2_get_display_palette_entry(index, palette);
+#	endif
+
+   return status;
+}
+
+/*---------------------------------------------------------------------------
+ *  gfx_get_display_palette
+ *---------------------------------------------------------------------------
+ */
+void
+gfx_get_display_palette(unsigned long *palette)
+{
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      gu1_get_display_palette(palette);
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      gu2_get_display_palette(palette);
+#	endif
+}
+
+/*---------------------------------------------------------------------------
+ *  gfx_get_cursor_enable
+ *---------------------------------------------------------------------------
+ */
+unsigned long
+gfx_get_cursor_enable(void)
+{
+   unsigned long enable = 0;
+
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      enable = gu1_get_cursor_enable();
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      enable = gu2_get_cursor_enable();
+#	endif
+   return (enable);
+}
+
+/*---------------------------------------------------------------------------
+ *  gfx_get_cursor_position
+ *---------------------------------------------------------------------------
+ */
+unsigned long
+gfx_get_cursor_position(void)
+{
+   unsigned long position = 0;
+
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      position = gu1_get_cursor_position();
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      position = gu2_get_cursor_position();
+#	endif
+   return (position);
+}
+
+/*---------------------------------------------------------------------------
+ *  gfx_get_cursor_clip
+ *---------------------------------------------------------------------------
+ */
+unsigned long
+gfx_get_cursor_clip(void)
+{
+   unsigned long offset = 0;
+
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      offset = gu1_get_cursor_clip();
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      offset = gu2_get_cursor_clip();
+#	endif
+   return (offset);
+}
+
+/*---------------------------------------------------------------------------
+ *  gfx_get_cursor_color
+ *---------------------------------------------------------------------------
+ */
+unsigned long
+gfx_get_cursor_color(int index)
+{
+   unsigned long color = 0;
+
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      color = gu1_get_cursor_color(index);
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      color = gu2_get_cursor_color(index);
+#	endif
+   return (color);
+}
+
+/*---------------------------------------------------------------------------
+ *  gfx_get_icon_enable
+ *---------------------------------------------------------------------------
+ */
+unsigned long
+gfx_get_icon_enable(void)
+{
+   unsigned long enable = 0;
+
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      enable = gu2_get_icon_enable();
+#	endif
+   return (enable);
+}
+
+/*---------------------------------------------------------------------------
+ *  gfx_get_icon_offset
+ *---------------------------------------------------------------------------
+ */
+unsigned long
+gfx_get_icon_offset(void)
+{
+   unsigned long base = 0;
+
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      base = gu2_get_icon_offset();
+#	endif
+
+   return (base);
+}
+
+/*---------------------------------------------------------------------------
+ *  gfx_get_icon_position
+ *---------------------------------------------------------------------------
+ */
+unsigned long
+gfx_get_icon_position(void)
+{
+   unsigned long position = 0;
+
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      position = gu2_get_icon_position();
+#	endif
+
+   return (position);
+}
+
+/*---------------------------------------------------------------------------
+ *  gfx_get_icon_color
+ *---------------------------------------------------------------------------
+ */
+unsigned long
+gfx_get_icon_color(int index)
+{
+   unsigned long color = 0;
+
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      color = gu2_get_icon_color(index);
+#	endif
+
+   return (color);
+}
+
+/*---------------------------------------------------------------------------
+ *  gfx_get_compression_enable
+ *---------------------------------------------------------------------------
+ */
+int
+gfx_get_compression_enable(void)
+{
+   int enable = 0;
+
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      enable = gu1_get_compression_enable();
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      enable = gu2_get_compression_enable();
+#	endif
+   return (enable);
+}
+
+/*---------------------------------------------------------------------------
+ *  gfx_get_compression_offset
+ *---------------------------------------------------------------------------
+ */
+unsigned long
+gfx_get_compression_offset(void)
+{
+   unsigned long offset = 0;
+
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      offset = gu1_get_compression_offset();
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      offset = gu2_get_compression_offset();
+#	endif
+   return (offset);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_compression_pitch
+ *---------------------------------------------------------------------------
+ */
+unsigned short
+gfx_get_compression_pitch(void)
+{
+   unsigned short pitch = 0;
+
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      pitch = gu1_get_compression_pitch();
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      pitch = gu2_get_compression_pitch();
+#	endif
+   return (pitch);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_compression_size
+ *---------------------------------------------------------------------------
+ */
+unsigned short
+gfx_get_compression_size(void)
+{
+   unsigned short size = 0;
+
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      size = gu1_get_compression_size();
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      size = gu2_get_compression_size();
+#	endif
+   return (size);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_display_priority_high
+ *---------------------------------------------------------------------------
+ */
+int
+gfx_get_display_priority_high(void)
+{
+   int high = GFX_STATUS_UNSUPPORTED;
+
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      high = gu1_get_display_priority_high();
+#	endif
+   return (high);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_valid_bit
+ *---------------------------------------------------------------------------
+ */
+int
+gfx_get_valid_bit(int line)
+{
+   int valid = 0;
+
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      valid = gu1_get_valid_bit(line);
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      valid = gu2_get_valid_bit(line);
+#	endif
+   return (valid);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_display_video_offset
+ *---------------------------------------------------------------------------
+ */
+unsigned long
+gfx_get_display_video_offset(void)
+{
+   unsigned long offset = 0;
+
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      offset = gu1_get_display_video_offset();
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      offset = gu2_get_display_video_offset();
+#	endif
+   return (offset);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_display_video_yuv_offsets
+ *---------------------------------------------------------------------------
+ */
+void
+gfx_get_display_video_yuv_offsets(unsigned long *yoffset,
+				  unsigned long *uoffset,
+				  unsigned long *voffset)
+{
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      gu2_get_display_video_yuv_offsets(yoffset, uoffset, voffset);
+#	endif
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_display_video_yuv_offsets
+ *---------------------------------------------------------------------------
+ */
+void
+gfx_get_display_video_yuv_pitch(unsigned long *ypitch, unsigned long *uvpitch)
+{
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      gu2_get_display_video_yuv_pitch(ypitch, uvpitch);
+#	endif
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_display_video_downscale_delta
+ *---------------------------------------------------------------------------
+ */
+unsigned long
+gfx_get_display_video_downscale_delta(void)
+{
+   unsigned long ret_value = 0;
+
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      ret_value = gu2_get_display_video_downscale_delta();
+#	endif
+
+   return ret_value;
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_display_video_downscale_delta
+ *---------------------------------------------------------------------------
+ */
+int
+gfx_get_display_video_downscale_enable(void)
+{
+   int ret_value = 0;
+
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      ret_value = gu2_get_display_video_downscale_enable();
+#	endif
+
+   return ret_value;
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_display_video_size
+ *---------------------------------------------------------------------------
+ */
+unsigned long
+gfx_get_display_video_size(void)
+{
+   unsigned long size = 0;
+
+#	if GFX_DISPLAY_GU1
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU1)
+      size = gu1_get_display_video_size();
+#	endif
+#	if GFX_DISPLAY_GU2
+   if (gfx_display_type & GFX_DISPLAY_TYPE_GU2)
+      size = gu2_get_display_video_size();
+#	endif
+   return (size);
+}
+
+#endif /* GFX_READ_ROUTINES */
+
+#endif /* GFX_DISPLAY_DYNAMIC */
+
+/* END OF FILE */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/gfx_i2c.c b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/gfx_i2c.c
index cbcb737d6..385ee9fe5 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/gfx_i2c.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/gfx_i2c.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/gfx_i2c.c,v 1.1 2002/10/11 14:33:00 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/gfx_i2c.c,v 1.1 2002/12/10 15:12:25 alanh Exp $ */
 /*
  * $Workfile: gfx_i2c.c $
  *
@@ -128,7 +128,6 @@
  *
  * END_NSC_LIC_GPL */
 
-
 /* INCLUDE ROUTINES FOR ACCESS.BUS, IF SPECIFIED */
 /* This is for SC1200 systems. */
 
@@ -152,109 +151,119 @@
  * gfx_i2c_reset
  *---------------------------------------------------------------------------
  */
-int gfx_i2c_reset(unsigned char busnum, short adr, char freq)
+int
+gfx_i2c_reset(unsigned char busnum, short adr, char freq)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #if GFX_I2C_ACCESS
-	if (gfx_i2c_type & GFX_I2C_TYPE_ACCESS)
-		status = acc_i2c_reset(busnum, adr, freq);
+   if (gfx_i2c_type & GFX_I2C_TYPE_ACCESS)
+      status = acc_i2c_reset(busnum, adr, freq);
 #endif
 #if GFX_I2C_GPIO
-	if (gfx_i2c_type & GFX_I2C_TYPE_GPIO)
-		status = gpio_i2c_reset(busnum, adr, freq);
+   if (gfx_i2c_type & GFX_I2C_TYPE_GPIO)
+      status = gpio_i2c_reset(busnum, adr, freq);
 #endif
-	return(status);
+   return (status);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_i2c_select_gpio
  *---------------------------------------------------------------------------
  */
-int gfx_i2c_select_gpio(int clock, int data)
+int
+gfx_i2c_select_gpio(int clock, int data)
 {
 #if GFX_I2C_ACCESS
-	if (gfx_i2c_type & GFX_I2C_TYPE_ACCESS)
-		acc_i2c_select_gpio(clock, data);
+   if (gfx_i2c_type & GFX_I2C_TYPE_ACCESS)
+      acc_i2c_select_gpio(clock, data);
 #endif
 #if GFX_I2C_GPIO
-	if (gfx_i2c_type & GFX_I2C_TYPE_GPIO)
-		gpio_i2c_select_gpio(clock, data);
+   if (gfx_i2c_type & GFX_I2C_TYPE_GPIO)
+      gpio_i2c_select_gpio(clock, data);
 #endif
-	return(0);
+   return (0);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_i2c_write
  *---------------------------------------------------------------------------
  */
-int gfx_i2c_write(unsigned char busnum, unsigned char chipadr, unsigned char subadr, 
-	unsigned char bytes, unsigned char * data)
+int
+gfx_i2c_write(unsigned char busnum, unsigned char chipadr,
+	      unsigned char subadr, unsigned char bytes, unsigned char *data)
 {
-	int status = -1;
+   int status = -1;
+
 #if GFX_I2C_ACCESS
-	if (gfx_i2c_type & GFX_I2C_TYPE_ACCESS)
-		status = acc_i2c_write(busnum, chipadr, subadr, bytes, data);
+   if (gfx_i2c_type & GFX_I2C_TYPE_ACCESS)
+      status = acc_i2c_write(busnum, chipadr, subadr, bytes, data);
 #endif
 #if GFX_I2C_GPIO
-	if (gfx_i2c_type & GFX_I2C_TYPE_GPIO)
-		status = gpio_i2c_write(busnum, chipadr, subadr, bytes, data);
+   if (gfx_i2c_type & GFX_I2C_TYPE_GPIO)
+      status = gpio_i2c_write(busnum, chipadr, subadr, bytes, data);
 #endif
-	return(status);
+   return (status);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_i2c_read
  *---------------------------------------------------------------------------
  */
-int gfx_i2c_read(unsigned char busnum, unsigned char chipadr, unsigned char subadr, 
-	unsigned char bytes, unsigned char * data)
+int
+gfx_i2c_read(unsigned char busnum, unsigned char chipadr,
+	     unsigned char subadr, unsigned char bytes, unsigned char *data)
 {
-	int status = -1;
+   int status = -1;
+
 #if GFX_I2C_ACCESS
-	if (gfx_i2c_type & GFX_I2C_TYPE_ACCESS)
-		status = acc_i2c_read(busnum, chipadr, subadr, bytes, data);
+   if (gfx_i2c_type & GFX_I2C_TYPE_ACCESS)
+      status = acc_i2c_read(busnum, chipadr, subadr, bytes, data);
 #endif
 #if GFX_I2C_GPIO
-	if (gfx_i2c_type & GFX_I2C_TYPE_GPIO)
-		status = gpio_i2c_read(busnum, chipadr, subadr, bytes, data);
+   if (gfx_i2c_type & GFX_I2C_TYPE_GPIO)
+      status = gpio_i2c_read(busnum, chipadr, subadr, bytes, data);
 #endif
-	return(status);
+   return (status);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_i2c_init
  *---------------------------------------------------------------------------
  */
-int gfx_i2c_init(void)
+int
+gfx_i2c_init(void)
 {
-	int status = -1;
+   int status = -1;
+
 #if GFX_I2C_ACCESS
-	if (gfx_i2c_type & GFX_I2C_TYPE_ACCESS)
-		status = acc_i2c_init();
+   if (gfx_i2c_type & GFX_I2C_TYPE_ACCESS)
+      status = acc_i2c_init();
 #endif
 #if GFX_I2C_GPIO
-	if (gfx_i2c_type & GFX_I2C_TYPE_GPIO)
-		status = gpio_i2c_init();
+   if (gfx_i2c_type & GFX_I2C_TYPE_GPIO)
+      status = gpio_i2c_init();
 #endif
-	return(status);
+   return (status);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_i2c_cleanup
  *---------------------------------------------------------------------------
  */
-void gfx_i2c_cleanup(void)
+void
+gfx_i2c_cleanup(void)
 {
 #if GFX_I2C_ACCESS
-	if (gfx_i2c_type & GFX_I2C_TYPE_ACCESS)
-		acc_i2c_cleanup();
+   if (gfx_i2c_type & GFX_I2C_TYPE_ACCESS)
+      acc_i2c_cleanup();
 #endif
 #if GFX_I2C_GPIO
-	if (gfx_i2c_type & GFX_I2C_TYPE_GPIO)
-		gpio_i2c_cleanup();
+   if (gfx_i2c_type & GFX_I2C_TYPE_GPIO)
+      gpio_i2c_cleanup();
 #endif
 }
 
 #endif /* GFX_I2C_DYNAMIC */
-	
+
 /* END OF FILE */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/gfx_init.c b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/gfx_init.c
index 93b0102b5..2aa93d523 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/gfx_init.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/gfx_init.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/gfx_init.c,v 1.2 2002/10/18 20:02:40 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/gfx_init.c,v 1.1 2002/12/10 15:12:25 alanh Exp $ */
 /*
  * $Workfile: gfx_init.c $
  *
@@ -140,7 +140,6 @@
  *
  * END_NSC_LIC_GPL */
 
-
 /* CONSTANTS USED BY THE INITIALIZATION CODE */
 
 #define PCI_CONFIG_ADDR			         0x0CF8
@@ -156,15 +155,17 @@
 
 /* STATIC VARIABLES FOR THIS FILE */
 
-unsigned long gfx_cpu_version   = 0;
+unsigned long gfx_cpu_version = 0;
 unsigned long gfx_cpu_frequency = 0;
-unsigned long gfx_vid_version   = 0;
+unsigned long gfx_vid_version = 0;
 unsigned long gfx_gx1_scratch_base = 0;
 unsigned long gfx_gx2_scratch_base = 0x7FC000;
 ChipType gfx_chip_revision = CHIP_NOT_DETECTED;
 
 /* INCLUDE SUPPORT FOR FIRST GENERATION, IF SPECIFIED. */
 
+ChipType gfx_detect_chip(void);
+
 #if GFX_INIT_GU1
 #include "init_gu1.c"
 #endif
@@ -186,50 +187,47 @@ ChipType gfx_chip_revision = CHIP_NOT_DETECTED;
  * relevant to the SC1200.
  *-----------------------------------------------------------------------------
  */
-ChipType gfx_detect_chip(void)
+ChipType
+gfx_detect_chip(void)
 {
-	unsigned char pid = INB(SC1200_CB_BASE_ADDR + SC1200_CB_PID);
-	unsigned char rev = INB(SC1200_CB_BASE_ADDR + SC1200_CB_REV);
-
-	gfx_chip_revision = CHIP_NOT_DETECTED;
-
-	if (pid == 0x4)
-	{
-		switch (rev)
-		{
-			case 0:
-				gfx_chip_revision = SC1200_REV_A;
-				break;
-			case 1:
-				gfx_chip_revision = SC1200_REV_B1_B2;
-				break;
-			case 2:
-				gfx_chip_revision = SC1200_REV_B3;
-				break;
-			case 3:
-				gfx_chip_revision = SC1200_REV_C1;
-				break;
-			case 4:
-				gfx_chip_revision = SC1200_REV_D1;
-				break;
-			case 5:
-				gfx_chip_revision = SC1200_REV_D1_1;
-				break;
-			case 6:
-				gfx_chip_revision = SC1200_REV_D2_MVD;
-				break;
-		}
-		if (rev > 0x6)
-			gfx_chip_revision = SC1200_FUTURE_REV;
-	}
-	else if (pid == 0x5)
-	{
-		if (rev == 0x6)
-			gfx_chip_revision = SC1200_REV_D2_MVE;
-		else if (rev > 0x6)
-			gfx_chip_revision = SC1200_FUTURE_REV;
-	}
-	return(gfx_chip_revision);
+   unsigned char pid = INB(SC1200_CB_BASE_ADDR + SC1200_CB_PID);
+   unsigned char rev = INB(SC1200_CB_BASE_ADDR + SC1200_CB_REV);
+
+   gfx_chip_revision = CHIP_NOT_DETECTED;
+
+   if (pid == 0x4) {
+      switch (rev) {
+      case 0:
+	 gfx_chip_revision = SC1200_REV_A;
+	 break;
+      case 1:
+	 gfx_chip_revision = SC1200_REV_B1_B2;
+	 break;
+      case 2:
+	 gfx_chip_revision = SC1200_REV_B3;
+	 break;
+      case 3:
+	 gfx_chip_revision = SC1200_REV_C1;
+	 break;
+      case 4:
+	 gfx_chip_revision = SC1200_REV_D1;
+	 break;
+      case 5:
+	 gfx_chip_revision = SC1200_REV_D1_1;
+	 break;
+      case 6:
+	 gfx_chip_revision = SC1200_REV_D2_MVD;
+	 break;
+      }
+      if (rev > 0x6)
+	 gfx_chip_revision = SC1200_FUTURE_REV;
+   } else if (pid == 0x5) {
+      if (rev == 0x6)
+	 gfx_chip_revision = SC1200_REV_D2_MVE;
+      else if (rev > 0x6)
+	 gfx_chip_revision = SC1200_FUTURE_REV;
+   }
+   return (gfx_chip_revision);
 }
 
 /*-----------------------------------------------------------------------------
@@ -246,261 +244,240 @@ ChipType gfx_detect_chip(void)
  * A return value of 0x00020501, for example, indicates GXm version 5.2.
  *-----------------------------------------------------------------------------
  */
-unsigned long gfx_detect_cpu(void)
+unsigned long
+gfx_detect_cpu(void)
 {
-	
-	unsigned long value = 0;
-	unsigned long version = 0;
 
-	/* initialize core freq. to 0 */
-	gfx_cpu_frequency = 0;
-		
+   unsigned long value = 0;
+   unsigned long version = 0;
+
+   /* initialize core freq. to 0 */
+   gfx_cpu_frequency = 0;
+
 #if	GFX_INIT_GU1
 
-	value = gfx_pci_config_read(0x80000000);
-	
-	if (value == PCI_VENDOR_DEVICE_GXM)
-	{	
-		unsigned char dir0 = gfx_gxm_config_read(GXM_CONFIG_DIR0) & 0xF0;
-		unsigned char dir1 = gfx_gxm_config_read(GXM_CONFIG_DIR1);
-
-		if (dir0 == 0x40)
-		{
-			/* CHECK FOR GXLV (and GXm) (DIR1 = 0x30 THROUGH 0x82) */
-
-			if ((dir1 >= 0x30) && (dir1 <= 0x82))
-			{
-				/* Major version is one less than what appears in DIR1 */
-				if( (dir1&0xF0)<0x70){
-
-					version = GFX_CPU_GXLV | 
-
-						((( ( (unsigned long) dir1 >> 4)-1 ) << 8) )  | /* major - 1 */
-					
-						((((unsigned long) dir1 & 0x0F)) << 16);		/* minor */
-				}
-				else{
-					version = GFX_CPU_GXLV | 
-						((((unsigned long) dir1 >> 4) )  << 8) | /* major */
-						((((unsigned long) dir1 & 0x0F)) << 16); /* minor */
-	
-				}
-				/* Currently always CS5530 for video overlay. */
+   value = gfx_pci_config_read(0x80000000);
+
+   if (value == PCI_VENDOR_DEVICE_GXM) {
+      unsigned char dir0 = gfx_gxm_config_read(GXM_CONFIG_DIR0) & 0xF0;
+      unsigned char dir1 = gfx_gxm_config_read(GXM_CONFIG_DIR1);
+
+      if (dir0 == 0x40) {
+	 /* CHECK FOR GXLV (and GXm) (DIR1 = 0x30 THROUGH 0x82) */
+
+	 if ((dir1 >= 0x30) && (dir1 <= 0x82)) {
+	    /* Major version is one less than what appears in DIR1 */
+	    if ((dir1 & 0xF0) < 0x70) {
+
+	       version = GFX_CPU_GXLV | (((((unsigned long)dir1 >> 4) - 1) << 8)) |	/* major - 1 */
+		     ((((unsigned long)dir1 & 0x0F)) << 16);	/* minor */
+	    } else {
+	       version = GFX_CPU_GXLV | ((((unsigned long)dir1 >> 4)) << 8) |	/* major */
+		     ((((unsigned long)dir1 & 0x0F)) << 16);	/* minor */
+
+	    }
+	    /* Currently always CS5530 for video overlay. */
 
 #				if GFX_VIDEO_DYNAMIC
-				gfx_video_type = GFX_VIDEO_TYPE_CS5530;
+	    gfx_video_type = GFX_VIDEO_TYPE_CS5530;
 #				endif
 
-				/* Currently always CS5530 GPIOs for I2C access. */
+	    /* Currently always CS5530 GPIOs for I2C access. */
 
 #				if GFX_I2C_DYNAMIC
-				gfx_i2c_type = GFX_I2C_TYPE_GPIO;
+	    gfx_i2c_type = GFX_I2C_TYPE_GPIO;
 #				endif
 
 #				if GFX_TV_DYNAMIC
-				gfx_tv_type = GFX_TV_TYPE_FS451;
+	    gfx_tv_type = GFX_TV_TYPE_FS451;
 #				endif
-			}
-		}
-		else if (dir0 == 0xB0)
-		{
-			/* CHECK FOR SC1200 */
+	 }
+      } else if (dir0 == 0xB0) {
+	 /* CHECK FOR SC1200 */
 
-			if ((dir1 == 0x70) || (dir1 == 0x81))
-			{
-				version = GFX_CPU_SC1200 | 
-					((((unsigned long) dir1 >> 4) )  << 8) | /* major */
-					((((unsigned long) dir1 & 0x0F)) << 16); /* minor */
+	 if ((dir1 == 0x70) || (dir1 == 0x81)) {
+	    version = GFX_CPU_SC1200 | ((((unsigned long)dir1 >> 4)) << 8) |	/* major */
+		  ((((unsigned long)dir1 & 0x0F)) << 16);	/* minor */
 
-				/* Detect SC1200 revision */
-				
-				gfx_detect_chip();
+	    /* Detect SC1200 revision */
 
-				/* SC1200 for video overlay and VIP. */
+	    gfx_detect_chip();
 
-#				if GFX_VIDEO_DYNAMIC  
-				gfx_video_type = GFX_VIDEO_TYPE_SC1200;
-#				endif		
+	    /* SC1200 for video overlay and VIP. */
+
+#				if GFX_VIDEO_DYNAMIC
+	    gfx_video_type = GFX_VIDEO_TYPE_SC1200;
+#				endif
 
 #				if GFX_VIP_DYNAMIC
-				gfx_vip_type = GFX_VIP_TYPE_SC1200;
+	    gfx_vip_type = GFX_VIP_TYPE_SC1200;
 #				endif
 
-				/* Currently always SAA7114 decoder. */
+	    /* Currently always SAA7114 decoder. */
 
 #				if GFX_DECODER_DYNAMIC
-				gfx_decoder_type = GFX_DECODER_TYPE_SAA7114;
+	    gfx_decoder_type = GFX_DECODER_TYPE_SAA7114;
 #				endif
 
-				/* SC1200 for TV encoder */
+	    /* SC1200 for TV encoder */
 
 #				if GFX_TV_DYNAMIC
-				gfx_tv_type = GFX_TV_TYPE_SC1200; 
+	    gfx_tv_type = GFX_TV_TYPE_SC1200;
 #				endif
 
-				/* Currently always ACCESS.bus for I2C access. */
+	    /* Currently always ACCESS.bus for I2C access. */
 
 #				if GFX_I2C_DYNAMIC
-				gfx_i2c_type = GFX_I2C_TYPE_ACCESS;
+	    gfx_i2c_type = GFX_I2C_TYPE_ACCESS;
 #				endif
-			}
-		}
+	 }
+      }
 
-		if (version )
-		{
-			/* ALWAYS FIRST GENERATION GRAPHICS UNIT */
+      if (version) {
+	 /* ALWAYS FIRST GENERATION GRAPHICS UNIT */
 
 #			if GFX_DISPLAY_DYNAMIC
-			gfx_display_type = GFX_DISPLAY_TYPE_GU1;
+	 gfx_display_type = GFX_DISPLAY_TYPE_GU1;
 #			endif
 #			if GFX_2DACCEL_DYNAMIC
-			gfx_2daccel_type = GFX_2DACCEL_TYPE_GU1;
+	 gfx_2daccel_type = GFX_2DACCEL_TYPE_GU1;
 #			endif
 #			if GFX_INIT_DYNAMIC
-			gfx_init_type = GFX_INIT_TYPE_GU1;
+	 gfx_init_type = GFX_INIT_TYPE_GU1;
 #			endif
 
-			/* READ THE CORE FREQUENCY  */
-
-			gfx_cpu_frequency = gfx_get_core_freq();
-		}
-	}
+	 /* READ THE CORE FREQUENCY  */
 
+	 gfx_cpu_frequency = gfx_get_core_freq();
+      }
+   }
 #endif
 
 #if GFX_INIT_GU2
-	
-	value = gfx_pci_config_read(0x80000800);
-
-	if (value == PCI_VENDOR_DEVICE_REDCLOUD)
-	{
-		Q_WORD msr_value;
-		int valid, i;
-		
-		/* CHECK FOR SOFT VG */
-		/* If SoftVG is not present, the base addresses for all devices */
-		/* will not be allocated.  Essentially, it is as if no Redcloud */
-		/* video hardware is present.                                   */
-
-		value = gfx_pci_config_read (0x80000900);
-
-		if (value == REDCLOUD_VIDEO_PCI_VENDOR_DEVICE)
-		{
-			valid = 1;
-
-			/* BAR0 - BAR3 HOLD THE PERIPHERAL BASE ADDRESSES */
-
-			for (i = 0; i < 4; i++)
-			{
-				value = gfx_pci_config_read (0x80000910 + (i << 2));
-				if (value == 0x00000000 || value == 0xFFFFFFFF)
-				{
-					valid = 0;
-					break;
-				}
-			}
-
-			if (valid)
-			{
-				/* REDCLOUD INTEGRATED VIDEO             */
-
-#				if GFX_VIDEO_DYNAMIC  
-				gfx_video_type = GFX_VIDEO_TYPE_REDCLOUD;
+
+   value = gfx_pci_config_read(0x80000800);
+
+   if (value == PCI_VENDOR_DEVICE_REDCLOUD) {
+      Q_WORD msr_value;
+      int valid, i;
+
+      /* CHECK FOR SOFT VG */
+      /* If SoftVG is not present, the base addresses for all devices */
+      /* will not be allocated.  Essentially, it is as if no Redcloud */
+      /* video hardware is present.                                   */
+
+      value = gfx_pci_config_read(0x80000900);
+
+      if (value == REDCLOUD_VIDEO_PCI_VENDOR_DEVICE) {
+	 valid = 1;
+
+	 /* BAR0 - BAR3 HOLD THE PERIPHERAL BASE ADDRESSES */
+
+	 for (i = 0; i < 4; i++) {
+	    value = gfx_pci_config_read(0x80000910 + (i << 2));
+	    if (value == 0x00000000 || value == 0xFFFFFFFF) {
+	       valid = 0;
+	       break;
+	    }
+	 }
+
+	 if (valid) {
+	    /* REDCLOUD INTEGRATED VIDEO             */
+
+#				if GFX_VIDEO_DYNAMIC
+	    gfx_video_type = GFX_VIDEO_TYPE_REDCLOUD;
 #				endif
-				
-				/* CURRENTLY, ALWAYS GPIO FOR I2C ACCESS */
+
+	    /* CURRENTLY, ALWAYS GPIO FOR I2C ACCESS */
 
 #				if GFX_I2C_DYNAMIC
-				gfx_i2c_type = GFX_I2C_TYPE_GPIO;
+	    gfx_i2c_type = GFX_I2C_TYPE_GPIO;
 #				endif
 
-				/* SECOND-GENERATION DISPLAY CONTROLLER  */
+	    /* SECOND-GENERATION DISPLAY CONTROLLER  */
 
 #				if GFX_DISPLAY_DYNAMIC
-				gfx_display_type = GFX_DISPLAY_TYPE_GU2;
+	    gfx_display_type = GFX_DISPLAY_TYPE_GU2;
 #				endif
 
-				/* SECOND-GENERATION GRAPHICS UNIT       */
+	    /* SECOND-GENERATION GRAPHICS UNIT       */
 
 #				if GFX_2DACCEL_DYNAMIC
-				gfx_2daccel_type = GFX_2DACCEL_TYPE_GU2;
+	    gfx_2daccel_type = GFX_2DACCEL_TYPE_GU2;
 #				endif
-				
-				/* SECOND-GENERATION INITIALIZATION      */
+
+	    /* SECOND-GENERATION INITIALIZATION      */
 
 #				if GFX_INIT_DYNAMIC
-				gfx_init_type = GFX_INIT_TYPE_GU2;
+	    gfx_init_type = GFX_INIT_TYPE_GU2;
 #				endif
 
-				/* MBUS MSR ACCESSES                     */
+	    /* MBUS MSR ACCESSES                     */
 
 #				if GFX_MSR_DYNAMIC
-				gfx_msr_type = GFX_MSR_TYPE_REDCLOUD;
+	    gfx_msr_type = GFX_MSR_TYPE_REDCLOUD;
 #				endif
 
-				/* CS5530 GPIO I2C */
+	    /* CS5530 GPIO I2C */
 
 #				if GFX_I2C_DYNAMIC
-				gfx_i2c_type = GFX_I2C_TYPE_GPIO;
+	    gfx_i2c_type = GFX_I2C_TYPE_GPIO;
 #				endif
 
-				/* READ VERSION */
+	    /* READ VERSION */
 
-				gfx_msr_init();
+	    gfx_msr_init();
 
-				gfx_msr_read (RC_ID_MCP, MCP_RC_REVID, &msr_value);
+	    gfx_msr_read(RC_ID_MCP, MCP_RC_REVID, &msr_value);
 
-				/* SUBTRACT 1 FROM REV ID                                */
-				/* REDCLOUD 1.X rev id is 1 less than the reported value */
+	    /* SUBTRACT 1 FROM REV ID                                */
+	    /* REDCLOUD 1.X rev id is 1 less than the reported value */
 
-				if ((msr_value.low & 0xF0) == 0x10)
-					msr_value.low--;
+	    if ((msr_value.low & 0xF0) == 0x10)
+	       msr_value.low--;
 
-				version = GFX_CPU_REDCLOUD        |
-					((msr_value.low & 0xF0) << 4) |    /* MAJOR */
-					((msr_value.low & 0x0F) << 16);    /* MINOR */
+	    version = GFX_CPU_REDCLOUD | ((msr_value.low & 0xF0) << 4) |	/* MAJOR */
+		  ((msr_value.low & 0x0F) << 16);	/* MINOR */
 
-				/* READ THE CORE FREQUENCY  */
+	    /* READ THE CORE FREQUENCY  */
 
-				gfx_cpu_frequency = gfx_get_core_freq();
+	    gfx_cpu_frequency = gfx_get_core_freq();
 
-				/* SET THE GP SCRATCH AREA */
-				/* Color bitmap BLTs use the last 16K of frame buffer space */
-
-				gfx_gx2_scratch_base = gfx_get_frame_buffer_size() - 0x4000;
-			}	
-		}
-	}
+	    /* SET THE GP SCRATCH AREA */
+	    /* Color bitmap BLTs use the last 16K of frame buffer space */
 
+	    gfx_gx2_scratch_base = gfx_get_frame_buffer_size() - 0x4000;
+	 }
+      }
+   }
 #endif
 
-	if (!version)
-	{
-		/* ALWAYS SECOND GENERATION IF SIMULATING */
-		/* For now, that is.  This could change.  */
+   if (!version) {
+      /* ALWAYS SECOND GENERATION IF SIMULATING */
+      /* For now, that is.  This could change.  */
 
 #		if GFX_DISPLAY_DYNAMIC
-		gfx_display_type = GFX_DISPLAY_TYPE_GU2;
+      gfx_display_type = GFX_DISPLAY_TYPE_GU2;
 #		endif
 #		if GFX_2DACCEL_DYNAMIC
-		gfx_2daccel_type = GFX_2DACCEL_TYPE_GU2;
+      gfx_2daccel_type = GFX_2DACCEL_TYPE_GU2;
 #		endif
 #		if GFX_INIT_DYNAMIC
-		gfx_init_type = GFX_INIT_TYPE_GU2;
+      gfx_init_type = GFX_INIT_TYPE_GU2;
 #		endif
 #		if GFX_MSR_DYNAMIC
-		gfx_msr_type = GFX_MSR_TYPE_REDCLOUD;
+      gfx_msr_type = GFX_MSR_TYPE_REDCLOUD;
 #		endif
 #		if GFX_VIDEO_DYNAMIC
-		gfx_video_type = GFX_VIDEO_TYPE_REDCLOUD;
+      gfx_video_type = GFX_VIDEO_TYPE_REDCLOUD;
 #		endif
 #		if GFX_I2C_DYNAMIC
-		gfx_i2c_type = GFX_I2C_TYPE_GPIO;
+      gfx_i2c_type = GFX_I2C_TYPE_GPIO;
 #		endif
-	}
-	gfx_cpu_version = version;
-	
-	return(version);
+   }
+   gfx_cpu_version = version;
+
+   return (version);
 }
 
 /*-----------------------------------------------------------------------------
@@ -515,17 +492,19 @@ unsigned long gfx_detect_cpu(void)
  * the video hardware entirely on the detected CPU.
  *-----------------------------------------------------------------------------
  */
-unsigned long gfx_detect_video(void)
+unsigned long
+gfx_detect_video(void)
 {
-	unsigned long version = 0;
-	if ((gfx_cpu_version & 0xFF) == GFX_CPU_GXLV)
-		version = GFX_VID_CS5530;
-	else if ((gfx_cpu_version & 0xFF) == GFX_CPU_SC1200)
-		version = GFX_VID_SC1200;
-	else if ((gfx_cpu_version & 0xFF) == GFX_CPU_REDCLOUD)
-		version = GFX_VID_REDCLOUD;
-	gfx_vid_version = version;
-	return(version);
+   unsigned long version = 0;
+
+   if ((gfx_cpu_version & 0xFF) == GFX_CPU_GXLV)
+      version = GFX_VID_CS5530;
+   else if ((gfx_cpu_version & 0xFF) == GFX_CPU_SC1200)
+      version = GFX_VID_SC1200;
+   else if ((gfx_cpu_version & 0xFF) == GFX_CPU_REDCLOUD)
+      version = GFX_VID_REDCLOUD;
+   gfx_vid_version = version;
+   return (version);
 }
 
 /*-----------------------------------------------------------------------------
@@ -535,12 +514,14 @@ unsigned long gfx_detect_video(void)
  * configuration space.
  *-----------------------------------------------------------------------------
  */
-unsigned long gfx_pci_config_read(unsigned long address)
+unsigned long
+gfx_pci_config_read(unsigned long address)
 {
-	unsigned long value = 0xFFFFFFFF;
-	OUTD(PCI_CONFIG_ADDR, address);
-	value = IND(PCI_CONFIG_DATA);
-	return(value);
+   unsigned long value = 0xFFFFFFFF;
+
+   OUTD(PCI_CONFIG_ADDR, address);
+   value = IND(PCI_CONFIG_DATA);
+   return (value);
 }
 
 /*-----------------------------------------------------------------------------
@@ -550,11 +531,12 @@ unsigned long gfx_pci_config_read(unsigned long address)
  * configuration space.
  *-----------------------------------------------------------------------------
  */
-void gfx_pci_config_write(unsigned long address, unsigned long data)
+void
+gfx_pci_config_write(unsigned long address, unsigned long data)
 {
-	OUTD(PCI_CONFIG_ADDR, address);
-	OUTD(PCI_CONFIG_DATA, data);
-	return;
+   OUTD(PCI_CONFIG_ADDR, address);
+   OUTD(PCI_CONFIG_DATA, data);
+   return;
 }
 
 /* WRAPPERS IF DYNAMIC SELECTION */
@@ -566,134 +548,141 @@ void gfx_pci_config_write(unsigned long address, unsigned long data)
  * gfx_get_core_freq
  *-----------------------------------------------------------------------------
  */
-unsigned long gfx_get_core_freq(void)
+unsigned long
+gfx_get_core_freq(void)
 {
-	unsigned long freq = 0;
+   unsigned long freq = 0;
+
 #	if GFX_INIT_GU1
-	if (gfx_init_type & GFX_INIT_TYPE_GU1)
-		freq = gu1_get_core_freq();
+   if (gfx_init_type & GFX_INIT_TYPE_GU1)
+      freq = gu1_get_core_freq();
 #	endif
 #	if GFX_INIT_GU2
-	if (gfx_init_type & GFX_INIT_TYPE_GU2)
-		freq = gu2_get_core_freq();
+   if (gfx_init_type & GFX_INIT_TYPE_GU2)
+      freq = gu2_get_core_freq();
 #	endif
-	return freq;
+   return freq;
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_get_cpu_register_base
  *-----------------------------------------------------------------------------
  */
-unsigned long gfx_get_cpu_register_base(void)
+unsigned long
+gfx_get_cpu_register_base(void)
 {
-	unsigned long base = 0;
-	
-#	if GFX_INIT_GU1	
-	if (gfx_init_type & GFX_INIT_TYPE_GU1)
-		base = gu1_get_cpu_register_base ();
+   unsigned long base = 0;
+
+#	if GFX_INIT_GU1
+   if (gfx_init_type & GFX_INIT_TYPE_GU1)
+      base = gu1_get_cpu_register_base();
 #	endif
-#	if GFX_INIT_GU2	
-	if (gfx_init_type & GFX_INIT_TYPE_GU2)
-		base = gu2_get_cpu_register_base ();
+#	if GFX_INIT_GU2
+   if (gfx_init_type & GFX_INIT_TYPE_GU2)
+      base = gu2_get_cpu_register_base();
 #	endif
 
-	return(base);
+   return (base);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_get_graphics_register_base
  *-----------------------------------------------------------------------------
  */
-unsigned long gfx_get_graphics_register_base(void)
+unsigned long
+gfx_get_graphics_register_base(void)
 {
-	unsigned long base = 0;
-	
+   unsigned long base = 0;
+
 #	if GFX_INIT_GU2
-	if (gfx_init_type & GFX_INIT_TYPE_GU2)
-		base = gu2_get_graphics_register_base ();
+   if (gfx_init_type & GFX_INIT_TYPE_GU2)
+      base = gu2_get_graphics_register_base();
 #	endif
 
-	return(base);
+   return (base);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_get_frame_buffer_base
  *-----------------------------------------------------------------------------
  */
-unsigned long gfx_get_frame_buffer_base(void)
+unsigned long
+gfx_get_frame_buffer_base(void)
 {
-	unsigned long base = 0;
-	
-#	if GFX_INIT_GU1	
-	if (gfx_init_type & GFX_INIT_TYPE_GU1)
-		base = gu1_get_frame_buffer_base ();
+   unsigned long base = 0;
+
+#	if GFX_INIT_GU1
+   if (gfx_init_type & GFX_INIT_TYPE_GU1)
+      base = gu1_get_frame_buffer_base();
 #	endif
-#	if GFX_INIT_GU2	
-	if (gfx_init_type & GFX_INIT_TYPE_GU2)
-		base = gu2_get_frame_buffer_base ();
+#	if GFX_INIT_GU2
+   if (gfx_init_type & GFX_INIT_TYPE_GU2)
+      base = gu2_get_frame_buffer_base();
 #	endif
 
-	return(base);
+   return (base);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_get_frame_buffer_size
  *-----------------------------------------------------------------------------
  */
-unsigned long gfx_get_frame_buffer_size(void)
+unsigned long
+gfx_get_frame_buffer_size(void)
 {
-	unsigned long size = 0;
+   unsigned long size = 0;
 
-#	if GFX_INIT_GU1	
-	if (gfx_init_type & GFX_INIT_TYPE_GU1)
-		size = gu1_get_frame_buffer_size();
+#	if GFX_INIT_GU1
+   if (gfx_init_type & GFX_INIT_TYPE_GU1)
+      size = gu1_get_frame_buffer_size();
 #	endif
-#	if GFX_INIT_GU2	
-	if (gfx_init_type & GFX_INIT_TYPE_GU2)
-		size = gu2_get_frame_buffer_size();
+#	if GFX_INIT_GU2
+   if (gfx_init_type & GFX_INIT_TYPE_GU2)
+      size = gu2_get_frame_buffer_size();
 #	endif
 
-	return size;
+   return size;
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_get_vid_register_base
  *-----------------------------------------------------------------------------
  */
-unsigned long gfx_get_vid_register_base(void)
+unsigned long
+gfx_get_vid_register_base(void)
 {
-	unsigned long base = 0;
-	
-#	if GFX_INIT_GU1	
-	if (gfx_init_type & GFX_INIT_TYPE_GU1)
-		base = gu1_get_vid_register_base ();
+   unsigned long base = 0;
+
+#	if GFX_INIT_GU1
+   if (gfx_init_type & GFX_INIT_TYPE_GU1)
+      base = gu1_get_vid_register_base();
 #	endif
 #	if GFX_INIT_GU2
-	if (gfx_init_type & GFX_INIT_TYPE_GU2)
-		base = gu2_get_vid_register_base ();
+   if (gfx_init_type & GFX_INIT_TYPE_GU2)
+      base = gu2_get_vid_register_base();
 #	endif
 
-	return(base);
+   return (base);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_get_vip_register_base
  *-----------------------------------------------------------------------------
  */
-unsigned long gfx_get_vip_register_base(void)
+unsigned long
+gfx_get_vip_register_base(void)
 {
-	unsigned long base = 0;
-	
-#	if GFX_INIT_GU1	
-	if (gfx_init_type & GFX_INIT_TYPE_GU1)
-		base = gu1_get_vip_register_base ();
+   unsigned long base = 0;
+
+#	if GFX_INIT_GU1
+   if (gfx_init_type & GFX_INIT_TYPE_GU1)
+      base = gu1_get_vip_register_base();
 #	endif
 
-	return(base);
+   return (base);
 }
 
 #endif
 
 /* END OF FILE */
 
-
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/gfx_mode.h b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/gfx_mode.h
index f7293e6b4..100b36c18 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/gfx_mode.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/gfx_mode.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/gfx_mode.h,v 1.1 2002/10/11 14:33:00 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/gfx_mode.h,v 1.1 2002/12/10 15:12:25 alanh Exp $ */
 /*
  * $Workfile: gfx_mode.h $
  *
@@ -129,7 +129,6 @@
  *
  * END_NSC_LIC_GPL */
 
-
 #ifndef _gfx_mode_h
 #define _gfx_mode_h
 
@@ -155,71 +154,71 @@
 
 #define GFX_MODE_LOCK_TIMING  0x10000000
 
-
 /* STRUCTURE DEFINITION */
 
 typedef struct tagDISPLAYMODE
 {
-	/* DISPLAY MODE FLAGS */
-	/* Specify valid color depths and the refresh rate. */
+   /* DISPLAY MODE FLAGS */
+   /* Specify valid color depths and the refresh rate. */
 
-	unsigned long flags;
+   unsigned long flags;
 
-	/* TIMINGS */
+   /* TIMINGS */
 
-	unsigned short hactive; 
-	unsigned short hblankstart; 
-	unsigned short hsyncstart; 
-	unsigned short hsyncend; 
-	unsigned short hblankend; 
-	unsigned short htotal; 
+   unsigned short hactive;
+   unsigned short hblankstart;
+   unsigned short hsyncstart;
+   unsigned short hsyncend;
+   unsigned short hblankend;
+   unsigned short htotal;
 
-	unsigned short vactive;
-	unsigned short vblankstart;
-	unsigned short vsyncstart;
-	unsigned short vsyncend;
-	unsigned short vblankend;
-	unsigned short vtotal;
+   unsigned short vactive;
+   unsigned short vblankstart;
+   unsigned short vsyncstart;
+   unsigned short vsyncend;
+   unsigned short vblankend;
+   unsigned short vtotal;
 
-	/* CLOCK FREQUENCY */
-	
-	unsigned long frequency;
+   /* CLOCK FREQUENCY */
 
-} DISPLAYMODE;
+   unsigned long frequency;
 
+}
+DISPLAYMODE;
 
 /* For Fixed timings */
 typedef struct tagFIXEDTIMINGS
 {
-	/* DISPLAY MODE FLAGS */
-	/* Specify valid color depths and the refresh rate. */
-
-	int panelresx;
-	int panelresy;
-	unsigned short xres;
-	unsigned short yres;
-	
-	/* TIMINGS */
-
-	unsigned short hactive; 
-	unsigned short hblankstart; 
-	unsigned short hsyncstart; 
-	unsigned short hsyncend; 
-	unsigned short hblankend; 
-	unsigned short htotal; 
-
-	unsigned short vactive;
-	unsigned short vblankstart;
-	unsigned short vsyncstart;
-	unsigned short vsyncend;
-	unsigned short vblankend;
-	unsigned short vtotal;
-
-	/* CLOCK FREQUENCY */
-	
-	unsigned long frequency;
-
-} FIXEDTIMINGS;
+   /* DISPLAY MODE FLAGS */
+   /* Specify valid color depths and the refresh rate. */
+
+   int panelresx;
+   int panelresy;
+   unsigned short xres;
+   unsigned short yres;
+
+   /* TIMINGS */
+
+   unsigned short hactive;
+   unsigned short hblankstart;
+   unsigned short hsyncstart;
+   unsigned short hsyncend;
+   unsigned short hblankend;
+   unsigned short htotal;
+
+   unsigned short vactive;
+   unsigned short vblankstart;
+   unsigned short vsyncstart;
+   unsigned short vsyncend;
+   unsigned short vblankend;
+   unsigned short vtotal;
+
+   /* CLOCK FREQUENCY */
+
+   unsigned long frequency;
+
+}
+FIXEDTIMINGS;
 
 #endif /* !_gfx_mode_h */
 
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/gfx_msr.c b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/gfx_msr.c
index 92c632ba5..c6b1caf49 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/gfx_msr.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/gfx_msr.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/gfx_msr.c,v 1.2 2002/10/18 20:02:40 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/gfx_msr.c,v 1.1 2002/12/10 15:12:25 alanh Exp $ */
 /*
  * $Workfile: gfx_msr.c $
  *
@@ -137,7 +137,6 @@
  *
  * END_NSC_LIC_GPL */
 
-
 /* INCLUDE SUPPORT FOR REDCLOUD, IF SPECIFIED */
 
 #if GFX_MSR_REDCLOUD
@@ -152,96 +151,103 @@
  * gfx_msr_init
  *-----------------------------------------------------------------------------
  */
-int gfx_msr_init ()
+int
+gfx_msr_init()
 {
-	int ret_value = 0;
+   int ret_value = 0;
 
 #	if GFX_MSR_REDCLOUD
-	if (gfx_msr_type & GFX_MSR_TYPE_REDCLOUD)
-		ret_value = redcloud_msr_init();
+   if (gfx_msr_type & GFX_MSR_TYPE_REDCLOUD)
+      ret_value = redcloud_msr_init();
 #	endif
 
-	return ret_value;
+   return ret_value;
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_id_msr_device
  *-----------------------------------------------------------------------------
  */
-DEV_STATUS gfx_id_msr_device (MSR *pDev, unsigned long address)
+DEV_STATUS
+gfx_id_msr_device(MSR * pDev, unsigned long address)
 {
-	DEV_STATUS ret_value = NOT_KNOWN;
+   DEV_STATUS ret_value = NOT_KNOWN;
 
 #	if GFX_MSR_REDCLOUD
-	if (gfx_msr_type & GFX_MSR_TYPE_REDCLOUD)
-		ret_value = redcloud_id_msr_device(pDev, address);
+   if (gfx_msr_type & GFX_MSR_TYPE_REDCLOUD)
+      ret_value = redcloud_id_msr_device(pDev, address);
 #	endif
 
-	return ret_value;
+   return ret_value;
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_get_msr_dev_address
  *-----------------------------------------------------------------------------
  */
-DEV_STATUS gfx_get_msr_dev_address (unsigned int device, unsigned long *address)
+DEV_STATUS
+gfx_get_msr_dev_address(unsigned int device, unsigned long *address)
 {
-	DEV_STATUS ret_value = NOT_KNOWN;
+   DEV_STATUS ret_value = NOT_KNOWN;
 
 #	if GFX_MSR_REDCLOUD
-	if (gfx_msr_type & GFX_MSR_TYPE_REDCLOUD)
-		ret_value = redcloud_get_msr_dev_address (device, address);
+   if (gfx_msr_type & GFX_MSR_TYPE_REDCLOUD)
+      ret_value = redcloud_get_msr_dev_address(device, address);
 #	endif
 
-	return ret_value;
+   return ret_value;
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_get_glink_id_at_address
  *-----------------------------------------------------------------------------
  */
-DEV_STATUS gfx_get_glink_id_at_address(unsigned int *device, unsigned long address)
+DEV_STATUS
+gfx_get_glink_id_at_address(unsigned int *device, unsigned long address)
 {
-	DEV_STATUS ret_value = NOT_KNOWN;
+   DEV_STATUS ret_value = NOT_KNOWN;
 
 #	if GFX_MSR_REDCLOUD
-	if (gfx_msr_type & GFX_MSR_TYPE_REDCLOUD)
-		ret_value = redcloud_get_glink_id_at_address (device, address);
+   if (gfx_msr_type & GFX_MSR_TYPE_REDCLOUD)
+      ret_value = redcloud_get_glink_id_at_address(device, address);
 #	endif
 
-	return ret_value;
+   return ret_value;
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_msr_read
  *-----------------------------------------------------------------------------
  */
-DEV_STATUS gfx_msr_read (unsigned int device, unsigned int msrRegister, Q_WORD *msrValue)
+DEV_STATUS
+gfx_msr_read(unsigned int device, unsigned int msrRegister, Q_WORD * msrValue)
 {
-	DEV_STATUS ret_value = NOT_KNOWN;
+   DEV_STATUS ret_value = NOT_KNOWN;
 
 #	if GFX_MSR_REDCLOUD
-	if (gfx_msr_type & GFX_MSR_TYPE_REDCLOUD)
-		ret_value = redcloud_msr_read (device, msrRegister, msrValue);
+   if (gfx_msr_type & GFX_MSR_TYPE_REDCLOUD)
+      ret_value = redcloud_msr_read(device, msrRegister, msrValue);
 #	endif
 
-	return ret_value;
+   return ret_value;
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_msr_write
  *-----------------------------------------------------------------------------
  */
-DEV_STATUS gfx_msr_write (unsigned int device, unsigned int msrRegister, Q_WORD *msrValue)
+DEV_STATUS
+gfx_msr_write(unsigned int device, unsigned int msrRegister,
+	      Q_WORD * msrValue)
 {
-	DEV_STATUS ret_value = NOT_KNOWN;
+   DEV_STATUS ret_value = NOT_KNOWN;
 
 #	if GFX_MSR_REDCLOUD
-	if (gfx_msr_type & GFX_MSR_TYPE_REDCLOUD)
-		ret_value = redcloud_msr_write(device, msrRegister, msrValue);
+   if (gfx_msr_type & GFX_MSR_TYPE_REDCLOUD)
+      ret_value = redcloud_msr_write(device, msrRegister, msrValue);
 #	endif
 
-	return ret_value;
+   return ret_value;
 }
 
 #endif
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/gfx_regs.h b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/gfx_regs.h
index 9aac33475..7b11887be 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/gfx_regs.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/gfx_regs.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/gfx_regs.h,v 1.1 2002/10/11 14:33:00 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/gfx_regs.h,v 1.2 2003/02/05 18:38:43 alanh Exp $ */
 /*
  * $Workfile: gfx_regs.h $
  *
@@ -128,141 +128,140 @@
  *
  * END_NSC_LIC_GPL */
 
-
 /*----------------------------------*/
 /*  FIRST GENERATION GRAPHICS UNIT  */
 /*----------------------------------*/
 
-#define GP_DST_XCOOR			0x8100		/* x destination origin		*/
-#define GP_DST_YCOOR			0x8102		/* y destination origin		*/
-#define GP_WIDTH				0x8104		/* pixel width				*/
-#define GP_HEIGHT				0x8106		/* pixel height				*/
-#define GP_SRC_XCOOR			0x8108		/* x source origin			*/
-#define GP_SRC_YCOOR			0x810A		/* y source origin			*/
-
-#define GP_VECTOR_LENGTH		0x8104		/* vector length			*/
-#define GP_INIT_ERROR			0x8106		/* vector initial error		*/
-#define GP_AXIAL_ERROR			0x8108		/* axial error increment	*/
-#define GP_DIAG_ERROR			0x810A		/* diagonal error increment */
-
-#define GP_SRC_COLOR_0			0x810C		/* source color 0			*/
-#define GP_SRC_COLOR_1			0x810E		/* source color 1			*/
-#define GP_PAT_COLOR_0			0x8110		/* pattern color 0          */
-#define GP_PAT_COLOR_1			0x8112		/* pattern color 1          */
-#define GP_PAT_COLOR_2			0x8114		/* pattern color 2          */
-#define GP_PAT_COLOR_3			0x8116		/* pattern color 3          */
-#define GP_PAT_DATA_0			0x8120		/* bits 31:0 of pattern		*/
-#define GP_PAT_DATA_1			0x8124		/* bits 63:32 of pattern	*/
-#define GP_PAT_DATA_2			0x8128		/* bits 95:64 of pattern	*/
-#define GP_PAT_DATA_3			0x812C		/* bits 127:96 of pattern	*/
-
-#define GP_VGA_WRITE			0x8140		/* VGA write path control   */
-#define GP_VGA_READ				0x8144		/* VGA read path control    */
-
-#define GP_RASTER_MODE			0x8200		/* raster operation			*/
-#define GP_VECTOR_MODE			0x8204		/* vector mode register		*/
-#define GP_BLIT_MODE			0x8208		/* blit mode register		*/
-#define GP_BLIT_STATUS			0x820C		/* blit status register		*/
-
-#define GP_VGA_BASE				0x8210		/* VGA memory offset (x64K) */
-#define GP_VGA_LATCH			0x8214		/* VGA display latch        */
+#define GP_DST_XCOOR			0x8100	/* x destination origin         */
+#define GP_DST_YCOOR			0x8102	/* y destination origin         */
+#define GP_WIDTH				0x8104	/* pixel width                          */
+#define GP_HEIGHT				0x8106	/* pixel height                         */
+#define GP_SRC_XCOOR			0x8108	/* x source origin                      */
+#define GP_SRC_YCOOR			0x810A	/* y source origin                      */
+
+#define GP_VECTOR_LENGTH		0x8104	/* vector length                        */
+#define GP_INIT_ERROR			0x8106	/* vector initial error         */
+#define GP_AXIAL_ERROR			0x8108	/* axial error increment        */
+#define GP_DIAG_ERROR			0x810A	/* diagonal error increment */
+
+#define GP_SRC_COLOR_0			0x810C	/* source color 0                       */
+#define GP_SRC_COLOR_1			0x810E	/* source color 1                       */
+#define GP_PAT_COLOR_0			0x8110	/* pattern color 0          */
+#define GP_PAT_COLOR_1			0x8112	/* pattern color 1          */
+#define GP_PAT_COLOR_2			0x8114	/* pattern color 2          */
+#define GP_PAT_COLOR_3			0x8116	/* pattern color 3          */
+#define GP_PAT_DATA_0			0x8120	/* bits 31:0 of pattern         */
+#define GP_PAT_DATA_1			0x8124	/* bits 63:32 of pattern        */
+#define GP_PAT_DATA_2			0x8128	/* bits 95:64 of pattern        */
+#define GP_PAT_DATA_3			0x812C	/* bits 127:96 of pattern       */
+
+#define GP_VGA_WRITE			0x8140	/* VGA write path control   */
+#define GP_VGA_READ				0x8144	/* VGA read path control    */
+
+#define GP_RASTER_MODE			0x8200	/* raster operation                     */
+#define GP_VECTOR_MODE			0x8204	/* vector mode register         */
+#define GP_BLIT_MODE			0x8208	/* blit mode register           */
+#define GP_BLIT_STATUS			0x820C	/* blit status register         */
+
+#define GP_VGA_BASE				0x8210	/* VGA memory offset (x64K) */
+#define GP_VGA_LATCH			0x8214	/* VGA display latch        */
 
 /* "GP_VECTOR_MODE" BIT DEFINITIONS */
 
-#define VM_X_MAJOR				0x0000		/* X major vector			*/
-#define VM_Y_MAJOR				0x0001		/* Y major vector			*/
-#define VM_MAJOR_INC			0x0002		/* positive major axis step */
-#define VM_MINOR_INC			0x0004		/* positive minor axis step */
-#define VM_READ_DST_FB			0x0008		/* read destination data	*/
+#define VM_X_MAJOR				0x0000	/* X major vector                       */
+#define VM_Y_MAJOR				0x0001	/* Y major vector                       */
+#define VM_MAJOR_INC			0x0002	/* positive major axis step */
+#define VM_MINOR_INC			0x0004	/* positive minor axis step */
+#define VM_READ_DST_FB			0x0008	/* read destination data        */
 
 /* "GP_RASTER_MODE" BIT DEFINITIONS */
 
-#define RM_PAT_DISABLE			0x0000		/* pattern is disabled		*/
-#define RM_PAT_MONO				0x0100		/* 1BPP pattern expansion	*/
-#define RM_PAT_DITHER			0x0200		/* 2BPP pattern expansion	*/
-#define RM_PAT_COLOR			0x0300		/* 8BPP or 16BPP pattern	*/
-#define RM_PAT_MASK				0x0300		/* mask for pattern mode	*/
-#define RM_PAT_TRANSPARENT		0x0400		/* transparent 1BPP pattern	*/
-#define RM_SRC_TRANSPARENT		0x0800		/* transparent 1BPP source	*/
+#define RM_PAT_DISABLE			0x0000	/* pattern is disabled          */
+#define RM_PAT_MONO				0x0100	/* 1BPP pattern expansion       */
+#define RM_PAT_DITHER			0x0200	/* 2BPP pattern expansion       */
+#define RM_PAT_COLOR			0x0300	/* 8BPP or 16BPP pattern        */
+#define RM_PAT_MASK				0x0300	/* mask for pattern mode        */
+#define RM_PAT_TRANSPARENT		0x0400	/* transparent 1BPP pattern     */
+#define RM_SRC_TRANSPARENT		0x0800	/* transparent 1BPP source      */
 
 /* "GP_BLIT_STATUS" BIT DEFINITIONS */
 
-#define BS_BLIT_BUSY			0x0001		/* blit engine is busy		*/
-#define BS_PIPELINE_BUSY		0x0002		/* graphics pipeline is busy*/
-#define BS_BLIT_PENDING			0x0004		/* blit pending				*/
-#define BC_FLUSH				0x0080		/* flush pipeline requests  */
-#define BC_8BPP					0x0000		/* 8BPP mode				*/
-#define BC_16BPP				0x0100		/* 16BPP mode				*/
-#define BC_FB_WIDTH_1024		0x0000		/* framebuffer width = 1024 */
-#define BC_FB_WIDTH_2048		0x0200		/* framebuffer width = 2048 */
-#define BC_FB_WIDTH_4096		0x0400		/* framebuffer width = 4096	*/
+#define BS_BLIT_BUSY			0x0001	/* blit engine is busy          */
+#define BS_PIPELINE_BUSY		0x0002	/* graphics pipeline is busy */
+#define BS_BLIT_PENDING			0x0004	/* blit pending                         */
+#define BC_FLUSH				0x0080	/* flush pipeline requests  */
+#define BC_8BPP					0x0000	/* 8BPP mode                            */
+#define BC_16BPP				0x0100	/* 16BPP mode                           */
+#define BC_FB_WIDTH_1024		0x0000	/* framebuffer width = 1024 */
+#define BC_FB_WIDTH_2048		0x0200	/* framebuffer width = 2048 */
+#define BC_FB_WIDTH_4096		0x0400	/* framebuffer width = 4096     */
 
 /* "GP_BLIT_MODE" BIT DEFINITIONS */
 
-#define	BM_READ_SRC_NONE		0x0000		/* source foreground color	*/
-#define BM_READ_SRC_FB			0x0001		/* read source from FB		*/
-#define BM_READ_SRC_BB0			0x0002		/* read source from BB0		*/
-#define BM_READ_SRC_BB1			0x0003		/* read source from BB1		*/
-#define BM_READ_SRC_MASK		0x0003		/* read source mask			*/
+#define	BM_READ_SRC_NONE		0x0000	/* source foreground color      */
+#define BM_READ_SRC_FB			0x0001	/* read source from FB          */
+#define BM_READ_SRC_BB0			0x0002	/* read source from BB0         */
+#define BM_READ_SRC_BB1			0x0003	/* read source from BB1         */
+#define BM_READ_SRC_MASK		0x0003	/* read source mask                     */
 
-#define	BM_READ_DST_NONE		0x0000		/* no destination data		*/
-#define BM_READ_DST_BB0			0x0008		/* destination from BB0		*/
-#define BM_READ_DST_BB1			0x000C		/* destination from BB1		*/
-#define BM_READ_DST_FB0			0x0010		/* dest from FB (store BB0) */
-#define BM_READ_DST_FB1			0x0014		/* dest from FB (store BB1) */
-#define BM_READ_DST_MASK		0x001C		/* read destination mask	*/
+#define	BM_READ_DST_NONE		0x0000	/* no destination data          */
+#define BM_READ_DST_BB0			0x0008	/* destination from BB0         */
+#define BM_READ_DST_BB1			0x000C	/* destination from BB1         */
+#define BM_READ_DST_FB0			0x0010	/* dest from FB (store BB0) */
+#define BM_READ_DST_FB1			0x0014	/* dest from FB (store BB1) */
+#define BM_READ_DST_MASK		0x001C	/* read destination mask        */
 
-#define BM_WRITE_FB				0x0000		/* write to framebuffer		*/
-#define	BM_WRITE_MEM			0x0020		/* write to memory			*/
-#define BM_WRITE_MASK			0x0020		/* write mask				*/
+#define BM_WRITE_FB				0x0000	/* write to framebuffer         */
+#define	BM_WRITE_MEM			0x0020	/* write to memory                      */
+#define BM_WRITE_MASK			0x0020	/* write mask                           */
 
-#define	BM_SOURCE_COLOR			0x0000		/* source is 8BPP or 16BPP	*/
-#define BM_SOURCE_EXPAND		0x0040		/* source is 1BPP			*/
-#define BM_SOURCE_TEXT			0x00C0		/* source is 1BPP text		*/
-#define BM_SOURCE_MASK			0x00C0		/* source mask				*/
+#define	BM_SOURCE_COLOR			0x0000	/* source is 8BPP or 16BPP      */
+#define BM_SOURCE_EXPAND		0x0040	/* source is 1BPP                       */
+#define BM_SOURCE_TEXT			0x00C0	/* source is 1BPP text          */
+#define BM_SOURCE_MASK			0x00C0	/* source mask                          */
 
-#define BM_REVERSE_Y			0x0100		/* reverse Y direction		*/
+#define BM_REVERSE_Y			0x0100	/* reverse Y direction          */
 
 /*---------------------------------------*/
 /*  FIRST GENERATION DISPLAY CONTROLLER  */
 /*---------------------------------------*/
 
-#define DC_UNLOCK				0x8300		/* lock register			*/
-#define DC_GENERAL_CFG			0x8304		/* config registers...		*/
+#define DC_UNLOCK				0x8300	/* lock register                        */
+#define DC_GENERAL_CFG			0x8304	/* config registers...          */
 #define DC_TIMING_CFG			0x8308
 #define DC_OUTPUT_CFG			0x830C
 
-#define DC_FB_ST_OFFSET			0x8310		/* framebuffer start offset */
-#define DC_CB_ST_OFFSET			0x8314		/* compression start offset */
-#define DC_CURS_ST_OFFSET		0x8318		/* cursor start offset		*/
-#define DC_ICON_ST_OFFSET		0x831C		/* icon start offset		*/
-#define DC_VID_ST_OFFSET		0x8320		/* video start offset		*/
-#define DC_LINE_DELTA			0x8324		/* fb and cb skip counts	*/
-#define DC_BUF_SIZE				0x8328		/* fb and cb line size		*/
+#define DC_FB_ST_OFFSET			0x8310	/* framebuffer start offset */
+#define DC_CB_ST_OFFSET			0x8314	/* compression start offset */
+#define DC_CURS_ST_OFFSET		0x8318	/* cursor start offset          */
+#define DC_ICON_ST_OFFSET		0x831C	/* icon start offset            */
+#define DC_VID_ST_OFFSET		0x8320	/* video start offset           */
+#define DC_LINE_DELTA			0x8324	/* fb and cb skip counts        */
+#define DC_BUF_SIZE				0x8328	/* fb and cb line size          */
 
-#define DC_H_TIMING_1			0x8330		/* horizontal timing...		*/
+#define DC_H_TIMING_1			0x8330	/* horizontal timing...         */
 #define DC_H_TIMING_2			0x8334
 #define DC_H_TIMING_3			0x8338
 #define DC_FP_H_TIMING			0x833C
 
-#define DC_V_TIMING_1			0x8340		/* vertical timing...		*/
+#define DC_V_TIMING_1			0x8340	/* vertical timing...           */
 #define DC_V_TIMING_2			0x8344
 #define DC_V_TIMING_3			0x8348
 #define DC_FP_V_TIMING			0x834C
 
-#define DC_CURSOR_X				0x8350		/* cursor x position		*/
-#define DC_ICON_X				0x8354		/* HACK - 1.3 definition	*/
-#define DC_V_LINE_CNT			0x8354		/* vertical line counter	*/
-#define DC_CURSOR_Y				0x8358		/* cursor y position		*/
-#define DC_ICON_Y				0x835C		/* HACK - 1.3 definition	*/
-#define DC_SS_LINE_CMP			0x835C		/* line compare value		*/
-#define DC_CURSOR_COLOR			0x8360		/* cursor colors			*/
-#define DC_ICON_COLOR			0x8364		/* icon colors				*/
-#define DC_BORDER_COLOR			0x8368		/* border color				*/
-#define DC_PAL_ADDRESS			0x8370		/* palette address			*/
-#define DC_PAL_DATA				0x8374		/* palette data				*/
-#define DC_DFIFO_DIAG			0x8378		/* display FIFO diagnostic	*/
-#define DC_CFIFO_DIAG			0x837C		/* compression FIF0 diagnostic	*/
+#define DC_CURSOR_X				0x8350	/* cursor x position            */
+#define DC_ICON_X				0x8354	/* HACK - 1.3 definition        */
+#define DC_V_LINE_CNT			0x8354	/* vertical line counter        */
+#define DC_CURSOR_Y				0x8358	/* cursor y position            */
+#define DC_ICON_Y				0x835C	/* HACK - 1.3 definition        */
+#define DC_SS_LINE_CMP			0x835C	/* line compare value           */
+#define DC_CURSOR_COLOR			0x8360	/* cursor colors                        */
+#define DC_ICON_COLOR			0x8364	/* icon colors                          */
+#define DC_BORDER_COLOR			0x8368	/* border color                         */
+#define DC_PAL_ADDRESS			0x8370	/* palette address                      */
+#define DC_PAL_DATA				0x8374	/* palette data                         */
+#define DC_DFIFO_DIAG			0x8378	/* display FIFO diagnostic      */
+#define DC_CFIFO_DIAG			0x837C	/* compression FIF0 diagnostic  */
 
 /* PALETTE LOCATIONS */
 
@@ -274,86 +273,86 @@
 
 /* UNLOCK VALUE */
 
-#define DC_UNLOCK_VALUE		0x00004758		/* used to unlock DC regs	*/
+#define DC_UNLOCK_VALUE		0x00004758	/* used to unlock DC regs       */
 
 /* "DC_GENERAL_CFG" BIT DEFINITIONS */
 
-#define DC_GCFG_DFLE		0x00000001		/* display FIFO load enable */
-#define DC_GCFG_CURE		0x00000002		/* cursor enable			*/
-#define DC_GCFG_VCLK_DIV	0x00000004		/* vid clock divisor		*/
-#define DC_GCFG_PLNO		0x00000004		/* planar offset LSB		*/
-#define DC_GCFG_PPC			0x00000008		/* pixel pan compatibility  */
-#define DC_GCFG_CMPE		0x00000010		/* compression enable       */
-#define DC_GCFG_DECE		0x00000020		/* decompression enable     */
-#define DC_GCFG_DCLK_MASK	0x000000C0		/* dotclock multiplier      */
-#define DC_GCFG_DCLK_POS	6				/* dotclock multiplier      */
-#define DC_GCFG_DFHPSL_MASK	0x00000F00		/* FIFO high-priority start */
-#define DC_GCFG_DFHPSL_POS	8				/* FIFO high-priority start */
-#define DC_GCFG_DFHPEL_MASK	0x0000F000		/* FIFO high-priority end   */
-#define DC_GCFG_DFHPEL_POS	12				/* FIFO high-priority end   */
-#define DC_GCFG_CIM_MASK	0x00030000		/* compressor insert mode   */
-#define DC_GCFG_CIM_POS		16				/* compressor insert mode   */
-#define DC_GCFG_FDTY		0x00040000		/* frame dirty mode         */
-#define DC_GCFG_RTPM		0x00080000		/* real-time perf. monitor  */
-#define DC_GCFG_DAC_RS_MASK	0x00700000		/* DAC register selects     */
-#define DC_GCFG_DAC_RS_POS	20				/* DAC register selects     */
-#define DC_GCFG_CKWR		0x00800000		/* clock write              */
-#define DC_GCFG_LDBL		0x01000000		/* line double              */
-#define DC_GCFG_DIAG		0x02000000		/* FIFO diagnostic mode     */
-#define DC_GCFG_CH4S		0x04000000      /* sparse refresh mode		*/
-#define DC_GCFG_SSLC		0x08000000		/* enable line compare		*/
-#define DC_GCFG_VIDE		0x10000000		/* video enable			    */
-#define DC_GCFG_DFCK		0x20000000		/* divide flat-panel clock - rev 2.3 down */
-#define DC_GCFG_VRDY		0x20000000		/* video port speed - rev 2.4 up  */
-#define DC_GCFG_DPCK		0x40000000		/* divide pixel clock       */
-#define DC_GCFG_DDCK		0x80000000		/* divide dot clock         */
+#define DC_GCFG_DFLE		0x00000001	/* display FIFO load enable */
+#define DC_GCFG_CURE		0x00000002	/* cursor enable                        */
+#define DC_GCFG_VCLK_DIV	0x00000004	/* vid clock divisor            */
+#define DC_GCFG_PLNO		0x00000004	/* planar offset LSB            */
+#define DC_GCFG_PPC			0x00000008	/* pixel pan compatibility  */
+#define DC_GCFG_CMPE		0x00000010	/* compression enable       */
+#define DC_GCFG_DECE		0x00000020	/* decompression enable     */
+#define DC_GCFG_DCLK_MASK	0x000000C0	/* dotclock multiplier      */
+#define DC_GCFG_DCLK_POS	6	/* dotclock multiplier      */
+#define DC_GCFG_DFHPSL_MASK	0x00000F00	/* FIFO high-priority start */
+#define DC_GCFG_DFHPSL_POS	8	/* FIFO high-priority start */
+#define DC_GCFG_DFHPEL_MASK	0x0000F000	/* FIFO high-priority end   */
+#define DC_GCFG_DFHPEL_POS	12	/* FIFO high-priority end   */
+#define DC_GCFG_CIM_MASK	0x00030000	/* compressor insert mode   */
+#define DC_GCFG_CIM_POS		16	/* compressor insert mode   */
+#define DC_GCFG_FDTY		0x00040000	/* frame dirty mode         */
+#define DC_GCFG_RTPM		0x00080000	/* real-time perf. monitor  */
+#define DC_GCFG_DAC_RS_MASK	0x00700000	/* DAC register selects     */
+#define DC_GCFG_DAC_RS_POS	20	/* DAC register selects     */
+#define DC_GCFG_CKWR		0x00800000	/* clock write              */
+#define DC_GCFG_LDBL		0x01000000	/* line double              */
+#define DC_GCFG_DIAG		0x02000000	/* FIFO diagnostic mode     */
+#define DC_GCFG_CH4S		0x04000000	/* sparse refresh mode          */
+#define DC_GCFG_SSLC		0x08000000	/* enable line compare          */
+#define DC_GCFG_VIDE		0x10000000	/* video enable                     */
+#define DC_GCFG_DFCK		0x20000000	/* divide flat-panel clock - rev 2.3 down */
+#define DC_GCFG_VRDY		0x20000000	/* video port speed - rev 2.4 up  */
+#define DC_GCFG_DPCK		0x40000000	/* divide pixel clock       */
+#define DC_GCFG_DDCK		0x80000000	/* divide dot clock         */
 
 /* "DC_TIMING_CFG" BIT DEFINITIONS */
 
-#define DC_TCFG_FPPE		0x00000001		/* flat-panel power enable  */
-#define DC_TCFG_HSYE		0x00000002		/* horizontal sync enable   */
-#define DC_TCFG_VSYE		0x00000004		/* vertical sync enable     */
-#define DC_TCFG_BLKE		0x00000008		/* blank enable				*/
-#define DC_TCFG_DDCK		0x00000010		/* DDC clock                */
-#define DC_TCFG_TGEN		0x00000020		/* timing generator enable  */
-#define DC_TCFG_VIEN		0x00000040		/* vertical interrupt enable*/
-#define DC_TCFG_BLNK		0x00000080		/* blink enable             */
-#define DC_TCFG_CHSP		0x00000100		/* horizontal sync polarity */
-#define DC_TCFG_CVSP		0x00000200		/* vertical sync polarity   */
-#define DC_TCFG_FHSP		0x00000400		/* panel horz sync polarity */
-#define DC_TCFG_FVSP		0x00000800		/* panel vert sync polarity */
-#define DC_TCFG_FCEN		0x00001000		/* flat-panel centering     */
-#define DC_TCFG_CDCE		0x00002000		/* HACK - 1.3 definition	*/
-#define DC_TCFG_PLNR		0x00002000		/* planar mode enable		*/
-#define DC_TCFG_INTL		0x00004000		/* interlace scan           */
-#define DC_TCFG_PXDB		0x00008000		/* pixel double             */
-#define DC_TCFG_BKRT		0x00010000		/* blink rate               */
-#define DC_TCFG_PSD_MASK	0x000E0000		/* power sequence delay     */
-#define DC_TCFG_PSD_POS		17				/* power sequence delay     */
-#define DC_TCFG_DDCI		0x08000000		/* DDC input (RO)           */
-#define DC_TCFG_SENS		0x10000000		/* monitor sense (RO)       */
-#define DC_TCFG_DNA			0x20000000		/* display not active (RO)  */
-#define DC_TCFG_VNA			0x40000000		/* vertical not active (RO) */
-#define DC_TCFG_VINT		0x80000000		/* vertical interrupt (RO)  */
+#define DC_TCFG_FPPE		0x00000001	/* flat-panel power enable  */
+#define DC_TCFG_HSYE		0x00000002	/* horizontal sync enable   */
+#define DC_TCFG_VSYE		0x00000004	/* vertical sync enable     */
+#define DC_TCFG_BLKE		0x00000008	/* blank enable                         */
+#define DC_TCFG_DDCK		0x00000010	/* DDC clock                */
+#define DC_TCFG_TGEN		0x00000020	/* timing generator enable  */
+#define DC_TCFG_VIEN		0x00000040	/* vertical interrupt enable */
+#define DC_TCFG_BLNK		0x00000080	/* blink enable             */
+#define DC_TCFG_CHSP		0x00000100	/* horizontal sync polarity */
+#define DC_TCFG_CVSP		0x00000200	/* vertical sync polarity   */
+#define DC_TCFG_FHSP		0x00000400	/* panel horz sync polarity */
+#define DC_TCFG_FVSP		0x00000800	/* panel vert sync polarity */
+#define DC_TCFG_FCEN		0x00001000	/* flat-panel centering     */
+#define DC_TCFG_CDCE		0x00002000	/* HACK - 1.3 definition        */
+#define DC_TCFG_PLNR		0x00002000	/* planar mode enable           */
+#define DC_TCFG_INTL		0x00004000	/* interlace scan           */
+#define DC_TCFG_PXDB		0x00008000	/* pixel double             */
+#define DC_TCFG_BKRT		0x00010000	/* blink rate               */
+#define DC_TCFG_PSD_MASK	0x000E0000	/* power sequence delay     */
+#define DC_TCFG_PSD_POS		17	/* power sequence delay     */
+#define DC_TCFG_DDCI		0x08000000	/* DDC input (RO)           */
+#define DC_TCFG_SENS		0x10000000	/* monitor sense (RO)       */
+#define DC_TCFG_DNA			0x20000000	/* display not active (RO)  */
+#define DC_TCFG_VNA			0x40000000	/* vertical not active (RO) */
+#define DC_TCFG_VINT		0x80000000	/* vertical interrupt (RO)  */
 
 /* "DC_OUTPUT_CFG" BIT DEFINITIONS */
 
-#define DC_OCFG_8BPP		0x00000001		/* 8/16 bpp select          */
-#define DC_OCFG_555			0x00000002		/* 16 bpp format            */
-#define DC_OCFG_PCKE		0x00000004		/* PCLK enable              */
-#define DC_OCFG_FRME		0x00000008		/* frame rate mod enable    */
-#define DC_OCFG_DITE		0x00000010		/* dither enable            */
-#define DC_OCFG_2PXE		0x00000020		/* 2 pixel enable           */
-#define DC_OCFG_2XCK		0x00000040		/* 2 x pixel clock          */
-#define DC_OCFG_2IND		0x00000080		/* 2 index enable           */
-#define DC_OCFG_34ADD		0x00000100		/* 3- or 4-bit add          */
-#define DC_OCFG_FRMS		0x00000200		/* frame rate mod select    */
-#define DC_OCFG_CKSL		0x00000400		/* clock select             */
-#define DC_OCFG_PRMP		0x00000800		/* palette re-map           */
-#define DC_OCFG_PDEL		0x00001000		/* panel data enable low    */
-#define DC_OCFG_PDEH		0x00002000		/* panel data enable high   */
-#define DC_OCFG_CFRW		0x00004000		/* comp line buffer r/w sel */
-#define DC_OCFG_DIAG		0x00008000		/* comp line buffer diag    */
+#define DC_OCFG_8BPP		0x00000001	/* 8/16 bpp select          */
+#define DC_OCFG_555			0x00000002	/* 16 bpp format            */
+#define DC_OCFG_PCKE		0x00000004	/* PCLK enable              */
+#define DC_OCFG_FRME		0x00000008	/* frame rate mod enable    */
+#define DC_OCFG_DITE		0x00000010	/* dither enable            */
+#define DC_OCFG_2PXE		0x00000020	/* 2 pixel enable           */
+#define DC_OCFG_2XCK		0x00000040	/* 2 x pixel clock          */
+#define DC_OCFG_2IND		0x00000080	/* 2 index enable           */
+#define DC_OCFG_34ADD		0x00000100	/* 3- or 4-bit add          */
+#define DC_OCFG_FRMS		0x00000200	/* frame rate mod select    */
+#define DC_OCFG_CKSL		0x00000400	/* clock select             */
+#define DC_OCFG_PRMP		0x00000800	/* palette re-map           */
+#define DC_OCFG_PDEL		0x00001000	/* panel data enable low    */
+#define DC_OCFG_PDEH		0x00002000	/* panel data enable high   */
+#define DC_OCFG_CFRW		0x00004000	/* comp line buffer r/w sel */
+#define DC_OCFG_DIAG		0x00008000	/* comp line buffer diag    */
 
 #define MC_MEM_CNTRL1       0x00008400
 #define MC_DR_ADD			0x00008418
@@ -361,7 +360,7 @@
 
 /* MC_MEM_CNTRL1 BIT DEFINITIONS */
 
-#define MC_XBUSARB          0x00000008      /* 0 = GP priority < CPU priority */
+#define MC_XBUSARB          0x00000008	/* 0 = GP priority < CPU priority */
 											/* 1 = GP priority = CPU priority */
 											/* GXm databook V2.0 is wrong ! */
 /*----------*/
@@ -384,38 +383,38 @@
 
 /* "CS5530_VIDEO_CONFIG" BIT DEFINITIONS */
 
-#define CS5530_VCFG_VID_EN					0x00000001	
-#define CS5530_VCFG_VID_REG_UPDATE			0x00000002	
-#define CS5530_VCFG_VID_INP_FORMAT			0x0000000C	
+#define CS5530_VCFG_VID_EN					0x00000001
+#define CS5530_VCFG_VID_REG_UPDATE			0x00000002
+#define CS5530_VCFG_VID_INP_FORMAT			0x0000000C
 #define CS5530_VCFG_8_BIT_4_2_0				0x00000004
 #define CS5530_VCFG_16_BIT_4_2_0			0x00000008
-#define CS5530_VCFG_GV_SEL					0x00000010	
-#define CS5530_VCFG_CSC_BYPASS				0x00000020	
-#define CS5530_VCFG_X_FILTER_EN				0x00000040	
-#define CS5530_VCFG_Y_FILTER_EN				0x00000080	
-#define CS5530_VCFG_LINE_SIZE_LOWER_MASK	0x0000FF00	
-#define CS5530_VCFG_INIT_READ_MASK			0x01FF0000	
-#define CS5530_VCFG_EARLY_VID_RDY  			0x02000000	
-#define CS5530_VCFG_LINE_SIZE_UPPER			0x08000000	
-#define CS5530_VCFG_4_2_0_MODE				0x10000000	
+#define CS5530_VCFG_GV_SEL					0x00000010
+#define CS5530_VCFG_CSC_BYPASS				0x00000020
+#define CS5530_VCFG_X_FILTER_EN				0x00000040
+#define CS5530_VCFG_Y_FILTER_EN				0x00000080
+#define CS5530_VCFG_LINE_SIZE_LOWER_MASK	0x0000FF00
+#define CS5530_VCFG_INIT_READ_MASK			0x01FF0000
+#define CS5530_VCFG_EARLY_VID_RDY  			0x02000000
+#define CS5530_VCFG_LINE_SIZE_UPPER			0x08000000
+#define CS5530_VCFG_4_2_0_MODE				0x10000000
 #define CS5530_VCFG_16_BIT_EN				0x20000000
 #define CS5530_VCFG_HIGH_SPD_INT			0x40000000
 
 /* "CS5530_DISPLAY_CONFIG" BIT DEFINITIONS */
 
-#define CS5530_DCFG_DIS_EN					0x00000001	
-#define CS5530_DCFG_HSYNC_EN				0x00000002	
-#define CS5530_DCFG_VSYNC_EN				0x00000004	
-#define CS5530_DCFG_DAC_BL_EN				0x00000008	
-#define CS5530_DCFG_DAC_PWDNX				0x00000020	
-#define CS5530_DCFG_FP_PWR_EN				0x00000040	
-#define CS5530_DCFG_FP_DATA_EN				0x00000080	
-#define CS5530_DCFG_CRT_HSYNC_POL 			0x00000100	
-#define CS5530_DCFG_CRT_VSYNC_POL 			0x00000200	
-#define CS5530_DCFG_FP_HSYNC_POL  			0x00000400	
-#define CS5530_DCFG_FP_VSYNC_POL  			0x00000800	
-#define CS5530_DCFG_XGA_FP		  			0x00001000	
-#define CS5530_DCFG_FP_DITH_EN				0x00002000	
+#define CS5530_DCFG_DIS_EN					0x00000001
+#define CS5530_DCFG_HSYNC_EN				0x00000002
+#define CS5530_DCFG_VSYNC_EN				0x00000004
+#define CS5530_DCFG_DAC_BL_EN				0x00000008
+#define CS5530_DCFG_DAC_PWDNX				0x00000020
+#define CS5530_DCFG_FP_PWR_EN				0x00000040
+#define CS5530_DCFG_FP_DATA_EN				0x00000080
+#define CS5530_DCFG_CRT_HSYNC_POL 			0x00000100
+#define CS5530_DCFG_CRT_VSYNC_POL 			0x00000200
+#define CS5530_DCFG_FP_HSYNC_POL  			0x00000400
+#define CS5530_DCFG_FP_VSYNC_POL  			0x00000800
+#define CS5530_DCFG_XGA_FP		  			0x00001000
+#define CS5530_DCFG_FP_DITH_EN				0x00002000
 #define CS5530_DCFG_CRT_SYNC_SKW_MASK		0x0001C000
 #define CS5530_DCFG_CRT_SYNC_SKW_INIT		0x00010000
 #define CS5530_DCFG_PWR_SEQ_DLY_MASK		0x000E0000
@@ -427,7 +426,6 @@
 #define CS5530_DCFG_DDC_OE					0x01000000
 #define CS5530_DCFG_16_BIT_EN				0x02000000
 
-
 /*----------*/
 /*  SC1200  */
 /*----------*/
@@ -445,8 +443,8 @@
 #define SC1200_PALETTE_DATA	 				0x020
 #define SC1200_VID_MISC						0x028
 #define SC1200_VID_CLOCK_SELECT				0x02C
-#define SC1200_VIDEO_DOWNSCALER_CONTROL     0x03C 
-#define SC1200_VIDEO_DOWNSCALER_COEFFICIENTS 0x40  
+#define SC1200_VIDEO_DOWNSCALER_CONTROL     0x03C
+#define SC1200_VIDEO_DOWNSCALER_COEFFICIENTS 0x40
 #define SC1200_VID_CRC						0x044
 #define SC1200_DEVICE_ID					0x048
 #define SC1200_VID_ALPHA_CONTROL			0x04C
@@ -480,8 +478,8 @@
 #define SC1200_TVOUT_HORZ_SYNC				0x804
 #define SC1200_TVOUT_VERT_SYNC				0x808
 #define SC1200_TVOUT_LINE_END				0x80C
-#define SC1200_TVOUT_VERT_DOWNSCALE			0x810 /* REV. A & B */
-#define SC1200_TVOUT_HORZ_PRE_ENCODER_SCALE 0x810 /* REV. C */
+#define SC1200_TVOUT_VERT_DOWNSCALE			0x810	/* REV. A & B */
+#define SC1200_TVOUT_HORZ_PRE_ENCODER_SCALE 0x810	/* REV. C */
 #define SC1200_TVOUT_HORZ_SCALING			0x814
 #define SC1200_TVOUT_DEBUG                  0x818
 #define SC1200_TVENC_TIM_CTRL_1				0xC00
@@ -500,29 +498,29 @@
 
 /* "SC1200_VIDEO_CONFIG" BIT DEFINITIONS */
 
-#define SC1200_VCFG_VID_EN					0x00000001	
-#define SC1200_VCFG_VID_INP_FORMAT			0x0000000C	
+#define SC1200_VCFG_VID_EN					0x00000001
+#define SC1200_VCFG_VID_INP_FORMAT			0x0000000C
 #define SC1200_VCFG_UYVY_FORMAT				0x00000000
 #define SC1200_VCFG_Y2YU_FORMAT				0x00000004
 #define SC1200_VCFG_YUYV_FORMAT				0x00000008
 #define SC1200_VCFG_YVYU_FORMAT				0x0000000C
-#define SC1200_VCFG_X_FILTER_EN				0x00000040	
-#define SC1200_VCFG_Y_FILTER_EN				0x00000080	
-#define SC1200_VCFG_LINE_SIZE_LOWER_MASK	0x0000FF00	
-#define SC1200_VCFG_INIT_READ_MASK			0x01FF0000	
-#define SC1200_VCFG_LINE_SIZE_UPPER			0x08000000	
-#define SC1200_VCFG_4_2_0_MODE				0x10000000	
+#define SC1200_VCFG_X_FILTER_EN				0x00000040
+#define SC1200_VCFG_Y_FILTER_EN				0x00000080
+#define SC1200_VCFG_LINE_SIZE_LOWER_MASK	0x0000FF00
+#define SC1200_VCFG_INIT_READ_MASK			0x01FF0000
+#define SC1200_VCFG_LINE_SIZE_UPPER			0x08000000
+#define SC1200_VCFG_4_2_0_MODE				0x10000000
 
 /* "SC1200_DISPLAY_CONFIG" BIT DEFINITIONS */
 
-#define SC1200_DCFG_DIS_EN					0x00000001	
-#define SC1200_DCFG_HSYNC_EN				0x00000002	
-#define SC1200_DCFG_VSYNC_EN				0x00000004	
-#define SC1200_DCFG_DAC_BL_EN				0x00000008	
+#define SC1200_DCFG_DIS_EN					0x00000001
+#define SC1200_DCFG_HSYNC_EN				0x00000002
+#define SC1200_DCFG_VSYNC_EN				0x00000004
+#define SC1200_DCFG_DAC_BL_EN				0x00000008
 #define SC1200_DCFG_FP_PWR_EN				0x00000040
-#define SC1200_DCFG_FP_DATA_EN				0x00000080	
-#define SC1200_DCFG_CRT_HSYNC_POL 			0x00000100	
-#define SC1200_DCFG_CRT_VSYNC_POL 			0x00000200	
+#define SC1200_DCFG_FP_DATA_EN				0x00000080
+#define SC1200_DCFG_CRT_HSYNC_POL 			0x00000100
+#define SC1200_DCFG_CRT_VSYNC_POL 			0x00000200
 #define SC1200_DCFG_CRT_SYNC_SKW_MASK		0x0001C000
 #define SC1200_DCFG_CRT_SYNC_SKW_INIT		0x00010000
 #define SC1200_DCFG_PWR_SEQ_DLY_MASK		0x000E0000
@@ -580,7 +578,7 @@
 
 #define SC1200_CURSOR_COLOR_KEY_OFFSET_POS  24
 #define SC1200_CURSOR_COLOR_BITS            23
-#define SC1200_COLOR_MASK                   0x00FFFFFF /* 24 significant bits */
+#define SC1200_COLOR_MASK                   0x00FFFFFF	/* 24 significant bits */
 
 /* ALPHA COLOR BIT DEFINITION (REGISTERS 0x68, 0x78, AND 0x88) */
 
@@ -842,89 +840,87 @@
 #define SAA7114_VSCALE_LUMINA_OFFS2			0xEE
 #define SAA7114_VSCALE_LUMINA_OFFS3			0xEF
 
-
 /* Still need to determine PHO value (common phase offset) */
 #define SAA7114_VSCALE_PHO					0x00
 
-
 /*----------------------------------------------*/
 /*  SECOND GENERATION GRAPHICS UNIT (REDCLOUD)  */
 /*----------------------------------------------*/
 
-#define MGP_DST_OFFSET			0x0000		/* dst address				*/
-#define MGP_SRC_OFFSET			0x0004		/* src address				*/
-#define MGP_VEC_ERR				0x0004		/* vector diag/axial errors	*/
-#define MGP_STRIDE				0x0008		/* src and dst strides		*/
-#define MGP_WID_HEIGHT			0x000C		/* width and height of BLT	*/
-#define MGP_VEC_LEN				0x000C		/* vector length/init error */
-#define MGP_SRC_COLOR_FG		0x0010		/* src mono data fgcolor 	*/
-#define MGP_SRC_COLOR_BG		0x0014		/* src mono data bkcolor 	*/
-#define MGP_PAT_COLOR_0			0x0018		/* pattern color 0			*/
-#define MGP_PAT_COLOR_1			0x001C		/* pattern color 1			*/
-#define MGP_PAT_COLOR_2			0x0020		/* pattern color 2			*/
-#define MGP_PAT_COLOR_3			0x0024		/* pattern color 3			*/
-#define MGP_PAT_COLOR_4			0x0028		/* pattern color 4			*/
-#define MGP_PAT_COLOR_5			0x002C		/* pattern color 5			*/
-#define MGP_PAT_DATA_0			0x0030		/* pattern data 0			*/
-#define MGP_PAT_DATA_1			0x0034		/* pattern data 1			*/
-#define MGP_RASTER_MODE			0x0038		/* raster operation			*/
-#define MGP_VECTOR_MODE			0x003C		/* render vector			*/
-#define MGP_BLT_MODE			0x0040		/* render BLT				*/
-#define MGP_BLT_STATUS			0x0044		/* BLT status register		*/
-#define MGP_RESET				0x0044		/* reset register (write)	*/
-#define MGP_HST_SOURCE			0x0048		/* host src data (bitmap)	*/
-#define MGP_BASE_OFFSET			0x004C		/* base render offset		*/
+#define MGP_DST_OFFSET			0x0000	/* dst address                          */
+#define MGP_SRC_OFFSET			0x0004	/* src address                          */
+#define MGP_VEC_ERR				0x0004	/* vector diag/axial errors     */
+#define MGP_STRIDE				0x0008	/* src and dst strides          */
+#define MGP_WID_HEIGHT			0x000C	/* width and height of BLT      */
+#define MGP_VEC_LEN				0x000C	/* vector length/init error */
+#define MGP_SRC_COLOR_FG		0x0010	/* src mono data fgcolor        */
+#define MGP_SRC_COLOR_BG		0x0014	/* src mono data bkcolor        */
+#define MGP_PAT_COLOR_0			0x0018	/* pattern color 0                      */
+#define MGP_PAT_COLOR_1			0x001C	/* pattern color 1                      */
+#define MGP_PAT_COLOR_2			0x0020	/* pattern color 2                      */
+#define MGP_PAT_COLOR_3			0x0024	/* pattern color 3                      */
+#define MGP_PAT_COLOR_4			0x0028	/* pattern color 4                      */
+#define MGP_PAT_COLOR_5			0x002C	/* pattern color 5                      */
+#define MGP_PAT_DATA_0			0x0030	/* pattern data 0                       */
+#define MGP_PAT_DATA_1			0x0034	/* pattern data 1                       */
+#define MGP_RASTER_MODE			0x0038	/* raster operation                     */
+#define MGP_VECTOR_MODE			0x003C	/* render vector                        */
+#define MGP_BLT_MODE			0x0040	/* render BLT                           */
+#define MGP_BLT_STATUS			0x0044	/* BLT status register          */
+#define MGP_RESET				0x0044	/* reset register (write)       */
+#define MGP_HST_SOURCE			0x0048	/* host src data (bitmap)       */
+#define MGP_BASE_OFFSET			0x004C	/* base render offset           */
 
 /* MGP_RASTER_MODE DEFINITIONS */
 
-#define MGP_RM_BPPFMT_332		    0x00000000	/* 8 BPP, 3:3:2				*/
-#define MGP_RM_BPPFMT_4444		    0x40000000	/* 16 BPP, 4:4:4:4			*/
-#define MGP_RM_BPPFMT_1555		    0x50000000	/* 16 BPP, 1:5:5:5			*/
-#define MGP_RM_BPPFMT_565		    0x60000000	/* 16 BPP, 5:6:5			*/
-#define MGP_RM_BPPFMT_8888		    0x80000000	/* 32 BPP, 8:8:8:8			*/
-#define MGP_RM_ALPHA_EN_MASK        0x00C00000  /* Alpha enable             */
-#define MGP_RM_ALPHA_TO_RGB         0x00400000  /* Alpha applies to RGB     */
-#define MGP_RM_ALPHA_TO_ALPHA       0x00800000  /* Alpha applies to alpha   */
-#define MGP_RM_ALPHA_OP_MASK        0x00300000  /* Alpha operation          */
-#define MGP_RM_ALPHA_TIMES_A        0x00000000  /* Alpha * A                */
-#define MGP_RM_BETA_TIMES_B         0x00100000  /* (1-alpha) * B            */
-#define MGP_RM_A_PLUS_BETA_B        0x00200000  /* A + (1-alpha) * B        */
-#define MGP_RM_ALPHA_A_PLUS_BETA_B  0x00300000  /* alpha * A + (1 - alpha)B */
-#define MGP_RM_ALPHA_SELECT         0x000E0000  /* Alpha Select             */
-#define MGP_RM_SELECT_ALPHA_A       0x00000000  /* Alpha from channel A     */
-#define MGP_RM_SELECT_ALPHA_B       0x00020000  /* Alpha from channel B     */
-#define MGP_RM_SELECT_ALPHA_R       0x00040000  /* Registered alpha         */
-#define MGP_RM_SELECT_ALPHA_1       0x00060000  /* Constant 1               */
-#define MGP_RM_SELECT_ALPHA_CHAN_A  0x00080000  /* RGB Values from A        */
-#define MGP_RM_SELECT_ALPHA_CHAN_B  0x000A0000  /* RGB Values from B        */
-#define MGP_RM_DEST_FROM_CHAN_A     0x00010000  /* Alpha channel select     */
-#define MGP_RM_PAT_FLAGS		    0x00000700  /* pattern related bits		*/
-#define MGP_RM_PAT_MONO			    0x00000100  /* monochrome pattern		*/
-#define MGP_RM_PAT_COLOR		    0x00000200  /* color pattern			*/
-#define MGP_RM_PAT_TRANS		    0x00000400	/* pattern transparency		*/
-#define MGP_RM_SRC_TRANS		    0x00000800	/* source transparency		*/
+#define MGP_RM_BPPFMT_332		    0x00000000	/* 8 BPP, 3:3:2                         */
+#define MGP_RM_BPPFMT_4444		    0x40000000	/* 16 BPP, 4:4:4:4                      */
+#define MGP_RM_BPPFMT_1555		    0x50000000	/* 16 BPP, 1:5:5:5                      */
+#define MGP_RM_BPPFMT_565		    0x60000000	/* 16 BPP, 5:6:5                        */
+#define MGP_RM_BPPFMT_8888		    0x80000000	/* 32 BPP, 8:8:8:8                      */
+#define MGP_RM_ALPHA_EN_MASK        0x00C00000	/* Alpha enable             */
+#define MGP_RM_ALPHA_TO_RGB         0x00400000	/* Alpha applies to RGB     */
+#define MGP_RM_ALPHA_TO_ALPHA       0x00800000	/* Alpha applies to alpha   */
+#define MGP_RM_ALPHA_OP_MASK        0x00300000	/* Alpha operation          */
+#define MGP_RM_ALPHA_TIMES_A        0x00000000	/* Alpha * A                */
+#define MGP_RM_BETA_TIMES_B         0x00100000	/* (1-alpha) * B            */
+#define MGP_RM_A_PLUS_BETA_B        0x00200000	/* A + (1-alpha) * B        */
+#define MGP_RM_ALPHA_A_PLUS_BETA_B  0x00300000	/* alpha * A + (1 - alpha)B */
+#define MGP_RM_ALPHA_SELECT         0x000E0000	/* Alpha Select             */
+#define MGP_RM_SELECT_ALPHA_A       0x00000000	/* Alpha from channel A     */
+#define MGP_RM_SELECT_ALPHA_B       0x00020000	/* Alpha from channel B     */
+#define MGP_RM_SELECT_ALPHA_R       0x00040000	/* Registered alpha         */
+#define MGP_RM_SELECT_ALPHA_1       0x00060000	/* Constant 1               */
+#define MGP_RM_SELECT_ALPHA_CHAN_A  0x00080000	/* RGB Values from A        */
+#define MGP_RM_SELECT_ALPHA_CHAN_B  0x000A0000	/* RGB Values from B        */
+#define MGP_RM_DEST_FROM_CHAN_A     0x00010000	/* Alpha channel select     */
+#define MGP_RM_PAT_FLAGS		    0x00000700	/* pattern related bits         */
+#define MGP_RM_PAT_MONO			    0x00000100	/* monochrome pattern           */
+#define MGP_RM_PAT_COLOR		    0x00000200	/* color pattern                        */
+#define MGP_RM_PAT_TRANS		    0x00000400	/* pattern transparency         */
+#define MGP_RM_SRC_TRANS		    0x00000800	/* source transparency          */
 
 /* MGP_VECTOR_MODE DEFINITIONS */
 
-#define MGP_VM_DST_REQ			0x00000008	/* dst data required		*/
-#define MGP_VM_THROTTLE			0x00000010  /* sync to VBLANK			*/
+#define MGP_VM_DST_REQ			0x00000008	/* dst data required            */
+#define MGP_VM_THROTTLE			0x00000010	/* sync to VBLANK                   */
 
 /* MGP_BLT_MODE DEFINITIONS */
 
-#define MGP_BM_SRC_FB			0x00000001  /* src = frame buffer		*/
-#define MGP_BM_SRC_HOST			0x00000002  /* src = host register		*/
-#define MGP_BM_DST_REQ			0x00000004  /* dst data required		*/
-#define MGP_BM_SRC_MONO			0x00000040  /* monochrome source data   */
-#define MGP_BM_SRC_BP_MONO      0x00000080  /* Byte-packed monochrome   */
-#define MGP_BM_NEG_YDIR			0x00000100  /* negative Y direction		*/
-#define MGP_BM_NEG_XDIR			0x00000200  /* negative X direction		*/
-#define MGP_BM_THROTTLE			0x00000400  /* sync to VBLANK			*/
+#define MGP_BM_SRC_FB			0x00000001	/* src = frame buffer               */
+#define MGP_BM_SRC_HOST			0x00000002	/* src = host register              */
+#define MGP_BM_DST_REQ			0x00000004	/* dst data required                */
+#define MGP_BM_SRC_MONO			0x00000040	/* monochrome source data   */
+#define MGP_BM_SRC_BP_MONO      0x00000080	/* Byte-packed monochrome   */
+#define MGP_BM_NEG_YDIR			0x00000100	/* negative Y direction             */
+#define MGP_BM_NEG_XDIR			0x00000200	/* negative X direction             */
+#define MGP_BM_THROTTLE			0x00000400	/* sync to VBLANK                   */
 
 /* MGP_BLT_STATUS DEFINITIONS */
 
-#define MGP_BS_BLT_BUSY			0x00000001  /* GP is not idle			*/
-#define MGP_BS_BLT_PENDING		0x00000004	/* second BLT is pending	*/
-#define MGP_BS_HALF_EMPTY		0x00000008  /* src FIFO half empty		*/
+#define MGP_BS_BLT_BUSY			0x00000001	/* GP is not idle                   */
+#define MGP_BS_BLT_PENDING		0x00000004	/* second BLT is pending        */
+#define MGP_BS_HALF_EMPTY		0x00000008	/* src FIFO half empty              */
 
 /* ALPHA BLENDING MODES       */
 
@@ -934,48 +930,48 @@
 /*  SECOND GENERATION DISPLAY CONTROLLER (REDCLOUD)  */
 /*---------------------------------------------------*/
 
-#define MDC_UNLOCK              0x00000000  /* Unlock register               */
-#define MDC_GENERAL_CFG         0x00000004  /* Config registers              */
-#define MDC_DISPLAY_CFG         0x00000008  
-#define MDC_GFX_SCL             0x0000000C  /* Graphics scaling              */
-
-#define MDC_FB_ST_OFFSET        0x00000010  /* Frame buffer start offset     */
-#define MDC_CB_ST_OFFSET        0x00000014  /* Compression start offset      */
-#define MDC_CURS_ST_OFFSET      0x00000018  /* Cursor buffer start offset    */
-#define MDC_ICON_ST_OFFSET      0x0000001C  /* Icon buffer start offset      */
-#define MDC_VID_Y_ST_OFFSET     0x00000020  /* Video Y Buffer start offset   */
-#define MDC_VID_U_ST_OFFSET     0x00000024  /* Video U Buffer start offset   */
-#define MDC_VID_V_ST_OFFSET     0x00000028  /* Video V Buffer start offset   */
-#define MDC_LINE_SIZE           0x00000030  /* Video, CB, and FB line sizes  */
-#define MDC_GFX_PITCH           0x00000034  /* FB and DB skip counts         */
-#define MDC_VID_YUV_PITCH       0x00000038  /* Y, U and V buffer skip counts */
-
-#define MDC_H_ACTIVE_TIMING     0x00000040  /* Horizontal timings            */
+#define MDC_UNLOCK              0x00000000	/* Unlock register               */
+#define MDC_GENERAL_CFG         0x00000004	/* Config registers              */
+#define MDC_DISPLAY_CFG         0x00000008
+#define MDC_GFX_SCL             0x0000000C	/* Graphics scaling              */
+
+#define MDC_FB_ST_OFFSET        0x00000010	/* Frame buffer start offset     */
+#define MDC_CB_ST_OFFSET        0x00000014	/* Compression start offset      */
+#define MDC_CURS_ST_OFFSET      0x00000018	/* Cursor buffer start offset    */
+#define MDC_ICON_ST_OFFSET      0x0000001C	/* Icon buffer start offset      */
+#define MDC_VID_Y_ST_OFFSET     0x00000020	/* Video Y Buffer start offset   */
+#define MDC_VID_U_ST_OFFSET     0x00000024	/* Video U Buffer start offset   */
+#define MDC_VID_V_ST_OFFSET     0x00000028	/* Video V Buffer start offset   */
+#define MDC_LINE_SIZE           0x00000030	/* Video, CB, and FB line sizes  */
+#define MDC_GFX_PITCH           0x00000034	/* FB and DB skip counts         */
+#define MDC_VID_YUV_PITCH       0x00000038	/* Y, U and V buffer skip counts */
+
+#define MDC_H_ACTIVE_TIMING     0x00000040	/* Horizontal timings            */
 #define MDC_H_BLANK_TIMING      0x00000044
 #define MDC_H_SYNC_TIMING       0x00000048
-#define MDC_V_ACTIVE_TIMING     0x00000050  /* Vertical Timings              */
+#define MDC_V_ACTIVE_TIMING     0x00000050	/* Vertical Timings              */
 #define MDC_V_BLANK_TIMING      0x00000054
 #define MDC_V_SYNC_TIMING       0x00000058
 
-#define MDC_CURSOR_X            0x00000060  /* Cursor X position             */
-#define MDC_CURSOR_Y            0x00000064  /* Cursor Y Position             */
-#define MDC_ICON_X              0x00000068  /* Icon X Position               */
-#define MDC_LINE_CNT_STATUS     0x0000006C  /* Icon Y Position               */
+#define MDC_CURSOR_X            0x00000060	/* Cursor X position             */
+#define MDC_CURSOR_Y            0x00000064	/* Cursor Y Position             */
+#define MDC_ICON_X              0x00000068	/* Icon X Position               */
+#define MDC_LINE_CNT_STATUS     0x0000006C	/* Icon Y Position               */
 
-#define MDC_PAL_ADDRESS         0x00000070  /* Palette Address               */
-#define MDC_PAL_DATA            0x00000074  /* Palette Data                  */
-#define MDC_DFIFO_DIAG          0x00000078  /* Display FIFO diagnostic       */
-#define MDC_CFIFO_DIAG          0x0000007C  /* Compression FIFO diagnostic   */
+#define MDC_PAL_ADDRESS         0x00000070	/* Palette Address               */
+#define MDC_PAL_DATA            0x00000074	/* Palette Data                  */
+#define MDC_DFIFO_DIAG          0x00000078	/* Display FIFO diagnostic       */
+#define MDC_CFIFO_DIAG          0x0000007C	/* Compression FIFO diagnostic   */
 
-#define MDC_VID_DS_DELTA        0x00000080  /* Vertical Downscaling fraction */
+#define MDC_VID_DS_DELTA        0x00000080	/* Vertical Downscaling fraction */
 
-#define MDC_PHY_MEM_OFFSET      0x00000084  /* VG Base Address Register      */
-#define MDC_DV_CTL              0x00000088  /* Dirty-Valid Control Register  */
-#define MDC_DV_ACC              0x0000008C  /* Dirty-Valid RAM Access        */
+#define MDC_PHY_MEM_OFFSET      0x00000084	/* VG Base Address Register      */
+#define MDC_DV_CTL              0x00000088	/* Dirty-Valid Control Register  */
+#define MDC_DV_ACC              0x0000008C	/* Dirty-Valid RAM Access        */
 
 /* UNLOCK VALUE */
 
-#define MDC_UNLOCK_VALUE		0x00004758		/* used to unlock DC regs	*/
+#define MDC_UNLOCK_VALUE		0x00004758	/* used to unlock DC regs       */
 
 /* VG MBUS DEVICE SMI MSR FIELDS */
 
@@ -1025,7 +1021,7 @@
 #define MDC_DCFG_PIX_PAN_MASK     0x00F00000
 #define MDC_DCFG_DCEN             0x00080000
 #define MDC_DCFG_16BPP_MODE_MASK  0x00000C00
-#define MDC_DCFG_16BPP            0x00000000        
+#define MDC_DCFG_16BPP            0x00000000
 #define MDC_DCFG_15BPP            0x00000400
 #define MDC_DCFG_12BPP            0x00000800
 #define MDC_DCFG_DISP_MODE_MASK   0x00000300
@@ -1110,7 +1106,7 @@
 /* MDC_H_SYNC_TIMING BIT FIELDS */
 
 #define MDC_HST_HSE_MASK          0x0FF80000
-#define MDC_HST_HSS_MASK          0x00000FF8 
+#define MDC_HST_HSS_MASK          0x00000FF8
 
 /* MDC_V_ACTIVE_TIMING BIT FIELDS */
 
@@ -1125,7 +1121,7 @@
 /* MDC_V_SYNC_TIMING BIT FIELDS */
 
 #define MDC_VST_VSE_MASK          0x07FF0000
-#define MDC_VST_VSS_MASK          0x000007FF 
+#define MDC_VST_VSS_MASK          0x000007FF
 
 /* MDC_DV_CTL BIT DEFINITIONS */
 
@@ -1145,7 +1141,6 @@
 #define MDC_RESET_VGA_DISP_ENABLE 0x03
 #define MDC_CLK_MODE_SCREEN_OFF   0x20
 
-
 /*---------------------------------------------------*/
 /*  REDCLOUD DISPLAY FILTER                          */
 /*---------------------------------------------------*/
@@ -1163,8 +1158,8 @@
 #define RCDF_PALETTE_DATA	 				0x040
 #define RCDF_VID_MISC						0x050
 #define RCDF_VID_CLOCK_SELECT				0x058
-#define RCDF_VIDEO_DOWNSCALER_CONTROL       0x078 
-#define RCDF_VIDEO_DOWNSCALER_COEFFICIENTS  0x080  
+#define RCDF_VIDEO_DOWNSCALER_CONTROL       0x078
+#define RCDF_VIDEO_DOWNSCALER_COEFFICIENTS  0x080
 #define RCDF_VID_CRC						0x088
 #define RCDF_VID_CRC32						0x090
 #define RCDF_VID_ALPHA_CONTROL			    0x098
@@ -1200,14 +1195,14 @@
 
 /* "RCDF_VIDEO_CONFIG" BIT DEFINITIONS */
 
-#define RCDF_VCFG_VID_EN					0x00000001	
-#define RCDF_VCFG_VID_INP_FORMAT			0x0000000C	
-#define RCDF_VCFG_X_FILTER_EN				0x00000040	
-#define RCDF_VCFG_Y_FILTER_EN				0x00000080	
-#define RCDF_VCFG_LINE_SIZE_LOWER_MASK	    0x0000FF00	
-#define RCDF_VCFG_INIT_READ_MASK			0x01FF0000	
-#define RCDF_VCFG_LINE_SIZE_UPPER			0x08000000	
-#define RCDF_VCFG_4_2_0_MODE				0x10000000	
+#define RCDF_VCFG_VID_EN					0x00000001
+#define RCDF_VCFG_VID_INP_FORMAT			0x0000000C
+#define RCDF_VCFG_X_FILTER_EN				0x00000040
+#define RCDF_VCFG_Y_FILTER_EN				0x00000080
+#define RCDF_VCFG_LINE_SIZE_LOWER_MASK	    0x0000FF00
+#define RCDF_VCFG_INIT_READ_MASK			0x01FF0000
+#define RCDF_VCFG_LINE_SIZE_UPPER			0x08000000
+#define RCDF_VCFG_4_2_0_MODE				0x10000000
 #define RCDF_VCFG_UYVY_FORMAT				0x00000000
 #define RCDF_VCFG_Y2YU_FORMAT				0x00000004
 #define RCDF_VCFG_YUYV_FORMAT				0x00000008
@@ -1215,14 +1210,14 @@
 
 /* "RCDF_DISPLAY_CONFIG" BIT DEFINITIONS */
 
-#define RCDF_DCFG_DIS_EN				    0x00000001	
-#define RCDF_DCFG_HSYNC_EN				    0x00000002	
-#define RCDF_DCFG_VSYNC_EN				    0x00000004	
-#define RCDF_DCFG_DAC_BL_EN				    0x00000008	
+#define RCDF_DCFG_DIS_EN				    0x00000001
+#define RCDF_DCFG_HSYNC_EN				    0x00000002
+#define RCDF_DCFG_VSYNC_EN				    0x00000004
+#define RCDF_DCFG_DAC_BL_EN				    0x00000008
 #define RCDF_DCFG_FP_PWR_EN				    0x00000040
-#define RCDF_DCFG_FP_DATA_EN				0x00000080	
-#define RCDF_DCFG_CRT_HSYNC_POL 			0x00000100	
-#define RCDF_DCFG_CRT_VSYNC_POL 			0x00000200		
+#define RCDF_DCFG_FP_DATA_EN				0x00000080
+#define RCDF_DCFG_CRT_HSYNC_POL 			0x00000100
+#define RCDF_DCFG_CRT_VSYNC_POL 			0x00000200
 #define RCDF_DCFG_CRT_SYNC_SKW_MASK		    0x0001C000
 #define RCDF_DCFG_CRT_SYNC_SKW_INIT		    0x00010000
 #define RCDF_DCFG_PWR_SEQ_DLY_MASK		    0x000E0000
@@ -1272,7 +1267,7 @@
 #define RCDF_CURSOR_COLOR_KEY_ENABLE      0x20000000
 #define RCDF_CURSOR_COLOR_KEY_OFFSET_POS  24
 #define RCDF_CURSOR_COLOR_BITS            23
-#define RCDF_COLOR_MASK                   0x00FFFFFF /* 24 significant bits */
+#define RCDF_COLOR_MASK                   0x00FFFFFF	/* 24 significant bits */
 
 /* ALPHA COLOR BIT DEFINITION (REGISTERS 0x68, 0x78, AND 0x88) */
 
@@ -1291,25 +1286,25 @@
 
 /* GEODELINK DEVICE MSR REGISTER SUMMARY */
 
-#define MBD_MSR_CAP         0x2000   /* Device Capabilities                   */
-#define MBD_MSR_CONFIG      0x2001   /* Device Master Configuration Register  */
-#define MBD_MSR_SMI         0x2002   /* MBus Device SMI Register              */
-#define MBD_MSR_ERROR       0x2003   /* MBus Device Error                     */
-#define MBD_MSR_PM          0x2004   /* MBus Device Power Management Register */
-#define MBD_MSR_DIAG        0x2005   /* Mbus Device Diagnostic Register       */
+#define MBD_MSR_CAP         0x2000	/* Device Capabilities                   */
+#define MBD_MSR_CONFIG      0x2001	/* Device Master Configuration Register  */
+#define MBD_MSR_SMI         0x2002	/* MBus Device SMI Register              */
+#define MBD_MSR_ERROR       0x2003	/* MBus Device Error                     */
+#define MBD_MSR_PM          0x2004	/* MBus Device Power Management Register */
+#define MBD_MSR_DIAG        0x2005	/* Mbus Device Diagnostic Register       */
 
 /* DISPLAY FILTER MBD_MSR_DIAG DEFINITIONS */
 
-#define RCDF_MBD_DIAG_SEL0        0x00007FFF /* Lower 32-bits of Diag Bus Select     */
-#define RCDF_MBD_DIAG_EN0         0x00008000 /* Enable for lower 32-bits of diag bus */
-#define RCDF_MBD_DIAG_SEL1        0x7FFF0000 /* Upper 32-bits of Diag Bus Select     */
-#define RCDF_MBD_DIAG_EN1         0x80000000 /* Enable for upper 32-bits of diag bus */
+#define RCDF_MBD_DIAG_SEL0        0x00007FFF	/* Lower 32-bits of Diag Bus Select     */
+#define RCDF_MBD_DIAG_EN0         0x00008000	/* Enable for lower 32-bits of diag bus */
+#define RCDF_MBD_DIAG_SEL1        0x7FFF0000	/* Upper 32-bits of Diag Bus Select     */
+#define RCDF_MBD_DIAG_EN1         0x80000000	/* Enable for upper 32-bits of diag bus */
 
 /* DISPLAY FILTER MBD_MSR_CONFIG DEFINITIONS */
 
-#define RCDF_CONFIG_FMT_MASK      0x00000038 /* Output Format */
+#define RCDF_CONFIG_FMT_MASK      0x00000038	/* Output Format */
 #define RCDF_CONFIG_FMT_CRT       0x00000000
-#define RCDF_CONFIG_FMT_FP        0x00000008 
+#define RCDF_CONFIG_FMT_FP        0x00000008
 
 /* MCP MSR DEFINITIONS */
 
@@ -1357,7 +1352,7 @@
 #define MCP_DOTPLL_N              0x000001FC
 #define MCP_DOTPLL_M              0x00001E00
 #define MCP_DOTPLL_LOCK           0x02000000
-
+#define MCP_DOTPLL_BYPASS         0x00008000
 
 /* END OF FILE */
 
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/gfx_rndr.c b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/gfx_rndr.c
index 5003537c0..5b6b8811b 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/gfx_rndr.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/gfx_rndr.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/gfx_rndr.c,v 1.2 2002/10/18 20:02:40 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/gfx_rndr.c,v 1.1 2002/12/10 15:12:25 alanh Exp $ */
 /*
  * $Workfile: gfx_rndr.c $
  *
@@ -146,7 +146,6 @@
  *
  * END_NSC_LIC_GPL */
 
-
 /* STATIC VARIABLES */
 
 unsigned short GFXbpp = 16;
@@ -172,6 +171,8 @@ unsigned short GFXusesDstData = 0;
 #include "rndr_gu2.c"
 #endif
 
+void gfx_reset_pitch(unsigned short pitch);
+
 /* WRAPPERS IF DYNAMIC SELECTION */
 /* Extra layer to call either first or second generation routines. */
 
@@ -181,11 +182,12 @@ unsigned short GFXusesDstData = 0;
  * gfx_reset_pitch (PRIVATE ROUTINE - NOT PART OF API)
  *---------------------------------------------------------------------------
  */
-void gfx_reset_pitch(unsigned short pitch)
+void
+gfx_reset_pitch(unsigned short pitch)
 {
 #	if GFX_2DACCEL_GU2
-	if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
-		gu2_reset_pitch(pitch);
+   if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
+      gu2_reset_pitch(pitch);
 #	endif
 }
 
@@ -193,15 +195,16 @@ void gfx_reset_pitch(unsigned short pitch)
  * gfx_set_bpp
  *---------------------------------------------------------------------------
  */
-void gfx_set_bpp(unsigned short bpp)
+void
+gfx_set_bpp(unsigned short bpp)
 {
 #	if GFX_2DACCEL_GU1
-	if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU1)
-		gu1_set_bpp(bpp);
+   if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU1)
+      gu1_set_bpp(bpp);
 #	endif
 #	if GFX_2DACCEL_GU2
-	if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
-		gu2_set_bpp(bpp);
+   if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
+      gu2_set_bpp(bpp);
 #	endif
 }
 
@@ -209,15 +212,16 @@ void gfx_set_bpp(unsigned short bpp)
  * gfx_set_solid_source
  *---------------------------------------------------------------------------
  */
-void gfx_set_solid_source(unsigned long color)
+void
+gfx_set_solid_source(unsigned long color)
 {
 #	if GFX_2DACCEL_GU1
-	if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU1)
-		gu1_set_solid_source(color);
+   if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU1)
+      gu1_set_solid_source(color);
 #	endif
 #	if GFX_2DACCEL_GU2
-	if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
-		gu2_set_solid_source(color);
+   if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
+      gu2_set_solid_source(color);
 #	endif
 }
 
@@ -225,37 +229,40 @@ void gfx_set_solid_source(unsigned long color)
  * gfx_set_mono_source
  *---------------------------------------------------------------------------
  */
-void gfx_set_mono_source(unsigned long bgcolor, unsigned long fgcolor,
-	unsigned short transparent)
+void
+gfx_set_mono_source(unsigned long bgcolor, unsigned long fgcolor,
+		    unsigned short transparent)
 {
 #	if GFX_2DACCEL_GU1
-	if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU1)
-		gu1_set_mono_source(bgcolor, fgcolor, transparent);
+   if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU1)
+      gu1_set_mono_source(bgcolor, fgcolor, transparent);
 #	endif
 #	if GFX_2DACCEL_GU2
-	if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
-		gu2_set_mono_source(bgcolor, fgcolor, transparent);
+   if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
+      gu2_set_mono_source(bgcolor, fgcolor, transparent);
 #	endif
 }
 
-void gfx_set_pattern_flags(unsigned short flags)
+void
+gfx_set_pattern_flags(unsigned short flags)
 {
-	GFXpatternFlags |= flags;
+   GFXpatternFlags |= flags;
 }
 
 /*---------------------------------------------------------------------------
  * gfx_set_solid_pattern
  *---------------------------------------------------------------------------
  */
-void gfx_set_solid_pattern(unsigned long color)
+void
+gfx_set_solid_pattern(unsigned long color)
 {
 #	if GFX_2DACCEL_GU1
-	if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU1)
-		gu1_set_solid_pattern(color);
+   if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU1)
+      gu1_set_solid_pattern(color);
 #	endif
 #	if GFX_2DACCEL_GU2
-	if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
-		gu2_set_solid_pattern(color);
+   if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
+      gu2_set_solid_pattern(color);
 #	endif
 }
 
@@ -263,16 +270,18 @@ void gfx_set_solid_pattern(unsigned long color)
  * gfx_set_mono_pattern
  *---------------------------------------------------------------------------
  */
-void gfx_set_mono_pattern(unsigned long bgcolor, unsigned long fgcolor, 
-	unsigned long data0, unsigned long data1, unsigned char transparent)
+void
+gfx_set_mono_pattern(unsigned long bgcolor, unsigned long fgcolor,
+		     unsigned long data0, unsigned long data1,
+		     unsigned char transparent)
 {
 #	if GFX_2DACCEL_GU1
-	if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU1)
-		gu1_set_mono_pattern(bgcolor, fgcolor, data0, data1, transparent);
+   if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU1)
+      gu1_set_mono_pattern(bgcolor, fgcolor, data0, data1, transparent);
 #	endif
 #	if GFX_2DACCEL_GU2
-	if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
-		gu2_set_mono_pattern(bgcolor, fgcolor, data0, data1, transparent);
+   if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
+      gu2_set_mono_pattern(bgcolor, fgcolor, data0, data1, transparent);
 #	endif
 }
 
@@ -280,17 +289,21 @@ void gfx_set_mono_pattern(unsigned long bgcolor, unsigned long fgcolor,
  * gfx_set_color_pattern
  *---------------------------------------------------------------------------
  */
-void gfx_set_color_pattern(unsigned long bgcolor, unsigned long fgcolor, 
-	unsigned long data0, unsigned long data1, 
-	unsigned long data2, unsigned long data3, unsigned char transparent)
+void
+gfx_set_color_pattern(unsigned long bgcolor, unsigned long fgcolor,
+		      unsigned long data0, unsigned long data1,
+		      unsigned long data2, unsigned long data3,
+		      unsigned char transparent)
 {
 #	if GFX_2DACCEL_GU1
-	if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU1)
-		gu1_set_color_pattern(bgcolor, fgcolor, data0, data1, data2, data3, transparent);
+   if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU1)
+      gu1_set_color_pattern(bgcolor, fgcolor, data0, data1, data2, data3,
+			    transparent);
 #	endif
 #	if GFX_2DACCEL_GU2
-	if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
-		gu2_set_color_pattern(bgcolor, fgcolor, data0, data1, data2, data3, transparent);
+   if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
+      gu2_set_color_pattern(bgcolor, fgcolor, data0, data1, data2, data3,
+			    transparent);
 #	endif
 }
 
@@ -298,15 +311,16 @@ void gfx_set_color_pattern(unsigned long bgcolor, unsigned long fgcolor,
  * gfx_load_color_pattern_line
  *---------------------------------------------------------------------------
  */
-void gfx_load_color_pattern_line(short y, unsigned long *pattern_8x8)
+void
+gfx_load_color_pattern_line(short y, unsigned long *pattern_8x8)
 {
 #	if GFX_2DACCEL_GU1
-	if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU1)
-		gu1_load_color_pattern_line(y, pattern_8x8);
+   if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU1)
+      gu1_load_color_pattern_line(y, pattern_8x8);
 #	endif
 #	if GFX_2DACCEL_GU2
-	if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
-		gu2_load_color_pattern_line(y, pattern_8x8);
+   if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
+      gu2_load_color_pattern_line(y, pattern_8x8);
 #	endif
 }
 
@@ -314,15 +328,16 @@ void gfx_load_color_pattern_line(short y, unsigned long *pattern_8x8)
  * gfx_set_raster_operation
  *---------------------------------------------------------------------------
  */
-void gfx_set_raster_operation(unsigned char rop)
+void
+gfx_set_raster_operation(unsigned char rop)
 {
 #	if GFX_2DACCEL_GU1
-	if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU1)
-		gu1_set_raster_operation(rop);
+   if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU1)
+      gu1_set_raster_operation(rop);
 #	endif
 #	if GFX_2DACCEL_GU2
-	if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
-		gu2_set_raster_operation(rop);
+   if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
+      gu2_set_raster_operation(rop);
 #	endif
 }
 
@@ -330,16 +345,17 @@ void gfx_set_raster_operation(unsigned char rop)
  * gfx_pattern_fill
  *---------------------------------------------------------------------------
  */
-void gfx_pattern_fill(unsigned short x, unsigned short y, 
-	unsigned short width, unsigned short height)
+void
+gfx_pattern_fill(unsigned short x, unsigned short y,
+		 unsigned short width, unsigned short height)
 {
 #	if GFX_2DACCEL_GU1
-	if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU1)
-		gu1_pattern_fill(x, y, width, height);
+   if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU1)
+      gu1_pattern_fill(x, y, width, height);
 #	endif
 #	if GFX_2DACCEL_GU2
-	if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
-		gu2_pattern_fill(x, y, width, height);
+   if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
+      gu2_pattern_fill(x, y, width, height);
 #	endif
 }
 
@@ -347,34 +363,37 @@ void gfx_pattern_fill(unsigned short x, unsigned short y,
  * gfx_color_pattern_fill
  *---------------------------------------------------------------------------
  */
-void gfx_color_pattern_fill(unsigned short x, unsigned short y, 
-	unsigned short width, unsigned short height, unsigned long *pattern)
+void
+gfx_color_pattern_fill(unsigned short x, unsigned short y,
+		       unsigned short width, unsigned short height,
+		       unsigned long *pattern)
 {
 #	if GFX_2DACCEL_GU1
-	if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU1)
-		gu1_color_pattern_fill(x, y, width, height, pattern);
+   if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU1)
+      gu1_color_pattern_fill(x, y, width, height, pattern);
 #	endif
 #	if GFX_2DACCEL_GU2
-	if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
-		gu2_color_pattern_fill(x, y, width, height, pattern);
+   if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
+      gu2_color_pattern_fill(x, y, width, height, pattern);
 #	endif
 }
-	
+
 /*---------------------------------------------------------------------------
  * gfx_screen_to_screen_blt
  *---------------------------------------------------------------------------
  */
-void gfx_screen_to_screen_blt(unsigned short srcx, unsigned short srcy,
-	unsigned short dstx, unsigned short dsty, unsigned short width, 
-	unsigned short height)
+void
+gfx_screen_to_screen_blt(unsigned short srcx, unsigned short srcy,
+			 unsigned short dstx, unsigned short dsty,
+			 unsigned short width, unsigned short height)
 {
 #	if GFX_2DACCEL_GU1
-	if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU1)
-		gu1_screen_to_screen_blt(srcx, srcy, dstx, dsty, width, height);
+   if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU1)
+      gu1_screen_to_screen_blt(srcx, srcy, dstx, dsty, width, height);
 #	endif
 #	if GFX_2DACCEL_GU2
-	if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
-		gu2_screen_to_screen_blt(srcx, srcy, dstx, dsty, width, height);
+   if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
+      gu2_screen_to_screen_blt(srcx, srcy, dstx, dsty, width, height);
 #	endif
 }
 
@@ -382,17 +401,19 @@ void gfx_screen_to_screen_blt(unsigned short srcx, unsigned short srcy,
  * gfx_screen_to_screen_xblt
  *---------------------------------------------------------------------------
  */
-void gfx_screen_to_screen_xblt(unsigned short srcx, unsigned short srcy,
-	unsigned short dstx, unsigned short dsty, unsigned short width, 
-	unsigned short height, unsigned long color)
+void
+gfx_screen_to_screen_xblt(unsigned short srcx, unsigned short srcy,
+			  unsigned short dstx, unsigned short dsty,
+			  unsigned short width, unsigned short height,
+			  unsigned long color)
 {
 #	if GFX_2DACCEL_GU1
-	if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU1)
-		gu1_screen_to_screen_xblt(srcx, srcy, dstx, dsty, width, height, color);
+   if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU1)
+      gu1_screen_to_screen_xblt(srcx, srcy, dstx, dsty, width, height, color);
 #	endif
 #	if GFX_2DACCEL_GU2
-	if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
-		gu2_screen_to_screen_xblt(srcx, srcy, dstx, dsty, width, height, color);
+   if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
+      gu2_screen_to_screen_xblt(srcx, srcy, dstx, dsty, width, height, color);
 #	endif
 }
 
@@ -400,19 +421,21 @@ void gfx_screen_to_screen_xblt(unsigned short srcx, unsigned short srcy,
  * gfx_color_bitmap_to_screen_blt
  *---------------------------------------------------------------------------
  */
-void gfx_color_bitmap_to_screen_blt(unsigned short srcx, unsigned short srcy,
-	unsigned short dstx, unsigned short dsty, unsigned short width, 
-	unsigned short height, unsigned char *data, long pitch)
+void
+gfx_color_bitmap_to_screen_blt(unsigned short srcx, unsigned short srcy,
+			       unsigned short dstx, unsigned short dsty,
+			       unsigned short width, unsigned short height,
+			       unsigned char *data, long pitch)
 {
 #	if GFX_2DACCEL_GU1
-	if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU1)
-		gu1_color_bitmap_to_screen_blt(srcx, srcy, dstx, dsty, width, height,
-			data, pitch);
+   if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU1)
+      gu1_color_bitmap_to_screen_blt(srcx, srcy, dstx, dsty, width, height,
+				     data, pitch);
 #	endif
 #	if GFX_2DACCEL_GU2
-	if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
-		gu2_color_bitmap_to_screen_blt(srcx, srcy, dstx, dsty, width, height,
-			data, pitch);
+   if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
+      gu2_color_bitmap_to_screen_blt(srcx, srcy, dstx, dsty, width, height,
+				     data, pitch);
 #	endif
 }
 
@@ -420,20 +443,22 @@ void gfx_color_bitmap_to_screen_blt(unsigned short srcx, unsigned short srcy,
  * gfx_color_bitmap_to_screen_xblt
  *---------------------------------------------------------------------------
  */
-void gfx_color_bitmap_to_screen_xblt(unsigned short srcx, unsigned short srcy,
-	unsigned short dstx, unsigned short dsty, unsigned short width, 
-	unsigned short height, unsigned char *data, long pitch, 
-	unsigned long color)
+void
+gfx_color_bitmap_to_screen_xblt(unsigned short srcx, unsigned short srcy,
+				unsigned short dstx, unsigned short dsty,
+				unsigned short width, unsigned short height,
+				unsigned char *data, long pitch,
+				unsigned long color)
 {
 #	if GFX_2DACCEL_GU1
-	if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU1)
-		gu1_color_bitmap_to_screen_xblt(srcx, srcy, dstx, dsty, width, height,
-			data, pitch, color);
+   if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU1)
+      gu1_color_bitmap_to_screen_xblt(srcx, srcy, dstx, dsty, width, height,
+				      data, pitch, color);
 #	endif
 #	if GFX_2DACCEL_GU2
-	if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
-		gu2_color_bitmap_to_screen_xblt(srcx, srcy, dstx, dsty, width, height,
-			data, pitch, color);
+   if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
+      gu2_color_bitmap_to_screen_xblt(srcx, srcy, dstx, dsty, width, height,
+				      data, pitch, color);
 #	endif
 }
 
@@ -441,19 +466,21 @@ void gfx_color_bitmap_to_screen_xblt(unsigned short srcx, unsigned short srcy,
  * gfx_mono_bitmap_to_screen_blt
  *---------------------------------------------------------------------------
  */
-void gfx_mono_bitmap_to_screen_blt(unsigned short srcx, unsigned short srcy,
-	unsigned short dstx, unsigned short dsty, unsigned short width, 
-	unsigned short height, unsigned char *data, short pitch)
+void
+gfx_mono_bitmap_to_screen_blt(unsigned short srcx, unsigned short srcy,
+			      unsigned short dstx, unsigned short dsty,
+			      unsigned short width, unsigned short height,
+			      unsigned char *data, short pitch)
 {
 #	if GFX_2DACCEL_GU1
-	if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU1)
-		gu1_mono_bitmap_to_screen_blt(srcx, srcy, dstx, dsty, width, height,
-			data, pitch);
+   if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU1)
+      gu1_mono_bitmap_to_screen_blt(srcx, srcy, dstx, dsty, width, height,
+				    data, pitch);
 #	endif
 #	if GFX_2DACCEL_GU2
-	if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
-		gu2_mono_bitmap_to_screen_blt(srcx, srcy, dstx, dsty, width, height,
-			data, pitch);
+   if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
+      gu2_mono_bitmap_to_screen_blt(srcx, srcy, dstx, dsty, width, height,
+				    data, pitch);
 #	endif
 }
 
@@ -461,17 +488,17 @@ void gfx_mono_bitmap_to_screen_blt(unsigned short srcx, unsigned short srcy,
  * gfx_text_blt
  *---------------------------------------------------------------------------
  */
-void gfx_text_blt(unsigned short dstx, unsigned short dsty, unsigned short width, 
-	unsigned short height, unsigned char *data)
-
+void
+gfx_text_blt(unsigned short dstx, unsigned short dsty, unsigned short width,
+	     unsigned short height, unsigned char *data)
 {
 #	if GFX_2DACCEL_GU1
-	if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU1)
-		gu1_text_blt (dstx, dsty, width, height, data);
+   if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU1)
+      gu1_text_blt(dstx, dsty, width, height, data);
 #	endif
 #	if GFX_2DACCEL_GU2
-	if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
-		gu2_text_blt (dstx, dsty, width, height, data);
+   if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
+      gu2_text_blt(dstx, dsty, width, height, data);
 #	endif
 }
 
@@ -479,18 +506,19 @@ void gfx_text_blt(unsigned short dstx, unsigned short dsty, unsigned short width
  * gfx_bresenham_line
  *---------------------------------------------------------------------------
  */
-void gfx_bresenham_line(unsigned short x, unsigned short y, 
-		unsigned short length, unsigned short initerr, 
-		unsigned short axialerr, unsigned short diagerr, 
-		unsigned short flags)
+void
+gfx_bresenham_line(unsigned short x, unsigned short y,
+		   unsigned short length, unsigned short initerr,
+		   unsigned short axialerr, unsigned short diagerr,
+		   unsigned short flags)
 {
 #	if GFX_2DACCEL_GU1
-	if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU1)
-		gu1_bresenham_line(x, y, length, initerr, axialerr, diagerr, flags);
+   if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU1)
+      gu1_bresenham_line(x, y, length, initerr, axialerr, diagerr, flags);
 #	endif
 #	if GFX_2DACCEL_GU2
-	if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
-		gu2_bresenham_line(x, y, length, initerr, axialerr, diagerr, flags);
+   if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
+      gu2_bresenham_line(x, y, length, initerr, axialerr, diagerr, flags);
 #	endif
 }
 
@@ -498,15 +526,16 @@ void gfx_bresenham_line(unsigned short x, unsigned short y,
  * gfx_wait_until_idle
  *---------------------------------------------------------------------------
  */
-void gfx_wait_until_idle(void)
+void
+gfx_wait_until_idle(void)
 {
 #	if GFX_2DACCEL_GU1
-	if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU1)
-		gu1_wait_until_idle();
+   if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU1)
+      gu1_wait_until_idle();
 #	endif
 #	if GFX_2DACCEL_GU2
-	if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
-		gu2_wait_until_idle();
+   if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
+      gu2_wait_until_idle();
 #	endif
 }
 
@@ -514,18 +543,20 @@ void gfx_wait_until_idle(void)
  * gfx_test_blt_pending
  *---------------------------------------------------------------------------
  */
-int gfx_test_blt_pending(void)
+int
+gfx_test_blt_pending(void)
 {
-	int retval = 0;
+   int retval = 0;
+
 #	if GFX_2DACCEL_GU1
-	if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU1)
-		retval = gu1_test_blt_pending();
+   if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU1)
+      retval = gu1_test_blt_pending();
 #	endif
 #	if GFX_2DACCEL_GU2
-	if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
-		retval = gu2_test_blt_pending();
+   if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
+      retval = gu2_test_blt_pending();
 #	endif
-	return(retval);
+   return (retval);
 }
 
 /*---------------------------------------------------------------------------
@@ -537,11 +568,12 @@ int gfx_test_blt_pending(void)
  * gfx2_set_source_stride
  *---------------------------------------------------------------------------
  */
-void gfx2_set_source_stride(unsigned short stride)
+void
+gfx2_set_source_stride(unsigned short stride)
 {
 #	if GFX_2DACCEL_GU2
-	if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
-		gu22_set_source_stride (stride);
+   if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
+      gu22_set_source_stride(stride);
 #	endif
 }
 
@@ -549,11 +581,12 @@ void gfx2_set_source_stride(unsigned short stride)
  * gfx2_set_destination_stride
  *---------------------------------------------------------------------------
  */
-void gfx2_set_destination_stride(unsigned short stride)
+void
+gfx2_set_destination_stride(unsigned short stride)
 {
 #	if GFX_2DACCEL_GU2
-	if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
-		gu22_set_destination_stride (stride);
+   if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
+      gu22_set_destination_stride(stride);
 #	endif
 }
 
@@ -561,11 +594,12 @@ void gfx2_set_destination_stride(unsigned short stride)
  * gfx2_set_pattern_origin
  *---------------------------------------------------------------------------
  */
-void gfx2_set_pattern_origin(int x, int y)
+void
+gfx2_set_pattern_origin(int x, int y)
 {
 #	if GFX_2DACCEL_GU2
-	if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
-		gu22_set_pattern_origin (x, y);
+   if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
+      gu22_set_pattern_origin(x, y);
 #	endif
 }
 
@@ -573,11 +607,12 @@ void gfx2_set_pattern_origin(int x, int y)
  * gfx2_set_source_transparency
  *---------------------------------------------------------------------------
  */
-void gfx2_set_source_transparency(unsigned long color, unsigned long mask)
+void
+gfx2_set_source_transparency(unsigned long color, unsigned long mask)
 {
 #	if GFX_2DACCEL_GU2
-	if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
-		gu22_set_source_transparency (color, mask);
+   if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
+      gu22_set_source_transparency(color, mask);
 #	endif
 }
 
@@ -585,11 +620,12 @@ void gfx2_set_source_transparency(unsigned long color, unsigned long mask)
  * gfx2_set_alpha_mode
  *---------------------------------------------------------------------------
  */
-void gfx2_set_alpha_mode(int mode)
+void
+gfx2_set_alpha_mode(int mode)
 {
 #	if GFX_2DACCEL_GU2
-	if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
-		gu22_set_alpha_mode (mode);
+   if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
+      gu22_set_alpha_mode(mode);
 #	endif
 }
 
@@ -597,11 +633,12 @@ void gfx2_set_alpha_mode(int mode)
  * gfx2_set_alpha_value
  *---------------------------------------------------------------------------
  */
-void gfx2_set_alpha_value(unsigned char value)
+void
+gfx2_set_alpha_value(unsigned char value)
 {
 #	if GFX_2DACCEL_GU2
-	if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
-		gu22_set_alpha_value (value);
+   if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
+      gu22_set_alpha_value(value);
 #	endif
 }
 
@@ -609,12 +646,13 @@ void gfx2_set_alpha_value(unsigned char value)
  * gfx2_pattern_fill
  *---------------------------------------------------------------------------
  */
-void gfx2_pattern_fill(unsigned long dstoffset, unsigned short width, 
-	unsigned short height)
+void
+gfx2_pattern_fill(unsigned long dstoffset, unsigned short width,
+		  unsigned short height)
 {
 #	if GFX_2DACCEL_GU2
-	if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
-		gu22_pattern_fill (dstoffset, width, height);
+   if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
+      gu22_pattern_fill(dstoffset, width, height);
 #	endif
 }
 
@@ -622,12 +660,13 @@ void gfx2_pattern_fill(unsigned long dstoffset, unsigned short width,
  * gfx2_color_pattern_fill
  *---------------------------------------------------------------------------
  */
-void gfx2_color_pattern_fill(unsigned long dstoffset, unsigned short width, 
-	unsigned short height, unsigned long *pattern)
+void
+gfx2_color_pattern_fill(unsigned long dstoffset, unsigned short width,
+			unsigned short height, unsigned long *pattern)
 {
 #	if GFX_2DACCEL_GU2
-	if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
-		gu22_color_pattern_fill (dstoffset, width, height, pattern);
+   if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
+      gu22_color_pattern_fill(dstoffset, width, height, pattern);
 #	endif
 }
 
@@ -635,12 +674,14 @@ void gfx2_color_pattern_fill(unsigned long dstoffset, unsigned short width,
  * gfx2_screen_to_screen_blt
  *---------------------------------------------------------------------------
  */
-void gfx2_screen_to_screen_blt(unsigned long srcoffset, unsigned long dstoffset, 
-	unsigned short width, unsigned short height, int flags)
+void
+gfx2_screen_to_screen_blt(unsigned long srcoffset, unsigned long dstoffset,
+			  unsigned short width, unsigned short height,
+			  int flags)
 {
 #	if GFX_2DACCEL_GU2
-	if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
-		gu22_screen_to_screen_blt (srcoffset, dstoffset, width, height, flags);
+   if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
+      gu22_screen_to_screen_blt(srcoffset, dstoffset, width, height, flags);
 #	endif
 }
 
@@ -648,13 +689,16 @@ void gfx2_screen_to_screen_blt(unsigned long srcoffset, unsigned long dstoffset,
  * gfx2_mono_expand_blt
  *---------------------------------------------------------------------------
  */
-void gfx2_mono_expand_blt(unsigned long srcbase, unsigned short srcx, 
-	unsigned short srcy, unsigned long dstoffset, unsigned short width, 
-	unsigned short height, int byte_packed)
+void
+gfx2_mono_expand_blt(unsigned long srcbase, unsigned short srcx,
+		     unsigned short srcy, unsigned long dstoffset,
+		     unsigned short width, unsigned short height,
+		     int byte_packed)
 {
 #	if GFX_2DACCEL_GU2
-	if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
-		gu22_mono_expand_blt (srcbase, srcx, srcy, dstoffset, width, height, byte_packed);
+   if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
+      gu22_mono_expand_blt(srcbase, srcx, srcy, dstoffset, width, height,
+			   byte_packed);
 #	endif
 }
 
@@ -662,13 +706,16 @@ void gfx2_mono_expand_blt(unsigned long srcbase, unsigned short srcx,
  * gfx2_color_bitmap_to_screen_blt	
  *---------------------------------------------------------------------------
  */
-void gfx2_color_bitmap_to_screen_blt(unsigned short srcx, unsigned short srcy, 
-	unsigned long dstoffset, unsigned short width, unsigned short height, 
-	unsigned char *data, unsigned short pitch)
+void
+gfx2_color_bitmap_to_screen_blt(unsigned short srcx, unsigned short srcy,
+				unsigned long dstoffset, unsigned short width,
+				unsigned short height, unsigned char *data,
+				short pitch)
 {
 #	if GFX_2DACCEL_GU2
-	if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
-		gu22_color_bitmap_to_screen_blt (srcx, srcy, dstoffset, width, height, data, pitch);
+   if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
+      gu22_color_bitmap_to_screen_blt(srcx, srcy, dstoffset, width, height,
+				      data, pitch);
 #	endif
 }
 
@@ -676,12 +723,13 @@ void gfx2_color_bitmap_to_screen_blt(unsigned short srcx, unsigned short srcy,
  * gfx2_text_blt	
  *---------------------------------------------------------------------------
  */
-void gfx2_text_blt (unsigned long dstoffset, unsigned short width, unsigned short height, 
-	unsigned char *data)
+void
+gfx2_text_blt(unsigned long dstoffset, unsigned short width,
+	      unsigned short height, unsigned char *data)
 {
 #	if GFX_2DACCEL_GU2
-	if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
-		gu22_text_blt (dstoffset, width, height, data);
+   if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
+      gu22_text_blt(dstoffset, width, height, data);
 #	endif
 }
 
@@ -689,13 +737,16 @@ void gfx2_text_blt (unsigned long dstoffset, unsigned short width, unsigned shor
  * gfx2_mono_bitmap_to_screen_blt	
  *---------------------------------------------------------------------------
  */
-void gfx2_mono_bitmap_to_screen_blt(unsigned short srcx, unsigned short srcy, 
-	unsigned long dstoffset, unsigned short width, unsigned short height, 
-	unsigned char *data, unsigned short pitch)
+void
+gfx2_mono_bitmap_to_screen_blt(unsigned short srcx, unsigned short srcy,
+			       unsigned long dstoffset, unsigned short width,
+			       unsigned short height, unsigned char *data,
+			       short pitch)
 {
 #	if GFX_2DACCEL_GU2
-	if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
-		gu22_mono_bitmap_to_screen_blt (srcx, srcy, dstoffset, width, height, data, pitch);
+   if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
+      gu22_mono_bitmap_to_screen_blt(srcx, srcy, dstoffset, width, height,
+				     data, pitch);
 #	endif
 }
 
@@ -703,14 +754,16 @@ void gfx2_mono_bitmap_to_screen_blt(unsigned short srcx, unsigned short srcy,
  * gfx2_bresenham_line
  *---------------------------------------------------------------------------
  */
-void gfx2_bresenham_line(unsigned long dstoffset, 
-	unsigned short length, unsigned short initerr, 
-	unsigned short axialerr, unsigned short diagerr, 
-	unsigned short flags)
+void
+gfx2_bresenham_line(unsigned long dstoffset,
+		    unsigned short length, unsigned short initerr,
+		    unsigned short axialerr, unsigned short diagerr,
+		    unsigned short flags)
 {
 #	if GFX_2DACCEL_GU2
-	if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
-		gu22_bresenham_line (dstoffset, length, initerr, axialerr, diagerr, flags);
+   if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
+      gu22_bresenham_line(dstoffset, length, initerr, axialerr, diagerr,
+			  flags);
 #	endif
 }
 
@@ -718,11 +771,12 @@ void gfx2_bresenham_line(unsigned long dstoffset,
  * gfx2_sync_to_vblank
  *---------------------------------------------------------------------------
  */
-void gfx2_sync_to_vblank(void)
+void
+gfx2_sync_to_vblank(void)
 {
 #	if GFX_2DACCEL_GU2
-	if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
-		gu22_sync_to_vblank();
+   if (gfx_2daccel_type & GFX_2DACCEL_TYPE_GU2)
+      gu22_sync_to_vblank();
 #	endif
 }
 
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/gfx_rtns.h b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/gfx_rtns.h
new file mode 100644
index 000000000..aefd6c04a
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/gfx_rtns.h
@@ -0,0 +1,738 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/gfx_rtns.h,v 1.1 2002/12/10 15:12:25 alanh Exp $ */
+/*
+ * $Workfile: gfx_rtns.h $
+ *
+ * This header file defines the Durango routines and variables used
+ * to access the memory mapped regions.
+ *
+ * NSC_LIC_ALTERNATIVE_PREAMBLE
+ *
+ * Revision 1.0
+ *
+ * National Semiconductor Alternative GPL-BSD License
+ *
+ * National Semiconductor Corporation licenses this software 
+ * ("Software"):
+ *
+ *      Durango
+ *
+ * under one of the two following licenses, depending on how the 
+ * Software is received by the Licensee.
+ * 
+ * If this Software is received as part of the Linux Framebuffer or
+ * other GPL licensed software, then the GPL license designated 
+ * NSC_LIC_GPL applies to this Software; in all other circumstances 
+ * then the BSD-style license designated NSC_LIC_BSD shall apply.
+ *
+ * END_NSC_LIC_ALTERNATIVE_PREAMBLE */
+
+/* NSC_LIC_BSD
+ *
+ * National Semiconductor Corporation Open Source License for Durango
+ *
+ * (BSD License with Export Notice)
+ *
+ * Copyright (c) 1999-2001
+ * National Semiconductor Corporation.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met: 
+ *
+ *   * Redistributions of source code must retain the above copyright 
+ *     notice, this list of conditions and the following disclaimer. 
+ *
+ *   * Redistributions in binary form must reproduce the above 
+ *     copyright notice, this list of conditions and the following 
+ *     disclaimer in the documentation and/or other materials provided 
+ *     with the distribution. 
+ *
+ *   * Neither the name of the National Semiconductor Corporation nor 
+ *     the names of its contributors may be used to endorse or promote 
+ *     products derived from this software without specific prior 
+ *     written permission. 
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+ * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE,
+ * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE.
+ *
+ * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
+ * YOUR JURISDICTION. It is licensee's responsibility to comply with 
+ * any export regulations applicable in licensee's jurisdiction. Under 
+ * CURRENT (2001) U.S. export regulations this software 
+ * is eligible for export from the U.S. and can be downloaded by or 
+ * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
+ * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
+ * Syria, Sudan, Afghanistan and any other country to which the U.S. 
+ * has embargoed goods and services. 
+ *
+ * END_NSC_LIC_BSD */
+
+/* NSC_LIC_GPL
+ *
+ * National Semiconductor Corporation Gnu General Public License for Durango
+ *
+ * (GPL License with Export Notice)
+ *
+ * Copyright (c) 1999-2001
+ * National Semiconductor Corporation.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted under the terms of the GNU General 
+ * Public License as published by the Free Software Foundation; either 
+ * version 2 of the License, or (at your option) any later version  
+ *
+ * In addition to the terms of the GNU General Public License, neither 
+ * the name of the National Semiconductor Corporation nor the names of 
+ * its contributors may be used to endorse or promote products derived 
+ * from this software without specific prior written permission. 
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+ * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, 
+ * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE. See the GNU General Public License for more details. 
+ *
+ * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
+ * YOUR JURISDICTION. It is licensee's responsibility to comply with 
+ * any export regulations applicable in licensee's jurisdiction. Under 
+ * CURRENT (2001) U.S. export regulations this software 
+ * is eligible for export from the U.S. and can be downloaded by or 
+ * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
+ * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
+ * Syria, Sudan, Afghanistan and any other country to which the U.S. 
+ * has embargoed goods and services. 
+ *
+ * You should have received a copy of the GNU General Public License 
+ * along with this file; if not, write to the Free Software Foundation, 
+ * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 
+ *
+ * END_NSC_LIC_GPL */
+
+#ifndef _gfx_rtns_h
+#define _gfx_rtns_h
+
+/* INCLUDE DURANGO DEFINITIONS */
+/* These definitions are placed in another file to allow their inclusion      */
+/* in a user application.  Such applications generally work through driver    */
+/* shell routines that simply pass their parameters to Durango routines.      */
+/* An external file provides an easy way to provide the definitions for these */
+/* parameters without the applications gaining any Durango visisbility.       */
+
+#include "gfx_type.h"
+
+/* COMPILER OPTION FOR C++ PROGRAMS */
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/* DURANGO MEMORY POINTERS */
+
+   extern unsigned char *gfx_virt_regptr;
+   extern unsigned char *gfx_virt_fbptr;
+   extern unsigned char *gfx_virt_vidptr;
+   extern unsigned char *gfx_virt_vipptr;
+   extern unsigned char *gfx_virt_spptr;
+   extern unsigned char *gfx_virt_gpptr;
+
+   extern unsigned char *gfx_phys_regptr;
+   extern unsigned char *gfx_phys_fbptr;
+   extern unsigned char *gfx_phys_vidptr;
+   extern unsigned char *gfx_phys_vipptr;
+   extern unsigned char *gfx_phys_spptr;
+   extern unsigned char *gfx_phys_gpptr;
+
+/* DURANGO VARIBLES FOR RUNTIME SELECTION AND POSSIBLE VALUES */
+
+   extern int gfx_display_type;
+#define GFX_DISPLAY_TYPE_GU1		0x0001
+#define GFX_DISPLAY_TYPE_GU2		0x0002
+
+   extern int gfx_init_type;
+#define GFX_INIT_TYPE_GU1           0x0001
+#define GFX_INIT_TYPE_GU2           0x0002
+
+   extern int gfx_msr_type;
+#define GFX_MSR_TYPE_REDCLOUD       0x0001
+
+   extern int gfx_2daccel_type;
+#define GFX_2DACCEL_TYPE_GU1		0x0001
+#define GFX_2DACCEL_TYPE_GU2		0x0002
+
+   extern int gfx_video_type;
+#define GFX_VIDEO_TYPE_CS5530		0x0001
+#define GFX_VIDEO_TYPE_SC1200		0x0002
+#define GFX_VIDEO_TYPE_REDCLOUD     0x0004
+
+   extern int gfx_vip_type;
+#define GFX_VIP_TYPE_SC1200			0x0001
+
+   extern int gfx_decoder_type;
+#define GFX_DECODER_TYPE_SAA7114	0x0001
+
+   extern int gfx_tv_type;
+#define GFX_TV_TYPE_SC1200			0x0001
+#define GFX_TV_TYPE_FS451			0x0002
+
+   extern int gfx_i2c_type;
+#define GFX_I2C_TYPE_ACCESS			0x0001
+#define GFX_I2C_TYPE_GPIO			0x0002
+
+/* GLOBAL CPU INFORMATION */
+
+   extern unsigned long gfx_cpu_version;
+   extern unsigned long gfx_cpu_frequency;
+   extern unsigned long gfx_vid_version;
+   extern ChipType gfx_chip_revision;
+
+/* ROUTINES IN GFX_INIT.C */
+
+   unsigned long gfx_pci_config_read(unsigned long address);
+   void gfx_pci_config_write(unsigned long address, unsigned long data);
+   unsigned long gfx_get_core_freq(void);
+   unsigned long gfx_detect_cpu(void);
+   unsigned long gfx_detect_video(void);
+   unsigned long gfx_get_cpu_register_base(void);
+   unsigned long gfx_get_graphics_register_base(void);
+   unsigned long gfx_get_frame_buffer_base(void);
+   unsigned long gfx_get_frame_buffer_size(void);
+   unsigned long gfx_get_vid_register_base(void);
+   unsigned long gfx_get_vip_register_base(void);
+
+/* ROUTINES IN GFX_MSR.C */
+
+   int gfx_msr_init(void);
+   DEV_STATUS gfx_id_msr_device(MSR * pDev, unsigned long address);
+   DEV_STATUS gfx_get_msr_dev_address(unsigned int device,
+				      unsigned long *address);
+   DEV_STATUS gfx_get_glink_id_at_address(unsigned int *device,
+					  unsigned long address);
+   DEV_STATUS gfx_msr_read(unsigned int device, unsigned int msrRegister,
+			   Q_WORD * msrValue);
+   DEV_STATUS gfx_msr_write(unsigned int device, unsigned int msrRegister,
+			    Q_WORD * msrValue);
+
+/* ROUTINES IN GFX_DISP.C */
+
+   int gfx_set_display_bpp(unsigned short bpp);
+   int gfx_is_display_mode_supported(int xres, int yres, int bpp, int hz);
+   int gfx_set_display_mode(int xres, int yres, int bpp, int hz);
+   int gfx_set_display_timings(unsigned short bpp, unsigned short flags,
+			       unsigned short hactive,
+			       unsigned short hblank_start,
+			       unsigned short hsync_start,
+			       unsigned short hsync_end,
+			       unsigned short hblank_end,
+			       unsigned short htotal, unsigned short vactive,
+			       unsigned short vblank_start,
+			       unsigned short vsync_start,
+			       unsigned short vsync_end,
+			       unsigned short vblank_end,
+			       unsigned short vtotal,
+			       unsigned long frequency);
+   int gfx_set_vtotal(unsigned short vtotal);
+   void gfx_set_display_pitch(unsigned short pitch);
+   void gfx_set_display_offset(unsigned long offset);
+   int gfx_set_display_palette_entry(unsigned long index,
+				     unsigned long palette);
+   int gfx_set_display_palette(unsigned long *palette);
+   void gfx_video_shutdown(void);
+   void gfx_set_clock_frequency(unsigned long frequency);
+   int gfx_set_crt_enable(int enable);
+   void gfx_set_cursor_enable(int enable);
+   void gfx_set_cursor_colors(unsigned long bkcolor, unsigned long fgcolor);
+   void gfx_set_cursor_position(unsigned long memoffset,
+				unsigned short xpos, unsigned short ypos,
+				unsigned short xhotspot,
+				unsigned short yhotspot);
+   void gfx_set_cursor_shape32(unsigned long memoffset,
+			       unsigned long *andmask,
+			       unsigned long *xormask);
+   void gfx_set_cursor_shape64(unsigned long memoffset,
+			       unsigned long *andmask,
+			       unsigned long *xormask);
+   void gfx_set_icon_enable(int enable);
+   void gfx_set_icon_colors(unsigned long color0, unsigned long color1,
+			    unsigned long color2);
+   void gfx_set_icon_position(unsigned long memoffset, unsigned short xpos);
+   void gfx_set_icon_shape64(unsigned long memoffset, unsigned long *andmask,
+			     unsigned long *xormask, unsigned int lines);
+
+   int gfx_set_compression_enable(int enable);
+   int gfx_set_compression_offset(unsigned long offset);
+   int gfx_set_compression_pitch(unsigned short pitch);
+   int gfx_set_compression_size(unsigned short size);
+   void gfx_set_display_priority_high(int enable);
+   int gfx_test_timing_active(void);
+   int gfx_test_vertical_active(void);
+   int gfx_wait_vertical_blank(void);
+   void gfx_delay_milliseconds(unsigned long milliseconds);
+   void gfx_delay_microseconds(unsigned long microseconds);
+   void gfx_enable_panning(int x, int y);
+   int gfx_set_fixed_timings(int panelResX, int panelResY,
+			     unsigned short width, unsigned short height,
+			     unsigned short bpp);
+   int gfx_set_panel_present(int panelResX, int panelResY,
+			     unsigned short width, unsigned short height,
+			     unsigned short bpp);
+   void gfx_reset_timing_lock(void);
+
+/* "READ" ROUTINES IN GFX_DISP.C */
+
+   int gfx_get_display_details(unsigned int mode, int *xres, int *yres,
+			       int *hz);
+   unsigned short gfx_get_display_pitch(void);
+   int gfx_get_vsa2_softvga_enable(void);
+   int gfx_get_sync_polarities(void);
+   unsigned long gfx_get_clock_frequency(void);
+   unsigned long gfx_get_max_supported_pixel_clock(void);
+   int gfx_mode_frequency_supported(int xres, int yres, int bpp,
+				    unsigned long frequency);
+   int gfx_get_refreshrate_from_frequency(int xres, int yres, int bpp,
+					  int *hz, unsigned long frequency);
+   int gfx_get_refreshrate_from_mode(int xres, int yres, int bpp, int *hz,
+				     unsigned long frequency);
+   int gfx_get_frequency_from_refreshrate(int xres, int yres, int bpp, int hz,
+					  int *frequency);
+   int gfx_get_display_mode_count(void);
+   int gfx_get_display_mode(int *xres, int *yres, int *bpp, int *hz);
+   unsigned long gfx_get_frame_buffer_line_size(void);
+   unsigned short gfx_get_hactive(void);
+   unsigned short gfx_get_hblank_start(void);
+   unsigned short gfx_get_hsync_start(void);
+   unsigned short gfx_get_hsync_end(void);
+   unsigned short gfx_get_hblank_end(void);
+   unsigned short gfx_get_htotal(void);
+   unsigned short gfx_get_vactive(void);
+   unsigned short gfx_get_vline(void);
+   unsigned short gfx_get_vblank_start(void);
+   unsigned short gfx_get_vsync_start(void);
+   unsigned short gfx_get_vsync_end(void);
+   unsigned short gfx_get_vblank_end(void);
+   unsigned short gfx_get_vtotal(void);
+   unsigned short gfx_get_display_bpp(void);
+   unsigned long gfx_get_display_offset(void);
+   int gfx_get_display_palette_entry(unsigned long index,
+				     unsigned long *palette);
+   void gfx_get_display_palette(unsigned long *palette);
+   unsigned long gfx_get_cursor_enable(void);
+   unsigned long gfx_get_cursor_offset(void);
+   unsigned long gfx_get_cursor_position(void);
+   unsigned long gfx_get_cursor_clip(void);
+   unsigned long gfx_get_cursor_color(int color);
+   unsigned long gfx_get_icon_enable(void);
+   unsigned long gfx_get_icon_offset(void);
+   unsigned long gfx_get_icon_position(void);
+   unsigned long gfx_get_icon_color(int color);
+   int gfx_get_compression_enable(void);
+   unsigned long gfx_get_compression_offset(void);
+   unsigned short gfx_get_compression_pitch(void);
+   unsigned short gfx_get_compression_size(void);
+   int gfx_get_display_priority_high(void);
+   int gfx_get_valid_bit(int line);
+
+/* ROUTINES IN GFX_RNDR.C */
+
+   void gfx_set_bpp(unsigned short bpp);
+   void gfx_set_solid_pattern(unsigned long color);
+   void gfx_set_mono_pattern(unsigned long bgcolor, unsigned long fgcolor,
+			     unsigned long data0, unsigned long data1,
+			     unsigned char transparency);
+   void gfx_set_color_pattern(unsigned long bgcolor, unsigned long fgcolor,
+			      unsigned long data0, unsigned long data1,
+			      unsigned long data2, unsigned long data3,
+			      unsigned char transparency);
+   void gfx_load_color_pattern_line(short y, unsigned long *pattern_8x8);
+   void gfx_set_solid_source(unsigned long color);
+   void gfx_set_mono_source(unsigned long bgcolor, unsigned long fgcolor,
+			    unsigned short transparent);
+   void gfx_set_pattern_flags(unsigned short flags);
+   void gfx_set_raster_operation(unsigned char rop);
+   void gfx_pattern_fill(unsigned short x, unsigned short y,
+			 unsigned short width, unsigned short height);
+   void gfx_color_pattern_fill(unsigned short x, unsigned short y,
+			       unsigned short width, unsigned short height,
+			       unsigned long *pattern);
+   void gfx_screen_to_screen_blt(unsigned short srcx, unsigned short srcy,
+				 unsigned short dstx, unsigned short dsty,
+				 unsigned short width, unsigned short height);
+   void gfx_screen_to_screen_xblt(unsigned short srcx, unsigned short srcy,
+				  unsigned short dstx, unsigned short dsty,
+				  unsigned short width, unsigned short height,
+				  unsigned long color);
+   void gfx_color_bitmap_to_screen_blt(unsigned short srcx,
+				       unsigned short srcy,
+				       unsigned short dstx,
+				       unsigned short dsty,
+				       unsigned short width,
+				       unsigned short height,
+				       unsigned char *data, long pitch);
+   void gfx_color_bitmap_to_screen_xblt(unsigned short srcx,
+					unsigned short srcy,
+					unsigned short dstx,
+					unsigned short dsty,
+					unsigned short width,
+					unsigned short height,
+					unsigned char *data, long pitch,
+					unsigned long color);
+   void gfx_mono_bitmap_to_screen_blt(unsigned short srcx,
+				      unsigned short srcy,
+				      unsigned short dstx,
+				      unsigned short dsty,
+				      unsigned short width,
+				      unsigned short height,
+				      unsigned char *data, short pitch);
+   void gfx_text_blt(unsigned short dstx, unsigned short dsty,
+		     unsigned short width, unsigned short height,
+		     unsigned char *data);
+   void gfx_bresenham_line(unsigned short x, unsigned short y,
+			   unsigned short length, unsigned short initerr,
+			   unsigned short axialerr, unsigned short diagerr,
+			   unsigned short flags);
+   void gfx_wait_until_idle(void);
+   int gfx_test_blt_pending(void);
+
+/* SECOND GENERATION RENDERING ROUTINES */
+
+   void gfx2_set_source_stride(unsigned short stride);
+   void gfx2_set_destination_stride(unsigned short stride);
+   void gfx2_set_pattern_origin(int x, int y);
+   void gfx2_set_source_transparency(unsigned long color, unsigned long mask);
+   void gfx2_set_alpha_mode(int mode);
+   void gfx2_set_alpha_value(unsigned char value);
+   void gfx2_pattern_fill(unsigned long dstoffset, unsigned short width,
+			  unsigned short height);
+   void gfx2_color_pattern_fill(unsigned long dstoffset, unsigned short width,
+				unsigned short height,
+				unsigned long *pattern);
+   void gfx2_screen_to_screen_blt(unsigned long srcoffset,
+				  unsigned long dstoffset,
+				  unsigned short width, unsigned short height,
+				  int flags);
+   void gfx2_mono_expand_blt(unsigned long srcbase, unsigned short srcx,
+			     unsigned short srcy, unsigned long dstoffset,
+			     unsigned short width, unsigned short height,
+			     int byte_packed);
+   void gfx2_color_bitmap_to_screen_blt(unsigned short srcx,
+					unsigned short srcy,
+					unsigned long dstoffset,
+					unsigned short width,
+					unsigned short height,
+					unsigned char *data, short pitch);
+   void gfx2_mono_bitmap_to_screen_blt(unsigned short srcx,
+				       unsigned short srcy,
+				       unsigned long dstoffset,
+				       unsigned short width,
+				       unsigned short height,
+				       unsigned char *data, short pitch);
+   void gfx2_text_blt(unsigned long dstoffset, unsigned short width,
+		      unsigned short height, unsigned char *data);
+   void gfx2_bresenham_line(unsigned long dstoffset, unsigned short length,
+			    unsigned short initerr, unsigned short axialerr,
+			    unsigned short diagerr, unsigned short flags);
+   void gfx2_sync_to_vblank(void);
+
+/* ROUTINES IN GFX_VID.C */
+
+   int gfx_set_video_enable(int enable);
+   int gfx_set_video_format(unsigned long format);
+   int gfx_set_video_size(unsigned short width, unsigned short height);
+   int gfx_set_video_yuv_pitch(unsigned long ypitch, unsigned long uvpitch);
+   int gfx_set_video_offset(unsigned long offset);
+   int gfx_set_video_yuv_offsets(unsigned long yoffset, unsigned long uoffset,
+				 unsigned long voffset);
+   int gfx_set_video_window(short x, short y, unsigned short w,
+			    unsigned short h);
+   int gfx_set_video_left_crop(unsigned short x);
+   int gfx_set_video_upscale(unsigned short srcw, unsigned short srch,
+			     unsigned short dstw, unsigned short dsth);
+   int gfx_set_video_scale(unsigned short srcw, unsigned short srch,
+			   unsigned short dstw, unsigned short dsth);
+   int gfx_set_video_vertical_downscale(unsigned short srch,
+					unsigned short dsth);
+   void gfx_set_video_vertical_downscale_enable(int enable);
+   int gfx_set_video_downscale_config(unsigned short type, unsigned short m);
+   int gfx_set_video_color_key(unsigned long key, unsigned long mask,
+			       int bluescreen);
+   int gfx_set_video_filter(int xfilter, int yfilter);
+   int gfx_set_video_palette(unsigned long *palette);
+   int gfx_set_video_palette_entry(unsigned long index, unsigned long color);
+   int gfx_set_video_downscale_coefficients(unsigned short coef1,
+					    unsigned short coef2,
+					    unsigned short coef3,
+					    unsigned short coef4);
+   int gfx_set_video_downscale_enable(int enable);
+   int gfx_set_video_source(VideoSourceType source);
+   int gfx_set_vbi_source(VbiSourceType source);
+   int gfx_set_vbi_lines(unsigned long even, unsigned long odd);
+   int gfx_set_vbi_total(unsigned long even, unsigned long odd);
+   int gfx_set_video_interlaced(int enable);
+   int gfx_set_color_space_YUV(int enable);
+   int gfx_set_vertical_scaler_offset(char offset);
+   int gfx_set_top_line_in_odd(int enable);
+   int gfx_set_genlock_delay(unsigned long delay);
+   int gfx_set_genlock_enable(int flags);
+   int gfx_set_video_cursor(unsigned long key, unsigned long mask,
+			    unsigned short select_color2,
+			    unsigned long color1, unsigned long color2);
+   int gfx_set_video_cursor_enable(int enable);
+   int gfx_set_video_request(short x, short y);
+
+   int gfx_select_alpha_region(int region);
+   int gfx_set_alpha_enable(int enable);
+   int gfx_set_alpha_window(short x, short y,
+			    unsigned short width, unsigned short height);
+   int gfx_set_alpha_value(unsigned char alpha, char delta);
+   int gfx_set_alpha_priority(int priority);
+   int gfx_set_alpha_color(unsigned long color);
+   int gfx_set_alpha_color_enable(int enable);
+   int gfx_set_no_ck_outside_alpha(int enable);
+   int gfx_disable_softvga(void);
+   int gfx_enable_softvga(void);
+   int gfx_set_macrovision_enable(int enable);
+
+/* READ ROUTINES IN GFX_VID.C */
+
+   int gfx_get_video_enable(void);
+   int gfx_get_video_format(void);
+   unsigned long gfx_get_video_src_size(void);
+   unsigned long gfx_get_video_line_size(void);
+   unsigned long gfx_get_video_xclip(void);
+   unsigned long gfx_get_video_offset(void);
+   void gfx_get_video_yuv_offsets(unsigned long *yoffset,
+				  unsigned long *uoffset,
+				  unsigned long *voffset);
+   void gfx_get_video_yuv_pitch(unsigned long *ypitch,
+				unsigned long *uvpitch);
+   unsigned long gfx_get_video_upscale(void);
+   unsigned long gfx_get_video_scale(void);
+   unsigned long gfx_get_video_downscale_delta(void);
+   int gfx_get_video_vertical_downscale_enable(void);
+   int gfx_get_video_downscale_config(unsigned short *type,
+				      unsigned short *m);
+   void gfx_get_video_downscale_coefficients(unsigned short *coef1,
+					     unsigned short *coef2,
+					     unsigned short *coef3,
+					     unsigned short *coef4);
+   void gfx_get_video_downscale_enable(int *enable);
+   unsigned long gfx_get_video_dst_size(void);
+   unsigned long gfx_get_video_position(void);
+   unsigned long gfx_get_video_color_key(void);
+   unsigned long gfx_get_video_color_key_mask(void);
+   int gfx_get_video_palette_entry(unsigned long index,
+				   unsigned long *palette);
+   int gfx_get_video_color_key_src(void);
+   int gfx_get_video_filter(void);
+   int gfx_get_video_request(short *x, short *y);
+   int gfx_get_video_source(VideoSourceType * source);
+   int gfx_get_vbi_source(VbiSourceType * source);
+   unsigned long gfx_get_vbi_lines(int odd);
+   unsigned long gfx_get_vbi_total(int odd);
+   int gfx_get_video_interlaced(void);
+   int gfx_get_color_space_YUV(void);
+   int gfx_get_vertical_scaler_offset(char *offset);
+   unsigned long gfx_get_genlock_delay(void);
+   int gfx_get_genlock_enable(void);
+   int gfx_get_video_cursor(unsigned long *key, unsigned long *mask,
+			    unsigned short *select_color2,
+			    unsigned long *color1, unsigned short *color2);
+   unsigned long gfx_read_crc(void);
+   unsigned long gfx_read_crc32(void);
+   unsigned long gfx_read_window_crc(int source, unsigned short x,
+				     unsigned short y, unsigned short width,
+				     unsigned short height, int crc32);
+   int gfx_get_macrovision_enable(void);
+
+   void gfx_get_alpha_enable(int *enable);
+   void gfx_get_alpha_size(unsigned short *x, unsigned short *y,
+			   unsigned short *width, unsigned short *height);
+   void gfx_get_alpha_value(unsigned char *alpha, char *delta);
+   void gfx_get_alpha_priority(int *priority);
+   void gfx_get_alpha_color(unsigned long *color);
+
+/* ROUTINES IN GFX_VIP.C */
+
+   int gfx_set_vip_enable(int enable);
+   int gfx_set_vip_capture_run_mode(int mode);
+   int gfx_set_vip_base(unsigned long even, unsigned long odd);
+   int gfx_set_vip_pitch(unsigned long pitch);
+   int gfx_set_vip_mode(int mode);
+   int gfx_set_vbi_enable(int enable);
+   int gfx_set_vbi_mode(int mode);
+   int gfx_set_vbi_base(unsigned long even, unsigned long odd);
+   int gfx_set_vbi_pitch(unsigned long pitch);
+   int gfx_set_vbi_direct(unsigned long even_lines, unsigned long odd_lines);
+   int gfx_set_vbi_interrupt(int enable);
+   int gfx_set_vip_bus_request_threshold_high(int enable);
+   int gfx_set_vip_last_line(int last_line);
+   int gfx_test_vip_odd_field(void);
+   int gfx_test_vip_bases_updated(void);
+   int gfx_test_vip_fifo_overflow(void);
+   int gfx_get_vip_line(void);
+
+/* READ ROUTINES IN GFX_VIP.C */
+
+   int gfx_get_vip_enable(void);
+   unsigned long gfx_get_vip_base(int odd);
+   unsigned long gfx_get_vip_pitch(void);
+   int gfx_get_vip_mode(void);
+   int gfx_get_vbi_enable(void);
+   int gfx_get_vbi_mode(void);
+   unsigned long gfx_get_vbi_base(int odd);
+   unsigned long gfx_get_vbi_pitch(void);
+   unsigned long gfx_get_vbi_direct(int odd);
+   int gfx_get_vbi_interrupt(void);
+   int gfx_get_vip_bus_request_threshold_high(void);
+
+/* ROUTINES IN GFX_DCDR.C */
+
+   int gfx_set_decoder_defaults(void);
+   int gfx_set_decoder_analog_input(unsigned char input);
+   int gfx_set_decoder_brightness(unsigned char brightness);
+   int gfx_set_decoder_contrast(unsigned char contrast);
+   int gfx_set_decoder_hue(char hue);
+   int gfx_set_decoder_saturation(unsigned char saturation);
+   int gfx_set_decoder_input_offset(unsigned short x, unsigned short y);
+   int gfx_set_decoder_input_size(unsigned short width,
+				  unsigned short height);
+   int gfx_set_decoder_output_size(unsigned short width,
+				   unsigned short height);
+   int gfx_set_decoder_scale(unsigned short srcw, unsigned short srch,
+			     unsigned short dstw, unsigned short dsth);
+   int gfx_set_decoder_vbi_format(int start, int end, int format);
+   int gfx_set_decoder_vbi_enable(int enable);
+   int gfx_set_decoder_vbi_upscale(void);
+   int gfx_set_decoder_TV_standard(TVStandardType TVStandard);
+   int gfx_set_decoder_luminance_filter(unsigned char lufi);
+   int gfx_decoder_software_reset(void);
+   int gfx_decoder_detect_macrovision(void);
+   int gfx_decoder_detect_video(void);
+
+/* READ ROUTINES IN GFX_DCDR.C */
+
+   unsigned char gfx_get_decoder_brightness(void);
+   unsigned char gfx_get_decoder_contrast(void);
+   char gfx_get_decoder_hue(void);
+   unsigned char gfx_get_decoder_saturation(void);
+   unsigned long gfx_get_decoder_input_offset(void);
+   unsigned long gfx_get_decoder_input_size(void);
+   unsigned long gfx_get_decoder_output_size(void);
+   int gfx_get_decoder_vbi_format(int line);
+
+/* ROUTINES IN GFX_I2C.C */
+
+   int gfx_i2c_reset(unsigned char busnum, short adr, char freq);
+   int gfx_i2c_write(unsigned char busnum, unsigned char chipadr,
+		     unsigned char subadr, unsigned char bytes,
+		     unsigned char *data);
+   int gfx_i2c_read(unsigned char busnum, unsigned char chipadr,
+		    unsigned char subadr, unsigned char bytes,
+		    unsigned char *data);
+   int gfx_i2c_select_gpio(int clock, int data);
+   int gfx_i2c_init(void);
+   void gfx_i2c_cleanup(void);
+
+/* ROUTINES IN GFX_TV.C */
+
+   int gfx_set_tv_format(TVStandardType format, GfxOnTVType resolution);
+   int gfx_set_tv_output(int output);
+   int gfx_set_tv_enable(int enable);
+   int gfx_set_tv_flicker_filter(int ff);
+   int gfx_set_tv_sub_carrier_reset(int screset);
+   int gfx_set_tv_vphase(int vphase);
+   int gfx_set_tv_YC_delay(int delay);
+   int gfx_set_tvenc_reset_interval(int interval);
+   int gfx_set_tv_cc_enable(int enable);
+   int gfx_set_tv_cc_data(unsigned char data1, unsigned char data2);
+   int gfx_set_tv_display(int width, int height);
+   int gfx_test_tvout_odd_field(void);
+   int gfx_test_tvenc_odd_field(void);
+   int gfx_set_tv_field_status_invert(int enable);
+   int gfx_get_tv_vphase(void);
+   int gfx_get_tv_enable(unsigned int *p_on);
+   int gfx_get_tv_output(void);
+   int gfx_get_tv_mode_count(TVStandardType format);
+   int gfx_get_tv_display_mode(int *width, int *height, int *bpp, int *hz);
+   int gfx_get_tv_display_mode_frequency(unsigned short width,
+					 unsigned short height,
+					 TVStandardType format,
+					 int *frequency);
+   int gfx_is_tv_display_mode_supported(unsigned short width,
+					unsigned short height,
+					TVStandardType format);
+
+   int gfx_get_tv_standard(unsigned long *p_standard);
+   int gfx_get_available_tv_standards(unsigned long *p_standards);
+   int gfx_set_tv_standard(unsigned long standard);
+   int gfx_get_tv_vga_mode(unsigned long *p_vga_mode);
+   int gfx_get_available_tv_vga_modes(unsigned long *p_vga_modes);
+   int gfx_set_tv_vga_mode(unsigned long vga_mode);
+   int gfx_get_tvout_mode(unsigned long *p_tvout_mode);
+   int gfx_set_tvout_mode(unsigned long tvout_mode);
+   int gfx_get_sharpness(int *p_sharpness);
+   int gfx_set_sharpness(int sharpness);
+   int gfx_get_flicker_filter(int *p_flicker);
+   int gfx_set_flicker_filter(int flicker);
+   int gfx_get_overscan(int *p_x, int *p_y);
+   int gfx_set_overscan(int x, int y);
+   int gfx_get_position(int *p_x, int *p_y);
+   int gfx_set_position(int x, int y);
+   int gfx_get_color(int *p_color);
+   int gfx_set_color(int color);
+   int gfx_get_brightness(int *p_brightness);
+   int gfx_set_brightness(int brightness);
+   int gfx_get_contrast(int *p_contrast);
+   int gfx_set_contrast(int constrast);
+   int gfx_get_yc_filter(unsigned int *p_yc_filter);
+   int gfx_set_yc_filter(unsigned int yc_filter);
+   int gfx_get_aps_trigger_bits(unsigned int *p_trigger_bits);
+   int gfx_set_aps_trigger_bits(unsigned int trigger_bits);
+
+/* ROUTINES IN GFX_VGA.C */
+
+   int gfx_get_softvga_active(void);
+   int gfx_vga_test_pci(void);
+   unsigned char gfx_vga_get_pci_command(void);
+   int gfx_vga_set_pci_command(unsigned char command);
+   int gfx_vga_seq_reset(int reset);
+   int gfx_vga_set_graphics_bits(void);
+   int gfx_vga_mode(gfx_vga_struct * vga, int xres, int yres, int bpp,
+		    int hz);
+   int gfx_vga_pitch(gfx_vga_struct * vga, unsigned short pitch);
+   int gfx_vga_save(gfx_vga_struct * vga, int flags);
+   int gfx_vga_restore(gfx_vga_struct * vga, int flags);
+   int gfx_vga_mode_switch(int active);
+   void gfx_vga_clear_extended(void);
+
+/* CLOSE BRACKET FOR C++ COMPLILATION */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif					/* !_gfx_rtns_h */
+
+/* END OF FILE */
+
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/gfx_tv.c b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/gfx_tv.c
index 905f442db..6cb825d91 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/gfx_tv.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/gfx_tv.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/gfx_tv.c,v 1.2 2002/10/18 20:02:40 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/gfx_tv.c,v 1.1 2002/12/10 15:12:25 alanh Exp $ */
 /*
  * $Workfile: gfx_tv.c $
  *
@@ -145,46 +145,49 @@
  *
  * END_NSC_LIC_GPL */
 
-
 /* TV TIMINGS */
 
 DISPLAYMODE TVTimings[] = {
 
 /* NTSC resolution */
 
-{ 0x3 |                                     /* negative syncs       */
-  GFX_MODE_TV_NTSC,                         /* NTSC format          */
-  640, 640, 656, 744, 792, 792,             /* horizontal timings   */
-  480, 480, 490, 492, 517, 525,	            /* vertical timings     */
-  0x0018EC4D,                               /* freq = 24.923052 MHz */
-},
+   {0x3 |				/* negative syncs       */
+    GFX_MODE_TV_NTSC,			/* NTSC format          */
+    640, 640, 656, 744, 792, 792,	/* horizontal timings   */
+    480, 480, 490, 492, 517, 525,	/* vertical timings     */
+    0x0018EC4D,				/* freq = 24.923052 MHz */
+    }
+   ,
 
 /* PAL resolution */
 
-{ 0x3 |                                     /* negative syncs       */
-  GFX_MODE_TV_PAL,                          /* PAL format           */
-  768, 768, 800, 848, 864, 864,	            /* horizontal timings   */
-  576, 576, 586, 588, 625, 625,	            /* vertical timings     */
-  0x001B0000,                               /* freq = 27.00 MHz     */
-},
+   {0x3 |				/* negative syncs       */
+    GFX_MODE_TV_PAL,			/* PAL format           */
+    768, 768, 800, 848, 864, 864,	/* horizontal timings   */
+    576, 576, 586, 588, 625, 625,	/* vertical timings     */
+    0x001B0000,				/* freq = 27.00 MHz     */
+    }
+   ,
 
 /* NTSC resolution non-square pixels */
 
-{ 0x3 |                                     /* negative syncs       */
-  GFX_MODE_TV_NTSC,                         /* NTSC format          */
-  720, 720, 736, 752, 792, 792,	            /* horizontal timings   */
-  480, 480, 490, 492, 517, 525,	            /* vertical timings     */
-  0x0018EC4D,                               /* freq = 24.923052 MHz */
-},
+   {0x3 |				/* negative syncs       */
+    GFX_MODE_TV_NTSC,			/* NTSC format          */
+    720, 720, 736, 752, 792, 792,	/* horizontal timings   */
+    480, 480, 490, 492, 517, 525,	/* vertical timings     */
+    0x0018EC4D,				/* freq = 24.923052 MHz */
+    }
+   ,
 
 /* PAL resolution non-square pixels */
 
-{ 0x3 |                                     /* negative syncs       */
-  GFX_MODE_TV_PAL,                          /* PAL format           */
-  720, 720, 752, 816, 864, 864,             /* horizontal timings   */
-  576, 576, 586, 588, 625, 625,             /* vertical timings     */
-  0x001B0000,                               /* freq = 27.00 MHz     */
-}};
+   {0x3 |				/* negative syncs       */
+    GFX_MODE_TV_PAL,			/* PAL format           */
+    720, 720, 752, 816, 864, 864,	/* horizontal timings   */
+    576, 576, 586, 588, 625, 625,	/* vertical timings     */
+    0x001B0000,				/* freq = 27.00 MHz     */
+    }
+};
 
 #define NUM_TV_MODES sizeof(TVTimings)/sizeof(DISPLAYMODE)
 
@@ -209,138 +212,156 @@ DISPLAYMODE TVTimings[] = {
  * gfx_set_tv_format
  *-----------------------------------------------------------------------------
  */
-int gfx_set_tv_format(TVStandardType format, GfxOnTVType resolution)
+int
+gfx_set_tv_format(TVStandardType format, GfxOnTVType resolution)
 {
-	int retval = GFX_STATUS_UNSUPPORTED;
+   int retval = GFX_STATUS_UNSUPPORTED;
+
 #if GFX_TV_SC1200
-	if (gfx_tv_type & GFX_TV_TYPE_SC1200)
-		retval = sc1200_set_tv_format(format, resolution);
+   if (gfx_tv_type & GFX_TV_TYPE_SC1200)
+      retval = sc1200_set_tv_format(format, resolution);
 #endif
 #if GFX_TV_FS451
-	if (gfx_tv_type & GFX_TV_TYPE_FS451)
-		retval = fs450_set_tv_format(format, resolution);
-#endif 
-	return(retval);
+   if (gfx_tv_type & GFX_TV_TYPE_FS451)
+      retval = fs450_set_tv_format(format, resolution);
+#endif
+   return (retval);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_set_tv_output
  *-----------------------------------------------------------------------------
  */
-int gfx_set_tv_output(int output)
+int
+gfx_set_tv_output(int output)
 {
-	int retval = GFX_STATUS_UNSUPPORTED;
+   int retval = GFX_STATUS_UNSUPPORTED;
+
 #if GFX_TV_SC1200
-	if (gfx_tv_type & GFX_TV_TYPE_SC1200)
-		retval = sc1200_set_tv_output(output);
+   if (gfx_tv_type & GFX_TV_TYPE_SC1200)
+      retval = sc1200_set_tv_output(output);
 #endif
 #if GFX_TV_FS451
-	if (gfx_tv_type & GFX_TV_TYPE_FS451)
-		retval = fs450_set_tv_output(output);
-#endif 
-	return(retval);
+   if (gfx_tv_type & GFX_TV_TYPE_FS451)
+      retval = fs450_set_tv_output(output);
+#endif
+   return (retval);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_set_tv_enable
  *-----------------------------------------------------------------------------
  */
-int gfx_set_tv_enable(int enable)
+int
+gfx_set_tv_enable(int enable)
 {
-	int retval = GFX_STATUS_UNSUPPORTED;
+   int retval = GFX_STATUS_UNSUPPORTED;
+
 #if GFX_TV_SC1200
-	if (gfx_tv_type & GFX_TV_TYPE_SC1200)
-		retval = sc1200_set_tv_enable(enable);
+   if (gfx_tv_type & GFX_TV_TYPE_SC1200)
+      retval = sc1200_set_tv_enable(enable);
 #endif
 #if GFX_TV_FS451
-	if (gfx_tv_type & GFX_TV_TYPE_FS451)
-		retval = fs450_set_tv_enable(enable);
-#endif 
-	return(retval);
+   if (gfx_tv_type & GFX_TV_TYPE_FS451)
+      retval = fs450_set_tv_enable(enable);
+#endif
+   return (retval);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_set_tv_flicker_filter
  *-----------------------------------------------------------------------------
  */
-int gfx_set_tv_flicker_filter(int ff)
+int
+gfx_set_tv_flicker_filter(int ff)
 {
-	int retval = GFX_STATUS_UNSUPPORTED;
+   int retval = GFX_STATUS_UNSUPPORTED;
+
 #if GFX_TV_SC1200
-	if (gfx_tv_type & GFX_TV_TYPE_SC1200)
-		retval = sc1200_set_tv_flicker_filter(ff);
+   if (gfx_tv_type & GFX_TV_TYPE_SC1200)
+      retval = sc1200_set_tv_flicker_filter(ff);
 #endif
-	return(retval);
+   return (retval);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_set_tv_sub_carrier_reset
  *-----------------------------------------------------------------------------
  */
-int gfx_set_tv_sub_carrier_reset(int screset)
+int
+gfx_set_tv_sub_carrier_reset(int screset)
 {
-	int retval = GFX_STATUS_UNSUPPORTED;
+   int retval = GFX_STATUS_UNSUPPORTED;
+
 #if GFX_TV_SC1200
-	if (gfx_tv_type & GFX_TV_TYPE_SC1200)
-		retval = sc1200_set_tv_sub_carrier_reset(screset);
+   if (gfx_tv_type & GFX_TV_TYPE_SC1200)
+      retval = sc1200_set_tv_sub_carrier_reset(screset);
 #endif
-	return(retval);
+   return (retval);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_set_tv_vphase
  *-----------------------------------------------------------------------------
  */
-int gfx_set_tv_vphase(int vphase)
+int
+gfx_set_tv_vphase(int vphase)
 {
-	int retval = GFX_STATUS_UNSUPPORTED;
+   int retval = GFX_STATUS_UNSUPPORTED;
+
 #if GFX_TV_SC1200
-	if (gfx_tv_type & GFX_TV_TYPE_SC1200)
-		retval = sc1200_set_tv_vphase(vphase);
+   if (gfx_tv_type & GFX_TV_TYPE_SC1200)
+      retval = sc1200_set_tv_vphase(vphase);
 #endif
-	return(retval);
+   return (retval);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_set_tv_YC_delay
  *-----------------------------------------------------------------------------
  */
-int gfx_set_tv_YC_delay(int delay)
+int
+gfx_set_tv_YC_delay(int delay)
 {
-	int retval = GFX_STATUS_UNSUPPORTED;
+   int retval = GFX_STATUS_UNSUPPORTED;
+
 #if GFX_TV_SC1200
-	if (gfx_tv_type & GFX_TV_TYPE_SC1200)
-		retval = sc1200_set_tv_YC_delay(delay);
+   if (gfx_tv_type & GFX_TV_TYPE_SC1200)
+      retval = sc1200_set_tv_YC_delay(delay);
 #endif
-	return(retval);
+   return (retval);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_set_tvenc_reset_interval
  *-----------------------------------------------------------------------------
  */
-int gfx_set_tvenc_reset_interval(int interval)
+int
+gfx_set_tvenc_reset_interval(int interval)
 {
-	int retval = GFX_STATUS_UNSUPPORTED;
+   int retval = GFX_STATUS_UNSUPPORTED;
+
 #if GFX_TV_SC1200
-	if (gfx_tv_type & GFX_TV_TYPE_SC1200)
-		retval = sc1200_set_tvenc_reset_interval(interval);
+   if (gfx_tv_type & GFX_TV_TYPE_SC1200)
+      retval = sc1200_set_tvenc_reset_interval(interval);
 #endif
-	return(retval);
+   return (retval);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_set_tv_cc_enable
  *-----------------------------------------------------------------------------
  */
-int gfx_set_tv_cc_enable(int enable)
+int
+gfx_set_tv_cc_enable(int enable)
 {
-	int retval = GFX_STATUS_UNSUPPORTED;
+   int retval = GFX_STATUS_UNSUPPORTED;
+
 #if GFX_TV_SC1200
-	if (gfx_tv_type & GFX_TV_TYPE_SC1200)
-		retval = sc1200_set_tv_cc_enable(enable);
+   if (gfx_tv_type & GFX_TV_TYPE_SC1200)
+      retval = sc1200_set_tv_cc_enable(enable);
 #endif
-	return(retval);
+   return (retval);
 }
 
 /*-----------------------------------------------------------------------------
@@ -350,14 +371,16 @@ int gfx_set_tv_cc_enable(int enable)
  * of the TV encoder.
  *-----------------------------------------------------------------------------
  */
-int gfx_set_tv_cc_data(unsigned char data1, unsigned char data2)
+int
+gfx_set_tv_cc_data(unsigned char data1, unsigned char data2)
 {
-	int retval = GFX_STATUS_UNSUPPORTED;
+   int retval = GFX_STATUS_UNSUPPORTED;
+
 #if GFX_TV_SC1200
-	if (gfx_tv_type & GFX_TV_TYPE_SC1200)
-		retval = sc1200_set_tv_cc_data(data1, data2);
+   if (gfx_tv_type & GFX_TV_TYPE_SC1200)
+      retval = sc1200_set_tv_cc_data(data1, data2);
 #endif
-	return(retval);
+   return (retval);
 }
 
 /*---------------------------------------------------------------------------
@@ -366,164 +389,184 @@ int gfx_set_tv_cc_data(unsigned char data1, unsigned char data2)
  * Set the timings in the display controller to support a TV resolution.
  *---------------------------------------------------------------------------
  */
-int gfx_set_tv_display(int width, int height)
+int
+gfx_set_tv_display(int width, int height)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_TV_SC1200
-	if (gfx_tv_type & GFX_TV_TYPE_SC1200)
-		status = sc1200_set_tv_display(width, height);
+   if (gfx_tv_type & GFX_TV_TYPE_SC1200)
+      status = sc1200_set_tv_display(width, height);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_test_tvout_odd_field
  *---------------------------------------------------------------------------
  */
-int gfx_test_tvout_odd_field(void)
+int
+gfx_test_tvout_odd_field(void)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_TV_SC1200
-	if (gfx_tv_type & GFX_TV_TYPE_SC1200)
-		status = sc1200_test_tvout_odd_field();
+   if (gfx_tv_type & GFX_TV_TYPE_SC1200)
+      status = sc1200_test_tvout_odd_field();
 #	endif
-	return(status);
+   return (status);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_test_tvenc_odd_field
  *---------------------------------------------------------------------------
  */
-int gfx_test_tvenc_odd_field(void)
+int
+gfx_test_tvenc_odd_field(void)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_TV_SC1200
-	if (gfx_tv_type & GFX_TV_TYPE_SC1200)
-		status = sc1200_test_tvenc_odd_field();
+   if (gfx_tv_type & GFX_TV_TYPE_SC1200)
+      status = sc1200_test_tvenc_odd_field();
 #	endif
-	return(status);
+   return (status);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_set_tv_field_status_invert
  *-----------------------------------------------------------------------------
  */
-int gfx_set_tv_field_status_invert(int enable)
+int
+gfx_set_tv_field_status_invert(int enable)
 {
-	int retval = GFX_STATUS_UNSUPPORTED;
+   int retval = GFX_STATUS_UNSUPPORTED;
+
 #if GFX_TV_SC1200
-	if (gfx_tv_type & GFX_TV_TYPE_SC1200)
-		retval = sc1200_set_tv_field_status_invert(enable);
+   if (gfx_tv_type & GFX_TV_TYPE_SC1200)
+      retval = sc1200_set_tv_field_status_invert(enable);
 #endif
-	return(retval);
+   return (retval);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_get_tv_vphase
  *---------------------------------------------------------------------------
  */
-int gfx_get_tv_vphase(void)
+int
+gfx_get_tv_vphase(void)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_TV_SC1200
-	if (gfx_tv_type & GFX_TV_TYPE_SC1200)
-		status = sc1200_get_tv_vphase();
+   if (gfx_tv_type & GFX_TV_TYPE_SC1200)
+      status = sc1200_get_tv_vphase();
 #	endif
-	return(status);
+   return (status);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_get_tv_enable
  *---------------------------------------------------------------------------
  */
-int gfx_get_tv_enable(unsigned int *p_on)
+int
+gfx_get_tv_enable(unsigned int *p_on)
 {
-	int retval = -1;
+   int retval = -1;
+
 #	if GFX_TV_FS451
-	if (gfx_tv_type & GFX_TV_TYPE_FS451)
-		retval = fs450_get_tv_enable( p_on);
-#	endif 
+   if (gfx_tv_type & GFX_TV_TYPE_FS451)
+      retval = fs450_get_tv_enable(p_on);
+#	endif
 #	if GFX_TV_SC1200
-	if (gfx_tv_type & GFX_TV_TYPE_SC1200)
-		retval = sc1200_get_tv_enable(p_on);
+   if (gfx_tv_type & GFX_TV_TYPE_SC1200)
+      retval = sc1200_get_tv_enable(p_on);
 #	endif
-	return(retval);
+   return (retval);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_get_tv_output
  *---------------------------------------------------------------------------
  */
-int gfx_get_tv_output()
+int
+gfx_get_tv_output()
 {
-	int retval = -1;
+   int retval = -1;
 
 #	if GFX_TV_SC1200
-	if (gfx_tv_type & GFX_TV_TYPE_SC1200)
-		retval = sc1200_get_tv_output();
+   if (gfx_tv_type & GFX_TV_TYPE_SC1200)
+      retval = sc1200_get_tv_output();
 #	endif
-	return(retval);
+   return (retval);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_get_tv_mode_count 
  *---------------------------------------------------------------------------
  */
-int gfx_get_tv_mode_count(TVStandardType format)
+int
+gfx_get_tv_mode_count(TVStandardType format)
 {
-	int retval = -1;
+   int retval = -1;
 
 #	if GFX_TV_SC1200
-	if (gfx_tv_type & GFX_TV_TYPE_SC1200)
-		retval = sc1200_get_tv_mode_count (format);
+   if (gfx_tv_type & GFX_TV_TYPE_SC1200)
+      retval = sc1200_get_tv_mode_count(format);
 #	endif
-	return(retval);
+   return (retval);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_get_tv_display_mode 
  *---------------------------------------------------------------------------
  */
-int gfx_get_tv_display_mode (int *width, int *height, int *bpp, int *hz)
+int
+gfx_get_tv_display_mode(int *width, int *height, int *bpp, int *hz)
 {
-	int retval = -1;
+   int retval = -1;
 
 #	if GFX_TV_SC1200
-	if (gfx_tv_type & GFX_TV_TYPE_SC1200)
-		retval = sc1200_get_tv_display_mode (width, height, bpp, hz);
+   if (gfx_tv_type & GFX_TV_TYPE_SC1200)
+      retval = sc1200_get_tv_display_mode(width, height, bpp, hz);
 #	endif
-	return(retval);
+   return (retval);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_get_tv_display_mode_frequency 
  *---------------------------------------------------------------------------
  */
-int gfx_get_tv_display_mode_frequency (unsigned short width, unsigned short height, 
-									   TVStandardType format, int *frequency)
+int
+gfx_get_tv_display_mode_frequency(unsigned short width, unsigned short height,
+				  TVStandardType format, int *frequency)
 {
-	int retval = -1;
+   int retval = -1;
 
 #	if GFX_TV_SC1200
-	if (gfx_tv_type & GFX_TV_TYPE_SC1200)
-		retval = sc1200_get_tv_display_mode_frequency (width, height, format, frequency);
+   if (gfx_tv_type & GFX_TV_TYPE_SC1200)
+      retval =
+	    sc1200_get_tv_display_mode_frequency(width, height, format,
+						 frequency);
 #	endif
-	return(retval);
+   return (retval);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_is_tv_display_mode_supported
  *---------------------------------------------------------------------------
  */
-int gfx_is_tv_display_mode_supported (unsigned short width, unsigned short height, TVStandardType format)
+int
+gfx_is_tv_display_mode_supported(unsigned short width, unsigned short height,
+				 TVStandardType format)
 {
-	int retval = -1;
+   int retval = -1;
 
 #	if GFX_TV_SC1200
-	if (gfx_tv_type & GFX_TV_TYPE_SC1200)
-		retval = sc1200_is_tv_display_mode_supported (width, height, format);
+   if (gfx_tv_type & GFX_TV_TYPE_SC1200)
+      retval = sc1200_is_tv_display_mode_supported(width, height, format);
 #	endif
-	return(retval);
+   return (retval);
 }
 
 /*------------------------------------------
@@ -532,41 +575,46 @@ int gfx_is_tv_display_mode_supported (unsigned short width, unsigned short heigh
  * is no equivalent support in the SC1200.
  *----------------------------------------------*/
 
-
 /*
 // ==========================================================================
 //
 //	TV standard
 */
 
-int gfx_get_tv_standard(unsigned long *p_standard)
+int
+gfx_get_tv_standard(unsigned long *p_standard)
 {
-	int retval = -1;
+   int retval = -1;
+
 #if GFX_TV_FS451
-	if (gfx_tv_type & GFX_TV_TYPE_FS451)
-		retval = fs450_get_tv_standard( p_standard);
-#endif 
-	return(retval);
+   if (gfx_tv_type & GFX_TV_TYPE_FS451)
+      retval = fs450_get_tv_standard(p_standard);
+#endif
+   return (retval);
 }
 
-int gfx_get_available_tv_standards(unsigned long *p_standards)
+int
+gfx_get_available_tv_standards(unsigned long *p_standards)
 {
-	int retval = -1;
+   int retval = -1;
+
 #if GFX_TV_FS451
-	if (gfx_tv_type & GFX_TV_TYPE_FS451)
-		retval = fs450_get_available_tv_standards( p_standards);
-#endif 
-	return(retval);
+   if (gfx_tv_type & GFX_TV_TYPE_FS451)
+      retval = fs450_get_available_tv_standards(p_standards);
+#endif
+   return (retval);
 }
 
-int gfx_set_tv_standard(unsigned long standard)
+int
+gfx_set_tv_standard(unsigned long standard)
 {
-	int retval = -1;
+   int retval = -1;
+
 #if GFX_TV_FS451
-	if (gfx_tv_type & GFX_TV_TYPE_FS451)
-		retval = fs450_set_tv_standard(standard);
-#endif 
-	return(retval);
+   if (gfx_tv_type & GFX_TV_TYPE_FS451)
+      retval = fs450_set_tv_standard(standard);
+#endif
+   return (retval);
 }
 
 /*
@@ -575,61 +623,70 @@ int gfx_set_tv_standard(unsigned long standard)
 //	vga mode as known by the driver
 */
 
-int gfx_get_tv_vga_mode(unsigned long *p_vga_mode)
+int
+gfx_get_tv_vga_mode(unsigned long *p_vga_mode)
 {
-	int retval = -1;
+   int retval = -1;
+
 #if GFX_TV_FS451
-	if (gfx_tv_type & GFX_TV_TYPE_FS451)
-		retval = fs450_get_tv_vga_mode(p_vga_mode);
-#endif 
-	return(retval);
+   if (gfx_tv_type & GFX_TV_TYPE_FS451)
+      retval = fs450_get_tv_vga_mode(p_vga_mode);
+#endif
+   return (retval);
 }
 
-int gfx_get_available_tv_vga_modes(unsigned long *p_vga_modes)
+int
+gfx_get_available_tv_vga_modes(unsigned long *p_vga_modes)
 {
-	int retval = -1;
+   int retval = -1;
+
 #if GFX_TV_FS451
-	if (gfx_tv_type & GFX_TV_TYPE_FS451)
-		retval = fs450_get_available_tv_vga_modes(p_vga_modes);
-#endif 
-	return(retval);
+   if (gfx_tv_type & GFX_TV_TYPE_FS451)
+      retval = fs450_get_available_tv_vga_modes(p_vga_modes);
+#endif
+   return (retval);
 }
 
-int gfx_set_tv_vga_mode(unsigned long vga_mode)
+int
+gfx_set_tv_vga_mode(unsigned long vga_mode)
 {
-	int retval = -1;
+   int retval = -1;
+
 #if GFX_TV_FS451
-	if (gfx_tv_type & GFX_TV_TYPE_FS451)
-		retval = fs450_set_tv_vga_mode(vga_mode);
-#endif 
-	return(retval);
+   if (gfx_tv_type & GFX_TV_TYPE_FS451)
+      retval = fs450_set_tv_vga_mode(vga_mode);
+#endif
+   return (retval);
 }
 
-
 /*
 // ==========================================================================
 //
 //	tvout mode
 */
 
-int gfx_get_tvout_mode(unsigned long *p_tvout_mode)
+int
+gfx_get_tvout_mode(unsigned long *p_tvout_mode)
 {
-	int retval = -1;
+   int retval = -1;
+
 #if GFX_TV_FS451
-	if (gfx_tv_type & GFX_TV_TYPE_FS451)
-		retval = fs450_get_tvout_mode(p_tvout_mode);
-#endif 
-	return(retval);
+   if (gfx_tv_type & GFX_TV_TYPE_FS451)
+      retval = fs450_get_tvout_mode(p_tvout_mode);
+#endif
+   return (retval);
 }
 
-int gfx_set_tvout_mode(unsigned long tvout_mode)
+int
+gfx_set_tvout_mode(unsigned long tvout_mode)
 {
-	int retval = -1;
+   int retval = -1;
+
 #if GFX_TV_FS451
-	if (gfx_tv_type & GFX_TV_TYPE_FS451)
-		retval = fs450_set_tvout_mode(tvout_mode);
-#endif 
-	return(retval);
+   if (gfx_tv_type & GFX_TV_TYPE_FS451)
+      retval = fs450_set_tvout_mode(tvout_mode);
+#endif
+   return (retval);
 }
 
 /*
@@ -637,25 +694,28 @@ int gfx_set_tvout_mode(unsigned long tvout_mode)
 //
 //	Sharpness
 */
-int gfx_get_sharpness(int *p_sharpness)
-
+int
+gfx_get_sharpness(int *p_sharpness)
 {
-	int retval = -1;
+   int retval = -1;
+
 #if GFX_TV_FS451
-	if (gfx_tv_type & GFX_TV_TYPE_FS451)
-		retval = fs450_get_sharpness(p_sharpness);
-#endif 
-	return(retval);
+   if (gfx_tv_type & GFX_TV_TYPE_FS451)
+      retval = fs450_get_sharpness(p_sharpness);
+#endif
+   return (retval);
 }
 
-int gfx_set_sharpness(int sharpness)
+int
+gfx_set_sharpness(int sharpness)
 {
-	int retval = -1;
+   int retval = -1;
+
 #if GFX_TV_FS451
-	if (gfx_tv_type & GFX_TV_TYPE_FS451)
-		retval = fs450_set_sharpness(sharpness);
-#endif 
-	return(retval);
+   if (gfx_tv_type & GFX_TV_TYPE_FS451)
+      retval = fs450_set_sharpness(sharpness);
+#endif
+   return (retval);
 }
 
 /*
@@ -664,25 +724,28 @@ int gfx_set_sharpness(int sharpness)
 // flicker filter control.
 */
 
-int gfx_get_flicker_filter(int *p_flicker)
-
+int
+gfx_get_flicker_filter(int *p_flicker)
 {
-	int retval = -1;
+   int retval = -1;
+
 #if GFX_TV_FS451
-	if (gfx_tv_type & GFX_TV_TYPE_FS451)
-		retval = fs450_get_flicker_filter(p_flicker);
-#endif 
-	return(retval);
+   if (gfx_tv_type & GFX_TV_TYPE_FS451)
+      retval = fs450_get_flicker_filter(p_flicker);
+#endif
+   return (retval);
 }
 
-int gfx_set_flicker_filter(int flicker)
+int
+gfx_set_flicker_filter(int flicker)
 {
-	int retval = -1;
+   int retval = -1;
+
 #if GFX_TV_FS451
-	if (gfx_tv_type & GFX_TV_TYPE_FS451)
-		retval = fs450_set_flicker_filter(flicker);
-#endif 
-	return(retval);
+   if (gfx_tv_type & GFX_TV_TYPE_FS451)
+      retval = fs450_set_flicker_filter(flicker);
+#endif
+   return (retval);
 }
 
 /*
@@ -691,45 +754,53 @@ int gfx_set_flicker_filter(int flicker)
 //	Overscan and Position
 */
 
-int gfx_get_overscan(int *p_x, int *p_y)
+int
+gfx_get_overscan(int *p_x, int *p_y)
 {
-	int retval = -1;
+   int retval = -1;
+
 #if GFX_TV_FS451
-	if (gfx_tv_type & GFX_TV_TYPE_FS451)
-		retval = fs450_get_overscan(p_x, p_y);
-#endif 
-	return(retval);
+   if (gfx_tv_type & GFX_TV_TYPE_FS451)
+      retval = fs450_get_overscan(p_x, p_y);
+#endif
+   return (retval);
 
 }
-                           
-int gfx_set_overscan(int x, int y)
+
+int
+gfx_set_overscan(int x, int y)
 {
-	int retval = -1;
+   int retval = -1;
+
 #if GFX_TV_FS451
-	if (gfx_tv_type & GFX_TV_TYPE_FS451)
-		retval = fs450_set_overscan(x, y);
-#endif 
-	return(retval);
+   if (gfx_tv_type & GFX_TV_TYPE_FS451)
+      retval = fs450_set_overscan(x, y);
+#endif
+   return (retval);
 }
 
-int gfx_get_position(int *p_x, int *p_y)
+int
+gfx_get_position(int *p_x, int *p_y)
 {
-	int retval = -1;
+   int retval = -1;
+
 #if GFX_TV_FS451
-	if (gfx_tv_type & GFX_TV_TYPE_FS451)
-		retval = fs450_get_position(p_x, p_y);
-#endif 
-	return(retval);
+   if (gfx_tv_type & GFX_TV_TYPE_FS451)
+      retval = fs450_get_position(p_x, p_y);
+#endif
+   return (retval);
 }
 
-int gfx_set_position(int x, int y)
+int
+gfx_set_position(int x, int y)
 {
-	int retval = -1;
+   int retval = -1;
+
 #if GFX_TV_FS451
-	if (gfx_tv_type & GFX_TV_TYPE_FS451)
-		retval = fs450_set_position(x, y);
-#endif 
-	return(retval);
+   if (gfx_tv_type & GFX_TV_TYPE_FS451)
+      retval = fs450_set_position(x, y);
+#endif
+   return (retval);
 }
 
 /*
@@ -738,65 +809,76 @@ int gfx_set_position(int x, int y)
 //	Color, Brightness, and Contrast
 */
 
-int gfx_get_color(int *p_color)
+int
+gfx_get_color(int *p_color)
 {
-	int retval = -1;
+   int retval = -1;
+
 #if GFX_TV_FS451
-	if (gfx_tv_type & GFX_TV_TYPE_FS451)
-		retval = fs450_get_color(p_color);
-#endif 
-	return(retval);
+   if (gfx_tv_type & GFX_TV_TYPE_FS451)
+      retval = fs450_get_color(p_color);
+#endif
+   return (retval);
 }
 
-int gfx_set_color(int color)
+int
+gfx_set_color(int color)
 {
-	int retval = -1;
+   int retval = -1;
+
 #if GFX_TV_FS451
-	if (gfx_tv_type & GFX_TV_TYPE_FS451)
-		retval = fs450_set_color(color);
-#endif 
-	return(retval);
+   if (gfx_tv_type & GFX_TV_TYPE_FS451)
+      retval = fs450_set_color(color);
+#endif
+   return (retval);
 }
 
-int gfx_get_brightness(int *p_brightness)
-
+int
+gfx_get_brightness(int *p_brightness)
 {
-	int retval = -1;
+   int retval = -1;
+
 #if GFX_TV_FS451
-	if (gfx_tv_type & GFX_TV_TYPE_FS451)
-		retval = fs450_get_brightness(p_brightness);
-#endif 
-	return(retval);
+   if (gfx_tv_type & GFX_TV_TYPE_FS451)
+      retval = fs450_get_brightness(p_brightness);
+#endif
+   return (retval);
 }
 
-int gfx_set_brightness(int brightness)
+int
+gfx_set_brightness(int brightness)
 {
-	int retval = -1;
+   int retval = -1;
+
 #if GFX_TV_FS451
-	if (gfx_tv_type & GFX_TV_TYPE_FS451)
-		retval = fs450_set_brightness(brightness);
-#endif 
-	return(retval);
+   if (gfx_tv_type & GFX_TV_TYPE_FS451)
+      retval = fs450_set_brightness(brightness);
+#endif
+   return (retval);
 }
 
-int gfx_get_contrast(int *p_contrast)
+int
+gfx_get_contrast(int *p_contrast)
 {
-	int retval = -1;
+   int retval = -1;
+
 #if GFX_TV_FS451
-	if (gfx_tv_type & GFX_TV_TYPE_FS451)
-		retval = fs450_get_contrast(p_contrast);
-#endif 
-	return(retval);
+   if (gfx_tv_type & GFX_TV_TYPE_FS451)
+      retval = fs450_get_contrast(p_contrast);
+#endif
+   return (retval);
 }
 
-int gfx_set_contrast(int contrast)
+int
+gfx_set_contrast(int contrast)
 {
-	int retval = -1;
+   int retval = -1;
+
 #if GFX_TV_FS451
-	if (gfx_tv_type & GFX_TV_TYPE_FS451)
-		retval = fs450_set_contrast(contrast);
-#endif 
-	return(retval);
+   if (gfx_tv_type & GFX_TV_TYPE_FS451)
+      retval = fs450_set_contrast(contrast);
+#endif
+   return (retval);
 }
 
 /*
@@ -805,44 +887,52 @@ int gfx_set_contrast(int contrast)
 //	YC filters
 */
 
-int gfx_get_yc_filter(unsigned int *p_yc_filter)
+int
+gfx_get_yc_filter(unsigned int *p_yc_filter)
 {
-	int retval = -1;
+   int retval = -1;
+
 #if GFX_TV_FS451
-	if (gfx_tv_type & GFX_TV_TYPE_FS451)
-		retval = fs450_get_yc_filter(p_yc_filter);
-#endif 
-	return(retval);
+   if (gfx_tv_type & GFX_TV_TYPE_FS451)
+      retval = fs450_get_yc_filter(p_yc_filter);
+#endif
+   return (retval);
 }
 
-int gfx_set_yc_filter(unsigned int yc_filter)
+int
+gfx_set_yc_filter(unsigned int yc_filter)
 {
-	int retval = -1;
+   int retval = -1;
+
 #if GFX_TV_FS451
-	if (gfx_tv_type & GFX_TV_TYPE_FS451)
-		retval = fs450_set_yc_filter(yc_filter);
-#endif 
-	return(retval);
+   if (gfx_tv_type & GFX_TV_TYPE_FS451)
+      retval = fs450_set_yc_filter(yc_filter);
+#endif
+   return (retval);
 }
 
-int gfx_get_aps_trigger_bits(unsigned int *p_trigger_bits)
+int
+gfx_get_aps_trigger_bits(unsigned int *p_trigger_bits)
 {
-	int retval = -1;
+   int retval = -1;
+
 #if GFX_TV_FS451
-	if (gfx_tv_type & GFX_TV_TYPE_FS451)
-		retval = fs450_get_aps_trigger_bits(p_trigger_bits);
-#endif 
-	return(retval);
+   if (gfx_tv_type & GFX_TV_TYPE_FS451)
+      retval = fs450_get_aps_trigger_bits(p_trigger_bits);
+#endif
+   return (retval);
 }
 
-int gfx_set_aps_trigger_bits(unsigned int trigger_bits)
+int
+gfx_set_aps_trigger_bits(unsigned int trigger_bits)
 {
-	int retval = -1;
+   int retval = -1;
+
 #if GFX_TV_FS451
-	if (gfx_tv_type & GFX_TV_TYPE_FS451)
-		retval = fs450_set_aps_trigger_bits(trigger_bits);
-#endif 
-	return(retval);
+   if (gfx_tv_type & GFX_TV_TYPE_FS451)
+      retval = fs450_set_aps_trigger_bits(trigger_bits);
+#endif
+   return (retval);
 }
 
 #endif /* GFX_TV_DYNAMIC */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/gfx_tv.h b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/gfx_tv.h
new file mode 100644
index 000000000..430c8a5f9
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/gfx_tv.h
@@ -0,0 +1,60 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/gfx_tv.h,v 1.1 2002/12/10 15:12:26 alanh Exp $ */
+
+typedef struct tagTVDISPLAYMODE
+{
+   /* DISPLAY MODE FLAGS */
+   /* Specify valid color depths and the refresh rate. */
+
+   unsigned short flags;
+
+   /* TIMINGS */
+
+   unsigned short hactive;
+   unsigned short hblankstart;
+   unsigned short hsyncstart;
+   unsigned short hsyncend;
+   unsigned short hblankend;
+   unsigned short htotal;
+
+   unsigned short vactive;
+   unsigned short vblankstart;
+   unsigned short vsyncstart;
+   unsigned short vsyncend;
+   unsigned short vblankend;
+   unsigned short vtotal;
+
+   /* CLOCK FREQUENCY */
+
+   unsigned long frequency;
+
+}
+TVDISPLAYMODE;
+
+TVDISPLAYMODE TVTimings[] = {
+
+/* NTSC resolution    */
+   {
+    0x3,				/* negative syncs     */
+    0x0280, 0x0280, 0x0290, 0x02E8, 0x0318, 0x0318,	/* horizontal timings */
+    0x01E0, 0x01E0, 0x01EA, 0x01EC, 0x0205, 0x020D,	/* vertical timings   */
+    0x0018EC4D,				/* freq = 24.923052 MHz  */
+    },
+
+/* PAL resolution     */
+   {
+    0x3,				/* positive syncs     */
+    0x0300, 0x0300, 0x0320, 0x0350, 0x0360, 0x0360,	/* horizontal timings */
+    0x0240, 0x0240, 0x024A, 0x024C, 0x0271, 0x0271,	/* vertical timings   */
+    0x001B0000,				/* freq = 27.00 MHz   */
+    },
+
+/* PAL resolution non-square pixels */
+   {
+    0x3,				/* positive syncs     */
+    0x02C0, 0x02C0, 0x02F0, 0x0330, 0x0360, 0x0360,	/* horizontal timings */
+    0x0240, 0x0240, 0x024A, 0x024C, 0x0271, 0x0271,	/* vertical timings   */
+    0x001B0000,				/* freq = 27.00 MHz   */
+    }
+};
+
+#define NUM_TV_MODES sizeof(TVTimings)/sizeof(TVDISPLAYMODE)
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/gfx_type.h b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/gfx_type.h
index 73094ee3f..a50d5bd7c 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/gfx_type.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/gfx_type.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/gfx_type.h,v 1.1 2002/10/11 14:33:00 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/gfx_type.h,v 1.1 2002/12/10 15:12:26 alanh Exp $ */
 /*
  * $Workfile: gfx_type.h $
  *
@@ -129,30 +129,37 @@
  *
  * END_NSC_LIC_GPL */
 
-
 #ifndef _gfx_type_h
 #define _gfx_type_h
 
 /* MSR DEFINITIONS */
 
-typedef enum DevStatus { FOUND, NOT_KNOWN, REQ_NOT_FOUND, REQ_NOT_INSTALLED } DEV_STATUS;
-
-typedef struct msr {
-	DEV_STATUS Present;		   /* Node enumeration status                              */
-	unsigned char Id;		   /* Device ID (from MSR specs)                           */
-	unsigned long Address;	   /* Address - 32-bit MBus address at which 'Id' is found */
-} MSR;
-
-typedef struct mValue {
-	unsigned long high;
-	unsigned long low;
-} Q_WORD;
-
-typedef struct mbusNode {
-	unsigned long address;
-	unsigned int  deviceId;
-	unsigned int  claimed;
-} MBUS_NODE;
+typedef enum DevStatus
+{ FOUND, NOT_KNOWN, REQ_NOT_FOUND, REQ_NOT_INSTALLED }
+DEV_STATUS;
+
+typedef struct msr
+{
+   DEV_STATUS Present;			/* Node enumeration status                              */
+   unsigned char Id;			/* Device ID (from MSR specs)                           */
+   unsigned long Address;		/* Address - 32-bit MBus address at which 'Id' is found */
+}
+MSR;
+
+typedef struct mValue
+{
+   unsigned long high;
+   unsigned long low;
+}
+Q_WORD;
+
+typedef struct mbusNode
+{
+   unsigned long address;
+   unsigned int deviceId;
+   unsigned int claimed;
+}
+MBUS_NODE;
 
 /* MSR ARRAY INDEXES */
 /* These are indexes into the array of MBus devices. These     */
@@ -177,7 +184,7 @@ typedef struct mbusNode {
 #define CP_ID_ACC 	0x0F
 #define CP_ID_USB1	0x10
 #define CP_ID_MCP 	0x11
- 
+
 /* MBUS DEVICE CLASS CODES */
 /* These are the device ids for the known Redcloud MBus devices. */
 
@@ -221,18 +228,21 @@ typedef struct mbusNode {
 #define CRC_SOURCE_CRT_RGB   0x01
 #define CRC_SOURCE_FP_DATA   0x02
 
-
 /* TV DEFINITIONS */
 
-typedef enum TVStandardType {
-	TV_STANDARD_NTSC = 1,
-    TV_STANDARD_PAL
-} TVStandardType;
+typedef enum TVStandardType
+{
+   TV_STANDARD_NTSC = 1,
+   TV_STANDARD_PAL
+}
+TVStandardType;
 
-typedef enum GfxOnTVType {
-	GFX_ON_TV_SQUARE_PIXELS = 1,
-	GFX_ON_TV_NO_SCALING
-} GfxOnTVType;
+typedef enum GfxOnTVType
+{
+   GFX_ON_TV_SQUARE_PIXELS = 1,
+   GFX_ON_TV_NO_SCALING
+}
+GfxOnTVType;
 
 #define CRT_DISABLE 0x00
 #define CRT_ENABLE  0x01
@@ -291,15 +301,19 @@ typedef enum GfxOnTVType {
 #define VIDEO_DOWNSCALE_KEEP_1_OF 0x1
 #define VIDEO_DOWNSCALE_DROP_1_OF 0x2
 
-typedef enum VideoSourceType { /* The source from which the video processor shows full screen video */
-	VIDEO_SOURCE_MEMORY = 1,
-	VIDEO_SOURCE_DVIP
-} VideoSourceType;
+typedef enum VideoSourceType
+{/* The source from which the video processor shows full screen video */
+   VIDEO_SOURCE_MEMORY = 1,
+   VIDEO_SOURCE_DVIP
+}
+VideoSourceType;
 
-typedef enum VbiSourceType { /* The source from which the video processor takes VBI */
-	VBI_SOURCE_MEMORY = 1,
-	VBI_SOURCE_DVIP
-} VbiSourceType;
+typedef enum VbiSourceType
+{/* The source from which the video processor takes VBI */
+   VBI_SOURCE_MEMORY = 1,
+   VBI_SOURCE_DVIP
+}
+VbiSourceType;
 
 /* GENLOCK DEFINITIONS */
 
@@ -375,15 +389,17 @@ typedef enum VbiSourceType { /* The source from which the video processor takes
 #define GFX_APS_TRIGGER_AGC_2_LINE 2
 #define GFX_APS_TRIGGER_AGC_4_LINE 3
 
-typedef struct {
-	int xsize;
-	int ysize;
-	int hz;
-	int clock;
-	unsigned char miscOutput;
-	unsigned char stdCRTCregs[GFX_STD_CRTC_REGS];
-	unsigned char extCRTCregs[GFX_EXT_CRTC_REGS];
-} gfx_vga_struct;
+typedef struct
+{
+   int xsize;
+   int ysize;
+   int hz;
+   int clock;
+   unsigned char miscOutput;
+   unsigned char stdCRTCregs[GFX_STD_CRTC_REGS];
+   unsigned char extCRTCregs[GFX_EXT_CRTC_REGS];
+}
+gfx_vga_struct;
 
 /* POSSIBLE STATUS VALUES */
 
@@ -397,8 +413,7 @@ typedef struct {
 #define GFX_CPU_GXLV		1
 #define GFX_CPU_SC1200		2
 #define GFX_CPU_REDCLOUD    3
-#define GFX_CPU_PYRAMID		0x20801	
-	
+#define GFX_CPU_PYRAMID		0x20801
 
 #define GFX_VID_CS5530		1
 #define GFX_VID_SC1200		2
@@ -406,17 +421,19 @@ typedef struct {
 
 /* CHIP NAME AND REVISION */
 
-typedef enum ChipType {
-	CHIP_NOT_DETECTED,
-	SC1200_REV_A,
-	SC1200_REV_B1_B2,
-	SC1200_REV_B3,
-	SC1200_REV_C1,
-	SC1200_REV_D1,
-	SC1200_REV_D1_1,
-	SC1200_REV_D2_MVD,	/* Macrovision disabled */
-	SC1200_REV_D2_MVE,	/* Macrovision enabled  */
-	SC1200_FUTURE_REV
-} ChipType;
+typedef enum ChipType
+{
+   CHIP_NOT_DETECTED,
+   SC1200_REV_A,
+   SC1200_REV_B1_B2,
+   SC1200_REV_B3,
+   SC1200_REV_C1,
+   SC1200_REV_D1,
+   SC1200_REV_D1_1,
+   SC1200_REV_D2_MVD,			/* Macrovision disabled */
+   SC1200_REV_D2_MVE,			/* Macrovision enabled  */
+   SC1200_FUTURE_REV
+}
+ChipType;
 
 #endif /* !_gfx_type_h */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/gfx_vga.c b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/gfx_vga.c
index b5b5e3fef..a2c0dd648 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/gfx_vga.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/gfx_vga.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/gfx_vga.c,v 1.1 2002/10/11 14:33:00 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/gfx_vga.c,v 1.1 2002/12/10 15:12:26 alanh Exp $ */
 /*
  * $Workfile: gfx_vga.c $
  *
@@ -130,7 +130,6 @@
  *
  * END_NSC_LIC_GPL */
 
-
 /* INCLUDE SUPPORT FOR FIRST GENERATION, IF SPECIFIED. */
 
 #if GFX_VGA_GU1
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/gfx_vid.c b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/gfx_vid.c
index ea7aa829c..9ddde27ee 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/gfx_vid.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/gfx_vid.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/gfx_vid.c,v 1.2 2002/10/18 20:02:40 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/gfx_vid.c,v 1.1 2002/12/10 15:12:26 alanh Exp $ */
 /*
  * $Workfile: gfx_vid.c $
  *
@@ -225,21 +225,21 @@
 /* STATIC VARIABLES FOR VIDEO OVERLAY CONTROL */
 /* These are saved to allow these routines to do clipping. */
 
-unsigned long gfx_vid_offset = 0;   /* copy from last gfx_set_video_offset */
-unsigned long gfx_vid_uoffset = 0;  /* copy from last gfx_set_video_yuv_offsets */
-unsigned long gfx_vid_voffset = 0;  /* copy from last gfx_set_video_yuv_offsets */
-unsigned long gfx_vid_srcw = 300;   /* copy from last gfx_set_video_scale  */
+unsigned long gfx_vid_offset = 0;	/* copy from last gfx_set_video_offset */
+unsigned long gfx_vid_uoffset = 0;	/* copy from last gfx_set_video_yuv_offsets */
+unsigned long gfx_vid_voffset = 0;	/* copy from last gfx_set_video_yuv_offsets */
+unsigned long gfx_vid_srcw = 300;	/* copy from last gfx_set_video_scale  */
 unsigned long gfx_vid_srch = 300;	/* copy from last gfx_set_video_scale  */
 unsigned long gfx_vid_dstw = 300;	/* copy from last gfx_set_video_scale  */
 unsigned long gfx_vid_dsth = 300;	/* copy from last gfx_set_video_scale  */
-short gfx_vid_xpos = 0;				/* copy from last gfx_set_video_window */
-short gfx_vid_ypos = 0;				/* copy from last gfx_set_video_window */
+short gfx_vid_xpos = 0;			/* copy from last gfx_set_video_window */
+short gfx_vid_ypos = 0;			/* copy from last gfx_set_video_window */
 unsigned short gfx_vid_width = 0;	/* copy from last gfx_set_video_window */
 unsigned short gfx_vid_height = 0;	/* copy from last gfx_set_video_window */
 
-int gfx_alpha_select = 0;			/* currently selected alpha region */
+int gfx_alpha_select = 0;		/* currently selected alpha region */
 
-int gfx_set_screen_enable(int enable);  /* forward declaration */
+int gfx_set_screen_enable(int enable);	/* forward declaration */
 
 /* INCLUDE SUPPORT FOR CS5530, IF SPECIFIED. */
 
@@ -267,12 +267,14 @@ int gfx_set_screen_enable(int enable);  /* forward declaration */
  * so valid parameter values are 0..2.
  *---------------------------------------------------------------------------
  */
-int gfx_select_alpha_region(int region)
+int
+gfx_select_alpha_region(int region)
 {
-	if (region > 2) return(GFX_STATUS_BAD_PARAMETER);
-	
-	gfx_alpha_select = region;
-	return(GFX_STATUS_OK);
+   if (region > 2)
+      return (GFX_STATUS_BAD_PARAMETER);
+
+   gfx_alpha_select = region;
+   return (GFX_STATUS_OK);
 }
 
 /* WRAPPERS IF DYNAMIC SELECTION */
@@ -287,19 +289,20 @@ int gfx_select_alpha_region(int region)
  * performing a mode switch.
  *---------------------------------------------------------------------------
  */
-void gfx_reset_video(void)
+void
+gfx_reset_video(void)
 {
 #	if GFX_VIDEO_CS5530
-	if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
-		cs5530_reset_video();
+   if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
+      cs5530_reset_video();
 #	endif
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		sc1200_reset_video();
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      sc1200_reset_video();
 #	endif
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		redcloud_reset_video();
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      redcloud_reset_video();
 #	endif
 }
 
@@ -309,41 +312,44 @@ void gfx_reset_video(void)
  * This routine is used to configure the display output during a modeset
  *---------------------------------------------------------------------------
  */
-int gfx_set_display_control(int sync_polarities)
+int
+gfx_set_display_control(int sync_polarities)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIDEO_CS5530
-	if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
-		status = cs5530_set_display_control(sync_polarities);
+   if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
+      status = cs5530_set_display_control(sync_polarities);
 #	endif
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		status = sc1200_set_display_control(sync_polarities);
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      status = sc1200_set_display_control(sync_polarities);
 #	endif
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		status = redcloud_set_display_control(sync_polarities);
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      status = redcloud_set_display_control(sync_polarities);
 #	endif
-	return (status);
+   return (status);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_set_clock_frequency
  *-----------------------------------------------------------------------------
  */
-void gfx_set_clock_frequency(unsigned long frequency)
+void
+gfx_set_clock_frequency(unsigned long frequency)
 {
 #	if GFX_VIDEO_CS5530
-	if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
-		cs5530_set_clock_frequency(frequency);
+   if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
+      cs5530_set_clock_frequency(frequency);
 #	endif
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		sc1200_set_clock_frequency(frequency);
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      sc1200_set_clock_frequency(frequency);
 #	endif
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		redcloud_set_clock_frequency(frequency);
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      redcloud_set_clock_frequency(frequency);
 #	endif
 }
 
@@ -351,44 +357,48 @@ void gfx_set_clock_frequency(unsigned long frequency)
  * gfx_set_crt_enable
  *-----------------------------------------------------------------------------
  */
-int gfx_set_crt_enable(int enable)
+int
+gfx_set_crt_enable(int enable)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		status = sc1200_set_crt_enable(enable);
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      status = sc1200_set_crt_enable(enable);
 #	endif
 #	if GFX_VIDEO_CS5530
-	if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
-		status = cs5530_set_crt_enable(enable);
+   if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
+      status = cs5530_set_crt_enable(enable);
 #	endif
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		status = redcloud_set_crt_enable(enable);
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      status = redcloud_set_crt_enable(enable);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_set_video_enable
  *-----------------------------------------------------------------------------
  */
-int gfx_set_video_enable(int enable)
+int
+gfx_set_video_enable(int enable)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIDEO_CS5530
-	if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
-		status = cs5530_set_video_enable(enable);
+   if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
+      status = cs5530_set_video_enable(enable);
 #	endif
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		status = sc1200_set_video_enable(enable);
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      status = sc1200_set_video_enable(enable);
 #	endif
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		status = redcloud_set_video_enable(enable);
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      status = redcloud_set_video_enable(enable);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*---------------------------------------------------------------------------
@@ -397,172 +407,191 @@ int gfx_set_video_enable(int enable)
  * This routine enables or disables the graphics display logic of the video processor.
  *---------------------------------------------------------------------------
  */
-int gfx_set_screen_enable(int enable)
+int
+gfx_set_screen_enable(int enable)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		status = sc1200_set_screen_enable(enable);
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      status = sc1200_set_screen_enable(enable);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_set_video_format
  *-----------------------------------------------------------------------------
  */
-int gfx_set_video_format(unsigned long format)
+int
+gfx_set_video_format(unsigned long format)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIDEO_CS5530
-	if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
-		status = cs5530_set_video_format(format);
+   if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
+      status = cs5530_set_video_format(format);
 #	endif
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		status = sc1200_set_video_format(format);
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      status = sc1200_set_video_format(format);
 #	endif
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		status = redcloud_set_video_format(format);
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      status = redcloud_set_video_format(format);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_set_video_size
  *-----------------------------------------------------------------------------
  */
-int gfx_set_video_size(unsigned short width, unsigned short height)
+int
+gfx_set_video_size(unsigned short width, unsigned short height)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIDEO_CS5530
-	if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
-		status = cs5530_set_video_size(width, height);
+   if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
+      status = cs5530_set_video_size(width, height);
 #	endif
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		status = sc1200_set_video_size(width, height);
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      status = sc1200_set_video_size(width, height);
 #	endif
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		status = redcloud_set_video_size(width, height);
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      status = redcloud_set_video_size(width, height);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_set_video_yuv_pitch
  *-----------------------------------------------------------------------------
  */
-int gfx_set_video_yuv_pitch(unsigned long ypitch, unsigned long uvpitch)
+int
+gfx_set_video_yuv_pitch(unsigned long ypitch, unsigned long uvpitch)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		status = redcloud_set_video_yuv_pitch (ypitch, uvpitch);
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      status = redcloud_set_video_yuv_pitch(ypitch, uvpitch);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_set_video_offset
  *-----------------------------------------------------------------------------
  */
-int gfx_set_video_offset(unsigned long offset)
+int
+gfx_set_video_offset(unsigned long offset)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIDEO_CS5530
-	if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
-		status = cs5530_set_video_offset(offset);
+   if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
+      status = cs5530_set_video_offset(offset);
 #	endif
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		status = sc1200_set_video_offset(offset);
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      status = sc1200_set_video_offset(offset);
 #	endif
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		status = redcloud_set_video_offset(offset);
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      status = redcloud_set_video_offset(offset);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_set_video_yuv_offsets
  *-----------------------------------------------------------------------------
  */
-int gfx_set_video_yuv_offsets(unsigned long yoffset, unsigned long uoffset,
-							  unsigned long voffset)
+int
+gfx_set_video_yuv_offsets(unsigned long yoffset, unsigned long uoffset,
+			  unsigned long voffset)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		status = redcloud_set_video_yuv_offsets (yoffset, uoffset, voffset);
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      status = redcloud_set_video_yuv_offsets(yoffset, uoffset, voffset);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_set_video_scale
  *---------------------------------------------------------------------------
  */
-int gfx_set_video_scale(unsigned short srcw, unsigned short srch, 
-	unsigned short dstw, unsigned short dsth)
+int
+gfx_set_video_scale(unsigned short srcw, unsigned short srch,
+		    unsigned short dstw, unsigned short dsth)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIDEO_CS5530
-	if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
-		status = cs5530_set_video_scale(srcw, srch, dstw, dsth);
+   if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
+      status = cs5530_set_video_scale(srcw, srch, dstw, dsth);
 #	endif
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		status = sc1200_set_video_scale(srcw, srch, dstw, dsth);
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      status = sc1200_set_video_scale(srcw, srch, dstw, dsth);
 #	endif
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		status = redcloud_set_video_scale(srcw, srch, dstw, dsth);
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      status = redcloud_set_video_scale(srcw, srch, dstw, dsth);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_set_video_upscale
  *---------------------------------------------------------------------------
  */
-int gfx_set_video_upscale(unsigned short srcw, unsigned short srch, 
-	unsigned short dstw, unsigned short dsth)
+int
+gfx_set_video_upscale(unsigned short srcw, unsigned short srch,
+		      unsigned short dstw, unsigned short dsth)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		status = sc1200_set_video_upscale(srcw, srch, dstw, dsth);
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      status = sc1200_set_video_upscale(srcw, srch, dstw, dsth);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_set_video_vertical_downscale
  *---------------------------------------------------------------------------
  */
-int gfx_set_video_vertical_downscale(unsigned short srch, unsigned short dsth)
+int
+gfx_set_video_vertical_downscale(unsigned short srch, unsigned short dsth)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		status = redcloud_set_video_vertical_downscale(srch, dsth);
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      status = redcloud_set_video_vertical_downscale(srch, dsth);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_set_video_vertical_downscale_enable
  *---------------------------------------------------------------------------
  */
-void gfx_set_video_vertical_downscale_enable(int enable)
+void
+gfx_set_video_vertical_downscale_enable(int enable)
 {
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		redcloud_set_video_vertical_downscale_enable(enable);
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      redcloud_set_video_vertical_downscale_enable(enable);
 #	endif
 }
 
@@ -570,575 +599,653 @@ void gfx_set_video_vertical_downscale_enable(int enable)
  * gfx_set_video_downscale_config
  *---------------------------------------------------------------------------
  */
-int gfx_set_video_downscale_config(unsigned short type, unsigned short m)
+int
+gfx_set_video_downscale_config(unsigned short type, unsigned short m)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		status = sc1200_set_video_downscale_config(type, m);
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      status = sc1200_set_video_downscale_config(type, m);
 #	endif
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		status = redcloud_set_video_downscale_config(type, m);
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      status = redcloud_set_video_downscale_config(type, m);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_set_video_downscale_coefficients
  *---------------------------------------------------------------------------
  */
-int gfx_set_video_downscale_coefficients(unsigned short coef1, unsigned short coef2,
-										 unsigned short coef3, unsigned short coef4)
+int
+gfx_set_video_downscale_coefficients(unsigned short coef1,
+				     unsigned short coef2,
+				     unsigned short coef3,
+				     unsigned short coef4)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		status = sc1200_set_video_downscale_coefficients(coef1, coef2, coef3, coef4);
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      status =
+	    sc1200_set_video_downscale_coefficients(coef1, coef2, coef3,
+						    coef4);
 #	endif
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		status = redcloud_set_video_downscale_coefficients(coef1, coef2, coef3, coef4);
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      status =
+	    redcloud_set_video_downscale_coefficients(coef1, coef2, coef3,
+						      coef4);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_set_video_downscale_enable
  *---------------------------------------------------------------------------
  */
-int gfx_set_video_downscale_enable(int enable)
+int
+gfx_set_video_downscale_enable(int enable)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		status = sc1200_set_video_downscale_enable(enable);
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      status = sc1200_set_video_downscale_enable(enable);
 #	endif
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		status = redcloud_set_video_downscale_enable(enable);
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      status = redcloud_set_video_downscale_enable(enable);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_set_video_window
  *---------------------------------------------------------------------------
  */
-int gfx_set_video_window(short x, short y, unsigned short w, unsigned short h)
+int
+gfx_set_video_window(short x, short y, unsigned short w, unsigned short h)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIDEO_CS5530
-	if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
-		status = cs5530_set_video_window(x, y, w, h);
+   if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
+      status = cs5530_set_video_window(x, y, w, h);
 #	endif
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		status = sc1200_set_video_window(x, y, w, h);
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      status = sc1200_set_video_window(x, y, w, h);
 #	endif
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		status = redcloud_set_video_window(x, y, w, h);
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      status = redcloud_set_video_window(x, y, w, h);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_set_video_left_crop
  *---------------------------------------------------------------------------
  */
-int gfx_set_video_left_crop(unsigned short x)
+int
+gfx_set_video_left_crop(unsigned short x)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		status = sc1200_set_video_left_crop(x);
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      status = sc1200_set_video_left_crop(x);
+#	endif
+#	if GFX_VIDEO_CS5530
+   if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
+      status = cs5530_set_video_left_crop(x);
 #	endif
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		status = redcloud_set_video_left_crop(x);
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      status = redcloud_set_video_left_crop(x);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_set_video_color_key
  *---------------------------------------------------------------------------
  */
-int gfx_set_video_color_key(unsigned long key, unsigned long mask, 
-	int graphics)
+int
+gfx_set_video_color_key(unsigned long key, unsigned long mask, int graphics)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIDEO_CS5530
-	if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
-		status = cs5530_set_video_color_key(key, mask, graphics);
+   if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
+      status = cs5530_set_video_color_key(key, mask, graphics);
 #	endif
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		status = sc1200_set_video_color_key(key, mask, graphics);
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      status = sc1200_set_video_color_key(key, mask, graphics);
 #	endif
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		status = redcloud_set_video_color_key(key, mask, graphics);
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      status = redcloud_set_video_color_key(key, mask, graphics);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_set_video_filter
  *---------------------------------------------------------------------------
  */
-int gfx_set_video_filter(int xfilter, int yfilter)
+int
+gfx_set_video_filter(int xfilter, int yfilter)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIDEO_CS5530
-	if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
-		status = cs5530_set_video_filter(xfilter, yfilter);
+   if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
+      status = cs5530_set_video_filter(xfilter, yfilter);
 #	endif
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		status = sc1200_set_video_filter(xfilter, yfilter);
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      status = sc1200_set_video_filter(xfilter, yfilter);
 #	endif
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		status = redcloud_set_video_filter(xfilter, yfilter);
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      status = redcloud_set_video_filter(xfilter, yfilter);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_set_video_palette
  *---------------------------------------------------------------------------
  */
-int gfx_set_video_palette(unsigned long *palette)
+int
+gfx_set_video_palette(unsigned long *palette)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIDEO_CS5530
-	if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
-		status = cs5530_set_video_palette(palette);
+   if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
+      status = cs5530_set_video_palette(palette);
 #	endif
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		status = sc1200_set_video_palette(palette);
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      status = sc1200_set_video_palette(palette);
 #	endif
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		status = redcloud_set_video_palette(palette);
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      status = redcloud_set_video_palette(palette);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_set_video_palette_entry
  *---------------------------------------------------------------------------
  */
-int gfx_set_video_palette_entry(unsigned long index, unsigned long palette)
+int
+gfx_set_video_palette_entry(unsigned long index, unsigned long palette)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIDEO_CS5530
-	if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
-		status = cs5530_set_video_palette_entry(index, palette);
+   if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
+      status = cs5530_set_video_palette_entry(index, palette);
 #	endif
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		status = sc1200_set_video_palette_entry(index, palette);
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      status = sc1200_set_video_palette_entry(index, palette);
 #	endif
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		status = redcloud_set_video_palette_entry(index, palette);
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      status = redcloud_set_video_palette_entry(index, palette);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_set_video_request
  *---------------------------------------------------------------------------
  */
-int gfx_set_video_request(short x, short y)
+int
+gfx_set_video_request(short x, short y)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		status = sc1200_set_video_request(x, y);
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      status = sc1200_set_video_request(x, y);
 #	endif
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		status = redcloud_set_video_request(x, y);
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      status = redcloud_set_video_request(x, y);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_set_video_source
  *---------------------------------------------------------------------------
  */
-int gfx_set_video_source(VideoSourceType source)
+int
+gfx_set_video_source(VideoSourceType source)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		status = sc1200_set_video_source(source);
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      status = sc1200_set_video_source(source);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_set_vbi_source
  *---------------------------------------------------------------------------
  */
-int gfx_set_vbi_source(VbiSourceType source)
+int
+gfx_set_vbi_source(VbiSourceType source)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		status = sc1200_set_vbi_source(source);
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      status = sc1200_set_vbi_source(source);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_set_vbi_lines
  *---------------------------------------------------------------------------
  */
-int gfx_set_vbi_lines(unsigned long even, unsigned long odd)
+int
+gfx_set_vbi_lines(unsigned long even, unsigned long odd)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		status = sc1200_set_vbi_lines(even, odd);
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      status = sc1200_set_vbi_lines(even, odd);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_set_vbi_total
  *---------------------------------------------------------------------------
  */
-int gfx_set_vbi_total(unsigned long even, unsigned long odd)
+int
+gfx_set_vbi_total(unsigned long even, unsigned long odd)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		status = sc1200_set_vbi_total(even, odd);
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      status = sc1200_set_vbi_total(even, odd);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_set_video_interlaced
  *---------------------------------------------------------------------------
  */
-int gfx_set_video_interlaced(int enable)
+int
+gfx_set_video_interlaced(int enable)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		status = sc1200_set_video_interlaced(enable);
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      status = sc1200_set_video_interlaced(enable);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_set_color_space_YUV
  *---------------------------------------------------------------------------
  */
-int gfx_set_color_space_YUV(int enable)
+int
+gfx_set_color_space_YUV(int enable)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		status = sc1200_set_color_space_YUV(enable);
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      status = sc1200_set_color_space_YUV(enable);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_set_vertical_scaler_offset
  *---------------------------------------------------------------------------
  */
-int gfx_set_vertical_scaler_offset(char offset)
+int
+gfx_set_vertical_scaler_offset(char offset)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		status = sc1200_set_vertical_scaler_offset(offset);
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      status = sc1200_set_vertical_scaler_offset(offset);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_set_top_line_in_odd
  *---------------------------------------------------------------------------
  */
-int gfx_set_top_line_in_odd(int enable)
+int
+gfx_set_top_line_in_odd(int enable)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		status = sc1200_set_top_line_in_odd(enable);
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      status = sc1200_set_top_line_in_odd(enable);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_set_genlock_delay
  *---------------------------------------------------------------------------
  */
-int gfx_set_genlock_delay(unsigned long delay)
+int
+gfx_set_genlock_delay(unsigned long delay)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		status = sc1200_set_genlock_delay(delay);
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      status = sc1200_set_genlock_delay(delay);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_set_genlock_enable
  *---------------------------------------------------------------------------
  */
-int gfx_set_genlock_enable(int flags)
+int
+gfx_set_genlock_enable(int flags)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		status = sc1200_set_genlock_enable(flags);
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      status = sc1200_set_genlock_enable(flags);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_set_video_cursor
  *---------------------------------------------------------------------------
  */
-int gfx_set_video_cursor(unsigned long key, unsigned long mask, unsigned short select_color2,
-						 unsigned long color1, unsigned long color2)
+int
+gfx_set_video_cursor(unsigned long key, unsigned long mask,
+		     unsigned short select_color2, unsigned long color1,
+		     unsigned long color2)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		status = sc1200_set_video_cursor(key, mask, select_color2, color1, color2);
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      status =
+	    sc1200_set_video_cursor(key, mask, select_color2, color1, color2);
 #	endif
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		status = redcloud_set_video_cursor(key, mask, select_color2, color1, color2);
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      status =
+	    redcloud_set_video_cursor(key, mask, select_color2, color1,
+				      color2);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_set_video_cursor_enable
  *---------------------------------------------------------------------------
  */
-int gfx_set_video_cursor_enable (int enable)
+int
+gfx_set_video_cursor_enable(int enable)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
-	
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		status = redcloud_set_video_cursor_enable (enable);
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      status = redcloud_set_video_cursor_enable(enable);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_set_alpha_enable
  *---------------------------------------------------------------------------
  */
-int gfx_set_alpha_enable(int enable)
+int
+gfx_set_alpha_enable(int enable)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		status = sc1200_set_alpha_enable(enable);
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      status = sc1200_set_alpha_enable(enable);
 #	endif
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		status = redcloud_set_alpha_enable(enable);
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      status = redcloud_set_alpha_enable(enable);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_set_alpha_window
  *---------------------------------------------------------------------------
  */
-int gfx_set_alpha_window(short x, short y, 
-	unsigned short width, unsigned short height)
+int
+gfx_set_alpha_window(short x, short y,
+		     unsigned short width, unsigned short height)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		status = sc1200_set_alpha_window(x, y, width, height);
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      status = sc1200_set_alpha_window(x, y, width, height);
 #	endif
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		status = redcloud_set_alpha_window(x, y, width, height);
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      status = redcloud_set_alpha_window(x, y, width, height);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_set_alpha_value
  *---------------------------------------------------------------------------
  */
-int gfx_set_alpha_value(unsigned char alpha, char delta)
+int
+gfx_set_alpha_value(unsigned char alpha, char delta)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		status = sc1200_set_alpha_value(alpha, delta);
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      status = sc1200_set_alpha_value(alpha, delta);
 #	endif
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		status = redcloud_set_alpha_value(alpha, delta);
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      status = redcloud_set_alpha_value(alpha, delta);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_set_alpha_priority
  *---------------------------------------------------------------------------
  */
-int gfx_set_alpha_priority(int priority)
+int
+gfx_set_alpha_priority(int priority)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		status = sc1200_set_alpha_priority(priority);
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      status = sc1200_set_alpha_priority(priority);
 #	endif
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		status = redcloud_set_alpha_priority(priority);
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      status = redcloud_set_alpha_priority(priority);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_set_alpha_color
  *---------------------------------------------------------------------------
  */
-int gfx_set_alpha_color(unsigned long color)
+int
+gfx_set_alpha_color(unsigned long color)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		status = sc1200_set_alpha_color(color);
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      status = sc1200_set_alpha_color(color);
 #	endif
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		status = redcloud_set_alpha_color(color);
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      status = redcloud_set_alpha_color(color);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_set_alpha_color_enable
  *---------------------------------------------------------------------------
  */
-int gfx_set_alpha_color_enable(int enable)
+int
+gfx_set_alpha_color_enable(int enable)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		status = sc1200_set_alpha_color_enable(enable);
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      status = sc1200_set_alpha_color_enable(enable);
 #	endif
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		status = redcloud_set_alpha_color_enable(enable);
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      status = redcloud_set_alpha_color_enable(enable);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_set_no_ck_outside_alpha
  *---------------------------------------------------------------------------
  */
-int gfx_set_no_ck_outside_alpha(int enable)
+int
+gfx_set_no_ck_outside_alpha(int enable)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		status = sc1200_set_no_ck_outside_alpha(enable);
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      status = sc1200_set_no_ck_outside_alpha(enable);
 #	endif
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		status = redcloud_set_no_ck_outside_alpha(enable);
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      status = redcloud_set_no_ck_outside_alpha(enable);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_set_macrovision_enable
  *---------------------------------------------------------------------------
  */
-int gfx_set_macrovision_enable(int enable)
+int
+gfx_set_macrovision_enable(int enable)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		status = sc1200_set_macrovision_enable(enable);
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      status = sc1200_set_macrovision_enable(enable);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_disable_softvga
  *---------------------------------------------------------------------------
  */
-int gfx_disable_softvga(void)
+int
+gfx_disable_softvga(void)
 {
-	int status = 0;
+   int status = 0;
+
 #	if GFX_VIDEO_CS5530
-	if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
-		status = cs5530_disable_softvga();
+   if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
+      status = cs5530_disable_softvga();
 #	endif
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		status = sc1200_disable_softvga();
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      status = sc1200_disable_softvga();
 #	endif
-	return(status);
+   return (status);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_enable_softvga
  *---------------------------------------------------------------------------
  */
-int gfx_enable_softvga(void)
+int
+gfx_enable_softvga(void)
 {
-	int status = 0;
+   int status = 0;
+
 #	if GFX_VIDEO_CS5530
-	if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
-		status = cs5530_enable_softvga();
+   if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
+      status = cs5530_enable_softvga();
 #	endif
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		status = sc1200_enable_softvga();
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      status = sc1200_enable_softvga();
 #	endif
-	return(status);
+   return (status);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_get_clock_frequency
  *---------------------------------------------------------------------------
  */
-unsigned long gfx_get_clock_frequency(void)
+unsigned long
+gfx_get_clock_frequency(void)
 {
-	unsigned long frequency = 0;
+   unsigned long frequency = 0;
+
 #	if GFX_VIDEO_CS5530
-	if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
-		frequency = cs5530_get_clock_frequency();
+   if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
+      frequency = cs5530_get_clock_frequency();
 #	endif
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		frequency = sc1200_get_clock_frequency();
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      frequency = sc1200_get_clock_frequency();
 #	endif
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		frequency = redcloud_get_clock_frequency();
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      frequency = redcloud_get_clock_frequency();
 #	endif
-	return(frequency);
+   return (frequency);
 }
 
 /*************************************************************/
@@ -1151,218 +1258,239 @@ unsigned long gfx_get_clock_frequency(void)
  * gfx_get_vsa2_softvga_enable
  *---------------------------------------------------------------------------
  */
-int gfx_get_vsa2_softvga_enable(void)
+int
+gfx_get_vsa2_softvga_enable(void)
 {
-	int enable = 0;
+   int enable = 0;
+
 #	if GFX_VIDEO_CS5530
-	if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
-		enable = cs5530_get_vsa2_softvga_enable();
+   if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
+      enable = cs5530_get_vsa2_softvga_enable();
 #	endif
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		enable = sc1200_get_vsa2_softvga_enable();
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      enable = sc1200_get_vsa2_softvga_enable();
 #	endif
-	return enable;
-		 
-} 
+   return enable;
+
+}
 
 /*---------------------------------------------------------------------------
  * gfx_get_sync_polarities
  *---------------------------------------------------------------------------
  */
-int gfx_get_sync_polarities(void)
+int
+gfx_get_sync_polarities(void)
 {
-	int polarities = 0;
+   int polarities = 0;
+
 #	if GFX_VIDEO_CS5530
-	if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
-		polarities = cs5530_get_sync_polarities();
+   if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
+      polarities = cs5530_get_sync_polarities();
 #	endif
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		polarities = sc1200_get_sync_polarities();
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      polarities = sc1200_get_sync_polarities();
 #	endif
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		polarities = redcloud_get_sync_polarities();
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      polarities = redcloud_get_sync_polarities();
 #	endif
-	return(polarities);
+   return (polarities);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_get_video_palette_entry
  *---------------------------------------------------------------------------
  */
-int gfx_get_video_palette_entry(unsigned long index, unsigned long *palette)
+int
+gfx_get_video_palette_entry(unsigned long index, unsigned long *palette)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIDEO_CS5530
-	if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
-		status = cs5530_get_video_palette_entry (index, palette);
+   if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
+      status = cs5530_get_video_palette_entry(index, palette);
 #	endif
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		status = sc1200_get_video_palette_entry (index, palette);
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      status = sc1200_get_video_palette_entry(index, palette);
 #	endif
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		status = redcloud_get_video_palette_entry (index, palette);
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      status = redcloud_get_video_palette_entry(index, palette);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_get_video_enable
  *-----------------------------------------------------------------------------
  */
-int gfx_get_video_enable(void)
+int
+gfx_get_video_enable(void)
 {
-	int enable = 0;
+   int enable = 0;
+
 #	if GFX_VIDEO_CS5530
-	if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
-		enable = cs5530_get_video_enable();
+   if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
+      enable = cs5530_get_video_enable();
 #	endif
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		enable = sc1200_get_video_enable();
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      enable = sc1200_get_video_enable();
 #	endif
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		enable = redcloud_get_video_enable();
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      enable = redcloud_get_video_enable();
 #	endif
-	return(enable);
+   return (enable);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_get_video_format
  *-----------------------------------------------------------------------------
  */
-int gfx_get_video_format(void)
+int
+gfx_get_video_format(void)
 {
-	int format = 0;
+   int format = 0;
+
 #	if GFX_VIDEO_CS5530
-	if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
-		format = cs5530_get_video_format();
+   if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
+      format = cs5530_get_video_format();
 #	endif
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		format = sc1200_get_video_format();
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      format = sc1200_get_video_format();
 #	endif
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		format = redcloud_get_video_format();
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      format = redcloud_get_video_format();
 #	endif
-	return(format);
+   return (format);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_get_video_src_size
  *-----------------------------------------------------------------------------
  */
-unsigned long gfx_get_video_src_size(void)
+unsigned long
+gfx_get_video_src_size(void)
 {
-	unsigned long size = 0;
+   unsigned long size = 0;
+
 #	if GFX_VIDEO_CS5530
-	if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
-		size = cs5530_get_video_src_size();
+   if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
+      size = cs5530_get_video_src_size();
 #	endif
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		size = sc1200_get_video_src_size();
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      size = sc1200_get_video_src_size();
 #	endif
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		size = redcloud_get_video_src_size();
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      size = redcloud_get_video_src_size();
 #	endif
-	return(size);
+   return (size);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_get_video_line_size
  *-----------------------------------------------------------------------------
  */
-unsigned long gfx_get_video_line_size(void)
+unsigned long
+gfx_get_video_line_size(void)
 {
-	unsigned long size = 0;
+   unsigned long size = 0;
+
 #	if GFX_VIDEO_CS5530
-	if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
-		size = cs5530_get_video_line_size();
+   if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
+      size = cs5530_get_video_line_size();
 #	endif
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		size = sc1200_get_video_line_size();
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      size = sc1200_get_video_line_size();
 #	endif
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		size = redcloud_get_video_line_size();
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      size = redcloud_get_video_line_size();
 #	endif
-	return(size);
+   return (size);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_get_video_xclip
  *-----------------------------------------------------------------------------
  */
-unsigned long gfx_get_video_xclip(void)
+unsigned long
+gfx_get_video_xclip(void)
 {
-	unsigned long size = 0;
+   unsigned long size = 0;
+
 #	if GFX_VIDEO_CS5530
-	if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
-		size = cs5530_get_video_xclip();
+   if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
+      size = cs5530_get_video_xclip();
 #	endif
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		size = sc1200_get_video_xclip();
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      size = sc1200_get_video_xclip();
 #	endif
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		size = redcloud_get_video_xclip();
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      size = redcloud_get_video_xclip();
 #	endif
-	return(size);
+   return (size);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_get_video_offset
  *-----------------------------------------------------------------------------
  */
-unsigned long gfx_get_video_offset(void)
+unsigned long
+gfx_get_video_offset(void)
 {
-	unsigned long offset = 0;
+   unsigned long offset = 0;
+
 #	if GFX_VIDEO_CS5530
-	if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
-		offset = cs5530_get_video_offset();
+   if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
+      offset = cs5530_get_video_offset();
 #	endif
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		offset = sc1200_get_video_offset();
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      offset = sc1200_get_video_offset();
 #	endif
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		offset = redcloud_get_video_offset();
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      offset = redcloud_get_video_offset();
 #	endif
-	return(offset);
+   return (offset);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_get_video_yuv_offsets
  *-----------------------------------------------------------------------------
  */
-void gfx_get_video_yuv_offsets(unsigned long *yoffset, unsigned long *uoffset, 
-							   unsigned long *voffset)
+void
+gfx_get_video_yuv_offsets(unsigned long *yoffset, unsigned long *uoffset,
+			  unsigned long *voffset)
 {
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		redcloud_get_video_yuv_offsets(yoffset, uoffset, voffset);
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      redcloud_get_video_yuv_offsets(yoffset, uoffset, voffset);
 #	endif
 }
+
 /*-----------------------------------------------------------------------------
  * gfx_get_video_yuv_pitch
  *-----------------------------------------------------------------------------
  */
-void gfx_get_video_yuv_pitch(unsigned long *ypitch, unsigned long *uvpitch)
+void
+gfx_get_video_yuv_pitch(unsigned long *ypitch, unsigned long *uvpitch)
 {
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		redcloud_get_video_yuv_pitch (ypitch, uvpitch);
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      redcloud_get_video_yuv_pitch(ypitch, uvpitch);
 #	endif
 }
 
@@ -1370,98 +1498,111 @@ void gfx_get_video_yuv_pitch(unsigned long *ypitch, unsigned long *uvpitch)
  * gfx_get_video_upscale
  *---------------------------------------------------------------------------
  */
-unsigned long gfx_get_video_upscale(void)
+unsigned long
+gfx_get_video_upscale(void)
 {
-	unsigned long scale = 0;
+   unsigned long scale = 0;
+
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		scale = sc1200_get_video_upscale();
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      scale = sc1200_get_video_upscale();
 #	endif
-	return(scale);
+   return (scale);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_get_video_scale
  *---------------------------------------------------------------------------
  */
-unsigned long gfx_get_video_scale(void)
+unsigned long
+gfx_get_video_scale(void)
 {
-	unsigned long scale = 0;
+   unsigned long scale = 0;
+
 #	if GFX_VIDEO_CS5530
-	if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
-		scale = cs5530_get_video_scale();
+   if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
+      scale = cs5530_get_video_scale();
 #	endif
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		scale = sc1200_get_video_scale();
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      scale = sc1200_get_video_scale();
 #	endif
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		scale = redcloud_get_video_scale();
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      scale = redcloud_get_video_scale();
 #	endif
-	return(scale);
+   return (scale);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_get_video_downscale_delta
  *---------------------------------------------------------------------------
  */
-unsigned long gfx_get_video_downscale_delta(void)
+unsigned long
+gfx_get_video_downscale_delta(void)
 {
-	unsigned long delta = 0;
+   unsigned long delta = 0;
+
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		delta = redcloud_get_video_downscale_delta();
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      delta = redcloud_get_video_downscale_delta();
 #	endif
-	return(delta);
+   return (delta);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_get_video_vertical_downscale_enable
  *---------------------------------------------------------------------------
  */
-int gfx_get_video_vertical_downscale_enable(void)
+int
+gfx_get_video_vertical_downscale_enable(void)
 {
-	int enable = 0;
+   int enable = 0;
+
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		enable = redcloud_get_video_vertical_downscale_enable();
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      enable = redcloud_get_video_vertical_downscale_enable();
 #	endif
-	return(enable);
+   return (enable);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_get_video_downscale_config
  *---------------------------------------------------------------------------
  */
-int gfx_get_video_downscale_config(unsigned short *type, unsigned short *m)
+int
+gfx_get_video_downscale_config(unsigned short *type, unsigned short *m)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		status = sc1200_get_video_downscale_config(type, m);
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      status = sc1200_get_video_downscale_config(type, m);
 #	endif
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		status = redcloud_get_video_downscale_config(type, m);
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      status = redcloud_get_video_downscale_config(type, m);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_get_video_downscale_coefficients
  *---------------------------------------------------------------------------
  */
-void gfx_get_video_downscale_coefficients(unsigned short *coef1, unsigned short *coef2,
-										  unsigned short *coef3, unsigned short *coef4)
+void
+gfx_get_video_downscale_coefficients(unsigned short *coef1,
+				     unsigned short *coef2,
+				     unsigned short *coef3,
+				     unsigned short *coef4)
 {
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		sc1200_get_video_downscale_coefficients(coef1, coef2, coef3, coef4);
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      sc1200_get_video_downscale_coefficients(coef1, coef2, coef3, coef4);
 #	endif
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		redcloud_get_video_downscale_coefficients(coef1, coef2, coef3, coef4);
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      redcloud_get_video_downscale_coefficients(coef1, coef2, coef3, coef4);
 #	endif
 }
 
@@ -1469,15 +1610,16 @@ void gfx_get_video_downscale_coefficients(unsigned short *coef1, unsigned short
  * gfx_get_video_downscale_enable
  *---------------------------------------------------------------------------
  */
-void gfx_get_video_downscale_enable(int *enable)
+void
+gfx_get_video_downscale_enable(int *enable)
 {
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		sc1200_get_video_downscale_enable(enable);
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      sc1200_get_video_downscale_enable(enable);
 #	endif
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		redcloud_get_video_downscale_enable(enable);
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      redcloud_get_video_downscale_enable(enable);
 #	endif
 }
 
@@ -1485,446 +1627,497 @@ void gfx_get_video_downscale_enable(int *enable)
  * gfx_get_video_dst_size
  *---------------------------------------------------------------------------
  */
-unsigned long gfx_get_video_dst_size(void)
+unsigned long
+gfx_get_video_dst_size(void)
 {
-	unsigned long size = 0;
+   unsigned long size = 0;
+
 #	if GFX_VIDEO_CS5530
-	if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
-		size = cs5530_get_video_dst_size();
+   if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
+      size = cs5530_get_video_dst_size();
 #	endif
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		size = sc1200_get_video_dst_size();
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      size = sc1200_get_video_dst_size();
 #	endif
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		size = redcloud_get_video_dst_size();
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      size = redcloud_get_video_dst_size();
 #	endif
-	return(size);
+   return (size);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_get_video_position
  *---------------------------------------------------------------------------
  */
-unsigned long gfx_get_video_position(void)
+unsigned long
+gfx_get_video_position(void)
 {
-	unsigned long position = 0;
+   unsigned long position = 0;
+
 #	if GFX_VIDEO_CS5530
-	if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
-		position = cs5530_get_video_position();
+   if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
+      position = cs5530_get_video_position();
 #	endif
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		position = sc1200_get_video_position();
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      position = sc1200_get_video_position();
 #	endif
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		position = redcloud_get_video_position();
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      position = redcloud_get_video_position();
 #	endif
-	return(position);
+   return (position);
 }
-	
+
 /*---------------------------------------------------------------------------
  * gfx_get_video_color_key
  *---------------------------------------------------------------------------
  */
-unsigned long gfx_get_video_color_key(void)
+unsigned long
+gfx_get_video_color_key(void)
 {
-	unsigned long key = 0;
+   unsigned long key = 0;
+
 #	if GFX_VIDEO_CS5530
-	if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
-		key = cs5530_get_video_color_key();
+   if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
+      key = cs5530_get_video_color_key();
 #	endif
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		key = sc1200_get_video_color_key();
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      key = sc1200_get_video_color_key();
 #	endif
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		key = redcloud_get_video_color_key();
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      key = redcloud_get_video_color_key();
 #	endif
-	return(key);
+   return (key);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_get_video_color_key_mask
  *---------------------------------------------------------------------------
  */
-unsigned long gfx_get_video_color_key_mask(void)
+unsigned long
+gfx_get_video_color_key_mask(void)
 {
-	unsigned long mask = 0;
+   unsigned long mask = 0;
+
 #	if GFX_VIDEO_CS5530
-	if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
-		mask = cs5530_get_video_color_key_mask();
+   if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
+      mask = cs5530_get_video_color_key_mask();
 #	endif
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		mask = sc1200_get_video_color_key_mask();
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      mask = sc1200_get_video_color_key_mask();
 #	endif
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		mask = redcloud_get_video_color_key_mask();
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      mask = redcloud_get_video_color_key_mask();
 #	endif
-	return(mask);
+   return (mask);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_get_video_color_key_src
  *---------------------------------------------------------------------------
  */
-int gfx_get_video_color_key_src(void)
+int
+gfx_get_video_color_key_src(void)
 {
-	int src = 0;
+   int src = 0;
+
 #	if GFX_VIDEO_CS5530
-	if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
-		src = cs5530_get_video_color_key_src();
+   if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
+      src = cs5530_get_video_color_key_src();
 #	endif
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		src = sc1200_get_video_color_key_src();
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      src = sc1200_get_video_color_key_src();
 #	endif
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		src = redcloud_get_video_color_key_src();
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      src = redcloud_get_video_color_key_src();
 #	endif
-	return(src);
+   return (src);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_get_video_filter
  *---------------------------------------------------------------------------
  */
-int gfx_get_video_filter(void)
+int
+gfx_get_video_filter(void)
 {
-	int filter = 0;
+   int filter = 0;
+
 #	if GFX_VIDEO_CS5530
-	if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
-		filter = cs5530_get_video_filter();
+   if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
+      filter = cs5530_get_video_filter();
 #	endif
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		filter = sc1200_get_video_filter();
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      filter = sc1200_get_video_filter();
 #	endif
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		filter = redcloud_get_video_filter();
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      filter = redcloud_get_video_filter();
 #	endif
-	return(filter);
+   return (filter);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_get_video_request
  *---------------------------------------------------------------------------
  */
-int gfx_get_video_request(short *x, short *y)
+int
+gfx_get_video_request(short *x, short *y)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		status = sc1200_get_video_request(x, y);
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      status = sc1200_get_video_request(x, y);
 #	endif
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		status = redcloud_get_video_request(x, y);
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      status = redcloud_get_video_request(x, y);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_get_video_source
  *---------------------------------------------------------------------------
  */
-int gfx_get_video_source(VideoSourceType *source)
+int
+gfx_get_video_source(VideoSourceType * source)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		status = sc1200_get_video_source(source);
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      status = sc1200_get_video_source(source);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_get_vbi_source
  *---------------------------------------------------------------------------
  */
-int gfx_get_vbi_source(VbiSourceType *source)
+int
+gfx_get_vbi_source(VbiSourceType * source)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		status = sc1200_get_vbi_source(source);
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      status = sc1200_get_vbi_source(source);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_get_vbi_lines
  *---------------------------------------------------------------------------
  */
-unsigned long gfx_get_vbi_lines(int odd)
+unsigned long
+gfx_get_vbi_lines(int odd)
 {
-	unsigned long lines = (unsigned long)GFX_STATUS_UNSUPPORTED;
+   unsigned long lines = (unsigned long)GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		lines = sc1200_get_vbi_lines(odd);
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      lines = sc1200_get_vbi_lines(odd);
 #	endif
-	return(lines);
+   return (lines);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_get_vbi_total
  *---------------------------------------------------------------------------
  */
-unsigned long gfx_get_vbi_total(int odd)
+unsigned long
+gfx_get_vbi_total(int odd)
 {
-	unsigned long total = (unsigned long)GFX_STATUS_UNSUPPORTED;
+   unsigned long total = (unsigned long)GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		total = sc1200_get_vbi_total(odd);
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      total = sc1200_get_vbi_total(odd);
 #	endif
-	return(total);
+   return (total);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_get_video_interlaced
  *---------------------------------------------------------------------------
  */
-int gfx_get_video_interlaced(void)
+int
+gfx_get_video_interlaced(void)
 {
-	int interlaced = GFX_STATUS_UNSUPPORTED;
+   int interlaced = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		interlaced = sc1200_get_video_interlaced();
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      interlaced = sc1200_get_video_interlaced();
 #	endif
-	return(interlaced);
+   return (interlaced);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_get_color_space_YUV
  *---------------------------------------------------------------------------
  */
-int gfx_get_color_space_YUV(void)
+int
+gfx_get_color_space_YUV(void)
 {
-	int color_space = GFX_STATUS_UNSUPPORTED;
+   int color_space = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		color_space = sc1200_get_color_space_YUV();
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      color_space = sc1200_get_color_space_YUV();
 #	endif
-	return(color_space);
+   return (color_space);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_get_vertical_scaler_offset
  *---------------------------------------------------------------------------
  */
-int gfx_get_vertical_scaler_offset(char *offset)
+int
+gfx_get_vertical_scaler_offset(char *offset)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		 status = sc1200_get_vertical_scaler_offset(offset);
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      status = sc1200_get_vertical_scaler_offset(offset);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_get_genlock_delay
  *---------------------------------------------------------------------------
  */
-unsigned long gfx_get_genlock_delay(void)
+unsigned long
+gfx_get_genlock_delay(void)
 {
-	unsigned long delay = (unsigned long)GFX_STATUS_UNSUPPORTED;
+   unsigned long delay = (unsigned long)GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		delay = sc1200_get_genlock_delay();
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      delay = sc1200_get_genlock_delay();
 #	endif
-	return(delay);
+   return (delay);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_get_genlock_enable
  *---------------------------------------------------------------------------
  */
-int gfx_get_genlock_enable(void)
+int
+gfx_get_genlock_enable(void)
 {
-	int enable = GFX_STATUS_UNSUPPORTED;
+   int enable = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		enable = sc1200_get_genlock_enable();
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      enable = sc1200_get_genlock_enable();
 #	endif
-	return(enable);
+   return (enable);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_get_video_cursor
  *---------------------------------------------------------------------------
  */
-int gfx_get_video_cursor(unsigned long *key, unsigned long *mask, unsigned short *select_color2,
-						 unsigned long *color1, unsigned short *color2)
+int
+gfx_get_video_cursor(unsigned long *key, unsigned long *mask,
+		     unsigned short *select_color2, unsigned long *color1,
+		     unsigned short *color2)
 {
-	int enable = GFX_STATUS_UNSUPPORTED;
+   int enable = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		enable = sc1200_get_video_cursor(key, mask, select_color2, color1, color2);
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      enable =
+	    sc1200_get_video_cursor(key, mask, select_color2, color1, color2);
 #	endif
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		enable = redcloud_get_video_cursor(key, mask, select_color2, color1, color2);
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      enable =
+	    redcloud_get_video_cursor(key, mask, select_color2, color1,
+				      color2);
 #	endif
-	return(enable);
+   return (enable);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_read_crc
  *---------------------------------------------------------------------------
  */
-unsigned long gfx_read_crc(void)
+unsigned long
+gfx_read_crc(void)
 {
-	unsigned long crc = 0;
+   unsigned long crc = 0;
+
 #	if GFX_VIDEO_CS5530
-	if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
-		crc = cs5530_read_crc();
+   if (gfx_video_type == GFX_VIDEO_TYPE_CS5530)
+      crc = cs5530_read_crc();
 #	endif
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		crc = sc1200_read_crc();
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      crc = sc1200_read_crc();
 #	endif
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		crc = redcloud_read_crc();
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      crc = redcloud_read_crc();
 #	endif
-	return(crc);
+   return (crc);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_read_crc32
  *---------------------------------------------------------------------------
  */
-unsigned long gfx_read_crc32(void)
+unsigned long
+gfx_read_crc32(void)
 {
-	unsigned long crc = 0;
+   unsigned long crc = 0;
+
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		crc = redcloud_read_crc32();
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      crc = redcloud_read_crc32();
 #	endif
-	return(crc);
+   return (crc);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_read_window_crc
  *---------------------------------------------------------------------------
  */
-unsigned long gfx_read_window_crc(int source, unsigned short x, unsigned short y,
-								  unsigned short width, unsigned short height, int crc32)
+unsigned long
+gfx_read_window_crc(int source, unsigned short x, unsigned short y,
+		    unsigned short width, unsigned short height, int crc32)
 {
-	unsigned long crc = 0;
+   unsigned long crc = 0;
+
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		crc = redcloud_read_window_crc(source, x, y, width, height, crc32);
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      crc = redcloud_read_window_crc(source, x, y, width, height, crc32);
 #	endif
-	return(crc);
+   return (crc);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_get_macrovision_enable
  *-----------------------------------------------------------------------------
  */
-int gfx_get_macrovision_enable(void)
+int
+gfx_get_macrovision_enable(void)
 {
-	int enable = 0;
+   int enable = 0;
+
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		enable = sc1200_get_video_enable();
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      enable = sc1200_get_video_enable();
 #	endif
-	return(enable);
+   return (enable);
 }
 
 /*---------------------------------------------------------------------------
  * gfx_get_alpha_enable
  *---------------------------------------------------------------------------
  */
-void gfx_get_alpha_enable(int *enable)
+void
+gfx_get_alpha_enable(int *enable)
 {
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		sc1200_get_alpha_enable(enable);
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      sc1200_get_alpha_enable(enable);
 #	endif
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		redcloud_get_alpha_enable(enable);
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      redcloud_get_alpha_enable(enable);
 #	endif
-	return;
+   return;
 }
 
 /*---------------------------------------------------------------------------
  * gfx_get_alpha_size
  *---------------------------------------------------------------------------
  */
-void gfx_get_alpha_size(unsigned short *x, unsigned short *y, 
-	unsigned short *width, unsigned short *height)
+void
+gfx_get_alpha_size(unsigned short *x, unsigned short *y,
+		   unsigned short *width, unsigned short *height)
 {
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		sc1200_get_alpha_size(x, y, width, height);
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      sc1200_get_alpha_size(x, y, width, height);
 #	endif
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		redcloud_get_alpha_size(x, y, width, height);
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      redcloud_get_alpha_size(x, y, width, height);
 #	endif
-	return;
+   return;
 }
 
 /*---------------------------------------------------------------------------
  * gfx_get_alpha_value
  *---------------------------------------------------------------------------
  */
-void gfx_get_alpha_value(unsigned char *alpha, char *delta)
+void
+gfx_get_alpha_value(unsigned char *alpha, char *delta)
 {
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		sc1200_get_alpha_value(alpha, delta);
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      sc1200_get_alpha_value(alpha, delta);
 #	endif
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		redcloud_get_alpha_value(alpha, delta);
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      redcloud_get_alpha_value(alpha, delta);
 #	endif
-	return;
+   return;
 }
 
 /*---------------------------------------------------------------------------
  * gfx_get_alpha_priority
  *---------------------------------------------------------------------------
  */
-void gfx_get_alpha_priority(int *priority)
+void
+gfx_get_alpha_priority(int *priority)
 {
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		sc1200_get_alpha_priority(priority);
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      sc1200_get_alpha_priority(priority);
 #	endif
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		redcloud_get_alpha_priority(priority);
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      redcloud_get_alpha_priority(priority);
 #	endif
-	return;
+   return;
 }
 
 /*---------------------------------------------------------------------------
  * gfx_get_alpha_color
  *---------------------------------------------------------------------------
  */
-void gfx_get_alpha_color(unsigned long *color)
+void
+gfx_get_alpha_color(unsigned long *color)
 {
 #	if GFX_VIDEO_SC1200
-	if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
-		sc1200_get_alpha_color(color);
+   if (gfx_video_type == GFX_VIDEO_TYPE_SC1200)
+      sc1200_get_alpha_color(color);
 #	endif
 #	if GFX_VIDEO_REDCLOUD
-	if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
-		redcloud_get_alpha_color(color);
+   if (gfx_video_type == GFX_VIDEO_TYPE_REDCLOUD)
+      redcloud_get_alpha_color(color);
 #	endif
-	return;
+   return;
 }
 
 #endif /* GFX_READ_ROUTINES */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/gfx_vip.c b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/gfx_vip.c
index 0c320512b..1f506ae94 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/gfx_vip.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/gfx_vip.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/gfx_vip.c,v 1.2 2002/10/18 20:02:40 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/gfx_vip.c,v 1.1 2002/12/10 15:12:26 alanh Exp $ */
 /*
  * $Workfile: gfx_vip.c $
  *
@@ -160,7 +160,6 @@
  *
  * END_NSC_LIC_GPL */
 
-
 /* INCLUDE SUPPORT FOR SC1200, IF SPECIFIED. */
 
 #if GFX_VIP_SC1200
@@ -176,266 +175,304 @@
  * gfx_set_vip_enable
  *-----------------------------------------------------------------------------
  */
-int gfx_set_vip_enable(int enable)
+int
+gfx_set_vip_enable(int enable)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIP_SC1200
-	if (gfx_vip_type == GFX_VIP_TYPE_SC1200)
-		status = sc1200_set_vip_enable(enable);
+   if (gfx_vip_type == GFX_VIP_TYPE_SC1200)
+      status = sc1200_set_vip_enable(enable);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_set_vip_capture_run_mode
  *-----------------------------------------------------------------------------
  */
-int gfx_set_vip_capture_run_mode(int mode)
+int
+gfx_set_vip_capture_run_mode(int mode)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIP_SC1200
-	if (gfx_vip_type == GFX_VIP_TYPE_SC1200)
-		status = sc1200_set_vip_capture_run_mode(mode);
+   if (gfx_vip_type == GFX_VIP_TYPE_SC1200)
+      status = sc1200_set_vip_capture_run_mode(mode);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_set_vip_base
  *-----------------------------------------------------------------------------
  */
-int gfx_set_vip_base(unsigned long even, unsigned long odd)
-{	
-	int status = GFX_STATUS_UNSUPPORTED;
+int
+gfx_set_vip_base(unsigned long even, unsigned long odd)
+{
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIP_SC1200
-	if (gfx_vip_type == GFX_VIP_TYPE_SC1200)
-		status = sc1200_set_vip_base(even, odd);
+   if (gfx_vip_type == GFX_VIP_TYPE_SC1200)
+      status = sc1200_set_vip_base(even, odd);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_set_vip_pitch
  *-----------------------------------------------------------------------------
  */
-int gfx_set_vip_pitch(unsigned long pitch)
+int
+gfx_set_vip_pitch(unsigned long pitch)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIP_SC1200
-	if (gfx_vip_type == GFX_VIP_TYPE_SC1200)
-		status = sc1200_set_vip_pitch(pitch);
+   if (gfx_vip_type == GFX_VIP_TYPE_SC1200)
+      status = sc1200_set_vip_pitch(pitch);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_set_vip_mode
  *-----------------------------------------------------------------------------
  */
-int gfx_set_vip_mode(int mode)
+int
+gfx_set_vip_mode(int mode)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIP_SC1200
-	if (gfx_vip_type == GFX_VIP_TYPE_SC1200)
-		status = sc1200_set_vip_mode(mode);
+   if (gfx_vip_type == GFX_VIP_TYPE_SC1200)
+      status = sc1200_set_vip_mode(mode);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_set_vbi_enable
  *-----------------------------------------------------------------------------
  */
-int gfx_set_vbi_enable(int enable)
+int
+gfx_set_vbi_enable(int enable)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIP_SC1200
-	if (gfx_vip_type == GFX_VIP_TYPE_SC1200)
-		status = sc1200_set_vbi_enable(enable);
+   if (gfx_vip_type == GFX_VIP_TYPE_SC1200)
+      status = sc1200_set_vbi_enable(enable);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_set_vbi_mode
  *-----------------------------------------------------------------------------
  */
-int gfx_set_vbi_mode(int mode)
+int
+gfx_set_vbi_mode(int mode)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIP_SC1200
-	if (gfx_vip_type == GFX_VIP_TYPE_SC1200)
-		status = sc1200_set_vbi_mode(mode);
+   if (gfx_vip_type == GFX_VIP_TYPE_SC1200)
+      status = sc1200_set_vbi_mode(mode);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_set_vbi_base
  *-----------------------------------------------------------------------------
  */
-int gfx_set_vbi_base(unsigned long even, unsigned long odd)
-{	
-	int status = GFX_STATUS_UNSUPPORTED;
+int
+gfx_set_vbi_base(unsigned long even, unsigned long odd)
+{
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIP_SC1200
-	if (gfx_vip_type == GFX_VIP_TYPE_SC1200)
-		status = sc1200_set_vbi_base(even, odd);
+   if (gfx_vip_type == GFX_VIP_TYPE_SC1200)
+      status = sc1200_set_vbi_base(even, odd);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_set_vbi_pitch
  *-----------------------------------------------------------------------------
  */
-int gfx_set_vbi_pitch(unsigned long pitch)
+int
+gfx_set_vbi_pitch(unsigned long pitch)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIP_SC1200
-	if (gfx_vip_type == GFX_VIP_TYPE_SC1200)
-		status = sc1200_set_vbi_pitch(pitch);
+   if (gfx_vip_type == GFX_VIP_TYPE_SC1200)
+      status = sc1200_set_vbi_pitch(pitch);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_set_vbi_direct
  *-----------------------------------------------------------------------------
  */
-int gfx_set_vbi_direct(unsigned long even_lines, unsigned long odd_lines)
+int
+gfx_set_vbi_direct(unsigned long even_lines, unsigned long odd_lines)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIP_SC1200
-	if (gfx_vip_type == GFX_VIP_TYPE_SC1200)
-		status = sc1200_set_vbi_direct(even_lines, odd_lines);
+   if (gfx_vip_type == GFX_VIP_TYPE_SC1200)
+      status = sc1200_set_vbi_direct(even_lines, odd_lines);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_set_vbi_interrupt
  *-----------------------------------------------------------------------------
  */
-int gfx_set_vbi_interrupt(int enable)
+int
+gfx_set_vbi_interrupt(int enable)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIP_SC1200
-	if (gfx_vip_type == GFX_VIP_TYPE_SC1200)
-		status = sc1200_set_vbi_interrupt(enable);
+   if (gfx_vip_type == GFX_VIP_TYPE_SC1200)
+      status = sc1200_set_vbi_interrupt(enable);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_set_vip_bus_request_threshold_high
  *-----------------------------------------------------------------------------
  */
-int gfx_set_vip_bus_request_threshold_high(int enable)
+int
+gfx_set_vip_bus_request_threshold_high(int enable)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIP_SC1200
-	if (gfx_vip_type == GFX_VIP_TYPE_SC1200)
-		status = sc1200_set_vip_bus_request_threshold_high(enable);
+   if (gfx_vip_type == GFX_VIP_TYPE_SC1200)
+      status = sc1200_set_vip_bus_request_threshold_high(enable);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_set_vip_last_line
  *-----------------------------------------------------------------------------
  */
-int gfx_set_vip_last_line(int last_line)
+int
+gfx_set_vip_last_line(int last_line)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIP_SC1200
-	if (gfx_vip_type == GFX_VIP_TYPE_SC1200)
-		status = sc1200_set_vip_last_line(last_line);
+   if (gfx_vip_type == GFX_VIP_TYPE_SC1200)
+      status = sc1200_set_vip_last_line(last_line);
 #	endif
-	return(status);
+   return (status);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_test_vip_odd_field
  *-----------------------------------------------------------------------------
  */
-int gfx_test_vip_odd_field(void)
+int
+gfx_test_vip_odd_field(void)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIP_SC1200
-	if (gfx_vip_type == GFX_VIP_TYPE_SC1200)
-		status = sc1200_test_vip_odd_field();
+   if (gfx_vip_type == GFX_VIP_TYPE_SC1200)
+      status = sc1200_test_vip_odd_field();
 #	endif
-	return(status);
+   return (status);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_test_vip_bases_updated
  *-----------------------------------------------------------------------------
  */
-int gfx_test_vip_bases_updated(void)
+int
+gfx_test_vip_bases_updated(void)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIP_SC1200
-	if (gfx_vip_type == GFX_VIP_TYPE_SC1200)
-		status = sc1200_test_vip_bases_updated();
+   if (gfx_vip_type == GFX_VIP_TYPE_SC1200)
+      status = sc1200_test_vip_bases_updated();
 #	endif
-	return(status);
+   return (status);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_test_vip_fifo_overflow
  *-----------------------------------------------------------------------------
  */
-int gfx_test_vip_fifo_overflow(void)
+int
+gfx_test_vip_fifo_overflow(void)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIP_SC1200
-	if (gfx_vip_type == GFX_VIP_TYPE_SC1200)
-		status = sc1200_test_vip_fifo_overflow();
+   if (gfx_vip_type == GFX_VIP_TYPE_SC1200)
+      status = sc1200_test_vip_fifo_overflow();
 #	endif
-	return(status);
+   return (status);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_get_vip_line
  *-----------------------------------------------------------------------------
  */
-int gfx_get_vip_line(void)
+int
+gfx_get_vip_line(void)
 {
-	int status = GFX_STATUS_UNSUPPORTED;
+   int status = GFX_STATUS_UNSUPPORTED;
+
 #	if GFX_VIP_SC1200
-	if (gfx_vip_type == GFX_VIP_TYPE_SC1200)
-		status = sc1200_get_vip_line();
+   if (gfx_vip_type == GFX_VIP_TYPE_SC1200)
+      status = sc1200_get_vip_line();
 #	endif
-	return(status);
+   return (status);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_get_vip_base
  *-----------------------------------------------------------------------------
  */
-unsigned long gfx_get_vip_base(int odd)
+unsigned long
+gfx_get_vip_base(int odd)
 {
-	unsigned long base = 0;
+   unsigned long base = 0;
+
 #	if GFX_VIP_SC1200
-	if (gfx_vip_type == GFX_VIP_TYPE_SC1200)
-		base = sc1200_get_vip_base(odd);
+   if (gfx_vip_type == GFX_VIP_TYPE_SC1200)
+      base = sc1200_get_vip_base(odd);
 #	endif
-	return(base);
+   return (base);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_get_vbi_pitch
  *-----------------------------------------------------------------------------
  */
-unsigned long gfx_get_vbi_pitch(void)
+unsigned long
+gfx_get_vbi_pitch(void)
 {
-	unsigned long pitch = 0;
+   unsigned long pitch = 0;
+
 #	if GFX_VIP_SC1200
-	if (gfx_vip_type == GFX_VIP_TYPE_SC1200)
-		pitch = sc1200_get_vbi_pitch();
+   if (gfx_vip_type == GFX_VIP_TYPE_SC1200)
+      pitch = sc1200_get_vbi_pitch();
 #	endif
-	return(pitch);
+   return (pitch);
 }
 
 /*************************************************************/
@@ -448,126 +485,144 @@ unsigned long gfx_get_vbi_pitch(void)
  * gfx_get_vip_enable
  *-----------------------------------------------------------------------------
  */
-int gfx_get_vip_enable(void)
+int
+gfx_get_vip_enable(void)
 {
-	int enable = 0;
+   int enable = 0;
+
 #	if GFX_VIP_SC1200
-	if (gfx_vip_type == GFX_VIP_TYPE_SC1200)
-		enable = sc1200_get_vip_enable();
+   if (gfx_vip_type == GFX_VIP_TYPE_SC1200)
+      enable = sc1200_get_vip_enable();
 #	endif
-	return(enable);
+   return (enable);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_get_vip_pitch
  *-----------------------------------------------------------------------------
  */
-unsigned long gfx_get_vip_pitch(void)
+unsigned long
+gfx_get_vip_pitch(void)
 {
-	unsigned long pitch = 0;
+   unsigned long pitch = 0;
+
 #	if GFX_VIP_SC1200
-	if (gfx_vip_type == GFX_VIP_TYPE_SC1200)
-		pitch = sc1200_get_vip_pitch();
+   if (gfx_vip_type == GFX_VIP_TYPE_SC1200)
+      pitch = sc1200_get_vip_pitch();
 #	endif
-	return(pitch);
+   return (pitch);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_get_vip_mode
  *-----------------------------------------------------------------------------
  */
-int gfx_get_vip_mode(void)
+int
+gfx_get_vip_mode(void)
 {
-	int mode = 0;
+   int mode = 0;
+
 #	if GFX_VIP_SC1200
-	if (gfx_vip_type == GFX_VIP_TYPE_SC1200)
-		mode = sc1200_get_vip_mode();
+   if (gfx_vip_type == GFX_VIP_TYPE_SC1200)
+      mode = sc1200_get_vip_mode();
 #	endif
-	return(mode);
+   return (mode);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_get_vbi_enable
  *-----------------------------------------------------------------------------
  */
-int gfx_get_vbi_enable(void)
+int
+gfx_get_vbi_enable(void)
 {
-	int enable = 0;
+   int enable = 0;
+
 #	if GFX_VIP_SC1200
-	if (gfx_vip_type == GFX_VIP_TYPE_SC1200)
-		enable = sc1200_get_vbi_enable();
+   if (gfx_vip_type == GFX_VIP_TYPE_SC1200)
+      enable = sc1200_get_vbi_enable();
 #	endif
-	return(enable);
+   return (enable);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_get_vbi_mode
  *-----------------------------------------------------------------------------
  */
-int gfx_get_vbi_mode(void)
+int
+gfx_get_vbi_mode(void)
 {
-	int mode = 0;
+   int mode = 0;
+
 #	if GFX_VIP_SC1200
-	if (gfx_vip_type == GFX_VIP_TYPE_SC1200)
-		mode = sc1200_get_vbi_mode();
+   if (gfx_vip_type == GFX_VIP_TYPE_SC1200)
+      mode = sc1200_get_vbi_mode();
 #	endif
-	return(mode);
+   return (mode);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_get_vbi_base
  *-----------------------------------------------------------------------------
  */
-unsigned long gfx_get_vbi_base(int odd)
+unsigned long
+gfx_get_vbi_base(int odd)
 {
-	unsigned long base = 0;
+   unsigned long base = 0;
+
 #	if GFX_VIP_SC1200
-	if (gfx_vip_type == GFX_VIP_TYPE_SC1200)
-		base = sc1200_get_vbi_base(odd);
+   if (gfx_vip_type == GFX_VIP_TYPE_SC1200)
+      base = sc1200_get_vbi_base(odd);
 #	endif
-	return(base);
+   return (base);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_get_vbi_direct
  *-----------------------------------------------------------------------------
  */
-unsigned long gfx_get_vbi_direct(int odd)
+unsigned long
+gfx_get_vbi_direct(int odd)
 {
-	unsigned long vbi_direct_lines = 0;
+   unsigned long vbi_direct_lines = 0;
+
 #	if GFX_VIP_SC1200
-	if (gfx_vip_type == GFX_VIP_TYPE_SC1200)
-		vbi_direct_lines = sc1200_get_vbi_direct(odd);
+   if (gfx_vip_type == GFX_VIP_TYPE_SC1200)
+      vbi_direct_lines = sc1200_get_vbi_direct(odd);
 #	endif
-	return(vbi_direct_lines);
+   return (vbi_direct_lines);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_get_vbi_interrupt
  *-----------------------------------------------------------------------------
  */
-int gfx_get_vbi_interrupt(void)
+int
+gfx_get_vbi_interrupt(void)
 {
-	int enable = 0;
+   int enable = 0;
+
 #	if GFX_VIP_SC1200
-	if (gfx_vip_type == GFX_VIP_TYPE_SC1200)
-		enable = sc1200_get_vbi_interrupt();
+   if (gfx_vip_type == GFX_VIP_TYPE_SC1200)
+      enable = sc1200_get_vbi_interrupt();
 #	endif
-	return(enable);
+   return (enable);
 }
 
 /*-----------------------------------------------------------------------------
  * gfx_get_vip_bus_request_threshold_high
  *-----------------------------------------------------------------------------
  */
-int gfx_get_vip_bus_request_threshold_high(void)
+int
+gfx_get_vip_bus_request_threshold_high(void)
 {
-	int enable = 0;
+   int enable = 0;
+
 #	if GFX_VIP_SC1200
-	if (gfx_vip_type == GFX_VIP_TYPE_SC1200)
-		enable = sc1200_get_vip_bus_request_threshold_high();
+   if (gfx_vip_type == GFX_VIP_TYPE_SC1200)
+      enable = sc1200_get_vip_bus_request_threshold_high();
 #	endif
-	return(enable);
+   return (enable);
 }
 
 #endif /* GFX_READ_ROUTINES */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/history.h b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/history.h
index 63d0ddc27..36f7fb98e 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/history.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/history.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/history.h,v 1.1 2002/10/11 14:33:00 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/history.h,v 1.2 2003/02/05 18:38:43 alanh Exp $ */
 /*
  * $Workfile: history.h $
  *
@@ -133,7 +133,7 @@
  * and pp is the patch number (0 - 99)
 */
 
-#define DURANGO_VERSION 24500
+#define DURANGO_VERSION 24902
 
 #if 0
 
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/i2c_acc.c b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/i2c_acc.c
index 440f2ed85..ff205ebda 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/i2c_acc.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/i2c_acc.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/i2c_acc.c,v 1.1 2002/10/11 14:33:00 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/i2c_acc.c,v 1.1 2002/12/10 15:12:26 alanh Exp $ */
 /*
  * $Workfile: i2c_acc.c $
  *
@@ -129,15 +129,14 @@
  *
  * END_NSC_LIC_GPL */
 
-
 /* SUPER IO DEFINITIONS */
 
 #define INDEX_1					0x15C	/* base address 1 selected */
 #define DATA_1					0x15D
 #define INDEX_2					0x2E	/* base address 2 selected */
 #define DATA_2					0x2F
-#define PCI_INDEX				0xCF8 	/* PCI configuration space INDEX */
-#define PCI_DATA				0xCFC 	/* PCI configuration space DATA  */
+#define PCI_INDEX				0xCF8	/* PCI configuration space INDEX */
+#define PCI_DATA				0xCFC	/* PCI configuration space DATA  */
 #define BASE_ADR_MSB_REG		0x60	/* base address MSB register */
 #define BASE_ADR_LSB_REG		0x61	/* base address LSB register */
 
@@ -150,22 +149,22 @@ unsigned short index_reg, data_reg;
 
 /* ACCESS BUS DEFINITIONS */
 
-#define ACC_I2C_TIMEOUT 1000000  /* Number of reads before timing out */
-#define ACB1_BASE 	    0x810    /* ACCESS.bus base addresses         */ 
+#define ACC_I2C_TIMEOUT 1000000		/* Number of reads before timing out */
+#define ACB1_BASE 	    0x810	/* ACCESS.bus base addresses         */
 #define ACB2_BASE 	    0x820
-#define ACBSDA			0        /* ACB serial data                   */
-#define ACBST			1        /* ACB status                        */
-#define ACBCST			2        /* ACB control status                */
-#define ACBCTL1			3        /* ACB control 1                     */
-#define ACBADDR			4        /* ACB own address                   */
-#define ACBCTL2		    5        /* ACB control 2                     */
-#define LDN				0x7	     /* Logical Device Numbers            */
+#define ACBSDA			0	/* ACB serial data                   */
+#define ACBST			1	/* ACB status                        */
+#define ACBCST			2	/* ACB control status                */
+#define ACBCTL1			3	/* ACB control 1                     */
+#define ACBADDR			4	/* ACB own address                   */
+#define ACBCTL2		    5		/* ACB control 2                     */
+#define LDN				0x7	/* Logical Device Numbers            */
 #define ACB1_LDN		0x5
 #define ACB2_LDN		0x6
 
 /* INITIAL ACCESS.bus BASE ADDRESS VALUES */
 
-unsigned short base_address_array[3] = {0, ACB1_BASE, ACB2_BASE};
+unsigned short base_address_array[3] = { 0, ACB1_BASE, ACB2_BASE };
 char Freq = 0x71;
 
 /* LOCAL ACCESS.bus FUNCTION DECLARATIONS */
@@ -189,11 +188,23 @@ unsigned short acc_i2c_set_base_address(unsigned char busnum, short adr);
 
 /* LOCAL HELPER ROUTINES */
 
-void OsPciReadDWord(int bus, int dev, int func, int address, unsigned long * data);
+void OsPciReadDWord(int bus, int dev, int func, int address,
+		    unsigned long *data);
 int sio_set_index_data_reg(void);
 void sio_write_reg(unsigned char reg, unsigned char data);
 unsigned char sio_read_reg(unsigned char reg);
 
+int acc_i2c_reset(unsigned char busnum, short adr, char freq);
+int acc_i2c_write(unsigned char busnum, unsigned char chipadr,
+		  unsigned char subadr, unsigned char bytes,
+		  unsigned char *data);
+int acc_i2c_read(unsigned char busnum, unsigned char chipadr,
+		 unsigned char subadr, unsigned char bytes,
+		 unsigned char *data);
+int acc_i2c_select_gpio(int clock, int data);
+int acc_i2c_init(void);
+void acc_i2c_cleanup(void);
+
 /*---------------------------------------------------------------------------
  * OsPciReadDWord
  *
@@ -204,20 +215,20 @@ unsigned char sio_read_reg(unsigned char reg);
  * Returns : None.
  *---------------------------------------------------------------------------
  */
-void OsPciReadDWord (int bus, int dev, int func, int address, unsigned long * data)
+void
+OsPciReadDWord(int bus, int dev, int func, int address, unsigned long *data)
 {
    /*
     * The address of a double word in the Configuration Header is built in
     * the following way :
     * {10000000,bus[23:16],device[15:11],function[10:8],address[7:2],00}
     */
-    long addr = (0x80000000           |
-                ((bus  & 0xff) << 16) |
-                ((dev  & 0x1f) << 11) |
-                ((func & 0x7)  <<  8) |
-                (address & 0xff));
-    OUTD(PCI_INDEX, addr);
-    *data = IND(PCI_DATA);
+   long addr = (0x80000000 |
+		((bus & 0xff) << 16) |
+		((dev & 0x1f) << 11) |
+		((func & 0x7) << 8) | (address & 0xff));
+   OUTD(PCI_INDEX, addr);
+   *data = IND(PCI_DATA);
 }
 
 /*---------------------------------------------------------------------------
@@ -231,29 +242,28 @@ void OsPciReadDWord (int bus, int dev, int func, int address, unsigned long * da
  *
  *---------------------------------------------------------------------------
  */
-int sio_set_index_data_reg(void)
+int
+sio_set_index_data_reg(void)
 {
-	unsigned long xbus_expention_bar, io_control_reg1;
-
-	OsPciReadDWord (0, 0x12, 5, 0x10, &xbus_expention_bar);
-	xbus_expention_bar = xbus_expention_bar & 0xfffffffe;
-	io_control_reg1 = IND((unsigned short)xbus_expention_bar);
-
-	if ((io_control_reg1) & (SIO_BASE_ADR_15C_15D))
-	{
-		index_reg = INDEX_1;
-		data_reg = DATA_1;
-		return(1);
-	}
-
-	if ((io_control_reg1) & (SIO_BASE_ADR_2E_2F))
-	{
-		index_reg = INDEX_2;
-		data_reg = DATA_2;
-		return(1);
-	}
-
-	return(0);
+   unsigned long xbus_expention_bar, io_control_reg1;
+
+   OsPciReadDWord(0, 0x12, 5, 0x10, &xbus_expention_bar);
+   xbus_expention_bar = xbus_expention_bar & 0xfffffffe;
+   io_control_reg1 = IND((unsigned short)xbus_expention_bar);
+
+   if ((io_control_reg1) & (SIO_BASE_ADR_15C_15D)) {
+      index_reg = INDEX_1;
+      data_reg = DATA_1;
+      return (1);
+   }
+
+   if ((io_control_reg1) & (SIO_BASE_ADR_2E_2F)) {
+      index_reg = INDEX_2;
+      data_reg = DATA_2;
+      return (1);
+   }
+
+   return (0);
 }
 
 /*---------------------------------------------------------------------------
@@ -264,10 +274,11 @@ int sio_set_index_data_reg(void)
  *	Returns : None
  *---------------------------------------------------------------------------
  */
-void sio_write_reg(unsigned char reg, unsigned char data)
+void
+sio_write_reg(unsigned char reg, unsigned char data)
 {
-	OUTB(index_reg, reg);
-	OUTB(data_reg, data);
+   OUTB(index_reg, reg);
+   OUTB(data_reg, data);
 }
 
 /*---------------------------------------------------------------------------
@@ -278,10 +289,11 @@ void sio_write_reg(unsigned char reg, unsigned char data)
  *	Returns : The data read from the requested register
  *---------------------------------------------------------------------------
  */
-unsigned char sio_read_reg(unsigned char reg)
+unsigned char
+sio_read_reg(unsigned char reg)
 {
-	OUTB(index_reg, reg);
-	return INB(data_reg);
+   OUTB(index_reg, reg);
+   return INB(data_reg);
 }
 
 /*---------------------------------------------------------------------------
@@ -297,18 +309,20 @@ unsigned char sio_read_reg(unsigned char reg)
  *---------------------------------------------------------------------------
  */
 #if GFX_I2C_DYNAMIC
-int acc_i2c_reset(unsigned char busnum, short adr, char freq)
+int
+acc_i2c_reset(unsigned char busnum, short adr, char freq)
 #else
-int gfx_i2c_reset(unsigned char busnum, short adr, char freq)
+int
+gfx_i2c_reset(unsigned char busnum, short adr, char freq)
 #endif
 {
-	if ((busnum != 1) && (busnum != 2))
-		return GFX_STATUS_BAD_PARAMETER;
-	acc_i2c_config(busnum, adr, freq);
-	if (base_address_array[busnum] == 0)
-		return GFX_STATUS_ERROR;
-	acc_i2c_reset_bus(busnum);
-	return GFX_STATUS_OK;
+   if ((busnum != 1) && (busnum != 2))
+      return GFX_STATUS_BAD_PARAMETER;
+   acc_i2c_config(busnum, adr, freq);
+   if (base_address_array[busnum] == 0)
+      return GFX_STATUS_ERROR;
+   acc_i2c_reset_bus(busnum);
+   return GFX_STATUS_OK;
 }
 
 /*---------------------------------------------------------------------------
@@ -318,14 +332,16 @@ int gfx_i2c_reset(unsigned char busnum, short adr, char freq)
  *---------------------------------------------------------------------------
  */
 #if GFX_I2C_DYNAMIC
-int acc_i2c_select_gpio(int clock, int data)
+int
+acc_i2c_select_gpio(int clock, int data)
 #else
-int gfx_i2c_select_gpio(int clock, int data)
-#endif 
+int
+gfx_i2c_select_gpio(int clock, int data)
+#endif
 {
-	/* THIS ROUTINE DOES NOT APPLY TO THE ACCESS.bus IMPLEMENTATION. */
+   /* THIS ROUTINE DOES NOT APPLY TO THE ACCESS.bus IMPLEMENTATION. */
 
-	return(GFX_STATUS_OK);
+   return (GFX_STATUS_OK);
 }
 
 /*---------------------------------------------------------------------------
@@ -336,48 +352,53 @@ int gfx_i2c_select_gpio(int clock, int data)
  *---------------------------------------------------------------------------
  */
 #if GFX_I2C_DYNAMIC
-int acc_i2c_write(unsigned char busnum, unsigned char chipadr, unsigned char subadr, 
-	unsigned char bytes, unsigned char * data)
+int
+acc_i2c_write(unsigned char busnum, unsigned char chipadr,
+	      unsigned char subadr, unsigned char bytes, unsigned char *data)
 #else
-int gfx_i2c_write(unsigned char busnum, unsigned char chipadr, unsigned char subadr, 
-	unsigned char bytes, unsigned char * data)
-#endif 
+int
+gfx_i2c_write(unsigned char busnum, unsigned char chipadr,
+	      unsigned char subadr, unsigned char bytes, unsigned char *data)
+#endif
 {
-	int loop = 0;
+   int loop = 0;
 
-	if ((busnum != 1) && (busnum != 2))
-		return GFX_STATUS_BAD_PARAMETER;
+   if ((busnum != 1) && (busnum != 2))
+      return GFX_STATUS_BAD_PARAMETER;
 
-	/* REQUEST MASTER */
+   /* REQUEST MASTER */
 
-	if (!acc_i2c_request_master(busnum)) return(GFX_STATUS_ERROR);
+   if (!acc_i2c_request_master(busnum))
+      return (GFX_STATUS_ERROR);
 
-	/* WRITE ADDRESS COMMAND */
+   /* WRITE ADDRESS COMMAND */
 
-	acc_i2c_ack(busnum, 1, 0);
-	acc_i2c_stall_after_start(busnum, 1);
-	acc_i2c_send_address(busnum, (unsigned char)(chipadr & 0xFE));
-	acc_i2c_stall_after_start(busnum, 0);
-	if (!acc_i2c_ack(busnum, 0, 0)) return(GFX_STATUS_ERROR);
+   acc_i2c_ack(busnum, 1, 0);
+   acc_i2c_stall_after_start(busnum, 1);
+   acc_i2c_send_address(busnum, (unsigned char)(chipadr & 0xFE));
+   acc_i2c_stall_after_start(busnum, 0);
+   if (!acc_i2c_ack(busnum, 0, 0))
+      return (GFX_STATUS_ERROR);
 
-	/* WRITE COMMAND */
-	
-	acc_i2c_write_byte(busnum, subadr);
-	if (!acc_i2c_ack(busnum, 0, 0)) return(GFX_STATUS_ERROR);
+   /* WRITE COMMAND */
 
-	/* WRITE DATA */
+   acc_i2c_write_byte(busnum, subadr);
+   if (!acc_i2c_ack(busnum, 0, 0))
+      return (GFX_STATUS_ERROR);
 
-	for(loop = 0; loop < bytes; loop++)	
-	{
-		acc_i2c_write_byte(busnum, *data);
-		if (loop < (bytes - 1))
-			data += sizeof(unsigned char);
-		if (!acc_i2c_ack(busnum, 0, 0)) return(GFX_STATUS_ERROR);
-	}
-	data -= (bytes - 1);
-	acc_i2c_stop(busnum);
+   /* WRITE DATA */
 
-	return GFX_STATUS_OK;
+   for (loop = 0; loop < bytes; loop++) {
+      acc_i2c_write_byte(busnum, *data);
+      if (loop < (bytes - 1))
+	 data += sizeof(unsigned char);
+      if (!acc_i2c_ack(busnum, 0, 0))
+	 return (GFX_STATUS_ERROR);
+   }
+   data -= (bytes - 1);
+   acc_i2c_stop(busnum);
+
+   return GFX_STATUS_OK;
 }
 
 /*---------------------------------------------------------------------------
@@ -388,87 +409,88 @@ int gfx_i2c_write(unsigned char busnum, unsigned char chipadr, unsigned char sub
  *---------------------------------------------------------------------------
  */
 #if GFX_I2C_DYNAMIC
-int acc_i2c_read(unsigned char busnum, unsigned char chipadr, unsigned char subadr, 
-	unsigned char bytes, unsigned char * data)
+int
+acc_i2c_read(unsigned char busnum, unsigned char chipadr,
+	     unsigned char subadr, unsigned char bytes, unsigned char *data)
 #else
-int gfx_i2c_read(unsigned char busnum, unsigned char chipadr, unsigned char subadr, 
-	unsigned char bytes, unsigned char * data)
-#endif 
+int
+gfx_i2c_read(unsigned char busnum, unsigned char chipadr,
+	     unsigned char subadr, unsigned char bytes, unsigned char *data)
+#endif
 {
-	unsigned char bytesRead;
+   unsigned char bytesRead;
+
+   if ((busnum != 1) && (busnum != 2))
+      return GFX_STATUS_BAD_PARAMETER;
+
+   if (bytes == 0)
+      return GFX_STATUS_OK;
 
-	if ((busnum != 1) && (busnum != 2))
-		return GFX_STATUS_BAD_PARAMETER;
+   /* REQUEST MASTER */
 
-	if (bytes == 0)
-		return GFX_STATUS_OK;
+   if (!acc_i2c_request_master(busnum))
+      return (GFX_STATUS_ERROR);
 
-	/* REQUEST MASTER */
+   /* WRITE ADDRESS COMMAND */
 
-	if (!acc_i2c_request_master(busnum)) return(GFX_STATUS_ERROR);
+   acc_i2c_ack(busnum, 1, 0);
+   acc_i2c_stall_after_start(busnum, 1);
+   acc_i2c_send_address(busnum, (unsigned char)(chipadr & 0xFE));
+   acc_i2c_stall_after_start(busnum, 0);
+   if (!acc_i2c_ack(busnum, 0, 0))
+      return (GFX_STATUS_ERROR);
 
-	/* WRITE ADDRESS COMMAND */
+   /* WRITE COMMAND */
 
-	acc_i2c_ack(busnum, 1, 0);
-	acc_i2c_stall_after_start(busnum, 1);
-	acc_i2c_send_address(busnum, (unsigned char)(chipadr & 0xFE));
-	acc_i2c_stall_after_start(busnum, 0);
-	if (!acc_i2c_ack(busnum, 0, 0)) return(GFX_STATUS_ERROR);
+   acc_i2c_write_byte(busnum, subadr);
+   if (!acc_i2c_ack(busnum, 0, 0))
+      return (GFX_STATUS_ERROR);
 
-	/* WRITE COMMAND */
-	
-	acc_i2c_write_byte(busnum, subadr);
-	if (!acc_i2c_ack(busnum, 0, 0)) return(GFX_STATUS_ERROR);
+   /* START THE READ */
 
-	/* START THE READ */
+   acc_i2c_start(busnum);
 
-	acc_i2c_start(busnum);
+   /* WRITE ADDRESS COMMAND */
 
-	/* WRITE ADDRESS COMMAND */
+   acc_i2c_ack(busnum, 1, 1);
+   acc_i2c_stall_after_start(busnum, 1);
+   acc_i2c_send_address(busnum, (unsigned char)(chipadr | 0x01));
 
-	acc_i2c_ack(busnum, 1, 1);
-	acc_i2c_stall_after_start(busnum, 1);
-	acc_i2c_send_address(busnum, (unsigned char)(chipadr | 0x01));
+   /* IF LAST BYTE */
 
-	/* IF LAST BYTE */
+   if (bytes == 1)
+      acc_i2c_ack(busnum, 1, 1);
+   else
+      acc_i2c_ack(busnum, 1, 0);
 
-	if (bytes == 1)
-		acc_i2c_ack(busnum, 1, 1);
-	else
-		acc_i2c_ack(busnum, 1, 0);
+   acc_i2c_stall_after_start(busnum, 0);
 
-	acc_i2c_stall_after_start(busnum, 0);
+   if (!acc_i2c_ack(busnum, 0, 0))
+      return (GFX_STATUS_ERROR);
 
-	if (!acc_i2c_ack(busnum, 0, 0)) return(GFX_STATUS_ERROR);
+   /* READ COMMAND */
 
-	/* READ COMMAND */
+   for (bytesRead = 0; bytesRead < bytes; bytesRead += 1) {
+      if (bytesRead < (bytes - 2)) {
+	 data[bytesRead] = acc_i2c_read_byte(busnum, 0);
+	 acc_i2c_ack(busnum, 1, 0);
+      } else if (bytesRead == (bytes - 2)) {	/* TWO BYTES LEFT */
+	 acc_i2c_ack(busnum, 1, 1);
+	 data[bytesRead] = acc_i2c_read_byte(busnum, 0);
+	 acc_i2c_ack(busnum, 1, 1);
+      } else {				/* LAST BYTE */
 
-	for(bytesRead = 0; bytesRead < bytes; bytesRead += 1)
-	{
-		if (bytesRead < (bytes - 2))
-		{
-			data[bytesRead] = acc_i2c_read_byte(busnum, 0);
-			acc_i2c_ack(busnum, 1, 0);
-		}
-		else if (bytesRead == (bytes - 2))   /* TWO BYTES LEFT */
-		{
-			acc_i2c_ack(busnum, 1, 1);
-			data[bytesRead] = acc_i2c_read_byte(busnum, 0);
-			acc_i2c_ack(busnum, 1, 1);
-		}
-		else                                 /* LAST BYTE */
-		{
-			data[bytesRead] = acc_i2c_read_byte(busnum, 1);
-			acc_i2c_stop(busnum);
-		}
+	 data[bytesRead] = acc_i2c_read_byte(busnum, 1);
+	 acc_i2c_stop(busnum);
+      }
 
-		/* WHILE NOT LAST BYTE */
+      /* WHILE NOT LAST BYTE */
 
-		if ((!(bytesRead == (bytes - 1))) && (!acc_i2c_ack(busnum, 0, 0)))
-			return(bytesRead);
-	}
+      if ((!(bytesRead == (bytes - 1))) && (!acc_i2c_ack(busnum, 0, 0)))
+	 return (bytesRead);
+   }
 
-	return GFX_STATUS_OK;
+   return GFX_STATUS_OK;
 }
 
 /*---------------------------------------------------------------------------
@@ -478,13 +500,15 @@ int gfx_i2c_read(unsigned char busnum, unsigned char chipadr, unsigned char suba
  *---------------------------------------------------------------------------
  */
 #if GFX_I2C_DYNAMIC
-int acc_i2c_init(void)
+int
+acc_i2c_init(void)
 #else
-int gfx_i2c_init(void)
+int
+gfx_i2c_init(void)
 #endif
 {
-	/* ### ADD ### THIS ROUTINE IS NOT YET IMPLEMENTED FOR ACCESS.bus */
-	return(GFX_STATUS_OK);
+   /* ### ADD ### THIS ROUTINE IS NOT YET IMPLEMENTED FOR ACCESS.bus */
+   return (GFX_STATUS_OK);
 }
 
 /*---------------------------------------------------------------------------
@@ -494,12 +518,14 @@ int gfx_i2c_init(void)
  *---------------------------------------------------------------------------
  */
 #if GFX_I2C_DYNAMIC
-void acc_i2c_cleanup(void)
+void
+acc_i2c_cleanup(void)
 #else
-void gfx_i2c_cleanup(void)
+void
+gfx_i2c_cleanup(void)
 #endif
 {
-	/* ### ADD ### THIS ROUTINE IS NOT YET IMPLEMENTED FOR ACCESS.bus */
+   /* ### ADD ### THIS ROUTINE IS NOT YET IMPLEMENTED FOR ACCESS.bus */
 }
 
 /*--------------------------------------------------------*/
@@ -512,38 +538,40 @@ void gfx_i2c_cleanup(void)
  * This routine resets the I2C bus.
  *---------------------------------------------------------------------------
  */
-void acc_i2c_reset_bus(unsigned char busnum)
+void
+acc_i2c_reset_bus(unsigned char busnum)
 {
-	unsigned char reg;
-	unsigned short bus_base_address = base_address_array[busnum];
+   unsigned char reg;
+   unsigned short bus_base_address = base_address_array[busnum];
 
-	/* Disable the ACCESS.bus device and */
-	/* Configure the SCL frequency */
-	OUTB((unsigned short)(bus_base_address + ACBCTL2), (unsigned char)(Freq & 0xFE));
+   /* Disable the ACCESS.bus device and */
+   /* Configure the SCL frequency */
+   OUTB((unsigned short)(bus_base_address + ACBCTL2),
+	(unsigned char)(Freq & 0xFE));
 
-	/* Configure no interrupt mode (polling) and */
-	/* Disable global call address */
-	OUTB((unsigned short)(bus_base_address + ACBCTL1), 0x0);
+   /* Configure no interrupt mode (polling) and */
+   /* Disable global call address */
+   OUTB((unsigned short)(bus_base_address + ACBCTL1), 0x0);
 
-	/* Disable slave address */
-	OUTB((unsigned short)(bus_base_address + ACBADDR), 0x0);
+   /* Disable slave address */
+   OUTB((unsigned short)(bus_base_address + ACBADDR), 0x0);
 
-	/* Enable the ACCESS.bus device */
- 	reg = INB((unsigned short)(bus_base_address + ACBCTL2));
-	reg |= 0x01;
-	OUTB((unsigned short)(bus_base_address + ACBCTL2), reg);
+   /* Enable the ACCESS.bus device */
+   reg = INB((unsigned short)(bus_base_address + ACBCTL2));
+   reg |= 0x01;
+   OUTB((unsigned short)(bus_base_address + ACBCTL2), reg);
 
-  	/* Issue STOP event */
+   /* Issue STOP event */
 
-	acc_i2c_stop(busnum);
+   acc_i2c_stop(busnum);
 
-	/* Clear NEGACK, STASTR and BER bits */
-	OUTB((unsigned short)(bus_base_address + ACBST), 0x38);
+   /* Clear NEGACK, STASTR and BER bits */
+   OUTB((unsigned short)(bus_base_address + ACBST), 0x38);
 
-	/* Clear BB (BUS BUSY) bit */
- 	reg = INB((unsigned short)(bus_base_address + ACBCST));
-	reg |= 0x02;
-	OUTB((unsigned short)(bus_base_address + ACBCST), reg);
+   /* Clear BB (BUS BUSY) bit */
+   reg = INB((unsigned short)(bus_base_address + ACBCST));
+   reg |= 0x02;
+   OUTB((unsigned short)(bus_base_address + ACBCST), reg);
 }
 
 /*---------------------------------------------------------------------------
@@ -552,13 +580,15 @@ void acc_i2c_reset_bus(unsigned char busnum)
  * This routine starts a transfer on the I2C bus.
  *---------------------------------------------------------------------------
  */
-void acc_i2c_start(unsigned char busnum)
+void
+acc_i2c_start(unsigned char busnum)
 {
-	unsigned char reg;
-	unsigned short bus_base_address = base_address_array[busnum];
-	reg = INB((unsigned short)(bus_base_address + ACBCTL1));
-	reg |= 0x01;
-	OUTB((unsigned short)(bus_base_address + ACBCTL1), reg);
+   unsigned char reg;
+   unsigned short bus_base_address = base_address_array[busnum];
+
+   reg = INB((unsigned short)(bus_base_address + ACBCTL1));
+   reg |= 0x01;
+   OUTB((unsigned short)(bus_base_address + ACBCTL1), reg);
 }
 
 /*---------------------------------------------------------------------------
@@ -567,99 +597,105 @@ void acc_i2c_start(unsigned char busnum)
  * This routine stops a transfer on the I2C bus.
  *---------------------------------------------------------------------------
  */
-void acc_i2c_stop(unsigned char busnum)
+void
+acc_i2c_stop(unsigned char busnum)
 {
-	unsigned char reg;
-	unsigned short bus_base_address = base_address_array[busnum];
-	reg = INB((unsigned short)(bus_base_address + ACBCTL1));
-	reg |= 0x02;
-	OUTB((unsigned short)(bus_base_address + ACBCTL1), reg);
+   unsigned char reg;
+   unsigned short bus_base_address = base_address_array[busnum];
+
+   reg = INB((unsigned short)(bus_base_address + ACBCTL1));
+   reg |= 0x02;
+   OUTB((unsigned short)(bus_base_address + ACBCTL1), reg);
 }
 
 /*---------------------------------------------------------------------------
  * acc_i2c_abort_data
  *---------------------------------------------------------------------------
  */
-void acc_i2c_abort_data(unsigned char busnum)
+void
+acc_i2c_abort_data(unsigned char busnum)
 {
-	unsigned char reg;
-	unsigned short bus_base_address = base_address_array[busnum];
-	acc_i2c_stop(busnum);
-	reg = INB((unsigned short)(bus_base_address + ACBCTL1));
-	reg |= 0x10;
-	OUTB((unsigned short)(bus_base_address + ACBCTL1), reg);
+   unsigned char reg;
+   unsigned short bus_base_address = base_address_array[busnum];
+
+   acc_i2c_stop(busnum);
+   reg = INB((unsigned short)(bus_base_address + ACBCTL1));
+   reg |= 0x10;
+   OUTB((unsigned short)(bus_base_address + ACBCTL1), reg);
 }
 
 /*---------------------------------------------------------------------------
  * acc_i2c_bus_recovery
  *---------------------------------------------------------------------------
  */
-void acc_i2c_bus_recovery(unsigned char busnum)
+void
+acc_i2c_bus_recovery(unsigned char busnum)
 {
-	acc_i2c_abort_data(busnum);
-	acc_i2c_reset_bus(busnum);
+   acc_i2c_abort_data(busnum);
+   acc_i2c_reset_bus(busnum);
 }
 
 /*---------------------------------------------------------------------------
  * acc_i2c_stall_after_start
  *---------------------------------------------------------------------------
  */
-void acc_i2c_stall_after_start(unsigned char busnum, int state)
+void
+acc_i2c_stall_after_start(unsigned char busnum, int state)
 {
-	unsigned char reg;
-	unsigned short bus_base_address = base_address_array[busnum];
-	reg = INB((unsigned short)(bus_base_address + ACBCTL1));
-	if (state) reg |= 0x80;
-	else reg &= 0x7F;
-	OUTB((unsigned short)(bus_base_address + ACBCTL1), reg);
-
-	if (!state)
-	{
-		reg = INB((unsigned short)(bus_base_address + ACBST));
-		reg |= 0x08;
-		OUTB((unsigned short)(bus_base_address + ACBST), reg);
-	}
+   unsigned char reg;
+   unsigned short bus_base_address = base_address_array[busnum];
+
+   reg = INB((unsigned short)(bus_base_address + ACBCTL1));
+   if (state)
+      reg |= 0x80;
+   else
+      reg &= 0x7F;
+   OUTB((unsigned short)(bus_base_address + ACBCTL1), reg);
+
+   if (!state) {
+      reg = INB((unsigned short)(bus_base_address + ACBST));
+      reg |= 0x08;
+      OUTB((unsigned short)(bus_base_address + ACBST), reg);
+   }
 }
 
 /*---------------------------------------------------------------------------
  * acc_i2c_send_address
  *---------------------------------------------------------------------------
  */
-void acc_i2c_send_address(unsigned char busnum, unsigned char cData)
+void
+acc_i2c_send_address(unsigned char busnum, unsigned char cData)
 {
-	unsigned char reg;
-	unsigned short bus_base_address = base_address_array[busnum];
-	unsigned long timeout = 0;
-	
-	/* WRITE THE DATA */
-
-	OUTB((unsigned short)(bus_base_address + ACBSDA), cData);
-	while (1) {
-		reg = INB((unsigned short)(bus_base_address + ACBST));
-		if ((reg & 0x38) != 0)		/* check STASTR, BER and NEGACK */
-			break;
-        if (timeout++ == ACC_I2C_TIMEOUT)
-        {
-            acc_i2c_bus_recovery(busnum);
-            return;
-        }
-	}
-
-	/* CHECK FOR BUS ERROR */
-
-	if (reg & 0x20) 
-	{	
-		acc_i2c_bus_recovery(busnum);
-		return;
-	}
-
-	/* CHECK NEGATIVE ACKNOWLEDGE */
-
-	if (reg & 0x10) 
-	{	
-		acc_i2c_abort_data(busnum);
-		return;
-	}
+   unsigned char reg;
+   unsigned short bus_base_address = base_address_array[busnum];
+   unsigned long timeout = 0;
+
+   /* WRITE THE DATA */
+
+   OUTB((unsigned short)(bus_base_address + ACBSDA), cData);
+   while (1) {
+      reg = INB((unsigned short)(bus_base_address + ACBST));
+      if ((reg & 0x38) != 0)		/* check STASTR, BER and NEGACK */
+	 break;
+      if (timeout++ == ACC_I2C_TIMEOUT) {
+	 acc_i2c_bus_recovery(busnum);
+	 return;
+      }
+   }
+
+   /* CHECK FOR BUS ERROR */
+
+   if (reg & 0x20) {
+      acc_i2c_bus_recovery(busnum);
+      return;
+   }
+
+   /* CHECK NEGATIVE ACKNOWLEDGE */
+
+   if (reg & 0x10) {
+      acc_i2c_abort_data(busnum);
+      return;
+   }
 
 }
 
@@ -669,55 +705,52 @@ void acc_i2c_send_address(unsigned char busnum, unsigned char cData)
  * This routine looks for acknowledge on the I2C bus.
  *---------------------------------------------------------------------------
  */
-int acc_i2c_ack(unsigned char busnum, int fPut, int negAck)
+int
+acc_i2c_ack(unsigned char busnum, int fPut, int negAck)
 {
-	unsigned char reg;
-	unsigned short bus_base_address = base_address_array[busnum];
-	unsigned long timeout = 0;
-
-	if (fPut) {		/* read operation */
-		if (!negAck) {
-			/* Push Ack onto I2C bus */
-			reg = INB((unsigned short)(bus_base_address + ACBCTL1));
-			reg &= 0xE7;
-			OUTB((unsigned short)(bus_base_address + ACBCTL1), reg);
-		}
-		else {
-			/* Push negAck onto I2C bus */
-			reg = INB((unsigned short)(bus_base_address + ACBCTL1));
-			reg |= 0x10;
-			OUTB((unsigned short)(bus_base_address + ACBCTL1), reg);
-		}
-	} else {		/* write operation */
-		/* Receive Ack from I2C bus */
-		while (1) {
-			reg = INB((unsigned short)(bus_base_address + ACBST));
-			if ((reg & 0x70) != 0)		/* check SDAST, BER and NEGACK */
-				break;
-	        if (timeout++ == ACC_I2C_TIMEOUT)
-			{
-				acc_i2c_bus_recovery(busnum);
-				return(0);
-			}
-		}
-
-		/* CHECK FOR BUS ERROR */
-
-		if (reg & 0x20) 
-		{	
-			acc_i2c_bus_recovery(busnum);
-			return(0);
-		}
-
-		/* CHECK NEGATIVE ACKNOWLEDGE */
-
-		if (reg & 0x10) 
-		{	
-			acc_i2c_abort_data(busnum);
-			return(0);
-		}
-	}
-	return (1);
+   unsigned char reg;
+   unsigned short bus_base_address = base_address_array[busnum];
+   unsigned long timeout = 0;
+
+   if (fPut) {				/* read operation */
+      if (!negAck) {
+	 /* Push Ack onto I2C bus */
+	 reg = INB((unsigned short)(bus_base_address + ACBCTL1));
+	 reg &= 0xE7;
+	 OUTB((unsigned short)(bus_base_address + ACBCTL1), reg);
+      } else {
+	 /* Push negAck onto I2C bus */
+	 reg = INB((unsigned short)(bus_base_address + ACBCTL1));
+	 reg |= 0x10;
+	 OUTB((unsigned short)(bus_base_address + ACBCTL1), reg);
+      }
+   } else {				/* write operation */
+      /* Receive Ack from I2C bus */
+      while (1) {
+	 reg = INB((unsigned short)(bus_base_address + ACBST));
+	 if ((reg & 0x70) != 0)		/* check SDAST, BER and NEGACK */
+	    break;
+	 if (timeout++ == ACC_I2C_TIMEOUT) {
+	    acc_i2c_bus_recovery(busnum);
+	    return (0);
+	 }
+      }
+
+      /* CHECK FOR BUS ERROR */
+
+      if (reg & 0x20) {
+	 acc_i2c_bus_recovery(busnum);
+	 return (0);
+      }
+
+      /* CHECK NEGATIVE ACKNOWLEDGE */
+
+      if (reg & 0x10) {
+	 acc_i2c_abort_data(busnum);
+	 return (0);
+      }
+   }
+   return (1);
 }
 
 /*---------------------------------------------------------------------------
@@ -726,13 +759,15 @@ int acc_i2c_ack(unsigned char busnum, int fPut, int negAck)
  * This routine stops the ACCESS.bus clock.
  *---------------------------------------------------------------------------
  */
-void acc_i2c_stop_clock(unsigned char busnum) 
+void
+acc_i2c_stop_clock(unsigned char busnum)
 {
-	unsigned char reg;
-	unsigned short bus_base_address = base_address_array[busnum];
-	reg = INB((unsigned short)(bus_base_address + ACBCTL2));
-	reg &= ~0x01;
-	OUTB((unsigned short)(bus_base_address + ACBCTL2), reg);
+   unsigned char reg;
+   unsigned short bus_base_address = base_address_array[busnum];
+
+   reg = INB((unsigned short)(bus_base_address + ACBCTL2));
+   reg &= ~0x01;
+   OUTB((unsigned short)(bus_base_address + ACBCTL2), reg);
 }
 
 /*---------------------------------------------------------------------------
@@ -741,13 +776,15 @@ void acc_i2c_stop_clock(unsigned char busnum)
  * This routine activates the ACCESS.bus clock.
  *---------------------------------------------------------------------------
  */
-void acc_i2c_activate_clock(unsigned char busnum)
+void
+acc_i2c_activate_clock(unsigned char busnum)
 {
-	unsigned char reg;
-	unsigned short bus_base_address = base_address_array[busnum];
-	reg = INB((unsigned short)(bus_base_address + ACBCTL2));
-	reg |= 0x01;
-	OUTB((unsigned short)(bus_base_address + ACBCTL2), reg);
+   unsigned char reg;
+   unsigned short bus_base_address = base_address_array[busnum];
+
+   reg = INB((unsigned short)(bus_base_address + ACBCTL2));
+   reg |= 0x01;
+   OUTB((unsigned short)(bus_base_address + ACBCTL2), reg);
 }
 
 /*---------------------------------------------------------------------------
@@ -756,41 +793,40 @@ void acc_i2c_activate_clock(unsigned char busnum)
  * This routine writes a byte to the I2C bus
  *---------------------------------------------------------------------------
  */
-void acc_i2c_write_byte(unsigned char busnum, unsigned char cData)
+void
+acc_i2c_write_byte(unsigned char busnum, unsigned char cData)
 {
-	unsigned char reg;
-	unsigned short bus_base_address = base_address_array[busnum];
-	unsigned long timeout = 0;
-
-	while (1) {
-		reg = INB((unsigned short)(bus_base_address + ACBST));
-		if (reg & 0x70) break;
-        if (timeout++ == ACC_I2C_TIMEOUT)
-        {
-            acc_i2c_bus_recovery(busnum);
-            return;
-        }
-	}
-
-	/* CHECK FOR BUS ERROR */
-
-	if (reg & 0x20) 
-	{	
-		acc_i2c_bus_recovery(busnum);
-		return;
-	}
-
-	/* CHECK NEGATIVE ACKNOWLEDGE */
-
-	if (reg & 0x10) 
-	{	
-		acc_i2c_abort_data(busnum);
-		return;
-	}
-
-	/* WRITE THE DATA */
-
-	OUTB((unsigned short)(bus_base_address + ACBSDA), cData);
+   unsigned char reg;
+   unsigned short bus_base_address = base_address_array[busnum];
+   unsigned long timeout = 0;
+
+   while (1) {
+      reg = INB((unsigned short)(bus_base_address + ACBST));
+      if (reg & 0x70)
+	 break;
+      if (timeout++ == ACC_I2C_TIMEOUT) {
+	 acc_i2c_bus_recovery(busnum);
+	 return;
+      }
+   }
+
+   /* CHECK FOR BUS ERROR */
+
+   if (reg & 0x20) {
+      acc_i2c_bus_recovery(busnum);
+      return;
+   }
+
+   /* CHECK NEGATIVE ACKNOWLEDGE */
+
+   if (reg & 0x10) {
+      acc_i2c_abort_data(busnum);
+      return;
+   }
+
+   /* WRITE THE DATA */
+
+   OUTB((unsigned short)(bus_base_address + ACBSDA), cData);
 }
 
 /*---------------------------------------------------------------------------
@@ -799,77 +835,76 @@ void acc_i2c_write_byte(unsigned char busnum, unsigned char cData)
  * This routine reads a byte from the I2C bus
  *---------------------------------------------------------------------------
  */
-unsigned char acc_i2c_read_byte(unsigned char busnum, int last_byte)
+unsigned char
+acc_i2c_read_byte(unsigned char busnum, int last_byte)
 {
-	unsigned char cData, reg;
-	unsigned short bus_base_address = base_address_array[busnum];
-	unsigned long timeout = 0;
-
-	while (1) {
-		reg = INB((unsigned short)(bus_base_address + ACBST));
-		if (reg & 0x60) break;
-        if (timeout++ == ACC_I2C_TIMEOUT)
-        {
-            acc_i2c_bus_recovery(busnum);
-            return(0xEF);
-        }
-	}
-
-	/* CHECK FOR BUS ERROR */
-
-	if (reg & 0x20)
-	{
-		acc_i2c_bus_recovery(busnum);
-		return(0xEE);
-	}
-
-	/* READ DATA */
-	if (last_byte)
-		acc_i2c_stop_clock(busnum);
-	cData = INB((unsigned short)(bus_base_address + ACBSDA));
-	if (last_byte)
-		acc_i2c_activate_clock(busnum);
-
-	return (cData);
+   unsigned char cData, reg;
+   unsigned short bus_base_address = base_address_array[busnum];
+   unsigned long timeout = 0;
+
+   while (1) {
+      reg = INB((unsigned short)(bus_base_address + ACBST));
+      if (reg & 0x60)
+	 break;
+      if (timeout++ == ACC_I2C_TIMEOUT) {
+	 acc_i2c_bus_recovery(busnum);
+	 return (0xEF);
+      }
+   }
+
+   /* CHECK FOR BUS ERROR */
+
+   if (reg & 0x20) {
+      acc_i2c_bus_recovery(busnum);
+      return (0xEE);
+   }
+
+   /* READ DATA */
+   if (last_byte)
+      acc_i2c_stop_clock(busnum);
+   cData = INB((unsigned short)(bus_base_address + ACBSDA));
+   if (last_byte)
+      acc_i2c_activate_clock(busnum);
+
+   return (cData);
 }
 
 /*---------------------------------------------------------------------------
  * acc_i2c_request_master
  *---------------------------------------------------------------------------
  */
-int acc_i2c_request_master(unsigned char busnum)
+int
+acc_i2c_request_master(unsigned char busnum)
 {
-	unsigned char reg;
-	unsigned short bus_base_address = base_address_array[busnum];
-	unsigned long timeout = 0;
-
-	acc_i2c_start(busnum);
-	while (1) {
-		reg = INB((unsigned short)(bus_base_address + ACBST));
-		if (reg & 0x60) break;
-        if (timeout++ == ACC_I2C_TIMEOUT)
-        {
-            acc_i2c_bus_recovery(busnum);
-            return(0);
-        }
-	}
-
-	/* CHECK FOR BUS ERROR */
-
-	if (reg & 0x20) 
-	{	
-		acc_i2c_abort_data(busnum);
-		return(0);
-	}
-
-	/* CHECK NEGATIVE ACKNOWLEDGE */
-
-	if (reg & 0x10) 
-	{	
-		acc_i2c_abort_data(busnum);
-		return(0);
-	}
-	return(1);
+   unsigned char reg;
+   unsigned short bus_base_address = base_address_array[busnum];
+   unsigned long timeout = 0;
+
+   acc_i2c_start(busnum);
+   while (1) {
+      reg = INB((unsigned short)(bus_base_address + ACBST));
+      if (reg & 0x60)
+	 break;
+      if (timeout++ == ACC_I2C_TIMEOUT) {
+	 acc_i2c_bus_recovery(busnum);
+	 return (0);
+      }
+   }
+
+   /* CHECK FOR BUS ERROR */
+
+   if (reg & 0x20) {
+      acc_i2c_abort_data(busnum);
+      return (0);
+   }
+
+   /* CHECK NEGATIVE ACKNOWLEDGE */
+
+   if (reg & 0x10) {
+      acc_i2c_abort_data(busnum);
+      return (0);
+   }
+   return (1);
 }
 
 /*--------------------------------------------------------*/
@@ -882,10 +917,11 @@ int acc_i2c_request_master(unsigned char busnum)
  * This routine configures the I2C bus
  *----------------------------------------------------------------------------
  */
-void acc_i2c_config(unsigned char busnum, short adr, char freq)
+void
+acc_i2c_config(unsigned char busnum, short adr, char freq)
 {
-	base_address_array[busnum] = acc_i2c_set_base_address(busnum, adr);
-	Freq = acc_i2c_set_freq(busnum, freq);
+   base_address_array[busnum] = acc_i2c_set_base_address(busnum, adr);
+   Freq = acc_i2c_set_freq(busnum, freq);
 }
 
 /*----------------------------------------------------------------------------
@@ -894,22 +930,22 @@ void acc_i2c_config(unsigned char busnum, short adr, char freq)
  * This routine sets the frequency of the I2C bus
  *----------------------------------------------------------------------------
  */
-char acc_i2c_set_freq(unsigned char busnum, char freq)
+char
+acc_i2c_set_freq(unsigned char busnum, char freq)
 {
-	unsigned short bus_base_address = base_address_array[busnum];
+   unsigned short bus_base_address = base_address_array[busnum];
 
-	OUTB((unsigned short)(bus_base_address + ACBCTL2), 0x0);
+   OUTB((unsigned short)(bus_base_address + ACBCTL2), 0x0);
 
-	if (freq == -1)
-		freq = 0x71;
-	else
-	{
-		freq = freq << 1;
-		freq |= 0x01;
-	}
+   if (freq == -1)
+      freq = 0x71;
+   else {
+      freq = freq << 1;
+      freq |= 0x01;
+   }
 
-	OUTB((unsigned short)(bus_base_address + ACBCTL2), freq);
-	return (freq);
+   OUTB((unsigned short)(bus_base_address + ACBCTL2), freq);
+   return (freq);
 }
 
 /*---------------------------------------------------------------------------
@@ -918,37 +954,37 @@ char acc_i2c_set_freq(unsigned char busnum, char freq)
  * This routine sets the base address of the I2C bus
  *---------------------------------------------------------------------------
  */
-unsigned short acc_i2c_set_base_address(unsigned char busnum, short adr)
+unsigned short
+acc_i2c_set_base_address(unsigned char busnum, short adr)
 {
-	unsigned short ab_base_addr;
-
-	/* Get Super I/O Index and Data registers */
-	if (!sio_set_index_data_reg())
-		return (0);
-
-	/* Configure LDN to current ACB */
-	if (busnum == 1)
-		sio_write_reg(LDN, ACB1_LDN);
-	if (busnum == 2)
-		sio_write_reg(LDN, ACB2_LDN);
-
-	if (adr == -1) {
-		/* Get ACCESS.bus base address */
-		ab_base_addr = sio_read_reg(BASE_ADR_MSB_REG);
-		ab_base_addr = ab_base_addr << 8;
-		ab_base_addr |= sio_read_reg(BASE_ADR_LSB_REG);
-		if (ab_base_addr != 0)
-			return ab_base_addr;
-		else
-			adr = (busnum == 1 ? ACB1_BASE : ACB2_BASE);
-	}
-
-	/* Set ACCESS.bus base address */
-	sio_write_reg(BASE_ADR_LSB_REG, (unsigned char)(adr & 0xFF));
-	sio_write_reg(BASE_ADR_MSB_REG, (unsigned char)(adr >> 8));
-
-	return adr;
+   unsigned short ab_base_addr;
+
+   /* Get Super I/O Index and Data registers */
+   if (!sio_set_index_data_reg())
+      return (0);
+
+   /* Configure LDN to current ACB */
+   if (busnum == 1)
+      sio_write_reg(LDN, ACB1_LDN);
+   if (busnum == 2)
+      sio_write_reg(LDN, ACB2_LDN);
+
+   if (adr == -1) {
+      /* Get ACCESS.bus base address */
+      ab_base_addr = sio_read_reg(BASE_ADR_MSB_REG);
+      ab_base_addr = ab_base_addr << 8;
+      ab_base_addr |= sio_read_reg(BASE_ADR_LSB_REG);
+      if (ab_base_addr != 0)
+	 return ab_base_addr;
+      else
+	 adr = (busnum == 1 ? ACB1_BASE : ACB2_BASE);
+   }
+
+   /* Set ACCESS.bus base address */
+   sio_write_reg(BASE_ADR_LSB_REG, (unsigned char)(adr & 0xFF));
+   sio_write_reg(BASE_ADR_MSB_REG, (unsigned char)(adr >> 8));
+
+   return adr;
 }
 
 /* END OF FILE */
-
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/i2c_gpio.c b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/i2c_gpio.c
index b2f49c80e..096750d51 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/i2c_gpio.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/i2c_gpio.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/i2c_gpio.c,v 1.1 2002/10/11 14:33:01 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/i2c_gpio.c,v 1.1 2002/12/10 15:12:26 alanh Exp $ */
 /*
  * $Workfile: i2c_gpio.c $
  *
@@ -129,7 +129,6 @@
  *
  * END_NSC_LIC_GPL */
 
-
 /* STATIC VARIABLES TO STORE WHAT GPIO PINS TO USE */
 
 int gpio_clock = 0;
@@ -137,11 +136,11 @@ int gpio_data = 0;
 
 static int g_initialized = 0;
 
-#define	I2CWRITE		0x00		/* Write address */
-#define	I2CREAD			0x01		/* Read address */
+#define	I2CWRITE		0x00	/* Write address */
+#define	I2CREAD			0x01	/* Read address */
 
-#define	I2CACK			0x00		/* Ack value */
-#define	I2CNACK			0x01		/* Not - ack value */
+#define	I2CACK			0x00	/* Ack value */
+#define	I2CNACK			0x01	/* Not - ack value */
 
 #define		CS5530_ID	(0x80000000 | (0x00<<16) | (0x12<<11) | (0<<8) | 0x00)
 #define		CS5530_GPIO	(0x80000000 | (0x00<<16) | (0x12<<11) | (0<<8) | 0x90)
@@ -153,8 +152,10 @@ static int g_initialized = 0;
 int I2C_init(void);
 void I2C_cleanup(void);
 
-int I2C_Read(unsigned char address, unsigned int reg, unsigned long *p_value, unsigned int bytes);
-int I2C_Write(unsigned char address, unsigned int reg, unsigned long value, unsigned int bytes);
+int I2C_Read(unsigned char address, unsigned int reg, unsigned long *p_value,
+	     unsigned int bytes);
+int I2C_Write(unsigned char address, unsigned int reg, unsigned long value,
+	      unsigned int bytes);
 int I2CAL_init(void);
 void I2CAL_cleanup(void);
 
@@ -171,9 +172,19 @@ void SendI2CData(unsigned char inData);
 unsigned char ReceiveI2CAck(void);
 void SendI2CStop(void);
 void SendI2CNack(void);
-void SendI2CAck (void);
+void SendI2CAck(void);
 unsigned char ReceiveI2CData(void);
 
+int gpio_i2c_reset(unsigned char busnum, short adr, char freq);
+int gpio_i2c_write(unsigned char busnum, unsigned char chipadr,
+		   unsigned char subadr, unsigned char bytes,
+		   unsigned char *data);
+int gpio_i2c_read(unsigned char busnum, unsigned char chipadr,
+		  unsigned char subadr, unsigned char bytes,
+		  unsigned char *data);
+int gpio_i2c_select_gpio(int clock, int data);
+int gpio_i2c_init(void);
+void gpio_i2c_cleanup(void);
 
 /* ### ADD ### ANY LOCAL ROUTINE DEFINITIONS SPECIFIC TO GPIO */
 
@@ -185,13 +196,15 @@ unsigned char ReceiveI2CData(void);
  */
 
 #if GFX_I2C_DYNAMIC
-int gpio_i2c_reset(unsigned char busnum, short adr, char freq)
+int
+gpio_i2c_reset(unsigned char busnum, short adr, char freq)
 #else
-int gfx_i2c_reset(unsigned char busnum, short adr, char freq)
+int
+gfx_i2c_reset(unsigned char busnum, short adr, char freq)
 #endif
 {
-	/* ### ADD ### Any code needed to reset the state of the GPIOs. */
-	return GFX_STATUS_OK;
+   /* ### ADD ### Any code needed to reset the state of the GPIOs. */
+   return GFX_STATUS_OK;
 }
 
 /*---------------------------------------------------------------------------
@@ -201,14 +214,16 @@ int gfx_i2c_reset(unsigned char busnum, short adr, char freq)
  *---------------------------------------------------------------------------
  */
 #if GFX_I2C_DYNAMIC
-int gpio_i2c_select_gpio(int clock, int data)
+int
+gpio_i2c_select_gpio(int clock, int data)
 #else
-int gfx_i2c_select_gpio(int clock, int data)
-#endif 
+int
+gfx_i2c_select_gpio(int clock, int data)
+#endif
 {
-	gpio_clock = clock;
-	gpio_data = data;
-	return(0);
+   gpio_clock = clock;
+   gpio_data = data;
+   return (0);
 }
 
 /*---------------------------------------------------------------------------
@@ -218,69 +233,62 @@ int gfx_i2c_select_gpio(int clock, int data)
  *---------------------------------------------------------------------------
  */
 #if GFX_I2C_DYNAMIC
-int gpio_i2c_write(unsigned char busnum, unsigned char address, unsigned char reg, 
-	unsigned char bytes, unsigned char * value)
+int
+gpio_i2c_write(unsigned char busnum, unsigned char address, unsigned char reg,
+	       unsigned char bytes, unsigned char *value)
 #else
-int gfx_i2c_write(unsigned char busnum, unsigned char address, unsigned char reg, 
-	unsigned char bytes, unsigned char * value)
-#endif 
+int
+gfx_i2c_write(unsigned char busnum, unsigned char address, unsigned char reg,
+	      unsigned char bytes, unsigned char *value)
+#endif
 {
-	/* ### ADD ### CODE TO WRITE BYTE TO I2B BUS */
-	
-	int restart_count = 0;
-	
-
-	while (restart_count++ < 5)
-	{
-		/* set the access pointer register. */
-		/* The address is shifted left by one to make room for Read/Write bit */
-		SendI2CStart();
-		SendI2CData((char)((address << 1) | I2CWRITE));
-		if (!ReceiveI2CAck())
-		{
-			SendI2CStop();
-			gfx_delay_milliseconds(10);
-			continue;
-		}
-		SendI2CData((unsigned char)reg);
-		if (!ReceiveI2CAck())
-		{
-			SendI2CStop();
-			gfx_delay_milliseconds(10);
-			continue;
-		}
-
-		/* write the first byte */
-		SendI2CData(*value);
-		if (!ReceiveI2CAck())
-		{
-			SendI2CStop();
-			gfx_delay_milliseconds(10);
-			continue;
-		}
-
-
-		/* write the second byte. */
-		if (bytes == 2)
-		{
-			SendI2CData(*(value+1));
-			if (!ReceiveI2CAck())
-			{
-				SendI2CStop();
-				gfx_delay_milliseconds(10);
-				continue;
-			}
-		}
-
-
-		/* done. */
-		SendI2CStop();
-
-		return 0;
-	}
-
-	return(0);
-	
+   /* ### ADD ### CODE TO WRITE BYTE TO I2B BUS */
+
+   int restart_count = 0;
+
+   while (restart_count++ < 5) {
+      /* set the access pointer register. */
+      /* The address is shifted left by one to make room for Read/Write bit */
+      SendI2CStart();
+      SendI2CData((char)((address << 1) | I2CWRITE));
+      if (!ReceiveI2CAck()) {
+	 SendI2CStop();
+	 gfx_delay_milliseconds(10);
+	 continue;
+      }
+      SendI2CData((unsigned char)reg);
+      if (!ReceiveI2CAck()) {
+	 SendI2CStop();
+	 gfx_delay_milliseconds(10);
+	 continue;
+      }
+
+      /* write the first byte */
+      SendI2CData(*value);
+      if (!ReceiveI2CAck()) {
+	 SendI2CStop();
+	 gfx_delay_milliseconds(10);
+	 continue;
+      }
+
+      /* write the second byte. */
+      if (bytes == 2) {
+	 SendI2CData(*(value + 1));
+	 if (!ReceiveI2CAck()) {
+	    SendI2CStop();
+	    gfx_delay_milliseconds(10);
+	    continue;
+	 }
+      }
+
+      /* done. */
+      SendI2CStop();
+
+      return 0;
+   }
+
+   return (0);
+
 }
 
 /*---------------------------------------------------------------------------
@@ -290,66 +298,60 @@ int gfx_i2c_write(unsigned char busnum, unsigned char address, unsigned char reg
  *---------------------------------------------------------------------------
  */
 #if GFX_I2C_DYNAMIC
-int gpio_i2c_read(unsigned char busnum, unsigned char address, unsigned char reg, 
-	 unsigned char bytes, unsigned char *p_value)
+int
+gpio_i2c_read(unsigned char busnum, unsigned char address, unsigned char reg,
+	      unsigned char bytes, unsigned char *p_value)
 #else
-int gfx_i2c_read(unsigned char busnum, unsigned char address, unsigned char reg, 
-	unsigned char bytes, unsigned char *p_value)
-#endif 
+int
+gfx_i2c_read(unsigned char busnum, unsigned char address, unsigned char reg,
+	     unsigned char bytes, unsigned char *p_value)
+#endif
 {
-	/* ### ADD ### CODE TO WRITE BYTE TO I2B BUS */
-	/* For now return clock and data pins */
-
-	int restart_count = 0;
-
-	
-	if (!p_value)
-		return(1); 
-
-	while (restart_count++ < 5)
-	{
-		/* set the access pointer register. */
-		/* The address is shifted left by one to make room for Read/Write bit  */
-		SendI2CStart();
-		SendI2CData((char)((address << 1) | I2CWRITE));
-		if (!ReceiveI2CAck())
-		{
-			SendI2CStop();
-			gfx_delay_milliseconds(10);
-			continue;
-		}
-		SendI2CData((unsigned char)(reg & 0xFF));
-		SendI2CNack();
-		
-		/* read the first data byte. */
-		SendI2CStart();
-		SendI2CData((char)((address << 1) | I2CREAD));
-		if (!ReceiveI2CAck())
-		{
-			SendI2CStop();
-			gfx_delay_milliseconds(10);
-			continue;
-		}
-		*p_value = ReceiveI2CData();
-
- 
-		/* read the second byte. */
-		if (bytes == 2)
-		{
-			SendI2CAck();
-			*(p_value+1) = ReceiveI2CData();
-		}	
-
-
-		/* done. */
-		SendI2CNack();
-		SendI2CStop();
-
-		
-		return 0;
-	}
-
-	return(1);
+   /* ### ADD ### CODE TO WRITE BYTE TO I2B BUS */
+   /* For now return clock and data pins */
+
+   int restart_count = 0;
+
+   if (!p_value)
+      return (1);
+
+   while (restart_count++ < 5) {
+      /* set the access pointer register. */
+      /* The address is shifted left by one to make room for Read/Write bit  */
+      SendI2CStart();
+      SendI2CData((char)((address << 1) | I2CWRITE));
+      if (!ReceiveI2CAck()) {
+	 SendI2CStop();
+	 gfx_delay_milliseconds(10);
+	 continue;
+      }
+      SendI2CData((unsigned char)(reg & 0xFF));
+      SendI2CNack();
+
+      /* read the first data byte. */
+      SendI2CStart();
+      SendI2CData((char)((address << 1) | I2CREAD));
+      if (!ReceiveI2CAck()) {
+	 SendI2CStop();
+	 gfx_delay_milliseconds(10);
+	 continue;
+      }
+      *p_value = ReceiveI2CData();
+
+      /* read the second byte. */
+      if (bytes == 2) {
+	 SendI2CAck();
+	 *(p_value + 1) = ReceiveI2CData();
+      }
+
+      /* done. */
+      SendI2CNack();
+      SendI2CStop();
+
+      return 0;
+   }
+
+   return (1);
 }
 
 /* Added i2c/gpio code to test fs451 chip. */
@@ -363,12 +365,13 @@ int gfx_i2c_read(unsigned char busnum, unsigned char address, unsigned char reg,
 //	
 //----------------------------------------------------------------------
 */
-void SendI2CStart(void)
+void
+SendI2CStart(void)
 {
-	I2CAL_output_data(1);
-	I2CAL_output_clock(1);
-	I2CAL_output_data(0);
-	I2CAL_output_clock(0);
+   I2CAL_output_data(1);
+   I2CAL_output_clock(1);
+   I2CAL_output_data(0);
+   I2CAL_output_clock(0);
 }
 
 /*
@@ -380,11 +383,12 @@ void SendI2CStart(void)
 //	
 //----------------------------------------------------------------------
 */
-void SendI2CStop(void)
+void
+SendI2CStop(void)
 {
-	I2CAL_output_data(0);
-	I2CAL_output_clock(1);
-	I2CAL_output_data(1);
+   I2CAL_output_data(0);
+   I2CAL_output_clock(1);
+   I2CAL_output_data(1);
 }
 
 /*
@@ -396,11 +400,12 @@ void SendI2CStop(void)
 //	
 //----------------------------------------------------------------------
 */
-void SendI2CAck(void)
+void
+SendI2CAck(void)
 {
-	I2CAL_output_data(0);
-	I2CAL_output_clock(1);
-	I2CAL_output_clock(0);
+   I2CAL_output_data(0);
+   I2CAL_output_clock(1);
+   I2CAL_output_clock(0);
 }
 
 /*
@@ -412,11 +417,12 @@ void SendI2CAck(void)
 //	
 //----------------------------------------------------------------------
 */
-void SendI2CNack(void)
+void
+SendI2CNack(void)
 {
-	I2CAL_output_data(1);
-	I2CAL_output_clock(1);
-	I2CAL_output_clock(0);
+   I2CAL_output_data(1);
+   I2CAL_output_clock(1);
+   I2CAL_output_clock(0);
 }
 
 /*
@@ -432,21 +438,21 @@ void SendI2CNack(void)
 //	
 //----------------------------------------------------------------------
 */
-void SendI2CData(unsigned char inData)
+void
+SendI2CData(unsigned char inData)
 {
-	unsigned char bit;
-
-	/* Send all 8 bits of data byte, MSB to LSB */
-	for (bit = 0x80; bit != 0; bit >>= 1)
-	{       
-		if (inData & bit)
-			I2CAL_output_data(1);
-		else
-			I2CAL_output_data(0);
-			
-		I2CAL_output_clock(1);
-		I2CAL_output_clock(0);		
-	}
+   unsigned char bit;
+
+   /* Send all 8 bits of data byte, MSB to LSB */
+   for (bit = 0x80; bit != 0; bit >>= 1) {
+      if (inData & bit)
+	 I2CAL_output_data(1);
+      else
+	 I2CAL_output_data(0);
+
+      I2CAL_output_clock(1);
+      I2CAL_output_clock(0);
+   }
 }
 
 /*
@@ -460,18 +466,19 @@ void SendI2CData(unsigned char inData)
 //	
 //----------------------------------------------------------------------
 */
-unsigned char ReceiveI2CAck(void)
+unsigned char
+ReceiveI2CAck(void)
 {
-	unsigned char bit;
-
-	/* Test for Ack/Nack */
-	I2CAL_set_data_for_input();
-	I2CAL_output_data(1);
-	I2CAL_output_clock(1);
-	bit = I2CAL_input_data();
-	I2CAL_output_clock(0);
-	I2CAL_set_data_for_output();
-	return !bit;
+   unsigned char bit;
+
+   /* Test for Ack/Nack */
+   I2CAL_set_data_for_input();
+   I2CAL_output_data(1);
+   I2CAL_output_clock(1);
+   bit = I2CAL_input_data();
+   I2CAL_output_clock(0);
+   I2CAL_set_data_for_output();
+   return !bit;
 }
 
 /*	
@@ -485,31 +492,30 @@ unsigned char ReceiveI2CAck(void)
 //	
 //----------------------------------------------------------------------
 */
-unsigned char ReceiveI2CData(void)
+unsigned char
+ReceiveI2CData(void)
 {
-	unsigned char data = 0;
-	unsigned char x;
-
-	/* make sure the data line is released */
-	I2CAL_set_data_for_input();
-	I2CAL_output_data(1);
-	
-	/* shift in the data */
-	for (x=0; x<8; x++)
-    {   
-    	/* shift the data left   */
-    	I2CAL_output_clock(1);
-    	data <<= 1;
-	   	data |= I2CAL_input_data();
-		I2CAL_output_clock(0);
-    }
-
-	I2CAL_set_data_for_output();
-	I2CAL_output_data(1);
-	return data;                        
+   unsigned char data = 0;
+   unsigned char x;
+
+   /* make sure the data line is released */
+   I2CAL_set_data_for_input();
+   I2CAL_output_data(1);
+
+   /* shift in the data */
+   for (x = 0; x < 8; x++) {
+      /* shift the data left   */
+      I2CAL_output_clock(1);
+      data <<= 1;
+      data |= I2CAL_input_data();
+      I2CAL_output_clock(0);
+   }
+
+   I2CAL_set_data_for_output();
+   I2CAL_output_data(1);
+   return data;
 }
 
-
 /*
 //----------------------------------------------------------------------
 //
@@ -522,30 +528,32 @@ unsigned char ReceiveI2CData(void)
 */
 
 #if GFX_I2C_DYNAMIC
-int gpio_i2c_init(void)
+int
+gpio_i2c_init(void)
 #else
-int gfx_i2c_init(void)
+int
+gfx_i2c_init(void)
 #endif
 {
-	int errc;
+   int errc;
 
-	/* init I2CAL */
-	errc = I2CAL_init();
-	if (errc)
-		return errc;
+   /* init I2CAL */
+   errc = I2CAL_init();
+   if (errc)
+      return errc;
 
-	/* set the clock and data lines to the proper states */
-	I2CAL_output_clock(1);
-	I2CAL_output_data(1);
-	I2CAL_set_data_for_output();
+   /* set the clock and data lines to the proper states */
+   I2CAL_output_clock(1);
+   I2CAL_output_data(1);
+   I2CAL_set_data_for_output();
 
-	SendI2CStart();
-	SendI2CStop();
-	SendI2CStop();
+   SendI2CStart();
+   SendI2CStop();
+   SendI2CStop();
 
-	g_initialized = 1;
+   g_initialized = 1;
 
-	return 0;
+   return 0;
 }
 
 /*
@@ -560,61 +568,59 @@ int gfx_i2c_init(void)
 */
 
 #if GFX_I2C_DYNAMIC
-void gpio_i2c_cleanup(void)
+void
+gpio_i2c_cleanup(void)
 #else
-void gfx_i2c_cleanup(void)
+void
+gfx_i2c_cleanup(void)
 #endif
-
 {
-	if (g_initialized)
-	{
+   if (g_initialized) {
 
-		/* set the clock and data lines to a harmless state */
-		I2CAL_output_clock(1);
-		I2CAL_output_data(1);
+      /* set the clock and data lines to a harmless state */
+      I2CAL_output_clock(1);
+      I2CAL_output_data(1);
 
-		g_initialized = 0;
-	}
+      g_initialized = 0;
+   }
 
-	I2CAL_cleanup();
+   I2CAL_cleanup();
 }
 
-
-
-int I2CAL_init(void)
+int
+I2CAL_init(void)
 {
-	unsigned long l_reg;
-	unsigned short reg;
-	
-	/* initialize the i2c port. */
-	l_reg = gfx_pci_config_read(CS5530_GPIO);
+   unsigned long l_reg;
+   unsigned short reg;
+
+   /* initialize the i2c port. */
+   l_reg = gfx_pci_config_read(CS5530_GPIO);
 
-	if (l_reg != 0x01001078)
-		return 1;
+   if (l_reg != 0x01001078)
+      return 1;
 
-	l_reg = gfx_pci_config_read(CS5530_GPIO);
-	reg = (unsigned short) l_reg;
+   l_reg = gfx_pci_config_read(CS5530_GPIO);
+   reg = (unsigned short)l_reg;
 
-	/* both outputs, both high. */
-	reg |= (SDADIR | SCLDIR | SDA | SCL);
-	l_reg = reg;
-	gfx_pci_config_write(CS5530_GPIO, l_reg);
+   /* both outputs, both high. */
+   reg |= (SDADIR | SCLDIR | SDA | SCL);
+   l_reg = reg;
+   gfx_pci_config_write(CS5530_GPIO, l_reg);
 
-	g_initialized = 1;
+   g_initialized = 1;
 
-	return 0;
+   return 0;
 }
 
-void I2CAL_cleanup(void)
+void
+I2CAL_cleanup(void)
 {
-	if (g_initialized)
-	{
+   if (g_initialized) {
 
-		g_initialized = 0;
-	}
+      g_initialized = 0;
+   }
 }
 
-
 /*
 //--------------------------------------------------------------------------------
 //
@@ -622,28 +628,26 @@ void I2CAL_cleanup(void)
 //
 //--------------------------------------------------------------------------------
 */
-void I2CAL_output_clock(int inState)
+void
+I2CAL_output_clock(int inState)
 {
-	unsigned short reg;
-	unsigned long value;
-
-	value = gfx_pci_config_read(CS5530_GPIO);
-	reg = (unsigned short)value;
-
-	if (inState)
-	{	/* write a 1. */
-		reg |= SCL;
-	}
-	else
-	{	/* write a 0. */
-		reg &= ~SCL;
-	}
-
-	value = reg;
-	gfx_pci_config_write(CS5530_GPIO, value);
-
-	/* hold it for a minimum of 4.7us */
-	gfx_delay_microseconds(5);
+   unsigned short reg;
+   unsigned long value;
+
+   value = gfx_pci_config_read(CS5530_GPIO);
+   reg = (unsigned short)value;
+
+   if (inState) {			/* write a 1. */
+      reg |= SCL;
+   } else {				/* write a 0. */
+      reg &= ~SCL;
+   }
+
+   value = reg;
+   gfx_pci_config_write(CS5530_GPIO, value);
+
+   /* hold it for a minimum of 4.7us */
+   gfx_delay_microseconds(5);
 }
 
 /*
@@ -653,28 +657,26 @@ void I2CAL_output_clock(int inState)
 //
 //--------------------------------------------------------------------------------
 */
-void I2CAL_output_data(int inState)
+void
+I2CAL_output_data(int inState)
 {
-	unsigned short reg;
-	unsigned long value;
-	
-	value = gfx_pci_config_read(CS5530_GPIO);
-	reg = (unsigned short)value;
-
-	if (inState)
-	{	/* write a 1. */
-		reg |= SDA;
-	}
-	else
-	{	
-		/* write a 0. */
-		reg &= ~SDA;
-	}
-	value = reg;
-	gfx_pci_config_write(CS5530_GPIO, value);
-
-	/* 250 ns setup time */
-	gfx_delay_microseconds(1);
+   unsigned short reg;
+   unsigned long value;
+
+   value = gfx_pci_config_read(CS5530_GPIO);
+   reg = (unsigned short)value;
+
+   if (inState) {			/* write a 1. */
+      reg |= SDA;
+   } else {
+      /* write a 0. */
+      reg &= ~SDA;
+   }
+   value = reg;
+   gfx_pci_config_write(CS5530_GPIO, value);
+
+   /* 250 ns setup time */
+   gfx_delay_microseconds(1);
 }
 
 /*
@@ -684,18 +686,19 @@ void I2CAL_output_data(int inState)
 //
 //--------------------------------------------------------------------------------
 */
-unsigned char I2CAL_input_data(void)
+unsigned char
+I2CAL_input_data(void)
 {
-	unsigned short reg;
-	unsigned long value;
+   unsigned short reg;
+   unsigned long value;
 
-	value = gfx_pci_config_read(CS5530_GPIO);
-	reg = (unsigned short)value;
+   value = gfx_pci_config_read(CS5530_GPIO);
+   reg = (unsigned short)value;
 
-	if (reg & SDA)
-		return 1;
-	else
-		return 0;
+   if (reg & SDA)
+      return 1;
+   else
+      return 0;
 }
 
 /*
@@ -705,19 +708,20 @@ unsigned char I2CAL_input_data(void)
 //
 //--------------------------------------------------------------------------------
 */
-void I2CAL_set_data_for_input(void)
+void
+I2CAL_set_data_for_input(void)
 {
-	unsigned short reg;
-	unsigned long value;
+   unsigned short reg;
+   unsigned long value;
 
-	value = gfx_pci_config_read(CS5530_GPIO);
-	reg = (unsigned short)value;
+   value = gfx_pci_config_read(CS5530_GPIO);
+   reg = (unsigned short)value;
 
-	reg &= ~SDADIR;
+   reg &= ~SDADIR;
 
-	value = reg;
+   value = reg;
 
-	gfx_pci_config_write(CS5530_GPIO, value);
+   gfx_pci_config_write(CS5530_GPIO, value);
 }
 
 /*
@@ -727,19 +731,19 @@ void I2CAL_set_data_for_input(void)
 //
 //--------------------------------------------------------------------------------
 */
-void I2CAL_set_data_for_output(void)
+void
+I2CAL_set_data_for_output(void)
 {
-	unsigned short reg;
-	unsigned long value;
+   unsigned short reg;
+   unsigned long value;
 
-	value = gfx_pci_config_read(CS5530_GPIO);
-	reg = (unsigned short)value;
-	reg |= SDADIR;
-	value = reg;
+   value = gfx_pci_config_read(CS5530_GPIO);
+   reg = (unsigned short)value;
+   reg |= SDADIR;
+   value = reg;
 
-	gfx_pci_config_write(CS5530_GPIO, value);
+   gfx_pci_config_write(CS5530_GPIO, value);
 
 }
 
-
 /* END OF FILE */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/init_gu1.c b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/init_gu1.c
index 6882122d5..09fb79cba 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/init_gu1.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/init_gu1.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/init_gu1.c,v 1.1 2002/10/11 14:33:01 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/init_gu1.c,v 1.1 2002/12/10 15:12:27 alanh Exp $ */
 /*
  * $Workfile: init_gu1.c $
  *
@@ -129,6 +129,16 @@
  *
  * END_NSC_LIC_GPL */
 
+unsigned char gfx_gxm_config_read(unsigned char index);
+unsigned long gu1_get_core_freq(void);
+unsigned long gu1_detect_cpu(void);
+unsigned long gu1_detect_video(void);
+unsigned long gu1_get_cpu_register_base(void);
+unsigned long gu1_get_graphics_register_base(void);
+unsigned long gu1_get_frame_buffer_base(void);
+unsigned long gu1_get_frame_buffer_size(void);
+unsigned long gu1_get_vid_register_base(void);
+unsigned long gu1_get_vip_register_base(void);
 
 /*-----------------------------------------------------------------------------
  * gfx_gxm_config_read
@@ -136,20 +146,21 @@
  * This routine reads the value of the specified GXm configuration register.
  *-----------------------------------------------------------------------------
  */
-unsigned char gfx_gxm_config_read(unsigned char index)
+unsigned char
+gfx_gxm_config_read(unsigned char index)
 {
-	unsigned char value = 0xFF;
-	unsigned char lock;
+   unsigned char value = 0xFF;
+   unsigned char lock;
 
-	OUTB(0x22, GXM_CONFIG_CCR3);
-	lock = INB(0x23);
-	OUTB(0x22, GXM_CONFIG_CCR3);
-	OUTB(0x23, (unsigned char) (lock | 0x10));
-	OUTB(0x22, index);		
-	value = INB(0x23);
-	OUTB(0x22, GXM_CONFIG_CCR3);
-	OUTB(0x23, lock);
-	return(value);
+   OUTB(0x22, GXM_CONFIG_CCR3);
+   lock = INB(0x23);
+   OUTB(0x22, GXM_CONFIG_CCR3);
+   OUTB(0x23, (unsigned char)(lock | 0x10));
+   OUTB(0x22, index);
+   value = INB(0x23);
+   OUTB(0x22, GXM_CONFIG_CCR3);
+   OUTB(0x23, lock);
+   return (value);
 }
 
 /*-----------------------------------------------------------------------------
@@ -160,56 +171,65 @@ unsigned char gfx_gxm_config_read(unsigned char index)
  *-----------------------------------------------------------------------------
  */
 #if GFX_INIT_DYNAMIC
-unsigned long gu1_get_core_freq(void)
+unsigned long
+gu1_get_core_freq(void)
 #else
-unsigned long gfx_get_core_freq(void)
+unsigned long
+gfx_get_core_freq(void)
 #endif
 {
-	unsigned char dir0, dir1;
+   unsigned char dir0, dir1;
 
-	dir0 = gfx_gxm_config_read(GXM_CONFIG_DIR0) & 0x0F;
-	dir1 = gfx_gxm_config_read(GXM_CONFIG_DIR1);
+   dir0 = gfx_gxm_config_read(GXM_CONFIG_DIR0) & 0x0F;
+   dir1 = gfx_gxm_config_read(GXM_CONFIG_DIR1);
 
-	/* REVISION 4.0 AND UP */
+   /* REVISION 4.0 AND UP */
 
-	if(dir1 >= 0x50) 
-	{		
-		switch(dir0) 
-		{
-			case 0:
-			case 2: return 133;
-			
-			case 5: return 166;
-			case 3: return 200;
-			case 6: return 233;
-			case 7: return 266;
-			case 4: return 300;
-			case 1: return 333;
-			default:
-				return(0);
-		}
-	} 
-	else 
-	{		
-		switch(dir0) 
-		{
-			case 0:
-			case 2: return 133;
-			
-			case 7: return 166;
-			
-			case 1:
-			case 3: return 200;
-			
-			case 4:
-			case 6: return 233;
-			
-			case 5: return 266;
-			default:
-				return(0);
-		}
-	}
-	return(0);
+   if (dir1 >= 0x50) {
+      switch (dir0) {
+      case 0:
+      case 2:
+	 return 133;
+
+      case 5:
+	 return 166;
+      case 3:
+	 return 200;
+      case 6:
+	 return 233;
+      case 7:
+	 return 266;
+      case 4:
+	 return 300;
+      case 1:
+	 return 333;
+      default:
+	 return (0);
+      }
+   } else {
+      switch (dir0) {
+      case 0:
+      case 2:
+	 return 133;
+
+      case 7:
+	 return 166;
+
+      case 1:
+      case 3:
+	 return 200;
+
+      case 4:
+      case 6:
+	 return 233;
+
+      case 5:
+	 return 266;
+      default:
+	 return (0);
+      }
+   }
+   return (0);
 }
 
 /*-----------------------------------------------------------------------------
@@ -219,15 +239,18 @@ unsigned long gfx_get_core_freq(void)
  *-----------------------------------------------------------------------------
  */
 #if GFX_INIT_DYNAMIC
-unsigned long gu1_get_cpu_register_base(void)
+unsigned long
+gu1_get_cpu_register_base(void)
 #else
-unsigned long gfx_get_cpu_register_base(void)
+unsigned long
+gfx_get_cpu_register_base(void)
 #endif
 {
-	unsigned long base;
-	base = (unsigned long) gfx_gxm_config_read(GXM_CONFIG_GCR);
-	base = (base & 0x03) << 30;
-	return(base);
+   unsigned long base;
+
+   base = (unsigned long)gfx_gxm_config_read(GXM_CONFIG_GCR);
+   base = (base & 0x03) << 30;
+   return (base);
 }
 
 /*-----------------------------------------------------------------------------
@@ -241,16 +264,20 @@ unsigned long gfx_get_cpu_register_base(void)
  *-----------------------------------------------------------------------------
  */
 #if GFX_INIT_DYNAMIC
-unsigned long gu1_get_frame_buffer_base(void)
+unsigned long
+gu1_get_frame_buffer_base(void)
 #else
-unsigned long gfx_get_frame_buffer_base(void)
+unsigned long
+gfx_get_frame_buffer_base(void)
 #endif
 {
-	unsigned long base;
-	base = (unsigned long) gfx_gxm_config_read(GXM_CONFIG_GCR);
-	base = (base & 0x03) << 30;
-	if (base) base |= 0x00800000;
-	return(base);
+   unsigned long base;
+
+   base = (unsigned long)gfx_gxm_config_read(GXM_CONFIG_GCR);
+   base = (base & 0x03) << 30;
+   if (base)
+      base |= 0x00800000;
+   return (base);
 }
 
 /*-----------------------------------------------------------------------------
@@ -262,15 +289,17 @@ unsigned long gfx_get_frame_buffer_base(void)
  *-----------------------------------------------------------------------------
  */
 #if GFX_INIT_DYNAMIC
-unsigned long gu1_get_frame_buffer_size(void)
+unsigned long
+gu1_get_frame_buffer_size(void)
 #else
-unsigned long gfx_get_frame_buffer_size(void)
+unsigned long
+gfx_get_frame_buffer_size(void)
 #endif
 {
 #if FB4MB
-	return(0x00400000);
+   return (0x00400000);
 #else
-	return(0x00200000);
+   return (0x00200000);
 #endif
 }
 
@@ -285,16 +314,20 @@ unsigned long gfx_get_frame_buffer_size(void)
  *-----------------------------------------------------------------------------
  */
 #if GFX_INIT_DYNAMIC
-unsigned long gu1_get_vid_register_base(void)
+unsigned long
+gu1_get_vid_register_base(void)
 #else
-unsigned long gfx_get_vid_register_base(void)
+unsigned long
+gfx_get_vid_register_base(void)
 #endif
 {
-	unsigned long base;
-	base = (unsigned long) gfx_gxm_config_read(GXM_CONFIG_GCR);
-	base = (base & 0x03) << 30;
-	if (base) base |= 0x00010000;
-	return(base);
+   unsigned long base;
+
+   base = (unsigned long)gfx_gxm_config_read(GXM_CONFIG_GCR);
+   base = (base & 0x03) << 30;
+   if (base)
+      base |= 0x00010000;
+   return (base);
 }
 
 /*-----------------------------------------------------------------------------
@@ -309,19 +342,22 @@ unsigned long gfx_get_vid_register_base(void)
  *-----------------------------------------------------------------------------
  */
 #if GFX_INIT_DYNAMIC
-unsigned long gu1_get_vip_register_base(void)
+unsigned long
+gu1_get_vip_register_base(void)
 #else
-unsigned long gfx_get_vip_register_base(void)
+unsigned long
+gfx_get_vip_register_base(void)
 #endif
 {
-	unsigned long base = 0;
-	if ((gfx_cpu_version & 0xFF) == GFX_CPU_SC1200)
-	{
-		base = (unsigned long) gfx_gxm_config_read(GXM_CONFIG_GCR);
-		base = (base & 0x03) << 30;
-		if (base) base |= 0x00015000;
-	}
-	return(base);
+   unsigned long base = 0;
+
+   if ((gfx_cpu_version & 0xFF) == GFX_CPU_SC1200) {
+      base = (unsigned long)gfx_gxm_config_read(GXM_CONFIG_GCR);
+      base = (base & 0x03) << 30;
+      if (base)
+	 base |= 0x00015000;
+   }
+   return (base);
 }
 
 /* END OF FILE */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/init_gu2.c b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/init_gu2.c
index 9194bcf32..143ce5207 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/init_gu2.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/init_gu2.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/init_gu2.c,v 1.1 2002/10/11 14:33:01 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/init_gu2.c,v 1.1 2002/12/10 15:12:27 alanh Exp $ */
 /*
  * $Workfile: init_gu2.c $
  *
@@ -128,6 +128,17 @@
  *
  * END_NSC_LIC_GPL */
 
+unsigned long gu2_pci_config_read(unsigned long address);
+void gu2_pci_config_write(unsigned long address, unsigned long data);
+unsigned long gu2_get_core_freq(void);
+unsigned long gu2_detect_cpu(void);
+unsigned long gu2_detect_video(void);
+unsigned long gu2_get_cpu_register_base(void);
+unsigned long gu2_get_graphics_register_base(void);
+unsigned long gu2_get_frame_buffer_base(void);
+unsigned long gu2_get_frame_buffer_size(void);
+unsigned long gu2_get_vid_register_base(void);
+unsigned long gu2_get_vip_register_base(void);
 
 /*-----------------------------------------------------------------------------
  * gfx_get_core_freq
@@ -136,23 +147,25 @@
  *-----------------------------------------------------------------------------
  */
 #if GFX_INIT_DYNAMIC
-unsigned long gu2_get_core_freq(void)
+unsigned long
+gu2_get_core_freq(void)
 #else
-unsigned long gfx_get_core_freq(void)
+unsigned long
+gfx_get_core_freq(void)
 #endif
 {
-	unsigned long value;
+   unsigned long value;
 
-	/* CPU SPEED IS REPORTED BY A VSM IN VSA II */
-	/* Virtual Register Class = 0x12 (Sysinfo)  */
-	/* CPU Speed Register     = 0x01            */
+   /* CPU SPEED IS REPORTED BY A VSM IN VSA II */
+   /* Virtual Register Class = 0x12 (Sysinfo)  */
+   /* CPU Speed Register     = 0x01            */
 
-	OUTW (0xAC1C, 0xFC53);
-	OUTW (0xAC1C, 0x1201);
+   OUTW(0xAC1C, 0xFC53);
+   OUTW(0xAC1C, 0x1201);
 
-	value = (unsigned long)(INW (0xAC1E));
+   value = (unsigned long)(INW(0xAC1E));
 
-	return (value);
+   return (value);
 }
 
 /*-----------------------------------------------------------------------------
@@ -162,12 +175,14 @@ unsigned long gfx_get_core_freq(void)
  *-----------------------------------------------------------------------------
  */
 #if GFX_INIT_DYNAMIC
-unsigned long gu2_get_cpu_register_base(void)
+unsigned long
+gu2_get_cpu_register_base(void)
 #else
-unsigned long gfx_get_cpu_register_base(void)
+unsigned long
+gfx_get_cpu_register_base(void)
 #endif
 {
-	return gfx_pci_config_read (0x80000918);
+   return gfx_pci_config_read(0x80000918);
 }
 
 /*-----------------------------------------------------------------------------
@@ -177,12 +192,14 @@ unsigned long gfx_get_cpu_register_base(void)
  *-----------------------------------------------------------------------------
  */
 #if GFX_INIT_DYNAMIC
-unsigned long gu2_get_graphics_register_base(void)
+unsigned long
+gu2_get_graphics_register_base(void)
 #else
-unsigned long gfx_get_graphics_register_base(void)
+unsigned long
+gfx_get_graphics_register_base(void)
 #endif
 {
-	return gfx_pci_config_read (0x80000914);
+   return gfx_pci_config_read(0x80000914);
 }
 
 /*-----------------------------------------------------------------------------
@@ -192,12 +209,14 @@ unsigned long gfx_get_graphics_register_base(void)
  *-----------------------------------------------------------------------------
  */
 #if GFX_INIT_DYNAMIC
-unsigned long gu2_get_frame_buffer_base(void)
+unsigned long
+gu2_get_frame_buffer_base(void)
 #else
-unsigned long gfx_get_frame_buffer_base(void)
+unsigned long
+gfx_get_frame_buffer_base(void)
 #endif
 {
-	return gfx_pci_config_read (0x80000910);
+   return gfx_pci_config_read(0x80000910);
 }
 
 /*-----------------------------------------------------------------------------
@@ -207,23 +226,25 @@ unsigned long gfx_get_frame_buffer_base(void)
  *-----------------------------------------------------------------------------
  */
 #if GFX_INIT_DYNAMIC
-unsigned long gu2_get_frame_buffer_size(void)
+unsigned long
+gu2_get_frame_buffer_size(void)
 #else
-unsigned long gfx_get_frame_buffer_size(void)
+unsigned long
+gfx_get_frame_buffer_size(void)
 #endif
 {
-	unsigned long value;
+   unsigned long value;
 
-	/* FRAME BUFFER SIZE IS REPORTED BY A VSM IN VSA II */
-	/* Virtual Register Class     = 0x02                */
-	/* VG_MEM_SIZE (512KB units)  = 0x00                */
+   /* FRAME BUFFER SIZE IS REPORTED BY A VSM IN VSA II */
+   /* Virtual Register Class     = 0x02                */
+   /* VG_MEM_SIZE (512KB units)  = 0x00                */
 
-	OUTW (0xAC1C, 0xFC53);
-	OUTW (0xAC1C, 0x0200);
+   OUTW(0xAC1C, 0xFC53);
+   OUTW(0xAC1C, 0x0200);
 
-	value = (unsigned long)(INW (0xAC1E)) & 0xFFl;
+   value = (unsigned long)(INW(0xAC1E)) & 0xFFl;
 
-	return (value << 19);
+   return (value << 19);
 }
 
 /*-----------------------------------------------------------------------------
@@ -233,14 +254,14 @@ unsigned long gfx_get_frame_buffer_size(void)
  *-----------------------------------------------------------------------------
  */
 #if GFX_INIT_DYNAMIC
-unsigned long gu2_get_vid_register_base(void)
+unsigned long
+gu2_get_vid_register_base(void)
 #else
-unsigned long gfx_get_vid_register_base(void)
+unsigned long
+gfx_get_vid_register_base(void)
 #endif
 {
-	return gfx_pci_config_read (0x8000091C);
+   return gfx_pci_config_read(0x8000091C);
 }
 
-
-
 /* END OF FILE */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/msr_rdcl.c b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/msr_rdcl.c
index 8c54f86cd..ce3ce05dc 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/msr_rdcl.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/msr_rdcl.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/msr_rdcl.c,v 1.1 2002/10/11 14:33:01 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/msr_rdcl.c,v 1.1 2002/12/10 15:12:27 alanh Exp $ */
 /*
  * $Workfile: msr_rdcl.c $
  *
@@ -128,11 +128,20 @@
  *
  * END_NSC_LIC_GPL */
 
-
-void redcloud_build_mbus_tree(void);	    	    	    	        /* private routine definition */
-int redcloud_init_msr_devices(MSR aDev[], unsigned int array_size); /* private routine definition */
-DEV_STATUS redcloud_find_msr_device (MSR *pDev);  	    	        /* private routine definition */
-
+int redcloud_msr_init(void);
+DEV_STATUS redcloud_id_msr_device(MSR * pDev, unsigned long address);
+DEV_STATUS redcloud_get_msr_dev_address(unsigned int device,
+					unsigned long *address);
+DEV_STATUS redcloud_get_glink_id_at_address(unsigned int *device,
+					    unsigned long address);
+DEV_STATUS redcloud_msr_read(unsigned int device, unsigned int msrRegister,
+			     Q_WORD * msrValue);
+DEV_STATUS redcloud_msr_write(unsigned int device, unsigned int msrRegister,
+			      Q_WORD * msrValue);
+
+void redcloud_build_mbus_tree(void);	/* private routine definition */
+int redcloud_init_msr_devices(MSR aDev[], unsigned int array_size);	/* private routine definition */
+DEV_STATUS redcloud_find_msr_device(MSR * pDev);	/* private routine definition */
 
 /* REDCLOUD MSR BITMASKS */
 
@@ -148,26 +157,27 @@ DEV_STATUS redcloud_find_msr_device (MSR *pDev);  	    	        /* private routi
 
 /* REDCLOUD and CS5535 MSR DEVICES */
 
-MSR msrDev[] = { 
-	{ FOUND,     RC_CC_MBIU, RC_MB0_MBIU0 },		
-	{ FOUND,     RC_CC_MBIU, RC_MB0_MBIU1 },		
-	{ NOT_KNOWN, RC_CC_MCP , FAKE_ADDRESS },
-	{ NOT_KNOWN, RC_CC_MPCI, FAKE_ADDRESS },
-	{ NOT_KNOWN, RC_CC_MC  , FAKE_ADDRESS },
-	{ NOT_KNOWN, RC_CC_GP  , FAKE_ADDRESS },
-	{ NOT_KNOWN, RC_CC_VG  , FAKE_ADDRESS },		
-	{ NOT_KNOWN, RC_CC_DF  , FAKE_ADDRESS },
-	{ NOT_KNOWN, RC_CC_FG  , FAKE_ADDRESS },
-	{ FOUND,     RC_CC_VA  , RC_MB0_CPU   },
-	{ FOUND,     CP_CC_MBIU, CP_MB0_MBIU0 },
-	{ NOT_KNOWN, CP_CC_MPCI, FAKE_ADDRESS },
-	{ NOT_KNOWN, CP_CC_USB2, FAKE_ADDRESS },
-	{ NOT_KNOWN, CP_CC_ATAC, FAKE_ADDRESS },
-	{ NOT_KNOWN, CP_CC_MDD , FAKE_ADDRESS },
-	{ NOT_KNOWN, CP_CC_ACC , FAKE_ADDRESS },
-	{ NOT_KNOWN, CP_CC_USB1, FAKE_ADDRESS },
-	{ NOT_KNOWN, CP_CC_MCP , FAKE_ADDRESS },
+MSR msrDev[] = {
+   {FOUND, RC_CC_MBIU, RC_MB0_MBIU0},
+   {FOUND, RC_CC_MBIU, RC_MB0_MBIU1},
+   {NOT_KNOWN, RC_CC_MCP, FAKE_ADDRESS},
+   {NOT_KNOWN, RC_CC_MPCI, FAKE_ADDRESS},
+   {NOT_KNOWN, RC_CC_MC, FAKE_ADDRESS},
+   {NOT_KNOWN, RC_CC_GP, FAKE_ADDRESS},
+   {NOT_KNOWN, RC_CC_VG, FAKE_ADDRESS},
+   {NOT_KNOWN, RC_CC_DF, FAKE_ADDRESS},
+   {NOT_KNOWN, RC_CC_FG, FAKE_ADDRESS},
+   {FOUND, RC_CC_VA, RC_MB0_CPU},
+   {FOUND, CP_CC_MBIU, CP_MB0_MBIU0},
+   {NOT_KNOWN, CP_CC_MPCI, FAKE_ADDRESS},
+   {NOT_KNOWN, CP_CC_USB2, FAKE_ADDRESS},
+   {NOT_KNOWN, CP_CC_ATAC, FAKE_ADDRESS},
+   {NOT_KNOWN, CP_CC_MDD, FAKE_ADDRESS},
+   {NOT_KNOWN, CP_CC_ACC, FAKE_ADDRESS},
+   {NOT_KNOWN, CP_CC_USB1, FAKE_ADDRESS},
+   {NOT_KNOWN, CP_CC_MCP, FAKE_ADDRESS},
 };
+
 #define NUM_DEVS sizeof(msrDev) / sizeof(struct msr)
 
 /* CAPISTRANO DEVICE INDEX LIMITS */
@@ -188,7 +198,7 @@ MBUS_NODE MBIU0[8], MBIU1[8], MBIU2[8];
 
 #define GET_DEVICE_ID( CAPABILITIES_HIGH, CAPABILITIES_LOW ) \
 					 ((unsigned int)(( (CAPABILITIES_LOW) & MSR_CAP_ID_MASK ) >> MSR_CAP_ID_SHIFT ))
-                     
+
 #define GET_NUM_PORTS( MBIU_CAP_HIGH, MBIU_CAP_LOW ) (((MBIU_CAP_HIGH) & NUM_PORTS_MASK ) >> NUM_PORTS_SHIFT)
 
 /*-----------------------------------------------------------------------------
@@ -198,51 +208,52 @@ MBUS_NODE MBIU0[8], MBIU1[8], MBIU2[8];
  *-----------------------------------------------------------------------------
  */
 #if GFX_MSR_DYNAMIC
-int	redcloud_msr_init(void)
+int
+redcloud_msr_init(void)
 #else
-int	gfx_msr_init(void)
+int
+gfx_msr_init(void)
 #endif
 {
-    Q_WORD msrValue;
-    int return_value = 1;
-
-	/* CHECK FOR VALID MBUS CONFIGURATION */
-	/* The CPU and the two MBIUs are assumed to be at known static addresses, so */
-	/* we will check the device IDs at these addresses as proof of a valid mbus  */
-	/* configuration.                                                            */
-
-	MSR_READ (MBD_MSR_CAP, RC_MB0_CPU, &(msrValue.high), &(msrValue.low));
-    if (GET_DEVICE_ID (msrValue.high, msrValue.low) != RC_CC_VA) 
-       	return_value = 0;   
-
-	MSR_READ (MBD_MSR_CAP, RC_MB0_MBIU0, &(msrValue.high), &(msrValue.low));
-    if (GET_DEVICE_ID (msrValue.high, msrValue.low) != RC_CC_MBIU) 
-    	return_value = 0;
-        
-	MSR_READ (MBD_MSR_CAP, RC_MB0_MBIU1, &(msrValue.high), &(msrValue.low));
-    if (GET_DEVICE_ID (msrValue.high, msrValue.low) != RC_CC_MBIU) 
-       	return_value = 0;
-               
-	/* ENUMERATE VALID BUS */
-	/* If all static devices were identified, continue with the enumeration */
-
-	if (return_value)
-    {
-		/* OPTIMIZATION */
-		/* Build a local copy of the MBUS topology.  This allows us to  */
-		/* quickly search the entire MBUS for a given device ID without */
-		/* repeated MSR accesses.                                       */
-
-		redcloud_build_mbus_tree ();
-
-		/* INITIALIZE MSR DEVICES */
-
-		return_value = redcloud_init_msr_devices (msrDev, NUM_DEVS);
-        			
-	}
-    
-    return return_value;
-    
+   Q_WORD msrValue;
+   int return_value = 1;
+
+   /* CHECK FOR VALID MBUS CONFIGURATION */
+   /* The CPU and the two MBIUs are assumed to be at known static addresses, so */
+   /* we will check the device IDs at these addresses as proof of a valid mbus  */
+   /* configuration.                                                            */
+
+   MSR_READ(MBD_MSR_CAP, RC_MB0_CPU, &(msrValue.high), &(msrValue.low));
+   if (GET_DEVICE_ID(msrValue.high, msrValue.low) != RC_CC_VA)
+      return_value = 0;
+
+   MSR_READ(MBD_MSR_CAP, RC_MB0_MBIU0, &(msrValue.high), &(msrValue.low));
+   if (GET_DEVICE_ID(msrValue.high, msrValue.low) != RC_CC_MBIU)
+      return_value = 0;
+
+   MSR_READ(MBD_MSR_CAP, RC_MB0_MBIU1, &(msrValue.high), &(msrValue.low));
+   if (GET_DEVICE_ID(msrValue.high, msrValue.low) != RC_CC_MBIU)
+      return_value = 0;
+
+   /* ENUMERATE VALID BUS */
+   /* If all static devices were identified, continue with the enumeration */
+
+   if (return_value) {
+      /* OPTIMIZATION */
+      /* Build a local copy of the MBUS topology.  This allows us to  */
+      /* quickly search the entire MBUS for a given device ID without */
+      /* repeated MSR accesses.                                       */
+
+      redcloud_build_mbus_tree();
+
+      /* INITIALIZE MSR DEVICES */
+
+      return_value = redcloud_init_msr_devices(msrDev, NUM_DEVS);
+
+   }
+
+   return return_value;
+
 }
 
 /*--------------------------------------------------------------------------
@@ -256,158 +267,160 @@ int	gfx_msr_init(void)
  * nodes are nodes that forward the given MBUS address BACK to the initiator.
  *-----------------------------------------------------------------------------
  */
-void redcloud_build_mbus_tree(void)
+void
+redcloud_build_mbus_tree(void)
 {
-    unsigned long mbiu_port_count, reflective;
-    unsigned long port;
-    Q_WORD msrValue;
-
-	/*                  */
-	/* ENUMERATE MBIU0  */
-	/*                  */
-
-	/* COUNT MBIU PORTS */
-
-	MSR_READ (MBIU_CAP, RC_MB0_MBIU0, &(msrValue.high), &(msrValue.low));
-	mbiu_port_count = GET_NUM_PORTS (msrValue.high, msrValue.low);
-
-	/* FIND REFLECTIVE PORT */
-	/* Query the MBIU for the port through which we are communicating. */
-	/* We will avoid accesses to this port to avoid a self-reference.  */
-	
-	MSR_READ (MBIU_WHOAMI, RC_MB0_MBIU0, &(msrValue.high), &(msrValue.low));
-	reflective = msrValue.low & WHOAMI_MASK;
-
-	/* ENUMERATE ALL PORTS */
-	/* For every possible port, set the MBIU.deviceId to something. */
-
-	for (port = 0; port < 8; port++)
-	{
-		/* FILL IN CLAIMED FIELD */
-		/* All MBIU ports can only be assigned to one device from the */
-		/* Durango table                                              */
-
-		MBIU0[port].claimed = 0;
-
-		/* MBIU0 PORT NUMBERS ARE IN ADDRESS BITS 31:29 */
-
-		MBIU0[port].address = port << 29;
-
-		/* SPECIAL CASE FOR MBIU0 */
-		/* MBIU0 port 0 is a special case, as it points back to MBIU0.  MBIU0 */
-		/* responds at address 0x40000xxx, which does not equal 0 << 29.      */
-
-        if (port == 0) 				     MBIU0[port].deviceId = RC_CC_MBIU; 
-		else if (port == reflective)     MBIU0[port].deviceId = REFLECTIVE;
-		else if (port > mbiu_port_count) MBIU0[port].deviceId = NOT_POPULATED;
-	    else 
-		{
-			MSR_READ (MBD_MSR_CAP, MBIU0[port].address, &(msrValue.high), &(msrValue.low));
-			MBIU0[port].deviceId = GET_DEVICE_ID (msrValue.high, msrValue.low);
-		}
-	}
-
-	/*                  */
-	/* ENUMERATE MBIU1  */
-	/*                  */
-
-	/* COUNT MBIU PORTS */
-
-	MSR_READ (MBIU_CAP, RC_MB0_MBIU1, &(msrValue.high), &(msrValue.low));
-	mbiu_port_count = GET_NUM_PORTS (msrValue.high, msrValue.low);
-
-	/* FIND REFLECTIVE PORT */
-	/* Query the MBIU for the port through which we are communicating. */
-	/* We will avoid accesses to this port to avoid a self-reference.  */
-	
-	MSR_READ (MBIU_WHOAMI, RC_MB0_MBIU1, &(msrValue.high), &(msrValue.low));
-	reflective = msrValue.low & WHOAMI_MASK;
-
-	/* ENUMERATE ALL PORTS */
-	/* For every possible port, set the MBIU.deviceId to something. */
-
-	for (port = 0; port < 8; port++)
-	{
-		/* FILL IN CLAIMED FIELD */
-		/* All MBIU ports can only be assigned to one device from the */
-		/* Durango table                                              */
-
-		MBIU1[port].claimed = 0;
-
-		/* MBIU1 PORT NUMBERS ARE IN 28:26 AND 31:29 = 010B */
-		
-		MBIU1[port].address = (0x02l << 29) + (port << 26);
-
-		if (port == reflective)            MBIU1[port].deviceId = REFLECTIVE;
-		else if (port > mbiu_port_count)   MBIU1[port].deviceId = NOT_POPULATED;
-	    else 
-		{
-			MSR_READ (MBD_MSR_CAP, MBIU1[port].address, &(msrValue.high), &(msrValue.low));
-			MBIU1[port].deviceId = GET_DEVICE_ID (msrValue.high, msrValue.low);
-		}
-	}
-
-	/*                          */
-	/* ENUMERATE MBIU2 (CS5535) */
-	/*  (if present)            */
-
-	MSR_READ (MBD_MSR_CAP, CP_MB0_MBIU0, &(msrValue.high), &(msrValue.low));
-    if (GET_DEVICE_ID (msrValue.high, msrValue.low) == CP_CC_MBIU) 
-    {
-		/* COUNT MBIU PORTS */
-
-		MSR_READ (MBIU_CAP, CP_MB0_MBIU0, &(msrValue.high), &(msrValue.low));
-		mbiu_port_count = GET_NUM_PORTS (msrValue.high, msrValue.low);
-
-		/* FIND REFLECTIVE PORT */
-		/* Query the MBIU for the port through which we are communicating. */
-		/* We will avoid accesses to this port to avoid a self-reference.  */
-	
-		MSR_READ (MBIU_WHOAMI, CP_MB0_MBIU0, &(msrValue.high), &(msrValue.low));
-		reflective = msrValue.low & WHOAMI_MASK;
-
-		/* ENUMERATE ALL PORTS */
-		/* For every possible port, set the MBIU.deviceId to something. */
-
-		for (port = 0; port < 8; port++)
-		{
-			/* FILL IN CLAIMED FIELD */
-			/* All MBIU ports can only be assigned to one device from the */
-			/* Durango table                                              */
-
-			MBIU2[port].claimed = 0;
-
-			/* MBIU2 PORT NUMBERS ARE IN 22:20 AND 31:23 = 010100010B */
-		
-			MBIU2[port].address = (0x02l << 29) + (0x04l << 26) + (0x02l << 23) + (port << 20);
-
-			if (port == reflective)           MBIU2[port].deviceId = REFLECTIVE;
-			else if (port > mbiu_port_count)  MBIU2[port].deviceId = NOT_POPULATED;
-		    else 
-			{
-				MSR_READ (MBD_MSR_CAP, MBIU2[port].address, &(msrValue.high), &(msrValue.low));
-				MBIU2[port].deviceId = GET_DEVICE_ID (msrValue.high, msrValue.low);
-			}
-		}
-	} 
-	else 
-	{
-		/* NO 5535                                                  */
-		/* If the CS5535 is not installed, fill in the cached table */
-		/* with the 'NOT_INSTALLED' flag.  Also, fill in the device */
-		/* status from NOT_KNOWN to REQ_NOT_INSTALLED.              */
-
-		for (port = 0; port < 8; port++) 
-		{
-			MBIU2[port].claimed  = 0;
-			MBIU2[port].deviceId = NOT_INSTALLED;
-			MBIU2[port].address  = (0x02l << 29) + (0x04l << 26) + (0x02l << 23) + (port << 20);
-		}
-		for (port = CP_INDEX_START; port <= CP_INDEX_STOP; port++) 
-		{
-			msrDev[port].Present = REQ_NOT_INSTALLED;
-		}
-    }
+   unsigned long mbiu_port_count, reflective;
+   unsigned long port;
+   Q_WORD msrValue;
+
+   /*                  */
+   /* ENUMERATE MBIU0  */
+   /*                  */
+
+   /* COUNT MBIU PORTS */
+
+   MSR_READ(MBIU_CAP, RC_MB0_MBIU0, &(msrValue.high), &(msrValue.low));
+   mbiu_port_count = GET_NUM_PORTS(msrValue.high, msrValue.low);
+
+   /* FIND REFLECTIVE PORT */
+   /* Query the MBIU for the port through which we are communicating. */
+   /* We will avoid accesses to this port to avoid a self-reference.  */
+
+   MSR_READ(MBIU_WHOAMI, RC_MB0_MBIU0, &(msrValue.high), &(msrValue.low));
+   reflective = msrValue.low & WHOAMI_MASK;
+
+   /* ENUMERATE ALL PORTS */
+   /* For every possible port, set the MBIU.deviceId to something. */
+
+   for (port = 0; port < 8; port++) {
+      /* FILL IN CLAIMED FIELD */
+      /* All MBIU ports can only be assigned to one device from the */
+      /* Durango table                                              */
+
+      MBIU0[port].claimed = 0;
+
+      /* MBIU0 PORT NUMBERS ARE IN ADDRESS BITS 31:29 */
+
+      MBIU0[port].address = port << 29;
+
+      /* SPECIAL CASE FOR MBIU0 */
+      /* MBIU0 port 0 is a special case, as it points back to MBIU0.  MBIU0 */
+      /* responds at address 0x40000xxx, which does not equal 0 << 29.      */
+
+      if (port == 0)
+	 MBIU0[port].deviceId = RC_CC_MBIU;
+      else if (port == reflective)
+	 MBIU0[port].deviceId = REFLECTIVE;
+      else if (port > mbiu_port_count)
+	 MBIU0[port].deviceId = NOT_POPULATED;
+      else {
+	 MSR_READ(MBD_MSR_CAP, MBIU0[port].address, &(msrValue.high),
+		  &(msrValue.low));
+	 MBIU0[port].deviceId = GET_DEVICE_ID(msrValue.high, msrValue.low);
+      }
+   }
+
+   /*                  */
+   /* ENUMERATE MBIU1  */
+   /*                  */
+
+   /* COUNT MBIU PORTS */
+
+   MSR_READ(MBIU_CAP, RC_MB0_MBIU1, &(msrValue.high), &(msrValue.low));
+   mbiu_port_count = GET_NUM_PORTS(msrValue.high, msrValue.low);
+
+   /* FIND REFLECTIVE PORT */
+   /* Query the MBIU for the port through which we are communicating. */
+   /* We will avoid accesses to this port to avoid a self-reference.  */
+
+   MSR_READ(MBIU_WHOAMI, RC_MB0_MBIU1, &(msrValue.high), &(msrValue.low));
+   reflective = msrValue.low & WHOAMI_MASK;
+
+   /* ENUMERATE ALL PORTS */
+   /* For every possible port, set the MBIU.deviceId to something. */
+
+   for (port = 0; port < 8; port++) {
+      /* FILL IN CLAIMED FIELD */
+      /* All MBIU ports can only be assigned to one device from the */
+      /* Durango table                                              */
+
+      MBIU1[port].claimed = 0;
+
+      /* MBIU1 PORT NUMBERS ARE IN 28:26 AND 31:29 = 010B */
+
+      MBIU1[port].address = (0x02l << 29) + (port << 26);
+
+      if (port == reflective)
+	 MBIU1[port].deviceId = REFLECTIVE;
+      else if (port > mbiu_port_count)
+	 MBIU1[port].deviceId = NOT_POPULATED;
+      else {
+	 MSR_READ(MBD_MSR_CAP, MBIU1[port].address, &(msrValue.high),
+		  &(msrValue.low));
+	 MBIU1[port].deviceId = GET_DEVICE_ID(msrValue.high, msrValue.low);
+      }
+   }
+
+   /*                          */
+   /* ENUMERATE MBIU2 (CS5535) */
+   /*  (if present)            */
+
+   MSR_READ(MBD_MSR_CAP, CP_MB0_MBIU0, &(msrValue.high), &(msrValue.low));
+   if (GET_DEVICE_ID(msrValue.high, msrValue.low) == CP_CC_MBIU) {
+      /* COUNT MBIU PORTS */
+
+      MSR_READ(MBIU_CAP, CP_MB0_MBIU0, &(msrValue.high), &(msrValue.low));
+      mbiu_port_count = GET_NUM_PORTS(msrValue.high, msrValue.low);
+
+      /* FIND REFLECTIVE PORT */
+      /* Query the MBIU for the port through which we are communicating. */
+      /* We will avoid accesses to this port to avoid a self-reference.  */
+
+      MSR_READ(MBIU_WHOAMI, CP_MB0_MBIU0, &(msrValue.high), &(msrValue.low));
+      reflective = msrValue.low & WHOAMI_MASK;
+
+      /* ENUMERATE ALL PORTS */
+      /* For every possible port, set the MBIU.deviceId to something. */
+
+      for (port = 0; port < 8; port++) {
+	 /* FILL IN CLAIMED FIELD */
+	 /* All MBIU ports can only be assigned to one device from the */
+	 /* Durango table                                              */
+
+	 MBIU2[port].claimed = 0;
+
+	 /* MBIU2 PORT NUMBERS ARE IN 22:20 AND 31:23 = 010100010B */
+
+	 MBIU2[port].address =
+	       (0x02l << 29) + (0x04l << 26) + (0x02l << 23) + (port << 20);
+
+	 if (port == reflective)
+	    MBIU2[port].deviceId = REFLECTIVE;
+	 else if (port > mbiu_port_count)
+	    MBIU2[port].deviceId = NOT_POPULATED;
+	 else {
+	    MSR_READ(MBD_MSR_CAP, MBIU2[port].address, &(msrValue.high),
+		     &(msrValue.low));
+	    MBIU2[port].deviceId = GET_DEVICE_ID(msrValue.high, msrValue.low);
+	 }
+      }
+   } else {
+      /* NO 5535                                                  */
+      /* If the CS5535 is not installed, fill in the cached table */
+      /* with the 'NOT_INSTALLED' flag.  Also, fill in the device */
+      /* status from NOT_KNOWN to REQ_NOT_INSTALLED.              */
+
+      for (port = 0; port < 8; port++) {
+	 MBIU2[port].claimed = 0;
+	 MBIU2[port].deviceId = NOT_INSTALLED;
+	 MBIU2[port].address =
+	       (0x02l << 29) + (0x04l << 26) + (0x02l << 23) + (port << 20);
+      }
+      for (port = CP_INDEX_START; port <= CP_INDEX_STOP; port++) {
+	 msrDev[port].Present = REQ_NOT_INSTALLED;
+      }
+   }
 }
 
 /*------------------------------------------------------------------
@@ -428,31 +441,31 @@ void redcloud_build_mbus_tree(void)
  *		0 - If, for any device, an error was encountered.
  *------------------------------------------------------------------
  */
-int redcloud_init_msr_devices(MSR aDev[], unsigned int array_size)
+int
+redcloud_init_msr_devices(MSR aDev[], unsigned int array_size)
 {
-    unsigned int i, issues = 0;
-	
-	/* TRY TO FIND EACH ITEM IN THE ARRAY */
-	
-	for (i = 0; i < array_size; i++) 
-	{
-		/* IGNORE DEVICES THAT ARE ALREADY FOUND                */
-		/* The addresses for "found" devices are already known. */
-		
-		if (aDev[i].Present == FOUND || aDev[i].Present == REQ_NOT_INSTALLED)
-        	continue;
-            
-		/* TRY TO FIND THE DEVICE ON THE MBUS */
-		
-		aDev[i].Present = redcloud_find_msr_device (&aDev[i]);
-
-		/* INCREMENT ERROR COUNT IF DEVICE NOT FOUND */
-
-		if (aDev[i].Present != FOUND) 
-			issues++;
-	}
-
-	return (issues == 0);
+   unsigned int i, issues = 0;
+
+   /* TRY TO FIND EACH ITEM IN THE ARRAY */
+
+   for (i = 0; i < array_size; i++) {
+      /* IGNORE DEVICES THAT ARE ALREADY FOUND                */
+      /* The addresses for "found" devices are already known. */
+
+      if (aDev[i].Present == FOUND || aDev[i].Present == REQ_NOT_INSTALLED)
+	 continue;
+
+      /* TRY TO FIND THE DEVICE ON THE MBUS */
+
+      aDev[i].Present = redcloud_find_msr_device(&aDev[i]);
+
+      /* INCREMENT ERROR COUNT IF DEVICE NOT FOUND */
+
+      if (aDev[i].Present != FOUND)
+	 issues++;
+   }
+
+   return (issues == 0);
 }
 
 /*------------------------------------------------------------------
@@ -469,62 +482,57 @@ int redcloud_init_msr_devices(MSR aDev[], unsigned int array_size)
  *
  *------------------------------------------------------------------
 */
-DEV_STATUS redcloud_find_msr_device (MSR *pDev)
+DEV_STATUS
+redcloud_find_msr_device(MSR * pDev)
 {
-    unsigned int i;
-  
-	/* SEARCH DURANGO'S CACHED MBUS TOPOLOGY */
-	/* This gets a little tricky.  As the only identifier we have for each   */
-	/* device is the device ID and we have multiple devices of the same type */
-	/* MCP, MPCI, USB, etc. we need to make some assumptions based on table  */
-	/* order.  These are as follows:                                         */
-	/* 1. All Redcloud nodes are searched first, as we assume that they      */
-	/*    are first in the table.                                            */
-	/* 2. If two devices have the same device ID and are found on the same   */
-	/*    device (GX2, CS5535, etc.) we assume that they are listed such     */
-	/*    that the first device in the table with this device ID has a lower */
-	/*    port address.                                                      */
-	/* 3. After a device ID has been matched, the port is marked as          */
-	/*    'claimed', such that future enumerations continue searching the    */
-	/*    GeodeLink topology.                                                */
-
-	/* SEARCH MBIU0 */
-
-	for (i = 0; i < 8; i++)
-	{
-		if (MBIU0[i].deviceId == pDev->Id && !(MBIU0[i].claimed)) 
-		{
-			MBIU0[i].claimed = 1;
-			pDev->Address = MBIU0[i].address;
-			return FOUND;
-        }
-	}   
-
-	/* SEARCH MBIU1 */
-
-	for (i = 0; i < 8; i++)
-	{
-		if (MBIU1[i].deviceId == pDev->Id && !(MBIU1[i].claimed)) 
-		{
-			MBIU1[i].claimed = 1;
-			pDev->Address = MBIU1[i].address;
-			return FOUND;
-        }
-	}   
-
-	/* SEARCH MBIU2 */
-
-	for (i = 0; i < 8; i++)
-	{
-		if (MBIU2[i].deviceId == pDev->Id && !(MBIU2[i].claimed)) 
-		{
-			MBIU2[i].claimed = 1;
-			pDev->Address = MBIU2[i].address;
-			return FOUND;
-        }
-	}    
-	
-	return REQ_NOT_FOUND;
+   unsigned int i;
+
+   /* SEARCH DURANGO'S CACHED MBUS TOPOLOGY */
+   /* This gets a little tricky.  As the only identifier we have for each   */
+   /* device is the device ID and we have multiple devices of the same type */
+   /* MCP, MPCI, USB, etc. we need to make some assumptions based on table  */
+   /* order.  These are as follows:                                         */
+   /* 1. All Redcloud nodes are searched first, as we assume that they      */
+   /*    are first in the table.                                            */
+   /* 2. If two devices have the same device ID and are found on the same   */
+   /*    device (GX2, CS5535, etc.) we assume that they are listed such     */
+   /*    that the first device in the table with this device ID has a lower */
+   /*    port address.                                                      */
+   /* 3. After a device ID has been matched, the port is marked as          */
+   /*    'claimed', such that future enumerations continue searching the    */
+   /*    GeodeLink topology.                                                */
+
+   /* SEARCH MBIU0 */
+
+   for (i = 0; i < 8; i++) {
+      if (MBIU0[i].deviceId == pDev->Id && !(MBIU0[i].claimed)) {
+	 MBIU0[i].claimed = 1;
+	 pDev->Address = MBIU0[i].address;
+	 return FOUND;
+      }
+   }
+
+   /* SEARCH MBIU1 */
+
+   for (i = 0; i < 8; i++) {
+      if (MBIU1[i].deviceId == pDev->Id && !(MBIU1[i].claimed)) {
+	 MBIU1[i].claimed = 1;
+	 pDev->Address = MBIU1[i].address;
+	 return FOUND;
+      }
+   }
+
+   /* SEARCH MBIU2 */
+
+   for (i = 0; i < 8; i++) {
+      if (MBIU2[i].deviceId == pDev->Id && !(MBIU2[i].claimed)) {
+	 MBIU2[i].claimed = 1;
+	 pDev->Address = MBIU2[i].address;
+	 return FOUND;
+      }
+   }
+
+   return REQ_NOT_FOUND;
 }
 
 /*--------------------------------------------------------------------
@@ -546,19 +554,21 @@ DEV_STATUS redcloud_find_msr_device (MSR *pDev)
  *--------------------------------------------------------------------
  */
 #if GFX_MSR_DYNAMIC
-DEV_STATUS redcloud_id_msr_device (MSR *pDev, unsigned long address)
+DEV_STATUS
+redcloud_id_msr_device(MSR * pDev, unsigned long address)
 #else
-DEV_STATUS gfx_id_msr_device (MSR *pDev, unsigned long address)
+DEV_STATUS
+gfx_id_msr_device(MSR * pDev, unsigned long address)
 #endif
 {
-    Q_WORD msrValue;
-
-	MSR_READ (MBD_MSR_CAP, address, &(msrValue.high), &(msrValue.low));
-	    
-	if (GET_DEVICE_ID (msrValue.high, msrValue.low) == pDev->Id) 
-    	return FOUND;
-	else 
-    	return REQ_NOT_FOUND;
+   Q_WORD msrValue;
+
+   MSR_READ(MBD_MSR_CAP, address, &(msrValue.high), &(msrValue.low));
+
+   if (GET_DEVICE_ID(msrValue.high, msrValue.low) == pDev->Id)
+      return FOUND;
+   else
+      return REQ_NOT_FOUND;
 }
 
 /*--------------------------------------------------------------------
@@ -584,19 +594,20 @@ DEV_STATUS gfx_id_msr_device (MSR *pDev, unsigned long address)
  *--------------------------------------------------------------------
  */
 #if GFX_MSR_DYNAMIC
-DEV_STATUS redcloud_get_msr_dev_address (unsigned int device, unsigned long *address)
+DEV_STATUS
+redcloud_get_msr_dev_address(unsigned int device, unsigned long *address)
 #else
-DEV_STATUS gfx_get_msr_dev_address (unsigned int device, unsigned long *address)
+DEV_STATUS
+gfx_get_msr_dev_address(unsigned int device, unsigned long *address)
 #endif
 {
-	if (device < NUM_DEVS) 
-	{
-		if (msrDev[device].Present == FOUND)
-			*address = msrDev[device].Address;    
-		
-		return msrDev[device].Present;
-	}
-	return NOT_KNOWN;
+   if (device < NUM_DEVS) {
+      if (msrDev[device].Present == FOUND)
+	 *address = msrDev[device].Address;
+
+      return msrDev[device].Present;
+   }
+   return NOT_KNOWN;
 
 }
 
@@ -621,33 +632,29 @@ DEV_STATUS gfx_get_msr_dev_address (unsigned int device, unsigned long *address)
  *--------------------------------------------------------------------
  */
 #if GFX_MSR_DYNAMIC
-DEV_STATUS redcloud_get_glink_id_at_address(unsigned int *device, unsigned long address)
+DEV_STATUS
+redcloud_get_glink_id_at_address(unsigned int *device, unsigned long address)
 #else
-DEV_STATUS gfx_get_glink_id_at_address(unsigned int *device, unsigned long address)
+DEV_STATUS
+gfx_get_glink_id_at_address(unsigned int *device, unsigned long address)
 #endif
 {
-    int port;
-	
-	for (port = 0; port < 8; port++)
-    {
-		if (MBIU0[port].address == address) 
-		{
-        	*device = MBIU0[port].deviceId;
-            return FOUND;
-        }
-        else if (MBIU1[port].address == address) 
-		{
-        	*device = MBIU1[port].deviceId;
-            return FOUND;
-        }
-        else if (MBIU2[port].address == address) 
-		{
-        	*device = MBIU2[port].deviceId;
-            return FOUND;
-        }
-	}
-
-    return NOT_KNOWN;
+   int port;
+
+   for (port = 0; port < 8; port++) {
+      if (MBIU0[port].address == address) {
+	 *device = MBIU0[port].deviceId;
+	 return FOUND;
+      } else if (MBIU1[port].address == address) {
+	 *device = MBIU1[port].deviceId;
+	 return FOUND;
+      } else if (MBIU2[port].address == address) {
+	 *device = MBIU2[port].deviceId;
+	 return FOUND;
+      }
+   }
+
+   return NOT_KNOWN;
 
 }
 
@@ -667,19 +674,22 @@ DEV_STATUS gfx_get_glink_id_at_address(unsigned int *device, unsigned long addre
  *--------------------------------------------------------------------
  */
 #if GFX_MSR_DYNAMIC
-DEV_STATUS redcloud_msr_read (unsigned int device, unsigned int msrRegister, Q_WORD *msrValue)
+DEV_STATUS
+redcloud_msr_read(unsigned int device, unsigned int msrRegister,
+		  Q_WORD * msrValue)
 #else
-DEV_STATUS gfx_msr_read (unsigned int device, unsigned int msrRegister, Q_WORD *msrValue)
+DEV_STATUS
+gfx_msr_read(unsigned int device, unsigned int msrRegister, Q_WORD * msrValue)
 #endif
 {
-	if (device < NUM_DEVS)
-	{
-		if (msrDev[device].Present == FOUND) 
-			MSR_READ (msrRegister, msrDev[device].Address, &(msrValue->high), &(msrValue->low));
-		
-		return msrDev[device].Present;
-	}
-	return NOT_KNOWN;
+   if (device < NUM_DEVS) {
+      if (msrDev[device].Present == FOUND)
+	 MSR_READ(msrRegister, msrDev[device].Address, &(msrValue->high),
+		  &(msrValue->low));
+
+      return msrDev[device].Present;
+   }
+   return NOT_KNOWN;
 }
 
 /*--------------------------------------------------------------------
@@ -699,17 +709,21 @@ DEV_STATUS gfx_msr_read (unsigned int device, unsigned int msrRegister, Q_WORD *
  *--------------------------------------------------------------------
  */
 #if GFX_MSR_DYNAMIC
-DEV_STATUS redcloud_msr_write (unsigned int device, unsigned int msrRegister, Q_WORD *msrValue)
+DEV_STATUS
+redcloud_msr_write(unsigned int device, unsigned int msrRegister,
+		   Q_WORD * msrValue)
 #else
-DEV_STATUS gfx_msr_write (unsigned int device, unsigned int msrRegister, Q_WORD *msrValue)
+DEV_STATUS
+gfx_msr_write(unsigned int device, unsigned int msrRegister,
+	      Q_WORD * msrValue)
 #endif
 {
-	if (device < NUM_DEVS)
-	{
-		if (msrDev[device].Present == FOUND) 
-			MSR_WRITE (msrRegister, msrDev[device].Address, &(msrValue->high), &(msrValue->low));
-			
-		return msrDev[device].Present;
-	}
-	return NOT_KNOWN;
+   if (device < NUM_DEVS) {
+      if (msrDev[device].Present == FOUND)
+	 MSR_WRITE(msrRegister, msrDev[device].Address, &(msrValue->high),
+		   &(msrValue->low));
+
+      return msrDev[device].Present;
+   }
+   return NOT_KNOWN;
 }
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/release.txt b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/release.txt
index 8337322ed..8d0c87fe7 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/release.txt
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/release.txt
@@ -1,8 +1,8 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/release.txt,v 1.1 2002/10/11 14:33:01 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/release.txt,v 1.3 2003/02/06 17:46:02 alanh Exp $ */
 Durango Release Notes
-Version 2.45.00
-Win98/DOS/Linux
-August 29, 2002
+Version 2.49.01
+Win98/WinXP/DOS/Linux
+January 29, 2003
 
 -----------------------------------------------------------------------------
 PRODUCT INFORMATION
@@ -24,6 +24,58 @@ according to the needs of the application.
 REVISION HISTORY
 -----------------------------------------------------------------------------
 
+02/05/03 Version 2.49.02
+
+-----------------------------------------------------------------------------
+FUNCTIONAL CHANGES
+-----------------------------------------------------------------------------
+
+* Fixed GX2 left clipping for 4:2:0 video.
+
+=============================================================================
+
+01/29/03 Version 2.49.01
+
+-----------------------------------------------------------------------------
+FUNCTIONAL CHANGES
+-----------------------------------------------------------------------------
+
+* Removed unused variable in CS5530 video code.
+* Changed max supported pixel clock for SCx2xx to 157.5 MHz.
+
+=============================================================================
+
+01/10/03 Version 2.49.00
+
+-----------------------------------------------------------------------------
+FUNCTIONAL CHANGES
+-----------------------------------------------------------------------------
+
+* Added extra wait loop when polling for CRC completion.
+* Removed code that sets the pitch offsets for 4:2:0 video within
+  gfx_set_video_size.
+* Fixed panning code to work with any display pitch.
+* Added code to clear the PLL bypass bit when setting the dot PLL.
+* Fixed panning code so cursor never disappears when panning.
+* Changed GX2 delay loops to do a volatile register read to prevent
+  the entire delay loop from being discarded by a compiler.
+
+=============================================================================
+
+11/19/02 Version 2.47.00
+
+-----------------------------------------------------------------------------
+FUNCTIONAL CHANGES
+-----------------------------------------------------------------------------
+
+* Updated gfx2_* routines to use a signed stride.
+* SW workaround for issue #134.8 - Strange horizontal lines appearing while
+  drawing lines.
+* Implemented gfx_set_video_left_crop for CS5530
+* Updated sub carrier reset values for NTSC and PAL.
+
+=============================================================================
+
 08/29/02 Version 2.45.00
 
 -----------------------------------------------------------------------------
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/rndr_gu1.c b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/rndr_gu1.c
new file mode 100644
index 000000000..6d71f59ce
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/rndr_gu1.c
@@ -0,0 +1,1750 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/rndr_gu1.c,v 1.2 2003/01/14 09:34:34 alanh Exp $ */
+/*
+ * $Workfile: rndr_gu1.c $
+ *
+ * This file contains routines to program the 2D acceleration hardware for
+ * the first generation graphics unit (GXLV, SC1200).
+ * 
+ *    gfx_set_bpp            
+ *    gfx_set_solid_pattern  
+ *    gfx_set_mono_pattern
+ *    gfx_set_color_pattern
+ *    gfx_set_solid_source  
+ *    gfx_set_mono_source
+ *    gfx_set_raster_operation
+ *    gfx_pattern_fill
+ *    gfx_screen_to_screen_blt
+ *    gfx_screen_to_screen_xblt
+ *    gfx_color_bitmap_to_screen_blt
+ *    gfx_color_bitmap_to_screen_xblt
+ *    gfx_mono_bitmap_to_screen_blt
+ *    gfx_bresenham_line 
+ *    gfx_wait_until_idle   
+ *
+ * NSC_LIC_ALTERNATIVE_PREAMBLE
+ *
+ * Revision 1.0
+ *
+ * National Semiconductor Alternative GPL-BSD License
+ *
+ * National Semiconductor Corporation licenses this software 
+ * ("Software"):
+ *
+ *      Durango
+ *
+ * under one of the two following licenses, depending on how the 
+ * Software is received by the Licensee.
+ * 
+ * If this Software is received as part of the Linux Framebuffer or
+ * other GPL licensed software, then the GPL license designated 
+ * NSC_LIC_GPL applies to this Software; in all other circumstances 
+ * then the BSD-style license designated NSC_LIC_BSD shall apply.
+ *
+ * END_NSC_LIC_ALTERNATIVE_PREAMBLE */
+
+/* NSC_LIC_BSD
+ *
+ * National Semiconductor Corporation Open Source License for Durango
+ *
+ * (BSD License with Export Notice)
+ *
+ * Copyright (c) 1999-2001
+ * National Semiconductor Corporation.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met: 
+ *
+ *   * Redistributions of source code must retain the above copyright 
+ *     notice, this list of conditions and the following disclaimer. 
+ *
+ *   * Redistributions in binary form must reproduce the above 
+ *     copyright notice, this list of conditions and the following 
+ *     disclaimer in the documentation and/or other materials provided 
+ *     with the distribution. 
+ *
+ *   * Neither the name of the National Semiconductor Corporation nor 
+ *     the names of its contributors may be used to endorse or promote 
+ *     products derived from this software without specific prior 
+ *     written permission. 
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+ * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE,
+ * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE.
+ *
+ * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
+ * YOUR JURISDICTION. It is licensee's responsibility to comply with 
+ * any export regulations applicable in licensee's jurisdiction. Under 
+ * CURRENT (2001) U.S. export regulations this software 
+ * is eligible for export from the U.S. and can be downloaded by or 
+ * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
+ * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
+ * Syria, Sudan, Afghanistan and any other country to which the U.S. 
+ * has embargoed goods and services. 
+ *
+ * END_NSC_LIC_BSD */
+
+/* NSC_LIC_GPL
+ *
+ * National Semiconductor Corporation Gnu General Public License for Durango
+ *
+ * (GPL License with Export Notice)
+ *
+ * Copyright (c) 1999-2001
+ * National Semiconductor Corporation.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted under the terms of the GNU General 
+ * Public License as published by the Free Software Foundation; either 
+ * version 2 of the License, or (at your option) any later version  
+ *
+ * In addition to the terms of the GNU General Public License, neither 
+ * the name of the National Semiconductor Corporation nor the names of 
+ * its contributors may be used to endorse or promote products derived 
+ * from this software without specific prior written permission. 
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+ * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, 
+ * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE. See the GNU General Public License for more details. 
+ *
+ * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
+ * YOUR JURISDICTION. It is licensee's responsibility to comply with 
+ * any export regulations applicable in licensee's jurisdiction. Under 
+ * CURRENT (2001) U.S. export regulations this software 
+ * is eligible for export from the U.S. and can be downloaded by or 
+ * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
+ * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
+ * Syria, Sudan, Afghanistan and any other country to which the U.S. 
+ * has embargoed goods and services. 
+ *
+ * You should have received a copy of the GNU General Public License 
+ * along with this file; if not, write to the Free Software Foundation, 
+ * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 
+ *
+ * END_NSC_LIC_GPL */
+
+void gu1_set_bpp(unsigned short bpp);
+void gu1_set_solid_pattern(unsigned long color);
+void gu1_set_mono_pattern(unsigned long bgcolor, unsigned long fgcolor,
+			  unsigned long data0, unsigned long data1,
+			  unsigned char transparency);
+void gu1_set_color_pattern(unsigned long bgcolor, unsigned long fgcolor,
+			   unsigned long data0, unsigned long data1,
+			   unsigned long data2, unsigned long data3,
+			   unsigned char transparency);
+void gu1_load_color_pattern_line(short y, unsigned long *pattern_8x8);
+void gu1_set_solid_source(unsigned long color);
+void gu1_set_mono_source(unsigned long bgcolor, unsigned long fgcolor,
+			 unsigned short transparent);
+void gu1_set_pattern_flags(unsigned short flags);
+void gu1_set_raster_operation(unsigned char rop);
+void gu1_pattern_fill(unsigned short x, unsigned short y,
+		      unsigned short width, unsigned short height);
+void gu1_color_pattern_fill(unsigned short x, unsigned short y,
+			    unsigned short width, unsigned short height,
+			    unsigned long *pattern);
+void gu1_screen_to_screen_blt(unsigned short srcx, unsigned short srcy,
+			      unsigned short dstx, unsigned short dsty,
+			      unsigned short width, unsigned short height);
+void gu1_screen_to_screen_xblt(unsigned short srcx, unsigned short srcy,
+			       unsigned short dstx, unsigned short dsty,
+			       unsigned short width, unsigned short height,
+			       unsigned long color);
+void gu1_color_bitmap_to_screen_blt(unsigned short srcx, unsigned short srcy,
+				    unsigned short dstx, unsigned short dsty,
+				    unsigned short width,
+				    unsigned short height,
+				    unsigned char *data, long pitch);
+void gu1_color_bitmap_to_screen_xblt(unsigned short srcx, unsigned short srcy,
+				     unsigned short dstx, unsigned short dsty,
+				     unsigned short width,
+				     unsigned short height,
+				     unsigned char *data, long pitch,
+				     unsigned long color);
+void gu1_mono_bitmap_to_screen_blt(unsigned short srcx, unsigned short srcy,
+				   unsigned short dstx, unsigned short dsty,
+				   unsigned short width,
+				   unsigned short height, unsigned char *data,
+				   short pitch);
+void gu1_text_blt(unsigned short dstx, unsigned short dsty,
+		  unsigned short width, unsigned short height,
+		  unsigned char *data);
+void gu1_bresenham_line(unsigned short x, unsigned short y,
+			unsigned short length, unsigned short initerr,
+			unsigned short axialerr, unsigned short diagerr,
+			unsigned short flags);
+void gu1_wait_until_idle(void);
+
+#if GFX_NO_IO_IN_WAIT_MACROS
+#define GFX_WAIT_PENDING while(READ_REG16(GP_BLIT_STATUS) & BS_BLIT_PENDING) { ; }
+#define GFX_WAIT_BUSY while(READ_REG16(GP_BLIT_STATUS) & BS_BLIT_BUSY) { ; }
+#define GFX_WAIT_PIPELINE while (READ_REG16(GP_BLIT_STATUS) & BS_PIPELINE_BUSY) { ; }
+#else
+#define GFX_WAIT_PENDING while(READ_REG16(GP_BLIT_STATUS) & BS_BLIT_PENDING) { INB (0x80); }
+#define GFX_WAIT_BUSY while(READ_REG16(GP_BLIT_STATUS) & BS_BLIT_BUSY) { INB (0x80); }
+#define GFX_WAIT_PIPELINE while (READ_REG16(GP_BLIT_STATUS) & BS_PIPELINE_BUSY) { INB (0x80); }
+#endif
+
+void gu1_detect_blt_buffer_base(void);
+int gu1_test_blt_pending(void);
+void gu1_solid_fill(unsigned short x, unsigned short y,
+		    unsigned short width, unsigned short height,
+		    unsigned long color);
+
+/*---------------------------------------------------------------------------
+ * GFX_SET_BPP
+ *
+ * This routine sets the bits per pixel value in the graphics engine.
+ * It is also stored in a static variable to use in the future calls to 
+ * the rendering routines.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_2DACCEL_DYNAMIC
+void
+gu1_set_bpp(unsigned short bpp)
+#else
+void
+gfx_set_bpp(unsigned short bpp)
+#endif
+{
+   int control = 0;
+   unsigned short pitch = gfx_get_display_pitch();
+
+   GFXbpp = bpp;
+
+   /* DETECT BASE ADDRESSES FOR BLT BUFFERS */
+   /* Different for 2K or 3K of scratchpad.  Also need to calculate */
+   /* the number of pixels that can fit in a BLT buffer - need to */
+   /* subtract 16 for alignment considerations.  The 2K case, for */
+   /* example, is 816 bytes wide, allowing 800 pixels in 8 BPP, which */
+   /* means rendering operations won't be split for 800x600. */
+
+   gu1_detect_blt_buffer_base();
+   GFXbufferWidthPixels = GFXbb1Base - GFXbb0Base - 16;
+   if (bpp > 8) {
+      /* If 16bpp, divide GFXbufferWidthPixels by 2 */
+      GFXbufferWidthPixels >>= 1;
+   }
+
+   /* SET THE GRAPHICS CONTROLLER BPP AND PITCH */
+   if (bpp > 8) {
+      /* Set the 16bpp bit if necessary */
+      control = BC_16BPP;
+   }
+   if ((gfx_cpu_version == GFX_CPU_PYRAMID) && (pitch > 2048)) {
+      control |= BC_FB_WIDTH_4096;
+   } else if (pitch > 1024) {
+      control |= BC_FB_WIDTH_2048;
+   }
+   GFX_WAIT_BUSY;
+   WRITE_REG32(GP_BLIT_STATUS, control);
+}
+
+/*
+//---------------------------------------------------------------------------
+// GFX_SET_SOLID_SOURCE
+//
+// This routine is used to specify a solid source color.  For the Xfree96
+// display driver, the source color is used to specify a planemask and the 
+// ROP is adjusted accordingly.
+//---------------------------------------------------------------------------
+*/
+#if GFX_2DACCEL_DYNAMIC
+void
+gu1_set_solid_source(unsigned long color)
+#else
+void
+gfx_set_solid_source(unsigned long color)
+#endif
+{
+   /* CLEAR TRANSPARENCY FLAG */
+
+   GFXsourceFlags = 0;
+
+   /* FORMAT 8 BPP COLOR */
+   /* GX requires 8BPP color data be duplicated into bits [15:8]. */
+
+   if (GFXbpp == 8) {
+      color &= 0x00FF;
+      color |= (color << 8);
+   }
+
+   /* POLL UNTIL ABLE TO WRITE THE SOURCE COLOR */
+
+   GFX_WAIT_PENDING;
+   WRITE_REG16(GP_SRC_COLOR_0, (unsigned short)color);
+   WRITE_REG16(GP_SRC_COLOR_1, (unsigned short)color);
+}
+
+/*
+//---------------------------------------------------------------------------
+// GFX_SET_MONO_SOURCE
+//
+// This routine is used to specify the monochrome source colors.  
+// It must be called *after* loading any pattern data (those routines 
+// clear the source flags).
+//---------------------------------------------------------------------------
+*/
+#if GFX_2DACCEL_DYNAMIC
+void
+gu1_set_mono_source(unsigned long bgcolor, unsigned long fgcolor,
+		    unsigned short transparent)
+#else
+void
+gfx_set_mono_source(unsigned long bgcolor, unsigned long fgcolor,
+		    unsigned short transparent)
+#endif
+{
+   /* SET TRANSPARENCY FLAG */
+
+   GFXsourceFlags = transparent ? RM_SRC_TRANSPARENT : 0;
+
+   /* FORMAT 8 BPP COLOR */
+   /* GX requires 8BPP color data be duplicated into bits [15:8]. */
+
+   if (GFXbpp == 8) {
+      bgcolor &= 0x00FF;
+      bgcolor |= (bgcolor << 8);
+      fgcolor &= 0x00FF;
+      fgcolor |= (fgcolor << 8);
+   }
+
+   /* POLL UNTIL ABLE TO WRITE THE SOURCE COLOR */
+
+   GFX_WAIT_PENDING;
+   WRITE_REG16(GP_SRC_COLOR_0, (unsigned short)bgcolor);
+   WRITE_REG16(GP_SRC_COLOR_1, (unsigned short)fgcolor);
+}
+
+/*
+//---------------------------------------------------------------------------
+// GFX_SET_SOLID_PATTERN
+//
+// This routine is used to specify a solid pattern color.  It is called 
+// before performing solid rectangle fills or more complicated BLTs that 
+// use a solid pattern color. 
+//
+// The driver should always call "gfx_load_raster_operation" after a call 
+// to this routine to make sure that the pattern flags are set appropriately.
+//---------------------------------------------------------------------------
+*/
+#if GFX_2DACCEL_DYNAMIC
+void
+gu1_set_solid_pattern(unsigned long color)
+#else
+void
+gfx_set_solid_pattern(unsigned long color)
+#endif
+{
+   /* CLEAR TRANSPARENCY FLAG */
+
+   GFXsourceFlags = 0;
+
+   /* SET PATTERN FLAGS */
+
+   GFXpatternFlags = 0;
+
+   /* FORMAT 8 BPP COLOR */
+   /* GX requires 8BPP color data be duplicated into bits [15:8]. */
+
+   if (GFXbpp == 8) {
+      color &= 0x00FF;
+      color |= (color << 8);
+   }
+
+   /* SAVE THE REFORMATTED COLOR FOR LATER */
+   /* Used to call the "GFX_solid_fill" routine for special cases. */
+
+   GFXsavedColor = color;
+
+   /* POLL UNTIL ABLE TO WRITE THE PATTERN COLOR */
+
+   GFX_WAIT_PENDING;
+   WRITE_REG16(GP_PAT_COLOR_0, (unsigned short)color);
+}
+
+/*
+//---------------------------------------------------------------------------
+// GFX_SET_MONO_PATTERN
+//
+// This routine is used to specify a monochrome pattern. 
+//---------------------------------------------------------------------------
+*/
+#if GFX_2DACCEL_DYNAMIC
+void
+gu1_set_mono_pattern(unsigned long bgcolor, unsigned long fgcolor,
+		     unsigned long data0, unsigned long data1,
+		     unsigned char transparent)
+#else
+void
+gfx_set_mono_pattern(unsigned long bgcolor, unsigned long fgcolor,
+		     unsigned long data0, unsigned long data1,
+		     unsigned char transparent)
+#endif
+{
+   /* CLEAR TRANSPARENCY FLAG */
+
+   GFXsourceFlags = 0;
+
+   /* SET PATTERN FLAGS */
+
+   GFXpatternFlags = transparent ? RM_PAT_MONO | RM_PAT_TRANSPARENT :
+	 RM_PAT_MONO;
+
+   /* FORMAT 8 BPP COLOR */
+   /* GXm requires 8BPP color data be duplicated into bits [15:8]. */
+
+   if (GFXbpp == 8) {
+      bgcolor &= 0x00FF;
+      bgcolor |= (bgcolor << 8);
+      fgcolor &= 0x00FF;
+      fgcolor |= (fgcolor << 8);
+   }
+
+   /* POLL UNTIL ABLE TO WRITE THE PATTERN COLORS AND DATA */
+
+   GFX_WAIT_PENDING;
+   WRITE_REG16(GP_PAT_COLOR_0, (unsigned short)bgcolor);
+   WRITE_REG16(GP_PAT_COLOR_1, (unsigned short)fgcolor);
+   WRITE_REG32(GP_PAT_DATA_0, data0);
+   WRITE_REG32(GP_PAT_DATA_1, data1);
+}
+
+/*
+//---------------------------------------------------------------------------
+// GFX_SET_COLOR_PATTERN
+//
+// This routine is used to specify a color pattern. 
+//---------------------------------------------------------------------------
+*/
+#if GFX_2DACCEL_DYNAMIC
+void
+gu1_set_color_pattern(unsigned long bgcolor, unsigned long fgcolor,
+		      unsigned long data0, unsigned long data1,
+		      unsigned long data2, unsigned long data3,
+		      unsigned char transparent)
+#else
+void
+gfx_set_color_pattern(unsigned long bgcolor, unsigned long fgcolor,
+		      unsigned long data0, unsigned long data1,
+		      unsigned long data2, unsigned long data3,
+		      unsigned char transparent)
+#endif
+{
+   /* CLEAR TRANSPARENCY FLAG */
+
+   GFXsourceFlags = 0;
+
+   /* SET PATTERN FLAGS */
+
+   GFXpatternFlags = transparent ? RM_PAT_MONO | RM_PAT_TRANSPARENT :
+	 RM_PAT_MONO;
+
+   GFXpatternFlags |= RM_PAT_COLOR;
+   /* FORMAT 8 BPP COLOR */
+   /* GXm requires 8BPP color data be duplicated into bits [15:8]. */
+
+   if (GFXbpp == 8) {
+      bgcolor &= 0x00FF;
+      bgcolor |= (bgcolor << 8);
+      fgcolor &= 0x00FF;
+      fgcolor |= (fgcolor << 8);
+   }
+
+   /* POLL UNTIL ABLE TO WRITE THE PATTERN COLORS AND DATA */
+
+   GFX_WAIT_PENDING;
+   WRITE_REG16(GP_PAT_COLOR_0, (unsigned short)bgcolor);
+   WRITE_REG16(GP_PAT_COLOR_1, (unsigned short)fgcolor);
+   WRITE_REG32(GP_PAT_DATA_0, data0);
+   WRITE_REG32(GP_PAT_DATA_1, data1);
+   if (GFXbpp > 8) {
+      WRITE_REG32(GP_PAT_DATA_2, data2);
+      WRITE_REG32(GP_PAT_DATA_3, data3);
+   }
+}
+
+/*
+//---------------------------------------------------------------------------
+// GFX_LOAD_COLOR_PATTERN_LINE
+//
+// This routine is used to load a single line of a 8x8 color pattern.   
+//---------------------------------------------------------------------------
+*/
+#if GFX_2DACCEL_DYNAMIC
+void
+gu1_load_color_pattern_line(short y, unsigned long *pattern_8x8)
+#else
+void
+gfx_load_color_pattern_line(short y, unsigned long *pattern_8x8)
+#endif
+{
+   /* CLEAR TRANSPARENCY FLAG */
+
+   GFXsourceFlags = 0;
+
+   /* SET PATTERN FLAGS */
+
+   GFXpatternFlags = RM_PAT_COLOR;
+
+   y &= 7;
+
+   if (GFXbpp > 8)
+      pattern_8x8 += (y << 2);
+   else
+      pattern_8x8 += (y << 1);
+
+   /* POLL UNTIL ABLE TO WRITE THE PATTERN COLORS AND DATA */
+
+   GFX_WAIT_PENDING;
+   WRITE_REG32(GP_PAT_DATA_0, pattern_8x8[0]);
+   WRITE_REG32(GP_PAT_DATA_1, pattern_8x8[1]);
+   if (GFXbpp > 8) {
+      WRITE_REG32(GP_PAT_DATA_2, pattern_8x8[2]);
+      WRITE_REG32(GP_PAT_DATA_3, pattern_8x8[3]);
+   }
+}
+
+/*
+//---------------------------------------------------------------------------
+// GFX_SET_RASTER_OPERATION
+//
+// This routine loads the specified raster operation.  It sets the pattern
+// flags appropriately.
+//---------------------------------------------------------------------------
+*/
+#if GFX_2DACCEL_DYNAMIC
+void
+gu1_set_raster_operation(unsigned char rop)
+#else
+void
+gfx_set_raster_operation(unsigned char rop)
+#endif
+{
+   unsigned short rop16;
+
+   /* GENERATE 16-BIT VERSION OF ROP WITH PATTERN FLAGS */
+
+   rop16 = (unsigned short)rop | GFXpatternFlags;
+   if ((rop & 0x33) ^ ((rop >> 2) & 0x33))
+      rop16 |= GFXsourceFlags;
+
+   /* SAVE ROP FOR LATER COMPARISONS */
+   /* Need to have the pattern flags included */
+
+   GFXsavedRop = rop16;
+
+   /* SET FLAG INDICATING ROP REQUIRES DESTINATION DATA */
+   /* True if even bits (0:2:4:6) do not equal the correspinding */
+   /* even bits (1:3:5:7). */
+
+   GFXusesDstData = ((rop & 0x55) ^ ((rop >> 1) & 0x55));
+
+   /* POLL UNTIL ABLE TO WRITE THE PATTERN COLOR */
+   /* Only one operation can be pending at a time. */
+
+   GFX_WAIT_PENDING;
+   WRITE_REG16(GP_RASTER_MODE, rop16);
+}
+
+/*
+//---------------------------------------------------------------------------
+// GFX_SOLID_FILL
+//
+// This routine MUST be used when performing a solid rectangle fill with 
+// the ROPs of PATCOPY (0xF0), BLACKNESS (0x00), WHITENESS (0xFF), or 
+// PATINVERT (0x0F).  There is a bug in GXm for these cases that requires a 
+// workaround.  
+//
+// For BLACKNESS (ROP = 0x00), set the color to 0x0000.  
+// For WHITENESS (ROP = 0xFF), set the color to 0xFFFF.
+// For PATINVERT (ROP = 0x0F), invert the desired color.
+//
+//      X               screen X position (left)
+//      Y               screen Y position (top)
+//      WIDTH           width of rectangle, in pixels
+//      HEIGHT          height of rectangle, in scanlines
+//      COLOR           fill color
+//
+// THIS ROUTINE SHOULD NOT BE DIRECTLY CALLED FROM THE DRIVER.  The driver 
+// should always use GFX_pattern_fill and let that routine call this one
+// when approipriate.  This is to hide quirks specific to MediaGX hardware.
+//---------------------------------------------------------------------------
+*/
+void
+gu1_solid_fill(unsigned short x, unsigned short y,
+	       unsigned short width, unsigned short height,
+	       unsigned long color)
+{
+   unsigned short section;
+
+   /* POLL UNTIL ABLE TO WRITE TO THE REGISTERS */
+   /* Only one operation can be pending at a time. */
+
+   GFX_WAIT_PENDING;
+
+   /* SET REGISTERS TO DRAW RECTANGLE */
+
+   WRITE_REG16(GP_DST_XCOOR, x);
+   WRITE_REG16(GP_DST_YCOOR, y);
+   WRITE_REG16(GP_HEIGHT, height);
+   WRITE_REG16(GP_RASTER_MODE, 0x00F0);	/* PATCOPY */
+   WRITE_REG16(GP_PAT_COLOR_0, (unsigned short)color);
+
+   /* CHECK WIDTH FOR GX BUG WORKAROUND */
+
+   if (width <= 16) {
+      /* OK TO DRAW SMALL RECTANGLE IN ONE PASS */
+
+      WRITE_REG16(GP_WIDTH, width);
+      WRITE_REG16(GP_BLIT_MODE, 0);
+   } else {
+      /* DRAW FIRST PART OF RECTANGLE */
+      /* Get to a 16 pixel boundary. */
+
+      section = 0x10 - (x & 0x0F);
+      WRITE_REG16(GP_WIDTH, section);
+      WRITE_REG16(GP_BLIT_MODE, 0);
+
+      /* POLL UNTIL ABLE TO LOAD THE SECOND RECTANGLE */
+
+      GFX_WAIT_PENDING;
+      WRITE_REG16(GP_DST_XCOOR, x + section);
+      WRITE_REG16(GP_DST_YCOOR, y);
+      WRITE_REG16(GP_WIDTH, width - section);
+      WRITE_REG16(GP_BLIT_MODE, 0);
+   }
+}
+
+/*
+//----------------------------------------------------------------------------
+// GFX_PATTERN_FILL
+//
+// This routine is used to fill a rectangular region.  The pattern must 
+// be previously loaded using one of GFX_load_*_pattern routines.  Also, the 
+// raster operation must be previously specified using the 
+// "GFX_load_raster_operation" routine.
+//
+//      X               screen X position (left)
+//      Y               screen Y position (top)
+//      WIDTH           width of rectangle, in pixels
+//      HEIGHT          height of rectangle, in scanlines
+//----------------------------------------------------------------------------
+*/
+#if GFX_2DACCEL_DYNAMIC
+void
+gu1_pattern_fill(unsigned short x, unsigned short y,
+		 unsigned short width, unsigned short height)
+#else
+void
+gfx_pattern_fill(unsigned short x, unsigned short y,
+		 unsigned short width, unsigned short height)
+#endif
+{
+   unsigned short section, buffer_width, blit_mode;
+
+   /* CHECK IF OPTIMIZED SOLID CASES */
+   /* Check all 16 bits of the ROP to include solid pattern flags. */
+
+   switch (GFXsavedRop) {
+      /* CHECK FOR SPECIAL CASES WITHOUT DESTINATION DATA */
+      /* Need hardware workaround for fast "burst write" cases. */
+
+   case 0x00F0:
+      gu1_solid_fill(x, y, width, height, (unsigned short)GFXsavedColor);
+      break;
+   case 0x000F:
+      gu1_solid_fill(x, y, width, height, (unsigned short)~GFXsavedColor);
+      break;
+   case 0x0000:
+      gu1_solid_fill(x, y, width, height, 0x0000);
+      break;
+   case 0x00FF:
+      gu1_solid_fill(x, y, width, height, 0xFFFF);
+      break;
+
+      /* REMAINING CASES REQUIRE DESTINATION DATA OR NOT SOLID COLOR */
+
+   default:
+
+      /* DETERMINE BLT MODE VALUE */
+      /* Still here for non-solid patterns without destination data. */
+
+      blit_mode = GFXusesDstData ? BM_READ_DST_FB0 : 0;
+
+      /* SET SOURCE EXPANSION MODE */
+      /* If the ROP requires source data, then the source data is all 1's */
+      /* and then expanded into the desired color in GP_SRC_COLOR_1. */
+
+      blit_mode |= BM_SOURCE_EXPAND;
+
+      /* POLL UNTIL ABLE TO WRITE TO THE REGISTERS */
+      /* Write the registers that do not change for each section. */
+
+      GFX_WAIT_PENDING;
+      WRITE_REG16(GP_HEIGHT, height);
+
+      /* SINCE ONLY DESTINATION DATA, WE CAN USE BOTH BB0 AND BB1. */
+      /* Therefore, width available = BLT buffer width * 2. */
+
+      buffer_width = GFXbufferWidthPixels << 1;
+
+      /* REPEAT UNTIL FINISHED WITH RECTANGLE */
+      /* Perform BLT in vertical sections, as wide as the BLT buffer */
+      /* allows.  Hardware does not split the operations, so */
+      /* software must do it to avoid large scanlines that would */
+      /* overflow the BLT buffers. */
+
+      while (width > 0) {
+	 /* DETERMINE WIDTH OF SECTION */
+
+	 if (width > buffer_width)
+	    section = buffer_width;
+	 else
+	    section = width;
+
+	 /* POLL UNTIL ABLE TO WRITE TO THE REGISTERS */
+
+	 GFX_WAIT_PENDING;
+	 WRITE_REG16(GP_DST_XCOOR, x);
+	 WRITE_REG16(GP_DST_YCOOR, y);
+	 WRITE_REG16(GP_WIDTH, section);
+	 WRITE_REG16(GP_BLIT_MODE, blit_mode);
+
+	 /* ADJUST PARAMETERS FOR NEXT SECTION */
+
+	 width -= section;
+	 x += section;
+      }
+      break;
+   }
+}
+
+/*
+//----------------------------------------------------------------------------
+// GFX_COLOR_PATTERN_FILL
+//
+// This routine is used to render a rectangle using the current raster 
+// operation and the specified color pattern.  It allows an 8x8 color 
+// pattern to be rendered without multiple calls to the gfx_set_color_pattern
+// and gfx_pattern_fill routines.
+//
+//      X               screen X position (left)
+//      Y               screen Y position (top)
+//      WIDTH           width of rectangle, in pixels
+//      HEIGHT          height of rectangle, in scanlines
+//      *PATTERN		pointer to 8x8 color pattern data
+//----------------------------------------------------------------------------
+*/
+#if GFX_2DACCEL_DYNAMIC
+void
+gu1_color_pattern_fill(unsigned short x, unsigned short y,
+		       unsigned short width, unsigned short height,
+		       unsigned long *pattern)
+#else
+void
+gfx_color_pattern_fill(unsigned short x, unsigned short y,
+		       unsigned short width, unsigned short height,
+		       unsigned long *pattern)
+#endif
+{
+   unsigned short blit_mode, passes, cur_y, pat_y, i;
+   unsigned short buffer_width, line_width;
+   unsigned short bpp_shift, section, cur_x;
+
+   /* SET APPROPRIATE INCREMENT */
+
+   bpp_shift = (GFXbpp > 8) ? 2 : 1;
+
+   /* SET DESTINATION REQUIRED */
+
+   blit_mode = GFXusesDstData ? BM_READ_DST_FB0 : 0;
+
+   /* SET SOURCE EXPANSION */
+
+   blit_mode |= BM_SOURCE_EXPAND;
+
+   /* OVERRIDE RASTER MODE TO FORCE A COLOR PATTERN */
+
+   GFX_WAIT_PENDING;
+   WRITE_REG16(GP_RASTER_MODE,
+	       (GFXsavedRop & ~RM_PAT_MASK & ~RM_PAT_TRANSPARENT) |
+	       RM_PAT_COLOR);
+
+   /* WRITE THE REGISTERS THAT DO NOT CHANGE         */
+   /* If destination data is required, the width and */
+   /* x position will be overwritten.                */
+
+   WRITE_REG16(GP_HEIGHT, 1);
+   WRITE_REG16(GP_WIDTH, width);
+   WRITE_REG16(GP_DST_XCOOR, x);
+
+   /* THE ENTIRE PATTERN WILL NOT BE DRAWN IF THE HEIGHT IS LESS THAN 8 */
+
+   passes = (height < 8) ? height : 8;
+
+   /* SINCE ONLY DESTINATION DATA, WE CAN USE BOTH BB0 AND BB1. */
+   /* Therefore, width available = BLT buffer width * 2. */
+
+   buffer_width = GFXbufferWidthPixels << 1;
+
+   for (i = 0; i < passes; i++) {
+      pat_y = ((y + i) & 7) << bpp_shift;
+      cur_y = y + i;
+
+      /* WRITE THE PATTERN DATA FOR THE ACTIVE LINE */
+
+      GFX_WAIT_PENDING;
+      WRITE_REG32(GP_PAT_DATA_0, pattern[pat_y]);
+      WRITE_REG32(GP_PAT_DATA_1, pattern[pat_y + 1]);
+
+      if (GFXbpp > 8) {
+	 WRITE_REG32(GP_PAT_DATA_2, pattern[pat_y + 2]);
+	 WRITE_REG32(GP_PAT_DATA_3, pattern[pat_y + 3]);
+      }
+
+      /* SPLIT BLT LINE INTO SECTIONS IF REQUIRED              */
+      /* If no destination data is required, we can ignore     */
+      /* the BLT buffers.  Otherwise, we must separate the BLT */
+      /* so as not to overflow the buffers                     */
+
+      if (blit_mode & BM_READ_DST_BB0) {
+	 line_width = width;
+	 cur_x = x;
+
+	 while (line_width) {
+	    section = (line_width > buffer_width) ? buffer_width : line_width;
+	    cur_y = y + i;
+
+	    GFX_WAIT_PENDING;
+	    WRITE_REG16(GP_DST_XCOOR, cur_x);
+	    WRITE_REG16(GP_WIDTH, section);
+
+	    while (cur_y < y + height) {
+	       GFX_WAIT_PENDING;
+	       WRITE_REG16(GP_DST_YCOOR, cur_y);
+	       WRITE_REG16(GP_BLIT_MODE, blit_mode);
+	       cur_y += 8;
+	    }
+
+	    cur_x += section;
+	    line_width -= section;
+	 }
+
+      } else {
+	 while (cur_y < y + height) {
+	    GFX_WAIT_PENDING;
+	    WRITE_REG16(GP_DST_YCOOR, cur_y);
+	    WRITE_REG16(GP_BLIT_MODE, blit_mode);
+	    cur_y += 8;
+	 }
+      }
+
+   }
+
+   /* RESTORE ORIGINAL ROP AND FLAGS */
+
+   GFX_WAIT_PENDING;
+   WRITE_REG16(GP_RASTER_MODE, GFXsavedRop);
+
+}
+
+/*
+//----------------------------------------------------------------------------
+// SCREEN TO SCREEN BLT
+//
+// This routine should be used to perform a screen to screen BLT when the 
+// ROP does not require destination data.
+//
+//      SRCX            screen X position to copy from
+//      SRCY            screen Y position to copy from
+//      DSTX            screen X position to copy to
+//      DSTY            screen Y position to copy to
+//      WIDTH           width of rectangle, in pixels
+//      HEIGHT          height of rectangle, in scanlines
+//----------------------------------------------------------------------------
+*/
+#if GFX_2DACCEL_DYNAMIC
+void
+gu1_screen_to_screen_blt(unsigned short srcx, unsigned short srcy,
+			 unsigned short dstx, unsigned short dsty,
+			 unsigned short width, unsigned short height)
+#else
+void
+gfx_screen_to_screen_blt(unsigned short srcx, unsigned short srcy,
+			 unsigned short dstx, unsigned short dsty,
+			 unsigned short width, unsigned short height)
+#endif
+{
+   unsigned short section, buffer_width;
+   unsigned short blit_mode;
+
+   /* CHECK IF RASTER OPERATION REQUIRES DESTINATION DATA */
+
+   blit_mode = GFXusesDstData ? BM_READ_DST_FB1 | BM_READ_SRC_FB :
+	 BM_READ_SRC_FB;
+
+   /* CHECK Y DIRECTION */
+   /* Hardware has support for negative Y direction. */
+
+   if (dsty > srcy) {
+      blit_mode |= BM_REVERSE_Y;
+      srcy += height - 1;
+      dsty += height - 1;
+   }
+
+   /* CHECK X DIRECTION */
+   /* Hardware does not support negative X direction since at the time */
+   /* of development all supported resolutions could fit a scanline of */
+   /* data at once into the BLT buffers (using both BB0 and BB1).  This */
+   /* code is more generic to allow for any size BLT buffer. */
+
+   if (dstx > srcx) {
+      srcx += width;
+      dstx += width;
+   }
+
+   /* POLL UNTIL ABLE TO WRITE TO THE REGISTERS */
+   /* Write the registers that do not change for each section. */
+
+   GFX_WAIT_PENDING;
+   WRITE_REG16(GP_HEIGHT, height);
+
+   /* CHECK AVAILABLE BLT BUFFER SIZE */
+   /* Can use both BLT buffers if no destination data is required. */
+
+   buffer_width = GFXusesDstData ? GFXbufferWidthPixels :
+	 GFXbufferWidthPixels << 1;
+
+   /* REPEAT UNTIL FINISHED WITH RECTANGLE */
+   /* Perform BLT in vertical sections, as wide as the BLT buffer allows. */
+   /* Hardware does not split the operations, so software must do it to */
+   /* avoid large scanlines that would overflow the BLT buffers. */
+
+   while (width > 0) {
+      /* CHECK WIDTH OF CURRENT SECTION */
+
+      if (width > buffer_width)
+	 section = buffer_width;
+      else
+	 section = width;
+
+      /* PROGRAM REGISTERS THAT ARE THE SAME FOR EITHER X DIRECTION */
+
+      GFX_WAIT_PENDING;
+      WRITE_REG16(GP_SRC_YCOOR, srcy);
+      WRITE_REG16(GP_DST_YCOOR, dsty);
+      WRITE_REG16(GP_WIDTH, section);
+
+      /* CHECK X DIRECTION */
+
+      if (dstx > srcx) {
+	 /* NEGATIVE X DIRECTION */
+	 /* Still positive X direction within the section. */
+
+	 srcx -= section;
+	 dstx -= section;
+	 WRITE_REG16(GP_SRC_XCOOR, srcx);
+	 WRITE_REG16(GP_DST_XCOOR, dstx);
+	 WRITE_REG16(GP_BLIT_MODE, blit_mode);
+      } else {
+	 /* POSITIVE X DIRECTION */
+
+	 WRITE_REG16(GP_SRC_XCOOR, srcx);
+	 WRITE_REG16(GP_DST_XCOOR, dstx);
+	 WRITE_REG16(GP_BLIT_MODE, blit_mode);
+	 dstx += section;
+	 srcx += section;
+      }
+      width -= section;
+   }
+}
+
+/*
+//----------------------------------------------------------------------------
+// SCREEN TO SCREEN TRANSPARENT BLT
+//
+// This routine should be used to perform a screen to screen BLT when a 
+// specified color should by transparent.  The only supported ROP is SRCCOPY.
+//
+//      SRCX            screen X position to copy from
+//      SRCY            screen Y position to copy from
+//      DSTX            screen X position to copy to
+//      DSTY            screen Y position to copy to
+//      WIDTH           width of rectangle, in pixels
+//      HEIGHT          height of rectangle, in scanlines
+//      COLOR           transparent color
+//----------------------------------------------------------------------------
+*/
+#if GFX_2DACCEL_DYNAMIC
+void
+gu1_screen_to_screen_xblt(unsigned short srcx, unsigned short srcy,
+			  unsigned short dstx, unsigned short dsty,
+			  unsigned short width, unsigned short height,
+			  unsigned long color)
+#else
+void
+gfx_screen_to_screen_xblt(unsigned short srcx, unsigned short srcy,
+			  unsigned short dstx, unsigned short dsty,
+			  unsigned short width, unsigned short height,
+			  unsigned long color)
+#endif
+{
+   unsigned short section, buffer_width;
+   unsigned short blit_mode = BM_READ_SRC_FB;
+
+   /* CHECK Y DIRECTION */
+   /* Hardware has support for negative Y direction. */
+
+   if (dsty > srcy) {
+      blit_mode |= BM_REVERSE_Y;
+      srcy += height - 1;
+      dsty += height - 1;
+   }
+
+   /* CHECK X DIRECTION */
+   /* Hardware does not support negative X direction since at the time */
+   /* of development all supported resolutions could fit a scanline of */
+   /* data at once into the BLT buffers (using both BB0 and BB1).  This */
+   /* code is more generic to allow for any size BLT buffer. */
+
+   if (dstx > srcx) {
+      srcx += width;
+      dstx += width;
+   }
+
+   /* CALCULATE BLT BUFFER SIZE */
+   /* Need to use BB1 to store the BLT buffer data. */
+
+   buffer_width = GFXbufferWidthPixels;
+
+   /* WRITE TRANSPARENCY COLOR TO BLT BUFFER 1 */
+
+   if (GFXbpp == 8) {
+      color &= 0x00FF;
+      color |= (color << 8);
+   }
+   color = (color & 0x0000FFFF) | (color << 16);
+
+   /* WAIT UNTIL PIPELINE IS NOT BUSY BEFORE LOADING DATA INTO BB1 */
+   /* Need to make sure any previous BLT using BB1 is complete. */
+   /* Only need to load 32 bits of BB1 for the 1 pixel BLT that follows. */
+
+   GFX_WAIT_BUSY;
+   WRITE_SCRATCH32(GFXbb1Base, color);
+
+   /* DO BOGUS BLT TO LATCH DATA FROM BB1 */
+   /* Already know graphics pipeline is idle. */
+   /* Only need to latch data into the holding registers for the current */
+   /* data from BB1.  A 1 pixel wide BLT will suffice. */
+
+   WRITE_REG32(GP_DST_XCOOR, 0);
+   WRITE_REG32(GP_SRC_XCOOR, 0);
+   WRITE_REG32(GP_WIDTH, 0x00010001);
+   WRITE_REG16(GP_RASTER_MODE, 0x00CC);
+   WRITE_REG16(GP_BLIT_MODE, BM_READ_SRC_FB | BM_READ_DST_BB1);
+
+   /* WRITE REGISTERS FOR REAL SCREEN TO SCREEN BLT */
+
+   GFX_WAIT_PENDING;
+   WRITE_REG16(GP_HEIGHT, height);
+   WRITE_REG16(GP_RASTER_MODE, 0x10C6);
+   WRITE_REG32(GP_PAT_COLOR_0, 0xFFFFFFFF);
+
+   /* REPEAT UNTIL FINISHED WITH RECTANGLE */
+   /* Perform BLT in vertical sections, as wide as the BLT buffer allows. */
+   /* Hardware does not split the operations, so software must do it to */
+   /* avoid large scanlines that would overflow the BLT buffers. */
+
+   while (width > 0) {
+      /* CHECK WIDTH OF CURRENT SECTION */
+
+      if (width > buffer_width)
+	 section = buffer_width;
+      else
+	 section = width;
+
+      /* PROGRAM REGISTERS THAT ARE THE SAME FOR EITHER X DIRECTION */
+
+      GFX_WAIT_PENDING;
+      WRITE_REG16(GP_SRC_YCOOR, srcy);
+      WRITE_REG16(GP_DST_YCOOR, dsty);
+      WRITE_REG16(GP_WIDTH, section);
+
+      /* CHECK X DIRECTION */
+      /* Again, this must be done in software, and can be removed if the */
+      /* display driver knows that the BLT buffers will always be large  */
+      /* enough to contain an entire scanline of a screen to screen BLT. */
+
+      if (dstx > srcx) {
+	 /* NEGATIVE X DIRECTION */
+	 /* Still positive X direction within the section. */
+
+	 srcx -= section;
+	 dstx -= section;
+	 WRITE_REG16(GP_SRC_XCOOR, srcx);
+	 WRITE_REG16(GP_DST_XCOOR, dstx);
+	 WRITE_REG16(GP_BLIT_MODE, blit_mode);
+      } else {
+	 /* POSITIVE X DIRECTION */
+
+	 WRITE_REG16(GP_SRC_XCOOR, srcx);
+	 WRITE_REG16(GP_DST_XCOOR, dstx);
+	 WRITE_REG16(GP_BLIT_MODE, blit_mode);
+	 dstx += section;
+	 srcx += section;
+      }
+      width -= section;
+   }
+}
+
+/*
+//----------------------------------------------------------------------------
+// COLOR BITMAP TO SCREEN BLT
+//
+// This routine transfers color bitmap data to the screen.  For most cases,
+// when the ROP is SRCCOPY, it may be faster to write a separate routine that
+// copies the data to the frame buffer directly.  This routine should be 
+// used when the ROP requires destination data.
+//
+// Transparency is handled by another routine.
+//
+//      SRCX            X offset within source bitmap
+//      SRCY            Y offset within source bitmap
+//      DSTX            screen X position to render data
+//      DSTY            screen Y position to render data
+//      WIDTH           width of rectangle, in pixels
+//      HEIGHT          height of rectangle, in scanlines
+//      *DATA           pointer to bitmap data
+//      PITCH           pitch of bitmap data (bytes between scanlines)
+//----------------------------------------------------------------------------
+*/
+
+#if GFX_2DACCEL_DYNAMIC
+void
+gu1_color_bitmap_to_screen_blt(unsigned short srcx, unsigned short srcy,
+			       unsigned short dstx, unsigned short dsty,
+			       unsigned short width, unsigned short height,
+			       unsigned char *data, long pitch)
+#else
+void
+gfx_color_bitmap_to_screen_blt(unsigned short srcx, unsigned short srcy,
+			       unsigned short dstx, unsigned short dsty,
+			       unsigned short width, unsigned short height,
+			       unsigned char *data, long pitch)
+#endif
+{
+   unsigned short section, buffer_width;
+   unsigned short blit_mode = BM_READ_SRC_BB0;
+   unsigned short temp_height;
+   unsigned long dword_bytes_needed, bytes_extra;
+   unsigned long bpp_shift;
+   long array_offset;
+
+   /* CHECK SIZE OF BLT BUFFER */
+
+   buffer_width = GFXbufferWidthPixels;
+
+   /* CHECK IF RASTER OPERATION REQUIRES DESTINATION DATA */
+   /* If no destination data, we have twice the room for  */
+   /* source data.                                        */
+
+   if (GFXusesDstData)
+      blit_mode |= BM_READ_DST_FB1;
+   else
+      buffer_width <<= 1;
+
+   /* SET THE SCRATCHPAD BASE */
+
+   SET_SCRATCH_BASE(GFXbb0Base);
+
+   /* POLL UNTIL ABLE TO WRITE TO THE REGISTERS                */
+   /* Write the registers that do not change for each section. */
+
+   GFX_WAIT_PENDING;
+   WRITE_REG16(GP_HEIGHT, 1);
+
+   bpp_shift = (GFXbpp + 7) >> 4;
+
+   while (width > 0) {
+      if (width > buffer_width)
+	 section = buffer_width;
+      else
+	 section = width;
+
+      dword_bytes_needed = (section << bpp_shift) & ~3l;
+      bytes_extra = (section << bpp_shift) & 3l;
+
+      temp_height = height;
+
+      /* WRITE THE REGISTERS FOR EACH SECTION                          */
+      /* The GX hardware will auto-increment the Y coordinate, meaning */
+      /* that we don't have to.                                        */
+
+      WRITE_REG16(GP_WIDTH, section);
+      WRITE_REG16(GP_DST_XCOOR, dstx);
+      WRITE_REG16(GP_DST_YCOOR, dsty);
+
+      /* CALCULATE THE BITMAP OFFSET */
+
+      array_offset =
+	    (unsigned long)srcy *(long)pitch + ((long)srcx << bpp_shift);
+
+      while (temp_height--) {
+	 GFX_WAIT_PIPELINE;
+
+	 /* WRITE ALL DATA TO THE BLT BUFFERS */
+	 /* The WRITE_SCRATCH_STRING macro assumes that the data begins at the */
+	 /* scratchpad offset set by the SET_SCRATCH_BASE macro.               */
+
+	 WRITE_SCRATCH_STRING(dword_bytes_needed, bytes_extra, data,
+			      array_offset);
+	 WRITE_REG16(GP_BLIT_MODE, blit_mode);
+
+	 array_offset += pitch;
+      }
+
+      width -= section;
+      srcx += section;
+      dstx += section;
+   }
+}
+
+/*
+//----------------------------------------------------------------------------
+// COLOR BITMAP TO SCREEN TRANSPARENT BLT
+//
+// This routine transfers color bitmap data to the screen with transparency.
+// The transparent color is specified.  The only supported ROP is SRCCOPY, 
+// meaning that transparency cannot be applied if the ROP requires 
+// destination data (this is a hardware restriction).
+//
+//      SRCX            X offset within source bitmap
+//      SRCY            Y offset within source bitmap
+//      DSTX            screen X position to render data
+//      DSTY            screen Y position to render data
+//      WIDTH           width of rectangle, in pixels
+//      HEIGHT          height of rectangle, in scanlines
+//      *DATA           pointer to bitmap data
+//      PITCH           pitch of bitmap data (bytes between scanlines)
+//      COLOR           transparent color
+//----------------------------------------------------------------------------
+*/
+#if GFX_2DACCEL_DYNAMIC
+void
+gu1_color_bitmap_to_screen_xblt(unsigned short srcx, unsigned short srcy,
+				unsigned short dstx, unsigned short dsty,
+				unsigned short width, unsigned short height,
+				unsigned char *data, long pitch,
+				unsigned long color)
+#else
+void
+gfx_color_bitmap_to_screen_xblt(unsigned short srcx, unsigned short srcy,
+				unsigned short dstx, unsigned short dsty,
+				unsigned short width, unsigned short height,
+				unsigned char *data, long pitch,
+				unsigned long color)
+#endif
+{
+   unsigned short section, buffer_width;
+   unsigned short temp_height;
+   unsigned long dword_bytes_needed, bytes_extra;
+   unsigned long bpp_shift;
+   long array_offset;
+
+   /* CHECK SIZE OF BLT BUFFER */
+
+   buffer_width = GFXbufferWidthPixels;
+
+   /* WRITE TRANSPARENCY COLOR TO BLT BUFFER 1 */
+
+   if (GFXbpp == 8) {
+      color &= 0x00FF;
+      color |= (color << 8);
+   }
+   color = (color & 0x0000FFFF) | (color << 16);
+
+   /* WAIT UNTIL PIPELINE IS NOT BUSY BEFORE LOADING DATA INTO BB1 */
+   /* Need to make sure any previous BLT using BB1 is complete. */
+   /* Only need to load 32 bits of BB1 for the 1 pixel BLT that follows. */
+
+   GFX_WAIT_PIPELINE;
+   GFX_WAIT_PENDING;
+   WRITE_SCRATCH32(GFXbb1Base, color);
+
+   /* DO BOGUS BLT TO LATCH DATA FROM BB1 */
+   /* Already know graphics pipeline is idle. */
+   /* Only need to latch data into the holding registers for the current */
+   /* data from BB1.  A 1 pixel wide BLT will suffice. */
+
+   WRITE_REG32(GP_DST_XCOOR, 0);
+   WRITE_REG32(GP_SRC_XCOOR, 0);
+   WRITE_REG32(GP_WIDTH, 0x00010001);
+   WRITE_REG16(GP_RASTER_MODE, 0x00CC);
+   WRITE_REG16(GP_BLIT_MODE, BM_READ_SRC_FB | BM_READ_DST_BB1);
+
+   /* POLL UNTIL ABLE TO WRITE TO THE REGISTERS */
+   /* Write the registers that do not change for each section. */
+
+   GFX_WAIT_PENDING;
+   WRITE_REG16(GP_HEIGHT, 1);
+   WRITE_REG16(GP_RASTER_MODE, 0x10C6);
+   WRITE_REG32(GP_PAT_COLOR_0, 0xFFFFFFFF);
+
+   bpp_shift = (GFXbpp + 7) >> 4;
+
+   /* SET THE SCRATCHPAD BASE */
+
+   SET_SCRATCH_BASE(GFXbb0Base);
+
+   while (width > 0) {
+      if (width > buffer_width)
+	 section = buffer_width;
+      else
+	 section = width;
+
+      dword_bytes_needed = (section << bpp_shift) & ~3l;
+      bytes_extra = (section << bpp_shift) & 3l;
+
+      temp_height = height;
+
+      /* WRITE THE REGISTERS FOR EACH SECTION                          */
+      /* The GX hardware will auto-increment the Y coordinate, meaning */
+      /* that we don't have to.                                        */
+
+      WRITE_REG16(GP_WIDTH, section);
+      WRITE_REG16(GP_DST_XCOOR, dstx);
+      WRITE_REG16(GP_DST_YCOOR, dsty);
+
+      /* CALCULATE THE BITMAP OFFSET */
+
+      array_offset =
+	    (unsigned long)srcy *(long)pitch + ((long)srcx << bpp_shift);
+
+      while (temp_height--) {
+	 GFX_WAIT_PIPELINE;
+
+	 /* WRITE ALL DATA TO THE BLT BUFFERS */
+	 /* The WRITE_SCRATCH_STRING macro assumes that the data begins at the */
+	 /* scratchpad offset set by the SET_SCRATCH_BASE macro.               */
+
+	 WRITE_SCRATCH_STRING(dword_bytes_needed, bytes_extra, data,
+			      array_offset);
+	 WRITE_REG16(GP_BLIT_MODE, BM_READ_SRC_BB0);
+
+	 array_offset += pitch;
+      }
+
+      width -= section;
+      srcx += section;
+      dstx += section;
+   }
+}
+
+/*
+//----------------------------------------------------------------------------
+// MONOCHROME BITMAP TO SCREEN BLT
+//
+// This routine transfers monochrome bitmap data to the screen.  
+//
+//      SRCX            X offset within source bitmap
+//      SRCY            Y offset within source bitmap
+//      DSTX            screen X position to render data
+//      DSTY            screen Y position to render data
+//      WIDTH           width of rectangle, in pixels
+//      HEIGHT          height of rectangle, in scanlines
+//      *DATA           pointer to bitmap data
+//      PITCH           pitch of bitmap data (bytes between scanlines)
+//----------------------------------------------------------------------------
+*/
+#if GFX_2DACCEL_DYNAMIC
+void
+gu1_mono_bitmap_to_screen_blt(unsigned short srcx, unsigned short srcy,
+			      unsigned short dstx, unsigned short dsty,
+			      unsigned short width, unsigned short height,
+			      unsigned char *data, short pitch)
+#else
+void
+gfx_mono_bitmap_to_screen_blt(unsigned short srcx, unsigned short srcy,
+			      unsigned short dstx, unsigned short dsty,
+			      unsigned short width, unsigned short height,
+			      unsigned char *data, short pitch)
+#endif
+{
+   unsigned short section, buffer_width;
+   unsigned short blit_mode = BM_READ_SRC_BB0 | BM_SOURCE_EXPAND;
+   unsigned short temp_height;
+   unsigned long dword_bytes_needed, bytes_extra;
+   long array_offset;
+
+   /* CHECK IF RASTER OPERATION REQUIRES DESTINATION DATA        */
+   /* If no destination data, the source data will always fit.   */
+   /* So, in that event we will set the buffer width to a        */
+   /* fictitiously large value such that the BLT is never split. */
+
+   if (GFXusesDstData) {
+      buffer_width = GFXbufferWidthPixels;
+      blit_mode |= BM_READ_DST_FB1;
+   } else
+      buffer_width = 3200;
+
+   /* CHECK IF DATA ALREADY IN BLIT BUFFER */
+   /* If the pointer is NULL, data for the full BLT is already there */
+   /* WARNING: This could cause problems if destination data is */
+   /* involved and it overflows the BLT buffer.  Need to remove */
+   /* this option and change the drivers to use a temporary buffer. */
+
+   if (!data) {
+      GFX_WAIT_PENDING;
+      WRITE_REG16(GP_SRC_XCOOR, srcx & 7);
+      WRITE_REG16(GP_DST_XCOOR, dstx);
+      WRITE_REG16(GP_DST_YCOOR, dsty);
+      WRITE_REG16(GP_WIDTH, width);
+      WRITE_REG16(GP_HEIGHT, height);
+      WRITE_REG16(GP_BLIT_MODE, blit_mode);
+      return;
+   }
+
+   /* SET THE SCRATCHPAD BASE */
+
+   SET_SCRATCH_BASE(GFXbb0Base);
+
+   /* POLL UNTIL ABLE TO WRITE TO THE REGISTERS */
+   /* Write the registers that do not change for each section. */
+
+   GFX_WAIT_PENDING;
+   WRITE_REG16(GP_HEIGHT, 1);
+
+   while (width > 0) {
+      if (width > buffer_width)
+	 section = buffer_width;
+      else
+	 section = width;
+
+      /* CALCULATE BYTES NEEDED */
+      /* Add 1 for possible alignment issues. */
+
+      dword_bytes_needed = ((section + 7 + (srcx & 7)) >> 3) & ~3l;
+      bytes_extra = ((section + 7 + (srcx & 7)) >> 3) & 3l;
+
+      temp_height = height;
+
+      /* WRITE THE REGISTERS FOR EACH SECTION                          */
+      /* The GX hardware will auto-increment the Y coordinate, meaning */
+      /* that we don't have to.                                        */
+
+      WRITE_REG16(GP_WIDTH, section);
+      WRITE_REG16(GP_DST_XCOOR, dstx);
+      WRITE_REG16(GP_DST_YCOOR, dsty);
+      WRITE_REG16(GP_SRC_XCOOR, srcx & 7);
+
+      /* CALCULATE THE BITMAP OFFSET */
+
+      array_offset = (unsigned long)srcy *(long)pitch + ((long)srcx >> 3);
+
+      while (temp_height--) {
+	 GFX_WAIT_PIPELINE;
+
+	 /* WRITE ALL DATA TO THE BLT BUFFERS */
+	 /* The WRITE_SCRATCH_STRING macro assumes that the data begins at the */
+	 /* scratchpad offset set by the SET_SCRATCH_BASE macro.               */
+
+	 WRITE_SCRATCH_STRING(dword_bytes_needed, bytes_extra, data,
+			      array_offset);
+	 WRITE_REG16(GP_BLIT_MODE, blit_mode);
+
+	 array_offset += pitch;
+      }
+
+      width -= section;
+      srcx += section;
+      dstx += section;
+   }
+}
+
+/*
+//----------------------------------------------------------------------------
+// MONOCHROME TEXT BLT
+//
+// This routine transfers contiguous monochrome text data to the screen.  
+//
+//      DSTX            screen X position to render data
+//      DSTY            screen Y position to render data
+//      WIDTH           width of rectangle, in pixels
+//      HEIGHT          height of rectangle, in scanlines
+//      *DATA           pointer to bitmap data
+//----------------------------------------------------------------------------
+*/
+#if GFX_2DACCEL_DYNAMIC
+void
+gu1_text_blt(unsigned short dstx, unsigned short dsty, unsigned short width,
+	     unsigned short height, unsigned char *data)
+#else
+void
+gfx_text_blt(unsigned short dstx, unsigned short dsty, unsigned short width,
+	     unsigned short height, unsigned char *data)
+#endif
+{
+   unsigned long dword_bytes_needed, bytes_extra;
+   long pitch, buffer_bytes, data_bytes;
+
+   /* CALCULATE DATA SIZE */
+
+   pitch = (width + 7) >> 3;
+   data_bytes = (long)height *pitch;
+
+   /* CHECK FOR SIMPLE CASE */
+   /* This routine is designed to render a source copy text glyph.  If destination */
+   /* data is required or the source data will not fit, we will punt the operation */
+   /* to the more versatile (and slow) mono bitmap routine.                        */
+
+   if (GFXbpp > 8)
+      buffer_bytes = GFXbufferWidthPixels << 1;
+   else
+      buffer_bytes = GFXbufferWidthPixels;
+
+   if (GFXusesDstData || data_bytes > buffer_bytes) {
+      gfx_mono_bitmap_to_screen_blt(0, 0, dstx, dsty, width, height, data,
+				    (short)pitch);
+      return;
+   }
+
+   /* SET THE SCRATCHPAD BASE */
+
+   SET_SCRATCH_BASE(GFXbb0Base);
+
+   /* POLL UNTIL ABLE TO WRITE TO THE REGISTERS */
+
+   dword_bytes_needed = data_bytes & ~3l;
+   bytes_extra = data_bytes & 3l;
+
+   GFX_WAIT_PENDING;
+   WRITE_REG16(GP_HEIGHT, height);
+   WRITE_REG16(GP_WIDTH, width);
+   WRITE_REG16(GP_DST_XCOOR, dstx);
+   WRITE_REG16(GP_DST_YCOOR, dsty);
+   WRITE_REG16(GP_SRC_XCOOR, 0);
+
+   /* WRITE ALL DATA TO THE BLT BUFFERS */
+   /* The WRITE_SCRATCH_STRING macro assumes that the data begins at the */
+   /* scratchpad offset set by the SET_SCRATCH_BASE macro.               */
+
+   GFX_WAIT_PIPELINE;
+
+   WRITE_SCRATCH_STRING(dword_bytes_needed, bytes_extra, data, 0);
+   WRITE_REG16(GP_BLIT_MODE, BM_READ_SRC_BB0 | BM_SOURCE_TEXT);
+}
+
+/*
+//----------------------------------------------------------------------------
+// BRESENHAM LINE
+//
+// This routine draws a vector using the specified Bresenham parameters.  
+// Currently this file does not support a routine that accepts the two 
+// endpoints of a vector and calculates the Bresenham parameters.  If it 
+// ever does, this routine is still required for vectors that have been 
+// clipped.
+//
+//      X               screen X position to start vector
+//      Y               screen Y position to start vector
+//      LENGTH          length of the vector, in pixels
+//      INITERR         Bresenham initial error term
+//      AXIALERR        Bresenham axial error term
+//      DIAGERR         Bresenham diagonal error term
+//      FLAGS           VM_YMAJOR, VM_MAJOR_INC, VM_MINOR_INC
+//----------------------------------------------------------------------------
+*/
+#if GFX_2DACCEL_DYNAMIC
+void
+gu1_bresenham_line(unsigned short x, unsigned short y,
+		   unsigned short length, unsigned short initerr,
+		   unsigned short axialerr, unsigned short diagerr,
+		   unsigned short flags)
+#else
+void
+gfx_bresenham_line(unsigned short x, unsigned short y,
+		   unsigned short length, unsigned short initerr,
+		   unsigned short axialerr, unsigned short diagerr,
+		   unsigned short flags)
+#endif
+{
+   unsigned short vector_mode = flags;
+
+   if (GFXusesDstData)
+      vector_mode |= VM_READ_DST_FB;
+
+   /* CHECK NULL LENGTH */
+
+   if (!length)
+      return;
+
+   /* LOAD THE REGISTERS FOR THE VECTOR */
+
+   GFX_WAIT_PENDING;
+   WRITE_REG16(GP_DST_XCOOR, x);
+   WRITE_REG16(GP_DST_YCOOR, y);
+   WRITE_REG16(GP_VECTOR_LENGTH, length);
+   WRITE_REG16(GP_INIT_ERROR, initerr);
+   WRITE_REG16(GP_AXIAL_ERROR, axialerr);
+   WRITE_REG16(GP_DIAG_ERROR, diagerr);
+   WRITE_REG16(GP_VECTOR_MODE, vector_mode);
+}
+
+/*---------------------------------------------------------------------------
+ * GFX_WAIT_UNTIL_IDLE
+ *
+ * This routine waits until the graphics engine is idle.  This is required
+ * before allowing direct access to the frame buffer.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_2DACCEL_DYNAMIC
+void
+gu1_wait_until_idle(void)
+#else
+void
+gfx_wait_until_idle(void)
+#endif
+{
+   GFX_WAIT_BUSY;
+}
+
+/*---------------------------------------------------------------------------
+ * GFX_TEST_BLT_PENDING
+ *
+ * This routine returns 1 if a BLT is pending, meaning that a call to 
+ * perform a rendering operation would stall.  Otherwise it returns 0.
+ * It is used by Darwin during random testing to only start a BLT 
+ * operation when it knows the Durango routines won't spin on graphics
+ * (so Darwin can continue to do frame buffer reads and writes).
+ *---------------------------------------------------------------------------
+ */
+#if GFX_2DACCEL_DYNAMIC
+int
+gu1_test_blt_pending(void)
+#else
+int
+gfx_test_blt_pending(void)
+#endif
+{
+   if (READ_REG16(GP_BLIT_STATUS) & BS_BLIT_PENDING)
+      return (1);
+   else
+      return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * BLT BUFFERS!!!!!
+ *---------------------------------------------------------------------------
+ */
+
+/* THE BOOT CODE MUST SET THE BLT BUFFER BASES USING THE "CPU_WRITE" */
+/* INSTRUCTION TO ONE OF THE FOLLOWING VALUES: */
+
+#define BB0_BASE_2K		0x800
+#define BB1_BASE_2K		0xB30
+#define BB0_BASE_3K		0x400
+#define BB1_BASE_3K		0x930
+
+/*---------------------------------------------------------------------------
+ * gu1_detect_blt_buffer_base
+ * 
+ * This detection is hidden from the driver by being called from the 
+ * "gfx_set_bpp" routine.  
+ *
+ * This is fairly ugly for the following reasons:
+ *
+ * - It is the boot code that must set the BLT buffer bases to the 
+ *   appropriate values and load the scratchpad tags.  
+ * - The old drivers would also set the base address values to what they
+ *   knew they should be for the 2K or 3K scratchpad configuration.
+ * - Unfortunately, to set the base addresses requires the use of the 
+ *   CPU_WRITE instruction, an instruction specific to GX.
+ * - Using the CPU_WRITE instruction requires the use of assembly to 
+ *   produce the appropriate op codes.
+ * - Assembly is something that is avoided in Durango because it is not
+ *   platform independent.  Some compilers do not support inline assembly.
+ * - Therefore Durango cannot use the CPU_WRITE instruction.
+ * - Therefore drivers using Durango must rely on the boot code to set
+ *   the appropriate values.  Durango uses this routine to check where
+ *   the base addresses have been set.
+ * - Unfortunately, it is not as simple as using IO to check for 2K or 3K 
+ *   scratchpad size.  In VSA1, even though the boot code may set it for
+ *   3K, SoftVGA comes along and resets it to 2K for it's use in text
+ *   redraws.  It used to be that the display driver would set it back
+ *   to 3K.  
+ * - So, the Durango code was changed to just always use 2K.
+ * - But, the XpressROM code sets it for 3K, and the newer versions of 
+ *   SoftVGA do not interfere with that, so then Durango needs to use
+ *   the 3K values to work properly.
+ * - Therefore, Durango does somewhat of a kludge by writing to directly
+ *   to the scratchpad at both the 2K and 3K locations, then performing
+ *   a unobtrusive BLT that loads data into BB0 (the graphics engine 
+ *   always knows the true base).  After the BLT, Durango looks to see
+ *   which location changed to know where the base address is.
+ * - This is a relatively simple way to allow Durango to work on old
+ *   and new platforms without using theCPU_WRITE instructions.
+ *
+ * To summarize, the BLT buffers are one of the most painful aspects of 
+ * the GX graphics unit design, and have been removed from future designs
+ * (the graphics unit has its own dedicated RAM).  Durango has tried to 
+ * hide the BLT buffer use from the drivers.
+ *---------------------------------------------------------------------------
+ */
+void
+gu1_detect_blt_buffer_base(void)
+{
+   /* ASSUME 2K */
+
+   GFXbb0Base = BB0_BASE_2K;
+   GFXbb1Base = BB1_BASE_2K;
+
+   /* CHECK IF SCRATCHPAD IS SET TO 3K OR 4K */
+   /* Boot code should still set 3K values for 4K. */
+
+   if (gfx_gxm_config_read(GXM_CONFIG_GCR) & 0x08) {
+      /* WRITE DATA TO 3K LOCATION */
+
+      GFX_WAIT_BUSY;
+      WRITE_SCRATCH32(BB0_BASE_3K, 0xFEEDFACE);
+
+      /* HAVE THE GRAPHICS UNIT STORE SOMETHING IN BB0 */
+
+      WRITE_REG32(GP_DST_XCOOR, 0x00000000);	/* AT (0,0) */
+      WRITE_REG32(GP_WIDTH, 0x00010004);	/* 4x1 BLT */
+      WRITE_REG16(GP_RASTER_MODE, 0x00AA);	/* KEEP DST */
+      WRITE_REG16(GP_BLIT_MODE, BM_READ_DST_FB0);	/* STORE IN BB0 */
+
+      /* CHECK 3K LOCATION */
+      /* Breaks if data happened to be 0xFEEDFACE - unlikely. */
+
+      GFX_WAIT_BUSY;
+      if (READ_SCRATCH32(BB0_BASE_3K) != 0xFEEDFACE) {
+	 GFXbb0Base = BB0_BASE_3K;
+	 GFXbb1Base = BB1_BASE_3K;
+      }
+   }
+}
+
+/* END OF FILE */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/rndr_gu2.c b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/rndr_gu2.c
new file mode 100644
index 000000000..93783281f
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/rndr_gu2.c
@@ -0,0 +1,2365 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/rndr_gu2.c,v 1.1 2002/12/10 15:12:27 alanh Exp $ */
+/*
+ * $Workfile: rndr_gu2.c $
+ *
+ * This file contains routines to program the 2D acceleration hardware for
+ * the second generation graphics unit.
+ * 
+ * Basic rendering routines (common to all Geode processors):
+ *    gfx_set_bpp           
+ *    gfx_set_solid_pattern  
+ *    gfx_set_mono_pattern
+ *    gfx_set_color_pattern
+ *    gfx_set_solid_source  
+ *    gfx_set_mono_source
+ *    gfx_set_raster_operation
+ *    gfx_pattern_fill
+ *    gfx_color_pattern_fill
+ *    gfx_screen_to_screen_blt
+ *    gfx_screen_to_screen_xblt
+ *    gfx_color_bitmap_to_screen_blt
+ *    gfx_color_bitmap_to_screen_xblt
+ *    gfx_mono_bitmap_to_screen_blt
+ *    gfx_bresenham_line 
+ *    gfx_wait_until_idle   
+ *
+ * Extended rendering routines for second generation functionality:
+ *    gfx2_set_source_stride
+ *    gfx2_set_destination_stride
+ *    gfx2_set_pattern_origins
+ *    gfx2_set_source_transparency
+ *    gfx2_set_alpha_mode
+ *    gfx2_set_alpha_value
+ *    gfx2_pattern_fill
+ *    gfx2_color_pattern_fill
+ *    gfx2_screen_to_screen_blt
+ *    gfx2_mono_expand_blt
+ *    gfx2_color_bitmap_to_screen_blt
+ *    gfx2_mono_bitmap_to_screen_blt
+ *    gfx2_bresenham_line
+ *    gfx2_sync_to_vblank
+ *
+ * NSC_LIC_ALTERNATIVE_PREAMBLE
+ *
+ * Revision 1.0
+ *
+ * National Semiconductor Alternative GPL-BSD License
+ *
+ * National Semiconductor Corporation licenses this software 
+ * ("Software"):
+ *
+ *      Durango
+ *
+ * under one of the two following licenses, depending on how the 
+ * Software is received by the Licensee.
+ * 
+ * If this Software is received as part of the Linux Framebuffer or
+ * other GPL licensed software, then the GPL license designated 
+ * NSC_LIC_GPL applies to this Software; in all other circumstances 
+ * then the BSD-style license designated NSC_LIC_BSD shall apply.
+ *
+ * END_NSC_LIC_ALTERNATIVE_PREAMBLE */
+
+/* NSC_LIC_BSD
+ *
+ * National Semiconductor Corporation Open Source License for Durango
+ *
+ * (BSD License with Export Notice)
+ *
+ * Copyright (c) 1999-2001
+ * National Semiconductor Corporation.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met: 
+ *
+ *   * Redistributions of source code must retain the above copyright 
+ *     notice, this list of conditions and the following disclaimer. 
+ *
+ *   * Redistributions in binary form must reproduce the above 
+ *     copyright notice, this list of conditions and the following 
+ *     disclaimer in the documentation and/or other materials provided 
+ *     with the distribution. 
+ *
+ *   * Neither the name of the National Semiconductor Corporation nor 
+ *     the names of its contributors may be used to endorse or promote 
+ *     products derived from this software without specific prior 
+ *     written permission. 
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+ * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE,
+ * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE.
+ *
+ * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
+ * YOUR JURISDICTION. It is licensee's responsibility to comply with 
+ * any export regulations applicable in licensee's jurisdiction. Under 
+ * CURRENT (2001) U.S. export regulations this software 
+ * is eligible for export from the U.S. and can be downloaded by or 
+ * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
+ * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
+ * Syria, Sudan, Afghanistan and any other country to which the U.S. 
+ * has embargoed goods and services. 
+ *
+ * END_NSC_LIC_BSD */
+
+/* NSC_LIC_GPL
+ *
+ * National Semiconductor Corporation Gnu General Public License for Durango
+ *
+ * (GPL License with Export Notice)
+ *
+ * Copyright (c) 1999-2001
+ * National Semiconductor Corporation.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted under the terms of the GNU General 
+ * Public License as published by the Free Software Foundation; either 
+ * version 2 of the License, or (at your option) any later version  
+ *
+ * In addition to the terms of the GNU General Public License, neither 
+ * the name of the National Semiconductor Corporation nor the names of 
+ * its contributors may be used to endorse or promote products derived 
+ * from this software without specific prior written permission. 
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+ * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, 
+ * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE. See the GNU General Public License for more details. 
+ *
+ * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
+ * YOUR JURISDICTION. It is licensee's responsibility to comply with 
+ * any export regulations applicable in licensee's jurisdiction. Under 
+ * CURRENT (2001) U.S. export regulations this software 
+ * is eligible for export from the U.S. and can be downloaded by or 
+ * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
+ * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
+ * Syria, Sudan, Afghanistan and any other country to which the U.S. 
+ * has embargoed goods and services. 
+ *
+ * You should have received a copy of the GNU General Public License 
+ * along with this file; if not, write to the Free Software Foundation, 
+ * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 
+ *
+ * END_NSC_LIC_GPL */
+
+void gu2_set_bpp(unsigned short bpp);
+void gu2_set_solid_pattern(unsigned long color);
+void gu2_set_mono_pattern(unsigned long bgcolor, unsigned long fgcolor,
+			  unsigned long data0, unsigned long data1,
+			  unsigned char transparency);
+void gu2_set_color_pattern(unsigned long bgcolor, unsigned long fgcolor,
+			   unsigned long data0, unsigned long data1,
+			   unsigned long data2, unsigned long data3,
+			   unsigned char transparency);
+void gu2_load_color_pattern_line(short y, unsigned long *pattern_8x8);
+void gu2_set_solid_source(unsigned long color);
+void gu2_set_mono_source(unsigned long bgcolor, unsigned long fgcolor,
+			 unsigned short transparent);
+void gu2_set_pattern_flags(unsigned short flags);
+void gu2_set_raster_operation(unsigned char rop);
+void gu2_pattern_fill(unsigned short x, unsigned short y,
+		      unsigned short width, unsigned short height);
+void gu2_color_pattern_fill(unsigned short x, unsigned short y,
+			    unsigned short width, unsigned short height,
+			    unsigned long *pattern);
+void gu2_screen_to_screen_blt(unsigned short srcx, unsigned short srcy,
+			      unsigned short dstx, unsigned short dsty,
+			      unsigned short width, unsigned short height);
+void gu2_screen_to_screen_xblt(unsigned short srcx, unsigned short srcy,
+			       unsigned short dstx, unsigned short dsty,
+			       unsigned short width, unsigned short height,
+			       unsigned long color);
+void gu2_color_bitmap_to_screen_blt(unsigned short srcx, unsigned short srcy,
+				    unsigned short dstx, unsigned short dsty,
+				    unsigned short width,
+				    unsigned short height,
+				    unsigned char *data, long pitch);
+void gu2_color_bitmap_to_screen_xblt(unsigned short srcx, unsigned short srcy,
+				     unsigned short dstx, unsigned short dsty,
+				     unsigned short width,
+				     unsigned short height,
+				     unsigned char *data, long pitch,
+				     unsigned long color);
+void gu2_mono_bitmap_to_screen_blt(unsigned short srcx, unsigned short srcy,
+				   unsigned short dstx, unsigned short dsty,
+				   unsigned short width,
+				   unsigned short height, unsigned char *data,
+				   short pitch);
+void gu2_text_blt(unsigned short dstx, unsigned short dsty,
+		  unsigned short width, unsigned short height,
+		  unsigned char *data);
+void gu2_bresenham_line(unsigned short x, unsigned short y,
+			unsigned short length, unsigned short initerr,
+			unsigned short axialerr, unsigned short diagerr,
+			unsigned short flags);
+void gu2_wait_until_idle(void);
+int gu2_test_blt_pending(void);
+
+/* SECOND GENERATION RENDERING ROUTINES */
+
+void gu22_set_source_stride(unsigned short stride);
+void gu22_set_destination_stride(unsigned short stride);
+void gu22_set_pattern_origin(int x, int y);
+void gu22_set_source_transparency(unsigned long color, unsigned long mask);
+void gu22_set_alpha_mode(int mode);
+void gu22_set_alpha_value(unsigned char value);
+void gu22_pattern_fill(unsigned long dstoffset, unsigned short width,
+		       unsigned short height);
+void gu22_color_pattern_fill(unsigned long dstoffset, unsigned short width,
+			     unsigned short height, unsigned long *pattern);
+void gu22_screen_to_screen_blt(unsigned long srcoffset,
+			       unsigned long dstoffset, unsigned short width,
+			       unsigned short height, int flags);
+void gu22_mono_expand_blt(unsigned long srcbase, unsigned short srcx,
+			  unsigned short srcy, unsigned long dstoffset,
+			  unsigned short width, unsigned short height,
+			  int byte_packed);
+void gu22_color_bitmap_to_screen_blt(unsigned short srcx, unsigned short srcy,
+				     unsigned long dstoffset,
+				     unsigned short width,
+				     unsigned short height,
+				     unsigned char *data, short pitch);
+void gu22_mono_bitmap_to_screen_blt(unsigned short srcx, unsigned short srcy,
+				    unsigned long dstoffset,
+				    unsigned short width,
+				    unsigned short height,
+				    unsigned char *data, short pitch);
+void gu22_text_blt(unsigned long dstoffset, unsigned short width,
+		   unsigned short height, unsigned char *data);
+void gu22_bresenham_line(unsigned long dstoffset, unsigned short length,
+			 unsigned short initerr, unsigned short axialerr,
+			 unsigned short diagerr, unsigned short flags);
+void gu22_sync_to_vblank(void);
+void gu2_reset_pitch(unsigned short pitch);
+
+#define GU2_WAIT_PENDING while(READ_GP32(MGP_BLT_STATUS) & MGP_BS_BLT_PENDING)
+#define GU2_WAIT_BUSY while(READ_GP32(MGP_BLT_STATUS) & MGP_BS_BLT_BUSY)
+#define GU2_WAIT_HALF_EMPTY while(!(READ_GP32(MGP_BLT_STATUS) & MGP_BS_HALF_EMPTY))
+
+/* PATTERN SWIZZLES */
+
+#define WORD_SWIZZLE(x) (((x) << 16) | ((x) >> 16))
+#define BYTE_SWIZZLE(x) (((x) << 24) | ((x) >> 24) | (((x) << 8) & 0x00FF0000) | (((x) >> 8) & 0x0000FF00))
+
+/* GLOBAL VARIABLES USED BY THE RENDERING ROUTINES */
+
+unsigned long gu2_bpp;
+unsigned long gu2_pitch = 1280;
+unsigned long gu2_src_pitch = 1280;
+unsigned long gu2_dst_pitch = 1280;
+unsigned long gu2_xshift = 1;
+unsigned long gu2_pattern_origin = 0;
+unsigned long gu2_rop32;
+unsigned long gu2_alpha32 = 0;
+unsigned long gu2_alpha_value = 0;
+unsigned long gu2_alpha_mode = 0;
+unsigned long gu2_alpha_active = 0;
+unsigned short gu2_alpha_blt_mode = 0;
+unsigned short gu2_alpha_vec_mode = 0;
+unsigned short gu2_blt_mode = 0;
+unsigned short gu2_vector_mode = 0;
+unsigned short gu2_bm_throttle = 0;
+unsigned short gu2_vm_throttle = 0;
+int gu2_current_line = 0;
+
+/*---------------------------------------------------------------------------
+ * GFX_RESET_PITCH (PRIVATE ROUTINE - NOT PART OF API)
+ *
+ * This routine resets all pitches in the graphics engine to one value.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_2DACCEL_DYNAMIC
+void
+gu2_reset_pitch(unsigned short pitch)
+#else
+void
+gfx_reset_pitch(unsigned short pitch)
+#endif
+{
+   gu2_pitch = pitch;
+   gu2_dst_pitch = pitch;
+   gu2_src_pitch = pitch;
+}
+
+/*---------------------------------------------------------------------------
+ * GFX_SET_BPP
+ *
+ * This routine sets the bits per pixel value in the graphics engine.
+ * It is also stored in the static variable "gu2_bpp" to use in the future 
+ * calls to the rendering routines.  That variable contains the hardware 
+ * specific value to load into the MGP_RASTER_MODE register.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_2DACCEL_DYNAMIC
+void
+gu2_set_bpp(unsigned short bpp)
+#else
+void
+gfx_set_bpp(unsigned short bpp)
+#endif
+{
+   GFXbpp = bpp;
+
+   /* COVERT TO BPP/FORMAT VALUE */
+   /* Save in global to combine with ROP later. */
+   /* Could write register here and then use byte access for */
+   /* the ROP, but would need to set other 24 bits to make */
+   /* sure all are set to their appropriate values. */
+
+   switch (bpp) {
+   case 8:
+      gu2_bpp = MGP_RM_BPPFMT_332;
+      gu2_xshift = 0;
+      break;
+   case 12:
+      gu2_bpp = MGP_RM_BPPFMT_4444;
+      gu2_xshift = 1;
+      break;
+   case 15:
+      gu2_bpp = MGP_RM_BPPFMT_1555;
+      gu2_xshift = 1;
+      break;
+   case 16:
+      gu2_bpp = MGP_RM_BPPFMT_565;
+      gu2_xshift = 1;
+      break;
+   case 32:
+      gu2_bpp = MGP_RM_BPPFMT_8888;
+      gu2_xshift = 2;
+      break;
+   }
+
+   /* SET INITIAL ROP BASED ONLY ON BPP */
+   /* Needs to be set before loading any pattern or source colors. */
+   /* We must wait for BUSY because these bits are not pipelined   */
+   /* in the hardware.                                             */
+
+   GU2_WAIT_BUSY;
+   WRITE_GP32(MGP_RASTER_MODE, gu2_bpp);
+}
+
+/*
+//---------------------------------------------------------------------------
+// GFX_SET_SOLID_SOURCE
+//
+// This routine is used to specify a solid source color.  For the Xfree96
+// display driver, the source color is used to specify a planemask and the 
+// ROP is adjusted accordingly.
+//---------------------------------------------------------------------------
+*/
+#if GFX_2DACCEL_DYNAMIC
+void
+gu2_set_solid_source(unsigned long color)
+#else
+void
+gfx_set_solid_source(unsigned long color)
+#endif
+{
+   /* CLEAR TRANSPARENCY FLAG */
+
+   GFXsourceFlags = 0;
+
+   /* WRITE REGISTERS TO SPECIFY SOURCE COLOR */
+
+   GU2_WAIT_PENDING;
+   WRITE_GP32(MGP_SRC_COLOR_FG, color);
+}
+
+/*
+//---------------------------------------------------------------------------
+// GFX_SET_MONO_SOURCE
+//
+// This routine is used to specify the monochrome source colors.  
+// It must be called *after* loading any pattern data (those routines 
+// clear the source flags).
+//---------------------------------------------------------------------------
+*/
+#if GFX_2DACCEL_DYNAMIC
+void
+gu2_set_mono_source(unsigned long bgcolor, unsigned long fgcolor,
+		    unsigned short transparent)
+#else
+void
+gfx_set_mono_source(unsigned long bgcolor, unsigned long fgcolor,
+		    unsigned short transparent)
+#endif
+{
+   /* SET TRANSPARENCY FLAG */
+
+   GFXsourceFlags = transparent ? MGP_RM_SRC_TRANS : 0;
+
+   /* WRITE COLOR VALUES */
+
+   GU2_WAIT_PENDING;
+   WRITE_GP32(MGP_SRC_COLOR_FG, fgcolor);
+   WRITE_GP32(MGP_SRC_COLOR_BG, bgcolor);
+}
+
+/*
+//---------------------------------------------------------------------------
+// GFX_SET_SOLID_PATTERN
+//
+// This routine is used to specify a solid pattern color.  It is called 
+// before performing solid rectangle fills or more complicated BLTs that 
+// use a solid pattern color. 
+//
+// The driver should always call "gfx_load_raster_operation" after a call 
+// to this routine to make sure that the pattern flags are set appropriately.
+//---------------------------------------------------------------------------
+*/
+#if GFX_2DACCEL_DYNAMIC
+void
+gu2_set_solid_pattern(unsigned long color)
+#else
+void
+gfx_set_solid_pattern(unsigned long color)
+#endif
+{
+   /* CLEAR TRANSPARENCY FLAG */
+
+   GFXsourceFlags = 0;
+
+   /* SET PATTERN FLAGS */
+
+   GFXpatternFlags = 0;
+
+   /* POLL UNTIL ABLE TO WRITE THE PATTERN COLOR */
+
+   GU2_WAIT_PENDING;
+   WRITE_GP32(MGP_RASTER_MODE, gu2_bpp);
+   WRITE_GP32(MGP_PAT_COLOR_0, color);
+}
+
+/*
+//---------------------------------------------------------------------------
+// GFX_SET_MONO_PATTERN
+//
+// This routine is used to specify a monochrome pattern. 
+//---------------------------------------------------------------------------
+*/
+#if GFX_2DACCEL_DYNAMIC
+void
+gu2_set_mono_pattern(unsigned long bgcolor, unsigned long fgcolor,
+		     unsigned long data0, unsigned long data1,
+		     unsigned char transparent)
+#else
+void
+gfx_set_mono_pattern(unsigned long bgcolor, unsigned long fgcolor,
+		     unsigned long data0, unsigned long data1,
+		     unsigned char transparent)
+#endif
+{
+   /* CLEAR TRANSPARENCY FLAG */
+
+   GFXsourceFlags = 0;
+
+   /* SET PATTERN FLAGS */
+
+   if (transparent)
+      GFXpatternFlags = MGP_RM_PAT_MONO | MGP_RM_PAT_TRANS;
+   else
+      GFXpatternFlags = MGP_RM_PAT_MONO;
+
+   /* POLL UNTIL ABLE TO WRITE THE PATTERN COLOR */
+
+   GU2_WAIT_PENDING;
+   WRITE_GP32(MGP_RASTER_MODE, gu2_bpp | GFXpatternFlags);
+   WRITE_GP32(MGP_PAT_COLOR_0, bgcolor);
+   WRITE_GP32(MGP_PAT_COLOR_1, fgcolor);
+   WRITE_GP32(MGP_PAT_DATA_0, data0);
+   WRITE_GP32(MGP_PAT_DATA_1, data1);
+}
+
+/*
+//---------------------------------------------------------------------------
+// GFX_SET_COLOR_PATTERN
+//
+// This routine is used to specify a color pattern. 
+//---------------------------------------------------------------------------
+*/
+#if GFX_2DACCEL_DYNAMIC
+void
+gu2_set_color_pattern(unsigned long bgcolor, unsigned long fgcolor,
+		      unsigned long data0, unsigned long data1,
+		      unsigned long data2, unsigned long data3,
+		      unsigned char transparent)
+#else
+void
+gfx_set_color_pattern(unsigned long bgcolor, unsigned long fgcolor,
+		      unsigned long data0, unsigned long data1,
+		      unsigned long data2, unsigned long data3,
+		      unsigned char transparent)
+#endif
+{
+   /* REMOVE */
+}
+
+/*
+//---------------------------------------------------------------------------
+// GFX_LOAD_COLOR_PATTERN_LINE
+//
+// This routine is used to load a single line of a 8x8 color pattern.   
+//---------------------------------------------------------------------------
+*/
+#if GFX_2DACCEL_DYNAMIC
+void
+gu2_load_color_pattern_line(short y, unsigned long *pattern_8x8)
+#else
+void
+gfx_load_color_pattern_line(short y, unsigned long *pattern_8x8)
+#endif
+{
+   unsigned long temp1, temp2, temp3, temp4;
+
+   /* CLEAR TRANSPARENCY FLAG */
+
+   GFXsourceFlags = 0;
+
+   /* SET PATTERN FLAGS */
+
+   GFXpatternFlags = MGP_RM_PAT_COLOR;
+
+   /* OVERRIDE THE RASTER MODE REGISTER */
+   /* If the pattern format is set to anything but color  */
+   /* before loading the registers, some of the data will */
+   /* be duplicated according to the current mode.        */
+
+   GU2_WAIT_PENDING;
+   WRITE_GP32(MGP_RASTER_MODE,
+	      (gu2_rop32 & ~MGP_RM_PAT_FLAGS) | MGP_RM_PAT_COLOR);
+
+   /* LOAD THE PATTERN DATA */
+   /* This routine is designed to work in tandem with gfx_pattern_fill.  */
+   /* It is used for cases when multiple BLTs with color pattern data    */
+   /* are desired on the same line.  It would be inefficient to          */
+   /* repeatedly call gfx_color_pattern_fill for each single-line BLT.   */
+   /* So, we will simply replicate the pattern data across all available */
+   /* lines such that the pattern y origin plays no part in the BLT.     */
+
+   /* 8 BPP */
+
+   if (gu2_xshift == 0) {
+      pattern_8x8 += (y & 7) << 1;
+      temp1 = BYTE_SWIZZLE(pattern_8x8[0]);
+      temp2 = BYTE_SWIZZLE(pattern_8x8[1]);
+      WRITE_GP32(MGP_PAT_DATA_1, temp1);
+      WRITE_GP32(MGP_PAT_DATA_0, temp2);
+      WRITE_GP32(MGP_PAT_COLOR_1, temp1);
+      WRITE_GP32(MGP_PAT_COLOR_0, temp2);
+
+      GU2_WAIT_BUSY;
+      WRITE_GP32(MGP_PAT_COLOR_3, temp1);
+      WRITE_GP32(MGP_PAT_COLOR_2, temp2);
+      WRITE_GP32(MGP_PAT_COLOR_5, temp1);
+      WRITE_GP32(MGP_PAT_COLOR_4, temp2);
+   } else if (gu2_xshift == 1) {
+      pattern_8x8 += (y & 7) << 2;
+      temp1 = WORD_SWIZZLE(pattern_8x8[0]);
+      temp2 = WORD_SWIZZLE(pattern_8x8[1]);
+      temp3 = WORD_SWIZZLE(pattern_8x8[2]);
+      temp4 = WORD_SWIZZLE(pattern_8x8[3]);
+
+      WRITE_GP32(MGP_PAT_COLOR_1, temp1);
+      WRITE_GP32(MGP_PAT_COLOR_0, temp2);
+      WRITE_GP32(MGP_PAT_DATA_1, temp3);
+      WRITE_GP32(MGP_PAT_DATA_0, temp4);
+
+      GU2_WAIT_BUSY;
+      WRITE_GP32(MGP_PAT_COLOR_5, temp1);
+      WRITE_GP32(MGP_PAT_COLOR_4, temp2);
+      WRITE_GP32(MGP_PAT_COLOR_3, temp3);
+      WRITE_GP32(MGP_PAT_COLOR_2, temp4);
+   } else {
+      pattern_8x8 += (y & 7) << 3;
+
+      WRITE_GP32(MGP_PAT_COLOR_1, pattern_8x8[4]);
+      WRITE_GP32(MGP_PAT_COLOR_0, pattern_8x8[5]);
+      WRITE_GP32(MGP_PAT_DATA_1, pattern_8x8[6]);
+      WRITE_GP32(MGP_PAT_DATA_0, pattern_8x8[7]);
+
+      GU2_WAIT_BUSY;
+      WRITE_GP32(MGP_PAT_COLOR_5, pattern_8x8[0]);
+      WRITE_GP32(MGP_PAT_COLOR_4, pattern_8x8[1]);
+      WRITE_GP32(MGP_PAT_COLOR_3, pattern_8x8[2]);
+      WRITE_GP32(MGP_PAT_COLOR_2, pattern_8x8[3]);
+   }
+}
+
+/*
+//---------------------------------------------------------------------------
+// GFX_SET_RASTER_OPERATION
+//
+// This routine loads the specified raster operation.  It sets the pattern
+// flags appropriately.
+//---------------------------------------------------------------------------
+*/
+#if GFX_2DACCEL_DYNAMIC
+void
+gu2_set_raster_operation(unsigned char rop)
+#else
+void
+gfx_set_raster_operation(unsigned char rop)
+#endif
+{
+   gu2_blt_mode = 0;
+
+   /* DISABLE ALPHA BLENDING */
+
+   gu2_alpha_active = 0;
+
+   /* GENERATE 32-BIT VERSION OF ROP WITH PATTERN FLAGS */
+
+   gu2_rop32 = (unsigned long)rop | GFXpatternFlags | gu2_bpp;
+
+   /* CHECK IF SOURCE FLAGS SHOULD BE MERGED */
+
+   if ((rop & 0x33) ^ ((rop >> 2) & 0x33))
+      gu2_rop32 |= GFXsourceFlags;
+   else
+      gu2_blt_mode = 0x40;
+
+   /* SET FLAG INDICATING ROP REQUIRES DESTINATION DATA */
+   /* True if even bits (0:2:4:6) do not equal the corresponding */
+   /* even bits (1:3:5:7). */
+
+   if ((rop & 0x55) ^ ((rop >> 1) & 0x55)) {
+      gu2_blt_mode |= MGP_BM_DST_REQ;
+      gu2_vector_mode = MGP_VM_DST_REQ;
+   } else {
+      gu2_vector_mode = 0;
+   }
+}
+
+/*
+//----------------------------------------------------------------------------
+// GFX_PATTERN_FILL
+//
+// This routine is used to fill a rectangular region.  The pattern must 
+// be previously loaded using one of GFX_load_*_pattern routines.  Also, the 
+// raster operation must be previously specified using the 
+// "GFX_load_raster_operation" routine.
+//
+//      X               screen X position (left)
+//      Y               screen Y position (top)
+//      WIDTH           width of rectangle, in pixels
+//      HEIGHT          height of rectangle, in scanlines
+//----------------------------------------------------------------------------
+*/
+#if GFX_2DACCEL_DYNAMIC
+void
+gu2_pattern_fill(unsigned short x, unsigned short y,
+		 unsigned short width, unsigned short height)
+#else
+void
+gfx_pattern_fill(unsigned short x, unsigned short y,
+		 unsigned short width, unsigned short height)
+#endif
+{
+   unsigned long offset = 0, size;
+
+   size = (((unsigned long)width) << 16) | height;
+
+   /* CALCULATE STARTING OFFSET */
+
+   offset = (unsigned long)y *gu2_pitch + (((unsigned long)x) << gu2_xshift);
+
+   /* CHECK IF PATTERN ORIGINS NEED TO BE SET */
+
+   if (GFXpatternFlags) {
+      /* COMBINE X AND Y PATTERN ORIGINS WITH OFFSET */
+
+      offset |= ((unsigned long)(x & 7)) << 26;
+      offset |= ((unsigned long)(y & 7)) << 29;
+   }
+
+   /* POLL UNTIL ABLE TO WRITE TO THE REGISTERS */
+   /* Put off poll for as long as possible (do most calculations first). */
+
+   GU2_WAIT_PENDING;
+   WRITE_GP32(MGP_RASTER_MODE, gu2_rop32);
+   WRITE_GP32(MGP_DST_OFFSET, offset);
+   WRITE_GP32(MGP_WID_HEIGHT, size);
+   WRITE_GP32(MGP_STRIDE, gu2_pitch);
+   WRITE_GP32(MGP_BLT_MODE, gu2_blt_mode);
+}
+
+/*
+//----------------------------------------------------------------------------
+// GFX_COLOR_PATTERN_FILL
+//
+// This routine is used to render a rectangle using the current raster 
+// operation and the specified color pattern.  It allows an 8x8 color 
+// pattern to be rendered without multiple calls to the gfx_set_color_pattern
+// and gfx_pattern_fill routines.
+//
+//      X               screen X position (left)
+//      Y               screen Y position (top)
+//      WIDTH           width of rectangle, in pixels
+//      HEIGHT          height of rectangle, in scanlines
+//      *PATTERN		pointer to 8x8 color pattern data
+//----------------------------------------------------------------------------
+*/
+#if GFX_2DACCEL_DYNAMIC
+void
+gu2_color_pattern_fill(unsigned short x, unsigned short y,
+		       unsigned short width, unsigned short height,
+		       unsigned long *pattern)
+#else
+void
+gfx_color_pattern_fill(unsigned short x, unsigned short y,
+		       unsigned short width, unsigned short height,
+		       unsigned long *pattern)
+#endif
+{
+   /* CALL GFX2 ROUTINE TO AVOID DUPLICATION OF CODE */
+
+   unsigned long offset = (unsigned long)y * gu2_pitch +
+	 (((unsigned long)x) << gu2_xshift);
+   unsigned long origin = gu2_pattern_origin;
+   unsigned long pitch = gu2_dst_pitch;
+
+   gfx2_set_pattern_origin(x, y);
+   gfx2_set_destination_stride((unsigned short)gu2_pitch);
+   gfx2_color_pattern_fill(offset, width, height, pattern);
+
+   /* RESTORE GFX2 VALUES */
+
+   gu2_pattern_origin = origin;
+   gu2_dst_pitch = pitch;
+}
+
+/*
+//----------------------------------------------------------------------------
+// SCREEN TO SCREEN BLT
+//
+// This routine should be used to perform a screen to screen BLT when the 
+// ROP does not require destination data.
+//
+//      SRCX            screen X position to copy from
+//      SRCY            screen Y position to copy from
+//      DSTX            screen X position to copy to
+//      DSTY            screen Y position to copy to
+//      WIDTH           width of rectangle, in pixels
+//      HEIGHT          height of rectangle, in scanlines
+//----------------------------------------------------------------------------
+*/
+#if GFX_2DACCEL_DYNAMIC
+void
+gu2_screen_to_screen_blt(unsigned short srcx, unsigned short srcy,
+			 unsigned short dstx, unsigned short dsty,
+			 unsigned short width, unsigned short height)
+#else
+void
+gfx_screen_to_screen_blt(unsigned short srcx, unsigned short srcy,
+			 unsigned short dstx, unsigned short dsty,
+			 unsigned short width, unsigned short height)
+#endif
+{
+   unsigned long srcoffset, dstoffset, size;
+   unsigned short blt_mode;
+
+   size = (((unsigned long)width) << 16) | height;
+
+   /* CALCULATE THE DIRECTION OF THE BLT */
+
+   blt_mode = gu2_blt_mode | MGP_BM_SRC_FB;
+   if (dstx > srcx) {
+      blt_mode |= MGP_BM_NEG_XDIR;
+      srcx += width - 1;
+      dstx += width - 1;
+   }
+   if (dsty > srcy) {
+      blt_mode |= MGP_BM_NEG_YDIR;
+      srcy += height - 1;
+      dsty += height - 1;
+   }
+
+   /* CALCULATE STARTING OFFSETS */
+
+   srcoffset = (unsigned long)srcy *gu2_pitch +
+	 (((unsigned long)srcx) << gu2_xshift);
+   dstoffset = ((unsigned long)dsty * gu2_pitch +
+		(((unsigned long)dstx) << gu2_xshift)) & 0xFFFFFF;
+
+   /* MERGE PATTERN INFORMATION */
+   /* This must be done after the x and y coordinates have been updated,  */
+   /* as the x and y pattern origins correspond to the first ROPed pixel. */
+
+   if (GFXpatternFlags) {
+      /* COMBINE X AND Y PATTERN ORIGINS WITH OFFSET */
+
+      dstoffset |= ((unsigned long)(dstx & 7)) << 26;
+      dstoffset |= ((unsigned long)(dsty & 7)) << 29;
+   }
+
+   /* TURN INTO BYTE ADDRESS IF NEGATIVE X DIRECTION */
+   /* This is a quirk of the hardware. */
+
+   if (blt_mode & MGP_BM_NEG_XDIR) {
+      srcoffset += (1 << gu2_xshift) - 1;
+      dstoffset += (1 << gu2_xshift) - 1;
+   }
+
+   /* POLL UNTIL ABLE TO WRITE TO THE REGISTERS */
+   /* Put off poll for as long as possible (do most calculations first). */
+
+   GU2_WAIT_PENDING;
+   WRITE_GP32(MGP_RASTER_MODE, gu2_rop32);
+   WRITE_GP32(MGP_SRC_OFFSET, srcoffset);
+   WRITE_GP32(MGP_DST_OFFSET, dstoffset);
+   WRITE_GP32(MGP_WID_HEIGHT, size);
+   WRITE_GP32(MGP_STRIDE, gu2_pitch | (gu2_pitch << 16));
+   WRITE_GP16(MGP_BLT_MODE, blt_mode);
+}
+
+/*
+//----------------------------------------------------------------------------
+// SCREEN TO SCREEN TRANSPARENT BLT
+//
+// This routine should be used to perform a screen to screen BLT when a 
+// specified color should by transparent.  The only supported ROP is SRCCOPY.
+//
+//      SRCX            screen X position to copy from
+//      SRCY            screen Y position to copy from
+//      DSTX            screen X position to copy to
+//      DSTY            screen Y position to copy to
+//      WIDTH           width of rectangle, in pixels
+//      HEIGHT          height of rectangle, in scanlines
+//      COLOR           transparent color
+//----------------------------------------------------------------------------
+*/
+#if GFX_2DACCEL_DYNAMIC
+void
+gu2_screen_to_screen_xblt(unsigned short srcx, unsigned short srcy,
+			  unsigned short dstx, unsigned short dsty,
+			  unsigned short width, unsigned short height,
+			  unsigned long color)
+#else
+void
+gfx_screen_to_screen_xblt(unsigned short srcx, unsigned short srcy,
+			  unsigned short dstx, unsigned short dsty,
+			  unsigned short width, unsigned short height,
+			  unsigned long color)
+#endif
+{
+   unsigned long rop32;
+
+   /* SAVE ORIGINAL RASTER MODE SETTINGS */
+
+   rop32 = gu2_rop32;
+
+   /* WRITE REGISTERS TO SPECIFY COLOR TRANSPARENCY */
+   /* Match GU1 implementation that only allows SRCCOPY for the ROP. */
+
+   GU2_WAIT_PENDING;
+   WRITE_GP32(MGP_SRC_COLOR_FG, color);
+   WRITE_GP32(MGP_SRC_COLOR_BG, 0xFFFFFFFF);
+
+   /* SET GLOBAL RASTER SETTINGS */
+   /* This is needed, as the screen-to-screen BLT      */
+   /* routine will overwrite the raster mode register. */
+
+   gu2_rop32 = gu2_bpp | MGP_RM_SRC_TRANS | 0xCC;
+
+   /* CALL NORMAL SCREEN TO SCREEN BLT ROUTINE */
+
+   gfx_screen_to_screen_blt(srcx, srcy, dstx, dsty, width, height);
+
+   /* RESTORE GLOBAL RASTER SETTINGS */
+
+   gu2_rop32 = rop32;
+}
+
+/*
+//----------------------------------------------------------------------------
+// COLOR BITMAP TO SCREEN BLT
+//
+// This routine transfers color bitmap data to the screen.
+//
+//      SRCX            X offset within source bitmap
+//      SRCY            Y offset within source bitmap
+//      DSTX            screen X position to render data
+//      DSTY            screen Y position to render data
+//      WIDTH           width of rectangle, in pixels
+//      HEIGHT          height of rectangle, in scanlines
+//      *DATA           pointer to bitmap data
+//      PITCH           pitch of bitmap data (bytes between scanlines)
+//
+// Transparency is handled by another routine.
+//----------------------------------------------------------------------------
+*/
+
+#if GFX_2DACCEL_DYNAMIC
+void
+gu2_color_bitmap_to_screen_blt(unsigned short srcx, unsigned short srcy,
+			       unsigned short dstx, unsigned short dsty,
+			       unsigned short width, unsigned short height,
+			       unsigned char *data, long pitch)
+#else
+void
+gfx_color_bitmap_to_screen_blt(unsigned short srcx, unsigned short srcy,
+			       unsigned short dstx, unsigned short dsty,
+			       unsigned short width, unsigned short height,
+			       unsigned char *data, long pitch)
+#endif
+{
+   unsigned long dstoffset, srcoffset, size, bytes;
+   unsigned long offset, temp_offset;
+   unsigned long dword_bytes, bytes_extra;
+   unsigned short blt_mode;
+
+   blt_mode = gu2_blt_mode | MGP_BM_SRC_FB;
+   size = (((unsigned long)width) << 16) | 1;
+
+   /* CALCULATE STARTING OFFSETS */
+
+   offset = (unsigned long)srcy *pitch + ((unsigned long)srcx << gu2_xshift);
+
+   dstoffset = (unsigned long)dsty *gu2_pitch +
+	 (((unsigned long)dstx) << gu2_xshift);
+
+   /* CHECK IF PATTERN ORIGINS NEED TO BE SET */
+
+   if (GFXpatternFlags) {
+      /* COMBINE X AND Y PATTERN ORIGINS WITH OFFSET */
+
+      dstoffset |= ((unsigned long)(dstx & 7)) << 26;
+      dstoffset |= ((unsigned long)(dsty & 7)) << 29;
+   }
+
+   bytes = width << gu2_xshift;
+   dword_bytes = bytes & ~0x3L;
+   bytes_extra = bytes & 0x3L;
+
+   /* POLL UNTIL ABLE TO WRITE TO THE REGISTERS */
+   /* Put off poll for as long as possible (do most calculations first).   */
+   /* The source offset is always 0 since we allow misaligned dword reads. */
+   /* We must wait for BLT busy because the GP may be executing a screen   */
+   /* to screen BLT from the scratchpad area.                              */
+
+   GU2_WAIT_BUSY;
+   WRITE_GP32(MGP_RASTER_MODE, gu2_rop32);
+   WRITE_GP32(MGP_WID_HEIGHT, size);
+   WRITE_GP32(MGP_STRIDE, gu2_pitch);
+
+   /* WRITE DATA ONE LINE AT A TIME */
+   /* For speed reasons, data is written to an offscreen scratch area and then        */
+   /* BLTed using a screen to screen BLT. This is similar to the GX1 BLT buffers, but */
+   /* slightly more efficient in that we can queue up data while the GP is rendering  */
+   /* a line.                                                                         */
+
+   while (height--) {
+      temp_offset = offset;
+      srcoffset = gfx_gx2_scratch_base;
+      if (gu2_current_line)
+	 srcoffset += 8192;
+
+      GU2_WAIT_PENDING;
+      WRITE_GP32(MGP_SRC_OFFSET, srcoffset);
+      WRITE_GP32(MGP_DST_OFFSET, dstoffset);
+      dstoffset += gu2_pitch;
+      dstoffset += 0x20000000;
+
+      WRITE_FRAME_BUFFER_STRING32(srcoffset, dword_bytes, data, temp_offset);
+      if (bytes_extra) {
+	 temp_offset += dword_bytes;
+	 srcoffset += dword_bytes;
+	 WRITE_FRAME_BUFFER_STRING8(srcoffset, bytes_extra, data,
+				    temp_offset);
+      }
+      WRITE_GP16(MGP_BLT_MODE, blt_mode);
+      offset += pitch;
+      gu2_current_line = 1 - gu2_current_line;
+   }
+}
+
+/*
+//----------------------------------------------------------------------------
+// COLOR BITMAP TO SCREEN TRANSPARENT BLT
+//
+// This routine transfers color bitmap data to the screen with transparency.
+// The transparent color is specified.  The only supported ROP is SRCCOPY, 
+// meaning that transparency cannot be applied if the ROP requires 
+// destination data (this is a hardware restriction).
+//
+//      SRCX            X offset within source bitmap
+//      SRCY            Y offset within source bitmap
+//      DSTX            screen X position to render data
+//      DSTY            screen Y position to render data
+//      WIDTH           width of rectangle, in pixels
+//      HEIGHT          height of rectangle, in scanlines
+//      *DATA           pointer to bitmap data
+//      PITCH           pitch of bitmap data (bytes between scanlines)
+//      COLOR           transparent color
+//----------------------------------------------------------------------------
+*/
+#if GFX_2DACCEL_DYNAMIC
+void
+gu2_color_bitmap_to_screen_xblt(unsigned short srcx, unsigned short srcy,
+				unsigned short dstx, unsigned short dsty,
+				unsigned short width, unsigned short height,
+				unsigned char *data, long pitch,
+				unsigned long color)
+#else
+void
+gfx_color_bitmap_to_screen_xblt(unsigned short srcx, unsigned short srcy,
+				unsigned short dstx, unsigned short dsty,
+				unsigned short width, unsigned short height,
+				unsigned char *data, long pitch,
+				unsigned long color)
+#endif
+{
+   unsigned long rop32;
+
+   /* SAVE EXISTING RASTER MODE SETTINGS */
+
+   rop32 = gu2_rop32;
+
+   /* WRITE REGISTERS TO SPECIFY COLOR TRANSPARENCY */
+   /* Match GU1 implementation that only allows SRCCOPY for the ROP. */
+
+   GU2_WAIT_PENDING;
+   WRITE_GP32(MGP_SRC_COLOR_FG, color);
+   WRITE_GP32(MGP_SRC_COLOR_BG, 0xFFFFFFFF);
+
+   /* SET GLOBAL RASTER SETTINGS */
+   /* This is needed, as the screen-to-screen BLT      */
+   /* routine will overwrite the raster mode register. */
+
+   gu2_rop32 = gu2_bpp | MGP_RM_SRC_TRANS | 0xCC;
+
+   /* CALL NORMAL COLOR BITMAP TO SCREEN BLT ROUTINE */
+
+   gfx_color_bitmap_to_screen_blt(srcx, srcy, dstx, dsty, width, height,
+				  data, pitch);
+
+   /* RESTORE RASTER SETTINGS */
+
+   gu2_rop32 = rop32;
+}
+
+/*
+//----------------------------------------------------------------------------
+// MONOCHROME BITMAP TO SCREEN BLT
+//
+// This routine transfers monochrome bitmap data to the screen.  
+//
+//      SRCX            X offset within source bitmap
+//      SRCY            Y offset within source bitmap
+//      DSTX            screen X position to render data
+//      DSTY            screen Y position to render data
+//      WIDTH           width of rectangle, in pixels
+//      HEIGHT          height of rectangle, in scanlines
+//      *DATA           pointer to bitmap data
+//      PITCH           pitch of bitmap data (bytes between scanlines)
+//----------------------------------------------------------------------------
+*/
+#if GFX_2DACCEL_DYNAMIC
+void
+gu2_mono_bitmap_to_screen_blt(unsigned short srcx, unsigned short srcy,
+			      unsigned short dstx, unsigned short dsty,
+			      unsigned short width, unsigned short height,
+			      unsigned char *data, short pitch)
+#else
+void
+gfx_mono_bitmap_to_screen_blt(unsigned short srcx, unsigned short srcy,
+			      unsigned short dstx, unsigned short dsty,
+			      unsigned short width, unsigned short height,
+			      unsigned char *data, short pitch)
+#endif
+{
+   unsigned long dstoffset, size, bytes;
+   unsigned long offset, temp_offset, temp1 = 0, temp2 = 0;
+   unsigned long i, j = 0, fifo_lines, dwords_extra, bytes_extra;
+   unsigned long shift = 0;
+
+   size = (((unsigned long)width) << 16) | height;
+
+   /* CALCULATE STARTING OFFSETS */
+
+   offset = (unsigned long)srcy *pitch + ((unsigned long)srcx >> 3);
+
+   dstoffset = (unsigned long)dsty *gu2_pitch +
+	 (((unsigned long)dstx) << gu2_xshift);
+
+   /* CHECK IF PATTERN ORIGINS NEED TO BE SET */
+
+   if (GFXpatternFlags) {
+      /* COMBINE X AND Y PATTERN ORIGINS WITH OFFSET */
+
+      dstoffset |= ((unsigned long)(dstx & 7)) << 26;
+      dstoffset |= ((unsigned long)(dsty & 7)) << 29;
+   }
+
+   bytes = ((srcx & 7) + width + 7) >> 3;
+   fifo_lines = bytes >> 5;
+   dwords_extra = (bytes & 0x0000001Cl) >> 2;
+   bytes_extra = bytes & 0x00000003l;
+
+   /* POLL UNTIL ABLE TO WRITE TO THE REGISTERS */
+   /* Put off poll for as long as possible (do most calculations first).   */
+   /* The source offset is always 0 since we allow misaligned dword reads. */
+   /* Need to wait for busy instead of pending, since hardware clears      */
+   /* the host data FIFO at the beginning of a BLT.                        */
+
+   GU2_WAIT_PENDING;
+   WRITE_GP32(MGP_RASTER_MODE, gu2_rop32);
+   WRITE_GP32(MGP_SRC_OFFSET, ((unsigned long)srcx & 7) << 26);
+   WRITE_GP32(MGP_DST_OFFSET, dstoffset);
+   WRITE_GP32(MGP_WID_HEIGHT, size);
+   WRITE_GP32(MGP_STRIDE, gu2_pitch);
+   WRITE_GP16(MGP_BLT_MODE, gu2_blt_mode | MGP_BM_SRC_HOST | MGP_BM_SRC_MONO);
+
+   /* WAIT FOR BLT TO BE LATCHED */
+
+   GU2_WAIT_PENDING;
+
+   /* WRITE ALL OF THE DATA TO THE HOST SOURCE REGISTER */
+
+   while (height--) {
+      temp_offset = offset;
+
+      /* WRITE ALL FULL FIFO LINES */
+
+      for (i = 0; i < fifo_lines; i++) {
+	 GU2_WAIT_HALF_EMPTY;
+	 WRITE_GPREG_STRING32(MGP_HST_SOURCE, 8, j, data, temp_offset, temp1);
+	 temp_offset += 32;
+      }
+
+      /* WRITE ALL FULL DWORDS */
+
+      GU2_WAIT_HALF_EMPTY;
+      if (dwords_extra) {
+	 WRITE_GPREG_STRING32(MGP_HST_SOURCE, dwords_extra, i, data,
+			      temp_offset, temp1);
+	 temp_offset += (dwords_extra << 2);
+      }
+
+      /* WRITE REMAINING BYTES */
+
+      shift = 0;
+      if (bytes_extra)
+	 WRITE_GPREG_STRING8(MGP_HST_SOURCE, bytes_extra, shift, i, data,
+			     temp_offset, temp1, temp2);
+
+      offset += pitch;
+   }
+}
+
+/*---------------------------------------------------------------------------
+ * GFX_TEXT_BLT	
+ *
+ * This routine is similar to the gfx_mono_bitmap_to_screen_blt routine 
+ * but assumes that source data is byte-packed.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_2DACCEL_DYNAMIC
+void
+gu2_text_blt(unsigned short dstx, unsigned short dsty, unsigned short width,
+	     unsigned short height, unsigned char *data)
+#else
+void
+gfx_text_blt(unsigned short dstx, unsigned short dsty, unsigned short width,
+	     unsigned short height, unsigned char *data)
+#endif
+{
+   unsigned long size, bytes;
+   unsigned long dstoffset, temp1 = 0, temp2 = 0, temp_offset = 0;
+   unsigned long i, j = 0, fifo_lines, dwords_extra, bytes_extra;
+   unsigned long shift;
+
+   size = (((unsigned long)width) << 16) | height;
+
+   dstoffset = (unsigned long)dsty *gu2_pitch +
+	 (((unsigned long)dstx) << gu2_xshift);
+
+   /* CHECK IF PATTERN ORIGINS NEED TO BE SET */
+
+   if (GFXpatternFlags) {
+      /* COMBINE X AND Y PATTERN ORIGINS WITH OFFSET */
+
+      dstoffset |= ((unsigned long)(dstx & 7)) << 26;
+      dstoffset |= ((unsigned long)(dsty & 7)) << 29;
+   }
+
+   /* CALCULATE STARTING OFFSETS */
+
+   bytes = ((width + 7) >> 3) * height;
+   fifo_lines = bytes >> 5;
+   dwords_extra = (bytes & 0x0000001Cl) >> 2;
+   bytes_extra = bytes & 0x00000003l;
+
+   /* POLL UNTIL ABLE TO WRITE TO THE REGISTERS */
+
+   GU2_WAIT_PENDING;
+   WRITE_GP32(MGP_RASTER_MODE, gu2_rop32);
+   WRITE_GP32(MGP_SRC_OFFSET, 0);
+   WRITE_GP32(MGP_DST_OFFSET, dstoffset);
+   WRITE_GP32(MGP_WID_HEIGHT, size);
+   WRITE_GP32(MGP_STRIDE, gu2_pitch);
+   WRITE_GP16(MGP_BLT_MODE, gu2_blt_mode | MGP_BM_SRC_HOST |
+	      MGP_BM_SRC_BP_MONO);
+
+   /* WAIT FOR BLT TO BE LATCHED */
+
+   GU2_WAIT_PENDING;
+
+   /* WRITE ALL FULL FIFO LINES */
+
+   for (i = 0; i < fifo_lines; i++) {
+      GU2_WAIT_HALF_EMPTY;
+      WRITE_GPREG_STRING32(MGP_HST_SOURCE, 8, j, data, temp_offset, temp1);
+      temp_offset += 32;
+   }
+
+   /* WRITE ALL FULL DWORDS */
+
+   if (dwords_extra || bytes_extra) {
+      GU2_WAIT_HALF_EMPTY;
+      if (dwords_extra) {
+	 WRITE_GPREG_STRING32(MGP_HST_SOURCE, dwords_extra, i, data,
+			      temp_offset, temp1);
+	 temp_offset += (dwords_extra << 2);
+      }
+      if (bytes_extra) {
+	 shift = 0;
+	 WRITE_GPREG_STRING8(MGP_HST_SOURCE, bytes_extra, shift, i, data,
+			     temp_offset, temp1, temp2);
+      }
+   }
+}
+
+/*
+//----------------------------------------------------------------------------
+// BRESENHAM LINE
+//
+// This routine draws a vector using the specified Bresenham parameters.  
+// Currently this file does not support a routine that accepts the two 
+// endpoints of a vector and calculates the Bresenham parameters.  If it 
+// ever does, this routine is still required for vectors that have been 
+// clipped.
+//
+//      X               screen X position to start vector
+//      Y               screen Y position to start vector
+//      LENGTH          length of the vector, in pixels
+//      INITERR         Bresenham initial error term
+//      AXIALERR        Bresenham axial error term
+//      DIAGERR         Bresenham diagonal error term
+//      FLAGS           VM_YMAJOR, VM_MAJOR_INC, VM_MINOR_INC
+//----------------------------------------------------------------------------
+*/
+#if GFX_2DACCEL_DYNAMIC
+void
+gu2_bresenham_line(unsigned short x, unsigned short y,
+		   unsigned short length, unsigned short initerr,
+		   unsigned short axialerr, unsigned short diagerr,
+		   unsigned short flags)
+#else
+void
+gfx_bresenham_line(unsigned short x, unsigned short y,
+		   unsigned short length, unsigned short initerr,
+		   unsigned short axialerr, unsigned short diagerr,
+		   unsigned short flags)
+#endif
+{
+   unsigned long offset;
+   unsigned long data1 = (((unsigned long)axialerr) << 16) | diagerr;
+   unsigned long data2 = (((unsigned long)length) << 16) | initerr;
+   unsigned short vector_mode = gu2_vector_mode | flags;
+
+   /* CALCULATE STARTING OFFSET */
+
+   offset = (unsigned long)y *gu2_pitch + (((unsigned long)x) << gu2_xshift);
+
+   /* CHECK NULL LENGTH */
+
+   if (!length)
+      return;
+
+   /* POLL UNTIL ABLE TO WRITE TO THE REGISTERS */
+   /* Put off poll for as long as possible (do most calculations first). */
+
+   GU2_WAIT_PENDING;
+   WRITE_GP32(MGP_RASTER_MODE, gu2_rop32);
+   WRITE_GP32(MGP_DST_OFFSET, offset);
+   WRITE_GP32(MGP_VEC_ERR, data1);
+   WRITE_GP32(MGP_VEC_LEN, data2);
+   WRITE_GP32(MGP_STRIDE, gu2_pitch);
+   WRITE_GP32(MGP_VECTOR_MODE, vector_mode);
+}
+
+/*---------------------------------------------------------------------------
+ * GFX_WAIT_UNTIL_IDLE
+ *
+ * This routine waits until the graphics engine is idle.  This is required
+ * before allowing direct access to the frame buffer.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_2DACCEL_DYNAMIC
+void
+gu2_wait_until_idle(void)
+#else
+void
+gfx_wait_until_idle(void)
+#endif
+{
+   while (READ_GP32(MGP_BLT_STATUS) & MGP_BS_BLT_BUSY) ;
+}
+
+/*---------------------------------------------------------------------------
+ * GFX_TEST_BLT_PENDING
+ *
+ * This routine returns 1 if a BLT is pending, meaning that a call to 
+ * perform a rendering operation would stall.  Otherwise it returns 0.
+ * It is used by Darwin during random testing to only start a BLT 
+ * operation when it knows the Durango routines won't spin on graphics
+ * (so Darwin can continue to do frame buffer reads and writes).
+ *---------------------------------------------------------------------------
+ */
+#if GFX_2DACCEL_DYNAMIC
+int
+gu2_test_blt_pending(void)
+#else
+int
+gfx_test_blt_pending(void)
+#endif
+{
+   if (READ_GP32(MGP_BLT_STATUS) & MGP_BS_BLT_PENDING)
+      return (1);
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * NEW ROUTINES FOR REDCLOUD
+ *---------------------------------------------------------------------------
+ */
+
+/*---------------------------------------------------------------------------
+ * GFX2_SET_SOURCE_STRIDE
+ *
+ * This routine sets the stride to be used in successive screen to screen 
+ * BLTs (used by gfx2_screen_to_screen_blt and gfx2_mono_expand_blt).
+ *---------------------------------------------------------------------------
+ */
+#if GFX_2DACCEL_DYNAMIC
+void
+gu22_set_source_stride(unsigned short stride)
+#else
+void
+gfx2_set_source_stride(unsigned short stride)
+#endif
+{
+   /* SAVE STRIDE TO BE USED LATER */
+
+   gu2_src_pitch = (unsigned long)stride;
+}
+
+/*---------------------------------------------------------------------------
+ * GFX2_SET_DESTINATION_STRIDE
+ *
+ * This routine sets the stride used when rendering to the screen.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_2DACCEL_DYNAMIC
+void
+gu22_set_destination_stride(unsigned short stride)
+#else
+void
+gfx2_set_destination_stride(unsigned short stride)
+#endif
+{
+   /* SAVE STRIDE TO BE USED LATER */
+
+   gu2_dst_pitch = (unsigned long)stride;
+}
+
+/*---------------------------------------------------------------------------
+ * GFX2_SET_PATTERN_ORIGIN
+ *
+ * This routine sets the origin within an 8x8 pattern.  It is needed if 
+ * using a monochrome or color pattern (not used for a solid pattern).
+ *---------------------------------------------------------------------------
+ */
+#if GFX_2DACCEL_DYNAMIC
+void
+gu22_set_pattern_origin(int x, int y)
+#else
+void
+gfx2_set_pattern_origin(int x, int y)
+#endif
+{
+   /* STORE IN FORMAT THAT CAN BE COMBINED WITH THE DESTINATION OFFSET */
+
+   gu2_pattern_origin = (((unsigned long)(x & 7)) << 26) |
+	 (((unsigned long)(y & 7)) << 29);
+}
+
+/*---------------------------------------------------------------------------
+ * GFX2_SET_SOURCE_TRANSPARENCY
+ *
+ * This routine sets the source transparency color and mask to be used
+ * in future rendering operations.  If both the color and mask are set 
+ * to zero (normally completely transparent), those values indicate that
+ * transparency should be disabled.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_2DACCEL_DYNAMIC
+void
+gu22_set_source_transparency(unsigned long color, unsigned long mask)
+#else
+void
+gfx2_set_source_transparency(unsigned long color, unsigned long mask)
+#endif
+{
+   /* WRITE REGISTERS TO SPECIFY COLOR TRANSPARENCY */
+
+   GU2_WAIT_PENDING;
+   WRITE_GP32(MGP_SRC_COLOR_FG, color);
+   WRITE_GP32(MGP_SRC_COLOR_BG, mask);
+
+   /* SET TRANSPARENCY FLAG */
+
+   GFXsourceFlags = (color || mask) ? MGP_RM_SRC_TRANS : 0;
+}
+
+/*---------------------------------------------------------------------------
+ * GFX2_SET_ALPHA_MODE
+ *
+ * This routine sets the alpha blending mode to be used in successive 
+ * rendering operations.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_2DACCEL_DYNAMIC
+void
+gu22_set_alpha_mode(int mode)
+#else
+void
+gfx2_set_alpha_mode(int mode)
+#endif
+{
+   /* SAVE ALPHA MODE FOR LATER */
+
+   gu2_alpha_mode = mode;
+}
+
+/*---------------------------------------------------------------------------
+ * GFX2_SET_ALPHA_VALUE
+ *
+ * This routine sets the alpha value to be used with certain alpha blending
+ * modes (ALPHA_MODE_BLEND).
+ *---------------------------------------------------------------------------
+ */
+#if GFX_2DACCEL_DYNAMIC
+void
+gu22_set_alpha_value(unsigned char value)
+#else
+void
+gfx2_set_alpha_value(unsigned char value)
+#endif
+{
+   /* SAVE ALPHA VALUE TO BE USED LATER */
+
+   gu2_alpha_value = (unsigned long)value;
+
+   /* SET GLOBAL FLAG */
+   /* gfx2_* routines will use this flag to program alpha values */
+   /* appropriately.  Normal gfx_* routines will always write    */
+   /* the current ROP settings.  In this way, the alpha mode     */
+   /* affects only second generation routines.                   */
+
+   gu2_alpha_active = 1;
+
+   switch (gu2_alpha_mode) {
+   case ALPHA_MODE_BLEND:
+
+      /* GENERATE 32-BIT VERSION OF RASTER MODE REGISTER */
+      /* Pattern data is not involved in the operation.  */
+
+      gu2_alpha32 = gu2_alpha_value | gu2_bpp;
+
+      /* HANDLE SPECIAL CASES FOR ENDPOINTS              */
+      /* The 8-bit hardware alpha value is always        */
+      /* interpreted as a fraction.  Consequently, there */
+      /* is no way to use values of 255 or 0 to exclude  */
+      /* one of the inputs.                              */
+
+      switch (gu2_alpha_value) {
+	 /* DESTINATION ONLY                               */
+	 /* Operation is alpha * A, where A is destination */
+	 /* and alpha is 1.                                */
+
+      case 0:
+
+	 gu2_alpha32 |= MGP_RM_SELECT_ALPHA_1 |
+	       MGP_RM_ALPHA_TIMES_A |
+	       MGP_RM_ALPHA_TO_RGB | MGP_RM_DEST_FROM_CHAN_A;
+	 break;
+
+	 /* SOURCE ONLY                                    */
+	 /* Operation is alpha * A, where A is source and  */
+	 /* alpha is 1.                                    */
+
+      case 255:
+
+	 gu2_alpha32 |= MGP_RM_SELECT_ALPHA_1 |
+	       MGP_RM_ALPHA_TO_RGB | MGP_RM_ALPHA_TIMES_A;
+	 break;
+
+	 /* DEFAULT                                        */
+	 /* Operation is alpha * A + (1 - alpha) * B;      */
+	 /* A is source, B is destination and alpha is the */
+	 /* programmed 8-bit value.                        */
+
+      default:
+
+	 gu2_alpha32 |= MGP_RM_SELECT_ALPHA_R |
+	       MGP_RM_ALPHA_TO_RGB | MGP_RM_ALPHA_A_PLUS_BETA_B;
+
+      }
+
+      /* CHECK IF SOURCE INFORMATION SHOULD BE MERGED    */
+      /* Alpha value of 0 indicates destination only.    */
+
+      if (gu2_alpha_value != 0)
+	 gu2_alpha32 |= GFXsourceFlags;
+
+      /* SET FLAG FOR DESTINATION DATA IF NECESSARY      */
+      /* Alpha value of 255 indicates no destination     */
+
+      if (gu2_alpha_value != 255) {
+	 gu2_alpha_blt_mode = MGP_BM_DST_REQ;
+	 gu2_alpha_vec_mode = MGP_VM_DST_REQ;
+      }
+
+      break;
+   }
+}
+
+/*---------------------------------------------------------------------------
+ * GFX2_PATTERN_FILL
+ *
+ * This routine is similar to the gfx_pattern_fill routine, but allows the
+ * use of an arbitrary destination stride.  The rendering position is 
+ * also specified as an offset instead of an (x,y) position.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_2DACCEL_DYNAMIC
+void
+gu22_pattern_fill(unsigned long dstoffset, unsigned short width,
+		  unsigned short height)
+#else
+void
+gfx2_pattern_fill(unsigned long dstoffset, unsigned short width,
+		  unsigned short height)
+#endif
+{
+   unsigned long size;
+
+   size = (((unsigned long)width) << 16) | height;
+
+   /* POLL UNTIL ABLE TO WRITE TO THE REGISTERS */
+   /* Put off poll for as long as possible (do most calculations first). */
+
+   GU2_WAIT_PENDING;
+   WRITE_GP32(MGP_RASTER_MODE, gu2_rop32);
+   WRITE_GP32(MGP_DST_OFFSET, dstoffset | gu2_pattern_origin);
+   WRITE_GP32(MGP_WID_HEIGHT, size);
+   WRITE_GP32(MGP_STRIDE, gu2_dst_pitch);
+   WRITE_GP32(MGP_BLT_MODE, gu2_blt_mode | gu2_bm_throttle);
+   gu2_bm_throttle = 0;
+   gu2_vm_throttle = 0;
+}
+
+/*---------------------------------------------------------------------------
+ * GFX2_COLOR_PATTERN_FILL
+ *
+ * This routine is used to render a rectangle using the current raster 
+ * operation and the specified color pattern.  It allows an 8x8 color 
+ * pattern to be rendered without multiple calls to the gfx_set_color_pattern
+ * and gfx_pattern_fill routines.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_2DACCEL_DYNAMIC
+void
+gu22_color_pattern_fill(unsigned long dstoffset, unsigned short width,
+			unsigned short height, unsigned long *pattern)
+#else
+void
+gfx2_color_pattern_fill(unsigned long dstoffset, unsigned short width,
+			unsigned short height, unsigned long *pattern)
+#endif
+{
+   int pass;
+   unsigned long lines, size, patxorigin, patoffset;
+
+   /* ONLY USE HW PATTERN ORIGIN FOR THE X DIRECTION */
+   /* Y direction handled by referencing proper location in pattern data. */
+
+   patxorigin = (gu2_pattern_origin) & 0x1C000000;
+
+   /* OVERRIDE PATTERN FLAGS IN ROP TO FORCE COLOR PATTERN */
+
+   GU2_WAIT_PENDING;
+   WRITE_GP32(MGP_RASTER_MODE,
+	      (gu2_rop32 & ~MGP_RM_PAT_FLAGS) | MGP_RM_PAT_COLOR);
+
+   /* ATTEMPT TO OPTIMIZE */
+   /* If possible, we can perform the pattern fill in only a few passes    */
+   /* This is performed by multiplying the pitch by an appropriate amount. */
+   /* Consequently, if the multiplied pitch exceeds 16 bits, this          */
+   /* optimization is impossible.                                          */
+
+   if ((gu2_dst_pitch << (gu2_xshift + 1)) <= 0xFFFF) {
+      /* HANDLE VARIOUS COLOR DEPTHS DIFFERENTLY */
+
+      switch (gu2_xshift) {
+      case 0:				/* 8 BPP */
+
+	 /* TWO PASSES FOR 8 BPP */
+	 /* Render every other line per pass by doubling the pitch. */
+
+	 patoffset = (gu2_pattern_origin >> 28) & 0x0E;
+	 for (pass = 0; pass < 2; pass++) {
+	    /* CAN WRITE SOME PATTERN REGISTERS WHILE "PENDING" */
+
+	    GU2_WAIT_PENDING;
+	    WRITE_GP32(MGP_DST_OFFSET, dstoffset | patxorigin);
+	    lines = (height + 1 - pass) >> 1;
+	    if (!lines)
+	       break;
+	    size = (((unsigned long)width) << 16) | lines;
+	    WRITE_GP32(MGP_WID_HEIGHT, size);
+	    WRITE_GP32(MGP_STRIDE, gu2_dst_pitch << 1);
+	    WRITE_GP32(MGP_PAT_DATA_1, BYTE_SWIZZLE(pattern[patoffset]));
+	    WRITE_GP32(MGP_PAT_DATA_0, BYTE_SWIZZLE(pattern[patoffset + 1]));
+	    patoffset = (patoffset + 4) & 0x0E;
+	    WRITE_GP32(MGP_PAT_COLOR_1, BYTE_SWIZZLE(pattern[patoffset]));
+	    WRITE_GP32(MGP_PAT_COLOR_0, BYTE_SWIZZLE(pattern[patoffset + 1]));
+	    patoffset = (patoffset + 4) & 0x0E;
+
+	    /* NEED TO WAIT UNTIL IDLE FOR COLORS 2 THROUGH 5 */
+	    /* Those registers are not pipelined. */
+
+	    GU2_WAIT_BUSY;
+	    WRITE_GP32(MGP_PAT_COLOR_3, BYTE_SWIZZLE(pattern[patoffset]));
+	    WRITE_GP32(MGP_PAT_COLOR_2, BYTE_SWIZZLE(pattern[patoffset + 1]));
+	    patoffset = (patoffset + 4) & 0x0E;
+	    WRITE_GP32(MGP_PAT_COLOR_5, BYTE_SWIZZLE(pattern[patoffset]));
+	    WRITE_GP32(MGP_PAT_COLOR_4, BYTE_SWIZZLE(pattern[patoffset + 1]));
+	    WRITE_GP16(MGP_BLT_MODE, gu2_blt_mode | gu2_bm_throttle);
+	    gu2_bm_throttle = 0;
+	    gu2_vm_throttle = 0;
+
+	    /* ADJUST FOR NEXT PASS */
+
+	    dstoffset += gu2_dst_pitch;
+	    patoffset = (patoffset + 6) & 0x0E;
+	 }
+	 break;
+
+      case 1:				/* 12, 15, OR 16 BPP */
+
+	 /* FOUR PASSES FOR 16 BPP */
+	 /* Render every 4th line per pass by quadrupling the pitch. */
+
+	 patoffset = (gu2_pattern_origin >> 27) & 0x1C;
+	 for (pass = 0; pass < 4; pass++) {
+	    /* CAN WRITE SOME PATTERN REGISTERS WHILE "PENDING" */
+
+	    GU2_WAIT_PENDING;
+	    WRITE_GP32(MGP_DST_OFFSET, dstoffset | patxorigin);
+	    lines = (height + 3 - pass) >> 2;
+	    if (!lines)
+	       break;
+	    size = (((unsigned long)width) << 16) | lines;
+	    WRITE_GP32(MGP_WID_HEIGHT, size);
+	    WRITE_GP32(MGP_STRIDE, gu2_dst_pitch << 2);
+	    WRITE_GP32(MGP_PAT_COLOR_1, WORD_SWIZZLE(pattern[patoffset]));
+	    WRITE_GP32(MGP_PAT_COLOR_0, WORD_SWIZZLE(pattern[patoffset + 1]));
+	    WRITE_GP32(MGP_PAT_DATA_1, WORD_SWIZZLE(pattern[patoffset + 2]));
+	    WRITE_GP32(MGP_PAT_DATA_0, WORD_SWIZZLE(pattern[patoffset + 3]));
+	    patoffset = (patoffset + 16) & 0x1C;
+
+	    /* NEED TO WAIT UNTIL IDLE FOR COLORS 2 THROUGH 5 */
+	    /* Those registers are not pipelined. */
+
+	    GU2_WAIT_BUSY;
+	    WRITE_GP32(MGP_PAT_COLOR_5, WORD_SWIZZLE(pattern[patoffset]));
+	    WRITE_GP32(MGP_PAT_COLOR_4, WORD_SWIZZLE(pattern[patoffset + 1]));
+	    WRITE_GP32(MGP_PAT_COLOR_3, WORD_SWIZZLE(pattern[patoffset + 2]));
+	    WRITE_GP32(MGP_PAT_COLOR_2, WORD_SWIZZLE(pattern[patoffset + 3]));
+	    WRITE_GP16(MGP_BLT_MODE, gu2_blt_mode | gu2_bm_throttle);
+	    gu2_bm_throttle = 0;
+	    gu2_vm_throttle = 0;
+
+	    /* ADJUST FOR NEXT PASS */
+
+	    dstoffset += gu2_dst_pitch;
+	    patoffset = (patoffset + 20) & 0x1C;
+	 }
+	 break;
+
+      case 2:				/* 32 BPP */
+
+	 /* EIGHT PASSES FOR 32 BPP */
+	 /* Render every 8th line per pass by setting pitch * 8. */
+
+	 patoffset = (gu2_pattern_origin >> 26) & 0x38;
+	 for (pass = 0; pass < 8; pass++) {
+	    /* CAN WRITE SOME PATTERN REGISTERS WHILE "PENDING" */
+
+	    GU2_WAIT_PENDING;
+	    WRITE_GP32(MGP_DST_OFFSET, dstoffset | patxorigin);
+	    lines = (height + 7 - pass) >> 3;
+	    if (!lines)
+	       break;
+	    size = (((unsigned long)width) << 16) | lines;
+	    WRITE_GP32(MGP_WID_HEIGHT, size);
+	    WRITE_GP32(MGP_STRIDE, gu2_dst_pitch << 3);
+	    WRITE_GP32(MGP_PAT_COLOR_1, pattern[patoffset + 4]);
+	    WRITE_GP32(MGP_PAT_COLOR_0, pattern[patoffset + 5]);
+	    WRITE_GP32(MGP_PAT_DATA_1, pattern[patoffset + 6]);
+	    WRITE_GP32(MGP_PAT_DATA_0, pattern[patoffset + 7]);
+
+	    /* NEED TO WAIT UNTIL IDLE FOR COLORS 2 THROUGH 5 */
+	    /* Those registers are not pipelined. */
+
+	    GU2_WAIT_BUSY;
+	    WRITE_GP32(MGP_PAT_COLOR_5, pattern[patoffset]);
+	    WRITE_GP32(MGP_PAT_COLOR_4, pattern[patoffset + 1]);
+	    WRITE_GP32(MGP_PAT_COLOR_3, pattern[patoffset + 2]);
+	    WRITE_GP32(MGP_PAT_COLOR_2, pattern[patoffset + 3]);
+	    WRITE_GP16(MGP_BLT_MODE, gu2_blt_mode | gu2_bm_throttle);
+	    gu2_bm_throttle = 0;
+	    gu2_vm_throttle = 0;
+
+	    /* ADJUST FOR NEXT PASS */
+
+	    dstoffset += gu2_dst_pitch;
+	    patoffset = (patoffset + 8) & 0x38;
+	 }
+	 break;
+      }
+   }
+
+   else {
+      WRITE_GP32(MGP_STRIDE, gu2_dst_pitch);
+
+      switch (gu2_xshift) {
+      case 0:				/* 8 BPP - 4 LINES PER PASS */
+
+	 patoffset = (gu2_pattern_origin >> 28) & 0x0E;
+	 while (height) {
+	    lines = height > 4 ? 4 : height;
+
+	    /* CAN WRITE SOME REGISTERS WHILE PENDING */
+
+	    WRITE_GP32(MGP_DST_OFFSET, dstoffset | patxorigin);
+	    WRITE_GP32(MGP_WID_HEIGHT,
+		       (((unsigned long)width) << 16) | lines);
+	    WRITE_GP32(MGP_PAT_DATA_1, BYTE_SWIZZLE(pattern[patoffset]));
+	    WRITE_GP32(MGP_PAT_DATA_0, BYTE_SWIZZLE(pattern[patoffset + 1]));
+	    patoffset = (patoffset + 2) & 0x0E;
+	    WRITE_GP32(MGP_PAT_COLOR_1, BYTE_SWIZZLE(pattern[patoffset]));
+	    WRITE_GP32(MGP_PAT_COLOR_0, BYTE_SWIZZLE(pattern[patoffset + 1]));
+	    patoffset = (patoffset + 2) & 0x0E;
+
+	    /* NEED TO WAIT UNTIL IDLE FOR COLORS 2 THROUGH 5 */
+	    /* Those registers are not pipelined.             */
+
+	    GU2_WAIT_BUSY;
+	    WRITE_GP32(MGP_PAT_COLOR_3, BYTE_SWIZZLE(pattern[patoffset]));
+	    WRITE_GP32(MGP_PAT_COLOR_2, BYTE_SWIZZLE(pattern[patoffset + 1]));
+	    patoffset = (patoffset + 2) & 0x0E;
+	    WRITE_GP32(MGP_PAT_COLOR_5, BYTE_SWIZZLE(pattern[patoffset]));
+	    WRITE_GP32(MGP_PAT_COLOR_4, BYTE_SWIZZLE(pattern[patoffset + 1]));
+	    patoffset = (patoffset + 2) & 0x0E;
+	    WRITE_GP16(MGP_BLT_MODE, gu2_blt_mode | gu2_bm_throttle);
+
+	    /* ADJUST FOR NEXT PASS */
+
+	    dstoffset += gu2_dst_pitch << 2;
+	    height -= (unsigned short)lines;
+	 }
+	 break;
+
+      case 1:				/* 12, 15 AND 16 BPP - 2 LINES PER PASS */
+
+	 patoffset = (gu2_pattern_origin >> 27) & 0x1C;
+	 while (height) {
+	    lines = height > 2 ? 2 : height;
+
+	    /* CAN WRITE SOME REGISTERS WHILE PENDING */
+
+	    WRITE_GP32(MGP_DST_OFFSET, dstoffset | patxorigin);
+	    WRITE_GP32(MGP_WID_HEIGHT,
+		       (((unsigned long)width) << 16) | lines);
+	    WRITE_GP32(MGP_PAT_COLOR_1, WORD_SWIZZLE(pattern[patoffset]));
+	    WRITE_GP32(MGP_PAT_COLOR_0, WORD_SWIZZLE(pattern[patoffset + 1]));
+	    WRITE_GP32(MGP_PAT_DATA_1, WORD_SWIZZLE(pattern[patoffset + 2]));
+	    WRITE_GP32(MGP_PAT_DATA_0, WORD_SWIZZLE(pattern[patoffset + 3]));
+	    patoffset = (patoffset + 4) & 0x1C;
+
+	    /* NEED TO WAIT UNTIL IDLE FOR COLORS 2 THROUGH 5 */
+	    /* Those registers are not pipelined.             */
+
+	    GU2_WAIT_BUSY;
+	    WRITE_GP32(MGP_PAT_COLOR_5, WORD_SWIZZLE(pattern[patoffset]));
+	    WRITE_GP32(MGP_PAT_COLOR_4, WORD_SWIZZLE(pattern[patoffset + 1]));
+	    WRITE_GP32(MGP_PAT_COLOR_3, WORD_SWIZZLE(pattern[patoffset + 2]));
+	    WRITE_GP32(MGP_PAT_COLOR_2, WORD_SWIZZLE(pattern[patoffset + 3]));
+	    patoffset = (patoffset + 4) & 0x1C;
+	    WRITE_GP16(MGP_BLT_MODE, gu2_blt_mode | gu2_bm_throttle);
+
+	    /* ADJUST FOR NEXT PASS */
+
+	    dstoffset += gu2_dst_pitch << 1;
+	    height -= (unsigned short)lines;
+	 }
+	 break;
+
+      case 2:				/* 32 BPP - 1 LINE PER PASS */
+
+	 patoffset = (gu2_pattern_origin >> 26) & 0x38;
+	 while (height) {
+	    /* CAN WRITE SOME REGISTERS WHILE PENDING */
+
+	    WRITE_GP32(MGP_DST_OFFSET, dstoffset | patxorigin);
+	    WRITE_GP32(MGP_WID_HEIGHT, (((unsigned long)width) << 16) | 1l);
+	    WRITE_GP32(MGP_PAT_COLOR_1, pattern[patoffset + 4]);
+	    WRITE_GP32(MGP_PAT_COLOR_0, pattern[patoffset + 5]);
+	    WRITE_GP32(MGP_PAT_DATA_1, pattern[patoffset + 6]);
+	    WRITE_GP32(MGP_PAT_DATA_0, pattern[patoffset + 7]);
+
+	    /* NEED TO WAIT UNTIL IDLE FOR COLORS 2 THROUGH 5 */
+	    /* Those registers are not pipelined.             */
+
+	    GU2_WAIT_BUSY;
+	    WRITE_GP32(MGP_PAT_COLOR_5, pattern[patoffset]);
+	    WRITE_GP32(MGP_PAT_COLOR_4, pattern[patoffset + 1]);
+	    WRITE_GP32(MGP_PAT_COLOR_3, pattern[patoffset + 2]);
+	    WRITE_GP32(MGP_PAT_COLOR_2, pattern[patoffset + 3]);
+	    patoffset = (patoffset + 8) & 0x38;
+	    WRITE_GP16(MGP_BLT_MODE, gu2_blt_mode | gu2_bm_throttle);
+
+	    /* ADJUST FOR NEXT PASS */
+
+	    dstoffset += gu2_dst_pitch;
+	    height--;
+	 }
+	 break;
+      }
+
+   }
+
+}
+
+/*---------------------------------------------------------------------------
+ * GFX2_SCREEN_TO_SCREEN_BLT
+ *
+ * This routine is similar to the gfx_screen_to_screen_blt routine but
+ * allows the use of arbitrary source and destination strides and alpha
+ * blending.  It also allows the use of an arbitrary ROP with transparency.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_2DACCEL_DYNAMIC
+void
+gu22_screen_to_screen_blt(unsigned long srcoffset, unsigned long dstoffset,
+			  unsigned short width, unsigned short height,
+			  int flags)
+#else
+void
+gfx2_screen_to_screen_blt(unsigned long srcoffset, unsigned long dstoffset,
+			  unsigned short width, unsigned short height,
+			  int flags)
+#endif
+{
+   unsigned long size, xbytes;
+   unsigned short blt_mode;
+
+   size = (((unsigned long)width) << 16) | height;
+
+   /* USE ALPHA SETTINGS, IF REQUESTED */
+
+   if (gu2_alpha_active)
+      blt_mode = gu2_alpha_blt_mode | MGP_BM_SRC_FB;
+
+   else
+      blt_mode = gu2_blt_mode | MGP_BM_SRC_FB;
+
+   /* CALCULATE THE DIRECTION OF THE BLT */
+   /* Using offsets, so flags from the calling routine are needed. */
+
+   if (flags & 1) {
+      xbytes = (width - 1) << gu2_xshift;
+      srcoffset += xbytes;
+      dstoffset += xbytes;
+      blt_mode |= MGP_BM_NEG_XDIR;
+   }
+   if (flags & 2) {
+      srcoffset += (height - 1) * gu2_src_pitch;
+      dstoffset += (height - 1) * gu2_dst_pitch;
+      blt_mode |= MGP_BM_NEG_YDIR;
+   }
+
+   /* TURN INTO BYTE ADDRESS IF NEGATIVE X DIRECTION */
+   /* This is a quirk of the hardware. */
+
+   if (blt_mode & MGP_BM_NEG_XDIR) {
+      srcoffset += (1 << gu2_xshift) - 1;
+      dstoffset += (1 << gu2_xshift) - 1;
+   }
+
+   /* POLL UNTIL ABLE TO WRITE TO THE REGISTERS */
+   /* Put off poll for as long as possible (do most calculations first). */
+
+   GU2_WAIT_PENDING;
+
+   if (gu2_alpha_active) {
+      WRITE_GP32(MGP_RASTER_MODE, gu2_alpha32);
+   } else {
+      WRITE_GP32(MGP_RASTER_MODE, gu2_rop32);
+   }
+
+   WRITE_GP32(MGP_SRC_OFFSET, srcoffset);
+   WRITE_GP32(MGP_DST_OFFSET, dstoffset | gu2_pattern_origin);
+   WRITE_GP32(MGP_WID_HEIGHT, size);
+   WRITE_GP32(MGP_STRIDE, gu2_dst_pitch | (gu2_src_pitch << 16));
+   WRITE_GP16(MGP_BLT_MODE, blt_mode | gu2_bm_throttle);
+   gu2_bm_throttle = 0;
+   gu2_vm_throttle = 0;
+}
+
+/*---------------------------------------------------------------------------
+ * GFX2_MONO_EXPAND_BLT
+ *
+ * This routine is similar to the gfx2_screen_to_screen_blt routine but
+ * expands monochrome data stored in graphics memory.  
+ * WARNING: This routine assumes that the regions in graphics memory 
+ * will not overlap, and therefore does not check the BLT direction.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_2DACCEL_DYNAMIC
+void
+gu22_mono_expand_blt(unsigned long srcbase, unsigned short srcx,
+		     unsigned short srcy, unsigned long dstoffset,
+		     unsigned short width, unsigned short height,
+		     int byte_packed)
+#else
+void
+gfx2_mono_expand_blt(unsigned long srcbase, unsigned short srcx,
+		     unsigned short srcy, unsigned long dstoffset,
+		     unsigned short width, unsigned short height,
+		     int byte_packed)
+#endif
+{
+   unsigned long size, srcoffset;
+   unsigned short blt_mode;
+
+   size = (((unsigned long)width) << 16) | height;
+
+   /* CALCULATE SOURCE OFFSET */
+
+   srcoffset = srcbase + (unsigned long)srcy *gu2_src_pitch;
+
+   srcoffset += srcx >> 3;
+   srcoffset |= ((unsigned long)srcx & 7) << 26;
+
+   /* POLL UNTIL ABLE TO WRITE TO THE REGISTERS */
+   /* Put off poll for as long as possible (do most calculations first). */
+
+   GU2_WAIT_PENDING;
+
+   if (gu2_alpha_active) {
+      blt_mode = gu2_alpha_blt_mode;
+
+      WRITE_GP32(MGP_RASTER_MODE, gu2_alpha32);
+   } else {
+      blt_mode = gu2_blt_mode;
+
+      WRITE_GP32(MGP_RASTER_MODE, gu2_rop32);
+   }
+
+   if (byte_packed)
+      blt_mode |= MGP_BM_SRC_FB | MGP_BM_SRC_BP_MONO | gu2_bm_throttle;
+   else
+      blt_mode |= MGP_BM_SRC_FB | MGP_BM_SRC_MONO | gu2_bm_throttle;
+
+   WRITE_GP32(MGP_SRC_OFFSET, srcoffset);
+   WRITE_GP32(MGP_DST_OFFSET, dstoffset | gu2_pattern_origin);
+   WRITE_GP32(MGP_WID_HEIGHT, size);
+   WRITE_GP32(MGP_STRIDE, gu2_dst_pitch | (gu2_src_pitch << 16));
+   WRITE_GP16(MGP_BLT_MODE, blt_mode);
+   gu2_bm_throttle = 0;
+   gu2_vm_throttle = 0;
+}
+
+/*---------------------------------------------------------------------------
+ * GFX2_COLOR_BITMAP_TO_SCREEN_BLT	
+ *
+ * This routine is similar to the gfx_color_bitmap_to_screen_blt routine 
+ * but allows the use of an arbitrary destination stride and alpha blending.
+ * It also allows the use of an arbitrary ROP with transparency.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_2DACCEL_DYNAMIC
+void
+gu22_color_bitmap_to_screen_blt(unsigned short srcx, unsigned short srcy,
+				unsigned long dstoffset, unsigned short width,
+				unsigned short height, unsigned char *data,
+				short pitch)
+#else
+void
+gfx2_color_bitmap_to_screen_blt(unsigned short srcx, unsigned short srcy,
+				unsigned long dstoffset, unsigned short width,
+				unsigned short height, unsigned char *data,
+				short pitch)
+#endif
+{
+   unsigned long size, bytes;
+   unsigned long offset, temp_offset;
+   unsigned long srcoffset, dword_bytes, bytes_extra;
+   unsigned short blt_mode;
+
+   size = (((unsigned long)width) << 16) | 1;
+
+   /* CALCULATE STARTING OFFSETS */
+
+   offset = (unsigned long)srcy *pitch + ((unsigned long)srcx << gu2_xshift);
+
+   dstoffset |= gu2_pattern_origin;
+
+   bytes = width << gu2_xshift;
+   dword_bytes = bytes & ~0x3L;
+   bytes_extra = bytes & 0x3L;
+
+   /* POLL UNTIL ABLE TO WRITE TO THE REGISTERS */
+   /* Put off poll for as long as possible (do most calculations first).   */
+   /* The source offset is always 0 since we allow misaligned dword reads. */
+   /* We must wait for BLT busy because the GP may be executing a screen   */
+   /* to screen BLT from the scratchpad area.                              */
+
+   GU2_WAIT_BUSY;
+
+   if (gu2_alpha_active) {
+      blt_mode = gu2_alpha_blt_mode;
+
+      WRITE_GP32(MGP_RASTER_MODE, gu2_alpha32);
+   } else {
+      blt_mode = gu2_blt_mode;
+
+      WRITE_GP32(MGP_RASTER_MODE, gu2_rop32);
+   }
+   blt_mode |= MGP_BM_SRC_FB | gu2_bm_throttle;
+   gu2_bm_throttle = 0;
+   gu2_vm_throttle = 0;
+
+   WRITE_GP32(MGP_WID_HEIGHT, size);
+
+   /* WRITE DATA ONE LINE AT A TIME */
+   /* For speed reasons, data is written to an offscreen scratch area and then        */
+   /* BLTed using a screen to screen BLT. This is similar to the GX1 BLT buffers, but */
+   /* slightly more efficient in that we can queue up data while the GP is rendering  */
+   /* a line.                                                                         */
+
+   while (height--) {
+      temp_offset = offset;
+      srcoffset = gfx_gx2_scratch_base;
+      if (gu2_current_line)
+	 srcoffset += 8192;
+
+      GU2_WAIT_PENDING;
+      WRITE_GP32(MGP_SRC_OFFSET, srcoffset);
+      WRITE_GP32(MGP_DST_OFFSET, dstoffset);
+      dstoffset += gu2_dst_pitch;
+      dstoffset += 0x20000000;
+
+      WRITE_FRAME_BUFFER_STRING32(srcoffset, dword_bytes, data, temp_offset);
+      if (bytes_extra) {
+	 temp_offset += dword_bytes;
+	 srcoffset += dword_bytes;
+	 WRITE_FRAME_BUFFER_STRING8(srcoffset, bytes_extra, data,
+				    temp_offset);
+      }
+      WRITE_GP16(MGP_BLT_MODE, blt_mode);
+      offset += pitch;
+      gu2_current_line = 1 - gu2_current_line;
+   }
+}
+
+/*---------------------------------------------------------------------------
+ * GFX2_TEXT_BLT	
+ *
+ * This routine is similar to the gfx2_mono_bitmap_to_screen_blt routine 
+ * but assumes that source data is byte-packed.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_2DACCEL_DYNAMIC
+void
+gu22_text_blt(unsigned long dstoffset, unsigned short width,
+	      unsigned short height, unsigned char *data)
+#else
+void
+gfx2_text_blt(unsigned long dstoffset, unsigned short width,
+	      unsigned short height, unsigned char *data)
+#endif
+{
+   unsigned long size, bytes;
+   unsigned long temp1 = 0, temp2 = 0, temp_offset = 0;
+   unsigned long i, j = 0, fifo_lines, dwords_extra, bytes_extra;
+   unsigned long shift;
+   unsigned short blt_mode;
+
+   size = (((unsigned long)width) << 16) | height;
+
+   /* CALCULATE STARTING OFFSETS */
+
+   bytes = ((width + 7) >> 3) * height;
+   fifo_lines = bytes >> 5;
+   dwords_extra = (bytes & 0x0000001Cl) >> 2;
+   bytes_extra = bytes & 0x00000003l;
+
+   /* POLL UNTIL ABLE TO WRITE TO THE REGISTERS */
+
+   GU2_WAIT_PENDING;
+
+   if (gu2_alpha_active) {
+      blt_mode = gu2_alpha_blt_mode;
+
+      WRITE_GP32(MGP_RASTER_MODE, gu2_alpha32);
+   } else {
+      blt_mode = gu2_blt_mode;
+
+      WRITE_GP32(MGP_RASTER_MODE, gu2_rop32);
+   }
+
+   WRITE_GP32(MGP_SRC_OFFSET, 0);
+   WRITE_GP32(MGP_DST_OFFSET, dstoffset | gu2_pattern_origin);
+   WRITE_GP32(MGP_WID_HEIGHT, size);
+   WRITE_GP32(MGP_STRIDE, gu2_dst_pitch);
+   WRITE_GP16(MGP_BLT_MODE, blt_mode | MGP_BM_SRC_HOST |
+	      MGP_BM_SRC_BP_MONO | gu2_bm_throttle);
+   gu2_bm_throttle = 0;
+   gu2_vm_throttle = 0;
+
+   /* WAIT FOR BLT TO BE LATCHED */
+
+   GU2_WAIT_PENDING;
+
+   /* WRITE ALL FULL FIFO LINES */
+
+   for (i = 0; i < fifo_lines; i++) {
+      GU2_WAIT_HALF_EMPTY;
+      WRITE_GPREG_STRING32(MGP_HST_SOURCE, 8, j, data, temp_offset, temp1);
+      temp_offset += 32;
+   }
+
+   /* WRITE ALL FULL DWORDS */
+
+   if (dwords_extra || bytes_extra) {
+      GU2_WAIT_HALF_EMPTY;
+      if (dwords_extra) {
+	 WRITE_GPREG_STRING32(MGP_HST_SOURCE, dwords_extra, i, data,
+			      temp_offset, temp1);
+	 temp_offset += (dwords_extra << 2);
+      }
+      if (bytes_extra) {
+	 shift = 0;
+	 WRITE_GPREG_STRING8(MGP_HST_SOURCE, bytes_extra, shift, i, data,
+			     temp_offset, temp1, temp2);
+      }
+   }
+}
+
+/*---------------------------------------------------------------------------
+ * GFX2_MONO_BITMAP_TO_SCREEN_BLT	
+ *
+ * This routine is similar to the gfx_mono_bitmap_to_screen_blt routine 
+ * but allows the use of an arbitrary destination stride and alpha blending.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_2DACCEL_DYNAMIC
+void
+gu22_mono_bitmap_to_screen_blt(unsigned short srcx, unsigned short srcy,
+			       unsigned long dstoffset, unsigned short width,
+			       unsigned short height, unsigned char *data,
+			       short pitch)
+#else
+void
+gfx2_mono_bitmap_to_screen_blt(unsigned short srcx, unsigned short srcy,
+			       unsigned long dstoffset, unsigned short width,
+			       unsigned short height, unsigned char *data,
+			       short pitch)
+#endif
+{
+   unsigned long size, bytes;
+   unsigned long offset, temp_offset, temp1 = 0, temp2 = 0;
+   unsigned long i, j = 0, fifo_lines, dwords_extra, bytes_extra;
+   unsigned long shift = 0;
+   unsigned short blt_mode;
+
+   size = (((unsigned long)width) << 16) | height;
+
+   /* CALCULATE STARTING OFFSETS */
+
+   offset = (unsigned long)srcy *pitch + ((unsigned long)srcx >> 3);
+
+   bytes = ((srcx & 7) + width + 7) >> 3;
+   fifo_lines = bytes >> 5;
+   dwords_extra = (bytes & 0x0000001Cl) >> 2;
+   bytes_extra = bytes & 0x00000003l;
+
+   /* POLL UNTIL ABLE TO WRITE TO THE REGISTERS */
+
+   GU2_WAIT_PENDING;
+
+   if (gu2_alpha_active) {
+      blt_mode = gu2_alpha_blt_mode;
+
+      WRITE_GP32(MGP_RASTER_MODE, gu2_alpha32);
+   } else {
+      blt_mode = gu2_blt_mode;
+
+      WRITE_GP32(MGP_RASTER_MODE, gu2_rop32);
+   }
+
+   WRITE_GP32(MGP_SRC_OFFSET, ((unsigned long)srcx & 7) << 26);
+   WRITE_GP32(MGP_DST_OFFSET, dstoffset | gu2_pattern_origin);
+   WRITE_GP32(MGP_WID_HEIGHT, size);
+   WRITE_GP32(MGP_STRIDE, gu2_dst_pitch);
+   WRITE_GP16(MGP_BLT_MODE, blt_mode | MGP_BM_SRC_HOST |
+	      MGP_BM_SRC_MONO | gu2_bm_throttle);
+   gu2_bm_throttle = 0;
+   gu2_vm_throttle = 0;
+
+   /* WAIT FOR BLT TO BE LATCHED */
+
+   GU2_WAIT_PENDING;
+
+   /* WRITE ALL OF THE DATA TO THE HOST SOURCE REGISTER */
+
+   while (height--) {
+      temp_offset = offset;
+
+      /* WRITE ALL FULL FIFO LINES */
+
+      for (i = 0; i < fifo_lines; i++) {
+	 GU2_WAIT_HALF_EMPTY;
+	 WRITE_GPREG_STRING32(MGP_HST_SOURCE, 8, j, data, temp_offset, temp1);
+	 temp_offset += 32;
+      }
+
+      /* WRITE ALL FULL DWORDS */
+
+      GU2_WAIT_HALF_EMPTY;
+      if (dwords_extra)
+	 WRITE_GPREG_STRING32(MGP_HST_SOURCE, dwords_extra, i, data,
+			      temp_offset, temp1);
+      temp_offset += (dwords_extra << 2);
+
+      /* WRITE REMAINING BYTES */
+
+      shift = 0;
+      if (bytes_extra)
+	 WRITE_GPREG_STRING8(MGP_HST_SOURCE, bytes_extra, shift, i, data,
+			     temp_offset, temp1, temp2);
+
+      offset += pitch;
+   }
+}
+
+/*---------------------------------------------------------------------------
+ * GFX2_BRESENHAM_LINE
+ *
+ * This routine is similar to the gfx_bresenam_line routine but allows 
+ * the use of an arbitrary destination stride.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_2DACCEL_DYNAMIC
+void
+gu22_bresenham_line(unsigned long dstoffset,
+		    unsigned short length, unsigned short initerr,
+		    unsigned short axialerr, unsigned short diagerr,
+		    unsigned short flags)
+#else
+void
+gfx2_bresenham_line(unsigned long dstoffset,
+		    unsigned short length, unsigned short initerr,
+		    unsigned short axialerr, unsigned short diagerr,
+		    unsigned short flags)
+#endif
+{
+   unsigned long vector_mode = gu2_vector_mode | flags;
+   unsigned long data1 = (((unsigned long)axialerr) << 16) | diagerr;
+   unsigned long data2 = (((unsigned long)length) << 16) | initerr;
+
+   /* CHECK NULL LENGTH */
+
+   if (!length)
+      return;
+
+   /* POLL UNTIL ABLE TO WRITE TO THE REGISTERS */
+   /* Put off poll for as long as possible (do most calculations first). */
+
+   GU2_WAIT_PENDING;
+
+   if (gu2_alpha_active) {
+      vector_mode = gu2_alpha_vec_mode | flags;
+
+      WRITE_GP32(MGP_RASTER_MODE, gu2_alpha32);
+   } else
+      WRITE_GP32(MGP_RASTER_MODE, gu2_rop32);
+
+   WRITE_GP32(MGP_DST_OFFSET, dstoffset | gu2_pattern_origin);
+   WRITE_GP32(MGP_VEC_ERR, data1);
+   WRITE_GP32(MGP_VEC_LEN, data2);
+   WRITE_GP32(MGP_STRIDE, gu2_dst_pitch);
+   WRITE_GP32(MGP_VECTOR_MODE, vector_mode | gu2_vm_throttle);
+   gu2_bm_throttle = 0;
+   gu2_vm_throttle = 0;
+}
+
+/*---------------------------------------------------------------------------
+ * GFX2_SYNC_TO_VBLANK
+ *
+ * This routine sets a flag to synchronize the next rendering routine to 
+ * VBLANK.  The flag is cleared by the rendering routine.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_2DACCEL_DYNAMIC
+void
+gu22_sync_to_vblank(void)
+#else
+void
+gfx2_sync_to_vblank(void)
+#endif
+{
+   /* SET FLAGS TO THROTTLE NEXT RENDERING ROUTINE */
+
+   gu2_bm_throttle = MGP_BM_THROTTLE;
+   gu2_vm_throttle = MGP_VM_THROTTLE;
+}
+
+/* END OF FILE */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/saa7114.c b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/saa7114.c
new file mode 100644
index 000000000..885e65f5b
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/saa7114.c
@@ -0,0 +1,1050 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/saa7114.c,v 1.1 2002/12/10 15:12:27 alanh Exp $ */
+/*
+ * $Workfile: saa7114.c $
+ *
+ * This file contains routines to control the Philips SAA7114 video decoder.
+ *
+ * NSC_LIC_ALTERNATIVE_PREAMBLE
+ *
+ * Revision 1.0
+ *
+ * National Semiconductor Alternative GPL-BSD License
+ *
+ * National Semiconductor Corporation licenses this software 
+ * ("Software"):
+ *
+ *      Durango
+ *
+ * under one of the two following licenses, depending on how the 
+ * Software is received by the Licensee.
+ * 
+ * If this Software is received as part of the Linux Framebuffer or
+ * other GPL licensed software, then the GPL license designated 
+ * NSC_LIC_GPL applies to this Software; in all other circumstances 
+ * then the BSD-style license designated NSC_LIC_BSD shall apply.
+ *
+ * END_NSC_LIC_ALTERNATIVE_PREAMBLE */
+
+/* NSC_LIC_BSD
+ *
+ * National Semiconductor Corporation Open Source License for Durango
+ *
+ * (BSD License with Export Notice)
+ *
+ * Copyright (c) 1999-2001
+ * National Semiconductor Corporation.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met: 
+ *
+ *   * Redistributions of source code must retain the above copyright 
+ *     notice, this list of conditions and the following disclaimer. 
+ *
+ *   * Redistributions in binary form must reproduce the above 
+ *     copyright notice, this list of conditions and the following 
+ *     disclaimer in the documentation and/or other materials provided 
+ *     with the distribution. 
+ *
+ *   * Neither the name of the National Semiconductor Corporation nor 
+ *     the names of its contributors may be used to endorse or promote 
+ *     products derived from this software without specific prior 
+ *     written permission. 
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+ * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE,
+ * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE.
+ *
+ * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
+ * YOUR JURISDICTION. It is licensee's responsibility to comply with 
+ * any export regulations applicable in licensee's jurisdiction. Under 
+ * CURRENT (2001) U.S. export regulations this software 
+ * is eligible for export from the U.S. and can be downloaded by or 
+ * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
+ * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
+ * Syria, Sudan, Afghanistan and any other country to which the U.S. 
+ * has embargoed goods and services. 
+ *
+ * END_NSC_LIC_BSD */
+
+/* NSC_LIC_GPL
+ *
+ * National Semiconductor Corporation Gnu General Public License for Durango
+ *
+ * (GPL License with Export Notice)
+ *
+ * Copyright (c) 1999-2001
+ * National Semiconductor Corporation.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted under the terms of the GNU General 
+ * Public License as published by the Free Software Foundation; either 
+ * version 2 of the License, or (at your option) any later version  
+ *
+ * In addition to the terms of the GNU General Public License, neither 
+ * the name of the National Semiconductor Corporation nor the names of 
+ * its contributors may be used to endorse or promote products derived 
+ * from this software without specific prior written permission. 
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+ * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, 
+ * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE. See the GNU General Public License for more details. 
+ *
+ * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
+ * YOUR JURISDICTION. It is licensee's responsibility to comply with 
+ * any export regulations applicable in licensee's jurisdiction. Under 
+ * CURRENT (2001) U.S. export regulations this software 
+ * is eligible for export from the U.S. and can be downloaded by or 
+ * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
+ * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
+ * Syria, Sudan, Afghanistan and any other country to which the U.S. 
+ * has embargoed goods and services. 
+ *
+ * You should have received a copy of the GNU General Public License 
+ * along with this file; if not, write to the Free Software Foundation, 
+ * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 
+ *
+ * END_NSC_LIC_GPL */
+
+/*---------------------------*/
+/*  TABLE OF DEFAULT VALUES  */
+/*---------------------------*/
+
+typedef struct tagGFX_SAA7114_INIT
+{
+   unsigned char index;
+   unsigned char value;
+}
+GFX_SAA7114_INIT;
+
+/* Task A is for VBI raw data and task B is for video */
+
+GFX_SAA7114_INIT gfx_saa7114_init_values[] = {
+   {0x01, 0x08}, {0x02, 0xC0}, {0x03, 0x00}, {0x04, 0x90},
+   {0x05, 0x90}, {0x06, 0xEB}, {0x07, 0xE0}, {0x08, 0x88},
+   {0x09, 0x40}, {0x0A, 0x80}, {0x0B, 0x44}, {0x0C, 0x40},
+   {0x0D, 0x00}, {0x0E, 0x89}, {0x0F, 0x2E}, {0x10, 0x0E},
+   {0x11, 0x00}, {0x12, 0x05}, {0x13, 0x00}, {0x14, 0x08},
+   {0x15, 0x11}, {0x16, 0xFE}, {0x17, 0x00}, {0x18, 0x40},
+   {0x19, 0x80}, {0x30, 0xBC}, {0x31, 0xDF}, {0x32, 0x02},
+   {0x34, 0xCD}, {0x35, 0xCC}, {0x36, 0x3A}, {0x38, 0x03},
+   {0x39, 0x10}, {0x3A, 0x00}, {0x40, 0x00}, {0x41, 0xFF},
+   {0x42, 0xFF}, {0x43, 0xFF}, {0x44, 0xFF}, {0x45, 0xFF},
+   {0x46, 0xFF}, {0x47, 0xFF}, {0x48, 0xFF}, {0x49, 0xFF},
+   {0x4A, 0xFF}, {0x4B, 0xFF}, {0x4C, 0xFF}, {0x4D, 0xFF},
+   {0x4E, 0xFF}, {0x4F, 0xFF}, {0x50, 0xFF}, {0x51, 0xFF},
+   {0x52, 0xFF}, {0x53, 0xFF}, {0x54, 0xFF}, {0x55, 0xFF},
+   {0x56, 0xFF}, {0x57, 0xFF}, {0x58, 0x00}, {0x59, 0x47},
+   {0x5A, 0x06}, {0x5B, 0x43}, {0x5D, 0x3E}, {0x5E, 0x00},
+   {0x80, 0x30}, {0x83, 0x00}, {0x84, 0x60}, {0x85, 0x00},
+   {0x86, 0xE5}, {0x87, 0x01}, {0x88, 0xF8},
+
+   /* VBI task */
+
+   {0x90, 0x01}, {0x91, 0xC8}, {0x92, 0x08}, {0x93, 0x84},
+   {0x94, 0x10}, {0x95, 0x00}, {0x96, 0xD0}, {0x97, 0x02},
+   {0x98, 0x05}, {0x99, 0x00}, {0x9A, 0x0B}, {0x9B, 0x00},
+   {0x9C, 0xA0}, {0x9D, 0x05}, {0x9E, 0x0B}, {0x9F, 0x00},
+   {0xA0, 0x01}, {0xA1, 0x00}, {0xA2, 0x00}, {0xA4, 0x80},
+   {0xA5, 0x40}, {0xA6, 0x40}, {0xA8, 0x00}, {0xA9, 0x02},
+   {0xAA, 0x00}, {0xAC, 0x00}, {0xAD, 0x01}, {0xAE, 0x00},
+   {0xB0, 0x00}, {0xB1, 0x04}, {0xB2, 0x00}, {0xB3, 0x04},
+   {0xB4, 0x00}, {0xB8, 0x00}, {0xB9, 0x00}, {0xBA, 0x00},
+   {0xBB, 0x00}, {0xBC, 0x00}, {0xBD, 0x00}, {0xBE, 0x00},
+   {0xBF, 0x00},
+
+   /* Video task */
+
+   {0xC0, 0x80}, {0xC1, 0x08}, {0xC2, 0x00}, {0xC3, 0x80},
+   {0xC4, 0x10}, {0xC5, 0x00}, {0xC6, 0xD0}, {0xC7, 0x02},
+   {0xC8, 0x11}, {0xC9, 0x00}, {0xCA, 0xF1}, {0xCB, 0x00},
+   {0xCC, 0xD0}, {0xCD, 0x02}, {0xCE, 0xF1}, {0xCF, 0x00},
+   {0xD0, 0x01}, {0xD1, 0x00}, {0xD2, 0x00}, {0xD4, 0x80},
+   {0xD5, 0x40}, {0xD6, 0x40}, {0xD8, 0x00}, {0xD9, 0x04},
+   {0xDA, 0x00}, {0xDC, 0x00}, {0xDD, 0x02}, {0xDE, 0x00},
+   {0xE0, 0x00}, {0xE1, 0x04}, {0xE2, 0x00}, {0xE3, 0x04},
+   {0xE4, 0x00}, {0xE8, 0x00}, {0xE9, 0x00}, {0xEA, 0x00},
+   {0xEB, 0x00}, {0xEC, 0x00}, {0xED, 0x00}, {0xEE, 0x00},
+   {0xEF, 0x00},
+};
+
+#define GFX_NUM_SAA7114_INIT_VALUES sizeof(gfx_saa7114_init_values)/sizeof(GFX_SAA7114_INIT)
+
+/*-----------------------------------------------------*/
+/*	  TABLE OF FIR PREFILTER RECOMMENDED VALUES        */
+/*-----------------------------------------------------*/
+
+int optimize_for_aliasing = 0;
+
+typedef struct tagGFX_SAA7114_FIR_PREFILTER
+{
+   unsigned char prescaler;
+   unsigned char acl_low;
+   unsigned char prefilter_low;
+   unsigned char acl_high;
+   unsigned char prefilter_high;
+}
+GFX_SAA7114_FIR_PREFILTER;
+
+GFX_SAA7114_FIR_PREFILTER gfx_saa7114_fir_values[] = {
+   {0x01, 0x00, 0x00, 0x00, 0x00}, {0x02, 0x02, 0x5A, 0x01, 0x51},
+   {0x03, 0x04, 0xAB, 0x03, 0xA2}, {0x04, 0x07, 0xA3, 0x04, 0xAB},
+   {0x05, 0x08, 0xAC, 0x07, 0xA3}, {0x06, 0x08, 0xFC, 0x07, 0xF3},
+   {0x07, 0x08, 0xFC, 0x07, 0xF3}, {0x08, 0x0F, 0xF4, 0x08, 0xFC},
+   {0x09, 0x0F, 0xF4, 0x08, 0xFC}, {0x0A, 0x10, 0xFD, 0x08, 0xFC},
+   {0x0B, 0x10, 0xFD, 0x08, 0xFC}, {0x0C, 0x10, 0xFD, 0x08, 0xFC},
+   {0x0D, 0x10, 0xFD, 0x10, 0xFD}, {0x0E, 0x10, 0xFD, 0x10, 0xFD},
+   {0x0F, 0x1F, 0xF5, 0x10, 0xFD}, {0x10, 0x20, 0xFE, 0x10, 0xFD},
+   {0x11, 0x20, 0xFE, 0x10, 0xFD}, {0x12, 0x20, 0xFE, 0x10, 0xFD},
+   {0x13, 0x20, 0xFE, 0x20, 0xFE}, {0x14, 0x20, 0xFE, 0x20, 0xFE},
+   {0x15, 0x20, 0xFE, 0x20, 0xFE}, {0x16, 0x20, 0xFE, 0x20, 0xFE},
+   {0x17, 0x20, 0xFE, 0x20, 0xFE}, {0x18, 0x20, 0xFE, 0x20, 0xFE},
+   {0x19, 0x20, 0xFE, 0x20, 0xFE}, {0x1A, 0x20, 0xFE, 0x20, 0xFE},
+   {0x1B, 0x20, 0xFE, 0x20, 0xFE}, {0x1C, 0x20, 0xFE, 0x20, 0xFE},
+   {0x1D, 0x20, 0xFE, 0x20, 0xFE}, {0x1E, 0x20, 0xFE, 0x20, 0xFE},
+   {0x1F, 0x20, 0xFE, 0x20, 0xFE}, {0x20, 0x3F, 0xFF, 0x20, 0xFE},
+   {0x21, 0x3F, 0xFF, 0x20, 0xFE}, {0x22, 0x3F, 0xFF, 0x20, 0xFE},
+   {0x23, 0x3F, 0xFF, 0x20, 0xFF}
+};
+
+int saa7114_set_decoder_defaults(void);
+int saa7114_set_decoder_analog_input(unsigned char input);
+int saa7114_set_decoder_brightness(unsigned char brightness);
+int saa7114_set_decoder_contrast(unsigned char contrast);
+int saa7114_set_decoder_hue(char hue);
+int saa7114_set_decoder_saturation(unsigned char saturation);
+int saa7114_set_decoder_input_offset(unsigned short x, unsigned short y);
+int saa7114_set_decoder_input_size(unsigned short width,
+				   unsigned short height);
+int saa7114_set_decoder_output_size(unsigned short width,
+				    unsigned short height);
+int saa7114_set_decoder_scale(unsigned short srcw, unsigned short srch,
+			      unsigned short dstw, unsigned short dsth);
+int saa7114_set_decoder_vbi_format(int start, int end, int format);
+int saa7114_set_decoder_vbi_enable(int enable);
+int saa7114_set_decoder_vbi_upscale(void);
+int saa7114_set_decoder_TV_standard(TVStandardType TVStandard);
+int saa7114_set_decoder_luminance_filter(unsigned char lufi);
+int saa7114_decoder_software_reset(void);
+int saa7114_decoder_detect_macrovision(void);
+int saa7114_decoder_detect_video(void);
+
+/* READ ROUTINES IN GFX_DCDR.C */
+
+unsigned char saa7114_get_decoder_brightness(void);
+unsigned char saa7114_get_decoder_contrast(void);
+char saa7114_get_decoder_hue(void);
+unsigned char saa7114_get_decoder_saturation(void);
+unsigned long saa7114_get_decoder_input_offset(void);
+unsigned long saa7114_get_decoder_input_size(void);
+unsigned long saa7114_get_decoder_output_size(void);
+int saa7114_get_decoder_vbi_format(int line);
+int saa7114_write_reg(unsigned char reg, unsigned char val);
+int saa7114_read_reg(unsigned char reg, unsigned char *val);
+
+int
+saa7114_write_reg(unsigned char reg, unsigned char val)
+{
+   return gfx_i2c_write(2, SAA7114_CHIPADDR, reg, 1, &val);
+}
+
+int
+saa7114_read_reg(unsigned char reg, unsigned char *val)
+{
+   return gfx_i2c_read(2, SAA7114_CHIPADDR, reg, 1, val);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_decoder_vbi_upscale
+ *
+ * This routine configures the video decoder task A to upscale raw VBI data
+ * horizontally to match a different system clock.
+ * The upscale is from 13.5 MHz (SAA7114) to 14.318 MHz (Bt835).
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DECODER_DYNAMIC
+int
+saa7114_set_decoder_vbi_upscale(void)
+#else
+int
+gfx_set_decoder_vbi_upscale(void)
+#endif
+{
+   /* Set horizontal output length to 1528 (720 * 2 * 14.318 / 13.5) */
+   saa7114_write_reg(SAA7114_TASK_A_HORZ_OUTPUT_LO, 0xF8);
+   saa7114_write_reg(SAA7114_TASK_A_HORZ_OUTPUT_HI, 0x05);
+
+   /* Set horizontal luminance scaling increment to 484 (1024 * 13.5 / 28.636) */
+   saa7114_write_reg(SAA7114_TASK_A_HSCALE_LUMA_LO, 0xE4);
+   saa7114_write_reg(SAA7114_TASK_A_HSCALE_LUMA_HI, 0x01);
+
+   /* Set horizontal chrominance scaling increment to 242 */
+   saa7114_write_reg(SAA7114_TASK_A_HSCALE_CHROMA_LO, 0xF2);
+   saa7114_write_reg(SAA7114_TASK_A_HSCALE_CHROMA_HI, 0x00);
+
+   return GFX_STATUS_OK;
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_decoder_software_reset
+ *
+ * This routine performs a software reset of the decoder.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DECODER_DYNAMIC
+int
+saa7114_decoder_software_reset(void)
+#else
+int
+gfx_decoder_software_reset(void)
+#endif
+{
+   saa7114_write_reg(0x88, 0xC0);
+   /* I2C-bus latency should be sufficient for resetting the internal state machine. */
+   /* gfx_delay_milliseconds(10); */
+   saa7114_write_reg(0x88, 0xF0);
+   return GFX_STATUS_OK;
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_decoder_detect_macrovision
+ *
+ * This routine detects if macrovision exists in the input of the video decoder.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DECODER_DYNAMIC
+int
+saa7114_decoder_detect_macrovision(void)
+#else
+int
+gfx_decoder_detect_macrovision(void)
+#endif
+{
+   unsigned char macrovision = 0xff;
+
+   saa7114_read_reg(SAA7114_STATUS, &macrovision);
+   return ((macrovision & 0x02) >> 1);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_decoder_detect_video
+ *
+ * This routine detects if video exists in the input of the video decoder.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DECODER_DYNAMIC
+int
+saa7114_decoder_detect_video(void)
+#else
+int
+gfx_decoder_detect_video(void)
+#endif
+{
+   unsigned char video = 0xff;
+
+   saa7114_read_reg(SAA7114_STATUS, &video);
+   return !((video & 0x40) >> 6);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_decoder_defaults
+ *
+ * This routine is called to set the initial register values of the 
+ * video decoder.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DECODER_DYNAMIC
+int
+saa7114_set_decoder_defaults(void)
+#else
+int
+gfx_set_decoder_defaults(void)
+#endif
+{
+   unsigned int i;
+
+   /* LOOP THROUGH INDEX/DATA PAIRS IN THE TABLE */
+
+   for (i = 0; i < GFX_NUM_SAA7114_INIT_VALUES; i++) {
+      saa7114_write_reg(gfx_saa7114_init_values[i].index,
+			gfx_saa7114_init_values[i].value);
+   }
+
+   gfx_decoder_software_reset();
+   return (0);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_decoder_analog_input
+ *
+ * This routine sets the analog input of the video decoder. 
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DECODER_DYNAMIC
+int
+saa7114_set_decoder_analog_input(unsigned char input)
+#else
+int
+gfx_set_decoder_analog_input(unsigned char input)
+#endif
+{
+   saa7114_write_reg(SAA7114_ANALOG_INPUT_CTRL1, input);
+   return (0);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_decoder_brightness
+ *
+ * This routine sets the brightness of the video decoder. 
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DECODER_DYNAMIC
+int
+saa7114_set_decoder_brightness(unsigned char brightness)
+#else
+int
+gfx_set_decoder_brightness(unsigned char brightness)
+#endif
+{
+   saa7114_write_reg(SAA7114_BRIGHTNESS, brightness);
+   return (0);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_decoder_contrast
+ *
+ * This routine sets the contrast of the video decoder. 
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DECODER_DYNAMIC
+int
+saa7114_set_decoder_contrast(unsigned char contrast)
+#else
+int
+gfx_set_decoder_contrast(unsigned char contrast)
+#endif
+{
+   saa7114_write_reg(SAA7114_CONTRAST, (unsigned char)(contrast >> 1));
+   return (0);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_decoder_hue
+ *
+ * This routine sets the hue control of the video decoder. 
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DECODER_DYNAMIC
+int
+saa7114_set_decoder_hue(char hue)
+#else
+int
+gfx_set_decoder_hue(char hue)
+#endif
+{
+   saa7114_write_reg(SAA7114_HUE, (unsigned char)hue);
+   return (0);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_decoder_saturation
+ *
+ * This routine sets the saturation adjustment of the video decoder. 
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DECODER_DYNAMIC
+int
+saa7114_set_decoder_saturation(unsigned char saturation)
+#else
+int
+gfx_set_decoder_saturation(unsigned char saturation)
+#endif
+{
+   saa7114_write_reg(SAA7114_SATURATION, (unsigned char)(saturation >> 1));
+   return (0);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_decoder_input_offset
+ *
+ * This routine sets the size of the decoder input window.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DECODER_DYNAMIC
+int
+saa7114_set_decoder_input_offset(unsigned short x, unsigned short y)
+#else
+int
+gfx_set_decoder_input_offset(unsigned short x, unsigned short y)
+#endif
+{
+   /* SET THE INPUT WINDOW OFFSET */
+
+   saa7114_write_reg(SAA7114_HORZ_OFFSET_LO, (unsigned char)(x & 0x00FF));
+   saa7114_write_reg(SAA7114_HORZ_OFFSET_HI, (unsigned char)(x >> 8));
+   saa7114_write_reg(SAA7114_VERT_OFFSET_LO, (unsigned char)(y & 0x00FF));
+   saa7114_write_reg(SAA7114_VERT_OFFSET_HI, (unsigned char)(y >> 8));
+
+   gfx_decoder_software_reset();
+   return (0);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_decoder_input_size
+ *
+ * This routine sets the size of the decoder input window.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DECODER_DYNAMIC
+int
+saa7114_set_decoder_input_size(unsigned short width, unsigned short height)
+#else
+int
+gfx_set_decoder_input_size(unsigned short width, unsigned short height)
+#endif
+{
+   /* DIVIDE HEIGHT BY TWO FOR INTERLACING */
+
+   height = (height + 1) >> 1;
+
+   /* SET THE INPUT WINDOW SIZE */
+
+   saa7114_write_reg(SAA7114_HORZ_INPUT_LO, (unsigned char)(width & 0x00FF));
+   saa7114_write_reg(SAA7114_HORZ_INPUT_HI, (unsigned char)(width >> 8));
+   saa7114_write_reg(SAA7114_VERT_INPUT_LO, (unsigned char)(height & 0x00FF));
+   saa7114_write_reg(SAA7114_VERT_INPUT_HI, (unsigned char)(height >> 8));
+
+   gfx_decoder_software_reset();
+   return (0);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_decoder_output_size
+ *
+ * This routine sets the size of the decoder output window.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DECODER_DYNAMIC
+int
+saa7114_set_decoder_output_size(unsigned short width, unsigned short height)
+#else
+int
+gfx_set_decoder_output_size(unsigned short width, unsigned short height)
+#endif
+{
+   /* ROUND WIDTH UP TO EVEN NUMBER TO PREVENT DECODER BECOMING STUCK */
+
+   width = ((width + 1) >> 1) << 1;
+
+   /* DIVIDE HEIGHT BY TWO FOR INTERLACING */
+
+   height = (height + 1) >> 1;
+
+   /* SET THE OUTPUT WINDOW SIZE */
+
+   saa7114_write_reg(SAA7114_HORZ_OUTPUT_LO, (unsigned char)(width & 0x00FF));
+   saa7114_write_reg(SAA7114_HORZ_OUTPUT_HI, (unsigned char)(width >> 8));
+   saa7114_write_reg(SAA7114_VERT_OUTPUT_LO,
+		     (unsigned char)(height & 0x00FF));
+   saa7114_write_reg(SAA7114_VERT_OUTPUT_HI, (unsigned char)(height >> 8));
+
+   gfx_decoder_software_reset();
+   return (0);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_decoder_scale
+ *
+ * This routine sets the scaling of the video decoder.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DECODER_DYNAMIC
+int
+saa7114_set_decoder_scale(unsigned short srcw, unsigned short srch,
+			  unsigned short dstw, unsigned short dsth)
+#else
+int
+gfx_set_decoder_scale(unsigned short srcw, unsigned short srch,
+		      unsigned short dstw, unsigned short dsth)
+#endif
+{
+   unsigned char prescale = 0;
+   int scale = 0;
+
+   /* SET THE HORIZONTAL PRESCALE */
+   /* Downscale from 1 to 1/63 source size. */
+
+   if (dstw)
+      prescale = (unsigned char)(srcw / dstw);
+   if (!prescale)
+      prescale = 1;
+   if (prescale > 63)
+      return (1);
+   saa7114_write_reg(SAA7114_HORZ_PRESCALER, prescale);
+
+   /* USE FIR PREFILTER FUNCTIONALITY (OPTIMISATION) */
+
+   if (prescale < 36) {
+      if (optimize_for_aliasing) {
+	 saa7114_write_reg(SAA7114_HORZ_ACL,
+			   gfx_saa7114_fir_values[prescale - 1].acl_low);
+	 saa7114_write_reg(SAA7114_HORZ_FIR_PREFILTER,
+			   gfx_saa7114_fir_values[prescale -
+						  1].prefilter_low);
+      } else {
+	 saa7114_write_reg(SAA7114_HORZ_ACL,
+			   gfx_saa7114_fir_values[prescale - 1].acl_high);
+	 saa7114_write_reg(SAA7114_HORZ_FIR_PREFILTER,
+			   gfx_saa7114_fir_values[prescale -
+						  1].prefilter_high);
+      }
+   } else {
+      /* SAME SETTINGS FOR RATIO 1/35 DOWNTO 1/63 */
+      if (optimize_for_aliasing) {
+	 saa7114_write_reg(SAA7114_HORZ_ACL,
+			   gfx_saa7114_fir_values[34].acl_low);
+	 saa7114_write_reg(SAA7114_HORZ_FIR_PREFILTER,
+			   gfx_saa7114_fir_values[34].prefilter_low);
+      } else {
+	 saa7114_write_reg(SAA7114_HORZ_ACL,
+			   gfx_saa7114_fir_values[34].acl_high);
+	 saa7114_write_reg(SAA7114_HORZ_FIR_PREFILTER,
+			   gfx_saa7114_fir_values[34].prefilter_high);
+      }
+   }
+
+   /* SET THE HORIZONTAL SCALING */
+
+   if (!dstw)
+      return (1);
+   scale = ((1024 * srcw * 1000) / (dstw * prescale)) / 1000;
+   if ((scale > 8191) || (scale < 300))
+      return (1);
+   saa7114_write_reg(SAA7114_HSCALE_LUMA_LO, (unsigned char)(scale & 0x00FF));
+   saa7114_write_reg(SAA7114_HSCALE_LUMA_HI, (unsigned char)(scale >> 8));
+   scale >>= 1;
+   saa7114_write_reg(SAA7114_HSCALE_CHROMA_LO,
+		     (unsigned char)(scale & 0x00FF));
+   saa7114_write_reg(SAA7114_HSCALE_CHROMA_HI, (unsigned char)(scale >> 8));
+
+   /* SET THE VERTICAL SCALING (INTERPOLATION MODE) */
+
+   if (!dsth)
+      return (1);
+
+   /* ROUND DESTINATION HEIGHT UP TO EVEN NUMBER TO PREVENT DECODER BECOMING STUCK */
+
+   dsth = ((dsth + 1) >> 1) << 1;
+
+   scale = (int)((1024 * srch) / dsth);
+   saa7114_write_reg(SAA7114_VSCALE_LUMA_LO, (unsigned char)(scale & 0x00FF));
+   saa7114_write_reg(SAA7114_VSCALE_LUMA_HI, (unsigned char)(scale >> 8));
+   saa7114_write_reg(SAA7114_VSCALE_CHROMA_LO,
+		     (unsigned char)(scale & 0x00FF));
+   saa7114_write_reg(SAA7114_VSCALE_CHROMA_HI, (unsigned char)(scale >> 8));
+
+   if (dsth >= (srch >> 1)) {
+      /* USE INTERPOLATION MODE FOR SCALE FACTOR ABOVE 0.5 */
+
+      saa7114_write_reg(SAA7114_VSCALE_CONTROL, 0x00);
+
+      /* SET VERTICAL PHASE REGISTER FOR CORRECT SCALED INTERLACED OUTPUT (OPTIMISATION) */
+      /* THE OPTIMISATION IS BASED ON OFIDC = 0 (REG 90h[6] = 0 ) */
+      saa7114_write_reg(SAA7114_VSCALE_CHROMA_OFFS0, SAA7114_VSCALE_PHO);
+      saa7114_write_reg(SAA7114_VSCALE_CHROMA_OFFS1, SAA7114_VSCALE_PHO);
+      saa7114_write_reg(SAA7114_VSCALE_CHROMA_OFFS2,
+			(unsigned char)(SAA7114_VSCALE_PHO + scale / 64 -
+					16));
+      saa7114_write_reg(SAA7114_VSCALE_CHROMA_OFFS3,
+			(unsigned char)(SAA7114_VSCALE_PHO + scale / 64 -
+					16));
+
+      saa7114_write_reg(SAA7114_VSCALE_LUMINA_OFFS0, SAA7114_VSCALE_PHO);
+      saa7114_write_reg(SAA7114_VSCALE_LUMINA_OFFS1, SAA7114_VSCALE_PHO);
+      saa7114_write_reg(SAA7114_VSCALE_LUMINA_OFFS2,
+			(unsigned char)(SAA7114_VSCALE_PHO + scale / 64 -
+					16));
+      saa7114_write_reg(SAA7114_VSCALE_LUMINA_OFFS3,
+			(unsigned char)(SAA7114_VSCALE_PHO + scale / 64 -
+					16));
+
+      /* RESTORE CONTRAST AND SATURATION FOR INTERPOLATION MODE */
+
+      saa7114_write_reg(SAA7114_FILTER_CONTRAST, (unsigned char)0x40);
+      saa7114_write_reg(SAA7114_FILTER_SATURATION, (unsigned char)0x40);
+   } else {
+      /* USE ACCUMULATION MODE FOR DOWNSCALING BY MORE THAN 2x */
+
+      saa7114_write_reg(SAA7114_VSCALE_CONTROL, 0x01);
+
+      /* SET VERTICAL PHASE OFFSETS OFF (OPTIMISATION) */
+      saa7114_write_reg(SAA7114_VSCALE_CHROMA_OFFS0, 0x00);
+      saa7114_write_reg(SAA7114_VSCALE_CHROMA_OFFS1, 0x00);
+      saa7114_write_reg(SAA7114_VSCALE_CHROMA_OFFS2, 0x00);
+      saa7114_write_reg(SAA7114_VSCALE_CHROMA_OFFS3, 0x00);
+
+      saa7114_write_reg(SAA7114_VSCALE_LUMINA_OFFS0, 0x00);
+      saa7114_write_reg(SAA7114_VSCALE_LUMINA_OFFS1, 0x00);
+      saa7114_write_reg(SAA7114_VSCALE_LUMINA_OFFS2, 0x00);
+      saa7114_write_reg(SAA7114_VSCALE_LUMINA_OFFS3, 0x00);
+
+      /* ADJUST CONTRAST AND SATURATION FOR ACCUMULATION MODE */
+
+      if (srch)
+	 scale = (64 * dsth) / srch;
+      saa7114_write_reg(SAA7114_FILTER_CONTRAST, (unsigned char)scale);
+      saa7114_write_reg(SAA7114_FILTER_SATURATION, (unsigned char)scale);
+   }
+
+   gfx_decoder_software_reset();
+   return (0);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_decoder_vbi_format
+ *
+ * This routine programs the decoder to produce the specified format of VBI
+ * data for the specified lines.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DECODER_DYNAMIC
+int
+saa7114_set_decoder_vbi_format(int start, int end, int format)
+#else
+int
+gfx_set_decoder_vbi_format(int start, int end, int format)
+#endif
+{
+   int i;
+   unsigned char data;
+
+   for (i = start; i <= end; i++) {
+      switch (format) {
+      case VBI_FORMAT_VIDEO:
+	 data = 0xFF;
+	 break;				/* Active video */
+      case VBI_FORMAT_RAW:
+	 data = 0x77;
+	 break;				/* Raw VBI data */
+      case VBI_FORMAT_CC:
+	 data = 0x55;
+	 break;				/* US CC        */
+      case VBI_FORMAT_NABTS:
+	 data = 0xCC;
+	 break;				/* US NABTS     */
+      default:
+	 return GFX_STATUS_BAD_PARAMETER;
+      }
+      saa7114_write_reg((unsigned char)(0x3F + i), data);
+   }
+   return GFX_STATUS_OK;
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_decoder_vbi_enable
+ *
+ * This routine enables or disables VBI transfer in the decoder.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DECODER_DYNAMIC
+int
+saa7114_set_decoder_vbi_enable(int enable)
+#else
+int
+gfx_set_decoder_vbi_enable(int enable)
+#endif
+{
+   unsigned char data;
+
+   saa7114_read_reg(SAA7114_IPORT_CONTROL, &data);
+   if (enable)
+      data |= 0x80;
+   else
+      data &= ~0x80;
+   saa7114_write_reg(SAA7114_IPORT_CONTROL, data);
+   return GFX_STATUS_OK;
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_decoder_TV_standard
+ *
+ * This routine configures the decoder for the required TV standard.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DECODER_DYNAMIC
+int
+saa7114_set_decoder_TV_standard(TVStandardType TVStandard)
+#else
+int
+gfx_set_decoder_TV_standard(TVStandardType TVStandard)
+#endif
+{
+   switch (TVStandard) {
+   case TV_STANDARD_NTSC:
+      saa7114_write_reg(0x0E, 0x89);
+      saa7114_write_reg(0x5A, 0x06);
+      break;
+   case TV_STANDARD_PAL:
+      saa7114_write_reg(0x0E, 0x81);
+      saa7114_write_reg(0x5A, 0x03);
+      break;
+   default:
+      return GFX_STATUS_BAD_PARAMETER;
+   }
+   gfx_decoder_software_reset();
+   return GFX_STATUS_OK;
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_decoder_luminance_filter
+ *
+ * This routine sets the hue control of the video decoder. 
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DECODER_DYNAMIC
+int
+saa7114_set_decoder_luminance_filter(unsigned char lufi)
+#else
+int
+gfx_set_decoder_luminance_filter(unsigned char lufi)
+#endif
+{
+   unsigned char data;
+
+   saa7114_read_reg(SAA7114_LUMINANCE_CONTROL, &data);
+   saa7114_write_reg(SAA7114_LUMINANCE_CONTROL,
+		     (unsigned char)((data & ~0x0F) | (lufi & 0x0F)));
+   return (0);
+}
+
+/*************************************************************/
+/*  READ ROUTINES  |  INCLUDED FOR DIAGNOSTIC PURPOSES ONLY  */
+/*************************************************************/
+
+#if GFX_READ_ROUTINES
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_decoder_brightness
+ *
+ * This routine returns the current brightness of the video decoder.  
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DECODER_DYNAMIC
+unsigned char
+saa7114_get_decoder_brightness(void)
+#else
+unsigned char
+gfx_get_decoder_brightness(void)
+#endif
+{
+   unsigned char brightness = 0;
+
+   saa7114_read_reg(SAA7114_BRIGHTNESS, &brightness);
+   return (brightness);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_decoder_contrast
+ *
+ * This routine returns the current contrast of the video decoder.  
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DECODER_DYNAMIC
+unsigned char
+saa7114_get_decoder_contrast(void)
+#else
+unsigned char
+gfx_get_decoder_contrast(void)
+#endif
+{
+   unsigned char contrast = 0;
+
+   saa7114_read_reg(SAA7114_CONTRAST, &contrast);
+   contrast <<= 1;
+   return (contrast);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_decoder_hue
+ *
+ * This routine returns the current hue of the video decoder.  
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DECODER_DYNAMIC
+char
+saa7114_get_decoder_hue(void)
+#else
+char
+gfx_get_decoder_hue(void)
+#endif
+{
+   unsigned char hue = 0;
+
+   saa7114_read_reg(SAA7114_HUE, &hue);
+   return ((char)hue);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_decoder_saturation
+ *
+ * This routine returns the current saturation of the video decoder.  
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DECODER_DYNAMIC
+unsigned char
+saa7114_get_decoder_saturation(void)
+#else
+unsigned char
+gfx_get_decoder_saturation(void)
+#endif
+{
+   unsigned char saturation = 0;
+
+   saa7114_read_reg(SAA7114_SATURATION, &saturation);
+   saturation <<= 1;
+   return (saturation);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_decoder_input_offset
+ *
+ * This routine returns the offset into the input window.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DECODER_DYNAMIC
+unsigned long
+saa7114_get_decoder_input_offset(void)
+#else
+unsigned long
+gfx_get_decoder_input_offset(void)
+#endif
+{
+   unsigned long value = 0;
+   unsigned char data;
+
+   saa7114_read_reg(SAA7114_HORZ_OFFSET_LO, &data);
+   value = (unsigned long)data;
+   saa7114_read_reg(SAA7114_HORZ_OFFSET_HI, &data);
+   value |= ((unsigned long)data) << 8;
+   saa7114_read_reg(SAA7114_VERT_OFFSET_LO, &data);
+   value |= ((unsigned long)data) << 16;
+   saa7114_read_reg(SAA7114_VERT_OFFSET_HI, &data);
+   value |= ((unsigned long)data) << 24;
+   return (value);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_decoder_input_size
+ *
+ * This routine returns the current size of the input window
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DECODER_DYNAMIC
+unsigned long
+saa7114_get_decoder_input_size(void)
+#else
+unsigned long
+gfx_get_decoder_input_size(void)
+#endif
+{
+   unsigned long value = 0;
+   unsigned char data;
+
+   saa7114_read_reg(SAA7114_HORZ_INPUT_LO, &data);
+   value = (unsigned long)data;
+   saa7114_read_reg(SAA7114_HORZ_INPUT_HI, &data);
+   value |= ((unsigned long)data) << 8;
+   saa7114_read_reg(SAA7114_VERT_INPUT_LO, &data);
+   value |= ((unsigned long)data) << 17;
+   saa7114_read_reg(SAA7114_VERT_INPUT_HI, &data);
+   value |= ((unsigned long)data) << 25;
+   return (value);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_decoder_output_size
+ *
+ * This routine returns the current size of the output window.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DECODER_DYNAMIC
+unsigned long
+saa7114_get_decoder_output_size(void)
+#else
+unsigned long
+gfx_get_decoder_output_size(void)
+#endif
+{
+   unsigned long value = 0;
+   unsigned char data;
+
+   saa7114_read_reg(SAA7114_HORZ_OUTPUT_LO, &data);
+   value = (unsigned long)data;
+   saa7114_read_reg(SAA7114_HORZ_OUTPUT_HI, &data);
+   value |= ((unsigned long)data) << 8;
+   saa7114_read_reg(SAA7114_VERT_OUTPUT_LO, &data);
+   value |= ((unsigned long)data) << 17;
+   saa7114_read_reg(SAA7114_VERT_OUTPUT_HI, &data);
+   value |= ((unsigned long)data) << 25;
+   return (value);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_decoder_vbi_format
+ *
+ * This routine returns the current format of VBI data for the specified line.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_DECODER_DYNAMIC
+int
+saa7114_get_decoder_vbi_format(int line)
+#else
+int
+gfx_get_decoder_vbi_format(int line)
+#endif
+{
+   unsigned char format = 0, data;
+
+   saa7114_read_reg((unsigned char)(0x3F + line), &data);
+   switch (data) {
+   case 0xFF:
+      format = VBI_FORMAT_VIDEO;
+      break;				/* Active video */
+   case 0x77:
+      format = VBI_FORMAT_RAW;
+      break;				/* Raw VBI data */
+   case 0x55:
+      format = VBI_FORMAT_CC;
+      break;				/* US CC        */
+   case 0xCC:
+      format = VBI_FORMAT_NABTS;
+      break;				/* US NABTS     */
+   }
+   return (format);
+}
+
+#endif /* GFX_READ_ROUTINES */
+
+/* END OF FILE */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/tv_1200.c b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/tv_1200.c
new file mode 100644
index 000000000..512b28e14
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/tv_1200.c
@@ -0,0 +1,1113 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/tv_1200.c,v 1.1 2002/12/10 15:12:27 alanh Exp $ */
+/*
+ * $Workfile: tv_1200.c $
+ *
+ * This file contains routines to control the SC1200 TVOUT and TV encoder.
+ *
+ * NSC_LIC_ALTERNATIVE_PREAMBLE
+ *
+ * Revision 1.0
+ *
+ * National Semiconductor Alternative GPL-BSD License
+ *
+ * National Semiconductor Corporation licenses this software 
+ * ("Software"):
+ *
+ *      Durango
+ *
+ * under one of the two following licenses, depending on how the 
+ * Software is received by the Licensee.
+ * 
+ * If this Software is received as part of the Linux Framebuffer or
+ * other GPL licensed software, then the GPL license designated 
+ * NSC_LIC_GPL applies to this Software; in all other circumstances 
+ * then the BSD-style license designated NSC_LIC_BSD shall apply.
+ *
+ * END_NSC_LIC_ALTERNATIVE_PREAMBLE */
+
+/* NSC_LIC_BSD
+ *
+ * National Semiconductor Corporation Open Source License for Durango
+ *
+ * (BSD License with Export Notice)
+ *
+ * Copyright (c) 1999-2001
+ * National Semiconductor Corporation.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met: 
+ *
+ *   * Redistributions of source code must retain the above copyright 
+ *     notice, this list of conditions and the following disclaimer. 
+ *
+ *   * Redistributions in binary form must reproduce the above 
+ *     copyright notice, this list of conditions and the following 
+ *     disclaimer in the documentation and/or other materials provided 
+ *     with the distribution. 
+ *
+ *   * Neither the name of the National Semiconductor Corporation nor 
+ *     the names of its contributors may be used to endorse or promote 
+ *     products derived from this software without specific prior 
+ *     written permission. 
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+ * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE,
+ * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE.
+ *
+ * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
+ * YOUR JURISDICTION. It is licensee's responsibility to comply with 
+ * any export regulations applicable in licensee's jurisdiction. Under 
+ * CURRENT (2001) U.S. export regulations this software 
+ * is eligible for export from the U.S. and can be downloaded by or 
+ * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
+ * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
+ * Syria, Sudan, Afghanistan and any other country to which the U.S. 
+ * has embargoed goods and services. 
+ *
+ * END_NSC_LIC_BSD */
+
+/* NSC_LIC_GPL
+ *
+ * National Semiconductor Corporation Gnu General Public License for Durango
+ *
+ * (GPL License with Export Notice)
+ *
+ * Copyright (c) 1999-2001
+ * National Semiconductor Corporation.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted under the terms of the GNU General 
+ * Public License as published by the Free Software Foundation; either 
+ * version 2 of the License, or (at your option) any later version  
+ *
+ * In addition to the terms of the GNU General Public License, neither 
+ * the name of the National Semiconductor Corporation nor the names of 
+ * its contributors may be used to endorse or promote products derived 
+ * from this software without specific prior written permission. 
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+ * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, 
+ * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE. See the GNU General Public License for more details. 
+ *
+ * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
+ * YOUR JURISDICTION. It is licensee's responsibility to comply with 
+ * any export regulations applicable in licensee's jurisdiction. Under 
+ * CURRENT (2001) U.S. export regulations this software 
+ * is eligible for export from the U.S. and can be downloaded by or 
+ * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
+ * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
+ * Syria, Sudan, Afghanistan and any other country to which the U.S. 
+ * has embargoed goods and services. 
+ *
+ * You should have received a copy of the GNU General Public License 
+ * along with this file; if not, write to the Free Software Foundation, 
+ * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 
+ *
+ * END_NSC_LIC_GPL */
+
+int sc1200_set_tv_format(TVStandardType format, GfxOnTVType resolution);
+int sc1200_set_tv_output(int output);
+int sc1200_set_tv_enable(int enable);
+int sc1200_set_tv_flicker_filter(int ff);
+int sc1200_set_tv_sub_carrier_reset(int screset);
+int sc1200_set_tv_vphase(int vphase);
+int sc1200_set_tv_YC_delay(int delay);
+int sc1200_set_tvenc_reset_interval(int interval);
+int sc1200_set_tv_cc_enable(int enable);
+int sc1200_set_tv_cc_data(unsigned char data1, unsigned char data2);
+int sc1200_set_tv_display(int width, int height);
+int sc1200_test_tvout_odd_field(void);
+int sc1200_test_tvenc_odd_field(void);
+int sc1200_set_tv_field_status_invert(int enable);
+int sc1200_get_tv_vphase(void);
+int sc1200_get_tv_enable(unsigned int *p_on);
+int sc1200_get_tv_output(void);
+int sc1200_get_tv_mode_count(TVStandardType format);
+int sc1200_get_tv_display_mode(int *width, int *height, int *bpp, int *hz);
+int sc1200_get_tv_display_mode_frequency(unsigned short width,
+					 unsigned short height,
+					 TVStandardType format,
+					 int *frequency);
+int sc1200_is_tv_display_mode_supported(unsigned short width,
+					unsigned short height,
+					TVStandardType format);
+
+int sc1200_get_tv_standard(unsigned long *p_standard);
+int sc1200_get_available_tv_standards(unsigned long *p_standards);
+int sc1200_set_tv_standard(unsigned long standard);
+int sc1200_get_tv_vga_mode(unsigned long *p_vga_mode);
+int sc1200_get_available_tv_vga_modes(unsigned long *p_vga_modes);
+int sc1200_set_tv_vga_mode(unsigned long vga_mode);
+int sc1200_get_tvout_mode(unsigned long *p_tvout_mode);
+int sc1200_set_tvout_mode(unsigned long tvout_mode);
+int sc1200_get_sharpness(int *p_sharpness);
+int sc1200_set_sharpness(int sharpness);
+int sc1200_get_flicker_filter(int *p_flicker);
+int sc1200_set_flicker_filter(int flicker);
+int sc1200_get_overscan(int *p_x, int *p_y);
+int sc1200_set_overscan(int x, int y);
+int sc1200_get_position(int *p_x, int *p_y);
+int sc1200_set_position(int x, int y);
+int sc1200_get_color(int *p_color);
+int sc1200_set_color(int color);
+int sc1200_get_brightness(int *p_brightness);
+int sc1200_set_brightness(int brightness);
+int sc1200_get_contrast(int *p_contrast);
+int sc1200_set_contrast(int constrast);
+int sc1200_get_yc_filter(unsigned int *p_yc_filter);
+int sc1200_set_yc_filter(unsigned int yc_filter);
+int sc1200_get_aps_trigger_bits(unsigned int *p_trigger_bits);
+int sc1200_set_aps_trigger_bits(unsigned int trigger_bits);
+unsigned char cc_add_parity_bit(unsigned char data);
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_tv_format
+ *
+ * This routine sets the TV encoder registers to the specified format
+ * and resolution.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_TV_DYNAMIC
+int
+sc1200_set_tv_format(TVStandardType format, GfxOnTVType resolution)
+#else
+int
+gfx_set_tv_format(TVStandardType format, GfxOnTVType resolution)
+#endif
+{
+   unsigned long ctrl2, mode;
+
+   /* Save TV output mode */
+   ctrl2 =
+	 READ_VID32(SC1200_TVENC_TIM_CTRL_2) & (SC1200_TVENC_OUTPUT_YCBCR |
+						SC1200_TVENC_CFS_MASK);
+   /* Save flicker filter setting */
+   mode = READ_VID32(SC1200_TVOUT_HORZ_SCALING) &
+	 SC1200_TVOUT_FLICKER_FILTER_MASK;
+
+   switch (format) {
+   case TV_STANDARD_NTSC:
+      /* Horizontal Sync Start is 848 */
+      /* Horizontal Sync End is 856 */
+      WRITE_VID32(SC1200_TVOUT_HORZ_SYNC, 0x03580350);
+      /* Vertical Sync Start is 0 */
+      /* Vertical Sync End is 1 */
+      /* Vertical Display Start Skew is 1 */
+      /* Vertical Display End Skew is 1 */
+      WRITE_VID32(SC1200_TVOUT_VERT_SYNC, 0x05001000);
+      /* Disable vertical down scaling, take all lines */
+      if (gfx_chip_revision <= SC1200_REV_B3)
+	 WRITE_VID32(SC1200_TVOUT_VERT_DOWNSCALE, 0xffffffff);
+      /* Enable video timing */
+      /* Reset sub carrier every two frames */
+      /* Disable BLANK */
+      /* Enable color burst */
+      /* Add the IRE offset */
+      /* NTSC color encoding */
+      /* Video generator timing is 525 lines / 60Hz */
+      /* Horizontal and Vertical counters are initialized to HPHASE & VPHASE */
+      /* VPHASE is 2, HPHASE is 0x50 */
+      WRITE_VID32(SC1200_TVENC_TIM_CTRL_1, 0xa2a01050);
+      /* Increase horizontal blanking interval */
+      /* Low Water Mark for Y is 0x1F */
+      /* Low Water Mark for Cb is 0xF */
+      /* HUE is 0 */
+      /* SCPHASE is 0xF9 */
+      WRITE_VID32(SC1200_TVENC_TIM_CTRL_2, 0x9ff000f9 | ctrl2);
+      /* Subcarrier Frequency is 3.579545 MHz */
+      WRITE_VID32(SC1200_TVENC_SUB_FREQ, 0x21f07c1f);
+      /* VSTART is 18, HSTART is 113 */
+      WRITE_VID32(SC1200_TVENC_DISP_POS, 0x00120071);
+      /* Display size: HEIGHT is 239, WIDTH is 719 */
+      WRITE_VID32(SC1200_TVENC_DISP_SIZE, 0x00ef02cf);
+      switch (resolution) {
+      case GFX_ON_TV_SQUARE_PIXELS:
+	 if (gfx_chip_revision <= SC1200_REV_B3) {
+	    /* Horizontal Display start is 116 */
+	    /* Total number of pixels per line is 857 */
+	    WRITE_VID32(SC1200_TVOUT_HORZ_TIM, 0x00740359);
+	    /* HSYNC generated in the TV Encoder module */
+	    /* Interval between resets of TV Encoder is once every odd field */
+	    /* Enable Horizontal interpolation */
+	    /* Enable Horizontal up scaling 9/8 */
+	    /* Disable Horizontal downscale */
+	    WRITE_VID32(SC1200_TVOUT_HORZ_SCALING, 0x10020700 | mode);
+	    /* Horizontal display end is 919, i.e. 720 active pixels */
+	    /* Total number of display lines per field is 240 */
+	    WRITE_VID32(SC1200_TVOUT_LINE_END, 0x039700f0);
+	 } else {			/* Use new scaler available in Rev. C */
+	    /* Horizontal Display start is 111 */
+	    /* Total number of pixels per line is 857 */
+	    WRITE_VID32(SC1200_TVOUT_HORZ_TIM, 0x006f0359);
+	    /* HSYNC generated in the TV Encoder module */
+	    /* Interval between resets of TV Encoder is once every odd field */
+	    /* Enable Horizontal interpolation */
+	    /* Disable Horizontal up scaling 9/8 */
+	    /* Disable Horizontal downscale */
+	    WRITE_VID32(SC1200_TVOUT_HORZ_SCALING, 0x10020500 | mode);
+	    /* Set Horizontal upscaling to 64/58 (~ 11/10) */
+	    WRITE_VID32(SC1200_TVOUT_HORZ_PRE_ENCODER_SCALE, 0x3A000000);
+	    /* Horizontal display end is 900, i.e. 706 active pixels */
+	    /* Total number of display lines per field is 240 */
+	    WRITE_VID32(SC1200_TVOUT_LINE_END, 0x038400f0);
+	 }
+	 break;
+      case GFX_ON_TV_NO_SCALING:
+	 /* Horizontal Display start is 116 */
+	 /* Total number of pixels per line is 857 */
+	 WRITE_VID32(SC1200_TVOUT_HORZ_TIM, 0x00740359);
+	 /* HSYNC generated in the TV Encoder module */
+	 /* Interval between resets of TV Encoder is once every odd field */
+	 /* Enable Horizontal interpolation */
+	 /* Disable Horizontal up scaling 9/8 */
+	 /* Disable Horizontal downscale */
+	 WRITE_VID32(SC1200_TVOUT_HORZ_SCALING, 0x10020500 | mode);
+	 /* Disable Horizontal scaling (set to 64/64) */
+	 if (gfx_chip_revision >= SC1200_REV_C1)
+	    WRITE_VID32(SC1200_TVOUT_HORZ_PRE_ENCODER_SCALE, 0x40000000);
+	 /* Horizontal display end is 919, i.e. 720 active pixels */
+	 /* Total number of display lines per field is 240 */
+	 WRITE_VID32(SC1200_TVOUT_LINE_END, 0x039700f0);
+	 break;
+      default:
+	 return (GFX_STATUS_BAD_PARAMETER);
+      }
+      break;
+   case TV_STANDARD_PAL:
+      /* Horizontal Sync Start is 854 */
+      /* Horizontal Sync End is 862 */
+      WRITE_VID32(SC1200_TVOUT_HORZ_SYNC, 0x035e0356);
+      /* Vertical Sync Start is 0 */
+      /* Vertical Sync End is 1 */
+      /* Vertical Display Start Skew is 1 */
+      /* Vertical Display End Skew is 1 */
+      WRITE_VID32(SC1200_TVOUT_VERT_SYNC, 0x05001000);
+      /* Disable vertical down scaling, take all lines */
+      if (gfx_chip_revision <= SC1200_REV_B3)
+	 WRITE_VID32(SC1200_TVOUT_VERT_DOWNSCALE, 0xffffffff);
+      /* Enable video timing */
+      /* Never reset sub carrier (should be every 4 frames but doesn't work with genlock) */
+      /* Disable BLANK */
+      /* Enable color burst */
+      /* Do not add the IRE offset */
+      /* NTSC color encoding */
+      /* Video generator timing is 625 lines / 50Hz */
+      /* Horizontal and Vertical counters are initialized to HPHASE & VPHASE */
+      /* VPHASE is 2, HPHASE is 50 */
+      WRITE_VID32(SC1200_TVENC_TIM_CTRL_1, 0xB1201050);
+      /* Increase horizontal blanking interval */
+      /* Low Water Mark for Y is 0x1F */
+      /* Low Water Mark for Cb is 0xF */
+      /* HUE is 0 */
+      /* SCPHASE is 0xD9 */
+      WRITE_VID32(SC1200_TVENC_TIM_CTRL_2, 0x9ff000d9 | ctrl2);
+      /* Subcarrier Frequency is 4.43361875 MHz */
+      WRITE_VID32(SC1200_TVENC_SUB_FREQ, 0x2a098acb);
+      /* VSTART is 22, HSTART is 123 */
+      WRITE_VID32(SC1200_TVENC_DISP_POS, 0x0016007b);
+      /* Display size: HEIGHT is 287, WIDTH is 719 */
+      WRITE_VID32(SC1200_TVENC_DISP_SIZE, 0x011f02cf);
+      switch (resolution) {
+      case GFX_ON_TV_NO_SCALING:
+	 /* Horizontal Display start is 124 */
+	 /* Total number of pixels per line is 863 */
+	 WRITE_VID32(SC1200_TVOUT_HORZ_TIM, 0x007c035f);
+	 /* HSYNC generated in the TV Encoder module */
+	 /* Interval between resets of TV Encoder is once every odd field */
+	 /* Enable Horizontal interpolation */
+	 /* Disable Horizontal up scaling 9/8 */
+	 /* Disable Horizontal downscale */
+	 WRITE_VID32(SC1200_TVOUT_HORZ_SCALING, 0x10020500 | mode);
+	 /* Disable Horizontal scaling (set to 64/64) */
+	 if (gfx_chip_revision >= SC1200_REV_C1)
+	    WRITE_VID32(SC1200_TVOUT_HORZ_PRE_ENCODER_SCALE, 0x40000000);
+	 /* Horizontal display end is 924, i.e. 720 active pixels */
+	 /* Total number of display lines per field is 288 */
+	 WRITE_VID32(SC1200_TVOUT_LINE_END, 0x039c0120);
+	 break;
+      case GFX_ON_TV_SQUARE_PIXELS:
+	 /* Horizontal Display start is 122 */
+	 /* Total number of pixels per line is 863 */
+	 WRITE_VID32(SC1200_TVOUT_HORZ_TIM, 0x007a035f);
+	 if (gfx_chip_revision <= SC1200_REV_B3) {
+	    /* HSYNC generated in the TV Encoder module */
+	    /* Interval between resets of TV Encoder is once every odd field */
+	    /* Enable Horizontal interpolation */
+	    /* Disable Horizontal up scaling 9/8 */
+	    /* Horizontal downscale m/(m+1), m = 11, (i.e. 11/12 - closest possible to 54/59) */
+	    WRITE_VID32(SC1200_TVOUT_HORZ_SCALING, 0x1002040b | mode);
+	    /* Horizontal display end is 906, i.e. 704 active pixels */
+	    /* Total number of display lines per field is 288 */
+	    WRITE_VID32(SC1200_TVOUT_LINE_END, 0x038a0120);
+	 } else {
+	    /* HSYNC generated in the TV Encoder module */
+	    /* Interval between resets of TV Encoder is once every odd field */
+	    /* Enable Horizontal interpolation */
+	    /* Disable Horizontal up scaling 9/8 */
+	    /* Disable Horizontal downscale */
+	    WRITE_VID32(SC1200_TVOUT_HORZ_SCALING, 0x10020500 | mode);
+	    /* Set Horizontal down scaling to 64/70 (closest possible to 54/59) */
+	    WRITE_VID32(SC1200_TVOUT_HORZ_PRE_ENCODER_SCALE, 0x46000000);
+	    /* Horizontal display end is 904, i.e. 702 active pixels */
+	    /* Total number of display lines per field is 288 */
+	    WRITE_VID32(SC1200_TVOUT_LINE_END, 0x03880120);
+	 }
+	 break;
+      default:
+	 return (GFX_STATUS_BAD_PARAMETER);
+      }
+      break;
+   default:
+      return (GFX_STATUS_BAD_PARAMETER);
+   }
+   return (GFX_STATUS_OK);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_tv_output
+ *
+ * This routine sets the TV encoder registers to the specified output type.
+ * Supported output types are : S-VIDEO, Composite, YUV and SCART.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_TV_DYNAMIC
+int
+sc1200_set_tv_output(int output)
+#else
+int
+gfx_set_tv_output(int output)
+#endif
+{
+   unsigned long ctrl2, ctrl3;
+
+   ctrl2 = READ_VID32(SC1200_TVENC_TIM_CTRL_2);
+   ctrl3 = READ_VID32(SC1200_TVENC_TIM_CTRL_3);
+   ctrl2 &= ~(SC1200_TVENC_OUTPUT_YCBCR | SC1200_TVENC_CFS_MASK);
+   ctrl3 &= ~(SC1200_TVENC_CM | SC1200_TVENC_SYNCMODE_MASK | SC1200_TVENC_CS);
+   switch (output) {
+   case TV_OUTPUT_COMPOSITE:
+      /* Analog outputs provide Y, C and CVBS */
+      /* Chrominance Lowpass filter is 1.3MHz (for composite video output) */
+      WRITE_VID32(SC1200_TVENC_TIM_CTRL_2, ctrl2 | SC1200_TVENC_CFS_CVBS);
+      WRITE_VID32(SC1200_TVENC_TIM_CTRL_3, ctrl3);
+      break;
+   case TV_OUTPUT_S_VIDEO:
+      /* Analog outputs provide Y, C and CVBS */
+      /* Chrominance Lowpass filter is 1.8MHz (for S-video output) */
+      WRITE_VID32(SC1200_TVENC_TIM_CTRL_2, ctrl2 | SC1200_TVENC_CFS_SVIDEO);
+      WRITE_VID32(SC1200_TVENC_TIM_CTRL_3, ctrl3);
+      break;
+   case TV_OUTPUT_YUV:
+      /* Analog outputs provide Y, Cb and Cr */
+      /* A 7.5 IRE setup is applied to the output */
+      WRITE_VID32(SC1200_TVENC_TIM_CTRL_2,
+		  ctrl2 | SC1200_TVENC_OUTPUT_YCBCR |
+		  SC1200_TVENC_CFS_BYPASS);
+      WRITE_VID32(SC1200_TVENC_TIM_CTRL_3,
+		  ctrl3 | SC1200_TVENC_CM | SC1200_TVENC_CS);
+      break;
+   case TV_OUTPUT_SCART:
+      /* Analog outputs provide SCART (RGB and CVBS) */
+      /* Sync is added to green signal */
+      WRITE_VID32(SC1200_TVENC_TIM_CTRL_2, ctrl2 | SC1200_TVENC_CFS_CVBS);
+      WRITE_VID32(SC1200_TVENC_TIM_CTRL_3,
+		  ctrl3 | SC1200_TVENC_CM | SC1200_TVENC_SYNC_ON_GREEN);
+      break;
+   default:
+      return (GFX_STATUS_BAD_PARAMETER);
+   }
+
+   /* Adjusts the internal voltage reference */
+   ctrl2 = READ_VID32(SC1200_TVENC_DAC_CONTROL);
+   ctrl2 &= ~SC1200_TVENC_TRIM_MASK;
+
+   /* Bypass for issue #926 : Inadequate chroma level of S-Video output */
+   if ((gfx_chip_revision == SC1200_REV_B3) && (output == TV_OUTPUT_S_VIDEO))
+      ctrl2 |= 0x7;
+   else
+      ctrl2 |= 0x5;
+
+   WRITE_VID32(SC1200_TVENC_DAC_CONTROL, ctrl2);
+
+   /* Disable 4:2:2 to 4:4:4 converter interpolation */
+   WRITE_VID32(SC1200_TVOUT_DEBUG, SC1200_TVOUT_CONVERTER_INTERPOLATION);
+
+   return (GFX_STATUS_OK);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_tv_enable
+ *
+ * This routine enables or disables the TV output.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_TV_DYNAMIC
+int
+sc1200_set_tv_enable(int enable)
+#else
+int
+gfx_set_tv_enable(int enable)
+#endif
+{
+   unsigned long value_tim, value_dac;
+
+   value_tim = READ_VID32(SC1200_TVENC_TIM_CTRL_1);
+   value_dac = READ_VID32(SC1200_TVENC_DAC_CONTROL);
+
+   if (enable) {
+      value_tim |= SC1200_TVENC_VIDEO_TIMING_ENABLE;
+      value_dac &= ~SC1200_TVENC_POWER_DOWN;
+      /* ENABLE GRAPHICS DISPLAY LOGIC IN VIDEO PROCESSOR */
+      gfx_set_screen_enable(1);
+   } else {
+      value_tim &= ~SC1200_TVENC_VIDEO_TIMING_ENABLE;
+      value_dac |= SC1200_TVENC_POWER_DOWN;
+      /* Do not disable the graphics display logic because it might be needed for CRT */
+   }
+
+   WRITE_VID32(SC1200_TVENC_TIM_CTRL_1, value_tim);
+   WRITE_VID32(SC1200_TVENC_DAC_CONTROL, value_dac);
+
+   return (GFX_STATUS_OK);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_tv_flicker_filter
+ *
+ * This routine configures the TV out flicker filter.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_TV_DYNAMIC
+int
+sc1200_set_tv_flicker_filter(int ff)
+#else
+int
+gfx_set_tv_flicker_filter(int ff)
+#endif
+{
+   unsigned long mode;
+
+   mode = READ_VID32(SC1200_TVOUT_HORZ_SCALING);
+   mode &= ~SC1200_TVOUT_FLICKER_FILTER_MASK;
+   switch (ff) {
+   case TV_FLICKER_FILTER_NONE:
+      WRITE_VID32(SC1200_TVOUT_HORZ_SCALING,
+		  mode | SC1200_TVOUT_FLICKER_FILTER_DISABLED);
+      break;
+   case TV_FLICKER_FILTER_NORMAL:
+      WRITE_VID32(SC1200_TVOUT_HORZ_SCALING,
+		  mode | SC1200_TVOUT_FLICKER_FILTER_FOURTH_HALF_FOURTH);
+      break;
+   case TV_FLICKER_FILTER_INTERLACED:
+      WRITE_VID32(SC1200_TVOUT_HORZ_SCALING,
+		  mode | SC1200_TVOUT_FLICKER_FILTER_HALF_ONE_HALF);
+      break;
+   default:
+      return GFX_STATUS_BAD_PARAMETER;
+   }
+   return (GFX_STATUS_OK);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_tv_sub_carrier_reset
+ *
+ * This routine configures the TV encoder sub carrier reset interval.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_TV_DYNAMIC
+int
+sc1200_set_tv_sub_carrier_reset(int screset)
+#else
+int
+gfx_set_tv_sub_carrier_reset(int screset)
+#endif
+{
+   unsigned long mode;
+
+   mode = READ_VID32(SC1200_TVENC_TIM_CTRL_1);
+   mode &= ~SC1200_TVENC_SUB_CARRIER_RESET_MASK;
+   switch (screset) {
+   case TV_SUB_CARRIER_RESET_NEVER:
+      WRITE_VID32(SC1200_TVENC_TIM_CTRL_1,
+		  mode | SC1200_TVENC_SUB_CARRIER_RESET_NEVER);
+      break;
+   case TV_SUB_CARRIER_RESET_EVERY_TWO_LINES:
+      WRITE_VID32(SC1200_TVENC_TIM_CTRL_1,
+		  mode | SC1200_TVENC_SUB_CARRIER_RESET_EVERY_TWO_LINES);
+      break;
+   case TV_SUB_CARRIER_RESET_EVERY_TWO_FRAMES:
+      WRITE_VID32(SC1200_TVENC_TIM_CTRL_1,
+		  mode | SC1200_TVENC_SUB_CARRIER_RESET_EVERY_TWO_FRAMES);
+      break;
+   case TV_SUB_CARRIER_RESET_EVERY_FOUR_FRAMES:
+      WRITE_VID32(SC1200_TVENC_TIM_CTRL_1,
+		  mode | SC1200_TVENC_SUB_CARRIER_RESET_EVERY_FOUR_FRAMES);
+      break;
+   default:
+      return GFX_STATUS_BAD_PARAMETER;
+   }
+   return (GFX_STATUS_OK);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_tv_vphase
+ *
+ * This routine sets the tv encoder VPHASE value.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_TV_DYNAMIC
+int
+sc1200_set_tv_vphase(int vphase)
+#else
+int
+gfx_set_tv_vphase(int vphase)
+#endif
+{
+   unsigned long mode = READ_VID32(SC1200_TVENC_TIM_CTRL_1);
+
+   mode &= ~SC1200_TVENC_VPHASE_MASK;
+   mode |= (vphase << SC1200_TVENC_VPHASE_POS) & SC1200_TVENC_VPHASE_MASK;
+   WRITE_VID32(SC1200_TVENC_TIM_CTRL_1, mode);
+   return (GFX_STATUS_OK);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_tv_YC_delay
+ *
+ * This routine configures the TV out Y/C delay.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_TV_DYNAMIC
+int
+sc1200_set_tv_YC_delay(int delay)
+#else
+int
+gfx_set_tv_YC_delay(int delay)
+#endif
+{
+   unsigned long mode;
+
+   /* This feature is implemented in Rev C1 */
+   if (gfx_chip_revision < SC1200_REV_C1)
+      return (GFX_STATUS_OK);
+
+   mode = READ_VID32(SC1200_TVOUT_HORZ_PRE_ENCODER_SCALE);
+   mode &= ~SC1200_TVOUT_YC_DELAY_MASK;
+   switch (delay) {
+   case TV_YC_DELAY_NONE:
+      WRITE_VID32(SC1200_TVOUT_HORZ_PRE_ENCODER_SCALE,
+		  mode | SC1200_TVOUT_YC_DELAY_NONE);
+      break;
+   case TV_Y_DELAY_ONE_PIXEL:
+      WRITE_VID32(SC1200_TVOUT_HORZ_PRE_ENCODER_SCALE,
+		  mode | SC1200_TVOUT_Y_DELAY_ONE_PIXEL);
+      break;
+   case TV_C_DELAY_ONE_PIXEL:
+      WRITE_VID32(SC1200_TVOUT_HORZ_PRE_ENCODER_SCALE,
+		  mode | SC1200_TVOUT_C_DELAY_ONE_PIXEL);
+      break;
+   case TV_C_DELAY_TWO_PIXELS:
+      WRITE_VID32(SC1200_TVOUT_HORZ_PRE_ENCODER_SCALE,
+		  mode | SC1200_TVOUT_C_DELAY_TWO_PIXELS);
+      break;
+   default:
+      return GFX_STATUS_BAD_PARAMETER;
+   }
+   return (GFX_STATUS_OK);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_tvenc_reset_interval
+ *
+ * This routine sets the interval between external resets of the TV encoder
+ * timing generator by the TV out.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_TV_DYNAMIC
+int
+sc1200_set_tvenc_reset_interval(int interval)
+#else
+int
+gfx_set_tvenc_reset_interval(int interval)
+#endif
+{
+   unsigned long value;
+
+   value = READ_VID32(SC1200_TVOUT_HORZ_SCALING);
+   value &= ~SC1200_TVENC_EXTERNAL_RESET_INTERVAL_MASK;
+   switch (interval) {
+   case TVENC_RESET_EVERY_ODD_FIELD:
+      WRITE_VID32(SC1200_TVOUT_HORZ_SCALING,
+		  value | SC1200_TVENC_EXTERNAL_RESET_EVERY_ODD_FIELD);
+      break;
+   case TVENC_RESET_EVERY_EVEN_FIELD:
+      WRITE_VID32(SC1200_TVOUT_HORZ_SCALING,
+		  value | SC1200_TVENC_EXTERNAL_RESET_EVERY_EVEN_FIELD);
+      break;
+   case TVENC_RESET_NEXT_ODD_FIELD:
+      WRITE_VID32(SC1200_TVOUT_HORZ_SCALING,
+		  value | SC1200_TVENC_EXTERNAL_RESET_NEXT_ODD_FIELD);
+      break;
+   case TVENC_RESET_NEXT_EVEN_FIELD:
+      WRITE_VID32(SC1200_TVOUT_HORZ_SCALING,
+		  value | SC1200_TVENC_EXTERNAL_RESET_NEXT_EVEN_FIELD);
+      break;
+   case TVENC_RESET_EVERY_FIELD:
+      WRITE_VID32(SC1200_TVOUT_HORZ_SCALING,
+		  value | SC1200_TVENC_EXTERNAL_RESET_EVERY_FIELD);
+      break;
+   case TVENC_RESET_EVERY_X_ODD_FIELDS:
+   case TVENC_RESET_EVERY_X_EVEN_FIELDS:
+      return GFX_STATUS_UNSUPPORTED;
+   default:
+      return GFX_STATUS_BAD_PARAMETER;
+   }
+   return (GFX_STATUS_OK);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_tv_cc_enable
+ *
+ * This routine enables or disables the use of the hardware CC registers 
+ * in the TV encoder.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_TV_DYNAMIC
+int
+sc1200_set_tv_cc_enable(int enable)
+#else
+int
+gfx_set_tv_cc_enable(int enable)
+#endif
+{
+   unsigned long value;
+
+   value = READ_VID32(SC1200_TVENC_CC_CONTROL);
+   value &= ~(0x0005F);
+   if (enable)
+      value |= 0x51;
+   WRITE_VID32(SC1200_TVENC_CC_CONTROL, value);
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_tv_display
+ *
+ * This routine sets the timings in the display controller to support a 
+ * TV resolution.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_TV_DYNAMIC
+int
+sc1200_set_tv_display(int width, int height)
+#else
+int
+gfx_set_tv_display(int width, int height)
+#endif
+{
+   DISPLAYMODE *pMode;
+   unsigned int i;
+
+   for (i = 0; i < NUM_TV_MODES; i++) {
+      pMode = &TVTimings[i];
+      if ((unsigned)width == pMode->hactive
+	  && (unsigned)height == pMode->vactive)
+	 break;
+   }
+
+   if (i == NUM_TV_MODES)
+      return 0;
+
+   gfx_set_display_timings(gfx_get_display_bpp(),
+			   (unsigned short)pMode->flags, pMode->hactive,
+			   pMode->hblankstart, pMode->hsyncstart,
+			   pMode->hsyncend, pMode->hblankend, pMode->htotal,
+			   pMode->vactive, pMode->vblankstart,
+			   pMode->vsyncstart, pMode->vsyncend,
+			   pMode->vblankend, pMode->vtotal, pMode->frequency);
+
+   return 1;
+}
+
+/*-----------------------------------------------------------------------------
+ * cc_add_parity_bit
+ *
+ * This routine adds the (odd) parity bit to the data character.
+ *-----------------------------------------------------------------------------
+ */
+unsigned char
+cc_add_parity_bit(unsigned char data)
+{
+   int i, num = 0;
+   unsigned char d = data;
+
+   for (i = 0; i < 7; i++) {
+      if (d & 0x1)
+	 num++;
+      d >>= 1;
+   }
+   if (num & 0x1)
+      return (data & ~0x80);
+   else
+      return (data | 0x80);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_tv_cc_data
+ *
+ * This routine writes the two specified characters to the CC data register 
+ * of the TV encoder.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_TV_DYNAMIC
+int
+sc1200_set_tv_cc_data(unsigned char data1, unsigned char data2)
+#else
+int
+gfx_set_tv_cc_data(unsigned char data1, unsigned char data2)
+#endif
+{
+   unsigned long value;
+
+   value = cc_add_parity_bit(data1) | (cc_add_parity_bit(data2) << 8);
+   WRITE_VID32(SC1200_TVENC_CC_DATA, value);
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_test_tvout_odd_field
+ * 
+ * This routine returns 1 if the current TVout field is odd. Otherwise returns 0.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_TV_DYNAMIC
+int
+sc1200_test_tvout_odd_field(void)
+#else
+int
+gfx_test_tvout_odd_field(void)
+#endif
+{
+   unsigned long debug = READ_VID32(SC1200_TVOUT_DEBUG);
+
+   WRITE_VID32(SC1200_TVOUT_DEBUG, debug | SC1200_TVOUT_FIELD_STATUS_TV);
+   if (READ_VID32(SC1200_TVOUT_DEBUG) & SC1200_TVOUT_FIELD_STATUS_EVEN)
+      return (0);
+   else
+      return (1);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_test_tvenc_odd_field
+ * 
+ * This routine returns 1 if the current TV encoder field is odd. Otherwise returns 0.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_TV_DYNAMIC
+int
+sc1200_test_tvenc_odd_field(void)
+#else
+int
+gfx_test_tvenc_odd_field(void)
+#endif
+{
+   unsigned long debug = READ_VID32(SC1200_TVOUT_DEBUG);
+
+   WRITE_VID32(SC1200_TVOUT_DEBUG, debug & ~SC1200_TVOUT_FIELD_STATUS_TV);
+   if (READ_VID32(SC1200_TVOUT_DEBUG) & SC1200_TVOUT_FIELD_STATUS_EVEN)
+      return (0);
+   else
+      return (1);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_tv_field_status_invert
+ *
+ * This routines determines whether the tvout/tvencoder field status bit is
+ * inverted (enable = 1) or not (enable = 0).
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_TV_DYNAMIC
+int
+sc1200_set_tv_field_status_invert(int enable)
+#else
+int
+gfx_set_tv_field_status_invert(int enable)
+#endif
+{
+   unsigned long value;
+
+   value = READ_VID32(SC1200_TVOUT_DEBUG);
+
+   if (enable) {
+      value |= SC1200_TVOUT_FIELD_STATUS_INVERT;
+   } else {
+      value &= ~(SC1200_TVOUT_FIELD_STATUS_INVERT);
+   }
+
+   WRITE_VID32(SC1200_TVOUT_DEBUG, value);
+
+   return (GFX_STATUS_OK);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_tv_vphase
+ * 
+ * This routine returns the tv encoder vertical phase.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_TV_DYNAMIC
+int
+sc1200_get_tv_vphase(void)
+#else
+int
+gfx_get_tv_vphase(void)
+#endif
+{
+   unsigned long mode = READ_VID32(SC1200_TVENC_TIM_CTRL_1);
+
+   return (int)((mode & SC1200_TVENC_VPHASE_MASK) >> SC1200_TVENC_VPHASE_POS);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_tv_enable
+ * 
+ * This routine returns the current tv enable status
+ *---------------------------------------------------------------------------
+ */
+#if GFX_TV_DYNAMIC
+int
+sc1200_get_tv_enable(unsigned int *p_on)
+#else
+int
+gfx_get_tv_enable(unsigned int *p_on)
+#endif
+{
+   unsigned long control = READ_VID32(SC1200_TVENC_DAC_CONTROL);
+
+   *p_on = (unsigned int)(!(control & SC1200_TVENC_POWER_DOWN));
+
+   return GFX_STATUS_OK;
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_tv_output
+ * 
+ * This routine returns the current programmed TV output type.  It does not
+ * detect invalid configurations.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_TV_DYNAMIC
+int
+sc1200_get_tv_output(void)
+#else
+int
+gfx_get_tv_output(void)
+#endif
+{
+   unsigned long ctrl2, ctrl3;
+   int format = 0;
+
+   ctrl2 = READ_VID32(SC1200_TVENC_TIM_CTRL_2);
+   ctrl3 = READ_VID32(SC1200_TVENC_TIM_CTRL_3);
+
+   if ((ctrl2 & SC1200_TVENC_CFS_MASK) == SC1200_TVENC_CFS_SVIDEO)
+      format = TV_OUTPUT_S_VIDEO;
+   else if (ctrl2 & SC1200_TVENC_OUTPUT_YCBCR)
+      format = TV_OUTPUT_YUV;
+   else if ((ctrl2 & SC1200_TVENC_CFS_MASK) == SC1200_TVENC_CFS_CVBS) {
+      if (ctrl3 & SC1200_TVENC_CM)
+	 format = TV_OUTPUT_SCART;
+      else
+	 format = TV_OUTPUT_COMPOSITE;
+   }
+
+   return format;
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_tv_mode_count
+ * 
+ * This routine returns the number of valid TV out resolutions.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_TV_DYNAMIC
+int
+sc1200_get_tv_mode_count(TVStandardType format)
+#else
+int
+gfx_get_tv_mode_count(TVStandardType format)
+#endif
+{
+   unsigned int mode, count = 0;
+   unsigned long flag;
+
+   switch (format) {
+   case TV_STANDARD_NTSC:
+      flag = GFX_MODE_TV_NTSC;
+      break;
+   case TV_STANDARD_PAL:
+      flag = GFX_MODE_TV_PAL;
+      break;
+   default:
+      return 0;
+   }
+
+   for (mode = 0; mode < NUM_TV_MODES; mode++) {
+      if (TVTimings[mode].flags & flag)
+	 count++;
+   }
+
+   return count;
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_tv_display_mode
+ * 
+ * This routine returns the current TV display parameters.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_TV_DYNAMIC
+int
+sc1200_get_tv_display_mode(int *width, int *height, int *bpp, int *hz)
+#else
+int
+gfx_get_tv_display_mode(int *width, int *height, int *bpp, int *hz)
+#endif
+{
+   unsigned long frequency;
+   unsigned long mode, flags;
+
+   *width = gfx_get_hactive();
+   *height = gfx_get_vactive();
+   *bpp = gfx_get_display_bpp();
+   frequency = gfx_get_clock_frequency();
+
+   for (mode = 0; mode < NUM_TV_MODES; mode++) {
+      if (TVTimings[mode].hactive == (unsigned short)(*width) &&
+	  TVTimings[mode].vactive == (unsigned short)(*height) &&
+	  TVTimings[mode].frequency == frequency) {
+	 flags = TVTimings[mode].flags;
+
+	 if (flags & GFX_MODE_TV_NTSC)
+	    *hz = 60;
+	 else if (flags & GFX_MODE_TV_PAL)
+	    *hz = 50;
+	 else
+	    *hz = 0;
+	 return (1);
+      }
+   }
+
+   return -1;
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_tv_display_mode_frequency
+ *
+ * This routine returns the PLL frequency of a given TV mode.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_TV_DYNAMIC
+int
+sc1200_get_tv_display_mode_frequency(unsigned short width,
+				     unsigned short height,
+				     TVStandardType format, int *frequency)
+#else
+int
+gfx_get_tv_display_mode_frequency(unsigned short width, unsigned short height,
+				  TVStandardType format, int *frequency)
+#endif
+{
+   unsigned long mode, flag;
+   int retval = -1;
+
+   *frequency = 0;
+
+   switch (format) {
+   case TV_STANDARD_NTSC:
+      flag = GFX_MODE_TV_NTSC;
+      break;
+   case TV_STANDARD_PAL:
+      flag = GFX_MODE_TV_PAL;
+      break;
+   default:
+      return -1;
+   }
+
+   for (mode = 0; mode < NUM_TV_MODES; mode++) {
+      if ((TVTimings[mode].hactive == width) &&
+	  (TVTimings[mode].vactive == height) &&
+	  (TVTimings[mode].flags & flag)) {
+	 *frequency = TVTimings[mode].frequency;
+	 retval = 1;
+      }
+   }
+   return retval;
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_is_tv_display_mode_supported
+ * 
+ * Returns >= 0 if the mode is available, -1 if the mode could not be found
+ *---------------------------------------------------------------------------
+ */
+#if GFX_TV_DYNAMIC
+int
+sc1200_is_tv_display_mode_supported(unsigned short width,
+				    unsigned short height,
+				    TVStandardType format)
+#else
+int
+gfx_is_tv_display_mode_supported(unsigned short width, unsigned short height,
+				 TVStandardType format)
+#endif
+{
+   unsigned long mode, flag;
+
+   switch (format) {
+   case TV_STANDARD_NTSC:
+      flag = GFX_MODE_TV_NTSC;
+      break;
+   case TV_STANDARD_PAL:
+      flag = GFX_MODE_TV_PAL;
+      break;
+   default:
+      return -1;
+   }
+
+   for (mode = 0; mode < NUM_TV_MODES; mode++) {
+      if (TVTimings[mode].hactive == width &&
+	  TVTimings[mode].vactive == height &&
+	  (TVTimings[mode].flags & flag)) {
+	 return ((int)mode);
+      }
+   }
+
+   return -1;
+}
+
+/* END OF FILE */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/tv_fs450.c b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/tv_fs450.c
new file mode 100644
index 000000000..b14bc1683
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/tv_fs450.c
@@ -0,0 +1,3562 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/tv_fs450.c,v 1.1 2002/12/10 15:12:27 alanh Exp $ */
+/*
+ * $Workfile: tv_fs450.c $
+ *
+ * This file contains routines to control the FS450 tvout encoder.
+ *
+ * NSC_LIC_ALTERNATIVE_PREAMBLE
+ *
+ * Revision 1.0
+ *
+ * National Semiconductor Alternative GPL-BSD License
+ *
+ * National Semiconductor Corporation licenses this software 
+ * ("Software"):
+ *
+ *      Durango
+ *
+ * under one of the two following licenses, depending on how the 
+ * Software is received by the Licensee.
+ * 
+ * If this Software is received as part of the Linux Framebuffer or
+ * other GPL licensed software, then the GPL license designated 
+ * NSC_LIC_GPL applies to this Software; in all other circumstances 
+ * then the BSD-style license designated NSC_LIC_BSD shall apply.
+ *
+ * END_NSC_LIC_ALTERNATIVE_PREAMBLE */
+
+/* NSC_LIC_BSD
+ *
+ * National Semiconductor Corporation Open Source License for Durango
+ *
+ * (BSD License with Export Notice)
+ *
+ * Copyright (c) 1999-2001
+ * National Semiconductor Corporation.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met: 
+ *
+ *   * Redistributions of source code must retain the above copyright 
+ *     notice, this list of conditions and the following disclaimer. 
+ *
+ *   * Redistributions in binary form must reproduce the above 
+ *     copyright notice, this list of conditions and the following 
+ *     disclaimer in the documentation and/or other materials provided 
+ *     with the distribution. 
+ *
+ *   * Neither the name of the National Semiconductor Corporation nor 
+ *     the names of its contributors may be used to endorse or promote 
+ *     products derived from this software without specific prior 
+ *     written permission. 
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+ * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE,
+ * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE.
+ *
+ * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
+ * YOUR JURISDICTION. It is licensee's responsibility to comply with 
+ * any export regulations applicable in licensee's jurisdiction. Under 
+ * CURRENT (2001) U.S. export regulations this software 
+ * is eligible for export from the U.S. and can be downloaded by or 
+ * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
+ * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
+ * Syria, Sudan, Afghanistan and any other country to which the U.S. 
+ * has embargoed goods and services. 
+ *
+ * END_NSC_LIC_BSD */
+
+/* NSC_LIC_GPL
+ *
+ * National Semiconductor Corporation Gnu General Public License for Durango
+ *
+ * (GPL License with Export Notice)
+ *
+ * Copyright (c) 1999-2001
+ * National Semiconductor Corporation.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted under the terms of the GNU General 
+ * Public License as published by the Free Software Foundation; either 
+ * version 2 of the License, or (at your option) any later version  
+ *
+ * In addition to the terms of the GNU General Public License, neither 
+ * the name of the National Semiconductor Corporation nor the names of 
+ * its contributors may be used to endorse or promote products derived 
+ * from this software without specific prior written permission. 
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+ * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, 
+ * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE. See the GNU General Public License for more details. 
+ *
+ * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
+ * YOUR JURISDICTION. It is licensee's responsibility to comply with 
+ * any export regulations applicable in licensee's jurisdiction. Under 
+ * CURRENT (2001) U.S. export regulations this software 
+ * is eligible for export from the U.S. and can be downloaded by or 
+ * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
+ * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
+ * Syria, Sudan, Afghanistan and any other country to which the U.S. 
+ * has embargoed goods and services. 
+ *
+ * You should have received a copy of the GNU General Public License 
+ * along with this file; if not, write to the Free Software Foundation, 
+ * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 
+ *
+ * END_NSC_LIC_GPL */
+
+#define	FS450_DIRECTREG	0
+
+#include "tv_fs450.h"
+
+/*==========================================================================
+*
+*	Macros
+*
+*==========================================================================
+*/
+
+#undef		fsmax
+#undef		fsmin
+#define		fsmax(a, b)		((a) > (b) ? (a) : (b))
+#define		fsmin(a, b)		((a) < (b) ? (a) : (b))
+
+#undef range_limit
+#define range_limit(val,min_val,max_val) (fsmax((min_val),fsmin((val),(max_val))))
+
+/*==========================================================================
+*
+*	Registers
+*
+*==========================================================================
+*/
+
+#define MAX_REGISTERS	32
+#define MAX_BITS		32
+
+#define READ	1
+#define WRITE	2
+#define READ_WRITE (READ | WRITE)
+
+typedef struct
+{
+   char *name;
+   unsigned long offset;
+   unsigned char bit_length;
+   unsigned char valid_bits;
+   unsigned char read_write;
+   char *bitfield_names[MAX_BITS];
+}
+S_REGISTER_DESCRIP;
+
+typedef struct
+{
+   int source;
+   char *name;
+   S_REGISTER_DESCRIP registers[MAX_REGISTERS];
+}
+S_SET_DESCRIP;
+
+const S_SET_DESCRIP *houston_regs(void);
+const S_SET_DESCRIP *encoder_regs(void);
+const S_SET_DESCRIP *macrovision_regs(void);
+const S_SET_DESCRIP *gcc_regs(void);
+
+/*==========================================================================
+*
+*	Houston Register Addresses & Bit Definitions
+*
+*==========================================================================
+*/
+
+#define	HOUSTON_IHO				0x00	/*Input Horizontal Offset */
+#define	HOUSTON_IVO				0x02	/*Input Vertical Offset */
+#define	HOUSTON_IHA				0x04	/*Input Horizontal Active Width */
+#define	HOUSTON_VSC				0x06	/*Vertical Scaling Coeficient */
+#define	HOUSTON_HSC				0x08	/*Horizontal Scaling Coeficient */
+#define	HOUSTON_BYP				0x0A	/*Bypass Register */
+#define	HOUSTON_CR				0x0C	/*Control Register */
+#define	HOUSTON_SP				0x0E	/*Status */
+#define	HOUSTON_NCONL			0x10	/*NCO numerator low word */
+#define	HOUSTON_NCONH			0x12	/*NCO numerator high word */
+#define	HOUSTON_NCODL			0x14	/*NCO denominator low word */
+#define	HOUSTON_NCODH			0x16	/*NCO denominator high word */
+#define	HOUSTON_APO				0x18 /**/
+#define	HOUSTON_ALO				0x1A /**/
+#define	HOUSTON_AFO				0x1C /**/
+#define	HOUSTON_HSOUTWID		0x1E /**/
+#define	HOUSTON_HSOUTST			0x20 /**/
+#define	HOUSTON_HSOUTEND		0x22 /**/
+#define	HOUSTON_SHP				0x24	/*Sharpness */
+#define	HOUSTON_FLK				0x26	/*Flicker Filter */
+#define	HOUSTON_BCONTL			0x28 /**/
+#define	HOUSTON_BCONTH			0x2A /**/
+#define	HOUSTON_BDONE			0x2C /**/
+#define	HOUSTON_BDIAGL			0x2E /**/
+#define	HOUSTON_BDIAGH			0x30 /**/
+#define	HOUSTON_REV				0x32 /**/
+#define	HOUSTON_MISC			0x34 /**/
+#define	HOUSTON_FFO				0x36 /**/
+#define	HOUSTON_FFO_LAT			0x38 /**/
+#define HOUSTON_VSOUTWID		0x3A
+#define HOUSTON_VSOUTST			0x3C
+#define HOUSTON_VSOUTEND		0x3E
+/*//	BYP Register Bits*/
+#define	BYP_RGB_BYPASS			0x0001
+#define	BYP_HDS_BYPASS			0x0002
+#define	BYP_HDS_TBYPASS			0x0004
+#define	BYP_CAC_BYPASS			0x0008
+#define	BYP_R2V_SBYPASS			0x0010
+#define	BYP_R2V_BYPASS			0x0020
+#define	BYP_VDS_BYPASS			0x0040
+#define	BYP_FFT_BYPASS			0x0080
+#define	BYP_FIF_BYPASS			0x0100
+#define	BYP_FIF_TBYPASS			0x0200
+#define	BYP_HUS_BYPASS			0x0400
+#define	BYP_HUS_TBYPASS			0x0800
+#define	BYP_CCR_BYPASS			0x1000
+#define	BYP_PLL_BYPASS			0x2000
+#define	BYP_NCO_BYPASS			0x4000
+#define	BYP_ENC_BYPASS			0x8000
+/*//	CR Register Bits*/
+#define	CR_RESET				0x0001
+#define	CR_CLKOFF				0x0002
+#define	CR_NCO_EN				0x0004
+#define	CR_COMPOFF				0x0008
+#define	CR_YCOFF				0x0010
+#define	CR_LP_EN				0x0020
+#define	CR_CACQ_CLR				0x0040
+#define	CR_FFO_CLR				0x0080
+#define	CR_656_PAL_NTSC			0x0100
+#define	CR_656_STD_VMI			0x0200
+#define	CR_OFMT					0x0400
+#define	CR_UIM_CLK				0x0800
+#define	CR_UIM_DEC				0x1000
+#define	CR_BIPGEN_EN1			0x2000
+#define	CR_UIM_MOD0				0x4000
+#define	CR_UIM_MOD1				0x8000
+/*//	Status Register Bits*/
+#define	SP_CACQ_ST				0x0001
+#define	SP_FFO_ST				0x0002
+#define	SP_REVID_MASK			0x7FFC
+#define	SP_MV_EN				0x8000
+/*//	BDONE Register Bits*/
+#define	BDONE_BIST_DONE_A		0x0001
+#define	BDONE_BIST_DONE_B		0x0002
+#define	BDONE_BIST_DONE_C		0x0004
+#define	BDONE_BIST_DONE_D		0x0008
+#define	BDONE_BIST_DONE_E		0x0010
+#define	BDONE_BIST_DONE_F		0x0020
+#define	BDONE_BIST_DONE_G		0x0040
+/*//	BDIAGL Register Bits*/
+#define	BDIAGL_BIST_DIAG_A		0x000F
+#define	BDIAGL_BIST_DIAG_B		0x00F0
+#define	BDIAGL_BIST_DIAG_C		0x0F00
+#define	BDIAGL_BIST_DIAG_D		0xF000
+/*//	BDIAGH Register Bits*/
+#define	BDIAGH_BIST_DIAG_E		0x000F
+#define	BDIAGH_BIST_DIAG_F		0x000F
+#define	BDIAGH_BIST_DIAG_G		0x000F
+/*//	MISC Register Bits*/
+#define	MISC_TV_SHORT_FLD		0x0001
+#define	MISC_ENC_TEST			0x0002
+#define	MISC_DAC_TEST			0x0004
+#define	MISC_MV_SOFT_EN			0x0008
+#define	MISC_NCO_LOAD0			0x0010
+#define	MISC_NCO_LOAD1			0x0020
+#define	MISC_VGACKDIV			0x0200
+#define	MISC_BRIDGE_SYNC		0x0400
+#define	MISC_GTLIO_PD			0x8000
+/*==========================================================================
+*
+*	Encoder Registers & Bit Definitions
+*
+*==========================================================================
+*/
+#define	ENC_CHROMA_FREQ		0x40
+#define	ENC_CHROMA_PHASE	0x44
+#define	ENC_REG05			0x45
+#define	ENC_REG06			0x46
+#define	ENC_REG07			0x47
+#define	ENC_HSYNC_WIDTH		0x48
+#define	ENC_BURST_WIDTH		0x49
+#define	ENC_BACK_PORCH		0x4A
+#define	ENC_CB_BURST_LEVEL	0x4B
+#define	ENC_CR_BURST_LEVEL	0x4C
+#define	ENC_SLAVE_MODE		0x4D
+#define	ENC_BLACK_LEVEL		0x4e
+#define	ENC_BLANK_LEVEL		0x50
+#define	ENC_NUM_LINES		0x57
+#define	ENC_WHITE_LEVEL		0x5e
+#define	ENC_CB_GAIN			0x60
+#define	ENC_CR_GAIN			0x62
+#define	ENC_TINT			0x65
+#define	ENC_BREEZE_WAY		0x69
+#define	ENC_FRONT_PORCH		0x6C
+#define	ENC_ACTIVELINE		0x71
+#define	ENC_FIRST_LINE		0x73
+#define	ENC_REG34			0x74
+#define	ENC_SYNC_LEVEL		0x75
+#define	ENC_VBI_BLANK_LEVEL	0x7C
+#define	ENC_RESET			0x7e
+#define	ENC_NOTCH_FILTER	0x8d
+/*==========================================================================
+*
+*	Macrovision Registers & Bit Definitions
+*
+*==========================================================================
+*/
+#define		MV_N0			0x59
+#define		MV_N1			0x52
+#define		MV_N2			0x7b
+#define		MV_N3			0x53
+#define		MV_N4			0x79
+#define		MV_N5			0x5d
+#define		MV_N6			0x7a
+#define		MV_N7			0x64
+#define		MV_N8			0x54
+#define		MV_N9			0x55
+#define		MV_N10			0x56
+#define		MV_N11			0x6d
+#define		MV_N12			0x6f
+#define		MV_N13			0x5a
+#define		MV_N14			0x5b
+#define		MV_N15			0x5c
+#define		MV_N16			0x63
+#define		MV_N17			0x66
+#define		MV_N18			0x68
+#define		MV_N19			0x67
+#define		MV_N20			0x61
+#define		MV_N21			0x6a
+#define		MV_N22			0x76
+#define		MV_AGC_PULSE_LEVEL	0x77
+#define		MV_BP_PULSE_LEVEL	0x78
+/*==========================================================================
+*
+*	The TRACE macro can be used to display debug information.  It can display
+*	one or more parameters in a formatted string like printf.  No code will be
+*	generated for a release build.  Use double parentheses for compatibility
+*	with C #define statements.  Newline characters are not added
+*	automatically.  Usage example:
+*
+*	TRACE(("Number is %d, Name is %s.\n",iNumber,lpszName))
+*
+*==========================================================================
+*/
+/*//#ifdef _DEBUG*/
+/*//void trace(const char *p_fmt,...);*/
+/*//#define TRACE(parameters) {trace parameters;}*/
+/*//#else*/
+#define TRACE(parameters) {}
+/*//#endif*/
+/****/
+/*//	GCC timing structure.*/
+/****/
+      typedef struct _S_TIMING_SPECS
+{
+   int vga_width;
+   int vga_lines;
+   int tv_width;
+   int tv_lines;
+   int h_total;
+   int h_sync;
+   int v_total;
+   int v_sync;
+}
+S_TIMING_SPECS;
+
+/****/
+/*//	Revision of Houston chip*/
+/****/
+#define HOUSTON_REV_A 0
+#define HOUSTON_REV_B 1
+static int houston_Rev(void);
+
+/*==========================================================================
+*
+*	Functions
+*
+*==========================================================================
+*/
+
+static int houston_init(void);
+
+static unsigned char PLAL_FS450_i2c_address(void);
+static int PLAL_FS450_UIM_mode(void);
+static int PLAL_ReadRegister(S_REG_INFO * p_reg);
+static int PLAL_WriteRegister(const S_REG_INFO * p_reg);
+static int PLAL_IsTVOn(void);
+static int PLAL_EnableVga(void);
+static int PLAL_PrepForTVout(void);
+static int PLAL_SetTVTimingRegisters(const S_TIMING_SPECS * p_specs);
+static int PLAL_FinalEnableTVout(unsigned long vga_mode);
+
+/****/
+/*Direct Memory Access Functions*/
+/****/
+/*NOTE: Cx5530 is assumed hardcoded at 0x10000 offset*/
+/*from MediaGX base. F4Bar is bogus as described in the*/
+/*Cx5530 datasheet (actually points to GX frame buffer).*/
+/****/
+static int
+DMAL_ReadUInt32(unsigned long phys_addr, unsigned long *p_data)
+{
+   *p_data = READ_REG32(phys_addr);
+   return 0;
+}
+
+static int
+DMAL_WriteUInt32(unsigned long phys_addr, unsigned long data)
+{
+   WRITE_REG32(phys_addr, data);
+   return 0;
+}
+
+/****/
+/*Houston register access functions.*/
+/****/
+static int
+houston_ReadReg(unsigned int reg, unsigned long *p_value, unsigned int bytes)
+{
+   return gfx_i2c_read(1, PLAL_FS450_i2c_address(), (unsigned char)reg,
+		       (unsigned char)bytes, (unsigned char *)p_value);
+}
+
+static int
+houston_WriteReg(unsigned int reg, unsigned long value, unsigned int bytes)
+{
+   return gfx_i2c_write(1, PLAL_FS450_i2c_address(), (unsigned char)reg,
+			(unsigned char)bytes, (unsigned char *)&value);
+}
+
+/****/
+/*TV configuration functions.*/
+/****/
+static int config_init(void);
+static const S_TIMING_SPECS *p_specs(void);
+static void config_power(int on);
+static void config_vga_mode(unsigned long vga_mode);
+static void config_tv_std(unsigned long tv_std, unsigned int trigger_bits);
+static void conget_tv_std(unsigned long *p_tv_std);
+static unsigned long supported_standards(void);
+static void config_tvout_mode(unsigned long tvout_mode);
+static void conget_tvout_mode(unsigned long *p_tvout_mode);
+static void config_overscan_xy(unsigned long tv_std, unsigned long vga_mode,
+			       int overscan_x, int overscan_y, int pos_x,
+			       int pos_y);
+static void config_nco(unsigned long tv_std, unsigned long vga_mode);
+static void config_sharpness(int sharpness);
+static void conget_sharpness(int *p_sharpness);
+static void config_flicker(int flicker);
+static void conget_flicker(int *p_flicker);
+static void config_color(int color);
+static void conget_color(int *p_color);
+static void config_brightness_contrast(unsigned long tv_std,
+				       unsigned int trigger_bits,
+				       int brightness, int contrast);
+static void conget_brightness_contrast(unsigned long tv_std,
+				       unsigned int trigger_bits,
+				       int *p_brightness, int *p_contrast);
+static void config_yc_filter(unsigned long tv_std, int luma_filter,
+			     int chroma_filter);
+static void conget_yc_filter(int *p_luma_filter, int *p_chroma_filter);
+static void config_macrovision(unsigned long tv_std,
+			       unsigned int cp_trigger_bits);
+static void conget_macrovision(unsigned long tv_std,
+			       unsigned int *p_cp_trigger_bits);
+
+/****/
+/*Device settings.*/
+/****/
+typedef struct _S_DEVICE_SETTINGS
+{
+   int tv_on;
+   unsigned long vga_mode;
+   unsigned long tv_std;
+   unsigned long tvout_mode;
+   int overscan_x;
+   int overscan_y;
+   int position_x;
+   int position_y;
+   int sharpness;
+   int flicker;
+   int color;
+   int brightness;
+   int contrast;
+   unsigned char yc_filter;
+   unsigned int aps_trigger_bits;
+   int last_overscan_y;
+}
+S_DEVICE_SETTINGS;
+
+static S_DEVICE_SETTINGS d;
+
+/*//==========================================================================*/
+/****/
+/*TV Setup Parameters*/
+/****/
+/*//==========================================================================*/
+
+static const struct
+{
+   unsigned long chroma_freq[5];
+   unsigned short chroma_phase[5];
+   unsigned short cphase_rst[5];
+   unsigned short color[5];
+   unsigned short cr_burst_level[5];
+   unsigned short cb_burst_level[5];
+   unsigned short sys625_50[5];
+   unsigned short vsync5[5];
+   unsigned short pal_mode[5];
+   unsigned short hsync_width[5];
+   unsigned short burst_width[5];
+   unsigned short back_porch[5];
+   unsigned short front_porch[5];
+   unsigned short breeze_way[5];
+   unsigned short activeline[5];
+   unsigned short blank_level[5];
+   unsigned short vbi_blank_level[5];
+   unsigned short black_level[5];
+   unsigned short white_level[5];
+   unsigned short hamp_offset[5];
+   unsigned short sync_level[5];
+   unsigned short tv_lines[5];
+   unsigned short tv_width[5];
+   unsigned short tv_active_lines[5];
+   unsigned short tv_active_width[5];
+   unsigned char notch_filter[5];
+   unsigned short houston_cr[5];
+   unsigned short houston_ncodl[5];
+   unsigned short houston_ncodh[5];
+}
+tvsetup =
+{
+   /*     ntsc,        pal,   ntsc-eij,      pal-m,      pal-n */
+   {
+   0x1f7cf021, 0xcb8a092a, 0x1f7cf021, 0xe3efe621, 0xcb8a092a}
+   ,					/*chroma_freq */
+   {
+   0, 0, 0, 0, 0}
+   ,					/*chroma_phase */
+   {
+   2, 0, 2, 0, 0}
+   ,					/*cphase_rst */
+   {
+   54, 43, 54, 43, 43}
+   ,					/*color */
+   {
+   0, 31, 0, 29, 29}
+   ,					/*cr_burst_level */
+   {
+   59, 44, 59, 41, 41}
+   ,					/*cb_burst_level */
+   {
+   0, 1, 0, 0, 1}
+   ,					/*sys625_50 */
+   {
+   0, 1, 0, 0, 0}
+   ,					/*vsync5 */
+   {
+   0, 1, 0, 1, 1}
+   ,					/*pal_mode */
+   {
+   0x7a, 0x7a, 0x7a, 0x7a, 0x7a}
+   ,					/*hsync_width */
+   {
+   0x40, 0x3c, 0x40, 0x40, 0x3c}
+   ,					/*burst_width */
+   {
+   0x80, 0x9a, 0x80, 0x80, 0x9a}
+   ,					/*back_porch */
+   {
+   0x24, 0x1e, 0x24, 0x24, 0x1e}
+   ,					/*front_porch */
+   {
+   0x19, 0x1a, 0x19, 0x12, 0x1a}
+   ,					/*breeze_way */
+   {
+   0xb4, 0xb4, 0xb4, 0xb4, 0xb4}
+   ,					/*active_line */
+   {
+   240, 251, 240, 240, 240}
+   ,					/*blank_level */
+   {
+   240, 251, 240, 240, 240}
+   ,					/*vbi_blank_level */
+   {
+   284, 252, 240, 252, 252}
+   ,					/*black_level */
+   {
+   823, 821, 823, 821, 821}
+   ,					/*white_level */
+   {
+   60, 48, 60, 48, 48}
+   ,					/*hamp_offset */
+   {
+   0x08, 0x08, 0x08, 0x08, 0x08}
+   ,					/*sync_level */
+   {
+   525, 625, 525, 525, 625}
+   ,					/*tv_lines */
+   {
+   858, 864, 858, 858, 864}
+   ,					/*tv_width */
+   {
+   487, 576, 487, 487, 576}
+   ,					/*tv_active_lines */
+   {
+   800, 800, 800, 800, 800}
+   ,					/*tv_active_width */
+   {
+   0x1a, 0x1d, 0x1a, 0x1d, 0x1d}
+   ,					/*notch filter enabled */
+   {
+   0x0000, 0x0100, 0x0000, 0x0000, 0x0100}
+   ,					/*houston cr pal */
+   {
+   0x7e48, 0xf580, 0x7e48, 0x7e48, 0xf580}
+   ,					/*houston ncodl */
+   {
+   0x001b, 0x0020, 0x001b, 0x001b, 0x0020}	/*houston ncodh */
+};
+
+/****/
+/*MediaGX default underscan and centered position setups.*/
+/****/
+#define	SCANTABLE_ENTRIES	5
+struct _scantable
+{
+   unsigned long mode;
+   unsigned short v_total[5];
+   unsigned short v_sync[5];
+   unsigned short iha[5];
+   signed short iho[5];
+   signed short hsc[5];
+};
+
+static struct _scantable scantable[SCANTABLE_ENTRIES] = {
+   {
+    GFX_VGA_MODE_640X480,
+    {617, 624, 617, 624, 624},		/*v_total */
+    {69, 88, 69, 88, 88},		/*v_sync */
+    {720, 720, 720, 720, 720},		/*iha */
+    {0, 0, 0, 0, 0},			/*iho */
+    {-12, 0, -6, 0, 0}			/*hsc */
+    },
+   {
+    GFX_VGA_MODE_800X600,
+    {740, 740, 740, 740, 740},		/*v_total */
+    {90, 88, 90, 88, 88},		/*v_sync */
+    {720, 720, 508, 720, 720},		/*iha */
+    {-8, 11, -8, -8, 11},		/*iho */
+    {-27, -27, -27, -27, -27}		/*hsc */
+    },
+   {
+    GFX_VGA_MODE_720X487,
+    {525, 720, 525, 720, 720},		/*v_total */
+    {23, 230, 23, 230, 230},		/*v_sync */
+    {720, 720, 720, 720, 720},		/*iha */
+    {0xa2, 0xa2, 0xa2, 0xa2, 0xa2},	/*iho */
+    {0, 0, 0, 0, 0}			/*hsc */
+    },
+   {
+    GFX_VGA_MODE_720X576,
+    {720, 625, 720, 625, 625},		/*v_total */
+    {129, 25, 129, 25, 25},		/*v_sync */
+    {720, 720, 720, 720, 720},		/*iha */
+    {0xaa, 0xaa, 0xaa, 0xaa, 0xaa},	/*iho */
+    {0, 0, 0, 0, 0}			/*hsc */
+    },
+   {
+    GFX_VGA_MODE_1024X768,
+    {933, 942, 933, 806, 806},		/*v_total */
+    {121, 112, 121, 88, 88},		/*v_sync */
+    {600, 600, 600, 600, 600},		/*iha */
+    {0x3c, 0x23, 0x3c, 0x65, 0x65},	/*iho */
+    {35, 26, 35, 26, 26}		/*hsc */
+    },
+};
+
+/****/
+/*Houston fifo configuration constants.*/
+/****/
+struct _ffolat
+{
+   int v_total;
+   unsigned short ffolat;
+};
+
+struct _ffolativo
+{
+   int v_total;
+   unsigned short ivo;
+   unsigned short ffolat;
+};
+
+/*h_total=832, ivo=40, tv_width=858, tv_lines=525, vga_lines=480*/
+#define SIZE6X4NTSC		66
+static struct _ffolat ffo6x4ntsc[SIZE6X4NTSC + 1] = {
+   {541, 0x40}, {545, 0x40}, {549, 0x40}, {553, 0x40},
+   {557, 0x58}, {561, 0x40}, {565, 0x40}, {569, 0x40},
+   {573, 0x48}, {577, 0x40}, {581, 0x40}, {585, 0x40},
+   {589, 0x40}, {593, 0x48}, {597, 0x40}, {601, 0x40},
+   {605, 0x40}, {609, 0x40}, {613, 0x5b}, {617, 0x48},
+   {621, 0x60}, {625, 0x48}, {629, 0x48}, {633, 0x40},
+   {637, 0x5e}, {641, 0x40}, {645, 0x50}, {649, 0x56},
+   {653, 0x58}, {657, 0x6c}, {661, 0x40}, {665, 0x40},
+   {669, 0x40}, {673, 0x40}, {677, 0x40}, {681, 0x40},
+   {685, 0x40}, {689, 0x40}, {693, 0x40}, {697, 0x40},
+   {701, 0x40}, {705, 0x40}, {709, 0x40}, {713, 0x40},
+   {717, 0x40}, {721, 0x40}, {725, 0x40}, {729, 0x40},
+   {733, 0x40}, {737, 0x40}, {741, 0x40}, {745, 0x40},
+   {749, 0x40}, {753, 0x40}, {757, 0x40}, {761, 0x40},
+   {765, 0x40}, {769, 0x40}, {773, 0x40}, {777, 0x40},
+   {781, 0x40}, {785, 0x40}, {789, 0x40}, {793, 0x40},
+   {797, 0x30}, {801, 0x40},
+   {-1, 0}
+};
+
+#define SIZE6X4PAL		45
+static struct _ffolat ffo6x4pal[SIZE6X4PAL + 1] = {
+   {625, 0x60}, {629, 0x60}, {633, 0x60}, {637, 0x60},
+   {641, 0x50}, {645, 0x60}, {649, 0x60}, {653, 0x60},
+   {657, 0x60}, {661, 0x60}, {665, 0x60}, {669, 0x60},
+   {673, 0x60}, {677, 0x60}, {681, 0x60}, {685, 0x60},
+   {689, 0x60}, {693, 0x60}, {697, 0x60}, {701, 0x60},
+   {705, 0x60}, {709, 0x60}, {713, 0x60}, {717, 0x60},
+   {721, 0x60}, {725, 0x60}, {729, 0x60}, {733, 0x60},
+   {737, 0x60}, {741, 0x60}, {745, 0x60}, {749, 0x60},
+   {753, 0x60}, {757, 0x60}, {761, 0x60}, {765, 0x60},
+   {769, 0x60}, {773, 0x60}, {777, 0x60}, {781, 0x60},
+   {785, 0x60}, {789, 0x60}, {793, 0x60}, {797, 0x60},
+   {801, 0x60},
+   {-1, 0}
+};
+
+#define SIZE7X4NTSC		40
+static struct _ffolat ffo7x4ntsc[SIZE7X4NTSC + 1] = {
+   {525, 0x52}, {529, 0x52}, {533, 0x52}, {537, 0x52},
+   {541, 0x52}, {545, 0x40}, {549, 0x40}, {553, 0x40},
+   {557, 0x58}, {561, 0x40}, {565, 0x58}, {569, 0x40},
+   {573, 0x48}, {577, 0x40}, {581, 0x40}, {585, 0x40},
+   {589, 0x40}, {593, 0x48}, {597, 0x40}, {601, 0x40},
+   {605, 0x40}, {609, 0x40}, {613, 0x5b}, {617, 0x48},
+   {621, 0x60}, {625, 0x48}, {629, 0x48}, {633, 0x40},
+   {637, 0x5e}, {641, 0x40}, {645, 0x50}, {649, 0x56},
+   {653, 0x58}, {657, 0x6c}, {661, 0x40}, {665, 0x40},
+   {669, 0x40}, {673, 0x40}, {677, 0x40}, {681, 0x40},
+   {-1, 0}
+};
+
+#define SIZE7X4PAL		24
+static struct _ffolat ffo7x4pal[SIZE7X4PAL + 1] = {
+   {625, 0x60}, {629, 0x60}, {633, 0x60}, {637, 0x60},
+   {641, 0x50}, {645, 0x60}, {649, 0x60}, {653, 0x60},
+   {657, 0x60}, {661, 0x60}, {665, 0x60}, {669, 0x60},
+   {673, 0x60}, {677, 0x60}, {681, 0x60}, {685, 0x60},
+   {689, 0x60}, {693, 0x60}, {697, 0x60}, {701, 0x60},
+   {705, 0x60}, {709, 0x60}, {713, 0x60}, {717, 0x60},
+   {-1, 0}
+};
+
+#define SIZE7X5NTSC		54
+static struct _ffolat ffo7x5ntsc[SIZE7X5NTSC + 1] = {
+   {590, 0x40}, {594, 0x48}, {598, 0x40}, {602, 0x40},
+   {606, 0x40}, {610, 0x40}, {614, 0x5b}, {618, 0x48},
+   {622, 0x60}, {626, 0x48}, {630, 0x48}, {634, 0x40},
+   {638, 0x5e}, {642, 0x40}, {646, 0x50}, {650, 0x56},
+   {654, 0x58}, {658, 0x6c}, {662, 0x40}, {666, 0x40},
+   {670, 0x40}, {674, 0x40}, {678, 0x40}, {682, 0x40},
+   {686, 0x40}, {690, 0x40}, {694, 0x40}, {698, 0x40},
+   {702, 0x40}, {706, 0x40}, {710, 0x40}, {714, 0x40},
+   {718, 0x40}, {722, 0x40}, {726, 0x40}, {730, 0x40},
+   {734, 0x40}, {738, 0x40}, {742, 0x40}, {746, 0x40},
+   {750, 0x40}, {754, 0x40}, {758, 0x40}, {762, 0x40},
+   {766, 0x40}, {770, 0x40}, {774, 0x40}, {778, 0x40},
+   {782, 0x40}, {786, 0x40}, {790, 0x40}, {794, 0x40},
+   {798, 0x30}, {802, 0x40},
+   {-1, 0}
+};
+
+#define SIZE7X5PAL		45
+static struct _ffolat ffo7x5pal[SIZE7X5PAL + 1] = {
+   {625, 0x60}, {629, 0x60}, {633, 0x60}, {637, 0x60},
+   {641, 0x50}, {645, 0x60}, {649, 0x60}, {653, 0x60},
+   {657, 0x60}, {661, 0x60}, {665, 0x60}, {669, 0x60},
+   {673, 0x60}, {677, 0x60}, {681, 0x60}, {685, 0x60},
+   {689, 0x60}, {693, 0x60}, {697, 0x60}, {701, 0x60},
+   {705, 0x60}, {709, 0x60}, {713, 0x60}, {717, 0x60},
+   {721, 0x60}, {725, 0x60}, {729, 0x60}, {733, 0x60},
+   {737, 0x60}, {741, 0x60}, {745, 0x60}, {749, 0x60},
+   {753, 0x60}, {757, 0x60}, {761, 0x60}, {765, 0x60},
+   {769, 0x60}, {773, 0x60}, {777, 0x60}, {781, 0x60},
+   {785, 0x60}, {789, 0x60}, {793, 0x60}, {797, 0x60},
+   {801, 0x60},
+   {-1, 0}
+};
+
+/*h_total=1056, vga_lines=600*/
+#define	SIZE8X6NTSC		37
+static struct _ffolat ffo8x6ntsc[SIZE8X6NTSC + 1] = {
+   {620, 0x40},				/*v_total_min >= vsync+10 >= vga_lines+10 = 610 */
+   {625, 0x58}, {630, 0x40}, {635, 0x40}, {640, 0x40},
+   {645, 0x46}, {650, 0x46}, {655, 0x4f}, {660, 0x4c},
+   {665, 0x4a}, {670, 0x50}, {675, 0x2f}, {680, 0x48},
+   {685, 0x38}, {690, 0x31}, {695, 0x40}, {700, 0x21},
+   {705, 0x25}, {710, 0x40}, {715, 0x48}, {720, 0x50},
+   {725, 0x30}, {730, 0x50}, {735, 0x50}, {740, 0x50},
+   {745, 0x40}, {750, 0x38}, {755, 0x50}, {760, 0x50},
+   {765, 0x40}, {770, 0x38}, {775, 0x40}, {780, 0x40},
+   {785, 0x40}, {790, 0x38}, {795, 0x50}, {800, 0x50},
+   {-1, 0}
+};
+
+/*h_total=1056, vga_lines=600*/
+#define	SIZE8X6PAL		36
+static struct _ffolat ffo8x6pal[SIZE8X6PAL + 1] = {
+   {625, 0x80}, {630, 0x80}, {635, 0x5a}, {640, 0x55},
+   {645, 0x48}, {650, 0x65}, {655, 0x65}, {660, 0x50},
+   {665, 0x80}, {670, 0x70}, {675, 0x56}, {680, 0x80},
+   {685, 0x58}, {690, 0x31}, {695, 0x80}, {700, 0x60},
+   {705, 0x45}, {710, 0x4a}, {715, 0x50}, {720, 0x50},
+   {725, 0x50}, {730, 0x45}, {735, 0x50}, {740, 0x50},
+   {745, 0x50}, {750, 0x50}, {755, 0x50}, {760, 0x50},
+   {765, 0x50}, {770, 0x50}, {775, 0x50}, {780, 0x50},
+   {785, 0x50}, {790, 0x50}, {795, 0x50}, {800, 0x50},
+   {-1, 0}
+};
+
+/*h_total=1344, vga_lines=768*/
+#define	SIZE10X7NTSC		45
+static struct _ffolativo ffo10x7ntsc[SIZE10X7NTSC] = {
+   {783, 0x4d, 0x40},
+   {789, 0x47, 0x14},
+   {795, 0x47, 0x7f},
+   {801, 0x47, 0x53},
+   {807, 0x47, 0x11},
+   {813, 0x47, 0x78},
+   {819, 0x47, 0x54},
+   {825, 0x47, 0x40},
+   {831, 0x47, 0x0f},
+   {837, 0x4d, 0x40},
+   {843, 0x47, 0x5a},
+   {849, 0x4d, 0x40},
+   {855, 0x47, 0x4b},
+   {861, 0x4d, 0x40},
+   {867, 0x47, 0x4b},
+   {873, 0x4d, 0x40},
+   {879, 0x47, 0x07},
+   {885, 0x48, 0x20},
+   {891, 0x47, 0x82},
+   {897, 0x47, 0x60},
+   {903, 0x47, 0x7f},
+   {909, 0x4d, 0x40},
+   {915, 0x48, 0x40},
+   {921, 0x4c, 0x40},
+   {927, 0x49, 0x40},
+   {933, 0x48, 0x40},
+   {939, 0x4a, 0x40},
+   {945, 0x46, 0x40},
+   {951, 0x4a, 0x40},
+   {957, 0x4a, 0x40},
+   {963, 0x4b, 0x40},
+   {969, 0x4b, 0x40},
+   {975, 0x48, 0x40},
+   {981, 0x47, 0x40},
+   {987, 0x47, 0x40},
+   {993, 0x47, 0x40},
+   {999, 0x48, 0x40},
+   {1005, 0x48, 0x40},
+   {1011, 0x47, 0x40},
+   {1017, 0x47, 0x40},
+   {1023, 0x48, 0x40},
+   {1029, 0x48, 0x40},
+   {1035, 0x46, 0x40},
+   {1041, 0x47, 0x40},
+   {1047, 0x47, 0x40}
+};
+
+/*h_total=1344, vga_lines=768*/
+#define	SIZE10X7PAL		46
+static struct _ffolativo ffo10x7pal[SIZE10X7PAL] = {
+   {781, 0x49, 0x40},
+   {787, 0x46, 0x40},
+   {793, 0x48, 0x40},
+   {799, 0x46, 0x40},
+   {805, 0x49, 0x40},
+   {811, 0x47, 0x40},
+   {817, 0x46, 0x40},
+   {823, 0x46, 0x56},
+   {829, 0x46, 0x2d},
+   {835, 0x46, 0x40},
+   {841, 0x46, 0x2d},
+   {847, 0x46, 0x3f},
+   {853, 0x46, 0x10},
+   {859, 0x46, 0x86},
+   {865, 0x46, 0xc9},
+   {871, 0x46, 0x83},
+   {877, 0x46, 0xa8},
+   {883, 0x46, 0x81},
+   {889, 0x46, 0xa5},
+   {895, 0x46, 0xa9},
+   {901, 0x46, 0x81},
+   {907, 0x46, 0xa4},
+   {913, 0x46, 0xa5},
+   {919, 0x46, 0x7f},
+   {925, 0x46, 0xa2},
+   {931, 0x46, 0x9d},
+   {937, 0x46, 0xc1},
+   {943, 0x46, 0x96},
+   {949, 0x46, 0xb7},
+   {955, 0x46, 0xb1},
+   {961, 0x46, 0x8a},
+   {967, 0x46, 0xa9},
+   {973, 0x46, 0xa0},
+   {979, 0x46, 0x40},
+   {985, 0x46, 0x97},
+   {991, 0x46, 0xb5},
+   {997, 0x46, 0xaa},
+   {1003, 0x46, 0x83},
+   {1009, 0x46, 0x9f},
+   {1015, 0x47, 0x40},
+   {1021, 0x46, 0xad},
+   {1027, 0x46, 0x87},
+   {1033, 0x46, 0xa2},
+   {1039, 0x47, 0x40},
+   {1045, 0x46, 0xac},
+   {1051, 0x46, 0x86}
+};
+
+/*//==========================================================================*/
+/****/
+/*FS450 API Functions.*/
+/****/
+/*//==========================================================================*/
+
+/****/
+/*Initialize device settings*/
+/****/
+static void
+initialize_houston_static_registers(void)
+{
+   houston_WriteReg(HOUSTON_BYP, 0, 2);
+   houston_WriteReg(HOUSTON_APO, 0, 2);
+   houston_WriteReg(HOUSTON_ALO, 0, 2);
+   houston_WriteReg(HOUSTON_AFO, 0, 2);
+   houston_WriteReg(HOUSTON_BCONTL, 0, 2);
+   houston_WriteReg(HOUSTON_BCONTH, 0, 2);
+   houston_WriteReg(HOUSTON_BDONE, 0, 2);
+   houston_WriteReg(HOUSTON_BDIAGL, 0, 2);
+   houston_WriteReg(HOUSTON_BDIAGH, 0, 2);
+   houston_WriteReg(HOUSTON_MISC, 0, 2);
+}
+
+int
+FS450_init(void)
+{
+   int err;
+
+   TRACE(("FS450_Init()\n"))
+
+	 err = houston_init();
+   if (err)
+      return err;
+
+   initialize_houston_static_registers();
+
+#if 1
+   d.tv_on = PLAL_IsTVOn()? 1 : 0;
+#else
+   d.tv_on = 0;
+#endif
+
+#if 1
+   /*get the current tv standard */
+   conget_tv_std(&d.tv_std);
+#else
+   /*default to VP_TV_STANDARD_NTSC_M */
+   d.tv_std = VP_TV_STANDARD_NTSC_M;
+   config_tv_std(d.tv_std);
+#endif
+
+   d.vga_mode = 0;
+
+#if 0
+   /*get the current tvout mode */
+   conget_tvout_mode(&d.tvout_mode);
+#else
+   /*default to VP_TVOUT_MODE_CVBS_YC */
+   d.tvout_mode = GFX_TVOUT_MODE_CVBS_YC;
+#endif
+
+#if 0
+   /*get the current sharpness */
+   conget_sharpness(d.sharpness);
+#else
+   /*default to 1000 out of 1000 */
+   d.sharpness = 1000;
+   config_sharpness(d.sharpness);
+#endif
+
+#if 0
+   /*get the current flicker */
+   conget_flicker(d.flicker);
+#else
+   /*default to 800 out of 1000 */
+   d.flicker = 800;
+   config_flicker(d.flicker);
+#endif
+
+#if 0
+   /*get the current size and position */
+#else
+   /*default to zeros */
+   d.overscan_x = 0;
+   d.overscan_y = 0;
+   d.position_x = 0;
+   d.position_y = 0;
+#endif
+
+#if 0
+   /*get the current color */
+   conget_color(d.color);
+#else
+   d.color = 50;
+   /*//d.color = tvsetup.color[k]; */
+   config_color(d.color);
+#endif
+
+#if 0
+   /*get the current brightness and contrast */
+   conget_brightness_contrast(d.tv_std, d.aps_trigger_bits, d.brightness,
+			      d.contrast);
+#else
+   /*default */
+   d.brightness = 50;
+   d.contrast = 60;
+   config_brightness_contrast(d.tv_std, d.aps_trigger_bits, d.brightness,
+			      d.contrast);
+#endif
+
+#if 1
+   /*get the current yc filtering */
+   {
+      int luma_filter, chroma_filter;
+
+      conget_yc_filter(&luma_filter, &chroma_filter);
+      d.yc_filter = 0;
+      if (luma_filter)
+	 d.yc_filter |= GFX_LUMA_FILTER;
+      if (chroma_filter)
+	 d.yc_filter |= GFX_CHROMA_FILTER;
+   }
+#else
+   /*default */
+   d.yc_filter = GFX_LUMA_FILTER + GFX_CHROMA_FILTER;
+#endif
+
+#if 0
+   /*get the current cp settings */
+   conget_macrovision(d.tv_std, &d.aps_trigger_bits);
+#else
+   d.aps_trigger_bits = 0;
+   config_macrovision(d.tv_std, d.aps_trigger_bits);
+#endif
+
+   d.last_overscan_y = -10000;
+
+   return 0;
+}
+
+void
+FS450_cleanup(void)
+{
+}
+
+/*//==========================================================================*/
+/****/
+/*//	Required configuration calls to write new settings to the device*/
+
+#define REQ_TV_STANDARD_BIT			0x0002
+#define REQ_VGA_MODE_BIT			0x0004
+#define REQ_TVOUT_MODE_BIT			0x0008
+#define REQ_SHARPNESS_BIT			0x0010
+#define REQ_FLICKER_BIT				0x0020
+#define REQ_OVERSCAN_POSITION_BIT	0x0040
+#define REQ_COLOR_BIT				0x0080
+#define REQ_BRIGHTNESS_CONTRAST_BIT 0x0100
+#define REQ_YC_FILTER_BIT			0x0200
+#define REQ_MACROVISION_BIT			0x0400
+#define REQ_NCO_BIT					0x1000
+
+#define REQ_TV_STANDARD			(REQ_TV_STANDARD_BIT | REQ_OVERSCAN_POSITION | REQ_BRIGHTNESS_CONTRAST | REQ_MACROVISION_BIT | REQ_YC_FILTER)
+#define REQ_VGA_MODE			(REQ_VGA_MODE_BIT | REQ_OVERSCAN_POSITION)
+#define REQ_TVOUT_MODE			(REQ_TVOUT_MODE_BIT)
+#define REQ_SHARPNESS			(REQ_SHARPNESS_BIT)
+#define REQ_FLICKER				(REQ_FLICKER_BIT)
+#define REQ_OVERSCAN_POSITION	(REQ_OVERSCAN_POSITION_BIT | REQ_NCO)
+#define REQ_COLOR				(REQ_COLOR_BIT)
+#define REQ_BRIGHTNESS_CONTRAST	(REQ_BRIGHTNESS_CONTRAST_BIT)
+#define REQ_YC_FILTER			(REQ_YC_FILTER_BIT)
+#define REQ_MACROVISION			(REQ_TV_STANDARD_BIT | REQ_BRIGHTNESS_CONTRAST_BIT | REQ_MACROVISION_BIT)
+#define REQ_NCO					(REQ_NCO_BIT)
+#define REQ_ENCODER				(REQ_TV_STANDARD | REQ_COLOR | REQ_BRIGHTNESS_CONTRAST | REQ_YC_FILTER)
+
+static int
+write_config(int req)
+{
+   unsigned long reg, reg_encoder_reset = 0;
+   int reset;
+
+   /*if we're changing the nco, and the vertical scaling has changed... */
+   reset = ((REQ_NCO_BIT & req) && (d.overscan_y != d.last_overscan_y));
+   if (reset) {
+      /*put the encoder into reset while making changes */
+      houston_ReadReg(ENC_RESET, &reg, 1);
+      houston_WriteReg(ENC_RESET, reg | 0x01, 1);
+      reg_encoder_reset = reg & 0x01;
+   }
+
+   if (REQ_TV_STANDARD_BIT & req)
+      config_tv_std(d.tv_std, d.aps_trigger_bits);
+
+   if (REQ_VGA_MODE_BIT & req)
+      config_vga_mode(d.vga_mode);
+
+   if (REQ_TVOUT_MODE_BIT & req)
+      config_tvout_mode(d.tvout_mode);
+
+   if (REQ_OVERSCAN_POSITION_BIT & req) {
+      config_overscan_xy(d.tv_std,
+			 d.vga_mode,
+			 d.overscan_x,
+			 d.overscan_y, d.position_x, d.position_y);
+
+      /*h_timing and v_timing and syncs. */
+      if (PLAL_IsTVOn())
+	 PLAL_SetTVTimingRegisters(p_specs());
+   }
+
+   if (REQ_NCO_BIT & req)
+      config_nco(d.tv_std, d.vga_mode);
+
+   if (REQ_SHARPNESS_BIT & req)
+      config_sharpness(d.sharpness);
+
+   if (REQ_FLICKER_BIT & req)
+      config_flicker(d.flicker);
+
+   if (REQ_COLOR_BIT & req)
+      config_color(d.color);
+
+   if (REQ_BRIGHTNESS_CONTRAST_BIT & req) {
+      config_brightness_contrast(d.tv_std,
+				 d.aps_trigger_bits,
+				 d.brightness, d.contrast);
+   }
+
+   if (REQ_YC_FILTER_BIT & req) {
+      config_yc_filter(d.tv_std,
+		       (d.yc_filter & GFX_LUMA_FILTER),
+		       (d.yc_filter & GFX_CHROMA_FILTER));
+   }
+
+   if (REQ_MACROVISION_BIT & req)
+      config_macrovision(d.tv_std, d.aps_trigger_bits);
+
+   /*if we decided to put the encoder into reset, put it back */
+   if (reset) {
+      houston_ReadReg(ENC_RESET, &reg, 1);
+      houston_WriteReg(ENC_RESET, reg_encoder_reset | (reg & ~0x01), 1);
+
+      d.last_overscan_y = d.overscan_y;
+   }
+   return 0;
+}
+
+/*==========================================================================*/
+/****/
+/*//	TV On*/
+
+#if GFX_TV_DYNAMIC
+int
+fs450_get_tv_enable(unsigned int *p_on)
+#else
+int
+gfx_get_tv_enable(unsigned int *p_on)
+#endif
+{
+   if (!p_on)
+      return ERR_INVALID_PARAMETER;
+
+   *p_on = d.tv_on;
+
+   return 0;
+}
+
+/*//int FS450_set_tv_on(unsigned int on)*/
+#if GFX_TV_DYNAMIC
+int
+fs450_set_tv_enable(int on)
+#else
+int
+gfx_set_tv_enable(int on)
+#endif
+{
+   unsigned long reg;
+
+   /*if not mode change, just return */
+   if ((d.tv_on && on) || (!d.tv_on && !on))
+      return 0;
+
+   /*if turning off... */
+   if (!on) {
+      /*reenable vga. */
+      PLAL_EnableVga();
+
+      /*power down houston */
+      config_power(0);
+
+      d.tv_on = 0;
+
+      return 0;
+   }
+
+   /*turning on... */
+
+   /*power up houston      */
+   config_power(1);
+
+   /*assert encoder reset. */
+   houston_WriteReg(ENC_RESET, 0x01, 1);
+
+   /*initial platform preparation */
+   PLAL_PrepForTVout();
+
+   /*configure encoder and nco. */
+   write_config(REQ_VGA_MODE |
+		REQ_TV_STANDARD |
+		REQ_TVOUT_MODE |
+		REQ_OVERSCAN_POSITION | REQ_YC_FILTER | REQ_MACROVISION);
+
+   /*set LP_EN and UIM */
+   houston_ReadReg(HOUSTON_CR, &reg, 2);
+   reg |= CR_LP_EN;
+   reg &= ~(CR_UIM_MOD0 | CR_UIM_MOD1);
+   reg |= (PLAL_FS450_UIM_mode() << 14);
+   houston_WriteReg(HOUSTON_CR, reg, 2);
+
+   /*set platform timing registers */
+   PLAL_SetTVTimingRegisters(p_specs());
+
+   PLAL_FinalEnableTVout(d.vga_mode);
+
+   /*sync bridge */
+   {
+      int retry_count = 0;
+
+      /*sync 50 times */
+      while (retry_count++ < 50) {
+	 /*sync bridge. */
+	 houston_ReadReg(HOUSTON_MISC, &reg, 2);
+	 reg |= MISC_BRIDGE_SYNC;
+	 houston_WriteReg(HOUSTON_MISC, reg, 2);
+	 reg &= ~MISC_BRIDGE_SYNC;
+	 houston_WriteReg(HOUSTON_MISC, reg, 2);
+      }
+   }
+
+   /*deassert encoder reset. */
+   houston_WriteReg(ENC_RESET, 0x00, 1);
+
+   d.tv_on = 1;
+
+   return 0;
+}
+
+#if GFX_TV_DYNAMIC
+int
+fs450_set_tv_defaults(int format)
+#else
+int
+gfx_set_tv_defaults(int format)
+#endif
+{
+   return 0;
+}
+
+/*==========================================================================*/
+/****/
+/*//	TV standard*/
+
+#if GFX_TV_DYNAMIC
+int
+fs450_get_tv_standard(unsigned long *p_standard)
+#else
+int
+gfx_get_tv_standard(unsigned long *p_standard)
+#endif
+{
+   if (!p_standard)
+      return ERR_INVALID_PARAMETER;
+
+   *p_standard = d.tv_std;
+
+   return 0;
+}
+
+#if GFX_TV_DYNAMIC
+int
+fs450_get_available_tv_standards(unsigned long *p_standards)
+#else
+int
+gfx_get_available_tv_standards(unsigned long *p_standards)
+#endif
+{
+   if (!p_standards)
+      return ERR_INVALID_PARAMETER;
+
+   *p_standards = supported_standards();
+
+   return 0;
+}
+
+#if GFX_TV_DYNAMIC
+int
+fs450_set_tv_standard(unsigned long standard)
+#else
+int
+gfx_set_tv_standard(unsigned long standard)
+#endif
+{
+   /*verify supported standard. */
+   if (!(standard & supported_standards()))
+      return ERR_INVALID_PARAMETER;
+
+   /*disallow if tv is on */
+   if (d.tv_on)
+      return ERR_CANNOT_CHANGE_WHILE_TV_ON;
+
+   d.tv_std = standard;
+/*//	d.color = tvsetup.color[k];*/
+
+   return write_config(REQ_TV_STANDARD);
+}
+
+/*==========================================================================*/
+/****/
+/*//	vga mode as known by the driver*/
+#if GFX_TV_DYNAMIC
+int
+fs450_get_tv_vga_mode(unsigned long *p_vga_mode)
+#else
+int
+gfx_get_tv_vga_mode(unsigned long *p_vga_mode)
+#endif
+{
+   if (!p_vga_mode)
+      return ERR_INVALID_PARAMETER;
+
+   *p_vga_mode = d.vga_mode;
+
+   return 0;
+}
+
+#if GFX_TV_DYNAMIC
+int
+fs450_get_available_tv_vga_modes(unsigned long *p_vga_modes)
+#else
+int
+gfx_get_available_tv_vga_modes(unsigned long *p_vga_modes)
+#endif
+{
+   if (!p_vga_modes)
+      return ERR_INVALID_PARAMETER;
+
+   *p_vga_modes =
+	 GFX_VGA_MODE_640X480 |
+	 GFX_VGA_MODE_720X487 | GFX_VGA_MODE_720X576 | GFX_VGA_MODE_800X600;
+   if (houston_Rev() >= HOUSTON_REV_B)
+      *p_vga_modes |= GFX_VGA_MODE_1024X768;
+
+   return 0;
+}
+
+#if GFX_TV_DYNAMIC
+int
+fs450_set_tv_vga_mode(unsigned long vga_mode)
+#else
+int
+gfx_set_tv_vga_mode(unsigned long vga_mode)
+#endif
+{
+   /*reject if not a single valid VGA mode */
+   switch (vga_mode) {
+   default:
+      return ERR_INVALID_PARAMETER;
+
+   case GFX_VGA_MODE_640X480:
+   case GFX_VGA_MODE_720X487:
+   case GFX_VGA_MODE_720X576:
+   case GFX_VGA_MODE_800X600:
+      break;
+
+   case GFX_VGA_MODE_1024X768:
+      if (houston_Rev() >= HOUSTON_REV_B)
+	 break;
+      return ERR_INVALID_PARAMETER;
+   }
+
+   /*if the mode has changed... */
+   if (vga_mode != d.vga_mode) {
+      d.vga_mode = vga_mode;
+
+      return write_config(REQ_VGA_MODE);
+   }
+
+   return 0;
+}
+
+/*==========================================================================*/
+/****/
+/*//	tvout mode*/
+
+#if GFX_TV_DYNAMIC
+int
+fs450_get_tvout_mode(unsigned long *p_tvout_mode)
+#else
+int
+gfx_get_tvout_mode(unsigned long *p_tvout_mode)
+#endif
+{
+   if (!p_tvout_mode)
+      return ERR_INVALID_PARAMETER;
+
+   *p_tvout_mode = d.tvout_mode;
+
+   return 0;
+}
+
+#if GFX_TV_DYNAMIC
+int
+fs450_set_tvout_mode(unsigned long tvout_mode)
+#else
+int
+gfx_set_tvout_mode(unsigned long tvout_mode)
+#endif
+{
+   d.tvout_mode = tvout_mode;
+
+   return write_config(REQ_TVOUT_MODE);
+}
+
+/*==========================================================================*/
+/****/
+/*//	Sharpness*/
+
+#if GFX_TV_DYNAMIC
+int
+fs450_get_sharpness(int *p_sharpness)
+#else
+int
+gfx_get_sharpness(int *p_sharpness)
+#endif
+{
+   if (!p_sharpness)
+      return ERR_INVALID_PARAMETER;
+
+   *p_sharpness = d.sharpness;
+
+   return 0;
+}
+
+#if GFX_TV_DYNAMIC
+int
+fs450_set_sharpness(int sharpness)
+#else
+int
+gfx_set_sharpness(int sharpness)
+#endif
+{
+   d.sharpness = range_limit(sharpness, 0, 1000);
+
+   return write_config(REQ_SHARPNESS);
+}
+
+/*==========================================================================*/
+/****/
+/*flicker filter control.*/
+
+#if GFX_TV_DYNAMIC
+int
+fs450_get_flicker_filter(int *p_flicker)
+#else
+int
+gfx_get_flicker_filter(int *p_flicker)
+#endif
+{
+   if (!p_flicker)
+      return ERR_INVALID_PARAMETER;
+
+   *p_flicker = d.flicker;
+
+   return 0;
+}
+
+#if GFX_TV_DYNAMIC
+int
+fs450_set_flicker_filter(int flicker)
+#else
+int
+gfx_set_flicker_filter(int flicker)
+#endif
+{
+   d.flicker = range_limit(flicker, 0, 1000);
+
+   return write_config(REQ_FLICKER);
+}
+
+/*==========================================================================*/
+/****/
+/*//	Overscan and Position*/
+
+#if GFX_TV_DYNAMIC
+int
+fs450_get_overscan(int *p_x, int *p_y)
+#else
+int
+gfx_get_overscan(int *p_x, int *p_y)
+#endif
+{
+   if (!p_x || !p_y)
+      return ERR_INVALID_PARAMETER;
+
+   *p_x = d.overscan_x;
+   *p_y = d.overscan_y;
+
+   return 0;
+}
+
+#if GFX_TV_DYNAMIC
+int
+fs450_set_overscan(int x, int y)
+#else
+int
+gfx_set_overscan(int x, int y)
+#endif
+{
+   d.overscan_x = range_limit(x, -1000, 1000);
+   d.overscan_y = range_limit(y, -1000, 1000);
+
+   return write_config(REQ_OVERSCAN_POSITION);
+}
+
+#if GFX_TV_DYNAMIC
+int
+fs450_get_position(int *p_x, int *p_y)
+#else
+int
+gfx_get_position(int *p_x, int *p_y)
+#endif
+{
+   if (!p_x || !p_y)
+      return ERR_INVALID_PARAMETER;
+
+   *p_x = d.position_x;
+   *p_y = d.position_y;
+
+   return 0;
+}
+
+#if GFX_TV_DYNAMIC
+int
+fs450_set_position(int x, int y)
+#else
+int
+gfx_set_position(int x, int y)
+#endif
+{
+   d.position_x = range_limit(x, -1000, 1000);
+   d.position_y = range_limit(y, -1000, 1000);
+
+   return write_config(REQ_OVERSCAN_POSITION);
+}
+
+/*==========================================================================*/
+/****/
+/*//	Color, Brightness, and Contrast*/
+
+#if GFX_TV_DYNAMIC
+int
+fs450_get_color(int *p_color)
+#else
+int
+gfx_get_color(int *p_color)
+#endif
+{
+   if (!p_color)
+      return ERR_INVALID_PARAMETER;
+
+   *p_color = d.color;
+
+   return 0;
+}
+
+#if GFX_TV_DYNAMIC
+int
+fs450_set_color(int color)
+#else
+int
+gfx_set_color(int color)
+#endif
+{
+   d.color = range_limit(color, 0, 100);
+
+   return write_config(REQ_COLOR);
+}
+
+#if GFX_TV_DYNAMIC
+int
+fs450_get_brightness(int *p_brightness)
+#else
+int
+gfx_get_brightness(int *p_brightness)
+#endif
+{
+   if (!p_brightness)
+      return ERR_INVALID_PARAMETER;
+
+   *p_brightness = d.brightness;
+
+   return 0;
+}
+
+#if GFX_TV_DYNAMIC
+int
+fs450_set_brightness(int brightness)
+#else
+int
+gfx_set_brightness(int brightness)
+#endif
+{
+   d.brightness = range_limit(brightness, 0, 100);
+
+   return write_config(REQ_BRIGHTNESS_CONTRAST);
+}
+
+#if GFX_TV_DYNAMIC
+int
+fs450_get_contrast(int *p_contrast)
+#else
+int
+gfx_get_contrast(int *p_contrast)
+#endif
+{
+   if (!p_contrast)
+      return ERR_INVALID_PARAMETER;
+
+   *p_contrast = d.contrast;
+
+   return 0;
+}
+
+#if GFX_TV_DYNAMIC
+int
+fs450_set_contrast(int constrast)
+#else
+int
+gfx_set_contrast(int constrast)
+#endif
+{
+   d.contrast = range_limit(constrast, 0, 100);
+
+   return write_config(REQ_BRIGHTNESS_CONTRAST);
+}
+
+/*==========================================================================*/
+/****/
+/*//	YC filters*/
+
+#if GFX_TV_DYNAMIC
+int
+fs450_get_yc_filter(unsigned int *p_yc_filter)
+#else
+int
+gfx_get_yc_filter(unsigned int *p_yc_filter)
+#endif
+{
+   if (!p_yc_filter)
+      return ERR_INVALID_PARAMETER;
+
+   if (houston_Rev() < HOUSTON_REV_B)
+      return ERR_NOT_SUPPORTED;
+
+   *p_yc_filter = d.yc_filter;
+
+   return 0;
+}
+
+#if GFX_TV_DYNAMIC
+int
+fs450_set_yc_filter(unsigned int yc_filter)
+#else
+int
+gfx_set_yc_filter(unsigned int yc_filter)
+#endif
+{
+   if (houston_Rev() < HOUSTON_REV_B)
+      return ERR_NOT_SUPPORTED;
+
+   /*luma filter. */
+   if (yc_filter & GFX_LUMA_FILTER)
+      d.yc_filter |= GFX_LUMA_FILTER;
+   else
+      d.yc_filter &= ~GFX_LUMA_FILTER;
+
+   /*chroma filter. */
+   if (yc_filter & GFX_CHROMA_FILTER)
+      d.yc_filter |= GFX_CHROMA_FILTER;
+   else
+      d.yc_filter &= ~GFX_CHROMA_FILTER;
+
+   return write_config(REQ_YC_FILTER);
+}
+
+#if GFX_TV_DYNAMIC
+int
+fs450_get_aps_trigger_bits(unsigned int *p_trigger_bits)
+#else
+int
+gfx_get_aps_trigger_bits(unsigned int *p_trigger_bits)
+#endif
+{
+   if (!p_trigger_bits)
+      return ERR_INVALID_PARAMETER;
+
+   *p_trigger_bits = d.aps_trigger_bits;
+
+   return 0;
+}
+
+#if GFX_TV_DYNAMIC
+int
+fs450_set_aps_trigger_bits(unsigned int trigger_bits)
+#else
+int
+gfx_set_aps_trigger_bits(unsigned int trigger_bits)
+#endif
+{
+   d.aps_trigger_bits = trigger_bits;
+
+   return write_config(REQ_MACROVISION);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_tv_format
+ *
+ * This routine sets the TV encoder registers to the specified format
+ * and resolution.
+ * Currently only NTSC 640x480 is supported.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_TV_DYNAMIC
+int
+fs450_set_tv_format(TVStandardType format, GfxOnTVType resolution)
+#else
+int
+gfx_set_tv_format(TVStandardType format, GfxOnTVType resolution)
+#endif
+{
+   /* ### ADD ### IMPLEMENTATION */
+   return (0);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_tv_output
+ *
+ * This routine sets the TV encoder registers to the specified output type.
+ * Supported output types are : S-VIDEO and Composite.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_TV_DYNAMIC
+int
+fs450_set_tv_output(int output)
+#else
+int
+gfx_set_tv_output(int output)
+#endif
+{
+   /* ### ADD ### IMPLEMENTATION */
+   return (0);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_tv_cc_enable
+ *
+ * This routine enables or disables the use of the hardware CC registers 
+ * in the TV encoder.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_TV_DYNAMIC
+int
+fs450_set_tv_cc_enable(int enable)
+#else
+int
+gfx_set_tv_cc_enable(int enable)
+#endif
+{
+   /* ### ADD ### IMPLEMENTATION */
+   return (0);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_tv_cc_data
+ *
+ * This routine writes the two specified characters to the CC data register 
+ * of the TV encoder.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_TV_DYNAMIC
+int
+fs450_set_tv_cc_data(unsigned char data1, unsigned char data2)
+#else
+int
+gfx_set_tv_cc_data(unsigned char data1, unsigned char data2)
+#endif
+{
+   /* ### ADD ### IMPLEMENTATION */
+   return (0);
+}
+
+#ifdef FS450_DIRECTREG
+
+/*//==========================================================================*/
+/****/
+/*//	Direct Read and Write registers*/
+
+int
+FS450_ReadRegister(S_REG_INFO * p_reg)
+{
+   unsigned long tmp;
+
+   if (PLAL_ReadRegister(p_reg))
+      return 0;
+
+   if (SOURCE_HOUSTON == p_reg->source) {
+      switch (p_reg->size) {
+      case 1:
+      case 2:
+	 {
+	    houston_ReadReg((int)p_reg->offset, &tmp, (int)p_reg->size);
+	    p_reg->value = tmp;
+	 }
+	 return 0;
+
+      case 4:
+	 {
+	    houston_ReadReg((unsigned int)p_reg->offset, &tmp, 2);
+	    p_reg->value = (tmp << 16);
+	    houston_ReadReg((unsigned int)(p_reg->offset + 2), &tmp, 2);
+	    p_reg->value |= tmp;
+	 }
+	 return 0;
+      }
+   }
+
+   return ERR_INVALID_PARAMETER;
+}
+
+int
+FS450_WriteRegister(S_REG_INFO * p_reg)
+{
+   if (PLAL_WriteRegister(p_reg))
+      return 0;
+
+   if (SOURCE_HOUSTON == p_reg->source) {
+      houston_WriteReg((unsigned int)p_reg->offset, p_reg->value,
+		       p_reg->size);
+
+      return 0;
+   }
+
+   return ERR_INVALID_PARAMETER;
+}
+
+#endif
+
+/****/
+/*Houston initialization function.*/
+/****/
+static int g_houston_rev = -1;
+
+static int
+houston_init(void)
+{
+   /*//int errc; */
+   unsigned long write, read;
+
+   TRACE(("houston_init()\n"))
+
+	 /*initialize I2C */
+	 /*errc = I2C_init();
+	  * if (errc)
+	  * return errc;
+	  */
+	 /*Before we begin, we must enable power to the TFT */
+	 read = READ_VID32(CS5530_DISPLAY_CONFIG);
+   read |= CS5530_DCFG_FP_PWR_EN | CS5530_DCFG_FP_DATA_EN;
+   WRITE_VID32(CS5530_DISPLAY_CONFIG, read);
+
+   /*simple w/r test. */
+   write = 0x0055;
+   read = 0;
+
+   houston_WriteReg(HOUSTON_IHO, write, 2);
+   houston_ReadReg(HOUSTON_IHO, &read, 2);
+   if (read != write) {
+      houston_WriteReg(HOUSTON_IHO, write, 2);
+      houston_ReadReg(HOUSTON_IHO, &read, 2);
+      if (read != write) {
+	 /*chip is not there, do something appropriate? */
+	 TRACE(("wrote HOUSTON_IHO=0x0055, read 0x%04x\n", read))
+	       return ERR_DEVICE_NOT_FOUND;
+      }
+   }
+
+   /*read chip revision. */
+   houston_ReadReg(HOUSTON_REV, &read, 2);
+   g_houston_rev = (int)read;
+
+   /*ok. */
+   return 0;
+}
+
+static int
+houston_Rev(void)
+{
+   return g_houston_rev;
+}
+
+static S_TIMING_SPECS g_specs;
+
+static const S_TIMING_SPECS *
+p_specs(void)
+{
+   return &g_specs;
+}
+
+/*//==========================================================================*/
+/****/
+/*FS450 configuration functions.*/
+/****/
+/*//==========================================================================*/
+static int
+config_init(void)
+{
+   int err;
+
+   TRACE(("config_init()\n"))
+
+	 err = houston_init();
+   if (err)
+      return err;
+
+   return 0;
+}
+
+/*==========================================================================*/
+/****/
+/*convert word to encoder 10 bit value.*/
+
+static unsigned short
+w10bit2z(unsigned short w)
+{
+   return (w >> 2) | ((w & 0x03) << 8);
+}
+
+static unsigned short
+z2w10bit(unsigned short z)
+{
+   return (0x03 & (z >> 8)) | ((0xFF & z) << 2);
+}
+
+/*==========================================================================*/
+/****/
+/*//	TV Standards*/
+
+static const struct
+{
+   unsigned long standard;
+   int tvsetup_index;
+}
+g_tv_standards[] =
+{
+   {
+   GFX_TV_STANDARD_NTSC_M, 0}
+   , {
+   GFX_TV_STANDARD_NTSC_M_J, 2}
+   , {
+   GFX_TV_STANDARD_PAL_B, 1}
+   , {
+   GFX_TV_STANDARD_PAL_D, 1}
+   , {
+   GFX_TV_STANDARD_PAL_H, 1}
+   , {
+   GFX_TV_STANDARD_PAL_I, 1}
+   , {
+   GFX_TV_STANDARD_PAL_M, 3}
+   , {
+   GFX_TV_STANDARD_PAL_N, 4}
+   , {
+   GFX_TV_STANDARD_PAL_G, 1}
+,};
+
+static int
+map_tvstd_to_index(unsigned long tv_std)
+{
+   unsigned int i;
+
+   for (i = 0; i < sizeof(g_tv_standards) / sizeof(*g_tv_standards); i++) {
+      if (tv_std == g_tv_standards[i].standard)
+	 return g_tv_standards[i].tvsetup_index;
+   }
+
+   return -1;
+}
+
+static unsigned long
+supported_standards(void)
+{
+   unsigned long standards = 0;
+   unsigned int i;
+
+   for (i = 0; i < sizeof(g_tv_standards) / sizeof(*g_tv_standards); i++) {
+      if (g_tv_standards[i].tvsetup_index >= 0)
+	 standards |= g_tv_standards[i].standard;
+   }
+
+   return standards;
+}
+
+/*==========================================================================*/
+
+static void
+config_power(int on)
+{
+   unsigned long reg;
+
+   if (houston_Rev() < HOUSTON_REV_B) {
+      /*no power down supported, but still turn of clock in off mode */
+      if (on) {
+	 houston_ReadReg(HOUSTON_CR, &reg, 2);
+	 reg &= ~(CR_CLKOFF | CR_RESET);
+	 houston_WriteReg(HOUSTON_CR, reg, 2);
+	 reg |= CR_RESET;
+	 houston_WriteReg(HOUSTON_CR, reg, 2);
+	 reg &= ~CR_RESET;
+	 houston_WriteReg(HOUSTON_CR, reg, 2);
+      } else {
+	 houston_ReadReg(HOUSTON_CR, &reg, 2);
+	 reg |= CR_CLKOFF;
+	 houston_WriteReg(HOUSTON_CR, reg, 2);
+      }
+
+      return;
+   }
+
+   if (on) {
+      /*!CLKOFF, !COMPOFF, !YCOFF */
+      /*and reset Houston */
+      houston_ReadReg(HOUSTON_CR, &reg, 2);
+      reg &= ~(CR_CLKOFF | CR_RESET | CR_COMPOFF | CR_YCOFF);
+      houston_WriteReg(HOUSTON_CR, reg, 2);
+      reg |= CR_RESET;
+      houston_WriteReg(HOUSTON_CR, reg, 2);
+      reg &= ~CR_RESET;
+      houston_WriteReg(HOUSTON_CR, reg, 2);
+
+      /*!GTLIO_PD */
+      houston_ReadReg(HOUSTON_MISC, &reg, 2);
+      reg &= ~MISC_GTLIO_PD;
+      houston_WriteReg(HOUSTON_MISC, reg, 2);
+   } else {
+      /*CLKOFF, COMPOFF, YCOFF */
+      houston_ReadReg(HOUSTON_CR, &reg, 2);
+      reg |= (CR_CLKOFF | CR_COMPOFF | CR_YCOFF);
+      houston_WriteReg(HOUSTON_CR, reg, 2);
+
+      /*GTLIO_PD */
+      houston_ReadReg(HOUSTON_MISC, &reg, 2);
+      reg |= MISC_GTLIO_PD;
+      houston_WriteReg(HOUSTON_MISC, reg, 2);
+   }
+}
+
+/*==========================================================================*/
+/****/
+/*//	VGA mode*/
+
+static void
+config_vga_mode(unsigned long vga_mode)
+{
+   /*h_total must be evenly divisible by 32? */
+
+   static struct
+   {
+      unsigned long mode;
+      int width;
+      int lines;
+      int h_total;
+   }
+   vgaparams[] =
+   {
+      {
+      GFX_VGA_MODE_640X480, 640, 480, 1056}
+      , {
+      GFX_VGA_MODE_720X487, 720, 487, 1056}
+      , {
+      GFX_VGA_MODE_720X576, 720, 576, 1056}
+      , {
+      GFX_VGA_MODE_800X600, 800, 600, 1056}
+      , {
+      GFX_VGA_MODE_1024X768, 1024, 768, 1344}
+   ,};
+
+   unsigned long cr, misc, byp;
+   unsigned int i;
+
+   g_specs.vga_width = 0;
+   g_specs.vga_lines = 0;
+   g_specs.h_total = 0;
+
+   for (i = 0; i < sizeof(vgaparams) / sizeof(*vgaparams); i++) {
+      if (vga_mode == vgaparams[i].mode) {
+	 g_specs.vga_width = vgaparams[i].width;
+	 g_specs.vga_lines = vgaparams[i].lines;
+	 g_specs.h_total = vgaparams[i].h_total;
+	 break;
+      }
+   }
+   if (!g_specs.h_total)
+      return;
+
+   /*clock mux decimator and vga dual. */
+   houston_ReadReg(HOUSTON_CR, &cr, 2);
+   houston_ReadReg(HOUSTON_MISC, &misc, 2);
+   houston_ReadReg(HOUSTON_BYP, &byp, 2);
+
+   if (vga_mode == GFX_VGA_MODE_1024X768) {
+       /*XGA*/ cr |= CR_UIM_DEC;
+      misc |= MISC_VGACKDIV;
+      byp |= (BYP_HDS_BYPASS | BYP_CAC_BYPASS);
+   } else {
+      /*VGA,SVGA */
+      cr &= ~CR_UIM_DEC;
+      misc &= ~MISC_VGACKDIV;
+      byp &= ~(BYP_HDS_BYPASS | BYP_CAC_BYPASS);
+   }
+
+   houston_WriteReg(HOUSTON_CR, cr, 2);
+   houston_WriteReg(HOUSTON_MISC, misc, 2);
+   houston_WriteReg(HOUSTON_BYP, byp, 2);
+}
+
+/*==========================================================================*/
+/****/
+/*//	Write settings for TV standard to device*/
+
+static void
+config_tv_std(unsigned long tv_std, unsigned int trigger_bits)
+{
+   int k;
+   unsigned short reg34;
+   unsigned long cr, w;
+   unsigned long l;
+
+   /*verify supported standard. */
+   k = map_tvstd_to_index(tv_std);
+   if (k < 0)
+      return;
+
+   /*store tv width and lines */
+   g_specs.tv_width = tvsetup.tv_width[k];
+   g_specs.tv_lines = tvsetup.tv_lines[k];
+
+   /*houston CR register. */
+   houston_ReadReg(HOUSTON_CR, &cr, 2);
+   cr &= ~CR_656_PAL_NTSC;
+   cr |= tvsetup.houston_cr[k];
+   houston_WriteReg(HOUSTON_CR, cr, 2);
+
+   /*setup the encoder. */
+   l = tvsetup.chroma_freq[k];
+   houston_WriteReg(ENC_CHROMA_FREQ, (int)(l & 0x00ff), 1);
+   houston_WriteReg(ENC_CHROMA_FREQ + 1, (int)((l >> 8) & 0x00ff), 1);
+   houston_WriteReg(ENC_CHROMA_FREQ + 2, (int)((l >> 16) & 0x00ff), 1);
+   houston_WriteReg(ENC_CHROMA_FREQ + 3, (int)((l >> 24) & 0x00ff), 1);
+
+   houston_WriteReg(ENC_CHROMA_PHASE, tvsetup.chroma_phase[k], 1);
+   houston_WriteReg(ENC_REG05, 0x00, 1);	/*reg 0x05 */
+   houston_WriteReg(ENC_REG06, 0x89, 1);	/*reg 0x06 */
+   houston_WriteReg(ENC_REG07, 0x00, 1);	/*reg 0x07 */
+   houston_WriteReg(ENC_HSYNC_WIDTH, tvsetup.hsync_width[k], 1);
+   houston_WriteReg(ENC_BURST_WIDTH, tvsetup.burst_width[k], 1);
+   houston_WriteReg(ENC_BACK_PORCH, tvsetup.back_porch[k], 1);
+   houston_WriteReg(ENC_CB_BURST_LEVEL, tvsetup.cb_burst_level[k], 1);
+   houston_WriteReg(ENC_CR_BURST_LEVEL, tvsetup.cr_burst_level[k], 1);
+   houston_WriteReg(ENC_SLAVE_MODE, 0x01, 1);	/*slave mode */
+   if (trigger_bits == 0)
+      w = w10bit2z(tvsetup.blank_level[k]);	/*blank level */
+   else
+      w = w10bit2z((unsigned short)(tvsetup.blank_level[k] -
+				    tvsetup.hamp_offset[k]));
+   houston_WriteReg(ENC_BLANK_LEVEL, w & 0x00ff, 1);
+   houston_WriteReg(ENC_BLANK_LEVEL + 1, w >> 8, 1);
+   w = w10bit2z(tvsetup.tv_lines[k]);	/*num_lines */
+   houston_WriteReg(ENC_NUM_LINES, w & 0x00ff, 1);
+   houston_WriteReg(ENC_NUM_LINES + 1, w >> 8, 1);
+
+   houston_WriteReg(ENC_TINT, 0x00, 1);	/*tint */
+   houston_WriteReg(ENC_BREEZE_WAY, tvsetup.breeze_way[k], 1);
+   houston_WriteReg(ENC_FRONT_PORCH, tvsetup.front_porch[k], 1);
+   houston_WriteReg(ENC_ACTIVELINE, tvsetup.activeline[k], 1);
+   houston_WriteReg(ENC_FIRST_LINE, 0x15, 1);	/*firstvideoline */
+   reg34 =
+	 0x80 |
+	 (tvsetup.pal_mode[k] << 6) |
+	 (tvsetup.sys625_50[k] << 3) |
+	 (tvsetup.cphase_rst[k] << 1) | (tvsetup.vsync5[k]);
+   houston_WriteReg(ENC_REG34, reg34, 1);	/*reg 0x34 */
+   houston_WriteReg(ENC_SYNC_LEVEL, tvsetup.sync_level[k], 1);
+   if (trigger_bits == 0)
+      w = w10bit2z(tvsetup.vbi_blank_level[k]);	/*blank level */
+   else
+      w = w10bit2z((unsigned short)(tvsetup.vbi_blank_level[k] - 1));
+   houston_WriteReg(ENC_VBI_BLANK_LEVEL, w & 0x00ff, 1);
+   houston_WriteReg(ENC_VBI_BLANK_LEVEL + 1, w >> 8, 1);
+}
+
+static void
+conget_tv_std(unsigned long *p_tv_standard)
+{
+   unsigned long cr;
+
+   if (!p_tv_standard)
+      return;
+
+   /*just pick between NTSC and PAL */
+   houston_ReadReg(HOUSTON_CR, &cr, 2);
+   if (CR_656_PAL_NTSC & cr)
+      *p_tv_standard = GFX_TV_STANDARD_PAL_B;
+   else
+      *p_tv_standard = GFX_TV_STANDARD_NTSC_M;
+}
+
+/*==========================================================================*/
+/****/
+/*//	TVout mode*/
+
+static void
+config_tvout_mode(unsigned long tvout_mode)
+{
+   unsigned long cr;
+
+   houston_ReadReg(HOUSTON_CR, &cr, 2);
+
+   /*all dacs off */
+   cr |= (CR_COMPOFF | CR_YCOFF);
+   /*not rgb */
+   cr &= ~CR_OFMT;
+
+   /*turn on requested output */
+   if (GFX_TVOUT_MODE_CVBS & tvout_mode)
+      cr &= ~CR_COMPOFF;
+   if (GFX_TVOUT_MODE_YC & tvout_mode)
+      cr &= ~CR_YCOFF;
+   if (GFX_TVOUT_MODE_RGB & tvout_mode) {
+      cr &= ~(CR_COMPOFF | CR_YCOFF);
+      cr |= CR_OFMT;
+   }
+
+   houston_WriteReg(HOUSTON_CR, cr, 2);
+}
+
+static void
+conget_tvout_mode(unsigned long *p_tvout_mode)
+{
+   unsigned long cr;
+
+   if (!p_tvout_mode)
+      return;
+
+   houston_ReadReg(HOUSTON_CR, &cr, 2);
+
+   if (CR_OFMT & cr)
+      *p_tvout_mode = GFX_TVOUT_MODE_RGB;
+   else {
+      *p_tvout_mode = 0;
+      if (!(CR_YCOFF & cr))
+	 *p_tvout_mode |= GFX_TVOUT_MODE_YC;
+      if (!(CR_COMPOFF & cr))
+	 *p_tvout_mode |= GFX_TVOUT_MODE_CVBS;
+   }
+}
+
+/*==========================================================================*/
+/****/
+/*//	Size & Position*/
+
+#define IS_NTSC(tv_std) (tv_std & ( \
+	GFX_TV_STANDARD_NTSC_M |   \
+	GFX_TV_STANDARD_NTSC_M_J | \
+	GFX_TV_STANDARD_PAL_M))
+#define IS_PAL(tv_std) (tv_std & ( \
+	GFX_TV_STANDARD_PAL_B | \
+	GFX_TV_STANDARD_PAL_D | \
+	GFX_TV_STANDARD_PAL_H | \
+	GFX_TV_STANDARD_PAL_I | \
+	GFX_TV_STANDARD_PAL_N | \
+	GFX_TV_STANDARD_PAL_G))
+
+/*return fifo delay setting for mode, std, and total lines.*/
+
+static void
+get_ffolat_ivo(unsigned long vga_mode,
+	       unsigned long tv_std,
+	       long i, unsigned short *ffolat, unsigned short *ivo)
+{
+   switch (vga_mode) {
+   case GFX_VGA_MODE_640X480:
+      if (IS_NTSC(tv_std)) {
+	 if (i > SIZE6X4NTSC - 1)
+	    i = SIZE6X4NTSC - 1;
+	 *ffolat = ffo6x4ntsc[i].ffolat;
+	 *ivo = 0x20;
+      } else {
+	 if (i > SIZE6X4PAL - 1)
+	    i = SIZE6X4PAL - 1;
+	 *ffolat = ffo6x4pal[i].ffolat;
+	 *ivo = 0x28;
+      }
+      break;
+
+   case GFX_VGA_MODE_800X600:
+      if (IS_NTSC(tv_std)) {
+	 if (i > SIZE8X6NTSC - 1)
+	    i = SIZE8X6NTSC - 1;
+	 *ffolat = ffo8x6ntsc[i].ffolat;
+	 *ivo = 0x3a;
+      } else {
+	 if (i > SIZE8X6PAL - 1)
+	    i = SIZE8X6PAL - 1;
+	 *ffolat = ffo8x6pal[i].ffolat;
+	 *ivo = 0x39;
+      }
+      break;
+
+   case GFX_VGA_MODE_720X487:
+      *ffolat = 0x40;			/*//FFO7x4; */
+      *ivo = 0x1a;
+      break;
+
+   case GFX_VGA_MODE_720X576:
+      *ffolat = 0x40;			/*//FFO7x5; */
+      *ivo = 0x1a;
+      break;
+
+   case GFX_VGA_MODE_1024X768:
+   default:
+      if (IS_NTSC(tv_std)) {
+	 if (i > SIZE10X7NTSC - 1)
+	    i = SIZE10X7NTSC - 1;
+	 *ffolat = ffo10x7ntsc[i].ffolat;
+	 *ivo = ffo10x7ntsc[i].ivo;
+      } else {
+	 if (i > SIZE10X7PAL - 1)
+	    i = SIZE10X7PAL - 1;
+	 *ffolat = ffo10x7pal[i].ffolat;
+	 *ivo = ffo10x7pal[i].ivo;
+      }
+      break;
+   }
+}
+
+/*get vertical line min and max for mode and std.*/
+
+static void
+get_vtotal_min_max(unsigned long vga_mode,
+		   unsigned long tv_std,
+		   int *v_total_min, int *v_total_max, int *v_step)
+{
+   int k = map_tvstd_to_index(tv_std);
+
+   switch (vga_mode) {
+   case GFX_VGA_MODE_640X480:
+      if (IS_NTSC(tv_std)) {
+	 *v_total_min = ffo6x4ntsc[0].v_total;
+	 *v_total_max = ffo6x4ntsc[SIZE6X4NTSC - 1].v_total;
+      } else {
+	 *v_total_min = ffo6x4pal[0].v_total;
+	 *v_total_max = ffo6x4pal[SIZE6X4PAL - 1].v_total;
+      }
+      *v_step = 4;
+      break;
+
+   case GFX_VGA_MODE_800X600:
+      if (IS_NTSC(tv_std)) {
+	 *v_total_min = ffo8x6ntsc[0].v_total;
+	 *v_total_max = ffo8x6ntsc[SIZE8X6NTSC - 1].v_total;
+      } else {
+	 *v_total_min = ffo8x6pal[0].v_total;
+	 *v_total_max = ffo8x6pal[SIZE8X6PAL - 1].v_total;
+      }
+      *v_step = 5;
+      break;
+
+   case GFX_VGA_MODE_720X487:
+   case GFX_VGA_MODE_720X576:
+      *v_total_min = tvsetup.tv_lines[k];
+      *v_total_max = tvsetup.tv_lines[k];
+      *v_step = 4;
+      break;
+
+   case GFX_VGA_MODE_1024X768:
+      if (IS_NTSC(tv_std)) {
+	 *v_total_min = ffo10x7ntsc[0].v_total;
+	 *v_total_max = ffo10x7ntsc[SIZE10X7NTSC - 1].v_total;
+      } else {
+	 *v_total_min = ffo10x7pal[0].v_total;
+	 *v_total_max = ffo10x7pal[SIZE10X7PAL - 1].v_total;
+      }
+      *v_step = 6;
+      break;
+   }
+}
+
+static void
+config_overscan_xy(unsigned long tv_std,
+		   unsigned long vga_mode,
+		   int overscan_x, int overscan_y, int pos_x, int pos_y)
+{
+   unsigned int vga_index;
+   unsigned long reg;
+   double vsc;
+   int k;
+   unsigned short ffolat, ivo;
+   int base_v_total, range, v_offset;
+   int v_total_min, v_total_max, v_step;
+   float r, f;
+   int vga_pixels, pre_pixels;
+   float hscale, hscale_min, hscale_max;
+   int hsc;
+   int iho, iho_max, ihw;
+
+   /*tv_std is valid. */
+   k = map_tvstd_to_index(tv_std);
+
+   /*store tv width and lines */
+   g_specs.tv_width = tvsetup.tv_width[k];
+   g_specs.tv_lines = tvsetup.tv_lines[k];
+
+   /*determine vga mode index */
+   for (vga_index = 0; vga_index < SCANTABLE_ENTRIES; vga_index++) {
+      if (scantable[vga_index].mode == vga_mode)
+	 break;
+   }
+   if (vga_index >= SCANTABLE_ENTRIES)
+      return;
+
+	/****/
+   /*vertical scaling (v_total setup). */
+	/****/
+   /*calculate vertical range. */
+   get_vtotal_min_max(vga_mode, tv_std, &v_total_min, &v_total_max, &v_step);
+   TRACE(("v_total min=%d, max=%d\n", v_total_min, v_total_max))
+	 base_v_total = scantable[vga_index].v_total[k];
+   range = fsmax(base_v_total - v_total_min, v_total_max - base_v_total);
+   TRACE(("v_total range = %d\n", range))
+
+	 /*map +/-1000 overscan y into +/-range. */
+	 v_offset = (int)((((float)overscan_y * range) / 1000.f) + .5f);
+   TRACE(("v_offset = %d\n", v_offset))
+
+	 /*range limit v_total. */
+	 g_specs.v_total =
+	 range_limit(base_v_total + v_offset, v_total_min, v_total_max);
+
+   /*round to calibrated value. */
+   v_offset = (g_specs.v_total - v_total_min + (v_step / 2)) / v_step;
+   g_specs.v_total = v_total_min + v_offset * v_step;
+   TRACE(("desired v_total=%d\n", g_specs.v_total))
+
+	/****/
+	 /*vertical positioning (vsync setup). */
+	/****/
+	 get_ffolat_ivo(vga_mode, tv_std, v_offset, &ffolat, &ivo);
+   houston_WriteReg(HOUSTON_IVO, ivo, 2);
+
+   /*scale base sync offset by scaling ratio. */
+   r = (float)g_specs.v_total / (float)base_v_total;
+   v_offset = (int)(r * (float)scantable[vga_index].v_sync[k]);
+
+   /*scale ivo. */
+   f = (float)ivo;
+   v_offset -= (int)(f - f / r);
+
+   /*compensate for center screen. */
+   f = (float)tvsetup.tv_active_lines[k] / 2.f;
+   v_offset += (int)(f * r - f);
+
+   /*calculate vsync. */
+   g_specs.v_sync = g_specs.v_total - v_offset + pos_y;
+   TRACE(("desired v_total=%d, desired v_sync=%d\n", g_specs.v_total,
+	  g_specs.v_sync))
+	 if (g_specs.v_sync < g_specs.vga_lines + 10) {
+      TRACE(("vsync too low\n"))
+	    /*//d.v_total += d.vga_lines+10-d.v_sync; */
+	    g_specs.v_sync = g_specs.vga_lines + 10;
+   } else if (g_specs.v_sync > g_specs.v_total - 10) {
+      TRACE(("vsync too high\n"))
+	    g_specs.v_sync = g_specs.v_total - 10;
+   }
+   TRACE(("v_total=%d v_sync=%d\n", g_specs.v_total, g_specs.v_sync))
+
+	 /*FFOLAT. */
+	 houston_WriteReg(HOUSTON_FFO_LAT, ffolat, 2);
+
+   /*VSC. */
+   vsc = (65536.0f *
+	  (1.0f - (double)g_specs.tv_lines / (double)g_specs.v_total)) + 0.5f;
+   reg = ((unsigned long)-vsc) & 0xffff;
+   TRACE(("vsc=%04x, tv_lines=%d, v_total=%d\n", reg, g_specs.tv_lines,
+	  g_specs.v_total))
+	 houston_WriteReg(HOUSTON_VSC, (int)reg, 2);
+
+	/****/
+   /*horizontal scaling. */
+	/****/
+
+   /*vga pixels is vga width, except in 1024x768, where it's half that. */
+   vga_pixels = g_specs.vga_width;
+   if (1024 == vga_pixels)
+      vga_pixels /= 2;
+
+   /*maximum scaling coefficient is tv_width / vga_pixels */
+   /*minimum is about 1/2, but that is quite small.  arbitrarily set minimum at 75% maximum. */
+   hscale_max = (720.0f / vga_pixels);
+   hscale_min = fsmax((0.75f * hscale_max), (1.0f - (63.0f / 128.0f)));
+   TRACE(("hscale_min = %u.%u, hscale_max = %u.%u\n",
+	  (int)hscale_min,
+	  (int)((hscale_min - (int)hscale_min) * 1000),
+	  (int)hscale_max, (int)((hscale_max - (int)hscale_max) * 1000)))
+
+	 /*map overscan_x into min to max. */
+	 hscale =
+	 hscale_min + ((overscan_x + 1000.0f) / 2000.0f) * (hscale_max -
+							    hscale_min);
+   TRACE(("hscale = %u.%u\n", (int)hscale,
+	  (int)((hscale - (int)hscale) * 1000)))
+
+	 /*determine hsc where hscale = (1 + hsc/128) */
+	 if (hscale >= 1.0f)
+      hsc = (int)(128.f * (hscale - 1.0f) + .5f);
+   else
+      hsc = (int)(128.f * (hscale - 1.0f) - .5f);
+   TRACE(("hsc = %d\n", hsc))
+	 if (hsc >= 0)
+      houston_WriteReg(HOUSTON_HSC, hsc << 8, 2);
+   else
+      houston_WriteReg(HOUSTON_HSC, hsc & 0xFF, 2);
+
+   /*recalculate hscale for future formulas */
+   hscale = 1.0f + (hsc / 128.0f);
+   TRACE(("recalculated hscale = %u.%u\n", (int)hscale,
+	  (int)((hscale - (int)hscale) * 1000)))
+
+	/****/
+	 /*horizontal offset. */
+	/****/
+	 /*place hsync 40 before halfway from vga_width to htotal */
+	 /*but not less than vga_width + 10 */
+	 g_specs.h_sync =
+	 fsmax((g_specs.h_total + g_specs.vga_width) / 2 - 40,
+	       g_specs.vga_width + 10);
+   /*also, make it even */
+   g_specs.h_sync &= ~1;
+   TRACE(("hsync = %u\n", g_specs.h_sync))
+
+	 /*iho range is 0 to iho_max. */
+	 /*iho_max is 2 * iho_center. */
+	 /*iho_center is pre_pixels - (tvwidth / hscale - vga pixels) / 2. */
+	 /*pre_pixels = (htotal - hsync) * (vga_pixels / vga_width) */
+	 /*note that the range is inverted also, because it specifies the number of pixels */
+	 /*to skip, or subtract.  iho=0 maps to farthest right. */
+	 /*map -pos_x = +/-1000 into (0 to iho_max) */
+	 pre_pixels =
+	 (int)((long)(g_specs.h_total - g_specs.h_sync) * vga_pixels /
+	       g_specs.vga_width);
+   iho_max = (2 * pre_pixels) - ((int)(720.0f / hscale + 0.5f) - vga_pixels);
+   TRACE(("iho_max = %u\n", iho_max))
+	 iho =
+	 (int)range_limit(((long)(1000 - pos_x) * iho_max / 2000) +
+			  scantable[vga_index].iho[k], 0, iho_max);
+   TRACE(("iho = %u\n", iho))
+	 houston_WriteReg(HOUSTON_IHO, iho, 2);
+
+	/****/
+   /*input horizontal width. */
+	/****/
+
+   /*input horizontal width is vga pixels + pre_pixels - iho */
+   /*additionally, ihw cannot exceed tv width / hscale */
+   /*and if hsc is negative, (ihw)(-hsc/128) cannot exceed ~250. */
+   /*and ihw should be even. */
+   ihw = fsmin(vga_pixels + pre_pixels - iho, (int)(720.0f / hscale));
+   if (hsc < 0)
+      ihw = (int)fsmin(ihw, 253L * 128 / (-hsc));
+   ihw &= ~1;
+   TRACE(("ihw = %u\n", ihw))
+	 houston_WriteReg(HOUSTON_IHA, ihw, 2);
+
+   f = (((float)g_specs.h_total * g_specs.v_total) * 27.f) /
+	 ((float)g_specs.tv_width * g_specs.tv_lines);
+
+   TRACE(("freq=%u.%uMHz\n", (int)f, (int)((f - (int)f) * 1000)))
+}
+
+/*==========================================================================*/
+/****/
+/*configure houston nco.*/
+
+static void
+config_nco(unsigned long tv_std, unsigned long vga_mode)
+{
+   unsigned long cr, misc;
+   unsigned long reg;
+   int k = map_tvstd_to_index(tv_std);
+
+   /*read and store CR. */
+   houston_ReadReg(HOUSTON_CR, &cr, 2);
+
+   /*make sure NCO_EN (enable latch) bit is clear */
+   cr &= ~CR_NCO_EN;
+   houston_WriteReg(HOUSTON_CR, cr, 2);
+
+   /*clear NCO_LOADX. */
+   houston_ReadReg(HOUSTON_MISC, &misc, 2);
+   misc &= ~(MISC_NCO_LOAD1 + MISC_NCO_LOAD0);
+   houston_WriteReg(HOUSTON_MISC, misc, 2);
+
+   if (vga_mode == GFX_VGA_MODE_1024X768) {
+      /*setup for M and N load (Nco_load=1). */
+      misc |= (MISC_NCO_LOAD0);
+      houston_WriteReg(HOUSTON_MISC, misc, 2);
+
+      /*M and N. */
+      houston_WriteReg(HOUSTON_NCONL, 1024 - 2, 2);
+      houston_WriteReg(HOUSTON_NCODL, 128 - 1, 2);
+
+      /*latch M/N in. */
+      cr |= CR_NCO_EN;
+      houston_WriteReg(HOUSTON_CR, cr, 2);
+      cr &= ~CR_NCO_EN;
+      houston_WriteReg(HOUSTON_CR, cr, 2);
+
+      /*setup ncon and ncod load (Nco_load=0). */
+      misc &= ~(MISC_NCO_LOAD1 + MISC_NCO_LOAD0);
+      houston_WriteReg(HOUSTON_MISC, misc, 2);
+
+      /*NCON. */
+      reg = ((unsigned long)g_specs.v_total * g_specs.h_total) / 2;
+      houston_WriteReg(HOUSTON_NCONH, reg >> 16, 2);
+      houston_WriteReg(HOUSTON_NCONL, reg & 0xffff, 2);
+
+      /*NCOD. */
+      houston_WriteReg(HOUSTON_NCODL, tvsetup.houston_ncodl[k], 2);
+      houston_WriteReg(HOUSTON_NCODH, tvsetup.houston_ncodh[k], 2);
+   } else {
+      /*setup for M and N load (Nco_load=2). */
+      misc |= (MISC_NCO_LOAD1);
+      houston_WriteReg(HOUSTON_MISC, misc, 2);
+
+      /*NCON. */
+      reg = (unsigned long)g_specs.v_total * g_specs.h_total;
+      houston_WriteReg(HOUSTON_NCONH, reg >> 16, 2);
+      houston_WriteReg(HOUSTON_NCONL, reg & 0xffff, 2);
+
+      /*NCOD. */
+      houston_WriteReg(HOUSTON_NCODL, tvsetup.houston_ncodl[k], 2);
+      houston_WriteReg(HOUSTON_NCODH, tvsetup.houston_ncodh[k], 2);
+
+      TRACE(("NCON = %lu (0x%08lx), NCOD = %lu (0x%08lx)\n",
+	     reg,
+	     reg,
+	     ((unsigned long)tvsetup.houston_ncodh[k] << 16) +
+	     tvsetup.houston_ncodl[k],
+	     ((unsigned long)tvsetup.houston_ncodh[k] << 16) +
+	     tvsetup.houston_ncodl[k]))
+   }
+
+   /*latch M/N and NCON/NCOD in. */
+   cr |= CR_NCO_EN;
+   houston_WriteReg(HOUSTON_CR, cr, 2);
+   cr &= ~CR_NCO_EN;
+   houston_WriteReg(HOUSTON_CR, cr, 2);
+}
+
+/*==========================================================================*/
+/****/
+/*//	Write sharpness settings to device*/
+
+static void
+config_sharpness(int sharpness)
+{
+   unsigned int shp;
+
+   /*map 0-1000 to 0-20. */
+   shp = (unsigned int)(0.5f + ((float)sharpness * 20.0f / 1000.0f));
+   shp = range_limit(shp, 0, 20);
+
+   houston_WriteReg(HOUSTON_SHP, shp, 2);
+}
+
+static void
+conget_sharpness(int *p_sharpness)
+{
+   unsigned long shp;
+
+   if (!p_sharpness)
+      return;
+
+   houston_ReadReg(HOUSTON_SHP, &shp, 2);
+
+   /*map 0-20 to 0-1000. */
+   *p_sharpness = (int)(0.5f + ((float)shp * 1000.0f / 20.0f));
+}
+
+/*==========================================================================*/
+/****/
+/*//	Write flicker settings to device*/
+
+static void
+config_flicker(int flicker)
+{
+   unsigned int flk;
+
+   /*map 0-1000 to 0-16. */
+   flk = (unsigned int)(0.5f + ((float)flicker * 16.0f / 1000.0f));
+   flk = range_limit(flk, 0, 16);
+
+   houston_WriteReg(HOUSTON_FLK, flk, 2);
+}
+
+static void
+conget_flicker(int *p_flicker)
+{
+   unsigned long flk;
+
+   if (!p_flicker)
+      return;
+
+   houston_ReadReg(HOUSTON_FLK, &flk, 2);
+
+   /*map 0-16 to 0-1000. */
+   *p_flicker = (int)(0.5f + ((float)flk * 1000.0f / 16.0f));
+}
+
+/*==========================================================================*/
+/****/
+/*//	Write color settings to device*/
+
+static void
+config_color(int color)
+{
+   unsigned long clr;
+
+   /*map 0-100 to 0-255. */
+   /*montreal production test needs 169 to be mappable, so */
+   /*use .8 rounding factor, 169=(int)(66.*2.55+.8). */
+   clr = (unsigned long)(0.8f + ((float)color * 255.0f / 100.0f));
+   clr = range_limit(clr, 0, 255);
+
+   houston_WriteReg(ENC_CR_GAIN, clr, 1);
+   houston_WriteReg(ENC_CB_GAIN, clr, 1);
+}
+
+static void
+conget_color(int *p_color)
+{
+   unsigned long cr_gain;
+
+   if (!p_color)
+      return;
+
+   /*just get CR GAIN, CB GAIN should match. */
+   houston_ReadReg(ENC_CR_GAIN, &cr_gain, 1);
+
+   /*map 0-255 to 0-100. */
+   *p_color = (int)(0.5f + ((float)cr_gain * 100.0f / 255.0f));
+}
+
+/*==========================================================================*/
+/****/
+/*//	Write brightness and contrast settings to device*/
+
+#define	NTSC_BLANK_LEVEL	240
+
+static const int min_black_level = NTSC_BLANK_LEVEL + 1;
+static const int max_white_level = 1023;
+
+static void
+config_brightness_contrast(unsigned long tv_std, unsigned int trigger_bits,
+			   int brightness, int contrast)
+{
+   int brightness_off;
+   float contrast_mult;
+   int black, white;
+   unsigned short w;
+   int k = map_tvstd_to_index(tv_std);
+
+   /*0-100 maps to +/-220. */
+   brightness_off = (int)(0.5f + ((float)brightness * 440.0f / 100.0f)) - 220;
+
+   /*0-100 maps to .75-1.25. */
+   contrast_mult = ((float)contrast * 0.5f / 100.0f) + 0.75f;
+
+   black = tvsetup.black_level[k];
+   if (trigger_bits != 0)
+      black -= tvsetup.hamp_offset[k];
+
+   white = tvsetup.white_level[k];
+   if (trigger_bits != 0)
+      white -= tvsetup.hamp_offset[k];
+
+   black = (int)((float)(black + brightness_off) * contrast_mult);
+   white = (int)((float)(white + brightness_off) * contrast_mult);
+   if (black < min_black_level)
+      black = min_black_level;
+   if (white > max_white_level)
+      white = max_white_level;
+
+   w = w10bit2z((unsigned short)black);
+   houston_WriteReg(ENC_BLACK_LEVEL, w & 0x00ff, 1);
+   houston_WriteReg(ENC_BLACK_LEVEL + 1, w >> 8, 1);
+   w = w10bit2z((unsigned short)white);
+   houston_WriteReg(ENC_WHITE_LEVEL, w & 0x00ff, 1);
+   houston_WriteReg(ENC_WHITE_LEVEL + 1, w >> 8, 1);
+}
+
+static void
+conget_brightness_contrast(unsigned long tv_std, unsigned int trigger_bits,
+			   int *p_brightness, int *p_contrast)
+{
+   int brightness_off;
+   float contrast_mult;
+   unsigned short black, white;
+   unsigned long zh, zl;
+   int k;
+
+   if (!p_brightness || !p_contrast)
+      return;
+
+   k = map_tvstd_to_index(tv_std);
+
+   houston_ReadReg(ENC_BLACK_LEVEL, &zl, 1);
+   houston_ReadReg(ENC_BLACK_LEVEL + 1, &zh, 1);
+   black = z2w10bit((unsigned short)(zl + (zh << 8)));
+   if (trigger_bits != 0)
+      black += tvsetup.hamp_offset[k];
+   houston_ReadReg(ENC_WHITE_LEVEL, &zl, 1);
+   houston_ReadReg(ENC_WHITE_LEVEL + 1, &zh, 1);
+   white = z2w10bit((unsigned short)(zl + (zh << 8)));
+   if (trigger_bits != 0)
+      white += tvsetup.hamp_offset[k];
+
+   /*this reverse computation does not account for clipping, but should */
+   /*provide somewhat reasonable numbers */
+   contrast_mult =
+	 ((float)white - (float)black) / ((float)tvsetup.white_level[k] -
+					  (float)tvsetup.black_level[k]);
+   brightness_off =
+	 (int)(((float)black / contrast_mult) - tvsetup.black_level[k]);
+
+   /*+/-220 maps to 0-100. */
+   *p_brightness =
+	 range_limit((int)
+		     (0.5f +
+		      ((float)(brightness_off + 220) * 100.0f / 440.0f)), 0,
+		     100);
+
+   /*.75-1.25 maps to 0-100. */
+   *p_contrast =
+	 range_limit((int)
+		     (0.5f +
+		      ((float)(contrast_mult - 0.75f) * 100.0f / 0.5f)), 0,
+		     100);
+}
+
+/*==========================================================================*/
+/****/
+/*configure luma/chroma filters.*/
+
+static void
+config_yc_filter(unsigned long tv_std, int luma_filter, int chroma_filter)
+{
+   unsigned long reg, reg07, reg34;
+
+   if (houston_Rev() < HOUSTON_REV_B)
+      return;
+
+   /*luma filter. */
+   if (luma_filter)
+      reg = tvsetup.notch_filter[map_tvstd_to_index(tv_std)];
+   else
+      reg = 0;
+   houston_WriteReg(ENC_NOTCH_FILTER, reg, 1);
+
+   /*chroma filter. */
+   houston_ReadReg(ENC_REG07, &reg07, 1);
+   houston_ReadReg(ENC_REG34, &reg34, 1);
+   if (chroma_filter) {
+      reg07 &= ~0x08;
+      reg34 &= ~0x20;
+   } else {
+      reg07 |= 0x08;
+      reg34 |= 0x20;
+   }
+   houston_WriteReg(ENC_REG07, reg07, 1);
+   houston_WriteReg(ENC_REG34, reg34, 1);
+}
+
+static void
+conget_yc_filter(int *p_luma_filter, int *p_chroma_filter)
+{
+   unsigned long reg, reg07, reg34;
+
+   if (!p_luma_filter || !p_chroma_filter)
+      return;
+
+   if (houston_Rev() < HOUSTON_REV_B) {
+      *p_luma_filter = 0;
+      *p_chroma_filter = 0;
+      return;
+   }
+
+   /*luma filter. */
+   houston_ReadReg(ENC_NOTCH_FILTER, &reg, 1);
+   *p_luma_filter = (reg ? 1 : 0);
+
+   /*chroma filter. */
+   houston_ReadReg(ENC_REG07, &reg07, 1);
+   houston_ReadReg(ENC_REG34, &reg34, 1);
+   *p_chroma_filter = !((0x08 & reg07) || (0x20 & reg34));
+}
+
+/*==========================================================================*/
+/****/
+/*//	Macrovision*/
+
+static void
+config_macrovision(unsigned long tv_std, unsigned int trigger_bits)
+{
+/****/
+/*Constants to index into mvsetup columns.*/
+/****/
+#define	nNTSC_APS00		0	/*ntsc mv off. */
+#define	nNTSC_APS01		1	/*ntsc AGC only. */
+#define	nNTSC_APS10		2	/*ntsc AGC + 2-line CS. */
+#define	nNTSC_APS11		3	/*ntsc AGC + 4-line CS. */
+#define	nPAL_APS00		4	/*pal mv off. */
+#define	nPAL_APSXX		5	/*pal mv on. */
+#define	nMVModes		6
+
+/****/
+/*Macrovision setup table.*/
+/****/
+   static const struct mvparms
+   {
+      unsigned short n0[nMVModes];
+      unsigned short n1[nMVModes];
+      unsigned short n2[nMVModes];
+      unsigned short n3[nMVModes];
+      unsigned short n4[nMVModes];
+      unsigned short n5[nMVModes];
+      unsigned short n6[nMVModes];
+      unsigned short n7[nMVModes];
+      unsigned short n8[nMVModes];
+      unsigned short n9[nMVModes];
+      unsigned short n10[nMVModes];
+      unsigned short n11[nMVModes];
+      unsigned short n12[nMVModes];
+      unsigned short n13[nMVModes];
+      unsigned short n14[nMVModes];
+      unsigned short n15[nMVModes];
+      unsigned short n16[nMVModes];
+      unsigned short n17[nMVModes];
+      unsigned short n18[nMVModes];
+      unsigned short n19[nMVModes];
+      unsigned short n20[nMVModes];
+      unsigned short n21[nMVModes];
+      unsigned short n22[nMVModes];
+      unsigned short agc_pulse_level[nMVModes];
+      unsigned short bp_pulse_level[nMVModes];
+   }
+
+   mvsetup =
+   {					/*//    ntsc    ntsc    ntsc    ntsc    pal             pal */
+      /*//    MV              AGC             AGC +   AGC +   MV              MV */
+      /*//    off.    only    2-line  4-line  off.    on. */
+      /*//                                    CS.             CS. */
+      {
+      0x00, 0x36, 0x3e, 0x3e, 0x00, 0x3e}
+      ,					/*n0 */
+      {
+      0x1d, 0x1d, 0x1d, 0x17, 0x1a, 0x1a}
+      ,					/*n1 */
+      {
+      0x11, 0x11, 0x11, 0x15, 0x22, 0x22}
+      ,					/*n2 */
+      {
+      0x25, 0x25, 0x25, 0x21, 0x2a, 0x2a}
+      ,					/*n3 */
+      {
+      0x11, 0x11, 0x11, 0x15, 0x22, 0x22}
+      ,					/*n4 */
+      {
+      0x01, 0x01, 0x01, 0x05, 0x05, 0x05}
+      ,					/*n5 */
+      {
+      0x07, 0x07, 0x07, 0x05, 0x02, 0x02}
+      ,					/*n6 */
+      {
+      0x00, 0x00, 0x00, 0x02, 0x00, 0x00}
+      ,					/*n7 */
+      {
+      0x1b, 0x1b, 0x1b, 0x1b, 0x1c, 0x1c}
+      ,					/*n8 */
+      {
+      0x1b, 0x1b, 0x1b, 0x1b, 0x3d, 0x3d}
+      ,					/*n9 */
+      {
+      0x24, 0x24, 0x24, 0x24, 0x14, 0x14}
+      ,					/*n10 */
+      {
+      0x780f, 0x780f, 0x780f, 0x780f, 0x7e07, 0x7e07}
+      ,					/*n11 */
+      {
+      0x0000, 0x0000, 0x0000, 0x0000, 0x5402, 0x5402}
+      ,					/*n12 */
+      {
+      0x0f, 0x0f, 0x0f, 0x0f, 0xfe, 0xfe}
+      ,					/*n13 */
+      {
+      0x0f, 0x0f, 0x0f, 0x0f, 0x7e, 0x7e}
+      ,					/*n14 */
+      {
+      0x60, 0x60, 0x60, 0x60, 0x60, 0x60}
+      ,					/*n15 */
+      {
+      0x01, 0x01, 0x01, 0x01, 0x00, 0x00}
+      ,					/*n16 */
+      {
+      0x0a, 0x0a, 0x0a, 0x0a, 0x08, 0x08}
+      ,					/*n17 */
+      {
+      0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+      ,					/*n18 */
+      {
+      0x05, 0x05, 0x05, 0x05, 0x04, 0x04}
+      ,					/*n19 */
+      {
+      0x04, 0x04, 0x04, 0x04, 0x07, 0x07}
+      ,					/*n20 */
+      {
+      0x03ff, 0x03ff, 0x03ff, 0x03ff, 0x0155, 0x0155}
+      ,					/*n21 */
+      {
+      0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+      ,					/*n22 */
+      {
+      0xa3, 0xa3, 0xa3, 0xa3, 0xa3, 0xa3}
+      ,					/*agc_pulse_level */
+      {
+      0xc8, 0xc8, 0xc8, 0xc8, 0xc8, 0xc8}
+      ,					/*bp_pulse_level */
+   };
+
+   int nMode;
+   unsigned long misc;
+   unsigned short n0;
+
+   trigger_bits &= 0x3;
+
+   /*Determine the OEM Macrovision Program Mode and Register 0 Data. */
+   if (IS_NTSC(tv_std)) {
+      /*NTSC TV Standard. */
+      if (trigger_bits == 0) {
+	 /*turn Macrovision OFF. */
+	 nMode = nNTSC_APS00;
+      } else if (trigger_bits == 1) {
+	 /*AGC Only. */
+	 nMode = nNTSC_APS01;
+      } else if (trigger_bits == 2) {
+	 /*AGC + 2-line CS. */
+	 nMode = nNTSC_APS10;
+      } else {
+	 /*AGC + 4-line CS. */
+	 nMode = nNTSC_APS11;
+      }
+   } else {
+      /*PAL TV Standard. */
+      if (trigger_bits == 0) {
+	 /*turn Macrovision OFF. */
+	 nMode = nPAL_APS00;
+      } else {
+	 /*APS 01, 10, or 11. */
+	 nMode = nPAL_APSXX;
+      }
+   }
+
+   /*Retrieve the Macrovision Program Mode Data */
+   if (tv_std != GFX_TV_STANDARD_PAL_M)
+      n0 = mvsetup.n0[nMode];
+   else {
+      /*PAL-M sets up like NTSC except for n0. */
+      if ((trigger_bits & 0x03) == 0)
+	 n0 = mvsetup.n0[nPAL_APS00];
+      else
+	 n0 = mvsetup.n0[nPAL_APSXX];
+   }
+
+   /*download settings now. */
+   houston_WriteReg(MV_N0, n0, 1);
+   houston_WriteReg(MV_N1, mvsetup.n1[nMode], 1);
+   houston_WriteReg(MV_N2, mvsetup.n2[nMode], 1);
+   houston_WriteReg(MV_N3, mvsetup.n3[nMode], 1);
+   houston_WriteReg(MV_N4, mvsetup.n4[nMode], 1);
+   houston_WriteReg(MV_N5, mvsetup.n5[nMode], 1);
+   houston_WriteReg(MV_N6, mvsetup.n6[nMode], 1);
+   houston_WriteReg(MV_N7, mvsetup.n7[nMode], 1);
+   houston_WriteReg(MV_N8, mvsetup.n8[nMode], 1);
+   houston_WriteReg(MV_N9, mvsetup.n9[nMode], 1);
+   houston_WriteReg(MV_N10, mvsetup.n10[nMode], 1);
+   houston_WriteReg(MV_N11, mvsetup.n11[nMode] & 0xff, 1);
+   houston_WriteReg(MV_N11 + 1, mvsetup.n11[nMode] >> 8, 1);
+   houston_WriteReg(MV_N12, mvsetup.n12[nMode] & 0xff, 1);
+   houston_WriteReg(MV_N12 + 1, mvsetup.n12[nMode] >> 8, 1);
+   houston_WriteReg(MV_N13, mvsetup.n13[nMode], 1);
+   houston_WriteReg(MV_N14, mvsetup.n14[nMode], 1);
+   houston_WriteReg(MV_N15, mvsetup.n15[nMode], 1);
+   houston_WriteReg(MV_N16, mvsetup.n16[nMode], 1);
+   houston_WriteReg(MV_N17, mvsetup.n17[nMode], 1);
+   houston_WriteReg(MV_N18, mvsetup.n18[nMode], 1);
+   houston_WriteReg(MV_N19, mvsetup.n19[nMode], 1);
+   houston_WriteReg(MV_N20, mvsetup.n20[nMode], 1);
+   houston_WriteReg(MV_N21, mvsetup.n21[nMode] & 0xff, 1);
+   houston_WriteReg(MV_N21 + 1, mvsetup.n21[nMode] >> 8, 1);
+   houston_WriteReg(MV_N22, mvsetup.n22[nMode], 1);
+   houston_WriteReg(MV_AGC_PULSE_LEVEL, mvsetup.agc_pulse_level[nMode], 1);
+   houston_WriteReg(MV_BP_PULSE_LEVEL, mvsetup.bp_pulse_level[nMode], 1);
+
+   houston_ReadReg(HOUSTON_MISC, &misc, 2);
+   if (trigger_bits == 0)
+      misc &= ~MISC_MV_SOFT_EN;
+   else
+      misc |= MISC_MV_SOFT_EN;
+   houston_WriteReg(HOUSTON_MISC, misc, 2);
+}
+
+static void
+conget_macrovision(unsigned long tv_std, unsigned int *p_cp_trigger_bits)
+{
+   unsigned long n0, n1;
+
+   if (!p_cp_trigger_bits)
+      return;
+
+   houston_ReadReg(MV_N0, &n0, 1);
+   houston_ReadReg(MV_N1, &n1, 1);
+
+   *p_cp_trigger_bits = 0;
+
+   if (IS_NTSC(tv_std)) {
+      switch (n0) {
+      case 0:
+	 *p_cp_trigger_bits = 0;
+	 break;
+
+      case 0x36:
+	 *p_cp_trigger_bits = 1;
+	 break;
+
+      case 0x3E:
+	 {
+	    if (0x1D == n1)
+	       *p_cp_trigger_bits = 2;
+	    else
+	       *p_cp_trigger_bits = 3;
+	 }
+	 break;
+      }
+   } else if (IS_PAL(tv_std)) {
+      if (0 == n0)
+	 *p_cp_trigger_bits = 0;
+      else {
+	 /*don't know here what the non-zero trigger bits were */
+	 *p_cp_trigger_bits = 1;
+      }
+   }
+}
+
+/*//	PLAL_MediaGX.cpp*/
+/*//==========================================================================*/
+/****/
+/*These functions provides implementation of platform-specific functions*/
+/*MediaGX platform.*/
+/****/
+/*//==========================================================================*/
+
+/*MediaGX control registers.*/
+#define CCR3	0xC3
+#define	GCR		0xb8
+
+/*Media GX registers*/
+/*
+#define	DC_UNLOCK			0x8300
+#define	DC_GENERAL_CFG		0x8304
+#define	DC_TIMING_CFG		0x8308
+#define	DC_OUTPUT_CFG		0x830c
+#define	DC_H_TIMING_1		0X8330
+#define	DC_H_TIMING_2		0X8334
+#define	DC_H_TIMING_3		0X8338
+#define	DC_FP_H_TIMING		0X833c
+#define	DC_V_TIMING_1		0X8340
+#define	DC_V_TIMING_2		0X8344
+#define	DC_V_TIMING_3		0X8348
+#define	DC_FP_V_TIMING		0X834c
+*/
+/*Media GX general config register.*/
+#define	GX_DCLK_MUL			0x00c0
+#define	GX_DCLKx1			0x0040
+#define	GX_DCLKx2			0x0080
+#define GX_DCLKx4			0x00c0
+
+/*Media GX timing config register.*/
+#define	GX_TGEN				0x0020
+
+/*Cx5530 register offsets (from GX_BASE).*/
+#define	CX_DISPLAY_CONFIG	0x10004
+#define	CX_DOT_CLK			0x10024
+#define	CX_TV_CONFIG		0x10028
+
+/*Cx5530 display configuration register.*/
+#define	CX_FPVSYNC_POL		0x0800
+#define	CX_FPHSYNC_POL		0x0400
+#define	CX_FPDATA_ENB		0x0080
+#define	CX_FPPOWER_ENB		0x0040
+#define CX_CRTVSYNC_POL		0x0200
+#define CX_CRTHSYNC_POL		0x0100
+
+/*Cx5530 dot clock configuration register.*/
+#define	CX_TVCLK_SELECT		0x0400
+
+/*Cx5530 tv configuration register*/
+#define CX_INVERT_FPCLK (1 << 6)
+
+/*//==========================================================================*/
+/****/
+/*//	FS450 I2C Address*/
+/****/
+/*//	There are two possible 7-bit addresses, 0x4A and 0x6A.*/
+/*//	The address if selectable via pins on the FS450.*/
+/*//	There are also two possible 10-bit addresses, 0x224 and 0x276, but this*/
+/*//	source is not designed to use them.*/
+/****/
+
+#define	FS450_I2C_ADDRESS (0x4A)
+
+static unsigned char
+PLAL_FS450_i2c_address(void)
+{
+   return FS450_I2C_ADDRESS;
+}
+
+/*//==========================================================================*/
+/****/
+/*//	FS450 UIM mode*/
+/****/
+/*//	This mode is programmed in the FS450 command register when enabling TV*/
+/*//	out.*/
+
+static int
+PLAL_FS450_UIM_mode(void)
+{
+   return 3;
+}
+
+/*//==========================================================================*/
+/****/
+/*//	Read and Write MediaGX registers*/
+
+static unsigned long
+ReadGx(unsigned long inRegAddr)
+{
+   unsigned long data;
+
+   DMAL_ReadUInt32(inRegAddr, &data);
+
+   return data;
+}
+
+static void
+WriteGx(unsigned long inRegAddr, unsigned long inData)
+{
+   int is_timing_register;
+   unsigned long reg_timing_cfg;
+
+   /*because the unlock register for the MediaGx video registers may not */
+   /*persist, we will write the unlock code before every write. */
+   DMAL_WriteUInt32(DC_UNLOCK, 0x4758);
+
+   /*see if register is a timing register */
+   is_timing_register =
+	 (DC_H_TIMING_1 == inRegAddr) ||
+	 (DC_H_TIMING_2 == inRegAddr) ||
+	 (DC_H_TIMING_3 == inRegAddr) ||
+	 (DC_FP_H_TIMING == inRegAddr) ||
+	 (DC_V_TIMING_1 == inRegAddr) ||
+	 (DC_V_TIMING_2 == inRegAddr) ||
+	 (DC_V_TIMING_3 == inRegAddr) || (DC_FP_V_TIMING == inRegAddr);
+
+   /*if the register is a timing register, clear the TGEN bit to allow modification */
+   if (is_timing_register) {
+      DMAL_ReadUInt32(DC_TIMING_CFG, &reg_timing_cfg);
+      DMAL_WriteUInt32(DC_TIMING_CFG, reg_timing_cfg & ~GX_TGEN);
+   }
+
+   /*write the requested register */
+   DMAL_WriteUInt32(inRegAddr, inData);
+
+   /*reset the TGEN bit to previous state */
+   if (is_timing_register) {
+      DMAL_WriteUInt32(DC_TIMING_CFG, reg_timing_cfg);
+   }
+}
+
+#ifdef FS450_DIRECTREG
+
+/*//==========================================================================*/
+/****/
+/*//	Platform-specific processing for a Read or Write Register calls.*/
+/*//	The functions should return true if the specified register belongs to*/
+/*//	this platform.*/
+
+static int
+PLAL_ReadRegister(S_REG_INFO * p_reg)
+{
+   if (!p_reg)
+      return 0;
+
+   if (SOURCE_GCC == p_reg->source) {
+      p_reg->value = ReadGx(p_reg->offset);
+
+      return 1;
+   }
+
+   return 0;
+}
+
+static int
+PLAL_WriteRegister(const S_REG_INFO * p_reg)
+{
+   if (!p_reg)
+      return 0;
+
+   if (SOURCE_GCC == p_reg->source) {
+      WriteGx(p_reg->offset, p_reg->value);
+
+      return 1;
+   }
+
+   return 0;
+}
+
+#endif
+
+/*//==========================================================================*/
+/****/
+/*//	Determine if TV is on*/
+
+static int
+PLAL_IsTVOn(void)
+{
+   unsigned long reg;
+
+   /*check Cx5530 dot clock */
+   reg = ReadGx(CX_DOT_CLK);
+   return (reg & CX_TVCLK_SELECT) ? 1 : 0;
+}
+
+/*//==========================================================================*/
+/****/
+/*//	Platform-specific actions to reset to VGA mode*/
+
+static int
+PLAL_EnableVga(void)
+{
+   unsigned long reg;
+
+   /*2 x dclk */
+   reg = ReadGx(DC_GENERAL_CFG);
+   reg &= ~GX_DCLK_MUL;
+   reg |= GX_DCLKx2;
+   WriteGx(DC_GENERAL_CFG, reg);
+
+   /*select pll dot clock. */
+   reg = ReadGx(CX_DOT_CLK);
+   reg &= ~CX_TVCLK_SELECT;
+   WriteGx(CX_DOT_CLK, reg);
+
+   /*timing config, reset everything on dclk. */
+   reg = ReadGx(DC_TIMING_CFG);
+   reg &= ~GX_TGEN;
+   WriteGx(DC_TIMING_CFG, reg);
+   reg |= GX_TGEN;
+   WriteGx(DC_TIMING_CFG, reg);
+
+   /*un-invert FP clock */
+   reg = ReadGx(CX_TV_CONFIG);
+   reg &= ~CX_INVERT_FPCLK;
+   WriteGx(CX_TV_CONFIG, reg);
+
+   return 0;
+}
+
+/*//==========================================================================*/
+/****/
+/*//	Platform-specific actions to enter TVout mode*/
+
+static int
+PLAL_PrepForTVout(void)
+{
+   unsigned int reg;
+
+   /*Cx5530 tv config. */
+   reg = 0;
+   WriteGx(CX_TV_CONFIG, reg);
+
+   /*invert FP clock */
+   reg = (int)ReadGx(CX_TV_CONFIG);
+   reg |= CX_INVERT_FPCLK;
+   WriteGx(CX_TV_CONFIG, reg);
+
+   return 0;
+}
+
+static int
+PLAL_SetTVTimingRegisters(const S_TIMING_SPECS * p_specs)
+{
+   unsigned long reg;
+
+   /*timing config, reset everything on dclk. */
+   reg = ReadGx(DC_TIMING_CFG);
+   reg &= ~GX_TGEN;
+   WriteGx(DC_TIMING_CFG, reg);
+
+   /*htotal and hactive. */
+   reg = ((p_specs->h_total - 1) << 16) | (p_specs->vga_width - 1);
+   WriteGx(DC_H_TIMING_1, reg);
+
+   /*hblank. */
+   reg = ((p_specs->h_total - 1) << 16) | (p_specs->vga_width - 1);
+   WriteGx(DC_H_TIMING_2, reg);
+
+   /*hsync. */
+   reg = ((p_specs->h_sync + 63) << 16) | p_specs->h_sync;
+   WriteGx(DC_H_TIMING_3, reg);
+
+   /*fp hsync. */
+   WriteGx(DC_FP_H_TIMING, reg);
+
+   /*vtotal and vactive. */
+   reg = ((p_specs->v_total - 1) << 16) | (p_specs->vga_lines - 1);
+   WriteGx(DC_V_TIMING_1, reg);
+
+   /*vblank. */
+   reg = ((p_specs->v_total - 1) << 16) | (p_specs->vga_lines - 1);
+   WriteGx(DC_V_TIMING_2, reg);
+
+   /*vsync. */
+   reg = ((p_specs->v_sync) << 16) | (p_specs->v_sync - 1);
+   WriteGx(DC_V_TIMING_3, reg);
+
+   /*fp vsync. */
+   reg = ((p_specs->v_sync - 1) << 16) | (p_specs->v_sync - 2);
+   WriteGx(DC_FP_V_TIMING, reg);
+
+   /*timing config, reenable all dclk stuff. */
+   reg = ReadGx(DC_TIMING_CFG);
+   reg |= GX_TGEN;
+   WriteGx(DC_TIMING_CFG, reg);
+
+   return 0;
+}
+
+static int
+PLAL_FinalEnableTVout(unsigned long vga_mode)
+{
+   unsigned int reg;
+
+   /*Cx5530 select tv dot clock. */
+   reg = (int)ReadGx(CX_DOT_CLK);
+   reg |= CX_TVCLK_SELECT;
+   WriteGx(CX_DOT_CLK, reg);
+
+   /*2 x dclk (actually 1x) */
+   reg = (int)ReadGx(DC_GENERAL_CFG);
+   reg &= ~GX_DCLK_MUL;
+   WriteGx(DC_GENERAL_CFG, reg);
+
+   reg |= GX_DCLKx2;
+   WriteGx(DC_GENERAL_CFG, reg);
+
+   /*Cx5530 display configuration register. */
+   reg = (int)ReadGx(CX_DISPLAY_CONFIG);
+   reg |= (CX_FPVSYNC_POL | CX_FPHSYNC_POL | CX_FPDATA_ENB | CX_FPPOWER_ENB);
+   WriteGx(CX_DISPLAY_CONFIG, reg);
+
+/*disable, shouldn't be necessary*/
+#if 0
+   /*kick MediaGX clock multiplier to clean up clock */
+   reg = ReadGx(DC_GENERAL_CFG);
+   reg &= ~GX_DCLK_MUL;
+   WriteGx(DC_GENERAL_CFG, reg);
+   reg |= GX_DCLKx2;
+   WriteGx(DC_GENERAL_CFG, reg);
+#endif
+
+   return 0;
+}
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/tv_fs450.h b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/tv_fs450.h
index 01f35052c..2b87710de 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/tv_fs450.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/tv_fs450.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/tv_fs450.h,v 1.1 2002/10/11 14:33:01 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/tv_fs450.h,v 1.1 2002/12/10 15:12:27 alanh Exp $ */
 /*
  * $Workfile: tv_fs450.h $
  *
@@ -128,38 +128,37 @@
  *
  * END_NSC_LIC_GPL */
 
-
 #ifndef __FS450_H__
 #define __FS450_H__
 
 #ifdef __cplusplus
-extern "C" {
+extern "C"
+{
 #endif
 
 /* ==========================================================================*/
 /*	Init and cleanup functions*/
 
-int FS450_init(void);
-void FS450_cleanup(void);
-	/* call FS450_init at startup to probe for and initialize FS450.*/
-	/* returns 0 if successful.*/
+   int FS450_init(void);
+   void FS450_cleanup(void);
+   /* call FS450_init at startup to probe for and initialize FS450. */
+   /* returns 0 if successful. */
 
 /* ==========================================================================*/
 /*	TV output on or off*/
 
-int FS450_get_tv_enable(unsigned int *p_on);
-int FS450_set_tv_enable(unsigned int on);
-	/* on is 1 for TV on, 0 for off*/
-
+   int FS450_get_tv_enable(unsigned int *p_on);
+   int FS450_set_tv_enable(unsigned int on);
+   /* on is 1 for TV on, 0 for off */
 
 /* ==========================================================================*/
 /*	TV standard*/
 
-int FS450_get_tv_standard(unsigned long *p_standard);
-int FS450_get_available_tv_standards(unsigned long *p_standards);
-int FS450_set_tv_standard(unsigned long standard);
-	/* standard is one of the FS450_TV_STANDARD constants*/
-	/* standards is a bitmask of zero or more FS450_TV_STANDARD constants*/
+   int FS450_get_tv_standard(unsigned long *p_standard);
+   int FS450_get_available_tv_standards(unsigned long *p_standards);
+   int FS450_set_tv_standard(unsigned long standard);
+   /* standard is one of the FS450_TV_STANDARD constants */
+   /* standards is a bitmask of zero or more FS450_TV_STANDARD constants */
 
 /* FS450 TV Standard flags*/
 #define FS450_TV_STANDARD_NTSC_M 0x0001
@@ -172,15 +171,14 @@ int FS450_set_tv_standard(unsigned long standard);
 #define FS450_TV_STANDARD_PAL_N 0x0080
 #define FS450_TV_STANDARD_PAL_G 0x0100
 
-
 /* ==========================================================================*/
 /*	VGA mode assumed by FS450*/
 
-int FS450_get_vga_mode(unsigned long *p_vga_mode);
-int FS450_get_available_vga_modes(unsigned long *p_vga_modes);
-int FS450_set_vga_mode(unsigned long vga_mode);
-	/* vga_mode is one of the FS450_VGA_MODE constants*/
-	/* vga_modes is a bitmask of zero or more FS450_VGA_MODE constants*/
+   int FS450_get_vga_mode(unsigned long *p_vga_mode);
+   int FS450_get_available_vga_modes(unsigned long *p_vga_modes);
+   int FS450_set_vga_mode(unsigned long vga_mode);
+   /* vga_mode is one of the FS450_VGA_MODE constants */
+   /* vga_modes is a bitmask of zero or more FS450_VGA_MODE constants */
 
 /* FS450 VGA Mode flags*/
 #define FS450_VGA_MODE_UNKNOWN 0
@@ -190,13 +188,12 @@ int FS450_set_vga_mode(unsigned long vga_mode);
 #define FS450_VGA_MODE_800X600 0x0008
 #define FS450_VGA_MODE_1024X768 0x0010
 
-
 /* ==========================================================================*/
 /*	TVout mode*/
 
-int FS450_get_tvout_mode(unsigned long *p_tvout_mode);
-int FS450_set_tvout_mode(unsigned long tvout_mode);
-	/* tvout_mode is a bitmask of FS450_TVOUT_MODE constants*/
+   int FS450_get_tvout_mode(unsigned long *p_tvout_mode);
+   int FS450_set_tvout_mode(unsigned long tvout_mode);
+   /* tvout_mode is a bitmask of FS450_TVOUT_MODE constants */
 
 /* FS450 TVout mode flags*/
 #define FS450_TVOUT_MODE_CVBS 0x0001
@@ -204,62 +201,58 @@ int FS450_set_tvout_mode(unsigned long tvout_mode);
 #define FS450_TVOUT_MODE_RGB 0x0004
 #define FS450_TVOUT_MODE_CVBS_YC (FS450_TVOUT_MODE_CVBS | FS450_TVOUT_MODE_YC)
 
-
 /* ==========================================================================*/
 /*	Flicker control*/
 
-int FS450_get_sharpness(int *p_sharpness);
-int FS450_set_sharpness(int sharpness);
-	/* sharpness is a percentage in tenths of a percent, 0 to 1000*/
-
-int FS450_get_flicker_filter(int *p_flicker);
-int FS450_set_flicker_filter(int flicker);
-	/* flicker_filter is a percentage in tenths of a percent, 0 to 1000*/
+   int FS450_get_sharpness(int *p_sharpness);
+   int FS450_set_sharpness(int sharpness);
+   /* sharpness is a percentage in tenths of a percent, 0 to 1000 */
 
+   int FS450_get_flicker_filter(int *p_flicker);
+   int FS450_set_flicker_filter(int flicker);
+   /* flicker_filter is a percentage in tenths of a percent, 0 to 1000 */
 
 /* ==========================================================================*/
 /*	Size and Position*/
 
-int FS450_get_overscan(int *p_x, int *p_y);
-int FS450_set_overscan(int x, int y);
-int FS450_get_position(int *p_x, int *p_y);
-int FS450_set_position(int x, int y);
-	/* x and y are horizontal and vertical adjustments, -1000 to +1000*/
-
+   int FS450_get_overscan(int *p_x, int *p_y);
+   int FS450_set_overscan(int x, int y);
+   int FS450_get_position(int *p_x, int *p_y);
+   int FS450_set_position(int x, int y);
+   /* x and y are horizontal and vertical adjustments, -1000 to +1000 */
 
 /* ==========================================================================*/
 /*	Visual adjustments*/
 
-int FS450_get_color(int *p_color);
-int FS450_set_color(int color);
-	/* color is a percentage, 0 to 100*/
+   int FS450_get_color(int *p_color);
+   int FS450_set_color(int color);
+   /* color is a percentage, 0 to 100 */
 
-int FS450_get_brightness(int *p_brightness);
-int FS450_set_brightness(int brightness);
-	/* brightness is a percentage, 0 to 100*/
+   int FS450_get_brightness(int *p_brightness);
+   int FS450_set_brightness(int brightness);
+   /* brightness is a percentage, 0 to 100 */
 
-int FS450_get_contrast(int *p_contrast);
-int FS450_set_contrast(int constrast);
-	/* contrast is a percentage, 0 to 100*/
+   int FS450_get_contrast(int *p_contrast);
+   int FS450_set_contrast(int constrast);
+   /* contrast is a percentage, 0 to 100 */
 
 /* ==========================================================================*/
 /*	Luma and Chroma filter*/
 
-int FS450_get_yc_filter(unsigned int *p_yc_filter);
-int FS450_set_yc_filter(unsigned int yc_filter);
-	/* yc_filter is a bitmask of FS450_LUMA_FILTER and/or FS450_CHROMA_FILTER*/
+   int FS450_get_yc_filter(unsigned int *p_yc_filter);
+   int FS450_set_yc_filter(unsigned int yc_filter);
+   /* yc_filter is a bitmask of FS450_LUMA_FILTER and/or FS450_CHROMA_FILTER */
 
 /* FS450 Luma and Chroma Filters*/
 #define FS450_LUMA_FILTER 0x0001
 #define FS450_CHROMA_FILTER 0x0002
 
-
 /* ==========================================================================*/
 /*	Macrovision*/
 
-int FS450_get_aps_trigger_bits(unsigned int *p_trigger_bits);
-int FS450_set_aps_trigger_bits(unsigned int trigger_bits);
-	/* trigger_bits is one of the FS450_APS_TRIGGER constants*/
+   int FS450_get_aps_trigger_bits(unsigned int *p_trigger_bits);
+   int FS450_set_aps_trigger_bits(unsigned int trigger_bits);
+   /* trigger_bits is one of the FS450_APS_TRIGGER constants */
 
 /* APS Trigger Bits*/
 #define FS450_APS_TRIGGER_OFF 0
@@ -267,7 +260,6 @@ int FS450_set_aps_trigger_bits(unsigned int trigger_bits);
 #define FS450_APS_TRIGGER_AGC_2_LINE 2
 #define FS450_APS_TRIGGER_AGC_4_LINE 3
 
-
 /* ==========================================================================*/
 /*	direct access to Houston and platform registers (debug builds only)*/
 /*	The two functions FS450_ReadRegister and FS450_WriteRegister allow access*/
@@ -279,20 +271,20 @@ int FS450_set_aps_trigger_bits(unsigned int trigger_bits);
 #define SOURCE_HOUSTON 0
 #define SOURCE_GCC 1
 
-typedef struct _S_REG_INFO
-{
-	int source;
-	unsigned int size;
-	unsigned long offset;
-	unsigned long value;
-} S_REG_INFO;
+   typedef struct _S_REG_INFO
+   {
+      int source;
+      unsigned int size;
+      unsigned long offset;
+      unsigned long value;
+   }
+   S_REG_INFO;
 
-int FS450_ReadRegister(S_REG_INFO *p_reg);
-int FS450_WriteRegister(S_REG_INFO *p_reg);
+   int FS450_ReadRegister(S_REG_INFO * p_reg);
+   int FS450_WriteRegister(S_REG_INFO * p_reg);
 
 #endif
 
-
 /* ==========================================================================*/
 /* Error Codes*/
 
@@ -308,11 +300,8 @@ int FS450_WriteRegister(S_REG_INFO *p_reg);
 #define ERR_I2C_WRITE_FAILED			0x1201
 #define ERR_I2C_READ_FAILED				0x1202
 
-
-
 #ifdef __cplusplus
 }
 #endif
 
 #endif
-
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/tv_fs451.c b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/tv_fs451.c
new file mode 100644
index 000000000..84aa0857e
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/tv_fs451.c
@@ -0,0 +1,246 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/tv_fs451.c,v 1.1 2002/12/10 15:12:27 alanh Exp $ */
+/*
+ * $Workfile: tv_fs451.c $
+ * $Revision: 1.2.2.1 $
+ *
+ * This file contains routines to control the FS451 tvout encoder.
+ *
+ * NSC_LIC_ALTERNATIVE_PREAMBLE
+ *
+ * Revision 1.0
+ *
+ * National Semiconductor Alternative GPL-BSD License
+ *
+ * National Semiconductor Corporation licenses this software 
+ * ("Software"):
+ *
+ *      Durango
+ *
+ * under one of the two following licenses, depending on how the 
+ * Software is received by the Licensee.
+ * 
+ * If this Software is received as part of the Linux Framebuffer or
+ * other GPL licensed software, then the GPL license designated 
+ * NSC_LIC_GPL applies to this Software; in all other circumstances 
+ * then the BSD-style license designated NSC_LIC_BSD shall apply.
+ *
+ * END_NSC_LIC_ALTERNATIVE_PREAMBLE */
+
+/* NSC_LIC_BSD
+ *
+ * National Semiconductor Corporation Open Source License for Durango
+ *
+ * (BSD License with Export Notice)
+ *
+ * Copyright (c) 1999-2001
+ * National Semiconductor Corporation.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met: 
+ *
+ *   * Redistributions of source code must retain the above copyright 
+ *     notice, this list of conditions and the following disclaimer. 
+ *
+ *   * Redistributions in binary form must reproduce the above 
+ *     copyright notice, this list of conditions and the following 
+ *     disclaimer in the documentation and/or other materials provided 
+ *     with the distribution. 
+ *
+ *   * Neither the name of the National Semiconductor Corporation nor 
+ *     the names of its contributors may be used to endorse or promote 
+ *     products derived from this software without specific prior 
+ *     written permission. 
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+ * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE,
+ * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE.
+ *
+ * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
+ * YOUR JURISDICTION. It is licensee's responsibility to comply with 
+ * any export regulations applicable in licensee's jurisdiction. Under 
+ * CURRENT (2001) U.S. export regulations this software 
+ * is eligible for export from the U.S. and can be downloaded by or 
+ * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
+ * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
+ * Syria, Sudan, Afghanistan and any other country to which the U.S. 
+ * has embargoed goods and services. 
+ *
+ * END_NSC_LIC_BSD */
+
+/* NSC_LIC_GPL
+ *
+ * National Semiconductor Corporation Gnu General Public License for Durango
+ *
+ * (GPL License with Export Notice)
+ *
+ * Copyright (c) 1999-2001
+ * National Semiconductor Corporation.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted under the terms of the GNU General 
+ * Public License as published by the Free Software Foundation; either 
+ * version 2 of the License, or (at your option) any later version  
+ *
+ * In addition to the terms of the GNU General Public License, neither 
+ * the name of the National Semiconductor Corporation nor the names of 
+ * its contributors may be used to endorse or promote products derived 
+ * from this software without specific prior written permission. 
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+ * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, 
+ * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE. See the GNU General Public License for more details. 
+ *
+ * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
+ * YOUR JURISDICTION. It is licensee's responsibility to comply with 
+ * any export regulations applicable in licensee's jurisdiction. Under 
+ * CURRENT (2001) U.S. export regulations this software 
+ * is eligible for export from the U.S. and can be downloaded by or 
+ * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
+ * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
+ * Syria, Sudan, Afghanistan and any other country to which the U.S. 
+ * has embargoed goods and services. 
+ *
+ * You should have received a copy of the GNU General Public License 
+ * along with this file; if not, write to the Free Software Foundation, 
+ * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 
+ *
+ * END_NSC_LIC_GPL */
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_tv_format
+ *
+ * This routine sets the TV encoder registers to the specified format
+ * and resolution.
+ * Currently only NTSC 640x480 is supported.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_TV_DYNAMIC
+int
+fs451_set_tv_format(int format, int resolution)
+#else
+int
+gfx_set_tv_format(int format, int resolution)
+#endif
+{
+   /* ### ADD ### IMPLEMENTATION */
+   return (0);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_tv_output
+ *
+ * This routine sets the TV encoder registers to the specified output type.
+ * Supported output types are : S-VIDEO and Composite.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_TV_DYNAMIC
+int
+fs451_set_tv_output(int output)
+#else
+int
+gfx_set_tv_output(int output)
+#endif
+{
+   /* ### ADD ### IMPLEMENTATION */
+   return (0);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_tv_defaults
+ *
+ * This routine sets all of the TV encoder registers to default values for 
+ * the specified format.  Currently only NTSC is supported.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_TV_DYNAMIC
+int
+fs451_set_tv_defaults(int format)
+#else
+int
+gfx_set_tv_defaults(int format)
+#endif
+{
+   /* ### ADD ### IMPLEMENTATION */
+   return (0);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_tv_enable
+ *
+ * This routine enables or disables the TV output.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_TV_DYNAMIC
+int
+fs451_set_tv_enable(int enable)
+#else
+int
+gfx_set_tv_enable(int enable)
+#endif
+{
+   /* ### ADD ### IMPLEMENTATION */
+   return (0);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_tv_cc_enable
+ *
+ * This routine enables or disables the use of the hardware CC registers 
+ * in the TV encoder.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_TV_DYNAMIC
+int
+fs451_set_tv_cc_enable(int enable)
+#else
+int
+gfx_set_tv_cc_enable(int enable)
+#endif
+{
+   /* ### ADD ### IMPLEMENTATION */
+   return (0);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_tv_cc_data
+ *
+ * This routine writes the two specified characters to the CC data register 
+ * of the TV encoder.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_TV_DYNAMIC
+int
+fs451_set_tv_cc_data(unsigned char data1, unsigned char data2)
+#else
+int
+gfx_set_tv_cc_data(unsigned char data1, unsigned char data2)
+#endif
+{
+   /* ### ADD ### IMPLEMENTATION */
+   return (0);
+}
+
+/* END OF FILE */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/tv_geode.c b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/tv_geode.c
new file mode 100644
index 000000000..193808340
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/tv_geode.c
@@ -0,0 +1,125 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/tv_geode.c,v 1.1 2002/12/10 15:12:27 alanh Exp $ */
+/*-----------------------------------------------------------------------------
+ * TV_GEODE.C
+ *
+ * Version 1.20 - February 9, 2000
+ *
+ * This file contains routines to program the TV encoder when it is 
+ * integrated onto a Geode processor.
+ *
+ * History:
+ *    Initial version ported from code by Ilia Stolov.
+ *    Versions 0.1 through 1.20 by Brian Falardeau.
+ *
+ * Copyright (c) 1999-2000 National Semiconductor.
+ *-----------------------------------------------------------------------------
+ */
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_tv_defaults
+ *
+ * This routine sets all of the TV encoder registers to default values for 
+ * the specified format.  Currently only NTSC is supported.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_TV_DYNAMIC
+int
+geode_set_tv_defaults(int format)
+#else
+int
+gfx_set_tv_defaults(int format)
+#endif
+{
+   /* SET DEFAULTS FOR NTSC */
+
+   WRITE_VID32(SC1400_TVOUT_HORZ_TIM, 0x00790359);
+   WRITE_VID32(SC1400_TVOUT_HORZ_SYNC, 0x03580350);
+   WRITE_VID32(SC1400_TVOUT_VERT_SYNC, 0x0A002001);
+   WRITE_VID32(SC1400_TVOUT_LINE_END, 0x039C00F0);
+   WRITE_VID32(SC1400_TVOUT_VERT_DOWNSCALE, 0xFFFFFFFF);
+   WRITE_VID32(SC1400_TVOUT_HORZ_SCALING, 0x10220700);
+   WRITE_VID32(SC1400_TVOUT_EMMA_BYPASS, 0x0002D0F0);
+   WRITE_VID32(SC1400_TVENC_TIM_CTRL_1, 0xA2E03000);
+   WRITE_VID32(SC1400_TVENC_TIM_CTRL_2, 0x1FF20000);
+   WRITE_VID32(SC1400_TVENC_TIM_CTRL_3, 0x00000000);
+   WRITE_VID32(SC1400_TVENC_SUB_FREQ, 0x21F12000);
+   WRITE_VID32(SC1400_TVENC_DISP_POS, 0x00030071);
+   WRITE_VID32(SC1400_TVENC_DISP_SIZE, 0x00EF02CF);
+
+   /* ### ADD ### DEFAULTS FOR PAL */
+   return (0);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_tv_enable
+ *
+ * This routine enables or disables the TV output.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_TV_DYNAMIC
+int
+geode_set_tv_enable(int enable)
+#else
+int
+gfx_set_tv_enable(int enable)
+#endif
+{
+   unsigned long value;
+
+   value = READ_VID32(SC1400_DISPLAY_CONFIG);
+   if (enable)
+      value |= SC1400_DCFG_TVOUT_EN;
+   else
+      value &= ~(SC1400_DCFG_TVOUT_EN);
+   WRITE_VID32(SC1400_DISPLAY_CONFIG, value);
+   return (0);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_tv_cc_enable
+ *
+ * This routine enables or disables the use of the hardware CC registers 
+ * in the TV encoder.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_TV_DYNAMIC
+int
+geode_set_tv_cc_enable(int enable)
+#else
+int
+gfx_set_tv_cc_enable(int enable)
+#endif
+{
+   unsigned long value;
+
+   value = READ_VID32(SC1400_TVENC_CC_CONTROL);
+   value &= ~(0x0005F);
+   if (enable)
+      value |= 0x51;
+   WRITE_VID32(SC1400_TVENC_CC_CONTROL, value);
+   return (0);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_tv_cc_data
+ *
+ * This routine writes the two specified characters to the CC data register 
+ * of the TV encoder.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_TV_DYNAMIC
+int
+geode_set_tv_cc_data(unsigned char data1, unsigned char data2)
+#else
+int
+gfx_set_tv_cc_data(unsigned char data1, unsigned char data2)
+#endif
+{
+   unsigned long value;
+
+   value = data1 | (((unsigned long)data2) << 8);
+   WRITE_VID32(SC1400_TVENC_CC_DATA, value);
+   return (0);
+}
+
+/* END OF FILE */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/vga_gu1.c b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/vga_gu1.c
index 754a64f94..d5fa26347 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/vga_gu1.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/vga_gu1.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/vga_gu1.c,v 1.1 2002/10/11 14:33:01 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/vga_gu1.c,v 1.1 2002/12/10 15:12:27 alanh Exp $ */
 /*
  * $Workfile: vga_gu1.c $
  *
@@ -130,7 +130,6 @@
  *
  * END_NSC_LIC_GPL */
 
-
 /* SoftVGA Extended CRTC register indices and bit definitions */
 
 #define CRTC_EXTENDED_REGISTER_LOCK		0x30
@@ -159,116 +158,115 @@ int gu1_detect_vsa2(void);
  * register (index 0x41).
  */
 
-gfx_vga_struct gfx_vga_modes[] = 
-{
+gfx_vga_struct gfx_vga_modes[] = {
 /*------------------------------------------------------------------------------*/
-	{ 640, 480, 60,     /* 640x480 */
-	  25,               /* 25 MHz clock = 60 Hz refresh rate */
-	  0xE3,             /* miscOutput register */
-	{ 0x5F, 0x4F, 0x50, 0x82, 0x54, 0x80, 0x0B, 0x3E, /* standard CRTC */ 
-	  0x80, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
-	  0xEA, 0x0C, 0xDF, 0x50, 0x00, 0xE7, 0x04, 0xE3, 0xFF },    
-	{ 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, /* extended CRTC */
-	  0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00 } },
+   {640, 480, 60,			/* 640x480 */
+    25,					/* 25 MHz clock = 60 Hz refresh rate */
+    0xE3,				/* miscOutput register */
+    {0x5F, 0x4F, 0x50, 0x82, 0x54, 0x80, 0x0B, 0x3E,	/* standard CRTC */
+     0x80, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+     0xEA, 0x0C, 0xDF, 0x50, 0x00, 0xE7, 0x04, 0xE3, 0xFF},
+    {0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00,	/* extended CRTC */
+     0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00}},
 /*------------------------------------------------------------------------------*/
-	{ 640, 480, 72,     /* 640x480 */
-	  29,               /* 29 MHz clock = 72 Hz refresh rate */
-	  0xE3,             /* miscOutput register */
-  { 0x63, 0x4f, 0x50, 0x86, 0x55, 0x99, 0x06, 0x3e,  /* standard CRTC */ 
-    0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0xe9, 0x0c, 0xdf, 0x00, 0x00, 0xe7, 0x00, 0xe3, 0xff },
-  { 0x6D, 0x00, 0x00, 0x03, 0x00, 0x01, 0x01, 0x00, /* extended CRTC */
-    0x00, 0x00, 0x01, 0x08, 0x80, 0x1F, 0x00, 0x4B } },
+   {640, 480, 72,			/* 640x480 */
+    29,					/* 29 MHz clock = 72 Hz refresh rate */
+    0xE3,				/* miscOutput register */
+    {0x63, 0x4f, 0x50, 0x86, 0x55, 0x99, 0x06, 0x3e,	/* standard CRTC */
+     0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+     0xe9, 0x0c, 0xdf, 0x00, 0x00, 0xe7, 0x00, 0xe3, 0xff},
+    {0x6D, 0x00, 0x00, 0x03, 0x00, 0x01, 0x01, 0x00,	/* extended CRTC */
+     0x00, 0x00, 0x01, 0x08, 0x80, 0x1F, 0x00, 0x4B}},
 /*------------------------------------------------------------------------------*/
-	{ 640, 480, 75,     /* 640x480 */
-	  31,               /* 31.5 MHz clock = 75 Hz refresh rate */
-	  0xE3,             /* miscOutput register */
-	{ 0x64, 0x4F, 0x4F, 0x88, 0x54, 0x9B, 0xF2, 0x1F, /* standard CRTC */ 
-	  0x80, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
-	  0xE1, 0x04, 0xDF, 0x50, 0x00, 0xDF, 0xF3, 0xE3, 0xFF },    
-	{ 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, /* extended CRTC */
-	  0x00, 0x00, 0x00, 0x03, 0x80, 0x1F, 0x00, 0x00 } },
+   {640, 480, 75,			/* 640x480 */
+    31,					/* 31.5 MHz clock = 75 Hz refresh rate */
+    0xE3,				/* miscOutput register */
+    {0x64, 0x4F, 0x4F, 0x88, 0x54, 0x9B, 0xF2, 0x1F,	/* standard CRTC */
+     0x80, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+     0xE1, 0x04, 0xDF, 0x50, 0x00, 0xDF, 0xF3, 0xE3, 0xFF},
+    {0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00,	/* extended CRTC */
+     0x00, 0x00, 0x00, 0x03, 0x80, 0x1F, 0x00, 0x00}},
 /*------------------------------------------------------------------------------*/
-	{ 800, 600, 60,     /* 800x600 */
-	  40,               /* 40 MHz clock = 60 Hz refresh rate */
-	  0x23,             /* miscOutput register */
-	{ 0x7F, 0x63, 0x64, 0x82, 0x6B, 0x1B, 0x72, 0xF0, /* standard CRTC */ 
-	  0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
-	  0x59, 0x0D, 0x57, 0x64, 0x00, 0x57, 0x73, 0xE3, 0xFF },    
-	{ 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, /* extended CRTC */
-	  0x00, 0x00, 0x00, 0x03, 0x80, 0x28, 0x00, 0x00 } },
+   {800, 600, 60,			/* 800x600 */
+    40,					/* 40 MHz clock = 60 Hz refresh rate */
+    0x23,				/* miscOutput register */
+    {0x7F, 0x63, 0x64, 0x82, 0x6B, 0x1B, 0x72, 0xF0,	/* standard CRTC */
+     0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+     0x59, 0x0D, 0x57, 0x64, 0x00, 0x57, 0x73, 0xE3, 0xFF},
+    {0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00,	/* extended CRTC */
+     0x00, 0x00, 0x00, 0x03, 0x80, 0x28, 0x00, 0x00}},
 /*------------------------------------------------------------------------------*/
-	{ 800, 600, 72,     /* 800x600 */
-	  47,               /* 47 MHz clock = 72 Hz refresh rate */
-	  0x2B,             /* miscOutput register */
-  { 0x7D, 0x63, 0x63, 0x81, 0x6D, 0x1B, 0x98, 0xF0, /* standard CRTC */
-    0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x7D, 0x03, 0x57, 0x00, 0x00, 0x57, 0x9A, 0xE3, 0xFF },
-  { 0x6F, 0x00, 0x00, 0x03, 0x00, 0x01, 0x01, 0x00, /* extended CRTC */
-    0x00, 0x00, 0x01, 0x08, 0x80, 0x32, 0x00, 0x4B } },
+   {800, 600, 72,			/* 800x600 */
+    47,					/* 47 MHz clock = 72 Hz refresh rate */
+    0x2B,				/* miscOutput register */
+    {0x7D, 0x63, 0x63, 0x81, 0x6D, 0x1B, 0x98, 0xF0,	/* standard CRTC */
+     0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+     0x7D, 0x03, 0x57, 0x00, 0x00, 0x57, 0x9A, 0xE3, 0xFF},
+    {0x6F, 0x00, 0x00, 0x03, 0x00, 0x01, 0x01, 0x00,	/* extended CRTC */
+     0x00, 0x00, 0x01, 0x08, 0x80, 0x32, 0x00, 0x4B}},
 /*------------------------------------------------------------------------------*/
-  	{ 800, 600, 75,     /* 800x600 */
-	  49,               /* 49.5 MHz clock = 75 Hz refresh rate */
-	  0x23,             /* miscOutput register */
-	{ 0x7F, 0x63, 0x63, 0x83, 0x68, 0x11, 0x6F, 0xF0, /* standard CRTC */ 
-	  0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
-	  0x59, 0x1C, 0x57, 0x64, 0x00, 0x57, 0x70, 0xE3, 0xFF },    
-	{ 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, /* extended CRTC */
-	  0x00, 0x00, 0x00, 0x03, 0x80, 0x31, 0x00, 0x00 } },
+   {800, 600, 75,			/* 800x600 */
+    49,					/* 49.5 MHz clock = 75 Hz refresh rate */
+    0x23,				/* miscOutput register */
+    {0x7F, 0x63, 0x63, 0x83, 0x68, 0x11, 0x6F, 0xF0,	/* standard CRTC */
+     0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+     0x59, 0x1C, 0x57, 0x64, 0x00, 0x57, 0x70, 0xE3, 0xFF},
+    {0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00,	/* extended CRTC */
+     0x00, 0x00, 0x00, 0x03, 0x80, 0x31, 0x00, 0x00}},
 /*------------------------------------------------------------------------------*/
-	{ 1024, 768, 60,    /* 1024x768 */
-	  65,               /* 65 MHz clock = 60 Hz refresh rate */
-	  0xE3,             /* miscOutput register */
-	{ 0xA3, 0x7F, 0x80, 0x86, 0x85, 0x96, 0x24, 0xF5, /* standard CRTC */ 
-	  0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
-	  0x04, 0x0A, 0xFF, 0x80, 0x00, 0xFF, 0x25, 0xE3, 0xFF },    
-	{ 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, /* extended CRTC */
-	  0x00, 0x00, 0x00, 0x03, 0x80, 0x41, 0x00, 0x00 } },
+   {1024, 768, 60,			/* 1024x768 */
+    65,					/* 65 MHz clock = 60 Hz refresh rate */
+    0xE3,				/* miscOutput register */
+    {0xA3, 0x7F, 0x80, 0x86, 0x85, 0x96, 0x24, 0xF5,	/* standard CRTC */
+     0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+     0x04, 0x0A, 0xFF, 0x80, 0x00, 0xFF, 0x25, 0xE3, 0xFF},
+    {0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00,	/* extended CRTC */
+     0x00, 0x00, 0x00, 0x03, 0x80, 0x41, 0x00, 0x00}},
 /*------------------------------------------------------------------------------*/
-	{ 1024, 768, 70,    /* 1024x768 */
-	  76,               /* 76 MHz clock = 70 Hz refresh rate */
-	  0x2B,             /* miscOutput register */
-  { 0xA1, 0x7F, 0x7F, 0x85, 0x85, 0x95, 0x24, 0xF5,  /* standard CRTC */ 
-    0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x03, 0x09, 0xFF, 0x00, 0x00, 0xFF, 0x26, 0xE3, 0xFF },
-  { 0x62, 0x00, 0x00, 0x03, 0x00, 0x01, 0x01, 0x00,  /* extended CRTC */
-    0x00, 0x00, 0x01, 0x02, 0x80, 0x4B, 0x00, 0x4B } },
+   {1024, 768, 70,			/* 1024x768 */
+    76,					/* 76 MHz clock = 70 Hz refresh rate */
+    0x2B,				/* miscOutput register */
+    {0xA1, 0x7F, 0x7F, 0x85, 0x85, 0x95, 0x24, 0xF5,	/* standard CRTC */
+     0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+     0x03, 0x09, 0xFF, 0x00, 0x00, 0xFF, 0x26, 0xE3, 0xFF},
+    {0x62, 0x00, 0x00, 0x03, 0x00, 0x01, 0x01, 0x00,	/* extended CRTC */
+     0x00, 0x00, 0x01, 0x02, 0x80, 0x4B, 0x00, 0x4B}},
 /*------------------------------------------------------------------------------*/
-	{ 1024, 768, 75,    /* 1024x768 */
-	  79,               /* 79 MHz clock = 75 Hz refresh rate */
-	  0xE3,             /* miscOutput register */
-	{ 0x9F, 0x7F, 0x7F, 0x83, 0x84, 0x8F, 0x1E, 0xF5, /* standard CRTC */ 
-	  0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
-	  0x01, 0x04, 0xFF, 0x80, 0x00, 0xFF, 0x1F, 0xE3, 0xFF },    
-	{ 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, /* extended CRTC */
-	  0x00, 0x00, 0x00, 0x03, 0x80, 0x4F, 0x00, 0x00 } },
+   {1024, 768, 75,			/* 1024x768 */
+    79,					/* 79 MHz clock = 75 Hz refresh rate */
+    0xE3,				/* miscOutput register */
+    {0x9F, 0x7F, 0x7F, 0x83, 0x84, 0x8F, 0x1E, 0xF5,	/* standard CRTC */
+     0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+     0x01, 0x04, 0xFF, 0x80, 0x00, 0xFF, 0x1F, 0xE3, 0xFF},
+    {0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00,	/* extended CRTC */
+     0x00, 0x00, 0x00, 0x03, 0x80, 0x4F, 0x00, 0x00}},
 /*------------------------------------------------------------------------------*/
-	{ 1280, 1024, 60,   /* 1280x1024 */
-	  108,              /* 108 MHz clock = 60 Hz refresh rate */
-	  0x23,             /* miscOutput register */
-	{ 0xCF, 0x9F, 0xA0, 0x92, 0xAA, 0x19, 0x28, 0x52, /* standard CRTC */ 
-	  0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
-	  0x01, 0x04, 0xFF, 0xA0, 0x00, 0x00, 0x29, 0xE3, 0xFF },    
-	{ 0x00, 0x51, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, /* extended CRTC */
-	  0x00, 0x00, 0x00, 0x03, 0x80, 0x6C, 0x00, 0x00 } },
+   {1280, 1024, 60,			/* 1280x1024 */
+    108,				/* 108 MHz clock = 60 Hz refresh rate */
+    0x23,				/* miscOutput register */
+    {0xCF, 0x9F, 0xA0, 0x92, 0xAA, 0x19, 0x28, 0x52,	/* standard CRTC */
+     0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+     0x01, 0x04, 0xFF, 0xA0, 0x00, 0x00, 0x29, 0xE3, 0xFF},
+    {0x00, 0x51, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00,	/* extended CRTC */
+     0x00, 0x00, 0x00, 0x03, 0x80, 0x6C, 0x00, 0x00}},
 /*------------------------------------------------------------------------------*/
-	{ 1280, 1024, 75,   /* 1280x1024 */
-	  135,              /* 135 MHz clock = 75 Hz refresh rate */
-	  0x23,             /* miscOutput register */
-	{ 0xCE, 0x9F, 0x9F, 0x92, 0xA4, 0x15, 0x28, 0x52, /* standard CRTC */ 
-	  0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
-	  0x01, 0x04, 0xFF, 0xA0, 0x00, 0x00, 0x29, 0xE3, 0xFF },    
-	{ 0x00, 0x51, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, /* extended CRTC */
-	  0x00, 0x00, 0x00, 0x03, 0x80, 0x87, 0x00, 0x00 } },
+   {1280, 1024, 75,			/* 1280x1024 */
+    135,				/* 135 MHz clock = 75 Hz refresh rate */
+    0x23,				/* miscOutput register */
+    {0xCE, 0x9F, 0x9F, 0x92, 0xA4, 0x15, 0x28, 0x52,	/* standard CRTC */
+     0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+     0x01, 0x04, 0xFF, 0xA0, 0x00, 0x00, 0x29, 0xE3, 0xFF},
+    {0x00, 0x51, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00,	/* extended CRTC */
+     0x00, 0x00, 0x00, 0x03, 0x80, 0x87, 0x00, 0x00}},
 /*------------------------------------------------------------------------------*/
-	{ 1280, 1024, 85,   /* 1280x1024 */
-	  159,              /* 159 MHz clock = 85 Hz refresh rate */
-	  0x2B,             /* miscOutput register */
-  { 0xD3, 0x9F, 0xA0, 0x98, 0xA8, 0x9C, 0x2E, 0x5A, /* standard CRTC */ 
-    0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x01, 0x04, 0xFF, 0x00, 0x00, 0xFF, 0x30, 0xE3, 0xFF },
-  { 0x6B, 0x41, 0x00, 0x03, 0x00, 0x01, 0x00, 0x00, /* extended CRTC */
-    0x00, 0x00, 0x01, 0x00, 0x80, 0x9D, 0x00, 0x4B } },
+   {1280, 1024, 85,			/* 1280x1024 */
+    159,				/* 159 MHz clock = 85 Hz refresh rate */
+    0x2B,				/* miscOutput register */
+    {0xD3, 0x9F, 0xA0, 0x98, 0xA8, 0x9C, 0x2E, 0x5A,	/* standard CRTC */
+     0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+     0x01, 0x04, 0xFF, 0x00, 0x00, 0xFF, 0x30, 0xE3, 0xFF},
+    {0x6B, 0x41, 0x00, 0x03, 0x00, 0x01, 0x00, 0x00,	/* extended CRTC */
+     0x00, 0x00, 0x01, 0x00, 0x80, 0x9D, 0x00, 0x4B}},
 
 /*------------------------------------------------------------------------------*/
 };
@@ -281,18 +279,19 @@ gfx_vga_struct gfx_vga_modes[] =
  * This returns the active status of SoftVGA
  *-----------------------------------------------------------------------------
  */
-int gfx_get_softvga_active(void)
+int
+gfx_get_softvga_active(void)
 {
-	unsigned short crtcindex, crtcdata;
+   unsigned short crtcindex, crtcdata;
+
+   if (gu1_detect_vsa2())
+      return (gfx_get_vsa2_softvga_enable());
 
-	if(gu1_detect_vsa2()) 
-        return(gfx_get_vsa2_softvga_enable());
-           
-    crtcindex = (INB(0x3CC) & 0x01) ? 0x3D4 : 0x3B4;
-    crtcdata = crtcindex + 1;
+   crtcindex = (INB(0x3CC) & 0x01) ? 0x3D4 : 0x3B4;
+   crtcdata = crtcindex + 1;
 
-    OUTB(crtcindex, CRTC_MODE_SWITCH_CONTROL);
-    return(INB(crtcdata) & 0x1);
+   OUTB(crtcindex, CRTC_MODE_SWITCH_CONTROL);
+   return (INB(crtcdata) & 0x1);
 }
 
 /*-----------------------------------------------------------------------------
@@ -309,20 +308,23 @@ int gfx_get_softvga_active(void)
  * enabled and the VGA register writes will go out to the external card.
  *-----------------------------------------------------------------------------
  */
-int gfx_vga_test_pci(void)
+int
+gfx_vga_test_pci(void)
 {
-	int softvga = 1;
-	unsigned long value;
-	value = gfx_pci_config_read(0x80009400);
-	if ((value & 0x0000FFFF) != 0x1078) softvga = 0;
-	else
-	{
-		value = gfx_pci_config_read(0x80009404);
-		gfx_pci_config_write(0x80009404, value | 0x02);
-		if (!(gfx_pci_config_read(0x80009404) & 0x02)) softvga = 0;
-		gfx_pci_config_write(0x80009404, value);
-	}
-	return(softvga);
+   int softvga = 1;
+   unsigned long value;
+
+   value = gfx_pci_config_read(0x80009400);
+   if ((value & 0x0000FFFF) != 0x1078)
+      softvga = 0;
+   else {
+      value = gfx_pci_config_read(0x80009404);
+      gfx_pci_config_write(0x80009404, value | 0x02);
+      if (!(gfx_pci_config_read(0x80009404) & 0x02))
+	 softvga = 0;
+      gfx_pci_config_write(0x80009404, value);
+   }
+   return (softvga);
 }
 
 /*-----------------------------------------------------------------------------
@@ -331,11 +333,13 @@ int gfx_vga_test_pci(void)
  * This routine returns the value of the PCI command register.
  *-----------------------------------------------------------------------------
  */
-unsigned char gfx_vga_get_pci_command(void)
+unsigned char
+gfx_vga_get_pci_command(void)
 {
-	unsigned long value;
-	value = gfx_pci_config_read(0x80009404);
-	return((unsigned char) value);
+   unsigned long value;
+
+   value = gfx_pci_config_read(0x80009404);
+   return ((unsigned char)value);
 }
 
 /*-----------------------------------------------------------------------------
@@ -348,13 +352,15 @@ unsigned char gfx_vga_get_pci_command(void)
  *    Bit 1: Enable VGA memory
  *-----------------------------------------------------------------------------
  */
-int gfx_vga_set_pci_command(unsigned char command)
+int
+gfx_vga_set_pci_command(unsigned char command)
 {
-	unsigned long value;
-	value = gfx_pci_config_read(0x80009404) & 0xFFFFFF00;
-	value |= (unsigned long) command;
-	gfx_pci_config_write(0x80009404, value);
-	return(GFX_STATUS_OK);
+   unsigned long value;
+
+   value = gfx_pci_config_read(0x80009404) & 0xFFFFFF00;
+   value |= (unsigned long)command;
+   gfx_pci_config_write(0x80009404, value);
+   return (GFX_STATUS_OK);
 }
 
 /*-----------------------------------------------------------------------------
@@ -366,11 +372,12 @@ int gfx_vga_set_pci_command(unsigned char command)
  * provide a better way to have SoftVGA sit in the background.
  *-----------------------------------------------------------------------------
  */
-int gfx_vga_seq_reset(int reset)
+int
+gfx_vga_seq_reset(int reset)
 {
-	OUTB(0x3C4, 0);
-	OUTB(0x3C5, (unsigned char) (reset ? 0x00 : 0x03));
-	return(GFX_STATUS_OK);
+   OUTB(0x3C4, 0);
+   OUTB(0x3C5, (unsigned char)(reset ? 0x00 : 0x03));
+   return (GFX_STATUS_OK);
 }
 
 /*-----------------------------------------------------------------------------
@@ -385,20 +392,21 @@ int gfx_vga_seq_reset(int reset)
  * registers are not part of the save/restore paradigm.
  *-----------------------------------------------------------------------------
  */
-int gfx_vga_set_graphics_bits(void)
+int
+gfx_vga_set_graphics_bits(void)
 {
-	/* SET GRAPHICS BIT IN GRAPHICS CONTROLLER REG 0x06 */
+   /* SET GRAPHICS BIT IN GRAPHICS CONTROLLER REG 0x06 */
 
-	OUTB(0x3CE, 0x06);
-	OUTB(0x3CF, 0x01);
+   OUTB(0x3CE, 0x06);
+   OUTB(0x3CF, 0x01);
 
-	/* SET GRAPHICS BIT IN ATTRIBUTE CONTROLLER REG 0x10 */
+   /* SET GRAPHICS BIT IN ATTRIBUTE CONTROLLER REG 0x10 */
 
-	INB(0x3BA); /* Reset flip-flop */
-	INB(0x3DA);
-	OUTB(0x3C0, 0x10);
-	OUTB(0x3C0, 0x01);
-	return(GFX_STATUS_OK);
+   INB(0x3BA);				/* Reset flip-flop */
+   INB(0x3DA);
+   OUTB(0x3C0, 0x10);
+   OUTB(0x3C0, 0x01);
+   return (GFX_STATUS_OK);
 }
 
 /*-----------------------------------------------------------------------------
@@ -410,49 +418,50 @@ int gfx_vga_set_graphics_bits(void)
  * set the mode.
  *-----------------------------------------------------------------------------
  */
-int gfx_vga_mode(gfx_vga_struct *vga, int xres, int yres, int bpp, int hz)
+int
+gfx_vga_mode(gfx_vga_struct * vga, int xres, int yres, int bpp, int hz)
 {
-	int i;
-	unsigned short pitch;
-	for (i = 0; i < GFX_VGA_MODES; i++)
-	{
-		if ((gfx_vga_modes[i].xsize == xres) &&
-			(gfx_vga_modes[i].ysize == yres) &&
-			(gfx_vga_modes[i].hz == hz))
-		{
-			/* COPY ENTIRE STRUCTURE FROM THE TABLE */
-
-			*vga = gfx_vga_modes[i];
-
-			/* SET PITCH TO 1K OR 2K */
-			/* CRTC_EXTENDED_OFFSET index is 0x45, so offset = 0x05 */
-
-			pitch = (unsigned short) xres;
-			if (bpp > 8) pitch <<= 1;
-			if (pitch <= 1024) pitch = 1024 >> 3;
-			else pitch = 2048 >> 3;
-			vga->stdCRTCregs[0x13] = (unsigned char) pitch;
-			vga->extCRTCregs[0x05] = (unsigned char)((pitch >> 8) & 0x03);
-
-			/* SET PROPER COLOR DEPTH VALUE */
-			/* CRTC_EXTENDED_COLOR_CONTROL index is 0x46, so offset = 0x06 */
-
-			switch(bpp)
-			{
-			case 15:
-				vga->extCRTCregs[0x06] = CRTC_BIT_16BPP | CRTC_BIT_555;
-				break;
-			case 16:
-				vga->extCRTCregs[0x06] = CRTC_BIT_16BPP;
-				break;
-			default:
-				vga->extCRTCregs[0x06] = 0;
-				break;
-			}
-			return(GFX_STATUS_OK);
-		}
-	}
-	return(GFX_STATUS_UNSUPPORTED);
+   unsigned int i;
+   unsigned short pitch;
+
+   for (i = 0; i < GFX_VGA_MODES; i++) {
+      if ((gfx_vga_modes[i].xsize == xres) &&
+	  (gfx_vga_modes[i].ysize == yres) && (gfx_vga_modes[i].hz == hz)) {
+	 /* COPY ENTIRE STRUCTURE FROM THE TABLE */
+
+	 *vga = gfx_vga_modes[i];
+
+	 /* SET PITCH TO 1K OR 2K */
+	 /* CRTC_EXTENDED_OFFSET index is 0x45, so offset = 0x05 */
+
+	 pitch = (unsigned short)xres;
+	 if (bpp > 8)
+	    pitch <<= 1;
+	 if (pitch <= 1024)
+	    pitch = 1024 >> 3;
+	 else
+	    pitch = 2048 >> 3;
+	 vga->stdCRTCregs[0x13] = (unsigned char)pitch;
+	 vga->extCRTCregs[0x05] = (unsigned char)((pitch >> 8) & 0x03);
+
+	 /* SET PROPER COLOR DEPTH VALUE */
+	 /* CRTC_EXTENDED_COLOR_CONTROL index is 0x46, so offset = 0x06 */
+
+	 switch (bpp) {
+	 case 15:
+	    vga->extCRTCregs[0x06] = CRTC_BIT_16BPP | CRTC_BIT_555;
+	    break;
+	 case 16:
+	    vga->extCRTCregs[0x06] = CRTC_BIT_16BPP;
+	    break;
+	 default:
+	    vga->extCRTCregs[0x06] = 0;
+	    break;
+	 }
+	 return (GFX_STATUS_OK);
+      }
+   }
+   return (GFX_STATUS_UNSUPPORTED);
 }
 
 /*-----------------------------------------------------------------------------
@@ -462,12 +471,13 @@ int gfx_vga_mode(gfx_vga_struct *vga, int xres, int yres, int bpp, int hz)
  * the specified pitch.  It does not program the hardware.
  *-----------------------------------------------------------------------------
  */
-int gfx_vga_pitch(gfx_vga_struct *vga, unsigned short pitch)
+int
+gfx_vga_pitch(gfx_vga_struct * vga, unsigned short pitch)
 {
-	pitch >>= 3;
-	vga->stdCRTCregs[0x13] = (unsigned char) pitch;
-	vga->extCRTCregs[0x05] = (unsigned char)((pitch >> 8) & 0x03);
-	return(0);
+   pitch >>= 3;
+   vga->stdCRTCregs[0x13] = (unsigned char)pitch;
+   vga->extCRTCregs[0x05] = (unsigned char)((pitch >> 8) & 0x03);
+   return (0);
 }
 
 /*-----------------------------------------------------------------------------
@@ -478,48 +488,45 @@ int gfx_vga_pitch(gfx_vga_struct *vga, unsigned short pitch)
  * be saved.
  *-----------------------------------------------------------------------------
  */
-int gfx_vga_save(gfx_vga_struct *vga, int flags)
+int
+gfx_vga_save(gfx_vga_struct * vga, int flags)
 {
-	int i;
-	unsigned short crtcindex, crtcdata;
-	crtcindex = (INB(0x3CC) & 0x01) ? 0x3D4 : 0x3B4;
-	crtcdata = crtcindex + 1;	
-
-	/* CHECK MISCELLANEOUS OUTPUT FLAG */
-
-	if (flags & GFX_VGA_FLAG_MISC_OUTPUT)
-	{
-		/* SAVE MISCCELLANEOUS OUTPUT REGISTER */
-
-		vga->miscOutput = INB(0x3CC);
-	}
-
-	/* CHECK STANDARD CRTC FLAG */
-
-	if (flags & GFX_VGA_FLAG_STD_CRTC)
-	{
-		/* SAVE STANDARD CRTC REGISTERS */
-
-		for (i = 0; i < GFX_STD_CRTC_REGS; i++)
-		{
-			OUTB(crtcindex, (unsigned char) i);
-			vga->stdCRTCregs[i] = INB(crtcdata);
-		}
-	}
-
-	/* CHECK EXTENDED CRTC FLAG */
-
-	if (flags & GFX_VGA_FLAG_EXT_CRTC)
-	{
-		/* SAVE EXTENDED CRTC REGISTERS */
-
-		for (i = 0; i < GFX_EXT_CRTC_REGS; i++)
-		{
-			OUTB(crtcindex, (unsigned char) (0x40+i));
-			vga->extCRTCregs[i] = INB(crtcdata);
-		}
-	}
-	return(0);
+   int i;
+   unsigned short crtcindex, crtcdata;
+
+   crtcindex = (INB(0x3CC) & 0x01) ? 0x3D4 : 0x3B4;
+   crtcdata = crtcindex + 1;
+
+   /* CHECK MISCELLANEOUS OUTPUT FLAG */
+
+   if (flags & GFX_VGA_FLAG_MISC_OUTPUT) {
+      /* SAVE MISCCELLANEOUS OUTPUT REGISTER */
+
+      vga->miscOutput = INB(0x3CC);
+   }
+
+   /* CHECK STANDARD CRTC FLAG */
+
+   if (flags & GFX_VGA_FLAG_STD_CRTC) {
+      /* SAVE STANDARD CRTC REGISTERS */
+
+      for (i = 0; i < GFX_STD_CRTC_REGS; i++) {
+	 OUTB(crtcindex, (unsigned char)i);
+	 vga->stdCRTCregs[i] = INB(crtcdata);
+      }
+   }
+
+   /* CHECK EXTENDED CRTC FLAG */
+
+   if (flags & GFX_VGA_FLAG_EXT_CRTC) {
+      /* SAVE EXTENDED CRTC REGISTERS */
+
+      for (i = 0; i < GFX_EXT_CRTC_REGS; i++) {
+	 OUTB(crtcindex, (unsigned char)(0x40 + i));
+	 vga->extCRTCregs[i] = INB(crtcdata);
+      }
+   }
+   return (0);
 }
 
 /*-----------------------------------------------------------------------------
@@ -529,23 +536,24 @@ int gfx_vga_save(gfx_vga_struct *vga, int flags)
  * behave like standard VGA. 
  *-----------------------------------------------------------------------------
  */
-void gfx_vga_clear_extended(void)
+void
+gfx_vga_clear_extended(void)
 {
-	int i;
-	unsigned short crtcindex, crtcdata;
-	crtcindex = (INB(0x3CC) & 0x01) ? 0x3D4 : 0x3B4;
-	crtcdata = crtcindex + 1;	
-
-	OUTB(crtcindex, 0x30);
-	OUTB(crtcdata, 0x57);
-	OUTB(crtcdata, 0x4C);
-	for (i = 0x40; i <= 0x4F; i++)
-	{
-		OUTB(crtcindex, (unsigned char) i);
-		OUTB(crtcdata, 0);
-	}
-	OUTB(crtcindex, 0x30);
-	OUTB(crtcdata, 0x00);
+   int i;
+   unsigned short crtcindex, crtcdata;
+
+   crtcindex = (INB(0x3CC) & 0x01) ? 0x3D4 : 0x3B4;
+   crtcdata = crtcindex + 1;
+
+   OUTB(crtcindex, 0x30);
+   OUTB(crtcdata, 0x57);
+   OUTB(crtcdata, 0x4C);
+   for (i = 0x40; i <= 0x4F; i++) {
+      OUTB(crtcindex, (unsigned char)i);
+      OUTB(crtcdata, 0);
+   }
+   OUTB(crtcindex, 0x30);
+   OUTB(crtcdata, 0x00);
 }
 
 /*-----------------------------------------------------------------------------
@@ -556,78 +564,74 @@ void gfx_vga_clear_extended(void)
  * be saved.
  *-----------------------------------------------------------------------------
  */
-int gfx_vga_restore(gfx_vga_struct *vga, int flags)
+int
+gfx_vga_restore(gfx_vga_struct * vga, int flags)
 {
-	int i;
-	unsigned short crtcindex, crtcdata;
-	crtcindex = (INB(0x3CC) & 0x01) ? 0x3D4 : 0x3B4;
-	crtcdata = crtcindex + 1;	
+   int i;
+   unsigned short crtcindex, crtcdata;
+
+   crtcindex = (INB(0x3CC) & 0x01) ? 0x3D4 : 0x3B4;
+   crtcdata = crtcindex + 1;
 
-	/* CHECK MISCELLANEOUS OUTPUT FLAG */
+   /* CHECK MISCELLANEOUS OUTPUT FLAG */
 
-	if (flags & GFX_VGA_FLAG_MISC_OUTPUT)
-	{
-		/* RESTORE MISCELLANEOUS OUTPUT REGISTER VALUE */
+   if (flags & GFX_VGA_FLAG_MISC_OUTPUT) {
+      /* RESTORE MISCELLANEOUS OUTPUT REGISTER VALUE */
 
-		OUTB(0x3C2, vga->miscOutput);
-	}
+      OUTB(0x3C2, vga->miscOutput);
+   }
 
-	/* CHECK STANDARD CRTC FLAG */
+   /* CHECK STANDARD CRTC FLAG */
 
-	if (flags & GFX_VGA_FLAG_STD_CRTC)
-	{
-		/* UNLOCK STANDARD CRTC REGISTERS */
+   if (flags & GFX_VGA_FLAG_STD_CRTC) {
+      /* UNLOCK STANDARD CRTC REGISTERS */
 
-		OUTB(crtcindex, 0x11); 
-		OUTB(crtcdata, 0);
+      OUTB(crtcindex, 0x11);
+      OUTB(crtcdata, 0);
 
-		/* RESTORE STANDARD CRTC REGISTERS */
+      /* RESTORE STANDARD CRTC REGISTERS */
 
-		for (i = 0; i < GFX_STD_CRTC_REGS; i++)
-		{
-			OUTB(crtcindex, (unsigned char) i); 
-			OUTB(crtcdata, vga->stdCRTCregs[i]);
-		}
-	}
-	
-	/* CHECK EXTENDED CRTC FLAG */
+      for (i = 0; i < GFX_STD_CRTC_REGS; i++) {
+	 OUTB(crtcindex, (unsigned char)i);
+	 OUTB(crtcdata, vga->stdCRTCregs[i]);
+      }
+   }
 
-	if (flags & GFX_VGA_FLAG_EXT_CRTC)
-	{
-		/* UNLOCK EXTENDED CRTC REGISTERS */
+   /* CHECK EXTENDED CRTC FLAG */
 
-		OUTB(crtcindex, 0x30); 
-		OUTB(crtcdata, 0x57);
-		OUTB(crtcdata, 0x4C);
+   if (flags & GFX_VGA_FLAG_EXT_CRTC) {
+      /* UNLOCK EXTENDED CRTC REGISTERS */
 
-		/* RESTORE EXTENDED CRTC REGISTERS */
+      OUTB(crtcindex, 0x30);
+      OUTB(crtcdata, 0x57);
+      OUTB(crtcdata, 0x4C);
 
-		for (i = 0; i < GFX_EXT_CRTC_REGS; i++)
-		{
-			OUTB(crtcindex, (unsigned char) (0x40+i)); 
-			OUTB(crtcdata, vga->extCRTCregs[i]);
-		}
+      /* RESTORE EXTENDED CRTC REGISTERS */
 
-		/* LOCK EXTENDED CRTC REGISTERS */
+      for (i = 0; i < GFX_EXT_CRTC_REGS; i++) {
+	 OUTB(crtcindex, (unsigned char)(0x40 + i));
+	 OUTB(crtcdata, vga->extCRTCregs[i]);
+      }
 
-		OUTB(crtcindex, 0x30); 
-		OUTB(crtcdata, 0x00);
+      /* LOCK EXTENDED CRTC REGISTERS */
 
-		/* CHECK IF DIRECT FRAME BUFFER MODE (VESA MODE) */
+      OUTB(crtcindex, 0x30);
+      OUTB(crtcdata, 0x00);
 
-		if (vga->extCRTCregs[0x03] & 1)
-		{
-			/* SET BORDER COLOR TO BLACK */
-			/* This really should be another thing saved/restored, but */
-			/* Durango currently doesn't do the attr controller registers. */
+      /* CHECK IF DIRECT FRAME BUFFER MODE (VESA MODE) */
 
-			INB(0x3BA); /* Reset flip-flop */
-			INB(0x3DA);
-			OUTB(0x3C0, 0x11);
-			OUTB(0x3C0, 0x00);
-		}
-	}
-	return(0);
+      if (vga->extCRTCregs[0x03] & 1) {
+	 /* SET BORDER COLOR TO BLACK */
+	 /* This really should be another thing saved/restored, but */
+	 /* Durango currently doesn't do the attr controller registers. */
+
+	 INB(0x3BA);			/* Reset flip-flop */
+	 INB(0x3DA);
+	 OUTB(0x3C0, 0x11);
+	 OUTB(0x3C0, 0x00);
+      }
+   }
+   return (0);
 }
 
 /*-----------------------------------------------------------------------------
@@ -638,40 +642,41 @@ int gfx_vga_restore(gfx_vga_struct *vga, int flags)
  * not validate the hardware with intermediate values.
  *-----------------------------------------------------------------------------
  */
-int gfx_vga_mode_switch(int active)
+int
+gfx_vga_mode_switch(int active)
 {
-	unsigned short crtcindex, crtcdata;
-	crtcindex = (INB(0x3CC) & 0x01) ? 0x3D4 : 0x3B4;
-	crtcdata = crtcindex + 1;	
+   unsigned short crtcindex, crtcdata;
+
+   crtcindex = (INB(0x3CC) & 0x01) ? 0x3D4 : 0x3B4;
+   crtcdata = crtcindex + 1;
 
-	/* UNLOCK EXTENDED CRTC REGISTERS */
+   /* UNLOCK EXTENDED CRTC REGISTERS */
 
-	OUTB(crtcindex, CRTC_EXTENDED_REGISTER_LOCK);
-	OUTB(crtcdata, 0x57);
-	OUTB(crtcdata, 0x4C);
+   OUTB(crtcindex, CRTC_EXTENDED_REGISTER_LOCK);
+   OUTB(crtcdata, 0x57);
+   OUTB(crtcdata, 0x4C);
 
-	/* SIGNAL THE BEGINNING OR END OF THE MODE SWITCH */
-    /* SoftVGA will hold off validating the back end hardware. */
+   /* SIGNAL THE BEGINNING OR END OF THE MODE SWITCH */
+   /* SoftVGA will hold off validating the back end hardware. */
 
-	OUTB(crtcindex, CRTC_MODE_SWITCH_CONTROL);
-	active = active ? 1 : 0;
-	OUTB(crtcdata, (unsigned char) active);
+   OUTB(crtcindex, CRTC_MODE_SWITCH_CONTROL);
+   active = active ? 1 : 0;
+   OUTB(crtcdata, (unsigned char)active);
 
-	/* WAIT UNTIL SOFTVGA HAS VALIDATED MODE IF ENDING MODE SWITCH */
-	/* This is for VSA1 only, where SoftVGA waits until the next */
-	/* vertical blank to validate the hardware state. */
+   /* WAIT UNTIL SOFTVGA HAS VALIDATED MODE IF ENDING MODE SWITCH */
+   /* This is for VSA1 only, where SoftVGA waits until the next */
+   /* vertical blank to validate the hardware state. */
 
-	if ((!active) && (!(gu1_detect_vsa2())))
-	{
-		OUTB(crtcindex, 0x33); 
-		while(INB(crtcdata) & 0x80); 
-	}
+   if ((!active) && (!(gu1_detect_vsa2()))) {
+      OUTB(crtcindex, 0x33);
+      while (INB(crtcdata) & 0x80) ;
+   }
 
-	/* LOCK EXTENDED CRTC REGISTERS */
+   /* LOCK EXTENDED CRTC REGISTERS */
 
-	OUTB(crtcindex, CRTC_EXTENDED_REGISTER_LOCK);
-	OUTB(crtcdata, 0x00);
-	return(0);
+   OUTB(crtcindex, CRTC_EXTENDED_REGISTER_LOCK);
+   OUTB(crtcdata, 0x00);
+   return (0);
 }
 
 /*-----------------------------------------------------------------------------
@@ -681,16 +686,20 @@ int gfx_vga_mode_switch(int active)
  * changed slightly.
  *-----------------------------------------------------------------------------
  */
-int gu1_detect_vsa2(void)
+int
+gu1_detect_vsa2(void)
 {
-	unsigned short crtcindex, crtcdata;
-	crtcindex = (INB(0x3CC) & 0x01) ? 0x3D4 : 0x3B4;
-	crtcdata = crtcindex + 1;	
-	OUTB(crtcindex, 0x35);
-	if (INB(crtcdata) != 'C') return(0);
-	OUTB(crtcindex, 0x36);
-	if (INB(crtcdata) != 'X') return(0);
-	return(1);
+   unsigned short crtcindex, crtcdata;
+
+   crtcindex = (INB(0x3CC) & 0x01) ? 0x3D4 : 0x3B4;
+   crtcdata = crtcindex + 1;
+   OUTB(crtcindex, 0x35);
+   if (INB(crtcdata) != 'C')
+      return (0);
+   OUTB(crtcindex, 0x36);
+   if (INB(crtcdata) != 'X')
+      return (0);
+   return (1);
 }
 
 /* END OF FILE */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/vid_1200.c b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/vid_1200.c
new file mode 100644
index 000000000..f52d02b35
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/vid_1200.c
@@ -0,0 +1,2930 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/vid_1200.c,v 1.2 2003/01/14 09:34:34 alanh Exp $ */
+/*
+ * $Workfile: vid_1200.c $
+ *
+ * This file contains routines to control the SC1200 video overlay hardware.
+ *
+ * NSC_LIC_ALTERNATIVE_PREAMBLE
+ *
+ * Revision 1.0
+ *
+ * National Semiconductor Alternative GPL-BSD License
+ *
+ * National Semiconductor Corporation licenses this software 
+ * ("Software"):
+ *
+ *      Durango
+ *
+ * under one of the two following licenses, depending on how the 
+ * Software is received by the Licensee.
+ * 
+ * If this Software is received as part of the Linux Framebuffer or
+ * other GPL licensed software, then the GPL license designated 
+ * NSC_LIC_GPL applies to this Software; in all other circumstances 
+ * then the BSD-style license designated NSC_LIC_BSD shall apply.
+ *
+ * END_NSC_LIC_ALTERNATIVE_PREAMBLE */
+
+/* NSC_LIC_BSD
+ *
+ * National Semiconductor Corporation Open Source License for Durango
+ *
+ * (BSD License with Export Notice)
+ *
+ * Copyright (c) 1999-2001
+ * National Semiconductor Corporation.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met: 
+ *
+ *   * Redistributions of source code must retain the above copyright 
+ *     notice, this list of conditions and the following disclaimer. 
+ *
+ *   * Redistributions in binary form must reproduce the above 
+ *     copyright notice, this list of conditions and the following 
+ *     disclaimer in the documentation and/or other materials provided 
+ *     with the distribution. 
+ *
+ *   * Neither the name of the National Semiconductor Corporation nor 
+ *     the names of its contributors may be used to endorse or promote 
+ *     products derived from this software without specific prior 
+ *     written permission. 
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+ * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE,
+ * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE.
+ *
+ * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
+ * YOUR JURISDICTION. It is licensee's responsibility to comply with 
+ * any export regulations applicable in licensee's jurisdiction. Under 
+ * CURRENT (2001) U.S. export regulations this software 
+ * is eligible for export from the U.S. and can be downloaded by or 
+ * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
+ * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
+ * Syria, Sudan, Afghanistan and any other country to which the U.S. 
+ * has embargoed goods and services. 
+ *
+ * END_NSC_LIC_BSD */
+
+/* NSC_LIC_GPL
+ *
+ * National Semiconductor Corporation Gnu General Public License for Durango
+ *
+ * (GPL License with Export Notice)
+ *
+ * Copyright (c) 1999-2001
+ * National Semiconductor Corporation.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted under the terms of the GNU General 
+ * Public License as published by the Free Software Foundation; either 
+ * version 2 of the License, or (at your option) any later version  
+ *
+ * In addition to the terms of the GNU General Public License, neither 
+ * the name of the National Semiconductor Corporation nor the names of 
+ * its contributors may be used to endorse or promote products derived 
+ * from this software without specific prior written permission. 
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+ * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, 
+ * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE. See the GNU General Public License for more details. 
+ *
+ * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
+ * YOUR JURISDICTION. It is licensee's responsibility to comply with 
+ * any export regulations applicable in licensee's jurisdiction. Under 
+ * CURRENT (2001) U.S. export regulations this software 
+ * is eligible for export from the U.S. and can be downloaded by or 
+ * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
+ * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
+ * Syria, Sudan, Afghanistan and any other country to which the U.S. 
+ * has embargoed goods and services. 
+ *
+ * You should have received a copy of the GNU General Public License 
+ * along with this file; if not, write to the Free Software Foundation, 
+ * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 
+ *
+ * END_NSC_LIC_GPL */
+
+/*----------------------------------------------------------------------------
+ * SC1200 PLL TABLE
+ *----------------------------------------------------------------------------
+ */
+
+typedef struct tagSC1200PLL
+{
+   long frequency;			/* 16.16 fixed point frequency */
+   unsigned long clock_select;		/* clock select register (0x2C) */
+}
+SC1200PLL;
+
+SC1200PLL gfx_sc1200_clock_table[] = {
+   {(25L << 16) | ((1750L * 65536L) / 10000L), 0x0070E00C},	/* 25.1750 (sc=24.9231) */
+   {(27L << 16) | ((0000L * 65536L) / 10000L), 0x00300100},	/* 27.0000 */
+   {(28L << 16) | ((3220L * 65536L) / 10000L), 0x0070EC0C},	/* 28.3220 (SC=27.000) */
+   {(31L << 16) | ((5000L * 65536L) / 10000L), 0x00500D02},	/* 31.5000 */
+   {(36L << 16) | ((0000L * 65536L) / 10000L), 0x00500F02},	/* 36.0000 */
+   {(37L << 16) | ((5000L * 65536L) / 10000L), 0x0050B108},	/* 37.5000 */
+   {(40L << 16) | ((0000L * 65536L) / 10000L), 0x0050D20D},	/* 40.0000 */
+   {(44L << 16) | ((9000L * 65536L) / 10000L), 0x0050DC0D},	/* 44.9000 */
+   {(49L << 16) | ((5000L * 65536L) / 10000L), 0x00501502},	/* 49.5000 */
+   {(50L << 16) | ((0000L * 65536L) / 10000L), 0x0050A404},	/* 50.0000 */
+   {(50L << 16) | ((3500L * 65536L) / 10000L), 0x0050E00C},	/* 50.3500 */
+   {(54L << 16) | ((0000L * 65536L) / 10000L), 0x00300300},	/* 54.0000 */
+   {(56L << 16) | ((3916L * 65536L) / 10000L), 0x0050F40D},	/* 56.3916 */
+   {(56L << 16) | ((6440L * 65536L) / 10000L), 0x0050EC0C},	/* 56.6440 */
+   {(59L << 16) | ((0000L * 65536L) / 10000L), 0x0030A207},	/* 59.0000 */
+   {(63L << 16) | ((0000L * 65536L) / 10000L), 0x00300D02},	/* 63.0000 */
+   {(65L << 16) | ((0000L * 65536L) / 10000L), 0x0030CC0F},	/* 65.0000 */
+   {(67L << 16) | ((5000L * 65536L) / 10000L), 0x00300400},	/* 67.5000 */
+   {(70L << 16) | ((8000L * 65536L) / 10000L), 0x00301403},	/* 70.8000 */
+   {(72L << 16) | ((0000L * 65536L) / 10000L), 0x00300F02},	/* 72.0000 */
+   {(75L << 16) | ((0000L * 65536L) / 10000L), 0x0030B108},	/* 75.0000 */
+   {(78L << 16) | ((7500L * 65536L) / 10000L), 0x0030A205},	/* 78.7500 */
+   {(80L << 16) | ((0000L * 65536L) / 10000L), 0x0030D20D},	/* 80.0000 */
+   {(87L << 16) | ((2728L * 65536L) / 10000L), 0x0030E00E},	/* 87.2728 */
+   {(89L << 16) | ((8000L * 65536L) / 10000L), 0x0030DC0D},	/* 89.8000 */
+   {(94L << 16) | ((5000L * 65536L) / 10000L), 0x00300600},	/* 99.0000 */
+   {(99L << 16) | ((0000L * 65536L) / 10000L), 0x00301502},	/* 99.0000 */
+   {(100L << 16) | ((0000L * 65536L) / 10000L), 0x0030A404},	/* 100.00 */
+   {(108L << 16) | ((0000L * 65536L) / 10000L), 0x00100300},	/* 108.00 */
+   {(112L << 16) | ((5000L * 65536L) / 10000L), 0x00301802},	/* 108.00 */
+   {(130L << 16) | ((0000L * 65536L) / 10000L), 0x0010CC0F},	/* 130.00 */
+   {(135L << 16) | ((0000L * 65536L) / 10000L), 0x00100400},	/* 135.00 */
+   {(157L << 16) | ((5000L * 65536L) / 10000L), 0x0010A205},	/* 157.50 */
+   {(162L << 16) | ((0000L * 65536L) / 10000L), 0x00100500},	/* 162.00 */
+   {(175L << 16) | ((0000L * 65536L) / 10000L), 0x0010E00E},	/* 175.50 */
+   {(189L << 16) | ((0000L * 65536L) / 10000L), 0x00100600},	/* 189.00 */
+   {(202L << 16) | ((0000L * 65536L) / 10000L), 0x0010EF0E},	/* 202.50 */
+   {(232L << 16) | ((0000L * 65536L) / 10000L), 0x0010AA04},	/* 232.50 */
+
+   /* Precomputed inidces in the hardware */
+   {0x0018EC4D, 0x000F0000},		/*  24.923052 */
+   {0x00192CCC, 0x00000000},		/*  25.1750 */
+   {0x001B0000, 0x00300100},		/*  27.0000 */
+   {0x001F8000, 0x00010000},		/*  31.5000 */
+   {0x00240000, 0x00020000},		/*  36.0000 */
+   {0x00280000, 0x00030000},		/*  40.0000 */
+   {0x00318000, 0x00050000},		/*  49.5000 */
+   {0x00320000, 0x00040000},		/*  50.0000 */
+   {0x00384000, 0x00060000},		/*  56.2500 */
+   {0x00410000, 0x00080000},		/*  65.0000 */
+   {0x004E8000, 0x000A0000},		/*  78.5000 */
+   {0x005E8000, 0x000B0000},		/*  94.5000 */
+   {0x006C0000, 0x000C0000},		/* 108.0000 */
+   {0x00870000, 0x000D0000},		/* 135.0000 */
+};
+
+#define NUM_SC1200_FREQUENCIES sizeof(gfx_sc1200_clock_table)/sizeof(SC1200PLL)
+
+int sc1200_set_video_enable(int enable);
+int sc1200_set_video_format(unsigned long format);
+int sc1200_set_video_size(unsigned short width, unsigned short height);
+int sc1200_set_video_yuv_pitch(unsigned long ypitch, unsigned long uvpitch);
+int sc1200_set_video_offset(unsigned long offset);
+int sc1200_set_video_yuv_offsets(unsigned long yoffset, unsigned long uoffset,
+				 unsigned long voffset);
+int sc1200_set_video_window(short x, short y, unsigned short w,
+			    unsigned short h);
+int sc1200_set_video_left_crop(unsigned short x);
+int sc1200_set_video_upscale(unsigned short srcw, unsigned short srch,
+			     unsigned short dstw, unsigned short dsth);
+int sc1200_set_video_scale(unsigned short srcw, unsigned short srch,
+			   unsigned short dstw, unsigned short dsth);
+int sc1200_set_video_vertical_downscale(unsigned short srch,
+					unsigned short dsth);
+void sc1200_set_video_vertical_downscale_enable(int enable);
+int sc1200_set_video_downscale_config(unsigned short type, unsigned short m);
+int sc1200_set_video_color_key(unsigned long key, unsigned long mask,
+			       int bluescreen);
+int sc1200_set_video_filter(int xfilter, int yfilter);
+int sc1200_set_video_palette(unsigned long *palette);
+int sc1200_set_video_palette_entry(unsigned long index, unsigned long color);
+int sc1200_set_video_downscale_coefficients(unsigned short coef1,
+					    unsigned short coef2,
+					    unsigned short coef3,
+					    unsigned short coef4);
+int sc1200_set_video_downscale_enable(int enable);
+int sc1200_set_video_source(VideoSourceType source);
+int sc1200_set_vbi_source(VbiSourceType source);
+int sc1200_set_vbi_lines(unsigned long even, unsigned long odd);
+int sc1200_set_vbi_total(unsigned long even, unsigned long odd);
+int sc1200_set_video_interlaced(int enable);
+int sc1200_set_color_space_YUV(int enable);
+int sc1200_set_vertical_scaler_offset(char offset);
+int sc1200_set_top_line_in_odd(int enable);
+int sc1200_set_genlock_delay(unsigned long delay);
+int sc1200_set_genlock_enable(int flags);
+int sc1200_set_video_cursor(unsigned long key, unsigned long mask,
+			    unsigned short select_color2,
+			    unsigned long color1, unsigned long color2);
+int sc1200_set_video_cursor_enable(int enable);
+int sc1200_set_video_request(short x, short y);
+
+int sc1200_select_alpha_region(int region);
+int sc1200_set_alpha_enable(int enable);
+int sc1200_set_alpha_window(short x, short y,
+			    unsigned short width, unsigned short height);
+int sc1200_set_alpha_value(unsigned char alpha, char delta);
+int sc1200_set_alpha_priority(int priority);
+int sc1200_set_alpha_color(unsigned long color);
+int sc1200_set_alpha_color_enable(int enable);
+int sc1200_set_no_ck_outside_alpha(int enable);
+int sc1200_disable_softvga(void);
+int sc1200_enable_softvga(void);
+int sc1200_set_macrovision_enable(int enable);
+void sc1200_reset_video(void);
+int sc1200_set_display_control(int sync_polarities);
+void sc1200_set_clock_frequency(unsigned long frequency);
+int sc1200_set_screen_enable(int enable);
+int sc1200_set_crt_enable(int enable);
+
+/* READ ROUTINES IN GFX_VID.C */
+
+int sc1200_get_video_enable(void);
+int sc1200_get_video_format(void);
+unsigned long sc1200_get_video_src_size(void);
+unsigned long sc1200_get_video_line_size(void);
+unsigned long sc1200_get_video_xclip(void);
+unsigned long sc1200_get_video_offset(void);
+void sc1200_get_video_yuv_offsets(unsigned long *yoffset,
+				  unsigned long *uoffset,
+				  unsigned long *voffset);
+void sc1200_get_video_yuv_pitch(unsigned long *ypitch,
+				unsigned long *uvpitch);
+unsigned long sc1200_get_video_upscale(void);
+unsigned long sc1200_get_video_scale(void);
+unsigned long sc1200_get_video_downscale_delta(void);
+int sc1200_get_video_vertical_downscale_enable(void);
+int sc1200_get_video_downscale_config(unsigned short *type,
+				      unsigned short *m);
+void sc1200_get_video_downscale_coefficients(unsigned short *coef1,
+					     unsigned short *coef2,
+					     unsigned short *coef3,
+					     unsigned short *coef4);
+void sc1200_get_video_downscale_enable(int *enable);
+unsigned long sc1200_get_video_dst_size(void);
+unsigned long sc1200_get_video_position(void);
+unsigned long sc1200_get_video_color_key(void);
+unsigned long sc1200_get_video_color_key_mask(void);
+int sc1200_get_video_palette_entry(unsigned long index,
+				   unsigned long *palette);
+int sc1200_get_video_color_key_src(void);
+int sc1200_get_video_filter(void);
+int sc1200_get_video_request(short *x, short *y);
+int sc1200_get_video_source(VideoSourceType * source);
+int sc1200_get_vbi_source(VbiSourceType * source);
+unsigned long sc1200_get_vbi_lines(int odd);
+unsigned long sc1200_get_vbi_total(int odd);
+int sc1200_get_video_interlaced(void);
+int sc1200_get_color_space_YUV(void);
+int sc1200_get_vertical_scaler_offset(char *offset);
+unsigned long sc1200_get_genlock_delay(void);
+int sc1200_get_genlock_enable(void);
+int sc1200_get_video_cursor(unsigned long *key, unsigned long *mask,
+			    unsigned short *select_color2,
+			    unsigned long *color1, unsigned short *color2);
+unsigned long sc1200_read_crc(void);
+unsigned long sc1200_read_crc32(void);
+unsigned long sc1200_read_window_crc(int source, unsigned short x,
+				     unsigned short y, unsigned short width,
+				     unsigned short height, int crc32);
+int sc1200_get_macrovision_enable(void);
+
+void sc1200_get_alpha_enable(int *enable);
+void sc1200_get_alpha_size(unsigned short *x, unsigned short *y,
+			   unsigned short *width, unsigned short *height);
+void sc1200_get_alpha_value(unsigned char *alpha, char *delta);
+void sc1200_get_alpha_priority(int *priority);
+void sc1200_get_alpha_color(unsigned long *color);
+unsigned long sc1200_get_clock_frequency(void);
+int sc1200_get_vsa2_softvga_enable(void);
+int sc1200_get_sync_polarities(void);
+
+/*---------------------------------------------------------------------------
+ * gfx_reset_video (PRIVATE ROUTINE: NOT PART OF DURANGO API)
+ *
+ * This routine is used to disable all components of video overlay before
+ * performing a mode switch.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+void
+sc1200_reset_video(void)
+#else
+void
+gfx_reset_video(void)
+#endif
+{
+   int i;
+
+   gfx_set_video_enable(0);
+
+   /* SET WINDOW 0 AFTER RESET */
+
+   for (i = 2; i >= 0; i--) {
+      gfx_select_alpha_region(i);
+      gfx_set_alpha_enable(0);
+      gfx_set_alpha_color_enable(0);
+   }
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_display_control (PRIVATE ROUTINE: NOT PART OF DURANGO API)
+ *
+ * This routine configures the display output.
+ *
+ * "sync_polarities" is used to set the polarities of the sync pulses according
+ * to the following mask:
+ *
+ *     Bit 0: If set to 1, negative horizontal polarity is programmed,
+ *            otherwise positive horizontal polarity is programmed.
+ *     Bit 1: If set to 1, negative vertical polarity is programmed,
+ *            otherwise positive vertical polarity is programmed.
+ *
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1200_set_display_control(int sync_polarities)
+#else
+int
+gfx_set_display_control(int sync_polarities)
+#endif
+{
+   unsigned long dcfg;
+
+   /* CONFIGURE DISPLAY OUTPUT FROM VIDEO PROCESSOR */
+
+   dcfg = READ_VID32(SC1200_DISPLAY_CONFIG);
+   dcfg &= ~(SC1200_DCFG_CRT_SYNC_SKW_MASK | SC1200_DCFG_PWR_SEQ_DLY_MASK |
+	     SC1200_DCFG_CRT_HSYNC_POL | SC1200_DCFG_CRT_VSYNC_POL |
+	     SC1200_DCFG_FP_PWR_EN | SC1200_DCFG_FP_DATA_EN);
+
+   dcfg |= (SC1200_DCFG_CRT_SYNC_SKW_INIT |
+	    SC1200_DCFG_PWR_SEQ_DLY_INIT | SC1200_DCFG_GV_PAL_BYP);
+
+   if (PanelEnable)
+      dcfg |= SC1200_DCFG_FP_PWR_EN;
+
+   /* SET APPROPRIATE SYNC POLARITIES */
+
+   if (sync_polarities & 0x1)
+      dcfg |= SC1200_DCFG_CRT_HSYNC_POL;
+   if (sync_polarities & 0x2)
+      dcfg |= SC1200_DCFG_CRT_VSYNC_POL;
+
+   WRITE_VID32(SC1200_DISPLAY_CONFIG, dcfg);
+
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_clock_frequency
+ *
+ * This routine sets the clock frequency, specified as a 16.16 fixed point
+ * value (0x00318000 = 49.5 MHz).  It will set the closest frequency found
+ * in the lookup table.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+void
+sc1200_set_clock_frequency(unsigned long frequency)
+#else
+void
+gfx_set_clock_frequency(unsigned long frequency)
+#endif
+{
+   unsigned int index;
+   unsigned long value, pll;
+   long min, diff;
+
+   /* FIND THE REGISTER VALUES FOR THE DESIRED FREQUENCY */
+   /* Search the table for the closest frequency (16.16 format). */
+
+   value = gfx_sc1200_clock_table[0].clock_select;
+   min = (long)gfx_sc1200_clock_table[0].frequency - frequency;
+   if (min < 0L)
+      min = -min;
+   for (index = 1; index < NUM_SC1200_FREQUENCIES; index++) {
+      diff = (long)gfx_sc1200_clock_table[index].frequency - frequency;
+      if (diff < 0L)
+	 diff = -diff;
+      if (diff < min) {
+	 min = diff;
+	 value = gfx_sc1200_clock_table[index].clock_select;
+      }
+   }
+
+   /* SET THE DOT CLOCK REGISTER */
+
+   pll = READ_VID32(SC1200_VID_MISC);
+   WRITE_VID32(SC1200_VID_MISC, pll | SC1200_PLL_POWER_NORMAL);
+   WRITE_VID32(SC1200_VID_CLOCK_SELECT, value);
+   return;
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_screen_enable (PRIVATE ROUTINE - NOT PART OF API)
+ * 
+ * This routine enables or disables the graphics display logic of the video processor.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1200_set_screen_enable(int enable)
+#else
+int
+gfx_set_screen_enable(int enable)
+#endif
+{
+   unsigned long config;
+
+   config = READ_VID32(SC1200_DISPLAY_CONFIG);
+   if (enable)
+      WRITE_VID32(SC1200_DISPLAY_CONFIG, config | SC1200_DCFG_DIS_EN);
+   else
+      WRITE_VID32(SC1200_DISPLAY_CONFIG, config & ~SC1200_DCFG_DIS_EN);
+   return (GFX_STATUS_OK);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_crt_enable
+ * 
+ * This routine enables or disables the CRT output from the video processor.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1200_set_crt_enable(int enable)
+#else
+int
+gfx_set_crt_enable(int enable)
+#endif
+{
+   unsigned long config, misc;
+
+   config = READ_VID32(SC1200_DISPLAY_CONFIG);
+   misc = READ_VID32(SC1200_VID_MISC);
+
+   /*
+    *  IMPORTANT: For all modes do NOT disable the graphics display logic
+    *  because it might be needed for TV
+    */
+
+   switch (enable) {
+   case CRT_DISABLE:			/* HSync:Off VSync:Off */
+      WRITE_VID32(SC1200_DISPLAY_CONFIG, config & ~(SC1200_DCFG_HSYNC_EN
+						    | SC1200_DCFG_VSYNC_EN
+						    | SC1200_DCFG_DAC_BL_EN));
+      WRITE_VID32(SC1200_VID_MISC, misc | SC1200_DAC_POWER_DOWN);
+      break;
+   case CRT_ENABLE:			/* Enable CRT display, including display logic */
+      WRITE_VID32(SC1200_DISPLAY_CONFIG, config | SC1200_DCFG_HSYNC_EN
+		  | SC1200_DCFG_VSYNC_EN | SC1200_DCFG_DAC_BL_EN);
+      WRITE_VID32(SC1200_VID_MISC, misc & ~SC1200_DAC_POWER_DOWN);
+
+      /* ENABLE GRAPHICS DISPLAY LOGIC */
+      gfx_set_screen_enable(1);
+      break;
+   case CRT_STANDBY:			/* HSync:Off VSync:On */
+      WRITE_VID32(SC1200_DISPLAY_CONFIG, (config & ~(SC1200_DCFG_HSYNC_EN
+						     | SC1200_DCFG_DAC_BL_EN))
+		  | SC1200_DCFG_VSYNC_EN);
+      WRITE_VID32(SC1200_VID_MISC, misc | SC1200_DAC_POWER_DOWN);
+      break;
+   case CRT_SUSPEND:			/* HSync:On VSync:Off */
+      WRITE_VID32(SC1200_DISPLAY_CONFIG, (config & ~(SC1200_DCFG_VSYNC_EN
+						     | SC1200_DCFG_DAC_BL_EN))
+		  | SC1200_DCFG_HSYNC_EN);
+      WRITE_VID32(SC1200_VID_MISC, misc | SC1200_DAC_POWER_DOWN);
+      break;
+   default:
+      return GFX_STATUS_BAD_PARAMETER;
+   }
+   return (GFX_STATUS_OK);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_video_enable
+ *
+ * This routine enables or disables the video overlay functionality.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1200_set_video_enable(int enable)
+#else
+int
+gfx_set_video_enable(int enable)
+#endif
+{
+   unsigned long vcfg;
+
+   /* WAIT FOR VERTICAL BLANK TO START */
+   /* Otherwise a glitch can be observed. */
+
+   if (gfx_test_timing_active()) {
+      if (!gfx_test_vertical_active()) {
+	 while (!gfx_test_vertical_active()) ;
+      }
+      while (gfx_test_vertical_active()) ;
+   }
+
+   vcfg = READ_VID32(SC1200_VIDEO_CONFIG);
+   if (enable) {
+      /* ENABLE VIDEO OVERLAY FROM DISPLAY CONTROLLER */
+      /* Use private routine to abstract the display controller. */
+
+      gfx_set_display_video_enable(1);
+
+      /* ENABLE SC1200 VIDEO OVERLAY */
+
+      vcfg |= SC1200_VCFG_VID_EN;
+      WRITE_VID32(SC1200_VIDEO_CONFIG, vcfg);
+   } else {
+      /* DISABLE SC1200 VIDEO OVERLAY */
+
+      vcfg &= ~SC1200_VCFG_VID_EN;
+      WRITE_VID32(SC1200_VIDEO_CONFIG, vcfg);
+
+      /* DISABLE VIDEO OVERLAY FROM DISPLAY CONTROLLER */
+      /* Use private routine to abstract the display controller. */
+
+      gfx_set_display_video_enable(0);
+   }
+   return (0);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_video_format
+ *
+ * Sets input video format type, to one of the YUV formats or to RGB.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1200_set_video_format(unsigned long format)
+#else
+int
+gfx_set_video_format(unsigned long format)
+#endif
+{
+   unsigned long ctrl, vcfg = 0;
+
+   /* SET THE SC1200 VIDEO INPUT FORMAT */
+
+   vcfg = READ_VID32(SC1200_VIDEO_CONFIG);
+   ctrl = READ_VID32(SC1200_VID_ALPHA_CONTROL);
+   ctrl &= ~(SC1200_VIDEO_INPUT_IS_RGB);
+   vcfg &= ~(SC1200_VCFG_VID_INP_FORMAT | SC1200_VCFG_4_2_0_MODE);
+   switch (format) {
+   case VIDEO_FORMAT_UYVY:
+      vcfg |= SC1200_VCFG_UYVY_FORMAT;
+      break;
+   case VIDEO_FORMAT_YUYV:
+      vcfg |= SC1200_VCFG_YUYV_FORMAT;
+      break;
+   case VIDEO_FORMAT_Y2YU:
+      vcfg |= SC1200_VCFG_Y2YU_FORMAT;
+      break;
+   case VIDEO_FORMAT_YVYU:
+      vcfg |= SC1200_VCFG_YVYU_FORMAT;
+      break;
+   case VIDEO_FORMAT_Y0Y1Y2Y3:
+      vcfg |= SC1200_VCFG_UYVY_FORMAT;
+      vcfg |= SC1200_VCFG_4_2_0_MODE;
+      break;
+   case VIDEO_FORMAT_Y3Y2Y1Y0:
+      vcfg |= SC1200_VCFG_Y2YU_FORMAT;
+      vcfg |= SC1200_VCFG_4_2_0_MODE;
+      break;
+   case VIDEO_FORMAT_Y1Y0Y3Y2:
+      vcfg |= SC1200_VCFG_YUYV_FORMAT;
+      vcfg |= SC1200_VCFG_4_2_0_MODE;
+      break;
+   case VIDEO_FORMAT_Y1Y2Y3Y0:
+      vcfg |= SC1200_VCFG_YVYU_FORMAT;
+      vcfg |= SC1200_VCFG_4_2_0_MODE;
+      break;
+   case VIDEO_FORMAT_RGB:
+      ctrl |= SC1200_VIDEO_INPUT_IS_RGB;
+      vcfg |= SC1200_VCFG_UYVY_FORMAT;
+      break;
+   case VIDEO_FORMAT_P2M_P2L_P1M_P1L:
+      ctrl |= SC1200_VIDEO_INPUT_IS_RGB;
+      vcfg |= SC1200_VCFG_Y2YU_FORMAT;
+      break;
+   case VIDEO_FORMAT_P1M_P1L_P2M_P2L:
+      ctrl |= SC1200_VIDEO_INPUT_IS_RGB;
+      vcfg |= SC1200_VCFG_YUYV_FORMAT;
+      break;
+   case VIDEO_FORMAT_P1M_P2L_P2M_P1L:
+      ctrl |= SC1200_VIDEO_INPUT_IS_RGB;
+      vcfg |= SC1200_VCFG_YVYU_FORMAT;
+      break;
+   default:
+      return GFX_STATUS_BAD_PARAMETER;
+   }
+
+   /* ALWAYS DISABLE GRAPHICS CSC */
+   /* This is enabled in the function gfx_set_color_space_YUV for */
+   /* YUV blending on TV.                                         */
+
+   ctrl &= ~SC1200_CSC_GFX_RGB_TO_YUV;
+
+   if (ctrl & SC1200_VIDEO_INPUT_IS_RGB)
+      ctrl &= ~SC1200_CSC_VIDEO_YUV_TO_RGB;
+   else
+      ctrl |= SC1200_CSC_VIDEO_YUV_TO_RGB;
+
+   WRITE_VID32(SC1200_VIDEO_CONFIG, vcfg);
+   WRITE_VID32(SC1200_VID_ALPHA_CONTROL, ctrl);
+
+   return (0);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_video_size
+ *
+ * This routine specifies the size of the source data.  It is used only 
+ * to determine how much data to transfer per frame, and is not used to 
+ * calculate the scaling value (that is handled by a separate routine).
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1200_set_video_size(unsigned short width, unsigned short height)
+#else
+int
+gfx_set_video_size(unsigned short width, unsigned short height)
+#endif
+{
+   unsigned long size, vcfg;
+
+   /* SET THE SC1200 VIDEO LINE SIZE */
+
+   vcfg = READ_VID32(SC1200_VIDEO_CONFIG);
+   vcfg &= ~(SC1200_VCFG_LINE_SIZE_LOWER_MASK | SC1200_VCFG_LINE_SIZE_UPPER);
+   size = (width >> 1);
+   vcfg |= (size & 0x00FF) << 8;
+   if (size & 0x0100)
+      vcfg |= SC1200_VCFG_LINE_SIZE_UPPER;
+   WRITE_VID32(SC1200_VIDEO_CONFIG, vcfg);
+
+   /* SET TOTAL VIDEO BUFFER SIZE IN DISPLAY CONTROLLER */
+   /* Use private routine to abstract the display controller. */
+
+   /* Add 1 line to bypass issue #803 */
+   gfx_set_display_video_size(width, (unsigned short)(height + 2));
+   return (0);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_video_offset
+ *
+ * This routine sets the starting offset for the video buffer when only 
+ * one offset needs to be specified.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1200_set_video_offset(unsigned long offset)
+#else
+int
+gfx_set_video_offset(unsigned long offset)
+#endif
+{
+   /* SAVE VALUE FOR FUTURE CLIPPING OF THE TOP OF THE VIDEO WINDOW */
+
+   gfx_vid_offset = offset;
+
+   /* SET VIDEO BUFFER OFFSET IN DISPLAY CONTROLLER */
+   /* Use private routine to abstract the display controller. */
+
+   gfx_set_display_video_offset(offset);
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_video_upscale
+ * 
+ * This routine sets the scale factor for the video overlay window.  The 
+ * size of the source and destination regions are specified in pixels.  
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1200_set_video_upscale(unsigned short srcw, unsigned short srch,
+			 unsigned short dstw, unsigned short dsth)
+#else
+int
+gfx_set_video_upscale(unsigned short srcw, unsigned short srch,
+		      unsigned short dstw, unsigned short dsth)
+#endif
+{
+   unsigned long xscale, yscale;
+
+   /* SAVE PARAMETERS (unless don't-care zero destination arguments are used) */
+   /* These are needed for clipping the video window later. */
+
+   if (dstw != 0) {
+      gfx_vid_srcw = srcw;
+      gfx_vid_dstw = dstw;
+   }
+   if (dsth != 0) {
+      gfx_vid_srch = srch;
+      gfx_vid_dsth = dsth;
+   }
+
+   /* CALCULATE SC1200 SCALE FACTORS */
+
+   if (dstw == 0)
+      xscale = READ_VID32(SC1200_VIDEO_UPSCALE) & 0xffff;	/* keep previous if don't-care argument */
+   else if (dstw <= srcw)
+      xscale = 0x2000l;			/* horizontal downscaling is currently done in a separate function */
+   else if ((srcw == 1) || (dstw == 1))
+      return GFX_STATUS_BAD_PARAMETER;
+   else
+      xscale = (0x2000l * (srcw - 1l)) / (dstw - 1l);
+
+   if (dsth == 0)
+      yscale = (READ_VID32(SC1200_VIDEO_UPSCALE) & 0xffff0000) >> 16;	/* keep previous if don't-care argument */
+   else if (dsth <= srch)
+      yscale = 0x2000l;			/* No vertical downscaling in SC1200 so force to 1x if attempted */
+   else if ((srch == 1) || (dsth == 1))
+      return GFX_STATUS_BAD_PARAMETER;
+   else
+      yscale = (0x2000l * (srch - 1l)) / (dsth - 1l);
+
+   WRITE_VID32(SC1200_VIDEO_UPSCALE, (yscale << 16) | xscale);
+
+   /* CALL ROUTINE TO UPDATE WINDOW POSITION */
+   /* This is required because the scale values effect the number of */
+   /* source data pixels that need to be clipped, as well as the */
+   /* amount of data that needs to be transferred. */
+
+   gfx_set_video_window(gfx_vid_xpos, gfx_vid_ypos, gfx_vid_width,
+			gfx_vid_height);
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_video_scale
+ * 
+ * This routine sets the scale factor for the video overlay window.  The 
+ * size of the source and destination regions are specified in pixels.  
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1200_set_video_scale(unsigned short srcw, unsigned short srch,
+		       unsigned short dstw, unsigned short dsth)
+#else
+int
+gfx_set_video_scale(unsigned short srcw, unsigned short srch,
+		    unsigned short dstw, unsigned short dsth)
+#endif
+{
+   return gfx_set_video_upscale(srcw, srch, dstw, dsth);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_video_downscale_config
+ * 
+ * This routine sets the downscale type and factor for the video overlay window.
+ * Note: No downscaling support for RGB565 and YUV420 video formats.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1200_set_video_downscale_config(unsigned short type, unsigned short m)
+#else
+int
+gfx_set_video_downscale_config(unsigned short type, unsigned short m)
+#endif
+{
+   unsigned long downscale;
+
+   if ((m < 1) || (m > 16))
+      return GFX_STATUS_BAD_PARAMETER;
+
+   downscale = READ_VID32(SC1200_VIDEO_DOWNSCALER_CONTROL);
+   downscale &=
+	 ~(SC1200_VIDEO_DOWNSCALE_FACTOR_MASK |
+	   SC1200_VIDEO_DOWNSCALE_TYPE_MASK);
+   downscale |= ((m - 1l) << SC1200_VIDEO_DOWNSCALE_FACTOR_POS);
+   switch (type) {
+   case VIDEO_DOWNSCALE_KEEP_1_OF:
+      downscale |= SC1200_VIDEO_DOWNSCALE_TYPE_A;
+      break;
+   case VIDEO_DOWNSCALE_DROP_1_OF:
+      downscale |= SC1200_VIDEO_DOWNSCALE_TYPE_B;
+      break;
+   default:
+      return GFX_STATUS_BAD_PARAMETER;
+   }
+   WRITE_VID32(SC1200_VIDEO_DOWNSCALER_CONTROL, downscale);
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_video_downscale_coefficients
+ * 
+ * This routine sets the downscale filter coefficients.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1200_set_video_downscale_coefficients(unsigned short coef1,
+					unsigned short coef2,
+					unsigned short coef3,
+					unsigned short coef4)
+#else
+int
+gfx_set_video_downscale_coefficients(unsigned short coef1,
+				     unsigned short coef2,
+				     unsigned short coef3,
+				     unsigned short coef4)
+#endif
+{
+   if ((coef1 + coef2 + coef3 + coef4) != 16)
+      return GFX_STATUS_BAD_PARAMETER;
+
+   WRITE_VID32(SC1200_VIDEO_DOWNSCALER_COEFFICIENTS,
+	       ((unsigned long)coef1 << SC1200_VIDEO_DOWNSCALER_COEF1_POS) |
+	       ((unsigned long)coef2 << SC1200_VIDEO_DOWNSCALER_COEF2_POS) |
+	       ((unsigned long)coef3 << SC1200_VIDEO_DOWNSCALER_COEF3_POS) |
+	       ((unsigned long)coef4 << SC1200_VIDEO_DOWNSCALER_COEF4_POS));
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_video_downscale_enable
+ * 
+ * This routine enables or disables downscaling for the video overlay window.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1200_set_video_downscale_enable(int enable)
+#else
+int
+gfx_set_video_downscale_enable(int enable)
+#endif
+{
+   unsigned long downscale;
+
+   downscale = READ_VID32(SC1200_VIDEO_DOWNSCALER_CONTROL);
+   downscale &= ~SC1200_VIDEO_DOWNSCALE_ENABLE;
+   if (enable)
+      downscale |= SC1200_VIDEO_DOWNSCALE_ENABLE;
+   WRITE_VID32(SC1200_VIDEO_DOWNSCALER_CONTROL, downscale);
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_video_window
+ * 
+ * This routine sets the position and size of the video overlay window.  The 
+ * y position is specified in screen relative coordinates, and may be negative.  
+ * The size of destination region is specified in pixels.  The line size
+ * indicates the number of bytes of source data per scanline.
+ * For the effect of negative x values, call the function
+ * gfx_set_video_left_crop(). 
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1200_set_video_window(short x, short y, unsigned short w, unsigned short h)
+#else
+int
+gfx_set_video_window(short x, short y, unsigned short w, unsigned short h)
+#endif
+{
+   unsigned long control;
+   unsigned long hadjust, vadjust;
+   unsigned long xstart, ystart, xend, yend;
+
+   /* For left cropping call the function gfx_set_video_left_crop() */
+
+   if (x < 0)
+      return GFX_STATUS_BAD_PARAMETER;
+
+   /* SAVE PARAMETERS */
+   /* These are needed to call this routine if the scale value changes. */
+   /* In the case of SC1200 they are also needed for restoring when video is re-enabled */
+
+   gfx_vid_xpos = x;
+   gfx_vid_ypos = y;
+   gfx_vid_width = w;
+   gfx_vid_height = h;
+
+   /* GET ADJUSTMENT VALUES */
+   /* Use routines to abstract version of display controller. */
+
+   hadjust = gfx_get_htotal() - gfx_get_hsync_end() - 14l;
+   vadjust = gfx_get_vtotal() - gfx_get_vsync_end() + 1l;
+
+   /* HORIZONTAL START */
+
+   xstart = (unsigned long)x + hadjust;
+
+   /* HORIZONTAL END */
+   /* End positions in register are non-inclusive (one more than the actual end) */
+
+   if ((x + w) < gfx_get_hactive())
+      xend = (unsigned long)x + (unsigned long)w + hadjust;
+   else					/* right clipping needed */
+      xend = (unsigned long)gfx_get_hactive() + hadjust;
+
+   /* VERTICAL START */
+
+   ystart = (unsigned long)y + vadjust;
+
+   /* VERTICAL END */
+
+   if ((y + h) < gfx_get_vactive())
+      yend = (unsigned long)y + (unsigned long)h + vadjust;
+   else					/* bottom clipping needed */
+      yend = (unsigned long)gfx_get_vactive() + vadjust;
+
+   /* SET VIDEO LINE INVERT BIT */
+
+   control = READ_VID32(SC1200_VID_ALPHA_CONTROL);
+   if (y & 0x1)
+      WRITE_VID32(SC1200_VID_ALPHA_CONTROL,
+		  control | SC1200_VIDEO_LINE_OFFSET_ODD);
+   else
+      WRITE_VID32(SC1200_VID_ALPHA_CONTROL,
+		  control & ~SC1200_VIDEO_LINE_OFFSET_ODD);
+
+   /* SET VIDEO POSITION */
+
+   WRITE_VID32(SC1200_VIDEO_X_POS, (xend << 16) | xstart);
+   WRITE_VID32(SC1200_VIDEO_Y_POS, (yend << 16) | ystart);
+
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_video_left_crop
+ * 
+ * This routine sets the number of pixels which will be cropped from the
+ * beginning of each video line. The video window will begin to display only
+ * from the pixel following the cropped pixels, and the cropped pixels
+ * will be ignored.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1200_set_video_left_crop(unsigned short x)
+#else
+int
+gfx_set_video_left_crop(unsigned short x)
+#endif
+{
+   unsigned long vcfg, initread;
+
+   /* CLIPPING ON LEFT */
+   /* Adjust initial read for scale, checking for divide by zero */
+
+   if (gfx_vid_dstw)
+      initread = (unsigned long)x *gfx_vid_srcw / gfx_vid_dstw;
+
+   else
+      initread = 0l;
+
+   /* SET INITIAL READ ADDRESS */
+
+   vcfg = READ_VID32(SC1200_VIDEO_CONFIG);
+   vcfg &= ~SC1200_VCFG_INIT_READ_MASK;
+   vcfg |= (initread << 15) & SC1200_VCFG_INIT_READ_MASK;
+   WRITE_VID32(SC1200_VIDEO_CONFIG, vcfg);
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_video_color_key
+ * 
+ * This routine specifies the color key value and mask for the video overlay
+ * hardware. To disable color key, the color and mask should both be set to 
+ * zero. The hardware uses the color key in the following equation:
+ *
+ * ((source data) & (color key mask)) == ((color key) & (color key mask))
+ *
+ * If "graphics" is set to TRUE, the source data is graphics, and color key
+ * is an RGB value. If "graphics" is set to FALSE, the source data is the video,
+ * and color key is a YUV value.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1200_set_video_color_key(unsigned long key, unsigned long mask,
+			   int graphics)
+#else
+int
+gfx_set_video_color_key(unsigned long key, unsigned long mask, int graphics)
+#endif
+{
+   unsigned long dcfg = 0;
+
+   /* SET SC1200 COLOR KEY VALUE */
+
+   WRITE_VID32(SC1200_VIDEO_COLOR_KEY, key);
+   WRITE_VID32(SC1200_VIDEO_COLOR_MASK, mask);
+
+   /* SELECT GRAPHICS OR VIDEO DATA TO COMPARE TO THE COLOR KEY */
+
+   dcfg = READ_VID32(SC1200_DISPLAY_CONFIG);
+   if (graphics & 0x01)
+      dcfg &= ~SC1200_DCFG_VG_CK;
+   else
+      dcfg |= SC1200_DCFG_VG_CK;
+   WRITE_VID32(SC1200_DISPLAY_CONFIG, dcfg);
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_video_filter
+ * 
+ * This routine enables or disables the video overlay filters.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1200_set_video_filter(int xfilter, int yfilter)
+#else
+int
+gfx_set_video_filter(int xfilter, int yfilter)
+#endif
+{
+   unsigned long vcfg = 0;
+
+   /* ENABLE OR DISABLE SC1200 VIDEO OVERLAY FILTERS */
+
+   vcfg = READ_VID32(SC1200_VIDEO_CONFIG);
+   vcfg &= ~(SC1200_VCFG_X_FILTER_EN | SC1200_VCFG_Y_FILTER_EN);
+   if (xfilter)
+      vcfg |= SC1200_VCFG_X_FILTER_EN;
+   if (yfilter)
+      vcfg |= SC1200_VCFG_Y_FILTER_EN;
+   WRITE_VID32(SC1200_VIDEO_CONFIG, vcfg);
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_video_palette
+ * 
+ * This routine loads the video hardware palette.  If a NULL pointer is 
+ * specified, the palette is bypassed (for SC1200, this means loading the 
+ * palette with identity values). 
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1200_set_video_palette(unsigned long *palette)
+#else
+int
+gfx_set_video_palette(unsigned long *palette)
+#endif
+{
+   unsigned long i, entry;
+
+   /* WAIT FOR VERTICAL BLANK TO END */
+   /* Otherwise palette will not be written properly. */
+
+   if (gfx_test_timing_active()) {
+      if (gfx_test_vertical_active()) {
+	 while (gfx_test_vertical_active()) ;
+      }
+      while (!gfx_test_vertical_active()) ;
+   }
+
+   /* LOAD SC1200 VIDEO PALETTE */
+
+   WRITE_VID32(SC1200_PALETTE_ADDRESS, 0);
+   for (i = 0; i < 256; i++) {
+      if (palette)
+	 entry = palette[i];
+      else
+	 entry = (i << 8) | (i << 16) | (i << 24);
+      WRITE_VID32(SC1200_PALETTE_DATA, entry);
+   }
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_video_palette_entry
+ * 
+ * This routine loads a single entry of the video hardware palette.  
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1200_set_video_palette_entry(unsigned long index, unsigned long palette)
+#else
+int
+gfx_set_video_palette_entry(unsigned long index, unsigned long palette)
+#endif
+{
+   if (index > 0xFF)
+      return GFX_STATUS_BAD_PARAMETER;
+
+   /* WAIT FOR VERTICAL BLANK TO END */
+   /* Otherwise palette will not be written properly. */
+
+   if (gfx_test_timing_active()) {
+      if (gfx_test_vertical_active()) {
+	 while (gfx_test_vertical_active()) ;
+      }
+      while (!gfx_test_vertical_active()) ;
+   }
+
+   /* SET A SINGLE ENTRY */
+
+   WRITE_VID32(SC1200_PALETTE_ADDRESS, index);
+   WRITE_VID32(SC1200_PALETTE_DATA, palette);
+
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_video_request()
+ * 
+ * This routine sets the horizontal (pixel) and vertical (line) video request
+ * values.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1200_set_video_request(short x, short y)
+#else
+int
+gfx_set_video_request(short x, short y)
+#endif
+{
+   /* SET SC1200 VIDEO REQUEST */
+
+   x += gfx_get_htotal() - gfx_get_hsync_end() - 2;
+   y += gfx_get_vtotal() - gfx_get_vsync_end() + 1;
+
+   if ((x < 0) || (x > SC1200_VIDEO_REQUEST_MASK) ||
+       (y < 0) || (y > SC1200_VIDEO_REQUEST_MASK))
+      return GFX_STATUS_BAD_PARAMETER;
+
+   WRITE_VID32(SC1200_VIDEO_REQUEST,
+	       ((unsigned long)x << SC1200_VIDEO_X_REQUEST_POS) |
+	       ((unsigned long)y << SC1200_VIDEO_Y_REQUEST_POS));
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_video_source()
+ * 
+ * This routine sets the video source to either memory or Direct VIP.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1200_set_video_source(VideoSourceType source)
+#else
+int
+gfx_set_video_source(VideoSourceType source)
+#endif
+{
+   unsigned long display_mode;
+
+   display_mode = READ_VID32(SC1200_VIDEO_DISPLAY_MODE);
+
+   /* SET SC1200 VIDEO SOURCE */
+   switch (source) {
+   case VIDEO_SOURCE_MEMORY:
+      WRITE_VID32(SC1200_VIDEO_DISPLAY_MODE,
+		  (display_mode & ~SC1200_VIDEO_SOURCE_MASK) |
+		  SC1200_VIDEO_SOURCE_GX1);
+      break;
+   case VIDEO_SOURCE_DVIP:
+      WRITE_VID32(SC1200_VIDEO_DISPLAY_MODE,
+		  (display_mode & ~SC1200_VIDEO_SOURCE_MASK) |
+		  SC1200_VIDEO_SOURCE_DVIP);
+      break;
+   default:
+      return GFX_STATUS_BAD_PARAMETER;
+   }
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_vbi_source()
+ * 
+ * This routine sets the vbi source to either memory or Direct VIP.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1200_set_vbi_source(VbiSourceType source)
+#else
+int
+gfx_set_vbi_source(VbiSourceType source)
+#endif
+{
+   unsigned long display_mode;
+
+   display_mode = READ_VID32(SC1200_VIDEO_DISPLAY_MODE);
+
+   /* SET SC1200 VBI SOURCE */
+   switch (source) {
+   case VBI_SOURCE_MEMORY:
+      WRITE_VID32(SC1200_VIDEO_DISPLAY_MODE,
+		  (display_mode & ~SC1200_VBI_SOURCE_MASK) |
+		  SC1200_VBI_SOURCE_GX1);
+      break;
+   case VBI_SOURCE_DVIP:
+      WRITE_VID32(SC1200_VIDEO_DISPLAY_MODE,
+		  (display_mode & ~SC1200_VBI_SOURCE_MASK) |
+		  SC1200_VBI_SOURCE_DVIP);
+      break;
+   default:
+      return GFX_STATUS_BAD_PARAMETER;
+   }
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_vbi_lines()
+ * 
+ * This routine sets the VBI lines to pass to the TV encoder.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1200_set_vbi_lines(unsigned long even, unsigned long odd)
+#else
+int
+gfx_set_vbi_lines(unsigned long even, unsigned long odd)
+#endif
+{
+   /* SET SC1200 VBI LINES */
+   WRITE_VID32(SC1200_VIDEO_EVEN_VBI_LINE_ENABLE,
+	       even & SC1200_VIDEO_VBI_LINE_ENABLE_MASK);
+   WRITE_VID32(SC1200_VIDEO_ODD_VBI_LINE_ENABLE,
+	       odd & SC1200_VIDEO_VBI_LINE_ENABLE_MASK);
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_vbi_total()
+ * 
+ * This routine sets the total number of VBI bytes for each field.
+ * The total is needed when both VBI and active video are received from memory.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1200_set_vbi_total(unsigned long even, unsigned long odd)
+#else
+int
+gfx_set_vbi_total(unsigned long even, unsigned long odd)
+#endif
+{
+   /* SET SC1200 VBI TOTAL */
+   WRITE_VID32(SC1200_VIDEO_EVEN_VBI_TOTAL_COUNT,
+	       even & SC1200_VIDEO_VBI_TOTAL_COUNT_MASK);
+   WRITE_VID32(SC1200_VIDEO_ODD_VBI_TOTAL_COUNT,
+	       odd & SC1200_VIDEO_VBI_TOTAL_COUNT_MASK);
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_video_interlaced()
+ * 
+ * This routine configures the video processor video overlay mode to be
+ * interlaced YUV.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1200_set_video_interlaced(int enable)
+#else
+int
+gfx_set_video_interlaced(int enable)
+#endif
+{
+   unsigned long control;
+
+   control = READ_VID32(SC1200_VID_ALPHA_CONTROL);
+   /* SET INTERLACED VIDEO */
+   if (enable)
+      WRITE_VID32(SC1200_VID_ALPHA_CONTROL,
+		  control | SC1200_VIDEO_IS_INTERLACED);
+   else
+      WRITE_VID32(SC1200_VID_ALPHA_CONTROL,
+		  control & ~SC1200_VIDEO_IS_INTERLACED);
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_color_space_YUV()
+ * 
+ * This routine configures the video processor to process graphics and video
+ * in either YUV or RGB color space. The mode should be set to tune image
+ * quality.
+ * Setting "enable" to TRUE improves image quality on TV,
+ * but in this mode colors on CRT will not be correct.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1200_set_color_space_YUV(int enable)
+#else
+int
+gfx_set_color_space_YUV(int enable)
+#endif
+{
+   unsigned long control;
+
+   control = READ_VID32(SC1200_VID_ALPHA_CONTROL);
+
+   /* SET SC1200 VIDEO COLOR SPACE TO YUV OR RGB */
+
+   if (enable) {
+      /* ENABLE YUV BLENDING */
+      /* YUV blending cannot be enabled in RGB video formats */
+
+      control |= SC1200_CSC_GFX_RGB_TO_YUV;	/* Convert graphics to YUV */
+      control &= ~SC1200_CSC_VIDEO_YUV_TO_RGB;	/* Leave video in YUV      */
+
+      if (control & SC1200_VIDEO_INPUT_IS_RGB)
+	 return (GFX_STATUS_UNSUPPORTED);	/* Can't convert video from RGB to YUV */
+   } else {
+      /* RGB BLENDING */
+
+      control &= ~SC1200_CSC_GFX_RGB_TO_YUV;	/* Leave graphics in RGB */
+      if (control & SC1200_VIDEO_INPUT_IS_RGB)
+	 control &= ~SC1200_CSC_VIDEO_YUV_TO_RGB;	/* Leave video in RGB */
+      else
+	 control |= SC1200_CSC_VIDEO_YUV_TO_RGB;	/* Convert video to RGB */
+   }
+   WRITE_VID32(SC1200_VID_ALPHA_CONTROL, control);
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_vertical_scaler_offset()
+ * 
+ * This routine sets the value by which the odd frame is shifted with respect
+ * to the even frame. This is useful for de-interlacing in Bob method, by
+ * setting the shift value to be one line.
+ * If offset is 0, no shifting occurs.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1200_set_vertical_scaler_offset(char offset)
+#else
+int
+gfx_set_vertical_scaler_offset(char offset)
+#endif
+{
+   unsigned long control;
+
+   control = READ_VID32(SC1200_VID_ALPHA_CONTROL);
+   if (offset == 1) {
+      control &= ~SC1200_VERTICAL_SCALER_SHIFT_MASK;	/* Clear shifting value */
+      control |= SC1200_VERTICAL_SCALER_SHIFT_INIT;	/* Set shifting value */
+      control |= SC1200_VERTICAL_SCALER_SHIFT_EN;	/* Enable odd frame shifting */
+   } else if (offset == 0) {
+      control &= ~SC1200_VERTICAL_SCALER_SHIFT_EN;	/* No shifting occurs */
+      control &= ~SC1200_VERTICAL_SCALER_SHIFT_MASK;	/* Clear shifting value */
+   } else
+      return (GFX_STATUS_BAD_PARAMETER);	/* TODO: how to program other values ? */
+   WRITE_VID32(SC1200_VID_ALPHA_CONTROL, control);
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_top_line_in_odd()
+ * 
+ * This routine sets the field in which the top line of input video resides.
+ * If enable is "0", this is the even field (default). [not to be confused
+ * with the odd field being the top field on TV].
+ * If enable is "1", this is the odd field.
+ * Use enable "1" for input devices whose field indication is reversed from
+ * normal, i.e. an indication of "odd" field is given for even field data,
+ * and vice versa.
+ * This setting affects the video processor only when it is in either interlaced
+ * or Bob (scaler offset active) modes.
+  *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1200_set_top_line_in_odd(int enable)
+#else
+int
+gfx_set_top_line_in_odd(int enable)
+#endif
+{
+   unsigned long control;
+
+   control = READ_VID32(SC1200_VID_ALPHA_CONTROL);
+   if (enable)
+      control |= SC1200_TOP_LINE_IN_ODD;	/* Set shifting value */
+   else
+      control &= ~SC1200_TOP_LINE_IN_ODD;	/* No shifting occurs */
+   WRITE_VID32(SC1200_VID_ALPHA_CONTROL, control);
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_genlock_delay()
+ * 
+ * This routine sets the delay between VIP VSYNC and display controller VSYNC.
+ * The delay is in 27 MHz clocks.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1200_set_genlock_delay(unsigned long delay)
+#else
+int
+gfx_set_genlock_delay(unsigned long delay)
+#endif
+{
+   /* SET SC1200 GENLOCK DELAY */
+   WRITE_VID32(SC1200_GENLOCK_DELAY, delay & SC1200_GENLOCK_DELAY_MASK);
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_genlock_enable()
+ * 
+ * This routine sets and configures the genlock according to the flags parameter.
+ * Flags value of 0 disables genlock and resets its configuration.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1200_set_genlock_enable(int flags)
+#else
+int
+gfx_set_genlock_enable(int flags)
+#endif
+{
+   unsigned long genlock = 0;
+
+   if (flags) {
+      /* SET SC1200 GENLOCK CONFIGURATION */
+      if (flags & GENLOCK_SINGLE)
+	 genlock |= SC1200_GENLOCK_SINGLE_ENABLE;
+      if (flags & GENLOCK_FIELD_SYNC)
+	 genlock |= SC1200_GENLOCK_FIELD_SYNC_ENABLE;
+      if (flags & GENLOCK_CONTINUOUS)
+	 genlock |= SC1200_GENLOCK_CONTINUOUS_ENABLE;
+      if (flags & GENLOCK_SYNCED_EDGE_FALLING)
+	 genlock |= SC1200_GENLOCK_GX_VSYNC_FALLING_EDGE;
+      if (flags & GENLOCK_SYNCING_EDGE_FALLING)
+	 genlock |= SC1200_GENLOCK_VIP_VSYNC_FALLING_EDGE;
+      if (flags & GENLOCK_TIMEOUT)
+	 genlock |= SC1200_GENLOCK_TIMEOUT_ENABLE;
+      if (flags & GENLOCK_TVENC_RESET_EVEN_FIELD)
+	 genlock |= SC1200_GENLOCK_TVENC_RESET_EVEN_FIELD;
+      if (flags & GENLOCK_TVENC_RESET_BEFORE_DELAY)
+	 genlock |= SC1200_GENLOCK_TVENC_RESET_BEFORE_DELAY;
+      if (flags & GENLOCK_TVENC_RESET)
+	 genlock |= SC1200_GENLOCK_TVENC_RESET_ENABLE;
+      if (flags & GENLOCK_SYNC_TO_TVENC)
+	 genlock |= SC1200_GENLOCK_SYNC_TO_TVENC;
+   }
+   WRITE_VID32(SC1200_GENLOCK, genlock);
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_video_cursor()
+ * 
+ * This routine configures the video hardware cursor.
+ * If the "mask"ed bits in the graphics pixel match "key", then either "color1"
+ * or "color2" will be used for this pixel, according to the value of bit
+ * number "select_color2" of the graphics pixel.
+ *
+ * key - 24 bit RGB value
+ * mask - 24 bit mask
+ * color1, color2 - RGB or YUV, depending on the current color space conversion
+ * select_color2 - value between 0 to 23
+ *
+ * To disable match, a "mask" and "key" value of 0xffffff should be set,
+ * because the graphics pixels incoming to the video processor have maximum 16
+ * bits set (0xF8FCF8).
+ *
+ * This feature is useful for disabling alpha blending of the cursor.
+ * Otherwise cursor image would be blurred (or completely invisible if video
+ * alpha is maximum value).
+ * Note: the cursor pixel replacements take place both inside and outside the
+ * video overlay window.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1200_set_video_cursor(unsigned long key, unsigned long mask,
+			unsigned short select_color2, unsigned long color1,
+			unsigned long color2)
+#else
+int
+gfx_set_video_cursor(unsigned long key, unsigned long mask,
+		     unsigned short select_color2, unsigned long color1,
+		     unsigned long color2)
+#endif
+{
+   if (select_color2 > SC1200_CURSOR_COLOR_BITS)
+      return GFX_STATUS_BAD_PARAMETER;
+   key = (key & SC1200_COLOR_MASK) | ((unsigned long)select_color2 <<
+				      SC1200_CURSOR_COLOR_KEY_OFFSET_POS);
+   WRITE_VID32(SC1200_CURSOR_COLOR_KEY, key);
+   WRITE_VID32(SC1200_CURSOR_COLOR_MASK, mask);
+   WRITE_VID32(SC1200_CURSOR_COLOR_1, color1);
+   WRITE_VID32(SC1200_CURSOR_COLOR_2, color2);
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_alpha_enable
+ * 
+ * This routine enables or disables the currently selected alpha region.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1200_set_alpha_enable(int enable)
+#else
+int
+gfx_set_alpha_enable(int enable)
+#endif
+{
+   unsigned long address = 0, value = 0;
+
+   if (gfx_alpha_select > 2)
+      return (GFX_STATUS_UNSUPPORTED);
+   address = SC1200_ALPHA_CONTROL_1 + ((unsigned long)gfx_alpha_select << 4);
+   value = READ_VID32(address);
+   if (enable)
+      value |= (SC1200_ACTRL_WIN_ENABLE | SC1200_ACTRL_LOAD_ALPHA);
+   else
+      value &= ~(SC1200_ACTRL_WIN_ENABLE);
+   WRITE_VID32(address, value);
+   return (GFX_STATUS_OK);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_alpha_window
+ * 
+ * This routine sets the size of the currently selected alpha region.
+ * Note: "x" and "y" are signed to enable using negative values needed for
+ * implementing workarounds of hardware issues.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1200_set_alpha_window(short x, short y,
+			unsigned short width, unsigned short height)
+#else
+int
+gfx_set_alpha_window(short x, short y,
+		     unsigned short width, unsigned short height)
+#endif
+{
+   unsigned long address = 0;
+
+   /* CHECK FOR CLIPPING */
+
+   if ((x + width) > gfx_get_hactive())
+      width = gfx_get_hactive() - x;
+   if ((y + height) > gfx_get_vactive())
+      height = gfx_get_vactive() - y;
+
+   /* ADJUST POSITIONS */
+
+   x += gfx_get_htotal() - gfx_get_hsync_end() - 2;
+   y += gfx_get_vtotal() - gfx_get_vsync_end() + 1;
+
+   if (gfx_alpha_select > 2)
+      return (GFX_STATUS_UNSUPPORTED);
+   address = SC1200_ALPHA_XPOS_1 + ((unsigned long)gfx_alpha_select << 4);
+
+   /* End positions in register are non-inclusive (one more than the actual end) */
+
+   WRITE_VID32(address, (unsigned long)x |
+	       ((unsigned long)(x + width) << 16));
+   WRITE_VID32(address + 4l, (unsigned long)y |
+	       ((unsigned long)(y + height) << 16));
+   return (GFX_STATUS_OK);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_alpha_value
+ * 
+ * This routine sets the alpha value for the currently selected alpha
+ * region.  It also specifies an increment/decrement value for fading.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1200_set_alpha_value(unsigned char alpha, char delta)
+#else
+int
+gfx_set_alpha_value(unsigned char alpha, char delta)
+#endif
+{
+   unsigned long address = 0, value = 0;
+   unsigned char new_value = 0;
+   int loop = 1;
+
+   if (gfx_alpha_select > 2)
+      return (GFX_STATUS_UNSUPPORTED);
+   address = SC1200_ALPHA_CONTROL_1 + ((unsigned long)gfx_alpha_select << 4);
+   value = READ_VID32(address);
+   value &= SC1200_ACTRL_WIN_ENABLE;	/* keep only enable bit */
+   value |= (unsigned long)alpha;
+   value |= (((unsigned long)delta) & 0xff) << 8;
+   value |= SC1200_ACTRL_LOAD_ALPHA;
+   WRITE_VID32(address, value);
+
+   /* WORKAROUND FOR ISSUE #1187 */
+   /* Need to verify that the alpha operation succeeded */
+
+   while (1) {
+      /* WAIT FOR VERTICAL BLANK TO END */
+      if (gfx_test_timing_active()) {
+	 if (gfx_test_vertical_active())
+	    while (gfx_test_vertical_active()) ;
+	 while (!gfx_test_vertical_active()) ;
+      }
+      new_value =
+	    (unsigned
+	     char)((READ_VID32(SC1200_ALPHA_WATCH) >> (gfx_alpha_select << 3))
+		   & 0xff);
+      if (new_value == alpha)
+	 return GFX_STATUS_OK;
+      if (++loop > 10)
+	 return GFX_STATUS_ERROR;
+      WRITE_VID32(address, value);
+   }
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_alpha_priority
+ * 
+ * This routine sets the priority of the currently selected alpha region.
+ * A higher value indicates a higher priority.
+ * Note: Priority of enabled alpha windows must be different.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1200_set_alpha_priority(int priority)
+#else
+int
+gfx_set_alpha_priority(int priority)
+#endif
+{
+   unsigned long pos = 0, value = 0;
+
+   if (priority > 3)
+      return (GFX_STATUS_BAD_PARAMETER);
+   if (gfx_alpha_select > 2)
+      return (GFX_STATUS_UNSUPPORTED);
+   value = READ_VID32(SC1200_VID_ALPHA_CONTROL);
+   pos = 16 + (gfx_alpha_select << 1);
+   value &= ~(0x03l << pos);
+   value |= (unsigned long)priority << pos;
+   WRITE_VID32(SC1200_VID_ALPHA_CONTROL, value);
+   return (GFX_STATUS_OK);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_alpha_color
+ * 
+ * This routine sets the color to be displayed inside the currently selected
+ * alpha window when there is a color key match (when the alpha color
+ * mechanism is enabled).
+ * "color" is a 24 bit RGB value (for RGB blending) or YUV value (for YUV blending).
+ * In Interlaced YUV blending mode, Y/2 value should be used.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1200_set_alpha_color(unsigned long color)
+#else
+int
+gfx_set_alpha_color(unsigned long color)
+#endif
+{
+   unsigned long address = 0;
+
+   if (gfx_alpha_select > 2)
+      return (GFX_STATUS_UNSUPPORTED);
+   address = SC1200_ALPHA_COLOR_1 + ((unsigned long)gfx_alpha_select << 4);
+
+   /* ONLY 24 VALID BITS */
+   color &= 0xffffffl;
+
+   /* KEEP UPPER BYTE UNCHANGED */
+   WRITE_VID32(address, (color | (READ_VID32(address) & ~0xffffffl)));
+   return (GFX_STATUS_OK);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_alpha_color_enable
+ * 
+ * Enable or disable the color mechanism in the alpha window.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1200_set_alpha_color_enable(int enable)
+#else
+int
+gfx_set_alpha_color_enable(int enable)
+#endif
+{
+   unsigned long color;
+   unsigned long address = 0;
+
+   if (gfx_alpha_select > 2)
+      return (GFX_STATUS_UNSUPPORTED);
+   address = SC1200_ALPHA_COLOR_1 + ((unsigned long)gfx_alpha_select << 4);
+   color = READ_VID32(address);
+   if (enable)
+      color |= SC1200_ALPHA_COLOR_ENABLE;
+   else
+      color &= ~SC1200_ALPHA_COLOR_ENABLE;
+   WRITE_VID32(address, color);
+   return (GFX_STATUS_OK);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_no_ck_outside_alpha
+ * 
+ * This function affects where inside the video window color key or chroma
+ * key comparison is done:
+ * If enable is TRUE, color/chroma key comparison is performed only inside
+ * the enabled alpha windows. Outside the (enabled) alpha windows, only video
+ * is displayed if color key is used, and only graphics is displayed if chroma
+ * key is used.
+ * If enable is FALSE, color/chroma key comparison is performed in all the
+ * video window area.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1200_set_no_ck_outside_alpha(int enable)
+#else
+int
+gfx_set_no_ck_outside_alpha(int enable)
+#endif
+{
+   unsigned long value;
+
+   value = READ_VID32(SC1200_VID_ALPHA_CONTROL);
+   if (enable)
+      WRITE_VID32(SC1200_VID_ALPHA_CONTROL,
+		  value | SC1200_NO_CK_OUTSIDE_ALPHA);
+   else
+      WRITE_VID32(SC1200_VID_ALPHA_CONTROL,
+		  value & ~SC1200_NO_CK_OUTSIDE_ALPHA);
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_macrovision_enable
+ * 
+ * This routine enables or disables macrovision on the tv encoder output.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1200_set_macrovision_enable(int enable)
+#else
+int
+gfx_set_macrovision_enable(int enable)
+#endif
+{
+   if (enable)
+      WRITE_VID32(SC1200_TVENC_MV_CONTROL, SC1200_TVENC_MV_ENABLE);
+   else
+      WRITE_VID32(SC1200_TVENC_MV_CONTROL, 0);
+   return (GFX_STATUS_OK);
+}
+
+#define SC1200_VIDEO_PCI_44 0x80009444
+
+/*---------------------------------------------------------------------------
+ * gfx_disable_softvga
+ *
+ * Disables SoftVga. This function is only valid with VSA2, Returns 1 if
+ * SoftVga can be disabled; 0 if not.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1200_disable_softvga(void)
+#else
+int
+gfx_disable_softvga(void)
+#endif
+{
+   unsigned long reg_val;
+
+   /* get the current value */
+   reg_val = gfx_pci_config_read(SC1200_VIDEO_PCI_44);
+   /* setting video PCI register 44 bit 0 to 1 disables SoftVga */
+   reg_val |= 0x1;
+   gfx_pci_config_write(SC1200_VIDEO_PCI_44, reg_val);
+
+   /* see if we set the bit and return the appropriate value */
+   reg_val = gfx_pci_config_read(SC1200_VIDEO_PCI_44);
+   if ((reg_val & 0x1) == 0x1)
+      return (1);
+   else
+      return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_enable_softvga
+ *
+ * Enables SoftVga. This function is only valid with VSA2, Returns 1 if
+ * SoftVga can be enbled; 0 if not.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1200_enable_softvga(void)
+#else
+int
+gfx_enable_softvga(void)
+#endif
+{
+   unsigned long reg_val;
+
+   /* get the current value */
+   reg_val = gfx_pci_config_read(SC1200_VIDEO_PCI_44);
+   /* clearing video PCI register 44 bit 0 enables SoftVga */
+   gfx_pci_config_write(SC1200_VIDEO_PCI_44, reg_val & 0xfffffffel);
+
+   /* see if we cleared the bit and return the appropriate value */
+   reg_val = gfx_pci_config_read(SC1200_VIDEO_PCI_44);
+   if ((reg_val & 0x1) == 0)
+      return (1);
+   else
+      return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_clock_frequency
+ *
+ * This routine returns the current clock frequency in 16.16 format.
+ * It reads the current register value and finds the match in the table.
+ * If no match is found, this routine returns 0.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+unsigned long
+sc1200_get_clock_frequency(void)
+#else
+unsigned long
+gfx_get_clock_frequency(void)
+#endif
+{
+   unsigned int index;
+   unsigned long value, mask;
+
+   mask = 0x007FFF0F;
+   value = READ_VID32(SC1200_VID_CLOCK_SELECT) & mask;
+   for (index = 0; index < NUM_SC1200_FREQUENCIES; index++) {
+      if ((gfx_sc1200_clock_table[index].clock_select & mask) == value)
+	 return (gfx_sc1200_clock_table[index].frequency);
+   }
+   return (0);
+}
+
+/*************************************************************/
+/*  READ ROUTINES  |  INCLUDED FOR DIAGNOSTIC PURPOSES ONLY  */
+/*************************************************************/
+
+#if GFX_READ_ROUTINES
+
+/*---------------------------------------------------------------------------
+ * gfx_get_vsa2_softvga_enable
+ * 
+ * This function returns the enable status of SoftVGA.  It is valid
+ * only if VSAII is present.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1200_get_vsa2_softvga_enable(void)
+#else
+int
+gfx_get_vsa2_softvga_enable(void)
+#endif
+{
+   unsigned long reg_val;
+
+   reg_val = gfx_pci_config_read(SC1200_VIDEO_PCI_44);
+   if ((reg_val & 0x1) == 0)
+      return (1);
+   else
+      return (0);
+
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_sync_polarities
+ *
+ * This routine returns the polarities of the sync pulses:
+ *     Bit 0: Set if negative horizontal polarity.
+ *     Bit 1: Set if negative vertical polarity.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1200_get_sync_polarities(void)
+#else
+int
+gfx_get_sync_polarities(void)
+#endif
+{
+   int polarities = 0;
+
+   if (READ_VID32(SC1200_DISPLAY_CONFIG) & SC1200_DCFG_CRT_HSYNC_POL)
+      polarities |= 1;
+   if (READ_VID32(SC1200_DISPLAY_CONFIG) & SC1200_DCFG_CRT_VSYNC_POL)
+      polarities |= 2;
+   return (polarities);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_video_palette_entry
+ *
+ * This routine returns a single palette entry.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1200_get_video_palette_entry(unsigned long index, unsigned long *palette)
+#else
+int
+gfx_get_video_palette_entry(unsigned long index, unsigned long *palette)
+#endif
+{
+   if (index > 0xFF)
+      return GFX_STATUS_BAD_PARAMETER;
+
+   /* READ A SINGLE ENTRY */
+
+   WRITE_VID32(SC1200_PALETTE_ADDRESS, index);
+   *palette = READ_VID32(SC1200_PALETTE_DATA);
+
+   return (GFX_STATUS_OK);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_video_enable
+ *
+ * This routine returns the value "one" if video overlay is currently enabled,
+ * otherwise it returns the value "zero".
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1200_get_video_enable(void)
+#else
+int
+gfx_get_video_enable(void)
+#endif
+{
+   if (READ_VID32(SC1200_VIDEO_CONFIG) & SC1200_VCFG_VID_EN)
+      return (1);
+   return (0);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_video_format
+ *
+ * This routine returns the current video overlay format.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1200_get_video_format(void)
+#else
+int
+gfx_get_video_format(void)
+#endif
+{
+   unsigned long ctrl, vcfg;
+
+   ctrl = READ_VID32(SC1200_VID_ALPHA_CONTROL);
+   vcfg = READ_VID32(SC1200_VIDEO_CONFIG);
+
+   if (ctrl & SC1200_VIDEO_INPUT_IS_RGB) {
+      switch (vcfg & SC1200_VCFG_VID_INP_FORMAT) {
+      case SC1200_VCFG_UYVY_FORMAT:
+	 return VIDEO_FORMAT_RGB;
+      case SC1200_VCFG_Y2YU_FORMAT:
+	 return VIDEO_FORMAT_P2M_P2L_P1M_P1L;
+      case SC1200_VCFG_YUYV_FORMAT:
+	 return VIDEO_FORMAT_P1M_P1L_P2M_P2L;
+      case SC1200_VCFG_YVYU_FORMAT:
+	 return VIDEO_FORMAT_P1M_P2L_P2M_P1L;
+      }
+   }
+
+   if (vcfg & SC1200_VCFG_4_2_0_MODE) {
+      switch (vcfg & SC1200_VCFG_VID_INP_FORMAT) {
+      case SC1200_VCFG_UYVY_FORMAT:
+	 return VIDEO_FORMAT_Y0Y1Y2Y3;
+      case SC1200_VCFG_Y2YU_FORMAT:
+	 return VIDEO_FORMAT_Y3Y2Y1Y0;
+      case SC1200_VCFG_YUYV_FORMAT:
+	 return VIDEO_FORMAT_Y1Y0Y3Y2;
+      case SC1200_VCFG_YVYU_FORMAT:
+	 return VIDEO_FORMAT_Y1Y2Y3Y0;
+      }
+   } else {
+      switch (vcfg & SC1200_VCFG_VID_INP_FORMAT) {
+      case SC1200_VCFG_UYVY_FORMAT:
+	 return VIDEO_FORMAT_UYVY;
+      case SC1200_VCFG_Y2YU_FORMAT:
+	 return VIDEO_FORMAT_Y2YU;
+      case SC1200_VCFG_YUYV_FORMAT:
+	 return VIDEO_FORMAT_YUYV;
+      case SC1200_VCFG_YVYU_FORMAT:
+	 return VIDEO_FORMAT_YVYU;
+      }
+   }
+   return (GFX_STATUS_ERROR);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_video_src_size
+ *
+ * This routine returns the size of the source video overlay buffer.  The 
+ * return value is (height << 16) | width.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+unsigned long
+sc1200_get_video_src_size(void)
+#else
+unsigned long
+gfx_get_video_src_size(void)
+#endif
+{
+   unsigned long width = 0, height = 0;
+
+   /* DETERMINE SOURCE WIDTH FROM THE SC1200 VIDEO LINE SIZE */
+
+   width = (READ_VID32(SC1200_VIDEO_CONFIG) >> 7) & 0x000001FE;
+   if (READ_VID32(SC1200_VIDEO_CONFIG) & SC1200_VCFG_LINE_SIZE_UPPER)
+      width += 512l;
+
+   if (width) {
+      /* DETERMINE HEIGHT BY DIVIDING TOTAL SIZE BY WIDTH */
+      /* Get total size from display controller - abtracted. */
+
+      height = gfx_get_display_video_size() / (width << 1);
+   }
+   return ((height << 16) | width);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_video_line_size
+ *
+ * This routine returns the line size of the source video overlay buffer, in
+ * pixels.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+unsigned long
+sc1200_get_video_line_size(void)
+#else
+unsigned long
+gfx_get_video_line_size(void)
+#endif
+{
+   unsigned long width = 0;
+
+   /* DETERMINE SOURCE WIDTH FROM THE SC1200 VIDEO LINE SIZE */
+
+   width = (READ_VID32(SC1200_VIDEO_CONFIG) >> 7) & 0x000001FE;
+   if (READ_VID32(SC1200_VIDEO_CONFIG) & SC1200_VCFG_LINE_SIZE_UPPER)
+      width += 512l;
+   return (width);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_video_xclip
+ *
+ * This routine returns the number of bytes clipped on the left side of a
+ * video overlay line (skipped at beginning).
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+unsigned long
+sc1200_get_video_xclip(void)
+#else
+unsigned long
+gfx_get_video_xclip(void)
+#endif
+{
+   unsigned long clip = 0;
+
+   /* DETERMINE SOURCE WIDTH FROM THE SC1200 VIDEO LINE SIZE */
+
+   clip = (READ_VID32(SC1200_VIDEO_CONFIG) >> 14) & 0x000007FC;
+   return (clip);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_video_offset
+ *
+ * This routine returns the current offset for the video overlay buffer.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+unsigned long
+sc1200_get_video_offset(void)
+#else
+unsigned long
+gfx_get_video_offset(void)
+#endif
+{
+   return (gfx_get_display_video_offset());
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_video_upscale
+ * 
+ * This routine returns the scale factor for the video overlay window.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+unsigned long
+sc1200_get_video_upscale(void)
+#else
+unsigned long
+gfx_get_video_upscale(void)
+#endif
+{
+   return (READ_VID32(SC1200_VIDEO_UPSCALE));
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_video_scale
+ * 
+ * This routine returns the scale factor for the video overlay window.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+unsigned long
+sc1200_get_video_scale(void)
+#else
+unsigned long
+gfx_get_video_scale(void)
+#endif
+{
+   return gfx_get_video_upscale();
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_video_downscale_config
+ * 
+ * This routine returns the current type and value of video downscaling.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1200_get_video_downscale_config(unsigned short *type, unsigned short *m)
+#else
+int
+gfx_get_video_downscale_config(unsigned short *type, unsigned short *m)
+#endif
+{
+   unsigned long downscale;
+
+   downscale = READ_VID32(SC1200_VIDEO_DOWNSCALER_CONTROL);
+   *m = (unsigned short)((downscale & SC1200_VIDEO_DOWNSCALE_FACTOR_MASK) >>
+			 SC1200_VIDEO_DOWNSCALE_FACTOR_POS) + 1;
+
+   switch (downscale & SC1200_VIDEO_DOWNSCALE_TYPE_MASK) {
+   case SC1200_VIDEO_DOWNSCALE_TYPE_A:
+      *type = VIDEO_DOWNSCALE_KEEP_1_OF;
+      break;
+   case SC1200_VIDEO_DOWNSCALE_TYPE_B:
+      *type = VIDEO_DOWNSCALE_DROP_1_OF;
+      break;
+   default:
+      return GFX_STATUS_ERROR;
+      break;
+   }
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_video_downscale_coefficients
+ * 
+ * This routine returns the current video downscaling coefficients.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+void
+sc1200_get_video_downscale_coefficients(unsigned short *coef1,
+					unsigned short *coef2,
+					unsigned short *coef3,
+					unsigned short *coef4)
+#else
+void
+gfx_get_video_downscale_coefficients(unsigned short *coef1,
+				     unsigned short *coef2,
+				     unsigned short *coef3,
+				     unsigned short *coef4)
+#endif
+{
+   unsigned long coef;
+
+   coef = READ_VID32(SC1200_VIDEO_DOWNSCALER_COEFFICIENTS);
+   *coef1 =
+	 (unsigned short)((coef >> SC1200_VIDEO_DOWNSCALER_COEF1_POS) &
+			  SC1200_VIDEO_DOWNSCALER_COEF_MASK);
+   *coef2 =
+	 (unsigned short)((coef >> SC1200_VIDEO_DOWNSCALER_COEF2_POS) &
+			  SC1200_VIDEO_DOWNSCALER_COEF_MASK);
+   *coef3 =
+	 (unsigned short)((coef >> SC1200_VIDEO_DOWNSCALER_COEF3_POS) &
+			  SC1200_VIDEO_DOWNSCALER_COEF_MASK);
+   *coef4 =
+	 (unsigned short)((coef >> SC1200_VIDEO_DOWNSCALER_COEF4_POS) &
+			  SC1200_VIDEO_DOWNSCALER_COEF_MASK);
+   return;
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_video_downscale_enable
+ * 
+ * This routine returns 1 if video downscaling is currently enabled,
+ * or 0 if it is currently disabled.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+void
+sc1200_get_video_downscale_enable(int *enable)
+#else
+void
+gfx_get_video_downscale_enable(int *enable)
+#endif
+{
+   if (READ_VID32(SC1200_VIDEO_DOWNSCALER_CONTROL) &
+       SC1200_VIDEO_DOWNSCALE_ENABLE)
+      *enable = 1;
+   else
+      *enable = 0;
+   return;
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_video_dst_size
+ * 
+ * This routine returns the size of the displayed video overlay window.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+unsigned long
+sc1200_get_video_dst_size(void)
+#else
+unsigned long
+gfx_get_video_dst_size(void)
+#endif
+{
+   unsigned long xsize, ysize;
+
+   xsize = READ_VID32(SC1200_VIDEO_X_POS);
+   xsize = ((xsize >> 16) & 0x7FF) - (xsize & 0x7FF);
+   ysize = READ_VID32(SC1200_VIDEO_Y_POS);
+   ysize = ((ysize >> 16) & 0x7FF) - (ysize & 0x7FF);
+   return ((ysize << 16) | xsize);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_video_position
+ * 
+ * This routine returns the position of the video overlay window.  The
+ * return value is (ypos << 16) | xpos.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+unsigned long
+sc1200_get_video_position(void)
+#else
+unsigned long
+gfx_get_video_position(void)
+#endif
+{
+   unsigned long hadjust, vadjust;
+   unsigned long xpos, ypos;
+
+   /* READ HARDWARE POSITION */
+
+   xpos = READ_VID32(SC1200_VIDEO_X_POS) & 0x000007FF;
+   ypos = READ_VID32(SC1200_VIDEO_Y_POS) & 0x000007FF;
+
+   /* GET ADJUSTMENT VALUES */
+   /* Use routines to abstract version of display controller. */
+
+   hadjust =
+	 (unsigned long)gfx_get_htotal() -
+	 (unsigned long)gfx_get_hsync_end() - 14l;
+   vadjust =
+	 (unsigned long)gfx_get_vtotal() -
+	 (unsigned long)gfx_get_vsync_end() + 1l;
+   xpos -= hadjust;
+   ypos -= vadjust;
+   return ((ypos << 16) | (xpos & 0x0000FFFF));
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_video_color_key
+ * 
+ * This routine returns the current video color key value.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+unsigned long
+sc1200_get_video_color_key(void)
+#else
+unsigned long
+gfx_get_video_color_key(void)
+#endif
+{
+   return (READ_VID32(SC1200_VIDEO_COLOR_KEY));
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_video_color_key_mask
+ * 
+ * This routine returns the current video color mask value.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+unsigned long
+sc1200_get_video_color_key_mask(void)
+#else
+unsigned long
+gfx_get_video_color_key_mask(void)
+#endif
+{
+   return (READ_VID32(SC1200_VIDEO_COLOR_MASK));
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_video_color_key_src
+ * 
+ * This routine returns 0 for video data compare, 1 for graphics data.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1200_get_video_color_key_src(void)
+#else
+int
+gfx_get_video_color_key_src(void)
+#endif
+{
+   if (READ_VID32(SC1200_DISPLAY_CONFIG) & SC1200_DCFG_VG_CK)
+      return (0);
+   return (1);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_video_filter
+ * 
+ * This routine returns if the filters are currently enabled.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1200_get_video_filter(void)
+#else
+int
+gfx_get_video_filter(void)
+#endif
+{
+   int retval = 0;
+
+   if (READ_VID32(SC1200_VIDEO_CONFIG) & SC1200_VCFG_X_FILTER_EN)
+      retval |= 1;
+   if (READ_VID32(SC1200_VIDEO_CONFIG) & SC1200_VCFG_Y_FILTER_EN)
+      retval |= 2;
+   return (retval);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_video_request
+ * 
+ * This routine returns the horizontal (pixel) and vertical (lines) video
+ * request values.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1200_get_video_request(short *x, short *y)
+#else
+int
+gfx_get_video_request(short *x, short *y)
+#endif
+{
+   int request = 0;
+
+   request = (int)(READ_VID32(SC1200_VIDEO_REQUEST));
+   *x = (request >> SC1200_VIDEO_X_REQUEST_POS) & SC1200_VIDEO_REQUEST_MASK;
+   *y = (request >> SC1200_VIDEO_Y_REQUEST_POS) & SC1200_VIDEO_REQUEST_MASK;
+
+   *x -= gfx_get_htotal() - gfx_get_hsync_end() - 2;
+   *y -= gfx_get_vtotal() - gfx_get_vsync_end() + 1;
+
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_video_source
+ * 
+ * This routine returns the current video source.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1200_get_video_source(VideoSourceType * source)
+#else
+int
+gfx_get_video_source(VideoSourceType * source)
+#endif
+{
+   switch (READ_VID32(SC1200_VIDEO_DISPLAY_MODE) & SC1200_VIDEO_SOURCE_MASK) {
+   case SC1200_VIDEO_SOURCE_GX1:
+      *source = VIDEO_SOURCE_MEMORY;
+      break;
+   case SC1200_VIDEO_SOURCE_DVIP:
+      *source = VIDEO_SOURCE_DVIP;
+      break;
+   default:
+      return GFX_STATUS_ERROR;
+   }
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_vbi_source
+ * 
+ * This routine returns the current vbi source.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1200_get_vbi_source(VbiSourceType * source)
+#else
+int
+gfx_get_vbi_source(VbiSourceType * source)
+#endif
+{
+   switch (READ_VID32(SC1200_VIDEO_DISPLAY_MODE) & SC1200_VBI_SOURCE_MASK) {
+   case SC1200_VBI_SOURCE_GX1:
+      *source = VBI_SOURCE_MEMORY;
+      break;
+   case SC1200_VBI_SOURCE_DVIP:
+      *source = VBI_SOURCE_DVIP;
+      break;
+   default:
+      return GFX_STATUS_ERROR;
+   }
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_vbi_lines
+ * 
+ * This routine returns the VBI lines which are sent to the TV encoder.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+unsigned long
+sc1200_get_vbi_lines(int odd)
+#else
+unsigned long
+gfx_get_vbi_lines(int odd)
+#endif
+{
+   if (odd)
+      return (READ_VID32(SC1200_VIDEO_ODD_VBI_LINE_ENABLE) &
+	      SC1200_VIDEO_VBI_LINE_ENABLE_MASK);
+   return (READ_VID32(SC1200_VIDEO_EVEN_VBI_LINE_ENABLE) &
+	   SC1200_VIDEO_VBI_LINE_ENABLE_MASK);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_vbi_total
+ * 
+ * This routine returns the total number of VBI bytes in the field.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+unsigned long
+sc1200_get_vbi_total(int odd)
+#else
+unsigned long
+gfx_get_vbi_total(int odd)
+#endif
+{
+   if (odd)
+      return (READ_VID32(SC1200_VIDEO_ODD_VBI_TOTAL_COUNT) &
+	      SC1200_VIDEO_VBI_TOTAL_COUNT_MASK);
+   return (READ_VID32(SC1200_VIDEO_EVEN_VBI_TOTAL_COUNT) &
+	   SC1200_VIDEO_VBI_TOTAL_COUNT_MASK);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_video_interlaced()
+ * 
+ * This routine returns "1" if input video is currently in interlaced mode.
+ * "0" otherwise.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1200_get_video_interlaced(void)
+#else
+int
+gfx_get_video_interlaced(void)
+#endif
+{
+   if (READ_VID32(SC1200_VID_ALPHA_CONTROL) & SC1200_VIDEO_IS_INTERLACED)
+      return (1);
+   else
+      return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_color_space_YUV()
+ * 
+ * This routine returns "1" if video processor color space mode is currently
+ * YUV. "0" otherwise.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1200_get_color_space_YUV(void)
+#else
+int
+gfx_get_color_space_YUV(void)
+#endif
+{
+   unsigned long control;
+
+   control = READ_VID32(SC1200_VID_ALPHA_CONTROL);
+
+   /* IS SC1200 VIDEO COLOR SPACE RGB OR CONVERTED TO RGB */
+   if ((control & SC1200_VIDEO_INPUT_IS_RGB)
+       || (control & SC1200_CSC_VIDEO_YUV_TO_RGB))
+      return (0);
+   else
+      return (1);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_vertical_scaler_offset()
+ * 
+ * This routine sets "offset" to the value by which odd frames are shifted,
+ * if insert is enabled, and to 0 if no shifting occurs.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1200_get_vertical_scaler_offset(char *offset)
+#else
+int
+gfx_get_vertical_scaler_offset(char *offset)
+#endif
+{
+   unsigned long control;
+
+   control = READ_VID32(SC1200_VID_ALPHA_CONTROL);
+   if (control & SC1200_VERTICAL_SCALER_SHIFT_EN) {
+      if ((control & SC1200_VERTICAL_SCALER_SHIFT_MASK) ==
+	  SC1200_VERTICAL_SCALER_SHIFT_INIT)
+	 *offset = 1;
+      else
+	 return GFX_STATUS_ERROR;	/* TODO: find the interpretation of other values */
+   } else
+      *offset = 0;
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_genlock_delay
+ * 
+ * This routine returns the genlock delay in 27 MHz clocks.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+unsigned long
+sc1200_get_genlock_delay(void)
+#else
+unsigned long
+gfx_get_genlock_delay(void)
+#endif
+{
+   return (READ_VID32(SC1200_GENLOCK_DELAY) & SC1200_GENLOCK_DELAY_MASK);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_genlock_enable
+ * 
+ * This routine returns "1" if genlock is currently enabled, "0" otherwise.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1200_get_genlock_enable(void)
+#else
+int
+gfx_get_genlock_enable(void)
+#endif
+{
+   if (READ_VID32(SC1200_GENLOCK) &
+       (SC1200_GENLOCK_SINGLE_ENABLE | SC1200_GENLOCK_CONTINUOUS_ENABLE))
+      return (1);
+   else
+      return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_video_cursor()
+ * 
+ * This routine configures the video hardware cursor.
+ * If the "mask"ed bits in the graphics pixel match "key", then either "color1"
+ * or "color2" will be used for this pixel, according to the value of the bit
+ * in offset "select_color2".
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1200_get_video_cursor(unsigned long *key, unsigned long *mask,
+			unsigned short *select_color2, unsigned long *color1,
+			unsigned short *color2)
+#else
+int
+gfx_get_video_cursor(unsigned long *key, unsigned long *mask,
+		     unsigned short *select_color2, unsigned long *color1,
+		     unsigned short *color2)
+#endif
+{
+   *select_color2 =
+	 (unsigned short)(READ_VID32(SC1200_CURSOR_COLOR_KEY) >>
+			  SC1200_CURSOR_COLOR_KEY_OFFSET_POS);
+   *key = READ_VID32(SC1200_CURSOR_COLOR_KEY) & SC1200_COLOR_MASK;
+   *mask = READ_VID32(SC1200_CURSOR_COLOR_MASK) & SC1200_COLOR_MASK;
+   *color1 = READ_VID32(SC1200_CURSOR_COLOR_1) & SC1200_COLOR_MASK;
+   *color2 =
+	 (unsigned short)(READ_VID32(SC1200_CURSOR_COLOR_2) &
+			  SC1200_COLOR_MASK);
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_read_crc
+ *
+ * This routine returns the hardware CRC value, which is used for automated 
+ * testing.  The value is like a checksum, but will change if pixels move
+ * locations.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+unsigned long
+sc1200_read_crc(void)
+#else
+unsigned long
+gfx_read_crc(void)
+#endif
+{
+   unsigned long crc = 0xFFFFFFFF;
+
+   if (gfx_test_timing_active()) {
+      /* WAIT UNTIL ACTIVE DISPLAY */
+
+      while (!gfx_test_vertical_active()) ;
+
+      /* RESET CRC DURING ACTIVE DISPLAY */
+
+      WRITE_VID32(SC1200_VID_CRC, 0);
+      WRITE_VID32(SC1200_VID_CRC, 1);
+
+      /* WAIT UNTIL NOT ACTIVE, THEN ACTIVE, NOT ACTIVE, THEN ACTIVE */
+
+      while (gfx_test_vertical_active()) ;
+      while (!gfx_test_vertical_active()) ;
+      while (gfx_test_vertical_active()) ;
+      while (!gfx_test_vertical_active()) ;
+      crc = READ_VID32(SC1200_VID_CRC) >> 8;
+   }
+   return (crc);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_macrovision_enable
+ *
+ * This routine returns the value "one" if macrovision currently enabled in the
+ * TV encoder, otherwise it returns the value "zero".
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1200_get_macrovision_enable(void)
+#else
+int
+gfx_get_macrovision_enable(void)
+#endif
+{
+   if (READ_VID32(SC1200_TVENC_MV_CONTROL) == SC1200_TVENC_MV_ENABLE)
+      return (1);
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_alpha_enable
+ * 
+ * This routine returns 1 if the selected alpha window is currently 
+ * enabled, or 0 if it is currently disabled.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+void
+sc1200_get_alpha_enable(int *enable)
+#else
+void
+gfx_get_alpha_enable(int *enable)
+#endif
+{
+   unsigned long value = 0;
+
+   *enable = 0;
+   if (gfx_alpha_select <= 2) {
+      value =
+	    READ_VID32(SC1200_ALPHA_CONTROL_1 +
+		       ((unsigned long)gfx_alpha_select << 4));
+      if (value & SC1200_ACTRL_WIN_ENABLE)
+	 *enable = 1;
+   }
+   return;
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_alpha_size
+ * 
+ * This routine returns the size of the currently selected alpha region.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+void
+sc1200_get_alpha_size(unsigned short *x, unsigned short *y,
+		      unsigned short *width, unsigned short *height)
+#else
+void
+gfx_get_alpha_size(unsigned short *x, unsigned short *y,
+		   unsigned short *width, unsigned short *height)
+#endif
+{
+   unsigned long value = 0;
+
+   *x = 0;
+   *y = 0;
+   *width = 0;
+   *height = 0;
+   if (gfx_alpha_select <= 2) {
+      value =
+	    READ_VID32(SC1200_ALPHA_XPOS_1 +
+		       ((unsigned long)gfx_alpha_select << 4));
+      *x = (unsigned short)(value & 0x000007FF);
+      *width = (unsigned short)((value >> 16) & 0x000007FF) - *x;
+      value =
+	    READ_VID32(SC1200_ALPHA_YPOS_1 +
+		       ((unsigned long)gfx_alpha_select << 4));
+      *y = (unsigned short)(value & 0x000007FF);
+      *height = (unsigned short)((value >> 16) & 0x000007FF) - *y;
+   }
+   *x -= gfx_get_htotal() - gfx_get_hsync_end() - 2;
+   *y -= gfx_get_vtotal() - gfx_get_vsync_end() + 1;
+   return;
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_alpha_value
+ * 
+ * This routine returns the alpha value and increment/decrement value of 
+ * the currently selected alpha region.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+void
+sc1200_get_alpha_value(unsigned char *alpha, char *delta)
+#else
+void
+gfx_get_alpha_value(unsigned char *alpha, char *delta)
+#endif
+{
+   unsigned long value = 0;
+
+   *alpha = 0;
+   *delta = 0;
+   if (gfx_alpha_select <= 2) {
+      value =
+	    READ_VID32(SC1200_ALPHA_CONTROL_1 +
+		       ((unsigned long)gfx_alpha_select << 4));
+      *alpha = (unsigned char)(value & 0x00FF);
+      *delta = (char)((value >> 8) & 0x00FF);
+   }
+   return;
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_alpha_priority
+ * 
+ * This routine returns the priority of the currently selected alpha region.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+void
+sc1200_get_alpha_priority(int *priority)
+#else
+void
+gfx_get_alpha_priority(int *priority)
+#endif
+{
+   unsigned long pos = 0, value = 0;
+
+   *priority = 0;
+   if (gfx_alpha_select <= 2) {
+      value = READ_VID32(SC1200_VID_ALPHA_CONTROL);
+      pos = 16 + (gfx_alpha_select << 1);
+      *priority = (int)((value >> pos) & 3);
+   }
+   return;
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_alpha_color
+ * 
+ * This routine returns the color register value for the currently selected 
+ * alpha region.  Bit 24 is set if the color register is enabled.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+void
+sc1200_get_alpha_color(unsigned long *color)
+#else
+void
+gfx_get_alpha_color(unsigned long *color)
+#endif
+{
+   *color = 0;
+   if (gfx_alpha_select <= 2) {
+      *color =
+	    READ_VID32(SC1200_ALPHA_COLOR_1 +
+		       ((unsigned long)gfx_alpha_select << 4));
+   }
+   return;
+}
+
+#endif /* GFX_READ_ROUTINES */
+
+/* END OF FILE */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/vid_1400.c b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/vid_1400.c
new file mode 100644
index 000000000..11f936160
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/vid_1400.c
@@ -0,0 +1,924 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/vid_1400.c,v 1.1 2002/12/10 15:12:27 alanh Exp $ */
+/*-----------------------------------------------------------------------------
+ * VID_1400.C
+ *
+ * Version 2.0 - February 21, 2000
+ *
+ * This file contains routines to control the SC1400 video overlay hardware.
+ *
+ * History:
+ *    Versions 0.1 through 2.0 by Brian Falardeau.
+ *
+ * Copyright (c) 1999-2000 National Semiconductor.
+ *-----------------------------------------------------------------------------
+ */
+
+/*----------------------------------------------------------------------------
+ * SC1400 PLL TABLE
+ *----------------------------------------------------------------------------
+ */
+
+typedef struct tagSC1400PLL
+{
+   long frequency;			/* 16.16 fixed point frequency */
+   unsigned long clock_select;		/* clock select register (0x2C) */
+}
+SC1400PLL;
+
+SC1400PLL gfx_sc1400_clock_table[] = {
+   {0x00192CCC, 0x00000000},		/*  25.1750 */
+   {0x001C526E, 0x00010000},		/*  28.3220 */
+   {0x001F8000, 0x00020000},		/*  31.5000 */
+   {0x00240000, 0x000E0000},		/*  36.0000 */
+   {0x00258000, 0x0010110C},		/*  37.5000 */
+   {0x00280000, 0x00040000},		/*  40.0000 */
+   {0x002CE666, 0x00090000},		/*  44.9000 */
+   {0x00320000, 0x00100C06},		/*  50.0000 */
+   {0x00325999, 0x0050600C},		/*  50.3500 */
+   {0x00360000, 0x00100100},		/*  54.0000 */
+   {0x0038643F, 0x0010160A},		/*  56.3916 */
+   {0x0038A3D7, 0x00506C0C},		/*  56.6440 */
+   {0x003B0000, 0x0010170A},		/*  59.6583 */
+   {0x003BA886, 0x00100A04},		/*  59.6583 */
+   {0x003F0000, 0x00100602},		/*  63.0000 */
+   {0x00410000, 0x00060000},		/*  65.0000 */
+   {0x00438000, 0x00100401},		/*  67.5000 */
+   {0x0046CCCC, 0x00101407},		/*  70.8000 */
+   {0x00480000, 0x00100702},		/*  72.0000 */
+   {0x004B0000, 0x00070000},		/*  75.0000 */
+   {0x004EC000, 0x0010220B},		/*  78.7500 */
+   {0x00500000, 0x00304C0C},		/*  80.0000 */
+   {0x00510000, 0x00100200},		/*  81.0000 */
+   {0x00550000, 0x00080000},		/*  85.0000 */
+   {0x0059CCCC, 0x00100902},		/*  89.8000 */
+   {0x00630000, 0x00100A02},		/*  99.0000 */
+   {0x00640000, 0x00102409},		/* 100.0000 */
+   {0x006C0000, 0x00100300},		/* 108.0000 */
+   {0x00870000, 0x00050000},		/* 135.0000 */
+   {0x009D8000, 0x00102205},		/* 157.5000 */
+   {0x00A20000, 0x00100500},		/* 162.0000 */
+   {0x00AA0000, 0x000B0000},		/* 170.0000 */
+   {0x00AF0000, 0x00100C01},		/* 175.0000 */
+   {0x00BD0000, 0x00100600},		/* 189.0000 */
+   {0x00CA0000, 0x00100E01},		/* 202.0000 */
+   {0x00E80000, 0x00102A04},		/* 232.0000 */
+};
+
+#define NUM_SC1400_FREQUENCIES sizeof(gfx_sc1400_clock_table)/sizeof(SC1400PLL)
+
+/*---------------------------------------------------------------------------
+ * gfx_reset_video (PRIVATE ROUTINE: NOT PART OF DURANGO API)
+ *
+ * This routine is used to disable all components of video overlay before
+ * performing a mode switch.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+void
+sc1400_reset_video(void)
+#else
+void
+gfx_reset_video(void)
+#endif
+{
+   gfx_set_video_enable(0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_clock_frequency
+ *
+ * This routine sets the clock frequency, specified as a 16.16 fixed point
+ * value (0x00318000 = 49.5 MHz).  It will set the closest frequency found
+ * in the lookup table.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+void
+sc1400_set_clock_frequency(unsigned long frequency)
+#else
+void
+gfx_set_clock_frequency(unsigned long frequency)
+#endif
+{
+   int index;
+   unsigned long value;
+   long min, diff;
+
+   /* FIND THE REGISTER VALUES FOR THE DESIRED FREQUENCY */
+   /* Search the table for the closest frequency (16.16 format). */
+
+   value = gfx_sc1400_clock_table[0].clock_select;
+   min = (long)gfx_sc1400_clock_table[0].frequency - frequency;
+   if (min < 0L)
+      min = -min;
+   for (index = 1; index < NUM_SC1400_FREQUENCIES; index++) {
+      diff = (long)gfx_sc1400_clock_table[index].frequency - frequency;
+      if (diff < 0L)
+	 diff = -diff;
+      if (diff < min) {
+	 min = diff;
+	 value = gfx_sc1400_clock_table[index].clock_select;
+      }
+   }
+
+   /* SET THE DOT CLOCK REGISTER */
+
+   WRITE_VID32(SC1400_VID_MISC, 0x00001000);
+   WRITE_VID32(SC1400_VID_CLOCK_SELECT, value);
+   return;
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_video_enable
+ *
+ * This routine enables or disables the video overlay functionality.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1400_set_video_enable(int enable)
+#else
+int
+gfx_set_video_enable(int enable)
+#endif
+{
+   unsigned long vcfg;
+
+   /* WAIT FOR VERTICAL BLANK TO START */
+   /* Otherwise a glitch can be observed. */
+
+   if (gfx_test_timing_active()) {
+      if (!gfx_test_vertical_active()) {
+	 while (!gfx_test_vertical_active()) ;
+      }
+      while (gfx_test_vertical_active()) ;
+   }
+   vcfg = READ_VID32(SC1400_VIDEO_CONFIG);
+   if (enable) {
+      /* ENABLE VIDEO OVERLAY FROM DISPLAY CONTROLLER */
+      /* Use private routine to abstract the display controller. */
+
+      gfx_set_display_video_enable(1);
+
+      /* SET SC1400 BUS CONTROL PARAMETERS */
+      /* Currently always high speed, 8-bit interface. */
+
+      vcfg |= SC1400_VCFG_HIGH_SPD_INT;
+      vcfg &= ~(SC1400_VCFG_EARLY_VID_RDY | SC1400_VCFG_16_BIT_EN);
+
+      /* ENABLE SC1400 VIDEO OVERLAY */
+
+      vcfg |= SC1400_VCFG_VID_EN;
+      WRITE_VID32(SC1400_VIDEO_CONFIG, vcfg);
+   } else {
+      /* DISABLE SC1400 VIDEO OVERLAY */
+
+      vcfg &= ~SC1400_VCFG_VID_EN;
+      WRITE_VID32(SC1400_VIDEO_CONFIG, vcfg);
+
+      /* DISABLE VIDEO OVERLAY FROM DISPLAY CONTROLLER */
+      /* Use private routine to abstract the display controller. */
+
+      gfx_set_display_video_enable(0);
+   }
+   return (0);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_video_format
+ *
+ * Currently only sets 4:2:0 format, Y1 V Y0 U.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1400_set_video_format(unsigned long format)
+#else
+int
+gfx_set_video_format(unsigned long format)
+#endif
+{
+   unsigned long vcfg = 0;
+
+   /* SET THE SC1400 VIDEO INPUT FORMAT */
+
+   vcfg = READ_VID32(SC1400_VIDEO_CONFIG);
+   vcfg &= ~(SC1400_VCFG_VID_INP_FORMAT | SC1400_VCFG_4_2_0_MODE);
+   vcfg &= ~(SC1400_VCFG_CSC_BYPASS);
+   if (format < 4)
+      vcfg |= (format << 2);
+   else
+      vcfg |= SC1400_VCFG_CSC_BYPASS;
+   WRITE_VID32(SC1400_VIDEO_CONFIG, vcfg);
+   return (0);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_video_size
+ *
+ * This routine specifies the size of the source data.  It is used only 
+ * to determine how much data to transfer per frame, and is not used to 
+ * calculate the scaling value (that is handled by a separate routine).
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1400_set_video_size(unsigned short width, unsigned short height)
+#else
+int
+gfx_set_video_size(unsigned short width, unsigned short height)
+#endif
+{
+   unsigned long size, vcfg;
+
+   /* SET THE SC1400 VIDEO LINE SIZE */
+
+   vcfg = READ_VID32(SC1400_VIDEO_CONFIG);
+   vcfg &= ~(SC1400_VCFG_LINE_SIZE_LOWER_MASK | SC1400_VCFG_LINE_SIZE_UPPER);
+   size = (width >> 1);
+   vcfg |= (size & 0x00FF) << 8;
+   if (size & 0x0100)
+      vcfg |= SC1400_VCFG_LINE_SIZE_UPPER;
+   WRITE_VID32(SC1400_VIDEO_CONFIG, vcfg);
+
+   /* SET TOTAL VIDEO BUFFER SIZE IN DISPLAY CONTROLLER */
+   /* Use private routine to abstract the display controller. */
+
+   gfx_set_display_video_size(width, height);
+   return (0);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_video_offset
+ *
+ * This routine sets the starting offset for the video buffer when only 
+ * one offset needs to be specified.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1400_set_video_offset(unsigned long offset)
+#else
+int
+gfx_set_video_offset(unsigned long offset)
+#endif
+{
+   /* SAVE VALUE FOR FUTURE CLIPPING OF THE TOP OF THE VIDEO WINDOW */
+
+   gfx_vid_offset = offset;
+
+   /* SET VIDEO BUFFER OFFSET IN DISPLAY CONTROLLER */
+   /* Use private routine to abstract the display controller. */
+
+   gfx_set_display_video_offset(offset);
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_video_scale
+ * 
+ * This routine sets the scale factor for the video overlay window.  The 
+ * size of the source and destination regions are specified in pixels.  
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1400_set_video_scale(unsigned short srcw, unsigned short srch,
+		       unsigned short dstw, unsigned short dsth)
+#else
+int
+gfx_set_video_scale(unsigned short srcw, unsigned short srch,
+		    unsigned short dstw, unsigned short dsth)
+#endif
+{
+   unsigned long xscale, yscale;
+
+   /* SAVE PARAMETERS */
+   /* These are needed for clipping the video window later. */
+
+   gfx_vid_srcw = srcw;
+   gfx_vid_srch = srch;
+   gfx_vid_dstw = dstw;
+   gfx_vid_dsth = dsth;
+
+   /* CALCULATE SC1400 SCALE FACTORS */
+   /* No downscaling in SC1400 so force to 1x if attempted. */
+
+   if (srcw < dstw)
+      xscale = (0x2000 * (srcw - 1)) / (dstw - 1);
+   else
+      xscale = 0x1FFF;
+   if (srch < dsth)
+      yscale = (0x2000 * (srch - 1)) / (dsth - 1);
+   else
+      yscale = 0x1FFF;
+   WRITE_VID32(SC1400_VIDEO_SCALE, (yscale << 16) | xscale);
+
+   /* CALL ROUTINE TO UPDATE WINDOW POSITION */
+   /* This is required because the scale values effect the number of */
+   /* source data pixels that need to be clipped, as well as the */
+   /* amount of data that needs to be transferred. */
+
+   gfx_set_video_window(gfx_vid_xpos, gfx_vid_ypos, gfx_vid_width,
+			gfx_vid_height);
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_video_window
+ * 
+ * This routine sets the position and size of the video overlay window.  The 
+ * position is specified in screen relative coordinates, and may be negative.  
+ * The size of destination region is specified in pixels.  The line size
+ * indicates the number of bytes of source data per scanline.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1400_set_video_window(short x, short y, unsigned short w, unsigned short h)
+#else
+int
+gfx_set_video_window(short x, short y, unsigned short w, unsigned short h)
+#endif
+{
+   unsigned long vcfg = 0;
+   unsigned long hadjust, vadjust;
+   unsigned long initread;
+   unsigned long xstart, ystart, xend, yend;
+   unsigned long offset, line_size;
+
+   /* SAVE PARAMETERS */
+   /* These are needed to call this routine if the scale value changes. */
+
+   gfx_vid_xpos = x;
+   gfx_vid_ypos = y;
+   gfx_vid_width = w;
+   gfx_vid_height = h;
+
+   /* GET ADJUSTMENT VALUES */
+   /* Use routines to abstract version of display controller. */
+
+   hadjust = gfx_get_htotal() - gfx_get_hsync_end() - 13;
+   vadjust = gfx_get_vtotal() - gfx_get_vsync_end() + 1;
+
+   if (x > 0) {
+      /* NO CLIPPING ON LEFT */
+
+      xstart = x + hadjust;
+      initread = 0;
+   } else {
+      /* CLIPPING ON LEFT */
+      /* Adjust initial read for scale, checking for divide by zero */
+
+      xstart = hadjust;
+      initread = -x;
+      if (gfx_vid_dstw)
+	 initread = ((-x) * gfx_vid_srcw) / gfx_vid_dstw;
+      else
+	 initread = 0;
+   }
+
+   /* CLIPPING ON RIGHT */
+
+   xend = x + w;
+   if (xend > gfx_get_hactive())
+      xend = gfx_get_hactive();
+   xend += hadjust;
+
+   /* CLIPPING ON TOP */
+
+   offset = gfx_vid_offset;
+   if (y >= 0) {
+      ystart = y + vadjust;
+   } else {
+      ystart = vadjust;
+      line_size = (READ_VID32(SC1400_VIDEO_CONFIG) >> 7) & 0x000001FE;
+      if (READ_VID32(SC1400_VIDEO_CONFIG) & SC1400_VCFG_LINE_SIZE_UPPER)
+	 line_size += 512;
+      if (gfx_vid_dsth)
+	 offset = gfx_vid_offset + (line_size << 1) *
+	       (((-y) * gfx_vid_srch) / gfx_vid_dsth);
+   }
+
+   /* CLIPPING ON BOTTOM */
+
+   yend = y + h;
+   if (yend >= gfx_get_vactive())
+      yend = gfx_get_vactive();
+   yend += vadjust;
+
+   /* SET VIDEO BUFFER OFFSET IN DISPLAY CONTROLLER */
+   /* Use private routine to abstract the display controller. */
+
+   gfx_set_display_video_offset(offset);
+
+   /* DISABLE REGISTER UPDATES */
+
+   vcfg = READ_VID32(SC1400_VIDEO_CONFIG);
+   vcfg &= ~SC1400_VCFG_VID_REG_UPDATE;
+   WRITE_VID32(SC1400_VIDEO_CONFIG, vcfg);
+
+   /* SET VIDEO POSITION */
+
+   WRITE_VID32(SC1400_VIDEO_X_POS, (xend << 16) | xstart);
+   WRITE_VID32(SC1400_VIDEO_Y_POS, (yend << 16) | ystart);
+
+   /* SET INITIAL READ ADDRESS AND ENABLE REGISTER UPDATES */
+
+   vcfg &= ~SC1400_VCFG_INIT_READ_MASK;
+   vcfg |= (initread << 15) & SC1400_VCFG_INIT_READ_MASK;
+   vcfg |= SC1400_VCFG_VID_REG_UPDATE;
+   WRITE_VID32(SC1400_VIDEO_CONFIG, vcfg);
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_video_color_key
+ * 
+ * This routine specifies the color key value and mask for the video overlay
+ * hardware.  To disable color key, the color and mask should both be set to 
+ * zero.  The hardware uses the color key in the following equation:
+ *
+ * ((source data) & (color key mask)) == ((color key) & (color key mask))
+ *
+ * The source data can be either graphics data or video data.  The bluescreen
+ * parameter is set to have the hardware compare video data and clear to
+ * comapare graphics data.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1400_set_video_color_key(unsigned long key, unsigned long mask,
+			   int graphics)
+#else
+int
+gfx_set_video_color_key(unsigned long key, unsigned long mask, int graphics)
+#endif
+{
+   unsigned long dcfg = 0;
+
+   /* SET SC1400 COLOR KEY VALUE */
+
+   WRITE_VID32(SC1400_VIDEO_COLOR_KEY, key);
+   WRITE_VID32(SC1400_VIDEO_COLOR_MASK, mask);
+
+   /* SELECT GRAPHICS OR VIDEO DATA TO COMPARE TO THE COLOR KEY */
+
+   dcfg = READ_VID32(SC1400_DISPLAY_CONFIG);
+   if (graphics & 0x01)
+      dcfg &= ~SC1400_DCFG_VG_CK;
+   else
+      dcfg |= SC1400_DCFG_VG_CK;
+   WRITE_VID32(SC1400_DISPLAY_CONFIG, dcfg);
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_video_filter
+ * 
+ * This routine enables or disables the video overlay filters.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1400_set_video_filter(int xfilter, int yfilter)
+#else
+int
+gfx_set_video_filter(int xfilter, int yfilter)
+#endif
+{
+   unsigned long vcfg = 0;
+
+   /* ENABLE OR DISABLE SC1400 VIDEO OVERLAY FILTERS */
+
+   vcfg = READ_VID32(SC1400_VIDEO_CONFIG);
+   vcfg &= ~(SC1400_VCFG_X_FILTER_EN | SC1400_VCFG_Y_FILTER_EN);
+   if (xfilter)
+      vcfg |= SC1400_VCFG_X_FILTER_EN;
+   if (yfilter)
+      vcfg |= SC1400_VCFG_Y_FILTER_EN;
+   WRITE_VID32(SC1400_VIDEO_CONFIG, vcfg);
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_video_palette
+ * 
+ * This routine loads the video hardware palette.  If a NULL pointer is 
+ * specified, the palette is bypassed (for SC1400, this means loading the 
+ * palette with identity values). 
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1400_set_video_palette(unsigned long *palette)
+#else
+int
+gfx_set_video_palette(unsigned long *palette)
+#endif
+{
+   unsigned long i, entry;
+
+   /* LOAD SC1400 VIDEO PALETTE */
+
+   WRITE_VID32(SC1400_PALETTE_ADDRESS, 0);
+   for (i = 0; i < 256; i++) {
+      if (palette)
+	 entry = palette[i];
+      else
+	 entry = i | (i << 8) | (i << 16);
+      WRITE_VID32(SC1400_PALETTE_DATA, entry);
+   }
+   return (0);
+}
+
+/*************************************************************/
+/*  READ ROUTINES  |  INCLUDED FOR DIAGNOSTIC PURPOSES ONLY  */
+/*************************************************************/
+
+#if GFX_READ_ROUTINES
+
+/*---------------------------------------------------------------------------
+ * gfx_get_sync_polarities
+ *
+ * This routine returns the polarities of the sync pulses:
+ *     Bit 0: Set if negative horizontal polarity.
+ *     Bit 1: Set if negative vertical polarity.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1400_get_sync_polarities(void)
+#else
+int
+gfx_get_sync_polarities(void)
+#endif
+{
+   int polarities = 0;
+
+   if (READ_VID32(SC1400_DISPLAY_CONFIG) & 0x00000100)
+      polarities |= 1;
+   if (READ_VID32(SC1400_DISPLAY_CONFIG) & 0x00000200)
+      polarities |= 2;
+   return (polarities);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_video_enable
+ *
+ * This routine returns the value "one" if video overlay is currently enabled,
+ * otherwise it returns the value "zero".
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1400_get_video_enable(void)
+#else
+int
+gfx_get_video_enable(void)
+#endif
+{
+   if (READ_VID32(SC1400_VIDEO_CONFIG) & SC1400_VCFG_VID_EN)
+      return (1);
+   return (0);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_video_format
+ *
+ * This routine returns the current video overlay format.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1400_get_video_format(void)
+#else
+int
+gfx_get_video_format(void)
+#endif
+{
+   unsigned long vcfg;
+
+   vcfg = READ_VID32(SC1400_VIDEO_CONFIG);
+   if (vcfg & SC1400_VCFG_CSC_BYPASS)
+      return (4);
+   else
+      return ((vcfg >> 2) & 3);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_video_src_size
+ *
+ * This routine returns the size of the source video overlay buffer.  The 
+ * return value is (height << 16) | width.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+unsigned long
+sc1400_get_video_src_size(void)
+#else
+unsigned long
+gfx_get_video_src_size(void)
+#endif
+{
+   unsigned long width = 0, height = 0;
+
+   /* DETERMINE SOURCE WIDTH FROM THE SC1400 VIDEO LINE SIZE */
+
+   width = (READ_VID32(SC1400_VIDEO_CONFIG) >> 7) & 0x000001FE;
+   if (READ_VID32(SC1400_VIDEO_CONFIG) & SC1400_VCFG_LINE_SIZE_UPPER)
+      width += 512;
+
+   if (width) {
+      /* DETERMINE HEIGHT BY DIVIDING TOTAL SIZE BY WIDTH */
+      /* Get total size from display controller - abtracted. */
+
+      height = gfx_get_display_video_size() / (width << 1);
+   }
+   return ((height << 16) | width);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_video_line_size
+ *
+ * This routine returns the line size of the source video overlay buffer, in 
+ * pixels.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+unsigned long
+sc1400_get_video_line_size(void)
+#else
+unsigned long
+gfx_get_video_line_size(void)
+#endif
+{
+   unsigned long width = 0;
+
+   /* DETERMINE SOURCE WIDTH FROM THE SC1400 VIDEO LINE SIZE */
+
+   width = (READ_VID32(SC1400_VIDEO_CONFIG) >> 7) & 0x000001FE;
+   if (READ_VID32(SC1400_VIDEO_CONFIG) & SC1400_VCFG_LINE_SIZE_UPPER)
+      width += 512;
+   return (width);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_video_xclip
+ *
+ * This routine returns the number of bytes clipped on the left side of a 
+ * video overlay line (skipped at beginning).
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+unsigned long
+sc1400_get_video_xclip(void)
+#else
+unsigned long
+gfx_get_video_xclip(void)
+#endif
+{
+   unsigned long clip = 0;
+
+   /* DETERMINE SOURCE WIDTH FROM THE SC1400 VIDEO LINE SIZE */
+
+   clip = (READ_VID32(SC1400_VIDEO_CONFIG) >> 14) & 0x000007FC;
+   return (clip);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_video_offset
+ *
+ * This routine returns the current offset for the video overlay buffer.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+unsigned long
+sc1400_get_video_offset(void)
+#else
+unsigned long
+gfx_get_video_offset(void)
+#endif
+{
+   return (gfx_get_display_video_offset());
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_video_scale
+ * 
+ * This routine returns the scale factor for the video overlay window.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+unsigned long
+sc1400_get_video_scale(void)
+#else
+unsigned long
+gfx_get_video_scale(void)
+#endif
+{
+   return (READ_VID32(SC1400_VIDEO_SCALE));
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_video_dst_size
+ * 
+ * This routine returns the size of the displayed video overlay window.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+unsigned long
+sc1400_get_video_dst_size(void)
+#else
+unsigned long
+gfx_get_video_dst_size(void)
+#endif
+{
+   unsigned long xsize, ysize;
+
+   xsize = READ_VID32(SC1400_VIDEO_X_POS);
+   xsize = ((xsize >> 16) & 0x3FF) - (xsize & 0x03FF);
+   ysize = READ_VID32(SC1400_VIDEO_Y_POS);
+   ysize = ((ysize >> 16) & 0x3FF) - (ysize & 0x03FF);
+   return ((ysize << 16) | xsize);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_video_position
+ * 
+ * This routine returns the position of the video overlay window.  The
+ * return value is (ypos << 16) | xpos.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+unsigned long
+sc1400_get_video_position(void)
+#else
+unsigned long
+gfx_get_video_position(void)
+#endif
+{
+   unsigned long hadjust, vadjust;
+   unsigned long xpos, ypos;
+
+   /* READ HARDWARE POSITION */
+
+   xpos = READ_VID32(SC1400_VIDEO_X_POS) & 0x000003FF;
+   ypos = READ_VID32(SC1400_VIDEO_Y_POS) & 0x000003FF;
+
+   /* GET ADJUSTMENT VALUES */
+   /* Use routines to abstract version of display controller. */
+
+   hadjust = gfx_get_htotal() - gfx_get_hsync_end() - 13;
+   vadjust = gfx_get_vtotal() - gfx_get_vsync_end() + 1;
+   xpos -= hadjust;
+   ypos -= vadjust;
+   return ((ypos << 16) | (xpos & 0x0000FFFF));
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_video_color_key
+ * 
+ * This routine returns the current video color key value.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+unsigned long
+sc1400_get_video_color_key(void)
+#else
+unsigned long
+gfx_get_video_color_key(void)
+#endif
+{
+   return (READ_VID32(SC1400_VIDEO_COLOR_KEY));
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_video_color_key_mask
+ * 
+ * This routine returns the current video color mask value.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+unsigned long
+sc1400_get_video_color_key_mask(void)
+#else
+unsigned long
+gfx_get_video_color_key_mask(void)
+#endif
+{
+   return (READ_VID32(SC1400_VIDEO_COLOR_MASK));
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_video_color_key_src
+ * 
+ * This routine returns 0 for video data compare, 1 for graphics data.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1400_get_video_color_key_src(void)
+#else
+int
+gfx_get_video_color_key_src(void)
+#endif
+{
+   if (READ_VID32(SC1400_DISPLAY_CONFIG) & SC1400_DCFG_VG_CK)
+      return (0);
+   return (1);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_video_filter
+ * 
+ * This routine returns if the filters are currently enabled.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1400_get_video_filter(void)
+#else
+int
+gfx_get_video_filter(void)
+#endif
+{
+   int retval = 0;
+
+   if (READ_VID32(SC1400_VIDEO_CONFIG) & SC1400_VCFG_X_FILTER_EN)
+      retval |= 1;
+   if (READ_VID32(SC1400_VIDEO_CONFIG) & SC1400_VCFG_Y_FILTER_EN)
+      retval |= 2;
+   return (retval);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_clock_frequency
+ *
+ * This routine returns the current clock frequency in 16.16 format.
+ * It reads the current register value and finds the match in the table.
+ * If no match is found, this routine returns 0.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+unsigned long
+sc1400_get_clock_frequency(void)
+#else
+unsigned long
+gfx_get_clock_frequency(void)
+#endif
+{
+   int index;
+   unsigned long value, mask;
+
+   mask = 0x007FFF0F;
+   value = READ_VID32(SC1400_VID_CLOCK_SELECT) & mask;
+   for (index = 0; index < NUM_SC1400_FREQUENCIES; index++) {
+      if ((gfx_sc1400_clock_table[index].clock_select & mask) == value)
+	 return (gfx_sc1400_clock_table[index].frequency);
+   }
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_read_crc
+ *
+ * This routine returns the hardware CRC value, which is used for automated 
+ * testing.  The value is like a checksum, but will change if pixels move
+ * locations.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+unsigned long
+sc1400_read_crc(void)
+#else
+unsigned long
+gfx_read_crc(void)
+#endif
+{
+   unsigned long crc = 0xFFFFFFFF;
+
+   if (gfx_test_timing_active()) {
+      // WAIT UNTIL ACTIVE DISPLAY
+
+      while (!gfx_test_vertical_active()) ;
+
+      // RESET CRC DURING ACTIVE DISPLAY
+
+      WRITE_VID32(SC1400_VID_CRC, 0);
+      WRITE_VID32(SC1400_VID_CRC, 1);
+
+      // WAIT UNTIL NOT ACTIVE, THEN ACTIVE, NOT ACTIVE, THEN ACTIVE
+
+      while (gfx_test_vertical_active()) ;
+      while (!gfx_test_vertical_active()) ;
+      while (gfx_test_vertical_active()) ;
+      while (!gfx_test_vertical_active()) ;
+      crc = READ_VID32(SC1400_VID_CRC) >> 8;
+   }
+   return (crc);
+}
+
+#endif /* GFX_READ_ROUTINES */
+
+/* END OF FILE */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/vid_5530.c b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/vid_5530.c
new file mode 100644
index 000000000..17d5f3b50
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/vid_5530.c
@@ -0,0 +1,1446 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/vid_5530.c,v 1.2 2003/02/21 16:51:10 alanh Exp $ */
+/*
+ * $Workfile: vid_5530.c $
+ *
+ * This file contains routines to control the CS5530 video overlay hardware.
+ *
+ * NSC_LIC_ALTERNATIVE_PREAMBLE
+ *
+ * Revision 1.0
+ *
+ * National Semiconductor Alternative GPL-BSD License
+ *
+ * National Semiconductor Corporation licenses this software 
+ * ("Software"):
+ *
+ *      Durango
+ *
+ * under one of the two following licenses, depending on how the 
+ * Software is received by the Licensee.
+ * 
+ * If this Software is received as part of the Linux Framebuffer or
+ * other GPL licensed software, then the GPL license designated 
+ * NSC_LIC_GPL applies to this Software; in all other circumstances 
+ * then the BSD-style license designated NSC_LIC_BSD shall apply.
+ *
+ * END_NSC_LIC_ALTERNATIVE_PREAMBLE */
+
+/* NSC_LIC_BSD
+ *
+ * National Semiconductor Corporation Open Source License for Durango
+ *
+ * (BSD License with Export Notice)
+ *
+ * Copyright (c) 1999-2001
+ * National Semiconductor Corporation.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met: 
+ *
+ *   * Redistributions of source code must retain the above copyright 
+ *     notice, this list of conditions and the following disclaimer. 
+ *
+ *   * Redistributions in binary form must reproduce the above 
+ *     copyright notice, this list of conditions and the following 
+ *     disclaimer in the documentation and/or other materials provided 
+ *     with the distribution. 
+ *
+ *   * Neither the name of the National Semiconductor Corporation nor 
+ *     the names of its contributors may be used to endorse or promote 
+ *     products derived from this software without specific prior 
+ *     written permission. 
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+ * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE,
+ * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE.
+ *
+ * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
+ * YOUR JURISDICTION. It is licensee's responsibility to comply with 
+ * any export regulations applicable in licensee's jurisdiction. Under 
+ * CURRENT (2001) U.S. export regulations this software 
+ * is eligible for export from the U.S. and can be downloaded by or 
+ * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
+ * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
+ * Syria, Sudan, Afghanistan and any other country to which the U.S. 
+ * has embargoed goods and services. 
+ *
+ * END_NSC_LIC_BSD */
+
+/* NSC_LIC_GPL
+ *
+ * National Semiconductor Corporation Gnu General Public License for Durango
+ *
+ * (GPL License with Export Notice)
+ *
+ * Copyright (c) 1999-2001
+ * National Semiconductor Corporation.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted under the terms of the GNU General 
+ * Public License as published by the Free Software Foundation; either 
+ * version 2 of the License, or (at your option) any later version  
+ *
+ * In addition to the terms of the GNU General Public License, neither 
+ * the name of the National Semiconductor Corporation nor the names of 
+ * its contributors may be used to endorse or promote products derived 
+ * from this software without specific prior written permission. 
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+ * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, 
+ * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE. See the GNU General Public License for more details. 
+ *
+ * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
+ * YOUR JURISDICTION. It is licensee's responsibility to comply with 
+ * any export regulations applicable in licensee's jurisdiction. Under 
+ * CURRENT (2001) U.S. export regulations this software 
+ * is eligible for export from the U.S. and can be downloaded by or 
+ * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
+ * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
+ * Syria, Sudan, Afghanistan and any other country to which the U.S. 
+ * has embargoed goods and services. 
+ *
+ * You should have received a copy of the GNU General Public License 
+ * along with this file; if not, write to the Free Software Foundation, 
+ * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 
+ *
+ * END_NSC_LIC_GPL */
+
+/*----------------------------------------------------------------------------
+ * CS5530 PLL TABLE
+ *----------------------------------------------------------------------------
+ */
+typedef struct tagCS5530PLLENTRY
+{
+   long frequency;			/* 16.16 fixed point frequency */
+   unsigned long pll_value;		/* associated register value */
+}
+CS5530PLLENTRY;
+
+CS5530PLLENTRY CS5530_PLLtable[] = {
+   {0x00192CCC, 0x31C45801,},		/*  25.1750 */
+   {0x001C526E, 0x20E36802,},		/*  28.3220 */
+   {0x001F8000, 0x33915801,},		/*  31.5000 */
+   {0x00240000, 0x31EC4801,},		/*  36.0000 */
+   {0x00258000, 0x21E22801,},		/*  37.5000 */
+   {0x00280000, 0x33088801,},		/*  40.0000 */
+   {0x002CE666, 0x33E22801,},		/*  44.9000 */
+   {0x00318000, 0x336C4801,},		/*  49.5000 */
+   {0x00320000, 0x23088801,},		/*  50.0000 */
+   {0x00325999, 0x23088801,},		/*  50.3500 */
+   {0x00360000, 0x3708A801,},		/*  54.0000 */
+   {0x00384000, 0x23E36802,},		/*  56.2500 */
+   {0x0038643F, 0x23E36802,},		/*  56.3916 */
+   {0x0038A4DD, 0x23E36802,},		/*  56.6444 */
+   {0x003B0000, 0x37C45801,},		/*  59.0000 */
+   {0x003F0000, 0x23EC4801,},		/*  63.0000 */
+   {0x00410000, 0x37911801,},		/*  65.0000 */
+   {0x00438000, 0x37963803,},		/*  67.5000 */
+   {0x0046CCCC, 0x37058803,},		/*  70.8000 */
+   {0x00480000, 0x3710C805,},		/*  72.0000 */
+   {0x004B0000, 0x37E22801,},		/*  75.0000 */
+   {0x004EC000, 0x27915801,},		/*  78.7500 */
+   {0x00500000, 0x37D8D802,},		/*  80.0000 */
+   {0x0059CCCC, 0x27588802,},		/*  89.8000 */
+   {0x005E8000, 0x27EC4802,},		/*  94.5000 */
+   {0x00630000, 0x27AC6803,},		/*  99.0000 */
+   {0x00640000, 0x27088801,},		/* 100.0000 */
+   {0x006C0000, 0x2710C805,},		/* 108.0000 */
+   {0x00708000, 0x27E36802,},		/* 112.5000 */
+   {0x00820000, 0x27C58803,},		/* 130.0000 */
+   {0x00870000, 0x27316803,},		/* 135.0000 */
+   {0x009D8000, 0x2F915801,},		/* 157.5000 */
+   {0x00A20000, 0x2F08A801,},		/* 162.0000 */
+   {0x00AF0000, 0x2FB11802,},		/* 175.0000 */
+   {0x00BD0000, 0x2FEC4802,},		/* 189.0000 */
+   {0x00CA0000, 0x2F963803,},		/* 202.0000 */
+   {0x00E80000, 0x2FB1B802,},		/* 232.0000 */
+};
+
+#define NUM_CS5530_FREQUENCIES sizeof(CS5530_PLLtable)/sizeof(CS5530PLLENTRY)
+
+int cs5530_set_video_enable(int enable);
+int cs5530_set_video_format(unsigned long format);
+int cs5530_set_video_size(unsigned short width, unsigned short height);
+int cs5530_set_video_yuv_pitch(unsigned long ypitch, unsigned long uvpitch);
+int cs5530_set_video_offset(unsigned long offset);
+int cs5530_set_video_yuv_offsets(unsigned long yoffset, unsigned long uoffset,
+				 unsigned long voffset);
+int cs5530_set_video_window(short x, short y, unsigned short w,
+			    unsigned short h);
+int cs5530_set_video_left_crop(unsigned short x);
+int cs5530_set_video_upscale(unsigned short srcw, unsigned short srch,
+			     unsigned short dstw, unsigned short dsth);
+int cs5530_set_video_scale(unsigned short srcw, unsigned short srch,
+			   unsigned short dstw, unsigned short dsth);
+int cs5530_set_video_vertical_downscale(unsigned short srch,
+					unsigned short dsth);
+void cs5530_set_video_vertical_downscale_enable(int enable);
+int cs5530_set_video_downscale_config(unsigned short type, unsigned short m);
+int cs5530_set_video_color_key(unsigned long key, unsigned long mask,
+			       int bluescreen);
+int cs5530_set_video_filter(int xfilter, int yfilter);
+int cs5530_set_video_palette(unsigned long *palette);
+int cs5530_set_video_palette_entry(unsigned long index, unsigned long color);
+int cs5530_set_video_downscale_coefficients(unsigned short coef1,
+					    unsigned short coef2,
+					    unsigned short coef3,
+					    unsigned short coef4);
+int cs5530_set_video_downscale_enable(int enable);
+int cs5530_set_video_source(VideoSourceType source);
+int cs5530_set_vbi_source(VbiSourceType source);
+int cs5530_set_vbi_lines(unsigned long even, unsigned long odd);
+int cs5530_set_vbi_total(unsigned long even, unsigned long odd);
+int cs5530_set_video_interlaced(int enable);
+int cs5530_set_color_space_YUV(int enable);
+int cs5530_set_vertical_scaler_offset(char offset);
+int cs5530_set_top_line_in_odd(int enable);
+int cs5530_set_genlock_delay(unsigned long delay);
+int cs5530_set_genlock_enable(int flags);
+int cs5530_set_video_cursor(unsigned long key, unsigned long mask,
+			    unsigned short select_color2,
+			    unsigned long color1, unsigned long color2);
+int cs5530_set_video_cursor_enable(int enable);
+int cs5530_set_video_request(short x, short y);
+
+int cs5530_select_alpha_region(int region);
+int cs5530_set_alpha_enable(int enable);
+int cs5530_set_alpha_window(short x, short y,
+			    unsigned short width, unsigned short height);
+int cs5530_set_alpha_value(unsigned char alpha, char delta);
+int cs5530_set_alpha_priority(int priority);
+int cs5530_set_alpha_color(unsigned long color);
+int cs5530_set_alpha_color_enable(int enable);
+int cs5530_set_no_ck_outside_alpha(int enable);
+int cs5530_disable_softvga(void);
+int cs5530_enable_softvga(void);
+int cs5530_set_macrovision_enable(int enable);
+int cs5530_set_crt_enable(int enable);
+void cs5530_reset_video(void);
+int cs5530_set_display_control(int sync_polarities);
+void cs5530_set_clock_frequency(unsigned long frequency);
+
+/* READ ROUTINES IN GFX_VID.C */
+
+int cs5530_get_video_enable(void);
+int cs5530_get_video_format(void);
+unsigned long cs5530_get_video_src_size(void);
+unsigned long cs5530_get_video_line_size(void);
+unsigned long cs5530_get_video_xclip(void);
+unsigned long cs5530_get_video_offset(void);
+void cs5530_get_video_yuv_offsets(unsigned long *yoffset,
+				  unsigned long *uoffset,
+				  unsigned long *voffset);
+void cs5530_get_video_yuv_pitch(unsigned long *ypitch,
+				unsigned long *uvpitch);
+unsigned long cs5530_get_video_upscale(void);
+unsigned long cs5530_get_video_scale(void);
+unsigned long cs5530_get_video_downscale_delta(void);
+int cs5530_get_video_vertical_downscale_enable(void);
+int cs5530_get_video_downscale_config(unsigned short *type,
+				      unsigned short *m);
+void cs5530_get_video_downscale_coefficients(unsigned short *coef1,
+					     unsigned short *coef2,
+					     unsigned short *coef3,
+					     unsigned short *coef4);
+void cs5530_get_video_downscale_enable(int *enable);
+unsigned long cs5530_get_video_dst_size(void);
+unsigned long cs5530_get_video_position(void);
+unsigned long cs5530_get_video_color_key(void);
+unsigned long cs5530_get_video_color_key_mask(void);
+int cs5530_get_video_palette_entry(unsigned long index,
+				   unsigned long *palette);
+int cs5530_get_video_color_key_src(void);
+int cs5530_get_video_filter(void);
+int cs5530_get_video_request(short *x, short *y);
+int cs5530_get_video_source(VideoSourceType * source);
+int cs5530_get_vbi_source(VbiSourceType * source);
+unsigned long cs5530_get_vbi_lines(int odd);
+unsigned long cs5530_get_vbi_total(int odd);
+int cs5530_get_video_interlaced(void);
+int cs5530_get_color_space_YUV(void);
+int cs5530_get_vertical_scaler_offset(char *offset);
+unsigned long cs5530_get_genlock_delay(void);
+int cs5530_get_genlock_enable(void);
+int cs5530_get_video_cursor(unsigned long *key, unsigned long *mask,
+			    unsigned short *select_color2,
+			    unsigned long *color1, unsigned short *color2);
+unsigned long cs5530_read_crc(void);
+unsigned long cs5530_read_crc32(void);
+unsigned long cs5530_read_window_crc(int source, unsigned short x,
+				     unsigned short y, unsigned short width,
+				     unsigned short height, int crc32);
+int cs5530_get_macrovision_enable(void);
+
+void cs5530_get_alpha_enable(int *enable);
+void cs5530_get_alpha_size(unsigned short *x, unsigned short *y,
+			   unsigned short *width, unsigned short *height);
+void cs5530_get_alpha_value(unsigned char *alpha, char *delta);
+void cs5530_get_alpha_priority(int *priority);
+void cs5530_get_alpha_color(unsigned long *color);
+unsigned long cs5530_get_clock_frequency(void);
+int cs5530_get_vsa2_softvga_enable(void);
+int cs5530_get_sync_polarities(void);
+
+/*---------------------------------------------------------------------------
+ * gfx_set_crt_enable
+ * 
+ * This routine enables or disables the CRT output from the video processor.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+cs5530_set_crt_enable(int enable)
+#else
+int
+gfx_set_crt_enable(int enable)
+#endif
+{
+   unsigned long config;
+
+   config = READ_VID32(CS5530_DISPLAY_CONFIG);
+
+   switch (enable) {
+   case CRT_DISABLE:			/* Disable everything */
+
+      WRITE_VID32(CS5530_DISPLAY_CONFIG,
+		  config & ~(CS5530_DCFG_DIS_EN | CS5530_DCFG_HSYNC_EN |
+			     CS5530_DCFG_VSYNC_EN | CS5530_DCFG_DAC_BL_EN |
+			     CS5530_DCFG_DAC_PWDNX));
+      break;
+
+   case CRT_ENABLE:			/* Enable CRT display, including display logic */
+
+      WRITE_VID32(CS5530_DISPLAY_CONFIG,
+		  config | CS5530_DCFG_DIS_EN | CS5530_DCFG_HSYNC_EN |
+		  CS5530_DCFG_VSYNC_EN | CS5530_DCFG_DAC_BL_EN |
+		  CS5530_DCFG_DAC_PWDNX);
+      break;
+
+   case CRT_STANDBY:			/* HSync:Off VSync:On */
+
+      WRITE_VID32(CS5530_DISPLAY_CONFIG,
+		  (config &
+		   ~(CS5530_DCFG_DIS_EN | CS5530_DCFG_HSYNC_EN |
+		     CS5530_DCFG_DAC_BL_EN | CS5530_DCFG_DAC_PWDNX))
+		  | CS5530_DCFG_VSYNC_EN);
+      break;
+
+   case CRT_SUSPEND:			/* HSync:On VSync:Off */
+
+      WRITE_VID32(CS5530_DISPLAY_CONFIG,
+		  (config &
+		   ~(CS5530_DCFG_DIS_EN | CS5530_DCFG_VSYNC_EN |
+		     CS5530_DCFG_DAC_BL_EN | CS5530_DCFG_DAC_PWDNX))
+		  | CS5530_DCFG_HSYNC_EN);
+      break;
+
+   default:
+      return (GFX_STATUS_BAD_PARAMETER);
+   }
+   return (GFX_STATUS_OK);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_reset_video (PRIVATE ROUTINE: NOT PART OF DURANGO API)
+ *
+ * This routine is used to disable all components of video overlay before
+ * performing a mode switch.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+void
+cs5530_reset_video(void)
+#else
+void
+gfx_reset_video(void)
+#endif
+{
+   gfx_set_video_enable(0);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_display_control (PRIVATE ROUTINE: NOT PART OF DURANGO API)
+ *
+ * This routine configures the display output.
+ *
+ * "sync_polarities" is used to set the polarities of the sync pulses according
+ * to the following mask:
+ *
+ *     Bit 0: If set to 1, negative horizontal polarity is programmed,
+ *            otherwise positive horizontal polarity is programmed.
+ *     Bit 1: If set to 1, negative vertical polarity is programmed,
+ *            otherwise positive vertical polarity is programmed.
+ *
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+cs5530_set_display_control(int sync_polarities)
+#else
+int
+gfx_set_display_control(int sync_polarities)
+#endif
+{
+   unsigned long dcfg;
+
+   /* ENABLE DISPLAY OUTPUT FROM CX5530 */
+
+   dcfg = READ_VID32(CS5530_DISPLAY_CONFIG);
+
+   /* CLEAR RELEVANT FIELDS */
+
+   dcfg &= ~(CS5530_DCFG_CRT_SYNC_SKW_MASK | CS5530_DCFG_PWR_SEQ_DLY_MASK |
+	     CS5530_DCFG_CRT_HSYNC_POL | CS5530_DCFG_CRT_VSYNC_POL |
+	     CS5530_DCFG_FP_PWR_EN | CS5530_DCFG_FP_DATA_EN);
+
+   /* INITIALIZATION */
+
+   dcfg |= (CS5530_DCFG_CRT_SYNC_SKW_INIT |
+	    CS5530_DCFG_PWR_SEQ_DLY_INIT | CS5530_DCFG_GV_PAL_BYP);
+
+   if (PanelEnable) {
+      dcfg |= CS5530_DCFG_FP_PWR_EN;
+      dcfg |= CS5530_DCFG_FP_DATA_EN;
+   }
+
+   /* SET APPROPRIATE SYNC POLARITIES */
+
+   if (sync_polarities & 1)
+      dcfg |= CS5530_DCFG_CRT_HSYNC_POL;
+   if (sync_polarities & 2)
+      dcfg |= CS5530_DCFG_CRT_VSYNC_POL;
+
+   WRITE_VID32(CS5530_DISPLAY_CONFIG, dcfg);
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_clock_frequency
+ *
+ * This routine sets the clock frequency, specified as a 16.16 fixed point
+ * value (0x00318000 = 49.5 MHz).  It will set the closest frequency found
+ * in the lookup table.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+void
+cs5530_set_clock_frequency(unsigned long frequency)
+#else
+void
+gfx_set_clock_frequency(unsigned long frequency)
+#endif
+{
+   unsigned int index;
+   unsigned long value;
+   long min, diff;
+
+   /* FIND THE REGISTER VALUES FOR THE DESIRED FREQUENCY */
+   /* Search the table for the closest frequency (16.16 format). */
+
+   value = CS5530_PLLtable[0].pll_value;
+   min = (long)CS5530_PLLtable[0].frequency - frequency;
+   if (min < 0L)
+      min = -min;
+   for (index = 1; index < NUM_CS5530_FREQUENCIES; index++) {
+      diff = (long)CS5530_PLLtable[index].frequency - frequency;
+      if (diff < 0L)
+	 diff = -diff;
+      if (diff < min) {
+	 min = diff;
+	 value = CS5530_PLLtable[index].pll_value;
+      }
+   }
+
+   /* SET THE DOT CLOCK REGISTER */
+
+   WRITE_VID32(CS5530_DOT_CLK_CONFIG, value);
+   WRITE_VID32(CS5530_DOT_CLK_CONFIG, value | 0x80000100);	/* set reset/bypass */
+   gfx_delay_milliseconds(1);		/* wait for PLL to settle */
+   WRITE_VID32(CS5530_DOT_CLK_CONFIG, value & 0x7FFFFFFF);	/* clear reset */
+   WRITE_VID32(CS5530_DOT_CLK_CONFIG, value & 0x7FFFFEFF);	/* clear bypass */
+   return;
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_video_enable
+ *
+ * This routine enables or disables the video overlay functionality.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+cs5530_set_video_enable(int enable)
+#else
+int
+gfx_set_video_enable(int enable)
+#endif
+{
+   unsigned long vcfg;
+
+   /* WAIT FOR VERTICAL BLANK TO START */
+   /* Otherwise a glitch can be observed. */
+
+   if (gfx_test_timing_active()) {
+      if (!gfx_test_vertical_active()) {
+	 while (!gfx_test_vertical_active()) ;
+      }
+      while (gfx_test_vertical_active()) ;
+   }
+   vcfg = READ_VID32(CS5530_VIDEO_CONFIG);
+   if (enable) {
+      /* ENABLE VIDEO OVERLAY FROM DISPLAY CONTROLLER */
+      /* Use private routine to abstract the display controller. */
+
+      gfx_set_display_video_enable(1);
+
+      /* SET CS5530 BUS CONTROL PARAMETERS */
+      /* Currently always high speed, 8-bit interface. */
+
+      vcfg |= CS5530_VCFG_HIGH_SPD_INT;
+      vcfg &= ~(CS5530_VCFG_EARLY_VID_RDY | CS5530_VCFG_16_BIT_EN);
+
+      /* ENABLE CS5530 VIDEO OVERLAY */
+
+      vcfg |= CS5530_VCFG_VID_EN;
+      WRITE_VID32(CS5530_VIDEO_CONFIG, vcfg);
+   } else {
+      /* DISABLE CS5530 VIDEO OVERLAY */
+
+      vcfg &= ~CS5530_VCFG_VID_EN;
+      WRITE_VID32(CS5530_VIDEO_CONFIG, vcfg);
+
+      /* DISABLE VIDEO OVERLAY FROM DISPLAY CONTROLLER */
+      /* Use private routine to abstract the display controller. */
+
+      gfx_set_display_video_enable(0);
+   }
+   return (0);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_video_format
+ *
+ * Currently only sets 4:2:0 format, Y1 V Y0 U.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+cs5530_set_video_format(unsigned long format)
+#else
+int
+gfx_set_video_format(unsigned long format)
+#endif
+{
+   unsigned long vcfg = 0;
+
+   /* SET THE CS5530 VIDEO INPUT FORMAT */
+
+   vcfg = READ_VID32(CS5530_VIDEO_CONFIG);
+   vcfg &= ~(CS5530_VCFG_VID_INP_FORMAT | CS5530_VCFG_4_2_0_MODE);
+   vcfg &= ~(CS5530_VCFG_CSC_BYPASS);
+   vcfg &= ~(CS5530_VCFG_GV_SEL);
+
+   if (format < 4)
+      vcfg |= (format << 2);
+   else {
+      if (format == VIDEO_FORMAT_Y0Y1Y2Y3) {
+	 vcfg |= CS5530_VCFG_4_2_0_MODE;
+	 vcfg |= 1 << 2;
+      }
+      if (format == VIDEO_FORMAT_RGB) {
+	 vcfg |= CS5530_VCFG_CSC_BYPASS;
+	 vcfg |= CS5530_VCFG_GV_SEL;
+      }
+   }
+
+   WRITE_VID32(CS5530_VIDEO_CONFIG, vcfg);
+   return (0);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_video_size
+ *
+ * This routine specifies the size of the source data.  It is used only 
+ * to determine how much data to transfer per frame, and is not used to 
+ * calculate the scaling value (that is handled by a separate routine).
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+cs5530_set_video_size(unsigned short width, unsigned short height)
+#else
+int
+gfx_set_video_size(unsigned short width, unsigned short height)
+#endif
+{
+   unsigned long size, vcfg;
+
+   /* SET THE CS5530 VIDEO LINE SIZE */
+
+   vcfg = READ_VID32(CS5530_VIDEO_CONFIG);
+   vcfg &= ~(CS5530_VCFG_LINE_SIZE_LOWER_MASK | CS5530_VCFG_LINE_SIZE_UPPER);
+   size = (width >> 1);
+   vcfg |= (size & 0x00FF) << 8;
+   if (size & 0x0100)
+      vcfg |= CS5530_VCFG_LINE_SIZE_UPPER;
+   WRITE_VID32(CS5530_VIDEO_CONFIG, vcfg);
+
+   /* SET TOTAL VIDEO BUFFER SIZE IN DISPLAY CONTROLLER */
+   /* Use private routine to abstract the display controller. */
+
+   gfx_set_display_video_size(width, height);
+   return (0);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_video_offset
+ *
+ * This routine sets the starting offset for the video buffer when only 
+ * one offset needs to be specified.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+cs5530_set_video_offset(unsigned long offset)
+#else
+int
+gfx_set_video_offset(unsigned long offset)
+#endif
+{
+   /* SAVE VALUE FOR FUTURE CLIPPING OF THE TOP OF THE VIDEO WINDOW */
+
+   gfx_vid_offset = offset;
+
+   /* SET VIDEO BUFFER OFFSET IN DISPLAY CONTROLLER */
+   /* Use private routine to abstract the display controller. */
+
+   gfx_set_display_video_offset(offset);
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_video_scale
+ * 
+ * This routine sets the scale factor for the video overlay window.  The 
+ * size of the source and destination regions are specified in pixels.  
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+cs5530_set_video_scale(unsigned short srcw, unsigned short srch,
+		       unsigned short dstw, unsigned short dsth)
+#else
+int
+gfx_set_video_scale(unsigned short srcw, unsigned short srch,
+		    unsigned short dstw, unsigned short dsth)
+#endif
+{
+   unsigned long xscale, yscale;
+
+   /* SAVE PARAMETERS */
+   /* These are needed for clipping the video window later. */
+
+   gfx_vid_srcw = srcw;
+   gfx_vid_srch = srch;
+   gfx_vid_dstw = dstw;
+   gfx_vid_dsth = dsth;
+
+   /* CALCULATE CS5530 SCALE FACTORS */
+   /* No downscaling in CS5530 so force to 1x if attempted. */
+
+   if (dstw <= srcw)
+      xscale = 0x1FFF;
+   else if (dstw == 1 || srcw == 1)
+      return GFX_STATUS_BAD_PARAMETER;
+   else
+      xscale = (0x2000l * (srcw - 1l)) / (dstw - 1l);
+   if (dsth <= srch)
+      yscale = 0x1FFF;
+   else if (dsth == 1 || srch == 1)
+      return GFX_STATUS_BAD_PARAMETER;
+   else
+      yscale = (0x2000l * (srch - 1l)) / (dsth - 1l);
+   WRITE_VID32(CS5530_VIDEO_SCALE, (yscale << 16) | xscale);
+
+   /* CALL ROUTINE TO UPDATE WINDOW POSITION */
+   /* This is required because the scale values effect the number of */
+   /* source data pixels that need to be clipped, as well as the */
+   /* amount of data that needs to be transferred. */
+
+   gfx_set_video_window(gfx_vid_xpos, gfx_vid_ypos, gfx_vid_width,
+			gfx_vid_height);
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_video_window
+ * 
+ * This routine sets the position and size of the video overlay window.  The 
+ * position is specified in screen relative coordinates, and may be negative.  
+ * The size of destination region is specified in pixels.  The line size
+ * indicates the number of bytes of source data per scanline.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+cs5530_set_video_window(short x, short y, unsigned short w, unsigned short h)
+#else
+int
+gfx_set_video_window(short x, short y, unsigned short w, unsigned short h)
+#endif
+{
+   unsigned long vcfg = 0;
+   unsigned long hadjust, vadjust;
+   unsigned long xstart, ystart, xend, yend;
+
+   /* SAVE PARAMETERS */
+   /* These are needed to call this routine if the scale value changes. */
+
+   gfx_vid_xpos = x;
+   gfx_vid_ypos = y;
+   gfx_vid_width = w;
+   gfx_vid_height = h;
+
+   /* GET ADJUSTMENT VALUES */
+   /* Use routines to abstract version of display controller. */
+
+   hadjust = gfx_get_htotal() - gfx_get_hsync_end() - 13l;
+   vadjust = gfx_get_vtotal() - gfx_get_vsync_end() + 1l;
+
+   /* HORIZONTAL START */
+   xstart = (unsigned long)x + hadjust;
+
+   /* HORIZONTAL END */
+   /* End positions in register are non-inclusive (one more than the actual end) */
+
+   if ((x + w) < gfx_get_hactive())
+      xend = (unsigned long)x + (unsigned long)w + hadjust;
+   else					/* right clipping needed */
+      xend = (unsigned long)gfx_get_hactive() + hadjust;
+
+   /* VERTICAL START */
+
+   ystart = (unsigned long)y + vadjust;
+
+   /* VERTICAL END */
+
+   if ((y + h) < gfx_get_vactive())
+      yend = (unsigned long)y + (unsigned long)h + vadjust;
+   else					/* bottom clipping needed */
+      yend = (unsigned long)gfx_get_vactive() + vadjust;
+
+   /* DISABLE REGISTER UPDATES */
+
+   vcfg = READ_VID32(CS5530_VIDEO_CONFIG);
+   vcfg &= ~CS5530_VCFG_VID_REG_UPDATE;
+   WRITE_VID32(CS5530_VIDEO_CONFIG, vcfg);
+
+   /* SET VIDEO POSITION */
+
+   WRITE_VID32(CS5530_VIDEO_X_POS, (xend << 16) | xstart);
+   WRITE_VID32(CS5530_VIDEO_Y_POS, (yend << 16) | ystart);
+
+   vcfg |= CS5530_VCFG_VID_REG_UPDATE;
+   WRITE_VID32(CS5530_VIDEO_CONFIG, vcfg);
+
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_video_left_crop
+ * 
+ * This routine sets the number of pixels which will be cropped from the
+ * beginning of each video line. The video window will begin to display only
+ * from the pixel following the cropped pixels, and the cropped pixels
+ * will be ignored.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+cs5530_set_video_left_crop(unsigned short x)
+#else
+int
+gfx_set_video_left_crop(unsigned short x)
+#endif
+{
+   unsigned long vcfg, initread;
+
+   /* CLIPPING ON LEFT */
+   /* Adjust initial read for scale, checking for divide by zero */
+
+   if (gfx_vid_dstw)
+      initread = (unsigned long)x *gfx_vid_srcw / gfx_vid_dstw;
+
+   else
+      initread = 0;
+
+   /* SET INITIAL READ ADDRESS AND ENABLE REGISTER UPDATES */
+
+   vcfg = READ_VID32(CS5530_VIDEO_CONFIG);
+   vcfg &= ~CS5530_VCFG_INIT_READ_MASK;
+   vcfg |= (initread << 15) & CS5530_VCFG_INIT_READ_MASK;
+   vcfg |= CS5530_VCFG_VID_REG_UPDATE;
+   WRITE_VID32(CS5530_VIDEO_CONFIG, vcfg);
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_video_color_key
+ * 
+ * This routine specifies the color key value and mask for the video overlay
+ * hardware.  To disable color key, the color and mask should both be set to 
+ * zero.  The hardware uses the color key in the following equation:
+ *
+ * ((source data) & (color key mask)) == ((color key) & (color key mask))
+ *
+ * The source data can be either graphics data or video data.  The bluescreen
+ * parameter is set to have the hardware compare video data and clear to
+ * comapare graphics data.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+cs5530_set_video_color_key(unsigned long key, unsigned long mask,
+			   int graphics)
+#else
+int
+gfx_set_video_color_key(unsigned long key, unsigned long mask, int graphics)
+#endif
+{
+   unsigned long dcfg = 0;
+
+   /* SET CS5530 COLOR KEY VALUE */
+
+   WRITE_VID32(CS5530_VIDEO_COLOR_KEY, key);
+   WRITE_VID32(CS5530_VIDEO_COLOR_MASK, mask);
+
+   /* SELECT GRAPHICS OR VIDEO DATA TO COMPARE TO THE COLOR KEY */
+
+   dcfg = READ_VID32(CS5530_DISPLAY_CONFIG);
+   if (graphics & 0x01)
+      dcfg &= ~CS5530_DCFG_VG_CK;
+   else
+      dcfg |= CS5530_DCFG_VG_CK;
+   WRITE_VID32(CS5530_DISPLAY_CONFIG, dcfg);
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_video_filter
+ * 
+ * This routine enables or disables the video overlay filters.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+cs5530_set_video_filter(int xfilter, int yfilter)
+#else
+int
+gfx_set_video_filter(int xfilter, int yfilter)
+#endif
+{
+   unsigned long vcfg = 0;
+
+   /* ENABLE OR DISABLE CS5530 VIDEO OVERLAY FILTERS */
+
+   vcfg = READ_VID32(CS5530_VIDEO_CONFIG);
+   vcfg &= ~(CS5530_VCFG_X_FILTER_EN | CS5530_VCFG_Y_FILTER_EN);
+   if (xfilter)
+      vcfg |= CS5530_VCFG_X_FILTER_EN;
+   if (yfilter)
+      vcfg |= CS5530_VCFG_Y_FILTER_EN;
+   WRITE_VID32(CS5530_VIDEO_CONFIG, vcfg);
+
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_video_palette
+ * 
+ * This routine loads the video hardware palette.  If a NULL pointer is 
+ * specified, the palette is bypassed (for CS5530, this means loading the 
+ * palette with identity values). 
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+cs5530_set_video_palette(unsigned long *palette)
+#else
+int
+gfx_set_video_palette(unsigned long *palette)
+#endif
+{
+   unsigned long i, entry;
+
+   /* LOAD CS5530 VIDEO PALETTE */
+
+   WRITE_VID32(CS5530_PALETTE_ADDRESS, 0);
+   for (i = 0; i < 256; i++) {
+      if (palette)
+	 entry = palette[i];
+      else
+	 entry = i | (i << 8) | (i << 16);
+      WRITE_VID32(CS5530_PALETTE_DATA, entry);
+   }
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_video_palette_entry
+ * 
+ * This routine loads a single entry of the video hardware palette.  
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+cs5530_set_video_palette_entry(unsigned long index, unsigned long palette)
+#else
+int
+gfx_set_video_palette_entry(unsigned long index, unsigned long palette)
+#endif
+{
+   if (index > 0xFF)
+      return GFX_STATUS_BAD_PARAMETER;
+
+   /* SET A SINGLE ENTRY */
+
+   WRITE_VID32(CS5530_PALETTE_ADDRESS, index);
+   WRITE_VID32(CS5530_PALETTE_DATA, palette);
+
+   return (0);
+}
+
+#define CX55xx_VIDEO_PCI_44 0x80009444
+
+/*---------------------------------------------------------------------------
+ * gfx_disable_softvga
+ * 
+ * Disables SoftVga. This function is only valid with VSA2, Returns 1 if
+ * SoftVga can be disabled; 0 if not.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+cs5530_disable_softvga(void)
+#else
+int
+gfx_disable_softvga(void)
+#endif
+{
+   unsigned long reg_val;
+
+   /* get the current value */
+   reg_val = gfx_pci_config_read(CX55xx_VIDEO_PCI_44);
+   /* setting video PCI register 44 bit 0 to 1 disables SoftVga */
+   reg_val |= 0x1;
+   gfx_pci_config_write(CX55xx_VIDEO_PCI_44, reg_val);
+
+   /* see if we set the bit and return the appropriate value */
+   reg_val = gfx_pci_config_read(CX55xx_VIDEO_PCI_44);
+   if ((reg_val & 0x1) == 0x1)
+      return (1);
+   else
+      return (0);
+
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_enable_softvga
+ * 
+ * Enables SoftVga. This function is only valid with VSA2, Returns 1 if
+ * SoftVga can be enbled; 0 if not.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+cs5530_enable_softvga(void)
+#else
+int
+gfx_enable_softvga(void)
+#endif
+{
+   unsigned long reg_val;
+
+   /* get the current value */
+   reg_val = gfx_pci_config_read(CX55xx_VIDEO_PCI_44);
+   /* clearing video PCI register 44 bit 0 enables SoftVga */
+   gfx_pci_config_write(CX55xx_VIDEO_PCI_44, reg_val & 0xfffffffe);
+
+   /* see if we cleared the bit and return the appropriate value */
+   reg_val = gfx_pci_config_read(CX55xx_VIDEO_PCI_44);
+   if ((reg_val & 0x1) == 0)
+      return (1);
+   else
+      return (0);
+
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_clock_frequency
+ *
+ * This routine returns the current clock frequency in 16.16 format.
+ * It reads the current register value and finds the match in the table.
+ * If no match is found, this routine returns 0.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+unsigned long
+cs5530_get_clock_frequency(void)
+#else
+unsigned long
+gfx_get_clock_frequency(void)
+#endif
+{
+   unsigned int index;
+   unsigned long value, mask;
+
+   mask = 0x7FFFFEDC;
+   value = READ_VID32(CS5530_DOT_CLK_CONFIG) & mask;
+   for (index = 0; index < NUM_CS5530_FREQUENCIES; index++) {
+      if ((CS5530_PLLtable[index].pll_value & mask) == value)
+	 return (CS5530_PLLtable[index].frequency);
+   }
+   return (0);
+}
+
+/*************************************************************/
+/*  READ ROUTINES  |  INCLUDED FOR DIAGNOSTIC PURPOSES ONLY  */
+/*************************************************************/
+
+#if GFX_READ_ROUTINES
+
+/*---------------------------------------------------------------------------
+ * gfx_get_vsa2_softvga_enable
+ * 
+ * This function returns the enable status of SoftVGA.  It is valid
+ * only if VSAII is present.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+cs5530_get_vsa2_softvga_enable(void)
+#else
+int
+gfx_get_vsa2_softvga_enable(void)
+#endif
+{
+   unsigned long reg_val;
+
+   reg_val = gfx_pci_config_read(CX55xx_VIDEO_PCI_44);
+   if ((reg_val & 0x1) == 0)
+      return (1);
+   else
+      return (0);
+
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_sync_polarities
+ *
+ * This routine returns the polarities of the sync pulses:
+ *     Bit 0: Set if negative horizontal polarity.
+ *     Bit 1: Set if negative vertical polarity.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+cs5530_get_sync_polarities(void)
+#else
+int
+gfx_get_sync_polarities(void)
+#endif
+{
+   int polarities = 0;
+
+   if (READ_VID32(CS5530_DISPLAY_CONFIG) & 0x00000100)
+      polarities |= 1;
+   if (READ_VID32(CS5530_DISPLAY_CONFIG) & 0x00000200)
+      polarities |= 2;
+   return (polarities);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_video_palette_entry
+ *
+ * This routine returns a single palette entry.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+cs5530_get_video_palette_entry(unsigned long index, unsigned long *palette)
+#else
+int
+gfx_get_video_palette_entry(unsigned long index, unsigned long *palette)
+#endif
+{
+   if (index > 0xFF)
+      return GFX_STATUS_BAD_PARAMETER;
+
+   /* READ A SINGLE ENTRY */
+
+   WRITE_VID32(CS5530_PALETTE_ADDRESS, index);
+   *palette = READ_VID32(CS5530_PALETTE_DATA);
+
+   return (GFX_STATUS_OK);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_video_enable
+ *
+ * This routine returns the value "one" if video overlay is currently enabled,
+ * otherwise it returns the value "zero".
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+cs5530_get_video_enable(void)
+#else
+int
+gfx_get_video_enable(void)
+#endif
+{
+   if (READ_VID32(CS5530_VIDEO_CONFIG) & CS5530_VCFG_VID_EN)
+      return (1);
+   return (0);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_video_format
+ *
+ * This routine returns the current video overlay format.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+cs5530_get_video_format(void)
+#else
+int
+gfx_get_video_format(void)
+#endif
+{
+   unsigned long vcfg;
+
+   vcfg = READ_VID32(CS5530_VIDEO_CONFIG);
+   if (vcfg & CS5530_VCFG_CSC_BYPASS)
+      return (VIDEO_FORMAT_RGB);
+   if (vcfg & CS5530_VCFG_4_2_0_MODE)
+      return (VIDEO_FORMAT_Y0Y1Y2Y3);
+
+   return ((int)((vcfg >> 2) & 3));
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_video_src_size
+ *
+ * This routine returns the size of the source video overlay buffer.  The 
+ * return value is (height << 16) | width.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+unsigned long
+cs5530_get_video_src_size(void)
+#else
+unsigned long
+gfx_get_video_src_size(void)
+#endif
+{
+   unsigned long width = 0, height = 0;
+
+   /* DETERMINE SOURCE WIDTH FROM THE CS5530 VIDEO LINE SIZE */
+
+   width = (READ_VID32(CS5530_VIDEO_CONFIG) >> 7) & 0x000001FE;
+   if (READ_VID32(CS5530_VIDEO_CONFIG) & CS5530_VCFG_LINE_SIZE_UPPER)
+      width += 512l;
+
+   if (width) {
+      /* DETERMINE HEIGHT BY DIVIDING TOTAL SIZE BY WIDTH */
+      /* Get total size from display controller - abtracted. */
+
+      height = gfx_get_display_video_size() / (width << 1);
+   }
+   return ((height << 16) | width);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_video_line_size
+ *
+ * This routine returns the line size of the source video overlay buffer, in 
+ * pixels.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+unsigned long
+cs5530_get_video_line_size(void)
+#else
+unsigned long
+gfx_get_video_line_size(void)
+#endif
+{
+   unsigned long width = 0;
+
+   /* DETERMINE SOURCE WIDTH FROM THE CS5530 VIDEO LINE SIZE */
+
+   width = (READ_VID32(CS5530_VIDEO_CONFIG) >> 7) & 0x000001FE;
+   if (READ_VID32(CS5530_VIDEO_CONFIG) & CS5530_VCFG_LINE_SIZE_UPPER)
+      width += 512l;
+   return (width);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_video_xclip
+ *
+ * This routine returns the number of bytes clipped on the left side of a 
+ * video overlay line (skipped at beginning).
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+unsigned long
+cs5530_get_video_xclip(void)
+#else
+unsigned long
+gfx_get_video_xclip(void)
+#endif
+{
+   unsigned long clip = 0;
+
+   /* DETERMINE SOURCE WIDTH FROM THE CS5530 VIDEO LINE SIZE */
+
+   clip = (READ_VID32(CS5530_VIDEO_CONFIG) >> 14) & 0x000007FC;
+   return (clip);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_video_offset
+ *
+ * This routine returns the current offset for the video overlay buffer.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+unsigned long
+cs5530_get_video_offset(void)
+#else
+unsigned long
+gfx_get_video_offset(void)
+#endif
+{
+   return (gfx_get_display_video_offset());
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_video_scale
+ * 
+ * This routine returns the scale factor for the video overlay window.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+unsigned long
+cs5530_get_video_scale(void)
+#else
+unsigned long
+gfx_get_video_scale(void)
+#endif
+{
+   return (READ_VID32(CS5530_VIDEO_SCALE));
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_video_dst_size
+ * 
+ * This routine returns the size of the displayed video overlay window.
+ * NOTE: This is the displayed window size, which may be different from 
+ * the real window size if clipped.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+unsigned long
+cs5530_get_video_dst_size(void)
+#else
+unsigned long
+gfx_get_video_dst_size(void)
+#endif
+{
+   unsigned long xsize, ysize;
+
+   xsize = READ_VID32(CS5530_VIDEO_X_POS);
+   xsize = ((xsize >> 16) & 0x7FF) - (xsize & 0x07FF);
+   ysize = READ_VID32(CS5530_VIDEO_Y_POS);
+   ysize = ((ysize >> 16) & 0x7FF) - (ysize & 0x07FF);
+   return ((ysize << 16) | xsize);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_video_position
+ * 
+ * This routine returns the position of the video overlay window.  The
+ * return value is (ypos << 16) | xpos.
+ * NOTE: This is the displayed window position, which may be different from 
+ * the real window position if clipped.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+unsigned long
+cs5530_get_video_position(void)
+#else
+unsigned long
+gfx_get_video_position(void)
+#endif
+{
+   unsigned long hadjust, vadjust;
+   unsigned long xpos, ypos;
+
+   /* READ HARDWARE POSITION */
+
+   xpos = READ_VID32(CS5530_VIDEO_X_POS) & 0x000007FF;
+   ypos = READ_VID32(CS5530_VIDEO_Y_POS) & 0x000007FF;
+
+   /* GET ADJUSTMENT VALUES */
+   /* Use routines to abstract version of display controller. */
+
+   hadjust = gfx_get_htotal() - gfx_get_hsync_end() - 13l;
+   vadjust = gfx_get_vtotal() - gfx_get_vsync_end() + 1l;
+   xpos -= hadjust;
+   ypos -= vadjust;
+   return ((ypos << 16) | (xpos & 0x0000FFFF));
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_video_color_key
+ * 
+ * This routine returns the current video color key value.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+unsigned long
+cs5530_get_video_color_key(void)
+#else
+unsigned long
+gfx_get_video_color_key(void)
+#endif
+{
+   return (READ_VID32(CS5530_VIDEO_COLOR_KEY));
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_video_color_key_mask
+ * 
+ * This routine returns the current video color mask value.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+unsigned long
+cs5530_get_video_color_key_mask(void)
+#else
+unsigned long
+gfx_get_video_color_key_mask(void)
+#endif
+{
+   return (READ_VID32(CS5530_VIDEO_COLOR_MASK));
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_video_color_key_src
+ * 
+ * This routine returns 0 for video data compare, 1 for graphics data.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+cs5530_get_video_color_key_src(void)
+#else
+int
+gfx_get_video_color_key_src(void)
+#endif
+{
+   if (READ_VID32(CS5530_DISPLAY_CONFIG) & CS5530_DCFG_VG_CK)
+      return (0);
+   return (1);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_video_filter
+ * 
+ * This routine returns if the filters are currently enabled.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+cs5530_get_video_filter(void)
+#else
+int
+gfx_get_video_filter(void)
+#endif
+{
+   int retval = 0;
+
+   if (READ_VID32(CS5530_VIDEO_CONFIG) & CS5530_VCFG_X_FILTER_EN)
+      retval |= 1;
+   if (READ_VID32(CS5530_VIDEO_CONFIG) & CS5530_VCFG_Y_FILTER_EN)
+      retval |= 2;
+   return (retval);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_read_crc
+ *
+ * This routine returns the hardware CRC value, which is used for automated 
+ * testing.  The value is like a checksum, but will change if pixels move
+ * locations.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+unsigned long
+cs5530_read_crc(void)
+#else
+unsigned long
+gfx_read_crc(void)
+#endif
+{
+   unsigned long crc = 0xFFFFFFFF;
+
+   if (gfx_test_timing_active()) {
+      /* WAIT UNTIL ACTIVE DISPLAY */
+
+      while (!gfx_test_vertical_active()) ;
+
+      /* RESET CRC DURING ACTIVE DISPLAY */
+
+      WRITE_VID32(CS5530_CRCSIG_TFT_TV, 0);
+      WRITE_VID32(CS5530_CRCSIG_TFT_TV, 1);
+
+      /* WAIT UNTIL NOT ACTIVE, THEN ACTIVE, NOT ACTIVE, THEN ACTIVE */
+
+      while (gfx_test_vertical_active()) ;
+      while (!gfx_test_vertical_active()) ;
+      while (gfx_test_vertical_active()) ;
+      while (!gfx_test_vertical_active()) ;
+      crc = READ_VID32(CS5530_CRCSIG_TFT_TV) >> 8;
+   }
+   return (crc);
+}
+
+#endif /* GFX_READ_ROUTINES */
+
+/* END OF FILE */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/vid_rdcl.c b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/vid_rdcl.c
new file mode 100644
index 000000000..8e429d8e1
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/vid_rdcl.c
@@ -0,0 +1,2913 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/vid_rdcl.c,v 1.3 2003/02/21 16:51:10 alanh Exp $ */
+/*
+ * $Workfile: vid_rdcl.c $
+ *
+ * This file contains routines to control the Redcloud display filter video overlay hardware.
+ *
+ * NSC_LIC_ALTERNATIVE_PREAMBLE
+ *
+ * Revision 1.0
+ *
+ * National Semiconductor Alternative GPL-BSD License
+ *
+ * National Semiconductor Corporation licenses this software 
+ * ("Software"):
+ *
+ *      Durango
+ *
+ * under one of the two following licenses, depending on how the 
+ * Software is received by the Licensee.
+ * 
+ * If this Software is received as part of the Linux Framebuffer or
+ * other GPL licensed software, then the GPL license designated 
+ * NSC_LIC_GPL applies to this Software; in all other circumstances 
+ * then the BSD-style license designated NSC_LIC_BSD shall apply.
+ *
+ * END_NSC_LIC_ALTERNATIVE_PREAMBLE */
+
+/* NSC_LIC_BSD
+ *
+ * National Semiconductor Corporation Open Source License for Durango
+ *
+ * (BSD License with Export Notice)
+ *
+ * Copyright (c) 1999-2001
+ * National Semiconductor Corporation.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met: 
+ *
+ *   * Redistributions of source code must retain the above copyright 
+ *     notice, this list of conditions and the following disclaimer. 
+ *
+ *   * Redistributions in binary form must reproduce the above 
+ *     copyright notice, this list of conditions and the following 
+ *     disclaimer in the documentation and/or other materials provided 
+ *     with the distribution. 
+ *
+ *   * Neither the name of the National Semiconductor Corporation nor 
+ *     the names of its contributors may be used to endorse or promote 
+ *     products derived from this software without specific prior 
+ *     written permission. 
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+ * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE,
+ * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE.
+ *
+ * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
+ * YOUR JURISDICTION. It is licensee's responsibility to comply with 
+ * any export regulations applicable in licensee's jurisdiction. Under 
+ * CURRENT (2001) U.S. export regulations this software 
+ * is eligible for export from the U.S. and can be downloaded by or 
+ * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
+ * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
+ * Syria, Sudan, Afghanistan and any other country to which the U.S. 
+ * has embargoed goods and services. 
+ *
+ * END_NSC_LIC_BSD */
+
+/* NSC_LIC_GPL
+ *
+ * National Semiconductor Corporation Gnu General Public License for Durango
+ *
+ * (GPL License with Export Notice)
+ *
+ * Copyright (c) 1999-2001
+ * National Semiconductor Corporation.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted under the terms of the GNU General 
+ * Public License as published by the Free Software Foundation; either 
+ * version 2 of the License, or (at your option) any later version  
+ *
+ * In addition to the terms of the GNU General Public License, neither 
+ * the name of the National Semiconductor Corporation nor the names of 
+ * its contributors may be used to endorse or promote products derived 
+ * from this software without specific prior written permission. 
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+ * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, 
+ * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE. See the GNU General Public License for more details. 
+ *
+ * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
+ * YOUR JURISDICTION. It is licensee's responsibility to comply with 
+ * any export regulations applicable in licensee's jurisdiction. Under 
+ * CURRENT (2001) U.S. export regulations this software 
+ * is eligible for export from the U.S. and can be downloaded by or 
+ * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
+ * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
+ * Syria, Sudan, Afghanistan and any other country to which the U.S. 
+ * has embargoed goods and services. 
+ *
+ * You should have received a copy of the GNU General Public License 
+ * along with this file; if not, write to the Free Software Foundation, 
+ * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 
+ *
+ * END_NSC_LIC_GPL */
+
+/* REDCLOUD PLL TABLE  */
+
+typedef struct RCDFPLL
+{
+   long frequency;			/* 16.16 fixed point frequency            */
+   unsigned long post_div3;		/* MCP Frequency dividers and multipliers */
+   unsigned long pre_mul2;
+   unsigned long pre_div2;
+   unsigned long pll_value;		/* MCP DotPLL Register Upper 32(0x0015)   */
+}
+RCDFPLLENTRY;
+
+RCDFPLLENTRY RCDF_PLLtable48MHz[] = {
+   {0x00192CCC, 0, 0, 0, 0x00000037},	/*  25.1750 */
+   {0x001C526E, 1, 1, 0, 0x00000B1A},	/*  28.3220 */
+   {0x001F8000, 1, 0, 0, 0x000002D2},	/*  31.5000 */
+   {0x00240000, 1, 1, 0, 0x00000FE2},	/*  36.0000 */
+   {0x00258000, 1, 0, 0, 0x0000057A},	/*  37.5000 */
+   {0x00280000, 1, 0, 0, 0x0000030A},	/*  40.0000 */
+   {0x002CE666, 0, 0, 0, 0x00000063},	/*  44.9000 */
+   {0x00318000, 0, 0, 0, 0x0000054B},	/*  49.5000 */
+   {0x00320000, 0, 0, 0, 0x0000026E},	/*  50.0000 */
+   {0x00325999, 0, 1, 0, 0x00000037},	/*  50.3500 */
+   {0x00360000, 1, 1, 0, 0x00000B0D},	/*  54.0000 */
+   {0x00384000, 0, 0, 0, 0x00000577},	/*  56.2500 */
+   {0x0038643F, 0, 0, 0, 0x000007F7},	/*  56.3916 */
+   {0x0038A4DD, 0, 0, 0, 0x0000057B},	/*  56.6444 */
+   {0x003B0000, 0, 1, 0, 0x00000707},	/*  59.0000 */
+   {0x003F0000, 1, 1, 0, 0x00000B39},	/*  63.0000 */
+   {0x00410000, 1, 1, 0, 0x00000B45},	/*  65.0000 */
+   {0x00438000, 1, 1, 0, 0x00000FC1},	/*  67.5000 */
+   {0x0046CCCC, 1, 0, 0, 0x00000561},	/*  70.8000 */
+   {0x00480000, 1, 0, 0, 0x000007E1},	/*  72.0000 */
+   {0x004B0000, 0, 0, 0, 0x00000052},	/*  75.0000 */
+   {0x004EC000, 0, 0, 0, 0x00000056},	/*  78.7500 */
+   {0x00500000, 1, 1, 0, 0x00000709},	/*  80.0000 */
+   {0x0059CCCC, 0, 1, 0, 0x00000262},	/*  89.8000 */
+   {0x005E8000, 0, 0, 0, 0x000002D2},	/*  94.5000 */
+   {0x00630000, 0, 1, 0, 0x00000B4A},	/*  99.0000 */
+   {0x00640000, 0, 1, 0, 0x00000036},	/* 100.0000 */
+   {0x006C0000, 0, 0, 0, 0x000007E2},	/* 108.0000 */
+   {0x00708000, 0, 0, 0, 0x000007F6},	/* 112.5000 */
+   {0x00820000, 1, 1, 0, 0x00000FB0},	/* 130.0000 */
+   {0x00870000, 1, 1, 0, 0x00000B50},	/* 135.0000 */
+   {0x009D8000, 0, 0, 0, 0x00000055},	/* 157.5000 */
+   {0x00A20000, 0, 0, 0, 0x000009C1},	/* 162.0000 */
+   {0x00AF8000, 0, 0, 0, 0x000002C1},	/* 175.5000 */
+   {0x00BD0000, 0, 0, 0, 0x000002D1},	/* 189.0000 */
+   {0x00CA8000, 0, 0, 0, 0x00000551},	/* 202.5000 */
+   {0x00E58000, 0, 0, 0, 0x0000057D},	/* 229.5000 */
+};
+
+RCDFPLLENTRY RCDF_PLLtable14MHz[] = {
+   {0x00192CCC, 0, 0, 0, 0x00000037},	/*  25.1750 */
+   {0x001C526E, 0, 0, 0, 0x00000B7B},	/*  28.3220 */
+   {0x001F8000, 0, 0, 0, 0x000004D3},	/*  31.5000 */
+   {0x00240000, 0, 0, 0, 0x00000BE3},	/*  36.0000 */
+   {0x00258000, 0, 0, 0, 0x0000074F},	/*  37.5000 */
+   {0x00280000, 0, 0, 0, 0x0000050B},	/*  40.0000 */
+   {0x002CE666, 0, 0, 0, 0x00000063},	/*  44.9000 */
+   {0x00318000, 0, 0, 0, 0x0000054B},	/*  49.5000 */
+   {0x00320000, 0, 0, 0, 0x0000026E},	/*  50.0000 */
+   {0x00325999, 0, 0, 0, 0x000007C3},	/*  50.3500 */
+   {0x00360000, 0, 0, 0, 0x000007E3},	/*  54.0000 */
+   {0x00384000, 0, 0, 0, 0x00000577},	/*  56.2500 */
+   {0x0038643F, 0, 0, 0, 0x000002FB},	/*  56.3916 */
+   {0x0038A4DD, 0, 0, 0, 0x0000057B},	/*  56.6444 */
+   {0x003B0000, 0, 0, 0, 0x0000058B},	/*  59.0000 */
+   {0x003F0000, 0, 0, 0, 0x0000095E},	/*  63.0000 */
+   {0x00410000, 0, 0, 0, 0x0000096A},	/*  65.0000 */
+   {0x00438000, 0, 0, 0, 0x00000BC2},	/*  67.5000 */
+   {0x0046CCCC, 0, 0, 0, 0x0000098A},	/*  70.8000 */
+   {0x00480000, 0, 0, 0, 0x00000BE2},	/*  72.0000 */
+   {0x004B0000, 0, 0, 0, 0x00000052},	/*  75.0000 */
+   {0x004EC000, 0, 0, 0, 0x00000056},	/*  78.7500 */
+   {0x00500000, 0, 0, 0, 0x0000050A},	/*  80.0000 */
+   {0x0059CCCC, 0, 0, 0, 0x0000078E},	/*  89.8000 */
+   {0x005E8000, 0, 0, 0, 0x000002D2},	/*  94.5000 */
+   {0x00630000, 0, 0, 0, 0x000011F6},	/*  99.0000 */
+   {0x00640000, 0, 0, 0, 0x0000054E},	/* 100.0000 */
+   {0x006C0000, 0, 0, 0, 0x000007E2},	/* 108.0000 */
+   {0x00708000, 0, 0, 0, 0x000002FA},	/* 112.5000 */
+   {0x00820000, 0, 0, 0, 0x00000BB1},	/* 130.0000 */
+   {0x00870000, 0, 0, 0, 0x00000975},	/* 135.0000 */
+   {0x009D8000, 0, 0, 0, 0x00000055},	/* 157.5000 */
+   {0x00A20000, 0, 0, 0, 0x000009C1},	/* 162.0000 */
+   {0x00AF8000, 0, 0, 0, 0x000002C1},	/* 175.5000 */
+   {0x00BD0000, 0, 0, 0, 0x00000539},	/* 189.0000 */
+   {0x00CA8000, 0, 0, 0, 0x00000551},	/* 202.5000 */
+   {0x00E58000, 0, 0, 0, 0x0000057D},	/* 229.5000 */
+};
+
+#define NUM_RCDF_FREQUENCIES sizeof(RCDF_PLLtable14MHz)/sizeof(RCDFPLLENTRY)
+
+int redcloud_set_video_enable(int enable);
+int redcloud_set_video_format(unsigned long format);
+int redcloud_set_video_size(unsigned short width, unsigned short height);
+int redcloud_set_video_yuv_pitch(unsigned long ypitch, unsigned long uvpitch);
+int redcloud_set_video_offset(unsigned long offset);
+int redcloud_set_video_yuv_offsets(unsigned long yoffset,
+				   unsigned long uoffset,
+				   unsigned long voffset);
+int redcloud_set_video_window(short x, short y, unsigned short w,
+			      unsigned short h);
+int redcloud_set_video_left_crop(unsigned short x);
+int redcloud_set_video_upscale(unsigned short srcw, unsigned short srch,
+			       unsigned short dstw, unsigned short dsth);
+int redcloud_set_video_scale(unsigned short srcw, unsigned short srch,
+			     unsigned short dstw, unsigned short dsth);
+int redcloud_set_video_vertical_downscale(unsigned short srch,
+					  unsigned short dsth);
+void redcloud_set_video_vertical_downscale_enable(int enable);
+int redcloud_set_video_downscale_config(unsigned short type,
+					unsigned short m);
+int redcloud_set_video_color_key(unsigned long key, unsigned long mask,
+				 int bluescreen);
+int redcloud_set_video_filter(int xfilter, int yfilter);
+int redcloud_set_video_palette(unsigned long *palette);
+int redcloud_set_video_palette_entry(unsigned long index,
+				     unsigned long color);
+int redcloud_set_video_downscale_coefficients(unsigned short coef1,
+					      unsigned short coef2,
+					      unsigned short coef3,
+					      unsigned short coef4);
+int redcloud_set_video_downscale_enable(int enable);
+int redcloud_set_video_source(VideoSourceType source);
+int redcloud_set_vbi_source(VbiSourceType source);
+int redcloud_set_vbi_lines(unsigned long even, unsigned long odd);
+int redcloud_set_vbi_total(unsigned long even, unsigned long odd);
+int redcloud_set_video_interlaced(int enable);
+int redcloud_set_color_space_YUV(int enable);
+int redcloud_set_vertical_scaler_offset(char offset);
+int redcloud_set_top_line_in_odd(int enable);
+int redcloud_set_genlock_delay(unsigned long delay);
+int redcloud_set_genlock_enable(int flags);
+int redcloud_set_video_cursor(unsigned long key, unsigned long mask,
+			      unsigned short select_color2,
+			      unsigned long color1, unsigned long color2);
+int redcloud_set_video_cursor_enable(int enable);
+int redcloud_set_video_request(short x, short y);
+
+int redcloud_select_alpha_region(int region);
+int redcloud_set_alpha_enable(int enable);
+int redcloud_set_alpha_window(short x, short y,
+			      unsigned short width, unsigned short height);
+int redcloud_set_alpha_value(unsigned char alpha, char delta);
+int redcloud_set_alpha_priority(int priority);
+int redcloud_set_alpha_color(unsigned long color);
+int redcloud_set_alpha_color_enable(int enable);
+int redcloud_set_no_ck_outside_alpha(int enable);
+int redcloud_disable_softvga(void);
+int redcloud_enable_softvga(void);
+int redcloud_set_macrovision_enable(int enable);
+void redcloud_reset_video(void);
+int redcloud_set_display_control(int sync_polarities);
+void redcloud_set_clock_frequency(unsigned long frequency);
+int redcloud_set_crt_enable(int enable);
+
+/* READ ROUTINES IN GFX_VID.C */
+
+int redcloud_get_video_enable(void);
+int redcloud_get_video_format(void);
+unsigned long redcloud_get_video_src_size(void);
+unsigned long redcloud_get_video_line_size(void);
+unsigned long redcloud_get_video_xclip(void);
+unsigned long redcloud_get_video_offset(void);
+void redcloud_get_video_yuv_offsets(unsigned long *yoffset,
+				    unsigned long *uoffset,
+				    unsigned long *voffset);
+void redcloud_get_video_yuv_pitch(unsigned long *ypitch,
+				  unsigned long *uvpitch);
+unsigned long redcloud_get_video_upscale(void);
+unsigned long redcloud_get_video_scale(void);
+unsigned long redcloud_get_video_downscale_delta(void);
+int redcloud_get_video_vertical_downscale_enable(void);
+int redcloud_get_video_downscale_config(unsigned short *type,
+					unsigned short *m);
+void redcloud_get_video_downscale_coefficients(unsigned short *coef1,
+					       unsigned short *coef2,
+					       unsigned short *coef3,
+					       unsigned short *coef4);
+void redcloud_get_video_downscale_enable(int *enable);
+unsigned long redcloud_get_video_dst_size(void);
+unsigned long redcloud_get_video_position(void);
+unsigned long redcloud_get_video_color_key(void);
+unsigned long redcloud_get_video_color_key_mask(void);
+int redcloud_get_video_palette_entry(unsigned long index,
+				     unsigned long *palette);
+int redcloud_get_video_color_key_src(void);
+int redcloud_get_video_filter(void);
+int redcloud_get_video_request(short *x, short *y);
+int redcloud_get_video_source(VideoSourceType * source);
+int redcloud_get_vbi_source(VbiSourceType * source);
+unsigned long redcloud_get_vbi_lines(int odd);
+unsigned long redcloud_get_vbi_total(int odd);
+int redcloud_get_video_interlaced(void);
+int redcloud_get_color_space_YUV(void);
+int redcloud_get_vertical_scaler_offset(char *offset);
+unsigned long redcloud_get_genlock_delay(void);
+int redcloud_get_genlock_enable(void);
+int redcloud_get_video_cursor(unsigned long *key, unsigned long *mask,
+			      unsigned short *select_color2,
+			      unsigned long *color1, unsigned short *color2);
+unsigned long redcloud_read_crc(void);
+unsigned long redcloud_read_crc32(void);
+unsigned long redcloud_read_window_crc(int source, unsigned short x,
+				       unsigned short y, unsigned short width,
+				       unsigned short height, int crc32);
+int redcloud_get_macrovision_enable(void);
+
+void redcloud_get_alpha_enable(int *enable);
+void redcloud_get_alpha_size(unsigned short *x, unsigned short *y,
+			     unsigned short *width, unsigned short *height);
+void redcloud_get_alpha_value(unsigned char *alpha, char *delta);
+void redcloud_get_alpha_priority(int *priority);
+void redcloud_get_alpha_color(unsigned long *color);
+unsigned long redcloud_get_clock_frequency(void);
+int redcloud_get_sync_polarities(void);
+
+/*---------------------------------------------------------------------------
+ * gfx_reset_video (PRIVATE ROUTINE: NOT PART OF DURANGO API)
+ *
+ * This routine is used to disable all components of video overlay before
+ * performing a mode switch.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+void
+redcloud_reset_video(void)
+#else
+void
+gfx_reset_video(void)
+#endif
+{
+   gfx_set_video_enable(0);
+   gfx_select_alpha_region(1);
+   gfx_set_alpha_enable(0);
+   gfx_select_alpha_region(2);
+   gfx_set_alpha_enable(0);
+
+   /* SET REGION 0 AFTER RESET */
+
+   gfx_select_alpha_region(0);
+   gfx_set_alpha_enable(0);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_display_control (PRIVATE ROUTINE: NOT PART OF DURANGO API)
+ *
+ * This routine configures the display output.
+ *
+ * "sync_polarities" is used to set the polarities of the sync pulses according
+ * to the following mask:
+ *
+ *     Bit 0: If set to 1, negative horizontal polarity is programmed,
+ *            otherwise positive horizontal polarity is programmed.
+ *     Bit 1: If set to 1, negative vertical polarity is programmed,
+ *            otherwise positive vertical polarity is programmed.
+ *
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+redcloud_set_display_control(int sync_polarities)
+#else
+int
+gfx_set_display_control(int sync_polarities)
+#endif
+{
+   unsigned long power;
+   unsigned long dcfg;
+
+   /* CONFIGURE DISPLAY OUTPUT FROM VIDEO PROCESSOR */
+
+   dcfg = READ_VID32(RCDF_DISPLAY_CONFIG);
+   dcfg &= ~(RCDF_DCFG_CRT_SYNC_SKW_MASK | RCDF_DCFG_PWR_SEQ_DLY_MASK |
+	     RCDF_DCFG_CRT_HSYNC_POL | RCDF_DCFG_CRT_VSYNC_POL |
+	     RCDF_DCFG_FP_PWR_EN | RCDF_DCFG_FP_DATA_EN);
+
+   dcfg |= (RCDF_DCFG_CRT_SYNC_SKW_INIT |
+	    RCDF_DCFG_PWR_SEQ_DLY_INIT | RCDF_DCFG_GV_PAL_BYP);
+
+   if (PanelEnable) {
+      power = READ_VID32(RCDF_POWER_MANAGEMENT);
+      power |= RCDF_PM_PANEL_POWER_ON;
+      WRITE_VID32(RCDF_POWER_MANAGEMENT, power);
+   }
+
+   /* SET APPROPRIATE SYNC POLARITIES */
+
+   if (sync_polarities & 0x1)
+      dcfg |= RCDF_DCFG_CRT_HSYNC_POL;
+   if (sync_polarities & 0x2)
+      dcfg |= RCDF_DCFG_CRT_VSYNC_POL;
+
+   WRITE_VID32(RCDF_DISPLAY_CONFIG, dcfg);
+
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_clock_frequency
+ *
+ * This routine sets the clock frequency, specified as a 16.16 fixed point
+ * value (0x00318000 = 49.5 MHz).  It will set the closest frequency found
+ * in the lookup table.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+void
+redcloud_set_clock_frequency(unsigned long frequency)
+#else
+void
+gfx_set_clock_frequency(unsigned long frequency)
+#endif
+{
+   Q_WORD msr_value;
+   unsigned int i, index = 0;
+   unsigned long value;
+   long timeout = 1000;
+   long min, diff;
+   RCDFPLLENTRY *PllTable;
+
+   /* READ PLL REFERENCE FREQUENCY */
+   /* The reference frequency of GX2 1.x is different from 2.x and above. */
+
+   if ((gfx_cpu_version & 0xFF00) >= 0x0200)
+      PllTable = RCDF_PLLtable48MHz;
+   else
+      PllTable = RCDF_PLLtable14MHz;
+
+   /* FIND THE REGISTER VALUES FOR THE DESIRED FREQUENCY */
+   /* Search the table for the closest frequency (16.16 format). */
+
+   value = PllTable[0].pll_value;
+   min = (long)PllTable[0].frequency - frequency;
+   if (min < 0L)
+      min = -min;
+   for (i = 1; i < NUM_RCDF_FREQUENCIES; i++) {
+      diff = (long)PllTable[i].frequency - frequency;
+      if (diff < 0L)
+	 diff = -diff;
+      if (diff < min) {
+	 min = diff;
+	 index = i;
+      }
+   }
+
+   /* PROGRAM THE SETTINGS WITH THE RESET BIT SET */
+   /* Clear the bypass bit to ensure that the programmed */
+   /* M, N and P values are being used.                  */
+
+   gfx_msr_read(RC_ID_MCP, MCP_DOTPLL, &msr_value);
+   msr_value.high = PllTable[index].pll_value;
+   msr_value.low |= 0x00000001;
+   msr_value.low &= ~MCP_DOTPLL_BYPASS;
+   gfx_msr_write(RC_ID_MCP, MCP_DOTPLL, &msr_value);
+
+   /* PROGRAM THE MCP DIVIDER VALUES */
+
+   gfx_msr_read(RC_ID_MCP, MCP_SYS_RSTPLL, &msr_value);
+   if (PllTable[index].post_div3)
+      msr_value.low |= MCP_DOTPOSTDIV3;
+   else
+      msr_value.low &= ~MCP_DOTPOSTDIV3;
+   if (PllTable[index].pre_div2)
+      msr_value.low |= MCP_DOTPREDIV2;
+   else
+      msr_value.low &= ~MCP_DOTPREDIV2;
+   if (PllTable[index].pre_mul2)
+      msr_value.low |= MCP_DOTPREMULT2;
+   else
+      msr_value.low &= ~MCP_DOTPREMULT2;
+   gfx_msr_write(RC_ID_MCP, MCP_SYS_RSTPLL, &msr_value);
+
+   /* CLEAR THE RESET BIT */
+
+   gfx_msr_read(RC_ID_MCP, MCP_DOTPLL, &msr_value);
+   msr_value.low &= 0xFFFFFFFE;
+   gfx_msr_write(RC_ID_MCP, MCP_DOTPLL, &msr_value);
+
+   /* WAIT FOR LOCK BIT */
+
+   do {
+      gfx_msr_read(RC_ID_MCP, MCP_DOTPLL, &msr_value);
+   } while (timeout-- && !(msr_value.low & MCP_DOTPLL_LOCK));
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_crt_enable
+ * 
+ * This routine enables or disables the CRT output from the video processor.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+redcloud_set_crt_enable(int enable)
+#else
+int
+gfx_set_crt_enable(int enable)
+#endif
+{
+   unsigned long config, misc;
+
+   config = READ_VID32(RCDF_DISPLAY_CONFIG);
+   misc = READ_VID32(RCDF_VID_MISC);
+
+   switch (enable) {
+   case CRT_DISABLE:			/* DISABLE EVERYTHING */
+
+      WRITE_VID32(RCDF_DISPLAY_CONFIG,
+		  config & ~(RCDF_DCFG_DIS_EN | RCDF_DCFG_HSYNC_EN |
+			     RCDF_DCFG_VSYNC_EN | RCDF_DCFG_DAC_BL_EN));
+      WRITE_VID32(RCDF_VID_MISC, misc | RCDF_DAC_POWER_DOWN);
+      break;
+
+   case CRT_ENABLE:			/* ENABLE CRT DISPLAY, INCLUDING DISPLAY LOGIC */
+
+      WRITE_VID32(RCDF_DISPLAY_CONFIG,
+		  config | RCDF_DCFG_DIS_EN | RCDF_DCFG_HSYNC_EN |
+		  RCDF_DCFG_VSYNC_EN | RCDF_DCFG_DAC_BL_EN);
+      WRITE_VID32(RCDF_VID_MISC,
+		  misc & ~RCDF_DAC_POWER_DOWN & ~RCDF_ANALOG_POWER_DOWN);
+      break;
+
+   case CRT_STANDBY:			/* HSYNC:OFF VSYNC:ON */
+
+      WRITE_VID32(RCDF_DISPLAY_CONFIG,
+		  (config &
+		   ~(RCDF_DCFG_DIS_EN | RCDF_DCFG_HSYNC_EN |
+		     RCDF_DCFG_DAC_BL_EN)) | RCDF_DCFG_VSYNC_EN);
+      WRITE_VID32(RCDF_VID_MISC, misc | RCDF_DAC_POWER_DOWN);
+      break;
+
+   case CRT_SUSPEND:			/* HSYNC:ON VSYNC:OFF */
+
+      WRITE_VID32(RCDF_DISPLAY_CONFIG,
+		  (config &
+		   ~(RCDF_DCFG_DIS_EN | RCDF_DCFG_VSYNC_EN |
+		     RCDF_DCFG_DAC_BL_EN)) | RCDF_DCFG_HSYNC_EN);
+      WRITE_VID32(RCDF_VID_MISC, misc | RCDF_DAC_POWER_DOWN);
+      break;
+
+   default:
+      return (GFX_STATUS_BAD_PARAMETER);
+   }
+   return (GFX_STATUS_OK);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_video_enable
+ *
+ * This routine enables or disables the video overlay functionality.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+redcloud_set_video_enable(int enable)
+#else
+int
+gfx_set_video_enable(int enable)
+#endif
+{
+   unsigned long vcfg;
+
+   /* WAIT FOR VERTICAL BLANK TO START */
+   /* Otherwise a glitch can be observed. */
+
+   if (gfx_test_timing_active()) {
+      if (!gfx_test_vertical_active()) {
+	 while (!gfx_test_vertical_active()) ;
+      }
+      while (gfx_test_vertical_active()) ;
+   }
+
+   vcfg = READ_VID32(RCDF_VIDEO_CONFIG);
+   if (enable) {
+      /* ENABLE VIDEO OVERLAY FROM DISPLAY CONTROLLER */
+      /* Use private routine to abstract the display controller. */
+
+      gfx_set_display_video_enable(1);
+
+      /* ENABLE DISPLAY FILTER VIDEO OVERLAY */
+
+      vcfg |= RCDF_VCFG_VID_EN;
+      WRITE_VID32(RCDF_VIDEO_CONFIG, vcfg);
+   } else {
+      /* DISABLE DISPLAY FILTER VIDEO OVERLAY */
+
+      vcfg &= ~RCDF_VCFG_VID_EN;
+      WRITE_VID32(RCDF_VIDEO_CONFIG, vcfg);
+
+      /* DISABLE VIDEO OVERLAY FROM DISPLAY CONTROLLER */
+      /* Use private routine to abstract the display controller. */
+
+      gfx_set_display_video_enable(0);
+   }
+   return (0);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_video_format
+ *
+ * Sets input video format type, to one of the YUV formats or to RGB.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+redcloud_set_video_format(unsigned long format)
+#else
+int
+gfx_set_video_format(unsigned long format)
+#endif
+{
+   unsigned long ctrl, vcfg = 0;
+
+   /* SET THE DISPLAY FILTER VIDEO INPUT FORMAT */
+
+   vcfg = READ_VID32(RCDF_VIDEO_CONFIG);
+   ctrl = READ_VID32(RCDF_VID_ALPHA_CONTROL);
+   ctrl &= ~(RCDF_VIDEO_INPUT_IS_RGB | RCDF_CSC_VIDEO_YUV_TO_RGB);
+   vcfg &= ~(RCDF_VCFG_VID_INP_FORMAT | RCDF_VCFG_4_2_0_MODE);
+   switch (format) {
+   case VIDEO_FORMAT_UYVY:
+      vcfg |= RCDF_VCFG_UYVY_FORMAT;
+      ctrl |= RCDF_CSC_VIDEO_YUV_TO_RGB;
+      break;
+   case VIDEO_FORMAT_YUYV:
+      vcfg |= RCDF_VCFG_YUYV_FORMAT;
+      ctrl |= RCDF_CSC_VIDEO_YUV_TO_RGB;
+      break;
+   case VIDEO_FORMAT_Y2YU:
+      vcfg |= RCDF_VCFG_Y2YU_FORMAT;
+      ctrl |= RCDF_CSC_VIDEO_YUV_TO_RGB;
+      break;
+   case VIDEO_FORMAT_YVYU:
+      vcfg |= RCDF_VCFG_YVYU_FORMAT;
+      ctrl |= RCDF_CSC_VIDEO_YUV_TO_RGB;
+      break;
+   case VIDEO_FORMAT_Y0Y1Y2Y3:
+      vcfg |= RCDF_VCFG_UYVY_FORMAT;
+      ctrl |= RCDF_CSC_VIDEO_YUV_TO_RGB;
+      vcfg |= RCDF_VCFG_4_2_0_MODE;
+      break;
+   case VIDEO_FORMAT_Y3Y2Y1Y0:
+      vcfg |= RCDF_VCFG_Y2YU_FORMAT;
+      ctrl |= RCDF_CSC_VIDEO_YUV_TO_RGB;
+      vcfg |= RCDF_VCFG_4_2_0_MODE;
+      break;
+   case VIDEO_FORMAT_Y1Y0Y3Y2:
+      vcfg |= RCDF_VCFG_YUYV_FORMAT;
+      ctrl |= RCDF_CSC_VIDEO_YUV_TO_RGB;
+      vcfg |= RCDF_VCFG_4_2_0_MODE;
+      break;
+   case VIDEO_FORMAT_Y1Y2Y3Y0:
+      vcfg |= RCDF_VCFG_YVYU_FORMAT;
+      ctrl |= RCDF_CSC_VIDEO_YUV_TO_RGB;
+      vcfg |= RCDF_VCFG_4_2_0_MODE;
+      break;
+   case VIDEO_FORMAT_RGB:
+      ctrl |= RCDF_VIDEO_INPUT_IS_RGB;
+      vcfg |= RCDF_VCFG_UYVY_FORMAT;
+      break;
+   case VIDEO_FORMAT_P2M_P2L_P1M_P1L:
+      ctrl |= RCDF_VIDEO_INPUT_IS_RGB;
+      vcfg |= RCDF_VCFG_Y2YU_FORMAT;
+      break;
+   case VIDEO_FORMAT_P1M_P1L_P2M_P2L:
+      ctrl |= RCDF_VIDEO_INPUT_IS_RGB;
+      vcfg |= RCDF_VCFG_YUYV_FORMAT;
+      break;
+   case VIDEO_FORMAT_P1M_P2L_P2M_P1L:
+      ctrl |= RCDF_VIDEO_INPUT_IS_RGB;
+      vcfg |= RCDF_VCFG_YVYU_FORMAT;
+      break;
+   default:
+      return GFX_STATUS_BAD_PARAMETER;
+   }
+   WRITE_VID32(RCDF_VIDEO_CONFIG, vcfg);
+   WRITE_VID32(RCDF_VID_ALPHA_CONTROL, ctrl);
+
+   /* SET THE VIDEO FORMAT IN THE DISPLAY CONTROLLER      */
+   /* Use private routine to abstract display controller. */
+
+   gfx_set_display_video_format(format);
+   return (0);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_video_size
+ *
+ * This routine specifies the size of the source data.  It is used only 
+ * to determine how much data to transfer per frame, and is not used to 
+ * calculate the scaling value (that is handled by a separate routine).
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+redcloud_set_video_size(unsigned short width, unsigned short height)
+#else
+int
+gfx_set_video_size(unsigned short width, unsigned short height)
+#endif
+{
+   unsigned long size, vcfg, vid_420, pitch;
+
+   /* SET THE DISPLAY FILTER VIDEO LINE SIZE                            */
+   /* Match the DC hardware alignment requirement.  The line size must  */
+   /* always be 32-byte aligned.  However, we can manage smaller        */
+   /* alignments by decreasing the pitch and clipping the video window. */
+   /* The VG will fetch extra data for each line, but the decreased     */
+   /* pitch will ensure that it always begins fetching at the start of  */
+   /* the video line.                                                   */
+
+   vcfg = READ_VID32(RCDF_VIDEO_CONFIG);
+
+   vid_420 = vcfg & RCDF_VCFG_4_2_0_MODE;
+
+   vcfg &= ~(RCDF_VCFG_LINE_SIZE_LOWER_MASK | RCDF_VCFG_LINE_SIZE_UPPER);
+
+   size = ((width >> 1) + 7) & 0xFFF8;
+   pitch = ((width << 1) + 7) & 0xFFF8;
+
+   vcfg |= (size & 0x00FF) << 8;
+   if (size & 0x0100)
+      vcfg |= RCDF_VCFG_LINE_SIZE_UPPER;
+   WRITE_VID32(RCDF_VIDEO_CONFIG, vcfg);
+
+   /* SET VIDEO BUFFER LINE SIZE IN DISPLAY CONTROLLER */
+   /* Use private routine to abstract the display controller. */
+
+   gfx_set_display_video_size(width, height);
+
+   /* SET VIDEO PITCH */
+   /* We are only maintaining legacy for 4:2:2 video formats. */
+   /* 4:2:0 video in previous chips was inadequate for most   */
+   /* common video formats.                                   */
+
+   if (!vid_420)
+      gfx_set_video_yuv_pitch(pitch, pitch << 1);
+
+   return (0);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_video_offset
+ *
+ * This routine sets the starting offset for the video buffer when only 
+ * one offset needs to be specified.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+redcloud_set_video_offset(unsigned long offset)
+#else
+int
+gfx_set_video_offset(unsigned long offset)
+#endif
+{
+   /* SAVE VALUE FOR FUTURE CLIPPING OF THE TOP OF THE VIDEO WINDOW */
+
+   gfx_vid_offset = offset;
+
+   /* SET VIDEO BUFFER OFFSET IN DISPLAY CONTROLLER */
+   /* Use private routine to abstract the display controller. */
+
+   gfx_set_display_video_offset(offset);
+   return (0);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_video_yuv_offsets
+ *
+ * This routine sets the starting offset for the video buffer when displaying 
+ * 4:2:0 video.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+redcloud_set_video_yuv_offsets(unsigned long yoffset, unsigned long uoffset,
+			       unsigned long voffset)
+#else
+int
+gfx_set_video_yuv_offsets(unsigned long yoffset, unsigned long uoffset,
+			  unsigned long voffset)
+#endif
+{
+   /* SAVE VALUE FOR FUTURE CLIPPING OF THE TOP OF THE VIDEO WINDOW */
+
+   gfx_vid_offset = yoffset;
+   gfx_vid_uoffset = uoffset;
+   gfx_vid_voffset = voffset;
+
+   /* SET VIDEO BUFFER OFFSET IN DISPLAY CONTROLLER */
+   /* Use private routine to abstract the display controller. */
+
+   gfx_set_display_video_yuv_offsets(yoffset, uoffset, voffset);
+
+   return (0);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_video_yuv_pitch
+ *
+ * This routine sets the byte offset between consecutive scanlines of YUV video data
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+redcloud_set_video_yuv_pitch(unsigned long ypitch, unsigned long uvpitch)
+#else
+int
+gfx_set_video_yuv_pitch(unsigned long ypitch, unsigned long uvpitch)
+#endif
+{
+   /* SET VIDEO PITCH IN DISPLAY CONTROLLER */
+   /* Use private routine to abstract the display controller. */
+
+   gfx_set_display_video_yuv_pitch(ypitch, uvpitch);
+
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_video_scale
+ * 
+ * This routine sets the scale factor for the video overlay window.  The 
+ * size of the source and destination regions are specified in pixels.  
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+redcloud_set_video_scale(unsigned short srcw, unsigned short srch,
+			 unsigned short dstw, unsigned short dsth)
+#else
+int
+gfx_set_video_scale(unsigned short srcw, unsigned short srch,
+		    unsigned short dstw, unsigned short dsth)
+#endif
+{
+   unsigned long xscale, yscale;
+
+   /* SAVE PARAMETERS (unless don't-care zero destination arguments are used) */
+   /* These are needed for clipping the video window later. */
+
+   if (dstw != 0) {
+      gfx_vid_srcw = srcw;
+      gfx_vid_dstw = dstw;
+   }
+   if (dsth != 0) {
+      gfx_vid_srch = srch;
+      gfx_vid_dsth = dsth;
+   }
+
+   /* CALCULATE DISPLAY FILTER SCALE FACTORS */
+   /* Zero width and height indicate don't care conditions */
+   /* Downscaling is performed in a separate function.     */
+
+   if (dstw == 0)
+      xscale = READ_VID32(RCDF_VIDEO_SCALE) & 0xffff;	/* keep previous if don't-care argument */
+   else if (dstw <= srcw)
+      xscale = 0x2000;			/* horizontal downscaling is currently done in a separate function */
+   else if ((srcw == 1) || (dstw == 1))
+      return GFX_STATUS_BAD_PARAMETER;
+   else
+      xscale = (0x2000l * (srcw - 1l)) / (dstw - 1l);
+
+   if (dsth == 0)
+      yscale = (READ_VID32(RCDF_VIDEO_SCALE) & 0xffff0000) >> 16;	/* keep previous if don't-care argument */
+   else if (dsth <= srch)
+      yscale = 0x2000;			/* vertical downscaling is handled in a separate function */
+   else if ((srch == 1) || (dsth == 1))
+      return GFX_STATUS_BAD_PARAMETER;
+   else
+      yscale = (0x2000l * (srch - 1l)) / (dsth - 1l);
+
+   WRITE_VID32(RCDF_VIDEO_SCALE, (yscale << 16) | xscale);
+
+   /* CALL ROUTINE TO UPDATE WINDOW POSITION */
+   /* This is required because the scale values affect the number of */
+   /* source data pixels that need to be clipped, as well as the     */
+   /* amount of data that needs to be transferred.                   */
+
+   gfx_set_video_window(gfx_vid_xpos, gfx_vid_ypos, gfx_vid_width,
+			gfx_vid_height);
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_video_vertical_downscale
+ * 
+ * This routine sets the vertical downscale factor for the video overlay window.  
+ * The height of the source and destination regions are specified in pixels.  
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+redcloud_set_video_vertical_downscale(unsigned short srch,
+				      unsigned short dsth)
+#else
+int
+gfx_set_video_vertical_downscale(unsigned short srch, unsigned short dsth)
+#endif
+{
+   /* SET VIDEO SCALE IN DISPLAY CONTROLLER    */
+   /* Use private routine to abstract hardware */
+
+   gfx_set_display_video_downscale(srch, dsth);
+   return 0;
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_video_vertical_downscale_enable
+ * 
+ * This routine sets the vertical downscale enable for the video overlay window.  
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+void
+redcloud_set_video_vertical_downscale_enable(int enable)
+#else
+void
+gfx_set_video_vertical_downscale_enable(int enable)
+#endif
+{
+   /* SET VIDEO SCALE IN DISPLAY CONTROLLER    */
+   /* Use private routine to abstract hardware */
+
+   gfx_set_display_video_vertical_downscale_enable(enable);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_video_downscale_config
+ * 
+ * This routine sets the downscale type and factor for the video overlay window.
+ * Note: No downscaling support for RGB565 and YUV420 video formats.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+redcloud_set_video_downscale_config(unsigned short type, unsigned short m)
+#else
+int
+gfx_set_video_downscale_config(unsigned short type, unsigned short m)
+#endif
+{
+   unsigned long downscale;
+
+   if ((m < 1) || (m > 16))
+      return GFX_STATUS_BAD_PARAMETER;
+
+   downscale = READ_VID32(RCDF_VIDEO_DOWNSCALER_CONTROL);
+   downscale &=
+	 ~(RCDF_VIDEO_DOWNSCALE_FACTOR_MASK | RCDF_VIDEO_DOWNSCALE_TYPE_MASK);
+   downscale |= ((unsigned long)(m - 1) << RCDF_VIDEO_DOWNSCALE_FACTOR_POS);
+   switch (type) {
+   case VIDEO_DOWNSCALE_KEEP_1_OF:
+      downscale |= RCDF_VIDEO_DOWNSCALE_TYPE_A;
+      break;
+   case VIDEO_DOWNSCALE_DROP_1_OF:
+      downscale |= RCDF_VIDEO_DOWNSCALE_TYPE_B;
+      break;
+   default:
+      return GFX_STATUS_BAD_PARAMETER;
+   }
+   WRITE_VID32(RCDF_VIDEO_DOWNSCALER_CONTROL, downscale);
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_video_downscale_coefficients
+ * 
+ * This routine sets the downscale filter coefficients.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+redcloud_set_video_downscale_coefficients(unsigned short coef1,
+					  unsigned short coef2,
+					  unsigned short coef3,
+					  unsigned short coef4)
+#else
+int
+gfx_set_video_downscale_coefficients(unsigned short coef1,
+				     unsigned short coef2,
+				     unsigned short coef3,
+				     unsigned short coef4)
+#endif
+{
+   if ((coef1 + coef2 + coef3 + coef4) != 16)
+      return GFX_STATUS_BAD_PARAMETER;
+
+   WRITE_VID32(RCDF_VIDEO_DOWNSCALER_COEFFICIENTS,
+	       ((unsigned long)coef1 << RCDF_VIDEO_DOWNSCALER_COEF1_POS) |
+	       ((unsigned long)coef2 << RCDF_VIDEO_DOWNSCALER_COEF2_POS) |
+	       ((unsigned long)coef3 << RCDF_VIDEO_DOWNSCALER_COEF3_POS) |
+	       ((unsigned long)coef4 << RCDF_VIDEO_DOWNSCALER_COEF4_POS));
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_video_downscale_enable
+ * 
+ * This routine enables or disables downscaling for the video overlay window.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+redcloud_set_video_downscale_enable(int enable)
+#else
+int
+gfx_set_video_downscale_enable(int enable)
+#endif
+{
+   unsigned long downscale;
+
+   downscale = READ_VID32(RCDF_VIDEO_DOWNSCALER_CONTROL);
+   if (enable)
+      downscale |= RCDF_VIDEO_DOWNSCALE_ENABLE;
+   else
+      downscale &= ~RCDF_VIDEO_DOWNSCALE_ENABLE;
+   WRITE_VID32(RCDF_VIDEO_DOWNSCALER_CONTROL, downscale);
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_video_window
+ * 
+ * This routine sets the position and size of the video overlay window.  The 
+ * x and y positions are specified in screen relative coordinates, and may be negative.  
+ * The size of destination region is specified in pixels.  The line size
+ * indicates the number of bytes of source data per scanline.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+redcloud_set_video_window(short x, short y, unsigned short w,
+			  unsigned short h)
+#else
+int
+gfx_set_video_window(short x, short y, unsigned short w, unsigned short h)
+#endif
+{
+   unsigned long hadjust, vadjust;
+   unsigned long xstart, ystart, xend, yend;
+
+   /* SAVE PARAMETERS */
+   /* These are needed to call this routine if the scale value changes. */
+
+   gfx_vid_xpos = x;
+   gfx_vid_ypos = y;
+   gfx_vid_width = w;
+   gfx_vid_height = h;
+
+   /* GET ADJUSTMENT VALUES */
+   /* Use routines to abstract version of display controller. */
+
+   hadjust = gfx_get_htotal() - gfx_get_hsync_end() - 14l;
+   vadjust = gfx_get_vtotal() - gfx_get_vsync_end() + 1l;
+
+   /* HORIZONTAL START */
+   xstart = (unsigned long)x + hadjust;
+
+   /* HORIZONTAL END */
+   /* End positions in register are non-inclusive (one more than the actual end) */
+
+   if ((x + w) < gfx_get_hactive())
+      xend = (unsigned long)x + (unsigned long)w + hadjust;
+
+   /* RIGHT-CLIPPING */
+   else
+      xend = (unsigned long)gfx_get_hactive() + hadjust;
+
+   /* VERTICAL START */
+
+   ystart = (unsigned long)y + vadjust;
+
+   /* VERTICAL END */
+
+   if ((y + h) < gfx_get_vactive())
+      yend = (unsigned long)y + (unsigned long)h + vadjust;
+
+   /* BOTTOM-CLIPPING */
+   else
+      yend = (unsigned long)gfx_get_vactive() + vadjust;
+
+   /* SET VIDEO POSITION */
+
+   WRITE_VID32(RCDF_VIDEO_X_POS, (xend << 16) | xstart);
+   WRITE_VID32(RCDF_VIDEO_Y_POS, (yend << 16) | ystart);
+
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_video_left_crop
+ * 
+ * This routine sets the number of pixels which will be cropped from the
+ * beginning of each video line. The video window will begin to display only
+ * from the pixel following the cropped pixels, and the cropped pixels
+ * will be ignored.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+redcloud_set_video_left_crop(unsigned short x)
+#else
+int
+gfx_set_video_left_crop(unsigned short x)
+#endif
+{
+   unsigned long vcfg, initread;
+
+   vcfg = READ_VID32(RCDF_VIDEO_CONFIG);
+
+   /* CLIPPING ON LEFT */
+   /* Adjust initial read for scale, checking for divide by zero. Mask the     */
+   /* lower three bits when clipping 4:2:0 video.  By masking the bits instead */
+   /* of rounding up we ensure that we always clip less than or equal to the   */
+   /* desired number of pixels.  This prevents visual artifacts from           */
+   /* over-clipping.  We mask three bits to meet the HW requirement that 4:2:0 */
+   /* clipping be 16-byte or 8-pixel aligned.                                  */
+
+   if (gfx_vid_dstw) {
+      initread = (unsigned long)x *gfx_vid_srcw / gfx_vid_dstw;
+
+      if (vcfg & RCDF_VCFG_4_2_0_MODE)
+	 initread &= 0xFFF8;
+   } else
+      initread = 0;
+
+   /* SET INITIAL READ ADDRESS */
+
+   vcfg &= ~RCDF_VCFG_INIT_READ_MASK;
+   vcfg |= (initread << 15) & RCDF_VCFG_INIT_READ_MASK;
+   WRITE_VID32(RCDF_VIDEO_CONFIG, vcfg);
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_video_color_key
+ * 
+ * This routine specifies the color key value and mask for the video overlay
+ * hardware. To disable color key, the color and mask should both be set to 
+ * zero. The hardware uses the color key in the following equation:
+ *
+ * ((source data) & (color key mask)) == ((color key) & (color key mask))
+ *
+ * If "graphics" is set to TRUE, the source data is graphics, and color key
+ * is an RGB value. If "graphics" is set to FALSE, the source data is the video,
+ * and color key is a YUV value.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+redcloud_set_video_color_key(unsigned long key, unsigned long mask,
+			     int graphics)
+#else
+int
+gfx_set_video_color_key(unsigned long key, unsigned long mask, int graphics)
+#endif
+{
+   unsigned long dcfg = 0;
+
+   /* SET RCDF COLOR KEY VALUE */
+
+   WRITE_VID32(RCDF_VIDEO_COLOR_KEY, key);
+   WRITE_VID32(RCDF_VIDEO_COLOR_MASK, mask);
+
+   /* SELECT GRAPHICS OR VIDEO DATA TO COMPARE TO THE COLOR KEY */
+
+   dcfg = READ_VID32(RCDF_DISPLAY_CONFIG);
+   if (graphics & 0x01)
+      dcfg &= ~RCDF_DCFG_VG_CK;
+   else
+      dcfg |= RCDF_DCFG_VG_CK;
+   WRITE_VID32(RCDF_DISPLAY_CONFIG, dcfg);
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_video_filter
+ * 
+ * This routine enables or disables the video overlay filters.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+redcloud_set_video_filter(int xfilter, int yfilter)
+#else
+int
+gfx_set_video_filter(int xfilter, int yfilter)
+#endif
+{
+   unsigned long vcfg = 0;
+
+   /* ENABLE OR DISABLE DISPLAY FILTER VIDEO OVERLAY FILTERS */
+
+   vcfg = READ_VID32(RCDF_VIDEO_CONFIG);
+   vcfg &= ~(RCDF_VCFG_X_FILTER_EN | RCDF_VCFG_Y_FILTER_EN);
+   if (xfilter)
+      vcfg |= RCDF_VCFG_X_FILTER_EN;
+   if (yfilter)
+      vcfg |= RCDF_VCFG_Y_FILTER_EN;
+   WRITE_VID32(RCDF_VIDEO_CONFIG, vcfg);
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_video_palette
+ * 
+ * This routine loads the video hardware palette.  If a NULL pointer is 
+ * specified, the palette is bypassed (for Redcloud, this means loading the 
+ * palette with identity values). 
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+redcloud_set_video_palette(unsigned long *palette)
+#else
+int
+gfx_set_video_palette(unsigned long *palette)
+#endif
+{
+   unsigned long i, entry;
+
+   /* LOAD REDCLOUD VIDEO PALETTE */
+
+   WRITE_VID32(RCDF_PALETTE_ADDRESS, 0);
+   for (i = 0; i < 256; i++) {
+      if (palette)
+	 entry = palette[i];
+      else
+	 entry = i | (i << 8) | (i << 16);
+      WRITE_VID32(RCDF_PALETTE_DATA, entry);
+   }
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_video_palette_entry
+ * 
+ * This routine loads a single entry of the video hardware palette.  
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+redcloud_set_video_palette_entry(unsigned long index, unsigned long palette)
+#else
+int
+gfx_set_video_palette_entry(unsigned long index, unsigned long palette)
+#endif
+{
+   if (index > 0xFF)
+      return GFX_STATUS_BAD_PARAMETER;
+
+   /* SET A SINGLE ENTRY */
+
+   WRITE_VID32(RCDF_PALETTE_ADDRESS, index);
+   WRITE_VID32(RCDF_PALETTE_DATA, palette);
+
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_video_request()
+ * 
+ * This routine sets the horizontal (pixel) and vertical (line) video request
+ * values.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+redcloud_set_video_request(short x, short y)
+#else
+int
+gfx_set_video_request(short x, short y)
+#endif
+{
+   /* SET DISPLAY FILTER VIDEO REQUEST */
+
+   x += gfx_get_htotal() - gfx_get_hsync_end() - 2;
+   y += gfx_get_vtotal() - gfx_get_vsync_end() + 1;
+
+   if ((x < 0) || (x > RCDF_VIDEO_REQUEST_MASK) ||
+       (y < 0) || (y > RCDF_VIDEO_REQUEST_MASK))
+      return GFX_STATUS_BAD_PARAMETER;
+
+   WRITE_VID32(RCDF_VIDEO_REQUEST,
+	       ((unsigned long)x << RCDF_VIDEO_X_REQUEST_POS) |
+	       ((unsigned long)y << RCDF_VIDEO_Y_REQUEST_POS));
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_video_cursor()
+ * 
+ * This routine configures the video hardware cursor.
+ * If the "mask"ed bits in the graphics pixel match "key", then either "color1"
+ * or "color2" will be used for this pixel, according to the value of bit
+ * number "select_color2" of the graphics pixel.
+ *
+ * key - 24 bit RGB value
+ * mask - 24 bit mask
+ * color1, color2 - RGB or YUV, depending on the current color space conversion
+ * select_color2 - value between 0 to 23
+ *
+ * To disable match, a "mask" and "key" value of 0xffffff should be set,
+ * because the graphics pixels incoming to the video processor have maximum 16
+ * bits set (0xF8FCF8).
+ *
+ * This feature is useful for disabling alpha blending of the cursor.
+ * Otherwise cursor image would be blurred (or completely invisible if video
+ * alpha is maximum value).
+ * Note: the cursor pixel replacements take place both inside and outside the
+ * video overlay window.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+redcloud_set_video_cursor(unsigned long key, unsigned long mask,
+			  unsigned short select_color2, unsigned long color1,
+			  unsigned long color2)
+#else
+int
+gfx_set_video_cursor(unsigned long key, unsigned long mask,
+		     unsigned short select_color2, unsigned long color1,
+		     unsigned long color2)
+#endif
+{
+   if (select_color2 > RCDF_CURSOR_COLOR_BITS)
+      return GFX_STATUS_BAD_PARAMETER;
+   key = (key & RCDF_COLOR_MASK) | ((unsigned long)select_color2 <<
+				    RCDF_CURSOR_COLOR_KEY_OFFSET_POS);
+   WRITE_VID32(RCDF_CURSOR_COLOR_KEY, key);
+   WRITE_VID32(RCDF_CURSOR_COLOR_MASK, mask);
+   WRITE_VID32(RCDF_CURSOR_COLOR_1, color1);
+   WRITE_VID32(RCDF_CURSOR_COLOR_2, color2);
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_video_cursor()
+ * 
+ * This routine configures the video hardware cursor.
+ * If the "mask"ed bits in the graphics pixel match "key", then either "color1"
+ * or "color2" will be used for this pixel, according to the value of bit
+ * number "select_color2" of the graphics pixel.
+ *
+ * key - 24 bit RGB value
+ * mask - 24 bit mask
+ * color1, color2 - RGB or YUV, depending on the current color space conversion
+ * select_color2 - value between 0 to 23
+ *
+ * To disable match, a "mask" and "key" value of 0xffffff should be set,
+ * because the graphics pixels incoming to the video processor have maximum 16
+ * bits set (0xF8FCF8).
+ *
+ * This feature is useful for disabling alpha blending of the cursor.
+ * Otherwise cursor image would be blurred (or completely invisible if video
+ * alpha is maximum value).
+ * Note: the cursor pixel replacements take place both inside and outside the
+ * video overlay window.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+redcloud_set_video_cursor_enable(int enable)
+#else
+int
+gfx_set_video_cursor_enable(int enable)
+#endif
+{
+   unsigned long temp = READ_VID32(RCDF_CURSOR_COLOR_KEY);
+
+   if (enable)
+      temp |= RCDF_CURSOR_COLOR_KEY_ENABLE;
+   else
+      temp &= ~RCDF_CURSOR_COLOR_KEY_ENABLE;
+
+   WRITE_VID32(RCDF_CURSOR_COLOR_KEY, temp);
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_alpha_enable
+ * 
+ * This routine enables or disables the currently selected alpha region.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+redcloud_set_alpha_enable(int enable)
+#else
+int
+gfx_set_alpha_enable(int enable)
+#endif
+{
+   unsigned long address = 0, value = 0;
+
+   if (gfx_alpha_select > 2)
+      return (GFX_STATUS_UNSUPPORTED);
+   address = RCDF_ALPHA_CONTROL_1 + ((unsigned long)gfx_alpha_select << 5);
+   value = READ_VID32(address);
+   if (enable)
+      value |= RCDF_ACTRL_WIN_ENABLE;
+   else
+      value &= ~(RCDF_ACTRL_WIN_ENABLE);
+   WRITE_VID32(address, value);
+   return (GFX_STATUS_OK);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_alpha_window
+ * 
+ * This routine sets the size of the currently selected alpha region.
+ * Note: "x" and "y" are signed to enable using negative values needed for
+ * implementing workarounds of hardware issues.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+redcloud_set_alpha_window(short x, short y,
+			  unsigned short width, unsigned short height)
+#else
+int
+gfx_set_alpha_window(short x, short y,
+		     unsigned short width, unsigned short height)
+#endif
+{
+   unsigned long address = 0;
+
+   /* CHECK FOR CLIPPING */
+
+   if ((x + width) > gfx_get_hactive())
+      width = gfx_get_hactive() - x;
+   if ((y + height) > gfx_get_vactive())
+      height = gfx_get_vactive() - y;
+
+   /* ADJUST POSITIONS */
+
+   x += gfx_get_htotal() - gfx_get_hsync_end() - 2;
+   y += gfx_get_vtotal() - gfx_get_vsync_end() + 1;
+
+   if (gfx_alpha_select > 2)
+      return (GFX_STATUS_UNSUPPORTED);
+   address = RCDF_ALPHA_XPOS_1 + ((unsigned long)gfx_alpha_select << 5);
+
+   /* END POSITIONS IN REGISTERS ARE NON-INCLUSIVE (ONE MORE THAN ACTUAL END) */
+
+   WRITE_VID32(address, (unsigned long)x |
+	       ((unsigned long)(x + width) << 16));
+   WRITE_VID32(address + 8, (unsigned long)y |
+	       ((unsigned long)(y + height) << 16));
+   return (GFX_STATUS_OK);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_alpha_value
+ * 
+ * This routine sets the alpha value for the currently selected alpha
+ * region.  It also specifies an increment/decrement value for fading.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+redcloud_set_alpha_value(unsigned char alpha, char delta)
+#else
+int
+gfx_set_alpha_value(unsigned char alpha, char delta)
+#endif
+{
+   unsigned long address = 0, value = 0;
+
+   if (gfx_alpha_select > 2)
+      return (GFX_STATUS_UNSUPPORTED);
+   address = RCDF_ALPHA_CONTROL_1 + ((unsigned long)gfx_alpha_select << 5);
+   value = READ_VID32(address);
+   value &= RCDF_ACTRL_WIN_ENABLE;	/* keep only enable bit */
+   value |= (unsigned long)alpha;
+   value |= (((unsigned long)delta) & 0xff) << 8;
+   value |= RCDF_ACTRL_LOAD_ALPHA;
+   WRITE_VID32(address, value);
+   return (GFX_STATUS_OK);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_alpha_priority
+ * 
+ * This routine sets the priority of the currently selected alpha region.
+ * A higher value indicates a higher priority.
+ * Note: Priority of enabled alpha windows must be different.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+redcloud_set_alpha_priority(int priority)
+#else
+int
+gfx_set_alpha_priority(int priority)
+#endif
+{
+   unsigned long pos = 0, value = 0;
+
+   if (priority > 3)
+      return (GFX_STATUS_BAD_PARAMETER);
+   if (gfx_alpha_select > 2)
+      return (GFX_STATUS_UNSUPPORTED);
+   value = READ_VID32(RCDF_VID_ALPHA_CONTROL);
+   pos = 16 + (gfx_alpha_select << 1);
+   value &= ~(0x03l << pos);
+   value |= (unsigned long)priority << pos;
+   WRITE_VID32(RCDF_VID_ALPHA_CONTROL, value);
+   return (GFX_STATUS_OK);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_alpha_color
+ * 
+ * This routine sets the color to be displayed inside the currently selected
+ * alpha window when there is a color key match (when the alpha color
+ * mechanism is enabled).
+ * "color" is an RGB value (for RGB blending) or a YUV value (for YUV blending).
+ * In Interlaced YUV blending mode, Y/2 value should be used.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+redcloud_set_alpha_color(unsigned long color)
+#else
+int
+gfx_set_alpha_color(unsigned long color)
+#endif
+{
+   unsigned long address = 0;
+
+   if (gfx_alpha_select > 2)
+      return (GFX_STATUS_UNSUPPORTED);
+   address = RCDF_ALPHA_COLOR_1 + ((unsigned long)gfx_alpha_select << 5);
+   WRITE_VID32(address, color);
+   return (GFX_STATUS_OK);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_alpha_color_enable
+ * 
+ * Enable or disable the color mechanism in the alpha window.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+redcloud_set_alpha_color_enable(int enable)
+#else
+int
+gfx_set_alpha_color_enable(int enable)
+#endif
+{
+   unsigned long color;
+   unsigned long address = 0;
+
+   if (gfx_alpha_select > 2)
+      return (GFX_STATUS_UNSUPPORTED);
+   address = RCDF_ALPHA_COLOR_1 + ((unsigned long)gfx_alpha_select << 5);
+   color = READ_VID32(address);
+   if (enable)
+      color |= RCDF_ALPHA_COLOR_ENABLE;
+   else
+      color &= ~RCDF_ALPHA_COLOR_ENABLE;
+   WRITE_VID32(address, color);
+   return (GFX_STATUS_OK);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_set_no_ck_outside_alpha
+ * 
+ * This function affects where inside the video window color key or chroma
+ * key comparison is done:
+ * If enable is TRUE, color/chroma key comparison is performed only inside
+ * the enabled alpha windows. Outside the (enabled) alpha windows, only video
+ * is displayed if color key is used, and only graphics is displayed if chroma
+ * key is used.
+ * If enable is FALSE, color/chroma key comparison is performed in all the
+ * video window area.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+redcloud_set_no_ck_outside_alpha(int enable)
+#else
+int
+gfx_set_no_ck_outside_alpha(int enable)
+#endif
+{
+   unsigned long value;
+
+   value = READ_VID32(RCDF_VID_ALPHA_CONTROL);
+   if (enable)
+      WRITE_VID32(RCDF_VID_ALPHA_CONTROL, value | RCDF_NO_CK_OUTSIDE_ALPHA);
+   else
+      WRITE_VID32(RCDF_VID_ALPHA_CONTROL, value & ~RCDF_NO_CK_OUTSIDE_ALPHA);
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_clock_frequency
+ *
+ * This routine returns the current clock frequency in 16.16 format.
+ * It reads the current register value and finds the match in the table.
+ * If no match is found, this routine returns 0.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+unsigned long
+redcloud_get_clock_frequency(void)
+#else
+unsigned long
+gfx_get_clock_frequency(void)
+#endif
+{
+   Q_WORD msr_value;
+   RCDFPLLENTRY *PLLTable;
+   unsigned int index;
+   unsigned long value, mask = 0x00001FFF;
+   unsigned long post_div3 = 0, pre_mult2 = 0;
+
+   /* READ PLL SETTING */
+
+   gfx_msr_read(RC_ID_MCP, MCP_DOTPLL, &msr_value);
+   value = msr_value.high & mask;
+
+   /* READ DIVISOR SETTINGS */
+
+   if ((gfx_cpu_version & 0xFF00) == 0x200) {
+      PLLTable = RCDF_PLLtable48MHz;
+
+      gfx_msr_read(RC_ID_MCP, MCP_SYS_RSTPLL, &msr_value);
+      post_div3 = (msr_value.low & MCP_DOTPOSTDIV3) ? 1 : 0;
+      pre_mult2 = (msr_value.low & MCP_DOTPREMULT2) ? 1 : 0;
+   } else
+      PLLTable = RCDF_PLLtable14MHz;
+
+   /* SEARCH FOR A MATCH */
+
+   for (index = 0; index < NUM_RCDF_FREQUENCIES; index++) {
+      if ((PLLTable[index].pll_value & mask) == value &&
+	  post_div3 == PLLTable[index].post_div3 &&
+	  pre_mult2 == PLLTable[index].pre_mul2)
+	 return (PLLTable[index].frequency);
+   }
+   return (0);
+}
+
+/*************************************************************/
+/*  READ ROUTINES  |  INCLUDED FOR DIAGNOSTIC PURPOSES ONLY  */
+/*************************************************************/
+
+#if GFX_READ_ROUTINES
+
+/*---------------------------------------------------------------------------
+ * gfx_get_sync_polarities
+ *
+ * This routine returns the polarities of the sync pulses:
+ *     Bit 0: Set if negative horizontal polarity.
+ *     Bit 1: Set if negative vertical polarity.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+redcloud_get_sync_polarities(void)
+#else
+int
+gfx_get_sync_polarities(void)
+#endif
+{
+   int polarities = 0;
+
+   if (READ_VID32(RCDF_DISPLAY_CONFIG) & RCDF_DCFG_CRT_HSYNC_POL)
+      polarities |= 1;
+   if (READ_VID32(RCDF_DISPLAY_CONFIG) & RCDF_DCFG_CRT_VSYNC_POL)
+      polarities |= 2;
+   return (polarities);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_video_palette_entry
+ *
+ * This routine returns a single palette entry.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+redcloud_get_video_palette_entry(unsigned long index, unsigned long *palette)
+#else
+int
+gfx_get_video_palette_entry(unsigned long index, unsigned long *palette)
+#endif
+{
+   if (index > 0xFF)
+      return GFX_STATUS_BAD_PARAMETER;
+
+   /* READ A SINGLE ENTRY */
+
+   WRITE_VID32(RCDF_PALETTE_ADDRESS, index);
+   *palette = READ_VID32(RCDF_PALETTE_DATA);
+
+   return (GFX_STATUS_OK);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_video_enable
+ *
+ * This routine returns the value "one" if video overlay is currently enabled,
+ * otherwise it returns the value "zero".
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+redcloud_get_video_enable(void)
+#else
+int
+gfx_get_video_enable(void)
+#endif
+{
+   if (READ_VID32(RCDF_VIDEO_CONFIG) & RCDF_VCFG_VID_EN)
+      return (1);
+   return (0);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_video_format
+ *
+ * This routine returns the current video overlay format.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+redcloud_get_video_format(void)
+#else
+int
+gfx_get_video_format(void)
+#endif
+{
+   unsigned long ctrl, vcfg;
+
+   ctrl = READ_VID32(RCDF_VID_ALPHA_CONTROL);
+   vcfg = READ_VID32(RCDF_VIDEO_CONFIG);
+
+   if (ctrl & RCDF_VIDEO_INPUT_IS_RGB) {
+      switch (vcfg & RCDF_VCFG_VID_INP_FORMAT) {
+      case RCDF_VCFG_UYVY_FORMAT:
+	 return VIDEO_FORMAT_RGB;
+      case RCDF_VCFG_Y2YU_FORMAT:
+	 return VIDEO_FORMAT_P2M_P2L_P1M_P1L;
+      case RCDF_VCFG_YUYV_FORMAT:
+	 return VIDEO_FORMAT_P1M_P1L_P2M_P2L;
+      case RCDF_VCFG_YVYU_FORMAT:
+	 return VIDEO_FORMAT_P1M_P2L_P2M_P1L;
+      }
+   }
+
+   if (vcfg & RCDF_VCFG_4_2_0_MODE) {
+      switch (vcfg & RCDF_VCFG_VID_INP_FORMAT) {
+      case RCDF_VCFG_UYVY_FORMAT:
+	 return VIDEO_FORMAT_Y0Y1Y2Y3;
+      case RCDF_VCFG_Y2YU_FORMAT:
+	 return VIDEO_FORMAT_Y3Y2Y1Y0;
+      case RCDF_VCFG_YUYV_FORMAT:
+	 return VIDEO_FORMAT_Y1Y0Y3Y2;
+      case RCDF_VCFG_YVYU_FORMAT:
+	 return VIDEO_FORMAT_Y1Y2Y3Y0;
+      }
+   } else {
+      switch (vcfg & RCDF_VCFG_VID_INP_FORMAT) {
+      case RCDF_VCFG_UYVY_FORMAT:
+	 return VIDEO_FORMAT_UYVY;
+      case RCDF_VCFG_Y2YU_FORMAT:
+	 return VIDEO_FORMAT_Y2YU;
+      case RCDF_VCFG_YUYV_FORMAT:
+	 return VIDEO_FORMAT_YUYV;
+      case RCDF_VCFG_YVYU_FORMAT:
+	 return VIDEO_FORMAT_YVYU;
+      }
+   }
+   return (GFX_STATUS_ERROR);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_video_src_size
+ *
+ * This routine returns the size of the source video overlay buffer.  The 
+ * return value is (height << 16) | width.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+unsigned long
+redcloud_get_video_src_size(void)
+#else
+unsigned long
+gfx_get_video_src_size(void)
+#endif
+{
+   unsigned long width, height, scale, delta;
+   int down_enable;
+
+   /* DETERMINE SOURCE WIDTH FROM THE DISPLAY FILTER VIDEO LINE SIZE */
+
+   width = (READ_VID32(RCDF_VIDEO_CONFIG) >> 7) & 0x000001FE;
+   if (READ_VID32(RCDF_VIDEO_CONFIG) & RCDF_VCFG_LINE_SIZE_UPPER)
+      width += 512l;
+
+   /* DETERMINE SOURCE HEIGHT FROM THE DISPLAY FILTER HEIGHT AND SCALE VALUES     */
+   /* There is no true "source buffer size" in Redcloud.  Instead, the VG module  */
+   /* provides video data as needed on a per-line basis.  The source buffer size  */
+   /* is always assumed to equal the amount of required video data.  The returned */
+   /* height is equal to the height of the required video buffer data (before all */
+   /* scaling.)                                                                   */
+
+   scale = (READ_VID32(RCDF_VIDEO_SCALE) >> 16) & 0x3FFF;
+   height = ((READ_VID32(RCDF_VIDEO_Y_POS) >> 16) & 0x7FF) -
+	 (READ_VID32(RCDF_VIDEO_Y_POS) & 0x7FF);
+   delta = gfx_get_video_downscale_delta();
+   down_enable = gfx_get_video_vertical_downscale_enable();
+
+   /* REVERSE UPSCALING */
+
+   if (height)
+      height = ((scale * (height - 1l)) / 0x2000l) + 2l;
+
+   /* REVERSE DOWNSCALING */
+   /* Original lines = height * (0x3FFF + delta) / 0x3FFF */
+   /* As this may cause rounding errors, we add 1 to the  */
+   /* returned source size.  The return value of this     */
+   /* function could thus be off by 1.                    */
+
+   if (down_enable && height)
+      height = ((height * (0x3FFFl + delta)) / 0x3FFFl) + 1;
+
+   return ((height << 16) | width);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_video_line_size
+ *
+ * This routine returns the line size of the source video overlay buffer, in
+ * pixels.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+unsigned long
+redcloud_get_video_line_size(void)
+#else
+unsigned long
+gfx_get_video_line_size(void)
+#endif
+{
+   unsigned long width = 0;
+
+   /* DETERMINE SOURCE WIDTH FROM THE RCDF VIDEO LINE SIZE */
+
+   width = (READ_VID32(RCDF_VIDEO_CONFIG) >> 7) & 0x000001FE;
+   if (READ_VID32(RCDF_VIDEO_CONFIG) & RCDF_VCFG_LINE_SIZE_UPPER)
+      width += 512l;
+   return (width);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_video_xclip
+ *
+ * This routine returns the number of bytes clipped on the left side of a
+ * video overlay line (skipped at beginning).
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+unsigned long
+redcloud_get_video_xclip(void)
+#else
+unsigned long
+gfx_get_video_xclip(void)
+#endif
+{
+   unsigned long clip = 0;
+
+   /* DETERMINE SOURCE WIDTH FROM THE RCDF VIDEO LINE SIZE */
+
+   clip = (READ_VID32(RCDF_VIDEO_CONFIG) >> 14) & 0x000007FC;
+   return (clip);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_video_offset
+ *
+ * This routine returns the current offset for the video overlay buffer.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+unsigned long
+redcloud_get_video_offset(void)
+#else
+unsigned long
+gfx_get_video_offset(void)
+#endif
+{
+   return (gfx_get_display_video_offset());
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_video_yuv_offsets
+ *
+ * This routine returns the current offsets for the video overlay buffer when in 4:2:0.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+void
+redcloud_get_video_yuv_offsets(unsigned long *yoffset, unsigned long *uoffset,
+			       unsigned long *voffset)
+#else
+void
+gfx_get_video_yuv_offsets(unsigned long *yoffset, unsigned long *uoffset,
+			  unsigned long *voffset)
+#endif
+{
+   gfx_get_display_video_yuv_offsets(yoffset, uoffset, voffset);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_video_yuv_pitch
+ *
+ * This routine returns the current pitch values for the video overlay buffer.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+void
+redcloud_get_video_yuv_pitch(unsigned long *ypitch, unsigned long *uvpitch)
+#else
+void
+gfx_get_video_yuv_pitch(unsigned long *ypitch, unsigned long *uvpitch)
+#endif
+{
+   gfx_get_display_video_yuv_pitch(ypitch, uvpitch);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_video_scale
+ * 
+ * This routine returns the scale factor for the video overlay window.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+unsigned long
+redcloud_get_video_scale(void)
+#else
+unsigned long
+gfx_get_video_scale(void)
+#endif
+{
+   return (READ_VID32(RCDF_VIDEO_SCALE));
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_video_downscale_delta
+ * 
+ * This routine returns the vertical downscale factor for the video overlay window.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+unsigned long
+redcloud_get_video_downscale_delta(void)
+#else
+unsigned long
+gfx_get_video_downscale_delta(void)
+#endif
+{
+   /* USE PRIVATE ROUTINE TO ABSTRACT THE DIPSLAY CONTROLLER */
+
+   return (gfx_get_display_video_downscale_delta());
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_video_vertical_downscale_enable
+ * 
+ * This routine returns the vertical downscale enable for the video overlay window.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+redcloud_get_video_vertical_downscale_enable(void)
+#else
+int
+gfx_get_video_vertical_downscale_enable(void)
+#endif
+{
+   /* USE PRIVATE ROUTINE TO ABSTRACT THE DIPSLAY CONTROLLER */
+
+   return (gfx_get_display_video_downscale_enable());
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_video_downscale_config
+ * 
+ * This routine returns the current type and value of video downscaling.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+redcloud_get_video_downscale_config(unsigned short *type, unsigned short *m)
+#else
+int
+gfx_get_video_downscale_config(unsigned short *type, unsigned short *m)
+#endif
+{
+   unsigned long downscale;
+
+   downscale = READ_VID32(RCDF_VIDEO_DOWNSCALER_CONTROL);
+   *m = (unsigned short)((downscale & RCDF_VIDEO_DOWNSCALE_FACTOR_MASK) >>
+			 RCDF_VIDEO_DOWNSCALE_FACTOR_POS) + 1;
+
+   switch (downscale & RCDF_VIDEO_DOWNSCALE_TYPE_MASK) {
+   case RCDF_VIDEO_DOWNSCALE_TYPE_A:
+      *type = VIDEO_DOWNSCALE_KEEP_1_OF;
+      break;
+   case RCDF_VIDEO_DOWNSCALE_TYPE_B:
+      *type = VIDEO_DOWNSCALE_DROP_1_OF;
+      break;
+   default:
+      return GFX_STATUS_ERROR;
+      break;
+   }
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_video_downscale_coefficients
+ * 
+ * This routine returns the current video downscaling coefficients.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+void
+redcloud_get_video_downscale_coefficients(unsigned short *coef1,
+					  unsigned short *coef2,
+					  unsigned short *coef3,
+					  unsigned short *coef4)
+#else
+void
+gfx_get_video_downscale_coefficients(unsigned short *coef1,
+				     unsigned short *coef2,
+				     unsigned short *coef3,
+				     unsigned short *coef4)
+#endif
+{
+   unsigned long coef;
+
+   coef = READ_VID32(RCDF_VIDEO_DOWNSCALER_COEFFICIENTS);
+   *coef1 =
+	 (unsigned short)((coef >> RCDF_VIDEO_DOWNSCALER_COEF1_POS) &
+			  RCDF_VIDEO_DOWNSCALER_COEF_MASK);
+   *coef2 =
+	 (unsigned short)((coef >> RCDF_VIDEO_DOWNSCALER_COEF2_POS) &
+			  RCDF_VIDEO_DOWNSCALER_COEF_MASK);
+   *coef3 =
+	 (unsigned short)((coef >> RCDF_VIDEO_DOWNSCALER_COEF3_POS) &
+			  RCDF_VIDEO_DOWNSCALER_COEF_MASK);
+   *coef4 =
+	 (unsigned short)((coef >> RCDF_VIDEO_DOWNSCALER_COEF4_POS) &
+			  RCDF_VIDEO_DOWNSCALER_COEF_MASK);
+   return;
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_video_downscale_enable
+ * 
+ * This routine returns 1 if video downscaling is currently enabled,
+ * or 0 if it is currently disabled.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+void
+redcloud_get_video_downscale_enable(int *enable)
+#else
+void
+gfx_get_video_downscale_enable(int *enable)
+#endif
+{
+   if (READ_VID32(RCDF_VIDEO_DOWNSCALER_CONTROL) &
+       RCDF_VIDEO_DOWNSCALE_ENABLE)
+      *enable = 1;
+   else
+      *enable = 0;
+   return;
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_video_dst_size
+ * 
+ * This routine returns the size of the displayed video overlay window.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+unsigned long
+redcloud_get_video_dst_size(void)
+#else
+unsigned long
+gfx_get_video_dst_size(void)
+#endif
+{
+   unsigned long xsize, ysize;
+
+   xsize = READ_VID32(RCDF_VIDEO_X_POS);
+   xsize = ((xsize >> 16) & 0x7FF) - (xsize & 0x7FF);
+   ysize = READ_VID32(RCDF_VIDEO_Y_POS);
+   ysize = ((ysize >> 16) & 0x7FF) - (ysize & 0x7FF);
+   return ((ysize << 16) | xsize);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_video_position
+ * 
+ * This routine returns the position of the video overlay window.  The
+ * return value is (ypos << 16) | xpos.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+unsigned long
+redcloud_get_video_position(void)
+#else
+unsigned long
+gfx_get_video_position(void)
+#endif
+{
+   unsigned long hadjust, vadjust;
+   unsigned long xpos, ypos;
+
+   /* READ HARDWARE POSITION */
+
+   xpos = READ_VID32(RCDF_VIDEO_X_POS) & 0x000007FF;
+   ypos = READ_VID32(RCDF_VIDEO_Y_POS) & 0x000007FF;
+
+   /* GET ADJUSTMENT VALUES */
+   /* Use routines to abstract version of display controller. */
+
+   hadjust =
+	 (unsigned long)gfx_get_htotal() -
+	 (unsigned long)gfx_get_hsync_end() - 14l;
+   vadjust =
+	 (unsigned long)gfx_get_vtotal() -
+	 (unsigned long)gfx_get_vsync_end() + 1l;
+   xpos -= hadjust;
+   ypos -= vadjust;
+   return ((ypos << 16) | (xpos & 0x0000FFFF));
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_video_color_key
+ * 
+ * This routine returns the current video color key value.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+unsigned long
+redcloud_get_video_color_key(void)
+#else
+unsigned long
+gfx_get_video_color_key(void)
+#endif
+{
+   return (READ_VID32(RCDF_VIDEO_COLOR_KEY));
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_video_color_key_mask
+ * 
+ * This routine returns the current video color mask value.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+unsigned long
+redcloud_get_video_color_key_mask(void)
+#else
+unsigned long
+gfx_get_video_color_key_mask(void)
+#endif
+{
+   return (READ_VID32(RCDF_VIDEO_COLOR_MASK));
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_video_color_key_src
+ * 
+ * This routine returns 0 for video data compare, 1 for graphics data.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+redcloud_get_video_color_key_src(void)
+#else
+int
+gfx_get_video_color_key_src(void)
+#endif
+{
+   if (READ_VID32(RCDF_DISPLAY_CONFIG) & RCDF_DCFG_VG_CK)
+      return (0);
+   return (1);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_video_filter
+ * 
+ * This routine returns if the filters are currently enabled.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+redcloud_get_video_filter(void)
+#else
+int
+gfx_get_video_filter(void)
+#endif
+{
+   int retval = 0;
+
+   if (READ_VID32(RCDF_VIDEO_CONFIG) & RCDF_VCFG_X_FILTER_EN)
+      retval |= 1;
+   if (READ_VID32(RCDF_VIDEO_CONFIG) & RCDF_VCFG_Y_FILTER_EN)
+      retval |= 2;
+   return (retval);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_video_request
+ * 
+ * This routine returns the horizontal (pixel) and vertical (lines) video
+ * request values.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+redcloud_get_video_request(short *x, short *y)
+#else
+int
+gfx_get_video_request(short *x, short *y)
+#endif
+{
+   unsigned long request = 0;
+
+   request = (READ_VID32(RCDF_VIDEO_REQUEST));
+   *x = (short)((request >> RCDF_VIDEO_X_REQUEST_POS) &
+		RCDF_VIDEO_REQUEST_MASK);
+   *y = (short)((request >> RCDF_VIDEO_Y_REQUEST_POS) &
+		RCDF_VIDEO_REQUEST_MASK);
+
+   *x -= gfx_get_htotal() - gfx_get_hsync_end() - 2;
+   *y -= gfx_get_vtotal() - gfx_get_vsync_end() + 1;
+
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_video_cursor()
+ * 
+ * This routine configures the video hardware cursor.
+ * If the "mask"ed bits in the graphics pixel match "key", then either "color1"
+ * or "color2" will be used for this pixel, according to the value of the bit
+ * in offset "select_color2".
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+redcloud_get_video_cursor(unsigned long *key, unsigned long *mask,
+			  unsigned short *select_color2,
+			  unsigned long *color1, unsigned short *color2)
+#else
+int
+gfx_get_video_cursor(unsigned long *key, unsigned long *mask,
+		     unsigned short *select_color2, unsigned long *color1,
+		     unsigned short *color2)
+#endif
+{
+   *select_color2 =
+	 (unsigned short)(READ_VID32(RCDF_CURSOR_COLOR_KEY) >>
+			  RCDF_CURSOR_COLOR_KEY_OFFSET_POS);
+   *key = READ_VID32(RCDF_CURSOR_COLOR_KEY) & RCDF_COLOR_MASK;
+   *mask = READ_VID32(RCDF_CURSOR_COLOR_MASK) & RCDF_COLOR_MASK;
+   *color1 = READ_VID32(RCDF_CURSOR_COLOR_1) & RCDF_COLOR_MASK;
+   *color2 =
+	 (unsigned short)(READ_VID32(RCDF_CURSOR_COLOR_2) & RCDF_COLOR_MASK);
+   return (0);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_read_crc
+ *
+ * This routine returns the hardware CRC value, which is used for automated 
+ * testing.  The value is like a checksum, but will change if pixels move
+ * locations.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+unsigned long
+redcloud_read_crc(void)
+#else
+unsigned long
+gfx_read_crc(void)
+#endif
+{
+   Q_WORD msr_value;
+   unsigned long crc = 0xFFFFFFFF;
+
+   /* DISABLE 32-BIT CRCS */
+   /* For GX1.x, this is a reserved bit, and is assumed to be a benign access */
+
+   gfx_msr_read(RC_ID_DF, RCDF_MBD_MSR_DIAG_DF, &msr_value);
+   msr_value.low &= ~RCDF_DIAG_32BIT_CRC;
+   gfx_msr_write(RC_ID_DF, RCDF_MBD_MSR_DIAG_DF, &msr_value);
+
+   if (gfx_test_timing_active()) {
+      /* WAIT UNTIL ACTIVE DISPLAY */
+
+      while (!gfx_test_vertical_active()) ;
+
+      /* RESET CRC DURING ACTIVE DISPLAY */
+
+      WRITE_VID32(RCDF_VID_CRC, 0);
+      WRITE_VID32(RCDF_VID_CRC, 1);
+
+      /* WAIT UNTIL NOT ACTIVE, THEN ACTIVE, NOT ACTIVE, THEN ACTIVE */
+
+      while (!gfx_test_vertical_active()) ;
+      while (gfx_test_vertical_active()) ;
+      while (!gfx_test_vertical_active()) ;
+      while (gfx_test_vertical_active()) ;
+      while (!gfx_test_vertical_active()) ;
+      crc = READ_VID32(RCDF_VID_CRC) >> 8;
+   }
+   return (crc);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_read_crc32
+ *
+ * This routine returns the 32-bit hardware CRC value, which is used for automated 
+ * testing.  The value is like a checksum, but will change if pixels move
+ * locations.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+unsigned long
+redcloud_read_crc32(void)
+#else
+unsigned long
+gfx_read_crc32(void)
+#endif
+{
+   Q_WORD msr_value;
+   unsigned long crc = 0xFFFFFFFF;
+
+   /* ENABLE 32-BIT CRCS */
+   /* For GX1.x, this is a reserved bit, and is assumed to be a benign access */
+
+   gfx_msr_read(RC_ID_DF, RCDF_MBD_MSR_DIAG_DF, &msr_value);
+   msr_value.low |= RCDF_DIAG_32BIT_CRC;
+   gfx_msr_write(RC_ID_DF, RCDF_MBD_MSR_DIAG_DF, &msr_value);
+
+   if (gfx_test_timing_active()) {
+      /* WAIT UNTIL ACTIVE DISPLAY */
+
+      while (!gfx_test_vertical_active()) ;
+
+      /* RESET CRC DURING ACTIVE DISPLAY */
+
+      WRITE_VID32(RCDF_VID_CRC, 0);
+      WRITE_VID32(RCDF_VID_CRC, 1);
+
+      /* WAIT UNTIL NOT ACTIVE, THEN ACTIVE, NOT ACTIVE, THEN ACTIVE */
+
+      while (!gfx_test_vertical_active()) ;
+      while (gfx_test_vertical_active()) ;
+      while (!gfx_test_vertical_active()) ;
+      while (gfx_test_vertical_active()) ;
+      while (!gfx_test_vertical_active()) ;
+      crc = READ_VID32(RCDF_VID_CRC32);
+   }
+   return (crc);
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_read_window_crc
+ *
+ * This routine returns the hardware CRC value for a subsection of the display.
+ * This value is used to debug whole-screen CRC failures.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+unsigned long
+redcloud_read_window_crc(int source, unsigned short x, unsigned short y,
+			 unsigned short width, unsigned short height,
+			 int crc32)
+#else
+unsigned long
+gfx_read_window_crc(int source, unsigned short x, unsigned short y,
+		    unsigned short width, unsigned short height, int crc32)
+#endif
+{
+   Q_WORD msr_value;
+   unsigned long xpos, ypos, crc = 0;
+   unsigned long old_fmt = 0;
+   unsigned int vsync_active_base, vsync_inactive_base, hsync_active_base;
+   unsigned int vsync_active_shift, vsync_inactive_shift, hsync_active_shift;
+   unsigned int vsync_bit, hsync_bit, sync_polarities = 0;
+
+   /* CONFIGURE DISPLAY FILTER TO LOAD DATA ONTO LOWER 32-BITS */
+
+   msr_value.high = 0;
+   msr_value.low =
+	 (source == CRC_SOURCE_GFX_DATA) ? (RCDF_MBD_DIAG_EN0 | 0x0000000F)
+	 : (RCDF_MBD_DIAG_EN0 | 0x0000000B);
+   gfx_msr_write(RC_ID_DF, MBD_MSR_DIAG, &msr_value);
+
+   /* CONFIGURE DISPLAY FILTER FOR APPROPRIATE OUTPUT */
+
+   if (source != CRC_SOURCE_GFX_DATA) {
+      gfx_msr_read(RC_ID_DF, MBD_MSR_CONFIG, &msr_value);
+      old_fmt = msr_value.low;
+      msr_value.low &= ~(RCDF_CONFIG_FMT_MASK);
+      msr_value.low |= ((source == CRC_SOURCE_FP_DATA) ? RCDF_CONFIG_FMT_FP :
+			RCDF_CONFIG_FMT_CRT);
+      gfx_msr_write(RC_ID_DF, MBD_MSR_CONFIG, &msr_value);
+   }
+
+   /* CONFIGURE MCP TO LOAD REGB DATA ONTO UPPER 32-BITS */
+
+   msr_value.low = MCP_MBD_DIAG_EN1 | 0x00050000;
+   gfx_msr_write(RC_ID_MCP, MBD_MSR_DIAG, &msr_value);
+
+   /* ENABLE HW CLOCK GATING AND SET MCP CLOCK TO DOT CLOCK */
+
+   msr_value.low = 1l;
+   gfx_msr_write(RC_ID_MCP, MBD_MSR_PM, &msr_value);
+   msr_value.low = 0;
+   gfx_msr_write(RC_ID_MCP, MCP_DBGCLKCTL, &msr_value);
+   msr_value.low = 3;
+   gfx_msr_write(RC_ID_MCP, MCP_DBGCLKCTL, &msr_value);
+
+   /* DISABLE MCP ACTIONS */
+
+   msr_value.high = 0x00000000;
+   msr_value.low = 0x00000000;
+   gfx_msr_write(RC_ID_MCP, MCP_DIAGCTL, &msr_value);
+
+   /* SET APPROPRIATE BASE ADDRESS */
+   /* M-Sets use normal diag bits, while N-Sets use inverted diag bits */
+   /* We thus use the M-sets when polling for a high signal and the N  */
+   /* sets when polling for a low signal.                              */
+
+   if (source != CRC_SOURCE_GFX_DATA) {
+      sync_polarities = gfx_get_sync_polarities();
+      vsync_bit = 29;
+      hsync_bit = 30;
+   } else {
+      vsync_bit = 25;
+      hsync_bit = 26;
+   }
+
+   if (sync_polarities & 1) {
+      hsync_active_base = MCP_SETM0CTL;
+      hsync_active_shift = 2;
+   } else {
+      hsync_active_base = MCP_SETN0CTL;
+      hsync_active_shift = 1;
+   }
+   if (sync_polarities & 2) {
+      vsync_active_base = MCP_SETM0CTL;
+      vsync_inactive_base = MCP_SETN0CTL;
+      vsync_active_shift = 2;
+      vsync_inactive_shift = 1;
+   } else {
+      vsync_active_base = MCP_SETN0CTL;
+      vsync_inactive_base = MCP_SETM0CTL;
+      vsync_active_shift = 1;
+      vsync_inactive_shift = 2;
+   }
+
+   /* SET STATE TRANSITIONS          */
+
+   /* STATE 0-1 TRANSITION (SET 0)      */
+   /* XState = 00 and VSync Inactive    */
+   /* Note: DF VSync = Diag Bus Bit 29  */
+   /*       VG VSync = Diag Bus Bit 25  */
+
+   msr_value.low = 0x000000A0;
+   msr_value.high = 0x00008000 | ((unsigned long)vsync_bit << 16) |
+	 ((unsigned long)vsync_bit << 21) | ((unsigned long)vsync_bit << 26);
+   gfx_msr_write(RC_ID_MCP, vsync_inactive_base, &msr_value);
+
+   /* STATE 1-2 TRANSITION (SET 4)   */
+   /* XState = 01 and VSync Active   */
+
+   msr_value.low = 0x000000C0;
+   gfx_msr_write(RC_ID_MCP, vsync_active_base + 4, &msr_value);
+
+   /* STATE 2-3 TRANSITION (SET 1)   */
+   /* XState = 10 and VSync Inactive */
+
+   msr_value.low = 0x00000120;
+   gfx_msr_write(RC_ID_MCP, vsync_inactive_base + 1, &msr_value);
+
+   /* HORIZONTAL COUNTER (SET 5)         */
+   /* XState = 10 and HSync Active       */
+   /* Notes: DF HSync = Diag Bus Bit 30  */
+   /*        VG HSync = Diag Bus Bit 26  */
+
+   msr_value.high = 0x00008000 | ((unsigned long)hsync_bit << 16) |
+	 ((unsigned long)hsync_bit << 21) | ((unsigned long)hsync_bit << 26);
+   msr_value.low = 0x00000120;
+   gfx_msr_write(RC_ID_MCP, hsync_active_base + 5, &msr_value);
+
+   /* HORIZONTAL COUNTER RESET (SET 4)     */
+   /* XState = 10 and H. Counter = limit   */
+   /* Note: H. Counter is lower 16-bits of */
+   /*       RegB.                          */
+
+   msr_value.high = 0x00000000;
+   msr_value.low = 0x00000128;
+   gfx_msr_write(RC_ID_MCP, vsync_inactive_base + 4, &msr_value);
+
+   /* CRC TRIGGER (SET 0)   */
+   /* Cmp0 <= xpos <  Cmp1  */
+   /* Cmp2 <= ypos <  Cmp2  */
+
+   msr_value.high = 0x00000000;
+   msr_value.low = 0x10C20120;
+   gfx_msr_write(RC_ID_MCP, vsync_active_base, &msr_value);
+
+   /* SET COMPARATOR VALUES */
+   /* Note: The VG data outputs from the DF are delayed by one pixel clock. */
+   /*       In this mode, we thus add one to horizontal comparator limits.  */
+
+   /* COMPARATOR 0                                        */
+   /* Lower limit = xpos + (h_blank_pixels - 1) - 3       */
+   /* Notes:                                              */
+   /*   1. 3 is the pipeline delay for MCP register       */
+   /*      data to access the diag bus                    */
+   /*   2. h_blank_pixels = HTOTAL - HSYNC_END            */
+
+   xpos = (unsigned long)x + ((unsigned long)gfx_get_htotal() -
+			      (unsigned long)gfx_get_hsync_end() - 1l) - 3l;
+   if (source == CRC_SOURCE_GFX_DATA)
+      xpos++;
+   msr_value.high = 0x00000000;
+   msr_value.low = xpos;
+   gfx_msr_write(RC_ID_MCP, MCP_CMPVAL0, &msr_value);
+
+   /* COMPARATOR 1                                          */
+   /* Upper limit = xpos + width + (h_blank_pixels - 1) - 3 */
+
+   msr_value.low = xpos + (unsigned long)width;
+   gfx_msr_write(RC_ID_MCP, MCP_CMPVAL0 + 2, &msr_value);
+
+   /* COMPARATOR 2                                  */
+   /* Lower limit = ypos + v_blank_pixels           */
+   /* Notes:                                        */
+   /*   1. v_blank_pixels = VTOTAL - VSYNC_END      */
+
+   ypos = (unsigned long)y + (unsigned long)gfx_get_vtotal() -
+	 (unsigned long)gfx_get_vsync_end();
+   msr_value.low = ypos << 16;
+   gfx_msr_write(RC_ID_MCP, MCP_CMPVAL0 + 4, &msr_value);
+
+   /* COMPARATOR 3                                  */
+   /* Upper limit = ypos + height + v_blank_pixels  */
+
+   msr_value.low = (ypos + (unsigned long)height) << 16;
+   gfx_msr_write(RC_ID_MCP, MCP_CMPVAL0 + 6, &msr_value);
+
+   /* SET COMPARATOR MASKS */
+
+   /* COMPARATORS 0 AND 1 REFER TO LOWER 16 BITS OF REGB */
+
+   msr_value.high = 0x00000000;
+   msr_value.low = 0x0000FFFF;
+   gfx_msr_write(RC_ID_MCP, MCP_CMPMASK0, &msr_value);
+   gfx_msr_write(RC_ID_MCP, MCP_CMPMASK0 + 2, &msr_value);
+
+   /* COMPARATORS 2 AND 3 REFER TO UPPER 16 BITS OF REGB */
+
+   msr_value.low = 0xFFFF0000;
+   gfx_msr_write(RC_ID_MCP, MCP_CMPMASK0 + 4, &msr_value);
+   gfx_msr_write(RC_ID_MCP, MCP_CMPMASK0 + 6, &msr_value);
+
+   /* SET REGA MASK TO CRC ONLY 24 BITS OF DATA */
+
+   msr_value.high = 0x00000000;
+   msr_value.low = 0x00FFFFFF;
+   gfx_msr_write(RC_ID_MCP, MCP_REGAMASK, &msr_value);
+
+   /* SET REGB VALUE */
+   /* Lower 16 bits use HTOTAL - SYNC TIME - 1 to set the counter rollover limit. */
+   /* Upper 16 bits use 0xFFFF to remove auto-clear behavior.     */
+
+   msr_value.high = 0x00000000;
+   msr_value.low = 0xFFFF0000 |
+	 ((gfx_get_htotal() - (gfx_get_hsync_end() - gfx_get_hsync_start()) -
+	   1) & 0xFFFF);
+   gfx_msr_write(RC_ID_MCP, MCP_REGBVAL, &msr_value);
+
+   /* PROGRAM ACTIONS */
+
+   /* GOTO STATE 01 */
+
+   msr_value.high = 0x00000000;
+   msr_value.low = 0x00000008 | (1l << vsync_inactive_shift);
+   gfx_msr_write(RC_ID_MCP, MCP_ACTION0 + 14, &msr_value);
+
+   /* GOTO STATE 10 */
+
+   msr_value.low = 0x00080000 | (1l << (vsync_active_shift + 16));
+   gfx_msr_write(RC_ID_MCP, MCP_ACTION0 + 15, &msr_value);
+
+   /* GOTO STATE 11 */
+
+   msr_value.low = 0x00000080 | (1l << (vsync_inactive_shift + 4));
+   gfx_msr_write(RC_ID_MCP, MCP_ACTION0 + 16, &msr_value);
+
+   /* CLEAR REGB (COUNTERS)  */
+   /* RegB is cleared upon transitioning to state 10              */
+   /* RegA is not cleared as the initial value must be 0x00000001 */
+
+   msr_value.low = 0x00080000 | (1l << (vsync_active_shift + 16));
+   gfx_msr_write(RC_ID_MCP, MCP_ACTION0, &msr_value);
+
+   /* CRC INTO REGA        */
+   /* INCREMENT H. COUNTER */
+   /* cmp0 <= xpos < cmp1  */
+   /* cmp2 <= ypos < cmp3  */
+   /* XState = 10          */
+
+   msr_value.low = 0x00000008 | (1l << vsync_active_shift) |
+	 0x00800000 | (1l << (hsync_active_shift + 20));
+   gfx_msr_write(RC_ID_MCP, MCP_ACTION0 + 1, &msr_value);
+
+   /* INCREMENT V. COUNTER */
+   /* V. Counter is incremented when the H. Counter */
+   /* rolls over.                                   */
+
+   msr_value.low = 0x00080000 | (1l << (vsync_inactive_shift + 16));
+   gfx_msr_write(RC_ID_MCP, MCP_ACTION0 + 2, &msr_value);
+
+   /* CLEAR ALL OTHER ACTIONS */
+   /* This prevents side-effects from previous accesses to the MCP */
+   /* debug logic.                                                 */
+   msr_value.low = 0x00000000;
+   msr_value.high = 0x00000000;
+   gfx_msr_write(RC_ID_MCP, MCP_ACTION0 + 3, &msr_value);
+   gfx_msr_write(RC_ID_MCP, MCP_ACTION0 + 4, &msr_value);
+   gfx_msr_write(RC_ID_MCP, MCP_ACTION0 + 5, &msr_value);
+   gfx_msr_write(RC_ID_MCP, MCP_ACTION0 + 6, &msr_value);
+   gfx_msr_write(RC_ID_MCP, MCP_ACTION0 + 7, &msr_value);
+   gfx_msr_write(RC_ID_MCP, MCP_ACTION0 + 8, &msr_value);
+   gfx_msr_write(RC_ID_MCP, MCP_ACTION0 + 9, &msr_value);
+   gfx_msr_write(RC_ID_MCP, MCP_ACTION0 + 10, &msr_value);
+   gfx_msr_write(RC_ID_MCP, MCP_ACTION0 + 11, &msr_value);
+   gfx_msr_write(RC_ID_MCP, MCP_ACTION0 + 12, &msr_value);
+   gfx_msr_write(RC_ID_MCP, MCP_ACTION0 + 13, &msr_value);
+   gfx_msr_write(RC_ID_MCP, MCP_ACTION0 + 17, &msr_value);
+   gfx_msr_write(RC_ID_MCP, MCP_ACTION0 + 18, &msr_value);
+   gfx_msr_write(RC_ID_MCP, MCP_ACTION0 + 19, &msr_value);
+   gfx_msr_write(RC_ID_MCP, MCP_ACTION0 + 20, &msr_value);
+
+   /* SET REGA CRC VALUE TO 1 OR 0 */
+
+   if (!crc32)
+      msr_value.low = 0x00000001;
+   gfx_msr_write(RC_ID_MCP, MCP_REGA, &msr_value);
+
+   /* SET XSTATE TO 0 */
+
+   msr_value.low = 0;
+   msr_value.high = 0;
+   gfx_msr_write(RC_ID_MCP, MCP_XSTATE, &msr_value);
+
+   /* CONFIGURE DIAG CONTROL */
+   /* Set all four comparators to watch the upper diag bus.           */
+   /* Set REGA action1 to legacy CRC or 32-bit CRC.                   */
+   /* Set REGB action1 to increment lower 16 bits and clear at limit. */
+   /* Set REGB action2 to increment upper 16 bits.                    */
+   /* Enable all actions.                                             */
+
+   if (crc32)
+      msr_value.low = 0x9A820055;
+   else
+      msr_value.low = 0x9A840055;
+   msr_value.high = 0x00000000;
+   gfx_msr_write(RC_ID_MCP, MCP_DIAGCTL, &msr_value);
+
+   /* DELAY TWO FRAMES */
+
+   while (!gfx_test_vertical_active()) ;
+   while (gfx_test_vertical_active()) ;
+   while (!gfx_test_vertical_active()) ;
+   while (gfx_test_vertical_active()) ;
+   while (!gfx_test_vertical_active()) ;
+
+   /* VERIFY THAT XSTATE = 11 */
+
+   gfx_msr_read(RC_ID_MCP, MCP_XSTATE, &msr_value);
+   if ((msr_value.low & 3) == 3) {
+      gfx_msr_read(RC_ID_MCP, MCP_REGA, &msr_value);
+
+      crc = msr_value.low;
+      if (!crc32)
+	 crc &= 0xFFFFFF;
+   }
+
+   /* DISABLE MCP AND DF DIAG BUS OUTPUTS */
+
+   msr_value.low = 0x00000000;
+   msr_value.high = 0x00000000;
+   gfx_msr_write(RC_ID_DF, MBD_MSR_DIAG, &msr_value);
+   gfx_msr_write(RC_ID_MCP, MBD_MSR_DIAG, &msr_value);
+
+   /* DISABLE MCP ACTIONS */
+
+   msr_value.high = 0x00000000;
+   msr_value.low = 0x00000000;
+   gfx_msr_write(RC_ID_MCP, MCP_DIAGCTL, &msr_value);
+
+   /* RESTORE PREVIOUS OUTPUT FORMAT */
+
+   if (source != CRC_SOURCE_GFX_DATA) {
+      gfx_msr_read(RC_ID_DF, MBD_MSR_CONFIG, &msr_value);
+      msr_value.low = old_fmt;
+      gfx_msr_write(RC_ID_DF, MBD_MSR_CONFIG, &msr_value);
+   }
+   return crc;
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_alpha_enable
+ * 
+ * This routine returns 1 if the selected alpha window is currently 
+ * enabled, or 0 if it is currently disabled.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+void
+redcloud_get_alpha_enable(int *enable)
+#else
+void
+gfx_get_alpha_enable(int *enable)
+#endif
+{
+   unsigned long value = 0;
+
+   *enable = 0;
+   if (gfx_alpha_select <= 2) {
+      value =
+	    READ_VID32(RCDF_ALPHA_CONTROL_1 +
+		       ((unsigned long)gfx_alpha_select << 5));
+      if (value & RCDF_ACTRL_WIN_ENABLE)
+	 *enable = 1;
+   }
+   return;
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_alpha_size
+ * 
+ * This routine returns the size of the currently selected alpha region.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+void
+redcloud_get_alpha_size(unsigned short *x, unsigned short *y,
+			unsigned short *width, unsigned short *height)
+#else
+void
+gfx_get_alpha_size(unsigned short *x, unsigned short *y,
+		   unsigned short *width, unsigned short *height)
+#endif
+{
+   unsigned long value = 0;
+
+   *x = 0;
+   *y = 0;
+   *width = 0;
+   *height = 0;
+   if (gfx_alpha_select <= 2) {
+      value =
+	    READ_VID32(RCDF_ALPHA_XPOS_1 +
+		       ((unsigned long)gfx_alpha_select << 5));
+      *x = (unsigned short)(value & 0x000007FF);
+      *width = (unsigned short)((value >> 16) & 0x000007FF) - *x;
+      value =
+	    READ_VID32(RCDF_ALPHA_YPOS_1 +
+		       ((unsigned long)gfx_alpha_select << 5));
+      *y = (unsigned short)(value & 0x000007FF);
+      *height = (unsigned short)((value >> 16) & 0x000007FF) - *y;
+   }
+   *x -= gfx_get_htotal() - gfx_get_hsync_end() - 2;
+   *y -= gfx_get_vtotal() - gfx_get_vsync_end() + 1;
+   return;
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_alpha_value
+ * 
+ * This routine returns the alpha value and increment/decrement value of 
+ * the currently selected alpha region.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+void
+redcloud_get_alpha_value(unsigned char *alpha, char *delta)
+#else
+void
+gfx_get_alpha_value(unsigned char *alpha, char *delta)
+#endif
+{
+   unsigned long value = 0;
+
+   *alpha = 0;
+   *delta = 0;
+   if (gfx_alpha_select <= 2) {
+      value =
+	    READ_VID32(RCDF_ALPHA_CONTROL_1 +
+		       ((unsigned long)gfx_alpha_select << 5));
+      *alpha = (unsigned char)(value & 0x00FF);
+      *delta = (char)((value >> 8) & 0x00FF);
+   }
+   return;
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_alpha_priority
+ * 
+ * This routine returns the priority of the currently selected alpha region.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+void
+redcloud_get_alpha_priority(int *priority)
+#else
+void
+gfx_get_alpha_priority(int *priority)
+#endif
+{
+   unsigned long pos = 0, value = 0;
+
+   *priority = 0;
+   if (gfx_alpha_select <= 2) {
+      value = READ_VID32(RCDF_VID_ALPHA_CONTROL);
+      pos = 16 + (gfx_alpha_select << 1);
+      *priority = (int)((value >> pos) & 3);
+   }
+   return;
+}
+
+/*---------------------------------------------------------------------------
+ * gfx_get_alpha_color
+ * 
+ * This routine returns the color register value for the currently selected 
+ * alpha region.  Bit 24 is set if the color register is enabled.
+ *---------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+void
+redcloud_get_alpha_color(unsigned long *color)
+#else
+void
+gfx_get_alpha_color(unsigned long *color)
+#endif
+{
+   *color = 0;
+   if (gfx_alpha_select <= 2) {
+      *color =
+	    READ_VID32(RCDF_ALPHA_COLOR_1 +
+		       ((unsigned long)gfx_alpha_select << 5));
+   }
+   return;
+}
+
+#endif /* GFX_READ_ROUTINES */
+
+/* END OF FILE */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/vip_1200.c b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/vip_1200.c
index 819592bc3..f2458f64a 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/vip_1200.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/vip_1200.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/gfx/vip_1200.c,v 1.1 2002/10/11 14:33:01 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/vip_1200.c,v 1.1 2002/12/10 15:12:27 alanh Exp $ */
 /*
  * $Workfile: vip_1200.c $
  *
@@ -128,6 +128,37 @@
  *
  * END_NSC_LIC_GPL */
 
+int sc1200_set_vip_enable(int enable);
+int sc1200_set_vip_capture_run_mode(int mode);
+int sc1200_set_vip_base(unsigned long even, unsigned long odd);
+int sc1200_set_vip_pitch(unsigned long pitch);
+int sc1200_set_vip_mode(int mode);
+int sc1200_set_vbi_enable(int enable);
+int sc1200_set_vbi_mode(int mode);
+int sc1200_set_vbi_base(unsigned long even, unsigned long odd);
+int sc1200_set_vbi_pitch(unsigned long pitch);
+int sc1200_set_vbi_direct(unsigned long even_lines, unsigned long odd_lines);
+int sc1200_set_vbi_interrupt(int enable);
+int sc1200_set_vip_bus_request_threshold_high(int enable);
+int sc1200_set_vip_last_line(int last_line);
+int sc1200_test_vip_odd_field(void);
+int sc1200_test_vip_bases_updated(void);
+int sc1200_test_vip_fifo_overflow(void);
+int sc1200_get_vip_line(void);
+
+/* READ ROUTINES IN GFX_VIP.C */
+
+int sc1200_get_vip_enable(void);
+unsigned long sc1200_get_vip_base(int odd);
+unsigned long sc1200_get_vip_pitch(void);
+int sc1200_get_vip_mode(void);
+int sc1200_get_vbi_enable(void);
+int sc1200_get_vbi_mode(void);
+unsigned long sc1200_get_vbi_base(int odd);
+unsigned long sc1200_get_vbi_pitch(void);
+unsigned long sc1200_get_vbi_direct(int odd);
+int sc1200_get_vbi_interrupt(void);
+int sc1200_get_vip_bus_request_threshold_high(void);
 
 /*-----------------------------------------------------------------------------
  * gfx_set_vip_enable
@@ -136,19 +167,22 @@
  *-----------------------------------------------------------------------------
  */
 #if GFX_VIP_DYNAMIC
-int sc1200_set_vip_enable(int enable)
+int
+sc1200_set_vip_enable(int enable)
 #else
-int gfx_set_vip_enable(int enable)
+int
+gfx_set_vip_enable(int enable)
 #endif
 {
-	unsigned long value;
-	value = READ_VIP32(SC1200_VIP_CONTROL);
-	if (enable)
-		value |= SC1200_VIP_DATA_CAPTURE_EN;
-	else
-		value &= ~SC1200_VIP_DATA_CAPTURE_EN;
-	WRITE_VIP32(SC1200_VIP_CONTROL, value);
-	return(0);
+   unsigned long value;
+
+   value = READ_VIP32(SC1200_VIP_CONTROL);
+   if (enable)
+      value |= SC1200_VIP_DATA_CAPTURE_EN;
+   else
+      value &= ~SC1200_VIP_DATA_CAPTURE_EN;
+   WRITE_VIP32(SC1200_VIP_CONTROL, value);
+   return (0);
 }
 
 /*-----------------------------------------------------------------------------
@@ -158,30 +192,32 @@ int gfx_set_vip_enable(int enable)
  *-----------------------------------------------------------------------------
  */
 #if GFX_VIP_DYNAMIC
-int sc1200_set_vip_capture_run_mode(int mode)
+int
+sc1200_set_vip_capture_run_mode(int mode)
 #else
-int gfx_set_vip_capture_run_mode(int mode)
+int
+gfx_set_vip_capture_run_mode(int mode)
 #endif
 {
-	unsigned long value;
-	value = READ_VIP32(SC1200_VIP_CONTROL);
-	value &= ~SC1200_CAPTURE_RUN_MODE_MASK;
-	switch(mode)
-	{
-		case VIP_CAPTURE_STOP_LINE:
-			value |= SC1200_CAPTURE_RUN_MODE_STOP_LINE;
-			break;
-		case VIP_CAPTURE_STOP_FIELD:
-			value |= SC1200_CAPTURE_RUN_MODE_STOP_FIELD;
-			break;
-		case VIP_CAPTURE_START_FIELD:
-			value |= SC1200_CAPTURE_RUN_MODE_START;
-			break;
-		default:
-			return GFX_STATUS_BAD_PARAMETER;
-	}
-	WRITE_VIP32(SC1200_VIP_CONTROL, value);
-	return(0);
+   unsigned long value;
+
+   value = READ_VIP32(SC1200_VIP_CONTROL);
+   value &= ~SC1200_CAPTURE_RUN_MODE_MASK;
+   switch (mode) {
+   case VIP_CAPTURE_STOP_LINE:
+      value |= SC1200_CAPTURE_RUN_MODE_STOP_LINE;
+      break;
+   case VIP_CAPTURE_STOP_FIELD:
+      value |= SC1200_CAPTURE_RUN_MODE_STOP_FIELD;
+      break;
+   case VIP_CAPTURE_START_FIELD:
+      value |= SC1200_CAPTURE_RUN_MODE_START;
+      break;
+   default:
+      return GFX_STATUS_BAD_PARAMETER;
+   }
+   WRITE_VIP32(SC1200_VIP_CONTROL, value);
+   return (0);
 }
 
 /*-----------------------------------------------------------------------------
@@ -192,16 +228,20 @@ int gfx_set_vip_capture_run_mode(int mode)
  *-----------------------------------------------------------------------------
  */
 #if GFX_VIP_DYNAMIC
-int sc1200_set_vip_base(unsigned long even, unsigned long odd)
+int
+sc1200_set_vip_base(unsigned long even, unsigned long odd)
 #else
-int gfx_set_vip_base(unsigned long even, unsigned long odd)
+int
+gfx_set_vip_base(unsigned long even, unsigned long odd)
 #endif
-{	
-	/* TRUE OFFSET IS SPECIFIED, NEED TO SET BIT 23 FOR HARDWARE */
+{
+   /* TRUE OFFSET IS SPECIFIED, NEED TO SET BIT 23 FOR HARDWARE */
 
-	if (even) WRITE_VIP32(SC1200_VIP_EVEN_BASE, even + (unsigned long)gfx_phys_fbptr);
-	if (odd)  WRITE_VIP32(SC1200_VIP_ODD_BASE, odd + (unsigned long)gfx_phys_fbptr);
-	return(0);
+   if (even)
+      WRITE_VIP32(SC1200_VIP_EVEN_BASE, even + (unsigned long)gfx_phys_fbptr);
+   if (odd)
+      WRITE_VIP32(SC1200_VIP_ODD_BASE, odd + (unsigned long)gfx_phys_fbptr);
+   return (0);
 }
 
 /*-----------------------------------------------------------------------------
@@ -211,13 +251,15 @@ int gfx_set_vip_base(unsigned long even, unsigned long odd)
  *-----------------------------------------------------------------------------
  */
 #if GFX_VIP_DYNAMIC
-int sc1200_set_vip_pitch(unsigned long pitch)
+int
+sc1200_set_vip_pitch(unsigned long pitch)
 #else
-int gfx_set_vip_pitch(unsigned long pitch)
+int
+gfx_set_vip_pitch(unsigned long pitch)
 #endif
 {
-	WRITE_VIP32(SC1200_VIP_PITCH, pitch & SC1200_VIP_PITCH_MASK);
-	return(0);
+   WRITE_VIP32(SC1200_VIP_PITCH, pitch & SC1200_VIP_PITCH_MASK);
+   return (0);
 }
 
 /*-----------------------------------------------------------------------------
@@ -227,24 +269,25 @@ int gfx_set_vip_pitch(unsigned long pitch)
  *-----------------------------------------------------------------------------
  */
 #if GFX_VIP_DYNAMIC
-int sc1200_set_vip_mode(int mode)
+int
+sc1200_set_vip_mode(int mode)
 #else
-int gfx_set_vip_mode(int mode)
+int
+gfx_set_vip_mode(int mode)
 #endif
 {
-	unsigned long config;
-	
-	config = READ_VIP32(SC1200_VIP_CONFIG);
-	config &= ~SC1200_VIP_MODE_MASK;
-	switch(mode)
-	{
-		case VIP_MODE_C:
-			WRITE_VIP32(SC1200_VIP_CONFIG, config | SC1200_VIP_MODE_C);
-			break;
-		default:
-			return GFX_STATUS_BAD_PARAMETER;
-	}
-	return(0);
+   unsigned long config;
+
+   config = READ_VIP32(SC1200_VIP_CONFIG);
+   config &= ~SC1200_VIP_MODE_MASK;
+   switch (mode) {
+   case VIP_MODE_C:
+      WRITE_VIP32(SC1200_VIP_CONFIG, config | SC1200_VIP_MODE_C);
+      break;
+   default:
+      return GFX_STATUS_BAD_PARAMETER;
+   }
+   return (0);
 }
 
 /*-----------------------------------------------------------------------------
@@ -254,17 +297,22 @@ int gfx_set_vip_mode(int mode)
  *-----------------------------------------------------------------------------
  */
 #if GFX_VIP_DYNAMIC
-int sc1200_set_vbi_enable(int enable)
+int
+sc1200_set_vbi_enable(int enable)
 #else
-int gfx_set_vbi_enable(int enable)
+int
+gfx_set_vbi_enable(int enable)
 #endif
 {
-	unsigned long value;
-	value = READ_VIP32(SC1200_VIP_CONTROL);
-	if (enable) value |= SC1200_VIP_VBI_CAPTURE_EN;
-	else value &= ~SC1200_VIP_VBI_CAPTURE_EN;
-	WRITE_VIP32(SC1200_VIP_CONTROL, value);
-	return(0);
+   unsigned long value;
+
+   value = READ_VIP32(SC1200_VIP_CONTROL);
+   if (enable)
+      value |= SC1200_VIP_VBI_CAPTURE_EN;
+   else
+      value &= ~SC1200_VIP_VBI_CAPTURE_EN;
+   WRITE_VIP32(SC1200_VIP_CONTROL, value);
+   return (0);
 }
 
 /*-----------------------------------------------------------------------------
@@ -275,21 +323,28 @@ int gfx_set_vbi_enable(int enable)
  *-----------------------------------------------------------------------------
  */
 #if GFX_VIP_DYNAMIC
-int sc1200_set_vbi_mode(int mode)
+int
+sc1200_set_vbi_mode(int mode)
 #else
-int gfx_set_vbi_mode(int mode)
+int
+gfx_set_vbi_mode(int mode)
 #endif
 {
-	unsigned long config;
-	
-	config = READ_VIP32(SC1200_VIP_CONFIG);
-	config &= ~(SC1200_VBI_ANCILLARY_TO_MEMORY | SC1200_VBI_TASK_A_TO_MEMORY | SC1200_VBI_TASK_B_TO_MEMORY);
-	
-	if (mode & VBI_ANCILLARY) config |= SC1200_VBI_ANCILLARY_TO_MEMORY; 
-	if (mode & VBI_TASK_A) config |= SC1200_VBI_TASK_A_TO_MEMORY;
-	if (mode & VBI_TASK_B) config |= SC1200_VBI_TASK_B_TO_MEMORY;
-	WRITE_VIP32(SC1200_VIP_CONFIG, config);
-	return(0);
+   unsigned long config;
+
+   config = READ_VIP32(SC1200_VIP_CONFIG);
+   config &=
+	 ~(SC1200_VBI_ANCILLARY_TO_MEMORY | SC1200_VBI_TASK_A_TO_MEMORY |
+	   SC1200_VBI_TASK_B_TO_MEMORY);
+
+   if (mode & VBI_ANCILLARY)
+      config |= SC1200_VBI_ANCILLARY_TO_MEMORY;
+   if (mode & VBI_TASK_A)
+      config |= SC1200_VBI_TASK_A_TO_MEMORY;
+   if (mode & VBI_TASK_B)
+      config |= SC1200_VBI_TASK_B_TO_MEMORY;
+   WRITE_VIP32(SC1200_VIP_CONFIG, config);
+   return (0);
 }
 
 /*-----------------------------------------------------------------------------
@@ -301,17 +356,21 @@ int gfx_set_vbi_mode(int mode)
  *-----------------------------------------------------------------------------
  */
 #if GFX_VIP_DYNAMIC
-int sc1200_set_vbi_base(unsigned long even, unsigned long odd)
+int
+sc1200_set_vbi_base(unsigned long even, unsigned long odd)
 #else
-int gfx_set_vbi_base(unsigned long even, unsigned long odd)
+int
+gfx_set_vbi_base(unsigned long even, unsigned long odd)
 #endif
-{	
-	/* VIP HW REQUIRES THAT BASE ADDRESSES BE 16-BYTE ALIGNED */
+{
+   /* VIP HW REQUIRES THAT BASE ADDRESSES BE 16-BYTE ALIGNED */
 
-	if (even) WRITE_VIP32(SC1200_VBI_EVEN_BASE, even & ~0xf);
-	if (odd)  WRITE_VIP32(SC1200_VBI_ODD_BASE,  odd  & ~0xf);
+   if (even)
+      WRITE_VIP32(SC1200_VBI_EVEN_BASE, even & ~0xf);
+   if (odd)
+      WRITE_VIP32(SC1200_VBI_ODD_BASE, odd & ~0xf);
 
-	return(0);
+   return (0);
 }
 
 /*-----------------------------------------------------------------------------
@@ -321,13 +380,15 @@ int gfx_set_vbi_base(unsigned long even, unsigned long odd)
  *-----------------------------------------------------------------------------
  */
 #if GFX_VIP_DYNAMIC
-int sc1200_set_vbi_pitch(unsigned long pitch)
+int
+sc1200_set_vbi_pitch(unsigned long pitch)
 #else
-int gfx_set_vbi_pitch(unsigned long pitch)
+int
+gfx_set_vbi_pitch(unsigned long pitch)
 #endif
 {
-	WRITE_VIP32(SC1200_VBI_PITCH, pitch & SC1200_VBI_PITCH_MASK);
-	return(0);
+   WRITE_VIP32(SC1200_VBI_PITCH, pitch & SC1200_VBI_PITCH_MASK);
+   return (0);
 }
 
 /*-----------------------------------------------------------------------------
@@ -337,14 +398,18 @@ int gfx_set_vbi_pitch(unsigned long pitch)
  *-----------------------------------------------------------------------------
  */
 #if GFX_VIP_DYNAMIC
-int sc1200_set_vbi_direct(unsigned long even_lines, unsigned long odd_lines)
+int
+sc1200_set_vbi_direct(unsigned long even_lines, unsigned long odd_lines)
 #else
-int gfx_set_vbi_direct(unsigned long even_lines, unsigned long odd_lines)
+int
+gfx_set_vbi_direct(unsigned long even_lines, unsigned long odd_lines)
 #endif
 {
-	WRITE_VIP32(SC1200_EVEN_DIRECT_VBI_LINE_ENABLE, even_lines & SC1200_DIRECT_VBI_LINE_ENABLE_MASK);
-	WRITE_VIP32(SC1200_ODD_DIRECT_VBI_LINE_ENABLE, odd_lines & SC1200_DIRECT_VBI_LINE_ENABLE_MASK);
-	return(0);
+   WRITE_VIP32(SC1200_EVEN_DIRECT_VBI_LINE_ENABLE,
+	       even_lines & SC1200_DIRECT_VBI_LINE_ENABLE_MASK);
+   WRITE_VIP32(SC1200_ODD_DIRECT_VBI_LINE_ENABLE,
+	       odd_lines & SC1200_DIRECT_VBI_LINE_ENABLE_MASK);
+   return (0);
 }
 
 /*-----------------------------------------------------------------------------
@@ -354,19 +419,22 @@ int gfx_set_vbi_direct(unsigned long even_lines, unsigned long odd_lines)
  *-----------------------------------------------------------------------------
  */
 #if GFX_VIP_DYNAMIC
-int sc1200_set_vbi_interrupt(int enable)
+int
+sc1200_set_vbi_interrupt(int enable)
 #else
-int gfx_set_vbi_interrupt(int enable)
+int
+gfx_set_vbi_interrupt(int enable)
 #endif
 {
-	unsigned long value;
-	value = READ_VIP32(SC1200_VIP_CONTROL);
-	if (enable)
-		value |= SC1200_VIP_VBI_FIELD_INTERRUPT_EN;
-	else
-		value &= ~SC1200_VIP_VBI_FIELD_INTERRUPT_EN;
-	WRITE_VIP32(SC1200_VIP_CONTROL, value);  
-	return(0);
+   unsigned long value;
+
+   value = READ_VIP32(SC1200_VIP_CONTROL);
+   if (enable)
+      value |= SC1200_VIP_VBI_FIELD_INTERRUPT_EN;
+   else
+      value &= ~SC1200_VIP_VBI_FIELD_INTERRUPT_EN;
+   WRITE_VIP32(SC1200_VIP_CONTROL, value);
+   return (0);
 }
 
 /*-----------------------------------------------------------------------------
@@ -378,19 +446,22 @@ int gfx_set_vbi_interrupt(int enable)
  *-----------------------------------------------------------------------------
  */
 #if GFX_VIP_DYNAMIC
-int sc1200_set_vip_bus_request_threshold_high(int enable)
+int
+sc1200_set_vip_bus_request_threshold_high(int enable)
 #else
-int gfx_set_vip_bus_request_threshold_high(int enable)
+int
+gfx_set_vip_bus_request_threshold_high(int enable)
 #endif
 {
-	unsigned long value;
-	value = READ_VIP32(SC1200_VIP_CONFIG);
-	if (enable)
-		value &= ~SC1200_VIP_BUS_REQUEST_THRESHOLD;
-	else
-		value |= SC1200_VIP_BUS_REQUEST_THRESHOLD;
-	WRITE_VIP32(SC1200_VIP_CONFIG, value);  
-	return(0);
+   unsigned long value;
+
+   value = READ_VIP32(SC1200_VIP_CONFIG);
+   if (enable)
+      value &= ~SC1200_VIP_BUS_REQUEST_THRESHOLD;
+   else
+      value |= SC1200_VIP_BUS_REQUEST_THRESHOLD;
+   WRITE_VIP32(SC1200_VIP_CONFIG, value);
+   return (0);
 }
 
 /*-----------------------------------------------------------------------------
@@ -400,21 +471,24 @@ int gfx_set_vip_bus_request_threshold_high(int enable)
  *-----------------------------------------------------------------------------
  */
 #if GFX_VIP_DYNAMIC
-int sc1200_set_vip_last_line(int last_line)
+int
+sc1200_set_vip_last_line(int last_line)
 #else
-int gfx_set_vip_last_line(int last_line)
+int
+gfx_set_vip_last_line(int last_line)
 #endif
 {
-	unsigned long value;
+   unsigned long value;
 
-	/* This feature is implemented in Rev C1 */
-	if (gfx_chip_revision < SC1200_REV_C1) return(GFX_STATUS_OK);
+   /* This feature is implemented in Rev C1 */
+   if (gfx_chip_revision < SC1200_REV_C1)
+      return (GFX_STATUS_OK);
 
-	value = READ_VIP32(SC1200_VIP_LINE_TARGET);
-	value &= ~SC1200_VIP_LAST_LINE_MASK;
-	value |= ((last_line & 0x3FF) << 16);
-	WRITE_VIP32(SC1200_VIP_LINE_TARGET, value);
-	return(GFX_STATUS_OK);
+   value = READ_VIP32(SC1200_VIP_LINE_TARGET);
+   value &= ~SC1200_VIP_LAST_LINE_MASK;
+   value |= ((last_line & 0x3FF) << 16);
+   WRITE_VIP32(SC1200_VIP_LINE_TARGET, value);
+   return (GFX_STATUS_OK);
 }
 
 /*-----------------------------------------------------------------------------
@@ -424,15 +498,17 @@ int gfx_set_vip_last_line(int last_line)
  *-----------------------------------------------------------------------------
  */
 #if GFX_VIP_DYNAMIC
-int sc1200_test_vip_odd_field(void)
+int
+sc1200_test_vip_odd_field(void)
 #else
-int gfx_test_vip_odd_field(void)
+int
+gfx_test_vip_odd_field(void)
 #endif
 {
-	if (READ_VIP32(SC1200_VIP_STATUS) & SC1200_VIP_CURRENT_FIELD_ODD)
-		return(1);
-	else
-		return(0);
+   if (READ_VIP32(SC1200_VIP_STATUS) & SC1200_VIP_CURRENT_FIELD_ODD)
+      return (1);
+   else
+      return (0);
 }
 
 /*-----------------------------------------------------------------------------
@@ -444,15 +520,17 @@ int gfx_test_vip_odd_field(void)
  *-----------------------------------------------------------------------------
  */
 #if GFX_VIP_DYNAMIC
-int sc1200_test_vip_bases_updated(void)
+int
+sc1200_test_vip_bases_updated(void)
 #else
-int gfx_test_vip_bases_updated(void)
+int
+gfx_test_vip_bases_updated(void)
 #endif
 {
-	if (READ_VIP32(SC1200_VIP_STATUS) & SC1200_VIP_BASE_NOT_UPDATED)
-		return(0);
-	else
-		return(1);
+   if (READ_VIP32(SC1200_VIP_STATUS) & SC1200_VIP_BASE_NOT_UPDATED)
+      return (0);
+   else
+      return (1);
 }
 
 /*-----------------------------------------------------------------------------
@@ -464,18 +542,20 @@ int gfx_test_vip_bases_updated(void)
  *-----------------------------------------------------------------------------
  */
 #if GFX_VIP_DYNAMIC
-int sc1200_test_vip_fifo_overflow(void)
+int
+sc1200_test_vip_fifo_overflow(void)
 #else
-int gfx_test_vip_fifo_overflow(void)
+int
+gfx_test_vip_fifo_overflow(void)
 #endif
 {
-	if (READ_VIP32(SC1200_VIP_STATUS) & SC1200_VIP_FIFO_OVERFLOW) {
-		/* Bits in vip status register are either read only or reset by writing 1 */
-		WRITE_VIP32(SC1200_VIP_STATUS, SC1200_VIP_FIFO_OVERFLOW);
-		return(1);
-	} else {
-		return(0);
-	}		
+   if (READ_VIP32(SC1200_VIP_STATUS) & SC1200_VIP_FIFO_OVERFLOW) {
+      /* Bits in vip status register are either read only or reset by writing 1 */
+      WRITE_VIP32(SC1200_VIP_STATUS, SC1200_VIP_FIFO_OVERFLOW);
+      return (1);
+   } else {
+      return (0);
+   }
 }
 
 /*-----------------------------------------------------------------------------
@@ -486,12 +566,15 @@ int gfx_test_vip_fifo_overflow(void)
  *-----------------------------------------------------------------------------
  */
 #if GFX_VIP_DYNAMIC
-int sc1200_get_vip_line(void)
+int
+sc1200_get_vip_line(void)
 #else
-int gfx_get_vip_line(void)
+int
+gfx_get_vip_line(void)
 #endif
 {
-	return (int)(READ_VIP32(SC1200_VIP_CURRENT_LINE) & SC1200_VIP_CURRENT_LINE_MASK);
+   return (int)(READ_VIP32(SC1200_VIP_CURRENT_LINE) &
+		SC1200_VIP_CURRENT_LINE_MASK);
 }
 
 /*-----------------------------------------------------------------------------
@@ -499,15 +582,18 @@ int gfx_get_vip_line(void)
  *-----------------------------------------------------------------------------
  */
 #if GFX_VIP_DYNAMIC
-unsigned long sc1200_get_vip_base(int odd)
+unsigned long
+sc1200_get_vip_base(int odd)
 #else
-unsigned long gfx_get_vip_base(int odd)
+unsigned long
+gfx_get_vip_base(int odd)
 #endif
 {
-	/* MASK BIT 23 AND ABOVE TO MAKE IT A TRUE OFFSET */
+   /* MASK BIT 23 AND ABOVE TO MAKE IT A TRUE OFFSET */
 
-	if (odd) return(READ_VIP32(SC1200_VIP_ODD_BASE));
-	return(READ_VIP32(SC1200_VIP_EVEN_BASE));
+   if (odd)
+      return (READ_VIP32(SC1200_VIP_ODD_BASE));
+   return (READ_VIP32(SC1200_VIP_EVEN_BASE));
 }
 
 /*-----------------------------------------------------------------------------
@@ -515,12 +601,14 @@ unsigned long gfx_get_vip_base(int odd)
  *-----------------------------------------------------------------------------
  */
 #if GFX_VIP_DYNAMIC
-unsigned long sc1200_get_vbi_pitch(void)
+unsigned long
+sc1200_get_vbi_pitch(void)
 #else
-unsigned long gfx_get_vbi_pitch(void)
+unsigned long
+gfx_get_vbi_pitch(void)
 #endif
 {
-	return(READ_VIP32(SC1200_VBI_PITCH) & SC1200_VBI_PITCH_MASK);
+   return (READ_VIP32(SC1200_VBI_PITCH) & SC1200_VBI_PITCH_MASK);
 }
 
 /*************************************************************/
@@ -534,13 +622,16 @@ unsigned long gfx_get_vbi_pitch(void)
  *-----------------------------------------------------------------------------
  */
 #if GFX_VIP_DYNAMIC
-int sc1200_get_vip_enable(void)
+int
+sc1200_get_vip_enable(void)
 #else
-int gfx_get_vip_enable(void)
+int
+gfx_get_vip_enable(void)
 #endif
 {
-	if (READ_VIP32(SC1200_VIP_CONTROL) & SC1200_VIP_DATA_CAPTURE_EN) return(1);
-	return(0);
+   if (READ_VIP32(SC1200_VIP_CONTROL) & SC1200_VIP_DATA_CAPTURE_EN)
+      return (1);
+   return (0);
 }
 
 /*-----------------------------------------------------------------------------
@@ -548,12 +639,14 @@ int gfx_get_vip_enable(void)
  *-----------------------------------------------------------------------------
  */
 #if GFX_VIP_DYNAMIC
-unsigned long sc1200_get_vip_pitch(void)
+unsigned long
+sc1200_get_vip_pitch(void)
 #else
-unsigned long gfx_get_vip_pitch(void)
+unsigned long
+gfx_get_vip_pitch(void)
 #endif
 {
-	return(READ_VIP32(SC1200_VIP_PITCH) & SC1200_VIP_PITCH_MASK);
+   return (READ_VIP32(SC1200_VIP_PITCH) & SC1200_VIP_PITCH_MASK);
 }
 
 /*-----------------------------------------------------------------------------
@@ -561,16 +654,19 @@ unsigned long gfx_get_vip_pitch(void)
  *-----------------------------------------------------------------------------
  */
 #if GFX_VIP_DYNAMIC
-int sc1200_get_vip_mode(void)
+int
+sc1200_get_vip_mode(void)
 #else
-int gfx_get_vip_mode(void)
+int
+gfx_get_vip_mode(void)
 #endif
 {
-	switch(READ_VIP32(SC1200_VIP_CONFIG) & SC1200_VIP_MODE_MASK)
-	{
-		case SC1200_VIP_MODE_C: return VIP_MODE_C;
-		default: return(0);
-	}
+   switch (READ_VIP32(SC1200_VIP_CONFIG) & SC1200_VIP_MODE_MASK) {
+   case SC1200_VIP_MODE_C:
+      return VIP_MODE_C;
+   default:
+      return (0);
+   }
 }
 
 /*-----------------------------------------------------------------------------
@@ -578,13 +674,16 @@ int gfx_get_vip_mode(void)
  *-----------------------------------------------------------------------------
  */
 #if GFX_VIP_DYNAMIC
-int sc1200_get_vbi_enable(void)
+int
+sc1200_get_vbi_enable(void)
 #else
-int gfx_get_vbi_enable(void)
+int
+gfx_get_vbi_enable(void)
 #endif
 {
-	if (READ_VIP32(SC1200_VIP_CONTROL) & SC1200_VIP_VBI_CAPTURE_EN) return(1);
-	return(0);
+   if (READ_VIP32(SC1200_VIP_CONTROL) & SC1200_VIP_VBI_CAPTURE_EN)
+      return (1);
+   return (0);
 }
 
 /*-----------------------------------------------------------------------------
@@ -592,19 +691,27 @@ int gfx_get_vbi_enable(void)
  *-----------------------------------------------------------------------------
  */
 #if GFX_VIP_DYNAMIC
-int sc1200_get_vbi_mode(void)
+int
+sc1200_get_vbi_mode(void)
 #else
-int gfx_get_vbi_mode(void)
+int
+gfx_get_vbi_mode(void)
 #endif
 {
-	int config;
-	int mode = 0;
-	config = (int)(READ_VIP32(SC1200_VIP_CONFIG) & (SC1200_VBI_ANCILLARY_TO_MEMORY | SC1200_VBI_TASK_A_TO_MEMORY |
-											  SC1200_VBI_TASK_B_TO_MEMORY));
-	if (config & SC1200_VBI_ANCILLARY_TO_MEMORY) mode |= VBI_ANCILLARY;	  
-	if (config & SC1200_VBI_TASK_A_TO_MEMORY) mode |= VBI_TASK_A;
-	if (config & SC1200_VBI_TASK_B_TO_MEMORY) mode |= VBI_TASK_B;
-	return mode;
+   int config;
+   int mode = 0;
+
+   config =
+	 (int)(READ_VIP32(SC1200_VIP_CONFIG) &
+	       (SC1200_VBI_ANCILLARY_TO_MEMORY | SC1200_VBI_TASK_A_TO_MEMORY |
+		SC1200_VBI_TASK_B_TO_MEMORY));
+   if (config & SC1200_VBI_ANCILLARY_TO_MEMORY)
+      mode |= VBI_ANCILLARY;
+   if (config & SC1200_VBI_TASK_A_TO_MEMORY)
+      mode |= VBI_TASK_A;
+   if (config & SC1200_VBI_TASK_B_TO_MEMORY)
+      mode |= VBI_TASK_B;
+   return mode;
 }
 
 /*-----------------------------------------------------------------------------
@@ -612,15 +719,18 @@ int gfx_get_vbi_mode(void)
  *-----------------------------------------------------------------------------
  */
 #if GFX_VIP_DYNAMIC
-unsigned long sc1200_get_vbi_base(int odd)
+unsigned long
+sc1200_get_vbi_base(int odd)
 #else
-unsigned long gfx_get_vbi_base(int odd)
+unsigned long
+gfx_get_vbi_base(int odd)
 #endif
 {
-	/* MASK BIT 23 AND ABOVE TO MAKE IT A TRUE OFFSET */
+   /* MASK BIT 23 AND ABOVE TO MAKE IT A TRUE OFFSET */
 
-	if (odd) return(READ_VIP32(SC1200_VBI_ODD_BASE));
-	return(READ_VIP32(SC1200_VBI_EVEN_BASE));
+   if (odd)
+      return (READ_VIP32(SC1200_VBI_ODD_BASE));
+   return (READ_VIP32(SC1200_VBI_EVEN_BASE));
 }
 
 /*-----------------------------------------------------------------------------
@@ -628,15 +738,20 @@ unsigned long gfx_get_vbi_base(int odd)
  *-----------------------------------------------------------------------------
  */
 #if GFX_VIP_DYNAMIC
-unsigned long sc1200_get_vbi_direct(int odd)
+unsigned long
+sc1200_get_vbi_direct(int odd)
 #else
-unsigned long gfx_get_vbi_direct(int odd)
+unsigned long
+gfx_get_vbi_direct(int odd)
 #endif
 {
-	/* MASK BIT 23 AND ABOVE TO MAKE IT A TRUE OFFSET */
+   /* MASK BIT 23 AND ABOVE TO MAKE IT A TRUE OFFSET */
 
-	if (odd) return(READ_VIP32(SC1200_ODD_DIRECT_VBI_LINE_ENABLE) & SC1200_DIRECT_VBI_LINE_ENABLE_MASK);
-	return(READ_VIP32(SC1200_EVEN_DIRECT_VBI_LINE_ENABLE) & SC1200_DIRECT_VBI_LINE_ENABLE_MASK);
+   if (odd)
+      return (READ_VIP32(SC1200_ODD_DIRECT_VBI_LINE_ENABLE) &
+	      SC1200_DIRECT_VBI_LINE_ENABLE_MASK);
+   return (READ_VIP32(SC1200_EVEN_DIRECT_VBI_LINE_ENABLE) &
+	   SC1200_DIRECT_VBI_LINE_ENABLE_MASK);
 }
 
 /*-----------------------------------------------------------------------------
@@ -644,13 +759,16 @@ unsigned long gfx_get_vbi_direct(int odd)
  *-----------------------------------------------------------------------------
  */
 #if GFX_VIP_DYNAMIC
-int sc1200_get_vbi_interrupt(void)
+int
+sc1200_get_vbi_interrupt(void)
 #else
-int gfx_get_vbi_interrupt(void)
+int
+gfx_get_vbi_interrupt(void)
 #endif
 {
-	if (READ_VIP32(SC1200_VIP_CONTROL) & SC1200_VIP_VBI_FIELD_INTERRUPT_EN) return(1);
-	return(0);
+   if (READ_VIP32(SC1200_VIP_CONTROL) & SC1200_VIP_VBI_FIELD_INTERRUPT_EN)
+      return (1);
+   return (0);
 }
 
 /*-----------------------------------------------------------------------------
@@ -658,16 +776,18 @@ int gfx_get_vbi_interrupt(void)
  *-----------------------------------------------------------------------------
  */
 #if GFX_VIP_DYNAMIC
-int sc1200_get_vip_bus_request_threshold_high(void)
+int
+sc1200_get_vip_bus_request_threshold_high(void)
 #else
-int gfx_get_vip_bus_request_threshold_high(void)
+int
+gfx_get_vip_bus_request_threshold_high(void)
 #endif
 {
-	if (READ_VIP32(SC1200_VIP_CONFIG) & SC1200_VIP_BUS_REQUEST_THRESHOLD) return(1);
-	return(0);
+   if (READ_VIP32(SC1200_VIP_CONFIG) & SC1200_VIP_BUS_REQUEST_THRESHOLD)
+      return (1);
+   return (0);
 }
 
 #endif /* GFX_READ_ROUTINES */
 
 /* END OF FILE */
-
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/vip_1400.c b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/vip_1400.c
new file mode 100644
index 000000000..789628885
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/vip_1400.c
@@ -0,0 +1,271 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/vip_1400.c,v 1.1 2002/12/10 15:12:28 alanh Exp $ */
+/*-----------------------------------------------------------------------------
+ * VIP_1400.C
+ *
+ * Version 2.0 - February 21, 2000.
+ *
+ * This file routines to control the SC1400 video input port (VIP) hardware.
+ *
+ * History:
+ *    Versions 0.1 through 2.0 by Brian Falardeau.
+ *
+ * Copyright (c) 1999-2000 National Semiconductor.
+ *-----------------------------------------------------------------------------
+ */
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_vip_enable
+ *
+ * This routine enables or disables the writes to memory from the video port.  
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1400_set_vip_enable(int enable)
+#else
+int
+gfx_set_vip_enable(int enable)
+#endif
+{
+   unsigned long mcr, value;
+
+   value = READ_VIP32(SC1400_VIP_CONTROL);
+
+   if (enable) {
+      /* CONFIGURE MCR FOR VIDEO INPUT MODE */
+
+      mcr = IND(SC1400_CB_BASE_ADDR + SC1400_CB_MISC_CONFIG);
+      mcr |= (SC1400_MCR_VPOUT_CK_SELECT | SC1400_MCR_VPOUT_CK_SOURCE);
+      mcr &= ~SC1400_MCR_VPOUT_MODE;
+      mcr |= SC1400_MCR_VPIN_CCIR656;
+      mcr &= ~SC1400_MCR_GENLOCK_CONTINUE;
+      OUTD(SC1400_CB_BASE_ADDR + SC1400_CB_MISC_CONFIG, mcr);
+
+      /* ENABLE CAPTURE */
+      /* Hardcode config values for now. */
+
+      WRITE_VIP32(SC1400_VIP_CONFIG, 0x30012);
+      value |= 0x103;
+   } else {
+      value &= ~(0x102);
+   }
+
+   WRITE_VIP32(SC1400_VIP_CONTROL, value);
+   return (0);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_vip_base
+ *
+ * This routine sets the odd and even base address values for the VIP memory
+ * buffer.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1400_set_vip_base(unsigned long even, unsigned long odd)
+#else
+int
+gfx_set_vip_base(unsigned long even, unsigned long odd)
+#endif
+{
+   // TRUE OFFSET IS SPECIFIED, NEED TO SET BIT 23 FOR HARDWARE
+
+   WRITE_VIP32(SC1400_VIP_EVEN_BASE, even | 0x00800000);
+   WRITE_VIP32(SC1400_VIP_ODD_BASE, odd | 0x00800000);
+   return (0);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_vip_pitch
+ *
+ * This routine sets the number of bytes between scanlines for the VIP data.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1400_set_vip_pitch(unsigned long pitch)
+#else
+int
+gfx_set_vip_pitch(unsigned long pitch)
+#endif
+{
+   WRITE_VIP32(SC1400_VIP_PITCH, pitch & 0x0000FFFC);
+   return (0);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_vbi_enable
+ *
+ * This routine enables or disables the VBI data capture.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1400_set_vbi_enable(int enable)
+#else
+int
+gfx_set_vbi_enable(int enable)
+#endif
+{
+   unsigned long value;
+
+   value = READ_VIP32(SC1400_VIP_CONTROL);
+   if (enable)
+      value |= SC1400_VIP_VBI_CAPTURE_EN;
+   else
+      value &= ~SC1400_VIP_VBI_CAPTURE_EN;
+   WRITE_VIP32(SC1400_VIP_CONTROL, value);
+   return (0);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_vbi_base
+ *
+ * This routine sets the odd and even base address values for VBI capture.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1400_set_vbi_base(unsigned long even, unsigned long odd)
+#else
+int
+gfx_set_vbi_base(unsigned long even, unsigned long odd)
+#endif
+{
+   // TRUE OFFSET IS SPECIFIED, NEED TO SET BIT 23 FOR HARDWARE
+
+   WRITE_VIP32(SC1400_VBI_EVEN_BASE, even | 0x00800000);
+   WRITE_VIP32(SC1400_VBI_ODD_BASE, odd | 0x00800000);
+   return (0);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_set_vbi_pitch
+ *
+ * This routine sets the number of bytes between scanlines for VBI capture.
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1400_set_vbi_pitch(unsigned long pitch)
+#else
+int
+gfx_set_vbi_pitch(unsigned long pitch)
+#endif
+{
+   WRITE_VIP32(SC1400_VBI_PITCH, pitch & 0x0000FFFC);
+   return (0);
+}
+
+/*************************************************************/
+/*  READ ROUTINES  |  INCLUDED FOR DIAGNOSTIC PURPOSES ONLY  */
+/*************************************************************/
+
+#if GFX_READ_ROUTINES
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_vip_enable
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1400_get_vip_enable(void)
+#else
+int
+gfx_get_vip_enable(void)
+#endif
+{
+   if (READ_VIP32(SC1400_VIP_CONTROL) & 0x00000100)
+      return (1);
+   return (0);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_vip_base
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+unsigned long
+sc1400_get_vip_base(int odd)
+#else
+unsigned long
+gfx_get_vip_base(int odd)
+#endif
+{
+   // MASK BIT 23 AND ABOVE TO MAKE IT A TRUE OFFSET
+
+   if (odd)
+      return (READ_VIP32(SC1400_VIP_ODD_BASE) & 0x007FFFFF);
+   return (READ_VIP32(SC1400_VIP_EVEN_BASE) & 0x007FFFFF);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_vip_pitch
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+unsigned long
+sc1400_get_vip_pitch(void)
+#else
+unsigned long
+gfx_get_vip_pitch(void)
+#endif
+{
+   return (READ_VIP32(SC1400_VIP_PITCH) & 0x0000FFFF);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_vbi_enable
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+int
+sc1400_get_vbi_enable(void)
+#else
+int
+gfx_get_vbi_enable(void)
+#endif
+{
+   if (READ_VIP32(SC1400_VIP_CONTROL) & 0x00000200)
+      return (1);
+   return (0);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_vbi_base
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+unsigned long
+sc1400_get_vbi_base(int odd)
+#else
+unsigned long
+gfx_get_vbi_base(int odd)
+#endif
+{
+   // MASK BIT 23 AND ABOVE TO MAKE IT A TRUE OFFSET
+
+   if (odd)
+      return (READ_VIP32(SC1400_VBI_ODD_BASE) & 0x007FFFFF);
+   return (READ_VIP32(SC1400_VBI_EVEN_BASE) & 0x007FFFFF);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_get_vbi_pitch
+ *-----------------------------------------------------------------------------
+ */
+#if GFX_VIDEO_DYNAMIC
+unsigned long
+sc1400_get_vbi_pitch(void)
+#else
+unsigned long
+gfx_get_vbi_pitch(void)
+#endif
+{
+   return (READ_VIP32(SC1400_VBI_PITCH) & 0x0000FFFF);
+}
+
+#endif /* GFX_READ_ROUTINES */
+
+/* END OF FILE */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/geode.h b/xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc.h
index 9188dd4ac..27f55c3e3 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/geode.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc.h
@@ -1,7 +1,8 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/geode.h,v 1.1 2002/10/11 14:32:58 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc.h,v 1.5 2003/02/21 16:51:09 alanh Exp $ */
 /*
- * $Workfile: geode.h $
- * $Revision: 1.1.1.1 $
+ * $Workfile: nsc.h $
+ * $Revision: 1.2.2.1 $
+ * $Author: ldelgass $
  *
  * File Contents: This file contains the data structures Geode driver.
  *
@@ -19,7 +20,7 @@
  * National Semiconductor Corporation licenses this software 
  * ("Software"):
  *
- * Geode Xfree frame buffer driver
+ * National Xfree frame buffer driver
  *
  * under one of the two following licenses, depending on how the 
  * Software is received by the Licensee.
@@ -35,7 +36,7 @@
  *
  * National Semiconductor Corporation Open Source License for 
  *
- * Geode Xfree frame buffer driver
+ * National Xfree frame buffer driver
  *
  * (BSD License with Export Notice)
  *
@@ -138,23 +139,84 @@
  *
  * END_NSC_LIC_GPL */
 
-#ifndef _GEODE_H_
-#define _GEODE_H_
+#ifndef _NSC_GEODE_H_
+#define _NSC_GEODE_H_
 
 #include "xaa.h"
 #include "xf86Cursor.h"
+#if !defined(STB_X)
 #include "vgaHW.h"
+#endif
+#include "xf86int10.h"
 #include "xf86xv.h"
 
 #if defined(STB_X)
-#define GFX(x) Gal_##x
+#define GFX(func) Gal_##func
+#define GFX2(func) Gal2_##func
+#define OPTACCEL(func) func
+#else /* STB_X */
+#define GFX(func) gfx_##func
+#define GFX2(func) gfx2_##func
+
+#if defined(OPT_ACCEL)
+#define OPTACCEL(func) OPT##func
+#else /* OPT_ACCEL */
+#define OPTACCEL(func) func
+#endif /* OPT_ACCEL */
+
+#endif /* STB_X */
+
+#define GEODEPTR(p) ((GeodePtr)((p)->driverPrivate))
+
+#define DebugPort(_Val) gfx_outb(0x84, (_Val));
+
+#define DEFAULT_NUM_OF_BUF 20		/* default # of buffers */
+
+#if defined(MYDBG)
+#define DEBUGMSG(cond, drv_msg) if((cond)) xf86DrvMsg drv_msg
+#else
+#define DEBUGMSG(cond, drv_msg)
+#endif
+
+/* Overlay Transparency Key */
+#define TRANSPARENCY_KEY 255
+
+#if defined(EXTERN)
+unsigned char DCount = 0;
+
+#if defined(STB_X)
+void
+gfx_outb(unsigned short port, unsigned char data)
+{
+   __asm__ volatile ("outb %0,%1"::"a" (data), "d"(port));
+}
+#endif
 #else
-#define GFX(x) gfx_##x
+extern unsigned char DCount;
+
+#if defined(STB_X)
+extern void gfx_outb(unsigned short port, unsigned char data);
+extern unsigned char gfx_inb(unsigned short port);
+#endif
 #endif
 
 #if defined(STB_X)
-#include "galproto.h"
+#include "nsc_galproto.h"
 #else
+extern void gfx_write_reg32(int offset, int data);
+extern void gfx_write_reg16(int offset, short data);
+extern void gfx_write_reg8(int offset, char data);
+extern int gfx_read_reg32(int offset);
+extern short gfx_read_reg16(int offset);
+extern void gfx_write_vid32(int offset, int data);
+extern int gfx_read_vid32(int offset);
+extern unsigned char gfx_inb(unsigned short port);
+extern void gfx_outb(unsigned short port, unsigned char data);
+extern unsigned short gfx_inw(unsigned short port);
+extern void gfx_outw(unsigned short port, unsigned short data);
+extern unsigned long gfx_ind(unsigned short port);
+extern void gfx_outd(unsigned short port, unsigned long data);
+
 #include "gfx_rtns.h"
 #include "gfx_defs.h"
 #include "gfx_regs.h"
@@ -216,15 +278,11 @@ TVTIMING, *PTVTIMING;
 
 #endif /* STB_X */
 
-/* XFree86 macros */
-#define GEODEPTR(p) ((GeodePtr)((p)->driverPrivate))
-
-#define DEBUGMSG(cond, drv_msg) if((cond)) xf86DrvMsg drv_msg
-
-#define DEFAULT_NUM_OF_BUF 20		/* default # of buffers */
-
-/* Overlay Transparency Key */
-#define TRANSPARENCY_KEY 255
+typedef struct _VESARec
+{
+   xf86Int10InfoPtr pInt;
+}
+VESARec, *VESAPtr;
 
 typedef struct
 {
@@ -236,17 +294,17 @@ typedef struct
 
    EntityInfoPtr pEnt;
    ScreenBlockHandlerProcPtr BlockHandler;	/* needed for video */
-   CloseScreenProcPtr CloseScreen;
+   int DetectedChipSet;
    int Chipset;
-   int FBLinearAddr;
+   unsigned long FBLinearAddr;
    unsigned char *FBBase;
    unsigned long FBSize;
+   unsigned int cpu_reg_size;
+   unsigned int gp_reg_size;
+   unsigned int vid_reg_size;
    int Pitch;
    Bool HWCursor;
    Bool NoAccel;
-   Bool HWOverlay;
-   Bool HWVideo;
-   unsigned long ColorKey;
    unsigned long VideoKey;
 
    Bool TVSupport;
@@ -260,10 +318,8 @@ typedef struct
    Bool TV_Overscan_On;
 
    Bool Panel;
-   Pnl_PanelParams PnlParam;
 
    /* Flatpanel support from Bios */
-   Bool FPInBios;
    int FPBX;				/* xres */
    int FPBY;				/* yres */
    int FPBB;				/* bpp */
@@ -274,8 +330,13 @@ typedef struct
    unsigned char *ShadowPtr;
    int ShadowPitch;
    void (*PointerMoved) (int index, int x, int y);
+   /* CloseScreen function.        */
+   CloseScreenProcPtr CloseScreen;
 
    Bool Compression;
+   unsigned int CBOffset;
+   unsigned int CBPitch;
+   unsigned int CBSize;
    unsigned long CursorStartOffset;
    unsigned int CursorSize;
    xf86CursorInfoPtr CursorInfo;
@@ -289,7 +350,9 @@ typedef struct
    /* offset in video memory for ImageWrite Buffers */
    unsigned char **AccelImageWriteBufferOffsets;
    int NoOfImgBuffers;
-	/*****************************************/
+   FBAreaPtr CompressionArea;
+   FBAreaPtr AccelImgArea;
+/*****************************************/
 /* Saved Console State */
 #if defined(STB_X)
    GAL_VGAMODEDATA FBgfxVgaRegs;
@@ -300,10 +363,13 @@ typedef struct
    DISPLAYTIMING FBgfxdisplaytiming;
    TVTIMING FBtvtiming;
 #endif					/* STB_X */
-   int FBSoftVGAActive;
+   int FBVGAActive;
+   unsigned int FBTVActive;
    unsigned int FBTVEnabled;
    unsigned long FBDisplayOffset;
 
+   VESAPtr vesa;
+
    /* compression */
    int FBCompressionEnable;
    unsigned long FBCompressionOffset;
@@ -320,6 +386,19 @@ typedef struct
    int numDGAModes;
    Bool DGAactive;
    int DGAViewportStatus;
+/*****************************************/
+   int video_x;
+   int video_y;
+   short video_w;
+   short video_h;
+   short video_srcw;
+   short video_srch;
+   short video_dstw;
+   short video_dsth;
+   int video_id;
+   int video_offset;
+   ScrnInfoPtr video_scrnptr;
+   BOOL OverlayON;
 
    int videoKey;
    XF86VideoAdaptorPtr adaptor;
@@ -329,4 +408,26 @@ typedef struct
 }
 GeodeRec, *GeodePtr;
 
-#endif /* _GEODE_H_ */
+/* option flags are self-explanatory */
+enum
+{
+   OPTION_SW_CURSOR,
+   OPTION_HW_CURSOR,
+   OPTION_NOCOMPRESSION,
+   OPTION_NOACCEL,
+   OPTION_TV_SUPPORT,
+   OPTION_TV_OUTPUT,
+   OPTION_TV_OVERSCAN,
+   OPTION_SHADOW_FB,
+   OPTION_ROTATE,
+   OPTION_FLATPANEL,
+   OPTION_FLATPANEL_INFO,
+   OPTION_FLATPANEL_IN_BIOS,
+   OPTION_COLOR_KEY,
+   OPTION_OSM,
+   OPTION_OSM_IMG_BUFS,
+   OPTION_DONT_PROGRAM
+}
+GeodeOpts;
+
+#endif /* _NSC_GEODE_H_ */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc.man b/xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc.man
new file mode 100644
index 000000000..c9df3c0c5
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc.man
@@ -0,0 +1,134 @@
+.\" $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc.man,v 1.1 2002/12/10 15:12:23 alanh Exp $ 
+.\" shorthand for double quote that works everywhere.
+.ds q \N'34'
+.TH NSC __drivermansuffix__ __vendorversion__
+.SH NAME
+nsc \- Nsc video driver
+.SH SYNOPSIS
+.nf
+.B "Section \*qDevice\*q"
+.BI "  Identifier \*q"  devname \*q
+.B  "  Driver \*qnsc\*q"
+\ \ ...
+.B EndSection
+.fi
+.SH DESCRIPTION
+.B nsc
+is an XFree86 driver for National Semiconductors GEODE processor family.
+It uses the DURANGO kit provided by National Semiconductor.
+The driver is accelerated, and provides support for the following 
+framebuffer depths: 8, 16 and 24.
+.SH SUPPORTED HARDWARE
+The
+.B nsc
+driver supports GXLV (5530 companion chip), SC1200, SC1400 and
+GX2 (5535 companion chip).
+.SH CONFIGURATION DETAILS
+Please refer to XF86Config(__filemansuffix__) for general configuration
+details.  This section only covers configuration details specific to this
+driver.
+.PP
+The driver will auto-detect the amount of video memory present for all
+chips. If the amount of memory is detected incorrectly, the actual amount
+of video memory should be specified with a
+.B VideoRam
+entry in the config file
+.B \*qDevice\*q
+section.
+.PP
+The following driver
+.B Options
+are supported:
+.TP
+.BI "Option \*qSWCursor\*q \*q" boolean \*q
+Enable or disable the SW cursor.  
+Default: off.
+.TP
+.BI "Option \*qHWCursor\*q \*q" boolean \*q
+Enable or disable the HW cursor.  
+Default: on.
+.TP
+.BI "Option \*qNoAccel\*q \*q" boolean \*q
+Disable or enable acceleration.  
+Default: acceleration is enabled.
+.TP
+.BI "Option \*qNoCompression\*q \*q" boolean \*q
+Disable or enable compression.  
+Default: compression is enabled.
+.TP
+.BI "Option \*qShadowFB\*q \*q" boolean \*q
+Enable or disable use of the shadow framebuffer layer.  
+Default: off.
+.TP
+.BI "Option \*qRotate\*q \*qCW\*q"
+Rotate the display clockwise. This mode is unaccelerated, and uses
+the Shadow Frame Buffer layer.
+Default: no rotation.
+.TP
+.BI "Option \*qRotate\*q \*qCCW\*q"
+Rotate the display counterclockwise. This mode is unaccelerated, and
+uses the Shadow Frame Buffer layer.
+Default: no rotation.
+.TP
+.BI "Option \*qFlatPanel\*q \*q" boolean \*q
+This enables the FlatPanel display unit. The FlatPanel depends on the 
+BIOS to do the Pnale h/w initialization.
+In GX2 based platforms with TFT part Flatpanel is enabled, and on CRT
+part is disabled.
+Default: off.
+.TP
+.BI "Option \*qOSMImageBuffers\*q \*q" integer \*q
+This sets the number of scanline buffers to be allocated in offscreen 
+memory for acceleration. This can take any value 0 will disable the 
+allocation. Disabled if cannot alocate requested scanline memory.
+Default: 20.
+.TP
+.BI "Option \*qColorKey\*q \*q" integer \*q
+This sets the default pixel value for the YUV video overlay key.
+Default: 0.
+.PP
+The following 
+.B Options
+are supported only on SC1200 based platforms:
+.TP
+.BI "Option \*qTV\*q \*qPAL-768x576\*q"
+Selects the PAL TV display mode 768x576 and the depth is forced to 16 bpp.
+Default: no TV.
+.TP
+.BI "Option \*qTV\*q \*qPAL-720x576\*q"
+Selects the PAL TV display mode 720x576 and the depth is forced to 16 bpp.
+Default: no TV.
+.TP
+.BI "Option \*qTV\*q \*qNTSC-720x480\*q"
+Selects the NTSC TV display mode 720x480 and the depth is forced to 16 bpp.
+Default: no TV.
+.TP
+.BI "Option \*qTV\*q \*qNTSC-640x480\*q"
+Selects the NTSC TV display mode 640x480 and the depth is forced to 16 bpp.
+Default: no TV.
+.TP
+.BI "Option \*qTV_Output\*q \*qCOMPOSITE\*q"
+The selected TV mode output is coded for Composite signal.
+Default: no TV.
+.TP
+.BI "Option \*qTV_Output\*q \*qSVIDEO\*q"
+The selected TV mode output is coded for SVIDEO signal.
+Default: no TV.
+.TP
+.BI "Option \*qTV_Output\*q \*qYUV\*q"
+The selected TV mode output is coded for YUV signal.
+Default: no TV.
+.TP
+.BI "Option \*qTV_Output\*q \*qSCART\*q"
+The selected TV mode output is coded for SCART signal.
+Default: no TV.
+.TP
+.BI "Option \*qTVOverscan\*q \*xx:yy:ww:hh\*q"
+This option will let only the viewable display area smaller to be able to 
+view on TV. The parameters xx: X-offset, yy: Y-offset, ww: Viewable width,
+hh: Viewable height.
+Default: no TV.
+.SH "SEE ALSO"
+XFree86(1), XF86Config(__filemansuffix__), xf86config(1), Xserver(1), X(__miscmansuffix__)
+.SH AUTHOR
+Author: Sarma V. Kolluru
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_driver.c b/xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_driver.c
new file mode 100644
index 000000000..154b24c25
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_driver.c
@@ -0,0 +1,614 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_driver.c,v 1.4 2003/02/12 13:08:54 alanh Exp $ */
+/*
+ * $Workfile: nsc_driver.c $
+ * $Revision: 1.2.2.1 $
+ * $Author: ldelgass $
+ *
+ * File Contents: This is the main module configures the interfacing 
+ *                with the X server. The individual modules will be 
+ *                loaded based upon the options selected from the 
+ *                XF86Config. This file also has modules for finding 
+ *                supported modes, turning on the modes based on options.
+ *
+ * Project:       Nsc Xfree Frame buffer device driver.
+ *
+ */
+
+/* 
+ * NSC_LIC_ALTERNATIVE_PREAMBLE
+ *
+ * Revision 1.0
+ *
+ * National Semiconductor Alternative GPL-BSD License
+ *
+ * National Semiconductor Corporation licenses this software 
+ * ("Software"):
+ *
+ * National Xfree frame buffer driver
+ *
+ * under one of the two following licenses, depending on how the 
+ * Software is received by the Licensee.
+ * 
+ * If this Software is received as part of the Linux Framebuffer or
+ * other GPL licensed software, then the GPL license designated 
+ * NSC_LIC_GPL applies to this Software; in all other circumstances 
+ * then the BSD-style license designated NSC_LIC_BSD shall apply.
+ *
+ * END_NSC_LIC_ALTERNATIVE_PREAMBLE */
+
+/* NSC_LIC_BSD
+ *
+ * National Semiconductor Corporation Open Source License for 
+ *
+ * National Xfree frame buffer driver
+ *
+ * (BSD License with Export Notice)
+ *
+ * Copyright (c) 1999-2001
+ * National Semiconductor Corporation.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met: 
+ *
+ *   * Redistributions of source code must retain the above copyright 
+ *     notice, this list of conditions and the following disclaimer. 
+ *
+ *   * Redistributions in binary form must reproduce the above 
+ *     copyright notice, this list of conditions and the following 
+ *     disclaimer in the documentation and/or other materials provided 
+ *     with the distribution. 
+ *
+ *   * Neither the name of the National Semiconductor Corporation nor 
+ *     the names of its contributors may be used to endorse or promote 
+ *     products derived from this software without specific prior 
+ *     written permission. 
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+ * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE,
+ * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE.
+ *
+ * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
+ * YOUR JURISDICTION. It is licensee's responsibility to comply with 
+ * any export regulations applicable in licensee's jurisdiction. Under 
+ * CURRENT (2001) U.S. export regulations this software 
+ * is eligible for export from the U.S. and can be downloaded by or 
+ * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
+ * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
+ * Syria, Sudan, Afghanistan and any other country to which the U.S. 
+ * has embargoed goods and services. 
+ *
+ * END_NSC_LIC_BSD */
+
+/* NSC_LIC_GPL
+ *
+ * National Semiconductor Corporation Gnu General Public License for 
+ *
+ * National Xfree frame buffer driver
+ *
+ * (GPL License with Export Notice)
+ *
+ * Copyright (c) 1999-2001
+ * National Semiconductor Corporation.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted under the terms of the GNU General 
+ * Public License as published by the Free Software Foundation; either 
+ * version 2 of the License, or (at your option) any later version  
+ *
+ * In addition to the terms of the GNU General Public License, neither 
+ * the name of the National Semiconductor Corporation nor the names of 
+ * its contributors may be used to endorse or promote products derived 
+ * from this software without specific prior written permission. 
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+ * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, 
+ * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE. See the GNU General Public License for more details. 
+ *
+ * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
+ * YOUR JURISDICTION. It is licensee's responsibility to comply with 
+ * any export regulations applicable in licensee's jurisdiction. Under 
+ * CURRENT (2001) U.S. export regulations this software 
+ * is eligible for export from the U.S. and can be downloaded by or 
+ * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
+ * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
+ * Syria, Sudan, Afghanistan and any other country to which the U.S. 
+ * has embargoed goods and services. 
+ *
+ * You should have received a copy of the GNU General Public License 
+ * along with this file; if not, write to the Free Software Foundation, 
+ * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 
+ *
+ * END_NSC_LIC_GPL */
+
+#define DEBUG(x)
+#define NSC_TRACE 0
+#define CFB 0
+#define HWVGA 1
+
+/* Includes that are used by all drivers */
+#include "xf86.h"
+#include "xf86_OSproc.h"
+#include "xf86_ansic.h"
+#include "xf86Resources.h"
+
+/* We may want inb() and outb() */
+#include "compiler.h"
+
+/* We may want to access the PCI config space */
+#include "xf86PciInfo.h"
+#include "xf86Pci.h"
+
+/* Colormap handling stuff */
+#include "xf86cmap.h"
+
+#define RC_MAX_DEPTH 24
+
+/* Frame buffer stuff */
+#if CFB
+/*
+ * If using cfb, cfb.h is required.  Select the others for the bpp values
+ * the driver supports.
+ */
+#define PSZ 8				/* needed for cfb.h */
+#include "cfb.h"
+#undef PSZ
+#include "cfb16.h"
+#include "cfb24.h"
+#include "cfb32.h"
+#else
+#include "fb.h"
+#endif
+
+#include "shadowfb.h"
+
+/* Machine independent stuff */
+#include "mipointer.h"
+#include "mibank.h"
+#include "micmap.h"
+/* All drivers implementing backing store need this */
+#include "mibstore.h"
+#include "vgaHW.h"
+#include "vbe.h"
+
+/* Check for some extensions */
+#ifdef XFreeXDGA
+#define _XF86_DGA_SERVER_
+#include "extensions/xf86dgastr.h"
+#endif /* XFreeXDGA */
+
+#ifdef DPMSExtension
+#include "globals.h"
+#include "opaque.h"
+#define DPMS_SERVER
+#include "extensions/dpms.h"
+#endif /* DPMSExtension */
+
+#define EXTERN
+/* Our private include file (this also includes the durango headers) */
+#include "nsc.h"
+
+#if NSC_TRACE
+/* ANSI C does not allow var arg macros */
+#define GeodeDebug(args) DebugPort(DCount++);ErrorF args
+#else
+#define GeodeDebug(args)
+#endif
+
+/* A few things all drivers should have */
+#define NSC_NAME            "NSC"
+#define NSC_DRIVER_NAME     "nsc"
+
+/* This should match the durango code version.
+ * The patchlevel may be used to indicate changes in geode.c 
+ */
+#define NSC_VERSION_NAME    "2.7.6"
+#define NSC_VERSION_MAJOR   2
+#define NSC_VERSION_MINOR   7
+#define NSC_PATCHLEVEL      6
+
+#define NSC_VERSION_CURRENT ((NSC_VERSION_MAJOR << 24) | \
+		(NSC_VERSION_MINOR << 16) | NSC_PATCHLEVEL)
+
+/* Forward definitions */
+static const OptionInfoRec *NscAvailableOptions(int chipid, int busid);
+static void NscIdentify(int);
+static Bool NscProbe(DriverPtr, int);
+static int CPUDetected;
+
+extern void GX1SetupChipsetFPtr(ScrnInfoPtr pScrn);
+extern void GX2SetupChipsetFPtr(ScrnInfoPtr pScrn);
+
+#if !defined(STB_X)
+extern unsigned char *XpressROMPtr;
+#endif /* STB_X */
+
+/* driver record contains the functions needed by the server after loading
+ * the driver module.
+ */
+DriverRec NSC = {
+   NSC_VERSION_CURRENT,
+   NSC_DRIVER_NAME,
+   NscIdentify,
+   NscProbe,
+   NscAvailableOptions,
+   NULL,
+   0
+};
+
+/* Existing Processor Models */
+#define GX1 0x1
+#define GX2 0x2
+#define GX2_CRT 0x6
+#define GX2_TFT 0xA
+
+#define PCI_VENDOR_ID_CYRIX  0x1078
+#define PCI_VENDOR_ID_NS     0x100B
+
+#define PCI_CHIP_5530     0x0104
+#define PCI_CHIP_SC1200   0x0504
+#define PCI_CHIP_SC1400   0x0104
+#define PCI_CHIP_REDCLOUD 0x0030
+
+/* National Chip Models */
+typedef struct _DEVICE_MODEL
+{
+   int DeviceId;
+   int Model;
+}
+DeviceModel;
+
+DeviceModel ChipModel[] = {
+   {PCI_CHIP_5530, GX1},
+   {PCI_CHIP_SC1200, GX1},
+   {PCI_CHIP_SC1400, GX1},
+   {PCI_CHIP_REDCLOUD, GX2},
+   {-1, 0}
+};
+
+/* Supported chipsets */
+SymTabRec GeodeChipsets[] = {
+   {PCI_CHIP_5530, "5530"},
+   {PCI_CHIP_SC1200, "SC1200"},
+   {PCI_CHIP_SC1400, "SC1400"},
+   {PCI_CHIP_REDCLOUD, "REDCLOUD"},
+   {-1, NULL}
+};
+
+PciChipsets GeodePCIchipsets[] = {
+   {PCI_CHIP_5530, PCI_CHIP_5530, RES_SHARED_VGA},
+   {PCI_CHIP_SC1200, PCI_CHIP_SC1200, RES_SHARED_VGA},
+   {PCI_CHIP_SC1400, PCI_CHIP_SC1400, RES_SHARED_VGA},
+   {PCI_CHIP_REDCLOUD, PCI_CHIP_REDCLOUD, RES_SHARED_VGA},
+   {-1, -1, RES_UNDEFINED},
+};
+
+OptionInfoRec GeodeOptions[] = {
+   {OPTION_SW_CURSOR, "SWcursor", OPTV_BOOLEAN, {0}, FALSE},
+   {OPTION_HW_CURSOR, "HWcursor", OPTV_BOOLEAN, {0}, FALSE},
+   {OPTION_NOCOMPRESSION, "NoCompression", OPTV_BOOLEAN, {0}, FALSE},
+   {OPTION_NOACCEL, "NoAccel", OPTV_BOOLEAN, {0}, FALSE},
+   {OPTION_TV_SUPPORT, "TV", OPTV_ANYSTR, {0}, FALSE},
+   {OPTION_TV_OUTPUT, "TV_Output", OPTV_ANYSTR, {0}, FALSE},
+   {OPTION_TV_OVERSCAN, "TVOverscan", OPTV_ANYSTR, {0}, FALSE},
+   {OPTION_SHADOW_FB, "ShadowFB", OPTV_BOOLEAN, {0}, FALSE},
+   {OPTION_ROTATE, "Rotate", OPTV_ANYSTR, {0}, FALSE},
+   {OPTION_FLATPANEL, "FlatPanel", OPTV_BOOLEAN, {0}, FALSE},
+   {OPTION_COLOR_KEY, "ColorKey", OPTV_INTEGER, {0}, FALSE},
+   {OPTION_OSM_IMG_BUFS, "OSMImageBuffers", OPTV_INTEGER, {0}, FALSE},
+   {-1, NULL, OPTV_NONE, {0}, FALSE}
+};
+
+/* List of symbols from other modules that this module references.The purpose
+* is that to avoid unresolved symbol warnings
+*/
+const char *nscVgahwSymbols[] = {
+   "vgaHWGetHWRec",
+   "vgaHWUnlock",
+   "vgaHWInit",
+   "vgaHWSave",
+   "vgaHWRestore",
+   "vgaHWProtect",
+   "vgaHWGetIOBase",
+   "vgaHWMapMem",
+   "vgaHWLock",
+   "vgaHWFreeHWRec",
+   "vgaHWSaveScreen",
+   NULL
+};
+
+const char *nscVbeSymbols[] = {
+   "VBEInit",
+   "vbeDoEDID",
+   "vbeFree",
+   NULL
+};
+
+const char *nscInt10Symbols[] = {
+   "xf86ExecX86int10",
+   "xf86InitInt10",
+   "xf86Int10AllocPages",
+   "xf86Int10Addr",
+   NULL
+};
+
+#if CFB
+const char *nscCfbSymbols[] = {
+   "cfbScreenInit",
+   "cfb16ScreenInit",
+   "cfb24ScreenInit",
+   "cfb32ScreenInit",
+   NULL
+};
+#else
+const char *nscFbSymbols[] = {
+   "fbScreenInit",
+   "fbPictureInit",
+   NULL
+};
+#endif
+
+const char *nscXaaSymbols[] = {
+   "XAADestroyInfoRec",
+   "XAACreateInfoRec",
+   "XAAInit",
+   "XAAScreenIndex",
+   NULL
+};
+
+const char *nscRamdacSymbols[] = {
+   "xf86InitCursor",
+   "xf86CreateCursorInfoRec",
+   "xf86DestroyCursorInfoRec",
+   NULL
+};
+
+const char *nscShadowSymbols[] = {
+   "ShadowFBInit",
+   NULL
+};
+
+#ifdef XFree86LOADER
+
+/* Module loader interface */
+
+static MODULESETUPPROTO(NscSetup);
+
+static XF86ModuleVersionInfo NscVersionRec = {
+   "nsc",
+   MODULEVENDORSTRING,
+   MODINFOSTRING1,
+   MODINFOSTRING2,
+   XF86_VERSION_CURRENT,
+   NSC_VERSION_MAJOR, NSC_VERSION_MINOR, NSC_PATCHLEVEL,
+   ABI_CLASS_VIDEODRV,			/* This is a video driver */
+   ABI_VIDEODRV_VERSION,
+   MOD_CLASS_VIDEODRV,
+   {0, 0, 0, 0}
+};
+
+/*
+ * This data is accessed by the loader.  The name must be the module name
+ * followed by "ModuleInit".
+ */
+XF86ModuleData nscModuleData = { &NscVersionRec, NscSetup, NULL };
+
+/*-------------------------------------------------------------------------
+ * NscSetup.
+ *
+ * Description	:This function sets up the driver in X list and load the
+ *               module symbols through xf86loader routines..
+ *
+ * Parameters.
+ *    Module	:Pointer to the geode  module
+ *    options	:Driver module options.
+ *    ErrorMajor:Major no
+ *    ErrorMinor:Minor no.
+ *
+ * Returns		:NULL on success
+ *
+ * Comments     :Module setup is done by this function
+ *
+ *-------------------------------------------------------------------------
+*/
+static pointer
+NscSetup(pointer Module, pointer Options, int *ErrorMajor, int *ErrorMinor)
+{
+   static Bool Initialised = FALSE;
+
+   if (!Initialised) {
+      Initialised = TRUE;
+      xf86AddDriver(&NSC, Module, 0);
+      /* Tell the loader about symbols from other modules that this
+       * module might refer to.
+       */
+      LoaderRefSymLists(nscVgahwSymbols, nscVbeSymbols,
+#if CFB
+			nscCfbSymbols,
+#else
+			nscFbSymbols,
+#endif
+			nscXaaSymbols,
+			nscInt10Symbols, nscRamdacSymbols, nscShadowSymbols,
+			NULL);
+      return (pointer) TRUE;
+   }
+   /*The return value must be non-NULL on success */
+   if (ErrorMajor)
+      *ErrorMajor = LDR_ONCEONLY;
+   return NULL;
+}
+#endif /*End of XFree86Loader */
+
+/*-------------------------------------------------------------------------
+ * NscIdentify.
+ *
+ * Description  :	This function identify an Nscfamily version.
+ *
+ *
+ * Parameters.
+ *    flags		:	flags may be used in PreInit*
+ *
+ * Returns		: 	none
+ *
+ * Comments     : 	none
+ *
+*------------------------------------------------------------------------
+*/
+static void
+NscIdentify(int flags)
+{
+   xf86PrintChipsets(NSC_NAME,
+		     "Nsc family driver (version " NSC_VERSION_NAME ") "
+		     "for chipsets", GeodeChipsets);
+}
+
+/*----------------------------------------------------------------------------
+ * NscAvailableOptions.
+ *
+ * Description	:This function returns the geodeoptions set geodeoption
+ *
+ * Parameters.
+ *    chipid	:This will identify the chipset.
+ *    busid     :This will identify the PCI busid
+ *
+ * Returns		:ptr to GeodeOptions.
+ *
+ * Comments     :none
+ *
+*----------------------------------------------------------------------------
+*/
+static const OptionInfoRec *
+NscAvailableOptions(int chipid, int busid)
+{
+   return GeodeOptions;
+}
+
+/*----------------------------------------------------------------------------
+ * NscProbe.
+ *
+ * Description	:This is to find that hardware is claimed by another
+ *		 driver if not claim the slot & allocate ScreenInfoRec.
+ *
+ * Parameters.
+ *     drv	:a pointer to the geode driver
+ *     flags    :flags may passed to check the config and probe detect
+ * 												
+ * Returns	:TRUE on success and FALSE on failure.
+ *
+ * Comments     :This should ne minimal probe and it should under no
+ *               circumstances change the state of the hardware.Don't do
+ *               any intiallizations other than the required
+ *               ScreenInforec.
+*----------------------------------------------------------------------------
+*/
+
+static Bool
+NscProbe(DriverPtr drv, int flags)
+{
+   Bool foundScreen = FALSE;
+   int numDevSections, numUsed;
+   GDevPtr *devSections = NULL;
+   int *usedChips = NULL;
+   int i;
+
+   GeodeDebug(("NscProbe: Probing for supported devices!\n"));
+   /*
+    * * Find the config file Device sections that match this
+    * * driver, and return if there are none.
+    */
+   if ((numDevSections = xf86MatchDevice(NSC_NAME, &devSections)) <= 0) {
+      GeodeDebug(("NscProbe: failed 1!\n"));
+      return FALSE;
+   }
+   GeodeDebug(("NscProbe: Before MatchPciInstances!\n"));
+   /* PCI BUS */
+   if (xf86GetPciVideoInfo()) {
+      numUsed = xf86MatchPciInstances(NSC_NAME, PCI_VENDOR_ID_NS,
+				      GeodeChipsets, GeodePCIchipsets,
+				      devSections, numDevSections,
+				      drv, &usedChips);
+      if (numUsed <= 0) {
+	 /* Check for old CYRIX vendor ID (5530) */
+	 numUsed = xf86MatchPciInstances(NSC_NAME,
+					 PCI_VENDOR_ID_CYRIX,
+					 GeodeChipsets, GeodePCIchipsets,
+					 devSections, numDevSections,
+					 drv, &usedChips);
+      }
+
+      GeodeDebug(("NscProbe: MatchPCI (%d)!\n", numUsed));
+
+      if (numUsed > 0) {
+	 if (flags & PROBE_DETECT)
+	    foundScreen = TRUE;
+	 else {
+	    /* Durango only supports one instance, */
+	    /* so take the first one */
+	    for (i = 0; i < numUsed; i++) {
+	       /* Allocate a ScrnInfoRec  */
+	       ScrnInfoPtr pScrn = xf86AllocateScreen(drv, 0);
+
+	       EntityInfoPtr pEnt = xf86GetEntityInfo(usedChips[i]);
+	       PciChipsets *p_id;
+
+	       for (p_id = GeodePCIchipsets; p_id->numChipset != -1; p_id++) {
+		  if (pEnt->chipset == p_id->numChipset) {
+		     CPUDetected = GX1;
+		     if (pEnt->chipset == PCI_CHIP_REDCLOUD)
+			CPUDetected = GX2;
+		     break;
+		  }
+	       }
+	       xfree(pEnt);
+	       GeodeDebug(("NscProbe: CPUDetected %d!\n", CPUDetected));
+
+	       pScrn->driverName = NSC_DRIVER_NAME;
+	       pScrn->name = NSC_NAME;
+	       pScrn->Probe = NscProbe;
+
+	       if (CPUDetected == GX1) {
+		  GX1SetupChipsetFPtr(pScrn);
+	       } else {			/* GX2 */
+		  GX2SetupChipsetFPtr(pScrn);
+	       }
+
+	       foundScreen = TRUE;
+	       xf86ConfigActivePciEntity(pScrn,
+					 usedChips[i],
+					 GeodePCIchipsets,
+					 NULL, NULL, NULL, NULL, NULL);
+	    }
+	 }
+      }
+   }
+
+   if (usedChips)
+      xfree(usedChips);
+   if (devSections)
+      xfree(devSections);
+   GeodeDebug(("NscProbe: result (%d)!\n", foundScreen));
+   return foundScreen;
+}
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/geode_fourcc.h b/xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_fourcc.h
index 0764e0037..b9e647147 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/geode_fourcc.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_fourcc.h
@@ -1,7 +1,8 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/geode_fourcc.h,v 1.1 2002/10/11 14:32:59 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_fourcc.h,v 1.2 2003/01/14 09:34:30 alanh Exp $ */
 /*
- * $Workfile: geode_fourcc.h $
- * $Revision: 1.1.1.1 $
+ * $Workfile: nsc_fourcc.h $
+ * $Revision: 1.2.2.1 $
+ * $Author: ldelgass $
  *
  * File Contents: This file consists of main Xfree video macro definitions.
  *
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_galfns.c b/xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_galfns.c
new file mode 100644
index 000000000..925d72ab4
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_galfns.c
@@ -0,0 +1,4876 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_galfns.c,v 1.3 2003/02/05 18:38:42 alanh Exp $ */
+/*
+ * $Workfile: nsc_galfns.c $
+ * $Revision: 1.2.2.1 $
+ * $Author: ldelgass $
+ *
+ * File Contents: This file contains the main functions of the Geode 
+ *                frame buffer device drivers GAL function definitions.
+ *
+ * Project:       Geode Frame buffer device driver
+ *
+ */
+
+/* 
+ * NSC_LIC_ALTERNATIVE_PREAMBLE
+ *
+ * Revision 1.0
+ *
+ * National Semiconductor Alternative GPL-BSD License
+ *
+ * National Semiconductor Corporation licenses this software 
+ * ("Software"):
+ *
+ * Geode frame buffer driver
+ *
+ * under one of the two following licenses, depending on how the 
+ * Software is received by the Licensee.
+ * 
+ * If this Software is received as part of the Linux Framebuffer or
+ * other GPL licensed software, then the GPL license designated 
+ * NSC_LIC_GPL applies to this Software; in all other circumstances 
+ * then the BSD-style license designated NSC_LIC_BSD shall apply.
+ *
+ * END_NSC_LIC_ALTERNATIVE_PREAMBLE */
+
+/* NSC_LIC_BSD
+ *
+ * National Semiconductor Corporation Open Source License for 
+ *
+ * Geode frame buffer driver
+ *
+ * (BSD License with Export Notice)
+ *
+ * Copyright (c) 1999-2001
+ * National Semiconductor Corporation.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met: 
+ *
+ *   * Redistributions of source code must retain the above copyright 
+ *     notice, this list of conditions and the following disclaimer. 
+ *
+ *   * Redistributions in binary form must reproduce the above 
+ *     copyright notice, this list of conditions and the following 
+ *     disclaimer in the documentation and/or other materials provided 
+ *     with the distribution. 
+ *
+ *   * Neither the name of the National Semiconductor Corporation nor 
+ *     the names of its contributors may be used to endorse or promote 
+ *     products derived from this software without specific prior 
+ *     written permission. 
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+ * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE,
+ * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE.
+ *
+ * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
+ * YOUR JURISDICTION. It is licensee's responsibility to comply with 
+ * any export regulations applicable in licensee's jurisdiction. Under 
+ * CURRENT (2001) U.S. export regulations this software 
+ * is eligible for export from the U.S. and can be downloaded by or 
+ * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
+ * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
+ * Syria, Sudan, Afghanistan and any other country to which the U.S. 
+ * has embargoed goods and services. 
+ *
+ * END_NSC_LIC_BSD */
+
+/* NSC_LIC_GPL
+ *
+ * National Semiconductor Corporation Gnu General Public License for 
+ *
+ * Geode frame buffer driver
+ *
+ * (GPL License with Export Notice)
+ *
+ * Copyright (c) 1999-2001
+ * National Semiconductor Corporation.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted under the terms of the GNU General 
+ * Public License as published by the Free Software Foundation; either 
+ * version 2 of the License, or (at your option) any later version  
+ *
+ * In addition to the terms of the GNU General Public License, neither 
+ * the name of the National Semiconductor Corporation nor the names of 
+ * its contributors may be used to endorse or promote products derived 
+ * from this software without specific prior written permission. 
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+ * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, 
+ * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE. See the GNU General Public License for more details. 
+ *
+ * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
+ * YOUR JURISDICTION. It is licensee's responsibility to comply with 
+ * any export regulations applicable in licensee's jurisdiction. Under 
+ * CURRENT (2001) U.S. export regulations this software 
+ * is eligible for export from the U.S. and can be downloaded by or 
+ * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
+ * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
+ * Syria, Sudan, Afghanistan and any other country to which the U.S. 
+ * has embargoed goods and services. 
+ *
+ * You should have received a copy of the GNU General Public License 
+ * along with this file; if not, write to the Free Software Foundation, 
+ * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 
+ *
+ * END_NSC_LIC_GPL */
+
+#ifndef XFree86LOADER
+#include <stdio.h>
+#include <stdarg.h>
+#include <stdlib.h>
+#include <unistd.h>
+#include <string.h>
+#include <sys/stat.h>
+#include <sys/sysmacros.h>
+#include <fcntl.h>
+#include <errno.h>
+#include <sys/ioctl.h>
+#endif
+
+#include "nsc_galproto.h"
+
+/*
+ * Compile time constants
+ */
+#define FBDEV_NAME  "/dev/nscgal"
+
+/*
+ * Cool Macros to access the structures
+ */
+#define INIT_GAL(x) \
+		((GAL_BASE *)(x))->dwSignature = FBGAL_SIGNATURE;\
+		((GAL_BASE *)(x))->dwSize = sizeof(x);\
+		((GAL_BASE *)(x))->dwVersion = FBGAL_VERSION;
+/*
+ * Variables public for this file
+ */
+static int ifbdev_handle;
+
+/*------------------------------------------------------------------------
+ * create_devicenode
+ *
+ * Description:	This function creates nscgal device node in the device
+ *					directory.
+ * parameters :	none
+ *	
+ *	return:	'0' was return on creating the galdevice node.
+ *----------------------------------------------------------------------*/
+int
+create_devicenode()
+{
+
+#if 1
+   FILE *pfdevices;
+   char line[200], devname[200];
+   int majdev;
+
+   /* remove fails if device is open */
+   remove("/dev/nscgal");
+
+   if ((pfdevices = fopen("/proc/devices", "r"))) {
+      while (fgets(line, sizeof(line), pfdevices)) {
+	 if (sscanf(line, "%d%*[ \t]%s", &majdev, devname) == 2) {
+	    if (strstr(devname, "nscgal"))
+	       mknod("/dev/nscgal", S_IFCHR | S_IRUSR | S_IWUSR,
+		     makedev(majdev, 0));
+	 }
+      }
+      fclose(pfdevices);
+   }
+   return 1;
+#endif
+
+}
+
+/*------------------------------------------------------------------------
+ * Gal_initialize_interface 
+ *
+ * Description:	This function intializes the  nscgal device .
+ * parameters :	none
+ *	
+ *	return:	 '1' was returned on intialization of the galdevice 
+ *					otherwise '0' was returned on failure.
+ *----------------------------------------------------------------------*/
+BOOLEAN
+Gal_initialize_interface()
+{
+/*	create_devicenode();  */
+
+   if ((ifbdev_handle = open("/dev/fb0", O_RDONLY)) == -1)
+/*	if ((ifbdev_handle = open("FBDEV_NAME", O_RDONLY)) == -1) */
+      return 0;
+   return 1;
+}
+
+/*------------------------------------------------------------------------
+ * Gal_cleanup_interface
+ *
+ * Description:	This function closes the  nscgal device .
+ * parameters :	none
+ *	
+ *	return:	 '1' was returned on closing the galdevice.
+ *----------------------------------------------------------------------*/
+BOOLEAN
+Gal_cleanup_interface()
+{
+   if (ifbdev_handle != -1)
+      close(ifbdev_handle);
+   return 1;
+}
+
+/*---------------------------------------------------------------------------
+ * Gal_write_register
+ *
+ * Description:	This function writes the data to the hardware register
+ *					of the nscgal device .
+ *  parameters:	
+ *        type:	It specifies the hardware access type.
+ *      offset: It specifies the offset address the register to be accessed.
+ *       value:	It specifies the data value to be written into the register.
+ *        size: It specifies the size of the data to be written. 
+ *	
+ *	return:	'1' was returned on success otherwise '0' was returned.
+ *-------------------------------------------------------------------------*/
+BOOLEAN
+Gal_write_register(int type, unsigned long offset, unsigned long value,
+		   int size)
+{
+   GAL_HWACCESS hwAccess;
+
+   INIT_GAL(&hwAccess);
+   hwAccess.dwSubfunction = GALFN_WRITEREG;
+   hwAccess.dwType = type;
+   hwAccess.dwOffset = offset;
+   hwAccess.dwValue = value;
+   hwAccess.dwByteCount = size;
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &hwAccess))
+      return 0;
+   else {
+      return 1;
+   }
+}
+
+/*---------------------------------------------------------------------------
+ * Gal_read_register
+ *
+ * Description:	This function reads the data from the hardware register
+ *					of the nscgal device .
+ *  parameters:	
+ *        type:	It specifies the hardware access type.
+ *      offset: It specifies the offset address of the register to be accessed.
+ *       value:	It specifies the pointer to hold the data  to be read from
+ *					the gal hardware register.
+ *        size: It specifies the size of the data to be read
+ *	
+ *	return:	'1' was returned on success otherwise '0' was returned.
+ *-------------------------------------------------------------------------*/
+BOOLEAN
+Gal_read_register(int type, unsigned long offset, unsigned long *value,
+		  int size)
+{
+   GAL_HWACCESS hwAccess;
+
+   INIT_GAL(&hwAccess);
+   hwAccess.dwSubfunction = GALFN_READREG;
+   hwAccess.dwType = type;
+   hwAccess.dwOffset = offset;
+   hwAccess.dwByteCount = size;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &hwAccess))
+      return 0;
+   else {
+      *value = hwAccess.dwValue;
+      return 1;
+   }
+}
+
+/*---------------------------------------------------------------------------
+ * Gal_get_adapter_info
+ *
+ * Description:	This function gets the adapter information of the
+ *					nscgal device .
+ *  parameters:	
+ *pAdapterInfo: It specifies the adapter information structure.     
+ *	
+ *	return:	'1' was returned on success otherwise '0' was returned.
+ *-------------------------------------------------------------------------*/
+BOOLEAN
+Gal_get_adapter_info(PGAL_ADAPTERINFO pAdapterInfo)
+{
+   INIT_GAL(pAdapterInfo);
+
+   pAdapterInfo->dwSubfunction = GALFN_GETADAPTERINFO;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, pAdapterInfo))
+      return 0;
+   else {
+      return 1;
+   }
+}
+
+/*---------------------------------------------------------------------------
+ * Gal_set_softvga_state 
+ *
+ * Description:	This function sets the softvga state of the platform device .
+ *  parameters:	
+ *     bEnable:	It specifies the softvga state enable state.    
+ *	return:	'1' was returned on success otherwise '0' was returned.
+ *-------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_softvga_state(BOOLEAN bEnable)
+{
+   GAL_SOFTVGASTATE sSoftVgaState;
+
+   INIT_GAL(&sSoftVgaState);
+   sSoftVgaState.dwSubfunction = GALFN_SETSOFTVGASTATE;
+   sSoftVgaState.bSoftVgaEnable = bEnable;
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSoftVgaState))
+      return 0;
+   else
+      return 1;
+}
+
+/*---------------------------------------------------------------------------
+ * Gal_get_softvga_state 
+ *
+ * Description:	This function gets the softvga state of the platform device .
+ *  parameters:	
+ *     bEnable:	get the softvga state.    
+ *	return:	'1' was returned on success otherwise '0' was returned.
+ *-------------------------------------------------------------------------*/
+BOOLEAN
+Gal_get_softvga_state(int *bState)
+{
+   GAL_SOFTVGASTATE sSoftVgaState;
+
+   INIT_GAL(&sSoftVgaState);
+   sSoftVgaState.dwSubfunction = GALFN_GETSOFTVGASTATE;
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSoftVgaState))
+      return 0;
+   else {
+      *bState = sSoftVgaState.bSoftVgaEnable;
+      return 1;
+   }
+}
+
+/*---------------------------------------------------------------------------
+ * Gal_vga_test_pci
+ *
+ * Description:	This function tests the vga pci.
+ *  parameters:	
+ *     softvga:	It is pointer to the softvga state.    
+ *	return:	'1' was returned on success otherwise '0' was returned.
+ *-------------------------------------------------------------------------*/
+BOOLEAN
+Gal_vga_test_pci(int *softvga)
+{
+   GAL_VGATESTPCI sVgatestpci;
+
+   INIT_GAL(&sVgatestpci);
+   sVgatestpci.dwSubfunction = GALFN_GETSOFTVGASTATE;
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sVgatestpci))
+      return 0;
+   else {
+      *softvga = sVgatestpci.softvga;
+      return 1;
+   }
+}
+
+/*---------------------------------------------------------------------------
+ * Gal_vga_get_pci_command
+ *
+ * Description:	This function gets the vga pci command.
+ *  parameters:	
+ *       value:	It is pointer to pci command value.    
+ *	return:	'1' was returned on success otherwise '0' was returned.
+ *-------------------------------------------------------------------------*/
+BOOLEAN
+Gal_vga_get_pci_command(unsigned char *value)
+{
+   GAL_VGAGETPCICOMMAND sVgagetpcicommand;
+
+   INIT_GAL(&sVgagetpcicommand);
+   sVgagetpcicommand.dwSubfunction = GALFN_VGAGETPCICOMMAND;
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sVgagetpcicommand))
+      return 0;
+   else {
+      *value = sVgagetpcicommand.value;
+      return 1;
+   }
+}
+
+/*---------------------------------------------------------------------------
+ * Gal_vga_seq_reset
+ *
+ * Description:	This function resets the vga seq.
+ *  parameters:	
+ *       reset:	It gives the reset value.    
+ *	return:	'1' was returned on success otherwise '0' was returned.
+ *-------------------------------------------------------------------------*/
+BOOLEAN
+Gal_vga_seq_reset(int reset)
+{
+   GAL_VGASEQRESET sVgaseqreset;
+
+   INIT_GAL(&sVgaseqreset);
+   sVgaseqreset.dwSubfunction = GALFN_VGASEQRESET;
+   sVgaseqreset.reset = reset;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sVgaseqreset))
+      return 0;
+   else {
+      return 1;
+   }
+}
+
+/*---------------------------------------------------------------------------
+ * Gal_vga_set_graphics_bits
+ *
+ * Description:	This function resets the vga seq.
+ *  parameters:	None.
+ *        
+ *	return:	'1' was returned on success otherwise '0' was returned.
+ *-------------------------------------------------------------------------*/
+BOOLEAN
+Gal_vga_set_graphics_bits(void)
+{
+   GAL_VGASETGRAPHICSBITS sVgasetgraphics;
+
+   INIT_GAL(&sVgasetgraphics);
+   sVgasetgraphics.dwSubfunction = GALFN_VGASETGRAPHICSBITS;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sVgasetgraphics))
+      return 0;
+   else {
+      return 1;
+   }
+}
+
+/*---------------------------------------------------------------------------
+ * Gal_set_crt_enable
+ *
+ * Description:	This function sets the crt state of the device .
+ *  parameters:	
+ *    crtState:	It specifies the crt state of the galdevice.
+ *	return:	'1' was returned on success otherwise '0' was returned.
+ *-------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_crt_enable(int crtEnable)
+{
+   GAL_CRTENABLE sCrtEnable;
+
+   INIT_GAL(&sCrtEnable);
+   sCrtEnable.dwSubfunction = GALFN_SETCRTENABLE;
+   sCrtEnable.wCrtEnable = crtEnable;
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sCrtEnable))
+      return 0;
+   else
+      return 1;
+}
+
+/*---------------------------------------------------------------------------
+ * Gal_is_display_mode_supported 
+ *
+ * Description:	This function checks the display mode is supported or not.
+ *  parameters:	
+ *        xres:	It specifies x co-ordinate resolution.
+ *        Yres:	It specifies y co-ordinate resolution.  
+ *	   bpp:	It specifies the bits per pixel (8/16 bits).
+ *	    hz:	It specifies the frequency of the display mode.
+ *	return:	'1' was returned on success otherwise '0' was returned.
+ *-------------------------------------------------------------------------*/
+BOOLEAN
+Gal_is_display_mode_supported(int xres, int yres, int bpp, int hz,
+			      int *supported)
+{
+   GAL_DISPLAYMODE sDisplayMode;
+
+   *supported = 0;
+   INIT_GAL(&sDisplayMode);
+   sDisplayMode.dwSubfunction = GALFN_ISDISPLAYMODESUPPORTED;
+   sDisplayMode.wXres = xres;
+   sDisplayMode.wYres = yres;
+   sDisplayMode.wBpp = bpp;
+   sDisplayMode.wRefresh = hz;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sDisplayMode))
+      return 0;
+   else {
+      *supported = sDisplayMode.dwSupported;
+      return 1;
+   }
+}
+
+/*---------------------------------------------------------------------------
+ * Gal_set_display_mode
+ *
+ * Description:	This function sets the display mode of the galdevice.
+ *  parameters:	
+ *        xres:	It specifies x co-ordinate resolution.
+ *        Yres:	It specifies y co-ordinate resolution.  
+ *	   bpp:	It specifies the bits per pixel (8/16 bits).
+ *	    hz:	It specifies the frequency of the display mode.
+ *	return:	'1' was returned on success otherwise '0' was returned.
+ *-------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_display_mode(int xres, int yres, int bpp, int hz)
+{
+   GAL_DISPLAYMODE sDisplayMode;
+
+   INIT_GAL(&sDisplayMode);
+   sDisplayMode.dwSubfunction = GALFN_SETDISPLAYMODE;
+   sDisplayMode.wXres = xres;
+   sDisplayMode.wYres = yres;
+   sDisplayMode.wBpp = bpp;
+   sDisplayMode.wRefresh = hz;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sDisplayMode))
+      return 0;
+   else
+      return 1;
+}
+
+/*---------------------------------------------------------------------------
+ * Gal_get_display_mode
+ *
+ * Description:	This function gets the display mode of the galdevice.
+ *  parameters:	
+ *        xres:	It specifies x co-ordinate resolution.
+ *        Yres:	It specifies y co-ordinate resolution.  
+ *	   bpp:	It specifies the bits per pixel (8/16 bits).
+ *	    hz:	It specifies the frequency of the display mode.
+ *	return:	'1' was returned on success otherwise '0' was returned.
+ *-------------------------------------------------------------------------*/
+BOOLEAN
+Gal_get_display_mode(int *xres, int *yres, int *bpp, int *hz)
+{
+   GAL_DISPLAYMODE sDisplayMode;
+
+   INIT_GAL(&sDisplayMode);
+   sDisplayMode.dwSubfunction = GALFN_GETDISPLAYMODE;
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sDisplayMode))
+      return 0;
+   else {
+      *xres = sDisplayMode.wXres;
+      *yres = sDisplayMode.wYres;
+      *bpp = sDisplayMode.wBpp;
+      *hz = sDisplayMode.wRefresh;
+      return 1;
+   }
+}
+
+/*---------------------------------------------------------------------------
+ * Gal_set_display_bpp
+ *
+ * Description:	This function sets the number bits per pixel in the display
+ *					mode of the galdevice.
+ *  parameters:	
+ *	   bpp:	It specifies the bits per pixel (8/16 bits).
+ *	return:	'1' was returned on success otherwise '0' was returned.
+ *-------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_display_bpp(unsigned short bpp)
+{
+   GAL_DISPLAYPARAMS sDisplayParams;
+
+   INIT_GAL(&sDisplayParams);
+   sDisplayParams.dwSubfunction = GALFN_SETDISPLAYBPP;
+   sDisplayParams.wBpp = bpp;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sDisplayParams))
+      return 0;
+   else
+      return 1;
+}
+
+/*---------------------------------------------------------------------------
+ * Gal_set_bpp
+ *
+ * Description:	This function sets the number bits per pixel in the display
+ *					mode of the galdevice.
+ *  parameters:	
+ *	   bpp:	It specifies the bits per pixel (8/16 bits).
+ *	return:	'1' was returned on success otherwise '0' was returned.
+ *-------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_bpp(unsigned short bpp)
+{
+   GAL_DISPLAYPARAMS sDisplayParams;
+
+   INIT_GAL(&sDisplayParams);
+   sDisplayParams.dwSubfunction = GALFN_SETBPP;
+   sDisplayParams.wBpp = bpp;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sDisplayParams))
+      return 0;
+   else
+      return 1;
+}
+
+/*---------------------------------------------------------------------------
+ * Gal_get_display_bpp
+ *
+ * Description:	This function gets the number bits per pixel in the display
+ *					mode of the galdevice.
+ *  parameters:	
+ *	   bpp:	It specifies the bits per pixel (8/16 bits).
+ *	return:	'1' was returned on success otherwise '0' was returned.
+ *-------------------------------------------------------------------------*/
+BOOLEAN
+Gal_get_display_bpp(unsigned short *bpp)
+{
+   GAL_DISPLAYPARAMS sDisplayParams;
+
+   INIT_GAL(&sDisplayParams);
+   sDisplayParams.dwSubfunction = GALFN_GETDISPLAYBPP;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sDisplayParams))
+      return 0;
+   else {
+      *bpp = sDisplayParams.wBpp;
+      return 1;
+   }
+}
+
+/*---------------------------------------------------------------------------
+ * Gal_set_display_pitch
+ *
+ * Description:	This function sets the display pitch of the galdevice.
+ *  parameters:	
+ *       pitch:	It specifies pitch of the display mode.
+ *	return:	'1' was returned on success otherwise '0' was returned.
+ *-------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_display_pitch(unsigned short pitch)
+{
+   GAL_DISPLAYPARAMS sDisplayParams;
+
+   INIT_GAL(&sDisplayParams);
+   sDisplayParams.dwSubfunction = GALFN_SETDISPLAYPITCH;
+   sDisplayParams.wPitch = pitch;
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sDisplayParams))
+      return 0;
+   else
+      return 1;
+}
+
+/*---------------------------------------------------------------------------
+ * Gal_get_display_pitch
+ *
+ * Description:	This function gets the display pitch of the galdevice.
+ *  parameters:	
+ *       pitch:	It specifies pitch of the display mode.
+ *	return:	'1' was returned on success otherwise '0' was returned.
+ *-------------------------------------------------------------------------*/
+BOOLEAN
+Gal_get_display_pitch(unsigned short *pitch)
+{
+   GAL_DISPLAYPARAMS sDisplayParams;
+
+   INIT_GAL(&sDisplayParams);
+   sDisplayParams.dwSubfunction = GALFN_GETDISPLAYPITCH;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sDisplayParams))
+      return 0;
+   else {
+      *pitch = sDisplayParams.wPitch;
+      return 1;
+   }
+}
+
+/*---------------------------------------------------------------------------
+ * Gal_set_display_offset
+ *
+ * Description:	This function sets the offset of display parameters.
+ *  parameters:	
+ *      offset:	It specifies the offset address of display parameters.
+ *	return:	'1' was returned on success otherwise '0' was returned.
+ *-------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_display_offset(unsigned long offset)
+{
+   GAL_DISPLAYPARAMS sDisplayParams;
+
+   INIT_GAL(&sDisplayParams);
+   sDisplayParams.dwSubfunction = GALFN_SETDISPLAYOFFSET;
+   sDisplayParams.dwOffset = offset;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sDisplayParams))
+      return 0;
+   else
+      return 1;
+}
+
+/*---------------------------------------------------------------------------
+ * Gal_get_display_offset
+ *
+ * Description:	This function gets the offset of display parameters.
+ *  parameters:	
+ *      offset:	It specifies the offset address of display parameters.
+ *	return:	'1' was returned on success otherwise '0' was returned.
+ *-------------------------------------------------------------------------*/
+BOOLEAN
+Gal_get_display_offset(unsigned long *offset)
+{
+   GAL_DISPLAYPARAMS sDisplayParams;
+
+   INIT_GAL(&sDisplayParams);
+   sDisplayParams.dwSubfunction = GALFN_GETDISPLAYOFFSET;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sDisplayParams))
+      return 0;
+   else {
+      *offset = sDisplayParams.dwOffset;
+      return 1;
+   }
+}
+
+/*---------------------------------------------------------------------------
+ * Gal_get_refreshrate_from_dotclock
+ *
+ * Description:	This function gets the refreshrate from dotclock.
+ *  parameters:	
+ *        xres:	It specifies x co-ordinate resolution.
+ *        Yres:	It specifies y co-ordinate resolution.  
+ *	   bpp:	It specifies the bits per pixel (8/16 bits).
+ *	    hz:	It is a pointer which holds the refresh rate of the display.
+ *   frequency:	It spcifies the frequency of the dotclock.
+ *	return:	'1' was returned on success otherwise '0' was returned.
+ *-------------------------------------------------------------------------*/
+BOOLEAN
+Gal_get_refreshrate_from_dotclock(int xres, int yres, int bpp, int *hz,
+				  unsigned long frequency)
+{
+   GAL_DOTCLKTOREFRESH sDclkToRefresh;
+
+   INIT_GAL(&sDclkToRefresh);
+   sDclkToRefresh.dwSubfunction = GALFN_DOTCLKTOREFRESH;
+   sDclkToRefresh.wXres = xres;
+   sDclkToRefresh.wYres = yres;
+   sDclkToRefresh.wBpp = bpp;
+   sDclkToRefresh.dwDotClock = frequency;
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sDclkToRefresh))
+      return 0;
+   else {
+      *hz = sDclkToRefresh.wRefreshRate;
+      return 1;
+   }
+}
+
+/*---------------------------------------------------------------------------
+ * Gal_get_display_timing
+ *
+ *    Description:	This function gets the display timing from galdevice.
+ *     parameters:	
+ * pDisplayTiming:	It specifies the display timing of the galdevice.
+ *	   return:	'1' was returned on success otherwise '0' was returned.
+ *-------------------------------------------------------------------------*/
+BOOLEAN
+Gal_get_display_timing(PGAL_DISPLAYTIMING pDisplayTiming)
+{
+   INIT_GAL(pDisplayTiming);
+   pDisplayTiming->dwSubfunction = GALFN_GETDISPLAYTIMINGS;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, pDisplayTiming))
+      return 0;
+   else {
+      return 1;
+   }
+}
+
+/*---------------------------------------------------------------------------
+ * Gal_set_display_timing
+ *
+ *    Description:	This function sets the display timing of the galdevice. 
+ *     parameters:	
+ * pDisplayTiming:	It specifies the display timing of the galdevice.
+ *	   return:	'1' was returned on success otherwise '0' was returned.
+ *-------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_display_timing(PGAL_DISPLAYTIMING pDisplayTiming)
+{
+   INIT_GAL(pDisplayTiming);
+   pDisplayTiming->dwSubfunction = GALFN_SETDISPLAYTIMINGS;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, pDisplayTiming))
+      return 0;
+   else
+      return 1;
+}
+
+/*---------------------------------------------------------------------------
+ * Gal_set_fixed_timings
+ *
+ *    Description:	This function sets the fixed display timings of the 
+ *						galdevice. 
+ *     parameters:
+ *	  pnlXres:	It specifies the panel X resolution.
+ *	  pnlYres:	It specifies the panel Y resolution.
+ *        totXres:  It specifies the total X resolution.  
+ *        totYres:  It specifies the total Y resolution.
+ *	      bpp:	It specifies the bits per pixel (8/16 bits).
+ *	   return:	'1' was returned on success otherwise '0' was returned.
+ *-------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_fixed_timings(int pnlXres, int pnlYres, int totXres,
+		      int totYres, int bpp)
+{
+   GAL_DISPLAYTIMING DisplayTiming;
+
+   INIT_GAL(&DisplayTiming);
+   DisplayTiming.dwSubfunction = GALFN_SETFIXEDTIMINGS;
+   DisplayTiming.wHActive = pnlXres;	/* panel Xres */
+   DisplayTiming.wVActive = pnlYres;	/* panel Yres */
+   DisplayTiming.wHTotal = totXres;	/* Total Xres */
+   DisplayTiming.wVTotal = totYres;	/* Total Yres */
+   DisplayTiming.wBpp = bpp;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &DisplayTiming))
+      return 0;
+   else
+      return 1;
+}
+
+/*---------------------------------------------------------------------------
+ * Gal_set_display_palette_entry
+ *
+ *    Description:	This function sets the display palette entry of the 
+ *						galdevice. 
+ *     parameters:
+ *	    index:	It specifies the palette index,
+ *        palette:	It specifies the palette of the galdevice. 
+ *	   return:	'1' was returned on success otherwise '0' was returned.
+ *-------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_display_palette_entry(unsigned long index, unsigned long palette)
+{
+   GAL_PALETTE_ENTRY sPalette;
+
+   INIT_GAL(&sPalette);
+   sPalette.dwSubfunction = GALFN_SETPALETTE_ENTRY;
+   sPalette.dwIndex = index;
+   sPalette.dwPalette = palette;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sPalette))
+      return 0;
+   else
+      return 1;
+}
+
+/*---------------------------------------------------------------------------
+ * Gal_get_display_palette_entry
+ *
+ *    Description:	This function gets the display palette entry of the 
+ *						galdevice. 
+ *     parameters:
+ *          index:	It specifies the palette index,
+ *        palette:	It is a pointer to the palette of the galdevice. 
+ *	   return:	'1' was returned on success otherwise '0' was returned.
+ *-------------------------------------------------------------------------*/
+BOOLEAN
+Gal_get_display_palette_entry(unsigned long index, unsigned long *palette)
+{
+   GAL_PALETTE_ENTRY sPalette;
+
+   INIT_GAL(&sPalette);
+   sPalette.dwSubfunction = GALFN_GETPALETTE_ENTRY;
+   sPalette.dwIndex = index;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sPalette))
+      return 0;
+   else {
+      *palette = sPalette.dwPalette;
+      return 1;
+   }
+}
+
+/*---------------------------------------------------------------------------
+ * Gal_set_display_palette_entry
+ *
+ *    Description:	This function sets the display palette entry of the 
+ *						galdevice. 
+ *     parameters:
+ *       pPalette:	It specifies the palette structure of the galdevice. 
+ *	   return:	'1' was returned on success otherwise '0' was returned.
+ *-------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_display_palette(PGAL_PALETTE pPalette)
+{
+   INIT_GAL(pPalette);
+   pPalette->dwSubfunction = GALFN_SETPALETTE;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, pPalette))
+      return 0;
+   else
+      return 1;
+}
+
+/*---------------------------------------------------------------------------
+ * Gal_get_display_palette_entry
+ *
+ *    Description:	This function gets the display palette entry of the 
+ *						galdevice. 
+ *     parameters:
+ *       pPalette:	It specifies the palette structure of the galdevice. 
+ *	   return:	'1' was returned on success otherwise '0' was returned.
+ *-------------------------------------------------------------------------*/
+BOOLEAN
+Gal_get_display_palette(PGAL_PALETTE pPalette)
+{
+   INIT_GAL(pPalette);
+   pPalette->dwSubfunction = GALFN_GETPALETTE;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, pPalette))
+      return 0;
+   else {
+      return 1;
+   }
+}
+
+/*---------------------------------------------------------------------------
+ * Gal_wait_until_idle
+ *
+ *    Description:	This function waits until the graphics engine is idle. 
+ *     parameters:	none.
+ *	   return:	'1' was returned on success otherwise '0' was returned.
+ *-------------------------------------------------------------------------*/
+BOOLEAN
+Gal_wait_until_idle(void)
+{
+   GAL_WAITUNTILIDLE sWaitIdle;
+
+   INIT_GAL(&sWaitIdle);
+   sWaitIdle.dwSubfunction = GALFN_WAITUNTILIDLE;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sWaitIdle))
+      return 0;
+   else
+      return 1;
+}
+
+/*---------------------------------------------------------------------------
+ * Gal_wait_vertical_blank
+ *
+ *    Description:	This function wait until start of vertical blank.
+ *     parameters:	none.
+ *	   return:	'1' was returned on success otherwise '0' was returned.
+ *-------------------------------------------------------------------------*/
+BOOLEAN
+Gal_wait_vertical_blank(void)
+{
+   GAL_WAITVERTICALBLANK sWaitVerticalBlank;
+
+   INIT_GAL(&sWaitVerticalBlank);
+   sWaitVerticalBlank.dwSubfunction = GALFN_WAITVERTICALBLANK;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sWaitVerticalBlank))
+      return 0;
+   else
+      return 1;
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_cursor_enable
+ *
+ * Description:	This function enable or disable the hardware cursor.
+ *  parameters:
+ *      enable:	This specifies the enable value of the cursor.
+ *      return:	'1' was returned on success otherwise '0' was returned.
+ *-------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_cursor_enable(int enable)
+{
+   GAL_CURSORENABLE sCursorEnable;
+
+   INIT_GAL(&sCursorEnable);
+   sCursorEnable.dwSubfunction = GALFN_SETCURSORENABLE;
+   sCursorEnable.bCursorEnable = enable ? 1 : 0;
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sCursorEnable))
+      return 0;
+   else
+      return 1;
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_cursor_position
+ *
+ * Description:	This function sets the position of the cursor.
+ *  parameters:
+ *   memoffset:	It specifies the memory offset of the cursor position.
+ *        xpos: It specifies the X co-ordinate position of the cursor.
+ *        ypos: It specifies the Y co-ordinate position of the cursor.
+ *    xhotspot: It specifies the X hotspot location for current cursor shape.
+ *    yhotspot: It specifies the Y hotspot location for current cursor shape. 
+ *      return:	'1' was returned on success otherwise '0' was returned.
+ *-------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_cursor_position(unsigned long memoffset,
+			unsigned short xpos, unsigned short ypos,
+			unsigned short xhotspot, unsigned short yhotspot)
+{
+   GAL_CURSORPOSITION sCursorPos;
+
+   INIT_GAL(&sCursorPos);
+   sCursorPos.dwSubfunction = GALFN_SETCURSORPOSITION;
+   sCursorPos.dwMemOffset = memoffset;
+   sCursorPos.wXPos = xpos;
+   sCursorPos.wYPos = ypos;
+   sCursorPos.wXHot = xhotspot;
+   sCursorPos.wYHot = yhotspot;
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sCursorPos))
+      return 0;
+   else
+      return 1;
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_get_cursor_position
+ *
+ * Description:	This function gets the cursor position.
+ *  parameters:
+ *   memoffset:	It points the memory offset of the cursor position.
+ *        xpos: It points the X co-ordinate position of the cursor.
+ *        ypos: It points  the Y co-ordinate position of the cursor.
+ *    xhotspot: It points the X hotspot location for current cursor shape.
+ *    yhotspot: It points  the Y hotspot location for current cursor shape. 
+ *      return:	'1' was returned on success otherwise '0' was returned.
+ *-------------------------------------------------------------------------*/
+BOOLEAN
+Gal_get_cursor_position(unsigned long *memoffset,
+			unsigned short *xpos, unsigned short *ypos,
+			unsigned short *xhotspot, unsigned short *yhotspot)
+{
+   GAL_CURSORPOSITION sCursorPos;
+
+   INIT_GAL(&sCursorPos);
+   sCursorPos.dwSubfunction = GALFN_GETCURSORPOSITION;
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sCursorPos))
+      return 0;
+   else {
+      *memoffset = sCursorPos.dwMemOffset;
+      *xpos = sCursorPos.wXPos;
+      *ypos = sCursorPos.wYPos;
+      *xhotspot = sCursorPos.wXHot;
+      *yhotspot = sCursorPos.wYHot;
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_cursor_shape32
+ *
+ * Description:	This function loads 32x32 cursor pattern.
+ *  parameters:
+ *   memoffset:	It specifies the graphics memory offset for cursor shape.
+ *     andmask:	It is a pointer to 32 DWORD of AND data.
+ *     xormask:	It is a pointer to 32 DWORD of XOR data.
+ *      return:	'1' was returned on success otherwise '0' was returned.
+ *-------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_cursor_shape32(unsigned long memoffset,
+		       unsigned long *andmask, unsigned long *xormask)
+{
+   GAL_SETCURSORSHAPE sCursorShape;
+
+   INIT_GAL(&sCursorShape);
+   sCursorShape.dwSubfunction = GALFN_SETCURSORSHAPE;
+   sCursorShape.dwMemOffset = memoffset;
+
+   memcpy(sCursorShape.dwAndMask, andmask, sizeof(sCursorShape.dwAndMask));
+
+   memcpy(sCursorShape.dwXorMask, xormask, sizeof(sCursorShape.dwXorMask));
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sCursorShape))
+      return 0;
+   else
+      return 1;
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_cursor_shape64
+ *
+ * Description:	This function loads 64x64 cursor pattern.
+ *  parameters:
+ *   memoffset:	It specifies the graphics memory offset for cursor shape.
+ *     andmask:	It is a pointer to 64 DWORD of AND data.
+ *     xormask:	It is a pointer to 64 DWORD of XOR data.
+ *      return:	'1' was returned on success otherwise '0' was returned.
+ *-------------------------------------------------------------------------*/ BOOLEAN
+Gal_set_cursor_shape64(unsigned long memoffset,
+		       unsigned long *andmask, unsigned long *xormask)
+{
+   GAL_SETCURSORSHAPE sCursorShape;
+
+   INIT_GAL(&sCursorShape);
+   sCursorShape.dwSubfunction = GALFN_SETCURSORSHAPE_RCLD;
+   sCursorShape.dwMemOffset = memoffset;
+
+   memcpy(sCursorShape.dwAndMask, andmask, sizeof(sCursorShape.dwAndMask));
+
+   memcpy(sCursorShape.dwXorMask, xormask, sizeof(sCursorShape.dwXorMask));
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sCursorShape))
+      return 0;
+   else
+      return 1;
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_cursor_colors
+ *
+ * Description:	This function sets the colors of the hardware cursor.
+ *  parameters:
+ *     bkcolor:It specifies the RGB value for the background color.
+ *     fgcolor:It specifies the RGB value for the foreground color.
+ *      return:	'1' was returned on success otherwise '0' was returned.
+ *-------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_cursor_colors(unsigned long bkcolor, unsigned long fgcolor)
+{
+   GAL_CURSORCOLORS sCursorColor;
+
+   INIT_GAL(&sCursorColor);
+   sCursorColor.dwSubfunction = GALFN_SETCURSORCOLORS;
+   sCursorColor.dwBgColor = bkcolor;
+   sCursorColor.dwFgColor = fgcolor;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sCursorColor))
+      return 0;
+   else
+      return 1;
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_get_cursor_colors
+ *
+ * Description:	This function gets the colors of the hardware cursor.
+ *  parameters:
+ *     bkcolor:It points the RGB value for the background color.
+ *     fgcolor:It points the RGB value for the foreground color.
+ *      return:	'1' was returned on success otherwise '0' was returned.
+ *-------------------------------------------------------------------------*/
+BOOLEAN
+Gal_get_cursor_colors(unsigned long *bkcolor, unsigned long *fgcolor)
+{
+   GAL_CURSORCOLORS sCursorColor;
+
+   INIT_GAL(&sCursorColor);
+   sCursorColor.dwSubfunction = GALFN_GETCURSORCOLORS;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sCursorColor))
+      return 0;
+   else {
+      *bkcolor = sCursorColor.dwBgColor;
+      *fgcolor = sCursorColor.dwFgColor;
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_solid_pattern
+ *
+ * Description:	This function sets a solid pattern color for future rendering.
+ *  parameters:
+ *       color:	It specifies the pattern color in proper format for current 
+ *					display mode.
+ *      return:	'1' was returned on success otherwise '0' was returned.
+ *-------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_solid_pattern(unsigned long color)
+{
+   GAL_SETSOLIDPATTERN sSetSoildPat;
+
+   INIT_GAL(&sSetSoildPat);
+   sSetSoildPat.dwSubfunction = GALFN_SETSOLIDPATTERN;
+   sSetSoildPat.dwColor = color;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetSoildPat))
+      return 0;
+   else
+      return 1;
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_solid_source
+ *
+ * Description:	This function specifies a constant source data value for 
+ *				raster operations that use both pattern 
+ *				and source data.
+ *  parameters:
+ *       color:	It specifies the source color.
+ *      return:	'1' was returned on success otherwise '0' was returned.
+ *-------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_solid_source(unsigned long color)
+{
+   GAL_SETSOLIDSOURCE sSetSolidSrc;
+
+   INIT_GAL(&sSetSolidSrc);
+   sSetSolidSrc.dwSubfunction = GALFN_SETSOLIDSOURCE;
+   sSetSolidSrc.dwColor = color;
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetSolidSrc))
+      return 0;
+   else
+      return 1;
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_mono_source
+ *
+ * Description:	
+ *  parameters:
+ *     bkcolor: It specifies the background color.
+ *     fgcolor: It specifies the foreground color.
+ *transparency:	It specifies the transparency flag.
+ *      return:	'1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_mono_source(unsigned long bgcolor, unsigned long fgcolor,
+		    unsigned char transparency)
+{
+   GAL_SETMONOSOURCE sSetMonoSrc;
+
+   INIT_GAL(&sSetMonoSrc);
+   sSetMonoSrc.dwSubfunction = GALFN_SETMONOSOURCE;
+   sSetMonoSrc.dwFgColor = fgcolor;
+   sSetMonoSrc.dwBgColor = bgcolor;
+   sSetMonoSrc.cTransparency = transparency;
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetMonoSrc))
+      return 0;
+   else
+      return 1;
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_mono_pattern
+ *
+ * Description:	This function specifies an 8x8 monochrome pattern 
+ *				used in future rendering operations.
+ *  parameters:
+ *     bkcolor: It specifies the background color.
+ *     fgcolor: It specifies the foreground color.
+ *		 data0: It specifies the bits of 8x8 monochrome pattern.
+ *       data1: It specifies the bits of 8x8 monochrome pattern.
+ *transparency:	It specifies the transparency flag.
+ *      return:	'1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_mono_pattern(unsigned long bgcolor, unsigned long fgcolor,
+		     unsigned long data0, unsigned long data1,
+		     unsigned char transparency)
+{
+   GAL_SETMONOPATTERN sSetMonoPat;
+
+   INIT_GAL(&sSetMonoPat);
+   sSetMonoPat.dwSubfunction = GALFN_SETMONOPATTERN;
+   sSetMonoPat.dwFgColor = fgcolor;
+   sSetMonoPat.dwBgColor = bgcolor;
+   sSetMonoPat.dwData0 = data0;
+   sSetMonoPat.dwData1 = data1;
+   sSetMonoPat.cTransparency = transparency;
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetMonoPat))
+      return 0;
+   else
+      return 1;
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_raster_operation
+ *
+ * Description:	This function specifies the raster operation for 
+ *					future rendering.  
+ *  parameters:
+ *         rop: It specifies the ternary raster operation
+ *					(pattern/source/destination).
+ *      return:	'1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_raster_operation(unsigned char rop)
+{
+   GAL_RASTEROPERATION sSetRop;
+
+   INIT_GAL(&sSetRop);
+   sSetRop.dwSubfunction = GALFN_SETRASTEROPERATION;
+   sSetRop.cRop = rop;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetRop))
+      return 0;
+   else
+      return 1;
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_pattern_fill
+ *
+ * Description:	This function renders pattern data to a rectangular 
+ *					region. 
+ *  parameters:
+ *           x:	It specifies the screen X position, in pixels.
+ *           y:	It specifies the screen Y position, in pixels.
+ *       width:	It specifies the width of rectangle, in pixels.
+ *      height:	It specifies the height of rectangle, in pixels.
+ *      return:	'1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_pattern_fill(unsigned short x, unsigned short y,
+		 unsigned short width, unsigned short height)
+{
+   GAL_PATTERNFILL sPatternFill;
+
+   INIT_GAL(&sPatternFill);
+   sPatternFill.dwSubfunction = GALFN_PATTERNFILL;
+   sPatternFill.wXPos = x;
+   sPatternFill.wYPos = y;
+   sPatternFill.wWidth = width;
+   sPatternFill.wHeight = height;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sPatternFill))
+      return 0;
+   else
+      return 1;
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_screen_to_screen_blt
+ *
+ * Description:	This function is used to perform a screen to screen 
+ *				BLT operation. 
+ *  parameters:
+ *        srcx:	It specifies the source X position.
+ *        srcy:	It specifies the source Y position.
+ *        dstx:	It specifies the destination X position.
+ *        dsty:	It specifies the destination Y position.
+ *       width: It specifies the width of BLT, in pixels.
+ *      height: It specifies the height of BLT, in pixels.
+ *      return:	'1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_screen_to_screen_blt(unsigned short srcx, unsigned short srcy,
+			 unsigned short dstx, unsigned short dsty,
+			 unsigned short width, unsigned short height)
+{
+   GAL_SCREENTOSCREENBLT sScreenBlt;
+
+   INIT_GAL(&sScreenBlt);
+   sScreenBlt.dwSubfunction = GALFN_SCREENTOSCREENBLT;
+   sScreenBlt.wXStart = srcx;
+   sScreenBlt.wYStart = srcy;
+   sScreenBlt.wXEnd = dstx;
+   sScreenBlt.wYEnd = dsty;
+   sScreenBlt.wWidth = width;
+   sScreenBlt.wHeight = height;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sScreenBlt))
+      return 0;
+   else
+      return 1;
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_screen_to_screen_xblt
+ *
+ * Description:	This function is used to perform a screen to screen 
+ *				BLT operation using a transparency color. 
+ *  parameters:
+ *        srcx:	It specifies the source X position.
+ *        srcy:	It specifies the source Y position.
+ *        dstx:	It specifies the destination X position.
+ *        dsty:	It specifies the destination Y position.
+ *       width: It specifies the width of BLT, in pixels.
+ *      height: It specifies the height of BLT, in pixels.
+ *       color: It specifies the transparency color.
+ *      return:	'1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_screen_to_screen_xblt(unsigned short srcx, unsigned short srcy,
+			  unsigned short dstx, unsigned short dsty,
+			  unsigned short width, unsigned short height,
+			  unsigned long color)
+{
+   GAL_SCREENTOSCREENXBLT sScreenXBlt;
+
+   INIT_GAL(&sScreenXBlt);
+   sScreenXBlt.dwSubfunction = GALFN_SCREENTOSCREENXBLT;
+   sScreenXBlt.wXStart = srcx;
+   sScreenXBlt.wYStart = srcy;
+   sScreenXBlt.wXEnd = dstx;
+   sScreenXBlt.wYEnd = dsty;
+   sScreenXBlt.wWidth = width;
+   sScreenXBlt.wHeight = height;
+   sScreenXBlt.dwColor = color;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sScreenXBlt))
+      return 0;
+   else
+      return 1;
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_bresenham_line
+ *
+ * Description:	This function is used to draw a single pixel line
+ *					using the specified Bresenham parameters. 
+ *  parameters:
+ *           x:	It specifies the starting X position.
+ *           y:	It specifies the starting Y position.
+ *      length:	It specifies the length of the vector, in pixels.
+ *     initerr:	It specifies the Bresenham initial error term.
+ *    axialerr:	It specifies the Bresenham axial error term
+ *					(moving in major direction only).
+ *     diagerr: It specifies Bresenham diagonal error term
+ *					(moving in major and minor direction.
+ *       flags: It specifies the flag.
+ *      return:	'1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_bresenham_line(unsigned short x, unsigned short y,
+		   unsigned short length, unsigned short initerr,
+		   unsigned short axialerr, unsigned short diagerr,
+		   unsigned short flags)
+{
+   GAL_BRESENHAMLINE sBresenhamLine;
+
+   INIT_GAL(&sBresenhamLine);
+   sBresenhamLine.dwSubfunction = GALFN_BRESENHAMLINE;
+   sBresenhamLine.wX1 = x;
+   sBresenhamLine.wY1 = y;
+   sBresenhamLine.wLength = length;
+   sBresenhamLine.wErr = initerr;
+   sBresenhamLine.wE1 = axialerr;
+   sBresenhamLine.wE2 = diagerr;
+   sBresenhamLine.wFlags = flags;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sBresenhamLine))
+      return 0;
+   else
+      return 1;
+}
+
+BOOLEAN
+Gal_color_pattern_fill(unsigned short x, unsigned short y,
+		       unsigned short width, unsigned short height,
+		       unsigned long pattern)
+{
+   GAL_COLOR_PATTERNFILL sColorPat;
+
+   INIT_GAL(&sColorPat);
+   sColorPat.dwSubfunction = GALFN_COLOR_PATTERNFILL;
+   sColorPat.wDstx = x;
+   sColorPat.wDsty = y;
+   sColorPat.wWidth = width;
+   sColorPat.wHeight = height;
+   sColorPat.dwPattern = pattern;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sColorPat))
+      return 0;
+   else
+      return 1;
+}
+
+BOOLEAN
+Gal_color_bitmap_to_screen_blt(unsigned short srcx, unsigned short srcy,
+			       unsigned short dstx, unsigned short dsty,
+			       unsigned short width, unsigned short height,
+			       unsigned long data, long pitch)
+{
+   GAL_COLOR_BITMAP_TO_SCREEN_BLT sBmp2Scr;
+
+   INIT_GAL(&sBmp2Scr);
+   sBmp2Scr.dwSubfunction = GALFN_COLOR_BITMAP_TO_SCREEN_BLT;
+   sBmp2Scr.wSrcx = srcx;
+   sBmp2Scr.wSrcy = srcy;
+   sBmp2Scr.wDstx = dstx;
+   sBmp2Scr.wDsty = dsty;
+   sBmp2Scr.wWidth = width;
+   sBmp2Scr.wHeight = height;
+   sBmp2Scr.dwData = data;
+   sBmp2Scr.wPitch = pitch;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sBmp2Scr))
+      return 0;
+   else
+      return 1;
+}
+
+BOOLEAN
+Gal_color_bitmap_to_screen_xblt(unsigned short srcx, unsigned short srcy,
+				unsigned short dstx, unsigned short dsty,
+				unsigned short width, unsigned short height,
+				unsigned long data, long pitch,
+				unsigned long color)
+{
+   GAL_COLOR_BITMAP_TO_SCREEN_XBLT sBmp2Scr;
+
+   INIT_GAL(&sBmp2Scr);
+   sBmp2Scr.dwSubfunction = GALFN_COLOR_BITMAP_TO_SCREEN_XBLT;
+   sBmp2Scr.wSrcx = srcx;
+   sBmp2Scr.wSrcy = srcy;
+   sBmp2Scr.wDstx = dstx;
+   sBmp2Scr.wDsty = dsty;
+   sBmp2Scr.wWidth = width;
+   sBmp2Scr.wHeight = height;
+   sBmp2Scr.dwData = data;
+   sBmp2Scr.wPitch = pitch;
+   sBmp2Scr.dwColor = color;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sBmp2Scr))
+      return 0;
+   else
+      return 1;
+}
+
+BOOLEAN
+Gal_mono_bitmap_to_screen_blt(unsigned short srcx, unsigned short srcy,
+			      unsigned short dstx, unsigned short dsty,
+			      unsigned short width, unsigned short height,
+			      unsigned long data, short pitch)
+{
+   GAL_MONO_BITMAP_TO_SCREEN_BLT sBmp2Scr;
+
+   INIT_GAL(&sBmp2Scr);
+   sBmp2Scr.dwSubfunction = GALFN_MONO_BITMAP_TO_SCREEN_BLT;
+   sBmp2Scr.wSrcx = srcx;
+   sBmp2Scr.wSrcy = srcy;
+   sBmp2Scr.wDstx = dstx;
+   sBmp2Scr.wDsty = dsty;
+   sBmp2Scr.wWidth = width;
+   sBmp2Scr.wHeight = height;
+   sBmp2Scr.dwData = data;
+   sBmp2Scr.wPitch = pitch;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sBmp2Scr))
+      return 0;
+   else
+      return 1;
+}
+
+BOOLEAN
+Gal_text_blt(unsigned short dstx, unsigned short dsty, unsigned short width,
+	     unsigned short height, unsigned long data)
+{
+   GAL_TEXT_BLT sTextBlt;
+
+   INIT_GAL(&sTextBlt);
+   sTextBlt.dwSubfunction = GALFN_TEXT_BLT;
+   sTextBlt.wDstx = dstx;
+   sTextBlt.wDsty = dsty;
+   sTextBlt.wWidth = width;
+   sTextBlt.wHeight = height;
+   sTextBlt.dwData = data;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sTextBlt))
+      return 0;
+   else
+      return 1;
+}
+
+/*------------------------------------------------------------------------
+ * Gal_set_compression_enable
+ *
+ *       Description:	This function enables or disables display 
+ * 			compression.
+ *	  parameters:
+ * bCompressionState:	It specifies the display compression state.  
+ *  	      return:	'1' was returned on success otherwise 
+ *			'0' was returned.
+ *----------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_compression_enable(BOOLEAN bCompressionState)
+{
+   GAL_COMPRESSIONSTATE sCompState;
+
+   INIT_GAL(&sCompState);
+   sCompState.dwSubfunction = GALFN_SETCOMPRESSIONSTATE;
+   sCompState.bCompressionState = bCompressionState;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sCompState))
+      return 0;
+   else
+      return 1;
+}
+
+/*------------------------------------------------------------------------
+ * Gal_get_compression_enable
+ *
+ * 	Description:	This function gets the compression state.
+ *
+ *	  parameters:
+ * bCompressionState:	gets the display compression state.  
+ *	      return:	'1' was returned on success otherwise 
+ *			'0' was returned.
+ *----------------------------------------------------------------------*/
+BOOLEAN
+Gal_get_compression_enable(int *bCompressionState)
+{
+   GAL_COMPRESSIONSTATE sCompState;
+
+   INIT_GAL(&sCompState);
+   sCompState.dwSubfunction = GALFN_GETCOMPRESSIONSTATE;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sCompState))
+      return 0;
+   else {
+      *bCompressionState = sCompState.bCompressionState;
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_compression_parameters
+ *
+ * Description:	This function sets the compression parameters of the
+ * 			frame buffer device.
+ *  parameters:
+ *       flags:	It specifies the flag.
+ *      offset:	It specifies the base offset in graphics memory for the 
+ *			compression buffer.
+ *	 pitch:	It specifies the pitch of compression buffer, in bytes.
+ *        size:	It specifies the maximum line size of the compression buffer
+ *			in bytes.
+ *      return:	'1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_compression_parameters(unsigned long flags,
+			       unsigned long offset, unsigned short pitch,
+			       unsigned short size)
+{
+   GAL_COMPRESSIONPARAMS sCompParams;
+
+   INIT_GAL(&sCompParams);
+   sCompParams.dwSubfunction = GALFN_SETCOMPRESSIONPARAMS;
+   sCompParams.dwFlags = flags;
+   sCompParams.dwCompOffset = offset;
+   sCompParams.dwCompPitch = pitch;
+   sCompParams.dwCompSize = size;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sCompParams))
+      return 0;
+   else
+      return 1;
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_get_compression_parameters
+ *
+ * Description:	This function gets the compression parameters of the
+ *				frame buffer device.
+ *  parameters:
+ *       flags:	It specifies the flag.
+ *      offset:	gets the base offset in graphics memory for the 
+ *					compression buffer.
+ *		 pitch:	gets the pitch of compression buffer, in bytes.
+ *        size:	gets the maximum line size of the compression buffer
+ *					in bytes.
+ *      return:	'1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_get_compression_parameters(unsigned long flags,
+			       unsigned long *offset,
+			       unsigned short *pitch, unsigned short *size)
+{
+   GAL_COMPRESSIONPARAMS sCompParams;
+
+   INIT_GAL(&sCompParams);
+   sCompParams.dwSubfunction = GALFN_GETCOMPRESSIONPARAMS;
+   sCompParams.dwFlags = flags;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sCompParams))
+      return 0;
+   else {
+      *offset = sCompParams.dwCompOffset;
+      *pitch = sCompParams.dwCompPitch;
+      *size = sCompParams.dwCompSize;
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_vga_mode_switch
+ *
+ * Description:This function signals the beginning or end of a 
+ *				mode switch.  
+ *  parameters:
+ *      active:	It specifies the mode switch.
+ *      return:	'1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_vga_mode_switch(int active)
+{
+   GAL_VGAMODEDATA sVgaData;
+
+   INIT_GAL(&sVgaData);
+   sVgaData.dwSubfunction = GALFN_VGAMODESWITCH;
+   sVgaData.dwFlags = active;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sVgaData))
+      return 0;
+   else
+      return 1;
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_vga_clear_extended
+ *
+ * Description:	This will clear the Svga data.
+ *  parameters:	none.
+ *      return:	'1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_vga_clear_extended(void)
+{
+   GAL_VGAMODEDATA sVgaData;
+
+   INIT_GAL(&sVgaData);
+   sVgaData.dwSubfunction = GALFN_VGACLEARCRTEXT;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sVgaData))
+      return 0;
+   else
+      return 1;
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_vga_pitch
+ *
+ * Description:	This function sets VGA register values in VGA 
+ *					structure for specified pitch. 
+ *  parameters:
+ *    pVgaData: It specifies the vga structure.
+ *		 pitch:	It specifies the number of bytes between scanlines.
+ *      return:	'1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_vga_pitch(PGAL_VGAMODEDATA pVgaData, unsigned short pitch)
+{
+   INIT_GAL(pVgaData);
+   pVgaData->dwSubfunction = GALFN_VGASETPITCH;
+   pVgaData->dwFlags = pitch;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, pVgaData))
+      return 0;
+   else {
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_vga_restore
+ *
+ * Description:	This function sets the VGA state to the values in the
+ *				VGA structure.  
+ *  parameters:
+ *    pVgaData: It specifies the vga structure.
+ *      return:	'1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_vga_restore(PGAL_VGAMODEDATA pVgaData)
+{
+   INIT_GAL(pVgaData);
+   pVgaData->dwSubfunction = GALFN_VGARESTORE;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, pVgaData))
+      return 0;
+   else
+      return 1;
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_vga_save
+ *
+ * Description:	This function saves the current VGA state in the
+ *					VGA structure.  
+ *  parameters:
+ *    pVgaData: It specifies the vga structure.
+ *      return:	'1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_vga_save(PGAL_VGAMODEDATA pVgaData)
+{
+   INIT_GAL(pVgaData);
+   pVgaData->dwSubfunction = GALFN_VGASAVE;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, pVgaData))
+      return 0;
+   else {
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_vga_mode
+ *
+ * Description:	This function sets VGA register values in VGA 
+ *					structure for specified mode. 
+ *  parameters:
+ *    pVgaData: It specifies the vga structure.
+ *      return:	'1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_vga_mode(PGAL_VGAMODEDATA pVgaData)
+{
+   INIT_GAL(pVgaData);
+   pVgaData->dwSubfunction = GALFN_VGASETMODE;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, pVgaData))
+      return 0;
+   else {
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_pnl_enabled_in_bios
+ *
+ * Description:	This function gets the status of the FP in BIOS.
+ *  parameters:
+ *       status: returns the state of FP in Bios.
+ *	pParam:	It specifies the panel parameters structure.
+ *      return:	'1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_pnl_enabled_in_bios(int *state)
+{
+   GAL_PNLBIOS pStat;
+
+   INIT_GAL(&pStat);
+   pStat.dwSubfunction = GALFN_PNLBIOSENABLE;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &pStat))
+      return 0;
+   else {
+      *state = pStat.state;
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_pnl_info_from_bios
+ *
+ * Description:	This function gets the parameters of the FP in BIOS.
+ *  parameters:
+ *       status: returns the state of FP in Bios.
+ *	pParam:	It specifies the panel parameters structure.
+ *      return:	'1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_pnl_info_from_bios(int *xres, int *yres, int *bpp, int *hz)
+{
+   GAL_PNLBIOS pStat;
+
+   INIT_GAL(&pStat);
+   pStat.dwSubfunction = GALFN_PNLBIOSINFO;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &pStat))
+      return 0;
+   else {
+      *xres = pStat.XRes;
+      *yres = pStat.YRes;
+      *bpp = pStat.Bpp;
+      *hz = pStat.Freq;
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_pnl_set_params
+ *
+ * Description:	This function sets the panel parameters. 
+ *  parameters:
+ *       flags: 
+ *	pParam:	It specifies the panel parameters structure.
+ *      return:	'1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_pnl_set_params(unsigned long flags, PPnl_PanelParams pParam)
+{
+   GAL_PNLPARAMS pStat;
+
+   INIT_GAL(&pStat);
+   pStat.dwSubfunction = GALFN_PNLSETPARAMS;
+   pParam->Flags = flags;
+   memcpy(&(pStat.PanelParams), pParam, sizeof(Pnl_PanelParams));
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &pStat))
+      return 0;
+   else {
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_pnl_get_params
+ *
+ * Description:	This function gets the panel parameters. 
+ *  parameters:
+ *       flags:
+ *	pParam:	It specifies the panel parameters structure.
+ *      return:	'1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_pnl_get_params(unsigned long flags, PPnl_PanelParams pParam)
+{
+   GAL_PNLPARAMS pStat;
+
+   INIT_GAL(&pStat);
+   pStat.dwSubfunction = GALFN_PNLGETPARAMS;
+   memcpy(&(pStat.PanelParams), pParam, sizeof(Pnl_PanelParams));
+   pStat.PanelParams.Flags = flags;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &pStat))
+      return 0;
+   else {
+      memcpy(pParam, &(pStat.PanelParams), sizeof(Pnl_PanelParams));
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_pnl_init
+ *
+ * Description:	This function initializes the panel parameters. 
+ *  parameters:
+ *	pParam:	It specifies the panel parameters structure.
+ *      return:	'1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_pnl_init(PPnl_PanelParams pParam)
+{
+   GAL_PNLPARAMS pStat;
+
+   INIT_GAL(&pStat);
+   pStat.dwSubfunction = GALFN_PNLINITPANEL;
+   memcpy(&(pStat.PanelParams), pParam, sizeof(Pnl_PanelParams));
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &pStat))
+      return 0;
+   else
+      return 1;
+
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_pnl_save
+ *
+ * Description:	This function saves the current panel parameters. 
+ *  parameters:	none.
+ *      return:	'1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_pnl_save(void)
+{
+   GAL_PNLPARAMS pStat;
+
+   INIT_GAL(&pStat);
+   pStat.dwSubfunction = GALFN_PNLSAVESTATE;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &pStat))
+      return 0;
+   else {
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_pnl_restore
+ *
+ * Description:	This function restores the current panel parameters. 
+ *  parameters:	none.
+ *      return:	'1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_pnl_restore(void)
+{
+   GAL_PNLPARAMS pStat;
+
+   INIT_GAL(&pStat);
+   pStat.dwSubfunction = GALFN_PNLRESTORESTATE;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &pStat))
+      return 0;
+   else {
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_pnl_powerup
+ *
+ * Description:	This function powers up the panel. 
+ *  parameters:	none.
+ *      return:	'1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_pnl_powerup(void)
+{
+   GAL_BASE pStat;
+
+   INIT_GAL(&pStat);
+   pStat.dwSubfunction = GALFN_PNLPOWERUP;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &pStat))
+      return 0;
+   else {
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_pnl_powerdown
+ *
+ * Description:	This function powers down the panel. 
+ *  parameters:	none.
+ *      return:	'1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_pnl_powerdown(void)
+{
+   GAL_BASE pStat;
+
+   INIT_GAL(&pStat);
+   pStat.dwSubfunction = GALFN_PNLPOWERDOWN;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &pStat))
+      return 0;
+   else {
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_tv_set_params
+ *
+ * Description:	This function sets the tv parameters of
+ *					tvparameters structure. 
+ *  parameters:
+ *       flags:
+ *	   pTV:	It specifies the tv parameters structure.
+ *      return:	'1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_tv_set_params(unsigned long flags, PGAL_TVPARAMS pTV)
+{
+   INIT_GAL(pTV);
+   pTV->dwSubfunction = GALFN_SETTVPARAMS;
+   pTV->dwFlags = flags;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, pTV))
+      return 0;
+   else {
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_tv_get_params
+ *
+ * Description:	This function gets the tv parameters of
+ *					tvparameters structure. 
+ *  parameters:
+ *       flags: Dummy flag
+ *	   pTV:	It specifies the tv parameters structure.
+ *      return:	'1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_tv_get_params(unsigned long flags, PGAL_TVPARAMS pTV)
+{
+   INIT_GAL(pTV);
+   pTV->dwSubfunction = GALFN_GETTVPARAMS;
+   pTV->dwFlags = flags;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, pTV))
+      return 0;
+   else
+      return 1;
+
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_tv_set_timings
+ *
+ * Description:	This function sets the tv timing registers.
+ *  parameters:
+ *       flags:	Dummy flag.
+ *	   pTV:	It specifies the tv parameters structure.
+ *      return:	'1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_tv_set_timings(unsigned long flags, PGAL_TVTIMING pTV)
+{
+   INIT_GAL(pTV);
+   pTV->dwSubfunction = GALFN_SETTVTIMING;
+   pTV->dwFlags = flags;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, pTV))
+      return 0;
+   else {
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_tv_get_timings
+ *
+ * Description:	This function gets the tv timing registers.
+ *  parameters:
+ *       flags:	Dummy flag.
+ *	   pTV:	It specifies the tv parameters structure.
+ *      return:	'1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_tv_get_timings(unsigned long flags, PGAL_TVTIMING pTV)
+{
+   INIT_GAL(pTV);
+   pTV->dwSubfunction = GALFN_GETTVTIMING;
+   pTV->dwFlags = flags;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, pTV))
+      return 0;
+   else {
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_tv_enable
+ *
+ * Description:	This function sets the tv state of the device .
+ *  parameters: 
+ *     bState : set the tv state.
+ *      return:	'1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_tv_enable(int bState)
+{
+   GAL_TVPARAMS pTV;
+
+   INIT_GAL(&pTV);
+   pTV.dwSubfunction = GALFN_SETENABLE;
+   pTV.bState = bState;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &pTV))
+      return 0;
+   else {
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_get_tv_enable
+ *
+ * Description:	This function gets the tv state of the device .
+ *  parameters: 
+ *     bState : get the tv state.
+ *      return:	'1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_get_tv_enable(unsigned int *bState)
+{
+   GAL_TVPARAMS pTV;
+
+   INIT_GAL(&pTV);
+   pTV.dwSubfunction = GALFN_GETENABLE;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &pTV)) {
+      *bState = 0;
+      return 0;
+   } else {
+      *bState = pTV.bState;
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_is_tv_mode_supported
+ *
+ * Description:	This function checks the tv mode is supported or not.
+ *  parameters:
+ *       flags: Dummy flag
+ *	   pTV:	It specifies the tv parameters structure.
+ *      return:	'1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_is_tv_mode_supported(unsigned long flags, PGAL_TVPARAMS pTV, int *bState)
+{
+   INIT_GAL(pTV);
+   pTV->dwSubfunction = GALFN_ISTVMODESUPPORTED;
+   pTV->dwFlags = flags;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, pTV)) {
+      return 0;
+   } else {
+      *bState = pTV->bState;
+      return 1;
+   }
+}
+
+/** Video **********************************************************/
+
+/*--------------------------------------------------------------------------
+ * Gal_set_video_enable
+ *
+ * Description:	This function sets the video enable state.
+ *  parameters:
+ *      enable: Its value is '1' to enable video and '0' to disable video.
+ *      return:	'1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_video_enable(int enable)
+{
+   GAL_VIDEOENABLE sSetVideo;
+
+   INIT_GAL(&sSetVideo);
+   sSetVideo.dwSubfunction = GALFN_SETVIDEOENABLE;
+   sSetVideo.enable = enable;
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetVideo))
+      return 0;
+   else
+      return 1;
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_video_format
+ *
+ * Description:	This function sets the video format.
+ *  parameters:
+ *      format: Its video format value.
+ *      return:	'1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_video_format(int format)
+{
+   GAL_VIDEOFORMAT sSetVideo;
+
+   INIT_GAL(&sSetVideo);
+   sSetVideo.dwSubfunction = GALFN_SETVIDEOFORMAT;
+   sSetVideo.format = format;
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetVideo))
+      return 0;
+   else
+      return 1;
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_video_size
+ *
+ * Description:	This function sets the video size.
+ *  parameters:
+ *       width: Width of the video.
+ *      height: Height of the video.
+ *      return:	'1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_video_size(unsigned short width, unsigned short height)
+{
+   GAL_VIDEOSIZE sSetVideo;
+
+   INIT_GAL(&sSetVideo);
+   sSetVideo.dwSubfunction = GALFN_SETVIDEOSIZE;
+   sSetVideo.width = width;
+   sSetVideo.height = height;
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetVideo))
+      return 0;
+   else
+      return 1;
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_video_offset
+ *
+ * Description:	This function sets the video size.
+ *  parameters:
+ *      offset: Offset of the video.
+ *      return:	'1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_video_offset(unsigned long offset)
+{
+   GAL_VIDEOOFFSET sSetVideo;
+
+   INIT_GAL(&sSetVideo);
+   sSetVideo.dwSubfunction = GALFN_SETVIDEOOFFSET;
+   sSetVideo.offset = offset;
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetVideo))
+      return 0;
+   else
+      return 1;
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_video_window
+ *
+ * Description:	This function sets the video window.
+ *  parameters:
+ *			 x: X co-ordinate of the Video screen.
+ *			 y: Y co-ordinate of the Video screen.
+ *			 w: Width of the Video screen.
+ *           h: Height of the Video screen.
+ *      return:	'1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_video_window(short x, short y, short w, short h)
+{
+   GAL_VIDEOWINDOW sSetVideo;
+
+   INIT_GAL(&sSetVideo);
+   sSetVideo.dwSubfunction = GALFN_SETVIDEOWINDOW;
+   sSetVideo.x = x;
+   sSetVideo.y = y;
+   sSetVideo.w = w;
+   sSetVideo.h = h;
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetVideo))
+      return 0;
+   else
+      return 1;
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_video_scale
+ *
+ * Description:	This function sets the video scale.
+ *  parameters:
+ *		  srcw: Source width.
+ *		  srch: Source height.
+ *		  dstw: Destination width.
+ *        dsth: Destination height.
+ *      return:	'1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_video_scale(unsigned short srcw, unsigned short srch,
+		    unsigned short dstw, unsigned short dsth)
+{
+   GAL_VIDEOSCALE sSetVideo;
+
+   INIT_GAL(&sSetVideo);
+   sSetVideo.dwSubfunction = GALFN_SETVIDEOSCALE;
+   sSetVideo.srcw = srcw;
+   sSetVideo.srch = srch;
+   sSetVideo.dstw = dstw;
+   sSetVideo.dsth = dsth;
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetVideo))
+      return 0;
+   else
+      return 1;
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_video_filter.
+ *
+ * Description:	This function sets the video filter.
+ *  parameters:
+ *	   xfilter: X-co-ordinate filter.
+ *	   yfilter: Y-co-ordinate filter.
+ *      return:	'1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_video_filter(int xfilter, int yfilter)
+{
+   GAL_VIDEOFILTER sSetVideo;
+
+   INIT_GAL(&sSetVideo);
+   sSetVideo.dwSubfunction = GALFN_SETVIDEOFILTER;
+   sSetVideo.xfilter = xfilter;
+   sSetVideo.yfilter = yfilter;
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetVideo))
+      return 0;
+   else
+      return 1;
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_video_color_key.
+ *
+ * Description:	This function sets the video color key.
+ *  parameters:
+ *	       key: Color key.
+ *	      mask: Color mask.
+ *  bluescreen: Value for bluescreen.
+ *      return:	'1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_video_color_key(unsigned long key, unsigned long mask, int bluescreen)
+{
+   GAL_VIDEOCOLORKEY sSetVideo;
+
+   INIT_GAL(&sSetVideo);
+   sSetVideo.dwSubfunction = GALFN_SETVIDEOCOLORKEY;
+   sSetVideo.key = key;
+   sSetVideo.mask = mask;
+   sSetVideo.bluescreen = bluescreen;
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetVideo))
+      return 0;
+   else
+      return 1;
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_video_downscale_enable.
+ *
+ * Description:	This function sets the video downscale enable state.
+ *  parameters:
+ *	    enable: Value for enable or disable the video downscale.
+ *      return:	'1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_video_downscale_enable(int enable)
+{
+   GAL_VIDEODOWNSCALEENABLE sSetVideo;
+
+   INIT_GAL(&sSetVideo);
+   sSetVideo.dwSubfunction = GALFN_SETVIDEODOWNSCALEENABLE;
+   sSetVideo.enable = enable;
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetVideo))
+      return 0;
+   else
+      return 1;
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_video_downscale_config.
+ *
+ * Description:	This function sets the video downscale configuration.
+ *  parameters:
+ *	      type: Video down scale type.
+ *			 m: Factor for the Video overlay window.
+ *      return:	'1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_video_downscale_config(unsigned short type, unsigned short m)
+{
+   GAL_VIDEODOWNSCALECONFIG sSetVideo;
+
+   INIT_GAL(&sSetVideo);
+   sSetVideo.dwSubfunction = GALFN_SETVIDEODOWNSCALECONFIG;
+   sSetVideo.type = type;
+   sSetVideo.m = m;
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetVideo))
+      return 0;
+   else
+      return 1;
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_video_downscale_coefficients.
+ *
+ * Description:	This function sets the video downscale coefficients.
+ *  parameters:
+ *	     coef1: Video downscale filter coefficient.
+ *	     coef2: Video downscale filter coefficient.
+ *	     coef3: Video downscale filter coefficient.
+ *	     coef4: Video downscale filter coefficient.
+ *      return:	'1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_video_downscale_coefficients(unsigned short coef1,
+				     unsigned short coef2,
+				     unsigned short coef3,
+				     unsigned short coef4)
+{
+   GAL_VIDEODOWNSCALECOEFF sSetVideo;
+
+   INIT_GAL(&sSetVideo);
+   sSetVideo.dwSubfunction = GALFN_SETVIDEODOWNSCALECOEFF;
+   sSetVideo.coef1 = coef1;
+   sSetVideo.coef2 = coef2;
+   sSetVideo.coef3 = coef3;
+   sSetVideo.coef4 = coef4;
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetVideo))
+      return 0;
+   else
+      return 1;
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_video_source.
+ *
+ * Description:	This function sets the video source to either memory or Direct
+ *				VIP  
+ *  parameters:
+ *	    source: Video source.
+ *      return:	'1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_video_source(int source)
+{
+   GAL_VIDEOSOURCE sSetVideo;
+
+   INIT_GAL(&sSetVideo);
+   sSetVideo.dwSubfunction = GALFN_SETVIDEOSOURCE;
+   sSetVideo.source = source;
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetVideo))
+      return 0;
+   else
+      return 1;
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_video_interlaced
+ *
+ * Description:	This function configures the Video processor video overlay mode 
+ *				to be interlaced YUV.
+ *  parameters:
+ *	    enable: Value used to enable or disalbe the Video interlaced.
+ *      return:	'1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+
+BOOLEAN
+Gal_set_video_interlaced(int enable)
+{
+   GAL_SETVIDEOINTERLACED sSetVideo;
+
+   INIT_GAL(&sSetVideo);
+   sSetVideo.dwSubfunction = GALFN_SETVIDEOINTERLACED;
+   sSetVideo.enable = enable;
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetVideo))
+      return 0;
+   else
+      return 1;
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_video_color_space
+ *
+ * Description:	This function configures the Video processor to prcoess 
+ *				graphics and video in either YUV or RGB color space. 
+ *				
+ *  parameters:
+ *	    enable: Value used to enable or disalbe the Video color space.
+ *      return:	'1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_color_space_YUV(int colorspace)
+{
+   GAL_COLORSPACEYUV sSetVideo;
+
+   INIT_GAL(&sSetVideo);
+   sSetVideo.dwSubfunction = GALFN_SETVIDEOCOLORSPACE;
+   sSetVideo.colorspace = colorspace;
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetVideo))
+      return 0;
+   else
+      return 1;
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_video_cursor.
+ *
+ *  Description: This function configures the Video Hardware cursor.
+ *	     		 
+ *				
+ *   parameters:
+ *          key: color key.
+ *		   mask: color mask.
+ *select_color2: selected for color2.
+ *		 color1: color1 value.
+ *		 color2: color2 value.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_video_cursor(unsigned long key,
+		     unsigned long mask,
+		     unsigned short select_color2,
+		     unsigned long color1, unsigned long color2)
+{
+   GAL_VIDEOCURSOR sSetVideo;
+
+   INIT_GAL(&sSetVideo);
+   sSetVideo.dwSubfunction = GALFN_SETVIDEOCURSOR;
+   sSetVideo.key = key;
+   sSetVideo.mask = mask;
+   sSetVideo.select_color2 = select_color2;
+   sSetVideo.color1 = color1;
+   sSetVideo.color2 = color2;
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetVideo))
+      return 0;
+   else
+      return 1;
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_video_request.
+ *
+ *  Description: This function sets the horizontal(pixel) and vertical(line) 
+ *				 video request values.
+ *	     		 
+ *   parameters:
+ *            x: X video request value.
+ *		      y: Y video request value.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_video_request(short x, short y)
+{
+   GAL_VIDEOREQUEST sSetVideo;
+
+   INIT_GAL(&sSetVideo);
+   sSetVideo.dwSubfunction = GALFN_SETVIDEOREQUEST;
+   sSetVideo.x = x;
+   sSetVideo.y = y;
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetVideo))
+      return 0;
+   else
+      return 1;
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_alpha_enable.
+ *
+ *  Description: This function enables or disables the currently selected 
+ *				 alpha region.
+ *	     		 
+ *   parameters:
+ *       enable: Value to enalbe or disable alha region.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_alpha_enable(int enable)
+{
+   GAL_ALPHAENABLE sSetVideo;
+
+   INIT_GAL(&sSetVideo);
+   sSetVideo.dwSubfunction = GALFN_SETALPHAENABLE;
+   sSetVideo.enable = enable;
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetVideo))
+      return 0;
+   else
+      return 1;
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_get_alpha_enable.
+ *
+ *  Description: This function gets the alpha enable state.
+ *	     		 
+ *   parameters:
+ *       enable: Pointer to get the enable state.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_get_alpha_enable(int *enable)
+{
+   GAL_ALPHAENABLE sGetalphaenable;
+
+   INIT_GAL(&sGetalphaenable);
+   sGetalphaenable.dwSubfunction = GALFN_GETALPHAENABLE;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sGetalphaenable))
+      return 0;
+   else
+
+      *enable = sGetalphaenable.enable;
+   return 1;
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_alpha_window
+ *
+ *  Description: This function sets the size of the currently selected 
+ *				 alpha region.  		 
+ *   parameters:
+ *			  x: X co-ordinate of the alpha region.
+ *			  y: Y co-ordinate of the alpha region.
+ *	      width: Width of the alpha region.
+ *		 height: Height of the alpha region.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_alpha_window(short x, short y,
+		     unsigned short width, unsigned short height)
+{
+   GAL_ALPHAWINDOW sSetVideo;
+
+   INIT_GAL(&sSetVideo);
+   sSetVideo.dwSubfunction = GALFN_SETALPHAWINDOW;
+   sSetVideo.x = x;
+   sSetVideo.y = y;
+   sSetVideo.width = width;
+   sSetVideo.height = height;
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetVideo))
+      return 0;
+   else
+      return 1;
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_get_alpha_size
+ *
+ *  Description: This function gets the size of the currently selected 
+ *				 alpha region.  		 
+ *   parameters:
+ *			  x: X co-ordinate of the alpha region.
+ *			  y: Y co-ordinate of the alpha region.
+ *	      width: Width of the alpha region.
+ *		 height: Height of the alpha region.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_get_alpha_size(unsigned short *x, unsigned short *y,
+		   unsigned short *width, unsigned short *height)
+{
+   GAL_ALPHASIZE sGetalphasize;
+
+   INIT_GAL(&sGetalphasize);
+   sGetalphasize.dwSubfunction = GALFN_GETALPHASIZE;
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sGetalphasize))
+      return 0;
+   else {
+      *x = *(sGetalphasize.x);
+      *y = *(sGetalphasize.y);
+      *width = *(sGetalphasize.width);
+      *height = *(sGetalphasize.height);
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_alpha_value
+ *
+ *  Description: This function sets the alpha value for the selected alpha
+ *				 region. It also specifies an increment/decrement value for
+ *				 fading.
+ *   parameters:
+ *		  alpha: Alpha value for the currently selected alpha region.
+ *		  delta: Gives the increment/decrement fading value.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_alpha_value(unsigned char alpha, char delta)
+{
+   GAL_ALPHAVALUE sSetVideo;
+
+   INIT_GAL(&sSetVideo);
+   sSetVideo.dwSubfunction = GALFN_SETALPHAVALUE;
+   sSetVideo.alpha = alpha;
+   sSetVideo.delta = delta;
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetVideo))
+      return 0;
+   else
+      return 1;
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_get_alpha_value
+ *
+ *  Description: This function gets the alpha value for the selected alpha
+ *				 region. It also gets increment/decrement value for
+ *				 fading.
+ *   parameters:
+ *		  alpha: Alpha value for the currently selected alpha region.
+ *		  delta: Gives the increment/decrement fading value.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_get_alpha_value(unsigned char *alpha, char *delta)
+{
+   GAL_ALPHAVALUE sGetalphavalue;
+
+   INIT_GAL(&sGetalphavalue);
+   sGetalphavalue.dwSubfunction = GALFN_GETALPHAVALUE;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sGetalphavalue))
+      return 0;
+   else {
+      *alpha = sGetalphavalue.alpha;
+      *delta = sGetalphavalue.delta;
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_alpha_priority
+ *
+ *  Description: This function sets the priority of the selected alpha
+ *				 region. 
+ *   parameters:
+ *	   priority: Gives the priority value.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_alpha_priority(int priority)
+{
+   GAL_ALPHAPRIORITY sSetVideo;
+
+   INIT_GAL(&sSetVideo);
+   sSetVideo.dwSubfunction = GALFN_SETALPHAPRIORITY;
+   sSetVideo.priority = priority;
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetVideo))
+      return 0;
+   else
+      return 1;
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_get_alpha_priority
+ *
+ *  Description: This function gets the priority of the selected alpha
+ *				 region. 
+ *   parameters:
+ *	   priority: Gives the priority value.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_get_alpha_priority(int *priority)
+{
+   GAL_ALPHAPRIORITY sGetalphapriority;
+
+   INIT_GAL(&sGetalphapriority);
+   sGetalphapriority.dwSubfunction = GALFN_GETALPHAPRIORITY;
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sGetalphapriority))
+      return 0;
+   else {
+      *priority = sGetalphapriority.priority;
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_alpha_color
+ *
+ *  Description: This function sets the color to be displayed inside the 
+ *				 currently of the selected alpha window. 
+ *   parameters:
+ *	      color: Gives the color value to be displayed.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_alpha_color(unsigned long color)
+{
+   GAL_ALPHACOLOR sSetVideo;
+
+   INIT_GAL(&sSetVideo);
+   sSetVideo.dwSubfunction = GALFN_SETALPHACOLOR;
+   sSetVideo.color = color;
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetVideo))
+      return 0;
+   else
+      return 1;
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_get_alpha_color
+ *
+ *  Description: This function gets the color to be displayed inside the 
+ *				 currently of the selected alpha window. 
+ *   parameters:
+ *	      color: Gives the color value to be displayed.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_get_alpha_color(unsigned long *color)
+{
+   GAL_ALPHACOLOR sGetalphacolor;
+
+   INIT_GAL(&sGetalphacolor);
+   sGetalphacolor.dwSubfunction = GALFN_GETALPHACOLOR;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sGetalphacolor))
+      return 0;
+   else {
+      *color = sGetalphacolor.color;
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_select_alpha_region
+ *
+ *  Description: This function selects the alpha region should be used for 
+ *				 future updates. 
+ *   parameters:
+ *	     region: Gives the alpha window number.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_select_alpha_region(int region)
+{
+   GAL_ALPHAREGION sSetVideo;
+
+   INIT_GAL(&sSetVideo);
+   sSetVideo.dwSubfunction = GALFN_SETALPHAREGION;
+   sSetVideo.region = region;
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetVideo))
+      return 0;
+   else
+      return 1;
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_video_outside_alpha
+ *
+ *  Description: This function enable/disable the video outside alpha region. 
+ *   parameters:
+ *	     enable: Gives the value for enable/disable.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_video_outside_alpha(int enable)
+{
+   GAL_VIDEOOUTSIDEALPHA sSetVideo;
+
+   INIT_GAL(&sSetVideo);
+   sSetVideo.dwSubfunction = GALFN_SETVIDEOOUTSIDEALPHA;
+   sSetVideo.enable = enable;
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetVideo))
+      return 0;
+   else
+      return 1;
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_video_palette
+ *
+ *  Description: This function loads the video hardware palette. 
+ *   parameters:
+ *	     palette: Gives value for hardware palette.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_video_palette(unsigned long *palette)
+{
+   GAL_VIDEOPALETTE sSetVideo;
+
+   INIT_GAL(&sSetVideo);
+   sSetVideo.dwSubfunction = GALFN_SETVIDEOPALETTE;
+
+   if (palette == NULL) {
+      sSetVideo.identity = 1;
+   } else {
+      sSetVideo.identity = 0;
+      memcpy(sSetVideo.palette, palette, 256 * sizeof(*palette));
+   }
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetVideo))
+      return 0;
+   else
+      return 1;
+}
+
+/** Video **********************************************************/
+
+/*--------------------------------------------------------------------------
+ * Gal_set_icon_enable
+ *
+ *  Description: This function enable/disables the hardware icon. The icon 
+ *				 position and colors should be programmed prior to calling 
+ *				 this routine. 
+ *   parameters:
+ *	     enable: Gives value for enable state.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_icon_enable(int enable)
+{
+   GAL_ICONENABLE sSetIconenable;
+
+   INIT_GAL(&sSetIconenable);
+   sSetIconenable.dwSubfunction = GALFN_SETICONENABLE;
+   sSetIconenable.enable = enable;
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetIconenable)) {
+      return 0;
+   } else {
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_icon_colors
+ *
+ *  Description: This function sets the three hardware icon colors.
+ *   parameters:
+ *	     color0: Gives first color value.
+ *	     color1: Gives second color value.
+ *	     color2: Gives third color value.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_icon_colors(unsigned long color0, unsigned long color1,
+		    unsigned long color2)
+{
+   GAL_ICONCOLORS sSetIconcolors;
+
+   INIT_GAL(&sSetIconcolors);
+   sSetIconcolors.dwSubfunction = GALFN_SETICONCOLORS;
+   sSetIconcolors.color0 = color0;
+   sSetIconcolors.color1 = color1;
+   sSetIconcolors.color2 = color2;
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetIconcolors)) {
+      return 0;
+   } else {
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_icon_position.
+ *
+ *  Description: This function sets the hardware icon position.
+ *   parameters:
+ *	  memoffset: Memory offset of the icon buffer.
+ *	       xpos: Starting X co-ordinate for the hardware icon.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_icon_position(unsigned long memoffset, unsigned short xpos)
+{
+   GAL_ICONPOSITION sSetIconposi;
+
+   INIT_GAL(&sSetIconposi);
+   sSetIconposi.dwSubfunction = GALFN_SETICONPOSITION;
+   sSetIconposi.memoffset = memoffset;
+   sSetIconposi.xpos = xpos;
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetIconposi)) {
+      return 0;
+   } else {
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_icon_shape64.
+ *
+ *  Description: This function initializes the icon buffer according to 
+ *				  the current mode.
+ *	 parameters:
+ *	  memoffset: Memory offset of the icon buffer.
+ *	    andmask: Andmask of the icon buffer.
+ *	    xormask: Xormask of the icon buffer.
+ *		  lines: Lines of the icon buffer.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_icon_shape64(unsigned long memoffset, unsigned long *andmask,
+		     unsigned long *xormask, unsigned int lines)
+{
+   GAL_ICONSHAPE64 sSetIconshape64;
+
+   INIT_GAL(&sSetIconshape64);
+   sSetIconshape64.dwSubfunction = GALFN_SETICONSHAPE64;
+   sSetIconshape64.memoffset = memoffset;
+   *(sSetIconshape64.andmask) = *andmask;
+   *(sSetIconshape64.xormask) = *xormask;
+   sSetIconshape64.lines = lines;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetIconshape64)) {
+      return 0;
+   } else {
+      return 1;
+   }
+}
+
+/*  VIP Functions */
+
+/*--------------------------------------------------------------------------
+ * Gal_set_vip_enable
+ *
+ *  Description: This function enable/disables the writes to memory from the 
+ *				 video port. 
+ *				 position and colors should be programmed prior to calling 
+ *				 this routine. 
+ *   parameters:
+ *	     enable: Gives value for enable state.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_vip_enable(int enable)
+{
+   GAL_VIPENABLE sSetVipenable;
+
+   INIT_GAL(&sSetVipenable);
+   sSetVipenable.dwSubfunction = GALFN_SETVIPENABLE;
+   sSetVipenable.enable = enable;
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetVipenable)) {
+      return 0;
+   } else {
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_get_vip_enable
+ *
+ *  Description: This function gets the enable state of the 
+ *				 video port. 
+ *   parameters:
+ *	     enable: Gives value for enable state.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_get_vip_enable(int *enable)
+{
+   GAL_VIPENABLE sGetVipenable;
+
+   INIT_GAL(&sGetVipenable);
+   sGetVipenable.dwSubfunction = GALFN_GETVIPENABLE;
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sGetVipenable)) {
+      return 0;
+   } else {
+
+      *enable = sGetVipenable.enable;
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_vip_capture_run_mode
+ *
+ *  Description: This function selects the VIP capture run mode.
+ *
+ *   parameters:
+ *	       mode: VIP capture run mode.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_vip_capture_run_mode(int mode)
+{
+   GAL_VIPCAPTURERUNMODE sSetVipcapturerunmode;
+
+   INIT_GAL(&sSetVipcapturerunmode);
+   sSetVipcapturerunmode.dwSubfunction = GALFN_SETVIPCAPTURERUNMODE;
+   sSetVipcapturerunmode.mode = mode;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetVipcapturerunmode)) {
+      return 0;
+   } else {
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_vip_base
+ *
+ *  Description: This routine sets the odd and even base address values for 
+ *				 the VIP memory buffer.
+ *   parameters:
+ *	       even: Even base address.
+ *	        odd: odd base address.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_vip_base(unsigned long even, unsigned long odd)
+{
+   GAL_VIPBASE sSetVipBase;
+
+   INIT_GAL(&sSetVipBase);
+   sSetVipBase.dwSubfunction = GALFN_SETVIPBASE;
+   sSetVipBase.even = even;
+   sSetVipBase.odd = odd;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetVipBase)) {
+      return 0;
+   } else {
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_get_vip_base
+ *
+ *  Description: This routine gets the  base address value for 
+ *				 the VIP memory buffer.
+ *   parameters:
+ *	    address: VIP base address.
+ *	        odd: odd base address.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_get_vip_base(unsigned long *address, int odd)
+{
+   GAL_VIPBASE sGetVipBase;
+
+   INIT_GAL(&sGetVipBase);
+   sGetVipBase.dwSubfunction = GALFN_GETVIPBASE;
+   sGetVipBase.odd = odd;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sGetVipBase)) {
+      return 0;
+   } else {
+      *address = sGetVipBase.address;
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_vip_pitch
+ *
+ *  Description: This routine sets the  number of bytes between scanlines 
+ *				 for the VIP data.
+ *   parameters:
+ *	      pitch: VIP pitch.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_vip_pitch(unsigned long pitch)
+{
+   GAL_VIPPITCH sSetVipPitch;
+
+   INIT_GAL(&sSetVipPitch);
+   sSetVipPitch.dwSubfunction = GALFN_SETVIPPITCH;
+   sSetVipPitch.pitch = pitch;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetVipPitch)) {
+      return 0;
+   } else {
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_get_vip_pitch
+ *
+ *  Description: This routine gets the  number of bytes between scanlines 
+ *				 for the VIP data.
+ *   parameters:
+ *	      pitch: VIP pitch.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_get_vip_pitch(unsigned long *pitch)
+{
+   GAL_VIPPITCH sGetVipPitch;
+
+   INIT_GAL(&sGetVipPitch);
+   sGetVipPitch.dwSubfunction = GALFN_GETVIPPITCH;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sGetVipPitch)) {
+      return 0;
+   } else {
+      *pitch = sGetVipPitch.pitch;
+      return 1;
+
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_vip_mode
+ *
+ *  Description: This routine sets the  VIP operating mode. 
+ *   parameters:
+ *	       mode: VIP operating mode.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_vip_mode(int mode)
+{
+   GAL_VIPMODE sSetVipMode;
+
+   INIT_GAL(&sSetVipMode);
+   sSetVipMode.dwSubfunction = GALFN_SETVIPMODE;
+   sSetVipMode.mode = mode;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetVipMode)) {
+      return 0;
+   } else {
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_get_vip_mode
+ *
+ *  Description: This routine gets the  VIP operating mode. 
+ *   parameters:
+ *	       mode: VIP operating mode.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_get_vip_mode(int *mode)
+{
+   GAL_VIPMODE sGetVipMode;
+
+   INIT_GAL(&sGetVipMode);
+   sGetVipMode.dwSubfunction = GALFN_GETVIPMODE;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sGetVipMode)) {
+      return 0;
+   } else {
+
+      *mode = sGetVipMode.mode;
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_vip_bus_request_threshold_high
+ *
+ *  Description: This function sets the VIP FIFO bus request threshold.
+ *	     		 
+ *   parameters:
+ *       enable: Enable state.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_vip_bus_request_threshold_high(int enable)
+{
+   GAL_VIPBUS_RTH sSetVipBRTH;
+
+   INIT_GAL(&sSetVipBRTH);
+   sSetVipBRTH.dwSubfunction = GALFN_SETVIPBRTH;
+   sSetVipBRTH.enable = enable;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetVipBRTH)) {
+      return 0;
+   } else {
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_get_vip_bus_request_threshold_high
+ *
+ *  Description: This function gets the VIP FIFO bus request threshold.
+ *	     		 
+ *   parameters:
+ *       enable: Enable state.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_get_vip_bus_request_threshold_high(int *enable)
+{
+   GAL_VIPBUS_RTH sGetVipBRTH;
+
+   INIT_GAL(&sGetVipBRTH);
+   sGetVipBRTH.dwSubfunction = GALFN_GETVIPBRTH;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sGetVipBRTH)) {
+      return 0;
+   } else {
+
+      *enable = sGetVipBRTH.enable;
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_vip_last_line
+ *
+ *  Description: This function sets the maximum number of lines captured 
+ *				 in each field.
+ *	     		 
+ *   parameters:
+ *    last_line: Maximum number of lines captured in each field.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_vip_last_line(int last_line)
+{
+   GAL_VIPLASTLINE sSetViplastline;
+
+   INIT_GAL(&sSetViplastline);
+   sSetViplastline.dwSubfunction = GALFN_SETVIPLASTLINE;
+   sSetViplastline.last_line = last_line;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetViplastline)) {
+      return 0;
+   } else {
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_get_vip_line
+ *
+ *  Description: This function gets the number of the current video line being
+ *				 recieved by the VIP interface.
+ *	     		 
+ *   parameters:
+ *     vip_line: Number of the current video line.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_get_vip_line(int *vip_line)
+{
+   GAL_VIPLINE sGetVipline;
+
+   INIT_GAL(&sGetVipline);
+   sGetVipline.dwSubfunction = GALFN_GETVIPLINE;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sGetVipline)) {
+      return 0;
+   } else {
+      *vip_line = sGetVipline.status;
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_test_vip_odd_field
+ *
+ *  Description: This function tests the VIP odd field.
+ *	     		 
+ *   parameters:
+ *       status: Status of the odd field.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_test_vip_odd_field(int *status)
+{
+   GAL_TESTVIPODDFIELD sTestVipoddfield;
+
+   INIT_GAL(&sTestVipoddfield);
+   sTestVipoddfield.dwSubfunction = GALFN_TESTVIPODDFIELD;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sTestVipoddfield)) {
+      return 0;
+   } else {
+      *status = sTestVipoddfield.status;
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_test_vip_bases_updated
+ *
+ *  Description: This function tests the VIP bases updated.
+ *	     		 
+ *   parameters:
+ *       status: Status of the VIP bases updated.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_test_vip_bases_updated(int *status)
+{
+   GAL_TESTVIPBASESUPDATED sTestVipbasesupdated;
+
+   INIT_GAL(&sTestVipbasesupdated);
+   sTestVipbasesupdated.dwSubfunction = GALFN_TESTVIPBASESUPDATED;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sTestVipbasesupdated)) {
+      return 0;
+   } else {
+      *status = sTestVipbasesupdated.status;
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_test_vip_fifo_overflow
+ *
+ *  Description: This function tests the VIP FIFO overflow.
+ *	     		 
+ *   parameters:
+ *       status: Status of the VIP FIFO overflow.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_test_vip_fifo_overflow(int *status)
+{
+   GAL_TESTVIPOVERFLOW sTestVipoverflow;
+
+   INIT_GAL(&sTestVipoverflow);
+   sTestVipoverflow.dwSubfunction = GALFN_TESTVIPFIFOOVERFLOW;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sTestVipoverflow)) {
+      return 0;
+   } else {
+      *status = sTestVipoverflow.status;
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_vbi_enable
+ *
+ *  Description: This function enable/disables the VBI data capture.
+ *	     		 
+ *   parameters:
+ *       enable: VBI enable state.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_vbi_enable(int enable)
+{
+   GAL_VBIENABLE sSetVbienable;
+
+   INIT_GAL(&sSetVbienable);
+   sSetVbienable.dwSubfunction = GALFN_SETVBIENABLE;
+   sSetVbienable.enable = enable;
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetVbienable)) {
+      return 0;
+   } else {
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_get_vbi_enable
+ *
+ *  Description: This function gets the enable state of the VBI data capture.
+ *	     		 
+ *   parameters:
+ *       enable: VBI enable state.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_get_vbi_enable(int *enable)
+{
+   GAL_VBIENABLE sGetVbienable;
+
+   INIT_GAL(&sGetVbienable);
+   sGetVbienable.dwSubfunction = GALFN_GETVBIENABLE;
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sGetVbienable)) {
+      return 0;
+   } else {
+
+      *enable = sGetVbienable.enable;
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_vbi_base
+ *
+ *  Description: This function sets the VBI base addresses.
+ *	     		 
+ *   parameters:
+ *         even: Even base address.
+ *          odd: Odd base address.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_vbi_base(unsigned long even, unsigned long odd)
+{
+   GAL_VBIBASE sSetVbiBase;
+
+   INIT_GAL(&sSetVbiBase);
+   sSetVbiBase.dwSubfunction = GALFN_SETVBIBASE;
+   sSetVbiBase.even = even;
+   sSetVbiBase.odd = odd;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetVbiBase)) {
+      return 0;
+   } else {
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_get_vbi_base
+ *
+ *  Description: This function gets the VBI base address.
+ *	     		 
+ *   parameters:
+ *      address: VBI base address.
+ *          odd: Odd base address.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_get_vbi_base(unsigned long *address, int odd)
+{
+   GAL_VBIBASE sGetVbiBase;
+
+   INIT_GAL(&sGetVbiBase);
+   sGetVbiBase.dwSubfunction = GALFN_GETVBIBASE;
+   sGetVbiBase.odd = odd;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sGetVbiBase)) {
+      return 0;
+   } else {
+      *address = sGetVbiBase.address;
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_vbi_pitch
+ *
+ *  Description: This function sets the number of bytes between scanlines for 
+ *				 VBI capture.
+ *	     		 
+ *   parameters:
+ *        pitch: VBI pitch.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_vbi_pitch(unsigned long pitch)
+{
+   GAL_VBIPITCH sSetVbiPitch;
+
+   INIT_GAL(&sSetVbiPitch);
+   sSetVbiPitch.dwSubfunction = GALFN_SETVBIPITCH;
+   sSetVbiPitch.pitch = pitch;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetVbiPitch)) {
+      return 0;
+   } else {
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_get_vbi_pitch
+ *
+ *  Description: This function gets the number of bytes between scanlines for 
+ *				 VBI capture.
+ *	     		 
+ *   parameters:
+ *        pitch: VBI pitch.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_get_vbi_pitch(unsigned long *pitch)
+{
+   GAL_VBIPITCH sGetVbiPitch;
+
+   INIT_GAL(&sGetVbiPitch);
+   sGetVbiPitch.dwSubfunction = GALFN_GETVBIPITCH;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sGetVbiPitch)) {
+      return 0;
+   } else {
+      *pitch = sGetVbiPitch.pitch;
+      return 1;
+
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_vbi_mode
+ *
+ *  Description: This function sets the VBI data types captured to memory. 
+ *	     		 
+ *   parameters:
+ *         mode: VBI mode.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_vbi_mode(int mode)
+{
+   GAL_VBIMODE sSetVbiMode;
+
+   INIT_GAL(&sSetVbiMode);
+   sSetVbiMode.dwSubfunction = GALFN_SETVBIMODE;
+   sSetVbiMode.mode = mode;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetVbiMode)) {
+      return 0;
+   } else {
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_get_vbi_mode
+ *
+ *  Description: This function gets the VBI data types captured to memory. 
+ *	     		 
+ *   parameters:
+ *         mode: VBI mode.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_get_vbi_mode(int *mode)
+{
+   GAL_VBIMODE sGetVbiMode;
+
+   INIT_GAL(&sGetVbiMode);
+   sGetVbiMode.dwSubfunction = GALFN_GETVBIMODE;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sGetVbiMode)) {
+      return 0;
+   } else {
+
+      *mode = sGetVbiMode.mode;
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_vbi_direct
+ *
+ *  Description: This function sets the VBI lines to be passed to the 
+ *				 Direct VIP. 
+ *	     		 
+ *   parameters:
+ *   even_lines: VBI even lines.
+ *    odd_lines: VBI odd lines.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_vbi_direct(unsigned long even_lines, unsigned long odd_lines)
+{
+   GAL_SETVBIDIRECT sSetVbidirect;
+
+   INIT_GAL(&sSetVbidirect);
+   sSetVbidirect.dwSubfunction = GALFN_SETVBIDIRECT;
+   sSetVbidirect.even_lines = even_lines;
+   sSetVbidirect.odd_lines = odd_lines;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetVbidirect)) {
+      return 0;
+   } else {
+      return 1;
+   }
+}
+BOOLEAN
+Gal2_set_destination_stride(unsigned short stride)
+{
+   GAL_STRIDE sSetStride;
+
+   INIT_GAL(&sSetStride);
+   sSetStride.dwSubfunction = GALFN_SETDESTINATIONSTRIDE;
+
+   sSetStride.stride = stride;
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetStride))
+      return 0;
+   else
+      return 1;
+}
+
+BOOLEAN
+Gal2_set_pattern_origin(int x, int y)
+{
+   GAL_PATTERNORIGIN sSetPatOrigin;
+
+   INIT_GAL(&sSetPatOrigin);
+   sSetPatOrigin.dwSubfunction = GALFN_SETPATTERNORIGIN;
+
+   sSetPatOrigin.x = x;
+   sSetPatOrigin.y = y;
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetPatOrigin))
+      return 0;
+   else
+      return 1;
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_vbi_direct
+ *
+ *  Description: This function gets the VBI lines to be passed to the 
+ *				 Direct VIP. 
+ *	     		 
+ *   parameters:
+ *          odd: VBI odd lines.
+ * direct_lines: VBI direct lines.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_get_vbi_direct(int odd, unsigned long *direct_lines)
+{
+   GAL_GETVBIDIRECT sGetVbidirect;
+
+   INIT_GAL(&sGetVbidirect);
+   sGetVbidirect.dwSubfunction = GALFN_GETVBIDIRECT;
+   sGetVbidirect.odd = odd;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sGetVbidirect)) {
+      return 0;
+   } else {
+      *direct_lines = sGetVbidirect.direct_lines;
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_vbi_interrupt
+ *
+ *  Description: This function enable/disables the VBI field interrupt.
+ *	     		 
+ *   parameters:
+ *       enable: Value to enable/disable VBI interrupt.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_vbi_interrupt(int enable)
+{
+   GAL_VBIINTERRUPT sSetVbiinterrupt;
+
+   INIT_GAL(&sSetVbiinterrupt);
+   sSetVbiinterrupt.dwSubfunction = GALFN_SETVBIINTERRUPT;
+   sSetVbiinterrupt.enable = enable;
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetVbiinterrupt)) {
+      return 0;
+   } else {
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_get_vbi_interrupt
+ *
+ *  Description: This function gets the VBI field interrupt.
+ *	     		 
+ *   parameters:
+ *       enable: Value of enable/disable VBI interrupt.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_get_vbi_interrupt(int *enable)
+{
+   GAL_VBIINTERRUPT sGetVbiinterrupt;
+
+   INIT_GAL(&sGetVbiinterrupt);
+   sGetVbiinterrupt.dwSubfunction = GALFN_GETVBIINTERRUPT;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sGetVbiinterrupt)) {
+      return 0;
+   } else {
+      *enable = sGetVbiinterrupt.enable;
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_source_stride
+ *
+ *  Description: This function sets the stride to be used in successive screen
+ *				 to screen BLTs.
+ *	     		 
+ *   parameters:
+ *       enable: Value of enable/disable VBI interrupt.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal2_set_source_stride(unsigned short stride)
+{
+   GAL_STRIDE sSetsourcestride;
+
+   INIT_GAL(&sSetsourcestride);
+   sSetsourcestride.dwSubfunction = GALFN_SETSOURCESTRIDE;
+
+   sSetsourcestride.stride = stride;
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetsourcestride)) {
+      return 0;
+   } else {
+
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_source_transparency
+ *
+ *  Description: This function sets the source transparency color and 
+ *				 mask to be used in future rendering routines.
+ *				 to screen BLTs.
+ *	     		 
+ *   parameters:
+ *        color: Source color.
+ *		   mask: Source mask.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal2_set_source_transparency(unsigned long color, unsigned long mask)
+{
+   GAL_SOURCETRANSPARENCY sSetsourcetransparency;
+
+   INIT_GAL(&sSetsourcetransparency);
+   sSetsourcetransparency.dwSubfunction = GALFN_SETSOURCETRANSPARENCY;
+
+   sSetsourcetransparency.color = color;
+   sSetsourcetransparency.mask = mask;
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetsourcetransparency)) {
+      return 0;
+   } else {
+
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_alpha_mode
+ *
+ *  Description: This function sets the alpha blending mode. 
+ *   parameters:
+ *         mode: Alpha blending mode.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal2_set_alpha_mode(int mode)
+{
+   GAL_GFX2ALPHAMODE sSetalphamode;
+
+   INIT_GAL(&sSetalphamode);
+   sSetalphamode.dwSubfunction = GALFN_GFX2SETALPHAMODE;
+
+   sSetalphamode.mode = mode;
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetalphamode)) {
+      return 0;
+   } else {
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_gfx2_set_alpha_value
+ *
+ *  Description: This function sets the alpha value to be used with certain 
+ *				 alpha blending modes. 
+ *   parameters:
+ *        value: Alpha blending value.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal2_set_alpha_value(unsigned char value)
+{
+   GAL_GFX2ALPHAVALUE sSetalphavalue;
+
+   INIT_GAL(&sSetalphavalue);
+   sSetalphavalue.dwSubfunction = GALFN_GFX2SETALPHAVALUE;
+
+   sSetalphavalue.value = value;
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetalphavalue)) {
+      return 0;
+   } else {
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_gfx2_pattern_fill
+ *
+ *  Description: This function used to fill the pattern of GX2. 
+ *				 It allows the arbitary destination stride. The rendering 
+ *				 position is also specified as an offset instead of (x,y) 
+ *				 position.
+ *   parameters:
+ *    dstoffset: Rendering offset.
+ *		  width: Width of the pattern.
+ *       height: Height of the pattern.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_gfx2_pattern_fill(unsigned long dstoffset, unsigned short width,
+		      unsigned short height)
+{
+   GAL_GFX2PATTERNFILL sPatternfill;
+
+   INIT_GAL(&sPatternfill);
+   sPatternfill.dwSubfunction = GALFN_GFX2PATTERNFILL;
+
+   sPatternfill.dstoffset = dstoffset;
+   sPatternfill.width = width;
+   sPatternfill.height = height;
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sPatternfill)) {
+      return 0;
+   } else {
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_gfx2_screen_to_screen_blt
+ *
+ *  Description: This function used for screen to screen BLTs of GX2. 
+ *				 It allows the arbitary source and destination strides and 
+ *				 alpha blending. 
+ *   parameters:
+ *    srcoffset: Source Rendering offset.
+ *    dstoffset: Destination Rendering offset.
+ *		  width: Width of the screen.
+ *       height: Height of the screen.
+ *		  flags: Flags of the screen to screen BLT.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal2_screen_to_screen_blt(unsigned long srcoffset,
+			  unsigned long dstoffset, unsigned short width,
+			  unsigned short height, int flags)
+{
+   GAL_GFX2SCREENTOSCREENBLT sScreentoScreenblt;
+
+   INIT_GAL(&sScreentoScreenblt);
+   sScreentoScreenblt.dwSubfunction = GALFN_GFX2SCREENTOSCREENBLT;
+
+   sScreentoScreenblt.srcoffset = srcoffset;
+   sScreentoScreenblt.dstoffset = dstoffset;
+   sScreentoScreenblt.width = width;
+   sScreentoScreenblt.height = height;
+   sScreentoScreenblt.flags = flags;
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sScreentoScreenblt)) {
+      return 0;
+   } else {
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal2_mono_expand_blt
+ *
+ *  Description: This function used to expand monochrome data stored in 
+ *				 graphics memory for screen to screen BLTs. 
+ *   parameters:
+ *      srcbase: Source Rendering base address.
+ *         srcx: Source X offset.
+ *         srcy: Source Y offset.
+ *    dstoffset: Destination Rendering offset.
+ *		  width: Width of the screen.
+ *       height: Height of the screen.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal2_mono_expand_blt(unsigned long srcbase, unsigned short srcx,
+		     unsigned short srcy, unsigned long dstoffset,
+		     unsigned short width, unsigned short height,
+		     int byte_packed)
+{
+   GAL_GFX2MONOEXPANDBLT sMonoexpandblt;
+
+   INIT_GAL(&sMonoexpandblt);
+   sMonoexpandblt.dwSubfunction = GALFN_GFX2MONOEXPANDBLT;
+   sMonoexpandblt.srcbase = srcbase;
+   sMonoexpandblt.srcx = srcx;
+   sMonoexpandblt.srcy = srcy;
+   sMonoexpandblt.dstoffset = dstoffset;
+   sMonoexpandblt.width = width;
+   sMonoexpandblt.height = height;
+   sMonoexpandblt.byte_packed = byte_packed;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sMonoexpandblt)) {
+      return 0;
+   } else {
+      return 1;
+
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal2_color_bitmap_to_screen_blt
+ *
+ *  Description: This function used for color bmp to screen BLTs. 
+ *   parameters:
+ *         srcx: Source X offset.
+ *         srcy: Source Y offset.
+ *    dstoffset: Destination Rendering offset.
+ *		  width: Width of the screen.
+ *       height: Height of the screen.
+ *		  *data: Color bmp data.
+ *	      pitch: Pitch of the dispaly mode.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal2_color_bitmap_to_screen_blt(unsigned short srcx,
+				unsigned short srcy,
+				unsigned long dstoffset,
+				unsigned short width,
+				unsigned short height,
+				unsigned char *data, unsigned short pitch)
+{
+   GAL_GFX2COLORBMPTOSCRBLT sColorbmptoscrblt;
+
+   INIT_GAL(&sColorbmptoscrblt);
+   sColorbmptoscrblt.dwSubfunction = GALFN_GFX2COLORBMPTOSCRBLT;
+   sColorbmptoscrblt.srcx = srcx;
+   sColorbmptoscrblt.srcy = srcy;
+   sColorbmptoscrblt.dstoffset = dstoffset;
+   sColorbmptoscrblt.width = width;
+   sColorbmptoscrblt.height = height;
+   sColorbmptoscrblt.data = *data;
+   sColorbmptoscrblt.pitch = pitch;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sColorbmptoscrblt)) {
+      return 0;
+   } else {
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal2_mono_bitmap_to_screen_blt
+ *
+ *  Description: This function used for mono bmp to screen BLTs. 
+ *   parameters:
+ *         srcx: Source X offset.
+ *         srcy: Source Y offset.
+ *    dstoffset: Destination Rendering offset.
+ *		  width: Width of the screen.
+ *       height: Height of the screen.
+ *		  *data: mono bmp data.
+ *	      pitch: Pitch of the display mode.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal2_mono_bitmap_to_screen_blt(unsigned short srcx,
+			       unsigned short srcy,
+			       unsigned long dstoffset,
+			       unsigned short width,
+			       unsigned short height,
+			       unsigned char *data, unsigned short pitch)
+{
+   GAL_GFX2MONOBMPTOSCRBLT sMonobmptoscrblt;
+
+   INIT_GAL(&sMonobmptoscrblt);
+   sMonobmptoscrblt.dwSubfunction = GALFN_GFX2MONOBMPTOSCRBLT;
+   sMonobmptoscrblt.srcx = srcx;
+   sMonobmptoscrblt.srcy = srcy;
+   sMonobmptoscrblt.dstoffset = dstoffset;
+   sMonobmptoscrblt.width = width;
+   sMonobmptoscrblt.height = height;
+   sMonobmptoscrblt.data = *data;
+   sMonobmptoscrblt.pitch = pitch;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sMonobmptoscrblt)) {
+      return 0;
+   } else {
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal2_bresenham_line
+ *
+ *  Description: This function used to draw bresenham line. It allows the 
+ *				 arbitary destination stride. 
+ *   parameters:
+ *    dstoffset: Destination  offset.
+ *		 length: Length of the line.
+ *      initerr: Intial error.
+ *	   axialerr: 
+ *	    diagerr: 
+ *		  flags:
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal2_bresenham_line(unsigned long dstoffset, unsigned short length,
+		    unsigned short initerr, unsigned short axialerr,
+		    unsigned short diagerr, unsigned short flags)
+{
+   GAL_GFX2BRESENHAMLINE sBresenhamline;
+
+   INIT_GAL(&sBresenhamline);
+   sBresenhamline.dwSubfunction = GALFN_GFX2BRESENHAMLINE;
+   sBresenhamline.dstoffset = dstoffset;
+   sBresenhamline.length = length;
+   sBresenhamline.initerr = initerr;
+   sBresenhamline.axialerr = axialerr;
+   sBresenhamline.diagerr = diagerr;
+   sBresenhamline.flags = flags;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sBresenhamline)) {
+      return 0;
+   } else {
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal2_sync_to_vblank
+ *
+ *  Description: This function sets the a flag to synchronize the next 
+ *				 rendering routine to VBLANK. 
+ *   parameters: none.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal2_sync_to_vblank(void)
+{
+   GAL_GFX2SYNCTOVBLANK sSynctovblank;
+
+   INIT_GAL(&sSynctovblank);
+   sSynctovblank.dwSubfunction = GALFN_GFX2SYNCTOVBLANK;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSynctovblank)) {
+      return 0;
+   } else {
+      return 1;
+   }
+}
+
+/* Video routines */
+
+/*--------------------------------------------------------------------------
+ * Gal_set_video_yuv_pitch
+ *
+ *  Description: This function sets the Video YUV pitch. 
+ *				 
+ *   parameters:
+ *       y_pitch: Y pitch.
+ *	    uv_pitch: UV pitch.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_video_yuv_pitch(unsigned long y_pitch, unsigned long uv_pitch)
+{
+   GAL_VIDEOYUVPITCH sSetVideoyuvpitch;
+
+   INIT_GAL(&sSetVideoyuvpitch);
+   sSetVideoyuvpitch.dwSubfunction = GALFN_SETVIDEOYUVPITCH;
+   sSetVideoyuvpitch.y_pitch = y_pitch;
+   sSetVideoyuvpitch.uv_pitch = uv_pitch;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetVideoyuvpitch)) {
+      return 0;
+   } else {
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_get_video_yuv_pitch
+ *
+ *  Description: This function gets the Video YUV pitch. 
+ *				 
+ *   parameters:
+ *       y_pitch: Y pitch.
+ *	    uv_pitch: UV pitch.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_get_video_yuv_pitch(unsigned long *y_pitch, unsigned long *uv_pitch)
+{
+   GAL_VIDEOYUVPITCH sGetVideoyuvpitch;
+
+   INIT_GAL(&sGetVideoyuvpitch);
+   sGetVideoyuvpitch.dwSubfunction = GALFN_GETVIDEOYUVPITCH;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sGetVideoyuvpitch)) {
+      return 0;
+   } else {
+      *y_pitch = sGetVideoyuvpitch.y_pitch;
+      *uv_pitch = sGetVideoyuvpitch.uv_pitch;
+
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_video_yuv_offsets
+ *
+ *  Description: This function sets the Video YUV offsets. 
+ *				 
+ *   parameters:
+ *      y_offset: Y offset.
+ *		u_offset: U offset.
+ *		v_offset: V offset.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_video_yuv_offsets(unsigned long y_offset, unsigned long u_offset,
+			  unsigned long v_offset)
+{
+   GAL_VIDEOYUVOFFSETS sSetVideoyuvoffsets;
+
+   INIT_GAL(&sSetVideoyuvoffsets);
+   sSetVideoyuvoffsets.dwSubfunction = GALFN_SETVIDEOYUVOFFSETS;
+   sSetVideoyuvoffsets.dwYoffset = y_offset;
+   sSetVideoyuvoffsets.dwUoffset = u_offset;
+   sSetVideoyuvoffsets.dwVoffset = v_offset;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetVideoyuvoffsets)) {
+      return 0;
+   } else {
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_get_video_yuv_offsets
+ *
+ *  Description: This function gets the Video YUV offsets. 
+ *				 
+ *   parameters:
+ *      y_offset: Y offset.
+ *		u_offset: U offset.
+ *		v_offset: V offset.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/ BOOLEAN
+Gal_get_video_yuv_offsets(unsigned long *y_offset,
+			  unsigned long *u_offset, unsigned long *v_offset)
+{
+   GAL_VIDEOYUVOFFSETS sGetVideoyuvoffsets;
+
+   INIT_GAL(&sGetVideoyuvoffsets);
+   sGetVideoyuvoffsets.dwSubfunction = GALFN_GETVIDEOYUVOFFSETS;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sGetVideoyuvoffsets)) {
+      return 0;
+   } else {
+      *y_offset = sGetVideoyuvoffsets.dwYoffset;
+      *u_offset = sGetVideoyuvoffsets.dwUoffset;
+      *v_offset = sGetVideoyuvoffsets.dwVoffset;
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_video_left_crop
+ *
+ *  Description: This function sets the number of pixels which will be cropped
+ *				 from the beginning of each video line. 
+ *				 
+ *   parameters:
+ *			  x: 
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/ BOOLEAN
+Gal_set_video_left_crop(unsigned short x)
+{
+   GAL_VIDEOLEFTCROP sSetVideoleftcrop;;
+
+   INIT_GAL(&sSetVideoleftcrop);
+   sSetVideoleftcrop.dwSubfunction = GALFN_SETVIDEOLEFTCROP;
+   sSetVideoleftcrop.x = x;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetVideoleftcrop)) {
+      return 0;
+   } else {
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_video_vertical_downscale
+ *
+ *  Description: This function sets the vertical downscale factor for the video 
+ *				 overlay window.	
+ *				 
+ *   parameters:
+ *		   srch: Height of the source.
+ *		   dsth: Height of the destination.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/ BOOLEAN
+Gal_set_video_vertical_downscale(unsigned short srch, unsigned short dsth)
+{
+   GAL_VIDEOVERTICALDOWNSCALE sSetVideoverticaldownscale;
+
+   INIT_GAL(&sSetVideoverticaldownscale);
+   sSetVideoverticaldownscale.dwSubfunction = GALFN_SETVIDEOVERTICALDOWNSCALE;
+   sSetVideoverticaldownscale.srch = srch;
+   sSetVideoverticaldownscale.dsth = dsth;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetVideoverticaldownscale)) {
+      return 0;
+   } else {
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_vbi_source
+ *
+ *  Description: This function sets the VBI source.	
+ *				 
+ *   parameters:
+ *		 source: VBI Source type.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/ BOOLEAN
+Gal_set_vbi_source(VbiSourceType source)
+{
+   GAL_VBISOURCE sSetVbisource;
+
+   INIT_GAL(&sSetVbisource);
+   sSetVbisource.dwSubfunction = GALFN_SETVBISOURCE;
+   sSetVbisource.source = source;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetVbisource)) {
+      return 0;
+   } else {
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_get_vbi_source
+ *
+ *  Description: This function gets the VBI source.	
+ *				 
+ *   parameters:
+ *		 source: VBI Source type.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_get_vbi_source(VbiSourceType * source)
+{
+   GAL_VBISOURCE sGetVbisource;
+
+   INIT_GAL(&sGetVbisource);
+   sGetVbisource.dwSubfunction = GALFN_GETVBISOURCE;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sGetVbisource)) {
+      return 0;
+   } else {
+
+      *source = sGetVbisource.source;
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_vbi_lines
+ *
+ *  Description: This function sets the VBI lines.	
+ *				 
+ *   parameters:
+ *		   even: VBI even lines.
+ *			odd: VBI odd lines.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_vbi_lines(unsigned long even, unsigned long odd)
+{
+   GAL_VBILINES sSetVbilines;
+
+   INIT_GAL(&sSetVbilines);
+   sSetVbilines.dwSubfunction = GALFN_SETVBILINES;
+   sSetVbilines.even = even;
+   sSetVbilines.odd = odd;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetVbilines)) {
+      return 0;
+   } else {
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_get_vbi_lines
+ *
+ *  Description: This function gets the VBI lines.	
+ *				 
+ *   parameters:
+ *	      lines: VBI lines.
+ *			odd: VBI odd lines.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/ BOOLEAN
+Gal_get_vbi_lines(int odd, unsigned long *lines)
+{
+   GAL_VBILINES sGetVbilines;
+
+   INIT_GAL(&sGetVbilines);
+   sGetVbilines.dwSubfunction = GALFN_GETVBILINES;
+   sGetVbilines.odd = odd;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sGetVbilines)) {
+      return 0;
+   } else {
+      *lines = sGetVbilines.lines;
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_vbi_total
+ *
+ *  Description: This function sets the total number of VBI bytes for each 
+ *				 field.	
+ *				 
+ *   parameters:
+ *	       even:
+ *			odd: 
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_vbi_total(unsigned long even, unsigned long odd)
+{
+   GAL_VBITOTAL sSetVbitotal;
+
+   INIT_GAL(&sSetVbitotal);
+   sSetVbitotal.dwSubfunction = GALFN_SETVBITOTAL;
+   sSetVbitotal.even = even;
+   sSetVbitotal.odd = odd;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetVbitotal)) {
+      return 0;
+   } else {
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_vbi_total
+ *
+ *  Description: This function gets the total number of VBI bytes in the
+ *				 field.	
+ *				 
+ *   parameters:
+ *	       even:
+ *			odd: 
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/ BOOLEAN
+Gal_get_vbi_total(int odd, unsigned long *total)
+{
+   GAL_VBITOTAL sGetVbitotal;
+
+   INIT_GAL(&sGetVbitotal);
+   sGetVbitotal.dwSubfunction = GALFN_GETVBITOTAL;
+   sGetVbitotal.odd = odd;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sGetVbitotal)) {
+      return 0;
+   } else {
+      *total = sGetVbitotal.total;
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_vertical_scaler_offset
+ *
+ *  Description: This function sets the Video vertical scaler offset.	
+ *				 
+ *   parameters:
+ *	     offset: Vertical Scaler offset.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/ BOOLEAN
+Gal_set_vertical_scaler_offset(char offset)
+{
+   GAL_VSCALEROFFSET sSetVscaleroffset;
+
+   INIT_GAL(&sSetVscaleroffset);
+   sSetVscaleroffset.dwSubfunction = GALFN_SETVSCALEROFFSET;
+   sSetVscaleroffset.offset = offset;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetVscaleroffset)) {
+      return 0;
+   } else {
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_get_vertical_scaler_offset
+ *
+ *  Description: This function gets the Video vertical scaler offset.	
+ *				 
+ *   parameters:
+ *	     offset: Vertical Scaler offset.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/ BOOLEAN
+Gal_get_vertical_scaler_offset(char *offset)
+{
+   GAL_VSCALEROFFSET sGetVscaleroffset;
+
+   INIT_GAL(&sGetVscaleroffset);
+   sGetVscaleroffset.dwSubfunction = GALFN_GETVSCALEROFFSET;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sGetVscaleroffset)) {
+      return 0;
+   } else {
+
+      *offset = sGetVscaleroffset.offset;
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_get_video_interlaced
+ *
+ *  Description: This function gets the video interlaced mode.
+ *   parameters:
+ *   interlaced: ptr to the interlaced status.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_get_video_interlaced(int *interlaced)
+{
+   GAL_GETVIDEOINTERLACED sGetvideointerlaced;
+
+   INIT_GAL(&sGetvideointerlaced);
+   sGetvideointerlaced.dwSubfunction = GALFN_GETVIDEOINTERLACED;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sGetvideointerlaced)) {
+      return 0;
+   } else {
+      *interlaced = sGetvideointerlaced.interlaced;
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_get_color_space_YUV
+ *
+ *  Description: This function gets the video color space YUV.
+ *   parameters:
+ *   colorspace: ptr to the color space.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_get_color_space_YUV(int *colorspace)
+{
+   GAL_COLORSPACEYUV sGetcolorspaceyuv;
+
+   INIT_GAL(&sGetcolorspaceyuv);
+   sGetcolorspaceyuv.dwSubfunction = GALFN_GETCOLORSPACEYUV;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sGetcolorspaceyuv)) {
+      return 0;
+   } else {
+      *colorspace = sGetcolorspaceyuv.colorspace;
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_get_genlock_enable
+ *
+ *  Description: This function gets the enable state of the genlock.
+ *   parameters:
+ *       enable: ptr to the enable state of the genlock.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_get_genlock_enable(int *enable)
+{
+   GAL_GENLOCKENABLE sGetgenlockenable;
+
+   INIT_GAL(&sGetgenlockenable);
+   sGetgenlockenable.dwSubfunction = GALFN_GETGENLOCKENABLE;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sGetgenlockenable)) {
+      return 0;
+   } else {
+      *enable = sGetgenlockenable.enable;
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_genlock_enable
+ *
+ *  Description: This function enable/disables and configure the genlock
+ *				 according to the parameters.
+ *   parameters:
+ *       enable:  enable state of the genlock.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_genlock_enable(int enable)
+{
+   GAL_GENLOCKENABLE sSetgenlockenable;
+
+   INIT_GAL(&sSetgenlockenable);
+   sSetgenlockenable.dwSubfunction = GALFN_SETGENLOCKENABLE;
+
+   sSetgenlockenable.enable = enable;
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetgenlockenable)) {
+      return 0;
+   } else {
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_get_genlock_delay
+ *
+ *  Description: This function gets the genlock delay. 
+ *   parameters:
+ *        delay:  Ptr to the genlock delay.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_get_genlock_delay(unsigned long *delay)
+{
+   GAL_GENLOCKDELAY sGetgenlockdelay;
+
+   INIT_GAL(&sGetgenlockdelay);
+   sGetgenlockdelay.dwSubfunction = GALFN_GETGENLOCKDELAY;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sGetgenlockdelay)) {
+      return 0;
+   } else {
+      *delay = sGetgenlockdelay.delay;
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_genlock_delay
+ *
+ *  Description: This function sets the genlock delay. 
+ *   parameters:
+ *        delay:  genlock delay.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_genlock_delay(unsigned long delay)
+{
+   GAL_GENLOCKDELAY sSetgenlockdelay;
+
+   INIT_GAL(&sSetgenlockdelay);
+   sSetgenlockdelay.dwSubfunction = GALFN_SETGENLOCKDELAY;
+
+   sSetgenlockdelay.delay = delay;
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetgenlockdelay)) {
+      return 0;
+   } else {
+      return 1;
+   }
+}
+
+BOOLEAN
+Gal_set_top_line_in_odd(int enable)
+{
+   GAL_TOPLINEINODD sSettoplineinodd;
+
+   INIT_GAL(&sSettoplineinodd);
+   sSettoplineinodd.dwSubfunction = GALFN_SETTOPLINEINODD;
+
+   sSettoplineinodd.enable = enable;
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSettoplineinodd)) {
+      return 0;
+   } else {
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_get_video_cursor.
+ *
+ *  Description: This function gets configuration of the Video Hardware
+ *				 cursor.
+ *   parameters:
+ *          key: color key.
+ *		   mask: color mask.
+ *select_color2: selected for color2.
+ *		 color1: color1 value.
+ *		 color2: color2 value.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_get_video_cursor(unsigned long *key,
+		     unsigned long *mask,
+		     unsigned short *select_color2,
+		     unsigned long *color1, unsigned long *color2)
+{
+   GAL_VIDEOCURSOR sGetvideocursor;
+
+   INIT_GAL(&sGetvideocursor);
+   sGetvideocursor.dwSubfunction = GALFN_GETVIDEOCURSOR;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sGetvideocursor)) {
+      return 0;
+   } else {
+      *key = sGetvideocursor.key;
+      *mask = sGetvideocursor.mask;
+      *select_color2 = sGetvideocursor.select_color2;
+      *color1 = sGetvideocursor.color1;
+      *color2 = sGetvideocursor.color2;
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_read_crc.
+ *
+ *  Description: This function reads the hardware CRC value, which is used for
+ *				 automated testing.
+ *   parameters:
+ *          crc: Holds the crc value.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_read_crc(unsigned long *crc)
+{
+   GAL_READCRC sReadcrc;
+
+   INIT_GAL(&sReadcrc);
+   sReadcrc.dwSubfunction = GALFN_READCRC;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sReadcrc)) {
+      return 0;
+   } else {
+      *crc = sReadcrc.crc;
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_read_window_crc.
+ *
+ *  Description: This function reads the hardware CRC value for a subsection
+ *				 of the display.
+ *				 
+ *   parameters:
+ *       source: 
+ *			  x:
+ *			  y:
+ *	      width:
+ *		 height:
+ *			crc:
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_read_window_crc(int source, unsigned short x, unsigned short y,
+		    unsigned short width, unsigned short height,
+		    int crc32, unsigned long *crc)
+{
+   GAL_READWINDOWCRC sReadwindowcrc;
+
+   INIT_GAL(&sReadwindowcrc);
+   sReadwindowcrc.dwSubfunction = GALFN_READWINDOWCRC;
+   sReadwindowcrc.source = source;
+   sReadwindowcrc.x = x;
+   sReadwindowcrc.y = y;
+   sReadwindowcrc.width = width;
+   sReadwindowcrc.height = height;
+   sReadwindowcrc.crc32 = crc32;
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sReadwindowcrc)) {
+      return 0;
+   } else {
+      *crc = sReadwindowcrc.crc;
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_get_macrovision_enable.
+ *
+ *  Description: This function gets the enable state of the macrovision.
+ *				 
+ *   parameters:
+ *       enable: ptr holds the macrovision enable state.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_get_macrovision_enable(int *enable)
+{
+   GAL_MACROVISIONENABLE sGetmacrovisionenable;
+
+   INIT_GAL(&sGetmacrovisionenable);
+   sGetmacrovisionenable.dwSubfunction = GALFN_GETMACROVISIONENABLE;
+
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sGetmacrovisionenable)) {
+      return 0;
+   } else {
+      *enable = sGetmacrovisionenable.enable;
+      return 1;
+   }
+}
+
+/*--------------------------------------------------------------------------
+ * Gal_set_macrovision_enable.
+ *
+ *  Description: This function gets the enable state of the macrovision.
+ *				 
+ *   parameters:
+ *       enable: macrovision enable state.
+ *       return: '1' was returned on success otherwise '0' was returned.
+ *------------------------------------------------------------------------*/
+BOOLEAN
+Gal_set_macrovision_enable(int enable)
+{
+   GAL_MACROVISIONENABLE sSetmacrovisionenable;
+
+   INIT_GAL(&sSetmacrovisionenable);
+   sSetmacrovisionenable.dwSubfunction = GALFN_SETMACROVISIONENABLE;
+
+   sSetmacrovisionenable.enable = enable;
+   if (ioctl(ifbdev_handle, FBIOGAL_API, &sSetmacrovisionenable)) {
+      return 0;
+   } else {
+      return 1;
+   }
+}
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/galstub.c b/xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_galstub.c
index 69fdf8b1d..8fba2508c 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/galstub.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_galstub.c
@@ -1,7 +1,8 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/galstub.c,v 1.1 2002/10/11 14:32:58 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_galstub.c,v 1.2 2003/01/14 09:34:31 alanh Exp $ */
 /*
- * $Workfile: galstub.c $
- * $Revision: 1.1.1.1 $
+ * $Workfile: nsc_galstub.c $
+ * $Revision: 1.2.2.1 $
+ * $Author: ldelgass $
  *
  * File Contents: This file contains the file inclusions of the GAL
  *
@@ -139,7 +140,6 @@
  * END_NSC_LIC_GPL */
 
 #if defined(STB_X)
-#ifdef XFree86LOADER
 /* all driver need this */
 #include "xf86.h"
 #include "xf86_OSproc.h"
@@ -152,7 +152,6 @@
 
 #define makedev(major, minor) ((((unsigned int) (major)) << 8) \
 				| ((unsigned int) (minor)))
-#endif
 
-#include "galfns.c"
+#include "nsc_galfns.c"
 #endif /* STB_X */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_gx1_accel.c b/xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_gx1_accel.c
new file mode 100644
index 000000000..caa1ce070
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_gx1_accel.c
@@ -0,0 +1,1788 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_gx1_accel.c,v 1.5 2003/02/11 13:36:41 alanh Exp $ */
+/*
+ * $Workfile: nsc_gx1_accel.c $
+ * $Revision: 1.2.2.1 $
+ * $Author: ldelgass $
+ *
+ * File Contents: This file is consists of main Xfree
+ *                acceleration supported routines like solid fill used
+ *                here.
+ * Project:       Geode Xfree Frame buffer device driver.
+ *
+ *     
+ */
+
+/* 
+ * NSC_LIC_ALTERNATIVE_PREAMBLE
+ *
+ * Revision 1.0
+ *
+ * National Semiconductor Alternative GPL-BSD License
+ *
+ * National Semiconductor Corporation licenses this software 
+ * ("Software"):
+ *
+ * National Xfree frame buffer driver
+ *
+ * under one of the two following licenses, depending on how the 
+ * Software is received by the Licensee.
+ * 
+ * If this Software is received as part of the Linux Framebuffer or
+ * other GPL licensed software, then the GPL license designated 
+ * NSC_LIC_GPL applies to this Software; in all other circumstances 
+ * then the BSD-style license designated NSC_LIC_BSD shall apply.
+ *
+ * END_NSC_LIC_ALTERNATIVE_PREAMBLE */
+
+/* NSC_LIC_BSD
+ *
+ * National Semiconductor Corporation Open Source License for 
+ *
+ * National Xfree frame buffer driver
+ *
+ * (BSD License with Export Notice)
+ *
+ * Copyright (c) 1999-2001
+ * National Semiconductor Corporation.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met: 
+ *
+ *   * Redistributions of source code must retain the above copyright 
+ *     notice, this list of conditions and the following disclaimer. 
+ *
+ *   * Redistributions in binary form must reproduce the above 
+ *     copyright notice, this list of conditions and the following 
+ *     disclaimer in the documentation and/or other materials provided 
+ *     with the distribution. 
+ *
+ *   * Neither the name of the National Semiconductor Corporation nor 
+ *     the names of its contributors may be used to endorse or promote 
+ *     products derived from this software without specific prior 
+ *     written permission. 
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+ * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE,
+ * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE.
+ *
+ * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
+ * YOUR JURISDICTION. It is licensee's responsibility to comply with 
+ * any export regulations applicable in licensee's jurisdiction. Under 
+ * CURRENT (2001) U.S. export regulations this software 
+ * is eligible for export from the U.S. and can be downloaded by or 
+ * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
+ * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
+ * Syria, Sudan, Afghanistan and any other country to which the U.S. 
+ * has embargoed goods and services. 
+ *
+ * END_NSC_LIC_BSD */
+
+/* NSC_LIC_GPL
+ *
+ * National Semiconductor Corporation Gnu General Public License for 
+ *
+ * National Xfree frame buffer driver
+ *
+ * (GPL License with Export Notice)
+ *
+ * Copyright (c) 1999-2001
+ * National Semiconductor Corporation.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted under the terms of the GNU General 
+ * Public License as published by the Free Software Foundation; either 
+ * version 2 of the License, or (at your option) any later version  
+ *
+ * In addition to the terms of the GNU General Public License, neither 
+ * the name of the National Semiconductor Corporation nor the names of 
+ * its contributors may be used to endorse or promote products derived 
+ * from this software without specific prior written permission. 
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+ * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, 
+ * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE. See the GNU General Public License for more details. 
+ *
+ * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
+ * YOUR JURISDICTION. It is licensee's responsibility to comply with 
+ * any export regulations applicable in licensee's jurisdiction. Under 
+ * CURRENT (2001) U.S. export regulations this software 
+ * is eligible for export from the U.S. and can be downloaded by or 
+ * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
+ * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
+ * Syria, Sudan, Afghanistan and any other country to which the U.S. 
+ * has embargoed goods and services. 
+ *
+ * You should have received a copy of the GNU General Public License 
+ * along with this file; if not, write to the Free Software Foundation, 
+ * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 
+ *
+ * END_NSC_LIC_GPL */
+
+/*
+ * Fixes by
+ * Alan Hourihane <alanh@fairlite.demon.co.uk>
+ */
+
+/* Xfree86 header files */
+#include "vgaHW.h"
+#include "xf86.h"
+#include "xf86_ansic.h"
+#include "xaalocal.h"
+#include "xf86fbman.h"
+#include "miline.h"
+#include "xf86_libc.h"
+#include "xaarop.h"
+#include "nsc.h"
+
+#define SCR2SCREXP 0
+
+/* STATIC VARIABLES FOR THIS FILE
+ * Used to maintain state between setup and rendering calls.
+ */
+
+static int GeodeTransparent;
+static int GeodeTransColor;
+static int Geodedstx;
+static int Geodedsty;
+static int Geodesrcx;
+static int Geodesrcy;
+static int Geodewidth;
+static int Geodeheight;
+static int Geodebpp;
+static int GeodeCounter;
+
+#if !defined(STB_X)
+static unsigned int GeodeROP = 0;
+static unsigned short Geode_blt_mode = 0;
+static unsigned short Geode_vector_mode = 0;
+static unsigned short Geode_buffer_width = 0;
+#endif
+static unsigned int gu1_bpp = 0;
+static unsigned int gu1_xshift = 1;
+static unsigned int gu1_yshift = 1;
+static unsigned short GeodebufferWidthPixels;
+static unsigned int ImgBufOffset;
+static unsigned short Geodebb0Base;
+static unsigned short Geodebb1Base;
+static XAAInfoRecPtr localRecPtr;
+
+#define CALC_FBOFFSET(_SrcX, _SrcY) \
+	(((unsigned int) (_SrcY) << gu1_yshift) |\
+		(((unsigned int) (_SrcX)) << gu1_xshift))
+
+#define GFX_WAIT_BUSY while(READ_REG16(GP_BLIT_STATUS) & BS_BLIT_BUSY) { ; }
+#define GFX_WAIT_PENDING while(READ_REG16(GP_BLIT_STATUS) & BS_BLIT_PENDING) { ; }
+
+#define BB0_BASE_3K		0x400
+#define BB1_BASE_3K		0x930
+
+Bool GX1AccelInit(ScreenPtr pScreen);
+void GX1AccelSync(ScrnInfoPtr pScreenInfo);
+void GX1SetupForFillRectSolid(ScrnInfoPtr pScreenInfo, int color, int rop,
+			      unsigned int planemask);
+void GX1SubsequentFillRectSolid(ScrnInfoPtr pScreenInfo, int x, int y,
+				int w, int h);
+void GX1SetupFor8x8PatternColorExpand(ScrnInfoPtr pScreenInfo,
+				      int patternx, int patterny,
+				      int rop, unsigned int planemask,
+				      int trans_color);
+void GX1Subsequent8x8PatternColorExpand(ScrnInfoPtr pScreenInfo,
+					int patternx, int patterny, int x,
+					int y, int w, int h);
+void GX1SetupFor8x8PatternMonoExpand(ScrnInfoPtr pScreenInfo, int patternx,
+				     int patterny, int fg, int bg, int rop,
+				     unsigned int planemask);
+void GX1Subsequent8x8PatternMonoExpand(ScrnInfoPtr pScreenInfo, int patternx,
+				       int patterny, int x, int y, int w,
+				       int h);
+void GX1SetupForScreenToScreenCopy(ScrnInfoPtr pScreenInfo, int xdir,
+				   int ydir, int rop, unsigned int planemask,
+				   int transparency_color);
+void GX1SubsequentScreenToScreenCopy(ScrnInfoPtr pScreenInfo, int x1, int y1,
+				     int x2, int y2, int w, int h);
+void GX1SetupForSolidLine(ScrnInfoPtr pScreenInfo, int color, int rop,
+			  unsigned int planemask);
+void GX1SetupForDashedLine(ScrnInfoPtr pScrn, int fg, int bg, int rop,
+			   unsigned int planemask, int length,
+			   unsigned char *pattern);
+void GX1SubsequentBresenhamLine(ScrnInfoPtr pScreenInfo, int x1, int y1,
+				int absmaj, int absmin, int err, int len,
+				int octant);
+void GX1SubsequentSolidTwoPointLine(ScrnInfoPtr pScreenInfo, int x0, int y0,
+				    int x1, int y1, int flags);
+void GX1SubsequentHorVertLine(ScrnInfoPtr pScreenInfo, int x, int y, int len,
+			      int dir);
+
+void GX1SetupForScanlineImageWrite(ScrnInfoPtr pScreenInfo,
+				   int rop, unsigned int planemask,
+				   int transparency_color, int bpp,
+				   int depth);
+
+void GX1SubsequentScanlineImageWriteRect(ScrnInfoPtr pScreenInfo,
+					 int x, int y, int w, int h,
+					 int skipleft);
+
+void GX1SubsequentImageWriteScanline(ScrnInfoPtr pScreenInfo, int bufno);
+void GX1FillCacheBltRects(ScrnInfoPtr pScrn, int rop, unsigned int planemask,
+			  int nBox, BoxPtr pBox, int xorg, int yorg,
+			  XAACacheInfoPtr pCache);
+void OPTGX1SetupForFillRectSolid(ScrnInfoPtr pScreenInfo, int color, int rop,
+				 unsigned int planemask);
+void OPTGX1SubsequentFillRectSolid(ScrnInfoPtr pScreenInfo, int x, int y,
+				   int w, int h);
+void OPTGX1SetupForScreenToScreenCopy(ScrnInfoPtr pScreenInfo, int xdir,
+				      int ydir, int rop,
+				      unsigned int planemask,
+				      int transparency_color);
+void OPTGX1SubsequentScreenToScreenCopy(ScrnInfoPtr pScreenInfo, int x1,
+					int y1, int x2, int y2, int w, int h);
+void OPTGX1SetupForSolidLine(ScrnInfoPtr pScreenInfo, int color, int rop,
+			     unsigned int planemask);
+void OPTGX1SetupForDashedLine(ScrnInfoPtr pScrn, int fg, int bg, int rop,
+			      unsigned int planemask, int length,
+			      unsigned char *pattern);
+void OPTGX1SubsequentBresenhamLine(ScrnInfoPtr pScreenInfo, int x1, int y1,
+				   int absmaj, int absmin, int err, int len,
+				   int octant);
+void OPTGX1SubsequentSolidTwoPointLine(ScrnInfoPtr pScreenInfo,
+				       int x0, int y0, int x1, int y1,
+				       int flags);
+void OPTGX1SubsequentHorVertLine(ScrnInfoPtr pScreenInfo, int x, int y,
+				 int len, int dir);
+
+void OPTGX1SetupForScanlineImageWrite(ScrnInfoPtr pScreenInfo,
+				      int rop, unsigned int planemask,
+				      int transparency_color, int bpp,
+				      int depth);
+
+void OPTGX1SubsequentScanlineImageWriteRect(ScrnInfoPtr pScreenInfo,
+					    int x, int y, int w, int h,
+					    int skipleft);
+
+void OPTGX1SubsequentImageWriteScanline(ScrnInfoPtr pScreenInfo, int bufno);
+
+/*----------------------------------------------------------------------------
+ * GX1AccelSync.
+ *
+ * Description	:This function is called to syncronize with the graphics
+ *               engine and it waits the graphic engine is idle.This is
+ *               required before allowing   direct access to the
+ *               framebuffer.
+ * Parameters.
+ *   pScreenInfo:Screeen info pointer structure.
+ *
+ * Returns		:none
+ *
+ * Comments		:This function is called on geode_video routines.
+*----------------------------------------------------------------------------
+*/
+void
+GX1AccelSync(ScrnInfoPtr pScreenInfo)
+{
+   GFX(wait_until_idle());
+}
+
+/*----------------------------------------------------------------------------
+ * GX1SetupForFillRectSolid.
+ *
+ * Description	:This routine is called to setup the solid pattern
+ *               color for   future  rectangular fills or vectors.
+ *
+ * Parameters.
+ * pScreenInfo
+ *		Ptr		:Screen handler pointer having screen information.
+ *    color     :Specifies the color to be filled up in defined area.
+ *    rop       :Specifies the raster operation value.
+ *   planemask	:Specifies the masking value based rop srcdata.
+ *
+ * Returns		:none
+ *
+ * Comments		:none
+ *
+*----------------------------------------------------------------------------
+*/
+void
+GX1SetupForFillRectSolid(ScrnInfoPtr pScreenInfo,
+			 int color, int rop, unsigned int planemask)
+{
+   GFX(set_solid_pattern((unsigned long)color));
+
+   /* CHECK IF PLANEMASK IS NOT USED (ALL PLANES ENABLED) */
+   if (planemask == 0xFFFFFFFF) {
+      /* USE NORMAL PATTERN ROPs IF ALL PLANES ARE ENABLED */
+      GFX(set_raster_operation(XAAPatternROP[rop]));
+   } else {
+      /* SELECT ROP THAT USES SOURCE DATA FOR PLANEMASK */
+      GFX(set_solid_source((unsigned long)planemask));
+      GFX(set_raster_operation(XAAPatternROP_PM[rop]));
+   }
+}
+
+ /*----------------------------------------------------------------------------
+ * GX1SubsequentFillRectSolid.
+ *
+ * Description	:This routine is used to fill the rectangle of previously
+ *               specified  solid pattern.
+ *
+ * Parameters.
+ *  pScreenInfo :Screen handler pointer having screen information.
+ *     x and y	:Specifies the x and y co-ordinatesarea.
+ *      w and h	:Specifies width and height respectively.
+ *
+ * Returns		:none
+ *
+ * Comments		:desired pattern can be set before this function by
+ *               gfx_set_solid_pattern.
+ * Sample application uses:
+ *   - Window backgrounds. 
+ *   - x11perf: rectangle tests (-rect500).
+ *   - x11perf: fill trapezoid tests (-trap100).
+ *   - x11perf: horizontal line segments (-hseg500).
+ *----------------------------------------------------------------------------
+*/
+void
+GX1SubsequentFillRectSolid(ScrnInfoPtr pScreenInfo, int x, int y, int w,
+			   int h)
+{
+   /* SIMPLY PASS THE PARAMETERS TO THE DURANGO ROUTINE */
+   GeodePtr pGeode;
+
+   pGeode = GEODEPTR(pScreenInfo);
+
+   if (pGeode->TV_Overscan_On) {
+      x += pGeode->TVOx;
+      y += pGeode->TVOy;
+   }
+
+   GFX(pattern_fill((unsigned short)x, (unsigned short)y,
+		    (unsigned short)w, (unsigned short)h));
+}
+
+/*----------------------------------------------------------------------------
+ * GX1SetupFor8x8PatternColorExpand
+ *
+ * Description	:This routine is called to fill the color pattern of
+ *                 8x8.
+ * Parameters.
+ *		pScreenInfo :Screen handler pointer having screen information.
+ *		patternx	:This is set from on rop data.
+ *      patterny	:This is set based on rop data.
+ *		planemask	:Specifies the value of masking from rop data
+ *		trans_color :to be added. 
+ * Returns		:none.
+ *
+ * Comments     :none.
+ *
+*----------------------------------------------------------------------------
+*/
+
+void
+GX1SetupFor8x8PatternColorExpand(ScrnInfoPtr pScreenInfo,
+				 int patternx, int patterny,
+				 int rop, unsigned int planemask,
+				 int trans_color)
+{
+   /* CHECK IF PLANEMASK IS NOT USED (ALL PLANES ENABLED) */
+   if (planemask == 0xFFFFFFFF) {
+      /* USE NORMAL PATTERN ROPs IF ALL PLANES ARE ENABLED */
+      GFX(set_raster_operation(XAAPatternROP[rop]));
+   } else {
+      /* SELECT ROP THAT USES SOURCE DATA FOR PLANEMASK */
+      GFX(set_solid_source((unsigned int)planemask));
+      GFX(set_raster_operation(XAAPatternROP_PM[rop]));
+   }
+}
+
+/*----------------------------------------------------------------------------
+ * GX1Subsequent8x8PatternColorExpand
+ *
+ * Description	:This routine is called to fill  a rectangle with the
+ *               color pattern of previously loaded pattern.
+ *
+ * Parameters.
+ *	pScreenInfo	:Screen handler pointer having screen information.
+ *  patternx	:This is set from on rop data.
+ *  patterny	:This is set based on rop data.
+ *      x		:x -coordinates of the destination rectangle
+ *      y       :y-co-ordinates of the destination rectangle
+ *      w	    :Specifies width of the rectangle
+ *      h       :Height of the window of the rectangle
+ *		
+ * Returns		:none
+ *
+ * Comments		:The patterns specified is ignored inside the function
+ * Sample application uses:
+ *   - Patterned desktops
+ *   - x11perf: stippled rectangle tests (-srect500).
+ *   - x11perf: opaque stippled rectangle tests (-osrect500).
+*----------------------------------------------------------------------------
+*/
+void
+GX1Subsequent8x8PatternColorExpand(ScrnInfoPtr pScreenInfo,
+				   int patternx, int patterny, int x, int y,
+				   int w, int h)
+{
+   GeodePtr pGeode = GEODEPTR(pScreenInfo);
+
+   DEBUGMSG(1, (0, 0, "8x8color %d %d %dx%d\n", x, y, w, h));
+   if (pGeode->TV_Overscan_On) {
+      x += pGeode->TVOx;
+      y += pGeode->TVOy;
+   }
+   /* SIMPLY PASS THE PARAMETERS TO THE DURANGO ROUTINE */
+   /* Ignores specified pattern. */
+   GFX(color_pattern_fill((unsigned short)x, (unsigned short)y,
+			  (unsigned short)w, (unsigned short)h,
+			  ((unsigned long *)((pGeode->FBBase +
+					      (patterny << gu1_yshift)) +
+					     patternx))));
+}
+
+/*----------------------------------------------------------------------------
+ * GX1SetupFor8x8PatternMonoExpand
+ *
+ * Description	:This routine is called to fill the monochrome pattern of
+ *                 8x8.
+ * Parameters.
+ * 	pScreenInfo :Screen handler pointer having screen information.
+ *      patternx:This is set from on rop data.
+ *      patterny:This is set based on rop data.
+ *       fg		:Specifies the foreground color
+ *       bg     :Specifies the background color
+ *	planemask	:Specifies the value of masking from rop data
+
+ * Returns		:none.
+ *
+ * Comments     :none.
+ *
+*----------------------------------------------------------------------------
+*/
+void
+GX1SetupFor8x8PatternMonoExpand(ScrnInfoPtr pScreenInfo,
+				int patternx, int patterny, int fg,
+				int bg, int rop, unsigned int planemask)
+{
+   int trans = (bg == -1);
+
+   /* LOAD PATTERN COLORS AND DATA */
+   GFX(set_mono_pattern((unsigned int)bg, (unsigned int)fg,
+			(unsigned int)patternx, (unsigned int)patterny,
+			trans));
+
+   GFX(set_mono_source((unsigned int)bg, (unsigned int)fg, trans));
+
+   /* CHECK IF PLANEMASK IS NOT USED (ALL PLANES ENABLED) */
+   if (planemask == 0xFFFFFFFF) {
+      /* USE NORMAL PATTERN ROPs IF ALL PLANES ARE ENABLED */
+      GFX(set_raster_operation(XAAPatternROP[rop]));
+   } else {
+      /* SELECT ROP THAT USES SOURCE DATA FOR PLANEMASK */
+      GFX(set_solid_source((unsigned int)planemask));
+      GFX(set_raster_operation(XAAPatternROP_PM[rop]));
+   }
+}
+
+/*----------------------------------------------------------------------------
+ * GX1Subsequent8x8PatternMonoExpand
+ *
+ * Description	:This routine is called to fill  a ractanglethe
+ *                 monochrome pattern of previusly loaded pattern.
+ *
+ * Parameters.
+ *	pScreenInfo	:Screen handler pointer having screen information.
+ *  patternx	:This is set from on rop data.
+ *  patterny	:This is set based on rop data.
+ *       fg		:Specifies the foreground color
+ *       bg		:Specifies the background color
+ *  planemask	:Specifies the value of masking from rop data
+
+ * Returns		:none
+ *
+ * Comments		:The patterns specified is ignored inside the function
+ * Sample application uses:
+ *   - Patterned desktops
+ *   - x11perf: stippled rectangle tests (-srect500).
+ *   - x11perf: opaque stippled rectangle tests (-osrect500).
+*----------------------------------------------------------------------------
+*/
+void
+GX1Subsequent8x8PatternMonoExpand(ScrnInfoPtr pScreenInfo,
+				  int patternx, int patterny, int x, int y,
+				  int w, int h)
+{
+   GeodePtr pGeode = GEODEPTR(pScreenInfo);
+
+   if (pGeode->TV_Overscan_On) {
+      x += pGeode->TVOx;
+      y += pGeode->TVOy;
+   }
+
+   /* SIMPLY PASS THE PARAMETERS TO THE DURANGO ROUTINE */
+   /* Ignores specified pattern. */
+   GFX(pattern_fill((unsigned short)x, (unsigned short)y,
+		    (unsigned short)w, (unsigned short)h));
+}
+
+/*----------------------------------------------------------------------------
+ * GX1SetupForScreenToScreenCopy
+ *
+ * Description	:This function is used to set up the planemask and raster
+ *                 for future Bliting functionality.
+ *
+ * Parameters:
+ *	pScreenInfo :Screen handler pointer having screen information.
+ *      xdir	:This is set based on rop data.
+ *      ydir    :This is set based on rop data.
+ *      rop		:sets the raster operation
+ *	transparency:tobeadded
+ *  planemask	:Specifies the value of masking from rop data
+
+ * Returns		:none
+ *
+ * Comments		:The patterns specified is ignored inside the function
+*----------------------------------------------------------------------------
+*/
+void
+GX1SetupForScreenToScreenCopy(ScrnInfoPtr pScreenInfo,
+			      int xdir, int ydir, int rop,
+			      unsigned int planemask, int transparency_color)
+{
+   GFX(set_solid_pattern(planemask));
+   /* SET RASTER OPERATION FOR USING PATTERN AS PLANE MASK */
+   GFX(set_raster_operation(XAACopyROP[rop]));
+   /* SAVE TRANSPARENCY FLAG */
+   GeodeTransparent = (transparency_color == -1) ? 0 : 1;
+   GeodeTransColor = transparency_color;
+
+}
+
+/*----------------------------------------------------------------------------
+ * GX1SubsquentScreenToScreenCopy
+ *
+ * Description	:This function is called to perform a screen to screen
+ *                 BLT  using the previously  specified planemask,raster
+ *                 operation and  * transparency flag
+ *
+ * Parameters.
+ * 	pScreenInfo :Screen handler pointer having screen information.
+ *  	x1	 	:x -coordinates of the source window
+ *      y1      :y-co-ordinates of the source window
+ *      x2		:x -coordinates of the destination window
+ *      y2      :y-co-ordinates of the destination window
+ *      w	    :Specifies width of the window to be copied
+ *      h       :Height of the window to be copied.
+ * Returns		:none
+ *
+ * Comments		:The patterns specified is ignored inside the function
+ * Sample application uses (non-transparent):
+ *   - Moving windows.
+ *   - x11perf: scroll tests (-scroll500).
+ *   - x11perf: copy from window to window (-copywinwin500).
+ *
+ * No application found using transparency.
+*----------------------------------------------------------------------------
+*/
+
+void
+GX1SubsequentScreenToScreenCopy(ScrnInfoPtr pScreenInfo,
+				int x1, int y1, int x2, int y2, int w, int h)
+{
+   GeodePtr pGeode = GEODEPTR(pScreenInfo);
+
+   if (pGeode->TV_Overscan_On) {
+      if ((x1 < pScreenInfo->virtualX) && (y1 < pScreenInfo->virtualY)) {
+	 x1 += pGeode->TVOx;
+	 y1 += pGeode->TVOy;
+      }
+      x2 += pGeode->TVOx;
+      y2 += pGeode->TVOy;
+   }
+
+   if (GeodeTransparent) {
+      /* CALL ROUTINE FOR TRANSPARENT SCREEN TO SCREEN BLT
+       * * Should only be called for the "copy" raster operation.
+       */
+      GFX(screen_to_screen_xblt((unsigned short)x1, (unsigned short)y1,
+				(unsigned short)x2, (unsigned short)y2,
+				(unsigned short)w, (unsigned short)h,
+				GeodeTransColor));
+   } else {
+      /* CALL ROUTINE FOR NORMAL SCREEN TO SCREEN BLT */
+      GFX(screen_to_screen_blt((unsigned short)x1, (unsigned short)y1,
+			       (unsigned short)x2, (unsigned short)y2,
+			       (unsigned short)w, (unsigned short)h));
+   }
+}
+
+/*----------------------------------------------------------------------------
+ * GX1SetupForScanlineImageWrite
+ *
+ * Description	:This function is used to set up the planemask and raster
+ *               for future Bliting functionality.
+ *
+ * Parameters:
+ *		pScreenInfo			:Screen handler pointer having screen information.
+ *		rop					:sets the raster operation
+ *		transparency_color	:transparency color key.
+ *		planemask			:Specifies the value of masking from rop data
+ *      bpp					:bits per pixel of the source pixmap
+ *		depth				:depth of the source pixmap.
+ * Returns		:none
+ *
+ * Comments		:none
+ *  x11perf -putimage10  
+ *  x11perf -putimage100 
+ *  x11perf -putimage500 
+*----------------------------------------------------------------------------
+*/
+
+void
+GX1SetupForScanlineImageWrite(ScrnInfoPtr pScreenInfo,
+			      int rop, unsigned int planemask,
+			      int transparency_color, int bpp, int depth)
+{
+   GFX(set_solid_pattern((unsigned int)planemask));
+   /* SET RASTER OPERATION FOR USING PATTERN AS PLANE MASK */
+   GFX(set_raster_operation(XAACopyROP_PM[rop]));
+   /* SAVE TRANSPARENCY FLAG */
+   GeodeTransparent = (transparency_color == -1) ? 0 : 1;
+   GeodeTransColor = transparency_color;
+   Geodebpp = bpp;
+}
+
+/*----------------------------------------------------------------------------
+ * GX1SubsequentScanlineImageWriteRect
+ *
+ * Description	:This function is used to set up the x,y corordinates and width
+ *               &height for future Bliting functionality.
+ *
+ * Parameters:
+ *	pScreenInfo :Screen handler pointer having screen information.
+ *      x		:destination x
+ *	    y		:destination y
+ *		w		:Specifies the width of the rectangle to be  copied
+ *		h		:Specifies the height of the rectangle to be  copied
+ *	
+ * Returns		:none
+ *
+ * Comments		:none
+*----------------------------------------------------------------------------
+*/
+void
+GX1SubsequentScanlineImageWriteRect(ScrnInfoPtr pScreenInfo,
+				    int x, int y, int w, int h, int skipleft)
+{
+
+   Geodedstx = x;
+   Geodedsty = y;
+   Geodewidth = w;
+   Geodeheight = h;
+   GeodeCounter = 0;
+}
+
+/*----------------------------------------------------------------------------
+ * GX1SubsquentImageWriteScanline
+ *
+ * Description	:This function is called to 
+ *               BLT  using the previously  specified planemask,raster
+ *               operation and   transparency flag
+ *
+ * Parameters.
+ * 	pScreenInfo :Screen handler pointer having screen information.
+ *
+ * Returns		:none
+ *
+ * Comments		:The patterns specified is ignored inside the function
+ * Sample application uses (non-transparent):
+ *   - Moving windows.
+ *   - x11perf: scroll tests (-scroll500).
+ *   - x11perf: copy from window to window (-copywinwin500).
+ *
+ * No application found using transparency.
+*----------------------------------------------------------------------------
+*/
+
+void
+GX1SubsequentImageWriteScanline(ScrnInfoPtr pScreenInfo, int bufno)
+{
+   GeodePtr pGeode = GEODEPTR(pScreenInfo);
+   int blt_height = 0;
+   char blit = FALSE;
+
+   GeodeCounter++;
+
+   if ((Geodeheight <= pGeode->NoOfImgBuffers) &&
+       (GeodeCounter == Geodeheight)) {
+      blit = TRUE;
+      blt_height = Geodeheight;
+   } else if ((Geodeheight > pGeode->NoOfImgBuffers)
+	      && (GeodeCounter == pGeode->NoOfImgBuffers)) {
+      blit = TRUE;
+      Geodeheight -= pGeode->NoOfImgBuffers;
+      blt_height = pGeode->NoOfImgBuffers;
+   } else
+      return;
+
+   if (blit) {
+      blit = FALSE;
+
+      GeodeCounter = 0;
+
+      if (GeodeTransparent) {
+	 /* CALL ROUTINE FOR TRANSPARENT SCREEN TO SCREEN BLT
+	  * * Should only be called for the "copy" raster operation.
+	  */
+	 GFX(screen_to_screen_xblt((unsigned short)Geodesrcx,
+				   (unsigned short)Geodesrcy,
+				   (unsigned short)Geodedstx,
+				   (unsigned short)Geodedsty,
+				   (unsigned short)Geodewidth,
+				   (unsigned short)blt_height,
+				   GeodeTransColor));
+      } else {
+	 /* CALL ROUTINE FOR NORMAL SCREEN TO SCREEN BLT */
+	 GFX(screen_to_screen_blt((unsigned short)Geodesrcx,
+				  (unsigned short)Geodesrcy,
+				  (unsigned short)Geodedstx,
+				  (unsigned short)Geodedsty,
+				  (unsigned short)Geodewidth,
+				  (unsigned short)blt_height));
+      }
+      Geodedsty += blt_height;
+      GFX(wait_until_idle());
+   }
+}
+
+static unsigned short vector_mode_table[] = {
+   VM_MAJOR_INC | VM_MINOR_INC | VM_X_MAJOR,
+   VM_MAJOR_INC | VM_MINOR_INC | VM_Y_MAJOR,
+   VM_MAJOR_INC | VM_X_MAJOR,
+   VM_MINOR_INC | VM_Y_MAJOR,
+   VM_MINOR_INC | VM_X_MAJOR,
+   VM_MAJOR_INC | VM_Y_MAJOR,
+   VM_X_MAJOR,
+   VM_Y_MAJOR,
+};
+
+/*----------------------------------------------------------------------------
+ * GX1SetupForSolidLine
+ *
+ * Description	:This function is used setup the solid line color for
+ *               future line draws.
+ *
+ *
+ * Parameters.
+ * 	pScreenInfo :Screen handler pointer having screen information.
+ *      color	:Specifies the color value od line
+ *      rop     :Specifies rop values.
+ *  Planemask	:Specifies planemask value.
+ * Returns		:none
+ *
+ * Comments		:none
+*----------------------------------------------------------------------------
+*/
+void
+GX1SetupForSolidLine(ScrnInfoPtr pScreenInfo,
+		     int color, int rop, unsigned int planemask)
+{
+   /* LOAD THE SOLID PATTERN COLOR */
+   GFX(set_solid_pattern((unsigned int)color));
+
+   /* USE NORMAL PATTERN ROPs IF ALL PLANES ARE ENABLED */
+   GFX(set_raster_operation(XAAPatternROP[rop]));
+}
+
+/*---------------------------------------------------------------------------
+ * GX1SubsequentBresenhamLine
+ *
+ * Description	:This function is used to render a vector using the
+ *                 specified bresenham parameters.
+ *
+ * Parameters:
+ * pScreenInfo 	:Screen handler pointer having screen information.
+ *      x1  	:Specifies the starting x position
+ *      y1      :Specifies starting y possition
+ *      absmaj	:Specfies the Bresenman absolute major.
+ *	  absmin	:Specfies the Bresenman absolute minor.
+ *	  err       :Specifies the bresenham err term.
+ *	  len       :Specifies the length of the vector interms of pixels.
+ *	  octant    :not used in this function,may be added for standard
+ *                    interface.
+ * Returns		:none
+ *
+ * Comments     :none
+ * Sample application uses:
+ *   - Window outlines on window move.
+ *   - x11perf: line segments (-line500).
+ *   - x11perf: line segments (-seg500).
+*----------------------------------------------------------------------------
+*/
+void
+GX1SubsequentBresenhamLine(ScrnInfoPtr pScreenInfo,
+			   int x1, int y1, int absmaj, int absmin, int err,
+			   int len, int octant)
+{
+   int axial, init, diag;
+
+   DEBUGMSG(0, (0, 0, "BLine %d, %d, %d, %d, %d, %d, %d\n",
+		x1, y1, absmaj, absmin, err, len, octant));
+
+   /* DETERMINE BRESENHAM PARAMETERS */
+
+   axial = ((int)absmin << 1);
+   init = axial - (int)absmaj;
+   diag = init - (int)absmaj;
+
+   /* ADJUST INITIAL ERROR
+    * * Adjust by -1 for certain directions so that the vector 
+    * * hits the same pixels when drawn in either direction.
+    * * The Gamma value is assumed to account for the initial 
+    * * error adjustment for clipped lines.
+    */
+
+   init += err;
+
+   /* CALL ROUTINE TO DRAW VECTOR */
+
+   GFX(bresenham_line((unsigned short)x1,
+		      (unsigned short)y1,
+		      (unsigned short)len,
+		      (unsigned short)init,
+		      (unsigned short)axial,
+		      (unsigned short)diag,
+		      (unsigned short)vector_mode_table[octant]));
+
+}
+
+#define ABS(_val1, _val2) (((_val1) > (_val2)) ? ((_val1)-(_val2)) : ((_val2) - (_val1)))
+
+void
+GX1SubsequentSolidTwoPointLine(ScrnInfoPtr pScreenInfo,
+			       int x0, int y0, int x1, int y1, int flags)
+{
+   long dx, dy, dmaj, dmin;
+   long axialerr, diagerr, initerr;
+   unsigned short vec_flags = 0;
+
+   dx = ABS(x1, x0);
+   dy = ABS(y1, y0);
+   if (dx >= dy) {
+      dmaj = dx;
+      dmin = dy;
+      vec_flags = VM_X_MAJOR;
+      if (x1 > x0)
+	 vec_flags |= VM_MAJOR_INC;
+      if (y1 > y0)
+	 vec_flags |= VM_MINOR_INC;
+   } else {
+      dmaj = dy;
+      dmin = dx;
+      vec_flags = VM_Y_MAJOR;
+      if (x1 > x0)
+	 vec_flags |= VM_MINOR_INC;
+      if (y1 > y0)
+	 vec_flags |= VM_MAJOR_INC;
+   }
+   axialerr = dmin << 1;
+   diagerr = (dmin - dmaj) << 1;
+   initerr = (dmin << 1) - dmaj;
+   if (!(vec_flags & VM_MINOR_INC))
+      initerr--;
+
+   GFX(bresenham_line((unsigned short)x0,
+		      (unsigned short)y0,
+		      (unsigned short)dmaj,
+		      (unsigned short)initerr,
+		      (unsigned short)axialerr,
+		      (unsigned short)diagerr, vec_flags));
+}
+
+/*---------------------------------------------------------------------------
+ * GX1SubsequentHorVertLine
+ *
+ * This routine is called to render a vector using the specified Bresenham
+ * parameters.  
+ *
+ * Sample application uses:
+ *   - Window outlines on window move.
+ *   - x11perf: line segments (-hseg500).
+ *   - x11perf: line segments (-vseg500).
+ *---------------------------------------------------------------------------
+ */
+void
+GX1SubsequentHorVertLine(ScrnInfoPtr pScreenInfo,
+			 int x, int y, int len, int dir)
+{
+   GeodePtr pGeode = GEODEPTR(pScreenInfo);
+
+   if (pGeode->TV_Overscan_On) {
+      x += pGeode->TVOx;
+      y += pGeode->TVOy;
+   }
+   GFX(pattern_fill((unsigned short)x, (unsigned short)y,
+		    (unsigned short)((dir == DEGREES_0) ? len : 1),
+		    (unsigned short)((dir == DEGREES_0) ? 1 : len)));
+}
+
+void
+GX1SetupForDashedLine(ScrnInfoPtr pScrn, int fg, int bg, int rop,
+		      unsigned int planemask, int length,
+		      unsigned char *pattern)
+{
+   int trans = (bg == -1);
+   unsigned long *pat = (unsigned long *)pattern;
+
+   /* LOAD PATTERN COLORS AND DATA */
+
+   GFX(set_mono_pattern((unsigned long)bg, (unsigned long)fg,
+			(unsigned long)pat, (unsigned long)pat,
+			(unsigned char)trans));
+
+   /* CHECK IF PLANEMASK IS NOT USED (ALL PLANES ENABLED) */
+
+   if (planemask == (unsigned int)-1) {
+      /* USE NORMAL PATTERN ROPs IF ALL PLANES ARE ENABLED */
+
+      GFX(set_raster_operation(XAAPatternROP[rop]));
+   } else {
+      /* SELECT ROP THAT USES SOURCE DATA FOR PLANEMASK */
+
+      GFX(set_solid_source((unsigned long)planemask));
+      GFX(set_raster_operation(XAAPatternROP_PM[rop]));
+   }
+}
+
+#if SCR2SCREXP
+void
+GX1SetupForScreenToScreenColorExpandFill(ScrnInfoPtr pScrn,
+					 int fg, int bg, int rop,
+					 unsigned int planemask)
+{
+   GFX(set_solid_pattern(planemask));
+   GFX(set_mono_source(bg, fg, (bg == -1)));
+
+   /* USE NORMAL PATTERN ROPs IF ALL PLANES ARE ENABLED */
+   GFX(set_raster_operation(XAACopyROP_PM[rop & 0x0F]));
+
+   DEBUGMSG(0, (0, X_NONE, "%x %x %x %x\n", fg, bg, rop, planemask));
+}
+
+void
+GX1SubsequentScreenToScreenColorExpandFill(ScrnInfoPtr pScrn,
+					   int x, int y, int w, int h,
+					   int srcx, int srcy, int offset)
+{
+   GeodePtr pGeode = GEODEPTR(pScrn);
+
+   GFX(mono_bitmap_to_screen_blt(offset, 0, x, y, w, h,
+				 (unsigned char *)(pGeode->FBBase +
+						   CALC_FBOFFSET(srcx, srcy)),
+				 pGeode->Pitch));
+}
+#endif
+
+#if !defined(STB_X)
+/*----------------------------------------------------------------------------
+ * OPTGX1SetupForFillRectSolid.
+ *
+ * Description	:This routine is called to setup the solid pattern
+ *               color for   future  rectangular fills or vectors.
+ *				 (non durango version)
+ *
+ * Parameters.
+ * pScreenInfo
+ *		Ptr		:Screen handler pointer having screen information.
+ *    color     :Specifies the color to be filled up in defined area.
+ *    rop       :Specifies the raster operation value.
+ *   planemask	:Specifies the masking value based rop srcdata.
+ *
+ * Returns		:none
+ *
+ * Comments		:none
+ *
+*----------------------------------------------------------------------------
+*/
+void
+OPTGX1SetupForFillRectSolid(ScrnInfoPtr pScreenInfo,
+			    int color, int rop, unsigned int planemask)
+{
+   unsigned short rop16;
+
+   if (gu1_bpp == 8) {
+      color &= 0x00FF;
+      color |= (color << 8);
+   }
+
+   /* POLL UNTIL ABLE TO WRITE THE PATTERN COLOR */
+
+   if (planemask == 0xFFFFFFFF) {
+      if (gu1_bpp == 8) {
+	 planemask &= 0x00FF;
+	 planemask |= (planemask << 8);
+      }
+
+      rop16 = XAAPatternROP[rop];
+
+      /* POLL UNTIL ABLE TO WRITE THE SOURCE COLOR */
+
+      GFX_WAIT_PENDING;
+      WRITE_REG32(GP_SRC_COLOR_0, (planemask << 16) | planemask);
+   } else {
+      rop16 = XAAPatternROP_PM[rop];
+   }
+
+   Geode_blt_mode = 0;
+
+   /* POLL UNTIL ABLE TO WRITE THE PATTERN COLOR */
+   /* Only one operation can be pending at a time. */
+
+   GFX_WAIT_PENDING;
+   WRITE_REG16(GP_PAT_COLOR_0, (unsigned short)color);
+   WRITE_REG16(GP_RASTER_MODE, rop16);
+}
+
+ /*----------------------------------------------------------------------------
+ * OPTGX1SubsequentFillRectSolid.
+ *
+ * Description	:This routine is used to fill the rectangle of previously
+ *               specified  solid pattern.
+ *				 (non durango version)
+ *
+ * Parameters.
+ *  pScreenInfo :Screen handler pointer having screen information.
+ *     x and y	:Specifies the x and y co-ordinatesarea.
+ *      w and h	:Specifies width and height respectively.
+ *
+ * Returns		:none
+ *
+ * Comments		:desired pattern can be set before this function by
+ *               gfx_set_solid_pattern.
+ * Sample application uses:
+ *   - Window backgrounds. 
+ *   - x11perf: rectangle tests (-rect500).
+ *   - x11perf: fill trapezoid tests (-trap100).
+ *   - x11perf: horizontal line segments (-hseg500).
+ *----------------------------------------------------------------------------
+*/
+void
+OPTGX1SubsequentFillRectSolid(ScrnInfoPtr pScreenInfo,
+			      int x, int y, int width, int height)
+{
+   unsigned short section;
+   GeodePtr pGeode = GEODEPTR(pScreenInfo);
+
+   if (pGeode->TV_Overscan_On) {
+      x += pGeode->TVOx;
+      y += pGeode->TVOy;
+   }
+
+   /* POLL UNTIL ABLE TO WRITE TO THE REGISTERS */
+   /* Only one operation can be pending at a time. */
+
+   GFX_WAIT_PENDING;
+
+   /* SET REGISTERS TO DRAW RECTANGLE */
+   WRITE_REG32(GP_DST_XCOOR, (y << 16) | x);
+
+   WRITE_REG16(GP_HEIGHT, height);
+
+   /* CHECK WIDTH FOR GX BUG WORKAROUND */
+
+   if (width <= 16) {
+      /* OK TO DRAW SMALL RECTANGLE IN ONE PASS */
+
+      WRITE_REG16(GP_WIDTH, width);
+      WRITE_REG16(GP_BLIT_MODE, Geode_blt_mode);
+   } else {
+      /* DRAW FIRST PART OF RECTANGLE */
+      /* Get to a 16 pixel boundary. */
+
+      section = 0x10 - (x & 0x0F);
+      WRITE_REG16(GP_WIDTH, section);
+      WRITE_REG16(GP_BLIT_MODE, Geode_blt_mode);
+
+      /* POLL UNTIL ABLE TO LOAD THE SECOND RECTANGLE */
+
+      GFX_WAIT_PENDING;
+
+      WRITE_REG32(GP_DST_XCOOR, (y << 16) | (x + section));
+      WRITE_REG16(GP_WIDTH, width - section);
+      WRITE_REG16(GP_BLIT_MODE, Geode_blt_mode);
+   }
+}
+
+/*----------------------------------------------------------------------------
+ * OPTGX1SetupForScreenToScreenCopy
+ *
+ * Description	:This function is used to set up the planemask and raster
+ *                 for future Bliting functionality.
+ *				 (non durango version)
+ *
+ * Parameters:
+ *	pScreenInfo :Screen handler pointer having screen information.
+ *      xdir	:This is set based on rop data.
+ *      ydir    :This is set based on rop data.
+ *      rop		:sets the raster operation
+ *	transparency:tobeadded
+ *  planemask	:Specifies the value of masking from rop data
+
+ * Returns		:none
+ *
+ * Comments		:The patterns specified is ignored inside the function
+*----------------------------------------------------------------------------
+*/
+void
+OPTGX1SetupForScreenToScreenCopy(ScrnInfoPtr pScreenInfo,
+				 int xdir, int ydir, int rop,
+				 unsigned int planemask,
+				 int transparency_color)
+{
+   int GFXusesDstData;
+   unsigned short rop16 = XAACopyROP[rop];
+
+   /* FORMAT 8 BPP COLOR */
+   /* GX requires 8BPP color data be duplicated into bits [15:8]. */
+
+   if (gu1_bpp == 8) {
+      planemask &= 0x00FF;
+      planemask |= (planemask << 8);
+   }
+
+   /* SET FLAG INDICATING ROP REQUIRES DESTINATION DATA */
+   /* True if even bits (0:2:4:6) do not equal the correspinding */
+   /* even bits (1:3:5:7). */
+
+   GFXusesDstData = ((rop & 0x55) ^ ((rop >> 1) & 0x55));
+
+   Geode_blt_mode = GFXusesDstData ? BM_READ_DST_FB1 | BM_READ_SRC_FB :
+	 BM_READ_SRC_FB;
+
+   /* CHECK AVAILABLE BLT BUFFER SIZE */
+   /* Can use both BLT buffers if no destination data is required. */
+
+   Geode_buffer_width = GFXusesDstData ? GeodebufferWidthPixels :
+	 GeodebufferWidthPixels << 1;
+
+   /* POLL UNTIL ABLE TO WRITE THE PATTERN COLOR */
+   /* Only one operation can be pending at a time. */
+
+   GFX_WAIT_PENDING;
+
+   WRITE_REG16(GP_PAT_COLOR_0, (unsigned short)planemask);
+   WRITE_REG16(GP_RASTER_MODE, rop16);
+
+   GeodeTransparent = (transparency_color == -1) ? 0 : 1;
+   GeodeTransColor = transparency_color;
+}
+
+/*----------------------------------------------------------------------------
+ * OPTGX1SubsquentScreenToScreenCopy
+ *
+ * Description	:This function is called to perform a screen to screen
+ *                 BLT  using the previously  specified planemask,raster
+ *                 operation and  * transparency flag
+ *				 (non durango version)
+ *
+ * Parameters.
+ * 	pScreenInfo :Screen handler pointer having screen information.
+ *  	srcx	:x -coordinates of the source window
+ *      srcy    :y-co-ordinates of the source window
+ *      dstx	:x -coordinates of the destination window
+ *      dsty    :y-co-ordinates of the destination window
+ *      width	:Specifies width of the window to be copied
+ *      height  :Height of the window to be copied.
+ * Returns		:none
+ *
+ * Comments		:The patterns specified is ignored inside the function
+ * Sample application uses (non-transparent):
+ *   - Moving windows.
+ *   - x11perf: scroll tests (-scroll500).
+ *   - x11perf: copy from window to window (-copywinwin500).
+ *
+ * No application found using transparency.
+*----------------------------------------------------------------------------
+*/
+void
+OPTGX1SubsequentScreenToScreenCopy(ScrnInfoPtr pScreenInfo,
+				   int srcx, int srcy, int dstx, int dsty,
+				   int width, int height)
+{
+   unsigned short section;
+   unsigned short blit_mode = 0;
+   GeodePtr pGeode = GEODEPTR(pScreenInfo);
+
+   if (pGeode->TV_Overscan_On) {
+      if ((srcx < pScreenInfo->virtualX) && (srcy < pScreenInfo->virtualY)) {
+	 srcx += pGeode->TVOx;
+	 srcy += pGeode->TVOy;
+      }
+      dstx += pGeode->TVOx;
+      dsty += pGeode->TVOy;
+   }
+   if (GeodeTransparent) {
+      if (gu1_bpp == 8) {
+	 GeodeTransColor &= 0x00FF;
+	 GeodeTransColor |= (GeodeTransColor << 8);
+      }
+      GeodeTransColor =
+	    (GeodeTransColor & 0x0000FFFF) | (GeodeTransColor << 16);
+
+      /* WAIT UNTIL PIPELINE IS NOT BUSY BEFORE LOADING DATA INTO BB1 */
+      /* Need to make sure any previous BLT using BB1 is complete. */
+      /* Only need to load 32 bits of BB1 for the 1 pixel BLT that follows. */
+
+      GFX_WAIT_BUSY;
+      WRITE_SCRATCH32(Geodebb1Base, GeodeTransColor);
+
+      /* DO BOGUS BLT TO LATCH DATA FROM BB1 */
+      /* Already know graphics pipeline is idle. */
+      /* Only need to latch data into the holding registers for the current */
+      /* data from BB1.  A 1 pixel wide BLT will suffice. */
+
+      WRITE_REG32(GP_DST_XCOOR, 0);
+      WRITE_REG32(GP_SRC_XCOOR, 0);
+      WRITE_REG32(GP_WIDTH, 0x00010001);
+      WRITE_REG16(GP_RASTER_MODE, 0x00CC);
+      WRITE_REG16(GP_BLIT_MODE, BM_READ_SRC_FB | BM_READ_DST_BB1);
+
+      /* WRITE REGISTERS FOR REAL SCREEN TO SCREEN BLT */
+
+      GFX_WAIT_PENDING;
+      WRITE_REG16(GP_HEIGHT, height);
+      WRITE_REG16(GP_RASTER_MODE, 0x10C6);
+      WRITE_REG32(GP_PAT_COLOR_0, 0xFFFFFFFF);
+
+   }
+
+   /* CHECK Y DIRECTION */
+   /* Hardware has support for negative Y direction. */
+
+   if (dsty > srcy) {
+      blit_mode = BM_REVERSE_Y;
+      srcy += height - 1;
+      dsty += height - 1;
+   }
+
+   /* CHECK X DIRECTION */
+   /* Hardware does not support negative X direction since at the time */
+   /* of development all supported resolutions could fit a scanline of */
+   /* data at once into the BLT buffers (using both BB0 and BB1).  This */
+   /* code is more generic to allow for any size BLT buffer. */
+
+   if (dstx > srcx) {
+      srcx += width;
+      dstx += width;
+   }
+
+   /* POLL UNTIL ABLE TO WRITE TO THE REGISTERS */
+   /* Write the registers that do not change for each section. */
+
+   GFX_WAIT_PENDING;
+   WRITE_REG16(GP_HEIGHT, height);
+
+   /* REPEAT UNTIL FINISHED WITH RECTANGLE */
+   /* Perform BLT in vertical sections, as wide as the BLT buffer allows. */
+   /* Hardware does not split the operations, so software must do it to */
+   /* avoid large scanlines that would overflow the BLT buffers. */
+
+   while (width > 0) {
+      /* CHECK WIDTH OF CURRENT SECTION */
+
+      if (width > Geode_buffer_width)
+	 section = Geode_buffer_width;
+      else
+	 section = width;
+
+      /* PROGRAM REGISTERS THAT ARE THE SAME FOR EITHER X DIRECTION */
+
+      GFX_WAIT_PENDING;
+      WRITE_REG16(GP_SRC_YCOOR, srcy);
+      WRITE_REG16(GP_DST_YCOOR, dsty);
+      WRITE_REG16(GP_WIDTH, section);
+
+      /* CHECK X DIRECTION */
+
+      if (dstx > srcx) {
+	 /* NEGATIVE X DIRECTION */
+	 /* Still positive X direction within the section. */
+
+	 srcx -= section;
+	 dstx -= section;
+	 WRITE_REG16(GP_SRC_XCOOR, srcx);
+	 WRITE_REG16(GP_DST_XCOOR, dstx);
+      } else {
+	 /* POSITIVE X DIRECTION */
+
+	 WRITE_REG16(GP_SRC_XCOOR, srcx);
+	 WRITE_REG16(GP_DST_XCOOR, dstx);
+	 dstx += section;
+	 srcx += section;
+      }
+      WRITE_REG16(GP_BLIT_MODE, Geode_blt_mode | blit_mode);
+      width -= section;
+   }
+}
+
+/*----------------------------------------------------------------------------
+ * OPTGX1SetupForScanlineImageWrite
+ *
+ * Description	:This function is used to set up the planemask and raster
+ *               for future Bliting functionality.(non durango version)
+ *
+ * Parameters:
+ *		pScreenInfo			:Screen handler pointer having screen information.
+ *      rop					:sets the raster operation
+ *		transparency_color	:tobeadded
+ *		planemask			:Specifies the value of masking from rop data
+ *      bpp					:bits per pixel of the source pixmap
+ *		depth				:depth of the source pixmap.
+ * Returns		:none
+ *
+ * Comments		:none
+*----------------------------------------------------------------------------
+*/
+void
+OPTGX1SetupForScanlineImageWrite(ScrnInfoPtr pScreenInfo,
+				 int rop, unsigned int planemask,
+				 int transparency_color, int bpp, int depth)
+{
+   Geodebpp = bpp;
+   OPTGX1SetupForScreenToScreenCopy(pScreenInfo,
+				    0, 0, rop, planemask, transparency_color);
+}
+
+/*----------------------------------------------------------------------------
+ * OPTGX1SubsequentScanlineImageWriteRect
+ *
+ * Description	:This function is used to set up the x,y corordinates and width
+ *                &height for future Bliting functionality.(non durango version)
+ *
+ * Parameters:
+ *	pScreenInfo :Screen handler pointer having screen information.
+ *      x		:destination x
+ *	    y		:destination y
+ *		w		:Specifies the width of the rectangle to be  copied
+ *		h		:Specifies the height of the rectangle to be  copied
+ * Returns		:none
+ *
+ * Comments		:none
+ *----------------------------------------------------------------------------
+*/
+void
+OPTGX1SubsequentScanlineImageWriteRect(ScrnInfoPtr pScreenInfo,
+				       int x, int y, int w, int h,
+				       int skipleft)
+{
+
+   Geodedstx = x;
+   Geodedsty = y;
+   Geodewidth = w;
+   Geodeheight = h;
+   GeodeCounter = 0;
+}
+
+/*----------------------------------------------------------------------------
+ * OPTGX1SubsquentImageWriteScanline
+ *
+ * Description	:This function is called to 
+ *               BLT  using the previously  specified planemask,raster
+ *               operation and transparency flag(non durango version)
+ *
+ * Parameters.
+ * 	pScreenInfo :Screen handler pointer having screen information.
+ *
+ * Returns		:none
+ *
+ * Comments		:The patterns specified is ignored inside the function
+ * Sample application uses (non-transparent):
+ *   - Moving windows.
+ *   - x11perf: scroll tests (-scroll500).
+ *   - x11perf: copy from window to window (-copywinwin500).
+ *
+ * No application found using transparency.
+*----------------------------------------------------------------------------
+*/
+
+void
+OPTGX1SubsequentImageWriteScanline(ScrnInfoPtr pScreenInfo, int bufno)
+{
+   GeodePtr pGeode = GEODEPTR(pScreenInfo);
+   int blt_height = 0;
+   char blit = FALSE;
+
+   GeodeCounter++;
+
+   if ((Geodeheight <= pGeode->NoOfImgBuffers) &&
+       (GeodeCounter == Geodeheight)) {
+      blit = TRUE;
+      blt_height = Geodeheight;
+   } else if ((Geodeheight > pGeode->NoOfImgBuffers)
+	      && (GeodeCounter == pGeode->NoOfImgBuffers)) {
+      blit = TRUE;
+      Geodeheight -= pGeode->NoOfImgBuffers;
+      blt_height = pGeode->NoOfImgBuffers;
+   } else
+      return;
+
+   if (blit) {
+      blit = FALSE;
+      GeodeCounter = 0;
+      OPTGX1SubsequentScreenToScreenCopy(pScreenInfo,
+					 Geodesrcx, Geodesrcy, Geodedstx,
+					 Geodedsty, Geodewidth, blt_height);
+      Geodedsty += blt_height;
+      GFX_WAIT_BUSY;
+   }
+}
+
+/*----------------------------------------------------------------------------
+ * OPTGX1SetupForSolidLine
+ *
+ * Description	:This function is used setup the solid line color for
+ *               future line draws.
+ *
+ *
+ * Parameters.
+ * 	pScreenInfo :Screen handler pointer having screen information.
+ *      color	:Specifies the color value od line
+ *      rop     :Specifies rop values.
+ *  Planemask	:Specifies planemask value.
+ * Returns		:none
+ *
+ * Comments		:none
+*----------------------------------------------------------------------------
+*/
+void
+OPTGX1SetupForSolidLine(ScrnInfoPtr pScreenInfo,
+			int color, int rop, unsigned int planemask)
+{
+   if (gu1_bpp == 8) {
+      color &= 0x00FF;
+      color |= (color << 8);
+   }
+
+   GeodeROP = XAAPatternROP[rop];
+
+   /* POLL UNTIL ABLE TO WRITE THE PATTERN COLOR */
+   GFX_WAIT_PENDING;
+   WRITE_REG16(GP_PAT_COLOR_0, (unsigned short)color);
+   WRITE_REG16(GP_RASTER_MODE, GeodeROP);
+
+   if ((GeodeROP & 0x55) ^ ((GeodeROP >> 1) & 0x55)) {
+      Geode_vector_mode = VM_READ_DST_FB;
+      Geode_blt_mode = BM_READ_DST_FB1 | BM_READ_SRC_FB;
+   } else {
+      Geode_vector_mode = 0;
+      Geode_blt_mode = BM_READ_SRC_FB;
+   }
+}
+
+/*---------------------------------------------------------------------------
+ * OPTGX1SubsequentBresenhamLine
+ *
+ * Description	:This function is used to render a vector using the
+ *                 specified bresenham parameters.
+ *
+ * Parameters:
+ * pScreenInfo 	:Screen handler pointer having screen information.
+ *      x1  	:Specifies the starting x position
+ *      y1      :Specifies starting y possition
+ *      absmaj	:Specfies the Bresenman absolute major.
+ *	  absmin	:Specfies the Bresenman absolute minor.
+ *	  err       :Specifies the bresenham err term.
+ *	  len       :Specifies the length of the vector interms of pixels.
+ *	  octant    :not used in this function,may be added for standard
+ *                    interface.
+ * Returns		:none
+ *
+ * Comments     :none
+ * Sample application uses:
+ *   - Window outlines on window move.
+ *   - x11perf: line segments (-seg500).
+*----------------------------------------------------------------------------
+*/
+void
+OPTGX1SubsequentBresenhamLine(ScrnInfoPtr pScreenInfo,
+			      int x1, int y1, int absmaj, int absmin, int err,
+			      int len, int octant)
+{
+   int axial, init, diag;
+
+   DEBUGMSG(0, (0, 0, "BLine %d, %d, %d, %d, %d, %d, %d\n",
+		x1, y1, absmaj, absmin, err, len, octant));
+
+   /* DETERMINE BRESENHAM PARAMETERS */
+
+   axial = ((int)absmin << 1);
+   init = axial - (int)absmaj;
+   diag = init - (int)absmaj;
+
+   /* ADJUST INITIAL ERROR
+    * * Adjust by -1 for certain directions so that the vector 
+    * * hits the same pixels when drawn in either direction.
+    * * The Gamma value is assumed to account for the initial 
+    * * error adjustment for clipped lines.
+    */
+
+   init += err;
+
+   /* POLL UNTIL ABLE TO WRITE TO THE REGISTERS */
+   /* Put off poll for as long as possible (do most calculations first). */
+
+   GFX_WAIT_PENDING;
+   WRITE_REG32(GP_DST_XCOOR, (y1 << 16) | x1);
+   WRITE_REG32(GP_VECTOR_LENGTH, (((unsigned long)init) << 16) |
+	       ((unsigned short)len));
+   WRITE_REG32(GP_AXIAL_ERROR, (((unsigned long)diag) << 16) |
+	       ((unsigned short)axial));
+   WRITE_REG16(GP_VECTOR_MODE,
+	       (Geode_vector_mode | vector_mode_table[octant]));
+}
+
+void
+OPTGX1SubsequentSolidTwoPointLine(ScrnInfoPtr pScreenInfo,
+				  int x0, int y0, int x1, int y1, int flags)
+{
+   long dx, dy, dmaj, dmin;
+   long axialerr, diagerr, initerr;
+   unsigned short vec_flags = 0;
+
+   dx = ABS(x1, x0);
+   dy = ABS(y1, y0);
+   if (dx >= dy) {
+      dmaj = dx;
+      dmin = dy;
+      vec_flags = VM_X_MAJOR;
+      if (x1 > x0)
+	 vec_flags |= VM_MAJOR_INC;
+      if (y1 > y0)
+	 vec_flags |= VM_MINOR_INC;
+   } else {
+      dmaj = dy;
+      dmin = dx;
+      vec_flags = VM_Y_MAJOR;
+      if (x1 > x0)
+	 vec_flags |= VM_MINOR_INC;
+      if (y1 > y0)
+	 vec_flags |= VM_MAJOR_INC;
+   }
+
+   axialerr = dmin << 1;
+   diagerr = (dmin - dmaj) << 1;
+   initerr = (axialerr - dmaj);
+
+   if (!(vec_flags & VM_MINOR_INC))
+      initerr--;
+
+   GFX_WAIT_PENDING;
+   WRITE_REG32(GP_DST_XCOOR, (y0 << 16) | x0);
+   WRITE_REG32(GP_VECTOR_LENGTH, (((unsigned long)initerr) << 16) |
+	       ((unsigned short)dmaj));
+   WRITE_REG32(GP_AXIAL_ERROR, (((unsigned long)diagerr) << 16) |
+	       ((unsigned short)axialerr));
+   WRITE_REG16(GP_VECTOR_MODE, (Geode_vector_mode | vec_flags));
+}
+
+/*---------------------------------------------------------------------------
+ * OPTGX1SubsequentHorVertLine
+ *
+ * This routine is called to render a vector using the specified Bresenham
+ * parameters.  
+ *
+ * Sample application uses:
+ *   - Window outlines on window move.
+ *   - x11perf: line segments (-hseg500).
+ *   - x11perf: line segments (-vseg500).
+ *---------------------------------------------------------------------------
+ */
+void
+OPTGX1SubsequentHorVertLine(ScrnInfoPtr pScreenInfo,
+			    int x, int y, int len, int dir)
+{
+
+   DEBUGMSG(0, (0, 0, "HLine %d, %d, %d, %d\n", x, y, len, dir));
+
+   OPTGX1SubsequentFillRectSolid(pScreenInfo,
+				 (unsigned short)x, (unsigned short)y,
+				 (unsigned short)((dir == DEGREES_0) ? len :
+						  1),
+				 (unsigned short)((dir == DEGREES_0) ? 1 :
+						  len));
+}
+#endif
+
+/*----------------------------------------------------------------------------
+ * GX1AccelInit.
+ *
+ * Description	:This function sets up the supported acceleration routines and
+ *                 appropriate flags.
+ *
+ * Parameters:
+ *      pScreen	:Screeen pointer structure.
+ *
+ * Returns		:TRUE on success and FALSE on Failure
+ *
+ * Comments		:This function is called in GX1ScreenInit in
+                     geode_driver.c to set  * the acceleration.
+*----------------------------------------------------------------------------
+*/
+Bool
+GX1AccelInit(ScreenPtr pScreen)
+{
+   GeodePtr pGeode;
+   ScrnInfoPtr pScreenInfo;
+
+   pScreenInfo = xf86Screens[pScreen->myNum];
+   pGeode = GEODEPTR(pScreenInfo);
+
+   switch (pScreenInfo->bitsPerPixel) {
+   case 8:
+      gu1_bpp = 8;
+      break;
+   case 16:
+      gu1_bpp = 16;
+      break;
+   }
+
+   gu1_xshift = pScreenInfo->bitsPerPixel >> 4;
+
+   switch (pGeode->Pitch) {
+   case 1024:
+      gu1_yshift = 10;
+      break;
+   case 2048:
+      gu1_yshift = 11;
+      break;
+   case 4096:
+      gu1_yshift = 12;
+      break;
+   }
+
+   Geodebb0Base = BB0_BASE_3K;
+   Geodebb1Base = BB1_BASE_3K;
+   GeodebufferWidthPixels = Geodebb1Base - Geodebb0Base - 16;
+
+   if (gu1_bpp > 8) {
+      /* If 16bpp, divide GFXbufferWidthPixels by 2 */
+      GeodebufferWidthPixels >>= 1;
+   }
+   /* Getting the pointer for acceleration Inforecord */
+   pGeode->AccelInfoRec = localRecPtr = XAACreateInfoRec();
+
+   /* SET ACCELERATION FLAGS */
+   localRecPtr->Flags = PIXMAP_CACHE | OFFSCREEN_PIXMAPS | LINEAR_FRAMEBUFFER;
+   localRecPtr->PixmapCacheFlags = DO_NOT_BLIT_STIPPLES;
+
+   /* HOOK SYNCRONIZARION ROUTINE */
+   localRecPtr->Sync = GX1AccelSync;
+
+   /* HOOK FILLED RECTANGLES */
+   localRecPtr->SetupForSolidFill = (GX1SetupForFillRectSolid);
+   localRecPtr->SubsequentSolidFillRect = (GX1SubsequentFillRectSolid);
+   localRecPtr->SolidFillFlags = 0;
+
+   /* HOOK 8x8 MonoEXPAND PATTERNS */
+   localRecPtr->SetupForMono8x8PatternFill = GX1SetupFor8x8PatternMonoExpand;
+   localRecPtr->SubsequentMono8x8PatternFillRect =
+	 GX1Subsequent8x8PatternMonoExpand;
+   localRecPtr->Mono8x8PatternFillFlags = BIT_ORDER_IN_BYTE_MSBFIRST |
+	 HARDWARE_PATTERN_PROGRAMMED_BITS | HARDWARE_PATTERN_SCREEN_ORIGIN;
+
+   localRecPtr->SetupForColor8x8PatternFill =
+	 GX1SetupFor8x8PatternColorExpand;
+   localRecPtr->SubsequentColor8x8PatternFillRect =
+	 GX1Subsequent8x8PatternColorExpand;
+   /* Color expansion */
+   localRecPtr->Color8x8PatternFillFlags =
+	 BIT_ORDER_IN_BYTE_MSBFIRST |
+	 SCANLINE_PAD_DWORD | HARDWARE_PATTERN_SCREEN_ORIGIN;
+
+   /* HOOK SCREEN TO SCREEN COPIES
+    * * Set flag to only allow copy if transparency is enabled.
+    */
+   localRecPtr->SetupForScreenToScreenCopy =
+	 OPTACCEL(GX1SetupForScreenToScreenCopy);
+   localRecPtr->SubsequentScreenToScreenCopy =
+	 OPTACCEL(GX1SubsequentScreenToScreenCopy);
+   localRecPtr->ScreenToScreenCopyFlags = 0;
+
+   /* HOOK BRESENHAM SOLID LINES */
+   /* Do not hook unless flag can be set preventing use of planemask. */
+   localRecPtr->SolidLineFlags = NO_PLANEMASK;
+   localRecPtr->SetupForSolidLine = OPTACCEL(GX1SetupForSolidLine);
+   localRecPtr->SubsequentSolidBresenhamLine =
+	 OPTACCEL(GX1SubsequentBresenhamLine);
+   localRecPtr->SubsequentSolidHorVertLine =
+	 OPTACCEL(GX1SubsequentHorVertLine);
+   localRecPtr->SubsequentSolidTwoPointLine =
+	 OPTACCEL(GX1SubsequentSolidTwoPointLine);
+   localRecPtr->SolidBresenhamLineErrorTermBits = 15;
+
+#if SCR2SCREXP
+   /* Color expansion */
+   localRecPtr->ScreenToScreenColorExpandFillFlags =
+	 BIT_ORDER_IN_BYTE_MSBFIRST | NO_TRANSPARENCY;
+
+   localRecPtr->SetupForScreenToScreenColorExpandFill =
+	 (GX1SetupForScreenToScreenColorExpandFill);
+   localRecPtr->SubsequentScreenToScreenColorExpandFill =
+	 (GX1SubsequentScreenToScreenColorExpandFill);
+#endif
+
+   /*
+    * ImageWrite.
+    *
+    * SInce this uses off-screen scanline buffers, it is only of use when
+    * complex ROPs are used. But since the current XAA pixmap cache code
+    * only works when an ImageWrite is provided, the NO_GXCOPY flag is
+    * temporarily disabled.
+    */
+   if (pGeode->AccelImageWriteBufferOffsets) {
+
+      localRecPtr->ScanlineImageWriteFlags =
+	    localRecPtr->ScreenToScreenCopyFlags;
+      localRecPtr->ScanlineImageWriteBuffers =
+	    pGeode->AccelImageWriteBufferOffsets;
+      localRecPtr->NumScanlineImageWriteBuffers = pGeode->NoOfImgBuffers;
+      localRecPtr->ImageWriteRange = pGeode->NoOfImgBuffers << gu1_yshift;
+      localRecPtr->SetupForScanlineImageWrite =
+	    OPTACCEL(GX1SetupForScanlineImageWrite);
+      localRecPtr->SubsequentScanlineImageWriteRect =
+	    OPTACCEL(GX1SubsequentScanlineImageWriteRect);
+      localRecPtr->SubsequentImageWriteScanline =
+	    OPTACCEL(GX1SubsequentImageWriteScanline);
+
+      ImgBufOffset = pGeode->AccelImageWriteBufferOffsets[0] - pGeode->FBBase;
+      Geodesrcy = ImgBufOffset >> gu1_yshift;
+
+      Geodesrcx = ImgBufOffset & (pGeode->Pitch - 1);
+      Geodesrcx /= (pScreenInfo->bitsPerPixel >> 3);
+   }
+
+   return (XAAInit(pScreen, localRecPtr));
+}
+
+/* END OF FILE */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/geode_cursor.c b/xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_gx1_cursor.c
index 48dca026f..3d2e52f89 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/geode_cursor.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_gx1_cursor.c
@@ -1,7 +1,8 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/geode_cursor.c,v 1.1 2002/10/11 14:32:59 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_gx1_cursor.c,v 1.5 2003/02/21 16:51:09 alanh Exp $ */
 /*
- * $Workfile: geode_cursor.c $
- * $Revision: 1.1.1.1 $
+ * $Workfile: nsc_gx1_cursor.c $
+ * $Revision: 1.2.2.1 $
+ * $Author: ldelgass $
  *
  * File Contents: Xfree cursor implementation routines
  *                for geode HWcursor init.setting cursor color,image etc
@@ -20,7 +21,7 @@
  * National Semiconductor Corporation licenses this software 
  * ("Software"):
  *
- * Geode Xfree frame buffer driver
+ * National Xfree frame buffer driver
  *
  * under one of the two following licenses, depending on how the 
  * Software is received by the Licensee.
@@ -36,7 +37,7 @@
  *
  * National Semiconductor Corporation Open Source License for 
  *
- * Geode Xfree frame buffer driver
+ * National Xfree frame buffer driver
  *
  * (BSD License with Export Notice)
  *
@@ -91,7 +92,7 @@
  *
  * National Semiconductor Corporation Gnu General Public License for 
  *
- * Geode Xfree frame buffer driver
+ * National Xfree frame buffer driver
  *
  * (GPL License with Export Notice)
  *
@@ -144,19 +145,22 @@
 #include "xf86_ansic.h"
 #include "xf86Pci.h"
 #include "xf86PciInfo.h"
-#include "geode.h"
+#include "nsc.h"
 
 /* Forward declarations of the functions */
-Bool GeodeHWCursorInit(ScreenPtr pScreen);
-static void GeodeSetCursorColors(ScrnInfoPtr pScreenInfo, int bg, int fg);
-static void GeodeSetCursorPosition(ScrnInfoPtr pScreenInfo, int x, int y);
-void GeodeLoadCursorImage(ScrnInfoPtr pScreenInfo, unsigned char *src);
-void GeodeHideCursor(ScrnInfoPtr pScreenInfo);
-void GeodeShowCursor(ScrnInfoPtr pScreenInfo);
-static Bool GeodeUseHWCursor(ScreenPtr pScreen, CursorPtr pCurs);
-
+Bool GX1HWCursorInit(ScreenPtr pScreen);
+static void GX1SetCursorColors(ScrnInfoPtr pScreenInfo, int bg, int fg);
+static void GX1SetCursorPosition(ScrnInfoPtr pScreenInfo, int x, int y);
+void GX1LoadCursorImage(ScrnInfoPtr pScreenInfo, unsigned char *src);
+void GX1HideCursor(ScrnInfoPtr pScreenInfo);
+void GX1ShowCursor(ScrnInfoPtr pScreenInfo);
+static Bool GX1UseHWCursor(ScreenPtr pScreen, CursorPtr pCurs);
+extern void GX1SetVideoPosition(int x, int y, int width, int height,
+				short src_w, short src_h, short drw_w,
+				short drw_h, int id, int offset,
+				ScrnInfoPtr pScrn);
 /*----------------------------------------------------------------------------
- * GeodeHWCursorInit.
+ * GX1HWCursorInit.
  *
  * Description	:This function sets the cursor information by probing the
  * 																hardware.
@@ -171,7 +175,7 @@ static Bool GeodeUseHWCursor(ScreenPtr pScreen, CursorPtr pCurs);
 *----------------------------------------------------------------------------
 */
 Bool
-GeodeHWCursorInit(ScreenPtr pScreen)
+GX1HWCursorInit(ScreenPtr pScreen)
 {
    ScrnInfoPtr pScreenInfo = xf86Screens[pScreen->myNum];
    GeodePtr pGeode = GEODEPTR(pScreenInfo);
@@ -191,17 +195,17 @@ GeodeHWCursorInit(ScreenPtr pScreen)
    /* cursor info ptr is intiallized with the values obtained from
     * * durnago calls
     */
-   infoPtr->SetCursorColors = GeodeSetCursorColors;
-   infoPtr->SetCursorPosition = GeodeSetCursorPosition;
-   infoPtr->LoadCursorImage = GeodeLoadCursorImage;
-   infoPtr->HideCursor = GeodeHideCursor;
-   infoPtr->ShowCursor = GeodeShowCursor;
-   infoPtr->UseHWCursor = GeodeUseHWCursor;
+   infoPtr->SetCursorColors = GX1SetCursorColors;
+   infoPtr->SetCursorPosition = GX1SetCursorPosition;
+   infoPtr->LoadCursorImage = GX1LoadCursorImage;
+   infoPtr->HideCursor = GX1HideCursor;
+   infoPtr->ShowCursor = GX1ShowCursor;
+   infoPtr->UseHWCursor = GX1UseHWCursor;
    return (xf86InitCursor(pScreen, infoPtr));
 }
 
 /*----------------------------------------------------------------------------
- * GeodeSetCursorColors.
+ * GX1SetCursorColors.
  *
  * Description	:This function sets the cursor foreground and background
  *                    colors
@@ -216,13 +220,13 @@ GeodeHWCursorInit(ScreenPtr pScreen)
  *----------------------------------------------------------------------------
  */
 static void
-GeodeSetCursorColors(ScrnInfoPtr pScreenInfo, int bg, int fg)
+GX1SetCursorColors(ScrnInfoPtr pScreenInfo, int bg, int fg)
 {
    GFX(set_cursor_colors(bg, fg));
 }
 
 /*----------------------------------------------------------------------------
- * GeodeSetCursorPosition.
+ * GX1SetCursorPosition.
  *
  * Description	:This function sets the cursor co -ordinates and enable the
  *               cursor.
@@ -236,20 +240,50 @@ GeodeSetCursorColors(ScrnInfoPtr pScreenInfo, int bg, int fg)
  *----------------------------------------------------------------------------
  */
 static void
-GeodeSetCursorPosition(ScrnInfoPtr pScreenInfo, int x, int y)
+GX1SetCursorPosition(ScrnInfoPtr pScreenInfo, int x, int y)
 {
+   unsigned long offset;
+   static int panOffset = 0;
    GeodePtr pGeode = GEODEPTR(pScreenInfo);
 
+   unsigned short xhot = 0, yhot = 0;
+
+   if (x < 0) {
+      xhot = (unsigned short)(-x);
+      x = 0;
+   }
+   if (y < 0) {
+      yhot = (unsigned short)(-y);
+      y = 0;
+   }
+
    if (pGeode->TV_Overscan_On) {
       x += pGeode->TVOx;
       y += pGeode->TVOy;
    }
-   GFX(set_cursor_position(pGeode->CursorStartOffset, x, y, 0, 0));
+   GFX(set_cursor_position(pGeode->CursorStartOffset, x, y, xhot, yhot));
    GFX(set_cursor_enable(1));
+
+   if ((pGeode->OverlayON) && (pGeode->Panel)) {
+#if defined(STB_X)
+      Gal_get_display_offset(&offset);
+#else
+      offset = gfx_get_display_offset();
+#endif
+      if (offset != panOffset) {
+	 GX1SetVideoPosition(pGeode->video_x, pGeode->video_y,
+			     pGeode->video_w, pGeode->video_h,
+			     pGeode->video_srcw, pGeode->video_srch,
+			     pGeode->video_dstw, pGeode->video_dsth,
+			     pGeode->video_id, pGeode->video_offset,
+			     pGeode->video_scrnptr);
+	 panOffset = offset;
+      }
+   }
 }
 
 /*----------------------------------------------------------------------------
- * GeodeLoadCursorImage
+ * GX1LoadCursorImage
  *
  * Description	:This function loads the 32x32 cursor pattern.The shape
  *               and color is set by AND and XOR masking of arrays of 32
@@ -262,7 +296,7 @@ GeodeSetCursorPosition(ScrnInfoPtr pScreenInfo, int x, int y)
  *----------------------------------------------------------------------------
 */
 void
-GeodeLoadCursorImage(ScrnInfoPtr pScreenInfo, unsigned char *src)
+GX1LoadCursorImage(ScrnInfoPtr pScreenInfo, unsigned char *src)
 {
    int i, j;
    unsigned long shape;
@@ -295,7 +329,7 @@ GeodeLoadCursorImage(ScrnInfoPtr pScreenInfo, unsigned char *src)
 }
 
 /*----------------------------------------------------------------------------
- * GeodeHideCursor.
+ * GX1HideCursor.
  *
  * Description	:This function will disable the cursor.
  *
@@ -309,13 +343,13 @@ GeodeLoadCursorImage(ScrnInfoPtr pScreenInfo, unsigned char *src)
  *----------------------------------------------------------------------------
  */
 void
-GeodeHideCursor(ScrnInfoPtr pScreenInfo)
+GX1HideCursor(ScrnInfoPtr pScreenInfo)
 {
    GFX(set_cursor_enable(0));
 }
 
 /*----------------------------------------------------------------------------
- * GeodeShowCursor
+ * GX1ShowCursor
  *
  * Description	:This function will enable  the cursor.
  *
@@ -329,13 +363,13 @@ GeodeHideCursor(ScrnInfoPtr pScreenInfo)
  *----------------------------------------------------------------------------
 */
 void
-GeodeShowCursor(ScrnInfoPtr pScreenInfo)
+GX1ShowCursor(ScrnInfoPtr pScreenInfo)
 {
    GFX(set_cursor_enable(1));
 }
 
 /*----------------------------------------------------------------------------
- * GeodeUseHwCursor.
+ * GX1UseHwCursor.
  *
  * Description	:This function will sets the hardware cursor flag in
  *                 pscreen  structure.
@@ -350,7 +384,7 @@ GeodeShowCursor(ScrnInfoPtr pScreenInfo)
  *----------------------------------------------------------------------------
 */
 static Bool
-GeodeUseHWCursor(ScreenPtr pScreen, CursorPtr pCurs)
+GX1UseHWCursor(ScreenPtr pScreen, CursorPtr pCurs)
 {
    ScrnInfoPtr pScreenInfo = XF86SCRNINFO(pScreen);
 
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/geode_dga.c b/xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_gx1_dga.c
index 856d7d1e9..727ff0e10 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/geode_dga.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_gx1_dga.c
@@ -1,7 +1,8 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/geode_dga.c,v 1.1 2002/10/11 14:32:59 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_gx1_dga.c,v 1.2 2003/01/14 09:34:31 alanh Exp $ */
 /*
- * $Workfile: geode_dga.c $
- * $Revision: 1.1.1.1 $
+ * $Workfile: nsc_gx1_dga.c $
+ * $Revision: 1.2.2.1 $
+ * $Author: ldelgass $
  * 
  * File contents: DGA(Direct Acess Graphics mode) is feature of
  *                XFree86 that allows the program to access directly to video
@@ -23,7 +24,7 @@
  * National Semiconductor Corporation licenses this software 
  * ("Software"):
  *
- * Geode Xfree frame buffer driver
+ * National Xfree frame buffer driver
  *
  * under one of the two following licenses, depending on how the 
  * Software is received by the Licensee.
@@ -39,7 +40,7 @@
  *
  * National Semiconductor Corporation Open Source License for 
  *
- * Geode Xfree frame buffer driver
+ * National Xfree frame buffer driver
  *
  * (BSD License with Export Notice)
  *
@@ -94,7 +95,7 @@
  *
  * National Semiconductor Corporation Gnu General Public License for 
  *
- * Geode Xfree frame buffer driver
+ * National Xfree frame buffer driver
  *
  * (GPL License with Export Notice)
  *
@@ -149,38 +150,39 @@
 #include "xf86PciInfo.h"
 #include "xaa.h"
 #include "xaalocal.h"
-#include "geode.h"
+#include "nsc.h"
 #include "dgaproc.h"
 
 /* forward declarations */
-Bool GeodeDGAInit(ScreenPtr pScreen);
-static Bool Geode_OpenFramebuffer(ScrnInfoPtr, char **, unsigned char **,
-				  int *, int *, int *);
-static void Geode_CloseFramebuffer(ScrnInfoPtr pScrn);
-static Bool Geode_SetMode(ScrnInfoPtr, DGAModePtr);
-static int Geode_GetViewport(ScrnInfoPtr);
-static void Geode_SetViewport(ScrnInfoPtr, int, int, int);
-static void Geode_FillRect(ScrnInfoPtr, int, int, int, int, unsigned long);
-static void Geode_BlitRect(ScrnInfoPtr, int, int, int, int, int, int);
+static Bool GX1_OpenFramebuffer(ScrnInfoPtr, char **, unsigned char **,
+				int *, int *, int *);
+static void GX1_CloseFramebuffer(ScrnInfoPtr pScrn);
+static Bool GX1_SetMode(ScrnInfoPtr, DGAModePtr);
+static int GX1_GetViewport(ScrnInfoPtr);
+static void GX1_SetViewport(ScrnInfoPtr, int, int, int);
+static void GX1_FillRect(ScrnInfoPtr, int, int, int, int, unsigned long);
+static void GX1_BlitRect(ScrnInfoPtr, int, int, int, int, int, int);
 
-extern void GeodeAdjustFrame(int, int, int, int);
-extern Bool GeodeSwitchMode(int, DisplayModePtr, int);
-extern void GeodeAccelSync(ScrnInfoPtr pScreenInfo);
+extern void GX1AdjustFrame(int, int, int, int);
+extern Bool GX1SwitchMode(int, DisplayModePtr, int);
+extern void GX1AccelSync(ScrnInfoPtr pScreenInfo);
+
+Bool GX1DGAInit(ScreenPtr pScreen);
 
 static DGAFunctionRec GeodeDGAFuncs = {
-   Geode_OpenFramebuffer,
-   Geode_CloseFramebuffer,
-   Geode_SetMode,
-   Geode_SetViewport,
-   Geode_GetViewport,
-   GeodeAccelSync,
-   Geode_FillRect,
-   Geode_BlitRect,
+   GX1_OpenFramebuffer,
+   GX1_CloseFramebuffer,
+   GX1_SetMode,
+   GX1_SetViewport,
+   GX1_GetViewport,
+   GX1AccelSync,
+   GX1_FillRect,
+   GX1_BlitRect,
    NULL
 };
 
 /*----------------------------------------------------------------------------
- * GeodeDGAInit.
+ * GX1DGAInit.
  *
  * Description	:This function is used to intiallize the DGA modes and sets the
 			 	 viewport based on the screen mode.
@@ -195,7 +197,7 @@ static DGAFunctionRec GeodeDGAFuncs = {
 *----------------------------------------------------------------------------
 */
 Bool
-GeodeDGAInit(ScreenPtr pScreen)
+GX1DGAInit(ScreenPtr pScreen)
 {
    ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
    GeodePtr pGeode = GEODEPTR(pScrn);
@@ -206,7 +208,7 @@ GeodeDGAInit(ScreenPtr pScreen)
    Bool oneMore;
 
    pMode = firstMode = pScrn->modes;
-   DEBUGMSG(0, (0, X_NONE, "GeodeDGAInit\n"));
+   DEBUGMSG(0, (0, X_NONE, "GX1DGAInit\n"));
    while (pMode) {
 
       /* redundant but it can be used in future:if(0). */
@@ -288,7 +290,7 @@ GeodeDGAInit(ScreenPtr pScreen)
 }
 
 /*----------------------------------------------------------------------------
- * Geode_SetMode.
+ * GX1_SetMode.
  *
  * Description	:This function is sets into the DGA mode.
  *.
@@ -303,19 +305,19 @@ GeodeDGAInit(ScreenPtr pScreen)
 *----------------------------------------------------------------------------
 */
 static Bool
-Geode_SetMode(ScrnInfoPtr pScrn, DGAModePtr pMode)
+GX1_SetMode(ScrnInfoPtr pScrn, DGAModePtr pMode)
 {
    static int OldDisplayWidth[MAXSCREENS];
    int index = pScrn->pScreen->myNum;
    GeodePtr pGeode = GEODEPTR(pScrn);
 
-   DEBUGMSG(0, (0, X_NONE, "Geode_SetMode\n"));
+   DEBUGMSG(0, (0, X_NONE, "GX1_SetMode\n"));
    if (!pMode) {
       /* restore the original mode
        * * put the ScreenParameters back
        */
       pScrn->displayWidth = OldDisplayWidth[index];
-      GeodeSwitchMode(index, pScrn->currentMode, 0);
+      GX1SwitchMode(index, pScrn->currentMode, 0);
       pGeode->DGAactive = FALSE;
    } else {
       if (!pGeode->DGAactive) {		/* save the old parameters */
@@ -324,14 +326,14 @@ Geode_SetMode(ScrnInfoPtr pScrn, DGAModePtr pMode)
       }
       pScrn->displayWidth = pMode->bytesPerScanline /
 	    (pMode->bitsPerPixel >> 3);
-      GeodeSwitchMode(index, pMode->mode, 0);
+      GX1SwitchMode(index, pMode->mode, 0);
    }
    /* enable/disable cursor */
    if (pGeode->HWCursor) {
 #if defined(STB_X)
-      Gal_set_compression_state(((pGeode->DGAactive) ?
-				 GAL_COMPRESSION_DISABLE :
-				 GAL_COMPRESSION_ENABLE));
+      Gal_set_compression_enable(((pGeode->DGAactive) ?
+				  GAL_COMPRESSION_DISABLE :
+				  GAL_COMPRESSION_ENABLE));
       Gal_set_cursor_enable(!pGeode->DGAactive);
 #else
       gfx_set_cursor_enable(!pGeode->DGAactive);
@@ -343,7 +345,7 @@ Geode_SetMode(ScrnInfoPtr pScrn, DGAModePtr pMode)
 }
 
 /*----------------------------------------------------------------------------
- * Geode_GetViewPort.
+ * GX1_GetViewPort.
  *
  * Description	:This function is Gets the viewport window memory.
  *.
@@ -358,7 +360,7 @@ Geode_SetMode(ScrnInfoPtr pScrn, DGAModePtr pMode)
 *----------------------------------------------------------------------------
 */
 static int
-Geode_GetViewport(ScrnInfoPtr pScrn)
+GX1_GetViewport(ScrnInfoPtr pScrn)
 {
    GeodePtr pGeode = GEODEPTR(pScrn);
 
@@ -366,7 +368,7 @@ Geode_GetViewport(ScrnInfoPtr pScrn)
 }
 
 /*----------------------------------------------------------------------------
- * Geode_SetViewPort.
+ * GX1_SetViewPort.
  *
  * Description	:This function is Gets the viewport window memory.
  *
@@ -382,16 +384,16 @@ Geode_GetViewport(ScrnInfoPtr pScrn)
 *----------------------------------------------------------------------------
 */
 static void
-Geode_SetViewport(ScrnInfoPtr pScrn, int x, int y, int flags)
+GX1_SetViewport(ScrnInfoPtr pScrn, int x, int y, int flags)
 {
    GeodePtr pGeode = GEODEPTR(pScrn);
 
-   GeodeAdjustFrame(pScrn->pScreen->myNum, x, y, flags);
-   pGeode->DGAViewportStatus = 0;	/*GeodeAdjustFrame loops until finished */
+   GX1AdjustFrame(pScrn->pScreen->myNum, x, y, flags);
+   pGeode->DGAViewportStatus = 0;	/*GX1AdjustFrame loops until finished */
 }
 
 /*----------------------------------------------------------------------------
- * Geode_FillRect.
+ * GX1_FillRect.
  *
  * Description	:This function is Gets the viewport window memory.
  *.
@@ -410,8 +412,8 @@ Geode_SetViewport(ScrnInfoPtr pScrn, int x, int y, int flags)
 *----------------------------------------------------------------------------
 */
 static void
-Geode_FillRect(ScrnInfoPtr pScrn, int x, int y,
-	       int w, int h, unsigned long color)
+GX1_FillRect(ScrnInfoPtr pScrn, int x, int y,
+	     int w, int h, unsigned long color)
 {
    GeodePtr pGeode = GEODEPTR(pScrn);
 
@@ -423,7 +425,7 @@ Geode_FillRect(ScrnInfoPtr pScrn, int x, int y,
 }
 
 /*----------------------------------------------------------------------------
- * Geode_BlitRect.
+ * GX1_BlitRect.
  *
  * Description	:This function implementing Blit and it moves a
  *			 	 Rectangular block of data from one location to other
@@ -444,8 +446,8 @@ Geode_FillRect(ScrnInfoPtr pScrn, int x, int y,
 *----------------------------------------------------------------------------
 */
 static void
-Geode_BlitRect(ScrnInfoPtr pScrn,
-	       int srcx, int srcy, int w, int h, int dstx, int dsty)
+GX1_BlitRect(ScrnInfoPtr pScrn, int srcx, int srcy, int w,
+	     int h, int dstx, int dsty)
 {
    GeodePtr pGeode = GEODEPTR(pScrn);
 
@@ -463,7 +465,7 @@ Geode_BlitRect(ScrnInfoPtr pScrn,
 }
 
 /*----------------------------------------------------------------------------
- * Geode_OpenFramebuffer.
+ * GX1_OpenFramebuffer.
  *
  * Description	:This function open the framebuffer driver for DGA.
  *			
@@ -482,9 +484,9 @@ Geode_BlitRect(ScrnInfoPtr pScrn,
 *----------------------------------------------------------------------------
 */
 static Bool
-Geode_OpenFramebuffer(ScrnInfoPtr pScrn,
-		      char **name, unsigned char **mem,
-		      int *size, int *offset, int *flags)
+GX1_OpenFramebuffer(ScrnInfoPtr pScrn,
+		    char **name, unsigned char **mem,
+		    int *size, int *offset, int *flags)
 {
    GeodePtr pGeode = GEODEPTR(pScrn);
 
@@ -497,7 +499,7 @@ Geode_OpenFramebuffer(ScrnInfoPtr pScrn,
 }
 
 static void
-Geode_CloseFramebuffer(ScrnInfoPtr pScrn)
+GX1_CloseFramebuffer(ScrnInfoPtr pScrn)
 {
 }
 
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/geode_driver.c b/xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_gx1_driver.c
index f89984d04..feb6d1e90 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/geode_driver.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_gx1_driver.c
@@ -1,7 +1,8 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/geode_driver.c,v 1.1 2002/10/11 14:32:59 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_gx1_driver.c,v 1.7 2003/02/14 13:28:29 alanh Exp $ */
 /*
- * $Workfile: geode_driver.c $
- * $Revision: 1.1.1.1 $
+ * $Workfile: nsc_gx1_driver.c $
+ * $Revision: 1.2.2.1 $
+ * $Author: ldelgass $
  *
  * File Contents: This is the main module configures the interfacing 
  *                with the X server. The individual modules will be 
@@ -23,7 +24,7 @@
  * National Semiconductor Corporation licenses this software 
  * ("Software"):
  *
- * Geode Xfree frame buffer driver
+ * National Xfree frame buffer driver
  *
  * under one of the two following licenses, depending on how the 
  * Software is received by the Licensee.
@@ -39,7 +40,7 @@
  *
  * National Semiconductor Corporation Open Source License for 
  *
- * Geode Xfree frame buffer driver
+ * National Xfree frame buffer driver
  *
  * (BSD License with Export Notice)
  *
@@ -94,7 +95,7 @@
  *
  * National Semiconductor Corporation Gnu General Public License for 
  *
- * Geode Xfree frame buffer driver
+ * National Xfree frame buffer driver
  *
  * (GPL License with Export Notice)
  *
@@ -148,18 +149,9 @@
  */
 
 #define DEBUG(x)
-
 #define GEODE_TRACE 0
-#define MAGIC 0
-/* Flat Panel HACK!!!! */
-extern int gfx_dont_program;
-
-#if GEODE_TRACE
-/* ANSI C does not allow var arg macros */
-#define GeodeDebug(args) ErrorF##args
-#else
-#define GeodeDebug(args)
-#endif
+#define CFB 0
+#define HWVGA 0
 
 /* Includes that are used by all drivers */
 #include "xf86.h"
@@ -178,7 +170,23 @@ extern int gfx_dont_program;
 #include "xf86cmap.h"
 
 /* Frame buffer stuff */
+#if CFB
+/*
+ * If using cfb, cfb.h is required.  Select the others for the bpp values
+ * the driver supports.
+ */
+#define PSZ 8				/* needed for cfb.h */
+#include "cfb.h"
+#undef PSZ
+#include "cfb16.h"
+#include "cfb24.h"
+#include "cfb32.h"
+
+#else
 #include "fb.h"
+
+#endif
+
 #include "shadowfb.h"
 
 /* Machine independent stuff */
@@ -204,28 +212,17 @@ extern int gfx_dont_program;
 #endif /* DPMSExtension */
 
 /* Our private include file (this also includes the durango headers) */
-#include "geode.h"
-
-#define PCI_VENDOR_ID_CYRIX  0x1078
-#define PCI_VENDOR_ID_NS     0x100b
+#include "nsc.h"
 
-#define PCI_CHIP_5530     0x0104
-#define PCI_CHIP_SC1200   0x0504
-#define PCI_CHIP_SC1400   0x0104
-
-/* A few things all drivers should have */
-#define GEODE_NAME     		"GEODE"
-#define GEODE_DRIVER_NAME       "geode"
+#if GEODE_TRACE
+/* ANSI C does not allow var arg macros */
+#define GeodeDebug(args) DebugPort(DCount++);ErrorF args
+#else
+#define GeodeDebug(args)
+#endif
 
-/* This should match the durango code version.
- * The patchlevel may be used to indicate changes in geode.c 
- */
-#define GEODE_VERSION_NAME    "1.2.2"
-#define GEODE_VERSION_MAJOR   1
-#define GEODE_VERSION_MINOR   2
-#define GEODE_PATCHLEVEL      2
-#define GEODE_VERSION_CURRENT ((GEODE_VERSION_MAJOR << 24) | \
-		(GEODE_VERSION_MINOR << 16) | GEODE_PATCHLEVEL)
+extern SymTabRec GeodeChipsets[];
+extern OptionInfoRec GeodeOptions[];
 
 typedef struct _MemOffset
 {
@@ -269,315 +266,76 @@ MemOffset GeodeMemOffset[] = {
 };
 static int MemIndex = 0;
 
-/* Forward definitions */
-static const OptionInfoRec *GeodeAvailableOptions(int chipid, int busid);
-static void GeodeIdentify(int);
-static Bool GeodeProbe(DriverPtr, int);
-static Bool GeodePreInit(ScrnInfoPtr, int);
-static Bool GeodeScreenInit(int, ScreenPtr, int, char **);
-static Bool GeodeEnterVT(int, int);
-static void GeodeLeaveVT(int, int);
-static void GeodeFreeScreen(int, int);
-void GeodeAdjustFrame(int, int, int, int);
-Bool GeodeSwitchMode(int, DisplayModePtr, int);
-static int GeodeValidMode(int, DisplayModePtr, Bool, int);
-static void GeodeLoadPalette(ScrnInfoPtr pScreenInfo,
-			     int numColors, int *indizes,
-			     LOCO * colors, VisualPtr pVisual);
-static Bool GeodeMapMem(ScrnInfoPtr);
-static Bool GeodeUnmapMem(ScrnInfoPtr);
-
-extern Bool GeodeAccelInit(ScreenPtr pScreen);
-extern Bool GeodeHWCursorInit(ScreenPtr pScreen);
-extern void GeodeHideCursor(ScrnInfoPtr pScreenInfo);
-extern void GeodeShowCursor(ScrnInfoPtr pScreenInfo);
-extern void GeodePointerMoved(int index, int x, int y);
-extern void GeodeRefreshArea(ScrnInfoPtr pScrn, int num, BoxPtr pbox);
-extern void GeodeRefreshArea8(ScrnInfoPtr pScrn, int num, BoxPtr pbox);
-extern void GeodeRefreshArea16(ScrnInfoPtr pScrn, int num, BoxPtr pbox);
-extern void GeodeInitVideo(ScreenPtr pScreen);
-extern Bool GeodeDGAInit(ScreenPtr pScreen);
-extern void GeodeLoadCursorImage(ScrnInfoPtr pScreenInfo, unsigned char *src);
+static Bool GX1PreInit(ScrnInfoPtr, int);
+static Bool GX1ScreenInit(int, ScreenPtr, int, char **);
+static Bool GX1EnterVT(int, int);
+static void GX1LeaveVT(int, int);
+static void GX1FreeScreen(int, int);
+void GX1AdjustFrame(int, int, int, int);
+Bool GX1SwitchMode(int, DisplayModePtr, int);
+static int GX1ValidMode(int, DisplayModePtr, Bool, int);
+static void GX1LoadPalette(ScrnInfoPtr pScreenInfo,
+			   int numColors, int *indizes,
+			   LOCO * colors, VisualPtr pVisual);
+static Bool GX1MapMem(ScrnInfoPtr);
+static Bool GX1UnmapMem(ScrnInfoPtr);
+
+extern Bool GX1AccelInit(ScreenPtr pScreen);
+extern Bool GX1HWCursorInit(ScreenPtr pScreen);
+extern void GX1HideCursor(ScrnInfoPtr pScreenInfo);
+extern void GX1ShowCursor(ScrnInfoPtr pScreenInfo);
+extern void GX1PointerMoved(int index, int x, int y);
+extern void GX1RefreshArea(ScrnInfoPtr pScrn, int num, BoxPtr pbox);
+extern void GX1RefreshArea8(ScrnInfoPtr pScrn, int num, BoxPtr pbox);
+extern void GX1RefreshArea16(ScrnInfoPtr pScrn, int num, BoxPtr pbox);
+extern void GX1InitVideo(ScreenPtr pScreen);
+extern Bool GX1DGAInit(ScreenPtr pScreen);
+extern void GX1LoadCursorImage(ScrnInfoPtr pScreenInfo, unsigned char *src);
+extern unsigned int GetVideoMemSize(void);
 
 void get_tv_overscan_geom(const char *options, int *X, int *Y, int *W,
 			  int *H);
+void GX1SetupChipsetFPtr(ScrnInfoPtr pScrn);
+GeodePtr GX1GetRec(ScrnInfoPtr pScreenInfo);
+void gx1_clear_screen(int width, int height);
 
 #if !defined(STB_X)
 extern unsigned char *XpressROMPtr;
 #endif /* STB_X */
 
-/* driver record contains the functions needed by the server after loading
- * the driver module.
- */
-DriverRec GEODE = {
-   GEODE_VERSION_CURRENT,
-   GEODE_DRIVER_NAME,
-   GeodeIdentify,
-   GeodeProbe,
-   GeodeAvailableOptions,
-   NULL,
-   0
-};
-
-/* Supported chipsets */
-static SymTabRec GeodeChipsets[] = {
-   {PCI_CHIP_5530, "5530"},
-   {PCI_CHIP_SC1200, "SC1200"},
-   {PCI_CHIP_SC1400, "SC1400"},
-   {-1, NULL}
-};
-
-static PciChipsets GeodePCIchipsets[] = {
-   {PCI_CHIP_5530, PCI_CHIP_5530, RES_SHARED_VGA},
-   {PCI_CHIP_SC1200, PCI_CHIP_SC1200, RES_SHARED_VGA},
-   {PCI_CHIP_SC1400, PCI_CHIP_SC1400, RES_SHARED_VGA},
-   {-1, -1, RES_UNDEFINED},
-};
-
-/* option flags are self-explanatory */
-typedef enum
-{
-   OPTION_SW_CURSOR,
-   OPTION_HW_CURSOR,
-   OPTION_COMPRESSION,
-   OPTION_NOACCEL,
-   OPTION_TV_SUPPORT,
-   OPTION_TV_OUTPUT,
-   OPTION_TV_OVERSCAN,
-   OPTION_SHADOW_FB,
-   OPTION_ROTATE,
-   OPTION_FLATPANEL,
-   OPTION_FLATPANEL_IN_BIOS,
-   OPTION_OVERLAY,
-   OPTION_COLOR_KEY,
-   OPTION_VIDEO_KEY,
-   OPTION_IMG_BUFS,
-   OPTION_DONT_PROGRAM
-}
-GeodeOpts;
-
-static OptionInfoRec GeodeOptions[] = {
-   {OPTION_SW_CURSOR, "SWcursor", OPTV_BOOLEAN, {0}, FALSE},
-   {OPTION_HW_CURSOR, "HWcursor", OPTV_BOOLEAN, {0}, FALSE},
-   {OPTION_COMPRESSION, "Compression", OPTV_BOOLEAN, {0}, FALSE},
-   {OPTION_NOACCEL, "NoAccel", OPTV_BOOLEAN, {0}, FALSE},
-   {OPTION_TV_SUPPORT, "TV", OPTV_ANYSTR, {0}, FALSE},
-   {OPTION_TV_OUTPUT, "TV_Output", OPTV_ANYSTR, {0}, FALSE},
-   {OPTION_TV_OVERSCAN, "TVOverscan", OPTV_ANYSTR, {0}, FALSE},
-   {OPTION_SHADOW_FB, "ShadowFB", OPTV_BOOLEAN, {0}, FALSE},
-   {OPTION_ROTATE, "Rotate", OPTV_ANYSTR, {0}, FALSE},
-   {OPTION_FLATPANEL, "FlatPanel", OPTV_BOOLEAN, {0}, FALSE},
-   {OPTION_FLATPANEL_IN_BIOS, "FlatPanelInBios", OPTV_BOOLEAN, {0}, FALSE},
-   {OPTION_OVERLAY, "Overlay", OPTV_ANYSTR, {0}, FALSE},
-   {OPTION_COLOR_KEY, "ColorKey", OPTV_INTEGER, {0}, FALSE},
-   {OPTION_VIDEO_KEY, "VideoKey", OPTV_INTEGER, {0}, FALSE},
-   {OPTION_IMG_BUFS, "ImageWriteBuffers", OPTV_INTEGER,	{0}, FALSE },
-   {OPTION_DONT_PROGRAM, "DontProgram", OPTV_BOOLEAN, {0}, FALSE},
-   {-1, NULL, OPTV_NONE, {0}, FALSE}
-};
-
 /* List of symbols from other modules that this module references.The purpose
 * is that to avoid unresolved symbol warnings
 */
-static const char *vgahwSymbols[] = {
-   "vgaHWGetHWRec",
-   "vgaHWUnlock",
-   "vgaHWInit",
-   "vgaHWSave",
-   "vgaHWRestore",
-   "vgaHWProtect",
-   "vgaHWGetIOBase",
-   "vgaHWMapMem",
-   "vgaHWLock",
-   "vgaHWFreeHWRec",
-   "vgaHWSaveScreen",
-   NULL
-};
-
-static const char *vbeSymbols[] = {
-   "VBEInit",
-   "vbeDoEDID",
-   "vbeFree",
-   NULL
-};
-
-static const char *fbSymbols[] = {
-   "fbScreenInit",
-   "fbPictureInit",
-   NULL
-};
-
-static const char *xaaSymbols[] = {
-   "XAADestroyInfoRec",
-   "XAACreateInfoRec",
-   "XAAInit",
-   "XAAScreenIndex",
-   NULL
-};
-
-static const char *ramdacSymbols[] = {
-   "xf86InitCursor",
-   "xf86CreateCursorInfoRec",
-   "xf86DestroyCursorInfoRec",
-   NULL
-};
-
-static const char *shadowSymbols[] = {
-   "ShadowFBInit",
-   NULL
-};
-
-#ifdef XFree86LOADER
-
-/* Module loader interface */
-
-static MODULESETUPPROTO(GeodeSetup);
-
-static XF86ModuleVersionInfo GeodeVersionRec = {
-   "geode",
-   MODULEVENDORSTRING,
-   MODINFOSTRING1,
-   MODINFOSTRING2,
-   XF86_VERSION_CURRENT,
-   GEODE_VERSION_MAJOR, GEODE_VERSION_MINOR, GEODE_PATCHLEVEL,
-   ABI_CLASS_VIDEODRV,			/* This is a video driver */
-   ABI_VIDEODRV_VERSION,
-   MOD_CLASS_VIDEODRV,
-   {0, 0, 0, 0}
-};
-
-/*
- * This data is accessed by the loader.  The name must be the module name
- * followed by "ModuleInit".
- */
-XF86ModuleData geodeModuleData = { &GeodeVersionRec, GeodeSetup, NULL };
-
-/*-------------------------------------------------------------------------
- * GeodeSetup.
- *
- * Description	:This function sets up the driver in X list and load the
- *               module symbols through xf86loader routines..
- *
- * Parameters.
- *    Module	:Pointer to the geode  module
- *    options	:Driver module options.
- *    ErrorMajor:Major no
- *    ErrorMinor:Minor no.
- *
- * Returns		:NULL on success
- *
- * Comments     :Module setup is done by this function
- *
- *-------------------------------------------------------------------------
-*/
-static pointer
-GeodeSetup(pointer Module, pointer Options, int *ErrorMajor, int *ErrorMinor)
-{
-   static Bool Initialised = FALSE;
-
-   if (!Initialised) {
-      Initialised = TRUE;
-      xf86AddDriver(&GEODE, Module, 0);
-      /* Tell the loader about symbols from other modules that this
-       * module might refer to.
-       */
-      LoaderRefSymLists(vgahwSymbols, fbSymbols, vbeSymbols,
-			xaaSymbols, ramdacSymbols, shadowSymbols, NULL);
-      return (pointer) TRUE;
-   }
-   /*The return value must be non-NULL on success */
-   if (ErrorMajor)
-      *ErrorMajor = LDR_ONCEONLY;
-   return NULL;
-}
-#endif /*End of XFree86Loader */
-
-/* This functions may be used in future implementations */
-
-#if 0
-/* This is not used code and it may be used for vga setup */
-static void
-print_gxm_gfx_reg(GeodePtr pGeode, unsigned int count)
-{
-   int i, base = 0x8300;
-   unsigned int *preg;
-
-   GeodeDebug(("Geode Registers:\n"));
-   for (i = 0; i <= count; i += 4) {
-      preg = (unsigned int *)(gfx_regptr + base + i);
-      DEBUGMSG(0, (0, X_NONE, "%x = %x\n", base + i, *preg));
-   }
-   GeodeDebug(("CS5530 Display Registers:\n"));
-   base = 0x24;
-   for (i = 0; i <= 8; i += 4) {
-      preg = (unsigned int *)(gfx_vidptr + base + i);
-      DEBUGMSG(0, (0, X_NONE, "%x = %x\n", base + i, *preg));
-   }
-}
+extern const char *nscVgahwSymbols[];
+extern const char *nscVbeSymbols[];
+extern const char *nscInt10Symbols[];
 
-static unsigned char
-gfx_inb(unsigned short port)
-{
-   unsigned char value;
-   __asm__ volatile ("inb %1,%0":"=a" (value):"d"(port));
-
-   return value;
-}
-
-static void
-gfx_outb(unsigned short port, unsigned char data)
-{
-   __asm__ volatile ("outb %0,%1"::"a" (data), "d"(port));
-}
+#if CFB
+extern const char *nscCfbSymbols[];
+#else
+extern const char *nscFbSymbols[];
+#endif
+extern const char *nscXaaSymbols[];
+extern const char *nscRamdacSymbols[];
+extern const char *nscShadowSymbols[];
 
-static void
-print_gxm_vga_reg()
+void
+GX1SetupChipsetFPtr(ScrnInfoPtr pScrn)
 {
-   int i, index, data;
-
-   GeodeDebug(("Geode CRT Registers:\n"));
-
-   index = 0x3d4;
-   data = 0x3d5;
-   for (i = 0; i < STD_CRTC_REGS; i++) {
-      OUTB(index, (unsigned char)i);
-      DEBUGMSG(0, (0, X_NONE, "CRT[%x] = %x\n", i, INB(data)));
-   }
-   for (i = 0; i < EXT_CRTC_REGS; i++) {
-      OUTB(index, (unsigned char)0x40 + i);
-      DEBUGMSG(0, (0, X_NONE, "CRT[%x] = %x\n", 0x40 + i, INB(data)));
-   }
-
-   index = 0x3c4;
-   data = 0x3c5;
-   for (i = 0; i <= 4; i++) {
-      OUTB(index, (unsigned char)i);
-      DEBUGMSG(0, (0, X_NONE, "SR[%x] = %x\n", i, INB(data)));
-   }
-
-   index = 0x3ce;
-   data = 0x3cf;
-   for (i = 0; i <= 8; i++) {
-      OUTB(index, (unsigned char)i);
-      DEBUGMSG(0, (0, X_NONE, "GR[%x] = %x\n", i, INB(data)));
-   }
-
-#if 0
-   index = 0x3c0;
-   data = 0x3c1;
-   for (i = 0; i <= 0x14; i++) {
-      INB(0x3da);
-      OUTB(index, (unsigned char)i);
-      DEBUGMSG(0, (0, X_NONE, "AR[%x] = %x\n", i, INB(data)));
-   }
-
-   DEBUGMSG(0, (0, X_NONE, "MISC = %x\n", INB(0x3CC)));
-#endif
+   GeodeDebug(("GX1SetupChipsetFPtr!\n"));
+
+   pScrn->PreInit = GX1PreInit;
+   pScrn->ScreenInit = GX1ScreenInit;
+   pScrn->SwitchMode = GX1SwitchMode;
+   pScrn->AdjustFrame = GX1AdjustFrame;
+   pScrn->EnterVT = GX1EnterVT;
+   pScrn->LeaveVT = GX1LeaveVT;
+   pScrn->FreeScreen = GX1FreeScreen;
+   pScrn->ValidMode = GX1ValidMode;
 }
-#endif /* end of Geode_reg_settings */
 
 /*----------------------------------------------------------------------------
- * GeodeGetRec.
+ * GX1GetRec.
  *
  * Description	:This function allocate an GeodeRec and hooked into
  * pScreenInfo 	 str driverPrivate member of ScreeenInfo
@@ -591,8 +349,8 @@ print_gxm_vga_reg()
  *
 *----------------------------------------------------------------------------
 */
-static GeodePtr
-GeodeGetRec(ScrnInfoPtr pScreenInfo)
+GeodePtr
+GX1GetRec(ScrnInfoPtr pScreenInfo)
 {
    if (!pScreenInfo->driverPrivate)
       pScreenInfo->driverPrivate = xnfcalloc(sizeof(GeodeRec), 1);
@@ -600,7 +358,7 @@ GeodeGetRec(ScrnInfoPtr pScreenInfo)
 }
 
 /*----------------------------------------------------------------------------
- * GeodeFreeRec.
+ * GX1FreeRec.
  *
  * Description	:This function deallocate an GeodeRec and freed from
  *               pScreenInfo str driverPrivate member of ScreeenInfo
@@ -615,7 +373,7 @@ GeodeGetRec(ScrnInfoPtr pScreenInfo)
 *----------------------------------------------------------------------------
 */
 static void
-GeodeFreeRec(ScrnInfoPtr pScreenInfo)
+GX1FreeRec(ScrnInfoPtr pScreenInfo)
 {
    if (pScreenInfo->driverPrivate == NULL) {
       return;
@@ -624,144 +382,8 @@ GeodeFreeRec(ScrnInfoPtr pScreenInfo)
    pScreenInfo->driverPrivate = NULL;
 }
 
-/*-------------------------------------------------------------------------
- * GeodeIdentify.
- *
- * Description  :	This function identify an Geodefamily version.
- *
- *
- * Parameters.
- *    flags		:	flags may be used in GeodePreInit*
- *
- * Returns		: 	none
- *
- * Comments     : 	none
- *
-*------------------------------------------------------------------------
-*/
-static void
-GeodeIdentify(int flags)
-{
-   xf86PrintChipsets(GEODE_NAME,
-		     "Geode family driver (version " GEODE_VERSION_NAME ") "
-		     "for chipsets", GeodeChipsets);
-}
-
-/*----------------------------------------------------------------------------
- * GeodeAvailableOptions.
- *
- * Description	:This function returns the geodeoptions set geodeoption
- *
- * Parameters.
- *    chipid	:This will identify the chipset.
- *    busid     :This will identify the PCI busid
- *
- * Returns		:ptr to GeodeOptions.
- *
- * Comments     :none
- *
-*----------------------------------------------------------------------------
-*/
-static const OptionInfoRec *
-GeodeAvailableOptions(int chipid, int busid)
-{
-   return GeodeOptions;
-}
-
 /*----------------------------------------------------------------------------
- * GeodeProbe.
- *
- * Description	:This is to find that hardware is claimed by another
- *		 driver if not claim the slot & allocate ScreenInfoRec.
- *
- * Parameters.
- *     drv	:a pointer to the geode driver
- *     flags    :flags may passed to check the config and probe detect
- * 												
- * Returns	:TRUE on success and FALSE on failure.
- *
- * Comments     :This should ne minimal probe and it should under no
- *               circumstances change the state of the hardware.Don't do
- *               any intiallizations other than the required
- *               ScreenInforec.
-*----------------------------------------------------------------------------
-*/
-
-static Bool
-GeodeProbe(DriverPtr drv, int flags)
-{
-   Bool foundScreen = FALSE;
-   int numDevSections, numUsed;
-   GDevPtr *devSections = NULL;
-   int *usedChips = NULL;
-   int i;
-
-   GeodeDebug(("GeodeProbe: Probing for supported devices!\n"));
-   /*
-    * *Find the config file Device sections that match this
-    * *driver, and return if there are none.
-    */
-   if ((numDevSections = xf86MatchDevice(GEODE_NAME, &devSections)) <= 0) {
-      GeodeDebug(("GeodeProbe: failed 1!\n"));
-      return FALSE;
-   }
-   /* PCI BUS */
-   if (xf86GetPciVideoInfo()) {
-      numUsed = xf86MatchPciInstances(GEODE_NAME, PCI_VENDOR_ID_NS,
-				      GeodeChipsets, GeodePCIchipsets,
-				      devSections, numDevSections,
-				      drv, &usedChips);
-      if (numUsed <= 0) {
-	 /* Check for old CYRIX vendor ID (5530) */
-	 numUsed = xf86MatchPciInstances(GEODE_NAME,
-					 PCI_VENDOR_ID_CYRIX,
-					 GeodeChipsets, GeodePCIchipsets,
-					 devSections, numDevSections,
-					 drv, &usedChips);
-      }
-
-      if (numUsed > 0) {
-	 if (flags & PROBE_DETECT)
-	    foundScreen = TRUE;
-	 else {
-	    /* Durango only supports one instance, */
-	    /* so take the first one */
-	    for (i = 0; i < numUsed; i++) {
-	       /* Allocate a ScrnInfoRec  */
-	       ScrnInfoPtr pScrn = xf86AllocateScreen(drv, 0);
-
-	       pScrn->driverVersion = GEODE_VERSION_CURRENT;
-	       pScrn->driverName = GEODE_DRIVER_NAME;
-	       pScrn->name = GEODE_NAME;
-	       pScrn->Probe = GeodeProbe;
-	       pScrn->PreInit = GeodePreInit;
-	       pScrn->ScreenInit = GeodeScreenInit;
-	       pScrn->SwitchMode = GeodeSwitchMode;
-	       pScrn->AdjustFrame = GeodeAdjustFrame;
-	       pScrn->EnterVT = GeodeEnterVT;
-	       pScrn->LeaveVT = GeodeLeaveVT;
-	       pScrn->FreeScreen = GeodeFreeScreen;
-	       pScrn->ValidMode = GeodeValidMode;
-	       foundScreen = TRUE;
-	       xf86ConfigActivePciEntity(pScrn,
-					 usedChips[i],
-					 GeodePCIchipsets,
-					 NULL, NULL, NULL, NULL, NULL);
-	    }
-	 }
-      }
-   }
-
-   if (usedChips)
-      xfree(usedChips);
-   if (devSections)
-      xfree(devSections);
-   GeodeDebug(("GeodeProbe: result (%d)!\n", foundScreen));
-   return foundScreen;
-}
-
-/*----------------------------------------------------------------------------
- * GeodeSaveScreen.
+ * GX1SaveScreen.
  *
  * Description	:This is todo the screen blanking
  *
@@ -775,10 +397,18 @@ GeodeProbe(DriverPtr drv, int flags)
 *----------------------------------------------------------------------------
 */
 static Bool
-GeodeSaveScreen(ScreenPtr pScreen, int mode)
+GX1SaveScreen(ScreenPtr pScreen, int mode)
 {
-   GeodeDebug(("GeodeSaveScreen!\n"));
-   return vgaHWSaveScreen(pScreen, mode);
+#if !defined(STB_X)
+   ScrnInfoPtr pScreenInfo = xf86Screens[pScreen->myNum];
+
+   GeodeDebug(("GX2SaveScreen!\n"));
+
+   if (!pScreenInfo->vtSema)
+      return vgaHWSaveScreen(pScreen, mode);
+
+#endif /* STB_X */
+   return TRUE;
 }
 
 /*----------------------------------------------------------------------------
@@ -813,7 +443,7 @@ get_tv_overscan_geom(const char *options, int *X, int *Y, int *W, int *H)
 }
 
 static void
-GeodeProbeDDC(ScrnInfoPtr pScrn, int index)
+GX1ProbeDDC(ScrnInfoPtr pScrn, int index)
 {
    vbeInfoPtr pVbe;
 
@@ -825,7 +455,7 @@ GeodeProbeDDC(ScrnInfoPtr pScrn, int index)
 }
 
 /*----------------------------------------------------------------------------
- * GeodePreInit.
+ * GX1PreInit.
  *
  * Description	:This function is called only once ate teh server startup
  *
@@ -839,7 +469,7 @@ GeodeProbeDDC(ScrnInfoPtr pScrn, int index)
  *----------------------------------------------------------------------------
  */
 static Bool
-GeodePreInit(ScrnInfoPtr pScreenInfo, int flags)
+GX1PreInit(ScrnInfoPtr pScreenInfo, int flags)
 {
    static ClockRange GeodeClockRange =
 	 { NULL, 25175, 135000, 0, FALSE, TRUE, 1, 1, 0 };
@@ -847,19 +477,23 @@ GeodePreInit(ScrnInfoPtr pScreenInfo, int flags)
    int i = 0;
    GeodePtr pGeode;
    char *mod = NULL;
+
+#if CFB
    char *reqSymbol = NULL;
+#endif
 
 #if defined(STB_X)
    GAL_ADAPTERINFO sAdapterInfo;
 #endif /* STB_X */
-   unsigned int PitchInc, minPitch, maxPitch;
+   unsigned int PitchInc = 0, minPitch = 0, maxPitch = 0;
+   unsigned int minHeight = 0, maxHeight = 0;
    const char *s;
    char **modes;
    char **tvmodes_defa;
 
-   GeodeDebug(("GeodePreInit!\n"));
+   GeodeDebug(("GX1PreInit!\n"));
    /* Allocate driver private structure */
-   if (!(pGeode = GeodeGetRec(pScreenInfo)))
+   if (!(pGeode = GX1GetRec(pScreenInfo)))
       return FALSE;
 
    /* This is the general case */
@@ -873,16 +507,22 @@ GeodePreInit(ScrnInfoPtr pScreenInfo, int flags)
    }
 
    if (flags & PROBE_DETECT) {
-      GeodeProbeDDC(pScreenInfo, pGeode->pEnt->index);
+      GX1ProbeDDC(pScreenInfo, pGeode->pEnt->index);
       return TRUE;
    }
 
+   pGeode->FBVGAActive = 0;		/* KFB will Knock of VGA */
+
+#if !defined(STB_X)
    /* If the vgahw module would be needed it would be loaded here */
    if (!xf86LoadSubModule(pScreenInfo, "vgahw")) {
       return FALSE;
    }
-   xf86LoaderReqSymLists(vgahwSymbols, NULL);
-   GeodeDebug(("GeodePreInit(1)!\n"));
+
+   xf86LoaderReqSymLists(nscVgahwSymbols, NULL);
+#endif /* STB_X */
+   GeodeDebug(("GX1PreInit(1)!\n"));
+
    /* Do the durango hardware detection */
 #if defined(STB_X)
    if (!Gal_initialize_interface())
@@ -895,10 +535,9 @@ GeodePreInit(ScrnInfoPtr pScreenInfo, int flags)
       GeodeClockRange.maxClock = sAdapterInfo.dwMaxSupportedPixelClock;
       pGeode->FBLinearAddr = sAdapterInfo.dwFrameBufferBase;
 
-      if (!GeodeMapMem(pScreenInfo))
+      if (!GX1MapMem(pScreenInfo))
 	 return FALSE;
 
-      pGeode->HWVideo = pGeode->vid_version;
    } else {
       return FALSE;
    }
@@ -906,16 +545,12 @@ GeodePreInit(ScrnInfoPtr pScreenInfo, int flags)
    pGeode->cpu_version = gfx_detect_cpu();
    pGeode->vid_version = gfx_detect_video();
    pGeode->FBLinearAddr = gfx_get_frame_buffer_base();
-   pGeode->FBSize = gfx_get_frame_buffer_size();
    /* update the max clock from the one system suports  */
    GeodeClockRange.maxClock = gfx_get_max_supported_pixel_clock();
 
-   if (!GeodeMapMem(pScreenInfo))
+   if (!GX1MapMem(pScreenInfo))
       return FALSE;
 
-   /* does this make sense!?!? */
-   pGeode->HWVideo = gfx_detect_video();
-
    DEBUGMSG(1,
 	    (0, X_INFO,
 	     "Geode chip info: cpu:%x vid:%x size:%x base:%x, rom:%X\n",
@@ -925,11 +560,13 @@ GeodePreInit(ScrnInfoPtr pScreenInfo, int flags)
 
    /* Fill in the monitor field */
    pScreenInfo->monitor = pScreenInfo->confScreen->monitor;
-   GeodeDebug(("GeodePreInit(2)!\n"));
+   GeodeDebug(("GX1PreInit(2)!\n"));
    /* Determine depth, bpp, etc. */
    if (!xf86SetDepthBpp(pScreenInfo, 8, 8, 8, 0)) {
       return FALSE;
+
    } else {
+
       switch (pScreenInfo->depth) {
       case 8:
       case 16:
@@ -957,10 +594,10 @@ GeodePreInit(ScrnInfoPtr pScreenInfo, int flags)
       }
    }
    xf86PrintDepthBpp(pScreenInfo);
-   GeodeDebug(("GeodePreInit(3)!\n"));
+   GeodeDebug(("GX1PreInit(3)!\n"));
    if (!xf86SetDefaultVisual(pScreenInfo, -1))
       return FALSE;
-   GeodeDebug(("GeodePreInit(4)!\n"));
+   GeodeDebug(("GX1PreInit(4)!\n"));
 
    /* The new cmap layer needs this to be initialized */
    if (pScreenInfo->depth > 1) {
@@ -970,7 +607,7 @@ GeodePreInit(ScrnInfoPtr pScreenInfo, int flags)
 	 return FALSE;
       }
    }
-   GeodeDebug(("GeodePreInit(5)!\n"));
+   GeodeDebug(("GX1PreInit(5)!\n"));
    /* We use a programmable clock */
    pScreenInfo->progClock = TRUE;
 
@@ -1005,11 +642,10 @@ GeodePreInit(ScrnInfoPtr pScreenInfo, int flags)
    DEBUGMSG(1, (pScreenInfo->scrnIndex, from, "Using %s cursor\n",
 		pGeode->HWCursor ? "HW" : "SW"));
 
-   pGeode->Compression = FALSE;
-   if (xf86ReturnOptValBool(GeodeOptions, OPTION_COMPRESSION, FALSE)) {
-      pGeode->Compression = TRUE;
-      DEBUGMSG(1, (pScreenInfo->scrnIndex, X_CONFIG, "Compression \
-			enabled\n"));
+   pGeode->Compression = TRUE;
+   if (xf86ReturnOptValBool(GeodeOptions, OPTION_NOCOMPRESSION, FALSE)) {
+      pGeode->Compression = FALSE;
+      DEBUGMSG(1, (pScreenInfo->scrnIndex, X_CONFIG, "NoCompression\n"));
    }
 
    pGeode->NoAccel = FALSE;
@@ -1019,8 +655,22 @@ GeodePreInit(ScrnInfoPtr pScreenInfo, int flags)
 			disabled\n"));
    }
 
+   if (!xf86GetOptValInteger(GeodeOptions, OPTION_OSM_IMG_BUFS,
+			     &(pGeode->NoOfImgBuffers)))
+      pGeode->NoOfImgBuffers = DEFAULT_NUM_OF_BUF;	/* default # of buffers */
+   if (pGeode->NoOfImgBuffers <= 0)
+      pGeode->NoOfImgBuffers = 0;
+   DEBUGMSG(1, (pScreenInfo->scrnIndex, X_CONFIG, "No of Buffers %d\n",
+		pGeode->NoOfImgBuffers));
+
    pGeode->TVSupport = FALSE;
+
+   pGeode->FBTVActive = 0;
+   GFX(get_tv_enable(&(pGeode->FBTVActive)));
+   DEBUGMSG(1, (1, X_PROBED, "FB TV %d \n", pGeode->FBTVActive));
+
    if ((s = xf86GetOptValString(GeodeOptions, OPTION_TV_SUPPORT))) {
+
       DEBUGMSG(1, (pScreenInfo->scrnIndex, X_CONFIG, "TV = %s\n", s));
       if (!xf86NameCmp(s, "PAL-768x576")) {
 	 pGeode->TvParam.wStandard = TV_STANDARD_PAL;
@@ -1049,16 +699,8 @@ GeodePreInit(ScrnInfoPtr pScreenInfo, int flags)
       }
 
       if (pGeode->TVSupport == TRUE) {
-	 unsigned int status = 0;
-
-	 GFX(get_tv_enable(&status));
-
-	 DEBUGMSG(1, (0, X_PROBED, "status %d \n", status));
-	 if (status == 0) {
-	    pGeode->TVSupport = FALSE;
-	    DEBUGMSG(1, (0, X_NONE, "Not a TV Supported Platform\n"));
-	 }
 	 pGeode->TvParam.wOutput = TV_OUTPUT_S_VIDEO;	/* default */
+
 	 /* Now find the output */
 	 if (pGeode->TVSupport) {
 	    if ((s = xf86GetOptValString(GeodeOptions, OPTION_TV_OUTPUT))) {
@@ -1077,6 +719,11 @@ GeodePreInit(ScrnInfoPtr pScreenInfo, int flags)
 	    }
 	 }
       }
+/* Only SC1200 can support TV modes */
+      if ((pGeode->vid_version != GFX_VID_SC1200)
+	  && (pGeode->TVSupport == TRUE)) {
+	 pGeode->TVSupport = FALSE;
+      }
 
       /*TV can be turned on only in 16BPP mode */
       if ((pScreenInfo->depth == 8) && (pGeode->TVSupport == TRUE)) {
@@ -1121,31 +768,17 @@ GeodePreInit(ScrnInfoPtr pScreenInfo, int flags)
 	 GFX(set_tv_enable(0));
    }
 
-   pGeode->NoOfImgBuffers = DEFAULT_NUM_OF_BUF; /* default # of buffers */
-   if(!xf86GetOptValInteger(GeodeOptions, OPTION_IMG_BUFS, 
-						&(pGeode->NoOfImgBuffers))) {
-      if(pGeode->NoOfImgBuffers < 0)
-         pGeode->NoOfImgBuffers = DEFAULT_NUM_OF_BUF; /* default # of buffers */
-   }
-
    pGeode->Panel = FALSE;
    if (xf86ReturnOptValBool(GeodeOptions, OPTION_FLATPANEL, FALSE)) {
       DEBUGMSG(0, (pScreenInfo->scrnIndex, X_CONFIG, "FlatPanel Selected\n"));
       pGeode->Panel = TRUE;
    }
 
-   pGeode->FPInBios = FALSE;
-   if (xf86ReturnOptValBool(GeodeOptions, OPTION_FLATPANEL_IN_BIOS, FALSE)) {
-      DEBUGMSG(1, (pScreenInfo->scrnIndex, X_CONFIG,
-		   "FlatPanel Support from BIOS\n"));
-      pGeode->FPInBios = TRUE;
-   }
-
-   DEBUGMSG(0, (pScreenInfo->scrnIndex, X_CONFIG,
-		"FP Bios %d %d\n", pGeode->FPInBios, pGeode->Panel));
+   DEBUGMSG(1, (pScreenInfo->scrnIndex, X_CONFIG,
+		"Quering FP Bios %d\n", pGeode->Panel));
 
    /* if FP not supported in BIOS, then turn off user option */
-   if (pGeode->FPInBios) {
+   if (pGeode->Panel) {
       int ret;
 
       /* check if bios supports FP */
@@ -1156,9 +789,9 @@ GeodePreInit(ScrnInfoPtr pScreenInfo, int flags)
 	 Gal_set_softvga_state(TRUE);
 	 Gal_vga_mode_switch(0);
       }
-      Gal_pnl_enabled_in_bios(&pGeode->FPInBios);
+      Gal_pnl_enabled_in_bios(&pGeode->Panel);
 
-      if (pGeode->FPInBios) {
+      if (pGeode->Panel) {
 	 Gal_pnl_info_from_bios(&pGeode->FPBX, &pGeode->FPBY,
 				&pGeode->FPBB, &pGeode->FPBF);
       }
@@ -1174,8 +807,8 @@ GeodePreInit(ScrnInfoPtr pScreenInfo, int flags)
 	 gfx_enable_softvga();
 	 gfx_vga_mode_switch(0);
       }
-      pGeode->FPInBios = Pnl_IsPanelEnabledInBIOS();
-      if (pGeode->FPInBios) {
+      pGeode->Panel = Pnl_IsPanelEnabledInBIOS();
+      if (pGeode->Panel) {
 	 Pnl_GetPanelInfoFromBIOS(&pGeode->FPBX, &pGeode->FPBY,
 				  &pGeode->FPBB, &pGeode->FPBF);
       }
@@ -1185,80 +818,10 @@ GeodePreInit(ScrnInfoPtr pScreenInfo, int flags)
 	 gfx_vga_mode_switch(1);
       }
 #endif
-      if (pGeode->FPInBios == 0) {
-	 pGeode->Panel = 0;
-      } else {
-	 DEBUGMSG(1, (pScreenInfo->scrnIndex, X_PROBED,
-		      "Flat Panel Dimensions (from BIOS) %dx%d\n",
-		      pGeode->FPBX, pGeode->FPBY));
-      }
    }
-
-   DEBUGMSG(0, (pScreenInfo->scrnIndex, X_CONFIG,
-		"FP Bios %d %d\n", pGeode->FPInBios, pGeode->Panel));
-
-   /* if Panel enabled and Flatpanel support not from BIOS then 
-    * detect if the platform can support a panel */
-
-   if (pGeode->Panel && (!pGeode->FPInBios)) {
-      pGeode->PnlParam.PanelPresent = 1;
-#if defined(STB_X)
-      Gal_pnl_get_params(PNL_PLATFORM | PNL_PANELCHIP | PNL_PANELSTAT,
-			 &(pGeode->PnlParam));
-#else
-      pGeode->PnlParam.Flags = PNL_PLATFORM | PNL_PANELCHIP | PNL_PANELSTAT;
-
-      Pnl_GetPanelParam(&(pGeode->PnlParam));
-#endif /* STB_X */
-      DEBUGMSG(0, (pScreenInfo->scrnIndex, X_CONFIG,
-		   "chip = %X\n", pGeode->PnlParam.PanelChip));
-      DEBUGMSG(1, (pScreenInfo->scrnIndex, X_CONFIG,
-		   "%s Platform with %s Chip, %s Panel %dx%d %dBpp%sColor \n",
-		   ((pGeode->PnlParam.Platform ==
-		     CENTAURUS_PLATFORM) ? "Centaurus" : ((pGeode->PnlParam.
-							   Platform ==
-							   DORADO_PLATFORM) ?
-							  "Dorado" :
-							  "Unknown")),
-		   ((pGeode->PnlParam.
-		     PanelChip & PNL_9210) ? "9210" : ((pGeode->PnlParam.
-							PanelChip &
-							PNL_9211_A) ? "9211_A"
-						       : ((pGeode->PnlParam.
-							   PanelChip &
-							   PNL_9211_C) ?
-							  "9211_C" :
-							  "Unknown"))),
-		   ((pGeode->PnlParam.PanelStat.
-		     Type & PNL_TFT) ? "TFT" : ((pGeode->PnlParam.PanelStat.
-						 Type & PNL_SSTN) ? "SSTN"
-						: ((pGeode->PnlParam.
-						    PanelStat.
-						    Type & PNL_DSTN) ? "DSTN"
-						   : "Unknown"))),
-		   pGeode->PnlParam.PanelStat.XRes,
-		   pGeode->PnlParam.PanelStat.YRes,
-		   pGeode->PnlParam.PanelStat.Depth,
-		   ((pGeode->PnlParam.PanelStat.
-		     MonoColor & PNL_MONO_PANEL) ? " Mono" : ((pGeode->
-							       PnlParam.
-							       PanelStat.
-							       MonoColor &
-							       PNL_COLOR_PANEL)
-							      ? " " :
-							      " Unknown"))
-	       ));
-
-      /* check if we found a vaild configuration */
-      if ((pGeode->PnlParam.Platform == OTHER_PLATFORM) ||
-	  (pGeode->PnlParam.PanelChip & PNL_UNKNOWN_CHIP) ||
-	  (pGeode->PnlParam.PanelStat.Type & PNL_UNKNOWN_PANEL) ||
-	  (pGeode->PnlParam.PanelStat.MonoColor & PNL_UNKNOWN_COLOR)) {
-	 pGeode->Panel = FALSE;
-      }
-   }
-
-   DEBUGMSG(0, (0, X_CONFIG, "FP Bios pGeode->Panel %d \n", pGeode->Panel));
+   DEBUGMSG(1, (pScreenInfo->scrnIndex, X_CONFIG,
+		"Quering FP Bios %d %d %d %d\n",
+		pGeode->FPBX, pGeode->FPBY, pGeode->FPBB, pGeode->FPBF));
 
    /* if panel not selected and Panel can be  supported. 
     * Power down the panel. 
@@ -1269,6 +832,12 @@ GeodePreInit(ScrnInfoPtr pScreenInfo, int flags)
 #else
       Pnl_PowerDown();
 #endif /* STB_X */
+   } else {
+#if defined(STB_X)
+      Gal_pnl_powerup();
+#else
+      Pnl_PowerUp();
+#endif /* STB_X */
    }
 
    pGeode->ShadowFB = FALSE;
@@ -1279,13 +848,6 @@ GeodePreInit(ScrnInfoPtr pScreenInfo, int flags)
 		   "Using \"Shadow Framebuffer\" - acceleration disabled\n"));
    }
 
-   if (xf86ReturnOptValBool(GeodeOptions, OPTION_DONT_PROGRAM, FALSE)) {
-      gfx_dont_program = 1;
-      DEBUGMSG(1, (pScreenInfo->scrnIndex, X_CONFIG,
-		   "Don't Program enabled\n"));
-   } else
-      gfx_dont_program = 0;
-
    pGeode->Rotate = 0;
    if ((s = xf86GetOptValString(GeodeOptions, OPTION_ROTATE))) {
       DEBUGMSG(1, (pScreenInfo->scrnIndex, X_CONFIG, "Rotating - %s\n", s));
@@ -1316,38 +878,9 @@ GeodePreInit(ScrnInfoPtr pScreenInfo, int flags)
       }
    }
 
-   if ((s = xf86GetOptValString(GeodeOptions, OPTION_OVERLAY))) {
-      if (!*s || !xf86NameCmp(s, "8,16") || !xf86NameCmp(s, "16,8")) {
-	 if (pScreenInfo->bitsPerPixel == 16) {
-	    pGeode->HWOverlay = TRUE;
-	    if (!xf86GetOptValInteger
-		(GeodeOptions, OPTION_COLOR_KEY, &(pScreenInfo->colorKey)))
-	       pScreenInfo->colorKey = TRANSPARENCY_KEY;
-	    pScreenInfo->overlayFlags = OVERLAY_8_16_DUALFB;
-	    DEBUGMSG(1, (pScreenInfo->scrnIndex, X_CONFIG,
-			 "PseudoColor overlay enabled.\n"));
-	 } else {
-	    DEBUGMSG(1, (pScreenInfo->scrnIndex, X_WARNING,
-			 "Option \"Overlay\" is not supported in this configuration\n"));
-	 }
-      } else {
-	 DEBUGMSG(1, (pScreenInfo->scrnIndex, X_WARNING,
-		      "\"%s\" is not a valid value for Option \"Overlay\"\n",
-		      s));
-      }
-   }
-   if (1 || pGeode->HWOverlay) {
-      if (xf86GetOptValInteger(GeodeOptions, OPTION_VIDEO_KEY,
-			       &(pGeode->videoKey))) {
-	 DEBUGMSG(1, (pScreenInfo->scrnIndex, X_CONFIG,
-		      "video key set to 0x%x\n", pGeode->videoKey));
-      } else {
-	 pGeode->videoKey = (1 << pScreenInfo->offset.red) |
-	       (1 << pScreenInfo->offset.green) |
-	       (((pScreenInfo->mask.blue >> pScreenInfo->offset.blue) - 1)
-		<< pScreenInfo->offset.blue);
-      }
-   }
+   /* Disable Rotation when TV Over Scan is enabled */
+   if (pGeode->TV_Overscan_On)
+      pGeode->Rotate = 0;
 
    /* XXX Init further private data here */
 
@@ -1366,20 +899,23 @@ GeodePreInit(ScrnInfoPtr pScreenInfo, int flags)
 		   pScreenInfo->chipset));
       return FALSE;
    }
-   GeodeDebug(("GeodePreInit(6)!\n"));
+   GeodeDebug(("GX1PreInit(6)!\n"));
 
    /*
     * * Init the screen with some values
     */
+#if !defined(STB_X)
+
    DEBUGMSG(1, (pScreenInfo->scrnIndex, from,
 		"Video I/O registers at 0x%08lX\n",
 		(unsigned long)VGAHW_GET_IOBASE()));
+#endif /* STB_X */
 
    if (pScreenInfo->memPhysBase == 0) {
       from = X_PROBED;
 #if defined(STB_X)
       pScreenInfo->memPhysBase = sAdapterInfo.dwFrameBufferBase;
-#else
+#else /* STB_X */
       pScreenInfo->memPhysBase = gfx_get_frame_buffer_base();
 #endif /* STB_X */
    }
@@ -1398,12 +934,12 @@ GeodePreInit(ScrnInfoPtr pScreenInfo, int flags)
 		"VideoRam: %d kByte\n",
 		(unsigned long)pScreenInfo->videoRam));
 
-   GeodeDebug(("GeodePreInit(7)!\n"));
+   GeodeDebug(("GX1PreInit(7)!\n"));
 
    /*
     * * xf86ValidateModes will check that the mode HTotal and VTotal values
     * * don't exceed the chipset's limit if pScreenInfo->maxHValue adn
-    * * pScreenInfo->maxVValue are set. Since our GeodeValidMode()
+    * * pScreenInfo->maxVValue are set. Since our GX1ValidMode()
     * * already takes care of this, we don't worry about setting them here.
     */
    /* Select valid modes from those available */
@@ -1413,11 +949,14 @@ GeodePreInit(ScrnInfoPtr pScreenInfo, int flags)
     */
    minPitch = 1024;
    maxPitch = 2048;
+   minHeight = 480;
+   maxHeight = 1024;			/* Can support upto 1280x1024 16Bpp */
    if (pScreenInfo->depth == 16) {
-      PitchInc = 1024 << 4;		/* in bits */
+      PitchInc = 2048;
    } else {
-      PitchInc = 1024 << 3;		/* in bits */
+      PitchInc = 1024;
    }
+   PitchInc <<= 3;			/* in bits */
 
    /* by default use what user sets in the XF86Config file */
    modes = pScreenInfo->display->modes;
@@ -1442,101 +981,118 @@ GeodePreInit(ScrnInfoPtr pScreenInfo, int flags)
 			 modes,
 			 &GeodeClockRange,
 			 NULL, minPitch, maxPitch,
-			 PitchInc, 480, 1024,
+			 PitchInc, minHeight, maxHeight,
 			 pScreenInfo->display->virtualX,
 			 pScreenInfo->display->virtualY,
 #if defined(STB_X)
 			 sAdapterInfo.dwFrameBufferSize,
 #else
-			 gfx_get_frame_buffer_size(),
+			 pGeode->FBSize,
 #endif /* STB_X */
 			 LOOKUP_BEST_REFRESH);
 
-   DEBUGMSG(1, (pScreenInfo->scrnIndex, from,
+   DEBUGMSG(0, (pScreenInfo->scrnIndex, from,
 		"xf86ValidateModes: %d %d %d\n",
 		pScreenInfo->virtualX,
 		pScreenInfo->virtualY, pScreenInfo->displayWidth));
    if (i == -1) {
-      GeodeFreeRec(pScreenInfo);
+      GX1FreeRec(pScreenInfo);
       return FALSE;
    }
-   GeodeDebug(("GeodePreInit(8)!\n"));
+   GeodeDebug(("GX1PreInit(8)!\n"));
    /* Prune the modes marked as invalid */
    xf86PruneDriverModes(pScreenInfo);
-   GeodeDebug(("GeodePreInit(9)!\n"));
+   GeodeDebug(("GX1PreInit(9)!\n"));
    if (i == 0 || pScreenInfo->modes == NULL) {
       DEBUGMSG(1, (pScreenInfo->scrnIndex, X_ERROR,
 		   "No valid modes found\n"));
-      GeodeFreeRec(pScreenInfo);
+      GX1FreeRec(pScreenInfo);
       return FALSE;
    }
-   GeodeDebug(("GeodePreInit(10)!\n"));
+   GeodeDebug(("GX1PreInit(10)!\n"));
    xf86SetCrtcForModes(pScreenInfo, 0);
-   GeodeDebug(("GeodePreInit(11)!\n"));
+   GeodeDebug(("GX1PreInit(11)!\n"));
    /* Set the current mode to the first in the list */
    pScreenInfo->currentMode = pScreenInfo->modes;
-   GeodeDebug(("GeodePreInit(12)!\n"));
+   GeodeDebug(("GX1PreInit(12)!\n"));
    /* Print the list of modes being used */
    xf86PrintModes(pScreenInfo);
-   GeodeDebug(("GeodePreInit(13)!\n"));
+   GeodeDebug(("GX1PreInit(13)!\n"));
    /* Set the display resolution */
    xf86SetDpi(pScreenInfo, 0, 0);
-   GeodeDebug(("GeodePreInit(14)!\n"));
+   GeodeDebug(("GX1PreInit(14)!\n"));
    /* Load bpp-specific modules */
    mod = NULL;
+
+#if CFB
+   /* Load bpp-specific modules */
    switch (pScreenInfo->bitsPerPixel) {
    case 8:
+      mod = "cfb";
+      reqSymbol = "cfbScreenInit";
+      break;
    case 16:
-      mod = "fb";
-      reqSymbol = "fbScreenInit";
+      mod = "cfb16";
+      reqSymbol = "cfb16ScreenInit";
       break;
+   default:
+      return FALSE;
    }
-   if (mod && !xf86LoadSubModule(pScreenInfo, mod)) {
-      GeodeFreeRec(pScreenInfo);
+   if (mod && xf86LoadSubModule(pScreenInfo, mod) == NULL) {
+      GX1FreeRec(pScreenInfo);
       return FALSE;
    }
+
    xf86LoaderReqSymbols(reqSymbol, NULL);
-   GeodeDebug(("GeodePreInit(15)!\n"));
+#else
+   if (xf86LoadSubModule(pScreenInfo, "fb") == NULL) {
+      GX1FreeRec(pScreenInfo);
+      return FALSE;
+   }
+
+   xf86LoaderReqSymLists(nscFbSymbols, NULL);
+#endif
+   GeodeDebug(("GX1PreInit(15)!\n"));
    if (pGeode->NoAccel == FALSE) {
       if (!xf86LoadSubModule(pScreenInfo, "xaa")) {
-	 GeodeFreeRec(pScreenInfo);
+	 GX1FreeRec(pScreenInfo);
 	 return FALSE;
       }
-      xf86LoaderReqSymLists(xaaSymbols, NULL);
+      xf86LoaderReqSymLists(nscXaaSymbols, NULL);
    }
+   GeodeDebug(("GX1PreInit(16)!\n"));
    if (pGeode->HWCursor == TRUE) {
       if (!xf86LoadSubModule(pScreenInfo, "ramdac")) {
-	 GeodeFreeRec(pScreenInfo);
+	 GX1FreeRec(pScreenInfo);
 	 return FALSE;
       }
-      xf86LoaderReqSymLists(ramdacSymbols, NULL);
+      xf86LoaderReqSymLists(nscRamdacSymbols, NULL);
    }
+   GeodeDebug(("GX1PreInit(17)!\n"));
    /* Load shadowfb if needed */
    if (pGeode->ShadowFB) {
       if (!xf86LoadSubModule(pScreenInfo, "shadowfb")) {
-	 GeodeFreeRec(pScreenInfo);
+	 GX1FreeRec(pScreenInfo);
 	 return FALSE;
       }
-      xf86LoaderReqSymLists(shadowSymbols, NULL);
+      xf86LoaderReqSymLists(nscShadowSymbols, NULL);
    }
+   GeodeDebug(("GX2PreInit(18)!\n"));
    if (xf86RegisterResources(pGeode->pEnt->index, NULL, ResExclusive)) {
       DEBUGMSG(1, (pScreenInfo->scrnIndex, X_ERROR,
 		   "xf86RegisterResources() found resource conflicts\n"));
-      GeodeFreeRec(pScreenInfo);
+      GX1FreeRec(pScreenInfo);
       return FALSE;
    }
-
-   GeodeUnmapMem(pScreenInfo);
-
-   GeodeDebug(("GeodePreInit(16)!\n"));
-   GeodeDebug(("GeodePreInit(17)!\n"));
-   GeodeDebug(("GeodePreInit ... done successfully!\n"));
+   GX1UnmapMem(pScreenInfo);
+   GeodeDebug(("GX1PreInit(19)!\n"));
+   GeodeDebug(("GX1PreInit(20)!\n"));
+   GeodeDebug(("GX1PreInit ... done successfully!\n"));
    return TRUE;
 }
 
-#if 0
 /*----------------------------------------------------------------------------
- * GeodeRestoreEx.
+ * GX1RestoreEx.
  *
  * Description	:This function restores the mode that was saved on server
                  entry
@@ -1550,13 +1106,13 @@ GeodePreInit(ScrnInfoPtr pScreenInfo, int flags)
 *----------------------------------------------------------------------------
 */
 static void
-GeodeRestoreEx(ScrnInfoPtr pScreenInfo, DisplayModePtr pMode)
+GX1RestoreEx(ScrnInfoPtr pScreenInfo, DisplayModePtr pMode)
 {
    GeodePtr pGeode;
 
-   GeodeDebug(("GeodeRestoreEx!\n"));
+   GeodeDebug(("GX1RestoreEx!\n"));
    /* Get driver private structure */
-   if (!(pGeode = GeodeGetRec(pScreenInfo)))
+   if (!(pGeode = GX1GetRec(pScreenInfo)))
       return;
    /* Restore the extended registers */
 #if defined(STB_X)
@@ -1569,10 +1125,9 @@ GeodeRestoreEx(ScrnInfoPtr pScreenInfo, DisplayModePtr pMode)
 		   GFX_VGA_FLAG_STD_CRTC | GFX_VGA_FLAG_EXT_CRTC);
 #endif /* STB_X */
 }
-#endif
 
 /*----------------------------------------------------------------------------
- * GeodeCalculatePitchBytes.
+ * GX1CalculatePitchBytes.
  *
  * Description	:This function restores the mode that was saved on server
  *
@@ -1586,18 +1141,18 @@ GeodeRestoreEx(ScrnInfoPtr pScreenInfo, DisplayModePtr pMode)
 *----------------------------------------------------------------------------
 */
 static int
-GeodeCalculatePitchBytes(ScrnInfoPtr pScreenInfo)
+GX1CalculatePitchBytes(unsigned int width, unsigned int bpp)
 {
-   GeodePtr pGeode;
-   int lineDelta = pScreenInfo->virtualX * (pScreenInfo->bitsPerPixel >> 3);
-
-   pGeode = GEODEPTR(pScreenInfo);
+   int lineDelta = width * (bpp >> 3);
 
+   if (width < 640) {
+      /* low resolutions have both pixel and line doubling */
+      DEBUGMSG(1, (0, X_PROBED, "lower resolution %d %d\n",
+		   width, lineDelta));
+      lineDelta <<= 1;
+   }
    /* needed in Rotate mode when in accel is turned off */
    if (1) {				/*!pGeode->NoAccel */
-      /* Force to 1K or 2K if acceleration is enabled
-       * we should check for pyramid here!!
-       */
       if (lineDelta > 2048)
 	 lineDelta = 4096;
       else if (lineDelta > 1024)
@@ -1606,14 +1161,13 @@ GeodeCalculatePitchBytes(ScrnInfoPtr pScreenInfo)
 	 lineDelta = 1024;
    }
 
-   DEBUGMSG(1,
-	    (0, X_PROBED, "pitch %d %d\n", pScreenInfo->virtualX, lineDelta));
+   DEBUGMSG(1, (0, X_PROBED, "pitch %d %d\n", width, lineDelta));
 
    return lineDelta;
 }
 
 /*----------------------------------------------------------------------------
- * GeodeGetRefreshRate.
+ * GX1GetRefreshRate.
  *
  * Description	:This function restores the mode that saved on server
  *
@@ -1626,10 +1180,10 @@ GeodeCalculatePitchBytes(ScrnInfoPtr pScreenInfo)
 *----------------------------------------------------------------------------
 */
 static int
-GeodeGetRefreshRate(DisplayModePtr pMode)
+GX1GetRefreshRate(DisplayModePtr pMode)
 {
 #define THRESHOLD 2
-   int i;
+   unsigned int i;
    static int validRates[] = { 50, 56, 60, 70, 72, 75, 85 };	/* Hz */
    unsigned long dotClock;
    int refreshRate;
@@ -1637,6 +1191,12 @@ GeodeGetRefreshRate(DisplayModePtr pMode)
 
    dotClock = pMode->SynthClock * 1000;
    refreshRate = dotClock / pMode->CrtcHTotal / pMode->CrtcVTotal;
+
+   if ((pMode->CrtcHTotal < 640) && (pMode->CrtcVTotal < 480))
+      refreshRate >>= 2;		/* double pixel and double scan */
+
+   DEBUGMSG(1, (0, X_PROBED, "dotclock %d %d\n", dotClock, refreshRate));
+
    selectedRate = validRates[0];
    for (i = 0; i < (sizeof(validRates) / sizeof(validRates[0])); i++) {
       if (validRates[i] < (refreshRate + THRESHOLD)) {
@@ -1646,20 +1206,17 @@ GeodeGetRefreshRate(DisplayModePtr pMode)
    return selectedRate;
 }
 
-#if 1
-static void
-clear_screen(int width, int height)
+void
+gx1_clear_screen(int width, int height)
 {
    /* clean up the frame buffer memory */
-
    GFX(set_solid_pattern(0));
    GFX(set_raster_operation(0xF0));
    GFX(pattern_fill(0, 0, width, height));
 }
-#endif
 
 /*----------------------------------------------------------------------------
- * GeodeSetMode.
+ * GX1SetMode.
  *
  * Description	:This function sets parametrs for screen mode
  *
@@ -1674,226 +1231,110 @@ clear_screen(int width, int height)
 */
 
 static Bool
-GeodeSetMode(ScrnInfoPtr pScreenInfo, DisplayModePtr pMode)
+GX1SetMode(ScrnInfoPtr pScreenInfo, DisplayModePtr pMode)
 {
    GeodePtr pGeode;
 
    /* unsigned int compOffset, compPitch, compSize; */
-   GeodeDebug(("GeodeSetMode!\n"));
+   GeodeDebug(("GX1SetMode!\n"));
    pGeode = GEODEPTR(pScreenInfo);
-
    /* Set the VT semaphore */
    pScreenInfo->vtSema = TRUE;
-
+   DEBUGMSG(1, (0, X_NONE, "Set mode"));
    /* The timing will be adjusted later */
    GeodeDebug(("Set display mode: %dx%d-%d (%dHz)\n",
 	       pMode->CrtcHDisplay,
 	       pMode->CrtcVDisplay,
-	       pScreenInfo->bitsPerPixel, GeodeGetRefreshRate(pMode)));
+	       pScreenInfo->bitsPerPixel, GX1GetRefreshRate(pMode)));
    GeodeDebug(("Before setting the mode\n"));
-#if 0
    if ((pMode->CrtcHDisplay >= 640) && (pMode->CrtcVDisplay >= 480))
-      if (1) {
-#endif
-	 GFX(set_display_bpp(pScreenInfo->bitsPerPixel));
 
-	 if (pGeode->TVSupport == TRUE) {
-	    pGeode->TvParam.bState = 1;	/* enable */
-	    /* wWidth and wHeight already set in init. */
+      GFX(set_display_bpp(pScreenInfo->bitsPerPixel));
+
+   if (pGeode->TVSupport == TRUE) {
+      pGeode->TvParam.bState = 1;	/* enable */
+      /* wWidth and wHeight already set in init. */
 #if defined(STB_X)
-	    Gal_tv_set_params(GAL_TVSTATE | GAL_TVOUTPUT |
-			      GAL_TVFORMAT | GAL_TVRESOLUTION,
-			      &(pGeode->TvParam));
+      Gal_tv_set_params(GAL_TVSTATE | GAL_TVOUTPUT |
+			GAL_TVFORMAT | GAL_TVRESOLUTION, &(pGeode->TvParam));
 #else
-	    /* sequence might be important */
-	    gfx_set_tv_display(pGeode->TvParam.wWidth,
-			       pGeode->TvParam.wHeight);
-	    gfx_set_tv_format(pGeode->TvParam.wStandard,
-			      pGeode->TvParam.wType);
-	    gfx_set_tv_output(pGeode->TvParam.wOutput);
-	    gfx_set_tv_enable(pGeode->TvParam.bState);
+      /* sequence might be important */
+      gfx_set_tv_display(pGeode->TvParam.wWidth, pGeode->TvParam.wHeight);
+      gfx_set_tv_format(pGeode->TvParam.wStandard, pGeode->TvParam.wType);
+      gfx_set_tv_output(pGeode->TvParam.wOutput);
+      gfx_set_tv_enable(pGeode->TvParam.bState);
 
 #endif /* STB_X */
-	 } else {			/* TV not selected */
-
-	    DEBUGMSG(0, (0, X_PROBED, "Setting Display for CRT or TFT\n"));
-
-	    if (pGeode->Panel) {
-	       DEBUGMSG(0, (0, X_PROBED, "Setting Display for TFT\n"));
-	       if (gfx_dont_program) {
-		  if (pGeode->FPBX != pMode->CrtcHDisplay &&
-		      pGeode->FPBY != pMode->CrtcVDisplay) {
-		     gfx_dont_program = 0;
-		     DEBUGMSG(1,
-			      (1, X_PROBED,
-			       "Disabling Dont Program - Panel/Res mismatch %dx%d != %dx%d\n",
-			       pGeode->FPBX, pGeode->FPBY,
-			       pMode->CrtcHDisplay, pMode->CrtcVDisplay));
-		  }
-	       }
-#if defined(STB_X)
-	       if (pGeode->FPInBios) {
-		  DEBUGMSG(0, (0, X_PROBED, "Restore Panel %d %d %d %d %d\n",
-			       pGeode->FPBX,
-			       pGeode->FPBY,
-			       pMode->CrtcHDisplay,
-			       pMode->CrtcVDisplay,
-			       pScreenInfo->bitsPerPixel));
-		  Gal_set_fixed_timings(pGeode->FPBX, pGeode->FPBY,
-					pMode->CrtcHDisplay,
-					pMode->CrtcVDisplay,
-					pScreenInfo->bitsPerPixel);
-	       } else {
-		  DEBUGMSG(0, (0, X_PROBED, "Restore Panel %d %d %d %d %d\n",
-			       pGeode->PnlParam.PanelStat.XRes,
-			       pGeode->PnlParam.PanelStat.YRes,
-			       pMode->CrtcHDisplay,
-			       pMode->CrtcVDisplay,
-			       pScreenInfo->bitsPerPixel));
+   } else {				/* TV not selected */
 
-		  Gal_set_fixed_timings(pGeode->PnlParam.PanelStat.XRes,
-					pGeode->PnlParam.PanelStat.YRes,
-					pMode->CrtcHDisplay,
-					pMode->CrtcVDisplay,
-					pScreenInfo->bitsPerPixel);
-		  Gal_pnl_init(&(pGeode->PnlParam));
-	       }
-#else
-	       GeodeDebug(("0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n", READ_REG32(DC_OUTPUT_CFG), READ_REG32(DC_TIMING_CFG), READ_REG32(DC_GENERAL_CFG), READ_REG32(DC_H_TIMING_1), READ_REG32(DC_H_TIMING_2), READ_REG32(DC_H_TIMING_3), READ_REG32(DC_FP_H_TIMING), READ_REG32(DC_V_TIMING_1), READ_REG32(DC_V_TIMING_2), READ_REG32(DC_V_TIMING_3), READ_REG32(DC_FP_V_TIMING)));
+      DEBUGMSG(0, (0, X_PROBED, "Setting Display for CRT or TFT\n"));
 
-	       if (pGeode->FPInBios) {
-		  DEBUGMSG(0, (0, X_PROBED, "Restore Panel %d %d %d %d %d\n",
-			       pGeode->FPBX,
-			       pGeode->FPBY,
-			       pMode->CrtcHDisplay,
-			       pMode->CrtcVDisplay,
-			       pScreenInfo->bitsPerPixel));
+      if (pGeode->Panel) {
+	 DEBUGMSG(0, (0, X_PROBED, "Setting Display for TFT\n"));
+	 DEBUGMSG(1, (0, X_PROBED, "Restore Panel %d %d %d %d %d\n",
+		      pGeode->FPBX, pGeode->FPBY,
+		      pMode->CrtcHDisplay,
+		      pMode->CrtcVDisplay, pScreenInfo->bitsPerPixel));
 
-#ifdef MAGIC
-		  /* XXX: We do this twice - magic ! */
-		  gfx_set_fixed_timings(pGeode->FPBX, pGeode->FPBY,
-					pMode->CrtcHDisplay,
-					pMode->CrtcVDisplay,
-					pScreenInfo->bitsPerPixel);
-#endif
-		  gfx_set_fixed_timings(pGeode->FPBX, pGeode->FPBY,
-					pMode->CrtcHDisplay,
-					pMode->CrtcVDisplay,
-					pScreenInfo->bitsPerPixel);
-	       } else {
-		  DEBUGMSG(0, (0, X_PROBED, "Restore Panel %d %d %d %d %d\n",
-			       pGeode->PnlParam.PanelStat.XRes,
-			       pGeode->PnlParam.PanelStat.YRes,
+	 GFX(set_fixed_timings(pGeode->FPBX, pGeode->FPBY,
 			       pMode->CrtcHDisplay,
 			       pMode->CrtcVDisplay,
 			       pScreenInfo->bitsPerPixel));
-#ifdef MAGIC
-		  /* XXX: We do this twice - magic ! */
-		  gfx_set_fixed_timings(pGeode->PnlParam.PanelStat.XRes,
-					pGeode->PnlParam.PanelStat.YRes,
-					pMode->CrtcHDisplay,
-					pMode->CrtcVDisplay,
-					pScreenInfo->bitsPerPixel);
-#endif
-		  gfx_set_fixed_timings(pGeode->PnlParam.PanelStat.XRes,
-					pGeode->PnlParam.PanelStat.YRes,
-					pMode->CrtcHDisplay,
-					pMode->CrtcVDisplay,
-					pScreenInfo->bitsPerPixel);
-		  Pnl_InitPanel(&(pGeode->PnlParam));
-	       }
-	       GeodeDebug(("0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n", READ_REG32(DC_OUTPUT_CFG), READ_REG32(DC_TIMING_CFG), READ_REG32(DC_GENERAL_CFG), READ_REG32(DC_H_TIMING_1), READ_REG32(DC_H_TIMING_2), READ_REG32(DC_H_TIMING_3), READ_REG32(DC_FP_H_TIMING), READ_REG32(DC_V_TIMING_1), READ_REG32(DC_V_TIMING_2), READ_REG32(DC_V_TIMING_3), READ_REG32(DC_FP_V_TIMING)));
-#endif /* STB_X */
-	    } else {
-	       /* display is crt */
-	       DEBUGMSG(0, (0, X_PROBED, "Setting Display for CRT\n"));
-#if defined(STB_X)
-	       Gal_set_display_mode(pMode->CrtcHDisplay,
-				    pMode->CrtcVDisplay,
-				    pScreenInfo->bitsPerPixel,
-				    GeodeGetRefreshRate(pMode));
-
-	       /* adjust the pitch */
-	       Gal_set_display_pitch(pGeode->Pitch);
-#else
-#ifdef MAGIC
-	       /* XXX: We do this twice - magic ! */
-	       gfx_set_display_mode(pMode->CrtcHDisplay,
-				    pMode->CrtcVDisplay,
-				    pScreenInfo->bitsPerPixel,
-				    GeodeGetRefreshRate(pMode));
-#endif
-	       gfx_set_display_mode(pMode->CrtcHDisplay,
-				    pMode->CrtcVDisplay,
-				    pScreenInfo->bitsPerPixel,
-				    GeodeGetRefreshRate(pMode));
+      } else {
+	 /* display is crt */
+	 DEBUGMSG(0, (0, X_PROBED, "Setting Display for CRT\n"));
+	 GFX(set_display_mode(pMode->CrtcHDisplay,
+			      pMode->CrtcVDisplay,
+			      pScreenInfo->bitsPerPixel,
+			      GX1GetRefreshRate(pMode)));
 
-	       /* adjust the pitch */
-	       gfx_set_display_pitch(pGeode->Pitch);
-#endif /* STB_X */
-	    }
-	    /* enable crt */
-#if defined(STB_X)
-	    Gal_set_crt_state(CRT_ENABLE);
-#else
-#ifdef MAGIC
-	    /* XXX: We do this twice - magic ! */
-	    gfx_set_crt_enable(CRT_ENABLE);
-#endif
-	    gfx_set_crt_enable(CRT_ENABLE);
-#endif /* STB_X */
-	 }
+	 /* adjust the pitch */
+	 GFX(set_display_pitch(pGeode->Pitch));
 
-	 GFX(set_display_offset(0L));
-	 GFX(wait_vertical_blank());
+      }
+      /* enable crt */
+      GFX(set_crt_enable(CRT_ENABLE));
+   }
 
-	 pGeode->CursorSize = 256;
+   GFX(set_display_offset(0L));
+   GFX(wait_vertical_blank());
 
-	 /* enable compression if option selected */
-	 if (pGeode->Compression) {
-	    pGeode->CursorStartOffset = GeodeMemOffset[MemIndex].CurOffset;
-	    /* set the compression parameters,and it will be turned on later. */
+   /* enable compression if option selected */
+   if (pGeode->Compression) {
+      /* set the compression parameters,and it will be turned on later. */
 #if defined(STB_X)
-	    Gal_set_compression_parameters(GAL_COMPRESSION_ALL,
-					   GeodeMemOffset[MemIndex].CBOffset,
-					   GeodeMemOffset[MemIndex].CBPitch,
-					   GeodeMemOffset[MemIndex].CBSize -
-					   16);
-
-	    /* set the compression buffer, all parameters already set */
-	    Gal_set_compression_state(GAL_COMPRESSION_ENABLE);
+      Gal_set_compression_parameters(GAL_COMPRESSION_ALL,
+				     pGeode->CBOffset,
+				     pGeode->CBPitch, pGeode->CBSize);
+
+      /* set the compression buffer, all parameters already set */
+      Gal_set_compression_enable(GAL_COMPRESSION_ENABLE);
 #else
-	    gfx_set_compression_offset(GeodeMemOffset[MemIndex].CBOffset);
-	    gfx_set_compression_pitch(GeodeMemOffset[MemIndex].CBPitch);
-	    gfx_set_compression_size(GeodeMemOffset[MemIndex].CBSize - 16);
+      gfx_set_compression_offset(pGeode->CBOffset);
+      gfx_set_compression_pitch(pGeode->CBPitch);
+      gfx_set_compression_size(pGeode->CBSize);
 
-	    /* set the compression buffer, all parameters already set */
-	    gfx_set_compression_enable(1);
+      /* set the compression buffer, all parameters already set */
+      gfx_set_compression_enable(1);
 #endif /* STB_X */
 
-	 } else {
-	    /* Default cursor offset, end of the frame buffer */
-	    pGeode->CursorStartOffset = pGeode->FBSize - pGeode->CursorSize;
-	 }
-	 if (pGeode->HWCursor) {
-	    /* Load blank cursor */
-	    GeodeLoadCursorImage(pScreenInfo, NULL);
-	    GFX(set_cursor_position(pGeode->CursorStartOffset, 0, 0, 0, 0));
-	    GFX(set_cursor_enable(1));
-	 }
-#if 0
-      } else {
-	 GeodeDebug(("GeodeRestoreEx ... "));
-	 GeodeRestoreEx(pScreenInfo, pMode);
-	 GeodeDebug(("done.\n"));
-      }
-#endif
+   }
+   if (pGeode->HWCursor) {
+      /* Load blank cursor */
+      GX1LoadCursorImage(pScreenInfo, NULL);
+      GFX(set_cursor_position(pGeode->CursorStartOffset, 0, 0, 0, 0));
+      GFX(set_cursor_enable(1));
+   } else {
+      GeodeDebug(("GX1RestoreEx ... "));
+      GX1RestoreEx(pScreenInfo, pMode);
+      GeodeDebug(("done.\n"));
+   }
 
    GeodeDebug(("done.\n"));
    /* Reenable the hardware cursor after the mode switch */
    if (pGeode->HWCursor == TRUE) {
-      GeodeDebug(("GeodeShowCursor ... "));
-      GeodeShowCursor(pScreenInfo);
+      GeodeDebug(("GX1ShowCursor ... "));
+      GX1ShowCursor(pScreenInfo);
       GeodeDebug(("done.\n"));
    }
    /* Restore the contents in the screen info */
@@ -1902,7 +1343,7 @@ GeodeSetMode(ScrnInfoPtr pScreenInfo, DisplayModePtr pMode)
 }
 
 /*----------------------------------------------------------------------------
- * GeodeEnterGraphics.
+ * GX1EnterGraphics.
  *
  * Description	:This function will intiallize the displaytiming
 				 structure for nextmode and switch to VGA mode.
@@ -1919,35 +1360,44 @@ GeodeSetMode(ScrnInfoPtr pScreenInfo, DisplayModePtr pMode)
 *----------------------------------------------------------------------------
 */
 static Bool
-GeodeEnterGraphics(ScreenPtr pScreen, ScrnInfoPtr pScreenInfo)
+GX1EnterGraphics(ScreenPtr pScreen, ScrnInfoPtr pScreenInfo)
 {
    GeodePtr pGeode;
+
+#if !defined(STB_X)
+
    vgaHWPtr hwp = VGAHWPTR(pScreenInfo);
 
-   GeodeDebug(("GeodeEnterGraphics!\n"));
    vgaHWUnlock(hwp);
+#endif
+
+   GeodeDebug(("GX1EnterGraphics!\n"));
+
+   DEBUGMSG(1, (0, X_NONE, "EnterGraphics\n"));
    /* Should we re-save the text mode on each VT enter? */
-   pGeode = GeodeGetRec(pScreenInfo);
+   pGeode = GX1GetRec(pScreenInfo);
 #if 0
    print_gxm_gfx_reg(pGeode, 0x4C);
    print_gxm_vga_reg();
 #endif
    /* This routine saves the current VGA state in Durango VGA structure */
 #if defined(STB_X)
-   Gal_get_softvga_state(&pGeode->FBSoftVGAActive);
+   Gal_get_softvga_state(&pGeode->FBVGAActive);
    pGeode->FBgfxVgaRegs.dwFlags = GFX_VGA_FLAG_MISC_OUTPUT |
 	 GFX_VGA_FLAG_STD_CRTC | GFX_VGA_FLAG_EXT_CRTC;
    Gal_vga_save(&(pGeode->FBgfxVgaRegs));
 #else
-   pGeode->FBSoftVGAActive = gfx_get_softvga_active();
+   pGeode->FBVGAActive = gfx_get_softvga_active();
    gfx_vga_save(&(pGeode->FBgfxVgaRegs),
 		GFX_VGA_FLAG_MISC_OUTPUT |
 		GFX_VGA_FLAG_STD_CRTC | GFX_VGA_FLAG_EXT_CRTC);
 #endif /* STB_X */
-   DEBUGMSG(0, (0, X_PROBED, "VSA = %d\n", pGeode->FBSoftVGAActive));
+   DEBUGMSG(1, (0, X_PROBED, "VSA = %d\n", pGeode->FBVGAActive));
 
-   vgaHWSave(pScreenInfo, &VGAHWPTR(pScreenInfo)->SavedReg,
-	     VGA_SR_ALL);
+#if !defined(STB_X)
+
+   vgaHWSave(pScreenInfo, &VGAHWPTR(pScreenInfo)->SavedReg, VGA_SR_ALL);
+#endif
 
 #if defined(STB_X)
    Gal_get_display_timing(&pGeode->FBgfxdisplaytiming);
@@ -1957,7 +1407,7 @@ GeodeEnterGraphics(ScreenPtr pScreen, ScrnInfoPtr pScreenInfo)
    Gal_get_display_offset(&(pGeode->FBDisplayOffset));
 
    /* Save the current Compression state */
-   Gal_get_compression_state(&(pGeode->FBCompressionEnable));
+   Gal_get_compression_enable(&(pGeode->FBCompressionEnable));
    Gal_get_compression_parameters(GAL_COMPRESSION_ALL,
 				  &(pGeode->FBCompressionOffset),
 				  &(pGeode->FBCompressionPitch),
@@ -2040,19 +1490,19 @@ GeodeEnterGraphics(ScreenPtr pScreen, ScrnInfoPtr pScreenInfo)
 
 #endif /* STB_X */
 
-   if (!GeodeSetMode(pScreenInfo, pScreenInfo->currentMode)) {
+   if (!GX1SetMode(pScreenInfo, pScreenInfo->currentMode)) {
       return FALSE;
    }
 #if 1
    /* clear the frame buffer, for annoying noise during mode switch */
-   clear_screen(pScreenInfo->currentMode->CrtcHDisplay,
-		pScreenInfo->currentMode->CrtcVDisplay);
+   gx1_clear_screen(pScreenInfo->currentMode->CrtcHDisplay,
+		    pScreenInfo->currentMode->CrtcVDisplay);
 #endif
    return TRUE;
 }
 
 /*----------------------------------------------------------------------------
- * GeodeLeaveGraphics:
+ * GX1LeaveGraphics:
  *
  * Description	:This function will restore the displaymode parameters
  * 				 and switches the VGA mode
@@ -2070,28 +1520,24 @@ GeodeEnterGraphics(ScreenPtr pScreen, ScrnInfoPtr pScreenInfo)
 *----------------------------------------------------------------------------
 */
 static void
-GeodeLeaveGraphics(ScrnInfoPtr pScreenInfo)
+GX1LeaveGraphics(ScrnInfoPtr pScreenInfo)
 {
    GeodePtr pGeode;
 
-   GeodeDebug(("GeodeLeaveGraphics!\n"));
+   GeodeDebug(("GX1LeaveGraphics!\n"));
    pGeode = GEODEPTR(pScreenInfo);
 
-#if 1
+   if (!pGeode->FBTVActive) {
+      GFX(set_tv_enable(0));
+   }
    /* clear the frame buffer, when leaving X */
-   clear_screen(pScreenInfo->virtualX, pScreenInfo->virtualY);
-#endif
+   gx1_clear_screen(pScreenInfo->virtualX, pScreenInfo->virtualY);
 
 #if defined(STB_X)
    Gal_set_display_timing(&pGeode->FBgfxdisplaytiming);
    Gal_tv_set_timings(0, &pGeode->FBgfxtvtiming);
    Gal_set_display_offset(pGeode->FBDisplayOffset);
 
-   /* Restore Panel */
-   if (pGeode->PnlParam.PanelPresent == PNL_PANELPRESENT) {
-      Gal_pnl_restore();
-   }
-
    /* Restore Cursor */
    Gal_set_cursor_position(pGeode->FBCursorOffset, 0, 0, 0, 0);
 
@@ -2102,16 +1548,9 @@ GeodeLeaveGraphics(ScrnInfoPtr pScreenInfo)
 				     pGeode->FBCompressionPitch,
 				     pGeode->FBCompressionSize);
 
-      Gal_set_compression_state(GAL_COMPRESSION_ENABLE);
+      Gal_set_compression_enable(GAL_COMPRESSION_ENABLE);
    }
 #else
-   GeodeDebug(("GeodeLeaveGraphics(1)!\n"));
-   /* Restore Panel */
-   if (pGeode->PnlParam.PanelPresent == PNL_PANELPRESENT) {
-      Pnl_RestorePanelState();
-   }
-
-   GeodeDebug(("GeodeLeaveGraphics(2)!\n"));
    /* Restore TV */
    if (pGeode->FBTVEnabled) {
       /* TV Format */
@@ -2134,7 +1573,6 @@ GeodeLeaveGraphics(ScrnInfoPtr pScreenInfo)
       /* TV Enable */
       WRITE_VID32(SC1200_TVENC_DAC_CONTROL, pGeode->FBtvtiming.DacCtrl);
    }
-   GeodeDebug(("GeodeLeaveGraphics(3)!\n"));
 
    /* Restore CRT */
    gfx_set_display_timings(pGeode->FBgfxdisplaytiming.wBpp,
@@ -2155,13 +1593,10 @@ GeodeLeaveGraphics(ScrnInfoPtr pScreenInfo)
 
    gfx_set_display_pitch(pGeode->FBgfxdisplaytiming.wPitch);
 
-   GeodeDebug(("GeodeLeaveGraphics(4)!\n"));
    gfx_set_display_offset(pGeode->FBDisplayOffset);
-   GeodeDebug(("GeodeLeaveGraphics(5)!\n"));
 
    /* Restore Cursor */
    gfx_set_cursor_position(pGeode->FBCursorOffset, 0, 0, 0, 0);
-   GeodeDebug(("GeodeLeaveGraphics(6)!\n"));
 
    /* Restore the previous Compression state */
    if (pGeode->FBCompressionEnable) {
@@ -2170,7 +1605,6 @@ GeodeLeaveGraphics(ScrnInfoPtr pScreenInfo)
       gfx_set_compression_size(pGeode->FBCompressionSize);
       gfx_set_compression_enable(1);
    }
-   GeodeDebug(("GeodeLeaveGraphics(7)!\n"));
 #endif /* STB_X */
 
    /* We need this to get back to vga mode when soft-vga
@@ -2183,7 +1617,7 @@ GeodeLeaveGraphics(ScrnInfoPtr pScreenInfo)
    if ((pGeode->FBgfxdisplaytiming.wHActive == 720) &&
        (pGeode->FBgfxdisplaytiming.wVActive == 400))
 #else
-   if (pGeode->FBSoftVGAActive)
+   if (pGeode->FBVGAActive)
 #endif
    {
       /* VSA was active before we started. Since we disabled it 
@@ -2192,37 +1626,37 @@ GeodeLeaveGraphics(ScrnInfoPtr pScreenInfo)
       Gal_set_softvga_state(TRUE);
       Gal_vga_mode_switch(1);
       Gal_vga_clear_extended();
+#else
+      gfx_enable_softvga();
+      gfx_vga_mode_switch(1);
+      gfx_vga_clear_extended();
+#endif /* STB_X */
+
+#if !defined(STB_X)
+
+      vgaHWRestore(pScreenInfo, &VGAHWPTR(pScreenInfo)->SavedReg, VGA_SR_ALL);
+#endif
+
+#if defined(STB_X)
       pGeode->FBgfxVgaRegs.dwFlags = GFX_VGA_FLAG_MISC_OUTPUT |
 	    GFX_VGA_FLAG_STD_CRTC | GFX_VGA_FLAG_EXT_CRTC;
       Gal_vga_restore(&(pGeode->FBgfxVgaRegs));
       Gal_vga_mode_switch(0);
 #else
-      GeodeDebug(("GeodeLeaveGraphics(8)!\n"));
-      gfx_enable_softvga();
-      GeodeDebug(("GeodeLeaveGraphics(9)!\n"));
-      gfx_vga_mode_switch(1);
-      GeodeDebug(("GeodeLeaveGraphics(10)!\n"));
-      gfx_vga_clear_extended();
-      GeodeDebug(("GeodeLeaveGraphics(11)!\n"));
       gfx_vga_restore(&(pGeode->FBgfxVgaRegs),
 		      GFX_VGA_FLAG_MISC_OUTPUT |
 		      GFX_VGA_FLAG_STD_CRTC | GFX_VGA_FLAG_EXT_CRTC);
-      GeodeDebug(("GeodeLeaveGraphics(12)!\n"));
       gfx_vga_mode_switch(0);
 #endif /* STB_X */
-      vgaHWRestore(pScreenInfo, &VGAHWPTR(pScreenInfo)->SavedReg,
-		   VGA_SR_ALL);
-      GeodeDebug(("GeodeLeaveGraphics(13)!\n"));
    }
 #if 0
    print_gxm_gfx_reg(pGeode, 0x4C);
    print_gxm_vga_reg();
 #endif
-   GeodeDebug(("GeodeLeaveGraphics Done!\n"));
 }
 
 /*----------------------------------------------------------------------------
- * GeodeCloseScreen.
+ * GX1CloseScreen.
  *
  * Description	:This function will restore the original mode
  *				 and also it unmap video memory
@@ -2238,16 +1672,14 @@ GeodeLeaveGraphics(ScrnInfoPtr pScreenInfo)
 *----------------------------------------------------------------------------
 */
 static Bool
-GeodeCloseScreen(int scrnIndex, ScreenPtr pScreen)
+GX1CloseScreen(int scrnIndex, ScreenPtr pScreen)
 {
    ScrnInfoPtr pScreenInfo = xf86Screens[scrnIndex];
-   GeodePtr pGeode;
+   GeodePtr pGeode = GEODEPTR(pScreenInfo);
 
-   GeodeDebug(("GeodeCloseScreen!\n"));
-   pGeode = GEODEPTR(pScreenInfo);
-   /* Shouldn't try to restore graphics, if we're already in textmode */
-   if (pScreenInfo->vtSema)
-      GeodeLeaveGraphics(pScreenInfo);
+   DEBUGMSG(1, (scrnIndex, X_PROBED, "GX1CloseScreen\n"));
+   GeodeDebug(("GX1CloseScreen!\n"));
+   GX1LeaveGraphics(pScreenInfo);
    if (pGeode->AccelInfoRec)
       XAADestroyInfoRec(pGeode->AccelInfoRec);
    pScreenInfo->vtSema = FALSE;
@@ -2256,18 +1688,25 @@ GeodeCloseScreen(int scrnIndex, ScreenPtr pScreen)
    pGeode->DGAModes = 0;
    if (pGeode->ShadowPtr)
       xfree(pGeode->ShadowPtr);
-   if (pGeode->AccelImageWriteBufferOffsets)
+
+   if (pGeode->AccelImageWriteBufferOffsets) {
       xfree(pGeode->AccelImageWriteBufferOffsets);
+      pGeode->AccelImageWriteBufferOffsets = 0x0;
+   }
+   /* free the allocated off screen area */
+   xf86FreeOffscreenArea(pGeode->AccelImgArea);
+   xf86FreeOffscreenArea(pGeode->CompressionArea);
 
-   GeodeUnmapMem(pScreenInfo);
+   GX1UnmapMem(pScreenInfo);
 
    pScreen->CloseScreen = pGeode->CloseScreen;
    return (*pScreen->CloseScreen) (scrnIndex, pScreen);
+
 }
 
 #ifdef DPMSExtension
 /*----------------------------------------------------------------------------
- * GeodeDPMSet.
+ * GX1DPMSet.
  *
  * Description	:This function sets geode into Power Management
  *               Signalling mode.				
@@ -2282,28 +1721,27 @@ GeodeCloseScreen(int scrnIndex, ScreenPtr pScreen)
 *----------------------------------------------------------------------------
 */
 static void
-GeodeDPMSSet(ScrnInfoPtr pScreenInfo, int mode, int flags)
+GX1DPMSSet(ScrnInfoPtr pScreenInfo, int mode, int flags)
 {
    GeodePtr pGeode;
 
    pGeode = GEODEPTR(pScreenInfo);
 
-   GeodeDebug(("GeodeDPMSSet!\n"));
+   GeodeDebug(("GX1DPMSSet!\n"));
 
    /* Check if we are actively controlling the display */
    if (!pScreenInfo->vtSema) {
-      ErrorF("GeodeDPMSSet called when we not controlling the VT!\n");
+      ErrorF("GX1DPMSSet called when we not controlling the VT!\n");
       return;
    }
    switch (mode) {
    case DPMSModeOn:
       /* Screen: On; HSync: On; VSync: On */
+      GFX(set_crt_enable(CRT_ENABLE));
 #if defined(STB_X)
-      Gal_set_crt_state(CRT_ENABLE);
       if (pGeode->Panel)
 	 Gal_pnl_powerup();
 #else
-      gfx_set_crt_enable(CRT_ENABLE);
       if (pGeode->Panel)
 	 Pnl_PowerUp();
 #endif /* STB_X */
@@ -2313,12 +1751,11 @@ GeodeDPMSSet(ScrnInfoPtr pScreenInfo, int mode, int flags)
 
    case DPMSModeStandby:
       /* Screen: Off; HSync: Off; VSync: On */
+      GFX(set_crt_enable(CRT_STANDBY));
 #if defined(STB_X)
-      Gal_set_crt_state(CRT_STANDBY);
       if (pGeode->Panel)
 	 Gal_pnl_powerdown();
 #else
-      gfx_set_crt_enable(CRT_STANDBY);
       if (pGeode->Panel)
 	 Pnl_PowerDown();
 #endif /* STB_X */
@@ -2328,12 +1765,11 @@ GeodeDPMSSet(ScrnInfoPtr pScreenInfo, int mode, int flags)
 
    case DPMSModeSuspend:
       /* Screen: Off; HSync: On; VSync: Off */
+      GFX(set_crt_enable(CRT_SUSPEND));
 #if defined(STB_X)
-      Gal_set_crt_state(CRT_SUSPEND);
       if (pGeode->Panel)
 	 Gal_pnl_powerdown();
 #else
-      gfx_set_crt_enable(CRT_SUSPEND);
       if (pGeode->Panel)
 	 Pnl_PowerDown();
 #endif /* STB_X */
@@ -2342,12 +1778,11 @@ GeodeDPMSSet(ScrnInfoPtr pScreenInfo, int mode, int flags)
       break;
    case DPMSModeOff:
       /* Screen: Off; HSync: Off; VSync: Off */
+      GFX(set_crt_enable(CRT_DISABLE));
 #if defined(STB_X)
-      Gal_set_crt_state(CRT_DISABLE);
       if (pGeode->Panel)
 	 Gal_pnl_powerdown();
 #else
-      gfx_set_crt_enable(CRT_DISABLE);
       if (pGeode->Panel)
 	 Pnl_PowerDown();
 #endif /* STB_X */
@@ -2359,7 +1794,7 @@ GeodeDPMSSet(ScrnInfoPtr pScreenInfo, int mode, int flags)
 #endif
 
 /*----------------------------------------------------------------------------
- * GeodeScreenInit.
+ * GX1ScreenInit.
  *
  * Description	:This function will be called at the each ofserver
  *   			 generation.				
@@ -2376,22 +1811,27 @@ GeodeDPMSSet(ScrnInfoPtr pScreenInfo, int mode, int flags)
 *----------------------------------------------------------------------------
 */
 static Bool
-GeodeScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
+GX1ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
 {
    ScrnInfoPtr pScreenInfo = xf86Screens[pScreen->myNum];
    GeodePtr pGeode;
    int i;
+   Bool Inited = FALSE;
    unsigned char *FBStart;
    unsigned int req_offscreenmem;
    int width, height, displayWidth;
    VisualPtr visual;
+   BoxRec AvailBox;
+   RegionRec OffscreenRegion;
 
-   GeodeDebug(("GeodeScreenInit!\n"));
+   DCount = 30;
 
+   GeodeDebug(("GX1ScreenInit!\n"));
    /* Get driver private */
-   pGeode = GeodeGetRec(pScreenInfo);
-   GeodeDebug(("GeodeScreenInit(0)!\n"));
+   pGeode = GX1GetRec(pScreenInfo);
+   GeodeDebug(("GX1ScreenInit(0)!\n"));
 
+#if !defined(STB_X)
    /*
     * * Allocate a vgaHWRec
     */
@@ -2400,114 +1840,123 @@ GeodeScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
    VGAHWPTR(pScreenInfo)->MapSize = 0x10000;	/* Standard 64k VGA window */
    if (!vgaHWMapMem(pScreenInfo))
       return FALSE;
+#endif
 
-   if (!GeodeMapMem(pScreenInfo))
+   if (!GX1MapMem(pScreenInfo))
       return FALSE;
 
+#if !defined(STB_X)
    vgaHWGetIOBase(VGAHWPTR(pScreenInfo));
-   pGeode->Pitch = GeodeCalculatePitchBytes(pScreenInfo);
+#endif
+
+   pGeode->Pitch = GX1CalculatePitchBytes(pScreenInfo->virtualX,
+					  pScreenInfo->bitsPerPixel);
 
    /* find the index to our operating mode the offsets are located */
-   for (i = 0; i < (sizeof(GeodeMemOffset) / sizeof(MemOffset)); i++) {
-      if ((pScreenInfo->virtualX == GeodeMemOffset[i].xres) &&
-	  (pScreenInfo->virtualY == GeodeMemOffset[i].yres) &&
-	  (pScreenInfo->bitsPerPixel == GeodeMemOffset[i].bpp)) {
+   for (i = 0; i < (int)((sizeof(GeodeMemOffset) / sizeof(MemOffset))); i++) {
+      if ((pScreenInfo->virtualX == (int)GeodeMemOffset[i].xres) &&
+	  (pScreenInfo->virtualY == (int)GeodeMemOffset[i].yres) &&
+	  (pScreenInfo->bitsPerPixel == (int)GeodeMemOffset[i].bpp)) {
 	 MemIndex = i;
 	 break;
       }
    }
    if (MemIndex == -1)			/* no match */
       return FALSE;
+
+   /* SET UP GRAPHICS MEMORY AVAILABLE FOR PIXMAP CACHE */
+   AvailBox.x1 = 0;
+   AvailBox.y1 = pScreenInfo->virtualY;
+   AvailBox.x2 = pScreenInfo->displayWidth;
+   AvailBox.y2 = (pGeode->FBSize / pGeode->Pitch);
+
    pGeode->CursorSize = 8 * 32;		/* 32 DWORDS */
 
-   /* Compute cursor buffer */
-   if (pGeode->Compression) {
-      pGeode->CursorStartOffset = GeodeMemOffset[MemIndex].CurOffset;
-   } else {
+   if (pGeode->HWCursor) {
+      /* Compute cursor buffer */
       /* Default cursor offset, end of the frame buffer */
       pGeode->CursorStartOffset = pGeode->FBSize - pGeode->CursorSize;
+      AvailBox.y2 -= 1;
    }
 
-   if (pGeode->HWCursor) {
-      if ((pGeode->CursorStartOffset + pGeode->CursorSize) > pGeode->FBSize) {
-	 /* Not enough memory for HW cursor disable it */
-	 pGeode->HWCursor = FALSE;
-	 pGeode->CursorSize = 0;
-	 DEBUGMSG(1, (scrnIndex, X_ERROR,
-		      "Not enough memory for HW cursor. HW cursor disabled.\n"));
-      } else {
-	 DEBUGMSG(1, (scrnIndex, X_PROBED,
-		      "HW cursor offset: 0x%08lX (%d bytes allocated)\n",
-		      pGeode->CursorStartOffset, pGeode->CursorSize));
-      }
-   } else {
-      pGeode->CursorSize = 0;
-   }
-
+   DEBUGMSG(1, (scrnIndex, X_PROBED,
+		"Memory manager initialized to (%d,%d) (%d,%d) %d %d\n",
+		AvailBox.x1, AvailBox.y1, AvailBox.x2, AvailBox.y2,
+		pGeode->Pitch, pScreenInfo->displayWidth));
    /* set the offscreen offset accordingly */
    if (pGeode->Compression) {
-      pGeode->OffscreenStartOffset =
-	    (GeodeMemOffset[MemIndex].OffScreenOffset + pGeode->Pitch - 1)
-	    & (~(pGeode->Pitch - 1));
-      pGeode->OffscreenSize = pGeode->FBSize - pGeode->OffscreenStartOffset;
-   } else {
-      pGeode->OffscreenStartOffset = pGeode->Pitch * pScreenInfo->virtualY;
-      pGeode->OffscreenSize = pGeode->FBSize -
-	    pGeode->OffscreenStartOffset - pGeode->CursorSize;
-   }
 
-   if (pGeode->OffscreenSize < 0)
-      pGeode->OffscreenSize = 0;
-   if ((pGeode->OffscreenStartOffset + pGeode->OffscreenSize) >
-       pGeode->FBSize) {
-      pGeode->OffscreenSize = 0;
-      DEBUGMSG(1, (scrnIndex, X_ERROR, "No offscreen memory available.\n"));
-   } else {
-      DEBUGMSG(1, (scrnIndex, X_PROBED,
-		   "Offscreen memory offset: 0x%08lX (0x%08lX bytes available)\n",
-		   pGeode->OffscreenStartOffset, pGeode->OffscreenSize));
+      pGeode->CBOffset = GeodeMemOffset[MemIndex].CBOffset;
+      pGeode->CBSize = GeodeMemOffset[MemIndex].CBSize - 16;
+      pGeode->CBPitch = GeodeMemOffset[MemIndex].CBPitch;
+
+      if ((pScreenInfo->virtualX == 1024) && (pScreenInfo->virtualY == 768)) {
+	 req_offscreenmem = pScreenInfo->virtualY * pGeode->CBPitch;
+	 req_offscreenmem += pGeode->Pitch - 1;
+	 req_offscreenmem /= pGeode->Pitch;
+	 pGeode->CBOffset = AvailBox.y1 * pGeode->Pitch;
+	 AvailBox.y1 += req_offscreenmem;
+      }
    }
+   DEBUGMSG(1, (scrnIndex, X_PROBED,
+		"Memory manager initialized to (%d,%d) (%d,%d)\n",
+		AvailBox.x1, AvailBox.y1, AvailBox.x2, AvailBox.y2));
 
-   /* XAA Image Write support needs two entire line buffers. */
-   req_offscreenmem = pGeode->NoOfImgBuffers * pGeode->Pitch;
-   pGeode->AccelImageWriteBufferOffsets = NULL;
-   if (req_offscreenmem > pGeode->OffscreenSize) {
-      DEBUGMSG(1, (scrnIndex, X_PROBED,
-		   "Offscreen memory not adequate for acceleration\n"));
-   } else {
-      pGeode->OffscreenSize -= req_offscreenmem;
-      pGeode->AccelImageWriteBufferOffsets =
-	    xalloc(sizeof(unsigned long) * pGeode->NoOfImgBuffers);
-
-      pGeode->AccelImageWriteBufferOffsets[0] = (unsigned char *)(((unsigned
-								    long)
-								   pGeode->
-								   FBBase) +
-								  pGeode->
-								  OffscreenStartOffset);
-
-      for (i = 1; i < pGeode->NoOfImgBuffers; i++) {
-	 pGeode->AccelImageWriteBufferOffsets[i] =
-	       pGeode->AccelImageWriteBufferOffsets[i - 1] + pGeode->Pitch;
+   if (!pGeode->NoAccel) {
+      if (pGeode->NoOfImgBuffers > 0) {
+	 if (pGeode->NoOfImgBuffers <= (AvailBox.y2 - AvailBox.y1)) {
+	    pGeode->AccelImageWriteBufferOffsets =
+		  xalloc(sizeof(unsigned long) * pGeode->NoOfImgBuffers);
+
+	    pGeode->AccelImageWriteBufferOffsets[0] =
+		  ((unsigned char *)pGeode->FBBase) +
+		  (AvailBox.y1 * pGeode->Pitch);
+
+	    for (i = 1; i < pGeode->NoOfImgBuffers; i++) {
+	       pGeode->AccelImageWriteBufferOffsets[i] =
+		     pGeode->AccelImageWriteBufferOffsets[i - 1] +
+		     pGeode->Pitch;
+	    }
+
+	    for (i = 0; i < pGeode->NoOfImgBuffers; i++) {
+	       DEBUGMSG(1, (scrnIndex, X_PROBED,
+			    "memory  %d %x\n", i,
+			    pGeode->AccelImageWriteBufferOffsets[i]));
+	    }
+	    AvailBox.y1 += pGeode->NoOfImgBuffers;
+	 } else {
+	    xf86DrvMsg(scrnIndex, X_ERROR,
+		       "Unable to reserve scanline area\n");
+	 }
       }
+      DEBUGMSG(1, (scrnIndex, X_PROBED,
+		   "Memory manager initialized to (%d,%d) (%d,%d)\n",
+		   AvailBox.x1, AvailBox.y1, AvailBox.x2, AvailBox.y2));
+
+      REGION_INIT(pScreen, &OffscreenRegion, &AvailBox, 2);
 
-      for (i = 0; i < pGeode->NoOfImgBuffers; i++) {
-	 DEBUGMSG(0, (scrnIndex, X_PROBED,
-		      "memory  %x %x\n", pGeode->FBBase,
-		      pGeode->AccelImageWriteBufferOffsets[i]));
+      if (!xf86InitFBManagerRegion(pScreen, &OffscreenRegion)) {
+	 xf86DrvMsg(scrnIndex, X_ERROR,
+		    "Memory manager initialization to (%d,%d) (%d,%d) failed\n",
+		    AvailBox.x1, AvailBox.y1, AvailBox.x2, AvailBox.y2);
+      } else {
+	 xf86DrvMsg(scrnIndex, X_INFO,
+		    "Memory manager initialized to (%d,%d) (%d,%d)\n",
+		    AvailBox.x1, AvailBox.y1, AvailBox.x2, AvailBox.y2);
       }
+      REGION_UNINIT(pScreen, &OffscreenRegion);
    }
 
    /* Initialise graphics mode */
-   if (!GeodeEnterGraphics(pScreen, pScreenInfo))
+   if (!GX1EnterGraphics(pScreen, pScreenInfo))
       return FALSE;
 
-   GeodeAdjustFrame(scrnIndex, pScreenInfo->frameX0, pScreenInfo->frameY0, 0);
-   GeodeDebug(("GeodeScreenInit(1)!\n"));
+   GX1AdjustFrame(scrnIndex, pScreenInfo->frameX0, pScreenInfo->frameY0, 0);
+   GeodeDebug(("GX1ScreenInit(1)!\n"));
 
    /* Reset visual list */
    miClearVisualTypes();
-   GeodeDebug(("GeodeScreenInit(2)!\n"));
+   GeodeDebug(("GX1ScreenInit(2)!\n"));
 
    /* Setup the visual we support */
    if (pScreenInfo->bitsPerPixel > 8) {
@@ -2525,11 +1974,9 @@ GeodeScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
 	 return FALSE;
       }
    }
-   GeodeDebug(("GeodeScreenInit(3)!\n"));
-
+   GeodeDebug(("GX1ScreenInit(3)!\n"));
    /* Set this for RENDER extension */
    miSetPixmapDepths();
-
    /* Call the framebuffer layer's ScreenInit function, and fill in other
     * * pScreen fields.
     */
@@ -2572,28 +2019,45 @@ GeodeScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
    }
 
    /* Initialise the framebuffer */
-   switch (pScreenInfo->depth) {
+   switch (pScreenInfo->bitsPerPixel) {
+#if CFB
    case 8:
+      Inited = cfbScreenInit(pScreen, FBStart, width, height,
+			     pScreenInfo->xDpi, pScreenInfo->yDpi,
+			     displayWidth);
+      break;
    case 16:
-      if (!fbScreenInit(pScreen, FBStart, width, height,
-			pScreenInfo->xDpi, pScreenInfo->yDpi,
-			displayWidth, pScreenInfo->bitsPerPixel))
-	 return FALSE;
+      Inited = cfb16ScreenInit(pScreen, FBStart, width, height,
+			       pScreenInfo->xDpi, pScreenInfo->yDpi,
+			       displayWidth);
+      break;
+
+#else
+   case 8:
+   case 16:
+      Inited = fbScreenInit(pScreen, FBStart, width, height,
+			    pScreenInfo->xDpi, pScreenInfo->yDpi,
+			    displayWidth, pScreenInfo->bitsPerPixel);
       break;
+#endif
    default:
-      DEBUGMSG(1, (scrnIndex, X_ERROR,
-		   "Internal error: invalid bpp (%d) "
-		   "in GeodeScreenInit. Geode only supports 8 and 16 bpp.\n",
-		   pScreenInfo->bitsPerPixel));
-      return FALSE;
+      xf86DrvMsg(scrnIndex, X_ERROR,
+		 "Internal error: invalid bpp (%d) in ScreenInit\n",
+		 pScreenInfo->bitsPerPixel);
+      Inited = FALSE;
+      break;
    }
-   GeodeDebug(("GeodeScreenInit(4)!\n"));
+   if (!Inited)
+      return FALSE;
+
+   GeodeDebug(("GX1ScreenInit(4)!\n"));
+
    xf86SetBlackWhitePixels(pScreen);
 
    if (!pGeode->ShadowFB && (!pGeode->TV_Overscan_On)) {
-      GeodeDGAInit(pScreen);
+      GX1DGAInit(pScreen);
    }
-   GeodeDebug(("GeodeScreenInit(5)!\n"));
+   GeodeDebug(("GX1ScreenInit(5)!\n"));
    if (pScreenInfo->bitsPerPixel > 8) {
       /* Fixup RGB ordering */
       visual = pScreen->visuals + pScreen->numVisuals;
@@ -2608,68 +2072,73 @@ GeodeScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
 	 }
       }
    }
-
+#if CFB
+#else
    /* must be after RGB ordering fixed */
    fbPictureInit(pScreen, 0, 0);
+#endif
 
-   GeodeDebug(("GeodeScreenInit(6)!\n"));
+   GeodeDebug(("GX1ScreenInit(6)!\n"));
    if (!pGeode->NoAccel) {
-      GeodeAccelInit(pScreen);
+      GX1AccelInit(pScreen);
    }
-   GeodeDebug(("GeodeScreenInit(7)!\n"));
+   GeodeDebug(("GX1ScreenInit(7)!\n"));
    miInitializeBackingStore(pScreen);
    xf86SetBackingStore(pScreen);
-   GeodeDebug(("GeodeScreenInit(8)!\n"));
+
+   GeodeDebug(("GX1ScreenInit(8)!\n"));
    /* Initialise software cursor */
    miDCInitialize(pScreen, xf86GetPointerScreenFuncs());
    /* Initialize HW cursor layer.
     * * Must follow software cursor initialization
     */
    if (pGeode->HWCursor) {
-      if (!GeodeHWCursorInit(pScreen))
-	 DEBUGMSG(1, (pScreenInfo->scrnIndex, X_ERROR,
-		      "Hardware cursor initialization failed\n"));
+      if (!GX1HWCursorInit(pScreen))
+	 xf86DrvMsg(pScreenInfo->scrnIndex, X_ERROR,
+		    "Hardware cursor initialization failed\n");
    }
-   GeodeDebug(("GeodeScreenInit(9)!\n"));
+   GeodeDebug(("GX1ScreenInit(9)!\n"));
+
    /* Setup default colourmap */
    if (!miCreateDefColormap(pScreen)) {
       return FALSE;
    }
-   GeodeDebug(("GeodeScreenInit(10)!\n"));
+
+   GeodeDebug(("GX1ScreenInit(10)!\n"));
    /* Initialize colormap layer.
     * * Must follow initialization of the default colormap
     */
    if (!xf86HandleColormaps(pScreen, 256, 8,
-			    GeodeLoadPalette, NULL,
+			    GX1LoadPalette, NULL,
 			    CMAP_PALETTED_TRUECOLOR |
 			    CMAP_RELOAD_ON_MODE_SWITCH)) {
       return FALSE;
    }
-   GeodeDebug(("GeodeScreenInit(11)!\n"));
+   GeodeDebug(("GX1ScreenInit(11)!\n"));
 
    if (pGeode->ShadowFB) {
-      RefreshAreaFuncPtr refreshArea = GeodeRefreshArea;
+      RefreshAreaFuncPtr refreshArea = GX1RefreshArea;
 
       if (pGeode->Rotate) {
 	 if (!pGeode->PointerMoved) {
 	    pGeode->PointerMoved = pScreenInfo->PointerMoved;
-	    pScreenInfo->PointerMoved = GeodePointerMoved;
+	    pScreenInfo->PointerMoved = GX1PointerMoved;
 	 }
 	 switch (pScreenInfo->bitsPerPixel) {
 	 case 8:
-	    refreshArea = GeodeRefreshArea8;
+	    refreshArea = GX1RefreshArea8;
 	    break;
 	 case 16:
-	    refreshArea = GeodeRefreshArea16;
+	    refreshArea = GX1RefreshArea16;
 	    break;
 	 }
       }
       ShadowFBInit(pScreen, refreshArea);
    }
 #ifdef DPMSExtension
-   xf86DPMSInit(pScreen, GeodeDPMSSet, 0);
+   xf86DPMSInit(pScreen, GX1DPMSSet, 0);
 #endif
-   GeodeDebug(("GeodeScreenInit(12)!\n"));
+   GeodeDebug(("GX1ScreenInit(12)!\n"));
 
    if (pGeode->TV_Overscan_On) {
       GeodeDebug(("pGeode->Pitch (%d)!\n", pGeode->Pitch));
@@ -2687,24 +2156,26 @@ GeodeScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
    }
    pScreenInfo->fbOffset = 0;
 
-   GeodeDebug(("GeodeScreenInit(13)!\n"));
-   GeodeInitVideo(pScreen);		/* needed for video */
+   GeodeDebug(("GX1ScreenInit(13)!\n"));
+   GX1InitVideo(pScreen);		/* needed for video */
    /* Wrap the screen's CloseScreen vector and set its
     * SaveScreen vector 
     */
    pGeode->CloseScreen = pScreen->CloseScreen;
-   pScreen->CloseScreen = GeodeCloseScreen;
-   pScreen->SaveScreen = GeodeSaveScreen;
-   GeodeDebug(("GeodeScreenInit(14)!\n"));
+   pScreen->CloseScreen = GX1CloseScreen;
+
+   pScreen->SaveScreen = GX1SaveScreen;
+   GeodeDebug(("GX1ScreenInit(14)!\n"));
    /* Report any unused options */
    if (serverGeneration == 1) {
       xf86ShowUnusedOptions(pScreenInfo->scrnIndex, pScreenInfo->options);
    }
+   GeodeDebug(("GX2ScreenInit(15)!\n"));
    return TRUE;
 }
 
 /*----------------------------------------------------------------------------
- * GeodeSwitchMode.
+ * GX1SwitchMode.
  *
  * Description	:This function will switches the screen mode
  *   			    				
@@ -2719,14 +2190,14 @@ GeodeScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
 *----------------------------------------------------------------------------
 */
 Bool
-GeodeSwitchMode(int scrnIndex, DisplayModePtr pMode, int flags)
+GX1SwitchMode(int scrnIndex, DisplayModePtr pMode, int flags)
 {
-   GeodeDebug(("GeodeSwitchMode!\n"));
-   return GeodeSetMode(xf86Screens[scrnIndex], pMode);
+   GeodeDebug(("GX1SwitchMode!\n"));
+   return GX1SetMode(xf86Screens[scrnIndex], pMode);
 }
 
 /*----------------------------------------------------------------------------
- * GeodeAdjustFrame.
+ * GX1AdjustFrame.
  *
  * Description	:This function is used to intiallize the start
  *				 address of the memory.
@@ -2741,13 +2212,13 @@ GeodeSwitchMode(int scrnIndex, DisplayModePtr pMode, int flags)
 *----------------------------------------------------------------------------
 */
 void
-GeodeAdjustFrame(int scrnIndex, int x, int y, int flags)
+GX1AdjustFrame(int scrnIndex, int x, int y, int flags)
 {
    ScrnInfoPtr pScreenInfo = xf86Screens[scrnIndex];
    GeodePtr pGeode;
    unsigned long offset;
 
-   pGeode = GeodeGetRec(pScreenInfo);
+   pGeode = GX1GetRec(pScreenInfo);
    offset = (unsigned long)y *(unsigned long)pGeode->Pitch;
 
    offset += x;
@@ -2758,7 +2229,7 @@ GeodeAdjustFrame(int scrnIndex, int x, int y, int flags)
 }
 
 /*----------------------------------------------------------------------------
- * GeodeEnterVT.
+ * GX1EnterVT.
  *
  * Description	:This is called when VT switching back to the X server
  *			
@@ -2772,14 +2243,14 @@ GeodeAdjustFrame(int scrnIndex, int x, int y, int flags)
 *----------------------------------------------------------------------------
 */
 static Bool
-GeodeEnterVT(int scrnIndex, int flags)
+GX1EnterVT(int scrnIndex, int flags)
 {
-   GeodeDebug(("GeodeEnterVT!\n"));
-   return GeodeEnterGraphics(NULL, xf86Screens[scrnIndex]);
+   GeodeDebug(("GX1EnterVT!\n"));
+   return GX1EnterGraphics(NULL, xf86Screens[scrnIndex]);
 }
 
 /*----------------------------------------------------------------------------
- * GeodeLeaveVT.
+ * GX1LeaveVT.
  *
  * Description	:This is called when VT switching  X server text mode.
  *			
@@ -2793,14 +2264,14 @@ GeodeEnterVT(int scrnIndex, int flags)
 *----------------------------------------------------------------------------
 */
 static void
-GeodeLeaveVT(int scrnIndex, int flags)
+GX1LeaveVT(int scrnIndex, int flags)
 {
-   GeodeDebug(("GeodeLeaveVT!\n"));
-   GeodeLeaveGraphics(xf86Screens[scrnIndex]);
+   GeodeDebug(("GX1LeaveVT!\n"));
+   GX1LeaveGraphics(xf86Screens[scrnIndex]);
 }
 
 /*----------------------------------------------------------------------------
- * GeodeFreeScreen.
+ * GX1FreeScreen.
  *
  * Description	:This is called to free any persistent data structures.
  *			
@@ -2814,16 +2285,19 @@ GeodeLeaveVT(int scrnIndex, int flags)
 *----------------------------------------------------------------------------
 */
 static void
-GeodeFreeScreen(int scrnIndex, int flags)
+GX1FreeScreen(int scrnIndex, int flags)
 {
-   GeodeDebug(("GeodeFreeScreen!\n"));
+   GeodeDebug(("GX1FreeScreen!\n"));
+#if !defined(STB_X)
+
    if (xf86LoaderCheckSymbol("vgaHWFreeHWRec"))
       vgaHWFreeHWRec(xf86Screens[scrnIndex]);
-   GeodeFreeRec(xf86Screens[scrnIndex]);
+#endif
+   GX1FreeRec(xf86Screens[scrnIndex]);
 }
 
 /*----------------------------------------------------------------------------
- * GeodeValidMode.
+ * GX1ValidMode.
  *
  * Description	:This function checks if a mode is suitable for selected
  *                   		chipset.
@@ -2839,20 +2313,22 @@ GeodeFreeScreen(int scrnIndex, int flags)
 *----------------------------------------------------------------------------
 */
 static int
-GeodeValidMode(int scrnIndex, DisplayModePtr pMode, Bool Verbose, int flags)
+GX1ValidMode(int scrnIndex, DisplayModePtr pMode, Bool Verbose, int flags)
 {
    ScrnInfoPtr pScreenInfo = xf86Screens[scrnIndex];
+   unsigned int total_memory_required;
    int ret = -1;
-   GeodePtr pGeode;
+   GeodePtr pGeode = GX1GetRec(pScreenInfo);
 
-   pGeode = GeodeGetRec(pScreenInfo);
-   DEBUGMSG(0, (0, X_NONE, "GeodeValidateMode: %dx%d %d %d\n",
+   DEBUGMSG(1, (0, X_NONE, "GeodeValidateMode: %dx%d %d %d\n",
 		pMode->CrtcHDisplay, pMode->CrtcVDisplay,
-		pScreenInfo->bitsPerPixel, GeodeGetRefreshRate(pMode)));
+		pScreenInfo->bitsPerPixel, GX1GetRefreshRate(pMode)));
+
    if (pGeode->TVSupport == TRUE) {
       if ((pGeode->TvParam.wWidth == pMode->CrtcHDisplay) &&
 	  (pGeode->TvParam.wHeight == pMode->CrtcVDisplay)) {
-	 DEBUGMSG(0, (0, X_NONE, "TV mode"));
+	 DEBUGMSG(1, (0, X_NONE, "TV mode\n"));
+
 #if defined(STB_X)
 	 Gal_is_tv_mode_supported(0, &(pGeode->TvParam), &ret);
 #else
@@ -2862,31 +2338,41 @@ GeodeValidMode(int scrnIndex, DisplayModePtr pMode, Bool Verbose, int flags)
 #endif
       }
    } else {
-      DEBUGMSG(0, (0, X_NONE, "CRT mode"));
+      DEBUGMSG(1, (0, X_NONE, "CRT mode\n"));
+
       if (pMode->Flags & V_INTERLACE)
 	 return MODE_NO_INTERLACE;
+
 #if defined(STB_X)
       Gal_is_display_mode_supported(pMode->CrtcHDisplay, pMode->CrtcVDisplay,
 				    pScreenInfo->bitsPerPixel,
-				    GeodeGetRefreshRate(pMode), &ret);
+				    GX1GetRefreshRate(pMode), &ret);
 #else
       ret = gfx_is_display_mode_supported(pMode->CrtcHDisplay,
 					  pMode->CrtcVDisplay,
 					  pScreenInfo->bitsPerPixel,
-					  GeodeGetRefreshRate(pMode));
+					  GX1GetRefreshRate(pMode));
 #endif /* STB_X */
    }
 
-   DEBUGMSG(0, (0, X_NONE, "ret = %d\n", ret));
-   if (ret == -1) {			/* mode not supported */
-      return MODE_NO_INTERLACE;
-   }
+   if (ret < 0)
+      return MODE_NOMODE;
+
+   total_memory_required = GX1CalculatePitchBytes(pMode->CrtcHDisplay,
+						  pScreenInfo->bitsPerPixel) *
+	 pMode->CrtcVDisplay;
+
+   DEBUGMSG(0, (0, X_NONE, "Total Mem %X %X",
+		total_memory_required, pGeode->FBSize));
+
+   if (total_memory_required > pGeode->FBSize)
+      return MODE_MEM;
 
    return MODE_OK;
 }
 
 /*----------------------------------------------------------------------------
- * GeodeLoadPalette.
+ * GX1LoadPalette.
  *
  * Description	:This function sets the  palette entry used for graphics data
  *
@@ -2904,9 +2390,8 @@ GeodeValidMode(int scrnIndex, DisplayModePtr pMode, Bool Verbose, int flags)
 */
 
 static void
-GeodeLoadPalette(ScrnInfoPtr pScreenInfo,
-		 int numColors, int *indizes, LOCO * colors,
-		 VisualPtr pVisual)
+GX1LoadPalette(ScrnInfoPtr pScreenInfo,
+	       int numColors, int *indizes, LOCO * colors, VisualPtr pVisual)
 {
    int i, index, color;
 
@@ -2915,14 +2400,15 @@ GeodeLoadPalette(ScrnInfoPtr pScreenInfo,
       color = (((unsigned long)(colors[index].red & 0xFF)) << 16) |
 	    (((unsigned long)(colors[index].green & 0xFF)) << 8) |
 	    ((unsigned long)(colors[index].blue & 0xFF));
-      DEBUGMSG(0, (0, X_NONE, "GeodeLoadPalette: %d %d %X\n",
+      DEBUGMSG(0, (0, X_NONE, "GX1LoadPalette: %d %d %X\n",
 		   numColors, index, color));
+
       GFX(set_display_palette_entry(index, color));
    }
 }
 
 static Bool
-GeodeMapMem(ScrnInfoPtr pScreenInfo)
+GX1MapMem(ScrnInfoPtr pScreenInfo)
 {
    GeodePtr pGeode = GEODEPTR(pScreenInfo);
 
@@ -2948,6 +2434,7 @@ GeodeMapMem(ScrnInfoPtr pScreenInfo)
 						    (unsigned int)
 						    gfx_get_vid_register_base
 						    (), 0x1000);
+   pGeode->FBSize = GetVideoMemSize();
    gfx_virt_fbptr =
 	 (unsigned char *)xf86MapVidMem(pScreenInfo->scrnIndex,
 					VIDMEM_FRAMEBUFFER,
@@ -2979,11 +2466,11 @@ GeodeMapMem(ScrnInfoPtr pScreenInfo)
  */
 
 static Bool
-GeodeUnmapMem(ScrnInfoPtr pScreenInfo)
+GX1UnmapMem(ScrnInfoPtr pScreenInfo)
 {
+#if !defined(STB_X)
    GeodePtr pGeode = GEODEPTR(pScreenInfo);
 
-#if !defined(STB_X)
    /* unmap all the memory map's */
    xf86UnMapVidMem(pScreenInfo->scrnIndex, gfx_virt_regptr, 0x9000);
    xf86UnMapVidMem(pScreenInfo->scrnIndex, gfx_virt_vidptr, 0x1000);
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/geode_shadow.c b/xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_gx1_shadow.c
index 750f97599..eb8ed8f59 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/geode_shadow.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_gx1_shadow.c
@@ -1,7 +1,8 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/geode_shadow.c,v 1.1 2002/10/11 14:32:59 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_gx1_shadow.c,v 1.2 2003/01/14 09:34:32 alanh Exp $ */
 /*
- * $Workfile: geode_shadow.c $
- * $Revision: 1.1.1.1 $
+ * $Workfile: nsc_gx1_shadow.c $
+ * $Revision: 1.2.2.1 $
+ * $Author: ldelgass $
  *
  * File Contents: Direct graphics display routines are implemented and 
  *                graphics rendering are all done in memory.
@@ -21,7 +22,7 @@
  * National Semiconductor Corporation licenses this software 
  * ("Software"):
  *
- * Geode Xfree frame buffer driver
+ * National Xfree frame buffer driver
  *
  * under one of the two following licenses, depending on how the 
  * Software is received by the Licensee.
@@ -37,7 +38,7 @@
  *
  * National Semiconductor Corporation Open Source License for 
  *
- * Geode Xfree frame buffer driver
+ * National Xfree frame buffer driver
  *
  * (BSD License with Export Notice)
  *
@@ -92,7 +93,7 @@
  *
  * National Semiconductor Corporation Gnu General Public License for 
  *
- * Geode Xfree frame buffer driver
+ * National Xfree frame buffer driver
  *
  * (GPL License with Export Notice)
  *
@@ -146,12 +147,19 @@
 #include "xf86_ansic.h"
 #include "xf86PciInfo.h"
 #include "xf86Pci.h"
-#include "geode.h"
+#include "nsc.h"
 #include "shadowfb.h"
 #include "servermd.h"
 
+void GX1RefreshArea(ScrnInfoPtr pScrn, int num, BoxPtr pbox);
+void GX1PointerMoved(int index, int x, int y);
+void GX1RefreshArea8(ScrnInfoPtr pScrn, int num, BoxPtr pbox);
+void GX1RefreshArea16(ScrnInfoPtr pScrn, int num, BoxPtr pbox);
+void GX1RefreshArea24(ScrnInfoPtr pScrn, int num, BoxPtr pbox);
+void GX1RefreshArea32(ScrnInfoPtr pScrn, int num, BoxPtr pbox);
+
 /*----------------------------------------------------------------------------
- * GeodeRefreshArea.
+ * GX1RefreshArea.
  *
  * Description	:This function  copies the memory to be displayed from the
  *               shadow pointer.
@@ -166,7 +174,7 @@
 *----------------------------------------------------------------------------
 */
 void
-GeodeRefreshArea(ScrnInfoPtr pScrn, int num, BoxPtr pbox)
+GX1RefreshArea(ScrnInfoPtr pScrn, int num, BoxPtr pbox)
 {
    GeodePtr pGeode = GEODEPTR(pScrn);
    int width, height, Bpp, FBPitch;
@@ -191,7 +199,7 @@ GeodeRefreshArea(ScrnInfoPtr pScrn, int num, BoxPtr pbox)
 }
 
 /*----------------------------------------------------------------------------
- * GeodePointerMoved.
+ * GX1PointerMoved.
  *
  * Description	:This function moves one screen memory from one area to other.
  *
@@ -206,7 +214,7 @@ GeodeRefreshArea(ScrnInfoPtr pScrn, int num, BoxPtr pbox)
 *----------------------------------------------------------------------------
 */
 void
-GeodePointerMoved(int index, int x, int y)
+GX1PointerMoved(int index, int x, int y)
 {
    ScrnInfoPtr pScrn = xf86Screens[index];
    GeodePtr pGeode = GEODEPTR(pScrn);
@@ -223,7 +231,7 @@ GeodePointerMoved(int index, int x, int y)
 }
 
 /*----------------------------------------------------------------------------
- * GeodeRefreshArea8.
+ * GX1RefreshArea8.
  *
  * Description	:This function  copies the memory to be displayed from the
  *                 shadow pointer by 8bpp.
@@ -238,15 +246,19 @@ GeodePointerMoved(int index, int x, int y)
 *----------------------------------------------------------------------------
 */
 void
-GeodeRefreshArea8(ScrnInfoPtr pScrn, int num, BoxPtr pbox)
+GX1RefreshArea8(ScrnInfoPtr pScrn, int num, BoxPtr pbox)
 {
    GeodePtr pGeode = GEODEPTR(pScrn);
-   int count, width, height, y1, y2, dstPitch, srcPitch;
+   int count, width, height, y1, y2, dstPitch, srcPitch, srcPitch2,
+	 srcPitch3, srcPitch4;
    CARD8 *dstPtr, *srcPtr, *src;
    CARD32 *dst;
 
    dstPitch = pScrn->displayWidth;
    srcPitch = -pGeode->Rotate * pGeode->ShadowPitch;
+   srcPitch2 = srcPitch * 2;
+   srcPitch3 = srcPitch * 3;
+   srcPitch4 = srcPitch * 4;
    while (num--) {
       width = pbox->x2 - pbox->x1;
       y1 = pbox->y1 & ~3;
@@ -268,8 +280,8 @@ GeodeRefreshArea8(ScrnInfoPtr pScrn, int num, BoxPtr pbox)
 	 count = height;
 	 while (count--) {
 	    *(dst++) = src[0] | (src[srcPitch] << 8) |
-		  (src[srcPitch * 2] << 16) | (src[srcPitch * 3] << 24);
-	    src += srcPitch * 4;
+		  (src[srcPitch2] << 16) | (src[srcPitch3] << 24);
+	    src += srcPitch4;
 	 }
 	 srcPtr += pGeode->Rotate;
 	 dstPtr += dstPitch;
@@ -279,7 +291,7 @@ GeodeRefreshArea8(ScrnInfoPtr pScrn, int num, BoxPtr pbox)
 }
 
 /*----------------------------------------------------------------------------
- * GeodeRefreshArea16.
+ * GX1RefreshArea16.
  *
  * Description	:This function  copies the memory to be displayed from the
  *               shadow pointer by 16bpp.
@@ -294,15 +306,16 @@ GeodeRefreshArea8(ScrnInfoPtr pScrn, int num, BoxPtr pbox)
 *----------------------------------------------------------------------------
 */
 void
-GeodeRefreshArea16(ScrnInfoPtr pScrn, int num, BoxPtr pbox)
+GX1RefreshArea16(ScrnInfoPtr pScrn, int num, BoxPtr pbox)
 {
    GeodePtr pGeode = GEODEPTR(pScrn);
-   int count, width, height, y1, y2, dstPitch, srcPitch;
+   int count, width, height, y1, y2, dstPitch, srcPitch, srcPitch2;
    CARD16 *dstPtr, *srcPtr, *src;
    CARD32 *dst;
 
    dstPitch = pScrn->displayWidth;
    srcPitch = -pGeode->Rotate * pGeode->ShadowPitch >> 1;
+   srcPitch2 = srcPitch * 2;
    while (num--) {
       width = pbox->x2 - pbox->x1;
       y1 = pbox->y1 & ~1;
@@ -326,7 +339,7 @@ GeodeRefreshArea16(ScrnInfoPtr pScrn, int num, BoxPtr pbox)
 	 count = height;
 	 while (count--) {
 	    *(dst++) = src[0] | (src[srcPitch] << 16);
-	    src += srcPitch * 2;
+	    src += srcPitch2;
 	 }
 	 srcPtr += pGeode->Rotate;
 	 dstPtr += dstPitch;
@@ -337,7 +350,7 @@ GeodeRefreshArea16(ScrnInfoPtr pScrn, int num, BoxPtr pbox)
 }
 
 /*----------------------------------------------------------------------------
- * GeodeRefreshArea24.
+ * GX1RefreshArea24.
  *
  * Description	:This function  copies the memory to be displayed from the
  *               shadow pointer by 24bpp.
@@ -352,15 +365,17 @@ GeodeRefreshArea16(ScrnInfoPtr pScrn, int num, BoxPtr pbox)
 *----------------------------------------------------------------------------
 */
 void
-GeodeRefreshArea24(ScrnInfoPtr pScrn, int num, BoxPtr pbox)
+GX1RefreshArea24(ScrnInfoPtr pScrn, int num, BoxPtr pbox)
 {
    GeodePtr pGeode = GEODEPTR(pScrn);
-   int count, width, height, y1, y2, dstPitch, srcPitch;
+   int count, width, height, y1, y2, dstPitch, srcPitch, srcPitch2, srcPitch3;
    CARD8 *dstPtr, *srcPtr, *src;
    CARD32 *dst;
 
    dstPitch = BitmapBytePad(pScrn->displayWidth * 24);
    srcPitch = -pGeode->Rotate * pGeode->ShadowPitch;
+   srcPitch2 = srcPitch * 2;
+   srcPitch3 = srcPitch * 3;
    while (num--) {
       width = pbox->x2 - pbox->x1;
       y1 = pbox->y1 & ~3;
@@ -383,12 +398,11 @@ GeodeRefreshArea24(ScrnInfoPtr pScrn, int num, BoxPtr pbox)
 	    dst[0] = src[0] | (src[1] << 8) | (src[2] << 16) |
 		  (src[srcPitch] << 24);
 	    dst[1] = src[srcPitch + 1] | (src[srcPitch + 2] << 8) |
-		  (src[srcPitch * 2] << 16) | (src[(srcPitch * 2) + 1] << 24);
-	    dst[2] = src[(srcPitch * 2) + 2] | (src[srcPitch * 3] << 8) |
-		  (src[(srcPitch * 3) + 1] << 16) |
-		  (src[(srcPitch * 3) + 2] << 24);
+		  (src[srcPitch2] << 16) | (src[srcPitch2 + 1] << 24);
+	    dst[2] = src[srcPitch2 + 2] | (src[srcPitch3] << 8) |
+		  (src[srcPitch3 + 1] << 16) | (src[srcPitch3 + 2] << 24);
 	    dst += 3;
-	    src += srcPitch * 4;
+	    src += srcPitch << 2;
 	 }
 	 srcPtr += pGeode->Rotate * 3;
 	 dstPtr += dstPitch;
@@ -398,7 +412,7 @@ GeodeRefreshArea24(ScrnInfoPtr pScrn, int num, BoxPtr pbox)
 }
 
 /*----------------------------------------------------------------------------
- * GeodeRefreshArea32.
+ * GX1RefreshArea32.
  *
  * Description	:This function  copies the memory to be displayed from the
  *                    shadow pointer by 32bpp.
@@ -413,7 +427,7 @@ GeodeRefreshArea24(ScrnInfoPtr pScrn, int num, BoxPtr pbox)
 *----------------------------------------------------------------------------
 */
 void
-GeodeRefreshArea32(ScrnInfoPtr pScrn, int num, BoxPtr pbox)
+GX1RefreshArea32(ScrnInfoPtr pScrn, int num, BoxPtr pbox)
 {
    GeodePtr pGeode = GEODEPTR(pScrn);
    int count, width, height, dstPitch, srcPitch;
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_gx1_video.c b/xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_gx1_video.c
new file mode 100644
index 000000000..61a4bd1bd
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_gx1_video.c
@@ -0,0 +1,1629 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_gx1_video.c,v 1.6 2003/02/21 16:51:09 alanh Exp $ */
+/*
+ * $Workfile: nsc_gx1_video.c $
+ * $Revision: 1.2.2.1 $
+ * $Author: ldelgass $
+ *
+ * File Contents: This file consists of main Xfree video supported routines.
+ *
+ * Project:       Geode Xfree Frame buffer device driver.
+ *
+ */
+
+/* 
+ * NSC_LIC_ALTERNATIVE_PREAMBLE
+ *
+ * Revision 1.0
+ *
+ * National Semiconductor Alternative GPL-BSD License
+ *
+ * National Semiconductor Corporation licenses this software 
+ * ("Software"):
+ *
+ * National Xfree frame buffer driver
+ *
+ * under one of the two following licenses, depending on how the 
+ * Software is received by the Licensee.
+ * 
+ * If this Software is received as part of the Linux Framebuffer or
+ * other GPL licensed software, then the GPL license designated 
+ * NSC_LIC_GPL applies to this Software; in all other circumstances 
+ * then the BSD-style license designated NSC_LIC_BSD shall apply.
+ *
+ * END_NSC_LIC_ALTERNATIVE_PREAMBLE */
+
+/* NSC_LIC_BSD
+ *
+ * National Semiconductor Corporation Open Source License for 
+ *
+ * National Xfree frame buffer driver
+ *
+ * (BSD License with Export Notice)
+ *
+ * Copyright (c) 1999-2001
+ * National Semiconductor Corporation.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met: 
+ *
+ *   * Redistributions of source code must retain the above copyright 
+ *     notice, this list of conditions and the following disclaimer. 
+ *
+ *   * Redistributions in binary form must reproduce the above 
+ *     copyright notice, this list of conditions and the following 
+ *     disclaimer in the documentation and/or other materials provided 
+ *     with the distribution. 
+ *
+ *   * Neither the name of the National Semiconductor Corporation nor 
+ *     the names of its contributors may be used to endorse or promote 
+ *     products derived from this software without specific prior 
+ *     written permission. 
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+ * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE,
+ * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE.
+ *
+ * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
+ * YOUR JURISDICTION. It is licensee's responsibility to comply with 
+ * any export regulations applicable in licensee's jurisdiction. Under 
+ * CURRENT (2001) U.S. export regulations this software 
+ * is eligible for export from the U.S. and can be downloaded by or 
+ * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
+ * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
+ * Syria, Sudan, Afghanistan and any other country to which the U.S. 
+ * has embargoed goods and services. 
+ *
+ * END_NSC_LIC_BSD */
+
+/* NSC_LIC_GPL
+ *
+ * National Semiconductor Corporation Gnu General Public License for 
+ *
+ * National Xfree frame buffer driver
+ *
+ * (GPL License with Export Notice)
+ *
+ * Copyright (c) 1999-2001
+ * National Semiconductor Corporation.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted under the terms of the GNU General 
+ * Public License as published by the Free Software Foundation; either 
+ * version 2 of the License, or (at your option) any later version  
+ *
+ * In addition to the terms of the GNU General Public License, neither 
+ * the name of the National Semiconductor Corporation nor the names of 
+ * its contributors may be used to endorse or promote products derived 
+ * from this software without specific prior written permission. 
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+ * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, 
+ * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE. See the GNU General Public License for more details. 
+ *
+ * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
+ * YOUR JURISDICTION. It is licensee's responsibility to comply with 
+ * any export regulations applicable in licensee's jurisdiction. Under 
+ * CURRENT (2001) U.S. export regulations this software 
+ * is eligible for export from the U.S. and can be downloaded by or 
+ * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
+ * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
+ * Syria, Sudan, Afghanistan and any other country to which the U.S. 
+ * has embargoed goods and services. 
+ *
+ * You should have received a copy of the GNU General Public License 
+ * along with this file; if not, write to the Free Software Foundation, 
+ * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 
+ *
+ * END_NSC_LIC_GPL */
+
+/* 
+ * Fixes & Extensions to support Y800 greyscale modes 
+ * Alan Hourihane <alanh@fairlite.demon.co.uk>
+ */
+
+#include "xf86.h"
+#include "xf86_OSproc.h"
+#include "xf86Resources.h"
+#include "xf86_ansic.h"
+#include "compiler.h"
+#include "xf86PciInfo.h"
+#include "xf86Pci.h"
+#include "xf86fbman.h"
+#include "regionstr.h"
+
+#include "nsc.h"
+#include "Xv.h"
+#include "xaa.h"
+#include "xaalocal.h"
+#include "dixstruct.h"
+#include "fourcc.h"
+#include "nsc_fourcc.h"
+
+#define OFF_DELAY 	200		/* milliseconds */
+#define FREE_DELAY 	60000
+
+#define OFF_TIMER 	0x01
+#define FREE_TIMER	0x02
+#define CLIENT_VIDEO_ON	0x04
+
+#define TIMER_MASK      (OFF_TIMER | FREE_TIMER)
+#define XV_PROFILE 0
+#define REINIT  1
+
+void GX1InitVideo(ScreenPtr pScreen);
+void GX1ResetVideo(ScrnInfoPtr pScrn);
+
+#ifndef XvExtension
+void
+GX1InitVideo(ScreenPtr pScreen)
+{
+}
+
+void
+GX1ResetVideo(ScrnInfoPtr pScrn)
+{
+}
+#else
+
+#define DBUF 0
+
+static XF86VideoAdaptorPtr GX1SetupImageVideo(ScreenPtr);
+static void GX1InitOffscreenImages(ScreenPtr);
+static void GX1StopVideo(ScrnInfoPtr, pointer, Bool);
+static int GX1SetPortAttribute(ScrnInfoPtr, Atom, INT32, pointer);
+static int GX1GetPortAttribute(ScrnInfoPtr, Atom, INT32 *, pointer);
+static void GX1QueryBestSize(ScrnInfoPtr, Bool,
+			     short, short, short, short, unsigned int *,
+			     unsigned int *, pointer);
+static int GX1PutImage(ScrnInfoPtr,
+		       short, short, short, short, short, short,
+		       short, short, int, unsigned char *, short, short,
+		       Bool, RegionPtr, pointer);
+static int GX1QueryImageAttributes(ScrnInfoPtr,
+				   int, unsigned short *, unsigned short *,
+				   int *, int *);
+
+static void GX1BlockHandler(int, pointer, pointer, pointer);
+
+void GX1SetVideoPosition(int, int, int, int,
+			 short, short, short, short, int, int, ScrnInfoPtr);
+
+extern void GX1AccelSync(ScrnInfoPtr pScreenInfo);
+
+#if !defined(STB_X)
+extern int DeltaX, DeltaY;
+#else
+int DeltaX, DeltaY;
+#endif
+
+#define MAKE_ATOM(a) MakeAtom(a, sizeof(a) - 1, TRUE)
+
+static Atom xvColorKey, xvColorKeyMode, xvFilter
+#if DBUF
+  , xvDoubleBuffer
+#endif
+  ;
+
+/*----------------------------------------------------------------------------
+ * GX1InitVideo
+ *
+ * Description	:This is the initialization routine.It creates a new video adapter
+ *				 and calls GX1SetupImageVideo to initialize the adaptor by filling
+ *				 XF86VideoAdaptorREc.Then it lists the existing adaptors and adds the 
+ *				 new one to it. Finally the list of XF86VideoAdaptorPtr pointers are
+ *				 passed to the xf86XVScreenInit().
+ *
+ * Parameters.
+ * ScreenPtr
+ *		pScreen	:Screen handler pointer having screen information.
+ *
+ * Returns		:none
+ *
+ * Comments		:none
+ *
+*----------------------------------------------------------------------------
+*/
+void
+GX1InitVideo(ScreenPtr pScreen)
+{
+   GeodePtr pGeode;
+
+   ScrnInfoPtr pScreenInfo = xf86Screens[pScreen->myNum];
+
+   pGeode = GEODEPTR(pScreenInfo);
+
+   if (!pGeode->NoAccel) {
+      ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
+      XF86VideoAdaptorPtr *adaptors, *newAdaptors = NULL;
+      XF86VideoAdaptorPtr newAdaptor = NULL;
+
+      int num_adaptors;
+
+      DEBUGMSG(0, (0, X_NONE, "InitVideo\n"));
+      newAdaptor = GX1SetupImageVideo(pScreen);
+      GX1InitOffscreenImages(pScreen);
+
+      num_adaptors = xf86XVListGenericAdaptors(pScrn, &adaptors);
+
+      if (newAdaptor) {
+	 if (!num_adaptors) {
+	    num_adaptors = 1;
+	    adaptors = &newAdaptor;
+	 } else {
+	    newAdaptors =		/* need to free this someplace */
+		  xalloc((num_adaptors + 1) * sizeof(XF86VideoAdaptorPtr *));
+	    if (newAdaptors) {
+	       memcpy(newAdaptors, adaptors, num_adaptors *
+		      sizeof(XF86VideoAdaptorPtr));
+	       newAdaptors[num_adaptors] = newAdaptor;
+	       adaptors = newAdaptors;
+	       num_adaptors++;
+	    }
+	 }
+      }
+
+      if (num_adaptors)
+	 xf86XVScreenInit(pScreen, adaptors, num_adaptors);
+
+      if (newAdaptors)
+	 xfree(newAdaptors);
+   }
+}
+
+/* client libraries expect an encoding */
+static XF86VideoEncodingRec DummyEncoding[1] = {
+   {
+    0,
+    "XV_IMAGE",
+    1024, 1024,
+    {1, 1}
+    }
+};
+
+#define NUM_FORMATS 4
+
+static XF86VideoFormatRec Formats[NUM_FORMATS] = {
+   {8, PseudoColor}, {15, TrueColor}, {16, TrueColor}, {24, TrueColor}
+};
+
+#if DBUF
+#define NUM_ATTRIBUTES 4
+#else
+#define NUM_ATTRIBUTES 3
+#endif
+
+static XF86AttributeRec Attributes[NUM_ATTRIBUTES] = {
+#if DBUF
+   {XvSettable | XvGettable, 0, 1, "XV_DOUBLE_BUFFER"},
+#endif
+   {XvSettable | XvGettable, 0, (1 << 24) - 1, "XV_COLORKEY"},
+   {XvSettable | XvGettable, 0, 1, "XV_FILTER"},
+   {XvSettable | XvGettable, 0, 1, "XV_COLORKEYMODE"}
+};
+
+#define NUM_IMAGES 7
+
+static XF86ImageRec Images[NUM_IMAGES] = {
+   XVIMAGE_UYVY,
+   XVIMAGE_YUY2,
+   XVIMAGE_Y2YU,
+   XVIMAGE_YVYU,
+   XVIMAGE_Y800,
+   XVIMAGE_I420,
+   XVIMAGE_YV12
+};
+
+typedef struct
+{
+   FBAreaPtr area;
+   FBLinearPtr linear;
+   RegionRec clip;
+   CARD32 colorKey;
+   CARD32 colorKeyMode;
+   CARD32 filter;
+   CARD32 videoStatus;
+   Time offTime;
+   Time freeTime;
+#if DBUF
+   Bool doubleBuffer;
+   int currentBuffer;
+#endif
+}
+GeodePortPrivRec, *GeodePortPrivPtr;
+
+#define GET_PORT_PRIVATE(pScrn) \
+	(GeodePortPrivPtr)((GEODEPTR(pScrn))->adaptor->pPortPrivates[0].ptr)
+
+/*----------------------------------------------------------------------------
+ * GX1SetColorKey
+ *
+ * Description	:This function reads the color key for the pallete and
+ *				  sets the video color key register.
+ *
+ * Parameters.
+ * ScreenInfoPtr
+ *		pScrn	:Screen  pointer having screen information.
+ *		pPriv	:Video port private data
+ *
+ * Returns		:none
+ *
+ * Comments		:none
+ *
+*----------------------------------------------------------------------------
+*/
+static INT32
+GX1SetColorkey(ScrnInfoPtr pScrn, GeodePortPrivPtr pPriv)
+{
+   int red, green, blue;
+   unsigned long key;
+
+   DEBUGMSG(0, (0, X_NONE, "ColorKey\n"));
+   switch (pScrn->depth) {
+   case 8:
+      GFX(get_display_palette_entry(pPriv->colorKey & 0xFF, &key));
+      red = ((key >> 16) & 0xFF);
+      green = ((key >> 8) & 0xFF);
+      blue = (key & 0xFF);
+      break;
+   default:
+      red = (pPriv->colorKey & pScrn->mask.red) >> pScrn->offset.red << (8 -
+									 pScrn->
+									 weight.
+									 red);
+      green =
+	    (pPriv->colorKey & pScrn->mask.green) >> pScrn->offset.
+	    green << (8 - pScrn->weight.green);
+      blue = (pPriv->colorKey & pScrn->mask.blue) >> pScrn->offset.
+	    blue << (8 - pScrn->weight.blue);
+      break;
+   }
+   GFX(set_video_color_key((blue | (green << 8) | (red << 16)), 0xFCFCFC,
+			   (pPriv->colorKeyMode == 0)));
+   REGION_EMPTY(pScrn->pScreen, &pPriv->clip);
+   return 0;
+}
+
+/*----------------------------------------------------------------------------
+ * GX1ResetVideo
+ *
+ * Description	: This function resets the video
+ *
+ * Parameters.
+ * ScreenInfoPtr
+ *		pScrn	:Screen  pointer having screen information.
+ *
+ * Returns		:None
+ *
+ * Comments		:none
+ *
+*----------------------------------------------------------------------------
+*/
+
+void
+GX1ResetVideo(ScrnInfoPtr pScrn)
+{
+   GeodePtr pGeode = GEODEPTR(pScrn);
+
+   if (!pGeode->NoAccel) {
+      GeodePortPrivPtr pPriv = pGeode->adaptor->pPortPrivates[0].ptr;
+
+      DEBUGMSG(0, (0, X_NONE, "ResetVideo\n"));
+      GX1AccelSync(pScrn);
+      GFX(set_video_palette(NULL));
+      GX1SetColorkey(pScrn, pPriv);
+      GFX(set_video_filter(pPriv->filter, pPriv->filter));
+   }
+}
+
+/*----------------------------------------------------------------------------
+ * GX1SetupImageVideo
+ *
+ * Description	: This function allocates space for a Videoadaptor and initializes
+ *				  the XF86VideoAdaptorPtr record.
+ *
+ * Parameters.
+ * ScreenPtr
+ *		pScreen	:Screen handler pointer having screen information.
+ *
+ * Returns		:XF86VideoAdaptorPtr :- pointer to the initialized video adaptor record.
+ *
+ * Comments		:none
+ *
+*----------------------------------------------------------------------------
+*/
+
+static XF86VideoAdaptorPtr
+GX1SetupImageVideo(ScreenPtr pScreen)
+{
+   ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
+   GeodePtr pGeode = GEODEPTR(pScrn);
+   XF86VideoAdaptorPtr adapt;
+   GeodePortPrivPtr pPriv;
+
+   DEBUGMSG(0, (0, X_NONE, "SetupImageVideo\n"));
+   if (!(adapt = xcalloc(1, sizeof(XF86VideoAdaptorRec) +
+			 sizeof(GeodePortPrivRec) + sizeof(DevUnion))))
+      return NULL;
+
+   adapt->type = XvWindowMask | XvInputMask | XvImageMask;
+   adapt->flags = VIDEO_OVERLAID_IMAGES | VIDEO_CLIP_TO_VIEWPORT;
+   adapt->name = "National Semiconductor Corporation";
+   adapt->nEncodings = 1;
+   adapt->pEncodings = DummyEncoding;
+   adapt->nFormats = NUM_FORMATS;
+   adapt->pFormats = Formats;
+   adapt->nPorts = 1;
+   adapt->pPortPrivates = (DevUnion *) (&adapt[1]);
+   pPriv = (GeodePortPrivPtr) (&adapt->pPortPrivates[1]);
+   adapt->pPortPrivates[0].ptr = (pointer) (pPriv);
+   adapt->pAttributes = Attributes;
+   adapt->nImages = NUM_IMAGES;
+   adapt->nAttributes = NUM_ATTRIBUTES;
+   adapt->pImages = Images;
+   adapt->PutVideo = NULL;
+   adapt->PutStill = NULL;
+   adapt->GetVideo = NULL;
+   adapt->GetStill = NULL;
+   adapt->StopVideo = GX1StopVideo;
+   adapt->SetPortAttribute = GX1SetPortAttribute;
+   adapt->GetPortAttribute = GX1GetPortAttribute;
+   adapt->QueryBestSize = GX1QueryBestSize;
+   adapt->PutImage = GX1PutImage;
+   adapt->QueryImageAttributes = GX1QueryImageAttributes;
+
+   pPriv->colorKey = pGeode->videoKey;
+   pPriv->colorKeyMode = 0;
+   pPriv->filter = 0;
+   pPriv->videoStatus = 0;
+#if DBUF
+   pPriv->doubleBuffer = TRUE;
+   pPriv->currentBuffer = 0;		/* init to first buffer */
+#endif
+
+   /* gotta uninit this someplace */
+   REGION_INIT(pScreen, &pPriv->clip, NullBox, 0);
+
+   pGeode->adaptor = adapt;
+
+   pGeode->BlockHandler = pScreen->BlockHandler;
+   pScreen->BlockHandler = GX1BlockHandler;
+
+   xvColorKey = MAKE_ATOM("XV_COLORKEY");
+   xvColorKeyMode = MAKE_ATOM("XV_COLORKEYMODE");
+   xvFilter = MAKE_ATOM("XV_FILTER");
+#if DBUF
+   xvDoubleBuffer = MAKE_ATOM("XV_DOUBLE_BUFFER");
+#endif
+
+   GX1ResetVideo(pScrn);
+
+   return adapt;
+}
+
+#if REINIT
+static Bool
+RegionsEqual(RegionPtr A, RegionPtr B)
+{
+   int *dataA, *dataB;
+   int num;
+
+   num = REGION_NUM_RECTS(A);
+   if (num != REGION_NUM_RECTS(B))
+      return FALSE;
+
+   if ((A->extents.x1 != B->extents.x1) ||
+       (A->extents.x2 != B->extents.x2) ||
+       (A->extents.y1 != B->extents.y1) || (A->extents.y2 != B->extents.y2))
+      return FALSE;
+
+   dataA = (int *)REGION_RECTS(A);
+   dataB = (int *)REGION_RECTS(B);
+
+   while (num--) {
+      if ((dataA[0] != dataB[0]) || (dataA[1] != dataB[1]))
+	 return FALSE;
+      dataA += 2;
+      dataB += 2;
+   }
+
+   return TRUE;
+}
+#endif
+
+/*----------------------------------------------------------------------------
+ * GX1StopVideo
+ *
+ * Description	:This function is used to stop input and output video
+ *
+ * Parameters.
+ * pScreenInfo
+ *		pScrn		:Screen handler pointer having screen information.
+ *		data		:Pointer to the video port's private data
+ *		exit		:Flag indicating whether the offscreen areas used for video
+ *					 to be deallocated or not.
+ * Returns		:none
+ *
+ * Comments		:none
+ *
+*----------------------------------------------------------------------------
+*/
+static void
+GX1StopVideo(ScrnInfoPtr pScrn, pointer data, Bool exit)
+{
+   GeodePortPrivPtr pPriv = (GeodePortPrivPtr) data;
+   GeodePtr pGeode = GEODEPTR(pScrn);
+
+   DEBUGMSG(0, (0, X_NONE, "StopVideo\n"));
+   REGION_EMPTY(pScrn->pScreen, &pPriv->clip);
+
+   GX1AccelSync(pScrn);
+   if (exit) {
+      if (pPriv->videoStatus & CLIENT_VIDEO_ON) {
+	 GFX(set_video_enable(0));
+      }
+      if (pPriv->area) {
+	 xf86FreeOffscreenArea(pPriv->area);
+	 pPriv->area = NULL;
+      }
+      pPriv->videoStatus = 0;
+      pGeode->OverlayON = FALSE;
+   } else {
+      if (pPriv->videoStatus & CLIENT_VIDEO_ON) {
+	 pPriv->videoStatus |= OFF_TIMER;
+	 pPriv->offTime = currentTime.milliseconds + OFF_DELAY;
+      }
+   }
+}
+
+/*----------------------------------------------------------------------------
+ * GX1SetPortAttribute
+ *
+ * Description	:This function is used to set the attributes of a port like colorkeymode,
+ *				  double buffer support and filter.
+ *
+ * Parameters.
+ * pScreenInfo
+ *		Ptr			:Screen handler pointer having screen information.
+ *		data		:Pointer to the video port's private data
+ *		attribute	:The port attribute to be set
+ *		value		:Value of the attribute to be set.  
+ *					 
+ * Returns		:Sucess if the attribute is supported, else BadMatch
+ *
+ * Comments		:none
+ *
+*----------------------------------------------------------------------------
+*/
+static int
+GX1SetPortAttribute(ScrnInfoPtr pScrn,
+		    Atom attribute, INT32 value, pointer data)
+{
+   GeodePortPrivPtr pPriv = (GeodePortPrivPtr) data;
+
+   GX1AccelSync(pScrn);
+   if (attribute == xvColorKey) {
+      pPriv->colorKey = value;
+      GX1SetColorkey(pScrn, pPriv);
+   }
+#if DBUF
+   else if (attribute == xvDoubleBuffer) {
+      if ((value < 0) || (value > 1))
+	 return BadValue;
+      pPriv->doubleBuffer = value;
+   }
+#endif
+   else if (attribute == xvColorKeyMode) {
+      pPriv->colorKeyMode = value;
+      GX1SetColorkey(pScrn, pPriv);
+   } else if (attribute == xvFilter) {
+      pPriv->filter = value;
+      GFX(set_video_filter(pPriv->filter, pPriv->filter));
+   } else
+      return BadMatch;
+
+   return Success;
+}
+
+/*----------------------------------------------------------------------------
+ * GX1GetPortAttribute
+ *
+ * Description	:This function is used to get the attributes of a port like hue,
+ *				 saturation,brightness or contrast.
+ *
+ * Parameters.
+ * pScreenInfo
+ *		Ptr			:Screen handler pointer having screen information.
+ *		data		:Pointer to the video port's private data
+ *		attribute	:The port attribute to be read
+ *		value		:Pointer to the value of the attribute to be read.  
+ *					 
+ * Returns		:Sucess if the attribute is supported, else BadMatch
+ *
+ * Comments		:none
+ *
+*----------------------------------------------------------------------------
+*/
+static int
+GX1GetPortAttribute(ScrnInfoPtr pScrn,
+		    Atom attribute, INT32 * value, pointer data)
+{
+   GeodePortPrivPtr pPriv = (GeodePortPrivPtr) data;
+
+   if (attribute == xvColorKey) {
+      *value = pPriv->colorKey;
+   }
+#if DBUF
+   else if (attribute == xvDoubleBuffer) {
+      *value = (pPriv->doubleBuffer) ? 1 : 0;
+   }
+#endif
+   else if (attribute == xvColorKeyMode) {
+      *value = pPriv->colorKeyMode;
+   } else if (attribute == xvFilter) {
+      *value = pPriv->filter;
+   } else
+      return BadMatch;
+
+   return Success;
+}
+
+/*----------------------------------------------------------------------------
+ * GX1QueryBestSize
+ *
+ * Description	:This function provides a way to query what the destination dimensions
+ *				 would end up being if they were to request that an area vid_w by vid_h
+ *               from the video stream be scaled to rectangle of drw_w by drw_h on 
+ *				 the screen.
+ *
+ * Parameters.
+ * ScreenInfoPtr
+ *		pScrn		:Screen handler pointer having screen information.
+ *		data		:Pointer to the video port's private data
+ *      vid_w,vid_h	:Width and height of the video data.
+ *		drw_w,drw_h :Width and height of the scaled rectangle.
+ *		p_w,p_h		:Width and height of the destination rectangle. 
+ *					 
+ * Returns		:None
+ *
+ * Comments		:None
+ *
+*----------------------------------------------------------------------------
+*/
+static void
+GX1QueryBestSize(ScrnInfoPtr pScrn,
+		 Bool motion,
+		 short vid_w, short vid_h,
+		 short drw_w, short drw_h,
+		 unsigned int *p_w, unsigned int *p_h, pointer data)
+{
+   DEBUGMSG(0, (0, X_NONE, "QueryBestSize\n"));
+   *p_w = drw_w;
+   *p_h = drw_h;
+
+   if (*p_w > 16384)
+      *p_w = 16384;
+}
+static void
+GX1CopyGreyscale(unsigned char *src,
+		 unsigned char *dst, int srcPitch, int dstPitch, int h, int w)
+{
+   int i;
+   unsigned char *src2 = src;
+   unsigned char *dst2 = dst;
+   unsigned char *dst3;
+   unsigned char *src3;
+
+   dstPitch <<= 1;
+
+   while (h--) {
+      dst3 = dst2;
+      src3 = src2;
+      for (i = 0; i < w; i++) {
+	 *dst3++ = *src3++;		/* Copy Y data */
+	 *dst3++ = 0x80;		/* Fill UV with 0x80 - greyscale */
+      }
+      src3 = src2;
+      for (i = 0; i < w; i++) {
+	 *dst3++ = *src3++;		/* Copy Y data */
+	 *dst3++ = 0x80;		/* Fill UV with 0x80 - greyscale */
+      }
+      dst2 += dstPitch;
+      src2 += srcPitch;
+   }
+}
+
+/*----------------------------------------------------------------------------
+ * GX1CopyData
+ *
+ * Description	: Copies data from src to destination
+ *
+ * Parameters.
+ *		src			: pointer to the source data
+ *		dst			: pointer to destination data
+ *		srcPitch	: pitch of the srcdata
+ *		dstPitch	: pitch of the destination data 
+ *		h & w		: height and width of source data
+ *					 
+ * Returns		:None
+ *
+ * Comments		:None
+ *
+*----------------------------------------------------------------------------
+*/
+
+static void
+GX1CopyData(unsigned char *src, unsigned char *dst,
+	    int srcPitch, int dstPitch, int h, int w)
+{
+   w <<= 1;
+   while (h--) {
+      memcpy(dst, src, w);
+      src += srcPitch;
+      dst += dstPitch;
+   }
+}
+
+static void
+GX1CopyMungedData(unsigned char *src1,
+		  unsigned char *src2,
+		  unsigned char *src3,
+		  unsigned char *dst1,
+		  int srcPitch, int srcPitch2, int dstPitch, int h, int w)
+{
+   CARD32 *dstCur = (CARD32 *) dst1;
+   CARD32 *dstNext = (CARD32 *) dst1;
+   int i, j, k, m, n;
+   CARD32 crcb;
+
+#if XV_PROFILE
+   long oldtime, newtime;
+#endif
+
+   DEBUGMSG(0, (0, X_NONE, "CopyMungedData\n"));
+   /* dstPitch is in byte count, but we write longs.
+    * so divide dstpitch by 4 
+    */
+   dstPitch >>= 2;
+   /* Width is in byte but video data is 16bit
+    */
+   w >>= 1;
+   /* We render 2 scanlines at one shot, handle the odd count */
+   m = h & 1;
+   /* decrement the height since we write 2 scans */
+   h -= 1;
+   /* we traverse by 2 bytes in src Y */
+   srcPitch <<= 1;
+#if XV_PROFILE
+   UpdateCurrentTime();
+   oldtime = currentTime.milliseconds;
+#endif
+
+   for (j = 0; j < h; j += 2) {
+      /* calc the next dest scan start */
+      dstNext = dstCur + dstPitch;
+      for (i = 0; i < w; i++) {
+	 /* crcb is same for the x pixel for 2 scans */
+	 crcb = (src3[i] << 8) | (src2[i] << 24);
+
+	 n = i << 1;
+
+	 /* write the first scan pixel DWORD */
+	 dstCur[i] = src1[n] | (src1[n + 1] << 16) | crcb;
+
+	 /* calc the offset of next pixel */
+	 k = n + srcPitch;
+
+	 /* write the 2nd scan pixel DWORD */
+	 dstNext[i] = src1[k] | (src1[k + 1] << 16) | crcb;
+      }
+      /* increment the offsets */
+
+      /* Y */
+      src1 += srcPitch;
+      /* crcb */
+      src2 += srcPitch2;
+      src3 += srcPitch2;
+      /* processed dest */
+      dstCur += (dstPitch << 1);
+   }
+
+   /* if any scans remaining */
+   if (m) {
+      for (i = 0, k = 0; i < w; i++, k += 2) {
+	 dstCur[i] = src1[k] | (src1[k + 1] << 16) |
+	       (src3[i] << 8) | (src2[i] << 24);
+      }
+   }
+#if XV_PROFILE
+   UpdateCurrentTime();
+   newtime = currentTime.milliseconds;
+   DEBUGMSG(1, (0, X_NONE, "CMD %d\n", newtime - oldtime));
+#endif
+}
+
+static FBAreaPtr
+GX1AllocateMemory(ScrnInfoPtr pScrn, FBAreaPtr area, int numlines)
+{
+   ScreenPtr pScreen = screenInfo.screens[pScrn->scrnIndex];
+   FBAreaPtr new_area;
+
+   if (area) {
+      if ((area->box.y2 - area->box.y1) >= numlines)
+	 return area;
+
+      if (xf86ResizeOffscreenArea(area, pScrn->displayWidth, numlines))
+	 return area;
+
+      xf86FreeOffscreenArea(area);
+   }
+
+   new_area = xf86AllocateOffscreenArea(pScreen, pScrn->displayWidth,
+					numlines, 0, NULL, NULL, NULL);
+
+   if (!new_area) {
+      int max_w, max_h;
+
+      xf86QueryLargestOffscreenArea(pScreen, &max_w, &max_h, 0,
+				    FAVOR_WIDTH_THEN_AREA, PRIORITY_EXTREME);
+
+      if ((max_w < pScrn->displayWidth) || (max_h < numlines))
+	 return NULL;
+
+      xf86PurgeUnlockedOffscreenAreas(pScreen);
+      new_area = xf86AllocateOffscreenArea(pScreen, pScrn->displayWidth,
+					   numlines, 0, NULL, NULL, NULL);
+   }
+   return new_area;
+}
+
+static BoxRec dstBox;
+static int srcPitch = 0, srcPitch2 = 0, dstPitch = 0;
+static INT32 Bx1, Bx2, By1, By2;
+static int top, left, npixels, nlines;
+static int offset, s1offset = 0, s2offset = 0, s3offset = 0;
+static unsigned char *dst_start;
+static int TVOverScanX;
+
+static Bool
+RegionsIntersect(BoxPtr pRcl1, BoxPtr pRcl2, BoxPtr pRclResult)
+{
+   pRclResult->x1 = max(pRcl1->x1, pRcl2->x1);
+   pRclResult->x2 = min(pRcl1->x2, pRcl2->x2);
+
+   if (pRclResult->x1 <= pRclResult->x2) {
+      pRclResult->y1 = max(pRcl1->y1, pRcl2->y1);
+      pRclResult->y2 = min(pRcl1->y2, pRcl2->y2);
+
+      if (pRclResult->y1 <= pRclResult->y2) {
+	 return (TRUE);
+      }
+   }
+
+   return (FALSE);
+}
+
+void
+GX1SetVideoPosition(int x, int y, int width, int height,
+		    short src_w, short src_h, short drw_w, short drw_h,
+		    int id, int offset, ScrnInfoPtr pScrn)
+{
+   GeodePtr pGeode = GEODEPTR(pScrn);
+   long xstart, ystart, xend, yend;
+   unsigned long lines = 0;
+   unsigned long y_extra = 0;
+   unsigned short crop = 0;
+   BoxRec ovly, display, result;
+
+#if defined(STB_X)
+   unsigned long startAddress = 0;
+#endif
+   xend = x + drw_w;
+   yend = y + drw_h;
+
+   /* Take care of panning when panel is present */
+
+#if defined(STB_X)
+   Gal_get_display_offset(&startAddress);
+   DeltaY = startAddress / pGeode->Pitch;
+   DeltaX = startAddress & (pGeode->Pitch - 1);
+   DeltaX /= (pScrn->bitsPerPixel >> 3);
+#endif
+
+   if (pGeode->Panel) {
+      ovly.x1 = x;
+      ovly.x2 = x + pGeode->video_dstw;
+      ovly.y1 = y;
+      ovly.y2 = y + pGeode->video_dsth;
+
+      display.x1 = DeltaX;
+      display.x2 = DeltaX + pGeode->FPBX;
+      display.y1 = DeltaY;
+      display.y2 = DeltaY + pGeode->FPBY;
+
+      x = xend = 0;
+
+      if (RegionsIntersect(&display, &ovly, &result)) {
+	 x = ovly.x1 - DeltaX;
+	 xend = ovly.x2 - DeltaX;
+	 y = ovly.y1 - DeltaY;
+	 yend = ovly.y2 - DeltaY;
+      }
+   }
+
+   /*  LEFT CLIPPING */
+
+   if (x < 0) {
+      if (TVOverScanX)
+	 xstart = TVOverScanX;
+      else
+	 xstart = 0;
+   } else {
+      if (TVOverScanX)
+	 xstart = TVOverScanX;
+      else
+	 xstart = (unsigned long)x;
+   }
+   drw_w -= (xstart - x);
+
+   /*  TOP CLIPPING */
+
+   if (y < 0) {
+      lines = (-y) * src_h / drw_h;
+      ystart = 0;
+      drw_h += y;
+      y_extra = lines * dstPitch;
+   } else {
+      ystart = y;
+      lines = 0;
+      y_extra = 0;
+   }
+
+   /* CLIP RIGHT AND BOTTOM FOR TV OVER SCAN */
+   if (pGeode->TV_Overscan_On) {
+      crop = (pGeode->TVOw + pGeode->TVOx);
+      if ((xstart + drw_w) > crop)
+	 xend = crop;
+      crop = (pGeode->TVOh + pGeode->TVOy);
+      if ((ystart + drw_h) > crop)
+	 yend = crop;
+   }
+   GFX(set_video_window(xstart, ystart, xend - xstart, yend - ystart));
+   GFX(set_video_offset(offset + y_extra));
+   GFX(set_video_left_crop(xstart - x));
+
+}
+
+/*----------------------------------------------------------------------------
+ * GX1DisplayVideo
+ *
+ * Description		: This function sets up the video registers for playing video
+ *					  It sets up the video format,width, height & position of the 
+ *					  video window ,video offsets( y,u,v) and video pitches(y,u,v)	
+ * Parameters.
+ *					 
+ * Returns		:None
+ *
+ * Comments		:None
+ *
+*----------------------------------------------------------------------------
+*/
+
+static void
+GX1DisplayVideo(ScrnInfoPtr pScrn,
+		int id,
+		int offset,
+		short width, short height,
+		int pitch,
+		int x1, int y1, int x2, int y2,
+		BoxPtr dstBox,
+		short src_w, short src_h, short drw_w, short drw_h)
+{
+   GeodePtr pGeode = GEODEPTR(pScrn);
+
+   /*    DisplayModePtr mode = pScrn->currentMode; */
+   GX1AccelSync(pScrn);
+
+   GFX(set_video_enable(1));
+
+   switch (id) {
+   case FOURCC_UYVY:			/* UYVY */
+      GFX(set_video_format(VIDEO_FORMAT_UYVY));
+      break;
+   case FOURCC_Y800:			/* Y800 - greyscale - we munge it! */
+   case FOURCC_YV12:
+   case FOURCC_I420:
+   case FOURCC_YUY2:			/* YUY2 */
+      GFX(set_video_format(VIDEO_FORMAT_YUYV));
+      break;
+   case FOURCC_Y2YU:			/* Y2YU */
+      GFX(set_video_format(VIDEO_FORMAT_Y2YU));
+      break;
+   case FOURCC_YVYU:			/* YVYU */
+      GFX(set_video_format(VIDEO_FORMAT_YVYU));
+      break;
+   }
+
+   if (pGeode->TV_Overscan_On) {
+      if (dstBox->x1 < 0)
+	 TVOverScanX = pGeode->TVOx;
+      else
+	 TVOverScanX = 0;
+      dstBox->x1 += pGeode->TVOx;
+      dstBox->y1 += pGeode->TVOy;
+   }
+   if (pGeode->Panel) {
+      pGeode->video_x = dstBox->x1;
+      pGeode->video_y = dstBox->y1;
+      pGeode->video_w = width;
+      pGeode->video_h = height;
+      pGeode->video_srcw = src_w;
+      pGeode->video_srch = src_h;
+      pGeode->video_dstw = drw_w;
+      pGeode->video_dsth = drw_h;
+      pGeode->video_offset = offset;
+      pGeode->video_id = id;
+      pGeode->video_scrnptr = pScrn;
+   }
+
+   GFX(set_video_size(width, height));
+   GFX(set_video_scale(width, height, drw_w, drw_h));
+   GX1SetVideoPosition(dstBox->x1, dstBox->y1, width, height, src_w, src_h,
+		       drw_w, drw_h, id, offset, pScrn);
+   GFX(set_color_space_YUV(0));
+}
+
+/*----------------------------------------------------------------------------
+ * GX1PutImage	: This function writes a single frame of video into a drawable.
+ *		The position and size of the source rectangle is specified by src_x,src_y,
+ *		src_w and src_h. This data is stored in a system memory buffer at buf.  
+ *		The position and size of the destination rectangle is specified by drw_x,
+ *      drw_y,drw_w,drw_h.The data is in the format indicated by the image descriptor 
+ *		and represents a source of size width by height.  If sync is TRUE the driver 
+ *		should not return from this function until it is through reading the data from 
+ *		buf.  Returning when sync is TRUE indicates that it is safe for the data at buf
+ *		to be replaced,freed, or modified.
+ *
+ *
+ * Description		: 
+ * Parameters.
+ *					 
+ * Returns		:None
+ *
+ * Comments		:None
+ *
+*----------------------------------------------------------------------------
+*/
+
+static int
+GX1PutImage(ScrnInfoPtr pScrn,
+	    short src_x, short src_y,
+	    short drw_x, short drw_y,
+	    short src_w, short src_h,
+	    short drw_w, short drw_h,
+	    int id, unsigned char *buf,
+	    short width, short height,
+	    Bool sync, RegionPtr clipBoxes, pointer data)
+{
+   GeodePortPrivPtr pPriv = (GeodePortPrivPtr) data;
+   GeodePtr pGeode = GEODEPTR(pScrn);
+   int pitch, new_h;
+
+#if REINIT
+   BOOL ReInitVideo = FALSE;
+#endif
+
+#if XV_PROFILE
+   long oldtime, newtime;
+
+   UpdateCurrentTime();
+   oldtime = currentTime.milliseconds;
+#endif
+
+#if REINIT
+/* update cliplist */
+   if (!RegionsEqual(&pPriv->clip, clipBoxes)) {
+      ReInitVideo = TRUE;
+   }
+   if (ReInitVideo) {
+      DEBUGMSG(1, (0, X_NONE, "Regional Not Equal - Init\n"));
+#endif
+
+      if (drw_w > 16384)
+	 drw_w = 16384;
+
+      /* Clip */
+      Bx1 = src_x;
+      Bx2 = src_x + src_w;
+      By1 = src_y;
+      By2 = src_y + src_h;
+
+      if ((Bx1 >= Bx2) || (By1 >= By2))
+	 return Success;
+
+      dstBox.x1 = drw_x;
+      dstBox.x2 = drw_x + drw_w;
+      dstBox.y1 = drw_y;
+      dstBox.y2 = drw_y + drw_h;
+
+      dstBox.x1 -= pScrn->frameX0;
+      dstBox.x2 -= pScrn->frameX0;
+      dstBox.y1 -= pScrn->frameY0;
+      dstBox.y2 -= pScrn->frameY0;
+
+      pitch = pScrn->bitsPerPixel * pScrn->displayWidth >> 3;
+
+      dstPitch = ((width << 1) + 3) & ~3;
+
+      switch (id) {
+      case FOURCC_YV12:
+      case FOURCC_I420:
+	 srcPitch = (width + 3) & ~3;	/* of luma */
+	 s2offset = srcPitch * height;
+	 srcPitch2 = ((width >> 1) + 3) & ~3;
+	 s3offset = (srcPitch2 * (height >> 1)) + s2offset;
+	 break;
+      case FOURCC_UYVY:
+      case FOURCC_YUY2:
+      case FOURCC_Y800:
+      default:
+	 srcPitch = (width << 1);
+	 break;
+      }
+
+      /* Find how many pitch scanlines required to store the data */
+      new_h = ((dstPitch * height) + pitch - 1) / pitch;
+
+#if DBUF
+      if (pPriv->doubleBuffer)
+	 new_h <<= 1;
+#endif
+
+      if (!(pPriv->area = GX1AllocateMemory(pScrn, pPriv->area, new_h)))
+	 return BadAlloc;
+
+      /* copy data */
+      top = By1;
+      left = Bx1 & ~1;
+      npixels = ((Bx2 + 1) & ~1) - left;
+
+      switch (id) {
+      case FOURCC_YV12:
+      case FOURCC_I420:
+	 {
+	    int tmp;
+
+	    top &= ~1;
+	    offset = (pPriv->area->box.y1 * pitch) + (top * dstPitch);
+
+#if DBUF
+	    if (pPriv->doubleBuffer && pPriv->currentBuffer)
+	       offset += (new_h >> 1) * pitch;
+#endif
+
+	    dst_start = pGeode->FBBase + offset + left;
+	    tmp = ((top >> 1) * srcPitch2) + (left >> 1);
+	    s2offset += tmp;
+	    s3offset += tmp;
+	    if (id == FOURCC_I420) {
+	       tmp = s2offset;
+	       s2offset = s3offset;
+	       s3offset = tmp;
+	    }
+	    nlines = ((By2 + 1) & ~1) - top;
+	 }
+	 break;
+
+      case FOURCC_UYVY:
+      case FOURCC_YUY2:
+      case FOURCC_Y800:
+      default:
+	 left <<= 1;
+	 buf += (top * srcPitch) + left;
+	 nlines = By2 - top;
+	 offset = (pPriv->area->box.y1 * pitch) + (top * dstPitch);
+
+#if DBUF
+	 if (pPriv->doubleBuffer && pPriv->currentBuffer)
+	    offset += (new_h >> 1) * pitch;
+#endif
+
+	 dst_start = pGeode->FBBase + offset + left;
+	 break;
+      }
+      s1offset = (top * srcPitch) + left;
+
+#if REINIT
+      /* update cliplist */
+      REGION_COPY(pScreen, &pPriv->clip, clipBoxes);
+      if (pPriv->colorKeyMode == 0) {
+	 /* draw these */
+	 XAAFillSolidRects(pScrn, pPriv->colorKey, GXcopy, ~0,
+			   REGION_NUM_RECTS(clipBoxes),
+			   REGION_RECTS(clipBoxes));
+      }
+      GX1DisplayVideo(pScrn, id, offset, width, height, dstPitch,
+		      Bx1, By1, Bx2, By2, &dstBox, src_w, src_h, drw_w,
+		      drw_h);
+   }
+#endif
+
+   switch (id) {
+
+   case FOURCC_Y800:
+      GX1CopyGreyscale(buf, dst_start, srcPitch, dstPitch, nlines, npixels);
+      break;
+   case FOURCC_YV12:
+   case FOURCC_I420:
+      GX1CopyMungedData(buf + s1offset, buf + s2offset,
+			buf + s3offset, dst_start, srcPitch, srcPitch2,
+			dstPitch, nlines, npixels);
+      break;
+   case FOURCC_UYVY:
+   case FOURCC_YUY2:
+   default:
+      GX1CopyData(buf, dst_start, srcPitch, dstPitch, nlines, npixels);
+      break;
+   }
+#if !REINIT
+   /* update cliplist */
+   REGION_COPY(pScreen, &pPriv->clip, clipBoxes);
+   if (pPriv->colorKeyMode == 0) {
+      /* draw these */
+      xf86XVFillKeyHelper(pScrn->pScreen, pPriv->colorKey, clipBoxes);
+   }
+   GX1DisplayVideo(pScrn, id, offset, width, height, dstPitch,
+		   Bx1, By1, Bx2, By2, &dstBox, src_w, src_h, drw_w, drw_h);
+#endif
+
+#if XV_PROFILE
+   UpdateCurrentTime();
+   newtime = currentTime.milliseconds;
+   DEBUGMSG(1, (0, X_NONE, "PI %d\n", newtime - oldtime));
+#endif
+
+#if DBUF
+   pPriv->currentBuffer ^= 1;
+#endif
+
+   pPriv->videoStatus = CLIENT_VIDEO_ON;
+   pGeode->OverlayON = TRUE;
+   return Success;
+}
+
+/*----------------------------------------------------------------------------
+ * GX1QueryImageAttributes
+ *
+ * Description	:This function is called to let the driver specify how data
+ *				 for a particular image of size width by height should be 
+ *				 stored. 		
+ *
+ * Parameters.
+ * pScreenInfo
+ *		Ptr			:Screen handler pointer having screen information.
+ *		id			:Id for the video format
+ *		width		:width  of the image (can be modified by the driver)  
+ *		height		:height of the image (can be modified by the driver)  
+ * Returns		: Size of the memory required for storing this image
+ *
+ * Comments		:None
+ *
+*----------------------------------------------------------------------------
+*/
+static int
+GX1QueryImageAttributes(ScrnInfoPtr pScrn,
+			int id,
+			unsigned short *w, unsigned short *h,
+			int *pitches, int *offsets)
+{
+   int size;
+   int tmp;
+
+   DEBUGMSG(0, (0, X_NONE, "QueryImageAttributes %X\n", id));
+
+   if (*w > 1024)
+      *w = 1024;
+   if (*h > 1024)
+      *h = 1024;
+
+   *w = (*w + 1) & ~1;
+   if (offsets)
+      offsets[0] = 0;
+
+   switch (id) {
+   case FOURCC_YV12:
+   case FOURCC_I420:
+      *h = (*h + 1) & ~1;
+      size = (*w + 3) & ~3;
+      if (pitches)
+	 pitches[0] = size;
+      size *= *h;
+      if (offsets)
+	 offsets[1] = size;
+      tmp = ((*w >> 1) + 3) & ~3;
+      if (pitches)
+	 pitches[1] = pitches[2] = tmp;
+      tmp *= (*h >> 1);
+      size += tmp;
+      if (offsets)
+	 offsets[2] = size;
+      size += tmp;
+      break;
+   case FOURCC_UYVY:
+   case FOURCC_YUY2:
+   case FOURCC_Y800:
+   default:
+      size = *w << 1;
+      if (pitches)
+	 pitches[0] = size;
+      size *= *h;
+      break;
+   }
+   return size;
+}
+
+static void
+GX1BlockHandler(int i, pointer blockData, pointer pTimeout, pointer pReadmask)
+{
+   ScreenPtr pScreen = screenInfo.screens[i];
+   ScrnInfoPtr pScrn = xf86Screens[i];
+   GeodePtr pGeode = GEODEPTR(pScrn);
+   GeodePortPrivPtr pPriv = GET_PORT_PRIVATE(pScrn);
+
+   DEBUGMSG(0, (0, X_NONE, "BlockHandler\n"));
+   pScreen->BlockHandler = pGeode->BlockHandler;
+   (*pScreen->BlockHandler) (i, blockData, pTimeout, pReadmask);
+   pScreen->BlockHandler = GX1BlockHandler;
+
+   GX1AccelSync(pScrn);
+   if (pPriv->videoStatus & TIMER_MASK) {
+      UpdateCurrentTime();
+      if (pPriv->videoStatus & OFF_TIMER) {
+	 if (pPriv->offTime < currentTime.milliseconds) {
+	    GFX(set_video_enable(0));
+	    pPriv->videoStatus = FREE_TIMER;
+	    pPriv->freeTime = currentTime.milliseconds + FREE_DELAY;
+	 }
+      } else {				/* FREE_TIMER */
+	 if (pPriv->freeTime < currentTime.milliseconds) {
+	    if (pPriv->area) {
+	       xf86FreeOffscreenArea(pPriv->area);
+	       pPriv->area = NULL;
+	    }
+	    pPriv->videoStatus = 0;
+	 }
+      }
+   }
+}
+
+/****************** Offscreen stuff ***************/
+
+typedef struct
+{
+   FBAreaPtr area;
+   FBLinearPtr linear;
+   Bool isOn;
+}
+OffscreenPrivRec, *OffscreenPrivPtr;
+
+/*----------------------------------------------------------------------------
+ * GX1AllocateSurface
+ *
+ * Description	:This function allocates an area of w by h in the offscreen
+ * Parameters.
+ * ScreenPtr
+ *		pScreen	:Screen handler pointer having screen information.
+ * 
+ * Returns		:None
+ *
+ * Comments		:None
+ *
+*----------------------------------------------------------------------------
+*/
+
+static int
+GX1AllocateSurface(ScrnInfoPtr pScrn,
+		   int id,
+		   unsigned short w, unsigned short h, XF86SurfacePtr surface)
+{
+   FBAreaPtr area;
+   int pitch, fbpitch, numlines;
+   OffscreenPrivPtr pPriv;
+
+   DEBUGMSG(0, (0, X_NONE, "AllocateSurface %x\n", id));
+   if ((w > 1024) || (h > 1024))
+      return BadAlloc;
+
+   w = (w + 1) & ~1;
+   pitch = ((w << 1) + 15) & ~15;
+   fbpitch = pScrn->bitsPerPixel * pScrn->displayWidth >> 3;
+   numlines = ((pitch * h) + fbpitch - 1) / fbpitch;
+
+   if (!(area = GX1AllocateMemory(pScrn, NULL, numlines)))
+      return BadAlloc;
+
+   surface->width = w;
+   surface->height = h;
+
+   if (!(surface->pitches = xalloc(sizeof(int))))
+      return BadAlloc;
+   if (!(surface->offsets = xalloc(sizeof(int)))) {
+      xfree(surface->pitches);
+      return BadAlloc;
+   }
+   if (!(pPriv = xalloc(sizeof(OffscreenPrivRec)))) {
+      xfree(surface->pitches);
+      xfree(surface->offsets);
+      return BadAlloc;
+   }
+
+   pPriv->area = area;
+   pPriv->isOn = FALSE;
+
+   surface->pScrn = pScrn;
+   surface->id = id;
+   surface->pitches[0] = pitch;
+   surface->offsets[0] = area->box.y1 * fbpitch;
+   surface->devPrivate.ptr = (pointer) pPriv;
+
+   return Success;
+}
+
+static int
+GX1StopSurface(XF86SurfacePtr surface)
+{
+   OffscreenPrivPtr pPriv = (OffscreenPrivPtr) surface->devPrivate.ptr;
+
+   if (pPriv->isOn) {
+      pPriv->isOn = FALSE;
+   }
+
+   return Success;
+}
+
+static int
+GX1FreeSurface(XF86SurfacePtr surface)
+{
+   OffscreenPrivPtr pPriv = (OffscreenPrivPtr) surface->devPrivate.ptr;
+
+   DEBUGMSG(0, (0, X_NONE, "FreeSurface\n"));
+
+   if (pPriv->isOn)
+      GX1StopSurface(surface);
+   xf86FreeOffscreenArea(pPriv->area);
+   xfree(surface->pitches);
+   xfree(surface->offsets);
+   xfree(surface->devPrivate.ptr);
+
+   return Success;
+}
+
+static int
+GX1GetSurfaceAttribute(ScrnInfoPtr pScrn, Atom attribute, INT32 * value)
+{
+   return GX1GetPortAttribute(pScrn, attribute, value,
+			      (pointer) (GET_PORT_PRIVATE(pScrn)));
+}
+
+static int
+GX1SetSurfaceAttribute(ScrnInfoPtr pScrn, Atom attribute, INT32 value)
+{
+   return GX1SetPortAttribute(pScrn, attribute, value,
+			      (pointer) (GET_PORT_PRIVATE(pScrn)));
+}
+
+static int
+GX1DisplaySurface(XF86SurfacePtr surface,
+		  short src_x, short src_y,
+		  short drw_x, short drw_y,
+		  short src_w, short src_h,
+		  short drw_w, short drw_h, RegionPtr clipBoxes)
+{
+   OffscreenPrivPtr pPriv = (OffscreenPrivPtr) surface->devPrivate.ptr;
+   ScrnInfoPtr pScrn = surface->pScrn;
+   GeodePortPrivPtr portPriv = GET_PORT_PRIVATE(pScrn);
+   INT32 x1, y1, x2, y2;
+   BoxRec dstBox;
+
+   DEBUGMSG(0, (0, X_NONE, "DisplaySuface\n"));
+   x1 = src_x;
+   x2 = src_x + src_w;
+   y1 = src_y;
+   y2 = src_y + src_h;
+
+   dstBox.x1 = drw_x;
+   dstBox.x2 = drw_x + drw_w;
+   dstBox.y1 = drw_y;
+   dstBox.y2 = drw_y + drw_h;
+
+   if ((x1 >= x2) || (y1 >= y2))
+      return Success;
+
+   dstBox.x1 -= pScrn->frameX0;
+   dstBox.x2 -= pScrn->frameX0;
+   dstBox.y1 -= pScrn->frameY0;
+   dstBox.y2 -= pScrn->frameY0;
+
+   xf86XVFillKeyHelper(pScrn->pScreen, portPriv->colorKey, clipBoxes);
+
+   GX1DisplayVideo(pScrn, surface->id, surface->offsets[0],
+		   surface->width, surface->height, surface->pitches[0],
+		   x1, y1, x2, y2, &dstBox, src_w, src_h, drw_w, drw_h);
+
+   pPriv->isOn = TRUE;
+   if (portPriv->videoStatus & CLIENT_VIDEO_ON) {
+      REGION_EMPTY(pScrn->pScreen, &portPriv->clip);
+      UpdateCurrentTime();
+      portPriv->videoStatus = FREE_TIMER;
+      portPriv->freeTime = currentTime.milliseconds + FREE_DELAY;
+   }
+
+   return Success;
+}
+
+/*----------------------------------------------------------------------------
+ * GX1InitOffscreenImages
+ *
+ * Description	:This function sets up the offscreen memory management.It fills 
+ *				 in the XF86OffscreenImagePtr structure with functions to handle
+ *				 offscreen memory operations. 	
+ *
+ * Parameters.
+ * ScreenPtr
+ *		pScreen	:Screen handler pointer having screen information.
+ * 
+ * Returns		: None
+ *
+ * Comments		:None
+ *
+*----------------------------------------------------------------------------
+*/
+static void
+GX1InitOffscreenImages(ScreenPtr pScreen)
+{
+   XF86OffscreenImagePtr offscreenImages;
+
+   DEBUGMSG(0, (0, X_NONE, "InitOffscreenImages\n"));
+   /* need to free this someplace */
+   if (!(offscreenImages = xalloc(sizeof(XF86OffscreenImageRec))))
+      return;
+
+   offscreenImages[0].image = &Images[0];
+   offscreenImages[0].flags = VIDEO_OVERLAID_IMAGES | VIDEO_CLIP_TO_VIEWPORT;
+   offscreenImages[0].alloc_surface = GX1AllocateSurface;
+   offscreenImages[0].free_surface = GX1FreeSurface;
+   offscreenImages[0].display = GX1DisplaySurface;
+   offscreenImages[0].stop = GX1StopSurface;
+   offscreenImages[0].setAttribute = GX1SetSurfaceAttribute;
+   offscreenImages[0].getAttribute = GX1GetSurfaceAttribute;
+   offscreenImages[0].max_width = 1024;
+   offscreenImages[0].max_height = 1024;
+   offscreenImages[0].num_attributes = NUM_ATTRIBUTES;
+   offscreenImages[0].attributes = Attributes;
+
+   xf86XVRegisterOffscreenImages(pScreen, offscreenImages, 1);
+}
+
+#endif /* !XvExtension */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_gx2_accel.c b/xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_gx2_accel.c
new file mode 100644
index 000000000..c09882a75
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_gx2_accel.c
@@ -0,0 +1,2302 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_gx2_accel.c,v 1.4 2003/02/21 16:51:09 alanh Exp $ */
+/*
+ * $Workfile: nsc_gx2_accel.c $
+ * $Revision: 1.2.2.1 $
+ * $Author: ldelgass $
+ *
+ * File Contents: This file is consists of main Xfree
+ *                acceleration supported routines like solid fill used
+ *                here.
+ * Project:       Geode Xfree Frame buffer device driver.
+ *
+ *     
+ */
+
+/* 
+ * NSC_LIC_ALTERNATIVE_PREAMBLE
+ *
+ * Revision 1.0
+ *
+ * National Semiconductor Alternative GPL-BSD License
+ *
+ * National Semiconductor Corporation licenses this software 
+ * ("Software"):
+ *
+ * National Xfree frame buffer driver
+ *
+ * under one of the two following licenses, depending on how the 
+ * Software is received by the Licensee.
+ * 
+ * If this Software is received as part of the Linux Framebuffer or
+ * other GPL licensed software, then the GPL license designated 
+ * NSC_LIC_GPL applies to this Software; in all other circumstances 
+ * then the BSD-style license designated NSC_LIC_BSD shall apply.
+ *
+ * END_NSC_LIC_ALTERNATIVE_PREAMBLE */
+
+/* NSC_LIC_BSD
+ *
+ * National Semiconductor Corporation Open Source License for 
+ *
+ * National Xfree frame buffer driver
+ *
+ * (BSD License with Export Notice)
+ *
+ * Copyright (c) 1999-2001
+ * National Semiconductor Corporation.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met: 
+ *
+ *   * Redistributions of source code must retain the above copyright 
+ *     notice, this list of conditions and the following disclaimer. 
+ *
+ *   * Redistributions in binary form must reproduce the above 
+ *     copyright notice, this list of conditions and the following 
+ *     disclaimer in the documentation and/or other materials provided 
+ *     with the distribution. 
+ *
+ *   * Neither the name of the National Semiconductor Corporation nor 
+ *     the names of its contributors may be used to endorse or promote 
+ *     products derived from this software without specific prior 
+ *     written permission. 
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+ * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE,
+ * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE.
+ *
+ * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
+ * YOUR JURISDICTION. It is licensee's responsibility to comply with 
+ * any export regulations applicable in licensee's jurisdiction. Under 
+ * CURRENT (2001) U.S. export regulations this software 
+ * is eligible for export from the U.S. and can be downloaded by or 
+ * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
+ * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
+ * Syria, Sudan, Afghanistan and any other country to which the U.S. 
+ * has embargoed goods and services. 
+ *
+ * END_NSC_LIC_BSD */
+
+/* NSC_LIC_GPL
+ *
+ * National Semiconductor Corporation Gnu General Public License for 
+ *
+ * National Xfree frame buffer driver
+ *
+ * (GPL License with Export Notice)
+ *
+ * Copyright (c) 1999-2001
+ * National Semiconductor Corporation.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted under the terms of the GNU General 
+ * Public License as published by the Free Software Foundation; either 
+ * version 2 of the License, or (at your option) any later version  
+ *
+ * In addition to the terms of the GNU General Public License, neither 
+ * the name of the National Semiconductor Corporation nor the names of 
+ * its contributors may be used to endorse or promote products derived 
+ * from this software without specific prior written permission. 
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+ * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, 
+ * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE. See the GNU General Public License for more details. 
+ *
+ * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
+ * YOUR JURISDICTION. It is licensee's responsibility to comply with 
+ * any export regulations applicable in licensee's jurisdiction. Under 
+ * CURRENT (2001) U.S. export regulations this software 
+ * is eligible for export from the U.S. and can be downloaded by or 
+ * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
+ * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
+ * Syria, Sudan, Afghanistan and any other country to which the U.S. 
+ * has embargoed goods and services. 
+ *
+ * You should have received a copy of the GNU General Public License 
+ * along with this file; if not, write to the Free Software Foundation, 
+ * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 
+ *
+ * END_NSC_LIC_GPL */
+
+/* Xfree86 header files */
+#include "vgaHW.h"
+#include "xf86.h"
+#include "xf86_ansic.h"
+#include "xaalocal.h"
+#include "xf86fbman.h"
+#include "miline.h"
+#include "xf86_libc.h"
+#include "xaarop.h"
+#include "nsc.h"
+
+#define DASHED_SUPPORT 0
+#define IMGWRITE_SUPPORT 0
+#define SCR2SCREXP 0
+
+/* STATIC VARIABLES FOR THIS FILE
+ * Used to maintain state between setup and rendering calls.
+ */
+
+static int GeodeTransparent;
+static int GeodeTransColor;
+static int Geodedstx;
+static int Geodedsty;
+static int Geodesrcx;
+static int Geodesrcy;
+static int Geodewidth;
+static int Geodeheight;
+static int Geodebpp;
+static int GeodeCounter;
+
+#if !defined(STB_X)
+static unsigned int GeodeROP = 0;
+static unsigned short Geode_blt_mode = 0;
+static unsigned short Geode_vector_mode = 0;
+#endif
+static unsigned int gu2_xshift = 1;
+static unsigned int gu2_yshift = 1;
+static unsigned int gu2_bpp = 1;
+static unsigned int SetCPUToScreen = 0;
+static unsigned int SetImageWriteRect = 0;
+static unsigned int ImgBufOffset;
+
+#define GU2_WAIT_PENDING while(READ_GP32(MGP_BLT_STATUS) & MGP_BS_BLT_PENDING)
+#define GU2_WAIT_BUSY while(READ_GP32(MGP_BLT_STATUS) & MGP_BS_BLT_BUSY)
+
+#define CALC_FBOFFSET(_SrcX, _SrcY) \
+	(((unsigned int) (_SrcY) << gu2_yshift) |\
+		(((unsigned int) (_SrcX)) << gu2_xshift))
+
+#define GFX_PATTERN_FILL(_SrcX, _SrcY, _Width, _Height) \
+{ \
+	GU2_WAIT_PENDING;\
+	WRITE_GP32(MGP_DST_OFFSET, CALC_FBOFFSET((_SrcX), (_SrcY)));\
+	WRITE_GP32(MGP_WID_HEIGHT, \
+		(((unsigned int) (_Width)) << 16) | (_Height));\
+	WRITE_GP32(MGP_BLT_MODE, Geode_blt_mode);\
+}
+
+static XAAInfoRecPtr localRecPtr;
+
+Bool GX2AccelInit(ScreenPtr pScreen);
+void GX2AccelSync(ScrnInfoPtr pScreenInfo);
+void GX2SetupForFillRectSolid(ScrnInfoPtr pScreenInfo, int color, int rop,
+			      unsigned int planemask);
+void GX2SubsequentFillRectSolid(ScrnInfoPtr pScreenInfo, int x, int y,
+				int w, int h);
+void GX2SetupFor8x8PatternColorExpand(ScrnInfoPtr pScreenInfo,
+				      int patternx, int patterny,
+				      int rop, unsigned int planemask,
+				      int trans_color);
+void GX2Subsequent8x8PatternColorExpand(ScrnInfoPtr pScreenInfo,
+					int patternx, int patterny, int x,
+					int y, int w, int h);
+void GX2SetupFor8x8PatternMonoExpand(ScrnInfoPtr pScreenInfo, int patternx,
+				     int patterny, int fg, int bg, int rop,
+				     unsigned int planemask);
+void GX2Subsequent8x8PatternMonoExpand(ScrnInfoPtr pScreenInfo, int patternx,
+				       int patterny, int x, int y, int w,
+				       int h);
+void GX2SetupForScreenToScreenCopy(ScrnInfoPtr pScreenInfo, int xdir,
+				   int ydir, int rop, unsigned int planemask,
+				   int transparency_color);
+void GX2SubsequentScreenToScreenCopy(ScrnInfoPtr pScreenInfo, int x1, int y1,
+				     int x2, int y2, int w, int h);
+void GX2SetupForSolidLine(ScrnInfoPtr pScreenInfo, int color, int rop,
+			  unsigned int planemask);
+void GX2SetupForDashedLine(ScrnInfoPtr pScrn, int fg, int bg, int rop,
+			   unsigned int planemask, int length,
+			   unsigned char *pattern);
+void GX2SubsequentBresenhamLine(ScrnInfoPtr pScreenInfo, int x1, int y1,
+				int absmaj, int absmin, int err, int len,
+				int octant);
+void GX2SubsequentSolidTwoPointLine(ScrnInfoPtr pScreenInfo, int x0, int y0,
+				    int x1, int y1, int flags);
+void GX2SubsequentHorVertLine(ScrnInfoPtr pScreenInfo, int x, int y, int len,
+			      int dir);
+
+void GX2SetupForScanlineImageWrite(ScrnInfoPtr pScreenInfo,
+				   int rop, unsigned int planemask,
+				   int transparency_color, int bpp,
+				   int depth);
+
+void GX2SubsequentScanlineImageWriteRect(ScrnInfoPtr pScreenInfo,
+					 int x, int y, int w, int h,
+					 int skipleft);
+
+void GX2SubsequentImageWriteScanline(ScrnInfoPtr pScreenInfo, int bufno);
+void GX2FillCacheBltRects(ScrnInfoPtr pScrn, int rop, unsigned int planemask,
+			  int nBox, BoxPtr pBox, int xorg, int yorg,
+			  XAACacheInfoPtr pCache);
+void GX2SetupForImageWrite(ScrnInfoPtr pScreenInfo,
+			   int rop, unsigned int planemask,
+			   int transparency_color, int bpp, int depth);
+void GX2SubsequentImageWriteRect(ScrnInfoPtr pScreenInfo,
+				 int x, int y, int w, int h, int skipleft);
+void GX2SetupForCPUToScreenColorExpandFill(ScrnInfoPtr pScreenInfo,
+					   int fg, int bg, int rop,
+					   unsigned int planemask);
+void GX2SubsequentCPUToScreenColorExpandFill(ScrnInfoPtr pScreenInfo,
+					     int x, int y, int w, int h,
+					     int skipleft);
+void OPTGX2SetupForFillRectSolid(ScrnInfoPtr pScreenInfo, int color, int rop,
+				 unsigned int planemask);
+void OPTGX2SubsequentFillRectSolid(ScrnInfoPtr pScreenInfo, int x, int y,
+				   int w, int h);
+void OPTGX2SetupForScreenToScreenCopy(ScrnInfoPtr pScreenInfo, int xdir,
+				      int ydir, int rop,
+				      unsigned int planemask,
+				      int transparency_color);
+void OPTGX2SubsequentScreenToScreenCopy(ScrnInfoPtr pScreenInfo, int x1,
+					int y1, int x2, int y2, int w, int h);
+void OPTGX2SetupForSolidLine(ScrnInfoPtr pScreenInfo, int color, int rop,
+			     unsigned int planemask);
+void OPTGX2SetupForDashedLine(ScrnInfoPtr pScrn, int fg, int bg, int rop,
+			      unsigned int planemask, int length,
+			      unsigned char *pattern);
+void OPTGX2SubsequentBresenhamLine(ScrnInfoPtr pScreenInfo, int x1, int y1,
+				   int absmaj, int absmin, int err, int len,
+				   int octant);
+void OPTGX2SubsequentSolidTwoPointLine(ScrnInfoPtr pScreenInfo,
+				       int x0, int y0, int x1, int y1,
+				       int flags);
+void OPTGX2SubsequentHorVertLine(ScrnInfoPtr pScreenInfo, int x, int y,
+				 int len, int dir);
+
+void OPTGX2SetupForScanlineImageWrite(ScrnInfoPtr pScreenInfo,
+				      int rop, unsigned int planemask,
+				      int transparency_color, int bpp,
+				      int depth);
+
+void OPTGX2SubsequentScanlineImageWriteRect(ScrnInfoPtr pScreenInfo,
+					    int x, int y, int w, int h,
+					    int skipleft);
+
+void OPTGX2SubsequentImageWriteScanline(ScrnInfoPtr pScreenInfo, int bufno);
+void OPTGX2SetupForCPUToScreenColorExpandFill(ScrnInfoPtr pScreenInfo,
+					      int fg, int bg, int rop,
+					      unsigned int planemask);
+void OPTGX2SubsequentCPUToScreenColorExpandFill(ScrnInfoPtr pScreenInfo,
+						int x, int y, int w, int h,
+						int skipleft);
+void OPTGX2SetupForImageWrite(ScrnInfoPtr pScreenInfo,
+			      int rop, unsigned int planemask,
+			      int transparency_color, int bpp, int depth);
+void OPTGX2SubsequentImageWriteRect(ScrnInfoPtr pScreenInfo,
+				    int x, int y, int w, int h, int skipleft);
+
+/*----------------------------------------------------------------------------
+ * GX2AccelSync.
+ *
+ * Description	:This function is called to syncronize with the graphics
+ *               engine and it waits the graphic engine is idle.This is
+ *               required before allowing   direct access to the
+ *               framebuffer.
+ * Parameters.
+ *   pScreenInfo:Screeen info pointer structure.
+ *
+ * Returns		:none
+ *
+ * Comments		:This function is called on geode_video routines.
+*----------------------------------------------------------------------------
+*/
+void
+GX2AccelSync(ScrnInfoPtr pScreenInfo)
+{
+   if (SetCPUToScreen) {
+#if defined(OPT_ACCEL)
+      WRITE_GP32(MGP_BLT_MODE, Geode_blt_mode |
+		 MGP_BM_SRC_FB | MGP_BM_SRC_MONO);
+#else
+      GFX(mono_bitmap_to_screen_blt(0, 0, Geodedstx, Geodedsty,
+				    Geodewidth, Geodeheight,
+				    localRecPtr->ColorExpandBase,
+				    ((Geodewidth + 31) >> 5) << 2));
+#endif
+
+      SetCPUToScreen = 0;
+   }
+#if IMGWRITE_SUPPORT
+   if (SetImageWriteRect) {
+      unsigned long srcpitch;
+
+#if defined(OPT_ACCEL)
+      GeodePtr pGeode = GEODEPTR(pScreenInfo);
+
+      srcpitch = ((Geodewidth << gu2_xshift) + 3) & 0xFFFFFFFC;
+
+      GU2_WAIT_PENDING;
+      WRITE_GP32(MGP_STRIDE, (srcpitch << 16) | pGeode->Pitch);
+      WRITE_GP32(MGP_SRC_OFFSET, ImgBufOffset);
+      WRITE_GP32(MGP_DST_OFFSET,
+		 (CALC_FBOFFSET(Geodedstx, Geodedsty)) & 0x00FFFFFF);
+      WRITE_GP32(MGP_WID_HEIGHT,
+		 ((unsigned long)Geodewidth << 16) | (unsigned long)
+		 Geodeheight);
+/*
+		ErrorF("%d %d, %d\n", Geodewidth, Geodeheight, gu2_xshift);
+		ErrorF("%X , %X %X %X %X\n", srcpitch, ((srcpitch << 16) | 
+                        pGeode->Pitch), ImgBufOffset, 
+			(CALC_FBOFFSET(Geodedstx, Geodedsty)) & 0x00FFFFFF,
+			((unsigned long)Geodewidth << 16) | 
+                        (unsigned long)Geodeheight);
+*/
+      WRITE_GP32(MGP_BLT_MODE, Geode_blt_mode);
+#else
+      srcpitch = ((Geodewidth << gu2_xshift) + 3) & 0xFFFFFFFC;
+      GFX2(set_source_stride(srcpitch));
+      GFX2(screen_to_screen_blt(ImgBufOffset,
+				CALC_FBOFFSET(Geodedstx, Geodedsty),
+				Geodewidth, Geodeheight, 0));
+#endif
+      SetImageWriteRect = 0;
+   }
+#endif /* IMGWRITE_SUPPORT */
+
+   GFX(wait_until_idle());
+}
+
+/*----------------------------------------------------------------------------
+ * GX2SetupForFillRectSolid.
+ *
+ * Description	:This routine is called to setup the solid pattern
+ *               color for   future  rectangular fills or vectors.
+ *
+ * Parameters.
+ * pScreenInfo
+ *    Ptr       :Screen handler pointer having screen information.
+ *    color     :Specifies the color to be filled up in defined area.
+ *    rop       :Specifies the raster operation value.
+ *   planemask	:Specifies the masking value based rop srcdata.
+ *
+ * Returns		:none
+ *
+ * Comments		:none
+ *
+*----------------------------------------------------------------------------
+*/
+void
+GX2SetupForFillRectSolid(ScrnInfoPtr pScreenInfo,
+			 int color, int rop, unsigned int planemask)
+{
+   GFX(set_solid_pattern((unsigned int)color));
+
+   /* CHECK IF PLANEMASK IS NOT USED (ALL PLANES ENABLED) */
+   if (planemask == 0xFFFFFFFF) {
+      /* USE NORMAL PATTERN ROPs IF ALL PLANES ARE ENABLED */
+      GFX(set_raster_operation(XAAPatternROP[rop]));
+   } else {
+      /* SELECT ROP THAT USES SOURCE DATA FOR PLANEMASK */
+      GFX(set_solid_source((unsigned int)planemask));
+      GFX(set_raster_operation(XAAPatternROP_PM[rop]));
+   }
+}
+
+ /*----------------------------------------------------------------------------
+ * GX2SubsequentFillRectSolid.
+ *
+ * Description	:This routine is used to fill the rectangle of previously
+ *               specified  solid pattern.
+ *
+ * Parameters.
+ *  pScreenInfo :Screen handler pointer having screen information.
+ *     x and y	:Specifies the x and y co-ordinatesarea.
+ *      w and h	:Specifies width and height respectively.
+ *
+ * Returns      :none
+ *
+ * Comments     :desired pattern can be set before this function by
+ *               gfx_set_solid_pattern.
+ * Sample application uses:
+ *   - Window backgrounds. 
+ *   - x11perf: rectangle tests (-rect500).
+ *   - x11perf: fill trapezoid tests (-trap100).
+ *   - x11perf: horizontal line segments (-hseg500).
+ *----------------------------------------------------------------------------
+*/
+void
+GX2SubsequentFillRectSolid(ScrnInfoPtr pScreenInfo, int x, int y, int w,
+			   int h)
+{
+   DEBUGMSG(0, (0, 0, "FillRect %d %d %dx%d\n", x, y, w, h));
+
+   /* SIMPLY PASS THE PARAMETERS TO THE DURANGO ROUTINE */
+
+   GFX(pattern_fill((unsigned short)x, (unsigned short)y,
+		    (unsigned short)w, (unsigned short)h));
+}
+
+/*----------------------------------------------------------------------------
+ * GX2SetupFor8x8PatternColorExpand
+ *
+ * Description	:This routine is called to fill the color pattern of
+ *                 8x8.
+ * Parameters.
+ *	pScreenInfo :Screen handler pointer having screen information.
+ *	patternx    :This is set from on rop data.
+ *      patterny    :This is set based on rop data.
+ *	planemask   :Specifies the value of masking from rop data
+ *	trans_color :to be added. 
+ * Returns	:none.
+ *
+ * Comments     :none.
+ *
+*----------------------------------------------------------------------------
+*/
+
+void
+GX2SetupFor8x8PatternColorExpand(ScrnInfoPtr pScreenInfo,
+				 int patternx, int patterny, int rop,
+				 unsigned int planemask, int trans_color)
+{
+   /* CHECK IF PLANEMASK IS NOT USED (ALL PLANES ENABLED) */
+   if (planemask == 0xFFFFFFFF) {
+      /* USE NORMAL PATTERN ROPs IF ALL PLANES ARE ENABLED */
+      GFX(set_raster_operation(XAAPatternROP[rop]));
+   } else {
+      /* SELECT ROP THAT USES SOURCE DATA FOR PLANEMASK */
+      GFX(set_solid_source((unsigned int)planemask));
+      GFX(set_raster_operation(XAAPatternROP_PM[rop]));
+   }
+}
+
+/*----------------------------------------------------------------------------
+ * GX2Subsequent8x8PatternColorExpand
+ *
+ * Description	:This routine is called to fill  a rectangle with the
+ *               color pattern of previously loaded pattern.
+ *
+ * Parameters.
+ *  pScreenInfo	:Screen handler pointer having screen information.
+ *  patternx	:This is set from on rop data.
+ *  patterny	:This is set based on rop data.
+ *      x	:x -coordinates of the destination rectangle
+ *      y       :y-co-ordinates of the destination rectangle
+ *      w	:Specifies width of the rectangle
+ *      h       :Height of the window of the rectangle
+ *		
+ * Returns	:none
+ *
+ * Comments	:The patterns specified is ignored inside the function
+ * Sample application uses:
+ *   - Patterned desktops
+ *   - x11perf: stippled rectangle tests (-srect500).
+ *   - x11perf: opaque stippled rectangle tests (-osrect500).
+*----------------------------------------------------------------------------
+*/
+void
+GX2Subsequent8x8PatternColorExpand(ScrnInfoPtr pScreenInfo,
+				   int patternx, int patterny, int x, int y,
+				   int w, int h)
+{
+   GeodePtr pGeode = GEODEPTR(pScreenInfo);
+
+   DEBUGMSG(1, (0, 0, "8x8color %d %d %dx%d\n", x, y, w, h));
+
+   /* SIMPLY PASS THE PARAMETERS TO THE DURANGO ROUTINE */
+   /* Ignores specified pattern. */
+   GFX(color_pattern_fill((unsigned short)x, (unsigned short)y,
+			  (unsigned short)w, (unsigned short)h,
+			  ((unsigned long *)((pGeode->FBBase +
+					      (patterny << gu2_yshift)) +
+					     patternx))));
+}
+
+/*----------------------------------------------------------------------------
+ * GX2SetupFor8x8PatternMonoExpand
+ *
+ * Description	:This routine is called to fill the monochrome pattern of
+ *                 8x8.
+ * Parameters.
+ * 	pScreenInfo :Screen handler pointer having screen information.
+ *      patternx    :This is set from on rop data.
+ *      patterny    :This is set based on rop data.
+ *       fg	    :Specifies the foreground color
+ *       bg         :Specifies the background color
+ *	planemask   :Specifies the value of masking from rop data
+
+ * Returns	:none.
+ *
+ * Comments     :none.
+ *
+*----------------------------------------------------------------------------
+*/
+void
+GX2SetupFor8x8PatternMonoExpand(ScrnInfoPtr pScreenInfo,
+				int patternx, int patterny, int fg,
+				int bg, int rop, unsigned int planemask)
+{
+   int trans = (bg == -1);
+
+   /* LOAD PATTERN COLORS AND DATA */
+   GFX(set_mono_pattern((unsigned int)bg, (unsigned int)fg,
+			(unsigned int)patternx, (unsigned int)patterny,
+			trans));
+
+   /* CHECK IF PLANEMASK IS NOT USED (ALL PLANES ENABLED) */
+   if (planemask == 0xFFFFFFFF) {
+      /* USE NORMAL PATTERN ROPs IF ALL PLANES ARE ENABLED */
+      GFX(set_raster_operation(XAAPatternROP[rop]));
+   } else {
+      /* SELECT ROP THAT USES SOURCE DATA FOR PLANEMASK */
+      GFX(set_solid_source((unsigned int)planemask));
+      GFX(set_raster_operation(XAAPatternROP_PM[rop]));
+   }
+}
+
+/*----------------------------------------------------------------------------
+ * GX2Subsequent8x8PatternMonoExpand
+ *
+ * Description	:This routine is called to fill  a ractanglethe
+ *                 monochrome pattern of previusly loaded pattern.
+ *
+ * Parameters.
+ *  pScreenInfo	:Screen handler pointer having screen information.
+ *  patternx	:This is set from on rop data.
+ *  patterny	:This is set based on rop data.
+ *       fg	:Specifies the foreground color
+ *       bg	:Specifies the background color
+ *  planemask	:Specifies the value of masking from rop data
+
+ * Returns	:none
+ *
+ * Comments	:The patterns specified is ignored inside the function
+ * Sample application uses:
+ *   - Patterned desktops
+ *   - x11perf: stippled rectangle tests (-srect500).
+ *   - x11perf: opaque stippled rectangle tests (-osrect500).
+*----------------------------------------------------------------------------
+*/
+void
+GX2Subsequent8x8PatternMonoExpand(ScrnInfoPtr pScreenInfo,
+				  int patternx, int patterny, int x, int y,
+				  int w, int h)
+{
+   DEBUGMSG(0, (0, 0, "8x8mono %d %d %dx%d\n", x, y, w, h));
+
+   /* SIMPLY PASS THE PARAMETERS TO THE DURANGO ROUTINE */
+   /* Ignores specified pattern. */
+   GFX(pattern_fill((unsigned short)x, (unsigned short)y,
+		    (unsigned short)w, (unsigned short)h));
+}
+
+/*----------------------------------------------------------------------------
+ * GX2SetupForScreenToScreenCopy
+ *
+ * Description	:This function is used to set up the planemask and raster
+ *                 for future Bliting functionality.
+ *
+ * Parameters:
+ *	pScreenInfo :Screen handler pointer having screen information.
+ *      xdir	:This is set based on rop data.
+ *      ydir    :This is set based on rop data.
+ *      rop	:sets the raster operation
+ *	transparency:tobeadded
+ *  planemask	:Specifies the value of masking from rop data
+
+ * Returns	:none
+ *
+ * Comments	:The patterns specified is ignored inside the function
+*----------------------------------------------------------------------------
+*/
+void
+GX2SetupForScreenToScreenCopy(ScrnInfoPtr pScreenInfo,
+			      int xdir, int ydir, int rop,
+			      unsigned int planemask, int transparency_color)
+{
+   GFX(set_solid_pattern(planemask));
+   /* SET RASTER OPERATION FOR USING PATTERN AS PLANE MASK */
+   GFX(set_raster_operation(XAACopyROP[rop]));
+   /* SAVE TRANSPARENCY FLAG */
+   GeodeTransparent = (transparency_color == -1) ? 0 : 1;
+   GeodeTransColor = transparency_color;
+
+}
+
+/*----------------------------------------------------------------------------
+ * GX2SubsquentScreenToScreenCopy
+ *
+ * Description	:This function is called to perform a screen to screen
+ *               BLT  using the previously  specified planemask,raster
+ *               operation and  * transparency flag
+ *
+ * Parameters.
+ * 	pScreenInfo :Screen handler pointer having screen information.
+ *  	x1	:x -coordinates of the source window
+ *      y1      :y-co-ordinates of the source window
+ *      x2	:x -coordinates of the destination window
+ *      y2      :y-co-ordinates of the destination window
+ *      w	:Specifies width of the window to be copied
+ *      h       :Height of the window to be copied.
+ * Returns	:none
+ *
+ * Comments	:The patterns specified is ignored inside the function
+ * Sample application uses (non-transparent):
+ *   - Moving windows.
+ *   - x11perf: scroll tests (-scroll500).
+ *   - x11perf: copy from window to window (-copywinwin500).
+ *
+ * No application found using transparency.
+*----------------------------------------------------------------------------
+*/
+void
+GX2SubsequentScreenToScreenCopy(ScrnInfoPtr pScreenInfo,
+				int x1, int y1, int x2, int y2, int w, int h)
+{
+   if (GeodeTransparent) {
+      /* CALL ROUTINE FOR TRANSPARENT SCREEN TO SCREEN BLT
+       * * Should only be called for the "copy" raster operation.
+       */
+      GFX(screen_to_screen_xblt((unsigned short)x1, (unsigned short)y1,
+				(unsigned short)x2, (unsigned short)y2,
+				(unsigned short)w, (unsigned short)h,
+				GeodeTransColor));
+   } else {
+      /* CALL ROUTINE FOR NORMAL SCREEN TO SCREEN BLT */
+      GFX(screen_to_screen_blt((unsigned short)x1, (unsigned short)y1,
+			       (unsigned short)x2, (unsigned short)y2,
+			       (unsigned short)w, (unsigned short)h));
+   }
+}
+
+void
+GX2SetupForImageWrite(ScrnInfoPtr pScreenInfo,
+		      int rop, unsigned int planemask,
+		      int transparency_color, int bpp, int depth)
+{
+   GFX(set_solid_pattern((unsigned int)planemask));
+   /* SET RASTER OPERATION FOR USING PATTERN AS PLANE MASK */
+   GFX(set_raster_operation(XAACopyROP[rop]));
+   /* SAVE TRANSPARENCY FLAG */
+   GeodeTransparent = (transparency_color == -1) ? 0 : 1;
+   GeodeTransColor = transparency_color;
+   Geodebpp = bpp;
+}
+
+void
+GX2SubsequentImageWriteRect(ScrnInfoPtr pScreenInfo,
+			    int x, int y, int w, int h, int skipleft)
+{
+   Geodedstx = x;
+   Geodedsty = y;
+   Geodewidth = w;
+   Geodeheight = h;
+   SetImageWriteRect = 1;
+
+}
+
+/*----------------------------------------------------------------------------
+ * GX2SetupForScanlineImageWrite
+ *
+ * Description	:This function is used to set up the planemask and raster
+ *               for future Bliting functionality.
+ *
+ * Parameters:
+ *  pScreenInfo	       :Screen handler pointer having screen information.
+ *  rop		       :sets the raster operation
+ *  transparency_color :transparency color key.
+ *  planemask	       :Specifies the value of masking from rop data
+ *  bpp		       :bits per pixel of the source pixmap
+ *  depth	       :depth of the source pixmap.
+ * Returns	:none
+ *
+ * Comments	:none
+ *  x11perf -putimage10  
+ *  x11perf -putimage100 
+ *  x11perf -putimage500 
+*----------------------------------------------------------------------------
+*/
+void
+GX2SetupForScanlineImageWrite(ScrnInfoPtr pScreenInfo,
+			      int rop, unsigned int planemask,
+			      int transparency_color, int bpp, int depth)
+{
+   GFX(set_solid_pattern((unsigned int)planemask));
+   /* SET RASTER OPERATION FOR USING PATTERN AS PLANE MASK */
+   GFX(set_raster_operation(XAACopyROP[rop & 0x0F]));
+   /* SAVE TRANSPARENCY FLAG */
+   GeodeTransparent = (transparency_color == -1) ? 0 : 1;
+   GeodeTransColor = transparency_color;
+   Geodebpp = bpp;
+}
+
+/*----------------------------------------------------------------------------
+ * GX2SubsequentScanlineImageWriteRect
+ *
+ * Description	:This function is used to set up the x,y corordinates and width
+ *               &height for future Bliting functionality.
+ *
+ * Parameters:
+ *	pScreenInfo :Screen handler pointer having screen information.
+ *      x	    :destination x
+ *	y	    :destination y
+ *	w	    :Specifies the width of the rectangle to be  copied
+ *	h	    :Specifies the height of the rectangle to be  copied
+ *	
+ * Returns	:none
+ *
+ * Comments	:none
+*----------------------------------------------------------------------------
+*/
+void
+GX2SubsequentScanlineImageWriteRect(ScrnInfoPtr pScreenInfo,
+				    int x, int y, int w, int h, int skipleft)
+{
+   Geodedstx = x;
+   Geodedsty = y;
+   Geodewidth = w;
+   Geodeheight = h;
+   GeodeCounter = 0;
+}
+
+/*----------------------------------------------------------------------------
+ * GX2SubsquentImageWriteScanline
+ *
+ * Description	:This function is called to 
+ *               BLT  using the previously  specified planemask,raster
+ *               operation and   transparency flag
+ *
+ * Parameters.
+ * 	pScreenInfo :Screen handler pointer having screen information.
+ *
+ * Returns	:none
+ *
+ * Comments	:The patterns specified is ignored inside the function
+ * Sample application uses (non-transparent):
+ *   - Moving windows.
+ *   - x11perf: scroll tests (-scroll500).
+ *   - x11perf: copy from window to window (-copywinwin500).
+ *
+ * No application found using transparency.
+*----------------------------------------------------------------------------
+*/
+void
+GX2SubsequentImageWriteScanline(ScrnInfoPtr pScreenInfo, int bufno)
+{
+   GeodePtr pGeode;
+   int blt_height = 0;
+   char blit = FALSE;
+
+   pGeode = GEODEPTR(pScreenInfo);
+
+   GeodeCounter++;
+
+   if ((Geodeheight <= pGeode->NoOfImgBuffers) &&
+       (GeodeCounter == Geodeheight)) {
+      blit = TRUE;
+      blt_height = Geodeheight;
+   } else if ((Geodeheight > pGeode->NoOfImgBuffers)
+	      && (GeodeCounter == pGeode->NoOfImgBuffers)) {
+      blit = TRUE;
+      Geodeheight -= pGeode->NoOfImgBuffers;
+      blt_height = pGeode->NoOfImgBuffers;
+   } else
+      return;
+
+   if (blit) {
+      blit = FALSE;
+
+      GeodeCounter = 0;
+
+      if (GeodeTransparent) {
+	 /* CALL ROUTINE FOR TRANSPARENT SCREEN TO SCREEN BLT
+	  * * Should only be called for the "copy" raster operation.
+	  */
+	 GFX(screen_to_screen_xblt((unsigned short)Geodesrcx,
+				   (unsigned short)Geodesrcy,
+				   (unsigned short)Geodedstx,
+				   (unsigned short)Geodedsty,
+				   (unsigned short)Geodewidth,
+				   (unsigned short)blt_height,
+				   GeodeTransColor));
+      } else {
+	 /* CALL ROUTINE FOR NORMAL SCREEN TO SCREEN BLT */
+	 GFX(screen_to_screen_blt((unsigned short)Geodesrcx,
+				  (unsigned short)Geodesrcy,
+				  (unsigned short)Geodedstx,
+				  (unsigned short)Geodedsty,
+				  (unsigned short)Geodewidth,
+				  (unsigned short)blt_height));
+      }
+      Geodedsty += blt_height;
+      GFX(wait_until_idle());
+   }
+}
+
+/*----------------------------------------------------------------------------
+ * GX2SetupForCPUToScreenColorExpandFill
+ *
+ * Description	:This routine is called to setup the background and 
+ *		 foreground colors,rop and plane mask for future
+ *	         color expansion blits from source patterns stored
+ *		 in system memory
+ *				
+ * Parameters.
+ * 	pScreenInfo :Screen handler pointer having screen information.
+ *      fg	    :Specifies the foreground color
+ *      bg	    :Specifies the background color
+ *      rop	    :Specifies rop values.
+ *	planemask   :Specifies the value of masking from rop data
+ *
+ * Returns	:none.
+ *
+ * Comments     :
+ * All the text gets rendered through this i/f. We have given 
+ * the offscreen memory loaction to temporarily put the text 
+ * bitmap. Generaly all the text comes as bitmap and then gets 
+ * rendered via the HOST_SRC(similar to scratchpad in GX1). Now
+ * since we already have the bitmap in offscreen we can do a 
+ * src_FB_EXPAND. This is the best possible you can do with GX2
+ * CPU-to-screen color expansion 
+ *----------------------------------------------------------------------------
+*/
+void
+GX2SetupForCPUToScreenColorExpandFill(ScrnInfoPtr pScreenInfo,
+				      int fg, int bg, int rop,
+				      unsigned int planemask)
+{
+   GFX(set_solid_pattern(planemask));
+   GFX(set_mono_source(bg, fg, (bg == -1)));
+
+   /* USE NORMAL PATTERN ROPs IF ALL PLANES ARE ENABLED */
+   GFX(set_raster_operation(XAACopyROP_PM[rop & 0x0F]));
+
+   DEBUGMSG(0, (0, X_NONE, "%x %x %x %x\n", fg, bg, rop, planemask));
+}
+
+/*-------------------------------------------------------------------------------
+ * GX2SubsequentCPUToScreenColorExpandFill
+ *
+ * Description	:This routine is used to perform color expansion blits from 
+ *               source  patterns stored in system memory using the 
+ *               previously set rop and plane mask.
+ *
+ * Parameters.
+ *	pScreenInfo :Screen handler pointer having screen information.
+ *	x and y	    :Specifies the x and y co-ordinatesarea.
+ *      w and h	    :Specifies width and height respectively.
+ *
+ * Returns		:none
+ *
+ * Comments		:none
+ *--------------------------------------------------------------------------------
+ */
+void
+GX2SubsequentCPUToScreenColorExpandFill(ScrnInfoPtr pScreenInfo,
+					int x, int y, int w, int h,
+					int skipleft)
+{
+   Geodedstx = x;
+   Geodedsty = y;
+   Geodewidth = w;
+   Geodeheight = h;
+   SetCPUToScreen = 1;
+}
+
+#if SCR2SCREXP
+void
+GX2SetupForScreenToScreenColorExpandFill(ScrnInfoPtr pScrn,
+					 int fg, int bg, int rop,
+					 unsigned int planemask)
+{
+   GFX(set_solid_pattern(planemask));
+   GFX(set_mono_source(bg, fg, (bg == -1)));
+
+   /* USE NORMAL PATTERN ROPs IF ALL PLANES ARE ENABLED */
+   GFX(set_raster_operation(XAACopyROP_PM[rop & 0x0F]));
+
+   DEBUGMSG(0, (0, X_NONE, "%x %x %x %x\n", fg, bg, rop, planemask));
+}
+
+void
+GX2SubsequentScreenToScreenColorExpandFill(ScrnInfoPtr pScrn,
+					   int x, int y, int w, int h,
+					   int srcx, int srcy, int offset)
+{
+   GeodePtr pGeode = GEODEPTR(pScrn);
+
+   GFX(mono_bitmap_to_screen_blt(offset, 0, x, y, w, h,
+				 (unsigned char *)(pGeode->FBBase +
+						   CALC_FBOFFSET(srcx, srcy)),
+				 pGeode->Pitch));
+}
+#endif
+
+static unsigned short vector_mode_table[] = {
+   VM_MAJOR_INC | VM_MINOR_INC | VM_X_MAJOR,
+   VM_MAJOR_INC | VM_MINOR_INC | VM_Y_MAJOR,
+   VM_MAJOR_INC | VM_X_MAJOR,
+   VM_MINOR_INC | VM_Y_MAJOR,
+   VM_MINOR_INC | VM_X_MAJOR,
+   VM_MAJOR_INC | VM_Y_MAJOR,
+   VM_X_MAJOR,
+   VM_Y_MAJOR,
+};
+
+/*----------------------------------------------------------------------------
+ * GX2SetupForSolidLine
+ *
+ * Description	:This function is used setup the solid line color for
+ *               future line draws.
+ *
+ *
+ * Parameters.
+ * 	pScreenInfo :Screen handler pointer having screen information.
+ *      color	:Specifies the color value od line
+ *      rop     :Specifies rop values.
+ *  Planemask	:Specifies planemask value.
+ * Returns		:none
+ *
+ * Comments		:none
+*----------------------------------------------------------------------------
+*/
+void
+GX2SetupForSolidLine(ScrnInfoPtr pScreenInfo,
+		     int color, int rop, unsigned int planemask)
+{
+   /* LOAD THE SOLID PATTERN COLOR */
+   GFX(set_solid_pattern((unsigned int)color));
+
+   /* USE NORMAL PATTERN ROPs IF ALL PLANES ARE ENABLED */
+   GFX(set_raster_operation(XAAPatternROP[rop & 0x0F]));
+}
+
+/*---------------------------------------------------------------------------
+ * GX2SubsequentBresenhamLine
+ *
+ * Description	:This function is used to render a vector using the
+ *                 specified bresenham parameters.
+ *
+ * Parameters:
+ * pScreenInfo 	:Screen handler pointer having screen information.
+ *      x1  	:Specifies the starting x position
+ *      y1      :Specifies starting y possition
+ *      absmaj	:Specfies the Bresenman absolute major.
+ *	absmin	:Specfies the Bresenman absolute minor.
+ *	err     :Specifies the bresenham err term.
+ *	len     :Specifies the length of the vector interms of pixels.
+ *	octant  :not used in this function,may be added for standard
+ *                    interface.
+ * Returns	:none
+ *
+ * Comments     :none
+ * Sample application uses:
+ *   - Window outlines on window move.
+ *   - x11perf: line segments (-line500).
+ *   - x11perf: line segments (-seg500).
+*----------------------------------------------------------------------------
+*/
+void
+GX2SubsequentBresenhamLine(ScrnInfoPtr pScreenInfo,
+			   int x1, int y1, int absmaj, int absmin, int err,
+			   int len, int octant)
+{
+   int axial, init, diag;
+
+   DEBUGMSG(0, (0, 0, "BLine %d, %d, %d, %d, %d, %d, %d\n",
+		x1, y1, absmaj, absmin, err, len, octant));
+
+   /* DETERMINE BRESENHAM PARAMETERS */
+
+   axial = ((int)absmin << 1);
+   init = axial - (int)absmaj;
+   diag = init - (int)absmaj;
+
+   /* ADJUST INITIAL ERROR
+    * * Adjust by -1 for certain directions so that the vector 
+    * * hits the same pixels when drawn in either direction.
+    * * The Gamma value is assumed to account for the initial 
+    * * error adjustment for clipped lines.
+    */
+
+   init += err;
+
+   /* CALL ROUTINE TO DRAW VECTOR */
+
+   GFX(bresenham_line((unsigned short)x1,
+		      (unsigned short)y1,
+		      (unsigned short)len,
+		      (unsigned short)init,
+		      (unsigned short)axial,
+		      (unsigned short)diag,
+		      (unsigned short)vector_mode_table[octant]));
+
+}
+
+#define ABS(_val1, _val2) (((_val1) > (_val2)) ? ((_val1)-(_val2)) : ((_val2) - (_val1)))
+
+void
+GX2SubsequentSolidTwoPointLine(ScrnInfoPtr pScreenInfo,
+			       int x0, int y0, int x1, int y1, int flags)
+{
+   long dx, dy, dmaj, dmin;
+   long axialerr, diagerr, initerr;
+   unsigned short vec_flags = 0;
+
+   dx = ABS(x1, x0);
+   dy = ABS(y1, y0);
+   if (dx >= dy) {
+      dmaj = dx;
+      dmin = dy;
+      vec_flags = VM_X_MAJOR;
+      if (x1 > x0)
+	 vec_flags |= VM_MAJOR_INC;
+      if (y1 > y0)
+	 vec_flags |= VM_MINOR_INC;
+   } else {
+      dmaj = dy;
+      dmin = dx;
+      vec_flags = VM_Y_MAJOR;
+      if (x1 > x0)
+	 vec_flags |= VM_MINOR_INC;
+      if (y1 > y0)
+	 vec_flags |= VM_MAJOR_INC;
+   }
+   axialerr = dmin << 1;
+   diagerr = (dmin - dmaj) << 1;
+   initerr = (dmin << 1) - dmaj;
+   if (!(vec_flags & VM_MINOR_INC))
+      initerr--;
+
+   GFX(bresenham_line((unsigned short)x0,
+		      (unsigned short)y0,
+		      (unsigned short)dmaj,
+		      (unsigned short)initerr,
+		      (unsigned short)axialerr,
+		      (unsigned short)diagerr, vec_flags));
+}
+
+/*---------------------------------------------------------------------------
+ * GX2SubsequentHorVertLine
+ *
+ * This routine is called to render a vector using the specified Bresenham
+ * parameters.  
+ *
+ * Sample application uses:
+ *   - Window outlines on window move.
+ *   - x11perf: line segments (-hseg500).
+ *   - x11perf: line segments (-vseg500).
+ *---------------------------------------------------------------------------
+ */
+void
+GX2SubsequentHorVertLine(ScrnInfoPtr pScreenInfo,
+			 int x, int y, int len, int dir)
+{
+   DEBUGMSG(0, (0, 0, "HLine %d, %d, %d, %d\n", x, y, len, dir));
+   GFX(pattern_fill((unsigned short)x, (unsigned short)y,
+		    (unsigned short)((dir == DEGREES_0) ? len : 1),
+		    (unsigned short)((dir == DEGREES_0) ? 1 : len)));
+}
+
+#if DASHED_SUPPORT
+void
+BuildPattern(CARD32 pat, int len, CARD32 * pat8x8)
+{
+   unsigned long i, count;
+
+   /* find homany can fit comfortably */
+   count = 32 / len;
+   /* add 1 for the residue */
+   count++;
+   /* construct the mask and knock off the unwanted data */
+   i = ((CARD32) 0xFFFFFFFF) << (31 - len);
+   pat &= i;
+   /* init before the show */
+   pat8x8[0] = 0;
+   /* loop and build the pattern aray data */
+   for (i = 0; i < count; i++) {
+      pat8x8[0] |= (pat >> (len * i));
+   }
+
+   /* equate both the array's and then adjust */
+   pat8x8[1] = pat8x8[0];
+
+   /* how many carried from last operation */
+   i = (len * count) - 32;
+   pat8x8[1] >>= i;
+   pat8x8[1] |= (pat << (len - i));
+}
+
+#define PAT_SHIFT(pat,n) pat >> n
+
+/*----------------------------------------------------------------------------
+ * GX2SetupForDashedLine
+ *
+ * Description	:This function is used to setup for
+ *               future line draws.
+ *
+ *
+ * Parameters.
+ * 		pScreenInfo :Screen handler pointer having screen information.
+ * Returns		:none
+ *
+ * Comments		:none
+ * x11perf -dseg100  
+ * x11perf -dline100 
+ * x11perf -ddline100
+*----------------------------------------------------------------------------
+*/
+void
+GX2SetupForDashedLine(ScrnInfoPtr pScrn, int fg, int bg, int rop,
+		      unsigned int planemask, int length,
+		      unsigned char *pattern)
+{
+   int trans = (bg == -1);
+   CARD32 *pat = (CARD32 *) pattern;
+   CARD32 pat8x8[2];
+
+   pat8x8[0] = pat[0];
+   switch (length) {
+   case 2:
+      pat8x8[0] |= PAT_SHIFT(pat8x8[0], 2);	/* fall through */
+   case 4:
+      pat8x8[0] |= PAT_SHIFT(pat8x8[0], 4);	/* fall through */
+   case 8:
+      pat8x8[0] |= PAT_SHIFT(pat8x8[0], 8);	/* fall through */
+   case 16:
+      pat8x8[0] |= PAT_SHIFT(pat8x8[0], 16);
+   case 32:
+      pat8x8[1] = pat8x8[0];
+      break;
+   case 64:
+      pat8x8[1] = pat[1];
+      break;
+   default:
+      BuildPattern(pat[0], length, pat8x8);
+   }
+/*	
+	ErrorF("%X %d, %X %X\n", pat[0], length, pat8x8[0], pat8x8[1]); 
+*/
+   /* LOAD PATTERN COLORS AND DATA */
+
+   GFX(set_mono_pattern((unsigned int)bg, (unsigned int)fg,
+			pat8x8[0], pat8x8[1], (unsigned char)trans));
+
+   /* CHECK IF PLANEMASK IS NOT USED (ALL PLANES ENABLED) */
+
+   if (planemask == 0xFFFFFFFF) {
+      /* USE NORMAL PATTERN ROPs IF ALL PLANES ARE ENABLED */
+
+      GFX(set_raster_operation(windowsROPpat[rop & 0x0F]));
+   } else {
+      /* SELECT ROP THAT USES SOURCE DATA FOR PLANEMASK */
+
+      GFX(set_raster_operation(windowsROPsrcMask[rop & 0x0F]));
+   }
+}
+
+/*---------------------------------------------------------------------------
+ * GX2SubsequentDashedBresenhamLine
+ *
+ * Description	:This function is used to render a vector using the
+ *                 specified bresenham parameters.
+ *
+ * Parameters:
+ * pScreenInfo 	:Screen handler pointer having screen information.
+ *      x1  	:Specifies the starting x position
+ *      y1      :Specifies starting y possition
+ *      absmaj	:Specfies the Bresenman absolute major.
+ *	absmin	:Specfies the Bresenman absolute minor.
+ *	err     :Specifies the bresenham err term.
+ *	len     :Specifies the length of the vector interms of pixels.
+ *	octant  :not used in this function,may be added for standard
+ *               interface.
+ * Returns	:none
+ *
+ * Comments     :none
+ * Sample application uses:
+ *   - Window outlines on window move.
+ *   - x11perf: line segments (-line500).
+ *   - x11perf: line segments (-seg500).
+*----------------------------------------------------------------------------
+*/
+void
+GX2SubsequentDashedBresenhamLine(ScrnInfoPtr pScreenInfo,
+				 int x1, int y1, int absmaj, int absmin,
+				 int err, int len, int octant)
+{
+   int axial, init, diag;
+
+   DEBUGMSG(0, (0, 0, "BLine %d, %d, %d, %d, %d, %d, %d\n",
+		x1, y1, absmaj, absmin, err, len, octant));
+
+   /* DETERMINE BRESENHAM PARAMETERS */
+
+   axial = ((int)absmin << 1);
+   init = axial - (int)absmaj;
+   diag = init - (int)absmaj;
+
+   /* ADJUST INITIAL ERROR
+    * * Adjust by -1 for certain directions so that the vector 
+    * * hits the same pixels when drawn in either direction.
+    * * The Gamma value is assumed to account for the initial 
+    * * error adjustment for clipped lines.
+    */
+
+   init += err;
+
+   /* CALL ROUTINE TO DRAW VECTOR */
+
+   gfx2_set_pattern_origin(x1, y1);
+   gfx2_bresenham_line(CALC_FBOFFSET(x1, y1),
+		       (unsigned short)len, (unsigned short)init,
+		       (unsigned short)axial, (unsigned short)diag,
+		       (unsigned short)vector_mode_table[octant]);
+
+}
+#endif
+
+#if !defined(STB_X)
+/*----------------------------------------------------------------------------
+ * OPTGX2SetupForCPUToScreenColorExpandFill
+ *
+ * Description	:This routine is called to setup the background and 
+ *		 foreground colors,rop and plane mask for future
+ *		 color expansion blits from source patterns stored
+ *		 in system memory(non durango version).
+ *				
+ * Parameters.
+ * 	pScreenInfo :Screen handler pointer having screen information.
+ *      fg	    :Specifies the foreground color
+ *      bg	    :Specifies the background color
+ *      rop	    :Specifies rop values.
+ *	planemask   :Specifies the value of masking from rop data
+ *
+ * Returns	:none.
+ *
+ * Comments     :
+ * All the text gets rendered through this i/f. We have given 
+ * the offscreen memory loaction to temporarily put the text 
+ * bitmap. Generaly all the text comes as bitmap and then gets 
+ * rendered via the HOST_SRC(similar to scratchpad in GX1). Now
+ * since we already have the bitmap in offscreen we can do a 
+ * src_FB_EXPAND. This is the best possible you can do with GX2
+ * CPU-to-screen color expansion 
+ *  x11perf -ftext (pure indirect):
+ *  x11perf -oddsrect10   
+ *  x11perf -oddsrect100  
+ *  x11perf -bigsrect10   
+ *  x11perf -bigsrect100  
+ *  x11perf -polytext     
+ *  x11perf -polytext16   
+ *  x11perf -seg1         
+ *  x11perf -copyplane10  
+ *  x11perf -copyplane100 
+ *  x11perf -putimagexy10 
+ *  x11perf -putimagexy100
+*----------------------------------------------------------------------------
+*/
+
+void
+OPTGX2SetupForCPUToScreenColorExpandFill(ScrnInfoPtr pScreenInfo,
+					 int fg, int bg, int rop,
+					 unsigned int planemask)
+{
+   int trans = (bg == -1);
+
+   GeodeROP = XAACopyROP_PM[rop];
+
+   if ((GeodeROP & 0x55) ^ ((GeodeROP >> 1) & 0x55)) {
+      Geode_blt_mode = MGP_BM_DST_REQ;
+   } else {
+      Geode_blt_mode = 0;
+   }
+   if (trans)
+      GeodeROP |= MGP_RM_SRC_TRANS;
+
+   /* POLL UNTIL ABLE TO WRITE THE PATTERN COLOR */
+
+   GU2_WAIT_PENDING;
+   WRITE_GP32(MGP_PAT_COLOR_0, (unsigned long)planemask);
+   WRITE_GP32(MGP_RASTER_MODE, gu2_bpp | GeodeROP);
+   WRITE_GP32(MGP_SRC_COLOR_FG, fg);
+   WRITE_GP32(MGP_SRC_COLOR_BG, bg);
+}
+
+/*-------------------------------------------------------------------------------
+ * OPTGX2SubsequentCPUToScreenColorExpandFill
+ *
+ * Description	:This routine is used to perform color expansion blits from 
+ *               source patterns stored in system memory using the previously 
+ *               set rop and plane mask.(non durango version)
+ *
+ * Parameters.
+ *		pScreenInfo :Screen handler pointer having screen information.
+ *		x and y	    :Specifies the x and y co-ordinatesarea.
+ *              w and h	    :Specifies width and height respectively.
+ *
+ * Returns		:none
+ *
+ * Comments		:none
+ *--------------------------------------------------------------------------------
+ */
+void
+OPTGX2SubsequentCPUToScreenColorExpandFill(ScrnInfoPtr pScreenInfo,
+					   int x, int y, int w, int h,
+					   int skipleft)
+{
+   GeodePtr pGeode = GEODEPTR(pScreenInfo);
+
+   GU2_WAIT_PENDING;
+   WRITE_GP32(MGP_SRC_OFFSET, ((unsigned int)(localRecPtr->ColorExpandBase -
+					      pGeode->FBBase)));
+   WRITE_GP32(MGP_DST_OFFSET, CALC_FBOFFSET(x, y));
+   WRITE_GP32(MGP_WID_HEIGHT, (((unsigned long)w) << 16) | h);
+   WRITE_GP32(MGP_STRIDE, (((w + 31) >> 5) << 18) | pGeode->Pitch);
+   SetCPUToScreen = 1;
+}
+
+/*----------------------------------------------------------------------------
+ * OPTGX2SetupForFillRectSolid.
+ *
+ * Description	:This routine is called to setup the solid pattern
+ *               color for   future  rectangular fills or vectors.
+ *				 (non durango version)
+ *
+ * Parameters.
+ * pScreenInfo
+ *    Ptr	:Screen handler pointer having screen information.
+ *    color     :Specifies the color to be filled up in defined area.
+ *    rop       :Specifies the raster operation value.
+ *   planemask	:Specifies the masking value based rop srcdata.
+ *
+ * Returns		:none
+ *
+ * Comments		:none
+ *
+*----------------------------------------------------------------------------
+*/
+void
+OPTGX2SetupForFillRectSolid(ScrnInfoPtr pScreenInfo,
+			    int color, int rop, unsigned int planemask)
+{
+   GeodePtr pGeode = GEODEPTR(pScreenInfo);
+
+   GU2_WAIT_PENDING;
+   WRITE_GP32(MGP_PAT_COLOR_0, (unsigned long)color);
+
+   WRITE_GP32(MGP_STRIDE, pGeode->Pitch);
+
+   if (planemask == 0xFFFFFFFF) {
+      GeodeROP = XAAPatternROP[rop];
+   } else {
+      WRITE_GP32(MGP_SRC_COLOR_FG, (unsigned long)planemask);
+      GeodeROP = XAAPatternROP_PM[rop];
+   }
+
+   WRITE_GP32(MGP_RASTER_MODE, gu2_bpp | GeodeROP);
+
+   Geode_blt_mode = 0;
+   if (!((GeodeROP & 0x33) ^ ((GeodeROP >> 2) & 0x33)))
+      Geode_blt_mode = MGP_BM_SRC_MONO;
+
+   if ((GeodeROP & 0x55) ^ ((GeodeROP >> 1) & 0x55)) {
+      Geode_blt_mode |= MGP_BM_DST_REQ;
+      Geode_vector_mode = MGP_VM_DST_REQ;
+   } else {
+      Geode_vector_mode = 0;
+   }
+}
+
+ /*----------------------------------------------------------------------------
+ * OPTGX2SubsequentFillRectSolid.
+ *
+ * Description	:This routine is used to fill the rectangle of previously
+ *               specified  solid pattern.
+ *		(non durango version)
+ *
+ * Parameters.
+ *  pScreenInfo :Screen handler pointer having screen information.
+ *     x and y	:Specifies the x and y co-ordinatesarea.
+ *     w and h	:Specifies width and height respectively.
+ *
+ * Returns	:none
+ *
+ * Comments	:desired pattern can be set before this function by
+ *               gfx_set_solid_pattern.
+ * Sample application uses:
+ *   - Window backgrounds. 
+ *   - x11perf: rectangle tests (-rect500).
+ *   - x11perf: fill trapezoid tests (-trap100).
+ *   - x11perf: horizontal line segments (-hseg500).
+ *----------------------------------------------------------------------------
+*/
+void
+OPTGX2SubsequentFillRectSolid(ScrnInfoPtr pScreenInfo,
+			      int x, int y, int width, int height)
+{
+   DEBUGMSG(0, (0, 0, "FillRect %d %d %dx%d\n", x, y, width, height));
+
+   GFX_PATTERN_FILL(x, y, width, height);
+}
+
+/*----------------------------------------------------------------------------
+ * OPTGX2SetupForScreenToScreenCopy
+ *
+ * Description	:This function is used to set up the planemask and raster
+ *               for future Bliting functionality.
+ *		(non durango version)
+ *
+ * Parameters:
+ *	pScreenInfo :Screen handler pointer having screen information.
+ *      xdir	:This is set based on rop data.
+ *      ydir    :This is set based on rop data.
+ *      rop	:sets the raster operation
+ *	transparency:tobeadded
+ *  planemask	:Specifies the value of masking from rop data
+
+ * Returns	:none
+ *
+ * Comments	:The patterns specified is ignored inside the function
+*----------------------------------------------------------------------------
+*/
+void
+OPTGX2SetupForScreenToScreenCopy(ScrnInfoPtr pScreenInfo,
+				 int xdir, int ydir, int rop,
+				 unsigned int planemask,
+				 int transparency_color)
+{
+   GeodePtr pGeode = GEODEPTR(pScreenInfo);
+
+   GeodeROP = XAACopyROP_PM[rop];
+
+   Geode_blt_mode = MGP_BM_SRC_FB;
+
+   /* CALCULATE THE DIRECTION OF THE BLT */
+   if ((GeodeROP & 0x55) ^ ((GeodeROP >> 1) & 0x55)) {
+      Geode_blt_mode |= MGP_BM_DST_REQ;
+   }
+
+   GU2_WAIT_PENDING;
+
+   if (transparency_color != -1) {
+      WRITE_GP32(MGP_SRC_COLOR_FG, transparency_color);
+      WRITE_GP32(MGP_SRC_COLOR_BG, 0xFFFFFFFF);
+      GeodeROP = MGP_RM_SRC_TRANS | 0xCC;
+   }
+   WRITE_GP32(MGP_PAT_COLOR_0, planemask);
+   WRITE_GP32(MGP_RASTER_MODE, gu2_bpp | GeodeROP);
+   WRITE_GP32(MGP_STRIDE, pGeode->Pitch | (pGeode->Pitch << 16));
+}
+
+/*----------------------------------------------------------------------------
+ * OPTGX2SubsquentScreenToScreenCopy
+ *
+ * Description	:This function is called to perform a screen to screen
+ *               BLT  using the previously  specified planemask,raster
+ *               operation and  * transparency flag
+ *		(non durango version)
+ *
+ * Parameters.
+ * 	pScreenInfo :Screen handler pointer having screen information.
+ *  	srcx	:x -coordinates of the source window
+ *      srcy    :y-co-ordinates of the source window
+ *      dstx	:x -coordinates of the destination window
+ *      dsty    :y-co-ordinates of the destination window
+ *      width	:Specifies width of the window to be copied
+ *      height  :Height of the window to be copied.
+ * Returns	:none
+ *
+ * Comments	:The patterns specified is ignored inside the function
+ * Sample application uses (non-transparent):
+ *   - Moving windows.
+ *   - x11perf: scroll tests (-scroll500).
+ *   - x11perf: copy from window to window (-copywinwin500).
+ *
+ * No application found using transparency.
+*----------------------------------------------------------------------------
+*/
+void
+OPTGX2SubsequentScreenToScreenCopy(ScrnInfoPtr pScreenInfo,
+				   int srcx, int srcy, int dstx, int dsty,
+				   int width, int height)
+{
+   unsigned int srcoffset, dstoffset, blt_mode, size;
+
+   DEBUGMSG(0, (0, 0, "Scr2scr %d %d %d %d %dx%d\n",
+		srcx, srcy, dstx, dsty, width, height));
+
+   size = (((unsigned int)width) << 16) | height;
+
+   blt_mode = Geode_blt_mode;
+
+   if (dstx > srcx) {
+      blt_mode |= MGP_BM_NEG_XDIR;
+      srcx += width - 1;
+      dstx += width - 1;
+   }
+   if (dsty > srcy) {
+      blt_mode |= MGP_BM_NEG_YDIR;
+      srcy += height - 1;
+      dsty += height - 1;
+   }
+
+   /* CALCULATE STARTING OFFSETS */
+
+   srcoffset = CALC_FBOFFSET(srcx, srcy);
+   dstoffset = CALC_FBOFFSET(dstx, dsty) & 0xFFFFFF;
+
+   /* TURN INTO BYTE ADDRESS IF NEGATIVE X DIRECTION */
+   /* This is a quirk of the hardware. */
+
+   if (Geode_blt_mode & MGP_BM_NEG_XDIR) {
+      srcoffset += (1 << gu2_xshift) - 1;
+      dstoffset += (1 << gu2_xshift) - 1;
+   }
+   /* POLL UNTIL ABLE TO WRITE TO THE REGISTERS */
+   /* Put off poll for as long as possible (do most calculations first). */
+
+   GU2_WAIT_PENDING;
+   WRITE_GP32(MGP_SRC_OFFSET, srcoffset);
+   WRITE_GP32(MGP_DST_OFFSET, dstoffset);
+   WRITE_GP32(MGP_WID_HEIGHT, size);
+   WRITE_GP32(MGP_BLT_MODE, blt_mode);
+}
+
+/*----------------------------------------------------------------------------
+ * OPTGX2SetupForImageWrite
+ *
+ * Description	:This function is used to set up the planemask and raster
+ *               for future Bliting functionality.(non durango version)
+ *
+ * Parameters:
+ *	pScreenInfo	:Screen handler pointer having screen information.
+ *      rop		:sets the raster operation
+ *	transparency_color	:tobeadded
+ *	planemask		:Specifies the value of masking from rop data
+ *      bpp			:bits per pixel of the source pixmap
+ *	depth			:depth of the source pixmap.
+ * Returns		:none
+ *
+ * Comments		:none
+*----------------------------------------------------------------------------
+*/
+void
+OPTGX2SetupForImageWrite(ScrnInfoPtr pScreenInfo,
+			 int rop, unsigned int planemask,
+			 int transparency_color, int bpp, int depth)
+{
+   OPTGX2SetupForScreenToScreenCopy(pScreenInfo,
+				    0, 0, rop, planemask, transparency_color);
+}
+
+void
+OPTGX2SubsequentImageWriteRect(ScrnInfoPtr pScreenInfo,
+			       int x, int y, int w, int h, int skipleft)
+{
+   Geodedstx = x;
+   Geodedsty = y;
+   Geodewidth = w;
+   Geodeheight = h;
+
+   SetImageWriteRect = 1;
+}
+
+/*----------------------------------------------------------------------------
+ * OPTGX2SetupForScanlineImageWrite
+ *
+ * Description	:This function is used to set up the planemask and raster
+ *               for future Bliting functionality.(non durango version)
+ *
+ * Parameters:
+ *	pScreenInfo	  :Screen handler pointer having screen information.
+ *      rop		  :sets the raster operation
+ *	transparency_color:tobeadded
+ *	planemask	  :Specifies the value of masking from rop data
+ *      bpp		  :bits per pixel of the source pixmap
+ *	depth		  :depth of the source pixmap.
+ * Returns		:none
+ *
+ * Comments		:none
+*----------------------------------------------------------------------------
+*/
+void
+OPTGX2SetupForScanlineImageWrite(ScrnInfoPtr pScreenInfo,
+				 int rop, unsigned int planemask,
+				 int transparency_color, int bpp, int depth)
+{
+   Geodebpp = bpp;
+   OPTGX2SetupForScreenToScreenCopy(pScreenInfo,
+				    0, 0, rop, planemask, transparency_color);
+}
+
+/*----------------------------------------------------------------------------
+ * OPTGX2SubsequentScanlineImageWriteRect
+ *
+ * Description	:This function is used to set up the x,y corordinates and width
+ *                &height for future Bliting functionality.(non durango version)
+ *
+ * Parameters:
+ *	pScreenInfo :Screen handler pointer having screen information.
+ *      x		:destination x
+ *	y		:destination y
+ *	w		:Specifies the width of the rectangle to be  copied
+ *	h		:Specifies the height of the rectangle to be  copied
+ * Returns		:none
+ *
+ * Comments		:none
+ *----------------------------------------------------------------------------
+*/
+void
+OPTGX2SubsequentScanlineImageWriteRect(ScrnInfoPtr pScreenInfo,
+				       int x, int y, int w, int h,
+				       int skipleft)
+{
+   Geodedstx = x;
+   Geodedsty = y;
+   Geodewidth = w;
+   Geodeheight = h;
+   GeodeCounter = 0;
+}
+
+/*----------------------------------------------------------------------------
+ * OPTGX2SubsquentImageWriteScanline
+ *
+ * Description	:This function is called to 
+ *               BLT  using the previously  specified planemask,raster
+ *               operation and transparency flag(non durango version)
+ *
+ * Parameters.
+ * 	pScreenInfo :Screen handler pointer having screen information.
+ *
+ * Returns	:none
+ *
+ * Comments	:The patterns specified is ignored inside the function
+ * Sample application uses (non-transparent):
+ *   - Moving windows.
+ *   - x11perf: scroll tests (-scroll500).
+ *   - x11perf: copy from window to window (-copywinwin500).
+ *
+ * No application found using transparency.
+*----------------------------------------------------------------------------
+*/
+
+void
+OPTGX2SubsequentImageWriteScanline(ScrnInfoPtr pScreenInfo, int bufno)
+{
+   GeodePtr pGeode;
+
+   int blt_height = 0;
+   char blit = FALSE;
+
+   pGeode = GEODEPTR(pScreenInfo);
+   GeodeCounter++;
+
+   if ((Geodeheight <= pGeode->NoOfImgBuffers) &&
+       (GeodeCounter == Geodeheight)) {
+      blit = TRUE;
+      blt_height = Geodeheight;
+   } else if ((Geodeheight > pGeode->NoOfImgBuffers)
+	      && (GeodeCounter == pGeode->NoOfImgBuffers)) {
+      blit = TRUE;
+      Geodeheight -= pGeode->NoOfImgBuffers;
+      blt_height = pGeode->NoOfImgBuffers;
+   } else
+      return;
+
+   if (blit) {
+      blit = FALSE;
+      GeodeCounter = 0;
+      OPTGX2SubsequentScreenToScreenCopy(pScreenInfo,
+					 Geodesrcx, Geodesrcy, Geodedstx,
+					 Geodedsty, Geodewidth, blt_height);
+      Geodedsty += blt_height;
+      GU2_WAIT_BUSY;
+   }
+}
+
+/*----------------------------------------------------------------------------
+ * OPTGX2SetupForSolidLine
+ *
+ * Description	:This function is used setup the solid line color for
+ *               future line draws.
+ *
+ *
+ * Parameters.
+ * 	pScreenInfo :Screen handler pointer having screen information.
+ *      color	:Specifies the color value od line
+ *      rop     :Specifies rop values.
+ *  Planemask	:Specifies planemask value.
+ * Returns		:none
+ *
+ * Comments		:none
+*----------------------------------------------------------------------------
+*/
+void
+OPTGX2SetupForSolidLine(ScrnInfoPtr pScreenInfo,
+			int color, int rop, unsigned int planemask)
+{
+   OPTGX2SetupForFillRectSolid(pScreenInfo, color, rop, planemask);
+}
+
+/*---------------------------------------------------------------------------
+ * OPTGX2SubsequentBresenhamLine
+ *
+ * Description	:This function is used to render a vector using the
+ *                 specified bresenham parameters.
+ *
+ * Parameters:
+ * pScreenInfo 	:Screen handler pointer having screen information.
+ *      x1  	:Specifies the starting x position
+ *      y1      :Specifies starting y possition
+ *      absmaj	:Specfies the Bresenman absolute major.
+ *	absmin	:Specfies the Bresenman absolute minor.
+ *	err     :Specifies the bresenham err term.
+ *	len     :Specifies the length of the vector interms of pixels.
+ *	octant  :not used in this function,may be added for standard
+ *                    interface.
+ * Returns		:none
+ *
+ * Comments     :none
+ * Sample application uses:
+ *   - Window outlines on window move.
+ *   - x11perf: line segments (-seg500).
+*----------------------------------------------------------------------------
+*/
+void
+OPTGX2SubsequentBresenhamLine(ScrnInfoPtr pScreenInfo,
+			      int x1, int y1, int absmaj, int absmin,
+			      int err, int len, int octant)
+{
+   int axial, init, diag;
+
+   DEBUGMSG(0, (0, 0, "BLine %d, %d, %d, %d, %d, %d, %d\n",
+		x1, y1, absmaj, absmin, err, len, octant));
+
+   /* DETERMINE BRESENHAM PARAMETERS */
+
+   axial = ((int)absmin << 1);
+   init = axial - (int)absmaj;
+   diag = init - (int)absmaj;
+
+   /* ADJUST INITIAL ERROR
+    * * Adjust by -1 for certain directions so that the vector 
+    * * hits the same pixels when drawn in either direction.
+    * * The Gamma value is assumed to account for the initial 
+    * * error adjustment for clipped lines.
+    */
+
+   init += err;
+
+   /* POLL UNTIL ABLE TO WRITE TO THE REGISTERS */
+   /* Put off poll for as long as possible (do most calculations first). */
+
+   GU2_WAIT_PENDING;
+   WRITE_GP32(MGP_DST_OFFSET, CALC_FBOFFSET(x1, y1));
+   WRITE_GP32(MGP_VEC_ERR,
+	      (((unsigned long)axial) << 16) | (unsigned short)diag);
+   WRITE_GP32(MGP_VEC_LEN,
+	      (((unsigned long)len) << 16) | (unsigned short)init);
+   WRITE_GP32(MGP_VECTOR_MODE,
+	      (Geode_vector_mode | vector_mode_table[octant]));
+}
+
+void
+OPTGX2SubsequentSolidTwoPointLine(ScrnInfoPtr pScreenInfo,
+				  int x0, int y0, int x1, int y1, int flags)
+{
+   long dx, dy, dmaj, dmin;
+   long axialerr, diagerr, initerr;
+   unsigned short vec_flags = 0;
+
+   dx = ABS(x1, x0);
+   dy = ABS(y1, y0);
+   if (dx >= dy) {
+      dmaj = dx;
+      dmin = dy;
+      vec_flags = VM_X_MAJOR;
+      if (x1 > x0)
+	 vec_flags |= VM_MAJOR_INC;
+      if (y1 > y0)
+	 vec_flags |= VM_MINOR_INC;
+   } else {
+      dmaj = dy;
+      dmin = dx;
+      vec_flags = VM_Y_MAJOR;
+      if (x1 > x0)
+	 vec_flags |= VM_MINOR_INC;
+      if (y1 > y0)
+	 vec_flags |= VM_MAJOR_INC;
+   }
+
+   axialerr = dmin << 1;
+   diagerr = (dmin - dmaj) << 1;
+   initerr = (axialerr - dmaj);
+
+   if (!(vec_flags & VM_MINOR_INC))
+      initerr--;
+
+   GU2_WAIT_PENDING;
+   WRITE_GP32(MGP_DST_OFFSET, CALC_FBOFFSET(x0, y0));
+   WRITE_GP32(MGP_VEC_ERR,
+	      (((unsigned long)axialerr) << 16) | (unsigned short)diagerr);
+   WRITE_GP32(MGP_VEC_LEN,
+	      (((unsigned long)dmaj) << 16) | (unsigned short)initerr);
+   WRITE_GP32(MGP_VECTOR_MODE, (Geode_vector_mode | vec_flags));
+}
+
+/*---------------------------------------------------------------------------
+ * OPTGX2SubsequentHorVertLine
+ *
+ * This routine is called to render a vector using the specified Bresenham
+ * parameters.  
+ *
+ * Sample application uses:
+ *   - Window outlines on window move.
+ *   - x11perf: line segments (-hseg500).
+ *   - x11perf: line segments (-vseg500).
+ *---------------------------------------------------------------------------
+ */
+void
+OPTGX2SubsequentHorVertLine(ScrnInfoPtr pScreenInfo,
+			    int x, int y, int len, int dir)
+{
+   DEBUGMSG(0, (0, 0, "HLine %d, %d, %d, %d\n", x, y, len, dir));
+#if 1
+   GFX_PATTERN_FILL(x, y,
+		    (unsigned short)((dir == DEGREES_0) ? len : 1),
+		    (unsigned short)((dir == DEGREES_0) ? 1 : len));
+#else
+   GU2_WAIT_PENDING;
+   WRITE_GP32(MGP_DST_OFFSET, CALC_FBOFFSET(x, y));
+   WRITE_GP32(MGP_VEC_ERR, 0);
+   WRITE_GP32(MGP_VEC_LEN,
+	      (((unsigned long)len) << 16) | (unsigned short)-len);
+   WRITE_GP32(MGP_VECTOR_MODE,
+	      (Geode_vector_mode |
+	       vector_mode_table[(dir == DEGREES_0) ? 2 : 5]));
+#endif
+}
+
+#if DASHED_SUPPORT
+/* Setup for XAA dashed lines.
+
+   Tests: xtest CH05/stdshs, XFree86/drwln
+
+   x11perf -dseg100  
+   x11perf -dline100 
+   x11perf -ddline100
+*/
+void
+OPTGX2SetupForDashedLine(ScrnInfoPtr pScrn, int fg, int bg, int rop,
+			 unsigned int planemask, int length,
+			 unsigned char *pattern)
+{
+   GeodePtr pGeode = GEODEPTR(pScrn);
+   CARD32 *pat = (CARD32 *) pattern;
+   CARD32 pat8x8[2];
+
+   pat8x8[0] = pat[0];
+   switch (length) {
+   case 2:
+      pat8x8[0] |= PAT_SHIFT(pat8x8[0], 2);	/* fall through */
+   case 4:
+      pat8x8[0] |= PAT_SHIFT(pat8x8[0], 4);	/* fall through */
+   case 8:
+      pat8x8[0] |= PAT_SHIFT(pat8x8[0], 8);	/* fall through */
+   case 16:
+      pat8x8[0] |= PAT_SHIFT(pat8x8[0], 16);
+   case 32:
+      pat8x8[1] = pat8x8[0];
+      break;
+   case 64:
+      pat8x8[1] = pat[1];
+      break;
+   default:
+      BuildPattern(pat[0], length, pat8x8);
+   }
+   /* LOAD PATTERN COLORS AND DATA */
+
+   /* SET PATTERN FLAGS */
+
+   if (planemask == 0xFFFFFFFF) {
+      GeodeROP = XAAPatternROP[rop & 0x0F];
+   } else {
+      GeodeROP = XAAPatternROP_PM[rop & 0x0F];
+   }
+   if (bg == -1)
+      GeodeROP |= MGP_RM_PAT_MONO | MGP_RM_PAT_TRANS;
+   else
+      GeodeROP |= MGP_RM_PAT_MONO;
+
+   if ((GeodeROP & 0x55) ^ ((GeodeROP >> 1) & 0x55)) {
+      Geode_blt_mode = MGP_BM_DST_REQ;
+      Geode_vector_mode = MGP_VM_DST_REQ;
+   } else {
+      Geode_blt_mode = MGP_BM_SRC_MONO;
+      Geode_vector_mode = 0;
+   }
+
+   /* POLL UNTIL ABLE TO WRITE THE PATTERN COLOR */
+
+   GU2_WAIT_PENDING;
+   WRITE_GP32(MGP_RASTER_MODE, gu2_bpp | GeodeROP);
+   WRITE_GP32(MGP_PAT_COLOR_0, bg);
+   WRITE_GP32(MGP_PAT_COLOR_1, fg);
+   WRITE_GP32(MGP_PAT_DATA_0, pat8x8[0]);
+   WRITE_GP32(MGP_PAT_DATA_1, pat8x8[1]);
+   WRITE_GP32(MGP_STRIDE, pGeode->Pitch);
+
+}
+
+void
+OPTGX2SubsequentDashedBresenhamLine(ScrnInfoPtr pScreenInfo,
+				    int x1, int y1, int absmaj, int absmin,
+				    int err, int len, int octant)
+{
+   int axial, init, diag;
+   unsigned long gu2_pattern_origin;
+
+   DEBUGMSG(0, (0, 0, "BLine %d, %d, %d, %d, %d, %d, %d\n",
+		x1, y1, absmaj, absmin, err, len, octant));
+
+   /* CHECK NULL LENGTH */
+
+   if (!len)
+      return;
+
+   /* DETERMINE BRESENHAM PARAMETERS */
+
+   axial = ((int)absmin << 1);
+   init = axial - (int)absmaj;
+   diag = init - (int)absmaj;
+
+   /* ADJUST INITIAL ERROR
+    * * Adjust by -1 for certain directions so that the vector 
+    * * hits the same pixels when drawn in either direction.
+    * * The Gamma value is assumed to account for the initial 
+    * * error adjustment for clipped lines.
+    */
+
+   init += err;
+
+   /* CALL ROUTINE TO DRAW VECTOR */
+
+   gu2_pattern_origin = (((unsigned long)(x1 & 7)) << 26) |
+	 (((unsigned long)(y1 & 7)) << 29);
+
+   /* POLL UNTIL ABLE TO WRITE TO THE REGISTERS */
+   /* Put off poll for as long as possible (do most calculations first). */
+
+   GU2_WAIT_PENDING;
+   WRITE_GP32(MGP_DST_OFFSET, (CALC_FBOFFSET(x1, y1) & 0x00FFFFFF) |
+	      gu2_pattern_origin);
+   WRITE_GP32(MGP_VEC_ERR,
+	      (((unsigned long)axial) << 16) | (unsigned short)diag);
+   WRITE_GP32(MGP_VEC_LEN,
+	      (((unsigned long)len) << 16) | (unsigned short)init);
+   WRITE_GP32(MGP_VECTOR_MODE, (Geode_vector_mode |
+				vector_mode_table[octant]));
+}
+
+void
+OPTGX2SubsequentDashedTwoPointLine(ScrnInfoPtr pScreenInfo,
+				   int x0, int y0, int x1, int y1, int flags)
+{
+   long dx, dy, dmaj, dmin;
+   long axialerr, diagerr, initerr;
+   unsigned long gu2_pattern_origin;
+   unsigned short vec_flags = 0;
+
+   dx = ABS(x1, x0);
+   dy = ABS(y1, y0);
+   if (dx >= dy) {
+      dmaj = dx;
+      dmin = dy;
+      vec_flags = VM_X_MAJOR;
+      if (x1 > x0)
+	 vec_flags |= VM_MAJOR_INC;
+      if (y1 > y0)
+	 vec_flags |= VM_MINOR_INC;
+   } else {
+      dmaj = dy;
+      dmin = dx;
+      vec_flags = VM_Y_MAJOR;
+      if (x1 > x0)
+	 vec_flags |= VM_MINOR_INC;
+      if (y1 > y0)
+	 vec_flags |= VM_MAJOR_INC;
+   }
+
+   axialerr = dmin << 1;
+   diagerr = (dmin - dmaj) << 1;
+   initerr = (axialerr - dmaj);
+
+   if (!(vec_flags & VM_MINOR_INC))
+      initerr--;
+
+   /* CALL ROUTINE TO DRAW VECTOR */
+
+   gu2_pattern_origin = (((unsigned long)(x0 & 7)) << 26) |
+	 (((unsigned long)(y0 & 7)) << 29);
+
+   GU2_WAIT_PENDING;
+   WRITE_GP32(MGP_DST_OFFSET, (CALC_FBOFFSET(x0, y0) & 0x00FFFFFF) |
+	      gu2_pattern_origin);
+   WRITE_GP32(MGP_VEC_ERR,
+	      (((unsigned long)axialerr) << 16) | (unsigned short)diagerr);
+   WRITE_GP32(MGP_VEC_LEN,
+	      (((unsigned long)dmaj) << 16) | (unsigned short)initerr);
+   WRITE_GP16(MGP_VECTOR_MODE, (Geode_vector_mode | vec_flags));
+}
+#endif /* DASHED_SUPPORT */
+#endif /* STB_X */
+
+#if 0
+void
+GX2WriteBitmap(ScrnInfoPtr pScrn, int x, int y, int w, int h,
+	       unsigned char *src, int srcwidth, int skipleft,
+	       int fg, int bg, int rop, unsigned int planemask)
+{
+   GFX(set_solid_pattern(planemask));
+   GFX(set_mono_source(bg, fg, (bg == -1)));
+
+   /* USE NORMAL PATTERN ROPs IF ALL PLANES ARE ENABLED */
+   GFX(set_raster_operation(windowsROPpatMask[rop & 0x0F]));
+   GFX(mono_bitmap_to_screen_blt_swp(0, 0, x, y,
+				     srcwidth << 3, h, src, srcwidth));
+}
+
+void
+GX2WritePixmap(ScrnInfoPtr pScrn, int x, int y, int w, int h, unsigned char *src, int srcwidth,	/* bytes */
+	       int rop, unsigned int planemask, int trans, int bpp, int depth)
+{
+   /*
+    * ErrorF("GX2WritePixmap %d %d %d %d %X %d %d %d, %d\n",
+    * x, y, w,  h, src, srcwidth, bpp, depth, trans);
+    */
+   GFX(set_solid_pattern(planemask));
+
+   /* USE NORMAL PATTERN ROPs IF ALL PLANES ARE ENABLED */
+   GFX(set_raster_operation(windowsROPpatMask[rop & 0x0F]));
+   if (trans == -1) {
+      GFX(color_bitmap_to_screen_blt(0, 0, x, y, w, h, src, srcwidth));
+   } else {
+      GFX(color_bitmap_to_screen_xblt(0, 0, x, y, w, h, src,
+				      srcwidth, trans));
+   }
+}
+
+void
+GX2ReadPixmap(ScrnInfoPtr pScrn, int x, int y, int w, int h,
+	      unsigned char *dst, int dstwidth, int bpp, int depth)
+{
+   ErrorF("GX2ReadPixmap %d %d %d %d %X %d %d %d\n",
+	  x, y, w, h, dst, dstwidth, bpp, depth);
+}
+#endif
+/**************************************************************************/
+
+/*----------------------------------------------------------------------------
+ * GX2AccelInit.
+ *
+ * Description	:This function sets up the supported acceleration routines and
+ *                 appropriate flags.
+ *
+ * Parameters:
+ *      pScreen	:Screeen pointer structure.
+ *
+ * Returns		:TRUE on success and FALSE on Failure
+ *
+ * Comments		:This function is called in GX2ScreenInit in
+                     geode_driver.c to set  * the acceleration.
+*----------------------------------------------------------------------------
+*/
+Bool
+GX2AccelInit(ScreenPtr pScreen)
+{
+   GeodePtr pGeode;
+   ScrnInfoPtr pScreenInfo;
+
+   pScreenInfo = xf86Screens[pScreen->myNum];
+   pGeode = GEODEPTR(pScreenInfo);
+
+   switch (pScreenInfo->bitsPerPixel) {
+   case 8:
+      gu2_bpp = MGP_RM_BPPFMT_332;
+      break;
+   case 16:
+      gu2_bpp = MGP_RM_BPPFMT_565;
+      break;
+   case 32:
+      gu2_bpp = MGP_RM_BPPFMT_8888;
+      break;
+   }
+
+   gu2_xshift = pScreenInfo->bitsPerPixel >> 4;
+
+   switch (pGeode->Pitch) {
+   case 1024:
+      gu2_yshift = 10;
+      break;
+   case 2048:
+      gu2_yshift = 11;
+      break;
+   case 4096:
+      gu2_yshift = 12;
+      break;
+   case 8192:
+      gu2_yshift = 13;
+      break;
+   }
+
+   /* Getting the pointer for acceleration Inforecord */
+   pGeode->AccelInfoRec = localRecPtr = XAACreateInfoRec();
+
+   /* SET ACCELERATION FLAGS */
+   localRecPtr->Flags = PIXMAP_CACHE | OFFSCREEN_PIXMAPS | LINEAR_FRAMEBUFFER;
+
+   /* HOOK SYNCRONIZARION ROUTINE */
+   localRecPtr->Sync = GX2AccelSync;
+
+   /* HOOK FILLED RECTANGLES */
+   localRecPtr->SetupForSolidFill = OPTACCEL(GX2SetupForFillRectSolid);
+   localRecPtr->SubsequentSolidFillRect =
+	 OPTACCEL(GX2SubsequentFillRectSolid);
+   localRecPtr->SolidFillFlags = 0;
+
+   /* HOOK 8x8 Mono EXPAND PATTERNS */
+   localRecPtr->SetupForMono8x8PatternFill = GX2SetupFor8x8PatternMonoExpand;
+   localRecPtr->SubsequentMono8x8PatternFillRect =
+	 GX2Subsequent8x8PatternMonoExpand;
+   localRecPtr->Mono8x8PatternFillFlags = BIT_ORDER_IN_BYTE_MSBFIRST |
+	 HARDWARE_PATTERN_PROGRAMMED_BITS | HARDWARE_PATTERN_SCREEN_ORIGIN;
+
+   localRecPtr->SetupForColor8x8PatternFill =
+	 GX2SetupFor8x8PatternColorExpand;
+   localRecPtr->SubsequentColor8x8PatternFillRect =
+	 GX2Subsequent8x8PatternColorExpand;
+   /* Color expansion */
+   localRecPtr->Color8x8PatternFillFlags =
+	 BIT_ORDER_IN_BYTE_MSBFIRST |
+	 SCANLINE_PAD_DWORD | HARDWARE_PATTERN_SCREEN_ORIGIN;
+
+   /* HOOK SCREEN TO SCREEN COPIES
+    * * Set flag to only allow copy if transparency is enabled.
+    */
+   localRecPtr->SetupForScreenToScreenCopy =
+	 OPTACCEL(GX2SetupForScreenToScreenCopy);
+   localRecPtr->SubsequentScreenToScreenCopy =
+	 OPTACCEL(GX2SubsequentScreenToScreenCopy);
+   localRecPtr->ScreenToScreenCopyFlags = 0;
+
+   /* HOOK BRESENHAM SOLID LINES */
+   /* Do not hook unless flag can be set preventing use of planemask. */
+   localRecPtr->SolidLineFlags = NO_PLANEMASK;
+   localRecPtr->SetupForSolidLine = OPTACCEL(GX2SetupForSolidLine);
+   localRecPtr->SubsequentSolidBresenhamLine =
+	 OPTACCEL(GX2SubsequentBresenhamLine);
+   localRecPtr->SubsequentSolidHorVertLine =
+	 OPTACCEL(GX2SubsequentHorVertLine);
+   localRecPtr->SubsequentSolidTwoPointLine =
+	 OPTACCEL(GX2SubsequentSolidTwoPointLine);
+   localRecPtr->SolidBresenhamLineErrorTermBits = 15;
+
+#if DASHED_SUPPORT
+   localRecPtr->SetupForDashedLine = OPTACCEL(GX2SetupForDashedLine);
+   localRecPtr->SubsequentDashedBresenhamLine =
+	 OPTACCEL(GX2SubsequentDashedBresenhamLine);
+   localRecPtr->SubsequentSolidTwoPointLine =
+	 OPTACCEL(GX2SubsequentDashedTwoPointLine);
+   localRecPtr->DashedBresenhamLineErrorTermBits = 15;
+   localRecPtr->DashPatternMaxLength = 64;
+   localRecPtr->DashedLineFlags = NO_PLANEMASK |
+	 LINE_PATTERN_POWER_OF_2_ONLY | LINE_PATTERN_MSBFIRST_MSBJUSTIFIED;
+#endif
+#if SCR2SCREXP
+   /* Color expansion */
+   localRecPtr->ScreenToScreenColorExpandFillFlags =
+	 BIT_ORDER_IN_BYTE_MSBFIRST | NO_TRANSPARENCY;
+
+   localRecPtr->SetupForScreenToScreenColorExpandFill =
+	 (GX2SetupForScreenToScreenColorExpandFill);
+   localRecPtr->SubsequentScreenToScreenColorExpandFill =
+	 (GX2SubsequentScreenToScreenColorExpandFill);
+#endif
+   /*
+    * ImageWrite.  
+    *
+    * SInce this uses off-screen scanline buffers, it is only of use when
+    * complex ROPs are used. But since the current XAA pixmap cache code
+    * only works when an ImageWrite is provided, the NO_GXCOPY flag is
+    * temporarily disabled.
+    */
+   if (pGeode->AccelImageWriteBufferOffsets) {
+      /* Color expansion */
+      localRecPtr->CPUToScreenColorExpandFillFlags =
+	    BIT_ORDER_IN_BYTE_MSBFIRST |
+	    NO_PLANEMASK | SYNC_AFTER_COLOR_EXPAND | SCANLINE_PAD_DWORD;
+      localRecPtr->ColorExpandBase = pGeode->AccelImageWriteBufferOffsets[0];
+      localRecPtr->ColorExpandRange = pGeode->NoOfImgBuffers << gu2_yshift;
+
+      localRecPtr->SetupForCPUToScreenColorExpandFill =
+	    OPTACCEL(GX2SetupForCPUToScreenColorExpandFill);
+      localRecPtr->SubsequentCPUToScreenColorExpandFill =
+	    OPTACCEL(GX2SubsequentCPUToScreenColorExpandFill);
+
+#if IMGWRITE_SUPPORT
+      localRecPtr->ImageWriteFlags = NO_PLANEMASK |
+	    SCANLINE_PAD_DWORD | SYNC_AFTER_IMAGE_WRITE;
+      localRecPtr->ImageWriteBase = pGeode->AccelImageWriteBufferOffsets[0];
+      localRecPtr->ImageWriteRange = pGeode->NoOfImgBuffers << gu2_yshift;
+      localRecPtr->SetupForImageWrite = OPTACCEL(GX2SetupForImageWrite);
+      localRecPtr->SubsequentImageWriteRect =
+	    OPTACCEL(GX2SubsequentImageWriteRect);
+#endif /* IMGWRITE_SUPPORT */
+
+      localRecPtr->ScanlineImageWriteFlags =
+	    localRecPtr->ScreenToScreenCopyFlags;
+      localRecPtr->ScanlineImageWriteBuffers =
+	    pGeode->AccelImageWriteBufferOffsets;
+      localRecPtr->NumScanlineImageWriteBuffers = pGeode->NoOfImgBuffers;
+      localRecPtr->ImageWriteRange = pGeode->NoOfImgBuffers << gu2_yshift;
+      localRecPtr->SetupForScanlineImageWrite =
+	    OPTACCEL(GX2SetupForScanlineImageWrite);
+      localRecPtr->SubsequentScanlineImageWriteRect =
+	    OPTACCEL(GX2SubsequentScanlineImageWriteRect);
+      localRecPtr->SubsequentImageWriteScanline =
+	    OPTACCEL(GX2SubsequentImageWriteScanline);
+
+      ImgBufOffset = pGeode->AccelImageWriteBufferOffsets[0] - pGeode->FBBase;
+      Geodesrcy = ImgBufOffset >> gu2_yshift;
+
+      Geodesrcx = ImgBufOffset & (pGeode->Pitch - 1);
+      Geodesrcx /= (pScreenInfo->bitsPerPixel >> 3);
+   } else {
+      localRecPtr->PixmapCacheFlags = DO_NOT_BLIT_STIPPLES;
+   }
+#if 0
+#if !defined(STB_X)
+   localRecPtr->WriteBitmap = GX2WriteBitmap;
+#endif
+   localRecPtr->WritePixmap = GX2WritePixmap;
+   localRecPtr->ReadPixmap = GX2ReadPixmap;
+#endif
+
+   return (XAAInit(pScreen, localRecPtr));
+}
+
+/* END OF FILE */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_gx2_cursor.c b/xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_gx2_cursor.c
new file mode 100644
index 000000000..f0adbd455
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_gx2_cursor.c
@@ -0,0 +1,393 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_gx2_cursor.c,v 1.5 2003/02/21 16:51:09 alanh Exp $ */
+/*
+ * $Workfile: nsc_gx2_cursor.c $
+ * $Revision: 1.2.2.1 $
+ * $Author: ldelgass $
+ *
+ * File Contents: Xfree cursor implementation routines
+ *                for geode HWcursor init.setting cursor color,image etc
+ *                are done here.
+ * Project:       Geode Xfree Frame buffer device driver.
+ *
+ */
+
+/* 
+ * NSC_LIC_ALTERNATIVE_PREAMBLE
+ *
+ * Revision 1.0
+ *
+ * National Semiconductor Alternative GPL-BSD License
+ *
+ * National Semiconductor Corporation licenses this software 
+ * ("Software"):
+ *
+ * National Xfree frame buffer driver
+ *
+ * under one of the two following licenses, depending on how the 
+ * Software is received by the Licensee.
+ * 
+ * If this Software is received as part of the Linux Framebuffer or
+ * other GPL licensed software, then the GPL license designated 
+ * NSC_LIC_GPL applies to this Software; in all other circumstances 
+ * then the BSD-style license designated NSC_LIC_BSD shall apply.
+ *
+ * END_NSC_LIC_ALTERNATIVE_PREAMBLE */
+
+/* NSC_LIC_BSD
+ *
+ * National Semiconductor Corporation Open Source License for 
+ *
+ * National Xfree frame buffer driver
+ *
+ * (BSD License with Export Notice)
+ *
+ * Copyright (c) 1999-2001
+ * National Semiconductor Corporation.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met: 
+ *
+ *   * Redistributions of source code must retain the above copyright 
+ *     notice, this list of conditions and the following disclaimer. 
+ *
+ *   * Redistributions in binary form must reproduce the above 
+ *     copyright notice, this list of conditions and the following 
+ *     disclaimer in the documentation and/or other materials provided 
+ *     with the distribution. 
+ *
+ *   * Neither the name of the National Semiconductor Corporation nor 
+ *     the names of its contributors may be used to endorse or promote 
+ *     products derived from this software without specific prior 
+ *     written permission. 
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+ * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE,
+ * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE.
+ *
+ * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
+ * YOUR JURISDICTION. It is licensee's responsibility to comply with 
+ * any export regulations applicable in licensee's jurisdiction. Under 
+ * CURRENT (2001) U.S. export regulations this software 
+ * is eligible for export from the U.S. and can be downloaded by or 
+ * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
+ * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
+ * Syria, Sudan, Afghanistan and any other country to which the U.S. 
+ * has embargoed goods and services. 
+ *
+ * END_NSC_LIC_BSD */
+
+/* NSC_LIC_GPL
+ *
+ * National Semiconductor Corporation Gnu General Public License for 
+ *
+ * National Xfree frame buffer driver
+ *
+ * (GPL License with Export Notice)
+ *
+ * Copyright (c) 1999-2001
+ * National Semiconductor Corporation.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted under the terms of the GNU General 
+ * Public License as published by the Free Software Foundation; either 
+ * version 2 of the License, or (at your option) any later version  
+ *
+ * In addition to the terms of the GNU General Public License, neither 
+ * the name of the National Semiconductor Corporation nor the names of 
+ * its contributors may be used to endorse or promote products derived 
+ * from this software without specific prior written permission. 
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+ * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, 
+ * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE. See the GNU General Public License for more details. 
+ *
+ * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
+ * YOUR JURISDICTION. It is licensee's responsibility to comply with 
+ * any export regulations applicable in licensee's jurisdiction. Under 
+ * CURRENT (2001) U.S. export regulations this software 
+ * is eligible for export from the U.S. and can be downloaded by or 
+ * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
+ * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
+ * Syria, Sudan, Afghanistan and any other country to which the U.S. 
+ * has embargoed goods and services. 
+ *
+ * You should have received a copy of the GNU General Public License 
+ * along with this file; if not, write to the Free Software Foundation, 
+ * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 
+ *
+ * END_NSC_LIC_GPL */
+
+#include "xf86.h"
+#include "xf86_OSproc.h"
+#include "xf86_ansic.h"
+#include "xf86Pci.h"
+#include "xf86PciInfo.h"
+#include "nsc.h"
+
+/* Forward declarations of the functions */
+Bool GX2HWCursorInit(ScreenPtr pScreen);
+static void GX2SetCursorColors(ScrnInfoPtr pScreenInfo, int bg, int fg);
+static void GX2SetCursorPosition(ScrnInfoPtr pScreenInfo, int x, int y);
+void GX2LoadCursorImage(ScrnInfoPtr pScreenInfo, unsigned char *src);
+void GX2HideCursor(ScrnInfoPtr pScreenInfo);
+void GX2ShowCursor(ScrnInfoPtr pScreenInfo);
+static Bool GX2UseHWCursor(ScreenPtr pScreen, CursorPtr pCurs);
+extern void GX2SetVideoPosition(int x, int y, int width, int height,
+				short src_w, short src_h, short drw_w,
+				short drw_h, int id, int offset,
+				ScrnInfoPtr pScrn);
+
+/*----------------------------------------------------------------------------
+ * GX2HWCursorInit.
+ *
+ * Description	:This function sets the cursor information by probing the
+ * hardware.
+ *
+ * Parameters.
+ *     pScreen	:Screeen pointer structure.
+ *
+ * Returns		:TRUE on success and FALSE on Failure
+ *
+ * Comments		:Geode supports the hardware_cursor,no need to enable SW
+ *                    cursor.
+*----------------------------------------------------------------------------
+*/
+Bool
+GX2HWCursorInit(ScreenPtr pScreen)
+{
+   ScrnInfoPtr pScreenInfo = xf86Screens[pScreen->myNum];
+   GeodePtr pGeode = GEODEPTR(pScreenInfo);
+   xf86CursorInfoPtr infoPtr;
+
+   infoPtr = xf86CreateCursorInfoRec();
+   if (!infoPtr)
+      return FALSE;
+   /* the geode structure is intiallized with the cursor infoRec */
+   pGeode->CursorInfo = infoPtr;
+   infoPtr->MaxWidth = 32;
+   infoPtr->MaxHeight = 32;
+   /* seeting up the cursor flags */
+   infoPtr->Flags = HARDWARE_CURSOR_BIT_ORDER_MSBFIRST |
+	 HARDWARE_CURSOR_TRUECOLOR_AT_8BPP |
+	 HARDWARE_CURSOR_SOURCE_MASK_NOT_INTERLEAVED;
+   /* cursor info ptr is intiallized with the values obtained from
+    * * durnago calls
+    */
+   infoPtr->SetCursorColors = GX2SetCursorColors;
+   infoPtr->SetCursorPosition = GX2SetCursorPosition;
+   infoPtr->LoadCursorImage = GX2LoadCursorImage;
+   infoPtr->HideCursor = GX2HideCursor;
+   infoPtr->ShowCursor = GX2ShowCursor;
+   infoPtr->UseHWCursor = GX2UseHWCursor;
+   return (xf86InitCursor(pScreen, infoPtr));
+}
+
+/*----------------------------------------------------------------------------
+ * GX2SetCursorColors.
+ *
+ * Description	:This function sets the cursor foreground and background
+ *                    colors
+ * Parameters:
+ *    pScreen:	Screeen pointer structure.
+ *    	   bg:	Specifies the color value of cursor background color.
+ *    	   fg:	Specifies the color value of cursor foreground color.
+ *    Returns:	none.
+ *
+ *   Comments:	The integer color value passed by this function is
+ *              converted into  * RGB  value by the gfx_set_color routines.
+ *----------------------------------------------------------------------------
+ */
+static void
+GX2SetCursorColors(ScrnInfoPtr pScreenInfo, int bg, int fg)
+{
+   GFX(set_cursor_colors(bg, fg));
+}
+
+/*----------------------------------------------------------------------------
+ * GX2SetCursorPosition.
+ *
+ * Description	:This function sets the cursor co -ordinates and enable the
+ *               cursor.
+ *
+ * Parameters:
+ *    pScreen: Screeen pointer structure.
+ *    	    x: Specifies the x-cordinates of the cursor.
+ *    	    y: Specifies the y co-ordinate of the cursor.
+ *    Returns: none.
+ *
+ *----------------------------------------------------------------------------
+ */
+static void
+GX2SetCursorPosition(ScrnInfoPtr pScreenInfo, int x, int y)
+{
+   unsigned long offset;
+   static int panOffset = 0;
+   GeodePtr pGeode = GEODEPTR(pScreenInfo);
+
+   unsigned short xhot = 0, yhot = 0;
+
+   if (x < 0) {
+      xhot = (unsigned short)(-x);
+      x = 0;
+   }
+   if (y < 0) {
+      yhot = (unsigned short)(-y);
+      y = 0;
+   }
+
+   GFX(set_cursor_position(pGeode->CursorStartOffset, x, y, xhot, yhot));
+   GFX(set_cursor_enable(1));
+
+   if ((pGeode->OverlayON) && (pGeode->Panel)) {
+#if defined(STB_X)
+      Gal_get_display_offset(&offset);
+#else
+      offset = gfx_get_display_offset();
+#endif
+      if (offset != panOffset) {
+	 GX2SetVideoPosition(pGeode->video_x, pGeode->video_y,
+			     pGeode->video_w, pGeode->video_h,
+			     pGeode->video_srcw, pGeode->video_srch,
+			     pGeode->video_dstw, pGeode->video_dsth,
+			     pGeode->video_id, pGeode->video_offset,
+			     pGeode->video_scrnptr);
+	 panOffset = offset;
+      }
+   }
+}
+
+/*----------------------------------------------------------------------------
+ * GX2LoadCursorImage
+ *
+ * Description	:This function loads the 32x32 cursor pattern.The shape
+ *               and color is set by AND and XOR masking of arrays of 32
+ *               DWORD.
+ * Parameters:
+ *    pScreen: Screeen pointer structure.
+ *    src    : Specifies cursor data.
+ * Returns   : none
+ *
+ *----------------------------------------------------------------------------
+*/
+void
+GX2LoadCursorImage(ScrnInfoPtr pScreenInfo, unsigned char *src)
+{
+   int i, j;
+   unsigned long shape;
+   unsigned long mask;
+   unsigned long andMask[32] = { 0, };
+   unsigned long xorMask[32] = { 0, };
+   GeodePtr pGeode = GEODEPTR(pScreenInfo);
+
+   j = 0;
+   for (i = 0; i < 32; i++) {
+      if (src) {
+	 shape = ((unsigned long)src[i * 4] << 24) |
+	       ((unsigned long)src[i * 4 + 1] << 16) |
+	       ((unsigned long)src[i * 4 + 2] << 8) |
+	       ((unsigned long)src[i * 4 + 3] << 0);
+	 mask = ((unsigned long)src[i * 4 + 128] << 24) |
+	       ((unsigned long)src[i * 4 + 1 + 128] << 16) |
+	       ((unsigned long)src[i * 4 + 2 + 128] << 8) |
+	       ((unsigned long)src[i * 4 + 3 + 128] << 0);
+      } else {
+	 mask = 0x0;
+	 shape = 0xFFFFFFFF;
+      }
+
+      andMask[i] = ~(mask);
+      xorMask[i] = shape & mask;
+   }
+
+   GFX(set_cursor_shape32(pGeode->CursorStartOffset, andMask, xorMask));
+}
+
+/*----------------------------------------------------------------------------
+ * GX2HideCursor.
+ *
+ * Description	:This function will disable the cursor.
+ *
+ * Parameters:
+ *    pScreen: Handles to the Screeen pointer structure.
+ *
+ *    Returns: none.
+ *
+ *   Comments:	gfx_set_cursor enable function is hardcoded to disable
+ *		the cursor.
+ *----------------------------------------------------------------------------
+ */
+void
+GX2HideCursor(ScrnInfoPtr pScreenInfo)
+{
+   GFX(set_cursor_enable(0));
+}
+
+/*----------------------------------------------------------------------------
+ * GX2ShowCursor
+ *
+ * Description	:This function will enable  the cursor.
+ *
+ * Parameters:
+ *	pScreen		:Handles to the Screeen pointer structure.
+ *
+ * Returns      :none
+ *
+ * Comments		:gfx_set_cursor enable function is hardcoded to enable the
+ * 											cursor
+ *----------------------------------------------------------------------------
+*/
+void
+GX2ShowCursor(ScrnInfoPtr pScreenInfo)
+{
+   GFX(set_cursor_enable(1));
+}
+
+/*----------------------------------------------------------------------------
+ * GX2UseHwCursor.
+ *
+ * Description	:This function will sets the hardware cursor flag in
+ *                 pscreen  structure.
+ *
+ * Parameters.
+ *	pScreen		:Handles to the Screeen pointer structure.
+ *
+ * Returns		:none
+ *
+ * Comments		:none
+ *
+ *----------------------------------------------------------------------------
+*/
+static Bool
+GX2UseHWCursor(ScreenPtr pScreen, CursorPtr pCurs)
+{
+   ScrnInfoPtr pScreenInfo = XF86SCRNINFO(pScreen);
+
+   if (pScreenInfo->currentMode->Flags & V_DBLSCAN)
+      return FALSE;
+   return TRUE;
+}
+
+/* End of File */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_gx2_dga.c b/xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_gx2_dga.c
new file mode 100644
index 000000000..1fde3a8c1
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_gx2_dga.c
@@ -0,0 +1,509 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_gx2_dga.c,v 1.2 2003/01/14 09:34:32 alanh Exp $ */
+/*
+ * $Workfile: nsc_gx2_dga.c $
+ * $Revision: 1.2.2.1 $
+ * $Author: ldelgass $
+ * 
+ * File contents: DGA(Direct Acess Graphics mode) is feature of
+ *                XFree86 that allows the program to access directly to video
+ *                memory on the graphics card.DGA supports the double
+ *                flickering.This file has the functions to support the DGA
+ *                modes.
+ *
+ * Project:       Geode Xfree Frame buffer device driver.
+ *
+ */
+
+/* 
+ * NSC_LIC_ALTERNATIVE_PREAMBLE
+ *
+ * Revision 1.0
+ *
+ * National Semiconductor Alternative GPL-BSD License
+ *
+ * National Semiconductor Corporation licenses this software 
+ * ("Software"):
+ *
+ * National Xfree frame buffer driver
+ *
+ * under one of the two following licenses, depending on how the 
+ * Software is received by the Licensee.
+ * 
+ * If this Software is received as part of the Linux Framebuffer or
+ * other GPL licensed software, then the GPL license designated 
+ * NSC_LIC_GPL applies to this Software; in all other circumstances 
+ * then the BSD-style license designated NSC_LIC_BSD shall apply.
+ *
+ * END_NSC_LIC_ALTERNATIVE_PREAMBLE */
+
+/* NSC_LIC_BSD
+ *
+ * National Semiconductor Corporation Open Source License for 
+ *
+ * National Xfree frame buffer driver
+ *
+ * (BSD License with Export Notice)
+ *
+ * Copyright (c) 1999-2001
+ * National Semiconductor Corporation.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met: 
+ *
+ *   * Redistributions of source code must retain the above copyright 
+ *     notice, this list of conditions and the following disclaimer. 
+ *
+ *   * Redistributions in binary form must reproduce the above 
+ *     copyright notice, this list of conditions and the following 
+ *     disclaimer in the documentation and/or other materials provided 
+ *     with the distribution. 
+ *
+ *   * Neither the name of the National Semiconductor Corporation nor 
+ *     the names of its contributors may be used to endorse or promote 
+ *     products derived from this software without specific prior 
+ *     written permission. 
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+ * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE,
+ * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE.
+ *
+ * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
+ * YOUR JURISDICTION. It is licensee's responsibility to comply with 
+ * any export regulations applicable in licensee's jurisdiction. Under 
+ * CURRENT (2001) U.S. export regulations this software 
+ * is eligible for export from the U.S. and can be downloaded by or 
+ * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
+ * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
+ * Syria, Sudan, Afghanistan and any other country to which the U.S. 
+ * has embargoed goods and services. 
+ *
+ * END_NSC_LIC_BSD */
+
+/* NSC_LIC_GPL
+ *
+ * National Semiconductor Corporation Gnu General Public License for 
+ *
+ * National Xfree frame buffer driver
+ *
+ * (GPL License with Export Notice)
+ *
+ * Copyright (c) 1999-2001
+ * National Semiconductor Corporation.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted under the terms of the GNU General 
+ * Public License as published by the Free Software Foundation; either 
+ * version 2 of the License, or (at your option) any later version  
+ *
+ * In addition to the terms of the GNU General Public License, neither 
+ * the name of the National Semiconductor Corporation nor the names of 
+ * its contributors may be used to endorse or promote products derived 
+ * from this software without specific prior written permission. 
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+ * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, 
+ * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE. See the GNU General Public License for more details. 
+ *
+ * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
+ * YOUR JURISDICTION. It is licensee's responsibility to comply with 
+ * any export regulations applicable in licensee's jurisdiction. Under 
+ * CURRENT (2001) U.S. export regulations this software 
+ * is eligible for export from the U.S. and can be downloaded by or 
+ * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
+ * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
+ * Syria, Sudan, Afghanistan and any other country to which the U.S. 
+ * has embargoed goods and services. 
+ *
+ * You should have received a copy of the GNU General Public License 
+ * along with this file; if not, write to the Free Software Foundation, 
+ * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 
+ *
+ * END_NSC_LIC_GPL */
+
+#include "xf86.h"
+#include "xf86_OSproc.h"
+#include "xf86_ansic.h"
+#include "xf86Pci.h"
+#include "xf86PciInfo.h"
+#include "xaa.h"
+#include "xaalocal.h"
+#include "nsc.h"
+#include "dgaproc.h"
+
+/* forward declarations */
+Bool GX2DGAInit(ScreenPtr pScreen);
+static Bool GX2_OpenFramebuffer(ScrnInfoPtr, char **, unsigned char **,
+				int *, int *, int *);
+static void GX2_CloseFramebuffer(ScrnInfoPtr pScrn);
+static Bool GX2_SetMode(ScrnInfoPtr, DGAModePtr);
+static int GX2_GetViewport(ScrnInfoPtr);
+static void GX2_SetViewport(ScrnInfoPtr, int, int, int);
+static void GX2_FillRect(ScrnInfoPtr, int, int, int, int, unsigned long);
+static void GX2_BlitRect(ScrnInfoPtr, int, int, int, int, int, int);
+
+extern void GX2AdjustFrame(int, int, int, int);
+extern Bool GX2SwitchMode(int, DisplayModePtr, int);
+extern void GX2AccelSync(ScrnInfoPtr pScreenInfo);
+
+static DGAFunctionRec GX2DGAFuncs = {
+   GX2_OpenFramebuffer,
+   GX2_CloseFramebuffer,
+   GX2_SetMode,
+   GX2_SetViewport,
+   GX2_GetViewport,
+   GX2AccelSync,
+   GX2_FillRect,
+   GX2_BlitRect,
+   NULL
+};
+
+/*----------------------------------------------------------------------------
+ * GX2DGAInit.
+ *
+ * Description	:This function is used to intiallize the DGA modes and sets the
+			 	 viewport based on the screen mode.
+ * Parameters.
+ *	pScreeen	:Pointer to screen info structure.
+ *
+ * Returns		:TRUE on success and FALSE on failure.
+ *
+ * Comments		:This function prepares the DGA mode settings for
+ *				 other func reference.
+ *
+*----------------------------------------------------------------------------
+*/
+Bool
+GX2DGAInit(ScreenPtr pScreen)
+{
+   ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
+   GeodePtr pGeode = GEODEPTR(pScrn);
+   DGAModePtr modes = NULL, newmodes = NULL, currentMode;
+   DisplayModePtr pMode, firstMode;
+   int Bpp = pScrn->bitsPerPixel >> 3;
+   int num = 0;
+   Bool oneMore;
+
+   pMode = firstMode = pScrn->modes;
+   DEBUGMSG(0, (0, X_NONE, "GX2DGAInit %d\n", Bpp));
+   while (pMode) {
+
+      /* redundant but it can be used in future:if(0). */
+      if (0) {				/*pScrn->displayWidth != pMode->HDisplay */
+	 /* memory is allocated for dga to
+	  *setup the viewport and mode parameters
+	  */
+	 newmodes = xrealloc(modes, (num + 2) * sizeof(DGAModeRec));
+	 oneMore = TRUE;
+      } else {
+	 /* one record is allocated here */
+	 newmodes = xrealloc(modes, (num + 1) * sizeof(DGAModeRec));
+	 oneMore = FALSE;
+      }
+      if (!newmodes) {
+	 xfree(modes);
+	 return FALSE;
+      }
+      modes = newmodes;
+
+    SECOND_PASS:			/* DGA mode flgas and viewport parametrs are set here. */
+
+      currentMode = modes + num;
+      num++;
+      currentMode->mode = pMode;
+      currentMode->flags = DGA_CONCURRENT_ACCESS | DGA_PIXMAP_AVAILABLE;
+      currentMode->flags |= DGA_FILL_RECT | DGA_BLIT_RECT;
+      if (pMode->Flags & V_DBLSCAN)
+	 currentMode->flags |= DGA_DOUBLESCAN;
+      if (pMode->Flags & V_INTERLACE)
+	 currentMode->flags |= DGA_INTERLACED;
+      currentMode->byteOrder = pScrn->imageByteOrder;
+      currentMode->depth = pScrn->depth;
+      currentMode->bitsPerPixel = pScrn->bitsPerPixel;
+      currentMode->red_mask = pScrn->mask.red;
+      currentMode->green_mask = pScrn->mask.green;
+      currentMode->blue_mask = pScrn->mask.blue;
+      currentMode->visualClass = (Bpp == 1) ? PseudoColor : TrueColor;
+      currentMode->viewportWidth = pMode->HDisplay;
+      currentMode->viewportHeight = pMode->VDisplay;
+      currentMode->xViewportStep = 1;
+      currentMode->yViewportStep = 1;
+      currentMode->viewportFlags = DGA_FLIP_RETRACE;
+      currentMode->offset = 0;
+      currentMode->address = pGeode->FBBase;
+      if (oneMore) {			/* first one is narrow width */
+	 currentMode->bytesPerScanline = ((pMode->HDisplay * Bpp) + 3) & ~3L;
+	 currentMode->imageWidth = pMode->HDisplay;
+	 currentMode->imageHeight = pMode->VDisplay;
+	 currentMode->pixmapWidth = currentMode->imageWidth;
+	 currentMode->pixmapHeight = currentMode->imageHeight;
+	 currentMode->maxViewportX = currentMode->imageWidth -
+	       currentMode->viewportWidth;
+	 /* this might need to get clamped to some maximum */
+	 currentMode->maxViewportY = currentMode->imageHeight -
+	       currentMode->viewportHeight;
+	 oneMore = FALSE;
+	 goto SECOND_PASS;
+      } else {
+	 currentMode->bytesPerScanline =
+	       ((pScrn->displayWidth * Bpp) + 3) & ~3L;
+	 currentMode->imageWidth = pScrn->displayWidth;
+	 currentMode->imageHeight = pMode->VDisplay;
+	 currentMode->pixmapWidth = currentMode->imageWidth;
+	 currentMode->pixmapHeight = currentMode->imageHeight;
+	 currentMode->maxViewportX = currentMode->imageWidth -
+	       currentMode->viewportWidth;
+	 /* this might need to get clamped to some maximum */
+	 currentMode->maxViewportY = currentMode->imageHeight -
+	       currentMode->viewportHeight;
+      }
+      pMode = pMode->next;
+      if (pMode == firstMode)
+	 break;
+   }
+   pGeode->numDGAModes = num;
+   pGeode->DGAModes = modes;
+   return DGAInit(pScreen, &GX2DGAFuncs, modes, num);
+}
+
+/*----------------------------------------------------------------------------
+ * GX2_SetMode.
+ *
+ * Description	:This function is sets into the DGA mode.
+ *.
+ * Parameters.
+ *	pScreeen	:Pointer to screen info structure.
+ *	pMode		:Points to the DGAmode ptr data
+ * Returns		:TRUE on success and FALSE on failure.
+ *
+ * Comments		:none.
+ *			
+ *
+*----------------------------------------------------------------------------
+*/
+static Bool
+GX2_SetMode(ScrnInfoPtr pScrn, DGAModePtr pMode)
+{
+   static int OldDisplayWidth[MAXSCREENS];
+   int index = pScrn->pScreen->myNum;
+   GeodePtr pGeode = GEODEPTR(pScrn);
+
+   DEBUGMSG(0, (0, X_NONE, "GX2_SetMode\n"));
+   if (!pMode) {
+      /* restore the original mode
+       * * put the ScreenParameters back
+       */
+      pScrn->displayWidth = OldDisplayWidth[index];
+      DEBUGMSG(0,
+	       (0, X_NONE, "GX2_SetMode !pMode %d\n", pScrn->displayWidth));
+      GX2SwitchMode(index, pScrn->currentMode, 0);
+      pGeode->DGAactive = FALSE;
+   } else {
+      if (!pGeode->DGAactive) {		/* save the old parameters */
+	 OldDisplayWidth[index] = pScrn->displayWidth;
+	 pGeode->DGAactive = TRUE;
+	 DEBUGMSG(0,
+		  (0, X_NONE, "GX2_SetMode pMode+ NA %d\n",
+		   pScrn->displayWidth));
+      }
+      pScrn->displayWidth = pMode->bytesPerScanline /
+	    (pMode->bitsPerPixel >> 3);
+      DEBUGMSG(0,
+	       (0, X_NONE, "GX2_SetMode pMode+  %d\n", pScrn->displayWidth));
+      GX2SwitchMode(index, pMode->mode, 0);
+   }
+   /* enable/disable Compression */
+   if (pGeode->Compression) {
+      GFX(set_compression_enable(!pGeode->DGAactive));
+   }
+
+   /* enable/disable cursor */
+   if (pGeode->HWCursor) {
+      GFX(set_cursor_enable(!pGeode->DGAactive));
+   }
+
+   return TRUE;
+}
+
+/*----------------------------------------------------------------------------
+ * GX2_GetViewPort.
+ *
+ * Description	:This function is Gets the viewport window memory.
+ *.
+ * Parameters.
+ *	pScrn		:Pointer to screen info structure.
+ *	
+ * Returns		:returns the viewport status.
+ *
+ * Comments		:none.
+ *			
+ *
+*----------------------------------------------------------------------------
+*/
+static int
+GX2_GetViewport(ScrnInfoPtr pScrn)
+{
+   GeodePtr pGeode = GEODEPTR(pScrn);
+
+   return pGeode->DGAViewportStatus;
+}
+
+/*----------------------------------------------------------------------------
+ * GX2_SetViewPort.
+ *
+ * Description	:This function is Gets the viewport window memory.
+ *
+ * Parameters.
+ *	pScrn		:Pointer to screen info structure.
+		x		:x-cordinate of viewport window
+ *		y		:y-codinate of the viewport window.
+ *	flags		:indicates the viewport to be flipped or not.
+ * Returns		:returns the viewport status  as zero.
+ *
+ * Comments		:none.
+ *			
+*----------------------------------------------------------------------------
+*/
+static void
+GX2_SetViewport(ScrnInfoPtr pScrn, int x, int y, int flags)
+{
+   GeodePtr pGeode = GEODEPTR(pScrn);
+
+   GX2AdjustFrame(pScrn->pScreen->myNum, x, y, flags);
+   pGeode->DGAViewportStatus = 0;	/*GX2AdjustFrame loops until finished */
+}
+
+/*----------------------------------------------------------------------------
+ * GX2_FillRect.
+ *
+ * Description	:This function is Gets the viewport window memory.
+ *.
+ * Parameters.
+ *	pScrn		:Pointer to screen info structure.
+ *		x		:x-cordinate of viewport window
+ *		y		:y-codinate of the viewport window.
+ *		w		:width of the rectangle
+ *      h		:height of the rectangle.
+ *	color		:color to be filled in rectangle.
+ *
+ * Returns		:returns the viewport status  as zero.
+ *
+ * Comments		:This function is implemented by solidfill routines..
+ *			
+*----------------------------------------------------------------------------
+*/
+static void
+GX2_FillRect(ScrnInfoPtr pScrn, int x, int y,
+	     int w, int h, unsigned long color)
+{
+   GeodePtr pGeode = GEODEPTR(pScrn);
+
+   if (pGeode->AccelInfoRec) {
+      (*pGeode->AccelInfoRec->SetupForSolidFill) (pScrn, color, GXcopy, ~0);
+      (*pGeode->AccelInfoRec->SubsequentSolidFillRect) (pScrn, x, y, w, h);
+      SET_SYNC_FLAG(pGeode->AccelInfoRec);
+   }
+}
+
+/*----------------------------------------------------------------------------
+ * GX2_BlitRect.
+ *
+ * Description	:This function implementing Blit and it moves a
+ *			 	 Rectangular block of data from one location to other
+ *			 	 Location.
+ *
+ * Parameters.
+ *	pScrn		:Pointer to screen info structure.
+ *	srcx		:x-cordinate of the src rectangle
+ *	srcy		:y-codinate of src rectangle.
+ *	  w			:width of the rectangle
+ *    h			:height of the rectangle.
+ *	dstx		:x-cordinate of the dst rectangle.
+ *	dsty		:y -coordinates of the dst rectangle.
+ * Returns		:none.
+ *
+ * Comments		:none
+ *			
+*----------------------------------------------------------------------------
+*/
+static void
+GX2_BlitRect(ScrnInfoPtr pScrn,
+	     int srcx, int srcy, int w, int h, int dstx, int dsty)
+{
+   GeodePtr pGeode = GEODEPTR(pScrn);
+
+   if (pGeode->AccelInfoRec) {
+      int xdir = ((srcx < dstx) && (srcy == dsty)) ? -1 : 1;
+      int ydir = (srcy < dsty) ? -1 : 1;
+
+      (*pGeode->AccelInfoRec->SetupForScreenToScreenCopy)
+	    (pScrn, xdir, ydir, GXcopy, ~0, -1);
+      (*pGeode->AccelInfoRec->SubsequentScreenToScreenCopy) (pScrn, srcx,
+							     srcy, dstx, dsty,
+							     w, h);
+      SET_SYNC_FLAG(pGeode->AccelInfoRec);
+   }
+}
+
+/*----------------------------------------------------------------------------
+ * GX2_OpenFramebuffer.
+ *
+ * Description	:This function open the framebuffer driver for DGA.
+ *			
+ * Parameters.
+ *	pScrn		:Pointer to screen info structure.
+ *	srcx		:x-cordinate of the src rectangle
+ *	srcy		:y-codinate of src rectangle.
+ *		w		:width of the rectangle
+ *    	h		:height of the rectangle.
+ *	dstx		:x-cordinate of the dst rectangle.
+ *	dsty		:y -coordinates of the dst rectangle.
+ * Returns		:none.
+ *
+ * Comments		:none
+ *			
+*----------------------------------------------------------------------------
+*/
+static Bool
+GX2_OpenFramebuffer(ScrnInfoPtr pScrn,
+		    char **name, unsigned char **mem,
+		    int *size, int *offset, int *flags)
+{
+   GeodePtr pGeode = GEODEPTR(pScrn);
+
+   *name = NULL;			/* no special device */
+   *mem = (unsigned char *)pGeode->FBLinearAddr;
+   *size = pGeode->FBSize;
+   *offset = 0;
+   *flags = DGA_NEED_ROOT;
+   return TRUE;
+}
+
+static void
+GX2_CloseFramebuffer(ScrnInfoPtr pScrn)
+{
+}
+
+/* end of file */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_gx2_driver.c b/xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_gx2_driver.c
new file mode 100644
index 000000000..4ee3dcec5
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_gx2_driver.c
@@ -0,0 +1,2398 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_gx2_driver.c,v 1.6 2003/02/12 13:08:54 alanh Exp $ */
+/*
+ * $Workfile: nsc_gx2_driver.c $
+ * $Revision: 1.2.2.1 $
+ * $Author: ldelgass $
+ *
+ * File Contents: This is the main module configures the interfacing 
+ *                with the X server. The individual modules will be 
+ *                loaded based upon the options selected from the 
+ *                XF86Config. This file also has modules for finding 
+ *                supported modes, turning on the modes based on options.
+ *
+ * Project:       Geode Xfree Frame buffer device driver.
+ *
+ */
+
+/* 
+ * NSC_LIC_ALTERNATIVE_PREAMBLE
+ *
+ * Revision 1.0
+ *
+ * National Semiconductor Alternative GPL-BSD License
+ *
+ * National Semiconductor Corporation licenses this software 
+ * ("Software"):
+ *
+ * National Xfree frame buffer driver
+ *
+ * under one of the two following licenses, depending on how the 
+ * Software is received by the Licensee.
+ * 
+ * If this Software is received as part of the Linux Framebuffer or
+ * other GPL licensed software, then the GPL license designated 
+ * NSC_LIC_GPL applies to this Software; in all other circumstances 
+ * then the BSD-style license designated NSC_LIC_BSD shall apply.
+ *
+ * END_NSC_LIC_ALTERNATIVE_PREAMBLE */
+
+/* NSC_LIC_BSD
+ *
+ * National Semiconductor Corporation Open Source License for 
+ *
+ * National Xfree frame buffer driver
+ *
+ * (BSD License with Export Notice)
+ *
+ * Copyright (c) 1999-2001
+ * National Semiconductor Corporation.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met: 
+ *
+ *   * Redistributions of source code must retain the above copyright 
+ *     notice, this list of conditions and the following disclaimer. 
+ *
+ *   * Redistributions in binary form must reproduce the above 
+ *     copyright notice, this list of conditions and the following 
+ *     disclaimer in the documentation and/or other materials provided 
+ *     with the distribution. 
+ *
+ *   * Neither the name of the National Semiconductor Corporation nor 
+ *     the names of its contributors may be used to endorse or promote 
+ *     products derived from this software without specific prior 
+ *     written permission. 
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+ * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE,
+ * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE.
+ *
+ * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
+ * YOUR JURISDICTION. It is licensee's responsibility to comply with 
+ * any export regulations applicable in licensee's jurisdiction. Under 
+ * CURRENT (2001) U.S. export regulations this software 
+ * is eligible for export from the U.S. and can be downloaded by or 
+ * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
+ * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
+ * Syria, Sudan, Afghanistan and any other country to which the U.S. 
+ * has embargoed goods and services. 
+ *
+ * END_NSC_LIC_BSD */
+
+/* NSC_LIC_GPL
+ *
+ * National Semiconductor Corporation Gnu General Public License for 
+ *
+ * National Xfree frame buffer driver
+ *
+ * (GPL License with Export Notice)
+ *
+ * Copyright (c) 1999-2001
+ * National Semiconductor Corporation.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted under the terms of the GNU General 
+ * Public License as published by the Free Software Foundation; either 
+ * version 2 of the License, or (at your option) any later version  
+ *
+ * In addition to the terms of the GNU General Public License, neither 
+ * the name of the National Semiconductor Corporation nor the names of 
+ * its contributors may be used to endorse or promote products derived 
+ * from this software without specific prior written permission. 
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+ * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, 
+ * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE. See the GNU General Public License for more details. 
+ *
+ * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
+ * YOUR JURISDICTION. It is licensee's responsibility to comply with 
+ * any export regulations applicable in licensee's jurisdiction. Under 
+ * CURRENT (2001) U.S. export regulations this software 
+ * is eligible for export from the U.S. and can be downloaded by or 
+ * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
+ * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
+ * Syria, Sudan, Afghanistan and any other country to which the U.S. 
+ * has embargoed goods and services. 
+ *
+ * You should have received a copy of the GNU General Public License 
+ * along with this file; if not, write to the Free Software Foundation, 
+ * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 
+ *
+ * END_NSC_LIC_GPL */
+
+#define DEBUG(x)
+#define GEODE_TRACE 0
+#define CFB 0
+
+/* Includes that are used by all drivers */
+#include "xf86.h"
+#include "xf86_OSproc.h"
+#include "xf86_ansic.h"
+#include "xf86Resources.h"
+
+/* We may want inb() and outb() */
+#include "compiler.h"
+
+/* We may want to access the PCI config space */
+#include "xf86PciInfo.h"
+#include "xf86Pci.h"
+
+#define INT10_SUPPORT 1
+
+/* Colormap handling stuff */
+#include "xf86cmap.h"
+
+#define RC_MAX_DEPTH 24
+
+/* Frame buffer stuff */
+#if CFB
+/*
+ * If using cfb, cfb.h is required.  Select the others for the bpp values
+ * the driver supports.
+ */
+#define PSZ 8				/* needed for cfb.h */
+#include "cfb.h"
+#undef PSZ
+#include "cfb16.h"
+#include "cfb24.h"
+#include "cfb32.h"
+#else
+#include "fb.h"
+#endif
+
+#include "shadowfb.h"
+
+/* Machine independent stuff */
+#include "mipointer.h"
+#include "mibank.h"
+#include "micmap.h"
+/* All drivers implementing backing store need this */
+#include "mibstore.h"
+#include "vgaHW.h"
+#include "vbe.h"
+
+/* Check for some extensions */
+#ifdef XFreeXDGA
+#define _XF86_DGA_SERVER_
+#include "extensions/xf86dgastr.h"
+#endif /* XFreeXDGA */
+
+#ifdef DPMSExtension
+#include "globals.h"
+#include "opaque.h"
+#define DPMS_SERVER
+#include "extensions/dpms.h"
+#endif /* DPMSExtension */
+
+/* Our private include file (this also includes the durango headers) */
+#include "nsc.h"
+#if !defined(STB_X)
+#include "nsc_gx2_vga.c"
+#endif /* STB_X */
+
+#if GEODE_TRACE
+/* ANSI C does not allow var arg macros */
+#define GeodeDebug(args) DebugPort(DCount++);ErrorF args
+#else
+#define GeodeDebug(args)
+#endif
+
+extern SymTabRec GeodeChipsets[];
+extern PciChipsets GeodePCIchipsets[];
+extern OptionInfoRec GeodeOptions[];
+
+/* Forward definitions */
+static Bool GX2PreInit(ScrnInfoPtr, int);
+static Bool GX2ScreenInit(int, ScreenPtr, int, char **);
+static Bool GX2EnterVT(int, int);
+static void GX2LeaveVT(int, int);
+static void GX2FreeScreen(int, int);
+void GX2AdjustFrame(int, int, int, int);
+Bool GX2SwitchMode(int, DisplayModePtr, int);
+static int GX2ValidMode(int, DisplayModePtr, Bool, int);
+static void GX2LoadPalette(ScrnInfoPtr pScreenInfo,
+			   int numColors, int *indizes,
+			   LOCO * colors, VisualPtr pVisual);
+static Bool GX2MapMem(ScrnInfoPtr);
+static Bool GX2UnmapMem(ScrnInfoPtr);
+static void gx2_set_DvLineSize(unsigned int pitch);
+
+extern Bool GX2AccelInit(ScreenPtr pScreen);
+extern Bool GX2HWCursorInit(ScreenPtr pScreen);
+extern void GX2HideCursor(ScrnInfoPtr pScreenInfo);
+extern void GX2ShowCursor(ScrnInfoPtr pScreenInfo);
+extern void GX2PointerMoved(int index, int x, int y);
+extern void GX2RefreshArea(ScrnInfoPtr pScrn, int num, BoxPtr pbox);
+extern void GX2RefreshArea8(ScrnInfoPtr pScrn, int num, BoxPtr pbox);
+extern void GX2RefreshArea16(ScrnInfoPtr pScrn, int num, BoxPtr pbox);
+extern void GX2RefreshArea24(ScrnInfoPtr pScrn, int num, BoxPtr pbox);
+extern void GX2RefreshArea32(ScrnInfoPtr pScrn, int num, BoxPtr pbox);
+extern void GX2InitVideo(ScreenPtr pScreen);
+extern Bool GX2DGAInit(ScreenPtr pScreen);
+extern void GX2LoadCursorImage(ScrnInfoPtr pScreenInfo, unsigned char *src);
+
+#if !defined(STB_X)
+extern unsigned char *XpressROMPtr;
+#endif /* STB_X */
+
+/* Existing Processor Models */
+#define GX1 0x1
+#define GX2 0x2
+#define GX2_CRT 0x6
+#define GX2_TFT 0xA
+
+/* List of symbols from other modules that this module references.The purpose
+* is that to avoid unresolved symbol warnings
+*/
+extern const char *nscVgahwSymbols[];
+extern const char *nscVbeSymbols[];
+extern const char *nscInt10Symbols[];
+
+#if CFB
+extern const char *nscCfbSymbols[];
+#else
+extern const char *nscFbSymbols[];
+#endif
+extern const char *nscXaaSymbols[];
+extern const char *nscRamdacSymbols[];
+extern const char *nscShadowSymbols[];
+
+void GX2SetupChipsetFPtr(ScrnInfoPtr pScrn);
+GeodePtr GX2GetRec(ScrnInfoPtr pScreenInfo);
+void get_flatpanel_info(const char *options, int *W, int *H,
+			int *D, int *C, int *T);
+void gx2_clear_screen(int width, int height);
+void EnableDACPower(void);
+void redcloud_gfx_2_vga_fix(void);
+
+void
+GX2SetupChipsetFPtr(ScrnInfoPtr pScrn)
+{
+   GeodeDebug(("GX2SetupChipsetFPtr!\n"));
+
+   pScrn->PreInit = GX2PreInit;
+   pScrn->ScreenInit = GX2ScreenInit;
+   pScrn->SwitchMode = GX2SwitchMode;
+   pScrn->AdjustFrame = GX2AdjustFrame;
+   pScrn->EnterVT = GX2EnterVT;
+   pScrn->LeaveVT = GX2LeaveVT;
+   pScrn->FreeScreen = GX2FreeScreen;
+   pScrn->ValidMode = GX2ValidMode;
+}
+
+/*----------------------------------------------------------------------------
+ * GX2GetRec.
+ *
+ * Description	:This function allocate an GeodeRec and hooked into
+ * pScreenInfo 	 str driverPrivate member of ScreeenInfo
+ * 				 structure.
+ * Parameters.
+ * pScreenInfo 	:Pointer handle to the screenonfo structure.
+ *
+ * Returns		:allocated pScreeninfo structure.
+ *
+ * Comments     :none
+ *
+*----------------------------------------------------------------------------
+*/
+GeodePtr
+GX2GetRec(ScrnInfoPtr pScreenInfo)
+{
+   if (!pScreenInfo->driverPrivate) {
+      GeodePtr pGeode;
+
+      pGeode = pScreenInfo->driverPrivate = xnfcalloc(sizeof(GeodeRec), 1);
+#if INT10_SUPPORT
+      pGeode->vesa = xcalloc(sizeof(VESARec), 1);
+#endif
+   }
+   return GEODEPTR(pScreenInfo);
+}
+
+/*----------------------------------------------------------------------------
+ * GX2FreeRec.
+ *
+ * Description	:This function deallocate an GeodeRec and freed from
+ *               pScreenInfo str driverPrivate member of ScreeenInfo
+ *               structure.
+ * Parameters.
+ * pScreenInfo	:Pointer handle to the screenonfo structure.
+ *
+ * Returns		:none
+ *
+ * Comments     :none
+ *
+*----------------------------------------------------------------------------
+*/
+static void
+GX2FreeRec(ScrnInfoPtr pScreenInfo)
+{
+   if (pScreenInfo->driverPrivate == NULL) {
+      return;
+   }
+   xfree(pScreenInfo->driverPrivate);
+   pScreenInfo->driverPrivate = NULL;
+}
+
+/*----------------------------------------------------------------------------
+ * GX2SaveScreen.
+ *
+ * Description	:This is todo the screen blanking
+ *
+ * Parameters.
+ *     pScreen	:Handle to ScreenPtr structure.
+ *     mode		:mode is used by vgaHWSaveScren to check blnak os on.
+ * 												
+ * Returns		:TRUE on success and FALSE on failure.
+ *
+ * Comments     :none
+*----------------------------------------------------------------------------
+*/
+static Bool
+GX2SaveScreen(ScreenPtr pScreen, int mode)
+{
+#if !defined(STB_X)
+   ScrnInfoPtr pScreenInfo = xf86Screens[pScreen->myNum];
+
+   GeodeDebug(("GX2SaveScreen!\n"));
+
+   if (!pScreenInfo->vtSema)
+      return vgaHWSaveScreen(pScreen, mode);
+
+#endif /* STB_X */
+   return TRUE;
+}
+
+/*----------------------------------------------------------------------------
+ * get_flatpanel_info.
+ *
+ * Description	:This gets the values of the flatpanel attached.
+ *
+ * Parameters:
+ *     options	: Pointer to the display options.
+ *             W: Pointer to the width of the panel
+ *             H: Pointer to the height of the panel
+ * 	           D: Pointer to the depth of the panel.
+ *             C: Pointer to the color of the panel. 
+ *             T: Pointer to the type of the panel. 
+ * Returns	    : none.
+ *
+ * Comments     :none
+ *------------------------------------------------------------------------
+ */
+void
+get_flatpanel_info(const char *options, int *W, int *H,
+		   int *D, int *C, int *T)
+{
+   char *pnl_opt;
+
+   pnl_opt = strtok((char *)options, ":");
+   *W = strtoul(pnl_opt, NULL, 0);
+   pnl_opt = strtok(NULL, ":");
+   *H = strtoul(pnl_opt, NULL, 0);
+   pnl_opt = strtok(NULL, ":");
+   *D = strtoul(pnl_opt, NULL, 0);
+   pnl_opt = strtok(NULL, ":");
+   *C = strtoul(pnl_opt, NULL, 0);
+   pnl_opt = strtok(NULL, ":");
+   *T = strtoul(pnl_opt, NULL, 0);
+
+   *C = (*C) ? PNL_COLOR_PANEL : PNL_MONO_PANEL;
+
+   switch (*T) {
+   case 0:
+      *T = PNL_SSTN;
+      break;
+   case 1:
+      *T = PNL_DSTN;
+      break;
+   case 2:
+   default:
+      *T = PNL_TFT;
+      break;
+   }
+
+   if ((*W != 640) && (*W != 800) && (*W != 1024))
+      *W = 640;
+
+   if ((*H != 480) && (*H != 600) && (*H != 768))
+      *H = 480;
+}
+
+static void
+GX2ProbeDDC(ScrnInfoPtr pScrn, int index)
+{
+   vbeInfoPtr pVbe;
+
+   if (xf86LoadSubModule(pScrn, "vbe")) {
+      pVbe = VBEInit(NULL, index);
+      ConfiguredMonitor = vbeDoEDID(pVbe, NULL);
+      vbeFree(pVbe);
+   }
+}
+
+/*----------------------------------------------------------------------------
+ * GX2PreInit.
+ *
+ * Description	:This function is called only once ate teh server startup
+ *
+ * Parameters.
+ *  pScreenInfo :Handle to ScreenPtr structure.
+ *  flags       :flags may be used to check the probeed one with config.
+ * 												
+ * Returns		:TRUE on success and FALSE on failure.
+ *
+ * Comments     :none.
+ *----------------------------------------------------------------------------
+ */
+static Bool
+GX2PreInit(ScrnInfoPtr pScreenInfo, int flags)
+{
+   static ClockRange GeodeClockRange =
+	 { NULL, 25175, 229500, 0, FALSE, TRUE, 1, 1, 0 };
+   MessageType from;
+   int i = 0;
+   GeodePtr pGeode;
+   char *mod = NULL;
+
+#if CFB
+   char *reqSymbol = NULL;
+#endif /* CFB */
+#if defined(STB_X)
+   GAL_ADAPTERINFO sAdapterInfo;
+#endif /* STB_X */
+   unsigned int PitchInc = 0, minPitch = 0, maxPitch = 0;
+   unsigned int minHeight = 0, maxHeight = 0;
+   unsigned int SupportFlags;
+   const char *s;
+   char **modes;
+
+#if INT10_SUPPORT
+   VESAPtr pVesa;
+#endif
+
+   DCount = 10;
+   GeodeDebug(("GX2PreInit!\n"));
+   /* Allocate driver private structure */
+   if (!(pGeode = GX2GetRec(pScreenInfo)))
+      return FALSE;
+
+   /* This is the general case */
+   for (i = 0; i < pScreenInfo->numEntities; i++) {
+      pGeode->pEnt = xf86GetEntityInfo(pScreenInfo->entityList[i]);
+      if (pGeode->pEnt->resources)
+	 return FALSE;
+      pGeode->Chipset = pGeode->pEnt->chipset;
+      pScreenInfo->chipset = (char *)xf86TokenToString(GeodeChipsets,
+						       pGeode->pEnt->chipset);
+   }
+
+   if (flags & PROBE_DETECT) {
+      GX2ProbeDDC(pScreenInfo, pGeode->pEnt->index);
+      return TRUE;
+   }
+#if INT10_SUPPORT
+   if (!xf86LoadSubModule(pScreenInfo, "int10"))
+      return FALSE;
+   xf86LoaderReqSymLists(nscInt10Symbols, NULL);
+#endif
+   pGeode->FBVGAActive = 0;		/* KFB will Knock of VGA */
+
+#if !defined(STB_X)
+   /* If the vgahw module would be needed it would be loaded here */
+   if (!xf86LoadSubModule(pScreenInfo, "vgahw")) {
+      return FALSE;
+   }
+   xf86LoaderReqSymLists(nscVgahwSymbols, NULL);
+#endif /* STB_X */
+   GeodeDebug(("GX2PreInit(1)!\n"));
+   /* Do the durango hardware detection */
+#if defined(STB_X)
+   if (!Gal_initialize_interface()) {
+      GeodeDebug(("GALintialize fail GX2PreInit(1.00)!\n"));
+      return FALSE;
+   }
+
+   if (Gal_get_adapter_info(&sAdapterInfo)) {
+      pGeode->cpu_version = sAdapterInfo.dwCPUVersion;
+
+      /* find the base chipset core. Currently there can be only one 
+       * chip active at any time.
+       */
+      if ((pGeode->cpu_version & 0xFF) == GFX_CPU_REDCLOUD) {
+	 if (sAdapterInfo.dwCPUType)
+	    pGeode->DetectedChipSet = GX2_TFT;
+	 else
+	    pGeode->DetectedChipSet = GX2_CRT;
+      }
+
+      DEBUGMSG(1,
+	       (0, X_NONE, "Detected BaseChip %d, %d\n",
+		pGeode->DetectedChipSet, sAdapterInfo.dwCPUType));
+
+      pGeode->vid_version = sAdapterInfo.dwVideoVersion;
+      pGeode->FBSize = sAdapterInfo.dwFrameBufferSize;
+      /* update the max clock from the one system suports  */
+      GeodeClockRange.maxClock = sAdapterInfo.dwMaxSupportedPixelClock;
+      pGeode->FBLinearAddr = sAdapterInfo.dwFrameBufferBase;
+#if 0
+      pGeode->FBBase = (unsigned char *)xf86MapVidMem(pScreenInfo->scrnIndex,
+						      VIDMEM_FRAMEBUFFER,
+						      pGeode->FBLinearAddr,
+						      pGeode->FBSize);
+#endif
+      if (!GX2MapMem(pScreenInfo))
+	 return FALSE;
+      DEBUGMSG(1, (0, X_NONE, "CPU=%x vid %x FB %x FBAdd %X\n",
+		   pGeode->cpu_version, pGeode->vid_version, pGeode->FBSize,
+		   pGeode->FBLinearAddr));
+   } else {
+      return FALSE;
+   }
+#else /* STB */
+   pGeode->cpu_version = gfx_detect_cpu();
+
+   /* find the base chipset core. Currently there can be only one 
+    * chip active at any time.
+    */
+/*	pGeode->DetectedChipSet = GX1; */
+   if ((pGeode->cpu_version & 0xFF) == GFX_CPU_REDCLOUD)
+      pGeode->DetectedChipSet = GX2;
+   GeodeDebug(("Detected BaseChip (%d)\n", pGeode->DetectedChipSet));
+   {
+      Q_WORD msrValue;
+
+      /* GX2 : Can have CRT or TFT only */
+      gfx_msr_read(RC_ID_DF, MBD_MSR_CONFIG, &msrValue);
+      pGeode->DetectedChipSet =
+	    ((msrValue.low & RCDF_CONFIG_FMT_MASK) ==
+	     RCDF_CONFIG_FMT_FP) ? GX2_TFT : GX2_CRT;
+      GeodeDebug(("Gx2 for %s\n",
+		  ((pGeode->DetectedChipSet == GX2_TFT) ? "TFT" : "CRT")));
+   }
+   GeodeDebug(("GX2PreInit(1.1)!\n"));
+   pGeode->vid_version = gfx_detect_video();
+   GeodeDebug(("GX2PreInit(1.2)!\n"));
+   pGeode->FBLinearAddr = gfx_get_frame_buffer_base();
+   GeodeDebug(("GX2PreInit(1.3)!\n"));
+   pGeode->FBSize = gfx_get_frame_buffer_size();
+   GeodeDebug(("GX2PreInit(1.4)!\n"));
+   /* update the max clock from the one system suports  */
+   GeodeClockRange.maxClock = gfx_get_max_supported_pixel_clock();
+
+   GeodeDebug(("GX2PreInit(1.5)!\n"));
+   /* SET DURANGO REGISTER POINTERS
+    * * The method of mapping from a physical address to a linear address
+    * * is operating system independent.  Set variables to linear address.
+    */
+   if (pGeode->DetectedChipSet & GX2) {
+      pGeode->cpu_reg_size = 0x4000;
+      pGeode->gp_reg_size = 0x4000;
+      pGeode->vid_reg_size = 0x4000;
+   } else {
+      pGeode->cpu_reg_size = 0x9000;
+      pGeode->vid_reg_size = 0x1000;
+   }
+
+   if (!GX2MapMem(pScreenInfo))
+      return FALSE;
+
+   /* check if VGA is active */
+   /* This routine saves the current VGA state in Durango VGA structure */
+   /* check if VGA is active */
+   pGeode->FBVGAActive = gu2_get_vga_active();
+
+#endif /* STB_X */
+   DEBUGMSG(1, (0, X_PROBED, "VGA = %d\n", pGeode->FBVGAActive));
+
+   /* Fill in the monitor field */
+   pScreenInfo->monitor = pScreenInfo->confScreen->monitor;
+   GeodeDebug(("GX2PreInit(2)!\n"));
+   SupportFlags = Support24bppFb | Support32bppFb;
+   GeodeDebug(("GX2PreInit(2)!\n"));
+   /* Determine depth, bpp, etc. */
+   if (!xf86SetDepthBpp(pScreenInfo, 8, 8, 8, SupportFlags)) {
+      return FALSE;
+   } else {
+      if (!((pScreenInfo->depth == 8) ||
+	    (pScreenInfo->depth == 16) ||
+	    (pScreenInfo->depth == 24) || (pScreenInfo->depth == 32))) {
+	 /* Depth not supported */
+	 DEBUGMSG(1, (pScreenInfo->scrnIndex, X_ERROR,
+		      "Given depth (%d bpp) is not supported by this driver\n",
+		      pScreenInfo->depth));
+	 return FALSE;
+      }
+   }
+
+   /*This must happen after pScreenInfo->display has been set
+    * * because xf86SetWeight references it.
+    */
+   if (pScreenInfo->depth > 8) {
+      /* The defaults are OK for us */
+      rgb BitsPerComponent = { 0, 0, 0 };
+      rgb BitMask = { 0, 0, 0 };
+
+      if (pScreenInfo->depth > 16) {
+	 /* we are operating in 24 bpp, Readcloud */
+	 BitsPerComponent.red = 8;
+	 BitsPerComponent.green = 8;
+	 BitsPerComponent.blue = 8;
+
+	 BitMask.red = 0xFF0000;
+	 BitMask.green = 0x00FF00;
+	 BitMask.blue = 0x0000FF;
+      }
+      if (!xf86SetWeight(pScreenInfo, BitsPerComponent, BitMask)) {
+	 return FALSE;
+      } else {
+	 /* XXX Check if the returned weight is supported */
+      }
+   }
+
+   xf86PrintDepthBpp(pScreenInfo);
+
+   GeodeDebug(("GX2PreInit(3)!\n"));
+
+   if (!xf86SetDefaultVisual(pScreenInfo, -1))
+      return FALSE;
+
+   GeodeDebug(("GX2PreInit(4)!\n"));
+
+   /* The new cmap layer needs this to be initialized */
+   if (pScreenInfo->depth > 1) {
+      Gamma zeros = { 0.0, 0.0, 0.0 };
+
+      if (!xf86SetGamma(pScreenInfo, zeros)) {
+	 return FALSE;
+      }
+   }
+   GeodeDebug(("GX2PreInit(5)!\n"));
+
+   /* We use a programmable clock */
+   pScreenInfo->progClock = TRUE;
+
+   /*Collect all of the relevant option flags
+    * *(fill in pScreenInfo->options)
+    */
+   xf86CollectOptions(pScreenInfo, NULL);
+
+   /*Process the options */
+   xf86ProcessOptions(pScreenInfo->scrnIndex, pScreenInfo->options,
+		      GeodeOptions);
+
+#if INT10_SUPPORT
+   pVesa = pGeode->vesa;
+   /* Initialize Vesa record */
+
+   if ((pVesa->pInt = xf86InitInt10(pGeode->pEnt->index)) == NULL) {
+      xf86DrvMsg(0, X_ERROR, "Int10 initialization failed.\n");
+      return (FALSE);
+   }
+#endif
+   /*Set the bits per RGB for 8bpp mode */
+   if (pScreenInfo->depth == 8) {
+      /* Default to 8 */
+      pScreenInfo->rgbBits = 8;
+   }
+   from = X_DEFAULT;
+
+   /*
+    * *The preferred method is to use the "hw cursor" option as a tri-state
+    * *option, with the default set above.
+    */
+   pGeode->HWCursor = TRUE;
+   if (xf86GetOptValBool(GeodeOptions, OPTION_HW_CURSOR, &pGeode->HWCursor)) {
+      from = X_CONFIG;
+   }
+   /* For compatibility, accept this too (as an override) */
+   if (xf86ReturnOptValBool(GeodeOptions, OPTION_SW_CURSOR, FALSE)) {
+      from = X_CONFIG;
+      pGeode->HWCursor = FALSE;
+   }
+   DEBUGMSG(1, (pScreenInfo->scrnIndex, from, "Using %s cursor\n",
+		pGeode->HWCursor ? "HW" : "SW"));
+
+   pGeode->Compression = TRUE;
+   if (xf86ReturnOptValBool(GeodeOptions, OPTION_NOCOMPRESSION, FALSE)) {
+      pGeode->Compression = FALSE;
+      DEBUGMSG(1, (pScreenInfo->scrnIndex, X_CONFIG, "NoCompression\n"));
+   }
+
+   pGeode->NoAccel = FALSE;
+   if (xf86ReturnOptValBool(GeodeOptions, OPTION_NOACCEL, FALSE)) {
+      pGeode->NoAccel = TRUE;
+      DEBUGMSG(1, (pScreenInfo->scrnIndex, X_CONFIG, "Acceleration \
+			disabled\n"));
+   }
+
+   if (!xf86GetOptValInteger(GeodeOptions, OPTION_OSM_IMG_BUFS,
+			     &(pGeode->NoOfImgBuffers)))
+      pGeode->NoOfImgBuffers = DEFAULT_NUM_OF_BUF;	/* default # of buffers */
+   if (pGeode->NoOfImgBuffers <= 0)
+      pGeode->NoOfImgBuffers = 0;
+   DEBUGMSG(1, (pScreenInfo->scrnIndex, X_CONFIG,
+		"NoOfImgBuffers = %d\n", pGeode->NoOfImgBuffers));
+
+   pGeode->Panel = FALSE;
+   if (xf86ReturnOptValBool(GeodeOptions, OPTION_FLATPANEL, FALSE)) {
+      DEBUGMSG(0, (pScreenInfo->scrnIndex, X_CONFIG, "FlatPanel Selected\n"));
+      pGeode->Panel = TRUE;
+   }
+
+   /* Force the Panel on if on a GX2 TFT part, no crt support */
+   if (pGeode->DetectedChipSet == GX2_TFT) {
+      pGeode->Panel = TRUE;
+   }
+
+   /* If on a CRT and Panel flag set, disable Panel */
+   if ((pGeode->DetectedChipSet == GX2_CRT) && (pGeode->Panel))
+      pGeode->Panel = FALSE;
+
+   DEBUGMSG(1, (pScreenInfo->scrnIndex, X_CONFIG,
+		"Quering FP Bios %d\n", pGeode->Panel));
+
+   /* if FP not supported in BIOS, then turn off user option */
+   if (pGeode->Panel) {
+      /* check if bios supports FP */
+#if defined(STB_X)
+      Gal_pnl_enabled_in_bios(&pGeode->Panel);
+      Gal_pnl_info_from_bios(&pGeode->FPBX, &pGeode->FPBY,
+			     &pGeode->FPBB, &pGeode->FPBF);
+#else /* STB_X */
+      pGeode->Panel = Pnl_IsPanelEnabledInBIOS();
+      Pnl_GetPanelInfoFromBIOS(&pGeode->FPBX, &pGeode->FPBY,
+			       &pGeode->FPBB, &pGeode->FPBF);
+#endif /* STB_X */
+   }
+
+   DEBUGMSG(1, (pScreenInfo->scrnIndex, X_CONFIG,
+		"Quering FP Bios %d %d %d %d\n",
+		pGeode->FPBX, pGeode->FPBY, pGeode->FPBB, pGeode->FPBF));
+
+   /* if panel not selected and Panel can be  supported. 
+    * Power down the panel. 
+    */
+   if (!pGeode->Panel) {
+#if defined(STB_X)
+      Gal_pnl_powerdown();
+#else /* STB_X */
+      Pnl_PowerDown();
+#endif /* STB_X */
+   } else {
+#if defined(STB_X)
+      Gal_pnl_powerup();
+#else
+      Pnl_PowerUp();
+#endif /* STB_X */
+   }
+
+   pGeode->ShadowFB = FALSE;
+   if (xf86ReturnOptValBool(GeodeOptions, OPTION_SHADOW_FB, FALSE)) {
+      pGeode->ShadowFB = TRUE;
+      pGeode->NoAccel = TRUE;
+      DEBUGMSG(1, (pScreenInfo->scrnIndex, X_CONFIG,
+		   "Using \"Shadow Framebuffer\" - acceleration disabled\n"));
+   }
+
+   pGeode->Rotate = 0;
+   if ((s = xf86GetOptValString(GeodeOptions, OPTION_ROTATE))) {
+      DEBUGMSG(1, (pScreenInfo->scrnIndex, X_CONFIG, "Rotating - %s\n", s));
+      if (!xf86NameCmp(s, "CW")) {
+	 pGeode->ShadowFB = TRUE;
+	 pGeode->NoAccel = TRUE;
+	 pGeode->HWCursor = FALSE;
+	 pGeode->Rotate = 1;
+	 DEBUGMSG(1, (pScreenInfo->scrnIndex, X_CONFIG,
+		      "Rotating screen clockwise - acceleration disabled\n"));
+      } else {
+	 if (!xf86NameCmp(s, "CCW")) {
+	    pGeode->ShadowFB = TRUE;
+	    pGeode->NoAccel = TRUE;
+	    pGeode->HWCursor = FALSE;
+	    pGeode->Rotate = -1;
+	    DEBUGMSG(1, (pScreenInfo->scrnIndex, X_CONFIG,
+			 "Rotating screen counter clockwise - acceleration \
+					disabled\n"));
+	 } else {
+	    DEBUGMSG(1, (pScreenInfo->scrnIndex, X_CONFIG,
+			 "\"%s\" is not a valid value for Option \"Rotate\"\n",
+			 s));
+	    DEBUGMSG(1,
+		     (pScreenInfo->scrnIndex, X_INFO,
+		      "Valid options are \"CW\" or \"CCW\"\n"));
+	 }
+      }
+   }
+
+   /* XXX Init further private data here */
+
+   /*
+    * * This shouldn't happen because such problems should be caught in
+    * * GeodeProbe(), but check it just in case.
+    */
+   if (pScreenInfo->chipset == NULL) {
+      DEBUGMSG(1, (pScreenInfo->scrnIndex, X_ERROR,
+		   "ChipID 0x%04X is not recognised\n", pGeode->Chipset));
+      return FALSE;
+   }
+   if (pGeode->Chipset < 0) {
+      DEBUGMSG(1, (pScreenInfo->scrnIndex, X_ERROR,
+		   "Chipset \"%s\" is not recognised\n",
+		   pScreenInfo->chipset));
+      return FALSE;
+   }
+   GeodeDebug(("GX2PreInit(6)!\n"));
+
+   /*
+    * * Init the screen with some values
+    */
+#if !defined(STB_X)
+
+   DEBUGMSG(1, (pScreenInfo->scrnIndex, from,
+		"Video I/O registers at 0x%08lX\n",
+		(unsigned long)VGAHW_GET_IOBASE()));
+#endif /* STB_X */
+
+   if (pScreenInfo->memPhysBase == 0) {
+      from = X_PROBED;
+#if defined(STB_X)
+      pScreenInfo->memPhysBase = sAdapterInfo.dwFrameBufferBase;
+#else /* STB_X */
+      pScreenInfo->memPhysBase = gfx_get_frame_buffer_base();
+#endif /* STB_X */
+   }
+   DEBUGMSG(1, (pScreenInfo->scrnIndex, from,
+		"Linear framebuffer at 0x%08lX\n",
+		(unsigned long)pScreenInfo->memPhysBase));
+
+   if (pGeode->pEnt->device->videoRam == 0) {
+      from = X_PROBED;
+      pScreenInfo->videoRam = pGeode->FBSize / 1024;
+   } else {
+      pScreenInfo->videoRam = pGeode->pEnt->device->videoRam;
+      from = X_CONFIG;
+   }
+   DEBUGMSG(1, (pScreenInfo->scrnIndex, from,
+		"VideoRam: %d kByte\n",
+		(unsigned long)pScreenInfo->videoRam));
+
+   GeodeDebug(("GX2PreInit(7)!\n"));
+
+   /*
+    * * xf86ValidateModes will check that the mode HTotal and VTotal values
+    * * don't exceed the chipset's limit if pScreenInfo->maxHValue adn
+    * * pScreenInfo->maxVValue are set. Since our GX2ValidMode()
+    * * already takes care of this, we don't worry about setting them here.
+    */
+   /* Select valid modes from those available */
+   /*
+    * * min pitch 1024, max 2048 (Pixel count)
+    * * min height 480, max 1024 (Pixel count)
+    */
+   minPitch = 1024;
+   maxPitch = 4096;			/* Can support upto 1600x1200 32Bpp */
+   minHeight = 480;
+   maxHeight = 1200;			/* Can support upto 1600x1200 32Bpp */
+   if (pScreenInfo->depth > 16) {
+      PitchInc = 4096;
+   } else if (pScreenInfo->depth == 16) {
+      PitchInc = 2048;
+   } else {
+      PitchInc = 1024;
+   }
+   PitchInc <<= 3;			/* in bits */
+
+   /* by default use what user sets in the XF86Config file */
+   modes = pScreenInfo->display->modes;
+
+   i = xf86ValidateModes(pScreenInfo,
+			 pScreenInfo->monitor->Modes,
+			 modes,
+			 &GeodeClockRange,
+			 NULL, minPitch, maxPitch,
+			 PitchInc, minHeight, maxHeight,
+			 pScreenInfo->display->virtualX,
+			 pScreenInfo->display->virtualY,
+#if defined(STB_X)
+			 sAdapterInfo.dwFrameBufferSize,
+#else /* STB_X */
+			 gfx_get_frame_buffer_size(),
+#endif /* STB_X */
+			 LOOKUP_BEST_REFRESH);
+
+   DEBUGMSG(1, (pScreenInfo->scrnIndex, from,
+		"xf86ValidateModes: %d %d %d\n",
+		pScreenInfo->virtualX,
+		pScreenInfo->virtualY, pScreenInfo->displayWidth));
+   if (i == -1) {
+      GX2FreeRec(pScreenInfo);
+      return FALSE;
+   }
+   GeodeDebug(("GX2PreInit(8)!\n"));
+
+   /* Prune the modes marked as invalid */
+   xf86PruneDriverModes(pScreenInfo);
+
+   GeodeDebug(("GX2PreInit(9)!\n"));
+   if (i == 0 || pScreenInfo->modes == NULL) {
+      DEBUGMSG(1, (pScreenInfo->scrnIndex, X_ERROR,
+		   "No valid modes found\n"));
+      GX2FreeRec(pScreenInfo);
+      return FALSE;
+   }
+   GeodeDebug(("GX2PreInit(10)!\n"));
+
+   xf86SetCrtcForModes(pScreenInfo, 0);
+   GeodeDebug(("GX2PreInit(11)!\n"));
+
+   /* Set the current mode to the first in the list */
+   pScreenInfo->currentMode = pScreenInfo->modes;
+   GeodeDebug(("GX2PreInit(12)!\n"));
+
+   /* Print the list of modes being used */
+   xf86PrintModes(pScreenInfo);
+   GeodeDebug(("GX2PreInit(13)!\n"));
+
+   /* Set the display resolution */
+   xf86SetDpi(pScreenInfo, 0, 0);
+   GeodeDebug(("GX2PreInit(14)!\n"));
+
+   /* Load bpp-specific modules */
+   mod = NULL;
+
+#if CFB
+   /* Load bpp-specific modules */
+   switch (pScreenInfo->bitsPerPixel) {
+   case 8:
+      mod = "cfb";
+      reqSymbol = "cfbScreenInit";
+      break;
+   case 16:
+      mod = "cfb16";
+      reqSymbol = "cfb16ScreenInit";
+      break;
+   case 24:
+      mod = "cfb24";
+      reqSymbol = "cfb24ScreenInit";
+      break;
+   case 32:
+      mod = "cfb32";
+      reqSymbol = "cfb32ScreenInit";
+      break;
+   default:
+      return FALSE;
+   }
+   if (mod && xf86LoadSubModule(pScreenInfo, mod) == NULL) {
+      GX2FreeRec(pScreenInfo);
+      return FALSE;
+   }
+
+   xf86LoaderReqSymbols(reqSymbol, NULL);
+#else
+   if (xf86LoadSubModule(pScreenInfo, "fb") == NULL) {
+      GX2FreeRec(pScreenInfo);
+      return FALSE;
+   }
+
+   xf86LoaderReqSymLists(nscFbSymbols, NULL);
+#endif
+   GeodeDebug(("GX2PreInit(15)!\n"));
+   if (pGeode->NoAccel == FALSE) {
+      if (!xf86LoadSubModule(pScreenInfo, "xaa")) {
+	 GX2FreeRec(pScreenInfo);
+	 return FALSE;
+      }
+      xf86LoaderReqSymLists(nscXaaSymbols, NULL);
+   }
+   GeodeDebug(("GX2PreInit(16)!\n"));
+   if (pGeode->HWCursor == TRUE) {
+      if (!xf86LoadSubModule(pScreenInfo, "ramdac")) {
+	 GX2FreeRec(pScreenInfo);
+	 return FALSE;
+      }
+      xf86LoaderReqSymLists(nscRamdacSymbols, NULL);
+   }
+   GeodeDebug(("GX2PreInit(17)!\n"));
+   /* Load shadowfb if needed */
+   if (pGeode->ShadowFB) {
+      if (!xf86LoadSubModule(pScreenInfo, "shadowfb")) {
+	 GX2FreeRec(pScreenInfo);
+	 return FALSE;
+      }
+      xf86LoaderReqSymLists(nscShadowSymbols, NULL);
+   }
+   GeodeDebug(("GX2PreInit(18)!\n"));
+   if (xf86RegisterResources(pGeode->pEnt->index, NULL, ResExclusive)) {
+      DEBUGMSG(1, (pScreenInfo->scrnIndex, X_ERROR,
+		   "xf86RegisterResources() found resource conflicts\n"));
+      GX2FreeRec(pScreenInfo);
+      return FALSE;
+   }
+   GX2UnmapMem(pScreenInfo);
+   GeodeDebug(("GX2PreInit ... done successfully!\n"));
+   return TRUE;
+}
+
+/*----------------------------------------------------------------------------
+ * GX2Restore.
+ *
+ * Description	:This function restores the mode that was saved on server
+                 entry
+ * Parameters.
+ * pScreenInfo 	:Handle to ScreenPtr structure.
+ *  Pmode       :poits to screen mode
+ * 												
+ * Returns		:none.
+ *
+ * Comments     :none.
+*----------------------------------------------------------------------------
+*/
+static void
+GX2Restore(ScrnInfoPtr pScreenInfo)
+{
+   GeodePtr pGeode;
+
+   GeodeDebug(("GX2Restore!\n"));
+   /* Get driver private structure */
+   if (!(pGeode = GX2GetRec(pScreenInfo)))
+      return;
+   if (pGeode->FBVGAActive) {
+      vgaHWPtr pvgaHW = VGAHWPTR(pScreenInfo);
+
+      vgaHWProtect(pScreenInfo, TRUE);
+      vgaHWRestore(pScreenInfo, &pvgaHW->SavedReg, VGA_SR_ALL);
+      vgaHWProtect(pScreenInfo, FALSE);
+   }
+}
+
+/*----------------------------------------------------------------------------
+ * GX2CalculatePitchBytes.
+ *
+ * Description	:This function restores the mode that was saved on server
+ *
+ * Parameters.
+ * pScreenInfo 	:Handle to ScreenPtr structure.
+ *    Pmode     :Points to screenmode
+ * 									
+ * Returns		:none.
+ *
+ * Comments     :none.
+*----------------------------------------------------------------------------
+*/
+static int
+GX2CalculatePitchBytes(unsigned int width, unsigned int bpp)
+{
+   int lineDelta = width * (bpp >> 3);
+
+   if (width < 640) {
+      /* low resolutions have both pixel and line doubling */
+      DEBUGMSG(1, (0, X_PROBED, "lower resolution %d %d\n",
+		   width, lineDelta));
+      lineDelta <<= 1;
+   }
+   /* needed in Rotate mode when in accel is turned off */
+   if (1) {				/*!pGeode->NoAccel */
+      if (lineDelta > 4096)
+	 lineDelta = 8192;
+      else if (lineDelta > 2048)
+	 lineDelta = 4096;
+      else if (lineDelta > 1024)
+	 lineDelta = 2048;
+      else
+	 lineDelta = 1024;
+   }
+
+   DEBUGMSG(1, (0, X_PROBED, "pitch %d %d\n", width, lineDelta));
+
+   return lineDelta;
+}
+
+/*----------------------------------------------------------------------------
+ * GX2GetRefreshRate.
+ *
+ * Description	:This function restores the mode that saved on server
+ *
+ * Parameters.
+ *     Pmode    :Pointer to the screen modes
+ * 												
+ * Returns		:It returns the selected refresh rate.
+ *
+ * Comments     :none.
+*----------------------------------------------------------------------------
+*/
+static int
+GX2GetRefreshRate(DisplayModePtr pMode)
+{
+#define THRESHOLD 2
+   unsigned int i;
+   static int validRates[] = { 50, 56, 60, 70, 72, 75, 85 };	/* Hz */
+   unsigned long dotClock;
+   int refreshRate;
+   int selectedRate;
+
+   dotClock = pMode->SynthClock * 1000;
+   refreshRate = dotClock / pMode->CrtcHTotal / pMode->CrtcVTotal;
+
+   if ((pMode->CrtcHTotal < 640) && (pMode->CrtcVTotal < 480))
+      refreshRate >>= 2;		/* double pixel and double scan */
+
+   DEBUGMSG(1, (0, X_PROBED, "dotclock %d %d\n", dotClock, refreshRate));
+
+   selectedRate = validRates[0];
+
+   for (i = 0; i < (sizeof(validRates) / sizeof(validRates[0])); i++) {
+      if (validRates[i] < (refreshRate + THRESHOLD)) {
+	 selectedRate = validRates[i];
+      }
+   }
+   return selectedRate;
+}
+
+void
+gx2_clear_screen(int width, int height)
+{
+   /* clean up the frame buffer memory */
+   GFX(set_solid_pattern(0));
+   GFX(set_raster_operation(0xF0));
+   GFX(pattern_fill(0, 0, width, height));
+}
+
+void
+gx2_set_DvLineSize(unsigned int pitch)
+{
+   unsigned long temp, dv_size = MDC_DV_LINE_SIZE_1024;
+
+   if (pitch > 1024) {
+      dv_size = MDC_DV_LINE_SIZE_2048;
+   }
+   if (pitch > 2048) {
+      dv_size = MDC_DV_LINE_SIZE_4096;
+   }
+   if (pitch > 4096) {
+      dv_size = MDC_DV_LINE_SIZE_8192;
+   }
+
+   /* WRITE DIRTY/VALID CONTROL WITH LINE LENGTH */
+
+#if defined(STB_X)
+   Gal_read_register(GAL_REG, MDC_DV_CTL, &temp, 4);
+   temp = (temp & ~MDC_DV_LINE_SIZE_MASK) | dv_size;
+   Gal_write_register(GAL_REG, MDC_DV_CTL, temp, 4);
+#else
+   temp = READ_REG32(MDC_DV_CTL);
+   WRITE_REG32(MDC_DV_CTL, (temp & ~MDC_DV_LINE_SIZE_MASK) | dv_size);
+#endif
+}
+
+/*----------------------------------------------------------------------------
+ * GX2SetMode.
+ *
+ * Description	:This function sets parametrs for screen mode
+ *
+ * Parameters.
+ * pScreenInfo 	:Pointer to the screenInfo structure.
+ *	 Pmode      :Pointer to the screen modes
+ * 												
+ * Returns		:TRUE on success and FALSE on Failure.
+ *
+ * Comments     :none.
+*----------------------------------------------------------------------------
+*/
+
+static Bool
+GX2SetMode(ScrnInfoPtr pScreenInfo, DisplayModePtr pMode)
+{
+   GeodePtr pGeode = GEODEPTR(pScreenInfo);
+
+   DCount = 50;
+   /* unsigned int compOffset, compPitch, compSize; */
+   GeodeDebug(("GX2SetMode!\n"));
+#if !defined(STB_X)
+   DEBUGMSG(1, (0, X_NONE, "Set mode %X %X %X %X %X\n",
+		gfx_virt_regptr,
+		gfx_virt_gpptr,
+		gfx_virt_spptr, gfx_virt_vidptr, gfx_virt_fbptr));
+#endif /* STB_X */
+
+   /* Set the VT semaphore */
+   pScreenInfo->vtSema = TRUE;
+   DEBUGMSG(1, (0, X_NONE, "Set mode"));
+
+   /* The timing will be adjusted later */
+   GeodeDebug(("Set display mode: %dx%d-%d (%dHz) Pitch %d\n",
+	       pMode->CrtcHDisplay,
+	       pMode->CrtcVDisplay,
+	       pScreenInfo->bitsPerPixel,
+	       GX2GetRefreshRate(pMode), pGeode->Pitch));
+
+   GeodeDebug(("Before setting the mode\n"));
+   if (1) {
+      {					/* TV not selected */
+
+	 DEBUGMSG(1, (0, X_PROBED, "Setting Display for CRT or TFT\n"));
+
+	 if (pGeode->Panel) {
+	    DEBUGMSG(0, (0, X_PROBED, "Setting Display for TFT\n"));
+	    DEBUGMSG(1, (0, X_PROBED, "Restore Panel %d %d %d %d %d\n",
+			 pGeode->FPBX, pGeode->FPBY,
+			 pMode->CrtcHDisplay,
+			 pMode->CrtcVDisplay, pScreenInfo->bitsPerPixel));
+
+	    DEBUGMSG(1, (pScreenInfo->scrnIndex, X_CONFIG, "FP Bios %d\n",
+			 pGeode->Panel));
+	    GFX(set_fixed_timings(pGeode->FPBX, pGeode->FPBY,
+				  pMode->CrtcHDisplay,
+				  pMode->CrtcVDisplay,
+				  pScreenInfo->bitsPerPixel));
+	 } else {
+	    /* display is crt */
+	    DEBUGMSG(1, (0, X_PROBED, "Setting Display for CRT %dx%d-%d@%d\n",
+			 pMode->CrtcHDisplay,
+			 pMode->CrtcVDisplay,
+			 pScreenInfo->bitsPerPixel,
+			 GX2GetRefreshRate(pMode)));
+	    GFX(set_display_mode(pMode->CrtcHDisplay,
+				 pMode->CrtcVDisplay,
+				 pScreenInfo->bitsPerPixel,
+				 GX2GetRefreshRate(pMode)));
+
+	    /* adjust the pitch */
+	    GFX(set_display_pitch(pGeode->Pitch));
+	 }
+	 GFX(set_bpp(pScreenInfo->bitsPerPixel));
+	 /* enable crt */
+	 GFX(set_crt_enable(CRT_ENABLE));
+      }
+      GFX(set_display_offset(0L));
+      GFX(wait_vertical_blank());
+
+      DEBUGMSG(1, (0, X_PROBED, "Display mode set\n"));
+      /* enable compression if option selected */
+      if (pGeode->Compression) {
+	 DEBUGMSG(1, (0, X_PROBED, "Compression mode set %d\n",
+		      pGeode->Compression));
+	 /* set the compression parameters,and it will be turned on later. */
+	 gx2_set_DvLineSize(pGeode->Pitch);
+
+#if defined(STB_X)
+	 Gal_set_compression_parameters(GAL_COMPRESSION_ALL,
+					pGeode->CBOffset,
+					pGeode->CBPitch, pGeode->CBSize);
+
+	 /* set the compression buffer, all parameters already set */
+	 Gal_set_compression_enable(GAL_COMPRESSION_ENABLE);
+#else /* STB_X */
+	 gfx_set_compression_offset(pGeode->CBOffset);
+	 gfx_set_compression_pitch(pGeode->CBPitch);
+	 gfx_set_compression_size(pGeode->CBSize);
+
+	 /* set the compression buffer, all parameters already set */
+	 gfx_set_compression_enable(1);
+#endif /* STB_X */
+
+      }
+      if (pGeode->HWCursor) {
+	 /* Load blank cursor */
+	 GX2LoadCursorImage(pScreenInfo, NULL);
+	 GFX(set_cursor_position(pGeode->CursorStartOffset, 0, 0, 0, 0));
+	 GFX(set_cursor_enable(1));
+      }
+   } else {
+      GeodeDebug(("GX2Restore ... "));
+      GX2Restore(pScreenInfo);
+      GeodeDebug(("done.\n"));
+   }
+
+   GeodeDebug(("done.\n"));
+   /* Reenable the hardware cursor after the mode switch */
+   if (pGeode->HWCursor == TRUE) {
+      GeodeDebug(("GX2ShowCursor ... "));
+      GX2ShowCursor(pScreenInfo);
+      GeodeDebug(("done.\n"));
+   }
+   /* Restore the contents in the screen info */
+   GeodeDebug(("After setting the mode\n"));
+   return TRUE;
+}
+
+/*----------------------------------------------------------------------------
+ * GX2EnterGraphics.
+ *
+ * Description	:This function will intiallize the displaytiming
+				 structure for nextmode and switch to VGA mode.
+ *
+ * Parameters.
+ *    pScreen   :Screen information will be stored in this structure.
+ * 	pScreenInfo :Pointer to the screenInfo structure.
+ *													
+ * Returns		:TRUE on success and FALSE on Failure.
+ *
+ * Comments     :gfx_vga_mode_switch() will start and end the
+ *				switching based on the arguments 0 or 1.soft_vga
+ *				is disabled in this function.
+*----------------------------------------------------------------------------
+*/
+static Bool
+GX2EnterGraphics(ScreenPtr pScreen, ScrnInfoPtr pScreenInfo)
+{
+   GeodePtr pGeode = GX2GetRec(pScreenInfo);
+
+#if defined(STB_X)
+   Gal_get_display_timing(&pGeode->FBgfxdisplaytiming);
+
+   /* Save Display offset */
+   Gal_get_display_offset(&(pGeode->FBDisplayOffset));
+
+   /* Save the current Compression state */
+   Gal_get_compression_enable(&(pGeode->FBCompressionEnable));
+   Gal_get_compression_parameters(GAL_COMPRESSION_ALL,
+				  &(pGeode->FBCompressionOffset),
+				  &(pGeode->FBCompressionPitch),
+				  &(pGeode->FBCompressionSize));
+
+   /* Save Cursor offset */
+   {
+      unsigned short x, y, xhot, yhot;
+
+      Gal_get_cursor_position(&(pGeode->FBCursorOffset),
+			      &x, &y, &xhot, &yhot);
+   }
+   /* Save the Panel state */
+   Gal_pnl_save();
+#else /* STB_X */
+   /* Save CRT State */
+   pGeode->FBgfxdisplaytiming.dwDotClock = gfx_get_clock_frequency();
+   pGeode->FBgfxdisplaytiming.wPitch = gfx_get_display_pitch();
+   pGeode->FBgfxdisplaytiming.wBpp = gfx_get_display_bpp();
+   pGeode->FBgfxdisplaytiming.wHTotal = gfx_get_htotal();
+   pGeode->FBgfxdisplaytiming.wHActive = gfx_get_hactive();
+   pGeode->FBgfxdisplaytiming.wHSyncStart = gfx_get_hsync_start();
+   pGeode->FBgfxdisplaytiming.wHSyncEnd = gfx_get_hsync_end();
+   pGeode->FBgfxdisplaytiming.wHBlankStart = gfx_get_hblank_start();
+   pGeode->FBgfxdisplaytiming.wHBlankEnd = gfx_get_hblank_end();
+   pGeode->FBgfxdisplaytiming.wVTotal = gfx_get_vtotal();
+   pGeode->FBgfxdisplaytiming.wVActive = gfx_get_vactive();
+   pGeode->FBgfxdisplaytiming.wVSyncStart = gfx_get_vsync_start();
+   pGeode->FBgfxdisplaytiming.wVSyncEnd = gfx_get_vsync_end();
+   pGeode->FBgfxdisplaytiming.wVBlankStart = gfx_get_vblank_start();
+   pGeode->FBgfxdisplaytiming.wVBlankEnd = gfx_get_vblank_end();
+   pGeode->FBgfxdisplaytiming.wPolarity = gfx_get_sync_polarities();
+
+   /* Save Display offset */
+   pGeode->FBDisplayOffset = gfx_get_display_offset();
+
+   /* Save the current Compression state */
+   pGeode->FBCompressionEnable = gfx_get_compression_enable();
+   pGeode->FBCompressionOffset = gfx_get_compression_offset();
+   pGeode->FBCompressionPitch = gfx_get_compression_pitch();
+   pGeode->FBCompressionSize = gfx_get_compression_size();
+
+   /* Save Cursor offset */
+   pGeode->FBCursorOffset = gfx_get_cursor_offset();
+
+   /* Save the Panel state */
+   Pnl_SavePanelState();
+
+   /* only if comming from VGA */
+   if (pGeode->FBVGAActive) {
+      unsigned short sequencer;
+      vgaHWPtr pvgaHW = VGAHWPTR(pScreenInfo);
+
+      /* Map VGA aperture */
+      if (!vgaHWMapMem(pScreenInfo))
+	 return FALSE;
+
+      /* Unlock VGA registers */
+      vgaHWUnlock(pvgaHW);
+
+      /* Save the current state and setup the current mode */
+      vgaHWSave(pScreenInfo, &VGAHWPTR(pScreenInfo)->SavedReg, VGA_SR_ALL);
+
+      /* DISABLE VGA SEQUENCER */
+      /* This allows the VGA state machine to terminate. We must delay */
+      /* such that there are no pending MBUS requests.  */
+
+      gfx_outb(MDC_SEQUENCER_INDEX, MDC_SEQUENCER_CLK_MODE);
+      sequencer = gfx_inb(MDC_SEQUENCER_DATA);
+      sequencer |= MDC_CLK_MODE_SCREEN_OFF;
+      gfx_outb(MDC_SEQUENCER_DATA, sequencer);
+
+      gfx_delay_milliseconds(1);
+
+      /* BLANK THE VGA DISPLAY */
+      gfx_outw(MDC_SEQUENCER_INDEX, MDC_SEQUENCER_RESET);
+      sequencer = gfx_inb(MDC_SEQUENCER_DATA);
+      sequencer &= ~MDC_RESET_VGA_DISP_ENABLE;
+      gfx_outb(MDC_SEQUENCER_DATA, sequencer);
+
+      gfx_delay_milliseconds(1);
+   }
+#endif /* STB */
+
+   if (!GX2SetMode(pScreenInfo, pScreenInfo->currentMode)) {
+      return FALSE;
+   }
+
+   /* clear the frame buffer, for annoying noise during mode switch */
+   gx2_clear_screen(pScreenInfo->currentMode->CrtcHDisplay,
+		    pScreenInfo->currentMode->CrtcVDisplay);
+
+   return TRUE;
+}
+
+#if !defined(STB_X)
+void
+EnableDACPower(void)
+{
+   /* enable the DAC POWER */
+   gfx_write_vid32(RCDF_VID_MISC,
+		   gfx_read_vid32(RCDF_VID_MISC) & RCDF_GAMMA_BYPASS_BOTH);
+}
+
+void
+redcloud_gfx_2_vga_fix(void)
+{
+   /* enable the DAC POWER */
+   EnableDACPower();
+#if 0
+   int i;
+
+   /* set the character width to 9 */
+   gfx_outb(0x3C4, 0x1);
+   gfx_outb(0x3C5, 0x2);
+
+   /* clear the gfx mode bit in VGA Attribute controller */
+   gfx_inb(0x3DA);
+   gfx_outb(0x3C0, 0x30);
+   gfx_outb(0x3C0, 0xC);
+
+   /* Re init the EGA Palaette */
+   for (i = 0; i < 16; i++) {
+      gfx_inb(0x3DA);
+      gfx_outb(0x3C0, i);
+      gfx_outb(0x3C0, i);
+   }
+
+   /* Re init the Overscan color to black */
+   gfx_inb(0x3DA);
+   gfx_outb(0x3C0, 0x11);
+   gfx_outb(0x3C0, 0x0);
+
+   /* Re Enable all the 4 color planes */
+   gfx_inb(0x3DA);
+   gfx_outb(0x3C0, 0x12);
+   gfx_outb(0x3C0, 0xF);
+
+   /* Clear Pixel Panning in VGA Attribute controller */
+   gfx_inb(0x3DA);
+   gfx_outb(0x3C0, 0x33);
+   gfx_outb(0x3C0, 0x8);
+
+   /* ??????????????????????? */
+   gfx_outb(0x3C0, 0x20);
+   gfx_outb(0x3C0, 0x20);
+#endif
+}
+#endif /* STB_X */
+
+/*----------------------------------------------------------------------------
+ * GX2LeaveGraphics:
+ *
+ * Description	:This function will restore the displaymode parameters
+ * 				 and switches the VGA mode
+ *
+ * Parameters.
+ *    pScreen   :Screen information will be stored in this structure.
+ * 	pScreenInfo :Pointer to the screenInfo structure.
+ *	
+ * 												
+ * Returns		:none.
+ *
+ * Comments		: gfx_vga_mode_switch() will start and end the switching
+ *			      based on the arguments 0 or 1.soft_vga is disabled in
+ *                    this function.
+*----------------------------------------------------------------------------
+*/
+static void
+GX2LeaveGraphics(ScrnInfoPtr pScreenInfo)
+{
+   GeodePtr pGeode = GX2GetRec(pScreenInfo);
+
+   /* Restore VG registers */
+#if defined(STB_X)
+   Gal_set_display_timing(&pGeode->FBgfxdisplaytiming);
+
+   Gal_set_display_offset(pGeode->FBDisplayOffset);
+
+   /* Restore Cursor */
+   Gal_set_cursor_position(pGeode->FBCursorOffset, 0, 0, 0, 0);
+
+   /* Restore the previous Compression state */
+   if (pGeode->FBCompressionEnable) {
+      Gal_set_compression_parameters(GAL_COMPRESSION_ALL,
+				     pGeode->FBCompressionOffset,
+				     pGeode->FBCompressionPitch,
+				     pGeode->FBCompressionSize);
+
+      Gal_set_compression_enable(GAL_COMPRESSION_ENABLE);
+   }
+#else /* STB_X */
+   gfx_set_display_timings(pGeode->FBgfxdisplaytiming.wBpp,
+			   pGeode->FBgfxdisplaytiming.wPolarity,
+			   pGeode->FBgfxdisplaytiming.wHActive,
+			   pGeode->FBgfxdisplaytiming.wHBlankStart,
+			   pGeode->FBgfxdisplaytiming.wHSyncStart,
+			   pGeode->FBgfxdisplaytiming.wHSyncEnd,
+			   pGeode->FBgfxdisplaytiming.wHBlankEnd,
+			   pGeode->FBgfxdisplaytiming.wHTotal,
+			   pGeode->FBgfxdisplaytiming.wVActive,
+			   pGeode->FBgfxdisplaytiming.wVBlankStart,
+			   pGeode->FBgfxdisplaytiming.wVSyncStart,
+			   pGeode->FBgfxdisplaytiming.wVSyncEnd,
+			   pGeode->FBgfxdisplaytiming.wVBlankEnd,
+			   pGeode->FBgfxdisplaytiming.wVTotal,
+			   pGeode->FBgfxdisplaytiming.dwDotClock);
+
+   gfx_set_compression_enable(0);
+
+   /* Restore the previous Compression state */
+   if (pGeode->FBCompressionEnable) {
+      gfx_set_compression_offset(pGeode->FBCompressionOffset);
+      gfx_set_compression_pitch(pGeode->FBCompressionPitch);
+      gfx_set_compression_size(pGeode->FBCompressionSize);
+      gfx_set_compression_enable(1);
+   }
+
+   gfx_set_display_pitch(pGeode->FBgfxdisplaytiming.wPitch);
+
+   gfx_set_display_offset(pGeode->FBDisplayOffset);
+
+   /* Restore Cursor */
+   gfx_set_cursor_position(pGeode->FBCursorOffset, 0, 0, 0, 0);
+
+   GeodeDebug(("FBVGAActive %d\n", pGeode->FBVGAActive));
+   if (pGeode->FBVGAActive) {
+      pGeode->vesa->pInt->num = 0x10;
+      pGeode->vesa->pInt->ax = 0x3;
+      pGeode->vesa->pInt->bx = 0;
+      xf86ExecX86int10(pGeode->vesa->pInt);
+      gfx_delay_milliseconds(3);
+      EnableDACPower();
+   }
+#endif /* STB_X */
+}
+
+/*----------------------------------------------------------------------------
+ * GX2CloseScreen.
+ *
+ * Description	:This function will restore the original mode
+ *				 and also it unmap video memory
+ *
+ * Parameters.
+ *    ScrnIndex	:Screen index value of the screen will be closed.
+ * 	pScreen    	:Pointer to the screen structure.
+ *	
+ * 												
+ * Returns		:TRUE on success and FALSE on Failure.
+ *
+ * Comments		:none.
+*----------------------------------------------------------------------------
+*/
+static Bool
+GX2CloseScreen(int scrnIndex, ScreenPtr pScreen)
+{
+   ScrnInfoPtr pScreenInfo = xf86Screens[scrnIndex];
+   GeodePtr pGeode = GEODEPTR(pScreenInfo);
+
+   if (pGeode->ShadowPtr)
+      xfree(pGeode->ShadowPtr);
+
+   DEBUGMSG(0, (scrnIndex, X_PROBED, "GX2CloseScreen %d\n",
+		pScreenInfo->vtSema));
+   if (pScreenInfo->vtSema)
+      GX2LeaveGraphics(pScreenInfo);
+
+   if (pGeode->AccelInfoRec)
+      XAADestroyInfoRec(pGeode->AccelInfoRec);
+
+   if (pGeode->AccelImageWriteBufferOffsets) {
+      xfree(pGeode->AccelImageWriteBufferOffsets);
+      pGeode->AccelImageWriteBufferOffsets = 0x0;
+   }
+   /* free the allocated off screen area */
+   xf86FreeOffscreenArea(pGeode->AccelImgArea);
+   xf86FreeOffscreenArea(pGeode->CompressionArea);
+
+   pScreenInfo->vtSema = FALSE;
+
+   GX2UnmapMem(pScreenInfo);
+   if (pGeode && (pScreen->CloseScreen = pGeode->CloseScreen)) {
+      pGeode->CloseScreen = NULL;
+      return ((*pScreen->CloseScreen) (scrnIndex, pScreen));
+   }
+   return TRUE;
+}
+
+#ifdef DPMSExtension
+/*----------------------------------------------------------------------------
+ * GX2DPMSSet.
+ *
+ * Description	:This function sets geode into Power Management
+ *               Signalling mode.				
+ *
+ * Parameters.
+ * 	pScreenInfo	 :Pointer to screen info strucrure.
+ * 	mode         :Specifies the power management mode.
+ *	 												
+ * Returns		 :none.
+ *
+ * Comments      :none.
+*----------------------------------------------------------------------------
+*/
+static void
+GX2DPMSSet(ScrnInfoPtr pScreenInfo, int mode, int flags)
+{
+   GeodePtr pGeode;
+
+   pGeode = GEODEPTR(pScreenInfo);
+
+   GeodeDebug(("GX2DPMSSet!\n"));
+
+   /* Check if we are actively controlling the display */
+   if (!pScreenInfo->vtSema) {
+      ErrorF("GX2DPMSSet called when we not controlling the VT!\n");
+      return;
+   }
+   switch (mode) {
+   case DPMSModeOn:
+      /* Screen: On; HSync: On; VSync: On */
+      GFX(set_crt_enable(CRT_ENABLE));
+#if defined(STB_X)
+      if (pGeode->Panel)
+	 Gal_pnl_powerup();
+#else /* STB_X */
+      if (pGeode->Panel)
+	 Pnl_PowerUp();
+#endif /* STB_X */
+      break;
+
+   case DPMSModeStandby:
+      /* Screen: Off; HSync: Off; VSync: On */
+      GFX(set_crt_enable(CRT_STANDBY));
+#if defined(STB_X)
+      if (pGeode->Panel)
+	 Gal_pnl_powerdown();
+#else /* STB_X */
+      if (pGeode->Panel)
+	 Pnl_PowerDown();
+#endif /* STB_X */
+      break;
+
+   case DPMSModeSuspend:
+      /* Screen: Off; HSync: On; VSync: Off */
+      GFX(set_crt_enable(CRT_SUSPEND));
+#if defined(STB_X)
+      if (pGeode->Panel)
+	 Gal_pnl_powerdown();
+#else /* STB_X */
+      if (pGeode->Panel)
+	 Pnl_PowerDown();
+#endif /* STB_X */
+      break;
+   case DPMSModeOff:
+      /* Screen: Off; HSync: Off; VSync: Off */
+      GFX(set_crt_enable(CRT_DISABLE));
+#if defined(STB_X)
+      if (pGeode->Panel)
+	 Gal_pnl_powerdown();
+#else /* STB_X */
+      if (pGeode->Panel)
+	 Pnl_PowerDown();
+#endif /* STB_X */
+      break;
+   }
+}
+#endif
+
+/*----------------------------------------------------------------------------
+ * GX2ScreenInit.
+ *
+ * Description	:This function will be called at the each ofserver
+ *   			 generation.				
+ *
+ * Parameters.
+ *   scrnIndex   :Specfies the screenindex value during generation.
+ *    pScreen	 :Pointer to screen info strucrure.
+ * 	argc         :parameters for command line arguments count
+ *	argv         :command line arguments if any it is not used.  												
+ *
+ * Returns		 :none.
+ *
+ * Comments      :none.
+*----------------------------------------------------------------------------
+*/
+static Bool
+GX2ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
+{
+   ScrnInfoPtr pScreenInfo = xf86Screens[pScreen->myNum];
+   GeodePtr pGeode;
+   int i;
+   Bool Inited = FALSE;
+   unsigned char *FBStart;
+   unsigned int req_offscreenmem;
+   int width, height, displayWidth;
+   VisualPtr visual;
+   BoxRec AvailBox;
+   RegionRec OffscreenRegion;
+
+   DCount = 30;
+   GeodeDebug(("GX2ScreenInit!\n"));
+   /* Get driver private */
+   pGeode = GX2GetRec(pScreenInfo);
+   GeodeDebug(("GX2ScreenInit(0)!\n"));
+   /*
+    * * Allocate a vgaHWRec
+    */
+   GeodeDebug(("FBVGAActive %d\n", pGeode->FBVGAActive));
+   if (pGeode->FBVGAActive) {
+      if (!vgaHWGetHWRec(pScreenInfo))
+	 return FALSE;
+      if (!vgaHWMapMem(pScreenInfo))
+	 return FALSE;
+      vgaHWGetIOBase(VGAHWPTR(pScreenInfo));
+   }
+
+   if (!GX2MapMem(pScreenInfo))
+      return FALSE;
+
+   pGeode->Pitch = GX2CalculatePitchBytes(pScreenInfo->virtualX,
+					  pScreenInfo->bitsPerPixel);
+
+   /* SET UP GRAPHICS MEMORY AVAILABLE FOR PIXMAP CACHE */
+   AvailBox.x1 = 0;
+   AvailBox.y1 = pScreenInfo->virtualY;
+   AvailBox.x2 = pScreenInfo->displayWidth;
+   AvailBox.y2 = (pGeode->FBSize / pGeode->Pitch);
+
+   pGeode->CursorSize = 16 * 64;	/* 64x64 */
+
+   if (pGeode->HWCursor) {
+      /* Compute cursor buffer */
+      /* Default cursor offset, end of the frame buffer */
+      pGeode->CursorStartOffset = pGeode->FBSize - pGeode->CursorSize;
+      AvailBox.y2 -= 1;
+   }
+
+   DEBUGMSG(1, (scrnIndex, X_PROBED,
+		"Memory manager initialized to (%d,%d) (%d,%d) %d %d %d\n",
+		AvailBox.x1, AvailBox.y1, AvailBox.x2, AvailBox.y2,
+		pGeode->Pitch, pScreenInfo->displayWidth,
+		pScreenInfo->bitsPerPixel));
+
+   /* set the offscreen offset accordingly */
+   if (pGeode->Compression) {
+
+      pGeode->CBPitch = 544;
+      pGeode->CBSize = 544;
+
+      req_offscreenmem = pScreenInfo->virtualY * pGeode->CBPitch;
+      req_offscreenmem += pGeode->Pitch - 1;
+      req_offscreenmem /= pGeode->Pitch;
+      pGeode->CBOffset = AvailBox.y1 * pGeode->Pitch;
+      AvailBox.y1 += req_offscreenmem;
+   }
+   DEBUGMSG(1, (scrnIndex, X_PROBED,
+		"Memory manager initialized to (%d,%d) (%d,%d)\n",
+		AvailBox.x1, AvailBox.y1, AvailBox.x2, AvailBox.y2));
+
+   if (!pGeode->NoAccel) {
+      if (pGeode->NoOfImgBuffers > 0) {
+	 if (pGeode->NoOfImgBuffers <= (AvailBox.y2 - AvailBox.y1)) {
+	    pGeode->AccelImageWriteBufferOffsets =
+		  xalloc(sizeof(unsigned long) * pGeode->NoOfImgBuffers);
+
+	    pGeode->AccelImageWriteBufferOffsets[0] =
+		  ((unsigned char *)pGeode->FBBase) +
+		  (AvailBox.y1 * pGeode->Pitch);
+
+	    for (i = 1; i < pGeode->NoOfImgBuffers; i++) {
+	       pGeode->AccelImageWriteBufferOffsets[i] =
+		     pGeode->AccelImageWriteBufferOffsets[i - 1] +
+		     pGeode->Pitch;
+	    }
+
+	    for (i = 0; i < pGeode->NoOfImgBuffers; i++) {
+	       DEBUGMSG(1, (scrnIndex, X_PROBED,
+			    "memory  %d %x\n", i,
+			    pGeode->AccelImageWriteBufferOffsets[i]));
+	    }
+	    AvailBox.y1 += pGeode->NoOfImgBuffers;
+	 } else {
+	    xf86DrvMsg(scrnIndex, X_ERROR,
+		       "Unable to reserve scanline area\n");
+	 }
+      }
+      DEBUGMSG(1, (scrnIndex, X_PROBED,
+		   "Memory manager initialized to (%d,%d) (%d,%d)\n",
+		   AvailBox.x1, AvailBox.y1, AvailBox.x2, AvailBox.y2));
+
+      REGION_INIT(pScreen, &OffscreenRegion, &AvailBox, 2);
+
+      if (!xf86InitFBManagerRegion(pScreen, &OffscreenRegion)) {
+	 xf86DrvMsg(scrnIndex, X_ERROR,
+		    "Memory manager initialization to (%d,%d) (%d,%d) failed\n",
+		    AvailBox.x1, AvailBox.y1, AvailBox.x2, AvailBox.y2);
+      } else {
+	 xf86DrvMsg(scrnIndex, X_INFO,
+		    "Memory manager initialized to (%d,%d) (%d,%d)\n",
+		    AvailBox.x1, AvailBox.y1, AvailBox.x2, AvailBox.y2);
+      }
+      REGION_UNINIT(pScreen, &OffscreenRegion);
+   }
+
+   /* Initialise graphics mode */
+   if (!GX2EnterGraphics(pScreen, pScreenInfo))
+      return FALSE;
+
+   GX2AdjustFrame(scrnIndex, pScreenInfo->frameX0, pScreenInfo->frameY0, 0);
+   GeodeDebug(("GX2ScreenInit(1)!\n"));
+
+   /* Reset visual list */
+   miClearVisualTypes();
+   GeodeDebug(("GX2ScreenInit(2)!\n"));
+
+   /* Setup the visual we support */
+   if (pScreenInfo->bitsPerPixel > 8) {
+      DEBUGMSG(1, (scrnIndex, X_PROBED,
+		   "miSetVisualTypes %d %X %X %X\n",
+		   pScreenInfo->depth,
+		   TrueColorMask,
+		   pScreenInfo->rgbBits, pScreenInfo->defaultVisual));
+
+      if (!miSetVisualTypes(pScreenInfo->depth,
+			    TrueColorMask,
+			    pScreenInfo->rgbBits,
+			    pScreenInfo->defaultVisual)) {
+	 return FALSE;
+      }
+   } else {
+      if (!miSetVisualTypes(pScreenInfo->depth,
+			    miGetDefaultVisualMask(pScreenInfo->depth),
+			    pScreenInfo->rgbBits,
+			    pScreenInfo->defaultVisual)) {
+	 return FALSE;
+      }
+   }
+   GeodeDebug(("GX2ScreenInit(3)!\n"));
+
+   /* Set for RENDER extensions */
+   miSetPixmapDepths();
+
+   /* Call the framebuffer layer's ScreenInit function, and fill in other
+    * * pScreen fields.
+    */
+
+   width = pScreenInfo->virtualX;
+   height = pScreenInfo->virtualY;
+
+   displayWidth = pScreenInfo->displayWidth;
+   if (pGeode->Rotate) {
+      width = pScreenInfo->virtualY;
+      height = pScreenInfo->virtualX;
+   }
+   if (pGeode->ShadowFB) {
+      pGeode->ShadowPitch = BitmapBytePad(pScreenInfo->bitsPerPixel * width);
+      pGeode->ShadowPtr = xalloc(pGeode->ShadowPitch * height);
+      displayWidth = pGeode->ShadowPitch / (pScreenInfo->bitsPerPixel >> 3);
+      FBStart = pGeode->ShadowPtr;
+   } else {
+      pGeode->ShadowPtr = NULL;
+
+      FBStart = pGeode->FBBase;
+      DEBUGMSG(1, (0, X_PROBED, "FBStart %X \n", FBStart));
+   }
+
+   switch (pScreenInfo->bitsPerPixel) {
+#if CFB
+   case 8:
+      Inited = cfbScreenInit(pScreen, FBStart, width, height,
+			     pScreenInfo->xDpi, pScreenInfo->yDpi,
+			     displayWidth);
+      break;
+   case 16:
+      Inited = cfb16ScreenInit(pScreen, FBStart, width, height,
+			       pScreenInfo->xDpi, pScreenInfo->yDpi,
+			       displayWidth);
+      break;
+   case 24:
+   case 32:
+      Inited = cfb32ScreenInit(pScreen, FBStart, width, height,
+			       pScreenInfo->xDpi, pScreenInfo->yDpi,
+			       displayWidth);
+      break;
+#else
+   case 8:
+   case 16:
+   case 24:
+   case 32:
+      Inited = fbScreenInit(pScreen, FBStart, width, height,
+			    pScreenInfo->xDpi, pScreenInfo->yDpi,
+			    displayWidth, pScreenInfo->bitsPerPixel);
+      break;
+#endif
+   default:
+      xf86DrvMsg(scrnIndex, X_ERROR,
+		 "Internal error: invalid bpp (%d) in ScreenInit\n",
+		 pScreenInfo->bitsPerPixel);
+      Inited = FALSE;
+      break;
+   }
+   if (!Inited)
+      return FALSE;
+
+   GeodeDebug(("GX2ScreenInit(4)!\n"));
+   xf86SetBlackWhitePixels(pScreen);
+
+   if (!pGeode->ShadowFB) {
+      GX2DGAInit(pScreen);
+   }
+   GeodeDebug(("GX2ScreenInit(5)!\n"));
+   if (pScreenInfo->bitsPerPixel > 8) {
+      /* Fixup RGB ordering */
+      visual = pScreen->visuals + pScreen->numVisuals;
+      while (--visual >= pScreen->visuals) {
+	 if ((visual->class | DynamicClass) == DirectColor) {
+	    visual->offsetRed = pScreenInfo->offset.red;
+	    visual->offsetGreen = pScreenInfo->offset.green;
+	    visual->offsetBlue = pScreenInfo->offset.blue;
+	    visual->redMask = pScreenInfo->mask.red;
+	    visual->greenMask = pScreenInfo->mask.green;
+	    visual->blueMask = pScreenInfo->mask.blue;
+	 }
+      }
+   }
+#if CFB
+#else
+   /* must be after RGB ordering fixed */
+   fbPictureInit(pScreen, 0, 0);
+#endif
+
+   GeodeDebug(("GX2ScreenInit(6)!\n"));
+   if (!pGeode->NoAccel) {
+      GX2AccelInit(pScreen);
+   }
+   GeodeDebug(("GX2ScreenInit(7)!\n"));
+   miInitializeBackingStore(pScreen);
+   xf86SetBackingStore(pScreen);
+   GeodeDebug(("GX2ScreenInit(8)!\n"));
+   /* Initialise software cursor */
+   miDCInitialize(pScreen, xf86GetPointerScreenFuncs());
+   /* Initialize HW cursor layer.
+    * * Must follow software cursor initialization
+    */
+   if (pGeode->HWCursor) {
+      if (!GX2HWCursorInit(pScreen))
+	 xf86DrvMsg(pScreenInfo->scrnIndex, X_ERROR,
+		    "Hardware cursor initialization failed\n");
+   }
+   GeodeDebug(("GX2ScreenInit(9)!\n"));
+   /* Setup default colourmap */
+   if (!miCreateDefColormap(pScreen)) {
+      return FALSE;
+   }
+   GeodeDebug(("GX2ScreenInit(10)!\n"));
+   /* Initialize colormap layer.
+    * * Must follow initialization of the default colormap
+    */
+   if (!xf86HandleColormaps(pScreen, 256, 8,
+			    GX2LoadPalette, NULL,
+			    CMAP_PALETTED_TRUECOLOR |
+			    CMAP_RELOAD_ON_MODE_SWITCH)) {
+      return FALSE;
+   }
+
+   GeodeDebug(("GX2ScreenInit(11)!\n"));
+
+   if (pGeode->ShadowFB) {
+      RefreshAreaFuncPtr refreshArea = GX2RefreshArea;
+
+      if (pGeode->Rotate) {
+	 if (!pGeode->PointerMoved) {
+	    pGeode->PointerMoved = pScreenInfo->PointerMoved;
+	    pScreenInfo->PointerMoved = GX2PointerMoved;
+	 }
+	 switch (pScreenInfo->bitsPerPixel) {
+	 case 8:
+	    refreshArea = GX2RefreshArea8;
+	    break;
+	 case 16:
+	    refreshArea = GX2RefreshArea16;
+	    break;
+	 case 24:
+	    refreshArea = GX2RefreshArea24;
+	    break;
+	 case 32:
+	    refreshArea = GX2RefreshArea32;
+	    break;
+	 }
+      }
+      ShadowFBInit(pScreen, refreshArea);
+   }
+#ifdef DPMSExtension
+   xf86DPMSInit(pScreen, GX2DPMSSet, 0);
+#endif
+   GeodeDebug(("GX2ScreenInit(12)!\n"));
+
+   pScreenInfo->memPhysBase = (unsigned long)pGeode->FBBase;
+   pScreenInfo->fbOffset = 0;
+
+   GeodeDebug(("GX2ScreenInit(13)!\n"));
+   GX2InitVideo(pScreen);		/* needed for video */
+   /* Wrap the screen's CloseScreen vector and set its
+    * SaveScreen vector 
+    */
+   pGeode->CloseScreen = pScreen->CloseScreen;
+   pScreen->CloseScreen = GX2CloseScreen;
+
+   pScreen->SaveScreen = GX2SaveScreen;
+   GeodeDebug(("GX2ScreenInit(14)!\n"));
+
+   /* Report any unused options */
+   if (serverGeneration == 1) {
+      xf86ShowUnusedOptions(pScreenInfo->scrnIndex, pScreenInfo->options);
+   }
+   GeodeDebug(("GX2ScreenInit(15)!\n"));
+   return TRUE;
+}
+
+/*----------------------------------------------------------------------------
+ * GX2SwitchMode.
+ *
+ * Description	:This function will switches the screen mode
+ *   			    				
+ * Parameters:
+ *    scrnIndex	:Specfies the screen index value.
+ *    pMode		:pointer to the mode structure.
+ * 	  flags     :may be used for status check?.
+ *	  												
+ * Returns		:Returns TRUE on success and FALSE on failure.
+ *
+ * Comments     :none.
+*----------------------------------------------------------------------------
+*/
+Bool
+GX2SwitchMode(int scrnIndex, DisplayModePtr pMode, int flags)
+{
+   GeodeDebug(("GX2SwitchMode!\n"));
+   return GX2SetMode(xf86Screens[scrnIndex], pMode);
+}
+
+/*----------------------------------------------------------------------------
+ * GX2AdjustFrame.
+ *
+ * Description	:This function is used to intiallize the start
+ *				 address of the memory.
+ * Parameters.
+ *    scrnIndex	:Specfies the screen index value.
+ *     x     	:x co-ordinate value interms of pixels.
+ * 	   y        :y co-ordinate value interms of pixels.
+ *	  												
+ * Returns		:none.
+ *
+ * Comments    	:none.
+*----------------------------------------------------------------------------
+*/
+void
+GX2AdjustFrame(int scrnIndex, int x, int y, int flags)
+{
+   ScrnInfoPtr pScreenInfo = xf86Screens[scrnIndex];
+   GeodePtr pGeode = GX2GetRec(pScreenInfo);
+   unsigned long offset;
+
+   /* y offset */
+   offset = (unsigned long)y *(unsigned long)pGeode->Pitch;
+
+   /* x offset */
+   offset += x * (pScreenInfo->bitsPerPixel >> 3);
+
+   GFX(set_display_offset(offset));
+}
+
+/*----------------------------------------------------------------------------
+ * GX2EnterVT.
+ *
+ * Description	:This is called when VT switching back to the X server
+ *			
+ * Parameters.
+ *    scrnIndex	:Specfies the screen index value.
+ *     flags   	:Not used inside the function.
+ * 	 						
+ * Returns		:none.
+ *
+ * Comments     :none.
+*----------------------------------------------------------------------------
+*/
+static Bool
+GX2EnterVT(int scrnIndex, int flags)
+{
+   GeodeDebug(("GX2EnterVT!\n"));
+   return GX2EnterGraphics(NULL, xf86Screens[scrnIndex]);
+}
+
+/*----------------------------------------------------------------------------
+ * GX2LeaveVT.
+ *
+ * Description	:This is called when VT switching  X server text mode.
+ *			
+ * Parameters.
+ *    scrnIndex	:Specfies the screen index value.
+ *     flags    :Not used inside the function.
+ * 	 						
+ * Returns		:none.
+ *
+ * Comments     :none.
+*----------------------------------------------------------------------------
+*/
+static void
+GX2LeaveVT(int scrnIndex, int flags)
+{
+   GeodeDebug(("GX2LeaveVT!\n"));
+   GX2LeaveGraphics(xf86Screens[scrnIndex]);
+}
+
+/*----------------------------------------------------------------------------
+ * GX2FreeScreen.
+ *
+ * Description	:This is called to free any persistent data structures.
+ *			
+ * Parameters.
+ *    scrnIndex :Specfies the screen index value.
+ *     flags   	:Not used inside the function.
+ * 	 						
+ * Returns		:none.
+ *
+ * Comments     :This will be called only when screen being deleted..
+*----------------------------------------------------------------------------
+*/
+static void
+GX2FreeScreen(int scrnIndex, int flags)
+{
+   GeodeDebug(("GX2FreeScreen!\n"));
+   if (xf86LoaderCheckSymbol("vgaHWFreeHWRec"))
+      vgaHWFreeHWRec(xf86Screens[scrnIndex]);
+   GX2FreeRec(xf86Screens[scrnIndex]);
+}
+
+/*----------------------------------------------------------------------------
+ * GX2ValidMode.
+ *
+ * Description	:This function checks if a mode is suitable for selected
+ *                   		chipset.
+ * Parameters.
+ *    scrnIndex :Specfies the screen index value.
+ *     pMode	:Pointer to the screen mode structure..
+ * 	 verbose    :not used for implementation.						
+ *     flags    :not used for implementation
+ *
+ * Returns		:MODE_OK if the specified mode is supported or
+ *                    		MODE_NO_INTERLACE.
+ * Comments     :none.
+*----------------------------------------------------------------------------
+*/
+static int
+GX2ValidMode(int scrnIndex, DisplayModePtr pMode, Bool Verbose, int flags)
+{
+   unsigned int total_memory_required;
+   ScrnInfoPtr pScreenInfo = xf86Screens[scrnIndex];
+   int ret = -1;
+   GeodePtr pGeode = GX2GetRec(pScreenInfo);
+
+   DEBUGMSG(1, (0, X_NONE, "GeodeValidateMode: %dx%d %d %d\n",
+		pMode->CrtcHDisplay, pMode->CrtcVDisplay,
+		pScreenInfo->bitsPerPixel, GX2GetRefreshRate(pMode)));
+   {
+      DEBUGMSG(1, (0, X_NONE, "CRT mode\n"));
+      if (pMode->Flags & V_INTERLACE)
+	 return MODE_NO_INTERLACE;
+
+#if defined(STB_X)
+      Gal_is_display_mode_supported(pMode->CrtcHDisplay, pMode->CrtcVDisplay,
+				    pScreenInfo->bitsPerPixel,
+				    GX2GetRefreshRate(pMode), &ret);
+#else /* STB_X */
+      ret = gfx_is_display_mode_supported(pMode->CrtcHDisplay,
+					  pMode->CrtcVDisplay,
+					  pScreenInfo->bitsPerPixel,
+					  GX2GetRefreshRate(pMode));
+#endif /* STB_X */
+   }
+   if (ret < 0)
+      return MODE_NOMODE;
+
+   total_memory_required = GX2CalculatePitchBytes(pMode->CrtcHDisplay,
+						  pScreenInfo->bitsPerPixel) *
+	 pMode->CrtcVDisplay;
+
+   DEBUGMSG(1, (0, X_NONE, "Total Mem %X %X\n",
+		total_memory_required, pGeode->FBSize));
+
+   if (total_memory_required > pGeode->FBSize)
+      return MODE_MEM;
+
+   return MODE_OK;
+}
+
+/*----------------------------------------------------------------------------
+ * GX2LoadPalette.
+ *
+ * Description	:This function sets the  palette entry used for graphics data
+ *
+ * Parameters.
+ *   pScreenInfo:Points the screeninfo structure.
+ *     numColors:Specifies the no of colors it supported.
+ * 	 indizes    :This is used get index value .						
+ *     LOCO     :to be added.
+ *     pVisual  :to be added.
+ *
+ * Returns		:MODE_OK if the specified mode is supported or
+ *          	 MODE_NO_INTERLACE.
+ * Comments     :none.
+*----------------------------------------------------------------------------
+*/
+
+static void
+GX2LoadPalette(ScrnInfoPtr pScreenInfo,
+	       int numColors, int *indizes, LOCO * colors, VisualPtr pVisual)
+{
+   int i, index, color;
+
+   for (i = 0; i < numColors; i++) {
+      index = indizes[i] & 0xFF;
+      color = (((unsigned long)(colors[index].red & 0xFF)) << 16) |
+	    (((unsigned long)(colors[index].green & 0xFF)) << 8) |
+	    ((unsigned long)(colors[index].blue & 0xFF));
+      DEBUGMSG(0, (0, X_NONE, "GX2LoadPalette: %d %d %X\n",
+		   numColors, index, color));
+
+      GFX(set_display_palette_entry(index, color));
+   }
+}
+
+static Bool
+GX2MapMem(ScrnInfoPtr pScreenInfo)
+{
+   GeodePtr pGeode = GEODEPTR(pScreenInfo);
+
+#if defined(STB_X)
+   pGeode->FBBase = (unsigned char *)xf86MapVidMem(pScreenInfo->scrnIndex,
+						   VIDMEM_FRAMEBUFFER,
+						   pGeode->FBLinearAddr,
+						   pGeode->FBSize);
+
+#else
+   gfx_virt_regptr = (unsigned char *)xf86MapVidMem(pScreenInfo->scrnIndex,
+						    VIDMEM_MMIO,
+						    (unsigned int)
+						    gfx_get_cpu_register_base
+						    (), pGeode->cpu_reg_size);
+
+   if (pGeode->DetectedChipSet & GX2) {
+      gfx_virt_gpptr = (unsigned char *)xf86MapVidMem(pScreenInfo->scrnIndex,
+						      VIDMEM_MMIO,
+						      (unsigned int)
+						      gfx_get_graphics_register_base
+						      (),
+						      pGeode->gp_reg_size);
+   } else {
+      gfx_virt_spptr = gfx_virt_regptr;
+   }
+
+   gfx_virt_vidptr = (unsigned char *)xf86MapVidMem(pScreenInfo->scrnIndex,
+						    VIDMEM_MMIO,
+						    (unsigned int)
+						    gfx_get_vid_register_base
+						    (), pGeode->vid_reg_size);
+
+   gfx_virt_fbptr = (unsigned char *)xf86MapVidMem(pScreenInfo->scrnIndex,
+						   VIDMEM_FRAMEBUFFER,
+						   pGeode->FBLinearAddr,
+						   pGeode->FBSize);
+
+   pGeode->FBBase = gfx_virt_fbptr;
+
+   DEBUGMSG(1, (0, X_NONE, "Set mode %X %X %X %X %X\n",
+		gfx_virt_regptr,
+		gfx_virt_gpptr,
+		gfx_virt_spptr, gfx_virt_vidptr, gfx_virt_fbptr));
+
+   /* CHECK IF REGISTERS WERE MAPPED SUCCESSFULLY */
+   if ((!gfx_virt_regptr) ||
+       (!gfx_virt_gpptr) || (!gfx_virt_vidptr) || (!gfx_virt_fbptr)) {
+      DEBUGMSG(1, (0, X_NONE, "Could not map hardware registers.\n"));
+      return (FALSE);
+   }
+
+   /* Map the XpressROM ptr to read what platform are we on */
+   XpressROMPtr = (unsigned char *)xf86MapVidMem(pScreenInfo->scrnIndex,
+						 VIDMEM_FRAMEBUFFER, 0xF0000,
+						 0x10000);
+
+   DEBUGMSG(1, (0, X_NONE, "adapter info %x %x %x %x, %X\n",
+		pGeode->cpu_version,
+		pGeode->vid_version,
+		pGeode->FBSize, pGeode->FBBase, XpressROMPtr));
+#endif
+
+   return TRUE;
+}
+
+/*
+ * Unmap the framebuffer and MMIO memory.
+ */
+
+static Bool
+GX2UnmapMem(ScrnInfoPtr pScreenInfo)
+{
+#if !defined(STB_X)
+   GeodePtr pGeode = GEODEPTR(pScreenInfo);
+
+   /* unmap all the memory map's */
+   xf86UnMapVidMem(pScreenInfo->scrnIndex,
+		   gfx_virt_regptr, pGeode->cpu_reg_size);
+   if (pGeode->DetectedChipSet & GX2) {
+      xf86UnMapVidMem(pScreenInfo->scrnIndex,
+		      gfx_virt_gpptr, pGeode->gp_reg_size);
+   }
+   xf86UnMapVidMem(pScreenInfo->scrnIndex,
+		   gfx_virt_vidptr, pGeode->vid_reg_size);
+   xf86UnMapVidMem(pScreenInfo->scrnIndex, gfx_virt_fbptr, pGeode->FBSize);
+   xf86UnMapVidMem(pScreenInfo->scrnIndex, XpressROMPtr, 0x10000);
+#endif /* STB_X */
+   return TRUE;
+}
+
+/* End of file */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_gx2_shadow.c b/xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_gx2_shadow.c
new file mode 100644
index 000000000..8f295d92d
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_gx2_shadow.c
@@ -0,0 +1,468 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_gx2_shadow.c,v 1.2 2003/01/14 09:34:32 alanh Exp $ */
+/*
+ * $Workfile: nsc_gx2_shadow.c $
+ * $Revision: 1.2.2.1 $
+ * $Author: ldelgass $
+ *
+ * File Contents: Direct graphics display routines are implemented and 
+ *                graphics rendering are all done in memory.
+ *
+ * Project:       Geode Xfree Frame buffer device driver.
+ *
+ *     
+ */
+
+/* 
+ * NSC_LIC_ALTERNATIVE_PREAMBLE
+ *
+ * Revision 1.0
+ *
+ * National Semiconductor Alternative GPL-BSD License
+ *
+ * National Semiconductor Corporation licenses this software 
+ * ("Software"):
+ *
+ * National Xfree frame buffer driver
+ *
+ * under one of the two following licenses, depending on how the 
+ * Software is received by the Licensee.
+ * 
+ * If this Software is received as part of the Linux Framebuffer or
+ * other GPL licensed software, then the GPL license designated 
+ * NSC_LIC_GPL applies to this Software; in all other circumstances 
+ * then the BSD-style license designated NSC_LIC_BSD shall apply.
+ *
+ * END_NSC_LIC_ALTERNATIVE_PREAMBLE */
+
+/* NSC_LIC_BSD
+ *
+ * National Semiconductor Corporation Open Source License for 
+ *
+ * National Xfree frame buffer driver
+ *
+ * (BSD License with Export Notice)
+ *
+ * Copyright (c) 1999-2001
+ * National Semiconductor Corporation.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met: 
+ *
+ *   * Redistributions of source code must retain the above copyright 
+ *     notice, this list of conditions and the following disclaimer. 
+ *
+ *   * Redistributions in binary form must reproduce the above 
+ *     copyright notice, this list of conditions and the following 
+ *     disclaimer in the documentation and/or other materials provided 
+ *     with the distribution. 
+ *
+ *   * Neither the name of the National Semiconductor Corporation nor 
+ *     the names of its contributors may be used to endorse or promote 
+ *     products derived from this software without specific prior 
+ *     written permission. 
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+ * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE,
+ * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE.
+ *
+ * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
+ * YOUR JURISDICTION. It is licensee's responsibility to comply with 
+ * any export regulations applicable in licensee's jurisdiction. Under 
+ * CURRENT (2001) U.S. export regulations this software 
+ * is eligible for export from the U.S. and can be downloaded by or 
+ * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
+ * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
+ * Syria, Sudan, Afghanistan and any other country to which the U.S. 
+ * has embargoed goods and services. 
+ *
+ * END_NSC_LIC_BSD */
+
+/* NSC_LIC_GPL
+ *
+ * National Semiconductor Corporation Gnu General Public License for 
+ *
+ * National Xfree frame buffer driver
+ *
+ * (GPL License with Export Notice)
+ *
+ * Copyright (c) 1999-2001
+ * National Semiconductor Corporation.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted under the terms of the GNU General 
+ * Public License as published by the Free Software Foundation; either 
+ * version 2 of the License, or (at your option) any later version  
+ *
+ * In addition to the terms of the GNU General Public License, neither 
+ * the name of the National Semiconductor Corporation nor the names of 
+ * its contributors may be used to endorse or promote products derived 
+ * from this software without specific prior written permission. 
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+ * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, 
+ * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE. See the GNU General Public License for more details. 
+ *
+ * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
+ * YOUR JURISDICTION. It is licensee's responsibility to comply with 
+ * any export regulations applicable in licensee's jurisdiction. Under 
+ * CURRENT (2001) U.S. export regulations this software 
+ * is eligible for export from the U.S. and can be downloaded by or 
+ * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
+ * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
+ * Syria, Sudan, Afghanistan and any other country to which the U.S. 
+ * has embargoed goods and services. 
+ *
+ * You should have received a copy of the GNU General Public License 
+ * along with this file; if not, write to the Free Software Foundation, 
+ * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 
+ *
+ * END_NSC_LIC_GPL */
+
+#include "xf86.h"
+#include "xf86_OSproc.h"
+#include "xf86Resources.h"
+#include "xf86_ansic.h"
+#include "xf86PciInfo.h"
+#include "xf86Pci.h"
+#include "nsc.h"
+#include "shadowfb.h"
+#include "servermd.h"
+
+void GX2RefreshArea(ScrnInfoPtr pScrn, int num, BoxPtr pbox);
+void GX2PointerMoved(int index, int x, int y);
+void GX2RefreshArea8(ScrnInfoPtr pScrn, int num, BoxPtr pbox);
+void GX2RefreshArea16(ScrnInfoPtr pScrn, int num, BoxPtr pbox);
+void GX2RefreshArea24(ScrnInfoPtr pScrn, int num, BoxPtr pbox);
+void GX2RefreshArea32(ScrnInfoPtr pScrn, int num, BoxPtr pbox);
+
+/*----------------------------------------------------------------------------
+ * GX2RefreshArea.
+ *
+ * Description	:This function  copies the memory to be displayed from the
+ *               shadow pointer.
+ * Parameters.
+ *    pScrn		:Pointer to screen structure.
+ *    num		:Specifies the num of squarebox area to be displayed.
+ *    pbox		:Points to square of memory to be displayed.
+ * Returns		:none
+ *
+ * Comments		: none
+ *
+*----------------------------------------------------------------------------
+*/
+void
+GX2RefreshArea(ScrnInfoPtr pScrn, int num, BoxPtr pbox)
+{
+   GeodePtr pGeode = GEODEPTR(pScrn);
+   int width, height, Bpp, FBPitch;
+   unsigned char *src, *dst;
+
+   Bpp = pScrn->bitsPerPixel >> 3;
+   FBPitch = BitmapBytePad(pScrn->displayWidth * pScrn->bitsPerPixel);
+   while (num--) {
+      width = (pbox->x2 - pbox->x1) * Bpp;
+      height = pbox->y2 - pbox->y1;
+      src = pGeode->ShadowPtr + (pbox->y1 * pGeode->ShadowPitch) +
+	    (pbox->x1 * Bpp);
+      dst = pGeode->FBBase + (pbox->y1 * FBPitch) + (pbox->x1 * Bpp);
+      while (height--) {
+	 memcpy(dst, src, width);
+	 dst += FBPitch;
+	 src += pGeode->ShadowPitch;
+      }
+
+      pbox++;
+   }
+}
+
+/*----------------------------------------------------------------------------
+ * GX2PointerMoved.
+ *
+ * Description	:This function moves one screen memory from one area to other.
+ *
+ * Parameters.
+ *    index		:Pointer to screen index.
+ *     x		:Specifies the new x co-ordinates of new area.
+ *     y		:Specifies the new y co-ordinates of new area.
+ * Returns		:none
+ *
+ * Comments		:none
+ *
+*----------------------------------------------------------------------------
+*/
+void
+GX2PointerMoved(int index, int x, int y)
+{
+   ScrnInfoPtr pScrn = xf86Screens[index];
+   GeodePtr pGeode = GEODEPTR(pScrn);
+   int newX, newY;
+
+   if (pGeode->Rotate == 1) {
+      newX = pScrn->pScreen->height - y - 1;
+      newY = x;
+   } else {
+      newX = y;
+      newY = pScrn->pScreen->width - x - 1;
+   }
+   (*pGeode->PointerMoved) (index, newX, newY);
+}
+
+/*----------------------------------------------------------------------------
+ * GX2RefreshArea8.
+ *
+ * Description	:This function  copies the memory to be displayed from the
+ *                 shadow pointer by 8bpp.
+ * Parameters.
+ *    pScrn		:Pointer to screen structure.
+ *    num		:Specifies the num of squarebox area to be displayed.
+ *    pbox		:Points to square of memory to be displayed.
+ * Returns		:none
+ *
+ * Comments		:none
+ *
+*----------------------------------------------------------------------------
+*/
+void
+GX2RefreshArea8(ScrnInfoPtr pScrn, int num, BoxPtr pbox)
+{
+   GeodePtr pGeode = GEODEPTR(pScrn);
+   int count, width, height, y1, y2, dstPitch, srcPitch, srcPitch2,
+	 srcPitch3, srcPitch4;
+   CARD8 *dstPtr, *srcPtr, *src;
+   CARD32 *dst;
+
+   dstPitch = pScrn->displayWidth;
+   srcPitch = -pGeode->Rotate * pGeode->ShadowPitch;
+   srcPitch2 = srcPitch * 2;
+   srcPitch3 = srcPitch * 3;
+   srcPitch4 = srcPitch * 4;
+   while (num--) {
+      width = pbox->x2 - pbox->x1;
+      y1 = pbox->y1 & ~3;
+      y2 = (pbox->y2 + 3) & ~3;
+      height = (y2 - y1) >> 2;		/* in dwords */
+
+      if (pGeode->Rotate == 1) {
+	 dstPtr = pGeode->FBBase +
+	       (pbox->x1 * dstPitch) + pScrn->virtualX - y2;
+	 srcPtr = pGeode->ShadowPtr + ((1 - y2) * srcPitch) + pbox->x1;
+      } else {
+	 dstPtr = pGeode->FBBase +
+	       ((pScrn->virtualY - pbox->x2) * dstPitch) + y1;
+	 srcPtr = pGeode->ShadowPtr + (y1 * srcPitch) + pbox->x2 - 1;
+      }
+      while (width--) {
+	 src = srcPtr;
+	 dst = (CARD32 *) dstPtr;
+	 count = height;
+	 while (count--) {
+	    *(dst++) = src[0] | (src[srcPitch] << 8) |
+		  (src[srcPitch2] << 16) | (src[srcPitch3] << 24);
+	    src += srcPitch4;
+	 }
+	 srcPtr += pGeode->Rotate;
+	 dstPtr += dstPitch;
+      }
+      pbox++;
+   }
+}
+
+/*----------------------------------------------------------------------------
+ * GX2RefreshArea16.
+ *
+ * Description	:This function  copies the memory to be displayed from the
+ *               shadow pointer by 16bpp.
+ * Parameters:
+ *    pScrn		:Pointer to screen structure.
+ *    num       :Specifies the num of squarebox area to be displayed.
+ *    pbox      :Points to square of memory to be displayed.
+ * Returns		:none
+ *
+ * Comments     :none
+ *
+*----------------------------------------------------------------------------
+*/
+void
+GX2RefreshArea16(ScrnInfoPtr pScrn, int num, BoxPtr pbox)
+{
+   GeodePtr pGeode = GEODEPTR(pScrn);
+   int count, width, height, y1, y2, dstPitch, srcPitch, srcPitch2;
+   CARD16 *dstPtr, *srcPtr, *src;
+   CARD32 *dst;
+
+   dstPitch = pScrn->displayWidth;
+   srcPitch = -pGeode->Rotate * pGeode->ShadowPitch >> 1;
+   srcPitch2 = srcPitch * 2;
+   while (num--) {
+      width = pbox->x2 - pbox->x1;
+      y1 = pbox->y1 & ~1;
+      y2 = (pbox->y2 + 1) & ~1;
+      height = (y2 - y1) >> 1;		/* in dwords */
+      if (pGeode->Rotate == 1) {
+	 dstPtr = (CARD16 *) pGeode->FBBase +
+	       (pbox->x1 * dstPitch) + pScrn->virtualX - y2;
+	 srcPtr = (CARD16 *) pGeode->ShadowPtr +
+	       ((1 - y2) * srcPitch) + pbox->x1;
+      } else {
+	 dstPtr = (CARD16 *) pGeode->FBBase +
+	       ((pScrn->virtualY - pbox->x2) * dstPitch) + y1;
+	 srcPtr = (CARD16 *) pGeode->ShadowPtr +
+	       (y1 * srcPitch) + pbox->x2 - 1;
+      }
+
+      while (width--) {
+	 src = srcPtr;
+	 dst = (CARD32 *) dstPtr;
+	 count = height;
+	 while (count--) {
+	    *(dst++) = src[0] | (src[srcPitch] << 16);
+	    src += srcPitch2;
+	 }
+	 srcPtr += pGeode->Rotate;
+	 dstPtr += dstPitch;
+      }
+
+      pbox++;
+   }
+}
+
+/*----------------------------------------------------------------------------
+ * GX2RefreshArea24.
+ *
+ * Description	:This function  copies the memory to be displayed from the
+ *               shadow pointer by 24bpp.
+ * Parameters.
+ *    pScrn		:Pointer to screen structure.
+ *    num		:Specifies the num of squarebox area to be displayed.
+ *    pbox      :Points to square of memory to be displayed.
+ * Returns		:none
+ *
+ * Comments		:none
+ *
+*----------------------------------------------------------------------------
+*/
+void
+GX2RefreshArea24(ScrnInfoPtr pScrn, int num, BoxPtr pbox)
+{
+   GeodePtr pGeode = GEODEPTR(pScrn);
+   int count, width, height, y1, y2, dstPitch, srcPitch, srcPitch2, srcPitch3;
+   CARD8 *dstPtr, *srcPtr, *src;
+   CARD32 *dst;
+
+   dstPitch = BitmapBytePad(pScrn->displayWidth * 24);
+   srcPitch = -pGeode->Rotate * pGeode->ShadowPitch;
+   srcPitch2 = srcPitch * 2;
+   srcPitch3 = srcPitch * 3;
+   while (num--) {
+      width = pbox->x2 - pbox->x1;
+      y1 = pbox->y1 & ~3;
+      y2 = (pbox->y2 + 3) & ~3;
+      height = (y2 - y1) >> 2;		/* blocks of 3 dwords */
+      if (pGeode->Rotate == 1) {
+	 dstPtr = pGeode->FBBase +
+	       (pbox->x1 * dstPitch) + ((pScrn->virtualX - y2) * 3);
+	 srcPtr = pGeode->ShadowPtr + ((1 - y2) * srcPitch) + (pbox->x1 * 3);
+      } else {
+	 dstPtr = pGeode->FBBase +
+	       ((pScrn->virtualY - pbox->x2) * dstPitch) + (y1 * 3);
+	 srcPtr = pGeode->ShadowPtr + (y1 * srcPitch) + (pbox->x2 * 3) - 3;
+      }
+      while (width--) {
+	 src = srcPtr;
+	 dst = (CARD32 *) dstPtr;
+	 count = height;
+	 while (count--) {
+	    dst[0] = src[0] | (src[1] << 8) | (src[2] << 16) |
+		  (src[srcPitch] << 24);
+	    dst[1] = src[srcPitch + 1] | (src[srcPitch + 2] << 8) |
+		  (src[srcPitch2] << 16) | (src[srcPitch2 + 1] << 24);
+	    dst[2] = src[srcPitch2 + 2] | (src[srcPitch3] << 8) |
+		  (src[srcPitch3 + 1] << 16) | (src[srcPitch3 + 2] << 24);
+	    dst += 3;
+	    src += srcPitch << 2;
+	 }
+	 srcPtr += pGeode->Rotate * 3;
+	 dstPtr += dstPitch;
+      }
+      pbox++;
+   }
+}
+
+/*----------------------------------------------------------------------------
+ * GX2RefreshArea32.
+ *
+ * Description	:This function  copies the memory to be displayed from the
+ *                    shadow pointer by 32bpp.
+ * Parameters:
+ *    pScrn		:Pointer to screen structure.
+ *    num		:Specifies the num of squarebox area to be displayed.
+ *    pbox		:Points to square of memory to be displayed.
+ * Returns		: none
+ *
+ * Comments		:none
+ *
+*----------------------------------------------------------------------------
+*/
+void
+GX2RefreshArea32(ScrnInfoPtr pScrn, int num, BoxPtr pbox)
+{
+   GeodePtr pGeode = GEODEPTR(pScrn);
+   int count, width, height, dstPitch, srcPitch;
+   CARD32 *dstPtr, *srcPtr, *src, *dst;
+
+   dstPitch = pScrn->displayWidth;
+   srcPitch = -pGeode->Rotate * pGeode->ShadowPitch >> 2;
+   while (num--) {
+      width = pbox->x2 - pbox->x1;
+      height = pbox->y2 - pbox->y1;
+
+      if (pGeode->Rotate == 1) {
+	 dstPtr = (CARD32 *) pGeode->FBBase +
+	       (pbox->x1 * dstPitch) + pScrn->virtualX - pbox->y2;
+	 srcPtr = (CARD32 *) pGeode->ShadowPtr +
+	       ((1 - pbox->y2) * srcPitch) + pbox->x1;
+      } else {
+	 dstPtr = (CARD32 *) pGeode->FBBase +
+	       ((pScrn->virtualY - pbox->x2) * dstPitch) + pbox->y1;
+	 srcPtr = (CARD32 *) pGeode->ShadowPtr +
+	       (pbox->y1 * srcPitch) + pbox->x2 - 1;
+      }
+      while (width--) {
+	 src = srcPtr;
+	 dst = dstPtr;
+	 count = height;
+	 while (count--) {
+	    *(dst++) = *src;
+	    src += srcPitch;
+	 }
+	 srcPtr += pGeode->Rotate;
+	 dstPtr += dstPitch;
+      }
+      pbox++;
+   }
+}
+
+/* End of file */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_gx2_vga.c b/xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_gx2_vga.c
new file mode 100644
index 000000000..9e2edfa31
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_gx2_vga.c
@@ -0,0 +1,570 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_gx2_vga.c,v 1.2 2003/01/14 09:34:32 alanh Exp $ */
+/*
+ * $Workfile: nsc_gx2_vga.c $
+ * $Revision: 1.2.2.1 $
+ * $Author: ldelgass $
+ *
+ * This file contains routines to set modes using the VGA registers.  
+ * Since this file is for the first generation graphics unit, it interfaces
+ * to SoftVGA registers.  It works for both VSA1 and VSA2.
+ *
+ * NSC_LIC_ALTERNATIVE_PREAMBLE
+ *
+ * Revision 1.0
+ *
+ * National Semiconductor Alternative GPL-BSD License
+ *
+ * National Semiconductor Corporation licenses this software 
+ * ("Software"):
+ *
+ *      nsc XFree86
+ *
+ * under one of the two following licenses, depending on how the 
+ * Software is received by the Licensee.
+ * 
+ * If this Software is received as part of the Linux Framebuffer or
+ * other GPL licensed software, then the GPL license designated 
+ * NSC_LIC_GPL applies to this Software; in all other circumstances 
+ * then the BSD-style license designated NSC_LIC_BSD shall apply.
+ *
+ * END_NSC_LIC_ALTERNATIVE_PREAMBLE */
+
+/* NSC_LIC_BSD
+ *
+ * National Semiconductor Corporation Open Source License for Durango
+ *
+ * (BSD License with Export Notice)
+ *
+ * Copyright (c) 1999-2001
+ * National Semiconductor Corporation.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met: 
+ *
+ *   * Redistributions of source code must retain the above copyright 
+ *     notice, this list of conditions and the following disclaimer. 
+ *
+ *   * Redistributions in binary form must reproduce the above 
+ *     copyright notice, this list of conditions and the following 
+ *     disclaimer in the documentation and/or other materials provided 
+ *     with the distribution. 
+ *
+ *   * Neither the name of the National Semiconductor Corporation nor 
+ *     the names of its contributors may be used to endorse or promote 
+ *     products derived from this software without specific prior 
+ *     written permission. 
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+ * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE,
+ * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE.
+ *
+ * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
+ * YOUR JURISDICTION. It is licensee's responsibility to comply with 
+ * any export regulations applicable in licensee's jurisdiction. Under 
+ * CURRENT (2001) U.S. export regulations this software 
+ * is eligible for export from the U.S. and can be downloaded by or 
+ * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
+ * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
+ * Syria, Sudan, Afghanistan and any other country to which the U.S. 
+ * has embargoed goods and services. 
+ *
+ * END_NSC_LIC_BSD */
+
+/* NSC_LIC_GPL
+ *
+ * National Semiconductor Corporation Gnu General Public License for Durango
+ *
+ * (GPL License with Export Notice)
+ *
+ * Copyright (c) 1999-2001
+ * National Semiconductor Corporation.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted under the terms of the GNU General 
+ * Public License as published by the Free Software Foundation; either 
+ * version 2 of the License, or (at your option) any later version  
+ *
+ * In addition to the terms of the GNU General Public License, neither 
+ * the name of the National Semiconductor Corporation nor the names of 
+ * its contributors may be used to endorse or promote products derived 
+ * from this software without specific prior written permission. 
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+ * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, 
+ * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE. See the GNU General Public License for more details. 
+ *
+ * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
+ * YOUR JURISDICTION. It is licensee's responsibility to comply with 
+ * any export regulations applicable in licensee's jurisdiction. Under 
+ * CURRENT (2001) U.S. export regulations this software 
+ * is eligible for export from the U.S. and can be downloaded by or 
+ * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
+ * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
+ * Syria, Sudan, Afghanistan and any other country to which the U.S. 
+ * has embargoed goods and services. 
+ *
+ * You should have received a copy of the GNU General Public License 
+ * along with this file; if not, write to the Free Software Foundation, 
+ * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 
+ *
+ * END_NSC_LIC_GPL */
+
+/* VGA STRUCTURE */
+
+#define GU2_STD_CRTC_REGS 25
+#define GU2_EXT_CRTC_REGS 15
+#define GU2_GDC_REGS 9
+#define GU2_SEQ_REGS 5
+
+#define GU2_VGA_FLAG_MISC_OUTPUT	0x1
+#define GU2_VGA_FLAG_STD_CRTC		0x2
+#define GU2_VGA_FLAG_EXT_CRTC		0x4
+#define GU2_VGA_FLAG_GDC		0x10
+#define GU2_VGA_FLAG_SEQ		0x20
+#define GU2_VGA_FLAG_PALETTE 	0x40
+#define GU2_VGA_FLAG_ATTR 	0x80
+
+static unsigned int GDCregs[10];
+static unsigned int SEQregs[10];
+static unsigned int palette[256];
+static unsigned int ATTRregs[32];
+static unsigned char *font_data = NULL;
+
+#define VGA_BLOCK 0x40000		/* 256 k */
+
+void gu2_vga_extcrtc(char offset, int reset);
+int gu2_get_vga_active(void);
+void gu2_vga_font_data(int flag);
+void gu2_set_vga(int reset);
+int gu2_vga_seq_blanking(void);
+int gu2_vga_attr_ctrl(int reset);
+void gu2_vga_to_gfx(void);
+void gu2_gfx_to_vga(int vga_mode);
+int gu2_vga_seq_reset(int reset);
+int gu2_vga_save(gfx_vga_struct * vga, int flags);
+void gu2_vga_clear_extended(void);
+int gu2_vga_restore(gfx_vga_struct * vga, int flags);
+
+int
+gu2_get_vga_active(void)
+{
+   int data = gfx_read_reg32(MDC_GENERAL_CFG);
+
+   if (data & MDC_GCFG_VGAE)
+      return 1;
+   return 0;
+}
+
+void
+gu2_vga_font_data(int flag)
+{
+   if (flag == 0) {
+      if (font_data == NULL) {
+	 font_data = malloc(VGA_BLOCK);
+      }
+      DEBUGMSG(1, (0, X_NONE, "Saving VGA Data\n"));
+      memcpy(font_data, gfx_virt_fbptr, VGA_BLOCK);
+   } else {
+      if (font_data) {
+	 DEBUGMSG(1, (0, X_NONE, "Restore VGA Data\n"));
+	 memcpy(gfx_virt_fbptr, font_data, VGA_BLOCK);
+	 free(font_data);
+	 font_data = NULL;
+      }
+   }
+}
+
+void
+gu2_set_vga(int reset)
+{
+   int data = gfx_read_reg32(MDC_GENERAL_CFG);
+
+   if (reset)
+      data |= MDC_GCFG_VGAE;
+   else
+      data &= ~MDC_GCFG_VGAE;
+   gfx_write_reg32(MDC_GENERAL_CFG, data);
+}
+
+int
+gu2_vga_seq_blanking(void)
+{
+   int tmp;
+
+   gfx_outb(0x3C4, 1);
+   tmp = gfx_inb(0x3C5);
+   tmp |= 0x20;
+   tmp |= tmp << 8;
+   gfx_outw(0x3C4, tmp);
+
+   gfx_delay_milliseconds(1);
+   return (GFX_STATUS_OK);
+}
+
+int
+gu2_vga_attr_ctrl(int reset)
+{
+   int tmp;
+
+   tmp = gfx_inb(0x3DA);
+   gfx_outb(0x3C0, (unsigned char)(reset ? 0x00 : 0x20));
+   if (reset)
+      tmp = gfx_inb(0x3DA);
+   return (GFX_STATUS_OK);
+}
+
+void
+gu2_vga_to_gfx(void)
+{
+   gu2_vga_attr_ctrl(0);
+
+   gu2_vga_seq_blanking();
+   gfx_delay_milliseconds(2);
+
+   gu2_vga_extcrtc(0x3F, 1);
+}
+
+void
+gu2_gfx_to_vga(int vga_mode)
+{
+   int tmp;
+   char sequencer;
+
+   gu2_vga_extcrtc(0x40, vga_mode);
+
+   /* clear the display blanking bit */
+   gfx_outb(MDC_SEQUENCER_INDEX, MDC_SEQUENCER_CLK_MODE);
+   sequencer = gfx_inb(MDC_SEQUENCER_DATA);
+   sequencer &= ~MDC_CLK_MODE_SCREEN_OFF;
+   sequencer |= 1;
+   gfx_outb(MDC_SEQUENCER_DATA, sequencer);
+
+   gfx_delay_milliseconds(1);
+
+   /*restart the sequencer */
+   gfx_outw(0x3C4, 0x300);
+
+   /* turn on the attribute controler */
+   tmp = gfx_inb(0x3DA);
+   gfx_outb(0x3C0, 0x20);
+   tmp = gfx_inb(0x3DA);
+
+   gu2_vga_extcrtc(0x3F, 0);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_vga_seq_reset
+ *
+ * This routine enables or disables SoftVGA.  It is used to make SoftVGA 
+ * "be quiet" and not interfere with any of the direct hardware access from 
+ * Durango.  For VSA1, the sequencer is reset to stop text redraws.  VSA2 may 
+ * provide a better way to have SoftVGA sit in the background.
+ *-----------------------------------------------------------------------------
+ */
+int
+gu2_vga_seq_reset(int reset)
+{
+   gfx_outb(0x3C4, 0);
+   gfx_outb(0x3C5, (unsigned char)(reset ? 0x00 : 0x03));
+   return (GFX_STATUS_OK);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_vga_save
+ *
+ * This routine saves the state of the VGA registers into the specified 
+ * structure.  Flags indicate what portions of the register state need to 
+ * be saved.
+ *-----------------------------------------------------------------------------
+ */
+int
+gu2_vga_save(gfx_vga_struct * vga, int flags)
+{
+   int i;
+   unsigned short crtcindex, crtcdata;
+
+   crtcindex = (gfx_inb(0x3CC) & 0x01) ? 0x3D4 : 0x3B4;
+   crtcdata = crtcindex + 1;
+
+   /* CHECK MISCELLANEOUS OUTPUT FLAG */
+
+   if (flags & GU2_VGA_FLAG_MISC_OUTPUT) {
+      /* SAVE MISCCELLANEOUS OUTPUT REGISTER */
+
+      vga->miscOutput = gfx_inb(0x3CC);
+   }
+
+   /* CHECK SEQ */
+
+   if (flags & GU2_VGA_FLAG_SEQ) {
+      /* SAVE STANDARD CRTC REGISTERS */
+
+      for (i = 1; i < GU2_SEQ_REGS; i++) {
+	 gfx_outb(0x3C4, (unsigned char)i);
+	 SEQregs[i] = gfx_inb(0x3C5);
+      }
+   }
+
+   /* CHECK STANDARD CRTC FLAG */
+
+   if (flags & GU2_VGA_FLAG_STD_CRTC) {
+      /* SAVE STANDARD CRTC REGISTERS */
+
+      for (i = 0; i < GU2_STD_CRTC_REGS; i++) {
+	 gfx_outb(crtcindex, (unsigned char)i);
+	 vga->stdCRTCregs[i] = gfx_inb(crtcdata);
+      }
+   }
+
+   /* CHECK GDC */
+
+   if (flags & GU2_VGA_FLAG_GDC) {
+      /* SAVE STANDARD CRTC REGISTERS */
+
+      for (i = 0; i < GU2_GDC_REGS; i++) {
+	 gfx_outb(0x3CE, (unsigned char)i);
+	 GDCregs[i] = gfx_inb(0x3CF);
+      }
+   }
+
+   /* CHECK EXTENDED CRTC FLAG */
+
+   if (flags & GU2_VGA_FLAG_EXT_CRTC) {
+      /* SAVE EXTENDED CRTC REGISTERS */
+
+      for (i = 0; i < GU2_EXT_CRTC_REGS; i++) {
+	 gfx_outb(crtcindex, (unsigned char)(0x40 + i));
+	 vga->extCRTCregs[i] = gfx_inb(crtcdata);
+      }
+   }
+
+   if (flags & GU2_VGA_FLAG_PALETTE) {
+      /* SAVE PALETTE DATA */
+
+      for (i = 0; i < 0x100; i++) {
+	 gfx_outb(0x3C7, i);
+	 palette[i] = gfx_inb(0x3C9);
+      }
+   }
+
+   if (flags & GU2_VGA_FLAG_ATTR) {
+      /* SAVE Attribute  DATA */
+
+      for (i = 0; i < 21; i++) {
+	 gfx_inb(0x3DA);
+	 gfx_outb(0x3C0, i);
+	 ATTRregs[i] = gfx_inb(0x3C1);
+      }
+   }
+   /* save the VGA data */
+   gu2_vga_font_data(0);
+   return (0);
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_vga_clear_extended
+ *
+ * This routine clears the extended SoftVGA register values to have SoftVGA
+ * behave like standard VGA. 
+ *-----------------------------------------------------------------------------
+ */
+void
+gu2_vga_clear_extended(void)
+{
+   int i;
+   unsigned short crtcindex, crtcdata;
+
+   crtcindex = (gfx_inb(0x3CC) & 0x01) ? 0x3D4 : 0x3B4;
+   crtcdata = crtcindex + 1;
+
+   gfx_outb(crtcindex, 0x30);
+   gfx_outb(crtcdata, 0x57);
+   gfx_outb(crtcdata, 0x4C);
+   for (i = 0x41; i <= 0x4F; i++) {
+      gfx_outb(crtcindex, (unsigned char)i);
+      gfx_outb(crtcdata, 0);
+   }
+   gfx_outb(crtcindex, 0x30);
+   gfx_outb(crtcdata, 0x00);
+}
+
+void
+gu2_vga_extcrtc(char offset, int reset)
+{
+   unsigned short crtcindex, crtcdata;
+
+   crtcindex = (gfx_inb(0x3CC) & 0x01) ? 0x3D4 : 0x3B4;
+   crtcdata = crtcindex + 1;
+
+   /* UNLOCK EXTENDED CRTC REGISTERS */
+
+   gfx_outb(crtcindex, 0x30);
+   gfx_outb(crtcdata, 0x57);
+   gfx_outb(crtcdata, 0x4C);
+
+   /* RESTORE EXTENDED CRTC REGISTERS */
+
+   gfx_outb(crtcindex, offset);
+   gfx_outb(crtcdata, reset);
+
+#if 0
+   /* LOCK EXTENDED CRTC REGISTERS */
+
+   gfx_outb(crtcindex, 0x30);
+   gfx_outb(crtcdata, 0x00);
+#endif
+}
+
+/*-----------------------------------------------------------------------------
+ * gfx_vga_restore
+ *
+ * This routine restores the state of the VGA registers from the specified
+ * structure.  Flags indicate what portions of the register state need to 
+ * be saved.
+ *-----------------------------------------------------------------------------
+ */
+int
+gu2_vga_restore(gfx_vga_struct * vga, int flags)
+{
+   int i;
+   unsigned short crtcindex, crtcdata;
+
+   crtcindex = (gfx_inb(0x3CC) & 0x01) ? 0x3D4 : 0x3B4;
+   crtcdata = crtcindex + 1;
+
+   /* CHECK MISCELLANEOUS OUTPUT FLAG */
+
+   if (flags & GU2_VGA_FLAG_MISC_OUTPUT) {
+      /* RESTORE MISCELLANEOUS OUTPUT REGISTER VALUE */
+
+      gfx_outb(0x3C2, vga->miscOutput);
+   }
+
+   /* CHECK SEQ */
+
+   if (flags & GU2_VGA_FLAG_SEQ) {
+      /* RESTORE STANDARD CRTC REGISTERS */
+
+      for (i = 1; i < GU2_SEQ_REGS; i++) {
+	 gfx_outb(0x3C4, (unsigned char)i);
+	 gfx_outb(0x3C5, SEQregs[i]);
+      }
+   }
+
+   /* CHECK STANDARD CRTC FLAG */
+
+   if (flags & GU2_VGA_FLAG_STD_CRTC) {
+      /* UNLOCK STANDARD CRTC REGISTERS */
+
+      gfx_outb(crtcindex, 0x11);
+      gfx_outb(crtcdata, 0);
+
+      /* RESTORE STANDARD CRTC REGISTERS */
+
+      for (i = 0; i < GU2_STD_CRTC_REGS; i++) {
+	 gfx_outb(crtcindex, (unsigned char)i);
+	 gfx_outb(crtcdata, vga->stdCRTCregs[i]);
+      }
+   }
+
+   /* CHECK GDC */
+
+   if (flags & GU2_VGA_FLAG_GDC) {
+      /* SAVE STANDARD CRTC REGISTERS */
+
+      for (i = 0; i < GU2_GDC_REGS; i++) {
+	 gfx_outb(0x3CE, (unsigned char)i);
+	 gfx_outb(0x3CF, GDCregs[i]);
+      }
+   }
+
+   /* CHECK EXTENDED CRTC FLAG */
+
+   if (flags & GU2_VGA_FLAG_EXT_CRTC) {
+      /* UNLOCK EXTENDED CRTC REGISTERS */
+
+      gfx_outb(crtcindex, 0x30);
+      gfx_outb(crtcdata, 0x57);
+      gfx_outb(crtcdata, 0x4C);
+
+      /* RESTORE EXTENDED CRTC REGISTERS */
+
+      for (i = 1; i < GU2_EXT_CRTC_REGS; i++) {
+	 gfx_outb(crtcindex, (unsigned char)(0x40 + i));
+	 gfx_outb(crtcdata, vga->extCRTCregs[i]);
+      }
+
+      /* LOCK EXTENDED CRTC REGISTERS */
+
+      gfx_outb(crtcindex, 0x30);
+      gfx_outb(crtcdata, 0x00);
+
+      /* CHECK IF DIRECT FRAME BUFFER MODE (VESA MODE) */
+
+      if (vga->extCRTCregs[0x03] & 1) {
+	 /* SET BORDER COLOR TO BLACK */
+	 /* This really should be another thing saved/restored, but */
+	 /* Durango currently doesn't do the attr controller registers. */
+
+	 gfx_inb(0x3BA);		/* Reset flip-flop */
+	 gfx_inb(0x3DA);
+	 gfx_outb(0x3C0, 0x11);
+	 gfx_outb(0x3C0, 0x00);
+      }
+   }
+
+   if (flags & GU2_VGA_FLAG_PALETTE) {
+      /* RESTORE PALETTE DATA */
+
+      for (i = 0; i < 0x100; i++) {
+	 gfx_outb(0x3C8, i);
+	 gfx_outb(0x3C9, palette[i]);
+      }
+   }
+
+   if (flags & GU2_VGA_FLAG_ATTR) {
+      /* RESTORE Attribute  DATA */
+
+      for (i = 0; i < 21; i++) {
+	 gfx_inb(0x3DA);
+	 gfx_outb(0x3C0, i);
+	 gfx_outb(0x3C0, ATTRregs[i]);
+      }
+      /* SAVE Attribute  DATA */
+
+      for (i = 0; i < 21; i++) {
+	 gfx_inb(0x3DA);
+	 gfx_outb(0x3C0, i);
+      }
+   }
+
+   /* restore the VGA data */
+   gu2_vga_font_data(1);
+
+   return (0);
+}
+
+/* END OF FILE */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_gx2_video.c b/xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_gx2_video.c
new file mode 100644
index 000000000..b34454cf2
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_gx2_video.c
@@ -0,0 +1,1570 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_gx2_video.c,v 1.5 2003/02/21 16:51:09 alanh Exp $ */
+/*
+ * $Workfile: nsc_gx2_video.c $
+ * $Revision: 1.2.2.1 $
+ * $Author: ldelgass $
+ *
+ * File Contents: This file consists of main Xfree video supported routines.
+ *
+ * Project:       Geode Xfree Frame buffer device driver.
+ *
+ */
+
+/* 
+ * NSC_LIC_ALTERNATIVE_PREAMBLE
+ *
+ * Revision 1.0
+ *
+ * National Semiconductor Alternative GPL-BSD License
+ *
+ * National Semiconductor Corporation licenses this software 
+ * ("Software"):
+ *
+ * National Xfree frame buffer driver
+ *
+ * under one of the two following licenses, depending on how the 
+ * Software is received by the Licensee.
+ * 
+ * If this Software is received as part of the Linux Framebuffer or
+ * other GPL licensed software, then the GPL license designated 
+ * NSC_LIC_GPL applies to this Software; in all other circumstances 
+ * then the BSD-style license designated NSC_LIC_BSD shall apply.
+ *
+ * END_NSC_LIC_ALTERNATIVE_PREAMBLE */
+
+/* NSC_LIC_BSD
+ *
+ * National Semiconductor Corporation Open Source License for 
+ *
+ * National Xfree frame buffer driver
+ *
+ * (BSD License with Export Notice)
+ *
+ * Copyright (c) 1999-2001
+ * National Semiconductor Corporation.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met: 
+ *
+ *   * Redistributions of source code must retain the above copyright 
+ *     notice, this list of conditions and the following disclaimer. 
+ *
+ *   * Redistributions in binary form must reproduce the above 
+ *     copyright notice, this list of conditions and the following 
+ *     disclaimer in the documentation and/or other materials provided 
+ *     with the distribution. 
+ *
+ *   * Neither the name of the National Semiconductor Corporation nor 
+ *     the names of its contributors may be used to endorse or promote 
+ *     products derived from this software without specific prior 
+ *     written permission. 
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+ * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE,
+ * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE.
+ *
+ * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
+ * YOUR JURISDICTION. It is licensee's responsibility to comply with 
+ * any export regulations applicable in licensee's jurisdiction. Under 
+ * CURRENT (2001) U.S. export regulations this software 
+ * is eligible for export from the U.S. and can be downloaded by or 
+ * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
+ * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
+ * Syria, Sudan, Afghanistan and any other country to which the U.S. 
+ * has embargoed goods and services. 
+ *
+ * END_NSC_LIC_BSD */
+
+/* NSC_LIC_GPL
+ *
+ * National Semiconductor Corporation Gnu General Public License for 
+ *
+ * National Xfree frame buffer driver
+ *
+ * (GPL License with Export Notice)
+ *
+ * Copyright (c) 1999-2001
+ * National Semiconductor Corporation.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted under the terms of the GNU General 
+ * Public License as published by the Free Software Foundation; either 
+ * version 2 of the License, or (at your option) any later version  
+ *
+ * In addition to the terms of the GNU General Public License, neither 
+ * the name of the National Semiconductor Corporation nor the names of 
+ * its contributors may be used to endorse or promote products derived 
+ * from this software without specific prior written permission. 
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+ * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, 
+ * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE. See the GNU General Public License for more details. 
+ *
+ * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
+ * YOUR JURISDICTION. It is licensee's responsibility to comply with 
+ * any export regulations applicable in licensee's jurisdiction. Under 
+ * CURRENT (2001) U.S. export regulations this software 
+ * is eligible for export from the U.S. and can be downloaded by or 
+ * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
+ * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
+ * Syria, Sudan, Afghanistan and any other country to which the U.S. 
+ * has embargoed goods and services. 
+ *
+ * You should have received a copy of the GNU General Public License 
+ * along with this file; if not, write to the Free Software Foundation, 
+ * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 
+ *
+ * END_NSC_LIC_GPL */
+
+/* 
+ * Fixes & Extensions to support Y800 greyscale modes 
+ * Alan Hourihane <alanh@fairlite.demon.co.uk>
+ */
+
+#include "xf86.h"
+#include "xf86_OSproc.h"
+#include "xf86Resources.h"
+#include "xf86_ansic.h"
+#include "compiler.h"
+#include "xf86PciInfo.h"
+#include "xf86Pci.h"
+#include "xf86fbman.h"
+#include "regionstr.h"
+
+#include "nsc.h"
+#include "Xv.h"
+#include "xaa.h"
+#include "xaalocal.h"
+#include "dixstruct.h"
+#include "fourcc.h"
+#include "nsc_fourcc.h"
+
+#define OFF_DELAY 	200		/* milliseconds */
+#define FREE_DELAY 	60000
+
+#define OFF_TIMER 	0x01
+#define FREE_TIMER	0x02
+#define CLIENT_VIDEO_ON	0x04
+
+#define TIMER_MASK      (OFF_TIMER | FREE_TIMER)
+#define XV_PROFILE 0
+#define REINIT  1
+#ifndef XvExtension
+void
+GX2InitVideo(ScreenPtr pScreen)
+{
+}
+
+void
+GX2ResetVideo(ScrnInfoPtr pScrn)
+{
+}
+#else
+
+#define DBUF 1
+void GX2InitVideo(ScreenPtr pScreen);
+void GX2ResetVideo(ScrnInfoPtr pScrn);
+static XF86VideoAdaptorPtr GX2SetupImageVideo(ScreenPtr);
+static void GX2InitOffscreenImages(ScreenPtr);
+static void GX2StopVideo(ScrnInfoPtr, pointer, Bool);
+static int GX2SetPortAttribute(ScrnInfoPtr, Atom, INT32, pointer);
+static int GX2GetPortAttribute(ScrnInfoPtr, Atom, INT32 *, pointer);
+static void GX2QueryBestSize(ScrnInfoPtr, Bool,
+			     short, short, short, short, unsigned int *,
+			     unsigned int *, pointer);
+static int GX2PutImage(ScrnInfoPtr, short, short, short, short, short, short,
+		       short, short, int, unsigned char *, short, short, Bool,
+		       RegionPtr, pointer);
+static int GX2QueryImageAttributes(ScrnInfoPtr, int, unsigned short *,
+				   unsigned short *, int *, int *);
+
+static void GX2BlockHandler(int, pointer, pointer, pointer);
+void GX2SetVideoPosition(int x, int y, int width, int height,
+			 short src_w, short src_h, short drw_w,
+			 short drw_h, int id, int offset, ScrnInfoPtr pScrn);
+
+extern void GX2AccelSync(ScrnInfoPtr pScreenInfo);
+
+#if !defined(STB_X)
+extern int DeltaX, DeltaY;
+#else
+int DeltaX, DeltaY;
+#endif
+
+#define MAKE_ATOM(a) MakeAtom(a, sizeof(a) - 1, TRUE)
+
+static Atom xvColorKey, xvColorKeyMode, xvFilter
+#if DBUF
+  , xvDoubleBuffer
+#endif
+  ;
+
+/*----------------------------------------------------------------------------
+ * GX2InitVideo
+ *
+ * Description	:This is the initialization routine.It creates a new video adapter
+ *				 and calls GX2SetupImageVideo to initialize the adaptor by filling
+ *				 XF86VideoAdaptorREc.Then it lists the existing adaptors and adds the 
+ *				 new one to it. Finally the list of XF86VideoAdaptorPtr pointers are
+ *				 passed to the xf86XVScreenInit().
+ *
+ * Parameters.
+ * ScreenPtr
+ *		pScreen	:Screen handler pointer having screen information.
+ *
+ * Returns		:none
+ *
+ * Comments		:none
+ *
+*----------------------------------------------------------------------------
+*/
+void
+GX2InitVideo(ScreenPtr pScreen)
+{
+   GeodePtr pGeode;
+   ScrnInfoPtr pScreenInfo = xf86Screens[pScreen->myNum];
+
+   pGeode = GEODEPTR(pScreenInfo);
+
+   if (!pGeode->NoAccel) {
+      ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
+      XF86VideoAdaptorPtr *adaptors, *newAdaptors = NULL;
+      XF86VideoAdaptorPtr newAdaptor = NULL;
+
+      int num_adaptors;
+
+      newAdaptor = GX2SetupImageVideo(pScreen);
+      GX2InitOffscreenImages(pScreen);
+
+      num_adaptors = xf86XVListGenericAdaptors(pScrn, &adaptors);
+
+      if (newAdaptor) {
+	 if (!num_adaptors) {
+	    num_adaptors = 1;
+	    adaptors = &newAdaptor;
+	 } else {
+	    newAdaptors =		/* need to free this someplace */
+		  xalloc((num_adaptors + 1) * sizeof(XF86VideoAdaptorPtr *));
+	    if (newAdaptors) {
+	       memcpy(newAdaptors, adaptors, num_adaptors *
+		      sizeof(XF86VideoAdaptorPtr));
+	       newAdaptors[num_adaptors] = newAdaptor;
+	       adaptors = newAdaptors;
+	       num_adaptors++;
+	    }
+	 }
+      }
+
+      if (num_adaptors)
+	 xf86XVScreenInit(pScreen, adaptors, num_adaptors);
+
+      if (newAdaptors)
+	 xfree(newAdaptors);
+   }
+}
+
+/* client libraries expect an encoding */
+static XF86VideoEncodingRec DummyEncoding[1] = {
+   {
+    0,
+    "XV_IMAGE",
+    1024, 1024,
+    {1, 1}
+    }
+};
+
+#define NUM_FORMATS 4
+
+static XF86VideoFormatRec Formats[NUM_FORMATS] = {
+   {8, PseudoColor}, {15, TrueColor}, {16, TrueColor}, {24, TrueColor}
+};
+
+#if DBUF
+#define NUM_ATTRIBUTES 4
+#else
+#define NUM_ATTRIBUTES 3
+#endif
+
+static XF86AttributeRec Attributes[NUM_ATTRIBUTES] = {
+#if DBUF
+   {XvSettable | XvGettable, 0, 1, "XV_DOUBLE_BUFFER"},
+#endif
+   {XvSettable | XvGettable, 0, (1 << 24) - 1, "XV_COLORKEY"},
+   {XvSettable | XvGettable, 0, 1, "XV_FILTER"},
+   {XvSettable | XvGettable, 0, 1, "XV_COLORKEYMODE"}
+};
+
+#define NUM_IMAGES 7
+
+static XF86ImageRec Images[NUM_IMAGES] = {
+   XVIMAGE_UYVY,
+   XVIMAGE_YUY2,
+   XVIMAGE_Y2YU,
+   XVIMAGE_YVYU,
+   XVIMAGE_Y800,
+   XVIMAGE_I420,
+   XVIMAGE_YV12
+};
+
+typedef struct
+{
+   FBAreaPtr area;
+   FBLinearPtr linear;
+   RegionRec clip;
+   CARD32 colorKey;
+   CARD32 colorKeyMode;
+   CARD32 filter;
+   CARD32 videoStatus;
+   Time offTime;
+   Time freeTime;
+#if DBUF
+   Bool doubleBuffer;
+   int currentBuffer;
+#endif
+}
+GeodePortPrivRec, *GeodePortPrivPtr;
+
+#define GET_PORT_PRIVATE(pScrn) \
+   (GeodePortPrivPtr)((GEODEPTR(pScrn))->adaptor->pPortPrivates[0].ptr)
+
+/*----------------------------------------------------------------------------
+ * GX2SetColorKey
+ *
+ * Description	:This function reads the color key for the pallete and
+ *				  sets the video color key register.
+ *
+ * Parameters.
+ * ScreenInfoPtr
+ *		pScrn	:Screen  pointer having screen information.
+ *		pPriv	:Video port private data
+ *
+ * Returns		:none
+ *
+ * Comments		:none
+ *
+*----------------------------------------------------------------------------
+*/
+static INT32
+GX2SetColorkey(ScrnInfoPtr pScrn, GeodePortPrivPtr pPriv)
+{
+   int red, green, blue;
+   unsigned long key;
+
+   switch (pScrn->depth) {
+   case 8:
+      GFX(get_display_palette_entry(pPriv->colorKey & 0xFF, &key));
+      red = ((key >> 16) & 0xFF);
+      green = ((key >> 8) & 0xFF);
+      blue = (key & 0xFF);
+      break;
+   case 16:
+      red = (pPriv->colorKey & pScrn->mask.red) >>
+	    pScrn->offset.red << (8 - pScrn->weight.red);
+      green = (pPriv->colorKey & pScrn->mask.green) >>
+	    pScrn->offset.green << (8 - pScrn->weight.green);
+      blue = (pPriv->colorKey & pScrn->mask.blue) >>
+	    pScrn->offset.blue << (8 - pScrn->weight.blue);
+      break;
+   default:
+      /* for > 16 bpp we send in the mask in xf86SetWeight. This
+       * function is providing the offset by 1 more. So we take 
+       * this as a special case and subtract 1 for > 16
+       */
+      red = (pPriv->colorKey & pScrn->mask.red) >>
+	    (pScrn->offset.red - 1) << (8 - pScrn->weight.red);
+      green = (pPriv->colorKey & pScrn->mask.green) >>
+	    (pScrn->offset.green - 1) << (8 - pScrn->weight.green);
+      blue = (pPriv->colorKey & pScrn->mask.blue) >>
+	    (pScrn->offset.blue - 1) << (8 - pScrn->weight.blue);
+      break;
+   }
+
+   GFX(set_video_color_key((blue | (green << 8) | (red << 16)), 0xFFFFFF,
+			   (pPriv->colorKeyMode == 0)));
+   REGION_EMPTY(pScrn->pScreen, &pPriv->clip);
+   return 0;
+}
+
+/*----------------------------------------------------------------------------
+ * GX2ResetVideo
+ *
+ * Description	: This function resets the video
+ *
+ * Parameters.
+ * ScreenInfoPtr
+ *		pScrn	:Screen  pointer having screen information.
+ *
+ * Returns		:None
+ *
+ * Comments		:none
+ *
+*----------------------------------------------------------------------------
+*/
+
+void
+GX2ResetVideo(ScrnInfoPtr pScrn)
+{
+   GeodePtr pGeode = GEODEPTR(pScrn);
+
+   if (!pGeode->NoAccel) {
+      GeodePortPrivPtr pPriv = pGeode->adaptor->pPortPrivates[0].ptr;
+
+      GX2AccelSync(pScrn);
+      GFX(set_video_palette(NULL));
+      GX2SetColorkey(pScrn, pPriv);
+      GFX(set_video_filter(pPriv->filter, pPriv->filter));
+   }
+}
+
+/*----------------------------------------------------------------------------
+ * GX2SetupImageVideo
+ *
+ * Description	: This function allocates space for a Videoadaptor and initializes
+ *				  the XF86VideoAdaptorPtr record.
+ *
+ * Parameters.
+ * ScreenPtr
+ *		pScreen	:Screen handler pointer having screen information.
+ *
+ * Returns		:XF86VideoAdaptorPtr :- pointer to the initialized video adaptor record.
+ *
+ * Comments		:none
+ *
+*----------------------------------------------------------------------------
+*/
+
+static XF86VideoAdaptorPtr
+GX2SetupImageVideo(ScreenPtr pScreen)
+{
+   ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
+   GeodePtr pGeode = GEODEPTR(pScrn);
+   XF86VideoAdaptorPtr adapt;
+   GeodePortPrivPtr pPriv;
+
+   if (!(adapt = xcalloc(1, sizeof(XF86VideoAdaptorRec) +
+			 sizeof(GeodePortPrivRec) + sizeof(DevUnion))))
+      return NULL;
+
+   adapt->type = XvWindowMask | XvInputMask | XvImageMask;
+   adapt->flags = VIDEO_OVERLAID_IMAGES | VIDEO_CLIP_TO_VIEWPORT;
+   adapt->name = "National Semiconductor Corporation";
+   adapt->nEncodings = 1;
+   adapt->pEncodings = DummyEncoding;
+   adapt->nFormats = NUM_FORMATS;
+   adapt->pFormats = Formats;
+   adapt->nPorts = 1;
+   adapt->pPortPrivates = (DevUnion *) (&adapt[1]);
+   pPriv = (GeodePortPrivPtr) (&adapt->pPortPrivates[1]);
+   adapt->pPortPrivates[0].ptr = (pointer) (pPriv);
+   adapt->pAttributes = Attributes;
+   adapt->nImages = NUM_IMAGES;
+   adapt->nAttributes = NUM_ATTRIBUTES;
+   adapt->pImages = Images;
+   adapt->PutVideo = NULL;
+   adapt->PutStill = NULL;
+   adapt->GetVideo = NULL;
+   adapt->GetStill = NULL;
+   adapt->StopVideo = GX2StopVideo;
+   adapt->SetPortAttribute = GX2SetPortAttribute;
+   adapt->GetPortAttribute = GX2GetPortAttribute;
+   adapt->QueryBestSize = GX2QueryBestSize;
+   adapt->PutImage = GX2PutImage;
+   adapt->QueryImageAttributes = GX2QueryImageAttributes;
+
+   pPriv->colorKey = pGeode->videoKey;
+   pPriv->colorKeyMode = 0;
+   pPriv->filter = 0;
+   pPriv->videoStatus = 0;
+#if DBUF
+   pPriv->doubleBuffer = TRUE;
+   pPriv->currentBuffer = 0;		/* init to first buffer */
+#endif
+
+   /* gotta uninit this someplace */
+   REGION_INIT(pScreen, &pPriv->clip, NullBox, 0);
+
+   pGeode->adaptor = adapt;
+
+   pGeode->BlockHandler = pScreen->BlockHandler;
+   pScreen->BlockHandler = GX2BlockHandler;
+
+   xvColorKey = MAKE_ATOM("XV_COLORKEY");
+   xvColorKeyMode = MAKE_ATOM("XV_COLORKEYMODE");
+   xvFilter = MAKE_ATOM("XV_FILTER");
+#if DBUF
+   xvDoubleBuffer = MAKE_ATOM("XV_DOUBLE_BUFFER");
+#endif
+
+   GX2ResetVideo(pScrn);
+
+   return adapt;
+}
+
+#if REINIT
+static Bool
+RegionsEqual(RegionPtr A, RegionPtr B)
+{
+   int *dataA, *dataB;
+   int num;
+
+   num = REGION_NUM_RECTS(A);
+   if (num != REGION_NUM_RECTS(B))
+      return FALSE;
+
+   if ((A->extents.x1 != B->extents.x1) ||
+       (A->extents.x2 != B->extents.x2) ||
+       (A->extents.y1 != B->extents.y1) || (A->extents.y2 != B->extents.y2))
+      return FALSE;
+
+   dataA = (int *)REGION_RECTS(A);
+   dataB = (int *)REGION_RECTS(B);
+
+   while (num--) {
+      if ((dataA[0] != dataB[0]) || (dataA[1] != dataB[1]))
+	 return FALSE;
+      dataA += 2;
+      dataB += 2;
+   }
+
+   return TRUE;
+}
+#endif
+
+/*----------------------------------------------------------------------------
+ * GX2StopVideo
+ *
+ * Description	:This function is used to stop input and output video
+ *
+ * Parameters.
+ * pScreenInfo
+ *		pScrn		:Screen handler pointer having screen information.
+ *		data		:Pointer to the video port's private data
+ *		exit		:Flag indicating whether the offscreen areas used for video
+ *					 to be deallocated or not.
+ * Returns		:none
+ *
+ * Comments		:none
+ *
+*----------------------------------------------------------------------------
+*/
+static void
+GX2StopVideo(ScrnInfoPtr pScrn, pointer data, Bool exit)
+{
+   GeodePortPrivPtr pPriv = (GeodePortPrivPtr) data;
+   GeodePtr pGeode = GEODEPTR(pScrn);
+
+   REGION_EMPTY(pScrn->pScreen, &pPriv->clip);
+
+   GX2AccelSync(pScrn);
+   if (exit) {
+      if (pPriv->videoStatus & CLIENT_VIDEO_ON) {
+	 GFX(set_video_enable(0));
+      }
+      if (pPriv->area) {
+	 xf86FreeOffscreenArea(pPriv->area);
+	 pPriv->area = NULL;
+      }
+      pPriv->videoStatus = 0;
+      pGeode->OverlayON = FALSE;
+   } else {
+      if (pPriv->videoStatus & CLIENT_VIDEO_ON) {
+	 pPriv->videoStatus |= OFF_TIMER;
+	 pPriv->offTime = currentTime.milliseconds + OFF_DELAY;
+      }
+   }
+}
+
+/*----------------------------------------------------------------------------
+ * GX2SetPortAttribute
+ *
+ * Description	:This function is used to set the attributes of a port like colorkeymode,
+ *				  double buffer support and filter.
+ *
+ * Parameters.
+ * pScreenInfo
+ *		Ptr			:Screen handler pointer having screen information.
+ *		data		:Pointer to the video port's private data
+ *		attribute	:The port attribute to be set
+ *		value		:Value of the attribute to be set.  
+ *					 
+ * Returns		:Sucess if the attribute is supported, else BadMatch
+ *
+ * Comments		:none
+ *
+*----------------------------------------------------------------------------
+*/
+static int
+GX2SetPortAttribute(ScrnInfoPtr pScrn,
+		    Atom attribute, INT32 value, pointer data)
+{
+   GeodePortPrivPtr pPriv = (GeodePortPrivPtr) data;
+
+   GX2AccelSync(pScrn);
+   if (attribute == xvColorKey) {
+      pPriv->colorKey = value;
+      GX2SetColorkey(pScrn, pPriv);
+   }
+#if DBUF
+   else if (attribute == xvDoubleBuffer) {
+      if ((value < 0) || (value > 1))
+	 return BadValue;
+      pPriv->doubleBuffer = value;
+   }
+#endif
+   else if (attribute == xvColorKeyMode) {
+      pPriv->colorKeyMode = value;
+      GX2SetColorkey(pScrn, pPriv);
+   } else if (attribute == xvFilter) {
+      pPriv->filter = value;
+      GFX(set_video_filter(pPriv->filter, pPriv->filter));
+   } else
+      return BadMatch;
+
+   return Success;
+}
+
+/*----------------------------------------------------------------------------
+ * GX2GetPortAttribute
+ *
+ * Description	:This function is used to get the attributes of a port like hue,
+ *				 saturation,brightness or contrast.
+ *
+ * Parameters.
+ * pScreenInfo
+ *		Ptr			:Screen handler pointer having screen information.
+ *		data		:Pointer to the video port's private data
+ *		attribute	:The port attribute to be read
+ *		value		:Pointer to the value of the attribute to be read.  
+ *					 
+ * Returns		:Sucess if the attribute is supported, else BadMatch
+ *
+ * Comments		:none
+ *
+*----------------------------------------------------------------------------
+*/
+static int
+GX2GetPortAttribute(ScrnInfoPtr pScrn,
+		    Atom attribute, INT32 * value, pointer data)
+{
+   GeodePortPrivPtr pPriv = (GeodePortPrivPtr) data;
+
+   if (attribute == xvColorKey) {
+      *value = pPriv->colorKey;
+   }
+#if DBUF
+   else if (attribute == xvDoubleBuffer) {
+      *value = (pPriv->doubleBuffer) ? 1 : 0;
+   }
+#endif
+   else if (attribute == xvColorKeyMode) {
+      *value = pPriv->colorKeyMode;
+   } else if (attribute == xvFilter) {
+      *value = pPriv->filter;
+   } else
+      return BadMatch;
+
+   return Success;
+}
+
+/*----------------------------------------------------------------------------
+ * GX2QueryBestSize
+ *
+ * Description	:This function provides a way to query what the destination dimensions
+ *				 would end up being if they were to request that an area vid_w by vid_h
+ *               from the video stream be scaled to rectangle of drw_w by drw_h on 
+ *				 the screen.
+ *
+ * Parameters.
+ * ScreenInfoPtr
+ *		pScrn		:Screen handler pointer having screen information.
+ *		data		:Pointer to the video port's private data
+ *      vid_w,vid_h	:Width and height of the video data.
+ *		drw_w,drw_h :Width and height of the scaled rectangle.
+ *		p_w,p_h		:Width and height of the destination rectangle. 
+ *					 
+ * Returns		:None
+ *
+ * Comments		:None
+ *
+*----------------------------------------------------------------------------
+*/
+static void
+GX2QueryBestSize(ScrnInfoPtr pScrn,
+		 Bool motion,
+		 short vid_w, short vid_h,
+		 short drw_w, short drw_h,
+		 unsigned int *p_w, unsigned int *p_h, pointer data)
+{
+   *p_w = drw_w;
+   *p_h = drw_h;
+
+   if (*p_w > 16384)
+      *p_w = 16384;
+}
+
+static void
+GX2CopyGreyscale(unsigned char *src,
+		 unsigned char *dst, int srcPitch, int dstPitch, int h, int w)
+{
+   int i;
+   unsigned char *src2 = src;
+   unsigned char *dst2 = dst;
+   unsigned char *dst3;
+   unsigned char *src3;
+
+   dstPitch <<= 1;
+
+   while (h--) {
+      dst3 = dst2;
+      src3 = src2;
+      for (i = 0; i < w; i++) {
+	 *dst3++ = *src3++;		/* Copy Y data */
+	 *dst3++ = 0x80;		/* Fill UV with 0x80 - greyscale */
+      }
+      src3 = src2;
+      for (i = 0; i < w; i++) {
+	 *dst3++ = *src3++;		/* Copy Y data */
+	 *dst3++ = 0x80;		/* Fill UV with 0x80 - greyscale */
+      }
+      dst2 += dstPitch;
+      src2 += srcPitch;
+   }
+}
+
+/*----------------------------------------------------------------------------
+ * GX2CopyData420
+ *
+ * Description	: Copies data from src to destination
+ *
+ * Parameters.
+ *		src			: pointer to the source data
+ *		dst			: pointer to destination data
+ *		srcPitch	: pitch of the srcdata
+ *		dstPitch	: pitch of the destination data 
+ *		h & w		: height and width of source data
+ *					 
+ * Returns		:None
+ *
+ * Comments		:None
+ *
+*----------------------------------------------------------------------------
+*/
+
+static void
+GX2CopyData420(unsigned char *src, unsigned char *dst,
+	       int srcPitch, int dstPitch, int h, int w)
+{
+   while (h--) {
+      memcpy(dst, src, w);
+      src += srcPitch;
+      dst += dstPitch;
+   }
+}
+
+/*----------------------------------------------------------------------------
+ * GX2CopyData422
+ *
+ * Description	: Copies data from src to destination
+ *
+ * Parameters.
+ *		src			: pointer to the source data
+ *		dst			: pointer to destination data
+ *		srcPitch	: pitch of the srcdata
+ *		dstPitch	: pitch of the destination data 
+ *		h & w		: height and width of source data
+ *					 
+ * Returns		:None
+ *
+ * Comments		:None
+ *
+*----------------------------------------------------------------------------
+*/
+
+static void
+GX2CopyData422(unsigned char *src, unsigned char *dst,
+	       int srcPitch, int dstPitch, int h, int w)
+{
+   w <<= 1;
+   while (h--) {
+      memcpy(dst, src, w);
+      src += srcPitch;
+      dst += dstPitch;
+   }
+}
+
+static FBAreaPtr
+GX2AllocateMemory(ScrnInfoPtr pScrn, FBAreaPtr area, int numlines)
+{
+   ScreenPtr pScreen = screenInfo.screens[pScrn->scrnIndex];
+   FBAreaPtr new_area;
+
+   if (area) {
+      if ((area->box.y2 - area->box.y1) >= numlines)
+	 return area;
+
+      if (xf86ResizeOffscreenArea(area, pScrn->displayWidth, numlines))
+	 return area;
+
+      xf86FreeOffscreenArea(area);
+   }
+
+   new_area = xf86AllocateOffscreenArea(pScreen, pScrn->displayWidth,
+					numlines, 0, NULL, NULL, NULL);
+
+   if (!new_area) {
+      int max_w, max_h;
+
+      xf86QueryLargestOffscreenArea(pScreen, &max_w, &max_h, 0,
+				    FAVOR_WIDTH_THEN_AREA, PRIORITY_EXTREME);
+
+      if ((max_w < pScrn->displayWidth) || (max_h < numlines))
+	 return NULL;
+
+      xf86PurgeUnlockedOffscreenAreas(pScreen);
+      new_area = xf86AllocateOffscreenArea(pScreen, pScrn->displayWidth,
+					   numlines, 0, NULL, NULL, NULL);
+   }
+
+   return new_area;
+}
+
+static BoxRec dstBox;
+static int srcPitch = 0, srcPitch2 = 0, dstPitch = 0, dstPitch2 = 0;
+static INT32 Bx1, Bx2, By1, By2;
+static int top, left, npixels, nlines;
+static int offset, s1offset = 0, s2offset = 0, s3offset = 0;
+static unsigned char *dst_start;
+static int d2offset = 0, d3offset = 0;
+static Bool
+RegionsIntersect(BoxPtr pRcl1, BoxPtr pRcl2, BoxPtr pRclResult)
+{
+   pRclResult->x1 = max(pRcl1->x1, pRcl2->x1);
+   pRclResult->x2 = min(pRcl1->x2, pRcl2->x2);
+
+   if (pRclResult->x1 <= pRclResult->x2) {
+      pRclResult->y1 = max(pRcl1->y1, pRcl2->y1);
+      pRclResult->y2 = min(pRcl1->y2, pRcl2->y2);
+
+      if (pRclResult->y1 <= pRclResult->y2) {
+	 return (TRUE);
+      }
+   }
+
+   return (FALSE);
+}
+
+void
+GX2SetVideoPosition(int x, int y, int width, int height,
+		    short src_w, short src_h, short drw_w, short drw_h,
+		    int id, int offset, ScrnInfoPtr pScrn)
+{
+   GeodePtr pGeode = GEODEPTR(pScrn);
+   long xstart, ystart, xend, yend;
+   unsigned long lines = 0;
+   unsigned long y_extra, uv_extra = 0;
+   BoxRec ovly, display, result;
+
+#if defined(STB_X)
+   unsigned long startAddress = 0;
+#endif
+
+   xend = x + drw_w;
+   yend = y + drw_h;
+
+   /* Take care of panning when panel is present */
+
+#if defined(STB_X)
+   Gal_get_display_offset(&startAddress);
+   DeltaY = startAddress / pGeode->Pitch;
+   DeltaX = startAddress & (pGeode->Pitch - 1);
+   DeltaX /= (pScrn->bitsPerPixel >> 3);
+#endif
+
+   if (pGeode->Panel) {
+      ovly.x1 = x;
+      ovly.x2 = x + pGeode->video_dstw;
+      ovly.y1 = y;
+      ovly.y2 = y + pGeode->video_dsth;
+
+      display.x1 = DeltaX;
+      display.x2 = DeltaX + pGeode->FPBX;
+      display.y1 = DeltaY;
+      display.y2 = DeltaY + pGeode->FPBY;
+      x = xend = 0;
+      if (RegionsIntersect(&display, &ovly, &result)) {
+	 x = ovly.x1 - DeltaX;
+	 xend = ovly.x2 - DeltaX;
+	 y = ovly.y1 - DeltaY;
+	 yend = ovly.y2 - DeltaY;
+      }
+   }
+
+   /*  LEFT CLIPPING */
+
+   if (x < 0) {
+      xstart = 0;
+   } else {
+      xstart = (unsigned long)x;
+   }
+   drw_w -= (xstart - x);
+
+   /*  TOP CLIPPING */
+
+   if (y < 0) {
+      lines = (-y) * src_h / drw_h;
+      ystart = 0;
+      drw_h += y;
+      y_extra = lines * dstPitch;
+      uv_extra = (lines >> 1) * (dstPitch2);
+   } else {
+      ystart = y;
+      lines = 0;
+      y_extra = 0;
+   }
+   GFX(set_video_window(xstart, ystart, xend - xstart, yend - ystart));
+   if ((id == FOURCC_Y800) || (id == FOURCC_I420) || (id == FOURCC_YV12)) {
+      GFX(set_video_yuv_offsets(offset + y_extra,
+				offset + d3offset + uv_extra,
+				offset + d2offset + uv_extra));
+   } else {
+      GFX(set_video_offset(offset + y_extra));
+   }
+   GFX(set_video_left_crop(xstart - x));
+}
+
+/*----------------------------------------------------------------------------
+ * GX2DisplayVideo
+ *
+ * Description		: This function sets up the video registers for playing video
+ *					  It sets up the video format,width, height & position of the 
+ *					  video window ,video offsets( y,u,v) and video pitches(y,u,v)	
+ * Parameters.
+ *					 
+ * Returns		:None
+ *
+ * Comments		:None
+ *
+*----------------------------------------------------------------------------
+*/
+
+static void
+GX2DisplayVideo(ScrnInfoPtr pScrn,
+		int id,
+		int offset,
+		short width, short height,
+		int pitch,
+		int x1, int y1, int x2, int y2,
+		BoxPtr dstBox,
+		short src_w, short src_h, short drw_w, short drw_h)
+{
+   GeodePtr pGeode = GEODEPTR(pScrn);
+
+   GX2AccelSync(pScrn);
+
+   GFX(set_video_enable(1));
+
+   switch (id) {
+   case FOURCC_UYVY:			/* UYVY */
+      GFX(set_video_format(VIDEO_FORMAT_UYVY));
+      GFX(set_video_size(width, height));
+      break;
+   case FOURCC_Y800:			/* Y800 - greyscale - we munge it! */
+   case FOURCC_YV12:			/* YV12 */
+   case FOURCC_I420:			/* I420 */
+      GFX(set_video_format(VIDEO_FORMAT_Y0Y1Y2Y3));
+      GFX(set_video_size(width, height));
+      GFX(set_video_yuv_pitch(dstPitch, dstPitch2));
+      break;
+   case FOURCC_YUY2:			/* YUY2 */
+      GFX(set_video_format(VIDEO_FORMAT_YUYV));
+      GFX(set_video_size(width, height));
+      break;
+   case FOURCC_Y2YU:			/* Y2YU */
+      GFX(set_video_format(VIDEO_FORMAT_Y2YU));
+      GFX(set_video_size(width, height));
+      break;
+   case FOURCC_YVYU:			/* YVYU */
+      GFX(set_video_format(VIDEO_FORMAT_YVYU));
+      GFX(set_video_size(width, height));
+      break;
+   }
+   if (pGeode->Panel) {
+      pGeode->video_x = dstBox->x1;
+      pGeode->video_y = dstBox->y1;
+      pGeode->video_w = width;
+      pGeode->video_h = height;
+      pGeode->video_srcw = src_w;
+      pGeode->video_srch = src_h;
+      pGeode->video_dstw = drw_w;
+      pGeode->video_dsth = drw_h;
+      pGeode->video_offset = offset;
+      pGeode->video_id = id;
+      pGeode->video_scrnptr = pScrn;
+   }
+   GFX(set_video_scale(width, height, drw_w, drw_h));
+   GX2SetVideoPosition(dstBox->x1, dstBox->y1, width, height, src_w,
+		       src_h, drw_w, drw_h, id, offset, pScrn);
+
+}
+
+/*----------------------------------------------------------------------------
+ * GX2PutImage	: This function writes a single frame of video into a drawable.
+ *		The position and size of the source rectangle is specified by src_x,src_y,
+ *		src_w and src_h. This data is stored in a system memory buffer at buf.  
+ *		The position and size of the destination rectangle is specified by drw_x,
+ *      drw_y,drw_w,drw_h.The data is in the format indicated by the image descriptor 
+ *		and represents a source of size width by height.  If sync is TRUE the driver 
+ *		should not return from this function until it is through reading the data from 
+ *		buf.  Returning when sync is TRUE indicates that it is safe for the data at buf
+ *		to be replaced,freed, or modified.
+ *
+ *
+ * Description		: 
+ * Parameters.
+ *					 
+ * Returns		:None
+ *
+ * Comments		:None
+ *
+*----------------------------------------------------------------------------
+*/
+
+static int
+GX2PutImage(ScrnInfoPtr pScrn,
+	    short src_x, short src_y,
+	    short drw_x, short drw_y,
+	    short src_w, short src_h,
+	    short drw_w, short drw_h,
+	    int id, unsigned char *buf,
+	    short width, short height,
+	    Bool sync, RegionPtr clipBoxes, pointer data)
+{
+   GeodePortPrivPtr pPriv = (GeodePortPrivPtr) data;
+   GeodePtr pGeode = GEODEPTR(pScrn);
+   int new_h;
+
+#if REINIT
+   BOOL ReInitVideo = FALSE;
+#endif
+
+#if XV_PROFILE
+   long oldtime, newtime;
+
+   UpdateCurrentTime();
+   oldtime = currentTime.milliseconds;
+#endif
+
+#if REINIT
+/* update cliplist */
+   if (!RegionsEqual(&pPriv->clip, clipBoxes)) {
+      ReInitVideo = TRUE;
+   }
+   if (ReInitVideo) {
+      DEBUGMSG(1, (0, X_NONE, "Regional Not Equal - Init\n"));
+#endif
+
+      if (drw_w > 16384)
+	 drw_w = 16384;
+
+      /* Clip */
+      Bx1 = src_x;
+      Bx2 = src_x + src_w;
+      By1 = src_y;
+      By2 = src_y + src_h;
+
+      if ((Bx1 >= Bx2) || (By1 >= By2))
+	 return Success;
+
+      dstBox.x1 = drw_x;
+      dstBox.x2 = drw_x + drw_w;
+      dstBox.y1 = drw_y;
+      dstBox.y2 = drw_y + drw_h;
+
+      dstBox.x1 -= pScrn->frameX0;
+      dstBox.x2 -= pScrn->frameX0;
+      dstBox.y1 -= pScrn->frameY0;
+      dstBox.y2 -= pScrn->frameY0;
+
+      switch (id) {
+      case FOURCC_YV12:
+      case FOURCC_I420:
+
+	 srcPitch = (width + 3) & ~3;	/* of luma */
+	 dstPitch = (width + 31) & ~31;
+
+	 s2offset = srcPitch * height;
+	 d2offset = dstPitch * height;
+
+	 srcPitch2 = ((width >> 1) + 3) & ~3;
+	 dstPitch2 = ((width >> 1) + 15) & ~15;
+
+	 s3offset = (srcPitch2 * (height >> 1)) + s2offset;
+	 d3offset = (dstPitch2 * (height >> 1)) + d2offset;
+
+	 new_h = dstPitch * height;	/* Y */
+	 new_h += (dstPitch2 * height);	/* U+V */
+	 new_h += pGeode->Pitch - 1;
+	 new_h /= pGeode->Pitch;
+	 break;
+
+      case FOURCC_UYVY:
+      case FOURCC_YUY2:
+      case FOURCC_Y800:
+      default:
+	 dstPitch = ((width << 1) + 3) & ~3;
+	 srcPitch = (width << 1);
+	 new_h = ((dstPitch * height) + pGeode->Pitch - 1) / pGeode->Pitch;
+	 break;
+      }
+
+#if DBUF
+      if (pPriv->doubleBuffer)
+	 new_h <<= 1;
+#endif
+
+      if (!(pPriv->area = GX2AllocateMemory(pScrn, pPriv->area, new_h)))
+	 return BadAlloc;
+
+      /* copy data */
+      top = By1;
+      left = Bx1 & ~1;
+      npixels = ((Bx2 + 1) & ~1) - left;
+
+      switch (id) {
+      case FOURCC_YV12:
+      case FOURCC_I420:
+	 {
+	    int tmp;
+
+	    top &= ~1;
+	    offset = (pPriv->area->box.y1 * pGeode->Pitch) + (top * dstPitch);
+
+#if DBUF
+	    if (pPriv->doubleBuffer && pPriv->currentBuffer)
+	       offset += (new_h >> 1) * pGeode->Pitch;
+#endif
+
+	    dst_start = pGeode->FBBase + offset + left;
+	    tmp = ((top >> 1) * srcPitch2) + (left >> 1);
+	    s2offset += tmp;
+	    s3offset += tmp;
+	    if (id == FOURCC_I420) {
+	       tmp = s2offset;
+	       s2offset = s3offset;
+	       s3offset = tmp;
+	    }
+	    nlines = ((By2 + 1) & ~1) - top;
+	 }
+	 break;
+      case FOURCC_UYVY:
+      case FOURCC_YUY2:
+      case FOURCC_Y800:
+      default:
+	 left <<= 1;
+	 buf += (top * srcPitch) + left;
+	 nlines = By2 - top;
+	 offset = (pPriv->area->box.y1 * pGeode->Pitch) + (top * dstPitch);
+#if DBUF
+	 if (pPriv->doubleBuffer && pPriv->currentBuffer)
+	    offset += (new_h >> 1) * pGeode->Pitch;
+#endif
+
+	 dst_start = pGeode->FBBase + offset + left;
+	 break;
+      }
+      s1offset = (top * srcPitch) + left;
+
+#if REINIT
+      /* update cliplist */
+      REGION_COPY(pScreen, &pPriv->clip, clipBoxes);
+      if (pPriv->colorKeyMode == 0) {
+	 /* draw these */
+	 XAAFillSolidRects(pScrn, pPriv->colorKey, GXcopy, ~0,
+			   REGION_NUM_RECTS(clipBoxes),
+			   REGION_RECTS(clipBoxes));
+      }
+      GX2DisplayVideo(pScrn, id, offset, width, height, dstPitch,
+		      Bx1, By1, Bx2, By2, &dstBox, src_w, src_h, drw_w,
+		      drw_h);
+   }
+#endif
+
+   switch (id) {
+
+   case FOURCC_Y800:
+      GX2CopyGreyscale(buf, dst_start, srcPitch, dstPitch, nlines, npixels);
+      break;
+   case FOURCC_YV12:
+   case FOURCC_I420:
+      GX2CopyData420(buf + s1offset, dst_start, srcPitch, dstPitch, nlines,
+		     npixels);
+      GX2CopyData420(buf + s2offset, dst_start + d2offset, srcPitch2,
+		     dstPitch2, nlines >> 1, npixels >> 1);
+      GX2CopyData420(buf + s3offset, dst_start + d3offset, srcPitch2,
+		     dstPitch2, nlines >> 1, npixels >> 1);
+      break;
+   case FOURCC_UYVY:
+   case FOURCC_YUY2:
+   default:
+      GX2CopyData422(buf, dst_start, srcPitch, dstPitch, nlines, npixels);
+      break;
+   }
+#if !REINIT
+   /* update cliplist */
+   REGION_COPY(pScreen, &pPriv->clip, clipBoxes);
+   if (pPriv->colorKeyMode == 0) {
+      /* draw these */
+      XAAFillSolidRects(pScrn, pPriv->colorKey, GXcopy, ~0,
+			REGION_NUM_RECTS(clipBoxes), REGION_RECTS(clipBoxes));
+   }
+   GX2DisplayVideo(pScrn, id, offset, width, height, dstPitch,
+		   Bx1, By1, Bx2, By2, &dstBox, src_w, src_h, drw_w, drw_h);
+#endif
+
+#if XV_PROFILE
+   UpdateCurrentTime();
+   newtime = currentTime.milliseconds;
+   DEBUGMSG(1, (0, X_NONE, "PI %d\n", newtime - oldtime));
+#endif
+
+#if DBUF
+   pPriv->currentBuffer ^= 1;
+#endif
+
+   pPriv->videoStatus = CLIENT_VIDEO_ON;
+   pGeode->OverlayON = TRUE;
+   return Success;
+}
+
+/*----------------------------------------------------------------------------
+ * GX2QueryImageAttributes
+ *
+ * Description	:This function is called to let the driver specify how data
+ *				 for a particular image of size width by height should be 
+ *				 stored. 		
+ *
+ * Parameters.
+ * pScreenInfo
+ *		Ptr			:Screen handler pointer having screen information.
+ *		id			:Id for the video format
+ *		width		:width  of the image (can be modified by the driver)  
+ *		height		:height of the image (can be modified by the driver)  
+ * Returns		: Size of the memory required for storing this image
+ *
+ * Comments		:None
+ *
+*----------------------------------------------------------------------------
+*/
+static int
+GX2QueryImageAttributes(ScrnInfoPtr pScrn,
+			int id,
+			unsigned short *w, unsigned short *h,
+			int *pitches, int *offsets)
+{
+   int size;
+   int tmp;
+
+   DEBUGMSG(0, (0, X_NONE, "QueryImageAttributes %X\n", id));
+
+   if (*w > 1024)
+      *w = 1024;
+   if (*h > 1024)
+      *h = 1024;
+
+   *w = (*w + 1) & ~1;
+   if (offsets)
+      offsets[0] = 0;
+
+   switch (id) {
+   case FOURCC_YV12:
+   case FOURCC_I420:
+      *h = (*h + 1) & ~1;
+      size = (*w + 3) & ~3;
+      if (pitches)
+	 pitches[0] = size;
+      size *= *h;
+      if (offsets)
+	 offsets[1] = size;
+      tmp = ((*w >> 1) + 3) & ~3;
+      if (pitches)
+	 pitches[1] = pitches[2] = tmp;
+      tmp *= (*h >> 1);
+      size += tmp;
+      if (offsets)
+	 offsets[2] = size;
+      size += tmp;
+      break;
+   case FOURCC_UYVY:
+   case FOURCC_YUY2:
+   case FOURCC_Y800:
+   default:
+      size = *w << 1;
+      if (pitches)
+	 pitches[0] = size;
+      size *= *h;
+      break;
+   }
+   return size;
+}
+
+static void
+GX2BlockHandler(int i, pointer blockData, pointer pTimeout, pointer pReadmask)
+{
+   ScreenPtr pScreen = screenInfo.screens[i];
+   ScrnInfoPtr pScrn = xf86Screens[i];
+   GeodePtr pGeode = GEODEPTR(pScrn);
+   GeodePortPrivPtr pPriv = GET_PORT_PRIVATE(pScrn);
+
+   pScreen->BlockHandler = pGeode->BlockHandler;
+   (*pScreen->BlockHandler) (i, blockData, pTimeout, pReadmask);
+   pScreen->BlockHandler = GX2BlockHandler;
+
+   GX2AccelSync(pScrn);
+   if (pPriv->videoStatus & TIMER_MASK) {
+      UpdateCurrentTime();
+      if (pPriv->videoStatus & OFF_TIMER) {
+	 if (pPriv->offTime < currentTime.milliseconds) {
+	    GFX(set_video_enable(0));
+	    pPriv->videoStatus = FREE_TIMER;
+	    pPriv->freeTime = currentTime.milliseconds + FREE_DELAY;
+	 }
+      } else {				/* FREE_TIMER */
+	 if (pPriv->freeTime < currentTime.milliseconds) {
+	    if (pPriv->area) {
+	       xf86FreeOffscreenArea(pPriv->area);
+	       pPriv->area = NULL;
+	    }
+	    pPriv->videoStatus = 0;
+	 }
+      }
+   }
+}
+
+/****************** Offscreen stuff ***************/
+
+typedef struct
+{
+   FBAreaPtr area;
+   FBLinearPtr linear;
+   Bool isOn;
+}
+OffscreenPrivRec, *OffscreenPrivPtr;
+
+/*----------------------------------------------------------------------------
+ * GX2AllocateSurface
+ *
+ * Description	:This function allocates an area of w by h in the offscreen
+ * Parameters.
+ * ScreenPtr
+ *		pScreen	:Screen handler pointer having screen information.
+ * 
+ * Returns		:None
+ *
+ * Comments		:None
+ *
+*----------------------------------------------------------------------------
+*/
+
+static int
+GX2AllocateSurface(ScrnInfoPtr pScrn,
+		   int id,
+		   unsigned short w, unsigned short h, XF86SurfacePtr surface)
+{
+   FBAreaPtr area;
+   int pitch, fbpitch, numlines;
+   OffscreenPrivPtr pPriv;
+
+   if ((w > 1024) || (h > 1024))
+      return BadAlloc;
+
+   w = (w + 1) & ~1;
+   pitch = ((w << 1) + 15) & ~15;
+   fbpitch = pScrn->bitsPerPixel * pScrn->displayWidth >> 3;
+   numlines = ((pitch * h) + fbpitch - 1) / fbpitch;
+
+   if (!(area = GX2AllocateMemory(pScrn, NULL, numlines)))
+      return BadAlloc;
+
+   surface->width = w;
+   surface->height = h;
+
+   if (!(surface->pitches = xalloc(sizeof(int))))
+      return BadAlloc;
+   if (!(surface->offsets = xalloc(sizeof(int)))) {
+      xfree(surface->pitches);
+      return BadAlloc;
+   }
+   if (!(pPriv = xalloc(sizeof(OffscreenPrivRec)))) {
+      xfree(surface->pitches);
+      xfree(surface->offsets);
+      return BadAlloc;
+   }
+
+   pPriv->area = area;
+   pPriv->isOn = FALSE;
+
+   surface->pScrn = pScrn;
+   surface->id = id;
+   surface->pitches[0] = pitch;
+   surface->offsets[0] = area->box.y1 * fbpitch;
+   surface->devPrivate.ptr = (pointer) pPriv;
+
+   return Success;
+}
+
+static int
+GX2StopSurface(XF86SurfacePtr surface)
+{
+   OffscreenPrivPtr pPriv = (OffscreenPrivPtr) surface->devPrivate.ptr;
+
+   if (pPriv->isOn) {
+      pPriv->isOn = FALSE;
+   }
+
+   return Success;
+}
+
+static int
+GX2FreeSurface(XF86SurfacePtr surface)
+{
+   OffscreenPrivPtr pPriv = (OffscreenPrivPtr) surface->devPrivate.ptr;
+
+   if (pPriv->isOn)
+      GX2StopSurface(surface);
+   xf86FreeOffscreenArea(pPriv->area);
+   xfree(surface->pitches);
+   xfree(surface->offsets);
+   xfree(surface->devPrivate.ptr);
+
+   return Success;
+}
+
+static int
+GX2GetSurfaceAttribute(ScrnInfoPtr pScrn, Atom attribute, INT32 * value)
+{
+   return GX2GetPortAttribute(pScrn, attribute, value,
+			      (pointer) (GET_PORT_PRIVATE(pScrn)));
+}
+
+static int
+GX2SetSurfaceAttribute(ScrnInfoPtr pScrn, Atom attribute, INT32 value)
+{
+   return GX2SetPortAttribute(pScrn, attribute, value,
+			      (pointer) (GET_PORT_PRIVATE(pScrn)));
+}
+
+static int
+GX2DisplaySurface(XF86SurfacePtr surface,
+		  short src_x, short src_y,
+		  short drw_x, short drw_y,
+		  short src_w, short src_h,
+		  short drw_w, short drw_h, RegionPtr clipBoxes)
+{
+   OffscreenPrivPtr pPriv = (OffscreenPrivPtr) surface->devPrivate.ptr;
+   ScrnInfoPtr pScrn = surface->pScrn;
+   GeodePortPrivPtr portPriv = GET_PORT_PRIVATE(pScrn);
+   INT32 x1, y1, x2, y2;
+   BoxRec dstBox;
+
+   DEBUGMSG(0, (0, X_NONE, "DisplaySuface\n"));
+   x1 = src_x;
+   x2 = src_x + src_w;
+   y1 = src_y;
+   y2 = src_y + src_h;
+
+   dstBox.x1 = drw_x;
+   dstBox.x2 = drw_x + drw_w;
+   dstBox.y1 = drw_y;
+   dstBox.y2 = drw_y + drw_h;
+
+   if ((x1 >= x2) || (y1 >= y2))
+      return Success;
+
+   dstBox.x1 -= pScrn->frameX0;
+   dstBox.x2 -= pScrn->frameX0;
+   dstBox.y1 -= pScrn->frameY0;
+   dstBox.y2 -= pScrn->frameY0;
+
+   xf86XVFillKeyHelper(pScrn->pScreen, portPriv->colorKey, clipBoxes);
+
+   GX2DisplayVideo(pScrn, surface->id, surface->offsets[0],
+		   surface->width, surface->height, surface->pitches[0],
+		   x1, y1, x2, y2, &dstBox, src_w, src_h, drw_w, drw_h);
+
+   pPriv->isOn = TRUE;
+   if (portPriv->videoStatus & CLIENT_VIDEO_ON) {
+      REGION_EMPTY(pScrn->pScreen, &portPriv->clip);
+      UpdateCurrentTime();
+      portPriv->videoStatus = FREE_TIMER;
+      portPriv->freeTime = currentTime.milliseconds + FREE_DELAY;
+   }
+
+   return Success;
+}
+
+/*----------------------------------------------------------------------------
+ * GX2InitOffscreenImages
+ *
+ * Description	:This function sets up the offscreen memory management.It fills 
+ *				 in the XF86OffscreenImagePtr structure with functions to handle
+ *				 offscreen memory operations. 	
+ *
+ * Parameters.
+ * ScreenPtr
+ *		pScreen	:Screen handler pointer having screen information.
+ * 
+ * Returns		: None
+ *
+ * Comments		:None
+ *
+*----------------------------------------------------------------------------
+*/
+static void
+GX2InitOffscreenImages(ScreenPtr pScreen)
+{
+   XF86OffscreenImagePtr offscreenImages;
+
+   /* need to free this someplace */
+   if (!(offscreenImages = xalloc(sizeof(XF86OffscreenImageRec))))
+      return;
+
+   offscreenImages[0].image = &Images[0];
+   offscreenImages[0].flags = VIDEO_OVERLAID_IMAGES | VIDEO_CLIP_TO_VIEWPORT;
+   offscreenImages[0].alloc_surface = GX2AllocateSurface;
+   offscreenImages[0].free_surface = GX2FreeSurface;
+   offscreenImages[0].display = GX2DisplaySurface;
+   offscreenImages[0].stop = GX2StopSurface;
+   offscreenImages[0].setAttribute = GX2SetSurfaceAttribute;
+   offscreenImages[0].getAttribute = GX2GetSurfaceAttribute;
+   offscreenImages[0].max_width = 1024;
+   offscreenImages[0].max_height = 1024;
+   offscreenImages[0].num_attributes = NUM_ATTRIBUTES;
+   offscreenImages[0].attributes = Attributes;
+
+   xf86XVRegisterOffscreenImages(pScreen, offscreenImages, 1);
+}
+
+#endif /* !XvExtension */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_msr_asm.S b/xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_msr_asm.S
new file mode 100644
index 000000000..c0c4a3cc9
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_msr_asm.S
@@ -0,0 +1,229 @@
+/*
+# $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_msr_asm.S,v 1.1 2002/12/12 22:13:34 dawes Exp $
+##########################################################################
+# NSC_LIC_ALTERNATIVE_PREAMBLE
+#
+# Revision 1.0
+#
+# National Semiconductor Alternative GPL-BSD License
+#
+# National Semiconductor Corporation licenses this software 
+# ("Software"):
+#
+# Geode Xfree frame buffer driver
+#
+# under one of the two following licenses, depending on how the 
+# Software is received by the Licensee.
+# 
+# If this Software is received as part of the Linux Framebuffer or
+# other GPL licensed software, then the GPL license designated 
+# NSC_LIC_GPL applies to this Software; in all other circumstances 
+# then the BSD-style license designated NSC_LIC_BSD shall apply.
+#
+# END_NSC_LIC_ALTERNATIVE_PREAMBLE 
+##########################################################################
+# NSC_LIC_BSD
+#
+# National Semiconductor Corporation Open Source License for 
+#
+# Geode Xfree frame buffer driver
+#
+# (BSD License with Export Notice)
+#
+# Copyright (c) 1999-2001
+# National Semiconductor Corporation.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without 
+# modification, are permitted provided that the following conditions 
+# are met: 
+#
+#   * Redistributions of source code must retain the above copyright 
+#     notice, this list of conditions and the following disclaimer. 
+#
+#   * Redistributions in binary form must reproduce the above 
+#     copyright notice, this list of conditions and the following 
+#     disclaimer in the documentation and/or other materials provided 
+#     with the distribution. 
+#
+#   * Neither the name of the National Semiconductor Corporation nor 
+#     the names of its contributors may be used to endorse or promote 
+#     products derived from this software without specific prior 
+#     written permission. 
+# 
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+# NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
+# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+# GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
+# IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE,
+# INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
+# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+# OF SUCH DAMAGE.
+#
+# EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
+# YOUR JURISDICTION. It is licensee's responsibility to comply with 
+# any export regulations applicable in licensee's jurisdiction. Under 
+# CURRENT (2001) U.S. export regulations this software 
+# is eligible for export from the U.S. and can be downloaded by or 
+# otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
+# destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
+# Syria, Sudan, Afghanistan and any other country to which the U.S. 
+# has embargoed goods and services. 
+#
+# END_NSC_LIC_BSD 
+##########################################################################
+# NSC_LIC_GPL
+#
+# National Semiconductor Corporation Gnu General Public License for 
+#
+# Geode Xfree frame buffer driver
+#
+# (GPL License with Export Notice)
+#
+# Copyright (c) 1999-2001
+# National Semiconductor Corporation.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without 
+# modification, are permitted under the terms of the GNU General 
+# Public License as published by the Free Software Foundation; either 
+# version 2 of the License, or (at your option) any later version  
+#
+# In addition to the terms of the GNU General Public License, neither 
+# the name of the National Semiconductor Corporation nor the names of 
+# its contributors may be used to endorse or promote products derived 
+# from this software without specific prior written permission. 
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+# NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
+# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+# GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
+# IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, 
+# INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
+# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+# OF SUCH DAMAGE. See the GNU General Public License for more details. 
+#
+# EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
+# YOUR JURISDICTION. It is licensee's responsibility to comply with 
+# any export regulations applicable in licensee's jurisdiction. Under 
+# CURRENT (2001) U.S. export regulations this software 
+# is eligible for export from the U.S. and can be downloaded by or 
+# otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
+# destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
+# Syria, Sudan, Afghanistan and any other country to which the U.S. 
+# has embargoed goods and services. 
+#
+# You should have received a copy of the GNU General Public License 
+# along with this file; if not, write to the Free Software Foundation, 
+# Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 
+#
+# END_NSC_LIC_GPL 
+*/
+
+#include "assyntax.h"
+
+	FILE("nsc_msr_asm.s")
+
+	AS_BEGIN
+
+	SEG_TEXT
+
+	ALIGNTEXT4
+
+	GLOBL	GLNAME(nsc_asm_msr_vsa_rd)
+
+GLNAME(nsc_asm_msr_vsa_rd):
+	
+	PUSH_L	(EBP)
+	MOV_L	(ESP,EBP)
+
+	PUSH_L	(EAX)
+	PUSH_L	(EBX)
+	PUSH_L	(ECX)
+	PUSH_L	(EDX)
+	
+	MOV_L	(REGOFF(8,EBP),ECX)
+
+	/* unlock */
+	MOV_W	(CONST(0x0ac1c),DX)
+	MOV_W	(CONST(0x0fc53),AX)
+	OUT_W
+
+	MOV_W	(CONST(0x0ac1c),DX)
+	MOV_W	(CONST(0x0007),AX)
+	OUT_W
+
+	MOV_W	(CONST(0x0ac1e),DX)
+	IN_W
+
+	MOV_L	(REGOFF(12,EBP),EBX)
+	MOV_L	(EDX,REGIND(EBX))
+	MOV_L	(REGOFF(16,EBP),EBX)
+	MOV_L	(EAX,REGIND(EBX))
+
+	POP_L	(EDX)
+	POP_L	(ECX)
+	POP_L	(EBX)
+	POP_L	(EAX)
+
+	LEAVE
+	RET
+
+/*###################################*/
+
+
+	ALIGNTEXT4
+
+	GLOBL	GLNAME(nsc_asm_msr_vsa_wr)
+
+GLNAME(nsc_asm_msr_vsa_wr):
+
+	PUSH_L	(EBP)
+	MOV_L	(ESP,EBP)
+
+	PUSH_L	(EAX)
+	PUSH_L	(EBX)
+	PUSH_L	(ECX)
+	PUSH_L	(EDX)
+	PUSH_L	(EDI)
+	PUSH_L	(ESI)
+
+	MOV_L	(REGOFF(8,EBP),ECX)
+
+	/* unlock */
+	MOV_W	(CONST(0x0ac1c),DX)
+	MOV_L	(CONST(0x0fc530007),EAX)
+	OUT_L
+	
+	MOV_L	(REGOFF(12,EBP),EBX)
+	MOV_L	(REGOFF(16,EBP),EAX)
+
+	XOR_L	(ESI,ESI)
+	XOR_L	(EDI,EDI)
+
+	MOV_W	(CONST(0x0ac1e),DX)
+
+	OUT_W
+
+	POP_L	(ESI)
+	POP_L	(EDI)
+	POP_L	(EDX)
+	POP_L	(ECX)
+	POP_L	(EBX)
+	POP_L	(EAX)
+
+	LEAVE
+	RET
+
+/*###################################*/
+
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/regacc.c b/xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_regacc.c
index 2bfb7e8b2..b1d3a50f6 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/regacc.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_regacc.c
@@ -1,6 +1,8 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/regacc.c,v 1.1 2002/10/11 14:32:59 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_regacc.c,v 1.2 2003/01/14 09:34:32 alanh Exp $ */
 /*
- * $Workfile: regacc.c $
+ * $Workfile: nsc_regacc.c $
+ * $Revision: 1.2.2.1 $
+ * $Author: ldelgass $
  *
  * This is the main file used to add Durango graphics support to a software 
  * project.  The main reason to have a single file include the other files
@@ -13,7 +15,9 @@
  * once when a software project starts, and then maintained as necessary.  
  * It should not be recopied with new versions of Durango unless the 
  * developer is willing to tune the file again for the specific project.
- *
+ */
+
+/* 
  * NSC_LIC_ALTERNATIVE_PREAMBLE
  *
  * Revision 1.0
@@ -138,26 +142,44 @@
  *
  * END_NSC_LIC_GPL */
 
+void gfx_write_reg8(unsigned long offset, unsigned char value);
+void gfx_write_reg16(unsigned long offset, unsigned short value);
+void gfx_write_reg32(unsigned long offset, unsigned long value);
+unsigned short gfx_read_reg16(unsigned long offset);
+unsigned long gfx_read_reg32(unsigned long offset);
+void gfx_write_vid32(unsigned long offset, unsigned long value);
+unsigned long gfx_read_vid32(unsigned long offset);
+unsigned long gfx_read_vip32(unsigned long offset);
+void gfx_write_vip32(unsigned long offset, unsigned long value);
+void gfx_mono_bitmap_to_screen_blt_swp(unsigned short srcx,
+				       unsigned short srcy,
+				       unsigned short dstx,
+				       unsigned short dsty,
+				       unsigned short width,
+				       unsigned short height,
+				       unsigned char *data, short pitch);
+unsigned int GetVideoMemSize(void);
+
 /* ROUTINES added accessing hardware reg */
 void
-gfx_write_reg_8(unsigned long offset, unsigned char value)
+gfx_write_reg8(unsigned long offset, unsigned char value)
 {
    WRITE_REG8(offset, value);
 }
 
 void
-gfx_write_reg_16(unsigned long offset, unsigned short value)
+gfx_write_reg16(unsigned long offset, unsigned short value)
 {
    WRITE_REG16(offset, value);
 }
 
 void
-gfx_write_reg_32(unsigned long offset, unsigned long value)
+gfx_write_reg32(unsigned long offset, unsigned long value)
 {
    WRITE_REG32(offset, value);
 }
 unsigned short
-gfx_read_reg_16(unsigned long offset)
+gfx_read_reg16(unsigned long offset)
 {
    unsigned short value;
 
@@ -165,7 +187,7 @@ gfx_read_reg_16(unsigned long offset)
    return value;
 }
 unsigned long
-gfx_read_reg_32(unsigned long offset)
+gfx_read_reg32(unsigned long offset)
 {
    unsigned long value;
 
@@ -174,12 +196,12 @@ gfx_read_reg_32(unsigned long offset)
 }
 
 void
-gfx_write_vid_32(unsigned long offset, unsigned long value)
+gfx_write_vid32(unsigned long offset, unsigned long value)
 {
    WRITE_VID32(offset, value);
 }
 unsigned long
-gfx_read_vid_32(unsigned long offset)
+gfx_read_vid32(unsigned long offset)
 {
    unsigned long value;
 
@@ -189,7 +211,7 @@ gfx_read_vid_32(unsigned long offset)
 
 /*Addition for the VIP code */
 unsigned long
-gfx_read_vip_32(unsigned long offset)
+gfx_read_vip32(unsigned long offset)
 {
    unsigned long value;
 
@@ -198,13 +220,111 @@ gfx_read_vip_32(unsigned long offset)
 }
 
 void
-gfx_write_vip_32(unsigned long offset, unsigned long value)
+gfx_write_vip32(unsigned long offset, unsigned long value)
 {
    WRITE_VIP32(offset, value);
 }
 
+#define SWAP_BITS_IN_BYTES(v) \
+ (((0x01010101 & (v)) << 7) | ((0x02020202 & (v)) << 5) | \
+  ((0x04040404 & (v)) << 3) | ((0x08080808 & (v)) << 1) | \
+  ((0x10101010 & (v)) >> 1) | ((0x20202020 & (v)) >> 3) | \
+  ((0x40404040 & (v)) >> 5) | ((0x80808080 & (v)) >> 7))
+
+#define WRITE_GPREG_STRING32_SWP(regoffset, dwords, counter, array, array_offset, temp) \
+{                                                                                       \
+	temp = (unsigned long)array + (array_offset);                                       \
+	for (counter = 0; counter < dwords; counter++)                                      \
+		WRITE_GP32 (regoffset, SWAP_BITS_IN_BYTES(*((unsigned long *)temp + counter))); \
+}
+
+void
+gfx_mono_bitmap_to_screen_blt_swp(unsigned short srcx, unsigned short srcy,
+				  unsigned short dstx, unsigned short dsty,
+				  unsigned short width, unsigned short height,
+				  unsigned char *data, short pitch)
+{
+   unsigned long dstoffset, size, bytes;
+   unsigned long offset, temp_offset, temp1 = 0, temp2 = 0;
+   unsigned long i, j = 0, fifo_lines, dwords_extra, bytes_extra;
+   unsigned long shift = 0;
+
+   size = (((unsigned long)width) << 16) | height;
+
+   /* CALCULATE STARTING OFFSETS */
+
+   offset = (unsigned long)srcy *pitch + ((unsigned long)srcx >> 3);
+
+   dstoffset = (unsigned long)dsty *gu2_pitch +
+	 (((unsigned long)dstx) << gu2_xshift);
+
+   /* CHECK IF PATTERN ORIGINS NEED TO BE SET */
+
+   if (GFXpatternFlags) {
+      /* COMBINE X AND Y PATTERN ORIGINS WITH OFFSET */
+
+      dstoffset |= ((unsigned long)(dstx & 7)) << 26;
+      dstoffset |= ((unsigned long)(dsty & 7)) << 29;
+   }
+
+   bytes = ((srcx & 7) + width + 7) >> 3;
+   fifo_lines = bytes >> 5;
+   dwords_extra = (bytes & 0x0000001Cl) >> 2;
+   bytes_extra = bytes & 0x00000003l;
+
+   /* POLL UNTIL ABLE TO WRITE TO THE REGISTERS */
+   /* Put off poll for as long as possible (do most calculations first).   */
+   /* The source offset is always 0 since we allow misaligned dword reads. */
+   /* Need to wait for busy instead of pending, since hardware clears      */
+   /* the host data FIFO at the beginning of a BLT.                        */
+
+   GU2_WAIT_PENDING;
+   WRITE_GP32(MGP_RASTER_MODE, gu2_rop32);
+   WRITE_GP32(MGP_SRC_OFFSET, ((unsigned long)srcx & 7) << 26);
+   WRITE_GP32(MGP_DST_OFFSET, dstoffset);
+   WRITE_GP32(MGP_WID_HEIGHT, size);
+   WRITE_GP32(MGP_STRIDE, gu2_pitch);
+   WRITE_GP16(MGP_BLT_MODE, gu2_blt_mode | MGP_BM_SRC_HOST | MGP_BM_SRC_MONO);
+
+   /* WAIT FOR BLT TO BE LATCHED */
+
+   GU2_WAIT_PENDING;
+
+   /* WRITE ALL OF THE DATA TO THE HOST SOURCE REGISTER */
+
+   while (height--) {
+      temp_offset = offset;
+
+      /* WRITE ALL FULL FIFO LINES */
+
+      for (i = 0; i < fifo_lines; i++) {
+	 GU2_WAIT_HALF_EMPTY;
+	 WRITE_GPREG_STRING32_SWP(MGP_HST_SOURCE, 8, j, data, temp_offset,
+				  temp1);
+	 temp_offset += 32;
+      }
+
+      /* WRITE ALL FULL DWORDS */
+
+      GU2_WAIT_HALF_EMPTY;
+      if (dwords_extra) {
+	 WRITE_GPREG_STRING32_SWP(MGP_HST_SOURCE, dwords_extra, i, data,
+				  temp_offset, temp1);
+	 temp_offset += (dwords_extra << 2);
+      }
+
+      /* WRITE REMAINING BYTES */
+
+      shift = 0;
+      if (bytes_extra)
+	 WRITE_GPREG_STRING8(MGP_HST_SOURCE, bytes_extra, shift, i, data,
+			     temp_offset, temp1, temp2);
+
+      offset += pitch;
+   }
+}
 unsigned int
-GetVideoMemSize()
+GetVideoMemSize(void)
 {
    unsigned int graphicsMemBaseAddr;
    unsigned int totalMem = 0;
@@ -213,10 +333,10 @@ GetVideoMemSize()
 
    /* Read graphics base address. */
 
-   graphicsMemBaseAddr = gfx_read_reg_32(0x8414);
+   graphicsMemBaseAddr = gfx_read_reg32(0x8414);
 
    if (1) {
-      unsigned int mcBankCfg = gfx_read_reg_32(0x8408);
+      unsigned int mcBankCfg = gfx_read_reg32(0x8408);
       unsigned int dimmShift = 4;
 
       graphicsMemMask = 0x7FF;
@@ -258,7 +378,7 @@ GetVideoMemSize()
 	 dimmShift += 16;
       }
    } else {
-      unsigned int mcMemCntrl1 = gfx_read_reg_32(0x8400);
+      unsigned int mcMemCntrl1 = gfx_read_reg32(0x8400);
       unsigned int bankSizeShift = 12;
 
       graphicsMemMask = 0x3FF;
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/panel.c b/xc/programs/Xserver/hw/xfree86/drivers/nsc/panel.c
index 8546e150b..47c9d6052 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/panel.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/panel.c
@@ -1,7 +1,8 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/panel.c,v 1.2 2002/10/18 20:02:39 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/panel.c,v 1.3 2003/01/14 09:34:32 alanh Exp $ */
 /*
  * $Workfile: panel.c $
- * $Revision: 1.1.1.1 $
+ * $Revision: 1.2.2.1 $
+ * $Author: ldelgass $
  *
  * File Contents: This file contailns the panel include files and 
  *                external pointer to the hardware.
@@ -139,38 +140,34 @@
  *
  * END_NSC_LIC_GPL */
 
-#if defined(linux) /* Linux */
-  
+#if defined(linux)			/* Linux */
+
 #ifdef __KERNEL__
 
 #include <linux/string.h>
-#include <asm/io.h> 
+#include <asm/io.h>
 
-#else
+#elif !defined(XFree86Server)
 
 #include <linux/fs.h>
 #include <asm/mman.h>
 
 #endif /* __KERNEL__ */
-#elif defined(_WIN32) /* windows */
+#elif defined(_WIN32)			/* windows */
 
 #include <windows.h>
 
-#endif 
+#endif
 
 #include "panel.h"
-#include "gfx_defs.h" 
-extern unsigned char *gfx_virt_regptr;
-extern unsigned char *gfx_virt_fbptr;
-extern unsigned char *gfx_virt_vidptr;
-extern unsigned char *gfx_virt_vipptr;
-extern unsigned long gfx_detect_video(void);
+#include "gfx_defs.h"
+#include "nsc.h"
 
-#define PLATFORM_DYNAMIC		1   /* runtime selection */
-#define PLATFORM_DRACO			0   /* Draco + 9210 */
-#define PLATFORM_CENTAURUS		1   /* Centaurus + 9211 RevA */
-#define PLATFORM_DORADO			1   /* Dorado + 9211 RevC */
-#define PLATFORM_GX2BASED		0   /* ??? */
+#define PLATFORM_DYNAMIC		1	/* runtime selection */
+#define PLATFORM_DRACO			0	/* Draco + 9210 */
+#define PLATFORM_CENTAURUS		1	/* Centaurus + 9211 RevA */
+#define PLATFORM_DORADO			1	/* Dorado + 9211 RevC */
+#define PLATFORM_GX2BASED		1	/* Redcloud */
 
 unsigned char *XpressROMPtr;
 
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/nsc/panel/92xx.h b/xc/programs/Xserver/hw/xfree86/drivers/nsc/panel/92xx.h
new file mode 100644
index 000000000..fae35f823
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/panel/92xx.h
@@ -0,0 +1,466 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/panel/92xx.h,v 1.1 2002/12/10 15:12:28 alanh Exp $ */
+/*
+ * $Workfile: 92xx.h $
+ * $Revision: 1.2.2.1 $
+ *
+ * File Contents: This header file defines the Durango routines and 
+ *                variables used to access the memory mapped regions.
+ *
+ * SubModule:     Geode FlatPanel library
+ */
+
+/* 
+ * NSC_LIC_ALTERNATIVE_PREAMBLE
+ *
+ * Revision 1.0
+ *
+ * National Semiconductor Alternative GPL-BSD License
+ *
+ * National Semiconductor Corporation licenses this software 
+ * ("Software"):
+ *
+ * Panel Library
+ *
+ * under one of the two following licenses, depending on how the 
+ * Software is received by the Licensee.
+ * 
+ * If this Software is received as part of the Linux Framebuffer or
+ * other GPL licensed software, then the GPL license designated 
+ * NSC_LIC_GPL applies to this Software; in all other circumstances 
+ * then the BSD-style license designated NSC_LIC_BSD shall apply.
+ *
+ * END_NSC_LIC_ALTERNATIVE_PREAMBLE */
+
+/* NSC_LIC_BSD
+ *
+ * National Semiconductor Corporation Open Source License for 
+ *
+ * Panel Library
+ *
+ * (BSD License with Export Notice)
+ *
+ * Copyright (c) 1999-2001
+ * National Semiconductor Corporation.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met: 
+ *
+ *   * Redistributions of source code must retain the above copyright 
+ *     notice, this list of conditions and the following disclaimer. 
+ *
+ *   * Redistributions in binary form must reproduce the above 
+ *     copyright notice, this list of conditions and the following 
+ *     disclaimer in the documentation and/or other materials provided 
+ *     with the distribution. 
+ *
+ *   * Neither the name of the National Semiconductor Corporation nor 
+ *     the names of its contributors may be used to endorse or promote 
+ *     products derived from this software without specific prior 
+ *     written permission. 
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+ * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE,
+ * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE.
+ *
+ * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
+ * YOUR JURISDICTION. It is licensee's responsibility to comply with 
+ * any export regulations applicable in licensee's jurisdiction. Under 
+ * CURRENT (2001) U.S. export regulations this software 
+ * is eligible for export from the U.S. and can be downloaded by or 
+ * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
+ * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
+ * Syria, Sudan, Afghanistan and any other country to which the U.S. 
+ * has embargoed goods and services. 
+ *
+ * END_NSC_LIC_BSD */
+
+/* NSC_LIC_GPL
+ *
+ * National Semiconductor Corporation Gnu General Public License for 
+ *
+ * Panel Library
+ *
+ * (GPL License with Export Notice)
+ *
+ * Copyright (c) 1999-2001
+ * National Semiconductor Corporation.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted under the terms of the GNU General 
+ * Public License as published by the Free Software Foundation; either 
+ * version 2 of the License, or (at your option) any later version  
+ *
+ * In addition to the terms of the GNU General Public License, neither 
+ * the name of the National Semiconductor Corporation nor the names of 
+ * its contributors may be used to endorse or promote products derived 
+ * from this software without specific prior written permission. 
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+ * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, 
+ * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE. See the GNU General Public License for more details. 
+ *
+ * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
+ * YOUR JURISDICTION. It is licensee's responsibility to comply with 
+ * any export regulations applicable in licensee's jurisdiction. Under 
+ * CURRENT (2001) U.S. export regulations this software 
+ * is eligible for export from the U.S. and can be downloaded by or 
+ * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
+ * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
+ * Syria, Sudan, Afghanistan and any other country to which the U.S. 
+ * has embargoed goods and services. 
+ *
+ * You should have received a copy of the GNU General Public License 
+ * along with this file; if not, write to the Free Software Foundation, 
+ * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 
+ *
+ * END_NSC_LIC_GPL */
+
+#ifndef _92XX_h
+#define _92XX_h
+
+typedef unsigned long ULONG;
+typedef unsigned char UCHAR;
+
+#define FALSE	         0
+#define TRUE             1
+#define NUM_92XX_MODES   13
+#define ONE_BYTE         1
+#define TWO_BYTES        2
+#define FOUR_BYTES       4
+
+/* LCD Registers
+ * The LCD memory area is shared by both TV and LCD. 
+ * This offset is for LCD access. 
+ */
+
+#define CS92xx_LCD_OFFSET     0x00000400
+
+/* LCD CONTROL REGISTERS */
+
+#define CS92xx_LCD_PAN_TIMING1	    CS92xx_LCD_OFFSET +	0x00
+
+/* flat panel(FP) timings */
+#define CS92xx_LCD_PAN_TIMING2      CS92xx_LCD_OFFSET +	0x04
+
+/* FP panel timings */
+#define CS92xx_LCD_PWR_MAN          CS92xx_LCD_OFFSET +	0x08
+
+/* FP power management */
+#define CS92xx_LCD_DITH_FR_CNTRL    CS92xx_LCD_OFFSET +	0x0C
+
+/* FP dither and frame rate 
+ * these defines are in revisions prior to C 
+ */
+#define CS92xx_LCD_BLOCK_SEL1       CS92xx_LCD_OFFSET +	0x10
+
+/* FRM register */
+#define CS92xx_LCD_BLOCK_SEL2       CS92xx_LCD_OFFSET +	0x14
+
+/* FRM register */
+#define CS92xx_LCD_DISPER1          CS92xx_LCD_OFFSET +	0x18
+
+/* FRM register */
+#define CS92xx_LCD_DISPER2          CS92xx_LCD_OFFSET +	0x1C
+
+/* FRM register 
+ * these defines are revision C 
+ */
+#define CS92xx_BLUE_LSFR_SEED       CS92xx_LCD_OFFSET +	0x10
+
+/* FRM register */
+#define CS92xx_RED_GREEN_LSFR_SEED  CS92xx_LCD_OFFSET +	0x14
+
+/* FRM register */
+#define CS92xx_FRM_MEMORY_INDEX     CS92xx_LCD_OFFSET +	0x18
+
+/* FRM register */
+#define CS92xx_FRM_MEMORY_DATA      CS92xx_LCD_OFFSET +	0x1C
+
+/* FRM register */
+#define CS92xx_LCD_MEM_CNTRL        CS92xx_LCD_OFFSET +	0x20
+
+/* memory PLL register */
+#define CS92xx_LCD_RAM_CNTRL        CS92xx_LCD_OFFSET +	0x24
+
+/* ram control */
+
+#define CS92xx_LCD_RAM_DATA         CS92xx_LCD_OFFSET +	0x28	/* ram data */
+
+#define CS92xx_LCD_PAN_CRC_SIG      CS92xx_LCD_OFFSET +	0x2C
+
+/* FP CRC signature */
+#define CS92xx_DEV_REV_ID           CS92xx_LCD_OFFSET +	0x30
+
+/* Device and revision id */
+#define CS92xx_LCD_GPIO_DATA        CS92xx_LCD_OFFSET +	0x34	/* GPIO Data */
+
+#define CS92xx_LCD_GPIO_CNTRL       CS92xx_LCD_OFFSET +	0x38
+
+/* GPIO Control */
+int Pnl_Rev_ID;
+
+typedef struct
+{
+   /* DISPLAY MODE PARAMETERS */
+   int xres;
+   int yres;
+   int bpp;
+   int panel_type;
+   int color_type;
+   /* VALUES USED TO SET THE FLAT PANEL DISPLAY CONTROLLER */
+   unsigned long panel_timing1;
+   unsigned long panel_timing2;
+   unsigned long power_management;
+   /* the following 5 registers are prior to revision C */
+   unsigned long pre_C_dither_frc;
+   unsigned long block_select1;
+   unsigned long block_select2;
+   unsigned long dispersion1;
+   unsigned long dispersion2;
+   /* the following 4 registers are revision C only */
+   unsigned long rev_C_dither_frc;
+   unsigned long blue_lsfr_seed;
+   unsigned long red_green_lsfr_seed;
+   unsigned long frm_memory_index;
+   unsigned long frm_memory_data;
+   unsigned long memory_control;
+
+}
+CS92xx_MODE;
+
+/* VALUES USED TO SAVE AND RESTORE 9211 REGISTERS. */
+typedef struct
+{
+   unsigned long panel_state;
+   /* VALUES USED TO SET THE FLAT PANEL DISPLAY CONTROLLER */
+   unsigned long panel_timing1;
+   unsigned long panel_timing2;
+   unsigned long power_management;
+   unsigned long dither_frc_ctrl;
+   unsigned long blue_lsfr_seed;
+   unsigned long red_green_lsfr_seed;
+   unsigned long frm_memory_index;
+   unsigned long frm_memory_data;
+   unsigned long memory_control;
+}
+CS92xx_REGS;
+
+CS92xx_REGS cs9211_regs;
+
+/*
+ *------------------------------------------------------------------------
+ * PANEL MODE TABLES:
+ * GLOBAL ARRAY OF FLAT PANEL MODE STRUCTURES
+ *------------------------------------------------------------------------
+ */
+CS92xx_MODE FPModeParams[] = {
+
+   {640, 480, 8, PNL_SSTN, PNL_COLOR_PANEL,	/* display parameters */
+    0x01e00000, 0x00034000,		/* panel timing reg 1, panel timing reg 2 */
+    0x01000000,				/* power management */
+    /* The next 5 values are prior to revision C */
+    0x00000050,				/* dither and frame rate control  */
+    0x25cf3096, 0xad47b81e,		/* block select 1, block select 2 */
+    0x21446450, 0x21446450,		/* dispersion 1, dispersion 2 */
+    /* The next 5 values are for revision C */
+    0x00000050,				/* dither and frame rate control */
+    0x00000000, 0x00000000,		/* blue LSFR, red and green LSFR */
+    0x00000000, 0x00000000,		/* FRM memory index, FRM memory data */
+    0x00000000,				/* memory control */
+    },
+
+   {640, 480, 12, PNL_TFT, PNL_COLOR_PANEL,	/* display parameters */
+    0x01e00000, 0x0f100000,		/* panel timing reg 1, panel timing reg 2 */
+    0x01000000,				/* power management */
+    /* The next 5 values are prior to revision C */
+    0x00000050,				/* dither and frame rate control */
+    0x00000000, 0x00000000,		/* block select 1, block select 2 */
+    0x00000000, 0x00000000,		/* dispersion 1, dispersion 2 */
+    /* The next 5 values are for revision C */
+    0x00000050,				/* dither and frame rate control  */
+    0x00000000, 0x00000000,		/* blue LSFR, red and green LSFR */
+    0x00000000, 0x00000000,		/* FRM memory index, FRM memory data */
+    0x00000000,				/* memory control */
+    },
+
+   {640, 480, 18, PNL_TFT, PNL_COLOR_PANEL,	/* display parameters */
+    0x01e00000, 0x0f100000,		/* panel timing reg 1, panel timing reg 2 */
+    0x01000000,				/* power management */
+    /* The next 5 values are prior to revision C */
+    0x00000050,				/* dither and frame rate control */
+    0x00000000, 0x00000000,		/* block select 1, block select 2 */
+    0x00000000, 0x00000000,		/* dispersion 1, dispersion 2 */
+    /* The next 5 values are for revision C */
+    0x00000050,				/* dither and frame rate control */
+    0x00000000, 0x00000000,		/* blue LSFR, red and green LSFR */
+    0x00000000, 0x00000000,		/* FRM memory index, FRM memory data */
+    0x00000000,				/* memory control */
+    },
+
+   {640, 480, 16, PNL_DSTN, PNL_COLOR_PANEL,	/* display parameters */
+    0x01e00000, 0x00014000,		/* panel timing reg 1, panel timing reg 2 */
+    0x01000000,				/* power management */
+    /* The next 5 values are prior to revision C */
+    0x00000050,				/* dither and frame rate control */
+    0x048c26ae, 0x048c26ae,		/* block select 1, block select 2 */
+    0x02468ace, 0x13579bdf,		/* dispersion 1, dispersion 2 */
+    /* The next 5 values are for revision C */
+    0x0000004b,				/* dither and frame rate control */
+    0x00000000, 0x00000000,		/* blue LSFR, red and green LSFR */
+    0x00000000, 0x00000000,		/* FRM memory index, FRM memory data */
+    0x00000007,				/* memory control */
+    },
+
+   {640, 480, 8, PNL_DSTN, PNL_MONO_PANEL,	/* display parameters */
+    0x01e00000, 0x00084000,		/* panel timing reg 1, panel timing reg 2 */
+    0x01000000,				/* power management */
+    /* The next 5 values are prior to revision C */
+    0x0000004b,				/* dither and frame rate control */
+    0x25cf3096, 0xad47b81e,		/* block select 1, block select 2 */
+    0x21446450, 0x21446450,		/* dispersion 1, dispersion 2 */
+    /* The next 5 values are for revision C  */
+    0x00000050,				/* dither and frame rate control */
+    0x00000000, 0x00000000,		/* blue LSFR, red and green LSFR */
+    0x00000000, 0x00000000,		/* FRM memory index, FRM memory data */
+    0x00000007,				/* memory control */
+    },
+
+   {640, 480, 16, PNL_DSTN, PNL_MONO_PANEL,	/* display parameters */
+    0x01e00000, 0x00094000,		/* panel timing reg 1, panel timing reg 2 */
+    0x01000000,				/* power management */
+    /* The next 5 values are prior to revision C */
+    0x00000050,				/* dither and frame rate control  */
+    0x25cf3096, 0xad47b81e,		/* block select 1, block select 2 */
+    0x81a5d470, 0x29cfb63e,		/* dispersion 1, dispersion 2 */
+    /* The next 5 values are for revision C */
+    0x00000050,				/* dither and frame rate control  */
+    0x00000000, 0x00000000,		/* blue LSFR, red and green LSFR */
+    0x00000000, 0x00000000,		/* FRM memory index, FRM memory data */
+    0x00000007,				/* memory control */
+    },
+
+   {800, 600, 12, PNL_TFT, PNL_COLOR_PANEL,	/* display parameters */
+    0x02580000, 0x0f100000,		/* panel timing reg 1, panel timing reg 2 */
+    0x01000000,				/* power management */
+    /* The next 5 values are prior to revision C */
+    0x00000050,				/* dither and frame rate control  */
+    0x00000000, 0x00000000,		/* block select 1, block select 2 */
+    0x00000000, 0x00000000,		/* dispersion 1, dispersion 2 */
+    /* The next 5 values are for revision C */
+    0x00000050,				/* dither and frame rate control  */
+    0x00000000, 0x00000000,		/* blue LSFR, red and green LSFR */
+    0x00000000, 0x00000000,		/* FRM memory index, FRM memory data */
+    0x00000000,				/* memory control */
+    },
+
+   {800, 600, 18, PNL_TFT, PNL_COLOR_PANEL,	/* display parameters */
+    0x02580000, 0x0f100000,		/* panel timing reg 1, panel timing reg 2 */
+    0x01000000,				/* power management */
+    /* The next 5 values are prior to revision C */
+    0x00000050,				/* dither and frame rate control  */
+    0x00000000, 0x00000000,		/* block select 1, block select 2 */
+    0x00000000, 0x00000000,		/* dispersion 1, dispersion 2 */
+    /* The next 5 values are for revision C */
+    0x00000050,				/* dither and frame rate control */
+    0x00000000, 0x00000000,		/* blue LSFR, red and green LSFR */
+    0x00000000, 0x00000000,		/* FRM memory index, FRM memory data */
+    0x00000000,				/* memory control */
+    },
+
+   {800, 600, 16, PNL_DSTN, PNL_COLOR_PANEL,	/* display parameters */
+    0x02580000, 0x00014000,		/* panel timing reg 1, panel timing reg 2 */
+    0x01000000,				/* power management */
+    /* The next 5 values are prior to revision C */
+    0x00000050,				/* dither and frame rate control  */
+    0x048c26ae, 0x048c26ae,		/* block select 1, block select 2 */
+    0x02468ace, 0x13579bdf,		/* dispersion 1, dispersion 2 */
+    /* The next 5 values are for revision C */
+    0x0000004b,				/* dither and frame rate control */
+    0x00000000, 0x00000000,		/* blue LSFR, red and green LSFR */
+    0x00000000, 0x00000000,		/* FRM memory index, FRM memory data */
+    0x00000007,				/* memory control */
+    },
+
+   {800, 600, 8, PNL_DSTN, PNL_MONO_PANEL,	/* display parameters */
+    0x02580000, 0x00084000,		/* panel timing reg 1, panel timing reg 2 */
+    0x01000000,				/* power management */
+    /* The next 5 values are prior to revision C */
+    0x00000050,				/* dither and frame rate control */
+    0x25cf3096, 0xad47b81e,		/* block select 1, block select 2 */
+    0x21446450, 0x21446450,		/* dispersion 1, dispersion 2 */
+    /* The next 5 values are for revision C */
+    0x0000004b,				/* dither and frame rate control  */
+    0x00000000, 0x00000000,		/* blue LSFR, red and green LSFR */
+    0x00000000, 0x00000000,		/* FRM memory index, FRM memory data */
+    0x00000007,				/* memory control */
+    },
+
+   {800, 600, 16, PNL_DSTN, PNL_MONO_PANEL,	/* display parameters */
+    0x02580000, 0x00094000,		/* panel timing reg 1, panel timing reg 2 */
+    0x01000000,				/* power management */
+    /* The next 5 values are prior to revision C */
+    0x00000050,				/* dither and frame rate control */
+    0x25cf3096, 0xad47b81e,		/* block select 1, block select 2 */
+    0x81a5d470, 0x29cfb63e,		/* dispersion 1, dispersion 2 */
+    /* The next 5 values are for revision C */
+    0x00000050,				/* dither and frame rate control */
+    0x00000000, 0x00000000,		/* blue LSFR, red and green LSFR */
+    0x00000000, 0x00000000,		/* FRM memory index, FRM memory data */
+    0x00000007,				/* memory control */
+    },
+
+   {1024, 768, 18, PNL_TFT, PNL_COLOR_PANEL,	/* display parameters */
+    0x03000000, 0x0f100000,		/* panel timing reg 1, panel timing reg 2 */
+    0x01000000,				/* power management */
+    /*The next 5 values are prior to revision C */
+    0x00000050,				/* dither and frame rate control */
+    0x00000000, 0x00000000,		/* block select 1, block select 2 */
+    0x00000000, 0x00000000,		/* dispersion 1, dispersion 2 */
+    /*The next 5 values are for revision C */
+    0x00000050,				/* dither and frame rate control */
+    0x00000000, 0x00000000,		/* blue LSFR, red and green LSFR */
+    0x00000000, 0x00000000,		/* FRM memory index, FRM memory data */
+    0x00000000,				/* memory control */
+    },
+
+   {1024, 768, 24, PNL_DSTN, PNL_COLOR_PANEL,	/* display parameters */
+    0x03000000, 0x80024000,		/* panel timing reg 1, panel timing reg 2 */
+    0x01000000,				/* power management */
+    /*The next 5 values are prior to revision C */
+    0x00000050,				/* dither and frame rate control */
+    0x048c26ae, 0x048c26ae,		/* block select 1, block select 2 */
+    0x02468ace, 0x13579bdf,		/* dispersion 1, dispersion 2 */
+    /*The next 5 values are for revision C */
+    0x0000004b,				/* dither and frame rate control */
+    0x00000000, 0x00000000,		/* blue LSFR, red and green LSFR */
+    0x00000000, 0x00000000,		/* FRM memory index, FRM memory data */
+    0x00000005,				/* memory control */
+    }
+};
+
+#endif /* !_92XX_h */
+
+/* END OF FILE */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/panel/cen9211.c b/xc/programs/Xserver/hw/xfree86/drivers/nsc/panel/cen9211.c
index 3101b967a..85aecdfe3 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/panel/cen9211.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/panel/cen9211.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/panel/cen9211.c,v 1.1 2002/10/11 14:33:01 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/panel/cen9211.c,v 1.1 2002/12/10 15:12:28 alanh Exp $ */
 /*
  * $Workfile: cen9211.c $
  *
@@ -133,8 +133,6 @@
  *
  * END_NSC_LIC_GPL */
 
-
-
 #include "cen9211.h"
 
 static unsigned char sioc2_orig_val;
@@ -149,11 +147,12 @@ static unsigned char must_restore_97317 = FALSE;
  *
  *********************************************************************/
 
-unsigned char init_Centaurus_GPIO(void)
+unsigned char
+init_Centaurus_GPIO(void)
 {
    unsigned char reg_val;
-   static unsigned char first_time = TRUE; 
-  
+   static unsigned char first_time = TRUE;
+
    /* The Centaurus board uses ports 1 and 2 of the 97317 for GPIO. 
     * These ports require bank 0 to be active. The first thing we will
     * do is verify that bank 0 is active and set it if it is not.
@@ -165,27 +164,27 @@ unsigned char init_Centaurus_GPIO(void)
 
    /* set to bank 0 */
    if (reg_val & CENT_GPIO_BANK_SELECT) {
-       gfx_outb(CENT_CONFIG_DATA, 
-               (unsigned char) (reg_val & ~CENT_GPIO_BANK_SELECT));
+      gfx_outb(CENT_CONFIG_DATA,
+	       (unsigned char)(reg_val & ~CENT_GPIO_BANK_SELECT));
    }
 
    /* If this is the first time we have modified sioc2, we must 
     * save the current value (set by the BIOS) for restoration by 
     * the calling program, set the global flag must_restore_97317, and set 
     * first_time to FALSE. 
-    */     
+    */
 
    if (first_time == TRUE) {
       sioc2_orig_val = reg_val;
       must_restore_97317 = TRUE;
       first_time = FALSE;
    }
-   
+
    /* set port 1 direction */
    reg_val = gfx_inb(CENT_PORT1_DIRECTION);
 
    /* make GPIO 14 and 17 outputs  */
-   reg_val |= CENT_97317_CLOCK_MASK | CENT_97317_DATA_OUT_MASK;	
+   reg_val |= CENT_97317_CLOCK_MASK | CENT_97317_DATA_OUT_MASK;
    gfx_outb(CENT_PORT1_DIRECTION, reg_val);
 
    /* set port 2 direction */
@@ -199,20 +198,20 @@ unsigned char init_Centaurus_GPIO(void)
 
    reg_val &= ~CENT_97317_DATA_IN_MASK;
    gfx_outb(CENT_PORT2_DIRECTION, reg_val);
- 
+
    /* make GPIO 14 and 17 push-pull */
 
    reg_val = gfx_inb(CENT_PORT1_OUTPUT_TYPE);
    reg_val |= CENT_97317_CLOCK_MASK | CENT_97317_DATA_OUT_MASK;
    gfx_outb(CENT_PORT1_OUTPUT_TYPE, reg_val);
-  
+
    /* make GPIO 20 and 21 push-pull */
    reg_val = gfx_inb(CENT_PORT2_OUTPUT_TYPE);
-   reg_val |= CENT_97317_CHIP_SEL_MASK	| CENT_97317_DATA_IN_MASK;
+   reg_val |= CENT_97317_CHIP_SEL_MASK | CENT_97317_DATA_IN_MASK;
    gfx_outb(CENT_PORT2_OUTPUT_TYPE, reg_val);
    return CENT_PASS;
 
-} /* end init_GPIO() */
+}					/* end init_GPIO() */
 
 /*********************************************************************
  *
@@ -222,9 +221,11 @@ unsigned char init_Centaurus_GPIO(void)
  *
  **********************************************************************/
 
-unsigned char init_Centaurus_9211(void)
+unsigned char
+init_Centaurus_9211(void)
 {
    unsigned char ReadData;
+
    /* Uses the 97317 for GPIO. 
     * we will use the clock port define for port 1 
     */
@@ -235,9 +236,9 @@ unsigned char init_Centaurus_9211(void)
    ReadData = gfx_inb(CENT_97317_CHIP_SELECT);
    ReadData &= ~CENT_97317_CHIP_SEL_MASK & ~CENT_97317_DATA_IN_MASK;
    gfx_outb(CENT_97317_CHIP_SELECT, ReadData);
-   return(CENT_PASS);
+   return (CENT_PASS);
 
-} /*end init_9211() */
+}					/*end init_9211() */
 
 /******************************************************************
  *
@@ -248,29 +249,30 @@ unsigned char init_Centaurus_9211(void)
  *
  *******************************************************************/
 
-unsigned char restore_Centaurus_97317_SIOC2(void)
+unsigned char
+restore_Centaurus_97317_SIOC2(void)
 {
    /* set the global flag */
    if (must_restore_97317 == TRUE) {
       unsigned char cfg;
 
-     /* set the index for access to the configuration register */
-     gfx_outb(CENT_CONFIG_INDEX, CENT_SIOC2);
+      /* set the index for access to the configuration register */
+      gfx_outb(CENT_CONFIG_INDEX, CENT_SIOC2);
 
-     /* restore the value */
-     gfx_outb(CENT_CONFIG_DATA, sioc2_orig_val);
+      /* restore the value */
+      gfx_outb(CENT_CONFIG_DATA, sioc2_orig_val);
 
-     /* now read and verify */
-     cfg = gfx_inb(CENT_CONFIG_DATA);
-     if (cfg == sioc2_orig_val)
-        return(CENT_PASS);
-      else 
-         return(CENT_FAIL);
+      /* now read and verify */
+      cfg = gfx_inb(CENT_CONFIG_DATA);
+      if (cfg == sioc2_orig_val)
+	 return (CENT_PASS);
+      else
+	 return (CENT_FAIL);
 
-   } /* end if() */
-   return(CENT_FAIL);
+   }					/* end if() */
+   return (CENT_FAIL);
 
-} /* end restore_97317_SIOC2bank() */
+}					/* end restore_97317_SIOC2bank() */
 
 /* -----------------------------------------------------------------------
  *
@@ -283,27 +285,28 @@ unsigned char restore_Centaurus_97317_SIOC2(void)
  *
  *------------------------------------------------------------------------*/
 
-unsigned char set_Centaurus_92xx_mode(Pnl_PanelStat *pstat)
-{	
+unsigned char
+set_Centaurus_92xx_mode(Pnl_PanelStat * pstat)
+{
    int mode;
 
    /* LOOP THROUGH THE AVAILABLE MODES TO FIND A MATCH */
 
    for (mode = 0; mode < NUM_92XX_MODES; mode++) {
-       if ((FPModeParams[mode].xres == pstat->XRes) &&
-          (FPModeParams[mode].yres == pstat->YRes) &&
-          (FPModeParams[mode].bpp == pstat->Depth) &&
-          (FPModeParams[mode].panel_type == pstat->Type) &&
-          (FPModeParams[mode].color_type == pstat->MonoColor)) {
+      if ((FPModeParams[mode].xres == pstat->XRes) &&
+	  (FPModeParams[mode].yres == pstat->YRes) &&
+	  (FPModeParams[mode].bpp == pstat->Depth) &&
+	  (FPModeParams[mode].panel_type == pstat->Type) &&
+	  (FPModeParams[mode].color_type == pstat->MonoColor)) {
 
-          /* SET THE 92xx FOR THE SELECTED MODE */
-          set_Centaurus_92xx_mode_params(mode);
-          return(CENT_PASS);
-       } /* end if() */
-   } /* end for() */
-   return(CENT_FAIL);
+	 /* SET THE 92xx FOR THE SELECTED MODE */
+	 set_Centaurus_92xx_mode_params(mode);
+	 return (CENT_PASS);
+      }					/* end if() */
+   }					/* end for() */
+   return (CENT_FAIL);
 
-} /* end set_Centaurus_92xx_mode() */
+}					/* end set_Centaurus_92xx_mode() */
 
 /*-------------------------------------------------------------------
  *
@@ -312,7 +315,8 @@ unsigned char set_Centaurus_92xx_mode(Pnl_PanelStat *pstat)
  *
  *-------------------------------------------------------------------*/
 
-void set_Centaurus_92xx_mode_params(int mode)
+void
+set_Centaurus_92xx_mode_params(int mode)
 {
    CS92xx_MODE *pMode = &FPModeParams[mode];
    unsigned long off_data = 0;
@@ -322,87 +326,78 @@ void set_Centaurus_92xx_mode_params(int mode)
     * force the power register to 0. 
     */
 
-   Centaurus_write_gpio(FOUR_BYTES, CS92xx_LCD_PWR_MAN, off_data);	   
+   Centaurus_write_gpio(FOUR_BYTES, CS92xx_LCD_PWR_MAN, off_data);
 
    /* set 9211 registers using the desired panel settings */
 
    Centaurus_write_gpio(FOUR_BYTES,
-			CS92xx_LCD_PAN_TIMING1, 
-		        pMode->panel_timing1);	   
+			CS92xx_LCD_PAN_TIMING1, pMode->panel_timing1);
 
    Centaurus_write_gpio(FOUR_BYTES,
-		        CS92xx_LCD_PAN_TIMING2, 
-   			pMode->panel_timing2);	   
+			CS92xx_LCD_PAN_TIMING2, pMode->panel_timing2);
 
-   if (Pnl_Rev_ID == PNL_9211_C) { 
+   if (Pnl_Rev_ID == PNL_9211_C) {
 
       /* load the LSFR seeds */
-      Centaurus_write_gpio( FOUR_BYTES, 
-			    CS92xx_LCD_DITH_FR_CNTRL, 
-                            pMode->rev_C_dither_frc);	   
+      Centaurus_write_gpio(FOUR_BYTES,
+			   CS92xx_LCD_DITH_FR_CNTRL, pMode->rev_C_dither_frc);
 
-      Centaurus_write_gpio(FOUR_BYTES, 	
-			   CS92xx_BLUE_LSFR_SEED, 
-                           pMode->blue_lsfr_seed);	   
+      Centaurus_write_gpio(FOUR_BYTES,
+			   CS92xx_BLUE_LSFR_SEED, pMode->blue_lsfr_seed);
 
       Centaurus_write_gpio(FOUR_BYTES,
-			   CS92xx_RED_GREEN_LSFR_SEED, 
-                           pMode->red_green_lsfr_seed);	   
-   } else { 
-      
-        Centaurus_write_gpio(FOUR_BYTES, 
-			     CS92xx_LCD_DITH_FR_CNTRL, 
-                             pMode->pre_C_dither_frc);	   
+			   CS92xx_RED_GREEN_LSFR_SEED,
+			   pMode->red_green_lsfr_seed);
+   } else {
 
-        Centaurus_write_gpio(FOUR_BYTES, 
-			     CS92xx_LCD_BLOCK_SEL1, 
-                             pMode->block_select1);	   
+      Centaurus_write_gpio(FOUR_BYTES,
+			   CS92xx_LCD_DITH_FR_CNTRL, pMode->pre_C_dither_frc);
 
-        Centaurus_write_gpio(FOUR_BYTES, 
-			     CS92xx_LCD_BLOCK_SEL2, 
-                             pMode->block_select2);	   
+      Centaurus_write_gpio(FOUR_BYTES,
+			   CS92xx_LCD_BLOCK_SEL1, pMode->block_select1);
 
-        Centaurus_write_gpio(FOUR_BYTES,
-                             CS92xx_LCD_DISPER1, 
-			     pMode->dispersion1);
+      Centaurus_write_gpio(FOUR_BYTES,
+			   CS92xx_LCD_BLOCK_SEL2, pMode->block_select2);
 
-        Centaurus_write_gpio(FOUR_BYTES, 
-			     CS92xx_LCD_DISPER2, 
-			     pMode->dispersion2);	   
+      Centaurus_write_gpio(FOUR_BYTES,
+			   CS92xx_LCD_DISPER1, pMode->dispersion1);
 
-        CentaurusProgramFRMload();
-     } 
-	
-   Centaurus_write_gpio(FOUR_BYTES, CS92xx_LCD_MEM_CNTRL, 
-                        pMode->memory_control);	   
+      Centaurus_write_gpio(FOUR_BYTES,
+			   CS92xx_LCD_DISPER2, pMode->dispersion2);
 
-   /* Set the power register last. This will turn the panel on at the 9211.*/
+      CentaurusProgramFRMload();
+   }
 
-   Centaurus_write_gpio(FOUR_BYTES, 
-                        CS92xx_LCD_PWR_MAN, 
-                        pMode->power_management);	   
+   Centaurus_write_gpio(FOUR_BYTES, CS92xx_LCD_MEM_CNTRL,
+			pMode->memory_control);
 
-} /* end set_Centaurus_92xx_mode_params() */
+   /* Set the power register last. This will turn the panel on at the 9211. */
 
+   Centaurus_write_gpio(FOUR_BYTES,
+			CS92xx_LCD_PWR_MAN, pMode->power_management);
 
-void Centaurus_write_gpio(int width, ULONG address, unsigned long data)
+}					/* end set_Centaurus_92xx_mode_params() */
+
+void
+Centaurus_write_gpio(int width, ULONG address, unsigned long data)
 {
    int num_clock_toggles;
    int count;
-   unsigned long Addr = address;		
+   unsigned long Addr = address;
+
    enable_Centaurus_9211_chip_select();
-  
+
    /* Write 1 Clock period of no valid transfer */
    write_Centaurus_CX9211_GPIO(CENT_NO_DATA);
-  
+
    /* Write 1 control bit (the data book calls this the control bar write) */
    write_Centaurus_CX9211_GPIO(0x1);
 
    /* Write the 12-bit address */
    for (count = 0; count < 12; count++) {
-       write_Centaurus_CX9211_GPIO((unsigned char)(Addr & 0x01));
-       /*the 9211 expects data LSB->MSB */
-       Addr = Addr >> 1;
+      write_Centaurus_CX9211_GPIO((unsigned char)(Addr & 0x01));
+      /*the 9211 expects data LSB->MSB */
+      Addr = Addr >> 1;
    }
 
    /* write */
@@ -414,21 +409,22 @@ void Centaurus_write_gpio(int width, ULONG address, unsigned long data)
 
    /* now toggle the clock */
    for (count = 0; count < num_clock_toggles; count++) {
-       toggle_Centaurus_9211_clock();
+      toggle_Centaurus_9211_clock();
    }
    return;
 
-} /* end Centaurus_write_gpio() */
+}					/* end Centaurus_write_gpio() */
 
-unsigned long Centaurus_read_gpio(int width, unsigned long address)
+unsigned long
+Centaurus_read_gpio(int width, unsigned long address)
 {
    int num_clock_toggles;
    int count;
-   unsigned long Addr = address;		
-   unsigned long data;		
+   unsigned long Addr = address;
+   unsigned long data;
 
    enable_Centaurus_9211_chip_select();
- 
+
    /* Write 1 Clock period of no valid transfer */
    write_Centaurus_CX9211_GPIO(CENT_NO_DATA);
 
@@ -437,25 +433,25 @@ unsigned long Centaurus_read_gpio(int width, unsigned long address)
 
    /* Write the 12-bit address */
    for (count = 0; count < 12; count++) {
-       write_Centaurus_CX9211_GPIO((unsigned char)(Addr & 0x01));
+      write_Centaurus_CX9211_GPIO((unsigned char)(Addr & 0x01));
 
-       /*the 9211 expects data LSB->MSB */
-       Addr = Addr >> 1;
+      /*the 9211 expects data LSB->MSB */
+      Addr = Addr >> 1;
    }
 
-   data = read_Centaurus_CX9211_DWdata();   
+   data = read_Centaurus_CX9211_DWdata();
 
    /* a read will require one toggle after disabling CS */
    num_clock_toggles = CENT_NUM_READ_CLOCK_TOGGLES;
    disable_Centaurus_9211_chip_select();
-   
+
    /* now toggle the clock */
    for (count = 0; count < num_clock_toggles; count++) {
-       toggle_Centaurus_9211_clock();
+      toggle_Centaurus_9211_clock();
    }
    return data;
 
-} /* end Centaurus_read_gpio() */
+}					/* end Centaurus_read_gpio() */
 
 /*******************************************************************
  *
@@ -465,18 +461,18 @@ unsigned long Centaurus_read_gpio(int width, unsigned long address)
  *
  *******************************************************************/
 
-void  enable_Centaurus_9211_chip_select(void)
+void
+enable_Centaurus_9211_chip_select(void)
 {
    unsigned char cs_port_val;
-   
+
    /* Set the chip select (GPIO20) high */
    cs_port_val = gfx_inb(CENT_97317_CHIP_SELECT);
-   gfx_outb(CENT_97317_CHIP_SELECT, 
-            (unsigned char) (cs_port_val | CENT_97317_CHIP_SEL_MASK));
+   gfx_outb(CENT_97317_CHIP_SELECT,
+	    (unsigned char)(cs_port_val | CENT_97317_CHIP_SEL_MASK));
    return;
 
-} /* end enable_Centaurus_9211_chip_select() */
-
+}					/* end enable_Centaurus_9211_chip_select() */
 
 /********************************************************************
  *
@@ -486,19 +482,18 @@ void  enable_Centaurus_9211_chip_select(void)
  *
  *******************************************************************/
 
-void disable_Centaurus_9211_chip_select(void)
+void
+disable_Centaurus_9211_chip_select(void)
 {
    unsigned char cs_port_val;
 
    /* Set the chip select (GPIO20) low */
    cs_port_val = gfx_inb(CENT_97317_CHIP_SELECT);
-   gfx_outb(CENT_97317_CHIP_SELECT, 
-	    (unsigned char) (cs_port_val & ~CENT_97317_CHIP_SEL_MASK));
+   gfx_outb(CENT_97317_CHIP_SELECT,
+	    (unsigned char)(cs_port_val & ~CENT_97317_CHIP_SEL_MASK));
    return;
 
-} /* end disable_Centaurus_9211_chip_select() */
-
-
+}					/* end disable_Centaurus_9211_chip_select() */
 
 /**********************************************************************
  *
@@ -510,22 +505,23 @@ void disable_Centaurus_9211_chip_select(void)
  *
  **********************************************************************/
 
-void toggle_Centaurus_9211_clock(void)
+void
+toggle_Centaurus_9211_clock(void)
 {
    unsigned char port_val;
+
    /* get the 97317 GPIO port contents for the 9211 clock */
 
    port_val = gfx_inb(CENT_97317_CLOCK_PORT);
    /* set the clock bit high */
-   gfx_outb(CENT_97317_CLOCK_PORT, 
-            (unsigned char) (port_val | CENT_97317_CLOCK_MASK));
+   gfx_outb(CENT_97317_CLOCK_PORT,
+	    (unsigned char)(port_val | CENT_97317_CLOCK_MASK));
 
    /* set the clock bit low */
-   gfx_outb(CENT_97317_CLOCK_PORT, 
-            (unsigned char) (port_val & ~CENT_97317_CLOCK_MASK));
-
-} /* end toggle_Centaurus_9211_clock() */
+   gfx_outb(CENT_97317_CLOCK_PORT,
+	    (unsigned char)(port_val & ~CENT_97317_CLOCK_MASK));
 
+}					/* end toggle_Centaurus_9211_clock() */
 
 /********************************************************************
  *
@@ -537,11 +533,13 @@ void toggle_Centaurus_9211_clock(void)
  *
  *******************************************************************/
 
-void write_Centaurus_CX9211_GPIO(unsigned char databit)
+void
+write_Centaurus_CX9211_GPIO(unsigned char databit)
 {
    unsigned char data_port_val;
+
    /* Set the data bit for (GPIO17) */
-   databit <<= 7;  
+   databit <<= 7;
 
    /* read the value of the other bits in the 97317 data port */
    data_port_val = gfx_inb(CENT_97317_DATA_OUTPORT);
@@ -555,8 +553,7 @@ void write_Centaurus_CX9211_GPIO(unsigned char databit)
    toggle_Centaurus_9211_clock();
    return;
 
-} /* end write_Centaurus_CX9211_GPIO() */
-
+}					/* end write_Centaurus_CX9211_GPIO() */
 
 /*****************************************************************
  *
@@ -570,24 +567,25 @@ void write_Centaurus_CX9211_GPIO(unsigned char databit)
  *
  ******************************************************************/
 
-void  write_Centaurus_CX9211_DWdata(unsigned long data)
+void
+write_Centaurus_CX9211_DWdata(unsigned long data)
 {
    int count;
+
    /* Send the read/write command to the 9211 first. */
 
    write_Centaurus_CX9211_GPIO(CENT_WRITE);
 
    /* Now write the 32-bit Data */
    for (count = 0; count < 32; count++) {
-       write_Centaurus_CX9211_GPIO((unsigned char)(data & 0x01));
-      
-       /* the 9211 expects the data LSB->MSB */
-       data >>= 1;
+      write_Centaurus_CX9211_GPIO((unsigned char)(data & 0x01));
+
+      /* the 9211 expects the data LSB->MSB */
+      data >>= 1;
    }
    return;
 
-} /* end write_Centaurus_CX9211_DWdata() */
-
+}					/* end write_Centaurus_CX9211_DWdata() */
 
 /*********************************************************************
  *
@@ -598,22 +596,21 @@ void  write_Centaurus_CX9211_DWdata(unsigned long data)
  *
  *********************************************************************/
 
-unsigned char read_Centaurus_CX9211_GPIO(void)
+unsigned char
+read_Centaurus_CX9211_GPIO(void)
 {
    unsigned char data_port_val;
 
    toggle_Centaurus_9211_clock();
-   
+
    /* read the data */
    data_port_val = gfx_inb(CENT_97317_DATA_INPORT);
 
    /* Save the data from (GPIO21) as bit 0 */
-   data_port_val >>= 1;  
-   return(data_port_val & 0x1);  
-
-} /* end read_Centaurus_CX9211_GPIO() */
-
+   data_port_val >>= 1;
+   return (data_port_val & 0x1);
 
+}					/* end read_Centaurus_CX9211_GPIO() */
 
 /**********************************************************************
  *
@@ -626,222 +623,225 @@ unsigned char read_Centaurus_CX9211_GPIO(void)
  *
  ***********************************************************************/
 
-unsigned long  read_Centaurus_CX9211_DWdata(void)
+unsigned long
+read_Centaurus_CX9211_DWdata(void)
 {
    unsigned char ReadData;
    int count;
    unsigned long Data;
-   
+
    /* Send read/write command word to the 9211 first. */
    write_Centaurus_CX9211_GPIO(CENT_READ);
- 
+
    /* The data book (revision 0.1) states 8 clock periods of no valid data. 
-    *	However, the data becomes valid on the eighth clock, making the eighth
-    *	clock valid. Since read_Centaurus_GPIO() toggles the clock before 
-    *	reading, we will only toggle the clock 7 times here. 
+    *   However, the data becomes valid on the eighth clock, making the eighth
+    *   clock valid. Since read_Centaurus_GPIO() toggles the clock before 
+    *   reading, we will only toggle the clock 7 times here. 
     */
-   for (count = 0; count < 7; count++) /* works */
-        toggle_Centaurus_9211_clock(); 
+   for (count = 0; count < 7; count++)	/* works */
+      toggle_Centaurus_9211_clock();
 
    /* Now read the 32-bit Data, bit by bit in a single loop. */
    Data = 0;
    for (count = 0; count < 32; count++) {
-       ReadData = read_Centaurus_CX9211_GPIO();
-       /* 9211 sends data  LSB->MSB */
-       Data = Data | (((unsigned long)ReadData) << count);
-   } /* end for() */
+      ReadData = read_Centaurus_CX9211_GPIO();
+      /* 9211 sends data  LSB->MSB */
+      Data = Data | (((unsigned long)ReadData) << count);
+   }					/* end for() */
 
    return Data;
 
-} /* end read_Centaurus_CX9211_DWdata() */
+}					/* end read_Centaurus_CX9211_DWdata() */
 
-void Centaurus_Get_9211_Details(unsigned long flags, PPnl_PanelParams pParam)
+void
+Centaurus_Get_9211_Details(unsigned long flags, PPnl_PanelParams pParam)
 {
    unsigned long PanelType;
    int i;
 
-   for(i= 0; i < 0x7fff; i++){
+   for (i = 0; i < 0x7fff; i++) {
    }
 
    init_Centaurus_GPIO();
 
-   for(i=0; i<5; i++)
-       toggle_Centaurus_9211_clock();
-   
-      if(flags & PNL_PANELCHIP) {
-   
-         PanelType = Centaurus_read_gpio(FOUR_BYTES, 0x430);	   	
-         PanelType = Centaurus_read_gpio(FOUR_BYTES, 0x430);	   	
-         if((PanelType & 0xFFFF0000) == 0x92110000) { 
-   
-            /* found 9211 */
-            /* check the values for revision ID */
-	    if (PanelType >= 0x92110301)
-	        pParam->PanelChip = PNL_9211_C;
-            else if ((PanelType >= 0x92110101) && (PanelType < 0x92110301))
-	            pParam->PanelChip = PNL_9211_A;
-                 else 
-                    pParam->PanelChip = PNL_UNKNOWN_CHIP;
-		} else { /* no 9211 present */
-		  pParam->PanelChip = PNL_UNKNOWN_CHIP;
-   	   }
-	 Pnl_Rev_ID = pParam->PanelChip;
-      } /* if end */
-
-      if ((pParam->PanelChip != PNL_UNKNOWN_CHIP) && (flags & PNL_PANELSTAT)) 
-	  {
-          PanelType = Centaurus_read_gpio(FOUR_BYTES, 0x438);	   	
-		  PanelType &= 0x00f8f8f8;
-		  PanelType |= 0x00070000;
-		  Centaurus_write_gpio(FOUR_BYTES, 0x438, PanelType);	   
-		  PanelType = 0;
-		  PanelType = Centaurus_read_gpio(FOUR_BYTES, 0x434);	   
-		  PanelType = (PanelType >> 8);
-		  PanelType &= 0x7;
-	 
-          switch (PanelType) {
-		  case 0:
-	         pParam->PanelStat.XRes = 800;
-		     pParam->PanelStat.YRes = 600;
-			 pParam->PanelStat.Depth = 18;
-			 pParam->PanelStat.MonoColor = PNL_COLOR_PANEL;
-			 pParam->PanelStat.Type = PNL_TFT;
-			 break;	
-		  case 1:
-			 pParam->PanelStat.XRes = 640;
-			 pParam->PanelStat.YRes = 480;
-			 pParam->PanelStat.Depth = 8;
-			 pParam->PanelStat.MonoColor = PNL_COLOR_PANEL;
-			 pParam->PanelStat.Type = PNL_SSTN;
-			 break;	
-		  case 2:
-		 	 pParam->PanelStat.XRes = 1024;
-			 pParam->PanelStat.YRes = 768;
-			 pParam->PanelStat.Depth = 18;
-			 pParam->PanelStat.MonoColor = PNL_COLOR_PANEL;
-			 pParam->PanelStat.Type = PNL_TFT;
-			 break;	
-		  case 3:
-			 pParam->PanelStat.XRes = 640;
-			 pParam->PanelStat.YRes = 480;
-			 pParam->PanelStat.Depth = 16;
-			 pParam->PanelStat.MonoColor = PNL_COLOR_PANEL;
-			 pParam->PanelStat.Type = PNL_DSTN;
-			 break;	
-		  case 4:
-			 pParam->PanelStat.XRes = 640;
-			 pParam->PanelStat.YRes = 480;
-			 pParam->PanelStat.Depth = 18;
-			 pParam->PanelStat.MonoColor = PNL_COLOR_PANEL;
-			 pParam->PanelStat.Type = PNL_TFT;
-			 break;	
-		  case 5:
-		 	 pParam->PanelStat.XRes = 1024;
-			 pParam->PanelStat.YRes = 768;
-			 pParam->PanelStat.Depth = 24;
-			 pParam->PanelStat.MonoColor = PNL_COLOR_PANEL;
-			 pParam->PanelStat.Type = PNL_DSTN;
-			 break;	
-		  case 6:
-			 pParam->PanelStat.XRes = 640;
-			 pParam->PanelStat.YRes = 480;
-			 pParam->PanelStat.Depth = 8;
-			 pParam->PanelStat.MonoColor = PNL_MONO_PANEL;
-			 pParam->PanelStat.Type = PNL_DSTN;
-			 break;	
-		  case 7:
-			 pParam->PanelStat.XRes = 800;
-			 pParam->PanelStat.YRes = 600;
-			 pParam->PanelStat.Depth = 16;
-			 pParam->PanelStat.MonoColor = PNL_COLOR_PANEL;
-			 pParam->PanelStat.Type = PNL_DSTN;
-			 break;	
-		 default:
-			 break;
-		}
-	}
-	
+   for (i = 0; i < 5; i++)
+      toggle_Centaurus_9211_clock();
+
+   if (flags & PNL_PANELCHIP) {
+
+      PanelType = Centaurus_read_gpio(FOUR_BYTES, 0x430);
+      PanelType = Centaurus_read_gpio(FOUR_BYTES, 0x430);
+      if ((PanelType & 0xFFFF0000) == 0x92110000) {
+
+	 /* found 9211 */
+	 /* check the values for revision ID */
+	 if (PanelType >= 0x92110301)
+	    pParam->PanelChip = PNL_9211_C;
+	 else if ((PanelType >= 0x92110101) && (PanelType < 0x92110301))
+	    pParam->PanelChip = PNL_9211_A;
+	 else
+	    pParam->PanelChip = PNL_UNKNOWN_CHIP;
+      } else {				/* no 9211 present */
+	 pParam->PanelChip = PNL_UNKNOWN_CHIP;
+      }
+      Pnl_Rev_ID = pParam->PanelChip;
+   }
+   /* if end */
+   if ((pParam->PanelChip != PNL_UNKNOWN_CHIP) && (flags & PNL_PANELSTAT)) {
+      PanelType = Centaurus_read_gpio(FOUR_BYTES, 0x438);
+      PanelType &= 0x00f8f8f8;
+      PanelType |= 0x00070000;
+      Centaurus_write_gpio(FOUR_BYTES, 0x438, PanelType);
+      PanelType = 0;
+      PanelType = Centaurus_read_gpio(FOUR_BYTES, 0x434);
+      PanelType = (PanelType >> 8);
+      PanelType &= 0x7;
+
+      switch (PanelType) {
+      case 0:
+	 pParam->PanelStat.XRes = 800;
+	 pParam->PanelStat.YRes = 600;
+	 pParam->PanelStat.Depth = 18;
+	 pParam->PanelStat.MonoColor = PNL_COLOR_PANEL;
+	 pParam->PanelStat.Type = PNL_TFT;
+	 break;
+      case 1:
+	 pParam->PanelStat.XRes = 640;
+	 pParam->PanelStat.YRes = 480;
+	 pParam->PanelStat.Depth = 8;
+	 pParam->PanelStat.MonoColor = PNL_COLOR_PANEL;
+	 pParam->PanelStat.Type = PNL_SSTN;
+	 break;
+      case 2:
+	 pParam->PanelStat.XRes = 1024;
+	 pParam->PanelStat.YRes = 768;
+	 pParam->PanelStat.Depth = 18;
+	 pParam->PanelStat.MonoColor = PNL_COLOR_PANEL;
+	 pParam->PanelStat.Type = PNL_TFT;
+	 break;
+      case 3:
+	 pParam->PanelStat.XRes = 640;
+	 pParam->PanelStat.YRes = 480;
+	 pParam->PanelStat.Depth = 16;
+	 pParam->PanelStat.MonoColor = PNL_COLOR_PANEL;
+	 pParam->PanelStat.Type = PNL_DSTN;
+	 break;
+      case 4:
+	 pParam->PanelStat.XRes = 640;
+	 pParam->PanelStat.YRes = 480;
+	 pParam->PanelStat.Depth = 18;
+	 pParam->PanelStat.MonoColor = PNL_COLOR_PANEL;
+	 pParam->PanelStat.Type = PNL_TFT;
+	 break;
+      case 5:
+	 pParam->PanelStat.XRes = 1024;
+	 pParam->PanelStat.YRes = 768;
+	 pParam->PanelStat.Depth = 24;
+	 pParam->PanelStat.MonoColor = PNL_COLOR_PANEL;
+	 pParam->PanelStat.Type = PNL_DSTN;
+	 break;
+      case 6:
+	 pParam->PanelStat.XRes = 640;
+	 pParam->PanelStat.YRes = 480;
+	 pParam->PanelStat.Depth = 8;
+	 pParam->PanelStat.MonoColor = PNL_MONO_PANEL;
+	 pParam->PanelStat.Type = PNL_DSTN;
+	 break;
+      case 7:
+	 pParam->PanelStat.XRes = 800;
+	 pParam->PanelStat.YRes = 600;
+	 pParam->PanelStat.Depth = 16;
+	 pParam->PanelStat.MonoColor = PNL_COLOR_PANEL;
+	 pParam->PanelStat.Type = PNL_DSTN;
+	 break;
+      default:
+	 break;
+      }
+   }
+
 }
 
-void CentaurusProgramFRMload(void)
+void
+CentaurusProgramFRMload(void)
 {
-   unsigned long CentaurusFRMtable[] = { 
-	0x00000000,		
-	0x00000000,		
-	0x01000100,		
-	0x01000100,		
-	0x01010101,		
-	0x01010101,		
-	0x02081041,		
-	0x02081041,		
-	0x10111111,		
-	0x11111101,		
-	0x49249241,		
-	0x12412492,		
-	0x92244891,		
-	0x92244891,		
-	0x22252525,		
-	0x22252525,		
-	0x528294a5,		
-	0x2528494a,		
-	0x294a5295,		
-	0x294a5295,		
-	0x54a54a95,		
-	0x2952a52a,		
-	0x2a552a55,		
-	0x2a552a55,		
-	0x554aa955,		
-	0x2a9552aa,		
-	0x2aaa5555,		
-	0x2aaa5555,		
-	0x55555555,		
-	0x2aaaaaaa,		
-	0x55555555,		
-	0x55555555,		
-	0xaaaaaaab,		
-	0x55555555,		
-	0x5555aaab,		
-	0x5555aaab,		
-	0xaab556ab,		
-	0x556aad55,		
-	0x55ab55ab,		
-	0x55ab55ab,		
-	0xab5ab56b,		
-	0x56ad5ad5,		
-	0x56b5ad6b,		
-	0x56b5ad6b,		
-	0xad6d6b5b,		
-	0x5ad6b6b6,		
-	0x5b5b5b5b,		
-	0x5b5b5b5b,		
-	0x5F6db6db,		
-	0x5F6db6db,		
-	0xF776F776,		
-	0xF776F776,		
-	0xFBDEFBDE,		
-	0xFBDEFBDE,		
-	0x7eFFBFF7,		
-	0x7eFFBFF7,		
-	0xFF7FF7F7,		
-	0xFF7FF7F7,		
-	0xFF7FFF7F,		
-	0xFF7FFF7F,		
-	0xFFF7FFFF,		
-	0xFFF7FFFF,		
-	0xFFFFFFFF,		
-	0xFFFFFFFF,		
+   unsigned long CentaurusFRMtable[] = {
+      0x00000000,
+      0x00000000,
+      0x01000100,
+      0x01000100,
+      0x01010101,
+      0x01010101,
+      0x02081041,
+      0x02081041,
+      0x10111111,
+      0x11111101,
+      0x49249241,
+      0x12412492,
+      0x92244891,
+      0x92244891,
+      0x22252525,
+      0x22252525,
+      0x528294a5,
+      0x2528494a,
+      0x294a5295,
+      0x294a5295,
+      0x54a54a95,
+      0x2952a52a,
+      0x2a552a55,
+      0x2a552a55,
+      0x554aa955,
+      0x2a9552aa,
+      0x2aaa5555,
+      0x2aaa5555,
+      0x55555555,
+      0x2aaaaaaa,
+      0x55555555,
+      0x55555555,
+      0xaaaaaaab,
+      0x55555555,
+      0x5555aaab,
+      0x5555aaab,
+      0xaab556ab,
+      0x556aad55,
+      0x55ab55ab,
+      0x55ab55ab,
+      0xab5ab56b,
+      0x56ad5ad5,
+      0x56b5ad6b,
+      0x56b5ad6b,
+      0xad6d6b5b,
+      0x5ad6b6b6,
+      0x5b5b5b5b,
+      0x5b5b5b5b,
+      0x5F6db6db,
+      0x5F6db6db,
+      0xF776F776,
+      0xF776F776,
+      0xFBDEFBDE,
+      0xFBDEFBDE,
+      0x7eFFBFF7,
+      0x7eFFBFF7,
+      0xFF7FF7F7,
+      0xFF7FF7F7,
+      0xFF7FFF7F,
+      0xFF7FFF7F,
+      0xFFF7FFFF,
+      0xFFF7FFFF,
+      0xFFFFFFFF,
+      0xFFFFFFFF,
    };
- 
+
    unsigned char i;
    unsigned short index;
    unsigned long data;
-   Centaurus_write_gpio(FOUR_BYTES, CS92xx_FRM_MEMORY_INDEX, 0);	   
+
+   Centaurus_write_gpio(FOUR_BYTES, CS92xx_FRM_MEMORY_INDEX, 0);
    index = CS92xx_FRM_MEMORY_DATA;
-   for (i = 0; i < 64; i+=2) {
-       data = CentaurusFRMtable[i];
-       Centaurus_write_gpio(FOUR_BYTES, CS92xx_FRM_MEMORY_DATA, data);	   
-       data = CentaurusFRMtable[i+1];
-       Centaurus_write_gpio(FOUR_BYTES, CS92xx_FRM_MEMORY_DATA, data);	   
+   for (i = 0; i < 64; i += 2) {
+      data = CentaurusFRMtable[i];
+      Centaurus_write_gpio(FOUR_BYTES, CS92xx_FRM_MEMORY_DATA, data);
+      data = CentaurusFRMtable[i + 1];
+      Centaurus_write_gpio(FOUR_BYTES, CS92xx_FRM_MEMORY_DATA, data);
    }
 
    /*
@@ -854,10 +854,10 @@ void CentaurusProgramFRMload(void)
     * the writeFRM loop in RevCFrmload() in CS9211.
     */
 
-    Centaurus_write_gpio(FOUR_BYTES, CS92xx_FRM_MEMORY_INDEX, 0);	   
-    Centaurus_write_gpio(FOUR_BYTES, CS92xx_FRM_MEMORY_DATA, 0);	   
-    Centaurus_write_gpio(FOUR_BYTES, CS92xx_FRM_MEMORY_DATA, 0);	   
-}	
+   Centaurus_write_gpio(FOUR_BYTES, CS92xx_FRM_MEMORY_INDEX, 0);
+   Centaurus_write_gpio(FOUR_BYTES, CS92xx_FRM_MEMORY_DATA, 0);
+   Centaurus_write_gpio(FOUR_BYTES, CS92xx_FRM_MEMORY_DATA, 0);
+}
 
 /********************************************************************
  *
@@ -867,13 +867,15 @@ void CentaurusProgramFRMload(void)
  *
  ********************************************************************/
 
-void Centaurus_Power_Up(void)
+void
+Centaurus_Power_Up(void)
 {
    unsigned long off_data = 0x01000000;
-   Centaurus_write_gpio(FOUR_BYTES, CS92xx_LCD_PWR_MAN, off_data);	   
+
+   Centaurus_write_gpio(FOUR_BYTES, CS92xx_LCD_PWR_MAN, off_data);
    return;
 
-} /* Centaurus_Disable_Power */
+}					/* Centaurus_Disable_Power */
 
 /***********************************************************************
  *
@@ -883,85 +885,87 @@ void Centaurus_Power_Up(void)
  *
  **********************************************************************/
 
-void Centaurus_Power_Down(void)
+void
+Centaurus_Power_Down(void)
 {
    unsigned long off_data = 0;
-   Centaurus_write_gpio(FOUR_BYTES, CS92xx_LCD_PWR_MAN, off_data);	   
+
+   Centaurus_write_gpio(FOUR_BYTES, CS92xx_LCD_PWR_MAN, off_data);
    return;
 
-} /* Centaurus_Disable_Power */
+}					/* Centaurus_Disable_Power */
 
-void Centaurus_9211init(Pnl_PanelStat *pstat)
+void
+Centaurus_9211init(Pnl_PanelStat * pstat)
 {
    init_Centaurus_GPIO();
    init_Centaurus_9211();
-   set_Centaurus_92xx_mode(pstat);		
+   set_Centaurus_92xx_mode(pstat);
    restore_Centaurus_97317_SIOC2();
 }
 
-
-void Centaurus_Save_Panel_State(void)
+void
+Centaurus_Save_Panel_State(void)
 {
    /* set 9211 registers using the desired panel settings */
 
-   cs9211_regs.panel_timing1 = 
-	       Centaurus_read_gpio(FOUR_BYTES, CS92xx_LCD_PAN_TIMING1);
-   cs9211_regs.panel_timing2 = 
-	       Centaurus_read_gpio(FOUR_BYTES, CS92xx_LCD_PAN_TIMING2);	         
-   cs9211_regs.dither_frc_ctrl = 
-	       Centaurus_read_gpio(FOUR_BYTES, CS92xx_LCD_DITH_FR_CNTRL);	   
-   cs9211_regs.blue_lsfr_seed = 
-           Centaurus_read_gpio(FOUR_BYTES, CS92xx_BLUE_LSFR_SEED);	   
-
-   cs9211_regs.red_green_lsfr_seed = 
-           Centaurus_read_gpio(FOUR_BYTES, CS92xx_RED_GREEN_LSFR_SEED);	 
+   cs9211_regs.panel_timing1 =
+	 Centaurus_read_gpio(FOUR_BYTES, CS92xx_LCD_PAN_TIMING1);
+   cs9211_regs.panel_timing2 =
+	 Centaurus_read_gpio(FOUR_BYTES, CS92xx_LCD_PAN_TIMING2);
+   cs9211_regs.dither_frc_ctrl =
+	 Centaurus_read_gpio(FOUR_BYTES, CS92xx_LCD_DITH_FR_CNTRL);
+   cs9211_regs.blue_lsfr_seed =
+	 Centaurus_read_gpio(FOUR_BYTES, CS92xx_BLUE_LSFR_SEED);
+
+   cs9211_regs.red_green_lsfr_seed =
+	 Centaurus_read_gpio(FOUR_BYTES, CS92xx_RED_GREEN_LSFR_SEED);
    /* CentaurusProgramFRMload(); */
 
-   cs9211_regs.memory_control = 
-           Centaurus_read_gpio(FOUR_BYTES, CS92xx_LCD_MEM_CNTRL);	   
+   cs9211_regs.memory_control =
+	 Centaurus_read_gpio(FOUR_BYTES, CS92xx_LCD_MEM_CNTRL);
 
    /* Set the power register last. 
     * This will turn the panel on at the 9211.
     */
    cs9211_regs.power_management =
-           Centaurus_read_gpio(FOUR_BYTES, CS92xx_LCD_PWR_MAN);	   
+	 Centaurus_read_gpio(FOUR_BYTES, CS92xx_LCD_PWR_MAN);
 }
 
-
-void Centaurus_Restore_Panel_State(void) 
+void
+Centaurus_Restore_Panel_State(void)
 {
-	 
+
    unsigned long off_data = 0;
-   
-   /* Before restoring the 9211 registers, power off the 9211. */ 
-   Centaurus_write_gpio(FOUR_BYTES, CS92xx_LCD_PWR_MAN, off_data);	   
+
+   /* Before restoring the 9211 registers, power off the 9211. */
+   Centaurus_write_gpio(FOUR_BYTES, CS92xx_LCD_PWR_MAN, off_data);
 
    /* set 9211 registers using the desired panel settings */
 
-   Centaurus_write_gpio(FOUR_BYTES, CS92xx_LCD_PAN_TIMING1, 
-		        cs9211_regs.panel_timing1);	   
+   Centaurus_write_gpio(FOUR_BYTES, CS92xx_LCD_PAN_TIMING1,
+			cs9211_regs.panel_timing1);
 
    Centaurus_write_gpio(FOUR_BYTES, CS92xx_LCD_PAN_TIMING2,
- 		        cs9211_regs.panel_timing2);	   
+			cs9211_regs.panel_timing2);
 
    /* load the LSFR seeds */
 
-   Centaurus_write_gpio(FOUR_BYTES,	CS92xx_LCD_DITH_FR_CNTRL, 
-       		        cs9211_regs.dither_frc_ctrl);	   
+   Centaurus_write_gpio(FOUR_BYTES, CS92xx_LCD_DITH_FR_CNTRL,
+			cs9211_regs.dither_frc_ctrl);
 
-   Centaurus_write_gpio(FOUR_BYTES,	CS92xx_BLUE_LSFR_SEED, 
-	                cs9211_regs.blue_lsfr_seed);	   
+   Centaurus_write_gpio(FOUR_BYTES, CS92xx_BLUE_LSFR_SEED,
+			cs9211_regs.blue_lsfr_seed);
 
-   Centaurus_write_gpio(FOUR_BYTES, CS92xx_RED_GREEN_LSFR_SEED, 
-                        cs9211_regs.red_green_lsfr_seed);	   
-	
-   Centaurus_write_gpio(FOUR_BYTES, CS92xx_LCD_MEM_CNTRL, 
-                       	cs9211_regs.memory_control);	   
-   
-   /* Set the power register last. This will turn the panel on at the 9211.*/
+   Centaurus_write_gpio(FOUR_BYTES, CS92xx_RED_GREEN_LSFR_SEED,
+			cs9211_regs.red_green_lsfr_seed);
+
+   Centaurus_write_gpio(FOUR_BYTES, CS92xx_LCD_MEM_CNTRL,
+			cs9211_regs.memory_control);
+
+   /* Set the power register last. This will turn the panel on at the 9211. */
 
    Centaurus_write_gpio(FOUR_BYTES, CS92xx_LCD_PWR_MAN,
-  		       	cs9211_regs.power_management);	   
+			cs9211_regs.power_management);
 
 }
-
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/panel/cen9211.h b/xc/programs/Xserver/hw/xfree86/drivers/nsc/panel/cen9211.h
index 581fc72c9..473be5288 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/panel/cen9211.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/panel/cen9211.h
@@ -1,7 +1,7 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/panel/cen9211.h,v 1.1 2002/10/11 14:33:02 alanh Exp $ */ 
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/panel/cen9211.h,v 1.1 2002/12/10 15:12:28 alanh Exp $ */
 /*
  * $Workfile: cen9211.h $
- * $Revision: 1.1.1.1 $
+ * $Revision: 1.2.2.1 $
  *
  * File Contents: This header file defines the Durango routines and 
  *                variables used to access the memory mapped regions.
@@ -139,7 +139,6 @@
  *
  * END_NSC_LIC_GPL */
 
-  
 #include "92xx.h"
 #include "panel.h"
 
@@ -167,44 +166,44 @@
 #define CENT_97317_DATA_IN_MASK		0x02
 #define CENT_97317_DATA_OUT_MASK	0x80
 
-#define CENT_PASS    1		
-#define CENT_FAIL    0		
+#define CENT_PASS    1
+#define CENT_FAIL    0
 #define CENT_READ    0x0000
 #define CENT_WRITE   0x0001
 #define CENT_NO_DATA 0
 
 #define CENT_CONFIG_INDEX  0x2E
-#define CENT_SIOC2         0x22	
+#define CENT_SIOC2         0x22
 #define CENT_CONFIG_DATA   0x2F
-#define CENT_GPIO_BANK_SELECT	0x80	
+#define CENT_GPIO_BANK_SELECT	0x80
 
 #define CENT_NUM_READ_CLOCK_TOGGLES	1
 #define CENT_NUM_WRITE_CLOCK_TOGGLES	4
 
 /* local functions */
 void set_Centaurus_92xx_mode_params(int mode);
-void  enable_Centaurus_9211_chip_select(void);
+void enable_Centaurus_9211_chip_select(void);
 void disable_Centaurus_9211_chip_select(void);
 void toggle_Centaurus_9211_clock(void);
 void write_Centaurus_CX9211_GPIO(unsigned char databit);
-void  write_Centaurus_CX9211_DWdata(unsigned long data);
-void Centaurus_write_gpio(int width, unsigned long address, unsigned long data);
+void write_Centaurus_CX9211_DWdata(unsigned long data);
+void Centaurus_write_gpio(int width, unsigned long address,
+			  unsigned long data);
 void Centaurus_Power_Up(void);
 void Centaurus_Power_Down(void);
 unsigned long Centaurus_read_gpio(int width, unsigned long address);
 unsigned char read_Centaurus_CX9211_GPIO(void);
-unsigned long  read_Centaurus_CX9211_DWdata(void);
+unsigned long read_Centaurus_CX9211_DWdata(void);
 unsigned char restore_Centaurus_97317_SIOC2(void);
 unsigned char init_Centaurus_GPIO(void);
 unsigned char init_Centaurus_9211(void);
-unsigned char  set_Centaurus_92xx_mode(Pnl_PanelStat *pstat);
+unsigned char set_Centaurus_92xx_mode(Pnl_PanelStat * pstat);
 void CentaurusProgramFRMload(void);
 void Centaurus_Get_9211_Details(unsigned long flags, PPnl_PanelParams pParam);
 void Centaurus_Save_Panel_State(void);
 void Centaurus_Restore_Panel_State(void);
+void Centaurus_9211init(Pnl_PanelStat * pstat);
 
 #endif /* !_CEN9211_h */
 
 /* END OF FILE */
-
-
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/nsc/panel/dora9211.c b/xc/programs/Xserver/hw/xfree86/drivers/nsc/panel/dora9211.c
new file mode 100644
index 000000000..2ace0c20a
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/panel/dora9211.c
@@ -0,0 +1,713 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/panel/dora9211.c,v 1.1 2002/12/10 15:12:28 alanh Exp $ */
+/*
+ * $Workfile: dora9211.c $
+ * $Revision: 1.2.2.1 $
+ *
+ * File Contents: This file contains the panel functions to interface 
+ *                the dorado platform.
+ *
+ * SubModule:     Geode FlatPanel library
+ *
+ */
+
+/* 
+ * NSC_LIC_ALTERNATIVE_PREAMBLE
+ *
+ * Revision 1.0
+ *
+ * National Semiconductor Alternative GPL-BSD License
+ *
+ * National Semiconductor Corporation licenses this software 
+ * ("Software"):
+ *
+ * Panel Library
+ *
+ * under one of the two following licenses, depending on how the 
+ * Software is received by the Licensee.
+ * 
+ * If this Software is received as part of the Linux Framebuffer or
+ * other GPL licensed software, then the GPL license designated 
+ * NSC_LIC_GPL applies to this Software; in all other circumstances 
+ * then the BSD-style license designated NSC_LIC_BSD shall apply.
+ *
+ * END_NSC_LIC_ALTERNATIVE_PREAMBLE */
+
+/* NSC_LIC_BSD
+ *
+ * National Semiconductor Corporation Open Source License for 
+ *
+ * Panel Library
+ *
+ * (BSD License with Export Notice)
+ *
+ * Copyright (c) 1999-2001
+ * National Semiconductor Corporation.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met: 
+ *
+ *   * Redistributions of source code must retain the above copyright 
+ *     notice, this list of conditions and the following disclaimer. 
+ *
+ *   * Redistributions in binary form must reproduce the above 
+ *     copyright notice, this list of conditions and the following 
+ *     disclaimer in the documentation and/or other materials provided 
+ *     with the distribution. 
+ *
+ *   * Neither the name of the National Semiconductor Corporation nor 
+ *     the names of its contributors may be used to endorse or promote 
+ *     products derived from this software without specific prior 
+ *     written permission. 
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+ * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE,
+ * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE.
+ *
+ * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
+ * YOUR JURISDICTION. It is licensee's responsibility to comply with 
+ * any export regulations applicable in licensee's jurisdiction. Under 
+ * CURRENT (2001) U.S. export regulations this software 
+ * is eligible for export from the U.S. and can be downloaded by or 
+ * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
+ * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
+ * Syria, Sudan, Afghanistan and any other country to which the U.S. 
+ * has embargoed goods and services. 
+ *
+ * END_NSC_LIC_BSD */
+
+/* NSC_LIC_GPL
+ *
+ * National Semiconductor Corporation Gnu General Public License for 
+ *
+ * Panel Library
+ *
+ * (GPL License with Export Notice)
+ *
+ * Copyright (c) 1999-2001
+ * National Semiconductor Corporation.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted under the terms of the GNU General 
+ * Public License as published by the Free Software Foundation; either 
+ * version 2 of the License, or (at your option) any later version  
+ *
+ * In addition to the terms of the GNU General Public License, neither 
+ * the name of the National Semiconductor Corporation nor the names of 
+ * its contributors may be used to endorse or promote products derived 
+ * from this software without specific prior written permission. 
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+ * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, 
+ * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE. See the GNU General Public License for more details. 
+ *
+ * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
+ * YOUR JURISDICTION. It is licensee's responsibility to comply with 
+ * any export regulations applicable in licensee's jurisdiction. Under 
+ * CURRENT (2001) U.S. export regulations this software 
+ * is eligible for export from the U.S. and can be downloaded by or 
+ * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
+ * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
+ * Syria, Sudan, Afghanistan and any other country to which the U.S. 
+ * has embargoed goods and services. 
+ *
+ * You should have received a copy of the GNU General Public License 
+ * along with this file; if not, write to the Free Software Foundation, 
+ * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 
+ *
+ * END_NSC_LIC_GPL */
+
+#include "dora9211.h"
+
+void
+Dorado_Get_9211_Details(unsigned long flags, PPnl_PanelParams pParam)
+{
+   unsigned long DPanelType;
+   int i;
+
+   for (i = 0; i < 0x7fff; i++) {
+   }
+
+   Dorado9211GpioInit();
+
+   for (i = 0; i < 5; i++)
+      toggle_Centaurus_9211_clock();
+
+   if (flags & PNL_PANELCHIP) {
+      DPanelType = Dorado9211ReadReg(0x430);
+
+      if ((DPanelType & 0xFFFF0000) == 0x92110000) {	/* found 9211 */
+	 /* check the values for revision ID */
+	 if (DPanelType >= 0x92110301)
+	    pParam->PanelChip = PNL_9211_C;
+	 else if ((DPanelType >= 0x92110101) && (DPanelType < 0x92110301))
+	    pParam->PanelChip = PNL_9211_A;
+	 else
+	    pParam->PanelChip = PNL_UNKNOWN_CHIP;
+      } else {				/* no 9211 present */
+	 pParam->PanelChip = PNL_UNKNOWN_CHIP;
+      }
+   }
+
+   if ((pParam->PanelChip != PNL_UNKNOWN_CHIP) && (flags & PNL_PANELSTAT)) {
+      unsigned long PanelTypeOrg;
+      unsigned char Panel_2Byte;
+
+      DPanelType = Dorado9211ReadReg(0x438);
+      DPanelType &= 0x00e8e8e8;
+      DPanelType |= 0x00170000;
+      Dorado9211WriteReg(0x438, DPanelType);
+      DPanelType = 0;
+
+      DPanelType = Dorado9211ReadReg(0x434);
+      DPanelType = (DPanelType >> (DRD_LCDRESGPIO1 + 1));
+      PanelTypeOrg = DPanelType >> 8;
+      Panel_2Byte = (unsigned char)PanelTypeOrg;
+      Panel_2Byte = (Panel_2Byte >> (DRD_LCDRESGPIO2 - DRD_LCDRESGPIO1 - 1));
+      DPanelType = (DPanelType | ((unsigned int)Panel_2Byte << 8));
+      DPanelType = DPanelType >> 1;
+      PanelTypeOrg = DPanelType >> 8;
+      Panel_2Byte = (unsigned char)PanelTypeOrg;
+      Panel_2Byte = (Panel_2Byte >> (DRD_LCDRESGPIO3 - DRD_LCDRESGPIO2 - 1));
+      DPanelType = (DPanelType | ((unsigned int)Panel_2Byte << 8));
+      DPanelType = DPanelType >> 1;
+      PanelTypeOrg = DPanelType >> 8;
+      Panel_2Byte = (unsigned char)PanelTypeOrg;
+      Panel_2Byte = (Panel_2Byte >> (DRD_LCDRESGPIO4 - DRD_LCDRESGPIO3 - 1));
+      DPanelType = (DPanelType | ((unsigned int)Panel_2Byte << 8));
+      DPanelType = DPanelType >> 5;
+      DPanelType &= 0xf;
+
+      switch (DPanelType) {
+      case 8:
+	 pParam->PanelStat.XRes = 800;
+	 pParam->PanelStat.YRes = 600;
+	 pParam->PanelStat.Depth = 18;
+	 pParam->PanelStat.MonoColor = PNL_COLOR_PANEL;
+	 pParam->PanelStat.Type = PNL_TFT;
+	 break;
+
+      case 9:
+	 pParam->PanelStat.XRes = 640;
+	 pParam->PanelStat.YRes = 480;
+	 pParam->PanelStat.Depth = 8;
+	 pParam->PanelStat.MonoColor = PNL_COLOR_PANEL;
+	 pParam->PanelStat.Type = PNL_SSTN;
+	 break;
+
+      case 10:
+	 pParam->PanelStat.XRes = 1024;
+	 pParam->PanelStat.YRes = 768;
+	 pParam->PanelStat.Depth = 18;
+	 pParam->PanelStat.MonoColor = PNL_COLOR_PANEL;
+	 pParam->PanelStat.Type = PNL_TFT;
+	 break;
+      case 0:
+      case 1:
+      case 2:
+      case 3:
+      case 4:
+      case 5:
+      case 6:
+      case 7:
+      case 11:
+	 pParam->PanelStat.XRes = 640;
+	 pParam->PanelStat.YRes = 480;
+	 pParam->PanelStat.Depth = 16;
+	 pParam->PanelStat.MonoColor = PNL_COLOR_PANEL;
+	 pParam->PanelStat.Type = PNL_DSTN;
+	 break;
+      case 12:
+	 pParam->PanelStat.XRes = 640;
+	 pParam->PanelStat.YRes = 480;
+	 pParam->PanelStat.Depth = 18;
+	 pParam->PanelStat.MonoColor = PNL_COLOR_PANEL;
+	 pParam->PanelStat.Type = PNL_TFT;
+	 break;
+      case 13:
+	 pParam->PanelStat.XRes = 1024;
+	 pParam->PanelStat.YRes = 768;
+	 pParam->PanelStat.Depth = 24;
+	 pParam->PanelStat.MonoColor = PNL_COLOR_PANEL;
+	 pParam->PanelStat.Type = PNL_DSTN;
+	 break;
+      case 14:
+	 pParam->PanelStat.XRes = 640;
+	 pParam->PanelStat.YRes = 480;
+	 pParam->PanelStat.Depth = 8;
+	 pParam->PanelStat.MonoColor = PNL_MONO_PANEL;
+	 pParam->PanelStat.Type = PNL_DSTN;
+	 break;
+      case 15:
+	 pParam->PanelStat.XRes = 800;
+	 pParam->PanelStat.YRes = 600;
+	 pParam->PanelStat.Depth = 16;
+	 pParam->PanelStat.MonoColor = PNL_COLOR_PANEL;
+	 pParam->PanelStat.Type = PNL_DSTN;
+	 break;
+      default:
+	 break;
+      }
+   }
+   /* if block end */
+}
+
+void
+Dorado9211Init(Pnl_PanelStat * pstat)
+{
+   int mode;
+   unsigned long orig_value, pm_value;
+
+   gfx_delay_milliseconds(100);
+   Dorado9211GpioInit();
+
+   Dorado9211ToggleClock();
+   Dorado9211ToggleClock();
+   Dorado9211ToggleClock();
+   Dorado9211ToggleClock();
+   Dorado9211ToggleClock();
+
+   gfx_delay_milliseconds(100);
+
+   Dorado9211ToggleClock();
+   Dorado9211ToggleClock();
+   Dorado9211ToggleClock();
+   Dorado9211ToggleClock();
+   Dorado9211ToggleClock();
+
+   Dorado9211WriteReg(CS92xx_LCD_PWR_MAN, 0x0);
+
+   gfx_delay_milliseconds(100);
+   gfx_delay_milliseconds(100);
+
+   /* LOOP THROUGH THE AVAILABLE MODES TO FIND A MATCH */
+   for (mode = 0; mode < NUM_92XX_MODES; mode++) {
+      if ((FPModeParams[mode].xres == pstat->XRes) &&
+	  (FPModeParams[mode].yres == pstat->YRes) &&
+	  (FPModeParams[mode].bpp == pstat->Depth) &&
+	  (FPModeParams[mode].panel_type == pstat->Type) &&
+	  (FPModeParams[mode].color_type == pstat->MonoColor)) {
+
+	 /* SET THE 92xx FOR THE SELECTED MODE */
+	 CS92xx_MODE *pMode = &FPModeParams[mode];
+
+	 Dorado9211WriteReg(CS92xx_LCD_PAN_TIMING1, pMode->panel_timing1);
+	 Dorado9211WriteReg(CS92xx_LCD_PAN_TIMING2, pMode->panel_timing2);
+	 Dorado9211WriteReg(CS92xx_LCD_DITH_FR_CNTRL,
+			    pMode->rev_C_dither_frc);
+	 Dorado9211WriteReg(CS92xx_BLUE_LSFR_SEED, pMode->blue_lsfr_seed);
+	 Dorado9211WriteReg(CS92xx_RED_GREEN_LSFR_SEED,
+			    pMode->red_green_lsfr_seed);
+	 DoradoProgramFRMload();
+	 Dorado9211WriteReg(CS92xx_LCD_MEM_CNTRL, pMode->memory_control);
+	 Dorado9211WriteReg(CS92xx_LCD_PWR_MAN, pMode->power_management);
+	 gfx_delay_milliseconds(100);
+	 gfx_delay_milliseconds(100);
+	 Dorado9211ClearCS();
+
+	 /* This code is added to take care of Panel initialization.
+	  * Irrespective of Xpressrom is enabling the panel or not. 
+	  */
+	 orig_value = READ_VID32(0X04);
+	 WRITE_VID32(0x04, 0x00200141);
+	 gfx_delay_milliseconds(21);
+	 pm_value = gfx_ind(0x9030);
+
+	 pm_value |= 0x400;
+	 gfx_outd(0x9030, pm_value);
+	 gfx_delay_milliseconds(4);
+	 orig_value &= 0xfff1ffff;
+	 WRITE_VID32(0X4, orig_value);
+	 return;
+      }					/*end if() */
+   }					/*end for() */
+
+}
+
+void
+Dorado9211SetCS(void)
+{
+   unsigned long value;
+
+   value = gfx_ind(DRD_CSP9211IN);
+   gfx_outd(DRD_CSP9211OUT, value | DRD_CS9211);
+}
+
+void
+Dorado9211ClearCS(void)
+{
+   unsigned long value;
+
+   value = gfx_ind(DRD_CSP9211IN);
+   gfx_outd(DRD_CSP9211OUT, value & (~DRD_CS9211));
+}
+
+void
+Dorado9211SetDataOut(void)
+{
+   unsigned long value;
+
+   value = gfx_ind(DRD_DATAOUTP9211IN);
+   gfx_outd(DRD_DATAOUTP9211OUT, value | DRD_DATAIN9211);
+}
+
+void
+Dorado9211ClearDataOut(void)
+{
+   unsigned long value;
+
+   value = gfx_ind(DRD_DATAOUTP9211IN);
+   gfx_outd(DRD_DATAOUTP9211OUT, value & (~DRD_DATAIN9211));
+}
+
+unsigned char
+Dorado9211ReadDataIn(void)
+{
+   unsigned char readdata = 0;
+   unsigned long value;
+
+   /* why to read 4 times ??? */
+   value = gfx_ind(DRD_DATAINP9211IN);
+   value = gfx_ind(DRD_DATAINP9211IN);
+   value = gfx_ind(DRD_DATAINP9211IN);
+   value = gfx_ind(DRD_DATAINP9211IN);
+   if (value & DRD_DATAOUT9211)
+      readdata = 1;
+   return (readdata);
+}
+
+void
+Dorado9211ToggleClock(void)
+{
+   Dorado9211SetClock();
+   Dorado9211ClearClock();
+}
+
+void
+Dorado9211SetClock(void)
+{
+   unsigned long value;
+
+   value = gfx_ind(DRD_CLOCKP9211IN);
+   gfx_outd(DRD_CLOCKP9211OUT, value | DRD_CLOCK9211);
+}
+
+void
+Dorado9211ClearClock(void)
+{
+   unsigned long value;
+
+   value = gfx_ind(DRD_CLOCKP9211IN);
+   gfx_outd(DRD_CLOCKP9211OUT, value & (~DRD_CLOCK9211));
+}
+
+void
+Dorado9211GpioInit(void)
+{
+   unsigned long value;
+
+   /* set output enable on gpio 7, 9, 11 */
+   gfx_outd((DRD_GEODE_GPIO_BASE + DRD_GEODE_GPPIN_SEL), DRD_CLOCK9211CFG);
+   gfx_outd((DRD_GEODE_GPIO_BASE + DRD_GEODE_GPPIN_CFG), 3);
+   /* set output enable on gpio 7, 9, 11 */
+   gfx_outd((DRD_GEODE_GPIO_BASE + DRD_GEODE_GPPIN_SEL), DRD_CS9211CFG);
+   gfx_outd((DRD_GEODE_GPIO_BASE + DRD_GEODE_GPPIN_CFG), 3);
+   /* set output enable on gpio 7, 9, 18 */
+   gfx_outd((DRD_GEODE_GPIO_BASE + DRD_GEODE_GPPIN_SEL), DRD_DATAIN9211CFG);
+   gfx_outd((DRD_GEODE_GPIO_BASE + DRD_GEODE_GPPIN_CFG), 3);
+   /* disable on gpio 11 - This is the output from the 9211 */
+   gfx_outd((DRD_GEODE_GPIO_BASE + DRD_GEODE_GPPIN_SEL), DRD_DATAOUT9211CFG);
+   gfx_outd((DRD_GEODE_GPIO_BASE + DRD_GEODE_GPPIN_CFG), 0);
+   /* Set all PINS low */
+   value = gfx_ind(DRD_GEODE_GPIO_BASE + DRD_GEODE_GPDI0);
+   value &= ~(DRD_CS9211 | DRD_CLOCK9211 | DRD_DATAIN9211);
+   gfx_outd((DRD_GEODE_GPIO_BASE + DRD_GEODE_GPDO0), value);
+}
+
+unsigned long
+Dorado9211ReadReg(unsigned short index)
+{
+
+   unsigned char i, readbit;
+   unsigned long data;
+
+   Dorado9211ClearDataOut();
+
+   Dorado9211SetCS();
+   Dorado9211ToggleClock();
+
+   Dorado9211SetDataOut();
+   Dorado9211ToggleClock();
+
+   for (i = 0; i < 12; i++) {
+      if (index & 0x1) {
+	 Dorado9211SetDataOut();
+      } else {
+	 Dorado9211ClearDataOut();
+      }
+      Dorado9211ToggleClock();
+      index >>= 1;
+   }
+
+   Dorado9211ClearDataOut();
+   Dorado9211ToggleClock();
+
+   /* Idle clock, 7 clocks, no data set */
+
+   Dorado9211ToggleClock();
+   Dorado9211ToggleClock();
+   Dorado9211ToggleClock();
+   Dorado9211ToggleClock();
+   Dorado9211ToggleClock();
+   Dorado9211ToggleClock();
+   Dorado9211ToggleClock();
+
+   data = 0;
+   for (i = 0; i < 32; i++) {
+      Dorado9211ToggleClock();
+      readbit = Dorado9211ReadDataIn();
+      data |= (((unsigned long)readbit) << i);
+   }
+
+   Dorado9211ClearCS();
+   Dorado9211ToggleClock();
+   return (data);
+
+}
+
+void
+Dorado9211WriteReg(unsigned short index, unsigned long data)
+{
+
+   unsigned char i;
+
+   Dorado9211ClearDataOut();
+   Dorado9211SetDataOut();
+   Dorado9211SetCS();
+   Dorado9211ToggleClock();
+   Dorado9211SetDataOut();
+   Dorado9211ToggleClock();
+
+   for (i = 0; i < 12; i++) {
+      if (index & 0x1) {
+	 Dorado9211SetDataOut();
+      } else {
+	 Dorado9211ClearDataOut();
+      }
+      Dorado9211ToggleClock();
+      index >>= 1;
+   }
+
+   Dorado9211SetDataOut();
+   Dorado9211ToggleClock();
+
+   for (i = 0; i < 32; i++) {
+      if (data & 0x1) {
+	 Dorado9211SetDataOut();
+      } else {
+	 Dorado9211ClearDataOut();
+      }
+      Dorado9211ToggleClock();
+      data >>= 1;
+   }
+
+   Dorado9211ClearCS();
+
+   Dorado9211ToggleClock();
+   Dorado9211ToggleClock();
+   Dorado9211ToggleClock();
+   Dorado9211ToggleClock();
+}
+
+void
+DoradoProgramFRMload(void)
+{
+   unsigned long DoradoFRMtable[] = {
+
+      0x00000000,
+      0x00000000,
+      0x01000100,
+      0x01000100,
+      0x01010101,
+      0x01010101,
+      0x02081041,
+      0x02081041,
+      0x10111111,
+      0x11111101,
+      0x49249241,
+      0x12412492,
+      0x92244891,
+      0x92244891,
+      0x22252525,
+      0x22252525,
+      0x528294a5,
+      0x2528494a,
+      0x294a5295,
+      0x294a5295,
+      0x54a54a95,
+      0x2952a52a,
+      0x2a552a55,
+      0x2a552a55,
+      0x554aa955,
+      0x2a9552aa,
+      0x2aaa5555,
+      0x2aaa5555,
+      0x55555555,
+      0x2aaaaaaa,
+      0x55555555,
+      0x55555555,
+      0xaaaaaaab,
+      0x55555555,
+      0x5555aaab,
+      0x5555aaab,
+      0xaab556ab,
+      0x556aad55,
+      0x55ab55ab,
+      0x55ab55ab,
+      0xab5ab56b,
+      0x56ad5ad5,
+      0x56b5ad6b,
+      0x56b5ad6b,
+      0xad6d6b5b,
+      0x5ad6b6b6,
+      0x5b5b5b5b,
+      0x5b5b5b5b,
+      0x5F6db6db,
+      0x5F6db6db,
+      0xF776F776,
+      0xF776F776,
+      0xFBDEFBDE,
+      0xFBDEFBDE,
+      0x7eFFBFF7,
+      0x7eFFBFF7,
+      0xFF7FF7F7,
+      0xFF7FF7F7,
+      0xFF7FFF7F,
+      0xFF7FFF7F,
+      0xFFF7FFFF,
+      0xFFF7FFFF,
+      0xFFFFFFFF,
+      0xFFFFFFFF,
+   };
+
+   unsigned char i;
+   unsigned short index;
+   unsigned long data;
+
+   Dorado9211WriteReg(CS92xx_FRM_MEMORY_INDEX, 0);
+   index = CS92xx_FRM_MEMORY_DATA;
+   for (i = 0; i < 64; i += 2) {
+      data = DoradoFRMtable[i];
+      Dorado9211WriteReg(index, data);
+      data = DoradoFRMtable[i + 1];
+      Dorado9211WriteReg(index, data);
+   }
+
+/*
+ * The first FRM location (64 bits) does not program correctly.
+ * This location always reads back with the last value programmed.
+ * ie. If 32 64-bit values are programmed, location 0 reads back as the 32nd
+ * If 30 locations are programmed, location 0 reads back as the 30th, etc.
+ * Fix this by re-writing location 0 after programming all 64 in the writeFRM 
+ * loop in RevCFrmload() in CS9211.
+ */
+
+   Dorado9211WriteReg(CS92xx_FRM_MEMORY_INDEX, 0);
+   Dorado9211WriteReg(CS92xx_FRM_MEMORY_DATA, 0);
+   Dorado9211WriteReg(CS92xx_FRM_MEMORY_DATA, 0);
+
+}
+
+/******************************************************************************
+ * void Dorado_Enable_Power((void);
+ * Enables the power of the CX9211 on Dorado board.
+ ******************************************************************************
+ */
+
+void
+Dorado_Power_Up(void)
+{
+   Dorado9211WriteReg(CS92xx_LCD_PWR_MAN, 0x01000000);
+   return;
+
+}					/* disable_Centaurus_Power */
+
+/******************************************************************************
+ * void Dorado_Disable_Power((void);
+ * Disables the power of the CX9211 on Dorado board.
+ *****************************************************************************
+ */
+
+void
+Dorado_Power_Down(void)
+{
+   Dorado9211WriteReg(CS92xx_LCD_PWR_MAN, 0x0);
+   return;
+
+}					/* disable_Centaurus_Power */
+
+void
+Dorado_Save_Panel_State(void)
+{
+
+   /* set 9211 registers using the desired panel settings     */
+   cs9211_regs.panel_timing1 = Dorado9211ReadReg(CS92xx_LCD_PAN_TIMING1);
+   cs9211_regs.panel_timing2 = Dorado9211ReadReg(CS92xx_LCD_PAN_TIMING2);
+
+   cs9211_regs.dither_frc_ctrl = Dorado9211ReadReg(CS92xx_LCD_DITH_FR_CNTRL);
+   cs9211_regs.blue_lsfr_seed = Dorado9211ReadReg(CS92xx_BLUE_LSFR_SEED);
+   cs9211_regs.red_green_lsfr_seed =
+	 Dorado9211ReadReg(CS92xx_RED_GREEN_LSFR_SEED);
+
+   /* CentaurusProgramFRMload(); */
+   cs9211_regs.memory_control = Dorado9211ReadReg(CS92xx_LCD_MEM_CNTRL);
+
+   /* Set the power register last. This will turn the panel on at the 9211. */
+   cs9211_regs.power_management = Dorado9211ReadReg(CS92xx_LCD_PWR_MAN);
+   cs9211_regs.panel_state = cs9211_regs.power_management;
+}
+
+void
+Dorado_Restore_Panel_State(void)
+{
+   unsigned long off_data = 0;
+
+   /* Before restoring the 9211 registers, power off the 9211. */
+
+   Dorado9211WriteReg(CS92xx_LCD_PWR_MAN, off_data);
+
+   /* set 9211 registers using the desired panel settings    */
+   Dorado9211WriteReg(CS92xx_LCD_PAN_TIMING1, cs9211_regs.panel_timing1);
+   Dorado9211WriteReg(CS92xx_LCD_PAN_TIMING2, cs9211_regs.panel_timing2);
+   /* load the LSFR seeds */
+   Dorado9211WriteReg(CS92xx_LCD_DITH_FR_CNTRL, cs9211_regs.dither_frc_ctrl);
+   Dorado9211WriteReg(CS92xx_BLUE_LSFR_SEED, cs9211_regs.blue_lsfr_seed);
+   Dorado9211WriteReg(CS92xx_RED_GREEN_LSFR_SEED,
+		      cs9211_regs.red_green_lsfr_seed);
+
+   Dorado9211WriteReg(CS92xx_LCD_MEM_CNTRL, cs9211_regs.memory_control);
+   /* Set the power register last. This will turn the panel on at the 9211. */
+   Dorado9211WriteReg(CS92xx_LCD_PWR_MAN, cs9211_regs.power_management);
+}
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/panel/dora9211.h b/xc/programs/Xserver/hw/xfree86/drivers/nsc/panel/dora9211.h
index 60e969142..ba6b01e00 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/panel/dora9211.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/panel/dora9211.h
@@ -1,7 +1,7 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/panel/dora9211.h,v 1.1 2002/10/11 14:33:02 alanh Exp $ */ 
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/panel/dora9211.h,v 1.1 2002/12/10 15:12:28 alanh Exp $ */
 /*
  * $Workfile: dora9211.h $
- * $Revision: 1.1.1.1 $
+ * $Revision: 1.2.2.1 $
  *
  * File Contents: This header file defines the Durango routines and 
  *                variables used to access the memory mapped regions.
@@ -133,7 +133,6 @@
  * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 
  *
  * END_NSC_LIC_GPL */
-  
 
 #include "panel.h"
 #include "92xx.h"
@@ -146,7 +145,7 @@
 /* GPIO Pin Configuration Registers */
 
 #define DRD_GEODE_GPPIN_SEL	0x20	/* GPIO Pin Configuration Select */
-#define DRD_GEODE_GPPIN_CFG	0x24 	/* GPIO Pin Configuration Access */
+#define DRD_GEODE_GPPIN_CFG	0x24	/* GPIO Pin Configuration Access */
 #define DRD_GEODE_GPPIN_RESET	0x28	/* GPIO Pin Reset */
 
 #define DRD_GEODE_GPIO_BASE	0x6400	/* F0 GPIO, IO mapped */
@@ -198,6 +197,7 @@ void Dorado_Get_9211_Details(unsigned long flags, PPnl_PanelParams pParam);
 void Dorado_Power_Up(void);
 void Dorado_Power_Down(void);
 void Dorado_Save_Panel_State(void);
-void Dorado_Restore_Panel_State(void); 
+void Dorado_Restore_Panel_State(void);
+void Dorado9211Init(Pnl_PanelStat * pstat);
 
 #endif /* !_DORA9211_h */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/nsc/panel/drac9210.c b/xc/programs/Xserver/hw/xfree86/drivers/nsc/panel/drac9210.c
new file mode 100644
index 000000000..1623b7e9f
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/panel/drac9210.c
@@ -0,0 +1,820 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/panel/drac9210.c,v 1.2 2003/01/14 09:34:35 alanh Exp $ */
+/*
+ * $Workfile: drac9210.c $
+ * $Revision: 1.2.2.1 $
+ *
+ * File Contents: This file contains the panel library files to the 
+ *                platforms with 9210, and 9211 support.
+ *
+ * SubModule:     Geode FlatPanel library
+ *
+ */
+
+/* 
+ * NSC_LIC_ALTERNATIVE_PREAMBLE
+ *
+ * Revision 1.0
+ *
+ * National Semiconductor Alternative GPL-BSD License
+ *
+ * National Semiconductor Corporation licenses this software 
+ * ("Software"):
+ *
+ * Panel Library
+ *
+ * under one of the two following licenses, depending on how the 
+ * Software is received by the Licensee.
+ * 
+ * If this Software is received as part of the Linux Framebuffer or
+ * other GPL licensed software, then the GPL license designated 
+ * NSC_LIC_GPL applies to this Software; in all other circumstances 
+ * then the BSD-style license designated NSC_LIC_BSD shall apply.
+ *
+ * END_NSC_LIC_ALTERNATIVE_PREAMBLE */
+
+/* NSC_LIC_BSD
+ *
+ * National Semiconductor Corporation Open Source License for 
+ *
+ * Panel Library
+ *
+ * (BSD License with Export Notice)
+ *
+ * Copyright (c) 1999-2001
+ * National Semiconductor Corporation.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met: 
+ *
+ *   * Redistributions of source code must retain the above copyright 
+ *     notice, this list of conditions and the following disclaimer. 
+ *
+ *   * Redistributions in binary form must reproduce the above 
+ *     copyright notice, this list of conditions and the following 
+ *     disclaimer in the documentation and/or other materials provided 
+ *     with the distribution. 
+ *
+ *   * Neither the name of the National Semiconductor Corporation nor 
+ *     the names of its contributors may be used to endorse or promote 
+ *     products derived from this software without specific prior 
+ *     written permission. 
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+ * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE,
+ * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE.
+ *
+ * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
+ * YOUR JURISDICTION. It is licensee's responsibility to comply with 
+ * any export regulations applicable in licensee's jurisdiction. Under 
+ * CURRENT (2001) U.S. export regulations this software 
+ * is eligible for export from the U.S. and can be downloaded by or 
+ * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
+ * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
+ * Syria, Sudan, Afghanistan and any other country to which the U.S. 
+ * has embargoed goods and services. 
+ *
+ * END_NSC_LIC_BSD */
+
+/* NSC_LIC_GPL
+ *
+ * National Semiconductor Corporation Gnu General Public License for 
+ *
+ * Panel Library
+ *
+ * (GPL License with Export Notice)
+ *
+ * Copyright (c) 1999-2001
+ * National Semiconductor Corporation.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted under the terms of the GNU General 
+ * Public License as published by the Free Software Foundation; either 
+ * version 2 of the License, or (at your option) any later version  
+ *
+ * In addition to the terms of the GNU General Public License, neither 
+ * the name of the National Semiconductor Corporation nor the names of 
+ * its contributors may be used to endorse or promote products derived 
+ * from this software without specific prior written permission. 
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+ * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, 
+ * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE. See the GNU General Public License for more details. 
+ *
+ * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
+ * YOUR JURISDICTION. It is licensee's responsibility to comply with 
+ * any export regulations applicable in licensee's jurisdiction. Under 
+ * CURRENT (2001) U.S. export regulations this software 
+ * is eligible for export from the U.S. and can be downloaded by or 
+ * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
+ * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
+ * Syria, Sudan, Afghanistan and any other country to which the U.S. 
+ * has embargoed goods and services. 
+ *
+ * You should have received a copy of the GNU General Public License 
+ * along with this file; if not, write to the Free Software Foundation, 
+ * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 
+ *
+ * END_NSC_LIC_GPL */
+
+#include "drac9210.h"
+
+#define	CS9210			0x40	/* Chip select pin */
+
+/* 9210 on Draco */
+#define CLOCK9210		0x04	/* Clock pin */
+#define	DATAIN9210		0x20	/* Data from 9210 */
+#define	DATAOUT9210		0x80	/* Data to 9210 */
+
+static void DracoWriteData(unsigned char data);
+static void DracoReadData(unsigned char *data);
+static void Draco9210GpioInit();
+static void Draco9210SetCS(void);
+static unsigned char Draco9210ReadReg(unsigned char index);
+static void Draco9210WriteReg(unsigned char index, unsigned char data);
+static void Draco9210ClearCS(void);
+static void Draco9210SetDataOut(void);
+static void Draco9210ClearDataOut(void);
+static unsigned char Draco9210ReadDataIn(void);
+static void Draco9210ToggleClock(void);
+
+void
+Draco9210Init(Pnl_PanelStat * pstat)
+{
+   unsigned char panelvalues[] = {
+      0x2, 0x80,
+      0x2, 0x24,
+      0x03, 0x00,
+      0xc0, 0x00,
+      0xc1, 0x00,
+      0xc2, 0x00,
+      0xc3, 0x00,
+      0xc4, 0x00,
+      0xc5, 0x01,
+      0xc6, 0xff,
+      0xc7, 0xff,
+      0xc8, 0x3,
+      0xc9, 0xfe,
+      0xca, 0x0,
+      0xcb, 0x3f,
+      0xcc, 0xc,
+      0xcd, 0x1,
+      0xce, 0xff,
+      0xcf, 0xc1,
+      0xd0, 0x0,
+      0xd1, 0x7e,
+      0xd2, 0x3,
+      0xd3, 0xfe,
+      0xd4, 0x3,
+      0xd5, 0x81,
+      0xd6, 0xfc,
+      0xd7, 0x3f,
+      0xd8, 0x14,
+      0xd9, 0x1e,
+      0xda, 0x0f,
+      0xdb, 0xc7,
+      0xdc, 0x29,
+      0xdd, 0xe1,
+      0xde, 0xf1,
+      0xdf, 0xf9,
+      0xe0, 0x2,
+      0xe1, 0xe,
+      0xe2, 0x1e,
+      0xe3, 0x3e,
+      0xe4, 0x04,
+      0xe5, 0x71,
+      0xe6, 0xe3,
+      0xe7, 0xcf,
+      0xe8, 0x1,
+      0xe9, 0x86,
+      0xea, 0x3c,
+      0xeb, 0xf3,
+      0xec, 0xa,
+      0xed, 0x39,
+      0xee, 0xc7,
+      0xef, 0x3d,
+
+      0xf0, 0x14,
+      0xf1, 0xc6,
+      0xf2, 0x39,
+      0xf3, 0xce,
+      0xf4, 0x3,
+      0xf5, 0x19,
+      0xf6, 0xce,
+      0xf7, 0x77,
+      0xf8, 0x0,
+      0xf9, 0x66,
+      0xfa, 0x33,
+      0xfb, 0xbb,
+      0xfc, 0x2d,
+      0xfd, 0x99,
+      0xfe, 0xdd,
+      0xff, 0xdd,
+
+      0x3, 0x1,
+      0xc0, 0x2,
+      0xc1, 0x22,
+      0xc2, 0x66,
+      0xc3, 0x66,
+      0xc4, 0x0,
+      0xc5, 0xcd,
+      0xc6, 0x99,
+      0xc7, 0xbb,
+      0xc8, 0x5,
+      0xc9, 0x32,
+      0xca, 0x66,
+      0xcb, 0xdd,
+      0xcc, 0x1a,
+      0xcd, 0x4d,
+      0xce, 0x9b,
+      0xcf, 0x6f,
+      0xd0, 0x0,
+      0xd1, 0x92,
+      0xd2, 0x6d,
+      0xd3, 0xb6,
+      0xd4, 0x5,
+      0xd5, 0x25,
+      0xd6, 0xb6,
+      0xd7, 0xdb,
+      0xd8, 0x2,
+      0xd9, 0x5a,
+      0xda, 0x4b,
+      0xdb, 0x6d,
+      0xdc, 0x29,
+      0xdd, 0xa5,
+      0xde, 0xb5,
+      0xdf, 0xb7,
+      0xe0, 0x4,
+      0xe1, 0x4a,
+      0xe2, 0x5a,
+      0xe3, 0xda,
+      0xe4, 0x12,
+      0xe5, 0x95,
+      0xe6, 0xad,
+      0xe7, 0x6f,
+      0xe8, 0x1,
+      0xe9, 0x2a,
+      0xea, 0x56,
+      0xeb, 0xb5,
+      0xec, 0xe,
+      0xed, 0x55,
+      0xee, 0xab,
+      0xef, 0x5f,
+      0xf0, 0x0,
+      0xf1, 0xaa,
+      0xf2, 0x55,
+      0xf3, 0xea,
+      0xf4, 0x1,
+      0xf5, 0x55,
+      0xf6, 0xaa,
+      0xf7, 0xbf,
+      0xf8, 0x6,
+      0xf9, 0xaa,
+      0xfa, 0x55,
+      0xfb, 0x55,
+      0xfc, 0x39,
+      0xfd, 0x55,
+      0xfe, 0xff,
+      0xff, 0xff,
+
+      0x3, 0x2,
+      0xc0, 0x0,
+      0xc1, 0x0,
+      0xc2, 0xaa,
+      0xc3, 0xaa,
+      0xc4, 0x6,
+      0xc5, 0xab,
+      0xc6, 0x55,
+      0xc7, 0x55,
+      0xc8, 0x01,
+      0xc9, 0x54,
+      0xca, 0xaa,
+      0xcb, 0xbf,
+      0xcc, 0x8,
+      0xcd, 0xab,
+      0xce, 0x55,
+      0xcf, 0xeb,
+      0xd0, 0x6,
+      0xd1, 0x54,
+      0xd2, 0xab,
+      0xd3, 0x5e,
+      0xd4, 0x1,
+      0xd5, 0x2b,
+      0xd6, 0x56,
+      0xd7, 0xb5,
+      0xd8, 0x12,
+      0xd9, 0x94,
+      0xda, 0xad,
+      0xdb, 0x6f,
+      0xdc, 0x2d,
+      0xdd, 0x4b,
+      0xde, 0x5b,
+      0xdf, 0xdb,
+      0xe0, 0x0,
+      0xe1, 0xa4,
+      0xe2, 0xb4,
+      0xe3, 0xb6,
+      0xe4, 0x2,
+      0xe5, 0x5b,
+      0xe6, 0x4b,
+      0xe7, 0x6d,
+      0xe8, 0x5,
+      0xe9, 0x24,
+      0xea, 0xb6,
+      0xeb, 0xdb,
+      0xec, 0x8,
+      0xed, 0x93,
+      0xee, 0x6d,
+      0xef, 0xb7,
+      0xf0, 0x12,
+      0xf1, 0x4c,
+      0xf2, 0x9b,
+      0xf3, 0x6e,
+      0xf4, 0x5,
+      0xf5, 0x33,
+      0xf6, 0x66,
+      0xf7, 0xdd,
+      0xf8, 0x0,
+      0xf9, 0xcc,
+      0xfa, 0x99,
+      0xfb, 0xbb,
+      0xfc, 0x2b,
+      0xfd, 0x33,
+      0xfe, 0x77,
+      0xff, 0x77,
+
+      0x3, 0x3,
+      0xc0, 0x4,
+      0xc1, 0x88,
+      0xc2, 0xcc,
+      0xc3, 0xcc,
+      0xc4, 0x0,
+      0xc5, 0x67,
+      0xc6, 0x33,
+      0xc7, 0xbb,
+      0xc8, 0x3,
+      0xc9, 0x18,
+      0xca, 0xce,
+      0xcb, 0x77,
+      0xcc, 0x1c,
+      0xcd, 0xc7,
+      0xce, 0x39,
+      0xcf, 0xcf,
+
+      0xd0, 0x2,
+      0xd1, 0x38,
+      0xd2, 0xc7,
+      0xd3, 0x3c,
+      0xd4, 0x1,
+      0xd5, 0x87,
+      0xd6, 0x3c,
+      0xd7, 0xf3,
+      0xd8, 0x4,
+      0xd9, 0x70,
+      0xda, 0xe3,
+      0xdb, 0xcf,
+      0xdc, 0x2b,
+      0xdd, 0xf,
+      0xde, 0x1f,
+      0xdf, 0x3f,
+      0xe0, 0x00,
+      0xe1, 0xe0,
+      0xe2, 0xf0,
+      0xe3, 0xf8,
+      0xe4, 0x14,
+      0xe5, 0x1f,
+      0xe6, 0xf,
+      0xe7, 0xc7,
+      0xe8, 0x3,
+      0xe9, 0x80,
+      0xea, 0xfc,
+      0xeb, 0x3f,
+      0xec, 0x8,
+      0xed, 0x7f,
+      0xee, 0x3,
+      0xef, 0xff,
+      0xf0, 0x4,
+      0xf1, 0x0,
+      0xf2, 0xff,
+      0xf3, 0xc0,
+      0xf4, 0x3,
+      0xf5, 0xff,
+      0xf6, 0x0,
+      0xf7, 0x3f,
+      0xf8, 0x0,
+      0xf9, 0x0,
+      0xfa, 0xff,
+      0xfb, 0xff,
+      0xfc, 0x3f,
+      0xfd, 0xff,
+      0xfe, 0xff,
+      0xff, 0xff,
+      0x3, 0x4,
+
+      /* Setup the Diter to Pattern33 */
+      0x80, 0xdd,
+      0x81, 0xdd,
+      0x82, 0x33,
+      0x83, 0x33,
+      0x84, 0xdd,
+      0x85, 0xdd,
+      0x86, 0x33,
+      0x87, 0x33,
+      0x88, 0x33,
+      0x89, 0x33,
+      0x8a, 0x77,
+      0x8b, 0x77,
+      0x8c, 0x33,
+      0x8d, 0x33,
+      0x8e, 0x77,
+      0x8f, 0x77,
+      0x90, 0xdd,
+      0x91, 0xdd,
+      0x92, 0x33,
+      0x93, 0x33,
+      0x94, 0xdd,
+      0x95, 0xdd,
+      0x96, 0x33,
+      0x97, 0x33,
+      0x98, 0x33,
+      0x99, 0x33,
+      0x9a, 0x77,
+      0x9b, 0x77,
+      0x9c, 0x33,
+      0x9d, 0x33,
+      0x9e, 0x77,
+      0x9f, 0x77,
+
+      0x4, 0x20,
+      0x5, 0x3,
+      0x6, 0x56,
+      0x7, 0x2,
+      0x8, 0x1c,
+      0x9, 0x0,
+      0xa, 0x26,
+      0xb, 0x0,
+      0xc, 0x15,
+      0xd, 0x4,
+      0xe, 0x50,
+      0xf, 0x4,
+      0x10, 0xfa,
+      0x11, 0x0,
+      0x12, 0xc8,
+      0x13, 0x0,
+      0x14, 0x31,
+      0x15, 0x23,
+      0x16, 0x0,
+
+      /* Enable DSTN panel */
+      0x2, 0x64
+   };
+   unsigned char index, data;
+   int i;
+
+   gfx_delay_milliseconds(100);
+   Draco9210GpioInit();
+   Draco9210SetCS();
+   Draco9210ToggleClock();
+   Draco9210ToggleClock();
+   Draco9210ToggleClock();
+   Draco9210ToggleClock();
+   Draco9210ClearCS();
+
+#if defined(_WIN32)			/* For Windows */
+   for (i = 0; i < 10; i++) {
+      _asm {
+      out 0EDh, al}
+   }
+
+#elif defined(linux)			/* Linux */
+
+#endif
+
+   for (i = 0; i < 630; i += 2) {
+      index = panelvalues[i];
+      data = panelvalues[i + 1];
+      Draco9210WriteReg(index, data);
+   }
+
+}
+
+static void
+DracoWriteData(unsigned char data)
+{
+   int i;
+   unsigned char mask = 0x80, databit;
+
+   for (i = 0; i < 8; i++) {
+
+      databit = data & mask;
+      if (data & mask) {
+	 Draco9210SetDataOut();
+      } else {
+	 Draco9210ClearDataOut();
+      }
+      mask >>= 1;
+      Draco9210ToggleClock();
+   }
+}
+
+static void
+DracoReadData(unsigned char *data)
+{
+   int i;
+   unsigned char tmp = 0, readbit;
+
+   Draco9210ClearDataOut();
+   Draco9210ToggleClock();
+   for (i = 0; i < 7; i++) {
+      readbit = Draco9210ReadDataIn();
+      tmp |= (readbit & 0x1);
+      tmp <<= 1;
+      Draco9210ToggleClock();
+   }
+   readbit = Draco9210ReadDataIn();
+   tmp |= (readbit & 0x1);
+   *data = tmp;
+}
+
+#if defined(_WIN32)			/* For Windows */
+
+void
+Draco9210GpioInit()
+{
+   _asm {
+      pushf 
+      cli
+	  mov dx, 0CF8h
+	  mov eax, CX55x0_ID + 090h
+	  out dx, eax
+	  mov dx, 0CFCh 
+	  mov al, 0CFh 
+	  mov ah, 00h 
+	  out dx, ax 
+	  popf
+   }
+}
+
+void
+Draco9210SetCS()
+{
+   _asm {
+      pushf
+      ;Point to PCI address register
+      mov dx, 0CF8h
+      ;55 XX GPIO data register 
+      mov eax, CX55x0_ID + 090h
+      out dx, eax
+      ;Point to PCI data register (CFCh)
+      mov dx, 0CFCh
+
+      in ax, dx
+      and ah, 30h
+      mov ah, c92DataReg
+      or ah, CS9210
+      mov c92DataReg, ah
+      out dx, ax
+      popf
+   }
+}
+
+void
+Draco9210ClearCS()
+{
+   _asm {
+      pushf
+      ;Point to PCI address register
+      mov dx, 0CF8h
+      ;55 XX GPIO data register 
+      mov eax, CX55x0_ID + 090h
+      out dx, eax
+      ;Point to PCI data register (CFCh)
+      mov dx, 0CFCh
+      ;Set CS LOW
+      in ax, dx
+      mov ah, c92DataReg
+      and ah, NOT CS9210
+      mov c92DataReg, ah
+      out dx, ax
+      popf
+   }
+}
+
+void
+Draco9210SetDataOut()
+{
+   _asm {
+      pushf
+      ;Point to PCI address register
+      mov dx, 0CF8h
+      ;55 XX GPIO data register 
+      mov eax, CX55x0_ID + 090h
+      out dx, eax
+      ;Point to PCI data register (CFCh)
+      mov dx, 0CFCh
+      ;Set DATA HIGH
+      in ax, dx
+      mov ah, c92DataReg
+      or ah, DATAOUT9210
+      mov c92DataReg, ah
+      out dx, ax
+      popf
+   }
+}
+
+void
+Draco9210ClearDataOut()
+{
+   _asm {
+      pushf
+      ;Point to PCI address register
+      mov dx, 0CF8h
+      mov eax, CX55x0_ID + 090h;
+      ;55 XX GPIO data register
+      out dx, eax
+      ;Point to PCI data register (CFCh)
+      mov dx, 0CFCh
+      ;Set Data LOW
+      in ax, dx
+      mov ah, c92DataReg
+      and ah, NOT DATAOUT9210
+      mov c92DataReg, ah
+      out dx, ax
+      popf
+   }
+}
+
+unsigned char
+Draco9210ReadDataIn()
+{
+   unsigned char readdata;
+
+   _asm {
+      pushf 
+      ;Point to PCI address register 
+      mov dx, 0CF8h
+      ;55 XX GPIO data register 
+      mov eax, CX55x0_ID + 090h
+      out dx, eax 
+      ;Point to PCI data register (CFCh)
+      mov dx, 0FCh
+
+      in ax, dx
+      ;Preserve just Data IN bit
+      and ah, DATAIN9210
+      mov al, ah
+      cmp al, 0
+      ;Is it LOW ? 
+      je readDataLow 
+      ;must be HIGH
+      mov al, 1
+   readDataLow:
+      mov readdata, al
+      popf
+   }
+   return (readdata);
+}
+
+void
+Draco9210ToggleClock()
+{
+   _asm {
+      pushf
+      ;Point to PCI address register
+      mov dx, 0CF8h
+      ;55 XX GPIO data register 
+      mov eax, CX55x0_ID + 090h
+      ;Point to PCI data register (CFCh)
+      out dx, eax 
+      mov dx, 0CFCh
+      ;SET CLOCK 
+      in ax, dx 
+      mov ah, c92DataReg 
+      or ah, CLOCK9210 
+      mov c92DataReg, ah 
+      out dx, ax 
+      out 0EDh, al	/*      IOPAUSE */
+      ;Point to PCI address register 
+      mov dx, 0CF8h
+      ;55 XX GPIO data register
+      mov eax, CX55x0_ID + 090h
+      out dx, eax
+      ;Point to PCI data register (CFCh)
+      mov dx, 0CFCh;
+      ;CLEAR CLOCK
+      in ax, dx
+      mov ah, c92DataReg
+      and ah, NOT CLOCK9210 
+      mov c92DataReg, ah 
+      out dx, ax 
+      popf
+   }
+}
+
+#elif defined(linux)			/* Linux */
+
+void
+Draco9210GpioInit()
+{
+}
+void
+Draco9210SetCS()
+{
+}
+void
+Draco9210ClearCS()
+{
+}
+void
+Draco9210SetDataOut()
+{
+}
+void
+Draco9210ClearDataOut()
+{
+}
+unsigned char
+Draco9210ReadDataIn()
+{
+}
+void
+Draco9210ToggleClock()
+{
+}
+
+#endif
+
+unsigned char
+Draco9210ReadReg(unsigned char index)
+{
+   unsigned char data;
+
+   Draco9210SetCS();
+   Draco9210ToggleClock();
+   Draco9210SetDataOut();
+   Draco9210ToggleClock();
+   Draco9210ClearDataOut();
+   Draco9210ToggleClock();
+   Draco9210ClearDataOut();
+   Draco9210ToggleClock();
+   Draco9210ClearDataOut();
+   Draco9210ToggleClock();
+
+   DracoWriteData(index);
+   DracoReadData(&data);
+
+   return (data);
+}
+
+void
+Draco9210WriteReg(unsigned char index, unsigned char data)
+{
+
+   Draco9210SetCS();
+   Draco9210ToggleClock();
+
+   Draco9210SetDataOut();
+   Draco9210ToggleClock();
+
+   Draco9210ClearDataOut();
+   Draco9210ToggleClock();
+
+   Draco9210ClearDataOut();
+   Draco9210ToggleClock();
+
+   Draco9210SetDataOut();
+   Draco9210ToggleClock();
+
+   DracoWriteData(index);
+   DracoWriteData(data);
+
+   Draco9210ClearDataOut();
+   Draco9210ToggleClock();
+
+   Draco9210ClearCS();
+   Draco9210ToggleClock();
+   Draco9210ToggleClock();
+
+}
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/panel/drac9210.h b/xc/programs/Xserver/hw/xfree86/drivers/nsc/panel/drac9210.h
index cc0ef617c..d83bbced0 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/panel/drac9210.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/panel/drac9210.h
@@ -1,7 +1,7 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/panel/drac9210.h,v 1.1 2002/10/11 14:33:02 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/panel/drac9210.h,v 1.1 2002/12/10 15:12:28 alanh Exp $ */
 /*
  * $Workfile: drac9210.h $
- * $Revision: 1.1.1.1 $
+ * $Revision: 1.2.2.1 $
  *
  * File Contents: This file contains the panel header file and definition
  *                for the platform with 9210 support.
@@ -262,16 +262,13 @@
  * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 
  *
  * END_NSC_LIC_GPL */
-  
 
 #include "panel.h"
 
 #ifndef _DRAC9210_h
 #define _DRAC9210_h
 #define CX55x0_ID 	0x80009000
-static unsigned char  c92DataReg=0;
+static unsigned char c92DataReg = 0;
 #endif /* !_DRAC9210_h */
 
 /* END OF FILE */
-
-
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/nsc/panel/gx2_9211.c b/xc/programs/Xserver/hw/xfree86/drivers/nsc/panel/gx2_9211.c
new file mode 100644
index 000000000..71909f8c4
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/panel/gx2_9211.c
@@ -0,0 +1,382 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/panel/gx2_9211.c,v 1.3 2003/01/14 09:34:35 alanh Exp $ */
+/*
+ * $Workfile: gx2_9211.c $
+ *
+ * This header file defines the pneumonics used when calling Durango routines. 
+ * This file is automatically included by gfx_rtns.h
+ *
+ * NSC_LIC_ALTERNATIVE_PREAMBLE
+ *
+ * Revision 1.0
+ *
+ * National Semiconductor Alternative GPL-BSD License
+ *
+ * National Semiconductor Corporation licenses this software 
+ * ("Software"):
+ *
+ *      Panel Library
+ *
+ * under one of the two following licenses, depending on how the 
+ * Software is received by the Licensee.
+ * 
+ * If this Software is received as part of the Linux Framebuffer or
+ * other GPL licensed software, then the GPL license designated 
+ * NSC_LIC_GPL applies to this Software; in all other circumstances 
+ * then the BSD-style license designated NSC_LIC_BSD shall apply.
+ *
+ * END_NSC_LIC_ALTERNATIVE_PREAMBLE */
+
+/* NSC_LIC_BSD
+ *
+ * National Semiconductor Corporation Open Source License for Durango
+ *
+ * (BSD License with Export Notice)
+ *
+ * Copyright (c) 1999-2001
+ * National Semiconductor Corporation.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met: 
+ *
+ *   * Redistributions of source code must retain the above copyright 
+ *     notice, this list of conditions and the following disclaimer. 
+ *
+ *   * Redistributions in binary form must reproduce the above 
+ *     copyright notice, this list of conditions and the following 
+ *     disclaimer in the documentation and/or other materials provided 
+ *     with the distribution. 
+ *
+ *   * Neither the name of the National Semiconductor Corporation nor 
+ *     the names of its contributors may be used to endorse or promote 
+ *     products derived from this software without specific prior 
+ *     written permission. 
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+ * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE,
+ * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE.
+ *
+ * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
+ * YOUR JURISDICTION. It is licensee's responsibility to comply with 
+ * any export regulations applicable in licensee's jurisdiction. Under 
+ * CURRENT (2001) U.S. export regulations this software 
+ * is eligible for export from the U.S. and can be downloaded by or 
+ * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
+ * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
+ * Syria, Sudan, Afghanistan and any other country to which the U.S. 
+ * has embargoed goods and services. 
+ *
+ * END_NSC_LIC_BSD */
+
+/* NSC_LIC_GPL
+ *
+ * National Semiconductor Corporation Gnu General Public License for Durango
+ *
+ * (GPL License with Export Notice)
+ *
+ * Copyright (c) 1999-2001
+ * National Semiconductor Corporation.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted under the terms of the GNU General 
+ * Public License as published by the Free Software Foundation; either 
+ * version 2 of the License, or (at your option) any later version  
+ *
+ * In addition to the terms of the GNU General Public License, neither 
+ * the name of the National Semiconductor Corporation nor the names of 
+ * its contributors may be used to endorse or promote products derived 
+ * from this software without specific prior written permission. 
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+ * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, 
+ * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE. See the GNU General Public License for more details. 
+ *
+ * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
+ * YOUR JURISDICTION. It is licensee's responsibility to comply with 
+ * any export regulations applicable in licensee's jurisdiction. Under 
+ * CURRENT (2001) U.S. export regulations this software 
+ * is eligible for export from the U.S. and can be downloaded by or 
+ * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
+ * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
+ * Syria, Sudan, Afghanistan and any other country to which the U.S. 
+ * has embargoed goods and services. 
+ *
+ * You should have received a copy of the GNU General Public License 
+ * along with this file; if not, write to the Free Software Foundation, 
+ * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 
+ *
+ * END_NSC_LIC_GPL */
+
+#include "92xx.h"
+#include "gx2_9211.h"
+#include "pnl_defs.h"
+
+#if defined(_WIN32)			/*windows */
+#include "gfx_defs.h"
+
+extern DEV_STATUS gfx_msr_read(unsigned int device, unsigned int msrRegister,
+			       Q_WORD * msrValue);
+extern DEV_STATUS gfx_msr_write(unsigned int device, unsigned int msrRegister,
+				Q_WORD * msrValue);
+#endif
+
+static unsigned long FPBaseAddr;
+
+void
+SetFPBaseAddr(unsigned long addr)
+{
+
+   FPBaseAddr = addr;
+}
+
+/****************************************************************************
+ * protected_mode_access( unsigned long mode, unsigned long width, 
+ * unsigned long addr, unsigned char* pdata )
+ * This function provides access to physical memory at the requested address.  
+ * mode is: 
+ *        GX2_READ or GX2_WRITE (accesses a single byte, word or double
+ *        word depending on the value of "width".  Only 1, 2 or 4 supported).
+ *        READ_BYTES, WRITE_BYTES accesses "width" number of bytes (8 bits)
+ *        READ_WORDS, WRITE_WORDS accesses "width" number of words (16 bits)
+ *        READ_DWORDS, WRITE_DWORDS accesses "width" number of dwords (32 bits)
+ * width is: The size of the access.  For READ or WRITE, only 1, 2 and 4 are
+ *        supported.  For other modes, width is not limited but will cause 
+ *        paging if the block traverses page boundaries.  
+ * addr is: The physical address being accessed
+ * pdata is: A pointer to the data to be read or written into.
+ * NOTE! WORD or DWORD accesses can only be made on WORD or DWORD boundaries!
+ ****************************************************************************/
+void
+protected_mode_access(unsigned long mode,
+		      unsigned long width, unsigned long addr, char *pdata)
+{
+   void *ptr = (void *)(FPBaseAddr + addr);
+
+   /* type specific buffer pointers */
+   char *byte_data = (char *)pdata;
+   unsigned long *word_data = (unsigned long *)pdata;
+   unsigned long *dword_data = (unsigned long *)pdata;
+
+   if (mode == GX2_READ) {
+      switch (width) {
+      case FOUR_BYTES:
+	 *(dword_data) = (unsigned long)(*(unsigned long *)ptr);
+	 break;
+      case TWO_BYTES:
+	 *(word_data) = (unsigned long)(*(unsigned long *)ptr);
+	 break;
+      default:
+	 *(byte_data) = (char)(*(char *)ptr);
+	 break;
+      }
+   } /* end  GX2_READ */
+   else if (mode == GX2_WRITE) {
+      switch (width) {
+      case FOUR_BYTES:
+	 *(unsigned long *)ptr = *dword_data;
+	 break;
+      case TWO_BYTES:
+	 *(unsigned long *)ptr = *word_data;
+	 break;
+      default:
+	 *(char *)ptr = *byte_data;
+	 break;
+      }					/* end switch(mode) */
+   }
+   /* end case GX2_WRITE */
+   return;
+
+}					/* End of protected_mode_access. */
+
+/*************************************************************************
+ * void write_video_reg64_low( unsigned long offset, unsigned long value )
+ * Writes value to the low 32 bits of the 64 bit memory mapped video 
+ * register indicated by offset.
+ * This function uses Sys_info.video_reg_base as the base address, so
+ * the value of offset should be with respect to this base.
+ *************************************************************************/
+void
+write_video_reg64_low(unsigned long offset, unsigned long value)
+{
+   protected_mode_access(GX2_WRITE, FOUR_BYTES,
+			 FPBaseAddr + offset, (char *)&value);
+}					/*end write_video_reg64_low() */
+
+/*************************************************************************
+ * unsigned long read_video_reg64_low( unsigned long offset )
+ * Returns the contents of the low 32 bits of the 64 bit memory mapped
+ * video register indicated by offset.
+ * This function uses Sys_info.video_reg_base as the base address, so
+ * the value of offset should be with respect to this base.
+ *************************************************************************/
+unsigned long
+read_video_reg64_low(unsigned long offset)
+{
+   unsigned long data;
+
+   protected_mode_access(GX2_READ, FOUR_BYTES,
+			 FPBaseAddr + offset, (char *)&data);
+   return (data);
+}					/*end read_video_reg64_low() */
+
+/*******************************************************************************
+ * void Redcloud_fp_reg( int mode, unsigned long address, unsigned long *data )
+ *
+ * Writes and reads dwords to the Redcloud flat panel registers in the Redcloud 
+ * Display Filter.  There's no clock control, chip select or timing to deal with.
+ * This routine expects the actual GX2 macro definitions for the address.
+ *
+ * Parameters:
+ *			mode:		An integer value for a GX2_READ or GX2_WRITE operation
+ *						0 = GX2_Read and 1 = GX2_Write
+ *			address:	A dword value representing the offset of the register.
+ *			data:		A pointer to a dword value that is to be written in to
+ *						the required register.  In case of a Read operation this
+ *						will point to the result of the Read operation.
+ *
+ *******************************************************************************/
+void
+Redcloud_fp_reg(int mode, unsigned long address, unsigned long *data)
+{
+   if (mode == GX2_READ) {
+      *data = read_video_reg64_low(address);
+   } else {
+      write_video_reg64_low(address, *data);
+   }
+
+}					/* End of Redcloud_fp_reg() */
+
+/*-------------------------------------------------------------------
+ *
+ * SET_92XX_MODE_PARAMS
+ * This routine sets the 9211 mode parameters.  
+ *
+ *-------------------------------------------------------------------*/
+
+void
+set_Redcloud_92xx_mode_params(int mode)
+{
+   CS92xx_MODE *pMode = &FPModeParams[mode];
+   unsigned long temp_data = 0;
+   unsigned long base_data;
+   Q_WORD msrValue;
+
+   /* on a Redcloud, we need to set up the DF pad select MSR */
+   if (gfx_msr_read(RC_ID_DF, GX2_VP_MSR_PAD_SELECT, &msrValue) == FOUND) {
+      msrValue.low &= ~GX2_VP_PAD_SELECT_MASK;
+      if (pMode->panel_type == PNL_TFT || pMode->panel_type == PNL_TWOP) {
+	 msrValue.low = GX2_VP_PAD_SELECT_TFT;
+      } else {
+	 msrValue.low = GX2_VP_PAD_SELECT_DSTN;
+      }
+      gfx_msr_write(RC_ID_DF, GX2_VP_MSR_PAD_SELECT, &msrValue);
+   }
+
+   /* Turn the 92xx power off before setting any new parameters. */
+   temp_data = pMode->power_management & ~GX2_FP_PM_PWR_ON;
+   Redcloud_fp_reg(GX2_WRITE, GX2_FP_PWR_MAN, (unsigned long *)&temp_data);
+
+   /* Set 9211 registers using the desired panel settings */
+
+   Redcloud_fp_reg(GX2_WRITE, GX2_FP_PAN_TIMING1,
+		   (unsigned long *)&pMode->panel_timing1);
+
+   /* On Redcloud, bit 31 is now reserved. */
+   temp_data = pMode->panel_timing2 & 0x7FFFFFFF;
+   Redcloud_fp_reg(GX2_WRITE, GX2_FP_PAN_TIMING2,
+		   (unsigned long *)&temp_data);
+
+   /* On Redcloud TFT parts, set this to 0x70 so all 8 bits per color run 
+    * thru fp crc but only non-TFT parts.  Otherwise, set it to be 0x50. 
+    * (source: Larry G.). 
+    */
+   if (pMode->panel_type == PNL_TFT || pMode->panel_type == PNL_TWOP) {
+      temp_data = GX2_FP_CRC_PASS_THRU_MASK;
+   } else {
+      temp_data = pMode->rev_C_dither_frc;
+   }
+   Redcloud_fp_reg(GX2_WRITE, GX2_FP_DITH_FR_CNTRL,
+		   (unsigned long *)&temp_data);
+   Redcloud_fp_reg(GX2_WRITE, GX2_FP_BLFSR,
+		   (unsigned long *)&pMode->blue_lsfr_seed);
+   Redcloud_fp_reg(GX2_WRITE, GX2_FP_RLFSR,
+		   (unsigned long *)&pMode->red_green_lsfr_seed);
+
+   /* Set the memory information, then the power register last. 
+    * This will turn the panel on at the 9211.
+    */
+
+   Redcloud_fp_reg(GX2_READ, GX2_FP_FBB, (unsigned long *)&base_data);
+   if (base_data != 0x41780000) {
+      base_data = 0x41780000;
+      Redcloud_fp_reg(GX2_WRITE, GX2_FP_FBB, (unsigned long *)&base_data);
+   }
+
+   Redcloud_fp_reg(GX2_WRITE, GX2_FP_PWR_MAN,
+		   (unsigned long *)&pMode->power_management);
+
+}					/*end set_92xx_mode_params() */
+
+/* -----------------------------------------------------------------------
+ *
+ * SET_FLAT_PANEL_MODE
+ *
+ * This routine sets the specified flat panel moden parameters in 
+ * the 9211.
+ * Returns PASS if successful, FAIL if the mode parameters could 
+ * not be set.
+ *
+ *------------------------------------------------------------------------*/
+
+unsigned char
+set_Redcloud_92xx_mode(Pnl_PanelStat * pstat)
+{
+   int mode;
+
+   /* LOOP THROUGH THE AVAILABLE MODES TO FIND A MATCH */
+
+   for (mode = 0; mode < NUM_92XX_MODES; mode++) {
+      if ((FPModeParams[mode].xres == pstat->XRes) &&
+	  (FPModeParams[mode].yres == pstat->YRes) &&
+	  (FPModeParams[mode].bpp == pstat->Depth) &&
+	  (FPModeParams[mode].panel_type == pstat->Type) &&
+	  (FPModeParams[mode].color_type == pstat->MonoColor)) {
+
+	 /* SET THE 92xx FOR THE SELECTED MODE */
+	 set_Redcloud_92xx_mode_params(mode);
+	 return TRUE;
+      }					/* end if() */
+   }					/* end for() */
+   return FALSE;
+
+}					/* end set_Centaurus_92xx_mode() */
+
+void
+Redcloud_9211init(Pnl_PanelStat * pstat)
+{
+
+   set_Redcloud_92xx_mode(pstat);
+
+}
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/nsc/panel/gx2_9211.h b/xc/programs/Xserver/hw/xfree86/drivers/nsc/panel/gx2_9211.h
new file mode 100644
index 000000000..a545cb12b
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/panel/gx2_9211.h
@@ -0,0 +1,207 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/panel/gx2_9211.h,v 1.3 2003/01/14 09:34:35 alanh Exp $ */
+/*
+ * $Workfile: gx2_9211.h $
+ *
+ * This header file defines the pneumonics used when calling Durango routines. 
+ * This file is automatically included by gfx_rtns.h
+ *
+ * NSC_LIC_ALTERNATIVE_PREAMBLE
+ *
+ * Revision 1.0
+ *
+ * National Semiconductor Alternative GPL-BSD License
+ *
+ * National Semiconductor Corporation licenses this software 
+ * ("Software"):
+ *
+ *      Panel Library
+ *
+ * under one of the two following licenses, depending on how the 
+ * Software is received by the Licensee.
+ * 
+ * If this Software is received as part of the Linux Framebuffer or
+ * other GPL licensed software, then the GPL license designated 
+ * NSC_LIC_GPL applies to this Software; in all other circumstances 
+ * then the BSD-style license designated NSC_LIC_BSD shall apply.
+ *
+ * END_NSC_LIC_ALTERNATIVE_PREAMBLE */
+
+/* NSC_LIC_BSD
+ *
+ * National Semiconductor Corporation Open Source License for Durango
+ *
+ * (BSD License with Export Notice)
+ *
+ * Copyright (c) 1999-2001
+ * National Semiconductor Corporation.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met: 
+ *
+ *   * Redistributions of source code must retain the above copyright 
+ *     notice, this list of conditions and the following disclaimer. 
+ *
+ *   * Redistributions in binary form must reproduce the above 
+ *     copyright notice, this list of conditions and the following 
+ *     disclaimer in the documentation and/or other materials provided 
+ *     with the distribution. 
+ *
+ *   * Neither the name of the National Semiconductor Corporation nor 
+ *     the names of its contributors may be used to endorse or promote 
+ *     products derived from this software without specific prior 
+ *     written permission. 
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+ * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE,
+ * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE.
+ *
+ * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
+ * YOUR JURISDICTION. It is licensee's responsibility to comply with 
+ * any export regulations applicable in licensee's jurisdiction. Under 
+ * CURRENT (2001) U.S. export regulations this software 
+ * is eligible for export from the U.S. and can be downloaded by or 
+ * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
+ * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
+ * Syria, Sudan, Afghanistan and any other country to which the U.S. 
+ * has embargoed goods and services. 
+ *
+ * END_NSC_LIC_BSD */
+
+/* NSC_LIC_GPL
+ *
+ * National Semiconductor Corporation Gnu General Public License for Durango
+ *
+ * (GPL License with Export Notice)
+ *
+ * Copyright (c) 1999-2001
+ * National Semiconductor Corporation.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted under the terms of the GNU General 
+ * Public License as published by the Free Software Foundation; either 
+ * version 2 of the License, or (at your option) any later version  
+ *
+ * In addition to the terms of the GNU General Public License, neither 
+ * the name of the National Semiconductor Corporation nor the names of 
+ * its contributors may be used to endorse or promote products derived 
+ * from this software without specific prior written permission. 
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+ * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, 
+ * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE. See the GNU General Public License for more details. 
+ *
+ * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
+ * YOUR JURISDICTION. It is licensee's responsibility to comply with 
+ * any export regulations applicable in licensee's jurisdiction. Under 
+ * CURRENT (2001) U.S. export regulations this software 
+ * is eligible for export from the U.S. and can be downloaded by or 
+ * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
+ * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
+ * Syria, Sudan, Afghanistan and any other country to which the U.S. 
+ * has embargoed goods and services. 
+ *
+ * You should have received a copy of the GNU General Public License 
+ * along with this file; if not, write to the Free Software Foundation, 
+ * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 
+ *
+ * END_NSC_LIC_GPL */
+
+/* -----------------------------------------------------------
+ *  GX2 FLAT PANEL CONTROLLER REGISTER DEFINITIONS           
+ *-----------------------------------------------------------
+ */
+
+#define	GX2_VP_MSR_PAD_SELECT		0x2011
+#define	GX2_VP_PAD_SELECT_MASK		0x3FFFFFFF
+#define	GX2_VP_PAD_SELECT_TFT		0x1FFFFFFF
+#define	GX2_VP_PAD_SELECT_DSTN		0x00000000
+
+/* This is useful for generating addresses incrementally 
+ * (ie, vidtest register display code).
+ */
+
+#define GX2_FP_LCD_OFFSET       0x00000400
+#define CS9211_REDCLOUD         0x0400	/* Moved 9211 Rev C3 up to next major no. */
+
+#define GX2_FP_PAN_TIMING1      0x0400	/* FP timings 1 */
+#define GX2_FP_PAN_TIMING2      0x0408	/* FP timings 2 */
+#define GX2_FP_PWR_MAN          0x0410	/* FP power management */
+#define GX2_FP_DITH_FR_CNTRL    0x0418	/* FP dither and frame rate */
+#define GX2_FP_BLFSR            0x0420	/* Blue LFSR seed */
+#define GX2_FP_RLFSR            0x0428	/* Red and Green LFSR seed */
+#define GX2_FP_FMI              0x0430	/* FRM Memory Index */
+#define GX2_FP_FMD              0x0438	/* FRM Memory Data */
+#define GX2_FP_DCA              0x0448	/* Dither ram control and address */
+#define GX2_FP_DMD              0x0450	/* Dither memory data */
+#define GX2_FP_PAN_CRC_SIG      0x0458	/* FP CRC signature */
+#define GX2_FP_FBB              0x0460	/* Frame Buffer Base Address */
+
+/* GX2_FP_PAN_TIMING2 bits */
+
+#define GX2_FP_TFT_PASS_THRU		0x40000000	/* TFT pass through enable */
+#define GX2_FP_PT2_PIX_OUT_MASK		0xFFF8FFFF	/* panel output bit formats */
+#define GX2_FP_PT2_PIX_OUT_TFT		0x00000000	/* 8 BIT DSTN or TFT panel */
+#define GX2_FP_PT2_COLOR_MONO		0x00080000	/* color or monochrome */
+#define GX2_FP_PT2_DSTN_TFT_MASK	0xFFCFFFFF	/* panel type bits */
+#define GX2_FP_PT2_DSTN_TFT_TFT		0x00100000	/* TFT panel */
+#define GX2_FP_PT2_PSH_CLK_CTL		0x08000000	/* shift clock retrace activity control */
+
+/*  GX2_FP_PWR_MAN bits */
+
+#define GX2_FP_PM_SHFCLK_INVERT		0x00002000	/* Invert shfclk to panel */
+#define GX2_FP_PM_VSYNC_DELAY		0x0000C000	/* Vert Sync delay */
+#define GX2_FP_PM_HSYNC_DELAY		0x00030000	/* Horiz Sync delay */
+#define GX2_FP_PM_PWRDN_PHASE_BIT0	0x00040000	/* panel power down phase bit 0 */
+#define GX2_FP_PM_PWRDN_PHASE_BIT1	0x00080000	/* panel power down phase bit 1 */
+#define GX2_FP_PM_PWRDN_PHASE_BIT2	0x00100000	/* panel power down phase bit 2 */
+#define GX2_FP_PM_PWRUP_PHASE_BIT0	0x00200000	/* panel power up phase bit 0 */
+#define GX2_FP_PM_PWRUP_PHASE_BIT1	0x00400000	/* panel power up phase bit 1 */
+#define GX2_FP_PM_PWRUP_PHASE_BIT2	0x00800000	/* panel power up phase bit 2 */
+#define GX2_FP_PM_PWR_ON			0x01000000	/* panel power ON */
+#define GX2_FP_PM_DIS_OFF_CTL		0x02000000	/* disable the panel back light */
+#define GX2_FP_PM_EXT_PWR_SEQ		0x08000000	/* external power sequence */
+
+/*  GX2_FP_PAN_CRC_SIG bits */
+
+#define GX2_FP_PAN_CRC_SIGE         0x00000001	/* CRC Sig Enable */
+#define GX2_FP_PAN_CRC_SFR          0x00000002	/* CRC Sig Free Run */
+
+/* This define is used by the hardware CRC mechanism */
+#define GX2_FP_CRC_PASS_THRU_MASK	0x00000070
+
+#define GX2_READ 0
+#define GX2_WRITE 1
+
+void SetFPBaseAddr(unsigned long);
+void Redcloud_9211init(Pnl_PanelStat *);
+void protected_mode_access(unsigned long mode,
+              unsigned long width,
+              unsigned long addr, char *pdata);
+void write_video_reg64_low(unsigned long offset, unsigned long value);
+unsigned long read_video_reg64_low(unsigned long offset);
+void Redcloud_fp_reg(int mode, unsigned long address, unsigned long *data);
+void set_Redcloud_92xx_mode_params(int mode);
+unsigned char set_Redcloud_92xx_mode(Pnl_PanelStat * pstat);
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/panel/panel.c b/xc/programs/Xserver/hw/xfree86/drivers/nsc/panel/panel.c
index a8445f465..c88cdab2a 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/panel/panel.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/panel/panel.c
@@ -1,7 +1,7 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/panel/panel.c,v 1.2 2002/10/18 20:02:41 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/panel/panel.c,v 1.3 2003/01/14 09:34:35 alanh Exp $ */
 /*
  * $Workfile: panel.c $
- * $Revision: 1.1.1.1 $
+ * $Revision: 1.2.2.1 $
  *
  * File Contents: This file contains the file inclusions, macro definitions      
  *                for the panel. 
@@ -139,40 +139,39 @@
  *
  * END_NSC_LIC_GPL */
 
+#if defined(linux)			/* Linux */
 
-#if defined(linux) /* Linux */
-  
 #ifdef __KERNEL__
 
 #include <linux/string.h>
-#include <asm/io.h> 
+#include <asm/io.h>
 
-#else
+#elif !defined(XFree86Server)
 
 #include <linux/fs.h>
 #include <asm/mman.h>
 
 #endif /* __KERNEL__ */
-#elif defined(_WIN32) /* windows */
+#elif defined(_WIN32)			/* windows */
 
 #include <windows.h>
 
-#endif 
+#endif
 
 #include "panel.h"
-#include "gfx_defs.h" 
+#include "gfx_defs.h"
+
 extern unsigned char *gfx_virt_regptr;
 extern unsigned char *gfx_virt_fbptr;
 extern unsigned char *gfx_virt_vidptr;
 extern unsigned char *gfx_virt_vipptr;
 extern unsigned long gfx_detect_video(void);
 
-#define PLATFORM_DYNAMIC		1   /* runtime selection */
-#define PLATFORM_DRACO			1   /* Draco + 9210 */
-#define PLATFORM_CENTAURUS		1   /* Centaurus + 9211 RevA */
-#define PLATFORM_DORADO			1   /* Dorado + 9211 RevC */
-#define PLATFORM_REDCLOUD		1   /* GX2 */
-#define PLATFORM_GX2BASED		0   /* ??? */
+#define PLATFORM_DYNAMIC		1	/* runtime selection */
+#define PLATFORM_DRACO			1	/* Draco + 9210 */
+#define PLATFORM_CENTAURUS		1	/* Centaurus + 9211 RevA */
+#define PLATFORM_DORADO			1	/* Dorado + 9211 RevC */
+#define PLATFORM_REDCLOUD		1	/* GX2 */
 
 unsigned char *XpressROMPtr;
 
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/panel/panel.h b/xc/programs/Xserver/hw/xfree86/drivers/nsc/panel/panel.h
index 3839c7e5a..a3bea1e00 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/panel/panel.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/panel/panel.h
@@ -1,7 +1,7 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/panel/panel.h,v 1.1 2002/10/11 14:33:02 alanh Exp $ */ 
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/panel/panel.h,v 1.3 2003/01/14 09:34:36 alanh Exp $ */
 /*
  * $Workfile: panel.h $
- * $Revision: 1.1.1.1 $
+ * $Revision: 1.2.2.1 $
  *
  * File Contents: This file contains the Geode frame buffer panel 
  *                functions prototypes and it includes panel 
@@ -148,40 +148,43 @@
 #include "pnl_defs.h"
 
 #ifdef __cplusplus
-extern "C" {
+extern "C"
+{
 #endif
 
 /* CLOSE BRACKET FOR C++ COMPLILATION */
 
-void Pnl_SetPlatform(int platform);
-int Pnl_GetPlatform(void);
-int Pnl_IsPanelPresent(void);
-void Pnl_SetPanelPresent(int present);
-void Pnl_SetPanelChip(int panelChip);
-int Pnl_GetPanelChip(void);
-void Pnl_SetPanelParam(PPnl_PanelParams pParam);
-void Pnl_GetPanelParam(PPnl_PanelParams pParam);
-int Pnl_InitPanel(PPnl_PanelParams pParam);
-int Detect_Platform(void);
-void Pnl_SavePanelState(void);
-void Pnl_RestorePanelState(void);
-void Pnl_PowerUp(void);
-void Pnl_PowerDown(void);
+   void Pnl_SetPlatform(int platform);
+   int Pnl_GetPlatform(void);
+   int Pnl_IsPanelPresent(void);
+   void Pnl_SetPanelPresent(int present);
+   void Pnl_SetPanelChip(int panelChip);
+   int Pnl_GetPanelChip(void);
+   void Pnl_SetPanelParam(PPnl_PanelParams pParam);
+   void Pnl_GetPanelParam(PPnl_PanelParams pParam);
+   int Pnl_InitPanel(PPnl_PanelParams pParam);
+   int Detect_Platform(void);
+   void Pnl_SavePanelState(void);
+   void Pnl_RestorePanelState(void);
+   void Pnl_PowerUp(void);
+   void Pnl_PowerDown(void);
 
-int Pnl_IsPanelEnabledInBIOS(void);
-void Pnl_GetPanelInfoFromBIOS(int *xres, int *yres, int *bpp, int *hz);
+   int Pnl_IsPanelEnabledInBIOS(void);
+   void Pnl_GetPanelInfoFromBIOS(int *xres, int *yres, int *bpp, int *hz);
 /* from durango */
 
-extern void gfx_delay_milliseconds(unsigned long milliseconds);
-extern unsigned long gfx_ind(unsigned short port);
-extern void gfx_outd(unsigned short port, unsigned long data);
-extern unsigned char gfx_inb(unsigned short port);
-extern void gfx_outb(unsigned short port, unsigned char data);
+#if defined(_WIN32)			/* windows */
+   extern void gfx_delay_milliseconds(unsigned long milliseconds);
+   extern unsigned long gfx_ind(unsigned short port);
+   extern void gfx_outd(unsigned short port, unsigned long data);
+   extern unsigned char gfx_inb(unsigned short port);
+   extern void gfx_outb(unsigned short port, unsigned char data);
+#endif
 
 #ifdef __cplusplus
 }
 #endif
 
-#endif /* !_panel_h */
+#endif					/* !_panel_h */
 
 /* END OF FILE */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/nsc/panel/platform.c b/xc/programs/Xserver/hw/xfree86/drivers/nsc/panel/platform.c
new file mode 100644
index 000000000..2411c6577
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/panel/platform.c
@@ -0,0 +1,726 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/panel/platform.c,v 1.3 2003/01/14 09:34:36 alanh Exp $ */
+/*
+ * $Workfile: platform.c $
+ * $Revision: 1.2.2.1 $
+ *
+ * File Contents: This file contains platform dependent functions
+ *                which provide interface to that platform.
+ *
+ *
+ * SubModule:     Geode FlatPanel library
+ *
+ */
+
+/* 
+ * NSC_LIC_ALTERNATIVE_PREAMBLE
+ *
+ * Revision 1.0
+ *
+ * National Semiconductor Alternative GPL-BSD License
+ *
+ * National Semiconductor Corporation licenses this software 
+ * ("Software"):
+ *
+ * Panel Library
+ *
+ * under one of the two following licenses, depending on how the 
+ * Software is received by the Licensee.
+ * 
+ * If this Software is received as part of the Linux Framebuffer or
+ * other GPL licensed software, then the GPL license designated 
+ * NSC_LIC_GPL applies to this Software; in all other circumstances 
+ * then the BSD-style license designated NSC_LIC_BSD shall apply.
+ *
+ * END_NSC_LIC_ALTERNATIVE_PREAMBLE */
+
+/* NSC_LIC_BSD
+ *
+ * National Semiconductor Corporation Open Source License for 
+ *
+ * Panel Library
+ *
+ * (BSD License with Export Notice)
+ *
+ * Copyright (c) 1999-2001
+ * National Semiconductor Corporation.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met: 
+ *
+ *   * Redistributions of source code must retain the above copyright 
+ *     notice, this list of conditions and the following disclaimer. 
+ *
+ *   * Redistributions in binary form must reproduce the above 
+ *     copyright notice, this list of conditions and the following 
+ *     disclaimer in the documentation and/or other materials provided 
+ *     with the distribution. 
+ *
+ *   * Neither the name of the National Semiconductor Corporation nor 
+ *     the names of its contributors may be used to endorse or promote 
+ *     products derived from this software without specific prior 
+ *     written permission. 
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+ * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE,
+ * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE.
+ *
+ * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
+ * YOUR JURISDICTION. It is licensee's responsibility to comply with 
+ * any export regulations applicable in licensee's jurisdiction. Under 
+ * CURRENT (2001) U.S. export regulations this software 
+ * is eligible for export from the U.S. and can be downloaded by or 
+ * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
+ * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
+ * Syria, Sudan, Afghanistan and any other country to which the U.S. 
+ * has embargoed goods and services. 
+ *
+ * END_NSC_LIC_BSD */
+
+/* NSC_LIC_GPL
+ *
+ * National Semiconductor Corporation Gnu General Public License for 
+ *
+ * Panel Library
+ *
+ * (GPL License with Export Notice)
+ *
+ * Copyright (c) 1999-2001
+ * National Semiconductor Corporation.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted under the terms of the GNU General 
+ * Public License as published by the Free Software Foundation; either 
+ * version 2 of the License, or (at your option) any later version  
+ *
+ * In addition to the terms of the GNU General Public License, neither 
+ * the name of the National Semiconductor Corporation nor the names of 
+ * its contributors may be used to endorse or promote products derived 
+ * from this software without specific prior written permission. 
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+ * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, 
+ * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE. See the GNU General Public License for more details. 
+ *
+ * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 
+ * YOUR JURISDICTION. It is licensee's responsibility to comply with 
+ * any export regulations applicable in licensee's jurisdiction. Under 
+ * CURRENT (2001) U.S. export regulations this software 
+ * is eligible for export from the U.S. and can be downloaded by or 
+ * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 
+ * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 
+ * Syria, Sudan, Afghanistan and any other country to which the U.S. 
+ * has embargoed goods and services. 
+ *
+ * You should have received a copy of the GNU General Public License 
+ * along with this file; if not, write to the Free Software Foundation, 
+ * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 
+ *
+ * END_NSC_LIC_GPL */
+
+#define LINUX_ROM_SEGMENT 0x000F
+#define SEGMENT_LENGTH  0xFFFF
+#define PAGE_LENGTH     0x1000
+#define SYS_BOARD_NAME_LEN 24
+
+#define PLT_READ         0
+#define PLT_WRITE        1
+#define PLT_WRITE_BYTES  2
+#define PLT_READ_BYTES   3
+#define PLT_WRITE_WORDS  4
+#define PLT_READ_WORDS   5
+#define PLT_WRITE_DWORDS 6
+#define PLT_READ_DWORDS  7
+#define PLT_UNKNOWN 		0xFFFF
+
+typedef struct
+{
+   char sys_board_name[SYS_BOARD_NAME_LEN];
+   SYS_BOARD sys_board;
+}
+SYS_BOARD_INFO;
+
+static SYS_BOARD_INFO Sys_info;
+
+/*
+ * The names in the sys_board_name string must exactly match the names in the
+ * BIOS header. These names are used by FindStringInSeg() to find the names 
+ * in the BIOS header space. The BIOS does not use OTHER; it is a dummy value 
+ * for program useonly. 
+ *
+ */
+
+SYS_BOARD_INFO Sys_board_info_array[] = {
+   {"Marmot", MARMOT_PLATFORM},
+   {"Unicorn", UNICORN_PLATFORM},
+   {"Centaurus", CENTAURUS_PLATFORM},
+   {"Aries", ARIES_PLATFORM},
+   {"Carmel", CARMEL_PLATFORM},
+   {"Hyrda", HYDRA_PLATFORM},
+   {"Dorado", DORADO_PLATFORM},
+   {"Redcloud", REDCLOUD_PLATFORM},
+   {"Other", OTHER_PLATFORM}
+};
+
+#define NUM_SYS_BOARD_TYPES sizeof(Sys_board_info_array)/sizeof(SYS_BOARD_INFO)
+
+static int Num_sys_board_type = NUM_SYS_BOARD_TYPES;
+SYS_BOARD_INFO *Sys_board_array_base = Sys_board_info_array;
+int FindStringInSeg(unsigned int, char *);
+static unsigned char get_sys_board_type(SYS_BOARD_INFO *, SYS_BOARD_INFO *);
+
+#if defined(linux) && !defined(__KERNEL__)
+#if !defined(XFree86Server)
+static void protected_mode_access(unsigned int, unsigned int,
+				  unsigned long, unsigned char *);
+static void setup_pma();
+static void close_pma();
+static int fd;
+#endif /* IN_MODULE */
+#endif /* __KERNEL__ */
+
+/* Detect the Platform */
+int
+Detect_Platform(void)
+{
+#if defined(linux) && !defined(__KERNEL__)
+#if !defined(XFree86Server)
+   setup_pma();
+#endif /* IN_MODULE */
+#endif /* __KERNEL__ */
+
+   /* See if we can find the board name using Xpressrom */
+   if (get_sys_board_type(&Sys_info, Sys_board_array_base) == TRUE) {
+#if 0
+      if (Sys_info.sys_board == CENTAURUS_PLATFORM) {
+	 printk("CENTAURUS Platform Found\n");
+      } else if (Sys_info.sys_board == DORADO_PLATFORM) {
+	 printk("DORADO Platform Found \n");
+      } else {
+	 printk("UNKNOWN Platform Found \n");
+      }
+#endif
+   }
+#if defined(linux) && !defined(__KERNEL__)
+#if !defined(XFree86Server)
+   close_pma();
+#endif /* IN_MODULE */
+#endif /* __KERNEL__ */
+
+   return (Sys_info.sys_board);
+}
+
+static int
+Strncmp(char *str1, char *str2, int len)
+{
+   int i;
+
+   if ((str1 == 0x0) || (str2 == 0x0) || (len == 0))
+      return (1);
+   for (i = 0; i < len; i++) {
+      if (*(str1 + i) > *(str2 + i)) {
+	 return 1;
+      } else if (*(str1 + i) < *(str2 + i)) {
+	 return -1;
+      }
+   }
+   return 0;
+}
+
+static char *
+Strcpy(char *dst, char *src)
+{
+   int i;
+
+   if ((dst == 0x0) || (src == 0x0))
+      return (0);
+   for (i = 0; src[i] != 0x0; i++) {
+      dst[i] = src[i];
+   }
+   dst[i] = 0x0;			/* NULL termination */
+   return dst;
+}
+
+static int
+Strlen(char *str)
+{
+   int i;
+
+   if (str == 0x0)
+      return 0;
+   for (i = 0; str[i] != 0x0; i++) ;
+   return i;
+}
+
+/***********************************************************************/
+
+/* Platform Detection Code */
+
+/***********************************************************************/
+
+/************************************************************************
+ * int FindStringInSeg( unsigned int segment_address, char *string_ptr )
+ * Returns the offset where the NULL terminated string pointed to by 
+ * string_ptr is located in the segment passed in segment_address.
+ * Segment_address must be of the form 0xXXXX (i.e 0xf000 for segment f).
+ * Returns NULL if the string is not found.
+ ************************************************************************
+ */
+int
+FindStringInSeg(unsigned int segment_address, char *string_ptr)
+{
+   int string_length = Strlen(string_ptr);
+   char *psegment_buf;
+   unsigned long mem_ptr = (unsigned long)segment_address << 16;
+   char segment_buffer[SEGMENT_LENGTH + 1];
+   int i, cursor;
+
+   /* silence compiler */
+   (void)cursor;
+   (void)mem_ptr;
+   (void)segment_buffer;
+
+#if defined(linux) && !defined(XFree86Server)
+#ifdef __KERNEL__
+   XpressROMPtr = (unsigned char *)ioremap(mem_ptr, SEGMENT_LENGTH + 1);
+   psegment_buf = (char *)XpressROMPtr;
+#else
+   /* Fill the segment_buffer with 16 page accesses */
+
+   for (cursor = 0; (cursor * PAGE_LENGTH) < SEGMENT_LENGTH; cursor++) {
+      protected_mode_access(PLT_READ_BYTES, PAGE_LENGTH, mem_ptr +
+			    (cursor * PAGE_LENGTH),
+			    &(segment_buffer[(cursor * PAGE_LENGTH)]));
+   }
+   psegment_buf = segment_buffer;
+#endif /* __KERNEL__ */
+#elif defined (XFree86Server)
+   psegment_buf = (char *)XpressROMPtr;
+#elif defined(_WIN32)			/* Windows */
+   psegment_buf = XpressROMPtr;
+#endif
+
+   /* Now search for the first character of the string_ptr */
+   for (i = 0; i < SEGMENT_LENGTH + 1; i++) {
+      if (*(psegment_buf + i) == *string_ptr) {
+
+	 /* If we match the first character, do a
+	  * string compare.
+	  */
+
+	 if (!Strncmp(string_ptr, (psegment_buf + i), string_length)) {
+	    /* They match! */
+	    return (1);
+	 }
+      }
+   }
+   /* if we got this far we didn't find anything.  Return NULL. */
+   return (0);
+
+}					/* end FindStringInSeg() */
+
+/**********************************************************************
+
+ * TRUE_FALSE get_sys_board_type( SYS_BOARD_INFO *sys_info,
+ * SYS_BOARD_INFO *sys_board_array_base)  Checks the system
+ * BIOS area for Xpressrom information. If found, searches the  BIOS 
+ * area for one of names in the array pointed to by sys_board_array_ptr.
+ * If a match is found, sets the SYS_INFO system_board_name string 
+ * and the system_board variable to the board name and returns TRUE. 
+ * If Xpressrom or a board is not found, sets the variables to 
+ * their default values and returns FALSE.
+ * Uses the global string pointer *xpress_rom_string_ptr.
+ *
+ ***********************************************************************
+ */
+
+static unsigned char
+get_sys_board_type(SYS_BOARD_INFO * sys_info,
+		   SYS_BOARD_INFO * sys_board_array_base)
+{
+   int index;
+   char *xpress_rom_string_ptr = "XpressStart";
+   unsigned int segment = LINUX_ROM_SEGMENT;
+
+   /* See if XpressStart is present in the BIOS area. 
+    * If it is, search for a board string.  If not, Xpressrom is 
+    * not present, set system_board information to UNKNOWN and 
+    * return FALSE. 
+    */
+
+   if (!FindStringInSeg(segment, xpress_rom_string_ptr)) {
+      sys_info->sys_board = PLT_UNKNOWN;
+      Strcpy(sys_info->sys_board_name, "Unknown");
+      return (FALSE);
+   } else {
+
+      /* we have Xpressrom, so look for a board */
+      for (index = 0; index < Num_sys_board_type; index++) {
+	 if (!FindStringInSeg(segment, (sys_board_array_base +
+					index)->sys_board_name)) {
+	    continue;
+	 } else {
+
+	    /* a match!! */
+	    sys_info->sys_board = (sys_board_array_base + index)->sys_board;
+	    Strcpy(sys_info->sys_board_name,
+		   (sys_board_array_base + index)->sys_board_name);
+	    return (TRUE);
+	 }
+      }					/* end for() */
+   }					/* end else */
+
+   /* if we are here we have failed */
+   sys_info->sys_board = PLT_UNKNOWN;
+   Strcpy(sys_info->sys_board_name, "Unknown");
+   return (FALSE);
+}					/* end get_sys_board_type() */
+
+#if defined(linux) && !defined(__KERNEL__)
+#if !defined(XFree86Server)
+
+/******************************************************************
+ *
+ * protected_mode_access( unsigned int mode, unsigned int width,
+ * unsigned long addr, unsigned char* pdata )
+ * This function provides access to physical memory
+ * at the requested address.
+ * mode is: PLT_READ or PLT_WRITE (accesses a single byte, word 
+ * or double word depending on the value of "width". 
+ * Only 1, 2 or 4 supported).
+ * PLT_READ_BYTES, PLT_WRITE_BYTES accesses "width" number 
+ * of bytes (8 bits)
+ * PLT_READ_WORDS, PLT_WRITE_WORDS accesses "width" number
+ * of words (16 bits) PLT_READ_DWORDS, PLT_WRITE_DWORDS accesses 
+ * "width" number of dwords (32 bits)
+ * width is: The size of the access.  
+ * For PLT_READ or PLT_WRITE, only 1, 2 and 4 are
+ * supported.  For other modes, width is not limited but 
+ * will cause paging if the block traverses page boundaries.  
+ * addr is: The physical address being accessed
+ * pdata is: A pointer to the data to be read or written into.
+ * NOTE! WORD or DWORD accesses can only be made on 
+ * WORD or DWORD boundaries!
+ *
+ ******************************************************************
+ */
+
+static void
+protected_mode_access(unsigned int mode, unsigned int width,
+		      unsigned long addr, unsigned char *pdata)
+{
+
+#define PMTRASH 0x12345678L
+
+   unsigned long base;			/* The physical page address */
+   int length = 0x1000;			/* the page size is 4k */
+   unsigned int offset = 0;		/* The physical addr offset into page */
+   unsigned int index = 0;		/* Used to read/write from/to a block */
+   unsigned int chunk = 0;		/* The amount to read/wr from THIS block */
+   unsigned int size = 0;		/* Data size shift value (to avoid math) */
+   static void *ptr;			/* pointer to real memory location. */
+
+   static unsigned long lastbase = PMTRASH;
+
+   /* temp storage of previous base used. */
+   /* type specific buffer pointers */
+   unsigned char *byte_data = (unsigned char *)pdata;
+   unsigned int *word_data = (unsigned int *)pdata;
+   unsigned long *dword_data = (unsigned long *)pdata;
+
+   switch (mode) {
+
+   case PLT_READ_WORDS:
+   case PLT_WRITE_WORDS:
+
+      size = 1;
+      break;
+
+   case PLT_READ_DWORDS:
+   case PLT_WRITE_DWORDS:
+
+      size = 2;
+   }
+
+   /* Check if we're in the user accessable range */
+   if (addr < 0xFF000000L) {
+
+      /* We get physical memory in "pages", defined by the 
+       * following "base" address and the "offset" into it.
+       * "base" will be used with mmap to get "ptr", which 
+       * points to the memory mapped actual physical memory at 
+       * the address pointed-to by "base". 
+       * "width" and "chunk" are in units of whatever data 
+       * type we're reading.  
+       * "length" and "offset" are in units of bytes.  
+       * "width" and "chunk" must be adjusted with "<<size" 
+       * to use with "length" or "offset".  Similarly, the 
+       * result must be adjusted with ">>size" to make into the 
+       * proper type units when done.
+       */
+      base = addr & 0xFFFFF000L;
+      offset = addr & 0x00000FFFL;
+      do {
+	 if ((offset + (width << size)) > length) {
+
+	    /* Block being read extends beyond the 
+	     * page boundary. Adjust things. 
+	     */
+	    chunk = (length - offset) >> size;
+
+	    /* Figure the chunk size */
+	    width -= chunk;
+
+	    /* Reduce width by the current chunk */
+	 } else {
+
+	    /* Block being read is within the 
+	     * page boundary.
+	     */
+	    chunk = width;
+	    width = 0;
+
+	    /* set to zero so we'll exit at the end */
+
+	 }
+	 /* We keep the page around in case we need to
+	  * access it again.
+	  * This saves us some time if we have consecutive 
+	  * accesses.
+	  */
+
+	 if (base != lastbase) {
+
+	    /* we haven't mmap'd this address 
+	     * Have to get a new page.  Free the
+	     * previous page, if it's valid  (ie, not 
+	     * PMTRASH). If not, unmap it and get the 
+	     * new page. 
+	     */
+	    if (lastbase != PMTRASH)
+	       munmap(ptr, length);
+	    ptr = mmap(NULL, length, PROT_READ | PROT_WRITE, MAP_SHARED, fd,
+		       base);
+	    if ((int)ptr == -1) {
+	       lastbase = PMTRASH;
+	       return;			/* error */
+	    }
+	 }
+
+	 /* Now we're ready to get the data.  
+	  * It's pure memory access now, no funny 
+	  * function calls, however we do cast things to get 
+	  * the right size data.
+	  */
+
+	 /* Scale the offset for the data type size */
+	 index = offset >> size;
+
+	 /* Note that the above line and below lines, 
+	  * which shift "offset", discard address information 
+	  * if you happen to be trying to write, for example,
+	  * dwords on non-dword boundaries.
+	  */
+	 /* Note that cases PLT_READ and PLT_WRITE don't 
+	  * use "index". They shift "offset"  on their own. 
+	  * This is because in PLT_READ and PLT_WRITE modes, 
+	  * the information on the size of the data 
+	  * transaction is in the "width" variable not "size".
+	  * We also need separate cases to cast the values 
+	  * right. 
+	  */
+	 switch (mode) {
+
+	 case PLT_READ:{
+
+	       switch (chunk) {
+
+	       case FOUR_BYTES:
+
+		  *(dword_data) = (unsigned long)
+			(*(((unsigned long *)ptr) + (offset >> 2)));
+		  break;
+
+	       case TWO_BYTES:
+
+		  *(word_data) = (unsigned int)
+			(*(((unsigned int *)ptr) + (offset >> 1)));
+		  break;
+
+	       default:
+
+		  *(byte_data) = (unsigned char)
+			(*(((unsigned char *)ptr) + (offset)));
+		  break;
+
+	       }			/* end switch() */
+	       break;
+
+	    }				/* end case PLT_READ */
+
+	 case PLT_WRITE:{
+
+	       switch (chunk) {
+
+	       case FOUR_BYTES:
+
+		  *(((unsigned long *)ptr) + (offset >> 2)) = *dword_data;
+		  break;
+
+	       case TWO_BYTES:
+
+		  *(((unsigned int *)ptr) + (offset >> 1)) = *word_data;
+		  break;
+
+	       default:
+
+		  *(((unsigned char *)ptr) + (offset)) = *byte_data;
+		  break;
+	       }			/* end switch() */
+	       break;
+
+	    }				/* end case PLT_WRITE */
+
+	 case PLT_READ_BYTES:{
+
+	       for (; chunk > 0; chunk--) {
+
+		  *(byte_data++) = (unsigned char)(*(((unsigned char *)ptr) +
+						     (index++)));
+	       }
+	       break;
+	    }				/* end case PLT_READ_BYTES */
+
+	 case PLT_WRITE_BYTES:{
+
+	       for (; chunk > 0; chunk--) {
+		  *(((unsigned char *)ptr) + (index++)) = *(byte_data++);
+	       }
+	       break;
+
+	    }				/* end case PLT_WRITE_BYTES */
+
+	 case PLT_READ_WORDS:{
+
+	       for (; chunk > 0; chunk--) {
+
+		  *(word_data++) = (unsigned int)
+			(*(((unsigned int *)ptr) + (index++)));
+	       }
+	       break;
+
+	    }				/* end case PLT_READ_WORDS */
+
+	 case PLT_WRITE_WORDS:{
+
+	       for (; chunk > 0; chunk--) {
+
+		  *(((unsigned int *)ptr) + (index++)) = *(word_data++);
+	       }
+	       break;
+
+	    }				/* end case PLT_WRITE_WORDS */
+
+	 case PLT_READ_DWORDS:{
+
+	       for (; chunk > 0; chunk--) {
+
+		  *(dword_data++) = (*(((unsigned long *)ptr) + (index++)));
+	       }
+	       break;
+
+	    }				/* end case PLT_READ_DWORDS */
+
+	 case PLT_WRITE_DWORDS:{
+
+	       for (; chunk > 0; chunk--) {
+
+		  *(((unsigned long *)ptr) + (index++))
+			= *(dword_data++);
+	       }
+	       break;
+
+	    }				/* end case PLT_WRITE_DWORDS */
+
+	 }				/* end switch(mode) */
+
+	 lastbase = base;
+
+	 /* Save the page we've just processed. */
+
+	 if (width) {
+
+	    /* If there's still width left to get. */
+
+	    base += length;
+	    /* Increment to the next page. */
+
+	    offset = 0;
+	    /* Set the offset to zero. */
+	 }
+
+      } while (width);			/* While there's still data to get. */
+      return;
+
+   } /* end for if addr */
+   else {
+
+      printf("PMA error: Unable to read ROM address space\n");
+      exit(1);
+   }
+   return;
+}
+
+/************************************************************************
+ * setup_pma() loads the ROM memory access module and initializes 
+ * memory access file descriptor (access is handled through a file-like 
+ * interface).
+ ************************************************************************
+ */
+static void
+setup_pma()
+{
+   fd = open("/dev/mem", 2);		/*  O_RDWR */
+   if (fd == -1) {
+
+      printf("Error: Unable to open /dev/mem !\a\n");
+      exit(1);
+   }
+   return;
+}
+
+/**********************************************************************
+ * close_pma() cleans up the open memory access devices and file 
+ * descriptors.
+ **********************************************************************
+ */
+static void
+close_pma()
+{
+   close(fd);
+   return;
+}
+#endif /* IN_MODULE */
+#endif /* linux && !__KERNEL__ */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/panel/pnl_bios.c b/xc/programs/Xserver/hw/xfree86/drivers/nsc/panel/pnl_bios.c
index c6ed02200..8ccfa06d0 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/panel/pnl_bios.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/panel/pnl_bios.c
@@ -1,7 +1,7 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/panel/pnl_bios.c,v 1.1 2002/10/11 14:33:02 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/panel/pnl_bios.c,v 1.3 2003/01/14 09:34:36 alanh Exp $ */
 /*
  * $Workfile: pnl_bios.c $
- * $Revision: 1.1.1.1 $
+ * $Revision: 1.2.2.1 $
  *
  * File Contents: This file panel functions which query for the BIOS for current FP 
  *                Paramters.
@@ -141,10 +141,11 @@
 
 #include "panel.h"
 
+#if defined(_WIN32)			/* windows */
 extern unsigned long gfx_cpu_version;
 extern void gfx_outw(unsigned short port, unsigned short data);
 extern unsigned short gfx_inw(unsigned short port);
-
+#endif
 
 #define SOFTVGA_DISPLAY_ENABLE   0x50
 #define SOFTVGA_FPRESOLUTION     0x52
@@ -155,24 +156,24 @@ extern unsigned short gfx_inw(unsigned short port);
 #define VR_INDEX                0xAC1C
 #define VR_DATA                 0xAC1E
 #define VR_UNLOCK               0xFC53
-#define VRC_VG                  0x0002   /* SoftVG Virtual Register Class    */
-#define VG_MEM_SIZE             0x0000   /* MemSize Virtual Register */
+#define VRC_VG                  0x0002	/* SoftVG Virtual Register Class    */
+#define VG_MEM_SIZE             0x0000	/* MemSize Virtual Register */
 #define FP_DETECT_MASK          0x8000
 
-#define VG_FP_TYPE      0x0002   /* Flat Panel Info Virtual Register */
+#define VG_FP_TYPE      0x0002		/* Flat Panel Info Virtual Register */
 
-#define FP_DEV_MASK     0x0003   /* Flat Panel type */
-#define FP_TYPE_SSTN	0x0000	/* SSTN panel type value */
-#define FP_TYPE_DSTN	0x0001	/* DSTN panel type value */
+#define FP_DEV_MASK     0x0003		/* Flat Panel type */
+#define FP_TYPE_SSTN	0x0000		/* SSTN panel type value */
+#define FP_TYPE_DSTN	0x0001		/* DSTN panel type value */
 #define FP_TYPE_TFT		0x0002	/* TFT panel type value */
-#define FP_TYPE_LVDS	0x0003	/* LVDS panel type value */
+#define FP_TYPE_LVDS	0x0003		/* LVDS panel type value */
 
 #define FP_RESOLUTION_MASK      0x0038
 #define FP_RES_6X4		0x0000	/* 640x480 resolution value */
 #define FP_RES_8X6		0x0008	/* 800x600 resolution value */
 #define FP_RES_10X7		0x0010	/* 1024x768 resolution value */
-#define FP_RES_12X10	0x0018	/* 1280x1024 resolution value */
-#define FP_RES_16X12	0x0020	/* 1600x1200 resolution value */
+#define FP_RES_12X10	0x0018		/* 1280x1024 resolution value */
+#define FP_RES_16X12	0x0020		/* 1600x1200 resolution value */
 
 #define FP_WIDTH_MASK   0x01C0
 #define FP_WIDTH_8		0x0000	/* 8 bit data bus width */
@@ -183,20 +184,20 @@ extern unsigned short gfx_inw(unsigned short port);
 #define FP_WIDTH_16		0x0140	/* 16 bit data bus width - 16 bit Mono DSTN only */
 
 #define FP_COLOR_MASK   0x0200
-#define FP_COLOR_COLOR	0x0000	/* Color panel */
-#define FP_COLOR_MONO	0x0200	/* Mono Panel */
+#define FP_COLOR_COLOR	0x0000		/* Color panel */
+#define FP_COLOR_MONO	0x0200		/* Mono Panel */
 
 #define FP_PPC_MASK     0x0400
 #define FP_PPC_1PPC		0x0000	/* One pixel per clock */
 #define FP_PPC_2PPC		0x0400	/* Two pixels per clock */
 
 #define FP_HPOL_MASK    0x0800
-#define	FP_H_POL_LGH	0x0000	/* HSync at panel, normally low, active high */
-#define FP_H_POL_HGL	0x0800	/* HSync at panel, normally high, active low */
+#define	FP_H_POL_LGH	0x0000		/* HSync at panel, normally low, active high */
+#define FP_H_POL_HGL	0x0800		/* HSync at panel, normally high, active low */
 
 #define FP_VPOL_MASK    0x1000
-#define FP_V_POL_LGH	0x0000	/* VSync at panel, normally low, active high */
-#define FP_V_POL_HGL	0x1000	/* VSync at panel, normally high, active low */
+#define FP_V_POL_LGH	0x0000		/* VSync at panel, normally low, active high */
+#define FP_V_POL_HGL	0x1000		/* VSync at panel, normally high, active low */
 
 #define FP_REF_MASK     0xD000
 #define FP_REF_60		0x0000	/* 60Hz refresh rate */
@@ -206,7 +207,6 @@ extern unsigned short gfx_inw(unsigned short port);
 #define FP_REF_75		0x8000	/* 75Hz refresh rate */
 #define FP_REF_85		0xA000	/* 85Hz refresh rate */
 
-
 /*-----------------------------------------------------------------
  * Pnl_IsPanelEnabledInBIOS
  *
@@ -215,31 +215,32 @@ extern unsigned short gfx_inw(unsigned short port);
  *  parameters: none.
  *      return: 1 - Enabled, 0 - Disabled
  *-----------------------------------------------------------------*/
-int Pnl_IsPanelEnabledInBIOS(void)
+int
+Pnl_IsPanelEnabledInBIOS(void)
 {
-	unsigned char ret=0;
-
-	if ((gfx_cpu_version & 0xFF) == GFX_CPU_REDCLOUD)
-	{
-		unsigned short data;
-		gfx_outw(VR_INDEX, VR_UNLOCK);
-		gfx_outw(VR_INDEX, (VRC_VG << 8) | VG_MEM_SIZE);
-		data = gfx_inw(VR_DATA);
-		if(data & FP_DETECT_MASK)
-			ret = 1;
-	} else
-	{
-		unsigned short crtcindex, crtcdata;
-		crtcindex = (gfx_inb(0x3CC) & 0x01) ? 0x3D4 : 0x3B4;
-		crtcdata = crtcindex + 1;	
-
-		/* CHECK DisplayEnable Reg in SoftVGA */
-
-		gfx_outb(crtcindex, (unsigned char) SOFTVGA_DISPLAY_ENABLE);
-		ret = gfx_inb(crtcdata);
-	}
-
-	return(ret & 0x1);
+   unsigned char ret = 0;
+
+   if ((gfx_cpu_version & 0xFF) == GFX_CPU_REDCLOUD) {
+      unsigned short data;
+
+      gfx_outw(VR_INDEX, VR_UNLOCK);
+      gfx_outw(VR_INDEX, (VRC_VG << 8) | VG_MEM_SIZE);
+      data = gfx_inw(VR_DATA);
+      if (data & FP_DETECT_MASK)
+	 ret = 1;
+   } else {
+      unsigned short crtcindex, crtcdata;
+
+      crtcindex = (gfx_inb(0x3CC) & 0x01) ? 0x3D4 : 0x3B4;
+      crtcdata = crtcindex + 1;
+
+      /* CHECK DisplayEnable Reg in SoftVGA */
+
+      gfx_outb(crtcindex, (unsigned char)SOFTVGA_DISPLAY_ENABLE);
+      ret = gfx_inb(crtcdata);
+   }
+
+   return (ret & 0x1);
 }
 
 /*-----------------------------------------------------------------
@@ -254,130 +255,123 @@ int Pnl_IsPanelEnabledInBIOS(void)
  *          hz: vertical frequency of the panel configured
  *      return: none
  *-----------------------------------------------------------------*/
-void Pnl_GetPanelInfoFromBIOS(int *xres, int *yres, int *bpp, int *hz)
+void
+Pnl_GetPanelInfoFromBIOS(int *xres, int *yres, int *bpp, int *hz)
 {
-	unsigned short crtcindex, crtcdata;
-	unsigned short ret;
-
-	if ((gfx_cpu_version & 0xFF) == GFX_CPU_REDCLOUD)
-	{
-		gfx_outw(VR_INDEX, VR_UNLOCK);
-		gfx_outw(VR_INDEX, (VRC_VG << 8) | VG_FP_TYPE);
-		ret = gfx_inw(VR_DATA);
-		switch(ret & FP_RESOLUTION_MASK)
-		{
-			case FP_RES_6X4:
-				*xres = 640;
-				*yres = 480;
-				break;
-			case FP_RES_8X6:
-				*xres = 800;
-				*yres = 600;
-				break;
-			case FP_RES_10X7:
-				*xres = 1024;
-				*yres = 768;
-				break;
-			case FP_RES_12X10:
-				*xres = 1280;
-				*yres = 1024;
-				break;
-			case FP_RES_16X12:
-				*xres = 1600;
-				*yres = 1200;
-				break;
-		}
-
-		switch(ret & FP_WIDTH_MASK)
-		{
-			case FP_WIDTH_8:
-				*bpp = 8;
-				break;
-			case FP_WIDTH_9:
-				*bpp = 9;
-				break;
-			case FP_WIDTH_12:
-				*bpp = 12;
-				break;
-			case FP_WIDTH_18:
-				*bpp = 18;
-				break;
-			case FP_WIDTH_24:
-				*bpp = 24;
-				break;
-			case FP_WIDTH_16:
-				*bpp = 16;
-				break;
-		}
-
-		switch(ret & FP_REF_MASK)
-		{
-			case FP_REF_60:
-				*hz = 60;
-				break;
-			case FP_REF_65:
-				*hz = 65;
-				break;
-			case FP_REF_70:
-				*hz = 70;
-				break;
-			case FP_REF_72:
-				*hz = 72;
-				break;
-			case FP_REF_75:
-				*hz = 75;
-				break;
-			case FP_REF_85:
-				*hz = 85;
-				break;
-		}
-
-
-	} else
-	{
-		crtcindex = (gfx_inb(0x3CC) & 0x01) ? 0x3D4 : 0x3B4;
-		crtcdata = crtcindex + 1;	
-
-		/* CHECK FPResolution Reg in SoftVGA */
-
-		gfx_outb(crtcindex, (unsigned char) SOFTVGA_FPRESOLUTION);
-		ret = gfx_inb(crtcdata);
-		
-		switch (ret & 0x3) {
-		case 0:
-			*xres = 640;
-			*yres = 480;
-			break;
-		case 1:
-			*xres = 800;
-			*yres = 600;
-			break;
-		case 2:
-			*xres = 1024;
-			*yres = 768;
-		break;
-		}
-
-		switch ((ret >> 4) & 0x3) {
-		case 0:
-			*bpp = 12;
-			break;
-		case 1:
-			*bpp = 18;
-			break;
-		case 2:
-			*bpp = 16;
-			break;
-		case 3:
-			*bpp = 8;
-			break;
-		}
-
-		/* CHECK FPClockFrequency Reg in SoftVGA */
-
-		gfx_outb(crtcindex, (unsigned char) SOFTVGA_FPCLOCKFREQUENCY);
-		*hz = gfx_inb(crtcdata);
-	}
+   unsigned short crtcindex, crtcdata;
+   unsigned short ret;
+
+   if ((gfx_cpu_version & 0xFF) == GFX_CPU_REDCLOUD) {
+      gfx_outw(VR_INDEX, VR_UNLOCK);
+      gfx_outw(VR_INDEX, (VRC_VG << 8) | VG_FP_TYPE);
+      ret = gfx_inw(VR_DATA);
+      switch (ret & FP_RESOLUTION_MASK) {
+      case FP_RES_6X4:
+	 *xres = 640;
+	 *yres = 480;
+	 break;
+      case FP_RES_8X6:
+	 *xres = 800;
+	 *yres = 600;
+	 break;
+      case FP_RES_10X7:
+	 *xres = 1024;
+	 *yres = 768;
+	 break;
+      case FP_RES_12X10:
+	 *xres = 1280;
+	 *yres = 1024;
+	 break;
+      case FP_RES_16X12:
+	 *xres = 1600;
+	 *yres = 1200;
+	 break;
+      }
+
+      switch (ret & FP_WIDTH_MASK) {
+      case FP_WIDTH_8:
+	 *bpp = 8;
+	 break;
+      case FP_WIDTH_9:
+	 *bpp = 9;
+	 break;
+      case FP_WIDTH_12:
+	 *bpp = 12;
+	 break;
+      case FP_WIDTH_18:
+	 *bpp = 18;
+	 break;
+      case FP_WIDTH_24:
+	 *bpp = 24;
+	 break;
+      case FP_WIDTH_16:
+	 *bpp = 16;
+	 break;
+      }
+
+      switch (ret & FP_REF_MASK) {
+      case FP_REF_60:
+	 *hz = 60;
+	 break;
+      case FP_REF_65:
+	 *hz = 65;
+	 break;
+      case FP_REF_70:
+	 *hz = 70;
+	 break;
+      case FP_REF_72:
+	 *hz = 72;
+	 break;
+      case FP_REF_75:
+	 *hz = 75;
+	 break;
+      case FP_REF_85:
+	 *hz = 85;
+	 break;
+      }
+
+   } else {
+      crtcindex = (gfx_inb(0x3CC) & 0x01) ? 0x3D4 : 0x3B4;
+      crtcdata = crtcindex + 1;
+
+      /* CHECK FPResolution Reg in SoftVGA */
+
+      gfx_outb(crtcindex, (unsigned char)SOFTVGA_FPRESOLUTION);
+      ret = gfx_inb(crtcdata);
+
+      switch (ret & 0x3) {
+      case 0:
+	 *xres = 640;
+	 *yres = 480;
+	 break;
+      case 1:
+	 *xres = 800;
+	 *yres = 600;
+	 break;
+      case 2:
+	 *xres = 1024;
+	 *yres = 768;
+	 break;
+      }
+
+      switch ((ret >> 4) & 0x3) {
+      case 0:
+	 *bpp = 12;
+	 break;
+      case 1:
+	 *bpp = 18;
+	 break;
+      case 2:
+	 *bpp = 16;
+	 break;
+      case 3:
+	 *bpp = 8;
+	 break;
+      }
+
+      /* CHECK FPClockFrequency Reg in SoftVGA */
+
+      gfx_outb(crtcindex, (unsigned char)SOFTVGA_FPCLOCKFREQUENCY);
+      *hz = gfx_inb(crtcdata);
+   }
 }
-
-
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/panel/pnl_defs.h b/xc/programs/Xserver/hw/xfree86/drivers/nsc/panel/pnl_defs.h
index 4ea750452..37a37c712 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/panel/pnl_defs.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/panel/pnl_defs.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/panel/pnl_defs.h,v 1.1 2002/10/11 14:33:02 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/panel/pnl_defs.h,v 1.1 2002/12/10 15:12:28 alanh Exp $ */
 /*
  * $Workfile: pnl_defs.h $
  *
@@ -141,18 +141,20 @@
 #ifndef _pnl_defs_h
 #define _pnl_defs_h
 
-typedef enum {
-	MARMOT_PLATFORM=0,
-	UNICORN_PLATFORM,
-	CENTAURUS_PLATFORM,
-	ARIES_PLATFORM,
-	CARMEL_PLATFORM,
-	HYDRA_PLATFORM,
-	DORADO_PLATFORM,
-	DRACO_PLATFORM,
-	REDCLOUD_PLATFORM,
-	OTHER_PLATFORM
-} SYS_BOARD;
+typedef enum
+{
+   MARMOT_PLATFORM = 0,
+   UNICORN_PLATFORM,
+   CENTAURUS_PLATFORM,
+   ARIES_PLATFORM,
+   CARMEL_PLATFORM,
+   HYDRA_PLATFORM,
+   DORADO_PLATFORM,
+   DRACO_PLATFORM,
+   REDCLOUD_PLATFORM,
+   OTHER_PLATFORM
+}
+SYS_BOARD;
 
 #define PNL_9210             0x01
 #define PNL_9211_A           0x02
@@ -178,21 +180,23 @@ typedef enum {
 
 typedef struct _Pnl_PanelStat_
 {
-	int Type;
-	int XRes;
-	int YRes;
-	int Depth;
-	int MonoColor;
-} Pnl_PanelStat;
+   int Type;
+   int XRes;
+   int YRes;
+   int Depth;
+   int MonoColor;
+}
+Pnl_PanelStat;
 
 typedef struct _Pnl_Params_
 {
-	unsigned long Flags;
-	int PanelPresent;
-	int Platform;
-	int PanelChip;
-	Pnl_PanelStat PanelStat;
-} Pnl_PanelParams, *PPnl_PanelParams;
+   unsigned long Flags;
+   int PanelPresent;
+   int Platform;
+   int PanelChip;
+   Pnl_PanelStat PanelStat;
+}
+Pnl_PanelParams, *PPnl_PanelParams;
 
 #endif /* _pnl_defs_h */
 
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/panel/pnl_init.c b/xc/programs/Xserver/hw/xfree86/drivers/nsc/panel/pnl_init.c
index 341fcad43..532b42d29 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/panel/pnl_init.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/panel/pnl_init.c
@@ -1,7 +1,7 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/panel/pnl_init.c,v 1.1 2002/10/11 14:33:02 alanh Exp $ */ 
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/panel/pnl_init.c,v 1.1 2002/12/10 15:12:28 alanh Exp $ */
 /*
  * $Workfile: pnl_init.c $
- * $Revision: 1.1.1.1 $
+ * $Revision: 1.2.2.1 $
  *
  * File Contents: This file contains the Geode frame buffer panel 
  *                intialization functions.
@@ -138,7 +138,6 @@
  * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 
  *
  * END_NSC_LIC_GPL */
-  
 
 #include "panel.h"
 #include "gfx_regs.h"
@@ -153,9 +152,9 @@ XResxYRes : 800x600
 Depth : 16
 Mono_Color : Color
 */
-static Pnl_PanelParams sPanelParam={
-	0, 1, CENTAURUS_PLATFORM, PNL_9211_A,
-	{ PNL_DSTN, 800, 600, 16, PNL_COLOR_PANEL}
+static Pnl_PanelParams sPanelParam = {
+   0, 1, CENTAURUS_PLATFORM, PNL_9211_A,
+   {PNL_DSTN, 800, 600, 16, PNL_COLOR_PANEL}
 };
 
 #if PLATFORM_DRACO
@@ -182,7 +181,6 @@ static Pnl_PanelParams sPanelParam={
  *	2 - Dorado has 9211 Rev. C
  */
 
-
 /*-----------------------------------------------------------------
  * Pnl_SetPlatform
  *
@@ -191,10 +189,11 @@ static Pnl_PanelParams sPanelParam={
  *    platform:	It specify the platform.
  *      return:	none.
  *-----------------------------------------------------------------*/
-void Pnl_SetPlatform(int platform)
+void
+Pnl_SetPlatform(int platform)
 {
-	/* To Be Implemented */
-	sPanelParam.Platform = platform;
+   /* To Be Implemented */
+   sPanelParam.Platform = platform;
 
 }
 
@@ -205,7 +204,8 @@ void Pnl_SetPlatform(int platform)
  *  parameters:	none.
  *      return:	On success it returns the panel platform.
  *-----------------------------------------------------------------*/
-int Pnl_GetPlatform(void)
+int
+Pnl_GetPlatform(void)
 {
    sPanelParam.Platform = Detect_Platform();
 
@@ -221,10 +221,11 @@ int Pnl_GetPlatform(void)
  *  parameters: none.
  *      return: On success it returns an integer panel present value.
  *-----------------------------------------------------------------*/
-int Pnl_IsPanelPresent(void)
+int
+Pnl_IsPanelPresent(void)
 {
-	/* To Be Implemented */
-	return sPanelParam.PanelPresent;
+   /* To Be Implemented */
+   return sPanelParam.PanelPresent;
 }
 
 /*-----------------------------------------------------------------
@@ -235,10 +236,11 @@ int Pnl_IsPanelPresent(void)
  *     present:	It specifies the panel present value.
  *      return:	none.
  *-----------------------------------------------------------------*/
-void Pnl_SetPanelPresent(int present)
+void
+Pnl_SetPanelPresent(int present)
 {
-	/* To Be Implemented */
-	sPanelParam.PanelPresent = present;
+   /* To Be Implemented */
+   sPanelParam.PanelPresent = present;
 }
 
 /*-----------------------------------------------------------------
@@ -250,24 +252,25 @@ void Pnl_SetPanelPresent(int present)
  *				structure.
  *      return:	none.
  *-----------------------------------------------------------------*/
-void Pnl_SetPanelParam(PPnl_PanelParams pParam)
+void
+Pnl_SetPanelParam(PPnl_PanelParams pParam)
 {
-	if (pParam->Flags & PNL_PANELPRESENT) {
-		Pnl_SetPanelPresent(pParam->PanelPresent);
-	}
-	if (pParam->Flags & PNL_PLATFORM) {
-		Pnl_SetPlatform(pParam->Platform);
-	}
-	if (pParam->Flags & PNL_PANELCHIP) {
-		Pnl_SetPanelChip(pParam->PanelChip);
-	}
-	if(pParam->Flags & PNL_PANELSTAT) {
-		sPanelParam.PanelStat.XRes = pParam->PanelStat.XRes;
-		sPanelParam.PanelStat.YRes = pParam->PanelStat.YRes;
-		sPanelParam.PanelStat.Depth = pParam->PanelStat.Depth;
-		sPanelParam.PanelStat.MonoColor = pParam->PanelStat.MonoColor;
-		sPanelParam.PanelStat.Type = pParam->PanelStat.Type;
-	}
+   if (pParam->Flags & PNL_PANELPRESENT) {
+      Pnl_SetPanelPresent(pParam->PanelPresent);
+   }
+   if (pParam->Flags & PNL_PLATFORM) {
+      Pnl_SetPlatform(pParam->Platform);
+   }
+   if (pParam->Flags & PNL_PANELCHIP) {
+      Pnl_SetPanelChip(pParam->PanelChip);
+   }
+   if (pParam->Flags & PNL_PANELSTAT) {
+      sPanelParam.PanelStat.XRes = pParam->PanelStat.XRes;
+      sPanelParam.PanelStat.YRes = pParam->PanelStat.YRes;
+      sPanelParam.PanelStat.Depth = pParam->PanelStat.Depth;
+      sPanelParam.PanelStat.MonoColor = pParam->PanelStat.MonoColor;
+      sPanelParam.PanelStat.Type = pParam->PanelStat.Type;
+   }
 }
 
 /*-----------------------------------------------------------------
@@ -278,66 +281,62 @@ void Pnl_SetPanelParam(PPnl_PanelParams pParam)
  * parameters:	none.
  *     return:	none.
  *-----------------------------------------------------------------*/
-void Pnl_PowerUp(void)
+void
+Pnl_PowerUp(void)
 {
-	int Platform;
-	unsigned long dcfg, hw_video;
+   int Platform;
+   unsigned long dcfg, hw_video;
 
-	Platform = Pnl_GetPlatform();
+   Platform = Pnl_GetPlatform();
 
 #if PLATFORM_CENTAURUS
-	if (Platform == CENTAURUS_PLATFORM) {
-		Centaurus_Power_Up();
-		return;
-	}
+   if (Platform == CENTAURUS_PLATFORM) {
+      Centaurus_Power_Up();
+      return;
+   }
 #endif
 
 #if PLATFORM_DORADO
-	if (Platform == DORADO_PLATFORM) {
-		Dorado_Power_Up();
-		return;
-	}
+   if (Platform == DORADO_PLATFORM) {
+      Dorado_Power_Up();
+      return;
+   }
 #endif
 
-#if PLATFORM_GX2BASED		
-		if(Platform == REDCLOUD_PLATFORM) {
-		}
+#if PLATFORM_GX2BASED
+   if (Platform == REDCLOUD_PLATFORM) {
+   }
 #endif
 
-	hw_video = gfx_detect_video();
-
-	if(hw_video == GFX_VID_CS5530)
-	{
-		/* READ DISPLAY CONFIG FROM CX5530 */
-		dcfg = READ_VID32(CS5530_DISPLAY_CONFIG);
-
-		/* SET RELEVANT FIELDS */
-		dcfg |= (CS5530_DCFG_FP_PWR_EN | CS5530_DCFG_FP_DATA_EN);
-		/* Enable the flatpanel power and data */
-		WRITE_VID32(CS5530_DISPLAY_CONFIG, dcfg);
-	}
-	else if(hw_video == GFX_VID_SC1200)
-	{
-		/* READ DISPLAY CONFIG FROM SC1200 */
-		dcfg = READ_VID32(SC1200_DISPLAY_CONFIG);
-
-		/* SET RELEVANT FIELDS */
-		dcfg |= (SC1200_DCFG_FP_PWR_EN | SC1200_DCFG_FP_DATA_EN);
-		/* Enable the flatpanel power and data */
-		WRITE_VID32(SC1200_DISPLAY_CONFIG, dcfg);
-	}
-	else if(hw_video == GFX_VID_REDCLOUD)
-	{
-		/* READ DISPLAY CONFIG FROM REDCLOUD */
-		dcfg = READ_VID32(RCDF_DISPLAY_CONFIG);
-
-		/* SET RELEVANT FIELDS */
-		dcfg |= (RCDF_DCFG_FP_PWR_EN | RCDF_DCFG_FP_DATA_EN);
-		/* Enable the flatpanel power and data */
-		WRITE_VID32(RCDF_DISPLAY_CONFIG, dcfg);
-	}
-
-}	
+   hw_video = gfx_detect_video();
+
+   if (hw_video == GFX_VID_CS5530) {
+      /* READ DISPLAY CONFIG FROM CX5530 */
+      dcfg = READ_VID32(CS5530_DISPLAY_CONFIG);
+
+      /* SET RELEVANT FIELDS */
+      dcfg |= (CS5530_DCFG_FP_PWR_EN | CS5530_DCFG_FP_DATA_EN);
+      /* Enable the flatpanel power and data */
+      WRITE_VID32(CS5530_DISPLAY_CONFIG, dcfg);
+   } else if (hw_video == GFX_VID_SC1200) {
+      /* READ DISPLAY CONFIG FROM SC1200 */
+      dcfg = READ_VID32(SC1200_DISPLAY_CONFIG);
+
+      /* SET RELEVANT FIELDS */
+      dcfg |= (SC1200_DCFG_FP_PWR_EN | SC1200_DCFG_FP_DATA_EN);
+      /* Enable the flatpanel power and data */
+      WRITE_VID32(SC1200_DISPLAY_CONFIG, dcfg);
+   } else if (hw_video == GFX_VID_REDCLOUD) {
+      /* READ DISPLAY CONFIG FROM REDCLOUD */
+      dcfg = READ_VID32(RCDF_DISPLAY_CONFIG);
+
+      /* SET RELEVANT FIELDS */
+      dcfg |= (RCDF_DCFG_FP_PWR_EN | RCDF_DCFG_FP_DATA_EN);
+      /* Enable the flatpanel power and data */
+      WRITE_VID32(RCDF_DISPLAY_CONFIG, dcfg);
+   }
+
+}
 
 /*-----------------------------------------------------------------
  * Pnl_PowerDown
@@ -347,64 +346,60 @@ void Pnl_PowerUp(void)
  *  parameters:	none.
  *      return:	none.
  *-----------------------------------------------------------------*/
-void Pnl_PowerDown(void)
+void
+Pnl_PowerDown(void)
 {
-	int Platform;
-	unsigned long dcfg, hw_video;
+   int Platform;
+   unsigned long dcfg, hw_video;
 
-	Platform = Pnl_GetPlatform();
+   Platform = Pnl_GetPlatform();
 
-#if PLATFORM_CENTAURUS	
-	if (Platform == CENTAURUS_PLATFORM) {
-		Centaurus_Power_Down();
-		return;
-	}
+#if PLATFORM_CENTAURUS
+   if (Platform == CENTAURUS_PLATFORM) {
+      Centaurus_Power_Down();
+      return;
+   }
 #endif
 #if PLATFORM_DORADO
-	if (Platform == DORADO_PLATFORM) {
-		Dorado_Power_Down();
-		return;
-	}
+   if (Platform == DORADO_PLATFORM) {
+      Dorado_Power_Down();
+      return;
+   }
 #endif
 
-#if PLATFORM_GX2BASED		
-		if(Platform == REDCLOUD_PLATFORM) {
-		}
+#if PLATFORM_GX2BASED
+   if (Platform == REDCLOUD_PLATFORM) {
+   }
 #endif
 
-	hw_video = gfx_detect_video();
-
-	if(hw_video == GFX_VID_CS5530)
-	{
-		/* READ DISPLAY CONFIG FROM CX5530 */
-		dcfg = READ_VID32(CS5530_DISPLAY_CONFIG);
-
-		/* CLEAR RELEVANT FIELDS */
-		dcfg &= ~(CS5530_DCFG_FP_PWR_EN | CS5530_DCFG_FP_DATA_EN);
-		/* Disable the flatpanel power and data */
-		WRITE_VID32(CS5530_DISPLAY_CONFIG, dcfg);
-	}
-	else if(hw_video == GFX_VID_SC1200)
-	{
-		/* READ DISPLAY CONFIG FROM SC1200 */
-		dcfg = READ_VID32(SC1200_DISPLAY_CONFIG);
-
-		/* CLEAR RELEVANT FIELDS */
-		dcfg &= ~(SC1200_DCFG_FP_PWR_EN | SC1200_DCFG_FP_DATA_EN);
-		/* Disable the flatpanel power and data */
-		WRITE_VID32(SC1200_DISPLAY_CONFIG, dcfg);
-	}
-	else if(hw_video == GFX_VID_REDCLOUD)
-	{
-		/* READ DISPLAY CONFIG FROM REDCLOUD */
-		dcfg = READ_VID32(RCDF_DISPLAY_CONFIG);
-
-		/* CLEAR RELEVANT FIELDS */
-		dcfg &= ~(RCDF_DCFG_FP_PWR_EN | RCDF_DCFG_FP_DATA_EN);
-		/* Disable the flatpanel power and data */
-		WRITE_VID32(RCDF_DISPLAY_CONFIG, dcfg);
-	}
-}	
+   hw_video = gfx_detect_video();
+
+   if (hw_video == GFX_VID_CS5530) {
+      /* READ DISPLAY CONFIG FROM CX5530 */
+      dcfg = READ_VID32(CS5530_DISPLAY_CONFIG);
+
+      /* CLEAR RELEVANT FIELDS */
+      dcfg &= ~(CS5530_DCFG_FP_PWR_EN | CS5530_DCFG_FP_DATA_EN);
+      /* Disable the flatpanel power and data */
+      WRITE_VID32(CS5530_DISPLAY_CONFIG, dcfg);
+   } else if (hw_video == GFX_VID_SC1200) {
+      /* READ DISPLAY CONFIG FROM SC1200 */
+      dcfg = READ_VID32(SC1200_DISPLAY_CONFIG);
+
+      /* CLEAR RELEVANT FIELDS */
+      dcfg &= ~(SC1200_DCFG_FP_PWR_EN | SC1200_DCFG_FP_DATA_EN);
+      /* Disable the flatpanel power and data */
+      WRITE_VID32(SC1200_DISPLAY_CONFIG, dcfg);
+   } else if (hw_video == GFX_VID_REDCLOUD) {
+      /* READ DISPLAY CONFIG FROM REDCLOUD */
+      dcfg = READ_VID32(RCDF_DISPLAY_CONFIG);
+
+      /* CLEAR RELEVANT FIELDS */
+      dcfg &= ~(RCDF_DCFG_FP_PWR_EN | RCDF_DCFG_FP_DATA_EN);
+      /* Disable the flatpanel power and data */
+      WRITE_VID32(RCDF_DISPLAY_CONFIG, dcfg);
+   }
+}
 
 /*-----------------------------------------------------------------
  * Pnl_SavePanelState
@@ -414,30 +409,32 @@ void Pnl_PowerDown(void)
  *  parameters:	none.
  *      return:	none.
  *-----------------------------------------------------------------*/
-void Pnl_SavePanelState(void)
+void
+Pnl_SavePanelState(void)
 {
-	int Platform;
-	Platform = Pnl_GetPlatform();
+   int Platform;
+
+   Platform = Pnl_GetPlatform();
 
 #if PLATFORM_CENTAURUS
-       if (Platform == CENTAURUS_PLATFORM) {
-		Centaurus_Save_Panel_State();
-		return;
-	}
+   if (Platform == CENTAURUS_PLATFORM) {
+      Centaurus_Save_Panel_State();
+      return;
+   }
 #endif
 
-#if PLATFORM_DORADO	
-	if (Platform == DORADO_PLATFORM) {
-		Dorado_Save_Panel_State();
-		return;
-	}
+#if PLATFORM_DORADO
+   if (Platform == DORADO_PLATFORM) {
+      Dorado_Save_Panel_State();
+      return;
+   }
 #endif
 
-#if PLATFORM_GX2BASED		
-		if(Platform == REDCLOUD_PLATFORM) {
-		}
+#if PLATFORM_GX2BASED
+   if (Platform == REDCLOUD_PLATFORM) {
+   }
 #endif
-}	
+}
 
 /*-----------------------------------------------------------------
  * Pnl_RestorePanelState
@@ -447,27 +444,29 @@ void Pnl_SavePanelState(void)
  *  parameters:	none.
  *      return:	none.
  *-----------------------------------------------------------------*/
-void Pnl_RestorePanelState(void)
+void
+Pnl_RestorePanelState(void)
 {
    int Platform;
+
    Platform = Pnl_GetPlatform();
-#if PLATFORM_CENTAURUS	
-	if (Platform == CENTAURUS_PLATFORM) {
-		Centaurus_Restore_Panel_State();
-		return;
-	}
+#if PLATFORM_CENTAURUS
+   if (Platform == CENTAURUS_PLATFORM) {
+      Centaurus_Restore_Panel_State();
+      return;
+   }
 #endif
 
-#if PLATFORM_DORADO	
-	if (Platform == DORADO_PLATFORM) {
-		Dorado_Restore_Panel_State();
-		return;
-	}
+#if PLATFORM_DORADO
+   if (Platform == DORADO_PLATFORM) {
+      Dorado_Restore_Panel_State();
+      return;
+   }
 #endif
 
-#if PLATFORM_GX2BASED		
-		if(Platform == REDCLOUD_PLATFORM) {
-		}
+#if PLATFORM_GX2BASED
+   if (Platform == REDCLOUD_PLATFORM) {
+   }
 #endif
 }
 
@@ -481,47 +480,47 @@ void Pnl_RestorePanelState(void)
  *				structure.
  *      return:	none.
  *-----------------------------------------------------------------*/
-void Pnl_GetPanelParam(PPnl_PanelParams pParam)
+void
+Pnl_GetPanelParam(PPnl_PanelParams pParam)
 {
-	if (pParam->Flags & PNL_PANELPRESENT) {
-		pParam->PanelPresent = Pnl_IsPanelPresent();
-	}
-	if (pParam->Flags & PNL_PLATFORM) {
-		pParam->Platform = Pnl_GetPlatform();
-	}
-	if ((pParam->Flags & PNL_PANELCHIP) ||
-		(pParam->Flags & PNL_PANELSTAT)) {
+   if (pParam->Flags & PNL_PANELPRESENT) {
+      pParam->PanelPresent = Pnl_IsPanelPresent();
+   }
+   if (pParam->Flags & PNL_PLATFORM) {
+      pParam->Platform = Pnl_GetPlatform();
+   }
+   if ((pParam->Flags & PNL_PANELCHIP) || (pParam->Flags & PNL_PANELSTAT)) {
 #if PLATFORM_CENTAURUS
-	       if (pParam->Platform == CENTAURUS_PLATFORM) {
-			Centaurus_Get_9211_Details(pParam->Flags, pParam);
-			return;
-		}
+      if (pParam->Platform == CENTAURUS_PLATFORM) {
+	 Centaurus_Get_9211_Details(pParam->Flags, pParam);
+	 return;
+      }
 #endif
 
 #if PLATFORM_DORADO
-		if(pParam->Platform == DORADO_PLATFORM) {
-			Dorado_Get_9211_Details(pParam->Flags, pParam);
-			return;
-		}
+      if (pParam->Platform == DORADO_PLATFORM) {
+	 Dorado_Get_9211_Details(pParam->Flags, pParam);
+	 return;
+      }
 #endif
 
-#if PLATFORM_GX2BASED		
-		if(pParam->Platform == REDCLOUD_PLATFORM) {
-		}
+#if PLATFORM_GX2BASED
+      if (pParam->Platform == REDCLOUD_PLATFORM) {
+      }
 #endif
 
-		/* if unknown platform put unknown */
-		if (pParam->Flags & PNL_PANELCHIP)
-			pParam->PanelChip = PNL_UNKNOWN_CHIP;
-
-		if (pParam->Flags & PNL_PANELSTAT) {
-			pParam->PanelStat.XRes = 0; 
-			pParam->PanelStat.YRes = 0;
-			pParam->PanelStat.Depth = 0;
-			pParam->PanelStat.MonoColor = PNL_UNKNOWN_COLOR;
-			pParam->PanelStat.Type = PNL_UNKNOWN_PANEL;
-		}
-	}
+      /* if unknown platform put unknown */
+      if (pParam->Flags & PNL_PANELCHIP)
+	 pParam->PanelChip = PNL_UNKNOWN_CHIP;
+
+      if (pParam->Flags & PNL_PANELSTAT) {
+	 pParam->PanelStat.XRes = 0;
+	 pParam->PanelStat.YRes = 0;
+	 pParam->PanelStat.Depth = 0;
+	 pParam->PanelStat.MonoColor = PNL_UNKNOWN_COLOR;
+	 pParam->PanelStat.Type = PNL_UNKNOWN_PANEL;
+      }
+   }
 }
 
 /*-----------------------------------------------------------------
@@ -534,10 +533,11 @@ void Pnl_GetPanelParam(PPnl_PanelParams pParam)
  *      return:	none. 
  *-----------------------------------------------------------------*/
 
-void Pnl_SetPanelChip(int panelChip)
+void
+Pnl_SetPanelChip(int panelChip)
 {
-	/* To Be Implemented */
-	sPanelParam.PanelChip = panelChip;
+   /* To Be Implemented */
+   sPanelParam.PanelChip = panelChip;
 
 }
 
@@ -549,10 +549,11 @@ void Pnl_SetPanelChip(int panelChip)
  *  parameters:
  *      return:	On success it returns the panelchip. 
  *-----------------------------------------------------------------*/
-int Pnl_GetPanelChip(void)
+int
+Pnl_GetPanelChip(void)
 {
-	/* To Be Implemented */
-	return sPanelParam.PanelChip;
+   /* To Be Implemented */
+   return sPanelParam.PanelChip;
 }
 
 /*-----------------------------------------------------------------
@@ -565,49 +566,48 @@ int Pnl_GetPanelChip(void)
  *				structure.
  *      return:	none.
  *-----------------------------------------------------------------*/
-int Pnl_InitPanel(PPnl_PanelParams pParam)
+int
+Pnl_InitPanel(PPnl_PanelParams pParam)
 {
-	PPnl_PanelParams pPtr;
-	if (pParam == 0x0)	/* NULL  use the static table */
-		pPtr = &sPanelParam;
-	else
-		pPtr = pParam;
-   
-	if(!pPtr->PanelPresent) {
-		return -1;	/* error */
-	} 
-	else {
-		if((pPtr->PanelChip < 0) || (pPtr->Platform < 0))
-			return -1;	/* error */
+   PPnl_PanelParams pPtr;
+
+   if (pParam == 0x0)			/* NULL  use the static table */
+      pPtr = &sPanelParam;
+   else
+      pPtr = pParam;
+
+   if (!pPtr->PanelPresent) {
+      return -1;			/* error */
+   } else {
+      if ((pPtr->PanelChip < 0) || (pPtr->Platform < 0))
+	 return -1;			/* error */
 
 #if PLATFORM_DRACO
-		/* check we are init. the right one */
-		if((pPtr->Platform == DRACO_PLATFORM) &&
-			(pPtr->PanelChip == PNL_9210)){
-			Draco9210Init(&(pPtr->PanelStat));
-		}
+      /* check we are init. the right one */
+      if ((pPtr->Platform == DRACO_PLATFORM) && (pPtr->PanelChip == PNL_9210)) {
+	 Draco9210Init(&(pPtr->PanelStat));
+      }
 #endif
-         
+
 #if PLATFORM_CENTAURUS
-		/* check we are init. the right one */
-		if (pPtr->Platform == CENTAURUS_PLATFORM) {
-			Centaurus_9211init(&(pPtr->PanelStat));
-		}
+      /* check we are init. the right one */
+      if (pPtr->Platform == CENTAURUS_PLATFORM) {
+	 Centaurus_9211init(&(pPtr->PanelStat));
+      }
 #endif
 
 #if PLATFORM_DORADO
-		/* check we are init. the right one */
-		if((pPtr->Platform == DORADO_PLATFORM) &&
-			(pPtr->PanelChip == PNL_9211_C)){
-			Dorado9211Init(&(pPtr->PanelStat));
-		}
+      /* check we are init. the right one */
+      if ((pPtr->Platform == DORADO_PLATFORM) &&
+	  (pPtr->PanelChip == PNL_9211_C)) {
+	 Dorado9211Init(&(pPtr->PanelStat));
+      }
 #endif
 #if PLATFORM_GX2BASED
-		if(pPtr->Platform == REDCLOUD_PLATFORM) {
-			Redcloud_9211init(&(pPtr->PanelStat));
-		}
+      if (pPtr->Platform == REDCLOUD_PLATFORM) {
+	 Redcloud_9211init(&(pPtr->PanelStat));
+      }
 #endif
-	} /* else  end */ 
-	return 1;
+   }					/* else  end */
+   return 1;
 }
-
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/geode/panel/readme.txt b/xc/programs/Xserver/hw/xfree86/drivers/nsc/panel/readme.txt
index 6fcdcb7f9..bfe92f384 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/geode/panel/readme.txt
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nsc/panel/readme.txt
@@ -1,8 +1,8 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/geode/panel/readme.txt,v 1.1 2002/10/11 14:33:02 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/panel/readme.txt,v 1.2 2002/12/10 15:41:27 alanh Exp $ */
 Panel Library
-Release 1.2.9
+Release 1.3.2
 OS - Can be used in all OS's.
-July 31, 2002
+Dec 10, 2002
 Developer -  Sarma Kolluru
 
 -----------------------------------------------------------------------------
@@ -33,6 +33,70 @@ Panel library when compiled is a part of the driver and cannot be unit tested.
 -----------------------------------------------------------------------------
 REVISION HISTORY
 -----------------------------------------------------------------------------
+Version changes	v1.3.2  12/10/02    
+-----------------------------------------------------------------------------
+Dependencies:
+	- crlf v1.0.1o
+-----------------------------------------------------------------------------
+FUNCTIONAL CHANGES
+-----------------------------------------------------------------------------
+- Did code indentation for XFree release.
+-----------------------------------------------------------------------------
+DEFECTS CORRECTED
+-----------------------------------------------------------------------------
+- None.
+-----------------------------------------------------------------------------
+FILE CHANGES
+	92xx.h
+	cen9211.c
+	cen9211.h
+	dora9211.c
+	dora9211.h
+	drac9210.c
+	drac9210.h
+	gx2_9211.c
+	gx2_9211.h
+	panel.h
+	panel.c
+	platform.c
+	pnl_bios.c
+	pnl_defs.h
+	pnl_init.c
+-----------------------------------------------------------------------------
+Version changes	v1.3.1  12/06/02    
+-----------------------------------------------------------------------------
+Dependencies:
+	- crlf v1.0.1o
+-----------------------------------------------------------------------------
+FUNCTIONAL CHANGES
+-----------------------------------------------------------------------------
+- Added function protoype.
+-----------------------------------------------------------------------------
+DEFECTS CORRECTED
+-----------------------------------------------------------------------------
+- None.
+-----------------------------------------------------------------------------
+FILE CHANGES
+	cen9211.h
+	dora9211.h
+	gx2_9211.h
+-----------------------------------------------------------------------------
+Version changes	v1.3.0  11/29/02    
+-----------------------------------------------------------------------------
+Dependencies:
+	- crlf v1.0.1o
+-----------------------------------------------------------------------------
+FUNCTIONAL CHANGES
+-----------------------------------------------------------------------------
+- None.
+-----------------------------------------------------------------------------
+DEFECTS CORRECTED
+-----------------------------------------------------------------------------
+- cursor variable not defined for XFree when not as a module.
+-----------------------------------------------------------------------------
+FILE CHANGES
+	platform.c
+-----------------------------------------------------------------------------
 Version changes	v1.2.9  7/31/02    
 -----------------------------------------------------------------------------
 Dependencies:
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/nv/Imakefile b/xc/programs/Xserver/hw/xfree86/drivers/nv/Imakefile
index 2444ce45e..cba60f98e 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/nv/Imakefile
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nv/Imakefile
@@ -1,4 +1,4 @@
-XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/Imakefile,v 1.17 2001/04/01 20:51:25 tsi Exp $
+XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/Imakefile,v 1.19 2003/02/17 17:06:43 dawes Exp $
 XCOMM
 XCOMM This is an Imakefile for the NVIDIA driver.  
 XCOMM
@@ -24,7 +24,7 @@ INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86OSSRC) \
            -I$(SERVERSRC)/Xext -I$(XF86SRC)/int10 \
            -I$(FONTINCSRC) -I$(SERVERSRC)/include -I$(XINCLUDESRC) \
            -I$(XF86SRC)/shadowfb -I$(EXTINCSRC) -I$(SERVERSRC)/fb \
-	   -I$(SERVERSRC)/render -I$(XF86OSSRC)/vbe
+	   -I$(SERVERSRC)/render -I$(XF86SRC)/vbe
 #endif
 DEFINES = -DPSZ=8
 
@@ -58,8 +58,6 @@ InstallDriverSDKNonExecFile(nv_video.c,$(DRIVERSDKDIR)/drivers/nv)
 InstallDriverSDKNonExecFile(nv_shadow.c,$(DRIVERSDKDIR)/drivers/nv)
 InstallDriverSDKNonExecFile(nv_type.h,$(DRIVERSDKDIR)/drivers/nv)
 InstallDriverSDKNonExecFile(nv_xaa.c,$(DRIVERSDKDIR)/drivers/nv)
-InstallDriverSDKNonExecFile(nvreg.h,$(DRIVERSDKDIR)/drivers/nv)
-InstallDriverSDKNonExecFile(nvvga.h,$(DRIVERSDKDIR)/drivers/nv)
 InstallDriverSDKNonExecFile(riva_hw.c,$(DRIVERSDKDIR)/drivers/nv)
 InstallDriverSDKNonExecFile(riva_hw.h,$(DRIVERSDKDIR)/drivers/nv)
 InstallDriverSDKNonExecFile(riva_tbl.h,$(DRIVERSDKDIR)/drivers/nv)
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/nv/nv.man b/xc/programs/Xserver/hw/xfree86/drivers/nv/nv.man
index e583ec29d..785622705 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/nv/nv.man
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nv/nv.man
@@ -1,4 +1,4 @@
-.\" $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv.man,v 1.12 2002/10/14 18:22:45 mvojkovi Exp $ 
+.\" $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv.man,v 1.17 2003/02/11 00:00:18 mvojkovi Exp $ 
 .\" shorthand for double quote that works everywhere.
 .ds q \N'34'
 .TH NV __drivermansuffix__ __vendorversion__
@@ -49,6 +49,9 @@ NV1A, NV1F
 .TP 22
 .B GeForce4, QUADRO4
 NV17, NV18, NV25, NV28
+.TP 22
+.B GeForce FX, QUADRO FX
+NV30
 .SH CONFIGURATION DETAILS
 Please refer to XF86Config(__filemansuffix__) for general configuration
 details.  This section only covers configuration details specific to this
@@ -73,23 +76,25 @@ on all OSs).  See fbdevhw(__drivermansuffix__) for further information.
 Default: off.
 .TP
 .BI "Option \*qCrtcNumber\*q \*q" integer \*q
-NV17, NV18, NV1F and NV25 may have two video outputs.  The driver attempts to autodetect
+nForce2, Quadro4, GeForce4 and NV30 may have two video outputs.  
+The driver attempts to autodetect
 which one the monitor is connected to.  In the case that autodetection picks
 the wrong one, this option may be used to force usage of a particular output. 
 The options are "0" or "1".
 Default: autodetected.
 .TP
 .BI "Option \*qFlatPanel\*q \*q" boolean \*q
-This driver has experimental flat panel support.  The driver
-cannot autodetect the presence of a flat panel so this option must be set
-when used with a flat panel.
+The driver usually cannot autodetect the presence of a flat panel so
+this option should be set when used with a flat panel.  With this driver
+a flat panel will only work if it was POSTed by the BIOS, that is, the
+machine must have booted to the panel.
 Default: off.
 .TP
 .BI "Option \*qFPDither\*q \*q" boolean \*q
 Most digital flat panels have only 6 bits per component color resolution.
 This option tells the driver to dither from 8 bits per component to 6 before
 the flat panel truncates it. This is only suported in depth 24 on NV11, 
-nForce2 and GeForce4.
+nForce2, GeForce4, Quadro4 and NV30.
 Default: off.
 .TP
 .BI "Option \*qRotate\*q \*qCW\*q"
@@ -97,6 +102,9 @@ Default: off.
 .BI "Option \*qRotate\*q \*qCCW\*q"
 Rotate the display clockwise or counterclockwise.  This mode is unaccelerated.
 Default: no rotation.
+
+Note: Option Rotate does not work unless the Resize and Rotate extension has
+been turned off.
 .TP
 .BI "Option \*qShadowFB\*q \*q" boolean \*q
 Enable or disable use of the shadow framebuffer layer.  Default: off.
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/nv/nv_cursor.c b/xc/programs/Xserver/hw/xfree86/drivers/nv/nv_cursor.c
index 81cab1697..04107eeff 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/nv/nv_cursor.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nv/nv_cursor.c
@@ -24,16 +24,15 @@
 /* Rewritten with reference from mga driver and 3.3.4 NVIDIA driver by
    Jarno Paananen <jpaana@s2.org> */
 
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_cursor.c,v 1.9 2002/10/14 18:22:45 mvojkovi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_cursor.c,v 1.11 2002/11/26 23:41:58 mvojkovi Exp $ */
 
 #include "nv_include.h"
 
-#include "nvreg.h"
-#include "nvvga.h"
+#include "cursorstr.h"
 
 /****************************************************************************\
 *                                                                            *
-*                        XAA HW Cursor Entrypoints                           *
+*                          HW Cursor Entrypoints                             *
 *                                                                            *
 \****************************************************************************/
 
@@ -44,16 +43,22 @@
 
 #define ConvertToRGB888(c) (c | 0xff000000)
 
+#define BYTE_SWAP_32(c)  ((c & 0xff000000) >> 24) |  \
+                         ((c & 0xff0000) >> 8) |     \
+                         ((c & 0xff00) << 8) |       \
+                         ((c & 0xff) << 24)
+
+
 static void 
 ConvertCursor1555(NVPtr pNv, CARD32 *src, CARD16 *dst)
 {
     CARD32 b, m;
     int i, j;
     
-    for ( i = 0; i < MAX_CURS; i++ ) {
+    for ( i = 0; i < 32; i++ ) {
         b = *src++;
         m = *src++;
-        for ( j = 0; j < MAX_CURS; j++ ) {
+        for ( j = 0; j < 32; j++ ) {
 #if X_BYTE_ORDER == X_BIG_ENDIAN
             if ( m & 0x80000000)
                 *dst = ( b & 0x80000000) ? pNv->curFg : pNv->curBg;
@@ -81,10 +86,10 @@ ConvertCursor8888(NVPtr pNv, CARD32 *src, CARD32 *dst)
     CARD32 b, m;
     int i, j;
    
-    for ( i = 0; i < MAX_CURS; i++ ) {
+    for ( i = 0; i < 128; i++ ) {
         b = *src++;
         m = *src++;
-        for ( j = 0; j < MAX_CURS; j++ ) {
+        for ( j = 0; j < 32; j++ ) {
 #if X_BYTE_ORDER == X_BIG_ENDIAN
             if ( m & 0x80000000)
                 *dst = ( b & 0x80000000) ? pNv->curFg : pNv->curBg;
@@ -114,11 +119,11 @@ TransformCursor (NVPtr pNv)
 
     /* convert to color cursor */
     if(pNv->alphaCursor) {
-       dwords = MAX_CURS * MAX_CURS;
+       dwords = 64 * 64;
        if(!(tmp = ALLOCATE_LOCAL(dwords * 4))) return;
        ConvertCursor8888(pNv, pNv->curImage, tmp);
     } else {
-       dwords = (MAX_CURS * MAX_CURS) >> 1;
+       dwords = (32 * 32) >> 1;
        if(!(tmp = ALLOCATE_LOCAL(dwords * 4))) return;
        ConvertCursor1555(pNv, pNv->curImage, (CARD16*)tmp);
     }
@@ -135,7 +140,7 @@ NVLoadCursorImage( ScrnInfoPtr pScrn, unsigned char *src )
     NVPtr pNv = NVPTR(pScrn);
 
     /* save copy of image for color changes */
-    memcpy(pNv->curImage, src, MAX_CURS*2*4);
+    memcpy(pNv->curImage, src, (pNv->alphaCursor) ? 1024 : 256);
 
     TransformCursor(pNv);
 }
@@ -159,14 +164,8 @@ NVSetCursorColors(ScrnInfoPtr pScrn, int bg, int fg)
         back = ConvertToRGB888(bg);
 #if X_BYTE_ORDER == X_BIG_ENDIAN
         if((pNv->Chipset & 0x0ff0) == 0x0110) {
-           fore = ((fore & 0xff000000) >> 24) | 
-                  ((fore & 0xff0000) >> 8) |
-                  ((fore & 0xff00) << 8) |
-                  ((fore & 0xff) << 24);
-           back = ((back & 0xff000000) >> 24) | 
-                  ((back & 0xff0000) >> 8) |
-                  ((back & 0xff00) << 8) |
-                  ((back & 0xff) << 24);
+           fore = BYTE_SWAP_32(fore);
+           back = BYTE_SWAP_32(back);
         }
 #endif
     } else {
@@ -211,18 +210,54 @@ NVUseHWCursor(ScreenPtr pScreen, CursorPtr pCurs)
     return TRUE;
 }
 
+#ifdef ARGB_CURSOR
+static Bool 
+NVUseHWCursorARGB(ScreenPtr pScreen, CursorPtr pCurs)
+{
+    if((pCurs->bits->width <= 64) && (pCurs->bits->height <= 64))
+        return TRUE;
 
-/* A 32x32 8:8:8:8 ARGB cursor is available in the following conditions:
+    return FALSE;
+}
 
-    if(pNv->alphaCursor && 
-       (((pNv->Chipset & 0x0ff0) != 0x0110) ||
-        !(pNv->riva.flatPanel & FP_DITHER)))
+static void
+NVLoadCursorARGB(ScrnInfoPtr pScrn, CursorPtr pCurs)
+{
+    NVPtr pNv = NVPTR(pScrn);
+    CARD32 *image = pCurs->bits->argb;
+    CARD32 *dst = (CARD32*)pNv->riva.CURSOR;
+    int x, y, w, h;
+
+    w = pCurs->bits->width;
+    h = pCurs->bits->height;
+
+#if X_BYTE_ORDER == X_BIG_ENDIAN
+    if((pNv->Chipset & 0x0ff0) == 0x0110) {
+       CARD32 tmp;
+
+       for(y = 0; y < h; y++) {
+          for(x = 0; x < w; x++) {
+              tmp = *image++;
+              *dst++ = BYTE_SWAP_32(tmp);
+          }
+          for(; x < 64; x++)
+              *dst++ = 0;
+       }
+    } else 
+#endif
     {
-        ARGB cursor is available.  Just dump the data to: 
-           pNv->riva.CURSOR[32*32]
+       for(y = 0; y < h; y++) {
+          for(x = 0; x < w; x++) 
+              *dst++ = *image++;
+          for(; x < 64; x++)
+              *dst++ = 0;
+       }
     }
 
-*/
+    if(y < 64)
+      memset(dst, 0, 64 * (64 - y) * 4);
+}
+#endif
 
 Bool 
 NVCursorInit(ScreenPtr pScreen)
@@ -238,8 +273,11 @@ NVCursorInit(ScreenPtr pScreen)
     
     pNv->CursorInfoRec = infoPtr;
 
-    infoPtr->MaxWidth = MAX_CURS;
-    infoPtr->MaxHeight = MAX_CURS;
+    if(pNv->alphaCursor)
+       infoPtr->MaxWidth = infoPtr->MaxHeight = 64;
+    else
+       infoPtr->MaxWidth = infoPtr->MaxHeight = 32;
+
     infoPtr->Flags = HARDWARE_CURSOR_TRUECOLOR_AT_8BPP |
                      HARDWARE_CURSOR_SOURCE_MASK_INTERLEAVE_32; 
     infoPtr->SetCursorColors = NVSetCursorColors;
@@ -249,5 +287,15 @@ NVCursorInit(ScreenPtr pScreen)
     infoPtr->ShowCursor = NVShowCursor;
     infoPtr->UseHWCursor = NVUseHWCursor;
 
+#ifdef ARGB_CURSOR
+    if(pNv->alphaCursor &&
+       (((pNv->Chipset & 0x0ff0) != 0x0110) ||
+        !(pNv->riva.flatPanel & FP_DITHER)))
+    {
+       infoPtr->UseHWCursorARGB = NVUseHWCursorARGB;
+       infoPtr->LoadCursorARGB = NVLoadCursorARGB;
+    }
+#endif
+
     return(xf86InitCursor(pScreen, infoPtr));
 }
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/nv/nv_dac.c b/xc/programs/Xserver/hw/xfree86/drivers/nv/nv_dac.c
index b2b1688e4..90d75da78 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/nv/nv_dac.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nv/nv_dac.c
@@ -24,13 +24,10 @@
 /* Hacked together from mga driver and 3.3.4 NVIDIA driver by Jarno Paananen
    <jpaana@s2.org> */
 
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_dac.c,v 1.28 2002/10/14 18:22:45 mvojkovi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_dac.c,v 1.31 2003/01/02 20:44:56 mvojkovi Exp $ */
 
 #include "nv_include.h"
 
-#include "nvreg.h"
-#include "nvvga.h"
-
 Bool
 NVDACInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
 {
@@ -107,6 +104,8 @@ NVDACInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
     pVga->CRTC[0x15] = Set8Bits(vertBlankStart);
     pVga->CRTC[0x16] = Set8Bits(vertBlankEnd);
 
+    pVga->Attribute[0x10] = 0x01;
+
     nvReg->screen = SetBitField(horizBlankEnd,6:6,4:4)
                   | SetBitField(vertBlankStart,10:10,3:3)
                   | SetBitField(vertStart,10:10,2:2)
@@ -186,11 +185,11 @@ NVDACInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
        nvReg->vpll2 = pNv->riva.PRAMDAC0[0x00000520/4];
     }
 
-    nvReg->cursorConfig = 0x02000100;
+    nvReg->cursorConfig = 0x00000100;
     if(mode->Flags & V_DBLSCAN)
        nvReg->cursorConfig |= (1 << 4);
     if(pNv->alphaCursor) {
-        nvReg->cursorConfig |= (1 << 12);
+        nvReg->cursorConfig |= 0x04011000;
         nvReg->general |= (1 << 29);
 
         if((pNv->Chipset & 0x0ff0) == 0x0110) {
@@ -208,7 +207,11 @@ NVDACInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
         } else {
            nvReg->cursorConfig |= (1 << 28);
         }
-    }
+    } else
+       nvReg->cursorConfig |= 0x02000000;
+
+    nvReg->vpllB = 0;
+    nvReg->vpll2B = 0;
 
     return (TRUE);
 }
@@ -223,7 +226,7 @@ NVDACRestore(ScrnInfoPtr pScrn, vgaRegPtr vgaReg, NVRegPtr nvReg,
     DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "NVDACRestore\n"));
 
     if(primary) restore |= VGA_SR_CMAP | VGA_SR_FONTS;
-    else if(pNv->Chipset == NV_CHIP_RIVA_128) 
+    else if((pNv->Chipset & 0xffff) == 0x0018) 
 	restore |= VGA_SR_CMAP;
     pNv->riva.LoadStateExt(&pNv->riva, nvReg);
 #if defined(__powerpc__)
@@ -326,7 +329,7 @@ NV_ddc1Read(ScrnInfoPtr pScrn)
     while(!(VGA_RD08(pNv->riva.PCIO, 0x3da) & 0x08));
 
     /* Get the result */
-    VGA_WR08(pNv->riva.PCIO, 0x3d4, 0x3e);
+    VGA_WR08(pNv->riva.PCIO, 0x3d4, pNv->DDCBase);
     val = VGA_RD08(pNv->riva.PCIO, 0x3d5);
     DEBUG(ErrorF("NV_ddc1Read(%p,...) returns %d\n",
                  pScrn, val));
@@ -340,7 +343,7 @@ NV_I2CGetBits(I2CBusPtr b, int *clock, int *data)
     unsigned char val;
 
     /* Get the result. */
-    VGA_WR08(pNv->riva.PCIO, 0x3d4, 0x3e);
+    VGA_WR08(pNv->riva.PCIO, 0x3d4, pNv->DDCBase);
     val = VGA_RD08(pNv->riva.PCIO, 0x3d5);
 
     *clock = (val & DDC_SCL_READ_MASK) != 0;
@@ -355,7 +358,7 @@ NV_I2CPutBits(I2CBusPtr b, int clock, int data)
     NVPtr pNv = NVPTR(xf86Screens[b->scrnIndex]);
     unsigned char val;
 
-    VGA_WR08(pNv->riva.PCIO, 0x3d4, 0x3f);
+    VGA_WR08(pNv->riva.PCIO, 0x3d4, pNv->DDCBase + 1);
     val = VGA_RD08(pNv->riva.PCIO, 0x3d5) & 0xf0;
     if (clock)
         val |= DDC_SCL_WRITE_MASK;
@@ -367,7 +370,7 @@ NV_I2CPutBits(I2CBusPtr b, int clock, int data)
     else
         val &= ~DDC_SDA_WRITE_MASK;
 
-    VGA_WR08(pNv->riva.PCIO, 0x3d4, 0x3f);
+    VGA_WR08(pNv->riva.PCIO, 0x3d4, pNv->DDCBase + 1);
     VGA_WR08(pNv->riva.PCIO, 0x3d5, val | 0x1);
     
     DEBUG(ErrorF("NV_I2CPutBits(%p, %d, %d) val=0x%x\n", b, clock, data, val));
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/nv/nv_driver.c b/xc/programs/Xserver/hw/xfree86/drivers/nv/nv_driver.c
index 457e381dc..92d4599e2 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/nv/nv_driver.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nv/nv_driver.c
@@ -24,16 +24,10 @@
 /* Hacked together from mga driver and 3.3.4 NVIDIA driver by Jarno Paananen
    <jpaana@s2.org> */
 
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_driver.c,v 1.92 2002/10/14 18:22:45 mvojkovi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_driver.c,v 1.101 2003/02/10 23:42:51 mvojkovi Exp $ */
 
 #include "nv_include.h"
 
-/* Little hack to declare all the base pointers */
-#define extern
-#include "nvreg.h"
-#undef extern
-#include "nvvga.h"
-
 #include "xf86int10.h"
 
 /*
@@ -85,116 +79,94 @@ DriverRec NV = {
         0
 };
 
-/* Supported chipsets */
-static SymTabRec NVChipsets[] = {
-    {NV_CHIP_RIVA_128,           "RIVA 128"},
-    {NV_CHIP_TNT,                "RIVA TNT"},
-    {NV_CHIP_TNT2,               "RIVA TNT2/TNT2 Pro"},
-    {NV_CHIP_UTNT2,              "RIVA TNT2 Ultra"},
-    {NV_CHIP_VTNT2,              "Vanta"},
-    {NV_CHIP_UVTNT2,             "Riva TNT2 M64"},
-    {NV_CHIP_ITNT2,              "Aladdin TNT2"},
-    {NV_CHIP_GEFORCE_256,        "GeForce 256"},
-    {NV_CHIP_GEFORCE_DDR,        "GeForce DDR"},
-    {NV_CHIP_QUADRO,             "Quadro"},
-    {NV_CHIP_GEFORCE2_MX,        "GeForce2 MX/MX 400"},
-    {NV_CHIP_GEFORCE2_MX_100,    "GeForce2 MX 100/200"},
-    {NV_CHIP_GEFORCE2_GO,        "GeForce2 Go"},
-    {NV_CHIP_QUADRO2_MXR,        "Quadro2 MXR"},
-    {NV_CHIP_GEFORCE2_GTS,       "GeForce2 GTS/Pro"},
-    {NV_CHIP_GEFORCE2_TI,        "GeForce2 Ti"},
-    {NV_CHIP_GEFORCE2_ULTRA,     "GeForce2 Ultra"},
-    {NV_CHIP_QUADRO2_PRO,        "Quadro2 Pro"},
-    {NV_CHIP_GEFORCE4_MX_460,    "GeForce4 MX 460"},
-    {NV_CHIP_GEFORCE4_MX_440,    "GeForce4 MX 440"},
-    {NV_CHIP_GEFORCE4_MX_420,    "GeForce4 MX 420"},
-    {NV_CHIP_GEFORCE4_440_GO,    "GeForce4 440 Go"},
-    {NV_CHIP_GEFORCE4_420_GO,    "GeForce4 420 Go"},
-    {NV_CHIP_GEFORCE4_420_GO_M32,"GeForce4 420 Go M32"},
-    {NV_CHIP_QUADRO4_500XGL,     "Quadro4 500XGL"},
-    {NV_CHIP_GEFORCE4_440_GO_M64,"GeForce4 440 Go M64"},
-    {NV_CHIP_QUADRO4_200,        "Quadro4 200/400NVS"},
-    {NV_CHIP_QUADRO4_550XGL,     "Quadro4 550XGL"},
-    {NV_CHIP_QUADRO4_500_GOGL,   "Quadro4 GoGL"},
-    {NV_CHIP_0x0180,             "0x0180"},
-    {NV_CHIP_0x0181,             "0x0181"},
-    {NV_CHIP_0x0182,             "0x0182"},
-    {NV_CHIP_0x0188,             "0x0188"},
-    {NV_CHIP_0x018A,             "0x018A"},
-    {NV_CHIP_0x018B,             "0x018B"},
-    {NV_CHIP_IGEFORCE2,          "GeForce2 Integrated"},
-    {NV_CHIP_0x01F0,             "0x01F0"},
-    {NV_CHIP_GEFORCE3,           "GeForce3"},
-    {NV_CHIP_GEFORCE3_TI_200,    "GeForce3 Ti 200"},
-    {NV_CHIP_GEFORCE3_TI_500,    "GeForce3 Ti 500"},
-    {NV_CHIP_QUADRO_DCC,         "Quadro DCC"},
-    {NV_CHIP_GEFORCE4_TI_4600,   "GeForce4 Ti 4600"},
-    {NV_CHIP_GEFORCE4_TI_4400,   "GeForce4 Ti 4400"},
-    {NV_CHIP_GEFORCE4_TI_4200,   "GeForce4 Ti 4200"},
-    {NV_CHIP_QUADRO4_900XGL,     "Quadro4 900 XGL"},
-    {NV_CHIP_QUADRO4_750XGL,     "Quadro4 750 XGL"},
-    {NV_CHIP_QUADRO4_700XGL,     "Quadro4 700 XGL"},
-    {NV_CHIP_0x0280,             "0x0280"},
-    {NV_CHIP_0x0281,             "0x0281"},
-    {NV_CHIP_0x0288,             "0x0288"},
-    {NV_CHIP_0x0289,             "0x0289"},
-    {-1,                        NULL }
+static SymTabRec NVKnownChipsets[] =
+{
+  { 0x12D20018, "RIVA 128" },
+  { 0x10DE0020, "RIVA TNT" },
+  { 0x10DE0028, "RIVA TNT2" },
+  { 0x10DE002C, "Vanta" },
+  { 0x10DE0029, "RIVA TNT2 Ultra" },
+  { 0x10DE002D, "RIVA TNT2 Model 64" },
+  { 0x10DE00A0, "Aladdin TNT2" },
+  { 0x10DE0100, "GeForce 256" },
+  { 0x10DE0101, "GeForce DDR" },
+  { 0x10DE0103, "Quadro" },
+  { 0x10DE0110, "GeForce2 MX/MX 400" },
+  { 0x10DE0111, "GeForce2 MX 100/200" },
+  { 0x10DE0112, "GeForce2 Go" },
+  { 0x10DE0113, "Quadro2 MXR/EX/Go" },
+  { 0x10DE01A0, "GeForce2 Integrated GPU" },
+  { 0x10DE0150, "GeForce2 GTS" },
+  { 0x10DE0151, "GeForce2 Ti" },
+  { 0x10DE0152, "GeForce2 Ultra" },
+  { 0x10DE0153, "Quadro2 Pro" },
+  { 0x10DE0170, "GeForce4 MX 460" },
+  { 0x10DE0171, "GeForce4 MX 440" },
+  { 0x10DE0172, "GeForce4 MX 420" },
+  { 0x10DE0173, "GeForce4 MX 440-SE" },
+  { 0x10DE0174, "GeForce4 440 Go" },
+  { 0x10DE0175, "GeForce4 420 Go" },
+  { 0x10DE0176, "GeForce4 420 Go 32M" },
+  { 0x10DE0177, "GeForce4 460 Go" },
+  { 0x10DE0179, "GeForce4 440 Go 64M" },
+  { 0x10DE017D, "GeForce4 410 Go 16M" },
+  { 0x10DE017C, "Quadro4 500 GoGL" },
+  { 0x10DE0178, "Quadro4 550 XGL" },
+  { 0x10DE017A, "Quadro4 NVS" },
+  { 0x10DE0181, "GeForce4 MX 440 with AGP8X" },
+  { 0x10DE0182, "GeForce4 MX 440SE with AGP8X" },
+  { 0x10DE0183, "GeForce4 MX 420 with AGP8X" },
+  { 0x10DE0186, "GeForce4 448 Go" },
+  { 0x10DE0187, "GeForce4 488 Go" },
+  { 0x10DE0188, "Quadro4 580 XGL" },
+  { 0x10DE018A, "Quadro4 280 NVS" },
+  { 0x10DE018B, "Quadro4 380 XGL" },
+  { 0x10DE01F0, "GeForce4 MX Integrated GPU" },
+  { 0x10DE0200, "GeForce3" },
+  { 0x10DE0201, "GeForce3 Ti 200" },
+  { 0x10DE0202, "GeForce3 Ti 500" },
+  { 0x10DE0203, "Quadro DCC" },
+  { 0x10DE0250, "GeForce4 Ti 4600" },
+  { 0x10DE0251, "GeForce4 Ti 4400" },
+  { 0x10DE0252, "0x0252" },
+  { 0x10DE0253, "GeForce4 Ti 4200" },
+  { 0x10DE0258, "Quadro4 900 XGL" },
+  { 0x10DE0259, "Quadro4 750 XGL" },
+  { 0x10DE025B, "Quadro4 700 XGL" },
+  { 0x10DE0280, "GeForce4 Ti 4800" },
+  { 0x10DE0281, "GeForce4 Ti 4200 with AGP8X" },
+  { 0x10DE0282, "GeForce4 Ti 4800 SE" },
+  { 0x10DE0286, "GeForce4 4200 Go" },
+  { 0x10DE028C, "Quadro4 700 GoGL" },
+  { 0x10DE0288, "Quadro4 980 XGL" },
+  { 0x10DE0289, "Quadro4 780 XGL" },
+  { 0x10DE0300, "0x0300" },
+  { 0x10DE0301, "GeForce FX 5800 Ultra" },
+  { 0x10DE0302, "GeForce FX 5800" },
+  { 0x10DE0308, "Quadro FX 2000" },
+  { 0x10DE0309, "Quadro FX 1000" },
+  { 0x10DE0311, "0x0311" },
+  { 0x10DE0312, "0x0312" },
+  { 0x10DE0316, "0x0316" },
+  { 0x10DE0317, "0x0317" },
+  { 0x10DE0318, "0x0318" },
+  { 0x10DE0319, "0x0319" },
+  { 0x10DE031A, "0x031A" },
+  { 0x10DE031B, "0x031B" },
+  { 0x10DE031C, "0x031C" },
+  { 0x10DE031D, "0x031D" },
+  { 0x10DE031E, "0x031E" },
+  { 0x10DE031F, "0x031F" },
+  { 0x10DE0321, "0x0321" },
+  { 0x10DE0322, "0x0322" },
+  { 0x10DE0323, "0x0323" },
+  { 0x10DE0326, "0x0326" },
+  { 0x10DE032A, "0x032A" },
+  { 0x10DE032B, "0x032B" },
+  { 0x10DE032E, "0x032E" },
+  {-1, NULL}
 };
 
-static PciChipsets NVPciChipsets[] = {
-    {NV_CHIP_RIVA_128,           NV_CHIP_RIVA_128,           RES_SHARED_VGA},
-    {NV_CHIP_TNT,                NV_CHIP_TNT,                RES_SHARED_VGA},
-    {NV_CHIP_TNT2,               NV_CHIP_TNT2,               RES_SHARED_VGA},
-    {NV_CHIP_UTNT2,              NV_CHIP_UTNT2,              RES_SHARED_VGA},
-    {NV_CHIP_VTNT2,              NV_CHIP_VTNT2,              RES_SHARED_VGA},
-    {NV_CHIP_UVTNT2,             NV_CHIP_UVTNT2,             RES_SHARED_VGA},
-    {NV_CHIP_ITNT2,              NV_CHIP_ITNT2,              RES_SHARED_VGA},
-    {NV_CHIP_GEFORCE_256,        NV_CHIP_GEFORCE_256,        RES_SHARED_VGA},
-    {NV_CHIP_GEFORCE_DDR,        NV_CHIP_GEFORCE_DDR,        RES_SHARED_VGA},
-    {NV_CHIP_QUADRO,             NV_CHIP_QUADRO,             RES_SHARED_VGA},
-    {NV_CHIP_GEFORCE2_MX,        NV_CHIP_GEFORCE2_MX,        RES_SHARED_VGA},
-    {NV_CHIP_GEFORCE2_MX_100,    NV_CHIP_GEFORCE2_MX_100,    RES_SHARED_VGA},
-    {NV_CHIP_GEFORCE2_GO,        NV_CHIP_GEFORCE2_GO,        RES_SHARED_VGA},
-    {NV_CHIP_QUADRO2_MXR,        NV_CHIP_QUADRO2_MXR,        RES_SHARED_VGA},
-    {NV_CHIP_GEFORCE2_GTS,       NV_CHIP_GEFORCE2_GTS,       RES_SHARED_VGA},
-    {NV_CHIP_GEFORCE2_TI,        NV_CHIP_GEFORCE2_TI,        RES_SHARED_VGA},
-    {NV_CHIP_GEFORCE2_ULTRA,     NV_CHIP_GEFORCE2_ULTRA,     RES_SHARED_VGA},
-    {NV_CHIP_QUADRO2_PRO,        NV_CHIP_QUADRO2_PRO,        RES_SHARED_VGA},
-    {NV_CHIP_GEFORCE4_MX_460,    NV_CHIP_GEFORCE4_MX_460,    RES_SHARED_VGA},
-    {NV_CHIP_GEFORCE4_MX_440,    NV_CHIP_GEFORCE4_MX_440,    RES_SHARED_VGA},
-    {NV_CHIP_GEFORCE4_MX_420,    NV_CHIP_GEFORCE4_MX_420,    RES_SHARED_VGA},
-    {NV_CHIP_GEFORCE4_440_GO,    NV_CHIP_GEFORCE4_440_GO,    RES_SHARED_VGA},
-    {NV_CHIP_GEFORCE4_420_GO,    NV_CHIP_GEFORCE4_420_GO,    RES_SHARED_VGA},
-    {NV_CHIP_GEFORCE4_420_GO_M32,NV_CHIP_GEFORCE4_420_GO_M32,RES_SHARED_VGA},
-    {NV_CHIP_QUADRO4_500XGL,     NV_CHIP_QUADRO4_500XGL,     RES_SHARED_VGA},
-    {NV_CHIP_GEFORCE4_440_GO_M64,NV_CHIP_GEFORCE4_440_GO_M64,RES_SHARED_VGA},
-    {NV_CHIP_QUADRO4_200,        NV_CHIP_QUADRO4_200,        RES_SHARED_VGA},
-    {NV_CHIP_QUADRO4_550XGL,     NV_CHIP_QUADRO4_550XGL,     RES_SHARED_VGA},
-    {NV_CHIP_QUADRO4_500_GOGL,   NV_CHIP_QUADRO4_500_GOGL,   RES_SHARED_VGA},
-    {NV_CHIP_0x0180,             NV_CHIP_0x0180,             RES_SHARED_VGA},
-    {NV_CHIP_0x0181,             NV_CHIP_0x0181,             RES_SHARED_VGA},
-    {NV_CHIP_0x0182,             NV_CHIP_0x0182,             RES_SHARED_VGA},
-    {NV_CHIP_0x0188,             NV_CHIP_0x0188,             RES_SHARED_VGA},
-    {NV_CHIP_0x018A,             NV_CHIP_0x018A,             RES_SHARED_VGA},
-    {NV_CHIP_0x018B,             NV_CHIP_0x018B,             RES_SHARED_VGA},
-    {NV_CHIP_IGEFORCE2,          NV_CHIP_IGEFORCE2,          RES_SHARED_VGA},
-    {NV_CHIP_0x01F0,             NV_CHIP_0x01F0,             RES_SHARED_VGA},
-    {NV_CHIP_GEFORCE3,           NV_CHIP_GEFORCE3,           RES_SHARED_VGA},
-    {NV_CHIP_GEFORCE3_TI_200,    NV_CHIP_GEFORCE3_TI_200,    RES_SHARED_VGA},
-    {NV_CHIP_GEFORCE3_TI_500,    NV_CHIP_GEFORCE3_TI_500,    RES_SHARED_VGA},
-    {NV_CHIP_QUADRO_DCC,         NV_CHIP_QUADRO_DCC,         RES_SHARED_VGA},
-    {NV_CHIP_GEFORCE4_TI_4600,   NV_CHIP_GEFORCE4_TI_4600,   RES_SHARED_VGA},
-    {NV_CHIP_GEFORCE4_TI_4400,   NV_CHIP_GEFORCE4_TI_4400,   RES_SHARED_VGA},
-    {NV_CHIP_GEFORCE4_TI_4200,   NV_CHIP_GEFORCE4_TI_4200,   RES_SHARED_VGA},
-    {NV_CHIP_QUADRO4_900XGL,     NV_CHIP_QUADRO4_900XGL,     RES_SHARED_VGA},
-    {NV_CHIP_QUADRO4_750XGL,     NV_CHIP_QUADRO4_750XGL,     RES_SHARED_VGA},
-    {NV_CHIP_QUADRO4_700XGL,     NV_CHIP_QUADRO4_700XGL,     RES_SHARED_VGA},
-    {NV_CHIP_0x0280,             NV_CHIP_0x0280,             RES_SHARED_VGA},
-    {NV_CHIP_0x0281,             NV_CHIP_0x0281,             RES_SHARED_VGA},
-    {NV_CHIP_0x0288,             NV_CHIP_0x0288,             RES_SHARED_VGA},
-    {NV_CHIP_0x0289,             NV_CHIP_0x0289,             RES_SHARED_VGA},
-    { -1,                       -1,                          RES_UNDEFINED  }
-};
 
 /*
  * List of symbols from other modules that this module references.  This
@@ -454,10 +426,12 @@ NVAvailableOptions(int chipid, int busid)
 static void
 NVIdentify(int flags)
 {
-    xf86PrintChipsets(NV_NAME, "driver for NVIDIA chipsets", NVChipsets);
+    xf86PrintChipsets(NV_NAME, "driver for NVIDIA chipsets", NVKnownChipsets);
 }
 
 
+#define MAX_CHIPS MAXSCREENS
+
 /* Mandatory */
 static Bool
 NVProbe(DriverPtr drv, int flags)
@@ -465,65 +439,82 @@ NVProbe(DriverPtr drv, int flags)
     int i;
     GDevPtr *devSections;
     int *usedChips;
+    SymTabRec NVChipsets[MAX_CHIPS + 1];
+    PciChipsets NVPciChipsets[MAX_CHIPS + 1];
+    pciVideoPtr *ppPci;
     int numDevSections;
     int numUsed;
     Bool foundScreen = FALSE;
 
-    /*
-     * The aim here is to find all cards that this driver can handle,
-     * and for the ones not already claimed by another driver, claim the
-     * slot, and allocate a ScrnInfoRec.
-     *
-     * This should be a minimal probe, and it should under no circumstances
-     * change the state of the hardware.  Because a device is found, don't
-     * assume that it will be used.  Don't do any initialisations other than
-     * the required ScrnInfoRec initialisations.  Don't allocate any new
-     * data structures.
-     */
-
-    /*
-     * Check if there has been a chipset override in the config file.
-     * For this we must find out if there is an active device section which
-     * is relevant, i.e., which has no driver specified or has THIS driver
-     * specified.
-     */
 
-    if ((numDevSections = xf86MatchDevice(NV_DRIVER_NAME,
-                                          &devSections)) <= 0) {
-        /*
-         * There's no matching device section in the config file, so quit
-         * now.
-         */
-        return FALSE;
+    if ((numDevSections = xf86MatchDevice(NV_DRIVER_NAME, &devSections)) <= 0) 
+        return FALSE;  /* no matching device section */
+
+    if (!(ppPci = xf86GetPciVideoInfo())) 
+        return FALSE;  /* no PCI cards found */
+
+    numUsed = 0;
+
+    /* Create the NVChipsets and NVPciChipsets from found devices */
+    while (*ppPci && (numUsed < MAX_CHIPS)) {
+        if(((*ppPci)->vendor == PCI_VENDOR_NVIDIA_SGS) || 
+           ((*ppPci)->vendor == PCI_VENDOR_NVIDIA)) 
+        {
+            SymTabRec *nvchips = NVKnownChipsets;
+            int token = ((*ppPci)->vendor << 16) | (*ppPci)->chipType;
+
+            while(nvchips->name) {
+               if(token == nvchips->token)
+                  break;
+               nvchips++;
+            }
+
+            if(nvchips->name) { /* found one */
+               NVChipsets[numUsed].token = nvchips->token;
+               NVChipsets[numUsed].name = nvchips->name;
+               NVPciChipsets[numUsed].numChipset = nvchips->token;
+               NVPciChipsets[numUsed].PCIid = nvchips->token;
+               NVPciChipsets[numUsed].resList = RES_SHARED_VGA;
+               numUsed++;
+            } else if ((*ppPci)->vendor == PCI_VENDOR_NVIDIA) {
+               /* look for a compatible devices which may be newer than 
+                  the NVKnownChipsets list above.  */
+               switch(token & 0xfff0) {
+               case 0x0170:   
+               case 0x0180:
+               case 0x0250:
+               case 0x0280:
+               case 0x0300:
+               case 0x0310:
+               case 0x0320:
+               case 0x0330:
+               case 0x0340:
+                   NVChipsets[numUsed].token = token;
+                   NVChipsets[numUsed].name = "Unknown NVIDIA chip";
+                   NVPciChipsets[numUsed].numChipset = token;
+                   NVPciChipsets[numUsed].PCIid = token;
+                   NVPciChipsets[numUsed].resList = RES_SHARED_VGA;
+                   numUsed++;
+                   break;
+               default:  break;  /* we don't recognize it */
+               }
+            }
+        }
+        ppPci++;
     }
 
-    /*
-     * We need to probe the hardware first.  We then need to see how this
-     * fits in with what is given in the config file, and allow the config
-     * file info to override any contradictions.
-     */
+    /* terminate the list */
+    NVChipsets[numUsed].token = -1;
+    NVChipsets[numUsed].name = NULL; 
+    NVPciChipsets[numUsed].numChipset = -1;
+    NVPciChipsets[numUsed].PCIid = -1;
+    NVPciChipsets[numUsed].resList = RES_UNDEFINED;
 
-    /*
-     * All of the cards this driver supports are PCI, so the "probing" just
-     * amounts to checking the PCI data that the server has already collected.
-     */
-    if (xf86GetPciVideoInfo() == NULL) {
-        /*
-         * We won't let anything in the config file override finding no
-         * PCI video cards at all.  This seems reasonable now, but we'll see.
-         */
-        return FALSE;
-    }
-
-    /* This should match both vendors, PCI_VENDOR_NVIDIA_SGS and
-       PCI_VENDOR_NVIDIA, see above */
     numUsed = xf86MatchPciInstances(NV_NAME, 0, NVChipsets, NVPciChipsets,
                                     devSections, numDevSections, drv,
                                     &usedChips);
                         
-    /* Free it since we don't need that list after this */
-    xfree(devSections);
-    if (numUsed <= 0)
+    if (numUsed <= 0) 
         return FALSE;
 
     if (flags & PROBE_DETECT)
@@ -552,7 +543,10 @@ NVProbe(DriverPtr drv, int flags)
 	    foundScreen = TRUE;
 	}    
     }
+
+    xfree(devSections);
     xfree(usedChips);
+
     return foundScreen;
 }
 
@@ -599,12 +593,16 @@ static Bool
 NVEnterVT(int scrnIndex, int flags)
 {
     ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
+    NVPtr pNv = NVPTR(pScrn);
 
     DEBUG(xf86DrvMsg(scrnIndex, X_INFO, "NVEnterVT\n"));
 
     if (!NVModeInit(pScrn, pScrn->currentMode))
         return FALSE;
     NVAdjustFrame(scrnIndex, pScrn->frameX0, pScrn->frameY0, 0);
+
+    if(pNv->overlayAdaptor)
+        NVResetVideo(pScrn);
     return TRUE;
 }
 
@@ -930,18 +928,22 @@ NVPreInit(ScrnInfoPtr pScrn, int flags)
      */
     if (pNv->pEnt->device->chipset && *pNv->pEnt->device->chipset) {
 	pScrn->chipset = pNv->pEnt->device->chipset;
-        pNv->Chipset = xf86StringToToken(NVChipsets, pScrn->chipset);
+        pNv->Chipset = xf86StringToToken(NVKnownChipsets, pScrn->chipset);
         from = X_CONFIG;
     } else if (pNv->pEnt->device->chipID >= 0) {
 	pNv->Chipset = pNv->pEnt->device->chipID;
-	pScrn->chipset = (char *)xf86TokenToString(NVChipsets, pNv->Chipset);
+	pScrn->chipset = (char *)xf86TokenToString(NVKnownChipsets, 
+                                                   pNv->Chipset);
 	from = X_CONFIG;
 	xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "ChipID override: 0x%04X\n",
 		   pNv->Chipset);
     } else {
 	from = X_PROBED;
-	pNv->Chipset = (pNv->PciInfo->vendor << 16) |pNv->PciInfo->chipType;
-	pScrn->chipset = (char *)xf86TokenToString(NVChipsets, pNv->Chipset);
+	pNv->Chipset = (pNv->PciInfo->vendor << 16) | pNv->PciInfo->chipType;
+	pScrn->chipset = (char *)xf86TokenToString(NVKnownChipsets, 
+                                                   pNv->Chipset);
+        if(!pScrn->chipset)
+          pScrn->chipset = "Unknown NVIDIA chipset";
     }
     if (pNv->pEnt->device->chipRev >= 0) {
 	pNv->ChipRev = pNv->pEnt->device->chipRev;
@@ -988,7 +990,7 @@ NVPreInit(ScrnInfoPtr pScrn, int flags)
                 /* OK */
                 break;
             case 16:
-                if(pNv->Chipset == NV_CHIP_RIVA_128) {
+                if((pNv->Chipset & 0xffff) == 0x0018) {
                     xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
                         "The Riva 128 chipset does not support depth 16.  "
 			"Using depth 15 instead\n");
@@ -1263,9 +1265,14 @@ NVPreInit(ScrnInfoPtr pScrn, int flags)
         case 0x01F0:
             NV10Setup(pScrn);
 	    break;
-	case 0x0200:
-	case 0x0250:
-	case 0x0280:
+        case 0x0200:
+        case 0x0250:
+        case 0x0280:
+	case 0x0300:
+	case 0x0310:
+	case 0x0320:
+	case 0x0330:
+	case 0x0340:
             NV20Setup(pScrn);
             break;
     }
@@ -1607,6 +1614,34 @@ NVRestore(ScrnInfoPtr pScrn)
     vgaHWProtect(pScrn, FALSE);
 }
 
+static void
+NVDPMSSet(ScrnInfoPtr pScrn, int PowerManagementMode, int flags)
+{
+  unsigned char crtc1A;
+  vgaHWPtr hwp = VGAHWPTR(pScrn);
+
+  if (!pScrn->vtSema) return;
+
+  crtc1A = hwp->readCrtc(hwp, 0x1A) & ~0xC0;
+
+  switch (PowerManagementMode) {
+  case DPMSModeStandby:  /* HSync: Off, VSync: On */
+    crtc1A |= 0x80;
+    break;
+  case DPMSModeSuspend:  /* HSync: On, VSync: Off */
+    crtc1A |= 0x40;
+    break;
+  case DPMSModeOff:      /* HSync: Off, VSync: Off */
+    crtc1A |= 0xC0;
+    break;
+  case DPMSModeOn:       /* HSync: On, VSync: On */
+  default:
+    break;
+  }
+
+  hwp->writeCrtc(hwp, 0x1A, crtc1A);
+}
+
 
 /* Mandatory */
 
@@ -1841,7 +1876,11 @@ NVScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
 
     /* Call the vgaHW DPMS function directly.
        XXX There must be a way to get all the DPMS modes. */
+#if 0
     xf86DPMSInit(pScreen, vgaHWDPMSSet, 0);
+#else
+    xf86DPMSInit(pScreen, NVDPMSSet, 0);
+#endif
     DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "- DPMS set up\n"));
 
     DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "- Color maps etc. set up\n"));
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/nv/nv_proto.h b/xc/programs/Xserver/hw/xfree86/drivers/nv/nv_proto.h
index 54dc8a2e1..013f57a1b 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/nv/nv_proto.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nv/nv_proto.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_proto.h,v 1.7 2002/03/15 05:16:40 mvojkovi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_proto.h,v 1.8 2002/11/26 23:41:59 mvojkovi Exp $ */
 
 #ifndef __NV_PROTO_H__
 #define __NV_PROTO_H__
@@ -21,6 +21,7 @@ void    NVDACLoadPalette(ScrnInfoPtr pScrn, int numColors, int *indices,
 
 /* in nv_video.c */
 void NVInitVideo(ScreenPtr);
+void NVResetVideo (ScrnInfoPtr pScrnInfo);
 
 /* in nv_setup.c */
 void    RivaEnterLeave(ScrnInfoPtr pScrn, Bool enter);
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/nv/nv_setup.c b/xc/programs/Xserver/hw/xfree86/drivers/nv/nv_setup.c
index e07823a64..1fff25ad9 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/nv/nv_setup.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nv/nv_setup.c
@@ -24,13 +24,10 @@
 /* Hacked together from mga driver and 3.3.4 NVIDIA driver by Jarno Paananen
    <jpaana@s2.org> */
 
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_setup.c,v 1.19 2002/10/14 18:22:45 mvojkovi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_setup.c,v 1.27 2003/02/10 23:42:51 mvojkovi Exp $ */
 
 #include "nv_include.h"
 
-#include "nvreg.h"
-#include "nvvga.h"
-
 /*
  * Override VGA I/O routines.
  */
@@ -211,12 +208,29 @@ NVIsSecond (ScrnInfoPtr pScrn)
     NVPtr pNv = NVPTR(pScrn);
 
     if(pNv->FlatPanel == 1) {
-       switch(pNv->Chipset) {
-       case NV_CHIP_GEFORCE4_440_GO:
-       case NV_CHIP_GEFORCE4_440_GO_M64:
-       case NV_CHIP_GEFORCE4_420_GO:
-       case NV_CHIP_GEFORCE4_420_GO_M32:
-       case NV_CHIP_QUADRO4_500_GOGL:
+       switch(pNv->Chipset & 0xffff) {
+       case 0x0174:
+       case 0x0175:
+       case 0x0176:
+       case 0x0177:
+       case 0x0179:
+       case 0x017C:
+       case 0x017D:
+       case 0x0186:
+       case 0x0187:
+       /* this might not be a good default for the chips below */
+       case 0x0286:
+       case 0x028C:
+       case 0x0316:
+       case 0x0317:
+       case 0x031A:
+       case 0x031B:
+       case 0x031C:
+       case 0x031D:
+       case 0x031E:
+       case 0x031F:
+       case 0x0326:
+       case 0x032E:
            pNv->SecondCRTC = TRUE;
            break;
        default:
@@ -231,6 +245,7 @@ NVIsSecond (ScrnInfoPtr pScrn)
              pNv->SecondCRTC = FALSE;
        } else 
        if (NVIsConnected(pScrn, 1)) {
+          pNv->DDCBase = 0x36;
           if(pNv->riva.PRAMDAC0[0x0000252C/4] & 0x100)
              pNv->SecondCRTC = TRUE;
           else
@@ -341,13 +356,29 @@ NVCommonSetup(ScrnInfoPtr pScrn)
                                            0x00001000);
 
     if(pNv->FlatPanel == -1) {
-       switch(pNv->Chipset) {
-       case NV_CHIP_GEFORCE4_440_GO:
-       case NV_CHIP_GEFORCE4_440_GO_M64:
-       case NV_CHIP_GEFORCE4_420_GO:
-       case NV_CHIP_GEFORCE4_420_GO_M32:
-       case NV_CHIP_QUADRO4_500_GOGL:
-       case NV_CHIP_GEFORCE2_GO:
+       switch(pNv->Chipset & 0xffff) {
+       case 0x0112:   /* known laptop chips */
+       case 0x0174:
+       case 0x0175:
+       case 0x0176:
+       case 0x0177:
+       case 0x0179:
+       case 0x017C:
+       case 0x017D:
+       case 0x0186:
+       case 0x0187:
+       case 0x0286:
+       case 0x028C:
+       case 0x0316:
+       case 0x0317:
+       case 0x031A:
+       case 0x031B:
+       case 0x031C:
+       case 0x031D:
+       case 0x031E:
+       case 0x031F:
+       case 0x0326:
+       case 0x032E:
            xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
                       "On a laptop.  Assuming Digital Flat Panel\n");
            pNv->FlatPanel = 1;
@@ -357,9 +388,11 @@ NVCommonSetup(ScrnInfoPtr pScrn)
        }
     }
 
+    pNv->DDCBase = 0x3e;
+
     switch(pNv->Chipset & 0x0ff0) {
     case 0x0110:
-        if(pNv->Chipset == NV_CHIP_GEFORCE2_GO)
+        if((pNv->Chipset & 0xffff) == 0x0112)
             pNv->SecondCRTC = TRUE;
 #if defined(__powerpc__)
         else if(pNv->FlatPanel == 1)
@@ -372,6 +405,11 @@ NVCommonSetup(ScrnInfoPtr pScrn)
     case 0x01F0:
     case 0x0250:
     case 0x0280:
+    case 0x0300:
+    case 0x0310:
+    case 0x0320:
+    case 0x0330:
+    case 0x0340:
         NVIsSecond(pScrn);
         break;
     default:
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/nv/nv_type.h b/xc/programs/Xserver/hw/xfree86/drivers/nv/nv_type.h
index e29827e66..9e9e2bde4 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/nv/nv_type.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nv/nv_type.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_type.h,v 1.37 2002/10/14 18:22:45 mvojkovi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_type.h,v 1.39 2002/11/28 23:02:13 mvojkovi Exp $ */
 
 #ifndef __NV_STRUCT_H__
 #define __NV_STRUCT_H__
@@ -10,12 +10,15 @@
 #include "xf86Cursor.h"
 #include "xf86int10.h"
 
+
+#define BITMASK(t,b) (((unsigned)(1U << (((t)-(b)+1)))-1)  << (b))
+#define MASKEXPAND(mask) BITMASK(1?mask,0?mask)
+#define SetBF(mask,value) ((value) << (0?mask))
+#define GetBF(var,mask) (((unsigned)((var) & MASKEXPAND(mask))) >> (0?mask) )
 #define SetBitField(value,from,to) SetBF(to, GetBF(value,from))
 #define SetBit(n) (1<<(n))
 #define Set8Bits(value) ((value)&0xff)
 
-#define MAX_CURS            32
-
 typedef RIVA_HW_STATE* NVRegPtr;
 
 typedef struct {
@@ -97,7 +100,7 @@ typedef struct {
     NVFBLayout		CurrentLayout;
     /* Cursor */
     CARD32              curFg, curBg;
-    CARD32              curImage[MAX_CURS*2];
+    CARD32              curImage[256];
     /* Misc flags */
     unsigned int        opaqueMonochrome;
     int                 currentRop;
@@ -116,6 +119,7 @@ typedef struct {
     int			forceCRTC;
     OptionInfoPtr	Options;
     Bool                alphaCursor;
+    unsigned char       DDCBase;
 } NVRec, *NVPtr;
 
 #define NVPTR(p) ((NVPtr)((p)->driverPrivate))
@@ -128,57 +132,4 @@ void NVPointerMoved(int index, int x, int y);
 
 int RivaGetConfig(NVPtr);
 
-#define NV_CHIP_RIVA_128            ((PCI_VENDOR_NVIDIA_SGS << 16)| PCI_CHIP_RIVA128)
-#define NV_CHIP_TNT                 ((PCI_VENDOR_NVIDIA << 16)| PCI_CHIP_TNT)
-#define NV_CHIP_TNT2                ((PCI_VENDOR_NVIDIA << 16)| PCI_CHIP_TNT2)
-#define NV_CHIP_UTNT2               ((PCI_VENDOR_NVIDIA << 16)| PCI_CHIP_UTNT2)
-#define NV_CHIP_VTNT2               ((PCI_VENDOR_NVIDIA << 16)| PCI_CHIP_VTNT2)
-#define NV_CHIP_UVTNT2              ((PCI_VENDOR_NVIDIA << 16)| PCI_CHIP_UVTNT2)
-#define NV_CHIP_ITNT2               ((PCI_VENDOR_NVIDIA << 16)| PCI_CHIP_ITNT2)
-#define NV_CHIP_GEFORCE_256         ((PCI_VENDOR_NVIDIA << 16)| PCI_CHIP_GEFORCE_256)
-#define NV_CHIP_GEFORCE_DDR         ((PCI_VENDOR_NVIDIA << 16)| PCI_CHIP_GEFORCE_DDR)
-#define NV_CHIP_QUADRO              ((PCI_VENDOR_NVIDIA << 16)| PCI_CHIP_QUADRO)
-#define NV_CHIP_GEFORCE2_MX         ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_GEFORCE2_MX)
-#define NV_CHIP_GEFORCE2_MX_100     ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_GEFORCE2_MX_100)
-#define NV_CHIP_QUADRO2_MXR         ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_QUADRO2_MXR)
-#define NV_CHIP_GEFORCE2_GO         ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_GEFORCE2_GO)
-#define NV_CHIP_GEFORCE2_GTS        ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_GEFORCE2_GTS)
-#define NV_CHIP_GEFORCE2_TI         ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_GEFORCE2_TI)
-#define NV_CHIP_GEFORCE2_ULTRA      ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_GEFORCE2_ULTRA)
-#define NV_CHIP_QUADRO2_PRO         ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_QUADRO2_PRO)
-#define NV_CHIP_GEFORCE4_MX_460     ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_GEFORCE4_MX_460)
-#define NV_CHIP_GEFORCE4_MX_440     ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_GEFORCE4_MX_440)
-#define NV_CHIP_GEFORCE4_MX_420     ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_GEFORCE4_MX_420)
-#define NV_CHIP_GEFORCE4_440_GO     ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_GEFORCE4_440_GO)
-#define NV_CHIP_GEFORCE4_420_GO     ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_GEFORCE4_420_GO)
-#define NV_CHIP_GEFORCE4_420_GO_M32 ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_GEFORCE4_420_GO_M32)
-#define NV_CHIP_QUADRO4_500XGL      ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_QUADRO4_500XGL)
-#define NV_CHIP_GEFORCE4_440_GO_M64 ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_GEFORCE4_440_GO_M64)
-#define NV_CHIP_QUADRO4_200         ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_QUADRO4_200)
-#define NV_CHIP_QUADRO4_550XGL      ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_QUADRO4_550XGL)
-#define NV_CHIP_QUADRO4_500_GOGL    ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_QUADRO4_500_GOGL)
-#define NV_CHIP_0x0180              ((PCI_VENDOR_NVIDIA << 16) | 0x0180)
-#define NV_CHIP_0x0181              ((PCI_VENDOR_NVIDIA << 16) | 0x0181)
-#define NV_CHIP_0x0182              ((PCI_VENDOR_NVIDIA << 16) | 0x0182)
-#define NV_CHIP_0x0188              ((PCI_VENDOR_NVIDIA << 16) | 0x0188)
-#define NV_CHIP_0x018A              ((PCI_VENDOR_NVIDIA << 16) | 0x018A)
-#define NV_CHIP_0x018B              ((PCI_VENDOR_NVIDIA << 16) | 0x018B)
-#define NV_CHIP_IGEFORCE2           ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_IGEFORCE2)
-#define NV_CHIP_0x01F0              ((PCI_VENDOR_NVIDIA << 16) | 0x01F0)
-#define NV_CHIP_GEFORCE3            ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_GEFORCE3)
-#define NV_CHIP_GEFORCE3_TI_200     ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_GEFORCE3_TI_200)
-#define NV_CHIP_GEFORCE3_TI_500     ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_GEFORCE3_TI_500)
-#define NV_CHIP_QUADRO_DCC          ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_QUADRO_DCC)
-#define NV_CHIP_GEFORCE4_TI_4600    ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_GEFORCE4_TI_4600)
-#define NV_CHIP_GEFORCE4_TI_4400    ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_GEFORCE4_TI_4400)
-#define NV_CHIP_GEFORCE4_TI_4200    ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_GEFORCE4_TI_4200)
-#define NV_CHIP_QUADRO4_900XGL      ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_QUADRO4_900XGL)
-#define NV_CHIP_QUADRO4_750XGL      ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_QUADRO4_750XGL)
-#define NV_CHIP_QUADRO4_700XGL      ((PCI_VENDOR_NVIDIA << 16) | PCI_CHIP_QUADRO4_700XGL)
-#define NV_CHIP_0x0280              ((PCI_VENDOR_NVIDIA << 16) | 0x0280)
-#define NV_CHIP_0x0281              ((PCI_VENDOR_NVIDIA << 16) | 0x0281)
-#define NV_CHIP_0x0288              ((PCI_VENDOR_NVIDIA << 16) | 0x0288)
-#define NV_CHIP_0x0289              ((PCI_VENDOR_NVIDIA << 16) | 0x0289)
-
-
 #endif /* __NV_STRUCT_H__ */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/nv/nv_video.c b/xc/programs/Xserver/hw/xfree86/drivers/nv/nv_video.c
index 6ccbb80fc..e2010a992 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/nv/nv_video.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nv/nv_video.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_video.c,v 1.10 2002/06/26 22:09:07 mvojkovi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_video.c,v 1.11 2002/11/26 23:41:59 mvojkovi Exp $ */
 
 #include "xf86.h"
 #include "xf86_OSproc.h"
@@ -18,9 +18,6 @@
 #include "fourcc.h"
 
 #include "nv_include.h"
-#include "nvreg.h"
-#include "nvvga.h"
-
 
 
 #define OFF_DELAY 	450  /* milliseconds */
@@ -60,8 +57,6 @@ typedef struct _NVPortPrivRec {
 
 static XF86VideoAdaptorPtr NVSetupImageVideo(ScreenPtr);
 
-static void NVResetVideo(ScrnInfoPtr);
-
 static void NVStopOverlay (ScrnInfoPtr);
 static void NVPutOverlayImage(ScrnInfoPtr pScrnInfo,
                               int offset,
@@ -158,7 +153,7 @@ NVSetPortDefaults (ScrnInfoPtr pScrnInfo, NVPortPrivPtr pPriv)
 }
 
 
-static void 
+void 
 NVResetVideo (ScrnInfoPtr pScrnInfo)
 {
     NVPtr          pNv     = NVPTR(pScrnInfo);
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/nv/nv_xaa.c b/xc/programs/Xserver/hw/xfree86/drivers/nv/nv_xaa.c
index 56bb5f3d3..e4400b6f2 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/nv/nv_xaa.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nv/nv_xaa.c
@@ -41,15 +41,12 @@
 /* Hacked together from mga driver and 3.3.4 NVIDIA driver by
    Jarno Paananen <jpaana@s2.org> */
 
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_xaa.c,v 1.26 2002/10/14 18:22:46 mvojkovi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_xaa.c,v 1.29 2003/02/12 21:26:27 mvojkovi Exp $ */
 
 #include "nv_include.h"
 #include "xaalocal.h"
 #include "xaarop.h"
 
-#include "nvreg.h"
-#include "nvvga.h"
-
 #include "miline.h"
 
 static void
@@ -336,8 +333,8 @@ NVSubsequentColorExpandScanlineFifo(ScrnInfoPtr pScrn, int bufno)
        RIVA_FIFO_FREE(pNv->riva, Blt, 1);
        write_mem_barrier();
        pNv->riva.Blt->TopLeftSrc = 0;
-       write_mem_barrier();
     }
+    write_mem_barrier();
 }
 
 static void
@@ -394,83 +391,6 @@ NVSubsequentScanlineCPUToScreenColorExpandFill(ScrnInfoPtr pScrn, int x,
     }
 }
 
-
-/* Image writes */
-static void
-NVSetupForScanlineImageWrite(ScrnInfoPtr pScrn, int rop,
-                             unsigned int planemask, int transparency_color,
-                             int bpp, int depth)
-{
-    NVSetRopSolid(NVPTR(pScrn), rop);
-}
-
-static void
-NVSubsequentScanlineImageWriteRect(ScrnInfoPtr pScrn, int x, int y,
-                                   int w, int h, int skipleft)
-{
-    NVPtr pNv = NVPTR(pScrn);
-    int bw;
-
-    pNv->expandWidth = ((w * pScrn->bitsPerPixel) + 31) >> 5;
-    bw = (pNv->expandWidth << 2) / (pScrn->bitsPerPixel >> 3);
-
-    RIVA_FIFO_FREE( pNv->riva, Pixmap, 3 );
-    pNv->riva.Pixmap->TopLeft         = (y << 16) | (x & 0xFFFF);
-    pNv->riva.Pixmap->WidthHeight     = (h << 16) | w;
-    write_mem_barrier();
-    pNv->riva.Pixmap->WidthHeightIn   = (h << 16) | bw;
-    write_mem_barrier();
-}
-
-
-static void
-NVSubsequentImageWriteScanline(ScrnInfoPtr pScrn, int bufno)
-{
-    NVPtr pNv = NVPTR(pScrn);
-
-    int t = pNv->expandWidth;
-    CARD32 *pbits = (CARD32*)pNv->expandBuffer;
-    CARD32 *d = (CARD32*)&pNv->riva.Pixmap->Pixels;
-
-    while(t >= 16) 
-    {
-	RIVA_FIFO_FREE(pNv->riva, Pixmap, 16);
-	d[0]  = pbits[0];
-	d[1]  = pbits[1];
-	d[2]  = pbits[2];
-	d[3]  = pbits[3];
-	d[4]  = pbits[4];
-	d[5]  = pbits[5];
-	d[6]  = pbits[6];
-	d[7]  = pbits[7];
-	d[8]  = pbits[8];
-	d[9]  = pbits[9];
-	d[10] = pbits[10];
-	d[11] = pbits[11];
-	d[12] = pbits[12];
-	d[13] = pbits[13];
-	d[14] = pbits[14];
-	d[15] = pbits[15];
-	t -= 16; pbits += 16;
-    }
-    if(t) {
-	RIVA_FIFO_FREE(pNv->riva, Pixmap, t);
-	while(t >= 4) 
-	{
-	    d[0]  = pbits[0];
-	    d[1]  = pbits[1];
-	    d[2]  = pbits[2];
-	    d[3]  = pbits[3];
-	    t -= 4; pbits += 4;
-	}
-	while(t--) 
-	    *(d++) = *(pbits++); 
-    }
-    write_mem_barrier();
-}
-
-
-
 static void
 NVSetupForSolidLine(ScrnInfoPtr pScrn, int color, int rop, unsigned planemask)
 {
@@ -554,6 +474,13 @@ NVAccelInit(ScreenPtr pScreen)
     XAAInfoRecPtr infoPtr;
     ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
     NVPtr pNv = NVPTR(pScrn);
+    Bool lowClocks;
+
+    /* The hardware POSTs with clocks too low to support some acceleration
+       on NV20 and higher and we don't know enough about timing particulars
+       to raise them */
+
+    lowClocks = ((pNv->Chipset & 0x0ff0) >= 0x0200);
     
     pNv->AccelInfoRec = infoPtr = XAACreateInfoRec();
     if(!infoPtr) return FALSE;
@@ -569,6 +496,9 @@ NVAccelInit(ScreenPtr pScreen)
     infoPtr->SetupForSolidFill = NVSetupForSolidFill;
     infoPtr->SubsequentSolidFillRect = NVSubsequentSolidFillRect;
 
+    if(lowClocks)
+       infoPtr->SolidFillFlags |= GXCOPY_ONLY;
+
     /* screen to screen copy */
     infoPtr->ScreenToScreenCopyFlags = NO_TRANSPARENCY | NO_PLANEMASK;
     infoPtr->SetupForScreenToScreenCopy = NVSetupForScreenToScreenCopy;
@@ -603,10 +533,7 @@ NVAccelInit(ScreenPtr pScreen)
 
     infoPtr->NumScanlineColorExpandBuffers = 1;
 
-    if((pNv->Chipset & 0x0ff0) < 0x0250) {
-       /* The bios sets the clocks too low on NV25 and higher to 
-          accelerated color expansion without corruption and we
-          don't know enough about clocks to fiddle with them */
+    if(!lowClocks) {
        infoPtr->SetupForScanlineCPUToScreenColorExpandFill =
            NVSetupForScanlineCPUToScreenColorExpandFill;
        infoPtr->SubsequentScanlineCPUToScreenColorExpandFill = 
@@ -623,27 +550,7 @@ NVAccelInit(ScreenPtr pScreen)
     infoPtr->ScanlineColorExpandBuffers = &pNv->expandBuffer;
     infoPtr->SubsequentColorExpandScanline = NVSubsequentColorExpandScanline;
 
-    if (pNv->riva.Architecture == 4 && pScrn->bitsPerPixel == 32)
-    {
-    /* Image writes */
-        infoPtr->ScanlineImageWriteFlags = CPU_TRANSFER_PAD_DWORD |
-                                           SCANLINE_PAD_DWORD |
-/*                                         LEFT_EDGE_CLIPPING |
-	                                   LEFT_EDGE_CLIPPING_NEGATIVE_X; */
-                                           NO_PLANEMASK | NO_TRANSPARENCY |
-                                           NO_GXCOPY;
-
-        infoPtr->SetupForScanlineImageWrite = NVSetupForScanlineImageWrite;
-        infoPtr->SubsequentScanlineImageWriteRect =
-            NVSubsequentScanlineImageWriteRect;
-        infoPtr->SubsequentImageWriteScanline = NVSubsequentImageWriteScanline;
-    
-        /* We reuse the color expansion buffer */
-        infoPtr->NumScanlineImageWriteBuffers = 1;
-        infoPtr->ScanlineImageWriteBuffers = &pNv->expandBuffer;
-    }
-
-    infoPtr->SolidLineFlags = NO_PLANEMASK;
+    infoPtr->SolidLineFlags = infoPtr->SolidFillFlags;
     infoPtr->SetupForSolidLine = NVSetupForSolidLine;
     infoPtr->SubsequentSolidHorVertLine =
 		NVSubsequentSolidHorVertLine;
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/nv/riva_hw.c b/xc/programs/Xserver/hw/xfree86/drivers/nv/riva_hw.c
index 0eb7a29d2..bbb515f9b 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/nv/riva_hw.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nv/riva_hw.c
@@ -36,12 +36,11 @@
 |*     those rights set forth herein.                                        *|
 |*                                                                           *|
  \***************************************************************************/
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/riva_hw.c,v 1.35 2002/10/14 18:22:46 mvojkovi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/riva_hw.c,v 1.47 2003/02/10 23:42:51 mvojkovi Exp $ */
 
 #include "nv_local.h"
 #include "compiler.h"
 #include "nv_include.h"
-#include "nvreg.h"
 #include "riva_hw.h"
 #include "riva_tbl.h"
 
@@ -1279,8 +1278,8 @@ static void CalcStateExt
             break;
         case NV_ARCH_10:
         case NV_ARCH_20:
-            if((chip->Chipset == NV_CHIP_IGEFORCE2) ||
-               (chip->Chipset == NV_CHIP_0x01F0))
+            if(((chip->Chipset & 0xffff) == 0x01A0) ||
+               ((chip->Chipset & 0xffff) == 0x01f0))
             {
                 nForceUpdateArbitrationSettings(VClk,
                                           pixelDepth * 8,
@@ -1312,14 +1311,8 @@ static void CalcStateExt
     state->vpll     = (p << 16) | (n << 8) | m;
     state->repaint0 = (((width/8)*pixelDepth) & 0x700) >> 3;
     state->pixel    = pixelDepth > 2   ? 3    : pixelDepth;
-    state->offset0  =
-    state->offset1  =
-    state->offset2  =
-    state->offset3  = 0;
-    state->pitch0   =
-    state->pitch1   =
-    state->pitch2   =
-    state->pitch3   = pixelDepth * width;
+    state->offset   = 0;
+    state->pitch    = pixelDepth * width;
 }
 /*
  * Load fixed function state and pre-calculated/stored state.
@@ -1363,7 +1356,7 @@ static void LoadStateExt
     RIVA_HW_STATE *state
 )
 {
-    int i;
+    int i, format;
 
     /*
      * Load HW fixed function state.
@@ -1400,14 +1393,14 @@ static void LoadStateExt
             }
             for (i = 0x00000; i < 0x00800; i++)
                 chip->PRAMIN[0x00000502 + i] = (i << 12) | 0x03;
-            chip->PGRAPH[0x00000630/4] = state->offset0;
-            chip->PGRAPH[0x00000634/4] = state->offset1;
-            chip->PGRAPH[0x00000638/4] = state->offset2;
-            chip->PGRAPH[0x0000063C/4] = state->offset3;
-            chip->PGRAPH[0x00000650/4] = state->pitch0;
-            chip->PGRAPH[0x00000654/4] = state->pitch1;
-            chip->PGRAPH[0x00000658/4] = state->pitch2;
-            chip->PGRAPH[0x0000065C/4] = state->pitch3;
+            chip->PGRAPH[0x00000630/4] = state->offset;
+            chip->PGRAPH[0x00000634/4] = state->offset;
+            chip->PGRAPH[0x00000638/4] = state->offset;
+            chip->PGRAPH[0x0000063C/4] = state->offset;
+            chip->PGRAPH[0x00000650/4] = state->pitch;
+            chip->PGRAPH[0x00000654/4] = state->pitch;
+            chip->PGRAPH[0x00000658/4] = state->pitch;
+            chip->PGRAPH[0x0000065C/4] = state->pitch;
             break;
         case NV_ARCH_04:
             /*
@@ -1438,14 +1431,14 @@ static void LoadStateExt
                     LOAD_FIXED_STATE_8BPP(nv4,PGRAPH);
                     break;
             }
-            chip->PGRAPH[0x00000640/4] = state->offset0;
-            chip->PGRAPH[0x00000644/4] = state->offset1;
-            chip->PGRAPH[0x00000648/4] = state->offset2;
-            chip->PGRAPH[0x0000064C/4] = state->offset3;
-            chip->PGRAPH[0x00000670/4] = state->pitch0;
-            chip->PGRAPH[0x00000674/4] = state->pitch1;
-            chip->PGRAPH[0x00000678/4] = state->pitch2;
-            chip->PGRAPH[0x0000067C/4] = state->pitch3;
+            chip->PGRAPH[0x00000640/4] = state->offset;
+            chip->PGRAPH[0x00000644/4] = state->offset;
+            chip->PGRAPH[0x00000648/4] = state->offset;
+            chip->PGRAPH[0x0000064C/4] = state->offset;
+            chip->PGRAPH[0x00000670/4] = state->pitch;
+            chip->PGRAPH[0x00000674/4] = state->pitch;
+            chip->PGRAPH[0x00000678/4] = state->pitch;
+            chip->PGRAPH[0x0000067C/4] = state->pitch;
             break;
         case NV_ARCH_10:
         case NV_ARCH_20:
@@ -1461,48 +1454,63 @@ static void LoadStateExt
             switch (state->bpp)
             {
                 case 15:
+                    format = 2;
                     LOAD_FIXED_STATE_15BPP(nv10,PRAMIN);
                     LOAD_FIXED_STATE_15BPP(nv10,PGRAPH);
                     break;
                 case 16:
+                    format = 5;
                     LOAD_FIXED_STATE_16BPP(nv10,PRAMIN);
                     LOAD_FIXED_STATE_16BPP(nv10,PGRAPH);
                     break;
-                case 24:
                 case 32:
+                    format = 7;
                     LOAD_FIXED_STATE_32BPP(nv10,PRAMIN);
                     LOAD_FIXED_STATE_32BPP(nv10,PGRAPH);
                     break;
-                case 8:
                 default:
+                    format = 1;
                     LOAD_FIXED_STATE_8BPP(nv10,PRAMIN);
                     LOAD_FIXED_STATE_8BPP(nv10,PGRAPH);
                     break;
             }
 
 	    if(chip->Architecture == NV_ARCH_10) {
-                chip->PGRAPH[0x00000640/4] = state->offset0;
-                chip->PGRAPH[0x00000644/4] = state->offset1;
-                chip->PGRAPH[0x00000648/4] = state->offset2;
-                chip->PGRAPH[0x0000064C/4] = state->offset3;
-                chip->PGRAPH[0x00000670/4] = state->pitch0;
-                chip->PGRAPH[0x00000674/4] = state->pitch1;
-                chip->PGRAPH[0x00000678/4] = state->pitch2;
-                chip->PGRAPH[0x0000067C/4] = state->pitch3;
-                chip->PGRAPH[0x00000680/4] = state->pitch3;
+                chip->PGRAPH[0x00000640/4] = state->offset;
+                chip->PGRAPH[0x00000644/4] = state->offset;
+                chip->PGRAPH[0x00000648/4] = state->offset;
+                chip->PGRAPH[0x0000064C/4] = state->offset;
+                chip->PGRAPH[0x00000670/4] = state->pitch;
+                chip->PGRAPH[0x00000674/4] = state->pitch;
+                chip->PGRAPH[0x00000678/4] = state->pitch;
+                chip->PGRAPH[0x0000067C/4] = state->pitch;
+                chip->PGRAPH[0x00000680/4] = state->pitch;
 	    } else {
-                chip->PGRAPH[0x00000820/4] = state->offset0;
-                chip->PGRAPH[0x00000824/4] = state->offset1;
-                chip->PGRAPH[0x00000828/4] = state->offset2;
-                chip->PGRAPH[0x0000082C/4] = state->offset3;
-                chip->PGRAPH[0x00000850/4] = state->pitch0;
-                chip->PGRAPH[0x00000854/4] = state->pitch1;
-                chip->PGRAPH[0x00000858/4] = state->pitch2;
-                chip->PGRAPH[0x0000085C/4] = state->pitch3;
-                chip->PGRAPH[0x00000860/4] = state->pitch3;
-                chip->PGRAPH[0x00000864/4] = state->pitch3;
+                chip->PGRAPH[0x00000864/4] = 0x01ffffff;
+                chip->PGRAPH[0x00000868/4] = 0x01ffffff;
+                chip->PGRAPH[0x0000086c/4] = 0x01ffffff;
+                chip->PGRAPH[0x00000870/4] = 0x01ffffff;
+
+                chip->PGRAPH[0x00000820/4] = state->offset;
+                chip->PGRAPH[0x00000824/4] = state->offset;
+                chip->PGRAPH[0x00000828/4] = state->offset;
+                chip->PGRAPH[0x0000082C/4] = state->offset;
+                chip->PGRAPH[0x00000850/4] = state->pitch;
+                chip->PGRAPH[0x00000854/4] = state->pitch;
+                chip->PGRAPH[0x00000858/4] = state->pitch;
+                chip->PGRAPH[0x0000085C/4] = state->pitch;
                 chip->PGRAPH[0x000009A4/4] = chip->PFB[0x00000200/4]; 
                 chip->PGRAPH[0x000009A8/4] = chip->PFB[0x00000204/4];
+
+                if((chip->Chipset & 0x0ff0) >= 0x0300) {
+                    if(!chip->flatPanel) {
+                       chip->PRAMDAC0[0x0578/4] = state->vpllB;
+                       chip->PRAMDAC0[0x057C/4] = state->vpll2B;
+                    }
+                    chip->PGRAPH[0x00000724/4] = format | (format << 5);
+                    chip->PGRAPH[0x0000008C/4] |= 1;
+                    chip->PGRAPH[0x00000890/4] |= 0x00040000;
+                }
 	    }
             if(chip->twoHeads) {
                chip->PCRTC0[0x00000860/4] = state->head;
@@ -1519,13 +1527,13 @@ static void LoadStateExt
             chip->PMC[0x00001588/4] = 0;
 
             chip->PFB[0x00000240/4] = 0;
-            chip->PFB[0x00000244/4] = 0;
-            chip->PFB[0x00000248/4] = 0;
-            chip->PFB[0x0000024C/4] = 0;
             chip->PFB[0x00000250/4] = 0;
-            chip->PFB[0x00000254/4] = 0;
-            chip->PFB[0x00000258/4] = 0;
-            chip->PFB[0x0000025C/4] = 0;
+            chip->PFB[0x00000260/4] = 0;
+            chip->PFB[0x00000270/4] = 0;
+            chip->PFB[0x00000280/4] = 0;
+            chip->PFB[0x00000290/4] = 0;
+            chip->PFB[0x000002A0/4] = 0;
+            chip->PFB[0x000002B0/4] = 0;
 
             chip->PGRAPH[0x00000B00/4] = chip->PFB[0x00000240/4];
             chip->PGRAPH[0x00000B04/4] = chip->PFB[0x00000244/4];
@@ -1717,6 +1725,8 @@ static void UnloadStateExt
     state->interlace    = VGA_RD08(chip->PCIO, 0x03D5);
     state->vpll         = chip->PRAMDAC0[0x00000508/4];
     state->vpll2        = chip->PRAMDAC0[0x00000520/4];
+    state->vpllB        = chip->PRAMDAC0[0x00000578/4];
+    state->vpll2B       = chip->PRAMDAC0[0x0000057C/4];
     state->pllsel       = chip->PRAMDAC0[0x0000050C/4];
     state->general      = chip->PRAMDAC[0x00000600/4];
     state->scale        = chip->PRAMDAC[0x00000848/4];
@@ -1725,35 +1735,17 @@ static void UnloadStateExt
     switch (chip->Architecture)
     {
         case NV_ARCH_03:
-            state->offset0  = chip->PGRAPH[0x00000630/4];
-            state->offset1  = chip->PGRAPH[0x00000634/4];
-            state->offset2  = chip->PGRAPH[0x00000638/4];
-            state->offset3  = chip->PGRAPH[0x0000063C/4];
-            state->pitch0   = chip->PGRAPH[0x00000650/4];
-            state->pitch1   = chip->PGRAPH[0x00000654/4];
-            state->pitch2   = chip->PGRAPH[0x00000658/4];
-            state->pitch3   = chip->PGRAPH[0x0000065C/4];
+            state->offset   = chip->PGRAPH[0x00000630/4];
+            state->pitch    = chip->PGRAPH[0x00000650/4];
             break;
         case NV_ARCH_04:
-            state->offset0  = chip->PGRAPH[0x00000640/4];
-            state->offset1  = chip->PGRAPH[0x00000644/4];
-            state->offset2  = chip->PGRAPH[0x00000648/4];
-            state->offset3  = chip->PGRAPH[0x0000064C/4];
-            state->pitch0   = chip->PGRAPH[0x00000670/4];
-            state->pitch1   = chip->PGRAPH[0x00000674/4];
-            state->pitch2   = chip->PGRAPH[0x00000678/4];
-            state->pitch3   = chip->PGRAPH[0x0000067C/4];
+            state->offset   = chip->PGRAPH[0x00000640/4];
+            state->pitch    = chip->PGRAPH[0x00000670/4];
             break;
         case NV_ARCH_10:
         case NV_ARCH_20:
-            state->offset0  = chip->PGRAPH[0x00000640/4];
-            state->offset1  = chip->PGRAPH[0x00000644/4];
-            state->offset2  = chip->PGRAPH[0x00000648/4];
-            state->offset3  = chip->PGRAPH[0x0000064C/4];
-            state->pitch0   = chip->PGRAPH[0x00000670/4];
-            state->pitch1   = chip->PGRAPH[0x00000674/4];
-            state->pitch2   = chip->PGRAPH[0x00000678/4];
-            state->pitch3   = chip->PGRAPH[0x0000067C/4];
+            state->offset   = chip->PGRAPH[0x00000640/4];
+            state->pitch    = chip->PGRAPH[0x00000670/4];
             if(chip->twoHeads) {
                state->head     = chip->PCRTC0[0x00000860/4];
                state->head2    = chip->PCRTC0[0x00002860/4];
@@ -1956,17 +1948,18 @@ static void nv10GetConfig
 
 #if X_BYTE_ORDER == X_BIG_ENDIAN
     /* turn on big endian register access */
-    chip->PMC[0x00000004/4] = 0x01000001;
+    if(!(chip->PMC[0x00000004/4] & 0x01000001))
+       chip->PMC[0x00000004/4] = 0x01000001;
 #endif
 
     /*
      * Fill in chip configuration.
      */
-    if(pNv->Chipset == NV_CHIP_IGEFORCE2) {
+    if((pNv->Chipset && 0xffff) == 0x01a0) {
 	int amt = pciReadLong(pciTag(0, 0, 1), 0x7C);
 
         chip->RamAmountKBytes = (((amt >> 6) & 31) + 1) * 1024;
-    } else if(pNv->Chipset == NV_CHIP_0x01F0) {
+    } else if((pNv->Chipset & 0xffff) == 0x01f0) {
         int amt = pciReadLong(pciTag(0, 0, 1), 0x84);
 
         chip->RamAmountKBytes = (((amt >> 4) & 127) + 1) * 1024;
@@ -2017,6 +2010,11 @@ static void nv10GetConfig
     case 0x01F0:
     case 0x0250:
     case 0x0280:
+    case 0x0300:
+    case 0x0310:
+    case 0x0320:
+    case 0x0330:
+    case 0x0340:
        if(chip->PEXTDEV[0x0000/4] & (1 << 22))
            chip->CrystalFreqKHz = 27000;
        break;
@@ -2046,6 +2044,11 @@ static void nv10GetConfig
     case 0x01F0:
     case 0x0250:
     case 0x0280:
+    case 0x0300:
+    case 0x0310:
+    case 0x0320:
+    case 0x0330:
+    case 0x0340:
         chip->twoHeads = TRUE;
         break;
     default:
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/nv/riva_hw.h b/xc/programs/Xserver/hw/xfree86/drivers/nv/riva_hw.h
index 6c065744c..8d53d4fec 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/nv/riva_hw.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/nv/riva_hw.h
@@ -36,7 +36,7 @@
 |*     those rights set forth herein.                                        *|
 |*                                                                           *|
 \***************************************************************************/
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/riva_hw.h,v 1.21 2002/10/14 18:22:46 mvojkovi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/riva_hw.h,v 1.24 2003/02/10 23:42:51 mvojkovi Exp $ */
 #ifndef __RIVA_HW_H__
 #define __RIVA_HW_H__
 #define RIVA_SW_VERSION 0x00010003
@@ -390,6 +390,8 @@ typedef struct _riva_hw_state
     U032 arbitration1;
     U032 vpll;
     U032 vpll2;
+    U032 vpllB;
+    U032 vpll2B;
     U032 pllsel;
     U032 general;
     U032 crtcOwner;
@@ -400,14 +402,8 @@ typedef struct _riva_hw_state
     U032 cursor0;
     U032 cursor1;
     U032 cursor2;
-    U032 offset0;
-    U032 offset1;
-    U032 offset2;
-    U032 offset3;
-    U032 pitch0;
-    U032 pitch1;
-    U032 pitch2;
-    U032 pitch3;
+    U032 offset;
+    U032 pitch;
 } RIVA_HW_STATE;
 
 /*
@@ -418,6 +414,7 @@ typedef struct _riva_hw_state
 {                                                                  \
    while ((hwinst).FifoFreeCount < (cnt)) {                          \
         mem_barrier(); \
+        mem_barrier(); \
 	(hwinst).FifoFreeCount = (hwinst).hwptr->FifoFree >> 2;        \
    } \
    (hwinst).FifoFreeCount -= (cnt);                                \
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/rendition/Imakefile b/xc/programs/Xserver/hw/xfree86/drivers/rendition/Imakefile
index 0de8bebfa..8baf5ee3c 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/rendition/Imakefile
+++ b/xc/programs/Xserver/hw/xfree86/drivers/rendition/Imakefile
@@ -1,4 +1,4 @@
-XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/drivers/rendition/Imakefile,v 1.20 2002/04/04 14:05:45 eich Exp $
+XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/drivers/rendition/Imakefile,v 1.21 2003/02/17 17:06:43 dawes Exp $
 
 XCOMM
 XCOMM This is an Imakefile for the Rendition driver.
@@ -19,7 +19,7 @@ INCLUDES = -I. -I../../include
 INCLUDES = -I. -I$(SERVERSRC)/fb \
 	   -I$(SERVERSRC)/mi -I$(SERVERSRC)/cfb\
 	   -I$(XF86SRC)/ddc -I$(XF86SRC)/i2c -I$(XF86SRC)/vgahw \
-	   -I$(XF86SRC)/rac -I$(XF86SRC)/int10 -I$(XF86OSSRC)/vbe \
+	   -I$(XF86SRC)/rac -I$(XF86SRC)/int10 -I$(XF86SRC)/vbe \
 	   -I$(XF86COMSRC) -I$(XF86OSSRC) -I$(FONTINCSRC) -I$(XINCLUDESRC) \
 	   -I$(SERVERSRC)/include  -I$(XF86SRC)/xaa \
 	   -I$(XF86SRC)/ramdac -I$(SERVERSRC)/Xext \
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/rendition/vboard.c b/xc/programs/Xserver/hw/xfree86/drivers/rendition/vboard.c
index 4a7bc046e..2e94a53c8 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/rendition/vboard.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/rendition/vboard.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/rendition/vboard.c,v 1.15 2002/04/04 14:05:45 eich Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/rendition/vboard.c,v 1.16 2002/12/11 17:23:33 dawes Exp $ */
 /*
  * includes
  */
@@ -20,7 +20,7 @@
 #include "cscode.h"
 
 /* Global imported during compile-time */
-char MICROCODE_DIR [PATH_MAX] = MODULEDIR;
+static char MICROCODE_DIR [PATH_MAX] = MODULEDIR;
 
 /*
  * local function prototypes
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/rendition/vmodes.c b/xc/programs/Xserver/hw/xfree86/drivers/rendition/vmodes.c
index ca07d1723..3e0bfd367 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/rendition/vmodes.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/rendition/vmodes.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/rendition/vmodes.c,v 1.12 2002/04/04 14:05:45 eich Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/rendition/vmodes.c,v 1.13 2002/12/11 17:23:33 dawes Exp $ */
 /*
  * file vmodes.c
  *
@@ -115,7 +115,7 @@
  * global data
  */
 
-struct width_to_stride_t {
+static struct width_to_stride_t {
     vu32 width8bpp;
     vu8 stride0;
     vu8 stride1;
@@ -198,7 +198,7 @@ struct V1000ClocksStr {
  * local function prototypes
  */
 
-void set_PLL(IOADDRESS iob, vu32 value);
+static void set_PLL(IOADDRESS iob, vu32 value);
 static double V1000CalcClock(double target, int *M, int *N, int *P);
 static double V2200CalcClock(double target, int *m, int *n, int *p);
 
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/rendition/vramdac.c b/xc/programs/Xserver/hw/xfree86/drivers/rendition/vramdac.c
index 468f3b6a3..7652a36ea 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/rendition/vramdac.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/rendition/vramdac.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/rendition/vramdac.c,v 1.17 2002/10/09 16:38:19 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/rendition/vramdac.c,v 1.18 2002/12/11 17:23:33 dawes Exp $ */
 /*
  * includes
  */
@@ -97,13 +97,11 @@ static vu8 Bt485_read_masked(IOADDRESS port, vu8 reg, vu8 mask);
 static vu8 Bt485_read_cmd3_masked(IOADDRESS port, vu8 mask);
 #endif
 
-
-
 /*
- * global data
+ * local data
  */
 
-int Cursor_size=0;
+static int Cursor_size=0;
 
 
 
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/s3/Imakefile b/xc/programs/Xserver/hw/xfree86/drivers/s3/Imakefile
index ffb7ae482..b0762e257 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/s3/Imakefile
+++ b/xc/programs/Xserver/hw/xfree86/drivers/s3/Imakefile
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/s3/Imakefile,v 1.9 2001/07/06 07:52:01 keithp Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/s3/Imakefile,v 1.10 2003/02/17 17:06:43 dawes Exp $ */
 
 #define IHaveModules
 #include <Server.tmpl>
@@ -23,7 +23,7 @@ INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86OSSRC) \
            -I$(XF86SRC)/vgahw -I$(XF86SRC)/ramdac \
            -I$(XF86SRC)/rac -I$(XF86SRC)/int10 \
            -I$(XF86SRC)/fbdevhw -I$(XF86SRC)/ddc \
-           -I$(XF86SRC)/i2c -I$(XF86OSSRC)/vbe \
+           -I$(XF86SRC)/i2c -I$(XF86SRC)/vbe \
            -I$(SERVERSRC)/include -I$(XINCLUDESRC) -I$(FONTINCSRC) \
            -I$(EXTINCSRC) -I$(SERVERSRC)/render
 #endif     
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/s3/s3.h b/xc/programs/Xserver/hw/xfree86/drivers/s3/s3.h
index f877856c1..6d3ed32fe 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/s3/s3.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/s3/s3.h
@@ -24,7 +24,7 @@
  *
  *
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/s3/s3.h,v 1.15 2002/09/18 17:11:48 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/s3/s3.h,v 1.16 2002/12/11 17:30:47 dawes Exp $ */
 
 
 #ifndef _S3_H
@@ -196,7 +196,7 @@ void S3InitVideo(ScreenPtr pScreen);
 void S3InitStreams(ScrnInfoPtr pScrn, DisplayModePtr mode);
 
 /* IBMRGB */
-extern RamDacSupportedInfoRec IBMRamdacs[];
+extern RamDacSupportedInfoRec S3IBMRamdacs[];
 Bool S3ProbeIBMramdac(ScrnInfoPtr pScrn);
 void S3IBMRGB_PreInit(ScrnInfoPtr pScrn);
 void S3IBMRGB_Init(ScrnInfoPtr pScrn, DisplayModePtr mode);
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/s3/s3_IBMRGB.c b/xc/programs/Xserver/hw/xfree86/drivers/s3/s3_IBMRGB.c
index 5cd7348c7..e1edc0f87 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/s3/s3_IBMRGB.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/s3/s3_IBMRGB.c
@@ -24,7 +24,7 @@
  *
  *
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/s3/s3_IBMRGB.c,v 1.3 2001/10/28 03:33:44 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/s3/s3_IBMRGB.c,v 1.5 2003/02/17 16:45:24 dawes Exp $ */
 
 
 #include "xf86.h"
@@ -48,7 +48,7 @@
 #define IBMRGB_INDEX_CONTROL        0x3C7   /* CR55 low bit == 1 */
 
 
-void S3OutIBMRGBIndReg(ScrnInfoPtr pScrn, CARD32 reg,
+static void S3OutIBMRGBIndReg(ScrnInfoPtr pScrn, CARD32 reg,
 		       unsigned char mask, unsigned char data)
 {
 	S3Ptr pS3 = S3PTR(pScrn);
@@ -70,7 +70,7 @@ void S3OutIBMRGBIndReg(ScrnInfoPtr pScrn, CARD32 reg,
 }
 
 
-unsigned char S3InIBMRGBIndReg(ScrnInfoPtr pScrn, CARD32 reg)
+static unsigned char S3InIBMRGBIndReg(ScrnInfoPtr pScrn, CARD32 reg)
 {
 	S3Ptr pS3 = S3PTR(pScrn);
 	unsigned char tmp, ret;
@@ -90,22 +90,22 @@ unsigned char S3InIBMRGBIndReg(ScrnInfoPtr pScrn, CARD32 reg)
 }
 
 
-void S3IBMWriteAddress(ScrnInfoPtr pScrn, CARD32 index)
+static void S3IBMWriteAddress(ScrnInfoPtr pScrn, CARD32 index)
 {
 	outb(IBMRGB_WRITE_ADDR, index);
 }
 
-void S3IBMWriteData(ScrnInfoPtr pScrn, unsigned char data)
+static void S3IBMWriteData(ScrnInfoPtr pScrn, unsigned char data)
 {
 	outb(IBMRGB_INDEX_DATA, data);
 }
 
-void S3IBMReadAddress(ScrnInfoPtr pScrn, CARD32 index)
+static void S3IBMReadAddress(ScrnInfoPtr pScrn, CARD32 index)
 {
 	outb(IBMRGB_READ_ADDR, index);
 }
 
-unsigned char S3IBMReadData(ScrnInfoPtr pScrn)
+static unsigned char S3IBMReadData(ScrnInfoPtr pScrn)
 {
 	return inb(IBMRGB_RAMDAC_DATA);
 }
@@ -133,14 +133,14 @@ Bool S3ProbeIBMramdac(ScrnInfoPtr pScrn)
 		return FALSE;
 	}
 
-	pS3->RamDac = IBMramdacProbe(pScrn, IBMRamdacs);
+	pS3->RamDac = IBMramdacProbe(pScrn, S3IBMRamdacs);
 	if (pS3->RamDac)
 		return TRUE;
 
 	return FALSE;
 }
 
-void S3ProgramIBMRGBClock(ScrnInfoPtr pScrn, int clk, unsigned char m,
+static void S3ProgramIBMRGBClock(ScrnInfoPtr pScrn, int clk, unsigned char m,
 			  unsigned char n, unsigned char df)
 {
 	S3OutIBMRGBIndReg(pScrn, IBMRGB_misc_clock, ~1, 1);
@@ -153,7 +153,7 @@ void S3ProgramIBMRGBClock(ScrnInfoPtr pScrn, int clk, unsigned char m,
 }
 
 
-void S3IBMRGBSetClock(ScrnInfoPtr pScrn, long freq, int clk, long dacspeed,
+static void S3IBMRGBSetClock(ScrnInfoPtr pScrn, long freq, int clk, long dacspeed,
 		      long fref)
 {
 	volatile double ffreq, fdacspeed, ffref;
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/s3/s3_Ti.c b/xc/programs/Xserver/hw/xfree86/drivers/s3/s3_Ti.c
index 12ceef878..81bab6ab6 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/s3/s3_Ti.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/s3/s3_Ti.c
@@ -24,7 +24,7 @@
  *
  *
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/s3/s3_Ti.c,v 1.4 2001/10/28 03:33:44 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/s3/s3_Ti.c,v 1.5 2003/02/17 16:45:24 dawes Exp $ */
 
 #include "xf86.h"
 #include "xf86_OSproc.h"
@@ -93,7 +93,7 @@ void S3OutTiIndReg(ScrnInfoPtr pScrn, CARD32 reg, unsigned char mask,
 }
 
 
-unsigned char S3InTiIndReg(ScrnInfoPtr pScrn, CARD32 reg)
+static unsigned char S3InTiIndReg(ScrnInfoPtr pScrn, CARD32 reg)
 {
 	S3Ptr pS3 = S3PTR(pScrn);
 	int vgaCRIndex = pS3->vgaCRIndex, vgaCRReg = pS3->vgaCRReg;
@@ -418,7 +418,7 @@ static void S3TiDACProgramClock(ScrnInfoPtr pScrn, int clk,
 }
 
 
-void S3TiDACSetClock(ScrnInfoPtr pScrn, long freq, int clk)
+static void S3TiDACSetClock(ScrnInfoPtr pScrn, long freq, int clk)
 {
 	int m, n, p;
 
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/s3/s3_Trio64DAC.c b/xc/programs/Xserver/hw/xfree86/drivers/s3/s3_Trio64DAC.c
index d6a862f9d..fa5d5e876 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/s3/s3_Trio64DAC.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/s3/s3_Trio64DAC.c
@@ -24,7 +24,7 @@
  *
  *
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/s3/s3_Trio64DAC.c,v 1.4 2001/10/28 03:33:44 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/s3/s3_Trio64DAC.c,v 1.5 2003/02/17 16:45:24 dawes Exp $ */
 
 #include "xf86.h"
 #include "xf86_OSproc.h"
@@ -216,7 +216,7 @@ S3TrioCalcClock(long freq, int min_m, int min_n1, int max_n1, int min_n2,
 }
 
 
-void S3TrioSetPLL(ScrnInfoPtr pScrn, int clk, unsigned char m,
+static void S3TrioSetPLL(ScrnInfoPtr pScrn, int clk, unsigned char m,
 		  unsigned char n)
 {
 	unsigned char tmp;
@@ -266,7 +266,7 @@ void S3TrioSetPLL(ScrnInfoPtr pScrn, int clk, unsigned char m,
 }
 
 
-void S3TrioSetClock(ScrnInfoPtr pScrn, long freq, int clk, int min_m,
+static void S3TrioSetClock(ScrnInfoPtr pScrn, long freq, int clk, int min_m,
 		    int min_n1, int max_n1, int min_n2, int max_n2,
 		    int pll_type, long freq_min, long freq_max)
 {
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/s3/s3_driver.c b/xc/programs/Xserver/hw/xfree86/drivers/s3/s3_driver.c
index 68eb336f5..b40b1646b 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/s3/s3_driver.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/s3/s3_driver.c
@@ -34,7 +34,7 @@
  *
  *
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/s3/s3_driver.c,v 1.9 2002/09/16 18:05:58 eich Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/s3/s3_driver.c,v 1.12 2003/02/14 18:06:58 dawes Exp $ */
 
 
 #include "xf86.h"
@@ -164,7 +164,7 @@ static OptionInfoRec S3Options[] = {
 	{ -1, NULL, OPTV_NONE, {0}, FALSE }
 };
 
-RamDacSupportedInfoRec IBMRamdacs[] = {
+RamDacSupportedInfoRec S3IBMRamdacs[] = {
 	{ IBM524_RAMDAC },
 	{ IBM524A_RAMDAC },
 	{ -1 }
@@ -700,7 +700,7 @@ static Bool S3PreInit(ScrnInfoPtr pScrn, int flags)
         i = xf86ValidateModes(pScrn, pScrn->monitor->Modes,
                               pScrn->display->modes, clockRanges,
                               NULL, 256, 2048, pScrn->bitsPerPixel,
-                              128, 2048, pScrn->virtualX,
+                              128, 2048, pScrn->display->virtualX,
                               pScrn->display->virtualY, pScrn->videoRam * 1024,
                               LOOKUP_BEST_REFRESH);
 
@@ -1605,10 +1605,9 @@ static Bool S3ModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
 	else
 		new->cr58 = 0x17;
 
-	if (pS3->Chipset == PCI_CHIP_968)
-		new->cr58 = 0x52;
-	else if ((pS3->Chipset == PCI_CHIP_964_0) ||
-		 (pS3->Chipset == PCI_CHIP_964_1))
+	if ((pS3->Chipset == PCI_CHIP_968) ||
+	    (pS3->Chipset == PCI_CHIP_964_0) ||
+	    (pS3->Chipset == PCI_CHIP_964_1))
 		new->cr58 |= 0x40;
 
 	outb(vgaCRIndex, 0x59);
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/s3virge/Imakefile b/xc/programs/Xserver/hw/xfree86/drivers/s3virge/Imakefile
index 92776d961..66bd7d7a0 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/s3virge/Imakefile
+++ b/xc/programs/Xserver/hw/xfree86/drivers/s3virge/Imakefile
@@ -1,4 +1,4 @@
-XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/drivers/s3virge/Imakefile,v 1.20 2001/01/24 00:06:26 dawes Exp $
+XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/drivers/s3virge/Imakefile,v 1.21 2003/02/17 17:06:43 dawes Exp $
 /*
  *
  * Copyright 1995-1998 The XFree86 Project, Inc.
@@ -29,7 +29,7 @@ INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86OSSRC) \
 	   -I$(XF86SRC)/ddc -I$(XF86SRC)/i2c \
 	   -I$(XF86SRC)/rac -I$(XF86SRC)/int10 \
            -I$(SERVERSRC)/include -I$(XINCLUDESRC) -I$(FONTINCSRC) \
-           -I$(EXTINCSRC) -I$(XF86OSSRC)/vbe -I$(XF86SRC)/shadowfb \
+           -I$(EXTINCSRC) -I$(XF86SRC)/vbe -I$(XF86SRC)/shadowfb \
 	   -I$(SERVERSRC)/render
 #endif
 
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/s3virge/TODO_NOTES b/xc/programs/Xserver/hw/xfree86/drivers/s3virge/TODO_NOTES
index ad8133f09..de5920bae 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/s3virge/TODO_NOTES
+++ b/xc/programs/Xserver/hw/xfree86/drivers/s3virge/TODO_NOTES
@@ -1,28 +1,26 @@
 S3 ViRGE 4.0 devel notes
 
-rev: 
-10 Jan 2002 KJB
-
-
-Function		Implemented
---------		-----------
--required-
-S3VProbe;      		X
-S3VPreInit;    		X
-S3VScreenInit; 		X
-S3VSwitchMode; 		X
-S3VAdjustFrame;		X
-S3VEnterVT;    		X
-S3VLeaveVT;    		X
-S3VFreeScreen; 		X
-S3VValidMode;		X - dummy
--private-
-S3VSave			X
-S3VRestore		X
 
 
 Status
 ------
+1/26/2003
+Ver 1.8.6
+Pre-4.3.0 release.  320x240 doublescan support w/mouse adjust,
+power management printouts, DAC error printout fix, log XVideo status based
+on chipset, preliminary support for disabling XV when a mode doesn't
+support it.
+
+5/18/2002
+Ver 1.8.5
+320x240 mode support (doublescan).
+
+2/2/02
+Ver 1.8.4
+Make 320x240 mode work in depth 15 & 16.
+Testing, need to switch streams on/off based on dblscan_v flag and mode.
+Virge MX panel_on test (doesn't work.)
+
 1/10/02
 Ver 1.8.3
 DGA fix, buffer pointer used wrong value.  Submitted for 4.2.0 (late).
@@ -277,13 +275,25 @@ mode is not recovered.
 
 TODO items
 ----------
-Put vgaHWUnlockmmio in S3VModeInit (see MGAModeInit for example)?
-
-
-ViRGE MX code appears to be in 3.3.2 tree only, port to 4.0.  I have
-started to added the chipset info in the main driver code. (KJB)
+1/30/03 General option "videoram" is ignored by the virge driver.
+  (Meelis Roos)
+3/24/02 Xv reported to not work as secondary in Xinerama multihead.
+  (xav on irc)
+3/24/02 DPMS doesn't fully disable the screen.  Blue line across the
+  center in all modes. (xav on irc)
+3/25/02 Secondary reports primary BIOS during int10 detection. ie:
+
+(II) S3VIRGE(1): VESA BIOS detected
+(II) S3VIRGE(1): VESA VBE Version 2.0
+(II) S3VIRGE(1): VESA VBE Total Mem: 4194240 kB
+(II) S3VIRGE(1): VESA VBE OEM: ATI RAGE128
+(II) S3VIRGE(1): VESA VBE OEM Software Rev: 1.0
+(II) S3VIRGE(1): VESA VBE OEM Vendor: ATI Technologies Inc.
+(II) S3VIRGE(1): VESA VBE OEM Product: R128
+(II) S3VIRGE(1): VESA VBE OEM Product Rev: 01.00
+
+(xav on irc)
 
-modes notes: move mode Private S3V settings to mode init function?
 
 Check CR65 usage, bit 2 set based on S3_EARLY_SC?  In my manual bit 2 is
 enable MMIO to RAMDAC registers.
@@ -313,4 +323,4 @@ the new config. management stuff may help here.
 
 
 
-$XFree86: xc/programs/Xserver/hw/xfree86/drivers/s3virge/TODO_NOTES,v 1.21 2002/01/14 18:02:58 dawes Exp $
+$XFree86: xc/programs/Xserver/hw/xfree86/drivers/s3virge/TODO_NOTES,v 1.23 2003/02/13 03:21:33 dawes Exp $
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v.h b/xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v.h
index b5b0c9a78..cdbcf0a9d 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v.h,v 1.30 2002/01/25 21:56:08 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v.h,v 1.31 2003/02/04 02:20:49 dawes Exp $ */
 
 /*
 Copyright (C) 1994-1999 The XFree86 Project, Inc.  All Rights Reserved.
@@ -391,7 +391,8 @@ typedef struct tagS3VRec {
 
 /* prototypes */
 /* s3v_dac.c */
-extern void S3VCommonCalcClock(long freq, int min_m, int min_n1, int max_n1,
+extern void S3VCommonCalcClock(ScrnInfoPtr pScrn, DisplayModePtr mode, 
+			long freq, int min_m, int min_n1, int max_n1,
 			int min_n2, int max_n2, long freq_min, long freq_max,
 			unsigned char * mdiv, unsigned char * ndiv);
 
@@ -424,7 +425,7 @@ void s3vRefreshArea32(ScrnInfoPtr pScrn, int num, BoxPtr pbox);
 
 /* s3v_xv.c  X Video Extension support */
 void S3VInitVideo(ScreenPtr pScreen);
-
+int S3VQueryXvCapable(ScrnInfoPtr);
 
 #endif  /*_S3V_H*/
 
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v_dac.c b/xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v_dac.c
index de701f7f6..b3e31fb72 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v_dac.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v_dac.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v_dac.c,v 1.3 1999/03/29 12:17:55 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v_dac.c,v 1.4 2003/02/04 02:20:50 dawes Exp $ */
 
 /*
 Copyright (C) 1994-1998 The XFree86 Project, Inc.  All Rights Reserved.
@@ -44,11 +44,13 @@ in this Software without prior written authorization from the XFree86 Project.
 
 	/* function */
 void
-S3VCommonCalcClock(long freq, int min_m, int min_n1, int max_n1, int min_n2, int max_n2, 
-		long freq_min, long freq_max,
-		unsigned char * mdiv, unsigned char * ndiv)
+S3VCommonCalcClock(ScrnInfoPtr pScrn, DisplayModePtr mode,
+		   long freq, int min_m, int min_n1, 
+		   int max_n1, int min_n2, int max_n2, 
+		   long freq_min, long freq_max,
+		   unsigned char * mdiv, unsigned char * ndiv)
 {
-   double ffreq, ffreq_min, ffreq_max;
+   double ffreq, ffreq_min, ffreq_max, ffreq_min_warn;
    double div, diff, best_diff;
    unsigned int m;
    unsigned char n1, n2;
@@ -58,14 +60,24 @@ S3VCommonCalcClock(long freq, int min_m, int min_n1, int max_n1, int min_n2, int
    ffreq_min = freq_min / 1000.0 / BASE_FREQ;
    ffreq_max = freq_max / 1000.0 / BASE_FREQ;
 
-   if (ffreq < ffreq_min / (1<<max_n2)) {
-      ErrorF("invalid frequency %1.3f MHz  [freq >= %1.3f MHz]\n", 
-	     ffreq*BASE_FREQ, ffreq_min*BASE_FREQ / (1<<max_n2));
-      ffreq = ffreq_min / (1<<max_n2);
+   /* Doublescan modes can run at half the min frequency */
+   /* But only use that value for warning and changing */
+   /* ffreq, don't change the actual min used for clock calcs below. */
+   if(mode->Flags & V_DBLSCAN && ffreq_min)
+     ffreq_min_warn = ffreq_min / 2;
+   else
+     ffreq_min_warn = ffreq_min;
+
+   if (ffreq < ffreq_min_warn / (1<<max_n2)) {
+      xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+		 "invalid frequency %1.3f MHz  [freq <= %1.3f MHz]\n", 
+		 ffreq*BASE_FREQ, ffreq_min_warn*BASE_FREQ / (1<<max_n2));
+      ffreq = ffreq_min_warn / (1<<max_n2);
    }
    if (ffreq > ffreq_max / (1<<min_n2)) {
-      ErrorF("invalid frequency %1.3f MHz  [freq <= %1.3f MHz]\n", 
-	     ffreq*BASE_FREQ, ffreq_max*BASE_FREQ / (1<<min_n2));
+      xf86DrvMsg(pScrn->scrnIndex, X_ERROR,      
+		 "invalid frequency %1.3f MHz  [freq >= %1.3f MHz]\n", 
+		 ffreq*BASE_FREQ, ffreq_max*BASE_FREQ / (1<<min_n2));
       ffreq = ffreq_max / (1<<min_n2);
    }
 
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v_driver.c b/xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v_driver.c
index 00d1dd6af..4fac8a3ed 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v_driver.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v_driver.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v_driver.c,v 1.84 2002/07/24 01:47:31 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v_driver.c,v 1.86 2003/02/04 02:20:50 dawes Exp $ */
 
 /*
 Copyright (C) 1994-1999 The XFree86 Project, Inc.  All Rights Reserved.
@@ -112,10 +112,10 @@ static int pix24bpp = 0;
  
 #define S3VIRGE_NAME "S3VIRGE"
 #define S3VIRGE_DRIVER_NAME "s3virge"
-#define S3VIRGE_VERSION_NAME "1.8.3"
+#define S3VIRGE_VERSION_NAME "1.8.6"
 #define S3VIRGE_VERSION_MAJOR   1
 #define S3VIRGE_VERSION_MINOR   8
-#define S3VIRGE_PATCHLEVEL      3
+#define S3VIRGE_PATCHLEVEL      6
 #define S3VIRGE_DRIVER_VERSION ((S3VIRGE_VERSION_MAJOR << 24) | \
 				(S3VIRGE_VERSION_MINOR << 16) | \
 				S3VIRGE_PATCHLEVEL)
@@ -889,18 +889,6 @@ S3VPreInit(ScrnInfoPtr pScrn, int flags)
 	xf86DrvMsg(pScrn->scrnIndex, X_DEFAULT, "mx_cr3a_fix.\n");
       }
 
-    if (xf86IsOptionSet(ps3v->Options, OPTION_XVIDEO)) 
-      {
-	if (xf86GetOptValBool(ps3v->Options, OPTION_XVIDEO ,&ps3v->XVideo))
-	  xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "%s XVideo.\n",
-		     ps3v->XVideo ? "Enabling (default)" : "Disabling");
-      }
-    else
-      {
-	ps3v->XVideo = TRUE;
-	xf86DrvMsg(pScrn->scrnIndex, X_DEFAULT, "XVideo allowed (depends on chipset).\n");
-      }
-
     /* Find the PCI slot for this screen */
     /*
      * XXX Ignoring the Type list for now.  It might be needed when
@@ -992,6 +980,29 @@ S3VPreInit(ScrnInfoPtr pScrn, int flags)
 	
     ps3v->PciTag = pciTag(ps3v->PciInfo->bus, ps3v->PciInfo->device,
 			  ps3v->PciInfo->func);
+
+    /* Handle XVideo after we know chipset, so we can give an */
+    /* intelligent comment about support */
+    if (xf86IsOptionSet(ps3v->Options, OPTION_XVIDEO)) 
+      {
+	if(S3VQueryXvCapable(pScrn))
+	  {
+	    if (xf86GetOptValBool(ps3v->Options, OPTION_XVIDEO ,&ps3v->XVideo))
+	      xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "%s XVideo.\n",
+			 ps3v->XVideo ? "Enabling (default)" : "Disabling");
+	  }
+	else
+	  xf86DrvMsg(pScrn->scrnIndex, X_DEFAULT, "XVideo not supported.\n");
+      }
+    else
+      {
+	ps3v->XVideo = S3VQueryXvCapable(pScrn);
+	if(ps3v->XVideo)
+	  xf86DrvMsg(pScrn->scrnIndex, X_DEFAULT, "XVideo supported.\n");
+	else
+	  xf86DrvMsg(pScrn->scrnIndex, X_DEFAULT, "XVideo not supported.\n");
+      }
+
 			  
   S3VMapMem(pScrn);
   hwp = VGAHWPTR(pScrn);
@@ -1004,11 +1015,11 @@ S3VPreInit(ScrnInfoPtr pScrn, int flags)
 	vgaCRIndex, vgaIOBase, hwp->MMIOBase );
 
 
-   #if 0	/* Not needed in 4.0 flavors */
+#if 0	/* Not needed in 4.0 flavors */
    /* Unlock sys regs */
    VGAOUT8(vgaCRIndex, 0x38);
    VGAOUT8(vgaCRReg, 0x48);
-   #endif
+#endif
 
    /* Next go on to detect amount of installed ram */
 
@@ -1343,15 +1354,15 @@ S3VPreInit(ScrnInfoPtr pScrn, int flags)
 #endif
 
 
-  #if 0
+#if 0
   if (ps3v->Chipset == S3_ViRGE_VX ) {
     ps3v->minClock = 220000;
   } else {
     ps3v->minClock = 135000;
   }
-  #else
-    ps3v->minClock = 20000;  /* cep */
-  #endif
+#else
+    ps3v->minClock = 10000;  /* cep */
+#endif
   
     xf86ErrorFVerb(VERBLEV, 
 	"	S3VPreInit minClock=%d, maxClock=%d\n",
@@ -1395,7 +1406,7 @@ S3VPreInit(ScrnInfoPtr pScrn, int flags)
     clockRanges->maxClock = ps3v->maxClock;
     clockRanges->clockIndex = -1;		/* programmable */
     clockRanges->interlaceAllowed = TRUE;	/* yes, S3V SVGA 3.3.2 */
-    clockRanges->doubleScanAllowed = FALSE;	/* no, S3V SVGA 3.3.2 */
+    clockRanges->doubleScanAllowed = TRUE;
   
   					/* Screen pointer 		*/
     i = xf86ValidateModes(pScrn, 
@@ -3019,10 +3030,12 @@ S3VModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
 
    if(ps3v->MCLK> 0) {
        if (S3_ViRGE_MX_SERIES(ps3v->Chipset))
-	  S3VCommonCalcClock((int)(ps3v->MCLK / ps3v->refclk_fact), 1, 1, 31, 0, 3,
+	  S3VCommonCalcClock(pScrn, mode, 
+			     (int)(ps3v->MCLK / ps3v->refclk_fact), 
+			     1, 1, 31, 0, 3,
 			     135000, 270000, &new->SR11, &new->SR10);
        else
-	  S3VCommonCalcClock(ps3v->MCLK, 1, 1, 31, 0, 3,
+	  S3VCommonCalcClock(pScrn, mode, ps3v->MCLK, 1, 1, 31, 0, 3,
 			     135000, 270000, &new->SR11, &new->SR10);
        }
    else {
@@ -3055,7 +3068,7 @@ S3VModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
           S3VInitSTREAMS(pScrn, new->STREAMS, mode);
           new->MMPR0 = 0xc098;            /* Adjust FIFO slots */
           }
-       S3VCommonCalcClock(dclk, 1, 1, 31, 0, 4, 
+       S3VCommonCalcClock(pScrn, mode, dclk, 1, 1, 31, 0, 4, 
 	   220000, 440000, &new->SR13, &new->SR12);
 
       } /* end VX if() */
@@ -3120,17 +3133,21 @@ S3VModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
 		 ps3v->LCDClk = ((int)(ps3v->refclk_fact * 1431818 * (sr13+2)) / (n1+2) / (1 << n2) + 50) / 100;
 	       }
 	     }
-	     S3VCommonCalcClock((int)(ps3v->LCDClk / ps3v->refclk_fact), 1, 1, 31, 0, 4,
+	     S3VCommonCalcClock(pScrn, mode, 
+			     (int)(ps3v->LCDClk / ps3v->refclk_fact), 
+			     1, 1, 31, 0, 4,
 			     170000, 340000, &new->SR13, &ndiv);
 	   }
 	   else
-	     S3VCommonCalcClock((int)(dclk / ps3v->refclk_fact), 1, 1, 31, 0, 4,
+	     S3VCommonCalcClock(pScrn, mode, 
+			     (int)(dclk / ps3v->refclk_fact), 
+			     1, 1, 31, 0, 4,
 			     170000, 340000, &new->SR13, &ndiv);
 	   VGAOUT8(0x3c4, 0x08);
 	   VGAOUT8(0x3c5, sr8);
 	 }
 	 else  /* S3_ViRGE_GX2 */
-	   S3VCommonCalcClock(dclk, 1, 1, 31, 0, 4,
+	   S3VCommonCalcClock(pScrn, mode, dclk, 1, 1, 31, 0, 4,
 			   170000, 340000, &new->SR13, &ndiv);
          new->SR29 = ndiv >> 7;
          new->SR12 = (ndiv & 0x1f) | ((ndiv & 0x60) << 1);
@@ -3178,7 +3195,7 @@ S3VModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
          new->MMPR0 = 0x10000;            /* Still more FIFO slots */
 	 new->SR0F = 0x10;
       }
-      S3VCommonCalcClock(dclk, 1, 1, 31, 0, 4,
+      S3VCommonCalcClock(pScrn, mode, dclk, 1, 1, 31, 0, 4,
                      230000, 460000, &new->SR13, &new->SR12);
    } /* end TRIO_3D if() */
    else if(ps3v->Chipset == S3_ViRGE_DXGX) {
@@ -3193,11 +3210,18 @@ S3VModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
          new->CR67 = 0x30;                       /* 15bpp */
          }
       else if (pScrn->bitsPerPixel == 16) {
-         new->CR67 = 0x50 | 0x0c;
-	 /* Flag STREAMS proc. required */
-	 /* XV support needs STREAMS in depth 16 */
-         ps3v->NeedSTREAMS = TRUE;
-         S3VInitSTREAMS(pScrn, new->STREAMS, mode);
+	if(mode->Flags & V_DBLSCAN)
+	  {
+	    new->CR67 = 0x50;
+	  }
+	else
+	  {
+	    new->CR67 = 0x50 | 0x0c;
+	    /* Flag STREAMS proc. required */
+	    /* XV support needs STREAMS in depth 16 */
+	    ps3v->NeedSTREAMS = TRUE;
+	    S3VInitSTREAMS(pScrn, new->STREAMS, mode);
+	  }
 	 if( ps3v->XVideo )
 	   {
 	     new->MMPR0 = 0x107c02;            /* Adjust FIFO slots, overlay */
@@ -3228,7 +3252,7 @@ S3VModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
          S3VInitSTREAMS(pScrn, new->STREAMS, mode);
          new->MMPR0 = 0x10000;            /* Still more FIFO slots */
          }
-      S3VCommonCalcClock(dclk, 1, 1, 31, 0, 3, 
+      S3VCommonCalcClock(pScrn, mode, dclk, 1, 1, 31, 0, 3, 
 	135000, 270000, &new->SR13, &new->SR12);
    } /* end DXGX if() */
    else {           /* Everything else ... (only ViRGE) */
@@ -3259,7 +3283,7 @@ S3VModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
          S3VInitSTREAMS(pScrn, new->STREAMS, mode);
          new->MMPR0 = 0x10000;            /* Still more FIFO slots */
          }
-      S3VCommonCalcClock(dclk, 1, 1, 31, 0, 3, 
+      S3VCommonCalcClock(pScrn, mode, dclk, 1, 1, 31, 0, 3, 
 	135000, 270000, &new->SR13, &new->SR12);
       } /* end great big if()... */
 
@@ -3342,7 +3366,11 @@ S3VModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
    width = (pScrn->displayWidth * (pScrn->bitsPerPixel / 8))>> 3;
    vganew->CRTC[19] = 0xFF & width;
    new->CR51 = (0x300 & width) >> 4; /* Extension bits */
-   
+
+   /* Set doublescan */
+   if( mode->Flags & V_DBLSCAN)
+     vganew->CRTC[9] |= 0x80;
+  
    /* And finally, select clock source 2 for programmable PLL */
    vganew->MiscOutReg |= 0x0c;      
 
@@ -3399,14 +3427,14 @@ S3VModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
 				/* in 3.3.3 and never changed. 		*/
 				/* Also, bit 0 is never set in 3.9Nm,	*/
 				/* so I left this out for 4.0.			*/
-   #if 0
+#if 0
       if (mode->Private[0] & (1 << S3_INVERT_VCLK)) {
 	 if (mode->Private[S3_INVERT_VCLK])
 	    new->CR67 |= 1;
 	 else
 	    new->CR67 &= ~1;
       }
-   #endif
+#endif
       				/* S3_BLANK_DELAY settings based on 	*/
 				/* defaults only. From 3.3.3 		*/
    {
@@ -3442,14 +3470,14 @@ S3VModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
 				/* in 3.3.3 and never changed. 		*/
 				/* Also, bit 1 is never set in 3.9Nm,	*/
 				/* so I left this out for 4.0.			*/
-   #if 0
+#if 0
       if (mode->Private[0] & (1 << S3_EARLY_SC)) {
 	 if (mode->Private[S3_EARLY_SC])
 	    new->CR65 |= 2;
 	 else
 	    new->CR65 &= ~2;
       }
-   #endif
+#endif
   
    VGAOUT8(vgaCRIndex, 0x68);
    new->CR68 = VGAIN8(vgaCRReg);
@@ -3891,6 +3919,7 @@ S3VDisplayPowerManagementSet(ScrnInfoPtr pScrn, int PowerManagementMode,
 {
   S3VPtr ps3v;
   unsigned char sr8 = 0x0, srd = 0x0;
+  char modestr[][40] = { "On","Standby","Suspend","Off" };
 
   ps3v = S3VPTR(pScrn);
   
@@ -3931,6 +3960,9 @@ S3VDisplayPowerManagementSet(ScrnInfoPtr pScrn, int PowerManagementMode,
   VGAOUT8(0x3c4, 0x0d);
   VGAOUT8(0x3c5, srd);
 
+  xf86ErrorFVerb(VERBLEV, "Power Manag: set:%s\n", 
+		 modestr[PowerManagementMode]);
+  
   return;
 }
 
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v_hwcurs.c b/xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v_hwcurs.c
index 07ff666ef..69c81b1a6 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v_hwcurs.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v_hwcurs.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v_hwcurs.c,v 1.6 2000/02/08 17:19:16 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v_hwcurs.c,v 1.7 2003/02/04 02:20:50 dawes Exp $ */
 
 /*
 Copyright (C) 1994-1999 The XFree86 Project, Inc.  All Rights Reserved.
@@ -132,7 +132,10 @@ S3VSetCursorPosition(ScrnInfoPtr pScrn, int x, int y)
       y = 0;
    }
 
-   /* This is the recomended order to move the cursor */
+   /* Double y position for a doublescan mode */
+   if(pScrn->currentMode->Flags & V_DBLSCAN) y <<= 1;
+
+   /* This is the recommended order to move the cursor */
 
    outCRReg( 0x46, (x & 0xff00)>>8 );
    outCRReg( 0x47, (x & 0xff) );
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v_xv.c b/xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v_xv.c
index 1729ca81c..0e2995b82 100755
--- a/xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v_xv.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v_xv.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v_xv.c,v 1.5 2001/11/21 22:43:00 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v_xv.c,v 1.7 2003/02/04 02:20:50 dawes Exp $ */
 /*
 Copyright (C) 2000 The XFree86 Project, Inc.  All Rights Reserved.
 
@@ -55,6 +55,7 @@ in this Software without prior written authorization from the XFree86 Project.
 
 #ifndef XvExtension
 void S3VInitVideo(ScreenPtr pScreen) {}
+int S3VQueryXvCapable(ScrnInfoPtr) {return FALSE;}
 #else
 
 #if 0
@@ -93,6 +94,25 @@ static Atom xvBrightness, xvContrast, xvColorKey;
 
 #endif /* 0 */
 
+int S3VQueryXvCapable(ScrnInfoPtr pScrn)
+{
+  S3VPtr ps3v = S3VPTR(pScrn);
+
+  if(
+     ((pScrn->bitsPerPixel == 24) || 
+      (pScrn->bitsPerPixel == 16)
+      ) 
+     &&
+     ((ps3v->Chipset == S3_ViRGE_DXGX)  || 
+      S3_ViRGE_MX_SERIES(ps3v->Chipset) || 
+      S3_ViRGE_GX2_SERIES(ps3v->Chipset)
+      ))
+    return TRUE;
+  else
+    return FALSE;
+}
+
+
 void S3VInitVideo(ScreenPtr pScreen)
 {
     ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
@@ -115,7 +135,7 @@ void S3VInitVideo(ScreenPtr pScreen)
        && ps3v->XVideo
        )
     {
-	#if 0
+#if 0
 	if((pMga->Overlay8Plus24 /* || dualhead */ || pMga->TexturedVideo) &&
 	   (pScrn->bitsPerPixel != 24))
         {
@@ -123,12 +143,12 @@ void S3VInitVideo(ScreenPtr pScreen)
 	    newAdaptor = MGASetupImageVideoTexture(pScreen);
 	    pMga->TexturedVideo = TRUE;
 	} else {
-	#endif
+#endif
 
 	    xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Using overlay video\n");
 	    newAdaptor = S3VSetupImageVideoOverlay(pScreen);
 
-	#if 0
+#if 0
 	    pMga->TexturedVideo = FALSE;
 	}*/
 
@@ -136,7 +156,7 @@ void S3VInitVideo(ScreenPtr pScreen)
 	  S3VInitOffscreenImages(pScreen);
 	pMga->BlockHandler = pScreen->BlockHandler;
 	pScreen->BlockHandler = MGABlockHandler;
-	#endif
+#endif
     }
     
 
@@ -762,6 +782,10 @@ S3VDisplayVideoOverlay(
   vgaCRIndex = vgaIOBase + 4;
   vgaCRReg = vgaIOBase + 5;
 
+   /* If streams aren't enabled, do nothing */
+   if(!ps3v->NeedSTREAMS)
+     return;
+
 #if 0
     /* got 64 scanlines to do it in */
     tmp = INREG(MGAREG_VCOUNT) + 64;
@@ -962,6 +986,10 @@ S3VPutImage(
    static int once = 1;
    static int once2 = 1;
 
+   /* If streams aren't enabled, do nothing */
+   if(!ps3v->NeedSTREAMS)
+     return Success;
+
    /* Clip */
    x1 = src_x;
    x2 = src_x + src_w;
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3virge.man b/xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3virge.man
index e65afbe7f..b0120ec29 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3virge.man
+++ b/xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3virge.man
@@ -1,4 +1,4 @@
-.\" $XFree86: xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3virge.man,v 1.3 2001/11/21 22:43:00 dawes Exp $
+.\" $XFree86: xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3virge.man,v 1.4 2003/02/13 03:21:33 dawes Exp $
 .\" shorthand for double quote that works everywhere.
 .ds q \N'34'
 .TH s3virge __drivermansuffix__ __vendorversion__
@@ -24,7 +24,11 @@ is an XFree86 driver for S3 based video cards.  The driver is fully
 accelerated, and provides support for the following framebuffer depths:
 8, 15, 16, and 24.  All
 visual types are supported for depth 8, and TrueColor
-visuals are supported for the other depths.
+visuals are supported for the other depths.  XVideo hardware up scaling
+is supported in depth 16 and 24 on the DX, GX, GX2, MX, MX+, and
+Trio3D/2X.  Doublescan modes are supported and tested in depth 8
+and 16 on DX, but disable XVideo.  Doublescan modes on other chipsets
+are untested.
 .SH SUPPORTED HARDWARE
 The
 .B s3virge
@@ -219,6 +223,11 @@ Enable or disable a cr3a fix added for ViRGE MX.  Default: on.
 .SH SEE ALSO
 XFree86(1), XF86Config(__filemansuffix__), xf86config(1), Xserver(1), X(__miscmansuffix__)
 
+.SH KNOWN BUGS
+The VideoRam generic driver parameter is presently ignored by the
+s3virge driver.  On PPC this is reported to cause problems for 2M
+cards, because they may autodetect as 4M.
+
 .SH SUPPORT
 For assistance with this driver, or XFree86 in general, check the XFree86 web
 site at http://www.xfree86.org.  A FAQ is available on the web site at
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/savage/Imakefile b/xc/programs/Xserver/hw/xfree86/drivers/savage/Imakefile
index fd53c2f91..549b2c625 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/savage/Imakefile
+++ b/xc/programs/Xserver/hw/xfree86/drivers/savage/Imakefile
@@ -1,4 +1,4 @@
-XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/drivers/savage/Imakefile,v 1.7 2002/05/14 20:19:51 alanh Exp $
+XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/drivers/savage/Imakefile,v 1.8 2003/02/17 17:06:44 dawes Exp $
 /*
  *
  * Copyright 1995-1998 The XFree86 Project, Inc.
@@ -42,7 +42,7 @@ INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86OSSRC) \
            -I$(XF86SRC)/ddc -I$(XF86SRC)/i2c \
            -I$(XF86SRC)/rac -I$(XF86SRC)/int10 -I$(SERVERSRC)/render \
            -I$(SERVERSRC)/include -I$(XINCLUDESRC) -I$(FONTINCSRC) \
-           -I$(EXTINCSRC) -I$(XF86OSSRC)/vbe -I$(XF86SRC)/shadowfb
+           -I$(EXTINCSRC) -I$(XF86SRC)/vbe -I$(XF86SRC)/shadowfb
 #endif
 
 #if MakeHasPosixVariableSubstitutions
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/savage/savage_accel.c b/xc/programs/Xserver/hw/xfree86/drivers/savage/savage_accel.c
index c5b6ed187..0ffc8631b 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/savage/savage_accel.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/savage/savage_accel.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/savage/savage_accel.c,v 1.17 2002/10/02 20:39:54 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/savage/savage_accel.c,v 1.18 2002/11/08 18:03:32 alanh Exp $ */
 
 /*
  *
@@ -417,7 +417,7 @@ SavageInitAccel(ScreenPtr pScreen)
 #if 1
     xaaptr->SetupForScreenToScreenCopy = SavageSetupForScreenToScreenCopy;
     xaaptr->SubsequentScreenToScreenCopy = SavageSubsequentScreenToScreenCopy;
-    xaaptr->ScreenToScreenCopyFlags = NO_TRANSPARENCY | ROP_NEEDS_SOURCE;
+    xaaptr->ScreenToScreenCopyFlags = NO_TRANSPARENCY | NO_PLANEMASK | ROP_NEEDS_SOURCE;
 #endif
 
 
@@ -438,6 +438,7 @@ SavageInitAccel(ScreenPtr pScreen)
     xaaptr->Mono8x8PatternFillFlags = 0
 	| HARDWARE_PATTERN_PROGRAMMED_BITS 
 	| HARDWARE_PATTERN_SCREEN_ORIGIN
+	| ROP_NEEDS_SOURCE
 	| BIT_ORDER_IN_BYTE_MSBFIRST
 	;
     if( psav->Chipset == S3_SAVAGE4 )
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/savage/savage_cursor.c b/xc/programs/Xserver/hw/xfree86/drivers/savage/savage_cursor.c
index 8d249214b..16aaabf3d 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/savage/savage_cursor.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/savage/savage_cursor.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/savage/savage_cursor.c,v 1.8 2002/10/02 20:39:54 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/savage/savage_cursor.c,v 1.9 2003/01/18 15:22:29 eich Exp $ */
 
 /*
  * Hardware cursor support for S3 Savage 4.0 driver. Taken with
@@ -39,6 +39,27 @@ static void SavageSetCursorColors(ScrnInfoPtr pScrn, int bg, int fg);
                       } 
 #define MAX_CURS 64
 
+/*
+ * Disable HW Cursor on stretched LCDs. We don't know how to
+ * detect if display is stretched. Therefore we cannot rescale
+ * the HW cursor position.
+ */
+
+static Bool
+SavageUseHWCursor(ScreenPtr pScr, CursorPtr pCurs)
+{
+    ScrnInfoPtr pScrn = xf86Screens[pScr->myNum];
+    SavagePtr psav = SAVPTR(pScrn);
+
+    if (psav->PanelX != pScrn->currentMode->HDisplay 
+	|| psav->PanelY != pScrn->currentMode->VDisplay) {
+	/* BIT 1 : CRT is active, BIT 2 : LCD is active */
+	unsigned char cr6d = inCRReg( 0x6d );
+	if (cr6d & 0x02)
+	    return FALSE;
+    }
+    return TRUE;
+}
 
 Bool 
 SavageHWCursorInit(ScreenPtr pScreen)
@@ -80,8 +101,12 @@ SavageHWCursorInit(ScreenPtr pScreen)
     infoPtr->LoadCursorImage = SavageLoadCursorImage;
     infoPtr->HideCursor = SavageHideCursor;
     infoPtr->ShowCursor = SavageShowCursor;
-    infoPtr->UseHWCursor = NULL;
 
+    if ((S3_SAVAGE_MOBILE_SERIES(psav->Chipset)
+	 || (psav->Chipset == S3_PROSAVAGE)) && !psav->CrtOnly)
+	infoPtr->UseHWCursor = SavageUseHWCursor;
+    else
+	infoPtr->UseHWCursor = NULL;
     if( !psav->CursorKByte )
 	psav->CursorKByte = pScrn->videoRam - 4;
 
@@ -93,8 +118,9 @@ SavageHWCursorInit(ScreenPtr pScreen)
 void
 SavageShowCursor(ScrnInfoPtr pScrn)
 {
-   /* Turn cursor on. */
+    /* Turn cursor on. */
    outCRReg( 0x45, inCRReg(0x45) | 0x01 );
+   SAVPTR(pScrn)->hwc_on = TRUE;
 }
 
 
@@ -102,12 +128,12 @@ void
 SavageHideCursor(ScrnInfoPtr pScrn)
 {
     /* Turn cursor off. */
-
     if( S3_SAVAGE4_SERIES( SAVPTR(pScrn)->Chipset ) )
     {
        waitHSync(5);
     }
     outCRReg( 0x45, inCRReg(0x45) & 0xfe );
+    SAVPTR(pScrn)->hwc_on = FALSE;
 }
 
 static void
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/savage/savage_dga.c b/xc/programs/Xserver/hw/xfree86/drivers/savage/savage_dga.c
index aa87f0524..55f057e62 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/savage/savage_dga.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/savage/savage_dga.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/savage/savage_dga.c,v 1.5 2002/10/02 20:39:55 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/savage/savage_dga.c,v 1.6 2003/01/18 15:22:29 eich Exp $ */
 
 /*
 Copyright (C) 1994-2000 The XFree86 Project, Inc.  All Rights Reserved.
@@ -275,7 +275,7 @@ Savage_SetMode(
 
 	psav->DGAactive = FALSE;
 	SavageSwitchMode(index, pScrn->currentMode, 0);
-	if( psav->hwcursor )
+	if( psav->hwcursor && psav->hwc_on )
 	    SavageShowCursor(pScrn);
     } else {
 	Bool holdBIOS = psav->UseBIOS;
@@ -289,8 +289,11 @@ Savage_SetMode(
 	    pMode->bitsPerPixel, pMode->depth);
 #endif
 
-	if( psav->hwcursor )
+	if( psav->hwcursor && psav->hwc_on) {
 	    SavageHideCursor(pScrn);
+	    psav->hwc_on = TRUE;    /* save for later restauration */
+	}
+	
 
 	if(!psav->DGAactive) {  /* save the old parameters */
 	    OldDisplayWidth[index] = pScrn->displayWidth;
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/savage/savage_driver.c b/xc/programs/Xserver/hw/xfree86/drivers/savage/savage_driver.c
index b84710694..cdfe256fb 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/savage/savage_driver.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/savage/savage_driver.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/savage/savage_driver.c,v 1.28 2002/10/02 20:39:55 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/savage/savage_driver.c,v 1.34 2003/02/25 04:08:21 dawes Exp $ */
 /*
  * vim: sw=4 ts=8 ai ic:
  *
@@ -193,7 +193,6 @@ typedef enum {
     ,OPTION_ROTATE
     ,OPTION_USEBIOS
     ,OPTION_SHADOW_STATUS
-    ,OPTION_VIDEORAM
     ,OPTION_CRT_ONLY
     ,OPTION_TV_ON
     ,OPTION_TV_PAL
@@ -211,7 +210,6 @@ static const OptionInfoRec SavageOptions[] =
     { OPTION_USEBIOS,	"UseBIOS",	OPTV_BOOLEAN, {0}, FALSE },
     { OPTION_LCDCLOCK,	"LCDClock",	OPTV_FREQ,    {0}, FALSE },
     { OPTION_SHADOW_STATUS, "ShadowStatus", OPTV_BOOLEAN, {0}, FALSE },
-    { OPTION_VIDEORAM,  "VideoRAM",     OPTV_INTEGER, {0}, FALSE },
     { OPTION_CRT_ONLY,  "CrtOnly",      OPTV_BOOLEAN, {0}, FALSE },
     { OPTION_TV_ON,     "TvOn",         OPTV_BOOLEAN, {0}, FALSE },
     { OPTION_TV_PAL,    "PAL",          OPTV_BOOLEAN, {0}, FALSE },
@@ -891,13 +889,6 @@ static Bool SavagePreInit(ScrnInfoPtr pScrn, int flags)
     xf86DrvMsg(pScrn->scrnIndex, from, "%ssing video BIOS to set modes\n",
         psav->UseBIOS ? "U" : "Not u" );
 
-    pScrn->videoRam = 0;
-    if( xf86GetOptValInteger(psav->Options, OPTION_VIDEORAM, &pScrn->videoRam ) )
-    {
-	xf86DrvMsg( pScrn->scrnIndex, X_CONFIG,
-	            "Option: VideoRAM %dkB\n", pScrn->videoRam );
-    }
-
     psav->LCDClock = 0.0;
     if( xf86GetOptValFreq( psav->Options, OPTION_LCDCLOCK, OPTUNITS_MHZ, &psav->LCDClock ) )
 	xf86DrvMsg( pScrn->scrnIndex, X_CONFIG, 
@@ -995,6 +986,9 @@ static Bool SavagePreInit(ScrnInfoPtr pScrn, int flags)
     } else
 	psav->ChipRev = psav->PciInfo->chipRev;
 
+    if (pEnt->device->videoRam != 0)
+    	pScrn->videoRam = pEnt->device->videoRam;
+
     xfree(pEnt);
 
     /* maybe throw in some more sanity checks here */
@@ -1358,7 +1352,7 @@ static Bool SavagePreInit(ScrnInfoPtr pScrn, int flags)
 	}
     }
   
-    clockRanges = xnfalloc(sizeof(ClockRange));
+    clockRanges = xnfcalloc(sizeof(ClockRange),1);
     clockRanges->next = NULL;
     clockRanges->minClock = psav->minClock;
     clockRanges->maxClock = psav->maxClock;
@@ -2839,15 +2833,16 @@ static Bool SavageSaveScreen(ScreenPtr pScreen, int mode)
     ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
     TRACE(("SavageSaveScreen(0x%x)\n", mode));
 
-    if( pScrn->vtSema && SAVPTR(pScrn)->hwcursor )
-    {
+    if( pScrn->vtSema && SAVPTR(pScrn)->hwcursor && SAVPTR(pScrn)->hwc_on) {
+
 	if( xf86IsUnblank(mode) )
 	    SavageShowCursor( pScrn );
 	else
 	    SavageHideCursor( pScrn );
+	SAVPTR(pScrn)->hwc_on = TRUE;
     }
 
-    return vgaHWSaveScreen(pScreen, mode);
+	return vgaHWSaveScreen(pScreen, mode);
 }
 
 
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/savage/savage_driver.h b/xc/programs/Xserver/hw/xfree86/drivers/savage/savage_driver.h
index b79d5d953..231139684 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/savage/savage_driver.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/savage/savage_driver.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/savage/savage_driver.h,v 1.14 2002/10/02 20:39:55 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/savage/savage_driver.h,v 1.16 2003/01/18 15:22:30 eich Exp $ */
 
 #ifndef SAVAGE_VGAHWMMIO_H
 #define SAVAGE_VGAHWMMIO_H
@@ -118,6 +118,7 @@ typedef struct _Savage {
     Bool		fifo_moderate;
     Bool		fifo_aggressive;
     Bool		hwcursor;
+    Bool		hwc_on;
     Bool		NoAccel;
     Bool		shadowFB;
     Bool		UseBIOS;
@@ -212,6 +213,15 @@ typedef struct _Savage {
 
 #define SAVPTR(p)	((SavagePtr)((p)->driverPrivate))
 
+/* Make the names of these externals driver-unique */
+#define gpScrn savagegpScrn
+#define myOUTREG savageOUTREG
+#define readdw savagereaddw
+#define readfb savagereadfb
+#define writedw savagewritedw
+#define writefb savagewritefb
+#define writescan savagewritescan
+
 /* Prototypes. */
 
 extern void SavageCommonCalcClock(long freq, int min_m, int min_n1,
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/savage/savage_video.c b/xc/programs/Xserver/hw/xfree86/drivers/savage/savage_video.c
index 1ff01afed..38c2cc362 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/savage/savage_video.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/savage/savage_video.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/savage/savage_video.c,v 1.10 2002/10/02 20:39:55 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/savage/savage_video.c,v 1.11 2003/01/12 03:55:49 tsi Exp $ */
 
 #include "Xv.h"
 #include "dix.h"
@@ -869,10 +869,10 @@ SavageSetupImageVideo(ScreenPtr pScreen)
 
     psav->adaptor = adapt;
 
-    #if 0
+#if 0
     psav->BlockHandler = pScreen->BlockHandler;
     pScreen->BlockHandler = SavageBlockHandler;
-    #endif
+#endif
 
     return adapt;
 }
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/siliconmotion/Imakefile b/xc/programs/Xserver/hw/xfree86/drivers/siliconmotion/Imakefile
index 46694a557..304251a62 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/siliconmotion/Imakefile
+++ b/xc/programs/Xserver/hw/xfree86/drivers/siliconmotion/Imakefile
@@ -1,5 +1,5 @@
 XCOMM Header:   //Mercury/Projects/archives/XFree86/4.0/Imakefile.-arc   1.4   02 Aug 2000 13:17:16   Frido  $
-XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/drivers/siliconmotion/Imakefile,v 1.2 2001/01/24 00:06:27 dawes Exp $
+XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/drivers/siliconmotion/Imakefile,v 1.3 2003/02/17 17:06:44 dawes Exp $
 
 #define IHaveModules
 #include <Server.tmpl>
@@ -23,7 +23,7 @@ INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86OSSRC) \
 		   -I$(SERVERSRC)/Xext -I$(XF86SRC)/int10 \
            -I$(FONTINCSRC) -I$(SERVERSRC)/include -I$(XINCLUDESRC) \
            -I$(XF86SRC)/shadowfb -I$(EXTINCSRC) -I$(SERVERSRC)/fb \
-           -I$(SERVERSRC)/render -I$(XF86OSSRC)/vbe
+           -I$(SERVERSRC)/render -I$(XF86SRC)/vbe
 #endif
 
 #if MakeHasPosixVariableSubstitutions
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/siliconmotion/smi.h b/xc/programs/Xserver/hw/xfree86/drivers/siliconmotion/smi.h
index 2a0c8ebda..6fb2ee09f 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/siliconmotion/smi.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/siliconmotion/smi.h
@@ -26,7 +26,7 @@ Silicon Motion shall not be used in advertising or otherwise to promote the
 sale, use or other dealings in this Software without prior written
 authorization from the XFree86 Project and Silicon Motion.
 */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/siliconmotion/smi.h,v 1.11 2002/09/16 18:05:59 eich Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/siliconmotion/smi.h,v 1.12 2003/01/12 03:55:49 tsi Exp $ */
 
 #ifndef _SMI_H
 #define _SMI_H
@@ -65,8 +65,8 @@ authorization from the XFree86 Project and Silicon Motion.
 #include "vbe.h"
 
 #ifdef XvExtension
-	#include "xf86xv.h"
-	#include "Xv.h"
+#	include "xf86xv.h"
+#	include "Xv.h"
 #endif
 
 /******************************************************************************/
@@ -74,7 +74,7 @@ authorization from the XFree86 Project and Silicon Motion.
 /******************************************************************************/
 
 #ifndef SMI_DEBUG
-	#define SMI_DEBUG	0
+#	define SMI_DEBUG	0
 #endif
 
 #define SMI_USE_IMAGE_WRITES	0
@@ -263,20 +263,20 @@ typedef struct
 /******************************************************************************/
 
 #if SMI_DEBUG
-	#define VERBLEV 1
-	#define ENTER_PROC(PROCNAME)	xf86ErrorFVerb(VERBLEV, "ENTER\t" PROCNAME \
+#	define VERBLEV 1
+#	define ENTER_PROC(PROCNAME)	xf86ErrorFVerb(VERBLEV, "ENTER\t" PROCNAME \
 									"(%d)\n", __LINE__); xf86Break1()
-	#define DEBUG_PROC(PROCNAME)	xf86ErrorFVerb(VERBLEV, "DEBUG\t" PROCNAME \
+#	define DEBUG_PROC(PROCNAME)	xf86ErrorFVerb(VERBLEV, "DEBUG\t" PROCNAME \
 									"(%d)\n", __LINE__); xf86Break2()
-	#define LEAVE_PROC(PROCNAME)	xf86ErrorFVerb(VERBLEV, "LEAVE\t" PROCNAME \
+#	define LEAVE_PROC(PROCNAME)	xf86ErrorFVerb(VERBLEV, "LEAVE\t" PROCNAME \
 									"(%d)\n", __LINE__); xf86Break1()
-	#define DEBUG(arg)				xf86ErrorFVerb arg
+#	define DEBUG(arg)				xf86ErrorFVerb arg
 #else
-	#define VERBLEV	4
-	#define ENTER_PROC(PROCNAME)
-	#define DEBUG_PROC(PROCNAME)
-	#define LEAVE_PROC(PROCNAME)
-	#define DEBUG(arg)
+#	define VERBLEV	4
+#	define ENTER_PROC(PROCNAME)
+#	define DEBUG_PROC(PROCNAME)
+#	define LEAVE_PROC(PROCNAME)
+#	define DEBUG(arg)
 #endif
 
 /* Some Silicon Motion structs & registers */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/siliconmotion/smi_accel.c b/xc/programs/Xserver/hw/xfree86/drivers/siliconmotion/smi_accel.c
index 59097d610..1c53060e1 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/siliconmotion/smi_accel.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/siliconmotion/smi_accel.c
@@ -26,7 +26,7 @@ Silicon Motion shall not be used in advertising or otherwise to promote the
 sale, use or other dealings in this Software without prior written
 authorization from the XFree86 Project and silicon Motion.
 */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/siliconmotion/smi_accel.c,v 1.6 2001/12/20 21:35:38 eich Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/siliconmotion/smi_accel.c,v 1.7 2003/01/12 03:55:49 tsi Exp $ */
 
 #include "smi.h"
 
@@ -207,14 +207,14 @@ SMI_AccelInit(ScreenPtr pScreen)
 	}
 	else
 	{
-		#if defined(XvExtension) && SMI_USE_VIDEO
+#if defined(XvExtension) && SMI_USE_VIDEO
 		numLines = ((pSmi->FBReserved - pSmi->width * pSmi->Bpp * pSmi->height)
 				 * 25 / 100 + pSmi->width * pSmi->Bpp - 1)
 				 / (pSmi->width * pSmi->Bpp);
 		numLines += pSmi->height;
-		#else
+#else
 		numLines = maxLines;
-		#endif
+#endif
 	}
 
 	AvailFBArea.x1 = 0;
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/siliconmotion/smi_driver.c b/xc/programs/Xserver/hw/xfree86/drivers/siliconmotion/smi_driver.c
index 75c27e139..1a242c6dc 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/siliconmotion/smi_driver.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/siliconmotion/smi_driver.c
@@ -26,7 +26,7 @@ Silicon Motion shall not be used in advertising or otherwise to promote the
 sale, use or other dealings in this Software without prior written
 authorization from The XFree86 Project or Silicon Motion.
 */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/siliconmotion/smi_driver.c,v 1.26 2002/09/16 18:05:59 eich Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/siliconmotion/smi_driver.c,v 1.28 2003/02/05 17:45:29 eich Exp $ */
 
 #include "xf86Resources.h"
 #include "xf86RAC.h"
@@ -764,9 +764,9 @@ SMI_PreInit(ScrnInfoPtr pScrn, int flags)
 				pSmi->shadowFB ? "enabled" : "disabled");
 	}
 
-	#if 1 /* PDR#932 */
+#if 1 /* PDR#932 */
 	if ((pScrn->depth == 8) || (pScrn->depth == 16))
-	#endif /* PDR#932 */
+#endif /* PDR#932 */
 	if ((s = xf86GetOptValString(pSmi->Options, OPTION_ROTATE)))
 	{
 		if(!xf86NameCmp(s, "CW"))
@@ -1134,15 +1134,14 @@ SMI_PreInit(ScrnInfoPtr pScrn, int flags)
 	 * Setup the ClockRanges, which describe what clock ranges are available,
 	 * and what sort of modes they can be used for.
 	 */
-	clockRanges = xnfalloc(sizeof(ClockRange));
+	clockRanges = xnfcalloc(sizeof(ClockRange),1);
 	clockRanges->next = NULL;
 	clockRanges->minClock = pSmi->minClock;
 	clockRanges->maxClock = pSmi->maxClock;
 	clockRanges->clockIndex = -1;
 	clockRanges->interlaceAllowed = FALSE;
 	clockRanges->doubleScanAllowed = FALSE;
-
-					
+		
 	i = xf86ValidateModes(
 			pScrn,						/* Screen pointer					  */
 			pScrn->monitor->Modes,		/* Available monitor modes			  */
@@ -2341,7 +2340,7 @@ SMI_ValidMode(int scrnIndex, DisplayModePtr mode, Bool verbose, int flags)
 
 	if (!pSmi->useBIOS || pSmi->lcd)
 	{
-		#if 1 /* PDR#983 */
+#if 1 /* PDR#983 */
 		if (pSmi->zoomOnLCD)
 		{
 			if (   (mode->HDisplay > pSmi->lcdWidth)
@@ -2353,7 +2352,7 @@ SMI_ValidMode(int scrnIndex, DisplayModePtr mode, Bool verbose, int flags)
 			}
 		}
 		else
-		#endif
+#endif
 		{
 			if (   (mode->HDisplay != pSmi->lcdWidth)
 				|| (mode->VDisplay != pSmi->lcdHeight)
@@ -2366,7 +2365,7 @@ SMI_ValidMode(int scrnIndex, DisplayModePtr mode, Bool verbose, int flags)
 
 	}
 
-	#if 1 /* PDR#944 */
+#if 1 /* PDR#944 */
 	if (pSmi->rotate)
 	{
 		if (   (mode->HDisplay != pSmi->lcdWidth)
@@ -2377,7 +2376,7 @@ SMI_ValidMode(int scrnIndex, DisplayModePtr mode, Bool verbose, int flags)
 			return(MODE_PANEL);
 		}
 	}
-	#endif
+#endif
 
 	LEAVE_PROC("SMI_ValidMode");
 	return(MODE_OK);
@@ -2859,22 +2858,22 @@ SMI_AdjustFrame(int scrnIndex, int x, int y, int flags)
 	if (SMI_LYNX3D_SERIES(pSmi->Chipset))
 	{
 		Base = (Base + 15) & ~15;
-		#if 1 /* PDR#1058 */
+#if 1 /* PDR#1058 */
 		while ((Base % pSmi->Bpp) > 0)
 		{
 			Base -= 16;
 		}
-		#endif
+#endif
 	}
 	else
 	{
 		Base = (Base + 7) & ~7;
-		#if 1 /* PDR#1058 */
+#if 1 /* PDR#1058 */
 		while ((Base % pSmi->Bpp) > 0)
 		{
 			Base -= 8;
 		}
-		#endif
+#endif
 	}
 
 	WRITE_VPR(pSmi, 0x0C, Base >> 3);
@@ -3098,7 +3097,7 @@ SMI_DisplayPowerManagementSet(ScrnInfoPtr pScrn, int PowerManagementMode,
 		return;
 	}
 
-	#if 1 /* PDR#735 */
+#if 1 /* PDR#735 */
 	if (pSmi->pInt10 != NULL)
 	{
 		pSmi->pInt10->ax = 0x4F10;
@@ -3126,19 +3125,19 @@ SMI_DisplayPowerManagementSet(ScrnInfoPtr pScrn, int PowerManagementMode,
 		if (pSmi->pInt10->ax == 0x004F)
 		{
 			pSmi->CurrentDPMS = PowerManagementMode;
-			#if 1 /* PDR#835 */
+#if 1 /* PDR#835 */
 			if (PowerManagementMode == DPMSModeOn)
 			{
 				SR01 = VGAIN8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x01);
 				VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x01,
 						SR01 & ~0x20);
 			}
-			#endif
+#endif
 			LEAVE_PROC("SMI_DisplayPowerManagementSet");
 			return;
 		}
 	}
-	#endif
+#endif
 
 	/* Save the current SR registers */
 	if (pSmi->CurrentDPMS == DPMSModeOn)
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/siliconmotion/smi_video.c b/xc/programs/Xserver/hw/xfree86/drivers/siliconmotion/smi_video.c
index a2ef0369e..31694d384 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/siliconmotion/smi_video.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/siliconmotion/smi_video.c
@@ -41,7 +41,7 @@ Author of changes: Corvin Zahn <zahn@zac.de>
 Date:   2.11.2001
 */
 
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/siliconmotion/smi_video.c,v 1.8 2002/09/16 18:06:00 eich Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/siliconmotion/smi_video.c,v 1.9 2003/01/12 03:55:49 tsi Exp $ */
 
 #include "smi.h"
 #include "smi_video.h"
@@ -1354,11 +1354,11 @@ SMI_StopVideo(
 		if (pPort->videoStatus & CLIENT_VIDEO_ON)
 		{
 			WRITE_VPR(pSmi, 0x00, READ_VPR(pSmi, 0x00) & ~0x01000008);
-			#if SMI_USE_CAPTURE
+#if SMI_USE_CAPTURE
 			WRITE_CPR(pSmi, 0x00, READ_CPR(pSmi, 0x00) & ~0x00000001);
 			WRITE_VPR(pSmi, 0x54, READ_VPR(pSmi, 0x54) & ~0x00F00000);
 /* #864		OUT_SEQ(pSmi, 0x21, IN_SEQ(pSmi, 0x21) | 0x04); */
-			#endif
+#endif
 		}
         if (pPort->area != NULL)
 		{
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/sis/300vtbl.h b/xc/programs/Xserver/hw/xfree86/drivers/sis/300vtbl.h
new file mode 100644
index 000000000..a6989da1c
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/sis/300vtbl.h
@@ -0,0 +1,3314 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/300vtbl.h,v 1.6 2003/02/10 01:14:16 tsi Exp $ */
+
+
+/* Register settings for SiS 300 series */
+
+
+typedef struct _SiS300_StStruct
+{
+	UCHAR St_ModeID;
+	USHORT St_ModeFlag;
+	UCHAR St_StTableIndex;
+	UCHAR St_CRT2CRTC;
+	UCHAR St_ResInfo;
+	UCHAR VB_StTVFlickerIndex;
+	UCHAR VB_StTVEdgeIndex;
+	UCHAR VB_StTVYFilterIndex;
+} SiS300_StStruct;
+
+static const SiS300_StStruct  SiS300_SModeIDTable[] =
+{
+	{0x01,0x9208,0x01,0x00,0x00,0x00,0x00,0x00},
+	{0x01,0x1210,0x14,0x01,0x01,0x00,0x00,0x00},
+	{0x01,0x1010,0x17,0x02,0x02,0x00,0x00,0x00},
+	{0x03,0x8208,0x03,0x00,0x00,0x00,0x00,0x00},
+	{0x03,0x0210,0x16,0x01,0x01,0x00,0x00,0x00},
+	{0x03,0x0010,0x18,0x02,0x02,0x00,0x00,0x00},
+	{0x05,0x9209,0x05,0x00,0x00,0x00,0x00,0x00},
+	{0x06,0x8209,0x06,0x00,0x00,0x00,0x00,0x00},
+	{0x07,0x0000,0x07,0x03,0x03,0x00,0x00,0x00},
+	{0x07,0x0000,0x19,0x02,0x02,0x00,0x00,0x00},
+	{0x0d,0x920a,0x0d,0x00,0x00,0x00,0x00,0x00},
+	{0x0e,0x820a,0x0e,0x00,0x00,0x00,0x00,0x00},
+	{0x0f,0x0202,0x11,0x01,0x01,0x00,0x00,0x00},
+	{0x10,0x0212,0x12,0x01,0x01,0x00,0x00,0x00},
+	{0x11,0x0212,0x1a,0x04,0x04,0x00,0x00,0x00},
+	{0x12,0x0212,0x1b,0x04,0x04,0x00,0x00,0x00},
+	{0x13,0x021b,0x1c,0x00,0x00,0x00,0x00,0x00},
+	{0x12,0x0010,0x18,0x02,0x02,0x00,0x00,0x00},
+	{0x12,0x0210,0x18,0x01,0x01,0x00,0x00,0x00},
+	{0xff,     0,   0,   0,   0,   0,   0,   0}
+};
+
+typedef struct _SiS300_StandTableStruct
+{
+	UCHAR CRT_COLS;
+	UCHAR ROWS;
+	UCHAR CHAR_HEIGHT;
+	USHORT CRT_LEN;
+	UCHAR SR[4];
+	UCHAR MISC;
+	UCHAR CRTC[0x19];
+	UCHAR ATTR[0x14];
+	UCHAR GRC[9];
+} SiS300_StandTableStruct;
+
+static const SiS300_StandTableStruct  SiS300_StandTable[] =
+{
+ {0x28,0x18,0x08,0x0800,			/* 0x00 */
+  {0x09,0x03,0x00,0x02},
+  0x63,
+  {0x2d,0x27,0x28,0x90,0x2b,0xa0,0xbf,0x1f,
+   0x00,0xc7,0x06,0x07,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x14,0x1f,0x96,0xb9,0xa3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
+   0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,
+   0x08,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
+   0xff} },
+ {0x28,0x18,0x08,0x0800,			/* 0x01 */
+  {0x09,0x03,0x00,0x02},
+  0x63,
+  {0x2d,0x27,0x28,0x90,0x2b,0xa0,0xbf,0x1f,
+   0x00,0xc7,0x06,0x07,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x14,0x1f,0x96,0xb9,0xa3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
+   0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,
+   0x08,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
+   0xff} },
+ {0x50,0x18,0x08,0x1000,			/* 0x02 */
+  {0x01,0x03,0x00,0x02},
+  0x63,
+  {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
+   0x00,0xc7,0x06,0x07,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x28,0x1f,0x96,0xb9,0xa3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
+   0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,
+   0x08,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
+   0xff} },
+ {0x50,0x18,0x08,0x1000,			/* 0x03 */
+  {0x01,0x03,0x00,0x02},
+  0x63,
+  {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
+   0x00,0xc7,0x06,0x07,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x28,0x1f,0x96,0xb9,0xa3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
+   0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,
+   0x08,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
+   0xff} },
+ {0x28,0x18,0x08,0x4000,			/* 0x04 */
+  {0x09,0x03,0x00,0x02},
+  0x63,
+  {0x2d,0x27,0x28,0x90,0x2b,0x80,0xbf,0x1f,
+   0x00,0xc1,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x14,0x00,0x96,0xb9,0xa2,
+   0xff},
+  {0x00,0x13,0x15,0x17,0x02,0x04,0x06,0x07,
+   0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,
+   0x01,0x00,0x03,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x30,0x0f,0x00,
+   0xff} },
+ {0x28,0x18,0x08,0x4000,			/* 0x05 */
+  {0x09,0x03,0x00,0x02},
+  0x63,
+  {0x2d,0x27,0x28,0x90,0x2b,0x80,0xbf,0x1f,
+   0x00,0xc1,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x14,0x00,0x96,0xb9,0xa2,
+   0xff},
+  {0x00,0x13,0x15,0x17,0x02,0x04,0x06,0x07,
+   0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,
+   0x01,0x00,0x03,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x30,0x0f,0x00,
+   0xff} },
+ {0x50,0x18,0x08,0x4000,			/* 0x06 */
+  {0x01,0x01,0x00,0x06},
+  0x63,
+  {0x5f,0x4f,0x50,0x82,0x54,0x80,0xbf,0x1f,
+   0x00,0xc1,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x28,0x00,0x96,0xb9,0xc2,
+   0xff},
+  {0x00,0x17,0x17,0x17,0x17,0x17,0x17,0x17,
+   0x17,0x17,0x17,0x17,0x17,0x17,0x17,0x17,
+   0x01,0x00,0x01,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x00,0x0d,0x00,
+   0xff} },
+ {0x50,0x18,0x0e,0x1000,			/* 0x07 */
+  {0x00,0x03,0x00,0x03},
+  0xa6,
+  {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
+   0x00,0x4d,0x0b,0x0c,0x00,0x00,0x00,0x00,
+   0x83,0x85,0x5d,0x28,0x0d,0x63,0xba,0xa3,
+   0xff},
+  {0x00,0x08,0x08,0x08,0x08,0x08,0x08,0x08,
+   0x10,0x18,0x18,0x18,0x18,0x18,0x18,0x18,
+   0x0e,0x00,0x0f,0x08},
+  {0x00,0x00,0x00,0x00,0x00,0x10,0x0a,0x00,
+   0xff} },
+/* MDA_DAC*/
+ {0x00,0x00,0x00,0x0000,			/* 0x08 */
+  {0x00,0x00,0x00,0x15},
+  0x15,
+  {0x15,0x15,0x15,0x15,0x15,0x15,0x15,0x15,
+   0x15,0x15,0x15,0x15,0x15,0x15,0x3f,0x3f,
+   0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,0x00,0x00,
+   0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x15,0x15,0x15,
+   0x15,0x15,0x15,0x15,0x15,0x15,0x15,0x15,
+   0x15,0x15,0x15,0x15},
+  {0x15,0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,
+   0x3f} },
+/* CGA_DAC*/
+ {0x00,0x10,0x04,0x0114,			/* 0x09 */
+  {0x11,0x09,0x15,0x00},
+  0x10,
+  {0x04,0x14,0x01,0x11,0x09,0x15,0x2a,0x3a,
+   0x2e,0x3e,0x2b,0x3b,0x2f,0x3f,0x2a,0x3a,
+   0x2e,0x3e,0x2b,0x3b,0x2f,0x3f,0x00,0x10,
+   0x04},
+  {0x14,0x01,0x11,0x09,0x15,0x00,0x10,0x04,
+   0x14,0x01,0x11,0x09,0x15,0x2a,0x3a,0x2e,
+   0x3e,0x2b,0x3b,0x2f},
+  {0x3f,0x2a,0x3a,0x2e,0x3e,0x2b,0x3b,0x2f,
+   0x3f} },
+/* EGA_DAC*/
+ {0x00,0x10,0x04,0x0114,			/* 0x0a */
+  {0x11,0x05,0x15,0x20},
+  0x30,
+  {0x24,0x34,0x21,0x31,0x25,0x35,0x08,0x18,
+   0x0c,0x1c,0x09,0x19,0x0d,0x1d,0x28,0x38,
+   0x2c,0x3c,0x29,0x39,0x2d,0x3d,0x02,0x12,
+   0x06},
+  {0x16,0x03,0x13,0x07,0x17,0x22,0x32,0x26,
+   0x36,0x23,0x33,0x27,0x37,0x0a,0x1a,0x0e,
+   0x1e,0x0b,0x1b,0x0f},
+  {0x1f,0x2a,0x3a,0x2e,0x3e,0x2b,0x3b,0x2f,
+   0x3f} },
+/* VGA_DAC*/
+ {0x00,0x10,0x04,0x0114,			/* 0x0b */
+  {0x11,0x09,0x15,0x2a},
+  0x3a,
+  {0x2e,0x3e,0x2b,0x3b,0x2f,0x3f,0x00,0x05,
+   0x08,0x0b,0x0e,0x11,0x14,0x18,0x1c,0x20,
+   0x24,0x28,0x2d,0x32,0x38,0x3f,0x00,0x10,
+   0x1f},
+  {0x2f,0x3f,0x1f,0x27,0x2f,0x37,0x3f,0x2d,
+   0x31,0x36,0x3a,0x3f,0x00,0x07,0x0e,0x15,
+   0x1c,0x0e,0x11,0x15},
+  {0x18,0x1c,0x14,0x16,0x18,0x1a,0x1c,0x00,
+   0x04} },
+ {0x08,0x0c,0x10,0x0a08,			/* 0x0c */
+  {0x0c,0x0e,0x10,0x0b},
+  0x0c,
+  {0x0d,0x0f,0x10,0x10,0x01,0x08,0x00,0x00,
+   0x00,0x00,0x01,0x00,0x02,0x02,0x01,0x00,
+   0x04,0x04,0x01,0x00,0x05,0x02,0x05,0x00,
+   0x06},
+  {0x01,0x06,0x05,0x06,0x00,0x08,0x01,0x08,
+   0x00,0x07,0x02,0x07,0x06,0x07,0x00,0x00,
+   0x00,0x00,0x00,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00} },
+ {0x28,0x18,0x08,0x2000,			/* 0x0d */
+  {0x09,0x0f,0x00,0x06},
+  0x63,
+  {0x2d,0x27,0x28,0x90,0x2b,0x80,0xbf,0x1f,
+   0x00,0xc0,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x14,0x00,0x96,0xb9,0xe3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
+   0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,
+   0x01,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,
+   0xff} },
+ {0x50,0x18,0x08,0x4000,			/* 0x0e */
+  {0x01,0x0f,0x00,0x06},
+  0x63,
+  {0x5f,0x4f,0x50,0x82,0x54,0x80,0xbf,0x1f,
+   0x00,0xc0,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x28,0x00,0x96,0xb9,0xe3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
+   0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,
+   0x01,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,
+   0xff} },
+ {0x00,0x00,0x00,0x0000,			/* 0x0f */	/* TW: Standtable for VGA modes */
+  {0x01,0x0f,0x00,0x0e},
+  0x23,
+  {0x5f,0x4f,0x50,0x82,0x54,0x80,0x0b,0x3e,
+   0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,
+   0xea,0x8c,0xdf,0x28,0x40,0xe7,0x04,0xa3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
+   0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f,
+   0x01,0x00,0x00,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,
+   0xff} },
+ {0x4a,0x36,0x00,0x00c0,			/* 0x10 */
+  {0x00,0x00,0x00,0x00},
+  0x00,
+  {0x00,0x00,0x00,0x00,0x00,0x00,0x66,0x3a,
+   0x00,0xc0,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x1a,0x00,0x57,0x39,0x00,0xc0,
+   0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00} },
+ {0x50,0x18,0x0e,0x8000,			/* 0x11 */
+  {0x01,0x0f,0x00,0x06},
+  0xa2,
+  {0x5f,0x4f,0x50,0x82,0x54,0x80,0xbf,0x1f,
+   0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x83,0x85,0x5d,0x28,0x0f,0x63,0xba,0xe3,
+   0xff},
+  {0x00,0x08,0x00,0x00,0x18,0x18,0x00,0x00,
+   0x00,0x08,0x00,0x00,0x00,0x18,0x00,0x00,
+   0x0b,0x00,0x05,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x05,
+   0xff} },
+ {0x50,0x18,0x0e,0x8000,			/* 0x12 */
+  {0x01,0x0f,0x00,0x06},
+  0xa3,
+  {0x5f,0x4f,0x50,0x82,0x54,0x80,0xbf,0x1f,
+   0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x83,0x85,0x5d,0x28,0x0f,0x63,0xba,0xe3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,
+   0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,
+   0x01,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,
+   0xff} },
+ {0x28,0x18,0x0e,0x0800,			/* 0x13 */
+  {0x09,0x03,0x00,0x02},
+  0xa3,
+  {0x2d,0x27,0x28,0x90,0x2b,0xa0,0xbf,0x1f,
+   0x00,0x4d,0x0b,0x0c,0x00,0x00,0x00,0x00,
+   0x83,0x85,0x5d,0x14,0x1f,0x63,0xba,0xa3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,
+   0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,
+   0x08,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
+   0xff} },
+ {0x28,0x18,0x0e,0x0800,			/* 0x14 */
+  {0x09,0x03,0x00,0x02},
+  0xa3,
+  {0x2d,0x27,0x28,0x90,0x2b,0xa0,0xbf,0x1f,
+   0x00,0x4d,0x0b,0x0c,0x00,0x00,0x00,0x00,
+   0x83,0x85,0x5d,0x14,0x1f,0x63,0xba,0xa3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,
+   0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,
+   0x08,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
+   0xff} },
+ {0x50,0x18,0x0e,0x1000,			/* 0x15 */
+  {0x01,0x03,0x00,0x02},
+  0xa3,
+  {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
+   0x00,0x4d,0x0b,0x0c,0x00,0x00,0x00,0x00,
+   0x83,0x85,0x5d,0x28,0x1f,0x63,0xba,0xa3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,
+   0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,
+   0x08,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
+   0xff} },
+ {0x50,0x18,0x0e,0x1000,			/* 0x16 */
+  {0x01,0x03,0x00,0x02},
+  0xa3,
+  {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
+   0x00,0x4d,0x0b,0x0c,0x00,0x00,0x00,0x00,
+   0x83,0x85,0x5d,0x28,0x1f,0x63,0xba,0xa3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,
+   0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,
+   0x08,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
+   0xff} },
+ {0x28,0x18,0x10,0x0800,			/* 0x17 */
+  {0x08,0x03,0x00,0x02},
+  0x67,
+  {0x2d,0x27,0x28,0x90,0x2b,0xa0,0xbf,0x1f,
+   0x00,0x4f,0x0d,0x0e,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x14,0x1f,0x96,0xb9,0xa3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,
+   0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,
+   0x0c,0x00,0x0f,0x08},
+  {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
+   0xff} },
+ {0x50,0x18,0x10,0x1000,			/* 0x18 */
+  {0x00,0x03,0x00,0x02},
+  0x67,
+  {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
+   0x00,0x4f,0x0d,0x0e,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x28,0x1f,0x96,0xb9,0xa3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,
+   0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,
+   0x0c,0x00,0x0f,0x08},
+  {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
+   0xff} },
+ {0x50,0x18,0x10,0x1000,			/* 0x19 */
+  {0x00,0x03,0x00,0x02},
+  0x66,
+  {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
+   0x00,0x4f,0x0d,0x0e,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x28,0x0f,0x96,0xb9,0xa3,
+   0xff},
+  {0x00,0x08,0x08,0x08,0x08,0x08,0x08,0x08,
+   0x10,0x18,0x18,0x18,0x18,0x18,0x18,0x18,
+   0x0e,0x00,0x0f,0x08},
+  {0x00,0x00,0x00,0x00,0x00,0x10,0x0a,0x00,
+   0xff} },
+ {0x50,0x1d,0x10,0xa000,			/* 0x1a */
+  {0x01,0x0f,0x00,0x06},
+  0xe3,
+  {0x5f,0x4f,0x50,0x82,0x54,0x80,0x0b,0x3e,
+   0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,
+   0xea,0x8c,0xdf,0x28,0x00,0xe7,0x04,0xc3,
+   0xff},
+  {0x00,0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,
+   0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,
+   0x01,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x01,
+   0xff} },
+ {0x50,0x1d,0x10,0xa000,			/* 0x1b */
+  {0x01,0x0f,0x00,0x06},
+  0xe3,
+  {0x5f,0x4f,0x50,0x82,0x54,0x80,0x0b,0x3e,
+   0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,
+   0xea,0x8c,0xdf,0x28,0x00,0xe7,0x04,0xe3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,
+   0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,
+   0x01,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,
+   0xff} },
+ {0x28,0x18,0x08,0x2000,			/* 0x1c */
+  {0x01,0x0f,0x00,0x0e},
+  0x63,
+  {0x5f,0x4f,0x50,0x82,0x54,0x80,0xbf,0x1f,
+   0x00,0x41,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x28,0x40,0x96,0xb9,0xa3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
+   0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f,
+   0x41,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,
+   0xff} }
+};
+
+typedef struct _SiS300_ExtStruct
+{
+	UCHAR Ext_ModeID;
+	USHORT Ext_ModeFlag;
+	USHORT Ext_ModeInfo;
+	USHORT Ext_Point;
+	USHORT Ext_VESAID;
+	UCHAR Ext_VESAMEMSize;
+	UCHAR Ext_RESINFO;
+	UCHAR VB_ExtTVFlickerIndex;
+	UCHAR VB_ExtTVEdgeIndex;
+	UCHAR VB_ExtTVYFilterIndex;
+	UCHAR REFindex;
+} SiS300_ExtStruct;
+
+static const SiS300_ExtStruct  SiS300_EModeIDTable[] =
+{
+	{0x6a,0x2212,0x47,0x3563,0x0102,0x08,0x07,0x00,0x00,0x00,0x00},  /* 800x600x? */
+	{0x2e,0x0a1b,0x36,0x3539,0x0101,0x08,0x06,0x00,0x00,0x00,0x08},
+	{0x2f,0x021b,0x35,0x3532,0x0100,0x08,0x05,0x00,0x00,0x00,0x10},  /* 640x400x8 */
+	{0x30,0x2a1b,0x47,0x3563,0x0103,0x08,0x07,0x00,0x00,0x00,0x00},
+	{0x31,0x0a1b,0xad,0x3630,0x0000,0x08,0x0c,0x00,0x00,0x00,0x11},  /* 720x480x8 */
+	{0x32,0x2a1b,0xae,0x3637,0x0000,0x08,0x0d,0x00,0x00,0x00,0x12},  /* 720x576x8 */
+	{0x33,0x0a1d,0xad,0x3630,0x0000,0x08,0x0c,0x00,0x00,0x00,0x11},  /* 720x480x16 */
+	{0x34,0x2a1d,0xae,0x3637,0x0000,0x08,0x0d,0x00,0x00,0x00,0x12},  /* 720x576x16 */
+	{0x35,0x0a1f,0xad,0x3630,0x0000,0x08,0x0c,0x00,0x00,0x00,0x11},  /* 720x480x32 */
+	{0x36,0x2a1f,0xae,0x3637,0x0000,0x08,0x0d,0x00,0x00,0x00,0x12},  /* 720x576x32 */
+	{0x37,0x0212,0x58,0x358d,0x0104,0x08,0x08,0x00,0x00,0x00,0x13},  /* 1024x768x? */
+	{0x38,0x0a1b,0x58,0x358d,0x0105,0x08,0x08,0x00,0x00,0x00,0x13},  /* 1024x768x8 */
+	{0x3a,0x0e3b,0x69,0x35be,0x0107,0x08,0x09,0x00,0x00,0x00,0x1a},  /* 1280x1024x8 */
+	{0x3c,0x063b,0x7a,0x35d4,0x0130,0x08,0x0a,0x00,0x00,0x00,0x1e},
+	{0x3d,0x067d,0x7a,0x35d4,0x0131,0x08,0x0a,0x00,0x00,0x00,0x1e},
+	{0x40,0x921c,0x00,0x3516,0x010d,0x08,0x00,0x00,0x00,0x00,0x23},
+	{0x41,0x921d,0x00,0x3516,0x010e,0x08,0x00,0x00,0x00,0x00,0x23},
+	{0x43,0x0a1c,0x36,0x3539,0x0110,0x08,0x06,0x00,0x00,0x00,0x08},
+	{0x44,0x0a1d,0x36,0x3539,0x0111,0x08,0x06,0x00,0x00,0x00,0x08},
+	{0x46,0x2a1c,0x47,0x3563,0x0113,0x08,0x07,0x00,0x00,0x00,0x00},  /* 800x600 */
+	{0x47,0x2a1d,0x47,0x3563,0x0114,0x08,0x07,0x00,0x00,0x00,0x00},  /* 800x600 */
+	{0x49,0x0a3c,0x58,0x358d,0x0116,0x08,0x08,0x00,0x00,0x00,0x13},
+	{0x4a,0x0a3d,0x58,0x358d,0x0117,0x08,0x08,0x00,0x00,0x00,0x13},
+	{0x4c,0x0e7c,0x69,0x35be,0x0119,0x08,0x09,0x00,0x00,0x00,0x1a},
+	{0x4d,0x0e7d,0x69,0x35be,0x011a,0x08,0x09,0x00,0x00,0x00,0x1a},
+	{0x50,0x921b,0x01,0x351d,0x0132,0x08,0x01,0x00,0x00,0x00,0x24},
+	{0x51,0xb21b,0x13,0x3524,0x0133,0x08,0x03,0x00,0x00,0x00,0x25},  /* 400x300 */
+	{0x52,0x921b,0x24,0x352b,0x0134,0x08,0x04,0x00,0x00,0x00,0x26},
+	{0x56,0x921d,0x01,0x351d,0x0135,0x08,0x01,0x00,0x00,0x00,0x24},
+	{0x57,0xb21d,0x13,0x3524,0x0136,0x08,0x03,0x00,0x00,0x00,0x25},  /* 400x300 */
+	{0x58,0x921d,0x24,0x352b,0x0137,0x08,0x04,0x00,0x00,0x00,0x26},  
+	{0x59,0x921b,0x00,0x3516,0x0138,0x08,0x00,0x00,0x00,0x00,0x23}, 
+	{0x5c,0x921f,0x24,0x352b,0x0000,0x08,0x04,0x00,0x00,0x00,0x26},  /* TW: inserted 512x384x32 */
+	{0x5d,0x021d,0x35,0x3532,0x0139,0x08,0x05,0x00,0x00,0x00,0x10},  /* 640x400x16 */
+ 	{0x5e,0x021f,0x35,0x3532,0x0000,0x08,0x05,0x00,0x00,0x00,0x10},  /* TW: inserted 640x400x32 */
+	{0x62,0x0a3f,0x36,0x3539,0x013a,0x08,0x06,0x00,0x00,0x00,0x08},
+	{0x63,0x2a3f,0x47,0x3563,0x013b,0x08,0x07,0x00,0x00,0x00,0x00},  /* 800x600 */
+	{0x64,0x0a7f,0x58,0x358d,0x013c,0x08,0x08,0x00,0x00,0x00,0x13},
+	{0x65,0x0eff,0x69,0x35be,0x013d,0x08,0x09,0x00,0x00,0x00,0x1a},
+	{0x66,0x06ff,0x7a,0x35d4,0x013e,0x08,0x0a,0x00,0x00,0x00,0x1e},
+	{0x68,0x067b,0x8b,0x35ef,0x013f,0x08,0x0b,0x00,0x00,0x00,0x27},
+	{0x69,0x06fd,0x8b,0x35ef,0x0140,0x08,0x0b,0x00,0x00,0x00,0x27},
+	{0x6b,0x07ff,0x8b,0x35ef,0x0000,0x10,0x0b,0x00,0x00,0x00,0x27},
+	{0x6c,0x067b,0x9c,0x35f6,0x0000,0x08,0x11,0x00,0x00,0x00,0x28},  /* TW: 2048x1536x8 - not in BIOS! */
+	{0x6d,0x06fd,0x9c,0x35f6,0x0000,0x10,0x11,0x00,0x00,0x00,0x28},  /* TW: 2048x1536x16 - not in BIOS! */
+	{0x6e,0x0a3b,0x6f,0x35b2,0x0000,0x08,0x0e,0x00,0x00,0x00,0x29},  /* 1280x960x8 */
+	{0x6f,0x0a7d,0x6f,0x35b2,0x0000,0x08,0x0e,0x00,0x00,0x00,0x29},  /* 1280x960x16 */
+	/* TW: 16:9 modes copied from 310/325 series - not in ANY BIOS */
+	{0x70,0x2a1b,0x40,0x3b52,0x0000,0x08,0x12,0x00,0x00,0x07,0x2d},    /* 800x480x8 */
+	{0x71,0x0a1b,0x51,0x3b63,0x0000,0x08,0x13,0x00,0x00,0x00,0x30},    /* 1024x576x8 */
+	{0x74,0x0a1d,0x51,0x3b63,0x0000,0x08,0x13,0x00,0x00,0x00,0x30},    /* 1024x576x16 */
+	{0x75,0x0e3d,0x62,0x3b74,0x0000,0x08,0x14,0x00,0x00,0x00,0x33},	   /* 1280x720x16 */
+	{0x76,0x2a1f,0x40,0x3b52,0x0000,0x08,0x12,0x00,0x00,0x07,0x2d},    /* 800x480x32 */
+	{0x77,0x0a3f,0x51,0x3b63,0x0000,0x08,0x13,0x00,0x00,0x00,0x30},	   /* 1024x576x32 */
+	{0x78,0x0eff,0x62,0x3b74,0x0000,0x08,0x14,0x00,0x00,0x00,0x33},	   /* 1280x720x32 */
+	{0x79,0x0e3b,0x62,0x3b74,0x0000,0x08,0x14,0x00,0x00,0x00,0x33},	   /* 1280x720x8 */
+	{0x7a,0x2a1d,0x40,0x3b52,0x0000,0x08,0x12,0x00,0x00,0x07,0x2d},    /* 800x480x16 */
+	/* TW: End of new 16:9 modes */
+	{0x7b,0x0aff,0x6f,0x35b2,0x0000,0x08,0x0e,0x00,0x00,0x00,0x29},    /* 1280x960x32 */
+	{0x20,0x0a1b,0x54,0x0000,0x0000,0x08,0x0f,0x00,0x00,0x00,0x2b},    /* 1024x600 */
+	{0x21,0x0a3d,0x54,0x0000,0x0000,0x08,0x0f,0x00,0x00,0x00,0x2b},
+	{0x22,0x0a7f,0x54,0x0000,0x0000,0x08,0x0f,0x00,0x00,0x00,0x2b},
+	{0x23,0x0a1b,0xc5,0x0000,0x0000,0x08,0x10,0x00,0x00,0x00,0x2c},    /* 1152x768 */
+	{0x24,0x0a3d,0xc5,0x431d,0x0000,0x08,0x10,0x00,0x00,0x00,0x2c},
+	{0x25,0x0a7f,0xc5,0x431d,0x0000,0x08,0x10,0x00,0x00,0x00,0x2c},
+	{0x29,0x0e1b,0xc5,0x0000,0x0000,0x08,0x15,0x00,0x00,0x00,0x36},    /* TW: NEW 1152x864 - not in BIOS */
+	{0x2a,0x0e3d,0xc5,0x0000,0x0000,0x08,0x15,0x00,0x00,0x00,0x36},
+	{0x2b,0x0e7f,0xc5,0x0000,0x0000,0x08,0x15,0x00,0x00,0x00,0x36},
+	{0x39,0x2a1b,0xd6,0x0000,0x0000,0x08,0x16,0x00,0x00,0x00,0x38},    /* TW: NEW 848x480 - not in BIOS */
+	{0x3b,0x2a3d,0xd6,0x0000,0x0000,0x08,0x16,0x00,0x00,0x00,0x38},
+	{0x3e,0x2a7f,0xd6,0x0000,0x0000,0x08,0x16,0x00,0x00,0x00,0x38},
+	{0x3f,0x2a1b,0xd7,0x0000,0x0000,0x08,0x17,0x00,0x00,0x00,0x3a},    /* TW: NEW 856x480 - not in BIOS */
+	{0x42,0x2a3d,0xd7,0x0000,0x0000,0x08,0x17,0x00,0x00,0x00,0x3a},
+	{0x45,0x2a7f,0xd7,0x0000,0x0000,0x08,0x17,0x00,0x00,0x00,0x3a},
+	{0x48,0x223b,0xe8,0x0000,0x0000,0x08,0x18,0x00,0x00,0x00,0x3c},    /* TW: NEW 1360x768 - not in BIOS */
+	{0x4b,0x227d,0xe8,0x0000,0x0000,0x08,0x18,0x00,0x00,0x00,0x3c},
+	{0x4e,0x22ff,0xe8,0x0000,0x0000,0x08,0x18,0x00,0x00,0x00,0x3c},
+	{0xff,0x0000,0x00,0x0000,0xffff,0x00,0x00,0x00,0x00,0x00,0x00}
+};
+
+typedef struct _SiS300_Ext2Struct
+{
+	USHORT Ext_InfoFlag;
+	UCHAR Ext_CRT1CRTC;  /* TW: Index in SiS300_CRT1Table */
+	UCHAR Ext_CRTVCLK;   /* TW: Index in VCLK array */
+	UCHAR Ext_CRT2CRTC;  /* TW: Index in LCD Paneltype arrays (&3f) */
+	UCHAR  ModeID;
+	USHORT XRes;
+	USHORT YRes;
+	USHORT ROM_OFFSET;
+} SiS300_Ext2Struct;
+
+static const SiS300_Ext2Struct  SiS300_RefIndex[] =
+{ /* TW: Don't ever insert anything here, table is indexed */
+	{0x085f,0x0d,0x03,0x05,0x6a, 800, 600,0x3563}, /* 00 */
+	{0x0467,0x0e,0x44,0x05,0x6a, 800, 600,0x3568}, /* 01 */
+	{0x0067,0x0f,0x07,0x48,0x6a, 800, 600,0x356d}, /* 02 - CRT1CRTC was 0x4f */
+	{0x0067,0x10,0x06,0x8b,0x6a, 800, 600,0x3572}, /* 03 */
+	{0x0147,0x11,0x08,0x00,0x6a, 800, 600,0x3577}, /* 04 */
+	{0x0147,0x12,0x0c,0x00,0x6a, 800, 600,0x357c}, /* 05 */
+	{0x0047,0x11,0x4e,0x00,0x6a, 800, 600,0x3581}, /* 06 - CRT1CRTC was 0x51 */
+	{0x0047,0x11,0x13,0x00,0x6a, 800, 600,0x3586}, /* 07 */
+	{0xc85f,0x05,0x00,0x04,0x2e, 640, 480,0x3539}, /* 08 */
+	{0xc067,0x06,0x02,0x04,0x2e, 640, 480,0x353e}, /* 09 */
+	{0xc067,0x07,0x02,0x47,0x2e, 640, 480,0x3543}, /* 0a */
+	{0xc067,0x08,0x03,0x8a,0x2e, 640, 480,0x3548}, /* 0b */
+	{0xc047,0x09,0x05,0x00,0x2e, 640, 480,0x354d}, /* 0c */
+	{0xc047,0x0a,0x08,0x00,0x2e, 640, 480,0x3552}, /* 0d */
+	{0xc047,0x0b,0x0a,0x00,0x2e, 640, 480,0x3557}, /* 0e */
+	{0xc047,0x0c,0x10,0x00,0x2e, 640, 480,0x355c}, /* 0f */
+	{0x487f,0x04,0x00,0x00,0x2f, 640, 400,0x3532}, /* 10 */
+	{0xc00f,0x31,0x01,0x06,0x31, 720, 480,0x3630}, /* 11 */
+	{0x000f,0x32,0x03,0x06,0x32, 720, 576,0x3637}, /* 12 */
+	{0x0187,0x15,0x05,0x00,0x37,1024, 768,0x358d}, /* 13 */
+        {0xc877,0x16,0x09,0x06,0x37,1024, 768,0x3592}, /* 14 */
+	{0xc067,0x17,0x0b,0x49,0x37,1024, 768,0x3597}, /* 15 - CRT1CRTC was 0x97 */
+	{0x0267,0x18,0x0d,0x00,0x37,1024, 768,0x359c}, /* 16 */
+	{0x0047,0x19,0x11,0x8c,0x37,1024, 768,0x35a1}, /* 17 - CRT1CRTC was 0x59 */
+	{0x0047,0x1a,0x52,0x00,0x37,1024, 768,0x35a6}, /* 18 */
+	{0x0047,0x1b,0x16,0x00,0x37,1024, 768,0x35ab}, /* 19 - CRT1CRTC was 0x5b */
+	{0x0387,0x1c,0x4d,0x00,0x3a,1280,1024,0x35be}, /* 1a - CRT1CRTC was 0x5c */
+	{0x0077,0x1d,0x14,0x07,0x3a,1280,1024,0x35c3}, /* 1b */
+	{0x0047,0x1e,0x17,0x00,0x3a,1280,1024,0x35c8}, /* 1c */
+	{0x0007,0x1f,0x98,0x00,0x3a,1280,1024,0x35cd}, /* 1d */
+	{0x0007,0x20,0x59,0x00,0x3c,1600,1200,0x35d4}, /* 1e - CRT1CRTC was 0x60 */
+	{0x0007,0x21,0x5a,0x00,0x3c,1600,1200,0x35d9}, /* 1f */
+	{0x0007,0x22,0x1b,0x00,0x3c,1600,1200,0x35de}, /* 20 */
+	{0x0007,0x23,0x1d,0x00,0x3c,1600,1200,0x35e3}, /* 21 - CRT1CRTC was 0x63 */
+	{0x0007,0x24,0x1e,0x00,0x3c,1600,1200,0x35e8}, /* 22 */
+	{0x407f,0x00,0x00,0x00,0x40, 320, 200,0x3516}, /* 23 */
+	{0xc07f,0x01,0x00,0x04,0x50, 320, 240,0x351d}, /* 24 */
+	{0x0077,0x02,0x04,0x05,0x51, 400, 300,0x3524}, /* 25 */
+	{0xc877,0x03,0x09,0x06,0x52, 512, 384,0x352b}, /* 26 */  /* was c077 */
+	{0x8207,0x25,0x1f,0x00,0x68,1920,1440,0x35ef}, /* 27 */
+	{0x0007,0x26,0x20,0x00,0x6c,2048,1536,0x35f6}, /* 28 */
+	{0x0027,0x27,0x14,0x08,0x6e,1280, 960,0x35b7}, /* 29 - TW: 1280x960-60 */
+	{0x0047,0x45,0x3c,0x08,0x6e,1280, 960,0x35b7}, /* 2a - TW: 1280x960-85 */
+	{0xc077,0x33,0x09,0x06,0x20,1024, 600,0x0000}, /* 2b */
+	{0xc077,0x34,0x0b,0x06,0x23,1152, 768,0x0000}, /* 2c */	/* VCLK 0x09 */
+	{0x0057,0x35,0x27,0x08,0x70, 800, 480,0x3b52}, /* 2d - TW: 16:9 modes */
+	{0x0047,0x36,0x37,0x08,0x70, 800, 480,0x3b57}, /* 2e */
+	{0x0047,0x37,0x08,0x08,0x70, 800, 480,0x3b5c}, /* 2f */
+	{0x0057,0x38,0x09,0x09,0x71,1024, 576,0x3b63}, /* 30 */
+	{0x0047,0x39,0x38,0x09,0x71,1024, 576,0x3b68}, /* 31 */
+	{0x0047,0x3a,0x11,0x09,0x71,1024, 576,0x3b6d}, /* 32 */
+	{0x0057,0x3b,0x39,0x0a,0x75,1280, 720,0x3b74}, /* 33 */
+	{0x0047,0x3c,0x3a,0x0a,0x75,1280, 720,0x3b79}, /* 34 */
+	{0x0047,0x3d,0x3b,0x0a,0x75,1280, 720,0x3b7e}, /* 35 - TW: END of 16:9 modes */
+	{0x0047,0x3e,0x34,0x06,0x29,1152, 864,0x0000}, /* 36 TW: 1152x864-75Hz - Non-BIOS, new */
+	{0x0047,0x44,0x3a,0x06,0x29,1152, 864,0x0000}, /* 37 TW: 1152x864-85Hz - Non-BIOS, new */
+	{0x00c7,0x3f,0x28,0x00,0x39, 848, 480,0x0000}, /* 38 TW: 848x480-38Hzi - Non-BIOS, new */
+	{0xc047,0x40,0x3d,0x00,0x39, 848, 480,0x0000}, /* 39 TW: 848x480-60Hz  - Non-BIOS, new */
+	{0x00c7,0x41,0x28,0x00,0x3f, 856, 480,0x0000}, /* 3a TW: 856x480-38Hzi - Non-BIOS, new */
+	{0xc047,0x42,0x28,0x00,0x3f, 856, 480,0x0000}, /* 3b TW: 856x480-60Hz  - Non-BIOS, new */
+	{0x0047,0x43,0x3e,0x00,0x48,1360, 768,0x0000}, /* 3c TW: 1360x768-60Hz - Non-BIOS, new */
+	{0xffff,0,0,0,0,0,0,0}
+};
+
+/*add for 300 oem util*/
+typedef struct _SiS_VBModeIDTableStruct
+{
+	UCHAR  ModeID;
+	UCHAR  VB_TVDelayIndex;
+	UCHAR  VB_TVFlickerIndex;
+	UCHAR  VB_TVPhaseIndex;
+	UCHAR  VB_TVYFilterIndex;
+	UCHAR  VB_LCDDelayIndex;
+	UCHAR  _VB_LCDHIndex;
+	UCHAR  _VB_LCDVIndex;
+}SiS_VBModeIDTableStruct;
+
+static const SiS_VBModeIDTableStruct  SiS300_VBModeIDTable[] =
+{
+	{0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00},
+	{0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01},
+	{0x01,0x00,0x00,0x00,0x01,0x00,0x01,0x02},
+	{0x03,0x00,0x00,0x00,0x02,0x00,0x02,0x00},
+	{0x03,0x00,0x00,0x00,0x02,0x00,0x02,0x01},
+	{0x03,0x00,0x00,0x00,0x03,0x00,0x03,0x02},
+	{0x05,0x00,0x00,0x01,0x04,0x00,0x00,0x00},
+	{0x06,0x00,0x00,0x01,0x05,0x00,0x02,0x00},
+	{0x07,0x00,0x00,0x00,0x03,0x00,0x03,0x01},
+	{0x07,0x00,0x00,0x00,0x03,0x00,0x03,0x02},
+	{0x0d,0x00,0x00,0x01,0x04,0x00,0x00,0x00},
+	{0x0e,0x00,0x00,0x01,0x05,0x00,0x02,0x00},
+	{0x0f,0x00,0x00,0x01,0x05,0x00,0x02,0x01},
+	{0x10,0x00,0x00,0x01,0x05,0x00,0x02,0x01},
+	{0x11,0x00,0x00,0x01,0x05,0x00,0x02,0x03},
+	{0x12,0x00,0x00,0x01,0x05,0x00,0x02,0x03},
+	{0x13,0x00,0x00,0x01,0x04,0x00,0x04,0x00},
+	{0x6a,0x00,0x00,0x01,0x07,0x00,0x08,0x0a},
+	{0x2e,0x00,0x00,0x01,0x05,0x00,0x06,0x08},
+	{0x2f,0x00,0x00,0x01,0x05,0x00,0x06,0x06},
+	{0x30,0x00,0x00,0x01,0x07,0x00,0x08,0x0a},
+	{0x31,0x00,0x00,0x01,0x06,0x00,0x00,0x00},
+	{0x32,0x00,0x00,0x01,0x06,0x00,0x00,0x00},
+	{0x37,0x00,0x00,0x01,0x00,0x00,0x0a,0x0c},
+	{0x38,0x00,0x00,0x01,0x00,0x00,0x0a,0x0c},
+	{0x3a,0x00,0x00,0x01,0x00,0x00,0x0b,0x0d},
+	{0x40,0x00,0x00,0x01,0x04,0x00,0x05,0x05},
+	{0x41,0x00,0x00,0x01,0x04,0x00,0x05,0x05},
+	{0x43,0x00,0x00,0x01,0x05,0x00,0x06,0x08},
+	{0x44,0x00,0x00,0x01,0x05,0x00,0x06,0x08},
+	{0x46,0x00,0x00,0x01,0x07,0x00,0x08,0x0a},
+	{0x47,0x00,0x00,0x01,0x07,0x00,0x08,0x0a},
+	{0x49,0x00,0x00,0x01,0x00,0x00,0x0a,0x0c},
+	{0x4a,0x00,0x00,0x01,0x00,0x00,0x0a,0x0c},
+	{0x4c,0x00,0x00,0x01,0x00,0x00,0x0b,0x0d},
+	{0x4d,0x00,0x00,0x01,0x00,0x00,0x0b,0x0d},
+	{0x50,0x00,0x00,0x01,0x04,0x00,0x05,0x07},
+	{0x51,0x00,0x00,0x01,0x07,0x00,0x07,0x09},
+	{0x52,0x00,0x00,0x01,0x00,0x00,0x09,0x0b},
+	{0x56,0x00,0x00,0x01,0x04,0x00,0x05,0x07},
+	{0x57,0x00,0x00,0x01,0x07,0x00,0x07,0x09},
+	{0x58,0x00,0x00,0x01,0x00,0x00,0x09,0x0b},
+	{0x59,0x00,0x00,0x01,0x04,0x00,0x05,0x05},
+	{0x5d,0x00,0x00,0x01,0x07,0x00,0x06,0x06},
+	{0x62,0x00,0x00,0x01,0x05,0x00,0x06,0x08},
+	{0x63,0x00,0x00,0x01,0x07,0x00,0x08,0x0a},
+	{0x64,0x00,0x00,0x01,0x00,0x00,0x0a,0x0c},
+	{0x65,0x00,0x00,0x01,0x00,0x00,0x0b,0x0d},
+	{0x6e,0x00,0x00,0x01,0x00,0x00,0x0b,0x0d},
+	{0x6f,0x00,0x00,0x01,0x00,0x00,0x0b,0x0d},
+	{0x7b,0x00,0x00,0x01,0x00,0x00,0x0b,0x0d},
+	{0xff,0x00,0x00,0x00,0x00,0x00,0x00,0x00}  /* TW: added! */
+};
+/*end*/
+
+typedef struct _SiS300_CRT1TableStruct
+{
+	UCHAR CR[17];
+} SiS300_CRT1TableStruct;
+
+static const SiS300_CRT1TableStruct  SiS300_CRT1Table[] =
+{
+ {{0x2d,0x27,0x28,0x90,0x2c,0x80,0xbf,0x1f,    /* 0x00 */
+  0x9c,0x8e,0x8f,0x96,0xb9,0x30,0x00,0x00,
+  0x00}},
+ {{0x2d,0x27,0x28,0x90,0x2c,0x80,0x0b,0x3e,
+  0xe9,0x8b,0xdf,0xe7,0x04,0x00,0x00,0x00,
+  0x00}},
+ {{0x3d,0x31,0x31,0x81,0x37,0x1f,0x72,0xf0,
+  0x58,0x8c,0x57,0x57,0x73,0x20,0x00,0x05,
+  0x01}},
+ {{0x4f,0x3f,0x3f,0x93,0x45,0x0d,0x24,0xf5,
+  0x02,0x88,0xff,0xff,0x25,0x10,0x00,0x01,
+  0x01}},
+ {{0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
+  0x9c,0x8e,0x8f,0x96,0xb9,0x30,0x00,0x05,
+  0x00}},
+#if 0  
+ {{0x5f,0x4f,0x50,0x82,0x55,0x81,0x0b,0x3e,    /* 0x05 */
+  0xe9,0x8b,0xdf,0xe7,0x04,0x00,0x00,0x05,
+  0x00}},
+#endif
+ {{0x5f,0x4f,0x4f,0x83,0x55,0x81,0x0b,0x3e,    /* 0x05 - corrected 640x480-60 */
+  0xe9,0x8b,0xdf,0xe8,0x0c,0x00,0x00,0x05,
+  0x00}},
+#if 0  
+ {{0x63,0x4f,0x50,0x86,0x56,0x9b,0x06,0x3e,    /* 0x06 */
+  0xe8,0x8b,0xdf,0xe7,0xff,0x10,0x00,0x01,
+  0x00}},
+#endif  
+ {{0x63,0x4f,0x4f,0x87,0x56,0x9b,0x06,0x3e,    /* 0x06 - corrected 640x480-72 */
+  0xe8,0x8a,0xdf,0xe7,0x07,0x00,0x00,0x01,
+  0x00}},
+ {{0x64,0x4f,0x4f,0x88,0x55,0x9d,0xf2,0x1f,
+  0xe0,0x83,0xdf,0xdf,0xf3,0x10,0x00,0x01,
+  0x00}},
+ {{0x63,0x4f,0x4f,0x87,0x5a,0x81,0xfb,0x1f,
+  0xe0,0x83,0xdf,0xdf,0xfc,0x10,0x00,0x05,
+  0x00}},
+#if 0  
+ {{0x66,0x4f,0x4f,0x86,0x56,0x9e,0x03,0x3e,    /* 0x09 */
+  0xe4,0x87,0xdf,0xdf,0x04,0x00,0x00,0x01,
+  0x00}},
+#endif
+ {{0x67,0x4f,0x4f,0x8b,0x57,0x83,0x10,0x3e,    /* 0x09 - corrected 640x480-100 */
+  0xe7,0x8d,0xdf,0xe6,0x11,0x00,0x00,0x05,
+  0x00}},
+#if 0  
+ {{0x6c,0x4f,0x4f,0x83,0x59,0x9e,0x00,0x3e,    /* 0x0a */
+  0xe5,0x8d,0xdf,0xdf,0x01,0x00,0x00,0x01,
+  0x00}},
+#endif    
+ {{0x67,0x4f,0x4f,0x8b,0x57,0x83,0x10,0x3e,    /* 0x0a - corrected 640x480-120 */
+  0xe7,0x8d,0xdf,0xe6,0x11,0x00,0x00,0x05,
+  0x00}},
+ {{0x63,0x4f,0x4f,0x87,0x56,0x9d,0xfb,0x1f,
+  0xe0,0x83,0xdf,0xdf,0xfc,0x10,0x00,0x01,
+  0x00}},
+ {{0x65,0x4f,0x4f,0x89,0x57,0x9f,0xfb,0x1f,
+  0xe6,0x8a,0xdf,0xdf,0xfc,0x10,0x00,0x01,    /* TW: Corrected VDE, VBE */
+  0x00}},
+ {{0x7b,0x63,0x63,0x9f,0x6a,0x93,0x6f,0xf0,
+  0x58,0x8a,0x57,0x57,0x70,0x20,0x00,0x05,
+  0x01}},
+ {{0x7f,0x63,0x63,0x83,0x6c,0x1c,0x72,0xf0,
+  0x58,0x8c,0x57,0x57,0x73,0x20,0x00,0x06,
+  0x01}},
+ {{0x7d,0x63,0x63,0x81,0x6e,0x1d,0x98,0xf0,
+  0x7c,0x82,0x57,0x57,0x99,0x00,0x00,0x06,
+  0x01}},
+ {{0x7f,0x63,0x63,0x83,0x69,0x13,0x6f,0xf0,
+  0x58,0x8b,0x57,0x57,0x70,0x20,0x00,0x06,
+  0x01}},
+ {{0x7e,0x63,0x63,0x82,0x6b,0x13,0x75,0xf0,
+  0x58,0x8b,0x57,0x57,0x76,0x20,0x00,0x06,
+  0x01}},
+ {{0x8c,0x63,0x63,0x87,0x72,0x16,0x7e,0xf0,
+  0x59,0x8d,0x57,0x57,0x7f,0x00,0x00,0x06,
+  0x01}},
+ {{0x7e,0x63,0x63,0x82,0x6c,0x14,0x75,0xe0,
+  0x58,0x0b,0x57,0x57,0x76,0x20,0x00,0x06,
+  0x01}},
+ {{0x7e,0x63,0x63,0x82,0x6c,0x14,0x75,0xe0,   /* 0x14 */
+  0x58,0x0b,0x57,0x57,0x76,0x20,0x00,0x06,
+  0x01}},
+ {{0x99,0x7f,0x7f,0x9d,0x84,0x1a,0x96,0x1f,
+  0x7f,0x83,0x7f,0x7f,0x97,0x10,0x00,0x02,
+  0x00}},
+ {{0xa3,0x7f,0x7f,0x87,0x86,0x97,0x24,0xf5,
+  0x02,0x88,0xff,0xff,0x25,0x10,0x00,0x02,
+  0x01}},
+ {{0xa1,0x7f,0x7f,0x85,0x86,0x97,0x24,0xf5,
+  0x02,0x88,0xff,0xff,0x25,0x10,0x00,0x02,
+  0x01}},
+ {{0x9f,0x7f,0x7f,0x83,0x85,0x91,0x1e,0xf5,
+  0x00,0x83,0xff,0xff,0x1f,0x10,0x00,0x02,
+  0x01}},
+ {{0xa7,0x7f,0x7f,0x8b,0x89,0x95,0x26,0xf5,
+  0x00,0x83,0xff,0xff,0x27,0x10,0x00,0x02,
+  0x01}},
+ {{0x9f,0x7f,0x7f,0x83,0x83,0x93,0x1e,0xf5,  /* 0x1a */
+  0x00,0x84,0xff,0xff,0x1f,0x10,0x00,0x02,
+  0x01}},
+ {{0xa2,0x7f,0x7f,0x86,0x84,0x94,0x37,0xf5,
+  0x0b,0x82,0xff,0xff,0x38,0x10,0x00,0x02,
+  0x01}},
+ {{0xcf,0x9f,0x9f,0x93,0xb2,0x01,0x14,0xba,
+  0x00,0x83,0xff,0xff,0x15,0x00,0x00,0x03,
+  0x00}},
+ {{0xce,0x9f,0x9f,0x92,0xa9,0x17,0x28,0x5a,
+  0x00,0x83,0xff,0xff,0x29,0x09,0x00,0x07,
+  0x01}},
+ {{0xce,0x9f,0x9f,0x92,0xa5,0x17,0x28,0x5a,  /* 0x1e */
+  0x00,0x83,0xff,0xff,0x29,0x09,0x00,0x07,
+  0x01}},
+ {{0xd3,0x9f,0x9f,0x97,0xab,0x1f,0x2e,0x5a,
+  0x00,0x83,0xff,0xff,0x2f,0x09,0x00,0x07,
+  0x01}},
+ {{0x09,0xc7,0xc7,0x8d,0xd3,0x0b,0xe0,0x10,
+  0xb0,0x83,0xaf,0xaf,0xe1,0x2f,0x01,0x04,
+  0x00}},
+ {{0x09,0xc7,0xc7,0x8d,0xd3,0x0b,0xe0,0x10,
+  0xb0,0x83,0xaf,0xaf,0xe1,0x2f,0x01,0x04,
+  0x00}},
+ {{0x09,0xc7,0xc7,0x8d,0xd3,0x0b,0xe0,0x10,
+  0xb0,0x83,0xaf,0xaf,0xe1,0x2f,0x01,0x04,
+  0x00}},
+ {{0x09,0xc7,0xc7,0x8d,0xd3,0x0b,0xe0,0x10,
+  0xb0,0x83,0xaf,0xaf,0xe1,0x2f,0x01,0x04,
+  0x00}},
+ {{0x09,0xc7,0xc7,0x8d,0xd3,0x0b,0xe0,0x10,  /* 36: 1600x1200x85Hz */
+  0xb0,0x83,0xaf,0xaf,0xe1,0x2f,0x01,0x04,
+  0x00}},
+ {{0x3f,0xef,0xef,0x83,0xfd,0x1a,0xda,0x1f,  /* 37: 1920x1440x60Hz */
+  0xa0,0x84,0x9f,0x9f,0xdb,0x1f,0x01,0x01,
+  0x00}},
+ {{0x55,0xff,0xff,0x99,0x0d,0x0c,0x3e,0xba,
+  0x00,0x84,0xff,0xff,0x3f,0x0f,0x41,0x05,
+  0x00}},
+#if 0  
+ {{0xdc,0x9f,0x9f,0x00,0xab,0x19,0xe6,0xef,  /* 0x27: 1280x960-70 - invalid! */
+  0xc0,0xc3,0xbf,0xbf,0xe7,0x10,0x00,0x07,
+  0x01}},
+#endif  
+ {{0xdc,0x9f,0x9f,0x80,0xaf,0x9d,0xe6,0xff,  /* 0x27: 1280x960-60 - correct */
+  0xc0,0x83,0xbf,0xbf,0xe7,0x10,0x00,0x07,
+  0x01}},
+ {{0x7f,0x63,0x63,0x83,0x6c,0x1c,0x72,0xba,  /* 0x28 */
+  0x27,0x8b,0xdf,0xdf,0x73,0x00,0x00,0x06,
+  0x01}},
+ {{0x7f,0x63,0x63,0x83,0x69,0x13,0x6f,0xba,
+  0x26,0x89,0xdf,0xdf,0x6f,0x00,0x00,0x06,
+  0x01}},
+ {{0x7f,0x63,0x63,0x82,0x6b,0x13,0x75,0xba,
+  0x29,0x8c,0xdf,0xdf,0x75,0x00,0x00,0x06,
+  0x01}},
+ {{0xa3,0x7f,0x7f,0x87,0x86,0x97,0x24,0xf1,
+  0xaf,0x85,0x3f,0x3f,0x25,0x30,0x00,0x02,
+  0x01}},
+ {{0x9f,0x7f,0x7f,0x83,0x85,0x91,0x1e,0xf1,
+  0xad,0x81,0x3f,0x3f,0x1f,0x30,0x00,0x02,
+  0x01}},
+ {{0xa7,0x7f,0x7f,0x88,0x89,0x15,0x26,0xf1,
+  0xb1,0x85,0x3f,0x3f,0x27,0x30,0x00,0x02,
+  0x01}},
+ {{0xce,0x9f,0x9f,0x92,0xa9,0x17,0x28,0xc4,
+  0x7a,0x8e,0xcf,0xcf,0x29,0x21,0x00,0x07,
+  0x01}},
+ {{0xce,0x9f,0x9f,0x92,0xa5,0x17,0x28,0xd4,
+  0x7a,0x8e,0xcf,0xcf,0x29,0x21,0x00,0x07,
+  0x01}},
+ {{0xd3,0x9f,0x9f,0x97,0xab,0x1f,0x2e,0xd4,
+  0x7d,0x81,0xcf,0xcf,0x2f,0x21,0x00,0x07,
+  0x01}},
+ {{0x6b,0x59,0x59,0x8f,0x5e,0x8c,0x0b,0x3e,
+  0xe9,0x8b,0xdf,0xe7,0x04,0x00,0x00,0x05,
+  0x00}},
+ {{0x7b,0x59,0x63,0x9f,0x6a,0x93,0x6f,0xf0,  /* 0x32 */
+  0x58,0x8a,0x3f,0x57,0x70,0x20,0x00,0x05,
+  0x01}},
+ {{0xa3,0x7f,0x7f,0x87,0x86,0x97,0x1e,0xf1,  /* 0x33 - 1024x600 */
+  0xae,0x85,0x57,0x57,0x1f,0x30,0x00,0x02,
+  0x01}},
+#if 0
+ {{0xa3,0x7f,0x7f,0x87,0x86,0x97,0x24,0xf5,  /* 0x34 - 1152x768 */
+  0x02,0x88,0xff,0xff,0x25,0x10,0x00,0x02,
+  0x01}},
+#endif
+ {{0xa3,0x8f,0x8f,0x97,0x96,0x97,0x24,0xf5,  /* 0x34 - 1152x768 - TW: corrected */
+  0x02,0x88,0xff,0xff,0x25,0x10,0x00,0x02,
+  0x01}},
+ {{0x7f,0x63,0x63,0x83,0x6c,0x1c,0x72,0xba,  /* 0x35 - NEW 16:9 modes, not in BIOS ------ */
+   0x27,0x8b,0xdf,0xdf,0x73,0x00,0x00,0x06,
+   0x01}}, /* 0x35 */
+ {{0x7f,0x63,0x63,0x83,0x69,0x13,0x6f,0xba,
+   0x26,0x89,0xdf,0xdf,0x6f,0x00,0x00,0x06,
+   0x01}}, /* 0x36 */
+ {{0x7f,0x63,0x63,0x82,0x6b,0x13,0x75,0xba,
+   0x29,0x8c,0xdf,0xdf,0x75,0x00,0x00,0x06,
+   0x01}}, /* 0x37 */
+ {{0xa3,0x7f,0x7f,0x87,0x86,0x97,0x24,0xf1,
+   0xaf,0x85,0x3f,0x3f,0x25,0x30,0x00,0x02,
+   0x01}}, /* 0x38 */
+ {{0x9f,0x7f,0x7f,0x83,0x85,0x91,0x1e,0xf1,
+   0xad,0x81,0x3f,0x3f,0x1f,0x30,0x00,0x02,
+   0x01}}, /* 0x39 */
+ {{0xa7,0x7f,0x7f,0x88,0x89,0x95,0x26,0xf1,   	/* TW: 95 was 15 - illegal HBE! */
+   0xb1,0x85,0x3f,0x3f,0x27,0x30,0x00,0x02,
+   0x01}}, /* 0x3a */
+ {{0xce,0x9f,0x9f,0x92,0xa9,0x17,0x28,0xc4,
+   0x7a,0x8e,0xcf,0xcf,0x29,0x21,0x00,0x07,
+   0x01}}, /* 0x3b */
+ {{0xce,0x9f,0x9f,0x92,0xa5,0x17,0x28,0xd4,
+   0x7a,0x8e,0xcf,0xcf,0x29,0x21,0x00,0x07,
+   0x01}}, /* 0x3c */
+ {{0xd3,0x9f,0x9f,0x97,0xab,0x1f,0x2e,0xd4,
+   0x7d,0x81,0xcf,0xcf,0x2f,0x21,0x00,0x07,
+   0x01}}, /* 0x3d */			     /* TW: End of 16:9 modes --------------- */
+ {{0xc3,0x8f,0x8f,0x87,0x9b,0x0b,0x82,0xef,  /* TW: New, 1152x864-75 (not in any BIOS)   */
+   0x60,0x83,0x5f,0x5f,0x83,0x10,0x00,0x07,
+   0x01}},  /* 0x3e */
+ {{0x86,0x69,0x69,0x8A,0x74,0x06,0x8C,0x15,  /* TW: New, 848x480-38i, not in BIOS */
+   0x4F,0x83,0xEF,0xEF,0x8D,0x30,0x00,0x02,
+   0x00}}, /* 0x3f */
+#if 0
+ {{0x81,0x69,0x69,0x85,0x70,0x00,0x0F,0x3E,  /* TW: New, 848x480-60, not in BIOS - incorrect for Philips panel */
+   0xEB,0x8E,0xDF,0xDF,0x10,0x00,0x00,0x02,
+   0x00}}, /* 0x40 */
+#endif
+ {{0x83,0x69,0x69,0x87,0x6f,0x1d,0x03,0x3E,  /* TW: New, 848x480-60, not in BIOS */
+   0xE5,0x8d,0xDF,0xe4,0x04,0x00,0x00,0x06,
+   0x00}}, /* 0x40 */
+ {{0x86,0x6A,0x6A,0x8A,0x74,0x06,0x8C,0x15,  /* TW: New, 856x480-38i, not in BIOS */
+   0x4F,0x83,0xEF,0xEF,0x8D,0x30,0x00,0x02,
+   0x00}}, /* 0x41 */
+ {{0x81,0x6A,0x6A,0x85,0x70,0x00,0x0F,0x3E,  /* TW: New, 856x480-60, not in BIOS */
+   0xEB,0x8E,0xDF,0xDF,0x10,0x00,0x00,0x02,
+   0x00}}, /* 0x42 */
+ {{0xdd,0xa9,0xa9,0x81,0xb4,0x97,0x26,0xfd,  /* TW: New, 1360x768-60, not in BIOS */
+   0x01,0x8d,0xff,0x00,0x27,0x10,0x00,0x03,
+   0x01}}, /* 0x43 */
+ {{0xd9,0x8f,0x8f,0x9d,0xba,0x0a,0x8a,0xff,  /* TW: New, 1152x864-84 (not in any BIOS)   */
+   0x60,0x8b,0x5f,0x5f,0x8b,0x10,0x00,0x03,
+   0x01}}, /* 0x44 */   
+ {{0xd3,0x9f,0x9f,0x97,0xab,0x1f,0xf1,0xff,  /* TW: New, 1280x960-85 (not in any BIOS)   */
+   0xc0,0x83,0xbf,0xbf,0xf2,0x10,0x00,0x07,
+   0x01}}  /* 0x45 */
+};
+
+typedef struct _SiS300_MCLKDataStruct
+{
+	UCHAR SR28,SR29,SR2A;
+	USHORT CLOCK;
+} SiS300_MCLKDataStruct;
+
+static const SiS300_MCLKDataStruct  SiS300_MCLKData_630[] =	/* 630 */
+{ /* TW: at 0x54 in BIOS */
+	{ 0x5a,0x64,0x80, 66},
+	{ 0xb3,0x45,0x80, 83},
+	{ 0x37,0x61,0x80,100},
+	{ 0x37,0x22,0x80,133},
+	{ 0x37,0x61,0x80,100},
+	{ 0x37,0x61,0x80,100},
+	{ 0x37,0x61,0x80,100},
+	{ 0x37,0x61,0x80,100}
+};
+
+static const SiS300_MCLKDataStruct  SiS300_MCLKData_300[] =  /* 300 */
+{ /* TW: at 0x54 in BIOS */
+	{ 0x68,0x43,0x80,125},
+	{ 0x68,0x43,0x80,125},
+	{ 0x68,0x43,0x80,125},
+	{ 0x37,0x61,0x80,100},
+	{ 0x37,0x61,0x80,100},
+	{ 0x37,0x61,0x80,100},
+	{ 0x37,0x61,0x80,100},
+	{ 0x37,0x61,0x80,100}
+};
+
+typedef struct _SiS300_ECLKDataStruct
+{
+	UCHAR SR2E,SR2F,SR30;
+	USHORT CLOCK;
+} SiS300_ECLKDataStruct;
+
+static const SiS300_ECLKDataStruct  SiS300_ECLKData[] =
+{
+	{ 0x54,0x43,0x80,100},
+	{ 0x53,0x43,0x80,100},
+	{ 0x55,0x43,0x80,100},
+	{ 0x52,0x43,0x80,100},
+	{ 0x3f,0x42,0x80,100},
+	{ 0x54,0x43,0x80,100},
+	{ 0x54,0x43,0x80,100},
+	{ 0x54,0x43,0x80,100}
+};
+
+typedef struct _SiS300_VCLKDataStruct
+{
+	UCHAR SR2B,SR2C;
+	USHORT CLOCK;
+} SiS300_VCLKDataStruct;
+
+static const SiS300_VCLKDataStruct  SiS300_VCLKData[] =
+{
+	{ 0x1b,0xe1, 25}, /* 0x00 */
+	{ 0x4e,0xe4, 28},
+	{ 0x57,0xe4, 32}, /* 0x02 */
+	{ 0xc3,0xc8, 36},
+	{ 0x42,0xc3, 40}, /* 0x04 */
+	{ 0x5d,0xc4, 45},
+	{ 0x52,0x65, 50}, /* 0x06 */
+	{ 0x53,0x65, 50},
+	{ 0x6d,0x66, 56}, /* 0x08 */
+	{ 0x5a,0x64, 65},
+	{ 0x46,0x44, 68}, /* 0x0a */
+	{ 0x3e,0x43, 75},
+	{ 0x6d,0x46, 76}, /* 0x0c: 800x600 | LVDS_2(CH), MITAC(CH);  - 730, A901(301B): 0xb1,0x46, 76 */
+	{ 0x41,0x43, 79},
+	{ 0x31,0x42, 79}, /* 0x0e */
+	{ 0x46,0x25, 85},
+	{ 0x78,0x29, 87}, /* 0x10 */
+	{ 0x62,0x44, 95},
+	{ 0x2b,0x22,105}, /* 0x12 */
+	{ 0x49,0x24,106},
+	{ 0xc3,0x28,108}, /* 0x14 */
+	{ 0x3c,0x23,109},
+	{ 0xf7,0x2c,132}, /* 0x16 */
+	{ 0xd4,0x28,136},
+	{ 0x41,0x05,158}, /* 0x18 */
+	{ 0x43,0x05,162},
+	{ 0xe1,0x0f,175}, /* 0x1a */
+	{ 0xfc,0x12,189}, /* 0x1b */
+	{ 0xde,0x26,194}, /* 0x1c */
+	{ 0x54,0x05,203},
+	{ 0x3f,0x03,230}, /* 0x1e */
+	{ 0x30,0x02,234},
+	{ 0x24,0x01,266}, /* 0x20 */
+	{ 0x52,0x2a, 54}, /* 301 TV */
+	{ 0x52,0x6a, 27}, /* 301 TV */
+	{ 0x62,0x24, 70}, /* 301 TV */
+	{ 0x62,0x64, 70}, /* 301 TV */
+	{ 0xa8,0x4c, 30}, /* 301 TV */
+	{ 0x20,0x26, 33}, /* 301 TV */
+	{ 0x31,0xc2, 39},
+	{ 0xbf,0xc8, 35}, /* 0x28 - 856x480 */
+	{ 0x60,0x36, 30}, /* 0x29  CH/UNTSC TEXT | LVDS_2(CH) - 730, A901(301B), Mitac(CH): 0xe0, 0xb6, 30 */
+	{ 0x40,0x4a, 28},
+	{ 0x9f,0x46, 44},
+	{ 0x97,0x2c, 26},
+	{ 0x44,0xe4, 25},
+	{ 0x7e,0x32, 47},
+	{ 0x8a,0x24, 31}, /* 0x2f  CH/PAL TEXT | LVDS_2(CH), Mitac(CH) -  730, A901(301B): 0x57, 0xe4, 31 */
+	{ 0x97,0x2c, 26},
+	{ 0xce,0x3c, 39},
+	{ 0x52,0x4a, 36}, /* 0x32  CH/PAL 800x600 5/6 */
+	{ 0x34,0x61, 95},
+	{ 0x78,0x27,108},
+	{ 0xce,0x25,189}, /* 0x35 */
+	{ 0x45,0x6b, 21}, /* 0x36 */  /* TW: Added from Mitac */
+	{ 0x52,0xe2, 49}, /* 0x37 - added for 16:9 modes (not in any BIOS) */
+	{ 0x2b,0x61, 78}, /* 0x38 - added for 16:9 modes (not in any BIOS) */
+	{ 0x70,0x44,108}, /* 0x39 - added for 16:9 modes (not in any BIOS) */
+	{ 0x54,0x42,135}, /* 0x3a - added for 16:9 modes (not in any BIOS) */
+	{ 0x41,0x22,157}, /* 0x3b - added for 16:9 modes (not in any BIOS) */
+	{ 0x52,0x07,149}, /* 0x3c - added for 1280x960-85 (not in any BIOS)*/
+	{ 0x62,0xc6, 34}, /* 0x3d - added for 848x480-60 (not in any BIOS) */
+	{ 0x30,0x23, 88}, /* 0x3e - added for 1360x768-60 (not in any BIOS)*/
+	{ 0x3f,0x64, 46}, /* 0x3f - added for 640x480-100 (not in any BIOS)*/
+	{ 0x72,0x2a, 76}, /* 0x40 - test for SiS730 */
+	{ 0x15,0x21, 79}, /* 0x41 - test for SiS730 */
+	{ 0xff,0x00,  0}   
+};
+
+#if 0 /* TW: This table is in all BIOSes, but not used */
+static const SiS300_VCLKDataStruct  SiS300_VBVCLKData[] =
+{
+	{ 0x1b,0xe1, 25},
+	{ 0x4e,0xe4, 28},
+	{ 0x57,0xe4, 31},
+	{ 0xc3,0xc8, 36},
+	{ 0x42,0x47, 40},
+	{ 0x5d,0xc4, 44},
+	{ 0x52,0x47, 49},
+	{ 0x53,0x47, 50},
+	{ 0x6d,0x66, 56},
+	{ 0x5a,0x64, 65},
+	{ 0x46,0x44, 67},
+	{ 0x29,0x61, 75},
+	{ 0x6d,0x46, 75},
+	{ 0x41,0x43, 78},
+	{ 0x31,0x42, 79},
+	{ 0x46,0x25, 84},
+	{ 0x78,0x29, 86}, /* 0x10 */
+	{ 0x62,0x44, 94},
+	{ 0x2b,0x22,104},
+	{ 0x49,0x24,105},
+	{ 0x43,0x42,108},
+	{ 0x3c,0x23,109},
+	{ 0xe0,0x46,132},
+	{ 0x70,0x25,135},
+	{ 0x41,0x22,157},
+	{ 0x43,0x22,162},
+	{ 0x30,0x21,175},
+	{ 0xc1,0x24,189},
+	{ 0xde,0x26,194},
+	{ 0x70,0x07,202},
+	{ 0x3f,0x03,229},
+	{ 0x30,0x02,234},  /* 0x1f */
+	{ 0x24,0x01,265},  /* 0x20 */
+	{ 0x52,0x2a, 54},
+	{ 0x52,0x6a, 27},
+	{ 0x62,0x24, 70},
+	{ 0x62,0x64, 70},
+	{ 0xa8,0x4c, 30},
+	{ 0x20,0x26, 33},
+	{ 0x31,0xc2, 39},
+	{ 0x2e,0x48, 25},  /* 0x28 */
+	{ 0x24,0x46, 25},  /* 0x29 */
+	{ 0x26,0x64, 28},
+	{ 0x37,0x64, 40},
+	{ 0xa1,0x42,108},
+	{ 0x37,0x61,100},
+	{ 0x78,0x27,108},
+	{ 0xff,0x00,  0}
+};
+#endif
+
+static const UCHAR  SiS300_ScreenOffset[] =
+{
+	0x14,0x19,0x20,0x28,0x32,0x40,0x50,
+        0x64,0x78,0x80,0x2d,0x35,0x48,0x35,  /* 0x35 for 848 and 856 */
+	0x55,0xff			     /* 0x55 for 1360 */	
+};
+
+typedef struct _SiS300_StResInfoStruct
+{
+	USHORT HTotal;
+	USHORT VTotal;
+} SiS300_StResInfoStruct;
+
+static const SiS300_StResInfoStruct  SiS300_StResInfo[] =
+{
+	{ 640,400},
+	{ 640,350},
+	{ 720,400},
+	{ 720,350},
+	{ 640,480}
+};
+
+typedef struct _SiS300_ModeResInfoStruct
+{
+	USHORT HTotal;
+	USHORT VTotal;
+	UCHAR  XChar;
+	UCHAR  YChar;
+} SiS300_ModeResInfoStruct;
+
+static const SiS300_ModeResInfoStruct  SiS300_ModeResInfo[] =
+{
+	{  320, 200, 8, 8},  /* 0x00 */
+	{  320, 240, 8, 8},  /* 0x01 */
+	{  320, 400, 8, 8},  /* 0x02 */
+	{  400, 300, 8, 8},  /* 0x03 */
+	{  512, 384, 8, 8},  /* 0x04 */
+	{  640, 400, 8,16},  /* 0x05 */
+	{  640, 480, 8,16},  /* 0x06 */
+	{  800, 600, 8,16},  /* 0x07 */
+	{ 1024, 768, 8,16},  /* 0x08 */
+	{ 1280,1024, 8,16},  /* 0x09 */
+	{ 1600,1200, 8,16},  /* 0x0a */
+	{ 1920,1440, 8,16},  /* 0x0b */
+	{  720, 480, 8,16},  /* 0x0c */
+	{  720, 576, 8,16},  /* 0x0d */
+	{ 1280, 960, 8,16},  /* 0x0e */
+	{ 1024, 600, 8,16},  /* 0x0f */
+	{ 1152, 768, 8,16},  /* 0x10 */
+	{ 2048,1536, 8,16},  /* 0x11 - TW: Not in BIOS! */
+	{  800, 480, 8,16},  /* 0x12 - TW: New, not in any BIOS */
+	{ 1024, 576, 8,16},  /* 0x13 - TW: New, not in any BIOS */
+	{ 1280, 720, 8,16},  /* 0x14 - TW: New, not in any BIOS */
+	{ 1152, 864, 8,16},  /* 0x15 - TW: New, not in any BIOS */
+	{  848, 480, 8,16},  /* 0x16 - TW: New, not in any BIOS */
+	{  856, 480, 8,16},  /* 0x17 - TW: New, not in any BIOS */
+	{ 1360, 768, 8,16}   /* 0x18 - TW: New, not in any BIOS */
+};
+
+static const UCHAR SiS300_OutputSelect = 0x40;
+
+static const UCHAR SiS300_SoftSetting  = 0x30;
+
+#ifndef LINUX_XF86
+static UCHAR SiS300_SR07 = 0x10;
+#endif
+
+static const UCHAR  SiS300_SR15[8][4] =
+{
+	{0x01,0x09,0xa3,0x00},
+	{0x43,0x43,0x43,0x00},
+	{0x1e,0x1e,0x1e,0x00},
+	{0x2a,0x2a,0x2a,0x00},
+	{0x06,0x06,0x06,0x00},
+	{0x00,0x00,0x00,0x00},
+	{0x00,0x00,0x00,0x00},
+	{0x00,0x00,0x00,0x00}
+};
+
+#ifndef LINUX_XF86
+static UCHAR SiS300_SR1F = 0x00;
+static UCHAR SiS300_SR21 = 0x16;
+static UCHAR SiS300_SR22 = 0xb2;
+static UCHAR SiS300_SR23 = 0xf6;
+static UCHAR SiS300_SR24 = 0x0d;
+static UCHAR SiS300_SR25[] = {0x0,0x0};
+static UCHAR SiS300_SR31 = 0x00;
+static UCHAR SiS300_SR32 = 0x11;
+static UCHAR SiS300_SR33 = 0x00;
+static UCHAR SiS300_CRT2Data_1_2 = 0x40;
+static UCHAR SiS300_CRT2Data_4_D = 0x00;
+static UCHAR SiS300_CRT2Data_4_E = 0x00;
+static UCHAR SiS300_CRT2Data_4_10 = 0x80;
+
+static const USHORT SiS300_RGBSenseData = 0xd1;
+static const USHORT SiS300_VideoSenseData = 0xb3;
+static const USHORT SiS300_YCSenseData = 0xb9;
+static const USHORT SiS300_RGBSenseData2 = 0x0190;     /*301b*/
+static const USHORT SiS300_VideoSenseData2 = 0x0174;
+static const USHORT SiS300_YCSenseData2 = 0x016b;
+
+static const UCHAR SiS300_CR40[5][4];
+
+static UCHAR SiS300_CR49[2];
+#endif
+
+static const UCHAR SiS300_NTSCPhase[]  = {0x21,0xed,0xba,0x08};  /* TW: Was {0x21,0xed,0x8a,0x08}; */
+static const UCHAR SiS300_PALPhase[]   = {0x2a,0x05,0xe3,0x00};  /* TW: Was {0x2a,0x05,0xd3,0x00};  */
+static const UCHAR SiS300_PALMPhase[]  = {0x21,0xE4,0x2E,0x9B};  /* palmn */
+static const UCHAR SiS300_PALNPhase[]  = {0x21,0xF4,0x3E,0xBA};
+static const UCHAR SiS300_NTSCPhase2[] = {0x21,0xF0,0x7B,0xD6};  /* 301b */
+static const UCHAR SiS300_PALPhase2[]  = {0x2a,0x09,0x86,0xe9};  /* 301b */
+static const UCHAR SiS300_PALMPhase2[] = {0x21,0xE6,0xEF,0xA4}; /* TW: palm 301b*/
+static const UCHAR SiS300_PALNPhase2[] = {0x21,0xF6,0x94,0x46}; /* TW: paln 301b*/
+
+typedef struct _SiS300_PanelDelayTblStruct
+{
+	UCHAR timer[2];
+} SiS300_PanelDelayTblStruct;
+
+static const SiS300_PanelDelayTblStruct  SiS300_PanelDelayTbl[] =
+{
+	{{0x05,0xaa}}, /* TW: From 2.04.5a */
+	{{0x05,0x14}},
+	{{0x05,0x36}},
+	{{0x05,0x14}},
+	{{0x05,0x14}},
+	{{0x05,0x14}},
+	{{0x05,0x90}},
+	{{0x05,0x90}},
+	{{0x05,0x14}},
+	{{0x05,0x14}},
+	{{0x05,0x14}},
+	{{0x05,0x14}},
+	{{0x20,0x80}},
+	{{0x05,0x14}},
+	{{0x05,0x40}},
+	{{0x05,0x60}}
+};
+
+static const SiS300_PanelDelayTblStruct  SiS300_PanelDelayTblLVDS[] =
+{
+	{{0x05,0xaa}},
+	{{0x05,0x14}},
+	{{0x05,0x36}},
+	{{0x05,0x14}},
+	{{0x05,0x14}},
+	{{0x05,0x14}},
+	{{0x05,0x90}},
+	{{0x05,0x90}},
+	{{0x05,0x14}},
+	{{0x05,0x14}},
+	{{0x05,0x14}},
+	{{0x05,0x14}},  /* 2.07a (JVC): 14,96 */
+	{{0x05,0x28}},  /* 2.04.5c: 20, 80 - Clevo (2.04.2c): 05, 28 */
+	{{0x05,0x14}},
+	{{0x05,0x14}},  /* Some BIOSes: 05, 40 */
+	{{0x05,0x60}}
+};
+
+typedef struct _SiS300_LCDDataStruct
+{
+	USHORT RVBHCMAX;
+	USHORT RVBHCFACT;
+	USHORT VGAHT;
+	USHORT VGAVT;
+	USHORT LCDHT;
+	USHORT LCDVT;
+} SiS300_LCDDataStruct;
+
+static const SiS300_LCDDataStruct  SiS300_StLCD1024x768Data[] =
+{
+	{   66,  31, 992, 510,1320, 816},
+	{   66,  31, 992, 510,1320, 816},
+	{  176,  75, 900, 510,1320, 816},
+	{  176,  75, 900, 510,1320, 816},
+	{   66,  31, 992, 510,1320, 816},
+	{   27,  16,1024, 650,1350, 832},
+	{    1,   1,1344, 806,1344, 806}
+};
+
+static const SiS300_LCDDataStruct  SiS300_ExtLCD1024x768Data[] =
+{
+	{   12,   5, 896, 512,1344, 806},
+	{   12,   5, 896, 510,1344, 806},
+	{   32,  15,1008, 505,1344, 806},
+	{   32,  15,1008, 514,1344, 806},
+	{   12,   5, 896, 500,1344, 806},
+	{   42,  25,1024, 625,1344, 806},
+	{    1,   1,1344, 806,1344, 806},
+	{   12,   5, 896, 500,1344, 806},
+	{   42,  25,1024, 625,1344, 806},
+	{    1,   1,1344, 806,1344, 806},
+	{   12,   5, 896, 500,1344, 806},
+	{   42,  25,1024, 625,1344, 806},
+	{    1,   1,1344, 806,1344, 806}
+};
+
+static const SiS300_LCDDataStruct  SiS300_St2LCD1024x768Data[] =
+{
+	{   62,  25, 800, 546,1344, 806},
+	{   32,  15, 930, 546,1344, 806},
+	{   32,  15, 930, 546,1344, 806},
+	{  104,  45, 945, 496,1344, 806},
+	{   62,  25, 800, 546,1344, 806},
+	{   31,  18,1008, 624,1344, 806},
+	{    1,   1,1344, 806,1344, 806}
+};
+
+static const SiS300_LCDDataStruct  SiS300_StLCD1280x1024Data[] =
+{
+	{    4,   1, 880, 510,1650,1088},
+	{    4,   1, 880, 510,1650,1088},
+	{  176,  45, 900, 510,1650,1088},
+	{  176,  45, 900, 510,1650,1088},
+	{    4,   1, 880, 510,1650,1088},
+	{   13,   5,1024, 675,1560,1152},
+	{   16,   9,1266, 804,1688,1072},
+	{    1,   1,1688,1066,1688,1066}
+};
+
+static const SiS300_LCDDataStruct  SiS300_ExtLCD1280x1024Data[] =
+{
+	{  211,  60,1024, 501,1688,1066},
+	{  211,  60,1024, 508,1688,1066},
+	{  211,  60,1024, 501,1688,1066},
+	{  211,  60,1024, 508,1688,1066},
+	{  211,  60,1024, 500,1688,1066},
+	{  211,  75,1024, 625,1688,1066},
+	{  211, 120,1280, 798,1688,1066},
+	{    1,   1,1688,1066,1688,1066}
+};
+
+static const SiS300_LCDDataStruct  SiS300_St2LCD1280x1024Data[] =
+{
+	{   22,   5, 800, 510,1650,1088},
+	{   22,   5, 800, 510,1650,1088},
+	{  176,  45, 900, 510,1650,1088},
+	{  176,  45, 900, 510,1650,1088},
+	{   22,   5, 800, 510,1650,1088},
+	{   13,   5,1024, 675,1560,1152},
+	{   16,   9,1266, 804,1688,1072},
+	{    1,   1,1688,1066,1688,1066}
+};
+
+static const SiS300_LCDDataStruct  SiS300_NoScaleData1024x768[] =
+{
+	{    1,   1, 800, 449, 800, 449},
+	{    1,   1, 800, 449, 800, 449},
+	{    1,   1, 900, 449, 900, 449},
+	{    1,   1, 900, 449, 900, 449},
+	{    1,   1, 800, 525, 800, 525},
+	{    1,   1,1056, 628,1056, 628},
+	{    1,   1,1344, 806,1344, 806},
+	{    1,   1,1688,1066,1688,1066}
+};
+
+static const SiS300_LCDDataStruct  SiS300_NoScaleData1280x1024[] =  /* TW: Fake */
+{
+	{    1,   1, 800, 449, 800, 449},
+	{    1,   1, 800, 449, 800, 449},
+	{    1,   1, 900, 449, 900, 449},
+	{    1,   1, 900, 449, 900, 449},
+	{    1,   1, 800, 525, 800, 525},
+	{    1,   1,1056, 628,1056, 628},
+	{    1,   1,1344, 806,1344, 806},
+	{    1,   1,1688,1066,1688,1066}
+};
+
+static const SiS300_LCDDataStruct  SiS300_LCD1280x960Data[] =
+{
+	{    9,   2, 800, 500,1800,1000},
+	{    9,   2, 800, 500,1800,1000},
+	{    4,   1, 900, 500,1800,1000},
+	{    4,   1, 900, 500,1800,1000},
+	{    9,   2, 800, 500,1800,1000},
+	{   30,  11,1056, 625,1800,1000},
+	{    5,   3,1350, 800,1800,1000},
+	{    1,   1,1576,1050,1576,1050},
+	{    1,   1,1800,1000,1800,1000}
+};
+
+static const SiS300_LCDDataStruct  SiS300_ExtLCD1400x1050Data[] =  /* TW: New */
+{
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0}
+};
+
+static const SiS300_LCDDataStruct  SiS300_ExtLCD1600x1200Data[] =  /* TW: New */
+{
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0}
+};
+
+static const SiS300_LCDDataStruct  SiS300_StLCD1400x1050Data[] =  /* TW: New */
+{
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0}
+};
+
+static const SiS300_LCDDataStruct  SiS300_StLCD1600x1200Data[] =  /* TW: New */
+{
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0}
+};
+
+static const SiS300_LCDDataStruct  SiS300_NoScaleData1400x1050[] =  /* TW: New */
+{
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0}
+};
+
+static const SiS300_LCDDataStruct  SiS300_NoScaleData1600x1200[] =  /* TW: New */
+{
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0}
+};
+
+
+typedef struct _SiS300_TVDataStruct
+{
+	USHORT RVBHCMAX;
+	USHORT RVBHCFACT;
+	USHORT VGAHT;
+	USHORT VGAVT;
+	USHORT TVHDE;
+	USHORT TVVDE;
+	USHORT RVBHRS;
+	UCHAR FlickerMode;
+	USHORT HALFRVBHRS;
+	UCHAR RY1COE;
+	UCHAR RY2COE;
+	UCHAR RY3COE;
+	UCHAR RY4COE;
+} SiS300_TVDataStruct;
+
+static const SiS300_TVDataStruct  SiS300_StPALData[] =
+{
+	{    1,   1, 864, 525,1270, 400, 100,   0, 760,0xf4,0xff,0x1c,0x22},
+	{    1,   1, 864, 525,1270, 350, 100,   0, 760,0xf4,0xff,0x1c,0x22},
+	{    1,   1, 864, 525,1270, 400,   0,   0, 720,0xf1,0x04,0x1f,0x18},
+	{    1,   1, 864, 525,1270, 350,   0,   0, 720,0xf4,0x0b,0x1c,0x0a},
+	{    1,   1, 864, 525,1270, 480,  50,   0, 760,0xf4,0xff,0x1c,0x22},
+	{    1,   1, 864, 525,1270, 600,  50,   0,   0,0xf4,0xff,0x1c,0x22}
+};
+
+static const SiS300_TVDataStruct  SiS300_ExtPALData[] =
+{
+	{   27,  10, 848, 448,1270, 530,  50,   0,  50,0xf4,0xff,0x1c,0x22},
+	{  108,  35, 848, 398,1270, 530,  50,   0,  50,0xf4,0xff,0x1c,0x22},
+	{   12,   5, 954, 448,1270, 530,  50,   0,  50,0xf1,0x04,0x1f,0x18},
+	{    9,   4, 960, 463,1644, 438,  50,   0,  50,0xf4,0x0b,0x1c,0x0a},
+	{    9,   4, 848, 528,1270, 530,   0,   0,  50,0xf5,0xfb,0x1b,0x2a},
+	{   36,  25,1060, 648,1316, 530, 438,   0, 438,0xeb,0x05,0x25,0x16},
+	{    3,   2,1080, 619,1270, 540, 438,   0, 438,0xf3,0x00,0x1d,0x20},
+	{    1,   1,1170, 821,1270, 520, 686,   0, 686,0xF3,0x00,0x1D,0x20}
+
+};
+
+static const SiS300_TVDataStruct  SiS300_StNTSCData[] =
+{
+	{    1,   1, 858, 525,1270, 400,  50,   0, 760,0xf1,0x04,0x1f,0x18},
+	{    1,   1, 858, 525,1270, 350,  50,   0, 640,0xf1,0x04,0x1f,0x18},
+	{    1,   1, 858, 525,1270, 400,   0,   0, 720,0xf1,0x04,0x1f,0x18},
+	{    1,   1, 858, 525,1270, 350,   0,   0, 720,0xf4,0x0b,0x1c,0x0a},
+	{    1,   1, 858, 525,1270, 480,   0,   0, 760,0xf1,0x04,0x1f,0x18}
+};
+
+static const SiS300_TVDataStruct  SiS300_ExtNTSCData[] =
+{
+	{  143,  65, 858, 443,1270, 440, 171,   0, 171,0xf1,0x04,0x1f,0x18},
+	{   88,  35, 858, 393,1270, 440, 171,   0, 171,0xf1,0x04,0x1f,0x18},
+	{  143,  70, 924, 443,1270, 440,  92,   0,  92,0xf1,0x04,0x1f,0x18},
+	{  143,  70, 924, 393,1270, 440,  92,   0,  92,0xf4,0x0b,0x1c,0x0a},
+	{  143,  76, 836, 523,1270, 440, 224,   0,   0,0xf1,0x05,0x1f,0x16},
+	{  143, 120,1056, 643,1270, 440,   0, 128,   0,0xf4,0x10,0x1c,0x00},
+	{  143,  76, 836, 523,1270, 440,   0, 128,   0,0xee,0x0c,0x22,0x08},
+	{   65,  64,1056, 791,1270, 480, 638,   0,   0,0xf1,0x04,0x1f,0x18}
+};
+
+static const SiS_TVDataStruct  SiS300_St1HiTVData[] =
+{
+ 	{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}
+};
+
+static const SiS_TVDataStruct  SiS300_St2HiTVData[] =
+{
+ 	{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}
+};
+
+static const SiS_TVDataStruct  SiS300_ExtHiTVData[] =
+{
+ 	{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}
+};
+
+static const UCHAR SiS300_NTSCTiming[] =
+{
+	0x17,0x1d,0x03,0x09,0x05,0x06,0x0c,0x0c,
+	0x94,0x49,0x01,0x0a,0x06,0x0d,0x04,0x0a,
+	0x06,0x14,0x0d,0x04,0x0a,0x00,0x85,0x1b,
+	0x0c,0x50,0x00,0x97,0x00,0xda,0x4a,0x17,  /* (in 2.06.50) */
+/*	0x0c,0x50,0x00,0x99,0x00,0xec,0x4a,0x17,     (in 2.04.5a) */
+	0x7d,0x05,0x4b,0x00,0x00,0xe2,0x00,0x02,  /* (in 2.06.50) */
+/*	0x88,0x00,0x4b,0x00,0x00,0xe2,0x00,0x02,     (in 2.04.5a) */
+	0x03,0x0a,0x65,0x9d,0x08,0x92,0x8f,0x40,
+	0x60,0x80,0x14,0x90,0x8c,0x60,0x14,0x50,
+	0x00,0x40,0x44,0x00,0xdb,0x02,0x3b,0x00
+};
+
+static const UCHAR SiS300_PALTiming[] =
+{
+	0x19,0x52,0x35,0x6e,0x04,0x38,0x3d,0x70,
+	0x94,0x49,0x01,0x12,0x06,0x3e,0x35,0x6d,
+	0x06,0x14,0x3e,0x35,0x6d,0x00,0x45,0x2b,
+        0x70,0x50,0x00,0x9b,0x00,0xd9,0x5d,0x17,  /* (in 2.06.50) */
+/*	0x70,0x50,0x00,0x97,0x00,0xd7,0x5d,0x17,     (in 2.04.5a) */
+	0x7d,0x05,0x45,0x00,0x00,0xe8,0x00,0x02,  /* (in 2.06.50) */
+/*	0x88,0x00,0x45,0x00,0x00,0xe8,0x00,0x02,     (in 2.04.5a) */
+	0x0d,0x00,0x68,0xb0,0x0b,0x92,0x8f,0x40,
+	0x60,0x80,0x14,0x90,0x8c,0x60,0x14,0x63,
+	0x00,0x40,0x3e,0x00,0xe1,0x02,0x28,0x00
+};
+
+#ifdef oldHV
+static const UCHAR SiS300_HiTVExtTiming[] =	 /* TW: New */
+{
+        0x32,0x65,0x2c,0x5f,0x08,0x31,0x3a,0x64,
+	0x28,0x02,0x01,0x3d,0x06,0x3e,0x35,0x6d,
+	0x06,0x14,0x3e,0x35,0x6d,0x00,0xc5,0x3f,
+	0x64,0x90,0x33,0x8c,0x18,0x36,0x3e,0x13,
+	0x2a,0xde,0x2a,0x44,0x40,0x2a,0x44,0x40,
+	0x8e,0x8e,0x82,0x07,0x0b,0x92,0x0f,0x40,
+	0x60,0x80,0x14,0x90,0x8c,0x60,0x14,0x3d,
+	0x63,0x4f,0x27,0x00,0xfc,0xff,0x6a,0x00
+};
+
+static const UCHAR SiS300_HiTVSt1Timing[] =   	/* TW: New */
+{
+        0x32,0x65,0x2c,0x5f,0x08,0x31,0x3a,0x65,
+	0x28,0x02,0x01,0x3d,0x06,0x3e,0x35,0x6d,
+	0x06,0x14,0x3e,0x35,0x6d,0x00,0xc5,0x3f,
+	0x65,0x90,0x7b,0xa8,0x03,0xf0,0x87,0x03,
+	0x11,0x15,0x11,0xcf,0x10,0x11,0xcf,0x10,
+	0x35,0x35,0x3b,0x69,0x1d,0x92,0x0f,0x40,
+	0x60,0x80,0x14,0x90,0x8c,0x60,0x04,0x86,
+	0xaf,0x5d,0x0e,0x00,0xfc,0xff,0x2d,0x00
+};
+
+static const UCHAR SiS300_HiTVSt2Timing[] =	/* TW: New */
+{
+        0x32,0x65,0x2c,0x5f,0x08,0x31,0x3a,0x64,
+	0x28,0x02,0x01,0x3d,0x06,0x3e,0x35,0x6d,
+	0x06,0x14,0x3e,0x35,0x6d,0x00,0xc5,0x3f,
+	0x64,0x90,0x33,0x8c,0x18,0x36,0x3e,0x13,
+	0x2a,0xde,0x2a,0x44,0x40,0x2a,0x44,0x40,
+	0x8e,0x8e,0x82,0x07,0x0b,0x92,0x0f,0x40,
+	0x60,0x80,0x14,0x90,0x8c,0x60,0x14,0x3d,
+	0x63,0x4f,0x27,0x00,0xfc,0xff,0x6a,0x00
+};
+
+static const UCHAR SiS300_HiTVTextTiming[] =   	/* TW: New */
+{
+        0x32,0x65,0x2c,0x5f,0x08,0x31,0x3a,0x65,
+	0x28,0x02,0x01,0x3d,0x06,0x3e,0x35,0x6d,
+	0x06,0x14,0x3e,0x35,0x6d,0x00,0xc5,0x3f,
+	0x65,0x90,0xe7,0xbc,0x03,0x0c,0x97,0x03,
+	0x14,0x78,0x14,0x08,0x20,0x14,0x08,0x20,
+	0xc8,0xc8,0x3b,0xd2,0x26,0x92,0x0f,0x40,
+        0x60,0x80,0x14,0x90,0x8c,0x60,0x04,0x96,
+	0x72,0x5c,0x11,0x00,0xfc,0xff,0x32,0x00
+};
+
+static const UCHAR SiS300_HiTVGroup3Data[] =   	/* TW: New */
+{
+        0x00,0x1a,0x22,0x63,0x62,0x22,0x08,0x5f,
+	0x05,0x21,0xb2,0xb2,0x55,0x77,0x2a,0xa6,
+	0x25,0x2f,0x47,0xfa,0xc8,0xff,0x8e,0x20,
+	0x8c,0x6e,0x60,0x2e,0x58,0x48,0x72,0x44,
+	0x56,0x36,0x4f,0x6e,0x3f,0x80,0x00,0x80,
+	0x4f,0x7f,0x03,0xa8,0x7d,0x20,0x1a,0xa9,
+	0x14,0x05,0x03,0x7e,0x64,0x31,0x14,0x75,
+	0x18,0x05,0x18,0x05,0x4c,0xa8,0x01
+};
+
+static const UCHAR SiS300_HiTVGroup3Simu[] =   	/* TW: New */
+{
+        0x00,0x1a,0x22,0x63,0x62,0x22,0x08,0x95,
+	0xdb,0x20,0xb8,0xb8,0x55,0x47,0x2a,0xa6,
+	0x25,0x2f,0x47,0xfa,0xc8,0xff,0x8e,0x20,
+	0x8c,0x6e,0x60,0x15,0x26,0xd3,0xe4,0x11,
+	0x56,0x36,0x4f,0x6e,0x3f,0x80,0x00,0x80,
+	0x67,0x36,0x01,0x47,0x0e,0x10,0xbe,0xb4,
+	0x01,0x05,0x03,0x7e,0x65,0x31,0x14,0x75,
+	0x18,0x05,0x18,0x05,0x4c,0xa8,0x01
+};
+
+static const UCHAR SiS300_HiTVGroup3Text[] =   	/* TW: New */
+{
+        0x00,0x1a,0x22,0x63,0x62,0x22,0x08,0xa7,
+	0xf5,0x20,0xce,0xce,0x55,0x47,0x2a,0xa6,
+	0x25,0x2f,0x47,0xfa,0xc8,0xff,0x8e,0x20,
+	0x8c,0x6e,0x60,0x18,0x2c,0x0c,0x20,0x22,
+	0x56,0x36,0x4f,0x6e,0x3f,0x80,0x00,0x80,
+	0x93,0x3c,0x01,0x50,0x2f,0x10,0xf4,0xca,
+	0x01,0x05,0x03,0x7e,0x65,0x31,0x14,0x75,
+	0x18,0x05,0x18,0x05,0x4c,0xa8,0x01
+};
+#endif
+
+typedef struct _SiS300_LVDSDataStruct
+{
+	USHORT VGAHT;
+	USHORT VGAVT;
+	USHORT LCDHT;
+	USHORT LCDVT;
+} SiS300_LVDSDataStruct;
+
+static const SiS300_LVDSDataStruct  SiS300_LVDS320x480Data_1[] =
+{
+	{848, 433,400, 525},
+	{848, 389,400, 525},
+	{848, 433,400, 525},
+	{848, 389,400, 525},
+	{848, 518,400, 525},
+	{1056,628,400, 525},
+	{400, 525,400, 525},
+	{800, 449,1000, 644},
+	{800, 525,1000, 635}
+};
+
+static const SiS300_LVDSDataStruct  SiS300_LVDS800x600Data_1[] =
+{
+	{848, 433,1060, 629},
+	{848, 389,1060, 629},
+	{848, 433,1060, 629},
+	{848, 389,1060, 629},
+	{848, 518,1060, 629},
+	{1056, 628,1056, 628},
+	{1056, 628,1056, 628},
+	{800, 449,1000, 644},
+	{800, 525,1000, 635}
+};
+
+static const SiS300_LVDSDataStruct  SiS300_LVDS800x600Data_2[] =
+{
+	{1056, 628,1056, 628},
+	{1056, 628,1056, 628},
+	{1056, 628,1056, 628},
+	{1056, 628,1056, 628},
+	{1056, 628,1056, 628},
+	{1056, 628,1056, 628},
+	{1056, 628,1056, 628},
+	{800, 449,1000, 644},
+	{800, 525,1000, 635}
+};
+
+static const SiS300_LVDSDataStruct  SiS300_LVDS1024x768Data_1[] =
+{
+	{840, 438,1344, 806},
+	{840, 409,1344, 806},
+	{840, 438,1344, 806},
+	{840, 409,1344, 806},
+	{840, 518,1344, 806},
+	{1050, 638,1344, 806},
+	{1344, 806,1344, 806},
+	{800, 449,1280, 801},
+	{800, 525,1280, 813}
+};
+
+static const SiS300_LVDSDataStruct  SiS300_LVDS1024x768Data_2[] =
+{
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{800, 449,1280, 801},
+	{800, 525,1280, 813}
+};
+
+static const SiS300_LVDSDataStruct  SiS300_LVDS1280x1024Data_1[] =
+{
+	{840, 438,1344, 806},
+	{840, 409,1344, 806},
+	{840, 438,1344, 806},
+	{840, 409,1344, 806},
+	{840, 518,1344, 806},
+	{1050, 638,1344, 806},
+	{1344, 806,1344, 806},
+	{800, 449,1280, 801},
+	{800, 525,1280, 813}
+};
+
+static const SiS300_LVDSDataStruct  SiS300_LVDS1280x1024Data_2[] =
+{
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{800, 449,1280, 801},
+	{800, 525,1280, 813}
+};
+
+static const SiS300_LVDSDataStruct  SiS300_LVDS1400x1050Data_1[] =   /* TW: New */
+{
+        {928, 416, 1688, 1066},
+	{928, 366, 1688, 1066},
+	{928, 416, 1688, 1066},
+	{928, 366, 1688, 1066},
+	{928, 496, 1688, 1066},
+	{1088, 616, 1688, 1066},
+	{1312, 784, 1688, 1066},
+	{1568, 1040, 1688, 1066},
+	{1688, 1066, 1688, 1066}
+};
+
+static const SiS300_LVDSDataStruct  SiS300_LVDS1400x1050Data_2[] =   /* TW: New */
+{
+        {1688,1066, 1688,1066},
+	{1688,1066, 1688,1066},
+	{1688,1066, 1688,1066},
+	{1688,1066, 1688,1066},
+	{1688,1066, 1688,1066},
+	{1688,1066, 1688,1066},
+	{1688,1066, 1688,1066},
+	{1688,1066, 1688,1066},
+	{1688,1066, 1688,1066},
+};
+
+static const SiS300_LVDSDataStruct  SiS300_LVDS1280x768Data_1[]=   /* TW: New - TODO */
+{	/* TW: Temp data, invalid (is identical to 1024x768) */
+	{840, 438,1344, 806},
+	{840, 409,1344, 806},
+	{840, 438,1344, 806},
+	{840, 409,1344, 806},
+	{840, 518,1344, 806},
+	{1050, 638,1344, 806},
+	{1344, 806,1344, 806},
+	{800, 449,1280, 801},
+	{800, 525,1280, 813}
+};
+
+static const SiS300_LVDSDataStruct  SiS300_LVDS1280x768Data_2[]=   /* TW: New - TODO */
+{	/* TW: Temp data, invalid (is identical to 1024x768) */
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{800, 449,1280, 801},
+	{800, 525,1280, 813}
+};
+
+/* TW: New: */
+static const SiS300_LVDSDataStruct  SiS300_LVDS1024x600Data_1[] =
+{
+	{840, 604,1344, 800},
+	{840, 560,1344, 800},
+	{840, 604,1344, 800},
+	{840, 560,1344, 800},
+	{840, 689,1344, 800},
+	{1050, 800,1344, 800},
+	{1344, 800,1344, 800},
+	{800, 449,1280, 789},
+	{800, 525,1280, 785}
+};
+
+/* TW: New: */
+static const SiS300_LVDSDataStruct  SiS300_LVDS1024x600Data_2[] =
+{
+	{1344, 800,1344, 800},
+	{1344, 800,1344, 800},
+	{1344, 800,1344, 800},
+	{1344, 800,1344, 800},
+	{1344, 800,1344, 800},
+	{1344, 800,1344, 800},
+	{1344, 800,1344, 800},
+	{800, 449,1280, 801},
+	{800, 525,1280, 813}
+};
+
+/* TW: New: */
+static const SiS300_LVDSDataStruct  SiS300_LVDS1152x768Data_1[] =
+{
+	{840, 438,1344, 806},
+	{840, 409,1344, 806},
+	{840, 438,1344, 806},
+	{840, 409,1344, 806},
+	{840, 518,1344, 806},
+	{1050, 638,1344, 806},
+	{1344, 806,1344, 806},
+	{800, 449,1280, 801},
+	{800, 525,1280, 813}
+};
+
+/* TW: New: */
+static const SiS300_LVDSDataStruct  SiS300_LVDS1152x768Data_2[] =
+{
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{800, 449,1280, 801},
+	{800, 525,1280, 813}
+};
+
+/* TW: New in 650/LVDS BIOS - 1:1 */
+static const SiS300_LVDSDataStruct  SiS300_LVDSXXXxXXXData_1[] =   /* TW: New */
+{
+        { 800, 449, 800, 449},
+	{ 800, 449, 800, 449},
+	{ 900, 449, 900, 449},
+	{ 900, 449, 900, 449},
+	{ 800, 525, 800, 525},
+	{1056, 628,1056, 628},
+	{1344, 806,1344, 806},
+	{1688, 806,1688, 806}
+};
+
+static const SiS300_LVDSDataStruct  SiS300_LVDS640x480Data_1[] =
+{
+	{800, 449, 800, 449},
+	{800, 449, 800, 449},
+	{800, 449, 800, 449},
+	{800, 449, 800, 449},
+	{800, 525, 800, 525},
+	{1056, 628,1056, 628},
+	{1056, 628,1056, 628},
+	{1056, 628,1056, 628},
+	{1056, 628,1056, 628}
+};
+
+static const SiS300_LVDSDataStruct  SiS300_LVDS1280x960Data_1[] =   /* TW: New */
+{
+	{840, 438,1344, 806},
+	{840, 409,1344, 806},
+	{840, 438,1344, 806},
+	{840, 409,1344, 806},
+	{840, 518,1344, 806},
+	{1050, 638,1344, 806},
+	{1344, 806,1344, 806},
+	{800, 449,1280, 801},
+	{800, 525,1280, 813}
+};
+
+static const SiS300_LVDSDataStruct  SiS300_LVDS1280x960Data_2[] =   /* TW: New */
+{
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{800, 449,1280, 801},
+	{800, 525,1280, 813}
+};
+
+static const SiS300_LVDSDataStruct  SiS300_LCDA1400x1050Data_1[] =   /* TW: New */
+{	/* TW: Might be temporary (invalid) data */
+        {928, 416, 1688, 1066},
+	{928, 366, 1688, 1066},
+	{1008, 416, 1688, 1066},
+	{1008, 366, 1688, 1066},
+	{1200, 530, 1688, 1066},
+	{1088, 616, 1688, 1066},
+	{1312, 784, 1688, 1066},
+	{1568, 1040, 1688, 1066},
+	{1688, 1066, 1688, 1066}
+};
+
+static const SiS300_LVDSDataStruct  SiS300_LCDA1400x1050Data_2[] =   /* TW: New */
+{	/* TW: Temporary data. Not valid */
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{800, 449,1280, 801},
+	{800, 525,1280, 813}
+};
+
+static const SiS300_LVDSDataStruct  SiS300_LCDA1600x1200Data_1[] =   /* TW: New */
+{	/* TW: Temporary data. Not valid */
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{800, 449,1280, 801},
+	{800, 525,1280, 813}
+};
+
+static const SiS300_LVDSDataStruct  SiS300_LCDA1600x1200Data_2[] =   /* TW: New */
+{	/* TW: Temporary data. Not valid */
+	{0, 0, 0, 0},
+	{0, 0, 0, 0},
+	{0, 0, 0, 0},
+	{0, 0, 0, 0},
+	{0, 0, 0, 0},
+	{0, 0, 0, 0},
+	{0, 0, 0, 0},
+	{0, 0, 0, 0},
+	{0, 0, 0, 0},
+	{0, 0, 0, 0},
+	{0, 0, 0, 0},
+	{0, 0, 0, 0}
+};
+
+
+/* TW: New: */
+static const SiS300_LVDSDataStruct  SiS300_CHTVUNTSCData[] =
+{
+	{840, 600, 840, 600},
+	{840, 600, 840, 600},
+	{840, 600, 840, 600},
+	{840, 600, 840, 600},
+	{784, 600, 784, 600},
+	{1064, 750,1064, 750}
+};
+
+static const SiS300_LVDSDataStruct  SiS300_CHTVONTSCData[] =
+{
+	{840, 525, 840, 525},
+	{840, 525, 840, 525},
+	{840, 525, 840, 525},
+	{840, 525, 840, 525},
+	{784, 525, 784, 525},
+	{1040, 700,1040, 700}
+};
+
+static const SiS300_LVDSDataStruct  SiS300_CHTVUPALData[] =
+{
+	{1008, 625,1008, 625},
+	{1008, 625,1008, 625},
+	{1008, 625,1008, 625},
+	{1008, 625,1008, 625},
+	{840, 750, 840, 750},
+	{936, 836, 936, 836}
+};
+
+static const SiS300_LVDSDataStruct  SiS300_CHTVOPALData[] =
+{
+	{1008, 625,1008, 625},
+	{1008, 625,1008, 625},
+	{1008, 625,1008, 625},
+	{1008, 625,1008, 625},
+	{840, 625, 840, 625},
+	{960, 750, 960, 750}
+};
+
+static const SiS300_LVDSDataStruct  SiS300_CHTVSOPALData[] =
+{
+	{1008, 625,1008, 625},
+	{1008, 625,1008, 625},
+	{1008, 625,1008, 625},
+	{1008, 625,1008, 625},
+	{840, 500, 840, 500},
+	{944, 625, 944, 625}
+};
+
+/* TW: new end */
+
+typedef struct _SiS300_LVDSDesStruct
+{
+	USHORT LCDHDES;
+	USHORT LCDVDES;
+} SiS300_LVDSDesStruct;
+
+static const SiS300_LVDSDesStruct  SiS300_PanelType00_1[] =
+{
+	{0, 626},
+	{0, 624},
+	{0, 626},
+	{0, 624},
+	{0, 624},
+	{ 0, 627},
+	{ 0, 627},
+	{ 0,   0},
+	{ 0,   0}
+};
+
+static const SiS300_LVDSDesStruct  SiS300_PanelType01_1[] =
+{
+	{1343, 798},
+	{1343, 794},
+	{1343, 798},
+	{1343, 794},
+	{1343,   0},
+	{1343,   0},
+	{ 0, 805},
+	{ 0, 794},
+	{ 0,   0}
+};
+
+static const SiS300_LVDSDesStruct  SiS300_PanelType02_1[] =
+{
+	{0, 626},
+	{0, 624},
+	{0, 626},
+	{0, 624},
+	{0, 624},
+	{ 0, 627},
+	{ 0, 627},
+	{ 0,   0},
+	{ 0,   0}
+};
+
+static const SiS300_LVDSDesStruct  SiS300_PanelType03_1[] =
+{
+	{ 8, 436},
+	{ 8, 440},
+	{ 8, 436},
+	{ 8, 440},
+	{ 8, 512},
+	{1343, 798},
+	{1343, 794},
+	{1343, 798},
+	{1343, 794}
+};
+
+static const SiS300_LVDSDesStruct  SiS300_PanelType04_1[] =
+{
+	{1343, 798},
+	{1343, 794},
+	{1343, 798},
+	{1343, 794},
+	{1343,   0},
+	{1343,   0},
+	{ 0, 805},
+	{ 0, 794},
+	{ 0,   0}
+};
+
+static const SiS300_LVDSDesStruct  SiS300_PanelType05_1[] =
+{
+	{1343, 798},
+	{1343, 794},
+	{1343, 798},
+	{1343, 794},
+	{1343,   0},
+	{1343,   0},
+	{ 0, 805},
+	{ 0, 794},
+	{ 0,   0}
+};
+
+static const SiS300_LVDSDesStruct  SiS300_PanelType06_1[] =
+{
+	{1343, 798},
+	{1343, 794},
+	{1343, 798},
+	{1343, 794},
+	{1343,   0},
+	{1343,   0},
+	{ 0, 805},
+	{ 0, 794},
+	{ 0,   0}
+};
+
+static const SiS300_LVDSDesStruct  SiS300_PanelType07_1[] =
+{
+	{1343, 798},
+	{1343, 794},
+	{1343, 798},
+	{1343, 794},
+	{1343,   0},
+	{1343,   0},
+	{ 0, 805},
+	{ 0, 794},
+	{ 0,   0}
+};
+
+static const SiS300_LVDSDesStruct  SiS300_PanelType08_1[] =
+{
+	{1059, 626},
+	{1059, 624},
+	{1059, 626},
+	{1059, 624},
+	{1059, 624},
+	{ 0, 627},
+	{ 0, 627},
+	{ 0,   0},
+	{ 0,   0}
+};
+
+static const SiS300_LVDSDesStruct  SiS300_PanelType09_1[] =
+{
+	{1343, 798},
+	{1343, 794},
+	{1343, 798},
+	{1343, 794},
+	{1343,   0},
+	{1343,   0},
+	{ 0, 805},
+	{ 0, 794},
+	{ 0,   0}
+};
+
+static const SiS300_LVDSDesStruct  SiS300_PanelType0a_1[] =
+{
+	{1059, 626},
+	{1059, 624},
+	{1059, 626},
+	{1059, 624},
+	{1059, 624},
+	{ 0, 627},
+	{ 0, 627},
+	{ 0,   0},
+	{ 0,   0}
+};
+
+static const SiS300_LVDSDesStruct  SiS300_PanelType0b_1[] =
+{
+	{1343, 0},
+	{1343, 0},
+	{1343, 0},
+	{1343, 0},
+	{1343, 0},   /* 640x480 - BIOS 1343, 0 */
+	{1343, 0},
+	{ 0, 799},
+	{ 0, 0},
+	{ 0, 0}
+};
+
+static const SiS300_LVDSDesStruct  SiS300_PanelType0c_1[] =
+{
+	{1343, 798},
+	{1343, 794},
+	{1343, 798},
+	{1343, 794},
+	{1343,   0},
+	{1343,   0},
+	{ 0, 805},
+	{ 0, 794},
+	{ 0,   0}
+};
+
+static const SiS300_LVDSDesStruct  SiS300_PanelType0d_1[] =
+{
+	{1343, 798},
+	{1343, 794},
+	{1343, 798},
+	{1343, 794},
+	{1343,   0},
+	{1343,   0},
+	{ 0, 805},
+	{ 0, 794},
+	{ 0,   0}
+};
+
+static const SiS300_LVDSDesStruct  SiS300_PanelType0e_1[] =
+{
+	{1343, 798},
+	{1343, 794},
+	{1343, 798},
+	{1343, 794},
+	{1343,   0},  /* 640x480 */
+	{1343,   0},  /* 800x600 */
+	{ 0, 805},    /* 1024x768 */
+	{ 0, 794},    /* 1280x1024 */
+	{ 0,   0}     /* 1280x960 - not applicable */
+};
+
+static const SiS300_LVDSDesStruct  SiS300_PanelType0f_1[] =
+{
+	{1343, 798},
+	{1343, 794},
+	{1343, 798},
+	{1343, 794},
+	{1343,   0},
+	{1343,   0},
+	{ 0, 805},
+	{ 0, 794},
+	{ 0,   0}
+};
+
+static const SiS300_LVDSDesStruct  SiS300_PanelType00_2[] =
+{
+	{976, 527},
+	{976, 502},
+	{976, 527},
+	{976, 502},
+	{976, 567},
+	{ 0, 627},
+	{ 0, 627},
+	{ 0,   0},
+	{ 0,   0}
+};
+
+static const SiS300_LVDSDesStruct  SiS300_PanelType01_2[] =
+{
+	{1152, 622},
+	{1152, 597},
+	{1152, 622},
+	{1152, 597},
+	{1152, 662},
+	{1232, 722},
+	{ 0, 805},
+	{ 0, 794},
+	{ 0,   0}
+};
+
+static const SiS300_LVDSDesStruct  SiS300_PanelType02_2[] =
+{
+	{976, 527},
+	{976, 502},
+	{976, 527},
+	{976, 502},
+	{976, 567},
+	{ 0, 627},
+	{ 0, 627},
+	{ 0,   0},
+	{ 0,   0}
+};
+
+static const SiS300_LVDSDesStruct  SiS300_PanelType03_2[] =
+{
+	{1152, 622},
+	{1152, 597},
+	{1152, 622},
+	{1152, 597},
+	{1152, 662},
+	{1232, 722},
+	{   0, 805},
+	{1152, 622},
+	{1152, 597}
+};
+
+static const SiS300_LVDSDesStruct  SiS300_PanelType04_2[] =
+{
+	{1152, 622},
+	{1152, 597},
+	{1152, 622},
+	{1152, 597},
+	{1152, 662},
+	{1232, 722},
+	{   0, 805},
+	{   0, 794},
+	{   0,   0}
+};
+
+static const SiS300_LVDSDesStruct  SiS300_PanelType05_2[] =
+{
+	{1152, 622},
+	{1152, 597},
+	{1152, 622},
+	{1152, 597},
+	{1152, 662},
+	{1232, 722},
+	{   0, 805},
+	{   0, 794},
+	{   0,   0}
+};
+
+static const SiS300_LVDSDesStruct  SiS300_PanelType06_2[] =
+{
+	{1152, 622},
+	{1152, 597},
+	{1152, 622},
+	{1152, 597},
+	{1152, 662},
+	{1232, 722},
+	{   0, 805},
+	{   0, 794},
+	{   0,   0}
+};
+
+static const SiS300_LVDSDesStruct  SiS300_PanelType07_2[] =
+{
+ 	{1152, 622},
+ 	{1152, 597},
+ 	{1152, 622},
+ 	{1152, 597},
+ 	{1152, 662},
+ 	{1232, 722},
+	{   0, 805},
+	{   0, 794},
+	{   0,   0}
+};
+
+static const SiS300_LVDSDesStruct  SiS300_PanelType08_2[] =
+{
+ 	{976, 527},
+ 	{976, 502},
+ 	{976, 527},
+ 	{976, 502},
+ 	{976, 567},
+ 	{  0, 627},
+ 	{  0, 627},
+ 	{  0,   0},
+ 	{  0,   0}
+};
+
+static const SiS300_LVDSDesStruct  SiS300_PanelType09_2[] =
+{
+ 	{1152, 622},
+ 	{1152, 597},
+ 	{1152, 622},
+ 	{1152, 597},
+ 	{1152, 662},
+ 	{1232, 722},
+ 	{   0, 805},
+ 	{   0, 794},
+ 	{   0,   0}
+};
+
+static const SiS300_LVDSDesStruct  SiS300_PanelType0a_2[] =
+{
+ 	{976, 527},
+ 	{976, 502},
+ 	{976, 527},
+ 	{976, 502},
+ 	{976, 567},
+ 	{  0, 627},
+ 	{  0, 627},
+ 	{  0,   0},
+ 	{  0,   0}
+};
+
+static const SiS300_LVDSDesStruct  SiS300_PanelType0b_2[] =
+{
+ 	{ 1152, 700},
+ 	{ 1152, 675},
+ 	{ 1152, 700},
+ 	{ 1152, 675},
+ 	{ 1152, 740},
+ 	{ 1232, 799},
+ 	{    0, 799},
+ 	{    0,   0},
+ 	{    0,   0}
+};
+
+static const SiS300_LVDSDesStruct  SiS300_PanelType0c_2[] =
+{
+ 	{1152, 622},
+ 	{1152, 597},
+ 	{1152, 622},
+ 	{1152, 597},
+ 	{1152, 662},
+ 	{1232, 722},
+ 	{   0, 805},
+ 	{   0, 794},
+ 	{   0,   0}
+};
+
+static const SiS300_LVDSDesStruct  SiS300_PanelType0d_2[] =
+{
+ 	{1152, 622},
+ 	{1152, 597},
+ 	{1152, 622},
+ 	{1152, 597},
+ 	{1152, 662},
+ 	{1232, 722},
+ 	{   0, 805},
+ 	{   0, 794},
+ 	{   0,   0}
+};
+
+static const SiS300_LVDSDesStruct  SiS300_PanelType0e_2[] =
+{
+ 	{1152, 622},
+ 	{1152, 597},
+ 	{1152, 622},
+ 	{1152, 597},
+ 	{1152, 662},
+ 	{1232, 722},
+ 	{   0, 805},
+ 	{   0, 794},
+ 	{   0,   0}
+};
+
+static const SiS300_LVDSDesStruct  SiS300_PanelType0f_2[] =
+{
+ 	{1152, 622},
+ 	{1152, 597},
+ 	{1152, 622},
+ 	{1152, 597},
+ 	{1152, 662},
+ 	{1232, 722},
+ 	{   0, 805},
+ 	{   0, 794},
+ 	{   0,   0}
+};
+
+static const SiS300_LVDSDesStruct SiS300_PanelType1076_1[] =   /* TW: New */
+{
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0}
+};
+
+static const SiS300_LVDSDesStruct SiS300_PanelType1076_2[] =   /* TW: New */
+{
+	{ 1152, 622 },
+	{ 1152, 597 },
+	{ 1152, 622 },
+	{ 1152, 597 },
+	{ 1152, 622 },
+	{ 1232, 722 },
+	{    0, 0   },
+	{    0, 794 },
+	{    0, 0   }
+};
+
+static const SiS300_LVDSDesStruct SiS300_PanelType1210_1[] =   /* TW: New */
+{
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0}
+};
+
+static const SiS300_LVDSDesStruct SiS300_PanelType1210_2[] =   /* TW: New */
+{
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0}
+};
+
+static const SiS300_LVDSDesStruct SiS300_PanelType1296_1[] =   /* TW: New */
+{
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0}
+};
+
+static const SiS300_LVDSDesStruct SiS300_PanelType1296_2[] =   /* TW: New */
+{
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0}
+};
+
+
+/* TW: New */
+static const SiS300_LVDSDesStruct  SiS300_CHTVUNTSCDesData[] =
+{
+ 	{ 0,   0},
+ 	{ 0,   0},
+ 	{ 0,   0},
+ 	{ 0,   0},
+ 	{ 0,   0},
+ 	{ 0,   0}
+};
+
+static const SiS300_LVDSDesStruct  SiS300_CHTVONTSCDesData[] =
+{
+ 	{ 0,   0},
+ 	{ 0,   0},
+ 	{ 0,   0},
+ 	{ 0,   0},
+ 	{ 0,   0},
+ 	{ 0,   0}
+};
+
+static const SiS300_LVDSDesStruct  SiS300_CHTVUPALDesData[] =
+{
+ 	{256,   0},
+ 	{256,   0},
+ 	{256,   0},
+ 	{256,   0},
+ 	{  0,   0},
+ 	{  0,   0}
+};
+
+static const SiS300_LVDSDesStruct  SiS300_CHTVOPALDesData[] =
+{
+ 	{256,   0},
+ 	{256,   0},
+ 	{256,   0},
+ 	{256,   0},
+ 	{  0,   0},
+ 	{  0,   0}
+};
+/* TW: New end */
+
+/* TW: New for SiS300+301LV */
+typedef struct _SiS300_Part2PortTblStruct
+{
+ 	UCHAR CR[12];
+} SiS300_Part2PortTblStruct;
+
+static const SiS300_Part2PortTblStruct SiS300_CRT2Part2_1024x768_1[] =
+{ /* VESA Timing */
+ {{0x21,0x12,0xbf,0xe4,0xc0,0x21,0x45,0x09,0x00,0xa9,0x09,0x04}},
+ {{0x2c,0x12,0x9a,0xae,0x88,0x21,0x45,0x09,0x00,0xa9,0x09,0x04}},
+ {{0x21,0x12,0xbf,0xe4,0xc0,0x21,0x45,0x09,0x00,0xa9,0x09,0x04}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
+ {{0x22,0x13,0xfe,0x25,0xff,0x21,0x45,0x0a,0x00,0xa9,0x0d,0x04}},
+ {{0x22,0x13,0xfe,0x25,0xff,0x21,0x45,0x0a,0x00,0xa9,0x0d,0x04}},
+ {{0x22,0x13,0xfe,0x25,0xff,0x21,0x45,0x0a,0x00,0xa9,0x0d,0x04}}
+};
+
+static const SiS300_Part2PortTblStruct SiS300_CRT2Part2_1280x1024_1[] =
+{	/* TW: Temporary data, invalid */
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}
+};
+
+static const SiS300_Part2PortTblStruct SiS300_CRT2Part2_1400x1050_1[] =
+{	/* TW: Temporary data, invalid */
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}
+};
+
+static const SiS300_Part2PortTblStruct SiS300_CRT2Part2_1600x1200_1[] =
+{	/* TW: Temporary data, invalid */
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}
+};
+
+static const SiS300_Part2PortTblStruct SiS300_CRT2Part2_1024x768_2[] =
+{  /* Non-VESA */
+ {{0x28,0x12,0xa3,0xd0,0xaa,0x5a,0x45,0x0a,0x07,0xfa,0x0a,0x24}},
+ {{0x2c,0x12,0x9a,0xae,0x88,0x5a,0x45,0x0a,0x07,0xfa,0x0a,0x24}},
+ {{0x28,0x12,0xa3,0xd0,0xaa,0x5a,0x45,0x0a,0x07,0xfa,0x0a,0x24}},
+ {{0x2c,0x12,0x9a,0xae,0x88,0x5a,0x45,0x0a,0x07,0xfa,0x0a,0x24}},
+ {{0x28,0x13,0xe7,0x0b,0xe8,0x5a,0x45,0x0a,0x07,0xfa,0x0a,0x24}},
+ {{0x38,0x18,0x16,0x00,0x00,0x5a,0x45,0x0a,0x07,0xfa,0x0a,0x24}},
+ {{0x36,0x13,0x13,0x25,0xff,0x5a,0x45,0x0a,0x07,0xfa,0x0a,0x24}}
+};
+
+static const SiS300_Part2PortTblStruct SiS300_CRT2Part2_1280x1024_2[] =
+{
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}
+};
+
+static const SiS300_Part2PortTblStruct SiS300_CRT2Part2_1400x1050_2[] =
+{
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}
+};
+
+static const SiS300_Part2PortTblStruct SiS300_CRT2Part2_1600x1200_2[] =
+{	/* TW: Temporary data, invalid */
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}
+};
+
+static const SiS300_Part2PortTblStruct SiS300_CRT2Part2_1024x768_3[] =
+{	/* TW: Temporary data, invalid */
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}
+};
+
+static const SiS300_Part2PortTblStruct SiS300_CRT2Part2_1280x1024_3[] =
+{	/* TW: Temporary data, invalid */
+  {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}
+};
+
+static const SiS300_Part2PortTblStruct SiS300_CRT2Part2_1400x1050_3[] =
+{	/* TW: Temporary data, invalid */
+  {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}
+};
+
+static const SiS300_Part2PortTblStruct SiS300_CRT2Part2_1600x1200_3[] =
+{	/* TW: Temporary data, invalid */
+  {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}
+};
+
+typedef struct _SiS300_LVDSCRT1DataStruct
+{
+UCHAR CR[15];
+} SiS300_LVDSCRT1DataStruct;
+
+static const SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT1800x600_1[] =
+{
+	{{0x65,0x4f,0x89,0x56,0x83,0xaf,0x1f,
+	  0x90,0x85,0x8f,0xab,0x30,0x00,0x05,
+	  0x00 }},
+	{{0x65,0x4f,0x89,0x56,0x83,0x83,0x1f,
+	  0x5e,0x83,0x5d,0x79,0x10,0x00,0x05,
+	  0x00 }},
+	{{0x65,0x4f,0x89,0x56,0x83,0xaf,0x1f,
+	  0x90,0x85,0x8f,0xab,0x30,0x00,0x05,
+	  0x00 }},
+	{{0x65,0x4f,0x89,0x56,0x83,0x83,0x1f,
+	  0x5e,0x83,0x5d,0x79,0x10,0x00,0x05,
+	  0x00 }},
+	{{0x65,0x4f,0x89,0x56,0x83,0x04,0x3e,
+	  0xe0,0x85,0xdf,0xfb,0x10,0x00,0x05,
+	  0x00 }},
+	{{0x7f,0x63,0x83,0x6c,0x1c,0x72,0xf0,
+	  0x58,0x8c,0x57,0x73,0x20,0x00,0x06,
+	  0x01 }}
+};
+
+static const SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11024x768_1[] =
+{ 
+	{{0x64,0x4f,0x88,0x54,0x9f,0xc4,0x1f,
+	  0x92,0x89,0x8f,0xb5,0x30,0x00,0x01,
+	  0x00}},
+	{{0x64,0x4f,0x88,0x54,0x9f,0x97,0x1f,
+	  0x60,0x87,0x5d,0x83,0x10,0x00,0x01,
+	  0x00}},
+	{{0x64,0x4f,0x88,0x54,0x9f,0xc4,0x1f,
+	  0x92,0x89,0x8f,0xb5,0x30,0x00,0x01,
+	  0x00}},
+	{{0x64,0x4f,0x88,0x54,0x9f,0x97,0x1f,
+	  0x60,0x87,0x5d,0x83,0x10,0x00,0x01,
+	  0x00}},
+	{{0x64,0x4f,0x88,0x54,0x9f,0x04,0x3e,
+	  0xe2,0x89,0xdf,0x05,0x00,0x00,0x01,
+	  0x00}},
+	{{0x7e,0x63,0x82,0x68,0x15,0x7c,0xf0,
+	  0x5a,0x8f,0x57,0x7d,0x20,0x00,0x26,
+	  0x01}},
+	{{0xa3,0x7f,0x87,0x86,0x97,0x24,0xf5,
+	  0x02,0x88,0xff,0x25,0x10,0x00,0x02,
+	  0x01}}
+};
+
+static const SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11280x1024_1[] =
+{
+	{{0x63,0x4f,0x87,0x54,0x9f,0xb4,0x1f,
+	  0x92,0x89,0x8f,0xb5,0x30,0x00,0x01,
+	  0x00 }},
+	{{0x63,0x4f,0x87,0x54,0x9f,0x82,0x1f,
+	  0x60,0x87,0x5d,0x83,0x10,0x00,0x01,
+	  0x00 }},
+	{{0x63,0x4f,0x87,0x54,0x9f,0xb4,0x1f,
+	  0x92,0x89,0x8f,0xb5,0x30,0x00,0x01,
+	  0x00 }},
+	{{0x63,0x4f,0x87,0x54,0x9f,0x82,0x1f,
+	  0x60,0x87,0x5d,0x83,0x10,0x00,0x01,
+	  0x00 }},
+	{{0x63,0x4f,0x87,0x54,0x9f,0x04,0x3e,
+	  0xe2,0x89,0xdf,0x05,0x00,0x00,0x01,
+	  0x00 }},
+	{{0x7e,0x63,0x82,0x68,0x15,0x7c,0xf0,
+	  0x5a,0x8f,0x57,0x7d,0x20,0x00,0x26,
+	  0x01 }},
+	{{0xa3,0x7f,0x87,0x86,0x97,0x24,0xf5,
+	  0x02,0x88,0xff,0x25,0x10,0x00,0x02,
+	  0x01 }}
+};
+
+static const SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT1800x600_1_H[] =
+{
+	{{0x30,0x27,0x94,0x2c,0x92,0xaf,0x1f,
+	  0x90,0x85,0x8f,0xab,0x30,0x00,0x04,
+	  0x00 }},
+	{{0x30,0x27,0x94,0x2c,0x92,0x83,0x1f,
+	  0x5e,0x83,0x5d,0x79,0x10,0x00,0x04,
+	  0x00 }},
+	{{0x30,0x27,0x94,0x2c,0x92,0xaf,0x1f,
+	  0x90,0x85,0x8f,0xab,0x30,0x00,0x04,
+	  0x00 }},
+	{{0x30,0x27,0x94,0x2c,0x92,0x83,0x1f,
+	  0x5e,0x83,0x5d,0x79,0x10,0x00,0x04,
+	  0x00 }},
+	{{0x30,0x27,0x94,0x2c,0x92,0x04,0x3e,
+	  0xe0,0x85,0xdf,0xfb,0x10,0x00,0x04,
+	  0x00 }},
+	{{0x3d,0x31,0x81,0x37,0x1f,0x72,0xf0,
+	  0x58,0x8c,0x57,0x73,0x20,0x00,0x05,
+	  0x01 }}
+};
+
+static const SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11024x768_1_H[] =
+{
+	{{0x37,0x27,0x9B,0x2b,0x94,0xc4,0x1f,
+	  0x92,0x89,0x8f,0xb5,0x30,0x00,0x44,
+	  0x00 }},
+	{{0x37,0x27,0x9B,0x2b,0x94,0x97,0x1f,
+	  0x60,0x87,0x5D,0x83,0x01,0x00,0x44,
+	  0x00}},
+	{{0x37,0x27,0x9B,0x2b,0x94,0xc4,0x1f,
+	  0x92,0x89,0x8f,0xb5,0x30,0x00,0x44,
+	  0x00}},
+	{{0x37,0x27,0x9B,0x2b,0x94,0x97,0x1f,
+	  0x60,0x87,0x5D,0x83,0x01,0x00,0x44,
+	  0x00}},
+	{{0x37,0x27,0x9B,0x2b,0x94,0x04,0x3e,
+	  0xE2,0x89,0xDf,0x05,0x00,0x00,0x44,
+	  0x00}},
+	{{0x41,0x31,0x85,0x35,0x1d,0x7c,0xf0,
+	  0x5A,0x8F,0x57,0x7D,0x20,0x00,0x55,
+	  0x01}},
+	{{0x4f,0x3F,0x93,0x45,0x0D,0x24,0xf5,
+	  0x02,0x88,0xFf,0x25,0x10,0x00,0x01,
+	  0x01 }}
+};
+
+static const SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11280x1024_1_H[] =
+{
+	{{0x2f,0x27,0x93,0x2b,0x90,0xb4,0x1f,
+	  0x92,0x89,0x8f,0xb5,0x30,0x00,0x04,
+	  0x00 }},
+	{{0x2f,0x27,0x93,0x2b,0x90,0x82,0x1f,
+	  0x60,0x87,0x5d,0x83,0x10,0x00,0x04,
+	  0x00 }},
+	{{0x2f,0x27,0x93,0x2b,0x90,0xb4,0x1f,
+	  0x92,0x89,0x8f,0xb5,0x30,0x00,0x04,
+	  0x00 }},
+	{{0x2f,0x27,0x93,0x2b,0x90,0x82,0x1f,
+	  0x60,0x87,0x5d,0x83,0x10,0x00,0x04,
+	  0x00 }},
+	{{0x2f,0x27,0x93,0x2b,0x90,0x04,0x3e,
+	  0xe2,0x89,0xdf,0x05,0x00,0x00,0x04,
+	  0x00 }},
+	{{0x3c,0x31,0x80,0x35,0x1c,0x7c,0xf0,
+	  0x5a,0x8f,0x57,0x7d,0x20,0x00,0x55,
+	  0x01 }},
+	{{0x4f,0x3f,0x93,0x45,0x0d,0x24,0xf5,
+	  0x02,0x88,0xff,0x25,0x10,0x00,0x01,
+	  0x01 }}
+};
+
+static const SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT1800x600_2[] =
+{
+	{{0x7f,0x4f,0x83,0x62,0x12,0x72,0x3e,
+	  0xf4,0x88,0x8f,0x73,0x20,0x00,0x06,
+	  0x00 }},
+	{{0x7f,0x4f,0x83,0x62,0x12,0x72,0x3e,
+	  0xdb,0x8f,0x5d,0x73,0x20,0x00,0x06,
+	  0x00 }},
+	{{0x7f,0x4f,0x83,0x62,0x12,0x72,0x3e,
+	  0xf4,0x88,0x8f,0x73,0x20,0x00,0x06,
+	  0x00 }},
+	{{0x7f,0x4f,0x83,0x62,0x12,0x72,0x3e,
+	  0xdb,0x8f,0x5d,0x73,0x20,0x00,0x06,
+	  0x00 }},
+	{{0x7f,0x4f,0x83,0x62,0x12,0x72,0xba,
+	  0x1c,0x80,0xdf,0x73,0x00,0x00,0x06,
+	  0x00 }},
+	{{0x7f,0x63,0x83,0x6c,0x1c,0x72,0xf0,
+	  0x58,0x8c,0x57,0x73,0x20,0x00,0x06,
+	  0x01 }}
+};
+
+static const SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11024x768_2[] =
+{
+	{{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+	  0x4a,0x80,0x8f,0x25,0x30,0x00,0x06,
+	  0x00 }},
+	{{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+	  0x31,0x87,0x5d,0x25,0x30,0x00,0x06,
+	  0x00 }},
+	{{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+	  0x4a,0x80,0x8f,0x25,0x30,0x00,0x06,
+	  0x00 }},
+	{{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+	  0x31,0x87,0x5d,0x25,0x30,0x00,0x06,
+	  0x00 }},
+	{{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+	  0x72,0x88,0xdf,0x25,0x30,0x00,0x06,
+	  0x00 }},
+	{{0xa3,0x63,0x87,0x78,0x89,0x24,0xf1,
+	  0xae,0x84,0x57,0x25,0x30,0x00,0x02,
+	  0x01 }},
+	{{0xa3,0x7f,0x87,0x86,0x97,0x24,0xf5,
+	  0x02,0x88,0xff,0x25,0x10,0x00,0x02,
+	  0x01 }}
+};
+
+static const SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11280x1024_2[] =
+{
+	{{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+	  0x4a,0x80,0x8f,0x25,0x30,0x00,0x06,
+	  0x00 }},
+	{{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+	  0x31,0x87,0x5d,0x25,0x30,0x00,0x06,
+	  0x00 }},
+	{{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+	  0x4a,0x80,0x8f,0x25,0x30,0x00,0x06,
+	  0x00 }},
+	{{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+	  0x31,0x87,0x5d,0x25,0x30,0x00,0x06,
+	  0x00 }},
+	{{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+	  0x72,0x88,0xdf,0x25,0x30,0x00,0x06,
+	  0x00 }},
+	{{0xa3,0x63,0x87,0x78,0x89,0x24,0xf1,
+	  0xae,0x84,0x57,0x25,0x30,0x00,0x02,
+	  0x01 }},
+	{{0xa3,0x7f,0x87,0x86,0x97,0x24,0xf5,
+	  0x02,0x88,0xff,0x25,0x10,0x00,0x02,
+	  0x01 }}
+};
+
+static const SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT1800x600_2_H[] =
+{
+	{{0x3d,0x27,0x81,0x32,0x1a,0x72,0x3e,
+	  0xf4,0x88,0x8f,0x73,0x20,0x00,0x05,
+	  0x00 }},
+	{{0x3d,0x27,0x81,0x32,0x1a,0x72,0x3e,
+	  0xdb,0x8f,0x5d,0x73,0x20,0x00,0x05,
+	  0x00 }},
+	{{0x3d,0x27,0x81,0x32,0x1a,0x72,0x3e,
+	  0xf4,0x88,0x8f,0x73,0x20,0x00,0x05,
+	  0x00 }},
+	{{0x3d,0x27,0x81,0x3a,0x1a,0x72,0x3e,
+	  0xdb,0x8f,0x5d,0x73,0x20,0x00,0x05,
+	  0x00 }},
+	{{0x3d,0x27,0x81,0x32,0x1a,0x72,0xba,
+	  0x1c,0x80,0xdf,0x73,0x00,0x00,0x05,
+	  0x00 }},
+	{{0x3d,0x31,0x81,0x37,0x1f,0x72,0xf0,
+	  0x58,0x8c,0x57,0x73,0x20,0x00,0x05,
+	  0x01 }}
+};
+
+static const SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11024x768_2_H[] =
+{
+	{{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
+	  0x4a,0x80,0x8f,0x25,0x30,0x00,0x01,
+	  0x00 }},
+	{{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
+	  0x31,0x87,0x5d,0x25,0x30,0x00,0x01,
+	  0x00 }},
+	{{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
+	  0x4a,0x80,0x8f,0x25,0x30,0x00,0x01,
+	  0x00 }},
+	{{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
+	  0x31,0x87,0x5d,0x25,0x30,0x00,0x01,
+	  0x00 }},
+	{{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
+	  0x72,0x88,0xdf,0x25,0x30,0x00,0x01,
+	  0x00 }},
+	{{0x4f,0x31,0x93,0x3e,0x06,0x24,0xf1,
+	  0xae,0x84,0x57,0x25,0x30,0x00,0x01,
+	  0x01 }},
+	{{0x4f,0x3f,0x93,0x45,0x0d,0x24,0xf5,
+	  0x02,0x88,0xff,0x25,0x10,0x00,0x01,
+	  0x01 }}
+};
+
+static const SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11280x1024_2_H[] =
+{
+	{{0x4f,0x27,0x93,0x39,0x81,0x24,0xbb,
+	  0x4a,0x80,0x8f,0x25,0x30,0x00,0x01,
+	  0x00 }},
+	{{0x4f,0x27,0x93,0x39,0x81,0x24,0xbb,
+	  0x31,0x87,0x5d,0x25,0x30,0x00,0x01,
+	  0x00 }},
+	{{0x4f,0x27,0x93,0x39,0x81,0x24,0xbb,
+	  0x4a,0x80,0x8f,0x25,0x30,0x00,0x01,
+	  0x00 }},
+	{{0x4f,0x27,0x93,0x39,0x81,0x24,0xbb,
+	  0x31,0x87,0x5d,0x25,0x30,0x00,0x01,
+	  0x00 }},
+	{{0x4f,0x27,0x93,0x39,0x81,0x24,0xbb,
+	  0x72,0x88,0xdf,0x25,0x30,0x00,0x01,
+	  0x00 }},
+	{{0x4f,0x31,0x93,0x3e,0x86,0x24,0xf1,
+	  0xae,0x84,0x57,0x25,0x30,0x00,0x01,
+	  0x01 }},
+	{{0x4f,0x3f,0x93,0x45,0x0d,0x24,0xf5,
+	  0x02,0x88,0xff,0x25,0x10,0x00,0x01,
+	  0x01}}
+};
+
+static const SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11024x600_1[] =
+{
+        {{0x64,0x4f,0x88,0x54,0x9f,0x5a,0x3e,
+	  0xe8,0x8f,0x8f,0x5b,0x00,0x00,0x01,
+	  0x00}},
+        {{0x64,0x4f,0x88,0x54,0x9f,0x2e,0x3e,
+	  0xb9,0x80,0x5d,0x2f,0x00,0x00,0x01,
+	  0x00}},
+        {{0x64,0x4f,0x88,0x54,0x9f,0x5a,0x3e,
+	  0xe8,0x8f,0x8f,0x5b,0x00,0x00,0x01,
+	  0x00}},
+        {{0x64,0x4f,0x88,0x54,0x9f,0x2e,0x3e,
+	  0xb9,0x80,0x5d,0x2f,0x00,0x00,0x01,
+	  0x00}},
+        {{0x64,0x4f,0x88,0x54,0x9f,0xaf,0xba,
+	  0x3b,0x82,0xdf,0xb0,0x00,0x00,0x01,
+	  0x00}},
+        {{0x7e,0x63,0x82,0x68,0x15,0x1e,0xf1,
+	  0xae,0x85,0x57,0x1f,0x30,0x00,0x26,
+	  0x01}},
+        {{0xa3,0x7f,0x87,0x86,0x97,0x1e,0xf1,
+	  0xae,0x85,0x57,0x1f,0x30,0x00,0x02,
+	  0x01}}
+};
+
+static const SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11024x600_1_H[] =
+{
+        {{0x2f,0x27,0x93,0x2b,0x90,0xc4,0x1f,
+	  0x92,0x89,0x8f,0xb5,0x30,0x00,0x44,
+	  0x00}},
+        {{0x2f,0x27,0x93,0x2b,0x90,0x97,0x1f,
+	  0x60,0x87,0x5d,0x83,0x10,0x00,0x44,
+          0x00}},
+        {{0x2f,0x27,0x93,0x2b,0x90,0xc4,0x1f,
+	  0x92,0x89,0x8f,0xb5,0x30,0x00,0x44,
+	  0x00}},
+        {{0x2f,0x27,0x93,0x2b,0x90,0x97,0x1f,
+	  0x60,0x87,0x5d,0x83,0x10,0x00,0x44,
+	  0x00}},
+        {{0x2f,0x27,0x93,0x2b,0x90,0x04,0x3e,
+	  0xe2,0x89,0xdf,0x05,0x00,0x00,0x44,
+	  0x00}},
+        {{0x3c,0x31,0x80,0x35,0x1c,0x7c,0xf0,
+	  0x5a,0x8f,0x57,0x7d,0x20,0x00,0x55,
+	  0x01}},
+        {{0x4f,0x3f,0x93,0x45,0x0d,0x24,0xf5,
+	  0x02,0x88,0xff,0x25,0x10,0x00,0x01,
+	  0x01}}
+};
+
+static const SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11024x600_2[] =
+{
+        {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+	  0x4a,0x80,0x8f,0x25,0x30,0x00,0x06,
+	  0x00}},
+        {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+	  0x31,0x87,0x5d,0x25,0x30,0x00,0x06,
+	  0x00}},
+        {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+	  0x4a,0x80,0x8f,0x25,0x30,0x00,0x06,
+	  0x00}},
+        {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+          0x31,0x87,0x5d,0x25,0x30,0x00,0x06,
+	  0x00}},
+        {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+	  0x72,0x88,0xdf,0x25,0x30,0x00,0x06,
+	  0x00}},
+        {{0xa3,0x63,0x87,0x78,0x89,0x24,0xf1,
+	  0xae,0x84,0x57,0x25,0x30,0x00,0x02,
+	  0x01}},
+        {{0xa3,0x7f,0x87,0x86,0x97,0x24,0xf5,
+	  0x02,0x88,0xff,0x25,0x10,0x00,0x02,
+	  0x01}}
+};
+
+static const SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11024x600_2_H[] =
+{
+        {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
+	  0x4a,0x80,0x8f,0x25,0x30,0x00,0x01,
+	  0x00}},
+        {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
+	  0x31,0x87,0x5d,0x25,0x30,0x00,0x01,
+	  0x00}},
+        {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
+	  0x4a,0x80,0x8f,0x25,0x30,0x00,0x01,
+	  0x00}},
+        {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
+	  0x31,0x87,0x5d,0x25,0x30,0x00,0x01,
+	  0x00}},
+        {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
+	  0x72,0x88,0xdf,0x25,0x30,0x00,0x01,
+	  0x00}},
+        {{0x4f,0x31,0x93,0x3e,0x06,0x24,0xf1,
+	  0xae,0x84,0x57,0x25,0x30,0x00,0x01,
+	  0x01}},
+        {{0x4f,0x3f,0x93,0x45,0x0d,0x24,0xf5,
+	  0x02,0x88,0xff,0x25,0x10,0x00,0x01,
+	  0x01}}
+};
+
+static const SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11152x768_1[] =
+{
+        {{0x64,0x4f,0x88,0x54,0x9f,0xc4,0x1f,
+	  0x92,0x89,0x8f,0xb5,0x30,0x00,0x01,
+	  0x00}},
+        {{0x64,0x4f,0x88,0x54,0x9f,0x97,0x1f,
+	  0x60,0x87,0x5d,0x83,0x10,0x00,0x01,
+	  0x00}},
+        {{0x64,0x4f,0x88,0x54,0x9f,0xc4,0x1f,
+	  0x92,0x89,0x8f,0xb5,0x30,0x00,0x01,
+	  0x00}},
+        {{0x64,0x4f,0x88,0x54,0x9f,0x97,0x1f,
+	  0x60,0x87,0x5d,0x83,0x10,0x00,0x01,
+	  0x00}},
+        {{0x64,0x4f,0x88,0x54,0x9f,0x04,0x3e,
+	  0xe2,0x89,0xdf,0x05,0x00,0x00,0x01,
+	  0x00}},
+        {{0x7e,0x63,0x82,0x68,0x15,0x7c,0xf0,
+	  0x5a,0x8f,0x57,0x7d,0x20,0x00,0x26,
+	  0x01}},
+        {{0xa3,0x7f,0x87,0x86,0x97,0x24,0xf5,
+	  0x02,0x88,0xff,0x25,0x10,0x00,0x02,
+	  0x01}}
+};
+
+static const SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11152x768_1_H[] =
+{
+        {{0x2f,0x27,0x93,0x2b,0x90,0xc4,0x1f,
+	  0x92,0x89,0x8f,0xb5,0x30,0x00,0x44,
+	  0x00}},
+        {{0x2f,0x27,0x93,0x2b,0x90,0x97,0x1f,
+	  0x60,0x87,0x5d,0x83,0x10,0x00,0x44,
+	  0x00}},
+        {{0x2f,0x27,0x93,0x2b,0x90,0xc4,0x1f,
+	  0x92,0x89,0x8f,0xb5,0x30,0x00,0x44,
+	  0x00}},
+        {{0x2f,0x27,0x93,0x2b,0x90,0x97,0x1f,
+	  0x60,0x87,0x5d,0x83,0x10,0x00,0x44,
+	  0x00}},
+        {{0x2f,0x27,0x93,0x2b,0x90,0x04,0x3e,
+	  0xe2,0x89,0xdf,0x05,0x00,0x00,0x44,
+	  0x00}},
+        {{0x3c,0x31,0x80,0x35,0x1c,0x7c,0xf0,
+	  0x5a,0x8f,0x57,0x7d,0x20,0x00,0x55,
+	  0x01}},
+        {{0x4f,0x3f,0x93,0x45,0x0d,0x24,0xf5,
+	  0x02,0x88,0xff,0x25,0x10,0x00,0x01,
+	  0x01}}
+};
+
+static const SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11152x768_2[] =
+{
+        {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+	  0x4a,0x80,0x8f,0x25,0x30,0x00,0x06,
+	  0x00}},
+        {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+	  0x31,0x87,0x5d,0x25,0x30,0x00,0x06,
+	  0x00}},
+        {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+	  0x4a,0x80,0x8f,0x25,0x30,0x00,0x06,
+	  0x00}},
+        {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+	  0x31,0x87,0x5d,0x25,0x30,0x00,0x06,
+	  0x00}},
+        {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+	  0x72,0x88,0xdf,0x25,0x30,0x00,0x06,
+	  0x00}},
+        {{0xa3,0x63,0x87,0x78,0x89,0x24,0xf1,
+	  0xae,0x84,0x57,0x25,0x30,0x00,0x02,
+	  0x01}},
+        {{0xa3,0x7f,0x87,0x86,0x97,0x24,0xf5,
+	  0x02,0x88,0xff,0x25,0x10,0x00,0x02,
+	  0x01}}
+};
+
+static const SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11152x768_2_H[] =
+{
+        {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
+	  0x4a,0x80,0x8f,0x25,0x30,0x00,0x01,
+	  0x00}},
+        {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
+	  0x31,0x87,0x5d,0x25,0x30,0x00,0x01,
+	  0x00}},
+        {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
+	  0x4a,0x80,0x8f,0x25,0x30,0x00,0x01,
+	  0x00}},
+        {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
+	  0x31,0x87,0x5d,0x25,0x30,0x00,0x01,
+	  0x00}},
+        {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
+	  0x72,0x88,0xdf,0x25,0x30,0x00,0x01,
+	  0x00}},
+        {{0x4f,0x31,0x93,0x3e,0x06,0x24,0xf1,
+	  0xae,0x84,0x57,0x25,0x30,0x00,0x01,
+	  0x01}},
+        {{0x4f,0x3f,0x93,0x45,0x0d,0x24,0xf5,
+	  0x02,0x88,0xff,0x25,0x10,0x00,0x01,
+	  0x01}}
+};
+
+/* TW: New */
+static const SiS300_LVDSCRT1DataStruct  SiS300_CHTVCRT1UNTSC[] =
+{
+	{{0x64,0x4f,0x88,0x56,0x9f,0x56,0x3e,
+	  0xe8,0x84,0x8f,0x57,0x20,0x00,0x01,
+	  0x00 }},
+	{{0x64,0x4f,0x88,0x56,0x9f,0x56,0x3e,
+	  0xd0,0x82,0x5d,0x57,0x00,0x00,0x01,
+	  0x00 }},
+	{{0x64,0x4f,0x88,0x56,0x9f,0x56,0x3e,
+	  0xe8,0x84,0x8f,0x57,0x20,0x00,0x01,
+	  0x00 }},
+	{{0x64,0x4f,0x88,0x56,0x9f,0x56,0x3e,
+	  0xd0,0x82,0x5d,0x57,0x00,0x00,0x01,
+	  0x00 }},
+	{{0x5d,0x4f,0x81,0x53,0x9c,0x56,0xba,
+	  0x18,0x84,0xdf,0x57,0x00,0x00,0x01,
+	  0x00 }},
+	{{0x80,0x63,0x84,0x6c,0x17,0xec,0xf0,
+	  0x90,0x8c,0x57,0xed,0x20,0x00,0x06,
+	  0x01 }}
+};
+
+static const SiS300_LVDSCRT1DataStruct  SiS300_CHTVCRT1ONTSC[] =
+{
+	{{0x64,0x4f,0x88,0x5a,0x9f,0x0b,0x3e,
+	  0xc0,0x84,0x8f,0x0c,0x20,0x00,0x01,
+	  0x00 }},
+	{{0x64,0x4f,0x88,0x5a,0x9f,0x0b,0x3e,
+	  0xb0,0x8d,0x5d,0x0c,0x00,0x00,0x01,
+	  0x00 }},
+	{{0x64,0x4f,0x88,0x5a,0x9f,0x0b,0x3e,
+	  0xc0,0x84,0x8f,0x0c,0x20,0x00,0x01,
+	  0x00 }},
+	{{0x64,0x4f,0x88,0x5a,0x9f,0x0b,0x3e,
+	  0xb0,0x8d,0x5d,0x0c,0x00,0x00,0x01,
+	  0x00 }},
+	{{0x5d,0x4f,0x81,0x56,0x9c,0x0b,0x3e,
+	  0xe8,0x84,0xdf,0x0c,0x00,0x00,0x01,
+	  0x00 }},
+	{{0x7d,0x63,0x81,0x6a,0x16,0xba,0xf0,
+	  0x7f,0x86,0x57,0xbb,0x00,0x00,0x06,
+	  0x01 }}
+};
+
+static const SiS300_LVDSCRT1DataStruct  SiS300_CHTVCRT1UPAL[] =
+{
+	{{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+	  0xf8,0x83,0x8f,0x70,0x20,0x00,0x05,
+	  0x00 }},
+	{{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+	  0xde,0x81,0x5d,0x70,0x00,0x00,0x05,
+	  0x00 }},
+	{{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+	  0xf8,0x83,0x8f,0x70,0x20,0x00,0x05,
+	  0x00 }},
+	{{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+	  0xde,0x81,0x5d,0x70,0x00,0x00,0x05,
+	  0x00 }},
+	{{0x64,0x4f,0x88,0x55,0x80,0xec,0xba,
+	  0x50,0x84,0xdf,0xed,0x00,0x00,0x05,
+	  0x00 }},
+	{{0x70,0x63,0x94,0x68,0x8d,0x42,0xf1,
+	  0xc8,0x8c,0x57,0xe9,0x20,0x00,0x05,
+	  0x01 }}
+};
+
+static const SiS300_LVDSCRT1DataStruct  SiS300_CHTVCRT1OPAL[] =
+{
+	{{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+	  0xf0,0x83,0x8f,0x70,0x20,0x00,0x05,
+	  0x00 }},
+	{{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+	  0xde,0x81,0x5d,0x70,0x00,0x00,0x05,
+	  0x00 }},
+	{{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+	  0xf0,0x83,0x8f,0x70,0x20,0x00,0x05,
+	  0x00 }},
+	{{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+	  0xde,0x81,0x5d,0x70,0x00,0x00,0x05,
+	  0x00 }},
+	{{0x64,0x4f,0x88,0x55,0x80,0x6f,0xba,
+	  0x20,0x83,0xdf,0x70,0x00,0x00,0x05,
+	  0x00 }},
+	{{0x73,0x63,0x97,0x69,0x8e,0xec,0xf0,
+	  0x90,0x8c,0x57,0xed,0x20,0x00,0x05,
+	  0x01 }}
+};
+
+static const SiS300_LVDSCRT1DataStruct  SiS300_CHTVCRT1SOPAL[] =
+{
+	{{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+	  0xf0,0x83,0x8f,0x70,0x20,0x00,0x05,
+	  0x00 }},
+	{{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+	  0xde,0x81,0x5d,0x70,0x00,0x00,0x05,
+	  0x00 }},
+	{{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+	  0xf0,0x83,0x8f,0x70,0x20,0x00,0x05,
+	  0x00 }},
+	{{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+	  0xde,0x81,0x5d,0x70,0x00,0x00,0x05,
+	  0x00 }},
+	{{0x64,0x4f,0x88,0x55,0x80,0x6f,0xba,  /* TODO */
+	  0x20,0x83,0xdf,0x70,0x00,0x00,0x05,
+	  0x00 }},
+	{{0x73,0x63,0x97,0x69,0x8e,0xec,0xf0,  /* TODO */
+	  0x90,0x8c,0x57,0xed,0x20,0x00,0x05,
+	  0x01 }}
+};
+/* TW: New end */
+
+/* TW: New */
+typedef struct _SiS300_CHTVRegDataStruct
+{
+	UCHAR Reg[16];
+} SiS300_CHTVRegDataStruct;
+
+static const SiS300_CHTVRegDataStruct SiS300_CHTVReg_UNTSC[] =
+{
+	{{0x4a,0x94,0x00,0x48,0xfe,0,0,0,0,0,0,0,0,0,0,0}},
+	{{0x4a,0x94,0x00,0x48,0xfe,0,0,0,0,0,0,0,0,0,0,0}},
+	{{0x4a,0x94,0x00,0x48,0xfe,0,0,0,0,0,0,0,0,0,0,0}},
+	{{0x4a,0x94,0x00,0x48,0xfe,0,0,0,0,0,0,0,0,0,0,0}},
+	{{0x6a,0x6a,0x00,0x2d,0xfa,0,0,0,0,0,0,0,0,0,0,0}}, /* Mode 17: 640x480 NTSC 7/8  */
+	{{0x8d,0xc4,0x00,0x3b,0xfb,0,0,0,0,0,0,0,0,0,0,0}}  /* Mode 24: 800x600 NTSC 7/10 */
+};
+
+static const SiS300_CHTVRegDataStruct SiS300_CHTVReg_ONTSC[] =
+{
+	{{0x49,0x94,0x00,0x34,0xfe,0,0,0,0,0,0,0,0,0,0,0}},
+	{{0x49,0x94,0x00,0x34,0xfe,0,0,0,0,0,0,0,0,0,0,0}},
+	{{0x49,0x94,0x00,0x34,0xfe,0,0,0,0,0,0,0,0,0,0,0}},
+	{{0x49,0x94,0x00,0x34,0xfe,0,0,0,0,0,0,0,0,0,0,0}},
+	{{0x69,0x6a,0x00,0x1e,0xfd,0,0,0,0,0,0,0,0,0,0,0}}, /* Mode 16: 640x480 NTSC 1/1 */
+	{{0x8c,0xb4,0x00,0x32,0xf9,0,0,0,0,0,0,0,0,0,0,0}}  /* Mode 23: 800x600 NTSC 3/4 */
+};
+
+static const SiS300_CHTVRegDataStruct SiS300_CHTVReg_UPAL[] =
+{
+	{{0x41,0x12,0x01,0x50,0x34,0,0,0,0,0,0,0,0,0,0,0}},
+	{{0x41,0x12,0x00,0x50,0x00,0,0,0,0,0,0,0,0,0,0,0}},
+	{{0x41,0x12,0x01,0x50,0x34,0,0,0,0,0,0,0,0,0,0,0}},
+	{{0x41,0x12,0x00,0x50,0x00,0,0,0,0,0,0,0,0,0,0,0}},
+	{{0x63,0x94,0x01,0x50,0x30,0,0,0,0,0,0,0,0,0,0,0}}, /* Mode 15: 640x480 PAL 5/6 */
+	{{0x84,0x64,0x01,0x4e,0x2f,0,0,0,0,0,0,0,0,0,0,0}}  /* Mode 21: 800x600 PAL 3/4 */
+
+};
+
+static const SiS300_CHTVRegDataStruct SiS300_CHTVReg_OPAL[] =
+{
+	{{0x41,0x12,0x01,0x50,0x34,0,0,0,0,0,0,0,0,0,0,0}}, /* Mode 9: 640x400 PAL 1/1 */
+	{{0x41,0x12,0x00,0x50,0x00,0,0,0,0,0,0,0,0,0,0,0}},
+	{{0x41,0x12,0x01,0x50,0x34,0,0,0,0,0,0,0,0,0,0,0}},
+	{{0x41,0x12,0x00,0x50,0x00,0,0,0,0,0,0,0,0,0,0,0}},
+	{{0x61,0x94,0x01,0x36,0x30,0,0,0,0,0,0,0,0,0,0,0}}, /* Mode 14: 640x480 PAL 1/1 */
+	{{0x83,0x76,0x01,0x40,0x31,0,0,0,0,0,0,0,0,0,0,0}}  /* Mode 20: 800x600 PAL 5/6 */
+
+};
+
+static const SiS300_CHTVRegDataStruct SiS300_CHTVReg_SOPAL[] =
+{
+	{{0x41,0x12,0x01,0x50,0x34,0,0,0,0,0,0,0,0,0,0,0}}, /* Mode 9: 640x400 PAL 5/4 */
+	{{0x41,0x12,0x00,0x50,0x00,0,0,0,0,0,0,0,0,0,0,0}},
+	{{0x41,0x12,0x01,0x50,0x34,0,0,0,0,0,0,0,0,0,0,0}},
+	{{0x41,0x12,0x00,0x50,0x00,0,0,0,0,0,0,0,0,0,0,0}},
+	{{0x60,0x30,0x00,0x10,0x00,0,0,0,0,0,0,0,0,0,0,0}}, /* TW: Mode 13: 640x480 PAL 5/4 */
+	{{0x81,0x50,0x00,0x1b,0x00,0,0,0,0,0,0,0,0,0,0,0}}  /* TW: Mode 19: 800x600 PAL 1/1 */
+};
+/* TW: New end */
+
+/* TW: New */
+static const UCHAR SiS300_CHTVVCLKUNTSC[]  = {0x29,0x29,0x29,0x29,0x2a,0x2e};
+
+static const UCHAR SiS300_CHTVVCLKONTSC[]  = {0x2c,0x2c,0x2c,0x2c,0x2d,0x2b};
+
+static const UCHAR SiS300_CHTVVCLKSONTSC[] = {0x2c,0x2c,0x2c,0x2c,0x2d,0x2b};
+
+static const UCHAR SiS300_CHTVVCLKUPAL[]   = {0x2f,0x2f,0x2f,0x2f,0x2f,0x31};
+
+static const UCHAR SiS300_CHTVVCLKOPAL[]   = {0x2f,0x2f,0x2f,0x2f,0x30,0x32};
+
+static const UCHAR SiS300_CHTVVCLKSOPAL[]  = {0x2f,0x2f,0x2f,0x2f,0x36,0x29};
+/* TW: New end */
+
+
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/sis/310vtbl.h b/xc/programs/Xserver/hw/xfree86/drivers/sis/310vtbl.h
new file mode 100644
index 000000000..5bb9d772a
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/sis/310vtbl.h
@@ -0,0 +1,4673 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/310vtbl.h,v 1.5 2003/02/10 01:14:16 tsi Exp $ */
+
+
+/* Register settings for SiS 310/325 series */
+
+
+typedef struct _SiS310_StStruct
+{
+	UCHAR St_ModeID;
+	USHORT St_ModeFlag;
+	UCHAR St_StTableIndex;
+	UCHAR St_CRT2CRTC;
+	UCHAR St_ResInfo;
+	UCHAR VB_StTVFlickerIndex;
+	UCHAR VB_StTVEdgeIndex;
+	UCHAR VB_StTVYFilterIndex;
+} SiS310_StStruct;
+
+static const SiS310_StStruct SiS310_SModeIDTable[]=
+{
+	{0x01,0x9208,0x01,0x00,0x00,0x00,0x01,0x00},
+	{0x01,0x1210,0x14,0x01,0x01,0x00,0x01,0x00},
+	{0x01,0x1010,0x17,0x02,0x02,0x00,0x01,0x01},
+	{0x03,0x8208,0x03,0x00,0x00,0x00,0x01,0x02},
+	{0x03,0x0210,0x16,0x01,0x01,0x00,0x01,0x02},
+	{0x03,0x0010,0x18,0x02,0x02,0x00,0x01,0x03},
+	{0x05,0x9209,0x05,0x00,0x00,0x00,0x00,0x04},
+	{0x06,0x8209,0x06,0x00,0x00,0x00,0x00,0x05},
+	{0x07,0x0000,0x07,0x03,0x03,0x00,0x01,0x03},
+	{0x07,0x0000,0x19,0x02,0x02,0x00,0x01,0x03},
+	{0x0d,0x920a,0x0d,0x00,0x00,0x00,0x00,0x04},
+	{0x0e,0x820a,0x0e,0x00,0x00,0x00,0x00,0x05},
+	{0x0f,0x0202,0x11,0x01,0x01,0x00,0x00,0x05},
+	{0x10,0x0212,0x12,0x01,0x01,0x00,0x00,0x05},
+	{0x11,0x0212,0x1a,0x04,0x04,0x00,0x00,0x05},
+	{0x12,0x0212,0x1b,0x04,0x04,0x00,0x00,0x05},
+	{0x13,0x021b,0x1c,0x00,0x00,0x00,0x00,0x04},
+	{0x12,0x0010,0x18,0x02,0x02,0x00,0x00,0x05},
+	{0x12,0x0210,0x18,0x01,0x01,0x00,0x00,0x05},
+	{0xff,0x0000,0x00,0x00,0x00,0x00,0x00,0x00}
+};
+
+typedef struct _SiS310_StandTableStruct
+{
+	UCHAR CRT_COLS;
+	UCHAR ROWS;
+	UCHAR CHAR_HEIGHT;
+	USHORT CRT_LEN;
+	UCHAR SR[4];
+	UCHAR MISC;
+	UCHAR CRTC[0x19];
+	UCHAR ATTR[0x14];
+	UCHAR GRC[9];
+} SiS310_StandTableStruct;
+
+static const SiS310_StandTableStruct SiS310_StandTable[]=
+{
+/* MD_0_200 */
+ {
+  0x28,0x18,0x08,0x0800,
+  {0x09,0x03,0x00,0x02},
+  0x63,
+  {0x2d,0x27,0x28,0x90,0x2b,0xa0,0xbf,0x1f,
+   0x00,0xc7,0x06,0x07,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x14,0x1f,0x96,0xb9,0xa3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
+   0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,
+   0x08,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
+   0xff}
+ },
+/* MD_1_200 */
+ {
+  0x28,0x18,0x08,0x0800,
+  {0x09,0x03,0x00,0x02},
+  0x63,
+  {0x2d,0x27,0x28,0x90,0x2b,0xa0,0xbf,0x1f,
+   0x00,0xc7,0x06,0x07,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x14,0x1f,0x96,0xb9,0xa3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
+   0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,
+   0x08,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
+   0xff}
+ },
+/* MD_2_200 */
+ {
+  0x50,0x18,0x08,0x1000,
+  {0x01,0x03,0x00,0x02},
+  0x63,
+  {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
+   0x00,0xc7,0x06,0x07,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x28,0x1f,0x96,0xb9,0xa3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
+   0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,
+   0x08,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
+   0xff}
+ },
+/* MD_3_200 */
+ {
+  0x50,0x18,0x08,0x1000,
+  {0x01,0x03,0x00,0x02},
+  0x63,
+  {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
+   0x00,0xc7,0x06,0x07,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x28,0x1f,0x96,0xb9,0xa3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
+   0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,
+   0x08,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
+   0xff}
+ },
+/* MD_4 */
+ {
+  0x28,0x18,0x08,0x4000,
+  {0x09,0x03,0x00,0x02},
+  0x63,
+  {0x2d,0x27,0x28,0x90,0x2c,0x80,0xbf,0x1f,
+   0x00,0xc1,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x14,0x00,0x96,0xb9,0xa2,
+   0xff},
+  {0x00,0x13,0x15,0x17,0x02,0x04,0x06,0x07,
+   0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,
+   0x01,0x00,0x03,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x30,0x0f,0x00,
+   0xff}
+ },
+/* MD_5 */
+ {
+  0x28,0x18,0x08,0x4000,
+  {0x09,0x03,0x00,0x02},
+  0x63,
+  {0x2d,0x27,0x28,0x90,0x2c,0x80,0xbf,0x1f,
+   0x00,0xc1,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x14,0x00,0x96,0xb9,0xa2,
+   0xff},
+  {0x00,0x13,0x15,0x17,0x02,0x04,0x06,0x07,
+   0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,
+   0x01,0x00,0x03,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x30,0x0f,0x00,
+   0xff}
+ },
+/* MD_6 */
+ {
+  0x50,0x18,0x08,0x4000,
+  {0x01,0x01,0x00,0x06},
+  0x63,
+  {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
+   0x00,0xc1,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x28,0x00,0x96,0xb9,0xc2,
+   0xff},
+  {0x00,0x17,0x17,0x17,0x17,0x17,0x17,0x17,
+   0x17,0x17,0x17,0x17,0x17,0x17,0x17,0x17,
+   0x01,0x00,0x01,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x00,0x0d,0x00,
+   0xff}
+ },
+/* MD_7 */
+ {
+  0x50,0x18,0x0e,0x1000,
+  {0x00,0x03,0x00,0x03},
+  0xa6,
+  {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
+   0x00,0x4d,0x0b,0x0c,0x00,0x00,0x00,0x00,
+   0x83,0x85,0x5d,0x28,0x0d,0x63,0xba,0xa3,
+   0xff},
+  {0x00,0x08,0x08,0x08,0x08,0x08,0x08,0x08,
+   0x10,0x18,0x18,0x18,0x18,0x18,0x18,0x18,
+   0x0e,0x00,0x0f,0x08},
+  {0x00,0x00,0x00,0x00,0x00,0x10,0x0a,0x00,
+   0xff}
+ },
+/* MDA_DAC */
+ {
+  0x00,0x00,0x00,0x0000,
+  {0x00,0x00,0x00,0x15},
+  0x15,
+  {0x15,0x15,0x15,0x15,0x15,0x15,0x15,0x15,
+   0x15,0x15,0x15,0x15,0x15,0x15,0x3f,0x3f,
+   0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,0x00,0x00,
+   0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x15,0x15,0x15,
+   0x15,0x15,0x15,0x15,0x15,0x15,0x15,0x15,
+   0x15,0x15,0x15,0x15},
+  {0x15,0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,
+   0x3f}
+ },
+/* CGA_DAC */
+ {
+  0x00,0x10,0x04,0x0114,
+  {0x11,0x09,0x15,0x00},
+  0x10,
+  {0x04,0x14,0x01,0x11,0x09,0x15,0x2a,0x3a,
+   0x2e,0x3e,0x2b,0x3b,0x2f,0x3f,0x2a,0x3a,
+   0x2e,0x3e,0x2b,0x3b,0x2f,0x3f,0x00,0x10,
+   0x04},
+  {0x14,0x01,0x11,0x09,0x15,0x00,0x10,0x04,
+   0x14,0x01,0x11,0x09,0x15,0x2a,0x3a,0x2e,
+   0x3e,0x2b,0x3b,0x2f},
+  {0x3f,0x2a,0x3a,0x2e,0x3e,0x2b,0x3b,0x2f,
+   0x3f}
+ },
+/* EGA_DAC */
+ {
+  0x00,0x10,0x04,0x0114,
+  {0x11,0x05,0x15,0x20},
+  0x30,
+  {0x24,0x34,0x21,0x31,0x25,0x35,0x08,0x18,
+   0x0c,0x1c,0x09,0x19,0x0d,0x1d,0x28,0x38,
+   0x2c,0x3c,0x29,0x39,0x2d,0x3d,0x02,0x12,
+   0x06},
+  {0x16,0x03,0x13,0x07,0x17,0x22,0x32,0x26,
+   0x36,0x23,0x33,0x27,0x37,0x0a,0x1a,0x0e,
+   0x1e,0x0b,0x1b,0x0f},
+  {0x1f,0x2a,0x3a,0x2e,0x3e,0x2b,0x3b,0x2f,
+   0x3f}
+ },
+/* VGA_DAC */
+ {
+  0x00,0x10,0x04,0x0114,
+  {0x11,0x09,0x15,0x2a},
+  0x3a,
+  {0x2e,0x3e,0x2b,0x3b,0x2f,0x3f,0x00,0x05,
+   0x08,0x0b,0x0e,0x11,0x14,0x18,0x1c,0x20,
+   0x24,0x28,0x2d,0x32,0x38,0x3f,0x00,0x10,
+   0x1f},
+  {0x2f,0x3f,0x1f,0x27,0x2f,0x37,0x3f,0x2d,
+   0x31,0x36,0x3a,0x3f,0x00,0x07,0x0e,0x15,
+   0x1c,0x0e,0x11,0x15},
+  {0x18,0x1c,0x14,0x16,0x18,0x1a,0x1c,0x00,
+   0x04}
+ },
+ {
+  0x08,0x0c,0x10,0x0a08,
+  {0x0c,0x0e,0x10,0x0b},
+  0x0c,
+  {0x0d,0x0f,0x10,0x10,0x01,0x08,0x00,0x00,
+   0x00,0x00,0x01,0x00,0x02,0x02,0x01,0x00,
+   0x04,0x04,0x01,0x00,0x05,0x02,0x05,0x00,
+   0x06},
+  {0x01,0x06,0x05,0x06,0x00,0x08,0x01,0x08,
+   0x00,0x07,0x02,0x07,0x06,0x07,0x00,0x00,
+   0x00,0x00,0x00,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}
+ },
+/* MD_D */
+ {
+  0x28,0x18,0x08,0x2000,
+  {0x09,0x0f,0x00,0x06},
+  0x63,
+  {0x2d,0x27,0x28,0x90,0x2c,0x80,0xbf,0x1f,
+   0x00,0xc0,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x14,0x00,0x96,0xb9,0xe3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
+   0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,
+   0x01,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,
+   0xff}
+ },
+/* MD_E */
+ {
+  0x50,0x18,0x08,0x4000,
+  {0x01,0x0f,0x00,0x06},
+  0x63,
+  {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
+   0x00,0xc0,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x28,0x00,0x96,0xb9,0xe3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
+   0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,
+   0x01,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,
+   0xff}
+ },
+/* ExtVGATable */
+ {
+  0x00,0x00,0x00,0x0000,
+  {0x01,0x0f,0x00,0x0e},
+  0x23,
+  {0x5f,0x4f,0x50,0x82,0x54,0x80,0x0b,0x3e,
+   0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,
+   0xea,0x8c,0xdf,0x28,0x40,0xe7,0x04,0xa3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
+   0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f,
+   0x01,0x00,0x00,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,
+   0xff}
+ },
+/* ROM_SAVEPTR */
+ {
+  0x9f,0x3b,0x00,0x00c0,
+  {0x00,0x00,0x00,0x00},
+  0x00,
+  {0x00,0x00,0x00,0x00,0x00,0x00,0xbb,0x3f,
+   0x00,0xc0,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x1a,0x00,0xac,0x3e,0x00,0xc0,
+   0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}
+ },
+/* MD_F */
+ {
+  0x50,0x18,0x0e,0x8000,
+  {0x01,0x0f,0x00,0x06},
+  0xa2,
+  {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
+   0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x82,0x84,0x5d,0x28,0x0f,0x63,0xba,0xe3,
+   0xff},
+  {0x00,0x08,0x00,0x00,0x18,0x18,0x00,0x00,
+   0x00,0x08,0x00,0x00,0x00,0x18,0x00,0x00,
+   0x0b,0x00,0x05,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x05,
+   0xff}
+ },
+/* MD_10 */
+ {
+  0x50,0x18,0x0e,0x8000,
+  {0x01,0x0f,0x00,0x06},
+  0xa3,
+  {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
+   0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x82,0x84,0x5d,0x28,0x0f,0x63,0xba,0xe3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,
+   0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,
+   0x01,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,
+   0xff}
+ },
+/* MD_0_350 */
+ {
+  0x28,0x18,0x0e,0x0800,
+  {0x09,0x03,0x00,0x02},
+  0xa3,
+  {0x2d,0x27,0x28,0x90,0x2b,0xb1,0xbf,0x1f,
+   0x00,0x4d,0x0b,0x0c,0x00,0x00,0x00,0x00,
+   0x83,0x85,0x5d,0x14,0x1f,0x63,0xba,0xa3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,
+   0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,
+   0x08,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
+   0xff}
+ },
+/* MD_1_350 */
+ {
+  0x28,0x18,0x0e,0x0800,
+  {0x09,0x03,0x00,0x02},
+  0xa3,
+  {0x2d,0x27,0x28,0x90,0x2b,0xa0,0xbf,0x1f,
+   0x00,0x4d,0x0b,0x0c,0x00,0x00,0x00,0x00,
+   0x83,0x85,0x5d,0x14,0x1f,0x63,0xba,0xa3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,
+   0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,
+   0x08,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
+   0xff}
+ },
+/* MD_2_350 */
+ {
+  0x50,0x18,0x0e,0x1000,
+  {0x01,0x03,0x00,0x02},
+  0xa3,
+  {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
+   0x00,0x4d,0x0b,0x0c,0x00,0x00,0x00,0x00,
+   0x83,0x85,0x5d,0x28,0x1f,0x63,0xba,0xa3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,
+   0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,
+   0x08,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
+   0xff}
+ },
+/* MD_3_350 */
+ {
+  0x50,0x18,0x0e,0x1000,
+  {0x01,0x03,0x00,0x02},
+  0xa3,
+  {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
+   0x00,0x4d,0x0b,0x0c,0x00,0x00,0x00,0x00,
+   0x83,0x85,0x5d,0x28,0x1f,0x63,0xba,0xa3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,
+   0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,
+   0x08,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
+   0xff}
+ },
+/* MD_0_1_400 */
+ {
+  0x28,0x18,0x10,0x0800,
+  {0x08,0x03,0x00,0x02},
+  0x67,
+  {0x2d,0x27,0x28,0x90,0x2b,0xb1,0xbf,0x1f,
+   0x00,0x4f,0x0d,0x0e,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x14,0x1f,0x96,0xb9,0xa3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,
+   0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,
+   0x0c,0x00,0x0f,0x08},
+  {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
+   0xff}
+ },
+/* MD_2_3_400 */
+ {
+  0x50,0x18,0x10,0x1000,
+  {0x00,0x03,0x00,0x02},
+  0x67,
+  {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
+   0x00,0x4f,0x0d,0x0e,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x28,0x1f,0x96,0xb9,0xa3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,
+   0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,
+   0x0c,0x00,0x0f,0x08},
+  {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
+   0xff}
+ },
+/* MD_7_400 */
+ {
+  0x50,0x18,0x10,0x1000,
+  {0x00,0x03,0x00,0x02},
+  0x66,
+  {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
+   0x00,0x4f,0x0d,0x0e,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x28,0x0f,0x96,0xb9,0xa3,
+   0xff},
+  {0x00,0x08,0x08,0x08,0x08,0x08,0x08,0x08,
+   0x10,0x18,0x18,0x18,0x18,0x18,0x18,0x18,
+   0x0e,0x00,0x0f,0x08},
+  {0x00,0x00,0x00,0x00,0x00,0x10,0x0a,0x00,
+   0xff}
+ },
+/* MD_11 */
+ {
+  0x50,0x1d,0x10,0xa000,
+  {0x01,0x0f,0x00,0x06},
+  0xe3,
+  {0x5f,0x4f,0x50,0x82,0x55,0x81,0x0b,0x3e,
+   0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,
+   0xe9,0x8b,0xdf,0x28,0x00,0xe7,0x04,0xc3,
+   0xff},
+  {0x00,0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,
+   0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,
+   0x01,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x01,
+   0xff}
+ },
+/* ExtEGATable */
+ {
+  0x50,0x1d,0x10,0xa000,
+  {0x01,0x0f,0x00,0x06},
+  0xe3,
+  {0x5f,0x4f,0x50,0x82,0x55,0x81,0x0b,0x3e,
+   0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,
+   0xe9,0x8b,0xdf,0x28,0x00,0xe7,0x04,0xe3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,
+   0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,
+   0x01,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,
+   0xff}
+ },
+/* MD_13 */
+ {
+  0x28,0x18,0x08,0x2000,
+  {0x01,0x0f,0x00,0x0e},
+  0x63,
+  {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
+   0x00,0x41,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x28,0x40,0x96,0xb9,0xa3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
+   0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f,
+   0x41,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,
+   0xff}
+ }
+};
+
+typedef struct _SiS310_ExtStruct
+{
+	UCHAR Ext_ModeID;
+	USHORT Ext_ModeFlag;
+	USHORT Ext_ModeInfo;
+	USHORT Ext_Point;    /* TW: Address of table entry in (older) BIOS image */
+	USHORT Ext_VESAID;
+	UCHAR Ext_VESAMEMSize;
+	UCHAR Ext_RESINFO;
+	UCHAR VB_ExtTVFlickerIndex;
+	UCHAR VB_ExtTVEdgeIndex;
+	UCHAR VB_ExtTVYFilterIndex;
+	UCHAR REFindex;
+} SiS310_ExtStruct;
+
+/* TW: Checked with 650/LVDS and 650/301LVx 1.10.6s */
+static const SiS310_ExtStruct  SiS310_EModeIDTable[]=
+{
+	{0x6a,0x2212,0x0407,0x3a81,0x0102,0x08,0x07,0x00,0x00,0x07,0x00},          /* 800x600x? */
+	{0x2e,0x0a1b,0x0306,0x3a57,0x0101,0x08,0x06,0x00,0x00,0x05,0x08},          /* 640x480x8 */
+/*	{0x2e,0x021b,0x0306,0x3a57,0x0101,0x08,0x06,0x00,0x00,0x05,0x08},    */    /* 640x480x8 - 650/LVDS BIOS (no CRt2Mode) */
+	{0x2f,0x0a1b,0x0305,0x3a50,0x0100,0x08,0x05,0x00,0x00,0x05,0x10},          /* 640x400x8 */
+/*	{0x2f,0x021b,0x0305,0x3a50,0x0100,0x08,0x05,0x00,0x00,0x05,0x10},    */    /* 640x400x8 - 650/LVDS BIOS (no CRt2Mode) */
+	{0x30,0x2a1b,0x0407,0x3a81,0x0103,0x08,0x07,0x00,0x00,0x07,0x00},          /* 800x600x8 */
+/*	{0x30,0x221b,0x0407,0x3a81,0x0103,0x08,0x07,0x00,0x00,0x07,0x00},    */    /* 800x600x8 - 650/LVDS BIOS (no CRt2Mode) */
+/*      {0x31,0x0a1b,0x030d,0x3b85,0x0000,0x08,0x0d,0x00,0x00,0x06,0x11},    */    /* 720x480x8 */
+        {0x31,0x0a1b,0x0a0d,0x3b85,0x0000,0x08,0x0d,0x00,0x00,0x06,0x11},          /* 720x480x8 BIOS (301/LVDS) */
+	{0x32,0x0a1b,0x0a0e,0x3b8c,0x0000,0x08,0x0e,0x00,0x00,0x06,0x12},          /* 720x576x8 */
+	{0x33,0x0a1d,0x0a0d,0x3b85,0x0000,0x08,0x0d,0x00,0x00,0x06,0x11},          /* 720x480x16 */
+	{0x34,0x2a1d,0x0a0e,0x3b8c,0x0000,0x08,0x0e,0x00,0x00,0x06,0x12},          /* 720x576x16 */
+	{0x35,0x0a1f,0x0a0d,0x3b85,0x0000,0x08,0x0d,0x00,0x00,0x06,0x11},          /* 720x480x32 */
+	{0x36,0x2a1f,0x0a0e,0x3b8c,0x0000,0x08,0x0e,0x00,0x00,0x06,0x12},          /* 720x576x32 */
+	{0x37,0x0212,0x0508,0x3aab,0x0104,0x08,0x08,0x00,0x00,0x08,0x13},          /* 1024x768x? */
+	{0x38,0x0a1b,0x0508,0x3aab,0x0105,0x08,0x08,0x00,0x00,0x08,0x13},          /* 1024x768x8 */
+/*	{0x38,0x021b,0x0508,0x3aab,0x0105,0x08,0x08,0x00,0x00,0x00,0x13},    */    /* 1024x768x8 - 650/LVDS BIOS (no CRt2Mode)  */
+	{0x3a,0x0e3b,0x0609,0x3adc,0x0107,0x08,0x09,0x00,0x00,0x00,0x1a},          /* 1280x1024x8 */
+/*	{0x3a,0x063b,0x0609,0x3adc,0x0107,0x08,0x09,0x00,0x00,0x00,0x1a},    */    /* 1280x1024x8 - 650/LVDS BIOS*/
+	{0x3c,0x0e3b,0x070a,0x3af2,0x0130,0x08,0x0a,0x00,0x00,0x00,0x1e},          /* 1600x1200x8 */
+/*	{0x3c,0x063b,0x070a,0x3af2,0x0130,0x08,0x0a,0x00,0x00,0x00,0x1e},    */    /* 1600x1200x8 - 650/LVDS BIOS */
+	{0x3d,0x067d,0x070a,0x3af2,0x0131,0x08,0x0a,0x00,0x00,0x00,0x1e},          /* 1600x1200x16 - 650/301LVx - no CRT2Mode? */
+	{0x40,0x9a1c,0x0000,0x3a34,0x010d,0x08,0x00,0x00,0x00,0x04,0x25},
+	{0x41,0x9a1d,0x0000,0x3a34,0x010e,0x08,0x00,0x00,0x00,0x04,0x25},
+	{0x43,0x0a1c,0x0306,0x3a57,0x0110,0x08,0x06,0x00,0x00,0x05,0x08},
+	{0x44,0x0a1d,0x0306,0x3a57,0x0111,0x08,0x06,0x00,0x00,0x05,0x08},          /* 640x480x16 */
+	{0x46,0x2a1c,0x0407,0x3a81,0x0113,0x08,0x07,0x00,0x00,0x07,0x00},
+	{0x47,0x2a1d,0x0407,0x3a81,0x0114,0x08,0x07,0x00,0x00,0x07,0x00},          /* 800x600x16 */
+	{0x49,0x0a3c,0x0508,0x3aab,0x0116,0x08,0x08,0x00,0x00,0x00,0x13},
+	{0x4a,0x0a3d,0x0508,0x3aab,0x0117,0x08,0x08,0x00,0x00,0x08,0x13},          /* 1024x768x16 */
+	{0x4c,0x0e7c,0x0609,0x3adc,0x0119,0x08,0x09,0x00,0x00,0x00,0x1a},
+	{0x4d,0x0e7d,0x0609,0x3adc,0x011a,0x08,0x09,0x00,0x00,0x00,0x1a},          /* 1280x1024x16 */
+	{0x50,0x9a1b,0x0001,0x3a3b,0x0132,0x08,0x01,0x00,0x00,0x04,0x26},
+/*	{0x50,0x921b,0x0001,0x3a3b,0x0132,0x08,0x01,0x00,0x00,0x04,0x26},     */   /* 650/LVDS BIOS */
+	{0x51,0xba1b,0x0103,0x3a42,0x0133,0x08,0x03,0x00,0x00,0x07,0x27},
+/*	{0x52,0x9a1b,0x0204,0x3a49,0x0134,0x08,0x04,0x00,0x00,0x00,0x28},  */
+  	{0x52,0xba1b,0x0204,0x3a49,0x0134,0x08,0x04,0x00,0x00,0x00,0x28},          /* 650/301 BIOS */
+/*	{0x52,0xb21b,0x0204,0x3a49,0x0134,0x08,0x04,0x00,0x00,0x00,0x28},     */   /* 650/LVDS BIOS (no CRT2Mode) */
+	{0x56,0x9a1d,0x0001,0x3a3b,0x0135,0x08,0x01,0x00,0x00,0x04,0x26},
+	{0x57,0xba1d,0x0103,0x3a42,0x0136,0x08,0x03,0x00,0x00,0x07,0x27},
+/*	{0x58,0x9a1d,0x0204,0x3a49,0x0137,0x08,0x04,0x00,0x00,0x00,0x28},  */
+ 	{0x58,0xba1d,0x0204,0x3a49,0x0137,0x08,0x04,0x00,0x00,0x00,0x28},          /* BIOS (301+LVDS) */
+	{0x59,0x9a1b,0x0000,0x3a34,0x0138,0x08,0x00,0x00,0x00,0x04,0x25},
+/*	{0x59,0x921b,0x0000,0x3a34,0x0138,0x08,0x00,0x00,0x00,0x04,0x25},     */   /* 650/LVDS BIOS (no CRT2Mode) */
+	{0x5A,0x021b,0x0014,0x3b83,0x0138,0x08,0x01,0x00,0x00,0x04,0x3f},          /* 320x480x8 fstn add new mode*/
+	{0x5B,0x0a1d,0x0014,0x3b83,0x0135,0x08,0x01,0x00,0x00,0x04,0x3f},          /* 320x480x16 fstn add new mode*/
+	{0x5c,0xba1f,0x0204,0x3a49,0x0000,0x08,0x04,0x00,0x00,0x00,0x28},          /* TW: inserted 512x384x32 */
+	{0x5d,0x0a1d,0x0305,0x3a50,0x0139,0x08,0x05,0x00,0x00,0x07,0x10},
+	{0x5e,0x0a1f,0x0305,0x3a50,0x0000,0x08,0x05,0x00,0x00,0x07,0x10},          /* TW: Inserted 640x400x32 */
+	{0x62,0x0a3f,0x0306,0x3a57,0x013a,0x08,0x06,0x00,0x00,0x05,0x08},          /* 640x480x32 */
+	{0x63,0x2a3f,0x0407,0x3a81,0x013b,0x08,0x07,0x00,0x00,0x07,0x00},          /* 800x600x32 */
+	{0x64,0x0a7f,0x0508,0x3aab,0x013c,0x08,0x08,0x00,0x00,0x08,0x13},          /* 1024x768x32 */
+	{0x65,0x0eff,0x0609,0x3adc,0x013d,0x08,0x09,0x00,0x00,0x00,0x1a},          /* 1280x1024x32 */
+	{0x66,0x06ff,0x070a,0x3af2,0x013e,0x08,0x0a,0x00,0x00,0x00,0x1e},          /* 1600x1200x32 */
+	{0x68,0x067b,0x080b,0x3b17,0x013f,0x08,0x0b,0x00,0x00,0x00,0x29},          /* 1920x1440x8 */
+	{0x69,0x06fd,0x080b,0x3b17,0x0140,0x08,0x0b,0x00,0x00,0x00,0x29},          /* 1920x1440x16 */
+	{0x6b,0x07ff,0x080b,0x3b17,0x0141,0x10,0x0b,0x00,0x00,0x00,0x29},          /* 1920x1440x32 */
+	{0x6c,0x067b,0x090c,0x3b37,0x0000,0x08,0x0c,0x00,0x00,0x00,0x2f},          /* 2048x1536x8 */
+	{0x6d,0x06fd,0x090c,0x3b37,0x0000,0x10,0x0c,0x00,0x00,0x00,0x2f},          /* 2048x1536x16 */
+	{0x6e,0x07ff,0x090c,0x3b37,0x0000,0x10,0x0c,0x00,0x00,0x00,0x2f},          /* 2048x1536x32 */
+	{0x70,0x2a1b,0x0410,0x3b52,0x0000,0x08,0x10,0x00,0x00,0x07,0x34},          /* 800x480x8 */
+	{0x71,0x0a1b,0x0511,0x3b63,0x0000,0x08,0x11,0x00,0x00,0x00,0x37},          /* 1024x576x8 */
+	{0x74,0x0a1d,0x0511,0x3b63,0x0000,0x08,0x11,0x00,0x00,0x00,0x37},          /* 1024x576x16 */
+	{0x75,0x0a3d,0x0612,0x3b74,0x0000,0x08,0x12,0x00,0x00,0x00,0x3a},	   /* 1280x720x16 */
+	{0x76,0x2a1f,0x0410,0x3b52,0x0000,0x08,0x10,0x00,0x00,0x07,0x34},          /* 800x480x32 */
+	{0x77,0x0a1f,0x0511,0x3b63,0x0000,0x08,0x11,0x00,0x00,0x00,0x37},	   /* 1024x576x32 */
+	{0x78,0x0a3f,0x0612,0x3b74,0x0000,0x08,0x12,0x00,0x00,0x00,0x3a},	   /* 1280x720x32 */
+	{0x79,0x0a3b,0x0612,0x3b74,0x0000,0x08,0x12,0x00,0x00,0x00,0x3a},	   /* 1280x720x8 */
+	{0x7a,0x2a1d,0x0410,0x3b52,0x0000,0x08,0x10,0x00,0x00,0x07,0x34},          /* 800x480x16 */
+	{0x7c,0x0e3b,0x060f,0x3ad0,0x0000,0x08,0x0f,0x00,0x00,0x00,0x3d},          /* 1280x960x8 - TW */
+	{0x7d,0x0e7d,0x060f,0x3ad0,0x0000,0x08,0x0f,0x00,0x00,0x00,0x3d},          /* 1280x960x16 - TW */
+	{0x7e,0x0eff,0x060f,0x3ad0,0x0000,0x08,0x0f,0x00,0x00,0x00,0x3d},          /* 1280x960x32 - TW */
+        /* TW: 650/LVDS BIOS new modes */
+/*	{0x23,0x063b,0x0614,0x36f7,0x0000,0x08,0x14,0x00,0x00,0x00,0x40},  */      /* 1280x768x8 - 650/LVDS BIOS */
+	{0x23,0x0e3b,0x0614,0x36f7,0x0000,0x08,0x14,0x00,0x00,0x00,0x40},          /* 1280x768x8 */
+	{0x24,0x0e7d,0x0614,0x36f7,0x0000,0x08,0x14,0x00,0x00,0x00,0x40},          /* 1280x768x16 */
+	{0x25,0x0eff,0x0614,0x36f7,0x0000,0x08,0x14,0x00,0x00,0x00,0x40},          /* 1280x768x32 */
+	{0x26,0x0e3b,0x0c15,0x36fe,0x0000,0x08,0x15,0x00,0x00,0x00,0x41},          /* 1400x1050x8 */
+/*	{0x26,0x063b,0x0c15,0x36fe,0x0000,0x08,0x15,0x00,0x00,0x00,0x41},    */    /* 1400x1050x8 - 650/LVDS BIOS */
+	{0x27,0x0e7d,0x0c15,0x36fe,0x0000,0x08,0x15,0x00,0x00,0x00,0x41},          /* 1400x1050x16 */
+	{0x28,0x0eff,0x0c15,0x36fe,0x0000,0x08,0x15,0x00,0x00,0x00,0x41},          /* 1400x1050x32*/
+	{0x29,0x0e1b,0x0d16,0x0000,0x0000,0x08,0x16,0x00,0x00,0x00,0x43},    /* TW: NEW 1152x864 - not in BIOS */
+	{0x2a,0x0e3d,0x0d16,0x0000,0x0000,0x08,0x16,0x00,0x00,0x00,0x43},
+	{0x2b,0x0e7f,0x0d16,0x0000,0x0000,0x08,0x16,0x00,0x00,0x00,0x43},
+	{0x39,0x2a1b,0x0b17,0x0000,0x0000,0x08,0x17,0x00,0x00,0x00,0x45},    /* TW: NEW 848x480 - not in BIOS */
+	{0x3b,0x2a3d,0x0b17,0x0000,0x0000,0x08,0x17,0x00,0x00,0x00,0x45},
+	{0x3e,0x2a7f,0x0b17,0x0000,0x0000,0x08,0x17,0x00,0x00,0x00,0x45},
+	{0x3f,0x2a1b,0x0b13,0x0000,0x0000,0x08,0x13,0x00,0x00,0x00,0x47},    /* TW: NEW 856x480 - not in BIOS */
+	{0x42,0x2a3d,0x0b13,0x0000,0x0000,0x08,0x13,0x00,0x00,0x00,0x47},
+	{0x45,0x2a7f,0x0b13,0x0000,0x0000,0x08,0x13,0x00,0x00,0x00,0x47},
+	{0x48,0x2a1b,0x0e18,0x0000,0x0000,0x08,0x18,0x00,0x00,0x00,0x49},    /* TW: NEW 1360x768 - not in BIOS */
+	{0x4b,0x2a3d,0x0e18,0x0000,0x0000,0x08,0x18,0x00,0x00,0x00,0x49},
+	{0x4e,0x2a7f,0x0e18,0x0000,0x0000,0x08,0x18,0x00,0x00,0x00,0x49},
+	{0xff,0x0000,0x0000,0x0000,0x0000,0x00,0x00,0x00,0x00,0x00,0x00}
+};
+
+typedef struct _SiS310_Ext2Struct
+{
+	USHORT Ext_InfoFlag;
+	UCHAR Ext_CRT1CRTC;
+	UCHAR Ext_CRTVCLK;
+	UCHAR Ext_CRT2CRTC;
+	UCHAR  ModeID;
+	USHORT XRes;
+	USHORT YRes;
+	USHORT ROM_OFFSET;
+} SiS310_Ext2Struct;
+
+static const SiS310_Ext2Struct SiS310_RefIndex[]=
+{
+/*	{0x005f,0x0d,0x03,0x05,0x6a, 800, 600,0x3a81},    0x0 - TW: Patch for Chrontel 7019  */
+	{0x085f,0x0d,0x03,0x05,0x6a, 800, 600,0x3a81}, /* 0x0 */
+	{0x0467,0x0e,0x04,0x05,0x6a, 800, 600,0x3a86}, /* 0x1 */
+	{0x0067,0x0f,0x08,0x48,0x6a, 800, 600,0x3a8b}, /* 0x2 */
+	{0x0067,0x10,0x07,0x8b,0x6a, 800, 600,0x3a90}, /* 0x3 */
+	{0x0147,0x11,0x0a,0x00,0x6a, 800, 600,0x3a95}, /* 0x4 */
+	{0x0147,0x12,0x0d,0x00,0x6a, 800, 600,0x3a9a}, /* 0x5 - 4147 TW: Test sync change */
+	{0x0047,0x13,0x13,0x00,0x6a, 800, 600,0x3a9f}, /* 0x6 - 4047 */
+	{0x0047,0x14,0x1c,0x00,0x6a, 800, 600,0x3aa4}, /* 0x7 - 4047 */
+/*	{0xc05f,0x05,0x00,0x04,0x2e, 640, 480,0x3a57},    0x8 - TW: Patch for Chrontel 7019  */
+	{0xc85f,0x05,0x00,0x04,0x2e, 640, 480,0x3a57}, /* 0x8 */
+	{0xc067,0x06,0x02,0x04,0x2e, 640, 480,0x3a5c}, /* 0x9 */
+	{0xc067,0x07,0x02,0x47,0x2e, 640, 480,0x3a61}, /* 0xa */
+	{0xc067,0x08,0x03,0x8a,0x2e, 640, 480,0x3a66}, /* 0xb */
+	{0xc047,0x09,0x05,0x00,0x2e, 640, 480,0x3a6b}, /* 0xc - 4047 */
+	{0xc047,0x0a,0x09,0x00,0x2e, 640, 480,0x3a70}, /* 0xd - 4047 */
+	{0xc047,0x0b,0x0e,0x00,0x2e, 640, 480,0x3a75}, /* 0xe - 4047 */
+	{0xc047,0x0c,0x15,0x00,0x2e, 640, 480,0x3a7a}, /* 0xf */
+	{0x407f,0x04,0x00,0x00,0x2f, 640, 400,0x3a50}, /* 0x10 */
+	{0xc00f,0x3c,0x01,0x06,0x31, 720, 480,0x3b85}, /* 0x11 */
+	{0x000f,0x3d,0x03,0x06,0x32, 720, 576,0x3b8c}, /* 0x12 */
+	{0x0187,0x15,0x06,0x00,0x37,1024, 768,0x3aab}, /* 0x13 */
+	{0xc877,0x16,0x0b,0x06,0x37,1024, 768,0x3ab0}, /* 0x14 301b TV1024x768*/
+	{0xc067,0x17,0x0f,0x49,0x37,1024, 768,0x3ab5}, /* 0x15 */
+	{0x0267,0x18,0x11,0x00,0x37,1024, 768,0x3aba}, /* 0x16 */
+	{0x0047,0x19,0x16,0x8c,0x37,1024, 768,0x3abf}, /* 0x17 */
+	{0x0047,0x1a,0x1b,0x00,0x37,1024, 768,0x3ac4}, /* 0x18 - 4047 */
+	{0x0047,0x1b,0x1f,0x00,0x37,1024, 768,0x3ac9}, /* 0x19 - 4047 */
+	{0x0387,0x1c,0x11,0x00,0x3a,1280,1024,0x3adc}, /* 0x1a */
+	{0x0077,0x1d,0x19,0x07,0x3a,1280,1024,0x3ae1}, /* 0x1b */
+	{0x0047,0x1e,0x1e,0x00,0x3a,1280,1024,0x3ae6}, /* 0x1c */
+	{0x0007,0x1f,0x20,0x00,0x3a,1280,1024,0x3aeb}, /* 0x1d */
+	{0x0007,0x20,0x21,0x00,0x3c,1600,1200,0x3af2}, /* 0x1e */
+	{0x0007,0x21,0x22,0x00,0x3c,1600,1200,0x3af7}, /* 0x1f */
+	{0x0007,0x22,0x23,0x00,0x3c,1600,1200,0x3afc}, /* 0x20 */
+	{0x0007,0x23,0x25,0x00,0x3c,1600,1200,0x3b01}, /* 0x21 */
+	{0x0007,0x24,0x26,0x00,0x3c,1600,1200,0x3b06}, /* 0x22 */
+	{0x0007,0x25,0x2c,0x00,0x3c,1600,1200,0x3b0b}, /* 0x23 */
+	{0x0007,0x26,0x34,0x00,0x3c,1600,1200,0x3b10}, /* 0x24 */
+	{0x407f,0x00,0x00,0x00,0x40, 320, 200,0x3a34}, /* 0x25 */
+	{0xc07f,0x01,0x00,0x04,0x50, 320, 240,0x3a3b}, /* 0x26 */
+	{0x007f,0x02,0x04,0x05,0x51, 400, 300,0x3a42}, /* 0x27 */
+	{0xc077,0x03,0x0b,0x06,0x52, 512, 384,0x3a49}, /* 0x28 */
+	{0x8007,0x27,0x27,0x00,0x68,1920,1440,0x3b17}, /* 0x29 */
+	{0x4007,0x28,0x29,0x00,0x68,1920,1440,0x3b1c}, /* 0x2a */
+	{0x4007,0x29,0x2e,0x00,0x68,1920,1440,0x3b21}, /* 0x2b */
+	{0x4007,0x2a,0x30,0x00,0x68,1920,1440,0x3b26}, /* 0x2c */
+	{0x4007,0x2b,0x35,0x00,0x68,1920,1440,0x3b2b}, /* 0x2d */
+	{0x4005,0x2c,0x39,0x00,0x68,1920,1440,0x3b30}, /* 0x2e */
+	{0x4007,0x2d,0x2b,0x00,0x6c,2048,1536,0x3b37}, /* 0x2f */
+	{0x4007,0x2e,0x31,0x00,0x6c,2048,1536,0x3b3c}, /* 0x30 */
+	{0x4007,0x2f,0x33,0x00,0x6c,2048,1536,0x3b41}, /* 0x31 */
+	{0x4007,0x30,0x37,0x00,0x6c,2048,1536,0x3b46}, /* 0x32 */
+	{0x4005,0x31,0x38,0x00,0x6c,2048,1536,0x3b4b}, /* 0x33 */
+	{0x0057,0x32,0x40,0x08,0x70, 800, 480,0x3b52}, /* 0x34 */
+	{0x0047,0x33,0x07,0x08,0x70, 800, 480,0x3b57}, /* 0x35 */
+	{0x0047,0x34,0x0a,0x08,0x70, 800, 480,0x3b5c}, /* 0x36 */
+	{0x0057,0x35,0x0b,0x09,0x71,1024, 576,0x3b63}, /* 0x37 */
+	{0x0047,0x36,0x11,0x09,0x71,1024, 576,0x3b68}, /* 0x38 */
+	{0x0047,0x37,0x16,0x09,0x71,1024, 576,0x3b6d}, /* 0x39 */
+	{0x0057,0x38,0x19,0x0a,0x75,1280, 720,0x3b74}, /* 0x3a */
+	{0x0047,0x39,0x1e,0x0a,0x75,1280, 720,0x3b79}, /* 0x3b */
+	{0x0047,0x3a,0x20,0x0a,0x75,1280, 720,0x3b7e}, /* 0x3c */
+	{0x0027,0x3b,0x19,0x08,0x7c,1280, 960,0x3ad0}, /* 0x3d */
+	{0x0047,0x4c,0x59,0x08,0x7c,1280, 960,0x3ad0}, /* 0x3e */
+	{0xc07f,0x01,0x00,0x06,0x5a, 320, 480,0x3b83}, /* 0x3f */    /* FSTN mode */
+        {0x0077,0x42,0x12,0x07,0x23,1280, 768,0x0000}, /* 0x40 */    /* TW: 650/LVDS/301LVx new mode */
+	{0x0067,0x43,0x4d,0x08,0x26,1400,1050,0x0000}, /* 0x41 */    /* TW: 650/LVDS/301LVx new mode */
+	{0x0067,0x4b,0x5a,0x08,0x26,1400,1050,0x0000}, /* 0x42 */    /* TW: new, not in any BIOS */
+	{0x0047,0x44,0x19,0x06,0x29,1152, 864,0x0000}, /* 0x43 TW: Non-BIOS, new */
+	{0x0047,0x4a,0x1e,0x06,0x29,1152, 864,0x0000}, /* 0x44 TW: Non-BIOS, new */
+	{0x00c7,0x45,0x57,0x00,0x39, 848, 480,0x0000}, /* 0x45 TW: 848x480-38Hzi - Non-BIOS, new */
+	{0xc047,0x46,0x55,0x00,0x39, 848, 480,0x0000}, /* 0x46 TW: 848x480-60Hz  - Non-BIOS, new */
+	{0x00c7,0x47,0x57,0x00,0x3f, 856, 480,0x0000}, /* 0x47 TW: 856x480-38Hzi - Non-BIOS, new */
+	{0xc047,0x48,0x57,0x00,0x3f, 856, 480,0x0000}, /* 0x48 TW: 856x480-60Hz  - Non-BIOS, new */
+	{0x0047,0x49,0x58,0x00,0x48,1360, 768,0x0000}, /* 0x49 TW: 1360x768-60Hz - Non-BIOS, new */
+	{0xffff,0x00,0x00,0x00,0x00,   0,   0,0x0000}
+};
+
+typedef struct _SiS310_CRT1TableStruct
+{
+ 	UCHAR CR[17];
+} SiS310_CRT1TableStruct;
+
+static const SiS310_CRT1TableStruct SiS310_CRT1Table[]=
+{
+ {{0x2d,0x27,0x28,0x90,0x2c,0x80,0xbf,0x1f,
+   0x9c,0x8e,0x8f,0x96,0xb9,0x30,0x00,0x00,
+   0x00}}, /* 0x0 */
+ {{0x2d,0x27,0x28,0x90,0x2c,0x80,0x0b,0x3e,
+   0xe9,0x8b,0xdf,0xe7,0x04,0x00,0x00,0x00,
+   0x00}}, /* 0x1 */
+ {{0x3d,0x31,0x31,0x81,0x37,0x1f,0x72,0xf0,
+   0x58,0x8c,0x57,0x57,0x73,0x20,0x00,0x05,
+   0x01}}, /* 0x2 */
+ {{0x4f,0x3f,0x3f,0x93,0x45,0x0d,0x24,0xf5,
+   0x02,0x88,0xff,0xff,0x25,0x10,0x00,0x01,
+   0x01}}, /* 0x3 */
+ {{0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
+   0x9c,0x8e,0x8f,0x96,0xb9,0x30,0x00,0x05,
+   0x00}}, /* 0x4 */
+#if 0   
+ {{0x5f,0x4f,0x50,0x82,0x55,0x81,0x0b,0x3e,
+   0xe9,0x8b,0xdf,0xe7,0x04,0x00,0x00,0x05,
+   0x00}}, /* 0x5 */
+#endif   
+ {{0x5f,0x4f,0x4f,0x83,0x55,0x81,0x0b,0x3e,    /* 0x05 - corrected 640x480-60 */
+   0xe9,0x8b,0xdf,0xe8,0x0c,0x00,0x00,0x05,
+   0x00}},
+#if 0   
+ {{0x63,0x4f,0x50,0x86,0x56,0x9b,0x06,0x3e,
+   0xe8,0x8b,0xdf,0xe7,0xff,0x10,0x00,0x01,
+   0x00}}, /* 0x6 */
+#endif
+ {{0x63,0x4f,0x4f,0x87,0x56,0x9b,0x06,0x3e,    /* 0x06 - corrected 640x480-72 */
+   0xe8,0x8a,0xdf,0xe7,0x07,0x00,0x00,0x01,
+   0x00}},
+ {{0x64,0x4f,0x4f,0x88,0x55,0x9d,0xf2,0x1f,
+   0xe0,0x83,0xdf,0xdf,0xf3,0x10,0x00,0x01,
+   0x00}}, /* 0x7 */
+ {{0x63,0x4f,0x4f,0x87,0x5a,0x81,0xfb,0x1f,
+   0xe0,0x83,0xdf,0xdf,0xfc,0x10,0x00,0x05,
+   0x00}}, /* 0x8 */
+ {{0x65,0x4f,0x4f,0x89,0x58,0x80,0xfb,0x1f,
+   0xe0,0x83,0xdf,0xdf,0xfc,0x10,0x00,0x05,  /* TW: Corrected VBE */
+   0x61}}, /* 0x9 */
+ {{0x65,0x4f,0x4f,0x89,0x58,0x80,0x01,0x3e,
+   0xe0,0x83,0xdf,0xdf,0x02,0x00,0x00,0x05,
+   0x61}}, /* 0xa */
+ {{0x67,0x4f,0x4f,0x8b,0x58,0x81,0x0d,0x3e,
+   0xe0,0x83,0xdf,0xdf,0x0e,0x00,0x00,0x05,  /* TW: Corrected VBE */
+   0x61}}, /* 0xb */
+ {{0x65,0x4f,0x4f,0x89,0x57,0x9f,0xfb,0x1f,
+   0xe6,0x8a,0xdf,0xdf,0xfc,0x10,0x00,0x01,  /* TW: Corrected VDE, VBE */
+   0x00}}, /* 0xc */
+ {{0x7b,0x63,0x63,0x9f,0x6a,0x93,0x6f,0xf0,
+   0x58,0x8a,0x57,0x57,0x70,0x20,0x00,0x05,
+   0x01}}, /* 0xd */
+ {{0x7f,0x63,0x63,0x83,0x6c,0x1c,0x72,0xf0,
+   0x58,0x8c,0x57,0x57,0x73,0x20,0x00,0x06,
+   0x01}}, /* 0xe */
+ {{0x7d,0x63,0x63,0x81,0x6e,0x1d,0x98,0xf0,
+   0x7c,0x82,0x57,0x57,0x99,0x00,0x00,0x06,
+   0x01}}, /* 0xf */
+ {{0x7f,0x63,0x63,0x83,0x69,0x13,0x6f,0xf0,
+   0x58,0x8b,0x57,0x57,0x70,0x20,0x00,0x06,
+   0x01}}, /* 0x10 */
+ {{0x7e,0x63,0x63,0x82,0x6b,0x13,0x75,0xf0,
+   0x58,0x8b,0x57,0x57,0x76,0x20,0x00,0x06,
+   0x01}}, /* 0x11 */
+ {{0x81,0x63,0x63,0x85,0x6d,0x18,0x7a,0xf0,
+   0x58,0x8b,0x57,0x57,0x7b,0x20,0x00,0x06,
+   0x61}}, /* 0x12 */
+ {{0x83,0x63,0x63,0x87,0x6e,0x19,0x81,0xf0,
+   0x58,0x8b,0x57,0x57,0x82,0x20,0x00,0x06,
+   0x61}}, /* 0x13 */
+ {{0x85,0x63,0x63,0x89,0x6f,0x1a,0x91,0xf0,
+   0x58,0x8b,0x57,0x57,0x92,0x20,0x00,0x06,
+   0x61}}, /* 0x14 */
+ {{0x99,0x7f,0x7f,0x9d,0x84,0x1a,0x96,0x1f,
+   0x7f,0x83,0x7f,0x7f,0x97,0x10,0x00,0x02,
+   0x00}}, /* 0x15 */
+ {{0xa3,0x7f,0x7f,0x87,0x86,0x97,0x24,0xf5,
+   0x02,0x88,0xff,0xff,0x25,0x10,0x00,0x02,
+   0x01}}, /* 0x16 */
+ {{0xa1,0x7f,0x7f,0x85,0x86,0x97,0x24,0xf5,
+   0x02,0x88,0xff,0xff,0x25,0x10,0x00,0x02,
+   0x01}}, /* 0x17 */
+ {{0x9f,0x7f,0x7f,0x83,0x85,0x91,0x1e,0xf5,
+   0x00,0x83,0xff,0xff,0x1f,0x10,0x00,0x02,
+   0x01}}, /* 0x18 */
+ {{0xa7,0x7f,0x7f,0x8b,0x89,0x95,0x26,0xf5,
+   0x00,0x83,0xff,0xff,0x27,0x10,0x00,0x02,
+   0x01}}, /* 0x19 */
+ {{0xa9,0x7f,0x7f,0x8d,0x8c,0x9a,0x2c,0xf5,
+   0x00,0x83,0xff,0xff,0x2d,0x14,0x00,0x02,
+   0x62}}, /* 0x1a */
+ {{0xab,0x7f,0x7f,0x8f,0x8d,0x9b,0x35,0xf5,
+   0x00,0x83,0xff,0xff,0x36,0x14,0x00,0x02,
+   0x62}}, /* 0x1b */
+ {{0xcf,0x9f,0x9f,0x93,0xb2,0x01,0x14,0xba,
+   0x00,0x83,0xff,0xff,0x15,0x00,0x00,0x03,
+   0x00}}, /* 0x1c */
+ {{0xce,0x9f,0x9f,0x92,0xa9,0x17,0x28,0x5a,
+   0x00,0x83,0xff,0xff,0x29,0x09,0x00,0x07,
+   0x01}}, /* 0x1d */
+ {{0xce,0x9f,0x9f,0x92,0xa5,0x17,0x28,0x5a,
+   0x00,0x83,0xff,0xff,0x29,0x09,0x00,0x07,
+   0x01}}, /* 0x1e */
+ {{0xd3,0x9f,0x9f,0x97,0xab,0x1f,0x2e,0x5a,
+   0x00,0x83,0xff,0xff,0x2f,0x09,0x00,0x07,
+   0x01}}, /* 0x1f */
+ {{0x09,0xc7,0xc7,0x8d,0xd3,0x0b,0xe0,0x10,
+   0xb0,0x83,0xaf,0xaf,0xe1,0x2f,0x01,0x04,
+   0x00}}, /* 0x20 */
+ {{0x09,0xc7,0xc7,0x8d,0xd3,0x0b,0xe0,0x10,
+   0xb0,0x83,0xaf,0xaf,0xe1,0x2f,0x01,0x04,
+   0x00}}, /* 0x21 @ 4084 */
+ {{0x09,0xc7,0xc7,0x8d,0xd3,0x0b,0xe0,0x10,
+   0xb0,0x83,0xaf,0xaf,0xe1,0x2f,0x01,0x04,
+   0x00}}, /* 0x22 */
+ {{0x09,0xc7,0xc7,0x8d,0xd3,0x0b,0xe0,0x10,
+   0xb0,0x83,0xaf,0xaf,0xe1,0x2f,0x01,0x04,
+   0x00}}, /* 0x23 */
+ {{0x09,0xc7,0xc7,0x8d,0xd3,0x0b,0xe0,0x10,
+   0xb0,0x83,0xaf,0xaf,0xe1,0x2f,0x01,0x04,
+   0x00}}, /* 0x24 */
+ {{0x09,0xc7,0xc7,0x8d,0xd3,0x0b,0xe0,0x10,
+   0xb0,0x83,0xaf,0xaf,0xe1,0x2f,0x01,0x04,
+   0x00}}, /* 0x25 */
+ {{0x09,0xc7,0xc7,0x8d,0xd3,0x0b,0xe0,0x10,
+   0xb0,0x83,0xaf,0xaf,0xe1,0x2f,0x01,0x04,
+   0x00}}, /* 0x26 */
+ {{0x40,0xef,0xef,0x84,0x03,0x1d,0xda,0x1f,
+   0xa0,0x83,0x9f,0x9f,0xdb,0x1f,0x41,0x01,
+   0x00}}, /* 0x27 */
+ {{0x43,0xef,0xef,0x87,0x06,0x00,0xd4,0x1f,
+   0xa0,0x83,0x9f,0x9f,0xd5,0x1f,0x41,0x05,
+   0x63}}, /* 0x28 */
+ {{0x45,0xef,0xef,0x89,0x07,0x01,0xd9,0x1f,
+   0xa0,0x83,0x9f,0x9f,0xda,0x1f,0x41,0x05,
+   0x63}}, /* 0x29 */
+ {{0x40,0xef,0xef,0x84,0x03,0x1d,0xda,0x1f,
+   0xa0,0x83,0x9f,0x9f,0xdb,0x1f,0x41,0x01,
+   0x00}}, /* 0x2a */
+ {{0x40,0xef,0xef,0x84,0x03,0x1d,0xda,0x1f,
+   0xa0,0x83,0x9f,0x9f,0xdb,0x1f,0x41,0x01,
+   0x00}}, /* 0x2b */
+ {{0x40,0xef,0xef,0x84,0x03,0x1d,0xda,0x1f,
+   0xa0,0x83,0x9f,0x9f,0xdb,0x1f,0x41,0x01,
+   0x00}}, /* 0x2c */
+ {{0x59,0xff,0xff,0x9d,0x17,0x13,0x33,0xba,
+   0x00,0x83,0xff,0xff,0x34,0x0f,0x41,0x05,
+   0x44}}, /* 0x2d */
+ {{0x5b,0xff,0xff,0x9f,0x18,0x14,0x38,0xba,
+   0x00,0x83,0xff,0xff,0x39,0x0f,0x41,0x05,
+   0x44}}, /* 0x2e */
+ {{0x5b,0xff,0xff,0x9f,0x18,0x14,0x3d,0xba,
+   0x00,0x83,0xff,0xff,0x3e,0x0f,0x41,0x05,
+   0x44}}, /* 0x2f */
+ {{0x5d,0xff,0xff,0x81,0x19,0x95,0x41,0xba,
+   0x00,0x84,0xff,0xff,0x42,0x0f,0x41,0x05,
+   0x44}}, /* 0x30 */
+ {{0x55,0xff,0xff,0x99,0x0d,0x0c,0x3e,0xba,
+   0x00,0x84,0xff,0xff,0x3f,0x0f,0x41,0x05,
+   0x00}}, /* 0x31 */
+ {{0x7f,0x63,0x63,0x83,0x6c,0x1c,0x72,0xba,
+   0x27,0x8b,0xdf,0xdf,0x73,0x00,0x00,0x06,
+   0x01}}, /* 0x32 */
+ {{0x7f,0x63,0x63,0x83,0x69,0x13,0x6f,0xba,
+   0x26,0x89,0xdf,0xdf,0x6f,0x00,0x00,0x06,
+   0x01}}, /* 0x33 */
+ {{0x7f,0x63,0x63,0x82,0x6b,0x13,0x75,0xba,
+   0x29,0x8c,0xdf,0xdf,0x75,0x00,0x00,0x06,
+   0x01}}, /* 0x34 */
+ {{0xa3,0x7f,0x7f,0x87,0x86,0x97,0x24,0xf1,
+   0xaf,0x85,0x3f,0x3f,0x25,0x30,0x00,0x02,
+   0x01}}, /* 0x35 */
+ {{0x9f,0x7f,0x7f,0x83,0x85,0x91,0x1e,0xf1,
+   0xad,0x81,0x3f,0x3f,0x1f,0x30,0x00,0x02,
+   0x01}}, /* 0x36 */
+ {{0xa7,0x7f,0x7f,0x88,0x89,0x95,0x26,0xf1,   /* TW: 95 was 15 - illegal HBE! */
+   0xb1,0x85,0x3f,0x3f,0x27,0x30,0x00,0x02,
+   0x01}}, /* 0x37 */
+ {{0xce,0x9f,0x9f,0x92,0xa9,0x17,0x28,0xc4,
+   0x7a,0x8e,0xcf,0xcf,0x29,0x21,0x00,0x07,
+   0x01}}, /* 0x38 */
+ {{0xce,0x9f,0x9f,0x92,0xa5,0x17,0x28,0xd4,
+   0x7a,0x8e,0xcf,0xcf,0x29,0x21,0x00,0x07,
+   0x01}}, /* 0x39 */
+ {{0xd3,0x9f,0x9f,0x97,0xab,0x1f,0x2e,0xd4,
+   0x7d,0x81,0xcf,0xcf,0x2f,0x21,0x00,0x07,
+   0x01}}, /* 0x3a */
+#if 0   
+ {{0xdc,0x9f,0x9f,0x00,0xab,0x19,0xe6,0xef,	/* 1280x960 - invalid */
+   0xc0,0xc3,0xbf,0xbf,0xe7,0x10,0x00,0x07,
+   0x01}}, /* 0x3b */
+#endif  
+ {{0xdc,0x9f,0x9f,0x80,0xaf,0x9d,0xe6,0xff,	/* 1280x960-60 - corrected */
+   0xc0,0x83,0xbf,0xbf,0xe7,0x10,0x00,0x07,
+   0x01}}, /* 0x3b */ 
+ {{0x6b,0x59,0x59,0x8f,0x5e,0x8c,0x0b,0x3e,
+   0xe9,0x8b,0xdf,0xe7,0x04,0x00,0x00,0x05,
+   0x00}}, /* 0x3c */
+ {{0x7b,0x59,0x63,0x9f,0x6a,0x93,0x6f,0xf0,
+   0x58,0x8a,0x3f,0x57,0x70,0x20,0x00,0x05,
+   0x01}}, /* 0x3d */
+ {{0x86,0x6a,0x6a,0x8a,0x74,0x06,0x8c,0x15,
+   0x4f,0x83,0xef,0xef,0x8d,0x30,0x00,0x02,
+   0x00}}, /* 0x3e */
+ {{0x81,0x6a,0x6a,0x85,0x70,0x00,0x0f,0x3e,
+   0xeb,0x8e,0xdf,0xdf,0x10,0x00,0x00,0x02,
+   0x00}}, /* 0x3f */
+ {{0xa3,0x7f,0x7f,0x87,0x86,0x97,0x1e,0xf1,   /* TW: The following from 650/LVDS BIOS */
+   0xae,0x85,0x57,0x57,0x1f,0x30,0x00,0x02,
+   0x01}},  /* 0x40 */
+ {{0xa3,0x7f,0x7f,0x87,0x86,0x97,0x24,0xf5,
+   0x02,0x88,0xff,0xff,0x25,0x10,0x00,0x02,
+   0x01}},  /* 0x41 */
+ {{0xce,0x9f,0x9f,0x92,0xa9,0x17,0x20,0xf5,
+   0x03,0x88,0xff,0xff,0x21,0x10,0x00,0x07,
+   0x01}},  /* 0x42 */
+ {{0xe6,0xae,0xae,0x8a,0xbd,0x90,0x3d,0x10,
+   0x1a,0x8d,0x19,0x19,0x3e,0x2f,0x00,0x03,
+   0x00}},  /* 0x43 */
+ {{0xc3,0x8f,0x8f,0x87,0x9b,0x0b,0x82,0xef, /* TW: New, 1152x864-75, not in any BIOS */
+   0x60,0x83,0x5f,0x5f,0x83,0x10,0x00,0x07,
+   0x01}},  /* 0x44 */
+ {{0x86,0x69,0x69,0x8A,0x74,0x06,0x8C,0x15, /* TW: New, 848x480-38i, not in BIOS */
+   0x4F,0x83,0xEF,0xEF,0x8D,0x30,0x00,0x02,
+   0x00}},  /* 0x45 */
+#if 0
+ {{0x81,0x69,0x69,0x85,0x70,0x00,0x0F,0x3E, /* TW: New, 848x480-60, not in BIOS - incorrect for Philips panel */
+   0xEB,0x8E,0xDF,0xDF,0x10,0x00,0x00,0x02,
+   0x00}},  /* 0x46 */
+#endif   
+ {{0x83,0x69,0x69,0x87,0x6f,0x1d,0x03,0x3E, /* TW: New, 848x480-60, not in BIOS */
+   0xE5,0x8d,0xDF,0xe4,0x04,0x00,0x00,0x06,
+   0x00}},  /* 0x46 */
+ {{0x86,0x6A,0x6A,0x8A,0x74,0x06,0x8C,0x15, /* TW: New, 856x480-38i, not in BIOS */
+   0x4F,0x83,0xEF,0xEF,0x8D,0x30,0x00,0x02,
+   0x00}},  /* 0x47 */
+ {{0x81,0x6A,0x6A,0x85,0x70,0x00,0x0F,0x3E, /* TW: New, 856x480-60, not in BIOS */
+   0xEB,0x8E,0xDF,0xDF,0x10,0x00,0x00,0x02,
+   0x00}},  /* 0x48 */
+ {{0xdd,0xa9,0xa9,0x81,0xb4,0x97,0x26,0xfd, /* TW: New, 1360x768-60, not in BIOS */
+   0x01,0x8d,0xff,0x00,0x27,0x10,0x00,0x03,
+   0x01}},  /* 0x49 */
+ {{0xd9,0x8f,0x8f,0x9d,0xba,0x0a,0x8a,0xff, /* TW: New, 1152x864-84, not in any BIOS   */
+   0x60,0x8b,0x5f,0x5f,0x8b,0x10,0x00,0x03,
+   0x01}},  /* 0x4a */
+ {{0xea,0xae,0xae,0x8e,0xba,0x82,0x40,0x10, /* TW: New, 1400x1050-75, not in any BIOS  */
+   0x1b,0x87,0x19,0x1a,0x41,0x0f,0x00,0x03,
+   0x00}},  /* 0x4b */ 
+ {{0xd3,0x9f,0x9f,0x97,0xab,0x1f,0xf1,0xff, /* TW: New, 1280x960-85, not in any BIOS */
+   0xc0,0x83,0xbf,0xbf,0xf2,0x10,0x00,0x07,
+   0x01}}   /* 0x4c */
+};
+
+
+typedef struct _SiS310_MCLKDataStruct
+{
+	UCHAR SR28,SR29,SR2A;
+	USHORT CLOCK;
+} SiS310_MCLKDataStruct;
+
+static const SiS310_MCLKDataStruct SiS310_MCLKData_0_315[] =
+{
+	{ 0x3b,0x22,0x01,143},   /* TW: Was { 0x5c,0x23,0x01,166}, */
+	{ 0x5c,0x23,0x01,166},
+	{ 0x5c,0x23,0x01,166},
+	{ 0x5c,0x23,0x01,166},
+	{ 0x5c,0x23,0x01,166},
+	{ 0x5c,0x23,0x01,166},
+	{ 0x5c,0x23,0x01,166},
+	{ 0x5c,0x23,0x01,166}
+};
+
+static const SiS310_MCLKDataStruct SiS310_MCLKData_0_650[] =	/* @ 0x54 */
+{
+	{ 0x5a,0x64,0x82, 66},
+	{ 0xb3,0x45,0x82, 83},
+	{ 0x37,0x61,0x82,100},
+	{ 0x37,0x22,0x82,133},
+	{ 0x37,0x61,0x82,100},
+	{ 0x37,0x22,0x82,133},
+	{ 0x37,0x22,0x82,133},
+	{ 0x37,0x22,0x82,133}
+};
+
+static const SiS310_MCLKDataStruct SiS310_MCLKData_0_330[] =   /* @ 0x54 */
+{
+	{ 0x5c,0x23,0x01,166},
+	{ 0x5c,0x23,0x01,166},
+	{ 0x7c,0x08,0x01,200},
+	{ 0x79,0x06,0x01,250},
+	{ 0x7c,0x08,0x01,200},
+	{ 0x7c,0x08,0x01,200},
+	{ 0x7c,0x08,0x01,200},
+	{ 0x79,0x06,0x01,250}
+};
+
+static const SiS310_MCLKDataStruct SiS310_MCLKData_1[] =	/* @ 0x155 */
+{
+        { 0x29,0x21,0x82,150},
+	{ 0x5c,0x23,0x82,166},
+	{ 0x65,0x23,0x82,183},
+	{ 0x37,0x21,0x82,200},
+	{ 0x37,0x22,0x82,133},
+	{ 0x37,0x22,0x82,133},
+	{ 0x37,0x22,0x82,133},
+	{ 0x37,0x22,0x82,133}
+};
+
+typedef struct _SiS310_ECLKDataStruct
+{
+ 	UCHAR SR2E,SR2F,SR30;
+ 	USHORT CLOCK;
+} SiS310_ECLKDataStruct;
+
+static const SiS310_ECLKDataStruct SiS310_ECLKData[]=
+{
+	{ 0x5c,0x23,0x01,166},
+	{ 0x5c,0x23,0x01,166},
+	{ 0x5c,0x23,0x01,166},
+	{ 0x5c,0x23,0x01,166}
+};
+
+typedef struct _SiS310_VCLKDataStruct
+{
+	UCHAR SR2B,SR2C;
+	USHORT CLOCK;
+} SiS310_VCLKDataStruct;
+
+static const SiS310_VCLKDataStruct SiS310_VCLKData[]=
+{
+	{ 0x1b,0xe1, 25}, /* 0x0 */   /* 650/LVDS BIOS: @ 0x5647 */
+	{ 0x4e,0xe4, 28}, /* 0x1 */
+	{ 0x57,0xe4, 31}, /* 0x2 */
+	{ 0xc3,0xc8, 36}, /* 0x3 */
+	{ 0x42,0xe2, 40}, /* 0x4 */
+	{ 0xfe,0xcd, 43}, /* 0x5 */
+	{ 0x5d,0xc4, 44}, /* 0x6 */
+	{ 0x52,0xe2, 49}, /* 0x7 */
+	{ 0x53,0xe2, 50}, /* 0x8 */
+	{ 0x74,0x67, 52}, /* 0x9 */
+	{ 0x6d,0x66, 56}, /* 0xa */
+	{ 0x5a,0x64, 65}, /* 0xb */   /* TW: was 6c c3 - WRONG */
+	{ 0x46,0x44, 67}, /* 0xc */
+	{ 0xb1,0x46, 68}, /* 0xd */
+	{ 0xd3,0x4a, 72}, /* 0xe */
+	{ 0x29,0x61, 75}, /* 0xf */
+	{ 0x6e,0x46, 76}, /* 0x10 */
+	{ 0x2b,0x61, 78}, /* 0x11 */
+	{ 0x31,0x42, 79}, /* 0x12 */
+	{ 0xab,0x44, 83}, /* 0x13 */
+	{ 0x46,0x25, 84}, /* 0x14 */
+	{ 0x78,0x29, 86}, /* 0x15 */
+	{ 0x62,0x44, 94}, /* 0x16 */
+	{ 0x2b,0x41,104}, /* 0x17 */
+	{ 0x3a,0x23,105}, /* 0x18 */
+	{ 0x70,0x44,108}, /* 0x19 */
+	{ 0x3c,0x23,109}, /* 0x1a */
+	{ 0x5e,0x43,113}, /* 0x1b */
+	{ 0xbc,0x44,116}, /* 0x1c */
+	{ 0xe0,0x46,132}, /* 0x1d */
+	{ 0x54,0x42,135}, /* 0x1e */
+	{ 0xea,0x2a,139}, /* 0x1f */
+	{ 0x41,0x22,157}, /* 0x20 */
+	{ 0x70,0x24,162}, /* 0x21 */
+	{ 0x30,0x21,175}, /* 0x22 */
+	{ 0x4e,0x22,189}, /* 0x23 */
+	{ 0xde,0x26,194}, /* 0x24 */
+	{ 0x62,0x06,202}, /* 0x25 */
+	{ 0x3f,0x03,229}, /* 0x26 */
+	{ 0xb8,0x06,234}, /* 0x27 */
+	{ 0x34,0x02,253}, /* 0x28 */
+	{ 0x58,0x04,255}, /* 0x29 */
+	{ 0x24,0x01,265}, /* 0x2a */
+	{ 0x9b,0x02,267}, /* 0x2b */
+	{ 0x70,0x05,270}, /* 0x2c */
+	{ 0x25,0x01,272}, /* 0x2d */
+	{ 0x9c,0x02,277}, /* 0x2e */
+	{ 0x27,0x01,286}, /* 0x2f */
+	{ 0x3c,0x02,291}, /* 0x30 */
+	{ 0xef,0x0a,292}, /* 0x31 */
+	{ 0xf6,0x0a,310}, /* 0x32 */
+	{ 0x95,0x01,315}, /* 0x33 */
+	{ 0xf0,0x09,324}, /* 0x34 */
+	{ 0xfe,0x0a,331}, /* 0x35 */
+	{ 0xf3,0x09,332}, /* 0x36 */
+	{ 0xea,0x08,340}, /* 0x37 */
+	{ 0xe8,0x07,376}, /* 0x38 */
+	{ 0xde,0x06,389}, /* 0x39 */
+	{ 0x52,0x2a, 54}, /* 0x3a */
+	{ 0x52,0x6a, 27}, /* 0x3b */
+	{ 0x62,0x24, 70}, /* 0x3c */
+	{ 0x62,0x64, 70}, /* 0x3d */
+	{ 0xa8,0x4c, 30}, /* 0x3e */
+	{ 0x20,0x26, 33}, /* 0x3f */
+	{ 0x31,0xc2, 39}, /* 0x40 */
+	/* TW: 650/LVDS BIOS @ 0x574b new: */
+	{ 0x60,0x36, 30}, /* 0x41 */  /* Chrontel */
+	{ 0x40,0x4a, 28}, /* 0x42 */  /* Chrontel */
+	{ 0x9f,0x46, 44}, /* 0x43 */  /* Chrontel */
+	{ 0x97,0x2c, 26}, /* 0x44 */
+	{ 0x44,0xe4, 25}, /* 0x45 */  /* Chrontel */
+	{ 0x7e,0x32, 47}, /* 0x46 */  /* Chrontel */
+	{ 0x8a,0x24, 31}, /* 0x47 */  /* Chrontel */
+	{ 0x97,0x2c, 26}, /* 0x48 */  /* Chrontel */
+	{ 0xce,0x3c, 39}, /* 0x49 */
+	{ 0x52,0x4a, 36}, /* 0x4a */  /* Chrontel */
+	{ 0x34,0x61, 95}, /* 0x4b */
+	{ 0x78,0x27,108}, /* 0x4c - was 102 */  /* TW: Last entry in 650/301 BIOS */
+	{ 0x66,0x43,123}, /* 0x4d */  /* Modes 0x26-0x28 (1400x1050) */
+	{ 0x41,0x4e, 21}, /* 0x4e */
+	{ 0xa1,0x4a, 29}, /* 0x4f */  /* Chrontel */
+	{ 0x19,0x42, 42}, /* 0x50 */
+	{ 0x54,0x46, 58}, /* 0x51 */  /* Chrontel */
+	{ 0x25,0x42, 61}, /* 0x52 */
+	{ 0x44,0x44, 66}, /* 0x53 */  /* Chrontel */
+	{ 0x3a,0x62, 70}, /* 0x54 */  /* Chrontel */
+	{ 0x62,0xc6, 34}, /* 0x55 - added for 848x480-60 (not in any BIOS) */
+	{ 0x6a,0xc6, 37}, /* 0x56 - added for 848x480-75 (not in any BIOS)    - TEMP */
+	{ 0xbf,0xc8, 35}, /* 0x57 - added for 856x480-38i,60 (not in any BIOS) */
+	{ 0x30,0x23, 88}, /* 0x58 - added for 1360x768-62 (is 60Hz!) (not in any BIOS)   - TEMP */
+	{ 0x52,0x07,149}, /* 0x59 - added for 1280x960-85 (Not in any BIOS) */
+	{ 0x56,0x07,156}  /* 0x5a - added for 1400x1050-75 */
+};
+
+typedef struct _SiS310_VBVCLKDataStruct
+{
+	UCHAR Part4_A,Part4_B;
+	USHORT CLOCK;
+} SiS310_VBVCLKDataStruct;
+
+static const SiS310_VBVCLKDataStruct SiS310_VBVCLKData[]=
+{
+	{ 0x1b,0xe1, 25}, /* 0x0 */   /* 650/LVDS BIOS: @ 0x579c */
+	{ 0x4e,0xe4, 28}, /* 0x1 */
+	{ 0x57,0xe4, 31}, /* 0x2 */
+	{ 0xc3,0xc8, 36}, /* 0x3 */
+	{ 0x42,0x47, 40}, /* 0x4 */
+	{ 0xfe,0xcd, 43}, /* 0x5 */
+	{ 0x5d,0xc4, 44}, /* 0x6 */
+	{ 0x52,0x47, 49}, /* 0x7 */
+	{ 0x53,0x47, 50}, /* 0x8 */
+	{ 0x74,0x67, 52}, /* 0x9 */
+	{ 0x6d,0x66, 56}, /* 0xa */
+	{ 0x35,0x62, 65}, /* 0xb */  /* Was 0x5a,0x64 - 650/LVDS+301 bios: 35,62  */
+	{ 0x46,0x44, 67}, /* 0xc */
+	{ 0xb1,0x46, 68}, /* 0xd */
+	{ 0xd3,0x4a, 72}, /* 0xe */
+	{ 0x29,0x61, 75}, /* 0xf */
+	{ 0x6d,0x46, 75}, /* 0x10 */
+	{ 0x41,0x43, 78}, /* 0x11 */
+	{ 0x31,0x42, 79}, /* 0x12 */
+	{ 0xab,0x44, 83}, /* 0x13 */
+	{ 0x46,0x25, 84}, /* 0x14 */
+	{ 0x78,0x29, 86}, /* 0x15 */
+	{ 0x62,0x44, 94}, /* 0x16 */
+	{ 0x2b,0x22,104}, /* 0x17 */
+	{ 0x49,0x24,105}, /* 0x18 */
+	{ 0xf8,0x2f,108}, /* 0x19 */
+	{ 0x3c,0x23,109}, /* 0x1a */
+	{ 0x5e,0x43,113}, /* 0x1b */
+	{ 0xbc,0x44,116}, /* 0x1c */
+	{ 0xe0,0x46,132}, /* 0x1d */
+	{ 0xd4,0x28,135}, /* 0x1e */
+	{ 0xea,0x2a,139}, /* 0x1f */
+	{ 0x41,0x22,157}, /* 0x20 */
+	{ 0x70,0x24,162}, /* 0x21 */
+	{ 0x30,0x21,175}, /* 0x22 */
+	{ 0x4e,0x22,189}, /* 0x23 */
+	{ 0xde,0x26,194}, /* 0x24 */
+	{ 0x70,0x07,202}, /* 0x25 */
+	{ 0x3f,0x03,229}, /* 0x26 */
+	{ 0xb8,0x06,234}, /* 0x27 */
+	{ 0x34,0x02,253}, /* 0x28 */
+	{ 0x58,0x04,255}, /* 0x29 */
+	{ 0x24,0x01,265}, /* 0x2a */
+	{ 0x9b,0x02,267}, /* 0x2b */
+	{ 0x70,0x05,270}, /* 0x2c */
+	{ 0x25,0x01,272}, /* 0x2d */
+	{ 0x9c,0x02,277}, /* 0x2e */
+	{ 0x27,0x01,286}, /* 0x2f */
+	{ 0x3c,0x02,291}, /* 0x30 */
+	{ 0xef,0x0a,292}, /* 0x31 */
+	{ 0xf6,0x0a,310}, /* 0x32 */
+	{ 0x95,0x01,315}, /* 0x33 */
+	{ 0xf0,0x09,324}, /* 0x34 */
+	{ 0xfe,0x0a,331}, /* 0x35 */
+	{ 0xf3,0x09,332}, /* 0x36 */
+	{ 0xea,0x08,340}, /* 0x37 */
+	{ 0xe8,0x07,376}, /* 0x38 */
+	{ 0xde,0x06,389}, /* 0x39 */
+	{ 0x52,0x2a, 54}, /* 0x3a */
+	{ 0x52,0x6a, 27}, /* 0x3b */
+	{ 0x62,0x24, 70}, /* 0x3c */
+	{ 0x62,0x64, 70}, /* 0x3d */
+	{ 0xa8,0x4c, 30}, /* 0x3e */
+	{ 0x20,0x26, 33}, /* 0x3f */
+	{ 0x31,0xc2, 39}, /* 0x40 */
+	/* TW: 650/LVDS+301 BIOS (@ 0x58a0 in LVDS) new: */
+	{ 0x2e,0x48, 25}, /* 0x41 */
+	{ 0x24,0x46, 25}, /* 0x42 */
+	{ 0x26,0x64, 28}, /* 0x43 */
+	{ 0x37,0x64, 40}, /* 0x44 */
+	{ 0xa1,0x42,108}, /* 0x45 */
+	{ 0x37,0x61,100}, /* 0x46 */
+	{ 0x78,0x27,108}  /* 0x47 */
+	/* --- 0x58bc --- */
+};
+
+static const UCHAR SiS310_ScreenOffset[] = 
+{
+        0x14,0x19,0x20,0x28,0x32,0x40,0x50,0x64,
+	0x78,0x80,0x2d,0x35,0x57,0x48,0x55,
+	0xff
+};      /* TW: Added 1400x1050, 1152x864, 848/856x480, 1360x768 */
+
+typedef struct _SiS310_StResInfoStruct
+{
+	USHORT HTotal;
+	USHORT VTotal;
+} SiS310_StResInfoStruct;
+
+static const SiS310_StResInfoStruct SiS310_StResInfo[]=
+{
+	{ 640,400},
+	{ 640,350},
+	{ 720,400},
+	{ 720,350},
+	{ 640,480}
+};
+
+typedef struct _SiS310_ModeResInfoStruct
+{
+	USHORT HTotal;
+	USHORT VTotal;
+	UCHAR  XChar;
+	UCHAR  YChar;
+} SiS310_ModeResInfoStruct;
+
+static const SiS310_ModeResInfoStruct SiS310_ModeResInfo[] =
+{
+	{  320, 200, 8, 8},   /* 0x00 */
+	{  320, 240, 8, 8},   /* 0x01 */
+	{  320, 400, 8, 8},   /* 0x02 */
+	{  400, 300, 8, 8},   /* 0x03 */
+	{  512, 384, 8, 8},   /* 0x04 */
+	{  640, 400, 8,16},   /* 0x05 */
+	{  640, 480, 8,16},   /* 0x06 */
+	{  800, 600, 8,16},   /* 0x07 */
+	{ 1024, 768, 8,16},   /* 0x08 */
+	{ 1280,1024, 8,16},   /* 0x09 */
+	{ 1600,1200, 8,16},   /* 0x0a */
+	{ 1920,1440, 8,16},   /* 0x0b */
+	{ 2048,1536, 8,16},   /* 0x0c */
+	{  720, 480, 8,16},   /* 0x0d */
+	{  720, 576, 8,16},   /* 0x0e */
+	{ 1280, 960, 8,16},   /* 0x0f */
+	{  800, 480, 8,16},   /* 0x10 */
+	{ 1024, 576, 8,16},   /* 0x11 */
+	{ 1280, 720, 8,16},   /* 0x12 */
+	{  856, 480, 8,16},   /* 0x13 - TW: New, not in any BIOS */
+	{ 1280, 768, 8,16},   /* 0x14 20; TW: New */
+	{ 1400,1050, 8,16},   /* 0x15 21; TW: New */
+	{ 1152, 864, 8,16},   /* 0x16 - TW: New, not in any BIOS */
+	{  848, 480, 8,16},   /* 0x17 - TW: New, not in any BIOS */
+	{ 1360, 768, 8,16}    /* 0x18 - TW: New, not in any BIOS */
+};
+
+static const UCHAR SiS310_OutputSelect = 0x40;
+
+static const UCHAR SiS310_SoftSetting  = 0x30;   /* TW: RAM setting */
+
+static const UCHAR SiS310_SR15[8][4]={
+	{0x00,0x04,0x60,0x60},
+	{0x0f,0x0f,0x0f,0x0f},
+	{0xba,0xba,0xba,0xba},
+	{0xa9,0xa9,0xac,0xac},
+	{0xa0,0xa0,0xa0,0xa8},
+	{0x00,0x00,0x02,0x02},
+ 	{0x30,0x30,0x40,0x40},
+	{0x00,0xa5,0xfb,0xf6}
+};
+
+#ifndef LINUX_XF86
+
+static UCHAR SiS310_SR07 = 0x18;
+
+static const UCHAR SiS310_CR40[5][4]={
+	{0x77,0x77,0x33,0x33},
+	{0x77,0x77,0x33,0x33},
+	{0x00,0x00,0x00,0x00},
+	{0x5b,0x5b,0x03,0x03},
+	{0x00,0x00,0xf0,0xf8}
+};
+
+static UCHAR SiS310_CR49[] = {0xaa,0x88};
+static UCHAR SiS310_SR1F = 0x00;
+static UCHAR SiS310_SR21 = 0xa5;
+static UCHAR SiS310_SR22 = 0xfb;
+static UCHAR SiS310_SR23 = 0xf6;
+static UCHAR SiS310_SR24 = 0x0d;
+static UCHAR SiS310_SR25[] = {0x33,0x3};
+static UCHAR SiS310_SR31 = 0x00;
+static UCHAR SiS310_SR32 = 0x11;
+static UCHAR SiS310_SR33 = 0x00;
+static UCHAR SiS310_CRT2Data_1_2  = 0x00;
+static UCHAR SiS310_CRT2Data_4_D  = 0x00;
+static UCHAR SiS310_CRT2Data_4_E  = 0x00;
+static UCHAR SiS310_CRT2Data_4_10 = 0x80;
+static const USHORT SiS310_RGBSenseData    = 0xd1;
+static const USHORT SiS310_VideoSenseData  = 0xb9;
+static const USHORT SiS310_YCSenseData     = 0xb3;
+static const USHORT SiS310_RGBSenseData2   = 0x0190;     /*301b*/
+static const USHORT SiS310_VideoSenseData2 = 0x0174;
+static const USHORT SiS310_YCSenseData2    = 0x016b;
+#endif
+
+static const UCHAR SiS310_NTSCPhase[]    = {0x21,0xed,0xba,0x08};  /* TW: Was {0x21,0xed,0x8a,0x08}; */
+static const UCHAR SiS310_PALPhase[]     = {0x2a,0x05,0xe3,0x00};  /* TW: Was {0x2a,0x05,0xd3,0x00}; */
+static const UCHAR SiS310_PALMPhase[]    = {0x21,0xE4,0x2E,0x9B};  /* TW: palm*/
+static const UCHAR SiS310_PALNPhase[]    = {0x21,0xF4,0x3E,0xBA};  /* TW: paln*/
+static const UCHAR SiS310_NTSCPhase2[]   = {0x21,0xF0,0x7B,0xD6};
+static const UCHAR SiS310_PALPhase2[]    = {0x2a,0x09,0x86,0xe9};
+static const UCHAR SiS310_PALMPhase2[]   = {0x21,0xE6,0xEF,0xA4};  /* TW: palm 301b*/
+static const UCHAR SiS310_PALNPhase2[]   = {0x21,0xF6,0x94,0x46};  /* TW: paln 301b*/
+static const UCHAR SiS310_SpecialPhase[] = {0x1e,0x8c,0x5c,0x7a};
+
+typedef struct _SiS310_LCDDataStruct
+{
+	USHORT RVBHCMAX;
+	USHORT RVBHCFACT;
+	USHORT VGAHT;
+	USHORT VGAVT;
+	USHORT LCDHT;
+	USHORT LCDVT;
+} SiS310_LCDDataStruct;
+
+static const SiS310_LCDDataStruct  SiS310_StLCD1024x768Data[]=
+{
+	{   62,  25, 800, 546,1344, 806},
+	{   32,  15, 930, 546,1344, 806},
+	{   32,  15, 930, 546,1344, 806},
+	{  104,  45, 945, 496,1344, 806},
+	{   62,  25, 800, 546,1344, 806},
+	{   31,  18,1008, 624,1344, 806},
+	{    1,   1,1344, 806,1344, 806}
+};
+
+static const SiS310_LCDDataStruct  SiS310_ExtLCD1024x768Data[] =   /* TW: Checked */
+{
+	{   12,   5, 896, 512,1344, 806},
+	{   12,   5, 896, 510,1344, 806},
+	{   32,  15,1008, 505,1344, 806},
+	{   32,  15,1008, 514,1344, 806},
+	{   12,   5, 896, 500,1344, 806},
+	{   42,  25,1024, 625,1344, 806},
+	{    1,   1,1344, 806,1344, 806},
+	{   12,   5, 896, 500,1344, 806},
+	{   42,  25,1024, 625,1344, 806},
+	{    1,   1,1344, 806,1344, 806},
+	{   12,   5, 896, 500,1344, 806},
+	{   42,  25,1024, 625,1344, 806},
+	{    1,   1,1344, 806,1344, 806}
+};
+
+static const SiS310_LCDDataStruct  SiS310_St2LCD1024x768Data[] =  /* TW: Checked */
+{
+	{   62,  25, 800, 546,1344, 806},
+	{   32,  15, 930, 546,1344, 806},
+/*	{   32,  15, 930, 546,1344, 806},   */
+        {   62,  25, 800, 546,1344, 806},    /* TW: Different in 650/301LV BIOS */
+	{  104,  45, 945, 496,1344, 806},
+	{   62,  25, 800, 546,1344, 806},
+	{   31,  18,1008, 624,1344, 806},
+	{    1,   1,1344, 806,1344, 806}
+};
+
+static const SiS310_LCDDataStruct  SiS310_StLCD1280x1024Data[] =
+{
+	{   22,   5, 800, 510,1650,1088},
+	{   22,   5, 800, 510,1650,1088},
+	{  176,  45, 900, 510,1650,1088},
+	{  176,  45, 900, 510,1650,1088},
+	{   22,   5, 800, 510,1650,1088},
+	{   13,   5,1024, 675,1560,1152},
+	{   16,   9,1266, 804,1688,1072},
+	{    1,   1,1688,1066,1688,1066}
+};
+
+static const SiS310_LCDDataStruct  SiS310_ExtLCD1280x1024Data[] =  /* TW: Checked */
+{
+	{  211,  60,1024, 501,1688,1066},
+	{  211,  60,1024, 508,1688,1066},
+	{  211,  60,1024, 501,1688,1066},
+	{  211,  60,1024, 508,1688,1066},
+	{  211,  60,1024, 500,1688,1066},
+	{  211,  75,1024, 625,1688,1066},
+	{  211, 120,1280, 798,1688,1066},
+	{    1,   1,1688,1066,1688,1066}
+};
+
+static const SiS310_LCDDataStruct  SiS310_St2LCD1280x1024Data[] =
+{
+	{   22,   5, 800, 510,1650,1088},
+	{   22,   5, 800, 510,1650,1088},
+	{  176,  45, 900, 510,1650,1088},
+	{  176,  45, 900, 510,1650,1088},
+	{   22,   5, 800, 510,1650,1088},
+	{   13,   5,1024, 675,1560,1152},
+	{   16,   9,1266, 804,1688,1072},
+	{    1,   1,1688,1066,1688,1066}
+};
+
+static const SiS310_LCDDataStruct  SiS310_NoScaleData1024x768[] =  /* TW: Checked */
+{
+        {    1,   1,1344, 806,1344, 806},
+	{    1,   1,1344, 806,1344, 806},
+	{    1,   1,1344, 806,1344, 806},
+	{    1,   1,1344, 806,1344, 806},
+	{    1,   1,1344, 806,1344, 806},
+	{    1,   1,1344, 806,1344, 806},
+	{    1,   1,1344, 806,1344, 806},
+	{    1,   1,1344, 806,1344, 806}
+};
+
+static const SiS310_LCDDataStruct  SiS310_NoScaleData1280x1024[] =  /* TW: New; Checked */
+{
+        {    1,   1,1688,1066,1688,1066},
+	{    1,   1,1688,1066,1688,1066},
+	{    1,   1,1688,1066,1688,1066},
+	{    1,   1,1688,1066,1688,1066},
+	{    1,   1,1688,1066,1688,1066},
+	{    1,   1,1688,1066,1688,1066},
+	{    1,   1,1688,1066,1688,1066},
+	{    1,   1,1688,1066,1688,1066}
+};
+
+static const SiS310_LCDDataStruct  SiS310_LCD1280x960Data[] =
+{
+	{    9,   2, 800, 500,1800,1000},
+	{    9,   2, 800, 500,1800,1000},
+	{    4,   1, 900, 500,1800,1000},
+	{    4,   1, 900, 500,1800,1000},
+	{    9,   2, 800, 500,1800,1000},
+	{   30,  11,1056, 625,1800,1000},
+	{    5,   3,1350, 800,1800,1000},
+	{    1,   1,1576,1050,1576,1050},
+	{    1,   1,1800,1000,1800,1000}
+};
+
+static const SiS310_LCDDataStruct  SiS310_StLCD1400x1050Data[] =  /* TW: New */
+{  /* TW: New from 1.11.6s */
+	{ 211,  100, 2100,  408, 1688, 1066 },
+	{ 211,   64, 1536,  358, 1688, 1066 },
+	{ 211,  100, 2100,  408, 1688, 1066 },
+	{ 211,   64, 1536,  358, 1688, 1066 },
+	{ 211,   48,  840,  488, 1688, 1066 },
+	{ 211,   72, 1008,  609, 1688, 1066 },
+	{ 211,  128, 1400,  776, 1688, 1066 },
+	{ 211,  205, 1680, 1041, 1688, 1066 },
+	{   1,    1, 1688, 1066, 1688, 1066 }
+};
+
+static const SiS310_LCDDataStruct  SiS310_ExtLCD1400x1050Data[] =  /* TW: New */
+{  /* TW: New from 1.11.6s */
+	{ 211,  100, 2100,  408, 1688, 1066 },
+	{ 211,   64, 1536,  358, 1688, 1066 },
+	{ 211,  100, 2100,  408, 1688, 1066 },
+	{ 211,   64, 1536,  358, 1688, 1066 },
+	{ 211,   48,  840,  488, 1688, 1066 },
+	{ 211,   72, 1008,  609, 1688, 1066 },
+	{ 211,  128, 1400,  776, 1688, 1066 },
+	{ 211,  205, 1680, 1041, 1688, 1066 },
+	{   1,    1, 1688, 1066, 1688, 1066 }
+};
+
+static const SiS310_LCDDataStruct  SiS310_NoScaleData1400x1050[] =  /* TW: New */
+{  /* TW: To be checked (BIOS uses 1280x1024 data, one line too short) */
+	{ 1, 1, 1688, 1066, 1688, 1066 },
+	{ 1, 1, 1688, 1066, 1688, 1066 },
+	{ 1, 1, 1688, 1066, 1688, 1066 },
+	{ 1, 1, 1688, 1066, 1688, 1066 },
+	{ 1, 1, 1688, 1066, 1688, 1066 },
+	{ 1, 1, 1688, 1066, 1688, 1066 },
+	{ 1, 1, 1688, 1066, 1688, 1066 },
+	{ 1, 1, 1688, 1066, 1688, 1066 },
+	{ 1, 1, 1688, 1066, 1688, 1066 }
+};
+
+static const SiS310_LCDDataStruct  SiS310_StLCD1600x1200Data[] =  /* TW: New */
+{  /* TODO */
+	{    0,   0,   0,   0,   0,   0}
+};
+
+static const SiS310_LCDDataStruct  SiS310_ExtLCD1600x1200Data[] =  /* TW: New */
+{  /* TODO */
+	{    0,   0,   0,   0,   0,   0}
+};
+
+static const SiS310_LCDDataStruct  SiS310_NoScaleData1600x1200[] =  /* TW: New */
+{  /* TODO */
+	{    0,   0,   0,   0,   0,   0}
+};
+
+typedef struct _SiS310_TVDataStruct
+{
+	USHORT RVBHCMAX;
+	USHORT RVBHCFACT;
+	USHORT VGAHT;
+	USHORT VGAVT;
+	USHORT TVHDE;
+	USHORT TVVDE;
+	USHORT RVBHRS;
+	UCHAR FlickerMode;
+	USHORT HALFRVBHRS;
+	UCHAR RY1COE;
+	UCHAR RY2COE;
+	UCHAR RY3COE;
+	UCHAR RY4COE;
+} SiS310_TVDataStruct;
+
+static const SiS310_TVDataStruct  SiS310_StPALData[]=
+{
+ {    1,   1, 864, 525,1270, 400, 100,   0, 760,0xf4,0xff,0x1c,0x22},
+ {    1,   1, 864, 525,1270, 350, 100,   0, 760,0xf4,0xff,0x1c,0x22},
+ {    1,   1, 864, 525,1270, 400,   0,   0, 720,0xf1,0x04,0x1f,0x18},
+ {    1,   1, 864, 525,1270, 350,   0,   0, 720,0xf4,0x0b,0x1c,0x0a},
+ {    1,   1, 864, 525,1270, 480,  50,   0, 760,0xf4,0xff,0x1c,0x22},
+ {    1,   1, 864, 525,1270, 600,  50,   0,   0,0xf4,0xff,0x1c,0x22}
+};
+
+static const SiS310_TVDataStruct  SiS310_ExtPALData[] =   /* TW: Verfied (1.10.7w) */
+{
+ {   27,  10, 848, 448,1270, 530,  50,   0,  50,0xf4,0xff,0x1c,0x22},
+ {  108,  35, 848, 398,1270, 530,  50,   0,  50,0xf4,0xff,0x1c,0x22},
+ {   12,   5, 954, 448,1270, 530,  50,   0,  50,0xf1,0x04,0x1f,0x18},
+ {    9,   4, 960, 463,1644, 438,  50,   0,  50,0xf4,0x0b,0x1c,0x0a},
+ {    9,   4, 848, 528,1270, 530,   0,   0,  50,0xf5,0xfb,0x1b,0x2a},  /* 640x480 */
+ {   36,  25,1060, 648,1316, 530, 438,   0, 438,0xeb,0x05,0x25,0x16},  /* 800x600 */
+ {    3,   2,1080, 619,1270, 540, 438,   0, 438,0xf3,0x00,0x1d,0x20},  /* 720x480/576 */
+ {    1,   1,1170, 821,1270, 520, 686,   0, 686,0xF3,0x00,0x1D,0x20}   /* 1024x768 */
+};
+
+static const SiS310_TVDataStruct  SiS310_StNTSCData[]=
+{
+ {    1,   1, 858, 525,1270, 400,  50,   0, 760,0xf1,0x04,0x1f,0x18},
+ {    1,   1, 858, 525,1270, 350,  50,   0, 640,0xf1,0x04,0x1f,0x18},
+ {    1,   1, 858, 525,1270, 400,   0,   0, 720,0xf1,0x04,0x1f,0x18},
+ {    1,   1, 858, 525,1270, 350,   0,   0, 720,0xf4,0x0b,0x1c,0x0a},
+ {    1,   1, 858, 525,1270, 480,   0,   0, 760,0xf1,0x04,0x1f,0x18}
+};
+
+static const SiS310_TVDataStruct  SiS310_ExtNTSCData[]=
+{
+ {  143,  65, 858, 443,1270, 440, 171,   0, 171,0xf1,0x04,0x1f,0x18},
+ {   88,  35, 858, 393,1270, 440, 171,   0, 171,0xf1,0x04,0x1f,0x18},
+ {  143,  70, 924, 443,1270, 440,  92,   0,  92,0xf1,0x04,0x1f,0x18},
+ {  143,  70, 924, 393,1270, 440,  92,   0,  92,0xf4,0x0b,0x1c,0x0a},
+ {  143,  76, 836, 523,1270, 440, 224,   0,   0,0xf1,0x05,0x1f,0x16},  /* 640x480 */
+ {  143, 120,1056, 643,1270, 440,   0, 128,   0,0xf4,0x10,0x1c,0x00},  /* 800x600  */
+ {    2,   1, 858, 503,1270, 480,   0, 128,   0,0xee,0x0c,0x22,0x08},  /* 720x480/576 */
+ {   65,  64,1056, 791,1270, 480, 638,   0,   0,0xEE,0x0C,0x22,0x08}   /* 1024x768 */
+};
+
+/* TW: These tables will need data ! */
+static const SiS310_TVDataStruct  SiS310_St1HiTVData[]=
+{
+   	{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}
+};
+
+static const SiS310_TVDataStruct  SiS310_St2HiTVData[]=
+{
+	{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}
+};
+
+static const SiS310_TVDataStruct  SiS310_ExtHiTVData[]=
+{
+	{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}
+};
+
+static const UCHAR SiS310_NTSCTiming[] = {   /* TW: New (checked 1.09, 1.10.6s) */
+	0x17,0x1d,0x03,0x09,0x05,0x06,0x0c,0x0c,
+	0x94,0x49,0x01,0x0a,0x06,0x0d,0x04,0x0a,
+	0x06,0x14,0x0d,0x04,0x0a,0x00,0x85,0x1b,
+	0x0c,0x50,0x00,0x97,0x00,0xda,0x4a,0x17,
+	0x7d,0x05,0x4b,0x00,0x00,0xe2,0x00,0x02,
+	0x03,0x0a,0x65,0x9d,0x08,0x92,0x8f,0x40,
+	0x60,0x80,0x14,0x90,0x8c,0x60,0x14,0x50,
+	0x00,0x40,0x44,0x00,0xdb,0x02,0x3b,0x00
+};
+
+static const UCHAR SiS310_PALTiming[] = {   /* TW: New (checked 1.09, 1.10.6s) */
+	0x19,0x52,0x35,0x6e,0x04,0x38,0x3d,0x70,
+	0x94,0x49,0x01,0x12,0x06,0x3e,0x35,0x6d,
+	0x06,0x14,0x3e,0x35,0x6d,0x00,0x45,0x2b,
+	0x70,0x50,0x00,0x9b,0x00,0xd9,0x5d,0x17,
+	0x7d,0x05,0x45,0x00,0x00,0xe8,0x00,0x02,
+	0x0d,0x00,0x68,0xb0,0x0b,0x92,0x8f,0x40,
+	0x60,0x80,0x14,0x90,0x8c,0x60,0x14,0x63,
+	0x00,0x40,0x3e,0x00,0xe1,0x02,0x28,0x00
+};
+
+#ifdef oldHV
+static const UCHAR SiS310_HiTVExtTiming[] = {   /* TW: New */
+        0x32,0x65,0x2c,0x5f,0x08,0x31,0x3a,0x64,
+	0x28,0x02,0x01,0x3d,0x06,0x3e,0x35,0x6d,
+	0x06,0x14,0x3e,0x35,0x6d,0x00,0xc5,0x3f,
+	0x64,0x90,0x33,0x8c,0x18,0x36,0x3e,0x13,
+	0x2a,0xde,0x2a,0x44,0x40,0x2a,0x44,0x40,
+	0x8e,0x8e,0x82,0x07,0x0b,0x92,0x0f,0x40,
+	0x60,0x80,0x14,0x90,0x8c,0x60,0x14,0x3d,
+	0x63,0x4f,0x27,0x00,0xfc,0xff,0x6a,0x00
+};
+
+static const UCHAR SiS310_HiTVSt1Timing[] = {   /* TW: New */
+        0x32,0x65,0x2c,0x5f,0x08,0x31,0x3a,0x65,
+	0x28,0x02,0x01,0x3d,0x06,0x3e,0x35,0x6d,
+	0x06,0x14,0x3e,0x35,0x6d,0x00,0xc5,0x3f,
+	0x65,0x90,0x7b,0xa8,0x03,0xf0,0x87,0x03,
+	0x11,0x15,0x11,0xcf,0x10,0x11,0xcf,0x10,
+	0x35,0x35,0x3b,0x69,0x1d,0x92,0x0f,0x40,
+	0x60,0x80,0x14,0x90,0x8c,0x60,0x04,0x86,
+	0xaf,0x5d,0x0e,0x00,0xfc,0xff,0x2d,0x00
+};
+
+static const UCHAR SiS310_HiTVSt2Timing[] = {   /* TW: New */
+        0x32,0x65,0x2c,0x5f,0x08,0x31,0x3a,0x64,
+	0x28,0x02,0x01,0x3d,0x06,0x3e,0x35,0x6d,
+	0x06,0x14,0x3e,0x35,0x6d,0x00,0xc5,0x3f,
+	0x64,0x90,0x33,0x8c,0x18,0x36,0x3e,0x13,
+	0x2a,0xde,0x2a,0x44,0x40,0x2a,0x44,0x40,
+	0x8e,0x8e,0x82,0x07,0x0b,0x92,0x0f,0x40,
+	0x60,0x80,0x14,0x90,0x8c,0x60,0x14,0x3d,
+	0x63,0x4f,0x27,0x00,0xfc,0xff,0x6a,0x00
+};
+
+static const UCHAR SiS310_HiTVTextTiming[] = {   /* TW: New */
+        0x32,0x65,0x2c,0x5f,0x08,0x31,0x3a,0x65,
+	0x28,0x02,0x01,0x3d,0x06,0x3e,0x35,0x6d,
+	0x06,0x14,0x3e,0x35,0x6d,0x00,0xc5,0x3f,
+	0x65,0x90,0xe7,0xbc,0x03,0x0c,0x97,0x03,
+	0x14,0x78,0x14,0x08,0x20,0x14,0x08,0x20,
+	0xc8,0xc8,0x3b,0xd2,0x26,0x92,0x0f,0x40,
+        0x60,0x80,0x14,0x90,0x8c,0x60,0x04,0x96,
+	0x72,0x5c,0x11,0x00,0xfc,0xff,0x32,0x00
+};
+
+static const UCHAR SiS310_HiTVGroup3Data[] = {   /* TW: New */
+        0x00,0x1a,0x22,0x63,0x62,0x22,0x08,0x5f,
+	0x05,0x21,0xb2,0xb2,0x55,0x77,0x2a,0xa6,
+	0x25,0x2f,0x47,0xfa,0xc8,0xff,0x8e,0x20,
+	0x8c,0x6e,0x60,0x2e,0x58,0x48,0x72,0x44,
+	0x56,0x36,0x4f,0x6e,0x3f,0x80,0x00,0x80,
+	0x4f,0x7f,0x03,0xa8,0x7d,0x20,0x1a,0xa9,
+	0x14,0x05,0x03,0x7e,0x64,0x31,0x14,0x75,
+	0x18,0x05,0x18,0x05,0x4c,0xa8,0x01
+};
+
+static const UCHAR SiS310_HiTVGroup3Simu[] = {   /* TW: New */
+        0x00,0x1a,0x22,0x63,0x62,0x22,0x08,0x95,
+	0xdb,0x20,0xb8,0xb8,0x55,0x47,0x2a,0xa6,
+	0x25,0x2f,0x47,0xfa,0xc8,0xff,0x8e,0x20,
+	0x8c,0x6e,0x60,0x15,0x26,0xd3,0xe4,0x11,
+	0x56,0x36,0x4f,0x6e,0x3f,0x80,0x00,0x80,
+	0x67,0x36,0x01,0x47,0x0e,0x10,0xbe,0xb4,
+	0x01,0x05,0x03,0x7e,0x65,0x31,0x14,0x75,
+	0x18,0x05,0x18,0x05,0x4c,0xa8,0x01
+};
+
+static const UCHAR SiS310_HiTVGroup3Text[] = {   /* TW: New */
+        0x00,0x1a,0x22,0x63,0x62,0x22,0x08,0xa7,
+	0xf5,0x20,0xce,0xce,0x55,0x47,0x2a,0xa6,
+	0x25,0x2f,0x47,0xfa,0xc8,0xff,0x8e,0x20,
+	0x8c,0x6e,0x60,0x18,0x2c,0x0c,0x20,0x22,
+	0x56,0x36,0x4f,0x6e,0x3f,0x80,0x00,0x80,
+	0x93,0x3c,0x01,0x50,0x2f,0x10,0xf4,0xca,
+	0x01,0x05,0x03,0x7e,0x65,0x31,0x14,0x75,
+	0x18,0x05,0x18,0x05,0x4c,0xa8,0x01
+};
+#endif
+
+typedef struct _SiS310_PanelDelayTblStruct
+{
+ 	UCHAR timer[2];
+} SiS310_PanelDelayTblStruct;
+
+static const SiS310_PanelDelayTblStruct SiS310_PanelDelayTbl[]=  /* TW: New */
+{
+        {{0x10,0x40}},		/* TW: from 650/301LVx 1.10.6s BIOS */
+	{{0x10,0x40}},
+	{{0x10,0x40}},
+	{{0x10,0x40}},
+	{{0x10,0x40}},
+	{{0x10,0x40}},
+	{{0x10,0x40}},
+	{{0x10,0x40}},
+	{{0x10,0x40}},
+	{{0x10,0x40}},
+	{{0x10,0x40}},
+	{{0x10,0x40}},
+	{{0x10,0x40}},
+	{{0x10,0x40}},
+	{{0x10,0x40}},
+	{{0x10,0x40}}
+#if 0
+	{{0x28,0xc8}},		/* TW: from 650/301LV BIOS */
+	{{0x28,0xc8}},
+	{{0x28,0xc8}},
+	{{0x28,0xc8}},
+	{{0x28,0xc8}},
+	{{0x28,0xc8}},
+	{{0x28,0xc8}},
+	{{0x28,0xc8}},
+	{{0x28,0xc8}},
+	{{0x28,0xc8}},
+	{{0x28,0xc8}},
+	{{0x28,0xc8}},
+	{{0x28,0xc8}},
+	{{0x28,0xc8}},
+	{{0x28,0xc8}},
+	{{0x28,0xc8}}
+#endif
+};
+
+static const SiS310_PanelDelayTblStruct SiS310_PanelDelayTblLVDS[]=
+{
+	{{0x28,0xc8}},
+	{{0x28,0xc8}},
+	{{0x28,0xc8}},
+	{{0x28,0xc8}},
+	{{0x28,0xc8}},
+	{{0x28,0xc8}},
+	{{0x28,0xc8}},
+	{{0x28,0xc8}},
+	{{0x28,0xc8}},
+	{{0x28,0xc8}},
+	{{0x28,0xc8}},
+	{{0x28,0xc8}},
+	{{0x28,0xc8}},
+	{{0x28,0xc8}},
+	{{0x28,0xc8}},
+	{{0x28,0xc8}}
+};
+
+typedef struct _SiS310_LVDSDataStruct
+{
+	USHORT VGAHT;
+	USHORT VGAVT;
+	USHORT LCDHT;
+	USHORT LCDVT;
+} SiS310_LVDSDataStruct;
+
+static const SiS310_LVDSDataStruct  SiS310_LVDS320x480Data_1[]=
+{
+	{848, 433,400, 525},
+	{848, 389,400, 525},
+	{848, 433,400, 525},
+	{848, 389,400, 525},
+	{848, 518,400, 525},
+	{1056,628,400, 525},
+	{400, 525,400, 525},
+	{800, 449,1000, 644},
+	{800, 525,1000, 635}
+};
+
+static const SiS310_LVDSDataStruct  SiS310_LVDS800x600Data_1[]=   /* TW: New */
+{
+	{848, 433,1060, 629},
+	{848, 389,1060, 629},
+	{848, 433,1060, 629},
+	{848, 389,1060, 629},
+	{848, 518,1060, 629},
+	{1056, 628,1056, 628},
+	{1056, 628,1056, 628},
+	{800, 449,1000, 644},
+	{800, 525,1000, 635}
+};
+
+static const SiS310_LVDSDataStruct  SiS310_LVDS800x600Data_2[]=   /* TW: New */
+{
+	{1056, 628,1056, 628},
+	{1056, 628,1056, 628},
+	{1056, 628,1056, 628},
+	{1056, 628,1056, 628},
+	{1056, 628,1056, 628},
+	{1056, 628,1056, 628},
+	{1056, 628,1056, 628},
+	{800, 449,1000, 644},
+	{800, 525,1000, 635}
+};
+
+static const SiS310_LVDSDataStruct  SiS310_LVDS1024x768Data_1[]=   /* TW: New */
+{
+	{840, 438,1344, 806},
+	{840, 409,1344, 806},
+	{840, 438,1344, 806},
+	{840, 409,1344, 806},
+	{840, 518,1344, 806},    /* 640x480 */
+	{1050, 638,1344, 806},   /* 800x600 */
+	{1344, 806,1344, 806},   /* 1024x768 */
+	{800, 449,1280, 801},
+	{800, 525,1280, 813}
+};
+
+static const SiS310_LVDSDataStruct  SiS310_LVDS1024x768Data_2[]=   /* TW: New */
+{
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{800, 449,1280, 801},
+	{800, 525,1280, 813}
+};
+
+static const SiS310_LVDSDataStruct  SiS310_LVDS1280x1024Data_1[]=   /* TW: New - TODO */
+{	/* TW: Temp data, invalid (is identical to 1024x768) */
+	{840, 438,1344, 806},
+	{840, 409,1344, 806},
+	{840, 438,1344, 806},
+	{840, 409,1344, 806},
+	{840, 518,1344, 806},
+	{1050, 638,1344, 806},
+	{1344, 806,1344, 806},
+	{800, 449,1280, 801},
+	{800, 525,1280, 813}
+};
+
+static const SiS310_LVDSDataStruct  SiS310_LVDS1280x1024Data_2[]=   /* TW: New - TODO */
+{	/* TW: Temp data, invalid (is identical to 1024x768) */
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{800, 449,1280, 801},
+	{800, 525,1280, 813}
+};
+
+static const SiS310_LVDSDataStruct  SiS310_LVDS1400x1050Data_1[]=   /* TW: New */
+{
+        {928, 416, 1688, 1066},
+	{928, 366, 1688, 1066},
+	{928, 416, 1688, 1066},
+	{928, 366, 1688, 1066},
+	{928, 496, 1688, 1066},
+	{1088, 616, 1688, 1066},
+	{1312, 784, 1688, 1066},
+	{1568, 1040, 1688, 1066},
+	{1688, 1066, 1688, 1066}
+};
+
+static const SiS310_LVDSDataStruct  SiS310_LVDS1400x1050Data_2[]=   /* TW: New */
+{
+        {1688,1066, 1688,1066},
+	{1688,1066, 1688,1066},
+	{1688,1066, 1688,1066},
+	{1688,1066, 1688,1066},
+	{1688,1066, 1688,1066},
+	{1688,1066, 1688,1066},
+	{1688,1066, 1688,1066},
+	{1688,1066, 1688,1066},
+	{1688,1066, 1688,1066},
+};
+
+static const SiS310_LVDSDataStruct  SiS310_LVDS1280x768Data_1[]=   /* TW: New - TODO */
+{	/* TW: Temp data, invalid (is identical to 1024x768) */
+	{840, 438,1344, 806},
+	{840, 409,1344, 806},
+	{840, 438,1344, 806},
+	{840, 409,1344, 806},
+	{840, 518,1344, 806},
+	{1050, 638,1344, 806},
+	{1344, 806,1344, 806},
+	{800, 449,1280, 801},
+	{800, 525,1280, 813}
+};
+
+static const SiS310_LVDSDataStruct  SiS310_LVDS1280x768Data_2[]=   /* TW: New - TODO */
+{	/* TW: Temp data, invalid (is identical to 1024x768) */
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{800, 449,1280, 801},
+	{800, 525,1280, 813}
+};
+
+/* TW: New: - from 300 series */
+static const SiS310_LVDSDataStruct  SiS310_LVDS1024x600Data_1[]=
+{
+	{840, 604,1344, 800},
+	{840, 560,1344, 800},
+	{840, 604,1344, 800},
+	{840, 560,1344, 800},
+	{840, 689,1344, 800},
+	{1050, 800,1344, 800},
+	{1344, 800,1344, 800},
+	{800, 449,1280, 801},
+	{800, 525,1280, 813}
+};
+
+/* TW: New: - from 300 series */
+static const SiS310_LVDSDataStruct  SiS310_LVDS1024x600Data_2[]=
+{
+	{1344, 800,1344, 800},
+	{1344, 800,1344, 800},
+	{1344, 800,1344, 800},
+	{1344, 800,1344, 800},
+	{1344, 800,1344, 800},
+	{1344, 800,1344, 800},
+	{1344, 800,1344, 800},
+	{800, 449,1280, 801},
+	{800, 525,1280, 813}
+};
+
+/* TW: New: - from 300 series */
+static const SiS310_LVDSDataStruct  SiS310_LVDS1152x768Data_1[]=
+{
+	{840, 438,1344, 806},
+	{840, 409,1344, 806},
+	{840, 438,1344, 806},
+	{840, 409,1344, 806},
+	{840, 518,1344, 806},
+	{1050, 638,1344, 806},
+	{1344, 806,1344, 806},
+	{800, 449,1280, 801},
+	{800, 525,1280, 813}
+};
+
+/* TW: New: - from 300 series */
+static const SiS310_LVDSDataStruct  SiS310_LVDS1152x768Data_2[]=
+{
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{800, 449,1280, 801},
+	{800, 525,1280, 813}
+};
+
+/* TW: New in 650/LVDS BIOS - pass 1:1 data */
+static const SiS310_LVDSDataStruct  SiS310_LVDSXXXxXXXData_1[]=   /* TW: New */
+{
+        { 800, 449, 800, 449},
+	{ 800, 449, 800, 449},
+	{ 900, 449, 900, 449},
+	{ 900, 449, 900, 449},
+	{ 800, 525, 800, 525},
+	{1056, 628,1056, 628},
+	{1344, 806,1344, 806},
+	{1688, 806,1688, 806}
+};
+
+static const SiS310_LVDSDataStruct  SiS310_LVDS640x480Data_1[]=   /* TW: New */
+{
+	{800, 449, 800, 449},
+	{800, 449, 800, 449},
+	{800, 449, 800, 449},
+	{800, 449, 800, 449},
+	{800, 525, 800, 525},
+	{1056, 628,1056, 628},
+	{1056, 628,1056, 628},
+	{1056, 628,1056, 628},
+	{1056, 628,1056, 628}
+};
+
+static const SiS310_LVDSDataStruct  SiS310_LVDS1280x960Data_1[]=   /* TW: New */
+{
+	{840, 438,1344, 806},
+	{840, 409,1344, 806},
+	{840, 438,1344, 806},
+	{840, 409,1344, 806},
+	{840, 518,1344, 806},
+	{1050, 638,1344, 806},
+	{1344, 806,1344, 806},
+	{800, 449,1280, 801},
+	{800, 525,1280, 813}
+};
+
+static const SiS310_LVDSDataStruct  SiS310_LVDS1280x960Data_2[]=   /* TW: New */
+{
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{800, 449,1280, 801},
+	{800, 525,1280, 813}
+};
+
+static const SiS310_LVDSDataStruct  SiS310_LCDA1400x1050Data_1[]=   /* TW: New */
+{	/* TW: Might be temporary (invalid) data */
+        {928, 416, 1688, 1066},
+	{928, 366, 1688, 1066},
+	{1008, 416, 1688, 1066},
+	{1008, 366, 1688, 1066},
+	{1200, 530, 1688, 1066},
+	{1088, 616, 1688, 1066},
+	{1312, 784, 1688, 1066},
+	{1568, 1040, 1688, 1066},
+	{1688, 1066, 1688, 1066}
+};
+
+static const SiS310_LVDSDataStruct  SiS310_LCDA1400x1050Data_2[]=   /* TW: New */
+{	/* TW: Temporary data. Not valid */
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{800, 449,1280, 801},
+	{800, 525,1280, 813}
+};
+
+static const SiS310_LVDSDataStruct  SiS310_LCDA1600x1200Data_1[]=   /* TW: New */
+{	/* TW: Temporary data. Not valid */
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{800, 449,1280, 801},
+	{800, 525,1280, 813}
+};
+
+static const SiS310_LVDSDataStruct  SiS310_LCDA1600x1200Data_2[]=   /* TW: New */
+{	/* TW: Temporary data. Not valid */
+	{0, 0, 0, 0},
+	{0, 0, 0, 0},
+	{0, 0, 0, 0},
+	{0, 0, 0, 0},
+	{0, 0, 0, 0},
+	{0, 0, 0, 0},
+	{0, 0, 0, 0},
+	{0, 0, 0, 0},
+	{0, 0, 0, 0},
+	{0, 0, 0, 0},
+	{0, 0, 0, 0},
+	{0, 0, 0, 0}
+};
+
+static const SiS310_LVDSDataStruct  SiS310_CHTVUNTSCData[]=   /* TW: New */
+{
+	{ 840, 600, 840, 600},
+	{ 840, 600, 840, 600},
+	{ 840, 600, 840, 600},
+	{ 840, 600, 840, 600},
+	{ 784, 600, 784, 600},
+	{1064, 750,1064, 750},
+        {1160, 945,1160, 945}           /* TW: For Ch7019 1024 */
+};
+
+static const SiS310_LVDSDataStruct  SiS310_CHTVONTSCData[]=   /* TW: New */
+{
+	{ 840, 525, 840, 525},
+	{ 840, 525, 840, 525},
+	{ 840, 525, 840, 525},
+	{ 840, 525, 840, 525},
+	{ 784, 525, 784, 525},
+	{1040, 700,1040, 700},
+        {1160, 840,1160, 840}          	/* TW: For Ch7019 1024 */
+};
+
+static const SiS310_LVDSDataStruct  SiS310_CHTVUPALData[]=   /* TW: New */
+{
+	{1008, 625,1008, 625},
+	{1008, 625,1008, 625},
+	{1008, 625,1008, 625},
+	{1008, 625,1008, 625},
+	{ 840, 625, 840, 625},
+	{ 960, 750, 960, 750},
+	{1400,1000,1400,1000}   	/*  TW: For Ch7019 1024 */
+};
+
+static const SiS310_LVDSDataStruct  SiS310_CHTVOPALData[]=   /* TW: New */
+{
+	{1008, 625,1008, 625},
+	{1008, 625,1008, 625},
+	{1008, 625,1008, 625},
+	{1008, 625,1008, 625},
+	{ 840, 625, 840, 625},
+	{ 944, 625, 944, 625},
+        {1400, 875,1400, 875}       	/*  TW: For Ch7019 1024 */
+};
+
+static const SiS310_LVDSDataStruct  SiS310_CHTVUPALMData[]=   /* TW: New */
+{
+	{ 840, 600, 840, 600},
+	{ 840, 600, 840, 600},
+	{ 840, 600, 840, 600},
+	{ 840, 600, 840, 600},
+	{ 784, 600, 784, 600},
+	{1064, 750,1064, 750},
+        {1160, 945,1160, 945}           /* TW: For Ch7019 1024 */
+};
+
+static const SiS310_LVDSDataStruct  SiS310_CHTVOPALMData[]=   /* TW: New */
+{
+	{ 840, 525, 840, 525},
+	{ 840, 525, 840, 525},
+	{ 840, 525, 840, 525},
+	{ 840, 525, 840, 525},
+	{ 784, 525, 784, 525},
+	{1040, 700,1040, 700},
+        {1160, 840,1160, 840}          	/* TW: For Ch7019 1024 */
+};
+
+static const SiS310_LVDSDataStruct  SiS310_CHTVUPALNData[]=   /* TW: New */
+{
+	{1008, 625,1008, 625},
+	{1008, 625,1008, 625},
+	{1008, 625,1008, 625},
+	{1008, 625,1008, 625},
+	{ 840, 625, 840, 625},
+	{ 960, 750, 960, 750},
+	{1400,1000,1400,1000}   	/*  TW: For Ch7019 1024 */
+};
+
+static const SiS310_LVDSDataStruct  SiS310_CHTVOPALNData[]=   /* TW: New */
+{
+	{1008, 625,1008, 625},
+	{1008, 625,1008, 625},
+	{1008, 625,1008, 625},
+	{1008, 625,1008, 625},
+	{ 840, 625, 840, 625},
+	{ 944, 625, 944, 625},
+        {1400, 875,1400, 875}       	/*  TW: For Ch7019 1024 */
+};
+
+static const SiS310_LVDSDataStruct  SiS310_CHTVSOPALData[]=   /* TW: New (super overscan - no effect on 7019) */
+{
+	{1008, 625,1008, 625},
+	{1008, 625,1008, 625},
+	{1008, 625,1008, 625},
+	{1008, 625,1008, 625},
+	{ 840, 625, 840, 625},
+	{ 944, 625, 944, 625},
+        {1400, 875,1400, 875}       	
+};
+
+typedef struct _SiS310_LVDSDesStruct
+{
+	USHORT LCDHDES;
+	USHORT LCDVDES;
+} SiS310_LVDSDesStruct;
+
+/* TW: PanelType arrays taken from 650/LVDS BIOS 1.10.0 */
+
+static const SiS310_LVDSDesStruct  SiS310_PanelType00_1[]=   /* TW: New */
+{
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0}
+};
+
+static const SiS310_LVDSDesStruct  SiS310_PanelType01_1[]=   /* TW: New */
+{
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 805},
+	{ 0, 0},
+	{ 0, 0}
+};
+
+static const SiS310_LVDSDesStruct  SiS310_PanelType02_1[]=   /* TW: New */
+{
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 1065},
+	{ 0, 0},
+	{ 0, 0}
+};
+
+
+static const SiS310_LVDSDesStruct  SiS310_PanelType03_1[]=   /* TW: New */
+{
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0}
+};
+
+static const SiS310_LVDSDesStruct  SiS310_PanelType04_1[]=   /* TW: New */
+{
+	{1343, 798},
+	{1343, 794},
+	{1343, 798},
+	{1343, 794},
+	{1343,   0},
+	{1343,   0},
+	{ 0, 805},
+	{ 0, 794},
+	{ 0,   0}
+};
+
+static const SiS310_LVDSDesStruct  SiS310_PanelType05_1[]=   /* TW: New */
+{
+	{1343, 798},
+	{1343, 794},
+	{1343, 798},
+	{1343, 794},
+	{1343,   0},
+	{1343,   0},
+	{ 0, 805},
+	{ 0, 794},
+	{ 0,   0}
+};
+
+static const SiS310_LVDSDesStruct  SiS310_PanelType06_1[]=   /* TW: New */
+{
+	{1343, 798},
+	{1343, 794},
+	{1343, 798},
+	{1343, 794},
+	{1343,   0},
+	{1343,   0},
+	{ 0, 805},
+	{ 0, 794},
+	{ 0,   0}
+};
+
+static const SiS310_LVDSDesStruct  SiS310_PanelType07_1[]=   /* TW: New */
+{
+	{1343, 798},
+	{1343, 794},
+	{1343, 798},
+	{1343, 794},
+	{1343,   0},
+	{1343,   0},
+	{ 0, 805},
+	{ 0, 794},
+	{ 0,   0}
+};
+
+static const SiS310_LVDSDesStruct  SiS310_PanelType08_1[]=   /* TW: New */
+{
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0}
+};
+
+static const SiS310_LVDSDesStruct  SiS310_PanelType09_1[]=   /* TW: New - to check (1280x768) */
+{
+	{ 0, 448},
+	{ 0, 448},
+	{ 0, 448},
+	{ 0, 448},
+	{ 0, 524},
+	{ 0, 627},
+	{ 0, 805},
+	{ 0, 805},
+};
+
+static const SiS310_LVDSDesStruct  SiS310_PanelType0a_1[]=   /* TW: New */
+{
+	{1059, 626},
+	{1059, 624},
+	{1059, 626},
+	{1059, 624},
+	{1059, 624},
+	{ 0, 627},
+	{ 0, 627},
+	{ 0,   0},
+	{ 0,   0}
+};
+
+static const SiS310_LVDSDesStruct  SiS310_PanelType0b_1[]=   /* TW: New */
+{
+	{1343, 798},
+	{1343, 794},
+	{1343, 798},
+	{1343, 794},
+	{1343,   0},
+	{1343,   0},
+	{ 0, 805},
+	{ 0, 794},
+	{ 0,   0}
+};
+
+static const SiS310_LVDSDesStruct  SiS310_PanelType0c_1[]=   /* TW: New */
+{
+	{1343, 798},
+	{1343, 794},
+	{1343, 798},
+	{1343, 794},
+	{1343,   0},
+	{1343,   0},
+	{ 0, 805},
+	{ 0, 794},
+	{ 0,   0}
+};
+
+static const SiS310_LVDSDesStruct  SiS310_PanelType0d_1[]=   /* TW: New */
+{
+	{1343, 798},
+	{1343, 794},
+	{1343, 798},
+	{1343, 794},
+	{1343,   0},
+	{1343,   0},
+	{ 0, 805},
+	{ 0, 794},
+	{ 0,   0}
+};
+
+static const SiS310_LVDSDesStruct  SiS310_PanelType0e_1[]=   /* TW: New */
+{
+	{1343, 798},
+	{1343, 794},
+	{1343, 798},
+	{1343, 794},
+	{1343,   0},
+	{1343,   0},
+	{ 0, 805},
+	{ 0, 794},
+	{ 0,   0}
+};
+
+static const SiS310_LVDSDesStruct  SiS310_PanelType0f_1[]=   /* TW: New */
+{
+	{1343, 798},
+	{1343, 794},
+	{1343, 798},
+	{1343, 794},
+	{1343,   0},
+	{1343,   0},
+	{ 0, 805},
+	{ 0, 794},
+	{ 0,   0}
+};
+
+static const SiS310_LVDSDesStruct  SiS310_PanelType00_2[]=   /* TW: New */
+{
+	{980, 528},
+	{980, 503},
+	{980, 528},
+	{980, 503},
+	{980, 568},
+	{ 0, 628},
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0}
+};
+
+static const SiS310_LVDSDesStruct  SiS310_PanelType01_2[]=   /* TW: New */
+{
+	{1152, 622},
+	{1152, 597},
+	{1152, 622},
+	{1152, 597},
+	{1152, 662},
+	{1232, 722},
+	{ 0, 806},
+	{ 0,   0},
+	{ 0,   0}
+};
+
+static const SiS310_LVDSDesStruct  SiS310_PanelType02_2[]=   /* TW: New */
+{
+	{1368, 754},
+	{1368, 729},
+	{1368, 754},
+	{1368, 729},
+	{1368, 794},
+	{1448, 854},
+	{1560, 938},
+	{   0,1066},
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0}
+};
+
+static const SiS310_LVDSDesStruct  SiS310_PanelType03_2[]=   /* TW: New */
+{
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0}
+};
+
+static const SiS310_LVDSDesStruct  SiS310_PanelType04_2[]=   /* TW: New */
+{
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0}
+};
+
+static const SiS310_LVDSDesStruct  SiS310_PanelType05_2[]=   /* TW: New */
+{
+	{1152, 622},
+	{1152, 597},
+	{1152, 622},
+	{1152, 597},
+	{1152, 662},
+	{1232, 722},
+	{ 0, 805},
+	{ 0, 794},
+	{ 0,   0}
+};
+
+static const SiS310_LVDSDesStruct  SiS310_PanelType06_2[]=   /* TW: New */
+{
+	{1152, 622},
+	{1152, 597},
+	{1152, 622},
+	{1152, 597},
+	{1152, 662},
+	{1232, 722},
+	{ 0, 805},
+	{ 0, 794},
+	{ 0,   0}
+};
+
+static const SiS310_LVDSDesStruct  SiS310_PanelType07_2[]=   /* TW: New */
+{
+	{1152, 622},
+	{1152, 597},
+	{1152, 622},
+	{1152, 597},
+	{1152, 662},
+	{1232, 722},
+	{ 0, 805},
+	{ 0, 794},
+	{ 0,   0}
+};
+
+static const SiS310_LVDSDesStruct  SiS310_PanelType08_2[]=   /* TW: New */
+{
+	{976, 527},
+	{976, 502},
+	{976, 527},
+	{976, 502},
+	{976, 567},
+	{ 0, 627},
+	{ 0, 627},
+	{ 0,   0},
+	{ 0,   0}
+};
+
+static const SiS310_LVDSDesStruct  SiS310_PanelType09_2[]=   /* TW: New - to check (1280x768) */
+{
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0}
+};
+
+static const SiS310_LVDSDesStruct  SiS310_PanelType0a_2[]=   /* TW: New */
+{
+	{976, 527},
+	{976, 502},
+	{976, 527},
+	{976, 502},
+	{976, 567},
+	{ 0, 627},
+	{ 0, 627},
+	{ 0,   0},
+	{ 0,   0}
+};
+
+static const SiS310_LVDSDesStruct  SiS310_PanelType0b_2[]=   /* TW: New */
+{
+	{1152, 622},
+	{1152, 597},
+	{1152, 622},
+	{1152, 597},
+	{1152, 662},
+	{1232, 722},
+	{ 0, 805},
+	{ 0, 794},
+	{ 0,   0}
+};
+
+static const SiS310_LVDSDesStruct  SiS310_PanelType0c_2[]=   /* TW: New */
+{
+	{1152, 622},
+	{1152, 597},
+	{1152, 622},
+	{1152, 597},
+	{1152, 662},
+	{1232, 722},
+	{ 0, 805},
+	{ 0, 794},
+	{ 0,   0}
+};
+
+static const SiS310_LVDSDesStruct  SiS310_PanelType0d_2[]=   /* TW: New */
+{
+	{1152, 622},
+	{1152, 597},
+	{1152, 622},
+	{1152, 597},
+	{1152, 662},
+	{1232, 722},
+	{ 0, 805},
+	{ 0, 794},
+	{ 0,   0}
+};
+
+static const SiS310_LVDSDesStruct  SiS310_PanelType0e_2[]=   /* TW: New */
+{
+	{1152, 622},
+	{1152, 597},
+	{1152, 622},
+	{1152, 597},
+	{1152, 662},
+	{1232, 722},
+	{ 0, 805},
+	{ 0, 794},
+	{ 0,   0}
+};
+
+static const SiS310_LVDSDesStruct  SiS310_PanelType0f_2[] =   /* TW: New */
+{
+	{1152, 622},
+	{1152, 597},
+	{1152, 622},
+	{1152, 597},
+	{1152, 662},
+	{1232, 722},
+	{ 0, 805},
+	{ 0, 794},
+	{ 0,   0}
+};
+
+static const SiS310_LVDSDesStruct SiS310_PanelType1076_1[]=   /* TW: New */
+{  /* 1024x768 - Checked (1.10.6s) */
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0}
+};
+
+static const SiS310_LVDSDesStruct SiS310_PanelType1076_2[]=   /* TW: New */
+{  /* 1024x768 - Checked (1.10.6s) */
+	{ 1184, 622 },
+	{ 1184, 597 },
+	{ 1184, 622 },
+	{ 1184, 597 },
+	{ 1152, 622 },
+	{ 1232, 722 },
+	{    0, 0   },
+	{    0, 794 },
+	{    0, 0   }
+};
+
+static const SiS310_LVDSDesStruct SiS310_PanelType1210_1[]=   /* TW: New */
+{  /* 1280x1024 - Checked (1.10.6s) */
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0}
+};
+
+static const SiS310_LVDSDesStruct SiS310_PanelType1210_2[]=   /* TW: New */
+{  /* 1280x1024 - Checked (1.10.6s) */
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0}
+};
+
+static const SiS310_LVDSDesStruct SiS310_PanelType1296_1[]=   /* TW: New */
+{  /* 1400x1050 - Checked (1.10.6s) */
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0}
+};
+
+static const SiS310_LVDSDesStruct SiS310_PanelType1296_2[]=   /* TW: New */
+{  /* 1400x1050 - Checked (1.10.6s) - looks heavily invalid */
+	{ 808 , 740},
+	{ 0   , 715},
+	{ 632 , 740},
+	{ 632 , 715},
+	{ 1307, 780},
+	{ 1387,1157},
+	{ 1499, 924},
+	{ 1627,1052},
+	{ 0 , 0}
+};
+
+static const SiS310_LVDSDesStruct SiS310_PanelType1600_1[]=   /* TW: New */
+{  /* 1600x1200 - Checked (1.10.6s) */
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0}
+};
+
+static const SiS310_LVDSDesStruct SiS310_PanelType1600_2[]=   /* TW: New */
+{  /* 1600x1200 - Checked (1.10.6s) - looks heavily invalid */
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0}
+};
+
+static const SiS310_LVDSDesStruct  SiS310_CHTVUNTSCDesData[]=
+{
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0}
+};
+
+static const SiS310_LVDSDesStruct  SiS310_CHTVONTSCDesData[]=
+{
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0}
+};
+
+static const SiS310_LVDSDesStruct  SiS310_CHTVUPALDesData[]=
+{
+	{256,   0},
+	{256,   0},
+	{256,   0},
+	{256,   0},
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0}
+};
+
+static const SiS310_LVDSDesStruct  SiS310_CHTVOPALDesData[]=
+{
+	{256,   0},
+	{256,   0},
+	{256,   0},
+	{256,   0},
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0}
+};
+
+typedef struct _SiS310_Part2PortTblStruct
+{
+ 	UCHAR CR[12];
+} SiS310_Part2PortTblStruct;
+
+static const SiS310_Part2PortTblStruct SiS310_CRT2Part2_1024x768_1[] =
+{
+ {{0x25,0x12,0xc9,0xdc,0xb6,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
+ {{0x2c,0x12,0x9a,0xae,0x88,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
+ {{0x25,0x12,0xc9,0xdc,0xb6,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
+ {{0x38,0x13,0x16,0x0c,0xe6,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
+ {{0x38,0x18,0x16,0x00,0x00,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
+ {{0x36,0x13,0x13,0x25,0xff,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
+ {{0x25,0x12,0xc9,0xdc,0xb6,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}}
+};
+
+static const SiS310_Part2PortTblStruct SiS310_CRT2Part2_1280x1024_1[] =
+{	/* TW: Temporary data, invalid */
+ {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x42}},
+ {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x42}},
+ {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x42}},
+ {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x42}},
+ {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x32}},
+ {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x32}},
+ {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x32}},
+ {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x32}},
+ {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x42}}
+};
+
+static const SiS310_Part2PortTblStruct SiS310_CRT2Part2_1400x1050_1[] =
+{	/* TW: Temporary data, invalid */
+ {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x42}},
+ {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x42}},
+ {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x42}},
+ {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x42}},
+ {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x32}},
+ {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x32}},
+ {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x32}},
+ {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x32}},
+ {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x42}}
+};
+
+static const SiS310_Part2PortTblStruct SiS310_CRT2Part2_1600x1200_1[] =
+{	/* TW: Temporary data, invalid */
+ {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x42}},
+ {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x42}},
+ {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x42}},
+ {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x42}},
+ {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x32}},
+ {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x32}},
+ {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x32}},
+ {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x32}},
+ {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x42}}
+};
+
+static const SiS310_Part2PortTblStruct SiS310_CRT2Part2_1024x768_2[] =
+{
+ {{0x25,0x12,0x51,0x6e,0x48,0x99,0x35,0x89,0x47,0xc1,0x49,0x33}},
+ {{0x2c,0x12,0x38,0x55,0x2f,0x99,0x35,0x89,0x47,0xc1,0x49,0x33}},
+ {{0x25,0x12,0x51,0x6e,0x48,0x99,0x35,0x89,0x47,0xc1,0x49,0x33}},
+ {{0x2c,0x12,0x38,0x55,0x2f,0xc1,0x35,0xb1,0x47,0xe9,0x71,0x33}},
+ {{0x2d,0x12,0x79,0x96,0x70,0x99,0x35,0x89,0x47,0xc1,0x49,0x33}},
+ {{0x29,0x12,0xb5,0xd2,0xac,0xe9,0x35,0xd9,0x47,0x11,0x99,0x33}},
+ {{0x36,0x13,0x13,0x25,0xff,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}
+};
+
+static const SiS310_Part2PortTblStruct SiS310_CRT2Part2_1280x1024_2[] =
+{
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}
+};
+
+static const SiS310_Part2PortTblStruct SiS310_CRT2Part2_1400x1050_2[] =
+{
+ {{0x2b,0x12,0xd9,0xe5,0xd5,0x2c,0x23,0x98,0x27,0x3e,0x08,0x42}},
+ {{0x22,0x12,0xc0,0xcc,0xbc,0x2c,0x23,0x98,0x27,0x3e,0x08,0x42}},
+ {{0x2b,0x12,0xd9,0xe5,0xd5,0x2c,0x23,0x98,0x27,0x3e,0x08,0x42}},
+ {{0x22,0x12,0xc0,0xcc,0xbc,0x2c,0x23,0x98,0x27,0x3e,0x08,0x42}},
+ {{0x33,0x13,0x01,0x0d,0xfd,0x2c,0x23,0x98,0x27,0x3e,0x08,0x42}},
+ {{0x3f,0x1b,0x3d,0x49,0x39,0x54,0x23,0xc0,0x27,0x66,0x30,0x42}},
+ {{0x33,0x1b,0x91,0x9d,0x8d,0x8c,0x23,0xf8,0x27,0x9e,0x68,0x42}},
+ {{0x43,0x24,0x11,0x1d,0x0d,0xcc,0x23,0x38,0x37,0xde,0xa8,0x42}},
+ {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x42}}
+};
+
+static const SiS310_Part2PortTblStruct SiS310_CRT2Part2_1600x1200_2[] =
+{	/* TW: Temporary data, invalid */
+ {{0x2b,0x12,0xd9,0xe5,0xd5,0x2c,0x23,0x98,0x27,0x3e,0x08,0x42}},
+ {{0x22,0x12,0xc0,0xcc,0xbc,0x2c,0x23,0x98,0x27,0x3e,0x08,0x42}},
+ {{0x2b,0x12,0xd9,0xe5,0xd5,0x2c,0x23,0x98,0x27,0x3e,0x08,0x42}},
+ {{0x22,0x12,0xc0,0xcc,0xbc,0x2c,0x23,0x98,0x27,0x3e,0x08,0x42}},
+ {{0x33,0x13,0x01,0x0d,0xfd,0x2c,0x23,0x98,0x27,0x3e,0x08,0x42}},
+ {{0x3f,0x1b,0x3d,0x49,0x39,0x54,0x23,0xc0,0x27,0x66,0x30,0x42}},
+ {{0x33,0x1b,0x91,0x9d,0x8d,0x8c,0x23,0xf8,0x27,0x9e,0x68,0x42}},
+ {{0x43,0x24,0x11,0x1d,0x0d,0xcc,0x23,0x38,0x37,0xde,0xa8,0x42}},
+ {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x42}}
+};
+
+
+static const SiS310_Part2PortTblStruct SiS310_CRT2Part2_1024x768_3[] =
+{	/* TW: Data from 650/301LVx 1.10.6s */
+ {{0x25,0x13,0xc9,0x25,0xff,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
+ {{0x2c,0x13,0x9a,0x25,0xff,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
+ {{0x25,0x13,0xc9,0x24,0xff,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
+ {{0x38,0x13,0x13,0x25,0xff,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
+ {{0x38,0x18,0x16,0x00,0x00,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
+ {{0x36,0x13,0x13,0x25,0xff,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
+ {{0x25,0x13,0xc9,0x25,0xff,0xf9,0x45,0x09,0x07,0xf9,0x09,0x24}}
+#if 0	/* TW: Data from 650/301LV */
+ {{0x25,0x12,0xc9,0xdc,0xb6,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
+ {{0x2c,0x12,0x9a,0xae,0x88,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
+ {{0x25,0x12,0xc9,0xdc,0xb6,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
+ {{0x38,0x13,0x13,0x25,0xff,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
+ {{0x38,0x18,0x16,0x00,0x00,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
+ {{0x36,0x13,0x13,0x25,0xff,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}
+#endif
+};
+
+/*   1     2    4    5    6   1c   1d   1f   20   21   23   25   */
+static const SiS310_Part2PortTblStruct SiS310_CRT2Part2_1280x1024_3[] =
+{	/* TW: Temporary data, invalid */
+  {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x42}},
+  {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x42}},
+  {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x42}},
+  {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x42}},
+  {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x32}},
+  {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x32}},
+  {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x32}},
+  {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x32}},
+  {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x32}}
+};
+
+static const SiS310_Part2PortTblStruct SiS310_CRT2Part2_1400x1050_3[] =
+{	/* TW: Temporary data, invalid */
+  {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x42}},
+  {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x42}},
+  {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x42}},
+  {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x42}},
+  {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x32}},
+  {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x32}},
+  {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x32}},
+  {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x32}},
+  {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x32}}
+};
+
+static const SiS310_Part2PortTblStruct SiS310_CRT2Part2_1600x1200_3[] =
+{	/* TW: Temporary data, invalid */
+  {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x42}},
+  {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x42}},
+  {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x42}},
+  {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x42}},
+  {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x32}},
+  {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x32}},
+  {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x32}},
+  {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x32}},
+  {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x32}}
+};
+
+typedef struct _SiS310_LCDACRT1DataStruct
+{
+ 	UCHAR CR[17];
+}SiS310_LCDACRT1DataStruct;
+
+static const SiS310_LCDACRT1DataStruct  SiS310_LCDACRT1800x600_1[] =
+{
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}}
+};
+
+static const SiS310_LCDACRT1DataStruct  SiS310_LCDACRT11024x768_1[]=
+{  /* TW: Checked (1.10.6s) */
+ {{0x73,0x4f,0x4f,0x97,0x55,0x86,0xc4,0x1f,
+   0x92,0x89,0x8f,0x8f,0xb5,0x30,0x00,0x05,
+   0x00}},
+ {{0x73,0x4f,0x4f,0x97,0x55,0x86,0x97,0x1f,
+   0x60,0x87,0x5d,0x5d,0x83,0x10,0x00,0x05,
+   0x00}},
+ {{0x73,0x4f,0x4f,0x97,0x55,0x86,0xc4,0x1f,
+   0x92,0x89,0x8f,0x8f,0xb5,0x30,0x00,0x05,
+   0x00}},
+ {{0x73,0x4f,0x4f,0x97,0x55,0x86,0x97,0x1f,
+   0x60,0x87,0x5d,0x5d,0x83,0x10,0x00,0x05,
+   0x00}},
+ {{0x73,0x4f,0x4f,0x97,0x55,0x86,0x04,0x3e,
+   0xE2,0x89,0xDf,0xDf,0x05,0x00,0x00,0x05,
+   0x00}},
+ {{0x87,0x63,0x63,0x8B,0x69,0x1A,0x7c,0xf0,
+   0x5A,0x8F,0x57,0x57,0x7D,0x20,0x00,0x26,
+   0x01}},
+ {{0xA3,0x7f,0x7f,0x87,0x86,0x97,0x24,0xf5,
+   0x02,0x88,0xFf,0xFf,0x25,0x10,0x00,0x02,
+   0x01}}
+};
+
+static const SiS310_LCDACRT1DataStruct  SiS310_LCDACRT11280x1024_1[]=
+{  /* Checked (1.10.6s) */
+ {{0x7e,0x4f,0x4f,0x82,0x58,0x06,0xb8,0x1f,
+   0x90,0x84,0x8f,0x8f,0xb9,0x30,0x00,0x06,
+   0x00}},
+ {{0x7e,0x4f,0x4f,0x82,0x58,0x06,0x86,0x1f,
+   0x5e,0x82,0x5d,0x5d,0x87,0x10,0x00,0x06,
+   0x00}},
+ {{0x7e,0x4f,0x4f,0x82,0x58,0x06,0xb8,0x1f,
+   0x90,0x84,0x8f,0x8f,0xb9,0x30,0x00,0x06,
+   0x00}},
+ {{0x7e,0x4f,0x4f,0x82,0x58,0x06,0x86,0x1f,
+   0x5e,0x82,0x5d,0x5d,0x87,0x10,0x00,0x06,
+   0x00}},
+ {{0x7e,0x4f,0x4f,0x82,0x58,0x06,0x08,0x3e,
+   0xe0,0x84,0xdf,0xdf,0x09,0x00,0x00,0x06,
+   0x00}},
+ {{0x92,0x63,0x63,0x96,0x6c,0x1a,0x80,0xf0,
+   0x58,0x8c,0x57,0x57,0x81,0x20,0x00,0x06,
+   0x01}},
+ {{0xae,0x7f,0x7f,0x92,0x88,0x96,0x28,0xf5,
+   0x00,0x84,0xff,0xff,0x29,0x10,0x00,0x02,
+   0x01}},
+ {{0xce,0x9f,0x9f,0x92,0xa8,0x16,0x28,0x5a,
+   0x00,0x84,0xff,0xff,0x29,0x01,0x00,0x07,
+   0x01}}
+};
+
+static const SiS310_LCDACRT1DataStruct  SiS310_LCDACRT11400x1050_1[]=
+{    /* Checked (1.10.6s) */
+ {{0x6f,0x4f,0x4f,0x93,0x54,0x82,0x9e,0x1f,
+   0x93,0x86,0x8f,0x8f,0x9f,0x30,0x00,0x05,
+   0x00}},
+ {{0x6f,0x4f,0x4f,0x93,0x54,0x82,0x6c,0x1f,
+   0x60,0x84,0x5d,0x5d,0x6d,0x10,0x00,0x05,
+   0x00}},
+ {{0x6f,0x4f,0x4f,0x93,0x54,0x82,0x9e,0x1f,
+   0x93,0x86,0x8f,0x8f,0x9f,0x30,0x00,0x05,
+   0x00}},
+ {{0x6f,0x4f,0x4f,0x93,0x54,0x82,0x6c,0x1f,
+   0x60,0x84,0x5d,0x5d,0x6d,0x10,0x00,0x05,
+   0x00}},
+ {{0x6f,0x4f,0x4f,0x93,0x54,0x82,0xee,0x1f,
+   0xe2,0x86,0xdf,0xdf,0xef,0x10,0x00,0x05,
+   0x00}},
+ {{0x83,0x63,0x63,0x87,0x68,0x16,0x66,0xf0,
+   0x5a,0x8e,0x57,0x57,0x67,0x20,0x00,0x06,
+   0x01}},
+ {{0x9f,0x7f,0x7f,0x83,0x84,0x92,0x0e,0xf5,
+   0x02,0x86,0xff,0xff,0x0f,0x10,0x00,0x02,
+   0x01}},
+ {{0xbf,0x9f,0x9f,0x83,0xa4,0x12,0x0e,0x5a,
+   0x02,0x86,0xff,0xff,0x0f,0x09,0x00,0x07,
+   0x01}},
+ {{0xce,0xae,0xae,0x92,0xb3,0x01,0x28,0x10,
+   0x1a,0x80,0x19,0x19,0x29,0x0f,0x00,0x03,
+   0x00}}
+};
+
+static const SiS310_LCDACRT1DataStruct  SiS310_LCDACRT11600x1200_1[]=
+{   /* MISSING */
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}}
+};
+
+static const SiS310_LCDACRT1DataStruct  SiS310_LCDACRT1800x600_1_H[]=
+{
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}}
+};
+
+static const SiS310_LCDACRT1DataStruct  SiS310_LCDACRT11024x768_1_H[]=
+{  /* TW: Checked (1.10.6s) */
+ {{0x4b,0x27,0x27,0x8f,0x2b,0x03,0xc4,0x1f,
+   0x92,0x89,0x8f,0x8f,0xb5,0x30,0x00,0x44,
+   0x00}},
+ {{0x4b,0x27,0x27,0x8f,0x2b,0x03,0x97,0x1f,
+   0x60,0x87,0x5D,0x5D,0x83,0x01,0x00,0x44,
+   0x00}},
+ {{0x4b,0x27,0x27,0x8f,0x2b,0x03,0xc4,0x1f,
+   0x92,0x89,0x8f,0x8f,0xb5,0x30,0x00,0x44,
+   0x00}},
+ {{0x4b,0x27,0x27,0x8f,0x2b,0x03,0x97,0x1f,
+   0x60,0x87,0x5D,0x5D,0x83,0x01,0x00,0x44,
+   0x00}},
+ {{0x4b,0x27,0x27,0x8f,0x32,0x1b,0x04,0x3e,
+   0xE2,0x89,0xDf,0xDf,0x05,0x00,0x00,0x45,
+   0x00}},
+ {{0x55,0x31,0x31,0x99,0x46,0x1d,0x7c,0xf0,
+   0x5A,0x8F,0x57,0x57,0x7D,0x20,0x00,0x55,
+   0x01}},
+ {{0x63,0x3F,0x3F,0x87,0x4a,0x93,0x24,0xf5,
+   0x02,0x88,0xFf,0xFf,0x25,0x10,0x00,0x01,
+   0x01}}
+};
+
+static const SiS310_LCDACRT1DataStruct  SiS310_LCDACRT11280x1024_1_H[]=
+{   /* Checked (1.10.6s) */
+ {{0x56,0x27,0x27,0x9a,0x30,0x1e,0xb8,0x1f,
+   0x90,0x84,0x8f,0x8f,0xb9,0x30,0x00,0x05,
+   0x00}},
+ {{0x3c,0x4f,0x4f,0x82,0x58,0x06,0x86,0xd1,    /* <-- Invalid data - one byte missing in BIOS */
+   0xbc,0x80,0xbb,0xbb,0xe5,0x00,0x00,0x06,
+   0x01}},
+ {{0x56,0x27,0x27,0x9a,0x30,0x1e,0xb8,0x1f,
+   0x90,0x84,0x8f,0x8f,0xb9,0x30,0x00,0x05,
+   0x00}},
+ {{0x3c,0x4f,0x4f,0x82,0x58,0x06,0x86,0xd1,
+   0xbc,0x80,0xbb,0xbb,0xe5,0x00,0x00,0x06,
+   0x01}},
+ {{0x56,0x27,0x27,0x9a,0x30,0x1e,0x08,0x3e,
+   0xe0,0x84,0xdf,0xdf,0x09,0x00,0x00,0x05,
+   0x00}},
+ {{0x60,0x31,0x31,0x84,0x3a,0x88,0x80,0xf0,
+   0x58,0x8c,0x57,0x57,0x81,0x20,0x00,0x01,
+   0x01}},
+ {{0x6e,0x3f,0x3f,0x92,0x48,0x96,0x28,0xf5,
+   0x00,0x84,0xff,0xff,0x29,0x10,0x00,0x01,
+   0x01}}
+};
+
+static const SiS310_LCDACRT1DataStruct  SiS310_LCDACRT11400x1050_1_H[]=
+{   /* Checked (1.10.6s) */
+  {{0x47,0x27,0x27,0x8b,0x2c,0x1a,0x9e,0x1f,
+    0x93,0x86,0x8f,0x8f,0x9f,0x30,0x00,0x05,
+    0x00}},
+  {{0x47,0x27,0x27,0x8b,0x2c,0x1a,0x6c,0x1f,
+    0x60,0x84,0x5d,0x5d,0x6d,0x10,0x00,0x05,
+    0x00}},
+  {{0x47,0x27,0x27,0x8b,0x30,0x1e,0x9e,0x1f,
+    0x92,0x86,0x8f,0x8f,0x9f,0x30,0x00,0x05,
+    0x00}},
+  {{0x47,0x27,0x27,0x8b,0x2c,0x1a,0x6c,0x1f,
+    0x60,0x84,0x5d,0x5d,0x6d,0x10,0x00,0x05,
+    0x00}},
+  {{0x47,0x27,0x27,0x8b,0x2c,0x1a,0xee,0x1f,
+    0xe2,0x86,0xdf,0xdf,0xef,0x10,0x00,0x05,
+    0x00}},
+  {{0x51,0x31,0x31,0x95,0x36,0x04,0x66,0xf0,
+    0x5a,0x8e,0x57,0x57,0x67,0x20,0x00,0x01,
+    0x01}},
+  {{0x5f,0x3f,0x3f,0x83,0x44,0x92,0x0e,0xf5,
+    0x02,0x86,0xff,0xff,0x0f,0x10,0x00,0x01,
+    0x01}},
+  {{0x6f,0x4f,0x4f,0x93,0x54,0x82,0x0e,0x5a,
+    0x02,0x86,0xff,0xff,0x0f,0x09,0x00,0x05,
+    0x01}},
+  {{0x76,0x56,0x56,0x9a,0x5b,0x89,0x28,0x10,
+    0x1c,0x80,0x19,0x19,0x29,0x0b,0x00,0x05,
+    0x00}}
+};
+
+static const SiS310_LCDACRT1DataStruct  SiS310_LCDACRT11600x1200_1_H[]=
+{   /* MISSING */
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}}
+};
+
+static const SiS310_LCDACRT1DataStruct  SiS310_LCDACRT1800x600_2[]=
+{
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}}
+};
+
+static const SiS310_LCDACRT1DataStruct  SiS310_LCDACRT11024x768_2[]=
+{   /* Checked (1.10.6s) */
+ {{0xa3,0x4f,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+   0x4a,0x80,0x8f,0x8f,0x25,0x30,0x00,0x06,
+   0x00}},
+ {{0xa3,0x4f,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+   0x31,0x87,0x5d,0x5d,0x25,0x30,0x00,0x06,
+   0x00}},
+ {{0xa3,0x4f,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+   0x4a,0x80,0x8f,0x8f,0x25,0x30,0x00,0x06,
+   0x00}},
+ {{0xa3,0x4f,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+   0x31,0x87,0x5d,0x5d,0x25,0x30,0x00,0x06,
+   0x00}},
+ {{0xa3,0x4f,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+   0x72,0x88,0xdf,0xdf,0x25,0x30,0x00,0x06,
+   0x00}},
+ {{0xa3,0x63,0x63,0x87,0x78,0x89,0x24,0xf1,
+   0xae,0x84,0x57,0x57,0x25,0x30,0x00,0x02,
+   0x01}},
+ {{0xa3,0x7f,0x7f,0x87,0x86,0x97,0x24,0xf5,
+   0x02,0x88,0xff,0xff,0x25,0x10,0x00,0x02,
+   0x01}}
+};
+
+static const SiS310_LCDACRT1DataStruct  SiS310_LCDACRT11280x1024_2[]=
+{   /* Checked (1.10.6s) */
+ {{0xa3,0x4f,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+   0x4a,0x80,0x8f,0x8f,0x25,0x30,0x00,0x06,
+   0x00}},
+ {{0xa3,0x4f,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+   0x31,0x87,0x5d,0x5d,0x25,0x30,0x00,0x06,
+   0x00}},
+ {{0xa3,0x4f,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+   0x4a,0x80,0x8f,0x8f,0x25,0x30,0x00,0x06,
+   0x00}},
+ {{0xa3,0x4f,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+   0x31,0x87,0x5d,0x5d,0x25,0x30,0x00,0x06,
+   0x00}},
+ {{0xa3,0x4f,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+   0x72,0x88,0xdf,0xdf,0x25,0x30,0x00,0x06,
+   0x00}},
+ {{0xa3,0x63,0x63,0x87,0x78,0x89,0x24,0xf1,
+   0xae,0x84,0x57,0x57,0x25,0x30,0x00,0x02,
+   0x01}},
+ {{0xa3,0x7f,0x7f,0x87,0x86,0x97,0x24,0xf5,
+   0x02,0x88,0xff,0xff,0x25,0x10,0x00,0x02,
+   0x01}}
+};
+
+static const SiS310_LCDACRT1DataStruct  SiS310_LCDACRT11400x1050_2[]=
+{    /* Checked (1.10.6s) */
+ {{0xce,0x4f,0x4f,0x92,0x8c,0x1a,0x28,0x9a,
+   0xdb,0x8f,0x8f,0x8f,0x29,0x21,0x00,0x03,
+   0x00}},
+ {{0xce,0x4f,0x4f,0x92,0x8c,0x1a,0x28,0x9a,
+   0xc2,0x86,0x5d,0x5d,0x29,0x01,0x00,0x03,
+   0x01}},
+ {{0xce,0x4f,0x4f,0x92,0x8c,0x1a,0x28,0x9a,
+   0xdb,0x8f,0x8f,0x8f,0x29,0x21,0x00,0x03,
+   0x00}},
+ {{0xce,0x4f,0x4f,0x92,0x8c,0x1a,0x28,0x9a,
+   0xc2,0x86,0x5d,0x5d,0x29,0x01,0x00,0x03,
+   0x00}},
+ {{0xce,0x4f,0x4f,0x92,0x8c,0x1a,0x28,0x9e,
+   0x03,0x87,0xdf,0xdf,0x29,0x01,0x00,0x03,
+   0x00}},
+ {{0xce,0x63,0x63,0x92,0x96,0x04,0x28,0xd4,
+   0x3f,0x83,0x57,0x57,0x29,0x01,0x00,0x07,
+   0x01}},
+ {{0xce,0x7f,0x7f,0x92,0xa4,0x12,0x28,0xd4,
+   0x93,0x87,0xff,0xff,0x29,0x21,0x00,0x07,
+   0x01}},
+ {{0xce,0x9f,0x9f,0x92,0xb4,0x02,0x28,0x5a,
+   0x13,0x87,0xff,0xff,0x29,0x29,0x00,0x03,
+   0x01}},
+ {{0xce,0xae,0xae,0x92,0xbc,0x0a,0x28,0x10,
+   0x20,0x84,0x19,0x19,0x29,0x0f,0x00,0x03,
+   0x00}}
+};
+
+static const SiS310_LCDACRT1DataStruct  SiS310_LCDACRT11600x1200_2[]=
+{    /* MISSING */
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}}
+};
+
+static const SiS310_LCDACRT1DataStruct  SiS310_LCDACRT1800x600_2_H[]=
+{
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}}
+};
+
+static const SiS310_LCDACRT1DataStruct  SiS310_LCDACRT11024x768_2_H[]=
+{   /* Checked (1.10.6s) */
+ {{0x4f,0x27,0x27,0x93,0x39,0x01,0x24,0xbb,
+   0x4a,0x80,0x8f,0x8f,0x25,0x30,0x00,0x01,
+   0x00 }},
+ {{0x4f,0x27,0x27,0x93,0x39,0x01,0x24,0xbb,
+   0x31,0x87,0x8d,0x5d,0x25,0x30,0x00,0x01,   /* <-- invalid data */
+   0x00 }},
+ {{0x4f,0x27,0x27,0x93,0x39,0x01,0x24,0xbb,
+   0x4a,0x80,0x8f,0x8f,0x25,0x30,0x00,0x01,
+   0x00 }},
+ {{0x4f,0x27,0x27,0x93,0x39,0x01,0x24,0xbb,
+   0x31,0x87,0x5d,0x5d,0x25,0x30,0x00,0x01,
+   0x00 }},
+ {{0x4f,0x27,0x27,0x93,0x39,0x01,0x24,0xbb,
+   0x72,0x88,0xdf,0xdf,0x25,0x30,0x00,0x01,
+   0x00 }},
+ {{0x4f,0x31,0x31,0x93,0x3e,0x06,0x24,0xf1,
+   0xae,0x84,0x57,0x57,0x25,0x30,0x00,0x01,  /* <-- invalid data */
+   0x01 }},
+ {{0x4f,0x3f,0x3f,0x93,0x45,0x0d,0x24,0xf5,
+   0x02,0x88,0xff,0xff,0x25,0x10,0x00,0x01,
+   0x01 }}
+};
+
+static const SiS310_LCDACRT1DataStruct  SiS310_LCDACRT11280x1024_2_H[]=
+{   /* Checked (1.10.6s) */
+ {{0x4f,0x27,0x27,0x93,0x39,0x81,0x24,0xbb,
+   0x4a,0x80,0x8f,0x8f,0x25,0x30,0x00,0x01,
+   0x00 }},
+ {{0x4f,0x27,0x27,0x93,0x39,0x81,0x24,0xbb,
+   0x31,0x87,0x5d,0x5d,0x25,0x30,0x00,0x01,
+   0x00 }},
+ {{0x4f,0x27,0x27,0x93,0x39,0x81,0x24,0xbb,
+   0x4a,0x80,0x8f,0x8f,0x25,0x30,0x00,0x01,
+   0x00 }},
+ {{0x4f,0x27,0x27,0x93,0x39,0x81,0x24,0xbb,
+   0x31,0x87,0x5d,0x5d,0x25,0x30,0x00,0x01,
+   0x00 }},
+ {{0x4f,0x27,0x27,0x93,0x39,0x81,0x24,0xbb,
+   0x72,0x88,0xdf,0xdf,0x25,0x30,0x00,0x01,
+   0x00 }},
+ {{0x4f,0x31,0x31,0x93,0x3e,0x86,0x24,0xf1,
+   0xae,0x84,0x57,0x57,0x25,0x30,0x00,0x01,
+   0x01 }},
+ {{0x4f,0x3f,0x3f,0x93,0x45,0x0d,0x24,0xf5,
+   0x02,0x88,0xff,0xff,0x25,0x10,0x00,0x01,
+   0x01 }}
+};
+
+static const SiS310_LCDACRT1DataStruct  SiS310_LCDACRT11400x1050_2_H[]=
+{  /* Checked (1.10.6s) */
+ {{0xa6,0x27,0x27,0x8a,0x64,0x92,0x28,0x9a,
+   0xdb,0x8f,0x8f,0x8f,0x29,0x21,0x00,0x06,
+   0x00}},
+ {{0xa6,0x27,0x27,0x8a,0x64,0x92,0x28,0x9a,
+   0xc2,0x86,0x5d,0x5d,0x29,0x01,0x00,0x06,
+   0x00}},
+ {{0xa6,0x27,0x27,0x8a,0x64,0x92,0x28,0x9a,
+   0xdb,0x8f,0x8f,0x8f,0x29,0x21,0x00,0x06,
+   0x00}},
+ {{0xa6,0x27,0x27,0x8a,0x64,0x92,0x28,0x9a,
+   0xc2,0x86,0x5d,0x5d,0x29,0x01,0x00,0x06,
+   0x00}},
+ {{0xa6,0x27,0x27,0x8a,0x64,0x92,0x28,0x9e,
+   0x03,0x87,0xdf,0xdf,0x29,0x01,0x00,0x06,
+   0x00}},
+ {{0x9c,0x31,0x31,0x80,0x64,0x92,0x28,0xd4,
+   0x3f,0x83,0x57,0x57,0x29,0x01,0x00,0x06,
+   0x01}},
+ {{0x8e,0x3f,0x3f,0x92,0x64,0x12,0x28,0xd4,
+   0x93,0x87,0xff,0xff,0x29,0x21,0x00,0x06,
+   0x01}},
+ {{0x7e,0x4f,0x4f,0x82,0x64,0x12,0x28,0x5a,
+   0x13,0x87,0xff,0xff,0x29,0x29,0x00,0x06,
+   0x01}},
+ {{0x76,0x56,0x56,0x9a,0x64,0x92,0x28,0x10,
+   0x20,0x84,0x19,0x19,0x29,0x0f,0x00,0x05,
+   0x00}}
+};
+
+static const SiS310_LCDACRT1DataStruct  SiS310_LCDACRT11600x1200_2_H[]=
+{  /* MISSING */
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}}
+};
+
+typedef struct _SiS310_LVDSCRT1DataStruct
+{
+ 	UCHAR CR[15];
+} SiS310_LVDSCRT1DataStruct;
+
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT1320x480_1[] =
+{
+ {{0x65,0x4f,0x89,0x56,0x83,0xaa,0x1f,
+   0x90,0x85,0x8f,0xab,0x30,0x00,0x05,
+   0x00 }},
+ {{0x65,0x4f,0x89,0x56,0x83,0x83,0x1f,
+   0x5e,0x83,0x5d,0x79,0x10,0x00,0x05,
+   0x00 }},
+ {{0x65,0x4f,0x89,0x54,0x9f,0xc4,0x1f,
+   0x92,0x89,0x8f,0xb5,0x30,0x00,0x01,
+   0x00 }},
+ {{0x65,0x4f,0x89,0x56,0x83,0x83,0x1f,
+   0x5e,0x83,0x5d,0x79,0x10,0x00,0x05,
+   0x00 }},
+ {{0x65,0x4f,0x89,0x56,0x83,0x04,0x3e,
+   0xe0,0x85,0xdf,0xfb,0x10,0x00,0x05,
+   0x00 }},
+ {{0x7f,0x63,0x83,0x6c,0x1c,0x72,0xf0,
+   0x58,0x8c,0x57,0x73,0x20,0x00,0x06,
+   0x01 }},
+ {{0x2d,0x27,0x90,0x2c,0x80,0x0b,0x3e,
+   0xe9,0x8b,0xe7,0x04,0x00,0x00,0x00,
+   0x00 }}
+};
+
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT1800x600_1[] =   /* TW: New */
+{
+ {{0x6b,0x4f,0x8f,0x55,0x85,0xaa,0x1f,
+   0x90,0x85,0x8f,0xab,0x30,0x00,0x05,
+   0x00 }},
+ {{0x6b,0x4f,0x8f,0x55,0x85,0x78,0x1f,
+   0x5e,0x83,0x5d,0x79,0x10,0x00,0x05,
+   0x00 }},
+ {{0x6b,0x4f,0x8f,0x55,0x85,0xaa,0x1f,
+   0x90,0x85,0x8f,0xab,0x30,0x00,0x05,
+   0x00 }},
+ {{0x6b,0x4f,0x8f,0x55,0x85,0x78,0x1f,
+   0x5e,0x83,0x5d,0x79,0x10,0x00,0x05,
+   0x00 }},
+ {{0x6b,0x4f,0x8f,0x55,0x85,0xfa,0x1f,
+   0xe0,0x85,0xdf,0xfb,0x10,0x00,0x05,
+   0x00 }},
+ {{0x7f,0x63,0x83,0x69,0x19,0x72,0xf0,
+   0x58,0x8c,0x57,0x73,0x20,0x00,0x06,
+   0x01 }}
+};
+
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11024x768_1[] =    /* TW: New */
+{
+ {{0x73,0x4f,0x97,0x53,0x84,0xb4,0x1f,
+   0x92,0x89,0x8f,0xb5,0x30,0x00,0x05,
+   0x00}},
+ {{0x73,0x4f,0x97,0x53,0x84,0x82,0x1f,
+   0x60,0x87,0x5d,0x83,0x10,0x00,0x05,
+   0x00}},
+ {{0x73,0x4f,0x97,0x53,0x84,0xb4,0x1f,
+   0x92,0x89,0x8f,0xb5,0x30,0x00,0x05,
+   0x00}},
+ {{0x73,0x4f,0x97,0x53,0x84,0x82,0x1f,
+   0x60,0x87,0x5d,0x83,0x10,0x00,0x05,
+   0x00}},
+ {{0x73,0x4f,0x97,0x53,0x84,0x04,0x3e,
+   0xE2,0x89,0xDf,0x05,0x00,0x00,0x05,
+   0x00}},
+ {{0x87,0x63,0x8B,0x67,0x18,0x7c,0xf0,
+   0x5A,0x81,0x57,0x7D,0x00,0x00,0x06,
+   0x01}},
+ {{0xA3,0x7f,0x87,0x83,0x94,0x24,0xf5,
+   0x02,0x89,0xFf,0x25,0x10,0x00,0x02,
+   0x01}}
+};
+
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11280x1024_1[] =    /* TW: New */
+{
+ {{0x7e,0x4f,0x82,0x56,0x04,0xb8,0x1f,
+   0x90,0x84,0x8f,0xb9,0x30,0x00,0x06,
+   0x00 }},
+ {{0x7e,0x4f,0x82,0x56,0x04,0x86,0x1f,
+   0x5e,0x82,0x5d,0x87,0x10,0x00,0x06,
+   0x00 }},
+ {{0x7e,0x4f,0x82,0x56,0x04,0xb8,0x1f,
+   0x90,0x84,0x8f,0xb9,0x30,0x00,0x06,
+   0x00 }},
+ {{0x7e,0x4f,0x82,0x56,0x04,0x86,0x1f,
+   0x5e,0x82,0x5d,0x87,0x10,0x00,0x06,
+   0x00 }},
+ {{0x7e,0x4f,0x82,0x56,0x04,0x08,0x3e,
+   0xe0,0x84,0xdf,0x09,0x00,0x00,0x06,
+   0x00 }},
+ {{0x92,0x63,0x96,0x6a,0x18,0x80,0xf0,
+   0x58,0x8c,0x57,0x81,0x20,0x00,0x06,
+   0x01 }},
+ {{0xae,0x7f,0x92,0x86,0x94,0x28,0xf5,
+   0x00,0x84,0xff,0x29,0x10,0x00,0x02,
+   0x01 }},
+ {{0xce,0x9f,0x92,0xa6,0x14,0x28,0x5a,
+   0x00,0x84,0xff,0x29,0x09,0x00,0x07,
+   0x01}}
+};
+
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT1800x600_1_H[] =    /* TW: New */
+{
+ {{0x43,0x27,0x87,0x2d,0x1d,0xaa,0x1f,
+   0x90,0x85,0x8f,0xab,0x30,0x00,0x05,
+   0x00 }},
+ {{0x43,0x27,0x87,0x2d,0x1d,0x78,0x1f,
+   0x5e,0x83,0x5d,0x79,0x10,0x00,0x05,
+   0x00 }},
+ {{0x43,0x27,0x87,0x2d,0x1d,0xfa,0x1f,
+   0xe0,0x85,0xdf,0xfb,0x10,0x00,0x05,
+   0x00 }},
+ {{0x43,0x27,0x87,0x2d,0x1d,0x78,0x1f,
+   0x5e,0x83,0x5d,0x79,0x10,0x00,0x05,
+   0x00 }},
+ {{0x43,0x27,0x87,0x2d,0x1d,0xfa,0x1f,
+   0xe0,0x85,0xdf,0xfb,0x10,0x00,0x05,
+   0x00 }},
+ {{0x4d,0x31,0x91,0x37,0x07,0x72,0xf0,
+   0x58,0x8d,0x57,0x73,0x20,0x00,0x01,
+   0x01 }}
+};
+
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11024x768_1_H[] =    /* TW: New */
+{
+ {{0x4b,0x27,0x8f,0x2b,0x1c,0xb4,0x1f,
+   0x92,0x89,0x8f,0xb5,0x30,0x00,0x05,
+   0x00 }},
+ {{0x4b,0x27,0x8f,0x2b,0x1c,0x82,0x1f,
+   0x60,0x87,0x5D,0x83,0x01,0x00,0x05,
+   0x00}},
+ {{0x4b,0x27,0x8f,0x2b,0x1c,0xb4,0x1f,
+   0x92,0x89,0x8f,0xb5,0x30,0x00,0x05,
+   0x00}},
+ {{0x4b,0x27,0x8f,0x2b,0x1c,0x82,0x1f,
+   0x60,0x87,0x5D,0x83,0x01,0x00,0x05,
+   0x00}},
+ {{0x4b,0x27,0x8f,0x2b,0x1c,0x04,0x3e,
+   0xE2,0x89,0xDf,0x05,0x00,0x00,0x05,
+   0x00}},
+ {{0x55,0x31,0x99,0x35,0x06,0x7c,0xf0,
+   0x5A,0x81,0x57,0x7D,0x00,0x00,0x01,
+   0x01}},
+ {{0x63,0x3F,0x87,0x43,0x94,0x24,0xf5,
+   0x02,0x89,0xFf,0x25,0x10,0x00,0x01,
+   0x01 }}
+};
+
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11280x1024_1_H[] =   /* TW: New */
+{
+ {{0x56,0x27,0x9a,0x2e,0x1c,0xb8,0x1f,
+   0x90,0x84,0x8f,0xb9,0x30,0x00,0x05,
+   0x00 }},
+ {{0x56,0x27,0x9a,0x2e,0x1c,0x86,0x1f,
+   0x5e,0x82,0x5d,0x87,0x10,0x00,0x05,
+   0x00 }},
+ {{0x56,0x27,0x9a,0x2e,0x1c,0xb8,0x1f,
+   0x90,0x84,0x8f,0xb9,0x30,0x00,0x05,
+   0x00 }},
+ {{0x56,0x27,0x9a,0x2e,0x1c,0x86,0x1f,
+   0x5e,0x82,0x5d,0x87,0x10,0x00,0x05,
+   0x01 }},
+ {{0x56,0x27,0x9a,0x2e,0x1c,0x08,0x3e,
+   0xe0,0x84,0xdf,0x09,0x00,0x00,0x05,
+   0x00 }},
+ {{0x60,0x31,0x84,0x38,0x86,0x80,0xf0,
+   0x58,0x8c,0x57,0x81,0x20,0x00,0x01,
+   0x01 }},
+ {{0x6e,0x3f,0x92,0x46,0x94,0x28,0xf5,
+   0x00,0x84,0xff,0x29,0x10,0x00,0x01,
+   0x01 }}
+};
+
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT1800x600_2[]=   /* TW: New */
+{
+ {{0x7f,0x4f,0x83,0x62,0x12,0x72,0x3e,
+   0xff,0x84,0x8f,0x73,0x00,0x00,0x06,
+   0x00 }},
+ {{0x7f,0x4f,0x83,0x62,0x12,0x72,0x3e,
+   0xe6,0x8b,0x5d,0x73,0x00,0x00,0x06,
+   0x00 }},
+ {{0x7f,0x4f,0x83,0x62,0x12,0x72,0x3e,
+   0xff,0x84,0x8f,0x73,0x00,0x00,0x06,
+   0x00 }},
+ {{0x7f,0x4f,0x83,0x62,0x12,0x72,0x3e,
+   0xe6,0x8b,0x5d,0x73,0x00,0x00,0x06,
+   0x00 }},
+ {{0x7f,0x4f,0x83,0x62,0x12,0x72,0xba,
+   0x27,0x8c,0xdf,0x73,0x00,0x00,0x06,
+   0x00 }},
+ {{0x7f,0x63,0x83,0x69,0x19,0x72,0xf0,
+   0x58,0x8d,0x57,0x73,0x20,0x00,0x06,
+   0x01 }}
+};
+
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11024x768_2[] =   /* TW: New */
+{ 
+ {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+   0x57,0x8e,0x8f,0x25,0x30,0x00,0x06,
+   0x00 }},
+ {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+   0x3e,0x85,0x5d,0x25,0x10,0x00,0x06,
+   0x00 }},
+ {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+   0x57,0x8e,0x8f,0x25,0x30,0x00,0x06,
+   0x00 }},
+ {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+   0x3e,0x85,0x5d,0x25,0x10,0x00,0x06,
+   0x01 }},
+ {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+   0x7f,0x86,0xdf,0x25,0x10,0x00,0x06,
+   0x00 }},
+ {{0xa3,0x63,0x87,0x78,0x89,0x24,0xf1,
+   0xbb,0x82,0x57,0x25,0x10,0x00,0x02,
+   0x01 }},
+ {{0xa3,0x7f,0x87,0x83,0x94,0x24,0xf5,
+   0x02,0x89,0xff,0x25,0x10,0x00,0x02,
+   0x01 }}
+};
+
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11280x1024_2[] =  /* TW: New */
+{
+ {{0xce,0x4f,0x92,0x81,0x0f,0x28,0x9a,
+   0xdb,0x8f,0x8f,0x29,0x21,0x00,0x03,
+   0x00 }},
+ {{0xce,0x4f,0x92,0x81,0x0f,0x28,0x9a,
+   0xc2,0x86,0x5d,0x29,0x01,0x00,0x03,
+   0x00 }},
+ {{0xce,0x4f,0x92,0x81,0x0f,0x28,0x9a,
+   0xdb,0x8f,0x8f,0x29,0x21,0x00,0x03,
+   0x00 }},
+ {{0xce,0x4f,0x92,0x81,0x0f,0x28,0x9a,
+   0xc2,0x86,0x5d,0x29,0x01,0x00,0x03,
+   0x00 }},
+ {{0xce,0x4f,0x92,0x81,0x0f,0x28,0x9e,
+   0x03,0x87,0xdf,0x29,0x01,0x00,0x03,
+   0x00 }},
+ {{0xce,0x63,0x92,0x8b,0x19,0x28,0xd4,
+   0x3f,0x83,0x57,0x29,0x01,0x00,0x03,
+   0x01 }},
+ {{0xce,0x7f,0x92,0x99,0x07,0x28,0xd4,
+   0x93,0x87,0xff,0x29,0x21,0x00,0x07,
+   0x01 }},
+ {{0xce,0x9f,0x92,0xa6,0x14,0x28,0x5a,
+   0x00,0x84,0xff,0x29,0x09,0x00,0x07,
+   0x01}}
+};
+
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT1800x600_2_H[] =   /* TW: New */
+{
+ {{0x57,0x27,0x9b,0x3a,0x0a,0x72,0x3e,
+   0xff,0x84,0x8f,0x73,0x00,0x00,0x01,
+   0x00 }},
+ {{0x57,0x27,0x9b,0x3a,0x0a,0x72,0x3e,
+   0xd6,0x8b,0x5d,0x73,0x00,0x00,0x01,
+   0x00 }},
+ {{0x57,0x27,0x9b,0x3a,0x0a,0x72,0x3e,
+   0xff,0x84,0x8f,0x73,0x00,0x00,0x01,
+   0x00 }},
+ {{0x57,0x27,0x9b,0x3a,0x0a,0x72,0x3e,
+   0xd6,0x8b,0x5d,0x73,0x00,0x00,0x01,
+   0x00 }},
+ {{0x57,0x27,0x9b,0x3a,0x0a,0x72,0xba,
+   0x27,0x8c,0xdf,0x73,0x00,0x00,0x01,
+   0x00 }},
+ {{0x4d,0x31,0x91,0x3a,0x0a,0x72,0xf0,
+   0x63,0x88,0x57,0x73,0x00,0x00,0x01,
+   0x01 }}
+};
+
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11024x768_2_H[] =   /* TW: New */
+{ 
+ {{0x7b,0x27,0x9f,0x46,0x97,0x24,0xbb,
+   0x57,0x8e,0x8f,0x25,0x30,0x00,0x01,
+   0x00 }},
+ {{0x7b,0x27,0x9f,0x46,0x97,0x24,0xbb,
+   0x3e,0x85,0x5d,0x25,0x10,0x00,0x01,
+   0x00 }},
+ {{0x7b,0x27,0x9f,0x46,0x97,0x24,0xbb,
+   0x57,0x8e,0x8f,0x25,0x30,0x00,0x01,
+   0x00 }},
+ {{0x7b,0x27,0x9f,0x46,0x97,0x24,0xbb,
+   0x3e,0x85,0x5d,0x25,0x10,0x00,0x01,
+   0x00 }},
+ {{0x7b,0x27,0x9f,0x46,0x97,0x24,0xbb,
+   0x7f,0x86,0xdf,0x25,0x10,0x00,0x01,
+   0x00 }},
+ {{0x71,0x31,0x95,0x46,0x97,0x24,0xf1,
+   0xbb,0x82,0x57,0x25,0x10,0x00,0x01,
+   0x01 }},
+ {{0x63,0x3f,0x87,0x46,0x97,0x24,0xf5,
+   0x0f,0x86,0xff,0x25,0x30,0x00,0x01,
+   0x01 }}
+};
+
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11280x1024_2_H[] =   /* TW: New */
+{
+ {{0xa6,0x27,0x8a,0x59,0x87,0x28,0x9a,
+   0xdb,0x8f,0x8f,0x29,0x21,0x00,0x06,
+   0x00 }},
+ {{0xa6,0x27,0x8a,0x59,0x87,0x28,0x9a,
+   0xc2,0x86,0x5d,0x29,0x01,0x00,0x06,
+   0x00 }},
+ {{0xa6,0x27,0x8a,0x59,0x87,0x28,0x9a,
+   0xdb,0x8f,0x8f,0x29,0x21,0x00,0x06,
+   0x00 }},
+ {{0xa6,0x27,0x8a,0x59,0x87,0x28,0x9a,
+   0xc2,0x86,0x5d,0x29,0x01,0x00,0x06,
+   0x00 }},
+ {{0xa6,0x27,0x8a,0x59,0x87,0x28,0x9e,
+   0x03,0x87,0xdf,0x29,0x01,0x00,0x06,
+   0x00 }},
+ {{0x9c,0x31,0x80,0x59,0x87,0x28,0xd4,
+   0x3f,0x83,0x57,0x29,0x01,0x00,0x06,
+   0x01 }},
+ {{0x8e,0x3f,0x92,0x79,0x07,0x28,0xd4,
+   0x93,0x87,0xff,0x29,0x21,0x00,0x06,
+   0x01}}
+};
+
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT1XXXxXXX_1[] =   /* TW: New */
+{
+ {{0x5f,0x4f,0x82,0x55,0x81,0xbf,0x1f,
+   0x9c,0x8e,0x96,0xb9,0x30,0x00,0x05,
+   0x00}},
+ {{0x5f,0x4f,0x82,0x55,0x81,0xbf,0x1f,
+   0x9c,0x8e,0x96,0xb9,0x30,0x00,0x05,
+   0x00}},
+ {{0x5f,0x4f,0x82,0x55,0x81,0xbf,0x1f,
+   0x9c,0x8e,0x96,0xb9,0x30,0x00,0x05,
+   0x00}},
+ {{0x5f,0x4f,0x82,0x55,0x81,0xbf,0x1f,
+   0x9c,0x8e,0x96,0xb9,0x30,0x00,0x05,
+   0x00}},
+ {{0x5f,0x4f,0x82,0x55,0x81,0x0b,0x3e,
+   0xe9,0x8b,0xe7,0x04,0x00,0x00,0x05,
+   0x00}},
+ {{0x7f,0x63,0x83,0x6c,0x1c,0x72,0xf0,
+   0x58,0x8c,0x57,0x73,0x20,0x00,0x06,
+   0x01}},
+ {{0xa3,0x7f,0x87,0x86,0x97,0x24,0xf5,
+   0x02,0x88,0xff,0x25,0x10,0x00,0x02,
+   0x01}},
+ {{0xce,0x9f,0x92,0xa9,0x17,0x24,0xf5,
+   0x02,0x88,0xff,0x25,0x10,0x00,0x07,
+   0x01}}
+};
+
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT1XXXxXXX_1_H[] =   /* TW: New */
+{
+ {{0x38,0x27,0x9c,0x2c,0x80,0xbf,0x1f,
+   0x9c,0x8e,0x96,0xb9,0x30,0x00,0x00,
+   0x00}},
+ {{0x38,0x27,0x9c,0x2c,0x80,0xbf,0x1f,
+   0x9c,0x8e,0x96,0xb9,0x30,0x00,0x00,
+   0x00}},
+ {{0x38,0x27,0x9c,0x2c,0x80,0xbf,0x1f,
+   0x9c,0x8e,0x96,0xb9,0x30,0x00,0x00,
+   0x00}},
+ {{0x38,0x27,0x9c,0x2c,0x80,0xbf,0x1f,
+   0x9c,0x8e,0x96,0xb9,0x30,0x00,0x00,
+   0x00}},
+ {{0x38,0x27,0x9c,0x2c,0x80,0x0b,0x3e,
+   0xe9,0x8b,0xe7,0x04,0x00,0x00,0x00,
+   0x00}},
+ {{0x4d,0x31,0x91,0x3b,0x03,0x72,0xf0,
+   0x58,0x8c,0x57,0x73,0x20,0x00,0x01,
+   0x01}},
+ {{0x63,0x3f,0x87,0x4a,0x92,0x24,0xf5,
+   0x02,0x88,0xff,0x25,0x10,0x00,0x01,
+   0x01}}
+};
+
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11400x1050_1[] =   /* TW: New */
+{
+ {{0x6f,0x4f,0x93,0x54,0x82,0x9e,0x1f,
+   0x93,0x86,0x8f,0x9f,0x30,0x00,0x05,
+   0x00}},
+ {{0x6f,0x4f,0x93,0x54,0x82,0x6c,0x1f,
+   0x60,0x84,0x5d,0x6d,0x10,0x00,0x05,
+   0x00}},
+ {{0x6f,0x4f,0x93,0x54,0x82,0x9e,0x1f,
+   0x93,0x86,0x8f,0x9f,0x30,0x00,0x05,
+   0x00}},
+ {{0x6f,0x4f,0x93,0x54,0x82,0x6c,0x1f,
+   0x60,0x84,0x5d,0x6d,0x10,0x00,0x05,
+   0x00}},
+ {{0x6f,0x4f,0x93,0x54,0x82,0xee,0x1f,
+   0xe2,0x86,0xdf,0xef,0x10,0x00,0x05,
+   0x00}},
+ {{0x83,0x63,0x87,0x68,0x16,0x66,0xf0,
+   0x5a,0x8e,0x57,0x67,0x20,0x00,0x06,
+   0x01}},
+ {{0x9f,0x7f,0x83,0x84,0x92,0x0e,0xf5,
+   0x02,0x86,0xff,0x0f,0x10,0x00,0x02,
+   0x01}},
+ {{0xbf,0x9f,0x83,0xa4,0x12,0x0e,0x5a,
+   0x02,0x86,0xff,0x0f,0x09,0x00,0x07,
+   0x01}},
+ {{0xce,0xae,0x92,0xb3,0x01,0x28,0x10,
+   0x1a,0x80,0x19,0x29,0x0f,0x00,0x03,
+   0x00}}
+};
+
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11400x1050_1_H[] =   /* TW: New */
+{
+ {{0x47,0x27,0x8b,0x2c,0x1a,0x9e,0x1f,
+   0x93,0x86,0x8f,0x9f,0x30,0x00,0x05,
+   0x00}},
+ {{0x47,0x27,0x8b,0x2c,0x1a,0x6c,0x1f,
+   0x60,0x84,0x5d,0x6d,0x10,0x00,0x05,
+   0x00}},
+ {{0x47,0x27,0x8b,0x30,0x1e,0x9e,0x1f,
+   0x92,0x86,0x8f,0x9f,0x30,0x00,0x05,
+   0x00}},
+ {{0x47,0x27,0x8b,0x2c,0x1a,0x6c,0x1f,
+   0x60,0x84,0x5d,0x6d,0x10,0x00,0x05,
+   0x00}},
+ {{0x47,0x27,0x8b,0x2c,0x1a,0xee,0x1f,
+   0xe2,0x86,0xdf,0xef,0x10,0x00,0x05,
+   0x00}},
+ {{0x51,0x31,0x95,0x36,0x04,0x66,0xf0,
+   0x5a,0x8e,0x57,0x67,0x20,0x00,0x01,
+   0x01}},
+ {{0x5f,0x3f,0x83,0x44,0x92,0x0e,0xf5,
+   0x02,0x86,0xff,0x0f,0x10,0x00,0x01,
+   0x01}},
+ {{0x6f,0x4f,0x93,0x54,0x82,0x0e,0x5a,
+   0x02,0x86,0xff,0x0f,0x09,0x00,0x05,
+   0x01}},
+ {{0x76,0x56,0x9a,0x5b,0x89,0x28,0x10,
+   0x1c,0x80,0x19,0x29,0x0b,0x00,0x05,
+   0x00}}
+};
+
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11400x1050_2[] =    /* TW: New */
+{
+ {{0xce,0x4f,0x92,0x8c,0x1a,0x28,0x9a,
+   0xdb,0x8f,0x8f,0x29,0x21,0x00,0x03,
+   0x00}},
+ {{0xce,0x4f,0x92,0x8c,0x1a,0x28,0x9a,
+   0xc2,0x86,0x5d,0x29,0x01,0x00,0x03,
+   0x01}},
+ {{0xce,0x4f,0x92,0x8c,0x1a,0x28,0x9a,
+   0xdb,0x8f,0x8f,0x29,0x21,0x00,0x03,
+   0x00}},
+ {{0xce,0x4f,0x92,0x8c,0x1a,0x28,0x9a,
+   0xc2,0x86,0x5d,0x29,0x01,0x00,0x03,
+   0x00}},
+ {{0xce,0x4f,0x92,0x8c,0x1a,0x28,0x9e,
+   0x03,0x87,0xdf,0x29,0x01,0x00,0x03,
+   0x00}},
+ {{0xce,0x63,0x92,0x96,0x04,0x28,0xd4,
+   0x3f,0x83,0x57,0x29,0x01,0x00,0x07,
+   0x01}},
+ {{0xce,0x7f,0x92,0xa4,0x12,0x28,0xd4,
+   0x93,0x87,0xff,0x29,0x21,0x00,0x07,
+   0x01}},
+ {{0xce,0x9f,0x92,0xb4,0x02,0x28,0x5a,
+   0x13,0x87,0xff,0x29,0x29,0x00,0x03,
+   0x01}},
+ {{0xce,0xae,0x92,0xbc,0x0a,0x28,0x10,
+   0x20,0x84,0x19,0x29,0x0f,0x00,0x03,
+   0x00}}
+};
+
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11400x1050_2_H[] =    /* TW: New */
+{
+ {{0xa6,0x27,0x8a,0x64,0x92,0x28,0x9a,
+   0xdb,0x8f,0x8f,0x29,0x21,0x00,0x06,
+   0x00}},
+ {{0xa6,0x27,0x8a,0x64,0x92,0x28,0x9a,
+   0xc2,0x86,0x5d,0x29,0x01,0x00,0x06,
+   0x00}},
+ {{0xa6,0x27,0x8a,0x64,0x92,0x28,0x9a,
+   0xdb,0x8f,0x8f,0x29,0x21,0x00,0x06,
+   0x00}},
+ {{0xa6,0x27,0x8a,0x64,0x92,0x28,0x9a,
+   0xc2,0x86,0x5d,0x29,0x01,0x00,0x06,
+   0x00}},
+ {{0xa6,0x27,0x8a,0x64,0x92,0x28,0x9e,
+   0x03,0x87,0xdf,0x29,0x01,0x00,0x06,
+   0x00}},
+ {{0x9c,0x31,0x80,0x64,0x92,0x28,0xd4,
+   0x3f,0x83,0x57,0x29,0x01,0x00,0x06,
+   0x01}},
+ {{0x8e,0x3f,0x92,0x64,0x12,0x28,0xd4,
+   0x93,0x87,0xff,0x29,0x21,0x00,0x06,
+   0x01}},
+ {{0x7e,0x4f,0x82,0x64,0x12,0x28,0x5a,
+   0x13,0x87,0xff,0x29,0x29,0x00,0x06,
+   0x01}},
+ {{0x76,0x56,0x9a,0x64,0x92,0x28,0x10,
+   0x20,0x84,0x19,0x29,0x0f,0x00,0x05,
+   0x00}}
+};
+
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11280x768_1[] =    /* TW: New */
+{	/* TW: Temp data, invalid */
+ {{0x7e,0x4f,0x82,0x56,0x04,0xb8,0x1f,
+   0x90,0x84,0x8f,0xb9,0x30,0x00,0x06,
+   0x00 }},
+ {{0x7e,0x4f,0x82,0x56,0x04,0x86,0x1f,
+   0x5e,0x82,0x5d,0x87,0x10,0x00,0x06,
+   0x00 }},
+ {{0x7e,0x4f,0x82,0x56,0x04,0xb8,0x1f,
+   0x90,0x84,0x8f,0xb9,0x30,0x00,0x06,
+   0x00 }},
+ {{0x7e,0x4f,0x82,0x56,0x04,0x86,0x1f,
+   0x5e,0x82,0x5d,0x87,0x10,0x00,0x06,
+   0x00 }},
+ {{0x7e,0x4f,0x82,0x56,0x04,0x08,0x3e,
+   0xe0,0x84,0xdf,0x09,0x00,0x00,0x06,
+   0x00 }},
+ {{0x92,0x63,0x96,0x6a,0x18,0x80,0xf0,
+   0x58,0x8c,0x57,0x81,0x20,0x00,0x06,
+   0x01 }},
+ {{0xae,0x7f,0x92,0x86,0x94,0x28,0xf5,
+   0x00,0x84,0xff,0x29,0x10,0x00,0x02,
+   0x01 }},
+ {{0xce,0x9f,0x92,0xa6,0x14,0x28,0x5a,
+   0x00,0x84,0xff,0x29,0x09,0x00,0x07,
+   0x01}}
+};
+
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11280x768_1_H[] =   /* TW: New */
+{	/* TW: Temp data, invalid */
+ {{0x56,0x27,0x9a,0x2e,0x1c,0xb8,0x1f,
+   0x90,0x84,0x8f,0xb9,0x30,0x00,0x05,
+   0x00 }},
+ {{0x56,0x27,0x9a,0x2e,0x1c,0x86,0x1f,
+   0x5e,0x82,0x5d,0x87,0x10,0x00,0x05,
+   0x00 }},
+ {{0x56,0x27,0x9a,0x2e,0x1c,0xb8,0x1f,
+   0x90,0x84,0x8f,0xb9,0x30,0x00,0x05,
+   0x00 }},
+ {{0x56,0x27,0x9a,0x2e,0x1c,0x86,0x1f,
+   0x5e,0x82,0x5d,0x87,0x10,0x00,0x05,
+   0x01 }},
+ {{0x56,0x27,0x9a,0x2e,0x1c,0x08,0x3e,
+   0xe0,0x84,0xdf,0x09,0x00,0x00,0x05,
+   0x00 }},
+ {{0x60,0x31,0x84,0x38,0x86,0x80,0xf0,
+   0x58,0x8c,0x57,0x81,0x20,0x00,0x01,
+   0x01 }},
+ {{0x6e,0x3f,0x92,0x46,0x94,0x28,0xf5,
+   0x00,0x84,0xff,0x29,0x10,0x00,0x01,
+   0x01 }}
+};
+
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11280x768_2[] =  /* TW: New */
+{	/* TW: Temp data, invalid */
+ {{0xce,0x4f,0x92,0x81,0x0f,0x28,0x9a,
+   0xdb,0x8f,0x8f,0x29,0x21,0x00,0x03,
+   0x00 }},
+ {{0xce,0x4f,0x92,0x81,0x0f,0x28,0x9a,
+   0xc2,0x86,0x5d,0x29,0x01,0x00,0x03,
+   0x00 }},
+ {{0xce,0x4f,0x92,0x81,0x0f,0x28,0x9a,
+   0xdb,0x8f,0x8f,0x29,0x21,0x00,0x03,
+   0x00 }},
+ {{0xce,0x4f,0x92,0x81,0x0f,0x28,0x9a,
+   0xc2,0x86,0x5d,0x29,0x01,0x00,0x03,
+   0x00 }},
+ {{0xce,0x4f,0x92,0x81,0x0f,0x28,0x9e,
+   0x03,0x87,0xdf,0x29,0x01,0x00,0x03,
+   0x00 }},
+ {{0xce,0x63,0x92,0x8b,0x19,0x28,0xd4,
+   0x3f,0x83,0x57,0x29,0x01,0x00,0x03,
+   0x01 }},
+ {{0xce,0x7f,0x92,0x99,0x07,0x28,0xd4,
+   0x93,0x87,0xff,0x29,0x21,0x00,0x07,
+   0x01 }},
+ {{0xce,0x9f,0x92,0xa6,0x14,0x28,0x5a,
+   0x00,0x84,0xff,0x29,0x09,0x00,0x07,
+   0x01}}
+};
+
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11280x768_2_H[] =   /* TW: New */
+{	/* TW: Temp data, invalid */
+ {{0xa6,0x27,0x8a,0x59,0x87,0x28,0x9a,
+   0xdb,0x8f,0x8f,0x29,0x21,0x00,0x06,
+   0x00 }},
+ {{0xa6,0x27,0x8a,0x59,0x87,0x28,0x9a,
+   0xc2,0x86,0x5d,0x29,0x01,0x00,0x06,
+   0x00 }},
+ {{0xa6,0x27,0x8a,0x59,0x87,0x28,0x9a,
+   0xdb,0x8f,0x8f,0x29,0x21,0x00,0x06,
+   0x00 }},
+ {{0xa6,0x27,0x8a,0x59,0x87,0x28,0x9a,
+   0xc2,0x86,0x5d,0x29,0x01,0x00,0x06,
+   0x00 }},
+ {{0xa6,0x27,0x8a,0x59,0x87,0x28,0x9e,
+   0x03,0x87,0xdf,0x29,0x01,0x00,0x06,
+   0x00 }},
+ {{0x9c,0x31,0x80,0x59,0x87,0x28,0xd4,
+   0x3f,0x83,0x57,0x29,0x01,0x00,0x06,
+   0x01 }},
+ {{0x8e,0x3f,0x92,0x79,0x07,0x28,0xd4,
+   0x93,0x87,0xff,0x29,0x21,0x00,0x06,
+   0x01}}
+};
+
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11024x600_1[] =
+{
+        {{0x64,0x4f,0x88,0x54,0x9f,0x5a,0x3e,
+	  0xe8,0x8f,0x8f,0x5b,0x00,0x00,0x01,
+	  0x00}},
+        {{0x64,0x4f,0x88,0x54,0x9f,0x2e,0x3e,
+	  0xb9,0x80,0x5d,0x2f,0x00,0x00,0x01,
+	  0x00}},
+        {{0x64,0x4f,0x88,0x54,0x9f,0x5a,0x3e,
+	  0xe8,0x8f,0x8f,0x5b,0x00,0x00,0x01,
+	  0x00}},
+        {{0x64,0x4f,0x88,0x54,0x9f,0x2e,0x3e,
+	  0xb9,0x80,0x5d,0x2f,0x00,0x00,0x01,
+	  0x00}},
+        {{0x64,0x4f,0x88,0x54,0x9f,0xaf,0xba,
+	  0x3b,0x82,0xdf,0xb0,0x00,0x00,0x01,
+	  0x00}},
+        {{0x7e,0x63,0x82,0x68,0x15,0x1e,0xf1,
+	  0xae,0x85,0x57,0x1f,0x30,0x00,0x26,
+	  0x01}},
+        {{0xa3,0x7f,0x87,0x86,0x97,0x1e,0xf1,
+	  0xae,0x85,0x57,0x1f,0x30,0x00,0x02,
+	  0x01}}
+};
+
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11024x600_1_H[] =
+{
+        {{0x2f,0x27,0x93,0x2b,0x90,0xc4,0x1f,
+	  0x92,0x89,0x8f,0xb5,0x30,0x00,0x44,
+	  0x00}},
+        {{0x2f,0x27,0x93,0x2b,0x90,0x97,0x1f,
+	  0x60,0x87,0x5d,0x83,0x10,0x00,0x44,
+          0x00}},
+        {{0x2f,0x27,0x93,0x2b,0x90,0xc4,0x1f,
+	  0x92,0x89,0x8f,0xb5,0x30,0x00,0x44,
+	  0x00}},
+        {{0x2f,0x27,0x93,0x2b,0x90,0x97,0x1f,
+	  0x60,0x87,0x5d,0x83,0x10,0x00,0x44,
+	  0x00}},
+        {{0x2f,0x27,0x93,0x2b,0x90,0x04,0x3e,
+	  0xe2,0x89,0xdf,0x05,0x00,0x00,0x44,
+	  0x00}},
+        {{0x3c,0x31,0x80,0x35,0x1c,0x7c,0xf0,
+	  0x5a,0x8f,0x57,0x7d,0x20,0x00,0x55,
+	  0x01}},
+        {{0x4f,0x3f,0x93,0x45,0x0d,0x24,0xf5,
+	  0x02,0x88,0xff,0x25,0x10,0x00,0x01,
+	  0x01}}
+};
+
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11024x600_2[] =
+{
+        {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+	  0x4a,0x80,0x8f,0x25,0x30,0x00,0x06,
+	  0x00}},
+        {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+	  0x31,0x87,0x5d,0x25,0x30,0x00,0x06,
+	  0x00}},
+        {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+	  0x4a,0x80,0x8f,0x25,0x30,0x00,0x06,
+	  0x00}},
+        {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+          0x31,0x87,0x5d,0x25,0x30,0x00,0x06,
+	  0x00}},
+        {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+	  0x72,0x88,0xdf,0x25,0x30,0x00,0x06,
+	  0x00}},
+        {{0xa3,0x63,0x87,0x78,0x89,0x24,0xf1,
+	  0xae,0x84,0x57,0x25,0x30,0x00,0x02,
+	  0x01}},
+        {{0xa3,0x7f,0x87,0x86,0x97,0x24,0xf5,
+	  0x02,0x88,0xff,0x25,0x10,0x00,0x02,
+	  0x01}}
+};
+
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11024x600_2_H[] =
+{
+        {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
+	  0x4a,0x80,0x8f,0x25,0x30,0x00,0x01,
+	  0x00}},
+        {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
+	  0x31,0x87,0x5d,0x25,0x30,0x00,0x01,
+	  0x00}},
+        {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
+	  0x4a,0x80,0x8f,0x25,0x30,0x00,0x01,
+	  0x00}},
+        {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
+	  0x31,0x87,0x5d,0x25,0x30,0x00,0x01,
+	  0x00}},
+        {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
+	  0x72,0x88,0xdf,0x25,0x30,0x00,0x01,
+	  0x00}},
+        {{0x4f,0x31,0x93,0x3e,0x06,0x24,0xf1,
+	  0xae,0x84,0x57,0x25,0x30,0x00,0x01,
+	  0x01}},
+        {{0x4f,0x3f,0x93,0x45,0x0d,0x24,0xf5,
+	  0x02,0x88,0xff,0x25,0x10,0x00,0x01,
+	  0x01}}
+};
+
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11152x768_1[] =
+{
+        {{0x64,0x4f,0x88,0x54,0x9f,0xc4,0x1f,
+	  0x92,0x89,0x8f,0xb5,0x30,0x00,0x01,
+	  0x00}},
+        {{0x64,0x4f,0x88,0x54,0x9f,0x97,0x1f,
+	  0x60,0x87,0x5d,0x83,0x10,0x00,0x01,
+	  0x00}},
+        {{0x64,0x4f,0x88,0x54,0x9f,0xc4,0x1f,
+	  0x92,0x89,0x8f,0xb5,0x30,0x00,0x01,
+	  0x00}},
+        {{0x64,0x4f,0x88,0x54,0x9f,0x97,0x1f,
+	  0x60,0x87,0x5d,0x83,0x10,0x00,0x01,
+	  0x00}},
+        {{0x64,0x4f,0x88,0x54,0x9f,0x04,0x3e,
+	  0xe2,0x89,0xdf,0x05,0x00,0x00,0x01,
+	  0x00}},
+        {{0x7e,0x63,0x82,0x68,0x15,0x7c,0xf0,
+	  0x5a,0x8f,0x57,0x7d,0x20,0x00,0x26,
+	  0x01}},
+        {{0xa3,0x7f,0x87,0x86,0x97,0x24,0xf5,
+	  0x02,0x88,0xff,0x25,0x10,0x00,0x02,
+	  0x01}}
+};
+
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11152x768_1_H[] =
+{
+        {{0x2f,0x27,0x93,0x2b,0x90,0xc4,0x1f,
+	  0x92,0x89,0x8f,0xb5,0x30,0x00,0x44,
+	  0x00}},
+        {{0x2f,0x27,0x93,0x2b,0x90,0x97,0x1f,
+	  0x60,0x87,0x5d,0x83,0x10,0x00,0x44,
+	  0x00}},
+        {{0x2f,0x27,0x93,0x2b,0x90,0xc4,0x1f,
+	  0x92,0x89,0x8f,0xb5,0x30,0x00,0x44,
+	  0x00}},
+        {{0x2f,0x27,0x93,0x2b,0x90,0x97,0x1f,
+	  0x60,0x87,0x5d,0x83,0x10,0x00,0x44,
+	  0x00}},
+        {{0x2f,0x27,0x93,0x2b,0x90,0x04,0x3e,
+	  0xe2,0x89,0xdf,0x05,0x00,0x00,0x44,
+	  0x00}},
+        {{0x3c,0x31,0x80,0x35,0x1c,0x7c,0xf0,
+	  0x5a,0x8f,0x57,0x7d,0x20,0x00,0x55,
+	  0x01}},
+        {{0x4f,0x3f,0x93,0x45,0x0d,0x24,0xf5,
+	  0x02,0x88,0xff,0x25,0x10,0x00,0x01,
+	  0x01}}
+};
+
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11152x768_2[] =
+{
+        {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+	  0x4a,0x80,0x8f,0x25,0x30,0x00,0x06,
+	  0x00}},
+        {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+	  0x31,0x87,0x5d,0x25,0x30,0x00,0x06,
+	  0x00}},
+        {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+	  0x4a,0x80,0x8f,0x25,0x30,0x00,0x06,
+	  0x00}},
+        {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+	  0x31,0x87,0x5d,0x25,0x30,0x00,0x06,
+	  0x00}},
+        {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+	  0x72,0x88,0xdf,0x25,0x30,0x00,0x06,
+	  0x00}},
+        {{0xa3,0x63,0x87,0x78,0x89,0x24,0xf1,
+	  0xae,0x84,0x57,0x25,0x30,0x00,0x02,
+	  0x01}},
+        {{0xa3,0x7f,0x87,0x86,0x97,0x24,0xf5,
+	  0x02,0x88,0xff,0x25,0x10,0x00,0x02,
+	  0x01}}
+};
+
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11152x768_2_H[] =
+{
+        {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
+	  0x4a,0x80,0x8f,0x25,0x30,0x00,0x01,
+	  0x00}},
+        {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
+	  0x31,0x87,0x5d,0x25,0x30,0x00,0x01,
+	  0x00}},
+        {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
+	  0x4a,0x80,0x8f,0x25,0x30,0x00,0x01,
+	  0x00}},
+        {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
+	  0x31,0x87,0x5d,0x25,0x30,0x00,0x01,
+	  0x00}},
+        {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
+	  0x72,0x88,0xdf,0x25,0x30,0x00,0x01,
+	  0x00}},
+        {{0x4f,0x31,0x93,0x3e,0x06,0x24,0xf1,
+	  0xae,0x84,0x57,0x25,0x30,0x00,0x01,
+	  0x01}},
+        {{0x4f,0x3f,0x93,0x45,0x0d,0x24,0xf5,
+	  0x02,0x88,0xff,0x25,0x10,0x00,0x01,
+	  0x01}}
+};
+
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11600x1200_1[] =  
+{    /* TW: Temporary data - invalid */
+ {{0x6f,0x4f,0x93,0x54,0x82,0x9e,0x1f,
+   0x93,0x86,0x8f,0x9f,0x30,0x00,0x05,
+   0x00}},
+ {{0x6f,0x4f,0x93,0x54,0x82,0x6c,0x1f,
+   0x60,0x84,0x5d,0x6d,0x10,0x00,0x05,
+   0x00}},
+ {{0x6f,0x4f,0x93,0x54,0x82,0x9e,0x1f,
+   0x93,0x86,0x8f,0x9f,0x30,0x00,0x05,
+   0x00}},
+ {{0x6f,0x4f,0x93,0x54,0x82,0x6c,0x1f,
+   0x60,0x84,0x5d,0x6d,0x10,0x00,0x05,
+   0x00}},
+ {{0x6f,0x4f,0x93,0x54,0x82,0xee,0x1f,
+   0xe2,0x86,0xdf,0xef,0x10,0x00,0x05,
+   0x00}},
+ {{0x83,0x63,0x87,0x68,0x16,0x66,0xf0,
+   0x5a,0x8e,0x57,0x67,0x20,0x00,0x06,
+   0x01}},
+ {{0x9f,0x7f,0x83,0x84,0x92,0x0e,0xf5,
+   0x02,0x86,0xff,0x0f,0x10,0x00,0x02,
+   0x01}},
+ {{0xbf,0x9f,0x83,0xa4,0x12,0x0e,0x5a,
+   0x02,0x86,0xff,0x0f,0x09,0x00,0x07,
+   0x01}},
+ {{0xce,0xae,0x92,0xb3,0x01,0x28,0x10,
+   0x1a,0x80,0x19,0x29,0x0f,0x00,0x03,
+   0x00}}
+};
+
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11600x1200_1_H[] =
+{    /* TW: Temporary data - invalid */
+ {{0x47,0x27,0x8b,0x2c,0x1a,0x9e,0x1f,
+   0x93,0x86,0x8f,0x9f,0x30,0x00,0x05,
+   0x00}},
+ {{0x47,0x27,0x8b,0x2c,0x1a,0x6c,0x1f,
+   0x60,0x84,0x5d,0x6d,0x10,0x00,0x05,
+   0x00}},
+ {{0x47,0x27,0x8b,0x30,0x1e,0x9e,0x1f,
+   0x92,0x86,0x8f,0x9f,0x30,0x00,0x05,
+   0x00}},
+ {{0x47,0x27,0x8b,0x2c,0x1a,0x6c,0x1f,
+   0x60,0x84,0x5d,0x6d,0x10,0x00,0x05,
+   0x00}},
+ {{0x47,0x27,0x8b,0x2c,0x1a,0xee,0x1f,
+   0xe2,0x86,0xdf,0xef,0x10,0x00,0x05,
+   0x00}},
+ {{0x51,0x31,0x95,0x36,0x04,0x66,0xf0,
+   0x5a,0x8e,0x57,0x67,0x20,0x00,0x01,
+   0x01}},
+ {{0x5f,0x3f,0x83,0x44,0x92,0x0e,0xf5,
+   0x02,0x86,0xff,0x0f,0x10,0x00,0x01,
+   0x01}},
+ {{0x6f,0x4f,0x93,0x54,0x82,0x0e,0x5a,
+   0x02,0x86,0xff,0x0f,0x09,0x00,0x05,
+   0x01}},
+ {{0x76,0x56,0x9a,0x5b,0x89,0x28,0x10,
+   0x1c,0x80,0x19,0x29,0x0b,0x00,0x05,
+   0x00}}
+};
+
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11600x1200_2[] =
+{    /* TW: Temporary data - invalid */
+ {{0xce,0x4f,0x92,0x8c,0x1a,0x28,0x9a,
+   0xdb,0x8f,0x8f,0x29,0x21,0x00,0x03,
+   0x00}},
+ {{0xce,0x4f,0x92,0x8c,0x1a,0x28,0x9a,
+   0xc2,0x86,0x5d,0x29,0x01,0x00,0x03,
+   0x01}},
+ {{0xce,0x4f,0x92,0x8c,0x1a,0x28,0x9a,
+   0xdb,0x8f,0x8f,0x29,0x21,0x00,0x03,
+   0x00}},
+ {{0xce,0x4f,0x92,0x8c,0x1a,0x28,0x9a,
+   0xc2,0x86,0x5d,0x29,0x01,0x00,0x03,
+   0x00}},
+ {{0xce,0x4f,0x92,0x8c,0x1a,0x28,0x9e,
+   0x03,0x87,0xdf,0x29,0x01,0x00,0x03,
+   0x00}},
+ {{0xce,0x63,0x92,0x96,0x04,0x28,0xd4,
+   0x3f,0x83,0x57,0x29,0x01,0x00,0x07,
+   0x01}},
+ {{0xce,0x7f,0x92,0xa4,0x12,0x28,0xd4,
+   0x93,0x87,0xff,0x29,0x21,0x00,0x07,
+   0x01}},
+ {{0xce,0x9f,0x92,0xb4,0x02,0x28,0x5a,
+   0x13,0x87,0xff,0x29,0x29,0x00,0x03,
+   0x01}},
+ {{0xce,0xae,0x92,0xbc,0x0a,0x28,0x10,
+   0x20,0x84,0x19,0x29,0x0f,0x00,0x03,
+   0x00}}
+};
+
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11600x1200_2_H[] =    /* TW: New */
+{    /* TW: Temporary data - invalid */
+ {{0xa6,0x27,0x8a,0x64,0x92,0x28,0x9a,
+   0xdb,0x8f,0x8f,0x29,0x21,0x00,0x06,
+   0x00}},
+ {{0xa6,0x27,0x8a,0x64,0x92,0x28,0x9a,
+   0xc2,0x86,0x5d,0x29,0x01,0x00,0x06,
+   0x00}},
+ {{0xa6,0x27,0x8a,0x64,0x92,0x28,0x9a,
+   0xdb,0x8f,0x8f,0x29,0x21,0x00,0x06,
+   0x00}},
+ {{0xa6,0x27,0x8a,0x64,0x92,0x28,0x9a,
+   0xc2,0x86,0x5d,0x29,0x01,0x00,0x06,
+   0x00}},
+ {{0xa6,0x27,0x8a,0x64,0x92,0x28,0x9e,
+   0x03,0x87,0xdf,0x29,0x01,0x00,0x06,
+   0x00}},
+ {{0x9c,0x31,0x80,0x64,0x92,0x28,0xd4,
+   0x3f,0x83,0x57,0x29,0x01,0x00,0x06,
+   0x01}},
+ {{0x8e,0x3f,0x92,0x64,0x12,0x28,0xd4,
+   0x93,0x87,0xff,0x29,0x21,0x00,0x06,
+   0x01}},
+ {{0x7e,0x4f,0x82,0x64,0x12,0x28,0x5a,
+   0x13,0x87,0xff,0x29,0x29,0x00,0x06,
+   0x01}},
+ {{0x76,0x56,0x9a,0x64,0x92,0x28,0x10,
+   0x20,0x84,0x19,0x29,0x0f,0x00,0x05,
+   0x00}}
+};
+
+
+static const SiS310_LVDSCRT1DataStruct  SiS310_CHTVCRT1UNTSC[] =    /* TW: New */
+{ 
+	{{0x64,0x4f,0x88,0x56,0x9f,0x56,0x3e,
+	  0xe8,0x84,0x8f,0x57,0x20,0x00,0x01,
+	  0x00 }},
+	{{0x64,0x4f,0x88,0x56,0x9f,0x56,0x3e,
+	  0xd0,0x82,0x5d,0x57,0x00,0x00,0x01,
+	  0x00 }},
+	{{0x64,0x4f,0x88,0x56,0x9f,0x56,0x3e,
+	  0xe8,0x84,0x8f,0x57,0x20,0x00,0x01,
+	  0x00 }},
+	{{0x64,0x4f,0x88,0x56,0x9f,0x56,0x3e,
+	  0xd0,0x82,0x5d,0x57,0x00,0x00,0x01,
+	  0x00 }},
+	{{0x5d,0x4f,0x81,0x56,0x99,0x56,0xba,
+	  0x0a,0x84,0xdf,0x57,0x00,0x00,0x01,
+	  0x00 }},
+	{{0x80,0x63,0x84,0x6d,0x0f,0xec,0xf0,
+	  0x7a,0x8f,0x57,0xed,0x20,0x00,0x06,
+	  0x01 }},
+	{{0x8c,0x7f,0x90,0x86,0x09,0xaf,0xf5,  /* TW: 1024x768 */
+	  0x36,0x88,0xff,0xb0,0x10,0x00,0x02,
+	  0x01}}
+};
+
+static const SiS310_LVDSCRT1DataStruct  SiS310_CHTVCRT1ONTSC[] =    /* TW: New */
+{ 
+	{{0x63,0x4f,0x87,0x5a,0x9f,0x0b,0x3e,
+	  0xc0,0x84,0x8f,0x0c,0x20,0x00,0x01,
+	  0x00 }},
+	{{0x63,0x4f,0x87,0x5a,0x9f,0x0b,0x3e,
+	  0xb0,0x8d,0x5d,0x0c,0x00,0x00,0x01,
+	  0x00 }},
+	{{0x63,0x4f,0x87,0x5a,0x9f,0x0b,0x3e,
+	  0xc0,0x84,0x8f,0x0c,0x20,0x00,0x01,
+	  0x00 }},
+	{{0x63,0x4f,0x87,0x5a,0x9f,0x0b,0x3e,
+	  0xb0,0x8d,0x5d,0x0c,0x00,0x00,0x01,
+	  0x00 }},
+	{{0x5d,0x4f,0x81,0x58,0x9d,0x0b,0x3e,
+	  0xe8,0x84,0xdf,0x0c,0x00,0x00,0x01,
+	  0x00 }},
+	{{0x7d,0x63,0x81,0x68,0x0e,0xba,0xf0,
+	  0x78,0x8a,0x57,0xbb,0x20,0x00,0x06,
+	  0x01 }},
+	{{0x8c,0x7f,0x90,0x82,0x06,0x46,0xf5,   /* TW: 1024x768 */
+	  0x15,0x88,0xff,0x47,0x70,0x00,0x02,
+	  0x01 }}
+};
+
+static const SiS310_LVDSCRT1DataStruct  SiS310_CHTVCRT1UPAL[] =    /* TW: New */
+{ 
+	{{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+	  0xf8,0x83,0x8f,0x70,0x20,0x00,0x05,
+	  0x00 }},
+	{{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+	  0xde,0x81,0x5d,0x70,0x00,0x00,0x05,
+	  0x00 }},
+	{{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+	  0xf8,0x83,0x8f,0x70,0x20,0x00,0x05,
+	  0x00 }},
+	{{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+	  0xde,0x81,0x5d,0x70,0x00,0x00,0x05,
+	  0x00 }},
+	{{0x64,0x4f,0x88,0x5a,0x9f,0x6f,0xba,
+	  0x15,0x83,0xdf,0x70,0x00,0x00,0x01,
+	  0x00 }},
+	{{0x73,0x63,0x97,0x69,0x8b,0xec,0xf0,
+	  0x90,0x8c,0x57,0xed,0x20,0x00,0x05,
+	  0x01 }},
+	{{0xaa,0x7f,0x8e,0x8e,0x96,0xe6,0xf5,   /* TW: 1024x768 */
+	  0x50,0x88,0xff,0xe7,0x10,0x00,0x02,
+	  0x01}}
+};
+
+static const SiS310_LVDSCRT1DataStruct  SiS310_CHTVCRT1OPAL[] =    /* TW: New */
+{
+	{{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+	  0xf0,0x83,0x8f,0x70,0x20,0x00,0x05,
+	  0x00 }},
+	{{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+	  0xde,0x81,0x5d,0x70,0x00,0x00,0x05,
+	  0x00 }},
+	{{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+	  0xf0,0x83,0x8f,0x70,0x20,0x00,0x05,
+	  0x00 }},
+	{{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+	  0xde,0x81,0x5d,0x70,0x00,0x00,0x05,
+	  0x00 }},
+	{{0x64,0x4f,0x88,0x58,0x9d,0x6f,0xba,
+	  0x15,0x83,0xdf,0x70,0x00,0x00,0x01,
+	  0x00 }},
+	{{0x71,0x63,0x95,0x69,0x8c,0x6f,0xf0,
+	  0x5a,0x8b,0x57,0x70,0x20,0x00,0x05,
+	  0x01 }},
+	{{0xaa,0x7f,0x8e,0x8f,0x96,0x69,0xf5,   /* TW:  1024x768 */
+	  0x28,0x88,0xff,0x6a,0x10,0x00,0x02,
+	  0x01 }}
+};
+
+static const SiS310_LVDSCRT1DataStruct  SiS310_CHTVCRT1SOPAL[] =    /* TW: New */
+{
+	{{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+	  0xf0,0x83,0x8f,0x70,0x20,0x00,0x05,
+	  0x00 }},
+	{{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+	  0xde,0x81,0x5d,0x70,0x00,0x00,0x05,
+	  0x00 }},
+	{{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+	  0xf0,0x83,0x8f,0x70,0x20,0x00,0x05,
+	  0x00 }},
+	{{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+	  0xde,0x81,0x5d,0x70,0x00,0x00,0x05,
+	  0x00 }},
+	{{0x64,0x4f,0x88,0x58,0x9d,0x6f,0xba,
+	  0x15,0x83,0xdf,0x70,0x00,0x00,0x01,
+	  0x00 }},
+	{{0x71,0x63,0x95,0x69,0x8c,0x6f,0xf0,
+	  0x5a,0x8b,0x57,0x70,0x20,0x00,0x05,
+	  0x01 }},
+	{{0xaa,0x7f,0x8e,0x8f,0x96,0x69,0xf5,   /* TW:  1024x768 */
+	  0x28,0x88,0xff,0x6a,0x10,0x00,0x02,
+	  0x01 }}
+};
+
+/* TW: New data for Chrontel 7019 (From 650/LVDS BIOS 1.10.0) */
+typedef struct _SiS310_CHTVRegDataStruct
+{
+ 	UCHAR Reg[16];
+} SiS310_CHTVRegDataStruct;
+
+static const SiS310_CHTVRegDataStruct SiS310_CHTVReg_UNTSC[] =
+{
+	{{0x4a,0x77,0xbb,0x94,0x84,0x48,0xfe,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x4a,0x77,0xbb,0x94,0x84,0x48,0xfe,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x4a,0x77,0xbb,0x94,0x84,0x48,0xfe,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x4a,0x77,0xbb,0x94,0x84,0x48,0xfe,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x6a,0x77,0xbb,0x6e,0x84,0x2e,0x02,0x5a,0x04,0x00,0x80,0x20,0x7e,0x80,0x98,0x00}},
+	{{0xcf,0x77,0xb7,0xc8,0x84,0x3b,0x02,0x5a,0x04,0x00,0x80,0x19,0x88,0x30,0x7f,0x00}},
+	{{0xee,0x77,0xbb,0x66,0x87,0x32,0x01,0x5a,0x04,0x00,0x80,0x1b,0xd3,0xf2,0x36,0x00}}
+};
+
+static const SiS310_CHTVRegDataStruct SiS310_CHTVReg_ONTSC[] =
+{
+	{{0x49,0x77,0xbb,0x7b,0x84,0x34,0x00,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x49,0x77,0xbb,0x7b,0x84,0x34,0x00,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x49,0x77,0xbb,0x7b,0x84,0x34,0x00,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x49,0x77,0xbb,0x7b,0x84,0x34,0x00,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x69,0x77,0xbb,0x6e,0x84,0x1e,0x00,0x5a,0x04,0x00,0x80,0x25,0x1a,0x43,0x04,0x00}},
+	{{0xce,0x77,0xb7,0xb6,0x83,0x2c,0x02,0x5a,0x04,0x00,0x80,0x1c,0x00,0x82,0x97,0x00}},
+	{{0xed,0x77,0xbb,0x66,0x8c,0x21,0x02,0x5a,0x04,0x00,0x80,0x1f,0x9f,0xc1,0x0c,0x00}}
+};
+
+static const SiS310_CHTVRegDataStruct SiS310_CHTVReg_UPAL[] =
+{
+	{{0x41,0x7f,0xb7,0x34,0xad,0x50,0x34,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x41,0x7f,0xb7,0x80,0x85,0x50,0x00,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x41,0x7f,0xb7,0x34,0xad,0x50,0x34,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x41,0x7f,0xb7,0x12,0x85,0x50,0x00,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x61,0x7f,0xb7,0x99,0x84,0x35,0x04,0x5a,0x05,0x00,0x80,0x26,0x2a,0x55,0x5d,0x00}},
+	{{0xc3,0x7f,0xb7,0x7a,0x84,0x40,0x02,0x5a,0x05,0x00,0x80,0x1f,0x84,0x3d,0x28,0x00}},
+	{{0xe5,0x7f,0xb7,0x1d,0xa7,0x3e,0x04,0x5a,0x05,0x00,0x80,0x20,0x3e,0xe4,0x22,0x00}}
+};
+
+static const SiS310_CHTVRegDataStruct SiS310_CHTVReg_OPAL[] =
+{
+	{{0x41,0x7f,0xb7,0x36,0xad,0x50,0x34,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x41,0x7f,0xb7,0x86,0x85,0x50,0x00,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x41,0x7f,0xb7,0x36,0xad,0x50,0x34,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x41,0x7f,0xb7,0x86,0x85,0x50,0x00,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x61,0x7f,0xb7,0x99,0x84,0x35,0x04,0x5a,0x05,0x00,0x80,0x26,0x2a,0x55,0x5d,0x00}},
+	{{0xc1,0x7f,0xb7,0x4d,0x8c,0x1e,0x31,0x5a,0x05,0x00,0x80,0x26,0x78,0x19,0x34,0x00}},
+	{{0xe4,0x7f,0xb7,0x1e,0xaf,0x29,0x37,0x5a,0x05,0x00,0x80,0x25,0x8c,0xb2,0x2a,0x00}}
+};
+
+static const SiS310_CHTVRegDataStruct SiS310_CHTVReg_SOPAL[] =
+{
+	{{0x41,0x7f,0xb7,0x36,0xad,0x50,0x34,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x41,0x7f,0xb7,0x86,0x85,0x50,0x00,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x41,0x7f,0xb7,0x36,0xad,0x50,0x34,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x41,0x7f,0xb7,0x86,0x85,0x50,0x00,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x61,0x7f,0xb7,0x99,0x84,0x35,0x04,0x5a,0x05,0x00,0x80,0x26,0x2a,0x55,0x5d,0x00}},
+	{{0xc1,0x7f,0xb7,0x4d,0x8c,0x1e,0x31,0x5a,0x05,0x00,0x80,0x26,0x78,0x19,0x34,0x00}},
+	{{0xe4,0x7f,0xb7,0x1e,0xaf,0x29,0x37,0x5a,0x05,0x00,0x80,0x25,0x8c,0xb2,0x2a,0x00}}
+};
+
+static const SiS310_CHTVRegDataStruct SiS310_CHTVReg_UPALM[] =
+{
+	{{0x52,0x77,0xbb,0x94,0x84,0x48,0xfe,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x52,0x77,0xbb,0x94,0x84,0x48,0xfe,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x52,0x77,0xbb,0x94,0x84,0x48,0xfe,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x52,0x77,0xbb,0x94,0x84,0x48,0xfe,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x72,0x77,0xbb,0x6e,0x84,0x2e,0x02,0x5a,0x04,0x00,0x80,0x20,0x76,0xdb,0x6e,0x00}},
+	{{0xd7,0x77,0xb7,0xc8,0x84,0x3b,0x02,0x5a,0x04,0x00,0x80,0x19,0x84,0x0a,0xc7,0x00}},
+	{{0xf6,0x77,0xbb,0x66,0x87,0x32,0x01,0x5a,0x04,0x00,0x80,0x1b,0xdc,0xb0,0x8d,0x00}}
+};
+
+static const SiS310_CHTVRegDataStruct SiS310_CHTVReg_OPALM[] =
+{
+	{{0x51,0x77,0xbb,0x7b,0x84,0x34,0x00,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x51,0x77,0xbb,0x7b,0x84,0x34,0x00,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x51,0x77,0xbb,0x7b,0x84,0x34,0x00,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x51,0x77,0xbb,0x7b,0x84,0x34,0x00,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x71,0x77,0xbb,0x6e,0x84,0x1e,0x00,0x5a,0x04,0x00,0x80,0x25,0x1a,0x1f,0x59,0x00}},
+	{{0xd6,0x77,0xb7,0xb6,0x83,0x2c,0x02,0x5a,0x04,0x00,0x80,0x1b,0xf8,0x1f,0x82,0x00}},
+	{{0xf5,0x77,0xbb,0x66,0x8c,0x21,0x02,0x5a,0x04,0x00,0x80,0x1f,0x58,0x46,0x9f,0x00}}
+};
+
+static const SiS310_CHTVRegDataStruct SiS310_CHTVReg_UPALN[] =
+{
+	{{0x41,0x7f,0xb7,0x34,0xad,0x50,0x34,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x41,0x7f,0xb7,0x80,0x85,0x50,0x00,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x41,0x7f,0xb7,0x34,0xad,0x50,0x34,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x41,0x7f,0xb7,0x12,0x85,0x50,0x00,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x61,0x7f,0xb7,0x99,0x84,0x35,0x04,0x5a,0x05,0x00,0x80,0x1f,0x0d,0x54,0x5e,0x00}},
+	{{0xc3,0x7f,0xb7,0x7a,0x84,0x40,0x02,0x5a,0x05,0x00,0x80,0x19,0x78,0xef,0x35,0x00}},
+	{{0xe5,0x7f,0xb7,0x1d,0xa7,0x3e,0x04,0x5a,0x05,0x00,0x80,0x1a,0x33,0x3f,0x2f,0x00}}
+};
+
+static const SiS310_CHTVRegDataStruct SiS310_CHTVReg_OPALN[] =
+{
+	{{0x41,0x7f,0xb7,0x36,0xad,0x50,0x34,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x41,0x7f,0xb7,0x86,0x85,0x50,0x00,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x41,0x7f,0xb7,0x36,0xad,0x50,0x34,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x41,0x7f,0xb7,0x86,0x85,0x50,0x00,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x61,0x7f,0xb7,0x99,0x84,0x35,0x04,0x5a,0x05,0x00,0x80,0x1f,0x0d,0x54,0x5e,0x00}},
+	{{0xc1,0x7f,0xb7,0x4d,0x8c,0x1e,0x31,0x5a,0x05,0x00,0x80,0x1f,0x15,0xc0,0x1e,0x00}},
+	{{0xe4,0x7f,0xb7,0x1e,0xaf,0x29,0x37,0x5a,0x05,0x00,0x80,0x1d,0xf1,0x6c,0xcb,0x00}}
+};
+
+static const UCHAR SiS310_CHTVVCLKUNTSC[] = {0x41,0x41,0x41,0x41,0x42,0x46,0x53};
+
+static const UCHAR SiS310_CHTVVCLKONTSC[] = {0x48,0x48,0x48,0x48,0x45,0x43,0x51};
+
+static const UCHAR SiS310_CHTVVCLKUPAL[]  = {0x47,0x47,0x47,0x47,0x48,0x4a,0x54};
+
+static const UCHAR SiS310_CHTVVCLKOPAL[]  = {0x47,0x47,0x47,0x47,0x48,0x4f,0x52};
+
+static const UCHAR SiS310_CHTVVCLKSOPAL[] = {0x47,0x47,0x47,0x47,0x48,0x4f,0x52};
+
+static const UCHAR SiS310_CHTVVCLKUPALM[] = {0x41,0x41,0x41,0x41,0x42,0x46,0x53};
+
+static const UCHAR SiS310_CHTVVCLKOPALM[] = {0x48,0x48,0x48,0x48,0x45,0x43,0x51};
+
+static const UCHAR SiS310_CHTVVCLKUPALN[] = {0x47,0x47,0x47,0x47,0x48,0x4a,0x54};
+
+static const UCHAR SiS310_CHTVVCLKOPALN[] = {0x47,0x47,0x47,0x47,0x48,0x4f,0x52};
+
+/* TW: New end */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/sis/Imakefile b/xc/programs/Xserver/hw/xfree86/drivers/sis/Imakefile
index d576141f0..9823581d7 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/sis/Imakefile
+++ b/xc/programs/Xserver/hw/xfree86/drivers/sis/Imakefile
@@ -1,4 +1,4 @@
-XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/Imakefile,v 1.27 2002/02/13 21:32:50 dawes Exp $
+XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/Imakefile,v 1.31 2003/02/17 17:06:44 dawes Exp $
 XCOMM
 XCOMM This is an Imakefile for the SIS driver.  
 XCOMM
@@ -6,20 +6,29 @@ XCOMM
 #define IHaveModules
 #include <Server.tmpl>
 
+/* DRI static build only works on Linux */
+#if !defined(LinuxArchitecture) && !DoLoadableServer && BuildXF86DRI
+#undef BuildXF86DRI
+#define BuildXF86DRI NO
+#endif
+
 #if BuildXF86DRI
 DRISRCS = sis_dri.c
 DRIOBJS = sis_dri.o
-DRIINCLUDES = -I$(SERVERSRC)/GL/dri -I$(LIBSRC)/GL/dri
+DRIINCLUDES = -I$(SERVERSRC)/GL/dri -I$(LIBSRC)/GL/dri \
+              -I$(XTOP)/include
 DRIDEFINES = $(GLX_DEFINES)
 #endif
 
 SRCS = sis_driver.c sis_dac.c sis_cursor.c sis_accel.c sis_setup.c\
-       sis530_accel.c sis300_accel.c sis_vga.c sis_vb.c\
-       sis_opt.c sis_dga.c sis_video.c sis_bios.c sis_shadow.c \
+       sis300_accel.c sis310_accel.c sis_vga.c sis_vb.c\
+       sis_opt.c sis_dga.c sis_video.c init.c init301.c sis_shadow.c \
+       sis6326_video.c \
 	   $(DRISRCS)
 OBJS = sis_driver.o sis_dac.o sis_cursor.o sis_accel.o sis_setup.o\
-       sis530_accel.o sis300_accel.o sis_vga.o sis_vb.o\
-       sis_opt.o sis_dga.o sis_video.o sis_bios.o sis_shadow.o \
+       sis300_accel.o sis310_accel.o sis_vga.o sis_vb.o\
+       sis_opt.o sis_dga.o sis_video.o init.o init301.o sis_shadow.o \
+       sis6326_video.o \
 	   $(DRIOBJS)
 
 #if defined(XF86DriverSDK)
@@ -31,10 +40,10 @@ INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86OSSRC) -I$(SERVERSRC)/Xext \
            -I$(XF86SRC)/xf1bpp -I$(XF86SRC)/xf4bpp \
            -I$(XF86SRC)/xf24_32bpp \
            -I$(XF86SRC)/vgahw -I$(XF86SRC)/ramdac \
-           -I$(XF86SRC)/ddc -I$(XF86SRC)/i2c -I$(XF86OSSRC)/vbe \
+           -I$(XF86SRC)/ddc -I$(XF86SRC)/i2c -I$(XF86SRC)/vbe \
            -I$(XF86SRC)/rac -I$(XF86SRC)/int10 \
            -I$(FONTINCSRC) -I$(SERVERSRC)/include -I$(XINCLUDESRC) \
-           -I$(EXTINCSRC) \
+           -I$(XTOP)/include/extensions \
 		   -I$(SERVERSRC)/render \
 		   -I$(XF86SRC)/shadowfb \
            $(DRIINCLUDES)
@@ -62,11 +71,19 @@ InstallDriverSDKNonExecFile(Imakefile,$(DRIVERSDKDIR)/drivers/sis)
 InstallDriverSDKNonExecFile(sis.h,$(DRIVERSDKDIR)/drivers/sis)
 InstallDriverSDKNonExecFile(sis300_accel.c,$(DRIVERSDKDIR)/drivers/sis)
 InstallDriverSDKNonExecFile(sis300_accel.h,$(DRIVERSDKDIR)/drivers/sis)
-InstallDriverSDKNonExecFile(sis530_accel.c,$(DRIVERSDKDIR)/drivers/sis)
-InstallDriverSDKNonExecFile(sis530_accel.h,$(DRIVERSDKDIR)/drivers/sis)
+InstallDriverSDKNonExecFile(sis310_accel.c,$(DRIVERSDKDIR)/drivers/sis)
+InstallDriverSDKNonExecFile(sis310_accel.h,$(DRIVERSDKDIR)/drivers/sis)
 InstallDriverSDKNonExecFile(sis_accel.c,$(DRIVERSDKDIR)/drivers/sis)
-InstallDriverSDKNonExecFile(sis_bios.c,$(DRIVERSDKDIR)/drivers/sis)
-InstallDriverSDKNonExecFile(sis_bios.h,$(DRIVERSDKDIR)/drivers/sis)
+InstallDriverSDKNonExecFile(init.c,$(DRIVERSDKDIR)/drivers/sis)
+InstallDriverSDKNonExecFile(init.h,$(DRIVERSDKDIR)/drivers/sis)
+InstallDriverSDKNonExecFile(init301.c,$(DRIVERSDKDIR)/drivers/sis)
+InstallDriverSDKNonExecFile(init301.h,$(DRIVERSDKDIR)/drivers/sis)
+InstallDriverSDKNonExecFile(osdef.h,$(DRIVERSDKDIR)/drivers/sis)
+InstallDriverSDKNonExecFile(initdef.h,$(DRIVERSDKDIR)/drivers/sis)
+InstallDriverSDKNonExecFile(300vtbl.h,$(DRIVERSDKDIR)/drivers/sis)
+InstallDriverSDKNonExecFile(310vtbl.h,$(DRIVERSDKDIR)/drivers/sis)
+InstallDriverSDKNonExecFile(oem300.h,$(DRIVERSDKDIR)/drivers/sis)
+InstallDriverSDKNonExecFile(oem310.h,$(DRIVERSDKDIR)/drivers/sis)
 InstallDriverSDKNonExecFile(sis_cursor.c,$(DRIVERSDKDIR)/drivers/sis)
 InstallDriverSDKNonExecFile(sis_cursor.h,$(DRIVERSDKDIR)/drivers/sis)
 InstallDriverSDKNonExecFile(sis_dac.c,$(DRIVERSDKDIR)/drivers/sis)
@@ -75,6 +92,7 @@ InstallDriverSDKNonExecFile(sis_dga.c,$(DRIVERSDKDIR)/drivers/sis)
 InstallDriverSDKNonExecFile(sis_dri.c,$(DRIVERSDKDIR)/drivers/sis)
 InstallDriverSDKNonExecFile(sis_dri.h,$(DRIVERSDKDIR)/drivers/sis)
 InstallDriverSDKNonExecFile(sis_driver.c,$(DRIVERSDKDIR)/drivers/sis)
+InstallDriverSDKNonExecFile(sis_driver.h,$(DRIVERSDKDIR)/drivers/sis)
 InstallDriverSDKNonExecFile(sis_opt.c,$(DRIVERSDKDIR)/drivers/sis)
 InstallDriverSDKNonExecFile(sis_regs.h,$(DRIVERSDKDIR)/drivers/sis)
 InstallDriverSDKNonExecFile(sis_setup.c,$(DRIVERSDKDIR)/drivers/sis)
@@ -84,5 +102,6 @@ InstallDriverSDKNonExecFile(sis_vb.c,$(DRIVERSDKDIR)/drivers/sis)
 InstallDriverSDKNonExecFile(sis_vb.h,$(DRIVERSDKDIR)/drivers/sis)
 InstallDriverSDKNonExecFile(sis_vga.c,$(DRIVERSDKDIR)/drivers/sis)
 InstallDriverSDKNonExecFile(sis_video.c,$(DRIVERSDKDIR)/drivers/sis)
+InstallDriverSDKNonExecFile(sis6326_video.c,$(DRIVERSDKDIR)/drivers/sis)
 
 InstallDriverSDKObjectModule(sis,$(DRIVERSDKMODULEDIR),drivers)
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/sis/init.c b/xc/programs/Xserver/hw/xfree86/drivers/sis/init.c
new file mode 100644
index 000000000..74c302c8f
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/sis/init.c
@@ -0,0 +1,5968 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/init.c,v 1.6 2003/02/04 02:44:28 dawes Exp $ */
+/*
+ * Mode switching code (CRT1 section) for SiS 300/540/630/730/315/550/650/740/330
+ * (Universal module for Linux kernel framebuffer and XFree86 4.x)
+ *
+ * Assembler-To-C translation
+ * Copyright 2002 by Thomas Winischhofer <thomas@winischhofer.net>
+ * Minor parts Copyright SiS, Inc.
+ *
+ * Based on BIOS
+ *     1.10.07, 1.10a for SiS650/LVDS+CH7019
+ *     1.11.05 for 650/LVDS (w/o Chrontel)
+ *     1.07.1b, 1.11.6s, 1.11.6w, 1.11.7w, 1.11.8r for SiS650/301(B/LV)
+ *     2.04.50 (I) and 2.04.5c (II) for SiS630/301(B)
+ *     2.06.50 for 630/301B (dual VGA)
+ *     2.02.3b, 2.03.02, 2.04.5c, 2.07a and 2.08.b3 for 630/LVDS/LVDS+CH7005
+ *     2.04.5c, 2.04.6c for 730+LVDS+CH7005
+ *     1.09b for 315/301(B)
+ *     1.16.51 for 300+301LVX (ECS A907)
+ *     1.01.03 for 330 (Xabre 400)
+ *
+ * Permission to use, copy, modify, distribute, and sell this software and its
+ * documentation for any purpose is hereby granted without fee, provided that
+ * the above copyright notice appear in all copies and that both that
+ * copyright notice and this permission notice appear in supporting
+ * documentation, and that the name of the copyright holder not be used in
+ * advertising or publicity pertaining to distribution of the software without
+ * specific, written prior permission.  The copyright holder makes no representations
+ * about the suitability of this software for any purpose.  It is provided
+ * "as is" without express or implied warranty.
+ *
+ * THE COPYRIGHT HOLDER DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+ * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+ * EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+ * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
+ * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ *
+ * TW says: This code looks awful, I know. But please don't do anything about
+ * this otherwise debugging will be hell.
+ * The code is extremely fragile as regards the different chipsets, different
+ * video bridges and combinations thereof. If anything is changed, extreme
+ * care has to be taken that that change doesn't break it for other chipsets,
+ * bridges or combinations thereof.
+ * All comments in this file are by me, regardless if they are marked TW or not.
+ *
+ */
+ 
+#include "init.h"
+
+#ifdef SIS300
+#include "300vtbl.h"
+#endif
+
+#ifdef SIS315H
+#include "310vtbl.h"
+#endif
+
+#ifdef LINUX_XF86
+BOOLEAN SiSBIOSSetMode(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,
+                       ScrnInfoPtr pScrn, DisplayModePtr mode, BOOLEAN IsCustom);
+DisplayModePtr SiSBuildBuiltInModeList(ScrnInfoPtr pScrn);
+#ifdef SISDUALHEAD /* TW: For dual head */
+BOOLEAN SiSBIOSSetModeCRT1(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,
+                       ScrnInfoPtr pScrn, DisplayModePtr mode, BOOLEAN IsCustom);
+BOOLEAN SiSBIOSSetModeCRT2(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,
+                       ScrnInfoPtr pScrn, DisplayModePtr mode);
+#endif /* dual head */
+#endif /* linux_xf86 */
+
+#ifdef LINUXBIOS
+BOOLEAN SiSInit(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension);
+#endif
+
+#ifdef LINUX_XF86
+BOOLEAN SiSSetMode(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,
+                   ScrnInfoPtr pScrn,USHORT ModeNo, BOOLEAN dosetpitch);
+#else
+BOOLEAN SiSSetMode(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,
+                   USHORT ModeNo);
+#endif
+
+#if defined(ALLOC_PRAGMA)
+#pragma alloc_text(PAGE,SiSSetMode)
+#pragma alloc_text(PAGE,SiSInit)
+#endif
+
+static ULONG GetDRAMSize(SiS_Private *SiS_Pr,
+                         PSIS_HW_DEVICE_INFO HwDeviceExtension);
+
+static void DelaySeconds(int seconds);
+void SiS_DebugCode(SiS_Private *SiS_Pr, UCHAR code);
+
+#ifdef LINUX_XF86
+/* TW: Mode table for X driver */
+const UShort  ModeIndex_320x480[]      = {0x5a, 0x5b, 0x00, 0x00};  /* DSTN/FSTN */
+const UShort  ModeIndex_512x384[]      = {0x52, 0x58, 0x00, 0x5c};
+const UShort  ModeIndex_640x400[]      = {0x2f, 0x5d, 0x00, 0x5e};
+const UShort  ModeIndex_640x480[]      = {0x2e, 0x44, 0x00, 0x62};
+const UShort  ModeIndex_720x480[]      = {0x31, 0x33, 0x00, 0x35};
+const UShort  ModeIndex_720x576[]      = {0x32, 0x34, 0x00, 0x36};
+const UShort  ModeIndex_800x480[]      = {0x70, 0x7a, 0x00, 0x76};
+const UShort  ModeIndex_800x600[]      = {0x30, 0x47, 0x00, 0x63};
+const UShort  ModeIndex_848x480[]      = {0x39, 0x3b, 0x00, 0x3e};
+const UShort  ModeIndex_856x480[]      = {0x3f, 0x42, 0x00, 0x45};
+const UShort  ModeIndex_1024x768[]     = {0x38, 0x4a, 0x00, 0x64};
+const UShort  ModeIndex_1024x576[]     = {0x71, 0x74, 0x00, 0x77};
+const UShort  ModeIndex_1024x600[]     = {0x20, 0x21, 0x00, 0x22};  /* 300 series only */
+const UShort  ModeIndex_1280x1024[]    = {0x3a, 0x4d, 0x00, 0x65};
+const UShort  ModeIndex_300_1280x960[] = {0x6e, 0x6f, 0x00, 0x7b};
+const UShort  ModeIndex_310_1280x960[] = {0x7c, 0x7d, 0x00, 0x7e};
+const UShort  ModeIndex_1152x768[]     = {0x23, 0x24, 0x00, 0x25};  /* 300 series only */
+const UShort  ModeIndex_1152x864[]     = {0x29, 0x2a, 0x00, 0x2b}; 
+const UShort  ModeIndex_1280x768[]     = {0x23, 0x24, 0x00, 0x25};  /* 310/325 series only */
+const UShort  ModeIndex_1280x720[]     = {0x79, 0x75, 0x00, 0x78};  
+const UShort  ModeIndex_1360x768[]     = {0x48, 0x4b, 0x00, 0x4e};
+const UShort  ModeIndex_1400x1050[]    = {0x26, 0x27, 0x00, 0x28};  /* 310/325 series only */
+const UShort  ModeIndex_1600x1200[]    = {0x3c, 0x3d, 0x00, 0x66};
+const UShort  ModeIndex_1920x1440[]    = {0x68, 0x69, 0x00, 0x6b};
+const UShort  ModeIndex_300_2048x1536[]= {0x6c, 0x6d, 0x00, 0x00};
+const UShort  ModeIndex_310_2048x1536[]= {0x6c, 0x6d, 0x00, 0x6e};
+#endif
+
+static void
+DelaySeconds(int seconds)
+{
+  int i;
+#ifdef WIN2000
+  int j;
+#endif
+
+  for (i=0;i<seconds;i++) {
+#ifdef TC
+    delay(1000);
+#endif
+
+#ifdef WIN2000
+    for (j=0;j<20000;j++)
+      VideoPortStallExecution(50);
+#endif
+
+#ifdef WINCE_HEADER
+#endif
+
+#ifdef LINUX_KERNEL
+#endif
+  }
+}
+
+void
+SiS_DebugCode(SiS_Private *SiS_Pr, UCHAR code)
+{
+  OutPortByte(0x80, code);
+  DelaySeconds(0x3);
+}
+
+#ifdef SIS300
+static void
+InitTo300Pointer(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension)
+{
+   SiS_Pr->SiS_SModeIDTable  = (SiS_StStruct *)SiS300_SModeIDTable;
+   SiS_Pr->SiS_VBModeIDTable = (SiS_VBModeStruct *)SiS300_VBModeIDTable;
+   SiS_Pr->SiS_StandTable    = (SiS_StandTableStruct *)SiS300_StandTable;
+   SiS_Pr->SiS_EModeIDTable  = (SiS_ExtStruct *)SiS300_EModeIDTable;
+   SiS_Pr->SiS_RefIndex      = (SiS_Ext2Struct *)SiS300_RefIndex;
+   SiS_Pr->SiS_CRT1Table     = (SiS_CRT1TableStruct *)SiS300_CRT1Table;
+   if(HwDeviceExtension->jChipType == SIS_300) {
+      SiS_Pr->SiS_MCLKData_0    = (SiS_MCLKDataStruct *)SiS300_MCLKData_300; /* 300 */
+   } else {
+      SiS_Pr->SiS_MCLKData_0    = (SiS_MCLKDataStruct *)SiS300_MCLKData_630; /* 630 */
+   }
+   SiS_Pr->SiS_ECLKData      = (SiS_ECLKDataStruct *)SiS300_ECLKData;
+   SiS_Pr->SiS_VCLKData      = (SiS_VCLKDataStruct *)SiS300_VCLKData;
+   SiS_Pr->SiS_VBVCLKData    = (SiS_VBVCLKDataStruct *)SiS300_VCLKData;
+   SiS_Pr->SiS_ScreenOffset  = SiS300_ScreenOffset;
+   SiS_Pr->SiS_StResInfo     = (SiS_StResInfoStruct *)SiS300_StResInfo;
+   SiS_Pr->SiS_ModeResInfo   = (SiS_ModeResInfoStruct *)SiS300_ModeResInfo;
+
+   SiS_Pr->pSiS_OutputSelect = &SiS300_OutputSelect;
+   SiS_Pr->pSiS_SoftSetting  = &SiS300_SoftSetting;
+
+   SiS_Pr->SiS_SR15  = SiS300_SR15;
+
+#ifndef LINUX_XF86
+   SiS_Pr->pSiS_SR07 = &SiS300_SR07;
+   SiS_Pr->SiS_CR40  = SiS300_CR40;
+   SiS_Pr->SiS_CR49  = SiS300_CR49;
+   SiS_Pr->pSiS_SR1F = &SiS300_SR1F;
+   SiS_Pr->pSiS_SR21 = &SiS300_SR21;
+   SiS_Pr->pSiS_SR22 = &SiS300_SR22;
+   SiS_Pr->pSiS_SR23 = &SiS300_SR23;
+   SiS_Pr->pSiS_SR24 = &SiS300_SR24;
+   SiS_Pr->SiS_SR25  = SiS300_SR25;
+   SiS_Pr->pSiS_SR31 = &SiS300_SR31;
+   SiS_Pr->pSiS_SR32 = &SiS300_SR32;
+   SiS_Pr->pSiS_SR33 = &SiS300_SR33;
+   SiS_Pr->pSiS_CRT2Data_1_2  = &SiS300_CRT2Data_1_2;
+   SiS_Pr->pSiS_CRT2Data_4_D  = &SiS300_CRT2Data_4_D;
+   SiS_Pr->pSiS_CRT2Data_4_E  = &SiS300_CRT2Data_4_E;
+   SiS_Pr->pSiS_CRT2Data_4_10 = &SiS300_CRT2Data_4_10;
+   SiS_Pr->pSiS_RGBSenseData    = &SiS300_RGBSenseData;
+   SiS_Pr->pSiS_VideoSenseData  = &SiS300_VideoSenseData;
+   SiS_Pr->pSiS_YCSenseData     = &SiS300_YCSenseData;
+   SiS_Pr->pSiS_RGBSenseData2   = &SiS300_RGBSenseData2;
+   SiS_Pr->pSiS_VideoSenseData2 = &SiS300_VideoSenseData2;
+   SiS_Pr->pSiS_YCSenseData2    = &SiS300_YCSenseData2;
+#endif
+
+   SiS_Pr->SiS_NTSCPhase  = SiS300_NTSCPhase;
+   SiS_Pr->SiS_PALPhase   = SiS300_PALPhase;
+   SiS_Pr->SiS_NTSCPhase2 = SiS300_NTSCPhase2;
+   SiS_Pr->SiS_PALPhase2  = SiS300_PALPhase2;
+   SiS_Pr->SiS_PALMPhase  = SiS300_PALMPhase;
+   SiS_Pr->SiS_PALNPhase  = SiS300_PALNPhase;
+   SiS_Pr->SiS_PALMPhase2 = SiS300_PALMPhase2;
+   SiS_Pr->SiS_PALNPhase2 = SiS300_PALNPhase2;
+
+   SiS_Pr->SiS_StLCD1024x768Data    = (SiS_LCDDataStruct *)SiS300_StLCD1024x768Data;
+   SiS_Pr->SiS_ExtLCD1024x768Data   = (SiS_LCDDataStruct *)SiS300_ExtLCD1024x768Data;
+   SiS_Pr->SiS_St2LCD1024x768Data   = (SiS_LCDDataStruct *)SiS300_St2LCD1024x768Data;
+   SiS_Pr->SiS_StLCD1280x1024Data   = (SiS_LCDDataStruct *)SiS300_StLCD1280x1024Data;
+   SiS_Pr->SiS_ExtLCD1280x1024Data  = (SiS_LCDDataStruct *)SiS300_ExtLCD1280x1024Data;
+   SiS_Pr->SiS_St2LCD1280x1024Data  = (SiS_LCDDataStruct *)SiS300_St2LCD1280x1024Data;
+   SiS_Pr->SiS_NoScaleData1024x768  = (SiS_LCDDataStruct *)SiS300_NoScaleData1024x768;
+   SiS_Pr->SiS_NoScaleData1280x1024 = (SiS_LCDDataStruct *)SiS300_NoScaleData1280x1024;
+   SiS_Pr->SiS_LCD1280x960Data      = (SiS_LCDDataStruct *)SiS300_LCD1280x960Data;
+   SiS_Pr->SiS_ExtLCD1400x1050Data  = (SiS_LCDDataStruct *)SiS300_ExtLCD1400x1050Data;
+   SiS_Pr->SiS_ExtLCD1600x1200Data  = (SiS_LCDDataStruct *)SiS300_ExtLCD1600x1200Data;
+   SiS_Pr->SiS_StLCD1400x1050Data   = (SiS_LCDDataStruct *)SiS300_StLCD1400x1050Data;
+   SiS_Pr->SiS_StLCD1600x1200Data   = (SiS_LCDDataStruct *)SiS300_StLCD1600x1200Data;
+   SiS_Pr->SiS_NoScaleData1400x1050 = (SiS_LCDDataStruct *)SiS300_NoScaleData1400x1050;
+   SiS_Pr->SiS_NoScaleData1600x1200 = (SiS_LCDDataStruct *)SiS300_NoScaleData1600x1200;
+
+   SiS_Pr->SiS_StPALData   = (SiS_TVDataStruct *)SiS300_StPALData;
+   SiS_Pr->SiS_ExtPALData  = (SiS_TVDataStruct *)SiS300_ExtPALData;
+   SiS_Pr->SiS_StNTSCData  = (SiS_TVDataStruct *)SiS300_StNTSCData;
+   SiS_Pr->SiS_ExtNTSCData = (SiS_TVDataStruct *)SiS300_ExtNTSCData;
+#ifdef oldHV
+   SiS_Pr->SiS_St1HiTVData = (SiS_TVDataStruct *)SiS300_St1HiTVData;
+   SiS_Pr->SiS_St2HiTVData = (SiS_TVDataStruct *)SiS300_St2HiTVData;
+   SiS_Pr->SiS_ExtHiTVData = (SiS_TVDataStruct *)SiS300_ExtHiTVData;
+#endif
+
+   SiS_Pr->SiS_NTSCTiming     = SiS300_NTSCTiming;
+   SiS_Pr->SiS_PALTiming      = SiS300_PALTiming;
+#ifdef oldHV
+   SiS_Pr->SiS_HiTVSt1Timing  = SiS300_HiTVSt1Timing;
+   SiS_Pr->SiS_HiTVSt2Timing  = SiS300_HiTVSt2Timing;
+   SiS_Pr->SiS_HiTVTextTiming = SiS300_HiTVTextTiming;
+   SiS_Pr->SiS_HiTVGroup3Data = SiS300_HiTVGroup3Data;
+   SiS_Pr->SiS_HiTVGroup3Simu = SiS300_HiTVGroup3Simu;
+   SiS_Pr->SiS_HiTVGroup3Text = SiS300_HiTVGroup3Text;
+#endif
+
+   SiS_Pr->SiS_PanelDelayTbl     = (SiS_PanelDelayTblStruct *)SiS300_PanelDelayTbl;
+   SiS_Pr->SiS_PanelDelayTblLVDS = (SiS_PanelDelayTblStruct *)SiS300_PanelDelayTblLVDS;
+
+   SiS_Pr->SiS_LVDS800x600Data_1   = (SiS_LVDSDataStruct *)SiS300_LVDS800x600Data_1;
+   SiS_Pr->SiS_LVDS800x600Data_2   = (SiS_LVDSDataStruct *)SiS300_LVDS800x600Data_2;
+   SiS_Pr->SiS_LVDS1024x768Data_1  = (SiS_LVDSDataStruct *)SiS300_LVDS1024x768Data_1;
+   SiS_Pr->SiS_LVDS1024x768Data_2  = (SiS_LVDSDataStruct *)SiS300_LVDS1024x768Data_2;
+   SiS_Pr->SiS_LVDS1280x1024Data_1 = (SiS_LVDSDataStruct *)SiS300_LVDS1280x1024Data_1;
+   SiS_Pr->SiS_LVDS1280x1024Data_2 = (SiS_LVDSDataStruct *)SiS300_LVDS1280x1024Data_2;
+   SiS_Pr->SiS_LVDS1280x960Data_1  = (SiS_LVDSDataStruct *)SiS300_LVDS1280x1024Data_1;
+   SiS_Pr->SiS_LVDS1280x960Data_2  = (SiS_LVDSDataStruct *)SiS300_LVDS1280x1024Data_2;
+   SiS_Pr->SiS_LVDS1400x1050Data_1 = (SiS_LVDSDataStruct *)SiS300_LVDS1400x1050Data_1;
+   SiS_Pr->SiS_LVDS1400x1050Data_2 = (SiS_LVDSDataStruct *)SiS300_LVDS1400x1050Data_2;
+   SiS_Pr->SiS_LVDS1280x768Data_1  = (SiS_LVDSDataStruct *)SiS300_LVDS1280x768Data_1;
+   SiS_Pr->SiS_LVDS1280x768Data_2  = (SiS_LVDSDataStruct *)SiS300_LVDS1280x768Data_2;
+   SiS_Pr->SiS_LVDS1024x600Data_1  = (SiS_LVDSDataStruct *)SiS300_LVDS1024x600Data_1;
+   SiS_Pr->SiS_LVDS1024x600Data_2  = (SiS_LVDSDataStruct *)SiS300_LVDS1024x600Data_2;
+   SiS_Pr->SiS_LVDS1152x768Data_1  = (SiS_LVDSDataStruct *)SiS300_LVDS1152x768Data_1;
+   SiS_Pr->SiS_LVDS1152x768Data_2  = (SiS_LVDSDataStruct *)SiS300_LVDS1152x768Data_2;
+   SiS_Pr->SiS_LVDSXXXxXXXData_1   = (SiS_LVDSDataStruct *)SiS300_LVDSXXXxXXXData_1;
+   SiS_Pr->SiS_LVDS320x480Data_1   = (SiS_LVDSDataStruct *)SiS300_LVDS320x480Data_1;
+   SiS_Pr->SiS_LVDS640x480Data_1   = (SiS_LVDSDataStruct *)SiS300_LVDS640x480Data_1;
+   SiS_Pr->SiS_LCDA1400x1050Data_1 = (SiS_LVDSDataStruct *)SiS300_LCDA1400x1050Data_1;
+   SiS_Pr->SiS_LCDA1400x1050Data_2 = (SiS_LVDSDataStruct *)SiS300_LCDA1400x1050Data_2;
+   SiS_Pr->SiS_LCDA1600x1200Data_1 = (SiS_LVDSDataStruct *)SiS300_LCDA1600x1200Data_1;
+   SiS_Pr->SiS_LCDA1600x1200Data_2 = (SiS_LVDSDataStruct *)SiS300_LCDA1600x1200Data_2;
+   SiS_Pr->SiS_CHTVUNTSCData = (SiS_LVDSDataStruct *)SiS300_CHTVUNTSCData;
+   SiS_Pr->SiS_CHTVONTSCData = (SiS_LVDSDataStruct *)SiS300_CHTVONTSCData;
+   SiS_Pr->SiS_CHTVUPALData  = (SiS_LVDSDataStruct *)SiS300_CHTVUPALData;
+   SiS_Pr->SiS_CHTVOPALData  = (SiS_LVDSDataStruct *)SiS300_CHTVOPALData;
+   SiS_Pr->SiS_CHTVUPALMData = (SiS_LVDSDataStruct *)SiS300_CHTVUNTSCData; /* not supported on 300 series */
+   SiS_Pr->SiS_CHTVOPALMData = (SiS_LVDSDataStruct *)SiS300_CHTVONTSCData; /* not supported on 300 series */
+   SiS_Pr->SiS_CHTVUPALNData = (SiS_LVDSDataStruct *)SiS300_CHTVUPALData;  /* not supported on 300 series */
+   SiS_Pr->SiS_CHTVOPALNData = (SiS_LVDSDataStruct *)SiS300_CHTVOPALData;  /* not supported on 300 series */
+   SiS_Pr->SiS_CHTVSOPALData = (SiS_LVDSDataStruct *)SiS300_CHTVSOPALData;
+   SiS_Pr->SiS_PanelType00_1 = (SiS_LVDSDesStruct *)SiS300_PanelType00_1;
+   SiS_Pr->SiS_PanelType01_1 = (SiS_LVDSDesStruct *)SiS300_PanelType01_1;
+   SiS_Pr->SiS_PanelType02_1 = (SiS_LVDSDesStruct *)SiS300_PanelType02_1;
+   SiS_Pr->SiS_PanelType03_1 = (SiS_LVDSDesStruct *)SiS300_PanelType03_1;
+   SiS_Pr->SiS_PanelType04_1 = (SiS_LVDSDesStruct *)SiS300_PanelType04_1;
+   SiS_Pr->SiS_PanelType05_1 = (SiS_LVDSDesStruct *)SiS300_PanelType05_1;
+   SiS_Pr->SiS_PanelType06_1 = (SiS_LVDSDesStruct *)SiS300_PanelType06_1;
+   SiS_Pr->SiS_PanelType07_1 = (SiS_LVDSDesStruct *)SiS300_PanelType07_1;
+   SiS_Pr->SiS_PanelType08_1 = (SiS_LVDSDesStruct *)SiS300_PanelType08_1;
+   SiS_Pr->SiS_PanelType09_1 = (SiS_LVDSDesStruct *)SiS300_PanelType09_1;
+   SiS_Pr->SiS_PanelType0a_1 = (SiS_LVDSDesStruct *)SiS300_PanelType0a_1;
+   SiS_Pr->SiS_PanelType0b_1 = (SiS_LVDSDesStruct *)SiS300_PanelType0b_1;
+   SiS_Pr->SiS_PanelType0c_1 = (SiS_LVDSDesStruct *)SiS300_PanelType0c_1;
+   SiS_Pr->SiS_PanelType0d_1 = (SiS_LVDSDesStruct *)SiS300_PanelType0d_1;
+   SiS_Pr->SiS_PanelType0e_1 = (SiS_LVDSDesStruct *)SiS300_PanelType0e_1;
+   SiS_Pr->SiS_PanelType0f_1 = (SiS_LVDSDesStruct *)SiS300_PanelType0f_1;
+   SiS_Pr->SiS_PanelType00_2 = (SiS_LVDSDesStruct *)SiS300_PanelType00_2;
+   SiS_Pr->SiS_PanelType01_2 = (SiS_LVDSDesStruct *)SiS300_PanelType01_2;
+   SiS_Pr->SiS_PanelType02_2 = (SiS_LVDSDesStruct *)SiS300_PanelType02_2;
+   SiS_Pr->SiS_PanelType03_2 = (SiS_LVDSDesStruct *)SiS300_PanelType03_2;
+   SiS_Pr->SiS_PanelType04_2 = (SiS_LVDSDesStruct *)SiS300_PanelType04_2;
+   SiS_Pr->SiS_PanelType05_2 = (SiS_LVDSDesStruct *)SiS300_PanelType05_2;
+   SiS_Pr->SiS_PanelType06_2 = (SiS_LVDSDesStruct *)SiS300_PanelType06_2;
+   SiS_Pr->SiS_PanelType07_2 = (SiS_LVDSDesStruct *)SiS300_PanelType07_2;
+   SiS_Pr->SiS_PanelType08_2 = (SiS_LVDSDesStruct *)SiS300_PanelType08_2;
+   SiS_Pr->SiS_PanelType09_2 = (SiS_LVDSDesStruct *)SiS300_PanelType09_2;
+   SiS_Pr->SiS_PanelType0a_2 = (SiS_LVDSDesStruct *)SiS300_PanelType0a_2;
+   SiS_Pr->SiS_PanelType0b_2 = (SiS_LVDSDesStruct *)SiS300_PanelType0b_2;
+   SiS_Pr->SiS_PanelType0c_2 = (SiS_LVDSDesStruct *)SiS300_PanelType0c_2;
+   SiS_Pr->SiS_PanelType0d_2 = (SiS_LVDSDesStruct *)SiS300_PanelType0d_2;
+   SiS_Pr->SiS_PanelType0e_2 = (SiS_LVDSDesStruct *)SiS300_PanelType0e_2;
+   SiS_Pr->SiS_PanelType0f_2 = (SiS_LVDSDesStruct *)SiS300_PanelType0f_2;
+   SiS_Pr->SiS_CHTVUNTSCDesData = (SiS_LVDSDesStruct *)SiS300_CHTVUNTSCDesData;
+   SiS_Pr->SiS_CHTVONTSCDesData = (SiS_LVDSDesStruct *)SiS300_CHTVONTSCDesData;
+   SiS_Pr->SiS_CHTVUPALDesData  = (SiS_LVDSDesStruct *)SiS300_CHTVUPALDesData;
+   SiS_Pr->SiS_CHTVOPALDesData  = (SiS_LVDSDesStruct *)SiS300_CHTVOPALDesData;
+   SiS_Pr->SiS_LVDSCRT1800x600_1     = (SiS_LVDSCRT1DataStruct *)SiS300_LVDSCRT1800x600_1;
+   SiS_Pr->SiS_LVDSCRT11024x768_1    = (SiS_LVDSCRT1DataStruct *)SiS300_LVDSCRT11024x768_1;
+   SiS_Pr->SiS_LVDSCRT11280x1024_1   = (SiS_LVDSCRT1DataStruct *)SiS300_LVDSCRT11280x1024_1;
+   SiS_Pr->SiS_LVDSCRT11024x600_1    = (SiS_LVDSCRT1DataStruct *)SiS300_LVDSCRT11024x600_1;
+   SiS_Pr->SiS_LVDSCRT11152x768_1    = (SiS_LVDSCRT1DataStruct *)SiS300_LVDSCRT11152x768_1;
+   SiS_Pr->SiS_LVDSCRT1800x600_1_H   = (SiS_LVDSCRT1DataStruct *)SiS300_LVDSCRT1800x600_1_H;
+   SiS_Pr->SiS_LVDSCRT11024x768_1_H  = (SiS_LVDSCRT1DataStruct *)SiS300_LVDSCRT11024x768_1_H;
+   SiS_Pr->SiS_LVDSCRT11280x1024_1_H = (SiS_LVDSCRT1DataStruct *)SiS300_LVDSCRT11280x1024_1_H;
+   SiS_Pr->SiS_LVDSCRT11024x600_1_H  = (SiS_LVDSCRT1DataStruct *)SiS300_LVDSCRT11024x600_1_H;
+   SiS_Pr->SiS_LVDSCRT11152x768_1_H  = (SiS_LVDSCRT1DataStruct *)SiS300_LVDSCRT11152x768_1_H;
+   SiS_Pr->SiS_LVDSCRT1800x600_2     = (SiS_LVDSCRT1DataStruct *)SiS300_LVDSCRT1800x600_2;
+   SiS_Pr->SiS_LVDSCRT11024x768_2    = (SiS_LVDSCRT1DataStruct *)SiS300_LVDSCRT11024x768_2;
+   SiS_Pr->SiS_LVDSCRT11280x1024_2   = (SiS_LVDSCRT1DataStruct *)SiS300_LVDSCRT11280x1024_2;
+   SiS_Pr->SiS_LVDSCRT11024x600_2    = (SiS_LVDSCRT1DataStruct *)SiS300_LVDSCRT11024x600_2;
+   SiS_Pr->SiS_LVDSCRT11152x768_2    = (SiS_LVDSCRT1DataStruct *)SiS300_LVDSCRT11152x768_2;
+   SiS_Pr->SiS_LVDSCRT1800x600_2_H   = (SiS_LVDSCRT1DataStruct *)SiS300_LVDSCRT1800x600_2_H;
+   SiS_Pr->SiS_LVDSCRT11024x768_2_H  = (SiS_LVDSCRT1DataStruct *)SiS300_LVDSCRT11024x768_2_H;
+   SiS_Pr->SiS_LVDSCRT11280x1024_2_H = (SiS_LVDSCRT1DataStruct *)SiS300_LVDSCRT11280x1024_2_H;
+   SiS_Pr->SiS_LVDSCRT11024x600_2_H  = (SiS_LVDSCRT1DataStruct *)SiS300_LVDSCRT11024x600_2_H;
+   SiS_Pr->SiS_LVDSCRT11152x768_2_H  = (SiS_LVDSCRT1DataStruct *)SiS300_LVDSCRT11152x768_2_H;
+   SiS_Pr->SiS_CHTVCRT1UNTSC = (SiS_LVDSCRT1DataStruct *)SiS300_CHTVCRT1UNTSC;
+   SiS_Pr->SiS_CHTVCRT1ONTSC = (SiS_LVDSCRT1DataStruct *)SiS300_CHTVCRT1ONTSC;
+   SiS_Pr->SiS_CHTVCRT1UPAL  = (SiS_LVDSCRT1DataStruct *)SiS300_CHTVCRT1UPAL;
+   SiS_Pr->SiS_CHTVCRT1OPAL  = (SiS_LVDSCRT1DataStruct *)SiS300_CHTVCRT1OPAL;
+   SiS_Pr->SiS_CHTVCRT1SOPAL = (SiS_LVDSCRT1DataStruct *)SiS300_CHTVCRT1SOPAL;
+   SiS_Pr->SiS_CHTVReg_UNTSC = (SiS_CHTVRegDataStruct *)SiS300_CHTVReg_UNTSC;
+   SiS_Pr->SiS_CHTVReg_ONTSC = (SiS_CHTVRegDataStruct *)SiS300_CHTVReg_ONTSC;
+   SiS_Pr->SiS_CHTVReg_UPAL  = (SiS_CHTVRegDataStruct *)SiS300_CHTVReg_UPAL;
+   SiS_Pr->SiS_CHTVReg_OPAL  = (SiS_CHTVRegDataStruct *)SiS300_CHTVReg_OPAL;
+   SiS_Pr->SiS_CHTVReg_UPALM = (SiS_CHTVRegDataStruct *)SiS300_CHTVReg_UNTSC;  /* not supported on 300 series */
+   SiS_Pr->SiS_CHTVReg_OPALM = (SiS_CHTVRegDataStruct *)SiS300_CHTVReg_ONTSC;  /* not supported on 300 series */
+   SiS_Pr->SiS_CHTVReg_UPALN = (SiS_CHTVRegDataStruct *)SiS300_CHTVReg_UPAL;   /* not supported on 300 series */
+   SiS_Pr->SiS_CHTVReg_OPALN = (SiS_CHTVRegDataStruct *)SiS300_CHTVReg_OPAL;   /* not supported on 300 series */
+   SiS_Pr->SiS_CHTVReg_SOPAL = (SiS_CHTVRegDataStruct *)SiS300_CHTVReg_SOPAL;
+   SiS_Pr->SiS_CHTVVCLKUNTSC = SiS300_CHTVVCLKUNTSC;
+   SiS_Pr->SiS_CHTVVCLKONTSC = SiS300_CHTVVCLKONTSC;
+   SiS_Pr->SiS_CHTVVCLKUPAL  = SiS300_CHTVVCLKUPAL;
+   SiS_Pr->SiS_CHTVVCLKOPAL  = SiS300_CHTVVCLKOPAL;
+   SiS_Pr->SiS_CHTVVCLKUPALM = SiS300_CHTVVCLKUNTSC;  /* not supported on 300 series */
+   SiS_Pr->SiS_CHTVVCLKOPALM = SiS300_CHTVVCLKONTSC;  /* not supported on 300 series */
+   SiS_Pr->SiS_CHTVVCLKUPALN = SiS300_CHTVVCLKUPAL;   /* not supported on 300 series */
+   SiS_Pr->SiS_CHTVVCLKOPALN = SiS300_CHTVVCLKOPAL;   /* not supported on 300 series */
+   SiS_Pr->SiS_CHTVVCLKSOPAL = SiS300_CHTVVCLKSOPAL;
+
+   /* TW: New from 300/301LV BIOS */
+   SiS_Pr->SiS_CRT2Part2_1024x768_1  = (SiS_Part2PortTblStruct *)SiS300_CRT2Part2_1024x768_1;
+   SiS_Pr->SiS_CRT2Part2_1280x1024_1 = (SiS_Part2PortTblStruct *)SiS300_CRT2Part2_1280x1024_1;
+   SiS_Pr->SiS_CRT2Part2_1400x1050_1 = (SiS_Part2PortTblStruct *)SiS300_CRT2Part2_1400x1050_1;
+   SiS_Pr->SiS_CRT2Part2_1600x1200_1 = (SiS_Part2PortTblStruct *)SiS300_CRT2Part2_1600x1200_1;
+   SiS_Pr->SiS_CRT2Part2_1024x768_2  = (SiS_Part2PortTblStruct *)SiS300_CRT2Part2_1024x768_2;
+   SiS_Pr->SiS_CRT2Part2_1280x1024_2 = (SiS_Part2PortTblStruct *)SiS300_CRT2Part2_1280x1024_2;
+   SiS_Pr->SiS_CRT2Part2_1400x1050_2 = (SiS_Part2PortTblStruct *)SiS300_CRT2Part2_1400x1050_2;
+   SiS_Pr->SiS_CRT2Part2_1600x1200_2 = (SiS_Part2PortTblStruct *)SiS300_CRT2Part2_1600x1200_2;
+   SiS_Pr->SiS_CRT2Part2_1024x768_3  = (SiS_Part2PortTblStruct *)SiS300_CRT2Part2_1024x768_3;
+   SiS_Pr->SiS_CRT2Part2_1280x1024_3 = (SiS_Part2PortTblStruct *)SiS300_CRT2Part2_1280x1024_3;
+   SiS_Pr->SiS_CRT2Part2_1400x1050_3 = (SiS_Part2PortTblStruct *)SiS300_CRT2Part2_1400x1050_3;
+   SiS_Pr->SiS_CRT2Part2_1600x1200_3 = (SiS_Part2PortTblStruct *)SiS300_CRT2Part2_1600x1200_3;
+
+   /* TW: LCDResInfo will on 300 series be translated to 310/325 series definitions */
+   SiS_Pr->SiS_Panel320x480   = Panel_320x480;
+   SiS_Pr->SiS_Panel640x480   = Panel_640x480;
+   SiS_Pr->SiS_Panel800x600   = Panel_800x600;
+   SiS_Pr->SiS_Panel1024x768  = Panel_1024x768;
+   SiS_Pr->SiS_Panel1280x1024 = Panel_1280x1024;
+   SiS_Pr->SiS_Panel1280x960  = Panel_1280x960;
+   SiS_Pr->SiS_Panel1024x600  = Panel_1024x600;
+   SiS_Pr->SiS_Panel1152x768  = Panel_1152x768;
+   SiS_Pr->SiS_Panel1600x1200 = 16;  		/* TW: Something illegal */
+   SiS_Pr->SiS_Panel1400x1050 = 16;  		/* TW: Something illegal */
+   SiS_Pr->SiS_Panel1152x864  = 16;   		/* TW: Something illegal */
+   SiS_Pr->SiS_Panel1280x768  = 16;   		/* TW: Something illegal */
+   SiS_Pr->SiS_PanelMax       = Panel_320x480;     /* TW: highest value */
+   SiS_Pr->SiS_PanelMinLVDS   = Panel_800x600;     /* TW: Lowest value LVDS */
+   SiS_Pr->SiS_PanelMin301    = Panel_1024x768;    /* TW: lowest value 301 */
+}
+#endif
+
+#ifdef SIS315H
+static void
+InitTo310Pointer(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension)
+{
+   SiS_Pr->SiS_SModeIDTable  = (SiS_StStruct *)SiS310_SModeIDTable;
+   SiS_Pr->SiS_StandTable    = (SiS_StandTableStruct *)SiS310_StandTable;
+   SiS_Pr->SiS_EModeIDTable  = (SiS_ExtStruct *)SiS310_EModeIDTable;
+   SiS_Pr->SiS_RefIndex      = (SiS_Ext2Struct *)SiS310_RefIndex;
+   SiS_Pr->SiS_CRT1Table     = (SiS_CRT1TableStruct *)SiS310_CRT1Table;
+   /* TW: MCLK is different */
+   if(HwDeviceExtension->jChipType == SIS_330) {
+      SiS_Pr->SiS_MCLKData_0 = (SiS_MCLKDataStruct *)SiS310_MCLKData_0_330;  /* 330 */
+   } else if(HwDeviceExtension->jChipType > SIS_315PRO) {
+      SiS_Pr->SiS_MCLKData_0 = (SiS_MCLKDataStruct *)SiS310_MCLKData_0_650;  /* 550, 650 */
+   } else {
+      SiS_Pr->SiS_MCLKData_0 = (SiS_MCLKDataStruct *)SiS310_MCLKData_0_315;  /* 315 */
+   }
+   SiS_Pr->SiS_MCLKData_1    = (SiS_MCLKDataStruct *)SiS310_MCLKData_1;
+   SiS_Pr->SiS_ECLKData      = (SiS_ECLKDataStruct *)SiS310_ECLKData;
+   SiS_Pr->SiS_VCLKData      = (SiS_VCLKDataStruct *)SiS310_VCLKData;
+   SiS_Pr->SiS_VBVCLKData    = (SiS_VBVCLKDataStruct *)SiS310_VBVCLKData;
+   SiS_Pr->SiS_ScreenOffset  = SiS310_ScreenOffset;
+   SiS_Pr->SiS_StResInfo     = (SiS_StResInfoStruct *)SiS310_StResInfo;
+   SiS_Pr->SiS_ModeResInfo   = (SiS_ModeResInfoStruct *)SiS310_ModeResInfo;
+
+   SiS_Pr->pSiS_OutputSelect = &SiS310_OutputSelect;
+   SiS_Pr->pSiS_SoftSetting  = &SiS310_SoftSetting;
+
+   SiS_Pr->SiS_SR15  = SiS310_SR15;
+
+#ifndef LINUX_XF86
+   SiS_Pr->pSiS_SR07 = &SiS310_SR07;
+   SiS_Pr->SiS_CR40  = SiS310_CR40;
+   SiS_Pr->SiS_CR49  = SiS310_CR49;
+   SiS_Pr->pSiS_SR1F = &SiS310_SR1F;
+   SiS_Pr->pSiS_SR21 = &SiS310_SR21;
+   SiS_Pr->pSiS_SR22 = &SiS310_SR22;
+   SiS_Pr->pSiS_SR23 = &SiS310_SR23;
+   SiS_Pr->pSiS_SR24 = &SiS310_SR24;
+   SiS_Pr->SiS_SR25  = SiS310_SR25;
+   SiS_Pr->pSiS_SR31 = &SiS310_SR31;
+   SiS_Pr->pSiS_SR32 = &SiS310_SR32;
+   SiS_Pr->pSiS_SR33 = &SiS310_SR33;
+   SiS_Pr->pSiS_CRT2Data_1_2  = &SiS310_CRT2Data_1_2;
+   SiS_Pr->pSiS_CRT2Data_4_D  = &SiS310_CRT2Data_4_D;
+   SiS_Pr->pSiS_CRT2Data_4_E  = &SiS310_CRT2Data_4_E;
+   SiS_Pr->pSiS_CRT2Data_4_10 = &SiS310_CRT2Data_4_10;
+   SiS_Pr->pSiS_RGBSenseData    = &SiS310_RGBSenseData;
+   SiS_Pr->pSiS_VideoSenseData  = &SiS310_VideoSenseData;
+   SiS_Pr->pSiS_YCSenseData     = &SiS310_YCSenseData;
+   SiS_Pr->pSiS_RGBSenseData2   = &SiS310_RGBSenseData2;
+   SiS_Pr->pSiS_VideoSenseData2 = &SiS310_VideoSenseData2;
+   SiS_Pr->pSiS_YCSenseData2    = &SiS310_YCSenseData2;
+#endif
+
+   SiS_Pr->SiS_NTSCPhase    = SiS310_NTSCPhase;
+   SiS_Pr->SiS_PALPhase     = SiS310_PALPhase;
+   SiS_Pr->SiS_NTSCPhase2   = SiS310_NTSCPhase2;
+   SiS_Pr->SiS_PALPhase2    = SiS310_PALPhase2;
+   SiS_Pr->SiS_PALMPhase    = SiS310_PALMPhase;
+   SiS_Pr->SiS_PALNPhase    = SiS310_PALNPhase;
+   SiS_Pr->SiS_PALMPhase2   = SiS310_PALMPhase2;
+   SiS_Pr->SiS_PALNPhase2   = SiS310_PALNPhase2;
+   SiS_Pr->SiS_SpecialPhase = SiS310_SpecialPhase;
+
+   SiS_Pr->SiS_StLCD1024x768Data    = (SiS_LCDDataStruct *)SiS310_StLCD1024x768Data;
+   SiS_Pr->SiS_ExtLCD1024x768Data   = (SiS_LCDDataStruct *)SiS310_ExtLCD1024x768Data;
+   SiS_Pr->SiS_St2LCD1024x768Data   = (SiS_LCDDataStruct *)SiS310_St2LCD1024x768Data;
+   SiS_Pr->SiS_StLCD1280x1024Data   = (SiS_LCDDataStruct *)SiS310_StLCD1280x1024Data;
+   SiS_Pr->SiS_ExtLCD1280x1024Data  = (SiS_LCDDataStruct *)SiS310_ExtLCD1280x1024Data;
+   SiS_Pr->SiS_St2LCD1280x1024Data  = (SiS_LCDDataStruct *)SiS310_St2LCD1280x1024Data;
+   SiS_Pr->SiS_NoScaleData1024x768  = (SiS_LCDDataStruct *)SiS310_NoScaleData1024x768;
+   SiS_Pr->SiS_NoScaleData1280x1024 = (SiS_LCDDataStruct *)SiS310_NoScaleData1280x1024;
+   SiS_Pr->SiS_LCD1280x960Data      = (SiS_LCDDataStruct *)SiS310_LCD1280x960Data;
+   SiS_Pr->SiS_ExtLCD1400x1050Data  = (SiS_LCDDataStruct *)SiS310_ExtLCD1400x1050Data;
+   SiS_Pr->SiS_ExtLCD1600x1200Data  = (SiS_LCDDataStruct *)SiS310_ExtLCD1600x1200Data;
+   SiS_Pr->SiS_StLCD1400x1050Data   = (SiS_LCDDataStruct *)SiS310_StLCD1400x1050Data;
+   SiS_Pr->SiS_StLCD1600x1200Data   = (SiS_LCDDataStruct *)SiS310_StLCD1600x1200Data;
+   SiS_Pr->SiS_NoScaleData1400x1050 = (SiS_LCDDataStruct *)SiS310_NoScaleData1400x1050;
+   SiS_Pr->SiS_NoScaleData1600x1200 = (SiS_LCDDataStruct *)SiS310_NoScaleData1600x1200;
+
+   SiS_Pr->SiS_StPALData   = (SiS_TVDataStruct *)SiS310_StPALData;
+   SiS_Pr->SiS_ExtPALData  = (SiS_TVDataStruct *)SiS310_ExtPALData;
+   SiS_Pr->SiS_StNTSCData  = (SiS_TVDataStruct *)SiS310_StNTSCData;
+   SiS_Pr->SiS_ExtNTSCData = (SiS_TVDataStruct *)SiS310_ExtNTSCData;
+#ifdef oldHV
+   SiS_Pr->SiS_St1HiTVData = (SiS_TVDataStruct *)SiS310_St1HiTVData;
+   SiS_Pr->SiS_St2HiTVData = (SiS_TVDataStruct *)SiS310_St2HiTVData;
+   SiS_Pr->SiS_ExtHiTVData = (SiS_TVDataStruct *)SiS310_ExtHiTVData;
+#endif
+
+   SiS_Pr->SiS_NTSCTiming     = SiS310_NTSCTiming;
+   SiS_Pr->SiS_PALTiming      = SiS310_PALTiming;
+#ifdef oldHV
+   SiS_Pr->SiS_HiTVSt1Timing  = SiS310_HiTVSt1Timing;
+   SiS_Pr->SiS_HiTVSt2Timing  = SiS310_HiTVSt2Timing;
+   SiS_Pr->SiS_HiTVTextTiming = SiS310_HiTVTextTiming;
+   SiS_Pr->SiS_HiTVExtTiming  = SiS310_HiTVExtTiming;
+   SiS_Pr->SiS_HiTVGroup3Data = SiS310_HiTVGroup3Data;
+   SiS_Pr->SiS_HiTVGroup3Simu = SiS310_HiTVGroup3Simu;
+   SiS_Pr->SiS_HiTVGroup3Text = SiS310_HiTVGroup3Text;
+#endif
+
+   SiS_Pr->SiS_PanelDelayTbl = (SiS_PanelDelayTblStruct *)SiS310_PanelDelayTbl;
+   SiS_Pr->SiS_PanelDelayTblLVDS = (SiS_PanelDelayTblStruct *)SiS310_PanelDelayTblLVDS;
+
+   SiS_Pr->SiS_LVDS800x600Data_1   = (SiS_LVDSDataStruct *)SiS310_LVDS800x600Data_1;
+   SiS_Pr->SiS_LVDS800x600Data_2   = (SiS_LVDSDataStruct *)SiS310_LVDS800x600Data_2;
+   SiS_Pr->SiS_LVDS1024x768Data_1  = (SiS_LVDSDataStruct *)SiS310_LVDS1024x768Data_1;
+   SiS_Pr->SiS_LVDS1024x768Data_2  = (SiS_LVDSDataStruct *)SiS310_LVDS1024x768Data_2;
+   SiS_Pr->SiS_LVDS1280x1024Data_1 = (SiS_LVDSDataStruct *)SiS310_LVDS1280x1024Data_1;
+   SiS_Pr->SiS_LVDS1280x1024Data_2 = (SiS_LVDSDataStruct *)SiS310_LVDS1280x1024Data_2;
+   SiS_Pr->SiS_LVDS1280x960Data_1  = (SiS_LVDSDataStruct *)SiS310_LVDS1280x960Data_1;
+   SiS_Pr->SiS_LVDS1280x960Data_2  = (SiS_LVDSDataStruct *)SiS310_LVDS1280x960Data_2;
+   SiS_Pr->SiS_LVDS1400x1050Data_1 = (SiS_LVDSDataStruct *)SiS310_LVDS1400x1050Data_1;
+   SiS_Pr->SiS_LVDS1400x1050Data_2 = (SiS_LVDSDataStruct *)SiS310_LVDS1400x1050Data_2;
+   SiS_Pr->SiS_LVDS1280x768Data_1  = (SiS_LVDSDataStruct *)SiS310_LVDS1280x768Data_1;
+   SiS_Pr->SiS_LVDS1280x768Data_2  = (SiS_LVDSDataStruct *)SiS310_LVDS1280x768Data_2;
+   SiS_Pr->SiS_LVDS1024x600Data_1  = (SiS_LVDSDataStruct *)SiS310_LVDS1024x600Data_1;
+   SiS_Pr->SiS_LVDS1024x600Data_2  = (SiS_LVDSDataStruct *)SiS310_LVDS1024x600Data_2;
+   SiS_Pr->SiS_LVDS1152x768Data_1  = (SiS_LVDSDataStruct *)SiS310_LVDS1152x768Data_1;
+   SiS_Pr->SiS_LVDS1152x768Data_2  = (SiS_LVDSDataStruct *)SiS310_LVDS1152x768Data_2;
+   SiS_Pr->SiS_LVDSXXXxXXXData_1   = (SiS_LVDSDataStruct *)SiS310_LVDSXXXxXXXData_1;
+   SiS_Pr->SiS_LVDS320x480Data_1   = (SiS_LVDSDataStruct *)SiS310_LVDS320x480Data_1;
+   SiS_Pr->SiS_LVDS640x480Data_1   = (SiS_LVDSDataStruct *)SiS310_LVDS640x480Data_1;
+   SiS_Pr->SiS_LCDA1400x1050Data_1  = (SiS_LVDSDataStruct *)SiS310_LCDA1400x1050Data_1;
+   SiS_Pr->SiS_LCDA1400x1050Data_2  = (SiS_LVDSDataStruct *)SiS310_LCDA1400x1050Data_2;
+   SiS_Pr->SiS_LCDA1600x1200Data_1  = (SiS_LVDSDataStruct *)SiS310_LCDA1600x1200Data_1;
+   SiS_Pr->SiS_LCDA1600x1200Data_2  = (SiS_LVDSDataStruct *)SiS310_LCDA1600x1200Data_2;
+   SiS_Pr->SiS_CHTVUNTSCData = (SiS_LVDSDataStruct *)SiS310_CHTVUNTSCData;
+   SiS_Pr->SiS_CHTVONTSCData = (SiS_LVDSDataStruct *)SiS310_CHTVONTSCData;
+   SiS_Pr->SiS_CHTVUPALData  = (SiS_LVDSDataStruct *)SiS310_CHTVUPALData;
+   SiS_Pr->SiS_CHTVOPALData  = (SiS_LVDSDataStruct *)SiS310_CHTVOPALData;
+   SiS_Pr->SiS_CHTVUPALMData = (SiS_LVDSDataStruct *)SiS310_CHTVUPALMData;
+   SiS_Pr->SiS_CHTVOPALMData = (SiS_LVDSDataStruct *)SiS310_CHTVOPALMData;
+   SiS_Pr->SiS_CHTVUPALNData = (SiS_LVDSDataStruct *)SiS310_CHTVUPALNData;
+   SiS_Pr->SiS_CHTVOPALNData = (SiS_LVDSDataStruct *)SiS310_CHTVOPALNData;
+   SiS_Pr->SiS_CHTVSOPALData = (SiS_LVDSDataStruct *)SiS310_CHTVSOPALData;
+   SiS_Pr->SiS_PanelType00_1 = (SiS_LVDSDesStruct *)SiS310_PanelType00_1;
+   SiS_Pr->SiS_PanelType01_1 = (SiS_LVDSDesStruct *)SiS310_PanelType01_1;
+   SiS_Pr->SiS_PanelType02_1 = (SiS_LVDSDesStruct *)SiS310_PanelType02_1;
+   SiS_Pr->SiS_PanelType03_1 = (SiS_LVDSDesStruct *)SiS310_PanelType03_1;
+   SiS_Pr->SiS_PanelType04_1 = (SiS_LVDSDesStruct *)SiS310_PanelType04_1;
+   SiS_Pr->SiS_PanelType05_1 = (SiS_LVDSDesStruct *)SiS310_PanelType05_1;
+   SiS_Pr->SiS_PanelType06_1 = (SiS_LVDSDesStruct *)SiS310_PanelType06_1;
+   SiS_Pr->SiS_PanelType07_1 = (SiS_LVDSDesStruct *)SiS310_PanelType07_1;
+   SiS_Pr->SiS_PanelType08_1 = (SiS_LVDSDesStruct *)SiS310_PanelType08_1;
+   SiS_Pr->SiS_PanelType09_1 = (SiS_LVDSDesStruct *)SiS310_PanelType09_1;
+   SiS_Pr->SiS_PanelType0a_1 = (SiS_LVDSDesStruct *)SiS310_PanelType0a_1;
+   SiS_Pr->SiS_PanelType0b_1 = (SiS_LVDSDesStruct *)SiS310_PanelType0b_1;
+   SiS_Pr->SiS_PanelType0c_1 = (SiS_LVDSDesStruct *)SiS310_PanelType0c_1;
+   SiS_Pr->SiS_PanelType0d_1 = (SiS_LVDSDesStruct *)SiS310_PanelType0d_1;
+   SiS_Pr->SiS_PanelType0e_1 = (SiS_LVDSDesStruct *)SiS310_PanelType0e_1;
+   SiS_Pr->SiS_PanelType0f_1 = (SiS_LVDSDesStruct *)SiS310_PanelType0f_1;
+   SiS_Pr->SiS_PanelType00_2 = (SiS_LVDSDesStruct *)SiS310_PanelType00_2;
+   SiS_Pr->SiS_PanelType01_2 = (SiS_LVDSDesStruct *)SiS310_PanelType01_2;
+   SiS_Pr->SiS_PanelType02_2 = (SiS_LVDSDesStruct *)SiS310_PanelType02_2;
+   SiS_Pr->SiS_PanelType03_2 = (SiS_LVDSDesStruct *)SiS310_PanelType03_2;
+   SiS_Pr->SiS_PanelType04_2 = (SiS_LVDSDesStruct *)SiS310_PanelType04_2;
+   SiS_Pr->SiS_PanelType05_2 = (SiS_LVDSDesStruct *)SiS310_PanelType05_2;
+   SiS_Pr->SiS_PanelType06_2 = (SiS_LVDSDesStruct *)SiS310_PanelType06_2;
+   SiS_Pr->SiS_PanelType07_2 = (SiS_LVDSDesStruct *)SiS310_PanelType07_2;
+   SiS_Pr->SiS_PanelType08_2 = (SiS_LVDSDesStruct *)SiS310_PanelType08_2;
+   SiS_Pr->SiS_PanelType09_2 = (SiS_LVDSDesStruct *)SiS310_PanelType09_2;
+   SiS_Pr->SiS_PanelType0a_2 = (SiS_LVDSDesStruct *)SiS310_PanelType0a_2;
+   SiS_Pr->SiS_PanelType0b_2 = (SiS_LVDSDesStruct *)SiS310_PanelType0b_2;
+   SiS_Pr->SiS_PanelType0c_2 = (SiS_LVDSDesStruct *)SiS310_PanelType0c_2;
+   SiS_Pr->SiS_PanelType0d_2 = (SiS_LVDSDesStruct *)SiS310_PanelType0d_2;
+   SiS_Pr->SiS_PanelType0e_2 = (SiS_LVDSDesStruct *)SiS310_PanelType0e_2;
+   SiS_Pr->SiS_PanelType0f_2 = (SiS_LVDSDesStruct *)SiS310_PanelType0f_2;
+
+   SiS_Pr->LVDS1024x768Des_1  = (SiS_LVDSDesStruct *)SiS310_PanelType1076_1;
+   SiS_Pr->LVDS1280x1024Des_1 = (SiS_LVDSDesStruct *)SiS310_PanelType1210_1;
+   SiS_Pr->LVDS1400x1050Des_1 = (SiS_LVDSDesStruct *)SiS310_PanelType1296_1 ;
+   SiS_Pr->LVDS1600x1200Des_1 = (SiS_LVDSDesStruct *)SiS310_PanelType1600_1 ;
+   SiS_Pr->LVDS1024x768Des_2  = (SiS_LVDSDesStruct *)SiS310_PanelType1076_2;
+   SiS_Pr->LVDS1280x1024Des_2 = (SiS_LVDSDesStruct *)SiS310_PanelType1210_2;
+   SiS_Pr->LVDS1400x1050Des_2 = (SiS_LVDSDesStruct *)SiS310_PanelType1296_2;
+   SiS_Pr->LVDS1600x1200Des_2 = (SiS_LVDSDesStruct *)SiS310_PanelType1600_2 ;
+
+   /* TW: New from 650/301LV BIOS */
+   SiS_Pr->SiS_CRT2Part2_1024x768_1  = (SiS_Part2PortTblStruct *)SiS310_CRT2Part2_1024x768_1;
+   SiS_Pr->SiS_CRT2Part2_1280x1024_1 = (SiS_Part2PortTblStruct *)SiS310_CRT2Part2_1280x1024_1;
+   SiS_Pr->SiS_CRT2Part2_1400x1050_1 = (SiS_Part2PortTblStruct *)SiS310_CRT2Part2_1400x1050_1;
+   SiS_Pr->SiS_CRT2Part2_1600x1200_1 = (SiS_Part2PortTblStruct *)SiS310_CRT2Part2_1600x1200_1;
+   SiS_Pr->SiS_CRT2Part2_1024x768_2  = (SiS_Part2PortTblStruct *)SiS310_CRT2Part2_1024x768_2;
+   SiS_Pr->SiS_CRT2Part2_1280x1024_2 = (SiS_Part2PortTblStruct *)SiS310_CRT2Part2_1280x1024_2;
+   SiS_Pr->SiS_CRT2Part2_1400x1050_2 = (SiS_Part2PortTblStruct *)SiS310_CRT2Part2_1400x1050_2;
+   SiS_Pr->SiS_CRT2Part2_1600x1200_2 = (SiS_Part2PortTblStruct *)SiS310_CRT2Part2_1600x1200_2;
+   SiS_Pr->SiS_CRT2Part2_1024x768_3  = (SiS_Part2PortTblStruct *)SiS310_CRT2Part2_1024x768_3;
+   SiS_Pr->SiS_CRT2Part2_1280x1024_3 = (SiS_Part2PortTblStruct *)SiS310_CRT2Part2_1280x1024_3;
+   SiS_Pr->SiS_CRT2Part2_1400x1050_3 = (SiS_Part2PortTblStruct *)SiS310_CRT2Part2_1400x1050_3;
+   SiS_Pr->SiS_CRT2Part2_1600x1200_3 = (SiS_Part2PortTblStruct *)SiS310_CRT2Part2_1600x1200_3;
+
+   SiS_Pr->SiS_CHTVUNTSCDesData = (SiS_LVDSDesStruct *)SiS310_CHTVUNTSCDesData;
+   SiS_Pr->SiS_CHTVONTSCDesData = (SiS_LVDSDesStruct *)SiS310_CHTVONTSCDesData;
+   SiS_Pr->SiS_CHTVUPALDesData  = (SiS_LVDSDesStruct *)SiS310_CHTVUPALDesData;
+   SiS_Pr->SiS_CHTVOPALDesData  = (SiS_LVDSDesStruct *)SiS310_CHTVOPALDesData;
+
+   SiS_Pr->SiS_LVDSCRT1800x600_1     = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT1800x600_1;
+   SiS_Pr->SiS_LVDSCRT11024x768_1    = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT11024x768_1;
+   SiS_Pr->SiS_LVDSCRT11280x1024_1   = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT11280x1024_1;
+   SiS_Pr->SiS_LVDSCRT11400x1050_1   = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT11400x1050_1;
+   SiS_Pr->SiS_LVDSCRT11280x768_1    = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT11280x768_1;
+   SiS_Pr->SiS_LVDSCRT11024x600_1    = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT11024x600_1;
+   SiS_Pr->SiS_LVDSCRT11152x768_1    = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT11152x768_1;
+   SiS_Pr->SiS_LVDSCRT11600x1200_1   = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT11600x1200_1;
+   SiS_Pr->SiS_LVDSCRT1800x600_1_H   = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT1800x600_1_H;
+   SiS_Pr->SiS_LVDSCRT11024x768_1_H  = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT11024x768_1_H;
+   SiS_Pr->SiS_LVDSCRT11280x1024_1_H = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT11280x1024_1_H;
+   SiS_Pr->SiS_LVDSCRT11400x1050_1_H = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT11400x1050_1_H;
+   SiS_Pr->SiS_LVDSCRT11280x768_1_H  = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT11280x768_1_H;
+   SiS_Pr->SiS_LVDSCRT11024x600_1_H  = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT11024x600_1_H;
+   SiS_Pr->SiS_LVDSCRT11152x768_1_H  = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT11152x768_1_H;
+   SiS_Pr->SiS_LVDSCRT11600x1200_1_H = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT11600x1200_1_H;
+   SiS_Pr->SiS_LVDSCRT1800x600_2     = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT1800x600_2;
+   SiS_Pr->SiS_LVDSCRT11024x768_2    = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT11024x768_2;
+   SiS_Pr->SiS_LVDSCRT11280x1024_2   = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT11280x1024_2;
+   SiS_Pr->SiS_LVDSCRT11400x1050_2   = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT11400x1050_2;
+   SiS_Pr->SiS_LVDSCRT11280x768_2    = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT11280x768_2;
+   SiS_Pr->SiS_LVDSCRT11024x600_2    = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT11024x600_2;
+   SiS_Pr->SiS_LVDSCRT11152x768_2    = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT11152x768_2;
+   SiS_Pr->SiS_LVDSCRT11600x1200_2   = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT11600x1200_2;
+   SiS_Pr->SiS_LVDSCRT1800x600_2_H   = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT1800x600_2_H;
+   SiS_Pr->SiS_LVDSCRT11024x768_2_H  = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT11024x768_2_H;
+   SiS_Pr->SiS_LVDSCRT11280x1024_2_H = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT11280x1024_2_H;
+   SiS_Pr->SiS_LVDSCRT11400x1050_2_H = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT11400x1050_2_H;
+   SiS_Pr->SiS_LVDSCRT11280x768_2_H  = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT11280x768_2_H;
+   SiS_Pr->SiS_LVDSCRT11024x600_2_H  = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT11024x600_2_H;
+   SiS_Pr->SiS_LVDSCRT11152x768_2_H  = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT11152x768_2_H;
+   SiS_Pr->SiS_LVDSCRT11600x1200_2_H = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT11600x1200_2_H;
+   SiS_Pr->SiS_LVDSCRT1XXXxXXX_1     = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT1XXXxXXX_1;
+   SiS_Pr->SiS_LVDSCRT1320x480_1     = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT1320x480_1;
+   SiS_Pr->SiS_CHTVCRT1UNTSC = (SiS_LVDSCRT1DataStruct *)SiS310_CHTVCRT1UNTSC;
+   SiS_Pr->SiS_CHTVCRT1ONTSC = (SiS_LVDSCRT1DataStruct *)SiS310_CHTVCRT1ONTSC;
+   SiS_Pr->SiS_CHTVCRT1UPAL  = (SiS_LVDSCRT1DataStruct *)SiS310_CHTVCRT1UPAL;
+   SiS_Pr->SiS_CHTVCRT1OPAL  = (SiS_LVDSCRT1DataStruct *)SiS310_CHTVCRT1OPAL;
+   SiS_Pr->SiS_CHTVCRT1SOPAL = (SiS_LVDSCRT1DataStruct *)SiS310_CHTVCRT1SOPAL;
+   SiS_Pr->SiS_CHTVReg_UNTSC = (SiS_CHTVRegDataStruct *)SiS310_CHTVReg_UNTSC;
+   SiS_Pr->SiS_CHTVReg_ONTSC = (SiS_CHTVRegDataStruct *)SiS310_CHTVReg_ONTSC;
+   SiS_Pr->SiS_CHTVReg_UPAL  = (SiS_CHTVRegDataStruct *)SiS310_CHTVReg_UPAL;
+   SiS_Pr->SiS_CHTVReg_OPAL  = (SiS_CHTVRegDataStruct *)SiS310_CHTVReg_OPAL;
+   SiS_Pr->SiS_CHTVReg_UPALM = (SiS_CHTVRegDataStruct *)SiS310_CHTVReg_UPALM;
+   SiS_Pr->SiS_CHTVReg_OPALM = (SiS_CHTVRegDataStruct *)SiS310_CHTVReg_OPALM;
+   SiS_Pr->SiS_CHTVReg_UPALN = (SiS_CHTVRegDataStruct *)SiS310_CHTVReg_UPALN;
+   SiS_Pr->SiS_CHTVReg_OPALN = (SiS_CHTVRegDataStruct *)SiS310_CHTVReg_OPALN;
+   SiS_Pr->SiS_CHTVReg_SOPAL = (SiS_CHTVRegDataStruct *)SiS310_CHTVReg_SOPAL;
+   SiS_Pr->SiS_LCDACRT1800x600_1     = (SiS_LCDACRT1DataStruct *)SiS310_LCDACRT1800x600_1;
+   SiS_Pr->SiS_LCDACRT11024x768_1    = (SiS_LCDACRT1DataStruct *)SiS310_LCDACRT11024x768_1;
+   SiS_Pr->SiS_LCDACRT11280x1024_1   = (SiS_LCDACRT1DataStruct *)SiS310_LCDACRT11280x1024_1;
+   SiS_Pr->SiS_LCDACRT11400x1050_1   = (SiS_LCDACRT1DataStruct *)SiS310_LCDACRT11400x1050_1;
+   SiS_Pr->SiS_LCDACRT11600x1200_1   = (SiS_LCDACRT1DataStruct *)SiS310_LCDACRT11600x1200_1;
+   SiS_Pr->SiS_LCDACRT1800x600_1_H   = (SiS_LCDACRT1DataStruct *)SiS310_LCDACRT1800x600_1_H;
+   SiS_Pr->SiS_LCDACRT11024x768_1_H  = (SiS_LCDACRT1DataStruct *)SiS310_LCDACRT11024x768_1_H;
+   SiS_Pr->SiS_LCDACRT11280x1024_1_H = (SiS_LCDACRT1DataStruct *)SiS310_LCDACRT11280x1024_1_H;
+   SiS_Pr->SiS_LCDACRT11400x1050_1_H = (SiS_LCDACRT1DataStruct *)SiS310_LCDACRT11400x1050_1_H;
+   SiS_Pr->SiS_LCDACRT11600x1200_1_H = (SiS_LCDACRT1DataStruct *)SiS310_LCDACRT11600x1200_1_H;
+   SiS_Pr->SiS_LCDACRT1800x600_2     = (SiS_LCDACRT1DataStruct *)SiS310_LCDACRT1800x600_2;
+   SiS_Pr->SiS_LCDACRT11024x768_2    = (SiS_LCDACRT1DataStruct *)SiS310_LCDACRT11024x768_2;
+   SiS_Pr->SiS_LCDACRT11280x1024_2   = (SiS_LCDACRT1DataStruct *)SiS310_LCDACRT11280x1024_2;
+   SiS_Pr->SiS_LCDACRT11400x1050_2   = (SiS_LCDACRT1DataStruct *)SiS310_LCDACRT11400x1050_2;
+   SiS_Pr->SiS_LCDACRT11600x1200_2   = (SiS_LCDACRT1DataStruct *)SiS310_LCDACRT11600x1200_2;
+   SiS_Pr->SiS_LCDACRT1800x600_2_H   = (SiS_LCDACRT1DataStruct *)SiS310_LCDACRT1800x600_2_H;
+   SiS_Pr->SiS_LCDACRT11024x768_2_H  = (SiS_LCDACRT1DataStruct *)SiS310_LCDACRT11024x768_2_H;
+   SiS_Pr->SiS_LCDACRT11280x1024_2_H = (SiS_LCDACRT1DataStruct *)SiS310_LCDACRT11280x1024_2_H;
+   SiS_Pr->SiS_LCDACRT11400x1050_2_H = (SiS_LCDACRT1DataStruct *)SiS310_LCDACRT11400x1050_2_H;
+   SiS_Pr->SiS_LCDACRT11600x1200_2_H = (SiS_LCDACRT1DataStruct *)SiS310_LCDACRT11600x1200_2_H;
+   SiS_Pr->SiS_CHTVVCLKUNTSC = SiS310_CHTVVCLKUNTSC;
+   SiS_Pr->SiS_CHTVVCLKONTSC = SiS310_CHTVVCLKONTSC;
+   SiS_Pr->SiS_CHTVVCLKUPAL  = SiS310_CHTVVCLKUPAL;
+   SiS_Pr->SiS_CHTVVCLKOPAL  = SiS310_CHTVVCLKOPAL;
+   SiS_Pr->SiS_CHTVVCLKUPALM = SiS310_CHTVVCLKUPALM;
+   SiS_Pr->SiS_CHTVVCLKOPALM = SiS310_CHTVVCLKOPALM;
+   SiS_Pr->SiS_CHTVVCLKUPALN = SiS310_CHTVVCLKUPALN;
+   SiS_Pr->SiS_CHTVVCLKOPALN = SiS310_CHTVVCLKOPALN;   
+   SiS_Pr->SiS_CHTVVCLKSOPAL = SiS310_CHTVVCLKSOPAL;
+
+   SiS_Pr->SiS_Panel320x480   = Panel_320x480;
+   SiS_Pr->SiS_Panel640x480   = Panel_640x480;
+   SiS_Pr->SiS_Panel800x600   = Panel_800x600;
+   SiS_Pr->SiS_Panel1024x768  = Panel_1024x768;
+   SiS_Pr->SiS_Panel1280x1024 = Panel_1280x1024;
+   SiS_Pr->SiS_Panel1280x960  = Panel_1280x960;
+   SiS_Pr->SiS_Panel1600x1200 = Panel_1600x1200;
+   SiS_Pr->SiS_Panel1400x1050 = Panel_1400x1050;
+   SiS_Pr->SiS_Panel1152x768  = Panel_1152x768;
+   SiS_Pr->SiS_Panel1152x864  = Panel_1152x864;
+   SiS_Pr->SiS_Panel1280x768  = Panel_1280x768;
+   SiS_Pr->SiS_Panel1024x600  = Panel_1024x600;
+   SiS_Pr->SiS_PanelMax       = Panel_320x480;    /* TW: highest value */
+   SiS_Pr->SiS_PanelMinLVDS   = Panel_800x600;    /* TW: lowest value LVDS/LCDA */
+   SiS_Pr->SiS_PanelMin301    = Panel_1024x768;   /* TW: lowest value 301 */
+}
+#endif
+
+#ifdef LINUXBIOS
+/* -------------- SiSInit -----------------*/
+/* TW: I degraded this for LINUXBIOS only, because we
+ *     don't need this otherwise. Under normal
+ *     circumstances, the video BIOS has initialized
+ *     the adapter for us. BTW, this code is incomplete
+ *     and very possibly not functioning on newer chipsets.
+ */
+BOOLEAN
+SiSInit(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension)
+{
+   UCHAR  *ROMAddr  = HwDeviceExtension->pjVirtualRomBase;
+   ULONG   FBAddr   = (ULONG)HwDeviceExtension->pjVideoMemoryAddress;
+   USHORT  BaseAddr = (USHORT)HwDeviceExtension->ulIOAddress;
+   UCHAR   i, temp=0;
+   UCHAR   SR11;
+#ifdef LINUX_KERNEL
+   UCHAR   temp1;
+   ULONG   base;
+#endif
+   UCHAR   SR13=0, SR14=0, SR16=0
+   UCHAR   SR17=0, SR19=0, SR1A=0;
+#ifdef SIS300
+   UCHAR   SR18=0, SR12=0;
+#endif
+#ifdef SIS315H
+   UCHAR   CR37=0, CR38=0, CR79=0,
+   UCHAR   CR7A=0, CR7B=0, CR7C=0;
+   UCHAR   SR1B=0, SR15=0;
+   PSIS_DSReg pSR;
+   ULONG   Temp;
+#endif
+   UCHAR   VBIOSVersion[5];
+
+   if(FBAddr==0)    return (FALSE);
+   if(BaseAddr==0)  return (FALSE);
+
+   SiS_SetReg3((USHORT)(BaseAddr+0x12),  0x67);  /* Misc */
+
+#ifdef SIS315H
+   if(HwDeviceExtension->jChipType > SIS_315PRO) {
+     if(!HwDeviceExtension->bIntegratedMMEnabled)
+     	return (FALSE);
+   }
+#endif
+
+   SiS_MemoryCopy(VBIOSVersion,HwDeviceExtension->szVBIOSVer,4);
+   VBIOSVersion[4]= 0x00;
+
+   SiSDetermineROMUsage(SiS_Pr, HwDeviceExtension, ROMAddr);
+
+   /* TW: Init pointers */
+#ifdef SIS315H
+   if((HwDeviceExtension->jChipType == SIS_315H) ||
+      (HwDeviceExtension->jChipType == SIS_315) ||
+      (HwDeviceExtension->jChipType == SIS_315PRO) ||
+      (HwDeviceExtension->jChipType == SIS_550) ||
+      (HwDeviceExtension->jChipType == SIS_650) ||
+      (HwDeviceExtension->jChipType == SIS_740) ||
+      (HwDeviceExtension->jChipType == SIS_330))
+     InitTo310Pointer(SiS_Pr, HwDeviceExtension);
+#endif
+
+#ifdef SIS300
+   if((HwDeviceExtension->jChipType == SIS_540) ||
+      (HwDeviceExtension->jChipType == SIS_630) ||
+      (HwDeviceExtension->jChipType == SIS_730) ||
+      (HwDeviceExtension->jChipType == SIS_300))
+     InitTo300Pointer(SiS_Pr, HwDeviceExtension);
+#endif
+
+   /* TW: Set SiS Register definitions */
+   SiSRegInit(SiS_Pr, BaseAddr);
+
+   /* TW: Determine LVDS/CH70xx/TRUMPION */
+   SiS_Set_LVDS_TRUMPION(SiS_Pr, HwDeviceExtension);
+
+   /* TW: Unlock registers */
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x05,0x86);
+
+#ifdef LINUX_KERNEL
+
+#ifdef SIS300                                         	/* Set SR14 */
+   if((HwDeviceExtension->jChipType==SIS_540) ||
+      (HwDeviceExtension->jChipType==SIS_630) ||
+      (HwDeviceExtension->jChipType==SIS_730)) {
+     base=0x80000060;
+     OutPortLong(base,0xcf8);
+     temp1 = InPortLong(0xcfc);
+     temp1 >>= (16+8+4);
+     temp1 &= 0x07;
+     temp1++;
+     temp1 = 1 << temp1;
+     SR14 = temp1 - 1;
+     base = 0x80000064;
+     OutPortLong(base,0xcf8);
+     temp1 = InPortLong(0xcfc);
+     temp1 &= 0x00000020;
+     if(temp1) 	SR14 |= 0x80;
+     else      	SR14 |= 0x40;
+   }
+#endif
+
+#ifdef SIS315H                                          /* Set SR14 */
+   if(HwDeviceExtension->jChipType == SIS_550) {
+     base = 0x80000060;
+     OutPortLong(base,0xcf8);
+     temp1 = InPortLong(0xcfc);
+     temp1 >>= (16+8+4);
+     temp1 &= 0x07;
+     temp1++;
+     temp1 = 1 << temp1;
+     SR14 = temp1 - 1;
+     base = 0x80000064;
+     OutPortLong(base,0xcf8);
+     temp1 = InPortLong(0xcfc);
+     temp1 &= 0x00000020;
+     if(temp1)  SR14 |= 0x80;
+     else       SR14 |= 0x40;
+   }
+
+   if((HwDeviceExtension->jChipType == SIS_740) ||     /* Set SR14 */
+      (HwDeviceExtension->jChipType == SIS_650))  {
+     base = 0x80000064;
+     OutPortLong(base,0xcf8);
+     temp1=InPortLong(0xcfc);
+     temp1 >>= 4;
+     temp1 &= 0x07;
+     if(temp1 > 2) {
+       temp = temp1;
+       switch(temp) {
+        case 3: temp1 = 0x07;  break;
+        case 4: temp1 = 0x0F;  break;
+        case 5: temp1 = 0x1F;  break;
+        case 6: temp1 = 0x05;  break;
+        case 7: temp1 = 0x17;  break;
+        case 8: break;
+        case 9: break;
+       }
+     }
+     SR14 = temp1;
+     base = 0x8000007C;
+     OutPortLong(base,0xcf8);
+     temp1 = InPortLong(0xcfc);
+     temp1 &= 0x00000020;
+     if(temp1)  SR14 |= 0x80;
+   }
+#endif
+
+#endif  /* Linux kernel */
+
+#ifdef SIS300
+   if((HwDeviceExtension->jChipType == SIS_540)||
+      (HwDeviceExtension->jChipType == SIS_630)||
+      (HwDeviceExtension->jChipType == SIS_730)) {
+     SR12 = (UCHAR)SiS_GetReg1(SiS_Pr->SiS_P3c4,0x12);
+     SR13 = (UCHAR)SiS_GetReg1(SiS_Pr->SiS_P3c4,0x13);
+     SR14 = (UCHAR)SiS_GetReg1(SiS_Pr->SiS_P3c4,0x14);
+     SR16 = (UCHAR)SiS_GetReg1(SiS_Pr->SiS_P3c4,0x16);
+     SR17 = (UCHAR)SiS_GetReg1(SiS_Pr->SiS_P3c4,0x17);
+     SR18 = (UCHAR)SiS_GetReg1(SiS_Pr->SiS_P3c4,0x18);
+     SR19 = (UCHAR)SiS_GetReg1(SiS_Pr->SiS_P3c4,0x19);
+     SR1A = (UCHAR)SiS_GetReg1(SiS_Pr->SiS_P3c4,0x1A);
+   } else if(HwDeviceExtension->jChipType == SIS_300){
+     SR13 = (UCHAR)SiS_GetReg1(SiS_Pr->SiS_P3c4,0x13);
+     SR14 = (UCHAR)SiS_GetReg1(SiS_Pr->SiS_P3c4,0x14);
+   }
+#endif
+#ifdef SIS315H
+   if((HwDeviceExtension->jChipType == SIS_550) ||
+      (HwDeviceExtension->jChipType == SIS_740) ||
+      (HwDeviceExtension->jChipType == SIS_650)) {
+     SR19 = (UCHAR)SiS_GetReg1(SiS_Pr->SiS_P3c4,0x19);
+     SR19 = (SR19)||0x01;  /* TW: ??? || ??? */
+     if(SR19==0x00) {
+     	SR13 = 0x22;
+     	SR14 = 0x00;
+    	SR15 = 0x01;
+     	SR16 = 0x00;
+     	SR17 = 0x00;
+     	SR1A = 0x00;
+     	SR1B = 0x00;
+     	CR37 = 0x00;
+     	CR38 = 0x00;
+     	CR79 = 0x00;
+     	CR7A = 0x00;
+     	CR7B = 0x00;
+     	CR7C = 0x00;
+     } else {
+     	SR13 = (UCHAR)SiS_GetReg1(SiS_Pr->SiS_P3c4,0x13);
+     	SR14 = (UCHAR)SiS_GetReg1(SiS_Pr->SiS_P3c4,0x14);
+     	SR15 = (UCHAR)SiS_GetReg1(SiS_Pr->SiS_P3c4,0x15);
+     	SR16 = (UCHAR)SiS_GetReg1(SiS_Pr->SiS_P3c4,0x16);
+     	SR17 = (UCHAR)SiS_GetReg1(SiS_Pr->SiS_P3c4,0x17);
+     	SR1A = (UCHAR)SiS_GetReg1(SiS_Pr->SiS_P3c4,0x1A);
+     	SR1B = (UCHAR)SiS_GetReg1(SiS_Pr->SiS_P3c4,0x1B);
+     	CR37 = (UCHAR)SiS_GetReg1(SiS_Pr->SiS_P3d4,0x37);  /* TW: Was 0x02 - why? */
+     	CR38 = (UCHAR)SiS_GetReg1(SiS_Pr->SiS_P3d4,0x38);
+     	CR79 = (UCHAR)SiS_GetReg1(SiS_Pr->SiS_P3d4,0x79);
+     	CR7A = (UCHAR)SiS_GetReg1(SiS_Pr->SiS_P3d4,0x7A);
+     	CR7B = (UCHAR)SiS_GetReg1(SiS_Pr->SiS_P3d4,0x7B);
+     	CR7C = (UCHAR)SiS_GetReg1(SiS_Pr->SiS_P3d4,0x7C);
+     }
+   }
+#endif
+
+   /* Reset extended registers */
+
+   for(i=0x06; i< 0x20; i++) SiS_SetReg1(SiS_Pr->SiS_P3c4,i,0);
+   for(i=0x21; i<=0x27; i++) SiS_SetReg1(SiS_Pr->SiS_P3c4,i,0);
+   for(i=0x31; i<=0x3D; i++) SiS_SetReg1(SiS_Pr->SiS_P3c4,i,0);
+
+#ifdef SIS300
+   if((HwDeviceExtension->jChipType == SIS_540) ||
+      (HwDeviceExtension->jChipType == SIS_630) ||
+      (HwDeviceExtension->jChipType == SIS_730) ||
+      (HwDeviceExtension->jChipType == SIS_300)) {
+     	for(i=0x38; i<=0x3F; i++) SiS_SetReg1(SiS_Pr->SiS_P3d4,i,0);
+   }
+#endif
+
+#ifdef SIS315H
+   if((HwDeviceExtension->jChipType == SIS_315H) ||
+      (HwDeviceExtension->jChipType == SIS_315) ||
+      (HwDeviceExtension->jChipType == SIS_315PRO) ||
+      (HwDeviceExtension->jChipType == SIS_550) ||
+      (HwDeviceExtension->jChipType == SIS_650) ||
+      (HwDeviceExtension->jChipType == SIS_740) ||
+      (HwDeviceExtension->jChipType == SIS_330)) {
+   	for(i=0x12; i<=0x1B; i++) SiS_SetReg1(SiS_Pr->SiS_P3c4,i,0);
+   	for(i=0x79; i<=0x7C; i++) SiS_SetReg1(SiS_Pr->SiS_P3d4,i,0);
+   }
+#endif
+
+   /* Restore Extended Registers */
+
+#ifdef SIS300
+   if((HwDeviceExtension->jChipType == SIS_540) ||
+      (HwDeviceExtension->jChipType == SIS_630) ||
+      (HwDeviceExtension->jChipType == SIS_730)) {
+     SiS_SetReg1(SiS_Pr->SiS_P3c4,0x12,SR12);
+     SiS_SetReg1(SiS_Pr->SiS_P3c4,0x13,SR13);
+     SiS_SetReg1(SiS_Pr->SiS_P3c4,0x14,SR14);
+     SiS_SetReg1(SiS_Pr->SiS_P3c4,0x16,SR16);
+     SiS_SetReg1(SiS_Pr->SiS_P3c4,0x17,SR17);
+     SiS_SetReg1(SiS_Pr->SiS_P3c4,0x18,SR18);
+     SiS_SetReg1(SiS_Pr->SiS_P3c4,0x19,SR19);
+     SiS_SetReg1(SiS_Pr->SiS_P3c4,0x1A,SR1A);
+   }
+#endif
+
+#ifdef SIS315H
+   if((HwDeviceExtension->jChipType == SIS_550) ||
+      (HwDeviceExtension->jChipType == SIS_740) ||
+      (HwDeviceExtension->jChipType == SIS_650)) {
+     SiS_SetReg1(SiS_Pr->SiS_P3c4,0x13,SR13);
+     SiS_SetReg1(SiS_Pr->SiS_P3c4,0x14,SR14);
+     SiS_SetReg1(SiS_Pr->SiS_P3c4,0x15,SR15);
+     SiS_SetReg1(SiS_Pr->SiS_P3c4,0x16,SR16);
+     SiS_SetReg1(SiS_Pr->SiS_P3c4,0x17,SR17);
+     SiS_SetReg1(SiS_Pr->SiS_P3c4,0x19,SR19);
+     SiS_SetReg1(SiS_Pr->SiS_P3c4,0x1A,SR1A);
+     SiS_SetReg1(SiS_Pr->SiS_P3c4,0x1B,SR1B);
+     SiS_SetReg1(SiS_Pr->SiS_P3d4,0x37,CR37);
+     SiS_SetReg1(SiS_Pr->SiS_P3d4,0x38,CR38);
+     SiS_SetReg1(SiS_Pr->SiS_P3d4,0x79,CR79);
+     SiS_SetReg1(SiS_Pr->SiS_P3d4,0x7A,CR7A);
+     SiS_SetReg1(SiS_Pr->SiS_P3d4,0x7B,CR7B);
+     SiS_SetReg1(SiS_Pr->SiS_P3d4,0x7C,CR7C);
+   }
+#endif
+
+#ifdef SIS300
+   if((HwDeviceExtension->jChipType==SIS_540) ||
+      (HwDeviceExtension->jChipType==SIS_630) ||
+      (HwDeviceExtension->jChipType==SIS_730)) {
+     	temp = (UCHAR)SR1A & 0x03;
+   } else if(HwDeviceExtension->jChipType == SIS_300) {
+        /* TW: Nothing */
+   }
+#endif
+#ifdef SIS315H
+   if((HwDeviceExtension->jChipType == SIS_315H)   ||
+      (HwDeviceExtension->jChipType == SIS_315)    ||
+      (HwDeviceExtension->jChipType == SIS_315PRO) ||
+      (HwDeviceExtension->jChipType == SIS_330) ) {
+      	if((*SiS_Pr->pSiS_SoftSetting & SoftDRAMType) == 0) {
+          	temp = (UCHAR)SiS_GetReg1(SiS_Pr->SiS_P3c4,0x3A) & 0x03;
+        }
+   }
+   if((HwDeviceExtension->jChipType == SIS_550) ||
+      (HwDeviceExtension->jChipType == SIS_740) ||
+      (HwDeviceExtension->jChipType == SIS_650)) {
+        if((*SiS_Pr->pSiS_SoftSetting & SoftDRAMType) == 0) {
+          	temp = (UCHAR)SiS_GetReg1(SiS_Pr->SiS_P3c4,0x13) & 0x07;
+        }
+   }
+#endif
+
+   SiS_Pr->SiS_RAMType = temp;
+   SiS_SetMemoryClock(SiS_Pr, ROMAddr, HwDeviceExtension);
+
+   /* Set default register contents */
+
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x07,*SiS_Pr->pSiS_SR07); 		/* DAC speed */
+
+   if((HwDeviceExtension->jChipType != SIS_540) &&
+      (HwDeviceExtension->jChipType != SIS_630) &&
+      (HwDeviceExtension->jChipType != SIS_730)){
+     	for(i=0x15;i<0x1C;i++) {
+       	    SiS_SetReg1(SiS_Pr->SiS_P3c4,i,SiS_Pr->SiS_SR15[i-0x15][SiS_Pr->SiS_RAMType]);
+     	}
+   }
+
+#ifdef SIS315H
+   if((HwDeviceExtension->jChipType == SIS_315H) ||
+      (HwDeviceExtension->jChipType == SIS_315)  ||
+      (HwDeviceExtension->jChipType == SIS_315PRO) ||
+      (HwDeviceExtension->jChipType == SIS_330)) {
+     	for(i=0x40;i<=0x44;i++) {
+       	    SiS_SetReg1(SiS_Pr->SiS_P3d4,i,SiS_Pr->SiS_CR40[i-0x40][SiS_Pr->SiS_RAMType]);
+     	}
+     	SiS_SetReg1(SiS_Pr->SiS_P3d4,0x48,0x23);
+     	SiS_SetReg1(SiS_Pr->SiS_P3d4,0x49,SiS_Pr->SiS_CR49[0]);
+    /*  SiS_SetReg1(SiS_Pr->SiS_P3c4,0x25,SiS_Pr->SiS_SR25[0]);  */
+   }
+#endif
+
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x1F,*SiS_Pr->pSiS_SR1F); 	/* DAC pedestal */
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x20,0xA0);
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x23,*SiS_Pr->pSiS_SR23);
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x24,*SiS_Pr->pSiS_SR24);
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x25,SiS_Pr->SiS_SR25[0]);
+
+#ifdef SIS300
+   if(HwDeviceExtension->jChipType == SIS_300) {
+     	SiS_SetReg1(SiS_Pr->SiS_P3c4,0x21,0x84);
+     	SiS_SetReg1(SiS_Pr->SiS_P3c4,0x22,0x00);
+   }
+#endif
+
+   SR11 = 0x0F;
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x11,SR11);		/* Power Management & DDC port */
+
+   SiS_UnLockCRT2(SiS_Pr, HwDeviceExtension, BaseAddr);
+   SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x00,0x00);
+   SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x02,*SiS_Pr->pSiS_CRT2Data_1_2);
+
+#ifdef SIS315H
+   if((HwDeviceExtension->jChipType == SIS_315H) ||
+      (HwDeviceExtension->jChipType == SIS_315) ||
+      (HwDeviceExtension->jChipType == SIS_315PRO) ||
+      (HwDeviceExtension->jChipType == SIS_550) ||
+      (HwDeviceExtension->jChipType == SIS_650) ||
+      (HwDeviceExtension->jChipType == SIS_740) ||
+      (HwDeviceExtension->jChipType == SIS_330))
+     	SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x2E,0x08);    /* use VB */
+#endif
+
+   temp = *SiS_Pr->pSiS_SR32;
+   if(SiS_BridgeIsOn(SiS_Pr, BaseAddr)) {
+     	temp &= 0xEF;
+   }
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x32,temp);
+
+#ifdef SIS315H
+   if((HwDeviceExtension->jChipType == SIS_315H)   ||
+      (HwDeviceExtension->jChipType == SIS_315)    ||
+      (HwDeviceExtension->jChipType == SIS_315PRO) ||
+      (HwDeviceExtension->jChipType == SIS_330)) {
+     HwDeviceExtension->pQueryVGAConfigSpace(HwDeviceExtension,0x50,0,&Temp);
+     Temp >>= 20;
+     Temp &= 0xF;
+     if (Temp != 1) {
+     	SiS_SetReg1(SiS_Pr->SiS_P3c4,0x25,SiS_Pr->SiS_SR25[1]);
+     	SiS_SetReg1(SiS_Pr->SiS_P3d4,0x49,SiS_Pr->SiS_CR49[1]);
+     }
+
+     SiS_SetReg1(SiS_Pr->SiS_P3c4,0x27,0x1F);
+
+     SiS_SetReg1(SiS_Pr->SiS_P3c4,0x31,*SiS_Pr->pSiS_SR31);
+     SiS_SetReg1(SiS_Pr->SiS_P3c4,0x32,*SiS_Pr->pSiS_SR32);
+     SiS_SetReg1(SiS_Pr->SiS_P3c4,0x33,*SiS_Pr->pSiS_SR33);
+   }
+#endif
+
+   if (SiS_BridgeIsOn(SiS_Pr, BaseAddr) == 0) {
+     	if(SiS_Pr->SiS_IF_DEF_LVDS == 0) {
+       		SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x00,0x1C);
+       		SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x0D,*SiS_Pr->pSiS_CRT2Data_4_D);
+       		SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x0E,*SiS_Pr->pSiS_CRT2Data_4_E);
+       		SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x10,*SiS_Pr->pSiS_CRT2Data_4_10);
+       		SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x0F,0x3F);
+     	}
+     	SiS_LockCRT2(SiS_Pr, HwDeviceExtension, BaseAddr);
+   }
+   SiS_SetReg1(SiS_Pr->SiS_P3d4,0x83,0x00);
+
+#ifdef SIS315H
+   if((HwDeviceExtension->jChipType == SIS_315H)   ||
+      (HwDeviceExtension->jChipType == SIS_315)    ||
+      (HwDeviceExtension->jChipType == SIS_315PRO) ||
+      (HwDeviceExtension->jChipType == SIS_330)) {
+       	if(HwDeviceExtension->bSkipDramSizing==TRUE) {
+         	SiS_SetDRAMModeRegister(SiS_Pr, ROMAddr,HwDeviceExtension);
+         	pSR = HwDeviceExtension->pSR;
+         	if(pSR != NULL) {
+           		while(pSR->jIdx != 0xFF) {
+             			SiS_SetReg1(SiS_Pr->SiS_P3c4,pSR->jIdx,pSR->jVal);
+             			pSR++;
+           		}
+         	}
+       } else SiS_SetDRAMSize_310(SiS_Pr, HwDeviceExtension);
+   }
+#endif
+
+#ifdef SIS315H
+   if(HwDeviceExtension->jChipType == SIS_550) {
+       /* SetDRAMConfig begin */
+/*     SiS_SetReg1(SiS_Pr->SiS_P3c4,0x12,SR12);
+       SiS_SetReg1(SiS_Pr->SiS_P3c4,0x13,SR13);
+       SiS_SetReg1(SiS_Pr->SiS_P3c4,0x14,SR14);
+       SiS_SetReg1(SiS_Pr->SiS_P3c4,0x16,SR16);
+       SiS_SetReg1(SiS_Pr->SiS_P3c4,0x17,SR17);
+       SiS_SetReg1(SiS_Pr->SiS_P3c4,0x18,SR18);
+       SiS_SetReg1(SiS_Pr->SiS_P3c4,0x19,SR19);
+       SiS_SetReg1(SiS_Pr->SiS_P3c4,0x1A,SR1A);   */
+       /* SetDRAMConfig end */
+   }
+#endif
+
+#ifdef SIS300
+   if(HwDeviceExtension->jChipType == SIS_300) {
+       	if (HwDeviceExtension->bSkipDramSizing == TRUE) {
+/*       	SiS_SetDRAMModeRegister(ROMAddr,HwDeviceExtension);
+         	temp = (HwDeviceExtension->pSR)->jVal;
+         	SiS_SetReg1(SiS_Pr->SiS_P3c4,0x13,temp);
+         	temp = (HwDeviceExtension->pSR)->jVal;
+         	SiS_SetReg1(SiS_Pr->SiS_P3c4,0x14,temp);   */
+       } else {
+#ifdef TC
+         	SiS_SetReg1(SiS_Pr->SiS_P3c4,0x13,SR13);
+         	SiS_SetReg1(SiS_Pr->SiS_P3c4,0x14,SR14);
+         	SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x15,0xFF,0x04);
+#else
+         	SiS_SetDRAMSize_300(SiS_Pr, HwDeviceExtension);
+         	SiS_SetDRAMSize_300(SiS_Pr, HwDeviceExtension);
+#endif
+       }
+   }
+   if((HwDeviceExtension->jChipType==SIS_540)||
+      (HwDeviceExtension->jChipType==SIS_630)||
+      (HwDeviceExtension->jChipType==SIS_730)) {
+#if 0
+     	SiS_SetReg1(SiS_Pr->SiS_P3c4,0x12,SR12);
+       	SiS_SetReg1(SiS_Pr->SiS_P3c4,0x13,SR13);
+       	SiS_SetReg1(SiS_Pr->SiS_P3c4,0x14,SR14);
+       	SiS_SetReg1(SiS_Pr->SiS_P3c4,0x16,SR16);
+       	SiS_SetReg1(SiS_Pr->SiS_P3c4,0x17,SR17);
+       	SiS_SetReg1(SiS_Pr->SiS_P3c4,0x18,SR18);
+       	SiS_SetReg1(SiS_Pr->SiS_P3c4,0x19,SR19);
+       	SiS_SetReg1(SiS_Pr->SiS_P3c4,0x1A,SR1A);
+#endif
+   }
+/* SetDRAMSize end */
+#endif /* SIS300 */
+
+   /* Set default Ext2Regs */
+#if 0
+   AGP=1;
+   temp=(UCHAR)SiS_GetReg1(SiS_Pr->SiS_P3c4,0x3A);
+   temp &= 0x30;
+   if(temp == 0x30) AGP=0;
+   if(AGP == 0) *SiS_Pr->pSiS_SR21 &= 0xEF;
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x21,*SiS_Pr->pSiS_SR21);
+   if(AGP == 1) *SiS_Pr->pSiS_SR22 &= 0x20;
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x22,*SiS_Pr->pSiS_SR22);
+#endif
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x21,*SiS_Pr->pSiS_SR21);
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x22,*SiS_Pr->pSiS_SR22);
+
+#if 0
+   SiS_SetReg3(SiS_Pr->SiS_P3c6,0xff);
+   SiS_ClearDAC(SiS_Pr, SiS_Pr->SiS_P3c8);
+#endif
+
+#ifdef LINUXBIOS   /* TW: This is not needed for our purposes */
+   SiS_DetectMonitor(SiS_Pr, HwDeviceExtension,BaseAddr);    /* Sense CRT1 */
+   SiS_GetSenseStatus(SiS_Pr, HwDeviceExtension,ROMAddr);    /* Sense CRT2 */
+#endif
+
+   return(TRUE);
+}
+
+void
+SiS_Set_LVDS_TRUMPION(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension)
+{
+  USHORT temp = 0;
+
+#ifdef SiS300
+  if((HwDeviceExtension->jChipType == SIS_540) ||
+     (HwDeviceExtension->jChipType == SIS_630) ||
+     (HwDeviceExtension->jChipType == SIS_730)) {
+        /* TW: Read POWER_ON_TRAP and copy to CR37 */
+    	temp = (UCHAR)SiS_GetReg1(SiS_Pr->SiS_P3c4,0x1A);
+    	temp = (temp & 0xE0) >> 4;
+   	SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x37,0xF1,temp);
+  }
+#endif
+#ifdef SIS315H
+  if((HwDeviceExtension->jChipType == SIS_650) ||
+     (HwDeviceExtension->jChipType == SIS_740) ||
+     (HwDeviceExtension->jChipType == SIS_330)) {
+#if 0 /* TW: This is not required */
+        /* TW: Read POWER_ON_TRAP and copy to CR37 */
+    	temp = (UCHAR)SiS_GetReg1(SiS_Pr->SiS_P3c4,0x1A);
+    	temp = (temp & 0xE0) >> 4;
+   	SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x37,0xF1,temp);
+#endif
+  }
+#endif
+
+   SiSSetLVDSetc(SiS_Pr, HwDeviceExtension, 0);
+}
+
+/* ===============  SiS 300 dram sizing begin  =============== */
+#ifdef SIS300
+void
+SiS_SetDRAMSize_300(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension)
+{
+   ULONG   FBAddr = (ULONG)HwDeviceExtension->pjVideoMemoryAddress;
+   USHORT  SR13, SR14=0, buswidth, Done;
+   SHORT   i, j, k;
+   USHORT  data, TotalCapacity, PhysicalAdrOtherPage=0;
+   ULONG   Addr;
+   UCHAR   temp;
+   int     PseudoRankCapacity, PseudoTotalCapacity, PseudoAdrPinCount;
+   int     RankCapacity, AdrPinCount, BankNumHigh, BankNumMid, MB2Bank;
+   int     PageCapacity, PhysicalAdrHigh, PhysicalAdrHalfPage;
+
+   SiSSetMode(SiS_Pr, HwDeviceExtension, 0x2e);
+
+   SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x01,0x20);        /* Turn OFF Display  */
+
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x13,0x00);
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x14,0xBF);
+
+   buswidth = SiS_ChkBUSWidth_300(SiS_Pr, FBAddr);
+
+   MB2Bank = 16;
+   Done = 0;
+   for(i=6; i>=0; i--) {
+      if(Done == 1) break;
+      PseudoRankCapacity = 1 << i;
+      for(j=4; j>=1; j--) {
+         if(Done == 1) break;
+         PseudoTotalCapacity = PseudoRankCapacity * j;
+         PseudoAdrPinCount = 15 - j;
+         if(PseudoTotalCapacity <= 64) {
+            for(k=0; k<=16; k++) {
+               if(Done == 1) break;
+               RankCapacity = buswidth * SiS_DRAMType[k][3];
+               AdrPinCount = SiS_DRAMType[k][2] + SiS_DRAMType[k][0];
+               if(RankCapacity == PseudoRankCapacity)
+                 if(AdrPinCount <= PseudoAdrPinCount) {
+                    if(j == 3) {             /* Rank No */
+                       BankNumHigh = RankCapacity * MB2Bank * 3 - 1;
+                       BankNumMid = RankCapacity * MB2Bank * 1 - 1;
+                    } else {
+                       BankNumHigh = RankCapacity * MB2Bank * j - 1;
+                       BankNumMid = RankCapacity * MB2Bank * j / 2 - 1;
+                    }
+                    PageCapacity = (1 << SiS_DRAMType[k][1]) * buswidth * 4;
+                    PhysicalAdrHigh = BankNumHigh;
+                    PhysicalAdrHalfPage = (PageCapacity / 2 + PhysicalAdrHigh) % PageCapacity;
+                    PhysicalAdrOtherPage = PageCapacity * SiS_DRAMType[k][2] + PhysicalAdrHigh;
+                    /* Write data */
+                    /*Test*/
+                    SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x15,0xFB);
+                    SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x15,0x04);
+                    /*/Test*/
+                    TotalCapacity = SiS_DRAMType[k][3] * buswidth;
+                    SR13 = SiS_DRAMType[k][4];
+                    if(buswidth == 4) SR14 = (TotalCapacity - 1) | 0x80;
+                    if(buswidth == 2) SR14 = (TotalCapacity - 1) | 0x40;
+                    if(buswidth == 1) SR14 = (TotalCapacity - 1) | 0x00;
+                    SiS_SetReg1(SiS_Pr->SiS_P3c4,0x13,SR13);
+                    SiS_SetReg1(SiS_Pr->SiS_P3c4,0x14,SR14);
+
+                    Addr = FBAddr + (BankNumHigh) * 64 * 1024 + PhysicalAdrHigh;
+                    *((USHORT *)(Addr)) = (USHORT)PhysicalAdrHigh;
+                    Addr = FBAddr + (BankNumMid) * 64 * 1024 + PhysicalAdrHigh;
+                    *((USHORT *)(Addr)) = (USHORT)BankNumMid;
+                    Addr = FBAddr + (BankNumHigh) * 64 * 1024 + PhysicalAdrHalfPage;
+                    *((USHORT *)(Addr)) = (USHORT)PhysicalAdrHalfPage;
+                    Addr = FBAddr + (BankNumHigh) * 64 * 1024 + PhysicalAdrOtherPage;
+                    *((USHORT *)(Addr)) = PhysicalAdrOtherPage;
+
+                    /* Read data */
+                    Addr = FBAddr + (BankNumHigh) * 64 * 1024 + PhysicalAdrHigh;
+                    data = *((USHORT *)(Addr));
+                    if(data == PhysicalAdrHigh) Done = 1;
+                 }  /* if struct */
+            }  /* for loop (k) */
+         }  /* if struct */
+      }  /* for loop (j) */
+   }  /* for loop (i) */
+}
+
+USHORT
+SiS_ChkBUSWidth_300(SiS_Private *SiS_Pr, ULONG FBAddress)
+{
+   PULONG  pVideoMemory;
+
+   pVideoMemory = (PULONG)FBAddress;
+
+   pVideoMemory[0] = 0x01234567L;
+   pVideoMemory[1] = 0x456789ABL;
+   pVideoMemory[2] = 0x89ABCDEFL;
+   pVideoMemory[3] = 0xCDEF0123L;
+   if (pVideoMemory[3]==0xCDEF0123L) {  /* Channel A 128bit */
+     return(4);
+   }
+   if (pVideoMemory[1]==0x456789ABL) {  /* Channel B 64bit */
+     return(2);
+   }
+   return(1);
+}
+#endif
+/* ===============  SiS 300 dram sizing end    =============== */
+
+/* ============  SiS 310/325 dram sizing begin  ============== */
+#ifdef SIS315H
+
+/* TW: Moved Get310DRAMType further down */
+
+void
+SiS_Delay15us(SiS_Private *SiS_Pr, ULONG ulMicrsoSec)
+{
+}
+
+void
+SiS_SDR_MRS(SiS_Private *SiS_Pr, )
+{
+   USHORT  data;
+
+   data = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x16);
+   data &= 0x3F;          		        /* SR16 D7=0, D6=0 */
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x16,data);   	/* enable mode register set(MRS) low */
+   SiS_Delay15us(SiS_Pr, 0x100);
+   data |= 0x80;          		        /* SR16 D7=1, D6=0 */
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x16,data);   	/* enable mode register set(MRS) high */
+   SiS_Delay15us(SiS_Pr, 0x100);
+}
+
+void
+SiS_DDR_MRS(SiS_Private *SiS_Pr)
+{
+   USHORT  data;
+
+   /* SR16 <- 1F,DF,2F,AF */
+
+   /* enable DLL of DDR SD/SGRAM , SR16 D4=1 */
+   data=SiS_GetReg1(SiS_Pr->SiS_P3c4,0x16);
+   data &= 0x0F;
+   data |= 0x10;
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x16,data);
+
+   if (!(SiS_Pr->SiS_SR15[1][SiS_Pr->SiS_RAMType] & 0x10))
+     data &= 0x0F;
+
+   /* SR16 D7=1,D6=1 */
+   data |= 0xC0;
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x16,data);
+   
+   /* SR16 D7=1,D6=0,D5=1,D4=0 */
+   data &= 0x0F;
+   data |= 0x20;
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x16,data);
+   if (!(SiS_Pr->SiS_SR15[1][SiS_Pr->SiS_RAMType] & 0x10))
+     data &= 0x0F;
+
+   /* SR16 D7=1 */
+   data |= 0x80;
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x16,data);
+}
+
+void
+SiS_SetDRAMModeRegister(SiS_Private *SiS_Pr, UCHAR *ROMAddr, PSIS_HW_DEVICE_INFO HwDeviceExtension)
+{
+    if (SiS_Get310DRAMType(ROMAddr,HwDeviceExtension) < 2)
+        SiS_SDR_MRS(SiS_Pr);
+    else
+        /* SR16 <- 0F,CF,0F,8F */
+        SiS_DDR_MRS(SiS_Pr);
+}
+
+void
+SiS_DisableRefresh(SiS_Private *SiS_Pr)
+{
+   SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x17,0xF8);
+   SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x19,0x03);
+}
+
+void
+SiS_EnableRefresh(SiS_Private *SiS_Pr, UCHAR *ROMAddr)
+{
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x17,SiS_Pr->SiS_SR15[2][SiS_Pr->SiS_RAMType]);
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x19,SiS_Pr->SiS_SR15[4][SiS_Pr->SiS_RAMType]);
+}
+
+void
+SiS_DisableChannelInterleaving(SiS_Private *SiS_Pr, int index,
+                               USHORT SiS_DDRDRAM_TYPE[][5])
+{
+   USHORT  data;
+
+   data=SiS_GetReg1(SiS_Pr->SiS_P3c4,0x15);
+   data &= 0x1F;
+   switch (SiS_DDRDRAM_TYPE[index][3])
+   {
+     case 64: data |= 0; 	break;
+     case 32: data |= 0x20;	break;
+     case 16: data |= 0x40;     break;
+     case 4:  data |= 0x60;     break;
+   }
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x15,data);
+}
+
+void
+SiS_SetDRAMSizingType(SiS_Private *SiS_Pr, int index, USHORT DRAMTYPE_TABLE[][5])
+{
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x13,DRAMTYPE_TABLE[index][4]);
+   /* should delay 50 ns */
+}
+
+void
+SiS_CheckBusWidth_310(SiS_Private *SiS_Pr, UCHAR *ROMAddress,ULONG FBAddress,
+                      PSIS_HW_DEVICE_INFO HwDeviceExtension)
+{
+   USHORT  data, temp;
+   PULONG  volatile pVideoMemory;
+
+   pVideoMemory = (PULONG)FBAddress;
+
+   if(HwDeviceExtension->jChipType == SIS_330) temp = 1;
+   else temp = 2;
+
+   if(SiS_Get310DRAMType(ROMAddress,HwDeviceExtension) < temp) {
+
+     SiS_SetReg1(SiS_Pr->SiS_P3c4,0x13,0x00);
+     if(HwDeviceExtension->jChipType != SIS_330) {
+        SiS_SetReg1(SiS_Pr->SiS_P3c4,0x14,0x12);
+     } else {
+        SiS_SetReg1(SiS_Pr->SiS_P3c4,0x14,0x02);
+     }
+     /* should delay */
+     SiS_SDR_MRS(SiS_Pr);
+
+     SiS_Pr->SiS_ChannelAB = 0;
+     SiS_Pr->SiS_DataBusWidth = 128;
+     pVideoMemory[0] = 0x01234567L;
+     pVideoMemory[1] = 0x456789ABL;
+     pVideoMemory[2] = 0x89ABCDEFL;
+     pVideoMemory[3] = 0xCDEF0123L;
+     pVideoMemory[4] = 0x55555555L;
+     pVideoMemory[5] = 0x55555555L;
+     pVideoMemory[6] = 0xFFFFFFFFL;
+     pVideoMemory[7] = 0xFFFFFFFFL;
+     if((pVideoMemory[3] != 0xCDEF0123L) || (pVideoMemory[2] != 0x89ABCDEFL)) {
+       /* Channel A 64Bit */
+       SiS_Pr->SiS_DataBusWidth = 64;
+       SiS_Pr->SiS_ChannelAB = 0;
+       SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x14, 0xFD);
+     }
+     if((pVideoMemory[1] != 0x456789ABL) || (pVideoMemory[0] != 0x01234567L)) {
+       /* Channel B 64Bit */
+       SiS_Pr->SiS_DataBusWidth = 64;
+       SiS_Pr->SiS_ChannelAB = 1;
+       SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x14,0xfd,0x01);
+     }
+     return;
+
+   } else {
+
+     /* DDR Dual channel */
+     SiS_SetReg1(SiS_Pr->SiS_P3c4,0x13,0x00);
+     SiS_SetReg1(SiS_Pr->SiS_P3c4,0x14,0x02); /* Channel A, 64bit */
+     /* should delay */
+     SiS_DDR_MRS(SiS_Pr);
+
+     SiS_Pr->SiS_ChannelAB = 0;
+     SiS_Pr->SiS_DataBusWidth = 64;
+     pVideoMemory[0] = 0x01234567L;
+     pVideoMemory[1] = 0x456789ABL;
+     pVideoMemory[2] = 0x89ABCDEFL;
+     pVideoMemory[3] = 0xCDEF0123L;
+     pVideoMemory[4] = 0x55555555L;
+     pVideoMemory[5] = 0x55555555L;
+     pVideoMemory[6] = 0xAAAAAAAAL;
+     pVideoMemory[7] = 0xAAAAAAAAL;
+
+     if (pVideoMemory[1] == 0x456789ABL) {
+       if (pVideoMemory[0] == 0x01234567L) {
+         /* Channel A 64bit */
+         return;
+       }
+     } else {
+       if (pVideoMemory[0] == 0x01234567L) {
+         /* Channel A 32bit */
+         SiS_Pr->SiS_DataBusWidth = 32;
+         SiS_SetReg1(SiS_Pr->SiS_P3c4,0x14,0x00);
+         return;
+       }
+     }
+
+     SiS_SetReg1(SiS_Pr->SiS_P3c4,0x14,0x03); /* Channel B, 64bit */
+     SiS_DDR_MRS(SiS_Pr);
+
+     SiS_Pr->SiS_ChannelAB = 1;
+     SiS_Pr->SiS_DataBusWidth = 64;
+     pVideoMemory[0] = 0x01234567L;
+     pVideoMemory[1] = 0x456789ABL;
+     pVideoMemory[2] = 0x89ABCDEFL;
+     pVideoMemory[3] = 0xCDEF0123L;
+     pVideoMemory[4] = 0x55555555L;
+     pVideoMemory[5] = 0x55555555L;
+     pVideoMemory[6] = 0xAAAAAAAAL;
+     pVideoMemory[7] = 0xAAAAAAAAL;
+     if(pVideoMemory[1] == 0x456789ABL) {
+       /* Channel B 64 */
+       if(pVideoMemory[0] == 0x01234567L) {
+         /* Channel B 64bit */
+         return;
+       } else {
+         /* error */
+       }
+     } else {
+       if(pVideoMemory[0] == 0x01234567L) {
+         /* Channel B 32 */
+         SiS_Pr->SiS_DataBusWidth = 32;
+         SiS_SetReg1(SiS_Pr->SiS_P3c4,0x14,0x01);
+       } else {
+         /* error */
+       }
+     }
+   }
+}
+
+int
+SiS_SetRank(SiS_Private *SiS_Pr, int index,UCHAR RankNo,USHORT DRAMTYPE_TABLE[][5])
+{
+  USHORT  data;
+  int RankSize;
+
+  if ((RankNo==2)&&(DRAMTYPE_TABLE[index][0]==2))
+         return 0;
+
+  RankSize = DRAMTYPE_TABLE[index][3]/2 * SiS_Pr->SiS_DataBusWidth / 32;
+
+  if (RankNo * RankSize <= 128) {
+    data = 0;
+    while((RankSize >>= 1) > 0) {
+      data += 0x10;
+    }
+    data |= (RankNo - 1) << 2;
+    data |= (SiS_Pr->SiS_DataBusWidth / 64) & 2;
+    data |= SiS_Pr->SiS_ChannelAB;
+    SiS_SetReg1(SiS_Pr->SiS_P3c4,0x14,data);
+    /* should delay */
+    SiS_SDR_MRS(SiS_Pr);
+    return 1;
+  } else
+    return 0;
+}
+
+int
+SiS_SetDDRChannel(SiS_Private *SiS_Pr, int index,UCHAR ChannelNo,
+                  USHORT DRAMTYPE_TABLE[][5])
+{
+  USHORT  data;
+  int RankSize;
+
+  RankSize = DRAMTYPE_TABLE[index][3]/2 * SiS_Pr->SiS_DataBusWidth / 32;
+  /* RankSize = DRAMTYPE_TABLE[index][3]; */
+  if (ChannelNo * RankSize <= 128) {
+    data = 0;
+    while((RankSize >>= 1) > 0) {
+      data += 0x10;
+    }
+    if(ChannelNo == 2) data |= 0x0C;
+    data |= (SiS_Pr->SiS_DataBusWidth / 32) & 2;
+    data |= SiS_Pr->SiS_ChannelAB;
+    SiS_SetReg1(SiS_Pr->SiS_P3c4,0x14,data);
+    /* should delay */
+    SiS_DDR_MRS(SiS_Pr);
+    return 1;
+  } else
+    return 0;
+}
+
+int
+SiS_CheckColumn(SiS_Private *SiS_Pr, int index,USHORT DRAMTYPE_TABLE[][5],ULONG FBAddress)
+{
+  int i;
+  ULONG Increment,Position;
+
+  /*Increment = 1<<(DRAMTYPE_TABLE[index][2] + SiS_Pr->SiS_DataBusWidth / 64 + 1); */
+  Increment = 1 << (10 + SiS_Pr->SiS_DataBusWidth / 64);
+
+  for (i=0,Position=0;i<2;i++) {
+         *((PULONG)(FBAddress + Position)) = Position;
+         Position += Increment;
+  }
+
+  for (i=0,Position=0;i<2;i++) {
+/*    if (FBAddress[Position]!=Position) */
+         if((*(PULONG)(FBAddress + Position)) != Position)
+                return 0;
+         Position += Increment;
+  }
+  return 1;
+}
+
+int
+SiS_CheckBanks(SiS_Private *SiS_Pr, int index,USHORT DRAMTYPE_TABLE[][5],ULONG FBAddress)
+{
+  int i;
+  ULONG Increment,Position;
+  Increment = 1 << (DRAMTYPE_TABLE[index][2] + SiS_Pr->SiS_DataBusWidth / 64 + 2);
+
+  for (i=0,Position=0;i<4;i++) {
+/*    FBAddress[Position]=Position; */
+    *((PULONG)(FBAddress + Position)) = Position;
+    Position += Increment;
+  }
+
+  for (i=0,Position=0;i<4;i++) {
+/*    if (FBAddress[Position]!=Position) */
+    if((*(PULONG)(FBAddress + Position)) != Position)
+      return 0;
+    Position += Increment;
+  }
+  return 1;
+}
+
+int
+SiS_CheckRank(SiS_Private *SiS_Pr, int RankNo,int index,USHORT DRAMTYPE_TABLE[][5],ULONG FBAddress)
+{
+  int i;
+  ULONG Increment,Position;
+  Increment = 1<<(DRAMTYPE_TABLE[index][2] + DRAMTYPE_TABLE[index][1] +
+                  DRAMTYPE_TABLE[index][0] + SiS_Pr->SiS_DataBusWidth / 64 + RankNo);
+
+  for (i=0,Position=0;i<2;i++) {
+/*    FBAddress[Position]=Position; */
+    *((PULONG)(FBAddress+Position))=Position;
+    /* *((PULONG)(FBAddress))=Position; */
+    Position += Increment;
+  }
+
+  for (i=0,Position=0;i<2;i++) {
+/*    if (FBAddress[Position]!=Position) */
+         if ( (*(PULONG) (FBAddress + Position)) !=Position)
+    /*if ( (*(PULONG) (FBAddress )) !=Position) */
+      return 0;
+    Position += Increment;
+  }
+  return 1;
+}
+
+int
+SiS_CheckDDRRank(SiS_Private *SiS_Pr, int RankNo,int index,USHORT DRAMTYPE_TABLE[][5],ULONG FBAddress)
+{
+  ULONG Increment,Position;
+  USHORT  data;
+
+  Increment = 1<<(DRAMTYPE_TABLE[index][2] + DRAMTYPE_TABLE[index][1] +
+                  DRAMTYPE_TABLE[index][0] + SiS_Pr->SiS_DataBusWidth / 64 + RankNo);
+
+  Increment += Increment/2;
+
+  Position =0;
+  *((PULONG)(FBAddress+Position + 0)) = 0x01234567;
+  *((PULONG)(FBAddress+Position + 1)) = 0x456789AB;
+  *((PULONG)(FBAddress+Position + 2)) = 0x55555555;
+  *((PULONG)(FBAddress+Position + 3)) = 0x55555555;
+  *((PULONG)(FBAddress+Position + 4)) = 0xAAAAAAAA;
+  *((PULONG)(FBAddress+Position + 5)) = 0xAAAAAAAA;
+
+  if ( (*(PULONG) (FBAddress + 1)) == 0x456789AB)
+    return 1;
+
+  if ( (*(PULONG) (FBAddress + 0)) == 0x01234567)
+    return 0;
+
+  data=SiS_GetReg1(SiS_Pr->SiS_P3c4,0x14);
+  data &= 0xF3;
+  data |= 0x08;
+  SiS_SetReg1(SiS_Pr->SiS_P3c4,0x14,data);
+  data=SiS_GetReg1(SiS_Pr->SiS_P3c4,0x15);
+  data += 0x20;
+  SiS_SetReg1(SiS_Pr->SiS_P3c4,0x15,data);
+
+  return 1;
+}
+
+int
+SiS_CheckRanks(SiS_Private *SiS_Pr, int RankNo,int index,USHORT DRAMTYPE_TABLE[][5],ULONG FBAddress)
+{
+  int r;
+
+  for (r=RankNo;r>=1;r--) {
+    if (!SiS_CheckRank(SiS_Pr, r, index, DRAMTYPE_TABLE, FBAddress))
+      return 0;
+  }
+  if (!SiS_CheckBanks(SiS_Pr, index, DRAMTYPE_TABLE, FBAddress))
+    return 0;
+
+  if (!SiS_CheckColumn(SiS_Pr, index, DRAMTYPE_TABLE, FBAddress))
+    return 0;
+
+  return 1;
+}
+
+int
+SiS_CheckDDRRanks(SiS_Private *SiS_Pr, int RankNo,int index,USHORT DRAMTYPE_TABLE[][5],
+                  ULONG FBAddress)
+{
+  int r;
+
+  for (r=RankNo;r>=1;r--) {
+    if (!SiS_CheckDDRRank(SiS_Pr, r,index,DRAMTYPE_TABLE,FBAddress))
+      return 0;
+  }
+  if (!SiS_CheckBanks(SiS_Pr, index,DRAMTYPE_TABLE,FBAddress))
+    return 0;
+
+  if (!SiS_CheckColumn(SiS_Pr, index,DRAMTYPE_TABLE,FBAddress))
+    return 0;
+
+  return 1;
+}
+
+int
+SiS_SDRSizing(SiS_Private *SiS_Pr, ULONG FBAddress)
+{
+  int    i;
+  UCHAR  j;
+
+  for (i=0;i<13;i++) {
+    SiS_SetDRAMSizingType(SiS_Pr, i, SiS_SDRDRAM_TYPE);
+    for (j=2;j>0;j--) {
+      if (!SiS_SetRank(SiS_Pr, i,(UCHAR) j, SiS_SDRDRAM_TYPE))
+        continue;
+      else {
+        if (SiS_CheckRanks(SiS_Pr, j,i,SiS_SDRDRAM_TYPE, FBAddress))
+          return 1;
+      }
+    }
+  }
+  return 0;
+}
+
+int
+SiS_DDRSizing(SiS_Private *SiS_Pr, ULONG FBAddress)
+{
+
+  int    i;
+  UCHAR  j;
+
+  for (i=0; i<4; i++){
+    SiS_SetDRAMSizingType(SiS_Pr, i, SiS_DDRDRAM_TYPE);
+    SiS_DisableChannelInterleaving(SiS_Pr, i, SiS_DDRDRAM_TYPE);
+    for (j=2; j>0; j--) {
+      SiS_SetDDRChannel(SiS_Pr, i, j, SiS_DDRDRAM_TYPE);
+      if (!SiS_SetRank(SiS_Pr, i, (UCHAR) j, SiS_DDRDRAM_TYPE))
+        continue;
+      else {
+        if (SiS_CheckDDRRanks(SiS_Pr, j, i, SiS_DDRDRAM_TYPE, FBAddress))
+          return 1;
+      }
+    }
+  }
+  return 0;
+}
+
+/*
+ check if read cache pointer is correct
+*/
+void
+SiS_VerifyMclk(SiS_Private *SiS_Pr, ULONG FBAddr)
+{
+   PUCHAR  pVideoMemory = (PUCHAR) FBAddr;
+   UCHAR   i, j;
+   USHORT  Temp,SR21;
+
+   pVideoMemory[0] = 0xaa;  /* alan */
+   pVideoMemory[16] = 0x55; /* note: PCI read cache is off */
+
+   if((pVideoMemory[0] != 0xaa) || (pVideoMemory[16] != 0x55)) {
+     for (i=0,j=16; i<2; i++,j+=16)  {
+       SR21 = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x21);
+       Temp = SR21 & 0xFB;           /* disable PCI post write buffer empty gating */
+       SiS_SetReg1(SiS_Pr->SiS_P3c4,0x21,Temp);
+
+       Temp = SiS_GetReg1(SiS_Pr->SiS_P3c4, 0x3C);
+       Temp |= 0x01;                 /* MCLK reset */
+       SiS_SetReg1(SiS_Pr->SiS_P3c4,0x3C,Temp);
+       Temp = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x3C);
+       Temp &= 0xFE;                 /* MCLK normal operation */
+       SiS_SetReg1(SiS_Pr->SiS_P3c4,0x3C,Temp);
+       SiS_SetReg1(SiS_Pr->SiS_P3c4,0x21,SR21);
+
+       pVideoMemory[16+j] = j;
+       if(pVideoMemory[16+j] == j) {
+         pVideoMemory[j] = j;
+         break;
+       }
+     }
+   }
+}
+
+/* TW: Is this a 315E? */
+int
+Is315E(SiS_Private *SiS_Pr)
+{
+   USHORT  data;
+
+   data = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x5F);
+   if(data & 0x10) return 1;
+   else return 0;
+}
+
+/* TW: For 315 only */
+void
+SiS_SetDRAMSize_310(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension)
+{
+   UCHAR  *ROMAddr  = HwDeviceExtension->pjVirtualRomBase;
+   ULONG   FBAddr   = (ULONG)HwDeviceExtension->pjVideoMemoryAddress;
+   USHORT  data;
+
+#ifdef SIS301	/* TW: SIS301 ??? */
+   /*SiS_SetReg1(SiS_Pr->SiS_P3d4,0x30,0x40);   */
+#endif
+#ifdef SIS302   /* TW: SIS302 ??? */
+   SiS_SetReg1(SiS_Pr->SiS_P3d4,0x30,0x4D);  /* alan,should change value */
+   SiS_SetReg1(SiS_Pr->SiS_P3d4,0x31,0xc0);  /* alan,should change value */
+   SiS_SetReg1(SiS_Pr->SiS_P3d4,0x34,0x3F);  /* alan,should change value */
+#endif
+
+   SiSSetMode(SiS_Pr, HwDeviceExtension, 0x2e);
+
+   data = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x21);
+   SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x21,0xDF);                 /* disable read cache */
+
+   SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x01,0x20);                  /* Turn OFF Display */
+
+   SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x16,0x0F);                  /* assume lowest speed DRAM */
+
+   SiS_SetDRAMModeRegister(SiS_Pr, ROMAddr, HwDeviceExtension);
+   SiS_DisableRefresh(SiS_Pr);
+   SiS_CheckBusWidth_310(SiS_Pr, ROMAddr, FBAddr, HwDeviceExtension);
+
+   SiS_VerifyMclk(SiS_Pr, FBAddr);
+
+   if(HwDeviceExtension->jChipType == SIS_330) temp = 1;
+   else temp = 2;
+
+   if(SiS_Get310DRAMType(SiS_Pr, ROMAddr, HwDeviceExtension) < temp)
+     SiS_SDRSizing(SiS_Pr, FBAddr);
+   else
+     SiS_DDRSizing(SiS_Pr, FBAddr);
+
+   if(HwDeviceExtension->jChipType != SIS_330) {
+     if(Is315E(SiS_Pr)) {
+       data = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x14);
+       if((data & 0x0C) == 0x0C) { 	/* dual channel */
+     	 if((data & 0xF0) > 0x40)
+     	   data = (data & 0x0F) | 0x40;
+       } else { 				/* single channel */
+     	 if((data & 0xF0) > 0x50)
+     	   data = (data & 0x0F) | 0x50;
+       }
+     }
+   }
+
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x16,SiS_Pr->SiS_SR15[1][SiS_Pr->SiS_RAMType]);  /* restore SR16 */
+
+   SiS_EnableRefresh(SiS_Pr, ROMAddr);
+   SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x21,0x20);      	/* enable read cache */
+}
+#endif
+
+void
+SiS_SetMemoryClock(SiS_Private *SiS_Pr, UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension)
+{
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x28,SiS_Pr->SiS_MCLKData_0[SiS_Pr->SiS_RAMType].SR28);
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x29,SiS_Pr->SiS_MCLKData_0[SiS_Pr->SiS_RAMType].SR29);
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x2A,SiS_Pr->SiS_MCLKData_0[SiS_Pr->SiS_RAMType].SR2A);
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x2E,SiS_Pr->SiS_ECLKData[SiS_Pr->SiS_RAMType].SR2E);
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x2F,SiS_Pr->SiS_ECLKData[SiS_Pr->SiS_RAMType].SR2F);
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x30,SiS_Pr->SiS_ECLKData[SiS_Pr->SiS_RAMType].SR30);
+
+#ifdef SIS315H
+   if (Is315E(SiS_Pr)) {
+     SiS_SetReg1(SiS_Pr->SiS_P3c4,0x28,0x3B); /* 143 */
+     SiS_SetReg1(SiS_Pr->SiS_P3c4,0x29,0x22);
+     SiS_SetReg1(SiS_Pr->SiS_P3c4,0x2E,0x3B); /* 143 */
+     SiS_SetReg1(SiS_Pr->SiS_P3c4,0x2F,0x22);
+   }
+#endif
+}
+
+#endif /* ifdef LINUXBIOS */
+
+#ifdef SIS315H
+UCHAR
+SiS_Get310DRAMType(SiS_Private *SiS_Pr, UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension)
+{
+   UCHAR data, temp;
+
+   if(*SiS_Pr->pSiS_SoftSetting & SoftDRAMType) {
+     data = *SiS_Pr->pSiS_SoftSetting & 0x03;
+   } else {
+     if((HwDeviceExtension->jChipType > SIS_315PRO) &&
+        (HwDeviceExtension->jChipType < SIS_330)) {
+        data = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x13) & 0x07;
+     } else {	/* TW: 315, 330 */
+        data = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x3a) & 0x03;
+        if(HwDeviceExtension->jChipType == SIS_330) {
+	   if(data > 1) {
+	      temp = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x5f) & 0x30;
+	      switch(temp) {
+	      case 0x00: data = 1; break;
+	      case 0x10: data = 3; break;
+	      case 0x20: data = 3; break;
+	      case 0x30: data = 2; break;
+	      }
+	   } else {
+	      data = 0;
+	   }
+	}
+     }
+   }
+
+   return data;
+}
+#endif
+
+/* SiSInit END */
+
+/* ----------------------------------------- */
+
+void SiSRegInit(SiS_Private *SiS_Pr, USHORT BaseAddr)
+{
+   SiS_Pr->SiS_P3c4 = BaseAddr + 0x14;
+   SiS_Pr->SiS_P3d4 = BaseAddr + 0x24;
+   SiS_Pr->SiS_P3c0 = BaseAddr + 0x10;
+   SiS_Pr->SiS_P3ce = BaseAddr + 0x1e;
+   SiS_Pr->SiS_P3c2 = BaseAddr + 0x12;
+   SiS_Pr->SiS_P3ca = BaseAddr + 0x1a;
+   SiS_Pr->SiS_P3c6 = BaseAddr + 0x16;
+   SiS_Pr->SiS_P3c7 = BaseAddr + 0x17;
+   SiS_Pr->SiS_P3c8 = BaseAddr + 0x18;
+   SiS_Pr->SiS_P3c9 = BaseAddr + 0x19;
+   SiS_Pr->SiS_P3da = BaseAddr + 0x2A;
+   SiS_Pr->SiS_Part1Port = BaseAddr + SIS_CRT2_PORT_04;   /* Digital video interface registers (LCD) */
+   SiS_Pr->SiS_Part2Port = BaseAddr + SIS_CRT2_PORT_10;   /* 301 TV Encoder registers */
+   SiS_Pr->SiS_Part3Port = BaseAddr + SIS_CRT2_PORT_12;   /* 301 Macrovision registers */
+   SiS_Pr->SiS_Part4Port = BaseAddr + SIS_CRT2_PORT_14;   /* 301 VGA2 (and LCD) registers */
+   SiS_Pr->SiS_Part5Port = BaseAddr + SIS_CRT2_PORT_14+2; /* 301 palette address port registers */
+   SiS_Pr->SiS_DDC_Port = BaseAddr + 0x14;                /* DDC Port ( = P3C4, SR11/0A) */
+}
+
+void
+SiSInitPCIetc(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension)
+{
+/* #ifdef LINUX_XF86 */
+   if ((HwDeviceExtension->jChipType == SIS_540)||
+       (HwDeviceExtension->jChipType == SIS_630)||
+       (HwDeviceExtension->jChipType == SIS_730)||
+       (HwDeviceExtension->jChipType == SIS_300)) {
+       /* TW: Set - PCI LINEAR ADDRESSING ENABLE (0x80)
+		  - PCI IO ENABLE  (0x20)
+		  - MMIO ENABLE (0x1)
+  	*/
+       SiS_SetReg1(SiS_Pr->SiS_P3c4,0x20,0xa1);
+       /* TW: Enable 2D (0x42) & 3D accelerator (0x18) */
+       SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x1E,0xFF,0x5A);
+   }
+   if((HwDeviceExtension->jChipType == SIS_315H)||
+      (HwDeviceExtension->jChipType == SIS_315) ||
+      (HwDeviceExtension->jChipType == SIS_315PRO)||
+      (HwDeviceExtension->jChipType == SIS_550) ||
+      (HwDeviceExtension->jChipType == SIS_650) ||
+      (HwDeviceExtension->jChipType == SIS_740) ||
+      (HwDeviceExtension->jChipType == SIS_330)) {
+      /* TW: This seems to be done the same way on these chipsets */
+      SiS_SetReg1(SiS_Pr->SiS_P3c4,0x20,0xa1);
+      SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x1E,0xFF,0x5A);
+   }
+/* #endif */
+}
+
+void
+SiSSetLVDSetc(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT ModeNo)
+{
+   ULONG   temp;
+
+   SiS_Pr->SiS_IF_DEF_LVDS = 0;
+   SiS_Pr->SiS_IF_DEF_TRUMPION = 0;
+   SiS_Pr->SiS_IF_DEF_CH70xx = 0;
+   SiS_Pr->SiS_IF_DEF_HiVision = 0;
+   SiS_Pr->SiS_IF_DEF_DSTN = 0;
+   SiS_Pr->SiS_IF_DEF_FSTN = 0;
+
+   SiS_Pr->SiS_ChrontelInit = 0;
+
+   if((ModeNo == 0x5a) || (ModeNo == 0x5b)) {
+   	SiS_Pr->SiS_IF_DEF_DSTN = 1;   /* for 550 dstn */
+   	SiS_Pr->SiS_IF_DEF_FSTN = 1;   /* for fstn */
+   }
+
+#ifdef SIS300
+   if((HwDeviceExtension->jChipType == SIS_540) ||
+      (HwDeviceExtension->jChipType == SIS_630) ||
+      (HwDeviceExtension->jChipType == SIS_730))
+    {
+        /* TW: Check for SiS30x first */
+        temp = SiS_GetReg1(SiS_Pr->SiS_Part4Port,0x00);
+	if((temp == 1) || (temp == 2)) return;
+      	temp = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x37);
+      	temp = (temp & 0x0E) >> 1;
+      	if((temp >= 2) && (temp <= 5)) SiS_Pr->SiS_IF_DEF_LVDS = 1;
+      	if(temp == 3)   SiS_Pr->SiS_IF_DEF_TRUMPION = 1;
+      	if((temp == 4) || (temp == 5)) {
+		/* TW: Save power status (and error check) - UNUSED */
+		SiS_Pr->SiS_Backup70xx = SiS_GetCH700x(SiS_Pr, 0x0e);
+		SiS_Pr->SiS_IF_DEF_CH70xx = 1;
+        }
+   }
+#endif
+#ifdef SIS315H
+   if((HwDeviceExtension->jChipType == SIS_550) ||
+      (HwDeviceExtension->jChipType == SIS_650) ||
+      (HwDeviceExtension->jChipType == SIS_740) ||
+      (HwDeviceExtension->jChipType == SIS_330))
+    {
+        /* TW: CR37 is different on 310/325 series */
+        if(SiS_Pr->SiS_IF_DEF_FSTN)                       /* fstn: set CR37=0x04 */
+             SiS_SetReg1(SiS_Pr->SiS_P3d4,0x37,0x04);      /* (fake LVDS bridge) */
+
+	temp=SiS_GetReg1(SiS_Pr->SiS_P3d4,0x37);
+      	temp = (temp & 0x0E) >> 1;
+      	if((temp >= 2) && (temp <= 3)) SiS_Pr->SiS_IF_DEF_LVDS = 1;
+      	if(temp == 3)  {
+			SiS_Pr->SiS_IF_DEF_CH70xx = 2;
+        }
+	
+	/* HiVision (HDTV) is done differently now. */
+	/* SiS_Pr->SiS_IF_DEF_HiVision = 1; */
+    }
+#endif
+}
+
+void
+SiSInitPtr(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension)
+{
+#ifdef SIS315H
+   if((HwDeviceExtension->jChipType == SIS_315H) ||
+      (HwDeviceExtension->jChipType == SIS_315) ||
+      (HwDeviceExtension->jChipType == SIS_315PRO) ||
+      (HwDeviceExtension->jChipType == SIS_550) ||
+      (HwDeviceExtension->jChipType == SIS_650) ||
+      (HwDeviceExtension->jChipType == SIS_740) ||
+      (HwDeviceExtension->jChipType == SIS_330))
+     InitTo310Pointer(SiS_Pr, HwDeviceExtension);
+#endif
+
+#ifdef SIS300
+   if ((HwDeviceExtension->jChipType == SIS_540) ||
+       (HwDeviceExtension->jChipType == SIS_630) ||
+       (HwDeviceExtension->jChipType == SIS_730) ||
+       (HwDeviceExtension->jChipType == SIS_300))
+     InitTo300Pointer(SiS_Pr, HwDeviceExtension);
+#endif
+}
+
+void
+SiSDetermineROMUsage(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, UCHAR *ROMAddr)
+{
+   if((ROMAddr) && (HwDeviceExtension->UseROM)) {
+     if((ROMAddr[0x00] != 0x55) || (ROMAddr[0x01] != 0xAA)) {
+        SiS_Pr->SiS_UseROM = FALSE;
+     } else if(HwDeviceExtension->jChipType == SIS_300) {
+        /* TW: 300: We check if the code starts below 0x220 by
+	 *     checking the jmp instruction at the beginning
+	 *     of the BIOS image.
+	 */
+	 if((ROMAddr[3] == 0xe9) &&
+	    ((ROMAddr[5] << 8) | ROMAddr[4]) > 0x21a)
+	      SiS_Pr->SiS_UseROM = TRUE;
+	 else SiS_Pr->SiS_UseROM = FALSE;
+     } else if(HwDeviceExtension->jChipType < SIS_315H) {
+        /* TW: Rest of 300 series: We don't use the ROM image if
+	 *     the BIOS version < 2.0.0 as such old BIOSes don't
+	 *     have the needed data at the expected locations.
+	 */
+        if(ROMAddr[0x06] < '2')  SiS_Pr->SiS_UseROM = FALSE;
+	else                     SiS_Pr->SiS_UseROM = TRUE;
+     } else {
+        /* TW: 310/325/330 series stick to the standard */
+	SiS_Pr->SiS_UseROM = TRUE;
+     }
+   } else SiS_Pr->SiS_UseROM = FALSE;
+
+}
+
+/*
+ 	=========================================
+ 	======== SiS SetMode Functions ==========
+ 	=========================================
+*/
+#ifdef LINUX_XF86
+/* TW: This is used for non-Dual-Head mode from X */
+BOOLEAN
+SiSBIOSSetMode(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, ScrnInfoPtr pScrn,
+               DisplayModePtr mode, BOOLEAN IsCustom)
+{
+   SISPtr  pSiS = SISPTR(pScrn);
+   UShort  ModeNo=0;
+   
+   SiS_Pr->UseCustomMode = FALSE;
+
+   if((IsCustom) && (SiS_CheckBuildCustomMode(pScrn, mode, pSiS->VBFlags))) {
+   
+         xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3, "Setting custom mode %dx%d\n", 
+	 	SiS_Pr->CHDisplay, SiS_Pr->CVDisplay);
+		
+	 return(SiSSetMode(SiS_Pr, HwDeviceExtension, pScrn, ModeNo, TRUE));
+   
+   }
+   
+   ModeNo = SiS_CalcModeIndex(pScrn, mode);
+   if(!ModeNo) return FALSE;
+
+   xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3, "Setting mode 0x%x\n", ModeNo);
+
+   return(SiSSetMode(SiS_Pr, HwDeviceExtension, pScrn, ModeNo, TRUE));   
+}
+
+#ifdef SISDUALHEAD
+/* TW: Set CRT1 mode (used for dual head) */
+BOOLEAN
+SiSBIOSSetModeCRT1(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, ScrnInfoPtr pScrn,
+               DisplayModePtr mode, BOOLEAN IsCustom)
+{
+   ULONG   temp;
+   USHORT  ModeIdIndex;
+   UCHAR  *ROMAddr  = HwDeviceExtension->pjVirtualRomBase;
+   USHORT  BaseAddr = (USHORT)HwDeviceExtension->ulIOAddress;
+   SISPtr  pSiS = SISPTR(pScrn);
+   SISEntPtr pSiSEnt = pSiS->entityPrivate;
+   unsigned char backupreg=0;
+   BOOLEAN backupcustom;
+
+   UShort  ModeNo=0;
+   
+   SiS_Pr->UseCustomMode = FALSE;
+   
+   if((IsCustom) && (SiS_CheckBuildCustomMode(pScrn, mode, pSiS->VBFlags))) {
+   
+         xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3,
+	 	"Setting custom mode %dx%d in CRT1\n", 
+	 	SiS_Pr->CHDisplay, SiS_Pr->CVDisplay);
+	 ModeNo = 0xfe;
+	 
+   } else {
+
+         ModeNo = SiS_CalcModeIndex(pScrn, mode);
+         if(!ModeNo) return FALSE;
+
+         xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3,
+	 	"Setting mode 0x%x on CRT1\n", ModeNo);
+   }
+
+   SiSInitPtr(SiS_Pr, HwDeviceExtension);
+
+   SiSRegInit(SiS_Pr, BaseAddr);
+
+   SiS_Pr->SiS_VGAINFO = SiS_GetSetBIOSScratch(pScrn, 0x489, 0xff);
+
+   SiSInitPCIetc(SiS_Pr, HwDeviceExtension);
+
+   SiSSetLVDSetc(SiS_Pr, HwDeviceExtension, ModeNo);
+
+   SiSDetermineROMUsage(SiS_Pr, HwDeviceExtension, ROMAddr);
+
+   /* TW: We don't clear the buffer under X */
+   SiS_Pr->SiS_flag_clearbuffer = 0;
+
+   /* 1.Openkey */
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x05,0x86);
+
+   SiS_UnLockCRT2(SiS_Pr, HwDeviceExtension, BaseAddr);
+
+   if(!SiS_Pr->UseCustomMode) {
+      /* 2.Get ModeID Table  */
+      temp = SiS_SearchModeID(SiS_Pr, ROMAddr,&ModeNo,&ModeIdIndex);
+      if(temp == 0)  return(0);
+   } else {
+      ModeIdIndex = 0;
+   }
+
+   /* TW: Determine VBType (301,301B,301LV,302B,302LV) */
+   SiS_GetVBType(SiS_Pr, BaseAddr,HwDeviceExtension);
+
+   if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
+      if(HwDeviceExtension->jChipType >= SIS_315H) {
+         backupreg = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x38);
+      } else {
+         backupreg = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x35);
+      }
+   }
+
+   SiS_SetHiVision(SiS_Pr, BaseAddr,HwDeviceExtension);
+
+   /* TW: Get VB information (connectors, connected devices) */
+   /* (We don't care if the current mode is a CRT2 mode) */
+   SiS_GetVBInfo(SiS_Pr, BaseAddr,ROMAddr,ModeNo,ModeIdIndex,HwDeviceExtension,0);
+   SiS_GetLCDResInfo(SiS_Pr, ROMAddr,ModeNo,ModeIdIndex,HwDeviceExtension);
+
+   if(HwDeviceExtension->jChipType >= SIS_315H) {
+      if(SiS_GetReg1(SiS_Pr->SiS_P3c4,0x17) & 0x08)  {
+          /* TW: I am not sure the flag's name is correct */
+          if(ModeNo != 0x10)  SiS_Pr->SiS_SetFlag |= CRT2IsVGA;
+      }
+
+      /* TW: New from 650/LV 1.10.6x */
+      if(IS_SIS650740) {
+          if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
+	      SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x51,0x1f);
+	      SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x56,0xe7);
+	  }
+      }
+   }
+
+   /* TW: Set mode on CRT1 */
+   SiS_SetCRT1Group(SiS_Pr, ROMAddr,HwDeviceExtension,ModeNo,ModeIdIndex,BaseAddr);
+
+   pSiSEnt->CRT1ModeNo = ModeNo;
+   pSiSEnt->CRT1DMode = mode;
+
+   /* TW: SetPitch: Adapt to virtual size & position */
+   SiS_SetPitchCRT1(SiS_Pr, pScrn, BaseAddr);
+
+   /* We have to reset CRT2 if changing mode on CRT1 */
+   if(pSiSEnt->CRT2ModeNo != -1) {
+        xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3,
+				"(Re-)Setting mode 0x%x on CRT2\n",
+				pSiSEnt->CRT2ModeNo);
+	backupcustom = SiS_Pr->UseCustomMode;
+	if(SiS_Pr->UseCustomMode) {
+	   SiS_Pr->CRT1UsesCustomMode = TRUE;
+	} else {
+	   SiS_Pr->CRT1UsesCustomMode = FALSE;
+	}
+	SiSBIOSSetModeCRT2(SiS_Pr, HwDeviceExtension, pSiSEnt->pScrn_1,
+				pSiSEnt->CRT2DMode);
+	SiS_Pr->UseCustomMode = backupcustom;
+	SiS_Pr->CRT1UsesCustomMode = FALSE;
+   }
+
+   if(IS_SIS650740) {    /* TW: *** For 650 only! *** */
+      SiS_HandleCRT1(SiS_Pr);
+   }
+
+   SiS_DisplayOn(SiS_Pr);
+   SiS_SetReg3(SiS_Pr->SiS_P3c6,0xFF);
+
+   /* TW: New from 650/LV 1.10.6x and 1.10.7w, 630/301B 2.06.50 */
+   if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
+      if(HwDeviceExtension->jChipType >= SIS_315H) {
+	 SiS_SetReg1(SiS_Pr->SiS_P3d4,0x38,backupreg);
+      } else if((HwDeviceExtension->jChipType == SIS_630) ||
+                (HwDeviceExtension->jChipType == SIS_730)) {
+         SiS_SetReg1(SiS_Pr->SiS_P3d4,0x35,backupreg);
+      }
+   }
+
+   /* Backup/Set ModeNo in BIOS scratch area */
+   SiS_GetSetModeID(pScrn,ModeNo);
+
+   return TRUE;
+}
+
+/* TW: Set CRT2 mode (used for dual head) */
+BOOLEAN
+SiSBIOSSetModeCRT2(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, ScrnInfoPtr pScrn,
+               DisplayModePtr mode)
+{
+   ULONG   temp;
+   USHORT  ModeIdIndex;
+   UCHAR  *ROMAddr  = HwDeviceExtension->pjVirtualRomBase;
+   USHORT  BaseAddr = (USHORT)HwDeviceExtension->ulIOAddress;
+   UShort  ModeNo   = 0;
+   SISPtr  pSiS     = SISPTR(pScrn);
+   SISEntPtr pSiSEnt = pSiS->entityPrivate;
+   unsigned char tempr1, tempr2, backupreg=0;
+   
+   SiS_Pr->UseCustomMode = FALSE;
+   
+   ModeNo = SiS_CalcModeIndex(pScrn, mode);
+   if(!ModeNo) return FALSE;
+
+   SiSInitPtr(SiS_Pr, HwDeviceExtension);
+
+   SiSRegInit(SiS_Pr, BaseAddr);
+
+   SiS_Pr->SiS_VGAINFO = SiS_GetSetBIOSScratch(pScrn, 0x489, 0xff);
+
+   SiSInitPCIetc(SiS_Pr, HwDeviceExtension);
+
+   SiSSetLVDSetc(SiS_Pr, HwDeviceExtension, ModeNo);
+
+   SiSDetermineROMUsage(SiS_Pr, HwDeviceExtension, ROMAddr);
+
+   /* TW: We don't clear the buffer under X */
+   SiS_Pr->SiS_flag_clearbuffer=0;
+
+   /* TW: Save ModeNo so we can set it from within SetMode for CRT1 */
+   pSiSEnt->CRT2ModeNo = ModeNo;
+   pSiSEnt->CRT2DMode = mode;
+
+   /* TW: We can't set CRT2 mode before CRT1 mode is set */
+   if(pSiSEnt->CRT1ModeNo == -1) {
+   	xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3,
+		"Setting CRT2 mode delayed until after setting CRT1 mode\n");
+   	return TRUE;
+   }
+
+   xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3,
+   		"Setting mode 0x%x on CRT2\n", ModeNo);
+
+   /* 1.Openkey */
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x05,0x86);
+
+   SiS_UnLockCRT2(SiS_Pr, HwDeviceExtension, BaseAddr);
+
+   /* 2.Get ModeID */
+   temp = SiS_SearchModeID(SiS_Pr, ROMAddr,&ModeNo,&ModeIdIndex);
+   if(temp == 0)  return(0);
+
+   /* TW: Determine VBType (301,301B,301LV,302B,302LV) */
+   SiS_GetVBType(SiS_Pr, BaseAddr,HwDeviceExtension);
+
+   if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
+      if(HwDeviceExtension->jChipType >= SIS_315H) {
+         SiS_UnLockCRT2(SiS_Pr,HwDeviceExtension,BaseAddr);
+	 if(HwDeviceExtension->jChipType < SIS_330) {
+           if(ROMAddr && SiS_Pr->SiS_UseROM) {
+             temp = ROMAddr[VB310Data_1_2_Offset];
+	     temp |= 0x40;
+             SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x02,temp);
+           }
+	 }
+	 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x32,0x10);
+
+	 SiS_SetRegOR(SiS_Pr->SiS_Part2Port,0x02,0x0c);
+
+         backupreg = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x38);
+      } else {
+         backupreg = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x35);
+      }
+   }
+
+   /* TW: Get VB information (connectors, connected devices) */
+   SiS_SetHiVision(SiS_Pr, BaseAddr,HwDeviceExtension);
+   SiS_GetVBInfo(SiS_Pr, BaseAddr,ROMAddr,ModeNo,ModeIdIndex,HwDeviceExtension,1);
+   SiS_GetLCDResInfo(SiS_Pr, ROMAddr,ModeNo,ModeIdIndex,HwDeviceExtension);
+
+   if(HwDeviceExtension->jChipType >= SIS_315H) {
+      if(SiS_GetReg1(SiS_Pr->SiS_P3c4,0x17) & 0x08)  {
+          /* TW: I am not sure the flag's name is correct */
+          if(ModeNo != 0x10)  SiS_Pr->SiS_SetFlag |= CRT2IsVGA;
+      }
+   }
+
+   /* Set mode on CRT2 */
+   switch (HwDeviceExtension->ujVBChipID) {
+     case VB_CHIP_301:
+     case VB_CHIP_301B:
+     case VB_CHIP_301LV:
+     case VB_CHIP_301LVX:
+     case VB_CHIP_302:
+     case VB_CHIP_302B:
+     case VB_CHIP_302LV:
+     case VB_CHIP_302LVX:
+        SiS_SetCRT2Group301(SiS_Pr, BaseAddr,ROMAddr,ModeNo,HwDeviceExtension);
+        break;
+     case VB_CHIP_303:
+        break;
+     case VB_CHIP_UNKNOWN:
+        if (SiS_Pr->SiS_IF_DEF_LVDS     == 1 ||
+	    SiS_Pr->SiS_IF_DEF_CH70xx   != 0 ||
+	    SiS_Pr->SiS_IF_DEF_TRUMPION != 0) {
+             	SiS_SetCRT2Group301(SiS_Pr,BaseAddr,ROMAddr,ModeNo,HwDeviceExtension);
+  	}
+        break;
+   }
+
+   SiS_DisplayOn(SiS_Pr);
+   SiS_SetReg3(SiS_Pr->SiS_P3c6,0xFF);
+
+   if(HwDeviceExtension->jChipType >= SIS_315H) {
+      if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
+         if(!(SiS_IsDualEdge(SiS_Pr, HwDeviceExtension, BaseAddr))) {
+	     SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x13,0xfb);
+	 }
+      }
+   }
+
+   /* TW: New from 650/LV 1.10.6x and 1.10.7w, 630 2.06.50 */
+   if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
+      if(HwDeviceExtension->jChipType >= SIS_315H) {
+	 if(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr)) {
+	     SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x35,0x01);
+	 } else {
+	     SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x35,0xFE);
+	 }
+
+	 SiS_SetReg1(SiS_Pr->SiS_P3d4,0x38,backupreg);
+
+	 tempr1 = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x30);
+	 tempr2 = SiS_GetReg1(SiS_Pr->SiS_Part2Port,0x00);
+	 if(tempr1 & SetCRT2ToAVIDEO) tempr2 &= 0xF7;
+	 if(tempr1 & SetCRT2ToSVIDEO) tempr2 &= 0xFB;
+	 SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x00,tempr2);
+
+	 if(tempr1 & SetCRT2ToLCD) {
+	       SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x38,0xfc);
+	 }
+      } else if((HwDeviceExtension->jChipType == SIS_630) ||
+                (HwDeviceExtension->jChipType == SIS_730)) {
+         SiS_SetReg1(SiS_Pr->SiS_P3d4,0x35,backupreg);
+      }
+   }
+
+   /* TW: SetPitch: Adapt to virtual size & position */
+   SiS_SetPitchCRT2(SiS_Pr, pScrn, BaseAddr);
+
+   return TRUE;
+}
+#endif /* Dualhead */
+#endif /* Linux_XF86 */
+
+#ifdef LINUX_XF86
+/* TW: We need pScrn for setting the pitch correctly */
+BOOLEAN
+SiSSetMode(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,ScrnInfoPtr pScrn,USHORT ModeNo, BOOLEAN dosetpitch)
+#else
+BOOLEAN
+SiSSetMode(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT ModeNo)
+#endif
+{
+   ULONG   temp;
+   USHORT  ModeIdIndex,KeepLockReg;
+   UCHAR  *ROMAddr  = HwDeviceExtension->pjVirtualRomBase;
+   USHORT  BaseAddr = (USHORT)HwDeviceExtension->ulIOAddress;
+   unsigned char backupreg=0, tempr1, tempr2;
+
+#ifndef LINUX_XF86
+   SiS_Pr->UseCustomMode = FALSE;
+   SiS_Pr->CRT1UsesCustomMode = FALSE;
+#endif
+   
+   if(SiS_Pr->UseCustomMode) {
+      ModeNo = 0xfe;
+   }      
+   
+   SiSInitPtr(SiS_Pr, HwDeviceExtension);
+
+   SiSRegInit(SiS_Pr, BaseAddr);
+
+#ifdef LINUX_XF86
+   if(pScrn) SiS_Pr->SiS_VGAINFO = SiS_GetSetBIOSScratch(pScrn, 0x489, 0xff);
+   else
+#endif
+         SiS_Pr->SiS_VGAINFO = 0x11;
+
+   SiSInitPCIetc(SiS_Pr, HwDeviceExtension);
+
+   SiSSetLVDSetc(SiS_Pr, HwDeviceExtension, ModeNo);
+
+   SiSDetermineROMUsage(SiS_Pr, HwDeviceExtension, ROMAddr);
+
+   if(!SiS_Pr->UseCustomMode) {
+      /* TW: Shift the clear-buffer-bit away */
+      ModeNo = ((ModeNo & 0x80) << 8) | (ModeNo & 0x7f);
+   }      
+
+#ifdef LINUX_XF86
+   /* TW: We never clear the buffer in X */
+   ModeNo |= 0x8000;
+#endif
+
+   if(ModeNo & 0x8000) {
+     	ModeNo &= 0x7fff;
+     	SiS_Pr->SiS_flag_clearbuffer = 0;
+   } else {
+     	SiS_Pr->SiS_flag_clearbuffer = 1;
+   }
+
+   /* 1.Openkey */
+   KeepLockReg = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x05);
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x05,0x86);
+
+   SiS_UnLockCRT2(SiS_Pr, HwDeviceExtension, BaseAddr);
+
+   if(!SiS_Pr->UseCustomMode) {
+   
+      /* 2.Get ModeID Table  */
+      temp = SiS_SearchModeID(SiS_Pr,ROMAddr,&ModeNo,&ModeIdIndex);
+      if(temp == 0) return(0);
+      
+   } else {
+   
+      ModeIdIndex = 0;
+      
+   }
+    
+   /* TW: Determine VBType (301,301B,301LV,302B,302LV) */
+   SiS_GetVBType(SiS_Pr,BaseAddr,HwDeviceExtension);
+
+   /* TW: Init/restore some VB registers */
+   if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
+       if(HwDeviceExtension->jChipType >= SIS_315H) {
+         SiS_UnLockCRT2(SiS_Pr,HwDeviceExtension,BaseAddr);
+	 if(HwDeviceExtension->jChipType < SIS_330) {
+           if(ROMAddr && SiS_Pr->SiS_UseROM) {
+             temp = ROMAddr[VB310Data_1_2_Offset];
+	     temp |= 0x40;
+             SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x02,temp);
+           }
+	 }
+	 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x32,0x10);
+
+	 SiS_SetRegOR(SiS_Pr->SiS_Part2Port,0x02,0x0c);
+
+         backupreg = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x38);
+       } else {
+         backupreg = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x35);
+       }
+   }
+   
+   /* TW: Get VB information (connectors, connected devices) */
+   SiS_SetHiVision(SiS_Pr,BaseAddr,HwDeviceExtension);
+   SiS_GetVBInfo(SiS_Pr,BaseAddr,ROMAddr,ModeNo,ModeIdIndex,HwDeviceExtension,1);
+   SiS_GetLCDResInfo(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,HwDeviceExtension);
+
+   /* 3. Check memory size */
+   temp = SiS_CheckMemorySize(SiS_Pr,ROMAddr,HwDeviceExtension,ModeNo,ModeIdIndex);
+   if(!temp) return(0);
+
+   if(HwDeviceExtension->jChipType >= SIS_315H) {
+      if(SiS_GetReg1(SiS_Pr->SiS_P3c4,0x17) & 0x08)  {
+          /* TW: I am not sure the flag's name is correct */
+          if(ModeNo != 0x10)  SiS_Pr->SiS_SetFlag |= CRT2IsVGA;
+      }
+
+      /* TW: New from 650/LV 1.10.6x */
+      if(IS_SIS650740) {
+          if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
+	      SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x51,0x1f);
+	      SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x56,0xe7);
+	  }
+      }
+   }
+
+   /* TW: Set mode on CRT1 */
+   if(SiS_Pr->SiS_VBInfo & (SetSimuScanMode | SetCRT2ToLCDA)) {
+   	SiS_SetCRT1Group(SiS_Pr,ROMAddr,HwDeviceExtension,ModeNo,ModeIdIndex,BaseAddr);
+   } else {
+     if(!(SiS_Pr->SiS_VBInfo & SwitchToCRT2)) {
+       	SiS_SetCRT1Group(SiS_Pr,ROMAddr,HwDeviceExtension,ModeNo,ModeIdIndex,BaseAddr);
+     }
+   }
+
+   /* TW: Set mode on CRT2 */
+   if(SiS_Pr->SiS_VBInfo & (SetSimuScanMode | SwitchToCRT2 | SetCRT2ToLCDA)) {
+     switch (HwDeviceExtension->ujVBChipID) {
+     case VB_CHIP_301:
+     case VB_CHIP_301B:
+     case VB_CHIP_301LV:
+     case VB_CHIP_301LVX:
+     case VB_CHIP_302:
+     case VB_CHIP_302B:
+     case VB_CHIP_302LV:
+     case VB_CHIP_302LVX:
+        SiS_SetCRT2Group301(SiS_Pr,BaseAddr,ROMAddr,ModeNo,HwDeviceExtension);
+        break;
+     case VB_CHIP_303:
+        break;
+     case VB_CHIP_UNKNOWN:
+	if(SiS_Pr->SiS_IF_DEF_LVDS     == 1 ||
+	   SiS_Pr->SiS_IF_DEF_CH70xx   != 0 ||
+	   SiS_Pr->SiS_IF_DEF_TRUMPION != 0)
+             	SiS_SetCRT2Group301(SiS_Pr,BaseAddr,ROMAddr,ModeNo,HwDeviceExtension);
+        break;
+     }
+   }
+
+   if(IS_SIS650740) {  /* TW: For 650 only! */
+      SiS_HandleCRT1(SiS_Pr);
+   }
+
+   SiS_DisplayOn(SiS_Pr);
+   SiS_SetReg3(SiS_Pr->SiS_P3c6,0xFF);
+
+   if(HwDeviceExtension->jChipType >= SIS_315H) {
+#if 0
+      if(SiS_Pr->SiS_IF_DEF_LVDS == 0) {
+         if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) {
+             SiS_Handle301B_1400x1050(SiS_Pr, ModeNo);
+	 }
+      }
+#endif
+      if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
+         if(!(SiS_IsDualEdge(SiS_Pr, HwDeviceExtension, BaseAddr))) {
+	     SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x13,0xfb);
+	 }
+      }
+   }
+
+   /* TW: New from 650/LV 1.10.6x and 1.10.7w */
+   if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
+      if(HwDeviceExtension->jChipType >= SIS_315H) {
+	 if(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr)) {
+	     SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x35,0x01);
+	 } else {
+	     SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x35,0xFE);
+	 }
+
+	 SiS_SetReg1(SiS_Pr->SiS_P3d4,0x38,backupreg);
+
+	 tempr1 = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x30);
+	 tempr2 = SiS_GetReg1(SiS_Pr->SiS_Part2Port,0x00);
+	 if(tempr1 & SetCRT2ToAVIDEO) tempr2 &= 0xF7;
+	 if(tempr1 & SetCRT2ToSVIDEO) tempr2 &= 0xFB;
+	 SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x00,tempr2);
+
+	 if((IS_SIS650740) && (SiS_GetReg1(SiS_Pr->SiS_P3d4,0x30) & 0xfc)) {
+	     if((ModeNo == 0x03) || (ModeNo == 0x10)) {
+	         SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x51,0x80);
+	         SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x56,0x08);
+             }
+	 }
+
+	 if(tempr1 & SetCRT2ToLCD) {
+/*	    if(ModeNo <= 0x13) {    - not in 1.10.8r */
+	       SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x38,0xfc);
+/*	    }   		    */
+	 }
+      } else if((HwDeviceExtension->jChipType == SIS_630) ||
+                (HwDeviceExtension->jChipType == SIS_730)) {
+         SiS_SetReg1(SiS_Pr->SiS_P3d4,0x35,backupreg);
+      }
+   }
+
+#ifdef LINUX_XF86
+   if(pScrn) {
+      /* TW: SetPitch: Adapt to virtual size & position */
+      if((ModeNo > 0x13) && (dosetpitch)) {
+         SiS_SetPitch(SiS_Pr, pScrn, BaseAddr);
+      }
+
+      /* Backup/Set ModeNo in BIOS scratch area */
+      SiS_GetSetModeID(pScrn, ModeNo);
+   }
+#endif
+
+#ifndef LINUX_XF86  /* TW: We never lock registers in XF86 */
+   if(KeepLockReg == 0xA1) SiS_SetReg1(SiS_Pr->SiS_P3c4,0x05,0x86);
+   else SiS_SetReg1(SiS_Pr->SiS_P3c4,0x05,0x00);
+#endif
+
+   return TRUE;
+}
+
+void
+SiS_SetEnableDstn(SiS_Private *SiS_Pr)	/* TW: Called from sis_main.c */
+{
+   /* For 550 dstn */
+   SiS_Pr->SiS_IF_DEF_DSTN = 1;
+}
+
+void
+SiS_HandleCRT1(SiS_Private *SiS_Pr)
+{
+  /* TW: Do this on 650 only! */
+
+  /* TW: No, we don't do this at all. There is a new
+   * CRT1-is-connected-at-boot-time logic in the 650, which
+   * confuses our own. So just clear the bit and skip the rest.
+   */
+
+  SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x63,0xbf);
+
+#if 0
+  if(!(SiS_GetReg1(SiS_Pr->SiS_P3c4,0x15) & 0x01))
+     SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x63,0x40);
+  }
+#endif
+}
+
+#if 0
+void
+SiS_Handle301B_1400x1050(SiS_Private *SiS_Pr, USHORT ModeNo)
+{
+  if(SiS_GetReg1(SiS_Pr->SiS_P3d4,0x30) & SetCRT2ToLCD) {
+     if(ModeNo <= 0x13) {
+        if(SiS_GetReg1(SiS_Pr->SiS_P3d4,0x31) & (SetNotSimuMode >> 8)) {
+	   SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x38,0xFC);
+	}
+     }
+  }
+}
+#endif
+
+void
+SiS_SetCRT1Group(SiS_Private *SiS_Pr, UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension,
+                 USHORT ModeNo,USHORT ModeIdIndex,USHORT BaseAddr)
+{
+  USHORT  StandTableIndex,RefreshRateTableIndex;
+
+  SiS_Pr->SiS_CRT1Mode = ModeNo;
+  StandTableIndex = SiS_GetModePtr(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex);
+  if(SiS_LowModeStuff(SiS_Pr,ModeNo,HwDeviceExtension)) {
+    if(SiS_Pr->SiS_VBInfo & (SetSimuScanMode | SwitchToCRT2)) {
+       SiS_DisableBridge(SiS_Pr,HwDeviceExtension,BaseAddr);
+    }
+  }
+
+  SiS_SetSeqRegs(SiS_Pr,ROMAddr,StandTableIndex);
+  SiS_SetMiscRegs(SiS_Pr,ROMAddr,StandTableIndex);
+  SiS_SetCRTCRegs(SiS_Pr,ROMAddr,HwDeviceExtension,StandTableIndex);
+  SiS_SetATTRegs(SiS_Pr,ROMAddr,StandTableIndex,HwDeviceExtension);
+  SiS_SetGRCRegs(SiS_Pr,ROMAddr,StandTableIndex);
+  SiS_ClearExt1Regs(SiS_Pr,HwDeviceExtension);
+  SiS_ResetCRT1VCLK(SiS_Pr,ROMAddr,HwDeviceExtension);
+
+  SiS_Pr->SiS_SelectCRT2Rate = 0;
+  SiS_Pr->SiS_SetFlag &= (~ProgrammingCRT2);
+
+#ifdef LINUX_XF86
+  xf86DrvMsgVerb(0, X_PROBED, 3, "(init: VBType=0x%04x, VBInfo=0x%04x)\n",
+                    SiS_Pr->SiS_VBType, SiS_Pr->SiS_VBInfo);
+#endif
+
+  if(SiS_Pr->SiS_VBInfo & SetSimuScanMode) {
+     if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
+        SiS_Pr->SiS_SetFlag |= ProgrammingCRT2;
+     }
+  }
+
+  if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) {
+	SiS_Pr->SiS_SetFlag |= ProgrammingCRT2;
+  }
+
+  RefreshRateTableIndex = SiS_GetRatePtrCRT2(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,HwDeviceExtension);
+
+  if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) {
+	SiS_Pr->SiS_SetFlag &= ~ProgrammingCRT2;
+  }
+
+  if(RefreshRateTableIndex != 0xFFFF) {
+    	SiS_SetSync(SiS_Pr,ROMAddr,RefreshRateTableIndex);
+    	SiS_SetCRT1CRTC(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,HwDeviceExtension);
+    	SiS_SetCRT1Offset(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,HwDeviceExtension);
+    	SiS_SetCRT1VCLK(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,HwDeviceExtension,RefreshRateTableIndex);
+  }
+
+#ifdef SIS300
+  if(HwDeviceExtension->jChipType == SIS_300) {
+     	SiS_SetCRT1FIFO_300(SiS_Pr,ROMAddr,ModeNo,HwDeviceExtension,RefreshRateTableIndex);
+  }
+  if((HwDeviceExtension->jChipType == SIS_630) ||
+     (HwDeviceExtension->jChipType == SIS_730) ||
+     (HwDeviceExtension->jChipType == SIS_540)) {
+     	SiS_SetCRT1FIFO_630(SiS_Pr,ROMAddr,ModeNo,HwDeviceExtension,RefreshRateTableIndex);
+  }
+#endif
+#ifdef SIS315H
+  if(HwDeviceExtension->jChipType >= SIS_315H) {
+     	SiS_SetCRT1FIFO_310(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,HwDeviceExtension);
+  }
+#endif
+
+  SiS_SetCRT1ModeRegs(SiS_Pr,ROMAddr,HwDeviceExtension,ModeNo,ModeIdIndex,RefreshRateTableIndex);
+
+  SiS_LoadDAC(SiS_Pr,HwDeviceExtension,ROMAddr,ModeNo,ModeIdIndex);
+
+#ifndef LINUX_XF86
+  if(SiS_Pr->SiS_flag_clearbuffer) {
+        SiS_ClearBuffer(SiS_Pr,HwDeviceExtension,ModeNo);
+  }
+#endif
+
+  if(!(SiS_Pr->SiS_VBInfo & (SetSimuScanMode | SwitchToCRT2 | SetCRT2ToLCDA))) {
+        SiS_LongWait(SiS_Pr);
+        SiS_DisplayOn(SiS_Pr);
+  }
+}
+
+#ifdef LINUX_XF86
+void
+SiS_SetPitch(SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, UShort BaseAddr)
+{
+   SISPtr pSiS = SISPTR(pScrn);
+
+   /* TW: We need to set pitch for CRT1 if bridge is in SlaveMode, too */
+   if( (pSiS->VBFlags & DISPTYPE_DISP1) ||
+       ( (pSiS->VBFlags & VB_VIDEOBRIDGE) &&
+         ( ((pSiS->VGAEngine == SIS_300_VGA) && (SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x00) & 0xa0) == 0x20) ||
+           ((pSiS->VGAEngine == SIS_315_VGA) && (SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x00) & 0x50) == 0x10) ) ) ) {
+   	SiS_SetPitchCRT1(SiS_Pr, pScrn, BaseAddr);
+   }
+   if (pSiS->VBFlags & DISPTYPE_DISP2) {
+   	SiS_SetPitchCRT2(SiS_Pr, pScrn, BaseAddr);
+   }
+}
+
+void
+SiS_SetPitchCRT1(SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, UShort BaseAddr)
+{
+    SISPtr pSiS = SISPTR(pScrn);
+    ULong  HDisplay,temp;
+
+    HDisplay = pSiS->scrnPitch / 8;
+    SiS_SetReg1(SiS_Pr->SiS_P3d4, 0x13, (HDisplay & 0xFF));
+    temp = (SiS_GetReg1(SiS_Pr->SiS_P3c4, 0x0E) & 0xF0) | (HDisplay>>8);
+    SiS_SetReg1(SiS_Pr->SiS_P3c4, 0x0E, temp);
+}
+
+void
+SiS_SetPitchCRT2(SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, UShort BaseAddr)
+{
+    SISPtr pSiS = SISPTR(pScrn);
+    ULong  HDisplay,temp;
+
+    HDisplay = pSiS->scrnPitch / 8;
+
+    /* Unlock CRT2 */
+    if (pSiS->VGAEngine == SIS_315_VGA)
+        SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2F, 0x01);
+    else
+        SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x24, 0x01);
+
+    SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x07, (HDisplay & 0xFF));
+    temp = (SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x09) & 0xF0) | ((HDisplay >> 8) & 0xFF);
+    SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x09, temp);
+}
+#endif
+
+/* TW: Checked against 650/301 and 630/301B BIOS */
+/* TW: Re-written for 650/301LVx 1.10.6s BIOS */
+void
+SiS_GetVBType(SiS_Private *SiS_Pr, USHORT BaseAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension)
+{
+  USHORT flag=0, rev=0, nolcd=0;
+
+  SiS_Pr->SiS_VBType = 0;
+
+  if(SiS_Pr->SiS_IF_DEF_LVDS == 1) return;
+
+  flag = SiS_GetReg1(SiS_Pr->SiS_Part4Port,0x00);
+
+  /* TW: Illegal values not welcome... */
+  if(flag > 10) return;
+
+  rev = SiS_GetReg1(SiS_Pr->SiS_Part4Port,0x01);
+
+  if (flag >= 2) {
+        SiS_Pr->SiS_VBType = VB_SIS302B;
+  } else if (flag == 1) {
+        SiS_Pr->SiS_VBType = VB_SIS301;
+        if(rev >= 0xB0) {
+            	SiS_Pr->SiS_VBType = VB_SIS301B;
+		if((HwDeviceExtension->jChipType >= SIS_315H) ||
+		   (HwDeviceExtension->jChipType == SIS_300))  {
+		    /* 650/301LV and 300/301LV use this, 630/301B does not */
+    		    nolcd = SiS_GetReg1(SiS_Pr->SiS_Part4Port,0x23);
+                    if(!(nolcd & 0x02))
+       	                SiS_Pr->SiS_VBType |= VB_NoLCD;
+		}
+        }
+  }
+  if(SiS_Pr->SiS_VBType & (VB_SIS301B | VB_SIS302B)) {
+        if(rev >= 0xD0) {
+	        SiS_Pr->SiS_VBType &= ~(VB_SIS301B | VB_SIS302B);
+          	SiS_Pr->SiS_VBType |= VB_SIS30xLV;
+		SiS_Pr->SiS_VBType &= ~(VB_NoLCD);
+		if(rev >= 0xE0) {
+		    SiS_Pr->SiS_VBType &= ~(VB_SIS30xLV);
+		    SiS_Pr->SiS_VBType |= VB_SIS30xNEW;
+		}
+        }
+  }
+}
+
+/* TW: Checked against 650/301LVx 1.10.6s */
+BOOLEAN
+SiS_SearchModeID(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT *ModeNo,USHORT *ModeIdIndex)
+{
+   UCHAR VGAINFO = SiS_Pr->SiS_VGAINFO;
+
+   if(*ModeNo <= 0x13) {
+
+      if((*ModeNo) <= 5) (*ModeNo) |= 1;
+
+      for(*ModeIdIndex=0;;(*ModeIdIndex)++) {
+         if(SiS_Pr->SiS_SModeIDTable[*ModeIdIndex].St_ModeID == (*ModeNo)) break;
+         if(SiS_Pr->SiS_SModeIDTable[*ModeIdIndex].St_ModeID == 0xFF)   return FALSE;
+      }
+
+      if(*ModeNo == 0x07) {
+          if(VGAINFO & 0x10) (*ModeIdIndex)++;   /* 400 lines */
+          /* else 350 lines */
+      }
+      if(*ModeNo <= 3) {
+         if(!(VGAINFO & 0x80)) (*ModeIdIndex)++;
+         if(VGAINFO & 0x10)    (*ModeIdIndex)++; /* 400 lines  */
+         /* else 350 lines  */
+      }
+      /* else 200 lines  */
+
+   } else {
+
+      for(*ModeIdIndex=0;;(*ModeIdIndex)++) {
+         if(SiS_Pr->SiS_EModeIDTable[*ModeIdIndex].Ext_ModeID == (*ModeNo)) break;
+         if(SiS_Pr->SiS_EModeIDTable[*ModeIdIndex].Ext_ModeID == 0xFF)      return FALSE;
+      }
+
+   }
+   return TRUE;
+}
+
+/* For SiS 300 oem util: Search VBModeID */
+BOOLEAN
+SiS_SearchVBModeID(SiS_Private *SiS_Pr, UCHAR *ROMAddr, USHORT *ModeNo)
+{
+   USHORT ModeIdIndex;
+   UCHAR VGAINFO = SiS_Pr->SiS_VGAINFO;
+
+   if(*ModeNo <= 5) *ModeNo |= 1;
+
+   for(ModeIdIndex=0; ; ModeIdIndex++) {
+        if(SiS_Pr->SiS_VBModeIDTable[ModeIdIndex].ModeID == *ModeNo) break;
+        if(SiS_Pr->SiS_VBModeIDTable[ModeIdIndex].ModeID == 0xFF)    return FALSE;
+   }
+
+   if(*ModeNo != 0x07) {
+        if(*ModeNo > 0x03) return ((BOOLEAN)ModeIdIndex);
+	if(VGAINFO & 0x80) return ((BOOLEAN)ModeIdIndex);
+	ModeIdIndex++;
+   }
+   if(VGAINFO & 0x10) ModeIdIndex++;   /* 400 lines */
+	                               /* else 350 lines */
+   return ((BOOLEAN)ModeIdIndex);
+}
+
+/* TW: Checked against 630/301B, 315 1.09 and 650/301LVx 1.10.6s BIOS */
+BOOLEAN
+SiS_CheckMemorySize(SiS_Private *SiS_Pr, UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension,
+                    USHORT ModeNo,USHORT ModeIdIndex)
+{
+  USHORT memorysize,modeflag;
+  ULONG  temp;
+
+  if(SiS_Pr->UseCustomMode) {
+     modeflag = SiS_Pr->CModeFlag;
+  } else {
+     if(ModeNo <= 0x13) {
+        modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
+     } else {
+        modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+     }
+  }
+
+  memorysize = modeflag & MemoryInfoFlag;
+  memorysize >>= MemorySizeShift;			/* Get required memory size */
+  memorysize++;
+
+  temp = GetDRAMSize(SiS_Pr, HwDeviceExtension);       	/* Get adapter memory size */
+  temp /= (1024*1024);   				/* (in MB) */
+
+  if(temp < memorysize) return(FALSE);
+  else return(TRUE);
+}
+
+UCHAR
+SiS_GetModePtr(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex)
+{
+   UCHAR index;
+
+   if(ModeNo <= 0x13) {
+     	index = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_StTableIndex;
+   } else {
+     	if(SiS_Pr->SiS_ModeType <= 0x02) index = 0x1B;    /* 02 -> ModeEGA  */
+     	else index = 0x0F;
+   }
+   return index;
+}
+
+/* TW: Checked against 300, 330, 650/LVDS (1.10.07, 1.10a) and 650/301LV BIOS */
+void
+SiS_SetSeqRegs(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT StandTableIndex)
+{
+   UCHAR SRdata;
+   USHORT i;
+
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x00,0x03);           	/* Set SR0  */
+
+   SRdata = SiS_Pr->SiS_StandTable[StandTableIndex].SR[0];
+
+   if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
+      	if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) {
+        	SRdata |= 0x01;
+        }
+   }
+   if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
+     if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) {
+       if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
+         if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
+           SRdata |= 0x01;        			/* 8 dot clock  */
+         }
+       }
+     }
+     if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
+       if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
+         SRdata |= 0x01;          			/* 8 dot clock  */
+       }
+     }
+   }
+
+   SRdata |= 0x20;                			/* screen off  */
+
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x01,SRdata);
+
+   for(i = 2; i <= 4; i++) {
+       	SRdata = SiS_Pr->SiS_StandTable[StandTableIndex].SR[i-1];
+     	SiS_SetReg1(SiS_Pr->SiS_P3c4,i,SRdata);
+   }
+}
+
+/* Checked against 300, 650/301LVx 1.10.6s and 650/LVDS 1.10.07 BIOS */
+void
+SiS_SetMiscRegs(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT StandTableIndex)
+{
+   UCHAR Miscdata;
+
+   Miscdata = SiS_Pr->SiS_StandTable[StandTableIndex].MISC;
+
+   if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
+      if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) {
+        Miscdata |= 0x0C;
+      }
+   }
+
+   SiS_SetReg3(SiS_Pr->SiS_P3c2,Miscdata);
+}
+
+/* Checked against 300, 330, 650/LVDS (1.10.07) and 650/301LVx (1.10.6s) BIOS (630 code still there!) */
+void
+SiS_SetCRTCRegs(SiS_Private *SiS_Pr, UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension,
+                USHORT StandTableIndex)
+{
+  UCHAR CRTCdata;
+  USHORT i;
+
+  SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x11,0x7f);                       /* Unlock CRTC */
+
+  for(i = 0; i <= 0x18; i++) {
+     CRTCdata = SiS_Pr->SiS_StandTable[StandTableIndex].CRTC[i];
+     SiS_SetReg1(SiS_Pr->SiS_P3d4,i,CRTCdata);                     /* Set CRTC(3d4) */
+  }
+  if( ( (HwDeviceExtension->jChipType == SIS_630) ||
+        (HwDeviceExtension->jChipType == SIS_730) )  &&
+      (HwDeviceExtension->jChipRevision >= 0x30) ) {       	   /* for 630S0 */
+    if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
+      if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToTV)) {
+        SiS_SetReg1(SiS_Pr->SiS_P3d4,0x18,0xFE);
+      }
+    }
+  }
+}
+
+/* TW: Checked against 300, 650/LVDS (1.10.07), 650/301LVx (1.10.6s) and 630/301B BIOS */
+void
+SiS_SetATTRegs(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT StandTableIndex,
+               PSIS_HW_DEVICE_INFO HwDeviceExtension)
+{
+   UCHAR ARdata;
+   USHORT i;
+
+   for(i = 0; i <= 0x13; i++) {
+    ARdata = SiS_Pr->SiS_StandTable[StandTableIndex].ATTR[i];
+#if 0
+    if((i <= 0x0f) || (i == 0x11)) {
+        if(ds:489 & 0x08) {
+	   continue;
+        }
+    }
+#endif
+    if(i == 0x13) {
+      if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
+        if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)  ARdata=0;
+      }
+      if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
+        if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) {
+          if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
+            if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) ARdata=0;
+          }
+        }
+      }
+      if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
+        if(HwDeviceExtension->jChipType >= SIS_315H) {
+	  /* TW: From 650/LVDS 1.10.07, 1.10a; 650/301LVx 1.10.6s; not in 330 BIOS */
+	  ARdata = 0;
+	} else {
+          if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
+	     ARdata=0;
+          }
+	}
+      }
+    }
+    SiS_GetReg2(SiS_Pr->SiS_P3da);                              /* reset 3da  */
+    SiS_SetReg3(SiS_Pr->SiS_P3c0,i);                            /* set index  */
+    SiS_SetReg3(SiS_Pr->SiS_P3c0,ARdata);                       /* set data   */
+   }
+   SiS_GetReg2(SiS_Pr->SiS_P3da);                               /* reset 3da  */
+   SiS_SetReg3(SiS_Pr->SiS_P3c0,0x14);                          /* set index  */
+   SiS_SetReg3(SiS_Pr->SiS_P3c0,0x00);                          /* set data   */
+
+   SiS_GetReg2(SiS_Pr->SiS_P3da);
+   SiS_SetReg3(SiS_Pr->SiS_P3c0,0x20);				/* Enable Attribute  */
+   SiS_GetReg2(SiS_Pr->SiS_P3da);
+}
+
+/* TW: Checked against 300, 330, 650/LVDS (1.10.07, 1.10a) and 650/301LV BIOS */
+void
+SiS_SetGRCRegs(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT StandTableIndex)
+{
+   UCHAR GRdata;
+   USHORT i;
+
+   for(i = 0; i <= 0x08; i++) {
+     GRdata = SiS_Pr->SiS_StandTable[StandTableIndex].GRC[i];
+     SiS_SetReg1(SiS_Pr->SiS_P3ce,i,GRdata);                    /* Set GR(3ce) */
+   }
+
+   if(SiS_Pr->SiS_ModeType > ModeVGA) {
+     SiS_SetRegAND(SiS_Pr->SiS_P3ce,0x05,0xBF);			/* 256 color disable */
+   }
+}
+
+/* TW: Checked against 650/LVDS (1.10.07, 1.10a), 650/301LVx (1.10.6s) and 630/301B BIOS */
+void
+SiS_ClearExt1Regs(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension)
+{
+  USHORT i;
+
+  for(i = 0x0A; i <= 0x0E; i++) {
+      SiS_SetReg1(SiS_Pr->SiS_P3c4,i,0x00);      /* Clear SR0A-SR0E */
+  }
+
+  /* TW: New from 330, 650/LVDS/301LV BIOSes: */
+  if(HwDeviceExtension->jChipType >= SIS_315H) {
+     SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x37,0xFE);
+  }
+}
+
+/* TW: Checked against 300, 330, 650/LVDS (1.10.07) and 650/301LV BIOS */
+void
+SiS_SetSync(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT RefreshRateTableIndex)
+{
+  USHORT sync;
+  USHORT temp;
+
+  if(SiS_Pr->UseCustomMode) {
+     sync = SiS_Pr->CInfoFlag >> 8;
+  } else {
+     sync = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag >> 8;
+  }     
+
+  sync &= 0xC0;
+  temp = 0x2F | sync;
+  SiS_SetReg3(SiS_Pr->SiS_P3c2,temp);           /* Set Misc(3c2) */
+}
+
+/* TW: Checked against 300, 330, 650/LVDS (1.10.07) and 650/301LVx (1.10.6s) BIOS */
+void
+SiS_SetCRT1CRTC(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                USHORT RefreshRateTableIndex,
+		PSIS_HW_DEVICE_INFO HwDeviceExtension)
+{
+  UCHAR  index;
+  USHORT tempah,i,modeflag,j;
+#ifdef SIS315H
+  USHORT temp;
+  USHORT ResInfo,DisplayType;
+  const SiS_LCDACRT1DataStruct *LCDACRT1Ptr = NULL;
+#endif
+
+  SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x11,0x7f);		/*unlock cr0-7  */
+
+  if(SiS_Pr->UseCustomMode) {
+     modeflag = SiS_Pr->CModeFlag;
+  } else {
+     if(ModeNo <= 0x13) {
+        modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
+     } else {
+        modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+     }
+  }     
+
+  if((SiS_Pr->SiS_IF_DEF_LVDS == 0) && (SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) {
+
+#ifdef SIS315H
+
+     /* LCDA */
+
+     temp = SiS_GetLCDACRT1Ptr(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,
+                       RefreshRateTableIndex,&ResInfo,&DisplayType);
+
+     switch(DisplayType) {
+      case Panel_800x600       : LCDACRT1Ptr = SiS_Pr->SiS_LCDACRT1800x600_1;           break;
+      case Panel_1024x768      : LCDACRT1Ptr = SiS_Pr->SiS_LCDACRT11024x768_1;          break;
+      case Panel_1280x1024     : LCDACRT1Ptr = SiS_Pr->SiS_LCDACRT11280x1024_1;         break;
+      case Panel_1400x1050     : LCDACRT1Ptr = SiS_Pr->SiS_LCDACRT11400x1050_1;         break;
+      case Panel_1600x1200     : LCDACRT1Ptr = SiS_Pr->SiS_LCDACRT11600x1200_1;         break;
+      case Panel_800x600 + 16  : LCDACRT1Ptr = SiS_Pr->SiS_LCDACRT1800x600_1_H;         break;
+      case Panel_1024x768 + 16 : LCDACRT1Ptr = SiS_Pr->SiS_LCDACRT11024x768_1_H;        break;
+      case Panel_1280x1024 + 16: LCDACRT1Ptr = SiS_Pr->SiS_LCDACRT11280x1024_1_H;       break;
+      case Panel_1400x1050 + 16: LCDACRT1Ptr = SiS_Pr->SiS_LCDACRT11400x1050_1_H;       break;
+      case Panel_1600x1200 + 16: LCDACRT1Ptr = SiS_Pr->SiS_LCDACRT11600x1200_1_H;       break;
+      case Panel_800x600 + 32  : LCDACRT1Ptr = SiS_Pr->SiS_LCDACRT1800x600_2;           break;
+      case Panel_1024x768 + 32 : LCDACRT1Ptr = SiS_Pr->SiS_LCDACRT11024x768_2;          break;
+      case Panel_1280x1024 + 32: LCDACRT1Ptr = SiS_Pr->SiS_LCDACRT11280x1024_2;         break;
+      case Panel_1400x1050 + 32: LCDACRT1Ptr = SiS_Pr->SiS_LCDACRT11400x1050_2;         break;
+      case Panel_1600x1200 + 32: LCDACRT1Ptr = SiS_Pr->SiS_LCDACRT11600x1200_2;         break;
+      case Panel_800x600 + 48  : LCDACRT1Ptr = SiS_Pr->SiS_LCDACRT1800x600_2_H;         break;
+      case Panel_1024x768 + 48 : LCDACRT1Ptr = SiS_Pr->SiS_LCDACRT11024x768_2_H;        break;
+      case Panel_1280x1024 + 48: LCDACRT1Ptr = SiS_Pr->SiS_LCDACRT11280x1024_2_H;       break;
+      case Panel_1400x1050 + 48: LCDACRT1Ptr = SiS_Pr->SiS_LCDACRT11400x1050_2_H;       break;
+      case Panel_1600x1200 + 48: LCDACRT1Ptr = SiS_Pr->SiS_LCDACRT11600x1200_2_H;       break;
+      default:                   LCDACRT1Ptr = SiS_Pr->SiS_LCDACRT11024x768_1;          break;
+     }
+
+     tempah = (LCDACRT1Ptr+ResInfo)->CR[0];
+     SiS_SetReg1(SiS_Pr->SiS_P3d4,0x00,tempah);
+     for(i=0x01,j=1;i<=0x07;i++,j++){
+       tempah = (LCDACRT1Ptr+ResInfo)->CR[j];
+       SiS_SetReg1(SiS_Pr->SiS_P3d4,i,tempah);
+     }
+     for(i=0x10,j=8;i<=0x12;i++,j++){
+       tempah = (LCDACRT1Ptr+ResInfo)->CR[j];
+       SiS_SetReg1(SiS_Pr->SiS_P3d4,i,tempah);
+     }
+     for(i=0x15,j=11;i<=0x16;i++,j++){
+       tempah =(LCDACRT1Ptr+ResInfo)->CR[j];
+       SiS_SetReg1(SiS_Pr->SiS_P3d4,i,tempah);
+     }
+     for(i=0x0A,j=13;i<=0x0C;i++,j++){
+       tempah = (LCDACRT1Ptr+ResInfo)->CR[j];
+       SiS_SetReg1(SiS_Pr->SiS_P3c4,i,tempah);
+     }
+
+     tempah = (LCDACRT1Ptr+ResInfo)->CR[16];
+     tempah &= 0x0E0;
+     SiS_SetReg1(SiS_Pr->SiS_P3c4,0x0E,tempah);
+
+     tempah = (LCDACRT1Ptr+ResInfo)->CR[16];
+     tempah &= 0x01;
+     tempah <<= 5;
+     if(modeflag & DoubleScanMode)  tempah |= 0x080;
+     SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x09,~0x020,tempah);
+
+#endif
+
+  } else {
+
+     /* LVDS, 301, 301B, 301LV, 302LV, ... (non-LCDA) */
+
+     if(SiS_Pr->UseCustomMode) {
+     
+        for(i=0,j=0;i<=07;i++,j++) {
+          SiS_SetReg1(SiS_Pr->SiS_P3d4,j,SiS_Pr->CCRT1CRTC[i]);
+        }
+        for(j=0x10;i<=10;i++,j++) {
+          SiS_SetReg1(SiS_Pr->SiS_P3d4,j,SiS_Pr->CCRT1CRTC[i]);
+        }
+        for(j=0x15;i<=12;i++,j++) {
+          SiS_SetReg1(SiS_Pr->SiS_P3d4,j,SiS_Pr->CCRT1CRTC[i]);
+        }
+        for(j=0x0A;i<=15;i++,j++) {
+          SiS_SetReg1(SiS_Pr->SiS_P3c4,j,SiS_Pr->CCRT1CRTC[i]);
+        }
+
+        tempah = SiS_Pr->CCRT1CRTC[16] & 0xE0;
+        SiS_SetReg1(SiS_Pr->SiS_P3c4,0x0E,tempah);
+
+        tempah = SiS_Pr->CCRT1CRTC[16];
+        tempah &= 0x01;
+        tempah <<= 5;
+        if(modeflag & DoubleScanMode)  tempah |= 0x80;
+        SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x09,0xDF,tempah);
+     
+     
+     } else {
+     
+        index = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC;  	/* Get index */
+#if 0   /* Not any longer... */     
+        if(HwDeviceExtension->jChipType < SIS_315H) {
+           index &= 0x3F;
+        }
+#endif
+
+        for(i=0,j=0;i<=07;i++,j++) {
+          tempah=SiS_Pr->SiS_CRT1Table[index].CR[i];
+          SiS_SetReg1(SiS_Pr->SiS_P3d4,j,tempah);
+        }
+        for(j=0x10;i<=10;i++,j++) {
+          tempah=SiS_Pr->SiS_CRT1Table[index].CR[i];
+          SiS_SetReg1(SiS_Pr->SiS_P3d4,j,tempah);
+        }
+        for(j=0x15;i<=12;i++,j++) {
+          tempah=SiS_Pr->SiS_CRT1Table[index].CR[i];
+          SiS_SetReg1(SiS_Pr->SiS_P3d4,j,tempah);
+        }
+        for(j=0x0A;i<=15;i++,j++) {
+          tempah=SiS_Pr->SiS_CRT1Table[index].CR[i];
+          SiS_SetReg1(SiS_Pr->SiS_P3c4,j,tempah);
+        }
+
+        tempah = SiS_Pr->SiS_CRT1Table[index].CR[16];
+        tempah &= 0xE0;
+        SiS_SetReg1(SiS_Pr->SiS_P3c4,0x0E,tempah);
+
+        tempah = SiS_Pr->SiS_CRT1Table[index].CR[16];
+        tempah &= 0x01;
+        tempah <<= 5;
+        if(modeflag & DoubleScanMode)  tempah |= 0x80;
+        SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x09,0xDF,tempah);
+
+     }
+  }
+
+  if(SiS_Pr->SiS_ModeType > ModeVGA) SiS_SetReg1(SiS_Pr->SiS_P3d4,0x14,0x4F);
+}
+
+BOOLEAN
+SiS_GetLCDACRT1Ptr(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+		   USHORT RefreshRateTableIndex,USHORT *ResInfo,
+		   USHORT *DisplayType)
+ {
+  USHORT tempbx=0,modeflag=0;
+  USHORT CRT2CRTC=0;
+
+  if(ModeNo <= 0x13) {
+  	modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
+  	CRT2CRTC = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC;
+  } else {
+  	modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+  	CRT2CRTC = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
+  }
+
+  tempbx = SiS_Pr->SiS_LCDResInfo;
+
+  if(SiS_Pr->SiS_LCDInfo & LCDNonExpanding) tempbx += 32;
+  if(modeflag & HalfDCLK)                   tempbx += 16;
+
+  *ResInfo = CRT2CRTC & 0x3F;
+  *DisplayType = tempbx;
+
+  return 1;
+}
+
+/* TW: Set offset and pitch - partly overruled by SetPitch() in XF86 */
+/* TW: Checked against 330, 650/LVDS (1.10.07), 650/301LV and 315 BIOS */
+void
+SiS_SetCRT1Offset(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                  USHORT RefreshRateTableIndex,
+		  PSIS_HW_DEVICE_INFO HwDeviceExtension)
+{
+   USHORT temp, DisplayUnit, infoflag;
+
+   if(SiS_Pr->UseCustomMode) {
+      infoflag = SiS_Pr->CInfoFlag;
+   } else {
+      infoflag = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag;
+   }
+   
+   DisplayUnit = SiS_GetOffset(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,
+                     RefreshRateTableIndex,HwDeviceExtension);		     
+
+   temp = (DisplayUnit >> 8) & 0x0f;
+   SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0E,0xF0,temp);
+
+   temp = DisplayUnit & 0xFF;
+   SiS_SetReg1(SiS_Pr->SiS_P3d4,0x13,temp);
+
+   if(infoflag & InterlaceMode) DisplayUnit >>= 1;
+
+   DisplayUnit <<= 5;
+   temp = (DisplayUnit & 0xff00) >> 8;
+   if (DisplayUnit & 0xff) temp++;
+   temp++;
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x10,temp);
+}
+
+/* TW: New from 650/LVDS 1.10.07, 630/301B and 630/LVDS BIOS */
+void
+SiS_ResetCRT1VCLK(SiS_Private *SiS_Pr, UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension)
+{
+   USHORT index;
+
+   /* TW: We only need to do this if Panel Link is to be
+    *     initialized, thus on 630/LVDS/301B, and 650/LVDS
+    */
+   if(HwDeviceExtension->jChipType >= SIS_315H) {
+       if (SiS_Pr->SiS_IF_DEF_LVDS == 0)  return;
+   } else {
+       if( (SiS_Pr->SiS_IF_DEF_LVDS == 0) &&
+           (!(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV)) ) {
+	   return;
+      }
+   }
+
+   if(HwDeviceExtension->jChipType >= SIS_315H) {
+   	SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x31,0xCF,0x20);
+   } else {
+   	SiS_SetReg1(SiS_Pr->SiS_P3c4,0x31,0x20);
+   }
+   index = 1;
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x2B,SiS_Pr->SiS_VCLKData[index].SR2B);
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x2C,SiS_Pr->SiS_VCLKData[index].SR2C);
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x2D,0x80);
+   if(HwDeviceExtension->jChipType >= SIS_315H) {
+   	SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x31,0xcf,0x10);
+   } else {
+   	SiS_SetReg1(SiS_Pr->SiS_P3c4,0x31,0x10);
+   }
+   index = 0;
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x2B,SiS_Pr->SiS_VCLKData[index].SR2B);
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x2C,SiS_Pr->SiS_VCLKData[index].SR2C);
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x2D,0x80);
+}
+
+/* TW: Checked against 300, 330, 650/LVDS, 650/301LVx, 315, 630/301B, 630/LVDS BIOS */
+void
+SiS_SetCRT1VCLK(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                PSIS_HW_DEVICE_INFO HwDeviceExtension,
+		USHORT RefreshRateTableIndex)
+{
+  USHORT  index=0;
+
+  if(!SiS_Pr->UseCustomMode) {
+     index = SiS_GetVCLK2Ptr(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,
+	                  RefreshRateTableIndex,HwDeviceExtension);
+  }			  
+
+  if( (SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV)
+                       && (SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) ){
+
+    	SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x31,0xCF);
+
+    	SiS_SetReg1(SiS_Pr->SiS_P3c4,0x2B,SiS_Pr->SiS_VBVCLKData[index].Part4_A);
+    	SiS_SetReg1(SiS_Pr->SiS_P3c4,0x2C,SiS_Pr->SiS_VBVCLKData[index].Part4_B);
+
+    	if(HwDeviceExtension->jChipType >= SIS_315H) {
+		SiS_SetReg1(SiS_Pr->SiS_P3c4,0x2D,0x01);
+   	} else {
+    		SiS_SetReg1(SiS_Pr->SiS_P3c4,0x2D,0x80);
+    	}
+
+  } else {
+
+	if(HwDeviceExtension->jChipType >= SIS_315H) {
+	    SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x31,0xCF);
+	} else {
+	    SiS_SetReg1(SiS_Pr->SiS_P3c4,0x31,0x00);
+	}
+
+	if(SiS_Pr->UseCustomMode) {
+	   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x2B,SiS_Pr->CSR2B);
+	   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x2C,SiS_Pr->CSR2C);
+	} else {
+    	   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x2B,SiS_Pr->SiS_VCLKData[index].SR2B);
+    	   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x2C,SiS_Pr->SiS_VCLKData[index].SR2C);
+  	}	   
+
+    	if(HwDeviceExtension->jChipType >= SIS_315H) {
+	    SiS_SetReg1(SiS_Pr->SiS_P3c4,0x2D,0x01);
+	} else {
+      	    SiS_SetReg1(SiS_Pr->SiS_P3c4,0x2D,0x80);
+        }
+  }
+}
+
+#if 0  /* TW: Not used */
+void
+SiS_IsLowResolution(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex)
+{
+  USHORT ModeFlag;
+
+  SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x0F,0x7F);
+
+  if(ModeNo > 0x13) {
+    ModeFlag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+    if ((ModeFlag & HalfDCLK) && (ModeFlag & DoubleScanMode)) {
+      SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x0F,0x80);
+      SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x01,0xF7);
+    }
+  }
+}
+#endif
+
+/* TW: Checked against 300, 630/LVDS, 650/LVDS, 315 and 330 BIOS */
+void
+SiS_SetCRT1ModeRegs(SiS_Private *SiS_Pr, UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension,
+                    USHORT ModeNo,USHORT ModeIdIndex,USHORT RefreshRateTableIndex)
+{
+  USHORT data,data2,data3;
+  USHORT infoflag=0,modeflag;
+  USHORT resindex,xres;
+
+  if(SiS_Pr->UseCustomMode) {
+     modeflag = SiS_Pr->CModeFlag;
+     infoflag = SiS_Pr->CInfoFlag;
+  } else {
+     if(ModeNo > 0x13) {
+    	modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+    	infoflag = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag;
+     } else {
+    	modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
+     }
+  }
+
+  SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1F,0x3F); 		/* DAC pedestal */
+
+  if(ModeNo > 0x13) data = infoflag;
+  else data = 0;
+
+  data2 = 0;
+  if(ModeNo > 0x13) {
+    if(SiS_Pr->SiS_ModeType > 0x02) {
+       data2 |= 0x02;
+       data3 = (SiS_Pr->SiS_ModeType - ModeVGA) << 2;
+       data2 |= data3;
+    }
+  }
+#ifdef TWDEBUG
+  xf86DrvMsg(0, X_INFO, "Debug: Mode infoflag = %x, Chiptype %d\n", 
+  	data, HwDeviceExtension->jChipType);
+#endif  
+  if(data & InterlaceMode) data2 |= 0x20;
+  SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x06,0xC0,data2);
+
+  if(SiS_Pr->UseCustomMode) {
+     xres = SiS_Pr->CHDisplay;
+  } else {
+     resindex = SiS_GetResInfo(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex);
+     if(ModeNo <= 0x13) {
+      	xres = SiS_Pr->SiS_StResInfo[resindex].HTotal;
+     } else {
+      	xres = SiS_Pr->SiS_ModeResInfo[resindex].HTotal;
+     }
+  }
+
+  if(HwDeviceExtension->jChipType != SIS_300) {
+     data = 0x0000;
+     if(infoflag & InterlaceMode) {
+        if(xres == 1024) data = 0x0035;
+        else data = 0x0048;
+     }
+     data2 = data & 0x00FF;
+     SiS_SetReg1(SiS_Pr->SiS_P3d4,0x19,data2);
+     data2 = (data & 0xFF00) >> 8;
+     SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x1a,0xFC,data2);
+  }
+
+  if(modeflag & HalfDCLK) {
+     SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x01,0x08);
+  }
+
+  if(HwDeviceExtension->jChipType == SIS_300) {
+     if(modeflag & LineCompareOff) {
+        SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x0F,0x08);
+     } else {
+        SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x0F,0xF7);
+     }
+  } else if(HwDeviceExtension->jChipType < SIS_315H) {
+     if(modeflag & LineCompareOff) {
+        SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0F,0xB7,0x08);
+     } else {
+        SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x0F,0xB7);
+     }
+     /* 630 BIOS does something for mode 0x12 here */
+  } else {
+     if(modeflag & LineCompareOff) {
+        SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0F,0xB7,0x08);
+     } else {
+        SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x0F,0xB7);
+     }
+  }
+
+  if(HwDeviceExtension->jChipType != SIS_300) {
+     if(SiS_Pr->SiS_ModeType == ModeEGA) {
+        if(ModeNo > 0x13) {
+  	   SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x0F,0x40);
+        }
+     }
+  }
+
+#ifdef SIS315H
+  /* TW: 315 BIOS sets SR17 at this point */
+  if(HwDeviceExtension->jChipType == SIS_315PRO) {
+      data = SiS_Get310DRAMType(SiS_Pr,ROMAddr,HwDeviceExtension);
+      data = SiS_Pr->SiS_SR15[2][data];
+      if(SiS_Pr->SiS_ModeType == ModeText) {
+          data &= 0xc7;
+      } else {
+          data2 = SiS_GetOffset(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,
+                                RefreshRateTableIndex,HwDeviceExtension);
+	  data2 >>= 1;
+	  if(infoflag & InterlaceMode) data2 >>= 1;
+	  data3 = SiS_GetColorDepth(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex);
+	  data3 >>= 1;
+	  if(data3 == 0) data3++;
+	  data2 /= data3;
+	  if(data2 >= 0x50) {
+	      data &= 0x0f;
+	      data |= 0x50;
+	  }
+      }
+      SiS_SetReg1(SiS_Pr->SiS_P3c4,0x17,data);
+  }
+
+  /* TW: 330 BIOS sets SR17 at this point */
+  if(HwDeviceExtension->jChipType == SIS_330) {
+      data = SiS_Get310DRAMType(SiS_Pr,ROMAddr,HwDeviceExtension);
+      data = SiS_Pr->SiS_SR15[2][data];
+      if(SiS_Pr->SiS_ModeType <= ModeEGA) {
+          data &= 0xc7;
+      } else {
+          if(SiS_Pr->UseCustomMode) {
+	     data2 = SiS_Pr->CSRClock;
+	  } else {
+             data2 = SiS_GetVCLK2Ptr(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,
+                               RefreshRateTableIndex,HwDeviceExtension);
+             data2 = SiS_Pr->SiS_VCLKData[data2].CLOCK;
+	  }
+
+	  data3 = SiS_GetColorDepth(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex);
+	  data3 >>= 1;
+
+	  data2 *= data3;
+
+	  data3 = SiS_GetMCLK(SiS_Pr,ROMAddr, HwDeviceExtension);
+	  data3 *= 1024;
+
+	  data2 = data3 / data2;
+
+	  if(SiS_Pr->SiS_ModeType != Mode16Bpp) {
+            if(data2 >= 0x19c)      data = 0xba;
+	    else if(data2 >= 0x140) data = 0x7a;
+	    else if(data2 >= 0x101) data = 0x3a;
+	    else if(data2 >= 0xf5)  data = 0x32;
+	    else if(data2 >= 0xe2)  data = 0x2a;
+	    else if(data2 >= 0xc4)  data = 0x22;
+	    else if(data2 >= 0xac)  data = 0x1a;
+	    else if(data2 >= 0x9e)  data = 0x12;
+	    else if(data2 >= 0x8e)  data = 0x0a;
+	    else                    data = 0x02;
+	  } else {
+	    if(data2 >= 0x127)      data = 0xba;
+	    else                    data = 0x7a;
+	  }
+      }
+      SiS_SetReg1(SiS_Pr->SiS_P3c4,0x17,data);
+  }
+#endif
+
+  data = 0x60;
+  if(SiS_Pr->SiS_ModeType != ModeText) {
+      data ^= 0x60;
+      if(SiS_Pr->SiS_ModeType != ModeEGA) {
+          data ^= 0xA0;
+      }
+  }
+  SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x21,0x1F,data);
+
+  SiS_SetVCLKState(SiS_Pr,ROMAddr,HwDeviceExtension,ModeNo,RefreshRateTableIndex,ModeIdIndex);
+
+#ifdef SIS315H
+  if(HwDeviceExtension->jChipType >= SIS_315H) {
+    if(SiS_GetReg1(SiS_Pr->SiS_P3d4,0x31) & 0x40) {
+        SiS_SetReg1(SiS_Pr->SiS_P3d4,0x52,0x2c);
+    } else {
+        SiS_SetReg1(SiS_Pr->SiS_P3d4,0x52,0x6c);
+    }
+  }
+#endif
+}
+
+/* TW: Checked against 300, 315, 330, 650/LVDS, 650/301LVx, 630/301B and 630/LVDS BIOS */
+void
+SiS_SetVCLKState(SiS_Private *SiS_Pr, UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension,
+                 USHORT ModeNo,USHORT RefreshRateTableIndex,
+                 USHORT ModeIdIndex)
+{
+  USHORT data, data2=0;
+  USHORT VCLK, index=0;
+
+  if (ModeNo <= 0x13) VCLK = 0;
+  else {
+     if(SiS_Pr->UseCustomMode) {
+        VCLK = SiS_Pr->CSRClock;
+     } else {
+        index = SiS_GetVCLK2Ptr(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,
+	               RefreshRateTableIndex,HwDeviceExtension);
+        VCLK = SiS_Pr->SiS_VCLKData[index].CLOCK;
+     }	
+  }
+
+  if(HwDeviceExtension->jChipType < SIS_315H) {		/* 300 series */
+
+    data2 = 0x00;
+    if(VCLK > 150) data2 |= 0x80;
+    SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x07,0x7B,data2); 	/* DAC speed */
+
+    data2 = 0x00;
+    if(VCLK >= 150) data2 |= 0x08;       	/* VCLK > 150 */
+    SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x32,0xF7,data2);
+
+  } else { 						/* 310/325 series */
+
+    data = 0;
+    if(VCLK >= 166) data |= 0x0c;         	/* TW: Was 200; is 166 in 650, 315 and 330 BIOSes */
+    SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x32,0xf3,data);
+
+    if(VCLK >= 166) {				/* TW: Was 200, is 166 in 650, 315 and 330 BIOSes */
+       SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1f,0xe7);
+    }
+#if 0 /* Not done in 315 and 650/301LV/LVDS BIOSes: */
+    data = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x1F);	  	/* DAC pedestal */
+    data &= 0xE7;
+    if(VCLK<200) data |= 0x10;
+    SiS_SetReg1(SiS_Pr->SiS_P3c4,0x1F,data);	  	/* DAC pedestal */
+#endif
+  }
+
+  data2 = 0x03;
+  if((VCLK >= 135) && (VCLK < 160)) data2 = 0x02;
+  if((VCLK >= 160) && (VCLK < 260)) data2 = 0x01;
+  if(VCLK >= 260) data2 = 0x00;
+
+  if(HwDeviceExtension->jChipType == SIS_540) {
+    	if((VCLK == 203) || (VCLK < 234)) data2 = 0x02;
+  }
+  
+  if(HwDeviceExtension->jChipType < SIS_315H) {
+      SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x07,0xFC,data2);  	/* DAC speed */
+  } else {
+      if(HwDeviceExtension->jChipType > SIS_315PRO) {
+         /* TW: This "if" is done in 330 and 650/LVDS/301LV BIOSes; Not in 315 BIOS */
+         if(ModeNo > 0x13) data2 &= 0xfc;
+      }
+      SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x07,0xF8,data2);  	/* DAC speed */
+  }
+}
+
+/* TW: Checked against 650/301LVx 1.10.6s, 315, 630/301B BIOS */
+void
+SiS_LoadDAC(SiS_Private *SiS_Pr,PSIS_HW_DEVICE_INFO HwDeviceExtension,
+            UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex)
+{
+   USHORT data,data2;
+   USHORT time,i,j,k;
+   USHORT m,n,o;
+   USHORT si,di,bx,dl;
+   USHORT al,ah,dh;
+   USHORT DACAddr, DACData, shiftflag;
+   const USHORT *table = NULL;
+#if 0
+   USHORT tempah,tempch,tempcl,tempdh,tempal,tempbx;
+#endif
+
+   if(ModeNo <= 0x13) {
+        data = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
+   } else {
+        if(SiS_Pr->UseCustomMode) {
+	   data = SiS_Pr->CModeFlag;
+	} else {
+           data = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+ 	}	   
+   }
+
+#if 0
+   if(!(ds:489 & 0x08)) {
+#endif
+
+	data &= DACInfoFlag;
+	time = 64;
+	if(data == 0x00) table = SiS_MDA_DAC;
+	if(data == 0x08) table = SiS_CGA_DAC;
+	if(data == 0x10) table = SiS_EGA_DAC;
+	if(data == 0x18) {
+	   time = 256;
+	   table = SiS_VGA_DAC;
+	}
+	if(time == 256) j = 16;
+	else            j = time;
+
+	if( ( (HwDeviceExtension->jChipType == SIS_630)        &&      /* 630/301B LCD */
+	      (SiS_Pr->SiS_VBType & (VB_SIS301B | VB_SIS302B)) &&
+	      (SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) )               ||
+	    (SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)                  ||   /* LCDA */
+	    (!(SiS_Pr->SiS_SetFlag & ProgrammingCRT2)) ) {             /* Programming CRT1 */
+	   DACAddr = SiS_Pr->SiS_P3c8;
+	   DACData = SiS_Pr->SiS_P3c9;
+	   shiftflag = 0;
+	   SiS_SetReg3(SiS_Pr->SiS_P3c6,0xFF);
+	} else {
+	   shiftflag = 1;
+	   DACAddr = SiS_Pr->SiS_Part5Port;
+	   DACData = SiS_Pr->SiS_Part5Port + 1;
+	}
+
+	SiS_SetReg3(DACAddr,0x00);
+
+	for(i=0; i<j; i++) {
+	   data = table[i];
+	   for(k=0; k<3; k++) {
+		data2 = 0;
+		if(data & 0x01) data2 = 0x2A;
+		if(data & 0x02) data2 += 0x15;
+		if(shiftflag) data2 <<= 2;
+		SiS_SetReg3(DACData,data2);
+		data >>= 2;
+	   }
+	}
+
+	if(time == 256) {
+	   for(i = 16; i < 32; i++) {
+		data = table[i];
+		if(shiftflag) data <<= 2;
+		for(k=0; k<3; k++) SiS_SetReg3(DACData,data);
+	   }
+	   si = 32;
+	   for(m = 0; m < 9; m++) {
+	      di = si;
+	      bx = si + 4;
+	      dl = 0;
+	      for(n = 0; n < 3; n++) {
+		 for(o = 0; o < 5; o++) {
+		    dh = table[si];
+		    ah = table[di];
+		    al = table[bx];
+		    si++;
+		    SiS_WriteDAC(SiS_Pr,DACData,shiftflag,dl,ah,al,dh);
+		 }
+		 si -= 2;
+		 for(o = 0; o < 3; o++) {
+		    dh = table[bx];
+		    ah = table[di];
+		    al = table[si];
+		    si--;
+		    SiS_WriteDAC(SiS_Pr,DACData,shiftflag,dl,ah,al,dh);
+		 }
+		 dl++;
+	      }            /* for n < 3 */
+	      si += 5;
+	   }               /* for m < 9 */
+	}
+#if 0
+    }  /* ds:489 & 0x08 */
+#endif
+
+#if 0
+    if((!(ds:489 & 0x08)) && (ds:489 & 0x06)) {
+           tempbx = 0;
+	   for(i=0; i< 256; i++) {
+               SiS_SetReg3(SiS_Pr->SiS_P3c8-1,tempbx);    	/* 7f87 */
+               tempah = SiS_GetReg3(SiS_Pr->SiS_P3c8+1);  	/* 7f83 */
+	       tempch = SiS_GetReg3(SiS_Pr->SiS_P3c8+1);
+	       tempcl = SiS_GetReg3(SiS_Pr->SiS_P3c8+1);
+	       tempdh = tempah;
+	       tempal = 0x4d * tempdh;          	/* 7fb8 */
+	       tempbx += tempal;
+	       tempal = 0x97 * tempch;
+	       tempbx += tempal;
+	       tempal = 0x1c * tempcl;
+	       tempbx += tempal;
+	       if((tempbx & 0x00ff) > 0x80) tempbx += 0x100;
+	       tempdh = (tempbx & 0x00ff) >> 8;
+	       tempch = tempdh;
+	       tempcl = tempdh;
+	       SiS_SetReg3(SiS_Pr->SiS_P3c8,(tempbx & 0xff));  	/* 7f7c */
+	       SiS_SetReg3(SiS_Pr->SiS_P3c8+1,tempdh);          /* 7f92 */
+	       SiS_SetReg3(SiS_Pr->SiS_P3c8+1,tempch);
+	       SiS_SetReg3(SiS_Pr->SiS_P3c8+1,tempcl);
+           }
+    }
+#endif
+}
+
+void
+SiS_WriteDAC(SiS_Private *SiS_Pr, USHORT DACData, USHORT shiftflag,
+             USHORT dl, USHORT ah, USHORT al, USHORT dh)
+{
+  USHORT temp;
+  USHORT bh,bl;
+
+  bh = ah;
+  bl = al;
+  if(dl != 0) {
+    temp = bh;
+    bh = dh;
+    dh = temp;
+    if(dl == 1) {
+       temp = bl;
+       bl = dh;
+       dh = temp;
+    } else {
+       temp = bl;
+       bl = bh;
+       bh = temp;
+    }
+  }
+  if(shiftflag) {
+     dh <<= 2;
+     bh <<= 2;
+     bl <<= 2;
+  }
+  SiS_SetReg3(DACData,(USHORT)dh);
+  SiS_SetReg3(DACData,(USHORT)bh);
+  SiS_SetReg3(DACData,(USHORT)bl);
+}
+
+static ULONG
+GetDRAMSize(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension)
+{
+  ULONG   AdapterMemorySize = 0;
+#ifdef SIS315H
+  USHORT  counter;
+#endif
+
+#ifdef SIS315H
+  if ((HwDeviceExtension->jChipType == SIS_315H) ||
+      (HwDeviceExtension->jChipType == SIS_315)  ||
+      (HwDeviceExtension->jChipType == SIS_315PRO)) {
+
+    	counter = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x14);
+	AdapterMemorySize = 1 << ((counter & 0xF0) >> 4);
+	counter >>= 2;
+	counter &= 0x03;
+	if(counter == 0x02) {
+		AdapterMemorySize += (AdapterMemorySize / 2);      /* DDR asymetric */
+	} else if(counter != 0) {
+		AdapterMemorySize <<= 1;                           /* SINGLE_CHANNEL_2_RANK or DUAL_CHANNEL_1_RANK */
+	}
+	AdapterMemorySize *= (1024*1024);
+
+  } else if(HwDeviceExtension->jChipType == SIS_330) {
+
+    	counter = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x14);
+	AdapterMemorySize = 1 << ((counter & 0xF0) >> 4);
+	counter &= 0x0c;
+	if(counter != 0) {
+		AdapterMemorySize <<= 1;
+	}
+	AdapterMemorySize *= (1024*1024);
+
+  } else if((HwDeviceExtension->jChipType == SIS_550) ||
+            (HwDeviceExtension->jChipType == SIS_740) ||
+            (HwDeviceExtension->jChipType == SIS_650)) {
+
+  	counter = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x14) & 0x3F;
+      	counter++;
+      	AdapterMemorySize = counter * 4;
+      	AdapterMemorySize *= (1024*1024);
+  }
+#endif
+
+#ifdef SIS300
+  if ((HwDeviceExtension->jChipType==SIS_300) ||
+      (HwDeviceExtension->jChipType==SIS_540) ||
+      (HwDeviceExtension->jChipType==SIS_630) ||
+      (HwDeviceExtension->jChipType==SIS_730)) {
+
+      	AdapterMemorySize = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x14) & 0x3F;
+      	AdapterMemorySize++;
+      	AdapterMemorySize *= (1024*1024);
+
+  }
+#endif
+
+  return AdapterMemorySize;
+}
+
+#ifndef LINUX_XF86
+void
+SiS_ClearBuffer(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT ModeNo)
+{
+  PVOID   VideoMemoryAddress = (PVOID)HwDeviceExtension->pjVideoMemoryAddress;
+  ULONG   AdapterMemorySize  = (ULONG)HwDeviceExtension->ulVideoMemorySize;
+  PUSHORT pBuffer;
+  int i;
+
+  if (SiS_Pr->SiS_ModeType>=ModeEGA) {
+    if(ModeNo > 0x13) {
+      AdapterMemorySize = GetDRAMSize(SiS_Pr, HwDeviceExtension);
+      SiS_SetMemory(VideoMemoryAddress,AdapterMemorySize,0);
+    } else {
+      pBuffer = VideoMemoryAddress;
+      for(i=0; i<0x4000; i++)
+         pBuffer[i] = 0x0000;
+    }
+  } else {
+    pBuffer = VideoMemoryAddress;
+    if (SiS_Pr->SiS_ModeType < ModeCGA) {
+      for(i=0; i<0x4000; i++)
+         pBuffer[i] = 0x0720;
+    } else {
+      SiS_SetMemory(VideoMemoryAddress,0x8000,0);
+    }
+  }
+}
+#endif
+
+void
+SiS_DisplayOn(SiS_Private *SiS_Pr)
+{
+   SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x01,0xDF,0x00);
+}
+
+void
+SiS_DisplayOff(SiS_Private *SiS_Pr)
+{
+   SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x01,0xDF,0x20);
+}
+
+
+/* ========================================== */
+/*  SR CRTC GR */
+void
+SiS_SetReg1(USHORT port, USHORT index, USHORT data)
+{
+   OutPortByte(port,index);
+   OutPortByte(port+1,data);
+}
+
+/* ========================================== */
+/*  AR(3C0) */
+void
+SiS_SetReg2(SiS_Private *SiS_Pr, USHORT port, USHORT index, USHORT data)
+{
+   InPortByte(port+0x3da-0x3c0);
+   OutPortByte(SiS_Pr->SiS_P3c0,index);
+   OutPortByte(SiS_Pr->SiS_P3c0,data);
+   OutPortByte(SiS_Pr->SiS_P3c0,0x20);
+}
+
+void
+SiS_SetReg3(USHORT port, USHORT data)
+{
+   OutPortByte(port,data);
+}
+
+void
+SiS_SetReg4(USHORT port, ULONG data)
+{
+   OutPortLong(port,data);
+}
+
+void
+SiS_SetReg5(USHORT port, USHORT data)
+{
+   OutPortWord(port,data);
+}
+
+UCHAR SiS_GetReg1(USHORT port, USHORT index)
+{
+   UCHAR   data;
+
+   OutPortByte(port,index);
+   data = InPortByte(port+1);
+
+   return(data);
+}
+
+UCHAR
+SiS_GetReg2(USHORT port)
+{
+   UCHAR   data;
+
+   data= InPortByte(port);
+
+   return(data);
+}
+
+ULONG
+SiS_GetReg3(USHORT port)
+{
+   ULONG   data;
+
+   data = InPortLong(port);
+
+   return(data);
+}
+
+USHORT
+SiS_GetReg4(USHORT port)
+{
+   ULONG   data;
+
+   data = InPortWord(port);
+
+   return(data);
+}
+
+void
+SiS_ClearDAC(SiS_Private *SiS_Pr, ULONG port)
+{
+   int i;
+
+   OutPortByte(port, 0);
+   port++;
+   for (i=0; i < (256 * 3); i++) {
+      OutPortByte(port, 0);
+   }
+
+}
+
+#if 0  /* TW: Unused */
+void
+SiS_SetInterlace(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT RefreshRateTableIndex)
+{
+  ULONG Temp;
+  USHORT data,Temp2;
+
+  if (ModeNo<=0x13) return;
+
+  Temp = (ULONG)SiS_GetReg1(SiS_Pr->SiS_P3d4,0x01);
+  Temp++;
+  Temp <<= 3;
+
+  if(Temp == 1024) data = 0x0035;
+  else if(Temp == 1280) data = 0x0048;
+  else data = 0x0000;
+
+  Temp2 = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag;
+  Temp2 &= InterlaceMode;
+  if(Temp2 == 0) data=0x0000;
+
+  SiS_SetReg1(SiS_Pr->SiS_P3d4,0x19,data);
+
+  Temp = (ULONG)SiS_GetReg1(SiS_Pr->SiS_P3d4,0x1A);
+  Temp = (USHORT)(Temp & 0xFC);
+  SiS_SetReg1(SiS_Pr->SiS_P3d4,0x1A,(USHORT)Temp);
+
+  Temp = (ULONG)SiS_GetReg1(SiS_Pr->SiS_P3c4,0x0f);
+  Temp2 = (USHORT)Temp & 0xBF;
+  if(ModeNo==0x37) Temp2 |= 0x40;
+  SiS_SetReg1(SiS_Pr->SiS_P3d4,0x1A,(USHORT)Temp2);
+}
+#endif
+
+/* TW: Checked against 330, 650/LVDS (1.10.07), 650/301LVx (1.10.6s) and 315 BIOS */
+#ifdef SIS315H
+void
+SiS_SetCRT1FIFO_310(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                PSIS_HW_DEVICE_INFO HwDeviceExtension)
+{
+  USHORT modeflag;
+
+  SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x3D,0xFE);  /* disable auto-threshold */
+
+  if(ModeNo > 0x13) {
+    if(SiS_Pr->UseCustomMode) {
+       modeflag = SiS_Pr->CModeFlag;
+    } else {
+       modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+    }       
+    if( (!(modeflag & DoubleScanMode)) || (!(modeflag & HalfDCLK))) {
+       SiS_SetReg1(SiS_Pr->SiS_P3c4,0x08,0x34);
+       SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x09,0xF0);
+       SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x3D,0x01);
+    } else {
+       SiS_SetReg1(SiS_Pr->SiS_P3c4,0x08,0xAE);
+       SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x09,0xF0);
+    }
+  } else {
+    SiS_SetReg1(SiS_Pr->SiS_P3c4,0x08,0xAE);
+    SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x09,0xF0);
+  }
+}
+#endif
+
+#ifdef SIS300
+void
+SiS_SetCRT1FIFO_300(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,PSIS_HW_DEVICE_INFO HwDeviceExtension,
+                    USHORT RefreshRateTableIndex)
+{
+  USHORT  ThresholdLow = 0;
+  USHORT  index, VCLK, MCLK, colorth=0;
+  USHORT  tempah, temp;
+
+  if(ModeNo > 0x13) {
+
+     if(SiS_Pr->UseCustomMode) {
+        VCLK = SiS_Pr->CSRClock;
+     } else {
+        index = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK;
+        index &= 0x3F;
+        VCLK = SiS_Pr->SiS_VCLKData[index].CLOCK;             /* Get VCLK  */
+     }
+
+     switch (SiS_Pr->SiS_ModeType - ModeEGA) {     /* Get half colordepth */
+        case 0 : colorth = 1; break;
+        case 1 : colorth = 1; break;
+        case 2 : colorth = 2; break;
+        case 3 : colorth = 2; break;
+        case 4 : colorth = 3; break;
+        case 5 : colorth = 4; break;
+     }
+
+     index = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x3A);
+     index &= 0x07;
+     MCLK = SiS_Pr->SiS_MCLKData_0[index].CLOCK;           /* Get MCLK  */
+
+     tempah = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x35);
+     tempah &= 0xc3;
+     SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x16,0x3c,tempah);
+
+     do {
+        ThresholdLow = SiS_CalcDelay(SiS_Pr, ROMAddr, VCLK, colorth, MCLK);
+        ThresholdLow++;
+        if(ThresholdLow < 0x13) break;
+        SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x16,0xfc);
+        ThresholdLow = 0x13;
+        tempah = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x16);
+        tempah >>= 6;
+        if(!(tempah)) break;
+        tempah--;
+        tempah <<= 6;
+        SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x16,0x3f,tempah);
+     } while(0);
+
+  } else ThresholdLow = 2;
+
+  /* Write CRT/CPU threshold low, CRT/Engine threshold high */
+  temp = (ThresholdLow << 4) | 0x0f;
+  SiS_SetReg1(SiS_Pr->SiS_P3c4,0x08,temp);
+
+  temp = (ThresholdLow & 0x10) << 1;
+  if(ModeNo > 0x13) temp |= 0x40;
+  SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0f,0x9f,temp);
+
+  /* What is this? */
+  SiS_SetReg1(SiS_Pr->SiS_P3c4,0x3B,0x09);
+
+  /* Write CRT/CPU threshold high */
+  temp = ThresholdLow + 3;
+  if(temp > 0x0f) temp = 0x0f;
+  SiS_SetReg1(SiS_Pr->SiS_P3c4,0x09,temp);
+}
+
+USHORT
+SiS_CalcDelay(SiS_Private *SiS_Pr, UCHAR *ROMAddr, USHORT VCLK, USHORT colordepth, USHORT MCLK)
+{
+  USHORT tempax, tempbx;
+
+  tempbx = SiS_DoCalcDelay(SiS_Pr, MCLK, VCLK, colordepth, 0);
+  tempax = SiS_DoCalcDelay(SiS_Pr, MCLK, VCLK, colordepth, 1);
+  if(tempax < 4) tempax = 4;
+  tempax -= 4;
+  if(tempbx < tempax) tempbx = tempax;
+  return(tempbx);
+}
+
+USHORT
+SiS_DoCalcDelay(SiS_Private *SiS_Pr, USHORT MCLK, USHORT VCLK, USHORT colordepth, USHORT key)
+{
+  const UCHAR ThLowA[]   = { 61, 3,52, 5,68, 7,100,11,
+                             43, 3,42, 5,54, 7, 78,11,
+                             34, 3,37, 5,47, 7, 67,11 };
+
+  const UCHAR ThLowB[]   = { 81, 4,72, 6,88, 8,120,12,
+                             55, 4,54, 6,66, 8, 90,12,
+                             42, 4,45, 6,55, 8, 75,12 };
+
+  const UCHAR ThTiming[] = {  1, 2, 2, 3, 0, 1,  1, 2 };
+
+  USHORT tempah, tempal, tempcl, tempbx, temp;
+  ULONG  longtemp;
+
+  tempah = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x18);
+  tempah &= 0x62;
+  tempah >>= 1;
+  tempal = tempah;
+  tempah >>= 3;
+  tempal |= tempah;
+  tempal &= 0x07;
+  tempcl = ThTiming[tempal];
+  tempbx = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x16);
+  tempbx >>= 6;
+  tempah = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x14);
+  tempah >>= 4;
+  tempah &= 0x0c;
+  tempbx |= tempah;
+  tempbx <<= 1;
+  if(key == 0) {
+     tempal = ThLowA[tempbx + 1];
+     tempal *= tempcl;
+     tempal += ThLowA[tempbx];
+  } else {
+     tempal = ThLowB[tempbx + 1];
+     tempal *= tempcl;
+     tempal += ThLowB[tempbx];
+  }
+  longtemp = tempal * VCLK * colordepth;
+  temp = longtemp % (MCLK * 16);
+  longtemp /= (MCLK * 16);
+  if(temp) longtemp++;
+  return((USHORT)longtemp);
+}
+
+#if 0  /* TW: Old fragment, unused */
+USHORT
+SiS_CalcDelay(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT key)
+{
+  USHORT data,data2,temp0,temp1;
+  UCHAR   ThLowA[]=   {61,3,52,5,68,7,100,11,
+                       43,3,42,5,54,7, 78,11,
+                       34,3,37,5,47,7, 67,11};
+
+  UCHAR   ThLowB[]=   {81,4,72,6,88,8,120,12,
+                       55,4,54,6,66,8, 90,12,
+                       42,4,45,6,55,8, 75,12};
+
+  UCHAR   ThTiming[]= {1,2,2,3,0,1,1,2};
+
+  data=SiS_GetReg1(SiS_Pr->SiS_P3c4,0x16);
+  data=data>>6;
+  data2=SiS_GetReg1(SiS_Pr->SiS_P3c4,0x14);
+  data2=(data2>>4)&0x0C;
+  data=data|data2;
+  data=data<1;
+  if(key==0) {
+    temp0=(USHORT)ThLowA[data];
+    temp1=(USHORT)ThLowA[data+1];
+  } else {
+    temp0=(USHORT)ThLowB[data];
+    temp1=(USHORT)ThLowB[data+1];
+  }
+
+  data2=0;
+  data=SiS_GetReg1(SiS_Pr->SiS_P3c4,0x18);
+  if(data&0x02) data2=data2|0x01;
+  if(data&0x20) data2=data2|0x02;
+  if(data&0x40) data2=data2|0x04;
+
+  data=temp1*ThTiming[data2]+temp0;
+  return(data);
+}
+#endif
+
+void
+SiS_SetCRT1FIFO_630(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,
+ 		    PSIS_HW_DEVICE_INFO HwDeviceExtension,
+                    USHORT RefreshRateTableIndex)
+{
+  USHORT  i,index,data,VCLK,MCLK,colorth=0;
+  ULONG   B,eax,bl,data2;
+  USHORT  ThresholdLow=0;
+  UCHAR   FQBQData[]= { 
+  	0x01,0x21,0x41,0x61,0x81,
+        0x31,0x51,0x71,0x91,0xb1,
+        0x00,0x20,0x40,0x60,0x80,
+        0x30,0x50,0x70,0x90,0xb0,
+	0xFF
+  };
+  UCHAR   FQBQData730[]= {
+        0x34,0x74,0xb4,
+	0x23,0x63,0xa3,
+	0x12,0x52,0x92,
+	0x01,0x41,0x81,
+	0x00,0x40,0x80,
+	0xff
+  };
+
+  i=0;
+  if(ModeNo >= 0x13) {
+    if(SiS_Pr->UseCustomMode) {
+       VCLK = SiS_Pr->CSRClock;
+    } else {
+       index = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK;
+       index &= 0x3F;
+       VCLK = SiS_Pr->SiS_VCLKData[index].CLOCK;          /* Get VCLK  */
+    }       
+
+    index = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x1A);
+    index &= 0x07;
+    MCLK = SiS_Pr->SiS_MCLKData_0[index].CLOCK;           /* Get MCLK  */
+
+    data2 = SiS_Pr->SiS_ModeType - ModeEGA;	  /* Get half colordepth */
+    switch (data2) {
+        case 0 : colorth = 1; break;
+        case 1 : colorth = 1; break;
+        case 2 : colorth = 2; break;
+        case 3 : colorth = 2; break;
+        case 4 : colorth = 3; break;
+        case 5 : colorth = 4; break;
+    }
+
+    if(HwDeviceExtension->jChipType == SIS_730) {
+    
+       do {
+          B = SiS_CalcDelay2(SiS_Pr, ROMAddr, FQBQData730[i], HwDeviceExtension) * VCLK * colorth;
+	  bl = B / (MCLK * 16);
+
+          if(B == bl * 16 * MCLK) {
+             bl = bl + 1;
+          } else {
+             bl = bl + 2;
+          }
+
+          if(bl > 0x13) {
+             if(FQBQData730[i+1] == 0xFF) {
+                ThresholdLow = 0x13;
+                break;
+             }
+             i++;
+          } else {
+             ThresholdLow = bl;
+             break;
+          }
+       } while(FQBQData730[i] != 0xFF);
+       
+    } else {
+    
+       do {
+          B = SiS_CalcDelay2(SiS_Pr, ROMAddr, FQBQData[i], HwDeviceExtension) * VCLK * colorth;
+          bl = B / (MCLK * 16);
+
+          if(B == bl * 16 * MCLK) {
+             bl = bl + 1;
+          } else {
+             bl = bl + 2;
+          }
+
+          if(bl > 0x13) {
+             if(FQBQData[i+1] == 0xFF) {
+                ThresholdLow = 0x13;
+                break;
+             }
+             i++;
+          } else {
+             ThresholdLow = bl;
+             break;
+          }
+       } while(FQBQData[i] != 0xFF);
+    }
+  }
+  else {
+    if(HwDeviceExtension->jChipType == SIS_730) { 
+    } else {
+      i = 9;
+    }
+    ThresholdLow = 0x02;
+  }
+
+  /* Write foreground and background queue */
+  if(HwDeviceExtension->jChipType == SIS_730) {  
+   
+     data2 = FQBQData730[i];
+     data2 = (data2 & 0xC0) >> 5;
+     data2 <<= 8;
+
+#ifndef LINUX_XF86
+     SiS_SetReg4(0xcf8,0x80000050);
+     eax = SiS_GetReg3(0xcfc);
+     eax &= 0xfffff9ff;
+     eax |= data2;
+     SiS_SetReg4(0xcfc,eax);
+#else
+     /* We use pci functions X offers. We use pcitag 0, because
+      * we want to read/write to the host bridge (which is always
+      * 00:00.0 on 630, 730 and 540), not the VGA device.
+      */
+     eax = pciReadLong(0x00000000, 0x50);
+     eax &= 0xfffff9ff;
+     eax |= data2;
+     pciWriteLong(0x00000000, 0x50, eax);
+#endif
+
+     /* Write GUI grant timer (PCI config 0xA3) */
+     data2 = FQBQData730[i] << 8;
+     data2 = (data2 & 0x0f00) | ((data2 & 0x3000) >> 8);
+     data2 <<= 20;
+     
+#ifndef LINUX_XF86
+     SiS_SetReg4(0xcf8,0x800000A0);
+     eax = SiS_GetReg3(0xcfc);
+     eax &= 0x00ffffff;
+     eax |= data2;
+     SiS_SetReg4(0xcfc,eax);
+#else
+     eax = pciReadLong(0x00000000, 0xA0);
+     eax &= 0x00ffffff;
+     eax |= data2;
+     pciWriteLong(0x00000000, 0xA0, eax);
+#endif          
+
+  } else {
+  
+     data2 = FQBQData[i];
+     data2 = (data2 & 0xf0) >> 4;
+     data2 <<= 24;
+
+#ifndef LINUX_XF86
+     SiS_SetReg4(0xcf8,0x80000050);
+     eax = SiS_GetReg3(0xcfc);
+     eax &= 0xf0ffffff;
+     eax |= data2;
+     SiS_SetReg4(0xcfc,eax);
+#else
+     eax = pciReadLong(0x00000000, 0x50);
+     eax &= 0xf0ffffff;
+     eax |= data2;
+     pciWriteLong(0x00000000, 0x50, eax);
+#endif
+
+     /* Write GUI grant timer (PCI config 0xA3) */
+     data2 = FQBQData[i];
+     data2 &= 0x0f;
+     data2 <<= 24;
+
+#ifndef LINUX_XF86
+     SiS_SetReg4(0xcf8,0x800000A0);
+     eax = SiS_GetReg3(0xcfc);
+     eax &= 0xf0ffffff;
+     eax |= data2;
+     SiS_SetReg4(0xcfc,eax);
+#else
+     eax = pciReadLong(0x00000000, 0xA0);
+     eax &= 0xf0ffffff;
+     eax |= data2;
+     pciWriteLong(0x00000000, 0xA0, eax);
+#endif
+     
+  }
+
+  /* Write CRT/CPU threshold low, CRT/Engine threshold high */
+  data = ((ThresholdLow & 0x0f) << 4) | 0x0f;
+  SiS_SetReg1(SiS_Pr->SiS_P3c4,0x08,data);
+
+  data = (ThresholdLow & 0x10) << 1;
+  SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0F,0xDF,data);
+
+  /* What is this? */
+  SiS_SetReg1(SiS_Pr->SiS_P3c4,0x3B,0x09);
+
+  /* Write CRT/CPU threshold high (gap = 3) */
+  data = ThresholdLow + 3;
+  if(data > 0x0f) data = 0x0f;
+  SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x09,0x80,data);
+}
+
+USHORT
+SiS_CalcDelay2(SiS_Private *SiS_Pr, UCHAR *ROMAddr,UCHAR key, PSIS_HW_DEVICE_INFO HwDeviceExtension)
+{
+  USHORT data,index;
+  const UCHAR  LatencyFactor[] = { 
+   	97, 88, 86, 79, 77, 00,       /*; 64  bit    BQ=2   */
+        00, 87, 85, 78, 76, 54,       /*; 64  bit    BQ=1   */
+        97, 88, 86, 79, 77, 00,       /*; 128 bit    BQ=2   */
+        00, 79, 77, 70, 68, 48,       /*; 128 bit    BQ=1   */
+        80, 72, 69, 63, 61, 00,       /*; 64  bit    BQ=2   */
+        00, 70, 68, 61, 59, 37,       /*; 64  bit    BQ=1   */
+        86, 77, 75, 68, 66, 00,       /*; 128 bit    BQ=2   */
+        00, 68, 66, 59, 57, 37        /*; 128 bit    BQ=1   */
+  };
+  const UCHAR  LatencyFactor730[] = {
+         69, 63, 61, 
+	 86, 79, 77,
+	103, 96, 94,
+	120,113,111,
+	137,130,128,    /* --- Table ends with this entry, data below */
+	137,130,128,	/* to avoid using illegal values              */
+	137,130,128,
+	137,130,128,
+	137,130,128,
+	137,130,128,
+	137,130,128,
+	137,130,128,
+	137,130,128,
+	137,130,128,
+	137,130,128,
+	137,130,128,
+  };
+
+  if(HwDeviceExtension->jChipType == SIS_730) {
+     index = ((key & 0x0f) * 3) + ((key & 0xC0) >> 6);
+     data = LatencyFactor730[index];
+  } else {			    
+     index = (key & 0xE0) >> 5;
+     if(key & 0x10) index +=6;
+     if(!(key & 0x01)) index += 24;
+     data = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x14);
+     if(data & 0x0080) index += 12;
+     data = LatencyFactor[index];
+  }
+  return(data);
+}
+#endif
+
+/* =============== Autodetection ================ */
+/*             I N C O M P L E T E                */
+
+BOOLEAN
+SiS_GetPanelID(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension)
+{
+  const USHORT PanelTypeTable300[16] = {
+      0xc101, 0xc117, 0x0121, 0xc135, 0xc142, 0xc152, 0xc162, 0xc072,
+      0xc181, 0xc192, 0xc1a1, 0xc1b6, 0xc1c2, 0xc0d2, 0xc1e2, 0xc1f2
+  };
+  const USHORT PanelTypeTable31030x[16] = {
+      0xc102, 0xc112, 0x0122, 0xc132, 0xc142, 0xc152, 0xc169, 0xc179,
+      0x0189, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
+  };
+  const USHORT PanelTypeTable310LVDS[16] = {
+      0xc111, 0xc122, 0xc133, 0xc144, 0xc155, 0xc166, 0xc177, 0xc188,
+      0xc199, 0xc0aa, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
+  };
+  USHORT tempax,tempbx,tempah,temp;
+
+  if(HwDeviceExtension->jChipType < SIS_315H) {
+
+    tempax = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x18);
+    tempbx = tempax & 0x0F;
+    if(!(tempax & 0x10)){
+      if(SiS_Pr->SiS_IF_DEF_LVDS == 1){
+        tempbx = 0;
+        temp = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x38);
+        if(temp & 0x40) tempbx |= 0x08;
+        if(temp & 0x20) tempbx |= 0x02;
+        if(temp & 0x01) tempbx |= 0x01;
+        temp = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x39);
+        if(temp & 0x80) tempbx |= 0x04;
+      } else {
+        return 0;
+      }
+    }
+    tempbx = PanelTypeTable300[tempbx];
+    tempbx |= LCDSync;
+    temp = tempbx & 0x00FF;
+    SiS_SetReg1(SiS_Pr->SiS_P3d4,0x36,temp);
+    temp = (tempbx & 0xFF00) >> 8;
+    SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x37,~(LCDSyncBit|LCDRGB18Bit),temp);
+
+  } else {
+
+    tempax = tempah = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x1a);
+    tempax &= 0x1e;
+    tempax >>= 1;
+    if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
+       if(tempax == 0) {
+           /* TODO: Include HUGE detection routine
+	            (Probably not worth bothering)
+	    */
+           return 0;
+       }
+       temp = tempax & 0xff;
+       tempax--;
+       tempbx = PanelTypeTable310LVDS[tempax];
+    } else {
+       tempbx = PanelTypeTable31030x[tempax];
+       temp = tempbx & 0xff;
+    }
+    SiS_SetReg1(SiS_Pr->SiS_P3d4,0x36,temp);
+    tempbx = (tempbx & 0xff00) >> 8;
+    temp = tempbx & 0xc1;
+    SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x37,~(LCDSyncBit|LCDRGB18Bit),temp);
+    if(SiS_Pr->SiS_IF_DEF_LVDS == 0) {
+       temp = tempbx & 0x04;
+       SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x39,0xfb,temp);
+    }
+
+  }
+  return 1;
+}
+
+
+#ifdef LINUXBIOS
+
+void
+SiS_DetectMonitor(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr)
+{
+  UCHAR  DAC_TEST_PARMS[] = {0x0F,0x0F,0x0F};
+  UCHAR  DAC_CLR_PARMS[]  = {0x00,0x00,0x00};
+  USHORT SR1F;
+
+  SR1F = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x1F);		/* backup DAC pedestal */
+  SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1F,0x04);
+
+  if(SiS_Pr->SiS_IF_DEF_LVDS == 0) {
+    if(!(SiS_BridgeIsOn(SiS_Pr, BaseAddr))) {
+      SiS_SetReg1(SiS_Pr->SiS_P3d4,0x30,0x41);
+    }
+  }
+
+  SiSSetMode(SiS_Pr,HwDeviceExtension,0x2E);
+  if(HwDeviceExtension->jChipType >= SIS_650) {
+     /* TW: On 650 only - enable CRT1 */
+     SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x63,0xbf);
+  }
+  SiS_SetReg3(SiS_Pr->SiS_P3c6,0xff);
+  SiS_ClearDAC(SiS_Pr, SiS_Pr->SiS_P3c8);
+  SiS_LongWait(SiS_Pr);
+  SiS_LongWait(SiS_Pr);
+  SiS_LongWait(SiS_Pr);
+  SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x32,0xDF,0x00);
+  if(SiS_TestMonitorType(SiS_Pr, DAC_TEST_PARMS[0],DAC_TEST_PARMS[1],DAC_TEST_PARMS[2])) {
+    SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x32,0xDF,0x20);
+  } else if(SiS_TestMonitorType(SiS_Pr, DAC_TEST_PARMS[0],DAC_TEST_PARMS[1],DAC_TEST_PARMS[2])) {
+    SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x32,0xDF,0x20);
+  }
+  SiS_TestMonitorType(SiS_Pr, DAC_CLR_PARMS[0],DAC_CLR_PARMS[1],DAC_CLR_PARMS[2]);
+
+  SiS_SetReg1(SiS_Pr->SiS_P3c4,0x1F,SR1F);
+}
+
+USHORT
+SiS_TestMonitorType(SiS_Private *SiS_Pr, UCHAR R_DAC,UCHAR G_DAC,UCHAR B_DAC)
+{
+   USHORT temp,tempbx;
+
+   tempbx = R_DAC * 0x4d + G_DAC * 0x97 + B_DAC * 0x1c;
+   if((tempbx & 0x00ff) > 0x80) tempbx += 0x100;
+   tempbx = (tempbx & 0xFF00) >> 8;
+   R_DAC = (UCHAR) tempbx;
+   G_DAC = (UCHAR) tempbx;
+   B_DAC = (UCHAR) tempbx;
+
+   SiS_SetReg3(SiS_Pr->SiS_P3c8,0x00);
+   SiS_SetReg3(SiS_Pr->SiS_P3c9,R_DAC);
+   SiS_SetReg3(SiS_Pr->SiS_P3c9,G_DAC);
+   SiS_SetReg3(SiS_Pr->SiS_P3c9,B_DAC);
+   SiS_LongWait(SiS_Pr);
+   temp=SiS_GetReg2(SiS_Pr->SiS_P3c2);
+   if(temp & 0x10) return(1);
+   else return(0);
+}
+
+void
+SiS_GetSenseStatus(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,UCHAR *ROMAddr)
+{
+  USHORT tempax=0,tempbx,tempcx,temp;
+  USHORT P2reg0=0,SenseModeNo=0,OutputSelect=*SiS_Pr->pSiS_OutputSelect;
+  USHORT ModeIdIndex,i;
+  USHORT BaseAddr = (USHORT)HwDeviceExtension->ulIOAddress;
+
+  if(SiS_Pr->SiS_IF_DEF_LVDS == 1){
+    SiS_GetPanelID(SiS_Pr);
+    temp=LCDSense;
+    temp=temp|SiS_SenseCHTV(SiS_Pr);
+    tempbx=~(LCDSense|AVIDEOSense|SVIDEOSense);
+    SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x32,tempbx,temp);
+  } else {       /* for 301 */
+    if(SiS_Pr->SiS_IF_DEF_HiVision==1) {  /* for HiVision */
+      tempax=SiS_GetReg1(SiS_Pr->SiS_P3c4,0x38);
+      temp=tempax&0x01;
+      tempax=SiS_GetReg1(SiS_Pr->SiS_P3c4,0x3A);
+      temp=temp|(tempax&0x02);
+      SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x32,0xA0,temp);
+    } else {
+      if(SiS_BridgeIsOn(SiS_Pr, BaseAddr)==0) {    /* TW: Inserted "==0" */
+        P2reg0 = SiS_GetReg1(SiS_Pr->SiS_Part2Port,0x00);
+        if(!(SiS_BridgeIsEnable(SiS_Pr, BaseAddr,HwDeviceExtension))) {
+          SenseModeNo=0x2e;
+          temp = SiS_SearchModeID(SiS_Pr, ROMAddr,&SenseModeNo,&ModeIdIndex);
+          SiS_Pr->SiS_SetFlag = 0x00;
+          SiS_Pr->SiS_ModeType = ModeVGA;
+          SiS_Pr->SiS_VBInfo = SetCRT2ToRAMDAC |LoadDACFlag |SetInSlaveMode;
+          SiS_SetCRT2Group301(SiS_Pr, BaseAddr,ROMAddr,SenseModeNo,HwDeviceExtension);
+          for(i=0;i<20;i++) {
+            SiS_LongWait(SiS_Pr);
+          }
+        }
+        SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x00,0x1c);
+        tempax=0;
+        tempbx=*SiS_Pr->pSiS_RGBSenseData;
+	if(SiS_Is301B(SiS_Pr, BaseAddr)){
+                tempbx=*SiS_Pr->pSiS_RGBSenseData2;
+        }
+        tempcx=0x0E08;
+        if(SiS_Sense(SiS_Pr, tempbx,tempcx)){
+          if(SiS_Sense(SiS_Pr, tempbx,tempcx)){
+            tempax=tempax|Monitor2Sense;
+          }
+        }
+        tempbx=*SiS_Pr->pSiS_YCSenseData;
+        if(SiS_Is301B(SiS_Pr, BaseAddr)){
+               tempbx=*SiS_Pr->pSiS_YCSenseData2;
+        }
+        tempcx=0x0604;
+        if(SiS_Sense(SiS_Pr, tempbx,tempcx)){
+          if(SiS_Sense(SiS_Pr,tempbx,tempcx)){
+            tempax=tempax|SVIDEOSense;
+          }
+        }
+
+	if(ROMAddr && SiS_Pr->SiS_UseROM) {
+#ifdef SIS300
+	   if((HwDeviceExtension->jChipType==SIS_630)||
+              (HwDeviceExtension->jChipType==SIS_730)) {
+		OutputSelect = ROMAddr[0xfe];
+	   }
+#endif
+#ifdef SIS315H
+	   if(HwDeviceExtension->jChipType >= SIS_315H) {
+	        OutputSelect = ROMAddr[0xf3];
+		if(HwDeviceExtension->jChipType == SIS_330) {
+		     OutputSelect = ROMAddr[0x11b];
+		}
+	   }
+#endif
+        }
+        if(OutputSelect & BoardTVType){
+          tempbx = *SiS_Pr->pSiS_VideoSenseData;
+          if(SiS_Is301B(SiS_Pr, BaseAddr)){
+             tempbx = *SiS_Pr->pSiS_VideoSenseData2;
+          }
+          tempcx = 0x0804;
+          if(SiS_Sense(SiS_Pr, tempbx,tempcx)){
+            if(SiS_Sense(SiS_Pr, tempbx,tempcx)){
+              tempax |= AVIDEOSense;
+            }
+          }
+        } else {
+          if(!(tempax & SVIDEOSense)){
+            tempbx = *SiS_Pr->pSiS_VideoSenseData;
+            if(SiS_Is301B(SiS_Pr, BaseAddr)){
+              tempbx = *SiS_Pr->pSiS_VideoSenseData2;
+            }
+            tempcx = 0x0804;
+            if(SiS_Sense(SiS_Pr,tempbx,tempcx)){
+              if(SiS_Sense(SiS_Pr, tempbx,tempcx)){
+                tempax |= AVIDEOSense;
+              }
+            }
+          }
+        }
+      }
+
+      if(SiS_SenseLCD(SiS_Pr, HwDeviceExtension)){
+        tempax |= LCDSense;
+      }
+
+      tempbx=0;
+      tempcx=0;
+      SiS_Sense(SiS_Pr, tempbx,tempcx);
+
+      if(SiS_Pr->SiS_VBType & (VB_SIS30xLV|VB_SIS30xNEW)) {
+         tempax &= 0x00ef;   /* 301lv to disable CRT2*/
+      }
+      SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x32,~0xDF,tempax);
+      SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x00,P2reg0);
+      if(!(P2reg0 & 0x20)) {
+        SiS_Pr->SiS_VBInfo = DisableCRT2Display;
+        SiS_SetCRT2Group301(SiS_Pr,BaseAddr,ROMAddr,SenseModeNo,HwDeviceExtension);
+      }
+    }
+  }
+}
+
+BOOLEAN
+SiS_Sense(SiS_Private *SiS_Pr, USHORT tempbx,USHORT tempcx)
+{
+  USHORT temp,i,tempch;
+
+  temp = tempbx & 0xFF;
+  SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x11,temp);
+  temp = (tempbx & 0xFF00) >> 8;
+  temp |= (tempcx & 0x00FF);
+  SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x10,~0x1F,temp);
+
+  for(i=0; i<10; i++) SiS_LongWait(SiS_Pr);
+
+  tempch = (tempcx & 0x7F00) >> 8;
+  temp = SiS_GetReg1(SiS_Pr->SiS_Part4Port,0x03);
+  temp ^= 0x0E;
+  temp &= tempch;
+  if(temp>0) return 1;
+  else return 0;
+}
+
+USHORT
+SiS_SenseLCD(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension)
+{
+  USHORT temp;
+
+  temp=SiS_GetPanelID(SiS_Pr);
+  if(!temp)  temp=SiS_GetLCDDDCInfo(SiS_Pr, HwDeviceExtension);
+  return(temp);
+}
+
+BOOLEAN
+SiS_GetLCDDDCInfo(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension)
+{
+  USHORT temp;
+  /*add lcd sense*/
+  if(HwDeviceExtension->ulCRT2LCDType==LCD_UNKNOWN)
+    	return 0;
+  else{
+     	temp=(USHORT)HwDeviceExtension->ulCRT2LCDType;
+     	SiS_SetReg1(SiS_Pr->SiS_P3d4,0x36,temp);
+  	return 1;
+  }
+}
+
+USHORT
+SiS_SenseCHTV(SiS_Private *SiS_Pr)
+{
+  USHORT temp,push0e,status;
+
+  status=0;
+  push0e = SiS_GetCH700x(SiS_Pr, 0x0e);
+  push0e = (push0e << 8) | 0x0e;
+  SiS_SetCH700x(SiS_Pr, 0x0b0e);
+  SiS_SetCH700x(SiS_Pr, 0x0110);
+  SiS_SetCH700x(SiS_Pr, 0x0010);
+  temp = SiS_GetCH700x(SiS_Pr, 0x10);
+  if(temp & 0x08) status |= SVIDEOSense;
+  if(temp & 0x02) status |= AVIDEOSense;
+  SiS_SetCH700x(SiS_Pr, push0e);
+  return(status);
+}
+#endif /* LINUXBIOS */
+
+/*  ================ for TC only =================  */
+
+#ifdef TC
+
+int
+INT1AReturnCode(union REGS regs)
+{
+  if (regs.x.cflag)
+  {
+    /*printf("Error to find pci device!\n"); */
+    return 1;
+  }
+
+  switch(regs.h.ah)
+  {
+    case 0: return 0;
+            break;
+    case 0x81: printf("Function not support\n");
+               break;
+    case 0x83: printf("bad vendor id\n");
+               break;
+    case 0x86: printf("device not found\n");
+               break;
+    case 0x87: printf("bad register number\n");
+               break;
+    case 0x88: printf("set failed\n");
+               break;
+    case 0x89: printf("buffer too small");
+               break;
+  }
+  return 1;
+}
+
+unsigned
+FindPCIIOBase(unsigned index,unsigned deviceid)
+{
+  union REGS regs;
+
+  regs.h.ah = 0xb1;  /*PCI_FUNCTION_ID */
+  regs.h.al = 0x02;  /*FIND_PCI_DEVICE */
+  regs.x.cx = deviceid;
+  regs.x.dx = 0x1039;
+  regs.x.si = index;  /* find n-th device */
+
+  int86(0x1A, &regs, &regs);
+
+  if (INT1AReturnCode(regs)!=0)
+    return 0;
+
+  /* regs.h.bh *//* bus number */
+  /* regs.h.bl *//* device number */
+  regs.h.ah = 0xb1;  /*PCI_FUNCTION_ID */
+  regs.h.al = 0x09;  /*READ_CONFIG_WORD */
+  regs.x.cx = deviceid;
+  regs.x.dx = 0x1039;
+  regs.x.di = 0x18;  /* register number */
+  int86(0x1A, &regs, &regs);
+
+  if (INT1AReturnCode(regs)!=0)
+    return 0;
+  return regs.x.cx;
+}
+
+
+void
+main(int argc, char *argv[])
+{
+  SIS_HW_DEVICE_INFO  HwDeviceExtension;
+  USHORT temp;
+  USHORT ModeNo;
+
+  /*HwDeviceExtension.pjVirtualRomBase =(PUCHAR) MK_FP(0xC000,0); */
+  /*HwDeviceExtension.pjVideoMemoryAddress = (PUCHAR)MK_FP(0xA000,0);*/
+
+#ifdef SIS300  
+  HwDeviceExtension.ulIOAddress = (FindPCIIOBase(0,0x6300)&0xFF80) + 0x30;
+  HwDeviceExtension.jChipType = SIS_630;
+#endif
+
+#ifdef SIS315H  
+//  HwDeviceExtension.ulIOAddress = (FindPCIIOBase(0,0x5315)&0xFF80) + 0x30;
+//  HwDeviceExtension.jChipType = SIS_550;
+  HwDeviceExtension.ulIOAddress = (FindPCIIOBase(0,0x325)&0xFF80) + 0x30;
+  HwDeviceExtension.jChipType = SIS_315H;
+#endif
+
+  HwDeviceExtension.ujVBChipID = VB_CHIP_301;
+  strcpy(HwDeviceExtension.szVBIOSVer,"0.84");
+  HwDeviceExtension.bSkipDramSizing = FALSE;
+  HwDeviceExtension.ulVideoMemorySize = 0;
+  if(argc==2) {
+    ModeNo=atoi(argv[1]);
+  }
+  else {
+    ModeNo=0x2e;
+    /*ModeNo=0x37; */ /* 1024x768x 4bpp */
+    /*ModeNo=0x38; *//* 1024x768x 8bpp */
+    /*ModeNo=0x4A; *//* 1024x768x 16bpp */
+    /*ModeNo=0x47;*/ /* 800x600x 16bpp */
+  }
+ /* SiSInit(SiS_Pr, &HwDeviceExtension);*/
+  SiSSetMode(SiS_Pr, &HwDeviceExtension, ModeNo);
+}
+#endif /* TC END */
+
+/* ================ LINUX XFREE86 ====================== */
+
+/* Helper functions */
+
+#ifdef LINUX_XF86
+USHORT
+SiS_CalcModeIndex(ScrnInfoPtr pScrn, DisplayModePtr mode)
+{
+   SISPtr pSiS = SISPTR(pScrn);
+   UShort i = (pSiS->CurrentLayout.bitsPerPixel+7)/8 - 1;
+   UShort ModeIndex = 0;
+
+   if((pSiS->HaveCustomModes) && (!(mode->type & M_T_DEFAULT))) 
+   	return 0xfe;
+   
+   switch(mode->HDisplay)
+   {
+     case 320:
+          if(mode->VDisplay == 480) {
+                ModeIndex = ModeIndex_320x480[i];
+	  }
+          break;
+     case 512:
+          if(mode->VDisplay == 384) {
+             ModeIndex = ModeIndex_512x384[i];
+	  }
+          break;
+     case 640:
+          if(mode->VDisplay == 480) {
+             ModeIndex = ModeIndex_640x480[i];
+	  } else if(mode->VDisplay == 400) {
+	     ModeIndex = ModeIndex_640x400[i];
+	  }
+          break;
+     case 720:
+          if(mode->VDisplay == 480) {
+                ModeIndex = ModeIndex_720x480[i];
+          } else if(mode->VDisplay == 576) {
+                ModeIndex = ModeIndex_720x576[i];
+          }
+          break;
+     case 800:
+	  if(mode->VDisplay == 600) {
+             ModeIndex = ModeIndex_800x600[i];
+	  } else if(mode->VDisplay == 480) {
+	     ModeIndex = ModeIndex_800x480[i];
+	  }
+          break;
+     case 848:
+	  if(mode->VDisplay == 480) {
+             ModeIndex = ModeIndex_848x480[i];
+	  }
+	  break;
+     case 856:
+	  if(mode->VDisplay == 480) {
+             ModeIndex = ModeIndex_856x480[i];
+	  }
+	  break;
+     case 1024:
+          if(mode->VDisplay == 768) {
+	        ModeIndex = ModeIndex_1024x768[i];
+	  } else if(mode->VDisplay == 576) {
+	        ModeIndex = ModeIndex_1024x576[i];
+	  } else if(pSiS->VGAEngine == SIS_300_VGA) {
+	     if(mode->VDisplay == 600) {
+	        ModeIndex = ModeIndex_1024x600[i];
+             }
+	  }
+          break;
+     case 1152:
+          if(mode->VDisplay == 864) {
+	        ModeIndex = ModeIndex_1152x864[i];
+          } else if(pSiS->VGAEngine == SIS_300_VGA) {
+	     if(mode->VDisplay == 768) {
+	        ModeIndex = ModeIndex_1152x768[i];
+             }
+	  }
+	  break;
+     case 1280:
+          if(mode->VDisplay == 960) {
+             if(pSiS->VGAEngine == SIS_300_VGA) {
+	        ModeIndex = ModeIndex_300_1280x960[i];
+             } else {
+                ModeIndex = ModeIndex_310_1280x960[i];
+             }
+	  } else if (mode->VDisplay == 1024) {
+	     ModeIndex = ModeIndex_1280x1024[i];
+	  } else if (mode->VDisplay == 720) {
+	        ModeIndex = ModeIndex_1280x720[i];
+	  } else if(pSiS->VGAEngine == SIS_315_VGA) {
+	     if (mode->VDisplay == 768) {
+	        ModeIndex = ModeIndex_1280x768[i];
+	     }
+	  }
+          break;
+     case 1360:
+	  if(mode->VDisplay == 768) {
+	     ModeIndex = ModeIndex_1360x768[i];
+	  }
+          break;
+     case 1400:
+          if(pSiS->VGAEngine == SIS_315_VGA) {
+	     if(mode->VDisplay == 1050) {
+	        ModeIndex = ModeIndex_1400x1050[i];
+             }
+	  }
+          break;
+     case 1600:
+          if(mode->VDisplay == 1200) {
+             ModeIndex = ModeIndex_1600x1200[i];
+	  }
+          break;
+     case 1920:
+          if(mode->VDisplay == 1440) {
+             ModeIndex = ModeIndex_1920x1440[i];
+	  }
+          break;
+     case 2048:
+          if(mode->VDisplay == 1536) {
+             if(pSiS->VGAEngine == SIS_300_VGA) {
+	         ModeIndex = ModeIndex_300_2048x1536[i];
+  	     } else {
+	         ModeIndex = ModeIndex_310_2048x1536[i];
+             }
+	  }
+          break;
+   }
+
+   return(ModeIndex);
+}
+
+USHORT
+SiS_CheckCalcModeIndex(ScrnInfoPtr pScrn, DisplayModePtr mode, int VBFlags)
+{
+   SISPtr pSiS = SISPTR(pScrn);
+   UShort i = (pSiS->CurrentLayout.bitsPerPixel+7)/8 - 1;    
+   UShort ModeIndex = 0;
+
+   if(VBFlags & CRT2_LCD) {
+
+      if( (mode->HDisplay <= pSiS->LCDwidth) &&
+          (mode->VDisplay <= pSiS->LCDheight) ) {
+
+        if(VBFlags & VB_LVDS) {        		/* LCD on LVDS */
+
+          switch(mode->HDisplay)
+  	  {
+	  case 512:
+		if(mode->VDisplay == 384) {
+		   if(pSiS->LCDwidth != 1024 || pSiS->LCDheight != 600) { /* not supported on 1024x600 panels */
+		      ModeIndex = ModeIndex_512x384[i];
+		   }
+		}
+		break;
+	  case 640:
+		if(mode->VDisplay == 480) {
+		   ModeIndex = ModeIndex_640x480[i];
+		} else if(mode->VDisplay == 400) {
+		   ModeIndex = ModeIndex_640x400[i];
+		}
+		break;
+	  case 800:
+		if(mode->VDisplay == 600) {
+		   ModeIndex = ModeIndex_800x600[i];
+		}
+		break;
+	  case 1024:
+		if(mode->VDisplay == 768) {
+		   ModeIndex = ModeIndex_1024x768[i];
+		} else if(pSiS->VGAEngine == SIS_300_VGA) {
+		   if(mode->VDisplay == 600) {
+		      if(pSiS->LCDheight == 600) {  /* This mode only supported on 1024x600 panels */
+		         ModeIndex = ModeIndex_1024x600[i];
+		      }
+		   }
+		}
+		break;
+	  case 1152:
+		if(pSiS->VGAEngine == SIS_300_VGA) {
+		   if(mode->VDisplay == 768) {
+			ModeIndex = ModeIndex_1152x768[i];
+		   }
+		}
+		break;
+	  case 1280:
+		if(mode->VDisplay == 1024) {
+		   ModeIndex = ModeIndex_1280x1024[i];
+		} else if(pSiS->VGAEngine == SIS_315_VGA) {
+		   if(mode->VDisplay == 768) {
+		      ModeIndex = ModeIndex_1280x768[i];
+		   }
+		}
+		break;
+	  case 1400:
+	        if(mode->VDisplay == 1050) {
+		   if(pSiS->VGAEngine == SIS_315_VGA) {
+		      ModeIndex = ModeIndex_1400x1050[i];
+		   }
+		}
+		break;
+          }
+
+        } else {                       	 	/* LCD on 301(B) */
+
+          switch(mode->HDisplay)
+	  {
+	  case 512:
+		if(mode->VDisplay == 384) {
+		   ModeIndex = ModeIndex_512x384[i];
+		}
+		break;
+	  case 640:
+		if(mode->VDisplay == 480) {
+		   ModeIndex = ModeIndex_640x480[i];
+		} else if(mode->VDisplay == 400) {
+		   ModeIndex = ModeIndex_640x400[i];
+		}
+		break;
+	  case 800:
+		if(mode->VDisplay == 600) {
+		   ModeIndex = ModeIndex_800x600[i];
+		}
+		break;
+	  case 1024:
+		if(mode->VDisplay == 768) {
+		   ModeIndex = ModeIndex_1024x768[i];
+		} 
+		break;
+	  case 1280:
+		if(mode->VDisplay == 960) {
+		   if(pSiS->VGAEngine == SIS_300_VGA) {
+		      ModeIndex = ModeIndex_300_1280x960[i];
+		   } else {
+		      ModeIndex = ModeIndex_310_1280x960[i];
+		   }
+                } else if (mode->VDisplay == 1024) {
+	             ModeIndex = ModeIndex_1280x1024[i];
+	        }
+		break;
+	  case 1400:
+	        if(mode->VDisplay == 1050) {
+		   if(pSiS->VGAEngine == SIS_315_VGA) {
+		      ModeIndex = ModeIndex_1400x1050[i];
+		   }
+		}
+		break;
+	  case 1600:
+		if(mode->VDisplay == 1200) {
+		   ModeIndex = ModeIndex_1600x1200[i];
+		}
+		break;
+	  }
+
+        }
+
+      }
+
+   } else if(VBFlags & CRT2_TV) {
+
+      if(VBFlags & VB_CHRONTEL) {		/* TV on Chrontel */
+
+        switch(mode->HDisplay)
+	{
+      	case 512:
+	        if(pSiS->VGAEngine == SIS_315_VGA) {
+		   if(mode->VDisplay == 384) {
+		      ModeIndex = ModeIndex_512x384[i];
+		   }
+		}
+		break;
+	case 640:
+		if(mode->VDisplay == 480) {
+		   ModeIndex = ModeIndex_640x480[i];
+		} else if(mode->VDisplay == 400) {
+		   ModeIndex = ModeIndex_640x400[i];
+		}
+		break;
+	case 800:
+		if(mode->VDisplay == 600) {
+		   ModeIndex = ModeIndex_800x600[i];
+		}
+		break;
+	case 1024:
+		if(mode->VDisplay == 768) {
+		   if(pSiS->VGAEngine == SIS_315_VGA) {
+		      ModeIndex = ModeIndex_1024x768[i];
+		   }
+		}
+		break;
+        }
+
+      } else {				    /* TV on 301(B/LV) */
+
+        switch(mode->HDisplay)
+	{
+      	case 512:
+		if(mode->VDisplay == 384) {
+		   ModeIndex = ModeIndex_512x384[i];
+		}
+		break;
+	case 640:
+		if(mode->VDisplay == 480) {
+		   ModeIndex = ModeIndex_640x480[i];
+		}
+		break;
+	case 720:
+                if(mode->VDisplay == 480) {
+                   ModeIndex = ModeIndex_720x480[i];
+                } else if(mode->VDisplay == 576) {
+                   ModeIndex = ModeIndex_720x576[i];
+                }
+                break;
+	case 800:
+		if(mode->VDisplay == 600) {
+		   ModeIndex = ModeIndex_800x600[i];
+		}
+		break;
+	case 1024:  /* Not supported with depth 32 */
+		if((mode->VDisplay == 768) && (i != 3) ) {
+		   if(VBFlags & (VB_301B|VB_302B|VB_30xLV|VB_30xLVX)) {
+		      ModeIndex = ModeIndex_1024x768[i];
+		   }
+		}
+		break;
+        }
+
+      }
+
+   } else if(VBFlags & CRT2_VGA) {		/* CRT2 is VGA2 */
+
+	switch(mode->HDisplay)
+	{
+	case 640:
+		if(mode->VDisplay == 480) {
+		   ModeIndex = ModeIndex_640x480[i];
+		} else if(mode->VDisplay == 400) {
+		   ModeIndex = ModeIndex_640x400[i];
+		}
+		break;
+	case 800:
+		if(mode->VDisplay == 600) {
+		   ModeIndex = ModeIndex_800x600[i];
+   	        } else if(mode->VDisplay == 480) {
+		   ModeIndex = ModeIndex_800x480[i];
+		}
+		break;
+	case 848:
+		if(mode->VDisplay == 480) {
+		   ModeIndex = ModeIndex_848x480[i];
+		}
+		break;
+	case 856:
+		if(mode->VDisplay == 480) {
+		   ModeIndex = ModeIndex_856x480[i];
+		}
+		break;		
+	case 1024:
+		if(mode->VDisplay == 768) {
+			ModeIndex = ModeIndex_1024x768[i];
+		} else if(mode->VDisplay == 576) {
+			ModeIndex = ModeIndex_1024x576[i];
+		}
+		break;
+	case 1152:
+	        if(mode->VDisplay == 864) {
+		   ModeIndex = ModeIndex_1152x864[i];
+		} else if(pSiS->VGAEngine == SIS_300_VGA) {
+		   if(mode->VDisplay == 768) {
+			ModeIndex = ModeIndex_1152x768[i];
+		   }
+		}
+		break;
+	case 1280:
+		if (mode->VDisplay == 1024) {
+		   ModeIndex = ModeIndex_1280x1024[i];
+		} else if (mode->VDisplay == 720) {
+		   ModeIndex = ModeIndex_1280x720[i];
+		} else if(pSiS->VGAEngine == SIS_315_VGA) {
+		   if (mode->VDisplay == 768) {
+			ModeIndex = ModeIndex_1280x768[i];
+		   }
+		}
+		break;
+	}
+
+   } else {				/* CRT1 only, no CRT2 */
+
+       ModeIndex = SiS_CalcModeIndex(pScrn, mode);
+
+   }
+
+   return(ModeIndex);
+}
+
+USHORT
+SiS_CheckBuildCustomMode(ScrnInfoPtr pScrn, DisplayModePtr mode, int VBFlags)
+{
+   SISPtr pSiS = SISPTR(pScrn);
+   int    out_n, out_dn, out_div, out_sbit, out_scale;
+   int    depth = pSiS->CurrentLayout.bitsPerPixel;
+   
+#ifdef SISDUALHEAD
+   if( ((!pSiS->DualHeadMode) && (VBFlags & DISPTYPE_DISP2)) ||
+       ((pSiS->DualHeadMode) && (!pSiS->SecondHead)) ) return 0;
+#else      
+   if(VBFlags & DISPTYPE_DISP2) return 0; 
+#endif   
+   
+   pSiS->SiS_Pr->CDClock = mode->Clock;
+   
+   pSiS->SiS_Pr->CHDisplay = mode->HDisplay;
+   pSiS->SiS_Pr->CHSyncStart = mode->HSyncStart;
+   pSiS->SiS_Pr->CHSyncEnd = mode->HSyncEnd;
+   pSiS->SiS_Pr->CHTotal = mode->HTotal;
+   pSiS->SiS_Pr->CHBlankStart = pSiS->SiS_Pr->CHDisplay;
+   pSiS->SiS_Pr->CHBlankEnd = pSiS->SiS_Pr->CHTotal;
+   
+   pSiS->SiS_Pr->CVDisplay = mode->VDisplay;
+   pSiS->SiS_Pr->CVSyncStart = mode->VSyncStart;
+   pSiS->SiS_Pr->CVSyncEnd = mode->VSyncEnd;
+   pSiS->SiS_Pr->CVTotal = mode->VTotal;
+   pSiS->SiS_Pr->CVBlankStart = pSiS->SiS_Pr->CVSyncStart - 1;
+   pSiS->SiS_Pr->CVBlankEnd = pSiS->SiS_Pr->CVTotal;
+   
+   pSiS->SiS_Pr->CFlags = mode->Flags;
+
+   SiS_compute_vclk(pSiS->SiS_Pr->CDClock, &out_n, &out_dn, &out_div, &out_sbit, &out_scale);
+   
+#ifdef TWDEBUG
+   xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Clock %d: n %d dn %d div %d sb %d sc %d\n",
+      	pSiS->SiS_Pr->CDClock, out_n, out_dn, out_div, out_sbit, out_scale);
+#endif	
+
+   pSiS->SiS_Pr->CSR2B = (out_div == 2) ? 0x80 : 0x00;
+   pSiS->SiS_Pr->CSR2B |= ((out_n - 1) & 0x7f);
+   pSiS->SiS_Pr->CSR2C = (out_dn - 1) & 0x1f;
+   pSiS->SiS_Pr->CSR2C |= (((out_scale - 1) & 3) << 5);
+   pSiS->SiS_Pr->CSR2C |= ((out_sbit & 0x01) << 7);
+   pSiS->SiS_Pr->CSRClock = (pSiS->SiS_Pr->CDClock / 1000) + 1;
+
+   pSiS->SiS_Pr->CCRT1CRTC[0]  =  ((pSiS->SiS_Pr->CHTotal >> 3) - 5) & 0xff;
+   pSiS->SiS_Pr->CCRT1CRTC[1]  =  (pSiS->SiS_Pr->CHDisplay >> 3) - 1;
+   pSiS->SiS_Pr->CCRT1CRTC[2]  =  (pSiS->SiS_Pr->CHBlankStart >> 3) - 1;
+   pSiS->SiS_Pr->CCRT1CRTC[3]  =  (((pSiS->SiS_Pr->CHBlankEnd >> 3) - 1) & 0x1F) | 0x80;
+   pSiS->SiS_Pr->CCRT1CRTC[4]  =  (pSiS->SiS_Pr->CHSyncStart >> 3) + 3;
+   pSiS->SiS_Pr->CCRT1CRTC[5]  =  ((((pSiS->SiS_Pr->CHBlankEnd >> 3) - 1) & 0x20) << 2) | 
+       				  (((pSiS->SiS_Pr->CHSyncEnd >> 3) + 3) & 0x1F);
+   
+   pSiS->SiS_Pr->CCRT1CRTC[6]  =  (pSiS->SiS_Pr->CVTotal - 2) & 0xFF;
+   pSiS->SiS_Pr->CCRT1CRTC[7]  =  (((pSiS->SiS_Pr->CVTotal - 2) & 0x100) >> 8)
+ 	 			| (((pSiS->SiS_Pr->CVDisplay - 1) & 0x100) >> 7)
+	 			| ((pSiS->SiS_Pr->CVSyncStart & 0x100) >> 6)
+	 			| (((pSiS->SiS_Pr->CVBlankStart - 1) & 0x100) >> 5)
+	 			| 0x10
+	 			| (((pSiS->SiS_Pr->CVTotal - 2) & 0x200)   >> 4)
+	 			| (((pSiS->SiS_Pr->CVDisplay - 1) & 0x200) >> 3)
+	 			| ((pSiS->SiS_Pr->CVSyncStart & 0x200) >> 2);
+    
+   pSiS->SiS_Pr->CCRT1CRTC[16] = ((((pSiS->SiS_Pr->CVBlankStart - 1) & 0x200) >> 4) >> 5); 	/* cr9 */
+    
+#if 0    
+   if (mode->VScan >= 32)
+	regp->CRTC[9] |= 0x1F;
+   else if (mode->VScan > 1)
+	regp->CRTC[9] |= mode->VScan - 1;
+#endif	
+
+   pSiS->SiS_Pr->CCRT1CRTC[8] =  (pSiS->SiS_Pr->CVSyncStart - 1) & 0xFF;	/* cr10 */
+   pSiS->SiS_Pr->CCRT1CRTC[9] =  ((pSiS->SiS_Pr->CVSyncEnd - 1) & 0x0F) | 0x80;	/* cr11 */
+   pSiS->SiS_Pr->CCRT1CRTC[10] = (pSiS->SiS_Pr->CVDisplay - 1) & 0xFF;		/* cr12 */
+   pSiS->SiS_Pr->CCRT1CRTC[11] = (pSiS->SiS_Pr->CVBlankStart - 1) & 0xFF;	/* cr15 */
+   pSiS->SiS_Pr->CCRT1CRTC[12] = (pSiS->SiS_Pr->CVBlankEnd - 1) & 0xFF;		/* cr16 */
+   
+   pSiS->SiS_Pr->CCRT1CRTC[13] = 
+                        GETBITSTR((pSiS->SiS_Pr->CVTotal     -2), 10:10, 0:0) |
+                        GETBITSTR((pSiS->SiS_Pr->CVDisplay   -1), 10:10, 1:1) |
+                        GETBITSTR((pSiS->SiS_Pr->CVBlankStart-1), 10:10, 2:2) |
+                        GETBITSTR((pSiS->SiS_Pr->CVSyncStart   ), 10:10, 3:3) |
+                        GETBITSTR((pSiS->SiS_Pr->CVBlankEnd  -1),   8:8, 4:4) |
+                        GETBITSTR((pSiS->SiS_Pr->CVSyncEnd   -1),   4:4, 5:5) ;  
+
+   pSiS->SiS_Pr->CCRT1CRTC[14] = 
+                        GETBITSTR((pSiS->SiS_Pr->CHTotal      >> 3) - 5, 9:8, 1:0) |
+                        GETBITSTR((pSiS->SiS_Pr->CHDisplay    >> 3) - 1, 9:8, 3:2) |
+                        GETBITSTR((pSiS->SiS_Pr->CHBlankStart >> 3) - 1, 9:8, 5:4) |
+                        GETBITSTR((pSiS->SiS_Pr->CHSyncStart  >> 3) + 3, 9:8, 7:6) ;
+
+        
+   pSiS->SiS_Pr->CCRT1CRTC[15] =
+                        GETBITSTR((pSiS->SiS_Pr->CHBlankEnd >> 3) - 1, 7:6, 1:0) |
+                        GETBITSTR((pSiS->SiS_Pr->CHSyncEnd  >> 3) + 3, 5:5, 2:2) ; 
+			
+   switch(depth) {
+   case 8: 			
+      	pSiS->SiS_Pr->CModeFlag = 0x223b;
+	break;
+   case 16: 			
+      	pSiS->SiS_Pr->CModeFlag = 0x227d;
+	break;
+   case 32: 			
+      	pSiS->SiS_Pr->CModeFlag = 0x22ff;
+	break;		
+   default: 
+   	return 0;	
+   }	
+   
+   if(pSiS->SiS_Pr->CFlags & V_DBLSCAN) 
+   	pSiS->SiS_Pr->CModeFlag |= DoubleScanMode;
+   if((pSiS->SiS_Pr->CVDisplay >= 1024)	|| 
+      (pSiS->SiS_Pr->CVTotal >= 1024)   || 
+      (pSiS->SiS_Pr->CHDisplay >= 1024))
+	pSiS->SiS_Pr->CModeFlag |= LineCompareOff;
+   if(pSiS->SiS_Pr->CFlags & V_CLKDIV2)
+        pSiS->SiS_Pr->CModeFlag |= HalfDCLK;
+   
+   pSiS->SiS_Pr->CInfoFlag = 0x0007;
+   if(pSiS->SiS_Pr->CFlags & V_NHSYNC) 
+   	pSiS->SiS_Pr->CInfoFlag |= 0x4000;
+   if(pSiS->SiS_Pr->CFlags & V_NVSYNC) 
+   	pSiS->SiS_Pr->CInfoFlag |= 0x8000;
+   if(pSiS->SiS_Pr->CFlags & V_INTERLACE)	
+	pSiS->SiS_Pr->CInfoFlag |= InterlaceMode;
+
+   pSiS->SiS_Pr->UseCustomMode = TRUE;
+#ifdef TWDEBUG
+   xf86DrvMsg(0, X_INFO, "Custom mode %dx%d:\n", 
+   	pSiS->SiS_Pr->CHDisplay,pSiS->SiS_Pr->CVDisplay);
+   xf86DrvMsg(0, X_INFO, "Modeflag %04x, Infoflag %04x\n",
+   	pSiS->SiS_Pr->CModeFlag, pSiS->SiS_Pr->CInfoFlag);
+   xf86DrvMsg(0, X_INFO, " {{0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,\n",
+   	pSiS->SiS_Pr->CCRT1CRTC[0],
+	pSiS->SiS_Pr->CCRT1CRTC[1],
+	pSiS->SiS_Pr->CCRT1CRTC[2],
+	pSiS->SiS_Pr->CCRT1CRTC[3],
+	pSiS->SiS_Pr->CCRT1CRTC[4],
+	pSiS->SiS_Pr->CCRT1CRTC[5],
+	pSiS->SiS_Pr->CCRT1CRTC[6],
+	pSiS->SiS_Pr->CCRT1CRTC[7]);
+   xf86DrvMsg(0, X_INFO, "  0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,\n",
+   	pSiS->SiS_Pr->CCRT1CRTC[8],
+	pSiS->SiS_Pr->CCRT1CRTC[9],
+	pSiS->SiS_Pr->CCRT1CRTC[10],
+	pSiS->SiS_Pr->CCRT1CRTC[11],
+	pSiS->SiS_Pr->CCRT1CRTC[12],
+	pSiS->SiS_Pr->CCRT1CRTC[13],
+	pSiS->SiS_Pr->CCRT1CRTC[14],
+	pSiS->SiS_Pr->CCRT1CRTC[15]);
+   xf86DrvMsg(0, X_INFO, "  0x%02x}},\n", pSiS->SiS_Pr->CCRT1CRTC[16]);
+   xf86DrvMsg(0, X_INFO, "Clock: 0x%02x, 0x%02x, %d\n",
+   	pSiS->SiS_Pr->CSR2B,
+	pSiS->SiS_Pr->CSR2C,
+	pSiS->SiS_Pr->CSRClock);
+#endif   	
+   return 1;
+}
+
+/* TW: Build a list of supported modes */
+DisplayModePtr
+SiSBuildBuiltInModeList(ScrnInfoPtr pScrn)
+{
+   SISPtr         pSiS = SISPTR(pScrn);
+   unsigned short VRE, VBE, VRS, VBS, VDE, VT;
+   unsigned short HRE, HBE, HRS, HBS, HDE, HT;
+   unsigned char  sr_data, cr_data, cr_data2, cr_data3;
+   unsigned char  sr2b, sr2c;
+   float          num, denum, postscalar, divider;
+   int            A, B, C, D, E, F, temp, i, j, index, vclkindex;
+   DisplayModePtr new = NULL, current = NULL, first = NULL, backup = NULL;
+
+   pSiS->backupmodelist = NULL;
+   
+   /* Initialize our pointers */
+   if(pSiS->VGAEngine == SIS_300_VGA) {
+#ifdef SIS300
+	InitTo300Pointer(pSiS->SiS_Pr, &pSiS->sishw_ext);
+#else
+	return NULL;
+#endif
+   } else if(pSiS->VGAEngine == SIS_315_VGA) {
+#ifdef SIS315H
+       	InitTo310Pointer(pSiS->SiS_Pr, &pSiS->sishw_ext);
+#else
+	return NULL;
+#endif
+   } else return NULL;
+
+   i = 0;
+   while(pSiS->SiS_Pr->SiS_RefIndex[i].Ext_InfoFlag != 0xFFFF) {
+
+      index = pSiS->SiS_Pr->SiS_RefIndex[i].Ext_CRT1CRTC;
+#if 0 /* Not any longer */    
+      if(pSiS->VGAEngine == SIS_300_VGA) index &= 0x3F;
+#endif      
+
+      if(((pSiS->SiS_Pr->SiS_RefIndex[i].XRes < 512) && (!pSiS->DSTN)) ||
+      	 ((pSiS->DSTN) &&
+	  (pSiS->SiS_Pr->SiS_RefIndex[i].XRes < 512) &&
+	  (pSiS->SiS_Pr->SiS_RefIndex[i].XRes != 320) &&
+	  (pSiS->SiS_Pr->SiS_RefIndex[i].YRes != 480)))  {
+           i++;
+      	   continue;
+      }
+      
+      if(!(new = xalloc(sizeof(DisplayModeRec)))) return first;
+      memset(new, 0, sizeof(DisplayModeRec));
+      if(!(new->name = xalloc(10))) {
+      		xfree(new);
+		return first;
+      }
+      if(!first) first = new;
+      if(current) {
+         current->next = new;
+	 new->prev = current;
+      }
+
+      current = new;
+      
+      sprintf(current->name, "%dx%d", pSiS->SiS_Pr->SiS_RefIndex[i].XRes,
+                                      pSiS->SiS_Pr->SiS_RefIndex[i].YRes);
+
+      current->status = MODE_OK;
+
+      current->type = M_T_DEFAULT; 
+
+      vclkindex = pSiS->SiS_Pr->SiS_RefIndex[i].Ext_CRTVCLK;
+      if(pSiS->VGAEngine == SIS_300_VGA) vclkindex &= 0x3F;
+
+      sr2b = pSiS->SiS_Pr->SiS_VCLKData[vclkindex].SR2B;
+      sr2c = pSiS->SiS_Pr->SiS_VCLKData[vclkindex].SR2C;
+
+      divider = (sr2b & 0x80) ? 2.0 : 1.0;
+      postscalar = (sr2c & 0x80) ?
+              ( (((sr2c >> 5) & 0x03) == 0x02) ? 6.0 : 8.0) : (((sr2c >> 5) & 0x03) + 1.0);
+      num = (sr2b & 0x7f) + 1.0;
+      denum = (sr2c & 0x1f) + 1.0;
+      
+#ifdef TWDEBUG
+      xf86DrvMsg(0, X_INFO, "------------\n");
+      xf86DrvMsg(0, X_INFO, "sr2b: %x sr2c %x div %f ps %f num %f denum %f\n",
+         sr2b, sr2c, divider, postscalar, num, denum);
+#endif
+
+      current->Clock = (int)(14318 * (divider / postscalar) * (num / denum));
+
+      sr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[14];
+	/* inSISIDXREG(SISSR, 0x0b, sr_data); */
+
+      cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[0];
+	/* inSISIDXREG(SISCR, 0x00, cr_data); */
+
+      /* Horizontal total */
+      HT = (cr_data & 0xff) |
+           ((unsigned short) (sr_data & 0x03) << 8);
+      A = HT + 5;
+
+      cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[1];
+	/* inSISIDXREG(SISCR, 0x01, cr_data); */
+
+      /* Horizontal display enable end */
+      HDE = (cr_data & 0xff) |
+            ((unsigned short) (sr_data & 0x0C) << 6);
+      E = HDE + 1;
+
+      cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[4];
+	/* inSISIDXREG(SISCR, 0x04, cr_data); */
+
+      /* Horizontal retrace (=sync) start */
+      HRS = (cr_data & 0xff) |
+            ((unsigned short) (sr_data & 0xC0) << 2);
+      F = HRS - E - 3;
+
+      cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[2];
+	/* inSISIDXREG(SISCR, 0x02, cr_data); */
+
+      /* Horizontal blank start */
+      HBS = (cr_data & 0xff) |
+            ((unsigned short) (sr_data & 0x30) << 4);
+
+      sr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[15];
+	/* inSISIDXREG(SISSR, 0x0c, sr_data); */
+
+      cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[3];
+	/* inSISIDXREG(SISCR, 0x03, cr_data);  */
+
+      cr_data2 = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[5];
+	/* inSISIDXREG(SISCR, 0x05, cr_data2); */
+
+      /* Horizontal blank end */
+      HBE = (cr_data & 0x1f) |
+            ((unsigned short) (cr_data2 & 0x80) >> 2) |
+	    ((unsigned short) (sr_data & 0x03) << 6);
+
+      /* Horizontal retrace (=sync) end */
+      HRE = (cr_data2 & 0x1f) | ((sr_data & 0x04) << 3);
+
+      temp = HBE - ((E - 1) & 255);
+      B = (temp > 0) ? temp : (temp + 256);
+
+      temp = HRE - ((E + F + 3) & 63);
+      C = (temp > 0) ? temp : (temp + 64);
+
+      D = B - F - C;
+
+      current->HDisplay   = (E * 8);
+      current->HSyncStart = (E * 8) + (F * 8);
+      current->HSyncEnd   = (E * 8) + (F * 8) + (C * 8);
+      current->HTotal     = (E * 8) + (F * 8) + (C * 8) + (D * 8);
+
+#ifdef TWDEBUG
+      xf86DrvMsg(0, X_INFO,
+        "H: A %d B %d C %d D %d E %d F %d  HT %d HDE %d HRS %d HBS %d HBE %d HRE %d\n",
+      	A, B, C, D, E, F, HT, HDE, HRS, HBS, HBE, HRE);
+#endif
+
+      sr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[13];
+	/* inSISIDXREG(SISSR, 0x0A, sr_data); */
+
+      cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[6];
+        /* inSISIDXREG(SISCR, 0x06, cr_data); */
+
+      cr_data2 = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[7];
+        /* inSISIDXREG(SISCR, 0x07, cr_data2);  */
+
+      /* Vertical total */
+      VT = (cr_data & 0xFF) |
+           ((unsigned short) (cr_data2 & 0x01) << 8) |
+	   ((unsigned short)(cr_data2 & 0x20) << 4) |
+	   ((unsigned short) (sr_data & 0x01) << 10);
+      A = VT + 2;
+
+      cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[10];
+	/* inSISIDXREG(SISCR, 0x12, cr_data);  */
+
+      /* Vertical display enable end */
+      VDE = (cr_data & 0xff) |
+            ((unsigned short) (cr_data2 & 0x02) << 7) |
+	    ((unsigned short) (cr_data2 & 0x40) << 3) |
+	    ((unsigned short) (sr_data & 0x02) << 9);
+      E = VDE + 1;
+
+      cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[8];
+	/* inSISIDXREG(SISCR, 0x10, cr_data); */
+
+      /* Vertical retrace (=sync) start */
+      VRS = (cr_data & 0xff) |
+            ((unsigned short) (cr_data2 & 0x04) << 6) |
+	    ((unsigned short) (cr_data2 & 0x80) << 2) |
+	    ((unsigned short) (sr_data & 0x08) << 7);
+      F = VRS + 1 - E;
+
+      cr_data =  pSiS->SiS_Pr->SiS_CRT1Table[index].CR[11];
+	/* inSISIDXREG(SISCR, 0x15, cr_data);  */
+
+      cr_data3 = (pSiS->SiS_Pr->SiS_CRT1Table[index].CR[16] & 0x01) << 5;
+	/* inSISIDXREG(SISCR, 0x09, cr_data3);  */
+
+      /* Vertical blank start */
+      VBS = (cr_data & 0xff) |
+            ((unsigned short) (cr_data2 & 0x08) << 5) |
+	    ((unsigned short) (cr_data3 & 0x20) << 4) |
+	    ((unsigned short) (sr_data & 0x04) << 8);
+
+      cr_data =  pSiS->SiS_Pr->SiS_CRT1Table[index].CR[12];
+	/* inSISIDXREG(SISCR, 0x16, cr_data); */
+
+      /* Vertical blank end */
+      VBE = (cr_data & 0xff) |
+            ((unsigned short) (sr_data & 0x10) << 4);
+      temp = VBE - ((E - 1) & 511);
+      B = (temp > 0) ? temp : (temp + 512);
+
+      cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[9];
+	/* inSISIDXREG(SISCR, 0x11, cr_data); */
+
+      /* Vertical retrace (=sync) end */
+      VRE = (cr_data & 0x0f) | ((sr_data & 0x20) >> 1);
+      temp = VRE - ((E + F - 1) & 31);
+      C = (temp > 0) ? temp : (temp + 32);
+
+      D = B - F - C;
+
+      current->VDisplay   = VDE + 1;
+      current->VSyncStart = VRS + 1;
+      current->VSyncEnd   = ((VRS & ~0x1f) | VRE) + 1;
+      if(VRE <= (VRS & 0x1f)) current->VSyncEnd += 32;
+      current->VTotal     = E + D + C + F;
+
+#if 0
+      current->VDisplay   = E;
+      current->VSyncStart = E + D;
+      current->VSyncEnd   = E + D + C;
+      current->VTotal     = E + D + C + F;
+#endif
+
+#ifdef TWDEBUG
+      xf86DrvMsg(0, X_INFO,
+        "V: A %d B %d C %d D %d E %d F %d  VT %d VDE %d VRS %d VBS %d VBE %d VRE %d\n",
+      	A, B, C, D, E, F, VT, VDE, VRS, VBS, VBE, VRE);
+#endif
+
+      if(pSiS->SiS_Pr->SiS_RefIndex[i].Ext_InfoFlag & 0x4000)
+          current->Flags |= V_NHSYNC;
+      else
+          current->Flags |= V_PHSYNC;
+
+      if(pSiS->SiS_Pr->SiS_RefIndex[i].Ext_InfoFlag & 0x8000)
+      	  current->Flags |= V_NVSYNC;
+      else
+          current->Flags |= V_PVSYNC;
+
+      if(pSiS->SiS_Pr->SiS_RefIndex[i].Ext_InfoFlag & 0x0080)
+          current->Flags |= V_INTERLACE;
+
+      j = 0;
+      while(pSiS->SiS_Pr->SiS_EModeIDTable[j].Ext_ModeID != 0xff) {
+          if(pSiS->SiS_Pr->SiS_EModeIDTable[j].Ext_ModeID ==
+	                  pSiS->SiS_Pr->SiS_RefIndex[i].ModeID) {
+              if(pSiS->SiS_Pr->SiS_EModeIDTable[j].Ext_ModeFlag & DoubleScanMode) {
+	      	  current->Flags |= V_DBLSCAN;
+              }
+	      break;
+          }
+	  j++;
+      }
+
+      if(current->Flags & V_INTERLACE) {
+         current->VDisplay <<= 1;
+	 current->VSyncStart <<= 1;
+	 current->VSyncEnd <<= 1;
+	 current->VTotal <<= 1;
+	 current->VTotal |= 1; 
+      }
+      if(current->Flags & V_DBLSCAN) {
+         current->Clock >>= 1;
+	 current->VDisplay >>= 1;
+	 current->VSyncStart >>= 1;
+	 current->VSyncEnd >>= 1;
+	 current->VTotal >>= 1;
+      }
+
+      if((backup = xalloc(sizeof(DisplayModeRec)))) {
+         if(!pSiS->backupmodelist) pSiS->backupmodelist = backup;
+	 else {
+	    pSiS->backupmodelist->next = backup;
+	    backup->prev = pSiS->backupmodelist;
+	 }
+	 backup->next = NULL;
+	 backup->HDisplay = current->HDisplay;
+         backup->HSyncStart = current->HSyncStart;
+         backup->HSyncEnd = current->HSyncEnd;
+         backup->HTotal = current->HTotal;
+         backup->VDisplay = current->VDisplay;
+         backup->VSyncStart = current->VSyncStart;
+         backup->VSyncEnd = current->VSyncEnd;
+         backup->VTotal = current->VTotal;
+	 backup->Flags = current->Flags;
+	 backup->Clock = current->Clock;
+      }
+
+#ifdef TWDEBUG
+      xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+      	"Built-in: %s %.2f %d %d %d %d %d %d %d %d\n",
+	current->name, (float)current->Clock / 1000,
+	current->HDisplay, current->HSyncStart, current->HSyncEnd, current->HTotal,
+	current->VDisplay, current->VSyncStart, current->VSyncEnd, current->VTotal);
+#endif
+
+      i++;
+   }
+
+   return first;
+
+}
+
+#define MODEID_OFF 0x449
+
+unsigned char
+SiS_GetSetModeID(ScrnInfoPtr pScrn, unsigned char id)
+{
+    return(SiS_GetSetBIOSScratch(pScrn, MODEID_OFF, id));
+}
+
+unsigned char
+SiS_GetSetBIOSScratch(ScrnInfoPtr pScrn, USHORT offset, unsigned char value)
+{
+    unsigned char ret;
+    unsigned char *base;
+
+    base = xf86MapVidMem(pScrn->scrnIndex, VIDMEM_MMIO, 0, 0x2000);
+    if(!base) {
+	     xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+	          "(init.c: Could not map BIOS scratch area)\n");
+	     return 0;
+    }
+
+    ret = *(base + offset);
+
+    /* value != 0xff means: set register */
+    if (value != 0xff)
+	*(base + offset) = value;
+
+    xf86UnMapVidMem(pScrn->scrnIndex, base, 0x2000);
+
+    return ret;
+}
+
+#endif
+
+
+
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/sis/init.h b/xc/programs/Xserver/hw/xfree86/drivers/sis/init.h
new file mode 100644
index 000000000..86635092d
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/sis/init.h
@@ -0,0 +1,316 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/init.h,v 1.5 2003/02/10 01:14:16 tsi Exp $ */
+
+#ifndef _INIT_
+#define _INIT_
+
+#include "osdef.h"
+#include "initdef.h"
+#include "vgatypes.h"
+#include "vstruct.h"
+
+#ifdef TC
+#include <stdio.h>
+#include <string.h>
+#include <conio.h>
+#include <dos.h>
+#include <stdlib.h>
+#endif
+
+#ifdef LINUX_XF86
+#include "xf86.h"
+#include "xf86Pci.h"
+#include "xf86PciInfo.h"
+#include "xf86_OSproc.h"
+#include "sis.h"
+#include "sis_regs.h"
+#endif
+
+#ifdef LINUX_KERNEL
+#include <linux/types.h>
+#include <asm/io.h>
+#include <linux/sisfb.h>
+#endif
+
+#ifdef WIN2000
+#include <stdio.h>
+#include <string.h>
+#include <miniport.h>
+#include "dderror.h"
+#include "devioctl.h"
+#include "miniport.h"
+#include "ntddvdeo.h"
+#include "video.h"
+#include "sisv.h"
+#include "tools.h"
+#endif
+
+const USHORT SiS_DRAMType[17][5]={
+	{0x0C,0x0A,0x02,0x40,0x39},
+	{0x0D,0x0A,0x01,0x40,0x48},
+	{0x0C,0x09,0x02,0x20,0x35},
+	{0x0D,0x09,0x01,0x20,0x44},
+	{0x0C,0x08,0x02,0x10,0x31},
+	{0x0D,0x08,0x01,0x10,0x40},
+	{0x0C,0x0A,0x01,0x20,0x34},
+	{0x0C,0x09,0x01,0x08,0x32},
+	{0x0B,0x08,0x02,0x08,0x21},
+	{0x0C,0x08,0x01,0x08,0x30},
+	{0x0A,0x08,0x02,0x04,0x11},
+	{0x0B,0x0A,0x01,0x10,0x28},
+	{0x09,0x08,0x02,0x02,0x01},
+	{0x0B,0x09,0x01,0x08,0x24},
+	{0x0B,0x08,0x01,0x04,0x20},
+	{0x0A,0x08,0x01,0x02,0x10},
+	{0x09,0x08,0x01,0x01,0x00}
+};
+
+const USHORT SiS_SDRDRAM_TYPE[13][5] =
+{
+	{ 2,12, 9,64,0x35},
+	{ 1,13, 9,64,0x44},
+	{ 2,12, 8,32,0x31},
+	{ 2,11, 9,32,0x25},
+	{ 1,12, 9,32,0x34},
+	{ 1,13, 8,32,0x40},
+	{ 2,11, 8,16,0x21},
+	{ 1,12, 8,16,0x30},
+	{ 1,11, 9,16,0x24},
+	{ 1,11, 8, 8,0x20},
+	{ 2, 9, 8, 4,0x01},
+	{ 1,10, 8, 4,0x10},
+	{ 1, 9, 8, 2,0x00}
+};
+
+const USHORT SiS_DDRDRAM_TYPE[4][5] =
+{
+	{ 2,12, 9,64,0x35},
+	{ 2,12, 8,32,0x31},
+	{ 2,11, 8,16,0x21},
+	{ 2, 9, 8, 4,0x01}
+};
+
+const USHORT SiS_MDA_DAC[] =
+{
+	0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+        0x15,0x15,0x15,0x15,0x15,0x15,0x15,0x15,
+        0x15,0x15,0x15,0x15,0x15,0x15,0x15,0x15,
+        0x3F,0x3F,0x3F,0x3F,0x3F,0x3F,0x3F,0x3F,
+        0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+        0x15,0x15,0x15,0x15,0x15,0x15,0x15,0x15,
+        0x15,0x15,0x15,0x15,0x15,0x15,0x15,0x15,
+        0x3F,0x3F,0x3F,0x3F,0x3F,0x3F,0x3F,0x3F
+};
+
+const USHORT SiS_CGA_DAC[] =
+{
+        0x00,0x10,0x04,0x14,0x01,0x11,0x09,0x15,
+        0x00,0x10,0x04,0x14,0x01,0x11,0x09,0x15,
+        0x2A,0x3A,0x2E,0x3E,0x2B,0x3B,0x2F,0x3F,
+        0x2A,0x3A,0x2E,0x3E,0x2B,0x3B,0x2F,0x3F,
+        0x00,0x10,0x04,0x14,0x01,0x11,0x09,0x15,
+        0x00,0x10,0x04,0x14,0x01,0x11,0x09,0x15,
+        0x2A,0x3A,0x2E,0x3E,0x2B,0x3B,0x2F,0x3F,
+        0x2A,0x3A,0x2E,0x3E,0x2B,0x3B,0x2F,0x3F
+};
+
+const USHORT SiS_EGA_DAC[] =
+{
+        0x00,0x10,0x04,0x14,0x01,0x11,0x05,0x15,
+        0x20,0x30,0x24,0x34,0x21,0x31,0x25,0x35,
+        0x08,0x18,0x0C,0x1C,0x09,0x19,0x0D,0x1D,
+        0x28,0x38,0x2C,0x3C,0x29,0x39,0x2D,0x3D,
+        0x02,0x12,0x06,0x16,0x03,0x13,0x07,0x17,
+        0x22,0x32,0x26,0x36,0x23,0x33,0x27,0x37,
+        0x0A,0x1A,0x0E,0x1E,0x0B,0x1B,0x0F,0x1F,
+        0x2A,0x3A,0x2E,0x3E,0x2B,0x3B,0x2F,0x3F
+};
+
+const USHORT SiS_VGA_DAC[] =
+{
+	0x00,0x10,0x04,0x14,0x01,0x11,0x09,0x15,
+	0x2A,0x3A,0x2E,0x3E,0x2B,0x3B,0x2F,0x3F,
+	0x00,0x05,0x08,0x0B,0x0E,0x11,0x14,0x18,
+	0x1C,0x20,0x24,0x28,0x2D,0x32,0x38,0x3F,
+	0x00,0x10,0x1F,0x2F,0x3F,0x1F,0x27,0x2F,
+	0x37,0x3F,0x2D,0x31,0x36,0x3A,0x3F,0x00,
+	0x07,0x0E,0x15,0x1C,0x0E,0x11,0x15,0x18,
+	0x1C,0x14,0x16,0x18,0x1A,0x1C,0x00,0x04,
+	0x08,0x0C,0x10,0x08,0x0A,0x0C,0x0E,0x10,
+	0x0B,0x0C,0x0D,0x0F,0x10
+};
+
+void     SiS_SetReg1(USHORT, USHORT, USHORT);
+void     SiS_SetReg2(SiS_Private *, USHORT, USHORT, USHORT);
+void     SiS_SetReg3(USHORT, USHORT);
+void     SiS_SetReg4(USHORT, ULONG);
+void     SiS_SetReg5(USHORT, USHORT);
+UCHAR    SiS_GetReg1(USHORT, USHORT);
+UCHAR    SiS_GetReg2(USHORT);
+ULONG    SiS_GetReg3(USHORT);
+USHORT   SiS_GetReg4(USHORT);
+void     SiS_ClearDAC(SiS_Private *SiS_Pr, ULONG);
+void     SiS_SetMemoryClock(SiS_Private *SiS_Pr, UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiS_SetDRAMModeRegister(SiS_Private *SiS_Pr, UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension);
+BOOLEAN  SiS_SearchVBModeID(SiS_Private *SiS_Pr, UCHAR *ROMAddr, USHORT *ModeNo);
+void     SiS_IsLowResolution(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex);
+
+#ifdef SIS300
+void     SiS_SetDRAMSize_300(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension);
+USHORT   SiS_ChkBUSWidth_300(SiS_Private *SiS_Pr, ULONG FBAddress);
+#endif
+
+#ifdef SIS315H
+UCHAR    SiS_Get310DRAMType(SiS_Private *SiS_Pr, UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiS_DDR_MRS(SiS_Private *SiS_Pr);
+void     SiS_SDR_MRS(SiS_Private *SiS_Pr);
+void     SiS_DisableRefresh(SiS_Private *SiS_Pr);
+void     SiS_EnableRefresh(SiS_Private *SiS_Pr, UCHAR *ROMAddr);
+void     SiS_SetDRAMSize_310(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO);
+void     SiS_DisableChannelInterleaving(SiS_Private *SiS_Pr, int index,USHORT SiS_DDRDRAM_TYPE[][5]);
+void     SiS_SetDRAMSizingType(SiS_Private *SiS_Pr, int index,USHORT DRAMTYPE_TABLE[][5]);
+void     SiS_CheckBusWidth_310(SiS_Private *SiS_Pr, UCHAR *ROMAddress,ULONG FBAddress,
+                               PSIS_HW_DEVICE_INFO HwDeviceExtension);
+int      SiS_SetRank(SiS_Private *SiS_Pr, int index,UCHAR RankNo,USHORT DRAMTYPE_TABLE[][5]);
+int      SiS_SetDDRChannel(SiS_Private *SiS_Pr, int index,UCHAR ChannelNo,
+                           USHORT DRAMTYPE_TABLE[][5]);
+int      SiS_CheckColumn(SiS_Private *SiS_Pr, int index,USHORT DRAMTYPE_TABLE[][5],ULONG FBAddress);
+int      SiS_CheckBanks(SiS_Private *SiS_Pr, int index,USHORT DRAMTYPE_TABLE[][5],ULONG FBAddress);
+int      SiS_CheckRank(SiS_Private *SiS_Pr, int RankNo,int index,USHORT DRAMTYPE_TABLE[][5],ULONG FBAddress);
+int      SiS_CheckDDRRank(SiS_Private *SiS_Pr, int RankNo,int index,USHORT DRAMTYPE_TABLE[][5],ULONG FBAddress);
+int      SiS_CheckRanks(SiS_Private *SiS_Pr, int RankNo,int index,USHORT DRAMTYPE_TABLE[][5],ULONG FBAddress);
+int      SiS_CheckDDRRanks(SiS_Private *SiS_Pr, int RankNo,int index,USHORT DRAMTYPE_TABLE[][5],ULONG FBAddress);
+int      SiS_SDRSizing(SiS_Private *SiS_Pr, ULONG FBAddress);
+int      SiS_DDRSizing(SiS_Private *SiS_Pr, ULONG FBAddress);
+int      Is315E(SiS_Private *SiS_Pr);
+void     SiS_VerifyMclk(SiS_Private *SiS_Pr, ULONG FBAddr);
+#endif
+
+void     SiS_HandleCRT1(SiS_Private *SiS_Pr);
+void     SiS_Handle301B_1400x1050(SiS_Private *SiS_Pr, USHORT ModeNo);
+void     SiS_SetEnableDstn(SiS_Private *SiS_Pr);
+void     SiS_Delay15us(SiS_Private *SiS_Pr);
+BOOLEAN  SiS_SearchModeID(SiS_Private *SiS_Pr, UCHAR *ROMAddr, USHORT *ModeNo,USHORT *ModeIdIndex);
+BOOLEAN  SiS_CheckMemorySize(SiS_Private *SiS_Pr, UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension,
+                             USHORT ModeNo,USHORT ModeIdIndex);
+UCHAR    SiS_GetModePtr(SiS_Private *SiS_Pr, UCHAR *ROMAddr, USHORT ModeNo,USHORT ModeIdIndex);
+void     SiS_SetSeqRegs(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT StandTableIndex);
+void     SiS_SetMiscRegs(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT StandTableIndex);
+void     SiS_SetCRTCRegs(SiS_Private *SiS_Pr, UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension,
+                         USHORT StandTableIndex);
+void     SiS_SetATTRegs(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT StandTableIndex,
+                        PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiS_SetGRCRegs(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT StandTableIndex);
+void     SiS_ClearExt1Regs(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiS_SetSync(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT RefreshRateTableIndex);
+void     SiS_SetCRT1CRTC(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                         USHORT RefreshRateTableIndex,
+			 PSIS_HW_DEVICE_INFO HwDeviceExtension);
+BOOLEAN  SiS_GetLCDACRT1Ptr(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                            USHORT RefreshRateTableIndex,USHORT *ResInfo,USHORT *DisplayType);
+void     SiS_ResetCRT1VCLK(SiS_Private *SiS_Pr, UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiS_SetCRT1VCLK(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,PSIS_HW_DEVICE_INFO,
+                         USHORT RefreshRateTableIndex);
+void     SiS_SetVCLKState(SiS_Private *SiS_Pr, UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO, USHORT ModeNo,
+                          USHORT RefreshRateTableIndex, USHORT ModeIdIndex);
+void     SiS_LoadDAC(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex);
+void     SiS_WriteDAC(SiS_Private *SiS_Pr, USHORT, USHORT, USHORT, USHORT, USHORT, USHORT);
+void     SiS_DisplayOn(SiS_Private *SiS_Pr);
+void 	 SiS_DisplayOff(SiS_Private *SiS_Pr);
+void     SiS_SetCRT1ModeRegs(SiS_Private *SiS_Pr, UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO,USHORT ModeNo,
+                             USHORT ModeIdIndex,USHORT RefreshRateTableIndex);
+void     SiS_GetVBType(SiS_Private *SiS_Pr, USHORT BaseAddr,PSIS_HW_DEVICE_INFO);
+USHORT   SiS_ChkBUSWidth(SiS_Private *SiS_Pr, UCHAR *ROMAddr);
+USHORT   SiS_GetModeIDLength(SiS_Private *SiS_Pr, UCHAR *ROMAddr, USHORT);
+USHORT   SiS_GetRefindexLength(SiS_Private *SiS_Pr, UCHAR *ROMAddr, USHORT);
+void     SiS_SetInterlace(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT RefreshRateTableIndex);
+void     SiS_Set_LVDS_TRUMPION(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiS_SetCRT1Offset(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT,USHORT,USHORT,PSIS_HW_DEVICE_INFO);
+#ifdef SIS315H
+void     SiS_SetCRT1FIFO_310(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT,USHORT,PSIS_HW_DEVICE_INFO);
+#endif
+#ifdef SIS300
+void     SiS_SetCRT1FIFO_300(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,PSIS_HW_DEVICE_INFO,
+                             USHORT RefreshRateTableIndex);
+void     SiS_SetCRT1FIFO_630(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,PSIS_HW_DEVICE_INFO,
+                             USHORT RefreshRateTableIndex);
+USHORT   SiS_CalcDelay(SiS_Private *SiS_Pr, UCHAR *ROMAddr, USHORT VCLK,
+                       USHORT colordepth, USHORT MCLK);
+USHORT   SiS_DoCalcDelay(SiS_Private *SiS_Pr, USHORT MCLK, USHORT VCLK, USHORT colordepth, USHORT key);
+USHORT   SiS_CalcDelay2(SiS_Private *SiS_Pr, UCHAR *ROMAddr, UCHAR,PSIS_HW_DEVICE_INFO HwDeviceExtension);
+#endif
+void     SiS_ClearBuffer(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO,USHORT ModeNo);
+void     SiS_SetCRT1Group(SiS_Private *SiS_Pr, UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension,
+                          USHORT ModeNo,USHORT ModeIdIndex,USHORT BaseAddr);
+void     SiS_DetectMonitor(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr);
+void     SiS_GetSenseStatus(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,UCHAR *ROMAddr);
+USHORT   SiS_TestMonitorType(SiS_Private *SiS_Pr, UCHAR R_DAC,UCHAR G_DAC,UCHAR B_DAC);
+USHORT   SiS_SenseCHTV(SiS_Private *SiS_Pr);
+BOOLEAN  SiS_Sense(SiS_Private *SiS_Pr, USHORT tempbx,USHORT tempcx);
+BOOLEAN  SiS_GetPanelID(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO);
+BOOLEAN  SiS_GetLCDDDCInfo(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO);
+USHORT   SiS_SenseLCD(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO);
+void     SiSRegInit(SiS_Private *SiS_Pr, USHORT BaseAddr);
+void     SiSInitPtr(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiSSetLVDSetc(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT ModeNo);
+void     SiSInitPCIetc(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiSDetermineROMUsage(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, UCHAR *ROMAddr);
+
+#ifdef LINUX_XF86
+USHORT  	SiS_CalcModeIndex(ScrnInfoPtr pScrn, DisplayModePtr mode);
+USHORT  	SiS_CheckCalcModeIndex(ScrnInfoPtr pScrn, DisplayModePtr mode, int VBFlags);
+USHORT 		SiS_CheckBuildCustomMode(ScrnInfoPtr pScrn, DisplayModePtr mode, int VBFlags);
+void    	SiS_SetPitch(SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, UShort BaseAddr);
+void    	SiS_SetPitchCRT1(SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, UShort BaseAddr);
+void    	SiS_SetPitchCRT2(SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, UShort BaseAddr);
+unsigned char 	SiS_GetSetModeID(ScrnInfoPtr pScrn, unsigned char id);
+unsigned char 	SiS_GetSetBIOSScratch(ScrnInfoPtr pScrn, USHORT offset, unsigned char value);
+extern int      SiS_compute_vclk(int Clock, int *out_n, int *out_dn, int *out_div,
+	     	 		    int *out_sbit, int *out_scale);
+#endif
+
+extern USHORT    SiS_GetOffset(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                       USHORT RefreshRateTableIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension);
+extern USHORT    SiS_GetColorDepth(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex);
+extern void      SiS_DisableBridge(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr);
+extern BOOLEAN   SiS_SetCRT2Group301(SiS_Private *SiS_Pr, USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,
+                                     PSIS_HW_DEVICE_INFO HwDeviceExtension);
+extern void      SiS_PresetScratchregister(SiS_Private *SiS_Pr, USHORT SiS_P3d4,
+                                           PSIS_HW_DEVICE_INFO HwDeviceExtension);
+extern void      SiS_UnLockCRT2(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr);
+extern void      SiS_LockCRT2(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr);
+extern BOOLEAN   SiS_BridgeIsOn(SiS_Private *SiS_Pr, USHORT BaseAddr);
+extern BOOLEAN   SiS_BridgeIsEnable(SiS_Private *SiS_Pr, USHORT BaseAddr,PSIS_HW_DEVICE_INFO );
+extern void      SiS_GetVBInfo(SiS_Private *SiS_Pr, USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,
+                               USHORT ModeIdIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension, int chkcrt2mode);
+extern BOOLEAN   SiS_GetLCDResInfo(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,
+                                   USHORT ModeIdIndex, PSIS_HW_DEVICE_INFO HwDeviceExtension);
+extern void      SiS_SetHiVision(SiS_Private *SiS_Pr, USHORT BaseAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension);
+extern USHORT    SiS_GetRatePtrCRT2(SiS_Private *SiS_Pr, UCHAR *ROMAddr, USHORT ModeNo,USHORT ModeIdIndex,
+                                    PSIS_HW_DEVICE_INFO HwDeviceExtension);
+extern void      SiS_WhatIsThis(SiS_Private *SiS_Pr, USHORT myvbinfo);
+extern void      SiS_LongWait(SiS_Private *SiS_Pr);
+extern void      SiS_SetRegOR(USHORT Port,USHORT Index,USHORT DataOR);
+extern void      SiS_SetRegAND(USHORT Port,USHORT Index,USHORT DataAND);
+extern void      SiS_SetRegANDOR(USHORT Port,USHORT Index,USHORT DataAND,USHORT DataOR);
+extern USHORT    SiS_GetResInfo(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex);
+extern void      SiS_SetCH700x(SiS_Private *SiS_Pr, USHORT tempax);
+extern USHORT    SiS_GetCH700x(SiS_Private *SiS_Pr, USHORT tempax);
+extern void      SiS_SetCH701x(SiS_Private *SiS_Pr, USHORT tempax);
+extern USHORT    SiS_GetCH701x(SiS_Private *SiS_Pr, USHORT tempax);
+extern void      SiS_SetCH70xx(SiS_Private *SiS_Pr, USHORT tempax);
+extern USHORT    SiS_GetCH70xx(SiS_Private *SiS_Pr, USHORT tempax);
+extern BOOLEAN   SiS_GetLVDSCRT1Ptr(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                                    USHORT RefreshRateTableIndex,
+		                    USHORT *ResInfo,USHORT *DisplayType);
+extern USHORT    SiS_GetVCLK2Ptr(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                                 USHORT RefreshRateTableIndex,
+				 PSIS_HW_DEVICE_INFO HwDeviceExtension);
+extern BOOLEAN   SiS_Is301B(SiS_Private *SiS_Pr, USHORT BaseAddr);
+extern BOOLEAN   SiS_IsM650(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr);
+extern BOOLEAN   SiS_LowModeStuff(SiS_Private *SiS_Pr, USHORT ModeNo,PSIS_HW_DEVICE_INFO HwDeviceExtension);
+extern BOOLEAN   SiS_IsVAMode(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr);
+extern BOOLEAN   SiS_IsDualEdge(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr);
+extern USHORT    SiS_GetMCLK(SiS_Private *SiS_Pr, UCHAR *ROMAddr, PSIS_HW_DEVICE_INFO HwDeviceExtension);
+
+#endif
+
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/sis/oem300.h b/xc/programs/Xserver/hw/xfree86/drivers/sis/oem300.h
new file mode 100644
index 000000000..8f7e524de
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/sis/oem300.h
@@ -0,0 +1,1005 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/oem300.h,v 1.3 2003/02/10 01:14:16 tsi Exp $ */
+
+/* OEM Data for 300 series */
+
+const UCHAR SiS300_OEMTVDelay301[8][4] =
+{
+	{0x08,0x08,0x08,0x08},
+	{0x08,0x08,0x08,0x08},
+	{0x08,0x08,0x08,0x08},
+	{0x2c,0x2c,0x2c,0x2c},
+	{0x08,0x08,0x08,0x08},
+	{0x08,0x08,0x08,0x08},
+	{0x08,0x08,0x08,0x08},
+	{0x20,0x20,0x20,0x20}
+};
+
+const UCHAR SiS300_OEMTVDelayLVDS[8][4] =
+{
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20}
+};
+
+const UCHAR SiS300_OEMTVFlicker[8][4] =
+{
+	{0x00,0x00,0x00,0x00},
+	{0x00,0x00,0x00,0x00},
+	{0x00,0x00,0x00,0x00},
+	{0x00,0x00,0x00,0x00},
+	{0x00,0x00,0x00,0x00},
+	{0x00,0x00,0x00,0x00},
+	{0x00,0x00,0x00,0x00},
+	{0x00,0x00,0x00,0x00}
+};
+
+#if 0   /* TW: Not used */
+const UCHAR SiS300_OEMLCDDelay1[12][4]={
+	{0x2c,0x2c,0x2c,0x2c},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x2c,0x2c,0x2c,0x2c},
+	{0x2c,0x2c,0x2c,0x2c},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x24,0x24,0x24,0x24},
+	{0x24,0x24,0x24,0x24},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x24,0x24,0x24,0x24}
+};
+#endif
+
+/* TW: From 630/301B BIOS */
+const UCHAR SiS300_OEMLCDDelay2[64][4] =		 /* for 301/301b/302b/301LV/302LV */
+{
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20}
+};
+
+/* TW: From 300/301LV BIOS */
+const UCHAR SiS300_OEMLCDDelay4[12][4] =
+{
+	{0x2c,0x2c,0x2c,0x2c},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x2c,0x2c,0x2c,0x2c},
+	{0x2c,0x2c,0x2c,0x2c},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x24,0x24,0x24,0x24},
+	{0x24,0x24,0x24,0x24},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x24,0x24,0x24,0x24}
+};
+
+/* TW: From 300/301LV BIOS */
+const UCHAR SiS300_OEMLCDDelay5[32][4] =
+{
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+};
+
+/* TW: Added for LVDS */
+const UCHAR SiS300_OEMLCDDelay3[64][4] = {	/* For LVDS */
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20}
+};
+
+const UCHAR SiS300_Phase1[8][6][4] =
+{
+    {
+	{0x21,0xed,0x00,0x08},
+	{0x21,0xed,0x8a,0x08},
+	{0x21,0xed,0x8a,0x08},
+	{0x21,0xed,0x8a,0x08},
+	{0x21,0xed,0x8a,0x08},
+	{0xff,0xff,0xff,0xff}
+    },
+    {
+        {0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0xff,0xff,0xff,0xff}
+    },
+    {
+        {0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0xff,0xff,0xff,0xff}
+    },
+    {
+        {0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0xff,0xff,0xff,0xff}
+    },
+    {
+        {0x21,0xed,0x00,0x08},
+	{0x21,0xed,0x8a,0x08},
+	{0x21,0xed,0x8a,0x08},
+	{0x21,0xed,0x8a,0x08},
+	{0x21,0xed,0x8a,0x08},
+	{0xff,0xff,0xff,0xff}
+    },
+    {
+        {0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0xff,0xff,0xff,0xff}
+    },
+    {
+        {0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0xff,0xff,0xff,0xff}
+    },
+    {
+        {0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0xff,0xff,0xff,0xff}
+    }
+};
+
+
+const UCHAR SiS300_Phase2[8][6][4] =
+{
+    {
+        {0x21,0xed,0x00,0x08},
+	{0x21,0xed,0x8a,0x08},
+	{0x21,0xed,0x8a,0x08},
+	{0x21,0xed,0x8a,0x08},
+	{0x21,0xed,0x8a,0x08},
+	{0xff,0xff,0xff,0xff}
+    },
+    {
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0xff,0xff,0xff,0xff}
+    },
+    {
+        {0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0xff,0xff,0xff,0xff}
+    },
+    {
+        {0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0xff,0xff,0xff,0xff}
+    },
+    {
+        {0x21,0xed,0x00,0x08},
+	{0x21,0xed,0x8a,0x08},
+	{0x21,0xed,0x8a,0x08},
+	{0x21,0xed,0x8a,0x08},
+	{0x21,0xed,0x8a,0x08},
+	{0xff,0xff,0xff,0xff}
+    },
+    {
+        {0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0xff,0xff,0xff,0xff}
+    },
+    {
+        {0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0xff,0xff,0xff,0xff}
+    },
+    {
+        {0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0xff,0xff,0xff,0xff}
+    }
+};
+
+const UCHAR SiS300_Filter1[10][16][4] =
+{
+    {
+	{0x00,0xf4,0x10,0x38},
+	{0x00,0xf4,0x10,0x38},
+	{0xeb,0x04,0x10,0x18},
+	{0xf7,0x06,0x19,0x14},
+	{0x00,0xf4,0x10,0x38},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x15,0x25,0xf6},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18}
+    },
+    {
+	{0x00,0xf4,0x10,0x38},
+	{0x00,0xf4,0x10,0x38},
+	{0xf1,0xf7,0x10,0x32},
+	{0xf3,0x00,0x1d,0x20},
+	{0x00,0xf4,0x10,0x38},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xfc,0xfb,0x14,0x2a},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32}
+    },
+    {
+	{0x00,0xf4,0x10,0x38},
+	{0x00,0xf4,0x10,0x38},
+	{0xf1,0xf7,0x10,0x32},
+	{0xf3,0x00,0x1d,0x20},
+	{0x00,0xf4,0x10,0x38},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xfc,0xfb,0x14,0x2a},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32}
+    },
+    {
+	{0x00,0xf4,0x10,0x38},
+	{0x00,0xf4,0x10,0x38},
+	{0xf1,0xf7,0x10,0x32},
+	{0xf3,0x00,0x1d,0x20},
+	{0x00,0xf4,0x10,0x38},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xfc,0xfb,0x14,0x2a},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32}
+    },
+    {
+	{0x00,0xf4,0x10,0x38},
+	{0x00,0xf4,0x10,0x38},
+	{0xeb,0x04,0x10,0x18},
+	{0xf7,0x06,0x19,0x14},
+	{0x00,0xf4,0x10,0x38},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x15,0x25,0xf6},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18}
+    },
+    {
+	{0x00,0xf4,0x10,0x38},
+	{0x00,0xf4,0x10,0x38},
+	{0xf1,0xf7,0x10,0x32},
+	{0xf3,0x00,0x1d,0x20},
+	{0x00,0xf4,0x10,0x38},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xfc,0xfb,0x14,0x2a},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32}
+    },
+    {
+	{0x00,0xf4,0x10,0x38},
+	{0x00,0xf4,0x10,0x38},
+	{0xf1,0xf7,0x10,0x32},
+	{0xf3,0x00,0x1d,0x20},
+	{0x00,0xf4,0x10,0x38},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xfc,0xfb,0x14,0x2a},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32}
+    },
+    {
+	{0x00,0xf4,0x10,0x38},
+	{0x00,0xf4,0x10,0x38},
+	{0xf1,0xf7,0x10,0x32},
+	{0xf3,0x00,0x1d,0x20},
+	{0x00,0xf4,0x10,0x38},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xfc,0xfb,0x14,0x2a},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32}
+    },
+    {
+	{0x00,0xf4,0x10,0x38},
+	{0x00,0xf4,0x10,0x38},
+	{0xeb,0x04,0x10,0x18},
+	{0xf7,0x06,0x19,0x14},
+	{0x00,0xf4,0x10,0x38},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x15,0x25,0xf6},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18}
+    },
+    {
+	{0x00,0xf4,0x10,0x38},
+	{0x00,0xf4,0x10,0x38},
+	{0xeb,0x04,0x10,0x18},
+	{0xf7,0x06,0x19,0x14},
+	{0x00,0xf4,0x10,0x38},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x15,0x25,0xf6},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18}
+    },
+};
+
+const UCHAR SiS300_Filter2[10][9][7] =
+{
+    {
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0x01,0x01,0xFC,0xF8,0x08,0x26,0x38},
+	{0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28}
+    },
+    {
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0x01,0x01,0xFC,0xF8,0x08,0x26,0x38},
+	{0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28}
+    },
+    {
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0x01,0x01,0xFC,0xF8,0x08,0x26,0x38},
+	{0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28}
+    },
+    {
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0x01,0x01,0xFC,0xF8,0x08,0x26,0x38},
+	{0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28}
+    },
+    {
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0x01,0x01,0xFC,0xF8,0x08,0x26,0x38},
+	{0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28}
+    },
+    {
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0x01,0x01,0xFC,0xF8,0x08,0x26,0x38},
+	{0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28}
+    },
+    {
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0x01,0x01,0xFC,0xF8,0x08,0x26,0x38},
+	{0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28}
+    },
+    {
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0x01,0x01,0xFC,0xF8,0x08,0x26,0x38},
+	{0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28}
+    },
+    {
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0x01,0x01,0xFC,0xF8,0x08,0x26,0x38},
+	{0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28}
+    },
+    {
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0x01,0x01,0xFC,0xF8,0x08,0x26,0x38},
+	{0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28}
+    }
+};
+
+const UCHAR SiS300_LCDHData[24][11][5] = {
+    {
+        {0x67,0x91,0x84,0x5e,0x00},
+	{0x67,0x91,0x84,0x5e,0x00},
+	{0x67,0x91,0x84,0x5e,0x00},
+	{0x67,0x91,0x84,0x5e,0x00},
+	{0x67,0x91,0x84,0x5e,0x00},
+	{0x67,0x91,0x84,0x5e,0x00},
+	{0x67,0x91,0x84,0x5e,0x00},
+	{0x65,0xef,0x83,0x5c,0x00},
+	{0x65,0xef,0x83,0x5c,0x00},
+	{0x8a,0x14,0x00,0x80,0x00},
+	{0x8a,0x14,0x00,0x80,0x00}
+    },
+    {
+        {0x4e,0x18,0x90,0x38,0x00},
+	{0x4e,0x18,0x90,0x38,0x00},
+	{0x8e,0x18,0x28,0x78,0x00},
+	{0x8e,0x18,0x28,0x78,0x00},
+	{0x8e,0x18,0x28,0x78,0x00},
+	{0x4e,0x18,0x90,0x38,0x00},
+	{0x4e,0x18,0x90,0x38,0x00},
+	{0x67,0x11,0x9a,0x56,0x00},
+        {0x67,0x11,0x9a,0x56,0x00},
+	{0x8a,0x14,0x00,0x80,0x00},
+	{0x8a,0x14,0x00,0x80,0x00}
+    },
+    {
+        {0x67,0x91,0x84,0x5e,0x00},
+	{0x67,0x91,0x84,0x5e,0x00},
+	{0x67,0x91,0x84,0x5e,0x00},
+	{0x67,0x91,0x84,0x5e,0x00},
+	{0x67,0x91,0x84,0x5e,0x00},
+	{0x67,0x91,0x84,0x5e,0x00},
+	{0x67,0x91,0x84,0x5e,0x00},
+	{0x65,0xef,0x83,0x5c,0x00},
+	{0x65,0xef,0x83,0x5c,0x00},
+	{0x8a,0x14,0x00,0x80,0x00},
+	{0x8a,0x14,0x00,0x80,0x00}
+    },
+    {
+    	{0x4e,0x18,0x90,0x38,0x00},
+	{0x4e,0x18,0x90,0x38,0x00},
+	{0x8e,0x18,0x28,0x78,0x00},
+	{0x8e,0x18,0x28,0x78,0x00},
+	{0x8e,0x18,0x28,0x78,0x00},
+	{0x4e,0x18,0x90,0x38,0x00},
+	{0x4e,0x18,0x90,0x38,0x00},
+	{0x67,0x11,0x9a,0x56,0x00},
+	{0x67,0x11,0x9a,0x56,0x00},
+	{0x8a,0x14,0x00,0x80,0x00},
+	{0x8a,0x14,0x00,0x80,0x00}
+    },
+    {
+    	{0x67,0x91,0x84,0x5e,0x00},
+	{0x67,0x91,0x84,0x5e,0x00},
+	{0x67,0x91,0x84,0x5e,0x00},
+	{0x67,0x91,0x84,0x5e,0x00},
+	{0x67,0x91,0x84,0x5e,0x00},
+	{0x67,0x91,0x84,0x5e,0x00},
+	{0x67,0x91,0x84,0x5e,0x00},
+	{0x65,0xef,0x83,0x5c,0x00},
+	{0x65,0xef,0x83,0x5c,0x00},
+	{0x8a,0x14,0x00,0x80,0x00},
+	{0x8a,0x14,0x00,0x80,0x00}
+    },
+    {
+        {0x4E,0x18,0x90,0x38,0x00},
+	{0x4E,0x18,0x90,0x38,0x00},
+	{0x8E,0x18,0x28,0x78,0x00},
+	{0x8E,0x18,0x28,0x78,0x00},
+	{0x8E,0x18,0x28,0x78,0x00},
+	{0x4E,0x18,0x90,0x38,0x00},
+	{0x4E,0x18,0x90,0x38,0x00},
+	{0x67,0x11,0x9A,0x56,0x00},
+	{0x67,0x11,0x9A,0x56,0x00},
+	{0x8A,0x14,0x00,0x80,0x00},
+	{0x8A,0x14,0x00,0x80,0x00}
+    },
+    {
+    	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+    	{0x67,0x91,0x84,0x5E,0x00},
+    	{0x67,0x91,0x84,0x5E,0x00},
+    	{0x67,0x91,0x84,0x5E,0x00},
+    	{0x67,0x91,0x84,0x5E,0x00},
+    	{0x65,0xEF,0x83,0x5C,0x00},
+    	{0x65,0xEF,0x83,0x5C,0x00},
+	{0x8A,0x14,0x00,0x80,0x00},
+	{0x8A,0x14,0x00,0x80,0x00}
+    },
+    {
+    	{0x4E,0x18,0x90,0x38,0x00},
+	{0x4E,0x18,0x90,0x38,0x00},
+	{0x8E,0x18,0x28,0x78,0x00},
+	{0x8E,0x18,0x28,0x78,0x00},
+	{0x8E,0x18,0x28,0x78,0x00},
+	{0x4E,0x18,0x90,0x38,0x00},
+	{0x4E,0x18,0x90,0x38,0x00},
+	{0x67,0x11,0x9A,0x56,0x00},
+	{0x67,0x11,0x9A,0x56,0x00},
+	{0x8A,0x14,0x00,0x80,0x00},
+	{0x8A,0x14,0x00,0x80,0x00}
+    },
+    {
+    	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x65,0xEF,0x83,0x5C,0x00},
+	{0x65,0xEF,0x83,0x5C,0x00},
+	{0x8A,0x14,0x00,0x80,0x00},
+	{0x8A,0x14,0x00,0x80,0x00}
+    },
+    {
+    	{0x4E,0x18,0x90,0x38,0x00},
+	{0x4E,0x18,0x90,0x38,0x00},
+	{0x8E,0x18,0x28,0x78,0x00},
+	{0x8E,0x18,0x28,0x78,0x00},
+	{0x8E,0x18,0x28,0x78,0x00},
+	{0x4E,0x18,0x90,0x38,0x00},
+	{0x4E,0x18,0x90,0x38,0x00},
+	{0x67,0x11,0x9A,0x56,0x00},
+	{0x67,0x11,0x9A,0x56,0x00},
+	{0x8A,0x14,0x00,0x80,0x00},
+	{0x8A,0x14,0x00,0x80,0x00}
+    },
+    {
+    	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x65,0xEF,0x83,0x5C,0x00},
+	{0x65,0xEF,0x83,0x5C,0x00},
+	{0x8A,0x14,0x00,0x80,0x00},
+	{0x8A,0x14,0x00,0x80,0x00}
+    },
+    {
+    	{0x4E,0x18,0x90,0x38,0x00},
+	{0x4E,0x18,0x90,0x38,0x00},
+	{0x8E,0x18,0x28,0x78,0x00},
+	{0x8E,0x18,0x28,0x78,0x00},
+	{0x8E,0x18,0x28,0x78,0x00},
+	{0x4E,0x18,0x90,0x38,0x00},
+	{0x4E,0x18,0x90,0x38,0x00},
+	{0x67,0x11,0x9A,0x56,0x00},
+	{0x67,0x11,0x9A,0x56,0x00},
+	{0x8A,0x14,0x00,0x80,0x00},
+	{0x8A,0x14,0x00,0x80,0x00}
+    },
+    {
+    	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x65,0xEF,0x83,0x5C,0x00},
+	{0x65,0xEF,0x83,0x5C,0x00},
+	{0x8A,0x14,0x00,0x80,0x00},
+	{0x8A,0x14,0x00,0x80,0x00}
+    },
+    {
+    	{0x4E,0x18,0x90,0x38,0x00},
+	{0x4E,0x18,0x90,0x38,0x00},
+	{0x8E,0x18,0x28,0x78,0x00},
+	{0x8E,0x18,0x28,0x78,0x00},
+	{0x8E,0x18,0x28,0x78,0x00},
+	{0x4E,0x18,0x90,0x38,0x00},
+	{0x4E,0x18,0x90,0x38,0x00},
+	{0x67,0x11,0x9A,0x56,0x00},
+	{0x67,0x11,0x9A,0x56,0x00},
+	{0x8A,0x14,0x00,0x80,0x00},
+	{0x8A,0x14,0x00,0x80,0x00}
+    },
+    {
+    	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x65,0xEF,0x83,0x5C,0x00},
+	{0x65,0xEF,0x83,0x5C,0x00},
+	{0x8A,0x14,0x00,0x80,0x00},
+	{0x8A,0x14,0x00,0x80,0x00}
+    },
+    {
+    	{0x4E,0x18,0x90,0x38,0x00},
+	{0x4E,0x18,0x90,0x38,0x00},
+	{0x8E,0x18,0x28,0x78,0x00},
+	{0x8E,0x18,0x28,0x78,0x00},
+	{0x8E,0x18,0x28,0x78,0x00},
+	{0x4E,0x18,0x90,0x38,0x00},
+	{0x4E,0x18,0x90,0x38,0x00},
+	{0x67,0x11,0x9A,0x56,0x00},
+	{0x67,0x11,0x9A,0x56,0x00},
+	{0x8A,0x14,0x00,0x80,0x00},
+	{0x8A,0x14,0x00,0x80,0x00}
+    },
+    {
+    	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x65,0xEF,0x83,0x5C,0x00},
+	{0x65,0xEF,0x83,0x5C,0x00},
+	{0x8A,0x14,0x00,0x80,0x00},
+	{0x8A,0x14,0x00,0x80,0x00}
+    },
+    {
+    	{0x4E,0x18,0x90,0x38,0x00},
+	{0x4E,0x18,0x90,0x38,0x00},
+	{0x8E,0x18,0x28,0x78,0x00},
+	{0x8E,0x18,0x28,0x78,0x00},
+	{0x8E,0x18,0x28,0x78,0x00},
+	{0x4E,0x18,0x90,0x38,0x00},
+	{0x4E,0x18,0x90,0x38,0x00},
+	{0x67,0x11,0x9A,0x56,0x00},
+	{0x67,0x11,0x9A,0x56,0x00},
+	{0x8A,0x14,0x00,0x80,0x00},
+	{0x8A,0x14,0x00,0x80,0x00}
+    },
+    {
+    	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x65,0xEF,0x83,0x5C,0x00},
+	{0x65,0xEF,0x83,0x5C,0x00},
+	{0x8A,0x14,0x00,0x80,0x00},
+	{0x8A,0x14,0x00,0x80,0x00}
+    },
+    {
+    	{0x4E,0x18,0x90,0x38,0x00},
+	{0x4E,0x18,0x90,0x38,0x00},
+	{0x8E,0x18,0x28,0x78,0x00},
+	{0x8E,0x18,0x28,0x78,0x00},
+	{0x8E,0x18,0x28,0x78,0x00},
+	{0x4E,0x18,0x90,0x38,0x00},
+	{0x4E,0x18,0x90,0x38,0x00},
+	{0x67,0x11,0x9A,0x56,0x00},
+	{0x67,0x11,0x9A,0x56,0x00},
+	{0x8A,0x14,0x00,0x80,0x00},
+	{0x8A,0x14,0x00,0x80,0x00}
+    },
+    {
+    	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x65,0xEF,0x83,0x5C,0x00},
+	{0x65,0xEF,0x83,0x5C,0x00},
+	{0x8A,0x14,0x00,0x80,0x00},
+	{0x8A,0x14,0x00,0x80,0x00}
+    },
+    {
+    	{0x4E,0x18,0x90,0x38,0x00},
+	{0x4E,0x18,0x90,0x38,0x00},
+	{0x8E,0x18,0x28,0x78,0x00},
+	{0x8E,0x18,0x28,0x78,0x00},
+	{0x8E,0x18,0x28,0x78,0x00},
+	{0x4E,0x18,0x90,0x38,0x00},
+	{0x4E,0x18,0x90,0x38,0x00},
+	{0x67,0x11,0x9A,0x56,0x00},
+	{0x67,0x11,0x9A,0x56,0x00},
+	{0x8A,0x14,0x00,0x80,0x00},
+	{0x8A,0x14,0x00,0x80,0x00}
+    },
+    {
+    	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x65,0xEF,0x83,0x5C,0x00},
+	{0x65,0xEF,0x83,0x5C,0x00},
+	{0x8A,0x14,0x00,0x80,0x00},
+	{0x8A,0x14,0x00,0x80,0x00}
+    },
+    {
+    	{0x4E,0x18,0x90,0x38,0x00},
+	{0x4E,0x18,0x90,0x38,0x00},
+	{0x8E,0x18,0x28,0x78,0x00},
+	{0x8E,0x18,0x28,0x78,0x00},
+	{0x8E,0x18,0x28,0x78,0x00},
+	{0x4E,0x18,0x90,0x38,0x00},
+	{0x4E,0x18,0x90,0x38,0x00},
+	{0x67,0x11,0x9A,0x56,0x00},
+	{0x67,0x11,0x9A,0x56,0x00},
+	{0x8A,0x14,0x00,0x80,0x00},
+	{0x8A,0x14,0x00,0x80,0x00}
+    }
+};
+
+#if 0
+const UCHAR SiS300_LCDVData[24][11][6] = {
+    {
+        {
+    },
+};
+#endif
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/sis/oem310.h b/xc/programs/Xserver/hw/xfree86/drivers/sis/oem310.h
new file mode 100644
index 000000000..c4415aaee
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/sis/oem310.h
@@ -0,0 +1,377 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/oem310.h,v 1.4 2003/02/10 01:14:16 tsi Exp $ */
+
+/* OEM Data for 310/325 series */
+
+const UCHAR SiS310_CRT2DelayCompensation1 = 0x04;   /* 301 */
+
+const UCHAR SiS310_CRT2DelayCompensation2 = 0x00;   /* 301B */
+
+const UCHAR SiS310_CRT2DelayCompensation3 = 0x00;   /* LVDS */
+
+const UCHAR SiS310_LCDDelayCompensation1[] =	    /* 301 */
+{
+		 0x00,0x00,0x00,    /*   800x600 */
+		 0x0b,0x0b,0x0b,    /*  1024x768 */
+		 0x08,0x08,0x08,    /* 1280x1024 */
+		 0x00,0x00,0x00,    /*   640x480 (unknown) */
+		 0x00,0x00,0x00,    /*  1024x600 (unknown) */
+		 0x00,0x00,0x00,    /*  1152x864 (unknown) */
+		 0x08,0x08,0x08,    /*  1280x960 (guessed) */
+		 0x00,0x00,0x00,    /*  1152x768 (unknown) */
+		 0x08,0x08,0x08,    /* 1400x1050 */
+		 0x08,0x08,0x08,    /*  1280x768  (guessed) */
+		 0x00,0x00,0x00,    /* 1600x1200 */
+		 0x00,0x00,0x00,    /*   320x480 (unknown) */
+		 0x00,0x00,0x00,
+		 0x00,0x00,0x00,
+		 0x00,0x00,0x00
+};
+
+UCHAR SiS310_LCDDelayCompensation2[] =		   /* 30xB,LV,LVX */
+{
+		 0x01,0x01,0x01,    /*   800x600 */
+		 0x01,0x01,0x01,    /*  1024x768 */
+		 0x01,0x01,0x01,    /* 1280x1024 */
+                 0x01,0x01,0x01,    /*   640x480 (unknown) */
+		 0x01,0x01,0x01,    /*  1024x600 (unknown) */
+		 0x01,0x01,0x01,    /*  1152x864 (unknown) */
+		 0x01,0x01,0x01,    /*  1280x960 (guessed) */
+		 0x01,0x01,0x01,    /*  1152x768 (unknown) */
+		 0x01,0x01,0x01,    /* 1400x1050 */
+		 0x01,0x01,0x01,    /*  1280x768  (guessed) */
+		 0x01,0x01,0x01,    /* 1600x1200 */
+		 0x02,0x02,0x02,
+		 0x02,0x02,0x02,
+		 0x02,0x02,0x02,
+		 0x02,0x02,0x02
+};
+
+const UCHAR SiS310_LCDDelayCompensation3[] =	   /* LVDS */
+{
+                 0x00,0x00,0x00,    /*   800x600 */
+		 0x00,0x00,0x00,    /*  1024x768 */
+		 0x00,0x00,0x00,    /* 1280x1024 */
+		 0x00,0x00,0x00,    /*   640x480 (unknown) */
+		 0x00,0x00,0x00,    /*  1024x600 (unknown) */
+		 0x00,0x00,0x00,    /*  1152x864 (unknown) */
+		 0x00,0x00,0x00,    /*  1280x960 (guessed) */
+		 0x00,0x00,0x00,    /*  1152x768 (unknown) */
+		 0x00,0x00,0x00,    /* 1400x1050 */
+		 0x00,0x00,0x00,    /*  1280x768  (guessed) */
+		 0x00,0x00,0x00,    /* 1600x1200 */
+		 0x00,0x00,0x00,
+		 0x00,0x00,0x00,
+		 0x00,0x00,0x00,
+		 0x00,0x00,0x00
+};
+
+const UCHAR SiS310_LCDDelayCompensation4[] =	   /* 650 */
+{
+                 0x01,0x01,0x01,    /*   800x600 (guessed)*/
+		 0x01,0x01,0x01,    /*  1024x768 */
+		 0x01,0x01,0x01,    /* 1280x1024 */
+		 0x01,0x01,0x01,    /*   640x480 (unknown) */
+		 0x01,0x01,0x01,    /*  1024x600 (unknown) */
+		 0x01,0x01,0x01,    /*  1152x864 (unknown) */
+		 0x01,0x01,0x01,    /*  1280x960 (guessed) */
+		 0x01,0x01,0x01,    /*  1152x768 (unknown) */
+		 0x01,0x01,0x01,    /* 1400x1050 */
+		 0x01,0x01,0x01,    /*  1280x768  (guessed) */
+		 0x01,0x01,0x01,    /* 1600x1200 */
+		 0x01,0x01,0x01,
+		 0x01,0x01,0x01,
+		 0x01,0x01,0x01,
+		 0x01,0x01,0x01
+};
+
+const UCHAR SiS310_LCDDelayCompensation5[] =	   /* 650 LVX */
+{
+                 0x01,0x01,0x01,    /*   800x600 (guessed) */
+		 0x01,0x01,0x01,    /*  1024x768 */
+		 0x01,0x01,0x01,    /* 1280x1024 */
+		 0x01,0x01,0x01,    /*   640x480 (unknown) */
+		 0x01,0x01,0x01,    /*  1024x600 (unknown) */
+		 0x01,0x01,0x01,    /*  1152x864 (unknown) */
+		 0x01,0x01,0x01,    /*  1280x960 (guessed) */
+		 0x01,0x01,0x01,    /*  1152x768 (unknown) */
+		 0x01,0x01,0x01,    /* 1400x1050 */
+		 0x01,0x01,0x01,    /*  1280x768  (guessed) */
+		 0x01,0x01,0x01,    /* 1600x1200 */
+		 0x01,0x01,0x01,
+		 0x01,0x01,0x01,
+		 0x01,0x01,0x01,
+		 0x01,0x01,0x01
+};
+
+const UCHAR SiS310_LCDDelayCompensation6[] =	   /* M650/651 */
+{
+                 0x33,0x33,0x33,    /*   800x600 (guessed) */
+		 0x33,0x33,0x33,    /*  1024x768 */
+		 0x33,0x33,0x33,    /* 1280x1024 */
+		 0x33,0x33,0x33,    /*   640x480 (unknown) */
+		 0x33,0x33,0x33,    /*  1024x600 (unknown) */
+		 0x33,0x33,0x33,    /*  1152x864 (unknown) */
+		 0x33,0x33,0x33,    /*  1280x960 (guessed) */
+		 0x33,0x33,0x33,    /*  1152x768 (unknown) */
+		 0x33,0x33,0x33,    /* 1400x1050 */
+		 0x33,0x33,0x33,    /*  1280x768  (guessed) */
+		 0x33,0x33,0x33,    /* 1600x1200 */
+		 0x33,0x33,0x33,
+		 0x33,0x33,0x33,
+		 0x33,0x33,0x33,
+		 0x33,0x33,0x33
+};
+
+const UCHAR SiS310_LCDDelayCompensation7[] =	   /* M650/651 301LVX */
+{
+                 0x33,0x33,0x33,    /*   800x600 (guessed) */
+		 0x33,0x33,0x33,    /*  1024x768 */
+		 0x33,0x33,0x33,    /* 1280x1024 */
+		 0x33,0x33,0x33,    /*   640x480 (unknown) */
+		 0x33,0x33,0x33,    /*  1024x600 (unknown) */
+		 0x33,0x33,0x33,    /*  1152x864 (unknown) */
+		 0x33,0x33,0x33,    /*  1280x960 (guessed) */
+		 0x33,0x33,0x33,    /*  1152x768 (unknown) */
+		 0x33,0x33,0x33,    /* 1400x1050 */
+		 0x33,0x33,0x33,    /*  1280x768  (guessed) */
+		 0x33,0x33,0x33,    /* 1600x1200 */
+		 0x33,0x33,0x33,
+		 0x33,0x33,0x33,
+		 0x33,0x33,0x33,
+		 0x33,0x33,0x33
+};
+
+const UCHAR SiS310_TVDelayCompensation1[] = 		/* 301 */
+{
+		 0x02,0x02,    /* NTSC Enhanced, Standard */
+                 0x02,0x02,    /* PAL */
+		 0x08,0x0b     /* HiVision */
+};
+
+const UCHAR SiS310_TVDelayCompensation2[] =		/* 301B;LV */
+{
+		 0x03,0x03,
+		 0x03,0x03,
+		 0x03,0x03
+};
+
+const UCHAR SiS310_TVDelayCompensation3[] =		/* LVDS */
+{
+		 0x0a,0x0a,
+		 0x0a,0x0a,
+		 0x0a,0x0a
+};
+
+const UCHAR SiS310_TVDelayCompensation4[] =		/* 650 */
+{
+		 0x03,0x03,
+		 0x03,0x03,
+		 0x03,0x03
+};
+
+const UCHAR SiS310_TVDelayCompensation5[] =		/* 650 LVX */
+{
+		 0x03,0x03,
+		 0x03,0x03,
+		 0x03,0x03
+};
+
+const UCHAR SiS310_TVDelayCompensation6[] =		/* M650, 651 */
+{
+		 0x33,0x33,
+		 0x33,0x33,
+		 0x33,0x33
+};
+
+const UCHAR SiS310_TVDelayCompensation7[] =		/* M650, 651, LVX */
+{
+		 0x33,0x33,
+		 0x33,0x33,
+		 0x33,0x33
+};
+
+const UCHAR SiS310_TVAntiFlick1[3][2] =
+{
+            {0x4,0x0},
+	    {0x4,0x8},
+	    {0x0,0x0}
+};
+
+const UCHAR SiS310_TVEdge1[3][2] =
+{
+            {0x0,0x4},
+	    {0x0,0x4},
+	    {0x0,0x0}
+};
+
+const UCHAR SiS310_TVYFilter1[3][8][4] =
+{
+ {
+	{0x00,0xf4,0x10,0x38},
+	{0x00,0xf4,0x10,0x38},
+	{0xeb,0x04,0x25,0x18},
+	{0xf1,0x04,0x1f,0x18},
+	{0x00,0xf4,0x10,0x38},
+	{0xeb,0x04,0x25,0x18},
+	{0xee,0x0c,0x22,0x08},
+	{0xeb,0x15,0x25,0xf6}
+ },
+ {
+	{0x00,0xf4,0x10,0x38},
+	{0x00,0xf4,0x10,0x38},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf3,0x00,0x1d,0x20},
+	{0x00,0xf4,0x10,0x38},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf3,0x00,0x1d,0x20},
+	{0xfc,0xfb,0x14,0x2a}
+ },
+ {
+	{0x00,0x00,0x00,0x00},
+	{0x00,0xf4,0x10,0x38},
+	{0x00,0xf4,0x10,0x38},
+	{0xeb,0x04,0x25,0x18},
+	{0xf7,0x06,0x19,0x14},
+	{0x00,0xf4,0x10,0x38},
+	{0xeb,0x04,0x25,0x18},
+	{0xee,0x0c,0x22,0x08}
+ }
+};
+
+const UCHAR SiS310_TVYFilter2[3][9][7] =
+{
+ {
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0x01,0x01,0xFC,0xF8,0x08,0x26,0x38},
+	{0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28}
+ },
+ {
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},   
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0x01,0x01,0xFC,0xF8,0x08,0x26,0x38},
+	{0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28}
+ },
+ {
+	{0x00,0x00,0x00,0xF4,0xFF,0x1C,0x22},
+	{0x00,0x00,0x00,0xF4,0xFF,0x1C,0x22},
+	{0x00,0x00,0x00,0xF4,0xFF,0x1C,0x22},
+	{0x00,0x00,0x00,0xF4,0xFF,0x1C,0x22},
+	{0x00,0x00,0x00,0xF4,0xFF,0x1C,0x22},
+	{0x00,0x00,0x00,0xF4,0xFF,0x1C,0x22},
+	{0x00,0x00,0x00,0xF4,0xFF,0x1C,0x22},
+	{0x00,0x00,0x00,0xF4,0xFF,0x1C,0x22}
+ }
+};
+
+const UCHAR SiS310_PALMFilter[16][4] =
+{
+	{0x00,0xf4,0x10,0x38},
+	{0x00,0xf4,0x10,0x38},
+	{0xeb,0x04,0x10,0x18},
+	{0xf7,0x06,0x19,0x14},
+	{0x00,0xf4,0x10,0x38},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x15,0x25,0xf6},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18}
+};
+
+const UCHAR SiS310_PALNFilter[16][4] =
+{
+	{0x00,0xf4,0x10,0x38},
+	{0x00,0xf4,0x10,0x38},
+	{0xeb,0x04,0x10,0x18},
+	{0xf7,0x06,0x19,0x14},
+	{0x00,0xf4,0x10,0x38},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x15,0x25,0xf6},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18}
+};
+
+
+const UCHAR SiS310_PALMFilter2[9][7] =
+{
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0x01,0x01,0xFC,0xF8,0x08,0x26,0x38},
+	{0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28}
+};
+
+const UCHAR SiS310_PALNFilter2[9][7] =
+{
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0x01,0x01,0xFC,0xF8,0x08,0x26,0x38},
+	{0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28}
+};
+
+const UCHAR SiS310_TVPhaseIncr1[3][2][4] =
+{
+ {
+	{0x21,0xed,0xba,0x08},
+	{0x21,0xed,0xba,0x08}
+ },
+ {
+	{0x2a,0x05,0xe3,0x00},
+	{0x2a,0x05,0xe3,0x00}
+ },
+ {
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00}
+ }
+};
+
+const UCHAR SiS310_TVPhaseIncr2[3][2][4] =
+{
+ {
+	{0x21,0xf0,0x7b,0xd6},   /* 1.10.7w;  1.10.6s: {0x1e,0x8b,0xda,0xa7},   old: {0x21,0xF1,0x37,0x56} */
+	{0x21,0xf0,0x7b,0xd6}    /* 1.10.7w;  1.10.6s: {0x1e,0x8b,0xda,0xa7}    old: {0x21,0xF1,0x37,0x56} */
+ },
+ {
+	{0x2a,0x0a,0x41,0xe9},   /* 1.10.7w, 1.10.6s. old: {0x2a,0x09,0x86,0xe9}, */
+	{0x2a,0x0a,0x41,0xe9}    /* 1.10.7w, 1.10.6s. old: {0x2a,0x09,0x86,0xe9}  */
+ },
+ {
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00}
+ }
+};
+
+
+
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/sis/osdef.h b/xc/programs/Xserver/hw/xfree86/drivers/sis/osdef.h
new file mode 100644
index 000000000..039d968b9
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/sis/osdef.h
@@ -0,0 +1,169 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/osdef.h,v 1.2 2003/02/10 01:14:16 tsi Exp $ */
+
+/* OS depending defines */
+
+/* The choices are: */
+/* #define WINCE_HEADER */      /* Incomplete! */
+/* #define WIN2000 */           /* Incomplete! */
+/* #define TC */                /* Incomplete! */
+/* #define LINUX_KERNEL	 */  	/* Kernel framebuffer */
+#define LINUX_XF86    		/* XFree86 */
+
+/**********************************************************************/
+#ifdef LINUX_KERNEL /* ----------------------------*/
+
+#include <linux/config.h>
+#ifdef CONFIG_FB_SIS_300
+#define SIS300
+#endif
+
+#ifdef CONFIG_FB_SIS_315
+#define SIS315H
+#endif
+
+#else	/* if not LINUX_KERNEL --------------------- */
+/*	#define SIS300*/
+#define SIS315H
+
+#endif  /* if LINUX_KERNEL ------------------------ */
+
+#ifdef LINUX_XF86 /* Linux Xfree86 ---------------- */
+
+#define SIS300
+/* #define SIS315H */ /* TW: done above */
+#endif
+
+/**********************************************************************/
+#ifdef TC
+#endif
+#ifdef WIN2000
+#endif
+#ifdef WINCE_HEADER
+#endif
+#ifdef LINUX_XF86
+#endif
+#ifdef LINUX_KERNEL
+#endif
+/**********************************************************************/
+#ifdef TC
+#define SiS_SetMemory(MemoryAddress,MemorySize,value) memset(MemoryAddress, value, MemorySize);
+#endif
+#ifdef WIN2000
+#define SiS_SetMemory(MemoryAddress,MemorySize,value) MemFill((PVOID) MemoryAddress,(ULONG) MemorySize,(UCHAR) value);
+#endif
+#ifdef WINCE_HEADER
+#define SiS_SetMemory(MemoryAddress,MemorySize,value) memset(MemoryAddress, value, MemorySize);
+#endif
+#ifdef LINUX_XF86
+#define SiS_SetMemory(MemoryAddress,MemorySize,value) memset(MemoryAddress, value, MemorySize)
+#endif
+#ifdef LINUX_KERNEL
+#define SiS_SetMemory(MemoryAddress,MemorySize,value) memset(MemoryAddress, value, MemorySize)
+#endif
+/**********************************************************************/
+
+/**********************************************************************/
+
+#ifdef TC
+#define SiS_MemoryCopy(Destination,Soruce,Length) memmove(Destination, Soruce, Length);
+#endif
+#ifdef WIN2000
+#define SiS_MemoryCopy(Destination,Soruce,Length)  /*VideoPortMoveMemory((PUCHAR)Destination , Soruce,length);*/
+#endif
+#ifdef WINCE_HEADER
+#define SiS_MemoryCopy(Destination,Soruce,Length) memmove(Destination, Soruce, Length);
+#endif
+#ifdef LINUX_XF86
+#define SiS_MemoryCopy(Destination,Soruce,Length) memcpy(Destination,Soruce,Length)
+#endif
+#ifdef LINUX_KERNEL
+#define SiS_MemoryCopy(Destination,Soruce,Length) memcpy(Destination,Soruce,Length)
+#endif
+
+/**********************************************************************/
+
+#ifdef OutPortByte
+#undef OutPortByte
+#endif /* OutPortByte */
+
+#ifdef OutPortWord
+#undef OutPortWord
+#endif /* OutPortWord */
+
+#ifdef OutPortLong
+#undef OutPortLong
+#endif /* OutPortLong */
+
+#ifdef InPortByte
+#undef InPortByte
+#endif /* InPortByte */
+
+#ifdef InPortWord
+#undef InPortWord
+#endif /* InPortWord */
+
+#ifdef InPortLong
+#undef InPortLong
+#endif /* InPortLong */
+
+/**********************************************************************/
+/*  TC                                                                */
+/**********************************************************************/
+
+#ifdef TC
+#define OutPortByte(p,v) outp((unsigned short)(p),(unsigned char)(v))
+#define OutPortWord(p,v) outp((unsigned short)(p),(unsigned short)(v))
+#define OutPortLong(p,v) outp((unsigned short)(p),(unsigned long)(v))
+#define InPortByte(p)    inp((unsigned short)(p))
+#define InPortWord(p)    inp((unsigned short)(p))
+#define InPortLong(p)    ((inp((unsigned short)(p+2))<<16) | inp((unsigned short)(p)))
+#endif
+
+/**********************************************************************/
+/*  LINUX XF86                                                        */
+/**********************************************************************/
+
+#ifdef LINUX_XF86
+#define OutPortByte(p,v) outb((CARD16)(p),(CARD8)(v))
+#define OutPortWord(p,v) outw((CARD16)(p),(CARD16)(v))
+#define OutPortLong(p,v) outl((CARD16)(p),(CARD32)(v))
+#define InPortByte(p)    inb((CARD16)(p))
+#define InPortWord(p)    inw((CARD16)(p))
+#define InPortLong(p)    inl((CARD16)(p))
+#endif
+
+#ifdef LINUX_KERNEL
+#define OutPortByte(p,v) outb((u8)(v),(u16)(p))
+#define OutPortWord(p,v) outw((u16)(v),(u16)(p))
+#define OutPortLong(p,v) outl((u32)(v),(u16)(p))
+#define InPortByte(p)    inb((u16)(p))
+#define InPortWord(p)    inw((u16)(p))
+#define InPortLong(p)    inl((u16)(p))
+#endif
+
+/**********************************************************************/
+/*  WIN 2000                                                          */
+/**********************************************************************/
+
+#ifdef WIN2000
+#define OutPortByte(p,v) VideoPortWritePortUchar ((PUCHAR) (p), (UCHAR) (v))
+#define OutPortWord(p,v) VideoPortWritePortUshort((PUSHORT) (p), (USHORT) (v))
+#define OutPortLong(p,v) VideoPortWritePortUlong ((PULONG) (p), (ULONG) (v))
+#define InPortByte(p)    VideoPortReadPortUchar  ((PUCHAR) (p))
+#define InPortWord(p)    VideoPortReadPortUshort ((PUSHORT) (p))
+#define InPortLong(p)    VideoPortReadPortUlong  ((PULONG) (p))
+#endif
+
+
+/**********************************************************************/
+/*  WIN CE                                                          */
+/**********************************************************************/
+
+#ifdef WINCE_HEADER
+#define OutPortByte(p,v) WRITE_PORT_UCHAR ((PUCHAR) (p), (UCHAR) (v))
+#define OutPortWord(p,v) WRITE_PORT_USHORT((PUSHORT) (p), (USHORT) (v))
+#define OutPortLong(p,v) WRITE_PORT_ULONG ((PULONG) (p), (ULONG) (v))
+#define InPortByte(p)    READ_PORT_UCHAR  ((PUCHAR) (p))
+#define InPortWord(p)    READ_PORT_USHORT ((PUSHORT) (p))
+#define InPortLong(p)    READ_PORT_ULONG  ((PULONG) (p))
+#endif
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/sis/sis.h b/xc/programs/Xserver/hw/xfree86/drivers/sis/sis.h
index af81ee19c..7278674e7 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/sis/sis.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/sis/sis.h
@@ -1,19 +1,21 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/sis.h,v 1.29 2003/01/29 15:42:16 eich Exp $ */
 /*
  * Copyright 1998,1999 by Alan Hourihane, Wigan, England.
+ * Parts Copyright 2001, 2002 by Thomas Winischhofer, Vienna, Austria
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
  * the above copyright notice appear in all copies and that both that
  * copyright notice and this permission notice appear in supporting
- * documentation, and that the name of Alan Hourihane not be used in
+ * documentation, and that the name of the copyright holder not be used in
  * advertising or publicity pertaining to distribution of the software without
- * specific, written prior permission.  Alan Hourihane makes no representations
+ * specific, written prior permission.  The copyright holder makes no representations
  * about the suitability of this software for any purpose.  It is provided
  * "as is" without express or implied warranty.
  *
- * ALAN HOURIHANE DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+ * THE COPYRIGHT HOLDER DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
  * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
- * EVENT SHALL ALAN HOURIHANE BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+ * EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY SPECIAL, INDIRECT OR
  * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
  * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
@@ -23,13 +25,37 @@
  *           Mike Chapman <mike@paranoia.com>,
  *           Juanjo Santamarta <santamarta@ctv.es>, 
  *           Mitani Hiroshi <hmitani@drl.mei.co.jp> 
- *           David Thomas <davtom@dream.org.uk>. 
+ *           David Thomas <davtom@dream.org.uk>.
+ *
+ *	     Thomas Winischhofer <thomas@winischhofer.net>:
+ *              - 310/325 series (315/550/650/651/740/M650) support
+ *		- (possibly incomplete) Xabre (SiS330) support
+ *              - new mode switching code for 300, 310/325 and 330 series
+ *              - many fixes for 300/540/630/730 chipsets,
+ *              - many fixes for 5597/5598, 6326 and 530/620 chipsets,
+ *              - VESA mode switching (deprecated),
+ *              - extended CRT2/video bridge handling support,
+ *              - dual head support on 300, 310/325 and 330 series
+ *              - 650/LVDS (up to 1400x1050), 650/Chrontel 701x support
+ *              - 30xB/30xLV/30xLVX video bridge support (300, 310/325, 330 series)
+ *              - Xv support for 5597/5598, 6326, 530/620 and 310/325 series
+ *              - video overlay enhancements for 300 series
+ *              - TV and hi-res support for the 6326
+ *		- Color hardware cursor support for 300/310/325/330 series
+ *              - etc.
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/sis.h,v 1.26 2002/04/04 14:05:47 eich Exp $ */
+
 
 #ifndef _SIS_H
 #define _SIS_H_
 
+/* Always unlock the registers (should be set!) */
+#define UNLOCK_ALWAYS
+
+#if 0
+#define TWDEBUG    /* for debugging */
+#endif
+
 #include "xf86Pci.h"
 #include "xf86Cursor.h"
 #include "xf86_ansic.h"
@@ -38,6 +64,9 @@
 #include "xaa.h"
 #include "vgaHW.h"
 #include "vbe.h"
+#include "osdef.h"
+#include "vgatypes.h"
+#include "vstruct.h"
 
 #ifdef XF86DRI
 #include "xf86drm.h"
@@ -49,6 +78,53 @@
 #include "sis_dri.h"
 #endif
 
+#if XF86_VERSION_CURRENT < XF86_VERSION_NUMERIC(4,2,0,0,0)
+typedef unsigned long IOADDRESS;
+#endif
+
+#if 1
+#define SISDUALHEAD  	/* TW: Include Dual Head code  */
+#endif
+
+#if 1
+#define USE6326VIDEO	/* TW: Include 6326/530/620 Xv code */
+#endif
+
+#if 1			/* TW: Include code for 330 - highly preliminary */
+#define INCL_SIS330
+#endif
+
+#if 1			/* TW: Include code for cycling CRT2 type via keyboard */
+#define CYCLECRT2	/* (not functional yet) */
+#endif
+
+#if 1
+#define SISGAMMA	/* TW: Include code for gamma correction */
+#endif
+
+#if 1			/* TW: Include code for color hardware cursors */
+#define SIS_ARGB_CURSOR
+#endif
+
+/* TW: new for SiS315/550/650/740/330 - these should be moved elsewhere! */
+#ifndef PCI_CHIP_SIS315H
+#define PCI_CHIP_SIS315H		0x0310
+#endif
+#ifndef PCI_CHIP_SIS315
+#define PCI_CHIP_SIS315			0x0315
+#endif
+#ifndef PCI_CHIP_SIS315PRO
+#define PCI_CHIP_SIS315PRO		0x0325
+#endif
+#ifndef PCI_CHIP_SIS550
+#define PCI_CHIP_SIS550			0x5315	/* This is 550_VGA */
+#endif
+#ifndef PCI_CHIP_SIS650
+#define PCI_CHIP_SIS650 		0x6325  /* This is 650_VGA and 740_VGA */
+#endif
+#ifndef PCI_CHIP_SIS330
+#define PCI_CHIP_SIS330 		0x0330
+#endif
 
 #define SIS_NAME                "SIS"
 #define SIS_DRIVER_NAME         "sis"
@@ -58,57 +134,104 @@
 #define SIS_CURRENT_VERSION     ((SIS_MAJOR_VERSION << 16) | \
                                 (SIS_MINOR_VERSION << 8) | SIS_PATCHLEVEL )
 
-#define UMA                     0x00000001
-#define MMIOMODE                0x00000001
-#define LFBQMODE                0x00000002
-#define AGPQMODE                0x00000004
+/* pSiS->Flags (old series only) */
+#define SYNCDRAM                0x00000001
+#define RAMFLAG                 0x00000002
+#define ESS137xPRESENT          0x00000004
+#define SECRETFLAG              0x00000008
+#define A6326REVAB              0x00000010
+#define MMIOMODE                0x00010000
+#define LFBQMODE                0x00020000
+#define AGPQMODE                0x00040000
+#define UMA                     0x80000000
 
 #define BIOS_BASE               0xC0000
 #define BIOS_SIZE               0x10000
 
+/* TW: New mode switching code */
+#define SR_BUFFER_SIZE          5
+#define CR_BUFFER_SIZE          5
+
+/* TW: VBFlags */
 #define CRT2_DEFAULT            0x00000001
-#define CRT2_LCD                0x00000010
-#define CRT2_TV                 0x00000020
-#define CRT2_VGA                0x00000040
-#define CRT2_ENABLE             0x00000070
-#define DISPTYPE_DISP2		(CRT2_LCD | CRT2_TV | CRT2_VGA) /* TW */
-#define LCD_640x480             0x00000080 /* TW */
-#define LCD_800x600             0x00000100
-#define LCD_1024x768            0x00000200
-#define LCD_1280x1024           0x00000400
-#define LCD_1280x960    	0x00000800 /* TW */
-#define LCD_TYPE                0x00000F80 /* TW */
-#define TV_NTSC                 0x00001000
-#define TV_PAL                  0x00002000
-#define TV_HIVISION             0x00004000
-#define TV_TYPE                 0x00007000
-#define TV_AVIDEO               0x00010000
-#define TV_SVIDEO               0x00020000
-#define TV_SCART                0x00040000
-#define TV_INTERFACE            0x00070000
-#define DISPTYPE_CRT1		0x00080000 /* TW: CRT1 connected and used */
-#define DISPTYPE_DISP1		DISPTYPE_CRT1 /* TW */
-#define VB_301                  0x00100000
-#define VB_302                  0x00200000
-#define VB_303                  0x00400000
-#define VB_301B			0x00800000 /* TW */
+#define CRT2_LCD                0x00000002  /* TW: Never change the order of the CRT2_XXX entries */
+#define CRT2_TV                 0x00000004  /*     (see SISCycleCRT2Type())                       */
+#define CRT2_VGA                0x00000008
+#define CRT2_ENABLE		(CRT2_LCD | CRT2_TV | CRT2_VGA)
+#define DISPTYPE_DISP2		CRT2_ENABLE
+#define TV_NTSC                 0x00000010
+#define TV_PAL                  0x00000020
+#define TV_HIVISION             0x00000040
+#define TV_TYPE                 (TV_NTSC | TV_PAL | TV_HIVISION)
+#define TV_AVIDEO               0x00000100
+#define TV_SVIDEO               0x00000200
+#define TV_SCART                0x00000400
+#define TV_INTERFACE            (TV_AVIDEO | TV_SVIDEO | TV_SCART | TV_CHSCART | TV_CHHDTV)
+#define TV_PALM                 0x00001000
+#define TV_PALN                 0x00002000
+#define TV_CHSCART              0x00008000
+#define TV_CHHDTV               0x00010000
+#define VGA2_CONNECTED          0x00040000
+#define DISPTYPE_CRT1		0x00080000  	/* TW: CRT1 connected and used */
+#define DISPTYPE_DISP1		DISPTYPE_CRT1
+#define VB_301                  0x00100000	/* Video bridge type */
+#define VB_301B                 0x00200000
+#define VB_302B                 0x00400000
+#define VB_303			0x00800000
 #define VB_LVDS                 0x01000000
 #define VB_CHRONTEL             0x02000000
-#define VB_VIDEOBRIDGE		(VB_301|VB_301B|VB_302|VB_303|VB_LVDS|VB_CHRONTEL) /* TW */
-#define VB_NOLCD		0x04000000 /* TW */
-#define VB_LCDA			0x08000000 /* TW */
-#define SINGLE_MODE             0x10000000  /* TW: CRT1 or CRT2; old: 0x00000000 */
-#define VB_DISPMODE_SINGLE	SINGLE_MODE /* TW */
-#define MIRROR_MODE		0x20000000 /* TW: CRT1 + CRT2 */
-#define VB_DISPMODE_MIRROR	MIRROR_MODE /* TW */
-#define DUALVIEW_MODE		0x40000000 /* TW: CRT1 + CRT2 independent (not used) */
-/* #define SIMU_MODE               0x10000000 */ /* TW */
-/* #define MM_MODE                 0x20000000 */ /* TW */
-#define DISPLAY_MODE            0x70000000 /* TW: Mask; old 0x30000000 */
-#define MASK_DISPTYPE_CRT2     0x04         /* Connect LCD */
-#define MASK_DISPTYPE_LCD      0x02         /* Connect LCD */
-#define MASK_DISPTYPE_TV       0x01         /* Connect TV */
-#define MASK_DISPTYPE_DISP2    (MASK_DISPTYPE_LCD | MASK_DISPTYPE_TV | MASK_DISPTYPE_CRT2)
+#define VB_30xLV                0x04000000  	
+#define VB_30xLVX               0x08000000  	
+#define VB_TRUMPION		0x10000000     
+#define VB_VIDEOBRIDGE		(VB_301|VB_301B|VB_302B|VB_303|VB_30xLV|VB_30xLVX| \
+				 VB_LVDS|VB_CHRONTEL|VB_TRUMPION) /* TW */
+#define VB_SISBRIDGE            (VB_301|VB_301B|VB_302B|VB_303|VB_30xLV|VB_30xLVX)
+#define SINGLE_MODE             0x20000000   	/* TW: CRT1 or CRT2; determined by DISPTYPE_CRTx */
+#define VB_DISPMODE_SINGLE	SINGLE_MODE  	/* TW: alias */
+#define MIRROR_MODE		0x40000000   	/* TW: CRT1 + CRT2 identical (mirror mode) */
+#define VB_DISPMODE_MIRROR	MIRROR_MODE  	/* TW: alias */
+#define DUALVIEW_MODE		0x80000000   	/* TW: CRT1 + CRT2 independent (dual head mode) */
+#define VB_DISPMODE_DUAL	DUALVIEW_MODE 	/* TW: alias */
+#define DISPLAY_MODE            (SINGLE_MODE | MIRROR_MODE | DUALVIEW_MODE) /* TW */
+
+/* TW: pSiS->VBLCDFlags */
+#define VB_LCD_320x480		0x00000001	/* TW: DSTN/FSTN for 550 */
+#define VB_LCD_640x480          0x00000002
+#define VB_LCD_800x600          0x00000004
+#define VB_LCD_1024x768         0x00000008
+#define VB_LCD_1280x1024        0x00000010
+#define VB_LCD_1280x960    	0x00000020
+#define VB_LCD_1600x1200	0x00000040
+#define VB_LCD_2048x1536	0x00000080
+#define VB_LCD_1400x1050        0x00000100
+#define VB_LCD_1152x864         0x00000200
+#define VB_LCD_1152x768         0x00000400
+#define VB_LCD_1280x768         0x00000800
+#define VB_LCD_1024x600         0x00001000
+
+/* TW: More or less useful macros (although we often use pSiS->VGAEngine instead) */
+#define SIS_IS_300_CHIPSET    	(pSiS->Chipset == PCI_CHIP_SIS300) || \
+	     		       	(pSiS->Chipset == PCI_CHIP_SIS630) || \
+	     			(pSiS->Chipset == PCI_CHIP_SIS540) || \
+				(pSiS->Chipset == PCI_CHIP_SIS730)
+
+/* This preliminaryly also contains SIS330 */
+#define SIS_IS_315_CHIPSET    	(pSiS->Chipset == PCI_CHIP_SIS315) || \
+	     		       	(pSiS->Chipset == PCI_CHIP_SIS315H) || \
+	     			(pSiS->Chipset == PCI_CHIP_SIS315PRO) || \
+				(pSiS->Chipset == PCI_CHIP_SIS550) || \
+				(pSiS->Chipset == PCI_CHIP_SIS650) || \
+				(pSiS->Chipset == PCI_CHIP_SIS330)
+
+/* SiS6326Flags */
+#define SIS6326_HASTV		0x00000001
+#define SIS6326_TVSVIDEO        0x00000002
+#define SIS6326_TVCVBS          0x00000004
+#define SIS6326_TVPAL		0x00000008
+#define SIS6326_TVDETECTED      0x00000010
+#define SIS6326_TVON            0x80000000
+
+#define HW_DEVICE_EXTENSION	SIS_HW_DEVICE_INFO
 
 #ifdef  DEBUG
 #define PDEBUG(p)       p
@@ -116,15 +239,49 @@
 #define PDEBUG(p)
 #endif
 
+typedef unsigned long ULong;
+typedef unsigned short UShort;
+typedef unsigned char UChar;
+
+/* TW: VGA engine types */
+#define UNKNOWN_VGA 0
+#define SIS_530_VGA 1
+#define SIS_OLD_VGA 2
+#define SIS_300_VGA 3
+#define SIS_315_VGA 4
+
+/* TW: oldChipset */
+#define OC_UNKNOWN  0
+#define OC_SIS6205A 3
+#define OC_SIS6205B 4
+#define OC_SIS82204 5
+#define OC_SIS6205C 6
+#define OC_SIS6225  7
+#define OC_SIS5597  8
+#define OC_SIS6326  9
+#define OC_SIS530A  11
+#define OC_SIS530B  12
+
+/* TW: Chrontel type */
+#define CHRONTEL_700x 0
+#define CHRONTEL_701x 1
+
+/* Flags650 */
+#define SiS650_LARGEOVERLAY 0x00000001
+
+/* TW: For backup of register contents */
 typedef struct {
         unsigned char sisRegs3C4[0x50];
-        unsigned char sisRegs3D4[0x40];
+        unsigned char sisRegs3D4[0x90];
         unsigned char sisRegs3C2;
-        unsigned char VBPart1[0x29];
-        unsigned char VBPart2[0x46];
-        unsigned char VBPart3[0x3F];
-        unsigned char VBPart4[0x1C];
-        unsigned short ch7005[0x11];
+        unsigned char VBPart1[0x50];
+        unsigned char VBPart2[0x50];
+        unsigned char VBPart3[0x50];
+        unsigned char VBPart4[0x50];
+        unsigned short ch70xx[64];
+	unsigned long sisMMIO85C0;    /* TW: Queue location for 310/325 series */
+	unsigned char sis6326tv[0x46];
+	unsigned long sisRegsPCI50, sisRegsPCIA0;
 } SISRegRec, *SISRegPtr;
 
 typedef struct _sisModeInfoPtr {
@@ -135,57 +292,169 @@ typedef struct _sisModeInfoPtr {
     struct _sisModeInfoPtr *next;
 } sisModeInfoRec, *sisModeInfoPtr;
 
+/* TW: SISFBLayout is mainly there because of DGA. It holds the
+       current layout parameters needed for acceleration and other
+       stuff. When switching mode using DGA, these are set up
+       accordingly and not necessarily match pScrn's. Therefore,
+       driver modules should read these values instead of pScrn's.
+ */
+typedef struct {
+    int                bitsPerPixel;   	/* TW: Copy from pScrn->bitsPerPixel */
+    int                depth;		/* TW: Copy from pScrn->depth */
+    int                displayWidth;	/* TW: Copy from pScrn->displayWidth */
+    DisplayModePtr     mode;		/* TW: Copy from pScrn->currentMode */
+} SISFBLayout;
+
+/* TW: Dual head private entity structure */
+#ifdef SISDUALHEAD
+typedef struct {
+    ScrnInfoPtr         pScrn_1;
+    ScrnInfoPtr         pScrn_2;
+    unsigned char *     BIOS;
+    SiS_Private   *     SiS_Pr;                 /* TW: For new mode switching code */
+    int			CRT1ModeNo;		/* Current display mode for CRT1 */
+    DisplayModePtr	CRT1DMode;		/* Current display mode for CRT1 */
+    int 		CRT2ModeNo;		/* Current display mode for CRT2 */
+    DisplayModePtr	CRT2DMode;		/* Current display mode for CRT2 */
+    int			refCount;
+    int 		lastInstance;		/* number of entities */
+    Bool		DisableDual;		/* Emergency flag */
+    Bool		ErrorAfterFirst;	/* Emergency flag: Error after first init -> Abort second */
+    Bool		HWCursor;		/* Backup master settings for use on slave */
+    Bool                TurboQueue;
+    int                 ForceCRT2Type;
+    int                 OptTVStand;
+    int                 OptTVOver;
+    int			OptTVSOver;
+    int                 OptROMUsage;
+    int                 PDC;
+    Bool                NoAccel;
+    Bool                NoXvideo;
+    int			forceCRT1;
+    int			DSTN;
+    Bool		XvOnCRT2;
+    int                 maxUsedClock;  		/* Max used pixelclock on master head */
+    unsigned long       masterFbAddress;	/* Framebuffer addresses and sizes */
+    unsigned long	masterFbSize;
+    unsigned long       slaveFbAddress;
+    unsigned long	slaveFbSize;
+    unsigned char *     FbBase;         	/* VRAM linear address */
+    unsigned char *     IOBase;         	/* MMIO linear address */
+    unsigned short      MapCountIOBase;		/* map/unmap queue counter */
+    unsigned short      MapCountFbBase;		/* map/unmap queue counter */
+    Bool 		forceUnmapIOBase;	/* ignore counter and unmap */
+    Bool		forceUnmapFbBase;	/* ignore counter and unmap */
+#ifdef __alpha__
+    unsigned char *     IOBaseDense;    	/* MMIO for Alpha platform */
+    unsigned short      MapCountIOBaseDense;
+    Bool		forceUnmapIOBaseDense;  /* ignore counter and unmap */
+#endif
+    int			chtvlumabandwidthcvbs;  /* TW: TV settings for Chrontel TV encoder */
+    int			chtvlumabandwidthsvideo;
+    int			chtvlumaflickerfilter;
+    int			chtvchromabandwidth;
+    int			chtvchromaflickerfilter;
+    int			chtvcvbscolor;
+    int			chtvtextenhance;
+    int			chtvcontrast;
+    int			sistvedgeenhance;	/* TW: TV settings for SiS bridge */
+    int			sistvantiflicker;
+    int			sistvsaturation;
+    int			tvxpos;
+    int			tvypos;
+    int			ForceTVType;
+    int			chtvtype;
+    int                 NonDefaultPAL;
+    unsigned short	tvx, tvy;
+    unsigned char	p2_01, p2_02, p2_2d;
+    unsigned short      cursorBufferNum;
+    BOOLEAN		restorebyset;
+} SISEntRec, *SISEntPtr;
+#endif
+
 #define SISPTR(p)       ((SISPtr)((p)->driverPrivate))
 #define XAAPTR(p)       ((XAAInfoRecPtr)(SISPTR(p)->AccelInfoPtr))
 
 typedef struct {
-    ScrnInfoPtr         pScrn;
-    pciVideoPtr         PciInfo;
+    ScrnInfoPtr         pScrn;		/* -------------- DON'T INSERT ANYTHING HERE --------------- */
+    pciVideoPtr         PciInfo;	/* -------- OTHERWISE sis_dri.so MUST BE RECOMPILED -------- */
     PCITAG              PciTag;
     EntityInfoPtr       pEnt;
     int                 Chipset;
     int                 ChipRev;
-    unsigned long       FbAddress;      /* VRAM physical address */
-
-    unsigned char *     FbBase;         /* VRAM linear address */
+    int			VGAEngine;      /* TW: see above */
+    int	                hasTwoOverlays; /* TW: Chipset supports two video overlays? */
+    HW_DEVICE_EXTENSION sishw_ext;      /* TW: For new mode switching code */
+    SiS_Private   *     SiS_Pr;         /* TW: For new mode switching code */
+    int			DSTN; 		/* TW: For 550 FSTN/DSTN; set by option, no detection */
+    unsigned long       FbAddress;      /* VRAM physical address (in DHM: for each Fb!) */
+    unsigned long       realFbAddress;  /* For DHM/PCI mem mapping: store global FBAddress */
+    unsigned char *     FbBase;         /* VRAM virtual linear address */
     CARD32              IOAddress;      /* MMIO physical address */
     unsigned char *     IOBase;         /* MMIO linear address */
+    IOADDRESS           IODBase;        /* Base of PIO memory area */
 #ifdef __alpha__
     unsigned char *     IOBaseDense;    /* MMIO for Alpha platform */
 #endif
-    CARD16              RelIO;          /* Relocate IO Base */
+    CARD16              RelIO;          /* Relocated IO Ports baseaddress */
     unsigned char *     BIOS;
     int                 MemClock;
     int                 BusWidth;
     int                 MinClock;
     int                 MaxClock;
     int                 Flags;          /* HW config flags */
-    long                FbMapSize;
+    long                FbMapSize;	/* Used for Mem Mapping - DON'T CHANGE THIS */
+    long                availMem;       /* Really available Fb mem (minus TQ, HWCursor) */
     unsigned long	maxxfbmem;      /* limit fb memory X is to use to this (KB) */
+    unsigned long       sisfbMem;       /* heapstart of sisfb (if running) */
+#ifdef SISDUALHEAD
+    unsigned long	dhmOffset;	/* Offset to memory for each head (0 or ..) */
+#endif
     DGAModePtr          DGAModes;
     int                 numDGAModes;
     Bool                DGAactive;
     int                 DGAViewportStatus;
+    int                 OldMode;        /* TW: Back old modeNo (if available) */
     Bool                NoAccel;
     Bool                NoXvideo;
+    Bool		XvOnCRT2;       /* TW: see sis_opt.c */
     Bool                HWCursor;
     Bool                UsePCIRetry;
     Bool                TurboQueue;
     int			VESA;
     int                 ForceCRT2Type;
+    int                 OptTVStand;
+    int                 OptTVOver;
+    int                 OptROMUsage;
+    int                 UseCHOverScan;
     Bool                ValidWidth;
-    Bool                FastVram;
-    int                 VBFlags;
-    short               scrnOffset;
+    Bool                FastVram;		/* TW: now unused */
+    int			forceCRT1;
+    Bool		CRT1changed;
+    unsigned char       oldCR17;
+    unsigned char       oldCR32;
+    unsigned char       newCR32;
+    int                 VBFlags;		/* TW: Video bridge configuration */
+    int                 VBFlags_backup;         /* TW: Backup for SlaveMode-modes */
+    int                 VBLCDFlags;             /* TW: Moved LCD panel size bits here */
+    int                 ChrontelType;           /* TW: CHRONTEL_700x or CHRONTEL_701x */
+    int                 PDC;			/* TW: PanelDelayCompensation */
+    short               scrnOffset;		/* TW: Screen pitch (data) */
+    short               scrnPitch;		/* TW: Screen pitch (display; regarding interlace) */
     short               DstColor;
-    int                 Xdirection;
-    int                 Ydirection;
+    int                 xcurrent;               /* for temp use in accel */
+    int                 ycurrent;               /* for temp use in accel */
+    long		SiS310_AccelDepth; 	/* used in accel for 310/325 series */
+    int                 Xdirection;  		/* for temp use in accel */
+    int                 Ydirection;  		/* for temp use in accel */
     int                 sisPatternReg[4];
     int                 ROPReg;
     int                 CommandReg;
     int                 MaxCMDQueueLen;
     int                 CurCMDQueueLen;
     int                 MinCMDQueueLen;
+    CARD16		CursorSize;  		/* TW: Size of HWCursor area (bytes) */
+    CARD32		cursorOffset;		/* TW: see sis_driver.c and sis_cursor.c */
     int                 DstX;
     int                 DstY;
     unsigned char *     XAAScanlineColorExpandBuffers[2];
@@ -198,85 +467,157 @@ typedef struct {
     XAAInfoRecPtr       AccelInfoPtr;
     CloseScreenProcPtr  CloseScreen;
     unsigned int        (*ddc1Read)(ScrnInfoPtr);
-    Bool        (*ModeInit)(ScrnInfoPtr pScrn, DisplayModePtr mode);
-    void        (*SiSSave)(ScrnInfoPtr pScrn, SISRegPtr sisreg);
-    void        (*SiSSave2)(ScrnInfoPtr pScrn, SISRegPtr sisreg);
-    void        (*SiSSave3)(ScrnInfoPtr pScrn, SISRegPtr sisreg);
-    void        (*SiSSaveLVDS)(ScrnInfoPtr pScrn, SISRegPtr sisreg);
-    void        (*SiSSaveChrontel)(ScrnInfoPtr pScrn, SISRegPtr sisreg);
-    void        (*SiSRestore)(ScrnInfoPtr pScrn, SISRegPtr sisreg);
-    void        (*SiSRestore2)(ScrnInfoPtr pScrn, SISRegPtr sisreg);
-    void        (*SiSRestore3)(ScrnInfoPtr pScrn, SISRegPtr sisreg);
-    void        (*SiSRestoreLVDS)(ScrnInfoPtr pScrn, SISRegPtr sisreg);
-    void        (*SiSRestoreChrontel)(ScrnInfoPtr pScrn, SISRegPtr sisreg);
-    void        (*SetThreshold)(ScrnInfoPtr pScrn, DisplayModePtr mode,
+    Bool        	(*ModeInit)(ScrnInfoPtr pScrn, DisplayModePtr mode);
+    void        	(*SiSSave)(ScrnInfoPtr pScrn, SISRegPtr sisreg);
+    void        	(*SiSSave2)(ScrnInfoPtr pScrn, SISRegPtr sisreg);
+    void        	(*SiSSave3)(ScrnInfoPtr pScrn, SISRegPtr sisreg);
+    void        	(*SiSSaveLVDSChrontel)(ScrnInfoPtr pScrn, SISRegPtr sisreg);
+    void        	(*SiSRestore)(ScrnInfoPtr pScrn, SISRegPtr sisreg);
+    void        	(*SiSRestore2)(ScrnInfoPtr pScrn, SISRegPtr sisreg);
+    void        	(*SiSRestore3)(ScrnInfoPtr pScrn, SISRegPtr sisreg);
+    void        	(*SiSRestoreLVDSChrontel)(ScrnInfoPtr pScrn, SISRegPtr sisreg);
+    void        	(*SetThreshold)(ScrnInfoPtr pScrn, DisplayModePtr mode,
                                 unsigned short *Low, unsigned short *High);
-    void        (*LoadCRT2Palette)(ScrnInfoPtr pScrn, int numColors,
-                int *indicies, LOCO *colors, VisualPtr pVisual);
-        
-    int *cmdQueueLenPtr;
-    unsigned long agpHandle;
-    CARD32 agpAddr;
-    unsigned char *agpBase;
-    unsigned int agpSize;
-    CARD32 agpCmdBufAddr;
-    unsigned char *agpCmdBufBase;
-    unsigned int agpCmdBufSize;
-    unsigned int agpCmdBufFree;
-    Bool irqEnabled;
-    int irq;
-    int ColorExpandRingHead;
-    int ColorExpandRingTail;
-    int PerColorExpandBufferSize;
-    int ColorExpandBufferNumber;
-    int ColorExpandBufferCountMask;
-    unsigned char *ColorExpandBufferAddr[32];
-    int ColorExpandBufferScreenOffset[32];
-    int ImageWriteBufferSize;
-    unsigned char *ImageWriteBufferAddr;
-
-	int Rotate;
-	void        (*PointerMoved)(int index, int x, int y);
-	
-	/* ShadowFB support */
-	Bool 		ShadowFB;
-	unsigned char *ShadowPtr;
-	int  		ShadowPitch;
+    void        	(*LoadCRT2Palette)(ScrnInfoPtr pScrn, int numColors,
+                		int *indicies, LOCO *colors, VisualPtr pVisual);
+
+    int                 cmdQueueLen;		/* TW: Current cmdQueueLength (for 2D and 3D) */
+    int	 		*cmdQueueLenPtr;
+    unsigned long 	agpHandle;
+    CARD32 		agpAddr;
+    unsigned char 	*agpBase;
+    unsigned int 	agpSize;
+    CARD32 		agpCmdBufAddr;
+    unsigned char 	*agpCmdBufBase;
+    unsigned int 	agpCmdBufSize;
+    unsigned int 	agpCmdBufFree;
+    Bool 		irqEnabled;
+    int 		irq;
 
+    int 		ColorExpandRingHead;
+    int 		ColorExpandRingTail;
+    int 		PerColorExpandBufferSize;
+    int 		ColorExpandBufferNumber;
+    int 		ColorExpandBufferCountMask;
+    unsigned char 	*ColorExpandBufferAddr[32];
+    int 		ColorExpandBufferScreenOffset[32];
+    int 		ImageWriteBufferSize;
+    unsigned char 	*ImageWriteBufferAddr;
+
+    int 		Rotate;
+    void        	(*PointerMoved)(int index, int x, int y);
+
+    /* ShadowFB support */
+    Bool 		ShadowFB;
+    unsigned char 	*ShadowPtr;
+    int  		ShadowPitch;
 
 #ifdef XF86DRI
-        Bool directRenderingEnabled;
-        DRIInfoPtr pDRIInfo;
-        int drmSubFD;
-        int numVisualConfigs;
-        __GLXvisualConfig* pVisualConfigs;
-        SISConfigPrivPtr pVisualConfigsPriv;
-        SISRegRec DRContextRegs;
+    Bool 		directRenderingEnabled;
+    DRIInfoPtr 		pDRIInfo;
+    int 		drmSubFD;
+    int 		numVisualConfigs;
+    __GLXvisualConfig* 	pVisualConfigs;
+    SISConfigPrivPtr 	pVisualConfigsPriv;
+    SISRegRec 		DRContextRegs;
+#endif
+
+    XF86VideoAdaptorPtr adaptor;
+    ScreenBlockHandlerProcPtr BlockHandler;
+    void                (*VideoTimerCallback)(ScrnInfoPtr, Time);
+
+    OptionInfoPtr 	Options;
+    unsigned char 	LCDon;
+#ifdef SISDUALHEAD
+    Bool		BlankCRT1, BlankCRT2;
+#endif
+    Bool 		Blank;
+    unsigned char 	BIOSModeSave;
+    int 		CRT1off;		/* TW: 1=CRT1 off, 0=CRT1 on */
+    CARD16 		LCDheight;		/* TW: Vertical resolution of LCD panel */
+    CARD16 		LCDwidth;		/* TW: Horizontal resolution of LCD panel */
+    vbeInfoPtr 		pVbe;			/* TW: For VESA mode switching */
+    CARD16 		vesamajor;
+    CARD16 		vesaminor;
+    VbeInfoBlock 	*vbeInfo;
+    int 		UseVESA;
+    sisModeInfoPtr      SISVESAModeList;
+    xf86MonPtr 		monitor;
+    CARD16 		maxBytesPerScanline;
+    CARD32 		*pal, *savedPal;
+    int 		mapPhys, mapOff, mapSize;
+    int 		statePage, stateSize, stateMode;
+    CARD8 		*fonts;
+    CARD8 		*state, *pstate;
+    void 		*base, *VGAbase;
+#ifdef SISDUALHEAD
+    BOOL 		DualHeadMode;		/* TW: TRUE if we use dual head mode */
+    BOOL 		SecondHead;		/* TW: TRUE is this is the second head */
+    SISEntPtr 		entityPrivate;		/* TW: Ptr to private entity (see above) */
+    BOOL		SiSXinerama;		/* TW: Do we use Xinerama mode? */
 #endif
-        XF86VideoAdaptorPtr adaptor;
-        ScreenBlockHandlerProcPtr BlockHandler;
-
-    OptionInfoPtr Options;
-    unsigned char LCDon;
-    Bool Blank;
-    unsigned char BIOSModeSave;
-    int CRT1off;		/* TW: 1=CRT1 off, 0=CRT1 on */
-    CARD16 LCDheight;		/* TW: Vertical resolution of LCD panel */
-    vbeInfoPtr pVbe;		/* TW: all following for VESA switching with 630+LVDS */
-    CARD16 vesamajor;
-    CARD16 vesaminor;
-    VbeInfoBlock *vbeInfo;
-    int UseVESA;
-    xf86MonPtr monitor;
-    CARD16 maxBytesPerScanline;
-    CARD32 *pal, *savedPal;
-    int mapPhys, mapOff, mapSize;
-    int statePage, stateSize, stateMode;
-    CARD8 *fonts;
-    CARD8 *state, *pstate;
-    void *base, *VGAbase;
-    int     xcurrent, ycurrent;
-    sisModeInfoPtr VesaModeList;
+    SISFBLayout         CurrentLayout;		/* TW: Current framebuffer layout */
+    Bool                (*i2cInit)(ScrnInfoPtr);/* I2C stuff */
+    I2CBusPtr           I2C;
+    USHORT              SiS_DDC2_Index;
+    USHORT              SiS_DDC2_Data;
+    USHORT              SiS_DDC2_Clk;
+    BOOL		Primary;		/* TW: Display adapter is primary */
+    xf86Int10InfoPtr    pInt;			/* TW: Our int10 */
+    int                 oldChipset;		/* TW: Type of old chipset */
+    CARD32              RealVideoRam;		/* TW: 6326 can only address 4MB, but TQ can be above */
+    CARD32              CmdQueLenMask;		/* TW: Mask of queue length in MMIO register */
+    CARD32              CmdQueLenFix;           /* TW: Fix value to subtract from QueLen (530/620) */
+    CARD32              CmdQueMaxLen;           /* TW: (6326/5597/5598) Amount of cmds the queue can hold */
+    CARD32              TurboQueueLen;		/* TW: For future use */
+    CARD32              detectedCRT2Devices;	/* TW: detected CRT2 devices before mask-out */
+    Bool                NoHostBus;		/* TW: Enable/disable 5597/5598 host bus */
+    Bool		noInternalModes;	/* TW: Use our own default modes? */
+    char *              sbiosn;			/* TW: For debug */
+    int			OptUseOEM;		/* TW: Use internal OEM data? */
+    int			chtvlumabandwidthcvbs;  /* TW: TV settings for Chrontel TV encoder */
+    int			chtvlumabandwidthsvideo;
+    int			chtvlumaflickerfilter;
+    int			chtvchromabandwidth;
+    int			chtvchromaflickerfilter;
+    int			chtvcvbscolor;
+    int			chtvtextenhance;
+    int			chtvcontrast;
+    int			sistvedgeenhance;	/* TW: TV settings for SiS bridges */
+    int			sistvantiflicker;
+    int			sistvsaturation;
+    int			OptTVSOver;		/* TW: Chrontel 7005: Superoverscan */
+    int			tvxpos;
+    int			tvypos;
+    int			SiS6326Flags;		/* TW: SiS6326 TV settings */
+    int			sis6326antiflicker;
+    int			sis6326enableyfilter;
+    int			sis6326yfilterstrong;
+    BOOL		donttrustpdc;		/* TW: Don't trust the detected PDC */
+    unsigned char	sisfbpdc;
+    int			NoYV12;			/* TW: Disable Xv YV12 support (old series) */
+    unsigned char       postVBCR32;
+    int			newFastVram;		/* TW: Replaces FastVram */
+    int			ForceTVType;
+    int                 NonDefaultPAL;
+    unsigned long       lockcalls;		/* TW: Count unlock calls for debug */
+    unsigned short	tvx, tvy;		/* TW: Backup TV position registers */
+    unsigned char	p2_01, p2_02, p2_2d;    /* TW: Backup TV position registers */
+    unsigned short      tvx1, tvx2, tvx3, tvy1; /* TW: Backup TV position registers */
+    BOOLEAN		ForceCursorOff;	
+    BOOLEAN		HaveCustomModes;	
+    BOOLEAN		IsCustom;
+    DisplayModePtr	backupmodelist;
+    int			chtvtype;
+    Atom                xvBrightness, xvContrast, xvColorKey, xvHue, xvSaturation;
+    Atom                xvAutopaintColorKey, xvSetDefaults;
+    unsigned long       Flags650;
+    BOOLEAN		UseHWARGBCursor;
+    int			OptUseColorCursor;
+    int			OptUseColorCursorBlend;
+    CARD32		OptColorCursorBlendThreshold;
+    unsigned short      cursorBufferNum;
+    BOOLEAN		restorebyset;
 } SISRec, *SISPtr;
 
 typedef struct _ModeInfoData {
@@ -285,4 +626,85 @@ typedef struct _ModeInfoData {
     VbeCRTCInfoBlock *block;
 } ModeInfoData;
 
+typedef struct _myhddctiming {
+    int           whichone;
+    unsigned char mask;
+    float         rate;
+} myhddctiming;
+
+typedef struct _myvddctiming {
+    int           whichone;
+    unsigned char mask;
+    int           rate;
+} myvddctiming;
+
+typedef struct _myddcstdmodes {
+    int hsize;
+    int vsize;
+    int refresh;
+    float hsync;
+} myddcstdmodes;
+
+typedef struct _pdctable {
+    int subsysVendor;
+    int subsysCard;
+    int pdc;
+    char *vendorName;
+    char *cardName;
+} pdctable;
+
+typedef struct _chswtable {
+    int subsysVendor;
+    int subsysCard;
+    char *vendorName;
+    char *cardName;
+} chswtable;
+
+extern void  sisSaveUnlockExtRegisterLock(SISPtr pSiS, unsigned char *reg1, unsigned char *reg2);
+extern void  sisRestoreExtRegisterLock(SISPtr pSiS, unsigned char reg1, unsigned char reg2);
+extern void  SiSOptions(ScrnInfoPtr pScrn);
+extern const OptionInfoRec * SISAvailableOptions(int chipid, int busid);
+extern void  SiSSetup(ScrnInfoPtr pScrn);
+extern void  SISVGAPreInit(ScrnInfoPtr pScrn);
+extern Bool  SiSAccelInit(ScreenPtr pScreen);
+extern Bool  SiS300AccelInit(ScreenPtr pScreen);
+extern Bool  SiS310AccelInit(ScreenPtr pScreen);
+extern Bool  SiS530AccelInit(ScreenPtr pScreen);
+extern Bool  SiSHWCursorInit(ScreenPtr pScreen);
+extern Bool  SISDGAInit(ScreenPtr pScreen);
+extern void  SISInitVideo(ScreenPtr pScreen);
+extern void  SIS6326InitVideo(ScreenPtr pScreen);
+
+extern void  SiS_SetCHTVlumabandwidthcvbs(ScrnInfoPtr pScrn, int val);
+extern void  SiS_SetCHTVlumabandwidthsvideo(ScrnInfoPtr pScrn, int val);
+extern void  SiS_SetCHTVlumaflickerfilter(ScrnInfoPtr pScrn, int val);
+extern void  SiS_SetCHTVchromabandwidth(ScrnInfoPtr pScrn, int val);
+extern void  SiS_SetCHTVchromaflickerfilter(ScrnInfoPtr pScrn, int val);
+extern void  SiS_SetCHTVcvbscolor(ScrnInfoPtr pScrn, int val);
+extern void  SiS_SetCHTVtextenhance(ScrnInfoPtr pScrn, int val);
+extern void  SiS_SetCHTVcontrast(ScrnInfoPtr pScrn, int val);
+extern void  SiS_SetSISTVedgeenhance(ScrnInfoPtr pScrn, int val);
+extern void  SiS_SetSISTVantiflicker(ScrnInfoPtr pScrn, int val);
+extern void  SiS_SetSISTVsaturation(ScrnInfoPtr pScrn, int val);
+extern void  SiS_SetSIS6326TVantiflicker(ScrnInfoPtr pScrn, int val);
+extern void  SiS_SetSIS6326TVenableyfilter(ScrnInfoPtr pScrn, int val);
+extern void  SiS_SetSIS6326TVyfilterstrong(ScrnInfoPtr pScrn, int val);
+extern void  SiS_SetTVxposoffset(ScrnInfoPtr pScrn, int val);
+extern void  SiS_SetTVyposoffset(ScrnInfoPtr pScrn, int val);
+extern int   SiS_GetCHTVlumabandwidthcvbs(ScrnInfoPtr pScrn);
+extern int   SiS_GetCHTVlumabandwidthsvideo(ScrnInfoPtr pScrn);
+extern int   SiS_GetCHTVlumaflickerfilter(ScrnInfoPtr pScrn);
+extern int   SiS_GetCHTVchromabandwidth(ScrnInfoPtr pScrn);
+extern int   SiS_GetCHTVchromaflickerfilter(ScrnInfoPtr pScrn);
+extern int   SiS_GetCHTVcvbscolor(ScrnInfoPtr pScrn);
+extern int   SiS_GetCHTVtextenhance(ScrnInfoPtr pScrn);
+extern int   SiS_GetCHTVcontrast(ScrnInfoPtr pScrn);
+extern int   SiS_GetSISTVedgeenhance(ScrnInfoPtr pScrn);
+extern int   SiS_GetSISTVantiflicker(ScrnInfoPtr pScrn);
+extern int   SiS_GetSISTVsaturation(ScrnInfoPtr pScrn);
+extern int   SiS_GetSIS6326TVantiflicker(ScrnInfoPtr pScrn);
+extern int   SiS_GetSIS6326TVenableyfilter(ScrnInfoPtr pScrn);
+extern int   SiS_GetSIS6326TVyfilterstrong(ScrnInfoPtr pScrn);
+extern int   SiS_GetTVxposoffset(ScrnInfoPtr pScrn);
+extern int   SiS_GetTVyposoffset(ScrnInfoPtr pScrn);
 #endif
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/sis/sis.man b/xc/programs/Xserver/hw/xfree86/drivers/sis/sis.man
index 297e5d4b7..76630443b 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/sis/sis.man
+++ b/xc/programs/Xserver/hw/xfree86/drivers/sis/sis.man
@@ -1,4 +1,4 @@
-.\" $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/sis.man,v 1.7 2002/04/04 14:05:47 eich Exp $ 
+.\" $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/sis.man,v 1.10 2003/01/29 15:42:16 eich Exp $
 .\" shorthand for double quote that works everywhere.
 .ds q \N'34'
 .TH SIS __drivermansuffix__ __vendorversion__
@@ -13,8 +13,8 @@ sis \- SiS video driver
 .B EndSection
 .fi
 .SH DESCRIPTION
-.B sis 
-is an XFree86 driver for SiS video cards. The driver is accelerated, and
+.B sis
+is an XFree86 driver for SiS video chips. The driver is accelerated, and
 provides support for 8, 16 and 24 colordepths. XVideo, Render and other
 extensions are supported as well.
 .SH SUPPORTED HARDWARE
@@ -22,76 +22,392 @@ The
 .B sis
 driver supports PCI and AGP video cards based on the following chipsets:
 .PP
-.B SIS5597
-.B SIS5598
-.B SIS530
-.B SIS6326
-.B SIS300
-.B SIS540
-.B SIS630
+.B SiS5597/5598
+.B SiS530/620
+.B SiS6326/AGP/DVD
+.B SiS300/305
+.B SiS540
+.B SiS630/730
+.B SiS315/H/PRO
+.B SiS550
+.B SiS650/651/650M/740
+.B SiS330 (Xabre)
+.PP
+In the following text, the following terms are used:
+.PP
+.B old series
+for SiS5597/5598, 530/620 and 6326/AGP/DVD
+.PP
+.B 300 series
+for SiS300/305, 540 and 630/730
+.PP
+.B 310/325/330 series
+for SiS315/H/PRO, 550 and 650/651/650M/740, 330
 .SH CONFIGURATION DETAILS
 Please refer to XF86Config(__filemansuffix__) for general configuration
 details.  This section only covers configuration details specific to this
-driver.
+driver. Please note that support for the SiS330 is new and there may be
+some problems.
+.PP
+.I "1. For all supported chipsets"
+.PP
+The following driver
+.B Options
+are supported on all chipsets:
+.TP
+.BI "Option \*qNoAccel\*q \*q" boolean \*q
+Disable or enable 2D acceleration. Please note: On chipsets with XVideo
+support, this also disables XVideo. Default: acceleration is enabled.
+.TP
+.BI "Option \*qHWCursor\*q \*q" boolean \*q
+Enable or disable the HW cursor. Default: HWCursor is on.
+.TP
+.BI "Option \*qSWCursor\*q \*q" boolean \*q
+The opposite of HWCursor. Default: SWCursor is off.
+.TP
+.BI "Option \*qRotate\*q \*qCW\*q"
+Rotate the display clockwise. This mode is unaccelerated, and uses
+the Shadow Frame Buffer layer.
+Default: no rotation.
+.TP
+.BI "Option \*qRotate\*q \*qCCW\*q"
+Rotate the display counterclockwise. This mode is unaccelerated, and
+uses the Shadow Frame Buffer layer.
+Default: no rotation.
+.TP
+.BI "Option \*qShadowFB\*q \*q" boolean \*q
+Enable or disable use of the shadow framebuffer layer.
+Default: Shadow framebuffer is off.
+.PP
+.I "2. Old series specific information"
 .PP
 The driver will auto-detect the amount of video memory present for all
-chips, but in the 6326 case, it will limit the memory size to 4MB. This
-is because of a bug (in docs at least). You can override this using the
+these chips, but in the 6326 case, it will limit the memory size to 4MB.
+This is because the 6326's 2D engine can only address 4MB. The remaining
+memory seems to be intended for 3D texture data, since only the 3D
+engine can address RAM above 4MB. However, you can override this forced
+limitation using the
 .B \*qVideoRAM\*q
 option in the device section if your board has more than
-4MB and you need to use it (maybe with cursor problems).
+4MB and you need to use it. However, 2D acceleration, Xvideo and the
+HWCursor will be disabled in this case.
 .PP
+The driver will also auto-detect the maximum dotclock and DAC speed.
 If you have problems getting high resolutions because of dot clock
 limitations, try using the
 .B \*qDacSpeed\*q
-option, also in the device section.
+option, also in the device section. However, this is not recommended
+for the 6326. For this chipset, the driver has two built-in modes for
+high resolutions which you should use instead. These are named
+.B \*qSIS1280x1024-75\*q
+and
+.B \*qSIS1600x1200-60\*q
+and they will be added to the list of default modes. To use these modes,
+just place them in your Screen section. Example:
+.PP
+.BI "Modes \*qSIS1600x1200-60\*q \*qSIS1280x1024x75\*q \*q1024x768\*q ...
+.PP
+1280x1024 is only available at 8, 15 and 16bpp. 1600x1200 is available
+at 8bpp only.
+.PP
+TV support for the 6326
+.PP
+TV output is supported on the 6326. The driver will auto detect a
+TV connected, and in this case add the following modes to the list
+of default modes: "PAL800x600", "PAL800x600U", "PAL720x540",
+"PAL640x480", "NTSC640x480", "NTSC640x480U" and "NTSC640x400".
+Use these modes like the hi-res modes described above.
 .PP
 The following driver
 .B Options
-are supported:
+are supported on the old series:
 .TP
-.BI "Option \*qNoAccel\*q \*q" boolean \*q
-Disable or enable acceleration. Default: acceleration is enabled.
+.BI "Option \*qTurboQueue\*q \*q" boolean \*q
+Enable or disable TurboQueue mode.  Default: off for SIS530/620, on for
+the others
 .TP
-.BI "Option \*qHWCursor\*q \*q" boolean \*q
-Enable or disable the HW cursor. Default: on.
+.BI "Option \*qFastVram\*q \*q" boolean \*q
+Enable or disable FastVram mode.  Enabling this sets the video RAM timing 
+to only one cycle per read operation instead of two cycles. Disabling
+this will set 2 cycles for read and write operations. Leaving this
+option out uses the default.
+Default: off for read, on for write.
 .TP
-.BI "Option \*qSWCursor\*q \*q" boolean \*q
-The opposite of HWCursor. Default: off.
+.BI "Option \*qNoHostBus\*q \*q" boolean \*q
+(SiS5597/5598 only). Disable CPU-to-VGA host bus support. This
+speeds up CPU to video RAM transfers. Default: Host bus is enabled.
 .TP
-.BI "Option \*qNoXVideo*q \*q" boolean \*q
-Disable XV (XVideo) extension support. Default: off.
+.BI "Option \*qNoXVideo\*q \*q" boolean \*q
+Disable XV (XVideo) extension support. Default: XVideo is on.
 .TP
-.BI "Option \*qSetMClk\*q \*q" integer \*q
-Set the memory clock. Value in MHz. Default: autodetect.
+.BI "Option \*qTVStandard\*q \*q" string \*q
+(6326 only) Possible parameters are
+.B PAL
+or
+.B NTSC.
+The default is set by a jumper on the card.
 .TP
-.BI "Option \*qPciRetry\*q \*q" boolean \*q
-Enable or disable PCI retries.  Default: on.
+.BI "Option \*qTVXPosOffset\*q \*q" integer \*q
+(6326 only) This option allows horizontal relocation the TV output.
+The range is from -16 to 16.
 .TP
-.BI "Option \*qTurboQueue\*q \*q" boolean \*q
-Enable or disable TurboQueue mode.  Default: off for SIS530, on for the
-others
+.BI "Option \*qTVYPosOffset\*q \*q" integer \*q
+(6326 only) This option allows vertical relocation the TV output.
+The range is from -16 to 16.
 .TP
-.BI "Option \*qFastVram\*q \*q" boolean \*q
-Enable or disable FastVram mode.  Default: on.
+.BI "Option \*qSIS6326TVEnableYFilter\*q \*q" boolean \*q
+(6326 only) This option allows enabling/disabling the Y filter for
+TV output.
 .TP
-.BI "Option \*qRotate\*q \*qCW\*q"
-Rotate the display clockwise. This mode is unaccelerated, and uses 
-the Shadow Frame Buffer layer.
-Default: no rotation.
+.BI "Option \*qSIS6326TVAntiFlicker\*q \*q" string \*q
+(6326 only) This option allow enabling/disabling the anti flicker
+facility for TV output. Possible parameters are
+.B OFF, LOW, MED, HIGH
+or
+.B ADAPTIVE.
+By experience,
+.B ADAPTIVE
+yields the best results.
+.PP
+.I "2. 300 and 310/325/330 series specific information"
+.PP
+The 300 and 310/325/330 series very often come with a video bridge for
+controlling LCD and TV output. Hereinafter, the term
+.B CRT1
+refers to the VGA output of the chip, and
+.B CRT2
+refers to either LCD, TV or secondary VGA. Due to timing reasons,
+only one CRT2 output can be active at the same time. But this
+limitation does not apply to using CRT1 and CRT2 at the same time
+which makes it possible to run the driver in dual head mode.
+.PP
+The driver supports the following video bridges:
+.PP
+.B SiS301
+.B SiS301B
+.B SiS301LV
+.B SiS302B
+.B SiS302LV
+.PP
+Instead of a video bridge, some machines have a
+.B LVDS
+transmitter to control LCD panels, and a
+.B "Chrontel 7005"
+or
+.B "7019"
+for TV output. All these are supported as well.
+.PP
+About TV output
+.PP
+On the SiS301 and the Chrontel 7005, only resolutions up to 800x600
+are supported. On all others, resolutions up to 1024x768 are supported.
+.PP
+About XVideo support
+.PP
+XVideo is supported on all chipsets of both families. However, there
+are some differences in hardware features which cause limitations.
+The 300 series as well as the SiS550, 650M, 651 and 330 support two video
+overlays. The SiS315/H/PRO and 650/740 support only one such overlay.
+On chips with two overlays, one overlay is used for CRT1, the other
+for CRT2. On the other chipsets, the option
+.B \*qXvOnCRT2\*q
+can be used to select the desired output channel.
+.PP
+About dual-head support
+.PP
+Dual head mode has some limitations as regards color depth and
+resolution. Due to memory bandwidth limits, CRT1 might have a
+reduced refresh rate if running on higher resolutions than
+1280x1024.
+.PP
+Colordepth 8 is not supported when running in dual head mode.
+.PP
+The following driver
+.B Options
+are supported on the 300 and 310/325 series:
 .TP
-.BI "Option \*qRotate\*q \*qCCW\*q"
-Rotate the display counterclockwise. This mode is unaccelerated, and
-uses the Shadow Frame Buffer layer.
-Default: no rotation.
+.BI "Option \*qNoXVideo\*q \*q" boolean \*q
+Disable XV (XVideo) extension support.
+Default: XVideo is on.
 .TP
-.BI "Option \*qForceCRT2Type\*q \*qstring\*q"
-Force display type to one of: TV, LCD or VGA. Default: auto detect.
+.BI "Option \*qXvOnCRT2\*q \*q" boolean \*q
+On chipsets with only one video overlay, this option can
+used to bind the overlay to CRT1 ( if a monitor is detected
+and if this option is either unset or set to
+.B false
+) or CRT2 ( if a CRT2 device is detected or forced, and if this
+option is set to
+.B true
+). If either only CRT1 or CRT2 is detected, the driver decides
+automatically.
+Default: overlay is used on CRT1
 .TP
-.BI "Option \*qShadowFB\*q \*q" boolean \*q
-Enable or disable use of the shadow framebuffer layer. Default: off.
+.BI "Option \*qForceCRT1\*q \*q" boolean \*q
+The BIOS detects VGA monitors connected to CRT1 at boot time
+and the X driver by default relies on the information passed
+by the BIOS. However, some old monitors are not detected
+correctly. If this is the case, or if you connected the VGA
+monitor after you booted the machine, you may set this
+option to
+.B true
+in order to make the X driver ignore the
+information from the BIOS and initialize CRT1 anyway.
+If this option is set to
+.B false
+, the driver will switch
+off CRT1 and thus save memory bandwidth.
+Default: auto detect CRT1
+.TP
+.BI "Option \*qForceCRT2Type\*q \*q" string \*q
+Force display type to one of:
+.B NONE
+,
+.B TV
+,
+.B SVIDEO
+,
+.B COMPOSITE
+,
+.B SCART,
+,
+.B LCD
+,
+.B VGA
+;
+.B NONE
+will disable CRT2. The SVIDEO, COMPOSITE and SCART parameters
+can be used to force the driver to use a specific TV output
+connector (if present).
+Default: auto detect.
+.TP
+.BI "Option \*qPanelDelayCompensation\*q \*q" integer \*q
+This option is only for machines with a 300 series chipset
+and either a SiS301B video bridge or a LVDS transmitter.
+Different LCD panels require different delay compensation
+values. In most cases, the driver can autodetect this value.
+However, due to bad BIOS design this might fail in rare
+cases. If your LCD shows small horizontal waves, set the
+parameter of this option first to
+.B 4
+,
+.B 32
+or
+.B 24
+and if the problem persists, try using other values between
+4 and 60 in steps of 4.
+.TP
+.BI "Option \*qUseROMData\*q \*q" boolean \*q
+The driver reads some data from the BIOS ROM, especially
+LCD dependent information. If the folks at SiS some day
+decide to change the location of this data inside the
+BIOS image, the display might not be initialized correctly.
+In order to prevent this, set this option's parameter to
+.B false.
+Default: ROM data is used
+.TP
+.BI "Option \*qTVStandard\*q \*q" string \*q
+Force the TV standard to either
+.B PAL
+or
+.B NTSC.
+On some machines with 630, 730 or 650/740,
+.B PALM
+and
+.B PALN
+are supported as well. Default: BIOS setting.
+.TP
+.BI "Option \*qTVXPosOffset\*q \*q" integer \*q
+This option allows horizontal relocation the TV output.
+The range is from -32 to 32. Not supported on the Chrontel
+7019 yet.
+.TP
+.BI "Option \*qTVYPosOffset\*q \*q" integer \*q
+This option allows vertical relocation the TV output.
+The range is from -32 to 32. Not supported on the Chrontel
+7019 yet.
+.TP
+.BI "Option \*qCHTVOverscan\*q \*q" boolean \*q
+On machines with a Chrontel TV encoder, this can be used to
+force the TV mode to overscan or underscan.
+.B True
+means overscan,
+.B false
+means underscan.
+Default: BIOS setting.
+.TP
+.BI "Option \*qCHTVSuperOverscan\*q \*q" boolean \*q
+On machines with a Chrontel 7005 TV encoder, this option
+enables a super-overscan mode. This is only supported if
+the TV standard is PAL. Super overscan will produce an
+image on the TV which is larger than the viewable area.
+.PP
+.I "3. 300 series specific information"
+.PP
+DRI is supported on the 300 series only. DRI requires
+the kernel's SiS framebuffer driver (
+.B sisfb
+) and some other modules
+which come with either the kernel or XFree86.
+.PP
+Sisfb takes care of memory management for texture
+data. In order to prevent the X driver and sisfb from
+overwriting each others video memory, sisfb reserves
+an amount of video memory for the X driver. This amount
+can either be selected using sisfb's mem parameter, or
+auto-selected depending on the amount of total video RAM
+available. However, the X driver needs to know about the
+amount of RAM sisfb reserved. For this purpose, the
+.TP
+.BI "Option \*qMaxXFBMem\*q \*q" integer \*q
+.PP
+exists.
+.PP
+At the moment (2002), the SiS DRI driver is not
+maintained, lacks support for memory swapping and
+has a few bugs. If you intend to use DRI, I recommend
+setting the total video memory in the BIOS to 64MB
+in order to at least overcome the lack of memory
+swap functions.
+.PP
+Sisfb can be used for memory management only, or as
+a complete framebuffer driver. If you start sisfb
+with a valid mode (ie you gain a graphical console),
+the X driver can communicate with sisfb and doesn't
+require setting the
+.B \*qMaxXFBMem\*q
+option at all. The X driver will receive enough information
+from sisfb in this case.
+.PP
+However, if you use sisfb for memory management only, ie
+you started sisfb with mode=none and still have a text
+mode console, there is no communication between sisfb
+and the X driver. In this case, you need to set
+.B \*qMaxXFBMem\*q
+to the same value as you gave sisfb with its mem
+parameter. If you didn't specify any mem parameter,
+sisfb will reserve
+.TP
+12288KB if more than 16MB of total video RAM is available,
+.TP
+8192KB if between 12 and 16MB of video RAM is available,
+.TP
+4096KB in all other cases.
+.PP
+Then you need to specify any of these amounts as the
+parameter for the
+.B \*qMaxXFBMem\*q
+option. The value is to be given without 'KB'.
+.SH "KNOWN BUGS"
+For some reason, PAL TV output on the SiS301LV bridge is
+only black and white. NTSC is OK, though.
+.PP
+LCD panels with a resolution of 1280x1024 do not work
+correctly.
 .SH "SEE ALSO"
 XFree86(1), XF86Config(__filemansuffix__), xf86config(1), Xserver(1), X(__miscmansuffix__)
+.PP
+.B "http://www.winischhofer.net"
+for more information and updates
 .SH AUTHORS
 Authors include: Alan Hourihane, Mike Chapman, Juanjo Santamarta, Mitani
-Hiroshi, David Thomas, Sung-Ching Lin, Ademar Reis
+Hiroshi, David Thomas, Sung-Ching Lin, Ademar Reis, Thomas Winischhofer
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/sis/sis300_accel.c b/xc/programs/Xserver/hw/xfree86/drivers/sis/sis300_accel.c
index 2e0c8ae2c..8db9d49c2 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/sis/sis300_accel.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/sis/sis300_accel.c
@@ -1,14 +1,33 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/sis300_accel.c,v 1.12 2002/04/04 14:05:47 eich Exp $ */
-
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/sis300_accel.c,v 1.14 2003/01/29 15:42:16 eich Exp $ */
 /*
+ * 2D Acceleration for SiS300, SiS540, SiS630, SiS730, SiS530, SiS620
+ *
+ * Copyright Xavier Ducoin <x.ducoin@lectra.com>
+ * Copyright 2002 by Thomas Winischhofer, Vienna, Austria
+ *
+ * Permission to use, copy, modify, distribute, and sell this software and its
+ * documentation for any purpose is hereby granted without fee, provided that
+ * the above copyright notice appear in all copies and that both that
+ * copyright notice and this permission notice appear in supporting
+ * documentation, and that the name of the copyright holders not be used in
+ * advertising or publicity pertaining to distribution of the software without
+ * specific, written prior permission.  The copyright holders make no representations
+ * about the suitability of this software for any purpose.  It is provided
+ * "as is" without express or implied warranty.
  *
- *      Acceleration for SiS300 SiS630 SiS540.
- *      It is done in a separate file because the register formats are 
- *      very different from the previous chips.
+ * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+ * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+ * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+ * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
+ * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
  *
+ *      Authors:
  *
- *      
  *      Xavier Ducoin <x.ducoin@lectra.com>
+ *      Thomas Winischhofer <thomas@winischhofer.net>
+ *
  */
 #if 0
 #define DEBUG
@@ -25,11 +44,19 @@
 #include "sis.h"
 #include "sis300_accel.h"
 
-#ifdef  DEBUG
-static void MMIODump(ScrnInfoPtr pScrn);
+#ifdef SISDUALHEAD
+/* TW: This is the offset to the memory for each head */
+#define HEADOFFSET 	(pSiS->dhmOffset)
 #endif
 
-Bool SiS300AccelInit(ScreenPtr pScreen);
+#undef STSCE    	/* TW: Use/Don't use ScreenToScreenColorExpand - does not work */
+
+#undef TRAP     	/* TW: Use/Don't use Trapezoid Fills - does not work - XAA provides
+		         * illegal trapezoid data (left and right edges cross each other
+			 * sometimes) which causes drawing errors. Further, I have not found
+			 * out how to draw polygones with a height greater than 127...
+                         */
+
 static void SiSInitializeAccelerator(ScrnInfoPtr pScrn);
 static void SiSSync(ScrnInfoPtr pScrn);
 static void SiSSetupForScreenToScreenCopy(ScrnInfoPtr pScrn,
@@ -42,6 +69,11 @@ static void SiSSetupForSolidFill(ScrnInfoPtr pScrn, int color,
                                 int rop, unsigned int planemask);
 static void SiSSubsequentSolidFillRect(ScrnInfoPtr pScrn,
                                 int x, int y, int w, int h);
+#ifdef TRAP
+static void SiSSubsequentSolidFillTrap(ScrnInfoPtr pScrn, int y, int h,
+	                        int left, int dxL, int dyL, int eL,
+	                        int right, int dxR, int dyR, int eR);
+#endif
 static void SiSSetupForSolidLine(ScrnInfoPtr pScrn, int color,
                                 int rop, unsigned int planemask);
 static void SiSSubsequentSolidTwoPointLine(ScrnInfoPtr pScrn, int x1,
@@ -60,6 +92,13 @@ static void SiSSetupForMonoPatternFill(ScrnInfoPtr pScrn,
 static void SiSSubsequentMonoPatternFill(ScrnInfoPtr pScrn,
                                 int patx, int paty,
                                 int x, int y, int w, int h);
+#ifdef TRAP
+static void SiSSubsequentMonoPatternFillTrap(ScrnInfoPtr pScrn,
+                                int patx, int paty,
+                                int y, int h,
+                                int left, int dxL, int dyL, int eL,
+	                        int right, int dxR, int dyR, int eR );
+#endif
 #if 0
 static void SiSSetupForColorPatternFill(ScrnInfoPtr pScrn,
                                 int patx, int paty, int rop,
@@ -68,11 +107,15 @@ static void SiSSetupForColorPatternFill(ScrnInfoPtr pScrn,
 static void SiSSubsequentColorPatternFill(ScrnInfoPtr pScrn,
                                 int patx, int paty,
                                 int x, int y, int w, int h);
+#endif
+#if 0
 static void SiSSetupForCPUToScreenColorExpand(ScrnInfoPtr pScrn,
                                 int fg, int bg,
                                 int rop, unsigned int planemask);
 static void SiSSubsequentCPUToScreenColorExpand(ScrnInfoPtr pScrn,
                                 int x, int y, int w, int h, int skipleft);
+#endif
+#ifdef STSCE
 static void SiSSetupForScreenToScreenColorExpand(ScrnInfoPtr pScrn,
                                 int fg, int bg,
                                 int rop, unsigned int planemask);
@@ -80,20 +123,18 @@ static void SiSSubsequentScreenToScreenColorExpand(ScrnInfoPtr pScrn,
                                 int x, int y, int w, int h,
                                 int srcx, int srcy, int skipleft);
 #endif
-static void SiSSetupForScanlineCPUToScreenColorExpandFill(ScrnInfoPtr pScrn, 
-                                int fg, int bg, int rop, 
+static void SiSSetupForScanlineCPUToScreenColorExpandFill(ScrnInfoPtr pScrn,
+                                int fg, int bg, int rop,
                                 unsigned int planemask);
 static void SiSSubsequentScanlineCPUToScreenColorExpandFill(ScrnInfoPtr pScrn,
-                                int x, int y, int w, int h, 
+                                int x, int y, int w, int h,
                                 int skipleft);
 static void SiSSubsequentColorExpandScanline(ScrnInfoPtr pScrn, int bufno);
-#if 0
-static void SiSSetupForImageWrite(ScrnInfoPtr pScrn, int rop, 
-                                unsigned int planemask, int trans_color, 
-                                int bpp, int depth);
-static void SiSSubsequentImageWriteRect(ScrnInfoPtr pScrn, int x, int y, 
-                                int w, int h, int skipleft);
+
+#ifdef SISDUALHEAD
+static void SiSRestoreAccelState(ScrnInfoPtr pScrn);
 #endif
+
 static void
 SiSInitializeAccelerator(ScrnInfoPtr pScrn)
 {
@@ -116,71 +157,74 @@ SiS300AccelInit(ScreenPtr pScreen)
 	int             i;
 
 	pSiS->AccelInfoPtr = infoPtr = XAACreateInfoRec();
-	if (!infoPtr)  
-		return FALSE;
+	if (!infoPtr)  return FALSE;
 
 	SiSInitializeAccelerator(pScrn);
 
 	infoPtr->Flags = LINEAR_FRAMEBUFFER |
-			   		 OFFSCREEN_PIXMAPS |
-					 PIXMAP_CACHE;
+			 OFFSCREEN_PIXMAPS |
+			 PIXMAP_CACHE;
 
 	/* sync */
 	infoPtr->Sync = SiSSync;
 
-	if ((pScrn->bitsPerPixel != 8) && (pScrn->bitsPerPixel != 16) &&
-		(pScrn->bitsPerPixel != 32))         return FALSE;
+	/* Acceleration only supported at 8, 16 and 32 bpp */
+	if((pScrn->bitsPerPixel != 8) && (pScrn->bitsPerPixel != 16) &&
+	         (pScrn->bitsPerPixel != 32))
+	    return FALSE;
 
-	/* BitBlt */
+	/* screen to screen copy - TW: We now support transparent copies */
 	infoPtr->SetupForScreenToScreenCopy = SiSSetupForScreenToScreenCopy;
 	infoPtr->SubsequentScreenToScreenCopy = SiSSubsequentScreenToScreenCopy;
-	infoPtr->ScreenToScreenCopyFlags = NO_PLANEMASK | NO_TRANSPARENCY;
+	infoPtr->ScreenToScreenCopyFlags = NO_PLANEMASK |
+	                                   TRANSPARENCY_GXCOPY_ONLY;
 
 	/* solid fills */
 	infoPtr->SetupForSolidFill = SiSSetupForSolidFill;
 	infoPtr->SubsequentSolidFillRect = SiSSubsequentSolidFillRect;
+#ifdef TRAP
+	infoPtr->SubsequentSolidFillTrap = SiSSubsequentSolidFillTrap;
+#endif
 	infoPtr->SolidFillFlags = NO_PLANEMASK;
 
 	/* solid line */
 	infoPtr->SetupForSolidLine = SiSSetupForSolidLine;
 	infoPtr->SubsequentSolidTwoPointLine = SiSSubsequentSolidTwoPointLine;
 	infoPtr->SubsequentSolidHorVertLine = SiSSubsequentSolidHorzVertLine;
-	infoPtr->SolidFillFlags = NO_PLANEMASK;
+	infoPtr->SolidLineFlags = NO_PLANEMASK;
 
 	/* dashed line */
 	infoPtr->SetupForDashedLine = SiSSetupForDashedLine;
 	infoPtr->SubsequentDashedTwoPointLine = SiSSubsequentDashedTwoPointLine;
 	infoPtr->DashPatternMaxLength = 64;
-	infoPtr->DashedLineFlags = NO_PLANEMASK | 
-					LINE_PATTERN_MSBFIRST_LSBJUSTIFIED;
+	infoPtr->DashedLineFlags = NO_PLANEMASK |
+				   LINE_PATTERN_MSBFIRST_LSBJUSTIFIED;
 
 	/* 8x8 mono pattern fill */
 	infoPtr->SetupForMono8x8PatternFill = SiSSetupForMonoPatternFill;
-	infoPtr->SubsequentMono8x8PatternFillRect =
-							SiSSubsequentMonoPatternFill;
+	infoPtr->SubsequentMono8x8PatternFillRect = SiSSubsequentMonoPatternFill;
+#ifdef TRAP
+	infoPtr->SubsequentMono8x8PatternFillTrap = SiSSubsequentMonoPatternFillTrap;
+#endif
 	infoPtr->Mono8x8PatternFillFlags = NO_PLANEMASK |
-							HARDWARE_PATTERN_SCREEN_ORIGIN |
-							HARDWARE_PATTERN_PROGRAMMED_BITS |
-							NO_TRANSPARENCY |
-							BIT_ORDER_IN_BYTE_MSBFIRST ;
-
-#if 0
-	/* 8x8 color pattern fill ---seems not useful by xaa */
-	infoPtr->SetupForColor8x8PatternFill =
-	    SiSSetupForColorPatternFill;
-	infoPtr->SubsequentColor8x8PatternFillRect =
-	    SiSSubsequentColorPatternFill;
-	infoPtr->Color8x8PatternFillFlags = NO_PLANEMASK |
-	    HARDWARE_PATTERN_SCREEN_ORIGIN |
-	    HARDWARE_PATTERN_PROGRAMMED_BITS ;
+					   HARDWARE_PATTERN_SCREEN_ORIGIN |
+					   HARDWARE_PATTERN_PROGRAMMED_BITS |
+					   NO_TRANSPARENCY |
+					   BIT_ORDER_IN_BYTE_MSBFIRST ;
 
+#ifdef STSCE
 	/* Screen To Screen Color Expand */
+	/* TW: The hardware does support this the way we need it */
 	infoPtr->SetupForScreenToScreenColorExpandFill =
-	    SiSSetupForScreenToScreenColorExpand;
+	    			SiSSetupForScreenToScreenColorExpand;
 	infoPtr->SubsequentScreenToScreenColorExpandFill =
-	    SiSSubsequentScreenToScreenColorExpand;
-	
-	/* CPU To Screen Color Expand ---implement another instead of this one! */
+	    			SiSSubsequentScreenToScreenColorExpand;
+	infoPtr->ScreenToScreenColorExpandFillFlags = NO_PLANEMASK |
+	                                              BIT_ORDER_IN_BYTE_MSBFIRST ;
+#endif
+
+#if 0
+	/* CPU To Screen Color Expand --- implement another instead of this one! */
 	infoPtr->SetupForCPUToScreenColorExpandFill =
 	    SiSSetupForCPUToScreenColorExpand;
 	infoPtr->SubsequentCPUToScreenColorExpandFill =
@@ -195,62 +239,55 @@ SiS300AccelInit(ScreenPtr pScreen)
 	    HARDWARE_PATTERN_PROGRAMMED_BITS ;
 #endif
 
-	/* per-scanline color expansion*/
-	pSiS->ColorExpandBufferNumber = 16;     
-	pSiS->ColorExpandBufferCountMask = 0x0F;
-	pSiS->PerColorExpandBufferSize = ((pScrn->virtualX + 31)/32) * 4;       
+	/* per-scanline color expansion (using indirect method) */
+	if(pSiS->VGAEngine == SIS_530_VGA) {
+	   pSiS->ColorExpandBufferNumber = 4;
+	   pSiS->ColorExpandBufferCountMask = 0x03;
+	} else {
+	   pSiS->ColorExpandBufferNumber = 16;
+	   pSiS->ColorExpandBufferCountMask = 0x0F;
+	}
+	pSiS->PerColorExpandBufferSize = ((pScrn->virtualX + 31)/32) * 4;
 	infoPtr->NumScanlineColorExpandBuffers = pSiS->ColorExpandBufferNumber;
 	infoPtr->ScanlineColorExpandBuffers = (unsigned char **)&pSiS->ColorExpandBufferAddr[0];
-	infoPtr->SetupForScanlineCPUToScreenColorExpandFill = SiSSetupForScanlineCPUToScreenColorExpandFill;
-	infoPtr->SubsequentScanlineCPUToScreenColorExpandFill = SiSSubsequentScanlineCPUToScreenColorExpandFill;
-	infoPtr->SubsequentColorExpandScanline = SiSSubsequentColorExpandScanline;
+
+	infoPtr->SetupForScanlineCPUToScreenColorExpandFill =
+	                            SiSSetupForScanlineCPUToScreenColorExpandFill;
+	infoPtr->SubsequentScanlineCPUToScreenColorExpandFill =
+	                            SiSSubsequentScanlineCPUToScreenColorExpandFill;
+	infoPtr->SubsequentColorExpandScanline =
+	                            SiSSubsequentColorExpandScanline;
 	infoPtr->ScanlineCPUToScreenColorExpandFillFlags =
 	    NO_PLANEMASK |
 	    CPU_TRANSFER_PAD_DWORD |
 	    SCANLINE_PAD_DWORD |
 	    BIT_ORDER_IN_BYTE_MSBFIRST |
 	    LEFT_EDGE_CLIPPING;
-	
-#if 0
-	divider = ((pScrn->virtualX*pScrn->bitsPerPixel)/8)+8;
-	pSiS->ImageWriteBufferSize = (((12*1024)+divider-1)/divider)*divider;
-	infoPtr->SetupForImageWrite = SiSSetupForImageWrite;
-	infoPtr->SubsequentImageWriteRect = SiSSubsequentImageWriteRect;
-	infoPtr->ImageWriteFlags = CPU_TRANSFER_PAD_DWORD |
-	    SCANLINE_PAD_DWORD |
-	    LEFT_EDGE_CLIPPING |    
-	    NO_PLANEMASK|
-	    NO_TRANSPARENCY |
-	    NO_GXCOPY |
-	    SYNC_AFTER_IMAGE_WRITE;
+
+#ifdef SISDUALHEAD
+	if (pSiS->DualHeadMode) {
+		infoPtr->RestoreAccelState = SiSRestoreAccelState;
+	}
 #endif
 
 	/* init Frame Buffer Manager */
-
-        /* TW: check if maxxfbmem must contain TurboQueue and HWCursor */
 	topFB = pSiS->maxxfbmem;
-	if ((topFB)
-	    >= (pSiS->FbMapSize)
-	    - ((pSiS->TurboQueue) ? (1024*512) : 0)
-	       - ((pSiS->HWCursor) ? 4096 : 0))  {
-	    topFB = pSiS->FbMapSize;
-	    /* TurboQueue len is always 512k */
-	    if (pSiS->TurboQueue) topFB -= 1024*512;  
-            /* HWCursor len is always 4096 */
-	    if (pSiS->HWCursor)  topFB -= 4096;
-	}
-	reservedFbSize = (pSiS->ColorExpandBufferNumber
-			   * pSiS->PerColorExpandBufferSize);
-        /* TW: New for MaxXFBmem Option */
-	UsableFbSize = topFB - reservedFbSize; 
-	/* Layout:
-	 * |--------------++++++++++++++++++++^******==========~~~~~~~~~~~~|
-	 *   UsableFbSize  ColorExpandBuffers | Heap  HWCursor  TurboQueue
-	 *                                 topFB
+
+	reservedFbSize = pSiS->ColorExpandBufferNumber * pSiS->PerColorExpandBufferSize;
+
+	UsableFbSize = topFB - reservedFbSize;
+
+	/* Layout: (Sizes do not reflect correct proportions)
+	 * |--------------++++++++++++++++++++^************==========~~~~~~~~~~~~|
+	 *   UsableFbSize  ColorExpandBuffers | DRI-Heap  |  HWCursor  TurboQueue   300/310/325 series
+	 * |--------------++++++++++++++++++++|  ====================~~~~~~~~~~~~|
+	 *   UsableFbSize  ColorExpandBuffers |        TurboQueue     HWCursor      530/620
+	 *                                  topFB
 	 */
+
 	AvailBufBase = pSiS->FbBase + UsableFbSize;
 	for (i = 0; i < pSiS->ColorExpandBufferNumber; i++) {
-		pSiS->ColorExpandBufferAddr[i] = AvailBufBase + 
+		pSiS->ColorExpandBufferAddr[i] = AvailBufBase +
 		    i * pSiS->PerColorExpandBufferSize;
 		pSiS->ColorExpandBufferScreenOffset[i] = UsableFbSize +
 		    i * pSiS->PerColorExpandBufferSize;
@@ -258,17 +295,30 @@ SiS300AccelInit(ScreenPtr pScreen)
 	Avail.x1 = 0;
 	Avail.y1 = 0;
 	Avail.x2 = pScrn->displayWidth;
-	Avail.y2 = UsableFbSize
-	    / (pScrn->displayWidth * pScrn->bitsPerPixel/8) - 1;
-	if (Avail.y2 < 0)
-		Avail.y2 = 32767;
-	
+	Avail.y2 = (UsableFbSize / (pScrn->displayWidth * pScrn->bitsPerPixel/8)) - 1;
+
+	if(Avail.y2 < 0)  Avail.y2 = 32767;
+
+	if(Avail.y2 < pScrn->currentMode->VDisplay) {
+		xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+			"Not enough video RAM for accelerator. At least "
+			"%dKB needed, %dKB available\n",
+			((((pScrn->displayWidth * pScrn->bitsPerPixel/8)   /* TW: +8 for make it sure */
+			     * pScrn->currentMode->VDisplay) + reservedFbSize) / 1024) + 8,
+			pSiS->maxxfbmem/1024);
+		pSiS->NoAccel = TRUE;
+		pSiS->NoXvideo = TRUE;
+		XAADestroyInfoRec(pSiS->AccelInfoPtr);
+		pSiS->AccelInfoPtr = NULL;
+		return FALSE;
+	}
+
 	xf86DrvMsg(pScrn->scrnIndex, X_INFO,
 		   "Frame Buffer From (%d,%d) To (%d,%d)\n",
 		   Avail.x1, Avail.y1, Avail.x2, Avail.y2);
-	
+
 	xf86InitFBManager(pScreen, &Avail);
-	
+
 	return(XAAInit(pScreen, infoPtr));
 }
 
@@ -284,7 +334,26 @@ SiSSync(ScrnInfoPtr pScrn)
 	SiSIdle
 }
 
-static int sisALUConv[] =
+#ifdef SISDUALHEAD
+static void
+SiSRestoreAccelState(ScrnInfoPtr pScrn)
+{
+	SISPtr pSiS = SISPTR(pScrn);
+
+	/* TW: We don't need to do anything special here; forcing the
+	 *     other head to re-read the CmdQueLen is not necessary:
+	 *     After the Sync in RestoreAccelState(), the real queue
+	 *     length is always larger than (or at least equal to)
+	 *     the amount stored in CmdQueueLen of the other head,
+	 *     so the only thing that might happen is one unnecessary
+	 *     Sync on the other head. I think we can live with that.
+	 */
+	pSiS->DoColorExpand = FALSE;
+	SiSIdle
+}
+#endif
+
+static const int sisALUConv[] =
 {
     0x00,       /* dest = 0;            0,      GXclear,        0 */
     0x88,       /* dest &= src;         DSa,    GXand,          0x1 */
@@ -304,7 +373,7 @@ static int sisALUConv[] =
     0xFF,       /* dest = 0xFF;         1,      GXset,          0xF */
 };
 /* same ROP but with Pattern as Source */
-static int sisPatALUConv[] =
+static const int sisPatALUConv[] =
 {
     0x00,       /* dest = 0;            0,      GXclear,        0 */
     0xA0,       /* dest &= src;         DPa,    GXand,          0x1 */
@@ -329,58 +398,25 @@ static void SiSSetupForScreenToScreenCopy(ScrnInfoPtr pScrn,
                                 unsigned int planemask, int trans_color)
 {
 	SISPtr  pSiS = SISPTR(pScrn);
-/*      XAAInfoRecPtr   pXAA = XAAPTR(pScrn);*/
 
 	PDEBUG(ErrorF("Setup ScreenCopy(%d, %d, 0x%x, 0x%x, 0x%x)\n",
 					xdir, ydir, rop, planemask, trans_color));
-/*
-	ErrorF("XAAInfoPtr->UsingPixmapCache = %s\n"
-			"XAAInfoPtr->CanDoMono8x8 = %s\n"
-			"XAAInfoPtr->CanDoColor8x8 = %s\n"
-			"XAAInfoPtr->CachePixelGranularity = %d\n"
-			"XAAInfoPtr->MaxCacheableTileWidth = %d\n"
-			"XAAInfoPtr->MaxCacheableTileHeight = %d\n"
-			"XAAInfoPtr->MaxCacheableStippleWidth = %d\n"
-			"XAAInfoPtr->MaxCacheableStippleHeight = %d\n"
-			"XAAInfoPtr->MonoPatternPitch = %d\n"
-			"XAAInfoPtr->CacheWidthMono8x8Pattern = %d\n"
-			"XAAInfoPtr->CacheHeightMono8x8Pattern = %d\n"
-			"XAAInfoPtr->ColorPatternPitch = %d\n"
-			"XAAInfoPtr->CacheWidthColor8x8Pattern = %d\n"
-			"XAAInfoPtr->CacheHeightColor8x8Pattern = %d\n"
-			"XAAInfoPtr->CacheColorExpandDensity = %d\n"
-			"XAAInfoPtr->maxOffPixWidth = %d\n"
-			"XAAInfoPtr->maxOffPixHeight= %d\n"
-			"XAAInfoPtr->NeedToSync = %s\n"
-			"\n",
-					pXAA->UsingPixmapCache ? "True" : "False",
-					pXAA->CanDoMono8x8 ? "True" : "False",
-					pXAA->CanDoColor8x8 ? "True" : "False",
-					pXAA->CachePixelGranularity,
-					pXAA->MaxCacheableTileWidth,
-					pXAA->MaxCacheableTileHeight,
-					pXAA->MaxCacheableStippleWidth,
-					pXAA->MaxCacheableStippleHeight,
-					pXAA->MonoPatternPitch,
-					pXAA->CacheWidthMono8x8Pattern,
-					pXAA->CacheHeightMono8x8Pattern,
-					pXAA->ColorPatternPitch,
-					pXAA->CacheWidthColor8x8Pattern,
-					pXAA->CacheHeightColor8x8Pattern,
-					pXAA->CacheColorExpandDensity,
-					pXAA->maxOffPixWidth,
-					pXAA->maxOffPixHeight,
-					pXAA->NeedToSync ? "True" : "False");
-*/
-					
-	SiSSetupDSTColorDepth(SISPTR(pScrn)->DstColor);
+
+	SiSSetupDSTColorDepth(pSiS->DstColor);
 	SiSSetupSRCPitch(pSiS->scrnOffset)
 	SiSSetupDSTRect(pSiS->scrnOffset, -1)
-	SiSSetupROP(sisALUConv[rop])
-	if (xdir > 0) {
+
+	if(trans_color != -1) {
+		SiSSetupROP(0x0A)
+		SiSSetupSRCTrans(trans_color)
+		SiSSetupCMDFlag(TRANSPARENT_BITBLT)
+	} else {
+	        SiSSetupROP(sisALUConv[rop])
+	}
+	if(xdir > 0) {
 		SiSSetupCMDFlag(X_INC)
 	}
-	if (ydir > 0) {
+	if(ydir > 0) {
 		SiSSetupCMDFlag(Y_INC)
 	}
 }
@@ -396,27 +432,35 @@ static void SiSSubsequentScreenToScreenCopy(ScrnInfoPtr pScrn,
 					src_x, src_y, dst_x, dst_y, width, height));
 
 	srcbase = dstbase = 0;
-	if (src_y >= 2048) { 
+	if(src_y >= 2048) {
 		srcbase = pSiS->scrnOffset * src_y;
 		src_y = 0;
-	}       
-	if (dst_y >= pScrn->virtualY) {
-		dstbase = pSiS->scrnOffset*dst_y;
+	}
+	if( (dst_y >= pScrn->virtualY) || (dst_y >= 2048) ) {
+		dstbase = pSiS->scrnOffset * dst_y;
 		dst_y = 0;
-	}       
+	}
+#ifdef SISDUALHEAD
+	if(pSiS->VGAEngine != SIS_530_VGA) {
+	   	srcbase += HEADOFFSET;
+	   	dstbase += HEADOFFSET;
+	}
+#endif
 	SiSSetupSRCBase(srcbase);
 	SiSSetupDSTBase(dstbase);
-	if (!(pSiS->CommandReg & X_INC))  {
+
+	if(!(pSiS->CommandReg & X_INC))  {
 		src_x += width-1;
 		dst_x += width-1;
 	}
-	if (!(pSiS->CommandReg & Y_INC))  {
+	if(!(pSiS->CommandReg & Y_INC))  {
 		src_y += height-1;
 		dst_y += height-1;
 	}
 	SiSSetupRect(width, height)
 	SiSSetupSRCXY(src_x, src_y)
 	SiSSetupDSTXY(dst_x, dst_y)
+
 	SiSDoCMD
 }
 
@@ -430,11 +474,10 @@ SiSSetupForSolidFill(ScrnInfoPtr pScrn,
 					color, rop, planemask));
 
 	SiSSetupPATFG(color)
-/*      SiSSetupDSTRect(pSiS->scrnOffset, pScrn->virtualY)*/
 	SiSSetupDSTRect(pSiS->scrnOffset, -1)
-	SiSSetupDSTColorDepth(SISPTR(pScrn)->DstColor);
+	SiSSetupDSTColorDepth(pSiS->DstColor);
 	SiSSetupROP(sisPatALUConv[rop])
-	SiSSetupCMDFlag(X_INC | Y_INC | PATFG | BITBLT)
+	/* SiSSetupCMDFlag(PATFG) - is zero */
 }
 
 static void
@@ -447,15 +490,136 @@ SiSSubsequentSolidFillRect(ScrnInfoPtr pScrn,
 	PDEBUG(ErrorF("Subsequent SolidFillRect(%d, %d, %d, %d)\n",
 					x, y, w, h));
 	dstbase = 0;
-	if (y >= 2048) { 
-		dstbase=pSiS->scrnOffset*y;
+
+	if (y >= 2048) {
+		dstbase = pSiS->scrnOffset * y;
 		y = 0;
 	}
+#ifdef SISDUALHEAD
+        if(pSiS->VGAEngine != SIS_530_VGA) {
+	   	dstbase += HEADOFFSET;
+        }
+#endif
 	SiSSetupDSTBase(dstbase)
 	SiSSetupDSTXY(x,y)
 	SiSSetupRect(w,h)
+	/* Clear commandReg because Setup can be used for Rect and Trap */
+	pSiS->CommandReg &= ~(T_XISMAJORL | T_XISMAJORR |
+	                      T_L_X_INC | T_L_Y_INC |
+	                      T_R_X_INC | T_R_Y_INC |
+			      TRAPAZOID_FILL);
+	SiSSetupCMDFlag(X_INC | Y_INC | BITBLT)
+
+	SiSDoCMD
+}
+
+/* TW: Trapezoid */
+/* This would work better if XAA would provide us with valid trapezoids.
+ * In fact, with small trapezoids the left and the right edge often cross
+ * each other or result in a line length of 0 which causes drawing errors
+ * (filling over whole scanline).
+ * Furthermore, I have not found out how to draw trapezoids with a height
+ * greater than 127.
+ */
+#ifdef TRAP
+static void
+SiSSubsequentSolidFillTrap(ScrnInfoPtr pScrn, int y, int h,
+	       int left,  int dxL, int dyL, int eL,
+	       int right, int dxR, int dyR, int eR )
+{
+	SISPtr  pSiS = SISPTR(pScrn);
+	long dstbase;
+#if 0
+	float kL, kR;
+#endif
+
+	dstbase = 0;
+	if (y >= 2048) {
+		dstbase=pSiS->scrnOffset*y;
+		y = 0;
+	}
+#ifdef SISDUALHEAD
+	if(pSiS->VGAEngine != SIS_530_VGA) {
+	   	dstbase += HEADOFFSET;
+	}
+#endif
+	SiSSetupDSTBase(dstbase)
+	/* SiSSetupRect(w,h) */
+
+#if 1
+	SiSSetupPATFG(0xff0000) /* FOR TESTING */
+#endif
+
+	/* Clear CommandReg because SetUp can be used for Rect and Trap */
+	pSiS->CommandReg &= ~(T_L_X_INC | T_L_Y_INC |
+	                      T_R_X_INC | T_R_Y_INC |
+	                      T_XISMAJORL | T_XISMAJORR |
+			      BITBLT);
+
+        xf86DrvMsg(0, X_INFO, "Trap (%d %d %d %d) dxL %d dyL %d eL %d   dxR %d dyR %d eR %d\n",
+		left, right, y, h, dxL, dyL, eL, dxR, dyR, eR);
+
+	/* Unfortunately, we must check if the right and the left edge
+	 * cross each other...  INCOMPLETE (line equation wrong)
+	 */
+#if 0
+	if (dxL == 0) kL = 0;
+	else kL = (float)dyL / (float)dxL;
+	if (dxR == 0) kR = 0;
+	else kR = (float)dyR / (float)dxR;
+	xf86DrvMsg(0, X_INFO, "kL %f kR %f!\n", kL, kR);
+	if ( (kR != kL) &&
+	     (!(kR == 0 && kL == 0)) &&
+	     (!(kR <  0 && kL >  0)) ) {
+	   xf86DrvMsg(0, X_INFO, "Inside if (%f - %d)\n", ( kL * ( ( ((float)right - (float)left) / (kL - kR) ) - left) + y), h+y);
+           if ( ( ( kL * ( ( ((float)right - (float)left) / (kL - kR) ) - (float)left) + (float)y) < (h + y) ) ) {
+	     xf86DrvMsg(0, X_INFO, "Cross detected!\n");
+	   }
+	}
+#endif
+
+	/* Determine egde angles */
+	if (dxL < 0) { dxL = -dxL; }
+	else { SiSSetupCMDFlag(T_L_X_INC) }
+	if (dxR < 0) { dxR = -dxR; }
+	else { SiSSetupCMDFlag(T_R_X_INC) }
+
+	/* (Y direction always positive - do this anyway) */
+	if (dyL < 0) { dyL = -dyL; }
+	else { SiSSetupCMDFlag(T_L_Y_INC) }
+	if (dyR < 0) { dyR = -dyR; }
+	else { SiSSetupCMDFlag(T_R_Y_INC) }
+
+	/* Determine major axis */
+	if (dxL >= dyL) {      /* X is major axis */
+		SiSSetupCMDFlag(T_XISMAJORL)
+	}
+	if (dxR >= dyR) {      /* X is major axis */
+		SiSSetupCMDFlag(T_XISMAJORR)
+	}
+
+	/* Set up deltas */
+	SiSSetupdL(dxL, dyL)
+	SiSSetupdR(dxR, dyR)
+
+#if 0   /* Could it be that this crappy engine can only draw trapezoids up to 127 pixels high? */
+	h &= 0x7F;
+	if (h == 0) h = 10;
+#endif
+
+	/* Set up y, h, left, right */
+	SiSSetupYH(y,h)
+	SiSSetupLR(left,right)
+
+	/* Set up initial error term */
+	SiSSetupEL(eL)
+	SiSSetupER(eR)
+
+	SiSSetupCMDFlag(TRAPAZOID_FILL);
+
 	SiSDoCMD
 }
+#endif
 
 static void
 SiSSetupForSolidLine(ScrnInfoPtr pScrn,
@@ -468,9 +632,8 @@ SiSSetupForSolidLine(ScrnInfoPtr pScrn,
 
 	SiSSetupLineCount(1)
 	SiSSetupPATFG(color)
-/*      SiSSetupDSTRect(pSiS->scrnOffset, pScrn->virtualY)*/
 	SiSSetupDSTRect(pSiS->scrnOffset, -1)
-	SiSSetupDSTColorDepth(SISPTR(pScrn)->DstColor);
+	SiSSetupDSTColorDepth(pSiS->DstColor);
 	SiSSetupROP(sisPatALUConv[rop])
 	SiSSetupCMDFlag(PATFG | LINE)
 }
@@ -488,17 +651,26 @@ SiSSubsequentSolidTwoPointLine(ScrnInfoPtr pScrn,
 	dstbase = 0;
 	miny = (y1 > y2) ? y2 : y1;
 	maxy = (y1 > y2) ? y1 : y2;
-	if (maxy >= 2048) {
-		dstbase = pSiS->scrnOffset*miny;
+	if(maxy >= 2048) {
+		dstbase = pSiS->scrnOffset * miny;
 		y1 -= miny;
 		y2 -= miny;
 	}
+#ifdef SISDUALHEAD
+	if(pSiS->VGAEngine != SIS_530_VGA) {
+	   dstbase += HEADOFFSET;
+	}
+#endif
 	SiSSetupDSTBase(dstbase)
 
 	SiSSetupX0Y0(x1,y1)
 	SiSSetupX1Y1(x2,y2)
-	if (flags & OMIT_LAST)
+	if (flags & OMIT_LAST) {
 		SiSSetupCMDFlag(NO_LAST_PIXEL)
+	} else {
+		pSiS->CommandReg &= ~(NO_LAST_PIXEL);
+	}
+
 	SiSDoCMD
 }
 
@@ -512,20 +684,26 @@ SiSSubsequentSolidHorzVertLine(ScrnInfoPtr pScrn,
 	PDEBUG(ErrorF("Subsequent SolidHorzVertLine(%d, %d, %d, %d)\n",
 					x, y, len, dir));
 	len--; /* starting point is included! */
+
 	dstbase = 0;
-	if ((y >= 2048) || ((y + len) >= 2048)) { 
+	if((y >= 2048) || ((y + len) >= 2048)) {
 		dstbase = pSiS->scrnOffset * y;
 		y = 0;
 	}
+#ifdef SISDUALHEAD
+	if(pSiS->VGAEngine != SIS_530_VGA) {
+	   	dstbase += HEADOFFSET;
+	}
+#endif
 	SiSSetupDSTBase(dstbase)
 
 	SiSSetupX0Y0(x,y)
 	if (dir == DEGREES_0) {
 		SiSSetupX1Y1(x + len, y);
-	}
-	else {
+	} else {
 		SiSSetupX1Y1(x, y + len);
 	}
+
 	SiSDoCMD
 }
 
@@ -540,15 +718,19 @@ SiSSetupForDashedLine(ScrnInfoPtr pScrn,
 			fg, bg, rop, planemask, length, *(pattern+4), *pattern));
 
 	SiSSetupLineCount(1)
-/*      SiSSetupDSTRect(pSiS->scrnOffset, pScrn->virtualY)*/
 	SiSSetupDSTRect(pSiS->scrnOffset, -1)
-	SiSSetupDSTColorDepth(SISPTR(pScrn)->DstColor);
+	SiSSetupDSTColorDepth(pSiS->DstColor);
 	SiSSetupStyleLow(*pattern)
 	SiSSetupStyleHigh(*(pattern+4))
+	SiSSetupStylePeriod(length-1);			/* TW: This was missing!!! */
 	SiSSetupROP(sisPatALUConv[rop])
 	SiSSetupPATFG(fg)
-	if (bg != -1) 
+	SiSSetupCMDFlag(LINE | LINE_STYLE)  		/* TW: This was missing!!! */
+	if(bg != -1) {
 		SiSSetupPATBG(bg)
+	} else {
+	        SiSSetupCMDFlag(TRANSPARENT); 		/* TW: This was missing!!! */
+	}
 }
 
 static void
@@ -563,20 +745,28 @@ SiSSubsequentDashedTwoPointLine(ScrnInfoPtr pScrn,
 			x1, y1, x2, y2, flags, phase));
 
 	dstbase = 0;
-	miny=(y1 > y2) ? y2 : y1;
-	maxy=(y1 > y2) ? y1 : y2;
-	if (maxy >= 2048) {
+	miny = (y1 > y2) ? y2 : y1;
+	maxy = (y1 > y2) ? y1 : y2;
+	if(maxy >= 2048) {
 		dstbase = pSiS->scrnOffset * miny;
 		y1 -= miny;
 		y2 -= miny;
 	}
+#ifdef SISDUALHEAD
+	if(pSiS->VGAEngine != SIS_530_VGA) {
+	   dstbase += HEADOFFSET;
+	}
+#endif
 	SiSSetupDSTBase(dstbase)
 
 	SiSSetupX0Y0(x1,y1)
 	SiSSetupX1Y1(x2,y2)
-	if (flags & OMIT_LAST) {
+	if(flags & OMIT_LAST) {
 		SiSSetupCMDFlag(NO_LAST_PIXEL)
+	} else {
+		pSiS->CommandReg &= ~(NO_LAST_PIXEL);
 	}
+
 	SiSDoCMD
 }
 
@@ -589,13 +779,12 @@ SiSSetupForMonoPatternFill(ScrnInfoPtr pScrn,
 
 	PDEBUG(ErrorF("Setup MonoPatFill(0x%x,0x%x, 0x%x,0x%x, 0x%x, 0x%x)\n",
 					patx, paty, fg, bg, rop, planemask));
-
 	SiSSetupDSTRect(pSiS->scrnOffset, -1)
-	SiSSetupDSTColorDepth(SISPTR(pScrn)->DstColor);
+	SiSSetupDSTColorDepth(pSiS->DstColor);
 	SiSSetupMONOPAT(patx,paty)
 	SiSSetupPATFG(fg)
 	SiSSetupROP(sisPatALUConv[rop])
-	SiSSetupCMDFlag(PATMONO | X_INC | Y_INC)
+	SiSSetupCMDFlag(PATMONO)
 	SiSSetupPATBG(bg)
 }
 
@@ -610,18 +799,103 @@ SiSSubsequentMonoPatternFill(ScrnInfoPtr pScrn,
 	PDEBUG(ErrorF("Subsequent MonoPatFill(0x%x,0x%x, %d,%d, %d,%d)\n",
 							patx, paty, x, y, w, h));
 	dstbase = 0;
-	if (y >= 2048) { 
+
+	if (y >= 2048) {
 		dstbase = pSiS->scrnOffset * y;
 		y = 0;
 	}
+#ifdef SISDUALHEAD
+	if(pSiS->VGAEngine != SIS_530_VGA) {
+	   dstbase += HEADOFFSET;
+	}
+#endif
+	SiSSetupDSTBase(dstbase)
+	SiSSetupDSTXY(x, y)
+	SiSSetupRect(w, h)
+	/* Clear commandReg because Setup can be used for Rect and Trap */
+	pSiS->CommandReg &= ~(T_XISMAJORL | T_XISMAJORR |
+	                      T_L_X_INC | T_L_Y_INC |
+	                      T_R_X_INC | T_R_Y_INC |
+	                      TRAPAZOID_FILL);
+	SiSSetupCMDFlag(X_INC | Y_INC)
+
+	SiSDoCMD
+}
 
+/* Trapezoid */
+#ifdef TRAP
+static void
+SiSSubsequentMonoPatternFillTrap(ScrnInfoPtr pScrn,
+               int patx, int paty,
+               int y, int h,
+	       int left, int dxL, int dyL, int eL,
+	       int right, int dxR, int dyR, int eR )
+{
+	SISPtr  pSiS = SISPTR(pScrn);
+	long dstbase;
+
+	PDEBUG(ErrorF("Subsequent Mono8x8PatternFillTrap(%d, %d, %d - %d %d/%d %d/%d)\n",
+					y, h, left, right, dxL, dxR, eL, eR));
+
+	dstbase = 0;
+	if (y >= 2048) {
+		dstbase=pSiS->scrnOffset*y;
+		y = 0;
+	}
+#ifdef SISDUALHEAD
+	if(pSiS->VGAEngine != SIS_530_VGA) {
+	   dstbase += HEADOFFSET;
+	}
+#endif
 	SiSSetupDSTBase(dstbase)
-	SiSSetupDSTXY(x,y)
-	SiSSetupRect(w,h)
+
+	/* Clear CommandReg because SetUp can be used for Rect and Trap */
+	pSiS->CommandReg &= ~(T_XISMAJORL | T_XISMAJORR |
+	                      T_L_X_INC | T_L_Y_INC |
+			      T_R_X_INC | T_R_Y_INC |
+			      BITBLT);
+
+	if (dxL < 0) { dxL = -dxL;  }
+	else { SiSSetupCMDFlag(T_L_X_INC) }
+	if (dxR < 0) { dxR = -dxR; }
+	else { SiSSetupCMDFlag(T_R_X_INC) }
+
+	if (dyL < 0) { dyL = -dyL; }
+	else { SiSSetupCMDFlag(T_L_Y_INC) }
+	if (dyR < 0) { dyR = -dyR; }
+	else { SiSSetupCMDFlag(T_R_Y_INC) }
+
+	/* Determine major axis */
+	if (dxL >= dyL) {      /* X is major axis */
+		SiSSetupCMDFlag(T_XISMAJORL)
+	}
+	if (dxR >= dyR) {      /* X is major axis */
+		SiSSetupCMDFlag(T_XISMAJORR)
+	}
+
+	SiSSetupYH(y,h)
+	SiSSetupLR(left,right)
+
+	SiSSetupdL(dxL, dyL)
+	SiSSetupdR(dxR, dyR)
+
+	SiSSetupEL(eL)
+	SiSSetupER(eR)
+
+	SiSSetupCMDFlag(TRAPAZOID_FILL);
+
 	SiSDoCMD
 }
+#endif
+
 
 #if 0
+
+/* TW: The following (already commented) functions have NOT been adapted for dual-head mode */
+
+
+/* ------- Color Pattern Fill --- is not useful for XAA -------------- */
+
 static void
 SiSSetupForColorPatternFill(ScrnInfoPtr pScrn,
                                 int patx, int paty, int rop,
@@ -635,7 +909,7 @@ SiSSetupForColorPatternFill(ScrnInfoPtr pScrn,
 
 /*      SiSSetupDSTRect(pSiS->scrnOffset, pScrn->virtualY)*/
 	SiSSetupDSTRect(pSiS->scrnOffset, -1)
-	SiSSetupDSTColorDepth(SISPTR(pScrn)->DstColor);
+	SiSSetupDSTColorDepth(pSiS->DstColor);
 	SiSSetupROP(sisPatALUConv[rop])
 	SiSSetupCMDFlag(PATPATREG | X_INC | Y_INC)
 }
@@ -662,6 +936,11 @@ SiSSubsequentColorPatternFill(ScrnInfoPtr pScrn,
 	SiSDoCMD
 }
 
+/* ----- CPU To Screen Color Expand (single task) ------------------------- */
+
+/* This does not work. Assumingly for the same
+ * reason why STSColorExpand does not work either.
+ */
 static void
 SiSSetupForCPUToScreenColorExpand(ScrnInfoPtr pScrn,
                                 int fg, int bg,
@@ -674,7 +953,7 @@ SiSSetupForCPUToScreenColorExpand(ScrnInfoPtr pScrn,
 
 /*      SiSSetupDSTRect(pSiS->scrnOffset, pScrn->virtualY)*/
 	SiSSetupDSTRect(pSiS->scrnOffset, -1)
-	SiSSetupDSTColorDepth(SISPTR(pScrn)->DstColor);
+	SiSSetupDSTColorDepth(pSiS->DstColor);
 	SiSSetupSRCXY(0,0)
 	SiSSetupSRCFG(fg)
 	SiSSetupROP(sisPatALUConv[rop])
@@ -711,7 +990,13 @@ SiSSubsequentCPUToScreenColorExpand(ScrnInfoPtr pScrn,
 /*      SiSDoCMD*/
 	pSiS->DoColorExpand = TRUE;
 }
+#endif
 
+/* ------ Screen To Screen Color Expand ------------------------------- */
+
+/* TW: The hareware does not seem to support this the way we need it */
+
+#ifdef STSCE
 static void
 SiSSetupForScreenToScreenColorExpand(ScrnInfoPtr pScrn,
                                 int fg, int bg,
@@ -722,135 +1007,391 @@ SiSSetupForScreenToScreenColorExpand(ScrnInfoPtr pScrn,
 	PDEBUG(ErrorF("Setup ScreenToScreen ColorExp(0x%x,0x%x, 0x%x)\n",
 							fg, bg, rop));
 
-	SiSSetupDSTBase(0)
-/*      SiSSetupDSTRect(pSiS->scrnOffset, pScrn->virtualY)*/
+	SiSSetupDSTColorDepth(pSiS->DstColor)
 	SiSSetupDSTRect(pSiS->scrnOffset, -1)
-	SiSSetupDSTColorDepth(SISPTR(pScrn)->DstColor);
-	SiSSetupSRCFG(fg)
-	SiSSetupSRCBG(bg)
-	SiSSetupSRCXY(0,0)
 	SiSSetupROP(sisALUConv[rop])
-	SiSSetupCMDFlag(X_INC | Y_INC | ENCOLOREXP)
+	SiSSetupSRCFG(fg)
+	/* SiSSetupSRCXY(0,0) */
+
+	if(bg == -1) {
+		SiSSetupCMDFlag(TRANSPARENT | ENCOLOREXP | X_INC |
+				Y_INC | SRCVIDEO);
+	} else {
+		SiSSetupSRCBG(bg);
+		SiSSetupCMDFlag(ENCOLOREXP | X_INC | Y_INC |
+				SRCVIDEO);
+	};
 }
+#endif
+
+/* TW. This method blits in a single task; this does not seem to work
+ * because the hardware does not use the source pitch as scanline
+ * offset but only to calculate pattern address from source X and Y.
+ * XAA provides the pattern bitmap with scrnOffset (displayWidth * bpp/8)
+ * offset, but this does not seem to be supported by the hardware.
+ */
+#ifdef STSCE
+
+/* For testing, these are the methods: (use only one at a time!) */
+
+#undef npitch 		/* Normal: Use srcx/y as srcx/y, use scrnOffset as source pitch
+			 * This would work if the hareware used the source pitch for
+			 * incrementing the source address after each scanline - but
+			 * it doesn't do this! The first line of the area is correctly
+			 * color expanded, but since the source pitch is ignored and
+			 * the source address not incremented correctly, the following
+			 * lines are color expanded with any bit pattern that is left
+			 * in the unused space of the source bitmap (which is organized
+			 * with the depth of the screen framebuffer hence with a pitch
+			 * of scrnOffset).
+			 */
+
+#undef pitchdw    	/* Use source pitch "displayWidth / 8" instead
+		   	 * of scrnOffset (=displayWidth * bpp / 8)
+			 * This can't work, because the pitch of the source
+			 * bitmap is scrnoffset!
+		   	 */
+
+#define  nopitch   	/* Calculate srcbase with srcx and srcy, set the
+		   	 * pitch to scrnOffset (which IS the correct pitch
+		   	 * for the source bitmap) and set srcx and srcy both
+		   	 * to 0.
+			 * This would work if the hareware used the source pitch for
+			 * incrementing the source address after each scanline - but
+			 * it doesn't do this! Again: The first line of the area is
+			 * correctly color expanded, but since the source pitch is
+			 * ignored for scanline address incremention, the following
+			 * lines are not correctly color expanded.
+			 * WHATEVER I write to source pitch is ignored!
+		   	 */
 
 static void
 SiSSubsequentScreenToScreenColorExpand(ScrnInfoPtr pScrn,
                                 int x, int y, int w, int h,
                                 int srcx, int srcy, int skipleft)
 {
-	SISPtr          pSiS = SISPTR(pScrn);
+	SISPtr pSiS = SISPTR(pScrn);
+        long srcbase, dstbase;
+#if 0
+	int _x0, _y0, _x1, _y1;
+#endif
+#ifdef pitchdw
+	int newsrcx, newsrcy;
 
-	PDEBUG(ErrorF("Sub ScreenToScreen ColorExp(%d,%d, %d,%d, %d,%d, %d)\n",
-							x, y, w, h, srcx, srcy, skipleft));
+	/* srcx and srcy are provided based on a scrnOffset pitch ( = displayWidth * bpp / 8 )
+	 * We recalulate srcx and srcy based on pitch = displayWidth / 8
+	 */
+        newsrcy = ((pSiS->scrnOffset * srcy) + (srcx * ((pScrn->bitsPerPixel+7)/8))) /
+					  (pScrn->displayWidth/8);
+        newsrcx = ((pSiS->scrnOffset * srcy) + (srcx * ((pScrn->bitsPerPixel+7)/8))) %
+					  (pScrn->displayWidth/8);
+#endif
+	xf86DrvMsg(0, X_INFO, "Sub ScreenToScreen ColorExp(%d,%d, %d,%d, %d,%d, %d)\n",
+					x, y, w, h, srcx, srcy, skipleft);
+
+	srcbase = dstbase = 0;
+
+#ifdef pitchdw
+	if (newsrcy >= 2048) {
+		srcbase = (pScrn->displayWidth / 8) * newsrcy;
+		newsrcy = 0;
+	}
+#endif
+#ifdef nopitch
+	srcbase = (pSiS->scrnOffset * srcy) + (srcx * ((pScrn->bitsPerPixel+7)/8));
+#endif
+#ifdef npitch
+	if (srcy >= 2048) {
+		srcbase = pSiS->scrnOffset * srcy;
+		srcy = 0;
+	}
+#endif
+	if (y >= 2048) {
+		dstbase = pSiS->scrnOffset * y;
+		y = 0;
+	}
+#ifdef SISDUALHEAD
+	if(pSiS->VGAEngine != SIS_530_VGA) {
+	   srcbase += HEADOFFSET;
+	   dstbase += HEADOFFSET;
+	}
+#endif
+	SiSSetupSRCBase(srcbase)
+	SiSSetupDSTBase(dstbase)
+
+#ifdef pitchdw
+	SiSSetupSRCPitch(pScrn->displayWidth/8)
+#endif
+#ifdef nopitch
+	SiSSetupSRCPitch(pSiS->scrnOffset)
+	/* SiSSetupSRCPitch(100) */ /* For test - has NO effect WHATSOEVER */
+#endif
+#ifdef npitch
+	SiSSetupSRCPitch(pSiS->scrnOffset)
+#endif
 
-	SiSSetupSRCPitch(((w+31)&0xFFE0)/8)
-	SiSSetupDSTXY(x,y)
 	SiSSetupRect(w,h)
+
+#if 0   /* How do I implement the offset? Not this way, that's for sure.. */
+	if (skipleft > 0) {
+		_x0 = x+skipleft;
+		_y0 = y;
+		_x1 = x+w;
+		_y1 = y+h;
+		SiSSetupClipLT(_x0, _y0);
+		SiSSetupClipRB(_x1, _y1);
+		SiSSetupCMDFlag(CLIPENABLE);
+	}
+#endif
+#ifdef pitchdw
+	SiSSetupSRCXY(newsrcx, newsrcy)
+#endif
+#ifdef nopitch
+	SiSSetupSRCXY(0,0)
+#endif
+#ifdef npitch
+	SiSSetupSRCXY(srcx, srcy)
+#endif
+
+	SiSSetupDSTXY(x,y)
+
 	SiSDoCMD
 }
 #endif
 
-static void 
-SiSSetupForScanlineCPUToScreenColorExpandFill(ScrnInfoPtr pScrn, int fg, int bg, int rop, unsigned int planemask)
+/* TW: TEST: Do it scanline-wise because the other way does not seem to
+ *     be supported by the hardware. (The source pitch seems to be
+ *     displayWidth * (bbp/8) as opposed by the XAA HOWTO, where
+ *     it is stated that the pitch would be displayWidth pixels;
+ *     besides, the hardware seems to ignore the source pitch
+ *     for address increments.)
+ *     Apart from this (which can be solved by doing the color
+ *     expand scanline-wise), I don't know how to implement the
+ *     offset argument. The current method (which uses hardware
+ *     clipping) does not work.
+ *
+ *     THIS DOES NOT WORK IN THE CURRENT STATE.
+ */
+#if 0
+static void
+SiSSubsequentScreenToScreenColorExpand(ScrnInfoPtr pScrn,
+                                int x, int y, int w, int h,
+                                int srcx, int srcy, int offset)
+{
+	SISPtr pSiS = SISPTR(pScrn);
+        long srcbase, dstbase;
+	int _x0, _y0, _x1, _y1;
+
+	int newsrcx, newsrcy;
+
+        newsrcy = ((pSiS->scrnOffset * srcy) + (srcx * ((pScrn->bitsPerPixel+7)/8))) /
+					  (((((w+7)/8)+3) >> 2) * 4);
+					  /* (pScrn->displayWidth/8); */
+        newsrcx = ((pSiS->scrnOffset * srcy) + (srcx * ((pScrn->bitsPerPixel+7)/8))) %
+					  (((((w+7)/8)+3) >> 2) * 4);
+					  /* (pScrn->displayWidth/8); */
+
+	xf86DrvMsg(0, X_INFO, "Sub STS CE(%d,%d, %d,%d, %d,%d, %d)\n",
+					x, y, w, h, srcx, srcy, skipleft);
+
+	srcbase = dstbase = 0;
+	if (newsrcy >= 2048) {
+		srcbase = (((((w+7)/8)+3) >> 2) * 4) * newsrcy;
+		          /* (pScrn->displayWidth/8) * newsrcy;      */
+		          /* pSiS->scrnOffset * srcy;                */
+		newsrcy = 0;
+	}
+	if (y >= 2048) {
+		dstbase = pSiS->scrnOffset * y;
+		y = 0;
+	}
+#ifdef SISDUALHEAD
+	srcbase += HEADOFFSET;
+	dstbase += HEADOFFSET;
+#endif
+	SiSSetupDSTBase(dstbase)
+
+	SiSSetupRect(w, 1)
+
+	SiSSetupSRCXY(newsrcx, newsrcy)
+
+	/* SiSSetupSRCPitch(pScrn->displayWidth/8) */ /* old: (((w+31)&0xFFE0)/8) */
+	SiSSetupSRCPitch(((((w+7)/8)+3) >> 2) * 4)
+#if 1
+        if (offset > 0) {
+	    SiSSetupCMDFlag(CLIPENABLE)
+        } else
+            pSiS->CommandReg &= ~CLIPENABLE;
+#endif
+
+	while (h) {
+
+	   SiSSetupSRCBase(srcbase)
+#if 1
+	   if (offset > 0) {
+		_x0 = x+skipleft;
+		_y0 = y;
+		_x1 = x+w;
+		_y1 = y+h;
+		SiSSetupClipLT(_x0, _y0);
+		SiSSetupClipRB(_x1, _y1);
+	   }
+#endif
+	   SiSSetupDSTXY(x,y)
+
+	   SiSDoCMD
+
+	   srcbase += ((((w+7)/8)+3) >> 2) * 4 * 8* ((pScrn->bitsPerPixel+7)/8);
+	   	      /* pSiS->scrnOffset;  */
+	   y++;
+	   h--;
+	}
+}
+#endif
+
+
+/* ----- CPU To Screen Color Expand (scanline-wise) ----------------- */
+
+/* We do it using the indirect method */
+
+static void
+SiSSetupForScanlineCPUToScreenColorExpandFill(ScrnInfoPtr pScrn,
+		int fg, int bg, int rop, unsigned int planemask)
 {
 	SISPtr pSiS=SISPTR(pScrn);
-	
-	while ((MMIO_IN16(pSiS->IOBase, 0x8242) & 0x1F00)!=0) {}
+
+        /* TW: Make sure that current CPU-driven BitBlt buffer stage is 0
+	 *     This is required!!! (Otherwise -> drawing errors)
+	 */
+	while((MMIO_IN16(pSiS->IOBase, 0x8242) & 0x1F00) != 0) {} /* WDR: == 0x10 */
+
+#if 0   /* TW: This is obviously not needed */
 	pSiS->ColorExpandRingHead = 0;
 	pSiS->ColorExpandRingTail = pSiS->ColorExpandBufferNumber - 1;
+#endif
+
 	SiSSetupSRCXY(0,0);
 	SiSSetupROP(sisALUConv[rop]);
 	SiSSetupSRCFG(fg);
 	SiSSetupDSTRect(pSiS->scrnOffset, -1);
 	SiSSetupDSTColorDepth(pSiS->DstColor);
-	if (bg == -1) { 
-		SiSSetupCMDFlag(TRANSPARENT | ENCOLOREXP | X_INC |
-						Y_INC|SRCSYSTEM);  
-	}
-	else {
+	if(bg == -1) {
+		SiSSetupCMDFlag(TRANSPARENT |
+		                ENCOLOREXP |
+				X_INC | Y_INC |
+				SRCCPUBLITBUF);
+	} else {
 		SiSSetupSRCBG(bg);
-		SiSSetupCMDFlag(ENCOLOREXP | X_INC | Y_INC |
-						SRCSYSTEM);      
-	};
+		SiSSetupCMDFlag(ENCOLOREXP |
+		                X_INC | Y_INC |
+				SRCCPUBLITBUF);
+	}
 }
 
-static void SiSSubsequentScanlineCPUToScreenColorExpandFill(
-                        ScrnInfoPtr pScrn, int x, int y, int w, 
+
+static void
+SiSSubsequentScanlineCPUToScreenColorExpandFill(
+                        ScrnInfoPtr pScrn, int x, int y, int w,
                         int h, int skipleft)
 {
 	SISPtr pSiS = SISPTR(pScrn);
-static int     srcpitch;
 	int _x0, _y0, _x1, _y1;
 	long dstbase;
 
 	dstbase = 0;
 	if (y >= 2048) {
-		dstbase = pSiS->scrnOffset*y;
+		dstbase = pSiS->scrnOffset * y;
 		y = 0;
 	}
+#ifdef SISDUALHEAD
+	if(pSiS->VGAEngine != SIS_530_VGA) {
+	   	dstbase += HEADOFFSET;
+	}
+#endif
+
+	/* TW: Wait until there is no color expansion command in queue
+	 *     (This solves the OpenOffice.org window-move bug)
+	 *     Added Idle-check - bit 23 is set sometimes, although
+	 *     engine is actually idle!
+	 *     Update: Bit 23 is not reliable. After heavy 3D engine
+	 *     action, this bit never gets cleared again. So do
+	 *     SiSIdle instead.
+	 */
+	if((MMIO_IN16(pSiS->IOBase, 0x8242) & 0xe000) != 0xe000) {
+           /* while ((MMIO_IN16(pSiS->IOBase, 0x8242) & 0x0080) != 0) {} */
+	   SiSIdle
+	}
+
 	SiSSetupDSTBase(dstbase)
 
 	if (skipleft > 0) {
-		_x0 = x+skipleft;
+		_x0 = x + skipleft;
 		_y0 = y;
-		_x1 = x+w;
-		_y1 = y+h;
+		_x1 = x + w;
+		_y1 = y + h;
 		SiSSetupClipLT(_x0, _y0);
 		SiSSetupClipRB(_x1, _y1);
-		SiSSetupCMDFlag(CLIPENABLE);    
-	} 
+		SiSSetupCMDFlag(CLIPENABLE);
+	} else {
+		pSiS->CommandReg &= (~CLIPENABLE);
+	}
+
 	SiSSetupRect(w, 1);
-	srcpitch = ((((w+7)/8)+3) >> 2) * 4;
-	SiSSetupSRCPitch(srcpitch);
-	pSiS->ycurrent = y;
+        SiSSetupSRCPitch(((((w+7)/8)+3) >> 2) * 4);
 	pSiS->xcurrent = x;
+	pSiS->ycurrent = y;
 }
 
-static void SiSSubsequentColorExpandScanline(ScrnInfoPtr pScrn, int bufno)
+static void
+SiSSubsequentColorExpandScanline(ScrnInfoPtr pScrn, int bufno)
 {
-	SISPtr pSiS=SISPTR(pScrn);              
+	SISPtr pSiS=SISPTR(pScrn);
+#if 0
 	int newhead,bltbufstage,newtail;
+#endif
+	long cbo;
 
-	SiSSetupSRCBase(pSiS->ColorExpandBufferScreenOffset[bufno]);
-	SiSSetupDSTXY(pSiS->xcurrent, pSiS->ycurrent);
-	pSiS->ycurrent++;
-	SiSDoCMD
-	newhead = pSiS->ColorExpandRingHead = (bufno + 1) & 
-							pSiS->ColorExpandBufferCountMask;
-	while (newhead == pSiS->ColorExpandRingTail) {
-		bltbufstage = (int)((MMIO_IN16(pSiS->IOBase,0x8242) & 
-							0x1F00)>>8);
-		newtail = newhead - (bltbufstage + 1);
-		pSiS->ColorExpandRingTail = (newtail >= 0) ? 
-							newtail: (pSiS->ColorExpandBufferNumber+newtail);
+	cbo = pSiS->ColorExpandBufferScreenOffset[bufno];
+#ifdef SISDUALHEAD
+	if(pSiS->VGAEngine != SIS_530_VGA) {
+	   cbo += HEADOFFSET;
 	}
-}
+#endif
 
-#if 0
-static void SiSSetupForImageWrite(ScrnInfoPtr pScrn, int rop, 
-            unsigned int planemask, int trans_color, int bpp, int depth)
-{
-	return;
-}
+	/* TW: Wait until there is no color expansion command in queue
+	 *     (This solves the GTK-big-font bug)
+	 *     Added Idle-check - bit 23 is set sometimes, although
+	 *     engine is actually idle!
+	 *     Update: Bit 23 is not reliable. After heavy 3D engine
+	 *     action, this bit never gets cleared again. So do
+	 *     SiSIdle instead.
+	 */
+	if((MMIO_IN16(pSiS->IOBase, 0x8242) & 0xe000) != 0xe000) {
+	  /* while ((MMIO_IN16(pSiS->IOBase, 0x8242) & 0x0080) != 0) {} */
+	    SiSIdle
+	}
 
-static void SiSSubsequentImageWriteRect(ScrnInfoPtr pScrn, 
-            int x, int y, int w, int h, int skipleft)
-{
-	return;
-}
-#endif
+	SiSSetupSRCBase(cbo);
 
-#ifdef DEBUG
-static void
-MMIODump(ScrnInfoPtr pScrn)
-{
-	SISPtr  pSiS = SISPTR(pScrn);
-	int     i;
+	SiSSetupDSTXY(pSiS->xcurrent, pSiS->ycurrent);
 
-	SiSIdle
-	for (i=0x8200; i <= 0x823c; i += 4)  {
-		ErrorF("[%x] %0X \n", i,
-				MMIO_IN32(pSiS->IOBase,i));
+	SiSDoCMD
+
+	pSiS->ycurrent++;
+
+	if(pSiS->VGAEngine == SIS_530_VGA) {
+	   while(MMIO_IN8(pSiS->IOBase, 0x8242) & 0x80) {}
+	}
+
+#if 0	/* TW: What is this good for? The Head/Tail data is never ever used elsewhere! */
+	pSiS->ColorExpandRingHead = newhead =
+			(bufno + 1) & pSiS->ColorExpandBufferCountMask;
+	while (newhead == pSiS->ColorExpandRingTail) {
+		bltbufstage = (int)((MMIO_IN16(pSiS->IOBase,0x8242) & 0x1F00) >> 8);
+		newtail = newhead - (bltbufstage + 1);
+		pSiS->ColorExpandRingTail = (newtail >= 0) ?
+				newtail : (pSiS->ColorExpandBufferNumber + newtail);
 	}
-}
 #endif
+}
+
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/sis/sis300_accel.h b/xc/programs/Xserver/hw/xfree86/drivers/sis/sis300_accel.h
index c7ad255c9..33948d0d2 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/sis/sis300_accel.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/sis/sis300_accel.h
@@ -1,5 +1,9 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/sis300_accel.h,v 1.8 2003/01/29 15:42:16 eich Exp $ */
 /*
+ * 2D acceleration for SiS530/620 and 300 series
+ *
  * Copyright 1998,1999 by Alan Hourihane, Wigan, England.
+ * Parts Copyright 2002 Thomas Winischhofer, Vienna, Austria
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
@@ -25,46 +29,61 @@
  *           Mitani Hiroshi <hmitani@drl.mei.co.jp> 
  *           David Thomas <davtom@dream.org.uk>. 
  *           Xavier Ducoin <x.ducoin@lectra.com>
+ *           Thomas Winischhofer <thomas@winischhofer.net>
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/sis300_accel.h,v 1.6 2002/04/04 14:05:47 eich Exp $ */
 
 
 /* Definitions for the SIS engine communication. */
 
-#define PATREGSIZE      384
+#define PATREGSIZE      384  /* Pattern register size. 384 bytes @ 0x8300 */
 #define BR(x)   (0x8200 | (x) << 2)
 #define PBR(x)  (0x8300 | (x) << 2)
 
-/* Definitions for the SiS300 engine command */
-#define BITBLT                  0x00000000
-#define COLOREXP                0x00000001
-#define ENCOLOREXP              0x00000002
-#define MULTIPLE_SCANLINE       0x00000003
-#define LINE                    0x00000004
-#define TRAPAZOID_FILL          0x00000005
-#define TRANSPARENT_BITBLT      0x00000006
-
-#define SRCVIDEO                0x00000000
-#define SRCSYSTEM               0x00000010
-#define SRCAGP                  0x00000020
-
-#define PATFG                   0x00000000
-#define PATPATREG               0x00000040
-#define PATMONO                 0x00000080
-
+/* SiS300 engine commands */
+#define BITBLT                  0x00000000  /* Blit */
+#define COLOREXP                0x00000001  /* Color expand */
+#define ENCOLOREXP              0x00000002  /* Enhanced color expand */
+#define MULTIPLE_SCANLINE       0x00000003  /* ? */
+#define LINE                    0x00000004  /* Draw line */
+#define TRAPAZOID_FILL          0x00000005  /* Fill trapezoid */
+#define TRANSPARENT_BITBLT      0x00000006  /* Transparent Blit */
+
+/* source select */
+#define SRCVIDEO                0x00000000  /* source is video RAM */
+#define SRCSYSTEM               0x00000010  /* source is system memory */
+#define SRCCPUBLITBUF           SRCSYSTEM   /* source is CPU-driven BitBuffer (for color expand) */
+#define SRCAGP                  0x00000020  /* source is AGP memory (?) */
+
+/* Pattern flags */
+#define PATFG                   0x00000000  /* foreground color */
+#define PATPATREG               0x00000040  /* pattern in pattern buffer (0x8300) */
+#define PATMONO                 0x00000080  /* mono pattern */
+
+/* blitting direction */
 #define X_INC                   0x00010000
 #define X_DEC                   0x00000000
 #define Y_INC                   0x00020000
 #define Y_DEC                   0x00000000
 
+/* Clipping flags */
 #define NOCLIP                  0x00000000
 #define NOMERGECLIP             0x04000000
 #define CLIPENABLE              0x00040000
 #define CLIPWITHOUTMERGE        0x04040000
 
+/* Transparency */
 #define OPAQUE                  0x00000000
 #define TRANSPARENT             0x00100000
 
+/* Trapezoid */
+#define T_XISMAJORL             0x00800000  /* X axis is driving axis (left) */
+#define T_XISMAJORR             0x01000000  /* X axis is driving axis (right) */
+#define T_L_Y_INC               Y_INC       /* left edge direction Y */
+#define T_L_X_INC               X_INC       /* left edge direction X */
+#define T_R_Y_INC               0x00400000  /* right edge direction Y */
+#define T_R_X_INC               0x00200000  /* right edge direction X */
+
+/* ? */
 #define DSTAGP                  0x02000000
 #define DSTVIDEO                0x02000000
 
@@ -73,93 +92,117 @@
 #define NO_RESET_COUNTER        0x00400000
 #define NO_LAST_PIXEL           0x00200000
 
+
 /* Macros to do useful things with the SIS BitBLT engine */
 
-/*
+/* BR(16) (0x8240):
+
    bit 31 2D engine: 1 is idle,
    bit 30 3D engine: 1 is idle,
    bit 29 Command queue: 1 is empty
+
+   bits 28:24: Current CPU driven BitBlt buffer stage bit[4:0]
+
+   bits 15:0:  Current command queue length (530/620: 12:0)
+
 */
 
 /* TW: BR(16)+2 = 0x8242 */
 
-static	int     CmdQueLen;
+#define CmdQueLen pSiS->cmdQueueLen
 
 #define SiSIdle \
   { \
   while( (MMIO_IN16(pSiS->IOBase, BR(16)+2) & 0xE000) != 0xE000){}; \
   while( (MMIO_IN16(pSiS->IOBase, BR(16)+2) & 0xE000) != 0xE000){}; \
   while( (MMIO_IN16(pSiS->IOBase, BR(16)+2) & 0xE000) != 0xE000){}; \
-  CmdQueLen=MMIO_IN16(pSiS->IOBase, 0x8240); \
+  CmdQueLen = (MMIO_IN16(pSiS->IOBase, 0x8240) & pSiS->CmdQueLenMask) - pSiS->CmdQueLenFix; \
   }
 /* TW: (do three times, because 2D engine seems quite unsure about whether or not it's idle) */
 
 #define SiSSetupSRCBase(base) \
                 if (CmdQueLen <= 0)  SiSIdle;\
                 MMIO_OUT32(pSiS->IOBase, BR(0), base);\
-                CmdQueLen --;
-        
+                CmdQueLen--;
 
 #define SiSSetupSRCPitch(pitch) \
                 if (CmdQueLen <= 0)  SiSIdle;\
                 MMIO_OUT16(pSiS->IOBase, BR(1), pitch);\
-                CmdQueLen --;
+                CmdQueLen--;
 
 #define SiSSetupSRCXY(x,y) \
                 if (CmdQueLen <= 0)  SiSIdle;\
                 MMIO_OUT32(pSiS->IOBase, BR(2), (x)<<16 | (y) );\
-                CmdQueLen --;
+                CmdQueLen--;
 
 #define SiSSetupDSTBase(base) \
                 if (CmdQueLen <= 0)  SiSIdle;\
                 MMIO_OUT32(pSiS->IOBase, BR(4), base);\
-                CmdQueLen --;
+                CmdQueLen--;
 
 #define SiSSetupDSTXY(x,y) \
                 if (CmdQueLen <= 0)  SiSIdle;\
                 MMIO_OUT32(pSiS->IOBase, BR(3), (x)<<16 | (y) );\
-                CmdQueLen --;
+                CmdQueLen--;
 
 #define SiSSetupDSTRect(x,y) \
                 if (CmdQueLen <= 0)  SiSIdle;\
                 MMIO_OUT32(pSiS->IOBase, BR(5), (y)<<16 | (x) );\
-                CmdQueLen --;
+                CmdQueLen--;
 
 #define SiSSetupDSTColorDepth(bpp) \
-                if (CmdQueLen <= 0)  SiSIdle;\
-                MMIO_OUT16(pSiS->IOBase, BR(1)+2, bpp);\
-                CmdQueLen --;
+                if(pSiS->VGAEngine != SIS_530_VGA) { \
+                  if (CmdQueLen <= 0)  SiSIdle;\
+                  MMIO_OUT16(pSiS->IOBase, BR(1)+2, bpp);\
+                  CmdQueLen--; \
+		}
 
 #define SiSSetupRect(w,h) \
                 if (CmdQueLen <= 0)  SiSIdle;\
                 MMIO_OUT32(pSiS->IOBase, BR(6), (h)<<16 | (w) );\
-                CmdQueLen --;
+                CmdQueLen--;
 
 #define SiSSetupPATFG(color) \
                 if (CmdQueLen <= 0)  SiSIdle;\
                 MMIO_OUT32(pSiS->IOBase, BR(7), color);\
-                CmdQueLen --;
+                CmdQueLen--;
 
 #define SiSSetupPATBG(color) \
                 if (CmdQueLen <= 0)  SiSIdle;\
                 MMIO_OUT32(pSiS->IOBase, BR(8), color);\
-                CmdQueLen --;
+                CmdQueLen--;
 
 #define SiSSetupSRCFG(color) \
                 if (CmdQueLen <= 0)  SiSIdle;\
                 MMIO_OUT32(pSiS->IOBase, BR(9), color);\
-                CmdQueLen --;
+                CmdQueLen--;
 
 #define SiSSetupSRCBG(color) \
                 if (CmdQueLen <= 0)  SiSIdle;\
                 MMIO_OUT32(pSiS->IOBase, BR(10), color);\
-                CmdQueLen --;
+                CmdQueLen--;
+
+/* 0x8224 src colorkey high */
+/* 0x8228 src colorkey low */
+/* 0x821c dest colorkey high */
+/* 0x8220 dest colorkey low */
+#define SiSSetupSRCTrans(color) \
+                if (CmdQueLen <= 1)  SiSIdle;\
+                MMIO_OUT32(pSiS->IOBase, 0x8224, color);\
+		MMIO_OUT32(pSiS->IOBase, 0x8228, color);\
+		CmdQueLen -= 2;
+
+#define SiSSetupDSTTrans(color) \
+		if (CmdQueLen <= 1)  SiSIdle;\
+		MMIO_OUT32(pSiS->IOBase, 0x821C, color); \
+		MMIO_OUT32(pSiS->IOBase, 0x8220, color); \
+                CmdQueLen -= 2;
 
 #define SiSSetupMONOPAT(p0,p1) \
                 if (CmdQueLen <= 1)  SiSIdle;\
                 MMIO_OUT32(pSiS->IOBase, BR(11), p0);\
                 MMIO_OUT32(pSiS->IOBase, BR(12), p1);\
-                CmdQueLen =CmdQueLen-2;
+                CmdQueLen -= 2;
 
 #define SiSSetupClipLT(left,top) \
                 if (CmdQueLen <= 0)  SiSIdle;\
@@ -169,46 +212,86 @@ static	int     CmdQueLen;
 #define SiSSetupClipRB(right,bottom) \
                 if (CmdQueLen <= 0)  SiSIdle;\
                 MMIO_OUT32(pSiS->IOBase, BR(14), ((right) & 0xFFFF) | (bottom)<<16 );\
-                CmdQueLen --;
+                CmdQueLen--;
 
+/* General */
 #define SiSSetupROP(rop) \
-        pSiS->CommandReg = (rop) << 8;
+                pSiS->CommandReg = (rop) << 8;
 
 #define SiSSetupCMDFlag(flags) \
-        pSiS->CommandReg |= (flags);
+                pSiS->CommandReg |= (flags);
 
 #define SiSDoCMD \
                 if (CmdQueLen <= 1)  SiSIdle;\
                 MMIO_OUT32(pSiS->IOBase, BR(15), pSiS->CommandReg); \
-                MMIO_OUT32(pSiS->IOBase, BR(16), 0);\
-                CmdQueLen =CmdQueLen-2;
+		CmdQueLen--; \
+		if(pSiS->VGAEngine != SIS_530_VGA) { \
+                   MMIO_OUT32(pSiS->IOBase, BR(16), 0);\
+                   CmdQueLen--; \
+		} else { \
+		   unsigned long temp; \
+		   temp = MMIO_IN32(pSiS->IOBase, BR(16)); \
+		} \
 
+/* Line */
 #define SiSSetupX0Y0(x,y) \
                 if (CmdQueLen <= 0)  SiSIdle;\
                 MMIO_OUT32(pSiS->IOBase, BR(2), (y)<<16 | (x) );\
-                CmdQueLen --;
+                CmdQueLen--;
 
 #define SiSSetupX1Y1(x,y) \
                 if (CmdQueLen <= 0)  SiSIdle;\
                 MMIO_OUT32(pSiS->IOBase, BR(3), (y)<<16 | (x) );\
-                CmdQueLen --;
+                CmdQueLen--;
 
 #define SiSSetupLineCount(c) \
                 if (CmdQueLen <= 0)  SiSIdle;\
                 MMIO_OUT16(pSiS->IOBase, BR(6), c);\
-                CmdQueLen --;
+                CmdQueLen--;
 
 #define SiSSetupStylePeriod(p) \
                 if (CmdQueLen <= 0)  SiSIdle;\
                 MMIO_OUT16(pSiS->IOBase, BR(6)+2, p);\
-                CmdQueLen --;
+                CmdQueLen--;
 
 #define SiSSetupStyleLow(ls) \
                 if (CmdQueLen <= 0)  SiSIdle;\
                 MMIO_OUT32(pSiS->IOBase, BR(11), ls);\
-                CmdQueLen --;
+                CmdQueLen--;
 
 #define SiSSetupStyleHigh(ls) \
                 if (CmdQueLen <= 0)  SiSIdle;\
                 MMIO_OUT32(pSiS->IOBase, BR(12), ls);\
-                CmdQueLen --;
+                CmdQueLen--;
+
+/* TW: Trapezoid */
+#define SiSSetupYH(y,h) \
+                if (CmdQueLen <= 0)  SiSIdle;\
+                MMIO_OUT32(pSiS->IOBase, 0x8208, (y)<<16 | (h) );\
+                CmdQueLen--;
+
+#define SiSSetupLR(left,right) \
+                if (CmdQueLen <= 0)  SiSIdle;\
+                MMIO_OUT32(pSiS->IOBase, 0x820C, (right)<<16 | (left) );\
+                CmdQueLen--;
+
+#define SiSSetupdL(dxL,dyL) \
+                if (CmdQueLen <= 0)  SiSIdle;\
+                MMIO_OUT32(pSiS->IOBase, 0x8244, (dyL)<<16 | (dxL) );\
+                CmdQueLen--;
+
+#define SiSSetupdR(dxR,dyR) \
+                if (CmdQueLen <= 0)  SiSIdle;\
+		MMIO_OUT32(pSiS->IOBase, 0x8248, (dyR)<<16 | (dxR) );\
+                CmdQueLen--;
+
+#define SiSSetupEL(eL) \
+                if (CmdQueLen <= 0)  SiSIdle;\
+		MMIO_OUT32(pSiS->IOBase, 0x824C, eL);\
+		CmdQueLen--;
+
+#define SiSSetupER(eR) \
+                if (CmdQueLen <= 0)  SiSIdle;\
+                MMIO_OUT32(pSiS->IOBase, 0x8250, eR);\
+                CmdQueLen--;
+
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/sis/sis310_accel.c b/xc/programs/Xserver/hw/xfree86/drivers/sis/sis310_accel.c
new file mode 100644
index 000000000..aeee2737d
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/sis/sis310_accel.c
@@ -0,0 +1,894 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/sis310_accel.c,v 1.2 2003/01/29 15:42:16 eich Exp $ */
+/*
+ * 2D Acceleration for SiS 310/325 series (315, 550, 650, 740, M650, 651)
+ *
+ * Copyright 2002 by Thomas Winischhofer, Vienna, Austria
+ *
+ * Permission to use, copy, modify, distribute, and sell this software and its
+ * documentation for any purpose is hereby granted without fee, provided that
+ * the above copyright notice appear in all copies and that both that
+ * copyright notice and this permission notice appear in supporting
+ * documentation, and that the name of Thomas Winischhofer not be used in
+ * advertising or publicity pertaining to distribution of the software without
+ * specific, written prior permission.  Thomas Winischhofer makes no representations
+ * about the suitability of this software for any purpose.  It is provided
+ * "as is" without express or implied warranty.
+ *
+ * THOMAS WINISCHHOFER DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+ * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+ * EVENT SHALL THOMAS WINISCHHOFER BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+ * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
+ * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ *
+ * Based on sis300_accel.c
+ *
+ *      Author:  Thomas Winischhofer <thomas@winischhofer.net>
+ *
+ */
+
+#include "xf86.h"
+#include "xf86_OSproc.h"
+#include "xf86_ansic.h"
+#include "xf86PciInfo.h"
+#include "xf86Pci.h"
+#include "compiler.h"
+#include "xaa.h"
+
+#include "sis.h"
+#include "sis310_accel.h"
+
+#ifdef SISDUALHEAD
+/* TW: This is the offset to the memory for each head */
+#define HEADOFFSET 	(pSiS->dhmOffset)
+#endif
+
+#undef TRAP     	/* TW: Use/Don't use Trapezoid Fills - does not work - XAA provides
+		         * illegal trapezoid data (left and right edges cross each other
+			 * sometimes) which causes drawing errors.
+                         */
+
+#define CTSCE           /* Use/Don't use CPUToScreenColorExpand. */
+
+/* Accelerator functions */
+static void SiSInitializeAccelerator(ScrnInfoPtr pScrn);
+static void SiSSync(ScrnInfoPtr pScrn);
+static void SiSSetupForScreenToScreenCopy(ScrnInfoPtr pScrn,
+                                int xdir, int ydir, int rop,
+                                unsigned int planemask, int trans_color);
+static void SiSSubsequentScreenToScreenCopy(ScrnInfoPtr pScrn,
+                                int x1, int y1, int x2, int y2,
+                                int width, int height);
+static void SiSSetupForSolidFill(ScrnInfoPtr pScrn, int color,
+                                int rop, unsigned int planemask);
+static void SiSSubsequentSolidFillRect(ScrnInfoPtr pScrn,
+                                int x, int y, int w, int h);
+#ifdef TRAP
+static void SiSSubsequentSolidFillTrap(ScrnInfoPtr pScrn, int y, int h,
+	                        int left, int dxL, int dyL, int eL,
+	                        int right, int dxR, int dyR, int eR);
+#endif
+static void SiSSetupForSolidLine(ScrnInfoPtr pScrn, int color,
+                                int rop, unsigned int planemask);
+static void SiSSubsequentSolidTwoPointLine(ScrnInfoPtr pScrn, int x1,
+                                int y1, int x2, int y2, int flags);
+static void SiSSubsequentSolidHorzVertLine(ScrnInfoPtr pScrn,
+                                int x, int y, int len, int dir);
+static void SiSSetupForDashedLine(ScrnInfoPtr pScrn,
+                                int fg, int bg, int rop, unsigned int planemask,
+                                int length, unsigned char *pattern);
+static void SiSSubsequentDashedTwoPointLine(ScrnInfoPtr pScrn,
+                                int x1, int y1, int x2, int y2,
+                                int flags, int phase);
+static void SiSSetupForMonoPatternFill(ScrnInfoPtr pScrn,
+                                int patx, int paty, int fg, int bg,
+                                int rop, unsigned int planemask);
+static void SiSSubsequentMonoPatternFill(ScrnInfoPtr pScrn,
+                                int patx, int paty,
+                                int x, int y, int w, int h);
+#ifdef TRAP
+static void SiSSubsequentMonoPatternFillTrap(ScrnInfoPtr pScrn,
+                                int patx, int paty,
+                                int y, int h,
+                                int left, int dxL, int dyL, int eL,
+	                        int right, int dxR, int dyR, int eR);
+#endif
+#ifdef CTSCE
+static void SiSSetupForScanlineCPUToScreenColorExpandFill(ScrnInfoPtr pScrn,
+                                int fg, int bg, int rop,
+                                unsigned int planemask);
+static void SiSSubsequentScanlineCPUToScreenColorExpandFill(ScrnInfoPtr pScrn,
+                                int x, int y, int w, int h,
+                                int skipleft);
+static void SiSSubsequentColorExpandScanline(ScrnInfoPtr pScrn, int bufno);
+#endif
+
+#ifdef SISDUALHEAD
+static void SiSRestoreAccelState(ScrnInfoPtr pScrn);
+#endif
+
+static void
+SiSInitializeAccelerator(ScrnInfoPtr pScrn)
+{
+	SISPtr  pSiS = SISPTR(pScrn);
+
+	pSiS->DoColorExpand = FALSE;
+}
+
+Bool
+SiS310AccelInit(ScreenPtr pScreen)
+{
+	XAAInfoRecPtr   infoPtr;
+	ScrnInfoPtr     pScrn = xf86Screens[pScreen->myNum];
+	SISPtr          pSiS = SISPTR(pScrn);
+	int		topFB;
+	int             reservedFbSize;
+	int             UsableFbSize;
+	unsigned char   *AvailBufBase;
+	BoxRec          Avail;
+	int             i;
+
+	pSiS->AccelInfoPtr = infoPtr = XAACreateInfoRec();
+	if (!infoPtr)
+		return FALSE;
+
+	SiSInitializeAccelerator(pScrn);
+
+	infoPtr->Flags = LINEAR_FRAMEBUFFER |
+			 OFFSCREEN_PIXMAPS |
+			 PIXMAP_CACHE;
+
+	/* sync */
+	infoPtr->Sync = SiSSync;
+
+	if ((pScrn->bitsPerPixel != 8) && (pScrn->bitsPerPixel != 16) &&
+		(pScrn->bitsPerPixel != 32))
+			return FALSE;
+
+	/* BitBlt */
+	infoPtr->SetupForScreenToScreenCopy = SiSSetupForScreenToScreenCopy;
+	infoPtr->SubsequentScreenToScreenCopy = SiSSubsequentScreenToScreenCopy;
+	infoPtr->ScreenToScreenCopyFlags = NO_PLANEMASK | TRANSPARENCY_GXCOPY_ONLY;
+					 /*| NO_TRANSPARENCY; */
+
+	/* solid fills */
+	infoPtr->SetupForSolidFill = SiSSetupForSolidFill;
+	infoPtr->SubsequentSolidFillRect = SiSSubsequentSolidFillRect;
+#ifdef TRAP
+	infoPtr->SubsequentSolidFillTrap = SiSSubsequentSolidFillTrap;
+#endif
+	infoPtr->SolidFillFlags = NO_PLANEMASK;
+
+	/* solid line */
+	infoPtr->SetupForSolidLine = SiSSetupForSolidLine;
+	infoPtr->SubsequentSolidTwoPointLine = SiSSubsequentSolidTwoPointLine;
+	infoPtr->SubsequentSolidHorVertLine = SiSSubsequentSolidHorzVertLine;
+	infoPtr->SolidLineFlags = NO_PLANEMASK;
+
+	/* dashed line */
+	infoPtr->SetupForDashedLine = SiSSetupForDashedLine;
+	infoPtr->SubsequentDashedTwoPointLine = SiSSubsequentDashedTwoPointLine;
+	infoPtr->DashPatternMaxLength = 64;
+	infoPtr->DashedLineFlags = NO_PLANEMASK |
+				   LINE_PATTERN_MSBFIRST_LSBJUSTIFIED;
+
+	/* 8x8 mono pattern fill */
+	infoPtr->SetupForMono8x8PatternFill = SiSSetupForMonoPatternFill;
+	infoPtr->SubsequentMono8x8PatternFillRect = SiSSubsequentMonoPatternFill;
+#ifdef TRAP
+	infoPtr->SubsequentMono8x8PatternFillTrap = SiSSubsequentMonoPatternFillTrap;
+#endif
+	infoPtr->Mono8x8PatternFillFlags = NO_PLANEMASK |
+					   HARDWARE_PATTERN_SCREEN_ORIGIN |
+					   HARDWARE_PATTERN_PROGRAMMED_BITS |
+					   NO_TRANSPARENCY |
+					   BIT_ORDER_IN_BYTE_MSBFIRST ;
+
+#if 0
+	/* Screen To Screen Color Expand */
+	/* TW: The hardware does not seem to support this the way we need it */
+	infoPtr->SetupForScreenToScreenColorExpandFill =
+	    			SiSSetupForScreenToScreenColorExpand;
+	infoPtr->SubsequentScreenToScreenColorExpandFill =
+	    			SiSSubsequentScreenToScreenColorExpand;
+	infoPtr->ScreenToScreenColorExpandFillFlags = NO_PLANEMASK |
+	                                              BIT_ORDER_IN_BYTE_MSBFIRST ;
+#endif
+
+	/* per-scanline color expansion - indirect method */
+	pSiS->ColorExpandBufferNumber = 16;
+	pSiS->ColorExpandBufferCountMask = 0x0F;
+	pSiS->PerColorExpandBufferSize = ((pScrn->virtualX + 31)/32) * 4;
+#ifdef CTSCE
+	infoPtr->NumScanlineColorExpandBuffers = pSiS->ColorExpandBufferNumber;
+	infoPtr->ScanlineColorExpandBuffers = (unsigned char **)&pSiS->ColorExpandBufferAddr[0];
+	infoPtr->SetupForScanlineCPUToScreenColorExpandFill = SiSSetupForScanlineCPUToScreenColorExpandFill;
+	infoPtr->SubsequentScanlineCPUToScreenColorExpandFill = SiSSubsequentScanlineCPUToScreenColorExpandFill;
+	infoPtr->SubsequentColorExpandScanline = SiSSubsequentColorExpandScanline;
+	infoPtr->ScanlineCPUToScreenColorExpandFillFlags =
+	    NO_PLANEMASK |
+	    CPU_TRANSFER_PAD_DWORD |
+	    SCANLINE_PAD_DWORD |
+	    BIT_ORDER_IN_BYTE_MSBFIRST |
+	    LEFT_EDGE_CLIPPING;
+#endif
+
+#ifdef SISDUALHEAD
+	if (pSiS->DualHeadMode) {
+		infoPtr->RestoreAccelState = SiSRestoreAccelState;
+	}
+#endif
+
+	/* init Frame Buffer Manager */
+
+	topFB = pSiS->maxxfbmem;
+
+	reservedFbSize = (pSiS->ColorExpandBufferNumber
+			   * pSiS->PerColorExpandBufferSize);
+        /* TW: New for MaxXFBmem Option */
+	UsableFbSize = topFB - reservedFbSize;
+	/* Layout:
+	 * |--------------++++++++++++++++++++^************==========~~~~~~~~~~~~|
+	 *   UsableFbSize  ColorExpandBuffers |  DRI-Heap   HWCursor  CommandQueue
+	 *                                 topFB
+	 */
+	AvailBufBase = pSiS->FbBase + UsableFbSize;
+	for (i = 0; i < pSiS->ColorExpandBufferNumber; i++) {
+		pSiS->ColorExpandBufferAddr[i] = AvailBufBase + 
+		    i * pSiS->PerColorExpandBufferSize;
+		pSiS->ColorExpandBufferScreenOffset[i] = UsableFbSize +
+		    i * pSiS->PerColorExpandBufferSize;
+	}
+	Avail.x1 = 0;
+	Avail.y1 = 0;
+	Avail.x2 = pScrn->displayWidth;
+	Avail.y2 = UsableFbSize
+	    / (pScrn->displayWidth * pScrn->bitsPerPixel/8) - 1;
+	if (Avail.y2 < 0)
+		Avail.y2 = 32767;
+	if (Avail.y2 < pScrn->currentMode->VDisplay) {
+		xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+			"Not enough video RAM for accelerator. At least "
+			"%dKB needed, %dKB available\n",
+			((((pScrn->displayWidth * pScrn->bitsPerPixel/8)   /* TW: +8 for make it sure */
+			     * pScrn->currentMode->VDisplay) + reservedFbSize) / 1024) + 8,
+			pSiS->maxxfbmem/1024);
+		pSiS->NoAccel = TRUE;
+		pSiS->NoXvideo = TRUE;
+		XAADestroyInfoRec(pSiS->AccelInfoPtr);
+		pSiS->AccelInfoPtr = NULL;
+		return FALSE;
+	}
+
+	xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+		   "Frame Buffer From (%d,%d) To (%d,%d)\n",
+		   Avail.x1, Avail.y1, Avail.x2, Avail.y2);
+	
+	xf86InitFBManager(pScreen, &Avail);
+
+	return(XAAInit(pScreen, infoPtr));
+}
+
+static void
+SiSSync(ScrnInfoPtr pScrn)
+{
+	SISPtr pSiS = SISPTR(pScrn);
+
+	PDEBUG(ErrorF("SiSSync()\n"));
+
+	pSiS->DoColorExpand = FALSE;
+	SiSIdle
+}
+
+#ifdef SISDUALHEAD
+static void
+SiSRestoreAccelState(ScrnInfoPtr pScrn)
+{
+	SISPtr pSiS = SISPTR(pScrn);
+
+	/* TW: We don't need to do anything special here */
+	pSiS->DoColorExpand = FALSE;
+	SiSIdle
+}
+#endif
+
+static const int sisALUConv[] =
+{
+    0x00,       /* dest = 0;            0,      GXclear,        0 */
+    0x88,       /* dest &= src;         DSa,    GXand,          0x1 */
+    0x44,       /* dest = src & ~dest;  SDna,   GXandReverse,   0x2 */
+    0xCC,       /* dest = src;          S,      GXcopy,         0x3 */
+    0x22,       /* dest &= ~src;        DSna,   GXandInverted,  0x4 */
+    0xAA,       /* dest = dest;         D,      GXnoop,         0x5 */
+    0x66,       /* dest = ^src;         DSx,    GXxor,          0x6 */
+    0xEE,       /* dest |= src;         DSo,    GXor,           0x7 */
+    0x11,       /* dest = ~src & ~dest; DSon,   GXnor,          0x8 */
+    0x99,       /* dest ^= ~src ;       DSxn,   GXequiv,        0x9 */
+    0x55,       /* dest = ~dest;        Dn,     GXInvert,       0xA */
+    0xDD,       /* dest = src|~dest ;   SDno,   GXorReverse,    0xB */
+    0x33,       /* dest = ~src;         Sn,     GXcopyInverted, 0xC */
+    0xBB,       /* dest |= ~src;        DSno,   GXorInverted,   0xD */
+    0x77,       /* dest = ~src|~dest;   DSan,   GXnand,         0xE */
+    0xFF,       /* dest = 0xFF;         1,      GXset,          0xF */
+};
+/* same ROP but with Pattern as Source */
+static const int sisPatALUConv[] =
+{
+    0x00,       /* dest = 0;            0,      GXclear,        0 */
+    0xA0,       /* dest &= src;         DPa,    GXand,          0x1 */
+    0x50,       /* dest = src & ~dest;  PDna,   GXandReverse,   0x2 */
+    0xF0,       /* dest = src;          P,      GXcopy,         0x3 */
+    0x0A,       /* dest &= ~src;        DPna,   GXandInverted,  0x4 */
+    0xAA,       /* dest = dest;         D,      GXnoop,         0x5 */
+    0x5A,       /* dest = ^src;         DPx,    GXxor,          0x6 */
+    0xFA,       /* dest |= src;         DPo,    GXor,           0x7 */
+    0x05,       /* dest = ~src & ~dest; DPon,   GXnor,          0x8 */
+    0xA5,       /* dest ^= ~src ;       DPxn,   GXequiv,        0x9 */
+    0x55,       /* dest = ~dest;        Dn,     GXInvert,       0xA */
+    0xF5,       /* dest = src|~dest ;   PDno,   GXorReverse,    0xB */
+    0x0F,       /* dest = ~src;         Pn,     GXcopyInverted, 0xC */
+    0xAF,       /* dest |= ~src;        DPno,   GXorInverted,   0xD */
+    0x5F,       /* dest = ~src|~dest;   DPan,   GXnand,         0xE */
+    0xFF,       /* dest = 0xFF;         1,      GXset,          0xF */
+};
+
+static void SiSSetupForScreenToScreenCopy(ScrnInfoPtr pScrn,
+                                int xdir, int ydir, int rop,
+                                unsigned int planemask, int trans_color)
+{
+	SISPtr  pSiS = SISPTR(pScrn);
+
+	PDEBUG(ErrorF("Setup ScreenCopy(%d, %d, 0x%x, 0x%x, 0x%x)\n",
+			xdir, ydir, rop, planemask, trans_color));
+
+	/* "AGP base" - color depth depending value (see sis_vga.c) */
+	SiSSetupDSTColorDepth(pSiS->DstColor);
+	/* SRC pitch */
+	SiSSetupSRCPitch(pSiS->scrnOffset)
+	/* DST pitch and height (-1 for disabling merge-clipping) */
+	SiSSetupDSTRect(pSiS->scrnOffset, -1)
+	/* Init CommandReg and set ROP */
+	if (trans_color != -1) {
+		SiSSetupROP(0x0A)
+		SiSSetupSRCTrans(trans_color)
+		SiSSetupCMDFlag(TRANSPARENT_BITBLT)
+	} else {
+	        SiSSetupROP(sisALUConv[rop])
+		/* Set command - not needed, both 0 */
+		/* SiSSetupCMDFlag(BITBLT | SRCVIDEO) */
+	}
+	/* Set some color depth depending value (see sis_vga.c) */
+	SiSSetupCMDFlag(pSiS->SiS310_AccelDepth)
+
+	/* TW: The 310/325 series is smart enough to know the direction */
+}
+
+static void SiSSubsequentScreenToScreenCopy(ScrnInfoPtr pScrn,
+                                int src_x, int src_y, int dst_x, int dst_y,
+                                int width, int height)
+{
+	SISPtr  pSiS = SISPTR(pScrn);
+	long srcbase, dstbase;
+
+	PDEBUG(ErrorF("Subsequent ScreenCopy(%d,%d, %d,%d, %d,%d)\n",
+			  src_x, src_y, dst_x, dst_y, width, height));
+
+	srcbase = dstbase = 0;
+	if (src_y >= 2048) {
+		srcbase = pSiS->scrnOffset * src_y;
+		src_y = 0;
+	}
+	if ((dst_y >= pScrn->virtualY) || (dst_y >= 2048)) {
+		dstbase = pSiS->scrnOffset*dst_y;
+		dst_y = 0;
+	}
+#ifdef SISDUALHEAD
+	srcbase += HEADOFFSET;
+	dstbase += HEADOFFSET;
+#endif
+	SiSSetupSRCBase(srcbase);
+	SiSSetupDSTBase(dstbase);
+	SiSSetupRect(width, height)
+	SiSSetupSRCXY(src_x, src_y)
+	SiSSetupDSTXY(dst_x, dst_y)
+	SiSDoCMD
+}
+
+static void
+SiSSetupForSolidFill(ScrnInfoPtr pScrn, int color,
+			int rop, unsigned int planemask)
+{
+	SISPtr  pSiS = SISPTR(pScrn);
+
+	PDEBUG(ErrorF("Setup SolidFill(0x%x, 0x%x, 0x%x)\n",
+					color, rop, planemask));
+
+	SiSSetupPATFG(color)
+	SiSSetupDSTRect(pSiS->scrnOffset, -1)
+	SiSSetupDSTColorDepth(pSiS->DstColor);
+	SiSSetupROP(sisPatALUConv[rop])
+	SiSSetupCMDFlag(PATFG | pSiS->SiS310_AccelDepth)
+}
+
+static void
+SiSSubsequentSolidFillRect(ScrnInfoPtr pScrn,
+                        int x, int y, int w, int h)
+{
+	SISPtr  pSiS = SISPTR(pScrn);
+	long dstbase;
+
+	PDEBUG(ErrorF("Subsequent SolidFillRect(%d, %d, %d, %d)\n",
+					x, y, w, h));
+	dstbase = 0;
+	if (y >= 2048) {
+		dstbase=pSiS->scrnOffset*y;
+		y = 0;
+	}
+#ifdef SISDUALHEAD
+	dstbase += HEADOFFSET;
+#endif
+	SiSSetupDSTBase(dstbase)
+	SiSSetupDSTXY(x,y)
+	SiSSetupRect(w,h)
+	pSiS->CommandReg &= ~(T_XISMAJORL | T_XISMAJORR |
+	                      T_L_X_INC | T_L_Y_INC |
+	                      T_R_X_INC | T_R_Y_INC |
+			      TRAPAZOID_FILL);
+	SiSSetupCMDFlag(BITBLT)
+	SiSDoCMD
+}
+
+/* TW: Trapezoid */
+/* This would work better if XAA would provide us with valid trapezoids.
+ * In fact, with small trapezoids the left and the right edge often cross
+ * each other which causes drawing errors (filling over whole scanline).
+ */
+#ifdef TRAP
+static void
+SiSSubsequentSolidFillTrap(ScrnInfoPtr pScrn, int y, int h,
+	       int left,  int dxL, int dyL, int eL,
+	       int right, int dxR, int dyR, int eR )
+{
+	SISPtr  pSiS = SISPTR(pScrn);
+	long dstbase;
+#if 0
+	float kL, kR;
+#endif
+
+	dstbase = 0;
+	if (y >= 2048) {
+		dstbase=pSiS->scrnOffset*y;
+		y = 0;
+	}
+#ifdef SISDUALHEAD
+	dstbase += HEADOFFSET;
+#endif
+	SiSSetupDSTBase(dstbase)
+
+#if 1
+	SiSSetupPATFG(0xff0000) /* FOR TESTING */
+#endif
+
+	/* Clear CommandReg because SetUp can be used for Rect and Trap */
+	pSiS->CommandReg &= ~(T_L_X_INC | T_L_Y_INC |
+	                      T_R_X_INC | T_R_Y_INC |
+	                      T_XISMAJORL | T_XISMAJORR |
+			      BITBLT);
+
+        xf86DrvMsg(0, X_INFO, "Trap (%d %d %d %d) dxL %d dyL %d eL %d   dxR %d dyR %d eR %d\n",
+		left, right, y, h, dxL, dyL, eL, dxR, dyR, eR);
+
+	/* Unfortunately, we must check if the right and the left edge
+	 * cross each other...  INCOMPLETE (equation wrong)
+	 */
+#if 0
+	if (dxL == 0) kL = 0;
+	else kL = (float)dyL / (float)dxL;
+	if (dxR == 0) kR = 0;
+	else kR = (float)dyR / (float)dxR;
+	xf86DrvMsg(0, X_INFO, "kL %f kR %f!\n", kL, kR);
+	if ( (kR != kL) &&
+	     (!(kR == 0 && kL == 0)) &&
+	     (!(kR <  0 && kL >  0)) ) {
+	   xf86DrvMsg(0, X_INFO, "Inside if (%f - %d)\n", ( kL * ( ( ((float)right - (float)left) / (kL - kR) ) - left) + y), h+y);
+           if ( ( ( kL * ( ( ((float)right - (float)left) / (kL - kR) ) - (float)left) + (float)y) < (h + y) ) ) {
+	     xf86DrvMsg(0, X_INFO, "Cross detected!\n");
+	   }
+	}
+#endif
+
+	/* Determine egde angles */
+	if (dxL < 0) { dxL = -dxL; }
+	else { SiSSetupCMDFlag(T_L_X_INC) }
+	if (dxR < 0) { dxR = -dxR; }
+	else { SiSSetupCMDFlag(T_R_X_INC) }
+
+	/* (Y direction always positive - do this anyway) */
+	if (dyL < 0) { dyL = -dyL; }
+	else { SiSSetupCMDFlag(T_L_Y_INC) }
+	if (dyR < 0) { dyR = -dyR; }
+	else { SiSSetupCMDFlag(T_R_Y_INC) }
+
+	/* Determine major axis */
+	if (dxL >= dyL) {      /* X is major axis */
+		SiSSetupCMDFlag(T_XISMAJORL)
+	}
+	if (dxR >= dyR) {      /* X is major axis */
+		SiSSetupCMDFlag(T_XISMAJORR)
+	}
+
+	/* Set up deltas */
+	SiSSetupdL(dxL, dyL)
+	SiSSetupdR(dxR, dyR)
+
+	/* Set up y, h, left, right */
+	SiSSetupYH(y,h)
+	SiSSetupLR(left,right)
+
+	/* Set up initial error term */
+	SiSSetupEL(eL)
+	SiSSetupER(eR)
+
+	SiSSetupCMDFlag(TRAPAZOID_FILL);
+
+	SiSDoCMD
+}
+#endif
+
+static void
+SiSSetupForSolidLine(ScrnInfoPtr pScrn, int color, int rop,
+                                     unsigned int planemask)
+{
+	SISPtr  pSiS = SISPTR(pScrn);
+
+	PDEBUG(ErrorF("Setup SolidLine(0x%x, 0x%x, 0x%x)\n",
+					color, rop, planemask));
+
+	SiSSetupLineCount(1)
+	SiSSetupPATFG(color)
+	SiSSetupDSTRect(pSiS->scrnOffset, -1)
+	SiSSetupDSTColorDepth(pSiS->DstColor);
+	SiSSetupROP(sisPatALUConv[rop])
+	SiSSetupCMDFlag(PATFG | LINE | pSiS->SiS310_AccelDepth)
+}
+
+static void
+SiSSubsequentSolidTwoPointLine(ScrnInfoPtr pScrn,
+                        int x1, int y1, int x2, int y2, int flags)
+{
+	SISPtr  pSiS = SISPTR(pScrn);
+	long dstbase,miny,maxy;
+
+	PDEBUG(ErrorF("Subsequent SolidLine(%d, %d, %d, %d, 0x%x)\n",
+					x1, y1, x2, y2, flags));
+
+	dstbase = 0;
+	miny = (y1 > y2) ? y2 : y1;
+	maxy = (y1 > y2) ? y1 : y2;
+	if (maxy >= 2048) {
+		dstbase = pSiS->scrnOffset*miny;
+		y1 -= miny;
+		y2 -= miny;
+	}
+#ifdef SISDUALHEAD
+	dstbase += HEADOFFSET;
+#endif
+	SiSSetupDSTBase(dstbase)
+
+	SiSSetupX0Y0(x1,y1)
+	SiSSetupX1Y1(x2,y2)
+	if (flags & OMIT_LAST) {
+		SiSSetupCMDFlag(NO_LAST_PIXEL)
+	} else {
+		pSiS->CommandReg &= ~(NO_LAST_PIXEL);
+	}
+	SiSDoCMD
+}
+
+static void
+SiSSubsequentSolidHorzVertLine(ScrnInfoPtr pScrn,
+                                int x, int y, int len, int dir)
+{
+	SISPtr  pSiS = SISPTR(pScrn);
+	long dstbase;
+
+	PDEBUG(ErrorF("Subsequent SolidHorzVertLine(%d, %d, %d, %d)\n",
+					x, y, len, dir));
+
+	len--; /* starting point is included! */
+	dstbase = 0;
+	if ((y >= 2048) || ((y + len) >= 2048)) {
+		dstbase = pSiS->scrnOffset * y;
+		y = 0;
+	}
+#ifdef SISDUALHEAD
+	dstbase += HEADOFFSET;
+#endif
+	SiSSetupDSTBase(dstbase)
+
+	SiSSetupX0Y0(x,y)
+	if (dir == DEGREES_0) {
+		SiSSetupX1Y1(x + len, y);
+	} else {
+		SiSSetupX1Y1(x, y + len);
+	}
+	SiSDoCMD
+}
+
+static void
+SiSSetupForDashedLine(ScrnInfoPtr pScrn,
+                                int fg, int bg, int rop, unsigned int planemask,
+                                int length, unsigned char *pattern)
+{
+	SISPtr pSiS = SISPTR(pScrn);
+
+	PDEBUG(ErrorF("Setup DashedLine(0x%x, 0x%x, 0x%x, 0x%x, %d, 0x%x:%x)\n",
+			fg, bg, rop, planemask, length, *(pattern+4), *pattern));
+
+	SiSSetupLineCount(1)
+	SiSSetupDSTRect(pSiS->scrnOffset, -1)
+	SiSSetupDSTColorDepth(pSiS->DstColor);
+	SiSSetupStyleLow(*pattern)
+	SiSSetupStyleHigh(*(pattern+4))
+	SiSSetupStylePeriod(length-1);			/* TW: This was missing!!! */
+	SiSSetupROP(sisPatALUConv[rop])
+	SiSSetupPATFG(fg)
+	SiSSetupCMDFlag(LINE | LINE_STYLE)  		/* TW: This was missing!!! */
+	if (bg != -1) {
+		SiSSetupPATBG(bg)
+	} else {
+		SiSSetupCMDFlag(TRANSPARENT)		/* TW: This was missing!!! */
+	}
+	SiSSetupCMDFlag(pSiS->SiS310_AccelDepth)
+}
+
+static void
+SiSSubsequentDashedTwoPointLine(ScrnInfoPtr pScrn,
+                                int x1, int y1, int x2, int y2,
+                                int flags, int phase)
+{
+	SISPtr pSiS = SISPTR(pScrn);
+	long dstbase,miny,maxy;
+
+	PDEBUG(ErrorF("Subsequent DashedLine(%d,%d, %d,%d, 0x%x,0x%x)\n",
+			x1, y1, x2, y2, flags, phase));
+
+	dstbase = 0;
+	miny=(y1 > y2) ? y2 : y1;
+	maxy=(y1 > y2) ? y1 : y2;
+	if (maxy >= 2048) {
+		dstbase = pSiS->scrnOffset * miny;
+		y1 -= miny;
+		y2 -= miny;
+	}
+#ifdef SISDUALHEAD
+	dstbase += HEADOFFSET;
+#endif
+	SiSSetupDSTBase(dstbase)
+
+	SiSSetupX0Y0(x1,y1)
+	SiSSetupX1Y1(x2,y2)
+	if (flags & OMIT_LAST) {
+		SiSSetupCMDFlag(NO_LAST_PIXEL)
+	} else {
+		pSiS->CommandReg &= ~(NO_LAST_PIXEL);
+	}
+	SiSDoCMD
+}
+
+static void
+SiSSetupForMonoPatternFill(ScrnInfoPtr pScrn,
+                                int patx, int paty, int fg, int bg,
+                                int rop, unsigned int planemask)
+{
+	SISPtr pSiS = SISPTR(pScrn);
+
+	PDEBUG(ErrorF("Setup MonoPatFill(0x%x,0x%x, 0x%x,0x%x, 0x%x, 0x%x)\n",
+					patx, paty, fg, bg, rop, planemask));
+	SiSSetupDSTRect(pSiS->scrnOffset, -1)
+	SiSSetupDSTColorDepth(pSiS->DstColor);
+	SiSSetupMONOPAT(patx,paty)
+	SiSSetupPATFG(fg)
+	SiSSetupROP(sisPatALUConv[rop])
+	SiSSetupCMDFlag(PATMONO | pSiS->SiS310_AccelDepth)
+	SiSSetupPATBG(bg)
+}
+
+static void
+SiSSubsequentMonoPatternFill(ScrnInfoPtr pScrn,
+                                int patx, int paty,
+                                int x, int y, int w, int h)
+{
+	SISPtr pSiS = SISPTR(pScrn);
+	long dstbase;
+
+	PDEBUG(ErrorF("Subsequent MonoPatFill(0x%x,0x%x, %d,%d, %d,%d)\n",
+							patx, paty, x, y, w, h));
+	dstbase = 0;
+	if (y >= 2048) {
+		dstbase = pSiS->scrnOffset * y;
+		y = 0;
+	}
+#ifdef SISDUALHEAD
+	dstbase += HEADOFFSET;
+#endif
+	SiSSetupDSTBase(dstbase)
+	SiSSetupDSTXY(x,y)
+	SiSSetupRect(w,h)
+	/* Clear commandReg because Setup can be used for Rect and Trap */
+	pSiS->CommandReg &= ~(T_XISMAJORL | T_XISMAJORR |
+	                      T_L_X_INC | T_L_Y_INC |
+	                      T_R_X_INC | T_R_Y_INC |
+	                      TRAPAZOID_FILL);
+	SiSDoCMD
+}
+
+/* TW: Trapezoid */
+#ifdef TRAP
+static void
+SiSSubsequentMonoPatternFillTrap(ScrnInfoPtr pScrn,
+               int patx, int paty,
+               int y, int h,
+	       int left, int dxL, int dyL, int eL,
+	       int right, int dxR, int dyR, int eR)
+{
+	SISPtr  pSiS = SISPTR(pScrn);
+	long dstbase;
+
+	PDEBUG(ErrorF("Subsequent Mono8x8PatternFillTrap(%d, %d, %d - %d %d/%d %d/%d)\n",
+					y, h, left, right, dxL, dxR, eL, eR));
+
+	dstbase = 0;
+	if (y >= 2048) {
+		dstbase=pSiS->scrnOffset*y;
+		y = 0;
+	}
+#ifdef SISDUALHEAD
+	dstbase += HEADOFFSET;
+#endif
+	SiSSetupDSTBase(dstbase)
+
+	/* Clear CommandReg because SetUp can be used for Rect and Trap */
+	pSiS->CommandReg &= ~(T_XISMAJORL | T_XISMAJORR |
+	                      T_L_X_INC | T_L_Y_INC |
+			      T_R_X_INC | T_R_Y_INC |
+			      BITBLT);
+
+	if (dxL < 0) { dxL = -dxL;  }
+	else { SiSSetupCMDFlag(T_L_X_INC) }
+	if (dxR < 0) { dxR = -dxR; }
+	else { SiSSetupCMDFlag(T_R_X_INC) }
+
+	if (dyL < 0) { dyL = -dyL; }
+	else { SiSSetupCMDFlag(T_L_Y_INC) }
+	if (dyR < 0) { dyR = -dyR; }
+	else { SiSSetupCMDFlag(T_R_Y_INC) }
+
+	/* Determine major axis */
+	if (dxL >= dyL) {      /* X is major axis */
+		SiSSetupCMDFlag(T_XISMAJORL)
+	}
+	if (dxR >= dyR) {      /* X is major axis */
+		SiSSetupCMDFlag(T_XISMAJORR)
+	}
+
+	SiSSetupYH(y,h)
+	SiSSetupLR(left,right)
+
+	SiSSetupdL(dxL, dyL)
+	SiSSetupdR(dxR, dyR)
+
+	SiSSetupEL(eL)
+	SiSSetupER(eR)
+
+	SiSSetupCMDFlag(TRAPAZOID_FILL);
+
+	SiSDoCMD
+}
+#endif
+
+/* ---- CPUToScreen Color Expand */
+
+#ifdef CTSCE
+/* We use the indirect method */
+static void
+SiSSetupForScanlineCPUToScreenColorExpandFill(ScrnInfoPtr pScrn,
+		int fg, int bg, int rop, unsigned int planemask)
+{
+	SISPtr pSiS=SISPTR(pScrn);
+
+	/* TW: FIXME: How do I check the "CPU driven blit stage" on the
+	 * 310/325 series?
+	 * That's the 300 series method but definitely wrong for
+	 * 310/325 series (bit 28 is already used for idle!)
+	 */
+	/* while ((MMIO_IN16(pSiS->IOBase, Q_STATUS+2) & 0x1F00) != 0) {} */
+
+	/* TW: Do Idle instead... */
+	SiSIdle
+
+	SiSSetupSRCXY(0,0);
+	SiSSetupROP(sisALUConv[rop]);
+	SiSSetupSRCFG(fg);
+	SiSSetupDSTRect(pSiS->scrnOffset, -1);
+	SiSSetupDSTColorDepth(pSiS->DstColor);
+	if (bg == -1) {
+		SiSSetupCMDFlag(TRANSPARENT | ENCOLOREXP | SRCCPUBLITBUF
+					| pSiS->SiS310_AccelDepth);
+	} else {
+		SiSSetupSRCBG(bg);
+		SiSSetupCMDFlag(ENCOLOREXP | SRCCPUBLITBUF
+					| pSiS->SiS310_AccelDepth);
+	};
+}
+
+static void
+SiSSubsequentScanlineCPUToScreenColorExpandFill(
+                        ScrnInfoPtr pScrn, int x, int y, int w,
+                        int h, int skipleft)
+{
+	SISPtr pSiS = SISPTR(pScrn);
+	int _x0, _y0, _x1, _y1;
+	long dstbase;
+
+	dstbase = 0;
+	if (y >= 2048) {
+		dstbase = pSiS->scrnOffset*y;
+		y = 0;
+	}
+#ifdef SISDUALHEAD
+	dstbase += HEADOFFSET;
+#endif
+
+        if((MMIO_IN16(pSiS->IOBase, Q_STATUS+2) & 0x8000) != 0x8000) {
+		SiSIdle;
+        }
+
+	SiSSetupDSTBase(dstbase)
+
+	if (skipleft > 0) {
+		_x0 = x+skipleft;
+		_y0 = y;
+		_x1 = x+w;
+		_y1 = y+h;
+		SiSSetupClipLT(_x0, _y0);
+		SiSSetupClipRB(_x1, _y1);
+		SiSSetupCMDFlag(CLIPENABLE);
+	} else {
+		pSiS->CommandReg &= (~CLIPENABLE);
+	}
+	SiSSetupRect(w, 1);
+	SiSSetupSRCPitch(((((w+7)/8)+3) >> 2) * 4);
+	pSiS->ycurrent = y;
+	pSiS->xcurrent = x;
+}
+
+static void
+SiSSubsequentColorExpandScanline(ScrnInfoPtr pScrn, int bufno)
+{
+	SISPtr pSiS=SISPTR(pScrn);
+	long cbo;
+
+	cbo = pSiS->ColorExpandBufferScreenOffset[bufno];
+#ifdef SISDUALHEAD
+	cbo += HEADOFFSET;
+#endif
+
+	if((MMIO_IN16(pSiS->IOBase, Q_STATUS+2) & 0x8000) != 0x8000) {
+		SiSIdle;
+        }
+
+	SiSSetupSRCBase(cbo);
+
+	SiSSetupDSTXY(pSiS->xcurrent, pSiS->ycurrent);
+
+	SiSDoCMD
+
+	pSiS->ycurrent++;
+
+	SiSIdle
+}
+#endif
+
+
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/sis/sis310_accel.h b/xc/programs/Xserver/hw/xfree86/drivers/sis/sis310_accel.h
new file mode 100644
index 000000000..9a6b20a82
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/sis/sis310_accel.h
@@ -0,0 +1,341 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/sis310_accel.h,v 1.2 2003/01/29 15:42:16 eich Exp $ */
+/*
+ * Copyright 2002 by Thomas Winischhofer, Vienna, Austria
+ *
+ * Permission to use, copy, modify, distribute, and sell this software and its
+ * documentation for any purpose is hereby granted without fee, provided that
+ * the above copyright notice appear in all copies and that both that
+ * copyright notice and this permission notice appear in supporting
+ * documentation, and that the name of Thomas Winischhofer not be used in
+ * advertising or publicity pertaining to distribution of the software without
+ * specific, written prior permission.  Thomas Winischhofer makes no representations
+ * about the suitability of this software for any purpose.  It is provided
+ * "as is" without express or implied warranty.
+ *
+ * THOMAS WINISCHHOFER DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+ * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+ * EVENT SHALL THOMAS WINISCHHOFER BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+ * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
+ * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ *
+ * Based on sis300_accel.h
+ *
+ * Author:  Thomas Winischhofer <thomas@winischhofer.net>
+ *
+ */
+
+/* Definitions for the SIS engine communication. */
+
+
+/* SiS310 engine commands */
+#define BITBLT                  0x00000000  /* Blit */
+#define COLOREXP                0x00000001  /* Color expand */
+#define ENCOLOREXP              0x00000002  /* Enhanced color expand */
+#define MULTIPLE_SCANLINE       0x00000003  /* ? */
+#define LINE                    0x00000004  /* Draw line */
+#define TRAPAZOID_FILL          0x00000005  /* Fill trapezoid */
+#define TRANSPARENT_BITBLT      0x00000006  /* Transparent Blit */
+#define ALPHA_BLEND		0x00000007  /* Alpha blend ? */
+#define A3D_FUNCTION		0x00000008  /* 3D command ? */
+#define	CLEAR_Z_BUFFER		0x00000009  /* ? */
+#define GRADIENT_FILL		0x0000000A  /* Gradient fill */
+#define STRETCH_BITBLT		0x0000000B  /* Stretched Blit */
+
+/* Command bits */
+
+/* Source selection */
+#define SRCVIDEO                0x00000000  /* source is video RAM */
+#define SRCSYSTEM               0x00000010  /* source is system memory */
+#define SRCCPUBLITBUF           SRCSYSTEM   /* source is CPU-driven BitBuffer (for color expand) */
+#define SRCAGP                  0x00000020  /* source is AGP memory (?) */
+
+/* Pattern source selection */
+#define PATFG                   0x00000000  /* foreground color */
+#define PATPATREG               0x00000040  /* pattern in pattern buffer (0x8300) */
+#define PATMONO                 0x00000080  /* mono pattern */
+
+/* Clipping flags */
+#define NOCLIP                  0x00000000
+#define NOMERGECLIP             0x04000000
+#define CLIPENABLE              0x00040000
+#define CLIPWITHOUTMERGE        0x04040000
+
+/* Transparency */
+#define OPAQUE                  0x00000000
+#define TRANSPARENT             0x00100000
+
+/* ? */
+#define DSTAGP                  0x02000000
+#define DSTVIDEO                0x02000000
+
+/* Subfunctions for Color/Enhanced Color Expansion */
+#define COLOR_TO_MONO		0x00100000
+#define AA_TEXT			0x00200000
+
+/* Line */
+#define LINE_STYLE              0x00800000
+#define NO_RESET_COUNTER        0x00400000
+#define NO_LAST_PIXEL           0x00200000
+
+/* Trapezoid */
+#define T_XISMAJORL             0x00800000  /* X axis is driving axis (left) */
+#define T_XISMAJORR             0x08000000  /* X axis is driving axis (right) */
+#define T_L_Y_INC               0x00000020  /* left edge direction Y */
+#define T_L_X_INC               0x00000010  /* left edge direction X */
+#define T_R_Y_INC               0x00400000  /* right edge direction Y */
+#define T_R_X_INC               0x00200000  /* right edge direction X */
+
+/* Some general registers */
+#define SRC_ADDR		0x8200
+#define SRC_PITCH		0x8204
+#define AGP_BASE		0x8206 /* color-depth dependent value */
+#define SRC_Y			0x8208
+#define SRC_X			0x820A
+#define DST_Y			0x820C
+#define DST_X			0x820E
+#define DST_ADDR		0x8210
+#define DST_PITCH		0x8214
+#define DST_HEIGHT		0x8216
+#define RECT_WIDTH		0x8218
+#define RECT_HEIGHT		0x821A
+#define PAT_FGCOLOR		0x821C
+#define PAT_BGCOLOR		0x8220
+#define SRC_FGCOLOR		0x8224
+#define SRC_BGCOLOR		0x8228
+#define MONO_MASK		0x822C
+#define LEFT_CLIP		0x8234
+#define TOP_CLIP		0x8236
+#define RIGHT_CLIP		0x8238
+#define BOTTOM_CLIP		0x823A
+#define COMMAND_READY		0x823C
+#define FIRE_TRIGGER      	0x8240
+
+#define PATTERN_REG		0x8300  /* 384 bytes pattern buffer */
+
+/* Line registers */
+#define LINE_X0			SRC_Y
+#define LINE_X1			DST_Y
+#define LINE_Y0			SRC_X
+#define LINE_Y1			DST_X
+#define LINE_COUNT		RECT_WIDTH
+#define LINE_STYLE_PERIOD	RECT_HEIGHT
+#define LINE_STYLE_0		MONO_MASK
+#define LINE_STYLE_1		0x8230
+#define LINE_XN			PATTERN_REG
+#define LINE_YN			PATTERN_REG+2
+
+/* Transparent bitblit registers */
+#define TRANS_DST_KEY_HIGH	PAT_FGCOLOR
+#define TRANS_DST_KEY_LOW	PAT_BGCOLOR
+#define TRANS_SRC_KEY_HIGH	SRC_FGCOLOR
+#define TRANS_SRC_KEY_LOW	SRC_BGCOLOR
+
+/* Trapezoid registers */
+#define TRAP_YH                 SRC_Y    /* 0x8208 */
+#define TRAP_LR                 DST_Y    /* 0x820C */
+#define TRAP_DL                 0x8244
+#define TRAP_DR                 0x8248
+#define TRAP_EL                 0x824C
+#define TRAP_ER                 0x8250
+
+/* Queue */
+#define Q_BASE_ADDR		0x85C0  /* Base address of software queue (?) */
+#define Q_WRITE_PTR		0x85C4  /* Current write pointer (?) */
+#define Q_READ_PTR		0x85C8  /* Current read pointer (?) */
+#define Q_STATUS		0x85CC  /* queue status */
+
+/* Macros to do useful things with the SIS 310 BitBLT engine */
+
+/* Q_STATUS:
+   bit 31 = 1: All engines idle and all queues empty
+   bit 30 = 1: Hardware Queue (=HW CQ, 2D queue, 3D queue) empty
+   bit 29 = 1: 2D engine is idle
+   bit 28 = 1: 3D engine is idle
+   bit 27 = 1: HW command queue empty
+   bit 26 = 1: 2D queue empty
+   bit 25 = 1: 3D queue empty
+   bit 24 = 1: SW command queue empty
+   bits 23:16: 2D counter 3
+   bits 15:8:  2D counter 2
+   bits 7:0:   2D counter 1
+
+   Where is the command queue length (current amount of commands the queue
+   can accept) on the 310 series? (The current implementation is taken
+   from 300 series and certainly wrong...)
+*/
+
+int     CmdQueLen;
+
+/* TW: FIXME: CmdQueLen is... where....? */
+#define SiSIdle \
+  { \
+  while( (MMIO_IN16(pSiS->IOBase, Q_STATUS+2) & 0x8000) != 0x8000){}; \
+  while( (MMIO_IN16(pSiS->IOBase, Q_STATUS+2) & 0x8000) != 0x8000){}; \
+  CmdQueLen=MMIO_IN16(pSiS->IOBase, Q_STATUS); \
+  }
+  /* TW: (do twice like on 300 series?) */
+
+#define SiSSetupSRCBase(base) \
+      if (CmdQueLen <= 0)  SiSIdle;\
+      MMIO_OUT32(pSiS->IOBase, SRC_ADDR, base);\
+      CmdQueLen--;
+
+#define SiSSetupSRCPitch(pitch) \
+      if (CmdQueLen <= 0)  SiSIdle;\
+      MMIO_OUT16(pSiS->IOBase, SRC_PITCH, pitch);\
+      CmdQueLen--;
+
+#define SiSSetupSRCXY(x,y) \
+      if (CmdQueLen <= 0)  SiSIdle;\
+      MMIO_OUT32(pSiS->IOBase, SRC_Y, (x)<<16 | (y) );\
+      CmdQueLen--;
+
+#define SiSSetupDSTBase(base) \
+      if (CmdQueLen <= 0)  SiSIdle;\
+      MMIO_OUT32(pSiS->IOBase, DST_ADDR, base);\
+      CmdQueLen--;
+
+#define SiSSetupDSTXY(x,y) \
+      if (CmdQueLen <= 0)  SiSIdle;\
+      MMIO_OUT32(pSiS->IOBase, DST_Y, (x)<<16 | (y) );\
+      CmdQueLen--;
+
+#define SiSSetupDSTRect(x,y) \
+      if (CmdQueLen <= 0)  SiSIdle;\
+      MMIO_OUT32(pSiS->IOBase, DST_PITCH, (y)<<16 | (x) );\
+      CmdQueLen--;
+
+#define SiSSetupDSTColorDepth(bpp) \
+      if (CmdQueLen <= 0)  SiSIdle;\
+      MMIO_OUT16(pSiS->IOBase, AGP_BASE, bpp);\
+      CmdQueLen--;
+
+#define SiSSetupRect(w,h) \
+      if (CmdQueLen <= 0)  SiSIdle;\
+      MMIO_OUT32(pSiS->IOBase, RECT_WIDTH, (h)<<16 | (w) );\
+      CmdQueLen--;
+
+#define SiSSetupPATFG(color) \
+      if (CmdQueLen <= 0)  SiSIdle;\
+      MMIO_OUT32(pSiS->IOBase, PAT_FGCOLOR, color);\
+      CmdQueLen--;
+
+#define SiSSetupPATBG(color) \
+      if (CmdQueLen <= 0)  SiSIdle;\
+      MMIO_OUT32(pSiS->IOBase, PAT_BGCOLOR, color);\
+      CmdQueLen--;
+
+#define SiSSetupSRCFG(color) \
+      if (CmdQueLen <= 0)  SiSIdle;\
+      MMIO_OUT32(pSiS->IOBase, SRC_FGCOLOR, color);\
+      CmdQueLen--;
+
+#define SiSSetupSRCBG(color) \
+      if (CmdQueLen <= 0)  SiSIdle;\
+      MMIO_OUT32(pSiS->IOBase, SRC_BGCOLOR, color);\
+      CmdQueLen--;
+
+#define SiSSetupSRCTrans(color) \
+      if (CmdQueLen <= 1)  SiSIdle;\
+      MMIO_OUT32(pSiS->IOBase, TRANS_SRC_KEY_HIGH, color);\
+      MMIO_OUT32(pSiS->IOBase, TRANS_SRC_KEY_LOW, color);\
+      CmdQueLen -= 2;
+
+#define SiSSetupDSTTrans(color) \
+      if (CmdQueLen <= 1)  SiSIdle;\
+      MMIO_OUT32(pSiS->IOBase, TRANS_DST_KEY_HIGH, color); \
+      MMIO_OUT32(pSiS->IOBase, TRANS_DST_KEY_LOW, color); \
+      CmdQueLen -= 2;
+
+#define SiSSetupMONOPAT(p0,p1) \
+      if (CmdQueLen <= 1)  SiSIdle;\
+      MMIO_OUT32(pSiS->IOBase, MONO_MASK, p0);\
+      MMIO_OUT32(pSiS->IOBase, MONO_MASK+4, p1);\
+      CmdQueLen=CmdQueLen-2;
+
+#define SiSSetupClipLT(left,top) \
+      if (CmdQueLen <= 0)  SiSIdle;\
+      MMIO_OUT32(pSiS->IOBase, LEFT_CLIP, ((left) & 0xFFFF) | (top)<<16 );\
+      CmdQueLen--;
+
+#define SiSSetupClipRB(right,bottom) \
+      if (CmdQueLen <= 0)  SiSIdle;\
+      MMIO_OUT32(pSiS->IOBase, RIGHT_CLIP, ((right) & 0xFFFF) | (bottom)<<16 );\
+      CmdQueLen--;
+
+#define SiSSetupROP(rop) \
+      pSiS->CommandReg = (rop) << 8;
+
+#define SiSSetupCMDFlag(flags) \
+      pSiS->CommandReg |= (flags);
+
+#define SiSDoCMD \
+      if (CmdQueLen <= 1)  SiSIdle;\
+      MMIO_OUT32(pSiS->IOBase, COMMAND_READY, pSiS->CommandReg); \
+      MMIO_OUT32(pSiS->IOBase, FIRE_TRIGGER, 0); \
+      CmdQueLen=CmdQueLen-2;
+
+#define SiSSetupX0Y0(x,y) \
+      if (CmdQueLen <= 0)  SiSIdle;\
+      MMIO_OUT32(pSiS->IOBase, LINE_X0, (y)<<16 | (x) );\
+      CmdQueLen--;
+
+#define SiSSetupX1Y1(x,y) \
+      if (CmdQueLen <= 0)  SiSIdle;\
+      MMIO_OUT32(pSiS->IOBase, LINE_X1, (y)<<16 | (x) );\
+      CmdQueLen--;
+
+#define SiSSetupLineCount(c) \
+      if (CmdQueLen <= 0)  SiSIdle;\
+      MMIO_OUT16(pSiS->IOBase, LINE_COUNT, c);\
+      CmdQueLen--;
+
+#define SiSSetupStylePeriod(p) \
+      if (CmdQueLen <= 0)  SiSIdle;\
+      MMIO_OUT16(pSiS->IOBase, LINE_STYLE_PERIOD, p);\
+      CmdQueLen--;
+
+#define SiSSetupStyleLow(ls) \
+      if (CmdQueLen <= 0)  SiSIdle;\
+      MMIO_OUT32(pSiS->IOBase, LINE_STYLE_0, ls);\
+      CmdQueLen--;
+
+#define SiSSetupStyleHigh(ls) \
+      if (CmdQueLen <= 0)  SiSIdle;\
+      MMIO_OUT32(pSiS->IOBase, LINE_STYLE_1, ls);\
+      CmdQueLen--;
+
+/* Trapezoid */
+#define SiSSetupYH(y,h) \
+      if (CmdQueLen <= 0)  SiSIdle;\
+      MMIO_OUT32(pSiS->IOBase, TRAP_YH, (y)<<16 | (h) );\
+      CmdQueLen --;
+
+#define SiSSetupLR(left,right) \
+      if (CmdQueLen <= 0)  SiSIdle;\
+      MMIO_OUT32(pSiS->IOBase, TRAP_LR, (right)<<16 | (left) );\
+      CmdQueLen --;
+
+#define SiSSetupdL(dxL,dyL) \
+      if (CmdQueLen <= 0)  SiSIdle;\
+      MMIO_OUT32(pSiS->IOBase, TRAP_DL, (dyL)<<16 | (dxL) );\
+      CmdQueLen --;
+
+#define SiSSetupdR(dxR,dyR) \
+      if (CmdQueLen <= 0)  SiSIdle;\
+      MMIO_OUT32(pSiS->IOBase, TRAP_DR, (dyR)<<16 | (dxR) );\
+      CmdQueLen --;
+
+#define SiSSetupEL(eL) \
+      if (CmdQueLen <= 0)  SiSIdle;\
+      MMIO_OUT32(pSiS->IOBase, TRAP_EL, eL);\
+      CmdQueLen --;
+
+#define SiSSetupER(eR) \
+      if (CmdQueLen <= 0)  SiSIdle;\
+      MMIO_OUT32(pSiS->IOBase, TRAP_ER, eR);\
+      CmdQueLen --;
+
+
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/sis/sis6326_video.c b/xc/programs/Xserver/hw/xfree86/drivers/sis/sis6326_video.c
new file mode 100644
index 000000000..f47475526
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/sis/sis6326_video.c
@@ -0,0 +1,1662 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/sis6326_video.c,v 1.2 2003/01/29 15:42:16 eich Exp $ */
+/*
+ * Xv driver for SiS 5597/5598, 6236 and 530/620.
+ *
+ * Copyright 2002 by Thomas Winischhofer, Vienna, Austria.
+ *
+ * Based on sis_video.c which is
+ *    Copyright 2000 Silicon Integrated Systems Corp, Inc., HsinChu, Taiwan.
+ *    Parts Copyright 2002 by Thomas Winischhofer, Vienna, Austria.
+ *    All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL INTEL, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR
+ * THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Author:
+ *      Thomas Winischhofer <thomas@winischhofer.net>
+ */
+
+#include "sis.h"
+#ifdef USE6326VIDEO
+
+#include "xf86.h"
+#include "xf86_OSproc.h"
+#include "xf86Resources.h"
+#include "xf86_ansic.h"
+#include "compiler.h"
+#include "xf86PciInfo.h"
+#include "xf86Pci.h"
+#include "xf86fbman.h"
+#include "regionstr.h"
+
+#include "xf86xv.h"
+#include "Xv.h"
+#include "xaa.h"
+#include "xaalocal.h"
+#include "dixstruct.h"
+#include "fourcc.h"
+
+#include "sis_regs.h"
+
+#define OFF_DELAY   	200  /* milliseconds */
+#define FREE_DELAY  	60000
+
+#define OFF_TIMER   	0x01
+#define FREE_TIMER  	0x02
+#define CLIENT_VIDEO_ON 0x04
+
+#define TIMER_MASK      (OFF_TIMER | FREE_TIMER)
+
+#define WATCHDOG_DELAY  500000 /* Watchdog counter for Vertical Restrace waiting */
+
+static 		XF86VideoAdaptorPtr SIS6326SetupImageVideo(ScreenPtr);
+static void 	SIS6326StopVideo(ScrnInfoPtr, pointer, Bool);
+static int 	SIS6326SetPortAttribute(ScrnInfoPtr, Atom, INT32, pointer);
+static int 	SIS6326GetPortAttribute(ScrnInfoPtr, Atom ,INT32 *, pointer);
+static void 	SIS6326QueryBestSize(ScrnInfoPtr, Bool, short, short, short,
+			short, unsigned int *,unsigned int *, pointer);
+static int 	SIS6326PutImage( ScrnInfoPtr,
+    			short, short, short, short, short, short, short, short,
+    			int, unsigned char*, short, short, Bool, RegionPtr, pointer);
+static int 	SIS6326QueryImageAttributes(ScrnInfoPtr,
+    			int, unsigned short *, unsigned short *, int *, int *);
+static void 	SIS6326VideoTimerCallback(ScrnInfoPtr pScrn, Time now);
+static void     SIS6326InitOffscreenImages(ScreenPtr pScrn);
+
+#define MAKE_ATOM(a) MakeAtom(a, sizeof(a) - 1, TRUE)
+
+static Atom xvBrightness, xvContrast, xvColorKey;
+static Atom xvAutopaintColorKey, xvSetDefaults;
+
+#define IMAGE_MIN_WIDTH        32  /* Minimum and maximum image sizes */
+#define IMAGE_MIN_HEIGHT       24
+#define IMAGE_MAX_WIDTH       720  /* Are these correct for the chips ? */
+#define IMAGE_MAX_HEIGHT      576
+#define IMAGE_MAX_WIDTH_5597  384  
+#define IMAGE_MAX_HEIGHT_5597 288
+
+#if 0
+static int oldH, oldW;
+#endif
+
+/****************************************************************************
+ * Raw register access : These routines directly interact with the sis's
+ *                       control aperature.  Must not be called until after
+ *                       the board's pci memory has been mapped.
+ ****************************************************************************/
+
+#if 0
+static CARD32 _sisread(SISPtr pSiS, CARD32 reg)
+{
+    return *(pSiS->IOBase + reg);
+}
+
+static void _siswrite(SISPtr pSiS, CARD32 reg, CARD32 data)
+{
+    *(pSiS->IOBase + reg) = data;
+}
+#endif
+
+static CARD8 getvideoreg(SISPtr pSiS, CARD8 reg)
+{
+    CARD8 ret;
+    inSISIDXREG(SISCR, reg, ret);
+    return(ret);
+}
+
+static void setvideoreg(SISPtr pSiS, CARD8 reg, CARD8 data)
+{
+    outSISIDXREG(SISCR, reg, data);
+}
+
+static void setvideoregmask(SISPtr pSiS, CARD8 reg, CARD8 data, CARD8 mask)
+{
+    CARD8   old;
+
+    inSISIDXREG(SISCR, reg, old);
+    data = (data & mask) | (old & (~mask));
+    outSISIDXREG(SISCR, reg, data);
+}
+
+/* VBlank */
+static CARD8 vblank_active_CRT1(SISPtr pSiS)
+{
+    return (inSISREG(SISINPSTAT) & 0x08);
+}
+
+/* Scanline - unused */
+#if 0
+static CARD32 get_scanline_CRT1(SISPtr pSiS)
+{
+    CARD8 temp;
+
+    temp = getvideoreg(pSiS, 0x20);
+    temp = getvideoreg(pSiS, 0x1b);
+    return((getvideoreg(pSiS, 0x1d) << 8) | getvideoreg(pSiS, 0x1c));
+}
+#endif
+
+void SIS6326InitVideo(ScreenPtr pScreen)
+{
+    ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
+    XF86VideoAdaptorPtr *adaptors, *newAdaptors = NULL;
+    XF86VideoAdaptorPtr newAdaptor = NULL;
+    int num_adaptors;
+
+    newAdaptor = SIS6326SetupImageVideo(pScreen);
+    if(newAdaptor)
+        SIS6326InitOffscreenImages(pScreen);
+
+    num_adaptors = xf86XVListGenericAdaptors(pScrn, &adaptors);
+
+    if(newAdaptor) {
+    	if(!num_adaptors) {
+        	num_adaptors = 1;
+        	adaptors = &newAdaptor;
+    	} else {
+        	/* need to free this someplace */
+        	newAdaptors = xalloc((num_adaptors + 1) * sizeof(XF86VideoAdaptorPtr*));
+        	if(newAdaptors) {
+        		memcpy(newAdaptors, adaptors, num_adaptors *
+                    		sizeof(XF86VideoAdaptorPtr));
+        		newAdaptors[num_adaptors] = newAdaptor;
+        		adaptors = newAdaptors;
+        		num_adaptors++;
+        	}
+    	}
+    }
+
+    if(num_adaptors)
+        xf86XVScreenInit(pScreen, adaptors, num_adaptors);
+
+    if(newAdaptors)
+    	xfree(newAdaptors);
+#if 0
+    oldW = 0; oldH = 0;  /* DEBUG */
+#endif
+}
+
+/* client libraries expect an encoding */
+static XF86VideoEncodingRec DummyEncoding =
+{
+   0,
+   "XV_IMAGE",
+   IMAGE_MAX_WIDTH, IMAGE_MAX_HEIGHT,
+   {1, 1}
+};
+
+static XF86VideoEncodingRec DummyEncoding5597 =
+{
+   0,
+   "XV_IMAGE",
+   IMAGE_MAX_WIDTH_5597, IMAGE_MAX_HEIGHT_5597,
+   {1, 1}
+};
+
+#define NUM_FORMATS 4
+
+static XF86VideoFormatRec SIS6326Formats[NUM_FORMATS] =
+{
+   { 8, PseudoColor},
+   {15, TrueColor},
+   {16, TrueColor},
+   {24, TrueColor}
+};
+
+#define NUM_ATTRIBUTES 5
+
+static XF86AttributeRec SIS6326Attributes[NUM_ATTRIBUTES] =
+{
+   {XvSettable | XvGettable, 0, (1 << 24) - 1, "XV_COLORKEY"},
+   {XvSettable | XvGettable, -128, 127,        "XV_BRIGHTNESS"},
+   {XvSettable | XvGettable, 0, 7,             "XV_CONTRAST"},
+   {XvSettable | XvGettable, 0, 1,             "XV_AUTOPAINT_COLORKEY"},
+   {XvSettable             , 0, 0,             "XV_SET_DEFAULTS"}
+};
+
+#define NUM_IMAGES 6
+#define NUM_IMAGES_NOYV12 4
+#define PIXEL_FMT_YV12 FOURCC_YV12  /* 0x32315659 */
+#define PIXEL_FMT_UYVY FOURCC_UYVY  /* 0x59565955 */
+#define PIXEL_FMT_YUY2 FOURCC_YUY2  /* 0x32595559 */
+#define PIXEL_FMT_I420 FOURCC_I420  /* 0x30323449 */
+#define PIXEL_FMT_RGB5 0x35315652
+#define PIXEL_FMT_RGB6 0x36315652
+
+static XF86ImageRec SIS6326Images[NUM_IMAGES] =
+{
+    XVIMAGE_YUY2, /* TW: If order is changed, SIS6326OffscreenImages must be adapted */
+    XVIMAGE_UYVY,
+    XVIMAGE_YV12,
+    XVIMAGE_I420,
+    {
+      0x35315652,
+      XvRGB,
+      LSBFirst,
+      {'R','V','1','5',
+       0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},
+      16,
+      XvPacked,
+      1,
+/*    15, 0x001F, 0x03E0, 0x7C00,  - incorrect! */
+      15, 0x7C00, 0x03E0, 0x001F,  
+      0, 0, 0,
+      0, 0, 0,
+      0, 0, 0,
+      {'R', 'V', 'B',0,
+       0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0},
+      XvTopToBottom
+    },
+    {
+      0x36315652,
+      XvRGB,
+      LSBFirst,
+      {'R','V','1','6',
+       0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},
+      16,
+      XvPacked,
+      1,
+/*    16, 0x001F, 0x07E0, 0xF800,  - incorrect!  */
+      16, 0xF800, 0x07E0, 0x001F, 
+      0, 0, 0,
+      0, 0, 0,
+      0, 0, 0,
+      {'R', 'V', 'B',0,
+       0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0},
+      XvTopToBottom
+    }
+};
+
+static XF86ImageRec SIS6326ImagesNoYV12[NUM_IMAGES_NOYV12] =
+{
+    XVIMAGE_YUY2, /* TW: If order is changed, SIS6326OffscreenImages must be adapted */
+    XVIMAGE_UYVY,
+    {
+      0x35315652,
+      XvRGB,
+      LSBFirst,
+      {'R','V','1','5',
+       0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},
+      16,
+      XvPacked,
+      1,
+/*    15, 0x001F, 0x03E0, 0x7C00,  */
+      15, 0x7C00, 0x03E0, 0x001F,  /* TW: Should be more correct than the other... */
+      0, 0, 0,
+      0, 0, 0,
+      0, 0, 0,
+      {'R', 'V', 'B',0,
+       0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0},
+      XvTopToBottom
+    },
+    {
+      0x36315652,
+      XvRGB,
+      LSBFirst,
+      {'R','V','1','6',
+       0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},
+      16,
+      XvPacked,
+      1,
+/*    16, 0x001F, 0x07E0, 0xF800,   */
+      16, 0xF800, 0x07E0, 0x001F,   /* TW: Should be more correct than the other... */
+      0, 0, 0,
+      0, 0, 0,
+      0, 0, 0,
+      {'R', 'V', 'B',0,
+       0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0},
+      XvTopToBottom
+    }
+};
+
+typedef struct {
+    int pixelFormat;
+
+    CARD16  pitch;
+
+    CARD8   keyOP;
+
+    CARD8   HUSF;
+    CARD8   VUSF;
+    CARD8   HIntBit;
+    CARD8   wHPre;
+    CARD8   PitchMult;
+
+    CARD16  srcW;
+    CARD16  srcH;
+
+    BoxRec  dstBox;
+
+    CARD32  PSY;
+    CARD32  PSV;
+    CARD32  PSU;
+    CARD8   YUVEnd;
+
+    CARD8   lineBufSize;
+
+    CARD8   (*VBlankActiveFunc)(SISPtr);
+/*  CARD32  (*GetScanLineFunc)(SISPtr pSiS); */
+
+} SISOverlayRec, *SISOverlayPtr;
+
+typedef struct {
+    FBLinearPtr  linear;	/* TW: We now use Linear, not Area */
+    CARD32       bufAddr[2];
+
+    unsigned char currentBuf;
+
+    short  drw_x, drw_y, drw_w, drw_h;
+    short  src_x, src_y, src_w, src_h;
+    int    id;
+    short  srcPitch, height, width;
+    CARD32 totalSize;
+    
+    char          brightness;
+    unsigned char contrast;
+
+    RegionRec    clip;
+    CARD32       colorKey;
+    Bool 	 autopaintColorKey;
+
+    CARD32       videoStatus;
+    Time         offTime;
+    Time         freeTime;
+
+    short        oldx1, oldx2, oldy1, oldy2;
+    int          mustwait;
+
+    Bool         grabbedByV4L;	   /* V4L stuff */
+    int          pitch;
+    int          offset;
+
+} SISPortPrivRec, *SISPortPrivPtr;        
+
+#define GET_PORT_PRIVATE(pScrn) \
+   (SISPortPrivPtr)((SISPTR(pScrn))->adaptor->pPortPrivates[0].ptr)
+
+static void
+SIS6326SetPortDefaults (ScrnInfoPtr pScrn, SISPortPrivPtr pPriv)
+{
+    pPriv->colorKey    = 0x000101fe;
+    pPriv->videoStatus = 0;
+    pPriv->brightness  = 0;
+    pPriv->contrast    = 4;
+    pPriv->autopaintColorKey = TRUE;
+}
+
+static void
+SIS6326ResetVideo(ScrnInfoPtr pScrn)
+{
+    SISPtr pSiS = SISPTR(pScrn);
+
+    /* Unlock registers */
+#ifdef UNLOCK_ALWAYS
+    sisSaveUnlockExtRegisterLock(pSiS, NULL, NULL);
+#endif
+    if(getvideoreg (pSiS, Index_VI6326_Passwd) != 0xa1) {
+        setvideoreg (pSiS, Index_VI6326_Passwd, 0x86);
+        if(getvideoreg (pSiS, Index_VI6326_Passwd) != 0xa1)
+            xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+                       "Xv: Video password could not unlock video registers\n");
+    }
+
+    /* Initialize the overlay ----------------------------------- */
+
+    switch(pSiS->Chipset) {
+    case PCI_CHIP_SIS6326:
+       /* Disable overlay (D[1]) & capture (D[0]) */
+       setvideoregmask(pSiS, Index_VI6326_Control_Misc0,      0x00, 0x03);
+
+       /* What do these do? (Datasheet names these bits "reserved") */
+       setvideoregmask(pSiS, Index_VI6326_Control_Misc0,      0x00, 0x18);
+       setvideoregmask(pSiS, Index_VI6326_Control_Misc0,      0x00, 0x0c);
+
+       /* Select YUV format (D[6]) and "gfx + video" mode (D[4]), odd polarity? (D[7]) */
+       setvideoregmask(pSiS, Index_VI6326_Control_Misc0,      0x40, 0xD0);
+       /* No interrupt, no filter, disable dithering */
+       setvideoregmask(pSiS, Index_VI6326_Control_Misc1,      0x00, 0x7A);
+       /* Disable VMI (D[4:3]), Brooktree support (D[6]) and system memory framebuffer (D[7]) */
+       setvideoregmask(pSiS, Index_VI6326_Control_Misc3,      0x00, 0xF8);
+       /* Disable video decimation */
+       setvideoregmask(pSiS, Index_VI6326_Control_Misc6,      0x00, 0x80);
+       break;
+    case PCI_CHIP_SIS5597:
+       /* Disable overlay (D[1]) & capture (D[0]) */
+       setvideoregmask(pSiS, Index_VI6326_Control_Misc0,      0x00, 0x03);
+
+       /* What do these do? (Datasheet names these bits "reserved") */
+       setvideoregmask(pSiS, Index_VI6326_Control_Misc0,      0x00, 0x18);
+       setvideoregmask(pSiS, Index_VI6326_Control_Misc0,      0x00, 0x0c);
+
+       /* Select YUV format (D[6]) and "gfx + video" mode (D[4]), odd polarity? (D[7]) */
+       setvideoregmask(pSiS, Index_VI6326_Control_Misc0,      0x40, 0xD0);
+       /* No interrupt, no filter, disable dithering */
+       setvideoregmask(pSiS, Index_VI6326_Control_Misc1,      0x00, 0x7A);
+       /* Disable Brooktree support (D[6]) and system memory framebuffer (D[7]) */
+       setvideoregmask(pSiS, Index_VI6326_Control_Misc3,      0x00, 0xC0);
+       /* Disable video decimation (has a really strange effect if enabled) */
+       setvideoregmask(pSiS, Index_VI6326_Control_Misc6,      0x00, 0x80);
+       break;
+    case PCI_CHIP_SIS530:
+       /* What is this? (Bit is "reserved") */
+       setvideoregmask (pSiS, Index_VI6326_Control_Misc4,     0x40, 0x40);
+       /* Disable overlay (D[1]) */
+       setvideoregmask(pSiS, Index_VI6326_Control_Misc0,      0x00, 0x02);
+
+       /* What do these do? (Datasheet names these bits "reserved") */
+       setvideoregmask(pSiS, Index_VI6326_Control_Misc0,      0x00, 0x18);
+       setvideoregmask(pSiS, Index_VI6326_Control_Misc0,      0x00, 0x0c);
+
+       /* Select YUV format (D[6]) and "gfx + video" mode (D[4]) */
+       setvideoregmask(pSiS, Index_VI6326_Control_Misc0,      0x40, 0x50);
+       break;
+    default:
+    	xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+		"Internal error: SiS6326ResetVideo() called with invalid chipset (%x)\n",
+		pSiS->Chipset);
+        return;
+    }
+
+    /* Clear format selection */
+    setvideoregmask(pSiS, Index_VI6326_Control_Misc1,         0x00, 0x04);
+    setvideoregmask(pSiS, Index_VI6326_Control_Misc4,         0x00, 0x07);
+
+    /* Select RGB Chromakey format (D[2]=0), CCIR 601 UV data format (D[1]=0) */
+    /* D[1]: 1 = 2's complement, 0 = CCIR 601 format */
+    setvideoregmask(pSiS, Index_VI6326_Control_Misc3,         0x00, 0x06);
+
+    /* Reset contrast control */
+    setvideoregmask(pSiS, Index_VI6326_Contrast_Enh_Ctrl,     0x04, 0x1F);
+
+    /* Set treshold */
+    if(pSiS->oldChipset < OC_SIS6326) {
+       CARD8 temp;
+       inSISIDXREG(SISSR, 0x33, temp);  /* Synchronous DRAM Timing? */
+       if(temp & 0x01) temp = 0x50;
+       else            temp = 0;
+       setvideoreg(pSiS, Index_VI6326_Play_Threshold_Low,     temp);
+       setvideoreg(pSiS, Index_VI6326_Play_Threshold_High,    temp);
+    } else {
+       CARD8 temp;
+       setvideoreg(pSiS, Index_VI6326_Play_Threshold_Low,     0x00);
+       setvideoreg(pSiS, Index_VI6326_Play_Threshold_High,    0x00);
+       inSISIDXREG(SISSR, 0x33, temp);  /* Are we using SGRAM Timing? */
+       if(temp & 0x01) temp = 0x10;
+       else            temp = 0;
+       setvideoregmask(pSiS, Index_VI6326_Control_Misc4,      temp, 0x10);
+    }
+
+    /* set default properties for overlay     ------------------------------- */
+
+    setvideoregmask (pSiS, Index_VI6326_Contrast_Enh_Ctrl,    0x04, 0x07);
+    setvideoreg (pSiS, Index_VI6326_Brightness,               0x20);
+
+    if(pSiS->oldChipset < OC_SIS6205A || pSiS->oldChipset > OC_SIS82204) {
+       setvideoregmask(pSiS, Index_VI6326_AlphaGraph,         0x00, 0xF8);
+       setvideoregmask(pSiS, Index_VI6326_AlphaVideo,         0xF8, 0xF8);
+    } else {
+       setvideoregmask(pSiS, Index_VI6326_AlphaGraph,         0x00, 0xE1);
+       setvideoregmask(pSiS, Index_VI6326_AlphaVideo,         0xE1, 0xE1);
+    }
+}
+
+static XF86VideoAdaptorPtr
+SIS6326SetupImageVideo(ScreenPtr pScreen)
+{
+    ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
+    SISPtr pSiS = SISPTR(pScrn);
+    XF86VideoAdaptorPtr adapt;
+    SISPortPrivPtr pPriv;
+
+    if(!(adapt = xcalloc(1, sizeof(XF86VideoAdaptorRec) +
+                            sizeof(SISPortPrivRec) +
+                            sizeof(DevUnion))))
+    	return NULL;
+
+    adapt->type = XvWindowMask | XvInputMask | XvImageMask;
+    adapt->flags = VIDEO_OVERLAID_IMAGES | VIDEO_CLIP_TO_VIEWPORT;
+    adapt->name = "SIS 5597/5598/6326/530/620 Video Overlay";
+    adapt->nEncodings = 1;
+    if(pSiS->oldChipset < OC_SIS6326) {
+      adapt->pEncodings = &DummyEncoding5597;
+    } else {
+      adapt->pEncodings = &DummyEncoding;
+    }
+    adapt->nFormats = NUM_FORMATS;
+    adapt->pFormats = SIS6326Formats;
+    adapt->nPorts = 1;
+    adapt->pPortPrivates = (DevUnion*)(&adapt[1]);
+
+    pPriv = (SISPortPrivPtr)(&adapt->pPortPrivates[1]);
+
+    adapt->pPortPrivates[0].ptr = (pointer)(pPriv);
+    adapt->pAttributes = SIS6326Attributes;
+    adapt->nAttributes = NUM_ATTRIBUTES;
+    if(pSiS->NoYV12 == 1) {
+       adapt->nImages = NUM_IMAGES_NOYV12;
+       adapt->pImages = SIS6326ImagesNoYV12;
+    } else {
+       adapt->nImages = NUM_IMAGES;
+       adapt->pImages = SIS6326Images;
+    }
+    adapt->PutVideo = NULL;
+    adapt->PutStill = NULL;
+    adapt->GetVideo = NULL;
+    adapt->GetStill = NULL;
+    adapt->StopVideo = SIS6326StopVideo;
+    adapt->SetPortAttribute = SIS6326SetPortAttribute;
+    adapt->GetPortAttribute = SIS6326GetPortAttribute;
+    adapt->QueryBestSize = SIS6326QueryBestSize;
+    adapt->PutImage = SIS6326PutImage;
+    adapt->QueryImageAttributes = SIS6326QueryImageAttributes;
+
+    pPriv->videoStatus = 0;
+    pPriv->currentBuf  = 0;
+    pPriv->linear      = NULL;
+    pPriv->grabbedByV4L= FALSE;
+
+    SIS6326SetPortDefaults(pScrn, pPriv);
+
+    /* gotta uninit this someplace */
+    REGION_INIT(pScreen, &pPriv->clip, NullBox, 0); 
+
+    pSiS->adaptor = adapt;
+
+    xvBrightness = MAKE_ATOM("XV_BRIGHTNESS");
+    xvContrast   = MAKE_ATOM("XV_CONTRAST");
+    xvColorKey   = MAKE_ATOM("XV_COLORKEY");
+    xvAutopaintColorKey = MAKE_ATOM("XV_AUTOPAINT_COLORKEY");
+    xvSetDefaults       = MAKE_ATOM("XV_SET_DEFAULTS");
+
+    SIS6326ResetVideo(pScrn);
+
+    return adapt;
+}
+
+static Bool
+RegionsEqual(RegionPtr A, RegionPtr B)
+{
+    int *dataA, *dataB;
+    int num;
+
+    num = REGION_NUM_RECTS(A);
+    if(num != REGION_NUM_RECTS(B))
+    return FALSE;
+
+    if((A->extents.x1 != B->extents.x1) ||
+       (A->extents.x2 != B->extents.x2) ||
+       (A->extents.y1 != B->extents.y1) ||
+       (A->extents.y2 != B->extents.y2))
+    return FALSE;
+
+    dataA = (int*)REGION_RECTS(A);
+    dataB = (int*)REGION_RECTS(B);
+
+    while(num--) {
+      if((dataA[0] != dataB[0]) || (dataA[1] != dataB[1]))
+        return FALSE;
+      dataA += 2;
+      dataB += 2;
+    }
+
+    return TRUE;
+}
+
+static int
+SIS6326SetPortAttribute(ScrnInfoPtr pScrn, Atom attribute,
+  		    INT32 value, pointer data)
+{
+  SISPortPrivPtr pPriv = (SISPortPrivPtr)data;
+
+  if(attribute == xvBrightness) {
+    if((value < -128) || (value > 127))
+       return BadValue;
+    pPriv->brightness = value;
+  } else if(attribute == xvContrast) {
+    if((value < 0) || (value > 7))
+       return BadValue;
+    pPriv->contrast = value;
+  } else if(attribute == xvColorKey) {
+    pPriv->colorKey = value;
+    REGION_EMPTY(pScrn->pScreen, &pPriv->clip);
+  } else if (attribute == xvAutopaintColorKey) {
+     if ((value < 0) || (value > 1))
+       return BadValue;
+     pPriv->autopaintColorKey = value;
+  } else if (attribute == xvSetDefaults) {
+        SIS6326SetPortDefaults(pScrn, pPriv);
+  } else return BadMatch;
+  return Success;
+}
+
+static int 
+SIS6326GetPortAttribute(
+  ScrnInfoPtr pScrn, 
+  Atom attribute,
+  INT32 *value, 
+  pointer data
+){
+  SISPortPrivPtr pPriv = (SISPortPrivPtr)data;
+
+  if(attribute == xvBrightness) {
+    *value = pPriv->brightness;
+  } else if(attribute == xvContrast) {
+    *value = pPriv->contrast;
+  } else if(attribute == xvColorKey) {
+    *value = pPriv->colorKey;
+  } else if (attribute == xvAutopaintColorKey)
+    *value = (pPriv->autopaintColorKey) ? 1 : 0;
+  else return BadMatch;
+  return Success;
+}
+
+static void 
+SIS6326QueryBestSize(
+  ScrnInfoPtr pScrn, 
+  Bool motion,
+  short vid_w, short vid_h, 
+  short drw_w, short drw_h, 
+  unsigned int *p_w, unsigned int *p_h, 
+  pointer data
+){
+  *p_w = drw_w;
+  *p_h = drw_h; 
+
+  /* TODO: report the HW limitation */
+}
+
+static void  /* V 530/6326 */
+calc_scale_factor(SISPtr pSiS, SISOverlayPtr pOverlay, ScrnInfoPtr pScrn,
+                 SISPortPrivPtr pPriv)
+{
+  CARD32 temp=0;
+
+  int dstW = pOverlay->dstBox.x2 - pOverlay->dstBox.x1;
+  int dstH = pOverlay->dstBox.y2 - pOverlay->dstBox.y1;
+  int srcW = pOverlay->srcW;
+  int srcH = pOverlay->srcH;
+
+#if 0
+  /* DEBUG */
+  if((oldH != dstH) || (oldW != dstW)){
+  	xf86DrvMsg(0, X_INFO, "Video size %dx%d\n", dstW, dstH);
+	oldH = dstH; oldW = dstW;
+  }
+  /* /DEBUG */
+#endif
+
+  /* TW: For double scan modes, we need to double the height */
+  if(pSiS->CurrentLayout.mode->Flags & V_DBLSCAN) {
+	dstH <<= 1;
+  }
+  /* TW: For interlace modes, we need to half the height */
+  if(pSiS->CurrentLayout.mode->Flags & V_INTERLACE) {
+	dstH >>= 1;
+  }
+
+  /* Horizontal */
+  if(dstW < IMAGE_MIN_WIDTH) dstW = IMAGE_MIN_WIDTH;
+  if(dstW == srcW) {
+        pOverlay->HUSF    = 0x00;
+        pOverlay->HIntBit = 0x01;
+  } else if(dstW > srcW) {
+	pOverlay->HIntBit = 0x00;
+	temp = srcW * 64 / (dstW + 1);
+	if(temp > 63) temp = 63;
+	pOverlay->HUSF = temp;
+  } else {
+  	/* TW: 6326 can't scale below factor .440 - to check with 530/620 */
+        if(((dstW * 1000) / srcW) < 440) dstW = ((srcW * 440) / 1000) + 1;
+	temp = srcW / dstW;
+	if(temp > 15) temp = 15;
+	pOverlay->HIntBit = temp;
+	temp = srcW * 64 / dstW;
+	pOverlay->HUSF = temp - (pOverlay->HIntBit * 64);
+  }
+
+  /* Vertical */
+  if(dstH < IMAGE_MIN_HEIGHT) dstH = IMAGE_MIN_HEIGHT;
+  if(dstH == srcH) {
+        pOverlay->VUSF = 0x00;
+	pOverlay->PitchMult = 1;
+  } else if(dstH > srcH) {
+  	temp = srcH * 64 / (dstH + 1);
+	if (temp > 63) temp = 63;
+	pOverlay->VUSF = temp;
+	pOverlay->PitchMult = 1;
+  } else {
+        /* TW: 6326 can't scale below factor .440 - to check with 530/620 */
+	if(((dstH * 1000) / srcH) < 440) dstH = ((srcH * 440) / 1000) + 1;
+	temp = srcH / dstH;
+	if(srcH % dstH) {
+	   temp++;
+	   pOverlay->VUSF = (srcH * 64) / (temp * dstH);
+	} else {
+	   pOverlay->VUSF = 0x00;
+	}
+	pOverlay->PitchMult = temp;
+  }
+}
+
+static void  /* V 530/6326 */
+calc_line_buf_size(SISOverlayPtr pOverlay)
+{
+    CARD32 I;
+    CARD32 line = pOverlay->srcW;
+
+    if( (pOverlay->pixelFormat == PIXEL_FMT_YV12) ||
+        (pOverlay->pixelFormat == PIXEL_FMT_I420) )
+    {
+        I = (line >> 5) + (((line >> 6) * 2)) + 3;
+	I <<= 5;
+    } else { /* YUV2, UYVY, RGB */
+        I = line << 1;
+        if(I & 7)  I += 8;
+    }
+    I += 8;
+    I >>= 3;
+    pOverlay->lineBufSize = (CARD8)I;
+}
+
+static void  /* V 530/6326 */
+merge_line_buf(SISPtr pSiS, SISPortPrivPtr pPriv, Bool enable)
+{
+  if(enable) {
+     setvideoregmask(pSiS, Index_VI6326_Control_Misc5, 0x10, 0x10);
+  } else {
+     setvideoregmask(pSiS, Index_VI6326_Control_Misc5, 0x00, 0x10);
+  }
+}
+
+static void  /* V 530/6326 */
+set_format(SISPtr pSiS, SISOverlayPtr pOverlay)
+{
+    CARD8 fmt, misc0, misc1, misc4;
+
+    switch (pOverlay->pixelFormat){
+    case PIXEL_FMT_YV12:
+    case PIXEL_FMT_I420: /* V/530 V/6326 */
+        fmt   = 0x80;  /* D[7:6]  10 YUV2(=YUYV), 01 VYUY, 00 UYVY, 11 YVYU / 00 RGB 555, 01 RGB 565 */
+	misc0 = 0x40;  /* D[6]: 1 = YUV, 0 = RGB */
+	misc4 = 0x05;  /* D[1:0] 00 RGB 555, 01 YUV 422, 10 RGB 565; D[2] 1 = YUV420 mode */
+	misc1 = 0xff;
+        break;
+    case PIXEL_FMT_UYVY:
+        fmt   = 0x00;  /* D[7:6]  10 YUV2(=YUYV), 01 VYUY, 00 UYVY, 11 YVYU / 00 RGB 555, 01 RGB 565 */
+	misc0 = 0x40;  /* D[6]: 1 = YUV, 0 = RGB */
+	misc4 = 0x00;  /* D[1:0] 00 RGB 555, 01 YUV 422, 10 RGB 565; D[2] 1 = YUV420 mode */
+	misc1 = 0xff;
+        break;
+    case PIXEL_FMT_YUY2: /* V/530 V/6326 */
+        fmt   = 0x80;  /* D[7:6]  10 YUV2(=YUYV), 01 VYUY, 00 UYVY, 11 YVYU / 00 RGB 555, 01 RGB 565 */
+	misc0 = 0x40;  /* D[6]: 1 = YUV, 0 = RGB */
+	misc4 = 0x00;  /* D[1:0]  00 RGB 555, 01 YUV 422, 10 RGB 565; D[2] 1 = YUV420 mode */
+	misc1 = 0xff;
+        break;
+    case PIXEL_FMT_RGB6: /* V/530 V/6326 */
+        fmt   = 0x40;  /* D[7:6]  10 YUV2(=YUYV), 01 VYUY, 00 UYVY, 11 YVYU / 00 RGB 555, 01 RGB 565 */
+	misc0 = 0x00;  /* D[6]: 1 = YUV, 0 = RGB */
+	misc4 = 0xff;
+	misc1 = 0x00;  /* D[2] = Capture format selection (DS5597) - WDR sets this */
+	break;
+    case PIXEL_FMT_RGB5: /* V/530 V/6326 */
+    default:
+        fmt   = 0x00;  /* D[7:6]  10 YUV2(=YUYV), 01 VYUY, 00 UYVY, 11 YVYU / 00 RGB 555, 01 RGB 565 */
+	misc0 = 0x00;  /* D[6]: 1 = YUV, 0 = RGB */
+	misc4 = 0xff;
+	misc1 = 0x04;  /* D[2] = Capture format selection (DS5597) - WDR sets this */
+	break;
+    }
+
+    setvideoregmask(pSiS, Index_VI6326_VideoFormatSelect, fmt,   0xC0);
+    setvideoregmask(pSiS, Index_VI6326_Control_Misc0,     misc0, 0x40);
+    if(misc4 == 0xff) {
+	  setvideoregmask(pSiS, Index_VI6326_Control_Misc1,  misc1, 0x04);
+	  if(pSiS->oldChipset >= OC_SIS5597) {
+               setvideoregmask(pSiS, Index_VI6326_Control_Misc4, 0x00, 0x05);
+	  }
+    } else {
+          if(pSiS->oldChipset >= OC_SIS5597) {
+               setvideoregmask(pSiS, Index_VI6326_Control_Misc4,  misc4, 0x05);
+	  }
+	  setvideoregmask(pSiS, Index_VI6326_Control_Misc1,  0x00, 0x04);
+    }
+}
+
+static void  /* V 6326/530 */
+set_colorkey(SISPtr pSiS, CARD32 colorkey)
+{
+    CARD8 r, g, b, s;
+
+    b = (CARD8)(colorkey & 0xFF);
+    g = (CARD8)((colorkey>>8) & 0xFF);
+    r = (CARD8)((colorkey>>16) & 0xFF);
+
+    if(pSiS->CurrentLayout.bitsPerPixel >= 24) {
+         s = b;
+	 b = r;
+	 r = s;
+    }
+
+    setvideoreg(pSiS, Index_VI6326_Overlay_ColorKey_Blue_Min  ,(CARD8)b);
+    setvideoreg(pSiS, Index_VI6326_Overlay_ColorKey_Green_Min ,(CARD8)g);
+    setvideoreg(pSiS, Index_VI6326_Overlay_ColorKey_Red_Min   ,(CARD8)r);
+
+    setvideoreg(pSiS, Index_VI6326_Overlay_ColorKey_Blue_Max  ,(CARD8)b);
+    setvideoreg(pSiS, Index_VI6326_Overlay_ColorKey_Green_Max ,(CARD8)g);
+    setvideoreg(pSiS, Index_VI6326_Overlay_ColorKey_Red_Max   ,(CARD8)r);
+}
+
+static void
+set_brightness(SISPtr pSiS, CARD8 brightness)
+{
+    setvideoreg(pSiS, Index_VI6326_Brightness, brightness);
+}
+
+static void
+set_contrast(SISPtr pSiS, CARD8 contrast)
+{
+    setvideoregmask(pSiS, Index_VI6326_Contrast_Enh_Ctrl, contrast, 0x07);
+}
+
+static void
+set_contrast_data(SISPtr pSiS, int value)
+{
+  unsigned long temp;
+
+  if(value < 10000) temp = 0;
+  else temp = (value - 10000) / 20000;
+  if(temp > 3) temp = 3;
+  setvideoregmask(pSiS, Index_VI6326_Contrast_Enh_Ctrl, (temp << 6), 0xC0);
+  switch(temp) {
+    case 0: temp =  2048; break;
+    case 1: temp =  4096; break;
+    case 2: temp =  8192; break;
+    case 3: temp = 16384; break;
+  }
+  temp <<= 10;
+  temp /= value;
+  setvideoreg(pSiS, Index_VI6326_Contrast_Factor, temp);
+}
+
+static void
+set_overlay(SISPtr pSiS, SISOverlayPtr pOverlay, SISPortPrivPtr pPriv, int index)
+{
+    ScrnInfoPtr pScrn = pSiS->pScrn;
+
+    CARD16 pitch=0;
+    CARD8  h_over=0, v_over=0;
+    CARD16 top, bottom, left, right;
+    CARD16 screenX = pSiS->CurrentLayout.mode->HDisplay;
+    CARD16 screenY = pSiS->CurrentLayout.mode->VDisplay;
+    CARD32 watchdog;
+
+    top = pOverlay->dstBox.y1;
+    bottom = pOverlay->dstBox.y2;
+    if(bottom > screenY) {
+        bottom = screenY;
+    }
+
+    left = pOverlay->dstBox.x1;
+    right = pOverlay->dstBox.x2;
+    if(right > screenX) {
+        right = screenX;
+    }
+
+    /* TW: DoubleScan modes require Y coordinates * 2 */
+    if(pSiS->CurrentLayout.mode->Flags & V_DBLSCAN) {
+    	 top <<= 1;
+	 bottom <<= 1;
+    }
+    /* TW: Interlace modes require Y coordinates / 2 */
+    if(pSiS->CurrentLayout.mode->Flags & V_INTERLACE) {
+    	 top >>= 1;
+	 bottom >>= 1;
+    }
+
+    h_over = (((left>>8) & 0x07) | ((right>>4) & 0x70));
+    v_over = (((top>>8) & 0x07) | ((bottom>>4) & 0x70));
+
+    pitch = pOverlay->pitch * pOverlay->PitchMult;
+    pitch >>= 2;   /* Datasheet: Unit = double word - verified */
+    if(pitch > 0xfff) {
+    	pitch = pOverlay->pitch * (0xFFF * 2 / pOverlay->pitch);
+	pOverlay->VUSF = 0x3F;
+    }
+
+    /* set color key */
+    set_colorkey(pSiS, pPriv->colorKey);
+
+    /* set color key mode */
+    setvideoregmask(pSiS, Index_VI6326_Key_Overlay_OP, pOverlay->keyOP, 0x0f);
+
+    setvideoregmask(pSiS, Index_VI6326_Control_Misc0, 0x00, 0x0c);
+    setvideoregmask(pSiS, Index_VI6326_Control_Misc0, 0x00, 0x18);
+
+    /* Set Y buf pitch */   /* Datasheet: Unit = double word - verified */
+    setvideoreg(pSiS, Index_VI6326_Disp_Y_Buf_Pitch_Low, (CARD8)(pitch));
+    setvideoregmask(pSiS, Index_VI6326_Disp_Y_Buf_Pitch_High, (CARD8)(pitch>>8), 0x0f);
+    /* Set U/V pitch if using planar formats */
+    if( (pOverlay->pixelFormat == PIXEL_FMT_YV12) ||
+    	(pOverlay->pixelFormat == PIXEL_FMT_I420) )  {
+	/* Set U/V pitch */  /* Datasheet: Unit = double word - verified */
+	setvideoreg(pSiS, Index_VI6326_Disp_UV_Buf_Pitch_Low, (CARD8)pitch >> 1);
+        setvideoregmask(pSiS, Index_VI6326_Disp_UV_Buf_Pitch_High, (CARD8)(pitch >> 9), 0x0f);
+    }
+
+    /* set line buffer size */
+    setvideoreg(pSiS, Index_VI6326_Line_Buffer_Size, pOverlay->lineBufSize);
+
+    /* set scale factor */
+    setvideoreg(pSiS, Index_VI6326_Hor_Scale,             (CARD8)((pOverlay->HUSF) | 0xC0));
+    setvideoregmask(pSiS, Index_VI6326_Hor_Scale_Integer, (CARD8)(pOverlay->HIntBit), 0x0F);
+    setvideoregmask(pSiS, Index_VI6326_Ver_Scale,         (CARD8)(pOverlay->VUSF), 0x3F);
+
+    /* TW: We don't have to wait for vertical retrace in all cases */
+    if(pPriv->mustwait) {
+	watchdog = WATCHDOG_DELAY;
+	while ((!pOverlay->VBlankActiveFunc(pSiS)) && --watchdog);
+	if(!watchdog) xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+			"Xv: Waiting for vertical retrace timed-out\n");
+    }
+
+    /* set destination window position */
+    setvideoreg(pSiS, Index_VI6326_Win_Hor_Disp_Start_Low, (CARD8)left);
+    setvideoreg(pSiS, Index_VI6326_Win_Hor_Disp_End_Low,   (CARD8)right);
+    setvideoreg(pSiS, Index_VI6326_Win_Hor_Over,           (CARD8)h_over);
+
+    setvideoreg(pSiS, Index_VI6326_Win_Ver_Disp_Start_Low, (CARD8)top);
+    setvideoreg(pSiS, Index_VI6326_Win_Ver_Disp_End_Low,   (CARD8)bottom);
+    setvideoreg(pSiS, Index_VI6326_Win_Ver_Over,           (CARD8)v_over);
+
+    /* Set Y start address */
+    setvideoreg (pSiS, Index_VI6326_Disp_Y_Buf_Start_Low,    (CARD8)(pOverlay->PSY));
+    setvideoreg (pSiS, Index_VI6326_Disp_Y_Buf_Start_Middle, (CARD8)((pOverlay->PSY)>>8));
+    if(pSiS->oldChipset <= OC_SIS6326) {  	/* all old chipsets incl 6326 */
+       /* Set overflow bits */
+       setvideoregmask (pSiS, Index_VI6326_Disp_Capt_Y_Buf_Start_High,
+                                             (CARD8)(((pOverlay->PSY)>>12) & 0xF0), 0xF0);
+       /* Set framebuffer end address */
+       setvideoreg (pSiS, Index_VI6326_Disp_Y_End,    (CARD8)(pOverlay->YUVEnd));
+    } else {  				/* 530/620 */
+       /* Set overflow bits */
+       setvideoregmask (pSiS, Index_VI6326_Disp_Capt_Y_Buf_Start_High,
+                                             (CARD8)(((pOverlay->PSY)>>13) & 0xF8), 0xF8);
+    }
+
+    /* Set U/V start addresses if using plane formats */
+    if( (pOverlay->pixelFormat == PIXEL_FMT_YV12) ||
+    	(pOverlay->pixelFormat == PIXEL_FMT_I420) )  {
+
+        CARD32 PSU = pOverlay->PSU;
+        CARD32 PSV = pOverlay->PSV;
+
+        /* set U/V start address */
+        setvideoreg (pSiS, Index_VI6326_U_Buf_Start_Low,   (CARD8)PSU);
+        setvideoreg (pSiS, Index_VI6326_U_Buf_Start_Middle,(CARD8)(PSU >> 8));
+
+        setvideoreg (pSiS, Index_VI6326_V_Buf_Start_Low,   (CARD8)PSV);
+        setvideoreg (pSiS, Index_VI6326_V_Buf_Start_Middle,(CARD8)(PSV >> 8));
+
+	setvideoreg (pSiS, Index_VI6326_UV_Buf_Start_High,
+					(CARD8)(((PSU >> 16) & 0x0F) | ((PSV >> 12) & 0xF0)) );
+
+	if(pSiS->oldChipset > OC_SIS6326) {
+	   /* Set bit 20 of the addresses in Misc5 (530/620 only) */
+	   setvideoreg (pSiS, Index_VI6326_Control_Misc5,
+				(CARD8)(((PSU >> (20-1)) & 0x02) | ((PSV >> (20-2)) & 0x04)) );
+	}
+    }
+
+    /* set brightness and contrast */
+    set_brightness(pSiS, pPriv->brightness);
+    if(pSiS->oldChipset > OC_SIS6205C) {
+       set_contrast_data(pSiS, (pOverlay->dstBox.x2 - pOverlay->dstBox.x1) *
+                               (pOverlay->dstBox.y2 - pOverlay->dstBox.y1));
+       set_contrast(pSiS, pPriv->contrast);
+    }
+
+    /* set format */
+    set_format(pSiS, pOverlay);
+}
+
+/* TW: Overlay MUST NOT be switched off while beam is over it */
+static void
+close_overlay(SISPtr pSiS, SISPortPrivPtr pPriv)
+{
+  CARD32 watchdog;
+
+  watchdog = WATCHDOG_DELAY;
+  while((!vblank_active_CRT1(pSiS)) && --watchdog);
+  if(pSiS->oldChipset > OC_SIS6326) {
+     /* what is this? */
+     setvideoregmask(pSiS, Index_VI6326_Control_Misc4, 0x40, 0x40);
+  }
+  /* disable overlay */
+  setvideoregmask(pSiS, Index_VI6326_Control_Misc0, 0x00, 0x02);
+}
+
+static void
+SIS6326DisplayVideo(ScrnInfoPtr pScrn, SISPortPrivPtr pPriv)
+{
+   SISPtr pSiS = SISPTR(pScrn);
+
+   short srcPitch = pPriv->srcPitch;
+   short height = pPriv->height;
+   short width = pPriv->width;
+   SISOverlayRec overlay;
+   int srcOffsetX=0, srcOffsetY=0;
+   int sx, sy;
+   int index = 0;
+   int pitch;
+
+   memset(&overlay, 0, sizeof(overlay));
+   overlay.pixelFormat = pPriv->id;
+   overlay.pitch = srcPitch;
+   overlay.keyOP = VI6326_ROP_DestKey;	/* DestKey mode */
+
+   overlay.dstBox.x1 = pPriv->drw_x - pScrn->frameX0;
+   overlay.dstBox.x2 = pPriv->drw_x + pPriv->drw_w - pScrn->frameX0;
+   overlay.dstBox.y1 = pPriv->drw_y - pScrn->frameY0;
+   overlay.dstBox.y2 = pPriv->drw_y + pPriv->drw_h - pScrn->frameY0;
+
+   if((overlay.dstBox.x1 > overlay.dstBox.x2) ||
+   		(overlay.dstBox.y1 > overlay.dstBox.y2))
+     return;
+
+   if((overlay.dstBox.x2 < 0) || (overlay.dstBox.y2 < 0))
+     return;
+
+   if(overlay.dstBox.x1 < 0) {
+     srcOffsetX = pPriv->src_w * (-overlay.dstBox.x1) / pPriv->drw_w;
+     overlay.dstBox.x1 = 0;
+   }
+   if(overlay.dstBox.y1 < 0) {
+     srcOffsetY = pPriv->src_h * (-overlay.dstBox.y1) / pPriv->drw_h;
+     overlay.dstBox.y1 = 0;
+   }
+
+   switch(pPriv->id){
+     case PIXEL_FMT_YV12:
+       sx = (pPriv->src_x + srcOffsetX) & ~7;
+       sy = (pPriv->src_y + srcOffsetY) & ~1;
+       pitch = (width + 3) & ~3;
+       overlay.PSY = pPriv->bufAddr[pPriv->currentBuf] + sx + sy * pitch;
+       overlay.PSV = overlay.PSY + pitch * height;
+       overlay.PSU = overlay.PSV + ((((width >> 1) + 3) & ~3) * (height >> 1));
+       overlay.PSY >>= 2;
+       overlay.PSV >>= 2;
+       overlay.PSU >>= 2;
+       break;
+     case PIXEL_FMT_I420:
+       sx = (pPriv->src_x + srcOffsetX) & ~7;
+       sy = (pPriv->src_y + srcOffsetY) & ~1;
+       pitch = (width + 3) & ~3;
+       overlay.PSY = pPriv->bufAddr[pPriv->currentBuf] + sx + sy * pitch;
+       overlay.PSU = overlay.PSY + pitch * height;
+       overlay.PSV = overlay.PSU + ((((width >> 1) + 3) & ~3) * (height >> 1));
+       overlay.PSY >>= 2;
+       overlay.PSV >>= 2;
+       overlay.PSU >>= 2;
+       break;
+     case PIXEL_FMT_YUY2:
+     case PIXEL_FMT_UYVY:
+     case PIXEL_FMT_RGB6:
+     case PIXEL_FMT_RGB5:
+     default:
+       sx = (pPriv->src_x + srcOffsetX) & ~1;
+       sy = (pPriv->src_y + srcOffsetY);
+       overlay.PSY = (pPriv->bufAddr[pPriv->currentBuf] + sx*2 + sy*srcPitch);
+       overlay.PSY >>= 2;
+       break;
+   }
+
+   /* FIXME: Is this correct? (Is it required to set the end address?
+    *        Datasheet is not clear) - (reg does not exist on 530/620)
+    */
+   overlay.YUVEnd = (pPriv->bufAddr[pPriv->currentBuf] + pPriv->totalSize) >> 14;
+
+   /* FIXME: is it possible that srcW < 0 */
+   overlay.srcW = pPriv->src_w - (sx - pPriv->src_x);
+   overlay.srcH = pPriv->src_h - (sy - pPriv->src_y);
+
+   if ( (pPriv->oldx1 != overlay.dstBox.x1) ||
+   	(pPriv->oldx2 != overlay.dstBox.x2) ||
+	(pPriv->oldy1 != overlay.dstBox.y1) ||
+	(pPriv->oldy2 != overlay.dstBox.y2) ) {
+	pPriv->mustwait = 1;
+	pPriv->oldx1 = overlay.dstBox.x1; pPriv->oldx2 = overlay.dstBox.x2;
+	pPriv->oldy1 = overlay.dstBox.y1; pPriv->oldy2 = overlay.dstBox.y2;
+   }
+
+   /* calculate line buffer length */
+   calc_line_buf_size(&overlay);
+
+   overlay.VBlankActiveFunc = vblank_active_CRT1;
+/* overlay.GetScanLineFunc = get_scanline_CRT1;  */
+
+   /* calculate scale factor */
+   calc_scale_factor(pSiS, &overlay, pScrn, pPriv);
+
+   /* set (not only determine) if line buffer is to be merged */
+   if(pSiS->oldChipset > OC_SIS5597) {
+      int temp;
+      if(pSiS->oldChipset <= OC_SIS6326) temp = 352;
+      else                               temp = 384;
+      merge_line_buf(pSiS, pPriv, (overlay.srcW > temp));
+   }
+
+   /* set overlay */
+   set_overlay(pSiS, &overlay, pPriv, index);
+
+   /* enable overlay */
+   if(pSiS->oldChipset > OC_SIS6326) {
+       setvideoregmask (pSiS, Index_VI6326_Control_Misc4, 0x40, 0x40);
+   }
+   setvideoregmask (pSiS, Index_VI6326_Control_Misc0, 0x02, 0x02);
+
+   pPriv->mustwait = 0;
+}
+
+static FBLinearPtr
+SIS6326AllocateOverlayMemory(
+  ScrnInfoPtr pScrn,
+  FBLinearPtr linear,
+  int size
+){
+   ScreenPtr pScreen;
+   FBLinearPtr new_linear;
+
+   if(linear) {
+	if(linear->size >= size)
+	   return linear;
+
+	if(xf86ResizeOffscreenLinear(linear, size))
+	   return linear;
+
+	xf86FreeOffscreenLinear(linear);
+   }
+
+   pScreen = screenInfo.screens[pScrn->scrnIndex];
+
+   new_linear = xf86AllocateOffscreenLinear(pScreen, size, 32,
+                                            NULL, NULL, NULL);
+
+   if(!new_linear) {
+        int max_size;
+
+        xf86QueryLargestOffscreenLinear(pScreen, &max_size, 32,
+				       PRIORITY_EXTREME);
+
+        if(max_size < size) return NULL;
+
+        xf86PurgeUnlockedOffscreenAreas(pScreen);
+        new_linear = xf86AllocateOffscreenLinear(pScreen, size, 32,
+                                                 NULL, NULL, NULL);
+   }
+   if (!new_linear)
+        xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+	           "Xv: Failed to allocate %dK of video memory\n", size/1024);
+
+   return new_linear;
+}
+
+static void
+SIS6326FreeOverlayMemory(ScrnInfoPtr pScrn)
+{
+    SISPortPrivPtr pPriv = GET_PORT_PRIVATE(pScrn);
+
+    if(pPriv->linear) {
+        xf86FreeOffscreenLinear(pPriv->linear);
+	pPriv->linear = NULL;
+    }
+}
+
+static void
+SIS6326StopVideo(ScrnInfoPtr pScrn, pointer data, Bool shutdown)
+{
+  SISPortPrivPtr pPriv = (SISPortPrivPtr)data;
+  SISPtr pSiS = SISPTR(pScrn);
+
+  if(pPriv->grabbedByV4L)
+  	return;
+
+  REGION_EMPTY(pScrn->pScreen, &pPriv->clip);
+
+  if(shutdown) {
+     if(pPriv->videoStatus & CLIENT_VIDEO_ON) {
+       close_overlay(pSiS, pPriv);
+       pPriv->mustwait = 1;
+     }
+     SIS6326FreeOverlayMemory(pScrn);
+     pPriv->videoStatus = 0;
+     pSiS->VideoTimerCallback = NULL;
+  } else {
+     if(pPriv->videoStatus & CLIENT_VIDEO_ON) {
+       pPriv->videoStatus = OFF_TIMER | CLIENT_VIDEO_ON;
+       pPriv->offTime = currentTime.milliseconds + OFF_DELAY;
+       pSiS->VideoTimerCallback = SIS6326VideoTimerCallback;
+     }
+  }
+}
+
+static int
+SIS6326PutImage(
+  ScrnInfoPtr pScrn,
+  short src_x, short src_y,
+  short drw_x, short drw_y,
+  short src_w, short src_h,
+  short drw_w, short drw_h,
+  int id, unsigned char* buf,
+  short width, short height,
+  Bool sync,
+  RegionPtr clipBoxes, pointer data
+){
+   SISPtr pSiS = SISPTR(pScrn);
+   SISPortPrivPtr pPriv = (SISPortPrivPtr)data;
+
+   int totalSize=0;
+   int depth = pSiS->CurrentLayout.bitsPerPixel >> 3;
+
+   if(pPriv->grabbedByV4L)
+   	return Success;
+
+   pPriv->drw_x = drw_x;
+   pPriv->drw_y = drw_y;
+   pPriv->drw_w = drw_w;
+   pPriv->drw_h = drw_h;
+   pPriv->src_x = src_x;
+   pPriv->src_y = src_y;
+   pPriv->src_w = src_w;
+   pPriv->src_h = src_h;
+   pPriv->id = id;
+   pPriv->height = height;
+   pPriv->width = width;
+
+   /* TW: Pixel formats:
+      1. YU12:  3 planes:       H    V
+               Y sample period  1    1   (8 bit per pixel)
+	       V sample period  2    2	 (8 bit per pixel, subsampled)
+	       U sample period  2    2   (8 bit per pixel, subsampled)
+
+ 	 Y plane is fully sampled (width*height), U and V planes
+	 are sampled in 2x2 blocks, hence a group of 4 pixels requires
+	 4 + 1 + 1 = 6 bytes. The data is planar, ie in single planes
+	 for Y, U and V.
+      2. UYVY: 3 planes:        H    V
+               Y sample period  1    1   (8 bit per pixel)
+	       V sample period  2    1	 (8 bit per pixel, subsampled)
+	       U sample period  2    1   (8 bit per pixel, subsampled)
+	 Y plane is fully sampled (width*height), U and V planes
+	 are sampled in 2x1 blocks, hence a group of 4 pixels requires
+	 4 + 2 + 2 = 8 bytes. The data is bit packed, there are no separate
+	 Y, U or V planes.
+	 Bit order:  U0 Y0 V0 Y1  U2 Y2 V2 Y3 ...
+      3. I420: Like YU12, but planes U and V are in reverse order.
+      4. YUY2: Like UYVY, but order is
+                     Y0 U0 Y1 V0  Y2 U2 Y3 V2 ...
+   */
+
+   switch(id){
+     case PIXEL_FMT_YV12:
+     case PIXEL_FMT_I420:
+       pPriv->srcPitch = (width + 7) & ~7;
+       /* Size = width * height * 3 / 2 */
+       totalSize = (pPriv->srcPitch * height * 3) >> 1;
+       break;
+     case PIXEL_FMT_YUY2:
+     case PIXEL_FMT_UYVY:
+     case PIXEL_FMT_RGB5:
+     case PIXEL_FMT_RGB6:
+     default:
+       pPriv->srcPitch = ((width << 1) + 3) & ~3;
+       /* Size = width * 2 * height */
+       totalSize = pPriv->srcPitch * height;
+   }
+
+   pPriv->totalSize = totalSize;
+
+   /* allocate memory (we do doublebuffering) */
+   if(!(pPriv->linear = SIS6326AllocateOverlayMemory(pScrn, pPriv->linear,
+						 totalSize<<1)))
+	return BadAlloc;
+
+   /* fixup pointers */
+   pPriv->bufAddr[0] = (pPriv->linear->offset * depth);
+   pPriv->bufAddr[1] = pPriv->bufAddr[0] + totalSize;
+
+   /* copy data */
+   memcpy(pSiS->FbBase + pPriv->bufAddr[pPriv->currentBuf], buf, totalSize);
+
+   SIS6326DisplayVideo(pScrn, pPriv);
+
+   /* update cliplist */
+   if(  pPriv->autopaintColorKey &&
+        (pPriv->grabbedByV4L || !RegionsEqual(&pPriv->clip, clipBoxes))) {
+     /* We always paint colorkey for V4L */
+     if (!pPriv->grabbedByV4L)
+     	REGION_COPY(pScreen, &pPriv->clip, clipBoxes);
+     /* draw these */
+     /* xf86XVFillKeyHelper(pScrn->pScreen, pPriv->colorKey, clipBoxes); - for X4.2 */
+     XAAFillSolidRects(pScrn, pPriv->colorKey, GXcopy, ~0,
+                    REGION_NUM_RECTS(clipBoxes),
+                    REGION_RECTS(clipBoxes));
+   }
+
+   pPriv->currentBuf ^= 1;
+
+   pPriv->videoStatus = CLIENT_VIDEO_ON;
+
+   pSiS->VideoTimerCallback = SIS6326VideoTimerCallback;
+
+   return Success;
+}
+
+static int
+SIS6326QueryImageAttributes(
+  ScrnInfoPtr pScrn,
+  int id,
+  unsigned short *w, unsigned short *h,
+  int *pitches, int *offsets
+){
+    SISPtr pSiS = SISPTR(pScrn);
+    int pitchY, pitchUV;
+    int size, sizeY, sizeUV;
+
+    if(*w < IMAGE_MIN_WIDTH) *w = IMAGE_MIN_WIDTH;
+    if(*h < IMAGE_MIN_HEIGHT) *h = IMAGE_MIN_HEIGHT;
+
+    if(pSiS->oldChipset < OC_SIS6326) {
+       if(*w > IMAGE_MAX_WIDTH_5597) *w = IMAGE_MAX_WIDTH_5597;
+       if(*h > IMAGE_MAX_HEIGHT_5597) *h = IMAGE_MAX_HEIGHT_5597;
+    } else {
+       if(*w > IMAGE_MAX_WIDTH) *w = IMAGE_MAX_WIDTH;
+       if(*h > IMAGE_MAX_HEIGHT) *h = IMAGE_MAX_HEIGHT;
+    }
+
+    switch(id) {
+    case PIXEL_FMT_YV12:
+    case PIXEL_FMT_I420:
+        *w = (*w + 7) & ~7;
+        *h = (*h + 1) & ~1;
+        pitchY = *w;
+    	pitchUV = *w >> 1;
+    	if(pitches) {
+      	    pitches[0] = pitchY;
+            pitches[1] = pitches[2] = pitchUV;
+        }
+    	sizeY = pitchY * (*h);
+    	sizeUV = pitchUV * ((*h) >> 1);
+    	if(offsets) {
+          offsets[0] = 0;
+          offsets[1] = sizeY;
+          offsets[2] = sizeY + sizeUV;
+        }
+        size = sizeY + (sizeUV << 1);
+    	break;
+    case PIXEL_FMT_YUY2:
+    case PIXEL_FMT_UYVY:
+    case PIXEL_FMT_RGB5:
+    case PIXEL_FMT_RGB6:
+    default:
+        *w = (*w + 1) & ~1;
+        pitchY = *w << 1;
+    	if(pitches) pitches[0] = pitchY;
+    	if(offsets) offsets[0] = 0;
+    	size = pitchY * (*h);
+    	break;
+    }
+
+    return size;
+}
+
+static void
+SIS6326VideoTimerCallback (ScrnInfoPtr pScrn, Time now)
+{
+    SISPtr         pSiS = SISPTR(pScrn);
+    SISPortPrivPtr pPriv = NULL;
+    unsigned char  sridx, cridx;
+
+    pSiS->VideoTimerCallback = NULL;
+
+    if(!pScrn->vtSema) return;
+
+    if(pSiS->adaptor) {
+    	pPriv = GET_PORT_PRIVATE(pScrn);
+	if(!pPriv->videoStatus)
+	   pPriv = NULL;
+    }
+
+    if(pPriv) {
+      if(pPriv->videoStatus & TIMER_MASK) {
+        UpdateCurrentTime();
+	if(pPriv->offTime < currentTime.milliseconds) {
+          if(pPriv->videoStatus & OFF_TIMER) {
+              /* Turn off the overlay */
+	      sridx = inSISREG(SISSR); cridx = inSISREG(SISCR);
+              close_overlay(pSiS, pPriv);
+	      outSISREG(SISSR, sridx); outSISREG(SISCR, cridx);
+	      pPriv->mustwait = 1;
+              pPriv->videoStatus = FREE_TIMER;
+              pPriv->freeTime = currentTime.milliseconds + FREE_DELAY;
+	      pSiS->VideoTimerCallback = SIS6326VideoTimerCallback;
+          } else
+	  if(pPriv->videoStatus & FREE_TIMER) {  
+              SIS6326FreeOverlayMemory(pScrn);
+	      pPriv->mustwait = 1;
+              pPriv->videoStatus = 0;
+          }
+        } else
+	  pSiS->VideoTimerCallback = SIS6326VideoTimerCallback;
+      }
+   }
+}
+
+/* TW: Offscreen surface stuff for v4l */
+
+static int
+SIS6326AllocSurface (
+    ScrnInfoPtr pScrn,
+    int id,
+    unsigned short w,
+    unsigned short h,
+    XF86SurfacePtr surface
+)
+{
+    SISPtr pSiS = SISPTR(pScrn);
+    SISPortPrivPtr pPriv = GET_PORT_PRIVATE(pScrn);
+    int size, depth;
+
+    if((w < IMAGE_MIN_WIDTH) || (h < IMAGE_MIN_HEIGHT))
+    	return BadValue;
+
+    if(pSiS->oldChipset < OC_SIS6326) {
+      if((w > IMAGE_MAX_WIDTH_5597) || (h > IMAGE_MAX_HEIGHT_5597))
+    	  return BadValue;
+    } else {
+      if((w > IMAGE_MAX_WIDTH) || (h > IMAGE_MAX_HEIGHT))
+    	  return BadValue;
+    }
+
+    if(pPriv->grabbedByV4L)
+    	return BadAlloc;
+
+    depth = pSiS->CurrentLayout.bitsPerPixel >> 3;
+
+    w = (w + 1) & ~1;
+    pPriv->pitch = ((w << 1) + 63) & ~63; /* Only packed pixel modes supported */
+    size = h * pPriv->pitch;
+    pPriv->linear = SIS6326AllocateOverlayMemory(pScrn, pPriv->linear, size);
+    if(!pPriv->linear)
+    	return BadAlloc;
+
+    pPriv->totalSize = size;
+
+    pPriv->offset    = pPriv->linear->offset * depth;
+
+    surface->width   = w;
+    surface->height  = h;
+    surface->pScrn   = pScrn;
+    surface->id      = id;
+    surface->pitches = &pPriv->pitch;
+    surface->offsets = &pPriv->offset;
+    surface->devPrivate.ptr = (pointer)pPriv;
+
+    close_overlay(pSiS, pPriv);
+    pPriv->videoStatus = 0;
+    REGION_EMPTY(pScrn->pScreen, &pPriv->clip);
+    pSiS->VideoTimerCallback = NULL;
+    pPriv->grabbedByV4L = TRUE;
+    return Success;
+}
+
+static int
+SIS6326StopSurface (XF86SurfacePtr surface)
+{
+    SISPortPrivPtr pPriv = (SISPortPrivPtr)(surface->devPrivate.ptr);
+    SISPtr pSiS = SISPTR(surface->pScrn);
+
+    if(pPriv->grabbedByV4L && pPriv->videoStatus) {
+        close_overlay(pSiS, pPriv);
+	pPriv->mustwait = 1;
+	pPriv->videoStatus = 0;
+    }
+    return Success;
+}
+
+static int
+SIS6326FreeSurface (XF86SurfacePtr surface)
+{
+    SISPortPrivPtr pPriv = (SISPortPrivPtr)(surface->devPrivate.ptr);
+
+    if(pPriv->grabbedByV4L) {
+	SIS6326StopSurface(surface);
+	SIS6326FreeOverlayMemory(surface->pScrn);
+	pPriv->grabbedByV4L = FALSE;
+    }
+    return Success;
+}
+
+static int
+SIS6326GetSurfaceAttribute (
+    ScrnInfoPtr pScrn,
+    Atom attribute,
+    INT32 *value
+)
+{
+    SISPortPrivPtr pPriv = GET_PORT_PRIVATE(pScrn);
+
+    return SIS6326GetPortAttribute(pScrn, attribute, value, (pointer)pPriv);
+}
+
+static int
+SIS6326SetSurfaceAttribute(
+    ScrnInfoPtr pScrn,
+    Atom attribute,
+    INT32 value
+)
+{
+    SISPortPrivPtr pPriv = GET_PORT_PRIVATE(pScrn);;
+
+    return SIS6326SetPortAttribute(pScrn, attribute, value, (pointer)pPriv);
+}
+
+static int
+SIS6326DisplaySurface (
+    XF86SurfacePtr surface,
+    short src_x, short src_y,
+    short drw_x, short drw_y,
+    short src_w, short src_h,
+    short drw_w, short drw_h,
+    RegionPtr clipBoxes
+)
+{
+   ScrnInfoPtr pScrn = surface->pScrn;
+   SISPortPrivPtr pPriv = (SISPortPrivPtr)(surface->devPrivate.ptr);
+
+   if(!pPriv->grabbedByV4L)
+    	return Success;
+
+   pPriv->drw_x = drw_x;
+   pPriv->drw_y = drw_y;
+   pPriv->drw_w = drw_w;
+   pPriv->drw_h = drw_h;
+   pPriv->src_x = src_x;
+   pPriv->src_y = src_y;
+   pPriv->src_w = src_w;
+   pPriv->src_h = src_h;
+   pPriv->id = surface->id;
+   pPriv->height = surface->height;
+   pPriv->bufAddr[0] = surface->offsets[0];
+   pPriv->currentBuf = 0;
+   pPriv->srcPitch = surface->pitches[0];
+
+   SIS6326DisplayVideo(pScrn, pPriv);
+
+   if(pPriv->autopaintColorKey) {
+   	XAAFillSolidRects(pScrn, pPriv->colorKey, GXcopy, ~0,
+                    REGION_NUM_RECTS(clipBoxes),
+                    REGION_RECTS(clipBoxes));
+   }
+
+   pPriv->videoStatus = CLIENT_VIDEO_ON;
+
+   return Success;
+}
+
+XF86OffscreenImageRec SIS6326OffscreenImages[2] =
+{
+ {
+   &SIS6326Images[0],  	/* YUV2 */
+   VIDEO_OVERLAID_IMAGES | VIDEO_CLIP_TO_VIEWPORT,
+   SIS6326AllocSurface,
+   SIS6326FreeSurface,
+   SIS6326DisplaySurface,
+   SIS6326StopSurface,
+   SIS6326GetSurfaceAttribute,
+   SIS6326SetSurfaceAttribute,
+   IMAGE_MAX_WIDTH, IMAGE_MAX_HEIGHT,
+   NUM_ATTRIBUTES,
+   &SIS6326Attributes[0]  /* Support all attributes */
+  },
+  {
+   &SIS6326Images[1],	/* UYVY */
+   VIDEO_OVERLAID_IMAGES | VIDEO_CLIP_TO_VIEWPORT,
+   SIS6326AllocSurface,
+   SIS6326FreeSurface,
+   SIS6326DisplaySurface,
+   SIS6326StopSurface,
+   SIS6326GetSurfaceAttribute,
+   SIS6326SetSurfaceAttribute,
+   IMAGE_MAX_WIDTH, IMAGE_MAX_HEIGHT,
+   NUM_ATTRIBUTES,
+   &SIS6326Attributes[0]  /* Support all attributes */
+  },
+};
+
+static void
+SIS6326InitOffscreenImages(ScreenPtr pScrn)
+{
+    xf86XVRegisterOffscreenImages(pScrn, SIS6326OffscreenImages, 2);
+}
+#else
+int sis_foo;
+#endif
+
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_accel.c b/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_accel.c
index e02bf9687..a9d305f7a 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_accel.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_accel.c
@@ -1,4 +1,37 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/sis_accel.c,v 1.23 2002/01/10 19:05:43 eich Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/sis_accel.c,v 1.25 2003/01/29 15:42:16 eich Exp $ */
+/*
+ * Copyright 1998,1999 by Alan Hourihane, Wigan, England.
+ * Parts Copyright 2002 Thomas Winischhofer, Vienna, Austria.
+ *
+ * Permission to use, copy, modify, distribute, and sell this software and its
+ * documentation for any purpose is hereby granted without fee, provided that
+ * the above copyright notice appear in all copies and that both that
+ * copyright notice and this permission notice appear in supporting
+ * documentation, and that the name of Alan Hourihane not be used in
+ * advertising or publicity pertaining to distribution of the software without
+ * specific, written prior permission.  Alan Hourihane makes no representations
+ * about the suitability of this software for any purpose.  It is provided
+ * "as is" without express or implied warranty.
+ *
+ * ALAN HOURIHANE DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+ * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+ * EVENT SHALL ALAN HOURIHANE BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+ * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
+ * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ *
+ * Authors:  Alan Hourihane, alanh@fairlite.demon.co.uk
+ *           Mike Chapman <mike@paranoia.com>,
+ *           Juanjo Santamarta <santamarta@ctv.es>,
+ *           Mitani Hiroshi <hmitani@drl.mei.co.jp>
+ *           David Thomas <davtom@dream.org.uk>
+ *	     Thomas Winischhofer <thomas@winischhofer.net>
+ */
+
+#if 0
+#define CTSCE		/* TW: Include enhanced color expansion code */
+#endif			/*     This produces drawing errors sometimes */
 
 #include "xf86.h"
 #include "xf86_OSproc.h"
@@ -7,11 +40,11 @@
 #include "xf86PciInfo.h"
 #include "xf86Pci.h"
 
+#include "sis_accel.h"
 #include "sis_regs.h"
 #include "sis.h"
 #include "xaarop.h"
 
-Bool SiSAccelInit(ScreenPtr pScreen);
 static void SiSSync(ScrnInfoPtr pScrn);
 static void SiSSetupForFillRectSolid(ScrnInfoPtr pScrn, int color,
                 int rop, unsigned int planemask);
@@ -23,7 +56,7 @@ static void SiSSetupForScreenToScreenCopy(ScrnInfoPtr pScrn,
 static void SiSSubsequentScreenToScreenCopy(ScrnInfoPtr pScrn,
                 int x1, int y1, int x2,
                 int y2, int w, int h);
-static void SiSSetupForMono8x8PatternFill(ScrnInfoPtr pScrn, 
+static void SiSSetupForMono8x8PatternFill(ScrnInfoPtr pScrn,
                 int patternx, int patterny, int fg, int bg, 
                 int rop, unsigned int planemask);
 static void SiSSubsequentMono8x8PatternFillRect(ScrnInfoPtr pScrn, 
@@ -38,37 +71,60 @@ static void SiSSubsequentScreenToScreenColorExpandFill( ScrnInfoPtr pScrn,
                 int srcx, int srcy, int offset );
 #endif
 static void SiSSetClippingRectangle ( ScrnInfoPtr pScrn,
-                    int left, int top, int right, int bottom);
+                int left, int top, int right, int bottom);
 static void SiSDisableClipping (ScrnInfoPtr pScrn);
-static void SiSSetupForSolidLine(ScrnInfoPtr pScrn, 
+static void SiSSetupForSolidLine(ScrnInfoPtr pScrn,
                 int color, int rop, unsigned int planemask);
 static void SiSSubsequentSolidTwoPointLine(ScrnInfoPtr pScrn,
-        int x1, int y1, int x2, int y2, int flags);
+                int x1, int y1, int x2, int y2, int flags);
 static void SiSSubsequentSolidHorVertLine(ScrnInfoPtr pScrn,
-        int x, int y, int len, int dir);
-
+                int x, int y, int len, int dir);
+#ifdef CTSCE
+static void SiSSetupForScanlineCPUToScreenColorExpandFill(ScrnInfoPtr pScrn,
+                                int fg, int bg, int rop,
+                                unsigned int planemask);
+static void SiSSubsequentScanlineCPUToScreenColorExpandFill(ScrnInfoPtr pScrn,
+                                int x, int y, int w, int h,
+                                int skipleft);
+static void SiSSubsequentColorExpandScanline(ScrnInfoPtr pScrn, int bufno);
+#endif
 
-Bool 
+Bool
 SiSAccelInit(ScreenPtr pScreen)
 {
-    XAAInfoRecPtr infoPtr;
-    ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
-    SISPtr pSiS = SISPTR(pScrn);
-    BoxRec AvailFBArea;
-    int offset, topFB;
+    XAAInfoRecPtr  infoPtr;
+    ScrnInfoPtr    pScrn = xf86Screens[pScreen->myNum];
+    SISPtr         pSiS = SISPTR(pScrn);
+    BoxRec         AvailFBArea;
+    int            topFB, i;
+    int            reservedFbSize;
+    int            UsableFbSize;
+    unsigned char  *AvailBufBase;
 
     pSiS->AccelInfoPtr = infoPtr = XAACreateInfoRec();
-    if (!infoPtr) 
-        return FALSE;
+    if (!infoPtr)  return FALSE;
+
+    infoPtr->Flags = LINEAR_FRAMEBUFFER |
+  		     OFFSCREEN_PIXMAPS |
+  		     PIXMAP_CACHE;
 
-    infoPtr->Flags = PIXMAP_CACHE |
-             OFFSCREEN_PIXMAPS |
-             LINEAR_FRAMEBUFFER;
- 
+    /* Sync */
     infoPtr->Sync = SiSSync;
-    /* Clipping and lines only works on 5597 and 6326 
+
+    /* Screen To Screen copy */
+    infoPtr->SetupForScreenToScreenCopy =  SiSSetupForScreenToScreenCopy;
+    infoPtr->SubsequentScreenToScreenCopy = SiSSubsequentScreenToScreenCopy;
+    infoPtr->ScreenToScreenCopyFlags = NO_TRANSPARENCY | NO_PLANEMASK;
+
+    /* Solid fill */
+    infoPtr->SetupForSolidFill = SiSSetupForFillRectSolid;
+    infoPtr->SubsequentSolidFillRect = SiSSubsequentFillRectSolid;
+    infoPtr->SolidFillFlags = NO_PLANEMASK;
+
+    /* On 5597/5598 and 6326, clipping and lines only work
        for 1024, 2048, 4096 logical width */
-    if  (pSiS->ValidWidth) { 
+    if(pSiS->ValidWidth) {
+        /* Clipping */
         infoPtr->SetClippingRectangle = SiSSetClippingRectangle;
         infoPtr->DisableClipping = SiSDisableClipping;
         infoPtr->ClippingFlags =  
@@ -77,135 +133,188 @@ SiSAccelInit(ScreenPtr pScreen)
                     HARDWARE_CLIP_MONO_8x8_FILL |
                     HARDWARE_CLIP_SOLID_FILL  ;
 
-    /* Solid Lines */               
-    infoPtr->SolidLineFlags =   NO_PLANEMASK |
-                    BIT_ORDER_IN_BYTE_MSBFIRST;
-
-    infoPtr->SetupForSolidLine = SiSSetupForSolidLine;
-    infoPtr->SubsequentSolidTwoPointLine = SiSSubsequentSolidTwoPointLine;
-    infoPtr->SubsequentSolidHorVertLine = SiSSubsequentSolidHorVertLine;
+    	/* Solid Lines */
+    	infoPtr->SetupForSolidLine = SiSSetupForSolidLine;
+    	infoPtr->SubsequentSolidTwoPointLine = SiSSubsequentSolidTwoPointLine;
+    	infoPtr->SubsequentSolidHorVertLine = SiSSubsequentSolidHorVertLine;
+	infoPtr->SolidLineFlags = NO_PLANEMASK;
     }
 
-    infoPtr->SolidFillFlags = NO_PLANEMASK;
-    infoPtr->SetupForSolidFill = SiSSetupForFillRectSolid;
-    infoPtr->SubsequentSolidFillRect = SiSSubsequentFillRectSolid;
-    
-    infoPtr->ScreenToScreenCopyFlags = NO_TRANSPARENCY | NO_PLANEMASK;
-    infoPtr->SetupForScreenToScreenCopy =   
-                SiSSetupForScreenToScreenCopy;
-    infoPtr->SubsequentScreenToScreenCopy =         
-                SiSSubsequentScreenToScreenCopy;
-
-    if (pScrn->bitsPerPixel != 24) {
-        infoPtr->Mono8x8PatternFillFlags =
-                    NO_PLANEMASK | 
+    if(pScrn->bitsPerPixel != 24) {
+        /* 8x8 mono pattern */
+        infoPtr->SetupForMono8x8PatternFill = SiSSetupForMono8x8PatternFill;
+        infoPtr->SubsequentMono8x8PatternFillRect = SiSSubsequentMono8x8PatternFillRect;
+	infoPtr->Mono8x8PatternFillFlags =
+                    NO_PLANEMASK |
                     HARDWARE_PATTERN_PROGRAMMED_BITS |
                     HARDWARE_PATTERN_PROGRAMMED_ORIGIN |
                     BIT_ORDER_IN_BYTE_MSBFIRST;
-        infoPtr->SetupForMono8x8PatternFill =
-                SiSSetupForMono8x8PatternFill;
-        infoPtr->SubsequentMono8x8PatternFillRect = 
-                SiSSubsequentMono8x8PatternFillRect;
     }
 
-#if 0 /* Don't work until we implement skipleft */
-    if (pScrn->bitsPerPixel != 24) {
-        infoPtr->ScreenToScreenColorExpandFillFlags =  GXCOPY_ONLY | 
-                    CPU_TRANSFER_PAD_DWORD |
-                    SCANLINE_PAD_DWORD |
-                    NO_PLANEMASK | 
-                    HARDWARE_PATTERN_PROGRAMMED_BITS |
-                    HARDWARE_PATTERN_PROGRAMMED_ORIGIN |
-                    BIT_ORDER_IN_BYTE_MSBFIRST;
-
-        infoPtr->SetupForScreenToScreenColorExpandFill =
-                    SiSSetupForScreenToScreenColorExpandFill;
-        infoPtr->SubsequentScreenToScreenColorExpandFill = 
-                    SiSSubsequentScreenToScreenColorExpandFill;
+#ifdef CTSCE
+    if(pScrn->bitsPerPixel != 24) {
+       /* TW: per-scanline color expansion (using indirect method) */
+       pSiS->ColorExpandBufferNumber = 4;
+       pSiS->ColorExpandBufferCountMask = 0x03;
+       pSiS->PerColorExpandBufferSize = ((pScrn->virtualX + 31) / 32) * 4;
+
+       infoPtr->NumScanlineColorExpandBuffers = pSiS->ColorExpandBufferNumber;
+       infoPtr->ScanlineColorExpandBuffers = (unsigned char **)&pSiS->ColorExpandBufferAddr[0];
+
+       infoPtr->SetupForScanlineCPUToScreenColorExpandFill =
+	                            SiSSetupForScanlineCPUToScreenColorExpandFill;
+       infoPtr->SubsequentScanlineCPUToScreenColorExpandFill =
+	                            SiSSubsequentScanlineCPUToScreenColorExpandFill;
+       infoPtr->SubsequentColorExpandScanline =
+	                            SiSSubsequentColorExpandScanline;
+       infoPtr->ScanlineCPUToScreenColorExpandFillFlags =
+	    NO_PLANEMASK |
+	    CPU_TRANSFER_PAD_DWORD |
+	    SCANLINE_PAD_DWORD |
+	    BIT_ORDER_IN_BYTE_MSBFIRST |
+	    LEFT_EDGE_CLIPPING;
+    } else {
+       pSiS->ColorExpandBufferNumber = 0;
     }
+#else
+    pSiS->ColorExpandBufferNumber = 0;
 #endif
 
+    topFB = pSiS->maxxfbmem;
+
+    reservedFbSize = pSiS->ColorExpandBufferNumber * pSiS->PerColorExpandBufferSize;
+
+    UsableFbSize = topFB - reservedFbSize;
+
+    /* Layout: (Sizes do not reflect correct proportions)
+     * |--------------++++++++++++++++++++|  ====================~~~~~~~~~~~~|
+     *   UsableFbSize  ColorExpandBuffers |        TurboQueue     HWCursor
+     *                                  topFB
+     */
+
+    if(pSiS->ColorExpandBufferNumber) {
+      AvailBufBase = pSiS->FbBase + UsableFbSize;
+      for (i = 0; i < pSiS->ColorExpandBufferNumber; i++) {
+	  pSiS->ColorExpandBufferAddr[i] = AvailBufBase +
+		    i * pSiS->PerColorExpandBufferSize;
+	  pSiS->ColorExpandBufferScreenOffset[i] = UsableFbSize +
+		    i * pSiS->PerColorExpandBufferSize;
+      }
+    }
     AvailFBArea.x1 = 0;
     AvailFBArea.y1 = 0;
     AvailFBArea.x2 = pScrn->displayWidth;
-    if (pSiS->HWCursor || pSiS->TurboQueue)
-        offset = 262144;
-    else 
-        offset = 0;
-    
-    topFB = (pSiS->maxxfbmem >= (pSiS->FbMapSize - offset)) ?
-	pSiS->maxxfbmem : pSiS->FbMapSize - offset;
-    AvailFBArea.y2 = (topFB) / (pScrn->displayWidth *
-                      pScrn->bitsPerPixel / 8);
+    AvailFBArea.y2 = UsableFbSize / (pScrn->displayWidth * pScrn->bitsPerPixel / 8) - 1;
 
     if (AvailFBArea.y2 < 0)
 	AvailFBArea.y2 = 32767;
 
+    if(AvailFBArea.y2 < pScrn->currentMode->VDisplay) {
+	xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+	 	"Not enough video RAM for accelerator. At least "
+		"%dKB needed, %dKB available\n",
+		((((pScrn->displayWidth * pScrn->bitsPerPixel/8)   /* TW: +8 for make it sure */
+		     * pScrn->currentMode->VDisplay) + reservedFbSize) / 1024) + 8,
+		pSiS->maxxfbmem/1024);
+	pSiS->NoAccel = TRUE;
+	pSiS->NoXvideo = TRUE;
+	XAADestroyInfoRec(pSiS->AccelInfoPtr);
+	pSiS->AccelInfoPtr = NULL;
+	return FALSE;
+    }
+
+    xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+	   "Frame Buffer From (%d,%d) To (%d,%d)\n",
+	   AvailFBArea.x1, AvailFBArea.y1, AvailFBArea.x2, AvailFBArea.y2);
+
     xf86InitFBManager(pScreen, &AvailFBArea);
 
     return(XAAInit(pScreen, infoPtr));
 }
 
+/* sync */
 static void 
 SiSSync(ScrnInfoPtr pScrn) {
     SISPtr pSiS = SISPTR(pScrn);
     sisBLTSync;
 }
 
-static void 
-SiSSetupForFillRectSolid(ScrnInfoPtr pScrn, int color, int rop, 
-             unsigned int planemask)
+/* Clipping */
+static void SiSSetClippingRectangle ( ScrnInfoPtr pScrn,
+                int left, int top, int right, int bottom)
 {
     SISPtr pSiS = SISPTR(pScrn);
 
     sisBLTSync;
-    sisSETFGCOLOR(color);
-    sisSETBGCOLOR(color);
-    sisSETROP(XAACopyROP[rop]);
-    sisSETPITCH(pScrn->displayWidth * pScrn->bitsPerPixel / 8, 
-            pScrn->displayWidth * pScrn->bitsPerPixel / 8);
-    /*
-     * If you don't support a write planemask, and have set the
-     * appropriate flag, then the planemask can be safely ignored.
-     * The same goes for the raster-op if only GXcopy is supported.
-     */
-    /*SETWRITEPLANEMASK(planemask);*/
+    sisSETCLIPTOP(left,top);
+    sisSETCLIPBOTTOM(right,bottom);
+    pSiS->ClipEnabled = TRUE;
 }
 
-static void 
-SiSSubsequentFillRectSolid(ScrnInfoPtr pScrn, int x, int y, int w, int h)
+static void SiSDisableClipping (ScrnInfoPtr pScrn)
 {
     SISPtr pSiS = SISPTR(pScrn);
-    int destaddr, op;
-
-    destaddr = y * pScrn->displayWidth + x;
-    op = sisCMDBLT | sisSRCBG | sisTOP2BOTTOM | sisLEFT2RIGHT;
-    if (pSiS->ClipEnabled) 
-        op |= sisCLIPINTRN | sisCLIPENABL;
-    destaddr *= (pScrn->bitsPerPixel / 8);
-
-    sisBLTSync;
-    sisSETHEIGHTWIDTH(h-1, w * (pScrn->bitsPerPixel/8)-1);
-    sisSETDSTADDR(destaddr);
-    sisSETCMD(op);
+    pSiS->ClipEnabled = FALSE;
 }
 
-static void 
-SiSSetupForScreenToScreenCopy(ScrnInfoPtr pScrn, int xdir, int ydir, 
+static const int sisALUConv[] =
+{
+    0x00,       /* dest = 0;            0,      GXclear,        0 */
+    0x88,       /* dest &= src;         DSa,    GXand,          0x1 */
+    0x44,       /* dest = src & ~dest;  SDna,   GXandReverse,   0x2 */
+    0xCC,       /* dest = src;          S,      GXcopy,         0x3 */
+    0x22,       /* dest &= ~src;        DSna,   GXandInverted,  0x4 */
+    0xAA,       /* dest = dest;         D,      GXnoop,         0x5 */
+    0x66,       /* dest = ^src;         DSx,    GXxor,          0x6 */
+    0xEE,       /* dest |= src;         DSo,    GXor,           0x7 */
+    0x11,       /* dest = ~src & ~dest; DSon,   GXnor,          0x8 */
+    0x99,       /* dest ^= ~src ;       DSxn,   GXequiv,        0x9 */
+    0x55,       /* dest = ~dest;        Dn,     GXInvert,       0xA */
+    0xDD,       /* dest = src|~dest ;   SDno,   GXorReverse,    0xB */
+    0x33,       /* dest = ~src;         Sn,     GXcopyInverted, 0xC */
+    0xBB,       /* dest |= ~src;        DSno,   GXorInverted,   0xD */
+    0x77,       /* dest = ~src|~dest;   DSan,   GXnand,         0xE */
+    0xFF,       /* dest = 0xFF;         1,      GXset,          0xF */
+};
+/* same ROP but with Pattern as Source */
+static const int sisPatALUConv[] =
+{
+    0x00,       /* dest = 0;            0,      GXclear,        0 */
+    0xA0,       /* dest &= src;         DPa,    GXand,          0x1 */
+    0x50,       /* dest = src & ~dest;  PDna,   GXandReverse,   0x2 */
+    0xF0,       /* dest = src;          P,      GXcopy,         0x3 */
+    0x0A,       /* dest &= ~src;        DPna,   GXandInverted,  0x4 */
+    0xAA,       /* dest = dest;         D,      GXnoop,         0x5 */
+    0x5A,       /* dest = ^src;         DPx,    GXxor,          0x6 */
+    0xFA,       /* dest |= src;         DPo,    GXor,           0x7 */
+    0x05,       /* dest = ~src & ~dest; DPon,   GXnor,          0x8 */
+    0xA5,       /* dest ^= ~src ;       DPxn,   GXequiv,        0x9 */
+    0x55,       /* dest = ~dest;        Dn,     GXInvert,       0xA */
+    0xF5,       /* dest = src|~dest ;   PDno,   GXorReverse,    0xB */
+    0x0F,       /* dest = ~src;         Pn,     GXcopyInverted, 0xC */
+    0xAF,       /* dest |= ~src;        DPno,   GXorInverted,   0xD */
+    0x5F,       /* dest = ~src|~dest;   DPan,   GXnand,         0xE */
+    0xFF,       /* dest = 0xFF;         1,      GXset,          0xF */
+};
+
+
+/* Screen to screen copy */
+static void
+SiSSetupForScreenToScreenCopy(ScrnInfoPtr pScrn, int xdir, int ydir,
                 int rop, unsigned int planemask,
                 int transparency_color)
 {
     SISPtr pSiS = SISPTR(pScrn);
     sisBLTSync;
-    sisSETPITCH(pScrn->displayWidth * pScrn->bitsPerPixel / 8, 
-            pScrn->displayWidth * pScrn->bitsPerPixel / 8);
+    sisSETPITCH(pSiS->scrnOffset, pSiS->scrnOffset);
+
     sisSETROP(XAACopyROP[rop]);
     pSiS->Xdirection = xdir;
     pSiS->Ydirection = ydir;
 }
 
-static void 
-SiSSubsequentScreenToScreenCopy(ScrnInfoPtr pScrn, int x1, int y1, int x2, 
+static void
+SiSSubsequentScreenToScreenCopy(ScrnInfoPtr pScrn, int x1, int y1, int x2,
                 int y2, int w, int h)
 {
     SISPtr pSiS = SISPTR(pScrn);
@@ -213,16 +322,16 @@ SiSSubsequentScreenToScreenCopy(ScrnInfoPtr pScrn, int x1, int y1, int x2,
     int op ;
 
     op = sisCMDBLT | sisSRCVIDEO;
-    if (pSiS->Ydirection == -1) {
+    if(pSiS->Ydirection == -1) {
         op |= sisBOTTOM2TOP;
-        srcaddr = (y1 + h - 1) * pScrn->displayWidth;
-        destaddr = (y2 + h - 1) * pScrn->displayWidth;
+	srcaddr = (y1 + h - 1) * pSiS->CurrentLayout.displayWidth;
+        destaddr = (y2 + h - 1) * pSiS->CurrentLayout.displayWidth;
     } else {
         op |= sisTOP2BOTTOM;
-        srcaddr = y1 * pScrn->displayWidth;
-        destaddr = y2 * pScrn->displayWidth;
+	srcaddr = y1 * pSiS->CurrentLayout.displayWidth;
+        destaddr = y2 * pSiS->CurrentLayout.displayWidth;
     }
-    if (pSiS->Xdirection == -1) {
+    if(pSiS->Xdirection == -1) {
         op |= sisRIGHT2LEFT;
         srcaddr += x1 + w - 1;
         destaddr += x2 + w - 1;
@@ -231,22 +340,58 @@ SiSSubsequentScreenToScreenCopy(ScrnInfoPtr pScrn, int x1, int y1, int x2,
         srcaddr += x1;
         destaddr += x2;
     }
-    if (pSiS->ClipEnabled) 
+    if (pSiS->ClipEnabled)
         op |= sisCLIPINTRN | sisCLIPENABL;
-    srcaddr *= (pScrn->bitsPerPixel/8);
-    destaddr *= (pScrn->bitsPerPixel/8);
-    if (((pScrn->bitsPerPixel/8)>1) && (pSiS->Xdirection == -1)) {
-        srcaddr += (pScrn->bitsPerPixel/8)-1;
-        destaddr += (pScrn->bitsPerPixel/8)-1;
+
+    srcaddr *= (pSiS->CurrentLayout.bitsPerPixel/8);
+    destaddr *= (pSiS->CurrentLayout.bitsPerPixel/8);
+    if(((pSiS->CurrentLayout.bitsPerPixel / 8) > 1) && (pSiS->Xdirection == -1)) {
+        srcaddr += (pSiS->CurrentLayout.bitsPerPixel/8)-1;
+        destaddr += (pSiS->CurrentLayout.bitsPerPixel/8)-1;
     }
 
     sisBLTSync;
     sisSETSRCADDR(srcaddr);
     sisSETDSTADDR(destaddr);
-    sisSETHEIGHTWIDTH(h-1, w * (pScrn->bitsPerPixel/8)-1);
+    sisSETHEIGHTWIDTH(h-1, w * (pSiS->CurrentLayout.bitsPerPixel/8)-1);
+    sisSETCMD(op);
+}
+
+/* solid fill */
+static void 
+SiSSetupForFillRectSolid(ScrnInfoPtr pScrn, int color, int rop, 
+             unsigned int planemask)
+{
+    SISPtr pSiS = SISPTR(pScrn);
+
+    sisBLTSync;
+    sisSETBGROPCOL(XAACopyROP[rop], color);
+    sisSETFGROPCOL(XAACopyROP[rop], color);
+    sisSETPITCH(pSiS->scrnOffset, pSiS->scrnOffset);
+}
+
+static void 
+SiSSubsequentFillRectSolid(ScrnInfoPtr pScrn, int x, int y, int w, int h)
+{
+    SISPtr pSiS = SISPTR(pScrn);
+    int destaddr, op;
+
+    destaddr = y * pSiS->CurrentLayout.displayWidth + x;
+
+    op = sisCMDBLT | sisSRCBG | sisTOP2BOTTOM | sisLEFT2RIGHT;
+
+    if(pSiS->ClipEnabled)
+        op |= sisCLIPINTRN | sisCLIPENABL;
+
+    destaddr *= (pSiS->CurrentLayout.bitsPerPixel / 8);
+
+    sisBLTSync;
+    sisSETHEIGHTWIDTH(h-1, w * (pSiS->CurrentLayout.bitsPerPixel/8)-1);
+    sisSETDSTADDR(destaddr);
     sisSETCMD(op);
 }
 
+/* 8x8 mono */
 static void 
 SiSSetupForMono8x8PatternFill(ScrnInfoPtr pScrn, int patternx, int patterny, 
                 int fg, int bg, int rop, unsigned int planemask)
@@ -254,21 +399,17 @@ SiSSetupForMono8x8PatternFill(ScrnInfoPtr pScrn, int patternx, int patterny,
     SISPtr pSiS = SISPTR(pScrn);
     unsigned int  *patternRegPtr;
     int  i;
-    int  dstpitch;
 
     (void)XAAHelpPatternROP(pScrn, &fg, &bg, planemask, &rop);
 
-    dstpitch = pScrn->displayWidth * pScrn->bitsPerPixel / 8 ;
     sisBLTSync;
-    sisSETBGCOLOR(bg);
-    sisSETFGCOLOR(fg);
-    if (bg != -1) {
-        sisSETROPBG(0xcc);  /* copy */
+    if(bg != -1) {
+        sisSETBGROPCOL(0xcc, bg);  /* copy */
     } else {
-        sisSETROPBG(0xAA);  /* dst */
+        sisSETBGROPCOL(0xAA, bg);  /* noop */
     }
-    sisSETROPFG(rop);
-    sisSETPITCH(0, dstpitch);    
+    sisSETFGROPCOL(rop, fg);
+    sisSETPITCH(0, pSiS->scrnOffset);
     sisSETSRCADDR(0);
     patternRegPtr =  (unsigned int *)sisSETPATREG();
     pSiS->sisPatternReg[0] = pSiS->sisPatternReg[2] = patternx ;
@@ -283,28 +424,35 @@ static void
 SiSSubsequentMono8x8PatternFillRect(ScrnInfoPtr pScrn, int patternx, 
                 int patterny, int x, int y, int w, int h)
 {
-    SISPtr pSiS = SISPTR(pScrn);
-    int         dstaddr;
-    register unsigned char  *patternRegPtr ;
-    register unsigned char  *srcPatternRegPtr ;    
-    register unsigned int   *patternRegPtrL ;
-    int     i, k ;
-    unsigned short  tmp;
-    int     shift ;
-    int     op  = sisCMDCOLEXP | sisTOP2BOTTOM | sisLEFT2RIGHT | 
-                  sisPATFG | sisSRCBG ;
+    SISPtr                  pSiS = SISPTR(pScrn);
+    int                     dstaddr;
+    register unsigned char  *patternRegPtr;
+    register unsigned char  *srcPatternRegPtr;
+    register unsigned int   *patternRegPtrL;
+    int                     i, k;
+    unsigned short          tmp;
+    int                     shift;
+    int                     op  = sisCMDCOLEXP |
+                                  sisTOP2BOTTOM |
+		                  sisLEFT2RIGHT |
+                                  sisPATFG |
+		                  sisSRCBG;
+
     if (pSiS->ClipEnabled)
         op |= sisCLIPINTRN | sisCLIPENABL;
 
-    dstaddr = ( y * pScrn->displayWidth + x ) * pScrn->bitsPerPixel / 8;
+    dstaddr = ( y * pSiS->CurrentLayout.displayWidth + x ) *
+                           pSiS->CurrentLayout.bitsPerPixel / 8;
+
     sisBLTSync;
+
     patternRegPtr = sisSETPATREG();
     srcPatternRegPtr = (unsigned char *)pSiS->sisPatternReg ;
     shift = 8 - patternx ;
     for ( i = 0, k = patterny ; i < 8 ; i++, k++ ) {
         tmp = srcPatternRegPtr[k]<<8 | srcPatternRegPtr[k] ;
         tmp >>= shift ;
-        patternRegPtr[i] = tmp & 0xff ;
+        patternRegPtr[i] = tmp & 0xff;
     }
     patternRegPtrL = (unsigned int *)sisSETPATREG();
     for ( i = 2 ; i < 16 /* sisPatternHeight */; ) {
@@ -313,119 +461,21 @@ SiSSubsequentMono8x8PatternFillRect(ScrnInfoPtr pScrn, int patternx,
     }
 
     sisSETDSTADDR(dstaddr);
-    sisSETHEIGHTWIDTH(h-1, w*(pScrn->bitsPerPixel/8)-1);
+    sisSETHEIGHTWIDTH(h-1, w*(pSiS->CurrentLayout.bitsPerPixel/8)-1);
     sisSETCMD(op);
 }
 
-#if 0
-/*
- * setup for screen-to-screen color expansion
- */
-static void 
-SiSSetupForScreenToScreenColorExpandFill (ScrnInfoPtr pScrn,
-    int fg, int bg, 
-    int rop, unsigned int planemask)
-{
-    SISPtr pSiS = SISPTR(pScrn);
-    int isTransparent = (bg == -1);
-
-    /*ErrorF("SISSetupScreenToScreenColorExpand()\n");*/
-
-    /*
-     * check transparency 
-     */
-    /* becareful with rop */
-
-    sisBLTSync;
-    if (isTransparent) {
-        sisSETBGCOLOR(bg);
-        sisSETFGCOLOR(fg);
-        sisSETROPFG(0xf0);  /* pat copy */
-        sisSETROPBG(0xAA);  /* dst */
-    } else {
-        sisSETBGCOLOR(bg);
-        sisSETFGCOLOR(fg);
-        sisSETROPFG(0xf0);  /* pat copy */
-        sisSETROPBG(0xcc);  /* copy */
-    }
-}
-
-/*
- * executing screen-to-screen color expansion
- */
-static void 
-SiSSubsequentScreenToScreenColorExpandFill( ScrnInfoPtr pScrn,
-                int x, int y, int w, int h,
-                int srcx, int srcy, int offset )
-/* Offset needs to be taken into account. By now, is not used */
-{
-    SISPtr pSiS = SISPTR(pScrn);
-    int destpitch = pScrn->displayWidth * pScrn->bitsPerPixel / 8 ;
-    int srcaddr = srcy * destpitch *  + srcx ;
-    int destaddr = y * destpitch + x * pScrn->bitsPerPixel / 8;
-    int srcpitch ;
-    int ww ;
-    int widthTodo ;
-    int op ;
-
-    op  = sisCMDCOLEXP | sisTOP2BOTTOM | sisLEFT2RIGHT | sisPATFG | sisSRCBG | sisCMDENHCOLEXP ;
-    if (pSiS->ClipEnabled)
-        op |= sisCLIPINTRN | sisCLIPENABL;
-
-
-/*    ErrorF("SISSubsequentScreenToScreenColorExpand()\n"); */
-#define maxWidth 144
-    /* can't expand more than maxWidth in one time.
-       it's a work around for scanline greater than maxWidth 
-     */
-    destpitch = pScrn->displayWidth * pScrn->bitsPerPixel / 8 ;
-    srcpitch =  ((w + 31)& ~31) /8 ;
-    sisBLTSync;
-    sisSETPITCH(srcpitch, destpitch);
-    widthTodo = w ;
-    do { 
-        ww = widthTodo < maxWidth ? widthTodo : maxWidth ;
-        sisSETDSTADDR(destaddr);
-        sisSETSRCADDR(srcaddr);
-        sisSETHEIGHTWIDTH(h-1, ww*(pScrn->bitsPerPixel / 8)-1);
-        sisSETCMD(op);
-        srcaddr += ww ;
-        destaddr += ww*pScrn->bitsPerPixel / 8 ;
-        widthTodo -= ww ;
-    } while ( widthTodo > 0 ) ;
-}
-#endif
-
-static void SiSSetClippingRectangle ( ScrnInfoPtr pScrn,
-                int left, int top, int right, int bottom)
-{
-    SISPtr pSiS = SISPTR(pScrn);
-
-    sisBLTSync;
-    sisSETCLIPTOP(left,top);
-    sisSETCLIPBOTTOM(right,bottom);
-    pSiS->ClipEnabled = TRUE;
-    
-}
-
-static void SiSDisableClipping (ScrnInfoPtr pScrn)
-{
-    SISPtr pSiS = SISPTR(pScrn);
-    pSiS->ClipEnabled = FALSE;
-}
-
+/* Line */
 static void SiSSetupForSolidLine(ScrnInfoPtr pScrn, 
                 int color, int rop, unsigned int planemask)
 {
     SISPtr pSiS = SISPTR(pScrn);
 
     sisBLTSync;
-    sisSETFGCOLOR(color);
-    sisSETBGCOLOR(0);
-    sisSETROP(XAACopyROP[rop]);     /* dst */
+    sisSETBGROPCOL(XAACopyROP[rop], 0);
+    sisSETFGROPCOL(XAACopyROP[rop], color);
 }
 
-
 static void SiSSubsequentSolidTwoPointLine(ScrnInfoPtr pScrn,
             int x1, int y1, int x2, int y2, int flags)
 
@@ -433,25 +483,30 @@ static void SiSSubsequentSolidTwoPointLine(ScrnInfoPtr pScrn,
     SISPtr pSiS = SISPTR(pScrn);
     int op ;
     int major, minor, err,K1,K2, tmp;
+
     op = sisCMDLINE  | sisSRCFG;
+
     if ((flags & OMIT_LAST))
         op |= sisLASTPIX;
-    if (pSiS->ClipEnabled) 
+
+    if (pSiS->ClipEnabled)
         op |= sisCLIPINTRN | sisCLIPENABL;
+
     if ((major = x2 - x1) <= 0) {
        major = -major;
-    } else 
-        op |= sisXINCREASE;;        
+    } else
+        op |= sisXINCREASE;
+
     if ((minor = y2 - y1) <= 0) {
        minor = -minor;
-    } else 
+    } else
         op |= sisYINCREASE;
+
     if (minor >= major) {
        tmp = minor; 
        minor = major; 
        major = tmp;
-    }
-    else 
+    } else
         op |= sisXMAJOR;
 
     K1 = (minor - major)<<1;
@@ -465,31 +520,132 @@ static void SiSSubsequentSolidTwoPointLine(ScrnInfoPtr pScrn,
     sisSETLineErrorTerm((short)err);
     sisSETLineMajorCount((short)major);
     sisSETCMD(op);
-/*  sisBLTSync;*/
 }
 
-
 static void SiSSubsequentSolidHorVertLine(ScrnInfoPtr pScrn,
                                 int x, int y, int len, int dir)
 {
     SISPtr pSiS = SISPTR(pScrn);
     int destaddr, op;
 
-    destaddr = y * pScrn->displayWidth + x;
+    destaddr = y * pSiS->CurrentLayout.displayWidth + x;
+
     op = sisCMDBLT | sisSRCFG | sisTOP2BOTTOM | sisLEFT2RIGHT;
+
     if (pSiS->ClipEnabled)
         op |= sisCLIPINTRN | sisCLIPENABL;
-    destaddr *= (pScrn->bitsPerPixel / 8);
+
+    destaddr *= (pSiS->CurrentLayout.bitsPerPixel / 8);
 
     sisBLTSync;
-    sisSETPITCH(pScrn->displayWidth * pScrn->bitsPerPixel / 8, 
-        pScrn->displayWidth * pScrn->bitsPerPixel / 8);
 
-    if(dir == DEGREES_0)
-        sisSETHEIGHTWIDTH(0, len * (pScrn->bitsPerPixel>>3)-1);
-    else
-        sisSETHEIGHTWIDTH(len-1, (pScrn->bitsPerPixel>>3)-1 );
+    sisSETPITCH(pSiS->scrnOffset, pSiS->scrnOffset);
+
+    if(dir == DEGREES_0) {
+        sisSETHEIGHTWIDTH(0, len * (pSiS->CurrentLayout.bitsPerPixel >> 3) - 1);
+    } else {
+        sisSETHEIGHTWIDTH(len - 1, (pSiS->CurrentLayout.bitsPerPixel >> 3) - 1);
+    }
+
+    sisSETDSTADDR(destaddr);
+    sisSETCMD(op);
+}
+
+#ifdef CTSCE
+/* TW: ----- CPU To Screen Color Expand (scanline-wise) ------ */
+static void
+SiSSetupForScanlineCPUToScreenColorExpandFill(ScrnInfoPtr pScrn,
+		int fg, int bg, int rop, unsigned int planemask)
+{
+    SISPtr pSiS=SISPTR(pScrn);
+
+    pSiS->CommandReg = 0;
+
+    pSiS->CommandReg |= (sisCMDECOLEXP |
+  		         sisLEFT2RIGHT |
+			 sisTOP2BOTTOM);
+
+    sisBLTSync;
+
+    /* TW: The combination of flags in the following
+     *     is not understandable. However, this is the
+     *     only combination that seems to work.
+     */
+    if(bg == -1) {
+        sisSETROPBG(0xAA);             /* dst = dst (=noop) */
+	pSiS->CommandReg |= sisSRCFG;
+    } else {
+        sisSETBGROPCOL(sisPatALUConv[rop], bg);
+	pSiS->CommandReg |= sisSRCFG | sisPATBG;
+    }
+
+    sisSETFGROPCOL(sisALUConv[rop], fg);
+
+    sisSETDSTPITCH(pSiS->scrnOffset);
+}
+
+
+static void
+SiSSubsequentScanlineCPUToScreenColorExpandFill(
+                        ScrnInfoPtr pScrn, int x, int y, int w,
+                        int h, int skipleft)
+{
+    SISPtr pSiS = SISPTR(pScrn);
+    int _x0, _y0, _x1, _y1;
+    int op = pSiS->CommandReg;
+
+    if(skipleft > 0) {
+	_x0 = x + skipleft;
+	_y0 = y;
+	_x1 = x + w;
+	_y1 = y + h;
+	sisSETCLIPTOP(_x0, _y0);
+	sisSETCLIPBOTTOM(_x1, _y1);
+	op |= sisCLIPENABL;
+    } else {
+	op &= (~(sisCLIPINTRN | sisCLIPENABL));
+    }
+
+    sisSETSRCPITCH(((((w+7)/8)+3) >> 2) * 4);
+
+    sisSETHEIGHTWIDTH(1-1, (w * (pSiS->CurrentLayout.bitsPerPixel/8)) - 1);
+
+    pSiS->xcurrent = x;
+    pSiS->ycurrent = y;
+
+    pSiS->CommandReg = op;
+}
+
+static void
+SiSSubsequentColorExpandScanline(ScrnInfoPtr pScrn, int bufno)
+{
+    SISPtr pSiS = SISPTR(pScrn);
+    long   cbo = pSiS->ColorExpandBufferScreenOffset[bufno];
+    int    op = pSiS->CommandReg;
+    int    destaddr;
+
+    destaddr = (pSiS->ycurrent * pSiS->CurrentLayout.displayWidth) + pSiS->xcurrent;
+    destaddr *= (pSiS->CurrentLayout.bitsPerPixel / 8);
+
+    /* TW: Wait until there is no color expansion command in queue */
+    /* sisBLTSync; */
+
+    sisSETSRCADDR(cbo);
 
     sisSETDSTADDR(destaddr);
+
     sisSETCMD(op);
+
+    pSiS->ycurrent++;
+
+    /* TW: Wait for eventual color expand commands to finish */
+    /* (needs to be done, otherwise the data in the buffer may
+     *  be overwritten while accessed by the hardware)
+     */
+    while((MMIO_IN32(pSiS->IOBase, 0x8284) & 0x80000000)) {}
+
+    sisBLTSync;
 }
+#endif  /* CTSCE */
+
+
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_accel.h b/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_accel.h
new file mode 100644
index 000000000..e0d2d3f33
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_accel.h
@@ -0,0 +1,237 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/sis_accel.h,v 1.2 2003/01/29 15:42:16 eich Exp $ */
+/*
+ * Copyright 1998,1999 by Alan Hourihane, Wigan, England.
+ *
+ * Permission to use, copy, modify, distribute, and sell this software and its
+ * documentation for any purpose is hereby granted without fee, provided that
+ * the above copyright notice appear in all copies and that both that
+ * copyright notice and this permission notice appear in supporting
+ * documentation, and that the name of Alan Hourihane not be used in
+ * advertising or publicity pertaining to distribution of the software without
+ * specific, written prior permission.  Alan Hourihane makes no representations
+ * about the suitability of this software for any purpose.  It is provided
+ * "as is" without express or implied warranty.
+ *
+ * ALAN HOURIHANE DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+ * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+ * EVENT SHALL ALAN HOURIHANE BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+ * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
+ * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ *
+ * Authors:  Alan Hourihane, alanh@fairlite.demon.co.uk
+ *           Mike Chapman <mike@paranoia.com>,
+ *           Juanjo Santamarta <santamarta@ctv.es>,
+ *           Mitani Hiroshi <hmitani@drl.mei.co.jp>
+ *           David Thomas <davtom@dream.org.uk>
+ *	     Thomas Winischhofer <thomas@winischhofer.net>
+ */
+
+/* Definitions for the SIS engine communication. ------------------------------------ */
+
+/* For pre-530 chipsets only!!! */
+
+/* Engine Registers for 1st generation engines (5597/5598/6326) */
+const int sisReg32MMIO[] = {
+            0x8280,0x8284,0x8288,0x828C,0x8290,0x8294,
+            0x8298,0x829C,0x82A0,0x82A4,0x82A8,0x82AC
+};
+
+#define BR(x) sisReg32MMIO[x]
+
+/* These are done using Memory Mapped IO, of the registers */
+/*
+ * Modified for Sis by Xavier Ducoin (xavier@rd.lectra.fr)
+ *
+ */
+
+/* Command Reg 0 (0x82aa, [15:0]) */
+#define sisSRCBG            0x0000   /* source select */
+#define sisSRCFG            0x0001
+#define sisSRCVIDEO         0x0002
+#define sisSRCSYSTEM        0x0003
+
+#define sisPATFG            0x0004   /* pattern select */
+#define sisPATREG           0x0008
+#define sisPATBG            0x0000
+
+#define sisLEFT2RIGHT       0x0010   /* Direction select */
+#define sisRIGHT2LEFT       0x0000
+#define sisTOP2BOTTOM       0x0020
+#define sisBOTTOM2TOP       0x0000
+#define sisXINCREASE        sisLEFT2RIGHT
+#define sisYINCREASE        sisTOP2BOTTOM
+
+#define sisCLIPENABL        0x0040   /* Clipping select */
+#define sisCLIPINTRN        0x0080
+#define sisCLIPEXTRN        0x0000
+
+#define sisCMDBLT           0x0000   /* Command select */
+#define sisCMDBLTMSK        0x0100
+#define sisCMDCOLEXP        0x0200
+#define sisCMDLINE          0x0300
+#define sisFLGECOLEXP       0x2000
+#define sisCMDECOLEXP       (sisCMDCOLEXP | sisFLGECOLEXP)
+
+#define sisLASTPIX          0x0800   /* Line parameters */
+#define sisXMAJOR           0x0400
+
+
+/* Macros to do useful things with the SIS BitBLT engine */
+
+#define sisBLTSync \
+  while(MMIO_IN16(pSiS->IOBase, BR(10) + 2) & 0x4000) {}
+
+/* According to SiS 6326 2D programming guide, 16 bits position at   */
+/* 0x82A8 returns queue free. But this don't work, so don't wait     */
+/* anything when turbo-queue is enabled. If there are frequent syncs */
+/* this should work. But not for xaa_benchmark :-(     */
+
+/* TW: Bit 16 only applies to the hardware queue, not the software
+ *     (=turbo) queue.
+ */
+
+#define sisBLTWAIT \
+  if(!pSiS->TurboQueue) { \
+    while(MMIO_IN16(pSiS->IOBase, BR(10) + 2) & 0x4000) {} \
+  } else { \
+    sisBLTSync \
+  }
+
+#define sisSETPATREG() \
+   ((unsigned char *)(pSiS->IOBase + BR(11)))
+
+#define sisSETPATREGL() \
+   ((unsigned long *)(pSiS->IOBase + BR(11)))
+
+/* trigger command */
+#define sisSETCMD(op) \
+  { \
+  unsigned long temp; \
+  MMIO_OUT16(pSiS->IOBase, BR(10) + 2, op); \
+  temp = MMIO_IN32(pSiS->IOBase, BR(10)); \
+  }
+
+/* set foreground color and fg ROP */
+#define sisSETFGROPCOL(rop, color) \
+   MMIO_OUT32(pSiS->IOBase, BR(4), ((rop << 24) | (color & 0xFFFFFF)));
+
+/* set background color and bg ROP */
+#define sisSETBGROPCOL(rop, color) \
+   MMIO_OUT32(pSiS->IOBase, BR(5), ((rop << 24) | (color & 0xFFFFFF)));
+
+/* background color */
+#define sisSETBGCOLOR(bgColor) \
+   MMIO_OUT32(pSiS->IOBase, BR(5), (bgColor));
+#if 0
+  *(volatile unsigned int *)(pSiS->IOBase + BR(5)) = (bgColor)
+#endif
+
+/* foreground color */
+#define sisSETFGCOLOR(fgColor) \
+   MMIO_OUT32(pSiS->IOBase, BR(4), (fgcolor));
+#if 0
+  *(volatile unsigned int *)(pSiS->IOBase + BR(4)) = (fgColor)
+#endif
+
+/* ROP */
+#define sisSETROPFG(op) \
+   MMIO_OUT8(pSiS->IOBase, BR(4) + 3, op);
+#if 0
+  *(volatile unsigned int *)(pSiS->IOBase + BR(4)) = ((*(volatile unsigned int *)(pSiS->IOBase + BR(4)))&0xffffff) | (op<<24)
+#endif
+
+#define sisSETROPBG(op) \
+  MMIO_OUT8(pSiS->IOBase, BR(5) + 3, op);
+#if 0
+  *(volatile unsigned int *)(pSiS->IOBase + BR(5)) = ((*(volatile unsigned int *)(pSiS->IOBase + BR(5)))&0xffffff) | (op<<24)
+#endif
+
+#define sisSETROP(op) \
+   sisSETROPFG(op); sisSETROPBG(op);
+
+/* source and dest address */
+#define sisSETSRCADDR(srcAddr) \
+  MMIO_OUT32(pSiS->IOBase, BR(0), (srcAddr & 0x3FFFFFL));
+#if 0
+  *(volatile unsigned int *)(pSiS->IOBase + BR(0)) = srcAddr & 0x3FFFFFL
+#endif
+
+#define sisSETDSTADDR(dstAddr) \
+  MMIO_OUT32(pSiS->IOBase, BR(1), (dstAddr & 0x3FFFFFL));
+#if 0
+  *(volatile unsigned int *)(pSiS->IOBase + BR(1)) = dstAddr & 0x3FFFFFL
+#endif
+
+/* pitch */
+#define sisSETPITCH(srcPitch,dstPitch) \
+  MMIO_OUT32(pSiS->IOBase, BR(2), ((((dstPitch) & 0xFFFF) << 16) | ((srcPitch) & 0xFFFF)));
+#if 0
+  *(volatile unsigned int *)(pSiS->IOBase + BR(2)) = ((dstPitch&0xFFFF)<<16)| \
+      (srcPitch&0xFFFF)
+#endif
+
+#define sisSETSRCPITCH(srcPitch) \
+  MMIO_OUT16(pSiS->IOBase, BR(2), ((srcPitch) & 0xFFFF));
+
+#define sisSETDSTPITCH(dstPitch) \
+  MMIO_OUT16(pSiS->IOBase, BR(2) + 2, ((dstPitch) & 0xFFFF));
+
+/* Height and width
+ * According to SIS 2D Engine Programming Guide
+ * height -1, width - 1 independant of Bpp
+ */
+#define sisSETHEIGHTWIDTH(Height, Width) \
+  MMIO_OUT32(pSiS->IOBase, BR(3), ((((Height) & 0xFFFF) << 16) | ((Width) & 0xFFFF)));
+#if 0
+  *(volatile unsigned int *)(pSiS->IOBase + BR(3)) = (((Height)&0xFFFF)<<16)| \
+      ((Width)&0xFFFF)
+#endif
+
+/* Clipping */
+#define sisSETCLIPTOP(x, y) \
+   MMIO_OUT32(pSiS->IOBase, BR(8), ((((y) & 0xFFFF) << 16) | ((x) & 0xFFFF)));
+#if 0
+  *(volatile unsigned int *)(pSiS->IOBase + BR(8)) = (((y)&0xFFFF)<<16)| \
+      ((x)&0xFFFF)
+#endif
+
+#define sisSETCLIPBOTTOM(x, y) \
+   MMIO_OUT32(pSiS->IOBase, BR(9), ((((y) & 0xFFFF) << 16) | ((x) & 0xFFFF)));
+#if 0
+  *(volatile unsigned int *)(pSiS->IOBase + BR(9)) = (((y)&0xFFFF)<<16)| \
+      ((x)&0xFFFF)
+#endif
+
+/* Line drawing */
+#define sisSETXStart(XStart) \
+  MMIO_OUT32(pSiS->IOBase, BR(0), ((XStart) & 0xFFFF));
+#if 0
+  *(volatile unsigned int *)(pSiS->IOBase + BR(0)) = XStart&0xFFFF
+#endif
+
+#define sisSETYStart(YStart) \
+  MMIO_OUT32(pSiS->IOBase, BR(1), ((YStart) & 0xFFFF));
+#if 0
+  *(volatile unsigned int *)(pSiS->IOBase + BR(1)) = YStart&0xFFFF
+#endif
+
+#define sisSETLineMajorCount(MajorAxisCount) \
+   MMIO_OUT32(pSiS->IOBase, BR(3), ((MajorAxisCount) & 0xFFFF));
+#if 0
+  *(volatile unsigned int *)(pSiS->IOBase + BR(3)) = MajorAxisCount&0xFFFF
+#endif
+
+#define sisSETLineSteps(K1,K2) \
+   MMIO_OUT32(pSiS->IOBase, BR(6), ((((K1) & 0xFFFF) << 16) | ((K2) & 0xFFFF)));
+#if 0
+  *(volatile unsigned int *)(pSiS->IOBase + BR(6)) = (((K1)&0xFFFF)<<16)| \
+      ((K2)&0xFFFF)
+#endif
+
+#define sisSETLineErrorTerm(ErrorTerm) \
+   MMIO_OUT16(pSiS->IOBase, BR(7), (ErrorTerm));
+#if 0
+  *(volatile unsigned short *)(pSiS->IOBase + BR(7)) = ErrorTerm
+#endif
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_cursor.c b/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_cursor.c
index fd3f1b135..b8aed78c7 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_cursor.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_cursor.c
@@ -1,31 +1,33 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/sis_cursor.c,v 1.10 2003/01/30 21:43:33 tsi Exp $ */
 /*
  * Copyright 1998,1999 by Alan Hourihane, Wigan, England.
+ * Parts Copyright 2001, 2002 by Thomas Winischhofer, Vienna, Austria.
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
  * the above copyright notice appear in all copies and that both that
  * copyright notice and this permission notice appear in supporting
- * documentation, and that the name of Alan Hourihane not be used in
+ * documentation, and that the name of the copyright holders not be used in
  * advertising or publicity pertaining to distribution of the software without
- * specific, written prior permission.  Alan Hourihane makes no representations
+ * specific, written prior permission.  The copyright holders make no representations
  * about the suitability of this software for any purpose.  It is provided
  * "as is" without express or implied warranty.
  *
- * ALAN HOURIHANE DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+ * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
  * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
- * EVENT SHALL ALAN HOURIHANE BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+ * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
  * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
  * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  * PERFORMANCE OF THIS SOFTWARE.
  *
  * Authors:  Alan Hourihane, alanh@fairlite.demon.co.uk
- *       Mike Chapman <mike@paranoia.com>,
- *       Juanjo Santamarta <santamarta@ctv.es>,
- *       Mitani Hiroshi <hmitani@drl.mei.co.jp>
- *       David Thomas <davtom@dream.org.uk>.
+ *           Mike Chapman <mike@paranoia.com>,
+ *           Juanjo Santamarta <santamarta@ctv.es>,
+ *           Mitani Hiroshi <hmitani@drl.mei.co.jp>
+ *           David Thomas <davtom@dream.org.uk>.
+ *	     Thomas Winischhofer <thomas@winischhofer.net>:
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/sis_cursor.c,v 1.7 2002/04/04 14:05:48 eich Exp $ */
 
 #include "xf86.h"
 #include "xf86PciInfo.h"
@@ -33,19 +35,34 @@
 #include "vgaHW.h"
 
 #include "sis.h"
+#include "sis_regs.h"
 #include "sis_cursor.h"
 
+#if 0
+#define SIS300_USE_ARGB16
+#endif
 
-Bool SiSHWCursorInit(ScreenPtr pScreen);
+extern void    SISWaitRetraceCRT1(ScrnInfoPtr pScrn);
+extern void    SISWaitRetraceCRT2(ScrnInfoPtr pScrn);
 
 static void
 SiSShowCursor(ScrnInfoPtr pScrn)
 {
-        unsigned char temp;
+    SISPtr        pSiS = SISPTR(pScrn);
+    unsigned char sridx, cridx;
 
-        outb(VGA_SEQ_INDEX, 0x06);
-        temp = inb(VGA_SEQ_DATA) | 0x40;
-        outb(VGA_SEQ_DATA, temp);
+    /* TW: Backup current indices of SR and CR since we run async:ly
+     *     and might be interrupting an on-going register read/write
+     */
+    sridx = inSISREG(SISSR); cridx = inSISREG(SISCR);
+
+#ifdef UNLOCK_ALWAYS
+    sisSaveUnlockExtRegisterLock(pSiS, NULL, NULL);
+#endif
+
+    orSISIDXREG(SISSR, 0x06, 0x40);
+
+    outSISREG(SISSR, sridx); outSISREG(SISCR, cridx);
 }
 
 static void
@@ -53,40 +70,188 @@ SiS300ShowCursor(ScrnInfoPtr pScrn)
 {
     SISPtr  pSiS = SISPTR(pScrn);
 
-    sis300EnableHWCursor()
-    if (pSiS->VBFlags & CRT2_ENABLE)  {
-        sis301EnableHWCursor();
+#ifdef SISDUALHEAD
+    if(pSiS->DualHeadMode) {
+	if(pSiS->SecondHead) {
+		/* TW: Head 2 is always CRT1 */
+		if(pSiS->UseHWARGBCursor) {
+#ifdef SIS300_USE_ARGB16			
+		   sis300EnableHWARGB16Cursor()
+#else
+		   sis300EnableHWARGBCursor()
+#endif		   
+		} else {
+		   sis300EnableHWCursor()
+		}
+        } else {
+		/* TW: Head 1 is always CRT2 */
+		if(pSiS->UseHWARGBCursor) {
+#ifdef SIS300_USE_ARGB16			
+		   sis301EnableHWARGB16Cursor()
+#else
+		   sis301EnableHWARGBCursor()
+#endif		   
+		} else {
+		   sis301EnableHWCursor()
+		}
+	}
+    } else {
+#endif
+        if(pSiS->UseHWARGBCursor) {
+#ifdef SIS300_USE_ARGB16	
+	   sis300EnableHWARGB16Cursor()
+#else
+	   sis300EnableHWARGBCursor()
+#endif	   
+    	   if(pSiS->VBFlags & CRT2_ENABLE)  {
+#ifdef SIS300_USE_ARGB16 	   
+        	sis301EnableHWARGB16Cursor()
+#else
+		sis301EnableHWARGBCursor()
+#endif		
+ 	   }
+	} else {
+    	   sis300EnableHWCursor()
+    	   if(pSiS->VBFlags & CRT2_ENABLE)  {
+        	sis301EnableHWCursor()
+ 	   }
+      	}
+#ifdef SISDUALHEAD
+    }
+#endif
+}
+
+/* TW: 310/325 series */
+static void
+SiS310ShowCursor(ScrnInfoPtr pScrn)
+{
+    SISPtr  pSiS = SISPTR(pScrn);
+
+#ifdef SISDUALHEAD
+    if(pSiS->DualHeadMode) {
+	if(pSiS->SecondHead) {
+		/* TW: Head 2 is always CRT1 */
+		if(pSiS->UseHWARGBCursor) {
+		   sis310EnableHWARGBCursor()
+		} else {
+		   sis310EnableHWCursor()
+		}
+        } else {
+		/* TW: Head 1 is always CRT2 */
+		if(pSiS->UseHWARGBCursor) {
+		   sis301EnableHWARGBCursor310()
+		} else {
+		   sis301EnableHWCursor310()
+		}
+	}
+    } else {
+#endif
+        if(pSiS->UseHWARGBCursor) {
+    	   sis310EnableHWARGBCursor()
+    	   if(pSiS->VBFlags & CRT2_ENABLE)  {
+        	sis301EnableHWARGBCursor310()
+      	   }
+	} else {
+	   sis310EnableHWCursor()
+    	   if(pSiS->VBFlags & CRT2_ENABLE)  {
+        	sis301EnableHWCursor310()
+      	   }
+	}
+#ifdef SISDUALHEAD
     }
+#endif
 }
 
 static void
 SiSHideCursor(ScrnInfoPtr pScrn)
 {
-        unsigned char temp;
+    SISPtr        pSiS = SISPTR(pScrn);
+    unsigned char sridx, cridx;
+
+    sridx = inSISREG(SISSR); cridx = inSISREG(SISCR);
+
+#ifdef UNLOCK_ALWAYS
+    sisSaveUnlockExtRegisterLock(pSiS, NULL, NULL);
+#endif
 
-        outb(VGA_SEQ_INDEX, 0x06);
-        temp = inb(VGA_SEQ_DATA) & 0xBF;
-        outb(VGA_SEQ_DATA, temp);
+    andSISIDXREG(SISSR, 0x06, 0xBF);
+
+    outSISREG(SISSR, sridx); outSISREG(SISCR, cridx);
 }
 
 static void
 SiS300HideCursor(ScrnInfoPtr pScrn)
 {
     SISPtr  pSiS = SISPTR(pScrn);
+    
+#ifdef SISDUALHEAD
+    if(pSiS->DualHeadMode && (!pSiS->ForceCursorOff)) {
+	if(pSiS->SecondHead) {
+		/* TW: Head 2 is always CRT1 */
+		sis300DisableHWCursor()
+		sis300SetCursorPositionY(2000, 0)
+        } else {
+		/* TW: Head 1 is always CRT2 */
+		sis301DisableHWCursor()
+		sis301SetCursorPositionY(2000, 0)
+	}
+    } else {
+#endif
+    	sis300DisableHWCursor()
+	sis300SetCursorPositionY(2000, 0)
+    	if(pSiS->VBFlags & CRT2_ENABLE)  {
+        	sis301DisableHWCursor()
+		sis301SetCursorPositionY(2000, 0)
+    	}
+#ifdef SISDUALHEAD
+    }
+#endif
+}
+
+/* TW: 310/325 series */
+static void
+SiS310HideCursor(ScrnInfoPtr pScrn)
+{
+    SISPtr  pSiS = SISPTR(pScrn);
 
-    sis300DisableHWCursor()
-    if (pSiS->VBFlags & CRT2_ENABLE)  {
-        sis301DisableHWCursor()
+#ifdef SISDUALHEAD
+    if(pSiS->DualHeadMode && (!pSiS->ForceCursorOff)) {
+	if(pSiS->SecondHead) {
+		/* TW: Head 2 is always CRT1 */
+		sis310DisableHWCursor()
+		sis310SetCursorPositionY(2000, 0)
+        } else {
+		/* TW: Head 1 is always CRT2 */
+		sis301DisableHWCursor310()
+		sis301SetCursorPositionY310(2000, 0)
+	}
+    } else {
+#endif
+    	sis310DisableHWCursor()
+	sis310SetCursorPositionY(2000, 0)
+    	if(pSiS->VBFlags & CRT2_ENABLE) {
+        	sis301DisableHWCursor310()
+		sis301SetCursorPositionY310(2000, 0)
+    	}
+#ifdef SISDUALHEAD
     }
+#endif
 }
 
 static void
 SiSSetCursorPosition(ScrnInfoPtr pScrn, int x, int y)
 {
-    unsigned char   x_preset = 0;
-    unsigned char   y_preset = 0;
-    int         temp;
+    SISPtr        pSiS     = SISPTR(pScrn);
+    unsigned char x_preset = 0;
+    unsigned char y_preset = 0;
+    int           temp;
+    unsigned char sridx, cridx;
+
+    sridx = inSISREG(SISSR); cridx = inSISREG(SISCR);
 
+#ifdef UNLOCK_ALWAYS
+    sisSaveUnlockExtRegisterLock(pSiS, NULL, NULL);
+#endif
 
     if (x < 0) {
         x_preset = (-x);
@@ -104,23 +269,72 @@ SiSSetCursorPosition(ScrnInfoPtr pScrn, int x, int y)
     else if (pScrn->currentMode->Flags & V_DBLSCAN)
         y *= 2;
 
-    outw(VGA_SEQ_INDEX, (x&0xFF)<<8 | 0x1A);
-    outw(VGA_SEQ_INDEX, (x&0xFF00)  | 0x1B);
-    outw(VGA_SEQ_INDEX, (y&0xFF)<<8 | 0x1D);
-    outb(VGA_SEQ_INDEX, 0x1E);
-    temp = inb(VGA_SEQ_DATA) & 0xF8;
-    outw(VGA_SEQ_INDEX, ((y&0x0700) | (temp<<8))  | 0x1E);
-    outw(VGA_SEQ_INDEX, x_preset<<8 | 0x1C);
-    outw(VGA_SEQ_INDEX, y_preset<<8 | 0x1F);
+    outSISIDXREG(SISSR, 0x1A, x & 0xff);
+    outSISIDXREG(SISSR, 0x1B, (x & 0xff00) >> 8);
+    outSISIDXREG(SISSR, 0x1D, y & 0xff);
+
+    inSISIDXREG(SISSR, 0x1E, temp);
+    temp &= 0xF8;
+    outSISIDXREG(SISSR, 0x1E, temp | ((y >> 8) & 0x07));
+
+    outSISIDXREG(SISSR, 0x1C, x_preset);
+    outSISIDXREG(SISSR, 0x1F, y_preset);
+
+    outSISREG(SISSR, sridx); outSISREG(SISCR, cridx);
 }
 
 static void
 SiS300SetCursorPosition(ScrnInfoPtr pScrn, int x, int y)
 {
-    SISPtr  pSiS = SISPTR(pScrn);
+    SISPtr        pSiS = SISPTR(pScrn);
+    unsigned char x_preset = 0;
+    unsigned char y_preset = 0;
+
+    if (x < 0) {
+        x_preset = (-x);
+        x = 0;
+    }
+    if (y < 0) {
+        y_preset = (-y);
+        y = 0;
+    }
 
-    unsigned char   x_preset = 0;
-    unsigned char   y_preset = 0;
+    /* are we in interlaced/doublescan mode? */
+    if(pScrn->currentMode->Flags & V_INTERLACE)
+        y /= 2;
+    else if(pScrn->currentMode->Flags & V_DBLSCAN)
+        y *= 2;
+
+#ifdef SISDUALHEAD
+    if (pSiS->DualHeadMode) {
+	if (pSiS->SecondHead) {
+		/* TW: Head 2 is always CRT1 */
+		sis300SetCursorPositionX(x, x_preset)
+    		sis300SetCursorPositionY(y, y_preset)
+        } else {
+		/* TW: Head 1 is always CRT2 */
+		sis301SetCursorPositionX(x+13, x_preset)
+      		sis301SetCursorPositionY(y, y_preset)
+	}
+    } else {
+#endif
+    	sis300SetCursorPositionX(x, x_preset)
+    	sis300SetCursorPositionY(y, y_preset)
+    	if(pSiS->VBFlags & CRT2_ENABLE) {
+      		sis301SetCursorPositionX(x+13, x_preset)
+      		sis301SetCursorPositionY(y, y_preset)
+    	}
+#ifdef SISDUALHEAD
+    }
+#endif
+}
+
+static void
+SiS310SetCursorPosition(ScrnInfoPtr pScrn, int x, int y)
+{
+    SISPtr        pSiS = SISPTR(pScrn);
+    unsigned char x_preset = 0;
+    unsigned char y_preset = 0;
 
     if (x < 0) {
         x_preset = (-x);
@@ -132,25 +346,48 @@ SiS300SetCursorPosition(ScrnInfoPtr pScrn, int x, int y)
     }
 
     /* are we in interlaced/doublescan mode? */
-    if (pScrn->currentMode->Flags & V_INTERLACE)
+    if(pScrn->currentMode->Flags & V_INTERLACE)
         y /= 2;
-    else if (pScrn->currentMode->Flags & V_DBLSCAN)
+    else if(pScrn->currentMode->Flags & V_DBLSCAN)
         y *= 2;
 
-    sis300SetCursorPositionX(x, x_preset)
-    sis300SetCursorPositionY(y, y_preset)
-    if (pSiS->VBFlags & CRT2_ENABLE)  {
-        sis301SetCursorPositionX(x+13, x_preset)
-        sis301SetCursorPositionY(y, y_preset)
+#ifdef SISDUALHEAD
+    if (pSiS->DualHeadMode) {
+	if (pSiS->SecondHead) {
+		/* TW: Head 2 is always CRT1 */
+		sis310SetCursorPositionX(x, x_preset)
+    		sis310SetCursorPositionY(y, y_preset)
+        } else {
+		/* TW: Head 1 is always CRT2 */
+		sis301SetCursorPositionX310(x + 17, x_preset)
+      		sis301SetCursorPositionY310(y, y_preset)
+	}
+    } else {
+#endif
+    	sis310SetCursorPositionX(x, x_preset)
+    	sis310SetCursorPositionY(y, y_preset)
+    	if (pSiS->VBFlags & CRT2_ENABLE) {
+      		sis301SetCursorPositionX310(x + 17, x_preset)
+      		sis301SetCursorPositionY310(y, y_preset)
+    	}
+#ifdef SISDUALHEAD
     }
+#endif
 }
 
 static void
 SiSSetCursorColors(ScrnInfoPtr pScrn, int bg, int fg)
 {
+    SISPtr        pSiS = SISPTR(pScrn);
     unsigned char f_red, f_green, f_blue;
     unsigned char b_red, b_green, b_blue;
+    unsigned char sridx, cridx;
+
+    sridx = inSISREG(SISSR); cridx = inSISREG(SISCR);
 
+#ifdef UNLOCK_ALWAYS
+    sisSaveUnlockExtRegisterLock(pSiS, NULL, NULL);
+#endif
 
     f_red   = (fg & 0x00FF0000) >> (16+2);
     f_green = (fg & 0x0000FF00) >> (8+2);
@@ -159,12 +396,14 @@ SiSSetCursorColors(ScrnInfoPtr pScrn, int bg, int fg)
     b_green = (bg & 0x0000FF00) >> (8+2);
     b_blue  = (bg & 0x000000FF) >> 2;
 
-    outw(VGA_SEQ_INDEX, b_red   <<8  | 0x14);
-    outw(VGA_SEQ_INDEX, b_green <<8  | 0x15);
-    outw(VGA_SEQ_INDEX, b_blue  <<8  | 0x16);
-    outw(VGA_SEQ_INDEX, f_red   <<8  | 0x17);
-    outw(VGA_SEQ_INDEX, f_green <<8  | 0x18);
-    outw(VGA_SEQ_INDEX, f_blue  <<8  | 0x19);
+    outSISIDXREG(SISSR, 0x14, b_red);
+    outSISIDXREG(SISSR, 0x15, b_green);
+    outSISIDXREG(SISSR, 0x16, b_blue);
+    outSISIDXREG(SISSR, 0x17, f_red);
+    outSISIDXREG(SISSR, 0x18, f_green);
+    outSISIDXREG(SISSR, 0x19, f_blue);
+
+    outSISREG(SISSR, sridx); outSISREG(SISCR, cridx);
 }
 
 static void
@@ -172,45 +411,107 @@ SiS300SetCursorColors(ScrnInfoPtr pScrn, int bg, int fg)
 {
     SISPtr pSiS = SISPTR(pScrn);
 
-    sis300SetCursorBGColor(bg)
-    sis300SetCursorFGColor(fg)
-    if (pSiS->VBFlags & CRT2_ENABLE)  {
-        sis301SetCursorBGColor(bg)
-        sis301SetCursorFGColor(fg)
+#ifdef SISDUALHEAD
+    if(pSiS->DualHeadMode) {
+	if(pSiS->SecondHead) {
+		/* TW: Head 2 is always CRT1 */
+    		sis300SetCursorBGColor(bg)
+    		sis300SetCursorFGColor(fg)
+        } else {
+		/* TW: Head 1 is always CRT2 */
+        	sis301SetCursorBGColor(bg)
+        	sis301SetCursorFGColor(fg)
+	}
+    } else {
+#endif
+    	sis300SetCursorBGColor(bg)
+    	sis300SetCursorFGColor(fg)
+    	if(pSiS->VBFlags & CRT2_ENABLE)  {
+        	sis301SetCursorBGColor(bg)
+        	sis301SetCursorFGColor(fg)
+    	}
+#ifdef SISDUALHEAD
     }
+#endif
 }
 
 static void
-SiSLoadCursorImage(ScrnInfoPtr pScrn, unsigned char *src)
+SiS310SetCursorColors(ScrnInfoPtr pScrn, int bg, int fg)
 {
     SISPtr pSiS = SISPTR(pScrn);
-    int cursor_addr;
-    unsigned char   temp;
+
+#ifdef SISDUALHEAD
+    if(pSiS->DualHeadMode) {
+	if(pSiS->SecondHead) {
+		/* TW: Head 2 is always CRT1 */
+    		sis310SetCursorBGColor(bg)
+    		sis310SetCursorFGColor(fg)
+        } else {
+		/* TW: Head 1 is always CRT2 */
+        	sis301SetCursorBGColor310(bg)
+        	sis301SetCursorFGColor310(fg)
+	}
+    } else {
+#endif
+    	sis310SetCursorBGColor(bg)
+    	sis310SetCursorFGColor(fg)
+    	if(pSiS->VBFlags & CRT2_ENABLE)  {
+        	sis301SetCursorBGColor310(bg)
+        	sis301SetCursorFGColor310(fg)
+    	}
+#ifdef SISDUALHEAD
+    }
+#endif
+}
+
+static void
+SiSLoadCursorImage(ScrnInfoPtr pScrn, unsigned char *src)
+{
+    SISPtr        pSiS = SISPTR(pScrn);
+    int           cursor_addr;
+    unsigned char temp;
+    unsigned char sridx, cridx;
+
+    sridx = inSISREG(SISSR); cridx = inSISREG(SISCR);
+
+#ifdef UNLOCK_ALWAYS
+    sisSaveUnlockExtRegisterLock(pSiS, NULL, NULL);
+#endif
 
     cursor_addr = pScrn->videoRam - 1;
-    memcpy((unsigned char *)pSiS->FbBase + cursor_addr * 1024, src, 1024);
+    if(pSiS->CurrentLayout.mode->Flags & V_DBLSCAN) {
+      int i;
+      for(i = 0; i < 32; i++) {
+         memcpy((unsigned char *)pSiS->FbBase + (cursor_addr * 1024) + (32 * i),
+	            src + (16 * i), 16);
+         memcpy((unsigned char *)pSiS->FbBase + (cursor_addr * 1024) + (32 * i) + 16,
+	 	    src + (16 * i), 16);
+      }
+    } else {
+      memcpy((unsigned char *)pSiS->FbBase + (cursor_addr * 1024), src, 1024);
+    }
 
     /* copy bits [21:18] into the top bits of SR38 */
-    outb(VGA_SEQ_INDEX, 0x38);
-    temp = inb(VGA_SEQ_DATA) & 0x0F;
-    outb(VGA_SEQ_DATA, temp | ((cursor_addr & 0xF00) >> 4));
+    inSISIDXREG(SISSR, 0x38, temp);
+    temp &= 0x0F;
+    outSISIDXREG(SISSR, 0x38, temp | ((cursor_addr & 0xF00) >> 4));
 
-    /* if set, store the bit [22] to SR3E */
-    if (cursor_addr & 0x1000) {
-        outb(VGA_SEQ_INDEX, 0x3E);
-                temp = inb(VGA_SEQ_DATA) | 0x04;
-                outb(VGA_SEQ_DATA, temp);
+    if(pSiS->Chipset == PCI_CHIP_SIS530) {
+       /* store the bit [22] to SR3E */
+       if(cursor_addr & 0x1000) {
+          orSISIDXREG(SISSR, 0x3E, 0x04);
+       } else {
+          andSISIDXREG(SISSR, 0x3E, ~0x04);
+       }
     }
 
     /* set HW cursor pattern, use pattern 0xF */
-    outb(VGA_SEQ_INDEX, 0x1E);
-        temp = inb(VGA_SEQ_DATA) | 0xF0;
-        outb(VGA_SEQ_DATA, temp);
+    orSISIDXREG(SISSR, 0x1E, 0xF0);
 
     /* disable the hardware cursor side pattern */
-    outb(VGA_SEQ_INDEX, 0x1E);
-        temp = inb(VGA_SEQ_DATA) & 0xF7;
-        outb(VGA_SEQ_DATA, temp);
+    andSISIDXREG(SISSR, 0x1E, 0xF7);
+
+    outSISREG(SISSR, sridx); outSISREG(SISCR, cridx);
 }
 
 static void
@@ -218,44 +519,493 @@ SiS300LoadCursorImage(ScrnInfoPtr pScrn, unsigned char *src)
 {
     SISPtr pSiS = SISPTR(pScrn);
     int cursor_addr;
+    CARD32 status1 = 0, status2 = 0;
 
-    if (pSiS->TurboQueue)
-        cursor_addr = pScrn->videoRam-512-1;    /* 1K boundary */
-    else
-        cursor_addr = pScrn->videoRam - 1;  /* 1K boundary */
+#ifdef SISDUALHEAD
+    SISEntPtr pSiSEnt = pSiS->entityPrivate;
+#endif
+    
+    cursor_addr = pScrn->videoRam - pSiS->cursorOffset - (pSiS->CursorSize/1024);  /* 1K boundary */
 
-    memcpy((unsigned char *)pSiS->FbBase + cursor_addr * 1024, src, 1024);
-    sis300SetCursorAddress(cursor_addr)
-    sis300SetCursorPatternSelect(0)
-    if (pSiS->VBFlags & CRT2_ENABLE)  {
+#ifdef SISDUALHEAD
+    if(pSiS->DualHeadMode) {
+    	/* TW: Use the global (real) FbBase in DHM */
+	if(pSiS->CurrentLayout.mode->Flags & V_DBLSCAN) {
+           int i;
+           for(i = 0; i < 32; i++) {
+              memcpy((unsigned char *)pSiSEnt->FbBase + (cursor_addr * 1024) + (32 * i),
+	               src + (16 * i), 16);
+              memcpy((unsigned char *)pSiSEnt->FbBase + (cursor_addr * 1024) + (32 * i) + 16,
+	 	       src + (16 * i), 16);
+           }
+        } else {
+    	   memcpy((unsigned char *)pSiSEnt->FbBase + (cursor_addr * 1024), src, 1024);
+	}
+    } else 
+#endif
+      if(pSiS->CurrentLayout.mode->Flags & V_DBLSCAN) {
+        int i;
+        for(i = 0; i < 32; i++) {
+           memcpy((unsigned char *)pSiS->FbBase + (cursor_addr * 1024) + (32 * i),
+	            src + (16 * i), 16);
+           memcpy((unsigned char *)pSiS->FbBase + (cursor_addr * 1024) + (32 * i) + 16,
+	 	    src + (16 * i), 16);
+        }
+    } else {
+    	memcpy((unsigned char *)pSiS->FbBase + (cursor_addr * 1024), src, 1024);
+    }
+    
+    if(pSiS->UseHWARGBCursor) {
+        if(pSiS->VBFlags & DISPTYPE_CRT1) {
+	   status1 = sis300GetCursorStatus;
+	   sis300DisableHWCursor()
+	   if(pSiS->VBFlags & CRT2_ENABLE) {
+	      status2 = sis301GetCursorStatus;
+	      sis301DisableHWCursor()
+	   }
+	   SISWaitRetraceCRT1(pScrn); 
+	   sis300SwitchToMONOCursor(); 
+	   if(pSiS->VBFlags & CRT2_ENABLE) {
+	      SISWaitRetraceCRT2(pScrn); 
+	      sis301SwitchToMONOCursor(); 
+	   }
+	}
+    }
+    sis300SetCursorAddress(cursor_addr);
+    sis300SetCursorPatternSelect(0);
+    if(status1) sis300SetCursorStatus(status1)
+    
+    if(pSiS->VBFlags & CRT2_ENABLE) {  
+    	if((pSiS->UseHWARGBCursor) && (!pSiS->VBFlags & DISPTYPE_CRT1)) {
+	    status2 = sis301GetCursorStatus;
+	    sis301DisableHWCursor()
+	    SISWaitRetraceCRT2(pScrn); 
+	    sis301SwitchToMONOCursor();   
+	}
         sis301SetCursorAddress(cursor_addr)
         sis301SetCursorPatternSelect(0)
+	if(status2) sis301SetCursorStatus(status2)
     }
+
+    pSiS->UseHWARGBCursor = FALSE;
+}
+
+static void
+SiS310LoadCursorImage(ScrnInfoPtr pScrn, unsigned char *src)
+{
+    SISPtr pSiS = SISPTR(pScrn);
+    int cursor_addr;
+    CARD32 status1 = 0, status2 = 0;
+
+#ifdef SISDUALHEAD
+    SISEntPtr pSiSEnt = pSiS->entityPrivate;
+#endif
+
+    cursor_addr = pScrn->videoRam - pSiS->cursorOffset - (pSiS->CursorSize/1024); /* 1K boundary */
+
+#ifdef SISDUALHEAD
+    if (pSiS->DualHeadMode) {
+    	/* TW: Use the global (real) FbBase in DHM */
+	if(pSiS->CurrentLayout.mode->Flags & V_DBLSCAN) {
+           int i;
+           for(i = 0; i < 32; i++) {
+              memcpy((unsigned char *)pSiSEnt->FbBase + (cursor_addr * 1024) + (32 * i),
+	               src + (16 * i), 16);
+              memcpy((unsigned char *)pSiSEnt->FbBase + (cursor_addr * 1024) + (32 * i) + 16,
+	 	       src + (16 * i), 16);
+           }
+        } else {
+    	   memcpy((unsigned char *)pSiSEnt->FbBase + (cursor_addr * 1024), src, 1024);
+	}
+    } else
+#endif
+      if(pSiS->CurrentLayout.mode->Flags & V_DBLSCAN) {
+        int i;
+        for(i = 0; i < 32; i++) {
+           memcpy((unsigned char *)pSiS->FbBase + (cursor_addr * 1024) + (32 * i),
+	            src + (16 * i), 16);
+           memcpy((unsigned char *)pSiS->FbBase + (cursor_addr * 1024) + (32 * i) + 16,
+	 	    src + (16 * i), 16);
+        }
+    } else {
+    	memcpy((unsigned char *)pSiS->FbBase + (cursor_addr * 1024), src, 1024);
+    }
+    
+    if(pSiS->UseHWARGBCursor) {
+        if(pSiS->VBFlags & DISPTYPE_CRT1) {
+	   status1 = sis310GetCursorStatus;
+	   sis310DisableHWCursor()
+	   if(pSiS->VBFlags & CRT2_ENABLE)  {
+	      status2 = sis301GetCursorStatus310;
+	      sis301DisableHWCursor310()
+	   }
+	   SISWaitRetraceCRT1(pScrn); 
+	   sis310SwitchToMONOCursor(); 
+	   if(pSiS->VBFlags & CRT2_ENABLE)  {
+	      SISWaitRetraceCRT2(pScrn); 
+	      sis301SwitchToMONOCursor310(); 
+	   }
+	}
+    }
+    sis310SetCursorAddress(cursor_addr);
+    sis310SetCursorPatternSelect(0);
+    if(status1) sis310SetCursorStatus(status1)
+    
+    if(pSiS->VBFlags & CRT2_ENABLE)  {  
+    	if((pSiS->UseHWARGBCursor) && (!pSiS->VBFlags & DISPTYPE_CRT1)) {
+	    status2 = sis301GetCursorStatus310;
+	    sis301DisableHWCursor310()
+	    SISWaitRetraceCRT2(pScrn); 
+	    sis301SwitchToMONOCursor310();   
+	}
+        sis301SetCursorAddress310(cursor_addr)
+        sis301SetCursorPatternSelect310(0)
+	if(status2) sis301SetCursorStatus310(status2)
+    }
+    
+    pSiS->UseHWARGBCursor = FALSE;
 }
 
 static Bool
 SiSUseHWCursor(ScreenPtr pScreen, CursorPtr pCurs)
 {
-    return TRUE;
+    ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
+    DisplayModePtr  mode = pScrn->currentMode;
+    SISPtr  pSiS = SISPTR(pScrn);
+
+    if(pSiS->Chipset != PCI_CHIP_SIS6326) return TRUE;
+    if(!(pSiS->SiS6326Flags & SIS6326_TVDETECTED)) return TRUE;
+    if((strcmp(mode->name, "PAL800x600U") == 0) ||
+       (strcmp(mode->name, "NTSC640x480U") == 0))
+      return FALSE;
+    else
+      return TRUE;
 }
 
 static Bool
 SiS300UseHWCursor(ScreenPtr pScreen, CursorPtr pCurs)
 {
     ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
-    DisplayModePtr  mode = pScrn->currentMode;
     SISPtr  pSiS = SISPTR(pScrn);
+    DisplayModePtr  mode = pSiS->CurrentLayout.mode; /* pScrn->currentMode; */
 
     switch (pSiS->Chipset)  {
-    case PCI_CHIP_SIS300:
-    case PCI_CHIP_SIS630:
-        if (mode->Flags & V_INTERLACE)
+      case PCI_CHIP_SIS300:
+      case PCI_CHIP_SIS630:
+      case PCI_CHIP_SIS540:
+        if(mode->Flags & V_INTERLACE)
             return FALSE;
+	if((mode->Flags & V_DBLSCAN) && (pCurs->bits->height > 32))
+	    return FALSE;
         break;
+      case PCI_CHIP_SIS550:
+      case PCI_CHIP_SIS650:
+      case PCI_CHIP_SIS315:
+      case PCI_CHIP_SIS315H:
+      case PCI_CHIP_SIS315PRO:
+      case PCI_CHIP_SIS330:
+        if(mode->Flags & V_INTERLACE)
+            return FALSE;
+	if((mode->Flags & V_DBLSCAN) && (pCurs->bits->height > 32))
+	    return FALSE;
+        break;
+      default:
+        if(mode->Flags & V_INTERLACE)
+            return FALSE;
+        if((mode->Flags & V_DBLSCAN) && (pCurs->bits->height > 32))
+	    return FALSE;
+	break;
     }
     return TRUE;
 }
 
+#if XF86_VERSION_CURRENT >= XF86_VERSION_NUMERIC(4,2,99,0,0)
+#ifdef ARGB_CURSOR
+#ifdef SIS_ARGB_CURSOR
+static Bool
+SiSUseHWCursorARGB(ScreenPtr pScreen, CursorPtr pCurs)
+{
+    ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
+    DisplayModePtr  mode = pScrn->currentMode;
+    SISPtr  pSiS = SISPTR(pScrn);
+    	
+    switch (pSiS->Chipset)  {
+      case PCI_CHIP_SIS300:
+      case PCI_CHIP_SIS630:
+      case PCI_CHIP_SIS540:
+        if(mode->Flags & V_INTERLACE)
+            return FALSE;
+	if(pCurs->bits->height > 32 || pCurs->bits->width > 32)
+	    return FALSE;
+	if((mode->Flags & V_DBLSCAN) && (pCurs->bits->height > 16))
+	    return FALSE;
+        break;
+      case PCI_CHIP_SIS550:
+      case PCI_CHIP_SIS650:
+      case PCI_CHIP_SIS315:
+      case PCI_CHIP_SIS315H:
+      case PCI_CHIP_SIS315PRO:
+      case PCI_CHIP_SIS330:
+        if(mode->Flags & V_INTERLACE)
+            return FALSE;
+	if(pCurs->bits->height > 64 || pCurs->bits->width > 64)
+	    return FALSE;
+	if((mode->Flags & V_DBLSCAN) && (pCurs->bits->height > 32))
+	    return FALSE;
+        break;
+      default:        
+        return FALSE;
+    }
+    return TRUE;
+}
+
+static void SiS300LoadCursorImageARGB(ScrnInfoPtr pScrn, CursorPtr pCurs)
+{
+    SISPtr pSiS = SISPTR(pScrn);
+    int cursor_addr, i, j, maxheight = 32;
+    CARD32 *src = pCurs->bits->argb, *p;
+#ifdef SIS300_USE_ARGB16    
+    CARD16 *dest, *pb;
+    CARD16 temp1;
+#define MYSISPTRTYPE CARD16    
+#else    
+    CARD32 *pb, *dest;
+#define MYSISPTRTYPE CARD32    
+#endif    
+    int srcwidth = pCurs->bits->width;
+    int srcheight = pCurs->bits->height;
+    BOOLEAN sizedouble = FALSE;
+    CARD32 temp, status1 = 0, status2 = 0;
+
+#ifdef SISDUALHEAD
+    SISEntPtr pSiSEnt = pSiS->entityPrivate;
+#endif
+
+    cursor_addr = pScrn->videoRam - pSiS->cursorOffset - ((pSiS->CursorSize/1024) * 2);
+    
+    if(srcwidth > 32)  srcwidth = 32;
+    if(srcheight > 32) srcheight = 32;
+
+#ifdef SISDUALHEAD
+    if (pSiS->DualHeadMode) 
+    	/* TW: Use the global (real) FbBase in DHM */
+	dest = (MYSISPTRTYPE *)((unsigned char *)pSiSEnt->FbBase + (cursor_addr * 1024)); 
+    else
+#endif
+        dest = (MYSISPTRTYPE *)((unsigned char *)pSiS->FbBase + (cursor_addr * 1024)); 
+
+    if(pSiS->CurrentLayout.mode->Flags & V_DBLSCAN) {
+        sizedouble = TRUE;
+	if(srcheight > 16) srcheight = 16;
+	maxheight = 16;
+    }
+    
+#ifdef SIS300_USE_ARGB16  /* Use 16 Bit RGB pointer */
+    for(i = 0; i < srcheight; i++) {
+	    p = src;
+	    pb = dest;
+	    src += pCurs->bits->width;
+	    for(j = 0; j < srcwidth; j++) {
+	       temp = *p++;
+	       if(temp & 0xffffff) {
+	          temp1 = ((temp & 0xff) >> 3) |
+	                  ((((temp & 0xff00) >> (8 + 3)) << 5) & 0x03e0) |
+		          ((((temp & 0xff0000) >> (16 + 3)) << 10) & 0x7c00);
+	       } else temp1 = 0x8000;
+	       *dest++ = temp1;
+	    }
+	    if(srcwidth < 32) {
+	      for(; j < 32; j++) {
+	        *dest++ = 0x8000; 
+	      }
+	    }
+    }	    
+    if(srcheight < maxheight) {
+	for(; i < maxheight; i++)
+	   for(j = 0; j < 32; j++) {
+	      *dest++ = 0x8000;
+	   }
+	   if(sizedouble) {
+	      for(j = 0; j < 32; j++) 
+	      	*dest++ = 0x0000;
+	   }
+    }	    
+#else    /* Use 32bit RGB pointer - preferred, saves us from the conversion */	       
+    for(i = 0; i < srcheight; i++) {
+	    p = src;
+	    pb = dest;
+	    src += pCurs->bits->width;
+	    for(j = 0; j < srcwidth; j++) {
+	       temp = *p++;
+/*	       *dest1++ = ((temp ^ 0xff000000) << 4) | (((temp ^ 0xff000000) & 0xf0000000) >> 28);  */
+	       if(pSiS->OptUseColorCursorBlend) {
+	          if(temp & 0xffffff) {
+	             if((temp & 0xff000000) > pSiS->OptColorCursorBlendThreshold) {
+		        temp &= 0x00ffffff;
+		     } else {
+		  	temp = 0xff111111;
+		     }
+	          } else temp = 0xff000000;
+	       } else {
+	           if(temp & 0xffffff) temp &= 0x00ffffff;
+	           else temp = 0xff000000;
+	       }
+	       *dest++ = temp;
+	    }
+	    if(srcwidth < 32) {
+	       for(; j < 32; j++) {
+	          *dest++ = 0xff000000;
+	       }
+	    }
+	    if(sizedouble) {
+	       for(j = 0; j < 32; j++) {
+	          *dest++ = *pb++;
+	       }
+	    }
+   
+    }
+    if(srcheight < maxheight) {
+	for(; i < maxheight; i++) {
+	   for(j = 0; j < 32; j++) {
+	      *dest++ = 0xff000000;
+	   }
+	   if(sizedouble) {
+	      for(j = 0; j < 32; j++) {
+	      	*dest++ = 0xff000000;
+	      }
+	   }
+	}
+    }
+#endif
+
+    if(!pSiS->UseHWARGBCursor) {
+        if(pSiS->VBFlags & DISPTYPE_CRT1) {
+	   status1 = sis300GetCursorStatus;
+	   sis300DisableHWCursor()
+	   if(pSiS->VBFlags & CRT2_ENABLE)  {
+	      status2 = sis301GetCursorStatus;
+	      sis301DisableHWCursor()
+	   }
+	   SISWaitRetraceCRT1(pScrn); 
+	   sis300SwitchToRGBCursor(); 
+	   if(pSiS->VBFlags & CRT2_ENABLE)  {
+	      SISWaitRetraceCRT2(pScrn); 
+	      sis301SwitchToRGBCursor(); 
+	   }
+	}
+    }
+    sis300SetCursorAddress(cursor_addr);
+    sis300SetCursorPatternSelect(0);
+    if(status1) sis300SetCursorStatus(status1)
+    
+    if(pSiS->VBFlags & CRT2_ENABLE) {  
+    	if((!pSiS->UseHWARGBCursor) && (!pSiS->VBFlags & DISPTYPE_CRT1)) {
+	    status2 = sis301GetCursorStatus;
+	    sis301DisableHWCursor()
+	    SISWaitRetraceCRT2(pScrn); 
+	    sis301SwitchToRGBCursor();   
+	}
+        sis301SetCursorAddress(cursor_addr)
+        sis301SetCursorPatternSelect(0)
+	if(status2) sis301SetCursorStatus(status2)
+    }
+
+    pSiS->UseHWARGBCursor = TRUE;
+}
+
+static void SiS310LoadCursorImageARGB(ScrnInfoPtr pScrn, CursorPtr pCurs)
+{
+    SISPtr pSiS = SISPTR(pScrn);
+    int cursor_addr, i, j, maxheight = 64;
+    CARD32 *src = pCurs->bits->argb, *p, *pb, *dest;
+    int srcwidth = pCurs->bits->width;
+    int srcheight = pCurs->bits->height;
+    BOOLEAN sizedouble = FALSE;
+    CARD32 status1 = 0, status2 = 0;
+
+#ifdef SISDUALHEAD
+    SISEntPtr pSiSEnt = pSiS->entityPrivate;
+#endif
+    
+    cursor_addr = pScrn->videoRam - pSiS->cursorOffset - ((pSiS->CursorSize/1024) * 2);
+    
+    if(srcwidth > 64)  srcwidth = 64;
+    if(srcheight > 64) srcheight = 64;
+
+#ifdef SISDUALHEAD
+    if(pSiS->DualHeadMode) 
+    	/* TW: Use the global (real) FbBase in DHM */
+	dest = (CARD32 *)((unsigned char *)pSiSEnt->FbBase + (cursor_addr * 1024)); 
+    else
+#endif
+        dest = (CARD32 *)((unsigned char *)pSiS->FbBase + (cursor_addr * 1024)); 
+
+    if(pSiS->CurrentLayout.mode->Flags & V_DBLSCAN) {
+        sizedouble = TRUE;
+	if(srcheight > 32) srcheight = 32;
+	maxheight = 32;
+    }
+
+    for(i = 0; i < srcheight; i++) {
+	    p = src;
+	    pb = dest;
+	    src += pCurs->bits->width;
+	    for(j = 0; j < srcwidth; j++)  *dest++ = *p++;
+	    if(srcwidth < 64) {
+	       for(; j < 64; j++) *dest++ = 0;
+	    }
+	    if(sizedouble) {
+	       for(j = 0; j < 64; j++) {
+	          *dest++ = *pb++;
+	       }
+	    }
+    }
+    if(srcheight < maxheight) {
+	for(; i < maxheight; i++)
+	   for(j = 0; j < 64; j++) *dest++ = 0;
+	   if(sizedouble) {
+	      for(j = 0; j < 64; j++) *dest++ = 0;
+	   }
+    }
+
+    if(!pSiS->UseHWARGBCursor) {
+        if(pSiS->VBFlags & DISPTYPE_CRT1) {
+	   status1 = sis310GetCursorStatus;
+	   sis310DisableHWCursor()
+	   if(pSiS->VBFlags & CRT2_ENABLE)  {
+	      status2 = sis301GetCursorStatus310;
+	      sis301DisableHWCursor310()
+	   }
+	   SISWaitRetraceCRT1(pScrn); 
+	   sis310SwitchToRGBCursor(); 
+	   if(pSiS->VBFlags & CRT2_ENABLE)  {
+	      SISWaitRetraceCRT2(pScrn); 
+	      sis301SwitchToRGBCursor310(); 
+	   }
+	}
+    }
+    sis310SetCursorAddress(cursor_addr);
+    sis310SetCursorPatternSelect(0);
+    if(status1) sis310SetCursorStatus(status1)
+    
+    if(pSiS->VBFlags & CRT2_ENABLE) {  
+    	if((!pSiS->UseHWARGBCursor) && (!pSiS->VBFlags & DISPTYPE_CRT1)) {
+	    status2 = sis301GetCursorStatus310;
+	    sis301DisableHWCursor310()
+	    SISWaitRetraceCRT2(pScrn); 
+	    sis301SwitchToRGBCursor310();   
+	}
+        sis301SetCursorAddress310(cursor_addr)
+        sis301SetCursorPatternSelect310(0)
+	if(status2) sis301SetCursorStatus310(status2)
+    }
+    
+    pSiS->UseHWARGBCursor = TRUE;
+}
+#endif
+#endif
+#endif
+
 Bool
 SiSHWCursorInit(ScreenPtr pScreen)
 {
@@ -269,19 +1019,62 @@ SiSHWCursorInit(ScreenPtr pScreen)
         return FALSE;
 
     pSiS->CursorInfoPtr = infoPtr;
+    pSiS->UseHWARGBCursor = FALSE;
 
-    infoPtr->MaxWidth = 64;
-    infoPtr->MaxHeight = 64;
     switch (pSiS->Chipset)  {
-    case PCI_CHIP_SIS300:
-    case PCI_CHIP_SIS630:
-    case PCI_CHIP_SIS540:
+      case PCI_CHIP_SIS300:
+      case PCI_CHIP_SIS630:
+      case PCI_CHIP_SIS540:
+        infoPtr->MaxWidth  = 64;
+        infoPtr->MaxHeight = 64;
         infoPtr->ShowCursor = SiS300ShowCursor;
         infoPtr->HideCursor = SiS300HideCursor;
         infoPtr->SetCursorPosition = SiS300SetCursorPosition;
         infoPtr->SetCursorColors = SiS300SetCursorColors;
         infoPtr->LoadCursorImage = SiS300LoadCursorImage;
+        infoPtr->UseHWCursor = SiS300UseHWCursor;	
+#if XF86_VERSION_CURRENT >= XF86_VERSION_NUMERIC(4,2,99,0,0)
+#ifdef ARGB_CURSOR
+#ifdef SIS_ARGB_CURSOR
+        if(pSiS->OptUseColorCursor) {
+	   infoPtr->UseHWCursorARGB = SiSUseHWCursorARGB;
+	   infoPtr->LoadCursorARGB = SiS300LoadCursorImageARGB;
+	}
+#endif	
+#endif	
+#endif
+        infoPtr->Flags =
+            HARDWARE_CURSOR_TRUECOLOR_AT_8BPP |
+            HARDWARE_CURSOR_INVERT_MASK |
+            HARDWARE_CURSOR_BIT_ORDER_MSBFIRST |
+            HARDWARE_CURSOR_AND_SOURCE_WITH_MASK |
+            HARDWARE_CURSOR_SWAP_SOURCE_AND_MASK |
+            HARDWARE_CURSOR_SOURCE_MASK_INTERLEAVE_64;
+        break;
+      case PCI_CHIP_SIS550:
+      case PCI_CHIP_SIS650:
+      case PCI_CHIP_SIS315:
+      case PCI_CHIP_SIS315H:
+      case PCI_CHIP_SIS315PRO:
+      case PCI_CHIP_SIS330:
+        infoPtr->MaxWidth  = 64;   
+        infoPtr->MaxHeight = 64;
+        infoPtr->ShowCursor = SiS310ShowCursor;
+        infoPtr->HideCursor = SiS310HideCursor;
+        infoPtr->SetCursorPosition = SiS310SetCursorPosition;
+        infoPtr->SetCursorColors = SiS310SetCursorColors;
+        infoPtr->LoadCursorImage = SiS310LoadCursorImage;
         infoPtr->UseHWCursor = SiS300UseHWCursor;
+#if XF86_VERSION_CURRENT >= XF86_VERSION_NUMERIC(4,2,99,0,0)
+#ifdef ARGB_CURSOR
+#ifdef SIS_ARGB_CURSOR
+  	if(pSiS->OptUseColorCursor) {
+	   infoPtr->UseHWCursorARGB = SiSUseHWCursorARGB;
+	   infoPtr->LoadCursorARGB = SiS310LoadCursorImageARGB;
+	}
+#endif
+#endif	
+#endif
         infoPtr->Flags =
             HARDWARE_CURSOR_TRUECOLOR_AT_8BPP |
             HARDWARE_CURSOR_INVERT_MASK |
@@ -290,7 +1083,9 @@ SiSHWCursorInit(ScreenPtr pScreen)
             HARDWARE_CURSOR_SWAP_SOURCE_AND_MASK |
             HARDWARE_CURSOR_SOURCE_MASK_INTERLEAVE_64;
         break;
-    default:
+      default:
+        infoPtr->MaxWidth  = 64;
+	infoPtr->MaxHeight = 64;
         infoPtr->SetCursorPosition = SiSSetCursorPosition;
         infoPtr->ShowCursor = SiSShowCursor;
         infoPtr->HideCursor = SiSHideCursor;
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_cursor.h b/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_cursor.h
index 76cb50765..76258ac63 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_cursor.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_cursor.h
@@ -1,78 +1,427 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/sis_cursor.h,v 1.5 2003/02/06 13:14:04 eich Exp $ */
 /*
  * Copyright 1998,1999 by Alan Hourihane, Wigan, England.
+ * Parts Copyright 2001, 2002 by Thomas Winischhofer, Vienna, Austria.
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
  * the above copyright notice appear in all copies and that both that
  * copyright notice and this permission notice appear in supporting
- * documentation, and that the name of Alan Hourihane not be used in
+ * documentation, and that the name of the copyright holders not be used in
  * advertising or publicity pertaining to distribution of the software without
- * specific, written prior permission.  Alan Hourihane makes no representations
+ * specific, written prior permission.  The copyright holders make no representations
  * about the suitability of this software for any purpose.  It is provided
  * "as is" without express or implied warranty.
  *
- * ALAN HOURIHANE DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+ * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
  * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
- * EVENT SHALL ALAN HOURIHANE BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+ * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
  * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
  * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  * PERFORMANCE OF THIS SOFTWARE.
  *
  * Authors:  Alan Hourihane, alanh@fairlite.demon.co.uk
- *           Mike Chapman <mike@paranoia.com>, 
- *           Juanjo Santamarta <santamarta@ctv.es>, 
- *           Mitani Hiroshi <hmitani@drl.mei.co.jp> 
- *           David Thomas <davtom@dream.org.uk>. 
+ *           Mike Chapman <mike@paranoia.com>,
+ *           Juanjo Santamarta <santamarta@ctv.es>,
+ *           Mitani Hiroshi <hmitani@drl.mei.co.jp>
+ *           David Thomas <davtom@dream.org.uk>.
+ *	     Thomas Winischhofer <thomas@winischhofer.net>:
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/sis_cursor.h,v 1.2 2001/04/19 12:40:33 alanh Exp $ */
 
 #define CS(x)   (0x8500+(x<<2))
 
-#define sis300EnableHWCursor()\
-  *(volatile CARD32 *)(pSiS->IOBase + CS(0)) |= 0x40000000;
+/* 300 series, CRT1 */
+
+/* 80000000 = RGB(1) - MONO(0)
+ * 40000000 = enable(1) - disable(0)
+ * 20000000 = 32(1) / 16(1) bit RGB
+ * 10000000 = "ghost"(1) - [other effect](0)
+ */
+
+#define sis300GetCursorStatus \
+  MMIO_IN32(pSiS->IOBase, CS(0)) & 0x40000000;
+  
+#define sis300SetCursorStatus(status) \
+  { \
+  unsigned long temp; \
+  temp = MMIO_IN32(pSiS->IOBase, CS(0)); \
+  temp &= 0xbfffffff; \
+  temp |= status; \
+  MMIO_OUT32(pSiS->IOBase, CS(0), temp); \
+  }
+
+#define sis300EnableHWCursor() \
+  { \
+  unsigned long temp; \
+  temp = MMIO_IN32(pSiS->IOBase, CS(0)); \
+  temp &= 0x0fffffff; \
+  temp |= 0x40000000; \
+  MMIO_OUT32(pSiS->IOBase, CS(0), temp); \
+  }
+  
+#define sis300EnableHWARGBCursor() \
+  { \
+  unsigned long temp; \
+  temp = MMIO_IN32(pSiS->IOBase, CS(0)); \
+  temp |= 0xF0000000; \
+  MMIO_OUT32(pSiS->IOBase, CS(0), temp); \
+  }
+
+#define sis300EnableHWARGB16Cursor() \
+  { \
+  unsigned long temp; \
+  temp = MMIO_IN32(pSiS->IOBase, CS(0)); \
+  temp &= 0x0fffffff; \
+  temp |= 0xD0000000; \
+  MMIO_OUT32(pSiS->IOBase, CS(0), temp); \
+  }
+
+#define sis300SwitchToMONOCursor() \
+  { \
+  unsigned long temp; \
+  temp = MMIO_IN32(pSiS->IOBase, CS(0)); \
+  temp &= 0x4fffffff; \
+  MMIO_OUT32(pSiS->IOBase, CS(0), temp); \
+  }
+  
+#define sis300SwitchToRGBCursor() \
+  { \
+  unsigned long temp; \
+  temp = MMIO_IN32(pSiS->IOBase, CS(0)); \
+  temp |= 0xB0000000; \
+  MMIO_OUT32(pSiS->IOBase, CS(0), temp); \
+  }
+  
 #define sis300DisableHWCursor()\
-  *(volatile CARD32 *)(pSiS->IOBase + CS(0)) &= 0x3FFFFFFF;
+  { \
+  unsigned long temp; \
+  temp = MMIO_IN32(pSiS->IOBase, CS(0)); \
+  temp &= 0xbFFFFFFF; \
+  MMIO_OUT32(pSiS->IOBase, CS(0), temp); \
+  }
 
 #define sis300SetCursorBGColor(color)\
-  *(volatile CARD32 *)(pSiS->IOBase + CS(1)) = (color);
+  MMIO_OUT32(pSiS->IOBase, CS(1), (color));
 #define sis300SetCursorFGColor(color)\
-  *(volatile CARD32 *)(pSiS->IOBase + CS(2)) = (color);
+  MMIO_OUT32(pSiS->IOBase, CS(2), (color));
 
 #define sis300SetCursorPositionX(x,preset)\
-  *(volatile CARD32 *)(pSiS->IOBase + CS(3)) = (x) | ((preset) << 16);
+  MMIO_OUT32(pSiS->IOBase, CS(3), ((x) | ((preset) << 16)));
 #define sis300SetCursorPositionY(y,preset)\
-  *(volatile CARD32 *)(pSiS->IOBase + CS(4)) = (y) | ((preset) << 16);
+  MMIO_OUT32(pSiS->IOBase, CS(4), ((y) | ((preset) << 16)));
 
 #define sis300SetCursorAddress(address)\
-  *(volatile CARD32 *)(pSiS->IOBase + CS(0)) &= 0xFFFF0000;\
-  *(volatile CARD32 *)(pSiS->IOBase + CS(0)) |= address;
+  { \
+  unsigned long temp; \
+  temp = MMIO_IN32(pSiS->IOBase, CS(0)); \
+  temp &= 0xFFFF0000; \
+  temp |= address; \
+  MMIO_OUT32(pSiS->IOBase,CS(0),temp); \
+  }
 
 #define sis300SetCursorPatternSelect(pat_id)\
-  *(volatile CARD32 *)(pSiS->IOBase + CS(0)) &= 0xF0FFFFFF;\
-  *(volatile CARD32 *)(pSiS->IOBase + CS(0)) |= ((pat_id) << 24);
+  { \
+  unsigned long temp; \
+  temp = MMIO_IN32(pSiS->IOBase, CS(0)); \
+  temp &= 0xF0FFFFFF; \
+  temp |= (pat_id) << 24; \
+  MMIO_OUT32(pSiS->IOBase,CS(0),temp); \
+  }
 
+/* 300 series, CRT2 */
 
+/* 80000000 = RGB(1) - MONO(0)
+ * 40000000 = enable(1) - disable(0)
+ * 20000000 = 32(1) / 16(1) bit RGB
+ * 10000000 = unused (always "ghosting")
+ */
 
+#define sis301GetCursorStatus \
+  MMIO_IN32(pSiS->IOBase, CS(8)) & 0x40000000;
+  
+#define sis301SetCursorStatus(status) \
+  { \
+  unsigned long temp; \
+  temp = MMIO_IN32(pSiS->IOBase, CS(8)); \
+  temp &= 0xbfffffff; \
+  temp |= status; \
+  MMIO_OUT32(pSiS->IOBase, CS(8), temp); \
+  }
+  
 #define sis301EnableHWCursor()\
-  *(volatile CARD32 *)(pSiS->IOBase + CS(8)) |= 0x40000000;
+  { \
+  unsigned long temp; \
+  temp = MMIO_IN32(pSiS->IOBase, CS(8)); \
+  temp &= 0x0fffffff; \
+  temp |= 0x40000000; \
+  MMIO_OUT32(pSiS->IOBase, CS(8), temp); \
+  }
+  
+#define sis301EnableHWARGBCursor()\
+  { \
+  unsigned long temp; \
+  temp = MMIO_IN32(pSiS->IOBase, CS(8)); \
+  temp |= 0xF0000000; \
+  MMIO_OUT32(pSiS->IOBase, CS(8), temp); \
+  }
+  
+#define sis301EnableHWARGB16Cursor()\
+  { \
+  unsigned long temp; \
+  temp = MMIO_IN32(pSiS->IOBase, CS(8)); \
+  temp &= 0x0FFFFFFF; \
+  temp |= 0xD0000000; \
+  MMIO_OUT32(pSiS->IOBase, CS(8), temp); \
+  }
+  
+#define sis301SwitchToRGBCursor() \
+  { \
+  unsigned long temp; \
+  temp = MMIO_IN32(pSiS->IOBase, CS(8)); \
+  temp |= 0xB0000000; \
+  MMIO_OUT32(pSiS->IOBase, CS(8), temp); \
+  }
+  
+#define sis301SwitchToMONOCursor() \
+  { \
+  unsigned long temp; \
+  temp = MMIO_IN32(pSiS->IOBase, CS(8)); \
+  temp &= 0x4fffffff; \
+  MMIO_OUT32(pSiS->IOBase, CS(8), temp); \
+  }
+ 
 #define sis301DisableHWCursor()\
-  *(volatile CARD32 *)(pSiS->IOBase + CS(8)) &= 0xBFFFFFFF;
-
+  { \
+  unsigned long temp; \
+  temp = MMIO_IN32(pSiS->IOBase, CS(8)); \
+  temp &= 0xbFFFFFFF; \
+  MMIO_OUT32(pSiS->IOBase, CS(8), temp); \
+  }
+  
 #define sis301SetCursorBGColor(color)\
-  *(volatile CARD32 *)(pSiS->IOBase + CS(9)) = (color);
+  MMIO_OUT32(pSiS->IOBase, CS(9), (color));
 #define sis301SetCursorFGColor(color)\
-  *(volatile CARD32 *)(pSiS->IOBase + CS(10)) = (color);
+  MMIO_OUT32(pSiS->IOBase, CS(10), (color));
 
 #define sis301SetCursorPositionX(x,preset)\
-  *(volatile CARD32 *)(pSiS->IOBase + CS(11)) = (x) | ((preset) << 16);
+  MMIO_OUT32(pSiS->IOBase, CS(11), ((x) | ((preset) << 16)));
 #define sis301SetCursorPositionY(y,preset)\
-  *(volatile CARD32 *)(pSiS->IOBase + CS(12)) = (y) | ((preset) << 16);
+  MMIO_OUT32(pSiS->IOBase, CS(12), ((y) | ((preset) << 16)));
 
 #define sis301SetCursorAddress(address)\
-  *(volatile CARD32 *)(pSiS->IOBase + CS(8)) &= 0xFFFF0000;\
-  *(volatile CARD32 *)(pSiS->IOBase + CS(8)) |= address;
+  { \
+  unsigned long temp; \
+  temp = MMIO_IN32(pSiS->IOBase, CS(8)); \
+  temp &= 0xFFFF0000; \
+  temp |= address; \
+  MMIO_OUT32(pSiS->IOBase,CS(8),temp); \
+  }
 
 #define sis301SetCursorPatternSelect(pat_id)\
-  *(volatile CARD32 *)(pSiS->IOBase + CS(8)) &= 0xF0FFFFFF;\
-  *(volatile CARD32 *)(pSiS->IOBase + CS(8)) |= ((pat_id) << 24);
+  { \
+  unsigned long temp; \
+  temp = MMIO_IN32(pSiS->IOBase, CS(8)); \
+  temp &= 0xF0FFFFFF; \
+  temp |= (pat_id) << 24; \
+  MMIO_OUT32(pSiS->IOBase,CS(8),temp); \
+  }
+
+/* 310/325/330 series CRT1 */
+
+/* 80000000 = RGB(1) - MONO(0)
+ * 40000000 = enable(1) - disable(0)
+ * 20000000 = 32(1) / 16(1) bit RGB
+ * 10000000 = "ghost"(1) - Alpha Blend(0)
+ */
+ 
+#define sis310GetCursorStatus \
+  MMIO_IN32(pSiS->IOBase, CS(0)) & 0x40000000;
+  
+#define sis310SetCursorStatus(status) \
+  { \
+  unsigned long temp; \
+  temp = MMIO_IN32(pSiS->IOBase, CS(0)); \
+  temp &= 0xbfffffff; \
+  temp |= status; \
+  MMIO_OUT32(pSiS->IOBase, CS(0), temp); \
+  }
+  
+#define sis310EnableHWCursor()\
+  { \
+  unsigned long temp; \
+  temp = MMIO_IN32(pSiS->IOBase, CS(0)); \
+  temp &= 0x0fffffff; \
+  temp |= 0x40000000; \
+  MMIO_OUT32(pSiS->IOBase, CS(0), temp); \
+  }
+  
+#define sis310EnableHWARGBCursor()\
+  { \
+  unsigned long temp; \
+  temp = MMIO_IN32(pSiS->IOBase, CS(0)); \
+  temp &= 0x0FFFFFFF; \
+  temp |= 0xE0000000; \
+  MMIO_OUT32(pSiS->IOBase, CS(0), temp); \
+  }
+
+#define sis310SwitchToMONOCursor() \
+  { \
+  unsigned long temp; \
+  temp = MMIO_IN32(pSiS->IOBase, CS(0)); \
+  temp &= 0x4fffffff; \
+  MMIO_OUT32(pSiS->IOBase, CS(0), temp); \
+  }   
+  
+#define sis310SwitchToRGBCursor() \
+  { \
+  unsigned long temp; \
+  temp = MMIO_IN32(pSiS->IOBase, CS(0)); \
+  temp &= 0xBFFFFFFF; \
+  temp |= 0xA0000000; \
+  MMIO_OUT32(pSiS->IOBase, CS(0), temp); \
+  }
+  
+#define sis310DisableHWCursor()\
+  { \
+  unsigned long temp; \
+  temp = MMIO_IN32(pSiS->IOBase, CS(0)); \
+  temp &= 0xBFFFFFFF; \
+  MMIO_OUT32(pSiS->IOBase, CS(0), temp); \
+  }
+  
+#define sis310SetCursorBGColor(color)\
+  MMIO_OUT32(pSiS->IOBase, CS(1), (color));
+#define sis310SetCursorFGColor(color)\
+  MMIO_OUT32(pSiS->IOBase, CS(2), (color));
+
+#define sis310SetCursorPositionX(x,preset)\
+  MMIO_OUT32(pSiS->IOBase, CS(3), ((x) | ((preset) << 16)));
+#define sis310SetCursorPositionY(y,preset)\
+  MMIO_OUT32(pSiS->IOBase, CS(4), ((y) | ((preset) << 16)));
+
+#define sis310SetCursorAddress(address)\
+  { \
+  unsigned long temp; \
+  temp = MMIO_IN32(pSiS->IOBase, CS(0)); \
+  temp &= 0xFFF00000; \
+  temp |= address; \
+  MMIO_OUT32(pSiS->IOBase,CS(0),temp); \
+  }
+
+#define sis310SetCursorPatternSelect(pat_id)\
+  { \
+  unsigned long temp; \
+  temp = MMIO_IN32(pSiS->IOBase, CS(0)); \
+  temp &= 0xF0FFFFFF; \
+  temp |= (pat_id) << 24; \
+  MMIO_OUT32(pSiS->IOBase,CS(0),temp); \
+  }
+
+/* 310/325/330 series CRT2 */
+
+/* 80000000 = RGB(1) - MONO(0)
+ * 40000000 = enable(1) - disable(0)
+ * 20000000 = 32(1) / 16(1) bit RGB
+ * 10000000 = "ghost"(1) - Alpha Blend(0)  ?
+ */
+ 
+#define sis301GetCursorStatus310 \
+  MMIO_IN32(pSiS->IOBase, CS(8)) & 0x40000000;
+  
+#define sis301SetCursorStatus310(status) \
+  { \
+  unsigned long temp; \
+  temp = MMIO_IN32(pSiS->IOBase, CS(8)); \
+  temp &= 0xbfffffff; \
+  temp |= status; \
+  MMIO_OUT32(pSiS->IOBase, CS(8), temp); \
+  }
+  
+#define sis301EnableHWCursor310()\
+   { \
+   unsigned long temp, temp1, temp2; \
+   temp1 = MMIO_IN32(pSiS->IOBase, CS(11)); \
+   temp2 = MMIO_IN32(pSiS->IOBase, CS(12)); \
+   temp = MMIO_IN32(pSiS->IOBase, CS(8)); \
+   temp &= 0x0fffffff; \
+   temp |= 0x40000000; \
+   MMIO_OUT32(pSiS->IOBase, CS(8), temp); \
+   MMIO_OUT32(pSiS->IOBase, CS(11), temp1); \
+   MMIO_OUT32(pSiS->IOBase, CS(12), temp2); \
+   }
+
+#define sis301EnableHWARGBCursor310()\
+   { \
+   unsigned long temp, temp1, temp2; \
+   temp1 = MMIO_IN32(pSiS->IOBase, CS(11)); \
+   temp2 = MMIO_IN32(pSiS->IOBase, CS(12)); \
+   temp = MMIO_IN32(pSiS->IOBase, CS(8)); \
+   temp &= 0x0FFFFFFF; \
+   temp |= 0xE0000000; \
+   MMIO_OUT32(pSiS->IOBase, CS(8), temp); \
+   MMIO_OUT32(pSiS->IOBase, CS(11), temp1); \
+   MMIO_OUT32(pSiS->IOBase, CS(12), temp2); \
+   }
+
+#define sis301SwitchToRGBCursor310() \
+  { \
+  unsigned long temp; \
+  temp = MMIO_IN32(pSiS->IOBase, CS(8)); \
+  temp &= 0xBFFFFFFF; \
+  temp |= 0xA0000000; \
+  MMIO_OUT32(pSiS->IOBase, CS(8), temp); \
+  }
+  
+#define sis301SwitchToMONOCursor310() \
+  { \
+  unsigned long temp; \
+  temp = MMIO_IN32(pSiS->IOBase, CS(8)); \
+  temp &= 0x4fffffff; \
+  MMIO_OUT32(pSiS->IOBase, CS(8), temp); \
+  }
+  
+#define sis301DisableHWCursor310()\
+  { \
+  unsigned long temp; \
+  temp = MMIO_IN32(pSiS->IOBase, CS(8)); \
+  temp &= 0xBFFFFFFF; \
+  MMIO_OUT32(pSiS->IOBase, CS(8), temp); \
+  }
+
+#define sis301SetCursorBGColor310(color)\
+  MMIO_OUT32(pSiS->IOBase, CS(9), (color));
+#define sis301SetCursorFGColor310(color)\
+  MMIO_OUT32(pSiS->IOBase, CS(10), (color));
+
+#define sis301SetCursorPositionX310(x,preset)\
+  MMIO_OUT32(pSiS->IOBase, CS(11), ((x) | ((preset) << 16)));
+#define sis301SetCursorPositionY310(y,preset)\
+  MMIO_OUT32(pSiS->IOBase, CS(12), ((y) | ((preset) << 16)));
+  
+#define sis301SetCursorAddress310(address)\
+  { \
+  unsigned long temp; \
+  if(pSiS->sishw_ext.jChipType == SIS_315H) { \
+     if(address & 0x10000) { \
+        address &= ~0x10000; \
+	orSISIDXREG(SISSR, 0x37, 0x80); \
+     } else { \
+        andSISIDXREG(SISSR, 0x37, 0x7f); \
+     } \
+  } \
+  temp = MMIO_IN32(pSiS->IOBase, CS(8)); \
+  temp &= 0xFFF00000; \
+  temp |= address; \
+  MMIO_OUT32(pSiS->IOBase,CS(8),temp); \
+  }
+
+#define sis301SetCursorPatternSelect310(pat_id)\
+  { \
+  unsigned long temp; \
+  temp = MMIO_IN32(pSiS->IOBase, CS(8)); \
+  temp &= 0xF0FFFFFF; \
+  temp |= (pat_id) << 24; \
+  MMIO_OUT32(pSiS->IOBase,CS(8),temp); \
+  }
+
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_dac.c b/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_dac.c
index 671b4e4b7..0ce8e744f 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_dac.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_dac.c
@@ -1,31 +1,33 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/sis_dac.c,v 1.30 2003/02/05 17:53:22 eich Exp $ */
 /*
  * Copyright 1998,1999 by Alan Hourihane, Wigan, England.
+ * Parts Copyright 2001, 2002 by Thomas Winischhofer, Vienna, Austria.
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
  * the above copyright notice appear in all copies and that both that
  * copyright notice and this permission notice appear in supporting
- * documentation, and that the name of Alan Hourihane not be used in
+ * documentation, and that the name of the provider not be used in
  * advertising or publicity pertaining to distribution of the software without
- * specific, written prior permission.  Alan Hourihane makes no representations
+ * specific, written prior permission.  The provider makes no representations
  * about the suitability of this software for any purpose.  It is provided
  * "as is" without express or implied warranty.
  *
- * ALAN HOURIHANE DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+ * THE PROVIDER DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
  * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
- * EVENT SHALL ALAN HOURIHANE BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+ * EVENT SHALL THE PROVIDER BE LIABLE FOR ANY SPECIAL, INDIRECT OR
  * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
  * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  * PERFORMANCE OF THIS SOFTWARE.
  *
- * Authors:  Alan Hourihane, alanh@fairlite.demon.co.uk
- *           Mike Chapman <mike@paranoia.com>, 
- *           Juanjo Santamarta <santamarta@ctv.es>, 
- *           Mitani Hiroshi <hmitani@drl.mei.co.jp> 
- *           David Thomas <davtom@dream.org.uk>. 
+ * Authors:  Alan Hourihane <alanh@fairlite.demon.co.uk>
+ *           Mike Chapman <mike@paranoia.com>,
+ *           Juanjo Santamarta <santamarta@ctv.es>,
+ *           Mitani Hiroshi <hmitani@drl.mei.co.jp>
+ *           David Thomas <davtom@dream.org.uk>.
+ *	     Thomas Winischhofer <thomas@winischhofer.net>
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/sis_dac.c,v 1.25 2002/04/04 14:05:48 eich Exp $ */
 
 #include "xf86.h"
 #include "xf86_OSproc.h"
@@ -33,43 +35,48 @@
 #include "xf86Version.h"
 #include "xf86PciInfo.h"
 #include "xf86Pci.h"
-
-#include "vgaHW.h"
+#include "xf86DDC.h"
 
 #include "sis.h"
 #include "sis_dac.h"
 #include "sis_regs.h"
 #include "sis_vb.h"
-#include "sis_bios.h"
 
 static void SiSSave(ScrnInfoPtr pScrn, SISRegPtr sisReg);
 static void SiSRestore(ScrnInfoPtr pScrn, SISRegPtr sisReg);
 
 static void SiS300Save(ScrnInfoPtr pScrn, SISRegPtr sisReg);
+static void SiS310Save(ScrnInfoPtr pScrn, SISRegPtr sisReg);
 static void SiS301Save(ScrnInfoPtr pScrn, SISRegPtr sisReg);
 static void SiS301BSave(ScrnInfoPtr pScrn, SISRegPtr sisReg);
-static void SiSLVDSSave(ScrnInfoPtr pScrn, SISRegPtr sisReg);
+static void SiSLVDSChrontelSave(ScrnInfoPtr pScrn, SISRegPtr sisReg);
 static void SiS300Restore(ScrnInfoPtr pScrn, SISRegPtr sisReg);
+static void SiS310Restore(ScrnInfoPtr pScrn, SISRegPtr sisReg);
 static void SiS301Restore(ScrnInfoPtr pScrn, SISRegPtr sisReg);
 static void SiS301BRestore(ScrnInfoPtr pScrn, SISRegPtr sisReg);
-static void SiSLVDSRestore(ScrnInfoPtr pScrn, SISRegPtr sisReg);
-static void SiSChrontelSave(ScrnInfoPtr pScrn, SISRegPtr sisReg);
+static void SiSLVDSChrontelRestore(ScrnInfoPtr pScrn, SISRegPtr sisReg);
 static void SiS301LoadPalette(ScrnInfoPtr pScrn, int numColors,
                       int *indicies, LOCO *colors, VisualPtr pVisual);
-static void SiS300Threshold(ScrnInfoPtr pScrn, DisplayModePtr mode,
-                      unsigned short *Low, unsigned short *High);
-static void SiS630Threshold(ScrnInfoPtr pScrn, DisplayModePtr mode,
-                      unsigned short *Low, unsigned short *High);
-static void SiS530Threshold(ScrnInfoPtr pScrn, DisplayModePtr mode,
-                      unsigned short *Low, unsigned short *High);
 static void SiSThreshold(ScrnInfoPtr pScrn, DisplayModePtr mode,
                       unsigned short *Low, unsigned short *High);
 static void SetBlock(CARD16 port, CARD8 from, CARD8 to, CARD8 *DataPtr);
+#if 0
+Bool        SiSI2CInit(ScrnInfoPtr pScrn);
+#endif
 
-static unsigned short ch7005idx[0x11]={0x00,0x07,0x08,0x0a,0x0b,0x04,0x09,0x20,0x21,0x18,0x19,0x1a,0x1b,0x1c,0x1d,0x1e,0x1f};
+static const unsigned short ch700xidx[] = {
+      0x00,0x07,0x08,0x0a,0x0b,0x04,0x09,0x20,0x21,0x18,0x19,0x1a,
+      0x1b,0x1c,0x1d,0x1e,0x1f,  /* 0x0e,  - TW: Don't save the power register */
+      0x01,0x03,0x06,0x0d,0x11,0x13,0x14,0x15,0x17,0x22,0x23,0x24
+   };
 
-int
-sis_compute_vclk(
+static const unsigned short ch701xidx[] = {
+      0x1c,0x5f,0x64,0x6f,0x70,0x71,0x72,0x73,0x74,0x76,0x78,0x7d,
+      0x67,0x68,0x69,0x6a,0x6b,0x1e,0x00,0x01,0x02,0x04,0x03,0x05,
+      0x06,0x07,0x08,0x15,0x1f,0x0c,0x0d,0x0e,0x0f,0x10
+   };
+
+int SiS_compute_vclk(
         int Clock,
         int *out_n,
         int *out_dn,
@@ -166,7 +173,7 @@ sis_compute_vclk(
     }
     *out_n = best_n;
     *out_dn = best_dn;
-    PDEBUG(ErrorF("sis_compute_vclk: Clock=%d, n=%d, dn=%d, div=%d, sbit=%d,"
+    PDEBUG(ErrorF("SiS_compute_vclk: Clock=%d, n=%d, dn=%d, div=%d, sbit=%d,"
                     " scale=%d\n", Clock, best_n, best_dn, *out_div,
                     *out_sbit, *out_scale));
     return 1;
@@ -203,11 +210,11 @@ SiSCalcClock(ScrnInfoPtr pScrn, int clock, int max_VLD, unsigned int *vclk)
 #define Fref 14318180
 /* stability constraints for internal VCO -- MAX_VCO also determines 
  * the maximum Video pixel clock */
-#define MIN_VCO Fref
-#define MAX_VCO 135000000
+#define MIN_VCO      Fref
+#define MAX_VCO      135000000
 #define MAX_VCO_5597 353000000
-#define MAX_PSN 0 /* no pre scaler for this chip */
-#define TOLERANCE 0.01  /* search smallest M and N in this tolerance */
+#define MAX_PSN      0          /* no pre scaler for this chip */
+#define TOLERANCE    0.01       /* search smallest M and N in this tolerance */
   
   int M_min = 2; 
   int M_max = 128;
@@ -216,7 +223,6 @@ SiSCalcClock(ScrnInfoPtr pScrn, int clock, int max_VLD, unsigned int *vclk)
  
   target = clock * 1000;
  
-
   if (pSiS->Chipset == PCI_CHIP_SIS5597 || pSiS->Chipset == PCI_CHIP_SIS6326){
         int low_N = 2;
         int high_N = 5;
@@ -321,10 +327,11 @@ SiSCalcClock(ScrnInfoPtr pScrn, int clock, int max_VLD, unsigned int *vclk)
                                 bestVLD = VLD;
                                 bestFout = Fout;
                             }
-                        xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO,3,"Freq. selected: %.2f MHz, M=%d, N=%d, VLD=%d,"
-                               " P=%d, PSN=%d\n",
+                        xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO,3,
+			       "Freq. selected: %.2f MHz, M=%d, N=%d, VLD=%d, P=%d, PSN=%d\n",
                                (float)(clock / 1000.), M, N, P, VLD, PSN);
-                        xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO,3,"Freq. set: %.2f MHz\n", Fout / 1.0e6);
+                        xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO,3,
+			       "Freq. set: %.2f MHz\n", Fout / 1.0e6);
                         }
                     }
                 }
@@ -353,908 +360,1604 @@ static void
 SiSSave(ScrnInfoPtr pScrn, SISRegPtr sisReg)
 {
     SISPtr pSiS = SISPTR(pScrn);
-    int vgaIOBase;
     int i,max;
-    
-        PDEBUG(xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3,
-                        "SiSSave(ScrnInfoPtr pScrn, SISRegPtr sisReg)\n"));
 
-    vgaHWGetIOBase(VGAHWPTR(pScrn));
-    vgaIOBase = VGAHWPTR(pScrn)->IOBase;
-    
+    PDEBUG(xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3,
+             "SiSSave(ScrnInfoPtr pScrn, SISRegPtr sisReg)\n"));
+
+#ifdef UNLOCK_ALWAYS
+    sisSaveUnlockExtRegisterLock(pSiS, NULL, NULL);
+#endif
 
     switch (pSiS->Chipset) {
         case PCI_CHIP_SIS5597:
-           max=0x39;
+           max=0x3C;
            break;
         case PCI_CHIP_SIS6326:
         case PCI_CHIP_SIS530:
-           max=0x3F;
+           max=0x3F; 
            break;
         default:
            max=0x37;
            break;
         }
 
+    /* Save extended SR registers */
     for (i = 0x06; i <= max; i++) {
-        outb(VGA_SEQ_INDEX, i);
-        xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 4,
-                    "XR%02X Contents - %02X \n", i, inb(VGA_SEQ_DATA));
-        sisReg->sisRegs3C4[i] = inb(VGA_SEQ_DATA);
+        inSISIDXREG(SISSR, i, sisReg->sisRegs3C4[i]);
+#ifdef DEBUG
+	xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 4,
+                 "XR%02X Contents - %02X \n", i, sisReg->sisRegs3C4[i]);
+#endif
+#ifdef TWDEBUG
+        xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+		 "SR%02X - %02X \n", i,sisReg->sisRegs3C4[i]);
+#endif
     }
 
-    /*sisReg->sisRegs3C2 = inb(0x3CC);*/
-    sisReg->sisRegs3C2 = inb(pSiS->RelIO+0x4c);
+#ifdef TWDEBUG
+    for (i = 0x00; i <= 0x3f; i++) {
+        inSISIDXREG(SISCR, i, max);
+        xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+		 "CR%02X - %02X \n", i,max);
+    }
+#endif
+
+    /* Save lock (will not be restored in SiSRestore()!) */
+    inSISIDXREG(SISCR, 0x80, sisReg->sisRegs3D4[0x80]);
+
+    sisReg->sisRegs3C2 = inSISREG(SISMISCR);	 /* Misc */
+
+    /* TW: Save TV registers */
+    if((pSiS->Chipset == PCI_CHIP_SIS6326) && (pSiS->SiS6326Flags & SIS6326_HASTV)) {
+       outSISIDXREG(SISCR, 0x80, 0x86);
+       for(i = 0x00; i <= 0x44; i++) {
+         sisReg->sis6326tv[i] = SiS6326GetTVReg(pScrn, i);
+#ifdef TWDEBUG
+         xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+		 "VR%02X - %02X \n", i,sisReg->sis6326tv[i]);
+#endif
+       }
+    }
 }
 
 static void
 SiSRestore(ScrnInfoPtr pScrn, SISRegPtr sisReg)
 {
     SISPtr pSiS = SISPTR(pScrn);
-    int vgaIOBase;
     int i,max;
+    unsigned char tmp;
+#ifdef DEBUG
+    int temp;
+#endif
 
     xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 4,
                 "SiSRestore(ScrnInfoPtr pScrn, SISRegPtr sisReg)\n");
 
-    vgaHWGetIOBase(VGAHWPTR(pScrn));
-    vgaIOBase = VGAHWPTR(pScrn)->IOBase;
+#ifdef UNLOCK_ALWAYS
+    sisSaveUnlockExtRegisterLock(pSiS, NULL, NULL);
+#endif
 
     switch (pSiS->Chipset) {
         case PCI_CHIP_SIS5597:
-           max=0x39;
+           max = 0x3C;
            break;
         case PCI_CHIP_SIS6326:
-           max=0x3F;
-           break;
-        case PCI_CHIP_SIS530:
-           max=0x3F;
+	case PCI_CHIP_SIS530:
+           max = 0x3F;
            break;
         default:
-           max=0x37;
+           max = 0x37;
            break;
     }
 
-    for (i = 0x06; i <= max; i++) {
-        outb(VGA_SEQ_INDEX,i);
-        xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 4,
-                    "XR%X Contents - %02X ", i, inb(VGA_SEQ_DATA));
-
-        outb(VGA_SEQ_DATA,sisReg->sisRegs3C4[i]);
-
-        xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 4,
-                        "Restore to - %02X Read after - %02X\n",
-                        sisReg->sisRegs3C4[i], inb(VGA_SEQ_DATA));
+    /* Disable TV on 6326 before restoring */
+    if((pSiS->Chipset == PCI_CHIP_SIS6326) && (pSiS->SiS6326Flags & SIS6326_HASTV)) {
+       outSISIDXREG(SISCR, 0x80, 0x86);
+       tmp = SiS6326GetTVReg(pScrn, 0x00);
+       tmp &= ~0x04;
+       SiS6326SetTVReg(pScrn, 0x00, tmp);
     }
 
-    /*outb(0x3C2, sisReg->sisRegs3C2);*/
-    outb(pSiS->RelIO+0x42, sisReg->sisRegs3C2);
+    /* Restore VCLKs */
+#if 0  /* TW: No, we didn't save SR2x-1 and SR2x-2! */
+    andSISIDXREG(SISSR, 0x38, 0xfc);
+    inSISIDXREG(SISSR, 0x13, tmp);
+    tmp &= ~0x40;
+    tmp |= (sisReg->sisRegs3C4[0x13] & 0x40);
+    outSISIDXREG(SISSR, 0x13, tmp);
+    outSISIDXREG(SISSR, 0x2a, sisReg->sisRegs3C4[0x2a]);
+    outSISIDXREG(SISSR, 0x2b, sisReg->sisRegs3C4[0x2b]);
+    orSISIDXREG(SISSR, 0x38, 0x01);
+    inSISIDXREG(SISSR, 0x13, tmp);
+    tmp &= ~0x40;
+    tmp |= (sisReg->sisRegs3C4[0x13] & 0x40);
+    outSISIDXREG(SISSR, 0x13, tmp);
+    outSISIDXREG(SISSR, 0x2a, sisReg->sisRegs3C4[0x2a]);
+    outSISIDXREG(SISSR, 0x2b, sisReg->sisRegs3C4[0x2b]);
+    andSISIDXREG(SISSR, 0x38, 0xfc);
+    orSISIDXREG(SISSR, 0x38, 0x02);
+    inSISIDXREG(SISSR, 0x13, tmp);
+    tmp &= ~0x40;
+    tmp |= (sisReg->sisRegs3C4[0x13] & 0x40);
+    outSISIDXREG(SISSR, 0x13, tmp);
+    outSISIDXREG(SISSR, 0x2a, sisReg->sisRegs3C4[0x2a]);
+    outSISIDXREG(SISSR, 0x2b, sisReg->sisRegs3C4[0x2b]);
+    andSISIDXREG(SISSR, 0x38, 0xfc);
+#endif
 
-    /* MemClock needs this to take effect */
+    /* Restore other extended SR registers */
+    for (i = 0x06; i <= max; i++) {
+        if((i == 0x13) || (i == 0x2a) || (i == 0x2b)) continue;
+#ifdef DEBUG
+        inSISIDXREG(SISSR, i, temp);
+	xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 4,
+                    "SR%X Contents: %02X - ", i, temp);
+#endif
+	outSISIDXREG(SISSR, i, sisReg->sisRegs3C4[i]);
+#ifdef DEBUG
+	inSISIDXREG(SISSR, i, temp);
+	xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 4,
+                        "Restored to %02X - Read: %02X\n",
+                        sisReg->sisRegs3C4[i], temp);
+#endif
+    }
 
-    outw(VGA_SEQ_INDEX, 0x0100);        /* Synchronous Reset */
-    outw(VGA_SEQ_INDEX, 0x0300);        /* End Reset */
+    /* Now restore VCLK (with correct SR38 setting) */
+    outSISIDXREG(SISSR, 0x13, sisReg->sisRegs3C4[0x13]);
+    outSISIDXREG(SISSR, 0x2a, sisReg->sisRegs3C4[0x2a]);
+    outSISIDXREG(SISSR, 0x2b, sisReg->sisRegs3C4[0x2b]);
 
+    /* Misc */
+    outSISREG(SISMISCW, sisReg->sisRegs3C2);
 
+    /* MemClock needs this to take effect */
+    outSISIDXREG(SISSR, 0x00, 0x01);    /* Synchronous Reset */
+    usleep(10000);
+    outSISIDXREG(SISSR, 0x00, 0x03);    /* End Reset */
+
+    /* TW: Restore TV registers */
+    pSiS->SiS6326Flags &= ~SIS6326_TVON;
+    if((pSiS->Chipset == PCI_CHIP_SIS6326) && (pSiS->SiS6326Flags & SIS6326_HASTV)) {
+       for(i = 0x01; i <= 0x44; i++) {
+         SiS6326SetTVReg(pScrn, i, sisReg->sis6326tv[i]);
+#ifdef TWDEBUG
+         xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+	 	"VR%02x restored to %02x\n",
+		i, sisReg->sis6326tv[i]);
+#endif
+       }
+       tmp = SiS6326GetXXReg(pScrn, 0x13);
+       SiS6326SetXXReg(pScrn, 0x13, 0xfa);
+       tmp = SiS6326GetXXReg(pScrn, 0x14);
+       SiS6326SetXXReg(pScrn, 0x14, 0xc8);
+       if(!(sisReg->sisRegs3C4[0x0D] & 0x04)) {
+    	  tmp = SiS6326GetXXReg(pScrn, 0x13);
+	  SiS6326SetXXReg(pScrn, 0x13, 0xf6);
+	  tmp = SiS6326GetXXReg(pScrn, 0x14);
+	  SiS6326SetXXReg(pScrn, 0x14, 0xbf);
+       }
+       if(sisReg->sis6326tv[0] & 0x04) pSiS->SiS6326Flags |= SIS6326_TVON;
+    }
 }
 
+/* Save SiS 300 series register contents */
 static void
 SiS300Save(ScrnInfoPtr pScrn, SISRegPtr sisReg)
 {
     SISPtr pSiS = SISPTR(pScrn);
-    int vgaIOBase;
-    int i,max;
+    int i;
 
-        PDEBUG(xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3,
-                        "SiS300Save(ScrnInfoPtr pScrn, SISRegPtr sisReg)\n"));
+    PDEBUG(xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3,
+     		"SiS300Save(ScrnInfoPtr pScrn, SISRegPtr sisReg)\n"));
 
-    vgaHWGetIOBase(VGAHWPTR(pScrn));
-    vgaIOBase = VGAHWPTR(pScrn)->IOBase;
-
-    max=0x3D;
+#ifdef UNLOCK_ALWAYS
+    sisSaveUnlockExtRegisterLock(pSiS, NULL, NULL);
+#endif
 
-    for (i = 0x06; i <= max; i++) {
-        outb(VGA_SEQ_INDEX, i);
-        sisReg->sisRegs3C4[i] = inb(VGA_SEQ_DATA);
-          xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 4,
-			 "XR%02X Contents - %02X \n", i,sisReg->sisRegs3C4[i]);
+    /* Save SR registers */
+    for (i = 0x00; i <= 0x3D; i++) {
+        inSISIDXREG(SISSR, i, sisReg->sisRegs3C4[i]);
+#ifdef TWDEBUG
+        xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+		 "SR%02X - %02X \n", i,sisReg->sisRegs3C4[i]);
+#endif
     }
 
-    for (i=0x19; i<0x40; i++)  {
-        inSISIDXREG(pSiS->RelIO+CROFFSET, i, sisReg->sisRegs3D4[i]);
-	xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 4,
-		       "3D4-%02X Contents - %02X \n", i,sisReg->sisRegs3D4[i]);
+    /* Save CR registers */
+    for (i = 0x00; i < 0x40; i++)  {
+        inSISIDXREG(SISCR, i, sisReg->sisRegs3D4[i]);
+#ifdef TWDEBUG
+        xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+		"CR%02X Contents - %02X \n", i,sisReg->sisRegs3D4[i]);
+#endif
     }
 
-    /*sisReg->sisRegs3C2 = inb(0x3CC);*/
-    sisReg->sisRegs3C2 = inb(pSiS->RelIO+0x4c);
-
-#if 1 /* TW: Saving bridge data not yet needed; will possibly be when fixing VESA scaling problem */
-    if (!pSiS->UseVESA) { /* TW: No need for touching the bridge registers when using VESA */
-#endif
-      if ((pSiS->VBFlags & VB_LVDS)) /* && (pSiS->VBFlags & CRT2_LCD)) */
-        (*pSiS->SiSSaveLVDS)(pScrn, sisReg);
-      if ((pSiS->VBFlags & (VB_CHRONTEL))) /* | CRT2_TV))==(VB_CHRONTEL|CRT2_TV)) */
-	(*pSiS->SiSSaveChrontel)(pScrn,sisReg);
-#if 1
+    /* Save Misc register */
+    sisReg->sisRegs3C2 = inSISREG(SISMISCR);	 
+    
+    /* Save FQBQ and GUI timer settings */
+    if(pSiS->Chipset == PCI_CHIP_SIS630) {
+       sisReg->sisRegsPCI50 = pciReadLong(0x00000000, 0x50);
+       sisReg->sisRegsPCIA0 = pciReadLong(0x00000000, 0xA0);
+#ifdef TWDEBUG
+       xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+       		"PCI Config 50 = %lx\n", sisReg->sisRegsPCI50);
+       xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+       		"PCI Config A0 = %lx\n", sisReg->sisRegsPCIA0);		
+#endif       
     }
+
+    /* Save panel link/video bridge registers */
+#ifndef TWDEBUG
+    if(!pSiS->UseVESA) {
 #endif
-    if ((pSiS->VBFlags & (VB_301|VB_303))) /* && (pSiS->VBFlags & (CRT2_LCD|CRT2_TV|CRT2_VGA))) */
+      if (pSiS->VBFlags & (VB_LVDS|VB_CHRONTEL))
+        (*pSiS->SiSSaveLVDSChrontel)(pScrn, sisReg);
+      if (pSiS->VBFlags & (VB_301|VB_303))
         (*pSiS->SiSSave2)(pScrn, sisReg);
-#if 1
-    if (!pSiS->UseVESA) {  /* TW: Don't touch the 301B/302 when using VESA (PRILIMINARY) */
-#endif
-      if ((pSiS->VBFlags & (VB_301B|VB_302))) /* && (pSiS->VBFlags & (CRT2_LCD|CRT2_TV|CRT2_VGA))) */
+      if (pSiS->VBFlags & (VB_301B|VB_302B|VB_30xLV|VB_30xLVX))
         (*pSiS->SiSSave3)(pScrn, sisReg);
-#if 1
+#ifndef TWDEBUG
     }
 #endif
 
-    if ((!pSiS->UseVESA) && (pSiS->VBFlags & CRT2_LCD))
-	pSiS->BIOSModeSave = SiSGetSetModeID(pScrn,0xFF);
-
+    /* Save Mode number */
+#if XF86_VERSION_CURRENT >= XF86_VERSION_NUMERIC(4,2,99,0,0)
+    if(!(pSiS->UseVESA))
+#endif
+        pSiS->BIOSModeSave = SiS_GetSetModeID(pScrn,0xFF);
+	
+#ifdef TWDEBUG	
+    xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+    	"BIOS mode ds:449 = 0x%x\n", pSiS->BIOSModeSave);
+#endif	
 }
 
+
+/* Restore SiS300 series register contents */
 static void
 SiS300Restore(ScrnInfoPtr pScrn, SISRegPtr sisReg)
 {
     SISPtr pSiS = SISPTR(pScrn);
-    int vgaIOBase;
-    int i,max,temp;
+    int i,temp;
+    CARD32 temp1;
 
     xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 4,
                 "SiS300Restore(ScrnInfoPtr pScrn, SISRegPtr sisReg)\n");
 
-    vgaHWGetIOBase(VGAHWPTR(pScrn));
-    vgaIOBase = VGAHWPTR(pScrn)->IOBase;
+#ifdef UNLOCK_ALWAYS
+    sisSaveUnlockExtRegisterLock(pSiS, NULL, NULL);
+#endif
 
-    /* TW: Wait for accellerator to finish on-going drawing operations. */
-    xf86DrvMsg(0, X_PROBED, "Before wait\n");
-    outb(VGA_SEQ_INDEX, 0x1E);
-    temp = inb(VGA_SEQ_DATA);
-    if (temp & (0x40|0x10))  {	/* TW: 0x40 = 2D, 0x10 = 3D enabled*/
+    /* TW: Wait for accelerator to finish on-going drawing operations. */
+    inSISIDXREG(SISSR, 0x1E, temp);
+    if(temp & (0x40|0x10|0x02))  {
+        while ( (MMIO_IN16(pSiS->IOBase, 0x8242) & 0xE000) != 0xE000){};
 	while ( (MMIO_IN16(pSiS->IOBase, 0x8242) & 0xE000) != 0xE000){};
- 	while ( (MMIO_IN16(pSiS->IOBase, 0x8242) & 0xE000) != 0xE000){};
-    } /* TW: do it twice as in sis300_accel.h */
-    xf86DrvMsg(0, X_PROBED, "After wait\n");
+	while ( (MMIO_IN16(pSiS->IOBase, 0x8242) & 0xE000) != 0xE000){};
+    }
+    
+    if (!(pSiS->UseVESA)) {
+       if(pSiS->VBFlags & VB_LVDS) {
+          SiS_UnLockCRT2(pSiS->SiS_Pr, &pSiS->sishw_ext, pSiS->RelIO+0x30);
+          SiS_DisableBridge(pSiS->SiS_Pr, &pSiS->sishw_ext, pSiS->RelIO+0x30);
+       }
+    }
 
-    max=0x3D;
-    for (i = 0x19; i < 0x40; i++)  {
-        outSISIDXREG(pSiS->RelIO+CROFFSET, i, sisReg->sisRegs3D4[i]);
+    /* Restore extended CR registers */
+    for(i = 0x19; i < 0x40; i++)  {
+        outSISIDXREG(SISCR, i, sisReg->sisRegs3D4[i]);
     }
-    if (pSiS->Chipset != PCI_CHIP_SIS300)  {
+
+    if(pSiS->Chipset != PCI_CHIP_SIS300)  {
 	unsigned char val;
-	inSISIDXREG(pSiS->RelIO+CROFFSET,0x1A,val);
-	if (val == sisReg->sisRegs3D4[0x19])
-	   outSISIDXREG(pSiS->RelIO+CROFFSET, 0x1A, sisReg->sisRegs3D4[0x19]);
-	inSISIDXREG(pSiS->RelIO+CROFFSET,0x19,val);
-	if (val == sisReg->sisRegs3D4[0x1A])
-           outSISIDXREG(pSiS->RelIO+CROFFSET, 0x19, sisReg->sisRegs3D4[0x1A]);
+	inSISIDXREG(SISCR, 0x1A, val);
+	if(val == sisReg->sisRegs3D4[0x19])
+	   outSISIDXREG(SISCR, 0x1A, sisReg->sisRegs3D4[0x19]);
+	inSISIDXREG(SISCR,0x19,val);
+	if(val == sisReg->sisRegs3D4[0x1A])
+           outSISIDXREG(SISCR, 0x19, sisReg->sisRegs3D4[0x1A]);
     }
 
-    /* On 630, set SR20 | 0x20 if accellerators are on */               /*0x40*/
-    if ((pSiS->Chipset == PCI_CHIP_SIS630) && (sisReg->sisRegs3C4[0x1e] & 0x50)) {
+    /* Set (and leave) PCI_IO_ENABLE on if accelerators are on */
+    if(sisReg->sisRegs3C4[0x1e] & 0x50) {
 	sisReg->sisRegs3C4[0x20] |= 0x20;
-	outb(VGA_SEQ_INDEX, 0x20);
-	outb(VGA_SEQ_DATA, sisReg->sisRegs3C4[0x20]);
-        /* outw(VGA_SEQ_INDEX, sisReg->sisRegs3C4[0x20] << 8 | 0x20); */
+	outSISIDXREG(SISSR, 0x20, sisReg->sisRegs3C4[0x20]);
     }
 
-    /* TW: If TQ is switched on, don't switch it off ever again */
-    if (!pSiS->NoAccel) {
-      if (pSiS->TurboQueue) {
+    /* TW: If TQ is switched on, don't switch it off ever again!
+     *     Therefore, always restore registers with TQ enabled.
+     */
+    if((!pSiS->NoAccel) && (pSiS->TurboQueue)) {
         temp = (pScrn->videoRam/64) - 8;
         sisReg->sisRegs3C4[0x26] = temp & 0xFF;
 	sisReg->sisRegs3C4[0x27] = ((temp >> 8) & 3) | 0xF0;
-      }
     }
 
-    for (i = 0x06; i <= max; i++) {
-        outb(VGA_SEQ_INDEX,i);
-        xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 4,
-                    "XR%X Contents - %02X ", i, inb(VGA_SEQ_DATA));
-        outb(VGA_SEQ_DATA,sisReg->sisRegs3C4[i]);
+    /* Restore extended SR registers */
+    for (i = 0x06; i <= 0x3D; i++) {
+        temp = sisReg->sisRegs3C4[i];
+        if(!(pSiS->UseVESA)) {
+           if(pSiS->VBFlags & VB_LVDS) {
+               if(i == 0x11) {
+	                inSISIDXREG(SISSR,0x11,temp);
+	       		temp &= 0x0c; 
+			temp |= (sisReg->sisRegs3C4[i] & 0xf3);
+	       }
+           }
+        }
+	outSISIDXREG(SISSR, i, temp);
+    }
+    
+    /* TW: Restore VCLK and ECLK */
+    if(pSiS->VBFlags & (VB_LVDS | VB_301B)) {
+       outSISIDXREG(SISSR,0x31,0x20);
+       outSISIDXREG(SISSR,0x2b,sisReg->sisRegs3C4[0x2b]);
+       outSISIDXREG(SISSR,0x2c,sisReg->sisRegs3C4[0x2c]);
+       outSISIDXREG(SISSR,0x2d,0x80);
+       outSISIDXREG(SISSR,0x31,0x10);
+       outSISIDXREG(SISSR,0x2b,sisReg->sisRegs3C4[0x2b]);
+       outSISIDXREG(SISSR,0x2c,sisReg->sisRegs3C4[0x2c]);
+       outSISIDXREG(SISSR,0x2d,0x80);
+    }
+    outSISIDXREG(SISSR,0x31,0x00);
+    outSISIDXREG(SISSR,0x2b,sisReg->sisRegs3C4[0x2b]);
+    outSISIDXREG(SISSR,0x2c,sisReg->sisRegs3C4[0x2c]);
+    outSISIDXREG(SISSR,0x2d,0x80);
+    if(pSiS->VBFlags & (VB_LVDS | VB_301B)) {
+       outSISIDXREG(SISSR,0x31,0x20);
+       outSISIDXREG(SISSR,0x2e,sisReg->sisRegs3C4[0x2e]);
+       outSISIDXREG(SISSR,0x2f,sisReg->sisRegs3C4[0x2f]);
+       outSISIDXREG(SISSR,0x31,0x10);
+       outSISIDXREG(SISSR,0x2e,sisReg->sisRegs3C4[0x2e]);
+       outSISIDXREG(SISSR,0x2f,sisReg->sisRegs3C4[0x2f]);
+       outSISIDXREG(SISSR,0x31,0x00);
+       outSISIDXREG(SISSR,0x2e,sisReg->sisRegs3C4[0x2e]);
+       outSISIDXREG(SISSR,0x2f,sisReg->sisRegs3C4[0x2f]);
+    }
+    
+    /* Restore Misc register */
+    outSISREG(SISMISCW, sisReg->sisRegs3C2);  
+    
+    /* Restore FQBQ and GUI timer settings */
+    if(pSiS->Chipset == PCI_CHIP_SIS630) {
+       temp1 = pciReadLong(0x00000000, 0x50);
+       if(pciReadLong(0x00000000, 0x00) == 0x06301039) {
+          temp1 &= 0xf0ffffff;
+          temp1 |= (sisReg->sisRegsPCI50 & ~0xf0ffffff);
+       } else {  /* 730 */
+          temp1 &= 0xfffff9ff;
+          temp1 |= (sisReg->sisRegsPCI50 & ~0xfffff9ff);
+       }   
+       pciWriteLong(0x00000000, 0x50, temp1);
+    
+       temp1 = pciReadLong(0x00000000, 0xA0);
+       if(pciReadLong(0x00000000, 0x00) == 0x06301039) {
+          temp1 &= 0xf0ffffff;
+          temp1 |= (sisReg->sisRegsPCIA0 & ~0xf0ffffff);
+       } else {	/* 730 */
+          temp1 &= 0x00ffffff;
+          temp1 |= (sisReg->sisRegsPCIA0 & ~0x00ffffff);
+       } 
+       pciWriteLong(0x00000000, 0xA0, temp1);
+    }
+
+    /* Restore panel link/video bridge registers */
+    if (!(pSiS->UseVESA)) {
+      if (pSiS->VBFlags & (VB_LVDS|VB_CHRONTEL))
+        (*pSiS->SiSRestoreLVDSChrontel)(pScrn, sisReg);
+      if (pSiS->VBFlags & (VB_301|VB_303))
+        (*pSiS->SiSRestore2)(pScrn, sisReg);
+      if (pSiS->VBFlags & (VB_301B|VB_302B|VB_30xLV|VB_30xLVX))
+        (*pSiS->SiSRestore3)(pScrn, sisReg);
+    }
+    
+    /* MemClock needs this to take effect */
+    outSISIDXREG(SISSR, 0x00, 0x01);    /* Synchronous Reset */
+    outSISIDXREG(SISSR, 0x00, 0x03);    /* End Reset */
+
+    /* Restore mode number */
+#if XF86_VERSION_CURRENT >= XF86_VERSION_NUMERIC(4,2,99,0,0)
+    if(!(pSiS->UseVESA))
+#endif
+        SiS_GetSetModeID(pScrn,pSiS->BIOSModeSave);
+}
+
+/* Save SiS310 series register contents */
+static void
+SiS310Save(ScrnInfoPtr pScrn, SISRegPtr sisReg)
+{
+    SISPtr pSiS = SISPTR(pScrn);
+    int i;
+
+    PDEBUG(xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3,
+    		"SiS310Save(ScrnInfoPtr pScrn, SISRegPtr sisReg)\n"));
+
+#ifdef UNLOCK_ALWAYS
+    sisSaveUnlockExtRegisterLock(pSiS, NULL, NULL);
+#endif
+
+    /* Save SR registers */
+    for (i = 0x00; i <= 0x3F; i++) {
+        inSISIDXREG(SISSR, i, sisReg->sisRegs3C4[i]);
+#ifdef DEBUG
         xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 4,
-                        "Restore to - %02X Read after - %02X\n",
-                        sisReg->sisRegs3C4[i], inb(VGA_SEQ_DATA));
+		       "SR%02X - %02X \n", i,sisReg->sisRegs3C4[i]);
+#endif
+#ifdef TWDEBUG
+        xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+			 "SR%02X - %02X \n", i,sisReg->sisRegs3C4[i]);
+#endif
     }
-#if 1 /* TW: Saving bridge data not yet needed; will possibly be when fixing VESA scaling problem */
-    if (!pSiS->UseVESA) { /* TW: No need for touching the bridge registers when using VESA */
+
+    /* TW: Save command queue location */
+    sisReg->sisMMIO85C0 = MMIO_IN32(pSiS->IOBase, 0x85C0);
+
+    /* Save CR registers */
+    for (i = 0x00; i <= 0x5f; i++)  {
+        inSISIDXREG(SISCR, i, sisReg->sisRegs3D4[i]);
+#ifdef DEBUG
+	xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 4,
+		       "CR%02X - %02X \n", i,sisReg->sisRegs3D4[i]);
+#endif
+#ifdef TWDEBUG
+        xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+		"CR%02X Contents - %02X \n", i,sisReg->sisRegs3D4[i]);
 #endif
-      if ((pSiS->VBFlags & VB_LVDS)) /* && (pSiS->VBFlags & CRT2_LCD)) */
-        (*pSiS->SiSRestoreLVDS)(pScrn, sisReg);
-      if ((pSiS->VBFlags & (VB_CHRONTEL))) /* | CRT2_TV))==(VB_CHRONTEL|CRT2_TV)) */
-        (*pSiS->SiSRestoreChrontel)(pScrn,sisReg);
-#if 1
     }
+
+    /* Save Misc register */
+    sisReg->sisRegs3C2 = inSISREG(SISMISCR);   
+
+    /* Save panel link/video bridge registers */
+#ifndef TWDEBUG
+    if (!pSiS->UseVESA) {
 #endif
-    if ((pSiS->VBFlags & (VB_301|VB_303))) /* && (pSiS->VBFlags & (CRT2_LCD|CRT2_TV|CRT2_VGA))) */
-        (*pSiS->SiSRestore2)(pScrn, sisReg);
-#if 1
-    if (!pSiS->UseVESA) {  /* TW: Don't touch the 301B/302 when using VESA */
+      if (pSiS->VBFlags & (VB_LVDS|VB_CHRONTEL))
+        (*pSiS->SiSSaveLVDSChrontel)(pScrn, sisReg);
+      if (pSiS->VBFlags & (VB_301|VB_303))
+        (*pSiS->SiSSave2)(pScrn, sisReg);
+      if (pSiS->VBFlags & (VB_301B|VB_302B|VB_30xLV|VB_30xLVX))
+        (*pSiS->SiSSave3)(pScrn, sisReg);
+#ifndef TWDEBUG
+    }
 #endif
-      if ((pSiS->VBFlags & (VB_301B|VB_302))) /* && (pSiS->VBFlags & (CRT2_LCD|CRT2_TV|CRT2_VGA))) */
-        (*pSiS->SiSRestore3)(pScrn, sisReg);
-#if 1
+
+    /* Save mode number */
+#if XF86_VERSION_CURRENT >= XF86_VERSION_NUMERIC(4,2,99,0,0)
+    if(!(pSiS->UseVESA))
+#endif
+        pSiS->BIOSModeSave = SiS_GetSetModeID(pScrn,0xFF);
+}
+
+/* Restore SiS310 series register contents */
+static void
+SiS310Restore(ScrnInfoPtr pScrn, SISRegPtr sisReg)
+{
+    SISPtr pSiS = SISPTR(pScrn);
+    int i,temp;
+
+    xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 4,
+                "SiS310Restore(ScrnInfoPtr pScrn, SISRegPtr sisReg)\n");
+
+#ifdef UNLOCK_ALWAYS
+    sisSaveUnlockExtRegisterLock(pSiS, NULL, NULL);
+#endif
+
+    /* TW: Wait for accelerator to finish on-going drawing operations. */
+    inSISIDXREG(SISSR, 0x1E, temp);
+    if (temp & (0x40|0x10|0x02))  {	/* TW: 0x40 = 2D, 0x10 = 3D enabled*/
+        while ( (MMIO_IN32(pSiS->IOBase, 0x85CC) & 0x80000000) != 0x80000000){};
+	while ( (MMIO_IN32(pSiS->IOBase, 0x85CC) & 0x80000000) != 0x80000000){};
+	while ( (MMIO_IN32(pSiS->IOBase, 0x85CC) & 0x80000000) != 0x80000000){};
+    }
+
+    /* Restore extended CR registers */
+    for (i = 0x19; i < 0x5C; i++)  {
+        outSISIDXREG(SISCR, i, sisReg->sisRegs3D4[i]);
+    }
+
+    /* TW: Leave PCI_IO_ENABLE on if accelerators are on (Is this required?) */
+    if (sisReg->sisRegs3C4[0x1e] & 0x50) {  /*0x40=2D, 0x10=3D*/
+	sisReg->sisRegs3C4[0x20] |= 0x20;
+	outSISIDXREG(SISSR, 0x20, sisReg->sisRegs3C4[0x20]);
     }
+
+    /* TW: We reset the command queue before restoring.
+     * This might be required because we never know what
+     * console driver (like the kernel framebuffer driver)
+     * or application is running and which queue mode it
+     * uses.
+     */
+    outSISIDXREG(SISSR, 0x27, 0x1F);
+    outSISIDXREG(SISSR, 0x26, 0x01);
+
+    /* Restore extended SR registers */
+    for (i = 0x06; i <= 0x3F; i++) {
+#ifdef DEBUG
+        inSISIDXREG(SISSR, i, temp);
+#endif
+	outSISIDXREG(SISSR, i, sisReg->sisRegs3C4[i]);
+#ifdef DEBUG
+	xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 4,
+                    "XR%X Contents %02X - ", i, temp);
+	inSISIDXREG(SISSR, i, temp);
+	xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 4,
+        	    "Restored to %02X - Read: %02X\n",
+                    sisReg->sisRegs3C4[i], temp);
 #endif
+    }
+    /* TW: Restore VCLK and ECLK */
+    andSISIDXREG(SISSR,0x31,0xcf);
+    if(pSiS->VBFlags & VB_LVDS) {
+        orSISIDXREG(SISSR,0x31,0x20);
+	outSISIDXREG(SISSR,0x2b,sisReg->sisRegs3C4[0x2b]);
+        outSISIDXREG(SISSR,0x2c,sisReg->sisRegs3C4[0x2c]);
+	outSISIDXREG(SISSR,0x2d,0x80);
+	andSISIDXREG(SISSR,0x31,0xcf);
+        orSISIDXREG(SISSR,0x31,0x10);
+	outSISIDXREG(SISSR,0x2b,sisReg->sisRegs3C4[0x2b]);
+        outSISIDXREG(SISSR,0x2c,sisReg->sisRegs3C4[0x2c]);
+	outSISIDXREG(SISSR,0x2d,0x80);
+	andSISIDXREG(SISSR,0x31,0xcf);
+	outSISIDXREG(SISSR,0x2b,sisReg->sisRegs3C4[0x2b]);
+        outSISIDXREG(SISSR,0x2c,sisReg->sisRegs3C4[0x2c]);
+	outSISIDXREG(SISSR,0x2d,0x01);
+	outSISIDXREG(SISSR,0x31,0x20);
+	outSISIDXREG(SISSR,0x2e,sisReg->sisRegs3C4[0x2e]);
+        outSISIDXREG(SISSR,0x2f,sisReg->sisRegs3C4[0x2f]);
+	outSISIDXREG(SISSR,0x31,0x10);
+	outSISIDXREG(SISSR,0x2e,sisReg->sisRegs3C4[0x2e]);
+        outSISIDXREG(SISSR,0x2f,sisReg->sisRegs3C4[0x2f]);
+	outSISIDXREG(SISSR,0x31,0x00);
+	outSISIDXREG(SISSR,0x2e,sisReg->sisRegs3C4[0x2e]);
+        outSISIDXREG(SISSR,0x2f,sisReg->sisRegs3C4[0x2f]);
+    } else {
+        outSISIDXREG(SISSR,0x2b,sisReg->sisRegs3C4[0x2b]);
+        outSISIDXREG(SISSR,0x2c,sisReg->sisRegs3C4[0x2c]);
+        outSISIDXREG(SISSR,0x2d,0x01);
+    }
+
+    /* TW: Initialize read/write pointer for command queue */
+    MMIO_OUT32(pSiS->IOBase, 0x85C4, MMIO_IN32(pSiS->IOBase, 0x85C8));
+    /* TW: Restore queue location */
+    MMIO_OUT32(pSiS->IOBase, 0x85C0, sisReg->sisMMIO85C0);
 
-    /*outb(0x3C2, sisReg->sisRegs3C2);*/
-    outb(pSiS->RelIO+0x42, sisReg->sisRegs3C2);
+    /* Restore Misc register */
+    outSISREG(SISMISCW, sisReg->sisRegs3C2);   
+
+    /* Restore panel link/video bridge registers */
+    if (!(pSiS->UseVESA)) {
+      if (pSiS->VBFlags & (VB_LVDS|VB_CHRONTEL))
+        (*pSiS->SiSRestoreLVDSChrontel)(pScrn, sisReg);
+      if (pSiS->VBFlags & (VB_301|VB_303))
+        (*pSiS->SiSRestore2)(pScrn, sisReg);
+      if (pSiS->VBFlags & (VB_301B|VB_302B|VB_30xLV|VB_30xLVX))
+        (*pSiS->SiSRestore3)(pScrn, sisReg);
+    }
 
     /* MemClock needs this to take effect */
-    outw(VGA_SEQ_INDEX, 0x0100);        /* Synchronous Reset */
-    outw(VGA_SEQ_INDEX, 0x0300);        /* End Reset */
+    outSISIDXREG(SISSR, 0x00, 0x01);    /* Synchronous Reset */
+    outSISIDXREG(SISSR, 0x00, 0x03);    /* End Reset */
 
-    if ((!pSiS->UseVESA) && (pSiS->VBFlags & CRT2_LCD))
-	SiSGetSetModeID(pScrn,pSiS->BIOSModeSave);
+    /* Restore Mode number */
+#if XF86_VERSION_CURRENT >= XF86_VERSION_NUMERIC(4,2,99,0,0)
+    if(!(pSiS->UseVESA))
+#endif
+       SiS_GetSetModeID(pScrn,pSiS->BIOSModeSave);
 }
 
+/* Save SiS301 bridge register contents */
 static void
 SiS301Save(ScrnInfoPtr pScrn, SISRegPtr sisReg)
 {
     SISPtr  pSiS = SISPTR(pScrn);
     int     i;
+    int     Part1max=0, Part2max=0, Part3max=0, Part4max=0;
+
+    /* Highest register number to save/restore */
+    switch (pSiS->VGAEngine) {
+    case SIS_300_VGA:
+         Part1max = 0x1d;
+	 Part2max = 0x45;
+	 Part3max = 0x3e;
+	 Part4max = 0x1b;
+	 break;
+    case SIS_315_VGA:
+         Part1max = 0x2e;  /* 0x23, but we also need 2d-2e */
+	 Part2max = 0x45;
+	 Part3max = 0x3e;
+	 Part4max = 0x1b;
+	 break;
+    }
 
-    /* for SiS301 only */
-    for (i=0; i<0x29; i++)  {
-        inSISIDXREG(pSiS->RelIO+4, i, sisReg->VBPart1[i]);
+    for (i=0; i<=Part1max; i++)  {
+        inSISIDXREG(SISPART1, i, sisReg->VBPart1[i]);
+#ifdef TWDEBUG
+	xf86DrvMsg(0, X_INFO, "301Save: Part1Port 0x%02x = 0x%02x\n", i, sisReg->VBPart1[i]);
+#endif
     }
-    for (i=0; i<0x46; i++)  {
-        inSISIDXREG(pSiS->RelIO+0x10, i, sisReg->VBPart2[i]);
+    for (i=0; i<=Part2max; i++)  {
+        inSISIDXREG(SISPART2, i, sisReg->VBPart2[i]);
+#ifdef TWDEBUG
+	xf86DrvMsg(0, X_INFO, "301Save: Part2Port 0x%02x = 0x%02x\n", i, sisReg->VBPart2[i]);
+#endif
     }
-    for (i=0; i<0x3F; i++)  {
-        inSISIDXREG(pSiS->RelIO+0x12, i, sisReg->VBPart3[i]);
+    for (i=0; i<=Part3max; i++)  {
+        inSISIDXREG(SISPART3, i, sisReg->VBPart3[i]);
+#ifdef TWDEBUG
+	xf86DrvMsg(0, X_INFO, "301Save: Part3Port 0x%02x = 0x%02x\n", i, sisReg->VBPart3[i]);
+#endif
     }
-    for (i=0; i<0x1C; i++)  {
-        inSISIDXREG(pSiS->RelIO+0x14, i, sisReg->VBPart4[i]);
+    for (i=0; i<=Part4max; i++)  {
+        inSISIDXREG(SISPART4, i, sisReg->VBPart4[i]);
+#ifdef TWDEBUG
+	xf86DrvMsg(0, X_INFO, "301Save: Part4Port 0x%02x = 0x%02x\n", i, sisReg->VBPart4[i]);
+#endif
     }
-    sisReg->VBPart2[0] &= ~0x20;    /* Disable VB Processor */
-    sisReg->sisRegs3C4[0x32] &= ~0x20;      /* Disable Lock Mode */
+
+    sisReg->VBPart2[0] &= ~0x20;         /* Disable VB Processor */
+    sisReg->sisRegs3C4[0x32] &= ~0x20;   /* Disable Lock Mode */
+}
+
+/* Restore SiS301 bridge register contents */
+static void
+SiS301Restore(ScrnInfoPtr pScrn, SISRegPtr sisReg)
+{
+    SISPtr  pSiS = SISPTR(pScrn);
+    int     Part1max=0, Part2max=0, Part3max=0, Part4max=0;
+
+    /* Highest register number to save/restore */
+    switch (pSiS->VGAEngine) {
+    case SIS_300_VGA:
+         Part1max = 0x1d;
+	 Part2max = 0x45;
+	 Part3max = 0x3e;
+	 Part4max = 0x1b;
+	 break;
+    case SIS_315_VGA:
+         Part1max = 0x23;
+	 Part2max = 0x45;
+	 Part3max = 0x3e;
+	 Part4max = 0x1b;
+	 break;
+    }
+
+    SiS_DisableBridge(pSiS->SiS_Pr, &pSiS->sishw_ext, pSiS->RelIO+0x30);
+
+    SiS_UnLockCRT2(pSiS->SiS_Pr, &pSiS->sishw_ext, pSiS->RelIO+0x30);
+
+    /* Pre-restore Part1 */
+    outSISIDXREG(SISPART1, 0x04, 0x00);
+    outSISIDXREG(SISPART1, 0x05, 0x00);
+    outSISIDXREG(SISPART1, 0x06, 0x00);
+    outSISIDXREG(SISPART1, 0x00, sisReg->VBPart1[0]);
+    outSISIDXREG(SISPART1, 0x01, sisReg->VBPart1[1]);
+
+    /* Pre-restore Part4 */
+    outSISIDXREG(SISPART4, 0x0D, sisReg->VBPart4[0x0D]);
+    outSISIDXREG(SISPART4, 0x0C, sisReg->VBPart4[0x0C]);
+
+    if (!(sisReg->sisRegs3D4[0x30] & 0x03) &&
+         (sisReg->sisRegs3D4[0x31] & 0x20))  {      /* disable CRT2 */
+            SiS_LockCRT2(pSiS->SiS_Pr, &pSiS->sishw_ext, pSiS->RelIO+0x30);
+            return;
+    }
+
+    /* Restore Part1 */
+    SetBlock(SISPART1, 0x02, Part1max, &(sisReg->VBPart1[0x02]));
+    switch (pSiS->VGAEngine) {
+      case SIS_300_VGA:
+        /* TW: Nothing special here. */
+      	break;
+      case SIS_315_VGA:
+        /* TW: Restore extra registers on 310 series */
+	SetBlock(SISPART1, 0x2C, 0x2E, &(sisReg->VBPart1[0x2C]));
+      	break;
+    }
+
+    /* Restore Part2 */
+    SetBlock(SISPART2, 0x00, Part2max, &(sisReg->VBPart2[0x00]));
+
+    /* Restore Part3 */
+    SetBlock(SISPART3, 0x00, Part3max, &(sisReg->VBPart3[0x00]));
+
+    /* Restore Part4 */
+    SetBlock(SISPART4, 0x0E, 0x11, &(sisReg->VBPart4[0x0E]));
+    SetBlock(SISPART4, 0x13, Part4max, &(sisReg->VBPart4[0x13]));
+
+    /* Post-restore Part4 (CRT2VCLK) */
+    outSISIDXREG(SISPART4, 0x0A, 0x01);
+    outSISIDXREG(SISPART4, 0x0B, sisReg->VBPart4[0x0B]);
+    outSISIDXREG(SISPART4, 0x0A, sisReg->VBPart4[0x0A]);
+    outSISIDXREG(SISPART4, 0x12, 0x00);
+    outSISIDXREG(SISPART4, 0x12, sisReg->VBPart4[0x12]);
+
+    SiS_EnableBridge(pSiS->SiS_Pr, &pSiS->sishw_ext, pSiS->RelIO+0x30);
+    SiS_DisplayOn(pSiS->SiS_Pr);
+    SiS_LockCRT2(pSiS->SiS_Pr, &pSiS->sishw_ext, pSiS->RelIO+0x30);
 }
 
+/* Save SiS301B/302B/30xLV bridge register contents */
 static void
 SiS301BSave(ScrnInfoPtr pScrn, SISRegPtr sisReg)
 {
     SISPtr  pSiS = SISPTR(pScrn);
     int     i;
+    int     Part1max=0, Part2max=0, Part3max=0, Part4max=0;
+
+    switch (pSiS->VGAEngine) {
+    case SIS_300_VGA:
+         Part1max = 0x37; /* 0x1d, but we also need 2c-2e, 35-37 */
+	 Part2max = 0x4d;
+	 Part3max = 0x3e;
+	 if(pSiS->VBFlags & (VB_30xLV|VB_30xLVX))
+	   Part4max = 0x24;
+	 else
+	   Part4max = 0x23;
+	 break;
+    case SIS_315_VGA:
+         Part1max = 0x37; /* 0x23, but we also need 2c-2e, 35-37 */
+	 Part2max = 0x4d;
+	 Part3max = 0x3e;
+	 if(pSiS->VBFlags & (VB_30xLV|VB_30xLVX))
+	   Part4max = 0x24;
+	 else
+	   Part4max = 0x23;
+	 break;
+    }
 
-    /* for SiS301 only */
-    for (i=0; i<0x29; i++)  {
-        inSISIDXREG(pSiS->RelIO+4, i, sisReg->VBPart1[i]);
+    for (i=0; i<=Part1max; i++)  {
+        inSISIDXREG(SISPART1, i, sisReg->VBPart1[i]);
+#ifdef TWDEBUG
+	xf86DrvMsg(0, X_INFO, "301BSave: Part1Port 0x%02x = 0x%02x\n", i, sisReg->VBPart1[i]);
+#endif
     }
-    for (i=0; i<0x46; i++)  {
-        inSISIDXREG(pSiS->RelIO+0x10, i, sisReg->VBPart2[i]);
+    for (i=0; i<=Part2max; i++)  {
+        inSISIDXREG(SISPART2, i, sisReg->VBPart2[i]);
+#ifdef TWDEBUG
+	xf86DrvMsg(0, X_INFO, "301BSave: Part2Port 0x%02x = 0x%02x\n", i, sisReg->VBPart2[i]);
+#endif
     }
-    for (i=0; i<0x3F; i++)  {
-        inSISIDXREG(pSiS->RelIO+0x12, i, sisReg->VBPart3[i]);
+    for (i=0; i<=Part3max; i++)  {
+        inSISIDXREG(SISPART3, i, sisReg->VBPart3[i]);
+#ifdef TWDEBUG
+	xf86DrvMsg(0, X_INFO, "301BSave: Part3Port 0x%02x = 0x%02x\n", i, sisReg->VBPart3[i]);
+#endif
     }
-    for (i=0; i<0x1C; i++)  {
-        inSISIDXREG(pSiS->RelIO+0x14, i, sisReg->VBPart4[i]);
+    for (i=0; i<=Part4max; i++)  {
+        inSISIDXREG(SISPART4, i, sisReg->VBPart4[i]);
+#ifdef TWDEBUG
+	xf86DrvMsg(0, X_INFO, "301BSave: Part4Port 0x%02x = 0x%02x\n", i, sisReg->VBPart4[i]);
+#endif
     }
-    sisReg->VBPart2[0] &= ~0x20;    /* Disable VB Processor */
-    sisReg->sisRegs3C4[0x32] &= ~0x20;      /* Disable Lock Mode */
+    sisReg->VBPart2[0] &= ~0x20;         /* Disable VB Processor */
+    sisReg->sisRegs3C4[0x32] &= ~0x20;   /* Disable Lock Mode */
 }
 
+/* Restore SiS301B/302B/301LV/302LV bridge register contents */
 static void
-SiSLVDSSave(ScrnInfoPtr pScrn, SISRegPtr sisReg)
+SiS301BRestore(ScrnInfoPtr pScrn, SISRegPtr sisReg)
 {
     SISPtr  pSiS = SISPTR(pScrn);
-    int     i;
+    int     Part1max=0, Part2max=0, Part3max=0, Part4max=0;
+
+    switch (pSiS->VGAEngine) {
+    case SIS_300_VGA:
+         Part1max = 0x23;
+	 Part2max = 0x4d;
+	 Part3max = 0x3e;
+	 if(pSiS->VBFlags & (VB_30xLV|VB_30xLVX))
+	   Part4max = 0x24;
+	 else
+	   Part4max = 0x22;
+	 break;
+    case SIS_315_VGA:
+         Part1max = 0x23;
+	 Part2max = 0x4d;
+	 Part3max = 0x3e;
+	 if(pSiS->VBFlags & (VB_30xLV|VB_30xLVX))
+	   Part4max = 0x24;
+	 else
+	   Part4max = 0x22;
+	 break;
+    }
+
+    SiS_DisableBridge(pSiS->SiS_Pr, &pSiS->sishw_ext, pSiS->RelIO+0x30);
+
+    SiS_UnLockCRT2(pSiS->SiS_Pr, &pSiS->sishw_ext, pSiS->RelIO+0x30);
 
-    /* for SiS LVDS only */
-    for (i=0; i<0x29; i++)  {
-        inSISIDXREG(pSiS->RelIO+4, i, sisReg->VBPart1[i]);
+    /* Pre-restore Part1 */
+    outSISIDXREG(SISPART1, 0x04, 0x00);
+    outSISIDXREG(SISPART1, 0x05, 0x00);
+    outSISIDXREG(SISPART1, 0x06, 0x00);
+    outSISIDXREG(SISPART1, 0x00, sisReg->VBPart1[0x00]);
+    outSISIDXREG(SISPART1, 0x01, sisReg->VBPart1[0x01]);
+    /* Mode reg 0x01 became 0x2e on 310 series (0x01 still contains FIFO) */
+    if(pSiS->VGAEngine == SIS_315_VGA)
+        outSISIDXREG(SISPART1, 0x2e, sisReg->VBPart1[0x2e]);
+
+    /* Pre-restore Part4 */
+    outSISIDXREG(SISPART4, 0x0D, sisReg->VBPart4[0x0D]);
+    outSISIDXREG(SISPART4, 0x0C, sisReg->VBPart4[0x0C]);
+
+    if (!(sisReg->sisRegs3D4[0x30] & 0x03) &&
+         (sisReg->sisRegs3D4[0x31] & 0x20))  {      /* disable CRT2 */
+            SiS_LockCRT2(pSiS->SiS_Pr, &pSiS->sishw_ext, pSiS->RelIO+0x30);
+            return;
     }
-    sisReg->sisRegs3C4[0x32] &= ~0x20;      /* Disable Lock Mode */
+
+    /* Restore Part1  */
+    SetBlock(SISPART1, 0x02, Part1max, &(sisReg->VBPart1[0x02]));
+    if(pSiS->VGAEngine == SIS_315_VGA) {
+       SetBlock(SISPART1, 0x2C, 0x2D, &(sisReg->VBPart1[0x2C]));
+       SetBlock(SISPART1, 0x35, 0x37, &(sisReg->VBPart1[0x35]));
+    }
+
+    /* Restore Part2 */
+    SetBlock(SISPART2, 0x00, Part2max, &(sisReg->VBPart2[0x00]));
+
+    /* Restore Part3 */
+    SetBlock(SISPART3, 0x00, Part3max, &(sisReg->VBPart3[0x00]));
+
+    /* Restore Part4 */
+    SetBlock(SISPART4, 0x0E, 0x11, &(sisReg->VBPart4[0x0E]));
+    SetBlock(SISPART4, 0x13, Part4max, &(sisReg->VBPart4[0x13]));
+
+    /* Post-restore Part4 (CRT2VCLK) */
+    outSISIDXREG(SISPART4, 0x0A, sisReg->VBPart4[0x0A]);
+    outSISIDXREG(SISPART4, 0x0B, sisReg->VBPart4[0x0B]);
+    outSISIDXREG(SISPART4, 0x12, 0x00);
+    outSISIDXREG(SISPART4, 0x12, sisReg->VBPart4[0x12]);
+
+    SiS_EnableBridge(pSiS->SiS_Pr, &pSiS->sishw_ext, pSiS->RelIO+0x30);
+    SiS_DisplayOn(pSiS->SiS_Pr);
+    SiS_LockCRT2(pSiS->SiS_Pr, &pSiS->sishw_ext, pSiS->RelIO+0x30);
 }
 
+/* Save LVDS bridge (+ Chrontel) register contents */
 static void
-SiSChrontelSave(ScrnInfoPtr pScrn, SISRegPtr sisReg)
+SiSLVDSChrontelSave(ScrnInfoPtr pScrn, SISRegPtr sisReg)
 {
     SISPtr  pSiS = SISPTR(pScrn);
     int     i;
 
-    /* for SiS Chrontel TV */
-    for (i=0; i<0x29; i++)  {
-        inSISIDXREG(pSiS->RelIO+4, i, sisReg->VBPart1[i]);
+    /* Save Part1 */
+    for (i=0; i<0x46; i++)  {
+        inSISIDXREG(SISPART1, i, sisReg->VBPart1[i]);
+#ifdef TWDEBUG
+	xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+	                "LVDSSave: Part1Port 0x%02x = 0x%02x\n",
+			i, sisReg->VBPart1[i]);
+#endif
+    }
+
+    /* Save Chrontel registers */
+    if (pSiS->VBFlags & VB_CHRONTEL) {
+       if (pSiS->ChrontelType == CHRONTEL_700x) {
+          for (i=0; i<0x1D; i++)  {
+              sisReg->ch70xx[i] = SiS_GetCH700x(pSiS->SiS_Pr, ch700xidx[i]);
+#ifdef TWDEBUG
+	      xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+	                "LVDSSave: Chrontel 0x%02x = 0x%02x\n",
+			ch700xidx[i], sisReg->ch70xx[i]);
+#endif
+
+	  }
+       } else {
+          for (i=0; i<34; i++)  {
+              sisReg->ch70xx[i] = SiS_GetCH701x(pSiS->SiS_Pr, ch701xidx[i]);
+          }
+       }
     }
-    for (i=0; i<0x11; i++)
-        sisReg->ch7005[i]=sisGetCH7005(ch7005idx[i]);
 
     sisReg->sisRegs3C4[0x32] &= ~0x20;      /* Disable Lock Mode */
 }
 
+/* Restore LVDS bridge (+ Chrontel) register contents */
 static void
-SiS301Restore(ScrnInfoPtr pScrn, SISRegPtr sisReg)
+SiSLVDSChrontelRestore(ScrnInfoPtr pScrn, SISRegPtr sisReg)
 {
     SISPtr  pSiS = SISPTR(pScrn);
-    unsigned char   temp, temp1;
-    
-    sisDisableBridge301(pSiS->RelIO+0x30);
-    sisUnLockCRT2(pSiS->RelIO+0x30);
-    
-    /* SetCRT2ModeRegs() */
-    outSISIDXREG(pSiS->RelIO+0x04, 4, 0);
-    outSISIDXREG(pSiS->RelIO+0x04, 5, 0);
-    outSISIDXREG(pSiS->RelIO+0x04, 6, 0);
-    outSISIDXREG(pSiS->RelIO+0x04, 0, sisReg->VBPart1[0]);
-    outSISIDXREG(pSiS->RelIO+0x04, 1, sisReg->VBPart1[1]);
-    outSISIDXREG(pSiS->RelIO+0x14, 0x0D, sisReg->VBPart4[0x0D]);
-    outSISIDXREG(pSiS->RelIO+0x14, 0x0C, sisReg->VBPart4[0x0C]);
-    
+    int i;
+    USHORT wtemp;
+
+    SiS_DisableBridge(pSiS->SiS_Pr, &pSiS->sishw_ext, pSiS->RelIO+0x30);
+    if(pSiS->sishw_ext.jChipType == SIS_730) {
+        outSISIDXREG(SISPART1, 0x00, 0x80);
+    }
+
+    SiS_UnLockCRT2(pSiS->SiS_Pr, &pSiS->sishw_ext, pSiS->RelIO+0x30);
+
+    if(pSiS->VBFlags & VB_CHRONTEL) {
+       /* Restore Chrontel registers */
+       if(pSiS->ChrontelType == CHRONTEL_700x) {
+          for(i=0; i<0x11; i++) {
+            wtemp = ((sisReg->ch70xx[i]) << 8) | (ch700xidx[i] & 0x00FF);
+            SiS_SetCH700x(pSiS->SiS_Pr, wtemp);
+          }
+       } else {
+          for(i=0; i<34; i++) {
+            wtemp = ((sisReg->ch70xx[i]) << 8) | (ch701xidx[i] & 0x00FF);
+            SiS_SetCH701x(pSiS->SiS_Pr, wtemp);
+          }
+       }
+    }
+
+    /* pre-restore Part1 */
+    outSISIDXREG(SISPART1, 0x04, 0x00);
+    outSISIDXREG(SISPART1, 0x05, 0x00);
+    outSISIDXREG(SISPART1, 0x06, 0x00);
+    outSISIDXREG(SISPART1, 0x00, sisReg->VBPart1[0]);
+    if(pSiS->VGAEngine == SIS_300_VGA) {    
+       outSISIDXREG(SISPART1, 0x01, (sisReg->VBPart1[1] | 0x80));
+    } else {
+       outSISIDXREG(SISPART1, 0x01, sisReg->VBPart1[1]);
+    }
+
     if (!(sisReg->sisRegs3D4[0x30] & 0x03) &&
-	(sisReg->sisRegs3D4[0x31] & 0x20))  {      /* disable CRT2 */
-	sisLockCRT2(pSiS->RelIO+0x30);
-	return;
-    }
-    SetBlock(pSiS->RelIO+0x04, 0x02, 0x23, &(sisReg->VBPart1[0x02]));
-    SetBlock(pSiS->RelIO+0x10, 0x00, 0x45, &(sisReg->VBPart2[0x00]));
-    SetBlock(pSiS->RelIO+0x12, 0x00, 0x3E, &(sisReg->VBPart3[0x00]));
-    SetBlock(pSiS->RelIO+0x14, 0x0E, 0x11, &(sisReg->VBPart4[0x0E]));
-    SetBlock(pSiS->RelIO+0x14, 0x13, 0x1B, &(sisReg->VBPart4[0x13]));
-    
-    outSISIDXREG(pSiS->RelIO+0x14, 0x0A, 1);
-    outSISIDXREG(pSiS->RelIO+0x14, 0x0B, sisReg->VBPart4[0x0B]);
-    outSISIDXREG(pSiS->RelIO+0x14, 0x0A, sisReg->VBPart4[0x0A]);
-    outSISIDXREG(pSiS->RelIO+0x14, 0x12, 0);
-    outSISIDXREG(pSiS->RelIO+0x14, 0x12, sisReg->VBPart4[0x12]);
-    
-    temp1 = 0;
-    if(!(pSiS->VBFlags & CRT2_VGA)) {
-        inSISIDXREG(pSiS->RelIO+CROFFSET, 0x31, temp);
-        if (temp & (SET_IN_SLAVE_MODE >> 8)) { 
-	    inSISIDXREG(pSiS->RelIO+CROFFSET, 0x30, temp);
-	    if (!(temp & (SET_CRT2_TO_RAMDAC >> 8))) {
-		temp1 = 0x20;
-	    }
-	}
+         (sisReg->sisRegs3D4[0x31] & 0x20))  {      /* disable CRT2 */
+            SiS_LockCRT2(pSiS->SiS_Pr, &pSiS->sishw_ext, pSiS->RelIO+0x30);
+            return;
     }
-    setSISIDXREG(pSiS->RelIO+SROFFSET, 0x32, ~0x20, temp1);
-    orSISIDXREG(pSiS->RelIO+SROFFSET, 0x1E, 0x20);
-    andSISIDXREG(pSiS->RelIO+SROFFSET, 1, ~0x20);   /* DisplayOn */
-    
-    sisEnableBridge301(pSiS->RelIO+0x30);
-    sisLockCRT2(pSiS->RelIO+0x30);
+
+    /* Restore Part1 */
+    if(pSiS->VGAEngine == SIS_300_VGA) {    
+       outSISIDXREG(SISPART1, 0x02, (sisReg->VBPart1[2] | 0x40));
+    } else {
+       outSISIDXREG(SISPART1, 0x02, sisReg->VBPart1[2]);
+    }
+    SetBlock(SISPART1, 0x03, 0x23, &(sisReg->VBPart1[0x03]));
+    if(pSiS->VGAEngine == SIS_315_VGA) {
+         SetBlock(SISPART1, 0x2C, 0x2E, &(sisReg->VBPart1[0x2C]));
+	 SetBlock(SISPART1, 0x35, 0x37, &(sisReg->VBPart1[0x35]));  /* Panel Link Scaler */
+    }
+
+    /* TW: For 550 DSTN registers */
+    if (pSiS->DSTN) {
+        SetBlock(SISPART1, 0x25, 0x2E, &(sisReg->VBPart1[0x25]));
+	SetBlock(SISPART1, 0x30, 0x45, &(sisReg->VBPart1[0x30]));
+    }
+
+    SiS_EnableBridge(pSiS->SiS_Pr, &pSiS->sishw_ext, pSiS->RelIO+0x30);
+    SiS_DisplayOn(pSiS->SiS_Pr);
+    SiS_LockCRT2(pSiS->SiS_Pr, &pSiS->sishw_ext, pSiS->RelIO+0x30);
 }
- 
-/* TW: Preliminary - do the same as for 301 */
-static void
-SiS301BRestore(ScrnInfoPtr pScrn, SISRegPtr sisReg)
+
+/* TW: Restore output selection registers (CR30, 31, 33, 35/38) */
+void
+SiSRestoreBridge(ScrnInfoPtr pScrn, SISRegPtr sisReg)
 {
-    SISPtr  pSiS = SISPTR(pScrn);
-    unsigned char   temp, temp1;
-    
-    sisDisableBridge301B(pSiS->RelIO+0x30);
-    sisUnLockCRT2(pSiS->RelIO+0x30);
-    
-    /* SetCRT2ModeRegs() */
-    outSISIDXREG(pSiS->RelIO+0x04, 4, 0);
-    outSISIDXREG(pSiS->RelIO+0x04, 5, 0);
-    outSISIDXREG(pSiS->RelIO+0x04, 6, 0);
-    outSISIDXREG(pSiS->RelIO+0x04, 0, sisReg->VBPart1[0]);
-    outSISIDXREG(pSiS->RelIO+0x04, 1, sisReg->VBPart1[1]);
-    outSISIDXREG(pSiS->RelIO+0x14, 0x0D, sisReg->VBPart4[0x0D]);
-    outSISIDXREG(pSiS->RelIO+0x14, 0x0C, sisReg->VBPart4[0x0C]);
-    
-     if (!(sisReg->sisRegs3D4[0x30] & 0x03) &&
-	 (sisReg->sisRegs3D4[0x31] & 0x20))  {      /* disable CRT2 */
-	 sisLockCRT2(pSiS->RelIO+0x30);
-	 return;
-     }
-     SetBlock(pSiS->RelIO+0x04, 0x02, 0x23, &(sisReg->VBPart1[0x02]));
-     SetBlock(pSiS->RelIO+0x10, 0x00, 0x45, &(sisReg->VBPart2[0x00]));
-     SetBlock(pSiS->RelIO+0x12, 0x00, 0x3E, &(sisReg->VBPart3[0x00]));
-     SetBlock(pSiS->RelIO+0x14, 0x0E, 0x11, &(sisReg->VBPart4[0x0E]));
-     SetBlock(pSiS->RelIO+0x14, 0x13, 0x1B, &(sisReg->VBPart4[0x13]));
- 
-     outSISIDXREG(pSiS->RelIO+0x14, 0x0A, 1);
-     outSISIDXREG(pSiS->RelIO+0x14, 0x0B, sisReg->VBPart4[0x0B]);
-     outSISIDXREG(pSiS->RelIO+0x14, 0x0A, sisReg->VBPart4[0x0A]);
-     outSISIDXREG(pSiS->RelIO+0x14, 0x12, 0);
-     outSISIDXREG(pSiS->RelIO+0x14, 0x12, sisReg->VBPart4[0x12]);
-     
-     temp1 = 0;
-     if(!(pSiS->VBFlags & CRT2_VGA)) {
-	 inSISIDXREG(pSiS->RelIO+CROFFSET, 0x31, temp);
-	 if (temp & (SET_IN_SLAVE_MODE >> 8)) {
-	     inSISIDXREG(pSiS->RelIO+CROFFSET, 0x30, temp);
-	     if (!(temp & (SET_CRT2_TO_RAMDAC >> 8))) {
-		 temp1 = 0x20;
-	     }
-	 }
-     }
-     setSISIDXREG(pSiS->RelIO+SROFFSET, 0x32, ~0x20, temp1);
-     orSISIDXREG(pSiS->RelIO+SROFFSET, 0x1E, 0x20);
-     andSISIDXREG(pSiS->RelIO+SROFFSET, 1, ~0x20);   /* DisplayOn */
-     
-     sisEnableBridge301B(pSiS->RelIO+0x30);
-     sisLockCRT2(pSiS->RelIO+0x30);
+   SISPtr pSiS = SISPTR(pScrn);
+   unsigned char temp = 0;
+
+#ifdef UNLOCK_ALWAYS
+   sisSaveUnlockExtRegisterLock(pSiS, NULL, NULL);
+#endif
+
+   outSISIDXREG(SISCR, 0x30, sisReg->sisRegs3D4[0x30]);
+   outSISIDXREG(SISCR, 0x31, sisReg->sisRegs3D4[0x31]);
+   outSISIDXREG(SISCR, 0x33, sisReg->sisRegs3D4[0x33]);
+   if(pSiS->Chipset != PCI_CHIP_SIS300) {
+      switch(pSiS->VGAEngine) {
+        case SIS_300_VGA: temp = 0x35; break;
+        case SIS_315_VGA: temp = 0x38; break;
+      }
+      if(temp) {
+         outSISIDXREG(SISCR, temp, sisReg->sisRegs3D4[temp]);
+      }
+   }
 }
 
-static void
-SiSLVDSRestore(ScrnInfoPtr pScrn, SISRegPtr sisReg)
+unsigned int
+SiSddc1Read(ScrnInfoPtr pScrn)
 {
-        SISPtr  pSiS = SISPTR(pScrn);
-
-        sisDisableBridgeLVDS(pSiS->RelIO+0x30);
-        sisUnLockCRT2(pSiS->RelIO+0x30);  
+    SISPtr pSiS = SISPTR(pScrn);
+    unsigned char temp;
 
-        /* SetCRT2ModeRegs() */
-        outSISIDXREG(pSiS->RelIO+0x04, 4, 0);
-        outSISIDXREG(pSiS->RelIO+0x04, 5, 0);
-        outSISIDXREG(pSiS->RelIO+0x04, 6, 0);
-        outSISIDXREG(pSiS->RelIO+0x04, 0, sisReg->VBPart1[0]);
-        outSISIDXREG(pSiS->RelIO+0x04, 1, sisReg->VBPart1[1]);
+#ifdef UNLOCK_ALWAYS
+    sisSaveUnlockExtRegisterLock(pSiS, NULL, NULL);
+#endif
 
-        if (!(sisReg->sisRegs3D4[0x30] & 0x03) &&
-             (sisReg->sisRegs3D4[0x31] & 0x20))  {      /* disable CRT2 */
-                sisLockCRT2(pSiS->RelIO+0x30);  
-                return;
-        }
-        SetBlock(pSiS->RelIO+0x04, 0x02, 0x23, &(sisReg->VBPart1[0x02]));
+    /* Wait until vertical retrace is in progress. */
+    while(inSISREG(SISINPSTAT) & 0x08);
+    while(!(inSISREG(SISINPSTAT) & 0x08));
 
-        orSISIDXREG(pSiS->RelIO+SROFFSET, 0x1E, 0x20);
-        andSISIDXREG(pSiS->RelIO+SROFFSET, 1, ~0x20);   /* DisplayOn */
+    /* Get the result */
+    inSISIDXREG(SISSR, 0x11, temp);
 
-        sisEnableBridgeLVDS(pSiS->RelIO+0x30);
-        sisLockCRT2(pSiS->RelIO+0x30);  
+    return((temp & 0x02)>>1);
 }
 
+#if 0  /* TW: I2C functions not in use */
+/*
 static void
-SiSChrontelRestore(ScrnInfoPtr pScrn, SISRegPtr sisReg)
+SiS_I2CGetBits(I2CBusPtr b, int *clock, int *data)
 {
-        SISPtr  pSiS = SISPTR(pScrn);
-        int i;
-        unsigned short wtemp;
+  SISPtr pSiS = SISPTR(xf86Screens[b->scrnIndex]);
+  unsigned char val;
 
-        sisDisableBridgeLVDS(pSiS->RelIO+0x30); 
-        sisUnLockCRT2(pSiS->RelIO+0x30);  
+  outSISIDXREG(SISSR, 0x05, 0x86);
+  inSISIDXREG(SISSR, pSiS->SiS_DDC2_Index, val);
+  *clock = (val & pSiS->SiS_DDC2_Clk) != 0;
+  *data  = (val & pSiS->SiS_DDC2_Data) != 0;
+}
 
-        for (i=0; i<0x11; i++)
-        {       wtemp = ((sisReg->ch7005[i]) << 8) + (ch7005idx[i] & 0x00FF);
-                sisSetCH7005(wtemp);
-        }
+static void
+SiS_I2CPutBits(I2CBusPtr b, int clock, int data)
+{
+  SISPtr pSiS = SISPTR(xf86Screens[b->scrnIndex]);
+  unsigned char temp;
 
-        /* SetCRT2ModeRegs() */
-        outSISIDXREG(pSiS->RelIO+0x04, 4, 0);
-        outSISIDXREG(pSiS->RelIO+0x04, 5, 0);
-        outSISIDXREG(pSiS->RelIO+0x04, 6, 0);
-        outSISIDXREG(pSiS->RelIO+0x04, 0, sisReg->VBPart1[0]);
-        outSISIDXREG(pSiS->RelIO+0x04, 1, sisReg->VBPart1[1]);
-
-        if (!(sisReg->sisRegs3D4[0x30] & 0x03) &&
-             (sisReg->sisRegs3D4[0x31] & 0x20))  {      /* disable CRT2 */
-                sisLockCRT2(pSiS->RelIO+0x30);  
-                return;
-        }
-        SetBlock(pSiS->RelIO+0x04, 0x02, 0x23, &(sisReg->VBPart1[0x02]));
+  outSISIDXREG(SISSR, 0x05, 0x86);
+  inSISIDXREG(SISSR, pSiS->SiS_DDC2_Index, temp);
 
-        orSISIDXREG(pSiS->RelIO+SROFFSET, 0x1E, 0x20);
-        andSISIDXREG(pSiS->RelIO+SROFFSET, 1, ~0x20);   /* DisplayOn */
+  temp &= ~(pSiS->SiS_DDC2_Clk | pSiS->SiS_DDC2_Data);
 
-        sisEnableBridgeLVDS(pSiS->RelIO+0x30);  
-        sisLockCRT2(pSiS->RelIO+0x30);  
+  temp |= ((clock ? pSiS->SiS_DDC2_Clk : 0) | (data ? pSiS->SiS_DDC2_Data : 0));
+
+  outSISIDXREG(SISSR, pSiS->SiS_DDC2_Index, temp);
 }
+*/
 
+static Bool
+SiS_I2CAddress(I2CDevPtr d, I2CSlaveAddr addr)
+{
+   I2CBusPtr b = d->pI2CBus;
+   SISPtr pSiS = SISPTR(xf86Screens[b->scrnIndex]);
+   SiS_SetSwitchDDC2(pSiS->SiS_Pr);
+   return(SiS_I2C_Address(pSiS->SiS_Pr, addr));
+}
 
-/* TW: Restores CRT2 output registers (needs to be called before VESARestore) */
-void
-SiSRestoreBridge(ScrnInfoPtr pScrn, SISRegPtr sisReg)
+static void
+SiS_I2CStop(I2CDevPtr d)
 {
-   SISPtr pSiS = SISPTR(pScrn);
+  I2CBusPtr b = d->pI2CBus;
+  SISPtr pSiS = SISPTR(xf86Screens[b->scrnIndex]);
+  SiS_I2C_Stop(pSiS->SiS_Pr);
+}
 
-   outw(VGA_SEQ_INDEX, 0x8605); /* Unlock registers */
+static Bool
+SiS_I2CGetByte(I2CDevPtr d, I2CByte *data, Bool last)
+{
+  I2CBusPtr b = d->pI2CBus;
+  SISPtr pSiS = SISPTR(xf86Screens[b->scrnIndex]);
+  USHORT temp = SiS_I2C_GetByte(pSiS->SiS_Pr);
+  if(temp == 0xffff) return FALSE;
+  return TRUE;
+}
 
-   outSISIDXREG(pSiS->RelIO+CROFFSET, 0x33, sisReg->sisRegs3D4[0x33]);
-   usleep(2000);
-   outSISIDXREG(pSiS->RelIO+CROFFSET, 0x30, sisReg->sisRegs3D4[0x30]);
-   outSISIDXREG(pSiS->RelIO+CROFFSET, 0x31, sisReg->sisRegs3D4[0x31]);
+static Bool
+SiS_I2CPutByte(I2CDevPtr d, I2CByte data)
+{
+  I2CBusPtr b = d->pI2CBus;
+  SISPtr pSiS = SISPTR(xf86Screens[b->scrnIndex]);
+  return(SiS_I2C_PutByte(pSiS->SiS_Pr, (USHORT)data));
 }
 
-unsigned int
-SiSddc1Read(ScrnInfoPtr pScrn)
+Bool
+SiSI2CInit(ScrnInfoPtr pScrn)
 {
-#if 0
     SISPtr pSiS = SISPTR(pScrn);
-#endif
-    int vgaIOBase = VGAHWPTR(pScrn)->IOBase;
-    unsigned char temp, temp2;
+    I2CBusPtr I2CPtr;
+    USHORT temp, i;
+    unsigned char buffer[256];
+    xf86MonPtr    pMonitor;
 
-    outb(VGA_SEQ_INDEX, 0x05); /* Unlock Registers */
-    temp2 = inb(VGA_SEQ_DATA);
-    outw(VGA_SEQ_INDEX, 0x8605);
+    I2CPtr = xf86CreateI2CBusRec();
+    if(!I2CPtr) return FALSE;
 
-    /* Wait until vertical retrace is in progress. */
-    while (inb(vgaIOBase + 0xA) & 0x08);
-    while (!(inb(vgaIOBase + 0xA) & 0x08));
+    pSiS->I2C = I2CPtr;
 
-    /* Get the result */
-    outb(VGA_SEQ_INDEX, 0x11); temp = inb(VGA_SEQ_DATA);
+    I2CPtr->BusName    = "DDC";
+    I2CPtr->scrnIndex  = pScrn->scrnIndex;
+/*
+    I2CPtr->I2CPutBits = SiS_I2CPutBits;
+    I2CPtr->I2CGetBits = SiS_I2CGetBits;
+*/
+    I2CPtr->I2CPutByte = SiS_I2CPutByte;
+    I2CPtr->I2CGetByte = SiS_I2CGetByte;
+    I2CPtr->I2CAddress = SiS_I2CAddress;
+    I2CPtr->I2CStop    = SiS_I2CStop;
+    I2CPtr->AcknTimeout = 30;
+
+
+
+    pSiS->SiS_Pr->SiS_DDC_Index = pSiS->SiS_DDC2_Index;
+    pSiS->SiS_Pr->SiS_DDC_Data  = pSiS->SiS_DDC2_Data;
+    pSiS->SiS_Pr->SiS_DDC_Clk   = pSiS->SiS_DDC2_Clk;
+    pSiS->SiS_Pr->SiS_DDC_DataShift = 0x00;
+
+    if (!xf86I2CBusInit(I2CPtr)) {
+        xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+	    "Could not create I2C bus record\n");
+	return FALSE;
+    }
 
-    outw(VGA_SEQ_INDEX, (temp2 << 8) | 0x05);
+    return TRUE;
+}
+#endif
 
-    return ((temp & 0x02)>>1);
+#if 0  /* TW: The following function should take a threshold value
+        *     from predefined tables. This is only needed on some
+	*     530 boards, which have an ESS sound device on-board.
+	*     However, I don't know how to calculate the index to
+	*     be submitted to this function.
+	*/
+unsigned short
+SiS_CalcSpecial530Threshold(ScrnInfoPtr pScrn, DisplayModePtr mode, int index)
+{
+    SISPtr  pSiS = SISPTR(pScrn);
+    static const unsigned char t640x480[3][24] = {
+        { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,A9,   /* b4 - 9d - depth 8 */
+	  0, 0,11,14,14, 0, 0, 0, 0, 0, 0,9D },
+	{ 0, 0, 0, 0, 0,12,15, 0, 0, 0,92,91,   /* 9c - 85 - depth 16 */
+	  0,31,31,31,31, 0, 0, 0, 0, 0, 0,85 },
+	{ 0, 0, 0, 0, 0,17,22,25, 0, 0, 0,79,   /* 84 - ?  - depth 32 */
+	  0,31,31, 0, 0, 0, 0, 0, 0, 0, 0,6d }
+    }
+    static const unsigned char t800x600[3][24] = {
+        { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,61,
+	  0,18,25,30,27,31,31,31, 0, 0, 0, 0 },
+	{55, 0, 0, 0, 0, 9,10,15,18,19, 0, 0,
+	... to be continued
+
+    depthindex = (pSiS->CurrentLayout.bitsPerPixel + 1) >> 3;
+    if(depthindex == 3) return(0);
+    if(depthindex == 4) depthindex--;
+    depthindex--;
+
+    switch(mode->HDisplay) {
+    case 640:
+       if(mode->VDisplay == 480) {
+          return(t640x480[depthindex][index];
+       } else return(0);
+    case 800:
+       if(mode->VDisplay == 600) {
+          return(t800x600[depthindex][index];
+       } else return(0);
+    case 1024:
+       if(mode->VDisplay == 768) {
+          return(t1024x768[depthindex][index];
+       } else return(0);
+    case 1280:
+       if(mode->VDisplay == 1024) {
+          return(t1280x1024[depthindex][index];
+       } else return(0);
+    case 1600:
+       if(mode->VDisplay == 1200) {
+          return(t1600x1200[depthindex][index];
+       } else return(0);
+    default: return(0);
+    }
 }
+#endif
+
+/* TW: Stub */
+static void
+SiSThreshold(ScrnInfoPtr pScrn, DisplayModePtr mode,
+             unsigned short *Low, unsigned short *High)
+{
+    return;
+}
+
 
 /* Auxiliary function to find real memory clock (in Khz) */
+/* TW: Not for 530/620 if UMA (on these, the mclk is stored in SR10) */
 int
 SiSMclk(SISPtr pSiS)
 { 
-	int mclk;
-  	unsigned char Num, Denum, Base;
+    int mclk;
+    unsigned char Num, Denum, Base;
 
-    /* Numerator */
     switch (pSiS->Chipset)  {
-    case PCI_CHIP_SG86C201:
-    case PCI_CHIP_SG86C202:
-    case PCI_CHIP_SG86C205:
-    case PCI_CHIP_SG86C215:
-    case PCI_CHIP_SG86C225:
     case PCI_CHIP_SIS5597:
     case PCI_CHIP_SIS6326:
     case PCI_CHIP_SIS530:
-        read_xr(MemClock0,Num);
-        mclk=14318*((Num & 0x7f)+1);
+        /* Numerator */
+        inSISIDXREG(SISSR, MemClock0, Num);
+        mclk = 14318 * ((Num & 0x7f) + 1);
 
         /* Denumerator */
-        read_xr(MemClock1,Denum);
-        mclk=mclk/((Denum & 0x1f)+1);
-
-        /* Divider. Don't seems to work for mclk in older cards */
-        if ( (Num & 0x80)!=0 ) { 
-            mclk = mclk*2;
-        }
+	inSISIDXREG(SISSR, MemClock1, Denum);
+        mclk = mclk / ((Denum & 0x1f) + 1);
 
-        /* Post-scaler. Values depends on SR13 bit 7  */
-        outb(VGA_SEQ_INDEX, ClockBase); 
-        Base = inb(VGA_SEQ_DATA);
+        /* Divider. Doesn't seem to work for mclk in older cards */
+        if((Num & 0x80) != 0)  mclk *= 2;
 
-        if ( (Base & 0x80)==0 ) {
-            mclk = mclk / (((Denum & 0x60) >> 5)+1);
-        }
-        else {
+        /* Post-scaler. Values' meaning depends on SR13 bit 7  */
+	inSISIDXREG(SISSR, ClockBase, Base);
+        if((Base & 0x80) == 0) {
+            mclk = mclk / (((Denum & 0x60) >> 5) + 1);
+        } else {
             /* Values 00 and 01 are reserved */
-            if ((Denum & 0x60) == 0x40) { mclk=mclk/6; }
-            if ((Denum & 0x60) == 0x60) { mclk=mclk/8; }
+            if ((Denum & 0x60) == 0x40)  mclk /= 6;
+            if ((Denum & 0x60) == 0x60)  mclk /= 8;
         }
         break;
     case PCI_CHIP_SIS300:
     case PCI_CHIP_SIS540:
     case PCI_CHIP_SIS630:
+    case PCI_CHIP_SIS550:
+    case PCI_CHIP_SIS650:
+    case PCI_CHIP_SIS315:
+    case PCI_CHIP_SIS315H:
+    case PCI_CHIP_SIS315PRO:
+    case PCI_CHIP_SIS330:
         /* Numerator */
-        read_xr(0x28, Num);
-        mclk = 14318*((Num &0x7f)+1);
+	inSISIDXREG(SISSR, 0x28, Num);
+        mclk = 14318 * ((Num & 0x7f) + 1);
 
         /* Denumerator */
-        read_xr(0x29, Denum);
-        mclk = mclk/((Denum & 0x1f)+1);
+	inSISIDXREG(SISSR, 0x29, Denum);
+        mclk = mclk / ((Denum & 0x1f) + 1);
 
         /* Divider */
-        if ((Num & 0x80)!=0)  {
-            mclk = mclk * 2;
-        }
+        if((Num & 0x80) != 0)  mclk *= 2;
 
         /* Post-Scaler */
-        if ((Denum & 0x80)==0)  {
+        if((Denum & 0x80) == 0) {
             mclk = mclk / (((Denum & 0x60) >> 5) + 1);
-        }  
-        else  {
+        } else {
             mclk = mclk / ((((Denum & 0x60) >> 5) + 1) * 2);
         }
         break;
     default:
+    	xf86DrvMsg(pSiS->pScrn->scrnIndex, X_ERROR,
+		"Internal error: SiSMClk() called with invalid chipset (0x%x)\n",
+		pSiS->Chipset);
         mclk = 0;
     }
 
     return(mclk);
 }
 
+/* TW: This estimates the CRT2 clock we are going to use.
+ *     The total bandwidth is to be reduced by the value
+ *     returned here in order to get an idea of the maximum
+ *     dotclock left for CRT1.
+ *     Since we don't know yet, what mode the user chose,
+ *     we return the maximum dotclock used by
+ *     - either the LCD attached, or
+ *     - TV
+ *     For VGA2, we share the bandwith equally.
+ */
+static int
+SiSEstimateCRT2Clock(ScrnInfoPtr pScrn)
+{
+        SISPtr pSiS = SISPTR(pScrn);
+
+	if(pSiS->VBFlags & CRT2_LCD) {
+  	       if(pSiS->VBLCDFlags & (VB_LCD_320x480 | VB_LCD_800x600 | VB_LCD_640x480))
+	           return 40000;
+	       else if(pSiS->VBLCDFlags & (VB_LCD_1024x768 | VB_LCD_1024x600))
+	           return 65000;
+	       else if(pSiS->VBLCDFlags & (VB_LCD_1152x768 | VB_LCD_1280x1024 | VB_LCD_1280x960))
+		   return 108000;
+	       else if(pSiS->VBLCDFlags & VB_LCD_1400x1050)
+		   return 122000;
+	       else if(pSiS->VBLCDFlags & VB_LCD_1600x1200)
+		   return 162000;
+	       else
+	           return 108000;
+	} else if(pSiS->VBFlags & CRT2_TV) {
+	    if(pSiS->VBFlags & VB_CHRONTEL) {
+	        switch(pSiS->VGAEngine) {
+		case SIS_300_VGA:
+                   return 50000;
+		case SIS_315_VGA:
+		default:
+		   return 70000;
+		}
+	    } else if(pSiS->VBFlags & VB_SISBRIDGE) {
+	        return 70000;
+	    }
+	}
+
+	return 0;
+}
+
+/* Calculate the maximum dotclock */
 int SiSMemBandWidth(ScrnInfoPtr pScrn)
-{ 
+{
         SISPtr pSiS = SISPTR(pScrn);
-        SISRegPtr pReg = &pSiS->ModeReg;
+#ifdef SISDUALHEAD
+        SISEntPtr pSiSEnt = pSiS->entityPrivate;
+#endif
 
         int             bus = pSiS->BusWidth;
         int             mclk = pSiS->MemClock;
-        int             bpp = pScrn->bitsPerPixel;
-        float   magic, total;
-        const float     magic300[4] = { 1.2, 1.368421, 2.263158, 1.2};
+        int             bpp = pSiS->CurrentLayout.bitsPerPixel;
+	int             bytesperpixel = (bpp + 7) / 8;
+        float   	magic=0.0, total, crt2used;
+	int		crt2clock, max=0;
+        const float     magic300[4] = { 1.2,      1.368421, 2.263158, 1.2};
         const float     magic630[4] = { 1.441177, 1.441177, 2.588235, 1.441177 };
+	const float     magic315[4] = { 1.2,      1.368421, 1.368421, 1.2 };
+	const float     magic550[4] = { 1.441177, 1.441177, 2.588235, 1.441177 };
 
         switch (pSiS->Chipset) {
-        case PCI_CHIP_SIS6326:
-                return 175000;    /* guest */
-                
+
         case PCI_CHIP_SIS5597:
-                if (((pReg->sisRegs3C4[Mode64] >> 1) & 3) == 0) /* Only 1 bank Vram */
-                        mclk = (mclk * 8);
-                else
-                        mclk = (mclk * 16);
-                if ((pReg->sisRegs3C4[ExtMiscCont5] & 0xC0) == 0xC0) 
-                        mclk=mclk*2;
-                return(mclk);
+	        total = ((mclk * (bus / 8)) * 0.7) / bytesperpixel;
+		if(total > 135000) total = 135000;
+		xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+			"Maximum pixel clock at %d bpp is %g MHz\n",
+			bpp, total/1000);
+                return(int)(total);
+
+        case PCI_CHIP_SIS6326:
+		total = ((mclk * (bus / 8)) * 0.7) / bytesperpixel;
+		if(total > 175500) total = 175500;
+		xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+			"Maximum pixel clock at %d bpp is %g MHz\n",
+			bpp, total/1000);
+		return(int)(total);
+
+        case PCI_CHIP_SIS530:
+	        total = ((mclk * (bus / 8)) * 0.7) / bytesperpixel;
+		if(total > 230000) total = 230000;
+		xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+			"Maximum pixel clock at %d bpp is %g MHz\n",
+			bpp, total/1000);
+		return(int)(total);
 
         case PCI_CHIP_SIS300:
         case PCI_CHIP_SIS540:
         case PCI_CHIP_SIS630:
-                if (pSiS->Chipset==PCI_CHIP_SIS300)
-                        magic = magic300[bus/64];
-                else
-                        magic = magic630[bus/64];
-                
+	case PCI_CHIP_SIS315:
+	case PCI_CHIP_SIS315H:
+	case PCI_CHIP_SIS315PRO:
+	case PCI_CHIP_SIS550:
+	case PCI_CHIP_SIS650:
+	case PCI_CHIP_SIS330:
+	        switch(pSiS->Chipset) {
+        	case PCI_CHIP_SIS300:
+	            magic = magic300[bus/64];
+		    max = 540000;
+                    break;
+        	case PCI_CHIP_SIS540:
+       	 	case PCI_CHIP_SIS630:
+		    magic = magic630[bus/64];
+		    max = 540000;
+                    break;
+		case PCI_CHIP_SIS315:
+		case PCI_CHIP_SIS315H:
+		case PCI_CHIP_SIS315PRO:
+		case PCI_CHIP_SIS330:
+		    magic = magic315[bus/64];
+		    max = 780000;
+		    break;
+		case PCI_CHIP_SIS550:
+		case PCI_CHIP_SIS650:
+		    magic = magic550[bus/64];
+		    max = 780000;
+                }
+
                 PDEBUG(ErrorF("mclk: %d, bus: %d, magic: %g, bpp: %d\n",
                                 mclk, bus, magic, bpp));
-                
-                total = mclk*bus/bpp;
-                
-                ErrorF("Total Adapter Bandwidth is %gM\n", total/1000);
-                
-                if (pSiS->VBFlags & CRT2_ENABLE)  {
-                        if (total/2 > 540000)
-                                total -= 540000;
-                        else
+
+                total = mclk * bus / bpp;
+
+                xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+			"Memory bandwidth at %d bpp is %g MHz\n", bpp, total/1000);
+
+                if(pSiS->VBFlags & CRT2_ENABLE)  {
+
+		    crt2used = 0.0;
+		    crt2clock = SiSEstimateCRT2Clock(pScrn);
+		    if(crt2clock) {
+		    	crt2used = crt2clock + 2000;
+		    }
+
+#ifdef SISDUALHEAD
+		    if((pSiS->DualHeadMode) && (pSiSEnt)) {
+
+		        if(!pSiS->SecondHead) {
+
+			     /* TW: First head = CRT2 */
+
+			     if(crt2clock) {
+			        /* TW: We use the mem bandwidth as max clock; this
+				 *     might exceed the 70% limit a bit, but that
+				 *     does not matter; we take care of that limit
+				 *     when we calc CRT1. Overall, we might use up
+				 *     to 85% of the memory bandwidth, which seems
+				 *     enough to use accel and video.
+				 *     The "* macic" is just to compensate the
+				 *     calculation below.
+				*/
+			        total = crt2used * magic;
+				xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+		       	           "Bandwidth reserved for CRT2 is %g Mhz\n",
+				      crt2used/1000);
+			     } else {
+			        /*  We don't know about the second head's
+				 *  depth yet. So we assume it uses the
+			         *  same.
+			         */
                                 total /= 2;
-                        ErrorF("CRT1 Used Bandwidth is %gM\n", total/1000);
+				xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+		       	           "Bandwidth reserved for CRT2 is %g Mhz\n",
+				      total/1000);
+                             }
+
+			} else {
+
+			     /* TW: Second head = CRT1 */
+
+			     /*     Now We know about the first head's depth,
+			      *     so we can calculate more accurately.
+			      */
+
+			     if(crt2clock) {
+			        total -= (crt2used * pSiSEnt->pScrn_1->bitsPerPixel / bpp);
+				xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+		       	           "Bandwidth reserved for CRT2 at %d bpp is %g Mhz\n",
+				      bpp,
+				      (crt2used * pSiSEnt->pScrn_1->bitsPerPixel / bpp)/1000);
+			     } else {
+			        total -= (pSiSEnt->maxUsedClock * pSiSEnt->pScrn_1->bitsPerPixel / bpp);
+				xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+		       	           "Bandwidth reserved for CRT2 at %d bpp is %d Mhz\n",
+				      bpp,
+				      (pSiSEnt->maxUsedClock * pSiSEnt->pScrn_1->bitsPerPixel / bpp)/1000);
+			     }
+
+			     xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+			        "Bandwidth available for CRT1 is %g MHz\n", total/1000);
+
+			}
+
+		    } else {
+#endif
+			if(crt2clock) {
+			    total -= crt2used;
+			    xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+		       	       "Bandwidth reserved for CRT2 is %g Mhz\n", crt2used/1000);
+			} else {
+                            total /= 2;
+			    xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+		       	       "Bandwidth reserved for CRT2 is %g Mhz\n", total/1000);
+			}
+
+			xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+			  "Bandwidth available for CRT1 is %g MHz\n", total/1000);
+#ifdef SISDUALHEAD
+                    }
+#endif
+
                 }
-                return (int)(total/magic);
+		total /= magic;
+		if(total > (max / 2)) total = max / 2;
+                return (int)(total);
 
-        case PCI_CHIP_SIS530:
-                return 230000;    /* guest */
         default:
-                return 135000;    /* guest */
+                return 135000;    /* guessed */
         }
 }
 
+/* TW: Load the palette. We do this for all supported color depths
+ *     in order to support gamma correction. We hereby convert the
+ *     given colormap to a complete 24bit color palette and enable
+ *     the correspoding bit in SR7 to enable the 24bit lookup table.
+ *     Gamma correction is only supported on CRT1.
+ *     Why are there 6-bit-RGB values submitted even if bpp is 16 and
+ *     weight is 565? (Maybe because rgbBits is 6?)
+ */
 void
-SISLoadPalette(ScrnInfoPtr pScrn, int numColors, int *indicies, LOCO *colors,
-                VisualPtr pVisual)
+SISLoadPalette(ScrnInfoPtr pScrn, int numColors, int *indices, LOCO *colors,
+               VisualPtr pVisual)
 {
         SISPtr  pSiS = SISPTR(pScrn);
-        int     i, index;
+        int     i, j, index;
 
         PDEBUG(ErrorF("SiSLoadPalette(%d)\n", numColors));
-        for (i=0; i<numColors; i++)  {
-                index = indicies[i];
-#if 0
-                outSISREG(0x3c8, index);
-                outSISREG(0x3c9, colors[index].red >> 2);
-                outSISREG(0x3c9, colors[index].green >> 2);
-                outSISREG(0x3c9, colors[index].blue >> 2);
+
+#ifdef SISDUALHEAD
+        /* TW: No palette changes on CRT2 if in dual head mode */
+        if((pSiS->DualHeadMode) && (!pSiS->SecondHead)) return;
 #endif
-                outSISREG(pSiS->RelIO+0x48, index);
-                outSISREG(pSiS->RelIO+0x49, colors[index].red >> 2);
-                outSISREG(pSiS->RelIO+0x49, colors[index].green >> 2);
-                outSISREG(pSiS->RelIO+0x49, colors[index].blue >> 2);
-        }
-        switch (pSiS->Chipset) {
-            case PCI_CHIP_SIS630:
-            case PCI_CHIP_SIS540:
-            case PCI_CHIP_SIS300:
-                if (pSiS->VBFlags & CRT2_ENABLE)  {
-                        (*pSiS->LoadCRT2Palette)(pScrn, numColors, indicies,
-                                                        colors, pVisual);
+
+        switch(pSiS->CurrentLayout.depth) {
+#ifdef SISGAMMA
+          case 15:
+	     orSISIDXREG(SISSR, 0x07, 0x04);
+	     for(i=0; i<numColors; i++) {
+                index = indices[i];
+		if(index < 32) {   /* Paranoia */
+		   for(j=0; j<8; j++) {
+		      outSISREG(SISCOLIDX, (index * 8) + j);
+                      outSISREG(SISCOLDATA, colors[index].red << (8- pScrn->rgbBits));
+                      outSISREG(SISCOLDATA, colors[index].green << (8 - pScrn->rgbBits));
+                      outSISREG(SISCOLDATA, colors[index].blue << (8 - pScrn->rgbBits));
+		   }
+		}
+             }
+	     break;
+	  case 16:
+             orSISIDXREG(SISSR, 0x07, 0x04);
+	     for(i=0; i<numColors; i++) {
+                index = indices[i];
+		if(index < 64) {  /* Paranoia */
+		   for(j=0; j<4; j++) {
+		      outSISREG(SISCOLIDX, (index * 4) + j);
+                      outSISREG(SISCOLDATA, colors[index/2].red << (8 - pScrn->rgbBits));
+                      outSISREG(SISCOLDATA, colors[index].green << (8 - pScrn->rgbBits));
+                      outSISREG(SISCOLDATA, colors[index/2].blue << (8 - pScrn->rgbBits));
+		   }
+		}
+             }
+	     break;
+          case 24:
+	     orSISIDXREG(SISSR, 0x07, 0x04);
+             for(i=0; i<numColors; i++)  {
+                index = indices[i];
+		if(index < 256) {   /* Paranoia */
+                   outSISREG(SISCOLIDX, index);
+                   outSISREG(SISCOLDATA, colors[index].red);
+                   outSISREG(SISCOLDATA, colors[index].green);
+                   outSISREG(SISCOLDATA, colors[index].blue);
+		}
+             }
+	     break;
+#endif
+	  default:
+	     if(pScrn->rgbBits == 8)
+	        orSISIDXREG(SISSR, 0x07, 0x04);
+	     else
+	        andSISIDXREG(SISSR, 0x07, ~0x04);
+             for(i=0; i<numColors; i++)  {
+                index = indices[i];
+                outSISREG(SISCOLIDX, index);
+                outSISREG(SISCOLDATA, colors[index].red >> (8 - pScrn->rgbBits));
+                outSISREG(SISCOLDATA, colors[index].green >> (8 - pScrn->rgbBits));
+                outSISREG(SISCOLDATA, colors[index].blue >> (8 - pScrn->rgbBits));
+             }
+	}
+
+        switch(pSiS->VGAEngine) {
+            case SIS_300_VGA:
+            case SIS_315_VGA:
+                if(pSiS->VBFlags & CRT2_ENABLE) {
+		    /* TW: Only the SiS bridges support a CRT2 palette */
+		    if(pSiS->VBFlags & VB_SISBRIDGE) {
+                        (*pSiS->LoadCRT2Palette)(pScrn, numColors, indices,
+                                                 colors, pVisual);
+		    }  
                 }
                 break;
         }
+
 }
 
 static  void
-SiS301LoadPalette(ScrnInfoPtr pScrn, int numColors, int *indicies,
+SiS301LoadPalette(ScrnInfoPtr pScrn, int numColors, int *indices,
                                         LOCO *colors, VisualPtr pVisual)
 {
         SISPtr  pSiS = SISPTR(pScrn);
         int     i, index;
 
         PDEBUG(ErrorF("SiS301LoadPalette(%d)\n", numColors));
-        for (i=0; i<numColors; i++)  {
-                index = indicies[i];
-                outSISREG(pSiS->RelIO+0x16, index);
-                outSISREG(pSiS->RelIO+0x17, colors[index].red);
-                outSISREG(pSiS->RelIO+0x17, colors[index].green);
-                outSISREG(pSiS->RelIO+0x17, colors[index].blue);
-        }
-}
 
-
-struct QConfig  {
-        int     GT;
-        int     QC;
-};
-
-static  struct  QConfig qconfig[20] = {
-        {1, 0x0}, {1, 0x2}, {1, 0x4}, {1, 0x6}, {1, 0x8},
-        {1, 0x3}, {1, 0x5}, {1, 0x7}, {1, 0x9}, {1, 0xb},
-        {0, 0x0}, {0, 0x2}, {0, 0x4}, {0, 0x6}, {0, 0x8},
-        {0, 0x3}, {0, 0x5}, {0, 0x7}, {0, 0x9}, {0, 0xb}};
-
-static  int cycleA[20][2] = {
-        {88,88}, {80,80}, {78,78}, {72,72}, {70,70},
-        {79,72}, {77,70}, {71,64}, {69,62}, {49,44},
-        {73,78}, {65,70}, {63,68}, {57,62}, {55,60},
-        {64,62}, {62,60}, {56,54}, {54,52}, {34,34}};
-
-static  void
-SiS630Threshold(ScrnInfoPtr pScrn, DisplayModePtr mode,
-                                unsigned short *Low, unsigned short *High)
-{
-    SISPtr   pSiS = SISPTR(pScrn);
-    int      mclk = pSiS->MemClock;
-    int      vclk = mode->Clock;
-    int      bpp = pScrn->bitsPerPixel/8;
-    int      buswidth = pSiS->BusWidth;
-    CARD32   temp;
-    PCITAG   NBridge;
-    int      cyclea;
-    int      low, lowa;
-
-    int      i, j;
-
-
-    if (!bpp)
-        bpp = 1;
-
-    i = 0;
-    j = buswidth/128;
-
-    while (1)  {
-#ifdef  DEBUG
-        ErrorF("Config %d GT = %d, QC = %x, CycleA = %d\n",
-            i, qconfig[i].GT, qconfig[i].QC, cycleA[i][j]);
-#endif
-        cyclea = cycleA[i][j];
-        lowa = cyclea * vclk * bpp;
-        lowa = (lowa + (mclk-1)) / mclk;
-        lowa = (lowa + 15) / 16;
-        low = lowa + 1;
-        if (low <= 0x13)
-            break;
-        else
-            if (i < 19)
-                i++;
-            else  {
-                low = 0x13;
-                PDEBUG(ErrorF("This mode may has threshold "
-                        "problem and had better removed\n"));
-                break;
-            }
-    }
-    PDEBUG(ErrorF("Using Config %d with CycleA = %d\n", i, cyclea));
-    *Low = low;
-    if (lowa+4 > 15)
-            *High = 0x0F;
-    else
-            *High = lowa+4;
-
-    /* write PCI configuration space */
-    NBridge = pciTag(0, 0, 0);
-    temp = pciReadLong(NBridge, 0x50);
-    temp &= 0xF0FFFFFF;
-    temp |= qconfig[i].QC << 24;
-    pciWriteLong(NBridge, 0x50, temp);
-
-    temp = pciReadLong(NBridge, 0xA0);
-    temp &= 0xF0FFFFFF;
-    temp |= qconfig[i].GT << 24;
-    pciWriteLong(NBridge, 0xA0, temp);
-}
-
-struct funcargc {
-        char    base;
-        char    inc;
-};
-
-static  struct funcargc funca[12] = {
-        {61, 3}, {52, 5}, {68, 7}, {100, 11},
-        {43, 3}, {42, 5}, {54, 7}, {78, 11},
-        {34, 3}, {37, 5}, {47, 7}, {67, 11}};
-static  struct funcargc funcb[12] = {
-        {81, 4}, {72, 6}, {88, 8}, {120, 12},
-        {55, 4}, {54, 6}, {66, 8}, {90, 12},
-        {42, 4}, {45, 6}, {55, 8}, {75, 12}};
-static  char timing[8] = {1, 2, 2, 3, 0, 1, 1, 2};
-
-static  void
-SiS300Threshold(ScrnInfoPtr pScrn, DisplayModePtr mode,
-                                unsigned short *Low, unsigned short *High)
-{
-    SISPtr          pSiS = SISPTR(pScrn);
-    SISRegPtr       pReg = &pSiS->ModeReg;
-    int             mclk = pSiS->MemClock;
-    int             vclk = mode->Clock;
-    int             bpp = pScrn->bitsPerPixel/8;
-    int             lowa, lowb, low;
-    struct funcargc *p;
-    unsigned int    i, j;
-
-    pReg->sisRegs3C4[0x16] = pSiS->SavedReg.sisRegs3C4[0x16];
-
-    if (!bpp)       bpp = 1;
-
-    do {
-        i = GETBITSTR(pReg->sisRegs3C4[0x18], 6:5, 2:1) |
-              GETBITS(pReg->sisRegs3C4[0x18], 1:1);
-        j = GETBITSTR(pReg->sisRegs3C4[0x14], 7:6, 3:2) |
-              GETBITS(pReg->sisRegs3C4[0x16], 7:6);
-        p = &funca[j];
-
-        lowa = (p->base + p->inc*timing[i])*vclk*bpp;
-        lowa = (lowa + (mclk-1)) / mclk;
-        lowa = (lowa + 15)/16;
-
-        p = &funcb[j];
-        lowb = (p->base + p->inc*timing[i])*vclk*bpp;
-        lowb = (lowb + (mclk-1)) / mclk;
-        lowb = (lowb + 15)/16;
-
-        if (lowb < 4)
-            lowb = 0;
-        else
-            lowb -= 4;
-
-        low = (lowa > lowb)? lowa: lowb;
-
-        low++;
-
-        if (low <= 0x13) {
-            break;
-        } else {
-            i = GETBITS(pReg->sisRegs3C4[0x16], 7:6);
-            if (!i) {
-                low = 0x13;
-                break;
-            } else {
-                i--;
-                pReg->sisRegs3C4[0x16] &= 0x3C;
-                pReg->sisRegs3C4[0x16] |= (i << 6);
-            }
+        for(i=0; i<numColors; i++)  {
+                index = indices[i];
+                outSISREG(SISCOL2IDX,  index);
+                outSISREG(SISCOL2DATA, colors[index].red);
+                outSISREG(SISCOL2DATA, colors[index].green);
+                outSISREG(SISCOL2DATA, colors[index].blue);
         }
-    } while (1);
-
-    *Low = low;
-    if (low+3 > 15)
-            *High = 0x0F;
-    else
-            *High = low+3;
-}
-
-static void
-SiS530Threshold(ScrnInfoPtr pScrn, DisplayModePtr mode,
-                                unsigned short *Low, unsigned short *High)
-{
-    SISPtr  pSiS = SISPTR(pScrn);
-    unsigned int    factor, z;
-    unsigned int    vclk = mode->Clock,
-                    bpp = pScrn->bitsPerPixel,
-                    mclk = pSiS->MemClock,
-                    buswidth = pSiS->BusWidth;
-    
-    if (pSiS->Flags & UMA)
-        factor = 0x60;
-    else
-        factor = 0x30;
-    z = factor * vclk * bpp;
-    z = z / mclk / buswidth;
-    *Low = (z+1)/2 + 4;
-    if (*Low > 0x1F)
-        *Low = 0x1F;
-
-    *High = 0x1F;
 }
 
-static void
-SiSThreshold(ScrnInfoPtr pScrn, DisplayModePtr mode,
-                                unsigned short *Low, unsigned short *High)
-{
-    return;
-
-}
 
+#ifdef DEBUG
+/* TW: Debug function to dump registers */
 void SiSIODump(ScrnInfoPtr pScrn)
-{       SISPtr          pSiS = SISPTR(pScrn);
-        int     i, max3c4, min3d4, max3d4;
-        int     SR5State;
-        unsigned char   temp;
+{
+    SISPtr  pSiS = SISPTR(pScrn);
+    int     i, max3c4, min3d4, max3d4;
+    unsigned char   temp;
 
     switch (pSiS->Chipset)  {
         case PCI_CHIP_SIS6326:
@@ -1270,20 +1973,29 @@ void SiSIODump(ScrnInfoPtr pScrn)
         case PCI_CHIP_SIS300:
         case PCI_CHIP_SIS630:
         case PCI_CHIP_SIS540:
-            max3c4 = 0x3D;
+	    max3c4 = 0x3D;
             max3d4 = 0x37;
             min3d4 = 0x30;
             break;
+	case PCI_CHIP_SIS550:
+	case PCI_CHIP_SIS650:
+	case PCI_CHIP_SIS315:
+	case PCI_CHIP_SIS315H:
+	case PCI_CHIP_SIS315PRO:
+	case PCI_CHIP_SIS330:
+            max3c4 = 0x3D;
+            max3d4 = 0x5f;
+            min3d4 = 0x30;
+            break;
         default:
             max3c4 = 0x38;
             max3d4 = 0x19;
             min3d4 = 0x26;
     }
     /* dump Misc Registers */
-    /*temp = inb(0x3CC);*/
     temp = inb(pSiS->RelIO+0x4c);
     xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Misc Output 3CC=%x\n", temp);
-    /*temp = inb(0x3CA);*/
+
     temp = inb(pSiS->RelIO+0x4a);
     xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Feature Control 3CA=%x\n", temp);
 
@@ -1292,10 +2004,7 @@ void SiSIODump(ScrnInfoPtr pScrn)
     xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Registers 3CE\n");
     xf86DrvMsg(pScrn->scrnIndex, X_INFO, "-------------\n");
     for (i=0; i<=8; i++)  {
-        /*outb(0x3ce, i);
-        temp = inb(0x3cf);*/
-        outb(pSiS->RelIO+0x4e, i);
-        temp = inb(pSiS->RelIO+0x4f);
+        inSISIDXREG(SISGR, i, temp);
         xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[%2x]=%2x\n", i, temp);
     }
 
@@ -1304,26 +2013,16 @@ void SiSIODump(ScrnInfoPtr pScrn)
     xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Registers 3C4\n");
     xf86DrvMsg(pScrn->scrnIndex, X_INFO, "-------------\n");
     for (i=0; i<=4; i++)  {
-        /*outb(0x3c4, i);
-        temp = inb(0x3c5);*/
-        outb(pSiS->RelIO+0x44, i);
-        temp = inb(pSiS->RelIO+0x45);
+        inSISIDXREG(SISSR, i, temp);
         xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[%2x]=%2x\n", i, temp);
     }
 
     /* dump extended SR */
-    /*outb(0x3c4, 5);
-    SR5State = inb(0x3c5);*/
-    outb(pSiS->RelIO+0x44, 5);
-    SR5State = inb(pSiS->RelIO+0x45);
-    xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[05]=%2x\n", SR5State);
-    /*outw(0x3c4, 0x8605);*/
-    outw(pSiS->RelIO+0x44, 0x8605);
-    for (i=6; i<=max3c4; i++)  {
-        /*outb(0x3c4, i);
-        temp = inb(0x3c5);*/
-        outb(pSiS->RelIO+0x44, i);
-        temp = inb(pSiS->RelIO+0x45);
+#ifdef UNLOCK_ALWAYS
+    sisSaveUnlockExtRegisterLock(pSiS, NULL, NULL);
+#endif
+    for (i=5; i<=max3c4; i++)  {
+        inSISIDXREG(SISSR, i, temp);
         xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[%2x]=%2x\n", i, temp);
     }
 
@@ -1332,18 +2031,16 @@ void SiSIODump(ScrnInfoPtr pScrn)
     xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Registers 3D4\n");
     xf86DrvMsg(pScrn->scrnIndex, X_INFO, "-------------\n");
     for (i=0; i<=0x18; i++)  {
-        outb(0x3d4, i);
-        temp = inb(0x3d5);
+        inSISIDXREG(SISCR, i, temp);
         xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[%2x]=%2x\n", i, temp);
     }
-    for (i=min3d4; i<=max3d4; i++)  {   /* dump extended CR */
-        outb(0x3d4, i);
-        temp = inb(0x3d5);
-        xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[%2x]=%2x\n", i, temp);
+    /* dump extended CR */
+    for (i=min3d4; i<=max3d4; i++)  {
+        inSISIDXREG(SISCR, i, temp);
+	xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[%2x]=%2x\n", i, temp);
     }
-    outw(pSiS->RelIO+0x44, SR5State << 8 | 0x05);
 }
-
+#endif
 
 void
 SISDACPreInit(ScrnInfoPtr pScrn)
@@ -1351,54 +2048,51 @@ SISDACPreInit(ScrnInfoPtr pScrn)
     SISPtr  pSiS = SISPTR(pScrn);
 
     switch (pSiS->Chipset)  {
-    case PCI_CHIP_SIS630:
-    case PCI_CHIP_SIS540:
-        pSiS->MaxClock = SiSMemBandWidth(pScrn);
-        pSiS->SiSSave           = SiS300Save;
-        pSiS->SiSSave2          = SiS301Save;
-        pSiS->SiSSave3          = SiS301BSave;
-        pSiS->SiSSaveLVDS       = SiSLVDSSave;
-        pSiS->SiSSaveChrontel   = SiSChrontelSave;
-        pSiS->SiSRestore        = SiS300Restore;
-        pSiS->SiSRestore2       = SiS301Restore;
-        pSiS->SiSRestore3       = SiS301BRestore;
-        pSiS->SiSRestoreLVDS    = SiSLVDSRestore;
-        pSiS->SiSRestoreChrontel= SiSChrontelRestore;
-        pSiS->LoadCRT2Palette   = SiS301LoadPalette;
-        pSiS->SetThreshold      = SiS630Threshold;
+      case PCI_CHIP_SIS550:
+      case PCI_CHIP_SIS650:
+      case PCI_CHIP_SIS315:
+      case PCI_CHIP_SIS315H:
+      case PCI_CHIP_SIS315PRO:
+      case PCI_CHIP_SIS330:
+        pSiS->MaxClock               = SiSMemBandWidth(pScrn);
+        pSiS->SiSSave                = SiS310Save;
+        pSiS->SiSSave2               = SiS301Save;
+        pSiS->SiSSave3               = SiS301BSave;
+        pSiS->SiSSaveLVDSChrontel    = SiSLVDSChrontelSave;
+        pSiS->SiSRestore             = SiS310Restore;
+        pSiS->SiSRestore2            = SiS301Restore;
+        pSiS->SiSRestore3            = SiS301BRestore;
+        pSiS->SiSRestoreLVDSChrontel = SiSLVDSChrontelRestore;
+        pSiS->LoadCRT2Palette        = SiS301LoadPalette;
+        pSiS->SetThreshold           = SiSThreshold;
+	pSiS->i2cInit		     = NULL; /* SiSI2CInit;  */
         break;
-    case PCI_CHIP_SIS300:
-        pSiS->MaxClock = SiSMemBandWidth(pScrn);
-        pSiS->SiSSave           = SiS300Save;
-        pSiS->SiSSave2          = SiS301Save;
-        pSiS->SiSSave3          = SiS301BSave;
-        pSiS->SiSSaveLVDS       = SiSLVDSSave;
-        pSiS->SiSSaveChrontel   = SiSChrontelSave;
-        pSiS->SiSRestore        = SiS300Restore;
-        pSiS->SiSRestore2       = SiS301Restore;
-        pSiS->SiSRestore3       = SiS301BRestore;
-        pSiS->SiSRestoreLVDS    = SiSLVDSRestore;
-        pSiS->SiSRestoreChrontel= SiSChrontelRestore;
-        pSiS->LoadCRT2Palette   = SiS301LoadPalette;
-        pSiS->SetThreshold      = SiS300Threshold;
+      case PCI_CHIP_SIS300:
+      case PCI_CHIP_SIS630:
+      case PCI_CHIP_SIS540:
+        pSiS->MaxClock               = SiSMemBandWidth(pScrn);
+        pSiS->SiSSave                = SiS300Save;
+        pSiS->SiSSave2               = SiS301Save;
+        pSiS->SiSSave3               = SiS301BSave;
+        pSiS->SiSSaveLVDSChrontel    = SiSLVDSChrontelSave;
+        pSiS->SiSRestore             = SiS300Restore;
+        pSiS->SiSRestore2            = SiS301Restore;
+        pSiS->SiSRestore3            = SiS301BRestore;
+        pSiS->SiSRestoreLVDSChrontel = SiSLVDSChrontelRestore;
+        pSiS->LoadCRT2Palette        = SiS301LoadPalette;
+        pSiS->SetThreshold           = SiSThreshold;
+	pSiS->i2cInit		     = NULL;  /* SiSI2CInit;  */
         break;
-    case PCI_CHIP_SIS530:
-        pSiS->MaxClock = SiSMemBandWidth(pScrn);
-        pSiS->SiSRestore        = SiSRestore;
-        pSiS->SiSSave           = SiSSave;
-        pSiS->SetThreshold      = SiS530Threshold;
+      case PCI_CHIP_SIS5597:
+      case PCI_CHIP_SIS6326:
+      case PCI_CHIP_SIS530:
+      default:
+        pSiS->MaxClock               = SiSMemBandWidth(pScrn);
+        pSiS->SiSRestore             = SiSRestore;
+        pSiS->SiSSave                = SiSSave;
+        pSiS->SetThreshold           = SiSThreshold;
+	pSiS->i2cInit		     = NULL;
         break;
-    case PCI_CHIP_SIS6326:
-        pSiS->MaxClock = SiSMemBandWidth(pScrn);
-        pSiS->SiSRestore        = SiSRestore;
-        pSiS->SiSSave           = SiSSave;
-        pSiS->SetThreshold      = SiSThreshold;
-        break;
-    default:
-        pSiS->MaxClock = SiSMemBandWidth(pScrn);
-        pSiS->SiSRestore        = SiSRestore;
-        pSiS->SiSSave           = SiSSave;
-        pSiS->SetThreshold      = SiSThreshold;
     }
 }
 
@@ -1411,3 +2105,44 @@ SetBlock(CARD16 port, CARD8 from, CARD8 to, CARD8 *DataPtr)
         outSISIDXREG(port, index, *DataPtr);
     }
 }
+
+void
+SiS6326SetTVReg(ScrnInfoPtr pScrn, CARD8 index, CARD8 data)
+{
+    SISPtr  pSiS = SISPTR(pScrn);
+    outSISIDXREG(SISCR, 0xE0, index);
+    outSISIDXREG(SISCR, 0xE1, data);
+#ifdef TWDEBUG
+    xf86DrvMsg(0, X_INFO, "SiS6326: Setting Tv %02x to %02x\n", index, data);
+#endif
+}
+
+unsigned char
+SiS6326GetTVReg(ScrnInfoPtr pScrn, CARD8 index)
+{
+   SISPtr  pSiS = SISPTR(pScrn);
+   unsigned char data;
+
+   outSISIDXREG(SISCR, 0xE0, index);
+   inSISIDXREG(SISCR, 0xE1, data);
+   return(data);
+}
+
+void
+SiS6326SetXXReg(ScrnInfoPtr pScrn, CARD8 index, CARD8 data)
+{
+    SISPtr  pSiS = SISPTR(pScrn);
+    outSISIDXREG(SISCR, 0xE2, index);
+    outSISIDXREG(SISCR, 0xE3, data);
+}
+
+unsigned char
+SiS6326GetXXReg(ScrnInfoPtr pScrn, CARD8 index)
+{
+   SISPtr  pSiS = SISPTR(pScrn);
+   unsigned char data;
+
+   outSISIDXREG(SISCR, 0xE2, index);
+   inSISIDXREG(SISCR, 0xE3, data);
+   return(data);
+}
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_dac.h b/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_dac.h
index 560205961..907a990f4 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_dac.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_dac.h
@@ -1,5 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/sis_dac.h,v 1.5 2002/04/04 14:05:48 eich Exp $ */
-int sis_compute_vclk(int Clock, int *out_n, int *out_dn, int *out_div, 
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/sis_dac.h,v 1.7 2003/01/29 15:42:17 eich Exp $ */
+
+int SiS_compute_vclk(int Clock, int *out_n, int *out_dn, int *out_div,
 	     			    int *out_sbit, int *out_scale);
 void SISDACPreInit(ScrnInfoPtr pScrn);
 unsigned int SiSddc1Read(ScrnInfoPtr pScrn);
@@ -9,7 +10,44 @@ void SiSCalcClock(ScrnInfoPtr pScrn, int clock, int max_VLD,
                         unsigned int *vclk);
 
 void SiSIODump(ScrnInfoPtr pScrn);
-int SiSMemBandWidth(ScrnInfoPtr pScrn);
-int SiSMclk(SISPtr pSiS);
+int  SiSMemBandWidth(ScrnInfoPtr pScrn);
+int  SiSMclk(SISPtr pSiS);
 void SiSRestoreBridge(ScrnInfoPtr pScrn, SISRegPtr sisReg);
 
+extern void     SiS6326SetTVReg(ScrnInfoPtr pScrn, CARD8 index, CARD8 data);
+extern unsigned char SiS6326GetTVReg(ScrnInfoPtr pScrn, CARD8 index);
+extern void     SiS6326SetXXReg(ScrnInfoPtr pScrn, CARD8 index, CARD8 data);
+extern unsigned char SiS6326GetXXReg(ScrnInfoPtr pScrn, CARD8 index);
+
+extern int      SiSCalcVRate(DisplayModePtr mode);
+
+/* TW: Functions from init.c & init301.c */
+extern void     SiS_UnLockCRT2(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO,USHORT BaseAddr);
+extern void     SiS_LockCRT2(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO,USHORT BaseAddr);
+extern void     SiS_DisableBridge(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO,USHORT  BaseAddr);
+extern void     SiS_EnableBridge(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO,USHORT BaseAddr);
+extern USHORT 	SiS_GetCH700x(SiS_Private *SiS_Pr, USHORT tempbx);
+extern void 	SiS_SetCH700x(SiS_Private *SiS_Pr, USHORT tempbx);
+extern USHORT 	SiS_GetCH701x(SiS_Private *SiS_Pr, USHORT tempbx);
+extern void 	SiS_SetCH701x(SiS_Private *SiS_Pr, USHORT tempbx);
+extern USHORT 	SiS_GetCH70xx(SiS_Private *SiS_Pr, USHORT tempbx);
+extern void 	SiS_SetCH70xx(SiS_Private *SiS_Pr, USHORT tempbx);
+extern void     SiS_SetCH70xxANDOR(SiS_Private *SiS_Pr, USHORT tempax,USHORT tempbh);
+extern void     SiS_DDC2Delay(SiS_Private *SiS_Pr, USHORT delaytime);
+extern USHORT   SiS_HandleDDC(SiS_Private *SiS_Pr, SISPtr pSiS, USHORT adaptnum,
+                              USHORT DDCdatatype, unsigned char *buffer);
+extern void     SiS_WhatIsThis(SiS_Private *SiS_Pr, USHORT myvbinfo);
+extern void     SiS_DisplayOn(SiS_Private *SiS_Pr);
+extern unsigned char SiS_GetSetModeID(ScrnInfoPtr pScrn, unsigned char id);
+#if 0
+extern void     SiS_SetSwitchDDC2(SiS_Private *SiS_Pr);
+extern USHORT   SiS_I2C_GetByte(SiS_Private *SiS_Pr);
+extern Bool     SiS_I2C_PutByte(SiS_Private *SiS_Pr, USHORT data);
+extern Bool     SiS_I2C_Address(SiS_Private *SiS_Pr, USHORT addr);
+extern void     SiS_I2C_Stop(SiS_Private *SiS_Pr);
+#endif
+
+
+
+
+
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_dga.c b/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_dga.c
index ae077c8ac..d45567913 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_dga.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_dga.c
@@ -1,27 +1,33 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/sis_dga.c,v 1.5 2003/01/29 15:42:17 eich Exp $ */
 /*
  * Copyright 2000 by Alan Hourihane, Sychdyn, North Wales, UK.
+ * Copyright 2002 by Thomas Winischhofer, Vienna, Austria
+ *
+ * Portions from radeon_dga.c which is
+ *          Copyright 2000 ATI Technologies Inc., Markham, Ontario, and
+ *                         VA Linux Systems Inc., Fremont, California.
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
  * the above copyright notice appear in all copies and that both that
  * copyright notice and this permission notice appear in supporting
- * documentation, and that the name of Alan Hourihane not be used in
+ * documentation, and that the name of the providers not be used in
  * advertising or publicity pertaining to distribution of the software without
- * specific, written prior permission.  Alan Hourihane makes no representations
+ * specific, written prior permission.  The providers make no representations
  * about the suitability of this software for any purpose.  It is provided
  * "as is" without express or implied warranty.
  *
- * ALAN HOURIHANE DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+ * THE PROVIDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
  * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
- * EVENT SHALL ALAN HOURIHANE BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+ * EVENT SHALL THE PROVIDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
  * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
  * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  * PERFORMANCE OF THIS SOFTWARE.
  *
  * Authors:  Alan Hourihane, <alanh@fairlite.demon.co.uk>
+ *           Thomas Winischhofer <thomas@winischhofer.net>
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/sis_dga.c,v 1.3 2002/01/10 19:05:45 eich Exp $ */
 
 #include "xf86.h"
 #include "xf86_OSproc.h"
@@ -34,7 +40,6 @@
 #include "sis_regs.h"
 #include "dgaproc.h"
 
-Bool SISDGAInit(ScreenPtr pScreen);
 static Bool SIS_OpenFramebuffer(ScrnInfoPtr, char **, unsigned char **, 
                     int *, int *, int *);
 static Bool SIS_SetMode(ScrnInfoPtr, DGAModePtr);
@@ -43,10 +48,8 @@ static int  SIS_GetViewport(ScrnInfoPtr);
 static void SIS_SetViewport(ScrnInfoPtr, int, int, int);
 static void SIS_FillRect(ScrnInfoPtr, int, int, int, int, unsigned long);
 static void SIS_BlitRect(ScrnInfoPtr, int, int, int, int, int, int);
-#if 0
-static void SIS_BlitTransRect(ScrnInfoPtr, int, int, int, int, int, int, 
+static void SIS_BlitTransRect(ScrnInfoPtr, int, int, int, int, int, int,
                     unsigned long);
-#endif
 
 static
 DGAFunctionRec SISDGAFuncs = {
@@ -58,107 +61,200 @@ DGAFunctionRec SISDGAFuncs = {
    SIS_Sync,
    SIS_FillRect,
    SIS_BlitRect,
-#if 0
-   SIS_BlitTransRect,
-#else
    NULL
-#endif
 };
 
-Bool
-SISDGAInit(ScreenPtr pScreen)
-{   
-   ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
-   SISPtr pSIS = SISPTR(pScrn);
-   DGAModePtr modes = NULL, newmodes = NULL, currentMode;
+static
+DGAFunctionRec SISDGAFuncs3xx = {
+   SIS_OpenFramebuffer,
+   NULL,
+   SIS_SetMode,
+   SIS_SetViewport,
+   SIS_GetViewport,
+   SIS_Sync,
+   SIS_FillRect,
+   SIS_BlitRect,
+   SIS_BlitTransRect
+};
+
+static DGAModePtr
+SISSetupDGAMode(
+   ScrnInfoPtr pScrn,
+   DGAModePtr modes,
+   int *num,
+   int bitsPerPixel,
+   int depth,
+   Bool pixmap,
+   int secondPitch,
+   unsigned long red,
+   unsigned long green,
+   unsigned long blue,
+   short visualClass
+){
+   SISPtr pSiS = SISPTR(pScrn);
+   DGAModePtr newmodes = NULL, currentMode;
    DisplayModePtr pMode, firstMode;
-   int Bpp = pScrn->bitsPerPixel >> 3;
-   int num = 0;
+   int otherPitch, Bpp = bitsPerPixel >> 3;
    Bool oneMore;
 
    pMode = firstMode = pScrn->modes;
 
-   while(pMode) {
+   while (pMode) {
 
-#if 0
-    if(pScrn->displayWidth != pMode->HDisplay) {
-        newmodes = xrealloc(modes, (num + 2) * sizeof(DGAModeRec));
-        oneMore = TRUE;
-    } else {
-#endif
-        newmodes = xrealloc(modes, (num + 1) * sizeof(DGAModeRec));
-        oneMore = FALSE;
-    /* } */
+	otherPitch = secondPitch ? secondPitch : pMode->HDisplay;
 
-    if(!newmodes) {
-       xfree(modes);
-       return FALSE;
-    }
-    modes = newmodes;
+	if(pMode->HDisplay != otherPitch) {
+
+	    newmodes = xrealloc(modes, (*num + 2) * sizeof(DGAModeRec));
+	    oneMore  = TRUE;
+
+	} else {
+
+	    newmodes = xrealloc(modes, (*num + 1) * sizeof(DGAModeRec));
+	    oneMore  = FALSE;
+
+	}
+
+	if(!newmodes) {
+	    xfree(modes);
+	    return NULL;
+	}
+	modes = newmodes;
 
 SECOND_PASS:
 
-    currentMode = modes + num;
-    num++;
-
-    currentMode->mode = pMode;
-    currentMode->flags = DGA_CONCURRENT_ACCESS | DGA_PIXMAP_AVAILABLE;
-    currentMode->flags |= DGA_FILL_RECT | DGA_BLIT_RECT;
-    if(pMode->Flags & V_DBLSCAN)
-       currentMode->flags |= DGA_DOUBLESCAN;
-    if(pMode->Flags & V_INTERLACE)
-       currentMode->flags |= DGA_INTERLACED;
-    currentMode->byteOrder = pScrn->imageByteOrder;
-    currentMode->depth = pScrn->depth;
-    currentMode->bitsPerPixel = pScrn->bitsPerPixel;
-    currentMode->red_mask = pScrn->mask.red;
-    currentMode->green_mask = pScrn->mask.green;
-    currentMode->blue_mask = pScrn->mask.blue;
-    currentMode->visualClass = (Bpp == 1) ? PseudoColor : TrueColor;
-    currentMode->viewportWidth = pMode->HDisplay;
-    currentMode->viewportHeight = pMode->VDisplay;
-    currentMode->xViewportStep = 1;
-    currentMode->yViewportStep = 1;
-    currentMode->viewportFlags = DGA_FLIP_RETRACE;
-    currentMode->offset = 0;
-    currentMode->address = pSIS->FbBase;
-
-    if(oneMore) { /* first one is narrow width */
-        currentMode->bytesPerScanline = ((pMode->HDisplay * Bpp) + 3) & ~3L;
-        currentMode->imageWidth = pMode->HDisplay;
-        currentMode->imageHeight =  pMode->VDisplay;
-        currentMode->pixmapWidth = currentMode->imageWidth;
-        currentMode->pixmapHeight = currentMode->imageHeight;
-        currentMode->maxViewportX = currentMode->imageWidth - 
-                    currentMode->viewportWidth;
-        /* this might need to get clamped to some maximum */
-        currentMode->maxViewportY = currentMode->imageHeight -
-                    currentMode->viewportHeight;
-        oneMore = FALSE;
-        goto SECOND_PASS;
-    } else {
-        currentMode->bytesPerScanline = 
-            ((pScrn->displayWidth * Bpp) + 3) & ~3L;
-        currentMode->imageWidth = pScrn->displayWidth;
-        currentMode->imageHeight =  pMode->VDisplay;
-        currentMode->pixmapWidth = currentMode->imageWidth;
-        currentMode->pixmapHeight = currentMode->imageHeight;
-        currentMode->maxViewportX = currentMode->imageWidth - 
-                    currentMode->viewportWidth;
-        /* this might need to get clamped to some maximum */
-        currentMode->maxViewportY = currentMode->imageHeight -
-                    currentMode->viewportHeight;
-    }       
-
-    pMode = pMode->next;
-    if(pMode == firstMode)
-       break;
+	currentMode = modes + *num;
+	(*num)++;
+
+	currentMode->mode           = pMode;
+	currentMode->flags          = DGA_CONCURRENT_ACCESS;
+	if(pixmap)
+	    currentMode->flags     |= DGA_PIXMAP_AVAILABLE;
+	if(!pSiS->NoAccel) {
+	    currentMode->flags     |= DGA_FILL_RECT | DGA_BLIT_RECT;
+	    if((pSiS->VGAEngine == SIS_300_VGA) ||
+	       (pSiS->VGAEngine == SIS_315_VGA) ||
+	       (pSiS->VGAEngine == SIS_530_VGA)) {
+               currentMode->flags  |= DGA_BLIT_RECT_TRANS;
+            }
+	}
+	if (pMode->Flags & V_DBLSCAN)
+	    currentMode->flags     |= DGA_DOUBLESCAN;
+	if (pMode->Flags & V_INTERLACE)
+	    currentMode->flags     |= DGA_INTERLACED;
+	currentMode->byteOrder      = pScrn->imageByteOrder;
+	currentMode->depth          = depth;
+	currentMode->bitsPerPixel   = bitsPerPixel;
+	currentMode->red_mask       = red;
+	currentMode->green_mask     = green;
+	currentMode->blue_mask      = blue;
+	currentMode->visualClass    = visualClass;
+	currentMode->viewportWidth  = pMode->HDisplay;
+	currentMode->viewportHeight = pMode->VDisplay;
+	currentMode->xViewportStep  = 1;
+	currentMode->yViewportStep  = 1;
+	currentMode->viewportFlags  = DGA_FLIP_RETRACE;
+	currentMode->offset         = 0;
+	currentMode->address        = pSiS->FbBase;
+
+	if(oneMore) {
+
+	    /* first one is narrow width */
+	    currentMode->bytesPerScanline = (((pMode->HDisplay * Bpp) + 3) & ~3L);
+	    currentMode->imageWidth   = pMode->HDisplay;
+	    currentMode->imageHeight  = pMode->VDisplay;
+	    currentMode->pixmapWidth  = currentMode->imageWidth;
+	    currentMode->pixmapHeight = currentMode->imageHeight;
+	    currentMode->maxViewportX = currentMode->imageWidth -
+					currentMode->viewportWidth;
+	    /* this might need to get clamped to some maximum */
+	    currentMode->maxViewportY = (currentMode->imageHeight -
+					 currentMode->viewportHeight);
+	    oneMore = FALSE;
+	    goto SECOND_PASS;
+
+	} else {
+
+	    currentMode->bytesPerScanline = ((otherPitch * Bpp) + 3) & ~3L;
+	    currentMode->imageWidth       = otherPitch;
+	    currentMode->imageHeight      = pMode->VDisplay;
+	    currentMode->pixmapWidth      = currentMode->imageWidth;
+	    currentMode->pixmapHeight     = currentMode->imageHeight;
+	    currentMode->maxViewportX     = (currentMode->imageWidth -
+					     currentMode->viewportWidth);
+            /* this might need to get clamped to some maximum */
+	    currentMode->maxViewportY     = (currentMode->imageHeight -
+					     currentMode->viewportHeight);
+	}
+
+	pMode = pMode->next;
+	if (pMode == firstMode)
+	    break;
+    }
+
+    return modes;
+}
+
+
+Bool
+SISDGAInit(ScreenPtr pScreen)
+{
+   ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
+   SISPtr pSiS = SISPTR(pScrn);
+   DGAModePtr modes = NULL;
+   int num = 0;
+
+   /* 8 */
+#ifdef SISDUALHEAD
+   /* TW: We don't ever use 8bpp modes in dual head mode,
+          so don't offer them to DGA either
+    */
+   if(!pSiS->DualHeadMode) {
+#endif
+      modes = SISSetupDGAMode(pScrn, modes, &num, 8, 8,
+	 	              (pScrn->bitsPerPixel == 8),
+			      ((pScrn->bitsPerPixel != 8)
+			          ? 0 : pScrn->displayWidth),
+			      0, 0, 0, PseudoColor);
+#ifdef SISDUALHEAD
+   }
+#endif
+
+   /* 16 */
+   modes = SISSetupDGAMode(pScrn, modes, &num, 16, 16,
+			   (pScrn->bitsPerPixel == 16),
+			   ((pScrn->depth != 16)
+				? 0 : pScrn->displayWidth),
+			   0xf800, 0x07e0, 0x001f, TrueColor);
+
+   if((pSiS->VGAEngine == SIS_530_VGA) || (pSiS->VGAEngine == SIS_OLD_VGA)) {
+     /* 24 */
+     modes = SISSetupDGAMode(pScrn, modes, &num, 24, 24,
+	 		     (pScrn->bitsPerPixel == 24),
+			     ((pScrn->bitsPerPixel != 24)
+				? 0 : pScrn->displayWidth),
+			      0xff0000, 0x00ff00, 0x0000ff, TrueColor);
+   }
+
+   if(pSiS->VGAEngine != SIS_OLD_VGA) {
+     /* 32 */
+     modes = SISSetupDGAMode(pScrn, modes, &num, 32, 24,
+			   (pScrn->bitsPerPixel == 32),
+			   ((pScrn->bitsPerPixel != 32)
+				? 0 : pScrn->displayWidth),
+			   0xff0000, 0x00ff00, 0x0000ff, TrueColor);
    }
 
-   pSIS->numDGAModes = num;
-   pSIS->DGAModes = modes;
+   pSiS->numDGAModes = num;
+   pSiS->DGAModes = modes;
 
-   return DGAInit(pScreen, &SISDGAFuncs, modes, num);  
+   if((pSiS->VGAEngine == SIS_300_VGA) ||
+      (pSiS->VGAEngine == SIS_315_VGA) ||
+      (pSiS->VGAEngine == SIS_530_VGA)) {
+     return DGAInit(pScreen, &SISDGAFuncs3xx, modes, num);
+   } else {
+     return DGAInit(pScreen, &SISDGAFuncs, modes, num);
+   }
 }
 
 
@@ -167,27 +263,39 @@ SIS_SetMode(
    ScrnInfoPtr pScrn,
    DGAModePtr pMode
 ){
-   static int OldDisplayWidth[MAXSCREENS];
+   static SISFBLayout BackupLayouts[MAXSCREENS];
    int index = pScrn->pScreen->myNum;
-   SISPtr pSIS = SISPTR(pScrn);
+   SISPtr pSiS = SISPTR(pScrn);
 
     if(!pMode) { /* restore the original mode */
-        /* put the ScreenParameters back */
-        pScrn->displayWidth = OldDisplayWidth[index];
+
+        if(pSiS->DGAactive) {
+           /* put the ScreenParameters back */
+	   memcpy(&pSiS->CurrentLayout, &BackupLayouts[index], sizeof(SISFBLayout));
+        }
+
+	pScrn->currentMode = pSiS->CurrentLayout.mode;
 
         (*pScrn->SwitchMode)(index, pScrn->currentMode, 0);
-        pSIS->DGAactive = FALSE;
-    } else {
-        if(!pSIS->DGAactive) {  /* save the old parameters */
-            OldDisplayWidth[index] = pScrn->displayWidth;
+	(*pScrn->AdjustFrame)(index, pScrn->frameX0, pScrn->frameY0, 0);
+        pSiS->DGAactive = FALSE;
 
-            pSIS->DGAactive = TRUE;
+    } else {	/* set new mode */
+
+        if(!pSiS->DGAactive) {
+	    /* save the old parameters */
+            memcpy(&BackupLayouts[index], &pSiS->CurrentLayout, sizeof(SISFBLayout));
+            pSiS->DGAactive = TRUE;
     	}
 
-    	pScrn->displayWidth = pMode->bytesPerScanline /
-      				(pMode->bitsPerPixel >> 3);
+	pSiS->CurrentLayout.bitsPerPixel = pMode->bitsPerPixel;
+	pSiS->CurrentLayout.depth        = pMode->depth;
+	pSiS->CurrentLayout.displayWidth = pMode->bytesPerScanline / (pMode->bitsPerPixel >> 3);
 
     	(*pScrn->SwitchMode)(index, pMode->mode, 0);
+	/* TW: Adjust viewport to 0/0 after mode switch */
+	/* This should fix the vmware-in-dualhead problems */
+	(*pScrn->AdjustFrame)(index, 0, 0, 0);
     }
 
     return TRUE;
@@ -197,21 +305,21 @@ static int
 SIS_GetViewport(
   ScrnInfoPtr pScrn
 ){
-    SISPtr pSIS = SISPTR(pScrn);
+    SISPtr pSiS = SISPTR(pScrn);
 
-    return pSIS->DGAViewportStatus;
+    return pSiS->DGAViewportStatus;
 }
 
 static void 
 SIS_SetViewport(
-   ScrnInfoPtr pScrn, 
+   ScrnInfoPtr pScrn,
    int x, int y, 
    int flags
 ){
-   SISPtr pSIS = SISPTR(pScrn);
+   SISPtr pSiS = SISPTR(pScrn);
 
    (*pScrn->AdjustFrame)(pScrn->pScreen->myNum, x, y, flags);
-   pSIS->DGAViewportStatus = 0;  /* SISAdjustFrame loops until finished */
+   pSiS->DGAViewportStatus = 0;  /* There are never pending Adjusts */
 }
 
 static void 
@@ -220,12 +328,12 @@ SIS_FillRect (
    int x, int y, int w, int h, 
    unsigned long color
 ){
-    SISPtr pSIS = SISPTR(pScrn);
+    SISPtr pSiS = SISPTR(pScrn);
 
-    if(pSIS->AccelInfoPtr) {
-    (*pSIS->AccelInfoPtr->SetupForSolidFill)(pScrn, color, GXcopy, ~0);
-    (*pSIS->AccelInfoPtr->SubsequentSolidFillRect)(pScrn, x, y, w, h);
-    SET_SYNC_FLAG(pSIS->AccelInfoPtr);
+    if(pSiS->AccelInfoPtr) {
+      (*pSiS->AccelInfoPtr->SetupForSolidFill)(pScrn, color, GXcopy, ~0);
+      (*pSiS->AccelInfoPtr->SubsequentSolidFillRect)(pScrn, x, y, w, h);
+      SET_SYNC_FLAG(pSiS->AccelInfoPtr);
     }
 }
 
@@ -233,10 +341,10 @@ static void
 SIS_Sync(
    ScrnInfoPtr pScrn
 ){
-    SISPtr pSIS = SISPTR(pScrn);
+    SISPtr pSiS = SISPTR(pScrn);
 
-    if(pSIS->AccelInfoPtr) {
-    (*pSIS->AccelInfoPtr->Sync)(pScrn);
+    if(pSiS->AccelInfoPtr) {
+      (*pSiS->AccelInfoPtr->Sync)(pScrn);
     }
 }
 
@@ -247,22 +355,21 @@ SIS_BlitRect(
    int w, int h, 
    int dstx, int dsty
 ){
-    SISPtr pSIS = SISPTR(pScrn);
+    SISPtr pSiS = SISPTR(pScrn);
 
-    if(pSIS->AccelInfoPtr) {
-    int xdir = ((srcx < dstx) && (srcy == dsty)) ? -1 : 1;
-    int ydir = (srcy < dsty) ? -1 : 1;
+    if(pSiS->AccelInfoPtr) {
+      int xdir = ((srcx < dstx) && (srcy == dsty)) ? -1 : 1;
+      int ydir = (srcy < dsty) ? -1 : 1;
 
-    (*pSIS->AccelInfoPtr->SetupForScreenToScreenCopy)(
-        pScrn, xdir, ydir, GXcopy, ~0, -1);
-    (*pSIS->AccelInfoPtr->SubsequentScreenToScreenCopy)(
-        pScrn, srcx, srcy, dstx, dsty, w, h);
-    SET_SYNC_FLAG(pSIS->AccelInfoPtr);
+      (*pSiS->AccelInfoPtr->SetupForScreenToScreenCopy)(
+          pScrn, xdir, ydir, GXcopy, (CARD32)~0, -1);
+      (*pSiS->AccelInfoPtr->SubsequentScreenToScreenCopy)(
+          pScrn, srcx, srcy, dstx, dsty, w, h);
+      SET_SYNC_FLAG(pSiS->AccelInfoPtr);
     }
 }
 
-#if 0
-static void 
+static void
 SIS_BlitTransRect(
    ScrnInfoPtr pScrn, 
    int srcx, int srcy, 
@@ -270,25 +377,34 @@ SIS_BlitTransRect(
    int dstx, int dsty,
    unsigned long color
 ){
-  /* this one should be separate since the XAA function would
-     prohibit usage of ~0 as the key */
+    SISPtr pSiS = SISPTR(pScrn);
+
+    if(pSiS->AccelInfoPtr) {
+       int xdir = ((srcx < dstx) && (srcy == dsty)) ? -1 : 1;
+       int ydir = (srcy < dsty) ? -1 : 1;
+
+       (*pSiS->AccelInfoPtr->SetupForScreenToScreenCopy)(
+          pScrn, xdir, ydir, GXcopy, ~0, color);
+       (*pSiS->AccelInfoPtr->SubsequentScreenToScreenCopy)(
+          pScrn, srcx, srcy, dstx, dsty, w, h);
+       SET_SYNC_FLAG(pSiS->AccelInfoPtr);
+    }
 }
-#endif
 
 static Bool 
 SIS_OpenFramebuffer(
-   ScrnInfoPtr pScrn, 
+   ScrnInfoPtr pScrn,
    char **name,
    unsigned char **mem,
    int *size,
    int *offset,
    int *flags
 ){
-    SISPtr pSIS = SISPTR(pScrn);
+    SISPtr pSiS = SISPTR(pScrn);
 
     *name = NULL;       /* no special device */
-    *mem = (unsigned char*)pSIS->FbAddress;
-    *size = pSIS->maxxfbmem;
+    *mem = (unsigned char*)pSiS->FbAddress;
+    *size = pSiS->maxxfbmem;
     *offset = 0;
     *flags = DGA_NEED_ROOT;
 
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_dri.c b/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_dri.c
index 2476e6f43..5eb43f55a 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_dri.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_dri.c
@@ -1,6 +1,11 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/sis_dri.c,v 1.22 2002/04/06 18:16:06 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/sis_dri.c,v 1.25 2003/01/29 15:42:17 eich Exp $ */
 
-/* modified from tdfx_dri.c, mga_dri.c */
+/*
+ *  DRI wrapper for 300, 540, 630, 730
+ *  (310/325 series experimental and incomplete)
+ *
+ * taken and modified from tdfx_dri.c, mga_dri.c
+ */
 
 #include "xf86.h"
 #include "xf86_OSproc.h"
@@ -15,14 +20,28 @@
 
 #include "sis.h"
 #include "sis_dri.h"
-#include "xf86drmSiS.h"
+#if XF86_VERSION_CURRENT >= XF86_VERSION_NUMERIC(4,2,99,0,0)
+#include "xf86drmCompat.h"
+#endif
 
+/* TW: Idle function for 300 series */
 #define BR(x)   (0x8200 | (x) << 2)
 #define SiSIdle \
   while((MMIO_IN16(pSiS->IOBase, BR(16)+2) & 0xE000) != 0xE000){}; \
   while((MMIO_IN16(pSiS->IOBase, BR(16)+2) & 0xE000) != 0xE000){}; \
   MMIO_IN16(pSiS->IOBase, 0x8240);
 
+/* TW: Idle function for 310/325 series */
+#define Q_STATUS 0x85CC
+#define SiS310Idle \
+  { \
+  while( (MMIO_IN16(pSiS->IOBase, Q_STATUS+2) & 0x8000) != 0x8000){}; \
+  while( (MMIO_IN16(pSiS->IOBase, Q_STATUS+2) & 0x8000) != 0x8000){}; \
+  while( (MMIO_IN16(pSiS->IOBase, Q_STATUS+2) & 0x8000) != 0x8000){}; \
+  MMIO_IN16(pSiS->IOBase, Q_STATUS); \
+  }
+
+
 extern void GlxSetVisualConfigs(
     int nconfigs,
     __GLXvisualConfig *configs,
@@ -53,6 +72,10 @@ static void SISDRIInitBuffers(WindowPtr pWin, RegionPtr prgn, CARD32 index);
 static void SISDRIMoveBuffers(WindowPtr pParent, DDXPointRec ptOldOrg, 
                    RegionPtr prgnSrc, CARD32 index);
 
+#if XF86_VERSION_CURRENT < XF86_VERSION_NUMERIC(4,2,99,0,0)
+extern Bool drmSiSAgpInit(int driSubFD, int offset, int size);
+#endif
+
 static Bool
 SISInitVisualConfigs(ScreenPtr pScreen)
 {
@@ -222,11 +245,22 @@ Bool SISDRIScreenInit(ScreenPtr pScreen)
   pDRIInfo->ddxDriverMajorVersion = 0;
   pDRIInfo->ddxDriverMinorVersion = 1;
   pDRIInfo->ddxDriverPatchVersion = 0;
+  
   pDRIInfo->frameBufferPhysicalAddress = pSIS->FbAddress;
-  pDRIInfo->frameBufferSize = pSIS->FbMapSize;  
+
+  /* TW: This was FbMapSize which is wrong as we must not
+   *     ever overwrite HWCursor and TQ area. On the other
+   *     hand, using availMem here causes MTRR allocation
+   *     to fail ("base is not aligned to size"). Since
+   *     DRI memory management is done via framebuffer
+   *     device, I assume that the size given here
+   *     is NOT used for eventual memory management.
+   */
+  pDRIInfo->frameBufferSize = pSIS->FbMapSize;   /* availMem; */
   
-  /* ?? */
+  /* TW: scrnOffset is being calulated in sis_vga.c */
   pDRIInfo->frameBufferStride = pSIS->scrnOffset;
+  
   pDRIInfo->ddxDrawableTableEntry = SIS_MAX_DRAWABLES;
 
   if (SAREA_MAX_DRAWABLES < SIS_MAX_DRAWABLES)
@@ -235,11 +269,12 @@ Bool SISDRIScreenInit(ScreenPtr pScreen)
     pDRIInfo->maxDrawableTableEntry = SIS_MAX_DRAWABLES;
 
 #ifdef NOT_DONE
-  /* FIXME need to extend DRI protocol to pass this size back to client 
+  /* FIXME need to extend DRI protocol to pass this size back to client
    * for SAREA mapping that includes a device private record
    */
-  pDRIInfo->SAREASize = 
-    ((sizeof(XF86DRISAREARec) + 0xfff) & 0x1000); /* round to page */
+  pDRIInfo->SAREASize =
+    ((sizeof(XF86DRISAREARec) + getpagesize() - 1) & getpagesize()); /* round to page */
+    /* ((sizeof(XF86DRISAREARec) + 0xfff) & 0x1000); */ /* round to page */
   /* + shared memory device private rec */
 #else
   /* For now the mapping works by using a fixed size defined
@@ -492,8 +527,15 @@ SISDRIFinishScreenInit(ScreenPtr pScreen)
 
     /* frame control */
     saPriv->FrameCount = 0;
-    *(unsigned long *)(pSiS->IOBase+0x8a2c) = 0;
-    SiSIdle
+    if (pSiS->VGAEngine == SIS_315_VGA) {	/* 310/325 series */
+#if 0
+       *(unsigned long *)(pSiS->IOBase+0x8a2c) = 0;	/* FIXME: Where is this on the 310 series ? */
+#endif
+       SiS310Idle
+    } else {					/* 300 series (and below) */
+       *(unsigned long *)(pSiS->IOBase+0x8a2c) = 0;
+       SiSIdle
+    }
   }
   
   return DRIFinishScreenInit(pScreen);
@@ -505,7 +547,7 @@ SISDRISwapContext(ScreenPtr pScreen, DRISyncType syncType,
            DRIContextType newContextType, void *newContext)
 {
   ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
-  SISPtr pSIS = SISPTR(pScrn);
+  SISPtr pSiS = SISPTR(pScrn);
 
 #if 0
   if ((syncType==DRI_3D_SYNC) && (oldContextType==DRI_2D_CONTEXT) &&
@@ -522,10 +564,16 @@ SISDRISwapContext(ScreenPtr pScreen, DRISyncType syncType,
   /* 
    * TODO: do this only if X-Server get lock. If kernel supports delayed
    * signal, needless to do this
-   */ 
-  *(pSIS->IOBase + 0X8B50) = 0xff;
-  *(unsigned int *)(pSIS->IOBase + 0x8B60) = -1;
-    
+   */
+  if (pSiS->VGAEngine == SIS_315_VGA) {
+#if 0
+        *(pSiS->IOBase + 0x8B50) = 0xff;		/* FIXME: Where is this on 310 series */
+  	*(unsigned int *)(pSiS->IOBase + 0x8B60) = -1;  /* FIXME: Where is this on 310 series */
+#endif
+  } else {
+  	*(pSiS->IOBase + 0x8B50) = 0xff;
+  	*(unsigned int *)(pSiS->IOBase + 0x8B60) = -1;
+  }
 }
 
 static void
@@ -535,7 +583,11 @@ SISDRIInitBuffers(WindowPtr pWin, RegionPtr prgn, CARD32 index)
   ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
   SISPtr pSiS = SISPTR(pScrn);
 
-  SiSIdle  
+  if (pSiS->VGAEngine == SIS_315_VGA) {
+  	SiS310Idle		/* 310/325 series */
+  } else {
+    	SiSIdle			/* 300 series */
+  }
 }
 
 static void
@@ -546,7 +598,11 @@ SISDRIMoveBuffers(WindowPtr pParent, DDXPointRec ptOldOrg,
   ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
   SISPtr pSiS = SISPTR(pScrn);
 
-  SiSIdle  
+  if (pSiS->VGAEngine == SIS_315_VGA) {
+  	SiS310Idle		/* 310/325 series */
+  } else {
+  	SiSIdle			/* 300 series and below */
+  }
 }
 
 #if 0
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_driver.c b/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_driver.c
index a58fcb4c2..eb89fe24b 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_driver.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_driver.c
@@ -1,33 +1,49 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/sis_driver.c,v 1.86 2003/02/04 02:44:29 dawes Exp $ */
 /*
  * Copyright 1998,1999 by Alan Hourihane, Wigan, England.
+ * Parts Copyright 2001, 2002, 2003 by Thomas Winischhofer, Vienna, Austria.
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
  * the above copyright notice appear in all copies and that both that
  * copyright notice and this permission notice appear in supporting
- * documentation, and that the name of Alan Hourihane not be used in
+ * documentation, and that the name of the copyright holder not be used in
  * advertising or publicity pertaining to distribution of the software without
- * specific, written prior permission.  Alan Hourihane makes no representations
+ * specific, written prior permission.  The copyright holder makes no representations
  * about the suitability of this software for any purpose.  It is provided
  * "as is" without express or implied warranty.
  *
- * ALAN HOURIHANE DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+ * THE COPYRIGHT HOLDER DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
  * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
- * EVENT SHALL ALAN HOURIHANE BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+ * EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY SPECIAL, INDIRECT OR
  * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
  * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  * PERFORMANCE OF THIS SOFTWARE.
  *
  * Authors:  Alan Hourihane, alanh@fairlite.demon.co.uk
- *           Mike Chapman <mike@paranoia.com>, 
- *           Juanjo Santamarta <santamarta@ctv.es>, 
- *           Mitani Hiroshi <hmitani@drl.mei.co.jp> 
- *           David Thomas <davtom@dream.org.uk>. 
+ *           Mike Chapman <mike@paranoia.com>,
+ *           Juanjo Santamarta <santamarta@ctv.es>,
+ *           Mitani Hiroshi <hmitani@drl.mei.co.jp>
+ *           David Thomas <davtom@dream.org.uk>.
  *
- *  Fixes for 630 chipsets: Thomas Winischhofer.
+ *	     Thomas Winischhofer <thomas@winischhofer.net>:
+ *              - 310/325 series (315/550/650/651/740/M650) support
+ *		- (possibly incomplete) Xabre (SiS330) support
+ *              - new mode switching code for 300, 310/325 and 330 series
+ *              - many fixes for 300/540/630/730 chipsets,
+ *              - many fixes for 5597/5598, 6326 and 530/620 chipsets,
+ *              - VESA mode switching (deprecated),
+ *              - extended CRT2/video bridge handling support,
+ *              - dual head support on 300, 310/325 and 330 series
+ *              - 650/LVDS (up to 1400x1050), 650/Chrontel 701x support
+ *              - 30xB/30xLV/30xLVX video bridge support (300, 310/325, 330 series)
+ *              - Xv support for 5597/5598, 6326, 530/620 and 310/325 series
+ *              - video overlay enhancements for 300 series
+ *              - TV and hi-res support for the 6326
+ *		- Color HW cursor support for 300(emulated), 310/325 and 330 series
+ *              - etc.
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/sis_driver.c,v 1.81 2002/07/24 01:47:32 tsi Exp $ */
 
 #include "fb.h"
 #include "xf1bpp.h"
@@ -38,6 +54,7 @@
 #include "xf86_OSproc.h"
 #include "xf86Resources.h"
 #include "xf86_ansic.h"
+#include "dixstruct.h"
 #include "xf86Version.h"
 #include "xf86PciInfo.h"
 #include "xf86Pci.h"
@@ -54,10 +71,11 @@
 
 #include "sis.h"
 #include "sis_regs.h"
-#include "sis_bios.h"
 #include "sis_vb.h"
 #include "sis_dac.h"
 
+#include "sis_driver.h"
+
 #define _XF86DGA_SERVER_
 #include "extensions/xf86dgastr.h"
 
@@ -74,19 +92,20 @@
 #include "dri.h"
 #endif
 
-
-/* mandatory functions */
+/* Mandatory functions */
 static void SISIdentify(int flags);
 static Bool SISProbe(DriverPtr drv, int flags);
 static Bool SISPreInit(ScrnInfoPtr pScrn, int flags);
-static Bool SISScreenInit(int Index, ScreenPtr pScreen, int argc,
-                  char **argv);
+static Bool SISScreenInit(int Index, ScreenPtr pScreen, int argc, char **argv);
 static Bool SISEnterVT(int scrnIndex, int flags);
 static void SISLeaveVT(int scrnIndex, int flags);
 static Bool SISCloseScreen(int scrnIndex, ScreenPtr pScreen);
 static Bool SISSaveScreen(ScreenPtr pScreen, int mode);
 static Bool SISSwitchMode(int scrnIndex, DisplayModePtr mode, int flags);
 static void SISAdjustFrame(int scrnIndex, int x, int y, int flags);
+#ifdef SISDUALHEAD
+static Bool SISSaveScreenDH(ScreenPtr pScreen, int mode);
+#endif
 
 /* Optional functions */
 static void SISFreeScreen(int scrnIndex, int flags);
@@ -94,47 +113,68 @@ static int  SISValidMode(int scrnIndex, DisplayModePtr mode, Bool verbose,
                  int flags);
 
 /* Internally used functions */
-static Bool SISMapMem(ScrnInfoPtr pScrn);
-static Bool SISUnmapMem(ScrnInfoPtr pScrn);
-static void SISSave(ScrnInfoPtr pScrn);
-static void SISRestore(ScrnInfoPtr pScrn);
-static void SISVESARestore(ScrnInfoPtr pScrn);
-static Bool SISModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode);
-static void SISModifyModeInfo(DisplayModePtr mode);
-static void SiSPreSetMode(ScrnInfoPtr pScrn);
-static void SiSPostSetMode(ScrnInfoPtr pScrn, SISRegPtr sisReg, int LockAfterwards);
-static Bool SiSSetVESAMode(ScrnInfoPtr pScrn, DisplayModePtr pMode);
-static void SiSBuildVesaModeList(int scrnIndex, vbeInfoPtr pVbe, 
-				 VbeInfoBlock *vbe);
-static void SISSaveUnlockExtRegisterLock(SISRegPtr sisReg);
-static void SISRestoreExtRegisterLock(SISRegPtr sisReg);
-static UShort CalcVESAModeIndex(ScrnInfoPtr pScrn, DisplayModePtr mode);
-static void SISVESASaveRestore(ScrnInfoPtr pScrn, vbeSaveRestoreFunction function);
-static void SISBridgeRestore(ScrnInfoPtr pScrn);
-unsigned char SISSearchCRT1Rate(DisplayModePtr mode);
-
-void SiSOptions(ScrnInfoPtr pScrn);
-const OptionInfoRec * SISAvailableOptions(int chipid, int busid);
-void SiSSetup(ScrnInfoPtr pScrn);
-void SISVGAPreInit(ScrnInfoPtr pScrn);
-Bool SiSAccelInit(ScreenPtr pScreen);
-Bool SiS300AccelInit(ScreenPtr pScreen);
-Bool SiS530AccelInit(ScreenPtr pScreen);
-Bool SiSHWCursorInit(ScreenPtr pScreen);
-Bool SISDGAInit(ScreenPtr pScreen);
-void SISInitVideo(ScreenPtr pScreen);
-
-
-#ifdef  DEBUG
+static Bool    SISMapMem(ScrnInfoPtr pScrn);
+static Bool    SISUnmapMem(ScrnInfoPtr pScrn);
+static void    SISSave(ScrnInfoPtr pScrn);
+static void    SISRestore(ScrnInfoPtr pScrn);
+static void    SISVESARestore(ScrnInfoPtr pScrn);
+static Bool    SISModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode);
+static void    SISModifyModeInfo(DisplayModePtr mode);
+static void    SiSPreSetMode(ScrnInfoPtr pScrn, DisplayModePtr mode);
+static void    SiSPostSetMode(ScrnInfoPtr pScrn, SISRegPtr sisReg);
+static void    SiS6326PostSetMode(ScrnInfoPtr pScrn, SISRegPtr sisReg);
+static Bool    SiSSetVESAMode(ScrnInfoPtr pScrn, DisplayModePtr pMode);
+static void    SiSBuildVesaModeList(ScrnInfoPtr pScrn, vbeInfoPtr pVbe, VbeInfoBlock *vbe);
+static UShort  SiSCalcVESAModeIndex(ScrnInfoPtr pScrn, DisplayModePtr mode);
+static void    SISVESASaveRestore(ScrnInfoPtr pScrn, vbeSaveRestoreFunction function);
+static void    SISBridgeRestore(ScrnInfoPtr pScrn);
+static void    SiSEnableTurboQueue(ScrnInfoPtr pScrn);
+unsigned char  SISSearchCRT1Rate(ScrnInfoPtr pScrn, DisplayModePtr mode);
+static void    SISWaitVBRetrace(ScrnInfoPtr pScrn);
+
+void           SISWaitRetraceCRT1(ScrnInfoPtr pScrn);
+void           SISWaitRetraceCRT2(ScrnInfoPtr pScrn);
+
+BOOLEAN        SiSBridgeIsInSlaveMode(ScrnInfoPtr pScrn);
+#ifdef CYCLECRT2
+Bool           SISCycleCRT2Type(int scrnIndex, DisplayModePtr mode);
+#endif
+
+#ifdef DEBUG
 static void SiSDumpModeInfo(ScrnInfoPtr pScrn, DisplayModePtr mode);
 #endif
 
+/* TW: New mode switching functions */
+extern BOOLEAN 	SiSBIOSSetMode(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,
+                               ScrnInfoPtr pScrn, DisplayModePtr mode, BOOLEAN IsCustom);
+extern BOOLEAN  SiSSetMode(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,
+                           ScrnInfoPtr pScrn,USHORT ModeNo, BOOLEAN dosetpitch);
+extern USHORT 	SiS_CalcModeIndex(ScrnInfoPtr pScrn, DisplayModePtr mode);
+extern USHORT   SiS_CheckCalcModeIndex(ScrnInfoPtr pScrn, DisplayModePtr mode, int VBFlags);
+extern void	SiSRegInit(SiS_Private *SiS_Pr, USHORT BaseAddr);
+extern DisplayModePtr  SiSBuildBuiltInModeList(ScrnInfoPtr pScrn);
+#ifdef SISDUALHEAD
+extern BOOLEAN 	SiSBIOSSetModeCRT1(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,
+				   ScrnInfoPtr pScrn, DisplayModePtr mode, BOOLEAN IsCustom);
+extern BOOLEAN 	SiSBIOSSetModeCRT2(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,
+				   ScrnInfoPtr pScrn, DisplayModePtr mode);
+#endif
+
+/* TW: For power management for 310/325 series */
+extern void SiS_Chrontel701xBLOn(SiS_Private *SiS_Pr);
+extern void SiS_Chrontel701xBLOff(SiS_Private *SiS_Pr);
+extern void SiS_SiS30xBLOn(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension);
+extern void SiS_SiS30xBLOff(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension);
+
+#ifdef SISDUALHEAD
+static int      SISEntityIndex = -1;
+#endif
+
 /*
  * This is intentionally screen-independent.  It indicates the binding
  * choice made in the first PreInit.
  */
 static int pix24bpp = 0;
- 
 
 /* 
  * This contains the functions needed by the server after loading the driver
@@ -155,82 +195,40 @@ DriverRec SIS = {
 };
 
 static SymTabRec SISChipsets[] = {
-#if 0 
-    { PCI_CHIP_SG86C201,    "SIS86c201" },
-    { PCI_CHIP_SG86C202,    "SIS86c202" },
-    { PCI_CHIP_SG86C205,    "SIS86c205" },
-    { PCI_CHIP_SG86C215,    "SIS86c215" },
-    { PCI_CHIP_SG86C225,    "SIS86c225" },
-#endif
-    { PCI_CHIP_SIS5597,     "SIS5597" },
-    { PCI_CHIP_SIS530,      "SIS530" },
-    { PCI_CHIP_SIS6326,     "SIS6326" },
-    { PCI_CHIP_SIS300,      "SIS300" },
-    { PCI_CHIP_SIS630,      "SIS630" },
+    { PCI_CHIP_SIS5597,     "SIS5597/5598" },
+    { PCI_CHIP_SIS530,      "SIS530/620" },
+    { PCI_CHIP_SIS6326,     "SIS6326/AGP/DVD" },
+    { PCI_CHIP_SIS300,      "SIS300/305" },
+    { PCI_CHIP_SIS630,      "SIS630/730" },
     { PCI_CHIP_SIS540,      "SIS540" },
+    { PCI_CHIP_SIS315,      "SIS315" },
+    { PCI_CHIP_SIS315H,     "SIS315H" },
+    { PCI_CHIP_SIS315PRO,   "SIS315PRO" },
+    { PCI_CHIP_SIS550,	    "SIS550" },
+    { PCI_CHIP_SIS650,      "SIS650/M650/651/740" },
+#ifdef INCL_SIS330 /* TW: New for SiS330 (untested) */
+    { PCI_CHIP_SIS330,      "SIS330(Xabre)" },
+#endif
     { -1,                   NULL }
 };
 
 static PciChipsets SISPciChipsets[] = {
-#if 0
-    { PCI_CHIP_SG86C201,    PCI_CHIP_SG86C201,  RES_SHARED_VGA },
-    { PCI_CHIP_SG86C202,    PCI_CHIP_SG86C202,  RES_SHARED_VGA },
-    { PCI_CHIP_SG86C205,    PCI_CHIP_SG86C205,  RES_SHARED_VGA },
-    { PCI_CHIP_SG86C205,    PCI_CHIP_SG86C205,  RES_SHARED_VGA },
-#endif
     { PCI_CHIP_SIS5597,     PCI_CHIP_SIS5597,   RES_SHARED_VGA },
     { PCI_CHIP_SIS530,      PCI_CHIP_SIS530,    RES_SHARED_VGA },
     { PCI_CHIP_SIS6326,     PCI_CHIP_SIS6326,   RES_SHARED_VGA },
     { PCI_CHIP_SIS300,      PCI_CHIP_SIS300,    RES_SHARED_VGA },
     { PCI_CHIP_SIS630,      PCI_CHIP_SIS630,    RES_SHARED_VGA },
     { PCI_CHIP_SIS540,      PCI_CHIP_SIS540,    RES_SHARED_VGA },
+    { PCI_CHIP_SIS550,      PCI_CHIP_SIS550,    RES_SHARED_VGA },
+    { PCI_CHIP_SIS315,      PCI_CHIP_SIS315,    RES_SHARED_VGA },
+    { PCI_CHIP_SIS315H,     PCI_CHIP_SIS315H,   RES_SHARED_VGA },
+    { PCI_CHIP_SIS315PRO,   PCI_CHIP_SIS315PRO, RES_SHARED_VGA },
+    { PCI_CHIP_SIS650,      PCI_CHIP_SIS650,    RES_SHARED_VGA },
+#ifdef INCL_SIS330 /* TW: New for SiS330 */
+    { PCI_CHIP_SIS330,      PCI_CHIP_SIS330,    RES_SHARED_VGA },
+#endif
     { -1,                   -1,                 RES_UNDEFINED }
 };
-    
-
-int sisReg32MMIO[]={0x8280,0x8284,0x8288,0x828C,0x8290,0x8294,0x8298,0x829C,
-            0x82A0,0x82A4,0x82A8,0x82AC};
-/* Engine Register for the 2nd Generation Graphics Engine */
-int sis2Reg32MMIO[]={0x8200,0x8204,0x8208,0x820C,0x8210,0x8214,0x8218,0x821C,
-            0x8220,0x8224,0x8228,0x822C,0x8230,0x8234,0x8238,0x823C,
-             0x8240, 0x8300};
-
-/* TW: The following was re-included because there are BIOSes out there that
- *     report incomplete mode lists. These are BIOS versions <2.01.2x
- */
-/* TW: VBE 3.0 on SiS630 does not support 24 fpp modes (only 32fpp when depth = 24);
- *     NOTE: Mode numbers for 1280, 1600 and 1920 are unofficial but they work here! 
- */
- 				        /*     8      16     24    32   */
-static UShort  VESAModeIndex_640x480[]   = {0x100, 0x111, 0x112, 0x13a};
-static UShort  VESAModeIndex_720x480[]   = {0x000, 0x000, 0x000, 0x000};
-static UShort  VESAModeIndex_720x576[]   = {0x000, 0x000, 0x000, 0x000};
-static UShort  VESAModeIndex_800x600[]   = {0x103, 0x114, 0x115, 0x13b};
-static UShort  VESAModeIndex_1024x768[]  = {0x105, 0x117, 0x118, 0x13c};
-static UShort  VESAModeIndex_1280x1024[] = {0x107, 0x11a, 0x11b, 0x13d};
-static UShort  VESAModeIndex_1600x1200[] = {0x13e, 0x13f, 0x000, 0x140};
-static UShort  VESAModeIndex_1920x1440[] = {0x141, 0x142, 0x000, 0x143};
-
-static struct _sis_vrate {
-    CARD16 idx;
-    CARD16 xres;
-    CARD16 yres;
-    CARD16 refresh;
-} sisx_vrate[] = {
-    {1, 640, 480, 60},  {2, 640, 480, 72}, {3, 640, 480, 75},  {4, 640, 480, 85},
-    {5, 640, 480, 100}, {6, 640, 480, 120}, {7, 640, 480, 160}, {8, 640, 480, 200},
-    {1, 720, 480, 60}, {1, 720, 576, 50},
-    {1, 800, 600, 56}, {2, 800, 600, 60}, {3, 800, 600, 72}, {4, 800, 600, 75},
-    {5, 800, 600, 85}, {6, 800, 600, 100}, {7, 800, 600, 120}, {8, 800, 600, 160},
-    {1, 1024, 768, 43}, {2, 1024, 768, 60}, {3, 1024, 768, 70}, {4, 1024, 768, 75},
-    {5, 1024, 768, 85}, {6, 1024, 768, 100}, {7, 1024, 768, 120},
-    {1, 1280, 1024, 43}, {2, 1280, 1024, 60}, {3, 1280, 1024, 75}, {4, 1280, 1024, 85},
-    {1, 1600, 1200, 60}, {2, 1600, 1200, 65}, {3, 1600, 1200, 70}, {4, 1600, 1200, 75},
-    {5, 1600, 1200, 85},
-    {1, 1920, 1440, 60},
-    {0, 0, 0, 0}
-};
-
 
 static const char *xaaSymbols[] = {
     "XAACopyROP",
@@ -285,6 +283,11 @@ static const char *ramdacSymbols[] = {
 static const char *ddcSymbols[] = {
     "xf86PrintEDID",
     "xf86SetDDCproperties",
+    "xf86InterpretEDID",
+    "xf86DoEDID_DDC1",
+#ifdef SISI2C
+    "xf86DoEDID_DDC2",
+#endif
     NULL
 };
 
@@ -294,13 +297,29 @@ static const char *i2cSymbols[] = {
     NULL
 };
 
+static const char *int10Symbols[] = {
+    "xf86FreeInt10",
+    "xf86InitInt10",
+    NULL
+};
+
 static const char *vbeSymbols[] = {
+#if XF86_VERSION_CURRENT < XF86_VERSION_NUMERIC(4,2,99,0,0)
+    "VBEInit",
+#else
     "VBEExtendedInit",
+#endif
     "vbeDoEDID",
     "vbeFree",
-    "VBEFreeVBEInfo",
     "VBEGetVBEInfo",
+    "VBEFreeVBEInfo",
+    "VBEGetModeInfo",
+    "VBEFreeModeInfo",
     "VBESaveRestore",
+    "VBESetVBEMode",
+    "VBEGetVBEMode",
+    "VBESetDisplayStart",
+    "VBESetGetLogicalScanlineLength",
     NULL
 };
 
@@ -336,7 +355,6 @@ static const char *driSymbols[] = {
 };
 #endif
 
-
 #ifdef XFree86LOADER
 
 static MODULESETUPPROTO(sisSetup);
@@ -367,7 +385,7 @@ sisSetup(pointer module, pointer opts, int *errmaj, int *errmin)
         xf86AddDriver(&SIS, module, 0);
         LoaderRefSymLists(vgahwSymbols, fbSymbols, i2cSymbols, xaaSymbols,
 			  miscfbSymbols, shadowSymbols, ramdacSymbols,
-			  vbeSymbols,
+			  vbeSymbols, int10Symbols,
 #ifdef XF86DRI
 			  drmSymbols, driSymbols,
 #endif
@@ -393,7 +411,9 @@ SISGetRec(ScrnInfoPtr pScrn)
         return TRUE;
 
     pScrn->driverPrivate = xnfcalloc(sizeof(SISRec), 1);
-    /* Initialise it */
+    
+    /* Initialise it to 0 */
+    memset(pScrn->driverPrivate, 0, sizeof(SISRec));
 
     return TRUE;
 }
@@ -402,9 +422,44 @@ static void
 SISFreeRec(ScrnInfoPtr pScrn)
 {
     SISPtr pSiS = SISPTR(pScrn);
-    
-    if (pSiS->pstate) xfree(pSiS->pstate);
+#ifdef SISDUALHEAD
+    SISEntPtr pSiSEnt = NULL;
+#endif
+
+    /* TW: Just to make sure... */
+    if(!pSiS) return;
+
+    pSiSEnt = pSiS->entityPrivate;
+
+    if(pSiS->pstate) xfree(pSiS->pstate);
     pSiS->pstate = NULL;
+    if(pSiS->fonts) xfree(pSiS->fonts);
+    pSiS->fonts = NULL;
+#ifdef SISDUALHEAD
+    if(pSiSEnt) {
+      if(!pSiS->SecondHead) {
+          /* TW: Free memory only if we are first head; in case of an error
+	   *     during init of the second head, the server will continue -
+	   *     and we need the BIOS image and SiS_Private for the first
+	   *     head.
+	   */
+	  if(pSiSEnt->BIOS) xfree(pSiSEnt->BIOS);
+          pSiSEnt->BIOS = pSiS->BIOS = NULL;
+	  if(pSiSEnt->SiS_Pr) xfree(pSiSEnt->SiS_Pr);
+          pSiSEnt->SiS_Pr = pSiS->SiS_Pr = NULL;
+      } else {
+      	  pSiS->BIOS = NULL;
+	  pSiS->SiS_Pr = NULL;
+      }
+    } else {
+#endif
+      if(pSiS->BIOS) xfree(pSiS->BIOS);
+      pSiS->BIOS = NULL;
+      if(pSiS->SiS_Pr) xfree(pSiS->SiS_Pr);
+      pSiS->SiS_Pr = NULL;
+#ifdef SISDUALHEAD
+    }
+#endif
     if (pSiS->pVbe) vbeFree(pSiS->pVbe);
     pSiS->pVbe = NULL;
     if (pScrn->driverPrivate == NULL)
@@ -413,72 +468,294 @@ SISFreeRec(ScrnInfoPtr pScrn)
     pScrn->driverPrivate = NULL;
 }
 
-static void 
+static void
 SISDisplayPowerManagementSet(ScrnInfoPtr pScrn, int PowerManagementMode, int flags)
 {
     SISPtr pSiS = SISPTR(pScrn);
-    unsigned char extDDC_PCR;
+    unsigned char extDDC_PCR=0;
+    unsigned char crtc17, seq1;
+
+    xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3,
+          "SISDisplayPowerManagementSet(%d)\n",PowerManagementMode);
+
+    /* unlock registers */
+#ifdef UNLOCK_ALWAYS
+    sisSaveUnlockExtRegisterLock(pSiS, NULL, NULL);
+#endif
+
+    /* Read CR17 */
+    inSISIDXREG(SISCR, 0x17, crtc17);
+
+    /* Read SR1 */
+    inSISIDXREG(SISSR, 0x01, seq1);
+
+    if(pSiS->VBFlags & CRT2_LCD) {
+      if(((pSiS->VGAEngine == SIS_300_VGA) &&
+    	  (!(pSiS->VBFlags & (VB_30xLV|VB_30xLVX)))) ||
+         ((pSiS->VGAEngine == SIS_315_VGA) &&
+          ((pSiS->VBFlags & (VB_LVDS | VB_CHRONTEL)) == VB_LVDS))) {
+         /* Read Power Control Register (SR11) */
+         inSISIDXREG(SISSR, 0x11, extDDC_PCR);
+         /* if not blanked, obtain state of LCD blank flags set by BIOS */
+         if(!pSiS->Blank) {
+	    pSiS->LCDon = extDDC_PCR;
+         }
+         /* erase LCD blank flags */
+         extDDC_PCR &= ~0x0C;
+      }
+    }
+
+    switch (PowerManagementMode) {
+
+       case DPMSModeOn:      /* HSync: On, VSync: On */
+
+	    pSiS->Blank = FALSE;
+            seq1 &= ~0x20;
+            crtc17 |= 0x80;
+	    if(pSiS->VBFlags & CRT2_LCD) {
+	       if(pSiS->VGAEngine == SIS_315_VGA) {
+	          if(pSiS->VBFlags & VB_CHRONTEL) {
+		      SiS_Chrontel701xBLOn(pSiS->SiS_Pr);
+		  } else if(pSiS->VBFlags & VB_LVDS) {
+		      extDDC_PCR |= (pSiS->LCDon & 0x0C);
+		  } else if(pSiS->VBFlags & (VB_30xLV|VB_30xLVX)) {
+		      SiS_SiS30xBLOn(pSiS->SiS_Pr,&pSiS->sishw_ext);
+		  }
+	       } else if(pSiS->VGAEngine == SIS_300_VGA) {
+	           if(pSiS->VBFlags & (VB_30xLV|VB_30xLVX)) {
+		      SiS_SiS30xBLOn(pSiS->SiS_Pr,&pSiS->sishw_ext);
+		   } else {
+	              extDDC_PCR |= (pSiS->LCDon & 0x0C);
+		   }
+	       }
+	    }
+            break;
+
+       case DPMSModeStandby: /* HSync: Off, VSync: On */
+       case DPMSModeSuspend: /* HSync: On, VSync: Off */
+
+       	    pSiS->Blank = TRUE;
+            seq1 |= 0x20 ;
+	    if(pSiS->VBFlags & CRT2_LCD) {
+		if(pSiS->VGAEngine == SIS_315_VGA) {
+		   if(pSiS->VBFlags & VB_CHRONTEL) {
+		      SiS_Chrontel701xBLOff(pSiS->SiS_Pr);
+		   } else if(pSiS->VBFlags & VB_LVDS) {
+		      extDDC_PCR |= 0x08;
+		   } else if(pSiS->VBFlags & (VB_30xLV|VB_30xLVX)) {
+		      SiS_SiS30xBLOff(pSiS->SiS_Pr,&pSiS->sishw_ext);
+		   }
+		} else if(pSiS->VGAEngine == SIS_300_VGA) {
+		   if(pSiS->VBFlags & (VB_30xLV|VB_30xLVX)) {
+		      SiS_SiS30xBLOff(pSiS->SiS_Pr,&pSiS->sishw_ext);
+		   } else {
+		      extDDC_PCR |= 0x08;
+		   }
+		}
+	    }
+            break;
+
+       case DPMSModeOff:     /* HSync: Off, VSync: Off */
+
+            pSiS->Blank = TRUE;
+            seq1 |= 0x20;
+	    if(pSiS->VGAEngine == SIS_300_VGA ||
+	       pSiS->VGAEngine == SIS_315_VGA) {
+	       /* TW: We can't switch off CRT1 if bridge is in slavemode */
+	       if(pSiS->VBFlags & CRT2_ENABLE) {
+	          if(!(SiSBridgeIsInSlaveMode(pScrn))) crtc17 &= ~0x80;
+	       } else crtc17 &= ~0x80;
+	    } else {
+	       crtc17 &= ~0x80;
+	    }
+	    if(pSiS->VBFlags & CRT2_LCD) {
+		if(pSiS->VGAEngine == SIS_315_VGA) {
+		   if(pSiS->VBFlags & VB_CHRONTEL) {
+		      SiS_Chrontel701xBLOff(pSiS->SiS_Pr);
+		   } else if(pSiS->VBFlags & VB_LVDS) {
+		      extDDC_PCR |= 0x0C;
+		   } else if(pSiS->VBFlags & (VB_30xLV|VB_30xLVX)) {
+		      SiS_SiS30xBLOff(pSiS->SiS_Pr,&pSiS->sishw_ext);
+		   }
+		} else if(pSiS->VGAEngine == SIS_300_VGA) {
+		   if(pSiS->VBFlags & (VB_30xLV|VB_30xLVX)) {
+		      SiS_SiS30xBLOff(pSiS->SiS_Pr,&pSiS->sishw_ext);
+		   } else {
+		      extDDC_PCR |= 0x0C;
+		   }
+		}
+            }
+	    break;
+
+    }
+
+    outSISIDXREG(SISSR, 0x01, seq1);    /* Set/Clear "Display On" bit */
+
+    outSISIDXREG(SISCR, 0x17, crtc17);
+
+    if(pSiS->VBFlags & CRT2_LCD) {
+      if(((pSiS->VGAEngine == SIS_300_VGA) &&
+          (!(pSiS->VBFlags & (VB_30xLV|VB_30xLVX)))) ||
+         ((pSiS->VGAEngine == SIS_315_VGA) &&
+          ((pSiS->VBFlags & (VB_LVDS | VB_CHRONTEL)) == VB_LVDS))) {
+            outSISIDXREG(SISSR, 0x11, extDDC_PCR);
+      }
+    }
+
+    outSISIDXREG(SISSR, 0x00, 0x01);    /* Synchronous Reset */
+    usleep(10000);
+    outSISIDXREG(SISSR, 0x00, 0x03);    /* End Reset */
+
+}
+
+#ifdef SISDUALHEAD
+/* TW: DPMS for dual head mode */
+static void
+SISDisplayPowerManagementSetDH(ScrnInfoPtr pScrn, int PowerManagementMode, int flags)
+{
+    SISPtr pSiS = SISPTR(pScrn);
     unsigned char crtc17 = 0;
+    unsigned char extDDC_PCR=0;
     unsigned char seq1 = 0;
-    int vgaIOBase = VGAHWPTR(pScrn)->IOBase;
 
     xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3,
-                 "SISDisplayPowerManagementSet(%d)\n",PowerManagementMode);
-
-    outb(vgaIOBase + 4, 0x17);
-    crtc17 = inb(vgaIOBase + 5);
-    outb(VGA_SEQ_INDEX, 0x11);
-    extDDC_PCR = inb(VGA_SEQ_DATA);
-    /* if not blanked obtain state of LCD blank flags set by BIOS */
-    if (!pSiS->Blank)
-	pSiS->LCDon = extDDC_PCR;
-    /* erase LCD blank flags */
-    extDDC_PCR &= ~0xC;
-
-    switch (PowerManagementMode)
+           "SISDisplayPowerManagementSetDH(%d)\n",PowerManagementMode);
+
+    /* unlock registers */
+#ifdef UNLOCK_ALWAYS
+    sisSaveUnlockExtRegisterLock(pSiS, NULL, NULL);
+#endif
+
+    if (pSiS->SecondHead) {
+
+	/* TW: Second (slave) head is always CRT1 */
+
+	/* Read CR17 and SR01 */
+        inSISIDXREG(SISCR, 0x17, crtc17);
+        inSISIDXREG(SISSR, 0x01, seq1);
+
+    	switch (PowerManagementMode)
     	{
-          case DPMSModeOn:
-            /* HSync: On, VSync: On */
-            seq1 = 0x00 ;
-	    /* don't just unblanking; use LCD state set by BIOS */
-	    extDDC_PCR  |= (pSiS->LCDon & 0x0C);
-	    pSiS->Blank = FALSE;
+          case DPMSModeOn:       /* HSync: On, VSync: On */
+            seq1 &= ~0x20 ;
             crtc17 |= 0x80;
+	    pSiS->BlankCRT1 = FALSE;
             break;
-          case DPMSModeStandby:
-            /* HSync: Off, VSync: On */
-            seq1 = 0x20 ;
-            extDDC_PCR |= 0x8;
-	    pSiS->Blank = TRUE;
+
+          case DPMSModeStandby:  /* HSync: Off, VSync: On */
+          case DPMSModeSuspend:  /* HSync: On, VSync: Off */
+	    seq1 |= 0x20;
+	    pSiS->BlankCRT1 = TRUE;
+            break;
+
+          case DPMSModeOff:      /* HSync: Off, VSync: Off */
+            seq1 |= 0x20 ;
+	    pSiS->BlankCRT1 = TRUE;
+            crtc17 &= ~0x80;
             break;
-          case DPMSModeSuspend:
-            /* HSync: On, VSync: Off */
-            seq1 = 0x20 ;
-            extDDC_PCR |= 0x8;
-	    pSiS->Blank = TRUE;
+    	}
+	outSISIDXREG(SISSR, 0x00, 0x01);    /* Synchronous Reset */
+
+	outSISIDXREG(SISSR, 0x01, seq1);    /* Set/Clear "Display On" bit */
+
+    	usleep(10000);
+
+	outSISIDXREG(SISCR, 0x17, crtc17);
+
+	outSISIDXREG(SISSR, 0x00, 0x03);    /* End Reset */
+
+    } else {
+
+    	/* TW: Master head is always CRT2 */
+
+	/* TV can not be managed */
+	if(!(pSiS->VBFlags & CRT2_LCD)) return;
+
+        if(((pSiS->VGAEngine == SIS_300_VGA) &&
+	    (!(pSiS->VBFlags & (VB_30xLV|VB_30xLVX)))) ||
+	   ((pSiS->VGAEngine == SIS_315_VGA) &&
+	    ((pSiS->VBFlags & (VB_LVDS | VB_CHRONTEL)) == VB_LVDS))) {
+	   /* Read Power Control Register (SR11) */
+           inSISIDXREG(SISSR, 0x11, extDDC_PCR);
+      	   /* if not blanked obtain state of LCD blank flags set by BIOS */
+    	   if(!pSiS->BlankCRT2) {
+		pSiS->LCDon = extDDC_PCR;
+	   }
+       	   /* erase LCD blank flags */
+    	   extDDC_PCR &= ~0xC;
+	}
+
+    	switch (PowerManagementMode) {
+
+          case DPMSModeOn:
+	    pSiS->BlankCRT2 = FALSE;
+	    if(pSiS->VGAEngine == SIS_315_VGA) {
+		if(pSiS->VBFlags & VB_CHRONTEL) {
+		   SiS_Chrontel701xBLOn(pSiS->SiS_Pr);
+		} else if(pSiS->VBFlags & VB_LVDS) {
+		   extDDC_PCR |= (pSiS->LCDon & 0x0C);
+		} else if(pSiS->VBFlags & (VB_30xLV|VB_30xLVX)) {
+		   SiS_SiS30xBLOn(pSiS->SiS_Pr, &pSiS->sishw_ext);
+		}
+	    } else if(pSiS->VGAEngine == SIS_300_VGA) {
+	        if(pSiS->VBFlags & (VB_30xLV|VB_30xLVX)) {
+		   SiS_SiS30xBLOn(pSiS->SiS_Pr, &pSiS->sishw_ext);
+	        } else {
+		   extDDC_PCR |= (pSiS->LCDon & 0x0C);
+		}
+            }
             break;
+
+          case DPMSModeStandby:
+	  case DPMSModeSuspend:
+	    pSiS->BlankCRT2 = TRUE;
+	    if(pSiS->VGAEngine == SIS_315_VGA) {
+	    	if(pSiS->VBFlags & VB_CHRONTEL) {
+		   SiS_Chrontel701xBLOff(pSiS->SiS_Pr);
+		} else if(pSiS->VBFlags & VB_LVDS) {
+		   extDDC_PCR |= 0x08;
+		} else if(pSiS->VBFlags & (VB_30xLV|VB_30xLVX)) {
+		   SiS_SiS30xBLOff(pSiS->SiS_Pr, &pSiS->sishw_ext);
+		}
+	    } else if(pSiS->VGAEngine == SIS_300_VGA) {
+	        if(pSiS->VBFlags & (VB_30xLV|VB_30xLVX)) {
+		   SiS_SiS30xBLOff(pSiS->SiS_Pr, &pSiS->sishw_ext);
+	        } else {
+	    	   extDDC_PCR |= 0x08;
+		}
+	    }
+            break;
+
           case DPMSModeOff:
-            /* HSync: Off, VSync: Off */
-            seq1 = 0x20 ;
-            extDDC_PCR |= 0xC;
-	    pSiS->Blank = TRUE;
-            /* DPMSModeOff is not supported with ModeStandby | ModeSuspend  */
-            /* need same as the generic VGA function */
-            crtc17 &= ~0x80;
+	    pSiS->BlankCRT2 = TRUE;
+	    if(pSiS->VGAEngine == SIS_315_VGA) {
+		if(pSiS->VBFlags & VB_CHRONTEL) {
+		   SiS_Chrontel701xBLOff(pSiS->SiS_Pr);
+		} else if(pSiS->VBFlags & VB_LVDS) {
+		   extDDC_PCR |= 0x0C;
+		} else if(pSiS->VBFlags & (VB_30xLV|VB_30xLVX)) {
+		   SiS_SiS30xBLOff(pSiS->SiS_Pr, &pSiS->sishw_ext);
+		}
+	    } else if(pSiS->VGAEngine == SIS_300_VGA) {
+	        if(pSiS->VBFlags & (VB_30xLV|VB_30xLVX)) {
+		   SiS_SiS30xBLOff(pSiS->SiS_Pr, &pSiS->sishw_ext);
+	        } else {
+                   extDDC_PCR |= 0x0C;
+		}
+            }
             break;
+	}
+
+	if(((pSiS->VGAEngine == SIS_300_VGA) &&
+	    (!(pSiS->VBFlags & (VB_30xLV|VB_30xLVX)))) ||
+	   ((pSiS->VGAEngine == SIS_315_VGA) &&
+	    ((pSiS->VBFlags & (VB_LVDS | VB_CHRONTEL)) == VB_LVDS))) {
+	   outSISIDXREG(SISSR, 0x11, extDDC_PCR);
+	}
+
     }
-    outw(VGA_SEQ_INDEX, 0x0100);    /* Synchronous Reset */
-    outb(VGA_SEQ_INDEX, 0x01);  /* Select SEQ1 */
-    seq1 |= inb(VGA_SEQ_DATA) & ~0x20;
-    outb(VGA_SEQ_DATA, seq1);
-    usleep(10000);
-    outb(vgaIOBase + 4, 0x17);
-    outb(vgaIOBase + 5, crtc17);
-    outb(VGA_SEQ_INDEX, 0x11);
-    outb(VGA_SEQ_DATA, extDDC_PCR);
-    outw(VGA_SEQ_INDEX, 0x0300);    /* End Reset */
 }
-
+#endif
 
 /* Mandatory */
 static void
@@ -492,27 +769,27 @@ SIS1bppColorMap(ScrnInfoPtr pScrn)
 {
    SISPtr pSiS = SISPTR(pScrn);
 
-   outb(pSiS->RelIO+0x48, 0x00);
-   outb(pSiS->RelIO+0x49, 0x00);
-   outb(pSiS->RelIO+0x49, 0x00);
-   outb(pSiS->RelIO+0x49, 0x00);
+   outSISREG(SISCOLIDX, 0x00);
+   outSISREG(SISCOLDATA, 0x00);
+   outSISREG(SISCOLDATA, 0x00);
+   outSISREG(SISCOLDATA, 0x00);
 
-   outb(pSiS->RelIO+0x48, 0x3F);
-   outb(pSiS->RelIO+0x49, 0x3F);
-   outb(pSiS->RelIO+0x49, 0x3F);
-   outb(pSiS->RelIO+0x49, 0x3F);
+   outSISREG(SISCOLIDX, 0x3f);
+   outSISREG(SISCOLDATA, 0x3f);
+   outSISREG(SISCOLDATA, 0x3f);
+   outSISREG(SISCOLDATA, 0x3f);
 }
 
 /* Mandatory */
 static Bool
 SISProbe(DriverPtr drv, int flags)
 {
-    int i;
+    int     i;
     GDevPtr *devSections;
-    int *usedChips;
-    int numDevSections;
-    int numUsed;
-    Bool foundScreen = FALSE;
+    int     *usedChips;
+    int     numDevSections;
+    int     numUsed;
+    Bool    foundScreen = FALSE;
 
     /*
      * The aim here is to find all cards that this driver can handle,
@@ -525,8 +802,6 @@ SISProbe(DriverPtr drv, int flags)
      * the required ScrnInfoRec initialisations.  Don't allocate any new
      * data structures.
      *
-     * Since this test version still uses vgaHW, we'll only actually claim
-     * one for now, and just print a message about the others.
      */
 
     /*
@@ -546,11 +821,6 @@ SISProbe(DriverPtr drv, int flags)
     }
 
     /*
-     * While we're VGA-dependent, can really only have one such instance, but
-     * we'll ignore that.
-     */
-
-    /*
      * We need to probe the hardware first.  We then need to see how this
      * fits in with what is given in the config file, and allow the config
      * file info to override any contradictions.
@@ -581,13 +851,16 @@ SISProbe(DriverPtr drv, int flags)
         foundScreen = TRUE;
     else for (i = 0; i < numUsed; i++) {
         ScrnInfoPtr pScrn;
+#ifdef SISDUALHEAD
+	EntityInfoPtr pEnt;
+#endif
 
         /* Allocate a ScrnInfoRec and claim the slot */
         pScrn = NULL;
 
         if ((pScrn = xf86ConfigPciEntity(pScrn, 0, usedChips[i],
-                                            SISPciChipsets, NULL, NULL,
-                                            NULL, NULL, NULL))) {
+                                         SISPciChipsets, NULL, NULL,
+                                         NULL, NULL, NULL))) {
             /* Fill in what we can of the ScrnInfoRec */
             pScrn->driverVersion    = SIS_CURRENT_VERSION;
             pScrn->driverName       = SIS_DRIVER_NAME;
@@ -603,25 +876,255 @@ SISProbe(DriverPtr drv, int flags)
             pScrn->ValidMode        = SISValidMode;
             foundScreen = TRUE;
         }
+#ifdef SISDUALHEAD
+	pEnt = xf86GetEntityInfo(usedChips[i]);
+
+	/* TW: I assume these chipsets as - basically - dual head capable. */
+	if (pEnt->chipset == PCI_CHIP_SIS630 || pEnt->chipset == PCI_CHIP_SIS540 ||
+	    pEnt->chipset == PCI_CHIP_SIS650 || pEnt->chipset == PCI_CHIP_SIS550 ||
+	    pEnt->chipset == PCI_CHIP_SIS315 || pEnt->chipset == PCI_CHIP_SIS315H ||
+	    pEnt->chipset == PCI_CHIP_SIS315PRO || pEnt->chipset == PCI_CHIP_SIS330 ||
+	    pEnt->chipset == PCI_CHIP_SIS300) {
+
+	    SISEntPtr pSiSEnt = NULL;
+	    DevUnion  *pPriv;
+
+	    xf86SetEntitySharable(usedChips[i]);
+	    if (SISEntityIndex < 0)
+	        SISEntityIndex = xf86AllocateEntityPrivateIndex();
+	    pPriv = xf86GetEntityPrivate(pScrn->entityList[0], SISEntityIndex);
+	    if (!pPriv->ptr) {
+	        pPriv->ptr = xnfcalloc(sizeof(SISEntRec), 1);
+		pSiSEnt = pPriv->ptr;
+		pSiSEnt->lastInstance = -1;
+		pSiSEnt->DisableDual = FALSE;
+		pSiSEnt->ErrorAfterFirst = FALSE;
+		pSiSEnt->MapCountIOBase = pSiSEnt->MapCountFbBase = 0;
+		pSiSEnt->FbBase = pSiSEnt->IOBase = NULL;
+  		pSiSEnt->forceUnmapIOBase = FALSE;
+		pSiSEnt->forceUnmapFbBase = FALSE;
+#ifdef __alpha__
+		pSiSEnt->MapCountIOBaseDense = 0;
+		pSiSEnt->IOBaseDense = NULL;
+		pSiSEnt->forceUnmapIOBaseDense = FALSE;
+#endif
+	    } else {
+	        pSiSEnt = pPriv->ptr;
+	    }
+	    pSiSEnt->lastInstance++;
+	    xf86SetEntityInstanceForScreen(pScrn, pScrn->entityList[0],
+	                                   pSiSEnt->lastInstance);
+	}
+#endif
     }
     xfree(usedChips);
     return foundScreen;
 }
 
-#if 0 /* xf86ValidateModes() takes care of this */
-/*
- * GetAccelPitchValues -
- *
- * This function returns a list of display width (pitch) values that can
- * be used in accelerated mode.
+
+/* TW: If monitor section has no HSync/VRefresh data,
+ *     derive it from DDC data.
  */
-static int
-GetAccelPitchValues(ScrnInfoPtr pScrn)
+static void
+SiSSetSyncRangeFromEdid(ScrnInfoPtr pScrn, int flag)
 {
-    return ((pScrn->displayWidth + 7) & ~7);
+   MonPtr      mon = pScrn->monitor;
+   xf86MonPtr  ddc = mon->DDC;
+   int         i,j;
+   float       myhhigh, myhlow;
+   int         myvhigh, myvlow;
+   unsigned char temp;
+   const myhddctiming myhtiming[11] = {
+       { 1, 0x20, 31.6 }, /* rounded up by .1 */
+       { 1, 0x02, 35.3 },
+       { 1, 0x04, 37.6 },
+       { 1, 0x08, 38.0 },
+       { 1, 0x01, 38.0 },
+       { 2, 0x40, 47.0 },
+       { 2, 0x80, 48.2 },
+       { 2, 0x08, 48.5 },
+       { 2, 0x04, 56.6 },
+       { 2, 0x02, 60.1 },
+       { 2, 0x01, 80.1 }
+   };
+   const myvddctiming myvtiming[10] = {
+       { 1, 0x02, 56 },
+       { 1, 0x01, 60 },
+       { 2, 0x08, 60 },
+       { 2, 0x04, 70 },
+       { 1, 0x08, 72 },
+       { 2, 0x80, 72 },
+       { 1, 0x04, 75 },
+       { 2, 0x40, 75 },
+       { 2, 0x02, 75 },
+       { 2, 0x01, 75 }
+   };
+   /* "Future modes"; we only check the really high ones */
+   const myddcstdmodes mystdmodes[8] = {
+       { 1280, 1024, 85, 91.1 },
+       { 1600, 1200, 60, 75.0 },
+       { 1600, 1200, 65, 81.3 },
+       { 1600, 1200, 70, 87.5 },
+       { 1600, 1200, 75, 93.8 },
+       { 1600, 1200, 85, 106.3 },
+       { 1920, 1440, 60, 90.0 },
+       { 1920, 1440, 75, 112.5 }
+   };
+
+   if(flag) { /* HSync */
+      for (i = 0; i < 4; i++) {
+    	 if (ddc->det_mon[i].type == DS_RANGES) {
+            mon->nHsync = 1;
+            mon->hsync[0].lo = ddc->det_mon[i].section.ranges.min_h;
+            mon->hsync[0].hi = ddc->det_mon[i].section.ranges.max_h;
+            return;
+         }
+      }
+      /* If no sync ranges detected in detailed timing table, we
+       * derive them from supported VESA modes. */
+      myhlow = myhhigh = 0.0;
+      for(i=0; i<11; i++) {
+         if(myhtiming[i].whichone == 1) temp = ddc->timings1.t1;
+	 else                           temp = ddc->timings1.t2;
+	 if(temp & myhtiming[i].mask) {
+	     if((i==0) || (myhlow > myhtiming[i].rate))
+	            myhlow = myhtiming[i].rate;
+	 }
+	 if(myhtiming[10-i].whichone == 1) temp = ddc->timings1.t1;
+	 else                              temp = ddc->timings1.t2;
+	 if(temp & myhtiming[10-i].mask) {
+	     if((i==0) || (myhhigh < myhtiming[10-i].rate))
+	            myhhigh = myhtiming[10-i].rate;
+	 }
+      }
+      for(i=0;i<STD_TIMINGS;i++) {
+	 if(ddc->timings2[i].hsize > 256) {
+            for(j=0; j<8; j++) {
+	       if((ddc->timings2[i].hsize == mystdmodes[j].hsize) &&
+	          (ddc->timings2[i].vsize == mystdmodes[j].vsize) &&
+		  (ddc->timings2[i].refresh == mystdmodes[j].refresh)) {
+		  if(mystdmodes[j].hsync > myhhigh)
+		     myhhigh = mystdmodes[j].hsync;
+	       }
+	    }
+	 }
+      }
+      if((myhhigh) && (myhlow)) {
+         mon->nHsync = 1;
+	 mon->hsync[0].lo = myhlow - 0.1;
+	 mon->hsync[0].hi = myhhigh;
+      }
+
+
+   } else {  /* Vrefresh */
+
+      for (i = 0; i < 4; i++) {
+         if (ddc->det_mon[i].type == DS_RANGES) {
+            mon->nVrefresh = 1;
+            mon->vrefresh[0].lo = ddc->det_mon[i].section.ranges.min_v;
+            mon->vrefresh[0].hi = ddc->det_mon[i].section.ranges.max_v;
+            return;
+         }
+      }
+
+      myvlow = myvhigh = 0;
+      for(i=0; i<10; i++) {
+         if(myvtiming[i].whichone == 1) temp = ddc->timings1.t1;
+	 else                           temp = ddc->timings1.t2;
+	 if(temp & myvtiming[i].mask) {
+	     if((i==0) || (myvlow > myvtiming[i].rate))
+	           myvlow = myvtiming[i].rate;
+	 }
+	 if(myvtiming[9-i].whichone == 1) temp = ddc->timings1.t1;
+	 else                             temp = ddc->timings1.t2;
+	 if(temp & myvtiming[9-i].mask) {
+	     if((i==0) || (myvhigh < myvtiming[9-i].rate))
+	           myvhigh = myvtiming[9-i].rate;
+	 }
+      }
+      for(i=0;i<STD_TIMINGS;i++) {
+	 if(ddc->timings2[i].hsize > 256) {
+            for(j=0; j<8; j++) {
+	       if((ddc->timings2[i].hsize == mystdmodes[j].hsize) &&
+	          (ddc->timings2[i].vsize == mystdmodes[j].vsize) &&
+		  (ddc->timings2[i].refresh == mystdmodes[j].refresh)) {
+		  if(mystdmodes[j].refresh > myvhigh)
+		     myvhigh = mystdmodes[j].refresh;
+	       }
+	    }
+	 }
+      }
+      if((myvhigh) && (myvlow)) {
+         mon->nVrefresh = 1;
+	 mon->vrefresh[0].lo = myvlow;
+	 mon->vrefresh[0].hi = myvhigh;
+      }
+
+    }
 }
-#endif
 
+static xf86MonPtr
+SiSInternalDDC(ScrnInfoPtr pScrn, int crtno)
+{
+   SISPtr        pSiS = SISPTR(pScrn);
+   USHORT        temp, i;
+   unsigned char buffer[256];
+   xf86MonPtr    pMonitor = NULL;
+
+   /* TW: If CRT1 is off, skip DDC */
+   if((pSiS->CRT1off) && (!crtno)) return NULL;
+
+   temp = SiS_HandleDDC(pSiS->SiS_Pr, pSiS, crtno, 0, &buffer[0]);
+   if((!temp) || (temp == 0xffff)) {
+      xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+                "CRT%d DDC probing failed, now trying via VBE\n", crtno + 1);
+      return(NULL);
+   } else {
+      xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "CRT%d DDC supported\n", crtno + 1);
+      xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "CRT%d DDC level: %s%s%s%s\n",
+	     crtno + 1,
+	     (temp & 0x1a) ? "" : "[none of the supported]",
+	     (temp & 0x02) ? "2 " : "",
+	     (temp & 0x08) ? "3 " : "",
+             (temp & 0x10) ? "4" : "");
+      if(temp & 0x02) {
+	 i = 3;  /* Number of retrys */
+	 do {
+	    temp = SiS_HandleDDC(pSiS->SiS_Pr, pSiS, crtno, 1, &buffer[0]);
+	 } while((temp) && i--);
+         if(!temp) {
+	    if((pMonitor = xf86InterpretEDID(pScrn->scrnIndex, &buffer[0]))) {
+	       return(pMonitor);
+	    } else {
+	       xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+	           "CRT%d DDC EDID corrupt\n", crtno + 1);
+	       return(NULL);
+	    }
+	 } else {
+            xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+	    	"CRT%d DDC reading failed\n", crtno + 1);
+	    return(NULL);
+	 }
+      } else {
+	 xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+	      "DDC levels 3 and 4 not supported by this driver yet.\n");
+         return(NULL);
+      }
+   }
+}
+
+static xf86MonPtr
+SiSDoPrivateDDC(ScrnInfoPtr pScrn)
+{
+    SISPtr pSiS = SISPTR(pScrn);
+
+#ifdef SISDUALHEAD
+    if((pSiS->DualHeadMode) && (!pSiS->SecondHead))
+	return(SiSInternalDDC(pScrn, 1));
+    else
+#endif
+        return(SiSInternalDDC(pScrn, 0)); 
+}
 
 /* Mandatory */
 static Bool
@@ -629,13 +1132,23 @@ SISPreInit(ScrnInfoPtr pScrn, int flags)
 {
     SISPtr pSiS;
     MessageType from;
-    int vgaIOBase;
-    unsigned char unlock;
+    unsigned char usScratchCR17, CR5F;
+    unsigned char usScratchCR32;
     unsigned long int i;
+    int temp;
     ClockRangePtr clockRanges;
     char *mod = NULL;
     const char *Sym = NULL;
     int pix24flags;
+#ifdef SISDUALHEAD
+    SISEntPtr pSiSEnt = NULL;
+#endif
+    DisplayModePtr first, p, n;
+    DisplayModePtr tempmode, delmode, mymodes;
+    unsigned char srlockReg,crlockReg;
+    unsigned char tempreg;
+    xf86MonPtr pMonitor = NULL;
+    Bool didddc2;
 
     vbeInfoPtr pVbe;
     VbeInfoBlock *vbe;
@@ -643,9 +1156,13 @@ SISPreInit(ScrnInfoPtr pScrn, int flags)
     if (flags & PROBE_DETECT) {
         if (xf86LoadSubModule(pScrn, "vbe")) {
         	int index = xf86GetEntityInfo(pScrn->entityList[0])->index;
-        	if ((pVbe = VBEExtendedInit(NULL,index,SET_BIOS_SCRATCH
-				    | RESTORE_BIOS_SCRATCH ))) {
-            	ConfiguredMonitor = vbeDoEDID(pVbe, NULL);
+		
+#if XF86_VERSION_CURRENT < XF86_VERSION_NUMERIC(4,2,99,0,0)
+	      	if((pVbe = VBEInit(NULL,index))) {
+#else
+              	if((pVbe = VBEExtendedInit(NULL,index,0))) {
+#endif
+            		ConfiguredMonitor = vbeDoEDID(pVbe, NULL);
         		vbeFree(pVbe);
         	}
     	}
@@ -656,78 +1173,166 @@ SISPreInit(ScrnInfoPtr pScrn, int flags)
      * Note: This function is only called once at server startup, and
      * not at the start of each server generation.  This means that
      * only things that are persistent across server generations can
-     * be initialised here.  xf86Screens[] is (pScrn is a pointer to one
-     * of these).  Privates allocated using xf86AllocateScrnInfoPrivateIndex()  
-     * are too, and should be used for data that must persist across
-     * server generations.
+     * be initialised here.  xf86Screens[] is the array of all screens,
+     * (pScrn is a pointer to one of these).  Privates allocated using
+     * xf86AllocateScrnInfoPrivateIndex() are too, and should be used
+     * for data that must persist across server generations.
      *
      * Per-generation data should be allocated with
      * AllocateScreenPrivateIndex() from the ScreenInit() function.
      */
 
     /* Check the number of entities, and fail if it isn't one. */
-    if (pScrn->numEntities != 1)
+    if(pScrn->numEntities != 1) {
+        xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+	    	"Number of entities is not 1\n");
         return FALSE;
+    }
 
     /* The vgahw module should be loaded here when needed */
-    if (!xf86LoadSubModule(pScrn, "vgahw"))
+    if(!xf86LoadSubModule(pScrn, "vgahw")) {
+        xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+	    	"Could not load vgahw module\n");
         return FALSE;
+    }
 
     xf86LoaderReqSymLists(vgahwSymbols, NULL);
 
-    /*
-     * Allocate a vgaHWRec
-     */
-    if (!vgaHWGetHWRec(pScrn))
-        return FALSE;
-
-    VGAHWPTR(pScrn)->MapSize = 0x10000;     /* Standard 64k VGA window */
+    xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+           "SiS driver (31/01/03-1) by "
+	   "Thomas Winischhofer <thomas@winischhofer.net>\n");
+    xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+           "See http://www.winischhofer.net/linuxsisvga.shtml "
+	   "for documentation and updates\n");	   
 
-    if (!vgaHWMapMem(pScrn))
+    /* Allocate a vgaHWRec */
+    if(!vgaHWGetHWRec(pScrn)) {
+        xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+	    	"Could not allocate VGA private\n");
         return FALSE;
-    vgaHWGetIOBase(VGAHWPTR(pScrn));
-    vgaIOBase = VGAHWPTR(pScrn)->IOBase;
+    }
 
     /* Allocate the SISRec driverPrivate */
-    if (!SISGetRec(pScrn)) {
+    if(!SISGetRec(pScrn)) {
+        xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+	    	"Could not allocate memory for pSiS private\n");
         return FALSE;
     }
     pSiS = SISPTR(pScrn);
     pSiS->pScrn = pScrn;
 
+#if XF86_VERSION_CURRENT < XF86_VERSION_NUMERIC(4,2,99,0,0)
+    pSiS->IODBase = 0;
+#else
+    pSiS->IODBase = pScrn->domainIOBase;  
+#endif
+
     /* Get the entity, and make sure it is PCI. */
     pSiS->pEnt = xf86GetEntityInfo(pScrn->entityList[0]);
-    if (pSiS->pEnt->location.type != BUS_PCI)
+    if(pSiS->pEnt->location.type != BUS_PCI)  {
+        xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+	    	"Entity's bus type is not PCI\n");
+    	SISFreeRec(pScrn);
         return FALSE;
+    }
+
+#ifdef SISDUALHEAD
+    /* TW: Allocate an entity private if necessary */
+    if(xf86IsEntityShared(pScrn->entityList[0])) {
+        pSiSEnt = xf86GetEntityPrivate(pScrn->entityList[0],
+					SISEntityIndex)->ptr;
+        pSiS->entityPrivate = pSiSEnt;
+
+	/* TW: If something went wrong, quit here */
+    	if ((pSiSEnt->DisableDual) || (pSiSEnt->ErrorAfterFirst)) {
+	        xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+	    	   "First head encountered fatal error, can't continue\n");
+		SISFreeRec(pScrn);
+		return FALSE;
+	}
+    }
+#endif
 
     /* Find the PCI info for this screen */
     pSiS->PciInfo = xf86GetPciInfoForEntity(pSiS->pEnt->index);
-    pSiS->PciTag = pciTag(pSiS->PciInfo->bus, pSiS->PciInfo->device,
-              pSiS->PciInfo->func);
+    pSiS->PciTag = pSiS->sishw_ext.PciTag = pciTag(pSiS->PciInfo->bus,
+                           pSiS->PciInfo->device, pSiS->PciInfo->func);
 
-    /*
-     * XXX This could be refined if some VGA memory resources are not
-     * decoded in operating mode.
+    pSiS->Primary = xf86IsPrimaryPci(pSiS->PciInfo);
+    xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+    	"This adapter is %s display adapter\n",
+	(pSiS->Primary ? "primary" : "secondary"));
+
+    if(pSiS->Primary) {
+       VGAHWPTR(pScrn)->MapSize = 0x10000;     /* Standard 64k VGA window */
+       if(!vgaHWMapMem(pScrn)) {
+          xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+	    	"Could not map VGA memory\n");
+          SISFreeRec(pScrn);
+          return FALSE;
+       }
+    }
+    vgaHWGetIOBase(VGAHWPTR(pScrn));
+
+    /* TW: We "patch" the PIOOffset inside vgaHW in order to force
+     *     the vgaHW module to use our relocated i/o ports.
      */
+    VGAHWPTR(pScrn)->PIOOffset = pSiS->IODBase + (pSiS->PciInfo->ioBase[2] & 0xFFFC) - 0x380;
+
+    pSiS->pInt = NULL;
+    if(!pSiS->Primary) {
+#if !defined(__alpha__)
+       xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+       		"Initializing display adapter through int10\n");
+#endif
+       if(xf86LoadSubModule(pScrn, "int10")) {
+          xf86LoaderReqSymLists(int10Symbols, NULL);
+#if !defined(__alpha__)
+          pSiS->pInt = xf86InitInt10(pSiS->pEnt->index);
+#endif
+       } else {
+          xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+	    	"Could not load int10 module\n");
+       }
+    }
+
+#if XF86_VERSION_CURRENT < XF86_VERSION_NUMERIC(4,2,99,0,0)
+    {
+        resRange vgamem[] = {   {ResShrMemBlock,0xA0000,0xAFFFF},
+                                {ResShrMemBlock,0xB0000,0xB7FFF},
+                                {ResShrMemBlock,0xB8000,0xBFFFF},
+                            _END };
+        xf86SetOperatingState(vgamem, pSiS->pEnt->index, ResUnusedOpr);
+    }
+#else
     xf86SetOperatingState(resVgaMem, pSiS->pEnt->index, ResUnusedOpr);
+#endif
 
     /* Operations for which memory access is required */
     pScrn->racMemFlags = RAC_FB | RAC_COLORMAP | RAC_CURSOR | RAC_VIEWPORT;
-    /* Operations for which I/O access is required (XXX check this) */
+    /* Operations for which I/O access is required */
     pScrn->racIoFlags = RAC_COLORMAP | RAC_CURSOR | RAC_VIEWPORT;
 
     /* The ramdac module should be loaded here when needed */
-    if (!xf86LoadSubModule(pScrn, "ramdac"))
+    if(!xf86LoadSubModule(pScrn, "ramdac")) {
+        xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+	    	"Could not load ramdac module\n");
+#ifdef SISDUALHEAD
+        if(pSiSEnt) pSiSEnt->ErrorAfterFirst = TRUE;
+#endif
+	if(pSiS->pInt) xf86FreeInt10(pSiS->pInt);
+        SISFreeRec(pScrn);
         return FALSE;
+    }
 
     xf86LoaderReqSymLists(ramdacSymbols, NULL);
 
-    /* sisSet pScrn->monitor */
+    /* Set pScrn->monitor */
     pScrn->monitor = pScrn->confScreen->monitor;
 
     /*
      * Set the Chipset and ChipRev, allowing config file entries to
-     * override.
+     * override. DANGEROUS!
      */
     if (pSiS->pEnt->device->chipset && *pSiS->pEnt->device->chipset)  {
         pScrn->chipset = pSiS->pEnt->device->chipset;
@@ -752,6 +1357,34 @@ SISPreInit(ScrnInfoPtr pScrn, int flags)
     } else {
         pSiS->ChipRev = pSiS->PciInfo->chipRev;
     }
+    pSiS->sishw_ext.jChipRevision = pSiS->ChipRev;
+
+    /* TW: Determine SiS6326 chiprevision. This is not yet used for
+     * anything, but it will as soon as I found out on which revisions
+     * the hardware video overlay really works.
+     * According to SiS the only differences are:
+     * Chip name     Chip type      TV-Out       MPEG II decoder
+     * 6326 AGP      Rev. G0/H0     no           no
+     * 6326 DVD      Rev. D2        yes          yes
+     * 6326          Rev. Cx        yes          yes
+     */
+    pSiS->SiS6326Flags = 0;
+    if(pSiS->Chipset == PCI_CHIP_SIS6326) {
+        xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+		"Chipset is SiS6326 %s (revision 0x%02x)\n",
+		(pSiS->ChipRev == 0xaf) ? "(Ax)" :
+		   ((pSiS->ChipRev == 0x0a) ? "AGP (G0)" :
+		      ((pSiS->ChipRev == 0x0b) ? "AGP (H0)" :
+		          (((pSiS->ChipRev & 0xf0) == 0xd0) ? "DVD (Dx)" :
+   			      (((pSiS->ChipRev & 0xf0) == 0x90) ? "(9x)" :
+			          (((pSiS->ChipRev & 0xf0) == 0xc0) ? "(Cx)" :
+				       "(unknown)"))))),
+		pSiS->ChipRev);
+	if((pSiS->ChipRev != 0x0a) && (pSiS->ChipRev != 0x0b)) {
+		pSiS->SiS6326Flags |= SIS6326_HASTV;
+	}
+    }
+
 
     /*
      * This shouldn't happen because such problems should be caught in
@@ -760,96 +1393,453 @@ SISPreInit(ScrnInfoPtr pScrn, int flags)
     if (pScrn->chipset == NULL) {
         xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
                    "ChipID 0x%04X is not recognised\n", pSiS->Chipset);
+#ifdef SISDUALHEAD
+        if (pSiSEnt) pSiSEnt->ErrorAfterFirst = TRUE;
+#endif
+	if(pSiS->pInt) xf86FreeInt10(pSiS->pInt);
+        SISFreeRec(pScrn);
         return FALSE;
     }
     if (pSiS->Chipset < 0) {
         xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
                    "Chipset \"%s\" is not recognised\n", pScrn->chipset);
+#ifdef SISDUALHEAD
+        if (pSiSEnt) pSiSEnt->ErrorAfterFirst = TRUE;
+#endif
+	if(pSiS->pInt) xf86FreeInt10(pSiS->pInt);
+        SISFreeRec(pScrn);
         return FALSE;
     }
 
+    /* TW: Determine chipset and VGA engine type for new mode switching code */
+    switch(pSiS->Chipset) {
+	case PCI_CHIP_SIS300:
+		pSiS->sishw_ext.jChipType = SIS_300;
+		pSiS->VGAEngine = SIS_300_VGA;
+		break;
+	case PCI_CHIP_SIS630: /* 630 + 730 */
+		pSiS->sishw_ext.jChipType = SIS_630;
+		if(pciReadLong(0x00000000, 0x00) == 0x07301039) {
+			pSiS->sishw_ext.jChipType = SIS_730;
+		}
+		pSiS->VGAEngine = SIS_300_VGA;
+		break;
+	case PCI_CHIP_SIS540:
+		pSiS->sishw_ext.jChipType = SIS_540;
+		pSiS->VGAEngine = SIS_300_VGA;
+		break;
+	case PCI_CHIP_SIS315H:
+		pSiS->sishw_ext.jChipType = SIS_315H;
+		pSiS->VGAEngine = SIS_315_VGA;
+		break;
+	case PCI_CHIP_SIS315:
+		/* TW: Override for simplicity */
+	        pSiS->Chipset = PCI_CHIP_SIS315H;
+		pSiS->sishw_ext.jChipType = SIS_315;
+		pSiS->VGAEngine = SIS_315_VGA;
+		break;
+	case PCI_CHIP_SIS315PRO:
+		/* TW: Override for simplicity */
+		pSiS->Chipset = PCI_CHIP_SIS315H;
+		pSiS->sishw_ext.jChipType = SIS_315PRO;
+		pSiS->VGAEngine = SIS_315_VGA;
+		break;
+	case PCI_CHIP_SIS550:
+		pSiS->sishw_ext.jChipType = SIS_550;
+		pSiS->VGAEngine = SIS_315_VGA;
+		break;
+	case PCI_CHIP_SIS650: /* 650 + 740 */
+		pSiS->sishw_ext.jChipType = SIS_650;
+		pSiS->VGAEngine = SIS_315_VGA;
+		break;
+	case PCI_CHIP_SIS330:
+		pSiS->sishw_ext.jChipType = SIS_330;
+		pSiS->VGAEngine = SIS_315_VGA;  
+		break;
+	case PCI_CHIP_SIS530:
+		pSiS->sishw_ext.jChipType = SIS_530;
+		pSiS->VGAEngine = SIS_530_VGA;
+		break;
+	default:
+		pSiS->sishw_ext.jChipType = SIS_OLD;
+		pSiS->VGAEngine = SIS_OLD_VGA;
+		break;
+    }
+
+    /* TW: Now check if sisfb is loaded. Since sisfb only supports
+     * the 300 and 310/325 series, we only do this for these chips.
+     * We use this for checking where sisfb starts its memory
+     * heap in order to automatically detect the correct MaxXFBMem
+     * setting (which normally is given by the option of the same name).
+     * That only works if sisfb is completely running, ie with
+     * a video mode (because the fbdev will not be installed otherwise.)
+     */
+
+    pSiS->donttrustpdc = FALSE;
+    pSiS->sisfbpdc = 0;
+
+    if(pSiS->VGAEngine == SIS_300_VGA || pSiS->VGAEngine == SIS_315_VGA) {
+
+       int fd, i;
+       sisfb_info mysisfbinfo;
+       BOOL found = FALSE;
+       char name[10];
+
+       i=0;
+       do {
+         sprintf(name, "/dev/fb%1d", i);
+         if((fd = open(name, 'r'))) {
+
+	   if(!ioctl(fd, SISFB_GET_INFO, &mysisfbinfo)) {
+
+	      if(mysisfbinfo.sisfb_id == SISFB_ID) {
+
+	         if((mysisfbinfo.sisfb_version >= 1) &&
+		    (mysisfbinfo.sisfb_revision >=5) &&
+  		    (mysisfbinfo.sisfb_patchlevel >= 8)) {
+		    /* TW: Added PCI bus/slot/func into in sisfb Version 1.5.08.
+		           Check this to make sure we run on the same card as sisfb
+		     */
+		    if((mysisfbinfo.sisfb_pcibus == pSiS->PciInfo->bus) &&
+		       (mysisfbinfo.sisfb_pcislot == pSiS->PciInfo->device) &&
+		       (mysisfbinfo.sisfb_pcifunc == pSiS->PciInfo->func) ) {
+	         	found = TRUE;
+		    }
+		 } else found = TRUE;
+
+		 if(found) {
+		   xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+	      	     "%s: SiS kernel fb driver (sisfb) %d.%d.%d detected (PCI: %02d:%02d.%d)\n",
+		     &name[5],
+		     mysisfbinfo.sisfb_version,
+		     mysisfbinfo.sisfb_revision,
+		     mysisfbinfo.sisfb_patchlevel,
+		     pSiS->PciInfo->bus,
+		     pSiS->PciInfo->device,
+		     pSiS->PciInfo->func);
+		   /* TW: Added version/rev/pl in sisfb 1.4.0 */
+		   if(mysisfbinfo.sisfb_version == 0) {
+		     xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+		        "Old version of sisfb found. Please update\n");
+		   }
+		   pSiS->sisfbMem = mysisfbinfo.heapstart;
+		   /* TW: Basically, we can't trust the pdc register if sisfb is loaded */
+		   pSiS->donttrustpdc = TRUE;
+		   xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+		      "sisfb: memory heap starts at %dKB\n", pSiS->sisfbMem);
+		   xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+		      "sisfb: using video mode 0x%02x\n", mysisfbinfo.fbvidmode);
+		   if((mysisfbinfo.sisfb_version >= 1) &&
+		      (mysisfbinfo.sisfb_revision >=5) &&
+  		      (mysisfbinfo.sisfb_patchlevel >= 6)) {
+		     xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+		        "sisfb: %sreserved hardware cursor, using %s command queue\n",
+			(mysisfbinfo.sisfb_caps & 0x80) ? "" : "not ",
+			(mysisfbinfo.sisfb_caps & 0x40) ? "SiS300 series Turbo" :
+			   (mysisfbinfo.sisfb_caps & 0x20) ? "SiS310/325 series AGP" :
+			      (mysisfbinfo.sisfb_caps & 0x10) ? "SiS310/325 series VRAM" :
+			         (mysisfbinfo.sisfb_caps & 0x08) ? "SiS310/325 series MMIO" :
+				    "no");
+		   }
+		   if((mysisfbinfo.sisfb_version >= 1) &&
+		      (mysisfbinfo.sisfb_revision >=5) &&
+  		      (mysisfbinfo.sisfb_patchlevel >= 10)) {
+		      /* TW: We can trust the pdc value if sisfb is of recent version */
+		      pSiS->donttrustpdc = FALSE;
+		      if(mysisfbinfo.sisfb_patchlevel >= 11) {
+		      	 pSiS->sisfbpdc = mysisfbinfo.sisfb_lcdpdc;
+		      }
+		   }
+		 }
+	      }
+	   }
+	   close (fd);
+         }
+	 i++;
+
+       } while((i <= 7) && (!found));
+    }
 
     /*
      * The first thing we should figure out is the depth, bpp, etc.
-     * Our default depth is 8, so pass it to the helper function.
-     * Our preference for depth 24 is 24bpp, so tell it that too.
+     * TW: Additionally, determine the size of the HWCursor memory
+     * area.
      */
-    switch (pSiS->Chipset) {
-	case PCI_CHIP_SIS530:
-	    pix24flags = Support32bppFb | Support24bppFb |
-		SupportConvert24to32 | SupportConvert32to24;
-	    break;
-	case PCI_CHIP_SIS300:
-	case PCI_CHIP_SIS630:
-	case PCI_CHIP_SIS540:
-	    pix24flags = Support32bppFb | SupportConvert24to32;
-	    break;
-	default:
-	    pix24flags = Support24bppFb |
-		SupportConvert32to24 | PreferConvert32to24;
-	    break;
+    switch (pSiS->VGAEngine) {
+      case SIS_300_VGA:
+        pSiS->CursorSize = 4096;
+    	pix24flags = Support32bppFb |
+	             SupportConvert24to32;
+	break;
+      case SIS_315_VGA:
+        pSiS->CursorSize = 16384;
+    	pix24flags = Support32bppFb |
+	             SupportConvert24to32;
+	break;
+      case SIS_530_VGA:
+        pSiS->CursorSize = 2048;
+    	pix24flags = Support32bppFb |
+	             Support24bppFb |
+                     SupportConvert24to32 |
+		     SupportConvert32to24;
+        break;
+      default:
+        pSiS->CursorSize = 2048;
+        pix24flags = Support24bppFb |
+	             SupportConvert32to24 |
+	             PreferConvert32to24;
+	break;
     }
 
-    if (!xf86SetDepthBpp(pScrn, 8, 8, 8, pix24flags))
+#ifdef SISDUALHEAD
+    /* TW: In case of Dual Head, we need to determine if we are the "master" head or
+     *     the "slave" head. In order to do that, we set PrimInit to DONE in the
+     *     shared entity at the end of the first initialization. The second
+     *     initialization then knows that some things have already been done. THIS
+     *     ALWAYS ASSUMES THAT THE FIRST DEVICE INITIALIZED IS THE MASTER!
+     */
+
+    if(xf86IsEntityShared(pScrn->entityList[0])) {
+      if(pSiSEnt->lastInstance > 0) {
+     	if(!xf86IsPrimInitDone(pScrn->entityList[0])) {
+		/* First Head (always CRT2) */
+		pSiS->SecondHead = FALSE;
+		pSiSEnt->pScrn_1 = pScrn;
+		pSiSEnt->CRT1ModeNo = pSiSEnt->CRT2ModeNo = -1;
+		pSiS->DualHeadMode = TRUE;
+		pSiSEnt->DisableDual = FALSE;
+		pSiSEnt->BIOS = NULL;
+		pSiSEnt->SiS_Pr = NULL;
+	} else {
+		/* Second Head (always CRT1) */
+		pSiS->SecondHead = TRUE;
+		pSiSEnt->pScrn_2 = pScrn;
+		pSiS->DualHeadMode = TRUE;
+	}
+      } else {
+        /* TW: Only one screen in config file - disable dual head mode */
+        pSiS->SecondHead = FALSE;
+	pSiS->DualHeadMode = FALSE;
+	pSiSEnt->DisableDual = TRUE;
+      }
+    } else {
+        /* TW: Entity is not shared - disable dual head mode */
+        pSiS->SecondHead = FALSE;
+	pSiS->DualHeadMode = FALSE;
+    }
+#endif
+
+    pSiS->ForceCursorOff = FALSE;
+
+    /* TW: Allocate SiS_Private (for mode switching code) and initialize it */
+    pSiS->SiS_Pr = NULL;
+#ifdef SISDUALHEAD
+    if(pSiSEnt) {
+       if(pSiSEnt->SiS_Pr) pSiS->SiS_Pr = pSiSEnt->SiS_Pr;
+    }
+#endif
+    if(!pSiS->SiS_Pr) {
+       if(!(pSiS->SiS_Pr = xnfcalloc(sizeof(SiS_Private), 1))) {
+           xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+	    	"Could not allocate memory for SiS_Pr private\n");
+#ifdef SISDUALHEAD
+	   if(pSiSEnt) pSiSEnt->ErrorAfterFirst = TRUE;
+#endif
+	   if(pSiS->pInt) xf86FreeInt10(pSiS->pInt);
+	   SISFreeRec(pScrn);
+           return FALSE;
+       }
+#ifdef SISDUALHEAD
+       if(pSiSEnt) pSiSEnt->SiS_Pr = pSiS->SiS_Pr;
+#endif
+       memset(pSiS->SiS_Pr, 0, sizeof(SiS_Private));
+    }
+    pSiS->SiS_Pr->SiS_Backup70xx = 0xff;
+    pSiS->SiS_Pr->SiS_CHOverScan = -1;
+    pSiS->SiS_Pr->SiS_ChSW = FALSE;
+    pSiS->SiS_Pr->CRT1UsesCustomMode = FALSE;
+
+    /* TW: Get our relocated IO registers */
+    pSiS->RelIO = (pSiS->PciInfo->ioBase[2] & 0xFFFC) + pSiS->IODBase;
+    pSiS->sishw_ext.ulIOAddress = pSiS->RelIO + 0x30;
+    xf86DrvMsg(pScrn->scrnIndex, from, "Relocated IO registers at 0x%lX\n",
+           (unsigned long)pSiS->RelIO);
+
+    /* TW: Initialize SiS Port Reg definitions for externally used
+     *     BIOS emulation (init.c/init301.c) functions.
+     */
+    SiSRegInit(pSiS->SiS_Pr, pSiS->RelIO + 0x30);
+
+    /* TW: The following identifies the old chipsets. This is only
+     *     partly used since the really old chips are not supported,
+     *     but I keep it here for future use.
+     */
+    if(pSiS->VGAEngine == SIS_OLD_VGA || pSiS->VGAEngine == SIS_530_VGA) {
+       switch(pSiS->Chipset) {
+       case PCI_CHIP_SG86C205:    /* Just for making it complete */
+          {
+	  unsigned char temp;
+	  sisSaveUnlockExtRegisterLock(pSiS, &srlockReg, &crlockReg);
+	  inSISIDXREG(SISSR, 0x10, temp);
+	  if(temp & 0x80) pSiS->oldChipset = OC_SIS6205B;
+	  else pSiS->oldChipset = (pSiS->ChipRev == 0x11) ?
+	  		OC_SIS6205C : OC_SIS6205A;
+          break;
+	  }
+       case PCI_CHIP_SIS82C204:   /* Just for making it complete */
+       	  pSiS->oldChipset = OC_SIS82204; break;
+       case 0x6225:		  /* Just for making it complete */
+          pSiS->oldChipset = OC_SIS6225; break;
+       case PCI_CHIP_SIS5597:
+          pSiS->oldChipset = OC_SIS5597; break;
+       case PCI_CHIP_SIS6326:
+          pSiS->oldChipset = OC_SIS6326; break;
+       case PCI_CHIP_SIS530:
+          if((pSiS->ChipRev & 0x0f) < 0x0a)
+	  	pSiS->oldChipset = OC_SIS530A;
+	  else  pSiS->oldChipset = OC_SIS530B;
+	  break;
+       default:
+          pSiS->oldChipset = OC_UNKNOWN;
+       }
+    }
+
+    if(!xf86SetDepthBpp(pScrn, 8, 8, 8, pix24flags)) {
+        xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+	    	"xf86SetDepthBpp() error\n");
+#ifdef SISDUALHEAD
+        if(pSiSEnt) pSiSEnt->ErrorAfterFirst = TRUE;
+#endif
+	if(pSiS->pInt) xf86FreeInt10(pSiS->pInt);
+        SISFreeRec(pScrn);
     	return FALSE;
+    }
 
     /* Check that the returned depth is one we support */
-    switch (pScrn->depth) {
-    case 8:
-    case 15:
-    case 16:
-    case 24:
-        /* OK */
+    temp = 0;
+    switch(pScrn->depth) {
+      case 8:
+      case 16:
+      case 24:
         break;
-    default:
+      case 15:
+	 if((pSiS->VGAEngine == SIS_300_VGA) ||
+	    (pSiS->VGAEngine == SIS_315_VGA))
+		temp = 1;
+         break;
+      default:
+	 temp = 1;
+    }
+
+    if(temp) {
         xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-               "Given depth (%d) is not supported by this driver\n",
+               "Given depth (%d) is not supported by this driver/chipset\n",
                pScrn->depth);
+	if(pSiS->pInt) xf86FreeInt10(pSiS->pInt);
+	SISFreeRec(pScrn);
         return FALSE;
     }
 
     xf86PrintDepthBpp(pScrn);
 
     /* Get the depth24 pixmap format */
-    if (pScrn->depth == 24 && pix24bpp == 0)
+    if(pScrn->depth == 24 && pix24bpp == 0)
         pix24bpp = xf86GetBppFromDepth(pScrn, 24);
 
     /*
      * This must happen after pScrn->display has been set because
      * xf86SetWeight references it.
      */
-    if (pScrn->depth > 8) {
+    if(pScrn->depth > 8) {
         /* The defaults are OK for us */
         rgb zeros = {0, 0, 0};
 
-        if (!xf86SetWeight(pScrn, zeros, zeros)) {
+        if(!xf86SetWeight(pScrn, zeros, zeros)) {
+	    xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+	    	"xf86SetWeight() error\n");
+#ifdef SISDUALHEAD
+	    if(pSiSEnt) pSiSEnt->ErrorAfterFirst = TRUE;
+#endif
+	    if(pSiS->pInt) xf86FreeInt10(pSiS->pInt);
+	    SISFreeRec(pScrn);
             return FALSE;
         } else {
-            /* XXX check that weight returned is supported */
-                ;
+           Bool ret = FALSE;
+           switch(pScrn->depth) {
+	   case 15:
+	      if((pScrn->weight.red != 5) ||
+	         (pScrn->weight.green != 5) ||
+		 (pScrn->weight.blue != 5)) ret = TRUE;
+	      break;
+	   case 16:
+	      if((pScrn->weight.red != 5) ||
+	         (pScrn->weight.green != 6) ||
+		 (pScrn->weight.blue != 5)) ret = TRUE;
+	      break;
+	   case 24:
+	      if((pScrn->weight.red != 8) ||
+	         (pScrn->weight.green != 8) ||
+		 (pScrn->weight.blue != 8)) ret = TRUE;
+	      break;
+           }
+	   if(ret) {
+	      xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+	      	"RGB Weight %d%d%d at depth %d not supported by hardware\n",
+		pScrn->weight.red, pScrn->weight.green,
+		pScrn->weight.blue, pScrn->depth);
+#ifdef SISDUALHEAD
+	      if(pSiSEnt) pSiSEnt->ErrorAfterFirst = TRUE;
+#endif
+	      if(pSiS->pInt) xf86FreeInt10(pSiS->pInt);
+	      SISFreeRec(pScrn);
+              return FALSE;
+	   }
         }
     }
 
-    if (!xf86SetDefaultVisual(pScrn, -1)) {
+    /* TW: Set the current layout parameters */
+    pSiS->CurrentLayout.bitsPerPixel = pScrn->bitsPerPixel;
+    pSiS->CurrentLayout.depth        = pScrn->depth;
+    /* (Inside this function, we can use pScrn's contents anyway) */
+
+    if(!xf86SetDefaultVisual(pScrn, -1)) {
+        xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+	    	"xf86SetDefaultVisual() error\n");
+#ifdef SISDUALHEAD
+	if (pSiSEnt) pSiSEnt->ErrorAfterFirst = TRUE;
+#endif
+	if(pSiS->pInt) xf86FreeInt10(pSiS->pInt);
+        SISFreeRec(pScrn);
         return FALSE;
     } else {
-        /* We don't currently support DirectColor at > 8bpp */
+        /* We don't support DirectColor at > 8bpp */
         if (pScrn->depth > 8 && pScrn->defaultVisual != TrueColor) {
-            xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Given default visual"
-                        " (%s) is not supported at depth %d\n",
+            xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Given default visual "
+                        "(%s) is not supported at depth %d\n",
                         xf86GetVisualName(pScrn->defaultVisual), pScrn->depth);
+#ifdef SISDUALHEAD
+	    if (pSiSEnt) pSiSEnt->ErrorAfterFirst = TRUE;
+#endif
+	    if(pSiS->pInt) xf86FreeInt10(pSiS->pInt);
+	    SISFreeRec(pScrn);
             return FALSE;
         }
     }
 
     /*
-     * The new cmap layer needs this to be initialised.
+     * The cmap layer needs this to be initialised.
      */
-
     {
         Gamma zeros = {0.0, 0.0, 0.0};
 
-        if (!xf86SetGamma(pScrn, zeros)) {
+        if(!xf86SetGamma(pScrn, zeros)) {
+	    xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+	    	"xf86SetGamma() error\n");
+#ifdef SISDUALHEAD
+	    if(pSiSEnt) pSiSEnt->ErrorAfterFirst = TRUE;
+#endif
+	    if(pSiS->pInt) xf86FreeInt10(pSiS->pInt);
+	    SISFreeRec(pScrn);
             return FALSE;
         }
     }
@@ -858,29 +1848,422 @@ SISPreInit(ScrnInfoPtr pScrn, int flags)
     pScrn->progClock = TRUE;
 
     /* Set the bits per RGB for 8bpp mode */
-    if (pScrn->depth == 8) {
+    if(pScrn->depth == 8) {
         pScrn->rgbBits = 6;
     }
 
-    pSiS->ddc1Read = SiSddc1Read;   /* this cap will be modified */
+    pSiS->ddc1Read = SiSddc1Read;
 
     from = X_DEFAULT;
 
-    outb(VGA_SEQ_INDEX, 0x05); unlock = inb(VGA_SEQ_DATA);
-    outw(VGA_SEQ_INDEX, 0x8605); /* Unlock registers */
+    /* Unlock registers */
+    sisSaveUnlockExtRegisterLock(pSiS, &srlockReg, &crlockReg);
+
+    /* TW: We need no backup area (300/310/325 new mode switching code) */
+    pSiS->sishw_ext.pSR = NULL;
+    pSiS->sishw_ext.pCR = NULL;
+
+    /* TW: Read BIOS for 300 and 310/325 series customization */
+    pSiS->sishw_ext.pjVirtualRomBase = NULL;
+    pSiS->BIOS = NULL;
+    pSiS->sishw_ext.UseROM = FALSE;
+
+    if((pSiS->VGAEngine == SIS_300_VGA) || (pSiS->VGAEngine == SIS_315_VGA)) {
+#ifdef SISDUALHEAD
+      if(pSiSEnt) {
+          if(pSiSEnt->BIOS)  {
+	  	pSiS->BIOS = pSiSEnt->BIOS;
+		pSiS->sishw_ext.pjVirtualRomBase = pSiS->BIOS;
+          }
+      }
+#endif
+      if(!pSiS->BIOS) {
+          if(!(pSiS->BIOS = xcalloc(1, BIOS_SIZE))) {
+             xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+		"Could not allocate memory for video BIOS image\n");
+          } else {
+	     unsigned long  segstart;
+             unsigned short romptr;
+	     BOOLEAN found;
+             int  i;
+             static const char sis_rom_sig[] = "Silicon Integrated Systems";
+             static const char *sis_sig[10] = {
+                  "300", "540", "630", "730",
+		  "315", "315", "315", "5315", "6325",
+		  "Xabre"
+             };
+	     static const unsigned short sis_nums[10] = {
+	          SIS_300, SIS_540, SIS_630, SIS_730,
+		  SIS_315PRO, SIS_315H, SIS_315, SIS_550, SIS_650,
+		  SIS_330
+	     };
+
+	     found = FALSE;
+             for(segstart=BIOS_BASE; segstart<0x000f0000; segstart+=0x00001000) {
+
+#if XF86_VERSION_CURRENT < XF86_VERSION_NUMERIC(4,2,99,0,0)
+                if(xf86ReadBIOS(segstart, 0, pSiS->BIOS, BIOS_SIZE) != BIOS_SIZE) continue;
+#else
+                if(xf86ReadDomainMemory(pSiS->PciTag, segstart, BIOS_SIZE, pSiS->BIOS) != BIOS_SIZE) continue;
+#endif
 
-    /* get VBIOS image */
-    if (!(pSiS->BIOS=xcalloc(1, BIOS_SIZE)))  {
-        ErrorF("Allocate memory fail !!\n");
-        return FALSE;
-    }
-    if (xf86ReadDomainMemory(pSiS->PciTag, BIOS_BASE, BIOS_SIZE, pSiS->BIOS) != BIOS_SIZE)  {
-        xfree(pSiS->BIOS);
-        ErrorF("Read VBIOS image fail !!\n");
-        return FALSE;
+		if((pSiS->BIOS[0] != 0x55) || (pSiS->BIOS[1] != 0xaa)) continue;
+
+		romptr = pSiS->BIOS[0x12] | (pSiS->BIOS[0x13] << 8);
+		if(romptr > (BIOS_SIZE - strlen(sis_rom_sig))) continue;
+                if(strncmp(sis_rom_sig, (char *)&pSiS->BIOS[romptr], strlen(sis_rom_sig)) != 0) continue;
+
+		romptr = pSiS->BIOS[0x14] | (pSiS->BIOS[0x15] << 8);
+		if(romptr > (BIOS_SIZE - 5)) continue;
+		for(i = 0; (i < 10) && (!found); i++) {
+                    if(strncmp(sis_sig[i], (char *)&pSiS->BIOS[romptr], strlen(sis_sig[i])) == 0) {
+                        if(sis_nums[i] == pSiS->sishw_ext.jChipType) {
+			   found = TRUE;
+                           break;
+			} else {
+			   xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+			   	"Ignoring BIOS for SiS %s at %p\n", sis_sig[i], segstart);
+			}
+                    }
+                }
+		if(found) break;
+             }
+
+	     if(!found) {
+	     	xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+		         "Could not find/read video BIOS\n");
+ 	   	xfree(pSiS->BIOS);
+	        pSiS->BIOS = NULL;
+             } else {
+#ifdef SISDUALHEAD
+                if(pSiSEnt)  pSiSEnt->BIOS = pSiS->BIOS;
+#endif
+                pSiS->sishw_ext.pjVirtualRomBase = pSiS->BIOS;
+		romptr = pSiS->BIOS[0x16] | (pSiS->BIOS[0x17] << 8);
+		xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+			"Video BIOS version \"%7s\" found at %p\n",
+			&pSiS->BIOS[romptr], segstart);
+             }
+	     
+          }
+      }
+      if(pSiS->BIOS) pSiS->sishw_ext.UseROM = TRUE;
+      else           pSiS->sishw_ext.UseROM = FALSE;
     }
 
+    /* Evaluate options */
     SiSOptions(pScrn);
+
+#ifdef SISDUALHEAD
+    if(pSiS->DualHeadMode) {
+        if(!pSiS->SecondHead) {
+	     /* TW: Copy some option settings to entity private */
+             pSiSEnt->HWCursor = pSiS->HWCursor;
+	     pSiSEnt->ForceCRT2Type = pSiS->ForceCRT2Type;
+	     pSiSEnt->ForceTVType = pSiS->ForceTVType;
+	     pSiSEnt->TurboQueue = pSiS->TurboQueue;
+	     pSiSEnt->PDC = pSiS->PDC;
+	     pSiSEnt->OptTVStand = pSiS->OptTVStand;
+	     pSiSEnt->NonDefaultPAL = pSiS->NonDefaultPAL;
+	     pSiSEnt->OptTVOver = pSiS->OptTVOver;
+	     pSiSEnt->OptTVSOver = pSiS->OptTVSOver;
+	     pSiSEnt->OptROMUsage = pSiS->OptROMUsage;
+	     pSiSEnt->DSTN = pSiS->DSTN;
+	     pSiSEnt->XvOnCRT2 = pSiS->XvOnCRT2;
+	     pSiSEnt->NoAccel = pSiS->NoAccel;
+	     pSiSEnt->NoXvideo = pSiS->NoXvideo;
+	     pSiSEnt->forceCRT1 = pSiS->forceCRT1;
+	     pSiSEnt->chtvlumabandwidthcvbs = pSiS->chtvlumabandwidthcvbs;
+	     pSiSEnt->chtvlumabandwidthsvideo = pSiS->chtvlumabandwidthsvideo;
+	     pSiSEnt->chtvlumaflickerfilter = pSiS->chtvlumaflickerfilter;
+	     pSiSEnt->chtvchromabandwidth = pSiS->chtvchromabandwidth;
+	     pSiSEnt->chtvchromaflickerfilter = pSiS->chtvchromaflickerfilter;
+	     pSiSEnt->chtvtextenhance = pSiS->chtvtextenhance;
+	     pSiSEnt->chtvcontrast = pSiS->chtvcontrast;
+	     pSiSEnt->chtvcvbscolor = pSiS->chtvcvbscolor;
+	     pSiSEnt->sistvedgeenhance = pSiS->sistvedgeenhance;
+	     pSiSEnt->sistvantiflicker = pSiS->sistvantiflicker;
+	     pSiSEnt->sistvsaturation = pSiS->sistvsaturation;
+	     pSiSEnt->tvxpos = pSiS->tvxpos;
+	     pSiSEnt->tvypos = pSiS->tvypos;
+	     pSiSEnt->restorebyset = pSiS->restorebyset;
+	} else {
+	     /* We always use same cursor type on both screens */
+	     if(pSiS->HWCursor != pSiSEnt->HWCursor) {
+	          pSiS->HWCursor = pSiSEnt->HWCursor;
+		  xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+		  	"Ignoring inconsistent HWCursor setting\n");
+	          xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
+		  	"Master head ruled: HWCursor shall be %s\n",
+			pSiS->HWCursor ? "enabled" : "disabled");
+	     }
+	     /* We need to use identical CRT2 Type setting */
+	     if(pSiS->ForceCRT2Type != pSiSEnt->ForceCRT2Type) {
+                  if(pSiS->ForceCRT2Type != CRT2_DEFAULT) {
+		     xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
+		  	"Ignoring inconsistent ForceCRT2Type setting. Master head rules\n");
+	          }
+	          pSiS->ForceCRT2Type = pSiSEnt->ForceCRT2Type;
+	     }
+	     if(pSiS->ForceTVType != pSiSEnt->ForceTVType) {
+                  if(pSiS->ForceTVType != -1) {
+		     xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
+		  	"Ignoring inconsistent ForceTVType setting. Master head rules\n");
+	          }
+	          pSiS->ForceTVType = pSiSEnt->ForceTVType;
+	     }
+	     /* We need identical TurboQueue setting */
+	     if(pSiS->TurboQueue != pSiSEnt->TurboQueue) {
+	          pSiS->TurboQueue = pSiSEnt->TurboQueue;
+		  xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+		  	"Ignoring inconsistent TurboQueue setting\n");
+	          xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
+		        "Master head ruled: Turboqueue shall be %s\n",
+			pSiS->TurboQueue ? "enabled" : "disabled");
+	     }
+	     /* We need identical PDC setting */
+	     if(pSiS->PDC != pSiSEnt->PDC) {
+	          pSiS->PDC = pSiSEnt->PDC;
+		  xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+		  	"Ignoring inconsistent PanelDelayCompensation setting\n");
+	          xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
+		        "Master head ruled: PanelDelayCompensation shall be %d%s\n",
+			pSiS->PDC,
+			(pSiS->PDC == -1) ? " (autodetected)" : "");
+	     }
+	     /* We need identical TVStandard setting */
+	     if( (pSiS->OptTVStand != pSiSEnt->OptTVStand) || 
+	         (pSiS->NonDefaultPAL != pSiSEnt->NonDefaultPAL) ) {
+                  if(pSiS->OptTVStand != -1) {
+		     xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+		  	"Ignoring inconsistent TVStandard setting\n");
+	             xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
+		        "Master head ruled: TVStandard shall be %s\n",
+			(pSiSEnt->OptTVStand ? 
+		          ( (pSiSEnt->NonDefaultPAL == -1) ? "PAL" : 
+			      ((pSiSEnt->NonDefaultPAL) ? "PALM" : "PALN") )
+				           : "NTSC"));
+	          }
+	          pSiS->OptTVStand = pSiSEnt->OptTVStand;
+		  pSiS->NonDefaultPAL = pSiSEnt->NonDefaultPAL;
+	     }
+	     /* We need identical UseROMData setting */
+	     if(pSiS->OptROMUsage != pSiSEnt->OptROMUsage) {
+                  if(pSiS->OptROMUsage != -1) {
+		     xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+		  	"Ignoring inconsistent UseROMData setting\n");
+	             xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
+		        "Master head ruled: Video ROM data usage shall be %s\n",
+			pSiSEnt->OptROMUsage ? "enabled" : "disabled");
+	          }
+	          pSiS->OptROMUsage = pSiSEnt->OptROMUsage;
+	     }
+	     /* We need identical DSTN setting */
+	     if(pSiS->DSTN != pSiSEnt->DSTN) {
+	          pSiS->DSTN = pSiSEnt->DSTN;
+		  xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+		  	"Ignoring inconsistent DSTN setting\n");
+	          xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
+		        "Master head ruled: DSTN shall be %s\n",
+			pSiS->DSTN ? "enabled" : "disabled");
+	     }
+	     /* We need identical XvOnCRT2 setting */
+	     if(pSiS->XvOnCRT2 != pSiSEnt->XvOnCRT2) {
+	          pSiS->XvOnCRT2 = pSiSEnt->XvOnCRT2;
+		  xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+		  	"Ignoring inconsistent XvOnCRT2 setting\n");
+	          xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
+		        "Master head ruled: Xv shall be used on CRT%d\n",
+			pSiS->XvOnCRT2 ? 2 : 1);
+	     }
+	     /* We need identical NoAccel setting */
+	     if(pSiS->NoAccel != pSiSEnt->NoAccel) {
+	          pSiS->NoAccel = pSiSEnt->NoAccel;
+		  xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+		  	"Ignoring inconsistent NoAccel setting\n");
+	          xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
+		        "Master head ruled: Acceleration shall be %s\n",
+			pSiS->NoAccel ? "disabled" : "enabled");
+	     }
+	     /* We need identical ForceCRT1 setting */
+	     if(pSiS->forceCRT1 != pSiSEnt->forceCRT1) {
+	          if(pSiS->forceCRT1 != -1) {
+		     xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+		  	"Ignoring inconsistent ForceCRT1 setting\n");
+	             xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
+		        "Master head ruled: CRT1 shall be %s\n",
+			pSiSEnt->forceCRT1 ? "enabled" : "disabled");
+	          }
+	          pSiS->forceCRT1 = pSiSEnt->forceCRT1;
+	     }
+	     /* We need identical TVOverscan setting */
+	     if(pSiS->OptTVOver != pSiSEnt->OptTVOver) {
+                  if(pSiS->OptTVOver != -1) {
+		     xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+		  	"Ignoring inconsistent CHTVOverscan setting\n");
+	             xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
+		        "Master head ruled: CHTVOverscan shall be %s\n",
+			pSiSEnt->OptTVOver ? "true (=overscan)" : "false (=underscan)");
+	          }
+	          pSiS->OptTVOver = pSiSEnt->OptTVOver;
+	     }
+	     /* We need identical TVSOverscan setting */
+	     if(pSiS->OptTVSOver != pSiSEnt->OptTVSOver) {
+	          if(pSiS->OptTVSOver != -1) {
+		     xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+		     	"Ignoring inconsistent CHTVSuperOverscan setting\n");
+	 	     xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
+		        "Master head ruled: CHTVSuperOverscan shall be %s\n",
+			pSiSEnt->OptTVSOver ? "true" : "false");
+		  }
+	          pSiS->OptTVSOver = pSiSEnt->OptTVSOver;
+	     }
+	     /* We need identical TV settings */
+	     if(pSiS->chtvtype != pSiSEnt->chtvtype) {
+	        if(pSiS->chtvtype != -1) {
+		     xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+		     	"Ignoring inconsistent CHTVType setting; set to %s\n",
+			(pSiSEnt->chtvtype) ? "SCART" : "HDTV");
+		}
+		pSiS->chtvtype = pSiSEnt->chtvtype;
+	     }
+             if(pSiS->chtvlumabandwidthcvbs != pSiSEnt->chtvlumabandwidthcvbs) {
+	        if(pSiS->chtvlumabandwidthcvbs != -1) {
+		     xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+		     	"Ignoring inconsistent CHTVLumaBandWidthCVBS setting; set to %d\n",
+			pSiSEnt->chtvlumabandwidthcvbs);
+		}
+		pSiS->chtvlumabandwidthcvbs = pSiSEnt->chtvlumabandwidthcvbs;
+	     }
+	     if(pSiS->chtvlumabandwidthsvideo != pSiSEnt->chtvlumabandwidthsvideo) {
+	        if(pSiS->chtvlumabandwidthsvideo != -1) {
+		     xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+		     	"Ignoring inconsistent CHTVLumaBandWidthSVIDEO setting; set to %d\n",
+			pSiSEnt->chtvlumabandwidthsvideo);
+		}
+		pSiS->chtvlumabandwidthsvideo = pSiSEnt->chtvlumabandwidthsvideo;
+	     }
+	     if(pSiS->chtvlumaflickerfilter != pSiSEnt->chtvlumaflickerfilter) {
+	        if(pSiS->chtvlumaflickerfilter != -1) {
+		     xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+		     	"Ignoring inconsistent CHTVLumaFlickerFilter setting; set to %d\n",
+			pSiSEnt->chtvlumaflickerfilter);
+		}
+		pSiS->chtvlumaflickerfilter = pSiSEnt->chtvlumaflickerfilter;
+	     }
+	     if(pSiS->chtvchromabandwidth != pSiSEnt->chtvchromabandwidth) {
+	        if(pSiS->chtvchromabandwidth != -1) {
+		     xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+		     	"Ignoring inconsistent CHTVChromaBandWidth setting; set to %d\n",
+			pSiSEnt->chtvchromabandwidth);
+		}
+		pSiS->chtvchromabandwidth = pSiSEnt->chtvchromabandwidth;
+	     }
+	     if(pSiS->chtvchromaflickerfilter != pSiSEnt->chtvchromaflickerfilter) {
+	        if(pSiS->chtvchromaflickerfilter != -1) {
+		     xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+		     	"Ignoring inconsistent CHTVChromaFlickerFilter setting; set to %d\n",
+			pSiSEnt->chtvchromaflickerfilter);
+		}
+		pSiS->chtvchromaflickerfilter = pSiSEnt->chtvchromaflickerfilter;
+	     }
+	     if(pSiS->chtvcvbscolor != pSiSEnt->chtvcvbscolor) {
+	        if(pSiS->chtvcvbscolor != -1) {
+		     xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+		     	"Ignoring inconsistent CHTVCVBSColor setting; set to %s\n",
+			pSiSEnt->chtvcvbscolor ? "true" : "false");
+		}
+		pSiS->chtvcvbscolor = pSiSEnt->chtvcvbscolor;
+	     }
+	     if(pSiS->chtvtextenhance != pSiSEnt->chtvtextenhance) {
+	        if(pSiS->chtvtextenhance != -1) {
+		     xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+		     	"Ignoring inconsistent CHTVTextEnhance setting; set to %d\n",
+			pSiSEnt->chtvtextenhance);
+		}
+		pSiS->chtvtextenhance = pSiSEnt->chtvtextenhance;
+	     }
+	     if(pSiS->chtvcontrast != pSiSEnt->chtvcontrast) {
+	        if(pSiS->chtvcontrast != -1) {
+		     xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+		     	"Ignoring inconsistent CHTVContrast setting; set to %d\n",
+			pSiSEnt->chtvcontrast);
+		}
+		pSiS->chtvcontrast = pSiSEnt->chtvcontrast;
+	     }
+	     if(pSiS->sistvedgeenhance != pSiSEnt->sistvedgeenhance) {
+	        if(pSiS->sistvedgeenhance != -1) {
+		     xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+		     	"Ignoring inconsistent SISTVEdgeEnhance setting; set to %d\n",
+			pSiSEnt->sistvedgeenhance);
+		}
+		pSiS->sistvedgeenhance = pSiSEnt->sistvedgeenhance;
+	     }
+	     if(pSiS->sistvantiflicker != pSiSEnt->sistvantiflicker) {
+	        if(pSiS->sistvantiflicker != -1) {
+		     xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+		     	"Ignoring inconsistent SISTVAntiFlicker setting; set to %d\n",
+			pSiSEnt->sistvantiflicker);
+		}
+		pSiS->sistvantiflicker = pSiSEnt->sistvantiflicker;
+	     }
+	     if(pSiS->sistvsaturation != pSiSEnt->sistvsaturation) {
+	        if(pSiS->sistvsaturation != -1) {
+		     xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+		     	"Ignoring inconsistent SISTVSaturation setting; set to %d\n",
+			pSiSEnt->sistvsaturation);
+		}
+		pSiS->sistvsaturation = pSiSEnt->sistvsaturation;
+	     }
+	     if(pSiS->tvxpos != pSiSEnt->tvxpos) {
+	        if(pSiS->tvxpos != 0) {
+		     xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+		     	"Ignoring inconsistent TVXPosOffset setting; set to %d\n",
+			pSiSEnt->tvxpos);
+		}
+		pSiS->tvxpos = pSiSEnt->tvxpos;
+	     }
+	     if(pSiS->tvypos != pSiSEnt->tvypos) {
+	        if(pSiS->tvypos != 0) {
+		     xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+		     	"Ignoring inconsistent TVYPosOffset setting; set to %d\n",
+			pSiSEnt->tvypos);
+		}
+		pSiS->tvypos = pSiSEnt->tvypos;
+	     }
+	     if(pSiS->restorebyset != pSiSEnt->restorebyset) {
+		pSiS->restorebyset = pSiSEnt->restorebyset;
+	     }
+	}
+    }
+#endif
+    /* TW: Handle UseROMData and NoOEM options */
+    if((pSiS->VGAEngine == SIS_300_VGA) || (pSiS->VGAEngine == SIS_315_VGA)) {
+       from = X_PROBED;
+       if(pSiS->OptROMUsage == 0)  {
+       		pSiS->sishw_ext.UseROM = FALSE;
+		from = X_CONFIG;
+       }
+       xf86DrvMsg(pScrn->scrnIndex, from, "Video ROM data usage is %s\n",
+    	   pSiS->sishw_ext.UseROM ? "enabled" : "disabled");
+
+       if(!pSiS->OptUseOEM)
+          xf86DrvMsg(pScrn->scrnIndex, from, "Internal OEM LCD/TV data usage is disabled\n");
+
+       if(pSiS->sbiosn) {
+         if(pSiS->BIOS) {
+           FILE *fd = NULL;
+	   int i;
+           if((fd = fopen(pSiS->sbiosn, "w" ))) {
+	     i = fwrite(pSiS->BIOS, 65536, 1, fd);
+	     fclose(fd);
+	   }
+         }
+         xfree(pSiS->sbiosn);
+       }
+    }
+
+    /* Do basic configuration */
     SiSSetup(pScrn);
 
     from = X_PROBED;
@@ -895,7 +2278,15 @@ SISPreInit(ScrnInfoPtr pScrn, int flags)
         pSiS->FbAddress = pSiS->PciInfo->memBase[0] & 0xFFFFFFF0;
     }
 
-    xf86DrvMsg(pScrn->scrnIndex, from, "Linear framebuffer at 0x%lX\n",
+    pSiS->realFbAddress = pSiS->FbAddress;
+
+#ifdef SISDUALHEAD
+    if(pSiS->DualHeadMode)
+       xf86DrvMsg(pScrn->scrnIndex, from, "Global linear framebuffer at 0x%lX\n",
+           (unsigned long)pSiS->FbAddress);
+    else 	   
+#endif
+       xf86DrvMsg(pScrn->scrnIndex, from, "Linear framebuffer at 0x%lX\n",
            (unsigned long)pSiS->FbAddress);
 
     if (pSiS->pEnt->device->IOBase != 0) {
@@ -909,18 +2300,20 @@ SISPreInit(ScrnInfoPtr pScrn, int flags)
         pSiS->IOAddress = pSiS->PciInfo->memBase[1] & 0xFFFFFFF0;
     }
 
-    from = X_PROBED;
     xf86DrvMsg(pScrn->scrnIndex, from, "MMIO registers at 0x%lX\n",
            (unsigned long)pSiS->IOAddress);
-
-    pSiS->RelIO = pSiS->PciInfo->ioBase[2] & 0xFFFC;
-    xf86DrvMsg(pScrn->scrnIndex, from, "Relocate IO registers at 0x%lX\n",
-           (unsigned long)pSiS->RelIO);
+    pSiS->sishw_ext.bIntegratedMMEnabled = TRUE;
 
     /* Register the PCI-assigned resources. */
-    if (xf86RegisterResources(pSiS->pEnt->index, NULL, ResExclusive)) {
+    if(xf86RegisterResources(pSiS->pEnt->index, NULL, ResExclusive)) {
         xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
                "xf86RegisterResources() found resource conflicts\n");
+#ifdef SISDUALHEAD
+	if(pSiSEnt) pSiSEnt->ErrorAfterFirst = TRUE;
+#endif
+	if(pSiS->pInt) xf86FreeInt10(pSiS->pInt);
+	sisRestoreExtRegisterLock(pSiS,srlockReg,crlockReg);
+	SISFreeRec(pScrn);
         return FALSE;
     }
 
@@ -930,78 +2323,299 @@ SISPreInit(ScrnInfoPtr pScrn, int flags)
         from = X_CONFIG;
     }
 
-    if ((pSiS->Chipset == PCI_CHIP_SIS6326)
-			&& (pScrn->videoRam >= 8192)
+    pSiS->RealVideoRam = pScrn->videoRam;
+    if((pSiS->Chipset == PCI_CHIP_SIS6326)
+			&& (pScrn->videoRam > 4096)
 			&& (from != X_CONFIG)) {
         pScrn->videoRam = 4096;
-        xf86DrvMsg(pScrn->scrnIndex, from, "Limiting VideoRAM to %d KB\n",
-               pScrn->videoRam);
+        xf86DrvMsg(pScrn->scrnIndex, from,
+	       "SiS6326: Detected %d KB VideoRAM, limiting to %d KB\n",
+               pSiS->RealVideoRam, pScrn->videoRam);
     } else
         xf86DrvMsg(pScrn->scrnIndex, from, "VideoRAM: %d KB\n",
                pScrn->videoRam);
 
-    /*
-     *  TW: New option: limit size of framebuffer memory for avoiding
-     *  clash with DRI:
-     *  Kernel framebuffer driver (sisfb) starts its memory heap
-     *  at 8MB if it detects more VideoRAM than that(otherwise at 4MB).
-     *  Therefore a setting of 8192 is recommended if DRI is
-     *  to be used when there's more than 8MB video RAM available.
-     *  This option can be left out if DRI is not to be used.
-     *  Attention: TurboQueue and HWCursor should use videoRam value,
-     *  not FbMapSize; these two are always located at the very top
-     *  of the videoRAM. Both are already initialized by framebuffer
-     *  driver, so they should not wander around while starting X.
+    if((pSiS->Chipset == PCI_CHIP_SIS6326) &&
+       (pScrn->videoRam > 4096)) {
+       xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+       	"SiS6326 engines do not support more than 4096KB RAM, therefore\n");
+       xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+        "TurboQueue, HWCursor, 2D acceleration and XVideo are disabled.\n");
+       pSiS->TurboQueue = FALSE;
+       pSiS->HWCursor   = FALSE;
+       pSiS->NoXvideo   = TRUE;
+       pSiS->NoAccel    = TRUE;
+    }
+
+    pSiS->FbMapSize = pSiS->availMem = pScrn->videoRam * 1024;
+    pSiS->sishw_ext.ulVideoMemorySize = pScrn->videoRam * 1024;
+    pSiS->sishw_ext.bSkipDramSizing = TRUE;
+
+    /* TW: Calculate real availMem according to Accel/TurboQueue and
+     *     HWCursur setting. Also, initialize some variables used
+     *     in other modules.
      */
+    pSiS->cursorOffset = 0;
+    switch (pSiS->VGAEngine) {
+      case SIS_300_VGA:
+      	pSiS->TurboQueueLen = 512;
+       	if(pSiS->TurboQueue) {
+			      pSiS->availMem -= (pSiS->TurboQueueLen*1024);
+			      pSiS->cursorOffset = 512;
+        }
+	if(pSiS->HWCursor)   {
+			      pSiS->availMem -= pSiS->CursorSize;
+			      if(pSiS->OptUseColorCursor) pSiS->availMem -= pSiS->CursorSize;
+	}
+	pSiS->CmdQueLenMask = 0xFFFF;
+	pSiS->CmdQueLenFix  = 0;
+	pSiS->cursorBufferNum = 0;
+#ifdef SISDUALHEAD
+	if(pSiSEnt) pSiSEnt->cursorBufferNum = 0;
+#endif	
+	break;
+      case SIS_315_VGA:
+       	if(pSiS->TurboQueue) {
+			      pSiS->availMem -= (512*1024);  		/* Command Queue is 512k */
+			      pSiS->cursorOffset = 512;
+	}
+	if(pSiS->HWCursor)   {
+			      pSiS->availMem -= pSiS->CursorSize;
+			      if(pSiS->OptUseColorCursor) pSiS->availMem -= pSiS->CursorSize;
+	}
+	pSiS->cursorBufferNum = 0;
+#ifdef SISDUALHEAD
+	if(pSiSEnt) pSiSEnt->cursorBufferNum = 0;
+#endif	
+	break;
+      default:
+        /* TW: cursorOffset not used in cursor functions for 530 and
+	 *     older chips, because the cursor is *above* the TQ.
+	 *     On 5597 and older revisions of the 6326, the TQ is
+	 *     max 32K, on newer 6326 revisions and the 530 either 30
+	 *     (or 32?) or 62K (or 64?). However, to make sure, we
+	 *     use only 30K (or 32?), but reduce the available memory
+	 *     by 64, and locate the TQ at the beginning of this last
+	 *     64K block. (We do this that way even when using the
+	 *     HWCursor, because the cursor only takes 2K, and the queue
+	 *     does not seem to last that far anyway.)
+	 *     The TQ must be located at 32KB boundaries.
+	 */
+	if(pSiS->RealVideoRam < 3072) {
+	        if(pSiS->TurboQueue) {
+			xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+			    "Not enough video RAM for TurboQueue. TurboQueue disabled\n");
+		}
+		pSiS->TurboQueue = FALSE;
+	}
+	pSiS->CmdQueMaxLen = 32;
+     	if(pSiS->TurboQueue) {
+	              	      pSiS->availMem -= (64*1024);
+			      pSiS->CmdQueMaxLen = 900;   /* TW: To make sure; should be 992 */
+	} else if (pSiS->HWCursor) {
+	                      pSiS->availMem -= pSiS->CursorSize;
+	}
+	if(pSiS->Chipset == PCI_CHIP_SIS530) {
+		/* TW: Check if Flat Panel is enabled */
+		inSISIDXREG(SISSR, 0x0e, tempreg);
+		if(!tempreg & 0x04) pSiS->availMem -= pSiS->CursorSize;
 
-    pSiS->FbMapSize = pScrn->videoRam * 1024;
-    /* TW: Touching FbMapSize doesn't work; now use maxxfbmem in accel*.c */
+		/* TW: Set up mask for MMIO register */
+		pSiS->CmdQueLenMask = (pSiS->TurboQueue) ? 0x1FFF : 0x00FF;
+	} else {
+	        /* TW: TQ is never used on 6326/5597, because the accelerator
+		 *     always Syncs. So this is just cosmentic work. (And I
+		 *     am not even sure that 0x7fff is correct. MMIO 0x83a8
+		 *     holds 0xec0 if (30k) TQ is enabled, 0x20 if TQ disabled.
+		 *     The datasheet has no real explanation on the queue length
+		 *     if the TQ is enabled. Not syncing and waiting for a
+		 *     suitable queue length instead does not work.
+		 */
+	        pSiS->CmdQueLenMask = (pSiS->TurboQueue) ? 0x7FFF : 0x003F;
+	}
 
-    if (pSiS->maxxfbmem) {
-    	if (pSiS->maxxfbmem > pSiS->FbMapSize) {
-	    xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
-            "Invalid MaxXFBMem setting. Using all VideoRAM for framebuffer\n");
-	    pSiS->maxxfbmem = pSiS->FbMapSize;
+	/* TW: This is to be subtracted from MMIO queue length register contents
+	 *     for getting the real Queue length.
+	 */
+	pSiS->CmdQueLenFix  = (pSiS->TurboQueue) ? 32 : 0;
+    }
+
+#ifdef SISDUALHEAD
+    /* TW: In dual head mode, we share availMem equally - so align it
+     *     to 8KB; this way, the address of the FB of the second
+     *     head is aligned to 4KB for mapping.
+     */
+   if (pSiS->DualHeadMode)
+	pSiS->availMem &= 0xFFFFE000;
+#endif
+
+    /* TW: Check MaxXFBMem setting */
+#ifdef SISDUALHEAD
+    /* TW: Since DRI is not supported in dual head mode, we
+           don't need MaxXFBMem setting. */
+    if (pSiS->DualHeadMode) {
+        if(pSiS->maxxfbmem) {
+	    xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+		"MaxXFBMem not used in Dual Head mode. Using all VideoRAM.\n");
+        }
+	pSiS->maxxfbmem = pSiS->availMem;
+    } else
+#endif
+      if (pSiS->maxxfbmem) {
+    	if (pSiS->maxxfbmem > pSiS->availMem) {
+	    if (pSiS->sisfbMem) {
+	       pSiS->maxxfbmem = pSiS->sisfbMem * 1024;
+	       xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+                "Invalid MaxXFBMem setting. Using sisfb heap start information\n");
+	    } else {
+	       xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+                "Invalid MaxXFBMem setting. Using all VideoRAM for framebuffer\n");
+	       pSiS->maxxfbmem = pSiS->availMem;
+	    }
+	} else if (pSiS->sisfbMem) {
+	   if (pSiS->maxxfbmem > pSiS->sisfbMem * 1024) {
+	       xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+	       "MaxXFBMem beyond sisfb heap start. Using sisfb heap start information\n");
+               pSiS->maxxfbmem = pSiS->sisfbMem * 1024;
+	   }
 	}
-    } else pSiS->maxxfbmem = pSiS->FbMapSize;
+    } else if (pSiS->sisfbMem) {
+         pSiS->maxxfbmem = pSiS->sisfbMem * 1024;
+    }
+    else pSiS->maxxfbmem = pSiS->availMem;
+
+    xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Using %dK of framebuffer memory\n",
+    	pSiS->maxxfbmem / 1024);
+
+    /* TW: Check if the chipset supports two video overlays */
+    pSiS->Flags650 = 0;
+    if ( (!pSiS->NoXvideo) &&
+            ( pSiS->VGAEngine == SIS_300_VGA ||
+              pSiS->VGAEngine == SIS_315_VGA ||
+	      pSiS->Chipset == PCI_CHIP_SIS530 ||
+	      pSiS->Chipset == PCI_CHIP_SIS6326 ||
+	      pSiS->Chipset == PCI_CHIP_SIS5597 ) ) {
+       pSiS->hasTwoOverlays = FALSE;
+       switch (pSiS->Chipset) {
+         case PCI_CHIP_SIS300:
+         case PCI_CHIP_SIS630:
+         case PCI_CHIP_SIS550: 
+         case PCI_CHIP_SIS330:  /* ? */
+           pSiS->hasTwoOverlays = TRUE;
+	   break;
+         case PCI_CHIP_SIS650:
+	   {
+	     static const char *id650str[] = {
+	   	"0",       "0",        "0",       "0",
+		"0 A0 AA", "0 A2 CA",  "0",       "0",
+		"0M A0",   "0M A1 AA", "1 A0 AA", "1 A1 AA"
+		"0",       "0",        "0",       "0"
+	     };
+             inSISIDXREG(SISCR, 0x5F, CR5F);
+	     CR5F &= 0xf0;
+	     xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+	   	"SiS650 revision ID %x (SiS65%s)\n", CR5F, id650str[CR5F >> 4]);
+	     if((CR5F == 0x80) || (CR5F == 0x90) || (CR5F == 0xa0) || (CR5F == 0xb0)) {
+	        pSiS->hasTwoOverlays = TRUE;  /* TW: This is an M650 or 651 */
+		pSiS->Flags650 |= SiS650_LARGEOVERLAY;
+	     }
+             break;
+	   }
+       }
+       xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+		"Hardware supports %s video overlay%s\n",
+		pSiS->hasTwoOverlays ? "two" : "one",
+		pSiS->hasTwoOverlays ? "s" : "");
+    }
+
+    /* TW: Backup VB connection and CRT1 on/off register */
+    if((pSiS->VGAEngine == SIS_300_VGA) || (pSiS->VGAEngine == SIS_315_VGA)) {
+    	inSISIDXREG(SISCR, 0x32, pSiS->oldCR32);
+	inSISIDXREG(SISCR, 0x17, pSiS->oldCR17);
+	pSiS->postVBCR32 = pSiS->oldCR32;
+    }
 
-    /* TW: Detect video bridge */
+    if(pSiS->forceCRT1 != -1) {
+        if(pSiS->forceCRT1) pSiS->CRT1off = 0;
+	else                pSiS->CRT1off = 1;
+    } else                  pSiS->CRT1off = -1;
+
+    /* TW: There are some strange machines out there which require a special
+     *     manupulation of ISA bridge registers in order to make the Chrontel
+     *     work. Try to find out if we're running on such a machine.
+     */
+    pSiS->SiS_Pr->SiS_ChSW = FALSE;
+    if(pSiS->Chipset == PCI_CHIP_SIS630) {
+        int i=0;
+        do {
+	    if(mychswtable[i].subsysVendor == pSiS->PciInfo->subsysVendor &&
+	       mychswtable[i].subsysCard == pSiS->PciInfo->subsysCard) {
+	        xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+	           "PCI card/vendor found in list for Chrontel/ISA bridge poking\n");
+		xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+		   "Vendor: %s (ID %04x)\n",
+		   mychswtable[i].vendorName, pSiS->PciInfo->subsysCard);
+		pSiS->SiS_Pr->SiS_ChSW = TRUE;
+            }
+            i++;
+        } while(mychswtable[i].subsysVendor != 0);
+    }
+
+    /* TW: Detect video bridge and sense connected devices */
     SISVGAPreInit(pScrn);
+    /* TW: Detect CRT1  */
+    SISCRT1PreInit(pScrn);
     /* TW: Detect CRT2-LCD and LCD size */
     SISLCDPreInit(pScrn);
     /* TW: Detect CRT2-TV and PAL/NTSC mode */
     SISTVPreInit(pScrn);
     /* TW: Detect CRT2-VGA */
     SISCRT2PreInit(pScrn);
+
+    /* TW: Backup detected CRT2 devices */
+    pSiS->detectedCRT2Devices = pSiS->VBFlags & (CRT2_LCD | CRT2_TV | CRT2_VGA);
+
     /* TW: Eventually overrule detected CRT2 type */
-    if (pSiS->ForceCRT2Type == CRT2_DEFAULT)
-    {
-        if (pSiS->VBFlags & CRT2_VGA)
+    if(pSiS->ForceCRT2Type == CRT2_DEFAULT) {
+        if(pSiS->VBFlags & CRT2_VGA)
            pSiS->ForceCRT2Type = CRT2_VGA;
-        else if (pSiS->VBFlags & CRT2_LCD)
+        else if(pSiS->VBFlags & CRT2_LCD)
            pSiS->ForceCRT2Type = CRT2_LCD;
-        else if (pSiS->VBFlags & CRT2_TV)
+        else if(pSiS->VBFlags & CRT2_TV)
            pSiS->ForceCRT2Type = CRT2_TV;
     }
-    switch (pSiS->ForceCRT2Type)
-    {
-    case CRT2_TV:
+
+    switch(pSiS->ForceCRT2Type) {
+      case CRT2_TV:
         pSiS->VBFlags = pSiS->VBFlags & ~(CRT2_LCD | CRT2_VGA);
-        if (pSiS->VBFlags & VB_VIDEOBRIDGE)
+        if(pSiS->VBFlags & VB_VIDEOBRIDGE)
             pSiS->VBFlags = pSiS->VBFlags | CRT2_TV;
         else
             pSiS->VBFlags = pSiS->VBFlags & ~(CRT2_TV);
         break;
-     case CRT2_LCD:
+      case CRT2_LCD:
         pSiS->VBFlags = pSiS->VBFlags & ~(CRT2_TV | CRT2_VGA);
-        if (pSiS->VBFlags & VB_VIDEOBRIDGE)
+        if((pSiS->VBFlags & VB_VIDEOBRIDGE) && (pSiS->VBLCDFlags))
             pSiS->VBFlags = pSiS->VBFlags | CRT2_LCD;
-        else
+        else {
             pSiS->VBFlags = pSiS->VBFlags & ~(CRT2_LCD);
+	    xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+	    	"Can't force CRT2 to LCD, no panel detected\n");
+	}
         break;
-     case CRT2_VGA:
+      case CRT2_VGA:
+        if(pSiS->VBFlags & VB_LVDS) {
+	   xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+	      "LVDS does not support secondary VGA\n");
+	   break;
+	}
+	if(pSiS->VBFlags & (VB_30xLV|VB_30xLVX)) {
+	   xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+	      "SiS30xLV bridge does not support secondary VGA\n");
+	   break;
+	}
         pSiS->VBFlags = pSiS->VBFlags & ~(CRT2_TV | CRT2_LCD);
-        if (pSiS->VBFlags & VB_VIDEOBRIDGE)
+        if(pSiS->VBFlags & VB_VIDEOBRIDGE)
             pSiS->VBFlags = pSiS->VBFlags | CRT2_VGA;
         else
             pSiS->VBFlags = pSiS->VBFlags & ~(CRT2_VGA);
@@ -1010,30 +2624,428 @@ SISPreInit(ScrnInfoPtr pScrn, int flags)
         pSiS->VBFlags &= ~(CRT2_TV | CRT2_LCD | CRT2_VGA);
     }
 
-    /* TW: Check if CRT1 used (or needed; this if no CRT2 detected) */
+    /* TW: Eventually overrule TV Type (SVIDEO, COMPOSITE, SCART) */
+    if(pSiS->ForceTVType != -1) {
+        if(pSiS->VBFlags & VB_SISBRIDGE) {
+    	   pSiS->VBFlags &= ~(TV_INTERFACE);
+	   pSiS->VBFlags |= pSiS->ForceTVType;
+	}
+    }
+
+    /* TW: Handle ForceCRT1 option */
+    pSiS->CRT1changed = FALSE;
+    if((pSiS->VGAEngine == SIS_300_VGA) || (pSiS->VGAEngine == SIS_315_VGA)) {
+       usScratchCR17 = pSiS->oldCR17;
+       usScratchCR32 = pSiS->postVBCR32;
+       if(pSiS->VESA != 1) {
+          /* TW: Copy forceCRT1 option to CRT1off if option is given */
+#ifdef SISDUALHEAD
+          /* TW: In DHM, handle this option only for master head, not the slave */
+          if( (pSiS->forceCRT1 != -1) &&
+	       (!(pSiS->DualHeadMode && pSiS->SecondHead)) ) {
+#else
+          if(pSiS->forceCRT1 != -1) {
+#endif
+             xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
+	         "CRT1 detection overruled by ForceCRT1 option\n");
+    	     if(pSiS->forceCRT1) {
+		 pSiS->CRT1off = 0;
+		 if (!(usScratchCR17 & 0x80)) pSiS->CRT1changed = TRUE;
+		 usScratchCR17 |= 0x80;
+		 usScratchCR32 |= 0x20;
+	     } else {
+	         if( ! ( (pScrn->bitsPerPixel == 8) &&
+		         ( (pSiS->VBFlags & VB_LVDS) ||
+		           ((pSiS->VGAEngine == SIS_300_VGA) && (pSiS->VBFlags & VB_301B)) ) ) ) {
+		    pSiS->CRT1off = 1;
+		    if (usScratchCR17 & 0x80) pSiS->CRT1changed = TRUE;
+		    usScratchCR32 &= ~0x20;
+		    /* TW: We must not actually switch off CRT1 before we changed the mode! */
+		 }
+	     }
+	     outSISIDXREG(SISCR, 0x17, usScratchCR17);
+	     outSISIDXREG(SISCR, 0x32, usScratchCR32);
+	     if(pSiS->CRT1changed) {
+                outSISIDXREG(SISSR, 0x00, 0x01);    /* Synchronous Reset */
+	        usleep(10000);
+                outSISIDXREG(SISSR, 0x00, 0x03);    /* End Reset */
+		xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+	   		"CRT1 status changed by ForceCRT1 option\n");
+	     }
+          }
+       }
+       /* TW: Store the new VB connection register contents for later mode changes */
+       pSiS->newCR32 = usScratchCR32;
+    }
+
+    /* TW: Check if CRT1 used (or needed; this eg. if no CRT2 detected) */
     if (pSiS->VBFlags & VB_VIDEOBRIDGE) {
-        if (!(pSiS->VBFlags & (CRT2_VGA | CRT2_LCD | CRT2_TV)))
+    
+        /* TW: No CRT2 output? Then we NEED CRT1!
+	 *     We also need CRT1 if depth = 8 and bridge=LVDS|630+301B
+	 */
+        if ( (!(pSiS->VBFlags & (CRT2_VGA | CRT2_LCD | CRT2_TV))) ||
+	     ( (pScrn->bitsPerPixel == 8) &&
+	       ( (pSiS->VBFlags & (VB_LVDS | VB_CHRONTEL)) ||
+	         ((pSiS->VGAEngine == SIS_300_VGA) && (pSiS->VBFlags & VB_301B)) ) ) ) {
 	    pSiS->CRT1off = 0;
-    }
-    else /* TW: no video bridge? Then we NEED CRT1! */
+	}
+	/* TW: No CRT2 output? Then we can't use Xv on CRT2 */
+	if (!(pSiS->VBFlags & (CRT2_VGA | CRT2_LCD | CRT2_TV)))
+	    pSiS->XvOnCRT2 = FALSE;
+
+    } else { /* TW: no video bridge? */
+
+        /* Then we NEED CRT1... */
         pSiS->CRT1off = 0;
+	/* ... and can't use CRT2 for Xv output */
+	pSiS->XvOnCRT2 = FALSE;
+    }
+
+    /* TW: Handle TVStandard option */
+    if(pSiS->NonDefaultPAL != -1) {
+        if( (!(pSiS->VBFlags & VB_SISBRIDGE)) &&
+	    (!((pSiS->VBFlags & VB_CHRONTEL)) && (pSiS->ChrontelType == CHRONTEL_701x)) ) {
+	   xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+	   	"PALM and PALN only supported on Chrontel 701x and SiS30x/B/LV\n");
+ 	   pSiS->NonDefaultPAL = -1; 
+	   pSiS->VBFlags &= ~(TV_PALN | TV_PALM);
+	}
+    }
+    if(pSiS->NonDefaultPAL != -1) {
+        if((pSiS->Chipset == PCI_CHIP_SIS300) || (pSiS->Chipset == PCI_CHIP_SIS540)) {
+	   xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+	   	"PALM and PALN not supported on SiS300 and SiS540\n");
+	   pSiS->NonDefaultPAL = -1; 
+	   pSiS->VBFlags &= ~(TV_PALN | TV_PALM);
+	}
+    }
+    if(pSiS->OptTVStand != -1) {
+        if((pSiS->VGAEngine == SIS_300_VGA) || (pSiS->VGAEngine == SIS_315_VGA)) {
+	   if(!(pSiS->Flags & (TV_CHSCART | TV_CHHDTV))) {
+    	      pSiS->VBFlags &= ~(TV_PAL | TV_NTSC | TV_PALN | TV_PALM);
+    	      if(pSiS->OptTVStand) pSiS->VBFlags |= TV_PAL;
+	      else                 pSiS->VBFlags |= TV_NTSC;
+              if(pSiS->NonDefaultPAL == 1)  pSiS->VBFlags |= TV_PALM;
+	      else if(!pSiS->NonDefaultPAL) pSiS->VBFlags |= TV_PALN;
+	   } else {
+	      pSiS->OptTVStand = pSiS->NonDefaultPAL = -1;
+	      xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+	   	"Option TVStandard ignored for SCART and 480i HDTV\n");
+	   }
+	} else if(pSiS->Chipset == PCI_CHIP_SIS6326) {
+	   pSiS->SiS6326Flags &= ~SIS6326_TVPAL;
+	   if(pSiS->OptTVStand) pSiS->SiS6326Flags |= SIS6326_TVPAL;
+	}
+    }
+
+    /* TW: Do some checks */
+    if(pSiS->OptTVOver != -1) {
+        if(pSiS->VBFlags & VB_CHRONTEL) {
+	   pSiS->UseCHOverScan = pSiS->OptTVOver;
+	} else {
+	   xf86DrvMsg(pScrn->scrnIndex, X_INFO, 
+	    	"CHTVOverscan option only supported on CHRONTEL 70xx\n");
+           pSiS->UseCHOverScan = -1;
+	}
+    } else pSiS->UseCHOverScan = -1;
+    
+    if(pSiS->sistvedgeenhance != -1) {
+        if(!(pSiS->VBFlags & VB_301)) {
+	   xf86DrvMsg(pScrn->scrnIndex, X_INFO, 
+	       "SISTVEdgeEnhance option only supported on SiS301\n");
+	   pSiS->sistvedgeenhance = -1;
+	}
+    }
 
-    /* TW: Determine CRT1<>CRT2 mode */
-    if (pSiS->VBFlags & DISPTYPE_DISP2) {
-        if (pSiS->CRT1off)	/* TW: CRT2 only */
+    /* TW: Determine CRT1<>CRT2 mode
+     *     Note: When using VESA or if the bridge is in slavemode, display
+     *           is ALWAYS in MIRROR_MODE!
+     *           This requires extra checks in functions using this flag!
+     *           (see sis_video.c for example)
+     */
+    if(pSiS->VBFlags & DISPTYPE_DISP2) {
+        if(pSiS->CRT1off) {	/* TW: CRT2 only ------------------------------- */
+#ifdef SISDUALHEAD
+	     if(pSiS->DualHeadMode) {
+	     	xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+		    "CRT1 not detected or forced off. Dual Head mode can't initialize.\n");
+	     	if(pSiSEnt) pSiSEnt->DisableDual = TRUE;
+	        if(pSiSEnt) pSiSEnt->ErrorAfterFirst = TRUE;
+		if(pSiS->pInt) xf86FreeInt10(pSiS->pInt);
+		sisRestoreExtRegisterLock(pSiS,srlockReg,crlockReg);
+		SISFreeRec(pScrn);
+		return FALSE;
+	     }
+#endif
 	     pSiS->VBFlags |= VB_DISPMODE_SINGLE;
-	else			/* TW: CRT1 and CRT2 - mirror image */
-	     pSiS->VBFlags |= (VB_DISPMODE_MIRROR | DISPTYPE_CRT1);
-    } else			/* TW: CRT1 only */
+	     /* TW: No CRT1? Then we use the video overlay on CRT2 */
+	     pSiS->XvOnCRT2 = TRUE;
+	} else			/* TW: CRT1 and CRT2 - mirror or dual head ----- */
+#ifdef SISDUALHEAD
+	     if(pSiS->DualHeadMode) {
+		pSiS->VBFlags |= (VB_DISPMODE_DUAL | DISPTYPE_CRT1);
+	        if(pSiS->VESA != -1) {
+		    xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+			"VESA option not used in Dual Head mode. VESA disabled.\n");
+		}
+		if (pSiSEnt) pSiSEnt->DisableDual = FALSE;
+		pSiS->VESA = 0;
+	     } else
+#endif
+		 pSiS->VBFlags |= (VB_DISPMODE_MIRROR | DISPTYPE_CRT1);
+    } else {			/* TW: CRT1 only ------------------------------- */
+#ifdef SISDUALHEAD
+	     if(pSiS->DualHeadMode) {
+	     	xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+		   "No CRT2 output selected or no bridge detected. "
+		   "Dual Head mode can't initialize.\n");
+	        if(pSiSEnt) pSiSEnt->ErrorAfterFirst = TRUE;
+		if(pSiS->pInt) xf86FreeInt10(pSiS->pInt);
+		sisRestoreExtRegisterLock(pSiS,srlockReg,crlockReg);
+		SISFreeRec(pScrn);
+		return FALSE;
+	     }
+#endif
              pSiS->VBFlags |= (VB_DISPMODE_SINGLE | DISPTYPE_CRT1);
+    }
 
+    if( (pSiS->VGAEngine == SIS_315_VGA) ||
+        (pSiS->VGAEngine == SIS_300_VGA) ) {
+       if ( (!pSiS->NoXvideo) &&
+         (!pSiS->hasTwoOverlays) ) {
+	       xf86DrvMsg(pScrn->scrnIndex, from,
+	  		"Using Xv overlay on CRT%d\n",
+			pSiS->XvOnCRT2 ? 2 : 1);
+       }
+    }
+
+    /* TW: Init Ptrs for Save/Restore functions and calc MaxClock */
     SISDACPreInit(pScrn);
 
-    /* Lock extended registers */
-    outw(VGA_SEQ_INDEX, (unlock << 8) | 0x05);
+    /* ********** end of VBFlags setup ********** */
+
+    /* TW: VBFlags are initialized now. Back them up for SlaveMode modes. */
+    pSiS->VBFlags_backup = pSiS->VBFlags;
+
+    /* TW: Find out about paneldelaycompensation and evaluate option */
+    pSiS->sishw_ext.pdc = 0;
+
+    if(pSiS->VGAEngine == SIS_300_VGA) {
+
+        if(pSiS->VBFlags & (VB_LVDS | VB_301B | VB_302B)) {
+	   /* TW: Save the current PDC if the panel is used at the moment.
+	    *     This seems by far the safest way to find out about it.
+	    *     If the system is using an old version of sisfb, we can't
+	    *     trust the pdc register value. If sisfb saved the pdc for
+	    *     us, use it.
+	    */
+	   if(pSiS->sisfbpdc) {
+	      pSiS->sishw_ext.pdc = pSiS->sisfbpdc;
+	   } else {
+	     if(!(pSiS->donttrustpdc)) {
+	       unsigned char tmp;
+	       inSISIDXREG(SISCR, 0x30, tmp);
+	       if(tmp & 0x20) {
+	         inSISIDXREG(SISPART1, 0x13, pSiS->sishw_ext.pdc);
+               } else {
+	         xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+	       	     "Unable to detect LCD PanelDelayCompensation, LCD is not active\n");
+	       }
+	     } else {
+	       xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+	       	  "Unable to detect LCD PanelDelayCompensation, please update sisfb\n");
+	     }
+	   }
+	   pSiS->sishw_ext.pdc &= 0x3c;
+	   if(pSiS->sishw_ext.pdc) {
+	      xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+	       	  "Detected LCD PanelDelayCompensation %d\n",
+		  pSiS->sishw_ext.pdc);
+	   }
+
+	   /* If we haven't been able to find out, use our other methods */
+	   if(pSiS->sishw_ext.pdc == 0) {
+
+                 int i=0;
+                 do {
+	            if(mypdctable[i].subsysVendor == pSiS->PciInfo->subsysVendor &&
+	               mypdctable[i].subsysCard == pSiS->PciInfo->subsysCard) {
+	                  xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+	   	            "PCI card/vendor found in list for non-default PanelDelayCompensation\n");
+		          xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+		             "Vendor: %s, card: %s (ID %04x), PanelDelayCompensation: %d\n",
+		             mypdctable[i].vendorName, mypdctable[i].cardName,
+		             pSiS->PciInfo->subsysCard, mypdctable[i].pdc);
+                          if(pSiS->PDC == -1) {
+		             pSiS->PDC = mypdctable[i].pdc;
+		          } else {
+		             xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
+		       	        "PanelDelayCompensation overruled by option\n");
+		          }
+	                  break;
+                    }
+	            i++;
+                 } while(mypdctable[i].subsysVendor != 0);
+
+            }
+
+	    if(pSiS->PDC != -1) {
+	       if(pSiS->BIOS) {
+	          if(pSiS->VBFlags & VB_LVDS) {
+	             if(pSiS->BIOS[0x220] & 0x80) {
+                        xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+		             "BIOS contains custom LCD Panel Delay Compensation %d\n",
+		             pSiS->BIOS[0x220] & 0x3c);
+	                pSiS->BIOS[0x220] &= 0x7f;
+		     }
+	          }
+	          if(pSiS->VBFlags & (VB_301B|VB_302B)) {
+	             if(pSiS->BIOS[0x220] & 0x80) {
+                        xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+		             "BIOS contains custom LCD Panel Delay Compensation %d\n",
+		               (  (pSiS->VBLCDFlags & VB_LCD_1280x1024) ?
+			                 pSiS->BIOS[0x223] : pSiS->BIOS[0x224]  ) & 0x3c);
+	                pSiS->BIOS[0x220] &= 0x7f;
+		     }
+		  }
+	       }
+	       pSiS->sishw_ext.pdc = (pSiS->PDC & 0x3c);
+	       xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
+	            "Using LCD Panel Delay Compensation %d\n", pSiS->PDC);
+	    }
+	}
+    }
+
+#ifdef SISDUALHEAD
+    /* TW: In dual head mode, both heads (currently) share the maxxfbmem equally.
+     *     If memory sharing is done differently, the following has to be changed;
+     *     the other modules (eg. accel and Xv) use dhmOffset for hardware
+     *     pointer settings relative to VideoRAM start and won't need to be changed.
+     */
+    if (pSiS->DualHeadMode) {
+        if (pSiS->SecondHead == FALSE) {
+	    /* ===== First head (always CRT2) ===== */
+	    /* We use only half of the memory available */
+	    pSiS->maxxfbmem /= 2;
+	    /* Initialize dhmOffset */
+	    pSiS->dhmOffset = 0;
+	    /* Copy framebuffer addresses & sizes to entity */
+	    pSiSEnt->masterFbAddress = pSiS->FbAddress;
+	    pSiSEnt->masterFbSize    = pSiS->maxxfbmem;
+	    pSiSEnt->slaveFbAddress  = pSiS->FbAddress + pSiS->maxxfbmem;
+	    pSiSEnt->slaveFbSize     = pSiS->maxxfbmem;
+	    xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+	    		"%dKB video RAM at 0x%lx available for master head (CRT2)\n",
+	    		pSiS->maxxfbmem/1024, pSiS->FbAddress);
+	} else {
+	    /* ===== Second head (always CRT1) ===== */
+	    /* We use only half of the memory available */
+	    pSiS->maxxfbmem /= 2;
+	    /* Adapt FBAddress */
+	    pSiS->FbAddress += pSiS->maxxfbmem;
+	    /* Initialize dhmOffset */
+	    pSiS->dhmOffset = pSiS->availMem - pSiS->maxxfbmem;
+	    xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+	    		"%dKB video RAM at 0x%lx available for slave head (CRT1)\n",
+	    		pSiS->maxxfbmem/1024,  pSiS->FbAddress);
+	}
+    } else
+        pSiS->dhmOffset = 0;
+#endif
+
+    /* TW: Note: Do not use availMem for anything from now. Use
+     *     maxxfbmem instead. (availMem does not take dual head
+     *     mode into account.)
+     */
+
+    /* TW: Now for something completely different: DDC.
+           For 300 and 310/325 series, we provide our
+	   own functions (in order to probe CRT2 as well)
+	   If these fail, use the VBE.
+	   All other chipsets will use VBE. No need to re-invent
+	   the wheel there.
+     */
+
+    pSiS->pVbe = NULL;
+    didddc2 = FALSE;
+
+    if((pSiS->VGAEngine == SIS_300_VGA) || (pSiS->VGAEngine == SIS_315_VGA)) {
+	if(xf86LoadSubModule(pScrn, "ddc")) {
+          xf86LoaderReqSymLists(ddcSymbols, NULL);
+	  if((pMonitor = SiSDoPrivateDDC(pScrn))) {
+	     didddc2 = TRUE;
+	     xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+	   	"DDC monitor info:\n");
+	     xf86PrintEDID(pMonitor);
+	     xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+	   	"End of DDC monitor info\n");
+	     xf86SetDDCproperties(pScrn, pMonitor);
+	     pScrn->monitor->DDC = pMonitor;
+          }
+	}
+    }
+
+#ifdef SISDUALHEAD
+    /* TW: In dual head mode, probe DDC using VBE only for CRT1 (second head) */
+    if((pSiS->DualHeadMode) && (!didddc2) && (!pSiS->SecondHead))
+         didddc2 = TRUE;
+#endif
+
+    /* TW: If CRT1 is off (eventually forced), skip DDC */
+    if((!didddc2) && (pSiS->CRT1off)) didddc2 = TRUE;
+
+    /* TW: Now (re-)load and initialize the DDC module */
+    if(!didddc2) {
+
+       if(xf86LoadSubModule(pScrn, "ddc")) {
+
+          xf86LoaderReqSymLists(ddcSymbols, NULL);
+
+          /* TW: Now load and initialize VBE module. */
+          if(xf86LoadSubModule(pScrn, "vbe")) {
+	      xf86LoaderReqSymLists(vbeSymbols, NULL);
+#if XF86_VERSION_CURRENT < XF86_VERSION_NUMERIC(4,2,99,0,0)
+	      pSiS->pVbe = VBEInit(pSiS->pInt,pSiS->pEnt->index);
+#else
+              pSiS->pVbe = VBEExtendedInit(pSiS->pInt,pSiS->pEnt->index,
+	                SET_BIOS_SCRATCH | RESTORE_BIOS_SCRATCH);
+#endif
+              if(!pSiS->pVbe) {
+	         xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+	            "Could not initialize VBE module for DDC\n");
+              }
+          } else {
+              xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+	          "Could not load VBE module for DDC\n");
+          }
+
+  	  if(pSiS->pVbe) {
+	      if((pMonitor = vbeDoEDID(pSiS->pVbe,NULL))) {
+	         xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+	   	      "VBE DDC monitor info:\n");
+                 xf86SetDDCproperties(pScrn, xf86PrintEDID(pMonitor));
+		 xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+	   	      "End of VBE DDC monitor info:\n");
+		 pScrn->monitor->DDC = pMonitor;
+              }
+          } else {
+	      xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+			"Could not retrieve DDC data\n");
+	  }
+       }
+    }
+
+#if 0	/* TW: DDC1 obviously no longer supported by SiS chipsets */
+    if (!ret && pSiS->ddc1Read)
+        xf86SetDDCproperties(pScrn, xf86PrintEDID(xf86DoEDID_DDC1(
+             pScrn->scrnIndex,vgaHWddc1SetSpeed,pSiS->ddc1Read )));
+#endif
+
+    /* end of DDC */
 
     /* Set the min pixel clock */
-    pSiS->MinClock = 16250; /* XXX Guess, need to check this */
+    pSiS->MinClock = 12000;  /* XXX Guess, need to check this (TW: good for even 50Hz interlace) */
     xf86DrvMsg(pScrn->scrnIndex, X_DEFAULT, "Min pixel clock is %d MHz\n",
                 pSiS->MinClock / 1000);
 
@@ -1042,10 +3054,9 @@ SISPreInit(ScrnInfoPtr pScrn, int flags)
      * If the user has specified ramdac speed in the XF86Config
      * file, we respect that setting.
      */
-    if (pSiS->pEnt->device->dacSpeeds[0]) {
+    if(pSiS->pEnt->device->dacSpeeds[0]) {
         int speed = 0;
-
-        switch (pScrn->bitsPerPixel) {
+        switch(pScrn->bitsPerPixel) {
         case 8:
            speed = pSiS->pEnt->device->dacSpeeds[DAC_BPP8];
            break;
@@ -1059,7 +3070,7 @@ SISPreInit(ScrnInfoPtr pScrn, int flags)
            speed = pSiS->pEnt->device->dacSpeeds[DAC_BPP32];
            break;
         }
-        if (speed == 0)
+        if(speed == 0)
             pSiS->MaxClock = pSiS->pEnt->device->dacSpeeds[0];
         else
             pSiS->MaxClock = speed;
@@ -1078,8 +3089,131 @@ SISPreInit(ScrnInfoPtr pScrn, int flags)
     clockRanges->maxClock = pSiS->MaxClock;
     clockRanges->clockIndex = -1;               /* programmable */
     clockRanges->interlaceAllowed = TRUE;
-    clockRanges->doubleScanAllowed = TRUE;      /* XXX check this */
+    clockRanges->doubleScanAllowed = TRUE;
+
+    /* TW: If there is no HSync or VRefresh data for the monitor,
+           derive it from DDC data. (Idea taken from radeon driver)
+     */
+    if(pScrn->monitor->DDC) {
+       if(pScrn->monitor->nHsync <= 0) {
+         xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+	 	"Substituting missing monitor HSync data by DDC data\n");
+         SiSSetSyncRangeFromEdid(pScrn, 1);
+       }
+       if(pScrn->monitor->nVrefresh <= 0) {
+         xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+	 	"Substituting missing monitor VRefresh data by DDC data\n");
+         SiSSetSyncRangeFromEdid(pScrn, 0);
+       }
+    }
+
+    /*
+     * TW: Since we have lots of built-in modes for 300/310/325/330 series
+     *     with vb support, we replace the given default mode list with our 
+     *     own. In case the video bridge is to be used, no other than our 
+     *     built-in modes are supported; therefore, delete the entire modelist
+     *     given.
+     */
+     
+    pSiS->HaveCustomModes = FALSE;
+    if((pSiS->VGAEngine == SIS_300_VGA) || (pSiS->VGAEngine == SIS_315_VGA)) {
+      if(!(pSiS->noInternalModes)) {
+        if((mymodes = SiSBuildBuiltInModeList(pScrn))) {
+#ifdef SISDUALHEAD
+    	   if( (pSiS->UseVESA) || 
+	       ((pSiS->DualHeadMode) && (!pSiS->SecondHead)) ||
+	       ((!pSiS->DualHeadMode) && (pSiS->VBFlags & DISPTYPE_DISP2)) ) {
+#else	
+	   if((pSiS->UseVESA) || (pSiS->VBFlags & DISPTYPE_DISP2)) {
+#endif	   
+	      while(pScrn->monitor->Modes)
+                 xf86DeleteMode(&pScrn->monitor->Modes, pScrn->monitor->Modes);
+	      pScrn->monitor->Modes = mymodes;
+	   } else {
+	      delmode = pScrn->monitor->Modes;
+	      while(delmode) {
+	         if(delmode->type & M_T_DEFAULT) {
+	            tempmode = delmode->next;
+	            xf86DeleteMode(&pScrn->monitor->Modes, delmode);
+	            delmode = tempmode;
+	         } else {
+	            delmode = delmode->next;
+	         }
+	      }
+	      tempmode = pScrn->monitor->Modes;
+	      if(tempmode) pSiS->HaveCustomModes = TRUE;
+	      pScrn->monitor->Modes = mymodes;
+	      while(mymodes) {
+	         if(!mymodes->next) break;
+		 else mymodes = mymodes->next;
+	      }
+	      mymodes->next = tempmode;
+	      if(tempmode) {
+	         tempmode->prev = mymodes;
+	      }
+	   }	   
+	   xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+	        "Replaced %s mode list with built-in modes\n", 
+		pSiS->HaveCustomModes ? "default" : "entire");
+#ifdef TWDEBUG
+           pScrn->modes = pScrn->monitor->Modes;
+	   xf86PrintModes(pScrn);
+	   pScrn->modes = NULL;
+#endif		
+        } else {
+	   xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+	   	"Building list of built-in modes failed, using XFree86 defaults\n");
+	}
+      }
+    }
+
+    /*
+     * TW: Add our built-in modes for TV on the 6326
+     */
+    if((pSiS->Chipset == PCI_CHIP_SIS6326) && (pSiS->SiS6326Flags & SIS6326_HASTV)) {
+      if(pSiS->SiS6326Flags & SIS6326_TVDETECTED) {
+         xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+	 	"Adding %s TV modes for 6326 to mode list:\n",
+		(pSiS->SiS6326Flags & SIS6326_TVPAL) ? "PAL" : "NTSC");
+         if(pSiS->SiS6326Flags & SIS6326_TVPAL) {
+            SiS6326PAL800x600Mode.next = pScrn->monitor->Modes;
+            pScrn->monitor->Modes = &SiS6326PAL640x480Mode;
+	    xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+	     	"\"PAL800x600\" \"PAL800x600U\" \"PAL720x540\" \"PAL640x480\"\n");
+	 } else {
+	    SiS6326NTSC640x480Mode.next = pScrn->monitor->Modes;
+            pScrn->monitor->Modes = &SiS6326NTSC640x400Mode;
+	    xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+	     	"\"NTSC640x480\" \"NTSC640x480U\" \"NTSC640x400\"\n");
+	 }
+      }
+    }
+
+    /*
+     * TW: Add our built-in hi-res modes on the 6326
+     */
+    if(pSiS->Chipset == PCI_CHIP_SIS6326) {
+       if(pScrn->bitsPerPixel == 8) {
+          SiS6326SIS1600x1200_60Mode.next = pScrn->monitor->Modes;
+          pScrn->monitor->Modes = &SiS6326SIS1600x1200_60Mode;
+	  xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+	  	"Adding mode \"SIS1600x1200-60\" (depth 8 only)\n");
+       }
+       if(pScrn->bitsPerPixel <= 16) {
+          SiS6326SIS1280x1024_75Mode.next = pScrn->monitor->Modes;
+          pScrn->monitor->Modes = &SiS6326SIS1280x1024_75Mode;
+	  xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+	  	"Adding mode \"SIS1280x1024-75\" (depth 8, 15 and 16 only)\n");
+       }
+    }
 
+    if(pSiS->VGAEngine == SIS_300_VGA || pSiS->VGAEngine == SIS_315_VGA) {
+       xf86DrvMsg(pScrn->scrnIndex, X_INFO,	
+    	  "\"Unknown reason\" in the following list means that the mode\n");
+       xf86DrvMsg(pScrn->scrnIndex, X_INFO,	
+    	  "is not supported on the chipset/bridge/current output device.\n");
+    }
+	
     /*
      * xf86ValidateModes will check that the mode HTotal and VTotal values
      * don't exceed the chipset's limit if pScrn->maxHValue and
@@ -1089,8 +3223,8 @@ SISPreInit(ScrnInfoPtr pScrn, int flags)
 
     /* Select valid modes from those available */
     /*
-     * XXX Assuming min pitch 256, max 4096 ==> 8192
-     * XXX Assuming min height 128, max 4096
+     * Assuming min pitch 256, max 4096 ==> 8192
+     * Assuming min height 128, max 4096
      */
     i = xf86ValidateModes(pScrn, pScrn->monitor->Modes,
                       pScrn->display->modes, clockRanges,
@@ -1101,16 +3235,146 @@ SISPreInit(ScrnInfoPtr pScrn, int flags)
                       pSiS->maxxfbmem,
                       LOOKUP_BEST_REFRESH);
 
-    if (i == -1) {
+    if(i == -1) {
+        xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+	    	"xf86ValidateModes() error\n");
+#ifdef SISDUALHEAD
+	if(pSiSEnt) pSiSEnt->ErrorAfterFirst = TRUE;
+#endif
+	if(pSiS->pInt) xf86FreeInt10(pSiS->pInt);
+	sisRestoreExtRegisterLock(pSiS,srlockReg,crlockReg);
         SISFreeRec(pScrn);
         return FALSE;
     }
 
+    /* TW: Go through mode list and mark all those modes as bad,
+     *     - which are unsuitable for dual head mode (if running dhm),
+     *     - which exceed the LCD panels specs (if running on LCD)
+     *     - TODO: which exceed TV capabilities (if running on TV)
+     *     Also, find the highest used pixelclock on the master head.
+     */
+#ifdef SISDUALHEAD
+    if(pSiS->DualHeadMode) {
+       if(!pSiS->SecondHead) pSiSEnt->maxUsedClock = 0;
+    }
+#endif
+    if((p = first = pScrn->modes)) {
+         do {
+	       n = p->next;
+
+               /* TW: Check the modes if they comply with our built-in tables.
+	        *     This is of practical use only if the user disabled the
+	        *     usage of the internal (built-in) modes.
+		*/
+               if((pSiS->VGAEngine == SIS_300_VGA) || (pSiS->VGAEngine == SIS_315_VGA)) {
+	         if(p->type & M_T_DEFAULT) {  
+	           if( ( (strcmp(p->name, "320x200") != 0) &&
+		         (strcmp(p->name, "320x240") != 0) &&
+		         (strcmp(p->name, "400x300") != 0) &&
+		         (strcmp(p->name, "512x384") != 0) )  &&
+                       (p->Flags & V_DBLSCAN) ) {
+		           p->status = MODE_NO_DBLESCAN;
+		           xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+			        "Not using mode \"%s\" (mode not supported as doublescan)\n", p->name);
+                   }
+		   if( ( (strcmp(p->name, "1024x768")  != 0) &&
+		         (strcmp(p->name, "1280x1024") != 0) &&
+			 (strcmp(p->name, "848x480")   != 0) &&
+			 (strcmp(p->name, "856x480")   != 0))  &&
+                       (p->Flags & V_INTERLACE) ) {
+		           p->status = MODE_NO_INTERLACE;
+		           xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+			        "Not using mode \"%s\" (mode not supported as interlaced)\n", p->name);
+                   }
+		   if( ( (strcmp(p->name, "320x200") == 0) ||
+		         (strcmp(p->name, "320x240") == 0) ||
+		         (strcmp(p->name, "400x300") == 0) ||
+		         (strcmp(p->name, "512x384") == 0) )  &&
+		       (!(p->Flags & V_DBLSCAN)) ) {
+		       	   p->status = MODE_CLOCK_RANGE;
+			   xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+			        "Not using mode \"%s\" (only supported as doublescan)\n", p->name);
+		   }
+		 }
+	       }
+#ifdef SISDUALHEAD
+	       /* TW: Modes that require the bridge to operate in SlaveMode
+                *     are not suitable for Dual Head mode. Also check for
+		*     modes that exceed panel dimension.
+                */
+               if(pSiS->DualHeadMode) {
+	          if(pSiS->SecondHead == FALSE) {
+	             if( (strcmp(p->name, "320x200") == 0) ||
+		         (strcmp(p->name, "320x240") == 0) ||
+		         (strcmp(p->name, "400x300") == 0) ||
+		         (strcmp(p->name, "512x384") == 0) ||
+		         (strcmp(p->name, "640x400") == 0) )  {
+	    	        p->status = MODE_BAD;
+		        xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+			   "Not using mode \"%s\" (not suitable for dual head mode)\n",
+			   p->name);
+		     }
+                  }
+                  if(pSiS->VBFlags & DISPTYPE_DISP2) {
+	            if(pSiS->VBFlags & CRT2_LCD) {
+		      if(pSiS->SecondHead == FALSE) {
+		        if((p->HDisplay > pSiS->LCDwidth) || (p->VDisplay > pSiS->LCDheight)) {
+		            p->status = MODE_PANEL;
+		            xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+			      "Not using mode \"%s\" (exceeds LCD panel dimension)\n", p->name);
+	                }
+			if(p->Flags & V_INTERLACE) {
+			    p->status = MODE_BAD;
+			    xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+			        "Not using mode \"%s\" (interlace on LCD not supported)\n",
+				p->name);
+			}
+		      }
+		    }
+		    /* TO DO: TV */
+	          }
+		  /* TW: Search for the highest clock on first head in order to calculate
+		   *     max clock for second head (CRT1)
+		   */
+		  if(!pSiS->SecondHead) {
+		     if((p->status == MODE_OK) && (p->Clock > pSiSEnt->maxUsedClock)) {
+		  		pSiSEnt->maxUsedClock = p->Clock;
+		     }
+		  }
+	       } else {
+#endif
+	          if(pSiS->VBFlags & DISPTYPE_DISP2) {
+	              if(pSiS->VBFlags & CRT2_LCD) {
+		          if((p->HDisplay > pSiS->LCDwidth) || (p->VDisplay > pSiS->LCDheight)) {
+		            p->status = MODE_PANEL;
+		            xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+			        "Not using mode \"%s\" (exceeds LCD panel dimension)\n", p->name);
+	                  }
+			  if(p->Flags & V_INTERLACE) {
+			    p->status = MODE_BAD;
+			    xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+			        "Not using mode \"%s\" (interlace on LCD not supported)\n",
+				p->name);
+			  }
+		      }
+	          }
+#ifdef SISDUALHEAD
+               }
+#endif
+	       p = n;
+         } while (p != NULL && p != first);
+    }
+
     /* Prune the modes marked as invalid */
     xf86PruneDriverModes(pScrn);
 
-    if (i == 0 || pScrn->modes == NULL) {
+    if(i == 0 || pScrn->modes == NULL) {
         xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "No valid modes found\n");
+#ifdef SISDUALHEAD
+	if(pSiSEnt) pSiSEnt->ErrorAfterFirst = TRUE;
+#endif
+	if(pSiS->pInt) xf86FreeInt10(pSiS->pInt);
+	sisRestoreExtRegisterLock(pSiS,srlockReg,crlockReg);
         SISFreeRec(pScrn);
         return FALSE;
     }
@@ -1120,119 +3384,143 @@ SISPreInit(ScrnInfoPtr pScrn, int flags)
     /* Set the current mode to the first in the list */
     pScrn->currentMode = pScrn->modes;
 
+    /* TW: Copy to CurrentLayout */
+    pSiS->CurrentLayout.mode = pScrn->currentMode;
+    pSiS->CurrentLayout.displayWidth = pScrn->displayWidth;
+
     /* Print the list of modes being used */
     xf86PrintModes(pScrn);
 
+#ifdef SISDUALHEAD
+    /* TW: Due to palette & timing problems we don't support 8bpp in DHM */
+    if((pSiS->DualHeadMode) && (pScrn->bitsPerPixel == 8)) {
+    	xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+		"Colordepth 8 not supported in Dual Head mode.\n");
+	if(pSiSEnt) pSiSEnt->ErrorAfterFirst = TRUE;
+	if(pSiS->pInt) xf86FreeInt10(pSiS->pInt);
+	sisRestoreExtRegisterLock(pSiS,srlockReg,crlockReg);
+        SISFreeRec(pScrn);
+        return FALSE;
+    }
+#endif
+
     /* Set display resolution */
     xf86SetDpi(pScrn, 0, 0);
 
     /* Load bpp-specific modules */
-    switch (pScrn->bitsPerPixel) {
-    case 1:
+    switch(pScrn->bitsPerPixel) {
+      case 1:
         mod = "xf1bpp";
         Sym = "xf1bppScreenInit";
         break;
-    case 4:
+      case 4:
         mod = "xf4bpp";
         Sym = "xf4bppScreenInit";
         break;
-    case 8:
-    case 16:
-    case 24:
-    case 32:
+      case 8:
+      case 16:
+      case 24:
+      case 32:
         mod = "fb";
 	break;
     }
 
-    if (mod && xf86LoadSubModule(pScrn, mod) == NULL) {
+    if(mod && xf86LoadSubModule(pScrn, mod) == NULL) {
+        xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+	    	"Could not load %s module", mod);
+#ifdef SISDUALHEAD
+	if(pSiSEnt) pSiSEnt->ErrorAfterFirst = TRUE;
+#endif
+	if(pSiS->pInt) xf86FreeInt10(pSiS->pInt);
+	sisRestoreExtRegisterLock(pSiS,srlockReg,crlockReg);
         SISFreeRec(pScrn);
         return FALSE;
     }
 
-    if (mod) {
-	if (Sym) {
+    if(mod) {
+	if(Sym) {
 	    xf86LoaderReqSymbols(Sym, NULL);
 	} else {
 	    xf86LoaderReqSymLists(fbSymbols, NULL);
 	}
     }
 
-    if (!xf86LoadSubModule(pScrn, "i2c")) {
-        SISFreeRec(pScrn);
-        return FALSE;
-    }
-
-    xf86LoaderReqSymLists(i2cSymbols, NULL);
-
     /* Load XAA if needed */
-    if (!pSiS->NoAccel) {
-        xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Accel Enable\n");
-        if (!xf86LoadSubModule(pScrn, "xaa")) {
+    if(!pSiS->NoAccel) {
+        xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Accel enabled\n");
+        if(!xf86LoadSubModule(pScrn, "xaa")) {
+	    xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+	    	"Could not load xaa module\n");
+#ifdef SISDUALHEAD
+	    if(pSiSEnt) pSiSEnt->ErrorAfterFirst = TRUE;
+#endif
+	    if(pSiS->pInt) xf86FreeInt10(pSiS->pInt);
+	    sisRestoreExtRegisterLock(pSiS,srlockReg,crlockReg);
             SISFreeRec(pScrn);
             return FALSE;
         }
-
         xf86LoaderReqSymLists(xaaSymbols, NULL);
     }
 
     /* Load shadowfb if needed */
-    if (pSiS->ShadowFB) {
-        if (!xf86LoadSubModule(pScrn, "shadowfb")) {
-            SISFreeRec(pScrn);
+    if(pSiS->ShadowFB) {
+        if(!xf86LoadSubModule(pScrn, "shadowfb")) {
+	    xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+	    	"Could not load shadowfb module\n");
+#ifdef SISDUALHEAD
+	    if(pSiSEnt) pSiSEnt->ErrorAfterFirst = TRUE;
+#endif
+	    if(pSiS->pInt) xf86FreeInt10(pSiS->pInt);
+	    sisRestoreExtRegisterLock(pSiS,srlockReg,crlockReg);
+	    SISFreeRec(pScrn);
             return FALSE;
         }
         xf86LoaderReqSymLists(shadowSymbols, NULL);
     }
 
-    /* Load DDC if needed */
-    /* This gives us DDC1 - we should be able to get DDC2B using i2c */
-    if (!xf86LoadSubModule(pScrn, "ddc")) {
-        SISFreeRec(pScrn);
-        return FALSE;
-    }
-    xf86LoaderReqSymLists(ddcSymbols, NULL);
 
-/* TW: Now load and initialize VBE module. The default behavior
- *     for SiS630 with SiS301B, SiS302 or LVDS/CHRONTEL bridge
- *     is to use VESA for mode switching. This can be overruled
- *     with the option "VESA".
- */
+    /* TW: Now load and initialize VBE module for VESA. */
+    pSiS->UseVESA = 0;
+    if(pSiS->VESA == 1) {
+       if(!pSiS->pVbe) {
+          if(xf86LoadSubModule(pScrn, "vbe")) {
+	     xf86LoaderReqSymLists(vbeSymbols, NULL);
+#if XF86_VERSION_CURRENT < XF86_VERSION_NUMERIC(4,2,99,0,0)
+	     pSiS->pVbe = VBEInit(pSiS->pInt,pSiS->pEnt->index);
+#else
+             pSiS->pVbe = VBEExtendedInit(pSiS->pInt,pSiS->pEnt->index,
+	     			SET_BIOS_SCRATCH | RESTORE_BIOS_SCRATCH);
+#endif
+          }
+       }
+       if(pSiS->pVbe) {
+	     vbe = VBEGetVBEInfo(pSiS->pVbe);
+	     pSiS->vesamajor = (unsigned)(vbe->VESAVersion >> 8);
+	     pSiS->vesaminor = vbe->VESAVersion & 0xff;
+	     pSiS->vbeInfo = vbe;
+	     SiSBuildVesaModeList(pScrn, pSiS->pVbe, vbe);
+	     VBEFreeVBEInfo(vbe);
+	     pSiS->UseVESA = 1;
+       } else {
+	     xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+	     	"Could not load and initialize VBE module. VESA disabled.\n");
+       }
+    }
 
-    {
-	Bool ret;
-	pSiS->UseVESA=0;
-	if (xf86LoadSubModule(pScrn, "vbe")) {
-	    xf86LoaderReqSymLists(vbeSymbols, NULL);
-	    if ((pSiS->pVbe = VBEExtendedInit(NULL,pSiS->pEnt->index,
-					      SET_BIOS_SCRATCH
-					      | RESTORE_BIOS_SCRATCH))) {
-		ret = xf86SetDDCproperties(pScrn,
-				   xf86PrintEDID(vbeDoEDID(pSiS->pVbe,NULL)));
-		if ( (pSiS->VESA == 1)
-		    || (   (pSiS->VESA != 0)
-			&& (pSiS->Chipset == PCI_CHIP_SIS630)
-			&& (pSiS->VBFlags & (VB_301B|VB_302|VB_LVDS|VB_CHRONTEL))) ) {
-		    vbe = VBEGetVBEInfo(pSiS->pVbe);
-		    pSiS->vesamajor = (unsigned)(vbe->VESAVersion >> 8);
-		    pSiS->vesaminor = vbe->VESAVersion & 0xff;
-		    pSiS->vbeInfo = vbe;
-		    SiSBuildVesaModeList(pScrn->scrnIndex,pSiS->pVbe, vbe);
-		    VBEFreeVBEInfo(vbe);
-		    pSiS->UseVESA = 1;
-		    /* TW: from now, use VESA functions for mode switching */
-		}
-	    }
-	}
-	vbeFree(pSiS->pVbe);
-	pSiS->pVbe = NULL;
+    if(pSiS->pVbe) {
+       vbeFree(pSiS->pVbe);
+       pSiS->pVbe = NULL;
     }
-    
-#if 0
-    if (!ret && pSiS->ddc1Read)
-        xf86SetDDCProperties(xf86PrintEDID(xf86DoEDID_DDC1(
-             pScrn->scrnIndex,vgaHWddc1SetSpeed,pSiS->ddc1Read )));
+
+#ifdef SISDUALHEAD
+    xf86SetPrimInitDone(pScrn->entityList[0]);
 #endif
 
+    sisRestoreExtRegisterLock(pSiS,srlockReg,crlockReg);
+
+    if(pSiS->pInt) xf86FreeInt10(pSiS->pInt);
+    pSiS->pInt = NULL;
+
     return TRUE;
 }
 
@@ -1246,9 +3534,15 @@ SISMapMem(ScrnInfoPtr pScrn)
 {
     SISPtr pSiS;
     int mmioFlags;
-
+#ifdef SISDUALHEAD
+    SISEntPtr pSiSEnt = NULL;
+#endif
     pSiS = SISPTR(pScrn);
 
+#ifdef SISDUALHEAD
+    pSiSEnt = pSiS->entityPrivate;
+#endif
+
     /*
      * Map IO registers to virtual address space
      */
@@ -1261,29 +3555,82 @@ SISMapMem(ScrnInfoPtr pScrn)
      */
     mmioFlags = VIDMEM_MMIO | VIDMEM_SPARSE;
 #endif
-    pSiS->IOBase = xf86MapPciMem(pScrn->scrnIndex, mmioFlags, 
+
+#ifdef SISDUALHEAD
+    if(pSiS->DualHeadMode) {
+        pSiSEnt->MapCountIOBase++;
+        if(!(pSiSEnt->IOBase)) {
+	     /* TW: Only map if not mapped previously */
+    	     pSiSEnt->IOBase = xf86MapPciMem(pScrn->scrnIndex, mmioFlags,
+                         pSiS->PciTag, pSiS->IOAddress, 0x10000);
+        }
+        pSiS->IOBase = pSiSEnt->IOBase;
+    } else
+#endif
+    	pSiS->IOBase = xf86MapPciMem(pScrn->scrnIndex, mmioFlags,
                         pSiS->PciTag, pSiS->IOAddress, 0x10000);
-    if (pSiS->IOBase == NULL)
+
+    if(pSiS->IOBase == NULL) {
+    	xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+	    	"Could not map MMIO area\n");
         return FALSE;
+    }
 
 #ifdef __alpha__
     /*
      * for Alpha, we need to map DENSE memory as well, for
      * setting CPUToScreenColorExpandBase.
      */
-    pSiS->IOBaseDense = xf86MapPciMem(pScrn->scrnIndex, VIDMEM_MMIO,
+#ifdef SISDUALHEAD
+    if(pSiS->DualHeadMode) {
+        pSiSEnt->MapCountIOBaseDense++;
+        if(!(pSiSEnt->IOBaseDense)) {
+	     /* TW: Only map if not mapped previously */
+	     pSiSEnt->IOBaseDense = xf86MapPciMem(pScrn->scrnIndex, VIDMEM_MMIO,
+                    pSiS->PciTag, pSiS->IOAddress, 0x10000);
+	}
+	pSiS->IOBaseDense = pSiSEnt->IOBaseDense;
+    } else
+#endif
+    	pSiS->IOBaseDense = xf86MapPciMem(pScrn->scrnIndex, VIDMEM_MMIO,
                     pSiS->PciTag, pSiS->IOAddress, 0x10000);
 
-    if (pSiS->IOBaseDense == NULL)
+    if(pSiS->IOBaseDense == NULL) {
+        xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+	    	"Could not map MMIO dense area\n");
         return FALSE;
+    }
+
 #endif /* __alpha__ */
 
-    pSiS->FbBase = xf86MapPciMem(pScrn->scrnIndex, VIDMEM_FRAMEBUFFER,
-                         pSiS->PciTag,
-                         (unsigned long)pSiS->FbAddress,
+#ifdef SISDUALHEAD
+    if(pSiS->DualHeadMode) {
+        pSiSEnt->MapCountFbBase++;
+        if(!(pSiSEnt->FbBase)) {
+	     /* TW: Only map if not mapped previously */
+    	     pSiSEnt->FbBase = xf86MapPciMem(pScrn->scrnIndex, VIDMEM_FRAMEBUFFER,
+                         pSiS->PciTag, (unsigned long)pSiS->realFbAddress,
                          pSiS->FbMapSize);
-    if (pSiS->FbBase == NULL)
-        return FALSE;
+	     pSiS->sishw_ext.pjVideoMemoryAddress = (UCHAR *)pSiSEnt->FbBase;
+        }
+        pSiS->FbBase = pSiSEnt->FbBase;
+     	/* TW: Adapt FbBase (for DHM; dhmOffset is 0 otherwise) */
+	pSiS->FbBase += pSiS->dhmOffset;
+    } else {
+#endif
+    	pSiS->FbBase = xf86MapPciMem(pScrn->scrnIndex, VIDMEM_FRAMEBUFFER,
+                         pSiS->PciTag, (unsigned long)pSiS->FbAddress,
+                         pSiS->FbMapSize);
+	pSiS->sishw_ext.pjVideoMemoryAddress = (UCHAR *)pSiS->FbBase;
+#ifdef SISDUALHEAD
+    }
+#endif
+
+    if(pSiS->FbBase == NULL) {
+        xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+	    	"Could not map framebuffer area\n");
+       	return FALSE;
+    }
 
     return TRUE;
 }
@@ -1297,22 +3644,67 @@ static Bool
 SISUnmapMem(ScrnInfoPtr pScrn)
 {
     SISPtr pSiS;
+#ifdef SISDUALHEAD
+    SISEntPtr pSiSEnt = NULL;
+#endif
 
     pSiS = SISPTR(pScrn);
 
-    /*
-     * Unmap IO registers to virtual address space
-     */ 
-    xf86UnMapVidMem(pScrn->scrnIndex, (pointer)pSiS->IOBase, 0x10000);
-    pSiS->IOBase = NULL;
+#ifdef SISDUALHEAD
+    pSiSEnt = pSiS->entityPrivate;
+#endif
 
+/* TW: In dual head mode, we must not unmap if the other head still
+ *     assumes memory as mapped
+*/
+#ifdef SISDUALHEAD
+    if (pSiS->DualHeadMode) {
+        if (pSiSEnt->MapCountIOBase) {
+	    pSiSEnt->MapCountIOBase--;
+	    if ((pSiSEnt->MapCountIOBase == 0) || (pSiSEnt->forceUnmapIOBase)) {
+	    	xf86UnMapVidMem(pScrn->scrnIndex, (pointer)pSiSEnt->IOBase, 0x10000);
+	    	pSiSEnt->IOBase = NULL;
+		pSiSEnt->MapCountIOBase = 0;
+		pSiSEnt->forceUnmapIOBase = FALSE;
+	    }
+	    pSiS->IOBase = NULL;
+	}
 #ifdef __alpha__
-    xf86UnMapVidMem(pScrn->scrnIndex, (pointer)pSiS->IOBaseDense, 0x10000);
-    pSiS->IOBaseDense = NULL;
+	if (pSiSEnt->MapCountIOBaseDense) {
+	    pSiSEnt->MapCountIOBaseDense--;
+	    if ((pSiSEnt->MapCountIOBaseDense == 0) || (pSiSEnt->forceUnmapIOBaseDense)) {
+	    	xf86UnMapVidMem(pScrn->scrnIndex, (pointer)pSiSEnt->IOBaseDense, 0x10000);
+	    	pSiSEnt->IOBaseDense = NULL;
+		pSiSEnt->MapCountIOBaseDense = 0;
+		pSiSEnt->forceUnmapIOBaseDense = FALSE;
+	    }
+	    pSiS->IOBaseDense = NULL;
+	}
 #endif /* __alpha__ */
+	if (pSiSEnt->MapCountFbBase) {
+	    pSiSEnt->MapCountFbBase--;
+	    if ((pSiSEnt->MapCountFbBase == 0) || (pSiSEnt->forceUnmapFbBase)) {
+	    	xf86UnMapVidMem(pScrn->scrnIndex, (pointer)pSiSEnt->FbBase, pSiS->FbMapSize);
+	    	pSiSEnt->FbBase = NULL;
+		pSiSEnt->MapCountFbBase = 0;
+		pSiSEnt->forceUnmapFbBase = FALSE;
 
-    xf86UnMapVidMem(pScrn->scrnIndex, (pointer)pSiS->FbBase, pSiS->FbMapSize);
-    pSiS->FbBase = NULL;
+	    }
+	    pSiS->FbBase = NULL;
+	}
+    } else {
+#endif
+    	xf86UnMapVidMem(pScrn->scrnIndex, (pointer)pSiS->IOBase, 0x10000);
+    	pSiS->IOBase = NULL;
+#ifdef __alpha__
+    	xf86UnMapVidMem(pScrn->scrnIndex, (pointer)pSiS->IOBaseDense, 0x10000);
+    	pSiS->IOBaseDense = NULL;
+#endif
+    	xf86UnMapVidMem(pScrn->scrnIndex, (pointer)pSiS->FbBase, pSiS->FbMapSize);
+    	pSiS->FbBase = NULL;
+#ifdef SISDUALHEAD
+    }
+#endif
     return TRUE;
 }
 
@@ -1327,18 +3719,207 @@ SISSave(ScrnInfoPtr pScrn)
     SISRegPtr sisReg;
 
     pSiS = SISPTR(pScrn);
+
+#ifdef SISDUALHEAD
+    /* TW: We always save master & slave */
+    if(pSiS->DualHeadMode && pSiS->SecondHead) return;
+#endif
+
     vgaReg = &VGAHWPTR(pScrn)->SavedReg;
     sisReg = &pSiS->SavedReg;
 
     vgaHWSave(pScrn, vgaReg, VGA_SR_ALL);
 
-    /* Save and unlock extended SIS registers */
-    SISSaveUnlockExtRegisterLock(sisReg);
+    sisSaveUnlockExtRegisterLock(pSiS,&sisReg->sisRegs3C4[0x05],&sisReg->sisRegs3D4[0x80]);
 
     (*pSiS->SiSSave)(pScrn, sisReg);
+    
     if(pSiS->UseVESA) SISVESASaveRestore(pScrn, MODE_SAVE);
+    
+    /* TW: Save these as they may have been changed prior to SISSave() call */
+    if((pSiS->VGAEngine == SIS_300_VGA) || (pSiS->VGAEngine == SIS_315_VGA)) {
+    	sisReg->sisRegs3D4[0x17] = pSiS->oldCR17;
+	if(vgaReg->numCRTC >= 0x17) vgaReg->CRTC[0x17] = pSiS->oldCR17;
+	sisReg->sisRegs3D4[0x32] = pSiS->oldCR32;
+    }
+}
+
+/*
+ * TW: Just adapted from the std* functions in vgaHW.c
+ */
+static void
+SiS_WriteAttr(SISPtr pSiS, int index, int value)
+{
+    CARD8 tmp;
+
+    tmp = inb(pSiS->IODBase + VGA_IOBASE_COLOR + VGA_IN_STAT_1_OFFSET);
+
+    index |= 0x20;
+    outb(pSiS->IODBase + VGA_ATTR_INDEX, index);
+    outb(pSiS->IODBase + VGA_ATTR_DATA_W, value);
+}
+
+static int
+SiS_ReadAttr(SISPtr pSiS, int index)
+{
+    CARD8 tmp;
+
+    tmp = inb(pSiS->IODBase + VGA_IOBASE_COLOR + VGA_IN_STAT_1_OFFSET);
+
+    index |= 0x20;
+    outb(pSiS->IODBase + VGA_ATTR_INDEX, index);
+    return (inb(pSiS->IODBase + VGA_ATTR_DATA_R));
 }
 
+
+static void
+SiS_SaveFonts(ScrnInfoPtr pScrn)
+{
+    SISPtr pSiS = SISPTR(pScrn);
+    unsigned char miscOut, attr10, gr4, gr5, gr6, seq2, seq4, scrn;
+#if XF86_VERSION_CURRENT < XF86_VERSION_NUMERIC(4,2,99,0,0)
+    CARD8 *vgaIOBase = (CARD8 *)VGAHWPTR(pScrn)->IOBase;
+#else
+    pointer vgaIOBase = VGAHWPTR(pScrn)->Base;
+#endif
+
+    if (pSiS->fonts != NULL)
+	return;
+
+    /* If in graphics mode, don't save anything */
+    attr10 = SiS_ReadAttr(pSiS, 0x10);
+    if (attr10 & 0x01)
+	return;
+
+    pSiS->fonts = xalloc(16384);
+
+    /* save the registers that are needed here */
+    miscOut = inSISREG(SISMISCR);
+    inSISIDXREG(SISGR, 0x04, gr4);
+    inSISIDXREG(SISGR, 0x05, gr5);
+    inSISIDXREG(SISGR, 0x06, gr6);
+    inSISIDXREG(SISSR, 0x02, seq2);
+    inSISIDXREG(SISSR, 0x04, seq4);
+
+    /* Force into color mode */
+    outSISREG(SISMISCW, miscOut | 0x01);
+
+    inSISIDXREG(SISSR, 0x01, scrn);
+    outSISIDXREG(SISSR, 0x00, 0x01);
+    outSISIDXREG(SISSR, 0x01, scrn | 0x20);
+    outSISIDXREG(SISSR, 0x00, 0x03);
+
+    SiS_WriteAttr(pSiS, 0x10, 0x01);  /* graphics mode */
+
+    /*font1 */
+    outSISIDXREG(SISSR, 0x02, 0x04);  /* write to plane 2 */
+    outSISIDXREG(SISSR, 0x04, 0x06);  /* enable plane graphics */
+    outSISIDXREG(SISGR, 0x04, 0x02);  /* read plane 2 */
+    outSISIDXREG(SISGR, 0x05, 0x00);  /* write mode 0, read mode 0 */
+    outSISIDXREG(SISGR, 0x06, 0x05);  /* set graphics */
+    slowbcopy_frombus(vgaIOBase, pSiS->fonts, 8192);
+
+    /* font2 */
+    outSISIDXREG(SISSR, 0x02, 0x08);  /* write to plane 3 */
+    outSISIDXREG(SISSR, 0x04, 0x06);  /* enable plane graphics */
+    outSISIDXREG(SISGR, 0x04, 0x03);  /* read plane 3 */
+    outSISIDXREG(SISGR, 0x05, 0x00);  /* write mode 0, read mode 0 */
+    outSISIDXREG(SISGR, 0x06, 0x05);  /* set graphics */
+    slowbcopy_frombus(vgaIOBase, pSiS->fonts + 8192, 8192);
+
+    inSISIDXREG(SISSR, 0x01, scrn);
+    outSISIDXREG(SISSR, 0x00, 0x01);
+    outSISIDXREG(SISSR, 0x01, scrn & ~0x20);
+    outSISIDXREG(SISSR, 0x00, 0x03);
+
+    /* Restore clobbered registers */
+    SiS_WriteAttr(pSiS, 0x10, attr10);
+    outSISIDXREG(SISSR, 0x02, seq2);
+    outSISIDXREG(SISSR, 0x04, seq4);
+    outSISIDXREG(SISGR, 0x04, gr4);
+    outSISIDXREG(SISGR, 0x05, gr5);
+    outSISIDXREG(SISGR, 0x06, gr6);
+    outSISREG(SISMISCW, miscOut);
+}
+
+static void
+SiS_RestoreFonts(ScrnInfoPtr pScrn)
+{
+    SISPtr pSiS = SISPTR(pScrn);
+    unsigned char miscOut, attr10, gr1, gr3, gr4, gr5, gr6, gr8, seq2, seq4, scrn;
+#if XF86_VERSION_CURRENT < XF86_VERSION_NUMERIC(4,2,99,0,0)
+    CARD8 *vgaIOBase = (CARD8 *)VGAHWPTR(pScrn)->IOBase;
+#else
+    pointer vgaIOBase = VGAHWPTR(pScrn)->Base;
+#endif
+
+    if (pSiS->fonts == NULL)
+	return;
+
+#if 0
+    if (pVesa->mapPhys == 0xa0000 && pVesa->curBank != 0)
+	VESABankSwitch(pScrn->pScreen, 0);
+#endif
+
+    /* save the registers that are needed here */
+    miscOut = inSISREG(SISMISCR);
+    attr10 = SiS_ReadAttr(pSiS, 0x10);
+    inSISIDXREG(SISGR, 0x01, gr1);
+    inSISIDXREG(SISGR, 0x03, gr3);
+    inSISIDXREG(SISGR, 0x04, gr4);
+    inSISIDXREG(SISGR, 0x05, gr5);
+    inSISIDXREG(SISGR, 0x06, gr6);
+    inSISIDXREG(SISGR, 0x08, gr8);
+    inSISIDXREG(SISSR, 0x02, seq2);
+    inSISIDXREG(SISSR, 0x04, seq4);
+
+    /* Force into color mode */
+    outSISREG(SISMISCW, miscOut | 0x01);
+    inSISIDXREG(SISSR, 0x01, scrn);
+    outSISIDXREG(SISSR, 0x00, 0x01);
+    outSISIDXREG(SISSR, 0x01, scrn | 0x20);
+    outSISIDXREG(SISSR, 0x00, 0x03);
+
+    SiS_WriteAttr(pSiS, 0x10, 0x01);	  /* graphics mode */
+    if (pScrn->depth == 4) {
+        outSISIDXREG(SISGR, 0x03, 0x00);  /* don't rotate, write unmodified */
+	outSISIDXREG(SISGR, 0x08, 0xFF);  /* write all bits in a byte */
+	outSISIDXREG(SISGR, 0x01, 0x00);  /* all planes come from CPU */
+    }
+
+    outSISIDXREG(SISSR, 0x02, 0x04); /* write to plane 2 */
+    outSISIDXREG(SISSR, 0x04, 0x06); /* enable plane graphics */
+    outSISIDXREG(SISGR, 0x04, 0x02); /* read plane 2 */
+    outSISIDXREG(SISGR, 0x05, 0x00); /* write mode 0, read mode 0 */
+    outSISIDXREG(SISGR, 0x06, 0x05); /* set graphics */
+    slowbcopy_tobus(pSiS->fonts, vgaIOBase, 8192);
+
+    outSISIDXREG(SISSR, 0x02, 0x08); /* write to plane 3 */
+    outSISIDXREG(SISSR, 0x04, 0x06); /* enable plane graphics */
+    outSISIDXREG(SISGR, 0x04, 0x03); /* read plane 3 */
+    outSISIDXREG(SISGR, 0x05, 0x00); /* write mode 0, read mode 0 */
+    outSISIDXREG(SISGR, 0x06, 0x05); /* set graphics */
+    slowbcopy_tobus(pSiS->fonts + 8192, vgaIOBase, 8192);
+
+    inSISIDXREG(SISSR, 0x01, scrn);
+    outSISIDXREG(SISSR, 0x00, 0x01);
+    outSISIDXREG(SISSR, 0x01, scrn & ~0x20);
+    outSISIDXREG(SISSR, 0x00, 0x03);
+
+    /* restore the registers that were changed */
+    outSISREG(SISMISCW, miscOut);
+    SiS_WriteAttr(pSiS, 0x10, attr10);
+    outSISIDXREG(SISGR, 0x01, gr1);
+    outSISIDXREG(SISGR, 0x03, gr3);
+    outSISIDXREG(SISGR, 0x04, gr4);
+    outSISIDXREG(SISGR, 0x05, gr5);
+    outSISIDXREG(SISGR, 0x06, gr6);
+    outSISIDXREG(SISGR, 0x08, gr8);
+    outSISIDXREG(SISSR, 0x02, seq2);
+    outSISIDXREG(SISSR, 0x04, seq4);
+}
+
+/* TW: VESASaveRestore taken from vesa driver */
 static void
 SISVESASaveRestore(ScrnInfoPtr pScrn, vbeSaveRestoreFunction function)
 {
@@ -1346,11 +3927,56 @@ SISVESASaveRestore(ScrnInfoPtr pScrn, vbeSaveRestoreFunction function)
 
     pSiS = SISPTR(pScrn);
 
-    if (pSiS->vesamajor > 1
-	&& (function == MODE_SAVE || pSiS->pstate)) {
+    /* Query amount of memory to save state */
+    if (function == MODE_QUERY ||
+	(function == MODE_SAVE && pSiS->state == NULL)) {
+
+	/* Make sure we save at least this information in case of failure */
+	(void)VBEGetVBEMode(pSiS->pVbe, &pSiS->stateMode);
+	SiS_SaveFonts(pScrn);
+
+        if (pSiS->vesamajor > 1) {
+	    if (!VBESaveRestore(pSiS->pVbe,function,(pointer)&pSiS->state,
+				&pSiS->stateSize,&pSiS->statePage))
+	        return;
+
+	}
+    }
+
+    /* Save/Restore Super VGA state */
+    if (function != MODE_QUERY) {
+        Bool retval = TRUE;
+
+	if (pSiS->vesamajor > 1) {
+	    if (function == MODE_RESTORE)
+		memcpy(pSiS->state, pSiS->pstate, pSiS->stateSize);
+
+	    if ((retval = VBESaveRestore(pSiS->pVbe,function,
+					 (pointer)&pSiS->state,
+					 &pSiS->stateSize,&pSiS->statePage))
+		&& function == MODE_SAVE) {
+	        /* don't rely on the memory not being touched */
+	        if (pSiS->pstate == NULL)
+		    pSiS->pstate = xalloc(pSiS->stateSize);
+		memcpy(pSiS->pstate, pSiS->state, pSiS->stateSize);
+	    }
+	}
+
+	if (function == MODE_RESTORE) {
+	    VBESetVBEMode(pSiS->pVbe, pSiS->stateMode, NULL);
+	    SiS_RestoreFonts(pScrn);
+	}
+#if 0
+	if (!retval)
+	    return (FALSE);
+#endif
+
+    }
+#if 0
+    if ( (pSiS->vesamajor > 1) &&
+	 (function == MODE_SAVE || pSiS->pstate) ) {
 	if (function == MODE_RESTORE)
 	    memcpy(pSiS->state, pSiS->pstate, pSiS->stateSize);
-	ErrorF("VBESaveRestore\n");
 	if ((VBESaveRestore(pSiS->pVbe,function,
 				     (pointer)&pSiS->state,
 			    &pSiS->stateSize,&pSiS->statePage))) {
@@ -1360,23 +3986,26 @@ SISVESASaveRestore(ScrnInfoPtr pScrn, vbeSaveRestoreFunction function)
 		    pSiS->pstate = xalloc(pSiS->stateSize);
 		memcpy(pSiS->pstate, pSiS->state, pSiS->stateSize);
 	    }
-	    ErrorF("VBESaveRestore done with success\n");
+	    xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3,
+	    		"VBESaveRestore done with success\n");
 	    return;
 	}
-	ErrorF("VBESaveRestore done\n");
+	xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3,
+			"VBESaveRestore done\n");
     } else {
 	if (function == MODE_SAVE)
 	    (void)VBEGetVBEMode(pSiS->pVbe, &pSiS->stateMode);
 	else
 	    VBESetVBEMode(pSiS->pVbe, pSiS->stateMode, NULL);
     }
+#endif
 }
 
 /*
- * Initialise a new mode.  This is currently still using the old
- * "initialise struct, restore/write struct to HW" model.  That could
- * be changed.
- * TW: Why?
+ * Initialise a new mode.  This is currently done using the
+ * "initialise struct, restore/write struct to HW" model for
+ * the old chipsets (5597/530/6326). For newer chipsets,
+ * we use either VESA or our own mode switching code.
  */
 
 static Bool
@@ -1388,17 +4017,25 @@ SISModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
     SISRegPtr sisReg;
 
     vgaHWUnlock(hwp);
-	
+
     SISModifyModeInfo(mode);
 
-    /* TW: Initialize SiS Port Reg definitions for externally used
-     *     sis_bios functions.
+    /* TW: Initialize SiS Port Register definitions for externally used
+     *     BIOS emulation (native code switching) functions.
      */
-    SiSRegInit(pSiS->RelIO+0x30);
+    if( pSiS->VGAEngine == SIS_300_VGA ||
+		        pSiS->VGAEngine == SIS_315_VGA ) {
+       SiSRegInit(pSiS->SiS_Pr, pSiS->RelIO+0x30);
+    }
 
     if (pSiS->UseVESA) {  /* With VESA: */
+
+#ifdef SISDUALHEAD
+	/* TW: No dual head mode when using VESA */
+	if (pSiS->SecondHead) return TRUE;
+#endif
 	/*
-	 * This order is required:
+	 * TW: This order is required:
 	 * The video bridge needs to be adjusted before the
 	 * BIOS is run as the BIOS sets up CRT2 according to
 	 * these register settings.
@@ -1406,16 +4043,33 @@ SISModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
 	 * registers need to be readjusted as the BIOS may
 	 * very probably have messed them up.
 	 */
-	SiSPreSetMode(pScrn);
-	/* TW: mode was pScrn->currentMode - VidModeExt did not work! */
-	if (!SiSSetVESAMode(pScrn, mode))    
+	if( pSiS->VGAEngine == SIS_300_VGA ||
+		        pSiS->VGAEngine == SIS_315_VGA ) {
+		SiSPreSetMode(pScrn, mode);
+	}
+ 	if(!SiSSetVESAMode(pScrn, mode)) {
+	    xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+	    	"SiSSetVESAMode() failed\n");
 	    return FALSE;
-	SiSPreSetMode(pScrn);
- 	SiSPostSetMode(pScrn, &pSiS->ModeReg, 1);
-
- 	/* Prepare the register contents */
-	if (!(*pSiS->ModeInit)(pScrn, mode))
+	}
+	sisSaveUnlockExtRegisterLock(pSiS,NULL,NULL);
+	if( pSiS->VGAEngine == SIS_300_VGA ||
+		        pSiS->VGAEngine == SIS_315_VGA ) {
+		SiSPreSetMode(pScrn, mode);
+		SiSPostSetMode(pScrn, &pSiS->ModeReg);
+	}
+	/* TW: Prepare some register contents and set
+	 *     up some mode dependent variables.
+	 */
+#ifdef TWDEBUG
+        xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+		"REAL REGISTER CONTENTS AFTER SETMODE:\n");
+#endif
+	if (!(*pSiS->ModeInit)(pScrn, mode)) {
+	    xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+	    	"ModeInit() failed\n");
 	    return FALSE;
+	}
 
 	pScrn->vtSema = TRUE;
 
@@ -1423,54 +4077,135 @@ SISModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
 	vgaHWProtect(pScrn, TRUE);
 	(*pSiS->SiSRestore)(pScrn, &pSiS->ModeReg);
 	vgaHWProtect(pScrn, FALSE);
+	PDEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+			  "HDisplay: %d, VDisplay: %d  \n",
+			  mode->HDisplay, mode->VDisplay));
 
- 	PDEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- 			  "HDisplay: %d, VDisplay: %d  \n",
- 			  mode->HDisplay, mode->VDisplay));
- 
     } else { /* Without VESA: */
+#ifdef SISDUALHEAD
+	if(pSiS->DualHeadMode) {
+                if(!(*pSiS->ModeInit)(pScrn, mode)) {
+		    xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+	    	       "ModeInit() failed\n");
+	            return FALSE;
+	        }
+
+	        pScrn->vtSema = TRUE;
+
+		if(!(pSiS->SecondHead)) {
+			/* TW: Head 1 (master) is always CRT2 */
+			SiSPreSetMode(pScrn, mode);
+			if (!SiSBIOSSetModeCRT2(pSiS->SiS_Pr, &pSiS->sishw_ext, pScrn, mode)) {
+				xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+	    				"SiSBIOSSetModeCRT2() failed\n");
+				return FALSE;
+			}
+			SiSPostSetMode(pScrn, &pSiS->ModeReg);
+		} else {
+			/* TW: Head 2 (slave) is always CRT1 */
+			SiSPreSetMode(pScrn, mode);
+			if (!SiSBIOSSetModeCRT1(pSiS->SiS_Pr, &pSiS->sishw_ext, pScrn, mode, pSiS->IsCustom)) {
+				xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+	    				"SiSBIOSSetModeCRT1() failed\n");
+				return FALSE;
+			}
+			SiSPostSetMode(pScrn, &pSiS->ModeReg);
+		}
+	} else {
+#endif
+		if(pSiS->VGAEngine == SIS_300_VGA ||
+		                       pSiS->VGAEngine == SIS_315_VGA) {
+
+	                /* TW: Prepare the register contents; On 300/310/325,
+	                 *     we actually "abuse" this only for setting
+	                 *     up some variables; the registers are NOT
+	                 *     being written to the hardware as the BIOS
+	                 *     emulation (native mode switching code)
+	                 *     takes care of this.
+	                 */
+                        if(!(*pSiS->ModeInit)(pScrn, mode)) {
+			    xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+	    			"ModeInit() failed\n");
+	                    return FALSE;
+		        }
+
+	                pScrn->vtSema = TRUE;
+
+		        /* 300/310/325 series: Use our own code for mode switching */
+	    		SiSPreSetMode(pScrn, mode);
+
+	    		if(!SiSBIOSSetMode(pSiS->SiS_Pr, &pSiS->sishw_ext, pScrn, mode, pSiS->IsCustom)) {
+			  	xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+	    				"SiSBIOSSetMode() failed\n");
+				return FALSE;
+		        }
+
+	    		SiSPostSetMode(pScrn, &pSiS->ModeReg);
+#ifdef TWDEBUG
+			xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+				"REAL REGISTER CONTENTS AFTER SETMODE:\n");
+                        (*pSiS->ModeInit)(pScrn, mode);
+#endif
+		} else {
 
-    	/* Initialise the ModeReg values */
-    	if (!vgaHWInit(pScrn, mode))
-	        return FALSE;
+		   /* For other chipsets, use the old method */
 
-	if (!(*pSiS->ModeInit)(pScrn, mode))
-	    return FALSE;
+		   /* Initialise the ModeReg values */
+    	           if(!vgaHWInit(pScrn, mode)) {
+		       xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+	    		   "vgaHWInit() failed\n");
+	               return FALSE;
+		   }
 
-	pScrn->vtSema = TRUE;
+		   /* Reset our PIOOffset as vgaHWInit might have reset it */
+      		   VGAHWPTR(pScrn)->PIOOffset = pSiS->IODBase + (pSiS->PciInfo->ioBase[2] & 0xFFFC) - 0x380;
 
-	PDEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
-			  "HDisplay: %d, VDisplay: %d  \n",
-			  mode->HDisplay, mode->VDisplay));
+		   /* Prepare the register contents */
+	           if(!(*pSiS->ModeInit)(pScrn, mode)) {
+		       xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+	    		   "ModeInit() failed\n");
+	               return FALSE;
+		   }
 
-	/* Program the registers */
-	vgaHWProtect(pScrn, TRUE);
-	vgaReg = &hwp->ModeReg;
-	sisReg = &pSiS->ModeReg;
+		   pScrn->vtSema = TRUE;
 
-    	vgaReg->Attribute[0x10] = 0x01;
-    	if (pScrn->bitsPerPixel > 8)
-	    vgaReg->Graphics[0x05] = 0x00;
+	           /* Program the registers */
+	           vgaHWProtect(pScrn, TRUE);
+	           vgaReg = &hwp->ModeReg;
+	           sisReg = &pSiS->ModeReg;
 
-    	vgaHWRestore(pScrn, vgaReg, VGA_SR_MODE); 
+		   vgaReg->Attribute[0x10] = 0x01;
+    		   if(pScrn->bitsPerPixel > 8) {
+	    		vgaReg->Graphics[0x05] = 0x00;
+		   }
 
-	if ( (pSiS->Chipset == PCI_CHIP_SIS300) ||
-	     (pSiS->Chipset == PCI_CHIP_SIS630) ||
-	     (pSiS->Chipset == PCI_CHIP_SIS540) ) {
-	    SiSPreSetMode(pScrn);
-	    if (!SiSBIOSSetMode(pScrn, mode))
-		return FALSE;
-	}
-	else (*pSiS->SiSRestore)(pScrn, sisReg);
-	
-	vgaHWProtect(pScrn, FALSE);
+    		   vgaHWRestore(pScrn, vgaReg, VGA_SR_MODE);
+
+		   (*pSiS->SiSRestore)(pScrn, sisReg);
+
+		   if((pSiS->Chipset == PCI_CHIP_SIS6326) && (pSiS->SiS6326Flags & SIS6326_HASTV)) {
+		       SiS6326PostSetMode(pScrn, &pSiS->ModeReg);
+		   }
+
+#ifdef TWDEBUG
+		   xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+			"REAL REGISTER CONTENTS AFTER SETMODE:\n");
+                        (*pSiS->ModeInit)(pScrn, mode);
+#endif
+
+		   vgaHWProtect(pScrn, FALSE);
+		}
+#ifdef SISDUALHEAD
+        }
+#endif
     }
-    
-/* Reserved for debug
- *
-    SiSDumpModeInfo(pScrn, mode);
- *
- */
+
+    /* TW: Update Currentlayout */
+    pSiS->CurrentLayout.mode = mode;
+
+    /* Debug */
+/*  SiSDumpModeInfo(pScrn, mode);  */
+
     return TRUE;
 }
 
@@ -1482,53 +4217,212 @@ SiSSetVESAMode(ScrnInfoPtr pScrn, DisplayModePtr pMode)
 
     pSiS = SISPTR(pScrn);
 
-    if (!(mode = CalcVESAModeIndex(pScrn, pMode))) return FALSE;
-    ErrorF("mode: %x\n",mode);
+    if (!(mode = SiSCalcVESAModeIndex(pScrn, pMode))) return FALSE;
 
-    mode |= 1 << 15;			/* TW: Don't clear framebuffer */
-    mode |= 1 << 14;   			/* TW: always use linear adressing */
+    mode |= 1 << 15;	/* TW: Don't clear framebuffer */
+    mode |= 1 << 14;   	/* TW: Use linear adressing */
 
-    if (VBESetVBEMode(pSiS->pVbe, mode, NULL) == FALSE) {
-	    xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Setting mode 0x%x failed\n",
-	             mode & 0x0fff);
+    if(VBESetVBEMode(pSiS->pVbe, mode, NULL) == FALSE) {
+	    xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+	    		"Setting VESA mode 0x%x failed\n",
+	             	mode & 0x0fff);
 	    return (FALSE);
     }
 
-    if (pMode->HDisplay != pScrn->virtualX)
+    if(pMode->HDisplay != pScrn->virtualX)
 	VBESetLogicalScanline(pSiS->pVbe, pScrn->virtualX);
 
-    xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Setting mode 0x%x succeeded\n",
-	       mode & 0x0fff);
+    xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+    		"Setting VESA mode 0x%x succeeded\n",
+	       	mode & 0x0fff);
 
     return (TRUE);
 }
 
-
 /*
- * Restore the initial (text) mode.
+ * Restore the initial mode. To be used internally only!
  */
 static void
 SISRestore(ScrnInfoPtr pScrn)
 {
-    vgaHWPtr hwp;
-    vgaRegPtr vgaReg;
-    SISPtr pSiS;
-    SISRegPtr sisReg;
+    SISPtr    pSiS = SISPTR(pScrn);
+    SISRegPtr sisReg = &pSiS->SavedReg;
+    vgaHWPtr  hwp = VGAHWPTR(pScrn);
+    vgaRegPtr vgaReg = &hwp->SavedReg;
+    Bool      doit = FALSE, doitlater = FALSE;
 
-    hwp = VGAHWPTR(pScrn);
-    pSiS = SISPTR(pScrn);
-    vgaReg = &hwp->SavedReg;
-    sisReg = &pSiS->SavedReg;
+    if((pSiS->VGAEngine == SIS_300_VGA) || (pSiS->VGAEngine == SIS_315_VGA)) {
+
+#ifdef SISDUALHEAD
+       /* TW: We always restore master AND slave */
+       if(pSiS->DualHeadMode && pSiS->SecondHead) return;
+#endif
+
+       /* TW: We must not disable the sequencer if the bridge is in SlaveMode! */
+       if(!(SiSBridgeIsInSlaveMode(pScrn))) {
+          vgaHWProtect(pScrn, TRUE);
+       }
+
+#ifdef UNLOCK_ALWAYS
+       sisSaveUnlockExtRegisterLock(pSiS, NULL,NULL);
+#endif
+
+       /* TW: First, restore CRT1 on/off and VB connection registers */
+       outSISIDXREG(SISCR, 0x32, pSiS->oldCR32);
+       if(!(pSiS->oldCR17 & 0x80)) {			/* TW: CRT1 was off */
+           if(!(SiSBridgeIsInSlaveMode(pScrn))) {       /* TW: Bridge is NOT in SlaveMode now -> do it */
+	      doit = TRUE;
+	   } else {
+	      doitlater = TRUE;
+	   }
+       } else {						/* TW: CRT1 was on -> do it now */
+           doit = TRUE;
+       }
+       
+       if(doit) {
+           outSISIDXREG(SISCR, 0x17, pSiS->oldCR17);
+       }
+
+       /* TW: For 30xB/LV, restoring the registers does not
+        *     work. We "manually" set the old mode, instead.
+	*     The same applies for SiS730 machines with LVDS.
+	*     Finally, this behavior can be forced by setting
+	*     the option RestoreBySetMode.
+        */
+        if( ( (pSiS->restorebyset) ||
+	      (pSiS->VBFlags & (VB_301B|VB_302B|VB_30xLV|VB_30xLVX)) ||
+	      ((pSiS->sishw_ext.jChipType == SIS_730) && (pSiS->VBFlags & VB_LVDS)) ) &&
+	    (pSiS->OldMode) ) {
+
+           if(pSiS->AccelInfoPtr) {
+             (*pSiS->AccelInfoPtr->Sync)(pScrn);
+           }
+
+           xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3,
+	         "Restoring by setting old mode 0x%02x\n", pSiS->OldMode);
+
+  	   if( (pSiS->VBFlags & (VB_301B|VB_302B|VB_30xLV|VB_30xLVX)) &&
+	       (!pSiS->restorebyset) ) {		 
+	      if(pSiS->OldMode == 0x03) pSiS->OldMode = 0x13;	 
+	   }
+		 
+	   pSiS->SiS_Pr->UseCustomMode = FALSE;
+	   pSiS->SiS_Pr->CRT1UsesCustomMode = FALSE;
+	   SiSSetMode(pSiS->SiS_Pr, &pSiS->sishw_ext, pScrn, pSiS->OldMode, FALSE);
+#ifdef TWDEBUG
+		{
+		   SISRegPtr      pReg = &pSiS->ModeReg;
+		   xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+			"REAL REGISTER CONTENTS AFTER RESTORE BY SETMODE:\n");
+		   (*pSiS->SiSSave)(pScrn, pReg);
+		}
+#endif
+
+        } else {
 
-    vgaHWProtect(pScrn, TRUE);
+	   if(pSiS->VBFlags & VB_VIDEOBRIDGE) {
+	      /* TW: If a video bridge is present, we need to restore
+	       *     non-extended (=standard VGA) SR and CR registers
+	       *     before restoring the extended ones and the bridge
+	       *     registers itself. Unfortunately, the vgaHWRestore
+	       *     routine clears CR17[7] - which must not be done if
+	       *     the bridge is in slave mode.
+	       */
+	      if(!(SiSBridgeIsInSlaveMode(pScrn))) {
+                 vgaHWProtect(pScrn, TRUE);
+		 
+		 if(pSiS->Primary) {
+	            vgaHWRestore(pScrn, vgaReg, VGA_SR_MODE);
+	         }
+              } 
+	   }
+	   
+           (*pSiS->SiSRestore)(pScrn, sisReg);
 
-    (*pSiS->SiSRestore)(pScrn, sisReg);
+        }
 
-    SISRestoreExtRegisterLock(sisReg);
+	if(doitlater) {
+            outSISIDXREG(SISCR, 0x17, pSiS->oldCR17);
+	}
 
-    vgaHWRestore(pScrn, vgaReg, VGA_SR_ALL);
+	sisRestoreExtRegisterLock(pSiS,sisReg->sisRegs3C4[0x05],sisReg->sisRegs3D4[0x80]);
+	
+	if( ( (pSiS->sishw_ext.jChipType == SIS_730) && (pSiS->VBFlags & VB_LVDS)) ||
+	    (pSiS->restorebyset) ) {
+	   
+	   /* TW: SiS730/LVDS has extreme problems restoring the text display due
+	    *     to over-sensible LCD panels
+	    */
+   
+	   vgaHWProtect(pScrn, TRUE);  
+	    
+	   if(pSiS->Primary) {
+	      vgaHWRestore(pScrn, vgaReg, (VGA_SR_FONTS | VGA_SR_CMAP));
+	   }
+	   
+	   vgaHWProtect(pScrn, FALSE); 
+	
+	} else {
+	
+	   vgaHWProtect(pScrn, TRUE);
+	
+	   if(pSiS->Primary) {
+	      vgaHWRestore(pScrn, vgaReg, VGA_SR_ALL);
+	   }
+       
+	   vgaHWProtect(pScrn, FALSE);
+	
+	}
+    
+    } else {	/* All other chipsets */
+
+        vgaHWProtect(pScrn, TRUE);
+#ifdef UNLOCK_ALWAYS
+        sisSaveUnlockExtRegisterLock(pSiS, NULL,NULL);
+#endif
+        (*pSiS->SiSRestore)(pScrn, sisReg);
+
+        vgaHWProtect(pScrn, TRUE);
+	if(pSiS->Primary) {
+           vgaHWRestore(pScrn, vgaReg, VGA_SR_ALL);
+	}
 
-    vgaHWProtect(pScrn, FALSE);
+	/* TW: Restore TV. This is rather complicated, but if we don't do it,
+	 *     TV output will flicker terribly
+	 */
+        if((pSiS->Chipset == PCI_CHIP_SIS6326) && (pSiS->SiS6326Flags & SIS6326_HASTV)) {
+	  if(sisReg->sis6326tv[0] & 0x04) {
+	    unsigned char tmp;
+	    int val;
+
+            orSISIDXREG(SISSR, 0x01, 0x20);
+            tmp = SiS6326GetTVReg(pScrn,0x00);
+            tmp &= ~0x04;
+            while(!(inSISREG(SISINPSTAT) & 0x08));  /* Wait while NOT vb */
+            SiS6326SetTVReg(pScrn,0x00,tmp);
+            for(val=0; val < 2; val++) {
+              while(!(inSISREG(SISINPSTAT) & 0x08));  /* Wait while NOT vb */
+              while(inSISREG(SISINPSTAT) & 0x08);     /* wait while vb     */
+            }
+            SiS6326SetTVReg(pScrn, 0x00, sisReg->sis6326tv[0]);
+            tmp = inSISREG(SISINPSTAT);
+            outSISREG(SISAR, 0x20);
+            tmp = inSISREG(SISINPSTAT);
+            while(inSISREG(SISINPSTAT) & 0x01);
+            while(!(inSISREG(SISINPSTAT) & 0x01));
+            andSISIDXREG(SISSR, 0x01, ~0x20);
+            for(val=0; val < 10; val++) {
+              while(!(inSISREG(SISINPSTAT) & 0x08));  /* Wait while NOT vb */
+              while(inSISREG(SISINPSTAT) & 0x08);     /* wait while vb     */
+            }
+            andSISIDXREG(SISSR, 0x01, ~0x20);
+	  }
+        }
+
+        sisRestoreExtRegisterLock(pSiS,sisReg->sisRegs3C4[5],sisReg->sisRegs3D4[0x80]);
+
+        vgaHWProtect(pScrn, FALSE);
+    }
 }
 
 static void
@@ -1539,26 +4433,49 @@ SISVESARestore(ScrnInfoPtr pScrn)
    if(pSiS->UseVESA) SISVESASaveRestore(pScrn, MODE_RESTORE);
 }
 
-/* TW: Restore bridge output registers - to be called BEFORE VESARestore */
+/* TW: Restore bridge registers - to be called BEFORE VESARestore */
 static void
 SISBridgeRestore(ScrnInfoPtr pScrn)
 {
     SISPtr pSiS = SISPTR(pScrn);
 
-    if ( (pSiS->Chipset == PCI_CHIP_SIS300) ||
-         (pSiS->Chipset == PCI_CHIP_SIS630) ||
-         (pSiS->Chipset == PCI_CHIP_SIS540) ) {
+#ifdef SISDUALHEAD
+    /* We only restore for master head */
+    if(pSiS->DualHeadMode && pSiS->SecondHead) return;
+#endif
+
+    if(pSiS->VGAEngine == SIS_300_VGA || pSiS->VGAEngine == SIS_315_VGA) {
+	SiSRestoreBridge(pScrn, &pSiS->SavedReg);
+    }
+}
+
+/* TW: Our generic BlockHandler for Xv */
+static void
+SISBlockHandler(int i, pointer blockData, pointer pTimeout, pointer pReadmask)
+{
+    ScreenPtr pScreen = screenInfo.screens[i];
+    ScrnInfoPtr pScrn   = xf86Screens[i];
+    SISPtr pSiS = SISPTR(pScrn);
+
+    pScreen->BlockHandler = pSiS->BlockHandler;
+    (*pScreen->BlockHandler) (i, blockData, pTimeout, pReadmask);
+    pScreen->BlockHandler = SISBlockHandler;
 
-		SiSRestoreBridge(pScrn, &pSiS->SavedReg);
+    if(pSiS->VideoTimerCallback) {
+        (*pSiS->VideoTimerCallback)(pScrn, currentTime.milliseconds);
     }
 }
 
 /* Mandatory
- * This gets called at the start of each server generation */
+ * This gets called at the start of each server generation
+ *
+ * TW: We use pScrn and not CurrentLayout here, because the
+ *     properties we use have not changed (displayWidth,
+ *     depth, bitsPerPixel)
+ */
 static Bool
 SISScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
 {
-    /* The vgaHW references will disappear one day */
     ScrnInfoPtr pScrn;
     vgaHWPtr hwp;
     SISPtr pSiS;
@@ -1568,46 +4485,99 @@ SISScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
     unsigned long OnScreenSize;
     int height, width, displayWidth;
     unsigned char *FBStart;
+#ifdef SISDUALHEAD
+    SISEntPtr pSiSEnt = NULL;
+#endif
 
-    /*
-     * First get the ScrnInfoRec
-     */
     pScrn = xf86Screens[pScreen->myNum];
 
     hwp = VGAHWPTR(pScrn);
 
-    hwp->MapSize = 0x10000;         /* Standard 64k VGA window */
-
     pSiS = SISPTR(pScrn);
 
-    if (pSiS->UseVESA)
-	pSiS->pVbe = VBEExtendedInit(NULL,pSiS->pEnt->index, SET_BIOS_SCRATCH
-				     | RESTORE_BIOS_SCRATCH);
+    if(pSiS->UseVESA) {
+#if XF86_VERSION_CURRENT < XF86_VERSION_NUMERIC(4,2,99,0,0)
+	pSiS->pVbe = VBEInit(NULL, pSiS->pEnt->index);
+#else
+        pSiS->pVbe = VBEExtendedInit(NULL, pSiS->pEnt->index,
+	                   SET_BIOS_SCRATCH | RESTORE_BIOS_SCRATCH);
+#endif
+    }
+
+#ifdef SISDUALHEAD
+    if(pSiS->DualHeadMode) {
+    	pSiSEnt = pSiS->entityPrivate;
+    	pSiSEnt->refCount++;
+    }
+#endif
 
     /* Map the VGA memory and get the VGA IO base */
-    if (!vgaHWMapMem(pScrn))
-        return FALSE;
+    if(pSiS->Primary) {
+       hwp->MapSize = 0x10000;  /* Standard 64k VGA window */
+       if(!vgaHWMapMem(pScrn)) {
+          xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+	    	"Could not map VGA window\n");
+          return FALSE;
+       }
+    }
     vgaHWGetIOBase(hwp);
 
+    /* TW: Patch the PIOOffset inside vgaHW to use
+     *     our relocated IO ports.
+     */
+    VGAHWPTR(pScrn)->PIOOffset = pSiS->IODBase + (pSiS->PciInfo->ioBase[2] & 0xFFFC) - 0x380;
+
     /* Map the SIS memory and MMIO areas */
-    if (!SISMapMem(pScrn))
+    if(!SISMapMem(pScrn)) {
+    	xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+	    	"SiSMapMem() failed\n");
         return FALSE;
+    }
+
+#ifdef UNLOCK_ALWAYS
+    sisSaveUnlockExtRegisterLock(pSiS, NULL, NULL);
+#endif
+
+    /* TW: Enable TurboQueue so that SISSave() saves it in enabled
+     *     state. If we don't do this, X will hang after a restart!
+     *     (Happens for some unknown reason only when using VESA
+     *     for mode switching; assumingly a BIOS issue.)
+     *     This is done on 300 and 310/325 series only.
+     */
+    if(pSiS->UseVESA) {
+	SiSEnableTurboQueue(pScrn);
+    }
 
     /* Save the current state */
     SISSave(pScrn);
 
+    /* TW: Save the current mode number */
+    if((pSiS->VGAEngine == SIS_300_VGA) || (pSiS->VGAEngine == SIS_315_VGA)) {
+        inSISIDXREG(SISCR, 0x34, pSiS->OldMode);
+    }
+
     /* Initialise the first mode */
-    if (!SISModeInit(pScrn, pScrn->currentMode))
+    if(!SISModeInit(pScrn, pScrn->currentMode)) {
+        xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+	    	"SiSModeInit() failed\n");
         return FALSE;
+    }
 
-    /* Clear frame buffer */
-    OnScreenSize = pScrn->displayWidth * pScrn->currentMode->VDisplay * (pScrn->bitsPerPixel / 8);
-    memset(pSiS->FbBase, 0, OnScreenSize);
-
-    /* Darken the screen for aesthetic reasons and set the viewport */
+    /* Darken the screen for aesthetic reasons */
+    /* TW: Not using Dual Head variant on purpose; we darken
+     *     the screen for both displays, and un-darken
+     *     it when the second head is finished
+     */
     SISSaveScreen(pScreen, SCREEN_SAVER_ON);
+
+    /* Set the viewport */
     SISAdjustFrame(scrnIndex, pScrn->frameX0, pScrn->frameY0, 0);
 
+    /* Clear frame buffer */
+    OnScreenSize = pScrn->displayWidth * pScrn->currentMode->VDisplay
+                               * (pScrn->bitsPerPixel / 8);
+    bzero(pSiS->FbBase, OnScreenSize);
+
     /*
      * The next step is to setup the screen's visuals, and initialise the
      * framebuffer code.  In cases where the framebuffer's default
@@ -1625,36 +4595,41 @@ SISScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
      */
     miClearVisualTypes();
 
-
     /* Setup the visuals we support. */
 
     /*
      * For bpp > 8, the default visuals are not acceptable because we only
      * support TrueColor and not DirectColor.
      */
-
-    if (pScrn->bitsPerPixel > 8) {
-        if (!miSetVisualTypes(pScrn->depth, TrueColorMask, pScrn->rgbBits,
-                              pScrn->defaultVisual))
-	    return FALSE;
-	
+    if(pScrn->bitsPerPixel > 8) {
+        if(!miSetVisualTypes(pScrn->depth, TrueColorMask, pScrn->rgbBits,
+                              pScrn->defaultVisual)) {
+	 	SISSaveScreen(pScreen, SCREEN_SAVER_OFF);
+		xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+	    		"miSetVisualTypes() failed (bpp %d)\n", pScrn->bitsPerPixel);
+	    	return FALSE;
+	}
     } else {
-        if (!miSetVisualTypes(pScrn->depth, 
+        if(!miSetVisualTypes(pScrn->depth,
                               miGetDefaultVisualMask(pScrn->depth),
-                              pScrn->rgbBits, pScrn->defaultVisual))
+                              pScrn->rgbBits, pScrn->defaultVisual)) {
+		SISSaveScreen(pScreen, SCREEN_SAVER_OFF);
+		xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+	    		"miSetVisualTypes() failed (bpp %d)\n", pScrn->bitsPerPixel);
 		return FALSE;
+	}
     }
 
     width = pScrn->virtualX;
     height = pScrn->virtualY;
     displayWidth = pScrn->displayWidth;
 
-    if (pSiS->Rotate) {
+    if(pSiS->Rotate) {
         height = pScrn->virtualX;
         width = pScrn->virtualY;
     }
 
-    if (pSiS->ShadowFB) {
+    if(pSiS->ShadowFB) {
         pSiS->ShadowPitch = BitmapBytePad(pScrn->bitsPerPixel * width);
         pSiS->ShadowPtr = xalloc(pSiS->ShadowPitch * height);
         displayWidth = pSiS->ShadowPitch / (pScrn->bitsPerPixel >> 3);
@@ -1664,18 +4639,39 @@ SISScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
         FBStart = pSiS->FbBase;
     }
 
-    if (!miSetPixmapDepths())
+    if(!miSetPixmapDepths()) {
+        SISSaveScreen(pScreen, SCREEN_SAVER_OFF);
+	xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+	    	"miSetPixmapDepths() failed\n");
 	return FALSE;
-    
-    {
-        static int GlobalHWQueueLength = 0;
-
-        pSiS->cmdQueueLenPtr = &(GlobalHWQueueLength);
     }
 
+#ifdef SISDUALHEAD
+    if(pSiS->SecondHead)
+	   pSiS->cmdQueueLenPtr = &(SISPTR(pSiSEnt->pScrn_1)->cmdQueueLen);
+    else
+#endif
+           pSiS->cmdQueueLenPtr = &(pSiS->cmdQueueLen);
+
+    pSiS->cmdQueueLen = 0; /* TW: Force an EngineIdle() at start */
+
 #ifdef XF86DRI
-    pSiS->directRenderingEnabled = SISDRIScreenInit(pScreen);
-    /* Force the initialization of the context */
+#ifdef SISDUALHEAD
+    /* TW: No DRI in dual head mode */
+    if(pSiS->DualHeadMode) {
+        pSiS->directRenderingEnabled = FALSE;
+	xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+		"DRI not supported in Dual Head mode\n");
+    } else
+#endif
+       /* Force the initialization of the context */
+       if(pSiS->VGAEngine != SIS_315_VGA) {
+           pSiS->directRenderingEnabled = SISDRIScreenInit(pScreen);
+       } else {
+          xf86DrvMsg(pScrn->scrnIndex, X_NOT_IMPLEMENTED,
+	  	"DRI not supported on this chipset\n");
+          pSiS->directRenderingEnabled = FALSE;
+       }
 #endif
 
     /*
@@ -1683,41 +4679,42 @@ SISScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
      * pScreen fields.
      */
 
-    switch (pScrn->bitsPerPixel) {
-    case 1:
+    switch(pScrn->bitsPerPixel) {
+      case 1:
         ret = xf1bppScreenInit(pScreen, FBStart, width,
-                        height, pScrn->xDpi, pScrn->yDpi, 
+                        height, pScrn->xDpi, pScrn->yDpi,
                         displayWidth);
         break;
-    case 4:
+      case 4:
         ret = xf4bppScreenInit(pScreen, FBStart, width,
-                        height, pScrn->xDpi, pScrn->yDpi, 
+                        height, pScrn->xDpi, pScrn->yDpi,
                         displayWidth);
         break;
-    case 8:
-    case 16:
-    case 24:
-    case 32:
+      case 8:
+      case 16:
+      case 24:
+      case 32:
         ret = fbScreenInit(pScreen, FBStart, width,
                         height, pScrn->xDpi, pScrn->yDpi,
                         displayWidth, pScrn->bitsPerPixel);
 
 	init_picture = 1;
         break;
-    default:
+      default:
         xf86DrvMsg(scrnIndex, X_ERROR,
                "Internal error: invalid bpp (%d) in SISScrnInit\n",
                pScrn->bitsPerPixel);
             ret = FALSE;
         break;
     }
-    if (!ret)
-    {
-        ErrorF ("SetMode Error@!\n");
+    if (!ret) {
+        xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+	    	"xf1bpp/xf4bpp/fbScreenInit() failed\n");
+  	SISSaveScreen(pScreen, SCREEN_SAVER_OFF);
         return FALSE;
     }
 
-    if (pScrn->bitsPerPixel > 8) {
+    if(pScrn->bitsPerPixel > 8) {
         /* Fixup RGB ordering */
         visual = pScreen->visuals + pScreen->numVisuals;
         while (--visual >= pScreen->visuals) {
@@ -1730,80 +4727,142 @@ SISScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
                 visual->blueMask = pScrn->mask.blue;
             }
         }
-    } else if (pScrn->depth == 1) {
+    } else if(pScrn->depth == 1) {
         SIS1bppColorMap(pScrn);
     }
 
-    /* must be after RGB ordering fixed */
-    if (init_picture)
-        fbPictureInit(pScreen, 0, 0);
-    if (!pSiS->ShadowFB) /* hardware cursor needs to wrap this layer */
-        SISDGAInit(pScreen);
+    /* Initialize RENDER ext; must be after RGB ordering fixed */
+    if(init_picture)  fbPictureInit(pScreen, 0, 0);
+
+    /* hardware cursor needs to wrap this layer    <-- TW: what does that mean? */
+    if(!pSiS->ShadowFB)  SISDGAInit(pScreen);
+
     xf86SetBlackWhitePixels(pScreen);
 
-    if (!pSiS->NoAccel) {
-        if ( pSiS->Chipset == PCI_CHIP_SIS300 ||
-             pSiS->Chipset == PCI_CHIP_SIS630 ||
-             pSiS->Chipset == PCI_CHIP_SIS540)
+    if(!pSiS->NoAccel) {
+        switch(pSiS->VGAEngine) {
+	  case SIS_530_VGA:
+	  case SIS_300_VGA:
             SiS300AccelInit(pScreen);
-        else if (pSiS->Chipset == PCI_CHIP_SIS530)
-            SiS530AccelInit(pScreen);
-        else
+	    break;
+	  case SIS_315_VGA:
+	    SiS310AccelInit(pScreen);
+	    break;
+          default:
             SiSAccelInit(pScreen);
+	}
     }
     miInitializeBackingStore(pScreen);
     xf86SetBackingStore(pScreen);
     xf86SetSilkenMouse(pScreen);
 
     /* Initialise cursor functions */
-    miDCInitialize (pScreen, xf86GetPointerScreenFuncs());
+    miDCInitialize(pScreen, xf86GetPointerScreenFuncs());
 
-    if (pSiS->HWCursor)
+    if(pSiS->HWCursor)
         SiSHWCursorInit(pScreen);
 
     /* Initialise default colourmap */
-    if (!miCreateDefColormap(pScreen))
-        return FALSE;
-
-/*  marked by archer for adding VB palette 
-     if (!vgaHWHandleColormaps(pScreen))
+    if(!miCreateDefColormap(pScreen)) {
+        SISSaveScreen(pScreen, SCREEN_SAVER_OFF);
+	xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+	    	"miCreateDefColormap() failed\n");
         return FALSE;
-*/
-
-    if (!xf86HandleColormaps(pScreen, 256, 8, SISLoadPalette, NULL,
-                    CMAP_RELOAD_ON_MODE_SWITCH))
+    }
+    
+    if(!xf86HandleColormaps(pScreen, 256, (pScrn->depth == 8) ? 8 : pScrn->rgbBits,
+                    SISLoadPalette, NULL,
+                    CMAP_PALETTED_TRUECOLOR | CMAP_RELOAD_ON_MODE_SWITCH)) {
+        SISSaveScreen(pScreen, SCREEN_SAVER_OFF);
+	xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+	    	"xf86HandleColormaps() failed\n");
         return FALSE;
+    }
 
     if(pSiS->ShadowFB) {
-    RefreshAreaFuncPtr refreshArea = SISRefreshArea;
-
-    if(pSiS->Rotate) {
-        if (!pSiS->PointerMoved) {
-        pSiS->PointerMoved = pScrn->PointerMoved;
-        pScrn->PointerMoved = SISPointerMoved;
-        }
-
-       switch(pScrn->bitsPerPixel) {
-       case 8:  refreshArea = SISRefreshArea8;  break;
-       case 16: refreshArea = SISRefreshArea16; break;
-       case 24: refreshArea = SISRefreshArea24; break;
-       case 32: refreshArea = SISRefreshArea32; break;
+       RefreshAreaFuncPtr refreshArea = SISRefreshArea;
+
+       if(pSiS->Rotate) {
+          if(!pSiS->PointerMoved) {
+             pSiS->PointerMoved = pScrn->PointerMoved;
+             pScrn->PointerMoved = SISPointerMoved;
+          }
+
+          switch(pScrn->bitsPerPixel) {
+             case 8:  refreshArea = SISRefreshArea8;  break;
+             case 16: refreshArea = SISRefreshArea16; break;
+             case 24: refreshArea = SISRefreshArea24; break;
+             case 32: refreshArea = SISRefreshArea32; break;
+          }
        }
-    }
 
-    ShadowFBInit(pScreen, refreshArea);
+       ShadowFBInit(pScreen, refreshArea);
     }
-    
-    xf86DPMSInit(pScreen, (DPMSSetProcPtr)SISDisplayPowerManagementSet, 0);
+
+#ifdef SISDUALHEAD
+    if(pSiS->DualHeadMode)
+    	/* TW: DPMS for dual head mode */
+        xf86DPMSInit(pScreen, (DPMSSetProcPtr)SISDisplayPowerManagementSetDH, 0);
+    else
+#endif
+        xf86DPMSInit(pScreen, (DPMSSetProcPtr)SISDisplayPowerManagementSet, 0);
+
+    /* Init memPhysBase and fbOffset in pScrn */
+    pScrn->memPhysBase = pSiS->FbAddress;
+    pScrn->fbOffset = 0;
 
 #ifdef XvExtension
-	if (!pSiS->NoXvideo) {
-        /* HW Xv for SiS630 */
-        if (pSiS->Chipset == PCI_CHIP_SIS630) {
-            xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Using SiS630 HW Xv\n" );
-            SISInitVideo(pScreen);
-        } 
-        else { /* generic Xv */
+    if(!pSiS->NoXvideo) {
+#ifdef SISDUALHEAD
+        /* TW: On chipsets with only one overlay, we support
+	 *     Xv only in "real" dual head mode, not Xinerama
+	 */
+	if ( ((pSiS->VGAEngine == SIS_300_VGA) ||
+	      (pSiS->VGAEngine == SIS_315_VGA) )
+	     &&
+	     ((pSiS->hasTwoOverlays)  ||
+	      (!pSiS->DualHeadMode)   ||
+	      (noPanoramiXExtension) ) ) {
+#else
+        if (  (pSiS->VGAEngine == SIS_300_VGA) ||
+	      (pSiS->VGAEngine == SIS_315_VGA) ) {
+#endif
+#ifdef SISDUALHEAD
+              if (pSiS->DualHeadMode) {
+	         if ( pSiS->hasTwoOverlays ||
+		     (pSiS->XvOnCRT2 && (!pSiS->SecondHead)) ||
+		     ((!pSiS->XvOnCRT2 && pSiS->SecondHead)) ) {
+		    xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+		        "Using SiS300/310/325 series HW Xv on CRT%d\n",
+			(pSiS->SecondHead ? 1 : 2));
+                    SISInitVideo(pScreen);
+                 } else {
+		    xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+		        "Not using SiS300/310/325 series HW Xv on CRT%d\n",
+			(pSiS->SecondHead ? 1 : 2));
+		 }
+ 	      } else {
+#endif
+	        if (pSiS->hasTwoOverlays)
+                    xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+		        "Using SiS300/310/325 series HW Xv\n" );
+                else
+		    xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+		        "Using SiS300/310/325 series HW Xv on CRT%d\n",
+			(pSiS->XvOnCRT2 ? 2 : 1));
+	        SISInitVideo(pScreen);
+#ifdef SISDUALHEAD
+              }
+#endif
+#ifdef USE6326VIDEO
+        } else if( pSiS->Chipset == PCI_CHIP_SIS6326 ||
+	           pSiS->Chipset == PCI_CHIP_SIS530  ||
+		   pSiS->Chipset == PCI_CHIP_SIS5597 ) {
+		xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+		        "Using SiS5597/5598/6326/530/620 HW Xv\n" );
+		SIS6326InitVideo(pScreen);
+#endif
+	} else { /* generic Xv */
 
             XF86VideoAdaptorPtr *ptr;
             int n;
@@ -1813,48 +4872,126 @@ SISScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
                 xf86XVScreenInit(pScreen, ptr, n);
                 xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Using generic Xv\n" );
             }
+	    if (!noPanoramiXExtension)
+	    	xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+			"HW Xv not supported in Xinerama mode\n");
         }
     }
 #endif
 
 #ifdef XF86DRI
-    if (pSiS->directRenderingEnabled) {
+    if(pSiS->directRenderingEnabled) {
         /* Now that mi, drm and others have done their thing,
          * complete the DRI setup.
          */
         pSiS->directRenderingEnabled = SISDRIFinishScreenInit(pScreen);
     }
-    if (pSiS->directRenderingEnabled) {
-        xf86DrvMsg(pScrn->scrnIndex, X_INFO, "direct rendering enabled\n");
+    if(pSiS->directRenderingEnabled) {
+        xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Direct rendering enabled\n");
         /* TODO */
         /* SISSetLFBConfig(pSiS); */
     } else {
-        xf86DrvMsg(pScrn->scrnIndex, X_INFO, "direct rendering disabled\n");
+        xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Direct rendering disabled\n");
     }
 #endif
 
     pSiS->CloseScreen = pScreen->CloseScreen;
     pScreen->CloseScreen = SISCloseScreen;
-    pScreen->SaveScreen = SISSaveScreen;
+#ifdef SISDUALHEAD
+    if(pSiS->DualHeadMode)
+    	pScreen->SaveScreen = SISSaveScreenDH;
+    else
+#endif
+    	pScreen->SaveScreen = SISSaveScreen;
+
+    /* Install BlockHandler */
+    pSiS->BlockHandler = pScreen->BlockHandler;
+    pScreen->BlockHandler = SISBlockHandler;
 
     /* Report any unused options (only for the first generation) */
-    if (serverGeneration == 1) {
-    xf86ShowUnusedOptions(pScrn->scrnIndex, pScrn->options);
+    if(serverGeneration == 1) {
+    	xf86ShowUnusedOptions(pScrn->scrnIndex, pScrn->options);
     }
 
     /* Turn on the screen now */
-    SISSaveScreen(pScreen, SCREEN_SAVER_OFF);
+    /* TW: We do this in dual head mode after second head is finished */
+#ifdef SISDUALHEAD
+    if(pSiS->DualHeadMode) {
+        if(pSiS->SecondHead)
+    	     SISSaveScreen(pScreen, SCREEN_SAVER_OFF);
+    } else
+#endif
+        SISSaveScreen(pScreen, SCREEN_SAVER_OFF);
 
     return TRUE;
 }
 
-
 /* Usually mandatory */
 Bool
 SISSwitchMode(int scrnIndex, DisplayModePtr mode, int flags)
 {
+    ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
+    SISPtr pSiS = SISPTR(pScrn);
+
+    if(!pSiS->NoAccel) {
+       if(pSiS->AccelInfoPtr) {
+            (*pSiS->AccelInfoPtr->Sync)(pScrn);
+       }
+    }
+
+    return SISModeInit(xf86Screens[scrnIndex], mode);
+}
+
+#ifdef CYCLECRT2
+/* TW: Cycle CRT2 output devices */
+Bool
+SISCycleCRT2Type(int scrnIndex, DisplayModePtr mode)
+{
+    ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
+    SISPtr pSiS = SISPTR(pScrn);
+    int i = 0;
+
+    /* TW: Only on 300 and 310/325 series */
+    if(pSiS->VGAEngine != SIS_300_VGA &&
+       pSiS->VGAEngine != SIS_315_VGA) return FALSE;
+
+    /* TW: Only if there is a video bridge */
+    if(pSiS->VBFlags & VB_VIDEOBRIDGE) return FALSE;
+
+    /* TW: Only if there were more than 1 CRT2 devices detected */
+    if(pSiS->detectedCRT2Devices & CRT2_VGA) i++;
+    if(pSiS->detectedCRT2Devices & CRT2_LCD) i++;
+    if(pSiS->detectedCRT2Devices & CRT2_TV)  i++;
+    if(i <= 1) return FALSE;
+
+    /* TW: Cycle CRT2 type */
+    i = (pSiS->VBFlags & DISPTYPE_DISP2) << 1;
+    while(!(i & pSiS->detectedCRT2Devices)) {
+      i <<= 1;
+      if(i > CRT2_VGA) i = CRT2_LCD;
+    }
+
+    /* TW: Check if mode is suitable for desired output device */
+    if(!SiS_CheckCalcModeIndex(pScrn, pScrn->currentMode,
+    			       ((pSiS->VBFlags & ~(DISPTYPE_DISP2)) | i))) {
+        xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+		"Current mode not suitable for desired CRT2 output device\n");
+    	return FALSE;
+    }
+
+    /* TW: Sync the accelerators */
+    if(!pSiS->NoAccel) {
+         if(pSiS->AccelInfoPtr) {
+            (*pSiS->AccelInfoPtr->Sync)(pScrn);
+	 }
+    }
+
+    pSiS->VBFlags &= ~(DISPTYPE_DISP2);
+    pSiS->VBFlags |= i;
+
     return SISModeInit(xf86Screens[scrnIndex], mode);
 }
+#endif
 
 /*
  * This function is used to initialize the Start Address - the first
@@ -1867,100 +5004,142 @@ SISAdjustFrame(int scrnIndex, int x, int y, int flags)
     ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
     SISPtr pSiS;
     vgaHWPtr hwp;
-    int base = y * pScrn->displayWidth + x;
-    int vgaIOBase;
+    int base;
     unsigned char temp;
-    
+
     hwp = VGAHWPTR(pScrn);
     pSiS = SISPTR(pScrn);
-    vgaIOBase = VGAHWPTR(pScrn)->IOBase;
-    
-    if (pSiS->UseVESA) {
-	/* TW: Let BIOS adjust frame if using VESA */
- 	VBESetDisplayStart(pSiS->pVbe, x, y, TRUE);
-    }
-    else {
-	
-    	if (pScrn->bitsPerPixel < 8) {
-	    base = (y * pScrn->displayWidth + x + 3) >> 3;
-     	} else {
-	    base = y * pScrn->displayWidth + x ;
-	    /* calculate base bpp dep. */
-	    switch (pScrn->bitsPerPixel) {
-		case 16:
-		    base >>= 1;
-		    break;
-		case 24:
-		    base = ((base * 3)) >> 2;
-		    base -= base % 6;
-		    break;
-		case 32:
-		    break;
-		default:      /* 8bpp */
-		    base >>= 2;
-		    break;
-	    }
-     	}
-	
-     	outw(vgaIOBase + 4, (base & 0x00FF00) | 0x0C);
-     	outw(vgaIOBase + 4, ((base & 0x00FF) << 8) | 0x0D);
-     	switch (pSiS->Chipset)  {
-            case PCI_CHIP_SIS300:
-            case PCI_CHIP_SIS630:
-            case PCI_CHIP_SIS540:
-             	outb(VGA_SEQ_INDEX, 0x0D);
-             	temp = (base & 0xFF0000) >> 16;
-             	PDEBUG(xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3,
-			   "3C5/0Dh set to hex %2X, base 0x%x\n", temp, base));
-             	outb(VGA_SEQ_DATA, temp);
-             	if (pSiS->VBFlags)  {
-		    /*              	UnLockCRT2(pSiS->RelIO); */
-		    sisUnLockCRT2(pSiS->RelIO+0x30);
-		    outSISIDXREG(pSiS->RelIO+4, 6, GETVAR8(base));
-		    outSISIDXREG(pSiS->RelIO+4, 5, GETBITS(base, 15:8));
-		    outSISIDXREG(pSiS->RelIO+4, 4, GETBITS(base, 23:16));
-		    /*              	LockCRT2(pSiS->RelIO); */
-		    sisLockCRT2(pSiS->RelIO+0x30);
-             	}
-             	break;
-	    default:
-             	outb(VGA_SEQ_INDEX, 0x27);
-             	temp = inb(VGA_SEQ_DATA) & 0xF0;
-             	temp |= (base & 0x0F0000) >> 16;
-             	PDEBUG(xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3,
-			    "3C5/27h set to hex %2X, base %d\n",  temp, base));
-             	outb(VGA_SEQ_DATA, temp);
-     	}
- 
+
+    base = y * pSiS->CurrentLayout.displayWidth + x;
+
+    if(pSiS->UseVESA) {
+
+        /* TW: Let BIOS adjust frame if using VESA */
+	VBESetDisplayStart(pSiS->pVbe, x, y, TRUE);
+
+    } else {
+
+#ifdef UNLOCK_ALWAYS
+        sisSaveUnlockExtRegisterLock(pSiS, NULL, NULL);
+#endif
+
+   	if(pScrn->bitsPerPixel < 8) {
+	        base = (y * pSiS->CurrentLayout.displayWidth + x + 3) >> 3;
+    	} else {
+	        base  = y * pSiS->CurrentLayout.displayWidth + x;
+
+        	/* calculate base bpp dep. */
+		switch(pSiS->CurrentLayout.bitsPerPixel) {
+          	   case 16:
+            		base >>= 1;
+            		break;
+          	   case 24:
+            		base = ((base * 3)) >> 2;
+            		base -= base % 6;
+            		break;
+          	   case 32:
+            		break;
+          	   default:      /* 8bpp */
+            		base >>= 2;
+            		break;
+        	 }
+    	}
+
+#ifdef SISDUALHEAD
+        if (pSiS->DualHeadMode) {
+		/* TW: We assume that DualHeadMode only can be true for
+		 *     dual head capable chipsets (and thus save the check
+		 *     for chipset here)
+		 */
+		if (!pSiS->SecondHead) {
+			/* TW: Head 1 (master) is always CRT2 */
+   			SiS_UnLockCRT2(pSiS->SiS_Pr, &pSiS->sishw_ext, pSiS->RelIO+0x30);
+                	outSISIDXREG(SISPART1, 0x06, GETVAR8(base));
+                	outSISIDXREG(SISPART1, 0x05, GETBITS(base, 15:8));
+                	outSISIDXREG(SISPART1, 0x04, GETBITS(base, 23:16));
+			if (pSiS->VGAEngine == SIS_315_VGA) {
+			   setSISIDXREG(SISPART1, 0x02, 0x7F, ((base >> 24) & 0x01) << 7);
+			}
+                	SiS_LockCRT2(pSiS->SiS_Pr, &pSiS->sishw_ext, pSiS->RelIO+0x30);
+		} else {
+			/* TW: Head 2 (slave) is always CRT1 */
+			base += (pSiS->dhmOffset/4);
+			outSISIDXREG(SISCR, 0x0D, base & 0xFF);
+			outSISIDXREG(SISCR, 0x0C, (base >> 8) & 0xFF);
+			outSISIDXREG(SISSR, 0x0D, (base >> 16) & 0xFF);
+			if (pSiS->VGAEngine == SIS_315_VGA) {
+			    setSISIDXREG(SISSR, 0x37, 0xFE, (base >> 24) & 0x01);
+			}
+		}
+	} else {
+#endif
+    	   switch (pSiS->VGAEngine)  {
+           	case SIS_300_VGA:
+			outSISIDXREG(SISCR, 0x0D, base & 0xFF);
+			outSISIDXREG(SISCR, 0x0C, (base >> 8) & 0xFF);
+			outSISIDXREG(SISSR, 0x0D, (base >> 16) & 0xFF);
+            		if (pSiS->VBFlags & CRT2_ENABLE) {
+                		SiS_UnLockCRT2(pSiS->SiS_Pr, &pSiS->sishw_ext, pSiS->RelIO+0x30);
+                		outSISIDXREG(SISPART1, 0x06, GETVAR8(base));
+                		outSISIDXREG(SISPART1, 0x05, GETBITS(base, 15:8));
+                		outSISIDXREG(SISPART1, 0x04, GETBITS(base, 23:16));
+                		SiS_LockCRT2(pSiS->SiS_Pr, &pSiS->sishw_ext, pSiS->RelIO+0x30);
+            		}
+            		break;
+	   	case SIS_315_VGA:
+			outSISIDXREG(SISCR, 0x0D, base & 0xFF);
+			outSISIDXREG(SISCR, 0x0C, (base >> 8) & 0xFF);
+			outSISIDXREG(SISSR, 0x0D, (base >> 16) & 0xFF);
+			setSISIDXREG(SISSR, 0x37, 0xFE, (base >> 24) & 0x01);
+            		if (pSiS->VBFlags & CRT2_ENABLE) {
+                		SiS_UnLockCRT2(pSiS->SiS_Pr, &pSiS->sishw_ext, pSiS->RelIO+0x30);
+                		outSISIDXREG(SISPART1, 0x06, GETVAR8(base));
+                		outSISIDXREG(SISPART1, 0x05, GETBITS(base, 15:8));
+                		outSISIDXREG(SISPART1, 0x04, GETBITS(base, 23:16));
+				setSISIDXREG(SISPART1, 0x02, 0x7F, ((base >> 24) & 0x01) << 7);
+                		SiS_LockCRT2(pSiS->SiS_Pr, &pSiS->sishw_ext, pSiS->RelIO+0x30);
+            		}
+            		break;
+        	default:
+		        outSISIDXREG(SISCR, 0x0D, base & 0xFF);
+			outSISIDXREG(SISCR, 0x0C, (base >> 8) & 0xFF);
+			inSISIDXREG(SISSR, 0x27, temp);
+			temp &= 0xF0;
+			temp |= (base & 0x0F0000) >> 16;
+			outSISIDXREG(SISSR, 0x27, temp);
+    		}
+#ifdef SISDUALHEAD
+	}
+#endif
     } /* if not VESA */
+
 }
 
 
 /*
  * This is called when VT switching back to the X server.  Its job is
  * to reinitialise the video mode.
- *
- * We may wish to unmap video/MMIO memory too.
- * (TW: This might be dangerous with TQ)
+ * Mandatory!
  */
-
-/* Mandatory */
 static Bool
 SISEnterVT(int scrnIndex, int flags)
 {
     ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
-#ifdef XF86DRI
     SISPtr pSiS = SISPTR(pScrn);
-#endif
 
-    SISSaveUnlockExtRegisterLock(NULL);
-    if (!SISModeInit(pScrn, pScrn->currentMode))
+    sisSaveUnlockExtRegisterLock(pSiS, NULL, NULL);
+
+    if(!SISModeInit(pScrn, pScrn->currentMode)) {
+        xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+	    	"SiSEnterVT: SISModeInit() failed\n");
 	return FALSE;
+    }
 
     SISAdjustFrame(scrnIndex, pScrn->frameX0, pScrn->frameY0, 0);
 
-#ifdef XF86DRI	/* TW: this is to be done AFTER switching the mode */
-    if (pSiS->directRenderingEnabled)
+#ifdef XF86DRI
+    /* TW: this is to be done AFTER switching the mode */
+    if(pSiS->directRenderingEnabled)
         DRIUnlock(screenInfo.screens[scrnIndex]);
 #endif
 
@@ -1970,45 +5149,65 @@ SISEnterVT(int scrnIndex, int flags)
 /*
  * This is called when VT switching away from the X server.  Its job is
  * to restore the previous (text) mode.
- *
- * We may wish to remap video/MMIO memory too.
+ * Mandatory!
  */
-
-/* Mandatory */
 static void
 SISLeaveVT(int scrnIndex, int flags)
 {
     ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
     vgaHWPtr hwp = VGAHWPTR(pScrn);
-    SISPtr pSiS;
-
+    SISPtr pSiS = SISPTR(pScrn);
 #ifdef XF86DRI
     ScreenPtr pScreen;
-#endif
 
-    pSiS = SISPTR(pScrn);
-
-#ifdef XF86DRI		/* TW: to be done before mode change */
-    if (pSiS->directRenderingEnabled) {
+    /* TW: to be done before mode change */
+    if(pSiS->directRenderingEnabled) {
         pScreen = screenInfo.screens[scrnIndex];
         DRILock(pScreen, 0);
     }
 #endif
 
+#ifdef SISDUALHEAD
+    if(pSiS->DualHeadMode && pSiS->SecondHead) return;
+#endif
+    
+    if(pSiS->CursorInfoPtr) {
+#ifdef SISDUALHEAD    
+       if(pSiS->DualHeadMode) {
+          if(!pSiS->SecondHead) {
+	      pSiS->ForceCursorOff = TRUE;
+	      pSiS->CursorInfoPtr->HideCursor(pScrn);
+	      SISWaitVBRetrace(pScrn);
+	      pSiS->ForceCursorOff = FALSE;
+	  }
+       } else {   
+#endif
+          pSiS->CursorInfoPtr->HideCursor(pScrn);
+          SISWaitVBRetrace(pScrn);
+#ifdef SISDUALHEAD	  
+       }	
+#endif       
+    }
+
     SISBridgeRestore(pScrn);
 
-    if (pSiS->UseVESA) {
+    if(pSiS->UseVESA) {
+
         /* TW: This is a q&d work-around for a BIOS bug. In case we disabled CRT2,
-    	 *     VBESaveRestore() does not re-enable CRT1. So we set any mode now,
+    	 *     VBESaveRestore() does not restore CRT1. So we set any mode now,
 	 *     because VBESetVBEMode correctly restores CRT1. Afterwards, we
 	 *     can call VBESaveRestore to restore original mode.
 	 */
         if ( (pSiS->VBFlags & VB_VIDEOBRIDGE) && (!(pSiS->VBFlags & DISPTYPE_DISP2)) )
-	           VBESetVBEMode(pSiS->pVbe, (pSiS->VesaModeList->n) | 0xc000, NULL);
+	           VBESetVBEMode(pSiS->pVbe, (pSiS->SISVESAModeList->n) | 0xc000, NULL);
+
         SISVESARestore(pScrn);
-    }
 
-    SISRestore(pScrn);
+    } else {
+       
+       SISRestore(pScrn);
+       
+    }
 
     vgaHWLock(hwp);
 }
@@ -2017,48 +5216,113 @@ SISLeaveVT(int scrnIndex, int flags)
 /*
  * This is called at the end of each server generation.  It restores the
  * original (text) mode.  It should really also unmap the video memory too.
+ * Mandatory!
  */
-
-/* Mandatory */
 static Bool
 SISCloseScreen(int scrnIndex, ScreenPtr pScreen)
 {
     ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
     vgaHWPtr hwp = VGAHWPTR(pScrn);
     SISPtr pSiS = SISPTR(pScrn);
-    xf86CursorInfoPtr   pCursorInfo = pSiS->CursorInfoPtr;
+#ifdef SISDUALHEAD
+    SISEntPtr pSiSEnt = pSiS->entityPrivate;
+#endif
 
 #ifdef XF86DRI
-    if (pSiS->directRenderingEnabled) {
+    if(pSiS->directRenderingEnabled) {
         SISDRICloseScreen(pScreen);
-        pSiS->directRenderingEnabled=FALSE;
+        pSiS->directRenderingEnabled = FALSE;
     }
 #endif
 
-    if (pScrn->vtSema) {
-        if (pCursorInfo)
-           pCursorInfo->HideCursor(pScrn);
+    if(pScrn->vtSema) {
+
+        if(pSiS->CursorInfoPtr) {
+#ifdef SISDUALHEAD    
+           if(pSiS->DualHeadMode) {
+              if(!pSiS->SecondHead) {
+	         pSiS->ForceCursorOff = TRUE;
+	         pSiS->CursorInfoPtr->HideCursor(pScrn);
+	         SISWaitVBRetrace(pScrn);
+	         pSiS->ForceCursorOff = FALSE;
+	      }
+           } else {   
+#endif
+             pSiS->CursorInfoPtr->HideCursor(pScrn);
+             SISWaitVBRetrace(pScrn);
+#ifdef SISDUALHEAD	  
+           }	
+#endif      	
+	}
+
         SISBridgeRestore(pScrn);
-	if (pSiS->UseVESA) {
-          /* TW: This is a q&d work-around for a BIOS bug. In case we disabled CRT2,
-    	   *     VBESaveRestore() does not re-enable CRT1. So we set any mode now,
+
+	if(pSiS->UseVESA) {
+
+	  /* TW: This is a q&d work-around for a BIOS bug. In case we disabled CRT2,
+    	   *     VBESaveRestore() does not restore CRT1. So we set any mode now,
 	   *     because VBESetVBEMode correctly restores CRT1. Afterwards, we
 	   *     can call VBESaveRestore to restore original mode.
 	   */
-           if ( (pSiS->VBFlags & VB_VIDEOBRIDGE) && (!(pSiS->VBFlags & DISPTYPE_DISP2)))
-	           VBESetVBEMode(pSiS->pVbe, (pSiS->VesaModeList->n) | 0xc000, NULL);
+           if( (pSiS->VBFlags & VB_VIDEOBRIDGE) && (!(pSiS->VBFlags & DISPTYPE_DISP2)))
+	           VBESetVBEMode(pSiS->pVbe, (pSiS->SISVESAModeList->n) | 0xc000, NULL);
+
 	   SISVESARestore(pScrn);
+
+	} else {
+
+	   SISRestore(pScrn);
+
 	}
-	SISRestore(pScrn);
+
         vgaHWLock(hwp);
-        SISUnmapMem(pScrn);
     }
-    if(pSiS->AccelInfoPtr)
+
+    SISUnmapMem(pScrn);
+    vgaHWUnmapMem(pScrn);
+    
+#ifdef SISDUALHEAD
+    if(pSiS->DualHeadMode) {
+    	pSiSEnt = pSiS->entityPrivate;
+    	pSiSEnt->refCount--;
+    }
+#endif    
+
+    if(pSiS->pInt) {
+	xf86FreeInt10(pSiS->pInt);
+	pSiS->pInt = NULL;
+    }
+
+    if(pSiS->AccelInfoPtr) {
         XAADestroyInfoRec(pSiS->AccelInfoPtr);
-    if(pCursorInfo)
-        xf86DestroyCursorInfoRec(pCursorInfo);
+	pSiS->AccelInfoPtr = NULL;
+    }
+
+    if(pSiS->CursorInfoPtr) {
+        xf86DestroyCursorInfoRec(pSiS->CursorInfoPtr);
+	pSiS->CursorInfoPtr = NULL;
+    }
+
+    if(pSiS->ShadowPtr) {
+        xfree(pSiS->ShadowPtr);
+	pSiS->ShadowPtr = NULL;
+    }
+
+    if(pSiS->DGAModes) {
+        xfree(pSiS->DGAModes);
+	pSiS->DGAModes = NULL;
+    }
+
+    if(pSiS->adaptor) {
+    	xfree(pSiS->adaptor);
+	pSiS->adaptor = NULL;
+    }
+
     pScrn->vtSema = FALSE;
-    
+
+    /* Restore Blockhandler */
+    pScreen->BlockHandler = pSiS->BlockHandler;
+
     pScreen->CloseScreen = pSiS->CloseScreen;
     return (*pScreen->CloseScreen)(scrnIndex, pScreen);
 }
@@ -2085,17 +5349,23 @@ SISValidMode(int scrnIndex, DisplayModePtr mode, Bool verbose, int flags)
     ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
     SISPtr pSiS = SISPTR(pScrn);
 
-    if (pSiS->UseVESA) {
-	if (CalcVESAModeIndex(pScrn, mode))
-	    return (MODE_OK);
-	else 
-	    return (MODE_BAD);
+    if(pSiS->UseVESA) {
+	if(SiSCalcVESAModeIndex(pScrn, mode))
+	    return(MODE_OK);
+	else
+	    return(MODE_BAD);
     }
-    if ((pSiS->Chipset == PCI_CHIP_SIS300) ||
-            (pSiS->Chipset == PCI_CHIP_SIS630) ||
-            (pSiS->Chipset == PCI_CHIP_SIS540)) {
-	if (sisCalcModeIndex(pScrn, mode) < 0x14)
-	    return (MODE_BAD);
+    if(pSiS->VGAEngine == SIS_300_VGA || pSiS->VGAEngine == SIS_315_VGA) {
+#ifdef SISDUALHEAD
+        if((pSiS->DualHeadMode) && (pSiS->SecondHead)) {
+	    /* DHM: Only check modes for CRT1 */
+	    if(SiS_CalcModeIndex(pScrn, mode) < 0x14)
+	      	return(MODE_BAD);
+	} else
+#endif
+	    if(SiS_CheckCalcModeIndex(pScrn, mode, pSiS->VBFlags) < 0x14)
+	        return(MODE_BAD);
+
     }
     
     return(MODE_OK);
@@ -2108,32 +5378,175 @@ static Bool
 SISSaveScreen(ScreenPtr pScreen, int mode)
 {
     ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
+
     if ((pScrn != NULL) && pScrn->vtSema) {
 
     	SISPtr pSiS = SISPTR(pScrn);
+
 	/* enable access to extended sequencer registers */
-	outb(VGA_SEQ_INDEX, 0x11);
-	/* if not blanked obtain state of LCD blank flags set by BIOS */
-	if (!pSiS->Blank) {
-    		unsigned char val;
-    		val = inb(VGA_SEQ_DATA);
-    		pSiS->LCDon = val;
-	}
-	if (!xf86IsUnblank(mode)) {
-    		pSiS->Blank = TRUE;
-    		outb(VGA_SEQ_DATA, (pSiS->LCDon | 0x8));
-	} else {
-    		pSiS->Blank = FALSE;
-    		/* don't just unblanking; use LCD state set by BIOS */
-    		outb(VGA_SEQ_DATA, (pSiS->LCDon));
+#ifdef UNLOCK_ALWAYS
+        sisSaveUnlockExtRegisterLock(pSiS, NULL, NULL);
+#endif
+
+	if(pSiS->VGAEngine == SIS_300_VGA) {
+
+	   if(pSiS->VBFlags & (VB_30xLV|VB_30xLVX)) {
+	       if(!xf86IsUnblank(mode)) {
+	          pSiS->Blank = TRUE;
+	  	  SiS_SiS30xBLOff(pSiS->SiS_Pr,&pSiS->sishw_ext);
+	       } else {
+	          pSiS->Blank = FALSE;
+	          SiS_SiS30xBLOn(pSiS->SiS_Pr,&pSiS->sishw_ext);
+	       }
+	   } else {
+	      /* if not blanked obtain state of LCD blank flags set by BIOS */
+	      if(!pSiS->Blank) {
+	         inSISIDXREG(SISSR, 0x11, pSiS->LCDon);
+	      }
+
+	      if(!xf86IsUnblank(mode)) {
+    		 pSiS->Blank = TRUE;
+		 outSISIDXREG(SISSR, 0x11, pSiS->LCDon | 0x08);
+	      } else {
+    		 pSiS->Blank = FALSE;
+    		 /* don't just unblanking; use LCD state set by BIOS */
+		 outSISIDXREG(SISSR, 0x11, pSiS->LCDon);
+	      }
+	  }
+
+	} else if(pSiS->VGAEngine == SIS_315_VGA) {
+
+	   if(!pSiS->Blank) {
+		inSISIDXREG(SISSR, 0x11, pSiS->LCDon);
+	   }
+
+	   if(pSiS->VBFlags & VB_CHRONTEL) {
+	       if(!xf86IsUnblank(mode)) {
+		  pSiS->Blank = TRUE;
+		  SiS_Chrontel701xBLOff(pSiS->SiS_Pr);
+	       } else {
+	          pSiS->Blank = FALSE;
+	          SiS_Chrontel701xBLOn(pSiS->SiS_Pr);
+	       }
+	   } else if(pSiS->VBFlags & VB_LVDS) {
+	       if(!xf86IsUnblank(mode)) {
+	          pSiS->Blank = TRUE;
+	 	  outSISIDXREG(SISSR, 0x11, pSiS->LCDon | 0x08);
+	       } else {
+	          pSiS->Blank = FALSE;
+	  	  outSISIDXREG(SISSR, 0x11, pSiS->LCDon);
+	       }
+	   } else if(pSiS->VBFlags & (VB_301B|VB_302B|VB_30xLV|VB_30xLVX)) {
+	       if(!xf86IsUnblank(mode)) {
+	          pSiS->Blank = TRUE;
+	  	  SiS_SiS30xBLOff(pSiS->SiS_Pr,&pSiS->sishw_ext);
+	       } else {
+	          pSiS->Blank = FALSE;
+	          SiS_SiS30xBLOn(pSiS->SiS_Pr,&pSiS->sishw_ext);
+	       }
+	   }
+
 	}
+
     }
 
     return vgaHWSaveScreen(pScreen, mode);
 }
 
-#ifdef  DEBUG
-/* local used for debug */
+#ifdef SISDUALHEAD
+/* TW: SaveScreen for dual head mode */
+static Bool
+SISSaveScreenDH(ScreenPtr pScreen, int mode)
+{
+    ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
+
+    if ((pScrn != NULL) && pScrn->vtSema) {
+
+    	SISPtr pSiS = SISPTR(pScrn);
+	if (pSiS->SecondHead) {
+
+	    /* Slave head is always CRT1 */
+	    return vgaHWSaveScreen(pScreen, mode);
+
+	} else {
+
+	    /* Master head is always CRT2 */
+
+	    /* We can only blank LCD, not other CRT2 devices */
+	    if(!(pSiS->VBFlags & CRT2_LCD)) return TRUE;
+
+	    /* enable access to extended sequencer registers */
+#ifdef UNLOCK_ALWAYS
+            sisSaveUnlockExtRegisterLock(pSiS, NULL, NULL);
+#endif
+
+ 	    if(pSiS->VGAEngine == SIS_300_VGA) {
+
+	        if(pSiS->VBFlags & (VB_30xLV|VB_30xLVX)) {
+		   if(!xf86IsUnblank(mode)) {
+		         pSiS->BlankCRT2 = TRUE;
+			 SiS_SiS30xBLOff(pSiS->SiS_Pr,&pSiS->sishw_ext);
+		   } else {
+		         pSiS->BlankCRT2 = FALSE;
+		         SiS_SiS30xBLOn(pSiS->SiS_Pr,&pSiS->sishw_ext);
+		   }
+		} else {
+		   /* if not blanked obtain state of LCD blank flags set by BIOS */
+		   if(!pSiS->BlankCRT2) {
+		        inSISIDXREG(SISSR, 0x11, pSiS->LCDon);
+		   }
+
+		   if (!xf86IsUnblank(mode)) {
+    			pSiS->BlankCRT2 = TRUE;
+			outSISIDXREG(SISSR, 0x11, pSiS->LCDon | 0x08);
+		   } else {
+    			pSiS->BlankCRT2 = FALSE;
+    			/* don't just unblank; use LCD state set by BIOS */
+			outSISIDXREG(SISSR, 0x11, pSiS->LCDon);
+		   }
+		}
+
+            } else if(pSiS->VGAEngine == SIS_315_VGA) {
+
+ 		if(!pSiS->BlankCRT2) {
+			inSISIDXREG(SISSR, 0x11, pSiS->LCDon);
+		}
+
+	        if(pSiS->VBFlags & VB_CHRONTEL) {
+		      if(!xf86IsUnblank(mode)) {
+			  pSiS->BlankCRT2 = TRUE;
+			  SiS_Chrontel701xBLOff(pSiS->SiS_Pr);
+		      } else {
+		          pSiS->BlankCRT2 = FALSE;
+		          SiS_Chrontel701xBLOn(pSiS->SiS_Pr);
+		      }
+		} else if(pSiS->VBFlags & VB_LVDS) {
+		      if(!xf86IsUnblank(mode)) {
+		         pSiS->BlankCRT2 = TRUE;
+			 outSISIDXREG(SISSR, 0x11, pSiS->LCDon | 0x08);
+		      } else {
+		         pSiS->BlankCRT2 = FALSE;
+			 outSISIDXREG(SISSR, 0x11, pSiS->LCDon);
+		      }
+		} else if(pSiS->VBFlags & (VB_301B|VB_302B|VB_30xLV|VB_30xLVX)) {
+		      if(!xf86IsUnblank(mode)) {
+		         pSiS->BlankCRT2 = TRUE;
+			 SiS_SiS30xBLOff(pSiS->SiS_Pr,&pSiS->sishw_ext);
+		      } else {
+		         pSiS->BlankCRT2 = FALSE;
+		         SiS_SiS30xBLOn(pSiS->SiS_Pr,&pSiS->sishw_ext);
+		      }
+		}
+
+	    }
+	}
+    }
+    return TRUE;
+}
+#endif
+
+#ifdef DEBUG
+/* locally used for debug */
 static void
 SiSDumpModeInfo(ScrnInfoPtr pScrn, DisplayModePtr mode)
 {
@@ -2153,19 +5566,6 @@ SiSDumpModeInfo(ScrnInfoPtr pScrn, DisplayModePtr mode)
     xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Vt Blank End : %x\n", mode->CrtcVBlankEnd);
     xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Vt Total : %x\n", mode->CrtcVTotal);
     xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Vt VAdjusted : %x\n", mode->CrtcVAdjusted);
-
-/*
-    xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Hz Display : %x\n", mode->HDisplay);
-    xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Hz Sync Start : %x\n", mode->HSyncStart);
-    xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Hz Sync End : %x\n", mode->HSyncEnd);
-    xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Hz Total : %x\n", mode->HTotal);
-    xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Hz Skew : %x\n", mode->HSkew);
-    xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Vt Display : %x\n", mode->VDisplay);
-    xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Vt Sync Start : %x\n", mode->VSyncStart);
-    xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Vt Sync End : %x\n", mode->VSyncEnd);
-    xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Vt Total : %x\n", mode->VTotal);
-    xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Vt Scan : %x\n", mode->VScan);
-*/
 }
 #endif
 
@@ -2173,193 +5573,1737 @@ SiSDumpModeInfo(ScrnInfoPtr pScrn, DisplayModePtr mode)
 static void
 SISModifyModeInfo(DisplayModePtr mode)
 {
-/*
-    mode->Clock = 31500;
-    mode->CrtcHTotal    = 832;
-    mode->CrtcHDisplay  = 640;
-    mode->CrtcHBlankStart   = 648;
-    mode->CrtcHSyncStart    = 664;
-    mode->CrtcHSyncEnd  = 704;
-    mode->CrtcHBlankEnd = 824;
-
-    mode->CrtcVTotal    = 520;
-    mode->CrtcVDisplay  = 480;
-    mode->CrtcVBlankStart   = 488;
-    mode->CrtcVSyncStart    = 489;
-    mode->CrtcVSyncEnd  = 492;
-    mode->CrtcVBlankEnd = 512;
-*/
-    if (mode->CrtcHBlankStart == mode->CrtcHDisplay)
+#if 1
+    if(mode->CrtcHBlankStart == mode->CrtcHDisplay)
         mode->CrtcHBlankStart++;
-    if (mode->CrtcHBlankEnd == mode->CrtcHTotal)
+    if(mode->CrtcHBlankEnd == mode->CrtcHTotal)
         mode->CrtcHBlankEnd--;
-    if (mode->CrtcVBlankStart == mode->CrtcVDisplay)
+    if(mode->CrtcVBlankStart == mode->CrtcVDisplay)
         mode->CrtcVBlankStart++;
-    if (mode->CrtcVBlankEnd == mode->CrtcVTotal)
+    if(mode->CrtcVBlankEnd == mode->CrtcVTotal)
         mode->CrtcVBlankEnd--;
+#endif
 }
 
-void SiSPreSetMode(ScrnInfoPtr pScrn)
+/* TW: Enable the TurboQueue (For 300 and 310/325 series only) */
+void
+SiSEnableTurboQueue(ScrnInfoPtr pScrn)
 {
     SISPtr pSiS = SISPTR(pScrn);
-    unsigned char  usScratchCR30, usScratchCR31;
-    unsigned char  usScratchCR32, usScratchCR33;
     unsigned short SR26, SR27;
     unsigned long  temp;
-    int vbflag;
-
-    usScratchCR30 = usScratchCR31 = usScratchCR33 = 0;
-    outb(SISCR, 0x31);
-    usScratchCR31 = inb(SISCR+1);
-    outb(SISCR, 0x33);		/* TW: CRT1 refresh rate index */
-    usScratchCR33 = inb(SISCR+1);
-    outb(SISCR, 0x32);		/* TW: Bridge connection info */
-    usScratchCR32 = inb(SISCR+1);
-    outb(SISCR, 0x30);
-    usScratchCR30 = inb(SISCR+1);
- 
-    xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
-	       "Bridge registers were 30=0x%02x, 31=0x%02x, 32=0x%02x, "
-	       "33=0x%02x (VBFlags=0x%x)\n",
-	       usScratchCR30, usScratchCR31, usScratchCR32, 
-	       usScratchCR33, pSiS->VBFlags);
-    usScratchCR30 = 0;
-    usScratchCR31 &= ~0x60;  /* TW: clear VB_Drivermode & VB_OutputDisable */
-  
-    vbflag=pSiS->VBFlags;
-    switch (vbflag & (CRT2_TV|CRT2_LCD|CRT2_VGA))
-    { case CRT2_TV:
-	if (vbflag & TV_HIVISION)
-	    usScratchCR30 |= 0x80;
-	else if (vbflag & TV_SVIDEO)
-	    usScratchCR30 |= 0x08;
-	else if (vbflag & TV_AVIDEO)
-	    usScratchCR30 |= 0x04;
-	else if (vbflag & TV_SCART)
-	    usScratchCR30 |= 0x10;
-	if (vbflag & TV_PAL)
-	    usScratchCR31 |= 0x01;
-	else
-	    usScratchCR31 &= ~0x01;
-#if 0	/* TW: Old code */
-	if (vbflag & TV_HIVISION) usScratchCR30 |= 0x80;
-	else if (vbflag & TV_PAL) usScratchCR31 |= 0x01;
 
-	if (vbflag & TV_AVIDEO) usScratchCR30 |= 0x04;
-	else if (vbflag & TV_SVIDEO) usScratchCR30 |= 0x08;
-	else if (vbflag & TV_SCART) usScratchCR30 |= 0x10;
+    switch (pSiS->VGAEngine) {
+	case SIS_300_VGA:
+	   if ((!pSiS->NoAccel) && (pSiS->TurboQueue)) {
+	        /* TQ size is always 512k */
+           	temp = (pScrn->videoRam/64) - 8;
+           	SR26 = temp & 0xFF;
+           	inSISIDXREG(SISSR, 0x27, SR27);
+		SR27 &= 0xFC;
+		SR27 |= (0xF0 | ((temp >> 8) & 3));
+           	outSISIDXREG(SISSR, 0x26, SR26);
+           	outSISIDXREG(SISSR, 0x27, SR27);
+	   }
+	   break;
+	case SIS_315_VGA:
+	   if (!pSiS->NoAccel) {
+	      /* TW: On 310/325 series, there are three queue modes available
+	       *     which are chosen by setting bits 7:5 in SR26:
+	       * 1. MMIO queue mode (bit 5, 0x20). The hardware will keep
+	       *    track of the queue, the FIFO, command parsing and so
+	       *    on. This is the one comparable to the 300 series.
+	       * 2. VRAM queue mode (bit 6, 0x40). In this case, one will
+	       *    have to do queue management himself. Register 0x85c4 will
+	       *    hold the location of the next free queue slot, 0x85c8
+	       *    is the "queue read pointer" whose way of working is
+	       *    unknown to me. Anyway, this mode would require a
+	       *    translation of the MMIO commands to some kind of
+	       *    accelerator assembly and writing these commands
+	       *    to the memory location pointed to by 0x85c4.
+	       *    We will not use this, as nobody knows how this
+	       *    "assembly" works, and as it would require a complete
+	       *    re-write of the accelerator code.
+	       * 3. AGP queue mode (bit 7, 0x80). Works as 2., but keeps the
+	       *    queue in AGP memory space.
+	       * We go MMIO here.
+	       * SR26 bit 4 is called "Bypass H/W queue".
+	       * SR26 bit 1 is called "Enable Command Queue Auto Correction"
+	       * SR26 bit 0 resets the queue
+	       * Size of queue memory is encoded in bits 3:2 like this:
+	       *    00  (0x00)  512K
+	       *    01  (0x04)  1M
+	       *    10  (0x08)  2M
+	       *    11  (0x0C)  4M
+	       * The queue location is to be written to 0x85C0.
+	       */
+#if 0
+	      if (pSiS->TurboQueue) {
 #endif
-	usScratchCR30 |= 0x01;
-	usScratchCR31 &= ~0x04;
-	break;
-	case CRT2_LCD:
-	    usScratchCR30 |= 0x21;
-	    usScratchCR31 |= 0x02;   
-            break;
-	case CRT2_VGA:
-	    usScratchCR30 |= 0x41;
-	    break;
-	default:  /* TW: When CRT2Type is NONE, we can calculate a proper rate for CRT1 */
-	    usScratchCR30 |= 0x00;
-	    usScratchCR31 |= 0x20; /* TW: VB_OUTPUT_DISABLE */
-	    if (pSiS->UseVESA)
-		usScratchCR33 = SISSearchCRT1Rate(pScrn->currentMode);
+	   	/* TW: We only use MMIO Cmd Queue, not VRAM or AGP */
+	   	/* TW: Set Command Queue Threshold to max value 11111b */
+	   	outSISIDXREG(SISSR, 0x27, 0x1F);
+	   	/* TW: Syncronous reset for Command Queue */
+	   	outSISIDXREG(SISSR, 0x26, 0x01);
+	   	/* TW: Do some magic (cp readport to writeport) */
+	   	temp = MMIO_IN32(pSiS->IOBase, 0x85C8);
+	   	MMIO_OUT32(pSiS->IOBase, 0x85C4, temp);
+	   	/* TW: Enable MMIO Command Queue mode (0x20),
+		 *     Enable_command_queue_auto_correction (0x02)   
+		 *             (no idea, but sounds good, so use it)
+		 *     512k (0x00) (does this apply to MMIO mode?) */
+    	   	outSISIDXREG(SISSR, 0x26, 0x22);
+	   	/* TW: Calc Command Queue position (Q is always 512k)*/
+	   	temp = (pScrn->videoRam - 512) * 1024;
+	   	/* TW: Set Q position */
+	   	MMIO_OUT32(pSiS->IOBase, 0x85C0, temp);
+#if 0
+              } else {
+	      	/* TW: Is there a non-TurboQueue mode within MMIO mode? */
+	      }
+#endif
+	   }
+	   break;
+	default:
+	   break;
     }
-    /*
-     * TW: for VESA: no DRIVERMODE, otherwise
+}
+
+/* TW: Things to do before a ModeSwitch. We set up the
+ *     video bridge configuration and the TurboQueue.
+ */
+void SiSPreSetMode(ScrnInfoPtr pScrn, DisplayModePtr mode)
+{
+    SISPtr         pSiS = SISPTR(pScrn);
+    unsigned char  usScratchCR30, usScratchCR31;
+    unsigned char  usScratchCR32, usScratchCR33;
+    unsigned char  usScratchCR17, usScratchCR38 = 0;
+    int            vbflag, temp = 0;
+    int 	   crt1rateindex = 0;
+
+#ifdef UNLOCK_ALWAYS
+    sisSaveUnlockExtRegisterLock(pSiS, NULL, NULL);    /* Unlock Registers */
+#endif
+
+    vbflag = pSiS->VBFlags;
+    pSiS->IsCustom = FALSE;
+    
+    if(pSiS->HaveCustomModes) {
+       if(!(mode->type & M_T_DEFAULT)) {
+	 pSiS->IsCustom = TRUE;
+       }
+    }
+
+    /* TW: The CR3x registers are for communicating with our BIOS emulation
+     * code (native code in init.c/init301.c) or the BIOS (via VESA)
+     */
+    inSISIDXREG(SISCR, 0x30, usScratchCR30);  /* Bridge config */
+    inSISIDXREG(SISCR, 0x31, usScratchCR31);  /* Bridge config */
+    usScratchCR32 = pSiS->newCR32;            /* Bridge connection info (use our new value) */
+    inSISIDXREG(SISCR, 0x33, usScratchCR33);  /* CRT1 refresh rate index */
+    if(pSiS->Chipset != PCI_CHIP_SIS300) {
+       switch(pSiS->VGAEngine) {
+       case SIS_300_VGA: temp = 0x35; break;
+       case SIS_315_VGA: temp = 0x38; break;
+       }
+    }
+    if(temp) inSISIDXREG(SISCR, temp, usScratchCR38); /* PAL-M, PAL-N selection */
+
+    xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3, "VBFlags=0x%x\n", pSiS->VBFlags);
+
+    xf86DrvMsgVerb(pScrn->scrnIndex, X_PROBED, 3, 
+	   "Before: CR30=0x%02x, CR31=0x%02x, CR32=0x%02x, CR33=0x%02x, CR%02x=0x%02x\n",
+              usScratchCR30, usScratchCR31, usScratchCR32, usScratchCR33, temp, usScratchCR38);
+
+    usScratchCR30 = 0;
+    usScratchCR31 &= ~0x60;  /* TW: Clear VB_Drivermode & VB_OutputDisable */
+#if 0  /* TW: For future use */
+    if( (pSiS->VBFlags & VB_LVDS) ||
+        (pSiS->VBFlags & VB_301)  ||
+        ( (pSiS->VBFlags & (VB_301B | VB_302B |VB_30xLV | VB_30xLVX)) &&
+	  (!(pSiS->VBLCDFlags & VB_LCD_1400x1050)) ) ) {
+#endif
+       usScratchCR31 |= 0x04;   /* TW: Set VB_NotSimuMode (not for 30xB/1400x1050?) */
+#if 0
+    }
+#endif
+
+    switch(vbflag & (CRT2_TV|CRT2_LCD|CRT2_VGA)) {
+      case CRT2_TV:
+          	if(vbflag & TV_CHSCART) {
+				usScratchCR38 |= 0x04;
+				usScratchCR31 |= 0x01;
+		} else if(vbflag & TV_CHHDTV) {
+				usScratchCR38 |= 0x08;
+				usScratchCR31 &= ~0x01;
+        	} else if(vbflag & TV_HIVISION)
+		          	usScratchCR30 |= 0x80;
+		else if(vbflag & TV_SVIDEO)
+				usScratchCR30 |= 0x08;
+		else if(vbflag & TV_AVIDEO)
+				usScratchCR30 |= 0x04;
+		else if(vbflag & TV_SCART)
+				usScratchCR30 |= 0x10;
+		else 
+			        usScratchCR30 |= 0x08;    /* default: SVIDEO */
+
+		if(!(vbflag & (TV_CHSCART | TV_CHHDTV))) {
+		    if(vbflag & TV_PAL) {
+				usScratchCR31 |= 0x01;
+				usScratchCR38 &= ~0xC0;
+		                if( (vbflag & VB_SISBRIDGE) ||
+		                    ((vbflag & VB_CHRONTEL) && (pSiS->ChrontelType == CHRONTEL_701x)) )  {
+					if(vbflag & TV_PALM)      usScratchCR38 |= 0x40;
+					else if(vbflag & TV_PALN) usScratchCR38 |= 0x80;
+		    		}
+		    } else
+				usScratchCR31 &= ~0x01;
+		}
+
+		usScratchCR30 |= 0x01;    /* Set SimuScanMode  */
+
+		usScratchCR31 &= ~0x04;   /* Clear NotSimuMode */
+		pSiS->SiS_Pr->SiS_CHOverScan = pSiS->UseCHOverScan;
+		if(pSiS->OptTVSOver == 1) {
+			pSiS->SiS_Pr->SiS_CHSOverScan = TRUE;
+		} else {
+		        pSiS->SiS_Pr->SiS_CHSOverScan = FALSE;
+		}
+                break;
+      case CRT2_LCD:
+                usScratchCR30 |= 0x21;    /* LCD + SimuScanMode */
+                break;
+      case CRT2_VGA:
+                usScratchCR30 |= 0x41;    /* VGA2 + SimuScanMode */
+                break;
+      default:
+            	usScratchCR30 |= 0x00;
+            	usScratchCR31 |= 0x20;    /* VB_OUTPUT_DISABLE */
+		if(pSiS->UseVESA) {
+		   crt1rateindex = SISSearchCRT1Rate(pScrn, mode);
+		}
+    }
+    /* TW: for VESA: no DRIVERMODE, otherwise
      * -) CRT2 will not be initialized correctly when using mode
-     *    where LCD has to scale
+     *    where LCD has to scale, and
      * -) CRT1 will have too low rate
      */
-    if (pSiS->UseVESA) usScratchCR31 &= ~0x40;
-    else usScratchCR31 |= 0x40;   /* 0x40=drivermode */
+     if (pSiS->UseVESA) {
+        usScratchCR31 &= 0x40;  /* TW: Clear Drivermode */
+#ifdef TWDEBUG
+        usScratchCR31 |= 0x40;  /* DEBUG (for non-slave mode VESA) */
+	crt1rateindex = SISSearchCRT1Rate(pScrn, mode);
+#endif
+     } else {
+        usScratchCR31 |=  0x40;                 /* TW: Set Drivermode */
+	if(!pSiS->IsCustom) {
+           crt1rateindex = SISSearchCRT1Rate(pScrn, mode);
+	} else {
+	   crt1rateindex = usScratchCR33;
+	}
+     }
+     outSISIDXREG(SISCR, 0x30, usScratchCR30);
+     outSISIDXREG(SISCR, 0x31, usScratchCR31);
+     if(temp) {
+        usScratchCR38 &= ~0x03;   /* Clear LCDA/DualEdge bits */
+     	outSISIDXREG(SISCR, temp, usScratchCR38);
+     }
+
+     pSiS->SiS_Pr->SiS_UseOEM = pSiS->OptUseOEM;
+
+#ifdef SISDUALHEAD
+     if(pSiS->DualHeadMode) {
+        if(pSiS->SecondHead) {
+	    /* CRT1 */
+	    usScratchCR33 &= 0xf0;
+	    usScratchCR33 |= (crt1rateindex & 0x0f);
+	} else {
+	    /* CRT2 */
+	    usScratchCR33 &= 0x0f;
+	    if(vbflag & CRT2_VGA) usScratchCR33 |= ((crt1rateindex << 4) & 0xf0);
+	}
+     } else {
+#endif
+        if(vbflag & CRT2_VGA) {
+           usScratchCR33 = (crt1rateindex & 0x0f) | ((crt1rateindex & 0x0f) << 4);
+	} else {
+	   usScratchCR33 = crt1rateindex & 0x0f;
+	}
+	if((!(pSiS->UseVESA)) && (vbflag & CRT2_ENABLE)) {
+#ifndef TWDEBUG	
+	   if(pSiS->CRT1off) usScratchCR33 &= 0xf0;
+#endif	   
+	}
+#ifdef SISDUALHEAD
+     }
+#endif
+     outSISIDXREG(SISCR, 0x33, usScratchCR33);
+
+     xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3,
+		"After:  CR30=0x%02x, CR31=0x%02x, CR33=0x%02x\n",
+		    usScratchCR30, usScratchCR31, usScratchCR33);
+
+     /* Enable TurboQueue */
+     SiSEnableTurboQueue(pScrn);
+
+     if((!pSiS->UseVESA) && (pSiS->VBFlags & CRT2_ENABLE)) {
+        /* Switch on CRT1 for modes that require the bridge in SlaveMode */
+	inSISIDXREG(SISCR, 0x17, usScratchCR17);
+	if(!(usScratchCR17 & 0x80)) {
+          orSISIDXREG(SISCR, 0x17, 0x80);
+	  outSISIDXREG(SISSR, 0x00, 0x01);
+	  usleep(10000);
+          outSISIDXREG(SISSR, 0x00, 0x03);
+	}
+     }
+
+}
+
+/* Functions for adjusting various TV settings */
+
+/* These are used by the PostSetMode() functions as well as
+ * the (hopefully) upcoming display properties extension/tool.
+ *
+ * There is each a Set and a Get routine. The Set functions
+ * take a value of the same range as the corresponding option.
+ * The Get routines return a value of the same range (although
+ * not necessarily the same value as previously set because
+ * of the lower resolution of the respective setting compared
+ * to the valid range).
+ * The Get routines return -2 on error (eg. hardware does not
+ * support this setting).
+ * Note: The x and y positioning routines accept a position
+ * RELATIVE to the default position. All other routines 
+ * take ABSOLUTE values.
+ *
+ * The Set functions will store the property regardless if TV is
+ * currently used or not and if the hardware supports the property
+ * or not. The Get routines will return this stored
+ * value if TV is not currently used (because the register does
+ * not contain the correct value then) or if the hardware supports
+ * the respective property. This should make it easier for the 
+ * display property tool because it does not have to know the
+ * hardware features.
+ *
+ * All the routines are dual head aware. It does not matter
+ * if the function is called from the CRT1 or CRT2 session.
+ * The values will be stored in pSiSEnt if we're running dual.
+ */
+
+void SiS_SetCHTVlumabandwidthcvbs(ScrnInfoPtr pScrn, int val)
+{
+   SISPtr pSiS = SISPTR(pScrn);
+#ifdef SISDUALHEAD
+   SISEntPtr pSiSEnt = pSiS->entityPrivate;
+#endif
+   
+   pSiS->chtvlumabandwidthcvbs = val;
+#ifdef SISDUALHEAD
+   if(pSiSEnt) pSiSEnt->chtvlumabandwidthcvbs = val;
+#endif
+
+   if(!(pSiS->VBFlags & CRT2_TV)) return;
+   if(!(pSiS->VBFlags & VB_CHRONTEL)) return;
+   
+#ifdef UNLOCK_ALWAYS
+   sisSaveUnlockExtRegisterLock(pSiS, NULL, NULL);
+#endif
+   
+   switch(pSiS->ChrontelType) {
+       case CHRONTEL_700x:
+           val /= 8;
+           if((val == 0) || (val == 1)) {
+	      SiS_SetCH70xxANDOR(pSiS->SiS_Pr, ((val << 8) | 0x03),0xFE);
+           }
+	   break;
+       case CHRONTEL_701x:
+           val /= 4;
+	   if((val >= 0) && (val <= 3)) {
+	       SiS_SetCH70xxANDOR(pSiS->SiS_Pr, ((val << 8) | 0x02),0xFC);
+	   }
+           break;
+   }   
+}
+
+int SiS_GetCHTVlumabandwidthcvbs(ScrnInfoPtr pScrn)
+{
+   SISPtr pSiS = SISPTR(pScrn);
+#ifdef SISDUALHEAD
+   SISEntPtr pSiSEnt = pSiS->entityPrivate;
+#endif
+
+   if(!(pSiS->VBFlags & VB_CHRONTEL && pSiS->VBFlags & CRT2_TV)) {
+#ifdef SISDUALHEAD
+      if(pSiSEnt && pSiS->DualHeadMode) 
+           return (int)pSiSEnt->chtvlumabandwidthcvbs;
+      else 
+#endif
+           return (int)pSiS->chtvlumabandwidthcvbs;
+   } else {
+#ifdef UNLOCK_ALWAYS
+      sisSaveUnlockExtRegisterLock(pSiS, NULL, NULL);
+#endif
+      switch(pSiS->ChrontelType) {
+      case CHRONTEL_700x:
+           return(int)((SiS_GetCH70xx(pSiS->SiS_Pr, 0x03) & 0x01) * 8);
+      case CHRONTEL_701x:
+	   return(int)((SiS_GetCH70xx(pSiS->SiS_Pr, 0x02) & 0x03) * 4);
+      default:
+           return -2;   
+      }
+   }
+}
+
+void SiS_SetCHTVlumabandwidthsvideo(ScrnInfoPtr pScrn, int val)
+{
+   SISPtr pSiS = SISPTR(pScrn);
+#ifdef SISDUALHEAD
+   SISEntPtr pSiSEnt = pSiS->entityPrivate;
+#endif
+
+   pSiS->chtvlumabandwidthsvideo = val;
+#ifdef SISDUALHEAD
+   if(pSiSEnt) pSiSEnt->chtvlumabandwidthsvideo = val;
+#endif
+   
+   if(!(pSiS->VBFlags & CRT2_TV)) return;
+   if(!(pSiS->VBFlags & VB_CHRONTEL)) return;
+      
+#ifdef UNLOCK_ALWAYS
+   sisSaveUnlockExtRegisterLock(pSiS, NULL, NULL);
+#endif
+
+   switch(pSiS->ChrontelType) {
+       case CHRONTEL_700x:
+           val /= 6;
+           if((val >= 0) && (val <= 2)) {
+	      SiS_SetCH70xxANDOR(pSiS->SiS_Pr, ((val << 9) | 0x03),0xF9);
+           }
+	   break;
+       case CHRONTEL_701x:
+           val /= 4;
+	   if((val >= 0) && (val <= 3)) {
+	      SiS_SetCH70xxANDOR(pSiS->SiS_Pr, ((val << 10) | 0x02),0xF3);
+	   }
+           break;
+   }	   
+}
+
+int SiS_GetCHTVlumabandwidthsvideo(ScrnInfoPtr pScrn)
+{
+   SISPtr pSiS = SISPTR(pScrn);
+#ifdef SISDUALHEAD
+   SISEntPtr pSiSEnt = pSiS->entityPrivate;
+#endif
+
+   if(!(pSiS->VBFlags & VB_CHRONTEL && pSiS->VBFlags & CRT2_TV)) {
+#ifdef SISDUALHEAD   
+      if(pSiSEnt && pSiS->DualHeadMode) 
+           return (int)pSiSEnt->chtvlumabandwidthsvideo;
+      else 
+#endif
+           return (int)pSiS->chtvlumabandwidthsvideo;
+   } else {
+#ifdef UNLOCK_ALWAYS
+      sisSaveUnlockExtRegisterLock(pSiS, NULL, NULL);
+#endif
+      switch(pSiS->ChrontelType) {
+      case CHRONTEL_700x:
+           return(int)(((SiS_GetCH70xx(pSiS->SiS_Pr, 0x03) & 0x06) >> 1) * 6);
+      case CHRONTEL_701x:
+	   return(int)(((SiS_GetCH70xx(pSiS->SiS_Pr, 0x02) & 0x0c) >> 2) * 4);
+      default:
+           return -2;   
+      }
+   }      
+}
+
+void SiS_SetCHTVlumaflickerfilter(ScrnInfoPtr pScrn, int val)
+{
+   SISPtr pSiS = SISPTR(pScrn);
+#ifdef SISDUALHEAD
+   SISEntPtr pSiSEnt = pSiS->entityPrivate;
+#endif
+
+   pSiS->chtvlumaflickerfilter = val;
+#ifdef SISDUALHEAD
+   if(pSiSEnt) pSiSEnt->chtvlumaflickerfilter = val;
+#endif
+   
+   if(!(pSiS->VBFlags & CRT2_TV)) return;
+   if(!(pSiS->VBFlags & VB_CHRONTEL)) return;
+   
+#ifdef UNLOCK_ALWAYS
+   sisSaveUnlockExtRegisterLock(pSiS, NULL, NULL);
+#endif
+
+   switch(pSiS->ChrontelType) {
+       case CHRONTEL_700x:
+           val /= 6;
+           if((val >= 0) && (val <= 2)) {
+	      SiS_SetCH70xxANDOR(pSiS->SiS_Pr, ((val << 10) | 0x01),0xF3);
+           }
+	   break;
+       case CHRONTEL_701x:
+           val /= 4;
+	   if((val >= 0) && (val <= 3)) {
+	      SiS_SetCH70xxANDOR(pSiS->SiS_Pr, ((val << 10) | 0x01),0xF3);
+	   }
+           break;
+   } 
+}
+
+int SiS_GetCHTVlumaflickerfilter(ScrnInfoPtr pScrn)
+{
+   SISPtr pSiS = SISPTR(pScrn);
+#ifdef SISDUALHEAD
+   SISEntPtr pSiSEnt = pSiS->entityPrivate;
+#endif
   
-    sisSetReg1(SISCR, 0x30, usScratchCR30);
-    sisSetReg1(SISCR, 0x31, usScratchCR31);
-    sisSetReg1(SISCR, 0x33, usScratchCR33);
+   if(!(pSiS->VBFlags & VB_CHRONTEL && pSiS->VBFlags & CRT2_TV)) {
+#ifdef SISDUALHEAD   
+      if(pSiSEnt && pSiS->DualHeadMode) 
+          return (int)pSiSEnt->chtvlumaflickerfilter;
+      else
+#endif      
+          return (int)pSiS->chtvlumaflickerfilter;
+   } else {
+#ifdef UNLOCK_ALWAYS
+      sisSaveUnlockExtRegisterLock(pSiS, NULL, NULL);
+#endif
+      switch(pSiS->ChrontelType) {
+      case CHRONTEL_700x:
+           return(int)(((SiS_GetCH70xx(pSiS->SiS_Pr, 0x01) & 0x0c) >> 2) * 6);
+      case CHRONTEL_701x:
+	   return(int)(((SiS_GetCH70xx(pSiS->SiS_Pr, 0x01) & 0x0c) >> 2) * 4);
+      default:
+           return -2;   
+      }
+   }     
+}
+
+void SiS_SetCHTVchromabandwidth(ScrnInfoPtr pScrn, int val)
+{
+   SISPtr pSiS = SISPTR(pScrn);
+#ifdef SISDUALHEAD
+   SISEntPtr pSiSEnt = pSiS->entityPrivate;
+#endif
+
+   pSiS->chtvchromabandwidth = val;
+#ifdef SISDUALHEAD
+   if(pSiSEnt) pSiSEnt->chtvchromabandwidth = val;
+#endif
+   
+   if(!(pSiS->VBFlags & CRT2_TV)) return;
+   if(!(pSiS->VBFlags & VB_CHRONTEL)) return;
+   
+#ifdef UNLOCK_ALWAYS
+   sisSaveUnlockExtRegisterLock(pSiS, NULL, NULL);
+#endif
+
+   switch(pSiS->ChrontelType) {
+       case CHRONTEL_700x:
+           val /= 4;
+           if((val >= 0) && (val <= 3)) {
+              SiS_SetCH70xxANDOR(pSiS->SiS_Pr, ((val << 12) | 0x03),0xCF);
+           }
+	   break;
+       case CHRONTEL_701x:
+           val /= 8;
+	   if((val >= 0) && (val <= 1)) {
+	      SiS_SetCH70xxANDOR(pSiS->SiS_Pr, ((val << 12) | 0x02),0xEF);
+	   }
+           break;
+   }	   
+}
+
+int SiS_GetCHTVchromabandwidth(ScrnInfoPtr pScrn)
+{
+   SISPtr pSiS = SISPTR(pScrn);
+#ifdef SISDUALHEAD
+   SISEntPtr pSiSEnt = pSiS->entityPrivate;
+#endif
+
+   if(!(pSiS->VBFlags & VB_CHRONTEL && pSiS->VBFlags & CRT2_TV)) {
+#ifdef SISDUALHEAD   
+      if(pSiSEnt && pSiS->DualHeadMode) 
+           return (int)pSiSEnt->chtvchromabandwidth;
+      else
+#endif   
+           return (int)pSiS->chtvchromabandwidth;
+   } else {
+#ifdef UNLOCK_ALWAYS
+      sisSaveUnlockExtRegisterLock(pSiS, NULL, NULL);
+#endif
+      switch(pSiS->ChrontelType) {
+      case CHRONTEL_700x:
+           return(int)(((SiS_GetCH70xx(pSiS->SiS_Pr, 0x03) & 0x30) >> 4) * 4);
+      case CHRONTEL_701x:
+	   return(int)(((SiS_GetCH70xx(pSiS->SiS_Pr, 0x02) & 0x10) >> 4) * 8);
+      default:
+           return -2;   
+      }
+   }    
+}
+
+void SiS_SetCHTVchromaflickerfilter(ScrnInfoPtr pScrn, int val)
+{
+   SISPtr pSiS = SISPTR(pScrn);
+#ifdef SISDUALHEAD
+   SISEntPtr pSiSEnt = pSiS->entityPrivate;
+#endif
+
+   pSiS->chtvchromaflickerfilter = val;
+#ifdef SISDUALHEAD
+   if(pSiSEnt) pSiSEnt->chtvchromaflickerfilter = val;
+#endif
+   
+   if(!(pSiS->VBFlags & CRT2_TV)) return;
+   if(!(pSiS->VBFlags & VB_CHRONTEL)) return;
+   
+#ifdef UNLOCK_ALWAYS
+   sisSaveUnlockExtRegisterLock(pSiS, NULL, NULL);
+#endif
+
+   switch(pSiS->ChrontelType) {
+       case CHRONTEL_700x:
+           val /= 6;
+           if((val >= 0) && (val <= 2)) {
+	      SiS_SetCH70xxANDOR(pSiS->SiS_Pr, ((val << 12) | 0x01),0xCF);
+           }
+	   break;
+       case CHRONTEL_701x:
+           val /= 4;
+	   if((val >= 0) && (val <= 3)) {
+	      SiS_SetCH70xxANDOR(pSiS->SiS_Pr, ((val << 12) | 0x01),0xCF);
+	   }
+           break;
+   }	   
+}
+
+int SiS_GetCHTVchromaflickerfilter(ScrnInfoPtr pScrn)
+{
+   SISPtr pSiS = SISPTR(pScrn);
+#ifdef SISDUALHEAD
+   SISEntPtr pSiSEnt = pSiS->entityPrivate;
+#endif
+
+   if(!(pSiS->VBFlags & VB_CHRONTEL && pSiS->VBFlags & CRT2_TV)) {
+#ifdef SISDUALHEAD   
+      if(pSiSEnt && pSiS->DualHeadMode) 
+           return (int)pSiSEnt->chtvchromaflickerfilter;
+      else
+#endif
+           return (int)pSiS->chtvchromaflickerfilter;
+   } else {
+#ifdef UNLOCK_ALWAYS
+      sisSaveUnlockExtRegisterLock(pSiS, NULL, NULL);
+#endif
+      switch(pSiS->ChrontelType) {
+      case CHRONTEL_700x:
+           return(int)(((SiS_GetCH70xx(pSiS->SiS_Pr, 0x01) & 0x30) >> 4) * 6);
+      case CHRONTEL_701x:
+	   return(int)(((SiS_GetCH70xx(pSiS->SiS_Pr, 0x01) & 0x30) >> 4) * 4);
+      default:
+           return -2;   
+      }
+   }    
+}
+
+void SiS_SetCHTVcvbscolor(ScrnInfoPtr pScrn, int val)
+{
+   SISPtr pSiS = SISPTR(pScrn);
+#ifdef SISDUALHEAD
+   SISEntPtr pSiSEnt = pSiS->entityPrivate;
+#endif
+
+   pSiS->chtvcvbscolor = val ? 1 : 0;
+#ifdef SISDUALHEAD
+   if(pSiSEnt) pSiSEnt->chtvcvbscolor = pSiS->chtvcvbscolor;
+#endif
+   
+   if(!(pSiS->VBFlags & CRT2_TV)) return;
+   if(!(pSiS->VBFlags & VB_CHRONTEL)) return;
+   
+#ifdef UNLOCK_ALWAYS
+   sisSaveUnlockExtRegisterLock(pSiS, NULL, NULL);
+#endif
+   
+   switch(pSiS->ChrontelType) {
+       case CHRONTEL_700x:
+           if(!val)  SiS_SetCH70xxANDOR(pSiS->SiS_Pr, 0x4003,0x00);
+           else      SiS_SetCH70xxANDOR(pSiS->SiS_Pr, 0x0003,~0x40);
+	   break;
+       case CHRONTEL_701x:
+           if(!val)  SiS_SetCH70xxANDOR(pSiS->SiS_Pr, 0x0002,~0x20);
+	   else      SiS_SetCH70xxANDOR(pSiS->SiS_Pr, 0x2002,0x00);
+           break;
+   }	   
+}
+
+int SiS_GetCHTVcvbscolor(ScrnInfoPtr pScrn)
+{
+   SISPtr pSiS = SISPTR(pScrn);
+#ifdef SISDUALHEAD
+   SISEntPtr pSiSEnt = pSiS->entityPrivate;
+#endif
+
+   if(!(pSiS->VBFlags & VB_CHRONTEL && pSiS->VBFlags & CRT2_TV)) {
+#ifdef SISDUALHEAD   
+      if(pSiSEnt && pSiS->DualHeadMode) 
+           return (int)pSiSEnt->chtvcvbscolor;
+      else
+#endif
+           return (int)pSiS->chtvcvbscolor;
+   } else {
+#ifdef UNLOCK_ALWAYS
+      sisSaveUnlockExtRegisterLock(pSiS, NULL, NULL);
+#endif
+      switch(pSiS->ChrontelType) {
+      case CHRONTEL_700x:
+           return(int)(((SiS_GetCH70xx(pSiS->SiS_Pr, 0x03) & 0x40) >> 6) ^ 0x01);
+      case CHRONTEL_701x:
+	   return(int)(((SiS_GetCH70xx(pSiS->SiS_Pr, 0x02) & 0x20) >> 5) ^ 0x01);
+      default:
+           return -2;   
+      }
+   }    
+}
+
+void SiS_SetCHTVtextenhance(ScrnInfoPtr pScrn, int val)
+{
+   SISPtr pSiS = SISPTR(pScrn);
+#ifdef SISDUALHEAD
+   SISEntPtr pSiSEnt = pSiS->entityPrivate;
+#endif
+
+   pSiS->chtvtextenhance = val;
+#ifdef SISDUALHEAD
+   if(pSiSEnt) pSiSEnt->chtvtextenhance = val;
+#endif
+   
+   if(!(pSiS->VBFlags & CRT2_TV)) return;
+   if(!(pSiS->VBFlags & VB_CHRONTEL)) return;
+   
+#ifdef UNLOCK_ALWAYS
+   sisSaveUnlockExtRegisterLock(pSiS, NULL, NULL);
+#endif
+
+   switch(pSiS->ChrontelType) {
+       case CHRONTEL_700x:
+           val /= 6;
+           if((val >= 0) && (val <= 2)) {
+              SiS_SetCH70xxANDOR(pSiS->SiS_Pr, ((val << 8) | 0x01),0xFC);
+           }
+	   break;
+       case CHRONTEL_701x:
+           val /= 2;
+	   if((val >= 0) && (val <= 7)) {
+	      SiS_SetCH70xxANDOR(pSiS->SiS_Pr, ((val << 8) | 0x03),0xF8);
+	   }
+           break;
+   }	   
+}
+
+int SiS_GetCHTVtextenhance(ScrnInfoPtr pScrn)
+{
+   SISPtr pSiS = SISPTR(pScrn);
+#ifdef SISDUALHEAD
+   SISEntPtr pSiSEnt = pSiS->entityPrivate;
+#endif
+
+   if(!(pSiS->VBFlags & VB_CHRONTEL && pSiS->VBFlags & CRT2_TV)) {
+#ifdef SISDUALHEAD   
+      if(pSiSEnt && pSiS->DualHeadMode) 
+           return (int)pSiSEnt->chtvtextenhance;
+      else
+#endif      
+           return (int)pSiS->chtvtextenhance;
+   } else {
+#ifdef UNLOCK_ALWAYS
+      sisSaveUnlockExtRegisterLock(pSiS, NULL, NULL);
+#endif
+      switch(pSiS->ChrontelType) {
+      case CHRONTEL_700x:
+	   return(int)((SiS_GetCH70xx(pSiS->SiS_Pr, 0x01) & 0x03) * 6);
+      case CHRONTEL_701x:
+	   return(int)((SiS_GetCH70xx(pSiS->SiS_Pr, 0x03) & 0x07) * 2);
+      default:
+           return -2;   
+      }
+   }
+}
+
+void SiS_SetCHTVcontrast(ScrnInfoPtr pScrn, int val)
+{
+   SISPtr pSiS = SISPTR(pScrn);
+#ifdef SISDUALHEAD
+   SISEntPtr pSiSEnt = pSiS->entityPrivate;
+#endif
+
+   pSiS->chtvcontrast = val;
+#ifdef SISDUALHEAD
+   if(pSiSEnt) pSiSEnt->chtvcontrast = val;
+#endif
+   
+   if(!(pSiS->VBFlags & CRT2_TV)) return;
+   if(!(pSiS->VBFlags & VB_CHRONTEL)) return;
+   
+#ifdef UNLOCK_ALWAYS
+   sisSaveUnlockExtRegisterLock(pSiS, NULL, NULL);
+#endif
+
+   val /= 2;
+   if((val >= 0) && (val <= 7)) {
+       switch(pSiS->ChrontelType) {
+       case CHRONTEL_700x:
+              SiS_SetCH70xxANDOR(pSiS->SiS_Pr, ((val << 8) | 0x11),0xF8);
+	      break;
+       case CHRONTEL_701x:
+	      SiS_SetCH70xxANDOR(pSiS->SiS_Pr, ((val << 8) | 0x08),0xF8);
+              break;
+       } 
+   } 	  
+}
+
+int SiS_GetCHTVcontrast(ScrnInfoPtr pScrn)
+{
+   SISPtr pSiS = SISPTR(pScrn);
+#ifdef SISDUALHEAD
+   SISEntPtr pSiSEnt = pSiS->entityPrivate;
+#endif
+
+   if(!(pSiS->VBFlags & VB_CHRONTEL && pSiS->VBFlags & CRT2_TV)) {
+#ifdef SISDUALHEAD   
+      if(pSiSEnt && pSiS->DualHeadMode) 
+           return (int)pSiSEnt->chtvcontrast;
+      else
+#endif      
+           return (int)pSiS->chtvcontrast;
+   } else {
+#ifdef UNLOCK_ALWAYS
+      sisSaveUnlockExtRegisterLock(pSiS, NULL, NULL);
+#endif   
+      switch(pSiS->ChrontelType) {
+      case CHRONTEL_700x:
+           return(int)((SiS_GetCH70xx(pSiS->SiS_Pr, 0x11) & 0x07) * 2);
+      case CHRONTEL_701x:
+	   return(int)((SiS_GetCH70xx(pSiS->SiS_Pr, 0x08) & 0x07) * 2);
+      default:
+           return -2;   
+      }
+   }
+}
+
+void SiS_SetSISTVedgeenhance(ScrnInfoPtr pScrn, int val)
+{
+   SISPtr pSiS = SISPTR(pScrn);
+#ifdef SISDUALHEAD
+   SISEntPtr pSiSEnt = pSiS->entityPrivate;
+#endif
+
+   pSiS->sistvedgeenhance = val;
+#ifdef SISDUALHEAD
+   if(pSiSEnt) pSiSEnt->sistvedgeenhance = val;
+#endif
+   
+   if(!(pSiS->VBFlags & CRT2_TV)) return;
+   if(!(pSiS->VBFlags & VB_301)) return;
+   
+#ifdef UNLOCK_ALWAYS
+   sisSaveUnlockExtRegisterLock(pSiS, NULL, NULL);
+#endif
+
+   val /= 2;
+   if((val >= 0) && (val <= 7)) {
+       setSISIDXREG(SISPART2,0x3A, 0x1F, (val << 5));
+   }
+}
+
+int SiS_GetSISTVedgeenhance(ScrnInfoPtr pScrn)
+{
+   SISPtr pSiS = SISPTR(pScrn);
+#ifdef SISDUALHEAD
+   SISEntPtr pSiSEnt = pSiS->entityPrivate;
+#endif
+
+   if(!(pSiS->VBFlags & VB_301 && pSiS->VBFlags & CRT2_TV)) {
+#ifdef SISDUALHEAD   
+      if(pSiSEnt && pSiS->DualHeadMode) 
+           return (int)pSiSEnt->sistvedgeenhance;
+      else 
+#endif      
+           return (int)pSiS->sistvedgeenhance;
+   } else {
+      unsigned char temp;
+#ifdef UNLOCK_ALWAYS
+      sisSaveUnlockExtRegisterLock(pSiS, NULL, NULL);
+#endif      
+      inSISIDXREG(SISPART2, 0x3a, temp);
+      return(int)(((temp & 0xe0) >> 5) * 2);
+   }
+}
+
+void SiS_SetSISTVantiflicker(ScrnInfoPtr pScrn, int val)
+{
+   SISPtr pSiS = SISPTR(pScrn);
+#ifdef SISDUALHEAD
+   SISEntPtr pSiSEnt = pSiS->entityPrivate;
+#endif
+
+   pSiS->sistvantiflicker = val;
+#ifdef SISDUALHEAD
+   if(pSiSEnt) pSiSEnt->sistvantiflicker = val;
+#endif
+   
+   if(!(pSiS->VBFlags & CRT2_TV)) return;
+   if(!(pSiS->VBFlags & VB_SISBRIDGE)) return;
+   
+#ifdef UNLOCK_ALWAYS
+   sisSaveUnlockExtRegisterLock(pSiS, NULL, NULL);
+#endif
+
+   val /= 2;
+   if((val >= 0) && (val <= 7)) {
+      setSISIDXREG(SISPART2,0x0A,0x8F, (val << 4));
+   }
+}
+
+int SiS_GetSISTVantiflicker(ScrnInfoPtr pScrn)
+{
+   SISPtr pSiS = SISPTR(pScrn);
+#ifdef SISDUALHEAD
+   SISEntPtr pSiSEnt = pSiS->entityPrivate;
+#endif
+
+   if(!(pSiS->VBFlags & VB_SISBRIDGE && pSiS->VBFlags & CRT2_TV)) {
+#ifdef SISDUALHEAD   
+      if(pSiSEnt && pSiS->DualHeadMode) 
+           return (int)pSiSEnt->sistvantiflicker;
+      else
+#endif      
+           return (int)pSiS->sistvantiflicker;  
+   } else {
+      unsigned char temp;
+#ifdef UNLOCK_ALWAYS
+      sisSaveUnlockExtRegisterLock(pSiS, NULL, NULL);
+#endif      
+      inSISIDXREG(SISPART2, 0x0a, temp);
+      return(int)(((temp & 0x70) >> 4) * 2);
+   }
+}
+
+void SiS_SetSISTVsaturation(ScrnInfoPtr pScrn, int val)
+{
+   SISPtr pSiS = SISPTR(pScrn);
+#ifdef SISDUALHEAD
+   SISEntPtr pSiSEnt = pSiS->entityPrivate;
+#endif
+
+   pSiS->sistvsaturation = val;
+#ifdef SISDUALHEAD
+   if(pSiSEnt) pSiSEnt->sistvsaturation = val;
+#endif
+
+   if(!(pSiS->VBFlags & CRT2_TV)) return;
+   if(!(pSiS->VBFlags & VB_SISBRIDGE)) return;
+   
+#ifdef UNLOCK_ALWAYS
+   sisSaveUnlockExtRegisterLock(pSiS, NULL, NULL);
+#endif
+
+   val /= 2;
+   if((val >= 0) && (val <= 7)) {
+      setSISIDXREG(SISPART4,0x21,0xF8, val);
+   }
+}
+
+int SiS_GetSISTVsaturation(ScrnInfoPtr pScrn)
+{
+   SISPtr pSiS = SISPTR(pScrn);
+#ifdef SISDUALHEAD
+   SISEntPtr pSiSEnt = pSiS->entityPrivate;
+#endif
+   
+   if(!(pSiS->VBFlags & VB_SISBRIDGE && pSiS->VBFlags & CRT2_TV)) {
+#ifdef SISDUALHEAD   
+      if(pSiSEnt && pSiS->DualHeadMode) 
+           return (int)pSiSEnt->sistvsaturation;
+      else
+#endif      
+           return (int)pSiS->sistvsaturation;
+   } else {
+      unsigned char temp;
+#ifdef UNLOCK_ALWAYS
+      sisSaveUnlockExtRegisterLock(pSiS, NULL, NULL);
+#endif      
+      inSISIDXREG(SISPART4, 0x21, temp);
+      return(int)((temp & 0x07) * 2);
+   }
+}
+
+void SiS_SetSIS6326TVantiflicker(ScrnInfoPtr pScrn, int val)
+{
+   SISPtr pSiS = SISPTR(pScrn);
+   unsigned char tmp;
+   
+   pSiS->sis6326antiflicker = val;
+
+   if(!(pSiS->SiS6326Flags & SIS6326_TVDETECTED)) return;
+   
+#ifdef UNLOCK_ALWAYS
+   sisSaveUnlockExtRegisterLock(pSiS, NULL, NULL);
+#endif
   
-    xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
-	       "Bridge registers set to 30=0x%02x, 31=0x%02x, 33=0x%02x\n",
-	       usScratchCR30, usScratchCR31, usScratchCR33);
+   tmp = SiS6326GetTVReg(pScrn,0x00);
+   if(!(tmp & 0x04)) return;
+   
+   /* Valid values: 0=off, 1=low, 2=med, 3=high, 4=adaptive */
+   if(val >= 0 && val <= 4) {
+      tmp &= 0x1f;
+      tmp |= (val << 5);
+      SiS6326SetTVReg(pScrn,0x00,tmp);
+   }
+}
+
+int SiS_GetSIS6326TVantiflicker(ScrnInfoPtr pScrn)
+{
+   SISPtr pSiS = SISPTR(pScrn);
+   unsigned char tmp;
+   
+   if(!(pSiS->SiS6326Flags & SIS6326_TVDETECTED)) {
+      return (int)pSiS->sis6326antiflicker;
+   }
+   
+#ifdef UNLOCK_ALWAYS
+   sisSaveUnlockExtRegisterLock(pSiS, NULL, NULL);
+#endif
+   
+   tmp = SiS6326GetTVReg(pScrn,0x00);
+   if(!(tmp & 0x04)) {
+      return (int)pSiS->sis6326antiflicker;
+   } else {
+      return (int)((tmp >> 5) & 0x07);    
+   }
+}
+
+void SiS_SetSIS6326TVenableyfilter(ScrnInfoPtr pScrn, int val)
+{
+   SISPtr pSiS = SISPTR(pScrn);
+   unsigned char tmp;
+
+   if(val) val = 1;   
+   pSiS->sis6326enableyfilter = val;
+
+   if(!(pSiS->SiS6326Flags & SIS6326_TVDETECTED)) return;
+   
+#ifdef UNLOCK_ALWAYS
+   sisSaveUnlockExtRegisterLock(pSiS, NULL, NULL);
+#endif
   
-    /* Set Turbo Queue as 512K */
-    /* TW: This is done here _and_ in SiS300Init() because SiS300Init() only
-     * sets up structure but structure is not written to hardware (using
-     * SiS300Restore) on SiS630, 300, 540 (unless VESA is used).
-     */
-    if (!pSiS->NoAccel) {
-        if (pSiS->TurboQueue) {
-	    temp = (pScrn->videoRam/64) - 8;
-	    SR26 = temp & 0xFF;
-	    SR27 = ((temp >> 8) & 3) | 0xF0;
-	    sisSetReg1(SISSR, 0x26, SR26);
-	    sisSetReg1(SISSR, 0x27, SR27);
- 	}
-    }
+   tmp = SiS6326GetTVReg(pScrn,0x00);
+   if(!(tmp & 0x04)) return;
+   
+   tmp = SiS6326GetTVReg(pScrn,0x43);
+   tmp &= ~0x10;
+   tmp |= ((val & 0x01) << 4);
+   SiS6326SetTVReg(pScrn,0x43,tmp);
 }
 
-/* TW: This doesn't work yet. Switching CRT1 off this way causes a white screen on CRT2 */
-void SiSPostSetMode(ScrnInfoPtr pScrn, SISRegPtr sisReg, int LockAfterwards)
+int SiS_GetSIS6326TVenableyfilter(ScrnInfoPtr pScrn)
 {
-#if 0
-    SISPtr pSiS = SISPTR(pScrn);
-    unsigned char usScratchCR17;
-    unsigned char SR5State;
+   SISPtr pSiS = SISPTR(pScrn);
+   unsigned char tmp;
+   
+   if(!(pSiS->SiS6326Flags & SIS6326_TVDETECTED)) {
+      return (int)pSiS->sis6326enableyfilter;
+   }
+   
+#ifdef UNLOCK_ALWAYS
+   sisSaveUnlockExtRegisterLock(pSiS, NULL, NULL);
+#endif
+   
+   tmp = SiS6326GetTVReg(pScrn,0x00);
+   if(!(tmp & 0x04)) {
+      return (int)pSiS->sis6326enableyfilter;
+   } else {
+      tmp = SiS6326GetTVReg(pScrn,0x43);
+      return (int)((tmp >> 4) & 0x01);
+   }
+}
+
+void SiS_SetSIS6326TVyfilterstrong(ScrnInfoPtr pScrn, int val)
+{
+   SISPtr pSiS = SISPTR(pScrn);
+   unsigned char tmp;
+   
+   if(val) val = 1;
+   pSiS->sis6326yfilterstrong = val;
+
+   if(!(pSiS->SiS6326Flags & SIS6326_TVDETECTED)) return;
+   
+#ifdef UNLOCK_ALWAYS
+   sisSaveUnlockExtRegisterLock(pSiS, NULL, NULL);
+#endif
+  
+   tmp = SiS6326GetTVReg(pScrn,0x00);
+   if(!(tmp & 0x04)) return;
+   
+   tmp = SiS6326GetTVReg(pScrn,0x43);
+   if(tmp & 0x10) {
+      tmp &= ~0x40;
+      tmp |= ((val & 0x01) << 6);
+      SiS6326SetTVReg(pScrn,0x43,tmp);
+   }
+}
 
-    outb(VGA_SEQ_INDEX, 0x05);           /* Unlock Registers */
-    SR5State = inb(VGA_SEQ_DATA);
-    outw(VGA_SEQ_INDEX, 0x8605);
+int SiS_GetSIS6326TVyfilterstrong(ScrnInfoPtr pScrn)
+{
+   SISPtr pSiS = SISPTR(pScrn);
+   unsigned char tmp;
+   
+   if(!(pSiS->SiS6326Flags & SIS6326_TVDETECTED)) {
+      return (int)pSiS->sis6326yfilterstrong;
+   }
+   
+#ifdef UNLOCK_ALWAYS
+   sisSaveUnlockExtRegisterLock(pSiS, NULL, NULL);
+#endif
+   
+   tmp = SiS6326GetTVReg(pScrn,0x00);
+   if(!(tmp & 0x04)) {
+      return (int)pSiS->sis6326yfilterstrong;
+   } else {
+      tmp = SiS6326GetTVReg(pScrn,0x43);
+      if(!(tmp & 0x10)) {
+         return (int)pSiS->sis6326yfilterstrong;
+      } else {
+         return (int)((tmp >> 6) & 0x01);
+      }
+   }
+}
+   
+void SiS_SetTVxposoffset(ScrnInfoPtr pScrn, int val)
+{
+   SISPtr pSiS = SISPTR(pScrn);
+#ifdef SISDUALHEAD
+   SISEntPtr pSiSEnt = pSiS->entityPrivate;
+#endif
+   
+#ifdef UNLOCK_ALWAYS
+   sisSaveUnlockExtRegisterLock(pSiS, NULL, NULL);
+#endif
 
-    if ((pSiS->VBFlags & (VB_LVDS | VB_CHRONTEL)) &&
-	pScrn->bitsPerPixel == 8)
-        pSiS->CRT1off = 0;
+   pSiS->tvxpos = val;
+#ifdef SISDUALHEAD
+   if(pSiSEnt) pSiSEnt->tvxpos = val;
+#endif
 
-    xf86DrvMsg(0, X_PROBED, "CRT1off %d\n", pSiS->CRT1off);
+   if(pSiS->VGAEngine == SIS_300_VGA || pSiS->VGAEngine == SIS_315_VGA) {
+   
+      if(pSiS->VBFlags & CRT2_TV) {
+      
+         if(pSiS->VBFlags & VB_CHRONTEL) {
+	 
+	    int x = pSiS->tvx;
+#ifdef SISDUALHEAD
+	    if(pSiSEnt && pSiS->DualHeadMode) x = pSiSEnt->tvx;
+#endif
+	    switch(pSiS->ChrontelType) {
+	    case CHRONTEL_700x:
+	       if((val >= -32) && (val <= 32)) {
+		   x += val;
+		   if(x < 0) x = 0;
+		   SiS_SetCH700x(pSiS->SiS_Pr, (((x & 0xff) << 8) | 0x0a));
+		   SiS_SetCH70xxANDOR(pSiS->SiS_Pr, (((x & 0x0100) << 1) | 0x08),0xFD);
+	       }
+	       break;
+	    case CHRONTEL_701x:
+	       /* TO DO */
+	       break;
+	    }
+	    
+	 } else if(pSiS->VBFlags & VB_SISBRIDGE) {
+	 
+	    if((val >= -32) && (val <= 32)) {
+		unsigned char p2_1f,p2_2b,p2_2c,p2_2d,p2_43;
+		const unsigned char p2_left_ntsc[8][4] = {
+			{ 0x48, 0x63, 0x49, 0xf4 },
+			{ 0x45, 0x60, 0x46, 0xf1 },
+			{ 0x43, 0x6e, 0x44, 0xff },
+			{ 0x40, 0x6b, 0x41, 0xfc },
+			{ 0x3e, 0x69, 0x3f, 0xfa },
+			{ 0x3c, 0x67, 0x3d, 0xf8 },
+			{ 0x39, 0x64, 0x3a, 0xf5 },
+			{ 0x37, 0x62, 0x38, 0xf3 }
+		};
+		const unsigned char p2_right_ntsc[8][4] = {
+			{ 0x4b, 0x66, 0x4c, 0xf7 },
+			{ 0x4c, 0x67, 0x4d, 0xf8 },
+			{ 0x4e, 0x69, 0x4f, 0xfa },
+			{ 0x4f, 0x6a, 0x50, 0xfb },
+			{ 0x51, 0x6c, 0x52, 0xfd },
+			{ 0x53, 0x6e, 0x54, 0xff },
+			{ 0x55, 0x60, 0x56, 0xf1 },
+			{ 0x56, 0x61, 0x57, 0xf2 }
+		};
+		const unsigned char p2_left_pal[8][4] = {
+			{ 0x5b, 0x66, 0x5c, 0x87 },
+			{ 0x59, 0x64, 0x5a, 0x85 },
+			{ 0x56, 0x61, 0x57, 0x82 },
+			{ 0x53, 0x6e, 0x54, 0x8f },
+			{ 0x50, 0x6b, 0x51, 0x8c },
+			{ 0x4d, 0x68, 0x4e, 0x89 },
+			{ 0x4a, 0x65, 0x4b, 0x86 },
+			{ 0x49, 0x64, 0x4a, 0x85 }
+		};
+		const unsigned char p2_right_pal[8][4] = {
+			{ 0x5f, 0x6a, 0x60, 0x8b },
+			{ 0x61, 0x6c, 0x62, 0x8d },
+			{ 0x63, 0x6e, 0x64, 0x8f },
+			{ 0x65, 0x60, 0x66, 0x81 },
+			{ 0x66, 0x61, 0x67, 0x82 },
+			{ 0x68, 0x63, 0x69, 0x84 },
+			{ 0x69, 0x64, 0x6a, 0x85 },
+			{ 0x6b, 0x66, 0x6c, 0x87 }
+		};
+		val /= 4;
+		p2_2d = pSiS->p2_2d;
+#ifdef SISDUALHEAD
+	        if(pSiSEnt && pSiS->DualHeadMode) p2_2d = pSiSEnt->p2_2d;
+#endif		
+		p2_2d &= 0xf0;
+		if(val < 0) {
+		      val = -val;
+		      if(val == 8) val = 7;
+		      if(pSiS->VBFlags & TV_PAL) {
+		         p2_1f = p2_left_pal[val][0];
+		         p2_2b = p2_left_pal[val][1];
+		         p2_2c = p2_left_pal[val][2];
+		         p2_2d |= (p2_left_pal[val][3] & 0x0f);
+		      } else {
+		         p2_1f = p2_left_ntsc[val][0];
+		         p2_2b = p2_left_ntsc[val][1];
+		         p2_2c = p2_left_ntsc[val][2];
+		         p2_2d |= (p2_left_ntsc[val][3] & 0x0f);
+		      }
+		} else {
+		      if(val == 8) val = 7;
+		      if(pSiS->VBFlags & TV_PAL) {
+		         p2_1f = p2_right_pal[val][0];
+		         p2_2b = p2_right_pal[val][1];
+		         p2_2c = p2_right_pal[val][2];
+		         p2_2d |= (p2_right_pal[val][3] & 0x0f);
+		      } else {
+		         p2_1f = p2_right_ntsc[val][0];
+		         p2_2b = p2_right_ntsc[val][1];
+		         p2_2c = p2_right_ntsc[val][2];
+		         p2_2d |= (p2_right_ntsc[val][3] & 0x0f);
+		      }
+		}
+		p2_43 = p2_1f + 3;
+		SISWaitRetraceCRT2(pScrn);
+	        outSISIDXREG(SISPART2,0x1f,p2_1f);
+		outSISIDXREG(SISPART2,0x2b,p2_2b);
+		outSISIDXREG(SISPART2,0x2c,p2_2c);
+		outSISIDXREG(SISPART2,0x2d,p2_2d);
+		outSISIDXREG(SISPART2,0x43,p2_43);
+	     }
+	 }
+      }
+   
+   } else if(pSiS->Chipset == PCI_CHIP_SIS6326) {
+   
+      if(pSiS->SiS6326Flags & SIS6326_TVDETECTED) {
+      
+         unsigned char tmp;
+	 unsigned short temp1, temp2, temp3;
+	 
+         tmp = SiS6326GetTVReg(pScrn,0x00);
+         if(tmp & 0x04) {
+	    
+	    temp1 = pSiS->tvx1;
+            temp2 = pSiS->tvx2;
+            temp3 = pSiS->tvx3;
+            if((val >= -16) && (val <= 16)) {
+	       if(val > 0) {   
+	          temp1 += (val * 4);
+	          temp2 += (val * 4);
+	          while((temp1 > 0x0fff) || (temp2 > 0x0fff)) {
+	             temp1 -= 4;
+		     temp2 -= 4;
+	          }
+	       } else {
+	          val = -val;
+	          temp3 += (val * 4);
+	          while(temp3 > 0x03ff) {
+	     	     temp3 -= 4;
+	          } 
+	       }
+            }
+            SiS6326SetTVReg(pScrn,0x3a,(temp1 & 0xff));
+            tmp = SiS6326GetTVReg(pScrn,0x3c);
+            tmp &= 0xf0;
+            tmp |= ((temp1 & 0x0f00) >> 8);
+            SiS6326SetTVReg(pScrn,0x3c,tmp);
+            SiS6326SetTVReg(pScrn,0x26,(temp2 & 0xff));
+            tmp = SiS6326GetTVReg(pScrn,0x27);
+            tmp &= 0x0f;
+            tmp |= ((temp2 & 0x0f00) >> 4);
+            SiS6326SetTVReg(pScrn,0x27,tmp);
+            SiS6326SetTVReg(pScrn,0x12,(temp3 & 0xff));
+            tmp = SiS6326GetTVReg(pScrn,0x13);
+            tmp &= ~0xC0;
+            tmp |= ((temp3 & 0x0300) >> 2);
+            SiS6326SetTVReg(pScrn,0x13,tmp);
+	 }
+      }
+   }
+}
 
-    outb(SISCR, 0x17);
-    usScratchCR17 = inb(SISCR+1);
+int SiS_GetTVxposoffset(ScrnInfoPtr pScrn)
+{
+   SISPtr pSiS = SISPTR(pScrn);
+#ifdef SISDUALHEAD
+   SISEntPtr pSiSEnt = pSiS->entityPrivate;
+   
+   if(pSiSEnt && pSiS->DualHeadMode) 
+        return (int)pSiSEnt->tvxpos;
+   else
+#endif   
+        return (int)pSiS->tvxpos;
+}
 
-    xf86DrvMsg(0, X_PROBED, "CR17 was 0x%2x\n", usScratchCR17);
-    if (pSiS->CRT1off)
-	usScratchCR17 &= ~0x80;  /* sisReg->sisRegs3D4[0x17] &= ~0x80; */
-    else
-        usScratchCR17 |= 0x80;   /* sisReg->sisRegs3D4[0x17] |= 0x80; */
+void SiS_SetTVyposoffset(ScrnInfoPtr pScrn, int val)
+{
+   SISPtr pSiS = SISPTR(pScrn);
+#ifdef SISDUALHEAD
+   SISEntPtr pSiSEnt = pSiS->entityPrivate;
+#endif
+   
+#ifdef UNLOCK_ALWAYS
+   sisSaveUnlockExtRegisterLock(pSiS, NULL, NULL);
+#endif
 
-    xf86DrvMsg(0, X_PROBED, "CR17 set to 0x%2x\n", usScratchCR17);
-    /* SetReg1(SISCR, 0x17, usScratchCR17); */
+   pSiS->tvypos = val;
+#ifdef SISDUALHEAD
+   if(pSiSEnt) pSiSEnt->tvypos = val;
+#endif
 
-    if (LockAfterwards)
-        outw(VGA_SEQ_INDEX, (SR5State << 8) | 0x05); /* Relock Registers */
+   if(pSiS->VGAEngine == SIS_300_VGA || pSiS->VGAEngine == SIS_315_VGA) {
+   
+      if(pSiS->VBFlags & CRT2_TV) {
+      
+         if(pSiS->VBFlags & VB_CHRONTEL) {
+	 
+	    int y = pSiS->tvy;
+#ifdef SISDUALHEAD
+	    if(pSiSEnt && pSiS->DualHeadMode) y = pSiSEnt->tvy;
 #endif
+	    switch(pSiS->ChrontelType) {
+	    case CHRONTEL_700x:
+	       if((val >= -32) && (val <= 32)) {
+		   y -= val;
+		   if(y < 0) y = 0;
+		   SiS_SetCH700x(pSiS->SiS_Pr, (((y & 0xff) << 8) | 0x0b));
+		   SiS_SetCH70xxANDOR(pSiS->SiS_Pr, ((y & 0x0100) | 0x08),0xFE);
+	       }
+	       break;
+	    case CHRONTEL_701x:
+	       /* TO DO */
+	       break;
+	    }
+	    
+	 } else if(pSiS->VBFlags & VB_SISBRIDGE) {
+	 
+	    if((val >= -32) && (val <= 32)) {
+		char p2_01, p2_02;
+		val /= 4;
+		p2_01 = pSiS->p2_01;
+		p2_02 = pSiS->p2_02;
+#ifdef SISDUALHEAD
+	        if(pSiSEnt && pSiS->DualHeadMode) {
+		   p2_01 = pSiSEnt->p2_01;
+		   p2_02 = pSiSEnt->p2_02;
+		}
+#endif
+		p2_01 += (val * 2);
+		p2_02 += (val * 2);
+		while((p2_01 <= 0) || (p2_02 <= 0)) {
+		      p2_01 += 2;   
+		      p2_02 += 2;   
+		}
+		SISWaitRetraceCRT2(pScrn);
+		outSISIDXREG(SISPART2,0x01,p2_01);
+		outSISIDXREG(SISPART2,0x02,p2_02);
+	     }
+	 }
+	 
+      } 
+      
+   } else if(pSiS->Chipset == PCI_CHIP_SIS6326) {
+   
+      if(pSiS->SiS6326Flags & SIS6326_TVDETECTED) {
+      
+         unsigned char tmp;
+	 int temp1, limit;
+	 
+         tmp = SiS6326GetTVReg(pScrn,0x00);
+         if(tmp & 0x04) {
+	 
+	    if((val >= -16) && (val <= 16)) {
+	      temp1 = (unsigned short)pSiS->tvy1;
+	      limit = (pSiS->SiS6326Flags & SIS6326_TVPAL) ? 625 : 525;
+	      if(val > 0) {
+                temp1 += (val * 4);
+	        if(temp1 > limit) temp1 -= limit;
+	      } else {
+	        val = -val;
+	        temp1 -= (val * 2);
+	        if(temp1 <= 0) temp1 += (limit -1);
+	      }
+	      SiS6326SetTVReg(pScrn,0x11,(temp1 & 0xff));
+	      tmp = SiS6326GetTVReg(pScrn,0x13);
+	      tmp &= ~0x30;
+	      tmp |= ((temp1 & 0x300) >> 4);
+	      SiS6326SetTVReg(pScrn,0x13,tmp);
+	      if(temp1 == 1)                                 tmp = 0x10;
+	      else {
+	       if(pSiS->SiS6326Flags & SIS6326_TVPAL) {
+	         if((temp1 <= 3) || (temp1 >= (limit - 2)))  tmp = 0x08;
+	         else if(temp1 < 22)		 	     tmp = 0x02;
+	         else 					     tmp = 0x04;
+	       } else {
+	         if((temp1 <= 5) || (temp1 >= (limit - 4)))  tmp = 0x08;
+	         else if(temp1 < 19)			     tmp = 0x02;
+	         else 					     tmp = 0x04;
+	       }
+	     }
+	     SiS6326SetTVReg(pScrn,0x21,tmp);
+           }
+	 }
+      }
+   }
 }
 
+int SiS_GetTVyposoffset(ScrnInfoPtr pScrn)
+{
+   SISPtr pSiS = SISPTR(pScrn);
+#ifdef SISDUALHEAD
+   SISEntPtr pSiSEnt = pSiS->entityPrivate;
+   
+   if(pSiSEnt && pSiS->DualHeadMode) 
+        return (int)pSiSEnt->tvypos;
+   else 
+#endif   
+        return (int)pSiS->tvypos;
+}
 
-static void
-SISSaveUnlockExtRegisterLock(SISRegPtr sisReg)
+/* TW: Disable CRT1 for saving bandwidth. This doesn't work with VESA;
+ *     VESA uses the bridge in SlaveMode and switching CRT1 off while the
+ *     bridge is in SlaveMode not that clever...
+ */
+void SiSPostSetMode(ScrnInfoPtr pScrn, SISRegPtr sisReg)
 {
+    SISPtr pSiS = SISPTR(pScrn);
+#ifdef SISDUALHEAD
+    SISEntPtr pSiSEnt = pSiS->entityPrivate;
+#endif
+    unsigned char usScratchCR17;
+    Bool flag = FALSE;
+    Bool doit = TRUE;
+    int temp;
+
+#ifdef TWDEBUG
+    xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+    	"CRT1off is %d\n", pSiS->CRT1off);
+#endif
+
+#ifdef UNLOCK_ALWAYS
+    sisSaveUnlockExtRegisterLock(pSiS, NULL, NULL);
+#endif
+
+    if((!pSiS->UseVESA) && (pSiS->VBFlags & CRT2_ENABLE)) {
+
+	if(pSiS->VBFlags != pSiS->VBFlags_backup) {
+		pSiS->VBFlags = pSiS->VBFlags_backup;
+		xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+			"VBFlags restored to %0lx\n", pSiS->VBFlags);
+	}
+
+	/* TW: -) We can't switch off CRT1 if bridge is in SlaveMode.
+	 *     -) If we change to a SlaveMode-Mode (like 512x384), we
+	 *        need to adapt VBFlags for eg. Xv.
+	 */
+#ifdef SISDUALHEAD
+	if(!pSiS->DualHeadMode) {
+#endif
+	   if(SiSBridgeIsInSlaveMode(pScrn))  {
+		doit = FALSE;
+		temp = pSiS->VBFlags;
+		pSiS->VBFlags &= (~VB_DISPMODE_SINGLE);
+		pSiS->VBFlags |= (VB_DISPMODE_MIRROR | DISPTYPE_DISP1);
+                if(temp != pSiS->VBFlags) {
+		    xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+			"VBFlags changed to 0x%0lx\n", pSiS->VBFlags);
+		}
+	   }
+#ifdef SISDUALHEAD
+	}
+#endif
+	if(doit) {
+           inSISIDXREG(SISCR, 0x17, usScratchCR17);
+    	   if(pSiS->CRT1off) {
+	        if(usScratchCR17 & 0x80) flag = TRUE;
+		usScratchCR17 &= ~0x80;
+    	   } else {
+	        if(!(usScratchCR17 & 0x80)) flag = TRUE;
+        	usScratchCR17 |= 0x80;
+           }
+	   outSISIDXREG(SISCR, 0x17, usScratchCR17);
+	   /* TW: Reset only if status changed */
+	   if(flag) {
+	      outSISIDXREG(SISSR, 0x00, 0x01);    /* Synchronous Reset */
+	      usleep(10000);
+              outSISIDXREG(SISSR, 0x00, 0x03);    /* End Reset */
+	   }
+	}
+    }
+
+    /* TW: Apply TV settings given by options
+           Do this even in DualHeadMode:
+	   - if this is called by SetModeCRT1, CRT2 mode has been reset by SetModeCRT1
+	   - if this is called by SetModeCRT2, CRT2 mode has changed (duh!)
+	   -> In both cases, the settings must be re-applied.
+     */
+    if(pSiS->VBFlags & CRT2_TV) {
+       int val;
+       if(pSiS->VBFlags & VB_CHRONTEL) {
+          int mychtvlumabandwidthcvbs = pSiS->chtvlumabandwidthcvbs;
+	  int mychtvlumabandwidthsvideo = pSiS->chtvlumabandwidthsvideo;
+	  int mychtvlumaflickerfilter = pSiS->chtvlumaflickerfilter;
+	  int mychtvchromabandwidth = pSiS->chtvchromabandwidth;
+	  int mychtvchromaflickerfilter = pSiS->chtvchromaflickerfilter;
+	  int mychtvcvbscolor = pSiS->chtvcvbscolor;
+	  int mychtvtextenhance = pSiS->chtvtextenhance;
+	  int mychtvcontrast = pSiS->chtvcontrast;
+	  int mytvxpos = pSiS->tvxpos;
+	  int mytvypos = pSiS->tvypos;
+#ifdef SISDUALHEAD	  
+	  if(pSiSEnt && pSiS->DualHeadMode) {
+	     mychtvlumabandwidthcvbs = pSiSEnt->chtvlumabandwidthcvbs;
+	     mychtvlumabandwidthsvideo = pSiSEnt->chtvlumabandwidthsvideo;
+	     mychtvlumaflickerfilter = pSiSEnt->chtvlumaflickerfilter;
+	     mychtvchromabandwidth = pSiSEnt->chtvchromabandwidth;
+	     mychtvchromaflickerfilter = pSiSEnt->chtvchromaflickerfilter;
+	     mychtvcvbscolor = pSiSEnt->chtvcvbscolor;
+	     mychtvtextenhance = pSiSEnt->chtvtextenhance;
+	     mychtvcontrast = pSiSEnt->chtvcontrast;
+	     mytvxpos = pSiSEnt->tvxpos;
+	     mytvypos = pSiSEnt->tvypos;
+	  }
+#endif	  
+	  if((val = mychtvlumabandwidthcvbs) != -1) {
+	     SiS_SetCHTVlumabandwidthcvbs(pScrn, val);
+	  }
+	  if((val = mychtvlumabandwidthsvideo) != -1) {
+	     SiS_SetCHTVlumabandwidthsvideo(pScrn, val);
+	  }
+	  if((val = mychtvlumaflickerfilter) != -1) {
+	     SiS_SetCHTVlumaflickerfilter(pScrn, val);
+	  }
+	  if((val = mychtvchromabandwidth) != -1) {
+	     SiS_SetCHTVchromabandwidth(pScrn, val);      
+	  }
+	  if((val = mychtvchromaflickerfilter) != -1) {
+	     SiS_SetCHTVchromaflickerfilter(pScrn, val);
+	  }
+	  if((val = mychtvcvbscolor) != -1) {
+	     SiS_SetCHTVcvbscolor(pScrn, val);
+	  }
+	  if((val = mychtvtextenhance) != -1) {
+	     SiS_SetCHTVtextenhance(pScrn, val);
+	  }
+	  if((val = mychtvcontrast) != -1) {
+	     SiS_SetCHTVcontrast(pScrn, val);
+	  }
+	  /* Backup default TV position registers */
+	  switch(pSiS->ChrontelType) {
+	  case CHRONTEL_700x:
+	     pSiS->tvx = SiS_GetCH700x(pSiS->SiS_Pr, 0x0a);
+	     pSiS->tvx |= (((SiS_GetCH700x(pSiS->SiS_Pr, 0x08) & 0x02) >> 1) << 8);
+	     pSiS->tvy = SiS_GetCH700x(pSiS->SiS_Pr, 0x0b);
+	     pSiS->tvy |= ((SiS_GetCH700x(pSiS->SiS_Pr, 0x08) & 0x01) << 8);
+#ifdef SISDUALHEAD
+	     if(pSiSEnt && pSiS->DualHeadMode) {
+	        pSiSEnt->tvx = pSiS->tvx;
+		pSiSEnt->tvy = pSiS->tvy;
+	     }
+#endif	
+	     break;
+	  case CHRONTEL_701x:
+	     /* TO DO */
+	     break;
+	  }
+	  if((val = mytvxpos) != 0) {
+	     SiS_SetTVxposoffset(pScrn, val);
+	  }
+	  if((val = mytvypos) != 0) {
+	     SiS_SetTVyposoffset(pScrn, val);
+	  }
+       }
+       if(pSiS->VBFlags & VB_301) {
+          int mysistvedgeenhance = pSiS->sistvedgeenhance;
+#ifdef SISDUALHEAD
+          if(pSiSEnt && pSiS->DualHeadMode) {
+	     mysistvedgeenhance = pSiSEnt->sistvedgeenhance;
+	  }
+#endif	  
+          if((val = mysistvedgeenhance) != -1) {
+	     SiS_SetSISTVedgeenhance(pScrn, val);
+	  }
+       }
+       if(pSiS->VBFlags & VB_SISBRIDGE) {
+          int mysistvantiflicker = pSiS->sistvantiflicker;
+	  int mysistvsaturation = pSiS->sistvsaturation;
+	  int mytvxpos = pSiS->tvxpos;
+	  int mytvypos = pSiS->tvypos;
+#ifdef SISDUALHEAD
+          if(pSiSEnt && pSiS->DualHeadMode) {
+	     mysistvantiflicker = pSiSEnt->sistvantiflicker;
+	     mysistvsaturation = pSiSEnt->sistvsaturation;
+	     mytvxpos = pSiSEnt->tvxpos;
+	     mytvypos = pSiSEnt->tvypos;
+	  }
+#endif	  
+          /* Backup default TV position registers */
+	  inSISIDXREG(SISPART2,0x2d,pSiS->p2_2d);
+	  inSISIDXREG(SISPART2,0x01,pSiS->p2_01);
+	  inSISIDXREG(SISPART2,0x02,pSiS->p2_02);
+#ifdef SISDUALHEAD
+	  if(pSiSEnt && pSiS->DualHeadMode) {
+	        pSiSEnt->p2_2d = pSiS->p2_2d;
+		pSiSEnt->p2_01 = pSiS->p2_01;
+		pSiSEnt->p2_02 = pSiS->p2_02;
+	  }
+#endif	
+          if((val = mysistvantiflicker) != -1) {
+	     SiS_SetSISTVantiflicker(pScrn, val);
+	  }
+	  if((val = mysistvsaturation) != -1) {
+	     SiS_SetSISTVsaturation(pScrn, val);
+	  }
+	  if((val = mytvxpos) != 0) {
+	     SiS_SetTVxposoffset(pScrn, val);
+	  }
+	  if((val = mytvypos) != 0) {
+	     SiS_SetTVyposoffset(pScrn, val); 
+	 }
+       }
+    }
 
-    outb(VGA_SEQ_INDEX,0x05);
-    /* save State */
-    if (sisReg)
-	sisReg->sisRegs3C4[5] = inb (VGA_SEQ_DATA);
-    /* unlock */
-    outb(VGA_SEQ_DATA, 0x86);
 }
 
-static void
-SISRestoreExtRegisterLock(SISRegPtr sisReg)
+/* Post-set SiS6326 TV registers */
+void SiS6326PostSetMode(ScrnInfoPtr pScrn, SISRegPtr sisReg)
 {
-    /* restore lock */
-    outw(VGA_SEQ_DATA,sisReg->sisRegs3C4[5] << 8 |  0x05);
+    SISPtr pSiS = SISPTR(pScrn);
+    unsigned char tmp;
+    int val;
+
+    if(!(pSiS->SiS6326Flags & SIS6326_TVDETECTED)) return;
+    
+#ifdef UNLOCK_ALWAYS
+    sisSaveUnlockExtRegisterLock(pSiS, NULL, NULL);
+#endif
+
+    /* Backup default TV position registers */
+    pSiS->tvx1 = SiS6326GetTVReg(pScrn,0x3a);
+    pSiS->tvx1 |= ((SiS6326GetTVReg(pScrn,0x3c) & 0x0f) << 8);
+    pSiS->tvx2 = SiS6326GetTVReg(pScrn,0x26);
+    pSiS->tvx2 |= ((SiS6326GetTVReg(pScrn,0x27) & 0xf0) << 4);
+    pSiS->tvx3 = SiS6326GetTVReg(pScrn,0x12);
+    pSiS->tvx3 |= ((SiS6326GetTVReg(pScrn,0x13) & 0xC0) << 2);
+    pSiS->tvy1 = SiS6326GetTVReg(pScrn,0x11);
+    pSiS->tvy1 |= ((SiS6326GetTVReg(pScrn,0x13) & 0x30) << 4);
+    
+    /* TW: Handle TVPosOffset options (BEFORE switching on TV) */
+    if((val = pSiS->tvxpos) != 0) {
+       SiS_SetTVxposoffset(pScrn, val);
+    }
+    if((val = pSiS->tvypos) != 0) {
+       SiS_SetTVyposoffset(pScrn, val);
+    }
+
+    /* TW: Switch on TV output. This is rather complicated, but
+     *     if we don't do it, TV output will flicker terribly.
+     */
+    if(pSiS->SiS6326Flags & SIS6326_TVON) {
+       orSISIDXREG(SISSR, 0x01, 0x20);
+       tmp = SiS6326GetTVReg(pScrn,0x00);
+       tmp &= ~0x04;
+       while(!(inSISREG(SISINPSTAT) & 0x08));    /* Wait while NOT vb */
+       SiS6326SetTVReg(pScrn,0x00,tmp);
+       for(val=0; val < 2; val++) {
+         while(!(inSISREG(SISINPSTAT) & 0x08));  /* Wait while NOT vb */
+         while(inSISREG(SISINPSTAT) & 0x08);     /* wait while vb     */
+       }
+       SiS6326SetTVReg(pScrn, 0x00, sisReg->sis6326tv[0]);
+       tmp = inSISREG(SISINPSTAT);
+       outSISREG(SISAR, 0x20);
+       tmp = inSISREG(SISINPSTAT);
+       while(inSISREG(SISINPSTAT) & 0x01);
+       while(!(inSISREG(SISINPSTAT) & 0x01));
+       andSISIDXREG(SISSR, 0x01, ~0x20);
+       for(val=0; val < 10; val++) {
+         while(!(inSISREG(SISINPSTAT) & 0x08));  /* Wait while NOT vb */
+         while(inSISREG(SISINPSTAT) & 0x08);     /* wait while vb     */
+       }
+       andSISIDXREG(SISSR, 0x01, ~0x20);
+    }
+
+    tmp = SiS6326GetTVReg(pScrn,0x00);
+    if(!(tmp & 0x04)) return;
+
+    /* TW: Apply TV settings given by options */
+    if((val = pSiS->sis6326antiflicker) != -1) {
+       SiS_SetSIS6326TVantiflicker(pScrn, val);
+    }
+    if((val = pSiS->sis6326enableyfilter) != -1) {
+       SiS_SetSIS6326TVenableyfilter(pScrn, val);
+    }
+    if((val = pSiS->sis6326yfilterstrong) != -1) {
+       SiS_SetSIS6326TVyfilterstrong(pScrn, val);
+    }
+
 }
 
+/* Check if video bridge is in slave mode */
+BOOLEAN
+SiSBridgeIsInSlaveMode(ScrnInfoPtr pScrn)
+{
+    SISPtr pSiS = SISPTR(pScrn);
+    unsigned char usScratchP1_00;
+
+    if(!(pSiS->VBFlags & VB_VIDEOBRIDGE)) return FALSE;
+
+    inSISIDXREG(SISPART1,0x00,usScratchP1_00);
+    if( ((pSiS->VGAEngine == SIS_300_VGA) && (usScratchP1_00 & 0xa0) == 0x20) ||
+        ((pSiS->VGAEngine == SIS_315_VGA) && (usScratchP1_00 & 0x50) == 0x10) ) {
+	   return TRUE;
+    } else {
+           return FALSE;
+    }
+}
+
+/* TW: Build a list of the VESA modes the BIOS reports as valid */
 static void
-SiSBuildVesaModeList(int scrnIndex, vbeInfoPtr pVbe, VbeInfoBlock *vbe)
+SiSBuildVesaModeList(ScrnInfoPtr pScrn, vbeInfoPtr pVbe, VbeInfoBlock *vbe)
 {
-    ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
     SISPtr pSiS = SISPTR(pScrn);
     int i = 0;
-    while (vbe->VideoModePtr[i] != 0xffff) {
+
+    while(vbe->VideoModePtr[i] != 0xffff) {
 	sisModeInfoPtr m;
 	VbeModeInfoBlock *mode;
 	int id = vbe->VideoModePtr[i++];
@@ -2368,39 +7312,38 @@ SiSBuildVesaModeList(int scrnIndex, vbeInfoPtr pVbe, VbeInfoBlock *vbe)
 	if ((mode = VBEGetModeInfo(pVbe, id)) == NULL)
 	    continue;
 
- 	bpp = mode->BitsPerPixel;
- 	/* TW: Doesn't work on SiS630 VBE 3.0: */
- 	/* mode->GreenMaskSize + mode->BlueMaskSize
- 	   + mode->RedMaskSize;  */
+	bpp = mode->BitsPerPixel;
 
 	m = xnfcalloc(sizeof(sisModeInfoRec),1);
 	m->width = mode->XResolution;
 	m->height = mode->YResolution;
 	m->bpp = bpp;
 	m->n = id;
-	m->next = pSiS->VesaModeList;
+	m->next = pSiS->SISVESAModeList;
 
-	xf86DrvMsgVerb(scrnIndex, X_PROBED, 3,
-		       "BIOS reported VESA mode 0x%x: x:%i y:%i bpp:%i\n",
-		       m->n, m->width, m->height, m->bpp);
+	xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+	      "BIOS reported VESA mode 0x%x: x:%i y:%i bpp:%i\n",
+	       m->n, m->width, m->height, m->bpp);
 
-	pSiS->VesaModeList = m;
+	pSiS->SISVESAModeList = m;
 
 	VBEFreeModeInfo(mode);
     }
 }
 
-static UShort CalcVESAModeIndex(ScrnInfoPtr pScrn, DisplayModePtr mode)
+/* TW: Calc VESA mode from given resolution/depth */
+static UShort
+SiSCalcVESAModeIndex(ScrnInfoPtr pScrn, DisplayModePtr mode)
 {
     SISPtr pSiS = SISPTR(pScrn);
-    sisModeInfoPtr m = pSiS->VesaModeList;
+    sisModeInfoPtr m = pSiS->SISVESAModeList;
     UShort i = (pScrn->bitsPerPixel+7)/8 - 1;
     UShort ModeIndex = 0;
     
-    while (m) {
-	if (pScrn->bitsPerPixel == m->bpp 
-	    && mode->HDisplay == m->width 
-	    && mode->VDisplay == m->height)
+    while(m) {
+	if(pScrn->bitsPerPixel == m->bpp &&
+	   mode->HDisplay == m->width &&
+	   mode->VDisplay == m->height)
 	    return m->n;
 	m = m->next;
     }
@@ -2410,97 +7353,296 @@ static UShort CalcVESAModeIndex(ScrnInfoPtr pScrn, DisplayModePtr mode)
              mode->HDisplay, mode->VDisplay, pScrn->bitsPerPixel);
 
     switch(mode->HDisplay) {
-	case 640:
-	    ModeIndex = VESAModeIndex_640x480[i];
-	    break;
-	case 720:
-	    if(mode->VDisplay == 480)
-		ModeIndex = VESAModeIndex_720x480[i];
-	    else
-		ModeIndex = VESAModeIndex_720x576[i];
-	    break;
-	case 800:
-	    ModeIndex = VESAModeIndex_800x600[i];
-	    break;
-	case 1024:
-	    ModeIndex = VESAModeIndex_1024x768[i];
-	    break;
-	case 1280:
-	    ModeIndex = VESAModeIndex_1280x1024[i];
-	    break;
-	case 1600:
-	    ModeIndex = VESAModeIndex_1600x1200[i];
-	    break;
-	case 1920:
-	    ModeIndex = VESAModeIndex_1920x1440[i];
-	    break;
-    }
-    
-    if (!ModeIndex) xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
-			       "No valid mode found for %dx%dx%d in built-in table either.",
-			       mode->HDisplay, mode->VDisplay, pScrn->bitsPerPixel);
-    
-    return(ModeIndex);
+      case 512:
+          if(mode->VDisplay == 384)
+             ModeIndex = VESAModeIndex_512x384[i];
+          break;
+      case 640:
+          if(mode->VDisplay == 480)
+             ModeIndex = VESAModeIndex_640x480[i];
+          break;
+      case 800:
+          if(mode->VDisplay == 600)
+             ModeIndex = VESAModeIndex_800x600[i];
+          break;
+      case 1024:
+          if(mode->VDisplay == 768)
+             ModeIndex = VESAModeIndex_1024x768[i];
+          break;
+      case 1280:
+          if(mode->VDisplay == 1024)
+             ModeIndex = VESAModeIndex_1280x1024[i];
+          break;
+      case 1600:
+          if(mode->VDisplay == 1200)
+             ModeIndex = VESAModeIndex_1600x1200[i];
+          break;
+      case 1920:
+          if(mode->VDisplay == 1440)
+             ModeIndex = VESAModeIndex_1920x1440[i];
+          break;
+   }
+
+   if(!ModeIndex) xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+        "No valid mode found for %dx%dx%d in built-in table either.\n",
+	mode->HDisplay, mode->VDisplay, pScrn->bitsPerPixel);
+
+   return(ModeIndex);
 }
 
-/* TW: Calculate CR33 (rate index) for CRT1 if CRT2 is disabled.
-       Calculation is done using currentmode structure, therefore
-       it is recommended to set VertRefresh and HorizSync to correct
-       values in Config file.
- */
-unsigned char SISSearchCRT1Rate(DisplayModePtr mode)
+/* TW: Calculate the vertical refresh rate from a mode */
+int
+SiSCalcVRate(DisplayModePtr mode)
 {
    float hsync, refresh = 0;
-   int i = 0;
-   unsigned short xres=mode->HDisplay;
-   unsigned short yres=mode->VDisplay;
-   unsigned char index;
 
-   if (mode->HSync > 0.0)
+   if(mode->HSync > 0.0)
        	hsync = mode->HSync;
-   else if (mode->HTotal > 0)
+   else if(mode->HTotal > 0)
        	hsync = (float)mode->Clock / (float)mode->HTotal;
    else
        	hsync = 0.0;
-   if (mode->VTotal > 0)
+
+   if(mode->VTotal > 0)
        	refresh = hsync * 1000.0 / mode->VTotal;
-   if (mode->Flags & V_INTERLACE) {
+
+   if(mode->Flags & V_INTERLACE)
        	refresh *= 2.0;
-   }
-   if (mode->Flags & V_DBLSCAN) {
+
+   if(mode->Flags & V_DBLSCAN)
        	refresh /= 2.0;
-   }
-   if (mode->VScan > 1) {
+
+   if(mode->VScan > 1)
         refresh /= mode->VScan;
-   }
-   if (mode->VRefresh > 0.0)
+
+   if(mode->VRefresh > 0.0)
     	refresh = mode->VRefresh;
-   if (hsync == 0 || refresh == 0)
-        return 0x02;  /* TW: Default mode index */
-   else {
-     index = 0;
-     while ((sisx_vrate[i].idx != 0) && (sisx_vrate[i].xres <= xres)) {
-	if ((sisx_vrate[i].xres == xres)
-		    && (sisx_vrate[i].yres == yres)) {
-	    if (sisx_vrate[i].refresh == refresh) {
-		index = sisx_vrate[i].idx;
-		break;
-	    } else if (sisx_vrate[i].refresh > refresh) {
-		if ((sisx_vrate[i].refresh - refresh) <= 2) {
-		    index = sisx_vrate[i].idx;
-		} else if (((refresh - sisx_vrate[i - 1].refresh) <=  2)
-				    	&& (sisx_vrate[i].idx != 1)) {
-			index = sisx_vrate[i - 1].idx;
-		}
-		break;
+
+   if(hsync == 0 || refresh == 0) return(0);
+
+   return((int)(refresh));
+}
+
+/* TW: Calculate CR33 (rate index) for CRT1.
+ *     Calculation is done using currentmode, therefore it is
+ *     recommended to set VertRefresh and HorizSync to correct
+ *     values in config file.
+ */
+unsigned char
+SISSearchCRT1Rate(ScrnInfoPtr pScrn, DisplayModePtr mode)
+{
+   SISPtr         pSiS = SISPTR(pScrn);
+   int            i = 0;
+   int            irefresh;
+   unsigned short xres = mode->HDisplay;
+   unsigned short yres = mode->VDisplay;
+   unsigned char  index;
+   BOOLEAN	  checksis730 = FALSE;
+
+   irefresh = SiSCalcVRate(mode);
+   if(!irefresh) {
+        if(xres == 800 || xres == 1024 || xres == 1280) return 0x02;
+   	else return 0x01;
+   }
+   
+   /* SiS730 has troubles on CRT2 if CRT1 is at 32bpp */
+   if( (pSiS->sishw_ext.jChipType == SIS_730) && 
+       (pSiS->VBFlags & VB_VIDEOBRIDGE) &&
+       (pSiS->CurrentLayout.bitsPerPixel == 32) ) {
+#ifdef SISDUALHEAD   
+      if(pSiS->DualHeadMode) {
+         if(pSiS->SecondHead) {
+	    checksis730 = TRUE;
+	 }
+      } else
+#endif      
+      if((!pSiS->UseVESA) && (pSiS->VBFlags & CRT2_ENABLE) && (!pSiS->CRT1off)) {
+         checksis730 = TRUE;
+      }
+   }   
+   
+#ifdef TWDEBUG
+   xf86DrvMsg(0, X_INFO, "Debug: CalcVRate returned %d\n", irefresh);   
+#endif   
+
+   /* We need the REAL refresh rate here */
+   if(mode->Flags & V_INTERLACE)
+       	irefresh /= 2;
+
+   /* Do not multiply by 2 when DBLSCAN! */
+   
+#ifdef TWDEBUG
+   xf86DrvMsg(0, X_INFO, "Debug: Rate after correction = %d\n", irefresh);   
+#endif
+
+   index = 0;
+   while((sisx_vrate[i].idx != 0) && (sisx_vrate[i].xres <= xres)) {
+	if((sisx_vrate[i].xres == xres) && (sisx_vrate[i].yres == yres)) {
+	    if((checksis730 == FALSE) || (sisx_vrate[i].SiS730valid32bpp == TRUE)) {
+	       if(sisx_vrate[i].refresh == irefresh) {
+		   index = sisx_vrate[i].idx;
+		   break;
+	       } else if(sisx_vrate[i].refresh > irefresh) {
+		   if((sisx_vrate[i].refresh - irefresh) <= 3) {
+		      index = sisx_vrate[i].idx;
+		   } else if( ((checksis730 == FALSE) || (sisx_vrate[i - 1].SiS730valid32bpp == TRUE)) && 
+		              ((irefresh - sisx_vrate[i - 1].refresh) <=  2) &&
+			      (sisx_vrate[i].idx != 1) ) {
+		      index = sisx_vrate[i - 1].idx;
+		   }
+		   break;
+	       }
 	    }
 	}
 	i++;
-     }
-     if (index > 0)
+   }
+   if(index > 0)
 	return index;
-     else
-	return 0x02; /* TW: Default Rate index */
+   else {
+        /* TW: Default Rate index */
+        if(xres == 800 || xres == 1024 || xres == 1280) return 0x02; 
+   	else return 0x01;
    }
 }
 
+void
+SISWaitRetraceCRT1(ScrnInfoPtr pScrn)
+{
+   SISPtr        pSiS = SISPTR(pScrn);
+   int           watchdog;
+   unsigned char temp;
+
+   inSISIDXREG(SISCR,0x17,temp);
+   if(!(temp & 0x80)) return;
+
+   watchdog = 65536;
+   while((!(inSISREG(SISINPSTAT) & 0x08)) && --watchdog);
+   watchdog = 65536;
+   while((inSISREG(SISINPSTAT) & 0x08) && --watchdog);
+}
+
+void
+SISWaitRetraceCRT2(ScrnInfoPtr pScrn)
+{
+   SISPtr        pSiS = SISPTR(pScrn);
+   int           watchdog;
+   unsigned char temp, reg;
+
+   switch(pSiS->VGAEngine) {
+   case SIS_300_VGA:
+   	reg = 0x28;
+	break;
+   case SIS_315_VGA:
+   	reg = 0x33;
+	break;
+   default:
+        return;
+   }
+
+   watchdog = 65536;
+   do {
+   	inSISIDXREG(SISPART1, reg, temp);
+	if(temp & 0x80) break;
+   } while(--watchdog);
+   watchdog = 65536;
+   do {
+   	inSISIDXREG(SISPART1, reg, temp);
+	if(!(temp & 0x80)) break;
+   } while(--watchdog);
+}
+
+static void
+SISWaitVBRetrace(ScrnInfoPtr pScrn)
+{
+   SISPtr  pSiS = SISPTR(pScrn);
+
+#ifdef SISDUALHEAD
+   if(pSiS->DualHeadMode) {
+   	if(pSiS->SecondHead)
+		SISWaitRetraceCRT1(pScrn);
+        else
+		SISWaitRetraceCRT2(pScrn);
+   } else {
+#endif
+	if(pSiS->VBFlags & DISPTYPE_DISP1) {
+		SISWaitRetraceCRT1(pScrn);
+	}
+	if(pSiS->VBFlags & DISPTYPE_DISP2) {
+		if(!(SiSBridgeIsInSlaveMode(pScrn))) {
+		  	SISWaitRetraceCRT2(pScrn);
+		}
+	}
+#ifdef SISDUALHEAD
+   }
+#endif
+}
+
+void
+sisSaveUnlockExtRegisterLock(SISPtr pSiS, unsigned char *reg1, unsigned char *reg2)
+{
+    register unsigned char val;
+    unsigned long mylockcalls;
+
+    pSiS->lockcalls++;
+    mylockcalls = pSiS->lockcalls;
+
+    /* check if already unlocked */
+    inSISIDXREG(SISSR, 0x05, val);
+    if(val != 0xa1) {
+       /* save State */
+       if(reg1) *reg1 = val;
+       /* unlock */
+       outSISIDXREG(SISSR, 0x05, 0x86);
+       inSISIDXREG(SISSR, 0x05, val);
+       if(val != 0xA1) {
+#ifdef TWDEBUG
+	  unsigned char val1, val2;
+	  int i;
+#endif
+          xf86DrvMsg(pSiS->pScrn->scrnIndex, X_ERROR,
+               "Failed to unlock sr registers (%p, %x, 0x%02x; %d)\n",
+	       pSiS, pSiS->RelIO, val, mylockcalls);
+#ifdef TWDEBUG
+          for(i = 0; i <= 0x3f; i++) {
+	  	inSISIDXREG(SISSR, i, val1);
+		inSISIDXREG(0x3c4, i, val2);
+		xf86DrvMsg(pSiS->pScrn->scrnIndex, X_INFO,
+			"SR%02d: RelIO=0x%02x 0x3c4=0x%02x (%d)\n", i, val1, val2, mylockcalls);
+	  }
+#endif
+          if((pSiS->VGAEngine == SIS_OLD_VGA) || (pSiS->VGAEngine == SIS_530_VGA)) {
+	     /* Emergency measure: unlock at 0x3c4, and try to enable Relocated IO ports */
+	     outSISIDXREG(0x3c4,0x05,0x86);
+	     andSISIDXREG(0x3c4,0x33,~0x20);
+	     outSISIDXREG(SISSR, 0x05, 0x86);
+          }
+       }
+    }
+    if((pSiS->VGAEngine == SIS_OLD_VGA) || (pSiS->VGAEngine == SIS_530_VGA)) {
+       inSISIDXREG(SISCR, 0x80, val);
+       if(val != 0xa1) {
+          /* save State */
+          if(reg2) *reg2 = val;
+          outSISIDXREG(SISCR, 0x80, 0x86);
+	  inSISIDXREG(SISCR, 0x80, val);
+	  if(val != 0xA1) {
+	     xf86DrvMsg(pSiS->pScrn->scrnIndex, X_ERROR,
+	        "Failed to unlock cr registers (%p, %x, 0x%02x)\n",
+	       pSiS, pSiS->RelIO, val);
+	  }
+       }
+    }
+}
+
+void
+sisRestoreExtRegisterLock(SISPtr pSiS, unsigned char reg1, unsigned char reg2)
+{
+    /* restore lock */
+#ifndef UNLOCK_ALWAYS
+    outSISIDXREG(SISSR, 0x05, reg1 == 0xA1 ? 0x86 : 0x00);
+    if((pSiS->VGAEngine == SIS_OLD_VGA) || (pSiS->VGAEngine == SIS_530_VGA)) {
+       outSISIDXREG(SISCR, 0x80, reg2 == 0xA1 ? 0x86 : 0x00);
+    }
+#endif
+}
+
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_opt.c b/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_opt.c
index 42448f83d..bd8be8604 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_opt.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_opt.c
@@ -1,55 +1,147 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/sis_opt.c,v 1.11 2002/04/04 14:05:48 eich Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/sis_opt.c,v 1.15 2003/02/04 02:44:29 dawes Exp $ */
+/*
+ *
+ * SiS driver option evaluation
+ *
+ * Parts Copyright 2001, 2002 by Thomas Winischhofer, Vienna, Austria
+ *
+ * Permission to use, copy, modify, distribute, and sell this software and its
+ * documentation for any purpose is hereby granted without fee, provided that
+ * the above copyright notice appear in all copies and that both that
+ * copyright notice and this permission notice appear in supporting
+ * documentation, and that the name of the supplier not be used in
+ * advertising or publicity pertaining to distribution of the software without
+ * specific, written prior permission.  The supplier makes no representations
+ * about the suitability of this software for any purpose.  It is provided
+ * "as is" without express or implied warranty.
+ *
+ * THE SUPPLIER DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+ * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+ * EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+ * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
+ * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ *
+ * Authors:  	?
+ *		Thomas Winischhofer <thomas@winischhofer.net>
+ */
 
 #include "xf86.h"
 #include "xf86PciInfo.h"
+#include "xf86str.h"
+#include "xf86Cursor.h"
 
 #include "sis.h"
 
 typedef enum {
     OPTION_SW_CURSOR,
     OPTION_HW_CURSOR,
-    OPTION_PCI_RETRY,
-    OPTION_RGB_BITS,
+/*  OPTION_PCI_RETRY,  */
     OPTION_NOACCEL,
     OPTION_TURBOQUEUE,
     OPTION_FAST_VRAM,
-    OPTION_SET_MEMCLOCK,
+    OPTION_NOHOSTBUS,
+/*  OPTION_SET_MEMCLOCK,   */
     OPTION_FORCE_CRT2TYPE,
-	OPTION_SHADOW_FB,
+    OPTION_SHADOW_FB,
     OPTION_ROTATE,
-	OPTION_NOXVIDEO,
+    OPTION_NOXVIDEO,
     OPTION_VESA,
-    OPTION_MAXXFBMEM
+    OPTION_MAXXFBMEM,
+    OPTION_FORCECRT1,
+    OPTION_DSTN,
+    OPTION_XVONCRT2,
+    OPTION_PDC,
+    OPTION_TVSTANDARD,
+    OPTION_USEROMDATA,
+    OPTION_NOINTERNALMODES,
+    OPTION_USEOEM,
+    OPTION_SBIOSN,
+    OPTION_NOYV12,
+    OPTION_CHTVOVERSCAN,
+    OPTION_CHTVSOVERSCAN,
+    OPTION_CHTVLUMABANDWIDTHCVBS,
+    OPTION_CHTVLUMABANDWIDTHSVIDEO,
+    OPTION_CHTVLUMAFLICKERFILTER,
+    OPTION_CHTVCHROMABANDWIDTH,
+    OPTION_CHTVCHROMAFLICKERFILTER,
+    OPTION_CHTVCVBSCOLOR,
+    OPTION_CHTVTEXTENHANCE,
+    OPTION_CHTVCONTRAST,
+    OPTION_SISTVEDGEENHANCE,
+    OPTION_SISTVANTIFLICKER,
+    OPTION_SISTVSATURATION,
+    OPTION_TVXPOSOFFSET,
+    OPTION_TVYPOSOFFSET,
+    OPTION_SIS6326ANTIFLICKER,
+    OPTION_SIS6326ENABLEYFILTER,
+    OPTION_SIS6326YFILTERSTRONG,
+    OPTION_CHTVTYPE,
+    OPTION_USERGBCURSOR,
+    OPTION_USERGBCURSORBLEND,
+    OPTION_USERGBCURSORBLENDTH,
+    OPTION_RESTOREBYSET
 } SISOpts;
 
 static const OptionInfoRec SISOptions[] = {
-    { OPTION_SW_CURSOR,         "SWcursor",     OPTV_BOOLEAN,   {0}, FALSE },
-    { OPTION_HW_CURSOR,         "HWcursor",     OPTV_BOOLEAN,   {0}, FALSE },
-    { OPTION_PCI_RETRY,         "PciRetry",     OPTV_BOOLEAN,   {0}, FALSE },
-    { OPTION_RGB_BITS,          "rgbbits",      OPTV_INTEGER,   {0}, -1    },
-    { OPTION_NOACCEL,           "NoAccel",      OPTV_BOOLEAN,   {0}, FALSE },
-    { OPTION_TURBOQUEUE,        "TurboQueue",   OPTV_BOOLEAN,   {0}, FALSE },
-    { OPTION_SET_MEMCLOCK,      "SetMClk",      OPTV_FREQ,      {0}, -1    },
-    { OPTION_FAST_VRAM,         "FastVram",     OPTV_BOOLEAN,   {0}, FALSE },
-    { OPTION_FORCE_CRT2TYPE,    "ForceCRT2Type",OPTV_ANYSTR,    {0}, FALSE },
-    { OPTION_SHADOW_FB,         "ShadowFB",     OPTV_BOOLEAN,   {0}, FALSE },
-    { OPTION_ROTATE,            "Rotate",       OPTV_ANYSTR,    {0}, FALSE },
-    { OPTION_NOXVIDEO,          "NoXvideo",     OPTV_BOOLEAN,   {0}, FALSE },
-    { OPTION_VESA,		"Vesa",		OPTV_BOOLEAN,   {0}, FALSE },
-    { OPTION_MAXXFBMEM,         "MaxXFBMem",    OPTV_INTEGER,   {0}, -1 },
-    { -1,                       NULL,           OPTV_NONE,      {0}, FALSE }
+    { OPTION_SW_CURSOR,         "SWcursor",               OPTV_BOOLEAN,   {0}, FALSE },
+    { OPTION_HW_CURSOR,         "HWcursor",               OPTV_BOOLEAN,   {0}, FALSE },
+/*  { OPTION_PCI_RETRY,         "PciRetry",               OPTV_BOOLEAN,   {0}, FALSE },  */
+    { OPTION_NOACCEL,           "NoAccel",                OPTV_BOOLEAN,   {0}, FALSE },
+    { OPTION_TURBOQUEUE,        "TurboQueue",             OPTV_BOOLEAN,   {0}, FALSE },
+/*  { OPTION_SET_MEMCLOCK,      "SetMClk",                OPTV_FREQ,      {0}, -1    },  */
+    { OPTION_FAST_VRAM,         "FastVram",               OPTV_BOOLEAN,   {0}, FALSE },
+    { OPTION_NOHOSTBUS,         "NoHostBus",              OPTV_BOOLEAN,   {0}, FALSE },
+    { OPTION_FORCE_CRT2TYPE,    "ForceCRT2Type",          OPTV_ANYSTR,    {0}, FALSE },
+    { OPTION_SHADOW_FB,         "ShadowFB",               OPTV_BOOLEAN,   {0}, FALSE },
+    { OPTION_ROTATE,            "Rotate",                 OPTV_ANYSTR,    {0}, FALSE },
+    { OPTION_NOXVIDEO,          "NoXvideo",               OPTV_BOOLEAN,   {0}, FALSE },
+    { OPTION_VESA,		"Vesa",		          OPTV_BOOLEAN,   {0}, FALSE },
+    { OPTION_MAXXFBMEM,         "MaxXFBMem",              OPTV_INTEGER,   {0}, -1    },
+    { OPTION_FORCECRT1,         "ForceCRT1",              OPTV_BOOLEAN,   {0}, FALSE },
+    { OPTION_DSTN,              "DSTN",                   OPTV_BOOLEAN,   {0}, FALSE },
+    { OPTION_XVONCRT2,          "XvOnCRT2",               OPTV_BOOLEAN,   {0}, FALSE },
+    { OPTION_PDC,               "PanelDelayCompensation", OPTV_INTEGER,   {0}, -1    },
+    { OPTION_TVSTANDARD,        "TVStandard",             OPTV_STRING,    {0}, -1    },
+    { OPTION_USEROMDATA,	"UseROMData",	          OPTV_BOOLEAN,   {0}, -1    },
+    { OPTION_NOINTERNALMODES,   "NoInternalModes",        OPTV_BOOLEAN,   {0}, FALSE },
+    { OPTION_USEOEM, 		"UseOEMData",		  OPTV_BOOLEAN,   {0}, -1    },
+    { OPTION_SBIOSN,            "BIOSFile",               OPTV_STRING,    {0}, FALSE },
+    { OPTION_NOYV12, 		"NoYV12",		  OPTV_BOOLEAN,   {0}, -1    },
+    { OPTION_CHTVTYPE,		"CHTVType",	          OPTV_BOOLEAN,   {0}, -1    },
+    { OPTION_CHTVOVERSCAN,	"CHTVOverscan",	          OPTV_BOOLEAN,   {0}, -1    },
+    { OPTION_CHTVSOVERSCAN,	"CHTVSuperOverscan",      OPTV_BOOLEAN,   {0}, -1    },
+    { OPTION_CHTVLUMABANDWIDTHCVBS,	"CHTVLumaBandwidthCVBS",  OPTV_INTEGER,   {0}, -1    },
+    { OPTION_CHTVLUMABANDWIDTHSVIDEO,	"CHTVLumaBandwidthSVIDEO",OPTV_INTEGER,   {0}, -1    },
+    { OPTION_CHTVLUMAFLICKERFILTER,	"CHTVLumaFlickerFilter",  OPTV_INTEGER,   {0}, -1    },
+    { OPTION_CHTVCHROMABANDWIDTH,	"CHTVChromaBandwidth",    OPTV_INTEGER,   {0}, -1    },
+    { OPTION_CHTVCHROMAFLICKERFILTER,	"CHTVChromaFlickerFilter",OPTV_INTEGER,   {0}, -1    },
+    { OPTION_CHTVCVBSCOLOR,	"CHTVCVBSColor",          OPTV_BOOLEAN,   {0}, -1    },
+    { OPTION_CHTVTEXTENHANCE,	"CHTVTextEnhance",	  OPTV_INTEGER,   {0}, -1    },
+    { OPTION_CHTVCONTRAST,	"CHTVContrast",		  OPTV_INTEGER,   {0}, -1    },
+    { OPTION_SISTVEDGEENHANCE,	"SISTVEdgeEnhance",	  OPTV_INTEGER,   {0}, -1    },
+    { OPTION_SISTVANTIFLICKER,	"SISTVAntiFlicker",	  OPTV_INTEGER,   {0}, -1    },
+    { OPTION_SISTVSATURATION,	"SISTVSaturation",	  OPTV_INTEGER,   {0}, -1    },
+    { OPTION_TVXPOSOFFSET,	"TVXPosOffset", 	  OPTV_INTEGER,   {0}, -1    },
+    { OPTION_TVYPOSOFFSET,	"TVYPosOffset", 	  OPTV_INTEGER,   {0}, -1    },
+    { OPTION_SIS6326ANTIFLICKER,	"SIS6326TVAntiFlicker",   OPTV_STRING,    {0}, FALSE  },
+    { OPTION_SIS6326ENABLEYFILTER,	"SIS6326TVEnableYFilter", OPTV_BOOLEAN,   {0}, -1    },
+    { OPTION_SIS6326YFILTERSTRONG,	"SIS6326TVYFilterStrong", OPTV_BOOLEAN,   {0}, -1    },
+    { OPTION_USERGBCURSOR, 	"UseColorHWCursor",	  OPTV_BOOLEAN,   {0}, -1    },
+    { OPTION_USERGBCURSORBLEND,	"ColorHWCursorBlending",  OPTV_BOOLEAN,   {0}, -1    },
+    { OPTION_USERGBCURSORBLENDTH,	"ColorHWCursorBlendThreshold", 	  OPTV_INTEGER,   {0}, -1    },
+    { OPTION_RESTOREBYSET,	"RestoreBySetMode", 	  OPTV_BOOLEAN,   {0}, -1    },
+    { -1,                       NULL,                     OPTV_NONE,      {0}, FALSE }
 };
 
-void SiSOptions(ScrnInfoPtr pScrn);
-const OptionInfoRec * SISAvailableOptions(int chipid, int busid);
-
 void
 SiSOptions(ScrnInfoPtr pScrn)
 {
-    SISPtr  pSiS = SISPTR(pScrn);
-    MessageType     from;
-    double          temp;
-    char *strptr;
+    SISPtr      pSiS = SISPTR(pScrn);
+    MessageType from;
+/*  double      temp;  */
+    char        *strptr;
 
     /* Collect all of the relevant option flags (fill in pScrn->options) */
     xf86CollectOptions(pScrn, NULL);
@@ -57,12 +149,15 @@ SiSOptions(ScrnInfoPtr pScrn)
     /* Process the options */
     if (!(pSiS->Options = xalloc(sizeof(SISOptions))))
 	return;
+
     memcpy(pSiS->Options, SISOptions, sizeof(SISOptions));
+
     xf86ProcessOptions(pScrn->scrnIndex, pScrn->options, pSiS->Options);
 
     /* initalize some defaults */
-    pSiS->FastVram = TRUE;
-    pSiS->UsePCIRetry = TRUE;
+    pSiS->newFastVram = -1;	/* TW: Default: write only; if set, read + write */
+    pSiS->NoHostBus = FALSE;
+/*  pSiS->UsePCIRetry = TRUE; */
     pSiS->TurboQueue = TRUE;
     pSiS->HWCursor = TRUE;
     pSiS->Rotate = FALSE;
@@ -70,173 +165,606 @@ SiSOptions(ScrnInfoPtr pScrn)
     pSiS->VESA = -1;
     pSiS->NoXvideo = FALSE;
     pSiS->maxxfbmem = 0;
-
-    switch(pSiS->Chipset) {
-        case PCI_CHIP_SIS530:
-            pSiS->TurboQueue = FALSE; /* FIXME ? */
-            break;
-        default:
-            break;
+    pSiS->forceCRT1 = -1;
+    pSiS->DSTN = FALSE;      /* TW: For using 550 FSTN/DSTN registers */
+    pSiS->XvOnCRT2 = FALSE;  /* TW: For chipsets with only one overlay */
+    pSiS->NoYV12 = -1;
+    pSiS->PDC = -1;          /* TW: Panel Delay Compensation for 300 (and 310/325) series */
+    pSiS->OptTVStand = -1;
+    pSiS->OptROMUsage = -1;
+    pSiS->noInternalModes = FALSE;
+    pSiS->OptUseOEM = -1;
+    pSiS->OptTVOver = -1;
+    pSiS->OptTVSOver = -1;
+    pSiS->chtvlumabandwidthcvbs = -1;	/* TW: Chrontel TV settings */
+    pSiS->chtvlumabandwidthsvideo = -1;
+    pSiS->chtvlumaflickerfilter = -1;
+    pSiS->chtvchromabandwidth = -1;
+    pSiS->chtvchromaflickerfilter = -1;
+    pSiS->chtvcvbscolor = -1;
+    pSiS->chtvtextenhance = -1;
+    pSiS->chtvcontrast = -1;
+    pSiS->sistvedgeenhance = -1;	/* TW: SiS30x TV settings */
+    pSiS->sistvantiflicker = -1;
+    pSiS->sistvsaturation = -1;
+    pSiS->sis6326antiflicker = -1;	/* TW: SiS6326 TV settings */
+    pSiS->sis6326enableyfilter = -1;
+    pSiS->sis6326yfilterstrong = -1;
+    pSiS->tvxpos = 0;			/* TW: Some day hopefully general TV settings */
+    pSiS->tvypos = 0;
+    pSiS->NonDefaultPAL = -1;
+    pSiS->chtvtype = -1;
+#if XF86_VERSION_CURRENT < XF86_VERSION_NUMERIC(4,2,99,0,0)    
+    pSiS->OptUseColorCursor = 0;
+#else
+    if(pSiS->VGAEngine == SIS_300_VGA) {
+    	pSiS->OptUseColorCursor = 0;
+	pSiS->OptUseColorCursorBlend = 1;
+	pSiS->OptColorCursorBlendThreshold = 0x37000000;
+    } else if(pSiS->VGAEngine == SIS_315_VGA) {
+    	pSiS->OptUseColorCursor = 1;
     }
+#endif    
+    pSiS->restorebyset = 0;
 
-#if 0 /* we only work with a depth greater or equal to 8 */
-    if (pScrn->depth <= 8)  {
-        if (xf86GetOptValInteger(pSiS->Options, OPTION_RGB_BITS,
-                                &pScrn->rgbBits))
-        {
-            xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
-                    "Bits per RGB set to %d\n", pScrn->rgbBits);
-        }
+    if(pSiS->Chipset == PCI_CHIP_SIS530) {
+    	 /* TW: TQ still broken on 530/620? */
+	 pSiS->TurboQueue = FALSE;
     }
-#endif
 
     /* sw/hw cursor */
     from = X_DEFAULT;
-    if (xf86GetOptValBool(pSiS->Options, OPTION_HW_CURSOR, &pSiS->HWCursor)) {
+    if(xf86GetOptValBool(pSiS->Options, OPTION_HW_CURSOR, &pSiS->HWCursor)) {
         from = X_CONFIG;
     }
-    if (xf86ReturnOptValBool(pSiS->Options, OPTION_SW_CURSOR, FALSE)) {
+    if(xf86ReturnOptValBool(pSiS->Options, OPTION_SW_CURSOR, FALSE)) {
         from = X_CONFIG;
         pSiS->HWCursor = FALSE;
+	pSiS->OptUseColorCursor = 0;
     }
-    xf86DrvMsg(pScrn->scrnIndex, from, "Using %s cursor\n", 
+    xf86DrvMsg(pScrn->scrnIndex, from, "Using %s cursor\n",
                                 pSiS->HWCursor ? "HW" : "SW");
+				
+#if XF86_VERSION_CURRENT >= XF86_VERSION_NUMERIC(4,2,99,0,0)
+#ifdef ARGB_CURSOR
+#ifdef SIS_ARGB_CURSOR		
+    if((pSiS->HWCursor) && ((pSiS->VGAEngine == SIS_300_VGA) || (pSiS->VGAEngine == SIS_315_VGA))) {
+       from = X_DEFAULT;
+       if(xf86GetOptValBool(pSiS->Options, OPTION_USERGBCURSOR, &pSiS->OptUseColorCursor)) {
+    	   from = X_CONFIG;
+       }
+       xf86DrvMsg(pScrn->scrnIndex, from, "Color HW cursor is %s\n",
+                    pSiS->OptUseColorCursor ? "enabled" : "disabled");
+		    
+       if(pSiS->VGAEngine == SIS_300_VGA) {
+          from = X_DEFAULT;
+          if(xf86GetOptValBool(pSiS->Options, OPTION_USERGBCURSORBLEND, &pSiS->OptUseColorCursorBlend)) {
+    	     from = X_CONFIG;
+          }
+          if(pSiS->OptUseColorCursor) {
+             xf86DrvMsg(pScrn->scrnIndex, from,
+	   	"HW cursor color blending emulation is %s\n",
+		(pSiS->OptUseColorCursorBlend) ? "enabled" : "disabled");
+	  }
+	  { 
+	  int temp;
+	  from = X_DEFAULT;
+	  if(xf86GetOptValInteger(pSiS->Options, OPTION_USERGBCURSORBLENDTH, &temp)) {
+	     if((temp >= 0) && (temp <= 255)) {
+	        from = X_CONFIG;
+		pSiS->OptColorCursorBlendThreshold = (temp << 24);
+	     } else {
+	        temp = pSiS->OptColorCursorBlendThreshold >> 24;
+		xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+		   "Illegal color HW cursor blending threshold, valid range 0-255\n");
+	     }
+	  }
+	  if(pSiS->OptUseColorCursor) {
+	     if(pSiS->OptUseColorCursorBlend) {
+	        xf86DrvMsg(pScrn->scrnIndex, from,
+	          "HW cursor color blending emulation threshold is %d\n", temp);
+ 	     }
+	  }
+	  }
+       }
+    }
+#endif
+#endif
+#endif
 
     /* Accel */
-    if (xf86ReturnOptValBool(pSiS->Options, OPTION_NOACCEL, FALSE)) {
+    if(xf86ReturnOptValBool(pSiS->Options, OPTION_NOACCEL, FALSE)) {
         pSiS->NoAccel = TRUE;
-        xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Acceleration disabled\n");
+	pSiS->NoXvideo = TRUE;
+        xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Acceleration and Xv disabled\n");
     }
 
-    /* PCI retry */
+#if 0
+    /* PCI retry - TW: What the heck is/was this for? */
     from = X_DEFAULT;
-    if (xf86GetOptValBool(pSiS->Options, OPTION_PCI_RETRY, &pSiS->UsePCIRetry)) {
+    if(xf86GetOptValBool(pSiS->Options, OPTION_PCI_RETRY, &pSiS->UsePCIRetry)) {
         from = X_CONFIG;
     }
     xf86DrvMsg(pScrn->scrnIndex, from, "PCI retry %s\n",
                          pSiS->UsePCIRetry ? "enabled" : "disabled");
+#endif
 
     /* Mem clock */
-    if (xf86GetOptValFreq(pSiS->Options, OPTION_SET_MEMCLOCK, OPTUNITS_MHZ,
+#if 0  /* TW: This is not used */
+    if(xf86GetOptValFreq(pSiS->Options, OPTION_SET_MEMCLOCK, OPTUNITS_MHZ,
                                                             &temp)) {
         pSiS->MemClock = (int)(temp * 1000.0);
-        xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, 
+        xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
                     "Memory clock set to %.3f MHz\n", pSiS->MemClock/1000.0);
     }
+#endif
 
-    /* fast VRAM */
-    from = X_DEFAULT;
-    if (xf86GetOptValBool(pSiS->Options, OPTION_FAST_VRAM, &pSiS->FastVram)) {
-        from = X_CONFIG;
+    /* Fast VRAM (not for 300/310/325 series) */
+    if((pSiS->VGAEngine != SIS_300_VGA) && (pSiS->VGAEngine != SIS_315_VGA)) {
+       from = X_DEFAULT;
+       if(xf86GetOptValBool(pSiS->Options, OPTION_FAST_VRAM, &pSiS->newFastVram)) {
+          from = X_CONFIG;
+       }
+       xf86DrvMsg(pScrn->scrnIndex, from, "Fast VRAM %s\n",
+                   (pSiS->newFastVram == -1) ? "enabled (for write only)" :
+		   	(pSiS->newFastVram ? "enabled (for read and write)" : "disabled"));
     }
-    xf86DrvMsg(pScrn->scrnIndex, from, "Fast VRAM %s\n",
-                         pSiS->FastVram ? "enabled" : "disabled");
 
-    /* Turbo QUEUE */
-    from = X_DEFAULT;
-    if (xf86GetOptValBool(pSiS->Options, OPTION_TURBOQUEUE, &pSiS->TurboQueue)) {
-        from = X_CONFIG;
+    /* NoHostBus (5597/5598 only) */
+    if((pSiS->Chipset == PCI_CHIP_SIS5597)) {
+       from = X_DEFAULT;
+       if(xf86GetOptValBool(pSiS->Options, OPTION_NOHOSTBUS, &pSiS->NoHostBus)) {
+          from = X_CONFIG;
+       }
+       xf86DrvMsg(pScrn->scrnIndex, from, "SiS5597/5598 VGA-to-CPU host bus %s\n",
+                   pSiS->NoHostBus ? "disabled" : "enabled");
+    }
+
+    if(pSiS->VGAEngine != SIS_315_VGA) {
+       /* Turbo QUEUE */
+       /* (TW: We always use this on 310/325 series) */
+       from = X_DEFAULT;
+       if(xf86GetOptValBool(pSiS->Options, OPTION_TURBOQUEUE, &pSiS->TurboQueue)) {
+    	   from = X_CONFIG;
+       }
+       xf86DrvMsg(pScrn->scrnIndex, from, "TurboQueue %s\n",
+                    pSiS->TurboQueue ? "enabled" : "disabled");
     }
-    xf86DrvMsg(pScrn->scrnIndex, from, "TurboQueue %s\n", 
-                        pSiS->TurboQueue ? "enabled" : "disabled");
 
-    /* CRT2 type */
+    /* Force CRT2 type (300/310/325 series only)
+       TW: SVIDEO, COMPOSITE and SCART for overriding detection
+     */
     pSiS->ForceCRT2Type = CRT2_DEFAULT;
-    strptr = (char *)xf86GetOptValString(pSiS->Options, OPTION_FORCE_CRT2TYPE);
-    if (strptr != NULL)
-    {
-        if (!strcmp(strptr,"TV"))
+    pSiS->ForceTVType = -1;
+    if((pSiS->VGAEngine == SIS_300_VGA) || (pSiS->VGAEngine == SIS_315_VGA)) {
+      strptr = (char *)xf86GetOptValString(pSiS->Options, OPTION_FORCE_CRT2TYPE);
+      if(strptr != NULL) {
+        if((!strcmp(strptr,"TV")) || (!strcmp(strptr,"tv")))
             pSiS->ForceCRT2Type = CRT2_TV;
-        if (!strcmp(strptr,"LCD"))
+ 	else if((!strcmp(strptr,"SVIDEO")) || (!strcmp(strptr,"svideo"))) {
+            pSiS->ForceCRT2Type = CRT2_TV;
+	    pSiS->ForceTVType = TV_SVIDEO;
+        } else if((!strcmp(strptr,"COMPOSITE")) || (!strcmp(strptr,"composite"))) {
+            pSiS->ForceCRT2Type = CRT2_TV;
+	    pSiS->ForceTVType = TV_AVIDEO;
+        } else if((!strcmp(strptr,"SCART")) || (!strcmp(strptr,"scart"))) {
+            pSiS->ForceCRT2Type = CRT2_TV;
+	    pSiS->ForceTVType = TV_SCART;
+        } else if((!strcmp(strptr,"LCD")) || (!strcmp(strptr,"lcd")))
             pSiS->ForceCRT2Type = CRT2_LCD;
-        if (!strcmp(strptr,"VGA"))
+        else if((!strcmp(strptr,"DVI")) || (!strcmp(strptr,"dvi")))
+            pSiS->ForceCRT2Type = CRT2_LCD;	    
+        else if((!strcmp(strptr,"VGA")) || (!strcmp(strptr,"vga")))
             pSiS->ForceCRT2Type = CRT2_VGA;
-        if (!strcmp(strptr,"NONE"))
+        else if((!strcmp(strptr,"NONE")) || (!strcmp(strptr,"none")))
             pSiS->ForceCRT2Type = 0;
+	else {
+	    xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+	    	"\"%s\" is not a valid parameter for Option \"ForceCRT2Type\"\n", strptr);
+	    xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+	        "Valid parameters are \"LCD\" (alias \"DVI\"), \"TV\", \"SVIDEO\", \"COMPOSITE\", \"SCART\", \"VGA\" or \"NONE\"\n");
+	}
 
-        if (pSiS->ForceCRT2Type != CRT2_DEFAULT)
+        if(pSiS->ForceCRT2Type != CRT2_DEFAULT)
+            xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
+                    "CRT2 type shall be %s\n", strptr);
+      }
+      strptr = (char *)xf86GetOptValString(pSiS->Options, OPTION_CHTVTYPE);
+      if(strptr != NULL) {
+        if((!strcmp(strptr,"SCART")) || (!strcmp(strptr,"scart")))
+            pSiS->chtvtype = 1;
+ 	else if((!strcmp(strptr,"HDTV")) || (!strcmp(strptr,"hdtv")))
+	    pSiS->chtvtype = 0;
+	else {
+	    xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+	    	"\"%s\" is not a valid parameter for Option \"CHTVType\"\n", strptr);
+	    xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+	        "Valid parameters are \"SCART\" or \"HDTV\"\n");
+	}
+        if(pSiS->chtvtype != -1)
             xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
-                    "CRT2 Type set to: %s\n", strptr);
+                    "Chrontel TV type shall be %s\n", strptr);
+      }
     }
 
     /* ShadowFB */
     from = X_DEFAULT;
-    if (xf86GetOptValBool(pSiS->Options, OPTION_SHADOW_FB, &pSiS->ShadowFB)) {
+    if(xf86GetOptValBool(pSiS->Options, OPTION_SHADOW_FB, &pSiS->ShadowFB)) {
         from = X_CONFIG;
     }
-	if (pSiS->ShadowFB) {
-		pSiS->NoAccel = TRUE;
-    	xf86DrvMsg(pScrn->scrnIndex, from, 
-				"Using \"Shadow Frame Buffer\" - acceleration disabled\n");
-	}
+    if(pSiS->ShadowFB) {
+	pSiS->NoAccel = TRUE;
+	pSiS->NoXvideo = TRUE;
+    	xf86DrvMsg(pScrn->scrnIndex, from,
+	   "Using \"Shadow Frame Buffer\" - acceleration and Xv disabled\n");
+    }
 
     /* Rotate */
-    if ((strptr = (char *)xf86GetOptValString(pSiS->Options, OPTION_ROTATE))) {
+    if((strptr = (char *)xf86GetOptValString(pSiS->Options, OPTION_ROTATE))) {
         if(!xf86NameCmp(strptr, "CW")) {
             pSiS->ShadowFB = TRUE;
             pSiS->NoAccel = TRUE;
+	    pSiS->NoXvideo = TRUE;
             pSiS->HWCursor = FALSE;
             pSiS->Rotate = 1;
             xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
-                "Rotating screen clockwise - acceleration disabled\n");
+                    "Rotating screen clockwise (acceleration and Xv disabled)\n");
         } else
-        if (!xf86NameCmp(strptr, "CCW")) {
+        if(!xf86NameCmp(strptr, "CCW")) {
             pSiS->ShadowFB = TRUE;
             pSiS->NoAccel = TRUE;
+            pSiS->NoXvideo = TRUE;
             pSiS->HWCursor = FALSE;
             pSiS->Rotate = -1;
             xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
-                "Rotating screen counter clockwise - acceleration disabled\n");
+                    "Rotating screen counter clockwise (acceleration and Xv disabled)\n");
         } else {
-            xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
-                    "\"%s\" is not a valid value for Option \"Rotate\"\n", strptr);
+            xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+                    "\"%s\" is not a valid parameter for Option \"Rotate\"\n", strptr);
             xf86DrvMsg(pScrn->scrnIndex, X_INFO,
-                    "Valid options are \"CW\" or \"CCW\"\n");
+                    "Valid parameters are \"CW\" or \"CCW\"\n");
         }
     }
-
-    /* NOXvideo */
-    if (xf86ReturnOptValBool(pSiS->Options, OPTION_NOXVIDEO, FALSE)) {
+    
+    /* RestoreBySetMode */
+    /* TW: Set this to force the driver to set the old mode instead of restoring
+     *     the register contents. This can be used to overcome problems with
+     *     LCD panels and video bridges.
+     */
+    if((pSiS->VGAEngine == SIS_300_VGA) || (pSiS->VGAEngine == SIS_315_VGA)) {
+       Bool val;
+       if(xf86GetOptValBool(pSiS->Options, OPTION_RESTOREBYSET, &val)) {
+          if(val) pSiS->restorebyset = TRUE;
+	  else    pSiS->restorebyset = FALSE;
+       }
+    }
+    
+    /* NOXvideo:
+     * Set this to TRUE to disable Xv hardware video acceleration
+     */
+    if(!pSiS->NoAccel) {
+      if(xf86ReturnOptValBool(pSiS->Options, OPTION_NOXVIDEO, FALSE)) {
         pSiS->NoXvideo = TRUE;
-        xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "XVideo Extension Disabled\n");
+        xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "XVideo extension disabled\n");
+      }
+
+      if(!pSiS->NoXvideo) {
+        Bool val;
+        if((pSiS->VGAEngine == SIS_300_VGA) || (pSiS->VGAEngine == SIS_315_VGA)) {
+      	  /* TW: XvOnCRT2:
+	   * On chipsets with only one overlay (315, 650), the user should
+	   * choose to display the overlay on CRT1 or CRT2. By setting this
+	   * option to TRUE, the overlay will be displayed on CRT2. The
+	   * default is: CRT1 if only CRT1 available, CRT2 if only CRT2
+	   * available, and CRT1 if both is available and detected.
+	   */
+          if(xf86GetOptValBool(pSiS->Options, OPTION_XVONCRT2, &val)) {
+	        if(val) pSiS->XvOnCRT2 = TRUE;
+	        else    pSiS->XvOnCRT2 = FALSE;
+	  }
+	}
+	if((pSiS->VGAEngine == SIS_OLD_VGA) || (pSiS->VGAEngine == SIS_530_VGA)) {
+	  /* TW: NoYV12 (for 5597/5598, 6326 and 530/620 only)
+	   *     YV12 has problems with videos larger than 384x288. So
+	   *     allow the user to disable YV12 support to force the
+	   *     application to use YUV2 instead.
+	   */
+          if(xf86GetOptValBool(pSiS->Options, OPTION_NOYV12, &val)) {
+	        if(val)  pSiS->NoYV12 = 1;
+	        else     pSiS->NoYV12 = 0;
+		xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
+			"Xv YV12/I420 support is %s\n",
+			pSiS->NoYV12 ? "disabled" : "enabled");
+	  }
+	}
+      }
     }
 
-    /* VESA */
-    /* 
-     * This option is for overriding the default behavior.
-     * By default it depends on the chipset/video bridge
-     * combination if the VESA BIOS code is used to prevent
-     * the "melting" screen effect due to lack of nowledge
-     * about programming details.
-     * You will normally not need this option.
+    /* TW: VESA - DEPRECATED
+     * This option is for forcing the driver to use
+     * the VESA BIOS extension for mode switching.
      */
     {
 	Bool val;
-	
-	if (xf86GetOptValBool(pSiS->Options, OPTION_VESA, &val)) {
-	    if (val)
-		pSiS->VESA = 1;
-	    else
-		pSiS->VESA = 0;
-
-	    xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "VESA usage %s\n",
+
+	if(xf86GetOptValBool(pSiS->Options, OPTION_VESA, &val)) {
+	    if(val)  pSiS->VESA = 1;
+	    else     pSiS->VESA = 0;
+
+	    xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "VESA: VESA usage shall be %s\n",
 		       val ? "enabled":"disabled");
 	}
     }
-   /* With the option "MaxXFBMem" you can limit the amount of video memory X
+
+   /* TW: MaxXFBMem
+    * With the option "MaxXFBMem" you can limit the amount of video memory X
     * uses for screen and off-screen buffers. This option should be used if
     * you intend to use DRI/DRM. The framebuffer driver required for DRM will
-    * start its memory heap at 8MB if it detects more than that. So, if you
-    * limit the amount of memory X uses, you avoid a clash between the framebuffer
+    * start its memory heap at 12MB if it detects more than 16MB, at 8MB if
+    * between 8 and 16MB are available, otherwise at 4MB. So, if you limit
+    * the amount of memory X uses, you avoid a clash between the framebuffer
     * driver and X as regards overwriting memory portions of each other.
     * The amount is to be specified in KB.
     */
-    if (xf86GetOptValULong(pSiS->Options, OPTION_MAXXFBMEM,
+    if(xf86GetOptValULong(pSiS->Options, OPTION_MAXXFBMEM,
                                 &pSiS->maxxfbmem)) {
             xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
-                    "Framebuffer memory limited to %d KB\n", pSiS->maxxfbmem);
+                    "MaxXFBMem: Framebuffer memory shall be limited to %d KB\n",
+		    pSiS->maxxfbmem);
 	    pSiS->maxxfbmem *= 1024;
     }
+
+    if((pSiS->VGAEngine == SIS_300_VGA) || (pSiS->VGAEngine == SIS_315_VGA)) {
+       /* TW: ForceCRT1 (300/310/325 series only)
+        * This option can be used to force CRT1 to be switched on/off. Its
+        * intention is mainly for old monitors that can't be detected
+        * automatically. This is only useful on machines with a video bridge.
+        * In normal cases, this option won't be necessary.
+        */
+	Bool val;
+	if(xf86GetOptValBool(pSiS->Options, OPTION_FORCECRT1, &val)) {
+	    if(val)  pSiS->forceCRT1 = 1;
+	    else     pSiS->forceCRT1 = 0;
+
+	    xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "CRT1 shall be forced to %s\n",
+		       val ? "ON" : "OFF");
+	}
+    }
+
+    if(pSiS->Chipset == PCI_CHIP_SIS550) {
+      /* TW: SiS 550 DSTN/FSTN
+       *     This is for notifying the driver to use the DSTN registers on 550.
+       *     DSTN/FSTN is a special LCD port of the SiS550 (notably not the 551
+       *     and 552, which I don't know how to detect) that uses an extended
+       *     register range. The only effect of this option is that the driver
+       *     saves and restores these registers. DSTN display modes are chosen
+       *     by using resultion 320x480x8 or 320x480x16.
+       */
+      if(xf86ReturnOptValBool(pSiS->Options, OPTION_DSTN, FALSE)) {
+        pSiS->DSTN = TRUE;
+        xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "SiS 550 DSTN/FSTN enabled\n");
+      } else {
+	xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "SiS 550 DSTN/FSTN disabled\n");
+      }
+    }
+
+    /* TW: PanelDelayCompensation (300/310/325 series only)
+     *     This might be required if the LCD panel shows "small waves".
+     *     The parameter is an integer, usually either 4, 32 or 24.
+     *     Why this option? Simply because SiS did poor BIOS design.
+     *     The PDC value depends on the very LCD panel used in a
+     *     particular machine. For most panels, the driver is able
+     *     to detect the correct value. However, some panels require
+     *     a different setting. The value given must be within the mask 0x3c.
+     */
+    if((pSiS->VGAEngine == SIS_300_VGA) || (pSiS->VGAEngine == SIS_315_VGA)) {
+        if(xf86GetOptValInteger(pSiS->Options, OPTION_PDC, &pSiS->PDC)) {
+	    if(pSiS->PDC & ~0x3c) {
+	       xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+	           "Illegal PanelDelayCompensation value\n");
+	       pSiS->PDC = -1;
+	    } else {
+               xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
+                    "Panel delay compensation shall be %d\n",
+		    pSiS->PDC);
+	    }
+        }
+    }
+
+    /* TW: TVStandard (300/310/325 series and 6326 w/ TV only)
+     * This option is for overriding the autodetection of
+     * the BIOS option for PAL / NTSC
+     */
+    if((pSiS->VGAEngine == SIS_300_VGA) ||
+       (pSiS->VGAEngine == SIS_315_VGA) ||
+       ((pSiS->Chipset == PCI_CHIP_SIS6326) && (pSiS->SiS6326Flags & SIS6326_HASTV))) {
+       strptr = (char *)xf86GetOptValString(pSiS->Options, OPTION_TVSTANDARD);
+       if(strptr != NULL) {
+          if((!strcmp(strptr,"PAL")) || (!strcmp(strptr,"pal")))
+	     pSiS->OptTVStand = 1;
+	  else if((!strcmp(strptr,"PALM")) || (!strcmp(strptr,"palm"))) {
+	     pSiS->OptTVStand = 1;
+	     pSiS->NonDefaultPAL = 1;
+  	  } else if((!strcmp(strptr,"PALN")) || (!strcmp(strptr,"paln"))) {
+	     pSiS->OptTVStand = 1;
+	     pSiS->NonDefaultPAL = 0;
+  	  } else if((!strcmp(strptr,"NTSC")) || (!strcmp(strptr,"ntsc")))
+	     pSiS->OptTVStand = 0;
+	  else {
+	     xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+	     	"\"%s\" is not a valid parameter for Option \"TVStandard\"\n", strptr);
+             xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+	        "Valid options are \"PAL\", \"PALM\", \"PALN\" or \"NTSC\"\n");
+	  }
+
+	  if(pSiS->OptTVStand != -1) {
+	     if(pSiS->Chipset == PCI_CHIP_SIS6326) {
+	         pSiS->NonDefaultPAL = -1;
+	         xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "TV Standard shall be %s\n",
+		       pSiS->OptTVStand ? "PAL" : "NTSC");
+	     } else {
+	         xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "TV Standard shall be %s\n",
+		       (pSiS->OptTVStand ? 
+		          ( (pSiS->NonDefaultPAL == -1) ? "PAL" : 
+			      ((pSiS->NonDefaultPAL) ? "PALM" : "PALN") )
+				           : "NTSC"));
+	     }
+	  }
+        }
+    }
+
+    /* TW: TVOverscan (300/310/325 series only)
+     * This option is for overriding the BIOS option for
+     * TV Overscan. Some BIOS don't even have such an option.
+     * This is only effective on LVDS+CHRONTEL 70xx systems.
+     */
+    if((pSiS->VGAEngine == SIS_300_VGA) || (pSiS->VGAEngine == SIS_315_VGA)) {
+	Bool val;
+	if(xf86GetOptValBool(pSiS->Options, OPTION_CHTVOVERSCAN, &val)) {
+	    if(val) pSiS->OptTVOver = 1;
+	    else    pSiS->OptTVOver = 0;
+
+	    xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
+	               "Chrontel: TV overscan shall be %s\n",
+		       val ? "enabled":"disabled");
+	}
+        if(xf86GetOptValBool(pSiS->Options, OPTION_CHTVSOVERSCAN, &pSiS->OptTVSOver)) {
+	      xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
+	               "Chrontel: TV super overscan shall be %s\n",
+		       pSiS->OptTVSOver ? "enabled":"disabled");
+	}
+    }
+
+    /* TW: UseROMData (300/310/325 series only)
+     * This option is enabling/disabling usage of some machine
+     * specific data from the BIOS ROM. This option can - and
+     * should - be used in case the driver makes problems
+     * because SiS changed the location of this data.
+     * TW: NoOEM (300/310/325 series only)
+     * The driver contains quite a lot data for OEM LCD panels
+     * and TV connector specifics which override the defaults.
+     * If this data is incorrect, the TV may lose color and
+     * the LCD panel might show some strange effects. Use this
+     * option to disable the usage of this data.
+     */
+    if((pSiS->VGAEngine == SIS_300_VGA) || (pSiS->VGAEngine == SIS_315_VGA)) {
+	Bool val;
+	if(xf86GetOptValBool(pSiS->Options, OPTION_USEROMDATA, &val)) {
+	    if(val)  pSiS->OptROMUsage = 1;
+	    else     pSiS->OptROMUsage = 0;
+
+	    xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
+	               "Video ROM data usage shall be %s\n",
+		       val ? "enabled":"disabled");
+	}
+	if(xf86GetOptValBool(pSiS->Options, OPTION_USEOEM, &val)) {
+	    if(val)  pSiS->OptUseOEM = 1;
+	    else     pSiS->OptUseOEM = 0;
+
+	    xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
+	               "Internal LCD/TV OEM data usage shall be %s\n",
+		       val ? "enabled":"disabled");
+	}
+	pSiS->sbiosn = NULL;
+        strptr = (char *)xf86GetOptValString(pSiS->Options, OPTION_SBIOSN);
+        if(strptr != NULL) {
+	   pSiS->sbiosn = xalloc(strlen(strptr)+1);
+           if(pSiS->sbiosn) strcpy(pSiS->sbiosn, strptr);
+        }
+    }
+
+    /* TW: NoInternalModes (300/310/325 series only)
+     *     Since the mode switching code for these chipsets is a
+     *     Asm-to-C translation of BIOS code, we only have timings
+     *     for a pre-defined number of modes. The default behavior
+     *     is to replace XFree's default modes with a mode list
+     *     generated out of the known and supported modes. Use
+     *     this option to disable this. However, even if using
+     *     out built-in mode list will NOT make it possible to
+     *     use modelines.
+     */
+    if((pSiS->VGAEngine == SIS_300_VGA) || (pSiS->VGAEngine == SIS_315_VGA)) {
+        from = X_DEFAULT;
+	if(xf86GetOptValBool(pSiS->Options, OPTION_NOINTERNALMODES, &pSiS->noInternalModes))
+		from = X_CONFIG;
+
+	xf86DrvMsg(pScrn->scrnIndex, from, "Usage of built-in modes is %s\n",
+		       pSiS->noInternalModes ? "disabled":"enabled");
+    }
+
+    /* TW: Various parameters for TV output via SiS bridge, Chrontel or SiS6326 */
+    if((pSiS->VGAEngine == SIS_300_VGA) || (pSiS->VGAEngine == SIS_315_VGA)) {
+        int tmp = 0;
+        xf86GetOptValInteger(pSiS->Options, OPTION_CHTVLUMABANDWIDTHCVBS,
+                                &pSiS->chtvlumabandwidthcvbs);
+	xf86GetOptValInteger(pSiS->Options, OPTION_CHTVLUMABANDWIDTHSVIDEO,
+                                &pSiS->chtvlumabandwidthsvideo);
+	xf86GetOptValInteger(pSiS->Options, OPTION_CHTVLUMAFLICKERFILTER,
+                                &pSiS->chtvlumaflickerfilter);
+	xf86GetOptValInteger(pSiS->Options, OPTION_CHTVCHROMABANDWIDTH,
+                                &pSiS->chtvchromabandwidth);
+	xf86GetOptValInteger(pSiS->Options, OPTION_CHTVCHROMAFLICKERFILTER,
+                                &pSiS->chtvchromaflickerfilter);
+	xf86GetOptValBool(pSiS->Options, OPTION_CHTVCVBSCOLOR,
+				&pSiS->chtvcvbscolor);
+	xf86GetOptValInteger(pSiS->Options, OPTION_CHTVTEXTENHANCE,
+                                &pSiS->chtvtextenhance);
+	xf86GetOptValInteger(pSiS->Options, OPTION_CHTVCONTRAST,
+                                &pSiS->chtvcontrast);
+	xf86GetOptValInteger(pSiS->Options, OPTION_SISTVEDGEENHANCE,
+                                &pSiS->sistvedgeenhance);
+	xf86GetOptValInteger(pSiS->Options, OPTION_SISTVANTIFLICKER,
+                                &pSiS->sistvantiflicker);
+	xf86GetOptValInteger(pSiS->Options, OPTION_SISTVSATURATION,
+                                &pSiS->sistvsaturation);
+	xf86GetOptValInteger(pSiS->Options, OPTION_TVXPOSOFFSET,
+                                &pSiS->tvxpos);
+	xf86GetOptValInteger(pSiS->Options, OPTION_TVYPOSOFFSET,
+                                &pSiS->tvypos);
+	if(pSiS->tvxpos > 32)  { pSiS->tvxpos = 32;  tmp = 1; }
+	if(pSiS->tvxpos < -32) { pSiS->tvxpos = -32; tmp = 1; }
+	if(pSiS->tvypos > 32)  { pSiS->tvypos = 32;  tmp = 1; }
+	if(pSiS->tvypos < -32) { pSiS->tvypos = -32;  tmp = 1; }
+	if(tmp) xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+		      "Illegal TV x or y offset. Range is from -32 to 32\n");
+    }
+    if((pSiS->Chipset == PCI_CHIP_SIS6326) && (pSiS->SiS6326Flags & SIS6326_HASTV)) {
+        int tmp = 0;
+        strptr = (char *)xf86GetOptValString(pSiS->Options, OPTION_SIS6326ANTIFLICKER);
+        if (strptr != NULL) {
+          if((!strcmp(strptr,"OFF")) || (!strcmp(strptr,"off")))
+	     pSiS->sis6326antiflicker = 0;
+  	  else if((!strcmp(strptr,"LOW")) || (!strcmp(strptr,"low")))
+	     pSiS->sis6326antiflicker = 1;
+	  else if((!strcmp(strptr,"MED")) || (!strcmp(strptr,"med")))
+	     pSiS->sis6326antiflicker = 2;
+	  else if((!strcmp(strptr,"HIGH")) || (!strcmp(strptr,"high")))
+	     pSiS->sis6326antiflicker = 3;
+	  else if((!strcmp(strptr,"ADAPTIVE")) || (!strcmp(strptr,"adaptive")))
+	     pSiS->sis6326antiflicker = 4;
+	  else {
+	     pSiS->sis6326antiflicker = -1;
+	     xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+	     	"\"%s\" is not a valid parameter for Option \"SIS6326TVAntiFlicker\"\n", strptr);
+	     xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+	        "Valid parameters are \"OFF\", \"LOW\", \"MED\", \"HIGH\" or \"ADAPTIVE\"\n");
+	  }
+	}
+	xf86GetOptValBool(pSiS->Options, OPTION_SIS6326ENABLEYFILTER,
+                                &pSiS->sis6326enableyfilter);
+	xf86GetOptValBool(pSiS->Options, OPTION_SIS6326YFILTERSTRONG,
+                                &pSiS->sis6326yfilterstrong);
+	xf86GetOptValInteger(pSiS->Options, OPTION_TVXPOSOFFSET,
+                                &pSiS->tvxpos);
+	xf86GetOptValInteger(pSiS->Options, OPTION_TVYPOSOFFSET,
+                                &pSiS->tvypos);
+	if(pSiS->tvxpos > 16)  { pSiS->tvxpos = 16;  tmp = 1; }
+	if(pSiS->tvxpos < -16) { pSiS->tvxpos = -16; tmp = 1; }
+	if(pSiS->tvypos > 16)  { pSiS->tvypos = 16;  tmp = 1; }
+	if(pSiS->tvypos < -16) { pSiS->tvypos = -16;  tmp = 1; }
+	if(tmp) xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+		      "Illegal TV x or y offset. Range is from -16 to 16\n");
+    }
 }
 
 const OptionInfoRec *
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_regs.h b/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_regs.h
index cbf4f5d6d..928f1dc70 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_regs.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_regs.h
@@ -1,31 +1,50 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/sis_regs.h,v 1.17 2003/01/29 15:42:17 eich Exp $ */
 /*
  * Copyright 1998,1999 by Alan Hourihane, Wigan, England.
+ * Parts Copyright 2001, 2002 by Thomas Winischhofer, Vienna, Austria.
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
  * the above copyright notice appear in all copies and that both that
  * copyright notice and this permission notice appear in supporting
- * documentation, and that the name of Alan Hourihane not be used in
+ * documentation, and that the name of the copyright holder not be used in
  * advertising or publicity pertaining to distribution of the software without
- * specific, written prior permission.  Alan Hourihane makes no representations
+ * specific, written prior permission.  The copyright holder makes no representations
  * about the suitability of this software for any purpose.  It is provided
  * "as is" without express or implied warranty.
  *
- * ALAN HOURIHANE DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+ * THE PROVIDER DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
  * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
- * EVENT SHALL ALAN HOURIHANE BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+ * EVENT SHALL THE PROVIDER BE LIABLE FOR ANY SPECIAL, INDIRECT OR
  * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
  * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  * PERFORMANCE OF THIS SOFTWARE.
  *
  * Authors:  Alan Hourihane, alanh@fairlite.demon.co.uk
- *           Mike Chapman <mike@paranoia.com>, 
- *           Juanjo Santamarta <santamarta@ctv.es>, 
- *           Mitani Hiroshi <hmitani@drl.mei.co.jp> 
- *           David Thomas <davtom@dream.org.uk>. 
+ *           Mike Chapman <mike@paranoia.com>,
+ *           Juanjo Santamarta <santamarta@ctv.es>,
+ *           Mitani Hiroshi <hmitani@drl.mei.co.jp>
+ *           David Thomas <davtom@dream.org.uk>
+ *
+ *	     Thomas Winischhofer <thomas@winischhofer.net>
+ *              - 310/325 series (315/550/650/651/740/M650) support
+ *		- (possibly incomplete) Xabre (SiS330) support
+ *              - new mode switching code for 300, 310/325 and 330 series
+ *              - many fixes for 300/540/630/730 chipsets,
+ *              - many fixes for 5597/5598, 6326 and 530/620 chipsets,
+ *              - VESA mode switching (deprecated),
+ *              - extended CRT2/video bridge handling support,
+ *              - dual head support on 300, 310/325 and 330 series
+ *              - 650/LVDS (up to 1400x1050), 650/Chrontel 701x support
+ *              - 30xB/30xLV/30xLVX video bridge support (300, 310/325, 330 series)
+ *              - Xv support for 5597/5598, 6326, 530/620 and 310/325 series
+ *              - video overlay enhancements for 300 series
+ *              - TV and hi-res support for the 6326
+ *              - etc.
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/sis_regs.h,v 1.15 2001/04/19 12:40:33 alanh Exp $ */
+
+/* For general use --------------------------------------------------------------- */
 
 #define inSISREG(base)          inb(base)
 #define outSISREG(base,val)     outb(base,val)
@@ -41,9 +60,6 @@
 #define inSISIDXREG(base,idx,var)   do { \
                       outb(base,idx); var=inb((base)+1); \
                     } while (0)
-#if 0
-#define outSISIDXREG(base,idx,val)  outw(base, (val)<<8 | (idx));
-#endif
 #define outSISIDXREG(base,idx,val)  do { \
                       outb(base,idx); outb((base)+1,val); \
                     } while (0)
@@ -69,40 +85,68 @@
 #define BITMASK(h,l)    (((unsigned)(1U << ((h)-(l)+1))-1)<<(l))
 #define GENMASK(mask)   BITMASK(1?mask,0?mask)
 
-#define GETBITS(var,mask)   (((var) & GENMASK(mask)) >> (0?mask))
-#define SETBITS(val,mask)   ((val) << (0?mask))
-#define SETBIT(n)       (1<<(n))
+#define GETBITS(var,mask)   	(((var) & GENMASK(mask)) >> (0?mask))
+#define SETBITS(val,mask)   	((val) << (0?mask))
+#define SETBIT(n)       	(1<<(n))
 
 #define GETBITSTR(val,from,to)  ((GETBITS(val,from)) << (0?to))
 #define SETVARBITS(var,val,from,to) (((var)&(~(GENMASK(to)))) | \
-                    GETBITSTR(val,from,to))
+                                    GETBITSTR(val,from,to))
 #define GETVAR8(var)        ((var)&0xFF)
 #define SETVAR8(var,val)    (var) =  GETVAR8(val)
 
-#define VGA_RELIO_BASE  0x380
-
-#define AROFFSET    VGA_ATTR_INDEX - VGA_RELIO_BASE
-#define ARROFFSET   VGA_ATTR_DATA_R - VGA_RELIO_BASE
-#define GROFFSET    VGA_GRAPH_INDEX - VGA_RELIO_BASE
-#define SROFFSET    VGA_SEQ_INDEX - VGA_RELIO_BASE
-#define CROFFSET    VGA_CRTC_INDEX_OFFSET + VGA_IOBASE_COLOR-VGA_RELIO_BASE
-#define MISCROFFSET VGA_MISC_OUT_R - VGA_RELIO_BASE
-#define MISCWOFFSET VGA_MISC_OUT_W - VGA_RELIO_BASE
-
-#define SISAR       pSiS->RElIO+AROFFSET
-#define SISARR      pSiS->RELIO+ARROFFSET
-#define SISGR       pSiS->RELIO+GROFFSET
-#define SISSR       pSiS->RelIO+SROFFSET
-#define SISCR       pSiS->RelIO+CROFFSET
-#define SISMISCR    pSiS->RelIO+MISCROFFSET
-#define SISMISCW    pSiS->RelIO+MISCWOFFSET
-#define SISPART1        pSiS->RelIO+0x04
-#define SISPART2        pSiS->RelIO+0x10
-#define SISPART3        pSiS->RelIO+0x12
-#define SISPART4        pSiS->RelIO+0x14
-#define SISPART5        pSiS->RelIO+0x16
-
-/* 3C4 */
+/* #define VGA_RELIO_BASE  0x380 */
+
+#define AROFFSET        0x40   /* VGA_ATTR_INDEX - VGA_RELIO_BASE */
+#define ARROFFSET       0x41   /* VGA_ATTR_DATA_R - VGA_RELIO_BASE  */
+#define GROFFSET        0x4e   /* VGA_GRAPH_INDEX - VGA_RELIO_BASE */
+#define SROFFSET        0x44   /* VGA_SEQ_INDEX - VGA_RELIO_BASE */
+#define CROFFSET        0x54   /* VGA_CRTC_INDEX_OFFSET + VGA_IOBASE_COLOR - VGA_RELIO_BASE */
+#define MISCROFFSET     0x4c   /* VGA_MISC_OUT_R - VGA_RELIO_BASE */
+#define MISCWOFFSET     0x42   /* VGA_MISC_OUT_W - VGA_RELIO_BASE */
+#define INPUTSTATOFFSET 0x5A
+#define PART1OFFSET     0x04
+#define PART2OFFSET     0x10
+#define PART3OFFSET     0x12
+#define PART4OFFSET     0x14
+#define PART5OFFSET     0x16
+#define VIDEOOFFSET     0x02
+#define COLREGOFFSET    0x48
+
+#define SISAR       pSiS->RelIO + AROFFSET
+#define SISARR      pSiS->RelIO + ARROFFSET
+#define SISGR       pSiS->RelIO + GROFFSET
+#define SISSR       pSiS->RelIO + SROFFSET
+#define SISCR       pSiS->RelIO + CROFFSET
+#define SISMISCR    pSiS->RelIO + MISCROFFSET
+#define SISMISCW    pSiS->RelIO + MISCWOFFSET
+#define SISINPSTAT  pSiS->RelIO + INPUTSTATOFFSET
+#define SISPART1    pSiS->RelIO + PART1OFFSET
+#define SISPART2    pSiS->RelIO + PART2OFFSET
+#define SISPART3    pSiS->RelIO + PART3OFFSET
+#define SISPART4    pSiS->RelIO + PART4OFFSET
+#define SISPART5    pSiS->RelIO + PART5OFFSET
+#define SISVID      pSiS->RelIO + VIDEOOFFSET
+#define SISCOLIDX   pSiS->RelIO + COLREGOFFSET
+#define SISCOLDATA  pSiS->RelIO + COLREGOFFSET + 1
+#define SISCOL2IDX  SISPART5
+#define SISCOL2DATA SISPART5 + 1
+
+
+#define vc_index_offset    0x00  /* Video capture - unused */
+#define vc_data_offset     0x01
+#define vi_index_offset    VIDEOOFFSET
+#define vi_data_offset     (VIDEOOFFSET + 1)
+#define crt2_index_offset  PART1OFFSET
+#define crt2_port_offset   (PART1OFFSET + 1)
+#define sr_index_offset    SROFFSET
+#define sr_data_offset     (SROFFSET + 1)
+#define cr_index_offset    CROFFSET
+#define cr_data_offset     (CROFFSET + 1)
+#define input_stat         INPUTSTATOFFSET
+
+/* For old chipsets (5597/5598, 6326, 530/620) ------------ */
+/* SR (3C4) */
 #define BankReg 0x06
 #define ClockReg 0x07
 #define CPUThreshold 0x08
@@ -129,157 +173,7 @@
 /* 3x4 */
 #define Offset 0x13
 
-#define read_xr(num,var) do {outb(0x3c4, num);var=inb(0x3c5);} while (0)
-
-/* Definitions for the SIS engine communication. */
-
-extern int sisReg32MMIO[];
-#define BR(x) sisReg32MMIO[x]
-
-/* These are done using Memory Mapped IO, of the registers */
-/* 
- * Modified for Sis by Xavier Ducoin (xavier@rd.lectra.fr) 
- */
-
-#define sisLEFT2RIGHT       0x10
-#define sisRIGHT2LEFT       0x00
-#define sisTOP2BOTTOM       0x20
-#define sisBOTTOM2TOP       0x00
-
-#define sisSRCSYSTEM        0x03
-#define sisSRCVIDEO         0x02
-#define sisSRCFG            0x01
-#define sisSRCBG            0x00
-
-#define sisCMDBLT           0x0000
-#define sisCMDBLTMSK        0x0100
-#define sisCMDCOLEXP        0x0200
-#define sisCMDLINE          0x0300
-
-#define sisCMDENHCOLEXP     0x2000
-
-#define sisXINCREASE        0x10
-#define sisYINCREASE        0x20
-#define sisCLIPENABL        0x40
-#define sisCLIPINTRN        0x80 
-#define sisCLIPEXTRN        0x00
-
-
-#define sisPATREG           0x08
-#define sisPATFG            0x04
-#define sisPATBG            0x00
-
-#define sisLASTPIX          0x0800
-#define sisXMAJOR           0x0400
-
-
-/* Macros to do useful things with the SIS BitBLT engine */
-
-#define sisBLTSync \
-  while(*(volatile unsigned short *)(pSiS->IOBase + BR(10)+2) & \
-    (0x4000)){}
-
-/* According to SiS 6326 2D programming guide, 16 bits position at   */
-/* 0x82A8 returns queue free. But this don't work, so don't wait     */
-/* anything when turbo-queue is enabled. If there are frequent syncs */
-/* this should work. But not for xaa_benchmark :-(     */
-
-#define sisBLTWAIT \
-  if (!pSiS->TurboQueue) {\
-    while(*(volatile unsigned short *)(pSiS->IOBase + BR(10)+2) & \
-    (0x4000)){}} /* \
-    else {while(*(volatile unsigned short *)(pSiS->IOBase + BR(10)) < \
-    63){}} */
-
-#define sisSETPATREG()\
-   ((unsigned char *)(pSiS->IOBase + BR(11)))
-
-#define sisSETPATREGL()\
-   ((unsigned long *)(pSiS->IOBase + BR(11)))
-
-#define sisSETCMD(op) \
-  *(volatile unsigned short *)(pSiS->IOBase + BR(10) +2 ) = op
-
-#define sisSETROPFG(op) \
-  *(volatile unsigned int *)(pSiS->IOBase + BR(4)) = ((*(volatile unsigned int *)(pSiS->IOBase + BR(4)))&0xffffff) | (op<<24)
-
-#define sisSETROPBG(op) \
-  *(volatile unsigned int *)(pSiS->IOBase + BR(5)) = ((*(volatile unsigned int *)(pSiS->IOBase + BR(5)))&0xffffff) | (op<<24)
-
-#define sisSETROP(op) \
-   sisSETROPFG(op);sisSETROPBG(op);
-
-
-#define sisSETSRCADDR(srcAddr) \
-  *(volatile unsigned int *)(pSiS->IOBase + BR(0)) = srcAddr&0x3FFFFFL
-
-#define sisSETDSTADDR(dstAddr) \
-  *(volatile unsigned int *)(pSiS->IOBase + BR(1)) = dstAddr&0x3FFFFFL
-
-#define sisSETPITCH(srcPitch,dstPitch) \
-  *(volatile unsigned int *)(pSiS->IOBase + BR(2)) = ((dstPitch&0xFFFF)<<16)| \
-      (srcPitch&0xFFFF)
-
-/* according to SIS 2D Engine Programming Guide 
- * width -1 independant of Bpp
- */ 
-#define sisSETHEIGHTWIDTH(Height,Width)\
-  *(volatile unsigned int *)(pSiS->IOBase + BR(3)) = (((Height)&0xFFFF)<<16)| \
-      ((Width)&0xFFFF)
-
-#define sisSETCLIPTOP(x,y)\
-  *(volatile unsigned int *)(pSiS->IOBase + BR(8)) = (((y)&0xFFFF)<<16)| \
-      ((x)&0xFFFF)
-
-#define sisSETCLIPBOTTOM(x,y)\
-  *(volatile unsigned int *)(pSiS->IOBase + BR(9)) = (((y)&0xFFFF)<<16)| \
-      ((x)&0xFFFF)
-
-#define sisSETBGCOLOR(bgColor)\
-  *(volatile unsigned int *)(pSiS->IOBase + BR(5)) = (bgColor)
-
-#define sisSETBGCOLOR8(bgColor)\
-  *(volatile unsigned int *)(pSiS->IOBase + BR(5)) = (bgColor&0xFF)
-
-#define sisSETBGCOLOR16(bgColor)\
-  *(volatile unsigned int *)(pSiS->IOBase + BR(5)) = (bgColor&0xFFFF)
-
-#define sisSETBGCOLOR24(bgColor)\
-  *(volatile unsigned int *)(pSiS->IOBase + BR(5)) = (bgColor&0xFFFFFF)
-
-
-#define sisSETFGCOLOR(fgColor)\
-  *(volatile unsigned int *)(pSiS->IOBase + BR(4)) = (fgColor)
-
-#define sisSETFGCOLOR8(fgColor)\
-  *(volatile unsigned int *)(pSiS->IOBase + BR(4)) = (fgColor&0xFF)
-
-#define sisSETFGCOLOR16(fgColor)\
-  *(volatile unsigned int *)(pSiS->IOBase + BR(4)) = (fgColor&0xFFFF)
-
-#define sisSETFGCOLOR24(fgColor)\
-  *(volatile unsigned int *)(pSiS->IOBase + BR(4)) = (fgColor&0xFFFFFF)
-
-/* Line drawing */
-
-#define sisSETXStart(XStart) \
-  *(volatile unsigned int *)(pSiS->IOBase + BR(0)) = XStart&0xFFFF
-
-#define sisSETYStart(YStart) \
-  *(volatile unsigned int *)(pSiS->IOBase + BR(1)) = YStart&0xFFFF
-
-#define sisSETLineMajorCount(MajorAxisCount) \
-  *(volatile unsigned int *)(pSiS->IOBase + BR(3)) = MajorAxisCount&0xFFFF
-
-#define sisSETLineSteps(K1,K2) \
-  *(volatile unsigned int *)(pSiS->IOBase + BR(6)) = (((K1)&0xFFFF)<<16)| \
-      ((K2)&0xFFFF)
-
-#define sisSETLineErrorTerm(ErrorTerm) \
-  *(volatile unsigned short *)(pSiS->IOBase + BR(7)) = ErrorTerm
-
-
-/* SiS Registers for Xv */
+/* SiS Registers for 300, 540, 630, 730, 315, 550, 650, 740 ---------------------- */
 
 /* VGA standard register */
 #define  Index_SR_Graphic_Mode                  0x06
@@ -305,44 +199,55 @@ extern int sisReg32MMIO[];
 #define  Index_SR_Power_On_Trap2                0x39
 #define  Index_SR_Power_On_Trap3                0x3A
 
-/* video registers */
+/* video registers (300/630/730/315/550/650/740 only) */
 #define  Index_VI_Passwd                        0x00
+
+/* Video overlay horizontal start/end, unit=screen pixels */
 #define  Index_VI_Win_Hor_Disp_Start_Low        0x01
 #define  Index_VI_Win_Hor_Disp_End_Low          0x02
-#define  Index_VI_Win_Hor_Over                  0x03
+#define  Index_VI_Win_Hor_Over                  0x03 /* Overflow */
 
+/* Video overlay vertical start/end, unit=screen pixels */
 #define  Index_VI_Win_Ver_Disp_Start_Low        0x04
 #define  Index_VI_Win_Ver_Disp_End_Low          0x05
-#define  Index_VI_Win_Ver_Over                  0x06
+#define  Index_VI_Win_Ver_Over                  0x06 /* Overflow */
 
+/* Y Plane (4:2:0) or YUV (4:2:2) buffer start address, unit=word */
 #define  Index_VI_Disp_Y_Buf_Start_Low          0x07
 #define  Index_VI_Disp_Y_Buf_Start_Middle       0x08
 #define  Index_VI_Disp_Y_Buf_Start_High         0x09
 
+/* U Plane (4:2:0) buffer start address, unit=word */
 #define  Index_VI_U_Buf_Start_Low               0x0A
 #define  Index_VI_U_Buf_Start_Middle            0x0B
 #define  Index_VI_U_Buf_Start_High              0x0C
 
+/* V Plane (4:2:0) buffer start address, unit=word */
 #define  Index_VI_V_Buf_Start_Low               0x0D
 #define  Index_VI_V_Buf_Start_Middle            0x0E
 #define  Index_VI_V_Buf_Start_High              0x0F
 
+/* Pitch for Y, UV Planes, unit=word */
 #define  Index_VI_Disp_Y_Buf_Pitch_Low          0x10
 #define  Index_VI_Disp_UV_Buf_Pitch_Low         0x11
-#define  Index_VI_Disp_Y_UV_Buf_Pitch_High      0x12
+#define  Index_VI_Disp_Y_UV_Buf_Pitch_Middle    0x12
 
+/* What is this ? */
 #define  Index_VI_Disp_Y_Buf_Preset_Low         0x13
 #define  Index_VI_Disp_Y_Buf_Preset_Middle      0x14
+
 #define  Index_VI_UV_Buf_Preset_Low             0x15
 #define  Index_VI_UV_Buf_Preset_Middle          0x16
 #define  Index_VI_Disp_Y_UV_Buf_Preset_High     0x17
 
+/* Scaling control registers */
 #define  Index_VI_Hor_Post_Up_Scale_Low         0x18
 #define  Index_VI_Hor_Post_Up_Scale_High        0x19
 #define  Index_VI_Ver_Up_Scale_Low              0x1A
 #define  Index_VI_Ver_Up_Scale_High             0x1B
 #define  Index_VI_Scale_Control                 0x1C
 
+/* Playback line buffer control */
 #define  Index_VI_Play_Threshold_Low            0x1D
 #define  Index_VI_Play_Threshold_High           0x1E
 #define  Index_VI_Line_Buffer_Size              0x1F
@@ -355,7 +260,7 @@ extern int sisReg32MMIO[];
 #define  Index_VI_Overlay_ColorKey_Green_Max    0x24
 #define  Index_VI_Overlay_ColorKey_Blue_Max     0x25
 
-/* Source color key */
+/* Source color key, YUV color space */
 #define  Index_VI_Overlay_ChromaKey_Red_Y_Min   0x26
 #define  Index_VI_Overlay_ChromaKey_Green_U_Min 0x27
 #define  Index_VI_Overlay_ChromaKey_Blue_V_Min  0x28
@@ -363,8 +268,8 @@ extern int sisReg32MMIO[];
 #define  Index_VI_Overlay_ChromaKey_Green_U_Max 0x2A
 #define  Index_VI_Overlay_ChromaKey_Blue_V_Max  0x2B
 
-#define  Index_VI_Contrast_Factor               0x2C
-
+/* Contrast enhancement and brightness control */
+#define  Index_VI_Contrast_Factor               0x2C	/* obviously unused/undefined */
 #define  Index_VI_Brightness                    0x2D
 #define  Index_VI_Contrast_Enh_Ctrl             0x2E
 
@@ -374,15 +279,268 @@ extern int sisReg32MMIO[];
 #define  Index_VI_Control_Misc1                 0x31
 #define  Index_VI_Control_Misc2                 0x32
 
-#define  Index_MPEG_Read_Ctrl0                  0x60
-#define  Index_MPEG_Read_Ctrl1                  0x61
-#define  Index_MPEG_Read_Ctrl2                  0x62
-#define  Index_MPEG_Read_Ctrl3                  0x63
+/* TW: Subpicture registers */
+#define  Index_VI_SubPict_Buf_Start_Low		0x33
+#define  Index_VI_SubPict_Buf_Start_Middle	0x34
+#define  Index_VI_SubPict_Buf_Start_High	0x35
+
+/* TW: What is this ? */
+#define  Index_VI_SubPict_Buf_Preset_Low	0x36
+#define  Index_VI_SubPict_Buf_Preset_Middle	0x37
+
+/* TW: Subpicture pitch, unit=16 bytes */
+#define  Index_VI_SubPict_Buf_Pitch		0x38
+
+/* TW: Subpicture scaling control */
+#define  Index_VI_SubPict_Hor_Scale_Low		0x39
+#define  Index_VI_SubPict_Hor_Scale_High	0x3A
+#define  Index_VI_SubPict_Vert_Scale_Low	0x3B
+#define  Index_VI_SubPict_Vert_Scale_High	0x3C
+
+#define  Index_VI_SubPict_Scale_Control		0x3D
+/* (0x40 = enable/disable subpicture) */
+
+/* TW: Subpicture line buffer control */
+#define  Index_VI_SubPict_Threshold		0x3E
+
+/* TW: What is this? */
+#define  Index_VI_FIFO_Max			0x3F
+
+/* TW: Subpicture palette; 16 colors, total 32 bytes address space */
+#define  Index_VI_SubPict_Pal_Base_Low		0x40
+#define  Index_VI_SubPict_Pal_Base_High		0x41
+
+/* I wish I knew how to use these ... */
+#define  Index_MPEG_Read_Ctrl0                  0x60	/* MPEG auto flip */
+#define  Index_MPEG_Read_Ctrl1                  0x61	/* MPEG auto flip */
+#define  Index_MPEG_Read_Ctrl2                  0x62	/* MPEG auto flip */
+#define  Index_MPEG_Read_Ctrl3                  0x63	/* MPEG auto flip */
+
+/* TW: MPEG AutoFlip scale */
 #define  Index_MPEG_Ver_Up_Scale_Low            0x64
 #define  Index_MPEG_Ver_Up_Scale_High           0x65
 
+#define  Index_MPEG_Y_Buf_Preset_Low		0x66
+#define  Index_MPEG_Y_Buf_Preset_Middle		0x67
+#define  Index_MPEG_UV_Buf_Preset_Low		0x68
+#define  Index_MPEG_UV_Buf_Preset_Middle	0x69
+#define  Index_MPEG_Y_UV_Buf_Preset_High	0x6A
+
+/* TW: The following registers only exist on the 310/325 series */
+
+/* TW: Bit 16:24 of Y_U_V buf start address (?) */
+#define  Index_VI_Y_Buf_Start_Over		0x6B
+#define  Index_VI_U_Buf_Start_Over		0x6C
+#define  Index_VI_V_Buf_Start_Over		0x6D
+
+#define  Index_VI_Disp_Y_Buf_Pitch_High		0x6E
+#define  Index_VI_Disp_UV_Buf_Pitch_High	0x6F
+
+/* Hue and saturation */
+#define	 Index_VI_Hue				0x70
+#define  Index_VI_Saturation			0x71
+
+#define  Index_VI_SubPict_Start_Over		0x72
+#define  Index_VI_SubPict_Buf_Pitch_High	0x73
+
+#define  Index_VI_Control_Misc3			0x74
+
+
+/* TW: Bits (and helpers) for Index_VI_Control_Misc0 */
+#define  VI_Misc0_Enable_Overlay		0x02
+#define  VI_Misc0_420_Plane_Enable		0x04 /* Select Plane or Packed mode */
+#define  VI_Misc0_422_Enable			0x20 /* Select 422 or 411 mode */
+#define  VI_Misc0_Fmt_YVU420P			0x0C /* YUV420 Planar (I420, YV12) */
+#define  VI_Misc0_Fmt_YUYV			0x28 /* YUYV Packed (YUY2) */
+#define  VI_Misc0_Fmt_UYVY			0x08 /* (UYVY) */
+
+/* TW: Bits for Index_VI_Control_Misc1 */
+/* #define  VI_Misc1_?                          0x01  */
+#define  VI_Misc1_BOB_Enable			0x02
+#define	 VI_Misc1_Line_Merge			0x04
+#define  VI_Misc1_Field_Mode			0x08
+/* #define  VI_Misc1_?                          0x10  */
+#define  VI_Misc1_Non_Interleave                0x20 /* 300 series only? */
+#define  VI_Misc1_Buf_Addr_Lock			0x20 /* 310 series only? */
+/* #define  VI_Misc1_?                          0x40  */
+/* #define  VI_Misc1_?                          0x80  */
+
+/* TW: Bits for Index_VI_Control_Misc2 */
+#define  VI_Misc2_Select_Video2			0x01
+#define  VI_Misc2_Video2_On_Top			0x02
+/* #define  VI_Misc2_?                          0x04  */
+#define  VI_Misc2_Vertical_Interpol		0x08
+#define  VI_Misc2_Dual_Line_Merge               0x10
+#define  VI_Misc2_All_Line_Merge                0x20  /* 310 series only? */
+#define  VI_Misc2_Auto_Flip_Enable		0x40  /* 300 series only? */
+#define  VI_Misc2_Video_Reg_Write_Enable        0x80  /* 310 series only? */
+
+/* TW: Bits for Index_VI_Control_Misc3 */
+#define  VI_Misc3_Submit_Video_1		0x01  /* AKA "address ready" */
+#define  VI_Misc3_Submit_Video_2		0x02  /* AKA "address ready" */
+#define  VI_Misc3_Submit_SubPict		0x04  /* AKA "address ready" */
+
+/* TW: Values for Index_VI_Key_Overlay_OP (0x2F) */
+#define  VI_ROP_Never				0x00
+#define  VI_ROP_DestKey				0x03
+#define  VI_ROP_Always				0x0F
+
+
+/* video registers (6326 and 530/620) --------------- */
+#define  Index_VI6326_Passwd                        0x80
+
+/* Video overlay horizontal start/end, unit=screen pixels */
+#define  Index_VI6326_Win_Hor_Disp_Start_Low        0x81
+#define  Index_VI6326_Win_Hor_Disp_End_Low          0x82
+#define  Index_VI6326_Win_Hor_Over                  0x83 /* Overflow */
+
+/* Video overlay vertical start/end, unit=screen pixels */
+#define  Index_VI6326_Win_Ver_Disp_Start_Low        0x84
+#define  Index_VI6326_Win_Ver_Disp_End_Low          0x85
+#define  Index_VI6326_Win_Ver_Over                  0x86 /* Overflow */
+
+/* Y Plane (4:2:0) or YUV (4:2:2) buffer start address, unit=dword */
+#define  Index_VI6326_Disp_Y_Buf_Start_Low          0x8A
+#define  Index_VI6326_Disp_Y_Buf_Start_Middle       0x8B
+#define  Index_VI6326_Disp_Capt_Y_Buf_Start_High    0x89 /* 6326: 7:4 display, 3:0 capture */
+							 /* 530/620: 7:3 display. 2:0 reserved */
+/* End address of Y plane (in 16k unit) - 6326 ONLY */
+#define  Index_VI6326_Disp_Y_End                    0x8D
+
+/* U Plane (4:2:0) buffer start address, unit=dword */
+#define  Index_VI6326_U_Buf_Start_Low               0xB7
+#define  Index_VI6326_U_Buf_Start_Middle            0xB8
+
+/* V Plane (4:2:0) buffer start address, unit=dword */
+#define  Index_VI6326_V_Buf_Start_Low               0xBA
+#define  Index_VI6326_V_Buf_Start_Middle            0xBB
+
+/* U/V plane start address overflow bits 19:16 */
+#define  Index_VI6326_UV_Buf_Start_High             0xB9
+
+/* Pitch for Y, UV Planes, unit=dword(6326 & 530/620) */
+#define  Index_VI6326_Disp_Y_Buf_Pitch_Low          0x8C  /* 7:0 */
+#define  Index_VI6326_Disp_Y_Buf_Pitch_High         0x8E  /* 11:8 (3:0 here) */
+
+#define  Index_VI6326_Disp_UV_Buf_Pitch_Low         0xBC  /* 7:0 */
+#define  Index_VI6326_Disp_UV_Buf_Pitch_High        0xBD  /* 11:8 (3:0 here) */
+
+/* Scaling control registers */
+#define  Index_VI6326_Hor_Scale         	    0x92
+#define  Index_VI6326_Hor_Scale_Integer		    0x94
+#define  Index_VI6326_Ver_Scale	            	    0x93
+
+/* Playback line buffer control */
+#define  Index_VI6326_Play_Threshold_Low            0x9E
+#define  Index_VI6326_Play_Threshold_High           0x9F
+#define  Index_VI6326_Line_Buffer_Size              0xA0 /* 530 & 6326: quad-word */
+
+/* Destination color key */
+#define  Index_VI6326_Overlay_ColorKey_Red_Min      0x97
+#define  Index_VI6326_Overlay_ColorKey_Green_Min    0x96
+#define  Index_VI6326_Overlay_ColorKey_Blue_Min     0x95
+#define  Index_VI6326_Overlay_ColorKey_Red_Max      0xA3
+#define  Index_VI6326_Overlay_ColorKey_Green_Max    0xA2
+#define  Index_VI6326_Overlay_ColorKey_Blue_Max     0xA1
+
+/* Source color key */
+#define  Index_VI6326_Overlay_ChromaKey_Red_Y_Min   0x9C
+#define  Index_VI6326_Overlay_ChromaKey_Green_U_Min 0x9B
+#define  Index_VI6326_Overlay_ChromaKey_Blue_V_Min  0x9A
+#define  Index_VI6326_Overlay_ChromaKey_Red_Y_Max   0xA6
+#define  Index_VI6326_Overlay_ChromaKey_Green_U_Max 0xA5
+#define  Index_VI6326_Overlay_ChromaKey_Blue_V_Max  0xA4
+
+/* Contrast enhancement and brightness control */
+#define  Index_VI6326_Contrast_Factor               0xB3
+#define  Index_VI6326_Brightness                    0xB4
+#define  Index_VI6326_Contrast_Enh_Ctrl             0xB5
+
+/* Alpha (ALL 6326 only?) */
+#define  Index_VI6326_AlphaGraph                    0xA7
+#define  Index_VI6326_AlphaVideo                    0xA8
+
+#define  Index_VI6326_Key_Overlay_OP                0xA9
+
+#define  Index_VI6326_Control_Misc0                 0x98
+#define  Index_VI6326_Control_Misc1                 0x99  /* (Datasheet: 6326 ONLY - not correct?) */
+#define  Index_VI6326_Control_Misc3                 0x9D
+#define  Index_VI6326_Control_Misc4                 0xB6
+#define  Index_VI6326_VideoFormatSelect             Index_VI6326_Ver_Scale
+#define  Index_VI6326_Control_Misc5                 0xBE  /* (Datasheet: 530/620 ONLY - not correct) */
+#define  Index_VI6326_Control_Misc6                 0xB2  /* 5597 and 6326 only! */
+
+/* TW: What is this?  not a register, obviously */
+#define  Index_VI6326_FIFO_Max			    0x3F
+
+/* TW: Bits (and helpers) for Index_VI6326_Control_Misc0 */
+#define  VI6326_Misc0_EnableCapture		0x01  /* 1 = on, 0 = off (6326 only) */
+#define  VI6326_Misc0_EnableOverlay		0x02  /* 1 = on, 0 = off */
+#define  VI6326_Misc0_VideoOnly			0x10  /* 1 = video only, 0 = gfx + video */
+#define  VI6326_Misc0_CaptureInterlace		0x20  /* 1 = capture data is interlace, 0 = not (6326 only) */
+#define  VI6326_Misc0_VideoFormat		0x40  /* 1 = YUV, 0 = RGB */
+#define  VI6326_Misc0_FieldPolarity		0x80  /* 1 = *Odd / Even, 0 = Odd / *Even (6326 only) */
+
+/* TW: Bits for Index_VI6326_Control_Misc1 (ALL 6326 ONLY) */
+#define  VI6326_Misc1_EnableYUVCapture		0x01  /* 0 = RGB, 1 = YUV */
+#define  VI6326_Misc1_EnableCaptureDithering    0x02  /* 0 = disable, 1 = enable */
+#define  VI6326_Misc1_CaptureFormat555		0x04  /* 1 = 555, 0 = 565 */
+#define  VI6326_Misc1_FilterModeMask		0x38
+#define  VI6326_Misc1_FilterMode0		0x00  /* 1 */
+#define  VI6326_Misc1_FilterMode1		0x08  /* 1/8(1+3z^-1+3z^-2+z^-3)*/
+#define  VI6326_Misc1_FilterMode2		0x10  /* 1/4(1+2z^-1+z^-2) */
+#define  VI6326_Misc1_FilterMode3		0x18  /* 1/2(1+z^-1) */
+#define  VI6326_Misc1_FilterMode4		0x20  /* 1/8(1+2z^-1+2z^-2+2z^-3+z^-4) */
+#define  VI6326_Misc1_EnableVBSyncIRQ		0x40  /* 1 = Enable IRQ on vertical blank */
+#define  VI6326_Misc1_ClearVBSyncIRQ		0x80  /* Clear pending irq */
+
+/* TW: Bits for Index_VI6326_Control_Misc3 */
+#define  VI6326_Misc3_UVCaptureFormat		0x01  /* 1 = 2's complement, 0 = CCIR 601 (6326 only) */
+#define  VI6326_Misc3_UVOverlayFormat		0x02  /* 1 = 2's complement, 0 = CCIR 601 */
+#define  VI6326_Misc3_ChromaKeyFormat		0x04  /* 1 = YUV, 0 = RGB */
+#define  VI6326_Misc3_VMIAccess			0x08  /* 1 = enable, 0 = disable (6326 only) */
+#define  VI6326_Misc3_VMIEnable			0x10  /* 1 = enable, 0 = disable (6326 only) */
+#define  VI6326_Misc3_VMIIRQ			0x20  /* 1 = enable, 0 = disable (6326 only) */
+#define  VI6326_Misc3_BT819A			0x40  /* 1 = enable, 0 = disable (6326 only) */
+#define  VI6326_Misc3_SystemMemFB		0x80  /* 1 = enable, 0 = disable (6326 only) */
+
+/* TW: Bits for Index_VI6326_Control_Misc4 */
+#define  VI6326_Misc4_CPUVideoFormatMask	0x03
+#define  VI6326_Misc4_CPUVideoFormatRGB555      0x00
+#define  VI6326_Misc4_CPUVideoFormatYUV422      0x01
+#define  VI6326_Misc4_CPUVideoFormatRGB565      0x02
+#define  VI6326_Misc4_EnableYUV420		0x04  /* 1 = enable, 0 = disable */
+/** #define WHATISTHIS                          0x40  */
+
+/* TW: Bits for Index_VI6326_Control_Misc5 (all 530/620 only) */
+#define  VI6326_Misc5_LineBufferMerge           0x10  /* 0 = disable, 1=enable */
+#define  VI6326_Misc5_VPlaneBit20               0x04
+#define  VI6326_Misc5_UPlaneBit20               0x02
+
+/* TW: Bits for Index_VI6326_Control_Misc6  (5597 and 6326 only) */
+#define  VI6326_Misc6_Decimation                0x80  /* 0=disable 1=enable video decimation */
+
+/* Video format selection */
+#define  VI_6326_VideoUYVY422			0x00
+#define  VI_6326_VideoVYUY422                   0x40
+#define  VI_6326_VideoYUYV422                   0x80
+#define  VI_6326_VideoYVYU422                   0xC0
+#define  VI_6326_VideoRGB555                    0x00
+#define  VI_6326_VideoRGB565                    0x40
+
+/* TW: Values for Index_VI6326_Key_Overlay_OP */
+#define  VI6326_ROP_Never			0x00
+#define  VI6326_ROP_DestKey			0x03
+#define  VI6326_ROP_Always			0x0F
+
+/* --- end of 6326 video registers ---------------------------------- */
+
+/* TW register base (6326 only) */
+#define  Index_TV6326_TVOutIndex		    0xE0
+#define  Index_TV6326_TVOutData		    	    0xE1
+
 /*
-   CRT_2 function control register
+ *  CRT_2 function control register ---------------------------------
  */
 #define  Index_CRT2_FC_CONTROL                  0x00
 #define  Index_CRT2_FC_SCREEN_HIGH              0x04
@@ -393,6 +551,9 @@ extern int sisReg32MMIO[];
 #define  Index_CRT2_FC_VCount                   0x27
 #define  Index_CRT2_FC_VCount1                  0x28
 
+#define  Index_310_CRT2_FC_VR                   0x30  /* d[1] = vertical retrace */
+#define  Index_310_CRT2_FC_RT			0x33  /* d[7] = retrace in progress */
+
 /* video attributes - these should probably be configurable on the fly
  *                    so users with different desktop sizes can keep
  *                    captured data off the desktop
@@ -408,19 +569,8 @@ extern int sisReg32MMIO[];
 #define _VIN_FIELD_ODD                             2
 #define _VIN_FIELD_BOTH                            4
 
-#define vc_index_offset                         0x00
-#define vc_data_offset                          0x01
-#define vi_index_offset                         0x02
-#define vi_data_offset                          0x03
-#define crt2_index_offset                       0x04
-#define crt2_port_offset                        0x05
-#define sr_index_offset                         0x44
-#define sr_data_offset                          0x45
-#define cr_index_offset                         0x54
-#define cr_data_offset                          0x55
-#define input_stat                              0x5A
-
-/* i2c registers */
+
+/* i2c registers (TW; not on 300/310/325 series) */
 #define X_INDEXREG      0x14
 #define X_PORTREG       0x15
 #define X_DATA          0x0f
@@ -428,5 +578,10 @@ extern int sisReg32MMIO[];
 #define I2C_SDA         0x01
 #define I2C_DELAY       10
 
-/* mmio registers */
+/* mmio registers for video */
 #define REG_PRIM_CRT_COUNTER    0x8514
+
+/* TW: MPEG MMIO registers (630 and later) ----------------------------------------- */
+
+/* Not public (yet?) */
+
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_setup.c b/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_setup.c
index 85189ecd7..a26d19121 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_setup.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_setup.c
@@ -1,43 +1,48 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/sis_setup.c,v 1.9 2003/02/04 02:44:29 dawes Exp $ */
 /*
+ * Basic hardware and memory detection
+ *
  * Copyright 1998,1999 by Alan Hourihane, Wigan, England.
+ * Parts Copyright 2001, 2002 by Thomas Winischhofer, Vienna, Austria.
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
  * the above copyright notice appear in all copies and that both that
  * copyright notice and this permission notice appear in supporting
- * documentation, and that the name of Alan Hourihane not be used in
+ * documentation, and that the name of the copyright holder not be used in
  * advertising or publicity pertaining to distribution of the software without
- * specific, written prior permission.  Alan Hourihane makes no representations
+ * specific, written prior permission.  The copyright holder makes no representations
  * about the suitability of this software for any purpose.  It is provided
  * "as is" without express or implied warranty.
  *
- * ALAN HOURIHANE DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+ * THE COPYRIGHT HOLDER DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
  * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
- * EVENT SHALL ALAN HOURIHANE BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+ * EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY SPECIAL, INDIRECT OR
  * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
  * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  * PERFORMANCE OF THIS SOFTWARE.
  *
  * Authors:  Alan Hourihane, alanh@fairlite.demon.co.uk
- *           Mike Chapman <mike@paranoia.com>, 
+ *           Mike Chapman <mike@paranoia.com>,
  *           Juanjo Santamarta <santamarta@ctv.es>, 
- *           Mitani Hiroshi <hmitani@drl.mei.co.jp> 
- *           David Thomas <davtom@dream.org.uk>. 
+ *           Mitani Hiroshi <hmitani@drl.mei.co.jp>
+ *           David Thomas <davtom@dream.org.uk>.
+ *	     Thomas Winischhofer <thomas@winischhofer.net>
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/sis_setup.c,v 1.5 2001/04/19 12:40:33 alanh Exp $ */
-
-
+ 
+#include "xf86PciInfo.h"
+#include "xf86Pci.h"
+#include "xf86.h"
 #include "fb.h"
 #include "xf1bpp.h"
 #include "xf4bpp.h"
-#include "xf86.h"
 #include "xf86_OSproc.h"
 #include "xf86Resources.h"
 #include "xf86_ansic.h"
 #include "xf86Version.h"
-#include "xf86PciInfo.h"
-#include "xf86Pci.h"
+
+#include "xf86pciBus.h"
 #include "xf86cmap.h"
 
 #include "sis.h"
@@ -51,112 +56,473 @@
 #define DPMS_SERVER
 #include "extensions/dpms.h"
 
-static  char    *dramTypeStr[] = {
+static const char *dramTypeStr[] = {
         "Fast Page DRAM",
         "2 cycle EDO RAM",
         "1 cycle EDO RAM",
         "SDRAM/SGRAM",
         "SDRAM",
         "SGRAM",
-        "ESDRAM"
+        "ESDRAM",
+	"DDR RAM",  /* for 550/650 */
+	"DDR RAM",  /* for 550/650 */
         "" };
 
-static  int clockTable[4] = { 66, 75, 83, 100 };
+/* TW: MCLK tables for SiS6326 */
+static const int SiS6326MCLKIndex[4][8] = {
+       { 10, 12, 14, 16, 17, 18, 19,  7 },  /* SGRAM */
+       {  4,  6,  8, 10, 11, 12, 13,  3 },  /* Fast Page */
+       {  9, 11, 12, 13, 15, 16,  5,  7 },  /* 2 cycle EDO */
+       { 10, 12, 14, 16, 17, 18, 19,  7 }   /* ? (Not 1 cycle EDO) */
+};
 
-void SiSSetup(ScrnInfoPtr pScrn);
+static const struct _sis6326mclk {
+    CARD16 mclk;
+    unsigned char sr13;
+    unsigned char sr28;
+    unsigned char sr29;
+} SiS6326MCLK[] = {
+	{  0, 0,    0,    0 },
+	{  0, 0,    0,    0 },
+	{  0, 0,    0,    0 },
+	{ 45, 0, 0x2b, 0x26 },
+	{ 53, 0, 0x49, 0xe4 },
+	{ 55, 0, 0x7c, 0xe7 },
+	{ 56, 0, 0x7c, 0xe7 },
+	{ 60, 0, 0x42, 0xe3 },
+	{ 61, 0, 0x21, 0xe1 },
+	{ 65, 0, 0x5a, 0xe4 },
+	{ 66, 0, 0x5a, 0xe4 },
+	{ 70, 0, 0x61, 0xe4 },
+	{ 75, 0, 0x3e, 0xe2 },
+	{ 80, 0, 0x42, 0xe2 },
+	{ 83, 0, 0xb3, 0xc5 },
+	{ 85, 0, 0x5e, 0xe3 },
+	{ 90, 0, 0xae, 0xc4 },
+	{100, 0, 0x37, 0xe1 },
+	{115, 0, 0x78, 0x0e },
+	{134, 0, 0x4a, 0xa3 }
+};
 
+/* For 5597, 6326, 530/620 */
 static  void
-sisOldChipSetup(ScrnInfoPtr pScrn)
+sisOldSetup(ScrnInfoPtr pScrn)
 {
-    int ramsize[4] = {1024, 2048, 4096, 1024};
-
-    SISPTR(pScrn)->TurboQueue = FALSE;
-
-    outb(VGA_SEQ_INDEX, RAMSize);
-    pScrn->videoRam = ramsize[inb(VGA_SEQ_DATA) & 3];
-}
-
-static  void
-sis530Setup(ScrnInfoPtr pScrn)
-{
-    SISPtr      pSiS = SISPTR(pScrn);
-    int     ramsize[8] = { 1, 2, 4, 0, 0, 2, 4, 8};
-    int     buswidth[8] = { 0, 64, 64, 0, 0, 32, 32, 64 };
+    SISPtr  pSiS = SISPTR(pScrn);
+    int     ramsize[8]  = { 1,  2,  4, 0, 0,  2,  4,  8};
+    int     buswidth[8] = {32, 64, 64, 0, 0, 32, 32, 64 };
+    int     clockTable[4] = { 66, 75, 83, 100 };
+    int     ramtype[4]  = { 5, 0, 1, 3 };
     int     config;
-    int     temp;
-
-    if (pSiS->Chipset == PCI_CHIP_SIS5597) {
-        outb(VGA_SEQ_INDEX, FBSize);
-        pScrn->videoRam = ((inb(VGA_SEQ_DATA) & 7) + 1)*256;
-        outb(VGA_SEQ_INDEX, Mode64);
-        if (inb(VGA_SEQ_DATA) & 6)
-            pScrn->videoRam *= 2;
-    } else  {
-        outb(VGA_SEQ_INDEX, RAMSize);
-        temp = inb(VGA_SEQ_DATA);
+    int     temp, i;
+    unsigned char sr23, sr33, sr34, sr37;
+#if 0
+    unsigned char newsr13, newsr28, newsr29;
+#endif
+    pciConfigPtr pdptr, *systemPCIdevices = NULL;
+
+    if(pSiS->Chipset == PCI_CHIP_SIS5597) {
+        inSISIDXREG(SISSR, FBSize, temp);
+	pScrn->videoRam = ((temp & 0x07) + 1) * 256;
+	inSISIDXREG(SISSR, Mode64, temp);
+	if(temp & 0x06) {
+		pScrn->videoRam *= 2;
+		pSiS->BusWidth = 64;
+	} else  pSiS->BusWidth = 32;
+    } else {
+        inSISIDXREG(SISSR, RAMSize, temp);
         config = ((temp & 0x10) >> 2 ) | ((temp & 0x6) >> 1);
         pScrn->videoRam = ramsize[config] * 1024;
         pSiS->BusWidth = buswidth[config];
     }
 
-    if (pSiS->Chipset == PCI_CHIP_SIS530)  {
-        outb(VGA_SEQ_INDEX, 0x10);
-        pSiS->MemClock = clockTable[inb(VGA_SEQ_DATA) & 0x03] * 1000;
-        outb(VGA_SEQ_INDEX, 0x0d);
-        if (inb(VGA_SEQ_DATA) & 0x01)
-            pSiS->Flags |= UMA;
-    } else
+    if(pSiS->Chipset == PCI_CHIP_SIS530)  {
+
+        inSISIDXREG(SISSR, 0x0D, temp);
+	pSiS->Flags &= ~(UMA);
+	if(temp & 0x01) {
+		pSiS->Flags |= UMA;  		/* TW: Shared fb mode */
+        	inSISIDXREG(SISSR, 0x10, temp);
+        	pSiS->MemClock = clockTable[temp & 0x03] * 1000;
+	} else  pSiS->MemClock = SiSMclk(pSiS); /* TW: Local fb mode */
+
+    } else if(pSiS->Chipset == PCI_CHIP_SIS6326) {
+
+       inSISIDXREG(SISSR,0x0e,temp);
+       i = temp & 0x03;
+
+       xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+            "Detected DRAM type: %s\n",
+	    dramTypeStr[ramtype[i]]);
+
+       temp = (temp >> 5) & 0x07;
+       i = SiS6326MCLKIndex[i][temp];
+       pSiS->MemClock = SiS6326MCLK[i].mclk;
+#if 0
+       /* TW: Correct invalid MCLK settings by old BIOSes */
+       newsr13 = SiS6326MCLK[i].sr13;
+       newsr28 = SiS6326MCLK[i].sr28;
+       newsr29 = SiS6326MCLK[i].sr29;
+       if((pSiS->ChipRev == 0x92) ||
+          (pSiS->ChipRev == 0xd1) ||
+	  (pSiS->ChipRev == 0xd2)) {
+	  if(pSiS->MemClock == 60) {
+	     newsr28 = 0xae;
+	     newsr29 = 0xc4;
+	  }
+       }
+#endif
+       pSiS->MemClock *= 1000;
+#if 0
+       inSISIDXREG(SISSR, 0x13, temp);
+       temp &= 0x80;
+       temp |= (newsr13 & 0x80);
+       outSISIDXREG(SISSR,0x13,temp);
+       outSISIDXREG(SISSR,0x28,newsr28);
+       outSISIDXREG(SISSR,0x29,newsr29);
+#endif
+
+    } else {
+
         pSiS->MemClock = SiSMclk(pSiS);
 
+    }
+
+    pSiS->Flags &= ~(SYNCDRAM | RAMFLAG);
+    if(pSiS->oldChipset >= OC_SIS82204) {
+       inSISIDXREG(SISSR, 0x23, sr23);
+       inSISIDXREG(SISSR, 0x33, sr33);
+       inSISIDXREG(SISSR, 0x34, sr34);
+       if(sr33 & 0x09) {   	  			/* 5597: Sync DRAM timing | One cycle EDO ram;   */
+       		pSiS->Flags |= (sr33 & SYNCDRAM);	/* 6326: Enable SGRam timing | One cycle EDO ram */
+		pSiS->Flags |= RAMFLAG;			/* 530:  Enable SGRAM timing | reserved (0)      */
+       } else if(sr23 & 0x20) {   			/* 5597, 6326: EDO DRAM enabled */
+		pSiS->Flags |= SYNCDRAM;		/* 530/620:    reserved (0)     */
+       }
+    }
+
+    pSiS->Flags &= ~(ESS137xPRESENT);
+    if(pSiS->Chipset == PCI_CHIP_SIS530) {
+       if(pSiS->oldChipset == OC_SIS530A) {
+          if((systemPCIdevices = xf86GetPciConfigInfo())) {
+	      i = 0;
+              while((pdptr = systemPCIdevices[i])) {
+	         if((pdptr->pci_vendor == 0x1274) &&
+	            ((pdptr->pci_device == 0x5000) ||
+	  	     ((pdptr->pci_device & 0xFFF0) == 0x1370))) {
+		     pSiS->Flags |= ESS137xPRESENT;
+		     break;
+		 }
+		 i++;
+	      }
+	  }
+	  if(pSiS->Flags & ESS137xPRESENT) {
+	     xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+	         "SiS530/620: Found ESS device\n");
+	  }
+       }
+    }
+
+    pSiS->Flags &= ~(SECRETFLAG);
+    if(pSiS->oldChipset >= OC_SIS5597) {
+        inSISIDXREG(SISSR, 0x37, sr37);
+	if(sr37 & 0x80) pSiS->Flags |= SECRETFLAG;
+    }
+
+    pSiS->Flags &= ~(A6326REVAB);
+    if(pSiS->Chipset == PCI_CHIP_SIS6326) {
+       if(((pSiS->ChipRev & 0x0f) == 0x0a) ||
+          ((pSiS->ChipRev & 0x0f) == 0x0b)) {
+	    pSiS->Flags |= A6326REVAB;
+       }
+    }
+
     xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
-            "Detected memory clock : %3.3fMHz\n", pSiS->MemClock/1000.0);
+               "Detected memory clock: %3.3f MHz\n",
+	       pSiS->MemClock/1000.0);
+
+    xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+               "Detected DRAM bus width: %d bit\n",
+	       pSiS->BusWidth);
 }
 
 static  void
 sis300Setup(ScrnInfoPtr pScrn)
 {
-    SISPtr  pSiS = SISPTR(pScrn);
-    int     bus[4] = {32, 64, 128, 32};
+    SISPtr    pSiS = SISPTR(pScrn);
+    const int bus[4] = {32, 64, 128, 32};
+    const int adaptermclk[8]    = {  66,  83, 100, 133,
+                                    100, 100, 100, 100};
+    const int adaptermclk300[8] = { 125, 125, 125, 100,
+                                    100, 100, 100, 100};
     unsigned int    config;
+    unsigned char   temp;
+    int		    cpubuswidth;
+    int 	    from = X_PROBED;
 
     pSiS->MemClock = SiSMclk(pSiS);
 
-    outb(VGA_SEQ_INDEX, 0x14);
-    config = inb(VGA_SEQ_DATA);
+    inSISIDXREG(SISSR, 0x14, config);
     pScrn->videoRam = ((config & 0x3F) + 1) * 1024;
-    pSiS->BusWidth =bus[config >> 6];
+    cpubuswidth = bus[config >> 6];
+    
+    switch(pSiS->Chipset) {
+    case PCI_CHIP_SIS300:
+    	pSiS->BusWidth = cpubuswidth;
+	break;
+    case PCI_CHIP_SIS540:
+    	pSiS->BusWidth = 64;
+	from = X_INFO;
+	break;
+    case PCI_CHIP_SIS630:
+    	pSiS->BusWidth = 64;
+	from = X_INFO;
+	break;
+    default:
+        xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+		"Internal error: sis300setup() called with invalid chipset!\n");
+	pSiS->BusWidth = 64;
+	from = X_INFO;
+    }
 
-    outb(VGA_SEQ_INDEX, 0x3A);
-    config = inb(VGA_SEQ_DATA) & 3;
+    inSISIDXREG(SISSR, 0x3A, config);
+    config &= 0x03;
+    xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+            "Detected DRAM type: %s\n",
+	    dramTypeStr[config+4]);
 
     xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
-            "Detected DRAM type : %s\n", dramTypeStr[config+4]);
+            "Detected memory clock: %3.3f MHz\n",
+            pSiS->MemClock/1000.0);
+
+    if(pSiS->Chipset == PCI_CHIP_SIS300) {
+       if(pSiS->ChipRev > 0x13) {
+          inSISIDXREG(SISSR, 0x3A, temp);
+          xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+             "(Adapter assumes MCLK being %d Mhz)\n",
+	     adaptermclk300[(temp & 0x07)]);
+       }
+    } else {
+       inSISIDXREG(SISSR, 0x1A, temp);
+       xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+            "(Adapter assumes MCLK being %d Mhz)\n",
+	    adaptermclk[(temp & 0x07)]);
+    }
+    
+    xf86DrvMsg(pScrn->scrnIndex, from,
+            "%s DRAM bus width: %d bit\n",
+	    (from == X_PROBED) ? "Detected" : "Assuming",
+	    pSiS->BusWidth);
+}
+
+/* TW: for 315, 315H, 315PRO, 330 */
+static  void
+sis310Setup(ScrnInfoPtr pScrn)
+{
+    SISPtr  pSiS = SISPTR(pScrn);
+    int     busSDR[4]  = {64, 64, 128, 128};
+    int     busDDR[4]  = {32, 32,  64,  64};
+    int     busDDRA[4] = {64+32, 64+32 , (64+32)*2, (64+32)*2};
+    unsigned int config, config1, config2;
+    char    *dramTypeStr310[] = {
+        "Single Channel 1 rank SDR SDRAM",
+        "Single Channel 1 rank SDR SGRAM",
+        "Single Channel 1 rank DDR SDRAM",
+        "Single Channel 1 rank DDR SGRAM",
+        "Single Channel 2 rank SDR SDRAM",
+        "Single Channel 2 rank SDR SGRAM",
+        "Single Channel 2 rank DDR SDRAM",
+        "Single Channel 2 rank DDR SGRAM",
+	"Asymmetric SDR SDRAM",
+	"Asymmetric SDR SGRAM",
+	"Asymmetric DDR SDRAM",
+	"Asymmetric DDR SGRAM",
+	"Dual channel SDR SDRAM",
+	"Dual channel SDR SGRAM",
+	"Dual channel DDR SDRAM",
+	"Dual channel DDR SGRAM"};
+    char    *dramTypeStr330[] = {
+        "Single Channel SDR SDRAM",
+        "",
+        "Single Channel DDR SDRAM",
+        "",
+        "--unknown--",
+        "",
+        "--unknown--",
+        "",
+	"Asymetric Dual Channel SDR SDRAM",
+	"",
+	"Asymetric Dual Channel DDR SDRAM",
+	"",
+	"Dual channel SDR SDRAM",
+	"",
+	"Dual channel DDR SDRAM",
+	""};
+
+    inSISIDXREG(SISSR, 0x14, config);
+    config1 = (config & 0x0C) >> 2;
+    inSISIDXREG(SISSR, 0x3A, config2);
+    config2 &= 0x03;
+
+    pScrn->videoRam = (1 << ((config & 0xF0) >> 4)) * 1024;
+
+    if(pSiS->Chipset == PCI_CHIP_SIS330) {
+
+       if(config1) pScrn->videoRam <<= 1;
+
+    } else {
+
+       /* If SINGLE_CHANNEL_2_RANK or DUAL_CHANNEL_1_RANK -> mem * 2 */
+       if((config1 == 0x01) || (config1 == 0x03))
+           pScrn->videoRam <<= 1;
+
+       /* If DDR asymetric -> mem * 1,5 */
+       if(config1 == 0x02)
+           pScrn->videoRam += pScrn->videoRam/2;
+
+    }
+
+    pSiS->MemClock = SiSMclk(pSiS);
+
     xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
-            "Detected memory clock : %3.3fMHz\n",
+            "Detected DRAM type: %s\n",
+	    (pSiS->Chipset == PCI_CHIP_SIS330) ?
+	        dramTypeStr330[(config1 * 4) + (config2 & 0x02)] :
+	           dramTypeStr310[(config1 * 4) + config2]);
+
+    xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+            "Detected memory clock: %3.3f MHz\n",
             pSiS->MemClock/1000.0);
+
+    /* TW: DDR -> mclk * 2 - needed for bandwidth calculation */
+    if(pSiS->Chipset == PCI_CHIP_SIS330) {
+       if(config2 & 0x02) {
+       	  pSiS->MemClock *= 2;
+	  if(config1 == 0x02) {
+	     pSiS->BusWidth = busDDRA[0];
+	  } else {
+	     pSiS->BusWidth = busDDR[(config & 0x02)];
+	  }
+       } else {
+          if(config1 == 0x02) {
+	     pSiS->BusWidth = busDDRA[2];
+	  } else {
+             pSiS->BusWidth = busSDR[(config & 0x02)];
+	  }
+       }
+    } else {
+       if(config2 & 0x02) pSiS->MemClock *= 2;
+       if(config1 == 0x02)
+          pSiS->BusWidth = busDDRA[(config & 0x03)];
+       else if(config2 & 0x02)
+          pSiS->BusWidth = busDDR[(config & 0x03)];
+       else
+          pSiS->BusWidth = busSDR[(config & 0x03)];
+    }
+
     xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
-                        "Detected VRAM bus width is %d\n", pSiS->BusWidth);
+            "Detected DRAM bus width: %d bit\n",
+	    pSiS->BusWidth);
+}
+
+/* TW: for 550, 650, 740 */
+static  void
+sis550Setup(ScrnInfoPtr pScrn)
+{
+    SISPtr  pSiS = SISPTR(pScrn);
+    unsigned int    config;
+    CARD8	    pcimemcode;
+
+    /* TW: Some of the following is guessed; however,
+       since our mode switching code is omniscient
+       anyway, we only need some reasonable values
+       to prevent X from deleting modes from the
+       list
+     */
+
+    inSISIDXREG(SISSR, 0x14, config);
+
+    xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+            "Detected DRAM type: %s\n",
+	    dramTypeStr[(((config & 0x80) >> 7) << 2) + 4]);
+
+    pSiS->MemClock = SiSMclk(pSiS);
+
+    xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+            "Detected memory clock: %3.3f MHz\n",
+            pSiS->MemClock/1000.0);
+
+    /* TW: DDR -> Mclk * 2 - needed for bandwidth calculation */
+    if(config & 0x80) pSiS->MemClock *= 2;
+
+    pSiS->BusWidth = (config & 0x40) ? 128 : 64;
+
+    xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+            "Detected DRAM bus width: %d bit\n",
+	    pSiS->BusWidth);
+
+    pScrn->videoRam = (((config & 0x3F) + 1) * 4) * 1024;
+
+    /* TW: Some 550 BIOSes don't seem to set SR14 correctly. We have
+     * to read PCI configuration in order to get a correct size.
+     */
+    if (pSiS->Chipset == PCI_CHIP_SIS550) {
+      if((pScrn->videoRam != 4*1024) &&
+         (pScrn->videoRam != 8*1024) &&
+         (pScrn->videoRam != 16*1024) &&
+         (pScrn->videoRam != 24*1024) &&
+         (pScrn->videoRam != 32*1024) &&
+         (pScrn->videoRam != 48*1024) &&
+         (pScrn->videoRam != 64*1024) &&
+         (pScrn->videoRam != 96*1024) &&
+         (pScrn->videoRam != 128*1024) &&
+         (pScrn->videoRam != 256*1024)) {
+	xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+		"Invalid memory size (%d) encountered, reading PCI configuration\n",
+		pScrn->videoRam);
+	pcimemcode = pciReadByte(0x00000000, 0x63);
+	pScrn->videoRam = (1 << (((pcimemcode & 0x70) >> 4) + 21)) / 1024;
+	xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+		"PCI config reported %dKB video RAM\n", pScrn->videoRam);
+      }
+    }
 }
 
 void
 SiSSetup(ScrnInfoPtr pScrn)
 {
-    SISPTR(pScrn)->Flags = 0;
+    SISPtr pSiS = SISPTR(pScrn);
+
+    pSiS->Flags = 0;
+    pSiS->VBFlags = 0;
 
-    SISPTR(pScrn)->VBFlags = 0;
     switch  (SISPTR(pScrn)->Chipset)  {
     case    PCI_CHIP_SIS5597:
     case    PCI_CHIP_SIS6326:
     case    PCI_CHIP_SIS530:
-        sis530Setup(pScrn);
+        sisOldSetup(pScrn);
         break;
     case    PCI_CHIP_SIS300:
-    case    PCI_CHIP_SIS630:
+    case    PCI_CHIP_SIS630:  /* +730 */
     case    PCI_CHIP_SIS540:
         sis300Setup(pScrn);
         break;
+    case    PCI_CHIP_SIS315:
+    case    PCI_CHIP_SIS315H:
+    case    PCI_CHIP_SIS315PRO:
+    case    PCI_CHIP_SIS330:
+    	sis310Setup(pScrn);
+	break;
+    case    PCI_CHIP_SIS550:
+    case    PCI_CHIP_SIS650: /* + 740 */
+        sis550Setup(pScrn);
+	break;
     default:
-        sisOldChipSetup(pScrn);
+        xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+		"Internal error: SiSSetup() called with invalid Chipset (0x%x)\n",
+		pSiS->Chipset);
         break;
     }
 }
+
+
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_shadow.c b/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_shadow.c
index de5bda5ae..dfc920ec2 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_shadow.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_shadow.c
@@ -1,8 +1,11 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/sis_shadow.c,v 1.4 2003/01/29 15:42:17 eich Exp $ */
 /*
  *  Copyright (c) 1999,  The XFree86 Project Inc. 
  *  based on code written by Mark Vojkovich <markv@valinux.com>
+ *
+ *  TW: This module doesn't use CurrentLayout, because it is never
+ *      active when DGA is active and vice versa.
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/sis_shadow.c,v 1.2 2001/04/19 14:11:37 alanh Exp $ */
 
 #include "xf86.h"
 #include "xf86_OSproc.h"
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_vb.c b/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_vb.c
index 66019fd43..d8ed1144c 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_vb.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_vb.c
@@ -1,4 +1,30 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/sis_vb.c,v 1.7 2002/04/04 14:05:48 eich Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/sis_vb.c,v 1.10 2003/01/29 15:42:17 eich Exp $ */
+/*
+ * Video bridge detection and configuration for 300 and 310/325 series
+ *
+ * Copyright 2002 by Thomas Winischhofer, Vienna, Austria
+ *
+ * Permission to use, copy, modify, distribute, and sell this software and its
+ * documentation for any purpose is hereby granted without fee, provided that
+ * the above copyright notice appear in all copies and that both that
+ * copyright notice and this permission notice appear in supporting
+ * documentation, and that the name of Thomas Winischhofer not be used in
+ * advertising or publicity pertaining to distribution of the software without
+ * specific, written prior permission.  Thomas Winischhofer makes no representations
+ * about the suitability of this software for any purpose.  It is provided
+ * "as is" without express or implied warranty.
+ *
+ * THOMAS WINISCHHOFER DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+ * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+ * EVENT SHALL THOMAS WINISCHHOFER BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+ * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
+ * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ *
+ * Author: 	Thomas Winischhofer <thomas@winischhofer.net>
+ *		(Completely rewritten)
+ */
 
 #include "xf86.h"
 #include "xf86_ansic.h"
@@ -9,148 +35,319 @@
 #include "sis_regs.h"
 #include "sis_vb.h"
 
-/* TW: Detect CRT2-LCD and LCD size */
+static const SiS_LCD_StStruct SiS300_LCD_Type[]=
+{
+        { VB_LCD_1024x768, 1024,  768, LCD_1024x768,  1},  /* 0 - invalid */
+	{ VB_LCD_800x600,   800,  600, LCD_800x600,   0},  /* 1 */
+	{ VB_LCD_1024x768, 1024,  768, LCD_1024x768,  1},  /* 2 */
+	{ VB_LCD_1280x1024,1280, 1024, LCD_1280x1024, 2},  /* 3 */
+	{ VB_LCD_1280x960, 1280,  960, LCD_1280x960,  3},  /* 4 */
+	{ VB_LCD_640x480,   640,  480, LCD_640x480,   4},  /* 5 */
+	{ VB_LCD_1024x600, 1024,  600, LCD_1024x600, 10},  /* 6 */
+	{ VB_LCD_1152x768, 1152,  768, LCD_1152x768,  7},  /* 7 */
+	{ VB_LCD_320x480,   320,  480, LCD_320x480,   6},  /* 8 */
+	{ VB_LCD_1024x768, 1024,  768, LCD_1024x768,  1},  /* 9 */
+	{ VB_LCD_1024x768, 1024,  768, LCD_1024x768,  1},  /* a */
+	{ VB_LCD_1024x768, 1024,  768, LCD_1024x768,  1},  /* b */
+	{ VB_LCD_1024x768, 1024,  768, LCD_1024x768,  1},  /* c */
+	{ VB_LCD_1024x768, 1024,  768, LCD_1024x768,  1},  /* d */
+	{ VB_LCD_1024x768, 1024,  768, LCD_1024x768,  1},  /* e */
+	{ VB_LCD_1024x768, 1024,  768, LCD_1024x768,  1},  /* f */
+};
+
+static const SiS_LCD_StStruct SiS310_LCD_Type[]=
+{
+        { VB_LCD_1024x768,  1024, 768, LCD_1024x768,  1},  /* 0 - invalid */
+	{ VB_LCD_800x600,    800, 600, LCD_800x600,   0},  /* 1 */
+	{ VB_LCD_1024x768,  1024, 768, LCD_1024x768,  1},  /* 2 */
+	{ VB_LCD_1280x1024, 1280,1024, LCD_1280x1024, 2},  /* 3 */
+	{ VB_LCD_640x480,    640, 480, LCD_640x480,   4},  /* 4 */
+	{ VB_LCD_1024x600,  1024, 600, LCD_1024x600, 10},  /* 5 */
+	{ VB_LCD_1152x864,  1152, 864, LCD_1152x864, 11},  /* 6 */
+	{ VB_LCD_1280x960,  1280, 960, LCD_1280x960,  3},  /* 7 */
+	{ VB_LCD_1152x768,  1152, 768, LCD_1152x768,  7},  /* 8 */
+	{ VB_LCD_1400x1050, 1400,1050, LCD_1400x1050, 8},  /* 9 */
+	{ VB_LCD_1280x768,  1280, 768, LCD_1280x768,  9},  /* a */
+	{ VB_LCD_1600x1200, 1600,1200, LCD_1600x1200, 5},  /* b */
+	{ VB_LCD_320x480,    320, 480, LCD_320x480,   6},  /* c */
+	{ VB_LCD_1024x768,  1024, 768, LCD_1024x768,  1},  /* d */
+	{ VB_LCD_1024x768,  1024, 768, LCD_1024x768,  1},  /* e */
+	{ VB_LCD_1024x768,  1024, 768, LCD_1024x768,  1}   /* f */
+};
+
+static const char  *panelres[] = {
+	"800x600",
+	"1024x768",
+	"1280x1024",
+	"1280x960",
+	"640x480",
+	"1600x1200",
+	"320x480",
+	"1152x768",
+	"1400x1050",
+	"1280x768",
+	"1024x600",
+	"1152x864"
+};
+
+/* Detect CRT1 */
+void SISCRT1PreInit(ScrnInfoPtr pScrn)
+{
+    SISPtr  pSiS = SISPTR(pScrn);
+    unsigned char CR32, SR17;
+    unsigned char CRT1Detected = 0;
+    unsigned char OtherDevices = 0;
+
+    if(!(pSiS->VBFlags & VB_VIDEOBRIDGE)) {
+        pSiS->CRT1off = 0;
+        return;
+    }
+
+#ifdef SISDUALHEAD
+    if(pSiS->DualHeadMode && pSiS->SecondHead) {
+        pSiS->CRT1off = 0;
+    	return;
+    }
+#endif
+
+    inSISIDXREG(SISCR, 0x32, CR32);
+    inSISIDXREG(SISSR, 0x17, SR17);
+
+    if ( (pSiS->VGAEngine == SIS_300_VGA) &&
+         (pSiS->Chipset != PCI_CHIP_SIS300) &&
+         (SR17 & 0x0F) ) {
+
+        if(SR17 & 0x01)  CRT1Detected = 1;
+	if(SR17 & 0x0E)  OtherDevices = 1;
+
+    } else {
+
+        if(CR32 & 0x20)  CRT1Detected = 1;
+	if(CR32 & 0x5F)  OtherDevices = 1;
+
+    }
+
+    if(pSiS->CRT1off == -1) {
+            if(!CRT1Detected) {
+
+                /* BIOS detected no CRT1. */
+	        /* If other devices exist, switch it off */
+	        if(OtherDevices) pSiS->CRT1off = 1;
+		else             pSiS->CRT1off = 0;
+
+    	    } else {
+
+    	        /* BIOS detected CRT1, leave/switch it on */
+	        pSiS->CRT1off = 0;
+
+	    }
+    }
+
+    xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+    		"%sCRT1 connection detected\n",
+		CRT1Detected ? "" : "No ");
+}
+
+/* Detect CRT2-LCD and LCD size */
 void SISLCDPreInit(ScrnInfoPtr pScrn)
 {
     SISPtr  pSiS = SISPTR(pScrn);
-    int CR32, SR17, CR36;
+    unsigned char CR32, SR17, CR36, CR37;
+    USHORT textindex;
 
-    if (!(pSiS->VBFlags & VB_VIDEOBRIDGE))
+    if(!(pSiS->VBFlags & VB_VIDEOBRIDGE)) {
         return;
+    }
+
+    inSISIDXREG(SISCR, 0x32, CR32);
+    inSISIDXREG(SISSR, 0x17, SR17);
 
-    inSISIDXREG(pSiS->RelIO+CROFFSET, 0x32, CR32);
-    inSISIDXREG(pSiS->RelIO+SROFFSET, 0x17, SR17);
-
-    if ( (SR17 & 0x0F) && (pSiS->Chipset != PCI_CHIP_SIS300) ) {
-        if ( (SR17 & 0x01) && (!pSiS->CRT1off) )
-	     pSiS->CRT1off = 0;
-        else {
-	     if (SR17 & 0x0E)
-	         pSiS->CRT1off = 1;
-             else
-	         pSiS->CRT1off = 0;
-        }
-	if (SR17 & 0x02)
+    if( (pSiS->VGAEngine == SIS_300_VGA) &&
+        (pSiS->Chipset != PCI_CHIP_SIS300) &&
+	(SR17 & 0x0F) ) {
+	if(SR17 & 0x02)
 	   pSiS->VBFlags |= CRT2_LCD;
     } else {
-        if ( (CR32 & 0x20) && (!pSiS->CRT1off) )
-	     pSiS->CRT1off = 0;
-	else {
-	     if (CR32 & 0x5F)
-	         pSiS->CRT1off = 1;
-	     else
-	         pSiS->CRT1off = 0;
-	}
-    	if (CR32 & 0x08)
+    	if(CR32 & 0x08)
            pSiS->VBFlags |= CRT2_LCD;
     }
 
-    if (pSiS->VBFlags & CRT2_LCD) {
-        inSISIDXREG(pSiS->RelIO+CROFFSET, 0x36, CR36);
-        switch (CR36) {
-        case 1:
-            pSiS->VBFlags |= LCD_800x600;
-	    pSiS->LCDheight = 600;
-	    break;
-        case 2:
-            pSiS->VBFlags |= LCD_1024x768;
-	    pSiS->LCDheight = 768;
-	    break;
-        case 3:
-            pSiS->VBFlags |= LCD_1280x1024;
-	    pSiS->LCDheight = 1024;
-	    break;
-        case 4:
-            pSiS->VBFlags |= LCD_1280x960;  /* TW */
-	    pSiS->LCDheight = 960;
-	    break;
-        case 5:
-            pSiS->VBFlags |= LCD_640x480;   /* TW */
-	    pSiS->LCDheight = 480;
-	    break;
-        default:
-	    pSiS->VBFlags |= LCD_1024x768;  /* TW */
-	    pSiS->LCDheight = 768;
-	    break;
-        }
+    if(pSiS->VBFlags & CRT2_LCD) {
+        inSISIDXREG(SISCR, 0x36, CR36);
+	inSISIDXREG(SISCR, 0x37, CR37);
+	if((pSiS->VGAEngine == SIS_315_VGA) && (!CR36)) {
+	    /* TW: Old 650/301LV BIOS version "forgot" to set CR36, CR37 */
+	    xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+	       "BIOS-provided LCD information invalid, probing myself...\n");
+	    if(pSiS->VBFlags & VB_LVDS) pSiS->SiS_Pr->SiS_IF_DEF_LVDS = 1;
+	    else pSiS->SiS_Pr->SiS_IF_DEF_LVDS = 0;
+	    SiS_GetPanelID(pSiS->SiS_Pr, &pSiS->sishw_ext);
+	    inSISIDXREG(SISCR, 0x36, CR36);
+	    inSISIDXREG(SISCR, 0x37, CR37);
+	}
+	if(pSiS->VGAEngine == SIS_300_VGA) {
+	    pSiS->VBLCDFlags |= SiS300_LCD_Type[(CR36 & 0x0f)].VBLCD_lcdflag;
+            pSiS->LCDheight = SiS300_LCD_Type[(CR36 & 0x0f)].LCDheight;
+	    pSiS->LCDwidth = SiS300_LCD_Type[(CR36 & 0x0f)].LCDwidth;
+            pSiS->sishw_ext.ulCRT2LCDType = SiS300_LCD_Type[(CR36 & 0x0f)].LCDtype;
+	    textindex = SiS300_LCD_Type[(CR36 & 0x0f)].LCDrestextindex;
+	} else {
+	    pSiS->VBLCDFlags |= SiS310_LCD_Type[(CR36 & 0x0f)].VBLCD_lcdflag;
+            pSiS->LCDheight = SiS310_LCD_Type[(CR36 & 0x0f)].LCDheight;
+	    pSiS->LCDwidth = SiS310_LCD_Type[(CR36 & 0x0f)].LCDwidth;
+            pSiS->sishw_ext.ulCRT2LCDType = SiS310_LCD_Type[(CR36 & 0x0f)].LCDtype;
+	    textindex = SiS310_LCD_Type[(CR36 & 0x0f)].LCDrestextindex;
+	}
+	xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+			"Detected LCD panel resolution %s (type %d, %s%s)\n",
+			panelres[textindex],
+			(pSiS->VGAEngine == SIS_315_VGA) ? ((CR36 & 0x0f) - 1) : ((CR36 & 0xf0) >> 4),
+			(pSiS->VBFlags & VB_LVDS) ?
+			      (CR37 & 0x10 ? "non-expanding, " : "expanding, ") :
+			      ( ((pSiS->VBFlags & VB_301B) && (pSiS->VGAEngine == SIS_300_VGA)) ?
+			            (CR37 & 0x10 ? "non-expanding, " : "expanding, ") :
+			            (CR37 & 0x10 ? "self-scaling, " : "non-self-scaling, ") ),
+			CR37 & 0x01 ? "RGB18" : "RGB24");
     }
 }
 
-/* TW: Detect CRT2-TV connector type and PAL/NTSC flag */
+/* Detect CRT2-TV connector type and PAL/NTSC flag */
 void SISTVPreInit(ScrnInfoPtr pScrn)
 {
     SISPtr  pSiS = SISPTR(pScrn);
-    int CR32, CR38, SR16, SR17;
+    unsigned char SR16, SR17, SR38, CR32, CR38=0, CR79;
+    int temp = 0;
 
-    if (!(pSiS->VBFlags & VB_VIDEOBRIDGE))
+    if(!(pSiS->VBFlags & VB_VIDEOBRIDGE))
         return;
 
-    inSISIDXREG(pSiS->RelIO+CROFFSET, 0x32, CR32);
-    inSISIDXREG(pSiS->RelIO+SROFFSET, 0x17, SR17);
+    inSISIDXREG(SISCR, 0x32, CR32);
+    inSISIDXREG(SISSR, 0x17, SR17);
+    inSISIDXREG(SISSR, 0x16, SR16);
+    inSISIDXREG(SISSR, 0x38, SR38);
+    switch(pSiS->VGAEngine) {
+    case SIS_300_VGA: 
+       if(pSiS->Chipset != PCI_CHIP_SIS300) temp = 0x35;
+       break;
+    case SIS_315_VGA:
+       temp = 0x38;
+       break;
+    }
+    if(temp) {
+       inSISIDXREG(SISCR, temp, CR38);
+    }
 
-    if ( (SR17 & 0x0F) && (pSiS->Chipset != PCI_CHIP_SIS300) ) {
-        if (SR17 & 0x04) /* { */ /* TW: Determine TV type even if not using TV output */
-	    pSiS->VBFlags |= CRT2_TV;
+#ifdef TWDEBUG
+    xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "(vb.c: SR17=%02x CR32=%02x)\n", SR17, CR32);
+    xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "(vb.c: SR16=%02x SR38=%02x)\n", SR16, SR38);
+#endif
+
+    if( (pSiS->VGAEngine == SIS_300_VGA) &&
+        (pSiS->Chipset != PCI_CHIP_SIS300) &&
+        (SR17 & 0x0F) ) {
 
-	    if (SR17 & 0x20)
+        if(SR17 & 0x04)
+	    	pSiS->VBFlags |= CRT2_TV;
+
+	if(SR17 & 0x20)
 	        pSiS->VBFlags |= TV_SVIDEO;
-            else if (SR17 & 0x10)
+        else if (SR17 & 0x10)
 	        pSiS->VBFlags |= TV_AVIDEO;
-            inSISIDXREG(pSiS->RelIO+SROFFSET, 0x16, SR16);
-	    if (SR16 & 0x20)
-	        pSiS->VBFlags |= TV_PAL;
-            else
+
+	if(pSiS->VBFlags & (TV_SVIDEO | TV_AVIDEO)) {
+	   if(SR16 & 0x20)
+	     	pSiS->VBFlags |= TV_PAL;
+           else
 	        pSiS->VBFlags |= TV_NTSC;
-     /* } */
+	}
+
     } else {
-        if (CR32 & 0x47) /* { */
-	    pSiS->VBFlags |= CRT2_TV;
-            if (CR32 & 0x04)
-                pSiS->VBFlags |= TV_SCART;
-            else if (CR32 & 0x02)
+
+        if(CR32 & 0x47)
+	    	pSiS->VBFlags |= CRT2_TV;
+
+     	if(CR32 & 0x04)
+            	pSiS->VBFlags |= TV_SCART;
+      	else if(CR32 & 0x02)
                 pSiS->VBFlags |= TV_SVIDEO;
-            else if (CR32 & 0x01)
+        else if(CR32 & 0x01)
                 pSiS->VBFlags |= TV_AVIDEO;
-            else if (CR32 & 0x40)
+        else if(CR32 & 0x40)
                 pSiS->VBFlags |= (TV_SVIDEO | TV_HIVISION);
-            inSISIDXREG(pSiS->RelIO+SROFFSET, 0x38, CR38);
-	    if (CR38 & 0x01)
-                pSiS->VBFlags |= TV_PAL;
-            else
-	        pSiS->VBFlags |= TV_NTSC;
-      /* } */
+	else if((CR38 & 0x04) && (pSiS->VBFlags & VB_CHRONTEL)) 
+		pSiS->VBFlags |= (TV_CHSCART | TV_PAL);
+	else if((CR38 & 0x08) && (pSiS->VBFlags & VB_CHRONTEL))
+		pSiS->VBFlags |= (TV_CHHDTV | TV_NTSC);
+	        
+	if(pSiS->VBFlags & (TV_SCART | TV_SVIDEO | TV_AVIDEO | TV_HIVISION)) {
+	   if( (pSiS->Chipset == PCI_CHIP_SIS550) ||   /* TW: ? */
+	       (pSiS->Chipset == PCI_CHIP_SIS650) ) {
+	      inSISIDXREG(SISCR, 0x79, CR79);
+	      if(CR79 & 0x20) {
+                  pSiS->VBFlags |= TV_PAL;
+		  if(CR38 & 0x40)      pSiS->VBFlags |= TV_PALM;
+		  else if(CR38 & 0x80) pSiS->VBFlags |= TV_PALN;
+ 	      } else
+	          pSiS->VBFlags |= TV_NTSC;
+	   } else if(pSiS->VGAEngine == SIS_300_VGA) {
+	      /* TW: Should be SR38 here as well, but this
+	       *     does not work. Looks like a BIOS bug (2.04.5c).
+	       */
+	      if(SR16 & 0x20)
+	     	  pSiS->VBFlags |= TV_PAL;
+              else
+	          pSiS->VBFlags |= TV_NTSC;
+	   } else {	/* 315, 330 */
+	      if(SR38 & 0x01) {
+                  pSiS->VBFlags |= TV_PAL;
+		  if(CR38 & 0x40)      pSiS->VBFlags |= TV_PALM;
+		  else if(CR38 & 0x80) pSiS->VBFlags |= TV_PALN;
+ 	      } else
+	          pSiS->VBFlags |= TV_NTSC;
+	   }
+	}
+    }
+    if(pSiS->VBFlags & (TV_SCART | TV_SVIDEO | TV_AVIDEO | TV_HIVISION | TV_CHSCART | TV_CHHDTV)) {
+       xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+			"%sTV standard %s\n",
+			(pSiS->VBFlags & (TV_CHSCART | TV_CHHDTV)) ? "Using " : "Detected default ",
+			(pSiS->VBFlags & TV_NTSC) ? 
+			   ((pSiS->VBFlags & TV_CHHDTV) ? "480i HDTV" : "NTSC") :
+			   ((pSiS->VBFlags & TV_PALM) ? "PALM" :
+			   	((pSiS->VBFlags & TV_PALN) ? "PALN" : "PAL")));
     }
-
-/* TW: This is old code: */
-
-    /* TW: Reading PAL/NTSC flag from 0x31 is not a good idea. We'd
-     *     better read this from POWER_ON_TRAP (0x38) some day. */
-#if 0
-    inSISIDXREG(pSiS->RelIO+CROFFSET, 0x31, temp);
-    if (temp & 0x01)
-        pSiS->VBFlags |= TV_PAL;
-    else
-        pSiS->VBFlags |= TV_NTSC;
-#endif
 }
 
-/* TW: Detect CRT2-VGA */
+/* Detect CRT2-VGA */
 void SISCRT2PreInit(ScrnInfoPtr pScrn)
 {
     SISPtr  pSiS = SISPTR(pScrn);
-    int SR17, CR32;
+    unsigned char SR17, CR32;
 
     if (!(pSiS->VBFlags & VB_VIDEOBRIDGE))
         return;
 
-    inSISIDXREG(pSiS->RelIO+CROFFSET, 0x32, CR32);
-    inSISIDXREG(pSiS->RelIO+SROFFSET, 0x17, SR17);
+    /* CRT2-VGA not supported on LVDS and 30xLV(X) */
+    if (pSiS->VBFlags & (VB_LVDS|VB_30xLV|VB_30xLVX))
+        return;
 
-    if ( (SR17 & 0x0F) && (pSiS->Chipset != PCI_CHIP_SIS300) ) {
-         if (SR17 & 0x08)
+    inSISIDXREG(SISCR, 0x32, CR32);
+    inSISIDXREG(SISSR, 0x17, SR17);
+
+    if( (pSiS->VGAEngine == SIS_300_VGA) &&
+        (pSiS->Chipset != PCI_CHIP_SIS300) &&
+	(SR17 & 0x0F) ) {
+
+	 if(SR17 & 0x08)
 	     pSiS->VBFlags |= CRT2_VGA;
+
     } else {
-         if (CR32 & 0x10)
+
+         if(CR32 & 0x10)
              pSiS->VBFlags |= CRT2_VGA;
+	     
     }
 }
+
+
+
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_vb.h b/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_vb.h
index b78af5477..4419ccf39 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_vb.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_vb.h
@@ -1,33 +1,43 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/sis_vb.h,v 1.5 2002/01/17 09:57:30 eich Exp $ */
-
-/* CR30 VBInfo = CR31:CR30 */
-#define SET_SIMU_SCAN_MODE  0x0001
-#define SWITCH_TO_CRT2      0x0002
-#define SET_CRT2_TO_AVIDEO  0x0004      /* Composite */
-#define SET_CRT2_TO_SVIDEO  0x0008
-#define SET_CRT2_TO_SCART   0x0010
-#define SET_CRT2_TO_LCD     0x0020
-#define SET_CRT2_TO_RAMDAC  0x0040
-#define SET_CRT2_TO_HIVISION_TV 0x0080
-#define SET_CRT2_TO_TV      (SET_CRT2_TO_AVIDEO | SET_CRT2_TO_SVIDEO | \
-                SET_CRT2_TO_SCART | SET_CRT2_TO_HIVISION_TV)
-/* CR31 */
-#define SET_PAL_TV          0x0100
-#define SET_IN_SLAVE_MODE   0x0200
-#define SET_NO_SIMU_ON_LOCK 0x0400
-#define SET_NO_SIMU_TV_ON_LOCK          SET_NO_SIMU_ON_LOCK
-#define DISABLE_LOAD_CRT2DAC    0x1000
-#define DISABLE_CRT2_DISPLAY    0x2000
-#define DRIVER_MODE         0x4000  
-
-typedef struct  _SiS301Reg  {
-    CARD8   *VBPart1;
-    CARD8   *VBPart2;
-    CARD8   *VBPart3;
-    CARD8   *VBPart4;
-} SiS301RegRec, SiS301RegPtr;
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/sis_vb.h,v 1.7 2003/01/29 15:42:17 eich Exp $ */
+/*
+ * Video bridge detection and configuration for 300 and 310/325 series
+ *
+ * Copyright 2002 by Thomas Winischhofer, Vienna, Austria
+ *
+ * Permission to use, copy, modify, distribute, and sell this software and its
+ * documentation for any purpose is hereby granted without fee, provided that
+ * the above copyright notice appear in all copies and that both that
+ * copyright notice and this permission notice appear in supporting
+ * documentation, and that the name of Thomas Winischhofer not be used in
+ * advertising or publicity pertaining to distribution of the software without
+ * specific, written prior permission.  Thomas Winischhofer makes no representations
+ * about the suitability of this software for any purpose.  It is provided
+ * "as is" without express or implied warranty.
+ *
+ * THOMAS WINISCHHOFER DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+ * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+ * EVENT SHALL THOMAS WINISCHHOFER BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+ * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
+ * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ *
+ * Author: 	Thomas Winischhofer <thomas@winischhofer.net>
+ *		(Completely rewritten)
+ */
 
+typedef struct _SiS_LCD_StStruct
+{
+	ULONG VBLCD_lcdflag;
+	USHORT LCDwidth;
+	USHORT LCDheight;
+	USHORT LCDtype;
+	UCHAR  LCDrestextindex;
+} SiS_LCD_StStruct;
 
+void SISCRT1PreInit(ScrnInfoPtr pScrn);
 void SISLCDPreInit(ScrnInfoPtr pScrn);
 void SISTVPreInit(ScrnInfoPtr pScrn);
 void SISCRT2PreInit(ScrnInfoPtr pScrn);
+
+extern BOOLEAN SiS_GetPanelID(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension);
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_vga.c b/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_vga.c
index 129a6d030..0ab8b8d71 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_vga.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_vga.c
@@ -1,19 +1,23 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/sis_vga.c,v 1.16 2003/01/29 15:42:17 eich Exp $ */
 /*
+ * Mode setup and video bridge detection
+ *
  * Copyright 1998,1999 by Alan Hourihane, Wigan, England.
+ * Parts Copyright 2001, 2002 by Thomas Winischhofer, Vienna, Austria.
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
  * the above copyright notice appear in all copies and that both that
  * copyright notice and this permission notice appear in supporting
- * documentation, and that the name of Alan Hourihane not be used in
+ * documentation, and that the name of the copyright holder not be used in
  * advertising or publicity pertaining to distribution of the software without
- * specific, written prior permission.  Alan Hourihane makes no representations
+ * specific, written prior permission.  The copyright holder makes no representations
  * about the suitability of this software for any purpose.  It is provided
  * "as is" without express or implied warranty.
  *
- * ALAN HOURIHANE DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+ * THE COPYRIGHT HOLDER DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
  * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
- * EVENT SHALL ALAN HOURIHANE BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+ * EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY SPECIAL, INDIRECT OR
  * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
  * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
@@ -21,11 +25,11 @@
  *
  * Authors:  Alan Hourihane, alanh@fairlite.demon.co.uk
  *           Mike Chapman <mike@paranoia.com>, 
- *           Juanjo Santamarta <santamarta@ctv.es>, 
+ *           Juanjo Santamarta <santamarta@ctv.es>,
  *           Mitani Hiroshi <hmitani@drl.mei.co.jp> 
- *           David Thomas <davtom@dream.org.uk>. 
+ *           David Thomas <davtom@dream.org.uk>.
+ *	     Thomas Winischhofer <thomas@winischhofer.net>
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/sis_vga.c,v 1.13 2002/04/04 14:05:48 eich Exp $ */
 
 #include "xf86.h"
 #include "xf86_OSproc.h"
@@ -38,651 +42,1494 @@
 #include "sis_regs.h"
 #include "sis_dac.h"
 
-#define Midx    0
-#define Nidx    1
-#define VLDidx  2
-#define Pidx    3
-#define PSNidx  4
-#define Fref 14318180
-/* stability constraints for internal VCO -- MAX_VCO also determines 
+#define Midx         0
+#define Nidx         1
+#define VLDidx       2
+#define Pidx         3
+#define PSNidx       4
+#define Fref         14318180
+/* stability constraints for internal VCO -- MAX_VCO also determines
  * the maximum Video pixel clock */
-#define MIN_VCO Fref
-#define MAX_VCO 135000000
+#define MIN_VCO      Fref
+#define MAX_VCO      135000000
 #define MAX_VCO_5597 353000000
-#define MAX_PSN 0 /* no pre scaler for this chip */
-#define TOLERANCE 0.01  /* search smallest M and N in this tolerance */
-
-
-void SISVGAPreInit(ScrnInfoPtr pScrn);
-static  Bool    SISInit(ScrnInfoPtr pScrn, DisplayModePtr mode);
-static  Bool    SIS300Init(ScrnInfoPtr pScrn, DisplayModePtr mode);
-
+#define MAX_PSN      0         /* no pre scaler for this chip */
+#define TOLERANCE    0.01      /* search smallest M and N in this tolerance */
+
+
+static Bool  SISInit(ScrnInfoPtr pScrn, DisplayModePtr mode);
+static Bool  SIS300Init(ScrnInfoPtr pScrn, DisplayModePtr mode);
+/* TW: To be used internally only */
+int    SISDoSense(ScrnInfoPtr pScrn, int tempbl, int tempbh, int tempcl, int tempch);
+void   SISSense30x(ScrnInfoPtr pScrn);
+int    SIS6326DoSense(ScrnInfoPtr pScrn, int tempbh, int tempbl, int tempch, int tempcl);
+void   SISSense6326(ScrnInfoPtr pScrn);
+static void SiS6326TVDelay(ScrnInfoPtr pScrn, int delay);
+
+const CARD8 SiS6326TVRegs1_NTSC[6][14] = {
+    {0x81,0x3f,0x49,0x1b,0xa9,0x03,0x00,0x09,0x08,0x7d,0x00,0x88,0x30,0x60},
+    {0x81,0x3f,0x49,0x1d,0xa0,0x03,0x00,0x09,0x08,0x7d,0x00,0x88,0x30,0x60},
+    {0x81,0x45,0x24,0x8e,0x26,0x0b,0x00,0x09,0x02,0xfe,0x00,0x09,0x51,0x60},
+    {0x81,0x45,0x24,0x8e,0x26,0x07,0x00,0x29,0x04,0x30,0x10,0x3b,0x61,0x60},
+    {0x81,0x3f,0x24,0x8e,0x26,0x09,0x00,0x09,0x02,0x30,0x10,0x3b,0x51,0x60},
+    {0x83,0x5d,0x21,0xbe,0x75,0x03,0x00,0x09,0x08,0x42,0x10,0x4d,0x61,0x79}   /* 640x480u */
+};
+
+const CARD8 SiS6326TVRegs2_NTSC[6][54] = {
+    {0x11, 0x17, 0x03, 0x09, 0x94, 0x02, 0x05, 0x06, 0x09, 0x50, 0x0C,
+     0x0C, 0x06, 0x0D, 0x04, 0x0A, 0x94, 0x06, 0x0D, 0x04, 0x0A, 0x94,
+     0xFC, 0xDF, 0x94, 0x1F, 0x4A, 0x03, 0x71, 0x07, 0x97, 0x10, 0x40,
+     0x48, 0x00, 0x26, 0xB6, 0x10, 0x5C, 0xEC, 0x21, 0x2E, 0xBE, 0x10,
+     0x64, 0xF4, 0x21, 0x13, 0x75, 0x08, 0x31, 0x6A, 0x01, 0xA0},
+    {0x11, 0x17, 0x03, 0x0A, 0x94, 0x02, 0x05, 0x06, 0x09, 0x50, 0x0C,
+     0x0D, 0x06, 0x0D, 0x04, 0x0A, 0x94, 0x06, 0x0D, 0x04, 0x0A, 0x94,
+     0xFF, 0xDF, 0x94, 0x1F, 0x4A, 0x03, 0x71, 0x07, 0x97, 0x10, 0x40,
+     0x48, 0x00, 0x26, 0xB6, 0x10, 0x5C, 0xEC, 0x21, 0x2E, 0xBE, 0x10,
+     0x64, 0xF4, 0x21, 0x13, 0x75, 0x08, 0x31, 0x6A, 0x01, 0xA0},
+    {0x11, 0x17, 0x03, 0x0A, 0x94, 0x02, 0x05, 0x06, 0x09, 0x50, 0x0C,
+     0x0D, 0x06, 0x0D, 0x04, 0x0A, 0x94, 0x06, 0x0D, 0x04, 0x0A, 0x94,
+     0xFF, 0xDF, 0x94, 0x3F, 0x8C, 0x06, 0xCE, 0x07, 0x27, 0x30, 0x73,
+     0x7B, 0x00, 0x48, 0x68, 0x30, 0xB2, 0xD2, 0x52, 0x50, 0x70, 0x30,
+     0xBA, 0xDA, 0x52, 0xDC, 0x02, 0xD1, 0x53, 0xF7, 0x02, 0xA0},
+    {0x11, 0x17, 0x03, 0x09, 0x94, 0x02, 0x05, 0x06, 0x09, 0x50, 0x0C,
+     0x0C, 0x06, 0x0D, 0x04, 0x0A, 0x94, 0x06, 0x0D, 0x04, 0x0A, 0x94,
+     0xDC, 0xDF, 0x94, 0x3F, 0x8C, 0x06, 0xCE, 0x07, 0x27, 0x30, 0x73,
+     0x7B, 0x00, 0x48, 0x68, 0x30, 0xB2, 0xD2, 0x52, 0x50, 0x70, 0x30,
+     0xBA, 0xDA, 0x52, 0x00, 0x02, 0xF5, 0x53, 0xF7, 0x02, 0xA0},
+    {0x11, 0x17, 0x03, 0x09, 0x94, 0x02, 0x05, 0x06, 0x09, 0x50, 0x0C,
+     0x0C, 0x06, 0x0D, 0x04, 0x0A, 0x94, 0x06, 0x0D, 0x04, 0x0A, 0x94,
+     0xDC, 0xDF, 0x94, 0x3F, 0x8C, 0x06, 0xCE, 0x07, 0x27, 0x30, 0x73,
+     0x7B, 0x00, 0x48, 0x68, 0x30, 0xB2, 0xD2, 0x52, 0x50, 0x70, 0x30,
+     0xBA, 0xDA, 0x52, 0xDC, 0x02, 0xD1, 0x53, 0xF7, 0x02, 0xA0},
+    {0x11, 0x17, 0x03, 0x09, 0x94, 0x02, 0x05, 0x06, 0x09, 0x50, 0x0C,  /* 640x480u */
+     0x0C, 0x06, 0x0D, 0x04, 0x0A, 0x94, 0x06, 0x0D, 0x04, 0x0A, 0x94,
+     0xDC, 0xDF, 0x94, 0xAF, 0x95, 0x06, 0xDD, 0x07, 0x5F, 0x30, 0x7E,
+     0x86, 0x00, 0x4C, 0xA4, 0x30, 0xE3, 0x3B, 0x62, 0x54, 0xAC, 0x30,
+     0xEB, 0x43, 0x62, 0x48, 0x34, 0x3D, 0x63, 0x29, 0x03, 0xA0}
+};
+
+const CARD8 SiS6326TVRegs1_PAL[6][14] = {
+    {0x81,0x2d,0xc8,0x07,0xb2,0x0b,0x00,0x09,0x02,0xed,0x00,0xf8,0x30,0x40},
+    {0x80,0x2d,0xa4,0x03,0xd9,0x0b,0x00,0x09,0x02,0xed,0x10,0xf8,0x71,0x40},
+    {0x81,0x2d,0xa4,0x03,0xd9,0x0b,0x00,0x09,0x02,0xed,0x10,0xf8,0x71,0x40},
+    {0x81,0x2d,0xa4,0x03,0xd9,0x0b,0x00,0x09,0x02,0x8f,0x10,0x9a,0x71,0x40},
+    {0x83,0x63,0xa1,0x7a,0xa3,0x0a,0x00,0x09,0x02,0xb5,0x11,0xc0,0x81,0x59},  /* 800x600u */
+    {0x81,0x63,0xa4,0x03,0xd9,0x01,0x00,0x09,0x10,0x9f,0x10,0xaa,0x71,0x59}   /* 720x540  */
+};
+
+const CARD8 SiS6326TVRegs2_PAL[6][54] = {
+    {0x15, 0x4E, 0x35, 0x6E, 0x94, 0x02, 0x04, 0x38, 0x3A, 0x50, 0x3D,
+     0x70, 0x06, 0x3E, 0x35, 0x6D, 0x94, 0x05, 0x3F, 0x36, 0x6E, 0x94,
+     0xE5, 0xDF, 0x94, 0xEF, 0x5A, 0x03, 0x7F, 0x07, 0xFF, 0x10, 0x4E,
+     0x56, 0x00, 0x2B, 0x23, 0x20, 0xB4, 0xAC, 0x31, 0x33, 0x2B, 0x20,
+     0xBC, 0xB4, 0x31, 0x83, 0xE1, 0x78, 0x31, 0xD6, 0x01, 0xA0},
+    {0x15, 0x4E, 0x35, 0x6E, 0x94, 0x02, 0x04, 0x38, 0x3A, 0x50, 0x3D,
+     0x70, 0x06, 0x3E, 0x35, 0x6D, 0x94, 0x05, 0x3F, 0x36, 0x6E, 0x94,
+     0xE5, 0xDF, 0x94, 0xDF, 0xB2, 0x07, 0xFB, 0x07, 0xF7, 0x30, 0x90,
+     0x98, 0x00, 0x4F, 0x3F, 0x40, 0x62, 0x52, 0x73, 0x57, 0x47, 0x40,
+     0x6A, 0x5A, 0x73, 0x03, 0xC1, 0xF8, 0x63, 0xB6, 0x03, 0xA0},
+    {0x15, 0x4E, 0x35, 0x6E, 0x94, 0x02, 0x04, 0x38, 0x3A, 0x50, 0x3D,
+     0x70, 0x06, 0x3E, 0x35, 0x6D, 0x94, 0x05, 0x3F, 0x36, 0x6E, 0x94,
+     0xE5, 0xDF, 0x94, 0xDF, 0xB2, 0x07, 0xFB, 0x07, 0xF7, 0x30, 0x90,
+     0x98, 0x00, 0x4F, 0x3F, 0x40, 0x62, 0x52, 0x73, 0x57, 0x47, 0x40,
+     0x6A, 0x5A, 0x73, 0x03, 0xC1, 0xF8, 0x63, 0xB6, 0x03, 0xA0},
+    {0x15, 0x4E, 0x35, 0x6E, 0x94, 0x02, 0x04, 0x38, 0x3A, 0x50, 0x3D,
+     0x70, 0x06, 0x3E, 0x35, 0x6D, 0x94, 0x05, 0x3F, 0x36, 0x6E, 0x94,
+     0xE5, 0xDF, 0x94, 0xDF, 0xB2, 0x07, 0xFB, 0x07, 0xF7, 0x30, 0x90,
+     0x98, 0x00, 0x4F, 0x3F, 0x40, 0x62, 0x52, 0x73, 0x57, 0x47, 0x40,
+     0x6A, 0x5A, 0x73, 0xA0, 0xC1, 0x95, 0x73, 0xB6, 0x03, 0xA0},
+    {0x15, 0x4E, 0x35, 0x6E, 0x94, 0x02, 0x04, 0x38, 0x3A, 0x50, 0x3D,  /* 800x600u */
+     0x70, 0x06, 0x3E, 0x35, 0x6D, 0x94, 0x05, 0x3F, 0x36, 0x6E, 0x94,
+     0xE5, 0xDF, 0x94, 0x7F, 0xBD, 0x08, 0x0E, 0x07, 0x47, 0x40, 0x9D,
+     0xA5, 0x00, 0x54, 0x94, 0x40, 0xA4, 0xE4, 0x73, 0x5C, 0x9C, 0x40,
+     0xAC, 0xEC, 0x73, 0x0B, 0x0E, 0x00, 0x84, 0x03, 0x04, 0xA0},
+    {0x15, 0x4E, 0x35, 0x6E, 0x94, 0x02, 0x04, 0x38, 0x3A, 0x50, 0x3D,  /* 720x540  */
+     0x70, 0x06, 0x3E, 0x35, 0x6D, 0x94, 0x05, 0x3F, 0x36, 0x6E, 0x94,
+     0xE5, 0xDF, 0x94, 0xDF, 0xB0, 0x07, 0xFB, 0x07, 0xF7, 0x30, 0x9D,
+     0xA5, 0x00, 0x4F, 0x3F, 0x40, 0x62, 0x52, 0x73, 0x57, 0x47, 0x40,
+     0x6A, 0x5A, 0x73, 0xA0, 0xC1, 0x95, 0x73, 0xB6, 0x03, 0xA0}
+};
+
+const CARD8 SiS6326TVRegs1[14] = {
+     0x00,0x01,0x02,0x03,0x04,0x11,0x12,0x13,0x21,0x26,0x27,0x3a,0x3c,0x43
+};
+
+const CARD8 SiS6326CR[9][15] = {
+     {0x79,0x63,0x64,0x1d,0x6a,0x93,0x00,0x6f,0xf0,0x58,0x8a,0x57,0x57,0x70,0x20},  /* PAL 800x600   */
+     {0x79,0x4f,0x50,0x95,0x60,0x93,0x00,0x6f,0xba,0x14,0x86,0xdf,0xe0,0x30,0x00},  /* PAL 640x480   */
+     {0x5f,0x4f,0x50,0x82,0x53,0x9f,0x00,0x0b,0x3e,0xe9,0x8b,0xdf,0xe7,0x04,0x00},  /* NTSC 640x480  */
+     {0x5f,0x4f,0x50,0x82,0x53,0x9f,0x00,0x0b,0x3e,0xcb,0x8d,0x8f,0x96,0xe9,0x00},  /* NTSC 640x400  */
+     {0x83,0x63,0x64,0x1f,0x6d,0x9b,0x00,0x6f,0xf0,0x48,0x0a,0x23,0x57,0x70,0x20},  /* PAL 800x600u  */
+     {0x79,0x59,0x5b,0x1d,0x66,0x93,0x00,0x6f,0xf0,0x42,0x04,0x1b,0x40,0x70,0x20},  /* PAL 720x540   */
+     {0x66,0x4f,0x51,0x0a,0x57,0x89,0x00,0x0b,0x3e,0xd9,0x0b,0xb6,0xe7,0x04,0x00},  /* NTSC 640x480u */
+     {0xce,0x9f,0x9f,0x92,0xa4,0x16,0x00,0x28,0x5a,0x00,0x04,0xff,0xff,0x29,0x39},  /* 1280x1024-75  */
+     {0x09,0xc7,0xc7,0x0d,0xd2,0x0a,0x01,0xe0,0x10,0xb0,0x04,0xaf,0xaf,0xe1,0x1f}   /* 1600x1200-60  */
+};
+
+/* Initialize a display mode on 5597/5598, 6326 and 530/620 */
 static Bool
 SISInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
 {
-    SISPtr pSiS = SISPTR(pScrn);
-    SISRegPtr pReg = &pSiS->ModeReg;
-    vgaRegPtr   vgaReg = &VGAHWPTR(pScrn)->ModeReg;
-    int gap, safetymargin, MemBand;
-    int vgaIOBase;
-    unsigned char temp;
-    int Base,mclk;
-    int offset;
-    int clock = mode->Clock;
-    unsigned int vclk[5];
-    unsigned short CRT_CPUthresholdLow ;
-    unsigned short CRT_CPUthresholdHigh ;
-    unsigned short CRT_ENGthreshold ;
-
-    int num, denum, div, sbit, scale;
+    SISPtr         pSiS = SISPTR(pScrn);
+    SISRegPtr      pReg = &pSiS->ModeReg;
+    vgaRegPtr      vgaReg = &VGAHWPTR(pScrn)->ModeReg;
+    unsigned char  temp;
+    int            mclk = pSiS->MemClock;
+    int            offset;
+    int            clock = mode->Clock;
+    int            width = mode->HDisplay;
+    int            height = mode->VDisplay;
+    int            rate = SiSCalcVRate(mode);
+    int            buswidth = pSiS->BusWidth;
+    unsigned int   vclk[5];
+    unsigned short CRT_CPUthresholdLow;
+    unsigned short CRT_CPUthresholdHigh;
+    unsigned short CRT_ENGthreshold;
+    double         a, b, c;
+    int            d, factor;
+    int            num, denum, div, sbit, scale;
+    BOOL	   sis6326tvmode, sis6326himode;
 
     PDEBUG(xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3, "SISInit()\n"));
-    vgaHWGetIOBase(VGAHWPTR(pScrn));
-    vgaIOBase = VGAHWPTR(pScrn)->IOBase;
 
+    /* Save the registers for further processing */
     (*pSiS->SiSSave)(pScrn, pReg);
 
-    pSiS->scrnOffset = pScrn->displayWidth * pScrn->bitsPerPixel / 8;
+    /* TW: Determine if chosen mode is suitable for TV on the 6326
+           and if the mode is one of our special hi-res modes.
+     */
+    sis6326tvmode = FALSE;
+    sis6326himode = FALSE;
+    if(pSiS->Chipset == PCI_CHIP_SIS6326) {
+      if(pSiS->SiS6326Flags & SIS6326_HASTV) {
+        if((pSiS->SiS6326Flags & SIS6326_TVDETECTED) &&
+           ((strcmp(mode->name, "PAL800x600") == 0)   ||	/* TW: Special TV modes */
+            (strcmp(mode->name, "PAL800x600U") == 0)  ||
+	    (strcmp(mode->name, "PAL720x540") == 0)   ||
+            (strcmp(mode->name, "PAL640x480") == 0)   ||
+	    (strcmp(mode->name, "NTSC640x480") == 0)  ||
+	    (strcmp(mode->name, "NTSC640x480U") == 0) ||
+	    (strcmp(mode->name, "NTSC640x400") == 0))) {
+		    sis6326tvmode = TRUE;
+        } else {
+          pReg->sis6326tv[0x00] &= 0xfb;
+        }
+      }
+      if((strcmp(mode->name, "SIS1280x1024-75") == 0) ||	/* TW: Special high-res modes */
+         (strcmp(mode->name, "SIS1600x1200-60") == 0)) {
+	 sis6326himode = TRUE;
+      }
+    }
+
+#ifdef UNLOCK_ALWAYS
+    outSISIDXREG(SISSR, 0x05, 0x86);
+#endif
 
-    pReg->sisRegs3C4[0x05] = 0x86;
     pReg->sisRegs3C4[0x06] &= 0x01;
-    
-    if ((mode->Flags & V_INTERLACE)==0)  {
-        offset = pScrn->displayWidth >> 3;
-        pReg->sisRegs3C4[0x06] &= 0xDF;
+
+    /* set interlace */
+    if(!(mode->Flags & V_INTERLACE))  {
+        offset = pSiS->CurrentLayout.displayWidth >> 3;
     } else  {
-        offset = pScrn->displayWidth >> 2;
+        offset = pSiS->CurrentLayout.displayWidth >> 2;
         pReg->sisRegs3C4[0x06] |= 0x20;
     }
 
-    /* Enable Linear */
-    switch (pSiS->Chipset)  {
+    /* Enable Linear and Enhanced Gfx Mode */
+    pReg->sisRegs3C4[0x06] |= 0x82;
+
+    /* Enable MMIO at PCI Register 14H (D[6:5]: 11) */
+    pReg->sisRegs3C4[0x0B] |= 0x60;
+
+    /* Enable 32bit mem access (D7), read-ahead cache (D4) */
+    pReg->sisRegs3C4[0x0C] |= 0xA0;
+
+    /* TW: Some speed-up stuff */
+    switch(pSiS->Chipset)  {
     case PCI_CHIP_SIS5597:
+        /* TW: enable host bus */
+	if(pSiS->NoHostBus) {
+	   pReg->sisRegs3C4[0x34] &= ~0x08;
+	} else {
+           pReg->sisRegs3C4[0x34] |= 0x08;
+	}
+        /* TW: fall through */
     case PCI_CHIP_SIS6326:
-    case PCI_CHIP_SIS530:
-        pReg->sisRegs3C4[BankReg] |= 0x82;
-        pReg->sisRegs3C4[0x0C] |= 0xA0;
-        pReg->sisRegs3C4[0x0B] |= 0x60;
-        break;
-    default:
-        pReg->sisRegs3C4[BankReg] |= 0x82;
+    case PCI_CHIP_SIS530: 
+        /* TW: Enable "dual segment register mode" (D2) and "i/o gating while
+         *     write buffer is not empty" (D3)
+         */
+    	pReg->sisRegs3C4[0x0B] |= 0x0C;
     }
 
-    switch (pScrn->bitsPerPixel) {
+    /* set colordepth */
+    if(pSiS->Chipset == PCI_CHIP_SIS530) {
+        pReg->sisRegs3C4[0x09] &= 0x7F;
+    }
+    switch(pSiS->CurrentLayout.bitsPerPixel) {
         case 8:
             break;
-        case 15:
-            offset <<= 1;
-            pReg->sisRegs3C4[BankReg] |= 0x04;
-            break;
         case 16:
-            offset <<= 1;
-            pReg->sisRegs3C4[BankReg] |= 0x08;
+	    offset <<= 1;
+	    if(pSiS->CurrentLayout.depth == 15)
+	        pReg->sisRegs3C4[0x06] |= 0x04;
+	    else
+                pReg->sisRegs3C4[0x06] |= 0x08;
             break;
         case 24:
             offset += (offset << 1);
-            pReg->sisRegs3C4[BankReg] |= 0x10;
-            pReg->sisRegs3C4[MMIOEnable] |= 0x90;
+            pReg->sisRegs3C4[0x06] |= 0x10;
+            pReg->sisRegs3C4[0x0B] |= 0x90;
             break;
         case 32:
-            offset <<= 2;
-            if (pSiS->Chipset == PCI_CHIP_SIS530)  {
-                    pReg->sisRegs3C4[BankReg] |= 0x10;
-                    pReg->sisRegs3C4[MMIOEnable] |= 0x90;
-                    pReg->sisRegs3C4[0x09] |= 0x80;
-            } else  {
-                    return FALSE;
-            }
+            if(pSiS->Chipset == PCI_CHIP_SIS530) {
+	        offset <<= 2;
+                pReg->sisRegs3C4[0x06] |= 0x10;
+                pReg->sisRegs3C4[0x0B] |= 0x90;
+                pReg->sisRegs3C4[0x09] |= 0x80;
+            } else return FALSE;
             break;
     }
-    switch (pScrn->videoRam)  {
+
+    /* save screen pitch for acceleration functions */
+    pSiS->scrnOffset = pSiS->CurrentLayout.displayWidth *
+                           ((pSiS->CurrentLayout.bitsPerPixel + 7) / 8);
+
+    /* set linear framebuffer addresses */
+    switch(pScrn->videoRam)  {
         case 512:
-            temp = 0x00;
-            break;
+            temp = 0x00;  break;
         case 1024:
-            temp = 0x20;
-            break;
+            temp = 0x20;  break;
         case 2048:
-            temp = 0x40;
-            break;
+            temp = 0x40;  break;
         case 4096:
-            temp = 0x60;
-            break;
+            temp = 0x60;  break;
         case 8192:
-            temp = 0x80;
-            break;
+            temp = 0x80;  break;
         default:
             temp = 0x20;
     }
-    switch (pSiS->Chipset)  {
-        case PCI_CHIP_SG86C225:
-        case PCI_CHIP_SIS5597:
-        case PCI_CHIP_SIS6326:
-            pReg->sisRegs3C4[LinearAdd0] = (pSiS->FbAddress & 0x07F80000) >> 19;
-            pReg->sisRegs3C4[LinearAdd1] =((pSiS->FbAddress & 0xF8000000) >> 27)
-                                        | temp; /* Enable linear with max 4M */
-            break;
-        case PCI_CHIP_SIS530:
-            pReg->sisRegs3C4[LinearAdd0] = (pSiS->FbAddress & 0x07F80000) >> 19;
-            pReg->sisRegs3C4[LinearAdd1] =((pSiS->FbAddress & 0xF8000000) >> 27)
-                                        | temp; /* Enable linear with max 8M */
-            break;
-    }
+    pReg->sisRegs3C4[0x20] = (pSiS->FbAddress & 0x07F80000) >> 19;
+    pReg->sisRegs3C4[0x21] = ((pSiS->FbAddress & 0xF8000000) >> 27) | temp;
 
-    /* Screen Offset */
+    /* Set screen offset */
     vgaReg->CRTC[0x13] = offset & 0xFF;
-    pReg->sisRegs3C4[CRTCOff] = ((offset & 0xF00) >> 4) | 
-                (((mode->CrtcVTotal-2)     & 0x400) >> 10 ) |
-                (((mode->CrtcVDisplay-1)   & 0x400) >> 9 ) |
-                (((mode->CrtcVSyncStart-1) & 0x400) >> 8 ) |
-                (((mode->CrtcVSyncStart)   & 0x400) >> 7 ) ;
-
-    /* Extended Horizontal Overflow Register */
-    pReg->sisRegs3C4[0x12] &= 0xE0;
-    pReg->sisRegs3C4[0x12] |= (
-        (((mode->CrtcHTotal >> 3) - 5)     & 0x100) >> 8 |
-        (((mode->CrtcHDisplay >> 3) - 1)   & 0x100) >> 7 |
-        (((mode->CrtcHSyncStart >> 3) - 1) & 0x100) >> 6 |
-        ((mode->CrtcHSyncStart >> 3)       & 0x100) >> 5 |
-        (((mode->CrtcHBlankEnd >> 3) -1)   & 0x40)  >> 2);
-/*      ((mode->CrtcHSyncEnd >> 3)         & 0x40)  >> 2); */
-
-    if (mode->CrtcVDisplay > 1024)
-        /* disable line compare */
+
+    /* Set CR registers for our built-in TV and hi-res modes */
+    if((sis6326tvmode) || (sis6326himode)) {
+
+	int index,i;
+
+	/* TW: We need our very private data for hi-res and TV modes */
+	if(sis6326himode) {
+	   if(strcmp(mode->name, "SIS1280x1024-75") == 0)  index = 7;
+	   else index = 8;
+	} else {
+	  if(pSiS->SiS6326Flags & SIS6326_TVPAL) {
+	    switch(width) {
+	    case 800:
+	      if((strcmp(mode->name, "PAL800x600U") == 0))
+	      	index = 4;
+	      else
+	        index = 0;
+	      break;
+	    case 720:
+	      index = 5;
+	      break;
+	    case 640:
+	    default:
+	      index = 1;
+	    }
+	  } else {
+	    switch(height) {
+	    case 400:
+	      index = 3;
+	      break;
+	    case 480:
+	    default:
+	      if((strcmp(mode->name, "NTSC640x480U") == 0))
+	        index = 6;
+	      else
+	        index = 2;
+	    }
+	  }
+        }
+	for(i=0; i<=5; i++) {
+	    vgaReg->CRTC[i] = SiS6326CR[index][i];
+	}
+        pReg->sisRegs3C4[0x12] = SiS6326CR[index][6];
+	vgaReg->CRTC[6] = SiS6326CR[index][7];
+	vgaReg->CRTC[7] = SiS6326CR[index][8];
+	vgaReg->CRTC[0x10] = SiS6326CR[index][9];
+	vgaReg->CRTC[0x11] = SiS6326CR[index][10];
+	vgaReg->CRTC[0x12] = SiS6326CR[index][11];
+	vgaReg->CRTC[0x15] = SiS6326CR[index][12];
+	vgaReg->CRTC[0x16] = SiS6326CR[index][13];
+	vgaReg->CRTC[9] &= ~0x20;
+	vgaReg->CRTC[9] |= (SiS6326CR[index][14] & 0x20);
+	pReg->sisRegs3C4[0x0A] = ((offset & 0xF00) >> 4) | (SiS6326CR[index][14] & 0x0f);
+
+    } else {
+
+       /* Set extended vertical overflow register */
+       pReg->sisRegs3C4[0x0A] = ((offset & 0xF00) >> 4) |
+              (((mode->CrtcVTotal-2)     & 0x400) >> 10 ) |
+              (((mode->CrtcVDisplay-1)   & 0x400) >>  9 ) |
+/*            (((mode->CrtcVSyncStart-1) & 0x400) >>  8 ) |  */
+	      (((mode->CrtcVBlankStart-1)& 0x400) >>  8 ) |
+/*            (((mode->CrtcVBlankStart-1)& 0x400) >>  7 );  */
+              (((mode->CrtcVSyncStart)   & 0x400) >>  7 );  
+
+       /* Set extended horizontal overflow register */
+       pReg->sisRegs3C4[0x12] &= 0xE0;
+       pReg->sisRegs3C4[0x12] |= (
+           (((mode->CrtcHTotal >> 3) - 5)      & 0x100) >> 8 |
+           (((mode->CrtcHDisplay >> 3) - 1)    & 0x100) >> 7 |
+/*         (((mode->CrtcHSyncStart >> 3) - 1)  & 0x100) >> 6 |  */
+           (((mode->CrtcHBlankStart >> 3) - 1) & 0x100) >> 6 |
+           ((mode->CrtcHSyncStart >> 3)        & 0x100) >> 5 |
+           (((mode->CrtcHBlankEnd >> 3) - 1)   & 0x40)  >> 2);
+    }
+
+#ifdef TWDEBUG
+    xf86DrvMsg(0, X_INFO, "HDisplay %d HSyncStart %d HSyncEnd %d HTotal %d\n",
+		mode->CrtcHDisplay, mode->CrtcHSyncStart,
+		mode->CrtcHSyncEnd, mode->CrtcHTotal);
+    xf86DrvMsg(0, X_INFO, "HBlankSt %d  HBlankE %d\n",
+    		mode->CrtcHBlankStart, mode->CrtcHBlankEnd);
+
+    xf86DrvMsg(0, X_INFO, "VDisplay %d VSyncStart %d VSyncEnd %d VTotal %d\n",
+		mode->CrtcVDisplay, mode->CrtcVSyncStart,
+		mode->CrtcVSyncEnd, mode->CrtcVTotal);
+    xf86DrvMsg(0, X_INFO, "VBlankSt %d  VBlankE %d\n",
+    		mode->CrtcVBlankStart, mode->CrtcVBlankEnd);
+#endif
+
+    /* enable (or disable) line compare */
+    if(mode->CrtcVDisplay >= 1024)
         pReg->sisRegs3C4[0x38] |= 0x04;
     else
         pReg->sisRegs3C4[0x38] &= 0xFB;
 
-    if (( pScrn->depth == 24) || (pScrn->depth == 32) ||
-                    (mode->CrtcHDisplay >= 1280))
-        /* Enable high speed DCLK */
-        pReg->sisRegs3C4[0x3E] |= 1;
-    else
-        pReg->sisRegs3C4[0x3E] &= 0xFE;
-
-
-    /* Set vclk */  
-    if (sis_compute_vclk(clock, &num, &denum, &div, &sbit, &scale)) {
-        switch  (pSiS->Chipset)  {
-            case PCI_CHIP_SIS5597:
-            case PCI_CHIP_SIS6326:
-            case PCI_CHIP_SIS530:
-                pReg->sisRegs3C4[XR2A] = (num - 1) & 0x7f ;
-                pReg->sisRegs3C4[XR2A] |= (div == 2) ? 0x80 : 0;
-                pReg->sisRegs3C4[XR2B] = ((denum -1) & 0x1f);
-                pReg->sisRegs3C4[XR2B] |= (((scale -1)&3) << 5);
-                /* When set VCLK, you should set SR13 first */
-                if (sbit) 
-                    pReg->sisRegs3C4[ClockBase] |= 0x40;
-                else 
-                    pReg->sisRegs3C4[ClockBase] &= 0xBF;
-                    
-                break;
-        }
+    /* Enable (or disable) high speed DCLK (some 6326 and 530/620 only) */
+    if( ( (pSiS->Chipset == PCI_CHIP_SIS6326) &&
+          ( (pSiS->ChipRev == 0xd0) || (pSiS->ChipRev == 0xd1) ||
+            (pSiS->ChipRev == 0xd2) || (pSiS->ChipRev == 0x92) ||
+	    (pSiS->Flags & A6326REVAB) ) ) ||
+        (pSiS->oldChipset > OC_SIS6326) ) {
+      if( (pSiS->CurrentLayout.bitsPerPixel == 24) ||
+          (pSiS->CurrentLayout.bitsPerPixel == 32) ||
+          (mode->CrtcHDisplay >= 1280) )
+         pReg->sisRegs3C4[0x3E] |= 0x01;
+      else
+         pReg->sisRegs3C4[0x3E] &= 0xFE;
     }
-    else  {
-    /* if sis_compute_vclk cannot handle the request clock try sisCalcClock! */
+
+    /* We use the internal VCLK */
+    pReg->sisRegs3C4[0x38] &= 0xFC;
+
+    /* Set VCLK */
+    if((sis6326tvmode) || (sis6326himode)) {
+        /* TW: For our built-in modes, the calculation is not suitable */
+      if(sis6326himode) {
+        if((strcmp(mode->name, "SIS1280x1024-75") == 0)) {
+	   pReg->sisRegs3C4[0x2A] = 0x5d;	/* 1280x1024-75 */
+           pReg->sisRegs3C4[0x2B] = 0xa4;
+        } else {
+	   pReg->sisRegs3C4[0x2A] = 0x59;	/* 1600x1200-60 */
+           pReg->sisRegs3C4[0x2B] = 0xa3;
+        }
+	pReg->sisRegs3C4[0x13] &= ~0x40;
+      } else {
+        if(pSiS->SiS6326Flags & SIS6326_TVPAL) {
+	   /* PAL: 31.500 Mhz */
+	   if((strcmp(mode->name, "PAL800x600U") == 0)) {
+   	      pReg->sisRegs3C4[0x2A] = 0x46;
+              pReg->sisRegs3C4[0x2B] = 0x49;
+	   } else {
+	      pReg->sisRegs3C4[0x2A] = 0xab;
+              pReg->sisRegs3C4[0x2B] = 0xe9;
+	   }
+	   pReg->sisRegs3C4[0x13] &= ~0x40;
+	} else {
+	   /* NTSC: 27.000 Mhz */
+	   if((strcmp(mode->name, "NTSC640x480U") == 0)) {
+	      pReg->sisRegs3C4[0x2A] = 0x5a;
+              pReg->sisRegs3C4[0x2B] = 0x65;
+	   } else {
+	      pReg->sisRegs3C4[0x2A] = 0x29;
+              pReg->sisRegs3C4[0x2B] = 0xe2;
+	   }
+	   pReg->sisRegs3C4[0x13] |= 0x40;
+	}
+      }
+    } else if(SiS_compute_vclk(clock, &num, &denum, &div, &sbit, &scale)) {
+        pReg->sisRegs3C4[0x2A] = (num - 1) & 0x7f ;
+        pReg->sisRegs3C4[0x2A] |= (div == 2) ? 0x80 : 0;
+        pReg->sisRegs3C4[0x2B] = ((denum - 1) & 0x1f);
+        pReg->sisRegs3C4[0x2B] |= (((scale -1) & 3) << 5);
+
+	/* When setting VCLK, we should set SR13 first */
+        if(sbit)
+              pReg->sisRegs3C4[0x13] |= 0x40;
+        else
+              pReg->sisRegs3C4[0x13] &= 0xBF;
+
+#ifdef TWDEBUG
+	xf86DrvMsg(0, X_INFO, "2a: %x 2b: %x 13: %x clock %d\n",
+		pReg->sisRegs3C4[0x2A], pReg->sisRegs3C4[0x2B], pReg->sisRegs3C4[0x13], clock);
+#endif
+
+    } else {
+        /* if SiS_compute_vclk cannot handle the requested clock, try sisCalcClock */
         SiSCalcClock(pScrn, clock, 2, vclk);
-        switch (pSiS->Chipset)  {
-            case PCI_CHIP_SIS5597:
-            case PCI_CHIP_SIS6326:
-            case PCI_CHIP_SIS530:
-                pReg->sisRegs3C4[XR2A] = (vclk[Midx] - 1) & 0x7f ;
-                pReg->sisRegs3C4[XR2A] |= ((vclk[VLDidx] == 2 ) ? 1 : 0 ) << 7 ;
-
-                /* bits [4:0] contain denumerator -MC */
-                pReg->sisRegs3C4[XR2B] = (vclk[Nidx] -1) & 0x1f ;
-
-                if (vclk[Pidx] <= 4){
-                /* postscale 1,2,3,4 */
-                    pReg->sisRegs3C4[XR2B] |= (vclk[Pidx] -1 ) << 5 ;
-                    pReg->sisRegs3C4[ClockBase] &= 0xBF;
-                } else {
-                /* postscale 6,8 */
-                    pReg->sisRegs3C4[XR2B] |= ((vclk[Pidx] / 2) -1 ) << 5 ;
-                    pReg->sisRegs3C4[ClockBase] |= 0x40;
-                }
-                pReg->sisRegs3C4[XR2B] |= 0x80 ;   /* gain for high frequency */
-                break;
+
+        pReg->sisRegs3C4[0x2A] = (vclk[Midx] - 1) & 0x7f;
+        pReg->sisRegs3C4[0x2A] |= ((vclk[VLDidx] == 2) ? 1 : 0) << 7;
+
+	/* bits [4:0] contain denumerator */
+        pReg->sisRegs3C4[0x2B] = (vclk[Nidx] - 1) & 0x1f;
+
+        if (vclk[Pidx] <= 4){
+              /* postscale 1,2,3,4 */
+              pReg->sisRegs3C4[0x2B] |= (vclk[Pidx] - 1) << 5;
+              pReg->sisRegs3C4[0x13] &= 0xBF;
+        } else {
+              /* postscale 6,8 */
+              pReg->sisRegs3C4[0x2B] |= ((vclk[Pidx] / 2) - 1) << 5;
+              pReg->sisRegs3C4[0x13] |= 0x40;
         }
-    } /* end of set vclk */
+        pReg->sisRegs3C4[0x2B] |= 0x80 ;   /* gain for high frequency */
+    }
 
-    if (clock > 135000)
-        pReg->sisRegs3C4[ClockReg] |= 0x02;
+    /* High speed DAC */
+    if(clock > 135000)
+        pReg->sisRegs3C4[0x07] |= 0x02;
 
-    /* pReg->sisRegs3C2 = inb(0x3CC) | 0x0C;*/ /* Programmable Clock */
-    pReg->sisRegs3C2 = inb(pSiS->RelIO+0x4c) | 0x0C; /* Programmable Clock */
+    /* Programmable Clock */
+    pReg->sisRegs3C2 = inb(SISMISCR) | 0x0C;
 
-    if (pSiS->FastVram && ((pSiS->Chipset == PCI_CHIP_SIS530) ||
-        (pSiS->Chipset == PCI_CHIP_SIS6326) ||
-        (pSiS->Chipset == PCI_CHIP_SIS5597)))
-        pReg->sisRegs3C4[ExtMiscCont5]|= 0xC0;
-    else 
-        pReg->sisRegs3C4[ExtMiscCont5]&= ~0xC0;
+    /* 1 or 2 cycle DRAM (set by option FastVram) */
+    if(pSiS->newFastVram == -1) {
+        pReg->sisRegs3C4[0x34] |= 0x80;
+	pReg->sisRegs3C4[0x34] &= ~0x40;
+    } else if(pSiS->newFastVram == 1)
+        pReg->sisRegs3C4[0x34] |= 0xC0;
+    else
+        pReg->sisRegs3C4[0x34] &= ~0xC0;
 
+    /* Logical line length */
     pSiS->ValidWidth = TRUE;
-    if ((pSiS->Chipset == PCI_CHIP_SIS5597) ||
-        (pSiS->Chipset == PCI_CHIP_SIS6326) ||
-        (pSiS->Chipset == PCI_CHIP_SIS530))
-    {
-        pReg->sisRegs3C4[GraphEng] &= 0xCF; /* Clear logical width bits */
-        if (pScrn->bitsPerPixel == 24)  {
-            pReg->sisRegs3C4[GraphEng] |= 0x30; /* Invalid logical width */
-            pSiS->ValidWidth = FALSE;
-        }
-        else  {
-            switch ( pScrn->virtualX * (pScrn->bitsPerPixel >> 3) ) {
-                case 1024:
-                    pReg->sisRegs3C4[GraphEng] |= 0x00; /* | 00 = No change */
-                    break;
-                case 2048:
-                    pReg->sisRegs3C4[GraphEng] |= 0x10; 
-                    break;
-                case 4096:
-                    pReg->sisRegs3C4[GraphEng] |= 0x20; 
-                    break;
-                default:
-                    /* Invalid logical width */
-                    pReg->sisRegs3C4[GraphEng] =  0x30;
-                    pSiS->ValidWidth = FALSE;
-                    break;
-            }
-        }
+    pReg->sisRegs3C4[0x27] &= 0xCF;
+    if(pSiS->CurrentLayout.bitsPerPixel == 24) {
+         /* Invalid logical width */
+         pReg->sisRegs3C4[0x27] |= 0x30;
+         pSiS->ValidWidth = FALSE;
+    } else {
+	 switch(pScrn->virtualX * (pSiS->CurrentLayout.bitsPerPixel >> 3)) {
+         case 1024:
+               pReg->sisRegs3C4[0x27] |= 0x00;
+               break;
+         case 2048:
+               pReg->sisRegs3C4[0x27] |= 0x10;
+               break;
+         case 4096:
+               pReg->sisRegs3C4[0x27] |= 0x20;
+               break;
+         default:
+               /* Invalid logical width */
+               pReg->sisRegs3C4[0x27] |= 0x30;
+               pSiS->ValidWidth = FALSE;
+               break;
+         }
     }
-    PDEBUG(xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3,
-                "virtualX = %d depth = %d Logical width = %d\n",
-                pScrn->virtualX, pScrn->bitsPerPixel,
-                pScrn->virtualX * pScrn->bitsPerPixel/8));
 
-    if (!pSiS->NoAccel) {
-        switch  (pSiS->Chipset)  {
-            case PCI_CHIP_SIS5597:
-            case PCI_CHIP_SIS6326:
-            case PCI_CHIP_SIS530:
-                pReg->sisRegs3C4[GraphEng] |= 0x40;
-                if (pSiS->TurboQueue) {
-                    pReg->sisRegs3C4[GraphEng] |= 0x80;
-                                /* All Queue for 2D */
-                    pReg->sisRegs3C4[ExtMiscCont9] &= 0xFC;
-                    if (pSiS->HWCursor)
-                        pReg->sisRegs3C4[TurboQueueBase] = (pScrn->videoRam/32) - 2;
-                    else
-                        pReg->sisRegs3C4[TurboQueueBase] = (pScrn->videoRam/32) - 1;
-                }
-                pReg->sisRegs3C4[MMIOEnable] |= 0x60; /* At PCI base */
-                pReg->sisRegs3C4[Mode64] |= 0x80;
-                break;
-        }
+    /* Acceleration stuff */
+    if(!pSiS->NoAccel) {
+         pReg->sisRegs3C4[0x27] |= 0x40;   /* Enable engine programming registers */
+         if( (pSiS->TurboQueue) &&	       /* Handle TurboQueue */
+ 	     ( (pSiS->Chipset != PCI_CHIP_SIS530) ||
+	       (pSiS->CurrentLayout.bitsPerPixel != 24) ) ) {
+               pReg->sisRegs3C4[0x27] |= 0x80;        /* Enable TQ */
+	       if((pSiS->Chipset == PCI_CHIP_SIS530) ||
+		  ((pSiS->Chipset == PCI_CHIP_SIS6326 &&
+		   (pSiS->ChipRev == 0xd0 || pSiS->ChipRev == 0xd1 ||
+		    pSiS->ChipRev == 0xd2 || pSiS->ChipRev == 0x92 ||
+		    pSiS->ChipRev == 0x0a || pSiS->ChipRev == 0x1a ||
+		    pSiS->ChipRev == 0x2a || pSiS->ChipRev == 0x0b ||
+		    pSiS->ChipRev == 0x1b || pSiS->ChipRev == 0x2b) ) ) ) {
+		    /* pReg->sisRegs3C4[0x3D] |= 0x80;  */     /* Queue is 62K (530/620 specs) */
+		       pReg->sisRegs3C4[0x3D] &= 0x7F;         /* Queue is 30K (530/620 specs) */
+		}
+		/* TW: Locate the TQ at the beginning of the last 64K block of
+		 *     video RAM. The address is to be specified in 32K steps.
+		 */
+		pReg->sisRegs3C4[0x2C] = (pScrn->videoRam - 64) / 32;
+		if(pSiS->Chipset != PCI_CHIP_SIS530) {	/* 530/620: Reserved (don't touch) */
+    		        pReg->sisRegs3C4[0x3C] &= 0xFC; /* 6326: Queue is all for 2D */
+		}					/* 5597: Must be 0           */
+          } else {
+	        pReg->sisRegs3C4[0x27] &= 0x7F;
+	  }
     }
 
-   /* Set memclock */
-    if ((pSiS->Chipset == PCI_CHIP_SIS5597) || (pSiS->Chipset == PCI_CHIP_SIS6326)) {
-      if (pSiS->MemClock > 66000) {
+    /* TW: No idea what this does. The Windows driver does it, so we do it as well */
+    if(pSiS->Chipset == PCI_CHIP_SIS6326) {
+       if((pSiS->ChipRev == 0xd0) || (pSiS->ChipRev == 0xd1) ||
+          (pSiS->ChipRev == 0xd2) || (pSiS->ChipRev == 0x92) ||
+	  (pSiS->Flags & A6326REVAB)) {
+	  if((pSiS->Flags & (SYNCDRAM | RAMFLAG)) == (SYNCDRAM | RAMFLAG)) {
+	     if(!(pReg->sisRegs3C4[0x0E] & 0x03)) {
+	         pReg->sisRegs3C4[0x3E] |= 0x02;
+	     }
+	  }
+       }
+    }
+
+
+    /* Set memclock */
+#if 0
+    /* TW: We don't need to do this; the SetMClk option was not used since 4.0. */
+    if((pSiS->Chipset == PCI_CHIP_SIS5597) || (pSiS->Chipset == PCI_CHIP_SIS6326)) {
+      if(pSiS->MemClock > 66000) {
           SiSCalcClock(pScrn, pSiS->MemClock, 1, vclk);
-  
-          pReg->sisRegs3C4[MemClock0] = (vclk[Midx] - 1) & 0x7f ;
-          pReg->sisRegs3C4[MemClock0] |= ((vclk[VLDidx] == 2 ) ? 1 : 0 ) << 7 ;
-          pReg->sisRegs3C4[MemClock1]  = (vclk[Nidx] -1) & 0x1f ;   /* bits [4:0] contain denumerator -MC */
-          if (vclk[Pidx] <= 4){
-            pReg->sisRegs3C4[MemClock1] |= (vclk[Pidx] -1 ) << 5 ; /* postscale 1,2,3,4 */
-            pReg->sisRegs3C4[ClockBase] &= 0x7F;
+
+          pReg->sisRegs3C4[0x28] = (vclk[Midx] - 1) & 0x7f ;
+          pReg->sisRegs3C4[0x28] |= ((vclk[VLDidx] == 2 ) ? 1 : 0 ) << 7 ;
+          pReg->sisRegs3C4[0x29] = (vclk[Nidx] -1) & 0x1f ;   /* bits [4:0] contain denumerator -MC */
+          if(vclk[Pidx] <= 4) {
+            pReg->sisRegs3C4[0x29] |= (vclk[Pidx] - 1) << 5 ; /* postscale 1,2,3,4 */
+            pReg->sisRegs3C4[0x13] &= 0x7F;
           } else {
-            pReg->sisRegs3C4[MemClock1] |= ((vclk[Pidx] / 2) -1 ) << 5 ;  /* postscale 6,8 */
-            pReg->sisRegs3C4[ClockBase] |= 0x80;
+            pReg->sisRegs3C4[0x29] |= ((vclk[Pidx] / 2) - 1) << 5 ;  /* postscale 6,8 */
+            pReg->sisRegs3C4[0x13] |= 0x80;
           }
-
-#if 1  /* Check programmed memory clock. Enable only to check the above code */
-          mclk=14318*((pReg->sisRegs3C4[MemClock0] & 0x7f)+1);
-          mclk=mclk/((pReg->sisRegs3C4[MemClock1] & 0x0f)+1);
-          Base = pReg->sisRegs3C4[ClockBase];
-          if ( (Base & 0x80)==0 ) {
-            mclk = mclk / (((pReg->sisRegs3C4[MemClock1] & 0x60) >> 5)+1);
-          }  else {
-            if ((pReg->sisRegs3C4[MemClock1] & 0x60) == 0x40) { mclk=mclk/6;}
-            if ((pReg->sisRegs3C4[MemClock1] & 0x60) == 0x60) { mclk=mclk/8;}
+          /* Check programmed memory clock. Enable only to check the above code */
+/*
+          mclk = 14318 * ((pReg->sisRegs3C4[0x28] & 0x7f) + 1);
+          mclk /= ((pReg->sisRegs3C4[0x29] & 0x0f) + 1);
+          if(!(pReg->sisRegs3C4[0x13] & 0x80)) {
+             mclk /= (((pReg->sisRegs3C4[0x29] & 0x60) >> 5) + 1);
+          } else {
+             if ((pReg->sisRegs3C4[0x29] & 0x60) == 0x40) mclk /= 6;
+             if ((pReg->sisRegs3C4[0x29] & 0x60) == 0x60) mclk /= 8;
           }
           xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO,2,
-           "Setting memory clock to %.3f MHz\n",
-          mclk/1000.0);
-#endif
+                 "Setting memory clock to %.3f MHz\n",
+                 mclk/1000.0);
+*/
       }
     }
+#endif
 
-    /* set threshold value */
-    switch  (pSiS->Chipset)  {
-        case PCI_CHIP_SIS5597:
-        case PCI_CHIP_SIS6326:
-            MemBand = SiSMemBandWidth(pScrn) / 10 ;
-            safetymargin = 1; 
-            gap          = 4;
+    /* TW: set threshold values (rewritten) */
+    /*
+     * CPU/CRT Threshold:                     FIFO
+     *                           MCLK     ___________      VCLK
+     * cpu/engine <---o       o--------->|___________| -----------> CRT
+     *                ^       ^            ^       ^
+     *                 \     /             |       |
+     *                  \   /              |< gap >|
+     *                   \ /               |       |
+     *           selector switch   Thrsh. low     high
+     *
+     * CRT consumes the data in the FIFO during scanline display. When the
+     * amount of data in the FIFO reaches the Threshold low value, the selector
+     * switch will switch to the right, and the FIFO will be refilled with data.
+     * When the amount of data in the FIFO reaches the Threshold high value, the
+     * selector switch will switch to the left and allows the CPU and the chip
+     * engines to access video RAM.
+     *
+     * The Threshold low values should be increased at higher bpps, simply because
+     * there is more data needed for the CRT. When Threshold low and high are very
+     * close to each other, the selector switch will be activated more often, which
+     * decreases performance.
+     *
+     */
+    switch(pSiS->Chipset) {
+    case PCI_CHIP_SIS5597:  factor = 65; break;
+    case PCI_CHIP_SIS6326:  factor = 30; break;
+    case PCI_CHIP_SIS530:   factor = (pSiS->Flags & UMA) ? 60 : 30; break;
+    default:                factor = (pScrn->videoRam > (1024*1024)) ? 24 : 12;
+    }
+    a = width * height * rate * 1.40 * factor * ((pSiS->CurrentLayout.bitsPerPixel + 1) / 8);
+    b = (mclk / 1000) * 999488.0 * (buswidth / 8);
+    c = ((a / b) + 1.0) / 2;
+    d = (int)c + 2;
+
+#ifdef TWDEBUG
+    xf86DrvMsg(0, X_INFO,
+       "Debug: w %d h %d r %d mclk %d bus %d factor %d bpp %d\n",
+       width, height, rate, mclk/1000, buswidth, factor,
+       pSiS->CurrentLayout.bitsPerPixel);
+    xf86DrvMsg(0, X_INFO, "Debug: a %f b %f c %f d %d (flags %x)\n",
+     	a, b, c, d, pSiS->Flags);
+#endif
 
-            CRT_ENGthreshold = 0x0F;
-            CRT_CPUthresholdLow = ((pScrn->depth*clock) / 
-                                    MemBand)+safetymargin;
-            CRT_CPUthresholdHigh =((pScrn->depth*clock) / 
-                                    MemBand)+gap+safetymargin;
+    CRT_CPUthresholdLow = d;
+    if((pSiS->Flags & (RAMFLAG | SYNCDRAM)) == (RAMFLAG | SYNCDRAM)) {
+     		CRT_CPUthresholdLow += 2;
+    }
+    CRT_CPUthresholdHigh = CRT_CPUthresholdLow + 3;
 
-            if ( CRT_CPUthresholdLow > (pScrn->depth < 24 ? 0xe:0x0d) ) { 
-                CRT_CPUthresholdLow = (pScrn->depth < 24 ? 0xe:0x0d); 
-            }
+    CRT_ENGthreshold = 0x0F;
 
-            if ( CRT_CPUthresholdHigh > (pScrn->depth < 24 ? 0x10:0x0f) ) {
-                CRT_CPUthresholdHigh = (pScrn->depth < 24 ? 0x10:0x0f);
-            }
+#ifdef TWDEBUG
+    xf86DrvMsg(0, X_INFO, "Debug: Thlow %d thhigh %d\n",
+     	CRT_CPUthresholdLow, CRT_CPUthresholdHigh);
+#endif
 
-            pReg->sisRegs3C4[CPUThreshold] =  (CRT_ENGthreshold & 0x0F) | 
-                            (CRT_CPUthresholdLow & 0x0F)<<4 ;
-            pReg->sisRegs3C4[CRTThreshold] = CRT_CPUthresholdHigh & 0x0F;
+#if 0  /* TW: See comment in sis_dac.c on why this is commented */
+    if(pSiS->Chipset == PCI_CHIP_SIS530) {
+       if((pSiS->oldChipset == OC_SIS530A) &&
+	  (pSiS->Flags & UMA) &&
+	  (mclk == 100000) &&
+	  (pSiS->Flags & ESS137xPRESENT)) {
+	    if(!(pSiS->Flags & SECRETFLAG)) index = 0;
+            if((temp = SiS_CalcSpecial530Threshold(pSiS, mode, index)) {
+	    	CRT_CPUthresholdLow = temp;
+	        break;
+	    }
+       }
+    }
+#endif
 
-            break;
-        case PCI_CHIP_SIS530:
-            (*pSiS->SetThreshold)(pScrn, mode, &CRT_CPUthresholdLow,
-                            &CRT_CPUthresholdHigh);
-            pReg->sisRegs3C4[8] = (CRT_CPUthresholdLow & 0xf) << 4 | 0xF;
-            pReg->sisRegs3C4[9] &= 0xF0;
-            pReg->sisRegs3C4[9] |= (CRT_CPUthresholdHigh & 0xF);
-            pReg->sisRegs3C4[0x3F] &= 0xE3;
-            pReg->sisRegs3C4[0x3F] |= (CRT_CPUthresholdHigh & 0x10) |
-                            (CRT_CPUthresholdLow & 0x10) >> 2 |
-                            0x08;
-            break;
+    switch(pSiS->Chipset) {
+    case PCI_CHIP_SIS530:
+        if(CRT_CPUthresholdLow > 0x1f)  CRT_CPUthresholdLow = 0x1f;
+        CRT_CPUthresholdHigh = 0x1f;
+        break;
+    case PCI_CHIP_SIS5597:
+    case PCI_CHIP_SIS6326:
+    default:
+        if(CRT_CPUthresholdLow > 0x0f)  CRT_CPUthresholdLow  = 0x0f;
+        if(CRT_CPUthresholdHigh > 0x0f) CRT_CPUthresholdHigh = 0x0f;
+    }
+
+    pReg->sisRegs3C4[0x08] = ((CRT_CPUthresholdLow & 0x0F) << 4) |
+			      (CRT_ENGthreshold & 0x0F);
+
+    pReg->sisRegs3C4[0x09] &= 0xF0;
+    pReg->sisRegs3C4[0x09] |= (CRT_CPUthresholdHigh & 0x0F);
+
+    pReg->sisRegs3C4[0x3F] &= 0xEB;
+    pReg->sisRegs3C4[0x3F] |= (CRT_CPUthresholdHigh & 0x10) |
+                       	      ((CRT_CPUthresholdLow & 0x10) >> 2);
+
+    if(pSiS->oldChipset >= OC_SIS530A) {
+     	pReg->sisRegs3C4[0x3F] &= 0xDF;
+	pReg->sisRegs3C4[0x3F] |= 0x58;
+    }
+
+    /* TW: Set SiS6326 TV registers */
+    if((pSiS->Chipset == PCI_CHIP_SIS6326) && (sis6326tvmode)) {
+      unsigned char tmp;
+      int index=0, i, j, k;
+
+      if(pSiS->SiS6326Flags & SIS6326_TVPAL) {
+         pReg->sisRegs3C4[0x0D] |= 0x04;
+         switch(width) {
+	   case 800:
+	      if((strcmp(mode->name, "PAL800x600U") == 0))  index = 4;
+	      else	        			    index = 3;
+	      break;
+	   case 720:
+	      index = 5;
+	      break;
+	   case 640:
+	   default:
+	      index = 2;
+	      break;
+	 }
+	 for(i=0; i<14; i++) {
+	     pReg->sis6326tv[SiS6326TVRegs1[i]] = SiS6326TVRegs1_PAL[index][i];
+	 }
+      } else {
+	pReg->sisRegs3C4[0x0D] &= ~0x04;
+	if((strcmp(mode->name, "NTSC640x480U") == 0))  index = 5;
+	else 					       index = 4;
+        for(i=0; i<14; i++) {
+	     pReg->sis6326tv[SiS6326TVRegs1[i]] = SiS6326TVRegs1_NTSC[index][i];
+	}
+      }
+      tmp = pReg->sis6326tv[0x43];
+      if(pSiS->SiS6326Flags & SIS6326_TVCVBS) tmp |= 0x10;
+      tmp |= 0x08;
+      pReg->sis6326tv[0x43] = tmp;
+      j = 0; k = 0;
+      for(i=0; i<=0x44; i++) {
+	 if(SiS6326TVRegs1[j] == i) {
+	 	j++;
+		continue;
+	 }
+	 if(pSiS->SiS6326Flags & SIS6326_TVPAL) {
+		tmp = SiS6326TVRegs2_PAL[index][k];
+	 } else {
+		tmp = SiS6326TVRegs2_NTSC[index][k];
+	 }
+	 pReg->sis6326tv[i] = tmp;
+	 k++;
+      }
+      pReg->sis6326tv[0x43] |= 0x08;
+      if((pSiS->ChipRev == 0xc1) || (pSiS->ChipRev == 0xc2)) {
+         pReg->sis6326tv[0x43] &= ~0x08;
+      }
+
+      tmp = pReg->sis6326tv[0];
+      tmp |= 0x18;
+      if(pSiS->SiS6326Flags & SIS6326_TVCVBS) tmp &= ~0x10;
+      else				      tmp &= ~0x08;
+      tmp |= 0x04;
+      pReg->sis6326tv[0] = tmp;
     }
 
     return(TRUE);
 }
 
-/* TW: Initialize various regs for mode. This is done to
- *     structure, not hardware. (SiSRestore would write
- *     structure to hardware registers.)
- *     This function is not used on SiS300, 540, 630 (unless
- *     VESA is used for mode switching); on these chips,
- *     the BIOS emulation (sis_bioc.s) does the job.
+/* TW: Init a mode for SiS 300 and 310/325 series
+ *     The original intention of the followling procedure was
+ *     to initialize various registers for the selected mode.
+ *     This was actually done to a structure, not the hardware.
+ *     (SiSRestore would write the structure to the hardware
+ *     registers.)
+ *     This function is now only used for setting up some
+ *     variables (eg. scrnOffset).
  */
 Bool
 SIS300Init(ScrnInfoPtr pScrn, DisplayModePtr mode)
 {
-    SISPtr  pSiS = SISPTR(pScrn);
-    SISRegPtr   pReg = &pSiS->ModeReg;
-    vgaRegPtr   vgaReg = &VGAHWPTR(pScrn)->ModeReg;
-    int vgaIOBase;
-    unsigned short  temp;
-    int offset=0;
-    int clock = mode->Clock;
-    unsigned int    vclk[5];
-
-    int num, denum, div, sbit, scale;
-    unsigned short  Threshold_Low, Threshold_High;
+    SISPtr         pSiS = SISPTR(pScrn);
+    SISRegPtr      pReg = &pSiS->ModeReg;
+    unsigned short temp;
 
     xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 4, "SIS300Init()\n");
+
     xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 4,
         "virtualX = %d depth = %d Logical width = %d\n",
-        pScrn->virtualX, pScrn->bitsPerPixel,
-        pScrn->virtualX * pScrn->bitsPerPixel/8);
-
-    vgaHWGetIOBase(VGAHWPTR(pScrn));
-    vgaIOBase = VGAHWPTR(pScrn)->IOBase;
+	pScrn->virtualX, pSiS->CurrentLayout.bitsPerPixel,
+        pScrn->virtualX * pSiS->CurrentLayout.bitsPerPixel/8);
 
+    /* Copy current register settings to structure */
     (*pSiS->SiSSave)(pScrn, pReg);
 
-    pSiS->scrnOffset = pScrn->displayWidth * ((pScrn->bitsPerPixel+7)/8);
-
-    pReg->sisRegs3C4[0x05] = 0x86;
+    /* TW: Calculate Offset/Display Pitch */
+    pSiS->scrnOffset = pSiS->CurrentLayout.displayWidth *
+                          ((pSiS->CurrentLayout.bitsPerPixel+7)/8);
+    pSiS->scrnPitch = pSiS->scrnOffset;
+    if (mode->Flags & V_INTERLACE)  pSiS->scrnPitch <<= 1;
 
-    /* TW: The following MUST be done even with VESA */
-    pReg->sisRegs3C4[6] &= ~GENMASK(4:2);
+#ifdef UNLOCK_ALWAYS
+    outSISIDXREG(SISSR, 0x05, 0x86);
+#endif
 
-    switch (pScrn->bitsPerPixel) {
+    switch(pSiS->CurrentLayout.bitsPerPixel) {
         case 8:
             pSiS->DstColor = 0x0000;
-            pReg->sisRegs3C4[6] |= 0x03;
+	    pSiS->SiS310_AccelDepth = 0x00000000;
             break;
         case 16:
-            if (pScrn->depth==15)  {
-                pSiS->DstColor = 0x4000;
-                pReg->sisRegs3C4[6] |= ((1 << 2) | 0x03);
-            } else {
+	    if(pSiS->CurrentLayout.depth == 15)
+	        pSiS->DstColor = (short) 0x4000;
+	    else
                 pSiS->DstColor = (short) 0x8000;
-                pReg->sisRegs3C4[6] |= ((2 << 2) | 0x03);
-            }
+	    pSiS->SiS310_AccelDepth = 0x00010000;
             break;
         case 24:
-            pReg->sisRegs3C4[6] |= ((3 << 2) | 0x03);
             break;
         case 32:
             pSiS->DstColor = (short) 0xC000;
-            pReg->sisRegs3C4[6] |= ((4 << 2) | 0x03);
+	    pSiS->SiS310_AccelDepth = 0x00020000;
             break;
     }
 
-    if (!pSiS->UseVESA) {	/* TW: Don't do the following when using VESA (NEW) */
-    pReg->sisRegs3D4[0x19] = 0;
-    pReg->sisRegs3D4[0x1A] &= 0xFC;
-
-    if (mode->Flags & V_INTERLACE)  {
-        offset = pSiS->scrnOffset >> 2;
-        pReg->sisRegs3C4[0x06] |= 0x20;
-        if (pSiS->Chipset != PCI_CHIP_SIS300)  {
-            temp = (mode->CrtcHSyncStart >> 3) -
-                (mode->CrtcHTotal >> 3)/2;
-            pReg->sisRegs3D4[0x19] = GETVAR8(temp);
-            pReg->sisRegs3D4[0x1A] |= GETBITS(temp, 9:8);
-        }
-    } else  {
-        offset = pSiS->scrnOffset >> 3;
-        pReg->sisRegs3C4[0x06] &= ~0x20;
-    }
-
-    pReg->sisRegs3C4[0x07] |= 0x10;     	/* enable High Speed DAC */
-    pReg->sisRegs3C4[0x07] &= 0xFC;
-    if (clock < 100000)
-        pReg->sisRegs3C4[0x07] |= 0x03;
-    else if (clock < 200000)
-        pReg->sisRegs3C4[0x07] |= 0x02;
-    else if (clock < 250000)
-        pReg->sisRegs3C4[0x07] |= 0x01;
-
-	pReg->sisRegs3C4[0x0A] = 			/* Extended Vertical Overflow */
-            GETBITSTR(mode->CrtcVTotal     -2, 10:10, 0:0) |
-            GETBITSTR(mode->CrtcVDisplay   -1, 10:10, 1:1) |
-            GETBITSTR(mode->CrtcVBlankStart  , 10:10, 2:2) |
-            GETBITSTR(mode->CrtcVSyncStart   , 10:10, 3:3) |
-            GETBITSTR(mode->CrtcVBlankEnd    ,   8:8, 4:4) |
-            GETBITSTR(mode->CrtcVSyncEnd     ,   4:4, 5:5) ;
-
-    	pReg->sisRegs3C4[0x0B] = 			/* Extended Horizontal Overflow */
-            GETBITSTR((mode->CrtcHTotal      >> 3) - 5, 9:8, 1:0) |
-            GETBITSTR((mode->CrtcHDisplay    >> 3) - 1, 9:8, 3:2) |
-            GETBITSTR((mode->CrtcHBlankStart >> 3)    , 9:8, 5:4) |
-            GETBITSTR((mode->CrtcHSyncStart  >> 3)    , 9:8, 7:6) ;
-
-    	pReg->sisRegs3C4[0x0C] &= 0xF8;
-    	pReg->sisRegs3C4[0x0C] |=
-            GETBITSTR(mode->CrtcHBlankEnd >> 3, 7:6, 1:0) |
-            GETBITSTR(mode->CrtcHSyncEnd  >> 3, 5:5, 2:2) ;
-
-
-    	vgaReg->CRTC[0x13] = GETVAR8(offset);	/* Screen Offset */
-    	pReg->sisRegs3C4[0x0E] &= 0xF0;
-    	pReg->sisRegs3C4[0x0E] |= GETBITS(offset, 11:8);
-
-    	if (mode->CrtcHDisplay > 0)		/* line compare */
-        	pReg->sisRegs3C4[0x0F] |= 0x08;
-    	else
-        	pReg->sisRegs3C4[0x0F] &= 0xF7;
-
-    	pReg->sisRegs3C4[0x10] =
-        ((mode->CrtcHDisplay *((pScrn->bitsPerPixel+7)/8) + 63) >> 6)+1;
-    }	/* VESA */
-
-/* TW: Enable PCI adressing (0x80) & MMIO enable (0x1) & ? (0x20) */
+    /* TW: Enable PCI LINEAR ADDRESSING (0x80), MMIO (0x01), PCI_IO (0x20) */
     pReg->sisRegs3C4[0x20] = 0xA1;
-/* TW: Enable 3D accelerator & ? */
-/* TW: 0x42 enables 2D accellerator (done below), 0x18 enables 3D engine */
-/*  pReg->sisRegs3C4[0x1E] = 0x18; */
-/* TW: !!! now done according to NoAccel setting !!! */
-
-    if (!pSiS->UseVESA) {	/* TW: clocks have surely been set by VESA, so don't touch them now */
-   	if (sis_compute_vclk(clock, &num, &denum, &div, &sbit, &scale)) {  /* Set vclk */
-        	pReg->sisRegs3C4[0x2B] = (num -1) & 0x7f;
-        	if (div == 2)
-            		pReg->sisRegs3C4[0x2B] |= 0x80;
-        	pReg->sisRegs3C4[0x2C] = ((denum -1) & 0x1f);
-        	pReg->sisRegs3C4[0x2C] |= (((scale-1)&3) << 5);
-        	if (sbit)
-            		pReg->sisRegs3C4[0x2C] |= 0x80;
-        	pReg->sisRegs3C4[0x2D] = 0x80;
-    	}
-    	else  {
-    		/* if sis_compute_vclk cannot handle the request clock try sisCalcClock! */
-        	SiSCalcClock(pScrn, clock, 2, vclk);
-        	pReg->sisRegs3C4[0x2B] = (vclk[Midx] - 1) & 0x7f ;
-        	pReg->sisRegs3C4[0x2B] |= ((vclk[VLDidx] == 2 ) ? 1 : 0 ) << 7 ;
-
-        	/* bits [4:0] contain denumerator -MC */
-        	pReg->sisRegs3C4[0x2C] = (vclk[Nidx] -1) & 0x1f ;
-
-        	if (vclk[Pidx] <= 4)  {
-        	/* postscale 1,2,3,4 */
-            		pReg->sisRegs3C4[0x2C] |= (vclk[Pidx] -1 ) << 5 ;
-            		pReg->sisRegs3C4[0x2C] &= 0x7F;
-        	} else  {
-        	/* postscale 6,8 */
-            		pReg->sisRegs3C4[0x2C] |= ((vclk[Pidx] / 2) -1 ) << 5 ;
-            		pReg->sisRegs3C4[0x2C] |= 0x80;
-        	}
-        	pReg->sisRegs3C4[0x2D] = 0x80;
-    	} /* end of set vclk */
-
-    	if (clock > 150000)  {  			/* enable two-pixel mode */
-        	pReg->sisRegs3C4[0x07] |= 0x80;
-        	pReg->sisRegs3C4[0x32] |= 0x08;
-    	} else  {
-        	pReg->sisRegs3C4[0x07] &= 0x7F;
-        	pReg->sisRegs3C4[0x32] &= 0xF7;
-    	}
-
-    	pReg->sisRegs3C2 = inb(0x3CC) | 0x0C; 	/* Programmable Clock */
-    }  /* VESA */
 
 /* TW: Now initialize TurboQueue. TB is always located at the very top of
-       the videoRAM (notably NOT the x framebuffer memory, which can/should
-       be limited when using DRI)
-*/
+ *     the videoRAM (notably NOT the x framebuffer memory, which can/should
+ *     be limited by MaxXFbMem when using DRI). Also, enable the accelerators.
+ */
     if (!pSiS->NoAccel) {
-        pReg->sisRegs3C4[0x1E] |= 0x42;  /* TW: Enable 2D accellerator */
-	pReg->sisRegs3C4[0x1E] |= 0x18;  /* TW: Enable 3D accellerator */
-        if (pSiS->TurboQueue)  {    		/* set Turbo Queue as 512k */
+        pReg->sisRegs3C4[0x1E] |= 0x42;  /* TW: Enable 2D accelerator */
+	pReg->sisRegs3C4[0x1E] |= 0x18;  /* TW: Enable 3D accelerator */
+	switch (pSiS->VGAEngine) {
+	case SIS_300_VGA:
+	  if(pSiS->TurboQueue)  {    		/* set Turbo Queue as 512k */
 	    temp = ((pScrn->videoRam/64)-8);    /* TW: 8=512k, 4=256k, 2=128k, 1=64k */
             pReg->sisRegs3C4[0x26] = temp & 0xFF;
 	    pReg->sisRegs3C4[0x27] =
 		(pReg->sisRegs3C4[0x27] & 0xfc) | (((temp >> 8) & 3) | 0xF0);
-        }	/* TW: line above new for saving D2&3 of state register */
-    }
-
-    if (!pSiS->UseVESA) {
-	/* set threshold value */
-    	(*pSiS->SetThreshold)(pScrn, mode, &Threshold_Low, &Threshold_High);
-    	pReg->sisRegs3C4[0x08] = GETBITSTR(Threshold_Low, 3:0, 7:4) | 0xF;
-    	pReg->sisRegs3C4[0x0F] &= ~GENMASK(5:5);
-    	pReg->sisRegs3C4[0x0F] |= GETBITSTR(Threshold_Low, 4:4, 5:5);
-    	pReg->sisRegs3C4[0x09] &= ~GENMASK(3:0);
-    	pReg->sisRegs3C4[0x09] |= GETBITS(Threshold_High, 3:0);
+          }	/* TW: line above new for saving D2&3 of status register */
+	  break;
+	case SIS_315_VGA:
+	  /* See comments in sis_driver.c */
+	  pReg->sisRegs3C4[0x27] = 0x1F;
+	  pReg->sisRegs3C4[0x26] = 0x22;
+	  pReg->sisMMIO85C0 = (pScrn->videoRam - 512) * 1024;
+	  break;
+	}
     }
 
     return(TRUE);
 }
 
-/* TW: Detect video bridge and set VBFlags accordingly */
-void SISVGAPreInit(ScrnInfoPtr pScrn)
+int
+SISDoSense(ScrnInfoPtr pScrn, int tempbl, int tempbh, int tempcl, int tempch)
 {
     SISPtr  pSiS = SISPTR(pScrn);
-    int     temp;
-    char    BIOSversion[]="x.xx.xx\0";
-    unsigned short usOffsetHigh, usOffsetLow, vBiosRevision;
-    unsigned long   ROMAddr  = (unsigned long) SISPTR(pScrn)->BIOS;
+    int temp;
+
+    outSISIDXREG(SISPART4,0x11,tempbl);
+    temp = tempbh | tempcl;
+    setSISIDXREG(SISPART4,0x10,0xe0,temp);
+    usleep(200000);
+    tempch &= 0x7f;
+    inSISIDXREG(SISPART4,0x03,temp);
+    temp ^= 0x0e;
+    temp &= tempch;
+    return(temp);
+}
 
-    for (temp = 0; temp < 7; temp++) {
-        BIOSversion[temp] = *((unsigned char *)(ROMAddr+temp+0x06));
+/* TW: Sense connected devices on 30x */
+void SISSense30x(ScrnInfoPtr pScrn)
+{
+    SISPtr  pSiS = SISPTR(pScrn);
+    unsigned char backupP4_0d,biosflag;
+    unsigned char testsvhs_tempbl, testsvhs_tempbh;
+    unsigned char testsvhs_tempcl, testsvhs_tempch;
+    unsigned char testcvbs_tempbl, testcvbs_tempbh;
+    unsigned char testcvbs_tempcl, testcvbs_tempch;
+    unsigned char testvga2_tempbl, testvga2_tempbh;
+    unsigned char testvga2_tempcl, testvga2_tempch;
+    int myflag, result;
+    unsigned short temp;
+
+    inSISIDXREG(SISPART4,0x0d,backupP4_0d);
+    outSISIDXREG(SISPART4,0x0d,(backupP4_0d | 0x04));
+
+    if(pSiS->VGAEngine == SIS_315_VGA) {
+       if(pSiS->sishw_ext.UseROM) {
+          temp = 0xf3;
+	  if(pSiS->Chipset == PCI_CHIP_SIS330) temp = 0x11b;
+          if(pSiS->BIOS[temp] & 0x08) {
+	      xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+	          "SiS30x: Video bridge has (unsupported) DVI combo connector\n");
+	      orSISIDXREG(SISCR, 0x32, 0x80);
+          } else {
+	      andSISIDXREG(SISCR, 0x32, 0x7f);
+	  }
+       }
     }
 
-    xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Video BIOS version %s detected\n", BIOSversion);
+    if(pSiS->VGAEngine == SIS_300_VGA) {
 
-    usOffsetHigh = *((unsigned char *)(ROMAddr+0x08)) - 0x30;
-    usOffsetLow  = *((unsigned char *)(ROMAddr+0x09)) - 0x30;
-    vBiosRevision = usOffsetHigh << 4 | usOffsetLow;
-#if 0	/* TW: What's this good for? Check the BIOS revision???? That can't be correct! */
-    if (vBiosRevision < 0x02) {
-        outSISIDXREG(pSiS->RelIO+CROFFSET, 0x37, 0);
-        inSISIDXREG(pSiS->RelIO+CROFFSET, 0x36, temp);
-        temp &= 0x07;
-        outSISIDXREG(pSiS->RelIO+CROFFSET, 0x36, temp);
-    }
-#endif
-    outb(SISPART4, 0x00);
-    temp = inb(SISPART4+1) & 0x0F;
-    pSiS->VBFlags = 0; /*reset*/
-    if (temp == 1) {
-	outb(SISPART4, 0x01);	/* TW: new for 301b; support is yet incomplete */
-	temp = inb(SISPART4+1) & 0xff;
-	if (temp >= 0xB0) {
-	        pSiS->VBFlags|=VB_301B;  /* TW: 301b */
-    		xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Detected SiS301B video bridge\n");
+        if(pSiS->sishw_ext.UseROM) {
+	   testvga2_tempbh = pSiS->BIOS[0xf9]; testvga2_tempbl = pSiS->BIOS[0xf8];
+	   testsvhs_tempbh = pSiS->BIOS[0xfb]; testsvhs_tempbl = pSiS->BIOS[0xfa];
+	   testcvbs_tempbh = pSiS->BIOS[0xfd]; testcvbs_tempbl = pSiS->BIOS[0xfc];
+	   biosflag = pSiS->BIOS[0xfe];
 	} else {
-	        pSiS->VBFlags|=VB_301;   /*301*/
-		xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Detected SiS301 video bridge\n");
+	   testvga2_tempbh = 0x00; testvga2_tempbl = 0xd1;
+           testsvhs_tempbh = 0x00; testsvhs_tempbl = 0xb9;
+	   testcvbs_tempbh = 0x00; testcvbs_tempbl = 0xb3;
+	   biosflag = 0;
 	}
-	outb(SISPART4, 0x23);	/* TW: new */
-	temp = inb(SISPART4+1) & 0xff;
-	if (!(temp & 0x02))  {
-	        pSiS->VBFlags|=VB_NOLCD; /* TW: flag yet unused */
-		xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "[SiS301: NoLCD flag detected]\n");
+	if(pSiS->VBFlags & (VB_301B|VB_302B|VB_30xLV|VB_30xLVX)) {
+	   testvga2_tempbh = 0x01; testvga2_tempbl = 0x90;
+	   testsvhs_tempbh = 0x01; testsvhs_tempbl = 0x6b;
+	   testcvbs_tempbh = 0x01; testcvbs_tempbl = 0x74;
 	}
-    }
-    else if (temp == 2) {
-        pSiS->VBFlags|=VB_302;  /*302*/
-    	xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Detected SiS302(B) video bridge\n");
-	outb(SISPART4, 0x38);	/* TW: new; LCDA (?) support - yet incomplete */
-	temp = inb(SISPART4+1) & 0xff;
-	if (temp == 0x03) {
-		pSiS->VBFlags|=VB_LCDA; /* TW: flag yet unused */
-		xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
-		         "[SiS302: LCDA flag detected]\n");
+	inSISIDXREG(SISPART4,0x01,myflag);
+	if(myflag & 0x04) {
+	   testvga2_tempbh = 0x00; testvga2_tempbl = 0xfd;
+	   testsvhs_tempbh = 0x00; testsvhs_tempbl = 0xdd;
+	   testcvbs_tempbh = 0x00; testcvbs_tempbl = 0xee;
 	}
-    }
-    else if (temp == 3) {
-        pSiS->VBFlags|=VB_303;  /*303*/
-    	xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Detected SiS303 video bridge\n");
-    }
-    else {
-        outb(SISCR, 0x37);
-        temp = ((inb(SISCR+1))>>1) & 0x07;
-	if ((temp == 2) || (temp == 3) || (temp == 4)) {
-            pSiS->VBFlags |= VB_LVDS;
-    	    xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
-	             "Detected LVDS video bridge (Type %d)\n", temp);
+	testvga2_tempch = 0x0e;	testvga2_tempcl = 0x08;
+	testsvhs_tempch = 0x06;	testsvhs_tempcl = 0x04;
+	testcvbs_tempch = 0x08; testcvbs_tempcl = 0x04;
+
+    } else if((pSiS->Chipset == PCI_CHIP_SIS315) ||
+    	      (pSiS->Chipset == PCI_CHIP_SIS315H) ||
+	      (pSiS->Chipset == PCI_CHIP_SIS315PRO)) {
+
+	if(pSiS->sishw_ext.UseROM) {
+	   testvga2_tempbh = pSiS->BIOS[0xbe]; testvga2_tempbl = pSiS->BIOS[0xbd];
+	   testsvhs_tempbh = pSiS->BIOS[0xc0]; testsvhs_tempbl = pSiS->BIOS[0xbf];
+	   testcvbs_tempbh = pSiS->BIOS[0xc2]; testcvbs_tempbl = pSiS->BIOS[0xc1];
+	   biosflag = pSiS->BIOS[0xf3];
+	} else {
+	   testvga2_tempbh = 0x00; testvga2_tempbl = 0xd1;
+           testsvhs_tempbh = 0x00; testsvhs_tempbl = 0xb9;
+	   testcvbs_tempbh = 0x00; testcvbs_tempbl = 0xb3;
+	   biosflag = 0;
+	}
+	if(pSiS->VBFlags & (VB_301B|VB_302B|VB_30xLV|VB_30xLVX)) {
+	   if(pSiS->sishw_ext.UseROM) {
+	      testvga2_tempbh = pSiS->BIOS[0xc4]; testvga2_tempbl = pSiS->BIOS[0xc3];
+	      testsvhs_tempbh = pSiS->BIOS[0xc6]; testsvhs_tempbl = pSiS->BIOS[0xc5];
+	      testcvbs_tempbh = pSiS->BIOS[0xc8]; testcvbs_tempbl = pSiS->BIOS[0xc7];
+	   } else {
+	      testvga2_tempbh = 0x01; testvga2_tempbl = 0x90;
+	      testsvhs_tempbh = 0x01; testsvhs_tempbl = 0x6b;
+	      testcvbs_tempbh = 0x01; testcvbs_tempbl = 0x74;
+	   }
+	}
+	inSISIDXREG(SISPART4,0x01,myflag);
+	if(myflag & 0x04) {
+	   testvga2_tempbh = 0x00; testvga2_tempbl = 0xfd;
+	   testsvhs_tempbh = 0x00; testsvhs_tempbl = 0xdd;
+	   testcvbs_tempbh = 0x00; testcvbs_tempbl = 0xee;
+	}
+	testvga2_tempch = 0x0e;	testvga2_tempcl = 0x08;
+	testsvhs_tempch = 0x06;	testsvhs_tempcl = 0x04;
+	testcvbs_tempch = 0x08; testcvbs_tempcl = 0x04;
+
+    } else if(pSiS->Chipset == PCI_CHIP_SIS330) {
+
+	if(pSiS->sishw_ext.UseROM) {
+	   testvga2_tempbh = pSiS->BIOS[0xe6]; testvga2_tempbl = pSiS->BIOS[0xe5];
+	   testsvhs_tempbh = pSiS->BIOS[0xe8]; testsvhs_tempbl = pSiS->BIOS[0xe7];
+	   testcvbs_tempbh = pSiS->BIOS[0xea]; testcvbs_tempbl = pSiS->BIOS[0xe9];
+	   biosflag = pSiS->BIOS[0x11b];
+	} else {
+	   testvga2_tempbh = 0x00; testvga2_tempbl = 0xd1;
+           testsvhs_tempbh = 0x00; testsvhs_tempbl = 0xb9;
+	   testcvbs_tempbh = 0x00; testcvbs_tempbl = 0xb3;
+	   biosflag = 0;
 	}
-        if ((temp == 4) || (temp == 5))  {
-            pSiS->VBFlags |= VB_CHRONTEL;
-    	    xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
-	             "Detected CHRONTEL 7500 VGA->TV converter (Type %d)\n", temp);
+	if(pSiS->VBFlags & (VB_301B|VB_302B|VB_30xLV|VB_30xLVX)) {
+	   if(pSiS->sishw_ext.UseROM) {
+	      testvga2_tempbh = pSiS->BIOS[0xec]; testvga2_tempbl = pSiS->BIOS[0xeb];
+	      testsvhs_tempbh = pSiS->BIOS[0xee]; testsvhs_tempbl = pSiS->BIOS[0xed];
+	      testcvbs_tempbh = pSiS->BIOS[0xf0]; testcvbs_tempbl = pSiS->BIOS[0xef];
+	   } else {
+	      testvga2_tempbh = 0x01; testvga2_tempbl = 0x90;
+	      testsvhs_tempbh = 0x01; testsvhs_tempbl = 0x6b;
+	      testcvbs_tempbh = 0x01; testcvbs_tempbl = 0x74;
+	   }
 	}
-	if (temp == 3) {
-            xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
-	             "Detected TRUMPION TV converter. This device is not supported yet.\n");
+	inSISIDXREG(SISPART4,0x01,myflag);
+	if(myflag & 0x04) {
+	   testvga2_tempbh = 0x00; testvga2_tempbl = 0xfd;
+	   testsvhs_tempbh = 0x00; testsvhs_tempbl = 0xdd;
+	   testcvbs_tempbh = 0x00; testcvbs_tempbl = 0xee;
 	}
-	if ((temp < 2) || (temp > 5)) {
+	testvga2_tempch = 0x0e;	testvga2_tempcl = 0x08;
+	testsvhs_tempch = 0x06;	testsvhs_tempcl = 0x04;
+	testcvbs_tempch = 0x08; testcvbs_tempcl = 0x04;
+
+    } else {  /* 550?, 650, 740 */
+
+        if(pSiS->sishw_ext.UseROM) {
+	   testvga2_tempbh = pSiS->BIOS[0xbe]; testvga2_tempbl = pSiS->BIOS[0xbd];
+	   testsvhs_tempbh = pSiS->BIOS[0xc0]; testsvhs_tempbl = pSiS->BIOS[0xbf];
+	   testcvbs_tempbh = pSiS->BIOS[0xc2]; testcvbs_tempbl = pSiS->BIOS[0xc1];
+	   biosflag = pSiS->BIOS[0xf3];
+	} else {
+	   testvga2_tempbh = 0x00; testvga2_tempbl = 0xd1;
+           testsvhs_tempbh = 0x00; testsvhs_tempbl = 0xb9;
+	   testcvbs_tempbh = 0x00; testcvbs_tempbl = 0xb3;
+	   biosflag = 0;
+	}
+	testvga2_tempch = 0x0e;	testvga2_tempcl = 0x08;
+	testsvhs_tempch = 0x06; testsvhs_tempcl = 0x04;
+	testcvbs_tempch = 0x08; testcvbs_tempcl = 0x04;
+
+        /* TW: Different BIOS versions use different values for the 301LV.
+	       These values are from the newest versions 1.10.6? and 1.10.7?.
+	       I have no idea if these values are suitable for the 301B as well.
+	 */
+
+	if(pSiS->VBFlags & (VB_301B|VB_302B|VB_30xLV|VB_30xLVX)) {
+  	   if(pSiS->sishw_ext.UseROM) {
+	      testvga2_tempbh = pSiS->BIOS[0xc4]; testvga2_tempbl = pSiS->BIOS[0xc3];
+	      testsvhs_tempbh = pSiS->BIOS[0xc6]; testsvhs_tempbl = pSiS->BIOS[0xc5];
+	      testcvbs_tempbh = pSiS->BIOS[0xc8]; testcvbs_tempbl = pSiS->BIOS[0xc7];
+	      biosflag = pSiS->BIOS[0xf3];
+	   } else {
+	      testvga2_tempbh = 0x01; testvga2_tempbl = 0x90;
+	      testsvhs_tempbh = 0x02; testsvhs_tempbl = 0x00;
+	      testcvbs_tempbh = 0x01; testcvbs_tempbl = 0x00;
+	      biosflag = 0;
+	   }
+	   testvga2_tempch = 0x0e; testvga2_tempcl = 0x08;
+	   testsvhs_tempch = 0x04; testsvhs_tempcl = 0x08;
+	   testcvbs_tempch = 0x08; testcvbs_tempcl = 0x08;
+	}
+
+    }
+
+    /* TW: No VGA2 or SCART on LV bridges */
+    if(pSiS->VBFlags & (VB_30xLV|VB_30xLVX)) {
+	testvga2_tempbh = testvga2_tempbl = 0x00;
+	testvga2_tempch = testvga2_tempcl = 0x00;
+    }
+
+    if(testvga2_tempch || testvga2_tempcl || testvga2_tempbh || testvga2_tempbl) {
+#ifdef TWDEBUG
+       xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+                "SiS30x: Scanning for VGA2/SCART (%x %x %x %x)\n",
+    		testvga2_tempbh, testvga2_tempbl, testvga2_tempch, testvga2_tempcl);
+#endif
+
+       result = SISDoSense(pScrn, testvga2_tempbl, testvga2_tempbh,
+                               testvga2_tempcl, testvga2_tempch);
+       if(result) {
+           if(biosflag & 0x01) {
+	      xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+	         "SiS30x: Detected TV connected to SCART output\n");
+	      pSiS->VBFlags |= TV_SCART;
+	      orSISIDXREG(SISCR, 0x32, 0x04);
+	      pSiS->postVBCR32 |= 0x04;
+	   } else if(!(pSiS->VBFlags & (VB_30xLV|VB_30xLVX))) {
+	      xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+	         "SiS30x: Detected secondary VGA connection\n");
+	      pSiS->VBFlags |= VGA2_CONNECTED;
+	      orSISIDXREG(SISCR, 0x32, 0x10);
+	      pSiS->postVBCR32 |= 0x10;
+	   }
+       }
+    }
+
+#ifdef TWDEBUG
+    xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+                "SiS30x: Scanning for TV (%x %x %x %x; %x %x %x %x)\n",
+    		testsvhs_tempbh, testsvhs_tempbl, testsvhs_tempch, testsvhs_tempcl,
+		testcvbs_tempbh, testcvbs_tempbl, testcvbs_tempch, testcvbs_tempcl);
+#endif
+
+    result = SISDoSense(pScrn, testsvhs_tempbl, testsvhs_tempbh,
+                               testsvhs_tempcl, testsvhs_tempch);
+    if(result) {
+        xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+	      "SiS30x: Detected TV connected to SVIDEO output\n");
+        /* TW: So we can be sure that there IS a SVIDEO output */
+	pSiS->VBFlags |= TV_SVIDEO;
+	orSISIDXREG(SISCR, 0x32, 0x02);
+	pSiS->postVBCR32 |= 0x02;
+    }
+
+    if((biosflag & 0x02) || (!(result))) {
+
+        result = SISDoSense(pScrn, testcvbs_tempbl, testcvbs_tempbh,
+	                           testcvbs_tempcl, testcvbs_tempch);
+	if(result) {
 	    xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
-	             "Detected unknown bridge type (%d)\n", temp);
+	          "SiS30x: Detected TV connected to COMPOSITE output\n");
+	    /* TW: So we can be sure that there IS a CVBS output */
+	    pSiS->VBFlags |= TV_AVIDEO;
+	    orSISIDXREG(SISCR, 0x32, 0x01);
+	    pSiS->postVBCR32 |= 0x01;
 	}
     }
+    SISDoSense(pScrn, 0, 0, 0, 0);
+
+    outSISIDXREG(SISPART4,0x0d,backupP4_0d);
+}
+
+static void
+SiS6326TVDelay(ScrnInfoPtr pScrn, int delay)
+{
+    SISPtr  pSiS = SISPTR(pScrn);
+    int i;
+    unsigned char temp;
+
+    for(i=0; i<delay; i++) {
+    	inSISIDXREG(SISSR, 0x05, temp);
+    }
+}
+
+int
+SIS6326DoSense(ScrnInfoPtr pScrn, int tempbh, int tempbl, int tempch, int tempcl)
+{
+    unsigned char temp;
+
+    SiS6326SetTVReg(pScrn, 0x42, tempbl);
+    temp = SiS6326GetTVReg(pScrn, 0x43);
+    temp &= 0xfc;
+    temp |= tempbh;
+    SiS6326SetTVReg(pScrn, 0x43, temp);
+    SiS6326TVDelay(pScrn, 0x1000);
+    temp = SiS6326GetTVReg(pScrn, 0x43);
+    temp |= 0x04;
+    SiS6326SetTVReg(pScrn, 0x43, temp);
+    SiS6326TVDelay(pScrn, 0x8000);
+    temp = SiS6326GetTVReg(pScrn, 0x44);
+    if(!(tempch & temp)) tempcl = 0;
+    return(tempcl);
+}
+
+void
+SISSense6326(ScrnInfoPtr pScrn)
+{
+    SISPtr pSiS = SISPTR(pScrn);
+    unsigned char temp;
+    int result;
+
+    pSiS->SiS6326Flags &= (SIS6326_HASTV | SIS6326_TVPAL);
+    temp = SiS6326GetTVReg(pScrn, 0x43);
+    temp &= 0xfb;
+    SiS6326SetTVReg(pScrn, 0x43, temp);
+    result = SIS6326DoSense(pScrn, 0x01, 0xb0, 0x06, SIS6326_TVSVIDEO);  /* 0x02 */
+    pSiS->SiS6326Flags |= result;
+    result = SIS6326DoSense(pScrn, 0x01, 0xa0, 0x01, SIS6326_TVCVBS);    /* 0x04 */
+    pSiS->SiS6326Flags |= result;
+    temp = SiS6326GetTVReg(pScrn, 0x43);
+    temp &= 0xfb;
+    SiS6326SetTVReg(pScrn, 0x43, temp);
+    if(pSiS->SiS6326Flags & (SIS6326_TVSVIDEO | SIS6326_TVCVBS)) {
+    	pSiS->SiS6326Flags |= SIS6326_TVDETECTED;
+	xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+		"SiS6326: Detected TV connected to %s output\n",
+		(pSiS->SiS6326Flags & SIS6326_TVSVIDEO) ?
+			"SVIDEO" : "COMPOSITE");
+    } else {
+        xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+		"SiS6326: No TV detected\n");
+    }
+}
+
+/* TW: Detect video bridge and set VBFlags accordingly */
+void SISVGAPreInit(ScrnInfoPtr pScrn)
+{
+    SISPtr  pSiS = SISPTR(pScrn);
+    int     temp,temp1,temp2;
+    int     upperlimitlvds, lowerlimitlvds;
+    int     upperlimitch, lowerlimitch;
+    int     chronteltype, chrontelidreg;
+    static const char  *ChrontelTypeStr[] = {
+        "7004",
+	"7005",
+	"7007",
+	"7006",
+	"7008",
+	"7013",
+	"7019",
+	"7020",
+	"(unknown)"
+    };
 
     switch (pSiS->Chipset) {
         case PCI_CHIP_SIS300:
         case PCI_CHIP_SIS630:
         case PCI_CHIP_SIS540:
+	case PCI_CHIP_SIS550:
+	case PCI_CHIP_SIS650:
+	case PCI_CHIP_SIS315:
+	case PCI_CHIP_SIS315H:
+	case PCI_CHIP_SIS315PRO:
+	case PCI_CHIP_SIS330:
             pSiS->ModeInit = SIS300Init;
             break;
         default:
             pSiS->ModeInit = SISInit;
     }
+
+    if((pSiS->Chipset == PCI_CHIP_SIS6326) && (pSiS->SiS6326Flags & SIS6326_HASTV)) {
+        unsigned char sr0d;
+	inSISIDXREG(SISSR, 0x0d, sr0d);
+	if(sr0d & 0x04) {
+		pSiS->SiS6326Flags |= SIS6326_TVPAL;
+	}
+	SISSense6326(pScrn);
+    }
+
+    pSiS->VBFlags = 0; /* reset VBFlags */
+
+    /* TW: Videobridges only available for 300/310/325 series */
+    if((pSiS->VGAEngine != SIS_300_VGA) && (pSiS->VGAEngine != SIS_315_VGA))
+        return;
+
+    inSISIDXREG(SISPART4, 0x00, temp);
+    temp &= 0x0F;
+    if (temp == 1) {
+        inSISIDXREG(SISPART4, 0x01, temp1);
+	temp1 &= 0xff;
+	if (temp1 >= 0xE0) {
+	   	pSiS->VBFlags |= VB_30xLVX;
+		pSiS->sishw_ext.ujVBChipID = VB_CHIP_301LVX;
+    		xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+		                "Detected SiS301LVX video bridge (Revision 0x%x)\n",
+				temp1);
+	} else if (temp1 >= 0xD0) {
+	   	pSiS->VBFlags |= VB_30xLV;
+		pSiS->sishw_ext.ujVBChipID = VB_CHIP_301LV;
+    		xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+		                "Detected SiS301LV video bridge (Revision 0x%x)\n",
+				temp1);
+	} else if (temp1 >= 0xB0) {
+	        pSiS->VBFlags |= VB_301B;
+		pSiS->sishw_ext.ujVBChipID = VB_CHIP_301B;
+    		xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+		                "Detected SiS301B video bridge (Revision 0x%x)\n",
+				temp1);
+	} else {
+	        pSiS->VBFlags |= VB_301;
+		pSiS->sishw_ext.ujVBChipID = VB_CHIP_301;
+		xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+		                "Detected SiS301 video bridge (Revision 0x%x)\n",
+				temp1);
+	}
+	if (pSiS->VBFlags & (VB_30xLV | VB_30xLVX)) {
+	   inSISIDXREG(SISCR, 0x38, temp);
+	   if((temp & 0x03) == 0x03) {
+		xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+		                "[SiS301LV/LVX: LCD channel A]\n");
+	   }
+	}
+
+	SISSense30x(pScrn);
+
+    } else if (temp == 2) {
+
+        inSISIDXREG(SISPART4, 0x01, temp1);
+	temp1 &= 0xff;
+	if (temp1 >= 0xE0) {
+        	pSiS->VBFlags |= VB_30xLVX;
+		pSiS->sishw_ext.ujVBChipID = VB_CHIP_302LVX;
+    		xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+		                "Detected SiS302LVX video bridge (Revision 0x%x)\n",
+				temp1);
+	} else if (temp1 >= 0xD0) {
+        	pSiS->VBFlags |= VB_30xLV;
+		pSiS->sishw_ext.ujVBChipID = VB_CHIP_302LV;
+    		xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+		                "Detected SiS302LV video bridge (Revision 0x%x)\n",
+				temp1);
+	} else {
+	        pSiS->VBFlags |= VB_302B;
+		pSiS->sishw_ext.ujVBChipID = VB_CHIP_302B;
+    		xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+		                "Detected SiS302B video bridge (Revision 0x%x)\n",
+				temp1);
+	}
+	if (pSiS->VBFlags & (VB_302B | VB_30xLV | VB_30xLVX)) {
+	   inSISIDXREG(SISCR, 0x38, temp);
+	   if((temp & 0x03) == 0x03) {
+		xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+		                "[SiS302B/LV/LVX: LCD channel A]\n");
+	   }
+	}
+
+	SISSense30x(pScrn);
+
+    } else if (temp == 3) {
+
+        pSiS->VBFlags |= VB_303;
+	pSiS->sishw_ext.ujVBChipID = VB_CHIP_303;
+    	xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+	           "Detected SiS303 video bridge\n");
+
+    } else {
+
+        pSiS->sishw_ext.ujVBChipID = VB_CHIP_UNKNOWN;
+	inSISIDXREG(SISCR, 0x37, temp);
+        temp = (temp >> 1) & 0x07;
+#if 0   /* TW: This does not seem to be used on any machine */
+	if ( (temp == 0) || (temp == 1)) {
+	    pSiS->VBFlags|=VB_301;   /* TW: 301 ? */
+	    xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+	               "Detected SiS301 video bridge (Irregular bridge type %d)\n", temp);
+	}
+#endif
+        if(pSiS->VGAEngine == SIS_300_VGA) {
+	   lowerlimitlvds = 2; upperlimitlvds = 4;
+	   lowerlimitch   = 4; upperlimitch   = 5;
+	   chronteltype = 1;   chrontelidreg  = 0x25;
+        } else {
+	   lowerlimitlvds = 2; upperlimitlvds = 3;
+	   lowerlimitch   = 3; upperlimitch   = 3;
+	   chronteltype = 2;   chrontelidreg  = 0x4b;
+	}
+
+	if((temp >= lowerlimitlvds) && (temp <= upperlimitlvds)) {
+               pSiS->VBFlags |= VB_LVDS;
+    	       xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+	               "Detected LVDS transmitter (Bridge type %d)\n", temp);
+	       if(pSiS->Chipset == PCI_CHIP_SIS650) {
+	       	   inSISIDXREG(SISCR, 0x38, temp1);
+                   if(temp1 & 0x02) {
+		      xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+		                 "[LVDS: LCD channel A]\n");
+		   }
+		   if(temp1 & 0x08) {
+		      xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+		                 "[LVDS: HDTV]\n");
+		   }
+		   if(temp1 & 0x08) {
+		      xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+		                 "[LVDS: SCART]\n");
+		   }
+	       }
+	}
+        if((temp >= lowerlimitch) && (temp <= upperlimitch))  {
+	    /* TW: Set global for init301.c */
+	    pSiS->SiS_Pr->SiS_IF_DEF_CH70xx = chronteltype;
+
+	    if(chronteltype == 1) {
+	       /* TW: Do something mysterious (found in Mitac BIOS) */
+	       SiS_WhatIsThis(pSiS->SiS_Pr, 0x9c);
+	    }
+
+	    /* TW: Read Chrontel version number */
+ 	    temp1 = SiS_GetCH70xx(pSiS->SiS_Pr, chrontelidreg);
+	    if(chronteltype == 1) {
+	        /* TW: See Chrontel TB31 for explanation */
+		temp2 = SiS_GetCH700x(pSiS->SiS_Pr, 0x0e);
+		if(((temp2 & 0x07) == 0x01) || (temp & 0x04)) {
+		    SiS_SetCH700x(pSiS->SiS_Pr, 0x0b0e);
+		    SiS_DDC2Delay(pSiS->SiS_Pr, 300);
+		}
+	        temp2 = SiS_GetCH70xx(pSiS->SiS_Pr, chrontelidreg);
+		if(temp2 != temp1) temp1 = temp2;
+	    }
+	    if(temp1 == 0xFFFF) {	/* 0xFFFF = error reading DDC port */
+	    	xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+			"Detected Chrontel 70xx, but encountered error reading I2C port\n");
+	    }
+	    /* TW: We only support device ids 0x19-200; other values may indicate DDC problems */
+	    else if((temp1 >= 0x19) && (temp1 <= 200)) {
+	        pSiS->VBFlags |= VB_CHRONTEL;
+		switch (temp1) {
+		   case 0x32: temp2 = 0; pSiS->ChrontelType = CHRONTEL_700x; break;
+		   case 0x3A: temp2 = 1; pSiS->ChrontelType = CHRONTEL_700x; break;
+		   case 0x50: temp2 = 2; pSiS->ChrontelType = CHRONTEL_700x; break;
+		   case 0x2A: temp2 = 3; pSiS->ChrontelType = CHRONTEL_700x; break;
+		   case 0x40: temp2 = 4; pSiS->ChrontelType = CHRONTEL_700x; break;
+		   case 0x22: temp2 = 5; pSiS->ChrontelType = CHRONTEL_700x; break;
+	           case 0x19: temp2 = 6; pSiS->ChrontelType = CHRONTEL_701x; break;
+	           case 0x20: temp2 = 7; pSiS->ChrontelType = CHRONTEL_701x; break;  /* ID for 7020? */
+		   default:   temp2 = 8; pSiS->ChrontelType = CHRONTEL_701x; break;
+		}
+   	        xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+	               "Detected Chrontel %s TV encoder (ID 0x%02x; bridge type %d)\n",
+		       			ChrontelTypeStr[temp2], temp1, temp);
+
+		/* TW: Sense connected TV's */
+
+		if(chronteltype == 1) {
+
+		   /* Chrontel 700x */
+
+	    	   /* TW: Read power status */
+	    	   temp1 = SiS_GetCH700x(pSiS->SiS_Pr, 0x0e);  /* Power status */
+	    	   if((temp1 & 0x03) != 0x03) {
+		        /* TW: Power all outputs */
+	        	SiS_SetCH700x(pSiS->SiS_Pr, 0x0B0E);
+			SiS_DDC2Delay(pSiS->SiS_Pr, 0x96);
+	    	   }
+		   /* TW: Sense connected TV devices */
+	    	   SiS_SetCH700x(pSiS->SiS_Pr, 0x0110);
+		   SiS_DDC2Delay(pSiS->SiS_Pr, 0x96);
+	    	   SiS_SetCH700x(pSiS->SiS_Pr, 0x0010);
+		   SiS_DDC2Delay(pSiS->SiS_Pr, 0x96);
+	    	   temp1 = SiS_GetCH700x(pSiS->SiS_Pr, 0x10);
+		   if(!(temp1 & 0x08))       temp1 = 0x02;
+		   else if(!(temp1 & 0x02))  temp1 = 0x01;
+		   else                      temp1 = 0;
+
+		} else {
+
+		   /* Chrontel 701x */
+
+		   /* TW: Backup Power register */
+		   temp1 = SiS_GetCH701x(pSiS->SiS_Pr, 0x49);
+
+		   /* TW: Enable TV path */
+		   SiS_SetCH701x(pSiS->SiS_Pr, 0x2049);
+
+		   SiS_DDC2Delay(pSiS->SiS_Pr, 0x96);
+
+		   /* TW: Sense connected TV devices */
+		   temp2 = SiS_GetCH701x(pSiS->SiS_Pr, 0x20);
+		   temp2 |= 0x01;
+		   SiS_SetCH701x(pSiS->SiS_Pr, (temp2 << 8) | 0x20);
+
+		   SiS_DDC2Delay(pSiS->SiS_Pr, 0x96);
+
+		   temp2 ^= 0x01;
+		   SiS_SetCH701x(pSiS->SiS_Pr, (temp2 << 8) | 0x20);
+
+		   SiS_DDC2Delay(pSiS->SiS_Pr, 0x96);
+
+		   temp2 = SiS_GetCH701x(pSiS->SiS_Pr, 0x20); 
+
+		   /* TW: Restore Power register */
+		   SiS_SetCH701x(pSiS->SiS_Pr, (temp1 << 8) | 0x49);
+
+                   temp1 = 0;
+		   if(temp2 & 0x02) temp1 |= 0x01;
+		   if(temp2 & 0x10) temp1 |= 0x01;
+		   if(temp2 & 0x04) temp1 |= 0x02;
+
+		   if( (temp1 & 0x01) && (temp1 & 0x02) ) temp1 = 0x04;
+
+                }
+
+		switch(temp1) {
+		     case 0x01:
+		        xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+		  	   "Chrontel: Detected TV connected to COMPOSITE output\n");
+		        /* TW: So we can be sure that there IS a CVBS output */
+			pSiS->VBFlags |= TV_AVIDEO;
+			orSISIDXREG(SISCR, 0x32, 0x01);
+			pSiS->postVBCR32 |= 0x01;
+                        break;
+                     case 0x02:
+			xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+			   "Chrontel: Detected TV connected to SVIDEO output\n");
+			/* TW: So we can be sure that there IS a SVIDEO output */
+			pSiS->VBFlags |= TV_SVIDEO;
+			orSISIDXREG(SISCR, 0x32, 0x02);
+			pSiS->postVBCR32 |= 0x02;
+                        break;
+		     case 0x04:
+			xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+			   "Chrontel: Detected TV connected to SCART output or 480i HDTV\n");
+			if(pSiS->chtvtype == -1) {
+			   xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+			      "Chrontel: Use CHTVType option to select either SCART or HDTV\n");
+			   xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+			      "Chrontel: Using SCART by default\n");
+			   pSiS->chtvtype = 1;
+			}
+			if(pSiS->chtvtype)
+			    pSiS->VBFlags |= TV_CHSCART;
+			else
+			    pSiS->VBFlags |= TV_CHHDTV;
+                        break;
+		     default:
+		        xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+		  	   "Chrontel: No TV detected.\n");
+		}
+
+	    } else if(temp1==0) {
+	        /* TW: This indicates a communication problem, but it only occures if there
+		 *     is no TV attached.
+		 */
+	    	xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+			"Detected Chrontel TV encoder in promiscuous state (DDC/I2C mix-up)\n");
+	    } else {
+	    	xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+			"Chrontel: Unsupported device id (%d) detected\n",temp1);
+	    }
+	    if(chronteltype == 1) {
+	       /* TW: Do something mysterious (found in Mitac BIOS) */
+	       SiS_WhatIsThis(pSiS->SiS_Pr, 0x00);
+	    }
+	}
+	if ((pSiS->VGAEngine == SIS_300_VGA) && (temp == 3)) {
+	    pSiS->VBFlags |= VB_TRUMPION;
+	    xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+	               "Detected Trumpion Zurac (I/II/III) LVDS scaler\n");
+	}
+	if (temp > upperlimitlvds) {
+	    xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+	               "Detected unknown bridge type (%d)\n", temp);
+	}
+    }
 }
+
+
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_video.c b/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_video.c
index 84091248c..35a14a750 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_video.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/sis/sis_video.c
@@ -1,40 +1,65 @@
-/***************************************************************************
- 
-Copyright 2000 Silicon Integrated Systems Corp, Inc., HsinChu, Taiwan.  
-All Rights Reserved. 
-
-Permission is hereby granted, free of charge, to any person obtaining a 
-copy of this software and associated documentation files (the 
-"Software"), to deal in the Software without restriction, including 
-without limitation the rights to use, copy, modify, merge, publish, 
-distribute, sub license, and/or sell copies of the Software, and to 
-permit persons to whom the Software is furnished to do so, subject to 
-the following conditions: 
-
-The above copyright notice and this permission notice (including the 
-next paragraph) shall be included in all copies or substantial portions 
-of the Software. 
-
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 
-OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 
-MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. 
-IN NO EVENT SHALL INTEL, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 
-DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 
-OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR 
-THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-
-**************************************************************************/
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/sis_video.c,v 1.7 2002/04/04 14:05:48 eich Exp $ */
-
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/sis_video.c,v 1.10 2003/02/04 02:44:29 dawes Exp $ */
 /*
- * sis_video.c: SIS Xv driver. Based on the mga Xv driver by Mark Vojkovich
- *              and i810 Xv driver by Jonathan Bian <jonathan.bian@intel.com>.
+ * Xv driver for SiS 300 and 310/325 series.
+ *
+ * (Based on the mga Xv driver by Mark Vojkovich and i810 Xv
+ * driver by Jonathan Bian <jonathan.bian@intel.com>.)
+ *
+ * Copyright 2000 Silicon Integrated Systems Corp, Inc., HsinChu, Taiwan.
+ * Copyright 2002,2003 by Thomas Winischhofer, Vienna, Austria.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
  *
- * Authors: 
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL INTEL, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR
+ * THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
  *      Sung-Ching Lin <sclin@sis.com.tw>
  *
- * Notes:
+ *	Thomas Winischhofer <thomas@winischhofer.net>:
+ *              - 310/325 series (315/550/650/651/740/M650) support
+ *		- (possibly incomplete) Xabre (SiS330) support
+ *              - new mode switching code for 300, 310/325 and 330 series
+ *              - many fixes for 300/540/630/730 chipsets,
+ *              - many fixes for 5597/5598, 6326 and 530/620 chipsets,
+ *              - VESA mode switching (deprecated),
+ *              - extended CRT2/video bridge handling support,
+ *              - dual head support on 300, 310/325 and 330 series
+ *              - 650/LVDS (up to 1400x1050), 650/Chrontel 701x support
+ *              - 30xB/30xLV/30xLVX video bridge support (300, 310/325, 330 series)
+ *              - Xv support for 5597/5598, 6326, 530/620 and 310/325 series
+ *              - video overlay enhancements for 300 series
+ *              - TV and hi-res support for the 6326
+ *              - etc.
  *
+ * TW: This supports the following chipsets:
+ *  SiS300: No registers >0x65, offers one overlay
+ *  SiS630/730: No registers >0x6b, offers two overlays (one used for CRT1, one for CRT2)
+ *  SiS550: Full register range, offers two overlays (one used for CRT1, one for CRT2)
+ *  SiS315: Full register range, offers one overlay (used for both CRT1 and CRT2 alt.)
+ *  SiS650/740: Full register range, offers one overlay (used for both CRT1 and CRT2 alt.)
+ *  SiSM650/651: Full register range, two overlays (one used for CRT1, one for CRT2)
+ *
+ * Help for reading the code:
+ * 315/550/650/740/M650/651 = SIS_315_VGA
+ * 300/630/730              = SIS_300_VGA
+ * For chipsets with 2 overlays, hasTwoOverlays will be true
  */
 
 #include "xf86.h"
@@ -53,159 +78,163 @@ THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "xaa.h"
 #include "xaalocal.h"
 #include "dixstruct.h"
+#include "fourcc.h"
 
 #include "sis_regs.h"
 
-#define OFF_DELAY   200  /* milliseconds */
-#define FREE_DELAY  60000
+#define OFF_DELAY   	200  /* milliseconds */
+#define FREE_DELAY  	60000
 
-#define OFF_TIMER   0x01
-#define FREE_TIMER  0x02
+#define OFF_TIMER   	0x01
+#define FREE_TIMER  	0x02
 #define CLIENT_VIDEO_ON 0x04
 
 #define TIMER_MASK      (OFF_TIMER | FREE_TIMER)
 
-void SISInitVideo(ScreenPtr pScreen);
-static XF86VideoAdaptorPtr SISSetupImageVideo(ScreenPtr);
-static void SISStopVideo(ScrnInfoPtr, pointer, Bool);
-static int SISSetPortAttribute(ScrnInfoPtr, Atom, INT32, pointer);
-static int SISGetPortAttribute(ScrnInfoPtr, Atom ,INT32 *, pointer);
-static void SISQueryBestSize(ScrnInfoPtr, Bool,
-    short, short, short, short, unsigned int *, unsigned int *, pointer);
-static int SISPutImage( ScrnInfoPtr, 
-    short, short, short, short, short, short, short, short,
-    int, unsigned char*, short, short, Bool, RegionPtr, pointer);
-static int SISQueryImageAttributes(ScrnInfoPtr, 
-    int, unsigned short *, unsigned short *,  int *, int *);
-static void SISBlockHandler(int, pointer, pointer, pointer);
+#define WATCHDOG_DELAY  500000 /* Watchdog counter for Vertical Restrace waiting */
+
+static 		XF86VideoAdaptorPtr SISSetupImageVideo(ScreenPtr);
+static void 	SISStopVideo(ScrnInfoPtr, pointer, Bool);
+static int 	SISSetPortAttribute(ScrnInfoPtr, Atom, INT32, pointer);
+static int 	SISGetPortAttribute(ScrnInfoPtr, Atom ,INT32 *, pointer);
+static void 	SISQueryBestSize(ScrnInfoPtr, Bool, short, short, short,
+			short, unsigned int *,unsigned int *, pointer);
+static int 	SISPutImage( ScrnInfoPtr,
+    			short, short, short, short, short, short, short, short,
+    			int, unsigned char*, short, short, Bool, RegionPtr, pointer);
+static int 	SISQueryImageAttributes(ScrnInfoPtr,
+    			int, unsigned short *, unsigned short *, int *, int *);
+static void 	SISVideoTimerCallback(ScrnInfoPtr pScrn, Time now);
+static void     SISInitOffscreenImages(ScreenPtr pScrn);
 
 #define MAKE_ATOM(a) MakeAtom(a, sizeof(a) - 1, TRUE)
 
-static Atom xvBrightness, xvContrast, xvColorKey;
+extern BOOLEAN  SiSBridgeIsInSlaveMode(ScrnInfoPtr pScrn);
+
+#define IMAGE_MIN_WIDTH         32  /* Minimum and maximum source image sizes */
+#define IMAGE_MIN_HEIGHT        24
+#define IMAGE_MAX_WIDTH        720
+#define IMAGE_MAX_HEIGHT       576
+#define IMAGE_MAX_WIDTH_M650  1920
+#define IMAGE_MAX_HEIGHT_M650 1080
 
-#define IMAGE_MIN_WIDTH     32
-#define IMAGE_MIN_HEIGHT    24
-#define IMAGE_MAX_WIDTH     720
-#define IMAGE_MAX_HEIGHT    576
+#define OVERLAY_MIN_WIDTH       32  /* Minimum overlay sizes */
+#define OVERLAY_MIN_HEIGHT      24
 
 #define DISPMODE_SINGLE1 0x1  /* TW: CRT1 only */
 #define DISPMODE_SINGLE2 0x2  /* TW: CRT2 only */
-#define DISPMODE_MIRROR  0x4  /* TW: CRT1 + CRT2 */
+#define DISPMODE_MIRROR  0x4  /* TW: CRT1 + CRT2 MIRROR (see note below) */
+
+#ifdef SISDUALHEAD
+#define HEADOFFSET (pSiS->dhmOffset)
+#endif
+
+/* TW: Note on "MIRROR":
+ *     When using VESA on machines with an enabled video bridge, this means
+ *     a real mirror. CRT1 and CRT2 have the exact same resolution and
+ *     refresh rate. The same applies to modes which require the bridge to
+ *     operate in slave mode.
+ *     When not using VESA and the bridge is not in slave mode otherwise,
+ *     CRT1 and CRT2 have the same resolution but possibly a different
+ *     refresh rate.
+ */
 
 /****************************************************************************
-* raw register access : these routines directly interact with the sis's
-*                       control aperature.  must not be called until after
-*                       the board's pci memory has been mapped.
-****************************************************************************/
+ * Raw register access : These routines directly interact with the sis's
+ *                       control aperature.  Must not be called until after
+ *                       the board's pci memory has been mapped.
+ ****************************************************************************/
 
-static CARD32 _sisread(SISPtr pSIS, CARD32 reg)
+#if 0
+static CARD32 _sisread(SISPtr pSiS, CARD32 reg)
 {
-    return *(pSIS->IOBase + reg);
+    return *(pSiS->IOBase + reg);
 }
 
-static void _siswrite(SISPtr pSIS, CARD32 reg, CARD32 data)
+static void _siswrite(SISPtr pSiS, CARD32 reg, CARD32 data)
 {
-    *(pSIS->IOBase + reg) = data;
+    *(pSiS->IOBase + reg) = data;
 }
+#endif
 
-static CARD8 getvideoreg(SISPtr pSIS, CARD8 reg)
+static CARD8 getvideoreg(SISPtr pSiS, CARD8 reg)
 {
-    outb (pSIS->RelIO + vi_index_offset, reg);
-    return inb(pSIS->RelIO + vi_data_offset);
+    CARD8 ret;
+    inSISIDXREG(SISVID, reg, ret);
+    return(ret);
 }
 
-static void setvideoreg(SISPtr pSIS, CARD8 reg, CARD8 data)
+static void setvideoreg(SISPtr pSiS, CARD8 reg, CARD8 data)
 {
-    outb (pSIS->RelIO + vi_index_offset, reg);
-    outb (pSIS->RelIO + vi_data_offset, data);
+    outSISIDXREG(SISVID, reg, data);
 }
 
-static void setvideoregmask(SISPtr pSIS, CARD8 reg, CARD8 data, CARD8 mask)
+static void setvideoregmask(SISPtr pSiS, CARD8 reg, CARD8 data, CARD8 mask)
 {
     CARD8   old;
 
-    outb (pSIS->RelIO + vi_index_offset, reg);
-    old = inb(pSIS->RelIO + vi_data_offset);
+    inSISIDXREG(SISVID, reg, old);
     data = (data & mask) | (old & (~mask));
-    outb (pSIS->RelIO + vi_data_offset, data);
-}
-
-static CARD8 getsrreg(SISPtr pSIS, CARD8 reg)
-{
-    outb (pSIS->RelIO + sr_index_offset, 0x05);
-    if (inb (pSIS->RelIO + sr_data_offset) != 0xa1)
-        outb (pSIS->RelIO + sr_data_offset, 0x86);
-    outb (pSIS->RelIO + sr_index_offset, reg);
-    return inb(pSIS->RelIO + sr_data_offset);
-}
-
-static void setsrreg(SISPtr pSIS, CARD8 reg, CARD8 data)
-{
-    outb (pSIS->RelIO + sr_index_offset, 0x05);
-    if (inb (pSIS->RelIO + sr_data_offset) != 0xa1)
-        outb (pSIS->RelIO + sr_data_offset, 0x86);
-    outb (pSIS->RelIO + sr_index_offset, reg);
-    outb (pSIS->RelIO + sr_data_offset, data);
+    outSISIDXREG(SISVID, reg, data);
 }
 
-static void setsrregmask(SISPtr pSIS, CARD8 reg, CARD8 data, CARD8 mask)
+static void setsrregmask(SISPtr pSiS, CARD8 reg, CARD8 data, CARD8 mask)
 {
     CARD8   old;
 
-    outb (pSIS->RelIO + sr_index_offset, 0x05);
-    if (inb (pSIS->RelIO + sr_data_offset) != 0xa1)
-        outb (pSIS->RelIO + sr_data_offset, 0x86);
-    outb (pSIS->RelIO + sr_index_offset, reg);
-    old = inb(pSIS->RelIO + sr_data_offset);
+    inSISIDXREG(SISSR, reg, old);
     data = (data & mask) | (old & (~mask));
-    outb (pSIS->RelIO + sr_data_offset, data);
-}
-
-static CARD8 getsisreg(SISPtr pSIS, CARD8 index_offset, CARD8 reg)
-{
-    outb (pSIS->RelIO + index_offset, reg);
-    return inb(pSIS->RelIO + index_offset+1);
+    outSISIDXREG(SISSR, reg, data);
 }
 
 #if 0
-static void setsisreg(SISPtr pSIS, CARD8 index_offset, CARD8 reg, CARD8 data)
+static CARD8 getsisreg(SISPtr pSiS, CARD8 index_offset, CARD8 reg)
 {
-    outb (pSIS->RelIO + index_offset, reg);
-    outb (pSIS->RelIO + index_offset+1, data);
+    CARD8 ret;
+    inSISIDXREG(index_offset, reg, ret);
+    return(ret);
 }
 #endif
 
 /* VBlank */
-static CARD8 vblank_active_CRT1(SISPtr pSIS)
+static CARD8 vblank_active_CRT1(SISPtr pSiS)
 {
-    return (inb(pSIS->RelIO + input_stat) & 0x08);
+    return (inSISREG(SISINPSTAT) & 0x08);
 }
 
-static CARD8 vblank_active_CRT2(SISPtr pSIS)
+static CARD8 vblank_active_CRT2(SISPtr pSiS)
 {
-    return (getsisreg(pSIS, crt2_index_offset, Index_CRT2_FC_VR) & 0x02);
+    CARD8 ret;
+    if(pSiS->VGAEngine == SIS_315_VGA) {
+       inSISIDXREG(SISPART1, Index_310_CRT2_FC_VR, ret);
+    } else {
+       inSISIDXREG(SISPART1, Index_CRT2_FC_VR, ret);
+    }
+    return((ret & 0x02) ^ 0x02);
 }
 
-/* Scanline */
-static CARD32 get_scanline_CRT1(SISPtr pSIS)
+/* Scanline - unused */
+#if 0
+static CARD32 get_scanline_CRT1(SISPtr pSiS)
 {
     CARD32 line;
 
-    _siswrite (pSIS, REG_PRIM_CRT_COUNTER, 0x00000001);
-    line = _sisread (pSIS, REG_PRIM_CRT_COUNTER);
+    _siswrite (pSiS, REG_PRIM_CRT_COUNTER, 0x00000001);
+    line = _sisread (pSiS, REG_PRIM_CRT_COUNTER);
 
     return ((line >> 16) & 0x07FF);
 }
 
-static CARD32 get_scanline_CRT2(SISPtr pSIS)
+static CARD32 get_scanline_CRT2(SISPtr pSiS)
 {
     CARD32 line;
 
-    line = (CARD32)(getsisreg(pSIS, crt2_index_offset, Index_CRT2_FC_VCount1) & 0x70) * 16
-                + getsisreg(pSIS, crt2_index_offset, Index_CRT2_FC_VCount);
+    line = (CARD32)(getsisreg(pSiS, SISPART1, Index_CRT2_FC_VCount1) & 0x70) * 16
+                + getsisreg(pSiS, SISPART1, Index_CRT2_FC_VCount);
 
     return line;
 }
+#endif
 
 void SISInitVideo(ScreenPtr pScreen)
 {
@@ -213,111 +242,144 @@ void SISInitVideo(ScreenPtr pScreen)
     XF86VideoAdaptorPtr *adaptors, *newAdaptors = NULL;
     XF86VideoAdaptorPtr newAdaptor = NULL;
     int num_adaptors;
-    
-    if (pScrn->bitsPerPixel != 8) {
-        newAdaptor = SISSetupImageVideo(pScreen);
-    }
+
+    newAdaptor = SISSetupImageVideo(pScreen);
+    if(newAdaptor)
+	SISInitOffscreenImages(pScreen);
 
     num_adaptors = xf86XVListGenericAdaptors(pScrn, &adaptors);
 
     if(newAdaptor) {
-    if(!num_adaptors) {
-        num_adaptors = 1;
-        adaptors = &newAdaptor;
-    } else {
-        /* need to free this someplace */
-        newAdaptors = xalloc((num_adaptors + 1) * sizeof(XF86VideoAdaptorPtr*));
-        if(newAdaptors) {
-        memcpy(newAdaptors, adaptors, num_adaptors * 
-                    sizeof(XF86VideoAdaptorPtr));
-        newAdaptors[num_adaptors] = newAdaptor;
-        adaptors = newAdaptors;
-        num_adaptors++;
-        }
-    }
+    	if(!num_adaptors) {
+        	num_adaptors = 1;
+        	adaptors = &newAdaptor;
+    	} else {
+        	/* need to free this someplace */
+        	newAdaptors = xalloc((num_adaptors + 1) * sizeof(XF86VideoAdaptorPtr*));
+        	if(newAdaptors) {
+        		memcpy(newAdaptors, adaptors, num_adaptors *
+                    		sizeof(XF86VideoAdaptorPtr));
+        		newAdaptors[num_adaptors] = newAdaptor;
+        		adaptors = newAdaptors;
+        		num_adaptors++;
+        	}
+    	}
     }
 
     if(num_adaptors)
         xf86XVScreenInit(pScreen, adaptors, num_adaptors);
 
     if(newAdaptors)
-    xfree(newAdaptors);
+    	xfree(newAdaptors);
 }
 
-
 /* client libraries expect an encoding */
-static XF86VideoEncodingRec DummyEncoding[1] =
+static XF86VideoEncodingRec DummyEncoding =
 {
- {
    0,
    "XV_IMAGE",
    IMAGE_MAX_WIDTH, IMAGE_MAX_HEIGHT,
    {1, 1}
- }
 };
 
-#define NUM_FORMATS 2
+static XF86VideoEncodingRec DummyEncoding_M650 =
+{
+   0,
+   "XV_IMAGE",
+   IMAGE_MAX_WIDTH_M650, IMAGE_MAX_HEIGHT_M650,
+   {1, 1}
+};
+
+#define NUM_FORMATS 3
 
-static XF86VideoFormatRec Formats[NUM_FORMATS] = 
+static XF86VideoFormatRec SISFormats[NUM_FORMATS] =
 {
-   {16, TrueColor}, {24, TrueColor}
+   { 8, PseudoColor},
+   {16, TrueColor},
+   {24, TrueColor}
 };
 
-#define NUM_ATTRIBUTES 3
+#define NUM_ATTRIBUTES_300 5
+#define NUM_ATTRIBUTES_325 7
 
-static XF86AttributeRec Attributes[NUM_ATTRIBUTES] =
+static XF86AttributeRec SISAttributes_300[NUM_ATTRIBUTES_300] =
 {
    {XvSettable | XvGettable, 0, (1 << 24) - 1, "XV_COLORKEY"},
-   {XvSettable | XvGettable, -128, 127, "XV_BRIGHTNESS"},
-   {XvSettable | XvGettable, 0, 255, "XV_CONTRAST"}
+   {XvSettable | XvGettable, -128, 127,        "XV_BRIGHTNESS"},
+   {XvSettable | XvGettable, 0, 7,             "XV_CONTRAST"},
+   {XvSettable | XvGettable, 0, 1,             "XV_AUTOPAINT_COLORKEY"},
+   {XvSettable             , 0, 0,             "XV_SET_DEFAULTS"}
 };
 
-#define NUM_IMAGES 2
-#define PIXEL_FMT_YV12 0x32315659
-#define PIXEL_FMT_YUY2 0x32595559
+static XF86AttributeRec SISAttributes_325[NUM_ATTRIBUTES_325] =
+{
+   {XvSettable | XvGettable, 0, (1 << 24) - 1, "XV_COLORKEY"},
+   {XvSettable | XvGettable, -128, 127,        "XV_BRIGHTNESS"},
+   {XvSettable | XvGettable, 0, 7,             "XV_CONTRAST"},
+   {XvSettable | XvGettable, -7, 7,            "XV_SATURATION"},
+   {XvSettable | XvGettable, -8, 7,            "XV_HUE"},	
+   {XvSettable | XvGettable, 0, 1,             "XV_AUTOPAINT_COLORKEY"},
+   {XvSettable             , 0, 0,             "XV_SET_DEFAULTS"}
+};
 
-static XF86ImageRec Images[NUM_IMAGES] =
+#define NUM_IMAGES 6
+#define PIXEL_FMT_YV12 FOURCC_YV12  /* 0x32315659 */
+#define PIXEL_FMT_UYVY FOURCC_UYVY  /* 0x59565955 */
+#define PIXEL_FMT_YUY2 FOURCC_YUY2  /* 0x32595559 */
+#define PIXEL_FMT_I420 FOURCC_I420  /* 0x30323449 */
+#define PIXEL_FMT_RGB5 0x35315652
+#define PIXEL_FMT_RGB6 0x36315652
+
+static XF86ImageRec SISImages[NUM_IMAGES] =
 {
-   {
-    PIXEL_FMT_YUY2,
-        XvYUV,
-    LSBFirst,
-    {'Y','U','Y','2',
-      0x00,0x00,0x00,0x10,0x80,0x00,0x00,0xAA,0x00,0x38,0x9B,0x71},
-    16,
-    XvPacked,
-    1,
-    0, 0, 0, 0 ,
-    8, 8, 8, 
-    1, 2, 2,
-    1, 1, 1,
-    {'Y','U','Y','V',
-      0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0},
-    XvTopToBottom
-   },
-   {
-    PIXEL_FMT_YV12,
-        XvYUV,
-    LSBFirst,
-    {'Y','V','1','2',
-      0x00,0x00,0x00,0x10,0x80,0x00,0x00,0xAA,0x00,0x38,0x9B,0x71},
-    12,
-    XvPlanar,
-    3,
-    0, 0, 0, 0 ,
-    8, 8, 8, 
-    1, 2, 2,
-    1, 2, 2,
-    {'Y','V','U',
-      0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0},
-    XvTopToBottom
-   }
+    XVIMAGE_YUY2, /* TW: If order is changed, SISOffscreenImages must be adapted */
+    XVIMAGE_YV12,
+    XVIMAGE_UYVY,
+    XVIMAGE_I420
+    ,
+    { /* RGB 555 */
+      0x35315652,
+      XvRGB,
+      LSBFirst,
+      {'R','V','1','5',
+       0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},
+      16,
+      XvPacked,
+      1,
+/*    15, 0x001F, 0x03E0, 0x7C00, - incorrect! */
+      15, 0x7C00, 0x03E0, 0x001F,
+      0, 0, 0,
+      0, 0, 0,
+      0, 0, 0,
+      {'R', 'V', 'B',0,
+       0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0},
+      XvTopToBottom
+    },
+    { /* RGB 565 */
+      0x36315652,
+      XvRGB,
+      LSBFirst,
+      {'R','V','1','6',
+       0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},
+      16,
+      XvPacked,
+      1,
+/*    16, 0x001F, 0x07E0, 0xF800, - incorrect!  */
+      16, 0xF800, 0x07E0, 0x001F,
+      0, 0, 0,
+      0, 0, 0,
+      0, 0, 0,
+      {'R', 'V', 'B',0,
+       0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0},
+      XvTopToBottom
+    }
 };
 
 typedef struct {
     int pixelFormat;
 
     CARD16  pitch;
+    CARD16  origPitch;
 
     CARD8   keyOP;
     CARD16  HUSF;
@@ -340,13 +402,35 @@ typedef struct {
 
     CARD8   lineBufSize;
 
-    CARD8 (*VBlankActiveFunc)(SISPtr);
-    CARD32 (*GetScanLineFunc)(SISPtr pSIS);
+    CARD8   (*VBlankActiveFunc)(SISPtr);
+#if 0
+    CARD32  (*GetScanLineFunc)(SISPtr pSiS);
+#endif
+
+    CARD16  SCREENheight;
+
+#if 0
+    /* TW: The following are not used yet */
+    CARD16  SubPictHUSF;        /* Subpicture scaling */
+    CARD16  SubpictVUSF;
+    CARD8   SubpictIntBit;
+    CARD8   SubPictwHPre;
+    CARD16  SubPictsrcW;       /* Subpicture source width */
+    CARD16  SubPictsrcH;       /* Subpicture source height */
+    BoxRec  SubPictdstBox;     /* SubPicture destination box */
+    CARD32  SubPictAddr;       /* SubPicture address */
+    CARD32  SubPictPitch;      /* SubPicture pitch */
+    CARD32  SubPictOrigPitch;  /* SubPicture real pitch (needed for scaling twice) */
+    CARD32  SubPictPreset;     /* Subpicture Preset */
+
+    CARD32  MPEG_Y;	       /* MPEG Y Buffer Addr */
+    CARD32  MPEG_UV;	       /* MPEG UV Buffer Addr */
+#endif
+    
 } SISOverlayRec, *SISOverlayPtr;
 
 typedef struct {
-    FBAreaPtr    fbAreaPtr;
-    int          fbSize;
+    FBLinearPtr  linear;	/* TW: We now use Linear, not Area */
     CARD32       bufAddr[2];
 
     unsigned char currentBuf;
@@ -356,115 +440,287 @@ typedef struct {
     int id;
     short srcPitch, height;
     
-    unsigned char brightness;
+    char          brightness;
     unsigned char contrast;
+    char 	  hue;
+    char          saturation;
 
     RegionRec    clip;
     CARD32       colorKey;
+    Bool 	 autopaintColorKey;
 
     CARD32       videoStatus;
     Time         offTime;
     Time         freeTime;
 
-    CARD32 displayMode;
+    CARD32       displayMode;
+    Bool	 bridgeIsSlave;
+
+    Bool         hasTwoOverlays;   /* TW: Chipset has two overlays */
+    Bool         dualHeadMode;     /* TW: We're running in DHM */
+
+    Bool         needToScale;      /* TW: Need to scale video */
+
+    int          shiftValue;       /* 550/650 need word addr/pitch, 630 double word */
+
+    short        oldx1, oldx2, oldy1, oldy2;
+    int          mustwait;
+
+    Bool         grabbedByV4L;	   /* V4L stuff */
+    int          pitch;
+    int          offset;
+
 } SISPortPrivRec, *SISPortPrivPtr;        
 
 #define GET_PORT_PRIVATE(pScrn) \
    (SISPortPrivPtr)((SISPTR(pScrn))->adaptor->pPortPrivates[0].ptr)
 
+static void
+SISSetPortDefaults (ScrnInfoPtr pScrn, SISPortPrivPtr pPriv)
+{
+    pPriv->colorKey    = 0x000101fe;
+    pPriv->videoStatus = 0;
+    pPriv->brightness  = 0;
+    pPriv->contrast    = 4;
+    pPriv->hue         = 0;
+    pPriv->saturation  = 0;
+    pPriv->autopaintColorKey = TRUE;
+}
 
 static void 
-SISResetVideo(ScrnInfoPtr pScrn) 
+SISResetVideo(ScrnInfoPtr pScrn)
 {
-    SISPtr pSIS = SISPTR(pScrn);
+    SISPtr pSiS = SISPTR(pScrn);
+    SISPortPrivPtr pPriv = GET_PORT_PRIVATE(pScrn);
 
-    if (getsrreg (pSIS, 0x05) != 0xa1)
-    {
-        setsrreg (pSIS, 0x05, 0x86);
-        if (getsrreg (pSIS, 0x05) != 0xa1)
-            xf86DrvMsg(pScrn->scrnIndex, X_ERROR, 
-                       "Standard password not initialize\n");
-    }
-    if (getvideoreg (pSIS, Index_VI_Passwd) != 0xa1)
-    {
-        setvideoreg (pSIS, Index_VI_Passwd, 0x86);
-        if (getvideoreg (pSIS, Index_VI_Passwd) != 0xa1)
-            xf86DrvMsg(pScrn->scrnIndex, X_ERROR, 
-                       "Video password not initialize\n");
+    /* Unlock registers */
+#ifdef UNLOCK_ALWAYS
+    sisSaveUnlockExtRegisterLock(pSiS, NULL, NULL);
+#endif
+    if (getvideoreg (pSiS, Index_VI_Passwd) != 0xa1) {
+        setvideoreg (pSiS, Index_VI_Passwd, 0x86);
+        if (getvideoreg (pSiS, Index_VI_Passwd) != 0xa1)
+            xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+                       "Xv: Video password could not unlock registers\n");
     }
 
-    /* Initial first set */
-    setvideoregmask (pSIS, Index_VI_Control_Misc2, 0x80, 0x81);
-    setvideoregmask(pSIS, Index_VI_Control_Misc0, 0x00, 0x02);
-    setvideoregmask(pSIS, Index_VI_Control_Misc1, 0x02, 0x02);
-    setvideoregmask(pSIS, Index_VI_Scale_Control, 0x60, 0x60);
-    setvideoregmask(pSIS, Index_VI_Contrast_Enh_Ctrl, 0x04, 0x1F);
+    /* Initialize first overlay (CRT1) ------------------------------- */
+
+    /* Write-enable video registers */
+    setvideoregmask(pSiS, Index_VI_Control_Misc2,         0x80, 0x81);
+
+    /* Disable overlay */
+    setvideoregmask(pSiS, Index_VI_Control_Misc0,         0x00, 0x02);
+
+    /* Disable bobEnable */
+    setvideoregmask(pSiS, Index_VI_Control_Misc1,         0x02, 0x02);
+
+    /* Reset scale control and contrast */
+    setvideoregmask(pSiS, Index_VI_Scale_Control,         0x60, 0x60);
+    setvideoregmask(pSiS, Index_VI_Contrast_Enh_Ctrl,     0x04, 0x1F);
   
-    setvideoreg(pSIS, Index_VI_Disp_Y_Buf_Preset_Low,     0x00);
-    setvideoreg(pSIS, Index_VI_Disp_Y_Buf_Preset_Middle,  0x00);
-    setvideoreg(pSIS, Index_VI_UV_Buf_Preset_Low,         0x00);
-    setvideoreg(pSIS, Index_VI_UV_Buf_Preset_Middle,      0x00);
-    setvideoreg(pSIS, Index_VI_Disp_Y_UV_Buf_Preset_High, 0x00);
-    setvideoreg(pSIS, Index_VI_Play_Threshold_Low,        0x00);
-    setvideoreg(pSIS, Index_VI_Play_Threshold_High,       0x00);
-
-    /* Initial second set */
-    setvideoregmask(pSIS, Index_VI_Control_Misc2, 0x81, 0x81);
-    setvideoregmask(pSIS, Index_VI_Control_Misc0, 0x00, 0x02);
-    setvideoregmask(pSIS, Index_VI_Control_Misc1, 0x02, 0x02);
-    setvideoregmask(pSIS, Index_VI_Scale_Control, 0x60, 0x60);
-    setvideoregmask(pSIS, Index_VI_Contrast_Enh_Ctrl, 0x04, 0x1F);
-
-    setvideoreg(pSIS, Index_VI_Disp_Y_Buf_Preset_Low,     0x00);
-    setvideoreg(pSIS, Index_VI_Disp_Y_Buf_Preset_Middle,  0x00);
-    setvideoreg(pSIS, Index_VI_UV_Buf_Preset_Low,         0x00);
-    setvideoreg(pSIS, Index_VI_UV_Buf_Preset_Middle,      0x00);
-    setvideoreg(pSIS, Index_VI_Disp_Y_UV_Buf_Preset_High, 0x00);
-    setvideoreg(pSIS, Index_VI_Play_Threshold_Low,        0x00);
-    setvideoreg(pSIS, Index_VI_Play_Threshold_High,       0x00);
-    
-    /* set default contrast */
-    setvideoregmask (pSIS, Index_VI_Control_Misc2, 0x00, 0x01);
-    setvideoregmask (pSIS, Index_VI_Contrast_Enh_Ctrl, 0x04, 0x07);
-    setvideoreg (pSIS, Index_VI_Brightness, 0x20);
+    setvideoreg(pSiS, Index_VI_Disp_Y_Buf_Preset_Low,     0x00);
+    setvideoreg(pSiS, Index_VI_Disp_Y_Buf_Preset_Middle,  0x00);
+    setvideoreg(pSiS, Index_VI_UV_Buf_Preset_Low,         0x00);
+    setvideoreg(pSiS, Index_VI_UV_Buf_Preset_Middle,      0x00);
+    setvideoreg(pSiS, Index_VI_Disp_Y_UV_Buf_Preset_High, 0x00);
+    setvideoreg(pSiS, Index_VI_Play_Threshold_Low,        0x00);
+    setvideoreg(pSiS, Index_VI_Play_Threshold_High,       0x00);
+
+    /* Initialize second overlay (CRT2) ---- only for 630/730, 550, M650/651 */
+    if (pPriv->hasTwoOverlays) {
+    	/* Write-enable video registers */
+    	setvideoregmask(pSiS, Index_VI_Control_Misc2,         0x81, 0x81);
+
+    	/* Disable overlay */
+    	setvideoregmask(pSiS, Index_VI_Control_Misc0,         0x00, 0x02);
+
+    	/* Disable bobEnable */
+    	setvideoregmask(pSiS, Index_VI_Control_Misc1,         0x02, 0x02);
+
+    	/* Reset scale control and contrast */
+    	setvideoregmask(pSiS, Index_VI_Scale_Control,         0x60, 0x60);
+    	setvideoregmask(pSiS, Index_VI_Contrast_Enh_Ctrl,     0x04, 0x1F);
+
+    	setvideoreg(pSiS, Index_VI_Disp_Y_Buf_Preset_Low,     0x00);
+    	setvideoreg(pSiS, Index_VI_Disp_Y_Buf_Preset_Middle,  0x00);
+    	setvideoreg(pSiS, Index_VI_UV_Buf_Preset_Low,         0x00);
+    	setvideoreg(pSiS, Index_VI_UV_Buf_Preset_Middle,      0x00);
+    	setvideoreg(pSiS, Index_VI_Disp_Y_UV_Buf_Preset_High, 0x00);
+    	setvideoreg(pSiS, Index_VI_Play_Threshold_Low,        0x00);
+    	setvideoreg(pSiS, Index_VI_Play_Threshold_High,       0x00);
+    }
 
-    setvideoregmask (pSIS, Index_VI_Control_Misc2, 0x01, 0x01);
-    setvideoregmask (pSIS, Index_VI_Contrast_Enh_Ctrl, 0x04, 0x07);
-    setvideoreg (pSIS, Index_VI_Brightness, 0x20);
+    /* set default properties for overlay 1 (CRT1) -------------------------- */
+    setvideoregmask (pSiS, Index_VI_Control_Misc2,        0x00, 0x01);
+    setvideoregmask (pSiS, Index_VI_Contrast_Enh_Ctrl,    0x04, 0x07);
+    setvideoreg (pSiS, Index_VI_Brightness,               0x20);
+    if (pSiS->VGAEngine == SIS_315_VGA) {
+      	setvideoreg (pSiS, Index_VI_Hue,          	   0x00);
+       	setvideoreg (pSiS, Index_VI_Saturation,            0x00);
+    }
 
+    /* set default properties for overlay 2(CRT2) only 630/730 and 550 ------ */
+    if (pPriv->hasTwoOverlays) {
+    	setvideoregmask (pSiS, Index_VI_Control_Misc2,        0x01, 0x01);
+    	setvideoregmask (pSiS, Index_VI_Contrast_Enh_Ctrl,    0x04, 0x07);
+    	setvideoreg (pSiS, Index_VI_Brightness,               0x20);
+    	if (pSiS->VGAEngine == SIS_315_VGA) {
+       		setvideoreg (pSiS, Index_VI_Hue,              0x00);
+       		setvideoreg (pSiS, Index_VI_Saturation,       0x00);
+    	}
+    }
 }
 
+/* TW: Set display mode (single CRT1/CRT2, mirror).
+ *     MIRROR mode is only available on chipsets with two overlays.
+ *     On the other chipsets, if only CRT1 or only CRT2 are used,
+ *     the correct display CRT is chosen automatically. If both
+ *     CRT1 and CRT2 are connected, the user can choose between CRT1 and
+ *     CRT2 by using the option XvOnCRT2.
+ */
+static void
+set_dispmode(ScrnInfoPtr pScrn, SISPortPrivPtr pPriv)
+{
+    SISPtr pSiS = SISPTR(pScrn);
+
+    pPriv->dualHeadMode = pPriv->bridgeIsSlave = FALSE;
+
+    if(SiSBridgeIsInSlaveMode(pScrn)) pPriv->bridgeIsSlave = TRUE;
+
+    if( (pSiS->VBFlags & VB_DISPMODE_MIRROR) ||
+        ((pPriv->bridgeIsSlave) && (pSiS->VBFlags & DISPTYPE_DISP2)) )  {
+	if(pPriv->hasTwoOverlays)
+           pPriv->displayMode = DISPMODE_MIRROR;     /* TW: CRT1 + CRT2 (2 overlays) */
+	else if(pSiS->XvOnCRT2)
+	   pPriv->displayMode = DISPMODE_SINGLE2;
+	else
+	   pPriv->displayMode = DISPMODE_SINGLE1;
+    } else {
+#ifdef SISDUALHEAD
+      if(pSiS->DualHeadMode) {
+         pPriv->dualHeadMode = TRUE;
+      	 if(pSiS->SecondHead)
+	     /* TW: Slave is always CRT1 */
+	     pPriv->displayMode = DISPMODE_SINGLE1;
+	 else
+	     /* TW: Master is always CRT2 */
+	     pPriv->displayMode = DISPMODE_SINGLE2;
+      } else
+#endif
+      if(pSiS->VBFlags & DISPTYPE_DISP1) {
+      	pPriv->displayMode = DISPMODE_SINGLE1;  /* TW: CRT1 only */
+      } else {
+        pPriv->displayMode = DISPMODE_SINGLE2;  /* TW: CRT2 only */
+      }
+    }
+}
 
-static XF86VideoAdaptorPtr 
+static void
+set_disptype_regs(ScrnInfoPtr pScrn, SISPortPrivPtr pPriv)
+{
+    SISPtr pSiS = SISPTR(pScrn);
+
+    /* TW:
+     *     SR06[7:6]
+     *	      Bit 7: Enable overlay 2 on CRT2
+     *	      Bit 6: Enable overlay 1 on CRT2
+     *     SR32[7:6]
+     *        Bit 7: DCLK/TCLK overlay 2
+     *               0=DCLK (overlay on CRT1)
+     *               1=TCLK (overlay on CRT2)
+     *        Bit 6: DCLK/TCLK overlay 1
+     *               0=DCLK (overlay on CRT1)
+     *               1=TCLK (overlay on CRT2)
+     *
+     * On chipsets with two overlays, we can freely select and also
+     * have a mirror mode. However, we use overlay 1 for CRT1 and
+     * overlay 2 for CRT2.
+     * For chipsets with only one overlay, user must choose whether
+     * to display the overlay on CRT1 or CRT2 by setting XvOnCRT2
+     * to TRUE (CRT2) or FALSE (CRT1). The hardware does not
+     * support any kind of "Mirror" mode on these chipsets.
+     */
+#ifdef UNLOCK_ALWAYS
+    sisSaveUnlockExtRegisterLock(pSiS, NULL, NULL);
+#endif
+    switch (pPriv->displayMode)
+    {
+        case DISPMODE_SINGLE1:				/* TW: CRT1 only */
+	  if (pPriv->hasTwoOverlays) {
+	      if (pPriv->dualHeadMode) {
+	         setsrregmask (pSiS, 0x06, 0x00, 0x40);
+      	         setsrregmask (pSiS, 0x32, 0x00, 0x40);
+	      } else {
+      	         setsrregmask (pSiS, 0x06, 0x00, 0xc0);
+      	         setsrregmask (pSiS, 0x32, 0x00, 0xc0);
+              }
+	  } else {
+	      setsrregmask (pSiS, 0x06, 0x00, 0xc0);
+	      setsrregmask (pSiS, 0x32, 0x00, 0xc0);
+	  }
+	  break;
+       	case DISPMODE_SINGLE2:  			/* TW: CRT2 only */
+	  if (pPriv->hasTwoOverlays) {
+	      if (pPriv->dualHeadMode) {
+	         setsrregmask (pSiS, 0x06, 0x80, 0x80);
+      	         setsrregmask (pSiS, 0x32, 0x80, 0x80);
+	      } else {
+   	         setsrregmask (pSiS, 0x06, 0x80, 0xc0);
+      	         setsrregmask (pSiS, 0x32, 0x80, 0xc0);
+	      }
+	  } else {
+              setsrregmask (pSiS, 0x06, 0x40, 0xc0);
+	      setsrregmask (pSiS, 0x32, 0x40, 0xc0);
+	  }
+	  break;
+    	case DISPMODE_MIRROR:				/* TW: CRT1 + CRT2 */
+	default:					
+          setsrregmask (pSiS, 0x06, 0x80, 0xc0);
+      	  setsrregmask (pSiS, 0x32, 0x80, 0xc0);
+	  break;
+    }
+}
+
+static XF86VideoAdaptorPtr
 SISSetupImageVideo(ScreenPtr pScreen)
 {
     ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
-    SISPtr pSIS = SISPTR(pScrn);
+    SISPtr pSiS = SISPTR(pScrn);
     XF86VideoAdaptorPtr adapt;
     SISPortPrivPtr pPriv;
 
     if(!(adapt = xcalloc(1, sizeof(XF86VideoAdaptorRec) +
-                sizeof(SISPortPrivRec) +
-                sizeof(DevUnion))))
-    return NULL;
+                            sizeof(SISPortPrivRec) +
+                            sizeof(DevUnion))))
+    	return NULL;
 
     adapt->type = XvWindowMask | XvInputMask | XvImageMask;
     adapt->flags = VIDEO_OVERLAID_IMAGES | VIDEO_CLIP_TO_VIEWPORT;
-    adapt->name = "SIS Video Overlay";
+    adapt->name = "SIS 300/310/325 series Video Overlay";
     adapt->nEncodings = 1;
-    adapt->pEncodings = DummyEncoding;
+    if(pSiS->Flags650 & SiS650_LARGEOVERLAY) {
+       adapt->pEncodings = &DummyEncoding_M650;
+    } else {
+       adapt->pEncodings = &DummyEncoding;
+    }
     adapt->nFormats = NUM_FORMATS;
-    adapt->pFormats = Formats;
+    adapt->pFormats = SISFormats;
     adapt->nPorts = 1;
     adapt->pPortPrivates = (DevUnion*)(&adapt[1]);
 
     pPriv = (SISPortPrivPtr)(&adapt->pPortPrivates[1]);
 
     adapt->pPortPrivates[0].ptr = (pointer)(pPriv);
-    adapt->pAttributes = Attributes;
-    adapt->nImages = 2;
-    adapt->nAttributes = 3;
-    adapt->pImages = Images;
+    adapt->nImages = NUM_IMAGES;
+    if(pSiS->VGAEngine == SIS_300_VGA) {
+       adapt->pAttributes = SISAttributes_300;
+       adapt->nAttributes = NUM_ATTRIBUTES_300;
+    } else {
+       adapt->pAttributes = SISAttributes_325;
+       adapt->nAttributes = NUM_ATTRIBUTES_325;
+    }
+    adapt->pImages = SISImages;
     adapt->PutVideo = NULL;
     adapt->PutStill = NULL;
     adapt->GetVideo = NULL;
@@ -476,54 +732,58 @@ SISSetupImageVideo(ScreenPtr pScreen)
     adapt->PutImage = SISPutImage;
     adapt->QueryImageAttributes = SISQueryImageAttributes;
 
-    pPriv->colorKey = 0x000101fe;
     pPriv->videoStatus = 0;
-    pPriv->brightness = 0;
-    pPriv->contrast = 128;
+    pPriv->currentBuf  = 0;
+    pPriv->linear      = NULL;
+    pPriv->grabbedByV4L= FALSE;
 
-    pPriv->currentBuf = 0;
-    
-    pPriv->fbAreaPtr = NULL;
-    pPriv->fbSize = 0;
+    SISSetPortDefaults(pScrn, pPriv);
 
     /* gotta uninit this someplace */
     REGION_INIT(pScreen, &pPriv->clip, NullBox, 0); 
 
-    pSIS->adaptor = adapt;
-
-    pSIS->BlockHandler = pScreen->BlockHandler;
-    pScreen->BlockHandler = SISBlockHandler;
-
-    xvBrightness = MAKE_ATOM("XV_BRIGHTNESS");
-    xvContrast   = MAKE_ATOM("XV_CONTRAST");
-    xvColorKey   = MAKE_ATOM("XV_COLORKEY");
+    pSiS->adaptor = adapt;
 
-    /* set display mode */
-    /* TODO: support CRT2-only mode */
-    if( (pSIS->VBFlags & VB_DISPMODE_MIRROR) ||
-        ((pSIS->UseVESA) && (pSIS->VBFlags & DISPTYPE_DISP2)) )  {    /* TW: CRT1 + CRT2 */
-      pPriv->displayMode = DISPMODE_MIRROR;	/* TW: Currently, when using VESA, the image is */
-      setsrregmask (pSIS, 0x06, 0x80, 0xc0);    /*     always mirrored on CRT1 */
-      setsrregmask (pSIS, 0x32, 0x80, 0xc0);
+    pSiS->xvBrightness = MAKE_ATOM("XV_BRIGHTNESS");
+    pSiS->xvContrast   = MAKE_ATOM("XV_CONTRAST");
+    pSiS->xvColorKey   = MAKE_ATOM("XV_COLORKEY");
+    if(pSiS->VGAEngine == SIS_315_VGA) {
+       pSiS->xvSaturation = MAKE_ATOM("XV_SATURATION");
+       pSiS->xvHue        = MAKE_ATOM("XV_HUE");
     }
-    else {
-      if (pSIS->VBFlags & DISPTYPE_DISP1) {	/* TW: CRT1 only */
-      	pPriv->displayMode = DISPMODE_SINGLE1;
-      	setsrregmask (pSIS, 0x06, 0x00, 0xc0);
-      	setsrregmask (pSIS, 0x32, 0x00, 0xc0);
-      } else {					/* TW: CRT2 only */
-        pPriv->displayMode = DISPMODE_SINGLE2;
-      	setsrregmask (pSIS, 0x06, 0x00, 0xc0);	/* No idea... do the same as for CRT1 now */
-      	setsrregmask (pSIS, 0x32, 0x00, 0xc0);
-      }
+    pSiS->xvAutopaintColorKey = MAKE_ATOM("XV_AUTOPAINT_COLORKEY");
+    pSiS->xvSetDefaults       = MAKE_ATOM("XV_SET_DEFAULTS");
+
+    /* TW: Setup chipset type helpers */
+    if (pSiS->hasTwoOverlays)
+       pPriv->hasTwoOverlays = TRUE;
+    else
+       pPriv->hasTwoOverlays = FALSE;
+
+    /* TW: 300 series require double words for addresses and pitches,
+     *     310/325 series accept word.
+     */
+    switch (pSiS->VGAEngine) {
+    case SIS_315_VGA:
+    	pPriv->shiftValue = 1;
+	break;
+    case SIS_300_VGA:
+    default:
+    	pPriv->shiftValue = 2;
+	break;
     }
 
+    /* Set displayMode according to VBFlags */
+    set_dispmode(pScrn, pPriv);
+
+    /* Set SR(06, 32) registers according to DISPMODE */
+    set_disptype_regs(pScrn, pPriv);
+
     SISResetVideo(pScrn);
 
     return adapt;
 }
 
-
 static Bool
 RegionsEqual(RegionPtr A, RegionPtr B)
 {
@@ -544,41 +804,50 @@ RegionsEqual(RegionPtr A, RegionPtr B)
     dataB = (int*)REGION_RECTS(B);
 
     while(num--) {
-    if((dataA[0] != dataB[0]) || (dataA[1] != dataB[1]))
-       return FALSE;
-    dataA += 2; 
-    dataB += 2;
+      if((dataA[0] != dataB[0]) || (dataA[1] != dataB[1]))
+        return FALSE;
+      dataA += 2;
+      dataB += 2;
     }
 
     return TRUE;
 }
 
-
-
-static int 
-SISSetPortAttribute(
-  ScrnInfoPtr pScrn, 
-  Atom attribute,
-  INT32 value, 
-  pointer data
-){
+static int
+SISSetPortAttribute(ScrnInfoPtr pScrn, Atom attribute,
+  		    INT32 value, pointer data)
+{
   SISPortPrivPtr pPriv = (SISPortPrivPtr)data;
+  SISPtr pSiS = SISPTR(pScrn);
 
-  if(attribute == xvBrightness) {
+  if(attribute == pSiS->xvBrightness) {
     if((value < -128) || (value > 127))
        return BadValue;
     pPriv->brightness = value;
-  } else
-  if(attribute == xvContrast) {
-    if((value < 0) || (value > 255))
+  } else if(attribute == pSiS->xvContrast) {
+    if((value < 0) || (value > 7))
        return BadValue;
     pPriv->contrast = value;
-  } else
-  if(attribute == xvColorKey) {
+  } else if(attribute == pSiS->xvColorKey) {
     pPriv->colorKey = value;
-    REGION_EMPTY(pScrn->pScreen, &pPriv->clip);   
+    REGION_EMPTY(pScrn->pScreen, &pPriv->clip);
+  } else if(attribute == pSiS->xvAutopaintColorKey) {
+     if ((value < 0) || (value > 1))
+       return BadValue;
+     pPriv->autopaintColorKey = value;
+  } else if(attribute == pSiS->xvSetDefaults) {
+        SISSetPortDefaults(pScrn, pPriv);
+  } else if(pSiS->VGAEngine == SIS_315_VGA) {
+     if(attribute == pSiS->xvHue) {
+       if((value < -8) || (value > 7))
+         return BadValue;
+       pPriv->hue = value;
+     } else if(attribute == pSiS->xvSaturation) {
+       if((value < -7) || (value > 7))
+         return BadValue;
+       pPriv->saturation = value;
+     } else return BadMatch;
   } else return BadMatch;
-
   return Success;
 }
 
@@ -590,17 +859,23 @@ SISGetPortAttribute(
   pointer data
 ){
   SISPortPrivPtr pPriv = (SISPortPrivPtr)data;
+  SISPtr pSiS = SISPTR(pScrn);
 
-  if(attribute == xvBrightness) {
+  if(attribute == pSiS->xvBrightness) {
     *value = pPriv->brightness;
-  } else
-  if(attribute == xvContrast) {
+  } else if(attribute == pSiS->xvContrast) {
     *value = pPriv->contrast;
-  } else
-  if(attribute == xvColorKey) {
+  } else if(attribute == pSiS->xvColorKey) {
     *value = pPriv->colorKey;
+  } else if (attribute == pSiS->xvAutopaintColorKey) {
+    *value = (pPriv->autopaintColorKey) ? 1 : 0;
+  } else if(pSiS->VGAEngine == SIS_315_VGA) {
+    if(attribute == pSiS->xvHue) {
+       *value = pPriv->hue;
+    } else if(attribute == pSiS->xvSaturation) {
+       *value = pPriv->saturation;
+    } else return BadMatch;
   } else return BadMatch;
-
   return Success;
 }
 
@@ -615,47 +890,85 @@ SISQueryBestSize(
 ){
   *p_w = drw_w;
   *p_h = drw_h; 
-
-  /* TODO: report the HW limitation */
 }
 
-
 static void
-set_scale_factor(SISOverlayPtr pOverlay, ScrnInfoPtr pScrn)
+calc_scale_factor(SISOverlayPtr pOverlay, ScrnInfoPtr pScrn,
+                 SISPortPrivPtr pPriv, int index, int iscrt2)
 {
-  SISPtr pSIS = SISPTR(pScrn);
-  CARD32 I=0;
-  
+  SISPtr pSiS = SISPTR(pScrn);
+  CARD32 I=0,mult=0;
+  int flag=0;
+
   int dstW = pOverlay->dstBox.x2 - pOverlay->dstBox.x1;
-  int dstH = pOverlay->dstBox.y2 - pOverlay->dstBox.y1;  
+  int dstH = pOverlay->dstBox.y2 - pOverlay->dstBox.y1;
   int srcW = pOverlay->srcW;
   int srcH = pOverlay->srcH;
-  CARD16 LCDheight = pSIS->LCDheight;
-  CARD16 SCREENheight = pScrn->currentMode->VDisplay;
-
-  int srcPitch = pOverlay->pitch;
-
-  /* TW: Scale image due to idiotic VESA modes that scale CRT2 _and_ CRT1 */
-  if ( (pSIS->UseVESA) && (pSIS->VBFlags & CRT2_LCD) ) {
-  	dstH = (dstH * LCDheight) / SCREENheight;
+  CARD16 LCDheight = pSiS->LCDheight;
+  int srcPitch = pOverlay->origPitch;
+  int origdstH = dstH;
+
+  /* TW: Stretch image due to idiotic LCD "auto"-scaling on LVDS (and 630+301B) */
+  if(pSiS->VBFlags & CRT2_LCD) {
+     if(pPriv->bridgeIsSlave) {
+  	if(pSiS->VBFlags & VB_LVDS) {
+  	   dstH = (dstH * LCDheight) / pOverlay->SCREENheight;
+        } else if( (pSiS->VGAEngine == SIS_300_VGA) &&
+		   (pSiS->VBFlags & (VB_301B|VB_302B|VB_30xLV|VB_30xLVX)) ) {
+  	   dstH = (dstH * LCDheight) / pOverlay->SCREENheight;
+        }
+     } else if(iscrt2) {
+  	if (pSiS->VBFlags & VB_LVDS) {
+   		dstH = (dstH * LCDheight) / pOverlay->SCREENheight;
+		if (pPriv->displayMode == DISPMODE_MIRROR) flag = 1;
+        } else if ( (pSiS->VGAEngine == SIS_300_VGA) &&
+                    (pSiS->VBFlags & (VB_301B|VB_302B|VB_30xLV|VB_30xLVX)) ) {
+    		dstH = (dstH * LCDheight) / pOverlay->SCREENheight;
+		if (pPriv->displayMode == DISPMODE_MIRROR) flag = 1;
+        }
+     }
+  }
+  /* TW: For double scan modes, we need to double the height
+   *     (Perhaps we also need to scale LVDS, but I'm not sure.)
+   *     On 310/325 series, we need to double the width as well.
+   *     Interlace mode vice versa.
+   */
+  if(pSiS->CurrentLayout.mode->Flags & V_DBLSCAN) {
+	   	dstH = origdstH << 1;
+		flag = 0;
+		if(pSiS->VGAEngine == SIS_315_VGA) {
+			dstW <<= 1;
+		}
+  }
+  if(pSiS->CurrentLayout.mode->Flags & V_INTERLACE) {
+  		dstH = origdstH >> 1;
+		flag = 0;
   }
 
-    if (dstW == srcW) {
+  if(dstW < OVERLAY_MIN_WIDTH) dstW = OVERLAY_MIN_WIDTH;
+  if (dstW == srcW) {
         pOverlay->HUSF   = 0x00;
         pOverlay->IntBit = 0x05;
-    }
-    else if (dstW > srcW) {
-        dstW   += 2;
+	pOverlay->wHPre  = 0;
+  } else if (dstW > srcW) {
+        dstW += 2;
         pOverlay->HUSF   = (srcW << 16) / dstW;
         pOverlay->IntBit = 0x04;
-    } 
-    else {
+	pOverlay->wHPre  = 0;
+  } else {
         int tmpW = dstW;
 
-        I = 0x00;
+	/* TW: It seems, the hardware can't scale below factor .125 (=1/8) if the
+	       pitch isn't a multiple of 256.
+	       TODO: Test this on the 310/325 series!
+	 */
+	if((srcPitch % 256) || (srcPitch < 256)) {
+	   if(((dstW * 1000) / srcW) < 125) dstW = tmpW = ((srcW * 125) / 1000) + 1;
+	}
+
+        I = 0;
         pOverlay->IntBit = 0x01;
-        while (srcW >= tmpW)
-        {
+        while (srcW >= tmpW) {
             tmpW <<= 1;
             I++;
         }
@@ -665,44 +978,39 @@ set_scale_factor(SISOverlayPtr pOverlay, ScrnInfoPtr pScrn)
             pOverlay->HUSF = ((srcW - dstW) << 16) / dstW;
         else
             pOverlay->HUSF = 0x00;
-    }
+  }
 
-    if (dstH == srcH) {
+  if(dstH < OVERLAY_MIN_HEIGHT) dstH = OVERLAY_MIN_HEIGHT;
+  if (dstH == srcH) {
         pOverlay->VUSF   = 0x00;
         pOverlay->IntBit |= 0x0A;
-    }
-    else if (dstH > srcH) {
+  } else if (dstH > srcH) {
         dstH += 0x02;
         pOverlay->VUSF = (srcH << 16) / dstH;
         pOverlay->IntBit |= 0x08;
-    }
-    else {
+  } else {
         CARD32 realI;
 
         I = realI = srcH / dstH;
         pOverlay->IntBit |= 0x02;
 
-        if (I < 2)
-        {
-            pOverlay->VUSF = ((srcH - dstH)<<16)/dstH;
-        }
-        else
-        {
+        if (I < 2) {
+            pOverlay->VUSF = ((srcH - dstH) << 16) / dstH;
+	    /* TW: Needed for LCD-scaling modes */
+	    if ((flag) && (mult = (srcH / origdstH)) >= 2)
+	    		pOverlay->pitch /= mult;
+        } else {
 #if 0
             if (((pOverlay->bobEnable & 0x08) == 0x00) &&
-                (((srcPitch * I)>>2) > 0xFFF))
-            {
+                (((srcPitch * I)>>2) > 0xFFF)){
                 pOverlay->bobEnable |= 0x08;
                 srcPitch >>= 1;
             }
 #endif
-            if (((srcPitch * I)>>2) > 0xFFF)
-            {
+            if (((srcPitch * I)>>2) > 0xFFF) {
                 I = (0xFFF*2/srcPitch);
                 pOverlay->VUSF = 0xFFFF;
-            }
-            else
-            {
+            } else {
                 dstH = I * dstH;
                 if (srcH % dstH)
                     pOverlay->VUSF = ((srcH - dstH) << 16) / dstH;
@@ -712,61 +1020,59 @@ set_scale_factor(SISOverlayPtr pOverlay, ScrnInfoPtr pScrn)
             /* set video frame buffer offset */
             pOverlay->pitch = (CARD16)(srcPitch*I);
         }
-    }    
+   }
 }
 
-
 static void
 set_line_buf_size(SISOverlayPtr pOverlay)
 {
-    CARD8   preHIDF;
+    CARD8  preHIDF;
     CARD32 I;
     CARD32 line = pOverlay->srcW;
 
-    if (pOverlay->pixelFormat == PIXEL_FMT_YV12)
+    if ( (pOverlay->pixelFormat == PIXEL_FMT_YV12) ||
+         (pOverlay->pixelFormat == PIXEL_FMT_I420) )
     {
         preHIDF = pOverlay->wHPre & 0x07;
         switch (preHIDF)
         {
             case 3 :
                 if ((line & 0xffffff00) == line)
-                I = (line >> 8);
+                   I = (line >> 8);
                 else
-                I = (line >> 8) + 1;
+                   I = (line >> 8) + 1;
                 pOverlay->lineBufSize = (CARD8)(I * 32 - 1);
                 break;
             case 4 :
                 if ((line & 0xfffffe00) == line)
-                I = (line >> 9);
+                   I = (line >> 9);
                 else
-                I = (line >> 9) + 1;
+                   I = (line >> 9) + 1;
                 pOverlay->lineBufSize = (CARD8)(I * 64 - 1);
                 break;
             case 5 :
                 if ((line & 0xfffffc00) == line)
-                I = (line >> 10);
+                   I = (line >> 10);
                 else
-                I = (line >> 10) + 1;
+                   I = (line >> 10) + 1;
                 pOverlay->lineBufSize = (CARD8)(I * 128 - 1);
                 break;
             case 6 :
                 if ((line & 0xfffff800) == line)
-                I = (line >> 11);
+                   I = (line >> 11);
                 else
-                I = (line >> 11) + 1;
+                   I = (line >> 11) + 1;
                 pOverlay->lineBufSize = (CARD8)(I * 256 - 1);
                 break;
             default :
                 if ((line & 0xffffff80) == line)
-                I = (line >> 7);
+                   I = (line >> 7);
                 else
-                I = (line >> 7) + 1;
+                   I = (line >> 7) + 1;
                 pOverlay->lineBufSize = (CARD8)(I * 16 - 1);
                 break;
         }
-    }
-    else
-    {
+    } else { /* YUV2, UYVY */
         if ((line & 0xffffff8) == line)
             I = (line >> 3);
         else
@@ -776,53 +1082,113 @@ set_line_buf_size(SISOverlayPtr pOverlay)
 }
 
 static void
-merge_line_buf(SISPtr pSIS, SISPortPrivPtr pPriv, Bool enable)
+merge_line_buf(SISPtr pSiS, SISPortPrivPtr pPriv, Bool enable)
 {
   if(enable) {
-    if(pPriv->displayMode == DISPMODE_MIRROR)  {
-      setvideoregmask(pSIS, Index_VI_Control_Misc2, 0x00, 0x11);
-      setvideoregmask(pSIS, Index_VI_Control_Misc1, 0x04, 0x04);
-      setvideoregmask(pSIS, Index_VI_Control_Misc2, 0x01, 0x11);
-      setvideoregmask(pSIS, Index_VI_Control_Misc1, 0x04, 0x04);
+    switch (pPriv->displayMode){
+    case DISPMODE_SINGLE1:
+        if (pPriv->hasTwoOverlays) {
+           if (pPriv->dualHeadMode) {
+	       /* line merge */
+	       setvideoregmask(pSiS, Index_VI_Control_Misc2, 0x00, 0x11);
+      	       setvideoregmask(pSiS, Index_VI_Control_Misc1, 0x04, 0x04);
+	   } else {
+	       /* dual line merge */
+	       setvideoregmask(pSiS, Index_VI_Control_Misc2, 0x10, 0x11);
+      	       setvideoregmask(pSiS, Index_VI_Control_Misc1, 0x00, 0x04);
+	   }
+        } else {
+      	   setvideoregmask(pSiS, Index_VI_Control_Misc2, 0x10, 0x11);
+      	   setvideoregmask(pSiS, Index_VI_Control_Misc1, 0x00, 0x04);
+	}
+      	break;
+    case DISPMODE_SINGLE2:
+    	if (pPriv->hasTwoOverlays) {
+	   if (pPriv->dualHeadMode) {
+	      /* line merge */
+	      setvideoregmask(pSiS, Index_VI_Control_Misc2, 0x01, 0x11);
+     	      setvideoregmask(pSiS, Index_VI_Control_Misc1, 0x04, 0x04);
+	   } else {
+	      /* line merge */
+      	      setvideoregmask(pSiS, Index_VI_Control_Misc2, 0x01, 0x11); 
+     	      setvideoregmask(pSiS, Index_VI_Control_Misc1, 0x04, 0x04);
+	   }
+	} else {
+	   setvideoregmask(pSiS, Index_VI_Control_Misc2, 0x10, 0x11);
+      	   setvideoregmask(pSiS, Index_VI_Control_Misc1, 0x00, 0x04);
+	}
+     	break;
+    case DISPMODE_MIRROR:
+    default:
+        /* line merge */
+      	setvideoregmask(pSiS, Index_VI_Control_Misc2, 0x00, 0x11);
+      	setvideoregmask(pSiS, Index_VI_Control_Misc1, 0x04, 0x04);
+	if (pPriv->hasTwoOverlays) {
+	   /* line merge */
+      	   setvideoregmask(pSiS, Index_VI_Control_Misc2, 0x01, 0x11);
+      	   setvideoregmask(pSiS, Index_VI_Control_Misc1, 0x04, 0x04);
+	}
+      	break;
     }
-    else {
-      setvideoregmask(pSIS, Index_VI_Control_Misc2, 0x10, 0x11);
-      setvideoregmask(pSIS, Index_VI_Control_Misc1, 0x00, 0x04);
-      setvideoregmask(pSIS, Index_VI_Control_Misc2, 0x11, 0x11);
-      setvideoregmask(pSIS, Index_VI_Control_Misc1, 0x00, 0x04);
+  } else {
+    switch (pPriv->displayMode) {
+    case DISPMODE_SINGLE1:
+    	setvideoregmask(pSiS, Index_VI_Control_Misc2, 0x00, 0x11);
+    	setvideoregmask(pSiS, Index_VI_Control_Misc1, 0x00, 0x04);
+    	break;
+    case DISPMODE_SINGLE2:
+    	if (pPriv->hasTwoOverlays) {
+    	   setvideoregmask(pSiS, Index_VI_Control_Misc2, 0x01, 0x11);
+    	   setvideoregmask(pSiS, Index_VI_Control_Misc1, 0x00, 0x04);
+	} else {
+	   setvideoregmask(pSiS, Index_VI_Control_Misc2, 0x00, 0x11);
+    	   setvideoregmask(pSiS, Index_VI_Control_Misc1, 0x00, 0x04);
+	}
+	break;
+    case DISPMODE_MIRROR:
+    default:
+    	setvideoregmask(pSiS, Index_VI_Control_Misc2, 0x00, 0x11);
+    	setvideoregmask(pSiS, Index_VI_Control_Misc1, 0x00, 0x04);
+	if (pPriv->hasTwoOverlays) {
+	   setvideoregmask(pSiS, Index_VI_Control_Misc2, 0x01, 0x11);
+    	   setvideoregmask(pSiS, Index_VI_Control_Misc1, 0x00, 0x04);
+	}
+        break;
     }
   }
-  else {
-    setvideoregmask(pSIS, Index_VI_Control_Misc2, 0x00, 0x11);    
-    setvideoregmask(pSIS, Index_VI_Control_Misc1, 0x00, 0x04);
-    setvideoregmask(pSIS, Index_VI_Control_Misc2, 0x01, 0x11);    
-    setvideoregmask(pSIS, Index_VI_Control_Misc1, 0x00, 0x04);
-  }
 }
 
-
 static void
-set_format(SISPtr pSIS, SISOverlayPtr pOverlay)
+set_format(SISPtr pSiS, SISOverlayPtr pOverlay)
 {
     CARD8 fmt;
 
-    switch (pOverlay->pixelFormat)
-    {
-        case PIXEL_FMT_YV12:
+    switch (pOverlay->pixelFormat){
+    case PIXEL_FMT_YV12:
+    case PIXEL_FMT_I420:
         fmt = 0x0c;
         break;
-        case PIXEL_FMT_YUY2:
-        fmt = 0x28;
+    case PIXEL_FMT_YUY2:
+        fmt = 0x28; 
+        break;
+    case PIXEL_FMT_UYVY:
+        fmt = 0x08;
         break;
-        default:
+    case PIXEL_FMT_RGB5:   /* D[5:4] : 00 RGB555, 01 RGB 565 */
+        fmt = 0x00;
+	break;
+    case PIXEL_FMT_RGB6:
+        fmt = 0x10;
+	break;
+    default:
         fmt = 0x00;
         break;
     }
-    setvideoregmask(pSIS, Index_VI_Control_Misc0, fmt, 0x7c);
+    setvideoregmask(pSiS, Index_VI_Control_Misc0, fmt, 0x7c);
 }
 
 static void
-set_colorkey(SISPtr pSIS, CARD32 colorkey)
+set_colorkey(SISPtr pSiS, CARD32 colorkey)
 {
     CARD8 r, g, b;
 
@@ -831,144 +1197,478 @@ set_colorkey(SISPtr pSIS, CARD32 colorkey)
     r = (CARD8)((colorkey>>16) & 0xFF);
 
     /* Activate the colorkey mode */
-    setvideoreg(pSIS, Index_VI_Overlay_ColorKey_Blue_Min  ,(CARD8)b);
-    setvideoreg(pSIS, Index_VI_Overlay_ColorKey_Green_Min ,(CARD8)g);
-    setvideoreg(pSIS, Index_VI_Overlay_ColorKey_Red_Min   ,(CARD8)r);
+    setvideoreg(pSiS, Index_VI_Overlay_ColorKey_Blue_Min  ,(CARD8)b);
+    setvideoreg(pSiS, Index_VI_Overlay_ColorKey_Green_Min ,(CARD8)g);
+    setvideoreg(pSiS, Index_VI_Overlay_ColorKey_Red_Min   ,(CARD8)r);
+
+    setvideoreg(pSiS, Index_VI_Overlay_ColorKey_Blue_Max  ,(CARD8)b);
+    setvideoreg(pSiS, Index_VI_Overlay_ColorKey_Green_Max ,(CARD8)g);
+    setvideoreg(pSiS, Index_VI_Overlay_ColorKey_Red_Max   ,(CARD8)r);
+}
+
+static void
+set_brightness(SISPtr pSiS, CARD8 brightness)
+{
+    setvideoreg(pSiS, Index_VI_Brightness, brightness);
+}
+
+static void
+set_contrast(SISPtr pSiS, CARD8 contrast)
+{
+    setvideoregmask(pSiS, Index_VI_Contrast_Enh_Ctrl, contrast, 0x07);
+}
+
+/* 310/325 series only */
+static void
+set_saturation(SISPtr pSiS, char saturation)
+{
+    CARD8 temp = 0;
+    
+    if(saturation < 0) {
+    	temp |= 0x88;
+	saturation = -saturation;
+    }
+    temp |= (saturation & 0x07);
+    temp |= ((saturation & 0x07) << 4);
+    
+    setvideoreg(pSiS, Index_VI_Saturation, temp);
+}
+
+/* 310/325 series only */
+static void
+set_hue(SISPtr pSiS, CARD8 hue)
+{
+    setvideoreg(pSiS, Index_VI_Hue, (hue & 0x08) ? (hue ^ 0x07) : hue);
+}
+
+#ifdef NOT_YET_IMPLEMENTED /* ----------- TW: FOR FUTURE USE -------------------- */
+
+/* TW: Set Alpha */
+static void
+set_alpha(SISPtr pSiS, CARD8 alpha)
+{
+    CARD8 data;
+
+    data = getvideoreg(pSiS, Index_VI_Key_Overlay_OP);
+    data &= 0x0F;
+    setvideoreg(pSiS,Index_VI_Key_Overlay_OP, data | (alpha << 4));
+}
+
+/* TW: Set SubPicture Start Address (yet unused) */
+static void
+set_subpict_start_offset(SISPtr pSiS, SISOverlayPtr pOverlay, int index)
+{
+    CARD32 temp;
+    CARD8  data;
+
+    temp = pOverlay->SubPictAddr >> 4; /* TW: 630 <-> 315 shiftValue? */
+
+    setvideoreg(pSiS,Index_VI_SubPict_Buf_Start_Low, temp & 0xFF);
+    setvideoreg(pSiS,Index_VI_SubPict_Buf_Start_Middle, (temp>>8) & 0xFF);
+    setvideoreg(pSiS,Index_VI_SubPict_Buf_Start_High, (temp>>16) & 0x3F);
+    if (pSiS->VGAEngine == SIS_315_VGA) {
+       setvideoreg(pSiS,Index_VI_SubPict_Start_Over, (temp>>22) & 0x01);
+       /* Submit SubPict offset ? */
+       /* data=getvideoreg(pSiS,Index_VI_Control_Misc3); */
+       setvideoreg(pSiS,Index_VI_Control_Misc3, (1 << index) | 0x04);
+    }
+}
+
+/* TW: Set SubPicture Pitch (yet unused) */
+static void
+set_subpict_pitch(SISPtr pSiS, SISOverlayPtr pOverlay, int index)
+{
+    CARD32 temp;
+    CARD8  data;
+
+    temp = pOverlay->SubPictPitch >> 4; /* TW: 630 <-> 315 shiftValue? */
+
+    setvideoreg(pSiS,Index_VI_SubPict_Buf_Pitch, temp & 0xFF);
+    if (pSiS->VGAEngine == SIS_315_VGA) {
+       setvideoreg(pSiS,Index_VI_SubPict_Buf_Pitch_High, (temp>>8) & 0xFF);
+       /* Submit SubPict pitch ? */
+       /* data=getvideoreg(pSiS,Index_VI_Control_Misc3); */
+       setvideoreg(pSiS,Index_VI_Control_Misc3, (1 << index) | 0x04);
+    }
+}
+
+/* TW: Calculate and set SubPicture scaling (untested, unused yet) */
+static void
+set_subpict_scale_factor(SISOverlayPtr pOverlay, ScrnInfoPtr pScrn,
+                         SISPortPrivPtr pPriv, int index, int iscrt2)
+{
+  SISPtr pSiS = SISPTR(pScrn);
+  CARD32 I=0,mult=0;
+  int flag=0;
+
+  int dstW = pOverlay->SubPictdstBox.x2 - pOverlay->SubPictdstBox.x1;
+  int dstH = pOverlay->SubPictdstBox.y2 - pOverlay->SubPictdstBox.y1;
+  int srcW = pOverlay->SubPictsrcW;
+  int srcH = pOverlay->SubPictsrcH;
+  CARD16 LCDheight = pSiS->LCDheight;
+  int srcPitch = pOverlay->SubPictOrigPitch;
+  int origdstH = dstH;
+
+  /* TW: Stretch image due to idiotic LCD "auto"-scaling */
+  /* INCOMPLETE - See set_scale_factor() */
+  if ( (pPriv->bridgeIsSlave) && (pSiS->VBFlags & CRT2_LCD) ) {
+  	dstH = (dstH * LCDheight) / pOverlay->SCREENheight;
+  } else if ((index) && (pSiS->VBFlags & CRT2_LCD)) {
+   	dstH = (dstH * LCDheight) / pOverlay->SCREENheight;
+	if (pPriv->displayMode == DISPMODE_MIRROR) flag = 1;
+  }
+
+  if (dstW == srcW) {
+        pOverlay->SubPictHUSF   = 0x00;
+        pOverlay->SubPictIntBit = 0x01;
+  } else if (dstW > srcW) {
+        pOverlay->SubPictHUSF   = (srcW << 16) / dstW;
+        pOverlay->SubPictIntBit = 0x00;
+  } else {
+        int tmpW = dstW;
+
+        I = 0x00;
+        while (srcW >= tmpW) {
+            tmpW <<= 1;
+            I++;
+        }
+        pOverlay->SubPictwHPre = (CARD8)(I - 1);
+        dstW <<= (I - 1);
+        if ((srcW % dstW))
+            pOverlay->SubPictHUSF = ((srcW - dstW) << 16) / dstW;
+        else
+            pOverlay->SubPictHUSF = 0x00;
+
+	pOverlay->SubPictIntBit = 0x01;
+  }
+
+  if (dstH == srcH) {
+        pOverlay->SubPictVUSF   = 0x00;
+        pOverlay->SubPictIntBit |= 0x02;
+  } else if (dstH > srcH) {
+        dstH += 0x02;
+        pOverlay->SubPictVUSF = (srcH << 16) / dstH;
+     /* pOverlay->SubPictIntBit |= 0x00; */
+  } else {
+        CARD32 realI;
+
+        I = realI = srcH / dstH;
+        pOverlay->SubPictIntBit |= 0x02;
+
+        if (I < 2) {
+            pOverlay->SubPictVUSF = ((srcH - dstH) << 16) / dstH;
+	    /* TW: Needed for LCD-scaling modes */
+	    if ((flag) && (mult = (srcH / origdstH)) >= 2)
+	    		pOverlay->SubPictPitch /= mult;
+        } else {
+            if (((srcPitch * I)>>2) > 0xFFF) {
+                I = (0xFFF*2/srcPitch);
+                pOverlay->SubPictVUSF = 0xFFFF;
+            } else {
+                dstH = I * dstH;
+                if (srcH % dstH)
+                    pOverlay->SubPictVUSF = ((srcH - dstH) << 16) / dstH;
+                else
+                    pOverlay->SubPictVUSF = 0x00;
+            }
+            /* set video frame buffer offset */
+            pOverlay->SubPictPitch = (CARD16)(srcPitch*I);
+        }
+   }
+   /* set SubPicture scale factor */
+   setvideoreg (pSiS, Index_VI_SubPict_Hor_Scale_Low,  (CARD8)(pOverlay->SubPictHUSF));
+   setvideoreg (pSiS, Index_VI_SubPict_Hor_Scale_High, (CARD8)((pOverlay->SubPictHUSF)>>8));
+   setvideoreg (pSiS, Index_VI_SubPict_Vert_Scale_Low, (CARD8)(pOverlay->SubPictVUSF));
+   setvideoreg (pSiS, Index_VI_SubPict_Vert_Scale_High,(CARD8)((pOverlay->SubPictVUSF)>>8));
+
+   setvideoregmask (pSiS, Index_VI_SubPict_Scale_Control,
+   				(pOverlay->SubPictIntBit << 3) |
+				(pOverlay->SubPictwHPre), 0x7f);
+}
+
+/* TW: Set SubPicture Preset (yet unused) */
+static void
+set_subpict_preset(SISPtr pSiS, SISOverlayPtr pOverlay)
+{
+    CARD32 temp;
+    CARD8  data;
+
+    temp = pOverlay->SubPictPreset >> 4; /* TW: 630 <-> 315 ? */
+
+    setvideoreg(pSiS,Index_VI_SubPict_Buf_Preset_Low, temp & 0xFF);
+    setvideoreg(pSiS,Index_VI_SubPict_Buf_Preset_Middle, (temp>>8) & 0xFF);
+    data = getvideoreg(pSiS,Index_VI_SubPict_Buf_Start_High);
+    if (temp > 0xFFFF)
+    	data |= 0x40;
+    else
+    	data &= ~0x40;
+    setvideoreg(pSiS,Index_VI_SubPict_Buf_Start_High, data);
+}
+
+static void
+enable_subpict_overlay(SISPtr pSiS, Bool enable)
+{
+   setvideoregmask(pSiS, Index_VI_SubPict_Scale_Control,
+   		enable ? 0x40 : 0x00,
+		0x40);
+}
+
+/* TW: Set overlay for subpicture */
+static void
+set_subpict_overlay(SISPtr pSiS, SISOverlayPtr pOverlay, SISPortPrivPtr pPriv, int index)
+{
+    ScrnInfoPtr pScrn = pSiS->pScrn;
 
-    setvideoreg(pSIS, Index_VI_Overlay_ColorKey_Blue_Max  ,(CARD8)b);
-    setvideoreg(pSIS, Index_VI_Overlay_ColorKey_Green_Max ,(CARD8)g);
-    setvideoreg(pSIS, Index_VI_Overlay_ColorKey_Red_Max   ,(CARD8)r);
+    set_subpict_pitch(pSiS, &overlay, index);
+    set_subpict_start_offset(pSiS, &overlay, index);
+    set_subpict_scale_factor(&overlay, pScrn, pPriv, index);
+    /* set_subpict_preset(pSiS, &overlay); */
+    /* enable_subpict_overlay(pSiS, 1); */
 }
 
 
+/* TW: Set MPEG Field Preset (yet unused) */
 static void
-set_brightness(SISPtr pSIS, CARD8 brightness)
+set_mpegfield_preset(SISPtr pSiS, SISOverlayPtr pOverlay)
 {
-    setvideoreg(pSIS, Index_VI_Brightness  ,brightness);
+    setvideoreg(pSiS,Index_MPEG_Y_Buf_Preset_Low, pOverlay->MPEG_Y & 0xFF);
+    setvideoreg(pSiS,Index_MPEG_Y_Buf_Preset_Middle, (pOverlay->MPEG_Y>>8) & 0xFF);
+
+    setvideoreg(pSiS,Index_MPEG_UV_Buf_Preset_Low, pOverlay->MPEG_UV & 0xFF);
+    setvideoreg(pSiS,Index_MPEG_UV_Buf_Preset_Middle, (pOverlay->MPEG_UV>>8) & 0xFF);
+
+    setvideoreg(pSiS,Index_MPEG_Y_UV_Buf_Preset_High,
+    		((pOverlay->MPEG_Y>>16) & 0x0F) | ((pOverlay->MPEG_UV>>12) & 0xF0));
+}
+
+static void
+set_mpegfield_scale(SISPtr pSiS, SISOverlayPtr pOverlay)
+{
+	/* Empty for now */
 }
 
+#endif /* ------------------------------------------------------------------- */
 
 static void
-set_overlay(SISPtr pSIS, SISOverlayPtr pOverlay)
+set_overlay(SISPtr pSiS, SISOverlayPtr pOverlay, SISPortPrivPtr pPriv, int index)
 {
-    ScrnInfoPtr pScrn = pSIS->pScrn;
+    ScrnInfoPtr pScrn = pSiS->pScrn;
 
     CARD16 pitch=0;
     CARD8  h_over=0, v_over=0;
-    CARD16 bottom, right;
-    CARD16 screenX = pScrn->currentMode->HDisplay;
-    CARD16 screenY = pScrn->currentMode->VDisplay;
+    CARD16 top, bottom, left, right;
+    CARD16 screenX = pSiS->CurrentLayout.mode->HDisplay;
+    CARD16 screenY = pSiS->CurrentLayout.mode->VDisplay;
+    CARD8  data;
+    CARD32 watchdog;
 
+    top = pOverlay->dstBox.y1;
     bottom = pOverlay->dstBox.y2;
-    if (bottom > screenY)
+    if (bottom > screenY) {
         bottom = screenY;
+    }
 
+    left = pOverlay->dstBox.x1;
     right = pOverlay->dstBox.x2;
-    if (right > screenX)
+    if (right > screenX) {
         right = screenX;
+    }
 
-    h_over = (((pOverlay->dstBox.x1>>8) & 0x0f) | ((right>>4) & 0xf0));
-    v_over = (((pOverlay->dstBox.y1>>8) & 0x0f) | ((bottom>>4) & 0xf0));
+    /* TW: DoubleScan modes require Y coordinates * 2 */
+    if(pSiS->CurrentLayout.mode->Flags & V_DBLSCAN) {
+    	 top <<= 1;
+	 bottom <<= 1;
+    }
+    /* TW: Interlace modes require Y coordinates / 2 */
+    if(pSiS->CurrentLayout.mode->Flags & V_INTERLACE) {
+    	 top >>= 1;
+	 bottom >>= 1;
+    }
 
-    pitch = pOverlay->pitch;
+    h_over = (((left>>8) & 0x0f) | ((right>>4) & 0xf0));
+    v_over = (((top>>8) & 0x0f) | ((bottom>>4) & 0xf0));
+
+    pitch = pOverlay->pitch >> pPriv->shiftValue;
 
     /* set line buffer size */
-    setvideoreg(pSIS, Index_VI_Line_Buffer_Size, pOverlay->lineBufSize);
-    
-    setvideoregmask (pSIS, Index_VI_Key_Overlay_OP, pOverlay->keyOP, 0x0f);
+    setvideoreg(pSiS, Index_VI_Line_Buffer_Size, pOverlay->lineBufSize);
+
+    /* set color key mode */
+    setvideoregmask (pSiS, Index_VI_Key_Overlay_OP, pOverlay->keyOP, 0x0f);
+
+    /* TW: We don't have to wait for vertical retrace in all cases */
+    if(pPriv->mustwait) {
+	watchdog = WATCHDOG_DELAY;
+    	while (pOverlay->VBlankActiveFunc(pSiS) && --watchdog);
+	watchdog = WATCHDOG_DELAY;
+	while ((!pOverlay->VBlankActiveFunc(pSiS)) && --watchdog);
+	if (!watchdog) xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+			"Xv: Waiting for vertical retrace timed-out\n");
+    }
 
-    while (pOverlay->VBlankActiveFunc(pSIS));
-    while (!pOverlay->VBlankActiveFunc(pSIS));
-    
-    setvideoreg (pSIS, Index_VI_Disp_Y_Buf_Pitch_Low, (CARD8)(pitch>>2));
-    setvideoregmask (pSIS, Index_VI_Disp_Y_UV_Buf_Pitch_High, (CARD8)(pitch >> 10), 0x0f);
+    /* Unlock address registers */
+    data = getvideoreg(pSiS, Index_VI_Control_Misc1);
+    setvideoreg (pSiS, Index_VI_Control_Misc1, data | 0x20);
+    /* TEST: Is this required? */
+    setvideoreg (pSiS, Index_VI_Control_Misc1, data | 0x20);
+    /* TEST end */
+
+    /* TEST: Is this required? */
+    if (pSiS->Chipset == SIS_315_VGA)
+    	setvideoreg (pSiS, Index_VI_Control_Misc3, 0x00);
+    /* TEST end */
+
+    /* Set Y buf pitch */
+    setvideoreg (pSiS, Index_VI_Disp_Y_Buf_Pitch_Low, (CARD8)(pitch));
+    setvideoregmask (pSiS, Index_VI_Disp_Y_UV_Buf_Pitch_Middle, (CARD8)(pitch>>8), 0x0f);
+
+    /* Set Y start address */
+    setvideoreg (pSiS, Index_VI_Disp_Y_Buf_Start_Low,    (CARD8)(pOverlay->PSY));
+    setvideoreg (pSiS, Index_VI_Disp_Y_Buf_Start_Middle, (CARD8)((pOverlay->PSY)>>8));
+    setvideoreg (pSiS, Index_VI_Disp_Y_Buf_Start_High,   (CARD8)((pOverlay->PSY)>>16));
+
+    /* set 310/325 series overflow bits for Y plane */
+    if (pSiS->VGAEngine == SIS_315_VGA) {
+        setvideoreg (pSiS, Index_VI_Disp_Y_Buf_Pitch_High, (CARD8)(pitch>>12));
+    	setvideoreg (pSiS, Index_VI_Y_Buf_Start_Over, ((CARD8)((pOverlay->PSY)>>24) & 0x01));
+    }
+
+    /* Set U/V data if using plane formats */
+    if ( (pOverlay->pixelFormat == PIXEL_FMT_YV12) ||
+    	 (pOverlay->pixelFormat == PIXEL_FMT_I420) )  {
 
-    setvideoregmask (pSIS, Index_VI_Control_Misc1, 0x20, 0x20);
-    if (pOverlay->pixelFormat == PIXEL_FMT_YV12)
-    {
         CARD32  PSU=0, PSV=0;
 
         PSU = pOverlay->PSU;
         PSV = pOverlay->PSV;
 
-        setvideoreg (pSIS, Index_VI_Disp_UV_Buf_Pitch_Low, (CARD8)(pitch >> 3));
-        setvideoregmask (pSIS, Index_VI_Disp_Y_UV_Buf_Pitch_High, (CARD8)(pitch >> 7), 0xf0);
+	/* Set U/V pitch */
+	setvideoreg (pSiS, Index_VI_Disp_UV_Buf_Pitch_Low, (CARD8)(pitch >> 1));
+        setvideoregmask (pSiS, Index_VI_Disp_Y_UV_Buf_Pitch_Middle, (CARD8)(pitch >> 5), 0xf0);
+
         /* set U/V start address */
-        setvideoreg (pSIS, Index_VI_U_Buf_Start_Low,   (CARD8)PSU);
-        setvideoreg (pSIS, Index_VI_U_Buf_Start_Middle,(CARD8)(PSU>>8));
-        setvideoreg (pSIS, Index_VI_U_Buf_Start_High,  (CARD8)(PSU>>16));
+        setvideoreg (pSiS, Index_VI_U_Buf_Start_Low,   (CARD8)PSU);
+        setvideoreg (pSiS, Index_VI_U_Buf_Start_Middle,(CARD8)(PSU>>8));
+        setvideoreg (pSiS, Index_VI_U_Buf_Start_High,  (CARD8)(PSU>>16));
+
+        setvideoreg (pSiS, Index_VI_V_Buf_Start_Low,   (CARD8)PSV);
+        setvideoreg (pSiS, Index_VI_V_Buf_Start_Middle,(CARD8)(PSV>>8));
+        setvideoreg (pSiS, Index_VI_V_Buf_Start_High,  (CARD8)(PSV>>16));
+
+	/* 310/325 series overflow bits */
+	if (pSiS->VGAEngine == SIS_315_VGA) {
+	   setvideoreg (pSiS, Index_VI_Disp_UV_Buf_Pitch_High, (CARD8)(pitch>>13));
+	   setvideoreg (pSiS, Index_VI_U_Buf_Start_Over, ((CARD8)(PSU>>24) & 0x01));
+	   setvideoreg (pSiS, Index_VI_V_Buf_Start_Over, ((CARD8)(PSV>>24) & 0x01));
+	}
+    }
 
-        setvideoreg (pSIS, Index_VI_V_Buf_Start_Low,   (CARD8)PSV);
-        setvideoreg (pSIS, Index_VI_V_Buf_Start_Middle,(CARD8)(PSV>>8));
-        setvideoreg (pSIS, Index_VI_V_Buf_Start_High,  (CARD8)(PSV>>16));
+    if (pSiS->VGAEngine == SIS_315_VGA) {
+	/* Trigger register copy for 310 series */
+	setvideoreg(pSiS, Index_VI_Control_Misc3, 1 << index);
     }
+
     /* set scale factor */
-    setvideoreg (pSIS, Index_VI_Hor_Post_Up_Scale_Low, (CARD8)(pOverlay->HUSF));
-    setvideoreg (pSIS, Index_VI_Hor_Post_Up_Scale_High,(CARD8)((pOverlay->HUSF)>>8));
-    setvideoreg (pSIS, Index_VI_Ver_Up_Scale_Low,      (CARD8)(pOverlay->VUSF));
-    setvideoreg (pSIS, Index_VI_Ver_Up_Scale_High,     (CARD8)((pOverlay->VUSF)>>8));
-
-    setvideoregmask (pSIS, Index_VI_Scale_Control, (pOverlay->IntBit << 3)|(pOverlay->wHPre), 0x7f);
-
-    /* set destination position */
-    setvideoreg(pSIS, Index_VI_Win_Hor_Disp_Start_Low, (CARD8)pOverlay->dstBox.x1);
-    setvideoreg(pSIS, Index_VI_Win_Hor_Disp_End_Low, (CARD8)right);
-    setvideoreg(pSIS, Index_VI_Win_Hor_Over, (CARD8)h_over);
-
-    setvideoreg(pSIS, Index_VI_Win_Ver_Disp_Start_Low, (CARD8)pOverlay->dstBox.y1);
-    setvideoreg(pSIS, Index_VI_Win_Ver_Disp_End_Low, (CARD8)bottom);
-    setvideoreg(pSIS, Index_VI_Win_Ver_Over, (CARD8)v_over);
-
-    /* set display start address */
-    setvideoreg (pSIS, Index_VI_Disp_Y_Buf_Start_Low, (CARD8)(pOverlay->PSY));
-    setvideoreg (pSIS, Index_VI_Disp_Y_Buf_Start_Middle, (CARD8)((pOverlay->PSY)>>8));
-    setvideoreg (pSIS, Index_VI_Disp_Y_Buf_Start_High, (CARD8)((pOverlay->PSY)>>16));
-    setvideoregmask(pSIS, Index_VI_Control_Misc1, pOverlay->bobEnable, 0x1a);
-    setvideoregmask (pSIS, Index_VI_Control_Misc1, 0x00, 0x20);
-    
-    /* set contrast factor */
-/*
-    setvideoregmask(pSIS, Index_VI_Contrast_Enh_Ctrl, pOverlay->contrastCtrl<<6, 0xc0);
-    setvideoreg (pSIS, Index_VI_Contrast_Factor, pOverlay->contrastFactor);
-*/
-}
+    setvideoreg (pSiS, Index_VI_Hor_Post_Up_Scale_Low, (CARD8)(pOverlay->HUSF));
+    setvideoreg (pSiS, Index_VI_Hor_Post_Up_Scale_High,(CARD8)((pOverlay->HUSF)>>8));
+    setvideoreg (pSiS, Index_VI_Ver_Up_Scale_Low,      (CARD8)(pOverlay->VUSF));
+    setvideoreg (pSiS, Index_VI_Ver_Up_Scale_High,     (CARD8)((pOverlay->VUSF)>>8));
 
+    setvideoregmask (pSiS, Index_VI_Scale_Control,     (pOverlay->IntBit << 3)
+                                                      |(pOverlay->wHPre), 0x7f);
 
+    /* set destination window position */
+    setvideoreg(pSiS, Index_VI_Win_Hor_Disp_Start_Low, (CARD8)left);
+    setvideoreg(pSiS, Index_VI_Win_Hor_Disp_End_Low,   (CARD8)right);
+    setvideoreg(pSiS, Index_VI_Win_Hor_Over,           (CARD8)h_over);
+
+    setvideoreg(pSiS, Index_VI_Win_Ver_Disp_Start_Low, (CARD8)top);
+    setvideoreg(pSiS, Index_VI_Win_Ver_Disp_End_Low,   (CARD8)bottom);
+    setvideoreg(pSiS, Index_VI_Win_Ver_Over,           (CARD8)v_over);
+
+    setvideoregmask(pSiS, Index_VI_Control_Misc1, pOverlay->bobEnable, 0x1a);
+
+    /* Lock the address registers */
+    setvideoregmask(pSiS, Index_VI_Control_Misc1, 0x00, 0x20);
+}
+
+/* TW: Overlay MUST NOT be switched off while beam is over it */
 static void
-close_overlay(SISPtr pSIS, SISPortPrivPtr pPriv)
+close_overlay(SISPtr pSiS, SISPortPrivPtr pPriv)
 {
-  setvideoregmask (pSIS, Index_VI_Control_Misc2, 0, 0x01);
-  setvideoregmask(pSIS, Index_VI_Control_Misc0, 0x00, 0x02);
-  setvideoregmask (pSIS, Index_VI_Control_Misc2, 1, 0x01);
-  setvideoregmask(pSIS, Index_VI_Control_Misc0, 0x00, 0x02);
+  CARD32 watchdog;
+
+  if ((pPriv->displayMode == DISPMODE_SINGLE2) ||
+      (pPriv->displayMode == DISPMODE_MIRROR)) {
+     if (pPriv->hasTwoOverlays) {
+     	setvideoregmask (pSiS, Index_VI_Control_Misc2, 0x01, 0x01);
+     	watchdog = WATCHDOG_DELAY;
+     	while(vblank_active_CRT2(pSiS) && --watchdog);
+     	watchdog = WATCHDOG_DELAY;
+     	while((!vblank_active_CRT2(pSiS)) && --watchdog);
+     	setvideoregmask(pSiS, Index_VI_Control_Misc0, 0x00, 0x02);
+     	watchdog = WATCHDOG_DELAY;
+     	while(vblank_active_CRT2(pSiS) && --watchdog);
+     	watchdog = WATCHDOG_DELAY;
+     	while((!vblank_active_CRT2(pSiS)) && --watchdog);
+     } else if (pPriv->displayMode == DISPMODE_SINGLE2) {
+      	setvideoregmask (pSiS, Index_VI_Control_Misc2, 0x00, 0x01);
+     	watchdog = WATCHDOG_DELAY;
+     	while(vblank_active_CRT1(pSiS) && --watchdog);
+     	watchdog = WATCHDOG_DELAY;
+     	while((!vblank_active_CRT1(pSiS)) && --watchdog);
+     	setvideoregmask(pSiS, Index_VI_Control_Misc0, 0x00, 0x02);
+     	watchdog = WATCHDOG_DELAY;
+     	while(vblank_active_CRT1(pSiS) && --watchdog);
+     	watchdog = WATCHDOG_DELAY;
+     	while((!vblank_active_CRT1(pSiS)) && --watchdog);
+     }
+  }
+  if ((pPriv->displayMode == DISPMODE_SINGLE1) ||
+      (pPriv->displayMode == DISPMODE_MIRROR)) {
+     setvideoregmask (pSiS, Index_VI_Control_Misc2, 0x00, 0x01);
+     watchdog = WATCHDOG_DELAY;
+     while(vblank_active_CRT1(pSiS) && --watchdog);
+     watchdog = WATCHDOG_DELAY;
+     while((!vblank_active_CRT1(pSiS)) && --watchdog);
+     setvideoregmask(pSiS, Index_VI_Control_Misc0, 0x00, 0x02);
+     watchdog = WATCHDOG_DELAY;
+     while(vblank_active_CRT1(pSiS) && --watchdog);
+     watchdog = WATCHDOG_DELAY;
+     while((!vblank_active_CRT1(pSiS)) && --watchdog);
+  }
 }
 
-
 static void
 SISDisplayVideo(ScrnInfoPtr pScrn, SISPortPrivPtr pPriv)
 {
-   SISPtr pSIS = SISPTR(pScrn);
+   SISPtr pSiS = SISPTR(pScrn);
    
    short srcPitch = pPriv->srcPitch;
    short height = pPriv->height;
    SISOverlayRec overlay; 
    int srcOffsetX=0, srcOffsetY=0;
    int sx, sy;
-   int index = 0;
+   int index = 0, iscrt2 = 0;
 
    memset(&overlay, 0, sizeof(overlay));
    overlay.pixelFormat = pPriv->id;
-   overlay.pitch = srcPitch;
-   overlay.keyOP = 0x03;
+   overlay.pitch = overlay.origPitch = srcPitch;
+   overlay.keyOP = 0x03;	/* DestKey mode */
    /* overlay.bobEnable = 0x02; */
-   overlay.bobEnable = 0x00;
+   overlay.bobEnable = 0x00;    /* Disable BOB (whatever that is) */
+
+   overlay.SCREENheight = pSiS->CurrentLayout.mode->VDisplay;
    
    overlay.dstBox.x1 = pPriv->drw_x - pScrn->frameX0;
    overlay.dstBox.x2 = pPriv->drw_x + pPriv->drw_w - pScrn->frameX0;
    overlay.dstBox.y1 = pPriv->drw_y - pScrn->frameY0;
    overlay.dstBox.y2 = pPriv->drw_y + pPriv->drw_h - pScrn->frameY0;
 
-   /* FIXME: assume (x2 > x1), (y2 > y1) */
+   if((overlay.dstBox.x1 > overlay.dstBox.x2) ||
+   		(overlay.dstBox.y1 > overlay.dstBox.y2))
+     return;
+
    if((overlay.dstBox.x2 < 0) || (overlay.dstBox.y2 < 0))
      return;
 
@@ -988,15 +1688,42 @@ SISDisplayVideo(ScrnInfoPtr pScrn, SISPortPrivPtr pPriv)
        overlay.PSY = pPriv->bufAddr[pPriv->currentBuf] + sx + sy*srcPitch;
        overlay.PSV = pPriv->bufAddr[pPriv->currentBuf] + height*srcPitch + ((sx + sy*srcPitch/2) >> 1);
        overlay.PSU = pPriv->bufAddr[pPriv->currentBuf] + height*srcPitch*5/4 + ((sx + sy*srcPitch/2) >> 1);
-       overlay.PSY >>= 2;
-       overlay.PSV >>= 2;
-       overlay.PSU >>= 2;
+#ifdef SISDUALHEAD
+       overlay.PSY += HEADOFFSET;
+       overlay.PSV += HEADOFFSET;
+       overlay.PSU += HEADOFFSET;
+#endif
+       overlay.PSY >>= pPriv->shiftValue;
+       overlay.PSV >>= pPriv->shiftValue;
+       overlay.PSU >>= pPriv->shiftValue;
+       break;
+     case PIXEL_FMT_I420:
+       sx = (pPriv->src_x + srcOffsetX) & ~7;
+       sy = (pPriv->src_y + srcOffsetY) & ~1;
+       overlay.PSY = pPriv->bufAddr[pPriv->currentBuf] + sx + sy*srcPitch;
+       overlay.PSV = pPriv->bufAddr[pPriv->currentBuf] + height*srcPitch*5/4 + ((sx + sy*srcPitch/2) >> 1);
+       overlay.PSU = pPriv->bufAddr[pPriv->currentBuf] + height*srcPitch + ((sx + sy*srcPitch/2) >> 1);
+#ifdef SISDUALHEAD
+       overlay.PSY += HEADOFFSET;
+       overlay.PSV += HEADOFFSET;
+       overlay.PSU += HEADOFFSET;
+#endif
+       overlay.PSY >>= pPriv->shiftValue;
+       overlay.PSV >>= pPriv->shiftValue;
+       overlay.PSU >>= pPriv->shiftValue;
        break;
      case PIXEL_FMT_YUY2:
+     case PIXEL_FMT_UYVY:
+     case PIXEL_FMT_RGB6:
+     case PIXEL_FMT_RGB5:
      default:
        sx = (pPriv->src_x + srcOffsetX) & ~1;
        sy = (pPriv->src_y + srcOffsetY);
-       overlay.PSY = (pPriv->bufAddr[pPriv->currentBuf] + sx*2 + sy*srcPitch) >> 2;
+       overlay.PSY = (pPriv->bufAddr[pPriv->currentBuf] + sx*2 + sy*srcPitch);
+#ifdef SISDUALHEAD
+       overlay.PSY += HEADOFFSET;
+#endif
+       overlay.PSY >>= pPriv->shiftValue;
        break;      
    }
 
@@ -1004,117 +1731,193 @@ SISDisplayVideo(ScrnInfoPtr pScrn, SISPortPrivPtr pPriv)
    overlay.srcW = pPriv->src_w - (sx - pPriv->src_x);
    overlay.srcH = pPriv->src_h - (sy - pPriv->src_y);
 
-   /* merge line buffer */
-   /* TODO: unnecessay to do it several times */ 
-   merge_line_buf (pSIS, pPriv, (overlay.srcW > 384));
+   if ( (pPriv->oldx1 != overlay.dstBox.x1) ||
+   	(pPriv->oldx2 != overlay.dstBox.x2) ||
+	(pPriv->oldy1 != overlay.dstBox.y1) ||
+	(pPriv->oldy2 != overlay.dstBox.y2) ) {
+	pPriv->mustwait = 1;
+	pPriv->oldx1 = overlay.dstBox.x1; pPriv->oldx2 = overlay.dstBox.x2;
+	pPriv->oldy1 = overlay.dstBox.y1; pPriv->oldy2 = overlay.dstBox.y2;
+   }
 
-   /* set line buffer length */
-   set_line_buf_size (&overlay);
-  
-   /* set scale factor */
-   set_scale_factor (&overlay, pScrn);
+   /* TW: setup dispmode (MIRROR, SINGLEx) */
+   set_dispmode(pScrn, pPriv);
+
+   /* TW: set display mode SR06,32 (CRT1, CRT2 or mirror) */
+   set_disptype_regs(pScrn, pPriv);
+
+   /* set (not only calc) merge line buffer */
+   merge_line_buf(pSiS, pPriv, (overlay.srcW > 384));
+
+   /* calculate (not set!) line buffer length */
+   set_line_buf_size(&overlay);
 
    if (pPriv->displayMode == DISPMODE_SINGLE2) {
-     index = 1;
+     if (pPriv->hasTwoOverlays) {
+	  /* TW: On chips with two overlays we use
+	   * overlay 2 for CRT2 */
+      	  index = 1; iscrt2 = 1;
+     } else {
+     	  /* TW: On chips with only one overlay we
+	   * use that only overlay for CRT2 */
+          index = 0; iscrt2 = 1;
+     }
      overlay.VBlankActiveFunc = vblank_active_CRT2;
-     overlay.GetScanLineFunc = get_scanline_CRT2;
-   }
-   else {
-     index = 0;
+     /* overlay.GetScanLineFunc = get_scanline_CRT2; */
+   } else {
+     index = 0; iscrt2 = 0;
      overlay.VBlankActiveFunc = vblank_active_CRT1;
-     overlay.GetScanLineFunc = get_scanline_CRT1;   
+     /* overlay.GetScanLineFunc = get_scanline_CRT1; */
    }
 
+   /* TW: Do the following in a loop for CRT1 and CRT2 ----------------- */
 MIRROR:
 
-   setvideoregmask (pSIS, Index_VI_Control_Misc2, index, 0x01);
-
-   /* set scale temporarily */
-   {
-     int dstW = overlay.dstBox.x2 - overlay.dstBox.x1;
-     int srcW = overlay.srcW;
-     unsigned char i = 0;
-     
-     dstW <<= 1;
-     while(srcW > dstW) {
-       dstW <<= 1;
-       i++;
-     }   
-     setvideoregmask (pSIS, Index_VI_Scale_Control, i, 0x07);       
-   }
-         
+   /* calculate (not set!) scale factor */
+   calc_scale_factor(&overlay, pScrn, pPriv, index, iscrt2);
+
+   /* Select video1 (used for CRT1) or video2 (used for CRT2) */
+   setvideoregmask(pSiS, Index_VI_Control_Misc2, index, 0x01);
+
    /* set format */
-   set_format(pSIS, &overlay);
-      
+   set_format(pSiS, &overlay);
+
    /* set color key */
-   /* TODO: update only when colorkey changed */
-   /* FIXME, is the RGB order correct? */
-   set_colorkey(pSIS, pPriv->colorKey);
+   set_colorkey(pSiS, pPriv->colorKey);
+
+   /* set brightness, contrast, hue and saturation */
+   set_brightness(pSiS, pPriv->brightness);
+   set_contrast(pSiS, pPriv->contrast);
+   if (pSiS->VGAEngine == SIS_315_VGA) {
+   	set_hue(pSiS, pPriv->hue);
+   	set_saturation(pSiS, pPriv->saturation);
+   }
 
-   /* set brightness */
-   set_brightness(pSIS, pPriv->brightness);   
-   
    /* set overlay */
-   set_overlay(pSIS, &overlay);
-   
-   /* enable overlay */    
-   setvideoregmask (pSIS, Index_VI_Control_Misc0, 0x02, 0x02);
+   set_overlay(pSiS, &overlay, pPriv, index);
 
-   if(((pPriv->displayMode == DISPMODE_MIRROR) && (index == 0))) {
-     index = 1;
+   /* enable overlay */
+   setvideoregmask (pSiS, Index_VI_Control_Misc0, 0x02, 0x02);
+
+   if(index == 0 &&
+      pPriv->displayMode == DISPMODE_MIRROR &&
+      pPriv->hasTwoOverlays) {
+     index = 1; iscrt2 = 1;
      overlay.VBlankActiveFunc = vblank_active_CRT2;
-     overlay.GetScanLineFunc = get_scanline_CRT2;
+     /* overlay.GetScanLineFunc = get_scanline_CRT2; */
      goto MIRROR;
    }
+   pPriv->mustwait = 0;
 }
 
+static FBLinearPtr
+SISAllocateOverlayMemory(
+  ScrnInfoPtr pScrn,
+  FBLinearPtr linear,
+  int size
+){
+   ScreenPtr pScreen;
+   FBLinearPtr new_linear;
 
-static void 
+   if(linear) {
+	if(linear->size >= size)
+	   return linear;
+
+	if(xf86ResizeOffscreenLinear(linear, size))
+	   return linear;
+
+	xf86FreeOffscreenLinear(linear);
+   }
+
+   pScreen = screenInfo.screens[pScrn->scrnIndex];
+
+   new_linear = xf86AllocateOffscreenLinear(pScreen, size, 8,
+                                            NULL, NULL, NULL);
+
+   if(!new_linear) {
+        int max_size;
+
+        xf86QueryLargestOffscreenLinear(pScreen, &max_size, 8,
+				       PRIORITY_EXTREME);
+
+        if(max_size < size) return NULL;
+
+        xf86PurgeUnlockedOffscreenAreas(pScreen);
+        new_linear = xf86AllocateOffscreenLinear(pScreen, size, 8,
+                                                 NULL, NULL, NULL);
+   }
+   if (!new_linear)
+        xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+	           "Xv: Failed to allocate %dK of video memory\n", size/1024);
+#ifdef TWDEBUG
+   else
+        xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+	           "Xv: Allocated %dK of video memory\n", size/1024);
+#endif
+
+   return new_linear;
+}
+
+static void
+SISFreeOverlayMemory(ScrnInfoPtr pScrn)
+{
+    SISPortPrivPtr pPriv = GET_PORT_PRIVATE(pScrn);
+
+    if(pPriv->linear) {
+        xf86FreeOffscreenLinear(pPriv->linear);
+	pPriv->linear = NULL;
+    }
+}
+
+static void
 SISStopVideo(ScrnInfoPtr pScrn, pointer data, Bool shutdown)
 {
   SISPortPrivPtr pPriv = (SISPortPrivPtr)data;
-  SISPtr pSIS = SISPTR(pScrn);
+  SISPtr pSiS = SISPTR(pScrn);
+
+  if(pPriv->grabbedByV4L)
+  	return;
 
-  REGION_EMPTY(pScrn->pScreen, &pPriv->clip);   
+  REGION_EMPTY(pScrn->pScreen, &pPriv->clip);
 
   if(shutdown) {
      if(pPriv->videoStatus & CLIENT_VIDEO_ON) {
-       close_overlay(pSIS, pPriv);
-     }
-     if(pPriv->fbAreaPtr) {
-       xf86FreeOffscreenArea(pPriv->fbAreaPtr);
-       pPriv->fbAreaPtr = NULL;
-       pPriv->fbSize = 0;
+       close_overlay(pSiS, pPriv);
+       pPriv->mustwait = 1;
      }
+     SISFreeOverlayMemory(pScrn);
      pPriv->videoStatus = 0;
+     pSiS->VideoTimerCallback = NULL;
   } else {
      if(pPriv->videoStatus & CLIENT_VIDEO_ON) {
-    pPriv->videoStatus |= OFF_TIMER;
-    pPriv->offTime = currentTime.milliseconds + OFF_DELAY; 
-    /* FIXME */
-/*  SISDisplayVideo(pScrn, pPriv); */
+       pPriv->videoStatus = OFF_TIMER | CLIENT_VIDEO_ON;
+       pPriv->offTime = currentTime.milliseconds + OFF_DELAY;
+       pSiS->VideoTimerCallback = SISVideoTimerCallback;
      }
   }
 }
 
-
-static int 
-SISPutImage( 
-  ScrnInfoPtr pScrn, 
-  short src_x, short src_y, 
+static int
+SISPutImage(
+  ScrnInfoPtr pScrn,
+  short src_x, short src_y,
   short drw_x, short drw_y,
-  short src_w, short src_h, 
+  short src_w, short src_h,
   short drw_w, short drw_h,
-  int id, unsigned char* buf, 
-  short width, short height, 
+  int id, unsigned char* buf,
+  short width, short height,
   Bool sync,
   RegionPtr clipBoxes, pointer data
 ){
-   SISPtr pSIS = SISPTR(pScrn);
+   SISPtr pSiS = SISPTR(pScrn);
    SISPortPrivPtr pPriv = (SISPortPrivPtr)data;
 
    int totalSize=0;
-      
+   int depth = pSiS->CurrentLayout.bitsPerPixel >> 3;
+
+   if(pPriv->grabbedByV4L)
+   	return Success;
+
    pPriv->drw_x = drw_x;
    pPriv->drw_y = drw_y;
    pPriv->drw_w = drw_w;
@@ -1126,160 +1929,526 @@ SISPutImage(
    pPriv->id = id;
    pPriv->height = height;
 
+   /* TW: Pixel formats:
+      1. YU12:  3 planes:       H    V
+               Y sample period  1    1   (8 bit per pixel)
+	       V sample period  2    2	 (8 bit per pixel, subsampled)
+	       U sample period  2    2   (8 bit per pixel, subsampled)
+
+ 	 Y plane is fully sampled (width*height), U and V planes
+	 are sampled in 2x2 blocks, hence a group of 4 pixels requires
+	 4 + 1 + 1 = 6 bytes. The data is planar, ie in single planes
+	 for Y, U and V.
+      2. UYVY: 3 planes:        H    V
+               Y sample period  1    1   (8 bit per pixel)
+	       V sample period  2    1	 (8 bit per pixel, subsampled)
+	       U sample period  2    1   (8 bit per pixel, subsampled)
+	 Y plane is fully sampled (width*height), U and V planes
+	 are sampled in 2x1 blocks, hence a group of 4 pixels requires
+	 4 + 2 + 2 = 8 bytes. The data is bit packed, there are no separate
+	 Y, U or V planes.
+	 Bit order:  U0 Y0 V0 Y1  U2 Y2 V2 Y3 ...
+      3. I420: Like YU12, but planes U and V are in reverse order.
+      4. YUY2: Like UYVY, but order is
+                     Y0 U0 Y1 V0  Y2 U2 Y3 V2 ...
+   */
+
    switch(id){
      case PIXEL_FMT_YV12:
+     case PIXEL_FMT_I420:
        pPriv->srcPitch = (width + 7) & ~7;
-       totalSize = (pPriv->srcPitch * height * 3) >> 1;
+       /* Size = width * height * 3 / 2 */
+       totalSize = (pPriv->srcPitch * height * 3) >> 1; /* Verified */
        break;
      case PIXEL_FMT_YUY2:
+     case PIXEL_FMT_UYVY:
+     case PIXEL_FMT_RGB6:
+     case PIXEL_FMT_RGB5:
      default:
-       pPriv->srcPitch = (width*2 + 3) & ~3;
+       pPriv->srcPitch = ((width << 1) + 3) & ~3;	/* Verified */
+       /* Size = width * 2 * height */
        totalSize = pPriv->srcPitch * height;
    }
-   
-    /* allocate memory */
-    do {
-      int lines, pitch, depth;
-      BoxPtr pBox;
-      
-      if(totalSize == pPriv->fbSize)
-        break;
-      
-      pPriv->fbSize = totalSize;
 
-      /* TODO: use xf86AllocateOffscreenLinear is better */
-      if(pPriv->fbAreaPtr) {
-        /* TODO: resize */     
-        xf86FreeOffscreenArea(pPriv->fbAreaPtr);
-      }
-      depth = (pScrn->bitsPerPixel + 7 ) / 8;
-      pitch = pScrn->displayWidth * depth;
-      lines = ((totalSize * 2) / pitch) + 1;
-      pPriv->fbAreaPtr = xf86AllocateOffscreenArea(pScrn->pScreen, 
-                         pScrn->displayWidth,
-             lines, 0, NULL, NULL, NULL);
-
-      if(!pPriv->fbAreaPtr) {
-        xf86DrvMsg(pScrn->scrnIndex, X_ERROR, 
-                   "Allocate video memory fails\n");
-        return BadAlloc;
-      }
-      pBox = &(pPriv->fbAreaPtr->box);     
-      pPriv->bufAddr[0] = (pBox->x1 * depth) + (pBox->y1 * pitch); 
-      pPriv->bufAddr[1] = pPriv->bufAddr[0] + totalSize;
-    } while(0);
+   /* allocate memory (we do doublebuffering) */
+   if(!(pPriv->linear = SISAllocateOverlayMemory(pScrn, pPriv->linear,
+						 totalSize<<1)))
+	return BadAlloc;
+
+   /* fixup pointers */
+   pPriv->bufAddr[0] = (pPriv->linear->offset * depth);
+   pPriv->bufAddr[1] = pPriv->bufAddr[0] + totalSize;
 
    /* copy data */
    /* TODO: subimage */
-   memcpy(pSIS->FbBase + pPriv->bufAddr[pPriv->currentBuf], buf, totalSize);
-         
+   memcpy(pSiS->FbBase + pPriv->bufAddr[pPriv->currentBuf], buf, totalSize);
+
    SISDisplayVideo(pScrn, pPriv);
 
-    /* update cliplist */
-    if(!RegionsEqual(&pPriv->clip, clipBoxes)) {
-    REGION_COPY(pScreen, &pPriv->clip, clipBoxes);
-    /* draw these */
-    XAAFillSolidRects(pScrn, pPriv->colorKey, GXcopy, ~0, 
+   /* update cliplist */
+   if(pPriv->autopaintColorKey &&
+        (pPriv->grabbedByV4L || !RegionsEqual(&pPriv->clip, clipBoxes))) {
+     /* We always paint colorkey for V4L */
+     if (!pPriv->grabbedByV4L)
+     	REGION_COPY(pScreen, &pPriv->clip, clipBoxes);
+     /* draw these */
+     /* xf86XVFillKeyHelper(pScrn->pScreen, pPriv->colorKey, clipBoxes); - for X4.2 */
+     XAAFillSolidRects(pScrn, pPriv->colorKey, GXcopy, ~0,
                     REGION_NUM_RECTS(clipBoxes),
                     REGION_RECTS(clipBoxes));
-    }
+   }
 
-    if (pPriv->currentBuf == 0)
-    pPriv->currentBuf = 1;
-    else
-    pPriv->currentBuf = 0;
-    
-    pPriv->videoStatus = CLIENT_VIDEO_ON;
+   pPriv->currentBuf ^= 1;
 
-    return Success;
-}
+   pPriv->videoStatus = CLIENT_VIDEO_ON;
 
+   pSiS->VideoTimerCallback = SISVideoTimerCallback;
 
-static int 
+   return Success;
+}
+
+static int
 SISQueryImageAttributes(
-  ScrnInfoPtr pScrn, 
-  int id, 
-  unsigned short *w, unsigned short *h, 
+  ScrnInfoPtr pScrn,
+  int id,
+  unsigned short *w, unsigned short *h,
   int *pitches, int *offsets
 ){
-    int pitchY, pitchUV;
-    int size, sizeY, sizeUV;
+    int    pitchY, pitchUV;
+    int    size, sizeY, sizeUV;
+    SISPtr pSiS = SISPTR(pScrn);
 
     if(*w < IMAGE_MIN_WIDTH) *w = IMAGE_MIN_WIDTH;
     if(*h < IMAGE_MIN_HEIGHT) *h = IMAGE_MIN_HEIGHT;
 
-    if(*w > IMAGE_MAX_WIDTH) *w = IMAGE_MAX_WIDTH;
-    if(*h > IMAGE_MAX_HEIGHT) *h = IMAGE_MAX_HEIGHT;
+    if(pSiS->Flags650 & SiS650_LARGEOVERLAY) {
+       if(*w > IMAGE_MAX_WIDTH_M650) *w = IMAGE_MAX_WIDTH_M650;
+       if(*h > IMAGE_MAX_HEIGHT_M650) *h = IMAGE_MAX_HEIGHT_M650;
+    } else {
+       if(*w > IMAGE_MAX_WIDTH) *w = IMAGE_MAX_WIDTH;
+       if(*h > IMAGE_MAX_HEIGHT) *h = IMAGE_MAX_HEIGHT;
+    }
 
     switch(id) {
     case PIXEL_FMT_YV12:
+    case PIXEL_FMT_I420:
         *w = (*w + 7) & ~7;
         *h = (*h + 1) & ~1;
         pitchY = *w;
-    pitchUV = *w >> 1;
-    if(pitches) {
-      pitches[0] = pitchY;
-      pitches[1] = pitches[2] = pitchUV;
+    	pitchUV = *w >> 1;
+    	if(pitches) {
+      	    pitches[0] = pitchY;
+            pitches[1] = pitches[2] = pitchUV;
         }
-    sizeY = pitchY * (*h);
-    sizeUV = pitchUV * ((*h) >> 1);
-    if(offsets) {   
+    	sizeY = pitchY * (*h);
+    	sizeUV = pitchUV * ((*h) >> 1);
+    	if(offsets) {
           offsets[0] = 0;
           offsets[1] = sizeY;
           offsets[2] = sizeY + sizeUV;
         }
         size = sizeY + (sizeUV << 1);
-    break;
+    	break;
     case PIXEL_FMT_YUY2:
+    case PIXEL_FMT_UYVY:
+    case PIXEL_FMT_RGB6:
+    case PIXEL_FMT_RGB5:
     default:
         *w = (*w + 1) & ~1;
         pitchY = *w << 1;
-    if(pitches) pitches[0] = pitchY;
-    if(offsets) offsets[0] = 0;
-    size = pitchY * (*h);
-    break;
+    	if(pitches) pitches[0] = pitchY;
+    	if(offsets) offsets[0] = 0;
+    	size = pitchY * (*h);
+    	break;
     }
 
     return size;
 }
 
 static void
-SISBlockHandler (
-    int i,
-    pointer     blockData,
-    pointer     pTimeout,
-    pointer     pReadmask
-){
-    ScreenPtr   pScreen = screenInfo.screens[i];
-    ScrnInfoPtr pScrn = xf86Screens[i];
-    SISPtr      pSIS = SISPTR(pScrn);
+SISVideoTimerCallback (ScrnInfoPtr pScrn, Time now)
+{
+    SISPtr         pSiS = SISPTR(pScrn);
+    SISPortPrivPtr pPriv = NULL;
+    unsigned char  sridx, cridx;
+
+    pSiS->VideoTimerCallback = NULL;
+
+    if(!pScrn->vtSema) return;
+
+    if (pSiS->adaptor) {
+    	pPriv = GET_PORT_PRIVATE(pScrn);
+	if(!pPriv->videoStatus)
+	   pPriv = NULL;
+    }
+
+    if (pPriv) {
+      if(pPriv->videoStatus & TIMER_MASK) {
+        UpdateCurrentTime();
+	if(pPriv->offTime < currentTime.milliseconds) {
+          if(pPriv->videoStatus & OFF_TIMER) {
+              /* Turn off the overlay */
+	      sridx = inSISREG(SISSR); cridx = inSISREG(SISCR);
+              close_overlay(pSiS, pPriv);
+	      outSISREG(SISSR, sridx); outSISREG(SISCR, cridx);
+	      pPriv->mustwait = 1;
+              pPriv->videoStatus = FREE_TIMER;
+              pPriv->freeTime = currentTime.milliseconds + FREE_DELAY;
+	      pSiS->VideoTimerCallback = SISVideoTimerCallback;
+          } else
+	  if(pPriv->videoStatus & FREE_TIMER) {  
+              SISFreeOverlayMemory(pScrn);
+	      pPriv->mustwait = 1;
+              pPriv->videoStatus = 0;
+          }
+        } else
+	  pSiS->VideoTimerCallback = SISVideoTimerCallback;
+      }
+   }
+}
+
+/* TW: Offscreen surface stuff */
+
+static int
+SISAllocSurface (
+    ScrnInfoPtr pScrn,
+    int id,
+    unsigned short w,
+    unsigned short h,
+    XF86SurfacePtr surface
+)
+{
+    SISPtr pSiS = SISPTR(pScrn);
     SISPortPrivPtr pPriv = GET_PORT_PRIVATE(pScrn);
+    int size, depth;
 
-    pScreen->BlockHandler = pSIS->BlockHandler;
-    
-    (*pScreen->BlockHandler) (i, blockData, pTimeout, pReadmask);
+#ifdef TWDEBUG
+    xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Xv: SISAllocSurface called\n");
+#endif
+
+    if((w < IMAGE_MIN_WIDTH) || (h < IMAGE_MIN_HEIGHT))
+          return BadValue;
+    if(pSiS->Flags650 & SiS650_LARGEOVERLAY) {
+       if((w > IMAGE_MAX_WIDTH_M650) || (h > IMAGE_MAX_HEIGHT_M650))
+    	  return BadValue;   
+    } else {
+       if((w > IMAGE_MAX_WIDTH) || (h > IMAGE_MAX_HEIGHT))
+    	  return BadValue;
+    }
+
+    if(pPriv->grabbedByV4L)
+    	return BadAlloc;
 
-    pScreen->BlockHandler = SISBlockHandler;
+    depth = pSiS->CurrentLayout.bitsPerPixel >> 3;
+    w = (w + 1) & ~1;
+    pPriv->pitch = ((w << 1) + 63) & ~63; /* Only packed pixel modes supported */
+    size = h * pPriv->pitch; /*  / depth;   - Why? */
+    pPriv->linear = SISAllocateOverlayMemory(pScrn, pPriv->linear, size);
+    if(!pPriv->linear)
+    	return BadAlloc;
 
-    if(pPriv->videoStatus & TIMER_MASK) {
-    UpdateCurrentTime();
-    if(pPriv->videoStatus & OFF_TIMER) {
-        if(pPriv->offTime < currentTime.milliseconds) {
-        /* Turn off the overlay */
-        close_overlay(pSIS, pPriv);
+    pPriv->offset    = pPriv->linear->offset * depth;
+
+    surface->width   = w;
+    surface->height  = h;
+    surface->pScrn   = pScrn;
+    surface->id      = id;
+    surface->pitches = &pPriv->pitch;
+    surface->offsets = &pPriv->offset;
+    surface->devPrivate.ptr = (pointer)pPriv;
+
+    close_overlay(pSiS, pPriv);
+    pPriv->videoStatus = 0;
+    REGION_EMPTY(pScrn->pScreen, &pPriv->clip);
+    pSiS->VideoTimerCallback = NULL;
+    pPriv->grabbedByV4L = TRUE;
+    return Success;
+}
+
+static int
+SISStopSurface (XF86SurfacePtr surface)
+{
+    SISPortPrivPtr pPriv = (SISPortPrivPtr)(surface->devPrivate.ptr);
+    SISPtr pSiS = SISPTR(surface->pScrn);
+
+    if(pPriv->grabbedByV4L && pPriv->videoStatus) {
+        close_overlay(pSiS, pPriv);
+	pPriv->mustwait = 1;
+	pPriv->videoStatus = 0;
+    }
+    return Success;
+}
+
+static int
+SISFreeSurface (XF86SurfacePtr surface)
+{
+    SISPortPrivPtr pPriv = (SISPortPrivPtr)(surface->devPrivate.ptr);
+
+    if(pPriv->grabbedByV4L) {
+	SISStopSurface(surface);
+	SISFreeOverlayMemory(surface->pScrn);
+	pPriv->grabbedByV4L = FALSE;
+    }
+    return Success;
+}
+
+static int
+SISGetSurfaceAttribute (
+    ScrnInfoPtr pScrn,
+    Atom attribute,
+    INT32 *value
+)
+{
+    SISPortPrivPtr pPriv = GET_PORT_PRIVATE(pScrn);
+
+    return SISGetPortAttribute(pScrn, attribute, value, (pointer)pPriv);
+}
+
+static int
+SISSetSurfaceAttribute(
+    ScrnInfoPtr pScrn,
+    Atom attribute,
+    INT32 value
+)
+{
+    SISPortPrivPtr pPriv = GET_PORT_PRIVATE(pScrn);;
+
+    return SISSetPortAttribute(pScrn, attribute, value, (pointer)pPriv);
+}
+
+static int
+SISDisplaySurface (
+    XF86SurfacePtr surface,
+    short src_x, short src_y,
+    short drw_x, short drw_y,
+    short src_w, short src_h,
+    short drw_w, short drw_h,
+    RegionPtr clipBoxes
+)
+{
+   ScrnInfoPtr pScrn = surface->pScrn;
+   SISPortPrivPtr pPriv = (SISPortPrivPtr)(surface->devPrivate.ptr);
+
+#ifdef TWDEBUG
+   xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Xv: DisplaySurface called\n");
+#endif
+
+   if(!pPriv->grabbedByV4L)
+    	return Success;
+
+   pPriv->drw_x = drw_x;
+   pPriv->drw_y = drw_y;
+   pPriv->drw_w = drw_w;
+   pPriv->drw_h = drw_h;
+   pPriv->src_x = src_x;
+   pPriv->src_y = src_y;
+   pPriv->src_w = src_w;
+   pPriv->src_h = src_h;
+   pPriv->id = surface->id;
+   pPriv->height = surface->height;
+   pPriv->bufAddr[0] = surface->offsets[0];
+   pPriv->currentBuf = 0;
+   pPriv->srcPitch = surface->pitches[0];
+
+   SISDisplayVideo(pScrn, pPriv);
+
+   if(pPriv->autopaintColorKey) {
+   	XAAFillSolidRects(pScrn, pPriv->colorKey, GXcopy, ~0,
+                    REGION_NUM_RECTS(clipBoxes),
+                    REGION_RECTS(clipBoxes));
+   }
+
+   pPriv->videoStatus = CLIENT_VIDEO_ON;
+
+   return Success;
+}
+
+#define NUMOFFSCRIMAGES 4
+
+static XF86OffscreenImageRec SISOffscreenImages_300[NUMOFFSCRIMAGES] =
+{
+ {
+   &SISImages[0],  	/* YUV2 */
+   VIDEO_OVERLAID_IMAGES | VIDEO_CLIP_TO_VIEWPORT,
+   SISAllocSurface,
+   SISFreeSurface,
+   SISDisplaySurface,
+   SISStopSurface,
+   SISGetSurfaceAttribute,
+   SISSetSurfaceAttribute,
+   IMAGE_MAX_WIDTH, IMAGE_MAX_HEIGHT,
+   NUM_ATTRIBUTES_300,
+   &SISAttributes_300[0]  /* Support all attributes */
+ },
+ {
+   &SISImages[2],	/* UYVY */
+   VIDEO_OVERLAID_IMAGES | VIDEO_CLIP_TO_VIEWPORT,
+   SISAllocSurface,
+   SISFreeSurface,
+   SISDisplaySurface,
+   SISStopSurface,
+   SISGetSurfaceAttribute,
+   SISSetSurfaceAttribute,
+   IMAGE_MAX_WIDTH, IMAGE_MAX_HEIGHT,
+   NUM_ATTRIBUTES_300,
+   &SISAttributes_300[0]  /* Support all attributes */
+ }
+ ,
+ {
+   &SISImages[4],	/* RV15 */
+   VIDEO_OVERLAID_IMAGES | VIDEO_CLIP_TO_VIEWPORT,
+   SISAllocSurface,
+   SISFreeSurface,
+   SISDisplaySurface,
+   SISStopSurface,
+   SISGetSurfaceAttribute,
+   SISSetSurfaceAttribute,
+   IMAGE_MAX_WIDTH, IMAGE_MAX_HEIGHT,
+   NUM_ATTRIBUTES_300,
+   &SISAttributes_300[0]  /* Support all attributes */
+ },
+ {
+   &SISImages[5],	/* RV16 */
+   VIDEO_OVERLAID_IMAGES | VIDEO_CLIP_TO_VIEWPORT,
+   SISAllocSurface,
+   SISFreeSurface,
+   SISDisplaySurface,
+   SISStopSurface,
+   SISGetSurfaceAttribute,
+   SISSetSurfaceAttribute,
+   IMAGE_MAX_WIDTH, IMAGE_MAX_HEIGHT,
+   NUM_ATTRIBUTES_300,
+   &SISAttributes_300[0]  /* Support all attributes */
+ }
+};
+
+static XF86OffscreenImageRec SISOffscreenImages_325[NUMOFFSCRIMAGES] =
+{
+ {
+   &SISImages[0],  	/* YUV2 */
+   VIDEO_OVERLAID_IMAGES | VIDEO_CLIP_TO_VIEWPORT,
+   SISAllocSurface,
+   SISFreeSurface,
+   SISDisplaySurface,
+   SISStopSurface,
+   SISGetSurfaceAttribute,
+   SISSetSurfaceAttribute,
+   IMAGE_MAX_WIDTH, IMAGE_MAX_HEIGHT,
+   NUM_ATTRIBUTES_325,
+   &SISAttributes_325[0]  /* Support all attributes */
+ },
+ {
+   &SISImages[2],	/* UYVY */
+   VIDEO_OVERLAID_IMAGES | VIDEO_CLIP_TO_VIEWPORT,
+   SISAllocSurface,
+   SISFreeSurface,
+   SISDisplaySurface,
+   SISStopSurface,
+   SISGetSurfaceAttribute,
+   SISSetSurfaceAttribute,
+   IMAGE_MAX_WIDTH, IMAGE_MAX_HEIGHT,
+   NUM_ATTRIBUTES_325,
+   &SISAttributes_325[0]  /* Support all attributes */
+ }
+ ,
+ {
+   &SISImages[4],	/* RV15 */
+   VIDEO_OVERLAID_IMAGES | VIDEO_CLIP_TO_VIEWPORT,
+   SISAllocSurface,
+   SISFreeSurface,
+   SISDisplaySurface,
+   SISStopSurface,
+   SISGetSurfaceAttribute,
+   SISSetSurfaceAttribute,
+   IMAGE_MAX_WIDTH, IMAGE_MAX_HEIGHT,
+   NUM_ATTRIBUTES_325,
+   &SISAttributes_325[0]  /* Support all attributes */
+ },
+ {
+   &SISImages[5],	/* RV16 */
+   VIDEO_OVERLAID_IMAGES | VIDEO_CLIP_TO_VIEWPORT,
+   SISAllocSurface,
+   SISFreeSurface,
+   SISDisplaySurface,
+   SISStopSurface,
+   SISGetSurfaceAttribute,
+   SISSetSurfaceAttribute,
+   IMAGE_MAX_WIDTH, IMAGE_MAX_HEIGHT,
+   NUM_ATTRIBUTES_325,
+   &SISAttributes_325[0]  /* Support all attributes */
+ }
+};
+
+static XF86OffscreenImageRec SISOffscreenImages_M650[NUMOFFSCRIMAGES] =
+{
+ {
+   &SISImages[0],  	/* YUV2 */
+   VIDEO_OVERLAID_IMAGES | VIDEO_CLIP_TO_VIEWPORT,
+   SISAllocSurface,
+   SISFreeSurface,
+   SISDisplaySurface,
+   SISStopSurface,
+   SISGetSurfaceAttribute,
+   SISSetSurfaceAttribute,
+   IMAGE_MAX_WIDTH_M650, IMAGE_MAX_HEIGHT_M650,
+   NUM_ATTRIBUTES_325,
+   &SISAttributes_325[0]  /* Support all attributes */
+ },
+ {
+   &SISImages[2],	/* UYVY */
+   VIDEO_OVERLAID_IMAGES | VIDEO_CLIP_TO_VIEWPORT,
+   SISAllocSurface,
+   SISFreeSurface,
+   SISDisplaySurface,
+   SISStopSurface,
+   SISGetSurfaceAttribute,
+   SISSetSurfaceAttribute,
+   IMAGE_MAX_WIDTH_M650, IMAGE_MAX_HEIGHT_M650,
+   NUM_ATTRIBUTES_325,
+   &SISAttributes_325[0]  /* Support all attributes */
+ }
+ ,
+ {
+   &SISImages[4],	/* RV15 */
+   VIDEO_OVERLAID_IMAGES | VIDEO_CLIP_TO_VIEWPORT,
+   SISAllocSurface,
+   SISFreeSurface,
+   SISDisplaySurface,
+   SISStopSurface,
+   SISGetSurfaceAttribute,
+   SISSetSurfaceAttribute,
+   IMAGE_MAX_WIDTH_M650, IMAGE_MAX_HEIGHT_M650,
+   NUM_ATTRIBUTES_325,
+   &SISAttributes_325[0]  /* Support all attributes */
+ },
+ {
+   &SISImages[5],	/* RV16 */
+   VIDEO_OVERLAID_IMAGES | VIDEO_CLIP_TO_VIEWPORT,
+   SISAllocSurface,
+   SISFreeSurface,
+   SISDisplaySurface,
+   SISStopSurface,
+   SISGetSurfaceAttribute,
+   SISSetSurfaceAttribute,
+   IMAGE_MAX_WIDTH_M650, IMAGE_MAX_HEIGHT_M650,
+   NUM_ATTRIBUTES_325,
+   &SISAttributes_325[0]  /* Support all attributes */
+ }
+};
+
+static void
+SISInitOffscreenImages(ScreenPtr pScreen)
+{
+    ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
+    SISPtr pSiS = SISPTR(pScrn);
     
-        pPriv->videoStatus = FREE_TIMER;
-        pPriv->freeTime = currentTime.milliseconds + FREE_DELAY;
-        }
-    } else {  /* FREE_TIMER */
-        if(pPriv->freeTime < currentTime.milliseconds) {
-              if(pPriv->fbAreaPtr) {
-                xf86FreeOffscreenArea(pPriv->fbAreaPtr);
-                pPriv->fbAreaPtr = NULL;
-                pPriv->fbSize = 0;
-              }
-          pPriv->videoStatus = 0;
-        }
-        }
+    if(pSiS->VGAEngine == SIS_300_VGA) {
+       xf86XVRegisterOffscreenImages(pScreen, SISOffscreenImages_300, NUMOFFSCRIMAGES);
+    } else {
+       if(pSiS->Flags650 & SiS650_LARGEOVERLAY) {
+          xf86XVRegisterOffscreenImages(pScreen, SISOffscreenImages_M650, NUMOFFSCRIMAGES);
+       } else {
+          xf86XVRegisterOffscreenImages(pScreen, SISOffscreenImages_325, NUMOFFSCRIMAGES);
+       }
     }
 }
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/sis/vgatypes.h b/xc/programs/Xserver/hw/xfree86/drivers/sis/vgatypes.h
new file mode 100644
index 000000000..d377deeda
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/sis/vgatypes.h
@@ -0,0 +1,368 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/vgatypes.h,v 1.3 2003/02/10 01:14:16 tsi Exp $ */
+
+#ifndef _VGATYPES_
+#define _VGATYPES_
+
+#ifdef LINUX_XF86
+#include "xf86Pci.h"
+#endif
+
+#ifdef LINUX_KERNEL  /* TW: We don't want the X driver to depend on kernel source */
+#include <linux/ioctl.h>
+#endif
+
+#ifndef TC
+#define far
+#endif
+
+#ifndef FALSE
+#define FALSE   0
+#endif
+
+#ifndef TRUE
+#define TRUE    1
+#endif
+
+#ifndef NULL
+#define NULL    0
+#endif
+
+#ifndef CHAR
+typedef char CHAR;
+#endif
+
+#ifndef SHORT
+typedef short SHORT;
+#endif
+
+#ifndef LONG
+typedef long  LONG;
+#endif
+
+#ifndef UCHAR
+typedef unsigned char UCHAR;
+#endif
+
+#ifndef USHORT
+typedef unsigned short USHORT;
+#endif
+
+#ifndef ULONG
+typedef unsigned long ULONG;
+#endif
+
+#ifndef PUCHAR
+typedef UCHAR far *PUCHAR;
+#endif
+
+#ifndef PUSHORT
+typedef USHORT far *PUSHORT;
+#endif
+
+#ifndef PULONG
+typedef ULONG far *PULONG;
+#endif
+
+#ifndef PVOID
+typedef void far *PVOID;
+#endif
+#ifndef VOID
+typedef void VOID;
+#endif
+
+#ifndef BOOLEAN
+typedef UCHAR BOOLEAN;
+#endif
+
+#ifndef WINCE_HEADER
+#ifndef bool
+typedef UCHAR bool;
+#endif
+#endif /*WINCE_HEADER*/
+
+#ifndef VBIOS_VER_MAX_LENGTH
+#define VBIOS_VER_MAX_LENGTH         4
+#endif
+
+#ifndef LINUX_KERNEL   /* For kernel, this is defined in sisfb.h */
+#ifndef WIN2000
+#ifndef SIS_CHIP_TYPE
+typedef enum _SIS_CHIP_TYPE {
+    SIS_VGALegacy = 0,
+#ifdef LINUX_XF86
+    SIS_530,	/* TW */
+    SIS_OLD,	/* TW */
+#endif
+    SIS_300,
+    SIS_630,
+    SIS_730,
+    SIS_540,
+    SIS_315H,   /* SiS 310 */
+    SIS_315,
+    SIS_315PRO, /* SiS 325 */
+    SIS_550,
+    SIS_650,
+    SIS_740,
+    SIS_330, 
+    MAX_SIS_CHIP
+} SIS_CHIP_TYPE;
+#endif
+#endif
+#endif
+
+#ifndef WIN2000
+#ifndef SIS_VB_CHIP_TYPE
+typedef enum _SIS_VB_CHIP_TYPE {
+    VB_CHIP_Legacy = 0,
+    VB_CHIP_301,
+    VB_CHIP_301B,      
+    VB_CHIP_301LV,
+    VB_CHIP_301LVX,
+    VB_CHIP_302,
+    VB_CHIP_302B,
+    VB_CHIP_302LV,
+    VB_CHIP_302LVX,
+    VB_CHIP_303,
+    VB_CHIP_UNKNOWN, /* other video bridge or no video bridge */
+    MAX_VB_CHIP
+} SIS_VB_CHIP_TYPE;
+#endif
+#endif
+
+#ifndef WIN2000
+#ifndef SIS_LCD_TYPE
+typedef enum _SIS_LCD_TYPE {
+    LCD_INVALID = 0,
+    LCD_800x600,
+    LCD_1024x768,
+    LCD_1280x1024,
+    LCD_1280x960,
+    LCD_640x480,
+    LCD_1600x1200,
+    LCD_1920x1440,
+    LCD_2048x1536,
+    LCD_320x480,       /* TW: FSTN */
+    LCD_1400x1050,
+    LCD_1152x864,
+    LCD_1152x768,
+    LCD_1280x768,
+    LCD_1024x600,
+    LCD_UNKNOWN
+} SIS_LCD_TYPE;
+#endif
+#endif
+
+#ifndef WIN2000 /* mark by Paul, Move definition to sisv.h*/
+#ifndef PSIS_DSReg
+typedef struct _SIS_DSReg
+{
+  UCHAR  jIdx;
+  UCHAR  jVal;
+} SIS_DSReg, *PSIS_DSReg;
+#endif
+
+#ifndef SIS_HW_DEVICE_INFO
+
+typedef struct _SIS_HW_DEVICE_INFO  SIS_HW_DEVICE_INFO, *PSIS_HW_DEVICE_INFO;
+
+typedef BOOLEAN (*PSIS_QUERYSPACE)   (PSIS_HW_DEVICE_INFO, ULONG, ULONG, ULONG *);
+
+
+struct _SIS_HW_DEVICE_INFO
+{
+    PVOID  pDevice;              /* The pointer to the physical device data structure
+                                    in each OS or NULL for unused. */
+    UCHAR  *pjVirtualRomBase;    /* base virtual address of VBIOS ROM Space */
+                                 /* or base virtual address of ROM image file. */
+                                 /* if NULL, then read from pjROMImage; */
+                                 /* Note:ROM image file is the file of VBIOS ROM */
+
+    BOOLEAN UseROM;		 /* TW: Use the ROM image if provided */
+ 
+    UCHAR  *pjCustomizedROMImage;/* base virtual address of ROM image file. */
+                                 /* wincE:ROM image file is the file for OEM */
+                                 /*       customized table */
+                                 /* Linux: not used */
+                                 /* NT   : not used  */
+                                 /* Note : pjCustomizedROMImage=NULL if no ROM image file */
+
+    UCHAR  *pjVideoMemoryAddress;/* base virtual memory address */
+                                 /* of Linear VGA memory */
+
+    ULONG  ulVideoMemorySize;    /* size, in bytes, of the memory on the board */
+    ULONG  ulIOAddress;          /* base I/O address of VGA ports (0x3B0) */
+    UCHAR  jChipType;            /* Used to Identify SiS Graphics Chip */
+                                 /* defined in the data structure type  */
+                                 /* "SIS_CHIP_TYPE" */
+
+    UCHAR  jChipRevision;        /* Used to Identify SiS Graphics Chip Revision */
+    UCHAR  ujVBChipID;           /* the ID of video bridge */
+                                 /* defined in the data structure type */
+                                 /* "SIS_VB_CHIP_TYPE" */
+
+    USHORT usExternalChip;       /* NO VB or other video bridge(not  */
+                                 /* SiS video bridge) */
+                                 /* if ujVBChipID = VB_CHIP_UNKNOWN, */
+                                 /* then bit0=1 : LVDS,bit1=1 : trumpion, */
+                                 /* bit2=1 : CH7005 & no video bridge if */
+                                 /* usExternalChip = 0. */
+                                 /* Note: CR37[3:1]: */
+                                 /*             001:SiS 301 */
+                                 /*             010:LVDS */
+                                 /*             011:Trumpion LVDS Scaling Chip */
+                                 /*             100:LVDS(LCD-out)+Chrontel 7005 */
+                                 /*             101:Single Chrontel 7005 */
+				 /* TW: This has changed on 310/325 series! */
+
+    ULONG  ulCRT2LCDType;        /* defined in the data structure type */
+                                 /* "SIS_LCD_TYPE" */
+                                     
+    BOOLEAN bIntegratedMMEnabled;/* supporting integration MM enable */
+                                      
+    BOOLEAN bSkipDramSizing;     /* True: Skip video memory sizing. */
+    PSIS_DSReg  pSR;             /* restore SR registers in initial function. */
+                                 /* end data :(idx, val) =  (FF, FF). */
+                                 /* Note : restore SR registers if  */
+                                 /* bSkipDramSizing = TRUE */
+
+    PSIS_DSReg  pCR;             /* restore CR registers in initial function. */
+                                 /* end data :(idx, val) =  (FF, FF) */
+                                 /* Note : restore cR registers if  */
+                                 /* bSkipDramSizing = TRUE */
+
+    PSIS_QUERYSPACE  pQueryVGAConfigSpace; /* Get/Set VGA Configuration  */
+                                           /* space */
+ 
+    PSIS_QUERYSPACE  pQueryNorthBridgeSpace;/* Get/Set North Bridge  */
+                                            /* space  */
+
+    UCHAR  szVBIOSVer[VBIOS_VER_MAX_LENGTH];
+
+    UCHAR  pdc;			/* TW: PanelDelayCompensation */
+
+#ifdef LINUX_XF86
+    PCITAG PciTag;		/* PCI Tag for Linux XF86 */
+#endif
+};
+#endif
+#endif 
+
+
+/* TW: Addtional IOCTL for communication sisfb <> X driver        */
+/*     If changing this, sisfb.h must also be changed (for sisfb) */
+
+#ifdef LINUX_XF86  /* We don't want the X driver to depend on the kernel source */
+
+/* TW: ioctl for identifying and giving some info (esp. memory heap start) */
+#define SISFB_GET_INFO    0x80046ef8  /* Wow, what a terrible hack... */
+
+/* TW: Structure argument for SISFB_GET_INFO ioctl  */
+typedef struct _SISFB_INFO sisfb_info, *psisfb_info;
+
+struct _SISFB_INFO {
+	unsigned long sisfb_id;         /* for identifying sisfb */
+#ifndef SISFB_ID
+#define SISFB_ID	  0x53495346    /* Identify myself with 'SISF' */
+#endif
+ 	int    chip_id;			/* PCI ID of detected chip */
+	int    memory;			/* video memory in KB which sisfb manages */
+	int    heapstart;               /* heap start (= sisfb "mem" argument) in KB */
+	unsigned char fbvidmode;	/* current sisfb mode */
+
+	unsigned char sisfb_version;
+	unsigned char sisfb_revision;
+	unsigned char sisfb_patchlevel;
+
+	unsigned char sisfb_caps;	/* sisfb's capabilities */
+
+	int    sisfb_tqlen;		/* turbo queue length (in KB) */
+
+	unsigned int sisfb_pcibus;      /* The card's PCI ID */
+	unsigned int sisfb_pcislot;
+	unsigned int sisfb_pcifunc;
+
+	unsigned char sisfb_lcdpdc;
+
+	char reserved[236]; 		/* for future use */
+};
+#endif
+
+#ifndef WIN2000
+#ifndef WINCE_HEADER
+#ifndef BUS_DATA_TYPE
+typedef enum _BUS_DATA_TYPE {
+    ConfigurationSpaceUndefined = -1,
+    Cmos,
+    EisaConfiguration,
+    Pos,
+    CbusConfiguration,
+    PCIConfiguration,
+    VMEConfiguration,
+    NuBusConfiguration,
+    PCMCIAConfiguration,
+    MPIConfiguration,
+    MPSAConfiguration,
+    PNPISAConfiguration,
+    MaximumBusDataType
+} BUS_DATA_TYPE, *PBUS_DATA_TYPE;
+#endif
+#endif /* WINCE_HEADER */
+
+#ifndef PCI_TYPE0_ADDRESSES
+#define PCI_TYPE0_ADDRESSES             6
+#endif
+
+#ifndef PCI_TYPE1_ADDRESSES
+#define PCI_TYPE1_ADDRESSES             2
+#endif
+
+#ifndef WINCE_HEADER
+#ifndef PCI_COMMON_CONFIG
+typedef struct _PCI_COMMON_CONFIG {
+    USHORT  VendorID;                   /* (ro)                 */
+    USHORT  DeviceID;                   /* (ro)                 */
+    USHORT  Command;                    /* Device control       */
+    USHORT  Status;
+    UCHAR   RevisionID;                 /* (ro)                 */
+    UCHAR   ProgIf;                     /* (ro)                 */
+    UCHAR   SubClass;                   /* (ro)                 */
+    UCHAR   BaseClass;                  /* (ro)                 */
+    UCHAR   CacheLineSize;              /* (ro+)                */
+    UCHAR   LatencyTimer;               /* (ro+)                */
+    UCHAR   HeaderType;                 /* (ro)                 */
+    UCHAR   BIST;                       /* Built in self test   */
+
+    union {
+        struct _PCI_HEADER_TYPE_0 {
+            ULONG   BaseAddresses[PCI_TYPE0_ADDRESSES];
+            ULONG   CIS;
+            USHORT  SubVendorID;
+            USHORT  SubSystemID;
+            ULONG   ROMBaseAddress;
+            ULONG   Reserved2[2];
+
+            UCHAR   InterruptLine;      /*                    */
+            UCHAR   InterruptPin;       /* (ro)               */
+            UCHAR   MinimumGrant;       /* (ro)               */
+            UCHAR   MaximumLatency;     /* (ro)               */
+        } type0;
+
+
+    } u;
+
+    UCHAR   DeviceSpecific[192];
+
+} PCI_COMMON_CONFIG, *PPCI_COMMON_CONFIG;
+#endif
+#endif /* WINCE_HEADER */
+
+#ifndef FIELD_OFFSET
+#define FIELD_OFFSET(type, field)    ((LONG)&(((type *)0)->field))
+#endif
+
+#ifndef PCI_COMMON_HDR_LENGTH
+#define PCI_COMMON_HDR_LENGTH (FIELD_OFFSET (PCI_COMMON_CONFIG, DeviceSpecific))
+#endif
+#endif
+
+#endif
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/sis/vstruct.h b/xc/programs/Xserver/hw/xfree86/drivers/sis/vstruct.h
new file mode 100644
index 000000000..700598676
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/sis/vstruct.h
@@ -0,0 +1,571 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/vstruct.h,v 1.3 2003/02/10 01:14:17 tsi Exp $ */
+
+#ifdef _INIT_
+#define EXTERN
+#else
+#define EXTERN extern
+#endif /* _INIT_ */
+
+#ifndef _VSTRUCT_
+#define _VSTRUCT_
+
+typedef struct _SiS_PanelDelayTblStruct
+{
+ 	UCHAR timer[2];
+} SiS_PanelDelayTblStruct;
+
+typedef struct _SiS_LCDDataStruct
+{
+	USHORT RVBHCMAX;
+	USHORT RVBHCFACT;
+	USHORT VGAHT;
+	USHORT VGAVT;
+	USHORT LCDHT;
+	USHORT LCDVT;
+} SiS_LCDDataStruct;
+
+typedef struct _SiS_TVDataStruct
+{
+	USHORT RVBHCMAX;
+	USHORT RVBHCFACT;
+	USHORT VGAHT;
+	USHORT VGAVT;
+	USHORT TVHDE;
+	USHORT TVVDE;
+	USHORT RVBHRS;
+	UCHAR  FlickerMode;
+	USHORT HALFRVBHRS;
+	UCHAR  RY1COE;
+	UCHAR  RY2COE;
+	UCHAR  RY3COE;
+	UCHAR  RY4COE;
+} SiS_TVDataStruct;
+
+typedef struct _SiS_LVDSDataStruct
+{
+	USHORT VGAHT;
+	USHORT VGAVT;
+	USHORT LCDHT;
+	USHORT LCDVT;
+} SiS_LVDSDataStruct;
+
+typedef struct _SiS_LVDSDesStruct
+{
+	USHORT LCDHDES;
+	USHORT LCDVDES;
+} SiS_LVDSDesStruct;
+
+typedef struct _SiS_LVDSCRT1DataStruct
+{
+	UCHAR  CR[15];
+} SiS_LVDSCRT1DataStruct;
+
+/*add for LCDA*/
+typedef struct _SiS_LCDACRT1DataStruct
+{
+	UCHAR  CR[17];
+} SiS_LCDACRT1DataStruct;
+
+typedef struct _SiS_CHTVRegDataStruct
+{
+	UCHAR  Reg[16];
+} SiS_CHTVRegDataStruct;
+
+typedef struct _SiS_StStruct
+{
+	UCHAR  St_ModeID;
+	USHORT St_ModeFlag;
+	UCHAR  St_StTableIndex;
+	UCHAR  St_CRT2CRTC;
+	UCHAR  St_ResInfo;
+	UCHAR  VB_StTVFlickerIndex;
+	UCHAR  VB_StTVEdgeIndex;
+	UCHAR  VB_StTVYFilterIndex;
+} SiS_StStruct;
+
+typedef struct _SiS_VBModeStruct
+{
+	UCHAR  ModeID;
+	UCHAR  VB_TVDelayIndex;
+	UCHAR  VB_TVFlickerIndex;
+	UCHAR  VB_TVPhaseIndex;
+	UCHAR  VB_TVYFilterIndex;
+	UCHAR  VB_LCDDelayIndex;
+	UCHAR  _VB_LCDHIndex;
+	UCHAR  _VB_LCDVIndex;
+} SiS_VBModeStruct;
+
+typedef struct _SiS_StandTableStruct
+{
+	UCHAR  CRT_COLS;
+	UCHAR  ROWS;
+	UCHAR  CHAR_HEIGHT;
+	USHORT CRT_LEN;
+	UCHAR  SR[4];
+	UCHAR  MISC;
+	UCHAR  CRTC[0x19];
+	UCHAR  ATTR[0x14];
+	UCHAR  GRC[9];
+} SiS_StandTableStruct;
+
+typedef struct _SiS_ExtStruct
+{
+	UCHAR  Ext_ModeID;
+	USHORT Ext_ModeFlag;
+	USHORT Ext_ModeInfo;
+	USHORT Ext_Point;
+	USHORT Ext_VESAID;
+	UCHAR  Ext_VESAMEMSize;
+	UCHAR  Ext_RESINFO;
+	UCHAR  VB_ExtTVFlickerIndex;
+	UCHAR  VB_ExtTVEdgeIndex;
+	UCHAR  VB_ExtTVYFilterIndex;
+	UCHAR  REFindex;
+} SiS_ExtStruct;
+
+typedef struct _SiS_Ext2Struct
+{
+	USHORT Ext_InfoFlag;
+	UCHAR  Ext_CRT1CRTC;
+	UCHAR  Ext_CRTVCLK;
+	UCHAR  Ext_CRT2CRTC;
+	UCHAR  ModeID;
+	USHORT XRes;
+	USHORT YRes;
+	USHORT ROM_OFFSET;
+} SiS_Ext2Struct;
+
+typedef struct _SiS_Part2PortTblStruct
+{
+ 	UCHAR  CR[12];
+} SiS_Part2PortTblStruct;
+
+typedef struct _SiS_CRT1TableStruct
+{
+	UCHAR  CR[17];
+} SiS_CRT1TableStruct;
+
+typedef struct _SiS_MCLKDataStruct
+{
+	UCHAR  SR28,SR29,SR2A;
+	USHORT CLOCK;
+} SiS_MCLKDataStruct;
+
+typedef struct _SiS_ECLKDataStruct
+{
+	UCHAR  SR2E,SR2F,SR30;
+	USHORT CLOCK;
+} SiS_ECLKDataStruct;
+
+typedef struct _SiS_VCLKDataStruct
+{
+	UCHAR  SR2B,SR2C;
+	USHORT CLOCK;
+} SiS_VCLKDataStruct;
+
+typedef struct _SiS_VBVCLKDataStruct
+{
+	UCHAR  Part4_A,Part4_B;
+	USHORT CLOCK;
+} SiS_VBVCLKDataStruct;
+
+typedef struct _SiS_StResInfoStruct
+{
+	USHORT HTotal;
+	USHORT VTotal;
+} SiS_StResInfoStruct;
+
+typedef struct _SiS_ModeResInfoStruct
+{
+	USHORT HTotal;
+	USHORT VTotal;
+	UCHAR  XChar;
+	UCHAR  YChar;
+} SiS_ModeResInfoStruct;
+
+typedef UCHAR DRAM4Type[4];
+
+typedef struct _SiS_Private
+{
+#ifdef LINUX_KERNEL
+        USHORT RelIO;
+#endif
+	USHORT SiS_P3c4;
+	USHORT SiS_P3d4;
+	USHORT SiS_P3c0;
+	USHORT SiS_P3ce;
+	USHORT SiS_P3c2;
+	USHORT SiS_P3ca;
+	USHORT SiS_P3c6;
+	USHORT SiS_P3c7;
+	USHORT SiS_P3c8;
+	USHORT SiS_P3c9;
+	USHORT SiS_P3da;
+	USHORT SiS_Part1Port;
+	USHORT SiS_Part2Port;
+	USHORT SiS_Part3Port;
+	USHORT SiS_Part4Port;
+	USHORT SiS_Part5Port;
+	USHORT SiS_IF_DEF_LVDS;
+	USHORT SiS_IF_DEF_TRUMPION;
+	USHORT SiS_IF_DEF_DSTN;
+	USHORT SiS_IF_DEF_FSTN;
+	USHORT SiS_IF_DEF_CH70xx;
+	USHORT SiS_IF_DEF_HiVision;
+	UCHAR  SiS_VGAINFO;
+	BOOLEAN SiS_UseROM;
+	int    SiS_CHOverScan;
+	BOOLEAN SiS_CHSOverScan;
+	BOOLEAN SiS_ChSW;
+	int    SiS_UseOEM;
+	USHORT SiS_Backup70xx;
+	USHORT SiS_CRT1Mode;
+	USHORT SiS_flag_clearbuffer;
+	int    SiS_RAMType;
+	UCHAR  SiS_ChannelAB;
+	UCHAR  SiS_DataBusWidth;
+	USHORT SiS_ModeType;
+	USHORT SiS_VBInfo;
+	USHORT SiS_LCDResInfo;
+	USHORT SiS_LCDTypeInfo;
+	USHORT SiS_LCDInfo;
+	USHORT SiS_VBType;
+	USHORT SiS_VBExtInfo;
+	USHORT SiS_HiVision;
+	USHORT SiS_SelectCRT2Rate;
+	USHORT SiS_SetFlag;
+	USHORT SiS_RVBHCFACT;
+	USHORT SiS_RVBHCMAX;
+	USHORT SiS_RVBHRS;
+	USHORT SiS_VGAVT;
+	USHORT SiS_VGAHT;
+	USHORT SiS_VT;
+	USHORT SiS_HT;
+	USHORT SiS_VGAVDE;
+	USHORT SiS_VGAHDE;
+	USHORT SiS_VDE;
+	USHORT SiS_HDE;
+	USHORT SiS_NewFlickerMode;
+	USHORT SiS_RY1COE;
+	USHORT SiS_RY2COE;
+	USHORT SiS_RY3COE;
+	USHORT SiS_RY4COE;
+	USHORT SiS_LCDHDES;
+	USHORT SiS_LCDVDES;
+	USHORT SiS_DDC_Port;
+	USHORT SiS_DDC_Index;
+	USHORT SiS_DDC_Data;
+	USHORT SiS_DDC_Clk;
+	USHORT SiS_DDC_DataShift;
+	USHORT SiS_DDC_DeviceAddr;
+	USHORT SiS_DDC_ReadAddr;
+	USHORT SiS_DDC_SecAddr;
+	USHORT SiS_Panel800x600;
+	USHORT SiS_Panel1024x768;
+	USHORT SiS_Panel1280x1024;
+	USHORT SiS_Panel1600x1200;
+	USHORT SiS_Panel1280x960;
+	USHORT SiS_Panel1400x1050;
+	USHORT SiS_Panel320x480;
+	USHORT SiS_Panel1152x768;
+	USHORT SiS_Panel1280x768;
+	USHORT SiS_Panel1024x600;
+	USHORT SiS_Panel640x480;
+	USHORT SiS_Panel1152x864;
+	USHORT SiS_PanelMax;
+	USHORT SiS_PanelMinLVDS;
+	USHORT SiS_PanelMin301;
+	USHORT SiS_ChrontelInit;
+	
+	/* Pointers: */
+	const SiS_StStruct          *SiS_SModeIDTable;
+	const SiS_StandTableStruct  *SiS_StandTable;
+	const SiS_ExtStruct         *SiS_EModeIDTable;
+	const SiS_Ext2Struct        *SiS_RefIndex;
+	const SiS_VBModeStruct      *SiS_VBModeIDTable;
+	const SiS_CRT1TableStruct   *SiS_CRT1Table;
+	const SiS_MCLKDataStruct    *SiS_MCLKData_0;
+	const SiS_MCLKDataStruct    *SiS_MCLKData_1;
+	const SiS_ECLKDataStruct    *SiS_ECLKData;
+	const SiS_VCLKDataStruct    *SiS_VCLKData;
+	const SiS_VBVCLKDataStruct  *SiS_VBVCLKData;
+	const SiS_StResInfoStruct   *SiS_StResInfo;
+	const SiS_ModeResInfoStruct *SiS_ModeResInfo;
+	const UCHAR                 *SiS_ScreenOffset;
+
+	const UCHAR                 *pSiS_OutputSelect;
+	const UCHAR                 *pSiS_SoftSetting;
+
+	const DRAM4Type *SiS_SR15; /* pointer : point to array */
+#ifndef LINUX_XF86
+	UCHAR *pSiS_SR07;
+	const DRAM4Type *SiS_CR40; /* pointer : point to array */
+	UCHAR *SiS_CR49;
+	UCHAR *SiS_SR25;
+	UCHAR *pSiS_SR1F;
+	UCHAR *pSiS_SR21;
+	UCHAR *pSiS_SR22;
+	UCHAR *pSiS_SR23;
+	UCHAR *pSiS_SR24;
+	UCHAR *pSiS_SR31;
+	UCHAR *pSiS_SR32;
+	UCHAR *pSiS_SR33;
+	UCHAR *pSiS_CRT2Data_1_2;
+	UCHAR *pSiS_CRT2Data_4_D;
+	UCHAR *pSiS_CRT2Data_4_E;
+	UCHAR *pSiS_CRT2Data_4_10;
+	const USHORT *pSiS_RGBSenseData;
+	const USHORT *pSiS_VideoSenseData;
+	const USHORT *pSiS_YCSenseData;
+	const USHORT *pSiS_RGBSenseData2; /*301b*/
+	const USHORT *pSiS_VideoSenseData2;
+	const USHORT *pSiS_YCSenseData2;
+#endif
+	const UCHAR *SiS_NTSCPhase;
+	const UCHAR *SiS_PALPhase;
+	const UCHAR *SiS_NTSCPhase2;
+	const UCHAR *SiS_PALPhase2;
+	const UCHAR *SiS_PALMPhase;
+	const UCHAR *SiS_PALNPhase;
+	const UCHAR *SiS_PALMPhase2;
+	const UCHAR *SiS_PALNPhase2;
+	const UCHAR *SiS_SpecialPhase;
+	const SiS_LCDDataStruct  *SiS_StLCD1024x768Data;
+	const SiS_LCDDataStruct  *SiS_ExtLCD1024x768Data;
+	const SiS_LCDDataStruct  *SiS_St2LCD1024x768Data;
+	const SiS_LCDDataStruct  *SiS_StLCD1280x1024Data;
+	const SiS_LCDDataStruct  *SiS_ExtLCD1280x1024Data;
+	const SiS_LCDDataStruct  *SiS_St2LCD1280x1024Data;
+	const SiS_LCDDataStruct  *SiS_NoScaleData1024x768;
+	const SiS_LCDDataStruct  *SiS_NoScaleData1280x1024;
+	const SiS_LCDDataStruct  *SiS_LCD1280x960Data;
+	const SiS_LCDDataStruct  *SiS_NoScaleData1400x1050;
+	const SiS_LCDDataStruct  *SiS_NoScaleData1600x1200;
+	const SiS_LCDDataStruct  *SiS_StLCD1400x1050Data;
+	const SiS_LCDDataStruct  *SiS_StLCD1600x1200Data;
+	const SiS_LCDDataStruct  *SiS_ExtLCD1400x1050Data;
+	const SiS_LCDDataStruct  *SiS_ExtLCD1600x1200Data;
+	const SiS_TVDataStruct   *SiS_StPALData;
+	const SiS_TVDataStruct   *SiS_ExtPALData;
+	const SiS_TVDataStruct   *SiS_StNTSCData;
+	const SiS_TVDataStruct   *SiS_ExtNTSCData;
+#ifdef oldHV
+	const SiS_TVDataStruct   *SiS_St1HiTVData;
+	const SiS_TVDataStruct   *SiS_St2HiTVData;
+	const SiS_TVDataStruct   *SiS_ExtHiTVData;
+#endif
+	const UCHAR *SiS_NTSCTiming;
+	const UCHAR *SiS_PALTiming;
+#ifdef oldHV
+	const UCHAR *SiS_HiTVExtTiming;
+	const UCHAR *SiS_HiTVSt1Timing;
+	const UCHAR *SiS_HiTVSt2Timing;
+	const UCHAR *SiS_HiTVTextTiming;
+	const UCHAR *SiS_HiTVGroup3Data;
+	const UCHAR *SiS_HiTVGroup3Simu;
+	const UCHAR *SiS_HiTVGroup3Text;
+#endif
+	const SiS_PanelDelayTblStruct *SiS_PanelDelayTbl;
+	const SiS_PanelDelayTblStruct *SiS_PanelDelayTblLVDS;
+	const SiS_LVDSDataStruct  *SiS_LVDS800x600Data_1;
+	const SiS_LVDSDataStruct  *SiS_LVDS800x600Data_2;
+	const SiS_LVDSDataStruct  *SiS_LVDS1024x768Data_1;
+	const SiS_LVDSDataStruct  *SiS_LVDS1024x768Data_2;
+	const SiS_LVDSDataStruct  *SiS_LVDS1280x1024Data_1;
+	const SiS_LVDSDataStruct  *SiS_LVDS1280x1024Data_2;
+	const SiS_LVDSDataStruct  *SiS_LVDS1280x960Data_1;
+	const SiS_LVDSDataStruct  *SiS_LVDS1280x960Data_2;
+	const SiS_LVDSDataStruct  *SiS_LVDS1400x1050Data_1;
+	const SiS_LVDSDataStruct  *SiS_LVDS1400x1050Data_2;
+	const SiS_LVDSDataStruct  *SiS_LVDS1280x768Data_1;
+	const SiS_LVDSDataStruct  *SiS_LVDS1280x768Data_2;
+	const SiS_LVDSDataStruct  *SiS_LVDS1024x600Data_1;
+	const SiS_LVDSDataStruct  *SiS_LVDS1024x600Data_2;
+	const SiS_LVDSDataStruct  *SiS_LVDS1152x768Data_1;
+	const SiS_LVDSDataStruct  *SiS_LVDS1152x768Data_2;
+	const SiS_LVDSDataStruct  *SiS_LVDS640x480Data_1;
+	const SiS_LVDSDataStruct  *SiS_LVDS320x480Data_1;
+	const SiS_LVDSDataStruct  *SiS_LCDA1400x1050Data_1;
+	const SiS_LVDSDataStruct  *SiS_LCDA1400x1050Data_2;
+	const SiS_LVDSDataStruct  *SiS_LCDA1600x1200Data_1;
+	const SiS_LVDSDataStruct  *SiS_LCDA1600x1200Data_2;
+	const SiS_LVDSDataStruct  *SiS_LVDSXXXxXXXData_1;
+	const SiS_LVDSDataStruct  *SiS_CHTVUNTSCData;
+	const SiS_LVDSDataStruct  *SiS_CHTVONTSCData;
+	const SiS_LVDSDataStruct  *SiS_CHTVUPALData;
+	const SiS_LVDSDataStruct  *SiS_CHTVOPALData;
+	const SiS_LVDSDataStruct  *SiS_CHTVUPALMData;
+	const SiS_LVDSDataStruct  *SiS_CHTVOPALMData;
+	const SiS_LVDSDataStruct  *SiS_CHTVUPALNData;
+	const SiS_LVDSDataStruct  *SiS_CHTVOPALNData;
+	const SiS_LVDSDataStruct  *SiS_CHTVSOPALData;
+	const SiS_LVDSDesStruct  *SiS_PanelType00_1;
+	const SiS_LVDSDesStruct  *SiS_PanelType01_1;
+	const SiS_LVDSDesStruct  *SiS_PanelType02_1;
+	const SiS_LVDSDesStruct  *SiS_PanelType03_1;
+	const SiS_LVDSDesStruct  *SiS_PanelType04_1;
+	const SiS_LVDSDesStruct  *SiS_PanelType05_1;
+	const SiS_LVDSDesStruct  *SiS_PanelType06_1;
+	const SiS_LVDSDesStruct  *SiS_PanelType07_1;
+	const SiS_LVDSDesStruct  *SiS_PanelType08_1;
+	const SiS_LVDSDesStruct  *SiS_PanelType09_1;
+	const SiS_LVDSDesStruct  *SiS_PanelType0a_1;
+	const SiS_LVDSDesStruct  *SiS_PanelType0b_1;
+	const SiS_LVDSDesStruct  *SiS_PanelType0c_1;
+	const SiS_LVDSDesStruct  *SiS_PanelType0d_1;
+	const SiS_LVDSDesStruct  *SiS_PanelType0e_1;
+	const SiS_LVDSDesStruct  *SiS_PanelType0f_1;
+	const SiS_LVDSDesStruct  *SiS_PanelType00_2;
+	const SiS_LVDSDesStruct  *SiS_PanelType01_2;
+	const SiS_LVDSDesStruct  *SiS_PanelType02_2;
+	const SiS_LVDSDesStruct  *SiS_PanelType03_2;
+	const SiS_LVDSDesStruct  *SiS_PanelType04_2;
+	const SiS_LVDSDesStruct  *SiS_PanelType05_2;
+	const SiS_LVDSDesStruct  *SiS_PanelType06_2;
+	const SiS_LVDSDesStruct  *SiS_PanelType07_2;
+	const SiS_LVDSDesStruct  *SiS_PanelType08_2;
+	const SiS_LVDSDesStruct  *SiS_PanelType09_2;
+	const SiS_LVDSDesStruct  *SiS_PanelType0a_2;
+	const SiS_LVDSDesStruct  *SiS_PanelType0b_2;
+	const SiS_LVDSDesStruct  *SiS_PanelType0c_2;
+	const SiS_LVDSDesStruct  *SiS_PanelType0d_2;
+	const SiS_LVDSDesStruct  *SiS_PanelType0e_2;
+	const SiS_LVDSDesStruct  *SiS_PanelType0f_2;
+
+	const SiS_LVDSDesStruct  *LVDS1024x768Des_1;
+	const SiS_LVDSDesStruct  *LVDS1280x1024Des_1;
+	const SiS_LVDSDesStruct  *LVDS1400x1050Des_1;
+	const SiS_LVDSDesStruct  *LVDS1600x1200Des_1;
+	const SiS_LVDSDesStruct  *LVDS1024x768Des_2;
+	const SiS_LVDSDesStruct  *LVDS1280x1024Des_2;
+	const SiS_LVDSDesStruct  *LVDS1400x1050Des_2;
+	const SiS_LVDSDesStruct  *LVDS1600x1200Des_2;
+
+	const SiS_LVDSDesStruct  *SiS_CHTVUNTSCDesData;
+	const SiS_LVDSDesStruct  *SiS_CHTVONTSCDesData;
+	const SiS_LVDSDesStruct  *SiS_CHTVUPALDesData;
+	const SiS_LVDSDesStruct  *SiS_CHTVOPALDesData;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT1800x600_1;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11024x768_1;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11280x1024_1;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11400x1050_1;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11280x768_1;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11024x600_1;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11152x768_1;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11600x1200_1;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT1800x600_1_H;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11024x768_1_H;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11280x1024_1_H;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11400x1050_1_H;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11280x768_1_H;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11024x600_1_H;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11152x768_1_H;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11600x1200_1_H;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT1800x600_2;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11024x768_2;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11280x1024_2;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11400x1050_2;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11280x768_2;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11024x600_2;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11152x768_2;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11600x1200_2;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT1800x600_2_H;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11024x768_2_H;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11280x1024_2_H;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11400x1050_2_H;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11280x768_2_H;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11024x600_2_H;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11152x768_2_H;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11600x1200_2_H;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT1XXXxXXX_1;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT1XXXxXXX_1_H;
+	const SiS_LVDSCRT1DataStruct  *SiS_CHTVCRT1UNTSC;
+	const SiS_LVDSCRT1DataStruct  *SiS_CHTVCRT1ONTSC;
+	const SiS_LVDSCRT1DataStruct  *SiS_CHTVCRT1UPAL;
+	const SiS_LVDSCRT1DataStruct  *SiS_CHTVCRT1OPAL;
+	const SiS_LVDSCRT1DataStruct  *SiS_CHTVCRT1SOPAL;
+
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT1320x480_1;
+
+	const SiS_LCDACRT1DataStruct  *SiS_LCDACRT1800x600_1;
+	const SiS_LCDACRT1DataStruct  *SiS_LCDACRT11024x768_1;
+	const SiS_LCDACRT1DataStruct  *SiS_LCDACRT11280x1024_1;
+	const SiS_LCDACRT1DataStruct  *SiS_LCDACRT11400x1050_1;
+	const SiS_LCDACRT1DataStruct  *SiS_LCDACRT11600x1200_1;
+	const SiS_LCDACRT1DataStruct  *SiS_LCDACRT1800x600_1_H;
+	const SiS_LCDACRT1DataStruct  *SiS_LCDACRT11024x768_1_H;
+	const SiS_LCDACRT1DataStruct  *SiS_LCDACRT11280x1024_1_H;
+	const SiS_LCDACRT1DataStruct  *SiS_LCDACRT11400x1050_1_H;
+	const SiS_LCDACRT1DataStruct  *SiS_LCDACRT11600x1200_1_H;
+	const SiS_LCDACRT1DataStruct  *SiS_LCDACRT1800x600_2;
+	const SiS_LCDACRT1DataStruct  *SiS_LCDACRT11024x768_2;
+	const SiS_LCDACRT1DataStruct  *SiS_LCDACRT11280x1024_2;
+	const SiS_LCDACRT1DataStruct  *SiS_LCDACRT11400x1050_2;
+	const SiS_LCDACRT1DataStruct  *SiS_LCDACRT11600x1200_2;
+	const SiS_LCDACRT1DataStruct  *SiS_LCDACRT1800x600_2_H;
+	const SiS_LCDACRT1DataStruct  *SiS_LCDACRT11024x768_2_H;
+	const SiS_LCDACRT1DataStruct  *SiS_LCDACRT11280x1024_2_H;
+	const SiS_LCDACRT1DataStruct  *SiS_LCDACRT11400x1050_2_H;
+	const SiS_LCDACRT1DataStruct  *SiS_LCDACRT11600x1200_2_H;
+
+	/* TW: New for 650/301LV */
+	const SiS_Part2PortTblStruct *SiS_CRT2Part2_1024x768_1;
+	const SiS_Part2PortTblStruct *SiS_CRT2Part2_1280x1024_1;
+	const SiS_Part2PortTblStruct *SiS_CRT2Part2_1400x1050_1;
+	const SiS_Part2PortTblStruct *SiS_CRT2Part2_1600x1200_1;
+	const SiS_Part2PortTblStruct *SiS_CRT2Part2_1024x768_2;
+	const SiS_Part2PortTblStruct *SiS_CRT2Part2_1280x1024_2;
+	const SiS_Part2PortTblStruct *SiS_CRT2Part2_1400x1050_2;
+	const SiS_Part2PortTblStruct *SiS_CRT2Part2_1600x1200_2;
+	const SiS_Part2PortTblStruct *SiS_CRT2Part2_1024x768_3;
+	const SiS_Part2PortTblStruct *SiS_CRT2Part2_1280x1024_3;
+	const SiS_Part2PortTblStruct *SiS_CRT2Part2_1400x1050_3;
+	const SiS_Part2PortTblStruct *SiS_CRT2Part2_1600x1200_3;
+
+	const SiS_CHTVRegDataStruct *SiS_CHTVReg_UNTSC;
+	const SiS_CHTVRegDataStruct *SiS_CHTVReg_ONTSC;
+	const SiS_CHTVRegDataStruct *SiS_CHTVReg_UPAL;
+	const SiS_CHTVRegDataStruct *SiS_CHTVReg_OPAL;
+	const SiS_CHTVRegDataStruct *SiS_CHTVReg_UPALM;
+	const SiS_CHTVRegDataStruct *SiS_CHTVReg_OPALM;
+	const SiS_CHTVRegDataStruct *SiS_CHTVReg_UPALN;
+	const SiS_CHTVRegDataStruct *SiS_CHTVReg_OPALN;
+	const SiS_CHTVRegDataStruct *SiS_CHTVReg_SOPAL;
+	const UCHAR *SiS_CHTVVCLKUNTSC;
+	const UCHAR *SiS_CHTVVCLKONTSC;
+	const UCHAR *SiS_CHTVVCLKUPAL;
+	const UCHAR *SiS_CHTVVCLKOPAL;
+	const UCHAR *SiS_CHTVVCLKUPALM;
+	const UCHAR *SiS_CHTVVCLKOPALM;
+	const UCHAR *SiS_CHTVVCLKUPALN;
+	const UCHAR *SiS_CHTVVCLKOPALN;
+	const UCHAR *SiS_CHTVVCLKSOPAL;
+	
+	BOOLEAN UseCustomMode;
+	BOOLEAN CRT1UsesCustomMode;
+	USHORT  CHDisplay;
+	USHORT  CHSyncStart;
+	USHORT  CHSyncEnd;
+	USHORT  CHTotal;
+	USHORT  CHBlankStart;
+	USHORT  CHBlankEnd;
+	USHORT  CVDisplay;
+	USHORT  CVSyncStart;
+	USHORT  CVSyncEnd;
+	USHORT  CVTotal;
+	USHORT  CVBlankStart;
+	USHORT  CVBlankEnd;
+	ULONG   CDClock;
+	ULONG   CFlags;   
+	UCHAR   CCRT1CRTC[17];
+	UCHAR   CSR2B;
+	UCHAR   CSR2C;
+	USHORT  CSRClock;
+	USHORT  CModeFlag;
+	USHORT  CInfoFlag;
+	BOOLEAN SiS_CHPALM;
+	BOOLEAN SiS_CHPALN;
+} SiS_Private;
+
+#endif
+
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/suncg6/cg6_driver.c b/xc/programs/Xserver/hw/xfree86/drivers/suncg6/cg6_driver.c
index 74284bbc3..bf9a33370 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/suncg6/cg6_driver.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/suncg6/cg6_driver.c
@@ -20,7 +20,7 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/suncg6/cg6_driver.c,v 1.6 2001/05/16 06:48:11 keithp Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/suncg6/cg6_driver.c,v 1.7 2002/12/06 16:44:38 tsi Exp $ */
 
 #include "xf86.h"
 #include "xf86_OSproc.h"
@@ -658,10 +658,26 @@ CG6ValidMode(int scrnIndex, DisplayModePtr mode, Bool verbose, int flags)
 /* Mandatory */
 static Bool
 CG6SaveScreen(ScreenPtr pScreen, int mode)
-    /* this function should blank the screen when unblank is FALSE and
-       unblank it when unblank is TRUE -- it doesn't actually seem to be
-       used for much though */
 {
+    ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
+    Cg6Ptr pCg6 = GET_CG6_FROM_SCRN(pScrn);
+    unsigned int tmp = pCg6->thc->thc_misc;
+
+    switch(mode)
+    {
+    case SCREEN_SAVER_ON:
+    case SCREEN_SAVER_CYCLE:
+       tmp &= ~CG6_THC_MISC_SYNC_ENAB;
+       break;
+    case SCREEN_SAVER_OFF:
+    case SCREEN_SAVER_FORCER:
+       tmp |= CG6_THC_MISC_SYNC_ENAB;
+       break;
+    default:
+       return FALSE;
+    }
+
+    pCg6->thc->thc_misc = tmp;
     return TRUE;
 }
 
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/sunffb/ffb.h b/xc/programs/Xserver/hw/xfree86/drivers/sunffb/ffb.h
index 13838959b..af54db25c 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/sunffb/ffb.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/sunffb/ffb.h
@@ -24,7 +24,7 @@
  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sunffb/ffb.h,v 1.7 2001/05/04 19:05:46 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sunffb/ffb.h,v 1.8 2002/12/06 02:44:03 tsi Exp $ */
 
 #ifndef FFB_H
 #define FFB_H
@@ -43,6 +43,11 @@
 #include "xf86drm.h"
 #include "ffb_drishare.h"
 #endif
+#ifndef  DPMS_SERVER
+#define  DPMS_SERVER
+#endif   /* DPMS_SERVER */
+#include "extensions/dpms.h"
+
 
 /* Various offsets in virtual (ie. mmap()) spaces Linux and Solaris support. */
 /* Note: do not mmap FFB_DFB8R_VOFF and following mappings using one mmap together
@@ -233,6 +238,8 @@ extern Bool FFBDacInit(FFBPtr);
 extern void FFBDacFini(FFBPtr);
 extern void FFBDacEnterVT(FFBPtr);
 extern void FFBDacLeaveVT(FFBPtr);
+extern Bool FFBDacSaveScreen(FFBPtr, int);
+extern void FFBDacDPMSMode(FFBPtr, int, int);
 
 /* Exported WID layer routines. */
 extern void FFBWidPoolInit(FFBPtr);
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/sunffb/ffb_dac.c b/xc/programs/Xserver/hw/xfree86/drivers/sunffb/ffb_dac.c
index 78abdf2f0..01b746ec2 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/sunffb/ffb_dac.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/sunffb/ffb_dac.c
@@ -21,7 +21,7 @@
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sunffb/ffb_dac.c,v 1.3 2001/04/05 17:42:33 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sunffb/ffb_dac.c,v 1.4 2002/12/06 02:44:03 tsi Exp $ */
 
 #include "ffb.h"
 #include "ffb_rcache.h"
@@ -33,6 +33,14 @@
 
 #include "xf86DDC.h"
 
+/*
+ * Used for stabilize time after playing with power management on the display
+ */
+
+#ifndef DPMS_SPIN_COUNT
+#define DPMS_SPIN_COUNT 100
+#endif  /* DPMS_SPIN_COUNT */
+
 /* Cursor programming */
 
 void
@@ -494,3 +502,111 @@ FFBDacLeaveVT(FFBPtr pFfb)
 	dac_state_restore(pFfb, &p->kern_dac_state);
 	restore_kernel_xchannel(pFfb);
 }
+
+/*  DPMS stuff, courtesy of a hint from David S. Miller.
+ *  05.xii.01, FEM
+ */
+
+/*
+ * I don't know why, if at all, this is needed, but JJ or DSM do it
+ * on restore. I observe that when just blanking/unblanking, everything
+ * works fine without it, but that sometimes DPMS -> Standby actually
+ * results in Off.  Maybe related?
+ */
+static void
+SPIN(ffb_dacPtr d, int count) {
+  while(count-- > 0) {
+    (void) DACCFG_READ(d, FFBDAC_CFG_TGVC);
+  }
+  return;
+}
+
+/*  Screen save (blank) restore */
+Bool
+FFBDacSaveScreen(FFBPtr pFfb, int mode) {
+  int tmp;
+  ffb_dacPtr dac;
+  if(!pFfb) return FALSE;   /* Is there any way at all this could happen? */
+  else dac = pFfb -> dac;
+
+  tmp = DACCFG_READ(dac, FFBDAC_CFG_TGEN);  /* Get the timing information */
+
+  switch(mode) {
+    case SCREEN_SAVER_ON:
+    case SCREEN_SAVER_CYCLE:
+      tmp &= ~FFBDAC_CFG_TGEN_VIDE;  /* Kill the video */
+      break;
+
+    case SCREEN_SAVER_OFF:
+    case SCREEN_SAVER_FORCER:
+      tmp |= FFBDAC_CFG_TGEN_VIDE;  /* Turn the video on */
+      break;
+
+    default:
+      return FALSE;  /* Don't know what to do; gently fail. */
+  }
+  DACCFG_WRITE(dac, FFBDAC_CFG_TGEN, tmp);  /* Restore timing register, video set as asked */
+  SPIN(dac, DPMS_SPIN_COUNT/10);
+  return TRUE;
+}
+
+/*  DPMS Control, also hinted at by David Miller.
+
+    The rule seems to be:
+    
+    StandBy  =  -HSYNC +VSYNC -VIDEO
+    Suspend  =  +HSYNC -VSYNC -VIDEO
+    Off      =  -HSYNC -VSYNC -VIDEO
+    On       =  +HSYNC +VSINC +VIDEO
+
+    If you don't force video off, someone periodically tries to turn the
+    monitor on for some reason.  I don't know who or why, so I kill the video
+    when trying to go into some sort of energy saving mode.  (In real life,
+    'xset s blank s xx' could well have taken care of this.)
+
+    Also, on MY monitor, StandBy as above defined (-H+V-Vid) in fact
+    gives the same as Off, which I don't want.  Hence, I just do (-Vid)
+
+    05.xii.01, FEM
+    08.xii.01, FEM
+*/
+void
+FFBDacDPMSMode(FFBPtr pFfb, int DPMSMode, int flags) {
+  int tmp;
+  ffb_dacPtr dac = pFfb -> dac;
+
+  tmp = DACCFG_READ(dac, FFBDAC_CFG_TGEN);  /* Get timing control */
+
+  switch(DPMSMode) {
+
+    case DPMSModeOn:
+      tmp &= ~(FFBDAC_CFG_TGEN_VSD | FFBDAC_CFG_TGEN_HSD); /* Turn off VSYNC, HSYNC
+							      disable bits */
+      tmp |= FFBDAC_CFG_TGEN_VIDE;  /* Turn the video on */
+       break;
+
+    case DPMSModeStandby:
+#ifdef  DPMS_TRUE_STANDBY
+      tmp |=  FFBDAC_CFG_TGEN_HSD;  /* HSYNC = OFF    */
+#endif  /* DPMS_TRUE_STANDBY */
+      tmp &= ~FFBDAC_CFG_TGEN_VSD;  /* VSYNC = ON     */
+      tmp &= ~FFBDAC_CFG_TGEN_VIDE; /* Kill the video */
+      break;
+
+    case DPMSModeSuspend:
+      tmp |=  FFBDAC_CFG_TGEN_VSD;  /* VSYNC = OFF    */
+      tmp &= ~FFBDAC_CFG_TGEN_HSD;  /* HSYNC = ON     */
+      tmp &= ~FFBDAC_CFG_TGEN_VIDE; /* Kill the video */
+      break;
+
+    case DPMSModeOff:
+      tmp |= (FFBDAC_CFG_TGEN_VSD | FFBDAC_CFG_TGEN_HSD);  /* Kill HSYNC, VSYNC both */
+      tmp &= ~FFBDAC_CFG_TGEN_VIDE;                        /* Kill the video         */
+      break;
+      
+    default:
+      return;     /* If we get here, we really should log an error */
+  }
+  DACCFG_WRITE(dac, FFBDAC_CFG_TGEN,tmp);  /* Restore timing register, video set as asked */
+  SPIN(dac, DPMS_SPIN_COUNT);  /* Is this necessary?  Why?  */
+}
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/sunffb/ffb_dbe.c b/xc/programs/Xserver/hw/xfree86/drivers/sunffb/ffb_dbe.c
index b5d7bc4f1..09395f7f9 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/sunffb/ffb_dbe.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/sunffb/ffb_dbe.c
@@ -21,7 +21,7 @@
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sunffb/ffb_dbe.c,v 1.1 2000/05/23 04:47:44 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sunffb/ffb_dbe.c,v 1.2 2003/02/11 03:19:02 dawes Exp $ */
 
 #define NEED_REPLIES
 #define NEED_EVENTS
@@ -892,10 +892,11 @@ FFBDbeInit(ScreenPtr pScreen, DbeScreenPrivPtr pDbeScreenPriv)
 	return TRUE;
 }
 
-extern Bool DbeRegisterFunction(ScreenPtr pScreen, Bool (*funct)(ScreenPtr, DbeScreenPrivPtr));
+extern void DbeRegisterFunction(ScreenPtr pScreen, Bool (*funct)(ScreenPtr, DbeScreenPrivPtr));
 
 Bool
 FFBDbePreInit(ScreenPtr pScreen)
 {
-	return DbeRegisterFunction(pScreen, FFBDbeInit);
+	DbeRegisterFunction(pScreen, FFBDbeInit);
+	return TRUE;
 }
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/sunffb/ffb_driver.c b/xc/programs/Xserver/hw/xfree86/drivers/sunffb/ffb_driver.c
index 901389e75..8921955a2 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/sunffb/ffb_driver.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/sunffb/ffb_driver.c
@@ -20,7 +20,7 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sunffb/ffb_driver.c,v 1.10 2002/09/16 18:06:01 eich Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sunffb/ffb_driver.c,v 1.11 2002/12/06 02:44:04 tsi Exp $ */
 
 #include "xf86.h"
 #include "xf86_OSproc.h"
@@ -60,7 +60,7 @@ static void	FFBAdjustFrame(int scrnIndex, int x, int y, int flags);
 static void	FFBFreeScreen(int scrnIndex, int flags);
 static int	FFBValidMode(int scrnIndex, DisplayModePtr mode, Bool verbose,
 			     int flags);
-
+static void     FFBDPMSMode(ScrnInfoPtr pScrn, int DPMSMode, int flags);
 /* ffb_dga.c */
 extern void FFB_InitDGA(ScreenPtr pScreen);
 
@@ -942,6 +942,8 @@ FFBScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
     pScreen->CloseScreen = FFBCloseScreen;
     pScreen->SaveScreen = FFBSaveScreen;
 
+    (void) xf86DPMSInit(pScreen, FFBDPMSMode, 0);
+
     /* Report any unused options (only for the first generation) */
     if (serverGeneration == 1) {
 	xf86ShowUnusedOptions(pScrn->scrnIndex, pScrn->options);
@@ -1090,11 +1092,14 @@ FFBValidMode(int scrnIndex, DisplayModePtr mode, Bool verbose, int flags)
 /* Mandatory */
 static Bool
 FFBSaveScreen(ScreenPtr pScreen, int mode)
-    /* this function should blank the screen when unblank is FALSE and
-       unblank it when unblank is TRUE -- it doesn't actually seem to be
-       used for much though */
+    /* This function blanks the screen when mode=SCREEN_SAVER_ON and
+       unblanks it when mode=SCREEN_SAVER_OFF.  It is used internally in the
+       FFBScreenInit code `for aesthetic reasons,' and it is used for
+       blanking if you set "xset s on s blank."  The work (such as it is) is
+       done in "ffb_dac.c" `for aesthetic reasons.'
+    */
 {
-    return TRUE;
+    return FFBDacSaveScreen(GET_FFB_FROM_SCREEN(pScreen), mode);
 }
 
 /*
@@ -1105,3 +1110,13 @@ FFBSync(ScrnInfoPtr pScrn)
 {
     return;
 }
+
+/*
+  Hook for DPMS Mode.
+*/
+
+static void
+FFBDPMSMode(ScrnInfoPtr pScrn, int DPMSMode, int flags)
+{
+  FFBDacDPMSMode(GET_FFB_FROM_SCRN(pScrn), DPMSMode, flags);
+}
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/tdfx/Imakefile b/xc/programs/Xserver/hw/xfree86/drivers/tdfx/Imakefile
index 983303642..be482e80a 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/tdfx/Imakefile
+++ b/xc/programs/Xserver/hw/xfree86/drivers/tdfx/Imakefile
@@ -1,4 +1,4 @@
-XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/drivers/tdfx/Imakefile,v 1.21 2001/05/21 21:43:55 dawes Exp $
+XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/drivers/tdfx/Imakefile,v 1.22 2003/02/17 17:06:44 dawes Exp $
 XCOMM
 XCOMM This is the Imakefile for the TDFX driver.  
 XCOMM 
@@ -36,7 +36,7 @@ INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86OSSRC) \
 	   -I$(XF86SRC)/xaa -I$(XF86SRC)/rac -I$(XF86SRC)/int10 \
            -I$(SERVERSRC)/fb -I$(XF86SRC)/xaa -I$(XF86SRC)/ramdac \
 	   -I$(XF86SRC)/vgahw -I$(XF86SRC)/ddc -I$(XF86SRC)/i2c \
-           -I$(XF86SRC)/ddc -I$(XF86OSSRC)/vbe -I$(SERVERSRC)/Xext \
+           -I$(XF86SRC)/ddc -I$(XF86SRC)/vbe -I$(SERVERSRC)/Xext \
            -I$(FONTINCSRC) -I$(SERVERSRC)/include -I$(XINCLUDESRC) \
 	   -I$(EXTINCSRC) -I$(SERVERSRC)/render \
 	   $(DRIINCLUDES)
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/tdfx/tdfx_dri.c b/xc/programs/Xserver/hw/xfree86/drivers/tdfx/tdfx_dri.c
index 475158783..0df0b4396 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/tdfx/tdfx_dri.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/tdfx/tdfx_dri.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/tdfx/tdfx_dri.c,v 1.24 2002/10/17 01:02:08 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/tdfx/tdfx_dri.c,v 1.25 2003/02/08 21:26:59 dawes Exp $ */
 
 #include "xf86.h"
 #include "xf86_OSproc.h"
@@ -195,7 +195,7 @@ TDFXInitVisualConfigs(ScreenPtr pScreen)
 	    else
 	      pConfigs[i].doubleBuffer = FALSE;
 	    pConfigs[i].stereo = FALSE;
-	    pConfigs[i].bufferSize = 16;
+	    pConfigs[i].bufferSize = (pScrn->bitsPerPixel==32) ? 32 : 24;
 	    if (depth) {
 	      if (pTDFX->cpp > 2)
 		pConfigs[i].depthSize = 24;
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/tdfx/tdfx_driver.c b/xc/programs/Xserver/hw/xfree86/drivers/tdfx/tdfx_driver.c
index 9742a79fa..0c0ce8060 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/tdfx/tdfx_driver.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/tdfx/tdfx_driver.c
@@ -27,7 +27,7 @@ TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
 SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/tdfx/tdfx_driver.c,v 1.91 2002/08/15 02:16:30 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/tdfx/tdfx_driver.c,v 1.92 2002/11/25 14:05:00 eich Exp $ */
 
 /*
  * Authors:
@@ -758,15 +758,16 @@ TDFXPreInit(ScrnInfoPtr pScrn, int flags)
 #endif
 #endif
 
-#if 0  
+#if 1
     /* 
      * I'm sure we don't need to set these. All resources 
      * for these operations are exclusive.
      */
-  if (pTDFX->usePIO)
-    pScrn->racIoFlags = RAC_FB | RAC_COLORMAP | RAC_CURSOR | RAC_VIEWPORT;
-  else
-    pScrn->racMemFlags = RAC_FB | RAC_COLORMAP | RAC_CURSOR | RAC_VIEWPORT;
+  if (pTDFX->usePIO) {
+      pScrn->racMemFlags = RAC_FB;
+      pScrn->racIoFlags = RAC_FB | RAC_COLORMAP | RAC_CURSOR | RAC_VIEWPORT;
+  } else
+      pScrn->racMemFlags = RAC_FB | RAC_COLORMAP | RAC_CURSOR | RAC_VIEWPORT;
 #endif
 
   /* Set pScrn->monitor */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/trident/Imakefile b/xc/programs/Xserver/hw/xfree86/drivers/trident/Imakefile
index bd30e34e8..18fe53df6 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/trident/Imakefile
+++ b/xc/programs/Xserver/hw/xfree86/drivers/trident/Imakefile
@@ -1,4 +1,4 @@
-XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/drivers/trident/Imakefile,v 1.30 2002/04/01 12:06:19 alanh Exp $
+XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/drivers/trident/Imakefile,v 1.31 2003/02/17 17:06:44 dawes Exp $
 XCOMM
 XCOMM This is an Imakefile for the TRIDENT driver.  
 XCOMM
@@ -27,7 +27,7 @@ INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86OSSRC) -I$(SERVERSRC)/Xext \
            -I$(XF86SRC)/rac -I$(XF86SRC)/int10 \
 	   -I$(XF86SRC)/ddc -I$(XF86SRC)/i2c \
            -I$(FONTINCSRC) -I$(SERVERSRC)/include -I$(XINCLUDESRC) \
-	   -I$(EXTINCSRC) -I$(XF86OSSRC)/vbe
+	   -I$(EXTINCSRC) -I$(XF86SRC)/vbe
 #endif
 
 #if MakeHasPosixVariableSubstitutions
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/trident/trident.man b/xc/programs/Xserver/hw/xfree86/drivers/trident/trident.man
index 133c31331..a02fa43f2 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/trident/trident.man
+++ b/xc/programs/Xserver/hw/xfree86/drivers/trident/trident.man
@@ -1,4 +1,4 @@
-.\" $XFree86: xc/programs/Xserver/hw/xfree86/drivers/trident/trident.man,v 1.11 2002/09/16 18:06:02 eich Exp $ 
+.\" $XFree86: xc/programs/Xserver/hw/xfree86/drivers/trident/trident.man,v 1.12 2003/01/06 10:15:26 alanh Exp $ 
 .\" shorthand for double quote that works everywhere.
 .ds q \N'34'
 .TH TRIDENT __drivermansuffix__ __vendorversion__
@@ -26,7 +26,7 @@ Trident chips:
 .TP 12
 .B Blade
 Blade3D, CyberBlade series i1, i7 (DSTN), i1, i1 (DSTN), Ai1, Ai1 (DSTN),
-CyberBlade/e4, CyberBladeXPm8, CyberBladeXPm16, CyberBladeAi1/XP, BladeXP
+CyberBlade/e4, CyberBladeXP, CyberBladeAi1/XP, BladeXP
 .TP 12
 .B Image
 3DImage975, 3DImage985, Cyber9520, Cyber9525, Cyber9397, Cyber9397DVD
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/trident/trident_accel.c b/xc/programs/Xserver/hw/xfree86/drivers/trident/trident_accel.c
index 595303e0e..256e97e5b 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/trident/trident_accel.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/trident/trident_accel.c
@@ -23,7 +23,7 @@
  * 
  * Trident accelerated options.
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/trident/trident_accel.c,v 1.25 2002/10/09 16:38:20 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/trident/trident_accel.c,v 1.26 2003/02/12 21:46:42 tsi Exp $ */
 
 #include "xf86.h"
 #include "xf86_OSproc.h"
@@ -478,6 +478,7 @@ TridentSubsequentFillRectSolid(ScrnInfoPtr pScrn, int x, int y, int w, int h)
     TridentSync(pScrn);
 }
 
+#if 0
 static void MoveDWORDS(
    register CARD32* dest,
    register CARD32* src,
@@ -505,6 +506,7 @@ static void MoveDWORDS(
      dest += 1;
      src += 1;
 }
+#endif
 
 static void 
 TridentSetupForMono8x8PatternFill(ScrnInfoPtr pScrn, 
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/trident/trident_dac.c b/xc/programs/Xserver/hw/xfree86/drivers/trident/trident_dac.c
index f671f3a5c..311dd819e 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/trident/trident_dac.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/trident/trident_dac.c
@@ -21,7 +21,7 @@
  *
  * Author:  Alan Hourihane, alanh@fairlite.demon.co.uk
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/trident/trident_dac.c,v 1.69 2002/09/16 18:06:02 eich Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/trident/trident_dac.c,v 1.70 2003/01/05 18:09:00 alanh Exp $ */
 
 #include "xf86.h"
 #include "xf86_OSproc.h"
@@ -657,6 +657,11 @@ TridentInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
     if (pTrident->IsCyber && !pTrident->MMIOonly)
 	pReg->tridentRegs3x4[DRAMControl] |= 0x20;
 
+    if (pTrident->NewClockCode && pTrident->Chipset <= CYBER9397DVD) {
+	    OUTB(vgaIOBase + 4, ClockControl);
+	    pReg->tridentRegs3x4[ClockControl] = INB(vgaIOBase + 5) | 0x01;
+    }
+
     OUTB(vgaIOBase+ 4, AddColReg);
     pReg->tridentRegs3x4[AddColReg] = INB(vgaIOBase + 5) & 0xEF;
     pReg->tridentRegs3x4[AddColReg] |= (offset & 0x100) >> 4;
@@ -775,6 +780,8 @@ TridentRestore(ScrnInfoPtr pScrn, TRIDENTRegPtr tridentReg)
     OUTW_3CE(MiscIntContReg);
     OUTW_3CE(MiscExtFunc);
     OUTW_3x4(Offset);
+    if (pTrident->NewClockCode && pTrident->Chipset <= CYBER9397DVD)
+	OUTW_3x4(ClockControl);
     if (pTrident->Chipset >= CYBER9388) {
 	OUTW_3C4(Threshold);
 	OUTW_3C4(SSetup);
@@ -904,6 +911,8 @@ TridentSave(ScrnInfoPtr pScrn, TRIDENTRegPtr tridentReg)
     INB_3x4(GraphEngReg);
     INB_3x4(PCIReg);
     INB_3x4(PCIRetry);
+    if (pTrident->NewClockCode && pTrident->Chipset <= CYBER9397DVD)
+	INB_3x4(ClockControl);
     if (pTrident->Chipset >= CYBER9388) {
 	INB_3C4(Threshold);
 	INB_3C4(SSetup);
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/trident/trident_driver.c b/xc/programs/Xserver/hw/xfree86/drivers/trident/trident_driver.c
index d2fff9f33..a75d4feb1 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/trident/trident_driver.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/trident/trident_driver.c
@@ -28,7 +28,7 @@
  *	    Massimiliano Ghilardi, max@Linuz.sns.it, some fixes to the
  *				   clockchip programming code.
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/trident/trident_driver.c,v 1.175 2002/09/19 13:22:00 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/trident/trident_driver.c,v 1.176 2003/02/11 03:41:38 dawes Exp $ */
 
 #include "xf1bpp.h"
 #include "xf4bpp.h"
@@ -1425,7 +1425,7 @@ TRIDENTPreInit(ScrnInfoPtr pScrn, int flags)
 	    xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "Ignoring Option ROTATE "
 		       "in non-Linear Mode\n");
 	else if (pScrn->depth < 8) 
-	    xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "Tgnoring Option ROTATE "
+	    xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "Ignoring Option ROTATE "
 		       "when depth < 8");
 	else {
 	    if(!xf86NameCmp(s, "CW")) {
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/trident/trident_video.c b/xc/programs/Xserver/hw/xfree86/drivers/trident/trident_video.c
index 16cd60959..9c296298e 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/trident/trident_video.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/trident/trident_video.c
@@ -21,7 +21,7 @@
  *
  * Author:  Alan Hourihane, alanh@fairlite.demon.co.uk
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/trident/trident_video.c,v 1.29 2002/09/16 18:06:04 eich Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/trident/trident_video.c,v 1.31 2002/12/22 18:54:43 alanh Exp $ */
 
 #include "xf86.h"
 #include "xf86_OSproc.h"
@@ -106,7 +106,7 @@ void TRIDENTInitVideo(ScreenPtr pScreen)
     if (pTrident->Chipset == CYBER9397 || pTrident->Chipset == CYBER9397DVD)
 	pTrident->videoFlags = VID_ZOOM_NOMINI;
 
-    if (pTrident->Chipset > CYBER9520)
+    if (pTrident->Chipset == CYBER9397DVD || pTrident->Chipset >= CYBER9525DVD)
 	pTrident->videoFlags |= VID_DOUBLE_LINEBUFFER_FOR_WIDE_SRC;
 
     newAdaptor = TRIDENTSetupImageVideo(pScreen);
@@ -181,11 +181,16 @@ static XF86AttributeRec Attributes[NUM_ATTRIBUTES] =
     {XvSettable | XvGettable, 0, 7,           "XV_CONTRAST"}
 };
 
-#define NUM_IMAGES 4
+#if 0
+# define NUM_IMAGES 4
+#else
+# define NUM_IMAGES 4
+#endif
 
 static XF86ImageRec Images[NUM_IMAGES] =
 {
-   {
+#if 0
+    {
 	0x35315652,
         XvRGB,
 	LSBFirst,
@@ -202,6 +207,7 @@ static XF86ImageRec Images[NUM_IMAGES] =
 	  0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0},
 	XvTopToBottom
    },
+#endif
    {
 	0x36315652,
         XvRGB,
@@ -211,7 +217,7 @@ static XF86ImageRec Images[NUM_IMAGES] =
 	16,
 	XvPacked,
 	1,
-	16, 0x001F, 0x07E0, 0xF800,
+	16, 0xF800, 0x07E0, 0x001F,
 	0, 0, 0,
 	0, 0, 0,
 	0, 0, 0,
@@ -723,6 +729,7 @@ TRIDENTDisplayVideo(
     case 0x36315652:		/* RGB16 */
 	if (pTrident->Chipset >= CYBER9388) {
     	    OUTW(vgaIOBase + 4, 0x22BF);
+	    OUTW(vgaIOBase + 4, 0x248F);
 	} else {
     	    OUTW(vgaIOBase + 4, 0x118F);
 	}
@@ -732,6 +739,7 @@ TRIDENTDisplayVideo(
     default:
 	if (pTrident->Chipset >= CYBER9388) {
     	    OUTW(vgaIOBase + 4, 0x00BF);
+	    OUTW(vgaIOBase + 4, 0x208F);
 	} else {
     	    OUTW(vgaIOBase + 4, 0x108F);
 	}
@@ -851,7 +859,6 @@ TRIDENTDisplayVideo(
     	OUTW(vgaIOBase + 4, 0xFFBD);
     	OUTW(vgaIOBase + 4, 0x04BE); 
     	OUTW(vgaIOBase + 4, 0x948E);
-    	OUTW(vgaIOBase + 4, 0x208F);
     } else {
 	
     	OUTW(vgaIOBase + 4, ((((id == FOURCC_YV12) || (id == FOURCC_YUY2)) 
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/vesa/Imakefile b/xc/programs/Xserver/hw/xfree86/drivers/vesa/Imakefile
index e629082bf..e0505d514 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/vesa/Imakefile
+++ b/xc/programs/Xserver/hw/xfree86/drivers/vesa/Imakefile
@@ -1,4 +1,4 @@
-XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/drivers/vesa/Imakefile,v 1.5 2002/02/13 21:32:51 dawes Exp $
+XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/drivers/vesa/Imakefile,v 1.6 2003/02/17 17:06:44 dawes Exp $
 
 #define IHaveModules
 #include <Server.tmpl>
@@ -18,7 +18,7 @@ INCLUDES = -I. -I$(SERVERSRC)/fb -I$(XF86SRC)/xf4bpp -I$(XF86SRC)/xf1bpp \
 	   -I$(XF86COMSRC) -I$(XF86OSSRC) -I$(SERVERSRC)/Xext \
 	   -I$(SERVERSRC)/include -I$(FONTINCSRC) -I$(XINCLUDESRC)\
 	   -I$(XF86SRC)/rac -I$(XF86SRC)/ddc -I$(XF86SRC)/i2c \
-	   -I$(XF86SRC)/os-support/vbe -I$(XF86SRC)/int10 \
+	   -I$(XF86SRC)/vbe -I$(XF86SRC)/int10 \
 	   -I$(EXTINCSRC)
 #endif
 
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/vesa/vesa.c b/xc/programs/Xserver/hw/xfree86/drivers/vesa/vesa.c
index 3a746fd36..f54becce5 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/vesa/vesa.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/vesa/vesa.c
@@ -28,7 +28,7 @@
  * Authors: Paulo César Pereira de Andrade <pcpa@conectiva.com.br>
  *          David Dawes <dawes@xfree86.org>
  *
- * $XFree86: xc/programs/Xserver/hw/xfree86/drivers/vesa/vesa.c,v 1.34 2002/10/16 17:51:34 dawes Exp $
+ * $XFree86: xc/programs/Xserver/hw/xfree86/drivers/vesa/vesa.c,v 1.36 2003/01/23 17:20:46 tsi Exp $
  */
 
 #include "vesa.h"
@@ -173,17 +173,21 @@ static const char *shadowSymbols[] = {
 
 static const char *vbeSymbols[] = {
     "VBEBankSwitch",
-    "VBEFreeModeInfo",
+    "VBEExtendedInit",
+    "VBEFindSupportedDepths",
     "VBEGetModeInfo",
     "VBEGetVBEInfo",
     "VBEGetVBEMode",
-    "VBEInit",
+    "VBEPrintModes",
     "VBESaveRestore",
     "VBESetDisplayStart",
     "VBESetGetDACPaletteFormat",
     "VBESetGetLogicalScanlineLength",
     "VBESetGetPaletteData",
+    "VBESetModeNames",
+    "VBESetModeParameters",
     "VBESetVBEMode",
+    "VBEValidateModes",
     "vbeDoEDID",
     "vbeFree",
     NULL
@@ -480,7 +484,8 @@ VESAPreInit(ScrnInfoPtr pScrn, int flags)
     pScrn->progClock = TRUE;
     pScrn->rgbBits = 8;
 
-    vbe = VBEGetVBEInfo(pVesa->pVbe);
+    if ((vbe = VBEGetVBEInfo(pVesa->pVbe)) == NULL)
+	return (FALSE);
     pVesa->major = (unsigned)(vbe->VESAVersion >> 8);
     pVesa->minor = vbe->VESAVersion & 0xff;
     pVesa->vbeInfo = vbe;
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/vesa/vesa.h b/xc/programs/Xserver/hw/xfree86/drivers/vesa/vesa.h
index bea904796..cc448eb37 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/vesa/vesa.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/vesa/vesa.h
@@ -26,7 +26,7 @@
  *
  * Authors: Paulo César Pereira de Andrade <pcpa@conectiva.com.br>
  *
- * $XFree86: xc/programs/Xserver/hw/xfree86/drivers/vesa/vesa.h,v 1.13 2002/09/19 02:57:03 dawes Exp $
+ * $XFree86: xc/programs/Xserver/hw/xfree86/drivers/vesa/vesa.h,v 1.14 2003/01/16 16:09:10 eich Exp $
  */
 
 #ifndef _VESA_H_
@@ -98,7 +98,7 @@ typedef struct _VESARec
     miBankInfoRec bank;
     int curBank, bankSwitchWindowB;
     CARD16 maxBytesPerScanline;
-    int mapPhys, mapOff, mapSize;	/* video memory */
+    unsigned long mapPhys, mapOff, mapSize;	/* video memory */
     void *base, *VGAbase;
     CARD8 *state, *pstate;	/* SVGA state */
     int statePage, stateSize, stateMode;
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/vga/generic.c b/xc/programs/Xserver/hw/xfree86/drivers/vga/generic.c
index 39eac9a57..fa9acd042 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/vga/generic.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/vga/generic.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/vga/generic.c,v 1.60 2002/04/04 14:05:50 eich Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/vga/generic.c,v 1.62 2002/12/03 01:58:58 dickey Exp $ */
 /*
  * Copyright (C) 1998 The XFree86 Project, Inc.  All Rights Reserved.
  *
@@ -36,7 +36,6 @@
  * Marc Aurele La France <tsi@xfree86.org>
  */
 
-#define DEBUG(x) 
 #include "xf86.h"
 #include "xf86_OSproc.h"
 #include "xf86_ansic.h"
@@ -67,13 +66,13 @@
 #define VGA_VERSION_NAME    "4.0"
 #define VGA_VERSION_MAJOR   4
 #define VGA_VERSION_MINOR   0
-#define VGA_PATCHLEVEL	    0
+#define VGA_PATCHLEVEL      0
 #define VGA_VERSION_CURRENT ((VGA_VERSION_MAJOR << 24) | \
 			     (VGA_VERSION_MINOR << 16) | VGA_PATCHLEVEL)
 
 
 /* Forward definitions */
-static const OptionInfoRec *	  GenericAvailableOptions(int chipid, int busid);
+static const OptionInfoRec *      GenericAvailableOptions(int chipid, int busid);
 static void       GenericIdentify(int);
 static Bool       GenericProbe(DriverPtr, int);
 static Bool       GenericPreInit(ScrnInfoPtr, int);
@@ -102,20 +101,23 @@ DriverRec VGA =
     0
 };
 
-typedef enum {
+typedef enum
+{
     OPTION_SHADOW_FB,
     OPTION_VGA_CLOCKS,
     OPTION_KGA_UNIVERSAL
 } GenericOpts;
 
-static const OptionInfoRec GenericOptions[] = {
+static const OptionInfoRec GenericOptions[] =
+{
     { OPTION_SHADOW_FB,         "ShadowFB",     OPTV_BOOLEAN,   {0}, FALSE },
     { OPTION_VGA_CLOCKS,        "VGAClocks",    OPTV_BOOLEAN,   {0}, FALSE },
     { OPTION_KGA_UNIVERSAL,     "KGAUniversal", OPTV_BOOLEAN,   {0}, FALSE },
     { -1,                       NULL,           OPTV_NONE,      {0}, FALSE }
 };
 
-static const char *vgahwSymbols[] = {
+static const char *vgahwSymbols[] =
+{
     "vgaHWBlankScreen",
     "vgaHWDPMSSet",
     "vgaHWFreeHWRec",
@@ -135,24 +137,28 @@ static const char *vgahwSymbols[] = {
     NULL
 };
 
-static const char *miscfbSymbols[] = {
+static const char *miscfbSymbols[] =
+{
     "xf1bppScreenInit",
     "xf4bppScreenInit",
     NULL
 };
 
-static const char *fbSymbols[] = {
+static const char *fbSymbols[] =
+{
     "fbPictureInit",
     "fbScreenInit",
     NULL
 };
 
-static const char *shadowfbSymbols[] = {
+static const char *shadowfbSymbols[] =
+{
     "ShadowFBInit",
     NULL
 };
 
-static const char *int10Symbols[] = {
+static const char *int10Symbols[] =
+{
     "xf86ExtendedInitInt10",
     "xf86FreeInt10",
     NULL
@@ -191,15 +197,15 @@ GenericSetup(pointer Module, pointer Options, int *ErrorMajor, int *ErrorMinor)
 
     if (!Initialised)
     {
-        Initialised = TRUE;
-        xf86AddDriver(&VGA, Module, 0);
+	Initialised = TRUE;
+	xf86AddDriver(&VGA, Module, 0);
 	LoaderRefSymLists(vgahwSymbols, miscfbSymbols, fbSymbols,
-			  shadowfbSymbols, int10Symbols,NULL);
-        return (pointer)TRUE;
+			  shadowfbSymbols, int10Symbols, NULL);
+	return (pointer)TRUE;
     }
 
     if (ErrorMajor)
-        *ErrorMajor = LDR_ONCEONLY;
+	*ErrorMajor = LDR_ONCEONLY;
     return NULL;
 }
 
@@ -218,22 +224,24 @@ static SymTabRec GenericChipsets[] =
     {-1,               NULL}
 };
 
-static PciChipsets GenericPCIchipsets[] = {
-  { CHIP_VGA_GENERIC, PCI_CHIP_VGA, RES_SHARED_VGA },
-  { -1,               -1,           RES_UNDEFINED },
+static PciChipsets GenericPCIchipsets[] =
+{
+    {CHIP_VGA_GENERIC, PCI_CHIP_VGA, RES_SHARED_VGA},
+    {-1,               -1,           RES_UNDEFINED},
 };
 
-static IsaChipsets GenericISAchipsets[] = {
-  {CHIP_VGA_GENERIC, RES_EXCLUSIVE_VGA},
-  {-1,                0 }
+static IsaChipsets GenericISAchipsets[] =
+{
+    {CHIP_VGA_GENERIC, RES_EXCLUSIVE_VGA},
+    {-1,               0}
 };
 
 static void
 GenericIdentify(int flags)
 {
     xf86PrintChipsets(VGA_NAME,
-        "Generic VGA driver (version " VGA_VERSION_NAME ") for chipsets",
-        GenericChipsets);
+	"Generic VGA driver (version " VGA_VERSION_NAME ") for chipsets",
+	GenericChipsets);
 }
 
 static const OptionInfoRec *
@@ -260,27 +268,31 @@ GenericProbe(DriverPtr drv, int flags)
      * Find the config file Device sections that match this
      * driver, and return if there are none.
      */
-    if ((numDevSections = xf86MatchDevice(VGA_NAME,
-					  &devSections)) <= 0) {
+    if ((numDevSections = xf86MatchDevice(VGA_NAME, &devSections)) <= 0)
 	return FALSE;
-    }
-  
+
     /* PCI BUS */
-    if (xf86GetPciVideoInfo() ) {
+    if (xf86GetPciVideoInfo())
+    {
 	numUsed = xf86MatchPciInstances(VGA_NAME, PCI_VENDOR_GENERIC,
-					GenericChipsets, GenericPCIchipsets, 
-					devSections,numDevSections,
+					GenericChipsets, GenericPCIchipsets,
+					devSections, numDevSections,
 					drv, &usedChips);
-	if (numUsed > 0) {
+	if (numUsed > 0)
+	{
 	    if (flags & PROBE_DETECT)
 		foundScreen = TRUE;
-	    else {
-		for (i = 0; i < numUsed; i++) {
+	    else
+	    {
+		for (i = 0;  i < numUsed;  i++)
+		{
 		    ScrnInfoPtr pScrn = NULL;
 		    /* Allocate a ScrnInfoRec  */
-		    if ((pScrn = xf86ConfigPciEntity(pScrn,0,usedChips[i],
-							   GenericPCIchipsets,NULL,
-							   NULL,NULL,NULL,NULL))){
+		    pScrn = xf86ConfigPciEntity(pScrn, 0, usedChips[i],
+						GenericPCIchipsets, NULL,
+						NULL, NULL, NULL, NULL);
+		    if (pScrn)
+		    {
 			pScrn->driverVersion = VGA_VERSION_CURRENT;
 			pScrn->driverName    = VGA_DRIVER_NAME;
 			pScrn->name          = VGA_NAME;
@@ -300,21 +312,24 @@ GenericProbe(DriverPtr drv, int flags)
 	    xfree(usedChips);
 	}
     }
-    
+
     /* Isa Bus */
-    numUsed = xf86MatchIsaInstances(VGA_NAME,GenericChipsets,
-				     GenericISAchipsets,drv,
-				     VGAFindIsaDevice,devSections,
-				     numDevSections,&usedChips);
-    if(numUsed > 0) {
+    numUsed = xf86MatchIsaInstances(VGA_NAME, GenericChipsets,
+				    GenericISAchipsets, drv,
+				    VGAFindIsaDevice, devSections,
+				    numDevSections, &usedChips);
+    if (numUsed > 0)
+    {
 	if (flags & PROBE_DETECT)
 	    foundScreen = TRUE;
-	else for (i = 0; i < numUsed; i++) {
+	else for (i = 0; i < numUsed; i++)
+	{
 	    ScrnInfoPtr pScrn = NULL;
-	    if ((pScrn = xf86ConfigIsaEntity(pScrn,0,usedChips[i],
-						   GenericISAchipsets,NULL,
-						   NULL,NULL,NULL,NULL))) {
-	    
+	    pScrn = xf86ConfigIsaEntity(pScrn, 0, usedChips[i],
+					GenericISAchipsets,
+					NULL, NULL, NULL, NULL, NULL);
+	    if (pScrn)
+	    {
 		pScrn->driverVersion = VGA_VERSION_CURRENT;
 		pScrn->driverName    = VGA_DRIVER_NAME;
 		pScrn->name          = VGA_NAME;
@@ -329,8 +344,9 @@ GenericProbe(DriverPtr drv, int flags)
 		pScrn->ValidMode     = GenericValidMode;
 		foundScreen = TRUE;
 	    }
+
+	    xfree(usedChips);
 	}
-	xfree(usedChips);
     }
 
     xfree(devSections);
@@ -341,24 +357,25 @@ static int
 VGAFindIsaDevice(GDevPtr dev)
 {
 #ifndef PC98_EGC
-    CARD16 GenericIOBase = VGAHW_GET_IOBASE();
-    CARD8 CurrentValue, TestValue;
-    
-    /* There's no need to unlock VGA CRTC registers here */
-
-    /* VGA has one more read/write attribute register than EGA */
-    (void) inb(GenericIOBase + 0x0AU);  /* Reset flip-flop */
-    outb(VGA_ATTR_INDEX, 0x14 | 0x20);
-    CurrentValue = inb(VGA_ATTR_DATA_R);
-    outb(VGA_ATTR_DATA_W, CurrentValue ^ 0x0F);
-    outb(VGA_ATTR_INDEX, 0x14 | 0x20);
-    TestValue = inb(VGA_ATTR_DATA_R);
-    outb(VGA_ATTR_DATA_W, CurrentValue);
-
-    /* Quit now if no VGA is present */
-    if ((CurrentValue ^ 0x0F) != TestValue)
-      return -1;
+	CARD16 GenericIOBase = VGAHW_GET_IOBASE();
+	CARD8 CurrentValue, TestValue;
+
+	/* There's no need to unlock VGA CRTC registers here */
+
+	/* VGA has one more read/write attribute register than EGA */
+	(void) inb(GenericIOBase + 0x0AU);  /* Reset flip-flop */
+	outb(VGA_ATTR_INDEX, 0x14 | 0x20);
+	CurrentValue = inb(VGA_ATTR_DATA_R);
+	outb(VGA_ATTR_DATA_W, CurrentValue ^ 0x0F);
+	outb(VGA_ATTR_INDEX, 0x14 | 0x20);
+	TestValue = inb(VGA_ATTR_DATA_R);
+	outb(VGA_ATTR_DATA_W, CurrentValue);
+
+	/* Quit now if no VGA is present */
+	if ((CurrentValue ^ 0x0F) != TestValue)
+	    return -1;
 #endif
+
     return (int)CHIP_VGA_GENERIC;
 }
 
@@ -366,24 +383,24 @@ static Bool
 GenericClockSelect(ScrnInfoPtr pScreenInfo, int ClockNumber)
 {
 #   ifndef PC98_EGC
-        vgaHWPtr pvgaHW = VGAHWPTR(pScreenInfo);
-        static CARD8 save_misc;
+	vgaHWPtr pvgaHW = VGAHWPTR(pScreenInfo);
+	static CARD8 save_misc;
 
-        switch (ClockNumber)
-        {
-            case CLK_REG_SAVE:
-                save_misc = inb(pvgaHW->PIOOffset + VGA_MISC_OUT_R);
-                break;
+	switch (ClockNumber)
+	{
+	    case CLK_REG_SAVE:
+		save_misc = inb(pvgaHW->PIOOffset + VGA_MISC_OUT_R);
+		break;
 
-            case CLK_REG_RESTORE:
-                outb(pvgaHW->PIOOffset + VGA_MISC_OUT_W, save_misc);
-                break;
+	    case CLK_REG_RESTORE:
+		outb(pvgaHW->PIOOffset + VGA_MISC_OUT_W, save_misc);
+		break;
 
-            default:
-                outb(pvgaHW->PIOOffset + VGA_MISC_OUT_W,
+	    default:
+		outb(pvgaHW->PIOOffset + VGA_MISC_OUT_W,
 		    (save_misc & 0xF3) | ((ClockNumber << 2) & 0x0C));
-                break;
-        }
+		break;
+	}
 #   endif
 
     return TRUE;
@@ -408,7 +425,7 @@ static GenericPtr
 GenericGetRec(ScrnInfoPtr pScreenInfo)
 {
     if (!pScreenInfo->driverPrivate)
-        pScreenInfo->driverPrivate = xcalloc(sizeof(GenericRec), 1);
+	pScreenInfo->driverPrivate = xcalloc(sizeof(GenericRec), 1);
 
     return (GenericPtr)pScreenInfo->driverPrivate;
 }
@@ -475,16 +492,18 @@ static Bool
 GenericPreInit(ScrnInfoPtr pScreenInfo, int flags)
 {
     static rgb        defaultWeight = {0, 0, 0};
-    static ClockRange GenericClockRange = {NULL, 0, 80000, 0, FALSE, TRUE, 1, 1, 0};
+    static ClockRange GenericClockRange =
+		      {NULL, 0, 80000, 0, FALSE, TRUE, 1, 1, 0};
     MessageType       From;
     int               i, videoRam, Rounding, nModes = 0;
     const char       *Module = NULL;
-    const char	     *Sym = NULL;
+    const char       *Sym = NULL;
     vgaHWPtr          pvgaHW;
     GenericPtr        pGenericPriv;
     EntityInfoPtr     pEnt;
 
-    if (flags & PROBE_DETECT) return FALSE;
+    if (flags & PROBE_DETECT)
+	return FALSE;
 
     /* Set the monitor */
     pScreenInfo->monitor = pScreenInfo->confScreen->monitor;
@@ -495,52 +514,55 @@ GenericPreInit(ScrnInfoPtr pScreenInfo, int flags)
     if (pEnt->resources)
 	return FALSE;
 
-    if (xf86LoadSubModule(pScreenInfo, "int10")) {
- 	xf86Int10InfoPtr pInt;
- 	xf86LoaderReqSymLists(int10Symbols, NULL);
+    if (xf86LoadSubModule(pScreenInfo, "int10"))
+    {
+	xf86Int10InfoPtr pInt;
+	xf86LoaderReqSymLists(int10Symbols, NULL);
 	xf86DrvMsg(pScreenInfo->scrnIndex, X_INFO, "initializing int10.\n");
-	pInt = xf86ExtendedInitInt10(pEnt->index, SET_BIOS_SCRATCH
-			     | RESTORE_BIOS_SCRATCH);
+	pInt = xf86ExtendedInitInt10(pEnt->index,
+				     SET_BIOS_SCRATCH | RESTORE_BIOS_SCRATCH);
 	xf86FreeInt10(pInt);
     }
 
-    
+
     {
-	static resRange unusedmem[] =	{ {ResShrMemBlock,0xB0000,0xB7FFF},
-					  {ResShrMemBlock,0xB8000,0xBFFFF},
+	static resRange unusedmem[] =   { {ResShrMemBlock, 0xB0000, 0xB7FFF},
+					  {ResShrMemBlock, 0xB8000, 0xBFFFF},
 					  _END };
-	
+
 	/* XXX Should this be "disabled" or "unused"? */
 	xf86SetOperatingState(unusedmem, pEnt->index, ResUnusedOpr);
     }
 
     /* Determine depth, bpp, etc. */
     if (!xf86SetDepthBpp(pScreenInfo, 4, 0, 4, NoDepth24Support))
-        return FALSE;
-    pScreenInfo->chipset = (char *)xf86TokenToString(GenericChipsets,
-						   pEnt->chipset);
+	return FALSE;
+    pScreenInfo->chipset =
+	(char *)xf86TokenToString(GenericChipsets, pEnt->chipset);
 
     switch (pScreenInfo->depth)
     {
-        case 1:  Module = "xf1bpp"; Sym = "xf1bppScreenInit";  break;
-        case 4:  Module = "xf4bpp"; Sym = "xf4bppScreenInit";  break;
-        default: Module = "fb";                                break;
+	case 1:  Module = "xf1bpp"; Sym = "xf1bppScreenInit";  break;
+	case 4:  Module = "xf4bpp"; Sym = "xf4bppScreenInit";  break;
+	default: Module = "fb";                                break;
     }
+
     xf86PrintDepthBpp(pScreenInfo);
 
     /* Determine colour weights */
     pScreenInfo->rgbBits = 6;
     if (!xf86SetWeight(pScreenInfo, defaultWeight, defaultWeight))
-        return FALSE;
+	return FALSE;
 
     /* XXX:  Check that returned weight is supported */
 
     /* Determine default visual */
     if (!xf86SetDefaultVisual(pScreenInfo, -1))
-        return FALSE;
+	return FALSE;
 
     /* The gamma fields must be initialised when using the new cmap code */
-    if (pScreenInfo->depth > 1) {
+    if (pScreenInfo->depth > 1)
+    {
 	Gamma zeros = {0.0, 0.0, 0.0};
 
 	if (!xf86SetGamma(pScreenInfo, zeros))
@@ -553,51 +575,52 @@ GenericPreInit(ScrnInfoPtr pScreenInfo, int flags)
      */
     if ((videoRam = pEnt->device->videoRam))
     {
-        pScreenInfo->videoRam = videoRam;
-        if (pScreenInfo->depth == 8)
-        {
-            if (videoRam > 64)
-                pScreenInfo->videoRam = 64;
-        }
-        else
-        {
-            if (videoRam > 256)
-                pScreenInfo->videoRam = 256;
-        }
-        From = X_CONFIG;
+	pScreenInfo->videoRam = videoRam;
+	if (pScreenInfo->depth == 8)
+	{
+	    if (videoRam > 64)
+		pScreenInfo->videoRam = 64;
+	}
+	else
+	{
+	    if (videoRam > 256)
+		pScreenInfo->videoRam = 256;
+	}
+	From = X_CONFIG;
     }
     else
     {
-        if (pScreenInfo->depth == 8)
-            videoRam = 64;
-        else
-            videoRam = 256;
-        pScreenInfo->videoRam = videoRam;
-        From = X_DEFAULT;       /* Instead of X_PROBED */
+	if (pScreenInfo->depth == 8)
+	    videoRam = 64;
+	else
+	    videoRam = 256;
+	pScreenInfo->videoRam = videoRam;
+	From = X_DEFAULT;       /* Instead of X_PROBED */
     }
+
     if (pScreenInfo->depth == 1)
-        pScreenInfo->videoRam >>= 2;
+	pScreenInfo->videoRam >>= 2;
     xf86DrvMsg(pScreenInfo->scrnIndex, From, "videoRam: %d kBytes", videoRam);
     if (videoRam != pScreenInfo->videoRam)
-        xf86ErrorF(" (using %d kBytes)", pScreenInfo->videoRam);
+	xf86ErrorF(" (using %d kBytes)", pScreenInfo->videoRam);
     xf86ErrorF(".\n");
 
-    if (xf86RegisterResources(pEnt->index,NULL,ResNone))
+    if (xf86RegisterResources(pEnt->index, NULL, ResNone))
 	return FALSE;
-	
+
     /* Ensure vgahw entry points are available for the clock probe */
     if (!xf86LoadSubModule(pScreenInfo, "vgahw"))
-        return FALSE;
+	return FALSE;
 
     xf86LoaderReqSymLists(vgahwSymbols, NULL);
 
     /* Allocate driver private structure */
     if (!(pGenericPriv = GenericGetRec(pScreenInfo)))
-        return FALSE;
+	return FALSE;
 
     /* Ensure vgahw private structure is allocated */
     if (!vgaHWGetHWRec(pScreenInfo))
-        return FALSE;
+	return FALSE;
 
     pvgaHW = VGAHWPTR(pScreenInfo);
     pvgaHW->MapSize = 0x00010000;       /* Standard 64kB VGA window */
@@ -609,15 +632,15 @@ GenericPreInit(ScrnInfoPtr pScreenInfo, int flags)
     if (!(pGenericPriv->Options = xalloc(sizeof(GenericOptions))))
 	return FALSE;
     memcpy(pGenericPriv->Options, GenericOptions, sizeof(GenericOptions));
-    xf86ProcessOptions(pScreenInfo->scrnIndex, pScreenInfo->options, 
+    xf86ProcessOptions(pScreenInfo->scrnIndex, pScreenInfo->options,
 		       pGenericPriv->Options);
 
 #ifndef __NOT_YET__
     if (pScreenInfo->depth == 8)
     {
-        pScreenInfo->numClocks = 1;
-        pScreenInfo->clock[0] = 25175;
-        goto SetDefaultMode;
+	pScreenInfo->numClocks = 1;
+	pScreenInfo->clock[0] = 25175;
+	goto SetDefaultMode;
     }
 #endif
 
@@ -627,67 +650,70 @@ GenericPreInit(ScrnInfoPtr pScreenInfo, int flags)
      */
     if ((pScreenInfo->numClocks = pEnt->device->numclocks))
     {
-        if (pScreenInfo->numClocks > 4)
-            pScreenInfo->numClocks = 4;
-        for (i = 0;  i < pScreenInfo->numClocks;  i++)
-            pScreenInfo->clock[i] = pEnt->device->clock[i];
-        From = X_CONFIG;
-    } else
-    if (xf86ReturnOptValBool(pGenericPriv->Options, OPTION_VGA_CLOCKS, FALSE)) {
-        pScreenInfo->numClocks = 2;
-        pScreenInfo->clock[0] = 25175;
-        pScreenInfo->clock[1] = 28322;
-    } else {
-        xf86GetClocks(pScreenInfo, 4,
+	if (pScreenInfo->numClocks > 4)
+	    pScreenInfo->numClocks = 4;
+	for (i = 0;  i < pScreenInfo->numClocks;  i++)
+	    pScreenInfo->clock[i] = pEnt->device->clock[i];
+	From = X_CONFIG;
+    }
+    else
+    if (xf86ReturnOptValBool(pGenericPriv->Options, OPTION_VGA_CLOCKS, FALSE))
+    {
+	pScreenInfo->numClocks = 2;
+	pScreenInfo->clock[0] = 25175;
+	pScreenInfo->clock[1] = 28322;
+    }
+    else
+    {
+	xf86GetClocks(pScreenInfo, 4,
 	    GenericClockSelect, GenericProtect, GenericBlankScreen,
 	    pvgaHW->PIOOffset + pvgaHW->IOBase + VGA_IN_STAT_1_OFFSET,
 	    0x08, 1, 28322);
-        From = X_PROBED;
+	From = X_PROBED;
     }
     xf86ShowClocks(pScreenInfo, From);
 
-    {
-        /* Set the virtual X rounding (in bits) */
-        if (pScreenInfo->depth == 8)
-            Rounding = 16 * 8;
-        else
-            Rounding = 16;
-
-        /*
-         * Validate the modes.  Note that the limits passed to
-         * xf86ValidateModes() are VGA CRTC architectural limits.
-         */
-        pScreenInfo->maxHValue = 2080;
-        pScreenInfo->maxVValue = 1025;
-        nModes = xf86ValidateModes(pScreenInfo,
-            pScreenInfo->monitor->Modes, pScreenInfo->display->modes,
-            &GenericClockRange, NULL, 8, 2040, Rounding, 1, 1024,
-            pScreenInfo->display->virtualX, pScreenInfo->display->virtualY,
-            0x10000, LOOKUP_CLOSEST_CLOCK | LOOKUP_CLKDIV2);
-
-        if (nModes < 0)
-            return FALSE;
-
-        /* Remove invalid modes */
-        xf86PruneDriverModes(pScreenInfo);
-    }
+    /* Set the virtual X rounding (in bits) */
+    if (pScreenInfo->depth == 8)
+	Rounding = 16 * 8;
+    else
+	Rounding = 16;
+
+    /*
+     * Validate the modes.  Note that the limits passed to xf86ValidateModes()
+     * are VGA CRTC architectural limits.
+     */
+    pScreenInfo->maxHValue = 2080;
+    pScreenInfo->maxVValue = 1025;
+    nModes = xf86ValidateModes(pScreenInfo, pScreenInfo->monitor->Modes,
+			       pScreenInfo->display->modes, &GenericClockRange,
+			       NULL, 8, 2040, Rounding, 1, 1024,
+			       pScreenInfo->display->virtualX,
+			       pScreenInfo->display->virtualY, 0x10000,
+			       LOOKUP_CLOSEST_CLOCK | LOOKUP_CLKDIV2);
+
+    if (nModes < 0)
+	return FALSE;
+
+    /* Remove invalid modes */
+    xf86PruneDriverModes(pScreenInfo);
 
     if (!nModes || !pScreenInfo->modes)
     {
 #ifndef __NOT_YET__
   SetDefaultMode:
 #endif
-        /* Set a default mode, overridding any virtual settings */
-        pScreenInfo->virtualX = pScreenInfo->displayWidth = 320;
-        pScreenInfo->virtualY = 200;
-        pScreenInfo->modes = xalloc(sizeof(DisplayModeRec));
-        if (!pScreenInfo->modes)
-            return FALSE;
-        *pScreenInfo->modes = GenericDefaultMode;
-        pScreenInfo->modes->prev = pScreenInfo->modes;
-        pScreenInfo->modes->next = pScreenInfo->modes;
-
-        pScreenInfo->virtualFrom = X_DEFAULT;
+	/* Set a default mode, overridding any virtual settings */
+	pScreenInfo->virtualX = pScreenInfo->displayWidth = 320;
+	pScreenInfo->virtualY = 200;
+	pScreenInfo->modes = xalloc(sizeof(DisplayModeRec));
+	if (!pScreenInfo->modes)
+	    return FALSE;
+	*pScreenInfo->modes = GenericDefaultMode;
+	pScreenInfo->modes->prev = pScreenInfo->modes;
+	pScreenInfo->modes->next = pScreenInfo->modes;
+
+	pScreenInfo->virtualFrom = X_DEFAULT;
     }
 
     /* Set CRTC values for the modes */
@@ -702,28 +728,35 @@ GenericPreInit(ScrnInfoPtr pScreenInfo, int flags)
     /* Set display resolution */
     xf86SetDpi(pScreenInfo, 0, 0);
 
-    if (xf86ReturnOptValBool(pGenericPriv->Options, OPTION_SHADOW_FB, FALSE)) {
+    if (xf86ReturnOptValBool(pGenericPriv->Options, OPTION_SHADOW_FB, FALSE))
+    {
 	pGenericPriv->ShadowFB = TRUE;
 	xf86DrvMsg(pScreenInfo->scrnIndex, X_CONFIG,
 		   "Using \"Shadow Framebuffer\".\n");
     }
-    if (xf86ReturnOptValBool(pGenericPriv->Options, OPTION_KGA_UNIVERSAL, 
-			     FALSE)) {
+
+    if (xf86ReturnOptValBool(pGenericPriv->Options, OPTION_KGA_UNIVERSAL,
+			     FALSE))
+    {
 	pGenericPriv->KGAUniversal = TRUE;
 	xf86DrvMsg(pScreenInfo->scrnIndex, X_CONFIG,
 		   "Enabling universal \"KGA\" treatment.\n");
     }
+
 #ifdef SPECIAL_FB_BYTE_ACCESS
-    if (!pGenericPriv->ShadowFB && (pScreenInfo->depth == 4)) {
+    if (!pGenericPriv->ShadowFB && (pScreenInfo->depth == 4))
+    {
 	xf86DrvMsg(pScreenInfo->scrnIndex, X_INFO,
 	    "Architecture requires special FB access for this depth:"
 	    "  ShadowFB enabled.\n");
- 	pGenericPriv->ShadowFB = TRUE;
+	pGenericPriv->ShadowFB = TRUE;
     }
 #endif
-    if (pGenericPriv->ShadowFB) {
-        pScreenInfo->bitmapBitOrder = BITMAP_BIT_ORDER;
-        pScreenInfo->bitmapScanlineUnit = BITMAP_SCANLINE_UNIT;
+
+    if (pGenericPriv->ShadowFB)
+    {
+	pScreenInfo->bitmapBitOrder = BITMAP_BIT_ORDER;
+	pScreenInfo->bitmapScanlineUnit = BITMAP_SCANLINE_UNIT;
 	Module = "fb";
 	Sym = NULL;
 	if (!xf86LoadSubModule(pScreenInfo, "shadowfb"))
@@ -732,21 +765,21 @@ GenericPreInit(ScrnInfoPtr pScreenInfo, int flags)
     }
 
     /* Ensure depth-specific entry points are available */
-    if (Module && !xf86LoadSubModule(pScreenInfo, Module))
-	return FALSE;
+    if (Module)
+    {
+	if (!xf86LoadSubModule(pScreenInfo, Module))
+	    return FALSE;
 
-    if (Module) {
-	if (Sym) {
+	if (Sym)
 	    xf86LoaderReqSymbols(Sym, NULL);
-	} else {
+	else
 	    xf86LoaderReqSymLists(fbSymbols, NULL);
-	}
     }
 
     /* Only one chipset here */
     if (!pScreenInfo->chipset)
-        pScreenInfo->chipset = (char *)GenericChipsets[0].name;
-   
+	pScreenInfo->chipset = (char *)GenericChipsets[0].name;
+
     return TRUE;        /* Tada! */
 }
 
@@ -779,40 +812,42 @@ GenericSetMode(ScrnInfoPtr pScreenInfo, DisplayModePtr pMode)
     GenericPtr pGenericPriv = GenericGetRec(pScreenInfo);
 
     if (!vgaHWInit(pScreenInfo, pMode))
-        return FALSE;
-    if (pGenericPriv->KGAUniversal) {
+	return FALSE;
+    if (pGenericPriv->KGAUniversal)
+    {
 #define KGA_FLAGS (KGA_FIX_OVERSCAN | KGA_BE_TOT_DEC)
-    vgaHWHBlankKGA(pMode, &pvgaHW->ModeReg, 0, KGA_FLAGS);
-    vgaHWHBlankKGA(pMode, &pvgaHW->ModeReg, 0, KGA_FLAGS); 
+	vgaHWHBlankKGA(pMode, &pvgaHW->ModeReg, 0, KGA_FLAGS);
+	vgaHWHBlankKGA(pMode, &pvgaHW->ModeReg, 0, KGA_FLAGS);
 #undef KGA_FLAGS
     }
+
     pScreenInfo->vtSema = TRUE;
 
 #ifndef __NOT_YET__
     if (pScreenInfo->depth == 8)
     {
-        int i;
+	int i;
 
-        static const CARD8 CRTC[24] =
-        {
+	static const CARD8 CRTC[24] =
+	{
 #ifndef DEBUGOVERSCAN
-            0x5F, 0x4F, 0x4F, 0x80, 0x54, 0x00, 0xBE, 0x1F,
-            0x00, 0x41, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-            0x9C, 0x0E, 0x8F, 0x28, 0x40, 0x8F, 0xBF, 0xA3
+	    0x5F, 0x4F, 0x4F, 0x80, 0x54, 0x00, 0xBE, 0x1F,
+	    0x00, 0x41, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	    0x9C, 0x0E, 0x8F, 0x28, 0x40, 0x8F, 0xBF, 0xA3
 #else
 	    /* These values make some of the overscan area visible */
-            0x5F, 0x4F, 0x50, 0x82, 0x54, 0x80, 0xBF, 0x1F, 
-            0x00, 0x41, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-            0x9C, 0x8E, 0x8F, 0x28, 0x40, 0x96, 0xB9, 0xA3
+	    0x5F, 0x4F, 0x50, 0x82, 0x54, 0x80, 0xBF, 0x1F,
+	    0x00, 0x41, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	    0x9C, 0x8E, 0x8F, 0x28, 0x40, 0x96, 0xB9, 0xA3
 #endif
-        };
+	};
 
-        /* Override vgaHW's CRTC timings */
-        for (i = 0;  i < 24;  i++)
-            pvgaHW->ModeReg.CRTC[i] = CRTC[i];
+	/* Override vgaHW's CRTC timings */
+	for (i = 0;  i < 24;  i++)
+	    pvgaHW->ModeReg.CRTC[i] = CRTC[i];
 
-        /* Clobber any CLKDIV2 */
-        pvgaHW->ModeReg.Sequencer[1] = 0x01;
+	/* Clobber any CLKDIV2 */
+	pvgaHW->ModeReg.Sequencer[1] = 0x01;
     }
 #endif
 
@@ -836,14 +871,14 @@ GenericEnterGraphics(ScreenPtr pScreen, ScrnInfoPtr pScreenInfo)
     /* Save the current state and setup the current mode */
     GenericSave(pScreenInfo);
     if (!GenericSetMode(pScreenInfo, pScreenInfo->currentMode))
-        return FALSE;
+	return FALSE;
 
     /* Possibly blank the screen */
     if (pScreen)
-        GenericSaveScreen(pScreen, SCREEN_SAVER_ON);
+	GenericSaveScreen(pScreen, SCREEN_SAVER_ON);
 
     (*pScreenInfo->AdjustFrame)(pScreenInfo->scrnIndex,
-        pScreenInfo->frameX0, pScreenInfo->frameY0, 0);
+	pScreenInfo->frameX0, pScreenInfo->frameY0, 0);
 
     return TRUE;
 }
@@ -865,19 +900,21 @@ GenericCloseScreen(int scrnIndex, ScreenPtr pScreen)
     GenericPtr pGenericPriv = GenericGetRec(pScreenInfo);
     Bool Closed = TRUE;
 
-    if(pGenericPriv->ShadowPtr)
+    if (pGenericPriv->ShadowPtr)
 	xfree(pGenericPriv->ShadowPtr);
 
     if (pGenericPriv && (pScreen->CloseScreen = pGenericPriv->CloseScreen))
     {
-        pGenericPriv->CloseScreen = NULL;
-        Closed = (*pScreen->CloseScreen)(scrnIndex, pScreen);
+	pGenericPriv->CloseScreen = NULL;
+	Closed = (*pScreen->CloseScreen)(scrnIndex, pScreen);
     }
 
-    if (pScreenInfo->vtSema) {
+    if (pScreenInfo->vtSema)
+    {
 	GenericLeaveGraphics(pScreenInfo);
 	pScreenInfo->vtSema = FALSE;
     }
+
     vgaHWUnmapMem(pScreenInfo);
 
     return Closed;
@@ -898,30 +935,35 @@ GenericRefreshArea1bpp(ScrnInfoPtr pScrn, int num, BoxPtr pbox)
     vgaHWPtr pvgaHW = VGAHWPTR(pScrn);
     int width, height, FBPitch, left, i, j, phase;
     CARD8  *dst, *dstPtr, *src, *srcPtr;
-   
+
     FBPitch = pScrn->displayWidth >> 3;
 
-    while(num--) {
+    while (num--)
+    {
 	left = pbox->x1 & ~7;
-        width = ((pbox->x2 - left) + 7) >> 3;
-        height = pbox->y2 - pbox->y1;
-        src = pPriv->ShadowPtr + (pbox->y1 * pPriv->ShadowPitch) + (left >> 3); 
-        dst = (CARD8*)pvgaHW->Base + (pbox->y1 * FBPitch) + (left >> 3);
+	width = ((pbox->x2 - left) + 7) >> 3;
+	height = pbox->y2 - pbox->y1;
+	src = pPriv->ShadowPtr + (pbox->y1 * pPriv->ShadowPitch) + (left >> 3);
+	dst = (CARD8*)pvgaHW->Base + (pbox->y1 * FBPitch) + (left >> 3);
 
-	if((phase = (long)dst & 3L)) {
+	if ((phase = (long)dst & 3L))
+	{
 	    phase = 4 - phase;
-	    if(phase > width) phase = width;
+	    if (phase > width)
+		phase = width;
 	    width -= phase;
 	}
 
-        while(height--) {
+	while (height--)
+	{
 	    dstPtr = dst;
 	    srcPtr = src;
 	    i = width;
 	    j = phase;
-	    while(j--) 
- 		*dstPtr++ = byte_reversed[*srcPtr++];
-	    while(i >= 4) {
+	    while (j--)
+		*dstPtr++ = byte_reversed[*srcPtr++];
+	    while (i >= 4)
+	    {
 		*((CARD32*)dstPtr) = byte_reversed[srcPtr[0]] |
 				    (byte_reversed[srcPtr[1]] << 8) |
 				    (byte_reversed[srcPtr[2]] << 16) |
@@ -930,16 +972,16 @@ GenericRefreshArea1bpp(ScrnInfoPtr pScrn, int num, BoxPtr pbox)
 		dstPtr += 4;
 		i -= 4;
 	    }
-	    while(i--)
- 		*dstPtr++ = byte_reversed[*srcPtr++];
-            dst += FBPitch;
-            src += pPriv->ShadowPitch;
-        }
-        
-        pbox++;
+	    while (i--)
+		*dstPtr++ = byte_reversed[*srcPtr++];
+	    dst += FBPitch;
+	    src += pPriv->ShadowPitch;
+	}
+
+	pbox++;
     }
 
-} 
+}
 
 #ifndef SPECIAL_FB_BYTE_ACCESS
 
@@ -953,7 +995,7 @@ GenericRefreshArea4bpp(ScrnInfoPtr pScrn, int num, BoxPtr pbox)
     CARD8  s1, s2, s3, s4;
     CARD32 *src, *srcPtr;
     CARD8  *dst, *dstPtr;
-   
+
     FBPitch = pScrn->displayWidth >> 3;
     SRCPitch = pPriv->ShadowPitch >> 2;
 
@@ -961,47 +1003,53 @@ GenericRefreshArea4bpp(ScrnInfoPtr pScrn, int num, BoxPtr pbox)
     (*pvgaHW->writeGr)(pvgaHW, 0x01, 0x00);
     (*pvgaHW->writeGr)(pvgaHW, 0x08, 0xFF);
 
-    while(num--) {
+    while (num--)
+    {
 	left = pbox->x1 & ~7;
-        width = ((pbox->x2 - left) + 7) >> 3;
-        height = pbox->y2 - pbox->y1;
-        src = (CARD32*)pPriv->ShadowPtr + (pbox->y1 * SRCPitch) + (left >> 2); 
-        dst = (CARD8*)pvgaHW->Base + (pbox->y1 * FBPitch) + (left >> 3);
+	width = ((pbox->x2 - left) + 7) >> 3;
+	height = pbox->y2 - pbox->y1;
+	src = (CARD32*)pPriv->ShadowPtr + (pbox->y1 * SRCPitch) + (left >> 2);
+	dst = (CARD8*)pvgaHW->Base + (pbox->y1 * FBPitch) + (left >> 3);
 
-	if((phase = (long)dst & 3L)) {
+	if ((phase = (long)dst & 3L))
+	{
 	    phase = 4 - phase;
-	    if(phase > width) phase = width;
+	    if (phase > width) phase = width;
 	    width -= phase;
 	}
 
-        while(height--) {
+	while (height--)
+	{
 	    (*pvgaHW->writeSeq)(pvgaHW, 0x02, 1);
 	    dstPtr = dst;
 	    srcPtr = src;
 	    i = width;
 	    j = phase;
-	    while(j--) {
+	    while (j--)
+	    {
 		m = (srcPtr[1] & 0x01010101) | ((srcPtr[0] & 0x01010101) << 4);
- 		*dstPtr++ = (m >> 24) | (m >> 15) | (m >> 6) | (m << 3);
+		*dstPtr++ = (m >> 24) | (m >> 15) | (m >> 6) | (m << 3);
 		srcPtr += 2;
 	    }
-	    while(i >= 4) {
+	    while (i >= 4)
+	    {
 		m = (srcPtr[1] & 0x01010101) | ((srcPtr[0] & 0x01010101) << 4);
- 		s1 = (m >> 24) | (m >> 15) | (m >> 6) | (m << 3);
+		s1 = (m >> 24) | (m >> 15) | (m >> 6) | (m << 3);
 		m = (srcPtr[3] & 0x01010101) | ((srcPtr[2] & 0x01010101) << 4);
- 		s2 = (m >> 24) | (m >> 15) | (m >> 6) | (m << 3);
+		s2 = (m >> 24) | (m >> 15) | (m >> 6) | (m << 3);
 		m = (srcPtr[5] & 0x01010101) | ((srcPtr[4] & 0x01010101) << 4);
- 		s3 = (m >> 24) | (m >> 15) | (m >> 6) | (m << 3);
+		s3 = (m >> 24) | (m >> 15) | (m >> 6) | (m << 3);
 		m = (srcPtr[7] & 0x01010101) | ((srcPtr[6] & 0x01010101) << 4);
- 		s4 = (m >> 24) | (m >> 15) | (m >> 6) | (m << 3);
+		s4 = (m >> 24) | (m >> 15) | (m >> 6) | (m << 3);
 		*((CARD32*)dstPtr) = s1 | (s2 << 8) | (s3 << 16) | (s4 << 24);
 		srcPtr += 8;
 		dstPtr += 4;
 		i -= 4;
 	    }
-	    while(i--) {
+	    while (i--)
+	    {
 		m = (srcPtr[1] & 0x01010101) | ((srcPtr[0] & 0x01010101) << 4);
- 		*dstPtr++ = (m >> 24) | (m >> 15) | (m >> 6) | (m << 3);
+		*dstPtr++ = (m >> 24) | (m >> 15) | (m >> 6) | (m << 3);
 		srcPtr += 2;
 	    }
 
@@ -1010,28 +1058,31 @@ GenericRefreshArea4bpp(ScrnInfoPtr pScrn, int num, BoxPtr pbox)
 	    srcPtr = src;
 	    i = width;
 	    j = phase;
-	    while(j--) {
+	    while (j--)
+	    {
 		m = (srcPtr[1] & 0x02020202) | ((srcPtr[0] & 0x02020202) << 4);
- 		*dstPtr++ = (m >> 25) | (m >> 16) | (m >> 7) | (m << 2);
+		*dstPtr++ = (m >> 25) | (m >> 16) | (m >> 7) | (m << 2);
 		srcPtr += 2;
 	    }
-	    while(i >= 4) {
+	    while (i >= 4)
+	    {
 		m = (srcPtr[1] & 0x02020202) | ((srcPtr[0] & 0x02020202) << 4);
- 		s1 = (m >> 25) | (m >> 16) | (m >> 7) | (m << 2);
+		s1 = (m >> 25) | (m >> 16) | (m >> 7) | (m << 2);
 		m = (srcPtr[3] & 0x02020202) | ((srcPtr[2] & 0x02020202) << 4);
- 		s2 = (m >> 25) | (m >> 16) | (m >> 7) | (m << 2);
+		s2 = (m >> 25) | (m >> 16) | (m >> 7) | (m << 2);
 		m = (srcPtr[5] & 0x02020202) | ((srcPtr[4] & 0x02020202) << 4);
- 		s3 = (m >> 25) | (m >> 16) | (m >> 7) | (m << 2);
+		s3 = (m >> 25) | (m >> 16) | (m >> 7) | (m << 2);
 		m = (srcPtr[7] & 0x02020202) | ((srcPtr[6] & 0x02020202) << 4);
- 		s4 = (m >> 25) | (m >> 16) | (m >> 7) | (m << 2);
+		s4 = (m >> 25) | (m >> 16) | (m >> 7) | (m << 2);
 		*((CARD32*)dstPtr) = s1 | (s2 << 8) | (s3 << 16) | (s4 << 24);
 		srcPtr += 8;
 		dstPtr += 4;
 		i -= 4;
 	    }
-	    while(i--) {
+	    while (i--)
+	    {
 		m = (srcPtr[1] & 0x02020202) | ((srcPtr[0] & 0x02020202) << 4);
- 		*dstPtr++ = (m >> 25) | (m >> 16) | (m >> 7) | (m << 2);
+		*dstPtr++ = (m >> 25) | (m >> 16) | (m >> 7) | (m << 2);
 		srcPtr += 2;
 	    }
 
@@ -1040,71 +1091,77 @@ GenericRefreshArea4bpp(ScrnInfoPtr pScrn, int num, BoxPtr pbox)
 	    srcPtr = src;
 	    i = width;
 	    j = phase;
-	    while(j--) {
+	    while (j--)
+	    {
 		m = (srcPtr[1] & 0x04040404) | ((srcPtr[0] & 0x04040404) << 4);
- 		*dstPtr++ = (m >> 26) | (m >> 17) | (m >> 8) | (m << 1);
+		*dstPtr++ = (m >> 26) | (m >> 17) | (m >> 8) | (m << 1);
 		srcPtr += 2;
 	    }
-	    while(i >= 4) {
+	    while (i >= 4)
+	    {
 		m = (srcPtr[1] & 0x04040404) | ((srcPtr[0] & 0x04040404) << 4);
- 		s1 = (m >> 26) | (m >> 17) | (m >> 8) | (m << 1);
+		s1 = (m >> 26) | (m >> 17) | (m >> 8) | (m << 1);
 		m = (srcPtr[3] & 0x04040404) | ((srcPtr[2] & 0x04040404) << 4);
- 		s2 = (m >> 26) | (m >> 17) | (m >> 8) | (m << 1);
+		s2 = (m >> 26) | (m >> 17) | (m >> 8) | (m << 1);
 		m = (srcPtr[5] & 0x04040404) | ((srcPtr[4] & 0x04040404) << 4);
- 		s3 = (m >> 26) | (m >> 17) | (m >> 8) | (m << 1);
+		s3 = (m >> 26) | (m >> 17) | (m >> 8) | (m << 1);
 		m = (srcPtr[7] & 0x04040404) | ((srcPtr[6] & 0x04040404) << 4);
- 		s4 = (m >> 26) | (m >> 17) | (m >> 8) | (m << 1);
+		s4 = (m >> 26) | (m >> 17) | (m >> 8) | (m << 1);
 		*((CARD32*)dstPtr) = s1 | (s2 << 8) | (s3 << 16) | (s4 << 24);
 		srcPtr += 8;
 		dstPtr += 4;
 		i -= 4;
 	    }
-	    while(i--) {
+	    while (i--)
+	    {
 		m = (srcPtr[1] & 0x04040404) | ((srcPtr[0] & 0x04040404) << 4);
- 		*dstPtr++ = (m >> 26) | (m >> 17) | (m >> 8) | (m << 1);
+		*dstPtr++ = (m >> 26) | (m >> 17) | (m >> 8) | (m << 1);
 		srcPtr += 2;
 	    }
-	    
+
 	    (*pvgaHW->writeSeq)(pvgaHW, 0x02, 1 << 3);
 	    dstPtr = dst;
 	    srcPtr = src;
 	    i = width;
 	    j = phase;
-	    while(j--) {
+	    while (j--)
+	    {
 		m = (srcPtr[1] & 0x08080808) | ((srcPtr[0] & 0x08080808) << 4);
- 		*dstPtr++ = (m >> 27) | (m >> 18) | (m >> 9) | m;
+		*dstPtr++ = (m >> 27) | (m >> 18) | (m >> 9) | m;
 		srcPtr += 2;
 	    }
-	    while(i >= 4) {
+	    while (i >= 4)
+	    {
 		m = (srcPtr[1] & 0x08080808) | ((srcPtr[0] & 0x08080808) << 4);
- 		s1 = (m >> 27) | (m >> 18) | (m >> 9) | m;
+		s1 = (m >> 27) | (m >> 18) | (m >> 9) | m;
 		m = (srcPtr[3] & 0x08080808) | ((srcPtr[2] & 0x08080808) << 4);
- 		s2 = (m >> 27) | (m >> 18) | (m >> 9) | m;
+		s2 = (m >> 27) | (m >> 18) | (m >> 9) | m;
 		m = (srcPtr[5] & 0x08080808) | ((srcPtr[4] & 0x08080808) << 4);
- 		s3 = (m >> 27) | (m >> 18) | (m >> 9) | m;
+		s3 = (m >> 27) | (m >> 18) | (m >> 9) | m;
 		m = (srcPtr[7] & 0x08080808) | ((srcPtr[6] & 0x08080808) << 4);
- 		s4 = (m >> 27) | (m >> 18) | (m >> 9) | m;
+		s4 = (m >> 27) | (m >> 18) | (m >> 9) | m;
 		*((CARD32*)dstPtr) = s1 | (s2 << 8) | (s3 << 16) | (s4 << 24);
 		srcPtr += 8;
 		dstPtr += 4;
 		i -= 4;
 	    }
-	    while(i--) {
+	    while (i--)
+	    {
 		m = (srcPtr[1] & 0x08080808) | ((srcPtr[0] & 0x08080808) << 4);
- 		*dstPtr++ = (m >> 27) | (m >> 18) | (m >> 9) | m;
+		*dstPtr++ = (m >> 27) | (m >> 18) | (m >> 9) | m;
 		srcPtr += 2;
 	    }
 
-            dst += FBPitch;
-            src += SRCPitch;
-        }
-        
-        pbox++;
+	    dst += FBPitch;
+	    src += SRCPitch;
+	}
+
+	pbox++;
     }
 
-} 
+}
 
-#else 
+#else
 
 static void
 GenericRefreshArea4bpp(ScrnInfoPtr pScrn, int num, BoxPtr pbox)
@@ -1116,7 +1173,7 @@ GenericRefreshArea4bpp(ScrnInfoPtr pScrn, int num, BoxPtr pbox)
     CARD8  s1, s2, s3, s4;
     CARD32 *src, *srcPtr;
     int  dst, dstPtr;
-   
+
     FBPitch = pScrn->displayWidth >> 3;
     SRCPitch = pPriv->ShadowPitch >> 2;
 
@@ -1124,49 +1181,55 @@ GenericRefreshArea4bpp(ScrnInfoPtr pScrn, int num, BoxPtr pbox)
     (*pvgaHW->writeGr)(pvgaHW, 0x01, 0x00);
     (*pvgaHW->writeGr)(pvgaHW, 0x08, 0xFF);
 
-    while(num--) {
+    while (num--)
+    {
 	left = pbox->x1 & ~7;
-        width = ((pbox->x2 - left) + 7) >> 3;
-        height = pbox->y2 - pbox->y1;
-        src = (CARD32*)pPriv->ShadowPtr + (pbox->y1 * SRCPitch) + (left >> 2); 
-        dst = (pbox->y1 * FBPitch) + (left >> 3);
+	width = ((pbox->x2 - left) + 7) >> 3;
+	height = pbox->y2 - pbox->y1;
+	src = (CARD32*)pPriv->ShadowPtr + (pbox->y1 * SRCPitch) + (left >> 2);
+	dst = (pbox->y1 * FBPitch) + (left >> 3);
 
-	if((phase = (long)dst & 3L)) {
+	if ((phase = (long)dst & 3L))
+	{
 	    phase = 4 - phase;
-	    if(phase > width) phase = width;
+	    if (phase > width) phase = width;
 	    width -= phase;
 	}
 
-        while(height--) {
+	while (height--)
+	{
 	    (*pvgaHW->writeSeq)(pvgaHW, 0x02, 1);
 	    dstPtr = dst;
 	    srcPtr = src;
 	    i = width;
 	    j = phase;
-	    while(j--) {
+	    while (j--)
+	    {
 		m = (srcPtr[1] & 0x01010101) | ((srcPtr[0] & 0x01010101) << 4);
-		MMIO_OUT8((CARD8*)pvgaHW->Base,dstPtr++,
+		MMIO_OUT8((CARD8*)pvgaHW->Base, dstPtr++,
 			  (m >> 24) | (m >> 15) | (m >> 6) | (m << 3));
 		srcPtr += 2;
 	    }
-	    while(i >= 4) {
+	    while (i >= 4)
+	    {
 		m = (srcPtr[1] & 0x01010101) | ((srcPtr[0] & 0x01010101) << 4);
- 		s1 = (m >> 24) | (m >> 15) | (m >> 6) | (m << 3);
+		s1 = (m >> 24) | (m >> 15) | (m >> 6) | (m << 3);
 		m = (srcPtr[3] & 0x01010101) | ((srcPtr[2] & 0x01010101) << 4);
- 		s2 = (m >> 24) | (m >> 15) | (m >> 6) | (m << 3);
+		s2 = (m >> 24) | (m >> 15) | (m >> 6) | (m << 3);
 		m = (srcPtr[5] & 0x01010101) | ((srcPtr[4] & 0x01010101) << 4);
- 		s3 = (m >> 24) | (m >> 15) | (m >> 6) | (m << 3);
+		s3 = (m >> 24) | (m >> 15) | (m >> 6) | (m << 3);
 		m = (srcPtr[7] & 0x01010101) | ((srcPtr[6] & 0x01010101) << 4);
- 		s4 = (m >> 24) | (m >> 15) | (m >> 6) | (m << 3);
-		MMIO_OUT32((CARD32*)pvgaHW->Base,dstPtr,
+		s4 = (m >> 24) | (m >> 15) | (m >> 6) | (m << 3);
+		MMIO_OUT32((CARD32*)pvgaHW->Base, dstPtr,
 			   s1 | (s2 << 8) | (s3 << 16) | (s4 << 24));
 		srcPtr += 8;
 		dstPtr += 4;
 		i -= 4;
 	    }
-	    while(i--) {
+	    while (i--)
+	    {
 		m = (srcPtr[1] & 0x01010101) | ((srcPtr[0] & 0x01010101) << 4);
-		MMIO_OUT8((CARD8*)pvgaHW->Base,dstPtr++,
+		MMIO_OUT8((CARD8*)pvgaHW->Base, dstPtr++,
 			  (m >> 24) | (m >> 15) | (m >> 6) | (m << 3));
 		srcPtr += 2;
 	    }
@@ -1176,30 +1239,33 @@ GenericRefreshArea4bpp(ScrnInfoPtr pScrn, int num, BoxPtr pbox)
 	    srcPtr = src;
 	    i = width;
 	    j = phase;
-	    while(j--) {
+	    while (j--)
+	    {
 		m = (srcPtr[1] & 0x02020202) | ((srcPtr[0] & 0x02020202) << 4);
-		MMIO_OUT8((CARD8*)pvgaHW->Base,dstPtr++,
+		MMIO_OUT8((CARD8*)pvgaHW->Base, dstPtr++,
 			  (m >> 25) | (m >> 16) | (m >> 7) | (m << 2));
 		srcPtr += 2;
 	    }
-	    while(i >= 4) {
+	    while (i >= 4)
+	    {
 		m = (srcPtr[1] & 0x02020202) | ((srcPtr[0] & 0x02020202) << 4);
- 		s1 = (m >> 25) | (m >> 16) | (m >> 7) | (m << 2);
+		s1 = (m >> 25) | (m >> 16) | (m >> 7) | (m << 2);
 		m = (srcPtr[3] & 0x02020202) | ((srcPtr[2] & 0x02020202) << 4);
- 		s2 = (m >> 25) | (m >> 16) | (m >> 7) | (m << 2);
+		s2 = (m >> 25) | (m >> 16) | (m >> 7) | (m << 2);
 		m = (srcPtr[5] & 0x02020202) | ((srcPtr[4] & 0x02020202) << 4);
- 		s3 = (m >> 25) | (m >> 16) | (m >> 7) | (m << 2);
+		s3 = (m >> 25) | (m >> 16) | (m >> 7) | (m << 2);
 		m = (srcPtr[7] & 0x02020202) | ((srcPtr[6] & 0x02020202) << 4);
- 		s4 = (m >> 25) | (m >> 16) | (m >> 7) | (m << 2);
-		MMIO_OUT32((CARD32*)pvgaHW->Base,dstPtr,
+		s4 = (m >> 25) | (m >> 16) | (m >> 7) | (m << 2);
+		MMIO_OUT32((CARD32*)pvgaHW->Base, dstPtr,
 			   s1 | (s2 << 8) | (s3 << 16) | (s4 << 24));
 		srcPtr += 8;
 		dstPtr += 4;
 		i -= 4;
 	    }
-	    while(i--) {
+	    while (i--)
+	    {
 		m = (srcPtr[1] & 0x02020202) | ((srcPtr[0] & 0x02020202) << 4);
-		MMIO_OUT8((CARD8*)pvgaHW->Base,dstPtr++,
+		MMIO_OUT8((CARD8*)pvgaHW->Base, dstPtr++,
 			  (m >> 25) | (m >> 16) | (m >> 7) | (m << 2));
 		srcPtr += 2;
 	    }
@@ -1209,75 +1275,80 @@ GenericRefreshArea4bpp(ScrnInfoPtr pScrn, int num, BoxPtr pbox)
 	    srcPtr = src;
 	    i = width;
 	    j = phase;
-	    while(j--) {
+	    while (j--)
+	    {
 		m = (srcPtr[1] & 0x04040404) | ((srcPtr[0] & 0x04040404) << 4);
-		MMIO_OUT8((CARD8*)pvgaHW->Base,dstPtr++,
+		MMIO_OUT8((CARD8*)pvgaHW->Base, dstPtr++,
 			  (m >> 26) | (m >> 17) | (m >> 8) | (m << 1));
 		srcPtr += 2;
 	    }
-	    while(i >= 4) {
+	    while (i >= 4)
+	    {
 		m = (srcPtr[1] & 0x04040404) | ((srcPtr[0] & 0x04040404) << 4);
- 		s1 = (m >> 26) | (m >> 17) | (m >> 8) | (m << 1);
+		s1 = (m >> 26) | (m >> 17) | (m >> 8) | (m << 1);
 		m = (srcPtr[3] & 0x04040404) | ((srcPtr[2] & 0x04040404) << 4);
- 		s2 = (m >> 26) | (m >> 17) | (m >> 8) | (m << 1);
+		s2 = (m >> 26) | (m >> 17) | (m >> 8) | (m << 1);
 		m = (srcPtr[5] & 0x04040404) | ((srcPtr[4] & 0x04040404) << 4);
- 		s3 = (m >> 26) | (m >> 17) | (m >> 8) | (m << 1);
+		s3 = (m >> 26) | (m >> 17) | (m >> 8) | (m << 1);
 		m = (srcPtr[7] & 0x04040404) | ((srcPtr[6] & 0x04040404) << 4);
- 		s4 = (m >> 26) | (m >> 17) | (m >> 8) | (m << 1);
-		MMIO_OUT32((CARD32*)pvgaHW->Base,dstPtr,
+		s4 = (m >> 26) | (m >> 17) | (m >> 8) | (m << 1);
+		MMIO_OUT32((CARD32*)pvgaHW->Base, dstPtr,
 			   s1 | (s2 << 8) | (s3 << 16) | (s4 << 24));
 		srcPtr += 8;
 		dstPtr += 4;
 		i -= 4;
 	    }
-	    while(i--) {
+	    while (i--)
+	    {
 		m = (srcPtr[1] & 0x04040404) | ((srcPtr[0] & 0x04040404) << 4);
-		MMIO_OUT8((CARD8*)pvgaHW->Base,dstPtr++,
+		MMIO_OUT8((CARD8*)pvgaHW->Base, dstPtr++,
 			  (m >> 26) | (m >> 17) | (m >> 8) | (m << 1));
 		srcPtr += 2;
 	    }
-	    
+
 	    (*pvgaHW->writeSeq)(pvgaHW, 0x02, 1 << 3);
 	    dstPtr = dst;
 	    srcPtr = src;
 	    i = width;
 	    j = phase;
-	    while(j--) {
+	    while (j--)
+	    {
 		m = (srcPtr[1] & 0x08080808) | ((srcPtr[0] & 0x08080808) << 4);
-		MMIO_OUT8((CARD8*)pvgaHW->Base,dstPtr++,
+		MMIO_OUT8((CARD8*)pvgaHW->Base, dstPtr++,
 			  (m >> 27) | (m >> 18) | (m >> 9) | m);
 		srcPtr += 2;
 	    }
-	    while(i >= 4) {
+	    while (i >= 4)
+	    {
 		m = (srcPtr[1] & 0x08080808) | ((srcPtr[0] & 0x08080808) << 4);
- 		s1 = (m >> 27) | (m >> 18) | (m >> 9) | m;
+		s1 = (m >> 27) | (m >> 18) | (m >> 9) | m;
 		m = (srcPtr[3] & 0x08080808) | ((srcPtr[2] & 0x08080808) << 4);
- 		s2 = (m >> 27) | (m >> 18) | (m >> 9) | m;
+		s2 = (m >> 27) | (m >> 18) | (m >> 9) | m;
 		m = (srcPtr[5] & 0x08080808) | ((srcPtr[4] & 0x08080808) << 4);
- 		s3 = (m >> 27) | (m >> 18) | (m >> 9) | m;
+		s3 = (m >> 27) | (m >> 18) | (m >> 9) | m;
 		m = (srcPtr[7] & 0x08080808) | ((srcPtr[6] & 0x08080808) << 4);
- 		s4 = (m >> 27) | (m >> 18) | (m >> 9) | m;
-		MMIO_OUT32((CARD32*)pvgaHW->Base,dstPtr,
+		s4 = (m >> 27) | (m >> 18) | (m >> 9) | m;
+		MMIO_OUT32((CARD32*)pvgaHW->Base, dstPtr,
 			   s1 | (s2 << 8) | (s3 << 16) | (s4 << 24));
 		srcPtr += 8;
 		dstPtr += 4;
 		i -= 4;
 	    }
-	    while(i--) {
+	    while (i--)
+	    {
 		m = (srcPtr[1] & 0x08080808) | ((srcPtr[0] & 0x08080808) << 4);
-		MMIO_OUT8((CARD8*)pvgaHW->Base,dstPtr++,
+		MMIO_OUT8((CARD8*)pvgaHW->Base, dstPtr++,
 			  (m >> 27) | (m >> 18) | (m >> 9) | m);
 		srcPtr += 2;
 	    }
 
-            dst += FBPitch;
-            src += SRCPitch;
-        }
-        
-        pbox++;
-    }
+	    dst += FBPitch;
+	    src += SRCPitch;
+	}
 
-} 
+	pbox++;
+    }
+}
 
 #endif /* SPECIAL_FB_BYTE_ACCESS */
 
@@ -1295,17 +1366,19 @@ GenericScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
 
     /* Map VGA aperture */
 #ifdef SPECIAL_FB_BYTE_ACCESS
-    if (pGenericPriv->ShadowFB && (pScreenInfo->depth == 4)) {
+    if (pGenericPriv->ShadowFB && (pScreenInfo->depth == 4))
+    {
 	if (!GenericMapMem(pScreenInfo))
 	    return FALSE;
-    } else 
+    }
+    else
 #endif
     if (!vgaHWMapMem(pScreenInfo))
 	return FALSE;
 
     /* Initialise graphics mode */
     if (!GenericEnterGraphics(pScreen, pScreenInfo))
-        return FALSE;
+	return FALSE;
 
     /* Get vgahw private */
     pvgaHW = VGAHWPTR(pScreenInfo);
@@ -1322,16 +1395,17 @@ GenericScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
     /* Initialise the framebuffer */
     switch (pScreenInfo->depth)
     {
-        case 1:
-	    if (pGenericPriv->ShadowFB) {
-		pGenericPriv->ShadowPitch = 
-				((pScreenInfo->virtualX + 31) >> 3) & ~3L;
-		pGenericPriv->ShadowPtr = xalloc(pGenericPriv->ShadowPitch *
-						 pScreenInfo->virtualY);
-		if(pGenericPriv->ShadowPtr == NULL)
+	case 1:
+	    if (pGenericPriv->ShadowFB)
+	    {
+		pGenericPriv->ShadowPitch =
+		    ((pScreenInfo->virtualX + 31) >> 3) & ~3L;
+		pGenericPriv->ShadowPtr =
+		    xalloc(pGenericPriv->ShadowPitch * pScreenInfo->virtualY);
+		if (pGenericPriv->ShadowPtr == NULL)
 		    return FALSE;
 		Inited = fbScreenInit(pScreen, pGenericPriv->ShadowPtr,
-				      pScreenInfo->virtualX, 
+				      pScreenInfo->virtualX,
 				      pScreenInfo->virtualY,
 				      pScreenInfo->xDpi, pScreenInfo->yDpi,
 				      pScreenInfo->displayWidth,
@@ -1342,25 +1416,28 @@ GenericScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
 		fbPictureInit (pScreen, 0, 0);
 #endif
 		ShadowFBInit(pScreen, GenericRefreshArea1bpp);
-	    } else {
+	    }
+	    else
+	    {
 		Inited = xf1bppScreenInit(pScreen, pvgaHW->Base,
-					  pScreenInfo->virtualX, 
+					  pScreenInfo->virtualX,
 					  pScreenInfo->virtualY,
 					  pScreenInfo->xDpi, pScreenInfo->yDpi,
 					  pScreenInfo->displayWidth);
 	    }
-            break;
-        case 4:
-	    if (pGenericPriv->ShadowFB) {
-		/* in order to use ShadowFB we do depth 4 / bpp 8 */
+	    break;
+	case 4:
+	    if (pGenericPriv->ShadowFB)
+	    {
+		/* In order to use ShadowFB we do depth 4 / bpp 8 */
 		pScreenInfo->bitsPerPixel = 8;
 		pGenericPriv->ShadowPitch = (pScreenInfo->virtualX + 3) & ~3L;
-		pGenericPriv->ShadowPtr = xalloc(pGenericPriv->ShadowPitch *
-						 pScreenInfo->virtualY);
-		if(pGenericPriv->ShadowPtr == NULL)
+		pGenericPriv->ShadowPtr =
+		    xalloc(pGenericPriv->ShadowPitch * pScreenInfo->virtualY);
+		if (pGenericPriv->ShadowPtr == NULL)
 		    return FALSE;
 		Inited = fbScreenInit(pScreen, pGenericPriv->ShadowPtr,
-				      pScreenInfo->virtualX, 
+				      pScreenInfo->virtualX,
 				      pScreenInfo->virtualY,
 				      pScreenInfo->xDpi, pScreenInfo->yDpi,
 				      pScreenInfo->displayWidth,
@@ -1371,16 +1448,18 @@ GenericScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
 		fbPictureInit (pScreen, 0, 0);
 #endif
 		ShadowFBInit(pScreen, GenericRefreshArea4bpp);
-	    } else {
+	    }
+	    else
+	    {
 		Inited = xf4bppScreenInit(pScreen, pvgaHW->Base,
-					  pScreenInfo->virtualX, 
+					  pScreenInfo->virtualX,
 					  pScreenInfo->virtualY,
 					  pScreenInfo->xDpi, pScreenInfo->yDpi,
 					  pScreenInfo->displayWidth);
 	    }
-            break;
-        case 8:
-            Inited = fbScreenInit(pScreen, pvgaHW->Base,
+	    break;
+	case 8:
+	    Inited = fbScreenInit(pScreen, pvgaHW->Base,
 				  pScreenInfo->virtualX, pScreenInfo->virtualY,
 				  pScreenInfo->xDpi, pScreenInfo->yDpi,
 				  pScreenInfo->displayWidth,
@@ -1388,16 +1467,16 @@ GenericScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
 #ifdef RENDER
 	    fbPictureInit (pScreen, 0, 0);
 #endif
-            break;
+	    break;
 	default:
-	    xf86DrvMsg(pScreenInfo->scrnIndex,X_ERROR,
+	    xf86DrvMsg(pScreenInfo->scrnIndex, X_ERROR,
 		       "Depth %i not supported by this driver\n",
 		       pScreenInfo->depth);
 	    break;
     }
 
     if (!Inited)
-        return FALSE;
+	return FALSE;
 
     miInitializeBackingStore(pScreen);
 
@@ -1411,7 +1490,7 @@ GenericScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
 
     /* Try the new code based on the new colormap layer */
     if (pScreenInfo->depth > 1)
-        vgaHWHandleColormaps(pScreen);
+	vgaHWHandleColormaps(pScreen);
 
     xf86DPMSInit(pScreen, GenericDPMSSet, 0);
 
@@ -1421,7 +1500,7 @@ GenericScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
     pScreen->SaveScreen = GenericSaveScreen;
 
     if (!Inited)
-        GenericCloseScreen(scrnIndex, pScreen);
+	GenericCloseScreen(scrnIndex, pScreen);
 
     pScreenInfo->racIoFlags = RAC_COLORMAP | RAC_VIEWPORT;
     if (pScreenInfo->depth < 8)
@@ -1445,13 +1524,13 @@ static void
 GenericAdjustFrame(int scrnIndex, int x, int y, int flags)
 {
 #   ifndef PC98_EGC
-        ScrnInfoPtr pScreenInfo = xf86Screens[scrnIndex];
-        vgaHWPtr pvgaHW = VGAHWPTR(pScreenInfo);
-        int Base = (y * pScreenInfo->displayWidth + x) >> 3;
+	ScrnInfoPtr pScreenInfo = xf86Screens[scrnIndex];
+	vgaHWPtr pvgaHW = VGAHWPTR(pScreenInfo);
+	int Base = (y * pScreenInfo->displayWidth + x) >> 3;
 
-        outw(pvgaHW->PIOOffset + pvgaHW->IOBase + 4,
+	outw(pvgaHW->PIOOffset + pvgaHW->IOBase + 4,
 	     (Base & 0x00FF00) | 0x0C);
-        outw(pvgaHW->PIOOffset + pvgaHW->IOBase + 4,
+	outw(pvgaHW->PIOOffset + pvgaHW->IOBase + 4,
 	     ((Base & 0x0000FF) << 8) | 0x0D);
 #   endif
 }
@@ -1482,7 +1561,7 @@ static int
 GenericValidMode(int scrnIndex, DisplayModePtr pMode, Bool Verbose, int flags)
 {
     if (pMode->Flags & V_INTERLACE)
-        return MODE_NO_INTERLACE;
+	return MODE_NO_INTERLACE;
 
     return MODE_OK;
 }
@@ -1494,7 +1573,7 @@ GenericMapMem(ScrnInfoPtr scrp)
 {
     vgaHWPtr hwp = VGAHWPTR(scrp);
     int scr_index = scrp->scrnIndex;
-    
+
     if (hwp->Base)
 	return TRUE;
 
@@ -1504,9 +1583,8 @@ GenericMapMem(ScrnInfoPtr scrp)
     if (hwp->MapPhys == 0)
 	hwp->MapPhys = VGA_DEFAULT_PHYS_ADDR;
 
-    hwp->Base = xf86MapDomainMemory(scr_index, VIDMEM_MMIO,
-				      hwp->Tag,
-				      hwp->MapPhys, hwp->MapSize);
+    hwp->Base = xf86MapDomainMemory(scr_index, VIDMEM_MMIO, hwp->Tag,
+				    hwp->MapPhys, hwp->MapSize);
     return hwp->Base != NULL;
 }
 
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/vmware/Imakefile b/xc/programs/Xserver/hw/xfree86/drivers/vmware/Imakefile
index b8b212ddc..2310a0c56 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/vmware/Imakefile
+++ b/xc/programs/Xserver/hw/xfree86/drivers/vmware/Imakefile
@@ -1,4 +1,4 @@
-XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/drivers/vmware/Imakefile,v 1.4 2002/10/16 22:12:53 alanh Exp $
+XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/drivers/vmware/Imakefile,v 1.6 2003/02/17 17:06:45 dawes Exp $
 XCOMM
 XCOMM This is an Imakefile for the VMware virtual SVGA driver.  
 XCOMM
@@ -6,9 +6,9 @@ XCOMM
 #define IHaveModules
 #include <Server.tmpl>
 
-SRCS = vmware.c vmwarecurs.c vmwarexaa.c bits2pixels.c
+SRCS = vmware.c vmwarecurs.c vmwarexaa.c bits2pixels.c offscreen_manager.c
 
-OBJS = vmware.o vmwarecurs.o vmwarexaa.o bits2pixels.o
+OBJS = vmware.o vmwarecurs.o vmwarexaa.o bits2pixels.o offscreen_manager.o
 
 #if defined(XF86DriverSDK)
 INCLUDES = -I. -I../../include
@@ -21,7 +21,7 @@ INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86OSSRC) \
            -I$(SERVERSRC)/Xext -I$(SERVERSRC)/render \
            -I$(FONTINCSRC) -I$(SERVERSRC)/include -I$(XINCLUDESRC) \
            -I$(XF86SRC)/shadowfb -I$(EXTINCSRC) \
-	   -I$(XF86OSSRC)/vbe $(DRIINCLUDES)
+	   -I$(XF86SRC)/vbe $(DRIINCLUDES)
 #endif
 
 DEFINES = $(DRIDEFINES)
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/vmware/bits2pixels.c b/xc/programs/Xserver/hw/xfree86/drivers/vmware/bits2pixels.c
index 9b73e86db..416a1a767 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/vmware/bits2pixels.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/vmware/bits2pixels.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/vmware/bits2pixels.c,v 1.1 2001/04/05 19:29:43 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/vmware/bits2pixels.c,v 1.2 2002/12/11 17:07:58 dawes Exp $ */
 /* **********************************************************
  * Copyright (C) 1999-2001 VMware, Inc.
  * All Rights Reserved
@@ -23,19 +23,19 @@ char rcsId_bits2pixels[] = "Id: bits2pixels.c,v 1.6 2001/01/26 23:32:15 yoel Exp
  *  Local functions
  */
 
-void RasterBitsToPixels8(uint8 *bits, uint32 bits_increment,
+static void RasterBitsToPixels8(uint8 *bits, uint32 bits_increment,
 			 uint8 *pix, uint32 pix_increment,
 			 uint32 width, uint32 height, uint32 fg, uint32 bg);
 
-void RasterBitsToPixels16(uint8 *bits, uint32 bits_increment,
+static void RasterBitsToPixels16(uint8 *bits, uint32 bits_increment,
 			  uint8 *pix, uint32 pix_increment,
 			  uint32 width, uint32 height, uint32 fg, uint32 bg);
 
-void RasterBitsToPixels24(uint8 *bits, uint32 bits_increment,
+static void RasterBitsToPixels24(uint8 *bits, uint32 bits_increment,
 			  uint8 *pix, uint32 pix_increment,
 			  uint32 width, uint32 height, uint32 fg, uint32 bg);
 
-void RasterBitsToPixels32(uint8 *bits, uint32 bits_increment,
+static void RasterBitsToPixels32(uint8 *bits, uint32 bits_increment,
 			  uint8 *pix, uint32 pix_increment,
 			  uint32 width, uint32 height, uint32 fg, uint32 bg);
 
@@ -43,7 +43,7 @@ void RasterBitsToPixels32(uint8 *bits, uint32 bits_increment,
 /*
  *----------------------------------------------------------------------
  *
- * Raster_BitsToPixels --
+ * vmwareRaster_BitsToPixels --
  *
  *	Convert a bitmap to a pixmap, converting 1 bits to the foreground
  *      color (fg) and 0 bits to the background color (bg).
@@ -58,7 +58,7 @@ void RasterBitsToPixels32(uint8 *bits, uint32 bits_increment,
  */
 
 void
-Raster_BitsToPixels(uint8 *bits, uint32 bits_increment,
+vmwareRaster_BitsToPixels(uint8 *bits, uint32 bits_increment,
 		    uint8 *pix, uint32 pix_increment, int bytes_per_pixel,
 		    uint32 width, uint32 height, uint32 fg, uint32 bg)
 {
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/vmware/bits2pixels.h b/xc/programs/Xserver/hw/xfree86/drivers/vmware/bits2pixels.h
index 348d0c05c..585f6fc9d 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/vmware/bits2pixels.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/vmware/bits2pixels.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/vmware/bits2pixels.h,v 1.1 2001/04/05 19:29:44 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/vmware/bits2pixels.h,v 1.2 2002/12/11 17:07:58 dawes Exp $ */
 /* **********************************************************
  * Copyright (C) 1999-2001 VMware, Inc.
  * All Rights Reserved
@@ -18,8 +18,8 @@
 #include "includeCheck.h"
 
 void
-Raster_BitsToPixels(uint8 *bits, uint32 bits_increment,
-		    uint8 *pix, uint32 pix_increment, int bytes_per_pixel,
-		    uint32 width, uint32 height, uint32 fg, uint32 bg);
+vmwareRaster_BitsToPixels(uint8 *bits, uint32 bits_increment,
+			  uint8 *pix, uint32 pix_increment, int bytes_per_pixel,
+			  uint32 width, uint32 height, uint32 fg, uint32 bg);
 
 #endif /* _BITS4PIXELS_H_ */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/vmware/offscreen_manager.c b/xc/programs/Xserver/hw/xfree86/drivers/vmware/offscreen_manager.c
new file mode 100644
index 000000000..68c8632aa
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/vmware/offscreen_manager.c
@@ -0,0 +1,132 @@
+/* **********************************************************
+ * Copyright (C) 1998-2002 VMware, Inc.
+ * All Rights Reserved
+ * **********************************************************/
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/vmware/offscreen_manager.c,v 1.2 2002/12/11 17:07:58 dawes Exp $ */
+
+#include "vmware.h"
+
+struct _Heap {
+    CARD8* ptr;
+    CARD32 size;
+    CARD32 maxSlots;
+    CARD32 startOffset;
+    SVGASurface* frontBuffer;
+    SVGASurface* slotsStart;
+    Bool clear;
+};
+
+static SVGASurface* FillInSurface(Heap* heap, SVGASurface* surface,
+                                  CARD32 width, CARD32 height,
+                                  CARD32 bpp, CARD32 pitch, CARD32 size,
+                                  CARD32 sizeUsed);
+
+Heap*
+vmwareHeap_Create(CARD8* ptr, CARD32 size, CARD32 maxSlots, CARD32 startOffset,
+            CARD32 sWidth, CARD32 sHeight, CARD32 sBPP, CARD32 sPitch,
+            CARD32 sFbOffset)
+{
+    Heap* newHeap = malloc(sizeof (Heap));
+
+    newHeap->ptr = ptr;
+    newHeap->size = size - sizeof(SVGASurface); /* leave room for frontbuffer */
+    newHeap->maxSlots = maxSlots;
+    newHeap->startOffset = startOffset;
+
+    newHeap->frontBuffer = FillInSurface(newHeap,
+                                         (SVGASurface*)(ptr + newHeap->size),
+                                         sWidth, sHeight, sBPP, sPitch,
+                                         sHeight * sPitch, 0);
+    newHeap->frontBuffer->dataOffset = sFbOffset;
+    newHeap->frontBuffer->numQueued = newHeap->frontBuffer->numDequeued = 0;
+
+    newHeap->slotsStart = (SVGASurface*)(newHeap->ptr + newHeap->size) - 
+                                          newHeap->maxSlots;
+    newHeap->clear = FALSE;
+    vmwareHeap_Clear(newHeap);
+
+    return newHeap;
+}
+
+void
+vmwareHeap_Destroy(Heap* heap)
+{
+    free(heap);
+}
+
+void
+vmwareHeap_Clear(Heap* heap)
+{
+    if (!heap->clear) {
+        memset(heap->slotsStart, 0, heap->maxSlots * sizeof (SVGASurface));
+        heap->clear = TRUE;
+    }
+}
+
+static SVGASurface*
+FillInSurface(Heap* heap, SVGASurface* surface, CARD32 width, CARD32 height,
+              CARD32 bpp, CARD32 pitch, CARD32 size, CARD32 offset)
+{
+    surface->size = sizeof (SVGASurface);
+    surface->version = SVGA_SURFACE_VERSION_1;
+    surface->bpp = bpp;
+    surface->width = width;
+    surface->height = height;
+    surface->pitch = pitch;
+    if (surface->userData == 0) {
+        /*
+         * We allocate exactly what we need the first time we use a slot, so
+         * all reuses of this slot will be equal or smaller.
+         */
+        surface->userData = size;
+    }
+    surface->dataOffset = offset + heap->startOffset;
+
+    return surface;
+}
+
+SVGASurface*
+vmwareHeap_GetFrontBuffer(Heap* heap)
+{
+   return heap->frontBuffer;
+}
+
+SVGASurface*
+vmwareHeap_AllocSurface(Heap* heap, CARD32 width, CARD32 height,
+                  CARD32 pitch, CARD32 bpp)
+{
+    CARD32 size = pitch * height;
+    CARD32 sizeUsed = 0;
+    SVGASurface* surface = heap->slotsStart;
+    int i;
+
+    /*
+     * NOTE: we use SVGASurface::userData to store the largest this slot's
+     * size has ever been, since we don't ever compact anything.
+     */
+
+    /* find a free slot that's big enough */
+    for (i = 0; i < heap->maxSlots; i++) {
+        if (surface[i].userData == 0) { /* this surface has never been used */
+            if ((CARD8*)heap->slotsStart - heap->ptr - sizeUsed < size) {
+                /* no room left for data*/
+                return NULL;
+            }
+
+            heap->clear = FALSE;
+            return FillInSurface(heap, surface + i, width, height, bpp,
+                                 pitch, size, sizeUsed);
+        }
+
+        if (surface[i].numQueued == surface[i].numDequeued &&
+            surface[i].userData >= size) { /* free and big enough, sweet! */
+            heap->clear = FALSE;
+            return FillInSurface(heap, surface + i, width, height, bpp,
+                                 pitch, size, sizeUsed);
+        }
+
+        sizeUsed += surface[i].userData;
+    }
+
+    return NULL;   
+}
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/vmware/offscreen_manager.h b/xc/programs/Xserver/hw/xfree86/drivers/vmware/offscreen_manager.h
new file mode 100644
index 000000000..e948da9d2
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/vmware/offscreen_manager.h
@@ -0,0 +1,25 @@
+/* **********************************************************
+ * Copyright (C) 1998-2002 VMware, Inc.
+ * All Rights Reserved
+ * **********************************************************/
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/vmware/offscreen_manager.h,v 1.2 2002/12/11 17:07:58 dawes Exp $ */
+
+#ifndef OFFSCREEN_MANAGER_H
+#define OFFSCREEN_MANAGER_H
+
+struct _Heap;
+typedef struct _Heap Heap;
+
+extern Heap* vmwareHeap_Create(CARD8* ptr, CARD32 size, CARD32 maxSlots,
+                         CARD32 startOffset, CARD32 sWidth, CARD32 sHeight,
+                         CARD32 sBPP, CARD32 sPitch, CARD32 sFbOffset);
+extern void vmwareHeap_Destroy(Heap* heap);
+
+extern void vmwareHeap_Clear(Heap* heap);
+
+extern SVGASurface* vmwareHeap_GetFrontBuffer(Heap* heap);
+
+extern SVGASurface* vmwareHeap_AllocSurface(Heap* heap, CARD32 width, CARD32 height,
+                                      CARD32 pitch, CARD32 bpp);
+
+#endif
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/vmware/svga_reg.h b/xc/programs/Xserver/hw/xfree86/drivers/vmware/svga_reg.h
index e7235f747..59d635751 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/vmware/svga_reg.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/vmware/svga_reg.h
@@ -1,7 +1,7 @@
 /* **********************************************************
  * Copyright (C) 1998-2001 VMware, Inc.
  * All Rights Reserved
- * $Id: svga_reg.h,v 1.1.1.4 2002/10/22 13:41:06 alanh Exp $
+ * $Id: svga_reg.h,v 1.4.4.1 2003/03/30 04:52:31 ldelgass Exp $
  * **********************************************************/
 
 /*
@@ -9,6 +9,7 @@
  *
  * SVGA hardware definitions
  */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/vmware/svga_reg.h,v 1.8 2003/02/04 01:39:53 dawes Exp $ */
 
 #ifndef _SVGA_REG_H_
 #define _SVGA_REG_H_
@@ -31,10 +32,7 @@
 #define SVGA_MAX_HEIGHT			1770
 #define SVGA_MAX_BITS_PER_PIXEL		32
 
-#ifndef PAGE_SHIFT
 #define PAGE_SHIFT 12
-#endif
-
 #define SVGA_FB_MAX_SIZE \
    ((((SVGA_MAX_WIDTH * SVGA_MAX_HEIGHT *                                    \
        SVGA_MAX_BITS_PER_PIXEL / 8) >> PAGE_SHIFT) + 1) << PAGE_SHIFT)
@@ -143,6 +141,7 @@ enum {
 #define SVGA_CAP_GLYPH              0x0400
 #define SVGA_CAP_GLYPH_CLIPPING     0x0800
 #define SVGA_CAP_OFFSCREEN_1        0x1000
+#define SVGA_CAP_ALPHA_BLEND        0x2000
 
 
 /*
@@ -172,6 +171,71 @@ enum {
 #define SVGA_IS_VALID_ROP(rop)  (rop >= 0 && rop < SVGA_NUM_SUPPORTED_ROPS)
 
 /*
+ *  Ops
+ *  For each pixel, the four channels of the image are computed with: 
+ *
+ *	C = Ca * Fa + Cb * Fb
+ *
+ *  where C, Ca, Cb are the values of the respective channels and Fa 
+ *  and Fb come from the following table: 
+ *
+ *	BlendOp		Fa			Fb
+ *	------------------------------------------
+ *	Clear		0			0
+ *	Src		1			0
+ *	Dst		0			1
+ *	Over		1			1-Aa
+ *	OverReverse	1-Ab			1
+ *	In		Ab			0
+ *	InReverse	0			Aa
+ *	Out		1-Ab			0
+ *	OutReverse	0			1-Aa
+ *	Atop		Ab			1-Aa
+ *	AtopReverse	1-Ab			Aa
+ *	Xor		1-Ab			1-Aa
+ *	Add		1			1
+ *	Saturate	min(1,(1-Ab)/Aa)	1
+ *
+ *  Flags
+ *  You can use the following flags to achieve additional affects:
+ * 
+ *      Flag                    Effect
+ *	------------------------------------------
+ *      ConstantSourceAlpha     Ca = Ca * Param0
+ *      ConstantDestAlpha       Cb = Cb * Param1
+ *
+ *  Flag effects resolve before the op.  For example
+ *  BlendOp == Add && Flags == ConstantSourceAlpha |
+ *  ConstantDestAlpha results in:
+ *
+ *       C = (Ca * Param0) + (Cb * Param1)
+ */
+
+#define SVGA_BLENDOP_CLEAR                      0
+#define SVGA_BLENDOP_SRC                        1
+#define SVGA_BLENDOP_DST                        2
+#define SVGA_BLENDOP_OVER                       3
+#define SVGA_BLENDOP_OVER_REVERSE               4
+#define SVGA_BLENDOP_IN                         5
+#define SVGA_BLENDOP_IN_REVERSE                 6
+#define SVGA_BLENDOP_OUT                        7
+#define SVGA_BLENDOP_OUT_REVERSE                8
+#define SVGA_BLENDOP_ATOP                       9 
+#define SVGA_BLENDOP_ATOP_REVERSE               10
+#define SVGA_BLENDOP_XOR                        11
+#define SVGA_BLENDOP_ADD                        12
+#define SVGA_BLENDOP_SATURATE                   13
+
+#define SVGA_NUM_BLENDOPS                       14
+#define SVGA_IS_VALID_BLENDOP(op)               (op >= 0 && op < SVGA_NUM_BLENDOPS)
+
+#define SVGA_BLENDFLAG_CONSTANT_SOURCE_ALPHA    0x01
+#define SVGA_BLENDFLAG_CONSTANT_DEST_ALPHA      0x02
+#define SVGA_NUM_BLENDFLAGS                     2
+#define SVGA_BLENDFLAG_ALL                      (MASK(SVGA_NUM_BLENDFLAGS))
+#define SVGA_IS_VALID_BLENDFLAG(flag)           ((flag & ~SVGA_BLENDFLAG_ALL) == 0)
+
+/*
  *  Memory area offsets (viewed as an array of 32-bit words)
  */
 
@@ -205,12 +269,27 @@ enum {
 #define SVGA_GLYPH_SCANLINE_SIZE(w) (((w) + 7) >> 3)
 
 /*
+ * Get the width and height of VRAM in the current mode (for offscreen memory)
+ */
+#define SVGA_VRAM_WIDTH_HEIGHT(width /* out */, height /* out */) { \
+   uint32 pitch = svga->reg[SVGA_REG_BYTES_PER_LINE]; \
+   width = (pitch * 8) / ((svga->reg[SVGA_REG_BITS_PER_PIXEL] + 7) & ~7); \
+   height = (svga->reg[SVGA_REG_VRAM_SIZE] - \
+                    svga->reg[SVGA_REG_FB_OFFSET]) / pitch; \
+}
+
+/*
  *  Increment from one scanline to the next of a bitmap or pixmap
  */
 #define SVGA_BITMAP_INCREMENT(w) ((( (w)+31 ) >> 5) * sizeof (uint32))
 #define SVGA_PIXMAP_INCREMENT(w,bpp) ((( ((w)*(bpp))+31 ) >> 5) * sizeof (uint32))
 
 /*
+ *  Transparent color for DRAW_GLYPH_CLIPPED
+ */
+#define SVGA_COLOR_TRANSPARENT (~0)
+
+/*
  *  Commands in the command FIFO
  */
 
@@ -317,7 +396,8 @@ enum {
 
 #define SVGA_CMD_DRAW_GLYPH_CLIPPED       24
 	/* FIFO layout:
-	   X, Y, W, H, FGCOLOR, <cliprect>, <stencil buffer> */
+	   X, Y, W, H, FGCOLOR, BGCOLOR, <cliprect>, <stencil buffer>
+           Transparent color expands are done by setting BGCOLOR to ~0 */
 
 #define	SVGA_CMD_UPDATE_VERBOSE	          25
         /* FIFO layout:
@@ -332,10 +412,16 @@ enum {
 	   srcSurfaceOffset, dstSurfaceOffset, srcX, srcY,
            destX, destY, w, h, rop */
 
-#define	SVGA_CMD_MAX			  28
+#define SVGA_CMD_SURFACE_ALPHA_BLEND      28
+        /* FIFO layout:
+	   srcSurfaceOffset, dstSurfaceOffset, srcX, srcY,
+           destX, destY, w, h, op (SVGA_BLENDOP*), flags (SVGA_BLENDFLAGS*), 
+           param1, param2 */
+
+#define	SVGA_CMD_MAX			  29
 
-/* RECT_ROP_BITMAP_COPY currently has the most (non-data) arguments: 10 */
-#define SVGA_CMD_MAX_ARGS                 10
+/* SURFACE_ALPHA_BLEND currently has the most (non-data) arguments: 12 */
+#define SVGA_CMD_MAX_ARGS                 12
 
 
 /*
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/vmware/svga_struct.h b/xc/programs/Xserver/hw/xfree86/drivers/vmware/svga_struct.h
new file mode 100644
index 000000000..fe4f0bfc5
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/vmware/svga_struct.h
@@ -0,0 +1,40 @@
+/* **********************************************************
+ * Copyright (C) 1998-2000 VMware, Inc.
+ * All Rights Reserved
+ * **********************************************************/
+
+#ifndef _SVGA_STRUCT_H_
+#define _SVGA_STRUCT_H_
+
+#define INCLUDE_ALLOW_USERLEVEL
+#define INCLUDE_ALLOW_MONITOR
+#include "includeCheck.h"
+
+ /*
+  * Offscreen memory surface structure
+  *
+  */
+
+enum SVGASurfaceVersion {
+   SVGA_SURFACE_VERSION_1 = 1  /* Initial version... */
+};
+
+typedef struct _SVGASurface {
+   uint32   size;             /* Size of the structure */
+   uint32   version;          /* Version of this surface structure.  */
+   uint32   bpp;              /* Format of the surface */
+   uint32   width;            /* Width of the surface */
+   uint32   height;           /* Height of the surface */
+   uint32   pitch;            /* Pitch of the surface */
+   volatile uint32   numQueued;        /* Number of times this bitmap has been queued */
+   volatile uint32   numDequeued;      /* Number of times this bitmap has been dequeued */
+   uint32   userData;         /* Driver defined data */
+   uint32   dataOffset;       /* Offset to the data */
+} SVGASurface;
+
+typedef struct SVGAPoint {
+    int16 x;
+    int16 y;
+} SVGAPoint;
+
+#endif
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/vmware/vmware.c b/xc/programs/Xserver/hw/xfree86/drivers/vmware/vmware.c
index 98d64b7ef..a858d3ae7 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/vmware/vmware.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/vmware/vmware.c
@@ -6,7 +6,7 @@
 char rcsId_vmware[] =
     "Id: vmware.c,v 1.11 2001/02/23 02:10:39 yoel Exp $";
 #endif
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/vmware/vmware.c,v 1.13 2002/10/16 22:12:53 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/vmware/vmware.c,v 1.17 2003/02/18 19:10:36 alanh Exp $ */
 
 /*
  * TODO: support the vmware linux kernel fb driver (Option "UseFBDev").
@@ -59,8 +59,8 @@ char rcsId_vmware[] =
 #define VMWARE_NAME "VMWARE"
 #define VMWARE_DRIVER_NAME "vmware"
 #define VMWARE_MAJOR_VERSION	10
-#define VMWARE_MINOR_VERSION	9
-#define VMWARE_PATCHLEVEL	0
+#define VMWARE_MINOR_VERSION	10
+#define VMWARE_PATCHLEVEL	2
 #define VERSION (VMWARE_MAJOR_VERSION * 65536 + VMWARE_MINOR_VERSION * 256 + VMWARE_PATCHLEVEL)
 
 static const char VMWAREBuildStr[] = "VMware Guest X Server " 
@@ -106,12 +106,8 @@ static const char *vgahwSymbols[] = {
 };
 
 static const char *fbSymbols[] = {
-    "fbCopyPlane",
-    "fbCopyRegion",
     "fbCreateDefColormap",
-    "fbDoCopy",
     "fbPictureInit",
-    "fbQueryBestSize",
     "fbScreenInit",
     NULL
 };
@@ -124,7 +120,7 @@ static const char *ramdacSymbols[] = {
 };
 
 static const char *shadowfbSymbols[] = {
-    "ShadowFBInit",
+    "ShadowFBInit2",
     NULL
 };
 
@@ -179,15 +175,30 @@ VMWAREFreeRec(ScrnInfoPtr pScrn)
 CARD32
 vmwareReadReg(VMWAREPtr pVMWARE, int index)
 {
+    /*
+     * Block SIGIO for the duration, so we don't get interrupted after the
+     * outl but before the inl by a mouse move (which write to our registers).
+     */
+    int oldsigio, ret;
+    oldsigio = xf86BlockSIGIO();
     outl(pVMWARE->indexReg, index);
-    return inl(pVMWARE->valueReg);
+    ret = inl(pVMWARE->valueReg);
+    xf86UnblockSIGIO(oldsigio);
+    return ret;
 }
 
 void
 vmwareWriteReg(VMWAREPtr pVMWARE, int index, CARD32 value)
 {
+    /*
+     * Block SIGIO for the duration, so we don't get interrupted in between
+     * the outls by a mouse move (which write to our registers).
+     */
+    int oldsigio;
+    oldsigio = xf86BlockSIGIO();
     outl(pVMWARE->indexReg, index);
     outl(pVMWARE->valueReg, value);
+    xf86UnblockSIGIO(oldsigio);
 }
 
 void
@@ -204,9 +215,11 @@ vmwareWriteWordToFIFO(VMWAREPtr pVMWARE, CARD32 value)
     }
 
     vmwareFIFO[vmwareFIFO[SVGA_FIFO_NEXT_CMD] / sizeof(CARD32)] = value;
-    vmwareFIFO[SVGA_FIFO_NEXT_CMD] += sizeof(CARD32);
-    if (vmwareFIFO[SVGA_FIFO_NEXT_CMD] == vmwareFIFO[SVGA_FIFO_MAX]) {
-	vmwareFIFO[SVGA_FIFO_NEXT_CMD] = vmwareFIFO[SVGA_FIFO_MIN];
+    if(vmwareFIFO[SVGA_FIFO_NEXT_CMD] == vmwareFIFO[SVGA_FIFO_MAX] -
+       sizeof(CARD32)) {
+        vmwareFIFO[SVGA_FIFO_NEXT_CMD] = vmwareFIFO[SVGA_FIFO_MIN];
+    } else {
+        vmwareFIFO[SVGA_FIFO_NEXT_CMD] += sizeof(CARD32);
     }
 }
 
@@ -726,7 +739,7 @@ VMWAREPreInit(ScrnInfoPtr pScrn, int flags)
             VMWAREFreeRec(pScrn);
             return FALSE;
         }
-        xf86LoaderReqSymLists(xaaSymbols, NULL);
+        xf86LoaderReqSymLists(vmwareXaaSymbols, NULL);
     }
 
     return TRUE;
@@ -1182,20 +1195,27 @@ VMWAREScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
      */
     if (!ShadowFBInit2(pScreen, 
                        pVMWARE->hwCursor ? VMWAREPreDirtyBBUpdate : NULL,
-                       VMWAREPostDirtyBBUpdate, FALSE)) {
+                       VMWAREPostDirtyBBUpdate)) {
         xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
                    "ShadowFB initialization failed\n");
         return FALSE;
     }
 
     /*
+     * If we have a hw cursor, we need to hook functions that might
+     * read from the framebuffer.
+     */
+    if (pVMWARE->hwCursor) {
+        vmwareCursorHookWrappers(pScreen);
+    }
+
+    /*
      * Initialize acceleration.
      */
     if (!pVMWARE->noAccel) {
         if (!vmwareXAAScreenInit(pScreen)) {
             xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-                       "XAA initialization failed --"
-                       " running unaccelerated!\n");
+                       "XAA initialization failed -- running unaccelerated!\n");
             pVMWARE->noAccel = TRUE;
         }
     }
@@ -1374,7 +1394,7 @@ vmwareSetup(pointer module, pointer opts, int *errmaj, int *errmin)
         xf86AddDriver(&VMWARE, module, 0);
 
         LoaderRefSymLists(vgahwSymbols, fbSymbols, ramdacSymbols,
-                          shadowfbSymbols, xaaSymbols, NULL);
+                          shadowfbSymbols, vmwareXaaSymbols, NULL);
 
         return (pointer)1;
     }
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/vmware/vmware.h b/xc/programs/Xserver/hw/xfree86/drivers/vmware/vmware.h
index b29cf02d4..405927555 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/vmware/vmware.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/vmware/vmware.h
@@ -3,7 +3,7 @@
  * All Rights Reserved
  * Id: vmware.h,v 1.6 2001/01/30 18:13:47 bennett Exp $
  * **********************************************************/
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/vmware/vmware.h,v 1.7 2002/10/16 22:12:53 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/vmware/vmware.h,v 1.10 2003/02/04 01:39:53 dawes Exp $ */
 
 #ifndef VMWARE_H
 #define VMWARE_H
@@ -27,6 +27,9 @@
 
 #include "vm_basic_types.h"
 #include "svga_reg.h"
+#include "svga_struct.h"
+
+#include "offscreen_manager.h"
 
 /* Arbitrarily choose max cursor dimensions.  The emulation doesn't care. */
 #define MAX_CURS        32
@@ -118,6 +121,12 @@ typedef struct {
     unsigned char* xaaColorExpScanLine[1];
     unsigned int xaaColorExpSize; /* size of current scan line in DWords */
 
+    Heap* heap;
+    SVGASurface* frontBuffer;
+
+    SVGASurface* curPict;
+    int op;
+
 } VMWARERec, *VMWAREPtr;
 
 #define VMWAREPTR(p) ((VMWAREPtr)((p)->driverPrivate))
@@ -155,10 +164,9 @@ static __inline ScrnInfoPtr infoFromScreen(ScreenPtr s) {
 
 #define MOUSE_ID 1
 
-extern const char *xaaSymbols[];
+extern const char *vmwareXaaSymbols[];
 
 /*#define DEBUG_LOGGING*/
-/*#undef DEBUG_LOGGING*/
 #ifdef DEBUG_LOGGING
 # define VmwareLog(args) ErrorF args
 # define TRACEPOINT VmwareLog((__FUNCTION__ ":" __FILE__ "\n"));
@@ -228,6 +236,13 @@ void vmwareWriteCursorRegs(
 #endif
    );
 
+void vmwareCursorHookWrappers(
+#if NeedFunctionPrototypes
+   ScreenPtr pScreen
+#endif
+   );
+
+
 /* vmwarexaa.c */
 Bool vmwareXAAScreenInit(
 #if NeedFunctionPrototypes
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/vmware/vmwarecurs.c b/xc/programs/Xserver/hw/xfree86/drivers/vmware/vmwarecurs.c
index a9cb25652..1a7c6eb4d 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/vmware/vmwarecurs.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/vmware/vmwarecurs.c
@@ -6,7 +6,7 @@
 char rcsId_vmwarecurs[] =
     "Id: vmwarecurs.c,v 1.5 2001/01/30 23:33:02 bennett Exp $";
 #endif
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/vmware/vmwarecurs.c,v 1.5 2002/10/16 22:12:53 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/vmware/vmwarecurs.c,v 1.11 2003/02/05 12:47:42 dawes Exp $ */
 
 #include "vmware.h"
 #include "bits2pixels.h"
@@ -30,7 +30,9 @@ RedefineCursor(VMWAREPtr pVMWARE)
     int i;
 
     VmwareLog(("RedefineCursor\n"));
-    
+
+    pVMWARE->cursorDefined = FALSE;
+
     /* Define cursor */
     vmwareWriteWordToFIFO(pVMWARE, SVGA_CMD_DEFINE_CURSOR);
     vmwareWriteWordToFIFO(pVMWARE, MOUSE_ID);
@@ -48,7 +50,7 @@ RedefineCursor(VMWAREPtr pVMWARE)
      * arange for 'image' & 1 ^ 'source' = 'image' below when we clip
      * 'source' below.
      */
-    Raster_BitsToPixels((uint8 *) pVMWARE->hwcur.mask,
+    vmwareRaster_BitsToPixels((uint8 *) pVMWARE->hwcur.mask,
                         SVGA_BITMAP_INCREMENT(pVMWARE->CursorInfoRec->MaxWidth),
                         (uint8 *) pVMWARE->hwcur.maskPixmap,
                         SVGA_PIXMAP_INCREMENT(pVMWARE->CursorInfoRec->MaxWidth,
@@ -61,7 +63,7 @@ RedefineCursor(VMWAREPtr pVMWARE)
         vmwareWriteWordToFIFO(pVMWARE, ~pVMWARE->hwcur.mask[i]);
     }
     
-    Raster_BitsToPixels((uint8 *) pVMWARE->hwcur.source,
+    vmwareRaster_BitsToPixels((uint8 *) pVMWARE->hwcur.source,
                         SVGA_BITMAP_INCREMENT(pVMWARE->CursorInfoRec->MaxWidth),
                         (uint8 *) pVMWARE->hwcur.sourcePixmap,
                         SVGA_PIXMAP_INCREMENT(pVMWARE->CursorInfoRec->MaxWidth,
@@ -116,6 +118,46 @@ vmwareLoadCursorImage(ScrnInfoPtr pScrn, unsigned char *src )
     RedefineCursor(pVMWARE);
 }
 
+#ifdef ARGB_CURSOR
+#include "cursorstr.h"
+
+static Bool
+vmwareUseHWCursorARGB(ScreenPtr pScreen, CursorPtr pCurs)
+{
+    ScrnInfoPtr pScrn = infoFromScreen(pScreen);
+    return pCurs->bits->height <= MAX_CURS &&
+           pCurs->bits->width <= MAX_CURS &&
+           pScrn->bitsPerPixel > 8;
+}
+
+static void
+vmwareLoadCursorARGB(ScrnInfoPtr pScrn, CursorPtr pCurs)
+{
+    VMWAREPtr pVMWARE = VMWAREPTR(pScrn);
+    CARD32 width = pCurs->bits->width;
+    CARD32 height = pCurs->bits->height;
+    CARD32* image = pCurs->bits->argb;
+    CARD32* imageEnd = image + (width * height);
+
+    pVMWARE->cursorDefined = FALSE;
+
+    vmwareWriteWordToFIFO(pVMWARE, SVGA_CMD_DEFINE_ALPHA_CURSOR);
+    vmwareWriteWordToFIFO(pVMWARE, MOUSE_ID);
+    vmwareWriteWordToFIFO(pVMWARE, 0);
+    vmwareWriteWordToFIFO(pVMWARE, 0);
+    vmwareWriteWordToFIFO(pVMWARE, width);
+    vmwareWriteWordToFIFO(pVMWARE, height);
+
+    while (image != imageEnd) {
+        vmwareWriteWordToFIFO(pVMWARE, *image++);
+    }
+
+    vmwareWaitForFB(pVMWARE);
+
+    pVMWARE->cursorDefined = TRUE;
+}
+#endif
+
 void
 vmwareWriteCursorRegs(VMWAREPtr pVMWARE, Bool visible, Bool force)
 {
@@ -209,9 +251,7 @@ vmwareCursorInit(ScreenPtr pScreen)
 {
     xf86CursorInfoPtr infoPtr;
     VMWAREPtr pVMWARE = VMWAREPTR(infoFromScreen(pScreen));
-#ifdef RENDER
-    PictureScreenPtr ps = GetPictureScreenIfSet(pScreen);
-#endif
+    Bool ret;
 
     TRACEPOINT
 
@@ -236,20 +276,19 @@ vmwareCursorInit(ScreenPtr pScreen)
     infoPtr->HideCursor = vmwareHideCursor;
     infoPtr->ShowCursor = vmwareShowCursor;
 
-
-    pVMWARE->ScrnFuncs.GetImage = pScreen->GetImage;
-    pVMWARE->ScrnFuncs.CopyWindow = pScreen->CopyWindow;
-    pScreen->GetImage = VMWAREGetImage;
-    pScreen->CopyWindow = VMWARECopyWindow;
-
-#ifdef RENDER
-    if(ps) {
-        pVMWARE->Composite = ps->Composite;
-        ps->Composite = VMWAREComposite;
+#ifdef ARGB_CURSOR
+    if (pVMWARE->vmwareCapability & SVGA_CAP_ALPHA_CURSOR) {
+        infoPtr->UseHWCursorARGB = vmwareUseHWCursorARGB;
+        infoPtr->LoadCursorARGB = vmwareLoadCursorARGB;
     }
-#endif /* RENDER */
+#endif
 
-    return(xf86InitCursor(pScreen, infoPtr));
+    ret = xf86InitCursor(pScreen, infoPtr);
+    if (!ret) {
+        xf86DestroyCursorInfoRec(infoPtr);
+        pVMWARE->CursorInfoRec = NULL;
+    }
+    return ret;
 }
 
 void
@@ -264,7 +303,9 @@ vmwareCursorCloseScreen(ScreenPtr pScreen)
     pScreen->GetImage = pVMWARE->ScrnFuncs.GetImage;
     pScreen->CopyWindow = pVMWARE->ScrnFuncs.CopyWindow;
 #ifdef RENDER
-    ps->Composite = pVMWARE->Composite;
+    if (ps) {
+        ps->Composite = pVMWARE->Composite;
+    }
 #endif /* RENDER */
 
     vmwareHideCursor(pScrn);
@@ -273,56 +314,91 @@ vmwareCursorCloseScreen(ScreenPtr pScreen)
 
 /***  Wrap functions that read from the framebuffer ***/
 
+void
+vmwareCursorHookWrappers(ScreenPtr pScreen)
+{
+    VMWAREPtr pVMWARE = VMWAREPTR(infoFromScreen(pScreen));
+#ifdef RENDER
+    PictureScreenPtr ps = GetPictureScreenIfSet(pScreen);
+#endif
+
+    TRACEPOINT
+
+    pVMWARE->ScrnFuncs.GetImage = pScreen->GetImage;
+    pVMWARE->ScrnFuncs.CopyWindow = pScreen->CopyWindow;
+    pScreen->GetImage = VMWAREGetImage;
+    pScreen->CopyWindow = VMWARECopyWindow;
+
+#ifdef RENDER
+    if (ps) {
+        pVMWARE->Composite = ps->Composite;
+        ps->Composite = VMWAREComposite;
+    }
+#endif /* RENDER */
+
+}
+
 static void
 VMWAREGetImage(DrawablePtr src, int x, int y, int w, int h,
                unsigned int format, unsigned long planeMask, char *pBinImage)
 {
-   ScreenPtr pScreen = src->pScreen;
-   VMWAREPtr pVMWARE = VMWAREPTR(infoFromScreen(src->pScreen));
-   BoxRec box;
-   Bool hidden = FALSE;
-   
-   box.x1 = x;
-   box.y1 = y;
-   box.x2 = x + w;
-   box.y2 = y + h;
-
-   if (BOX_INTERSECT(box, pVMWARE->hwcur.box)) {
-       PRE_OP_HIDE_CURSOR();
-       hidden = TRUE;
-   }
-   pScreen->GetImage = pVMWARE->ScrnFuncs.GetImage;
-   (*pScreen->GetImage)(src, x, y, w, h, format, planeMask, pBinImage);
-   pScreen->GetImage = VMWAREGetImage;
-   if (hidden) {
-       POST_OP_SHOW_CURSOR();
-   }
+    ScreenPtr pScreen = src->pScreen;
+    VMWAREPtr pVMWARE = VMWAREPTR(infoFromScreen(src->pScreen));
+    BoxRec box;
+    Bool hidden = FALSE;
+    
+    VmwareLog(("VMWAREGetImage(%p, %d, %d, %d, %d, %d, %d, %p)\n",
+               src, x, y, w, h, format, planeMask, pBinImage));
+
+    box.x1 = src->x + x;
+    box.y1 = src->y + y;
+    box.x2 = box.x1 + w;
+    box.y2 = box.y1 + h;
+
+    if (BOX_INTERSECT(box, pVMWARE->hwcur.box)) {
+        PRE_OP_HIDE_CURSOR();
+        hidden = TRUE;
+    }
+
+    pScreen->GetImage = pVMWARE->ScrnFuncs.GetImage;
+    (*pScreen->GetImage)(src, x, y, w, h, format, planeMask, pBinImage);
+    pScreen->GetImage = VMWAREGetImage;
+
+    if (hidden) {
+        POST_OP_SHOW_CURSOR();
+    }
 }
 
 static void
 VMWARECopyWindow(WindowPtr pWin, DDXPointRec ptOldOrg, RegionPtr prgnSrc)
 {
-   ScreenPtr pScreen = pWin->drawable.pScreen;
-   VMWAREPtr pVMWARE = VMWAREPTR(infoFromScreen(pWin->drawable.pScreen));
-   BoxPtr pBB;
-   Bool hidden = FALSE;
-
-   /*
-    * We only worry about the source region here, since shadowfb or XAA will
-    * take care of the destination region.
-    */
-   pBB = REGION_EXTENTS(pWin->drawable.pScreen, prgnSrc);
-   if (BOX_INTERSECT(*pBB, pVMWARE->hwcur.box)) {
-       PRE_OP_HIDE_CURSOR();
-       hidden = TRUE;
-   }
-   pScreen->CopyWindow = pVMWARE->ScrnFuncs.CopyWindow;
-   (*pScreen->CopyWindow)(pWin, ptOldOrg, prgnSrc);
-   pScreen->CopyWindow = VMWARECopyWindow;
-
-   if (hidden) {
-       POST_OP_SHOW_CURSOR();
-   }   
+    ScreenPtr pScreen = pWin->drawable.pScreen;
+    VMWAREPtr pVMWARE = VMWAREPTR(infoFromScreen(pWin->drawable.pScreen));
+    BoxPtr pBB;
+    Bool hidden = FALSE;
+    
+    /*
+     * We only worry about the source region here, since shadowfb will
+     * take care of the destination region.
+     */
+    pBB = REGION_EXTENTS(pWin->drawable.pScreen, prgnSrc);
+
+    VmwareLog(("VMWARECopyWindow(%p, (%d, %d), (%d, %d - %d, %d)\n",
+               pWin, ptOldOrg.x, ptOldOrg.y,
+               pBB->x1, pBB->y1, pBB->x2, pBB->y2));
+    
+    if (BOX_INTERSECT(*pBB, pVMWARE->hwcur.box)) {
+        PRE_OP_HIDE_CURSOR();
+        hidden = TRUE;
+    }
+
+    pScreen->CopyWindow = pVMWARE->ScrnFuncs.CopyWindow;
+    (*pScreen->CopyWindow)(pWin, ptOldOrg, prgnSrc);
+    pScreen->CopyWindow = VMWARECopyWindow;
+    
+    if (hidden) {
+        POST_OP_SHOW_CURSOR();
+    }
 }
 
 #ifdef RENDER
@@ -337,13 +413,18 @@ VMWAREComposite(CARD8 op, PicturePtr pSrc, PicturePtr pMask,
     PictureScreenPtr ps = GetPictureScreen(pScreen);
     BoxRec box;
     Bool hidden = FALSE;
+    
+    VmwareLog(("VMWAREComposite op = %d, pSrc = %p, pMask = %p, pDst = %p,"
+               " src = (%d, %d), mask = (%d, %d), dst = (%d, %d), w = %d,"
+               " h = %d\n", op, pSrc, pMask, pDst, xSrc, ySrc, xMask, yMask,
+               xDst, yDst, width, height));
 
-   /*
-    * We only worry about the source region here, since shadowfb or XAA will
-    * take care of the destination region.
-    */
-    box.x1 = pDst->pDrawable->x + xDst;
-    box.y1 = pDst->pDrawable->y + yDst;
+    /*
+     * We only worry about the source region here, since shadowfb or XAA will
+     * take care of the destination region.
+     */
+    box.x1 = pSrc->pDrawable->x + xSrc;
+    box.y1 = pSrc->pDrawable->y + ySrc;
     box.x2 = box.x1 + width;
     box.y2 = box.y1 + height;
 
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/vmware/vmwarexaa.c b/xc/programs/Xserver/hw/xfree86/drivers/vmware/vmwarexaa.c
index 21ed6d6bc..b8e67cf04 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/vmware/vmwarexaa.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/vmware/vmwarexaa.c
@@ -6,13 +6,15 @@
 char rcsId_vmwarexaa[] =
     "Id: $";
 #endif
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/vmware/vmwarexaa.c,v 1.2 2002/10/16 22:26:55 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/vmware/vmwarexaa.c,v 1.5 2003/02/04 01:39:53 dawes Exp $ */
 
 #include "vmware.h"
 
-#define PAGE_SIZE 4096
+#define OFFSCREEN_SCRATCH_SIZE 1*1024*1024
+/* We'll assume we average about 32x32 alpha surfaces (4096 bytes) or larger */
+#define OFFSCREEN_SCRATCH_MAX_SLOTS OFFSCREEN_SCRATCH_SIZE / 4096
 
-const char *xaaSymbols[] = {
+const char *vmwareXaaSymbols[] = {
     "XAACreateInfoRec",
     "XAADestroyInfoRec",
     "XAAInit",
@@ -20,10 +22,12 @@ const char *xaaSymbols[] = {
 };
 
 static void vmwareXAASync(ScrnInfoPtr pScrn);
+
 static void vmwareSetupForSolidFill(ScrnInfoPtr pScrn, int color, int rop,
                                     unsigned int planemask);
 static void vmwareSubsequentSolidFillRect(ScrnInfoPtr pScrn,
                                           int x, int y, int w, int h);
+
 static void vmwareSetupForScreenToScreenCopy(ScrnInfoPtr pScrn,
                                              int xdir, int ydir, int rop,
                                              unsigned int planemask,
@@ -32,6 +36,7 @@ static void vmwareSubsequentScreenToScreenCopy(ScrnInfoPtr pScrn,
                                                int x1, int y1,
                                                int x2, int y2,
                                                int width, int height);
+
 static void vmwareSetupForScanlineCPUToScreenColorExpandFill(ScrnInfoPtr pScrn,
                                                              int fg, int bg,
                                                              int rop,
@@ -42,6 +47,31 @@ static void vmwareSubsequentScanlineCPUToScreenColorExpandFill(ScrnInfoPtr pScrn
                                                                int skipleft );
 static void vmwareSubsequentColorExpandScanline(ScrnInfoPtr pScrn, int bufno);
 
+#ifdef RENDER
+static Bool vmwareSetupForCPUToScreenAlphaTexture(ScrnInfoPtr pScrn, int op,
+                                                  CARD16 red, CARD16 green,
+                                                  CARD16 blue, CARD16 alpha,
+                                                  int alphaType, CARD8 *alphaPtr,
+                                                  int alphaPitch,
+                                                  int width, int height,
+                                                  int flags);
+
+static Bool vmwareSetupForCPUToScreenTexture(ScrnInfoPtr pScrn, int op,
+                                             int texType, CARD8 *texPtr,
+                                             int texPitch,
+                                             int width, int height,
+                                             int flags);
+
+static void vmwareSubsequentCPUToScreenTexture(ScrnInfoPtr pScrn,
+                                               int dstx, int dsty,
+                                               int srcx, int srcy,
+                                               int width, int height);
+
+CARD32 vmwareAlphaTextureFormats[2] = {PICT_a8, 0};
+CARD32 vmwareTextureFormats[2] = {PICT_a8r8g8b8, 0};
+
+#endif
+
 #define DESTROY_XAA_INFO(pVMWARE) \
     if (pVMWARE->xaaInfo) { XAADestroyInfoRec(pVMWARE->xaaInfo); \
     pVMWARE->xaaInfo = NULL; }
@@ -52,7 +82,7 @@ vmwareXAAScreenInit(ScreenPtr pScreen)
     ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
     VMWAREPtr pVMWARE = VMWAREPTR(pScrn);
     XAAInfoRecPtr xaaInfo;
-
+        
     pVMWARE->xaaInfo = XAACreateInfoRec();
     if (!pVMWARE->xaaInfo) {
         return FALSE;
@@ -81,7 +111,7 @@ vmwareXAAScreenInit(ScreenPtr pScreen)
 
     /*
      * We don't support SVGA_CAP_GLYPH without clipping, since we use clipping
-     * to for normal glyphs.
+     * for normal glyphs.
      */
     if (pVMWARE->vmwareCapability & SVGA_CAP_GLYPH_CLIPPING) {
         xaaInfo->SetupForScanlineCPUToScreenColorExpandFill =
@@ -99,27 +129,77 @@ vmwareXAAScreenInit(ScreenPtr pScreen)
     }
 
     if (pVMWARE->vmwareCapability & SVGA_CAP_OFFSCREEN_1) {
+        int scratchSizeBytes = ((OFFSCREEN_SCRATCH_SIZE + pVMWARE->fbPitch - 1) /
+                                pVMWARE->fbPitch) * pVMWARE->fbPitch;
         BoxRec box;
         RegionRec region;
 
         box.x1 = 0;
         box.y1 = (pVMWARE->FbSize + pVMWARE->fbPitch - 1) / pVMWARE->fbPitch;
-        box.x2 = pScrn->virtualX;  /*pScrn->displayWidth;*/
-        box.y2 = (pVMWARE->videoRam) / pVMWARE->fbPitch;
+        box.x2 = pScrn->displayWidth;
+        box.y2 = pVMWARE->videoRam / pVMWARE->fbPitch;
+
+#ifdef RENDER
+        if (pVMWARE->vmwareCapability & SVGA_CAP_ALPHA_BLEND &&
+            pScrn->bitsPerPixel > 8) {
+            if (box.y2 - (scratchSizeBytes / pVMWARE->fbPitch) > box.y1 + 4) {
+                CARD8* osPtr = pVMWARE->FbBase + pVMWARE->videoRam -
+                   scratchSizeBytes;
+                box.y2 -= scratchSizeBytes / pVMWARE->fbPitch;
+
+                VmwareLog(("Allocated %d bytes at offset %d for alpha scratch\n",
+                           scratchSizeBytes,
+                           pVMWARE->videoRam - scratchSizeBytes)); 
+
+                pVMWARE->heap = vmwareHeap_Create(osPtr,
+                                                  scratchSizeBytes,
+                                                  OFFSCREEN_SCRATCH_MAX_SLOTS,
+                                                  pVMWARE->videoRam - scratchSizeBytes,
+                                                  pScrn->virtualX,
+                                                  pScrn->virtualY,
+                                                  pVMWARE->bitsPerPixel,
+                                                  pVMWARE->fbPitch,
+                                                  pVMWARE->fbOffset);
+                pVMWARE->frontBuffer = vmwareHeap_GetFrontBuffer(pVMWARE->heap);
+
+                xaaInfo->SetupForCPUToScreenAlphaTexture =
+                   vmwareSetupForCPUToScreenAlphaTexture;
+                xaaInfo->SubsequentCPUToScreenAlphaTexture =
+                   vmwareSubsequentCPUToScreenTexture;
+                xaaInfo->CPUToScreenAlphaTextureFlags = XAA_RENDER_NO_TILE |
+                   XAA_RENDER_NO_SRC_ALPHA;
+                xaaInfo->CPUToScreenAlphaTextureFormats = vmwareAlphaTextureFormats;
+
+                xaaInfo->SetupForCPUToScreenTexture =
+                   vmwareSetupForCPUToScreenTexture;
+                xaaInfo->SubsequentCPUToScreenTexture = 
+                   vmwareSubsequentCPUToScreenTexture;
+                xaaInfo->CPUToScreenTextureFlags = XAA_RENDER_NO_TILE;
+                xaaInfo->CPUToScreenTextureFormats = vmwareTextureFormats;
+            } else {
+                xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Allocation of offscreen "
+                           "scratch area for alpha blending failed\n");
+            }
+        }
+#endif
 
-        REGION_INIT(pScreen, &region, &box, 1);
+        if (box.y2 > box.y1) {
+            REGION_INIT(pScreen, &region, &box, 1);
 
-        if (xf86InitFBManagerRegion(pScreen, &region)) {
-            VmwareLog(("Offscreen memory initialized: (%d, %d) - (%d, %d)\n",
-                       box.x1, box.y1, box.x2, box.y2));
+            if (REGION_NOTEMPTY(pScreen, &region) &&
+                xf86InitFBManagerRegion(pScreen, &region)) {
+                VmwareLog(("Offscreen memory initialized: (%d, %d) - (%d, %d)\n",
+                           box.x1, box.y1, box.x2, box.y2));
 
-            xaaInfo->Flags = LINEAR_FRAMEBUFFER | PIXMAP_CACHE | OFFSCREEN_PIXMAPS;
-        } else {
-            xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Offscreen memory manager "
-                       "initialization failed.\n");
-        }
+                xaaInfo->Flags =
+                   LINEAR_FRAMEBUFFER | PIXMAP_CACHE | OFFSCREEN_PIXMAPS;
+            } else {
+                xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Offscreen memory manager "
+                           "initialization failed.\n");
+            }
 
-        REGION_UNINIT(pScreen, &region);
+            REGION_UNINIT(pScreen, &region);
+        }
     }
 
     if (!XAAInit(pScreen, xaaInfo)) {
@@ -167,14 +247,29 @@ vmwareXAACloseScreen(ScreenPtr pScreen)
     }
 
     DESTROY_XAA_INFO(pVMWARE);
+    
+#ifdef RENDER
+    if (pVMWARE->heap) {
+        vmwareHeap_Destroy(pVMWARE->heap);
+        pVMWARE->heap = NULL;
+    }
+#endif
 }
 
 static void
 vmwareXAASync(ScrnInfoPtr pScrn)
 {
+    VMWAREPtr pVMWARE = VMWAREPTR(pScrn);
+
     VmwareLog(("Sync\n"));
 
-    vmwareWaitForFB(VMWAREPTR(pScrn));
+    vmwareWaitForFB(pVMWARE);
+
+#ifdef RENDER
+    if (pVMWARE->heap) {
+        vmwareHeap_Clear(pVMWARE->heap);
+    }
+#endif
 }
 
 static void
@@ -278,7 +373,7 @@ vmwareSetupForScanlineCPUToScreenColorExpandFill(ScrnInfoPtr pScrn,
 
     pVMWARE->xaaFGColor = fg;
     pVMWARE->xaaBGColor = bg;
-    VmwareLog(("Setup color expand (fb = %d, bg = %d, rop = %d)\n",
+    VmwareLog(("Setup color expand (fg = %d, bg = %d, rop = %d)\n",
                fg, bg, rop));
 }
 
@@ -325,3 +420,130 @@ vmwareSubsequentColorExpandScanline(ScrnInfoPtr pScrn, int bufno)
         vmwareWriteWordToFIFO(pVMWARE, *scanLine++);
     }
 }
+
+#ifdef RENDER
+
+static void
+RGBPlusAlphaChannelToPremultipliedRGBA(
+    CARD8 red, CARD8 blue, CARD8 green,
+    CARD8 *alphaPtr,   /* in bytes */
+    int alphaPitch,
+    CARD32 *dstPtr,
+    int dstPitch,	/* in dwords */
+    int width, int height)
+{
+    int x;
+
+    while (height--) {
+        for (x = 0; x < width; x++) {
+            CARD8 alpha = alphaPtr[x];
+            dstPtr[x] = (alpha << 24) |
+               ((red * alpha / 255) << 16) |
+               ((green * alpha / 255) << 8) |
+               (blue * alpha / 255);
+        }
+        dstPtr += dstPitch;
+        alphaPtr += alphaPitch;
+    } 
+}
+
+Bool
+vmwareSetupForCPUToScreenAlphaTexture(ScrnInfoPtr pScrn, int op,
+                                      CARD16 red, CARD16 green,
+                                      CARD16 blue, CARD16 alpha,
+                                      int alphaType, CARD8 *alphaPtr,
+                                      int alphaPitch,
+                                      int width, int height,
+                                      int flags)
+{
+    VMWAREPtr pVMWARE = VMWAREPTR(pScrn);
+    SVGASurface* surf;
+
+    VmwareLog(("Setup alpha texture (op = %d, r = %d, g = %d, b = %d,"
+               " a = %d, alphaType = %d, alphaPitch = %d, w = %d, h = %d,"
+               " flags = %d)\n", op, red, green, blue, alpha, alphaType,
+               alphaPitch, width, height, flags));
+
+    if (op > PictOpSaturate) {
+        return FALSE;
+    }
+    
+    surf = vmwareHeap_AllocSurface(pVMWARE->heap, width, height, width * 4, 32);
+    
+    if (!surf) {
+        return FALSE;
+    }
+
+    RGBPlusAlphaChannelToPremultipliedRGBA(
+       red >> 8, green >> 8, blue >> 8,
+       alphaPtr, alphaPitch,
+       (CARD32*)(pVMWARE->FbBase + surf->dataOffset),
+       width, width, height);
+
+    pVMWARE->curPict = surf;
+    pVMWARE->op = op;
+
+    return TRUE;
+}
+
+Bool
+vmwareSetupForCPUToScreenTexture(ScrnInfoPtr pScrn, int op,
+                                 int texType, CARD8 *texPtr,
+                                 int texPitch,
+                                 int width, int height,
+                                 int flags)
+{
+    VMWAREPtr pVMWARE = VMWAREPTR(pScrn);
+    SVGASurface* surf;
+
+    VmwareLog(("Setup texture (op = %d, texType = %d, texPitch = %d,"
+               " w = %d, h = %d, flags = %d)\n", op, texType, texPitch,
+               width, height, flags));
+
+    if (op > PictOpSaturate) {
+        return FALSE;
+    }
+    
+    surf = vmwareHeap_AllocSurface(pVMWARE->heap, width, height, texPitch, 32);
+    
+    if (!surf) {
+        return FALSE;
+    }
+
+    memcpy(pVMWARE->FbBase + surf->dataOffset, texPtr, texPitch * height);
+
+    pVMWARE->curPict = surf;
+    pVMWARE->op = op;
+
+    return TRUE;
+}
+
+void
+vmwareSubsequentCPUToScreenTexture(ScrnInfoPtr pScrn,
+                                   int dstx, int dsty,
+                                   int srcx, int srcy,
+                                   int width, int height)
+{
+    VMWAREPtr pVMWARE = VMWAREPTR(pScrn);
+
+    VmwareLog((" Do texture (dstx = %d, dsty = %d, srcx = %d, srcy = %d"
+               " w = %d, h = %d)\n", dstx, dsty, srcx, srcy, width, height));
+
+    pVMWARE->curPict->numQueued++;
+    pVMWARE->frontBuffer->numQueued++;
+       
+    vmwareWriteWordToFIFO(pVMWARE, SVGA_CMD_SURFACE_ALPHA_BLEND);
+    vmwareWriteWordToFIFO(pVMWARE, (CARD8*)pVMWARE->curPict - pVMWARE->FbBase);
+    vmwareWriteWordToFIFO(pVMWARE, (CARD8*)pVMWARE->frontBuffer - pVMWARE->FbBase);
+    vmwareWriteWordToFIFO(pVMWARE, srcx);
+    vmwareWriteWordToFIFO(pVMWARE, srcy);
+    vmwareWriteWordToFIFO(pVMWARE, dstx);
+    vmwareWriteWordToFIFO(pVMWARE, dsty);
+    vmwareWriteWordToFIFO(pVMWARE, width);
+    vmwareWriteWordToFIFO(pVMWARE, height);
+    vmwareWriteWordToFIFO(pVMWARE, pVMWARE->op);
+    vmwareWriteWordToFIFO(pVMWARE, 0);  /* flags */
+    vmwareWriteWordToFIFO(pVMWARE, 0);  /* param1 */
+    vmwareWriteWordToFIFO(pVMWARE, 0);  /* param2 */
+}
+#endif
diff --git a/xc/programs/Xserver/hw/xfree86/dummylib/xalloc.c b/xc/programs/Xserver/hw/xfree86/dummylib/xalloc.c
index ffce7fe2c..63d3ff8c7 100644
--- a/xc/programs/Xserver/hw/xfree86/dummylib/xalloc.c
+++ b/xc/programs/Xserver/hw/xfree86/dummylib/xalloc.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/dummylib/xalloc.c,v 1.1 2000/02/13 03:06:39 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/dummylib/xalloc.c,v 1.2 2002/11/09 09:00:13 herrb Exp $ */
 
 #include "X.h"
 #include "os.h"
@@ -77,3 +77,16 @@ Xfree(pointer p)
     free(p);
 }
 
+char *
+Xstrdup(const char *s)
+{
+    char *sd;
+
+    if (s == NULL)
+	return NULL;
+
+    sd = (char *)Xalloc(strlen(s) + 1);
+    if (sd != NULL)
+	strcpy(sd, s);
+    return sd;
+}
diff --git a/xc/programs/Xserver/hw/xfree86/dummylib/xf86addrestolist.c b/xc/programs/Xserver/hw/xfree86/dummylib/xf86addrestolist.c
index 909eb1085..ea24fc1dc 100644
--- a/xc/programs/Xserver/hw/xfree86/dummylib/xf86addrestolist.c
+++ b/xc/programs/Xserver/hw/xfree86/dummylib/xf86addrestolist.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/dummylib/xf86addrestolist.c,v 1.2 2002/09/16 15:54:42 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/dummylib/xf86addrestolist.c,v 1.3 2002/12/24 15:50:43 tsi Exp $ */
 
 #include "xf86.h"
 
@@ -13,3 +13,9 @@ xf86FreeResList(resPtr rlist)
 {
     return;
 }
+
+resPtr
+xf86DupResList(const resPtr rlist)
+{
+    return rlist;
+}
diff --git a/xc/programs/Xserver/hw/xfree86/etc/Imakefile b/xc/programs/Xserver/hw/xfree86/etc/Imakefile
index e75aa4631..dd3c340cf 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/Imakefile
+++ b/xc/programs/Xserver/hw/xfree86/etc/Imakefile
@@ -4,7 +4,7 @@ XCOMM $XConsortium: Imakefile /main/24 1996/10/28 04:24:12 kaleb $
 
 
 
-XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/etc/Imakefile,v 3.45 2002/10/11 20:23:07 tsi Exp $
+XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/etc/Imakefile,v 3.49 2002/11/14 21:01:20 tsi Exp $
 #include <Server.tmpl>
 
 #if SystemV
@@ -62,7 +62,6 @@ XINST = Xinstall.sh
 SERVEREXTRASYSLIBS = ServerExtraSysLibs
 #endif
 
-
 all:: $(FILES)
 
 #if defined(FreeBSDArchitecture) || defined(NetBSDArchitecture) || defined(OpenBSDArchitecture)
@@ -88,12 +87,12 @@ DEFINES = -DUSE_I386_IOPL
 
 AllTarget(ProgramTargetName(scanpci))
 
-NormalProgramTarget(scanpci,scanpci.o,$(XF86OSSRC)/libxf86_os.a,-L../os-support -lxf86_os -L../scanpci -lscanpci -L../dummylib -ldummy $(SERVEREXTRASYSLIBS),NullParameter)
+NormalProgramTarget(scanpci,scanpci.o,$(XF86OSSRC)/libxf86_os.a ../scanpci/libscanpci.a ../dummylib/libdummy.a,-L../os-support -lxf86_os -L../scanpci -lscanpci -L../dummylib -ldummy $(SERVEREXTRASYSLIBS),NullParameter)
 InstallProgram(scanpci,$(BINDIR))
 InstallManPage(scanpci,$(MANDIR))
 #endif
 
-#if JoystickSupport || Joystick2Support
+#if JoystickSupport
        SRCS3 = joycal.c
 
 AllTarget(ProgramTargetName(joycal))
@@ -105,7 +104,7 @@ InstallProgram(joycal,$(BINDIR))
         SRCS4 = pcitweak.c
 
 AllTarget(ProgramTargetName(pcitweak))
-NormalProgramTarget(pcitweak,pcitweak.o,$(XF86OSSRC)/libxf86_os.a,-L../os-support -lxf86_os -L../dummylib -ldummy $(SERVEREXTRASYSLIBS),NullParameter)
+NormalProgramTarget(pcitweak,pcitweak.o,$(XF86OSSRC)/libxf86_os.a ../dummylib/libdummy.a,-L../os-support -lxf86_os -L../dummylib -ldummy $(SERVEREXTRASYSLIBS),NullParameter)
 InstallProgram(pcitweak,$(BINDIR))
 InstallManPage(pcitweak,$(MANDIR))
 
@@ -120,7 +119,7 @@ SYS_LIBRARIES = -li386
 
 AllTarget(ProgramTargetName(matchagp))
 
-NormalProgramTarget(matchagp,matchagp.o,$(XF86OSSRC)/libxf86_os.a,-L../os-support -lxf86_os -L../scanpci -lscanpci -L../dummylib -ldummy $(SERVEREXTRASYSLIBS),NullParameter)
+NormalProgramTarget(matchagp,matchagp.o,$(XF86OSSRC)/libxf86_os.a ../dummylib/libdummy.a,-L../os-support -lxf86_os -L../scanpci -lscanpci -L../dummylib -ldummy $(SERVEREXTRASYSLIBS),NullParameter)
 InstallProgram(matchagp,$(BINDIR))
 #endif /* BuildMatchagp */
 
@@ -136,7 +135,51 @@ AllTarget(ProgramTargetName(mmapw))
 NormalProgramTarget(mmapw,mmapw.o,NullParameter,NullParameter,NullParameter)
 InstallProgram(mmapw,$(BINDIR))
 
-        SRCS = $(SRCS1) $(SRCS2) $(SRCS3) $(SRCS4) $(SRCS5) $(SRCS6) $(SRCS7)
+#if defined(i386Architecture) || \
+    defined(AlphaArchitecture) || \
+    defined(ia64Architecture) || \
+    defined(x86_64Architecture)
+
+       SRCS8 = ioport.c
+
+AllTarget(ProgramTargetName(ioport))
+NormalProgramTarget(ioport,ioport.o,$(XF86OSSRC)/libxf86_os.a ../dummylib/libdummy.a,-L../os-support -lxf86_os -L../dummylib -ldummy $(SERVEREXTRASYSLIBS) MathLibrary,NullParameter)
+InstallProgram(ioport,$(BINDIR))
+
+IOPORT_NAMES = ProgramTargetName(inb) \
+	       ProgramTargetName(inw) \
+	       ProgramTargetName(inl) \
+	       ProgramTargetName(outb) \
+	       ProgramTargetName(outw) \
+	       ProgramTargetName(outl)
+
+all:: $(IOPORT_NAMES)
+
+$(IOPORT_NAMES): ProgramTargetName(ioport)
+	RemoveFile($@)
+	$(LN) $? $@
+
+clean::
+	RemoveFiles($(IOPORT_NAMES))
+
+install::
+	@for i in $(IOPORT_NAMES); do (set -x; \
+	$(RM) $(DESTDIR)$(BINDIR)/$$i; \
+	(cd $(DESTDIR)/$(BINDIR); $(LN) ioport $$i)); \
+	done
+
+#endif
+
+       SRCS9 = gtf.c
+
+AllTarget(ProgramTargetName(gtf))
+
+NormalProgramTarget(gtf,gtf.o,NullParameter,MathLibrary,NullParameter)
+InstallProgram(gtf,$(BINDIR))
+InstallManPage(gtf,$(MANDIR))
+
+        SRCS = $(SRCS1) $(SRCS2) $(SRCS3) $(SRCS4) $(SRCS5) $(SRCS6) $(SRCS7) \
+	       $(SRCS8) $(SRCS9)
 
 #if (SystemV && !defined(i386ScoArchitecture)) || SystemV4
 InstallNamedProg($(INSTPROG),xf86install,$(LIBDIR)/etc)
diff --git a/xc/programs/Xserver/hw/xfree86/etc/Xinstall.sh b/xc/programs/Xserver/hw/xfree86/etc/Xinstall.sh
index 2b7e3a5c7..c87b0a658 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/Xinstall.sh
+++ b/xc/programs/Xserver/hw/xfree86/etc/Xinstall.sh
@@ -1,13 +1,13 @@
 #!/bin/sh
 
 #
-# $XFree86: xc/programs/Xserver/hw/xfree86/etc/Xinstall.sh,v 1.39 2002/05/05 17:53:42 herrb Exp $
+# $XFree86: xc/programs/Xserver/hw/xfree86/etc/Xinstall.sh,v 1.48 2003/02/24 04:24:17 dawes Exp $
 #
 # Copyright © 2000 by Precision Insight, Inc.
 # Copyright © 2000, 2001 by VA Linux Systems, Inc.
-# Copyright © 1996-2002 by The XFree86 Project, Inc.
+# Copyright © 1996-2003 by The XFree86 Project, Inc.
 #
-# This script should be used to install XFree86 4.2.0.
+# This script should be used to install XFree86 4.3.0.
 #
 # Parts of this script are based on the old preinst.sh and postinst.sh
 # scripts.
@@ -20,15 +20,24 @@
 # Fallbacks for when the bindist version can't be auto-detected.
 # These should be updated for each release.
 
-FULLPREFIX=4.2
-PATCHLEVEL=0
-VERSION=$FULLPREFIX.$PATCHLEVEL
-FULLVERSION=$FULLPREFIX.0
+SNAPSHOT=n
+
+if [ $SNAPSHOT = y ]; then
+	FULLPREFIX=XXX
+	VERSION=4.2.99.902
+	PATCHLEVEL=0
+	FULLVERSION=$VERSION
+else
+	FULLPREFIX=4.3
+	PATCHLEVEL=0
+	VERSION=$FULLPREFIX.$PATCHLEVEL
+	FULLVERSION=$FULLPREFIX.0
+fi
 SCRIPTVERSION=$VERSION
 
 # XXX Could get this (and above) version info from imake...
-FreetypeCurrent=8
-FreetypeAge=2
+FreetypeCurrent=9
+FreetypeAge=3
 
 BINDISTFULLPREFIX=
 BINDISTPATCHLEVEL=
@@ -73,7 +82,7 @@ if [ X"$1" = "X-test" -o X"$XINST_TEST" != X ]; then
 fi
 
 RUNDIR=$ROOTDIR/usr/X11R6
-ETCDIR=$ROOTDIR/etc/X11
+ETCDIR=$ROOTDIR/etc
 VARDIR=$ROOTDIR/var
 
 OLDFILES=""
@@ -148,8 +157,13 @@ ETCFLINKS=" \
 	XftConfig \
 	"
 
+ETCFONTFILES=" \
+	fonts.conf \
+	fonts.dtd \
+	"
+
 
-XKBDIR="$ETCDIR/xkb"
+XKBDIR="$ETCDIR/X11/xkb"
 XKBDBDIR=
 
 FONTDIRS=" \
@@ -250,7 +264,7 @@ Description()
 	Xaout*)
 		echo "a.out compatibility libraries";;
 	Xquartz*)
-		echo "Mac OS X Quartz compatible X server";;
+		echo "Mac OS X Quartz X server and extensions";;
 	Xupd.tgz)
 		echo "Post-release updates";;
 	*)
@@ -438,8 +452,11 @@ FindDistName()
 			1.4* | 5.*)
 				DistName="Darwin-ppc-5.x"
 				;;
-			[6-9].*)
-				Message="No Darwin/ppc binaries available for this OS version. Try Darwin-ppc-5.x"
+			6.*)
+				DistName="Darwin-ppc-6.x"
+				;;
+			[7-9].*)
+				Message="No Darwin/ppc binaries available for this OS version. Try Darwin-ppc-6.x"
 				;;
 			*)
 				Message="No Darwin/ppc binaries available for this OS version"
@@ -451,8 +468,11 @@ FindDistName()
 			1.4* | 5.*)
 				DistName="Darwin-ix86-5.x"
 				;;
-			[6-9].*)
-				Message="No Darwin/ix86 binaries available for this OS version. Try Darwin-ix86-5.x"
+			6.*)
+				DistName="Darwin-ix86-6.x"
+				;;
+			[7-9].*)
+				Message="No Darwin/ix86 binaries available for this OS version. Try Darwin-ix86-6.x"
 				;;
 			*)
 				Message="No Darwin/ix86 binaries available for this OS version"
@@ -727,7 +747,14 @@ GetBindistVersion()
 		echo "Bindist version is $BINDISTVERSION"
 		BINDISTFULLPREFIX=`expr $BINDISTVERSION : '\([0-9]*\.[0-9]*\)\.'`
 		BINDISTPATCHLEVEL=`expr $BINDISTVERSION : '[0-9]*\.[0-9]*\.\([0-9]*\)'`
-		BINDISTFULLVERSION=$BINDISTFULLPREFIX.0
+		case $BINDISTPATCHLEVEL in
+		99)
+			BINDISTFULLVERSION=$BINDISTVERSION
+			;;
+		*)
+			BINDISTFULLVERSION=$BINDISTFULLPREFIX.0
+			;;
+		esac
 	else
 		echo "Warning: can't detect the bindist version"
 	fi
@@ -879,10 +906,10 @@ echo ""
 echo "		Welcome to the XFree86 $SCRIPTVERSION installer"
 echo ""
 echo "You are strongly advised to backup your existing XFree86 installation"
-echo "before proceeding.  This includes the $ROOTDIR/usr/X11R6 and $ROOTDIR/etc/X11"
-echo "directories.  The installation process will overwrite existing files"
-echo "in those directories, and this may include some configuration files"
-echo "that may have been customised."
+echo "before proceeding.  This includes the $ROOTDIR/usr/X11R6, $ROOTDIR/etc/X11"
+echo "and $ROOTDIR/etc/fonts directories.  The installation process will"
+echo "overwrite existing files in those directories, and this may include"
+echo "some configuration files that may have been customised."
 echo ""
 echo "If you are installing a version different from $SCRIPTVERSION, you"
 echo "may need an updated version of this installer script."
@@ -918,7 +945,6 @@ Darwin)
             SERVDIST="Xxserv.tgz Xquartz.tgz"
         else
             SERVDIST="Xxserv.tgz"
-            EXTRAOPTDIST="Xquartz.tgz"
         fi
 	;;
 FreeBSD|NetBSD|OpenBSD)
@@ -1089,7 +1115,7 @@ if [ X"$DOUPDATE" = XYES ]; then
 	exit 0
 fi
 
-# Create $RUNDIR and $ETCDIR if they don't already exist
+# Create $RUNDIR, $ETCDIR/X11 and $ETCDIR/fonts if they don't already exist
 
 if [ ! -d $RUNDIR ]; then
 	NewRunDir=YES
@@ -1104,10 +1130,14 @@ if [ ! -d $RUNDIR/lib/X11 ]; then
 	echo "Creating $RUNDIR/lib/X11"
 	mkdir $RUNDIR/lib/X11
 fi
-if [ ! -d $ETCDIR ]; then
+if [ ! -d $ETCDIR/X11 ]; then
 	NewEtcDir=YES
-	echo "Creating $ETCDIR"
-	mkdir $ETCDIR
+	echo "Creating $ETCDIR/X11"
+	mkdir $ETCDIR/X11
+fi
+if [ ! -d $ETCDIR/fonts ]; then
+	echo "Creating $ETCDIR/fonts"
+	mkdir $ETCDIR/fonts
 fi
 
 if [ -d $RUNDIR -a -d $RUNDIR/bin -a -d $RUNDIR/lib ]; then
@@ -1165,13 +1195,13 @@ fi
 
 if [ X"$EtcDirToMove" != X -o X"$EtcFileToMove" != X ]; then
 	echo "XFree86 now installs most customisable configuration files under"
-	echo "$ETCDIR instead of under $RUNDIR/lib/X11, and has symbolic links"
+	echo "$ETCDIR/X11 instead of under $RUNDIR/lib/X11, and has symbolic links"
 	echo "under $RUNDIR/lib/X11 that point to $ETCDIR.  You currently have"
 	echo "files under the following subdirectories of $RUNDIR/lib/X11:"
 	echo ""
 	echo "$EtcDirToMove $EtcFileToMove"
 	echo ""
-	echo "Do you want to move them to $ETCDIR and create the necessary"
+	echo "Do you want to move them to $ETCDIR/X11 and create the necessary"
 	Echo "links? (y/n) [y] "
 	read response
 	case "$response" in
@@ -1185,20 +1215,20 @@ if [ X"$EtcDirToMove" != X -o X"$EtcFileToMove" != X ]; then
 	echo ""
 	if [ X"$NoSymLinks" != XYES ]; then
 		for i in $EtcDirToMove; do
-			echo "Moving $RUNDIR/lib/X11/$i to $ETCDIR/$i ..."
-			if [ ! -d $ETCDIR/$i ]; then
-				mkdir $ETCDIR/$i
+			echo "Moving $RUNDIR/lib/X11/$i to $ETCDIR/X11/$i ..."
+			if [ ! -d $ETCDIR/X11/$i ]; then
+				mkdir $ETCDIR/X11/$i
 			fi
 			$TAR -C $RUNDIR/lib/X11/$i -c -f - . | \
-				$TAR -C $ETCDIR/$i -v -x -p -U -f - && \
+				$TAR -C $ETCDIR/X11/$i -v -x -p -U -f - && \
 				rm -fr $RUNDIR/lib/X11/$i && \
-				ln -s $ETCDIR/$i $RUNDIR/lib/X11/$i
+				ln -s $ETCDIR/X11/$i $RUNDIR/lib/X11/$i
 		done
 		for i in $EtcFileToMove; do
-			echo "Moving $RUNDIR/lib/X11/$i to $ETCDIR/$i ..."
-			cp -p $RUNDIR/lib/X11/$i $ETCDIR/$i && \
+			echo "Moving $RUNDIR/lib/X11/$i to $ETCDIR/X11/$i ..."
+			cp -p $RUNDIR/lib/X11/$i $ETCDIR/X11/$i && \
 				rm -fr $RUNDIR/lib/X11/$i && \
-				ln -s $ETCDIR/$i $RUNDIR/lib/X11/$i
+				ln -s $ETCDIR/X11/$i $RUNDIR/lib/X11/$i
 		done
 	fi
 fi
@@ -1229,18 +1259,18 @@ for i in $ETCDLINKS; do
 	if [ $DoCopy = YES ]; then
 		echo "Installing the $i config files ..."
 		if [ X"$NoSymLinks" != XYES ]; then
-			if [ ! -d $ETCDIR/$i ]; then
-				mkdir $ETCDIR/$i
+			if [ ! -d $ETCDIR/X11/$i ]; then
+				mkdir $ETCDIR/X11/$i
 			fi
 			if [ ! -d $RUNDIR/lib/X11/$i ]; then
-				ln -s $ETCDIR/$i $RUNDIR/lib/X11/$i
+				ln -s $ETCDIR/X11/$i $RUNDIR/lib/X11/$i
 			fi
 		else
 			if [ ! -d $RUNDIR/lib/X11/$i ]; then
 				mkdir $RUNDIR/lib/X11/$i
 			fi
 		fi
-		$TAR -C .etctmp/$i -c -f - . | \
+		$TAR -C .etctmp/X11/$i -c -f - . | \
 			$TAR -C $RUNDIR/lib/X11/$i -v -x -p -U -f -
 	fi
 done
@@ -1262,24 +1292,43 @@ for i in $ETCFLINKS; do
 		echo "Installing the $i config file ..."
 		if [ X"$NoSymLinks" != XYES ]; then
 			if [ ! -f $RUNDIR/lib/X11/$i ]; then
-				ln -s $ETCDIR/$i $RUNDIR/lib/X11/$i
+				ln -s $ETCDIR/X11/$i $RUNDIR/lib/X11/$i
 			fi
 		fi
-		(set -x; cp -p .etctmp/$i $RUNDIR/lib/X11/$i)
+		(set -x; cp -p .etctmp/X11/$i $RUNDIR/lib/X11/$i)
 	fi
 done
 if [ X"$XKBDIR" != X ]; then
 	if [ X"$NoSymLinks" = XYES ]; then
 		XKBDIR=$RUNDIR/lib/X11/xkb/compiled
 	fi
-	if [ -d .etctmp/xkb ]; then
+	if [ -d .etctmp/X11/xkb ]; then
 		if [ ! -d $XKBDIR ]; then
 			mkdir $XKBDIR
 		fi
-		$TAR -C .etctmp/xkb -c -f - . | \
+		$TAR -C .etctmp/X11/xkb -c -f - . | \
 			$TAR -C $XKBDIR -v -x -p -U -f -
 	fi
 fi
+for i in $ETCFONTFILES; do
+	DoCopy=YES
+	if [ -f $ETCDIR/fonts/$i ]; then
+		Echo "Do you want to overwrite the $i config file? (y/n) [n] "
+		read response
+		case "$response" in
+		[yY]*)
+			: OK
+			;;
+		*)
+			DoCopy=NO
+			;;
+		esac
+	fi
+	if [ $DoCopy = YES ]; then
+		echo "Installing the $i config file ..."
+		(set -x; cp -p .etctmp/fonts/$i $ETCDIR/fonts/$i)
+	fi
+done
 rm -fr .etctmp
 
 echo ""
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/Cygwin/bin-list b/xc/programs/Xserver/hw/xfree86/etc/bindist/Cygwin/bin-list
index 23aa7b747..4a539c25c 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/Cygwin/bin-list
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/Cygwin/bin-list
@@ -2,6 +2,8 @@
 bin
 lib/libdps.a
 lib/libdpstk.a
+lib/libexpat.a
+lib/libfontconfig.a
 lib/libfntstubs.a
 lib/libfreetype.a
 lib/libFS.a
@@ -15,6 +17,7 @@ lib/libSM.a
 lib/libX11.a
 lib/libXau.a
 lib/libXaw.a
+lib/libXcursor.a
 lib/libXdmcp.a
 lib/libXext.a
 lib/libXfont.a
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/Cygwin/etc-dir b/xc/programs/Xserver/hw/xfree86/etc/bindist/Cygwin/etc-dir
index 412cec0c3..ee19d5d17 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/Cygwin/etc-dir
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/Cygwin/etc-dir
@@ -1 +1 @@
-etc/X11
+etc
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/Cygwin/etc-list b/xc/programs/Xserver/hw/xfree86/etc/bindist/Cygwin/etc-list
index 9c558e357..5198205d9 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/Cygwin/etc-list
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/Cygwin/etc-list
@@ -1 +1,2 @@
-.
+X11
+fonts
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/Darwin-ix86/bin-list b/xc/programs/Xserver/hw/xfree86/etc/bindist/Darwin-ix86/bin-list
index 710fb5337..7d3d37c68 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/Darwin-ix86/bin-list
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/Darwin-ix86/bin-list
@@ -9,6 +9,9 @@ lib/libGLU.dylib
 lib/libICE.6.3.dylib
 lib/libICE.6.dylib
 lib/libICE.dylib
+lib/libOSMesa.4.0.dylib
+lib/libOSMesa.4.dylib
+lib/libOSMesa.dylib
 lib/libSM.6.0.dylib
 lib/libSM.6.dylib
 lib/libSM.dylib
@@ -20,6 +23,9 @@ lib/libXaw.6.dylib
 lib/libXaw.7.0.dylib
 lib/libXaw.7.dylib
 lib/libXaw.dylib
+lib/libXcursor.1.0.dylib
+lib/libXcursor.1.dylib
+lib/libXcursor.dylib
 lib/libXext.6.4.dylib
 lib/libXext.6.dylib
 lib/libXext.dylib
@@ -28,6 +34,8 @@ lib/libXfont.1.dylib
 lib/libXfont.dylib
 lib/libXft.1.1.dylib
 lib/libXft.1.dylib
+lib/libXft.2.1.dylib
+lib/libXft.2.dylib
 lib/libXft.dylib
 lib/libXi.6.0.dylib
 lib/libXi.6.dylib
@@ -44,10 +52,10 @@ lib/libXp.dylib
 lib/libXpm.4.11.dylib
 lib/libXpm.4.dylib
 lib/libXpm.dylib
-lib/libXrandr.1.0.dylib
-lib/libXrandr.1.dylib
+lib/libXrandr.2.0.dylib
+lib/libXrandr.2.dylib
 lib/libXrandr.dylib
-lib/libXrender.1.1.dylib
+lib/libXrender.1.2.dylib
 lib/libXrender.1.dylib
 lib/libXrender.dylib
 lib/libXt.6.0.dylib
@@ -59,13 +67,22 @@ lib/libXtst.dylib
 lib/libXTrap.6.4.dylib
 lib/libXTrap.6.dylib
 lib/libXTrap.dylib
+lib/libXv.1.0.dylib
+lib/libXv.1.dylib
+lib/libXv.dylib
 lib/libdps.1.0.dylib
 lib/libdps.1.dylib
 lib/libdps.dylib
 lib/libdpstk.1.0.dylib
 lib/libdpstk.1.dylib
 lib/libdpstk.dylib
-lib/libfreetype.6.2.dylib
+lib/libexpat.1.0.dylib
+lib/libexpat.1.dylib
+lib/libexpat.dylib
+lib/libfontconfig.1.0.dylib
+lib/libfontconfig.1.dylib
+lib/libfontconfig.dylib
+lib/libfreetype.6.3.dylib
 lib/libfreetype.6.dylib
 lib/libfreetype.dylib
 lib/liboldX.6.0.dylib
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/Darwin-ix86/etc-dir b/xc/programs/Xserver/hw/xfree86/etc/bindist/Darwin-ix86/etc-dir
index 412cec0c3..ee19d5d17 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/Darwin-ix86/etc-dir
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/Darwin-ix86/etc-dir
@@ -1 +1 @@
-etc/X11
+etc
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/Darwin-ix86/etc-list b/xc/programs/Xserver/hw/xfree86/etc/bindist/Darwin-ix86/etc-list
index 9c558e357..5198205d9 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/Darwin-ix86/etc-list
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/Darwin-ix86/etc-list
@@ -1 +1,2 @@
-.
+X11
+fonts
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/Darwin-ppc/bin-list b/xc/programs/Xserver/hw/xfree86/etc/bindist/Darwin-ppc/bin-list
index 710fb5337..7d3d37c68 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/Darwin-ppc/bin-list
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/Darwin-ppc/bin-list
@@ -9,6 +9,9 @@ lib/libGLU.dylib
 lib/libICE.6.3.dylib
 lib/libICE.6.dylib
 lib/libICE.dylib
+lib/libOSMesa.4.0.dylib
+lib/libOSMesa.4.dylib
+lib/libOSMesa.dylib
 lib/libSM.6.0.dylib
 lib/libSM.6.dylib
 lib/libSM.dylib
@@ -20,6 +23,9 @@ lib/libXaw.6.dylib
 lib/libXaw.7.0.dylib
 lib/libXaw.7.dylib
 lib/libXaw.dylib
+lib/libXcursor.1.0.dylib
+lib/libXcursor.1.dylib
+lib/libXcursor.dylib
 lib/libXext.6.4.dylib
 lib/libXext.6.dylib
 lib/libXext.dylib
@@ -28,6 +34,8 @@ lib/libXfont.1.dylib
 lib/libXfont.dylib
 lib/libXft.1.1.dylib
 lib/libXft.1.dylib
+lib/libXft.2.1.dylib
+lib/libXft.2.dylib
 lib/libXft.dylib
 lib/libXi.6.0.dylib
 lib/libXi.6.dylib
@@ -44,10 +52,10 @@ lib/libXp.dylib
 lib/libXpm.4.11.dylib
 lib/libXpm.4.dylib
 lib/libXpm.dylib
-lib/libXrandr.1.0.dylib
-lib/libXrandr.1.dylib
+lib/libXrandr.2.0.dylib
+lib/libXrandr.2.dylib
 lib/libXrandr.dylib
-lib/libXrender.1.1.dylib
+lib/libXrender.1.2.dylib
 lib/libXrender.1.dylib
 lib/libXrender.dylib
 lib/libXt.6.0.dylib
@@ -59,13 +67,22 @@ lib/libXtst.dylib
 lib/libXTrap.6.4.dylib
 lib/libXTrap.6.dylib
 lib/libXTrap.dylib
+lib/libXv.1.0.dylib
+lib/libXv.1.dylib
+lib/libXv.dylib
 lib/libdps.1.0.dylib
 lib/libdps.1.dylib
 lib/libdps.dylib
 lib/libdpstk.1.0.dylib
 lib/libdpstk.1.dylib
 lib/libdpstk.dylib
-lib/libfreetype.6.2.dylib
+lib/libexpat.1.0.dylib
+lib/libexpat.1.dylib
+lib/libexpat.dylib
+lib/libfontconfig.1.0.dylib
+lib/libfontconfig.1.dylib
+lib/libfontconfig.dylib
+lib/libfreetype.6.3.dylib
 lib/libfreetype.6.dylib
 lib/libfreetype.dylib
 lib/liboldX.6.0.dylib
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/Darwin-ppc/etc-dir b/xc/programs/Xserver/hw/xfree86/etc/bindist/Darwin-ppc/etc-dir
index 412cec0c3..ee19d5d17 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/Darwin-ppc/etc-dir
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/Darwin-ppc/etc-dir
@@ -1 +1 @@
-etc/X11
+etc
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/Darwin-ppc/etc-list b/xc/programs/Xserver/hw/xfree86/etc/bindist/Darwin-ppc/etc-list
index 9c558e357..5198205d9 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/Darwin-ppc/etc-list
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/Darwin-ppc/etc-list
@@ -1 +1,2 @@
-.
+X11
+fonts
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/Darwin-ppc/quartz-list b/xc/programs/Xserver/hw/xfree86/etc/bindist/Darwin-ppc/quartz-list
index f32a0d5f7..cae427de3 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/Darwin-ppc/quartz-list
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/Darwin-ppc/quartz-list
@@ -1,4 +1,8 @@
 bin/X
 bin/XDarwinStartup
 bin/XDarwinQuartz
+lib/libfreetype.6.3.dylib
+lib/libfreetype.6.dylib
+lib/libfreetype.a
+lib/libfreetype.dylib
 ../../Applications/XDarwin.app
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD-aout/bin-list b/xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD-aout/bin-list
index 7582a6efd..5b2f9d882 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD-aout/bin-list
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD-aout/bin-list
@@ -9,21 +9,26 @@ lib/libXThrStub.so.6.0
 lib/libXTrap.so.6.4
 lib/libXaw.so.6.1
 lib/libXaw.so.7.0
+lib/libXcursor.so.1.0
 lib/libXext.so.6.4
 lib/libXfont.so.1.4
 lib/libXft.so.1.1
+lib/libXft.so.2.1
 lib/libXi.so.6.0
 lib/libXmu.so.6.2
 lib/libXmuu.so.1.0
 lib/libXp.so.6.2
 lib/libXpm.so.4.11
-lib/libXrandr.so.1.0
-lib/libXrender.so.1.1
+lib/libXrandr.so.2.0
+lib/libXrender.so.1.2
 lib/libXt.so.6.0
 lib/libXtst.so.6.1
+lib/libXv.so.1.0
 lib/libdps.so.1.0
 lib/libdpstk.so.1.0
-lib/libfreetype.so.8.0
+lib/libexpat.so.1.0
+lib/libfontconfig.so.1.0
+lib/libfreetype.so.9.0
 lib/liboldX.so.6.0
 lib/libpsres.so.1.0
 lib/libxrx.so.6.3
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD-aout/etc-dir b/xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD-aout/etc-dir
index 412cec0c3..ee19d5d17 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD-aout/etc-dir
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD-aout/etc-dir
@@ -1 +1 @@
-etc/X11
+etc
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD-aout/etc-list b/xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD-aout/etc-list
index 9c558e357..5198205d9 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD-aout/etc-list
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD-aout/etc-list
@@ -1 +1,2 @@
-.
+X11
+fonts
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD-aout/host.def b/xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD-aout/host.def
index f30db1385..110bf7b9c 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD-aout/host.def
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD-aout/host.def
@@ -1,9 +1,12 @@
 /*
  * Host.def for building FreeBSD/a.out bindists
  *
- * $XFree86: xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD-aout/host.def,v 1.4 2001/05/31 18:47:07 dawes Exp $
+ * $XFree86: xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD-aout/host.def,v 1.5 2002/12/24 16:14:42 dawes Exp $
  */
 
 #define InstallEmptyHostDef
 #define BuildBindist
 
+#define HasLibpng	YES
+#define LibpngDir	/usr/local
+
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD/bin-list b/xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD/bin-list
index 534362a1c..3b58e6e3b 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD/bin-list
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD/bin-list
@@ -7,7 +7,7 @@ lib/libGLU.so.1
 lib/libGLU.so
 lib/libICE.so.6
 lib/libICE.so
-lib/libOSMesa.so.3
+lib/libOSMesa.so.4
 lib/libOSMesa.so
 lib/libSM.so.6
 lib/libSM.so
@@ -20,11 +20,14 @@ lib/libXTrap.so
 lib/libXaw.so.7
 lib/libXaw.so.6
 lib/libXaw.so
+lib/libXcursor.so.1
+lib/libXcursor.so
 lib/libXext.so.6
 lib/libXext.so
 lib/libXfont.so.1
 lib/libXfont.so
 lib/libXft.so.1
+lib/libXft.so.2
 lib/libXft.so
 lib/libXi.so.6
 lib/libXi.so
@@ -36,7 +39,7 @@ lib/libXp.so.6
 lib/libXp.so
 lib/libXpm.so.4
 lib/libXpm.so
-lib/libXrandr.so.1
+lib/libXrandr.so.2
 lib/libXrandr.so
 lib/libXrender.so.1
 lib/libXrender.so
@@ -44,11 +47,17 @@ lib/libXt.so.6
 lib/libXt.so
 lib/libXtst.so.6
 lib/libXtst.so
+lib/libXv.so.1
+lib/libXv.so
 lib/libdps.so.1
 lib/libdps.so
 lib/libdpstk.so.1
 lib/libdpstk.so
-lib/libfreetype.so.8
+lib/libexpat.so.1
+lib/libexpat.so
+lib/libfontconfig.so.1
+lib/libfontconfig.so
+lib/libfreetype.so.9
 lib/libfreetype.so
 lib/liboldX.so.6
 lib/liboldX.so
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD/etc-dir b/xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD/etc-dir
index 412cec0c3..ee19d5d17 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD/etc-dir
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD/etc-dir
@@ -1 +1 @@
-etc/X11
+etc
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD/etc-list b/xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD/etc-list
index 9c558e357..5198205d9 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD/etc-list
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD/etc-list
@@ -1 +1,2 @@
-.
+X11
+fonts
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD/host.def b/xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD/host.def
index 6e665bd2d..de4b4ef71 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD/host.def
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD/host.def
@@ -1,9 +1,12 @@
 /*
  * Host.def for building FreeBSD bindists
  *
- * $XFree86: xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD/host.def,v 1.4 2001/05/31 18:47:07 dawes Exp $
+ * $XFree86: xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD/host.def,v 1.5 2002/12/24 16:14:41 dawes Exp $
  */
 
 #define InstallEmptyHostDef
 #define BuildBindist
 
+#define HasLibpng	YES
+#define LibpngDir	/usr/local
+
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD/prog-excl b/xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD/prog-excl
index 113d220ef..4537e640f 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD/prog-excl
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD/prog-excl
@@ -1,5 +1,6 @@
 lib/Server
 lib/X11
+lib/aout
 lib/lib*.so*
 lib/modules
 include/X11/bitmaps
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/Interactive/etc-dir b/xc/programs/Xserver/hw/xfree86/etc/bindist/Interactive/etc-dir
index 412cec0c3..ee19d5d17 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/Interactive/etc-dir
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/Interactive/etc-dir
@@ -1 +1 @@
-etc/X11
+etc
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/Interactive/etc-list b/xc/programs/Xserver/hw/xfree86/etc/bindist/Interactive/etc-list
index 9c558e357..5198205d9 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/Interactive/etc-list
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/Interactive/etc-list
@@ -1 +1,2 @@
-.
+X11
+fonts
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-axp/bin-list b/xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-axp/bin-list
index c04fdd8e8..c602c78dc 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-axp/bin-list
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-axp/bin-list
@@ -9,8 +9,8 @@ lib/libGLU.so
 lib/libICE.so.6.3
 lib/libICE.so.6
 lib/libICE.so
-lib/libOSMesa.so.3.3
-lib/libOSMesa.so.3
+lib/libOSMesa.so.4.0
+lib/libOSMesa.so.4
 lib/libOSMesa.so
 lib/libSM.so.6.0
 lib/libSM.so.6
@@ -26,6 +26,9 @@ lib/libXaw.so.6
 lib/libXaw.so.7.0
 lib/libXaw.so.7
 lib/libXaw.so
+lib/libXcursor.so.1.0
+lib/libXcursor.so.1
+lib/libXcursor.so
 lib/libXext.so.6.4
 lib/libXext.so.6
 lib/libXext.so
@@ -34,6 +37,8 @@ lib/libXfont.so.1
 lib/libXfont.so
 lib/libXft.so.1.1
 lib/libXft.so.1
+lib/libXft.so.2.1
+lib/libXft.so.2
 lib/libXft.so
 lib/libXi.so.6.0
 lib/libXi.so.6
@@ -50,10 +55,10 @@ lib/libXp.so
 lib/libXpm.so.4.11
 lib/libXpm.so.4
 lib/libXpm.so
-lib/libXrandr.so.1.0
-lib/libXrandr.so.1
+lib/libXrandr.so.2.0
+lib/libXrandr.so.2
 lib/libXrandr.so
-lib/libXrender.so.1.1
+lib/libXrender.so.1.2
 lib/libXrender.so.1
 lib/libXrender.so
 lib/libXt.so.6.0
@@ -62,13 +67,22 @@ lib/libXt.so
 lib/libXtst.so.6.1
 lib/libXtst.so.6
 lib/libXtst.so
+lib/libXv.so.1.0
+lib/libXv.so.1
+lib/libXv.so
 lib/libdps.so.1.0
 lib/libdps.so.1
 lib/libdps.so
 lib/libdpstk.so.1.0
 lib/libdpstk.so.1
 lib/libdpstk.so
-lib/libfreetype.so.6.2
+lib/libexpat.so.1.0
+lib/libexpat.so.1
+lib/libexpat.so
+lib/libfontconfig.so.1.0
+lib/libfontconfig.so.1
+lib/libfontconfig.so
+lib/libfreetype.so.6.3
 lib/libfreetype.so.6
 lib/libfreetype.so
 lib/libpsres.so.1.0
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-axp/etc-dir b/xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-axp/etc-dir
index 412cec0c3..ee19d5d17 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-axp/etc-dir
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-axp/etc-dir
@@ -1 +1 @@
-etc/X11
+etc
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-axp/etc-list b/xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-axp/etc-list
index 9c558e357..5198205d9 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-axp/etc-list
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-axp/etc-list
@@ -1 +1,2 @@
-.
+X11
+fonts
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-ix86/bin-list b/xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-ix86/bin-list
index c04fdd8e8..c602c78dc 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-ix86/bin-list
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-ix86/bin-list
@@ -9,8 +9,8 @@ lib/libGLU.so
 lib/libICE.so.6.3
 lib/libICE.so.6
 lib/libICE.so
-lib/libOSMesa.so.3.3
-lib/libOSMesa.so.3
+lib/libOSMesa.so.4.0
+lib/libOSMesa.so.4
 lib/libOSMesa.so
 lib/libSM.so.6.0
 lib/libSM.so.6
@@ -26,6 +26,9 @@ lib/libXaw.so.6
 lib/libXaw.so.7.0
 lib/libXaw.so.7
 lib/libXaw.so
+lib/libXcursor.so.1.0
+lib/libXcursor.so.1
+lib/libXcursor.so
 lib/libXext.so.6.4
 lib/libXext.so.6
 lib/libXext.so
@@ -34,6 +37,8 @@ lib/libXfont.so.1
 lib/libXfont.so
 lib/libXft.so.1.1
 lib/libXft.so.1
+lib/libXft.so.2.1
+lib/libXft.so.2
 lib/libXft.so
 lib/libXi.so.6.0
 lib/libXi.so.6
@@ -50,10 +55,10 @@ lib/libXp.so
 lib/libXpm.so.4.11
 lib/libXpm.so.4
 lib/libXpm.so
-lib/libXrandr.so.1.0
-lib/libXrandr.so.1
+lib/libXrandr.so.2.0
+lib/libXrandr.so.2
 lib/libXrandr.so
-lib/libXrender.so.1.1
+lib/libXrender.so.1.2
 lib/libXrender.so.1
 lib/libXrender.so
 lib/libXt.so.6.0
@@ -62,13 +67,22 @@ lib/libXt.so
 lib/libXtst.so.6.1
 lib/libXtst.so.6
 lib/libXtst.so
+lib/libXv.so.1.0
+lib/libXv.so.1
+lib/libXv.so
 lib/libdps.so.1.0
 lib/libdps.so.1
 lib/libdps.so
 lib/libdpstk.so.1.0
 lib/libdpstk.so.1
 lib/libdpstk.so
-lib/libfreetype.so.6.2
+lib/libexpat.so.1.0
+lib/libexpat.so.1
+lib/libexpat.so
+lib/libfontconfig.so.1.0
+lib/libfontconfig.so.1
+lib/libfontconfig.so
+lib/libfreetype.so.6.3
 lib/libfreetype.so.6
 lib/libfreetype.so
 lib/libpsres.so.1.0
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-ix86/etc-dir b/xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-ix86/etc-dir
index 412cec0c3..ee19d5d17 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-ix86/etc-dir
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-ix86/etc-dir
@@ -1 +1 @@
-etc/X11
+etc
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-ix86/etc-list b/xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-ix86/etc-list
index 9c558e357..5198205d9 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-ix86/etc-list
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-ix86/etc-list
@@ -1 +1,2 @@
-.
+X11
+fonts
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-m68k/bin-list b/xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-m68k/bin-list
index c04fdd8e8..c602c78dc 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-m68k/bin-list
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-m68k/bin-list
@@ -9,8 +9,8 @@ lib/libGLU.so
 lib/libICE.so.6.3
 lib/libICE.so.6
 lib/libICE.so
-lib/libOSMesa.so.3.3
-lib/libOSMesa.so.3
+lib/libOSMesa.so.4.0
+lib/libOSMesa.so.4
 lib/libOSMesa.so
 lib/libSM.so.6.0
 lib/libSM.so.6
@@ -26,6 +26,9 @@ lib/libXaw.so.6
 lib/libXaw.so.7.0
 lib/libXaw.so.7
 lib/libXaw.so
+lib/libXcursor.so.1.0
+lib/libXcursor.so.1
+lib/libXcursor.so
 lib/libXext.so.6.4
 lib/libXext.so.6
 lib/libXext.so
@@ -34,6 +37,8 @@ lib/libXfont.so.1
 lib/libXfont.so
 lib/libXft.so.1.1
 lib/libXft.so.1
+lib/libXft.so.2.1
+lib/libXft.so.2
 lib/libXft.so
 lib/libXi.so.6.0
 lib/libXi.so.6
@@ -50,10 +55,10 @@ lib/libXp.so
 lib/libXpm.so.4.11
 lib/libXpm.so.4
 lib/libXpm.so
-lib/libXrandr.so.1.0
-lib/libXrandr.so.1
+lib/libXrandr.so.2.0
+lib/libXrandr.so.2
 lib/libXrandr.so
-lib/libXrender.so.1.1
+lib/libXrender.so.1.2
 lib/libXrender.so.1
 lib/libXrender.so
 lib/libXt.so.6.0
@@ -62,13 +67,22 @@ lib/libXt.so
 lib/libXtst.so.6.1
 lib/libXtst.so.6
 lib/libXtst.so
+lib/libXv.so.1.0
+lib/libXv.so.1
+lib/libXv.so
 lib/libdps.so.1.0
 lib/libdps.so.1
 lib/libdps.so
 lib/libdpstk.so.1.0
 lib/libdpstk.so.1
 lib/libdpstk.so
-lib/libfreetype.so.6.2
+lib/libexpat.so.1.0
+lib/libexpat.so.1
+lib/libexpat.so
+lib/libfontconfig.so.1.0
+lib/libfontconfig.so.1
+lib/libfontconfig.so
+lib/libfreetype.so.6.3
 lib/libfreetype.so.6
 lib/libfreetype.so
 lib/libpsres.so.1.0
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-m68k/etc-dir b/xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-m68k/etc-dir
index 412cec0c3..ee19d5d17 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-m68k/etc-dir
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-m68k/etc-dir
@@ -1 +1 @@
-etc/X11
+etc
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-m68k/etc-list b/xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-m68k/etc-list
index 9c558e357..5198205d9 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-m68k/etc-list
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-m68k/etc-list
@@ -1 +1,2 @@
-.
+X11
+fonts
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-mips/bin-list b/xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-mips/bin-list
index c04fdd8e8..c602c78dc 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-mips/bin-list
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-mips/bin-list
@@ -9,8 +9,8 @@ lib/libGLU.so
 lib/libICE.so.6.3
 lib/libICE.so.6
 lib/libICE.so
-lib/libOSMesa.so.3.3
-lib/libOSMesa.so.3
+lib/libOSMesa.so.4.0
+lib/libOSMesa.so.4
 lib/libOSMesa.so
 lib/libSM.so.6.0
 lib/libSM.so.6
@@ -26,6 +26,9 @@ lib/libXaw.so.6
 lib/libXaw.so.7.0
 lib/libXaw.so.7
 lib/libXaw.so
+lib/libXcursor.so.1.0
+lib/libXcursor.so.1
+lib/libXcursor.so
 lib/libXext.so.6.4
 lib/libXext.so.6
 lib/libXext.so
@@ -34,6 +37,8 @@ lib/libXfont.so.1
 lib/libXfont.so
 lib/libXft.so.1.1
 lib/libXft.so.1
+lib/libXft.so.2.1
+lib/libXft.so.2
 lib/libXft.so
 lib/libXi.so.6.0
 lib/libXi.so.6
@@ -50,10 +55,10 @@ lib/libXp.so
 lib/libXpm.so.4.11
 lib/libXpm.so.4
 lib/libXpm.so
-lib/libXrandr.so.1.0
-lib/libXrandr.so.1
+lib/libXrandr.so.2.0
+lib/libXrandr.so.2
 lib/libXrandr.so
-lib/libXrender.so.1.1
+lib/libXrender.so.1.2
 lib/libXrender.so.1
 lib/libXrender.so
 lib/libXt.so.6.0
@@ -62,13 +67,22 @@ lib/libXt.so
 lib/libXtst.so.6.1
 lib/libXtst.so.6
 lib/libXtst.so
+lib/libXv.so.1.0
+lib/libXv.so.1
+lib/libXv.so
 lib/libdps.so.1.0
 lib/libdps.so.1
 lib/libdps.so
 lib/libdpstk.so.1.0
 lib/libdpstk.so.1
 lib/libdpstk.so
-lib/libfreetype.so.6.2
+lib/libexpat.so.1.0
+lib/libexpat.so.1
+lib/libexpat.so
+lib/libfontconfig.so.1.0
+lib/libfontconfig.so.1
+lib/libfontconfig.so
+lib/libfreetype.so.6.3
 lib/libfreetype.so.6
 lib/libfreetype.so
 lib/libpsres.so.1.0
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-mips/etc-dir b/xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-mips/etc-dir
index 412cec0c3..ee19d5d17 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-mips/etc-dir
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-mips/etc-dir
@@ -1 +1 @@
-etc/X11
+etc
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-mips/etc-list b/xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-mips/etc-list
index 9c558e357..5198205d9 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-mips/etc-list
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-mips/etc-list
@@ -1 +1,2 @@
-.
+X11
+fonts
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-ppc/bin-list b/xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-ppc/bin-list
index c04fdd8e8..c602c78dc 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-ppc/bin-list
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-ppc/bin-list
@@ -9,8 +9,8 @@ lib/libGLU.so
 lib/libICE.so.6.3
 lib/libICE.so.6
 lib/libICE.so
-lib/libOSMesa.so.3.3
-lib/libOSMesa.so.3
+lib/libOSMesa.so.4.0
+lib/libOSMesa.so.4
 lib/libOSMesa.so
 lib/libSM.so.6.0
 lib/libSM.so.6
@@ -26,6 +26,9 @@ lib/libXaw.so.6
 lib/libXaw.so.7.0
 lib/libXaw.so.7
 lib/libXaw.so
+lib/libXcursor.so.1.0
+lib/libXcursor.so.1
+lib/libXcursor.so
 lib/libXext.so.6.4
 lib/libXext.so.6
 lib/libXext.so
@@ -34,6 +37,8 @@ lib/libXfont.so.1
 lib/libXfont.so
 lib/libXft.so.1.1
 lib/libXft.so.1
+lib/libXft.so.2.1
+lib/libXft.so.2
 lib/libXft.so
 lib/libXi.so.6.0
 lib/libXi.so.6
@@ -50,10 +55,10 @@ lib/libXp.so
 lib/libXpm.so.4.11
 lib/libXpm.so.4
 lib/libXpm.so
-lib/libXrandr.so.1.0
-lib/libXrandr.so.1
+lib/libXrandr.so.2.0
+lib/libXrandr.so.2
 lib/libXrandr.so
-lib/libXrender.so.1.1
+lib/libXrender.so.1.2
 lib/libXrender.so.1
 lib/libXrender.so
 lib/libXt.so.6.0
@@ -62,13 +67,22 @@ lib/libXt.so
 lib/libXtst.so.6.1
 lib/libXtst.so.6
 lib/libXtst.so
+lib/libXv.so.1.0
+lib/libXv.so.1
+lib/libXv.so
 lib/libdps.so.1.0
 lib/libdps.so.1
 lib/libdps.so
 lib/libdpstk.so.1.0
 lib/libdpstk.so.1
 lib/libdpstk.so
-lib/libfreetype.so.6.2
+lib/libexpat.so.1.0
+lib/libexpat.so.1
+lib/libexpat.so
+lib/libfontconfig.so.1.0
+lib/libfontconfig.so.1
+lib/libfontconfig.so
+lib/libfreetype.so.6.3
 lib/libfreetype.so.6
 lib/libfreetype.so
 lib/libpsres.so.1.0
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-ppc/etc-dir b/xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-ppc/etc-dir
index 412cec0c3..ee19d5d17 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-ppc/etc-dir
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-ppc/etc-dir
@@ -1 +1 @@
-etc/X11
+etc
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-ppc/etc-list b/xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-ppc/etc-list
index 9c558e357..5198205d9 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-ppc/etc-list
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-ppc/etc-list
@@ -1 +1,2 @@
-.
+X11
+fonts
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/LynxOS/etc-dir b/xc/programs/Xserver/hw/xfree86/etc/bindist/LynxOS/etc-dir
index 412cec0c3..ee19d5d17 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/LynxOS/etc-dir
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/LynxOS/etc-dir
@@ -1 +1 @@
-etc/X11
+etc
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/LynxOS/etc-list b/xc/programs/Xserver/hw/xfree86/etc/bindist/LynxOS/etc-list
index 9c558e357..5198205d9 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/LynxOS/etc-list
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/LynxOS/etc-list
@@ -1 +1,2 @@
-.
+X11
+fonts
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/NetBSD-aout-ix86/bin-list b/xc/programs/Xserver/hw/xfree86/etc/bindist/NetBSD-aout-ix86/bin-list
index 610791988..2d279ecdd 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/NetBSD-aout-ix86/bin-list
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/NetBSD-aout-ix86/bin-list
@@ -3,25 +3,31 @@ bin
 lib/libGL.so.1.2
 lib/libGLU.so.1.3
 lib/libICE.so.6.3
+lib/libOSMesa.so.4.0
 lib/libSM.so.6.0
 lib/libX11.so.6.2
 lib/libXTrap.so.6.4
 lib/libXaw.so.6.1
 lib/libXaw.so.7.0
+lib/libXcursor.so.1.0
 lib/libXext.so.6.4
 lib/libXfont.so.1.4
 lib/libXft.so.1.1
+lib/libXft.so.2.1
 lib/libXi.so.6.0
 lib/libXmu.so.6.2
 lib/libXmuu.so.1.0
 lib/libXp.so.6.2
 lib/libXpm.so.4.11
-lib/libXrandr.so.1.0
-lib/libXrender.so.1.1
+lib/libXrandr.so.2.0
+lib/libXrender.so.1.2
 lib/libXt.so.6.0
 lib/libXtst.so.6.1
+lib/libXv.so.1.0
 lib/libdps.so.1.0
 lib/libdpstk.so.1.0
-lib/libfreetype.so.8.0
+lib/libexpat.so.1.0
+lib/libfontconfig.so.1.0
+lib/libfreetype.so.9.0
 lib/liboldX.so.6.0
 lib/libpsres.so.1.0
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/NetBSD-aout-ix86/etc-dir b/xc/programs/Xserver/hw/xfree86/etc/bindist/NetBSD-aout-ix86/etc-dir
index 412cec0c3..ee19d5d17 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/NetBSD-aout-ix86/etc-dir
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/NetBSD-aout-ix86/etc-dir
@@ -1 +1 @@
-etc/X11
+etc
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/NetBSD-aout-ix86/etc-list b/xc/programs/Xserver/hw/xfree86/etc/bindist/NetBSD-aout-ix86/etc-list
index 9c558e357..00550c517 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/NetBSD-aout-ix86/etc-list
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/NetBSD-aout-ix86/etc-list
@@ -1 +1 @@
-.
+fonts
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/NetBSD-aout-ix86/host.def b/xc/programs/Xserver/hw/xfree86/etc/bindist/NetBSD-aout-ix86/host.def
index c636f8990..6d74aca78 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/NetBSD-aout-ix86/host.def
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/NetBSD-aout-ix86/host.def
@@ -1,9 +1,12 @@
 /*
  * Host.def for building NetBSD bindists
  *
- * $XFree86: xc/programs/Xserver/hw/xfree86/etc/bindist/NetBSD-aout-ix86/host.def,v 1.2 2001/05/31 18:47:09 dawes Exp $
+ * $XFree86: xc/programs/Xserver/hw/xfree86/etc/bindist/NetBSD-aout-ix86/host.def,v 1.3 2002/12/24 16:14:42 dawes Exp $
  */
 
 #define InstallEmptyHostDef
 #define BuildBindist
 
+#define HasLibpng	YES
+#define LibpngDir	/usr/pkg
+
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/NetBSD-ix86/bin-list b/xc/programs/Xserver/hw/xfree86/etc/bindist/NetBSD-ix86/bin-list
index f95339dc0..588fda257 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/NetBSD-ix86/bin-list
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/NetBSD-ix86/bin-list
@@ -9,6 +9,9 @@ lib/libGLU.so.1.3
 lib/libICE.so
 lib/libICE.so.6
 lib/libICE.so.6.3
+lib/libOSMesa.so
+lib/libOSMesa.so.4
+lib/libOSMesa.so.4.0
 lib/libSM.so
 lib/libSM.so.6
 lib/libSM.so.6.0
@@ -23,6 +26,9 @@ lib/libXaw.so.6
 lib/libXaw.so.6.1
 lib/libXaw.so.7
 lib/libXaw.so.7.0
+lib/libXcursor.so
+lib/libXcursor.so.1
+lib/libXcursor.so.1.0
 lib/libXext.so
 lib/libXext.so.6
 lib/libXext.so.6.4
@@ -32,6 +38,8 @@ lib/libXfont.so.1.4
 lib/libXft.so
 lib/libXft.so.1
 lib/libXft.so.1.1
+lib/libXft.so.2
+lib/libXft.so.2.1
 lib/libXi.so
 lib/libXi.so.6
 lib/libXi.so.6.0
@@ -48,26 +56,35 @@ lib/libXpm.so
 lib/libXpm.so.4
 lib/libXpm.so.4.11
 lib/libXrandr.so
-lib/libXrandr.so.1
-lib/libXrandr.so.1.0
+lib/libXrandr.so.2
+lib/libXrandr.so.2.0
 lib/libXrender.so
 lib/libXrender.so.1
-lib/libXrender.so.1.1
+lib/libXrender.so.1.2
 lib/libXt.so
 lib/libXt.so.6
 lib/libXt.so.6.0
 lib/libXtst.so
 lib/libXtst.so.6
 lib/libXtst.so.6.1
+lib/libXv.so
+lib/libXv.so.1
+lib/libXv.so.1.0
 lib/libdps.so
 lib/libdps.so.1
 lib/libdps.so.1.0
 lib/libdpstk.so
 lib/libdpstk.so.1
 lib/libdpstk.so.1.0
+lib/libexpat.so
+lib/libexpat.so.1
+lib/libexpat.so.1.0
+lib/libfontconfig.so
+lib/libfontconfig.so.1
+lib/libfontconfig.so.1.0
 lib/libfreetype.so
-lib/libfreetype.so.8
-lib/libfreetype.so.8.0
+lib/libfreetype.so.9
+lib/libfreetype.so.9.0
 lib/liboldX.so
 lib/liboldX.so.6
 lib/liboldX.so.6.0
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/NetBSD-ix86/etc-dir b/xc/programs/Xserver/hw/xfree86/etc/bindist/NetBSD-ix86/etc-dir
index 412cec0c3..ee19d5d17 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/NetBSD-ix86/etc-dir
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/NetBSD-ix86/etc-dir
@@ -1 +1 @@
-etc/X11
+etc
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/NetBSD-ix86/etc-list b/xc/programs/Xserver/hw/xfree86/etc/bindist/NetBSD-ix86/etc-list
index 9c558e357..00550c517 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/NetBSD-ix86/etc-list
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/NetBSD-ix86/etc-list
@@ -1 +1 @@
-.
+fonts
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/NetBSD-ix86/host.def b/xc/programs/Xserver/hw/xfree86/etc/bindist/NetBSD-ix86/host.def
index d82901432..e9311499f 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/NetBSD-ix86/host.def
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/NetBSD-ix86/host.def
@@ -1,9 +1,16 @@
 /*
  * Host.def for building NetBSD bindists
  *
- * $XFree86: xc/programs/Xserver/hw/xfree86/etc/bindist/NetBSD-ix86/host.def,v 1.4 2001/05/31 18:47:09 dawes Exp $
+ * $XFree86: xc/programs/Xserver/hw/xfree86/etc/bindist/NetBSD-ix86/host.def,v 1.6 2003/01/12 14:15:31 herrb Exp $
  */
 
 #define InstallEmptyHostDef
 #define BuildBindist
 
+/*
+ * These defines assume libpng is installed from the packages system
+ */
+#define HasLibpng	YES
+#define LibpngDir	/usr/pkg
+
+#define SystemBuildLibPath	/usr/lib:/usr/pkg/lib
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/OpenBSD-ix86/bin-list b/xc/programs/Xserver/hw/xfree86/etc/bindist/OpenBSD-ix86/bin-list
index 44d441494..65fd6cbf6 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/OpenBSD-ix86/bin-list
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/OpenBSD-ix86/bin-list
@@ -3,26 +3,32 @@ bin
 lib/libGL.so.1.2
 lib/libGLU.so.1.3
 lib/libICE.so.6.3
+lib/libOSMesa.so.4.0
 lib/libSM.so.6.0
 lib/libX11.so.6.2
 lib/libXThrStub.so.6.1
 lib/libXTrap.so.6.4
 lib/libXaw.so.6.1
 lib/libXaw.so.7.0
+lib/libXcursor.so.1.0
 lib/libXext.so.6.4
 lib/libXfont.so.1.4
 lib/libXft.so.1.1
+lib/libXft.so.2.1
 lib/libXi.so.6.0
 lib/libXmu.so.6.2
 lib/libXmuu.so.1.0
 lib/libXp.so.6.2
 lib/libXpm.so.4.11
-lib/libXrandr.so.1.0
-lib/libXrender.so.1.1
+lib/libXrandr.so.2.0
+lib/libXrender.so.1.2
 lib/libXt.so.6.0
 lib/libXtst.so.6.1
+lib/libXv.so.1.0
 lib/libdps.so.1.0
 lib/libdpstk.so.1.0
-lib/libfreetype.so.8.0
+lib/libexpat.so.1.0
+lib/libfontconfig.so.1.0
+lib/libfreetype.so.9.0
 lib/liboldX.so.6.0
 lib/libpsres.so.1.0
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/OpenBSD-ix86/etc-dir b/xc/programs/Xserver/hw/xfree86/etc/bindist/OpenBSD-ix86/etc-dir
index 412cec0c3..ee19d5d17 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/OpenBSD-ix86/etc-dir
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/OpenBSD-ix86/etc-dir
@@ -1 +1 @@
-etc/X11
+etc
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/OpenBSD-ix86/etc-list b/xc/programs/Xserver/hw/xfree86/etc/bindist/OpenBSD-ix86/etc-list
index 9c558e357..5198205d9 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/OpenBSD-ix86/etc-list
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/OpenBSD-ix86/etc-list
@@ -1 +1,2 @@
-.
+X11
+fonts
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/OpenBSD-ix86/host.def b/xc/programs/Xserver/hw/xfree86/etc/bindist/OpenBSD-ix86/host.def
index 764b22118..46e1e50b5 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/OpenBSD-ix86/host.def
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/OpenBSD-ix86/host.def
@@ -1,7 +1,7 @@
 /*
  * Host.def for building OpenBSD/ix86 bindists
  *
- * $XFree86: xc/programs/Xserver/hw/xfree86/etc/bindist/OpenBSD-ix86/host.def,v 1.4 2001/05/31 18:47:10 dawes Exp $
+ * $XFree86: xc/programs/Xserver/hw/xfree86/etc/bindist/OpenBSD-ix86/host.def,v 1.7 2002/12/30 16:35:10 herrb Exp $
  */
 
 #define InstallEmptyHostDef
@@ -9,8 +9,13 @@
 
 #define ForceNormalLib		YES
 
-#define HasTcl			YES
-#define HasTk			YES
-#define TkLibName		tk41
-#define TclLibName		tcl75
-
+/*
+ *  These defines assume libpng is installed from the ports tree
+ */
+#define HasLibpng               YES
+#define LibpngDir               /usr/local
+#define LibpngDirStandard       NO
+#define LibpngIncDir            /usr/local/include/libpng
+#define LibpngIncDirStandard    NO
+#define LibpngLibDir            /usr/local/lib
+#define LibpngLibDirStandard    NO
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/SVR4.0/bin-list b/xc/programs/Xserver/hw/xfree86/etc/bindist/SVR4.0/bin-list
index 29239e07c..bbffd2e95 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/SVR4.0/bin-list
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/SVR4.0/bin-list
@@ -15,11 +15,14 @@ lib/libXTrap.so
 lib/libXaw.so.6.1
 lib/libXaw.so.7.0
 lib/libXaw.so
+lib/libXcursor.so.1.0
+lib/libXcursor.so
 lib/libXext.so.6.4
 lib/libXext.so
 lib/libXfont.so.1.4
 lib/libXfont.so
 lib/libXft.so.1.1
+lib/libXft.so.2.1
 lib/libXft.so
 lib/libXi.so.6.0
 lib/libXi.so
@@ -31,19 +34,25 @@ lib/libXp.so.6.2
 lib/libXp.so
 lib/libXpm.so.4.11
 lib/libXpm.so
-lib/libXrandr.so.1.0
+lib/libXrandr.so.2.0
 lib/libXrandr.so
-lib/libXrender.so.1.1
+lib/libXrender.so.1.2
 lib/libXrender.so
 lib/libXt.so.6.0
 lib/libXt.so
 lib/libXtst.so.6.1
 lib/libXtst.so
+lib/libXv.so.1.0
+lib/libXv.so
 lib/libdps.so.1.0
 lib/libdps.so
 lib/libdpstk.so.1.0
 lib/libdpstk.so
-lib/libfreetype.so.6.2
+lib/libexpat.so.1.0
+lib/libexpat.so
+lib/libfontconfig.so.1.0
+lib/libfontconfig.so
+lib/libfreetype.so.6.3
 lib/libfreetype.so
 lib/libpsres.so.1.0
 lib/libpsres.so
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/SVR4.0/etc-dir b/xc/programs/Xserver/hw/xfree86/etc/bindist/SVR4.0/etc-dir
index 412cec0c3..ee19d5d17 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/SVR4.0/etc-dir
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/SVR4.0/etc-dir
@@ -1 +1 @@
-etc/X11
+etc
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/SVR4.0/etc-list b/xc/programs/Xserver/hw/xfree86/etc/bindist/SVR4.0/etc-list
index 9c558e357..5198205d9 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/SVR4.0/etc-list
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/SVR4.0/etc-list
@@ -1 +1,2 @@
-.
+X11
+fonts
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/SVR4.0/host.def b/xc/programs/Xserver/hw/xfree86/etc/bindist/SVR4.0/host.def
index 57dcecf59..0c9176ec1 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/SVR4.0/host.def
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/SVR4.0/host.def
@@ -1,7 +1,7 @@
 /*
  * Host.def for building SVR4.0 bindists
  *
- * $XFree86: xc/programs/Xserver/hw/xfree86/etc/bindist/SVR4.0/host.def,v 1.5 2001/05/31 18:47:10 dawes Exp $
+ * $XFree86: xc/programs/Xserver/hw/xfree86/etc/bindist/SVR4.0/host.def,v 1.6 2002/12/24 16:14:45 dawes Exp $
  */
 
 #define InstallEmptyHostDef
@@ -9,3 +9,6 @@
 
 #define ForceNormalLib YES
 
+#define HasLibpng	YES
+#define LibpngDir	/usr/local
+
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/Solaris/bin-list b/xc/programs/Xserver/hw/xfree86/etc/bindist/Solaris/bin-list
index 29239e07c..e21a5268c 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/Solaris/bin-list
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/Solaris/bin-list
@@ -6,6 +6,8 @@ lib/libGLU.so.1.3
 lib/libGLU.so
 lib/libICE.so.6.3
 lib/libICE.so
+lib/libOSMesa.so.4.0
+lib/libOSMesa.so
 lib/libSM.so.6.0
 lib/libSM.so
 lib/libX11.so.6.2
@@ -15,11 +17,14 @@ lib/libXTrap.so
 lib/libXaw.so.6.1
 lib/libXaw.so.7.0
 lib/libXaw.so
+lib/libXcursor.so.1.0
+lib/libXcursor.so
 lib/libXext.so.6.4
 lib/libXext.so
 lib/libXfont.so.1.4
 lib/libXfont.so
 lib/libXft.so.1.1
+lib/libXft.so.2.1
 lib/libXft.so
 lib/libXi.so.6.0
 lib/libXi.so
@@ -31,19 +36,25 @@ lib/libXp.so.6.2
 lib/libXp.so
 lib/libXpm.so.4.11
 lib/libXpm.so
-lib/libXrandr.so.1.0
+lib/libXrandr.so.2.0
 lib/libXrandr.so
-lib/libXrender.so.1.1
+lib/libXrender.so.1.2
 lib/libXrender.so
 lib/libXt.so.6.0
 lib/libXt.so
 lib/libXtst.so.6.1
 lib/libXtst.so
+lib/libXv.so.1.0
+lib/libXv.so
 lib/libdps.so.1.0
 lib/libdps.so
 lib/libdpstk.so.1.0
 lib/libdpstk.so
-lib/libfreetype.so.6.2
+lib/libexpat.so.1.0
+lib/libexpat.so
+lib/libfontconfig.so.1.0
+lib/libfontconfig.so
+lib/libfreetype.so.6.3
 lib/libfreetype.so
 lib/libpsres.so.1.0
 lib/libpsres.so
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/Solaris/etc-dir b/xc/programs/Xserver/hw/xfree86/etc/bindist/Solaris/etc-dir
index 412cec0c3..ee19d5d17 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/Solaris/etc-dir
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/Solaris/etc-dir
@@ -1 +1 @@
-etc/X11
+etc
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/Solaris/etc-list b/xc/programs/Xserver/hw/xfree86/etc/bindist/Solaris/etc-list
index 9c558e357..5198205d9 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/Solaris/etc-list
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/Solaris/etc-list
@@ -1 +1,2 @@
-.
+X11
+fonts
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/Solaris/host.def b/xc/programs/Xserver/hw/xfree86/etc/bindist/Solaris/host.def
index 41184b1d9..12700249d 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/Solaris/host.def
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/Solaris/host.def
@@ -1,7 +1,7 @@
 /*
  * Host.def for building Solaris bindists
  *
- * $XFree86: xc/programs/Xserver/hw/xfree86/etc/bindist/Solaris/host.def,v 1.5 2001/05/31 18:47:11 dawes Exp $
+ * $XFree86: xc/programs/Xserver/hw/xfree86/etc/bindist/Solaris/host.def,v 1.6 2002/12/24 16:14:45 dawes Exp $
  */
 
 #define InstallEmptyHostDef
@@ -9,3 +9,6 @@
 
 #define ForceNormalLib YES
 
+#define HasLibpng	YES
+#define LibpngDir	/usr/local
+
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/UnixWare/bin-list b/xc/programs/Xserver/hw/xfree86/etc/bindist/UnixWare/bin-list
index 29239e07c..e21a5268c 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/UnixWare/bin-list
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/UnixWare/bin-list
@@ -6,6 +6,8 @@ lib/libGLU.so.1.3
 lib/libGLU.so
 lib/libICE.so.6.3
 lib/libICE.so
+lib/libOSMesa.so.4.0
+lib/libOSMesa.so
 lib/libSM.so.6.0
 lib/libSM.so
 lib/libX11.so.6.2
@@ -15,11 +17,14 @@ lib/libXTrap.so
 lib/libXaw.so.6.1
 lib/libXaw.so.7.0
 lib/libXaw.so
+lib/libXcursor.so.1.0
+lib/libXcursor.so
 lib/libXext.so.6.4
 lib/libXext.so
 lib/libXfont.so.1.4
 lib/libXfont.so
 lib/libXft.so.1.1
+lib/libXft.so.2.1
 lib/libXft.so
 lib/libXi.so.6.0
 lib/libXi.so
@@ -31,19 +36,25 @@ lib/libXp.so.6.2
 lib/libXp.so
 lib/libXpm.so.4.11
 lib/libXpm.so
-lib/libXrandr.so.1.0
+lib/libXrandr.so.2.0
 lib/libXrandr.so
-lib/libXrender.so.1.1
+lib/libXrender.so.1.2
 lib/libXrender.so
 lib/libXt.so.6.0
 lib/libXt.so
 lib/libXtst.so.6.1
 lib/libXtst.so
+lib/libXv.so.1.0
+lib/libXv.so
 lib/libdps.so.1.0
 lib/libdps.so
 lib/libdpstk.so.1.0
 lib/libdpstk.so
-lib/libfreetype.so.6.2
+lib/libexpat.so.1.0
+lib/libexpat.so
+lib/libfontconfig.so.1.0
+lib/libfontconfig.so
+lib/libfreetype.so.6.3
 lib/libfreetype.so
 lib/libpsres.so.1.0
 lib/libpsres.so
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/UnixWare/etc-dir b/xc/programs/Xserver/hw/xfree86/etc/bindist/UnixWare/etc-dir
index 412cec0c3..ee19d5d17 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/UnixWare/etc-dir
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/UnixWare/etc-dir
@@ -1 +1 @@
-etc/X11
+etc
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/UnixWare/etc-list b/xc/programs/Xserver/hw/xfree86/etc/bindist/UnixWare/etc-list
index 9c558e357..5198205d9 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/UnixWare/etc-list
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/UnixWare/etc-list
@@ -1 +1,2 @@
-.
+X11
+fonts
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/UnixWare/host.def b/xc/programs/Xserver/hw/xfree86/etc/bindist/UnixWare/host.def
index dcb4603f5..2707d10ea 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/UnixWare/host.def
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/UnixWare/host.def
@@ -1,7 +1,7 @@
 /*
  * Host.def for building UnixWare bindists
  *
- * $XFree86: xc/programs/Xserver/hw/xfree86/etc/bindist/UnixWare/host.def,v 1.5 2001/05/31 18:47:11 dawes Exp $
+ * $XFree86: xc/programs/Xserver/hw/xfree86/etc/bindist/UnixWare/host.def,v 1.6 2002/12/24 16:14:45 dawes Exp $
  */
 
 #define InstallEmptyHostDef
@@ -9,3 +9,6 @@
 
 #define ForceNormalLib YES
 
+#define HasLibpng	YES
+#define LibpngDir	/usr/local
+
diff --git a/xc/programs/Xserver/hw/xfree86/etc/bindist/build-bindist b/xc/programs/Xserver/hw/xfree86/etc/bindist/build-bindist
index 8c7c3dfef..ed2477318 100755
--- a/xc/programs/Xserver/hw/xfree86/etc/bindist/build-bindist
+++ b/xc/programs/Xserver/hw/xfree86/etc/bindist/build-bindist
@@ -1,6 +1,6 @@
 #!/bin/sh
 #
-# $XFree86: xc/programs/Xserver/hw/xfree86/etc/bindist/build-bindist,v 1.5 2001/05/31 18:39:06 dawes Exp $
+# $XFree86: xc/programs/Xserver/hw/xfree86/etc/bindist/build-bindist,v 1.6 2003/02/08 23:11:49 dawes Exp $
 #
 
 Usage()
@@ -103,6 +103,9 @@ if [ $createlist = YES ]; then
   exit 0;
 fi
 
+# Make sure all directories in $FROMDIR have permissions 755
+find $FROMDIR -type d | xargs chmod 755
+
 for d in $SUBDIRS; do
   if [ ! -d $TODIR/$d ]; then
     echo No such dir $TODIR/$d
diff --git a/xc/programs/Xserver/hw/xfree86/etc/extramodes b/xc/programs/Xserver/hw/xfree86/etc/extramodes
index 1c9462bfe..f7dc01216 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/extramodes
+++ b/xc/programs/Xserver/hw/xfree86/etc/extramodes
@@ -1,7 +1,7 @@
 //
 // Extra modes to include as default modes in the X server.
 //
-// $XFree86: xc/programs/Xserver/hw/xfree86/etc/extramodes,v 1.5 2002/06/05 19:43:05 dawes Exp $
+// $XFree86: xc/programs/Xserver/hw/xfree86/etc/extramodes,v 1.6 2002/11/11 04:21:46 dawes Exp $
 //
 
 # 832x624 @ 75Hz (74.55Hz) (fix if the official/Apple spec is different) hsync: 49.725kHz
@@ -19,3 +19,15 @@ ModeLine "1400x1050" 155.8 1400 1464 1784 1912   1050 1052 1064 1090 +hsync +vsy
 # 1600x1024 @ 60Hz (SGI 1600SW) hsync: 64.0kHz
 Modeline "1600x1024" 106.910 1600 1620 1640 1670 1024 1027 1030 1067 -hsync -vsync
 
+# 1920x1440 @ 85Hz (VESA GTF) hsync: 128.5kHz
+Modeline "1920x1440" 341.35  1920 2072 2288 2656  1440 1441 1444 1512 -hsync +vsync
+
+# 2048x1536 @ 60Hz (VESA GTF) hsync: 95.3kHz
+Modeline "2048x1536" 266.95  2048 2200 2424 2800  1536 1537 1540 1589 -hsync +vsync
+
+# 2048x1536 @ 75Hz (VESA GTF) hsync: 120.2kHz
+Modeline "2048x1536" 340.48  2048 2216 2440 2832  1536 1537 1540 1603 -hsync +vsync
+
+# 2048x1536 @ 85Hz (VESA GTF) hsync: 137.0kHz
+Modeline "2048x1536" 388.04  2048 2216 2440 2832  1536 1537 1540 1612 -hsync +vsync
+
diff --git a/xc/programs/Xserver/hw/xfree86/etc/extrapci.ids b/xc/programs/Xserver/hw/xfree86/etc/extrapci.ids
index 4bec5cdfc..926e1a75f 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/extrapci.ids
+++ b/xc/programs/Xserver/hw/xfree86/etc/extrapci.ids
@@ -14,7 +14,7 @@
 #	changes/additions that aren't XFree86-specific to the pciids
 #	project (http://pciids.sf.net/).
 #
-#	$XFree86: xc/programs/Xserver/hw/xfree86/etc/extrapci.ids,v 1.3 2002/09/16 18:06:06 eich Exp $
+#	$XFree86: xc/programs/Xserver/hw/xfree86/etc/extrapci.ids,v 1.7 2003/02/06 04:18:09 dawes Exp $
 #
 
 # Vendors, devices and subsystems. Please keep sorted.
@@ -26,4 +26,20 @@
 #		subvendor subdevice  subsystem_name	<-- two tabs
 #
 # Use lower-case hex digits for all numeric values.
-	0c30  F69030
+
+# Example: Add a new chipset for vendor who's ID is xyzw
+#
+# xyzw	"
+#	20ce	New Chipset Description
+
+1102	"
+	0002	"
+		C  0401
+
+# Intel(R) 852GM/855GM, 865G
+8086	"
+	3580	852GM/852GME/855GM/855GME Chipset Host-Hub Bridge
+	3582	852GM/852GME/855GM/855GME Chipset Graphics Controller
+	2570	865G Chipset Host-Hub Bridge
+	2572	865G Chipset Graphics Controller
+
diff --git a/xc/programs/Xserver/hw/xfree86/etc/gtf.c b/xc/programs/Xserver/hw/xfree86/etc/gtf.c
new file mode 100644
index 000000000..b0d9de058
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/etc/gtf.c
@@ -0,0 +1,743 @@
+/* gtf.c  Generate mode timings using the GTF Timing Standard
+ *
+ * gcc gtf.c -o gtf -lm -Wall
+ *
+ * Copyright (c) 2001, Andy Ritger  aritger@nvidia.com
+ * All rights reserved.
+ * 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 
+ * o Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * o Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer
+ *   in the documentation and/or other materials provided with the
+ *   distribution.
+ * o Neither the name of NVIDIA nor the names of its contributors
+ *   may be used to endorse or promote products derived from this
+ *   software without specific prior written permission.
+ *
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT
+ * NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND
+ * FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
+ * THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * 
+ *
+ * This program is based on the Generalized Timing Formula(GTF TM)
+ * Standard Version: 1.0, Revision: 1.0
+ *
+ * The GTF Document contains the following Copyright information:
+ *
+ * Copyright (c) 1994, 1995, 1996 - Video Electronics Standards
+ * Association. Duplication of this document within VESA member
+ * companies for review purposes is permitted. All other rights
+ * reserved.
+ *
+ * While every precaution has been taken in the preparation
+ * of this standard, the Video Electronics Standards Association and
+ * its contributors assume no responsibility for errors or omissions,
+ * and make no warranties, expressed or implied, of functionality
+ * of suitability for any purpose. The sample code contained within
+ * this standard may be used without restriction.
+ *
+ * 
+ *
+ * The GTF EXCEL(TM) SPREADSHEET, a sample (and the definitive)
+ * implementation of the GTF Timing Standard, is available at:
+ *
+ * ftp://ftp.vesa.org/pub/GTF/GTF_V1R1.xls
+ *
+ *
+ *
+ * This program takes a desired resolution and vertical refresh rate,
+ * and computes mode timings according to the GTF Timing Standard.
+ * These mode timings can then be formatted as an XFree86 modeline
+ * or a mode description for use by fbset(8).
+ *
+ *
+ *
+ * NOTES:
+ *
+ * The GTF allows for computation of "margins" (the visible border
+ * surrounding the addressable video); on most non-overscan type
+ * systems, the margin period is zero.  I've implemented the margin
+ * computations but not enabled it because 1) I don't really have
+ * any experience with this, and 2) neither XFree86 modelines nor
+ * fbset fb.modes provide an obvious way for margin timings to be
+ * included in their mode descriptions (needs more investigation).
+ * 
+ * The GTF provides for computation of interlaced mode timings;
+ * I've implemented the computations but not enabled them, yet.
+ * I should probably enable and test this at some point.
+ *
+ * 
+ *
+ * TODO:
+ *
+ * o Add support for interlaced modes.
+ *
+ * o Implement the other portions of the GTF: compute mode timings
+ *   given either the desired pixel clock or the desired horizontal
+ *   frequency.
+ *
+ * o It would be nice if this were more general purpose to do things
+ *   outside the scope of the GTF: like generate double scan mode
+ *   timings, for example.
+ *   
+ * o Printing digits to the right of the decimal point when the
+ *   digits are 0 annoys me.
+ *
+ * o Error checking.
+ *
+ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/etc/gtf.c,v 1.3 2002/12/21 02:35:20 dawes Exp $ */
+
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <math.h>
+
+
+#if defined(__Lynx__)
+#define rint(x) floor(x)
+#endif
+
+#define MARGIN_PERCENT    1.8   /* % of active vertical image                */
+#define CELL_GRAN         8.0   /* assumed character cell granularity        */
+#define MIN_PORCH         1     /* minimum front porch                       */
+#define V_SYNC_RQD        3     /* width of vsync in lines                   */
+#define H_SYNC_PERCENT    8.0   /* width of hsync as % of total line         */
+#define MIN_VSYNC_PLUS_BP 550.0 /* min time of vsync + back porch (microsec) */
+#define M                 600.0 /* blanking formula gradient                 */
+#define C                 40.0  /* blanking formula offset                   */
+#define K                 128.0 /* blanking formula scaling factor           */
+#define J                 20.0  /* blanking formula scaling factor           */
+
+/* C' and M' are part of the Blanking Duty Cycle computation */
+
+#define C_PRIME           (((C - J) * K/256.0) + J)
+#define M_PRIME           (K/256.0 * M)
+
+
+/* struct definitions */
+
+typedef struct __mode
+{
+    int hr, hss, hse, hfl;
+    int vr, vss, vse, vfl;
+    float pclk, h_freq, v_freq;
+} mode;
+
+
+typedef struct __options
+{
+    int x, y;
+    int xf86mode, fbmode;
+    float v_freq;
+} options;
+
+
+
+
+/* prototypes */
+
+void print_value(int n, char *name, float val);
+void print_xf86_mode (mode *m);
+void print_fb_mode (mode *m);
+mode *vert_refresh (int h_pixels, int v_lines, float freq,
+                    int interlaced, int margins);
+options *parse_command_line (int argc, char *argv[]);
+
+
+
+
+/*
+ * print_value() - print the result of the named computation; this is
+ * useful when comparing against the GTF EXCEL spreadsheet.
+ */
+
+int global_verbose = 0;
+
+void print_value(int n, char *name, float val)
+{
+    if (global_verbose) {
+        printf("%2d: %-27s: %15f\n", n, name, val);
+    }
+}
+
+
+
+/* print_xf86_mode() - print the XFree86 modeline, given mode timings. */
+
+void print_xf86_mode (mode *m)
+{
+    printf ("\n");
+    printf ("  # %dx%d @ %.2f Hz (GTF) hsync: %.2f kHz; pclk: %.2f MHz\n",
+            m->hr, m->vr, m->v_freq, m->h_freq, m->pclk);
+    
+    printf ("  Modeline \"%dx%d_%.2f\"  %.2f"
+            "  %d %d %d %d"
+            "  %d %d %d %d"
+            "  -HSync +Vsync\n\n",
+            m->hr, m->vr, m->v_freq, m->pclk,
+            m->hr, m->hss, m->hse, m->hfl,
+            m->vr, m->vss, m->vse, m->vfl);
+    
+}
+
+
+
+/*
+ * print_fb_mode() - print a mode description in fbset(8) format;
+ * see the fb.modes(8) manpage.  The timing description used in
+ * this is rather odd; they use "left and right margin" to refer
+ * to the portion of the hblank before and after the sync pulse
+ * by conceptually wrapping the portion of the blank after the pulse
+ * to infront of the visible region; ie:
+ * 
+ *
+ * Timing description I'm accustomed to:
+ *
+ *
+ *
+ *     <--------1--------> <--2--> <--3--> <--4-->
+ *                                _________
+ *    |-------------------|_______|       |_______
+ *
+ *                        R       SS      SE     FL
+ *       
+ * 1: visible image
+ * 2: blank before sync (aka front porch)
+ * 3: sync pulse
+ * 4: blank after sync (aka back porch)
+ * R: Resolution
+ * SS: Sync Start
+ * SE: Sync End
+ * FL: Frame Length
+ *
+ *
+ * But the fb.modes format is:
+ *
+ *
+ *    <--4--> <--------1--------> <--2--> <--3--> 
+ *                                       _________
+ *    _______|-------------------|_______|       |
+ *  
+ * The fb.modes(8) manpage refers to <4> and <2> as the left and
+ * right "margin" (as well as upper and lower margin in the vertical
+ * direction) -- note that this has nothing to do with the term
+ * "margin" used in the GTF Timing Standard.
+ *
+ * XXX always prints the 32 bit mode -- should I provide a command
+ * line option to specify the bpp?  It's simple enough for a user
+ * to edit the mode description after it's generated.
+ */
+
+void print_fb_mode (mode *m)
+{
+    printf ("\n");
+    printf ("mode \"%dx%d %.2fHz 32bit (GTF)\"\n",
+            m->hr, m->vr, m->v_freq);
+    printf ("    # PCLK: %.2f MHz, H: %.2f kHz, V: %.2f Hz\n",
+            m->pclk, m->h_freq, m->v_freq);
+    printf ("    geometry %d %d %d %d 32\n",
+            m->hr, m->vr, m->hr, m->vr);
+    printf ("    timings %d %d %d %d %d %d %d\n",
+            (int) rint(1000000.0/m->pclk),/* pixclock in picoseconds */
+            m->hfl - m->hse,              /* left margin (in pixels) */
+            m->hss - m->hr,               /* right margin (in pixels) */
+            m->vfl - m->vse,              /* upper margin (in pixel lines) */
+            m->vss - m->vr,               /* lower margin (in pixel lines) */
+            m->hse - m->hss,              /* horizontal sync length (pixels) */
+            m->vse - m->vss);             /* vert sync length (pixel lines) */
+    printf ("    hsync low\n");
+    printf ("    vsync high\n");
+    printf ("endmode\n\n");
+    
+}
+
+
+
+
+/*
+ * vert_refresh() - as defined by the GTF Timing Standard, compute the
+ * Stage 1 Parameters using the vertical refresh frequency.  In other
+ * words: input a desired resolution and desired refresh rate, and
+ * output the GTF mode timings.
+ *
+ * XXX All the code is in place to compute interlaced modes, but I don't
+ * feel like testing it right now.
+ *
+ * XXX margin computations are implemented but not tested (nor used by
+ * XFree86 of fbset mode descriptions, from what I can tell).
+ */
+
+mode *vert_refresh (int h_pixels, int v_lines, float freq,
+                    int interlaced, int margins)
+{
+    float h_pixels_rnd;
+    float v_lines_rnd;
+    float v_field_rate_rqd;
+    float top_margin;
+    float bottom_margin;
+    float interlace;
+    float h_period_est;
+    float vsync_plus_bp;
+    float v_back_porch;
+    float total_v_lines;
+    float v_field_rate_est;
+    float h_period;
+    float v_field_rate;
+    float v_frame_rate;
+    float left_margin;
+    float right_margin;
+    float total_active_pixels;
+    float ideal_duty_cycle;
+    float h_blank;
+    float total_pixels;
+    float pixel_freq;
+    float h_freq;
+
+    float h_sync;
+    float h_front_porch;
+    float v_odd_front_porch_lines;
+
+    mode *m = (mode*) malloc (sizeof (mode));
+    
+    
+    /*  1. In order to give correct results, the number of horizontal
+     *  pixels requested is first processed to ensure that it is divisible
+     *  by the character size, by rounding it to the nearest character
+     *  cell boundary:
+     *
+     *  [H PIXELS RND] = ((ROUND([H PIXELS]/[CELL GRAN RND],0))*[CELLGRAN RND])
+     */
+    
+    h_pixels_rnd = rint((float) h_pixels / CELL_GRAN) * CELL_GRAN;
+    
+    print_value(1, "[H PIXELS RND]", h_pixels_rnd);
+
+    
+    /*  2. If interlace is requested, the number of vertical lines assumed
+     *  by the calculation must be halved, as the computation calculates
+     *  the number of vertical lines per field. In either case, the
+     *  number of lines is rounded to the nearest integer.
+     *   
+     *  [V LINES RND] = IF([INT RQD?]="y", ROUND([V LINES]/2,0),
+     *                                     ROUND([V LINES],0))
+     */
+
+    v_lines_rnd = interlaced ?
+            rint((float) v_lines) / 2.0 :
+            rint((float) v_lines);
+    
+    print_value(2, "[V LINES RND]", v_lines_rnd);
+    
+    
+    /*  3. Find the frame rate required:
+     *
+     *  [V FIELD RATE RQD] = IF([INT RQD?]="y", [I/P FREQ RQD]*2,
+     *                                          [I/P FREQ RQD])
+     */
+
+    v_field_rate_rqd = interlaced ? (freq * 2.0) : (freq);
+
+    print_value(3, "[V FIELD RATE RQD]", v_field_rate_rqd);
+    
+
+    /*  4. Find number of lines in Top margin:
+     *
+     *  [TOP MARGIN (LINES)] = IF([MARGINS RQD?]="Y",
+     *          ROUND(([MARGIN%]/100*[V LINES RND]),0),
+     *          0)
+     */
+
+    top_margin = margins ? rint(MARGIN_PERCENT / 100.0 * v_lines_rnd) : (0.0);
+
+    print_value(4, "[TOP MARGIN (LINES)]", top_margin);
+    
+
+    /*  5. Find number of lines in Bottom margin:
+     *
+     *  [BOT MARGIN (LINES)] = IF([MARGINS RQD?]="Y",
+     *          ROUND(([MARGIN%]/100*[V LINES RND]),0),
+     *          0)
+     */
+
+    bottom_margin = margins ? rint(MARGIN_PERCENT/100.0 * v_lines_rnd) : (0.0);
+
+    print_value(5, "[BOT MARGIN (LINES)]", bottom_margin);
+
+    
+    /*  6. If interlace is required, then set variable [INTERLACE]=0.5:
+     *   
+     *  [INTERLACE]=(IF([INT RQD?]="y",0.5,0))
+     */
+
+    interlace = interlaced ? 0.5 : 0.0;
+
+    print_value(6, "[INTERLACE]", interlace);
+    
+
+    /*  7. Estimate the Horizontal period
+     *
+     *  [H PERIOD EST] = ((1/[V FIELD RATE RQD]) - [MIN VSYNC+BP]/1000000) /
+     *                    ([V LINES RND] + (2*[TOP MARGIN (LINES)]) +
+     *                     [MIN PORCH RND]+[INTERLACE]) * 1000000
+     */
+
+    h_period_est = (((1.0/v_field_rate_rqd) - (MIN_VSYNC_PLUS_BP/1000000.0))
+                    / (v_lines_rnd + (2*top_margin) + MIN_PORCH + interlace)
+                    * 1000000.0);
+
+    print_value(7, "[H PERIOD EST]", h_period_est);
+    
+
+    /*  8. Find the number of lines in V sync + back porch:
+     *
+     *  [V SYNC+BP] = ROUND(([MIN VSYNC+BP]/[H PERIOD EST]),0)
+     */
+
+    vsync_plus_bp = rint(MIN_VSYNC_PLUS_BP/h_period_est);
+
+    print_value(8, "[V SYNC+BP]", vsync_plus_bp);
+    
+    
+    /*  9. Find the number of lines in V back porch alone:
+     *
+     *  [V BACK PORCH] = [V SYNC+BP] - [V SYNC RND]
+     *
+     *  XXX is "[V SYNC RND]" a typo? should be [V SYNC RQD]?
+     */
+    
+    v_back_porch = vsync_plus_bp - V_SYNC_RQD;
+    
+    print_value(9, "[V BACK PORCH]", v_back_porch);
+    
+
+    /*  10. Find the total number of lines in Vertical field period:
+     *
+     *  [TOTAL V LINES] = [V LINES RND] + [TOP MARGIN (LINES)] +
+     *                    [BOT MARGIN (LINES)] + [V SYNC+BP] + [INTERLACE] +
+     *                    [MIN PORCH RND]
+     */
+
+    total_v_lines = v_lines_rnd + top_margin + bottom_margin + vsync_plus_bp +
+        interlace + MIN_PORCH;
+    
+    print_value(10, "[TOTAL V LINES]", total_v_lines);
+    
+
+    /*  11. Estimate the Vertical field frequency:
+     *
+     *  [V FIELD RATE EST] = 1 / [H PERIOD EST] / [TOTAL V LINES] * 1000000
+     */
+
+    v_field_rate_est = 1.0 / h_period_est / total_v_lines * 1000000.0;
+    
+    print_value(11, "[V FIELD RATE EST]", v_field_rate_est);
+    
+
+    /*  12. Find the actual horizontal period:
+     *
+     *  [H PERIOD] = [H PERIOD EST] / ([V FIELD RATE RQD] / [V FIELD RATE EST])
+     */
+
+    h_period = h_period_est / (v_field_rate_rqd / v_field_rate_est);
+    
+    print_value(12, "[H PERIOD]", h_period);
+    
+
+    /*  13. Find the actual Vertical field frequency:
+     *
+     *  [V FIELD RATE] = 1 / [H PERIOD] / [TOTAL V LINES] * 1000000
+     */
+
+    v_field_rate = 1.0 / h_period / total_v_lines * 1000000.0;
+
+    print_value(13, "[V FIELD RATE]", v_field_rate);
+    
+
+    /*  14. Find the Vertical frame frequency:
+     *
+     *  [V FRAME RATE] = (IF([INT RQD?]="y", [V FIELD RATE]/2, [V FIELD RATE]))
+     */
+
+    v_frame_rate = interlaced ? v_field_rate / 2.0 : v_field_rate;
+
+    print_value(14, "[V FRAME RATE]", v_frame_rate);
+    
+
+    /*  15. Find number of pixels in left margin:
+     *
+     *  [LEFT MARGIN (PIXELS)] = (IF( [MARGINS RQD?]="Y",
+     *          (ROUND( ([H PIXELS RND] * [MARGIN%] / 100 /
+     *                   [CELL GRAN RND]),0)) * [CELL GRAN RND],
+     *          0))
+     */
+
+    left_margin = margins ?
+        rint(h_pixels_rnd * MARGIN_PERCENT / 100.0 / CELL_GRAN) * CELL_GRAN :
+        0.0;
+    
+    print_value(15, "[LEFT MARGIN (PIXELS)]", left_margin);
+    
+
+    /*  16. Find number of pixels in right margin:
+     *
+     *  [RIGHT MARGIN (PIXELS)] = (IF( [MARGINS RQD?]="Y",
+     *          (ROUND( ([H PIXELS RND] * [MARGIN%] / 100 /
+     *                   [CELL GRAN RND]),0)) * [CELL GRAN RND],
+     *          0))
+     */
+    
+    right_margin = margins ?
+        rint(h_pixels_rnd * MARGIN_PERCENT / 100.0 / CELL_GRAN) * CELL_GRAN :
+        0.0;
+    
+    print_value(16, "[RIGHT MARGIN (PIXELS)]", right_margin);
+    
+
+    /*  17. Find total number of active pixels in image and left and right
+     *  margins:
+     *
+     *  [TOTAL ACTIVE PIXELS] = [H PIXELS RND] + [LEFT MARGIN (PIXELS)] +
+     *                          [RIGHT MARGIN (PIXELS)]
+     */
+
+    total_active_pixels = h_pixels_rnd + left_margin + right_margin;
+    
+    print_value(17, "[TOTAL ACTIVE PIXELS]", total_active_pixels);
+    
+    
+    /*  18. Find the ideal blanking duty cycle from the blanking duty cycle
+     *  equation:
+     *
+     *  [IDEAL DUTY CYCLE] = [C'] - ([M']*[H PERIOD]/1000)
+     */
+
+    ideal_duty_cycle = C_PRIME - (M_PRIME * h_period / 1000.0);
+    
+    print_value(18, "[IDEAL DUTY CYCLE]", ideal_duty_cycle);
+    
+
+    /*  19. Find the number of pixels in the blanking time to the nearest
+     *  double character cell:
+     *
+     *  [H BLANK (PIXELS)] = (ROUND(([TOTAL ACTIVE PIXELS] *
+     *                               [IDEAL DUTY CYCLE] /
+     *                               (100-[IDEAL DUTY CYCLE]) /
+     *                               (2*[CELL GRAN RND])), 0))
+     *                       * (2*[CELL GRAN RND])
+     */
+
+    h_blank = rint(total_active_pixels *
+                   ideal_duty_cycle /
+                   (100.0 - ideal_duty_cycle) /
+                   (2.0 * CELL_GRAN)) * (2.0 * CELL_GRAN);
+    
+    print_value(19, "[H BLANK (PIXELS)]", h_blank);
+    
+
+    /*  20. Find total number of pixels:
+     *
+     *  [TOTAL PIXELS] = [TOTAL ACTIVE PIXELS] + [H BLANK (PIXELS)]
+     */
+
+    total_pixels = total_active_pixels + h_blank;
+    
+    print_value(20, "[TOTAL PIXELS]", total_pixels);
+    
+
+    /*  21. Find pixel clock frequency:
+     *
+     *  [PIXEL FREQ] = [TOTAL PIXELS] / [H PERIOD]
+     */
+    
+    pixel_freq = total_pixels / h_period;
+    
+    print_value(21, "[PIXEL FREQ]", pixel_freq);
+    
+
+    /*  22. Find horizontal frequency:
+     *
+     *  [H FREQ] = 1000 / [H PERIOD]
+     */
+
+    h_freq = 1000.0 / h_period;
+    
+    print_value(22, "[H FREQ]", h_freq);
+    
+
+
+    /* Stage 1 computations are now complete; I should really pass
+       the results to another function and do the Stage 2
+       computations, but I only need a few more values so I'll just
+       append the computations here for now */
+
+    
+
+    /*  17. Find the number of pixels in the horizontal sync period:
+     *
+     *  [H SYNC (PIXELS)] =(ROUND(([H SYNC%] / 100 * [TOTAL PIXELS] /
+     *                             [CELL GRAN RND]),0))*[CELL GRAN RND]
+     */
+
+    h_sync = rint(H_SYNC_PERCENT/100.0 * total_pixels / CELL_GRAN) * CELL_GRAN;
+
+    print_value(17, "[H SYNC (PIXELS)]", h_sync);
+    
+
+    /*  18. Find the number of pixels in the horizontal front porch period:
+     *
+     *  [H FRONT PORCH (PIXELS)] = ([H BLANK (PIXELS)]/2)-[H SYNC (PIXELS)]
+     */
+
+    h_front_porch = (h_blank / 2.0) - h_sync;
+
+    print_value(18, "[H FRONT PORCH (PIXELS)]", h_front_porch);
+    
+    
+    /*  36. Find the number of lines in the odd front porch period:
+     *
+     *  [V ODD FRONT PORCH(LINES)]=([MIN PORCH RND]+[INTERLACE])
+     */
+    
+    v_odd_front_porch_lines = MIN_PORCH + interlace;
+    
+    print_value(36, "[V ODD FRONT PORCH(LINES)]", v_odd_front_porch_lines);
+    
+
+    /* finally, pack the results in the mode struct */
+    
+    m->hr  = (int) (h_pixels_rnd);
+    m->hss = (int) (h_pixels_rnd + h_front_porch);
+    m->hse = (int) (h_pixels_rnd + h_front_porch + h_sync);
+    m->hfl = (int) (total_pixels);
+
+    m->vr  = (int) (v_lines_rnd);
+    m->vss = (int) (v_lines_rnd + v_odd_front_porch_lines);
+    m->vse = (int) (int) (v_lines_rnd + v_odd_front_porch_lines + V_SYNC_RQD);
+    m->vfl = (int) (total_v_lines);
+
+    m->pclk   = pixel_freq;
+    m->h_freq = h_freq;
+    m->v_freq = freq;
+
+    return (m);
+    
+}
+
+
+
+
+/*
+ * parse_command_line() - parse the command line and return an
+ * alloced structure containing the results.  On error print usage
+ * and return NULL.
+ */ 
+
+options *parse_command_line (int argc, char *argv[])
+{
+    int n;
+
+    options *o = (options *) calloc (1, sizeof (options));
+
+    if (argc < 4) goto bad_option;
+
+    o->x = atoi (argv[1]);
+    o->y = atoi (argv[2]);
+    o->v_freq = atof (argv[3]);
+
+    /* XXX should check for errors in the above */
+    
+    n = 4;
+
+    while (n < argc) {
+        if ((strcmp (argv[n], "-v") == 0) ||
+            (strcmp (argv[n], "--verbose") == 0)) {
+            global_verbose = 1;
+        } else if ((strcmp (argv[n], "-f") == 0) ||
+                   (strcmp (argv[n], "--fbmode") == 0)) {
+            o->fbmode = 1;
+        } else if ((strcmp (argv[n], "-x") == 0) ||
+                   (strcmp (argv[n], "--xf86mode") == 0)) {
+            o->xf86mode = 1;
+        } else {
+            goto bad_option;
+        }
+        
+        n++;
+    }
+
+    /* if neither xf86mode nor fbmode were requested, default to
+       xf86mode */
+
+    if (!o->fbmode && !o->xf86mode) o->xf86mode = 1;
+    
+    return (o);
+    
+ bad_option:
+
+    fprintf (stderr, "\n");
+    fprintf (stderr, "usage: %s x y refresh [-v|--verbose] "
+             "[-f|--fbmode] [-x|-xf86mode]\n", argv[0]);
+
+    fprintf (stderr, "\n");
+    
+    fprintf (stderr, "            x : the desired horizontal "
+             "resolution (required)\n");
+    fprintf (stderr, "            y : the desired vertical "
+             "resolution (required)\n");
+    fprintf (stderr, "      refresh : the desired refresh "
+             "rate (required)\n");
+    fprintf (stderr, " -v|--verbose : enable verbose printouts "
+             "(traces each step of the computation)\n");
+    fprintf (stderr, "  -f|--fbmode : output an fbset(8)-style mode "
+             "description\n");
+    fprintf (stderr, " -x|-xf86mode : output an XFree86-style mode "
+             "description (this is the default\n"
+             "                if no mode description is requested)\n");
+    
+    fprintf (stderr, "\n");
+    
+    free (o);
+    return (NULL);
+
+}
+
+
+
+int main (int argc, char *argv[])
+{
+    mode *m;
+    options *o;
+
+    o = parse_command_line (argc, argv);
+    if (!o) exit (1);
+    
+    m = vert_refresh (o->x, o->y, o->v_freq, 0, 0);
+    if (!m) exit (1);
+
+    if (o->xf86mode)
+        print_xf86_mode(m);
+    
+    if (o->fbmode)
+        print_fb_mode(m);
+    
+    return 0;
+    
+}
diff --git a/xc/programs/Xserver/hw/xfree86/etc/gtf.man b/xc/programs/Xserver/hw/xfree86/etc/gtf.man
new file mode 100644
index 000000000..f2d2ae9ec
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/etc/gtf.man
@@ -0,0 +1,45 @@
+.\" $XFree86: xc/programs/Xserver/hw/xfree86/etc/gtf.man,v 1.1 2002/11/12 01:31:23 dawes Exp $ 
+.TH GTF 1 __vendorversion__
+.SH NAME
+gtf - calculate VESA GTF mode lines
+.SH SYNOPSIS
+.B gtf
+.I h-resolution
+.I v-resolution
+.I refresh
+.RB [ \-v | \-\-verbose ]
+.RB [ \-f | \-\-fbmode ]
+.RB [ \-x | \-\-xf86mode ]
+.SH DESCRIPTION
+.I Gtf
+is a utility for calculating VESA GTF modes.  Given the desired
+horizontal and vertical resolutions and refresh rate (in Hz), the parameters
+for a matching VESA GTF mode are printed out.  Two output formats are
+supported: mode lines suitable for the XFree86
+.B XF86Config(__filemansuffix__)
+file, and mode parameters suitable for the Linux
+.B fbset(8)
+utility.
+
+.SH OPTIONS
+.TP 8
+.BR \-v | \-\-verbose
+Enable verbose printouts  This shows a trace for each step of the
+computation.
+.TP 8
+.BR \-x | \-\-xf86mode
+Print the mode parameters as XFree86-style mode lines.  This is the
+default format.
+.TP 8
+.BR \-f | \-\-fbset
+Print the mode parameters in a format suitable for
+.BR fbset(8) .
+.SH "SEE ALSO"
+XF86Config(__filemansuffix__)
+.SH AUTHOR
+Andy Ritger.
+.PP
+This program is based on the Generalized Timing Formula (GTF(TM)) Standard
+Version: 1.0, Revsion: 1.0.  The GTF Excel(TM) spreadsheet, a sample
+(and the definitive) implementation of the GTF Timing Standard is
+available at <ftp://ftp.vesa.org/pub/GTF/VTF_V1R1.xls>.
diff --git a/xc/programs/Xserver/hw/xfree86/etc/ioport.c b/xc/programs/Xserver/hw/xfree86/etc/ioport.c
new file mode 100644
index 000000000..4bb20ef1b
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/etc/ioport.c
@@ -0,0 +1,493 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/etc/ioport.c,v 1.4 2003/01/01 19:16:41 tsi Exp $ */
+/*
+ * Copyright 2002 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ *
+ * Permission to use, copy, modify, distribute, and sell this software and its
+ * documentation for any purpose is hereby granted without fee, provided that
+ * the above copyright notice appear in all copies and that both that copyright
+ * notice and this permission notice appear in supporting documentation, and
+ * that the name of Marc Aurele La France not be used in advertising or
+ * publicity pertaining to distribution of the software without specific,
+ * written prior permission.  Marc Aurele La France makes no representations
+ * about the suitability of this software for any purpose.  It is provided
+ * "as-is" without express or implied warranty.
+ *
+ * MARC AURELE LA FRANCE DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+ * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS.  IN NO
+ * EVENT SHALL MARC AURELE LA FRANCE BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+ * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
+ * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
+ * OF THIS SOFTWARE.
+ */
+
+#include "compiler.h"
+#include "xf86_OSproc.h"
+
+#include <errno.h>
+
+static char *MyName;
+static int Port = -1, Index = -1;
+static unsigned int Value;
+
+static void
+inb_usage
+(
+#ifdef __STDC__
+    void
+#endif
+)
+{
+	fprintf(stderr, "inb [-i <index>] <port>\n");
+}
+
+static void
+inw_usage
+(
+#ifdef __STDC__
+    void
+#endif
+)
+{
+	fprintf(stderr, "inw [-i <index>] <port>\n");
+}
+
+static void
+inl_usage
+(
+#ifdef __STDC__
+    void
+#endif
+)
+{
+	fprintf(stderr, "inl [-i <index>] <port>\n");
+}
+
+
+static void
+outb_usage
+(
+#ifdef __STDC__
+    void
+#endif
+)
+{
+	fprintf(stderr, "outb [-i <index>] <port> <value>\n");
+}
+
+static void
+outw_usage
+(
+#ifdef __STDC__
+    void
+#endif
+)
+{
+	fprintf(stderr, "outw [-i <index>] <port> <value>\n");
+}
+
+static void
+outl_usage
+(
+#ifdef __STDC__
+    void
+#endif
+)
+{
+	fprintf(stderr, "outl [-i <index>] <port> <value>\n");
+}
+
+static int
+#ifdef __STDC__
+parse_number
+(
+    const char *String,
+    void (* Usage)(void),
+    unsigned int Maximum)
+#else
+parse_number(String, Usage, Maximum)
+    const char *String;
+    void (* Usage)();
+    unsigned int Maximum;
+#endif
+{
+	char *BadString = (char *)0;
+	unsigned int Number = strtoul(String, &BadString, 0);
+	if ((Number > Maximum) || errno ||
+	    (BadString && *BadString))
+	{
+		(*Usage)();
+		exit(1);
+	}
+
+	return (Number);
+}
+
+static void
+#ifdef __STDC__
+input_parse
+(
+    int argc,
+    char **argv,
+    void (* Usage)(void))
+#else
+input_parse(argc, argv, Usage)
+    int argc;
+    char **argv;
+    void (* Usage)();
+#endif
+{
+	if ((argc < 2) || (argc > 4))
+	{
+		(*Usage)();
+		exit(1);
+	}
+
+	for(;  (++argv, --argc);  )
+	{
+		if ((Index < 0) &&
+		    (argv[0][0] == '-') &&
+		    (argv[0][1] == 'i'))
+		{
+			if ((++argv[0], *(++argv[0])) || (++argv, --argc))
+				Index = parse_number(argv[0], Usage, 0xFFU);
+			else
+			{
+				(*Usage)();
+				exit(1);
+			}
+		}
+		else if (Port < 0)
+		{
+			Port = parse_number(argv[0], Usage, 0xFFFFU);
+		}
+		else
+		{
+			(*Usage)();
+			exit(1);
+		}
+	}
+}
+
+static void
+#ifdef __STDC__
+output_parse
+(
+    int argc,
+    char **argv,
+    void (* Usage)(void),
+    unsigned int Maximum
+)
+#else
+output_parse(argc, argv, Usage, Maximum)
+    int argc;
+    char **argv;
+    void (* Usage)();
+    unsigned int Maximum;
+#endif
+{
+	char ValueSpecified = 0;
+
+	if ((argc < 3) || (argc > 5))
+	{
+		(*Usage)();
+		exit(1);
+	}
+
+	for (;  (++argv, --argc);  )
+	{
+		if ((Index < 0) &&
+		    (argv[0][0] == '-') &&
+		    (argv[0][1] == 'i'))
+		{
+			if ((++argv[0], *(++argv[0])) || (++argv, --argc))
+				Index = parse_number(argv[0], Usage, 0xFFU);
+			else
+			{
+				(*Usage)();
+				exit(1);
+			}
+		}
+		else if (Port < 0)
+		{
+			Port = parse_number(argv[0], Usage, 0xFFFFU);
+		}
+		else if (!ValueSpecified)
+		{
+			Value = parse_number(argv[0], Usage, Maximum);
+			ValueSpecified = 1;
+		}
+		else
+		{
+			(*Usage)();
+			exit(1);
+		}
+	}
+
+	if (!ValueSpecified)
+	{
+		(*Usage)();
+		exit(1);
+	}
+}
+
+static void
+#ifdef __STDC__
+do_inb
+(
+    int argc,
+    char **argv
+)
+#else
+do_inb(argc, argv)
+    int argc;
+    char **argv;
+#endif
+{
+	input_parse(argc, argv, inb_usage);
+
+	xf86EnableIO();
+
+	if (Index >= 0)
+	{
+		if (Port == 0x03C0U)
+		{	/* Attribute Controller is different */
+			unsigned short gens1;
+
+			gens1 = ((inb(0x03CCU) & 0x01U) << 5) + 0x03BA;
+			(void) inb(gens1);
+			Index = (Index & 0x1FU) | 0x20U;
+		}
+		outb(Port, Index);
+		Port++;
+	}
+	Value = inb(Port);
+
+	xf86DisableIO();
+
+	printf("0x%02X\n", Value);
+}
+
+static void
+#ifdef __STDC__
+do_inw
+(
+    int argc,
+    char **argv
+)
+#else
+do_inw(argc, argv)
+    int argc;
+    char **argv;
+#endif
+{
+	input_parse(argc, argv, inw_usage);
+
+	xf86EnableIO();
+
+	if (Index >= 0)
+	{
+		outb(Port, Index);
+		Port++;
+	}
+	Value = inw(Port);
+
+	xf86DisableIO();
+
+	printf("0x%04X\n", Value);
+}
+
+static void
+#ifdef __STDC__
+do_inl
+(
+    int argc,
+    char **argv
+)
+#else
+do_inl(argc, argv)
+    int argc;
+    char **argv;
+#endif
+{
+	input_parse(argc, argv, inl_usage);
+
+	xf86EnableIO();
+
+	if (Index >= 0)
+	{
+		outb(Port, Index);
+		Port++;
+	}
+	Value = inl(Port);
+
+	xf86DisableIO();
+
+	printf("0x%08X\n", Value);
+}
+
+static void
+#ifdef __STDC__
+do_outb
+(
+    int argc,
+    char **argv
+)
+#else
+do_outb(argc, argv)
+    int argc;
+    char **argv;
+#endif
+{
+	output_parse(argc, argv, outb_usage, 0xFFU);
+
+	xf86EnableIO();
+
+	if (Index >= 0)
+	{
+		if (Port == 0x03C0U)
+		{	/* Attribute controller is different */
+			unsigned short gens1;
+
+			gens1 = ((inb(0x03CCU) & 0x01U) << 5) + 0x03BA;
+			(void) inb(gens1);
+			outb(0x03C0U, (Index & 0x1FU) | 0x20U);
+		}
+		else
+		{
+			outb(Port, Index);
+			Port++;
+		}
+	}
+	outb(Port, Value);
+
+	xf86DisableIO();
+
+}
+
+static void
+#ifdef __STDC__
+do_outw
+(
+    int argc,
+    char **argv
+)
+#else
+do_outw(argc, argv)
+    int argc;
+    char **argv;
+#endif
+{
+	output_parse(argc, argv, outw_usage, 0xFFFFU);
+
+	xf86EnableIO();
+
+	if (Index >= 0)
+	{
+		outb(Port, Index);
+		Port++;
+	}
+	outw(Port, Value);
+
+	xf86DisableIO();
+
+}
+
+static void
+#ifdef __STDC__
+do_outl
+(
+    int argc,
+    char **argv
+)
+#else
+do_outl(argc, argv)
+    int argc;
+    char **argv;
+#endif
+{
+	output_parse(argc, argv, outl_usage, 0xFFFFFFFFU);
+
+	xf86EnableIO();
+
+	if (Index >= 0)
+	{
+		outb(Port, Index);
+		Port++;
+	}
+	outl(Port, Value);
+
+	xf86DisableIO();
+
+}
+
+static void
+usage
+(
+#ifdef __STDC__
+    void
+#endif
+)
+{
+	inb_usage();
+	inw_usage();
+	inl_usage();
+	outb_usage();
+	outw_usage();
+	outl_usage();
+	exit(1);
+}
+
+int
+#ifdef __STDC__
+main
+(
+    int argc,
+    char **argv
+)
+#else
+main(argc, argv)
+    int argc;
+    char **argv;
+#endif
+{
+	struct
+	{
+		char *Name;
+#ifdef __STDC__
+		void (* Function)(int, char **);
+#else
+		void (* Function)();
+#endif
+	}
+	*Function_Entry, Function_Table[] =
+	{
+		{"inb", do_inb},
+		{"inw", do_inw},
+		{"inl", do_inl},
+		{"outb", do_outb},
+		{"outw", do_outw},
+		{"outl", do_outl},
+#ifdef __STDC__
+		{(char *)0, (void (*)(int, char **))usage}
+#else
+		{(char *)0, usage}
+#endif
+	};
+
+	/* Get name by which we were invoked */
+	for (MyName = argv[0];  argv[0][0]; )
+		if (*(argv[0]++) == '/')
+			MyName = argv[0];
+
+	/* Look up name in table and call corresponding function */
+	for (Function_Entry = Function_Table;
+	     Function_Entry->Name &&
+		strcmp(MyName, Function_Entry->Name);
+	     Function_Entry++);
+	(*Function_Entry->Function)(argc, argv);
+
+	return (0);
+}
+
+#include "xf86getpagesize.c"
diff --git a/xc/programs/Xserver/hw/xfree86/etc/mmapr.c b/xc/programs/Xserver/hw/xfree86/etc/mmapr.c
index ba2f23edc..1f37e775e 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/mmapr.c
+++ b/xc/programs/Xserver/hw/xfree86/etc/mmapr.c
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/etc/mmapr.c,v 1.4 2002/10/04 20:13:50 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/etc/mmapr.c,v 1.6 2003/01/01 19:16:41 tsi Exp $ */
 /*
- * Copyright 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 2002 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
@@ -38,6 +38,10 @@
 # define MAP_FAILED ((void *)(-1))
 #endif
 
+#if defined(_SCO_DS) && !defined(_SCO_DS_LL)
+#define strtoull (unsigned long long)strtoul
+#endif
+
 #if !defined(strtoull) && \
     (defined(CSRG_BASED) || \
      (defined(__GNU_LIBRARY__) && \
diff --git a/xc/programs/Xserver/hw/xfree86/etc/mmapw.c b/xc/programs/Xserver/hw/xfree86/etc/mmapw.c
index 1f5283d6a..b9f9c1f02 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/mmapw.c
+++ b/xc/programs/Xserver/hw/xfree86/etc/mmapw.c
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/etc/mmapw.c,v 1.1 2002/10/11 20:23:07 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/etc/mmapw.c,v 1.3 2003/01/01 19:16:42 tsi Exp $ */
 /*
- * Copyright 2002 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 2002 through 2003 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
@@ -38,6 +38,10 @@
 # define MAP_FAILED ((void *)(-1))
 #endif
 
+#if defined(_SCO_DS) && !defined(_SCO_DS_LL)
+#define strtoull (unsigned long long)strtoul
+#endif
+
 #if !defined(strtoull) && \
     (defined(CSRG_BASED) || \
      (defined(__GNU_LIBRARY__) && \
diff --git a/xc/programs/Xserver/hw/xfree86/etc/pci.ids b/xc/programs/Xserver/hw/xfree86/etc/pci.ids
index 490bce3d0..a6bb2fa1c 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/pci.ids
+++ b/xc/programs/Xserver/hw/xfree86/etc/pci.ids
@@ -7,7 +7,7 @@
 #	so if you have anything to contribute, please visit the home page or
 #	send a diff -u against the most recent pci.ids to pci-ids@ucw.cz.
 #
-#	Daily snapshot on Wed 2002-10-16 10:00:04
+#	Daily snapshot on Tue 2003-02-25 11:00:06
 #
 
 # Vendors, devices and subsystems. Please keep sorted.
@@ -21,6 +21,8 @@
 001a  Ascend Communications, Inc.
 0033  Paradyne corp.
 003d  Lockheed Martin-Marietta Corp
+# Real TJN ID is e159, but they got it wrong several times --mj
+0059  Tiger Jet Network Inc. (Wrong ID)
 0070  Hauppauge computer works Inc.
 0100  Ncipher Corp Ltd
 0675  Dynalink
@@ -159,10 +161,19 @@
 	0017  PROTO-3 PCI Prototyping board
 	9100  INI-9100/9100W SCSI Host
 1002  ATI Technologies Inc
+# New support forthcoming in XFree86 4.3.0
+	4144  Radeon R300 AD [Radeon 9500 Pro]
+# New support forthcoming in XFree86 4.3.0
+	4145  Radeon R300 AE [Radeon 9500 Pro]
+# New support forthcoming in XFree86 4.3.0
+	4146  Radeon R300 AF [Radeon 9500 Pro]
+# Update:  Oops, AF was a typo above for 4147, should be AG
+	4147  Radeon R300 AG [FireGL Z1/X1]
 	4158  68800AX [Mach32]
 	4242  Radeon R200 BB [Radeon All in Wonder 8500DV]
 		1002 02aa  Radeon 8500 AIW DV Edition
 	4336  Radeon Mobility U1
+	4337  Radeon IGP 340M
 	4354  215CT [Mach64 CT]
 	4358  210888CX [Mach64 CX]
 	4554  210888ET [Mach64 ET]
@@ -212,6 +223,8 @@
 	4752  Rage XL
 		1002 0008  Rage XL
 		1002 4752  Rage XL
+		1002 8008  Rage XL
+		1028 00d1  PowerEdge 2550
 	4753  Rage XC
 		1002 4753  Rage XC
 	4754  3D Rage I/II 215GT [Mach64 GT]
@@ -232,7 +245,17 @@
 	4964  Radeon R250 Id [Radeon 9000]
 	4965  Radeon R250 Ie [Radeon 9000]
 	4966  Radeon R250 If [Radeon 9000]
+		10f1 0002  R250 If [Tachyon G9000 PRO]
+		148c 2039  R250 If [Radeon 9000 Pro "Evil Commando"]
+		1509 9a00  R250 If [Radeon 9000 "AT009"]
+# New subdevice - 3D Prophet 9000 PCI by Hercules.  AGP version probably would have same ID, so not specified.
+		1681 0040  R250 If [3D prophet 9000]
+		174b 7176  R250 If [Sapphire Radeon 9000 Pro]
+		174b 7192  R250 If [Radeon 9000 "Atlantis"]
+		17af 2005  R250 If [Excalibur Radeon 9000 Pro]
+		17af 2006  R250 If [Excalibur Radeon 9000]
 	4967  Radeon R250 Ig [Radeon 9000]
+	496e  Radeon R250 [Radeon 9000] (Secondary)
 	4c42  3D Rage LT Pro AGP-133
 		0e11 b0e8  Rage 3D LT Pro
 		0e11 b10e  3D Rage LT Pro (Compaq Armada 1750)
@@ -251,7 +274,9 @@
 		1002 0044  Rage LT Pro
 		1002 4c49  Rage LT Pro
 	4c4d  Rage Mobility P/M AGP 2x
+		0e11 b111  Armada M700
 		1002 0084  Xpert 98 AGP 2X (Mobility)
+		1014 0154  ThinkPad A20m
 	4c4e  Rage Mobility L AGP 2x
 	4c50  3D Rage LT Pro
 		1002 4c50  Rage LT Pro
@@ -260,23 +285,36 @@
 	4c53  Rage Mobility L
 	4c54  264LT [Mach64 LT]
 	4c57  Radeon Mobility M7 LW [Radeon Mobility 7500]
+		1014 0517  ThinkPad T30
 		1028 00e6  Radeon Mobility M7 LW (Dell Inspiron 8100)
-	4c58  Radeon Mobility M7 LX [Radeon Mobility FireGL 7800]
+		144d c006  Radeon Mobility M7 LW in vpr Matrix 170B4
+# Update:  More correct labelling for this FireGL chipset
+	4c58  Radeon RV200 LX [Mobility FireGL 7800 M7]
 	4c59  Radeon Mobility M6 LY
 		1014 0235  ThinkPad A30p (2653-64G)
 		1014 0239  ThinkPad X22/X23/X24
 		104d 80e7  VAIO PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP
 	4c5a  Radeon Mobility M6 LZ
-	4c64  Radeon R250 Ld [Radeon Mobility 9000]
-	4c65  Radeon R250 Le [Radeon Mobility 9000]
-	4c66  Radeon R250 Lf [Radeon Mobility 9000]
-	4c67  Radeon R250 Lg [Radeon Mobility 9000]
+# Update:  Add M9 to product name
+	4c64  Radeon R250 Ld [Radeon Mobility 9000 M9]
+# Update:  Add M9 to product name
+	4c65  Radeon R250 Le [Radeon Mobility 9000 M9]
+# Update:  Add M9 to product name
+	4c66  Radeon R250 Lf [Radeon Mobility 9000 M9]
+# Update:  Add M9 to product name
+	4c67  Radeon R250 Lg [Radeon Mobility 9000 M9]
 	4d46  Rage Mobility M4 AGP
 	4d4c  Rage Mobility M4 AGP
 	4e44  Radeon R300 ND [Radeon 9700]
 	4e45  Radeon R300 NE [Radeon 9700]
 	4e46  Radeon R300 NF [Radeon 9700]
-	4e47  Radeon R300 NG [Radeon 9700]
+# Update:  This is FireGL X1, not Radeon 9700
+	4e47  Radeon R300 NG [FireGL X1]
+# Update
+	4e64  Radeon R300 [Radeon 9700 Pro] (Secondary)
+	4e65  Radeon R300 [Radeon 9700] (Secondary)
+	4e66  Radeon R300 [Radeon 9700] (Secondary)
+	4e67  Radeon R300 [FireGL X1] (Secondary)
 	5041  Rage 128 PA/PRO
 	5042  Rage 128 PB/PRO AGP 2x
 	5043  Rage 128 PC/PRO AGP 4x
@@ -313,7 +351,8 @@
 	5056  Rage 128 PV/PRO TMDS
 	5057  Rage 128 PW/PRO AGP 2x TMDS
 	5058  Rage 128 PX/PRO AGP 4x TMDS
-	5144  Radeon R100 QD [Radeon 64 DDR]
+# Update: This same chip is used in all 32Mb and 64Mb SDR/DDR orig Radeons, and is now known as 7200
+	5144  Radeon R100 QD [Radeon 7200]
 		1002 0008  Radeon 7000/Radeon VE
 		1002 0009  Radeon 7000/Radeon
 		1002 000a  Radeon 7000/Radeon
@@ -331,32 +370,55 @@
 	5146  Radeon R100 QF
 	5147  Radeon R100 QG
 	5148  Radeon R200 QH [Radeon 8500]
-		1002 0152  FireGL 8800
-		1002 0172  FireGL 8700
+		1002 010a  FireGL 8800 64Mb
+		1002 0152  FireGL 8800 128Mb
+		1002 0162  FireGL 8700 32Mb
+		1002 0172  FireGL 8700 64Mb
 	5149  Radeon R200 QI
 	514a  Radeon R200 QJ
 	514b  Radeon R200 QK
 	514c  Radeon R200 QL [Radeon 8500 LE]
 		1002 003a  Radeon R200 QL [Radeon 8500 LE]
 		1002 013a  Radeon 8500
+		148c 2026  R200 QL [Radeon 8500 Evil Master II Multi Display Edition]
 		174b 7149  Radeon R200 QL [Sapphire Radeon 8500 LE]
+# New: Radeon 9100 is basically a Radeon 8500LE branded as 9100 by Sapphire
+	514d  Radeon R200 QM [Radeon 9100]
+# New: Radeon 8500LE chip
+	514e  Radeon R200 QN [Radeon 8500LE]
+# New: Radeon 8500LE chip
+	514f  Radeon R200 QO [Radeon 8500LE]
 	5157  Radeon RV200 QW [Radeon 7500]
 		1002 013a  Radeon 7500
+		1458 4000  RV200 QW [RADEON 7500 PRO MAYA AR]
+		148c 2024  RV200 QW [Radeon 7500LE Dual Display]
+		148c 2025  RV200 QW [Radeon 7500 Evil Master Multi Display Edition]
+		148c 2036  RV200 QW [Radeon 7500 PCI Dual Display]
+		174b 7147  RV200 QW [Sapphire Radeon 7500LE]
 		174b 7161  Radeon RV200 QW [Radeon 7500 LE]
+		17af 0202  RV200 QW [Excalibur Radeon 7500LE]
 	5158  Radeon RV200 QX [Radeon 7500]
-	5159  Radeon VE QY
+# Update: More correct name
+	5159  Radeon RV100 QY [Radeon 7000/VE]
 		1002 000a  Radeon 7000/Radeon VE
 		1002 000b  Radeon 7000
 		1002 0038  Radeon 7000/Radeon VE
 		1002 003a  Radeon 7000/Radeon VE
 		1002 00ba  Radeon 7000/Radeon VE
 		1002 013a  Radeon 7000/Radeon VE
-		174b 7112  Radeon 7000 64M TVO
-	515a  Radeon VE QZ
+		1458 4002  RV100 QY [RADEON 7000 PRO MAYA AV Series]
+		148c 2003  RV100 QY [Radeon 7000 Multi-Display Edition]
+		148c 2023  RV100 QY [Radeon 7000 Evil Master Multi-Display]
+		174b 7112  RV100 QY [Sapphire Radeon VE 7000]
+		1787 0202  RV100 QY [Excalibur Radeon 7000]
+# Update: More correct name
+	515a  Radeon RV100 QZ [Radeon 7000/VE]
 	5168  Radeon R200 Qh
 	5169  Radeon R200 Qi
 	516a  Radeon R200 Qj
 	516b  Radeon R200 Qk
+# new: This one is not in ATI documentation, but is in XFree86 source code
+	516c  Radeon R200 Ql
 	5245  Rage 128 RE/SG
 		1002 0008  Xpert 128
 		1002 0028  Rage 128 AIW
@@ -436,7 +498,10 @@
 		1004 0306  QSound ThunderBird PCI Audio Support Registers
 		122d 1208  DSP368 Audio Support Registers
 		1483 5022  XWave Thunder 3D Audio Support Registers
+	0307  Thunderbird
+	0308  Thunderbird
 	0702  VAS96011 [Golden Gate II]
+	0703  Tollgate
 1005  Avance Logic Inc. [ALI]
 	2064  ALG2032/2064
 	2128  ALG2364A
@@ -514,8 +579,8 @@
 		1011 500b  DE500B Fast Ethernet
 		1014 0001  10/100 EtherJet Cardbus
 		1025 0315  ALN315 Fast Ethernet
-		1033 800c  PC-9821-CS01
-		1033 800d  PC-9821NR-B06
+		1033 800c  PC-9821-CS01 100BASE-TX Interface Card
+		1033 800d  PC-9821NR-B06 100BASE-TX Interface Card
 		108d 0016  Rapidfire 2327 10/100 Ethernet
 		108d 0017  GoCard 2250 Ethernet 10/100 Cardbus
 		10b8 2005  SMC8032DT Extreme Ethernet 10/100
@@ -539,6 +604,7 @@
 		1374 0002  Cardbus Ethernet Card 10/100
 		1374 0007  Cardbus Ethernet Card 10/100
 		1374 0008  Cardbus Ethernet Card 10/100
+		1385 2100  FA510
 		1395 0001  10/100 Ethernet CardBus PC Card
 		13d1 ab01  EtherFast 10/100 Cardbus (PCMPC200)
 		8086 0001  EtherExpress PRO/100 Mobile CardBus 32
@@ -598,7 +664,8 @@
 		1014 1010  CS4610 SoundFusion Audio Accelerator
 	6003  CS 4614/22/24 [CrystalClear SoundFusion Audio Accelerator]
 		1013 4280  Crystal SoundFusion PCI Audio Accelerator
-		1681 0050  Hercules Game Theater XP
+		1681 0050  Game Theater XP
+		1681 a011  Fortissimo III 7.1
 	6004  CS 4614/22/24 [CrystalClear SoundFusion Audio Accelerator]
 	6005  Crystal CS4281 PCI Audio
 		1013 4281  Crystal CS4281 PCI Audio
@@ -660,10 +727,11 @@
 	00a5  ATM Controller (1410a500)
 	00a6  ATM 155MBPS MM Controller (1410a600)
 	00b7  256-bit Graphics Rasterizer [Fire GL1]
-		1902 00b8  Fire GL1
 	00be  ATM 622MBPS Controller (1410be00)
+	00dc  Advanced Systems Management Adapter (ASMA)
 	00fc  CPC710 Dual Bridge and Memory Controller (PCI-64)
 	0105  CPC710 Dual Bridge and Memory Controller (PCI-32)
+	010f  Remote Supervisor Adapter (RSA)
 	0142  Yotta Video Compositor Input
 		1014 0143  Yotta Input Controller (ytin)
 	0144  Yotta Video Compositor Output
@@ -678,6 +746,7 @@
 		1014 022e  ServeRAID-4H
 		1014 0258  ServeRAID-5i
 		1014 0259  ServeRAID-5i
+	0302  XA-32 chipset [Summit]
 	ffff  MPIC-2 interrupt controller
 1015  LSI Logic Corp of Canada
 1016  ICL Personal Systems
@@ -798,6 +867,8 @@
 	8520  CyberBlade i1
 		0e11 b16e  CyberBlade i1 AGP
 		1023 8520  CyberBlade i1 AGP
+	8620  CyberBlade/i1
+		1014 0502  ThinkPad T30
 	8820  CyberBlade XPAi1
 	9320  TGUI 9320
 	9350  GUI Accelerator
@@ -909,9 +980,9 @@
 	0007  Remote Assistant Card 3
 	0008  PowerEdge Expandable RAID Controller 3/Di
 	000a  PowerEdge Expandable RAID Controller 3
-		1027 0121  PowerEdge Expandable RAID Controller 3/Di
 		1028 0106  PowerEdge Expandable RAID Controller 3/Di
 		1028 011b  PowerEdge Expandable RAID Controller 3/Di
+		1028 0121  PowerEdge Expandable RAID Controller 3/Di
 	000c  Embedded Systems Management Device 4
 	000e  PowerEdge Expandable RAID Controller
 	000f  PowerEdge Expandable RAID Controller 4/Di
@@ -925,6 +996,7 @@
 	0518  MGA-II [Athena]
 	0519  MGA 2064W [Millennium]
 	051a  MGA 1064SG [Mystique]
+		102b 0100  MGA-1064SG Mystique
 		102b 1100  MGA-1084SG Mystique
 		102b 1200  MGA-1084SG Mystique
 		1100 102b  MGA-1084SG Mystique
@@ -1019,11 +1091,10 @@
 		102b 5f52  4Sight II
 		102b 9010  Millennium G400 Dual Head
 		1458 0400  GA-G400
-		1705 0001  Digital First Millennium G450 32MB SGRAM
-		1705 0002  Digital First Millennium G450 16MB SGRAM
-		1705 0003  Digital First Millennium G450 32MB
-		1705 0004  Digital First Millennium G450 16MB
-		b16f 0e11  MGA-G400 AGP
+		1705 0001  Millennium G450 32MB SGRAM
+		1705 0002  Millennium G450 16MB SGRAM
+		1705 0003  Millennium G450 32MB
+		1705 0004  Millennium G450 16MB
 	0527  MGA Parhelia AGP
 		102b 0840  Parhelia 128Mb
 	0d10  MGA Ultima/Impression
@@ -1080,18 +1151,22 @@
 	0003  ATM Controller
 	0004  R4000 PCI Bridge
 	0005  PCI to 486-like bus Bridge
-	0006  GUI Accelerator
+	0006  PC-9800 Graphic Accelerator
 	0007  PCI to UX-Bus Bridge
-	0008  GUI Accelerator
-	0009  GUI Accelerator for W98
+	0008  PC-9800 Graphic Accelerator
+	0009  PCI to PC9800 Core-Graph Bridge
+	0016  PCI to VL Bridge
 	001a  [Nile II]
 	0021  Vrc4373 [Nile I]
 	0029  PowerVR PCX1
 	002a  PowerVR 3D
+	002c  Star Alpha 2
+	002d  PCI to C-bus Bridge
 	0035  USB
 		1179 0001  USB
 		12ee 7000  Root Hub
 		1799 0001  Root Hub
+	003b  PCI to C-bus Bridge
 	003e  NAPCCARD Cardbus Controller
 	0046  PowerVR PCX2 [midas]
 	005a  Vrc5074 [Nile 4]
@@ -1121,7 +1196,8 @@
 1037  Hitachi Micro Systems
 1038  AMP, Inc
 1039  Silicon Integrated Systems [SiS]
-	0001  5591/5592 AGP
+# This is what all my tests report. I don't know if this is equivalent to "5591/5592 AGP".
+	0001  SiS 530 Virtual PCI-to-PCI bridge (AGP)
 	0002  SG86C202
 	0006  85C501/2/3
 	0008  85C503/5513
@@ -1131,8 +1207,12 @@
 		1039 0000  SiS5597 SVGA (Shared RAM)
 	0204  82C204
 	0205  SG86C205
-	0300  300/200
+	0300  SiS300/305 PCI/AGP VGA Display Adapter
 		107d 2720  Leadtek WinFast VR300
+	0310  SiS315H PCI/AGP VGA Display Adapter
+	0315  SiS315 PCI/AGP VGA Display Adapter
+	0325  SiS315PRO PCI/AGP VGA Display Adapter
+	0330  SiS330 [Xabre] PCI/AGP VGA Display Adapter
 	0406  85C501/2
 	0496  85C496
 	0530  530 Host
@@ -1159,9 +1239,11 @@
 	3602  83C602
 	5107  5107
 	5300  SiS540 PCI Display Adapter
+	5315  SiS550 AGP/VGA VGA Display Adapter
 	5401  486 PCI Chipset
 	5511  5511/5512
 	5513  5513 [IDE]
+		1019 0970  P6STP-FL motherboard
 		1039 5513  SiS5513 EIDE Controller (A,B step)
 	5517  5517
 	5571  5571
@@ -1175,8 +1257,10 @@
 	6205  VGA Controller
 	6236  6236 3D-AGP
 	6300  SiS630 GUI Accelerator+3D
+		1019 0970  P6STP-FL motherboard
 	6306  SiS530 3D PCI/AGP
 		1039 6306  SiS530,620 GUI Accelerator+3D
+	6325  SiS650/651/M650/740 PCI/AGP VGA Display Adapter
 	6326  86C326 5598/6326
 		1039 6326  SiS6326 GUI Accelerator
 		1092 0a50  SpeedStar A50
@@ -1184,11 +1268,13 @@
 		1092 4910  SpeedStar A70
 		1092 4920  SpeedStar A70
 		1569 6326  SiS6326 GUI Accelerator
-	7001  7001
+	7001  SiS7001 USB Controller
 		1039 7000  Onboard USB Controller
+	7002  SiS7002 USB 2.0
+		1509 7002  Onboard USB Controller
 	7007  FireWire Controller
 	7012  SiS7012 PCI Audio Accelerator
-	7013  56k Winmodem (Smart Link HAMR5600 compatible)
+	7013  Intel 537 [56k Winmodem]
 	7016  SiS7016 10/100 Ethernet Adapter
 		1039 7016  SiS7016 10/100 Ethernet Adapter
 	7018  SiS PCI Audio Accelerator
@@ -1273,6 +1359,7 @@
 	3020  Samurai_IDE
 1043  Asustek Computer, Inc.
 	0675  ISDNLink P-IN100-ST-D
+	4021  v7100 Combo Deluxe [GeForce2 MX + TV tuner]
 1044  Distributed Processing Technology
 	1012  Domino RAID Engine
 	a400  SmartCache/Raid I-IV Controller
@@ -1347,6 +1434,9 @@
 104a  SGS Thomson Microelectronics
 	0008  STG 2000X
 	0009  STG 1764X
+	0010  STG4000 [3D Prophet Kyro Series]
+# From <http://gatekeeper.dec.com/pub/BSD/FreeBSD/FreeBSD-stable/src/share/misc/pci_vendors>
+	0210  STPC Atlas ISA Bridge
 	0981  DEC-Tulip compatible 10/100 Ethernet
 	1746  STG 1764X
 	2774  DEC-Tulip compatible 10/100 Ethernet
@@ -1359,6 +1449,7 @@
 	0500  100 MBit LAN Controller
 	0508  TMS380C2X Compressor Interface
 	1000  Eagle i/f AS
+	104c  PCI1510 PC card Cardbus Controller
 	3d04  TVP4010 [Permedia]
 	3d07  TVP4020 [Permedia 2]
 		1011 4d10  Comet
@@ -1402,7 +1493,7 @@
 	8026  TSB43AB21 IEEE-1394a-2000 Controller (PHY/Link)
 	8027  PCI4451 IEEE-1394 Controller
 		1028 00e6  PCI4451 IEEE-1394 Controller (Dell Inspiron 8100)
-	8400  USR2210 22Mbps Wireless PC Card
+	8400  ACX 100 22Mbps Wireless Interface
 	a001  TDC1570
 	a100  TDC1561
 	a102  TNETA1575 HyperSAR Plus w/PCI Host i/f & UTOPIA i/f
@@ -1418,6 +1509,7 @@
 	ac19  PCI1221
 	ac1a  PCI1210
 	ac1b  PCI1450
+		0e11 b113  Armada M700
 	ac1c  PCI1225
 	ac1d  PCI1251A
 	ac1e  PCI1211
@@ -1440,6 +1532,8 @@
 	ac52  PCI1451 PC card Cardbus Controller
 	ac53  PCI1421 PC card Cardbus Controller
 	ac55  PCI1250 PC card Cardbus Controller
+		1014 0512  ThinkPad T30
+	ac56  PCI1510 PC card Cardbus Controller
 	ac60  PCI2040 PCI to DSP Bridge Controller
 	fe00  FireWire Host Controller
 	fe03  12C01A FireWire Host Controller
@@ -1465,6 +1559,7 @@
 		1050 0840  W89C840 Ethernet Adapter
 	0940  W89C940
 	5a5a  W89C940F
+	6692  W6692
 	9970  W9970CF
 1051  Anigma, Inc.
 1052  ?Young Micro Systems
@@ -1520,6 +1615,7 @@
 	0d38  20263
 		105a 4d39  Fasttrak66
 	1275  20275
+	3376  PDC20376
 	4d30  20267
 		105a 4d33  Ultra100
 		105a 4d39  Fasttrak100
@@ -1537,7 +1633,8 @@
 	5300  DC5300
 	6268  20268R
 	6269  PDC20271
-		105a 6269  Fasttrack tx2
+		105a 6269  FastTrak TX2/TX2000
+	6621  PDC20621 [SX4000] 4 Channel IDE RAID Controller
 	7275  PDC20277
 105b  Foxconn International, Inc.
 105c  Wipro Infotech Limited
@@ -1878,6 +1975,7 @@
 		1095 0670  USB0670
 	0673  USB0673
 	0680  PCI0680
+	3112  Silicon Image SiI 3112 SATARaid Controller
 1096  Alacron
 1097  Appian Technology
 1098  Quantum Designs (H.K.) Ltd
@@ -1897,8 +1995,10 @@
 	036c  Bt879(??) Video Capture
 		13e9 0070  Win/TV (Video Section)
 	036e  Bt878 Video Capture
-		0070 13eb  WinTV/GO
+		0070 13eb  WinTV Series
 		0070 ff01  Viewcast Osprey 200
+		107d 6606  WinFast TV 2000
+		11bd 0012  PCTV pro (TV + FM stereo receiver)
 		11bd 001c  PCTV Sat (DBC receiver)
 		127a 0001  Bt878 Mediastream Controller NTSC
 		127a 0002  Bt878 Mediastream Controller PAL BG
@@ -1913,6 +2013,7 @@
 		1851 1850  FlyVideo'98 - Video
 		1851 1851  FlyVideo II
 		1852 1852  FlyVideo'98 - Video (with FM Tuner)
+		bd11 1200  PCTV pro (TV + FM stereo receiver)
 	036f  Bt879 Video Capture
 		127a 0044  Bt879 Video Capture NTSC
 		127a 0122  Bt879 Video Capture PAL I
@@ -1948,10 +2049,11 @@
 		1851 1851  FlyVideo'98 EZ - video
 		1852 1852  FlyVideo'98 (with FM Tuner)
 	0878  Bt878 Audio Capture
-		0070 13eb  WinTV/GO
+		0070 13eb  WinTV Series
 		0070 ff01  Viewcast Osprey 200
 		1002 0001  TV-Wonder
 		1002 0003  TV-Wonder/VE
+		11bd 0012  PCTV pro (TV + FM stereo receiver, audio section)
 		11bd 001c  PCTV Sat (DBC receiver)
 		127a 0001  Bt878 Video Capture (Audio Section)
 		127a 0002  Bt878 Video Capture (Audio Section)
@@ -1964,6 +2066,7 @@
 		14f1 0002  Bt878 Video Capture (Audio Section)
 		14f1 0003  Bt878 Video Capture (Audio Section)
 		14f1 0048  Bt878 Video Capture (Audio Section)
+		bd11 1200  PCTV pro (TV + FM stereo receiver, audio section)
 	0879  Bt879 Audio Capture
 		127a 0044  Bt879 Video Capture (Audio Section)
 		127a 0122  Bt879 Video Capture (Audio Section)
@@ -2005,7 +2108,8 @@
 10a2  Quantum Corporation
 10a3  Everex Systems Inc
 10a4  Globe Manufacturing Sales
-10a5  Racal Interlan
+10a5  Smart Link Ltd.
+	5449  SmartPCI561 modem
 10a6  Informtech Industrial Ltd.
 10a7  Benchmarq Microelectronics
 10a8  Sierra Semiconductor
@@ -2071,7 +2175,9 @@
 		15ed 1003  MCCS 16-port Serial Hot Swap
 	9036  9036
 	9050  PCI <-> IOBus Bridge
+		10b5 2036  SatPak GPS
 		10b5 2273  SH-ARC SoHard ARCnet card
+		10b5 9050  MP9050
 		1522 0001  RockForce 4 Port V.90 Data/Fax/Voice Modem
 		1522 0002  RockForce 2 Port V.90 Data/Fax/Voice Modem
 		1522 0003  RockForce 6 Port V.90 Data/Fax/Voice Modem
@@ -2082,6 +2188,7 @@
 		15ed 1001  Macrolink MCCS 16-port Serial
 		15ed 1002  Macrolink MCCS 8-port Serial Hot Swap
 		15ed 1003  Macrolink MCCS 16-port Serial Hot Swap
+		5654 5634  OpenLine4 Telephony Card
 		d531 c002  PCIntelliCAN 2xSJA1000 CAN bus
 		d84d 4006  EX-4006 1P
 		d84d 4008  EX-4008 1P EPP/ECP
@@ -2214,12 +2321,15 @@
 		1028 0095  Integrated 3C905C-TX Fast Etherlink for PC Management NIC
 		10b7 1000  3C905C-TX Fast Etherlink for PC Management NIC
 		10b7 7000  10/100 Mini PCI Ethernet Adapter
+	9201  3C920B-EMB Integrated Fast Ethernet Controller
+	9300  3CSOHO100B-TX  [910-A01]
 	9800  3c980-TX [Fast Etherlink XL Server Adapter]
 		10b7 9800  3c980-TX Fast Etherlink XL Server Adapter
 	9805  3c980-TX 10/100baseTX NIC [Python-T]
 		10b7 1201  3c982-TXM 10/100baseTX Dual Port A [Hydra]
 		10b7 1202  3c982-TXM 10/100baseTX Dual Port B [Hydra]
 		10b7 9805  3c980 10/100baseTX NIC [Python-T]
+		10f1 2462  Thunder K7 S2462
 	9900  3C990-TX [Typhoon]
 	9902  3CR990-TX-95 [Typhoon 56-bit]
 	9903  3CR990-TX-97 [Typhoon 168-bit]
@@ -2255,7 +2365,7 @@
 	1001  FDC 37C922
 	a011  83C170QF
 	b106  SMC34C90
-10b9  Acer Laboratories Inc. [ALi]
+10b9  ALi Corporation
 	0111  C-Media CMI8738/C3DX Audio Device (OEM)
 		10b9 0111  C-Media CMI8738/C3DX Audio Device (OEM)
 	1435  M1435
@@ -2277,6 +2387,7 @@
 	1541  M1541
 		10b9 1541  ALI M1541 Aladdin V/V+ AGP System Controller
 	1543  M1543
+	1563  M1563 HyperTransport South Bridge
 	1621  M1621
 	1631  ALI M1631 PCI North Bridge Aladdin Pro III
 	1632  M1632M Northbridge+Trident
@@ -2285,7 +2396,9 @@
 	1646  M1646 Northbridge+Trident
 	1647  M1647 Northbridge [MAGiK 1 / MobileMAGiK 1]
 	1651  M1651/M1651T Northbridge [Aladdin-Pro 5/5M,Aladdin-Pro 5T/5TM]
-	1671  M1671 Northbridge [Aladdin-P4]
+	1671  M1671 Super P4 Northbridge [AGP4X,PCI and SDR/DDR]
+	1681  M1681 P4 Northbridge [AGP8X,HyperTransport and SDR/DDR]
+	1687  M1687 K8 Northbridge [AGP8X and HyperTransport]
 	3141  M3141
 	3143  M3143
 	3145  M3145
@@ -2306,14 +2419,19 @@
 	5239  USB 2.0 Controller
 	5243  M1541 PCI to AGP Controller
 	5247  PCI to AGP Controller
+	5249  M5249 HTT to PCI Bridge
 	5251  M5251 P1394 OHCI 1.0 Controller
 	5253  M5253 P1394 OHCI 1.1 Controller
 	5261  M5261 Ethernet Controller
 	5451  M5451 PCI AC-Link Controller Audio Device
+		1014 0506  ThinkPad R30
 	5453  M5453 PCI AC-Link Controller Modem Device
 	5455  M5455 PCI AC-Link Controller Audio Device
-	5457  M5457 AC-Link Modem Interface Controller
-	5459  SmartPCI561 56K Modem
+	5457  Intel 537 [M5457 AC-Link Modem]
+# Same but more usefull for driver's lookup
+	5459  SmartLink SmartPCI561 56K Modem
+# SmartLink PCI SoftModem
+	545a  SmartLink SmartPCI563 56K Modem
 	5471  M5471 Memory Stick Controller
 	5473  M5473 SD-MMC Controller
 	7101  M7101 PMU
@@ -2336,7 +2454,7 @@
 10c6  Rambus Inc.
 10c7  Media Vision
 10c8  Neomagic Corporation
-	0001  NM2070 [MagicGraph NM2070]
+	0001  NM2070 [MagicGraph 128]
 	0002  NM2090 [MagicGraph 128V]
 	0003  NM2093 [MagicGraph 128ZV]
 	0004  NM2160 [MagicGraph 128XD]
@@ -2358,13 +2476,14 @@
 		10f7 830b  MagicGraph 128XD
 		10f7 830d  MagicGraph 128XD
 		10f7 8312  MagicGraph 128XD
-	0005  [MagicMedia 256AV]
+	0005  NM2200 [MagicGraph 256AV]
+		1014 00dd  ThinkPad 570
 	0006  NM2360 [MagicMedia 256ZX]
 	0016  NM2380 [MagicMedia 256XL+]
 		10c8 0016  MagicMedia 256XL+
-	0025  [MagicMedia 256AV+]
-	0083  [MagicGraph 128ZV Plus]
-	8005  [MagicMedia 256AV Audio]
+	0025  NM2230 [MagicGraph 256AV+]
+	0083  NM2093 [MagicGraph 128ZV+]
+	8005  NM2200 [MagicMedia 256AV Audio]
 		0e11 b0d1  MagicMedia 256AV Audio Device on Discovery
 		0e11 b126  MagicMedia 256AV Audio Device on Durango
 		1014 00dd  MagicMedia 256AV Audio Device on BlackTip Thinkpad
@@ -2377,7 +2496,7 @@
 		110a 8005  MagicMedia 256AV Audio Device
 		14c0 0004  MagicMedia 256AV Audio Device
 	8006  NM2360 [MagicMedia 256ZX Audio]
-	8016  NM2360 [MagicMedia 256ZX Audio]
+	8016  NM2380 [MagicMedia 256XL+ Audio]
 10c9  Dataexpert Corporation
 10ca  Fujitsu Microelectr., Inc.
 10cb  Omron Corporation
@@ -2422,7 +2541,7 @@
 	0008  NV1 [EDGE 3D]
 	0009  NV1 [EDGE 3D]
 	0010  NV2 [Mutara V08]
-	0020  NV4 [Riva TnT]
+	0020  NV4 [RIVA TNT]
 		1043 0200  V3400 TNT
 		1048 0c18  Erazor II SGRAM
 		1048 0c1b  Erazor II
@@ -2444,7 +2563,7 @@
 		10de 0020  Riva TNT
 		1102 1015  Graphics Blaster CT6710
 		1102 1016  Graphics Blaster RIVA TNT
-	0028  NV5 [Riva TnT2]
+	0028  NV5 [RIVA TNT2/TNT2 Pro]
 		1043 0200  AGP-V3800 SGRAM
 		1043 0201  AGP-V3800 SDRAM
 		1043 0205  PCI-V3800
@@ -2460,7 +2579,7 @@
 		1102 1020  3D Blaster RIVA TNT2
 		1102 1026  3D Blaster RIVA TNT2 Digital
 		14af 5810  Maxi Gamer Xentor
-	0029  NV5 [Riva TnT2 Ultra]
+	0029  NV5 [RIVA TNT2 Ultra]
 		1043 0200  AGP-V3800 Deluxe
 		1043 0201  AGP-V3800 Ultra SDRAM
 		1043 0205  PCI-V3800 Ultra
@@ -2470,16 +2589,18 @@
 		14af 5820  Maxi Gamer Xentor 32
 	002a  NV5 [Riva TnT2]
 	002b  NV5 [Riva TnT2]
-	002c  NV6 [Vanta]
+	002c  NV6 [Vanta/Vanta LT]
 		1043 0200  AGP-V3800 Combat SDRAM
 		1043 0201  AGP-V3800 Combat
 		1092 6820  Viper V730
 		1102 1031  CT6938 VANTA 8MB
 		1102 1034  CT6894 VANTA 16MB
 		14af 5008  Maxi Gamer Phoenix 2
-	002d  RIVA TNT2 Model 64
+	002d  NV5M64 [RIVA TNT2 Model 64/Model 64 Pro]
 		1043 0200  AGP-V3800M
 		1043 0201  AGP-V3800M
+		1048 0c3a  Erazor III LT
+		10de 001e  M64 AGP4x
 		1102 1023  CT6892 RIVA TNT2 Value
 		1102 1024  CT6932 RIVA TNT2 Value 32Mb
 		1102 102c  CT6931 RIVA TNT2 Value [Jumper]
@@ -2487,7 +2608,19 @@
 		1554 1041  PixelView RIVA TNT2 M64 32MB
 	002e  NV6 [Vanta]
 	002f  NV6 [Vanta]
-	00a0  NV5 [Riva TNT2]
+	0060  nForce2 ISA Bridge
+		1043 80ad  A7N8X Mainboard
+	0064  nForce2 SMBus (MCP)
+	0065  nForce2 IDE
+	0066  nForce2 Ethernet Controller
+	0067  nForce2 USB Controller
+		1043 0c11  A7N8X Mainboard
+	0068  nForce2 USB Controller
+		1043 0c11  A7N8X Mainboard
+	006a  nForce2 AC97 Audio Controler (MCP)
+	006b  nForce MultiMedia audio [Via VT82C686B]
+	006e  nForce2 FireWire (IEEE 1394) Controller
+	00a0  NV5 [Aladdin TNT2]
 		14af 5810  Maxi Gamer Xentor
 	0100  NV10 [GeForce 256 SDR]
 		1043 0200  AGP-V6600 SGRAM
@@ -2496,43 +2629,52 @@
 		1043 4009  AGP-V6600 SDRAM
 		1102 102d  CT6941 GeForce 256
 		14af 5022  3D Prophet SE
-	0101  NV10 [GeForce 256 DDR]
+	0101  NV10DDR [GeForce 256 DDR]
 		1043 0202  AGP-V6800 DDR
 		1043 400a  AGP-V6800 DDR SGRAM
 		1043 400b  AGP-V6800 DDR SDRAM
 		1102 102e  CT6971 GeForce 256 DDR
 		14af 5021  3D Prophet DDR-DVI
-	0103  NV10 [Quadro]
-	0110  NV11 [GeForce2 MX]
+	0103  NV10GL [Quadro]
+	0110  NV11 [GeForce2 MX/MX 400]
 		1043 4015  AGP-V7100 Pro
 		1043 4031  V7100 Pro with TV output
+		1462 8817  MSI GeForce2 MX400 Pro32S [MS-8817]
 		14af 7102  3D Prophet II MX
 		14af 7103  3D Prophet II MX Dual-Display
-	0111  NV11 [GeForce2 MX DDR]
+	0111  NV11DDR [GeForce2 MX 100 DDR/200 DDR]
 	0112  NV11 [GeForce2 Go]
-	0113  NV11 [GeForce2 MXR]
-	0150  NV15 [GeForce2 GTS]
+	0113  NV11GL [Quadro2 MXR/EX]
+	0150  NV15 [GeForce2 GTS/Pro]
 		1043 4016  V7700 AGP Video Card
 		107d 2840  WinFast GeForce2 GTS with TV output
 		1462 8831  Creative GeForce2 Pro
-	0151  NV15 [GeForce2 Ti]
+	0151  NV15DDR [GeForce2 Ti]
 		1043 405f  V7700Ti
-	0152  NV15 [GeForce2 Ultra, Bladerunner]
+	0152  NV15BR [GeForce2 Ultra, Bladerunner]
 		1048 0c56  GLADIAC Ultra
-	0153  NV15 [Quadro2 Pro]
-	0170  NV17 [GeForce4 MX460]
-	0171  NV17 [GeForce4 MX440]
+	0153  NV15GL [Quadro2 Pro]
+	0170  NV17 [GeForce4 MX 460]
+	0171  NV17 [GeForce4 MX 440]
 		1462 8661  G4MX440-VTP
-	0172  NV17 [GeForce4 MX420]
-	0173  NV1x
+		1462 8730  MX440SES-T (MS-8873)
+		147b 8f00  Abit Siluro GeForce4MX440
+	0172  NV17 [GeForce4 MX 420]
+	0173  NV17 [GeForce4 MX 440-SE]
 	0174  NV17 [GeForce4 440 Go]
 	0175  NV17 [GeForce4 420 Go]
 	0176  NV17 [GeForce4 420 Go 32M]
-	0178  Quadro4 500XGL
+	0178  NV17GL [Quadro4 550 XGL]
 	0179  NV17 [GeForce4 440 Go 64M]
-	017a  Quadro4 200/400NVS
-	017b  Quadro4 550XGL
-	017c  Quadro4 550 GoGL
+	017a  NV17GL [Quadro4 200/400 NVS]
+	017b  NV17GL [Quadro4 550 XGL]
+	017c  NV17GL [Quadro4 550 GoGL]
+	0181  NV18 [GeForce4 MX 440 AGP 8x]
+	0182  NV18 [GeForce4 MX 440SE AGP 8x]
+	0183  NV18 [GeForce4 MX 420 AGP 8x]
+	0188  NV18GL [Quadro4 580 XGL]
+	018a  NV18GL [Quadro4 NVS]
+	018b  NV18GL [Quadro4 380 XGL]
 	01a0  NV15 [GeForce2 - nForce GPU]
 	01a4  nForce CPU bridge
 	01ab  nForce 420 Memory Controller (DDR)
@@ -2544,20 +2686,37 @@
 	01b7  nForce AGP to PCI Bridge
 	01b8  nForce PCI-to-PCI bridge
 	01bc  nForce IDE
-	01c1  nForce MC97 Modem (Smart Link HAMR5600 compatible)
+	01c1  Intel 537 [nForce MC97 Modem]
+	01c2  nForce USB Controller
+	01c3  nForce Ethernet Controller
+	01e8  nForce2 AGP
+	01f0  NV18 [GeForce4 MX - nForce GPU]
 	0200  NV20 [GeForce3]
 		1043 402f  AGP-V8200 DDR
-	0201  NV20 [GeForce3 Ti200]
-	0202  NV20 [GeForce3 Ti500]
+	0201  NV20 [GeForce3 Ti 200]
+	0202  NV20 [GeForce3 Ti 500]
 		1043 405b  V8200 T5
 		1545 002f  Xtasy 6964
-	0203  NV20 [Quadro DCC]
-	0250  NV25 [GeForce4 Ti4600]
-	0251  NV25 [GeForce4 Ti4400]
-	0253  NV25 [GeForce4 Ti4200]
-	0258  Quadro4 900XGL
-	0259  Quadro4 750XGL
-	025b  Quadro4 700XGL
+	0203  NV20DCC [Quadro DCC]
+	0250  NV25 [GeForce4 Ti 4600]
+	0251  NV25 [GeForce4 Ti 4400]
+	0252  NV25 [GeForce4 Ti]
+	0253  NV25 [GeForce4 Ti 4200]
+		107d 2896  WinFast A250 LE TD (Dual VGA/TV-out/DVI)
+		147b 8f09  Siluro (Dual VGA/TV-out/DVI)
+	0258  NV25GL [Quadro4 900 XGL]
+	0259  NV25GL [Quadro4 750 XGL]
+	025b  NV25GL [Quadro4 700 XGL]
+	0280  NV28 [GeForce4 Ti 4800]
+	0281  NV28 [GeForce4 Ti 4200 AGP 8x]
+	0282  NV28 [GeForce4 Ti 4800 SE]
+	0288  NV28GL [Quadro4 980 XGL]
+	0289  NV28GL [Quadro4 780 XGL]
+	0300  NV30 [GeForce FX]
+	0301  NV30 [GeForce FX 5800 Ultra]
+	0302  NV30 [GeForce FX 5800]
+	0308  NV30GL [Quadro FX 2000]
+	0309  NV30GL [Quadro FX 1000]
 10df  Emulex Corporation
 	1ae5  LP6000 Fibre Channel Host Adapter
 	f085  LP850 Fibre Channel Adapter
@@ -2583,6 +2742,7 @@
 10e3  Tundra Semiconductor Corp.
 	0000  CA91C042 [Universe]
 	0860  CA91C860 [QSpan]
+	0862  CA91C862A [QSpan-II]
 10e4  Tandem Computers
 10e5  Micro Industries Corporation
 10e6  Gainbery Computer Products Inc.
@@ -2612,6 +2772,7 @@
 	2010  CyberPro 2000A
 	5000  CyberPro 5000
 	5050  CyberPro 5050
+	5202  CyberPro 5202
 10eb  Artists Graphics
 	0101  3GA
 	8111  Twist3 Frame Grabber
@@ -2634,6 +2795,7 @@
 		1186 1300  DFE-538TX
 		1186 1320  SN5200
 		1186 8139  DRN-32TX
+		11f6 8139  FN22-3(A) LinxPRO Ethernet Adapter
 		1259 2500  AT-2500TX
 		1259 2503  AT-2500TX/ACPI
 		1429 d010  ND010
@@ -2649,10 +2811,11 @@
 		8e2e 7100  KF-230TX/2
 		a0a0 0007  ALN-325C
 	8169  RTL-8169
+		1371 434e  ProG-2000L
 	8197  SmartLAN56 56K Modem
 10ed  Ascii Corporation
 	7310  V7310
-10ee  Xilinx, Inc.
+10ee  Xilinx Corporation
 	3fc0  RME Digi96
 	3fc1  RME Digi96/8
 	3fc2  RME Digi96/8 Pro
@@ -2675,9 +2838,11 @@
 10fa  Truevision
 	000c  TARGA 1000
 10fb  Thesys Gesellschaft für Mikroelektronik mbH
+	186f  TH 6255
 10fc  I-O Data Device, Inc.
 # What's in the cardbus end of a Sony ACR-A01 card, comes with newer Vaio CD-RW drives
 	0003  Cardbus IDE Controller
+	0005  Cardbus SCSI CBSC II
 10fd  Soyo Computer, Inc
 10fe  Fast Multimedia AG
 10ff  NCube
@@ -2707,11 +2872,16 @@
 		1102 8061  SBLive! Player 5.1
 	0004  SB Audigy
 		1102 0051  SB0090 Audigy Player
+		1102 0053  SB0090 Audigy Player/OEM
+	0006  [SB Live! Value] EMU10k1X
 	4001  SB Audigy FireWire Port
+		1102 0010  SB Audigy FireWire Port
 	7002  SB Live! MIDI/Game Port
 		1102 0020  Gameport Joystick
 	7003  SB Audigy MIDI/Game port
-		1102 0040  SB Audigy MIDI/Gameport
+		1102 0040  SB Audigy MIDI/Game Port
+	7004  [SB Live! Value] Input device controller
+	8064  SB0100 [SBLive! 5.1 OEM]
 	8938  ES1371
 1103  Triones Technologies, Inc.
 	0003  HPT343
@@ -2733,14 +2903,18 @@
 	0130  VT6305 1394.A Controller
 	0305  VT8363/8365 [KT133/KM133]
 		1043 8033  A7V Mainboard
+		1043 803e  A7V-E Mainboard
 		1043 8042  A7V133/A7V133-C Mainboard
 		147b a401  KT7/KT7-RAID/KT7A/KT7A-RAID Mainboard
 	0391  VT8371 [KX133]
 	0501  VT8501 [Apollo MVP4]
 	0505  VT82C505
 	0561  VT82C561
-	0571  VT82C586B PIPC Bus Master IDE
+	0571  VT82C586/B/686A/B PIPC Bus Master IDE
+		1043 8052  VT8233A Bus Master ATA100/66/33 IDE
 		1106 0571  VT8235 Bus Master ATA133/100/66/33 IDE
+		1179 0001  Magnia Z310
+		1458 5002  GA-7VAX Mainboard
 	0576  VT82C576 3V [Apollo Master]
 	0585  VT82C585VP [Apollo VP1/VPX]
 	0586  VT82C586/A/B PCI-to-ISA [Apollo VP]
@@ -2756,11 +2930,15 @@
 	0680  VT82C680 [Apollo P6]
 	0686  VT82C686 [Apollo Super South]
 		1043 8033  A7V Mainboard
+		1043 803e  A7V-E Mainboard
 		1043 8040  A7M266 Mainboard
 		1043 8042  A7V133/A7V133-C Mainboard
 		1106 0000  VT82C686/A PCI to ISA Bridge
 		1106 0686  VT82C686/A PCI to ISA Bridge
+		1179 0001  Magnia Z310
+		147b a702  KG7-Lite Mainboard
 	0691  VT82C693A/694x [Apollo PRO133x]
+		1179 0001  Magnia Z310
 		1458 0691  VT82C691 Apollo Pro System Controller
 	0693  VT82C693 [Apollo Pro Plus]
 	0698  VT82C693A [Apollo Pro133 AGP]
@@ -2771,7 +2949,7 @@
 	1595  VT82C595/97 [Apollo VP2/97]
 	3038  USB
 		0925 1234  USB Controller
-		1234 0925  MVP3 USB Controller
+		1179 0001  Magnia Z310
 	3040  VT82C586B ACPI
 	3043  VT86C100A [Rhine]
 		10bd 0000  VT86C100A Fast Ethernet Adapter
@@ -2782,8 +2960,10 @@
 	3051  VT82C596 Power Management
 	3057  VT82C686 [Apollo Super ACPI]
 		1043 8033  A7V Mainboard
+		1043 803e  A7V-E Mainboard
 		1043 8040  A7M266 Mainboard
 		1043 8042  A7V133/A7V133-C Mainboard
+		1179 0001  Magnia Z310
 	3058  VT82C686 AC97 Audio Controller
 		0e11 b194  Soundmax integrated digital audio
 		1106 4511  Onboard Audio on EP7KXA
@@ -2791,31 +2971,41 @@
 		1462 3091  MS-6309 Onboard Audio
 		15dd 7609  Onboard Audio
 	3059  VT8233 AC97 Audio Controller
+		1458 a002  GA-7VAX Onboard Audio (Realtek ALC650)
 	3065  VT6102 [Rhine-II]
 		1106 0102  VT6102 [Rhine II] Embeded Ethernet Controller on VT8235
-		1106 3065  Embedded ethernet on VIA Eden
 		1186 1400  DFE-530TX rev A
 		1186 1401  DFE-530TX rev B
-	3068  AC97 Modem Controller
+	3068  Intel 537 [AC97 Modem]
 	3074  VT8233 PCI to ISA Bridge
+		1043 8052  VT8233A
 	3091  VT8633 [Apollo Pro266]
-	3099  VT8367 [KT266]
-		1043 8064  A7V266-E
-		1043 807f  A7V333
+	3099  VT8366/A/7 [Apollo KT266/A/333]
+		1043 8064  A7V266-E Mainboard
+		1043 807f  A7V333 Mainboard
 	3101  VT8653 Host Bridge
 	3102  VT8662 Host Bridge
 	3103  VT8615 Host Bridge
 	3104  USB 2.0
+		1458 5004  GA-7VAX Mainboard
+	3106  VT6105 [Rhine-III]
 	3109  VT8233C PCI to ISA Bridge
 	3112  VT8361 [KLE133] Host Bridge
 	3116  VT8375 [KM266] Host Bridge
+# found on EPIA M6000/9000 mainboard
+	3122  VT8623 [Apollo CLE266] integrated CastleRock graphics
+# found on EPIA M6000/9000 mainboard
+	3123  VT8623 [Apollo CLE266]
 	3128  VT8753 [P4X266 AGP]
 	3133  VT3133 Host Bridge
 	3147  VT8233A ISA Bridge
 	3148  P4M266 Host Bridge
 	3156  P/KN266 Host Bridge
-	3177  VT8233A ISA Bridge
-	3189  VT8377 [KT400] Host Bridge
+	3168  VT8374 P4X400 Host Controller/AGP Bridge
+	3177  VT8235 ISA Bridge
+		1458 5001  GA-7VAX Mainboard
+	3189  VT8377 [KT400 AGP] Host Bridge
+		1458 5000  GA-7VAX Mainboard
 	5030  VT82C596 ACPI [Apollo PRO]
 	6100  VT85C100A [Rhine II]
 	8231  VT8231 [PCI-to-ISA Bridge]
@@ -2831,12 +3021,12 @@
 	8691  VT82C691 [Apollo Pro]
 	8693  VT82C693 [Apollo Pro Plus] PCI Bridge
 	b091  VT8633 [Apollo Pro266 AGP]
-	b099  VT8367 [KT333 AGP]
+	b099  VT8366/A/7 [Apollo KT266/A/333 AGP]
 	b101  VT8653 AGP Bridge
 	b102  VT8362 AGP Bridge
 	b103  VT8615 AGP Bridge
 	b112  VT8361 [KLE133] AGP Bridge
-	b168  VT8235
+	b168  VT8235 PCI Bridge
 1107  Stratus Computers
 	0576  VIA VT82C570MV [Apollo] (Wrong vendor ID!)
 1108  Proteon, Inc.
@@ -2867,8 +3057,8 @@
 	6037  Firepower Powerized SMP I/O ASIC
 	6073  Firepower Powerized SMP I/O ASIC
 1111  Santa Cruz Operation
-# DJ: Some people say that 0x1112 is Rockwell International
-1112  RNS - Div. of Meret Communications Inc
+# Also claimed to be RNS or Rockwell International, current PCISIG records list Osicom
+1112  Osicom Technologies Inc
 	2200  FDDI Adapter
 	2300  Fast Ethernet Adapter
 	2340  4 Port Fast Ethernet Adapter
@@ -2878,6 +3068,7 @@
 		103c 1207  EN-1207D Fast Ethernet Adapter
 		1113 1211  EN-1207D Fast Ethernet Adapter
 	1216  EN-1216 Ethernet Adapter
+		111a 1020  SpeedStream 1020 PCI 10/100 Ethernet Adaptor [EN-1207F-TX ?]
 	1217  EN-1217 Ethernet Adapter
 	5105  10Mbps Network card
 	9211  EN-1207D Fast Ethernet Adapter
@@ -3018,10 +3209,14 @@
 	0001  MVC IM-PCI Video frame grabber/processor
 1130  Computervision
 1131  Philips Semiconductors
+	1561  USB 1.1 Host Controller
+	1562  USB 2.0 Host Controller
 	3400  SmartPCI56(UCB1500) 56K Modem
 	7130  SAA7130 Video Broadcast Decoder
+	7133  SAA7133 Audio+video broadcast decoder
 # PCI audio and video broadcast decoder (http://www.semiconductors.philips.com/pip/saa7134hl)
 	7134  SAA7134
+	7135  SAA7135 Audio+video broadcast decoder
 	7145  SAA7145
 	7146  SAA7146
 		114b 2003  DVRaptor Video Edit/Capture Card
@@ -3050,6 +3245,7 @@
 		1133 e004  DIVA 2.0 U
 	e005  DIVA LOW
 		1133 e005  DIVA 2.01 S/T
+	e00b  DIVA 2.02
 	e010  DIVA Server BRI-2M
 		1133 e010  DIVA Server BRI-2M
 	e012  DIVA Server BRI-8M
@@ -3098,6 +3294,12 @@
 1144  Cincinnati Milacron
 	0001  Noservo controller
 1145  Workbit Corporation
+	8007  NinjaSCSI-32 Workbit
+	f007  NinjaSCSI-32 KME
+	f010  NinjaSCSI-32 Workbit
+	f012  NinjaSCSI-32 Logitec
+	f013  NinjaSCSI-32 Logitec
+	f015  NinjaSCSI-32 Melco
 1146  Force Computers
 1147  Interface Corp
 1148  Syskonnect (Schneider & Koch)
@@ -3127,6 +3329,22 @@
 		1148 9844  SK-9844 (1000Base-SX dual link)
 		1148 9861  SK-9861 (1000Base-SX VF45 single link)
 		1148 9862  SK-9862 (1000Base-SX VF45 dual link)
+# Information got from SysKonnekt
+		1148 9871  SK-9871 (1000Base-ZX single link)
+# Information got from SysKonnekt
+		1148 9872  SK-9872 (1000Base-ZX dual link)
+		1259 2970  AT-2970SX [Allied Telesyn]
+		1259 2972  AT-2970T [Allied Telesyn]
+		1259 2975  AT-2970SX [Allied Telesyn]
+		1259 2977  AT-2970T [Allied Telesyn]
+	4320  SK-98xx Gigabit Ethernet Server Adapter
+		1148 5021  SK-9821 V2.0 Gigabit Ethernet 10/100/1000Base-T Adapter
+		1148 5041  SK-9841 V2.0 Gigabit Ethernet 1000Base-LX Adapter
+		1148 5043  SK-9843 V2.0 Gigabit Ethernet 1000Base-SX Adapter
+		1148 5051  SK-9851 V2.0 Gigabit Ethernet 1000Base-SX Adapter
+		1148 5061  SK-9861 V2.0 Gigabit Ethernet 1000Base-SX Adapter
+		1148 5071  SK-9871 V2.0 Gigabit Ethernet 1000Base-ZX Adapter
+		1148 9521  SK-9521 10/100/1000Base-T Adapter
 	4400  Gigabit Ethernet
 1149  Win System Corporation
 114a  VMIC
@@ -3253,12 +3471,17 @@
 	0014  CNB20-HE Host Bridge
 	0015  CMIC-GC Host Bridge
 	0016  CMIC-GC Host Bridge
-	0017  CMIC-SL
+	0017  GCNB-LE Host Bridge
 	0200  OSB4 South Bridge
 	0201  CSB5 South Bridge
+	0203  CSB6 South Bridge
 	0211  OSB4 IDE Controller
 	0212  CSB5 IDE Controller
-	0220  OSB4/CSB5 USB Controller
+	0213  CSB6 RAID/IDE Controller
+	0220  OSB4/CSB5 OHCI USB Controller
+	0221  CSB6 OHCI USB Controller
+	0225  GCLE Host Bridge
+	0227  GCLE-2 Host Bridge
 1167  Mutoh Industries Inc
 1168  Thine Electronics Inc
 1169  Centre for Development of Advanced Computing
@@ -3309,7 +3532,9 @@
 	0465  RL5c465
 	0466  RL5c466
 	0475  RL5c475
+		144d c006  vpr Matrix 170B4 CardBus bridge
 	0476  RL5c476 II
+		1014 0185  ThinkPad A/T/X Series
 		104d 80df  Vaio PCG-FX403
 		104d 80e7  VAIO PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP
 	0477  RL5c477
@@ -3318,7 +3543,9 @@
 	0522  R5C522 IEEE 1394 Controller
 		1014 01cf  ThinkPad A30p (2653-64G)
 	0551  R5C551 IEEE 1394 Controller
+		144d c006  vpr Matrix 170B4
 	0552  R5C552 IEEE 1394 Controller
+		1014 0511  ThinkPad A/T/X Series
 1181  Telmatics International
 1183  Fujikura Ltd
 1184  Forks Inc
@@ -3453,7 +3680,6 @@
 11c0  Hewlett Packard
 11c1  Lucent Microelectronics
 	0440  56k WinModem
-		0001 0440  LT WinModem 56k Data+Fax+Voice+Dsvd
 		1033 8015  LT WinModem 56k Data+Fax+Voice+Dsvd
 		1033 8047  LT WinModem 56k Data+Fax+Voice+Dsvd
 		1033 804f  LT WinModem 56k Data+Fax+Voice+Dsvd
@@ -3495,7 +3721,6 @@
 		1468 0441  Presario 56k V.90 DF Modem
 		1668 0440  Lucent Win Modem
 	0442  56k WinModem
-		0001 0440  LT WinModem 56k Data+Fax+Voice+VoiceView+Dsvd
 		11c1 0440  LT WinModem 56k Data+Fax+Voice+VoiceView+Dsvd
 		11c1 0442  LT WinModem 56k Data+Fax+Voice+VoiceView+Dsvd
 		13e0 0412  LT WinModem 56k Data+Fax+Voice+VoiceView+Dsvd
@@ -3537,6 +3762,7 @@
 	044e  LT WinModem
 	044f  V90 WildWire Modem
 	0450  LT WinModem
+		144f 4005  Magnia SG20
 	0451  LT WinModem
 	0452  LT WinModem
 	0453  LT WinModem
@@ -3547,15 +3773,18 @@
 	0458  LT WinModem
 	0459  LT WinModem
 	045a  LT WinModem
+	045c  LT WinModem
 	0461  V90 WildWire Modem
 	0462  V90 WildWire Modem
 	0480  Venus Modem (V90, 56KFlex)
 	5801  USB
 	5802  USS-312 USB Controller
+# 4 port PCI USB Controller made by Agere (formely Lucent)
+	5803  USS-344S USB Controller
 	5811  FW323
 		dead 0800  FireWire Host Bus Adapter
 11c2  Sand Microelectronics
-11c3  NEC Corp
+11c3  NEC Corporation
 11c4  Document Technologies, Inc
 11c5  Shiva Corporation
 11c6  Dainippon Screen Mfg. Co. Ltd
@@ -3671,6 +3900,11 @@
 1200  CSS Corporation
 1201  Vista Controls Corp
 1202  Network General Corp.
+	4300  Gigabit Ethernet Adapter
+		1202 9841  SK-9841 LX
+		1202 9842  SK-9841 LX dual link
+		1202 9843  SK-9843 SX
+		1202 9844  SK-9843 SX dual link
 1203  Bayer Corporation, Agfa Division
 1204  Lattice Semiconductor Corporation
 1205  Array Corporation
@@ -3717,6 +3951,7 @@
 	6933  OZ6933 Cardbus Controller
 		1025 1016  Travelmate 612 TX
 	6972  OZ6912 Cardbus Controller
+		1179 0001  Magnia Z310
 1218  Hybricon Corp.
 1219  First Virtual Corporation
 121a  3Dfx Interactive, Inc.
@@ -3738,7 +3973,6 @@
 		139c 0016  Raven
 		139c 0017  Raven
 		14af 0002  Maxi Gamer Phoenix
-		3030 3030  Skywell Magic TwinPower
 	0004  Voodoo Banshee [Velocity 100]
 	0005  Voodoo 3
 		121a 0004  Voodoo3 AGP
@@ -3831,9 +4065,10 @@
 1241  DSC Communications
 # Formerly Jaycor Networks, Inc.
 1242  JNI Corporation
+	1560  JNIC-1560 PCI-X Fibre Channel Controller
+		1242 6562  FCX2-6562 Dual Channel PCI-X Fibre Channel Adapter
+		1242 656a  FCX-6562 PCI-X Fibre Channel Adapter
 	4643  FCI-1063 Fibre Channel Adapter
-	6562  FCX2-6562 Dual Channel PCI-X Fibre Channel Adapter
-	656a  FCX-6562 PCI-X Fibre Channel Adapter
 1243  Delphax
 1244  AVM Audiovisuelles MKTG & Computer System GmbH
 	0700  B1 ISDN
@@ -3850,7 +4085,7 @@
 1249  Samsung Electronics Co., Ltd.
 124a  AEG Electrocom GmbH
 124b  SBS/Greenspring Modular I/O
-	0040  PCI-40A Quad IndustryPack Carrier or cPCI-200 Four Slot IndustryPack carrier
+	0040  PCI-40A or cPCI-200 Quad IndustryPack carrier
 		124b 9080  PCI9080 Bridge
 124c  Solitron Technologies, Inc.
 124d  Stallion Technologies, Inc.
@@ -3893,8 +4128,8 @@
 	1969  ES1969 Solo-1 Audiodrive
 		1014 0166  ES1969 SOLO-1 AudioDrive on IBM Aptiva Mainboard
 		125d 8888  Solo-1 Audio Adapter
-		525f c888  ES1969 SOLO-1 AudioDrive (+ES1938)
 	1978  ES1978 Maestro 2E
+		0e11 b112  Armada M700
 		1033 803c  ES1978 Maestro-2E Audiodrive
 		1033 8058  ES1978 Maestro-2E Audiodrive
 		1092 4000  Monster Sound MX400
@@ -3926,7 +4161,9 @@
 1260  Harris Semiconductor
 	3873  Prism 2.5 Wavelan chipset
 		1186 3501  DWL-520 Wireless PCI Adapter
-		1737 3874  WMP11 Wireless 802.11b PCI Adaptor
+		1668 0414  HWP01170-01 802.11b PCI Wireless Adapter
+		1737 3874  WMP11 Wireless 802.11b PCI Adapter
+		8086 2513  Wireless 802.11b MiniPCI Adapter
 	8130  HMP8130 NTSC/PAL Video Decoder
 	8131  HMP8131 NTSC/PAL Video Decoder
 1261  Matsushita-Kotobuki Electronics Industries, Ltd.
@@ -4017,7 +4254,6 @@
 		8086 5643  ES1371, ES1373 AudioPCI On Motherboard Vancouver
 		8086 5753  ES1371, ES1373 AudioPCI On Motherboard WS440BX
 	5000  ES1370 [AudioPCI]
-		4942 4c4c  Creative Sound Blaster AudioPCI128
 	5880  5880 AudioPCI
 		1274 2000  Creative Sound Blaster AudioPCI128
 		1274 2003  Creative SoundBlaster AudioPCI 128
@@ -4579,7 +4815,19 @@
 135a  Brain Boxes
 135b  Giganet Inc
 135c  Quatech Inc
+	0010  QSC-100
+	0020  DSC-100
+	0030  DSC-200/300
+	0040  QSC-200/300
+	0050  ESC-100D
+	0060  ESC-100M
 	00f0  MPAC-100 Syncronous Serial Card (Zilog 85230)
+	0170  QSCLP-100
+	0180  DSCLP-100
+	0190  SSCLP-100
+	01a0  QSCLP-200/300
+	01b0  DSCLP-200/300
+	01c0  SSCLP-200/300
 135d  ABB Network Partner AB
 135e  Sealevel Systems Inc
 	7101  Single Port RS-232/422/485/530
@@ -4679,6 +4927,10 @@
 	0006  6500 Public Key Processor
 	0007  7811 Security Processor
 	0012  7951 Security Processor
+	0014  78XX Security Processor
+	0016  8065 Security Processor
+	0017  8165 Security Processor
+	0018  8154 Security Processor
 13a4  Rascom Inc
 13a5  Audio Digital Imaging Inc
 13a6  Videonics Inc
@@ -4729,7 +4981,10 @@
 13ce  Cocom A/S
 13cf  Studio Audio & Video Ltd
 13d0  Techsan Electronics Co Ltd
+# http://www.b2c2inc.com/products/pc-specs.html
+	2103  B2C2 Sky2PC PCI [SkyStar2]
 13d1  Abocom Systems Inc
+	ab02  ADMtek Centaur-C rev 17 [D-Link DFE-680TX] CardBus Fast Ethernet Adapter
 	ab06  RTL8139 [FE2000VX] CardBus Fast Ethernet Attached Port Adapter
 13d2  Shark Multimedia Inc
 13d3  IMC Networks
@@ -4777,6 +5032,7 @@
 	0101  CM8338B
 		13f6 0101  CMI8338-031 PCI Audio Device
 	0111  CM8738
+		1019 0970  P6STP-FL motherboard
 		1043 8077  CMI8738 6-channel audio controller
 		1043 80e2  CMI8738 6ch-MX
 		13f6 0111  CMI8738/C3DX PCI Audio Device
@@ -4826,6 +5082,7 @@
 1411  Ikos Systems Inc
 1412  IC Ensemble Inc
 	1712  ICE1712 [Envy24]
+	1724  ICE1724 [Envy24HT]
 1413  Addonics
 1414  Microsoft Corporation
 1415  Oxford Semiconductor Ltd
@@ -4923,7 +5180,7 @@
 	0001  NextMove PCI
 1460  DYNARC INC
 1461  Avermedia Technologies Inc
-1462  Micro-star International Co Ltd
+1462  Micro-Star International Co., Ltd.
 1463  Fast Corporation
 1464  Interactive Circuits & Systems Ltd
 1465  GN NETTEST Telecom DIV.
@@ -5010,6 +5267,14 @@
 	0000  DSL NIC
 14b4  PHILIPS Business Electronics B.V.
 14b5  Creamware GmBH
+	0200  Scope
+	0300  Pulsar
+	0400  Pulsar2
+	0600  Pulsar2
+	0800  DSP-Board
+	0900  DSP-Board
+	0a00  DSP-Board
+	0b00  DSP-Board
 14b6  Quantum Data Corp.
 14b7  PROXIM Inc
 	0001  Symphony 4110
@@ -5020,6 +5285,7 @@
 	0350  PC4800
 	4500  PC4500
 	4800  PC4800
+	a504  Cisco Aironet Wireless 802.11b
 14ba  INTERNIX Inc.
 14bb  SEMTECH Corporation
 14bc  Globespan Semiconductor Inc.
@@ -5092,40 +5358,41 @@
 14e3  AMTELCO
 14e4  Broadcom Corporation
 	1644  NetXtreme BCM5700 Gigabit Ethernet
-		1014 0277  Broadcom Vigil B5700 1000BaseTX
+		1014 0277  Broadcom Vigil B5700 1000Base-T
 		1028 00d1  Broadcom BCM5700
 		1028 0106  Broadcom BCM5700
-		1028 0109  Broadcom BCM5700 1000BaseTX
+		1028 0109  Broadcom BCM5700 1000Base-T
 		1028 010a  Broadcom BCM5700 1000BaseTX
-		10b7 1000  3C996-T 1000BaseTX
-		10b7 1001  3C996B-T 1000BaseTX
-		10b7 1002  3C996C-T 1000BaseTX
-		10b7 1003  3C997-T 1000BaseTX Dual Port
-		10b7 1004  3C996-SX 1000BaseSX
-		10b7 1005  3C997-SX 1000BaseSX Dual Port
+		10b7 1000  3C996-T 1000Base-T
+		10b7 1001  3C996B-T 1000Base-T
+		10b7 1002  3C996C-T 1000Base-T
+		10b7 1003  3C997-T 1000Base-T Dual Port
+		10b7 1004  3C996-SX 1000Base-SX
+		10b7 1005  3C997-SX 1000Base-SX Dual Port
 		10b7 1008  3C942 Gigabit LOM (31X31)
-		14e4 0002  NetXtreme 1000BaseSX
-		14e4 0003  NetXtreme 1000BaseSX
-		14e4 0004  NetXtreme 1000BaseTX
+		14e4 0002  NetXtreme 1000Base-SX
+		14e4 0003  NetXtreme 1000Base-SX
+		14e4 0004  NetXtreme 1000Base-T
 		14e4 1028  NetXtreme 1000BaseTX
-		14e4 1644  BCM5700 1000BaseTX
+		14e4 1644  BCM5700 1000Base-T
 	1645  NetXtreme BCM5701 Gigabit Ethernet
 		0e11 007c  NC7770 Gigabit Server Adapter (PCI-X, 10/100/1000-T)
 		0e11 007d  NC6770 Gigabit Server Adapter (PCI-X, 1000-SX)
 		0e11 0085  NC7780 Gigabit Server Adapter (embedded, WOL)
 		0e11 0099  NC7780 Gigabit Server Adapter (embedded, WOL)
 		0e11 009a  NC7770 Gigabit Server Adapter (PCI-X, 10/100/1000-T)
-		1028 0121  Broadcom BCM5701 1000BaseTX
-		10b7 1004  3C996-SX 1000BaseSX
-		10b7 1006  3C996B-T 1000BaseTX
-		10b7 1007  3C1000-T 1000BaseTX
-		10b7 1008  3C940-BR01 1000BaseTX
-		14e4 0001  BCM5701 1000BaseTX
-		14e4 0005  BCM5701 1000BaseTX
-		14e4 0006  BCM5701 1000BaseTX
-		14e4 0007  BCM5701 1000BaseSX
-		14e4 0008  BCM5701 1000BaseTX
-		14e4 8008  BCM5701 1000BaseTX
+		0e11 00c1  NC6770 Gigabit Server Adapter (PCI-X, 1000-SX)
+		1028 0121  Broadcom BCM5701 1000Base-T
+		10b7 1004  3C996-SX 1000Base-SX
+		10b7 1006  3C996B-T 1000Base-T
+		10b7 1007  3C1000-T 1000Base-T
+		10b7 1008  3C940-BR01 1000Base-T
+		14e4 0001  BCM5701 1000Base-T
+		14e4 0005  BCM5701 1000Base-T
+		14e4 0006  BCM5701 1000Base-T
+		14e4 0007  BCM5701 1000Base-SX
+		14e4 0008  BCM5701 1000Base-T
+		14e4 8008  BCM5701 1000Base-T
 	1646  NetXtreme BCM5702 Gigabit Ethernet
 		0e11 00bb  NC7760 1000BaseTX
 		1028 0126  Broadcom BCM5702 1000BaseTX
@@ -5138,10 +5405,48 @@
 		14e4 000b  BCM5703 1000BaseTX
 		14e4 8009  BCM5703 1000BaseTX
 		14e4 800a  BCM5703 1000BaseTX
+	1648  NetXtreme BCM5704 Gigabit Ethernet
+		0e11 00cf  NC7772 Gigabit Server Adapter (PCI-X, 10,100,1000-T)
+		0e11 00d0  NC7782 Gigabit Server Adapter (PCI-X, 10,100,1000-T)
+		0e11 00d1  NC7783 Gigabit Server Adapter (PCI-X, 10,100,1000-T)
+		10b7 2000  3C998-T Dual Port 10/100/1000 PCI-X
+		10b7 3000  3C999-T Quad Port 10/100/1000 PCI-X
+		1166 1648  NetXtreme CIOB-E 1000Base-T
 	164d  NetXtreme BCM5702FE Gigabit Ethernet
-	16a6  NetXtreme BCM5702X Gigabit Ethernet
-	16a7  NetXtreme BCM5703X Gigabit Ethernet
-	4212  BCM v.90 56k modem
+	1653  NetXtreme BCM5705 Gigabit Ethernet
+	165d  NetXtreme BCM5705M Gigabit Ethernet
+	1696  NetXtreme BCM5782 Gigabit Ethernet
+		14e4 000d  NetXtreme BCM5782 1000Base-T
+	16a6  NetXtreme BCM5702 Gigabit Ethernet
+		0e11 00bb  NC7760 Gigabit Server Adapter (PCI-X, 10/100/1000-T)
+		1028 0126  BCM5702 1000Base-T
+		14e4 000c  BCM5702 1000Base-T
+		14e4 8009  BCM5702 1000Base-T
+	16a7  NetXtreme BCM5703 Gigabit Ethernet
+		0e11 00ca  NC7771 Gigabit Server Adapter (PCI-X, 10,100,1000-T)
+		0e11 00cb  NC7781 Gigabit Server Adapter (PCI-X, 10,100,1000-T)
+		14e4 0009  NetXtreme BCM5703 1000Base-T
+		14e4 000a  NetXtreme BCM5703 1000Base-SX
+		14e4 000b  NetXtreme BCM5703 1000Base-T
+		14e4 800a  NetXtreme BCM5703 1000Base-T
+	16a8  NetXtreme BCM5704S Gigabit Ethernet
+		10b7 2001  3C998-SX Dual Port 1000-SX PCI-X
+	16c6  NetXtreme BCM5702 Gigabit Ethernet
+		10b7 1100  3C1000B-T 10/100/1000 PCI
+		14e4 000c  BCM5702 1000Base-T
+		14e4 8009  BCM5702 1000Base-T
+	16c7  NetXtreme BCM5703 Gigabit Ethernet
+		14e4 0009  NetXtreme BCM5703 1000Base-T
+		14e4 000a  NetXtreme BCM5703 1000Base-SX
+	4210  BCM4210 iLine10 HomePNA 2.0
+	4211  BCM4211 iLine10 HomePNA 2.0 + V.90 56k modem
+	4212  BCM4212 v.90 56k modem
+	4301  BCM4301 802.11b
+	4401  BCM4401 100Base-T
+	4402  BCM4402 Integrated 10/100BaseT
+	4410  BCM4413 iLine32 HomePNA 2.0
+	4411  BCM4413 V.90 56k modem
+	4412  BCM4413 10/100BaseT
 	5820  BCM5820 Crypto Accelerator
 	5821  BCM5821 Crypto Accelerator
 14e5  Pixelfusion Ltd
@@ -5361,8 +5666,14 @@
 		1522 0400  RockForceDUO+ 2 Port V.92/V.44 Data/Fax/Voice Modem
 		1522 0500  RockForceQUATRO+ 4 Port V.92/V.44 Data/Fax/Voice Modem
 		1522 0600  RockForce+ 2 Port V.90 Data/Fax/Voice Modem
+		1522 0700  RockForce+ 4 Port V.90 Data/Fax/Voice Modem
+		1522 0800  RockForceOCTO+ 8 Port V.92/V.44 Data/Fax/Voice Modem
 1523  MUSIC Semiconductors
 1524  ENE Technology Inc
+	1211  CB1211 Cardbus Controller
+	1225  CB1225 Cardbus Controller
+	1410  CB1410 Cardbus Controller
+	1420  CB1420 Cardbus Controller
 1525  IMPACT Technologies
 1526  ISS, Inc
 1527  SOLECTRON
@@ -5393,6 +5704,8 @@
 1541  MACHONE Communications
 1542  VIVID Technology Inc
 1543  SILICON Laboratories
+	3052  Intel 537 [Winmodem]
+	4c22  Si3036 MC'97 DAA
 1544  DCM DATA Systems
 1545  VISIONTEK
 1546  IOI Technology Corp
@@ -5631,24 +5944,37 @@
 	2002  Fast Universal Data Output
 1638  Standard Microsystems Corp [SMC]
 	1100  SMC2602W EZConnect / Addtron AWA-100
+163c  Smart Link Ltd.
+	5449  SmartPCI561 Modem
 1657  Brocade Communications Systems, Inc.
+165a  Epix Inc
+	c100  PIXCI(R) CL1 Camera Link Video Capture Board [custom QL5232]
+	d200  PIXCI(R) D2X Digital Video Capture Board [custom QL5232]
+	d300  PIXCI(R) D3X Digital Video Capture Board [custom QL5232]
 165d  Hsing Tech. Enterprise Co., Ltd.
 1661  Worldspace Corp.
-1668  Action Tec Electronics Inc
+1668  Actiontec Electronics Inc
+1681  Hercules
 16ab  Global Sun Technology Inc
+	1102  PCMCIA-to-PCI Wireless Network Bridge
+16be  Creatix Polymedia GmbH
 16ec  U.S. Robotics
 	3685  Wireless Access PCI Adapter Model 022415
 16f6  VideoTele.com, Inc.
+1705  Digital First, Inc.
 170b  NetOctave Inc
 170c  YottaYotta Inc.
+172a  Accelerated Encryption
 1737  Linksys
 173b  Altima (nee Broadcom)
 	03e8  AC1000 Gigabit Ethernet
 	03ea  AC9100 Gigabit Ethernet
+		173b 0001  AC1002
 1743  Peppercon AG
 	8139  ROL/F-100 Fast Ethernet Adapter with ROL
 174b  PC Partner Limited
 175e  Sanera Systems, Inc.
+1787  Hightech Information System Ltd.
 # also used by Struck Innovative Systeme for joint developments
 1796  Research Centre Juelich
 	0001  SIS1100 [Gigabit link]
@@ -5657,7 +5983,22 @@
 	0004  CAMAC Controller
 	0005  PROFIBUS
 	0006  AMCC HOTlink
+1799  Belkin
+17af  Hightech Information System Ltd.
+17cc  NetChip Technology, Inc
+	2280  USB 2.0
 1813  Ambient Technologies Inc
+	4000  HaM controllerless modem
+		16be 0001  V9x HAM Data Fax Modem
+	4100  HaM plus Data Fax Modem
+		16be 0002  V9x HAM 1394
+1851  Microtune, Inc.
+1852  Anritsu Corp.
+1888  Varisys Ltd
+	0301  VMFX1 FPGA PMC module
+	0601  VSM2 dual PMC carrier
+	0710  VS14x series PowerPC PCI board
+	0720  VS24x series PowerPC PCI board
 1a08  Sierra semiconductor
 	0000  SC15064
 1b13  Jaton Corp
@@ -5670,7 +6011,10 @@
 	2020  DC-390
 	690c  690c
 	dc29  DC290
+2000  Smart Link Ltd.
 2001  Temporal Research Ltd
+2003  Smart Link Ltd.
+2004  Smart Link Ltd.
 21c3  21st Century Computer Corp.
 2348  Racore
 	2010  8142 100VG/AnyLAN
@@ -5682,6 +6026,8 @@
 3000  Hansol Electronics Inc.
 3142  Post Impression Systems.
 3388  Hint Corp
+	0013  HiNT HC4 PCI to ISDN bridge, Multimedia audio controller
+	0014  HiNT HC4 PCI to ISDN bridge, Network controller
 	0021  HB1-SE33 PCI-PCI Bridge
 	8011  VXPro II Chipset
 		3388 8011  VXPro II Chipset CPU to PCI Bridge
@@ -5714,6 +6060,7 @@
 	000a  GLINT R3
 		3d3d 0121  Oxygen VX1
 	000c  GLINT R3 [Oxygen VX1]
+		3d3d 0144  Oxygen VX1-4X AGP [Permedia 4]
 	0100  Permedia II 2D+3D
 	1004  Permedia
 	3d04  Permedia
@@ -5741,6 +6088,7 @@
 	0100  AladdinCARD
 	0200  CPC
 4444  Internext Compression Inc
+	0803  iTVC15 MPEG-2 Encoder
 4468  Bridgeport machines
 4594  Cogetec Informatique Inc
 45fb  Baldor Electric Company
@@ -5786,6 +6134,7 @@
 5143  Qualcomm Inc
 5145  Ensoniq (Old)
 	3031  Concert AudioPCI
+5168  Animation Technologies Inc.
 5301  Alliance Semiconductor Corp.
 	0001  ProMotion aT3D
 5333  S3 Inc.
@@ -5894,7 +6243,9 @@
 	8c10  86C270-294 Savage/MX-MV
 	8c11  82C270-294 Savage/MX
 	8c12  86C270-294 Savage/IX-MV
+		1014 017f  ThinkPad T20
 	8c13  86C270-294 Savage/IX
+		1179 0001  Magnia Z310
 	8c22  SuperSavage MX/128
 	8c24  SuperSavage MX/64
 	8c26  SuperSavage MX/64C
@@ -5905,10 +6256,10 @@
 	8c2e  SuperSavage IX/C SDR
 		1014 01fc  ThinkPad T23 (2647-4MG)
 	8c2f  SuperSavage IX/C DDR
-# Integrated in VIA ProSavage PN133 North Bridge
-	8d01  VT8603 [ProSavage PN133] AGP4X VGA Controller (Twister)
+	8d01  86C380 [ProSavageDDR K4M266]
 	8d02  VT8636A [ProSavage KN133] AGP4X VGA Controller (TwisterK)
-	8d04  VT8751 [ProSavageDDR P4M266] VGA Controller
+	8d03  VT8751 [ProSavageDDR P4M266]
+	8d04  [ProSavageDDR K4M266]
 	9102  86C410 Savage 2000
 		1092 5932  Viper II Z200
 		1092 5934  Viper II Z200
@@ -5927,6 +6278,7 @@
 	0001  I-30xx Scanner Interface
 5555  Genroco, Inc
 	0003  TURBOstor HFP-832 [HiPPI NIC]
+5654  VoiceTronix Pty Ltd
 5700  Netpower
 6356  UltraStor
 6374  c't Magazin für Computertechnik
@@ -6002,13 +6354,14 @@
 	1029  82559 Ethernet Controller
 	1030  82559 InBusiness 10/100
 	1031  82801CAM (ICH3) PRO/100 VE (LOM) Ethernet Controller
-		1014 0209  ThinkPad A30p (2653-64G)
+		1014 0209  ThinkPad A/T/X Series
 		104d 80e7  Vaio PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP
 		107b 5350  EtherExpress PRO/100 VE
 		1179 0001  EtherExpress PRO/100 VE
 		144d c000  EtherExpress PRO/100 VE
 		144d c001  EtherExpress PRO/100 VE
 		144d c003  EtherExpress PRO/100 VE
+		144d c006  vpr Matrix 170B4
 	1032  82801CAM (ICH3) PRO/100 VE Ethernet Controller
 	1033  82801CAM (ICH3) PRO/100 VM (LOM) Ethernet Controller
 	1034  82801CAM (ICH3) PRO/100 VM Ethernet Controller
@@ -6022,8 +6375,11 @@
 	103c  82801BD PRO/100 VM (CNR) Ethernet Controller
 	103d  82801BD PRO/100 VE (MOB) Ethernet Controller
 	103e  82801BD PRO/100 VM (MOB) Ethernet Controller
+	1040  536EP Data Fax Modem
+		16be 1040  V.9X DSP Data Fax Modem
 	1059  82551QM Ethernet Controller
 	1130  82815 815 Chipset Host Bridge and Memory Controller Hub
+		1025 1016  Travelmate 612 TX
 		1043 8027  TUSL2-C Mainboard
 		104d 80df  Vaio PCG-FX403
 	1131  82815 815 Chipset AGP Bridge
@@ -6074,13 +6430,16 @@
 		1014 01f2  10/100 Ethernet Server Adapter
 		1014 0207  Ethernet Pro/100 S
 		1014 0232  10/100 Dual Port Server Adapter
+		1014 023a  ThinkPad R30
 		1014 105c  Netfinity 10/100
+		1014 2205  ThinkPad A22p
 		1014 305c  10/100 EtherJet Management Adapter
 		1014 405c  10/100 EtherJet Adapter with Alert on LAN
 		1014 505c  10/100 EtherJet Secure Management Adapter
 		1014 605c  10/100 EtherJet Secure Management Adapter
 		1014 705c  10/100 Netfinity 10/100 Ethernet Security Adapter
 		1014 805c  10/100 Netfinity 10/100 Ethernet Security Adapter
+		1028 009b  PowerEdge 2550
 		1033 8000  PC-9821X-B06
 		1033 8016  PK-UG-X006
 		1033 801f  PK-UG-X006
@@ -6211,6 +6570,7 @@
 		8086 8000  82806AA PCI64 Hub Controller (HRes)
 	1460  82870P2 P64H2 Hub PCI Bridge
 	1461  82870P2 P64H2 I/OxAPIC
+		15d9 3480  P4DP6
 	1462  82870P2 P64H2 Hot Plug Controller
 	1960  80960RP [i960RP Microprocessor]
 		101e 0431  MegaRAID 431 RAID Controller
@@ -6262,20 +6622,28 @@
 	2428  82801AB PCI Bridge
 	2440  82801BA ISA Bridge (LPC)
 	2442  82801BA/BAM USB (Hub #1)
+		1014 01c6  Netvista A40/A40p
+		1025 1016  Travelmate 612 TX
 		104d 80df  Vaio PCG-FX403
 		147b 0507  TH7II-RAID
 	2443  82801BA/BAM SMBus
+		1014 01c6  Netvista A40/A40p
+		1025 1016  Travelmate 612 TX
 		1043 8027  TUSL2-C Mainboard
 		104d 80df  Vaio PCG-FX403
 		147b 0507  TH7II-RAID
 	2444  82801BA/BAM USB (Hub #2)
+		1025 1016  Travelmate 612 TX
 		104d 80df  Vaio PCG-FX403
 		147b 0507  TH7II-RAID
 	2445  82801BA/BAM AC'97 Audio
+		1014 01c6  Netvista A40/A40p
+		1025 1016  Travelmate 612 TX
 		104d 80df  Vaio PCG-FX403
 		1462 3370  STAC9721 AC
 		147b 0507  TH7II-RAID
-	2446  82801BA/BAM AC'97 Modem
+	2446  Intel 537 [82801BA/BAM AC'97 Modem]
+		1025 1016  Travelmate 612 TX
 		104d 80df  Vaio PCG-FX403
 	2448  82801BAM/CAM PCI Bridge
 	2449  82801BA/BAM/CA/CAM Ethernet Controller
@@ -6309,6 +6677,7 @@
 		1025 1016  Travelmate 612TX
 		104d 80df  Vaio PCG-FX403
 	244b  82801BA IDE U100
+		1014 01c6  Netvista A40/A40p
 		1043 8027  TUSL2-C Mainboard
 		147b 0507  TH7II-RAID
 	244c  82801BAM ISA Bridge (LPC)
@@ -6322,39 +6691,64 @@
 	245e  82801E PCI Bridge
 	2480  82801CA ISA Bridge (LPC)
 	2482  82801CA/CAM USB (Hub #1)
-		1014 0220  ThinkPad T23 (2647-4MG) or A30p (2653-64G)
+		1014 0220  ThinkPad A/T/X Series
 		104d 80e7  VAIO PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP
+		15d9 3480  P4DP6
+		8086 1958  vpr Matrix 170B4
 	2483  82801CA/CAM SMBus
-		1014 0220  ThinkPad T23 (2647-4MG) or A30p (2653-64G)
+		1014 0220  ThinkPad A/T/X Series
 		104d 80e7  VAIO PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP
+		15d9 3480  P4DP6
+		8086 1958  vpr Matrix 170B4
 	2484  82801CA/CAM USB (Hub #2)
-		1014 0220  ThinkPad T23 (2647-4MG) or A30p (2653-64G)
+		1014 0220  ThinkPad A/T/X Series
 		104d 80e7  VAIO PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP
+		15d9 3480  P4DP6
+		8086 1958  vpr Matrix 170B4
 	2485  82801CA/CAM AC'97 Audio
 		1014 0222  ThinkPad T23 (2647-4MG) or A30p (2653-64G)
+		1014 0508  ThinkPad T30
+		1014 051c  ThinkPad A/T/X Series
 		104d 80e7  VAIO PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP
+		144d c006  vpr Matrix 170B4
 	2486  82801CA/CAM AC'97 Modem
-		1014 0223  ThinkPad A30p (2653-64G)
+		1014 0223  ThinkPad A/T/X Series
 		1014 0503  ThinkPad R31 2656BBG
+		1014 051a  ThinkPad A/T/X Series
 		104d 80e7  VAIO PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP
+		1179 0001  Toshiba Satellite 1110 Z15 internal Modem
 		134d 4c21  Dell Inspiron 2100 internal modem
+		144d 2115  vpr Matrix 170B4 internal modem
+		14f1 5421  MD56ORD V.92 MDC Modem
 	2487  82801CA/CAM USB (Hub #3)
-		1014 0220  ThinkPad T23 (2647-4MG) or A30p (2653-64G)
+		1014 0220  ThinkPad A/T/X Series
 		104d 80e7  VAIO PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP
+		15d9 3480  P4DP6
+		8086 1958  vpr Matrix 170B4
 	248a  82801CAM IDE U100
-		1014 0220  ThinkPad T23 (2647-4MG) or A30p (2653-64G)
+		1014 0220  ThinkPad A/T/X Series
 		104d 80e7  VAIO PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP
+		8086 1958  vpr Matrix 170B4
 	248b  82801CA IDE U100
+		15d9 3480  P4DP6
 	248c  82801CAM ISA Bridge (LPC)
 	24c0  82801DB ISA Bridge (LPC)
+		1462 5800  845PE Max (MS-6580)
 	24c2  82801DB USB (Hub #1)
+		1462 5800  845PE Max (MS-6580)
 	24c3  82801DB SMBus
+		1462 5800  845PE Max (MS-6580)
 	24c4  82801DB USB (Hub #2)
+		1462 5800  845PE Max (MS-6580)
 	24c5  82801DB AC'97 Audio
+		1462 5800  845PE Max (MS-6580)
 	24c6  82801DB AC'97 Modem
 	24c7  82801DB USB (Hub #3)
+		1462 5800  845PE Max (MS-6580)
 	24cb  82801DB ICH4 IDE
+		1462 5800  845PE Max (MS-6580)
 	24cd  82801DB USB EHCI Controller
+		1462 3981  845PE Max (MS-6580) Onboard USB EHCI Controller
 	2500  82820 820 (Camino) Chipset Host Bridge (MCH)
 		1028 0095  Precision Workstation 220 Chipset
 		1043 801c  P3C-2000 system chipset
@@ -6371,7 +6765,9 @@
 	2533  82860 860 (Wombat) Chipset AGP Bridge
 	2534  82860 860 (Wombat) Chipset PCI Bridge
 	2540  e7500 [Plumas] DRAM Controller
+		15d9 3480  P4DP6
 	2541  e7500 [Plumas] DRAM Controller Error Reporting
+		15d9 3480  P4DP6
 	2543  e7500 [Plumas] HI_B Virtual PCI Bridge (F0)
 	2544  e7500 [Plumas] HI_B Virtual PCI Bridge (F1)
 	2545  e7500 [Plumas] HI_C Virtual PCI Bridge (F0)
@@ -6379,14 +6775,16 @@
 	2547  e7500 [Plumas] HI_D Virtual PCI Bridge (F0)
 	2548  e7500 [Plumas] HI_D Virtual PCI Bridge (F1)
 	2560  82845G/GL [Brookdale-G] Chipset Host Bridge
+		1462 5800  845PE Max (MS-6580)
 	2561  82845G/GL [Brookdale-G] Chipset AGP Bridge
 	2562  82845G/GL [Brookdale-G] Chipset Integrated Graphics Device
 	3092  Integrated RAID
 	3575  82830 830 Chipset Host Bridge
-		1014 021d  ThinkPad T23 (2647-4MG) or A30p (2653-64G)
+		1014 021d  ThinkPad A/T/X Series
 		104d 80e7  VAIO PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP
 	3576  82830 830 Chipset AGP Bridge
 	3577  82830 CGC [Chipset Graphics Controller]
+		1014 0513  ThinkPad A/T/X Series
 	3578  82830 830 Chipset Host Bridge
 	5200  EtherExpress PRO/100 Intelligent Server
 	5201  EtherExpress PRO/100 Intelligent Server
@@ -6414,6 +6812,7 @@
 	7181  440LX/EX - 82443LX/EX AGP bridge
 	7190  440BX/ZX/DX - 82443BX/ZX/DX Host bridge
 		0e11 0500  Armada 1750 Laptop System Chipset
+		0e11 b110  Armada M700
 		1179 0001  Toshiba Tecra 8100 Laptop System Chipset
 	7191  440BX/ZX/DX - 82443BX/ZX/DX AGP bridge
 	7192  440BX/ZX/DX - 82443BX/ZX/DX Host bridge (AGP disabled)
@@ -6610,13 +7009,19 @@
 		9005 62a1  19160 Ultra160 SCSI Controller
 	0083  AIC-7892D U160/m
 	008f  AIC-7892P U160/m
+		1179 0001  Magnia Z310
+		15d9 9005  Onboard SCSI Host Adapter
 	00c0  AHA-3960D / AIC-7899A U160/m
 		0e11 f620  Compaq 64-Bit/66MHz Dual Channel Wide Ultra3 SCSI Adapter
 		9005 f620  AHA-3960D U160/m
 	00c1  AIC-7899B U160/m
 	00c3  AIC-7899D U160/m
 	00c5  RAID subsystem HBA
+		1028 00c5  PowerEdge 2550
 	00cf  AIC-7899P U160/m
+		1028 00d1  PowerEdge 2550
+		10f1 2462  Thunder K7 S2462
+		15d9 9005  Onboard SCSI Host Adapter
 	0250  ServeRAID Controller
 		1014 0279  ServeRAID-xx
 		1014 028c  ServeRAID-xx
@@ -6660,6 +7065,8 @@ a727  3Com Corporation
 aa42  Scitex Digital Video
 ac1e  Digital Receiver Technology Inc
 b1b3  Shiva Europe Limited
+# Pinnacle should be 11bd, but they got it wrong several times --mj
+bd11  Pinnacle Systems, Inc. (Wrong ID)
 c001  TSI Telsys
 c0a9  Micron/Crucial Technology
 c0de  Motorola
@@ -6669,6 +7076,7 @@ cafe  Chrysalis-ITS
 cccc  Catapult Communications
 cddd  Tyzx, Inc.
 	0101  DeepSea 1 High Speed Stereo Vision Frame Grabber
+	0200  DeepSea 2 High Speed Stereo Vision Frame Grabber
 d4d4  Dy4 Systems Inc
 	0601  PCI Mezzanine Card
 d531  I+ME ACTIA GmbH
@@ -6677,12 +7085,17 @@ dead  Indigita Corporation
 e000  Winbond
 	e000  W89C940
 e159  Tiger Jet Network Inc.
-	0001  Model 300 128k
+	0001  Intel 537
 		0059 0001  128k ISDN-S/T Adapter
 		0059 0003  128k ISDN-U Adapter
 	0002  Tiger100APC ISDN chipset
 e4bf  EKF Elektronik GmbH
 ea01  Eagle Technology
+# The main chip of all these devices is by Xilinx -> It could also be a Xilinx ID.
+ea60  RME
+	9896  Digi32
+	9897  Digi32 Pro
+	9898  Digi32/8
 eabb  Aashima Technology B.V.
 eace  Endace Measurement Systems, Ltd
 	3100  DAG 3.10 OC-3/OC-12
@@ -6698,18 +7111,29 @@ eace  Endace Measurement Systems, Ltd
 	422e  DAG 4.2E Dual Gigabit Ethernet
 ec80  Belkin Corporation
 	ec00  F5D6000
-ecc0  Echo Corporation
+ecc0  Echo Digital Audio Corporation
+	0050  Gina24_301
+	0051  Gina24_361
+	0060  Layla24
+	0070  Mona_301_80
+	0071  Mona_301_66
+	0072  Mona_361
+	0080  Mia
 edd8  ARK Logic Inc
 	a091  1000PV [Stingray]
 	a099  2000PV [Stingray]
 	a0a1  2000MT
 	a0a9  2000MI
 f1d0  AJA Video
+# All boards I have seen have this ID not efac, though all docs say efac...
+	cafe  KONA SD SMPTE 259M I/O
 	efac  KONA SD SMPTE 259M I/O
 	facd  KONA HD SMPTE 292M I/O
 fa57  Fast Search & Transfer ASA
 febd  Ultraview Corp.
-feda  Epigram Inc
+feda  Broadcom Inc (nee Epigram)
+	a0fa  BCM4210 iLine10 HomePNA 2.0
+	a10e  BCM4230 iLine10 HomePNA 2.0
 fffe  VMWare Inc
 	0710  Virtual SVGA
 ffff  Illegal Vendor ID
diff --git a/xc/programs/Xserver/hw/xfree86/etc/pcitweak.c b/xc/programs/Xserver/hw/xfree86/etc/pcitweak.c
index bc2807835..42a9f9712 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/pcitweak.c
+++ b/xc/programs/Xserver/hw/xfree86/etc/pcitweak.c
@@ -5,7 +5,7 @@
  *
  * Author: David Dawes <dawes@xfree86.org>
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/etc/pcitweak.c,v 1.15 2001/01/06 20:19:12 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/etc/pcitweak.c,v 1.16 2002/12/14 04:41:13 dawes Exp $ */
 
 #include "X.h"
 #include "os.h"
@@ -41,7 +41,7 @@ static char *myname = NULL;
 int
 main(int argc, char *argv[])
 {
-    char c;
+    int c;
     PCITAG tag;
     int bus, device, func;
     Bool list = FALSE, rd = FALSE, wr = FALSE;
diff --git a/xc/programs/Xserver/hw/xfree86/etc/scanpci.c b/xc/programs/Xserver/hw/xfree86/etc/scanpci.c
index e5af74a1d..6093bd31a 100644
--- a/xc/programs/Xserver/hw/xfree86/etc/scanpci.c
+++ b/xc/programs/Xserver/hw/xfree86/etc/scanpci.c
@@ -23,7 +23,7 @@
  * OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  *
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/etc/scanpci.c,v 3.89 2002/10/03 21:32:19 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/etc/scanpci.c,v 3.92 2003/02/13 12:17:14 tsi Exp $ */
 
 #include "X.h"
 #include "os.h"
@@ -152,7 +152,7 @@ main(int argc, char *argv[])
     int Verbose = 0;
     int i = 0;
     int force = 0;
-    char c;
+    int c;
 
     xf86Info.pciFlags = PCIProbe1;
 
@@ -432,17 +432,48 @@ print_bridge_pci_class(pciConfigPtr pcr)
 {
     printf("  HEADER    0x%02x  LATENCY 0x%02x\n",
 	   pcr->pci_header_type, pcr->pci_latency_timer);
-    printf("  PRIBUS    0x%02x  SECBUS 0x%02x  SUBBUS 0x%02x  SECLT 0x%02x\n",
+    printf("  PRIBUS    0x%02x  SECBUS 0x%02x  SUBBUS 0x%02x\n",
 	   pcr->pci_primary_bus_number, pcr->pci_secondary_bus_number,
-	   pcr->pci_subordinate_bus_number, pcr->pci_secondary_latency_timer);
-    printf("  IOBASE    0x%02x  IOLIM 0x%02x  SECSTATUS 0x%04x\n",
-	   pcr->pci_io_base << 8, (pcr->pci_io_limit << 8) | 0xfff,
-	   pcr->pci_secondary_status);
-    printf("  NOPREFETCH_MEMBASE 0x%08x  MEMLIM 0x%08x\n",
-	   pcr->pci_mem_base << 16, (pcr->pci_mem_limit << 16) | 0xfffff);
-    printf("  PREFETCH_MEMBASE   0x%08x  MEMLIM 0x%08x\n",
-	   pcr->pci_prefetch_mem_base << 16,
-	   (pcr->pci_prefetch_mem_limit << 16) | 0xfffff);
+	   pcr->pci_subordinate_bus_number);
+    printf("  SECLT     0x%02x  SECSTATUS 0x%04x\n",
+	   pcr->pci_secondary_latency_timer, pcr->pci_secondary_status);
+
+    if (pcr->pci_io_base || pcr->pci_io_limit ||
+	pcr->pci_upper_io_base || pcr->pci_upper_io_limit) {
+	if (((pcr->pci_io_base & 0x0f) == 0x01) ||
+	    ((pcr->pci_io_limit & 0x0f) == 0x01)) {
+	    printf("  IOBASE    0x%04x%04x  IOLIM 0x%04x%04x\n",
+		   pcr->pci_upper_io_base, (pcr->pci_io_base & 0x00f0) << 8,
+		   pcr->pci_upper_io_limit, (pcr->pci_io_limit << 8) | 0x0fff);
+	} else {
+	    printf("  IOBASE    0x%04x  IOLIM 0x%04x\n",
+		   (pcr->pci_io_base & 0x00f0) << 8,
+		   (pcr->pci_io_limit << 8) | 0x0fff);
+	}
+    }
+
+    if (pcr->pci_mem_base || pcr->pci_mem_limit)
+	printf("  NOPREFETCH_MEMBASE 0x%08x  MEMLIM 0x%08x\n",
+	       (pcr->pci_mem_base & 0x00fff0) << 16,
+	       (pcr->pci_mem_limit << 16) | 0x0fffff);
+
+    if (pcr->pci_prefetch_mem_base || pcr->pci_prefetch_mem_limit ||
+	pcr->pci_prefetch_upper_mem_base ||
+	pcr->pci_prefetch_upper_mem_limit) {
+	if (((pcr->pci_prefetch_mem_base & 0x0f) == 0x01) ||
+	    ((pcr->pci_prefetch_mem_limit & 0x0f) == 0x01)) {
+	    printf("  PREFETCH_MEMBASE   0x%08x%08x  MEMLIM 0x%08x%08x\n",
+		   (int)pcr->pci_prefetch_upper_mem_base,
+		   (pcr->pci_prefetch_mem_base & 0x00fff0) << 16,
+		   (int)pcr->pci_prefetch_upper_mem_limit,
+		   (pcr->pci_prefetch_mem_limit << 16) | 0x0fffff);
+	} else {
+	    printf("  PREFETCH_MEMBASE   0x%08x  MEMLIM 0x%08x\n",
+		   (pcr->pci_prefetch_mem_base & 0x00fff0) << 16,
+		   (pcr->pci_prefetch_mem_limit << 16) | 0x0fffff);
+	}
+    }
+
     printf("  %sFAST_B2B %sSEC_BUS_RST %sM_ABRT %sVGA_EN %sISA_EN"
 	   " %sSERR_EN %sPERR_EN\n",
 	   (pcr->pci_bridge_control & PCI_B_FAST_B_B) ? "" : "NO_",
diff --git a/xc/programs/Xserver/hw/xfree86/fbdevhw/Imakefile b/xc/programs/Xserver/hw/xfree86/fbdevhw/Imakefile
index d9748339c..fd0bfbf45 100644
--- a/xc/programs/Xserver/hw/xfree86/fbdevhw/Imakefile
+++ b/xc/programs/Xserver/hw/xfree86/fbdevhw/Imakefile
@@ -1,9 +1,9 @@
-XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/fbdevhw/Imakefile,v 1.11 2002/05/31 18:46:00 dawes Exp $
+XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/fbdevhw/Imakefile,v 1.12 2002/11/22 22:56:03 tsi Exp $
 
 #define IHaveModules
 #include <Server.tmpl>
 
-#if LinuxFBDevSupport
+#if defined(LinuxArchitecture) && LinuxFBDevSupport
 SRCS =   fbdevhw.c
 OBJS =   fbdevhw.o
 #else
diff --git a/xc/programs/Xserver/hw/xfree86/fbdevhw/fbdevhw.c b/xc/programs/Xserver/hw/xfree86/fbdevhw/fbdevhw.c
index 17f33b112..a90fff34c 100644
--- a/xc/programs/Xserver/hw/xfree86/fbdevhw/fbdevhw.c
+++ b/xc/programs/Xserver/hw/xfree86/fbdevhw/fbdevhw.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/fbdevhw/fbdevhw.c,v 1.29 2002/05/07 23:05:35 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/fbdevhw/fbdevhw.c,v 1.30 2002/11/25 14:05:00 eich Exp $ */
 
 /* all driver need this */
 #include "xf86.h"
@@ -792,7 +792,7 @@ fbdevHWAdjustFrame(int scrnIndex, int x, int y, int flags)
 	fPtr->var.xoffset = x;
 	fPtr->var.yoffset = y;
 	if (-1 == ioctl(fPtr->fd,FBIOPAN_DISPLAY,(void*)&fPtr->var))
-		xf86DrvMsg(scrnIndex, X_ERROR,
+		xf86DrvMsgVerb(scrnIndex,5, X_WARNING,
 			   "FBIOPAN_DISPLAY: %s\n", strerror(errno));
 }
 
diff --git a/xc/programs/Xserver/hw/xfree86/input/calcomp/xf86Calcomp.c b/xc/programs/Xserver/hw/xfree86/input/calcomp/xf86Calcomp.c
index daaa7e825..accbfe31c 100644
--- a/xc/programs/Xserver/hw/xfree86/input/calcomp/xf86Calcomp.c
+++ b/xc/programs/Xserver/hw/xfree86/input/calcomp/xf86Calcomp.c
@@ -31,7 +31,7 @@
  * authorization  from Martin Kroeker or Daveg GmbH.
  *
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/input/calcomp/xf86Calcomp.c,v 1.5 2001/11/26 16:25:52 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/input/calcomp/xf86Calcomp.c,v 1.8 2003/01/15 03:43:58 dawes Exp $ */
 
 #define _CALCOMP_C_
 /*****************************************************************************
@@ -55,7 +55,7 @@
 /*****************************************************************************
  *	Variables without includable headers
  ****************************************************************************/
-                  #define DEBUG 1
+#define DEBUG 1
 /*****************************************************************************
  *	Local Variables
  ****************************************************************************/
@@ -631,6 +631,7 @@ CalcompPreInit(       InputDriverPtr drv,
 	if ((!local) || (!priv))
 		goto SetupProc_fail;
 
+	local->conf_idev = dev;
 
         xf86CollectInputOptions(local, default_options, NULL);
         
@@ -723,6 +724,7 @@ CalcompPreInit(       InputDriverPtr drv,
 	local->dev = NULL;
 	local->private = priv;
 	local->private_flags = 0;
+	local->conf_idev = dev;
 	local->history_size = xf86SetIntOption( local->options, "HistorySize", 0 );
 	        local->flags |= XI86_CONFIGURED;
 	                
diff --git a/xc/programs/Xserver/hw/xfree86/input/fpit/Imakefile b/xc/programs/Xserver/hw/xfree86/input/fpit/Imakefile
new file mode 100644
index 000000000..4cbf2a281
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/input/fpit/Imakefile
@@ -0,0 +1,30 @@
+XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/input/fpit/Imakefile,v 1.1 2002/11/22 03:35:11 dawes Exp $
+
+#define IHaveModules
+#include <Server.tmpl>
+
+SRCS = xf86Fpit.c
+OBJS = xf86Fpit.o
+
+DRIVER = fpit
+
+INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86SRC)/loader -I$(XF86OSSRC) \
+       -I$(SERVERSRC)/include -I$(SERVERSRC)/mi -I$(XINCLUDESRC) -I$(EXTINCSRC)
+
+#if MakeHasPosixVariableSubstitutions
+SubdirLibraryRule($(OBJS))
+#endif
+
+ModuleObjectRule()
+
+ObjectModuleTarget($(DRIVER),$(OBJS))
+
+InstallObjectModule($(DRIVER),$(MODULEDIR),input)
+
+#if !defined(XF86DriverSDK)
+InstallModuleManPage($(DRIVER))
+#endif
+
+DependTarget()
+
+InstallDriverSDKObjectModule($(DRIVER),$(DRIVERSDKMODULEDIR),input)
diff --git a/xc/programs/Xserver/hw/xfree86/input/fpit/fpit.man b/xc/programs/Xserver/hw/xfree86/input/fpit/fpit.man
new file mode 100644
index 000000000..049c1c8c6
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/input/fpit/fpit.man
@@ -0,0 +1,124 @@
+.\" $XFree86: xc/programs/Xserver/hw/xfree86/input/fpit/fpit.man,v 1.1 2002/11/22 03:35:12 dawes Exp $ 
+.\" shorthand for double quote that works everywhere.
+.ds q \N'34'
+.TH FPIT __drivermansuffix__ __vendorversion__
+.SH NAME
+fpit \- Fujitsu Stylistic input driver
+.SH SYNOPSIS
+.nf
+.B "Section \*qInputDevice\*q"
+.BI "  Identifier \*q" idevname \*q
+.B  "  Driver \*qfpit\*q"
+.BI "  Option \*qDevice\*q   \*q" devpath \*q
+\ \ ...
+.B EndSection
+.fi
+.SH DESCRIPTION
+.B fpit 
+is an XFree86 input driver for Fujitsu Stylistic Tablet PCs.
+.PP
+The
+.B fpit
+driver functions as a pointer input device, and may be used as the
+X server's core pointer.
+.SH SUPPORTED HARDWARE
+This driver supports the touchscreen of the Stylistic LT and (with
+special options) of the Stylistic 500, 1000 and 2300.
+
+Under Linux the Fujitsus serial port is not, by default, detected.
+Therefore the following must be added to one of your start-up scripts.
+(Either one of the X scripts, or to rc.local or similar).
+
+.TP 4
+.B setserial /dev/ttyS3 autoconfig
+.TP 4
+.B setserial /dev/ttyS3 IRQ 15 baud_base 115200 port 0xfce8
+
+.SH CONFIGURATION DETAILS
+Please refer to XF86Config(5x) for general configuration
+details and for options that can be used with all input drivers.  This
+section only covers configuration details specific to this driver.
+.PP
+The device supports the following options:
+.RS 8
+.TP 4
+.B Option \fI"MaximumXPosition"\fP \fI"number"\fP
+Sets the maximum X position, use this to callibrate your touchscreen's
+right hand edge.
+.TP 4
+.B Option \fI"MinimumXPosition"\fP \fI"number"\fP
+Sets the minimum X position, use this to callibrate your touchscreen's
+left hand edge.
+.TP 4
+.B Option \fI"MaximumYPosition"\fP \fI"number"\fP
+.TP 4
+.B Option \fI"MinimumYPosition"\fP \fI"number"\fP
+Same as for X axis, but for Y axis.
+.TP 4
+.B Option \fI"InvertX"\fP
+.TP 4
+.B Option \fI"InvertY"\fP
+Invert the specified axis.
+.TP 4
+.B Option \fI"SwapXY"\fP
+Swap the X and Y axis.
+.TP 4
+.B Option \fI"Rotate"\fP \fI"CW"\fP
+.B Option \fI"Rotate"\fP \fI"CWW"\fP
+Manipulate the invert and swap options to match screen
+rotations.
+.TP 4
+.B Option \fI"DeviceName"\fP \fI"name"\fP
+.B Option \fI"DeviceName"\fP \fI"name"\fP
+sets the name of the X device.
+.TP 4
+.B Option \fI"AlwaysCore"\fP \fI"on"\fP
+enables the sharing of the core pointer. When this feature is enabled, the
+device will take control of the core pointer (and thus will emit core events)
+and at the same time will be able, when asked so, to report extended events.
+You can use the last available integer feedback to control this feature. When
+the value of the feedback is zero, the feature is disabled. The feature is
+enabled for any other value.
+.TP 4
+.B Option \fI"DebugLevel"\fP \fInumber \fP
+sets the level of debugging info reported.
+.TP 4
+.B Option \fI"BaudRate"\fP \fI"38400"\fP, \fI"19200"\fP or \fI"9600"\fP (default)
+changes the serial link speed.
+.RE
+
+Example, for Stylistic LT setup is:
+.nf
+.B "Section \*qInputDevice\*q"
+.BI "  Identifier \*q" mouse0 \*q
+.B  "  Driver \*qfpit\*q"
+.BI "  Option \*qDevice\*q   \*q"/dev/ttyS3 \*q
+.B EndSection
+.fi
+
+And for other Stylistic devices try:
+.nf
+.B "Section \*qInputDevice\*q"
+.BI "  Identifier \*q" mouse0 \*q
+.B  "  Driver \*qfpit\*q"
+.BI "  Option \*qDevice\*q   \*q"/dev/ttyS3 \*q
+.BI "  Option \*qBaudRate\*q \*q"19200 \*q
+.BI "  Option \*qMaximumXPosition\*q \*q"6250 \*q
+.BI "  Option \*qMaximumYPosition\*q \*q"4950 \*q
+.BI "  Option \*qMinimumXPosition\*q \*q"130 \*q
+.BI "  Option \*qMinimumYPosition\*q \*q"0 \*q
+.BI "  Option \*qInvertY\*q"
+.B EndSection
+.fi
+
+
+.SH "SEE ALSO"
+XFree86(1), XF86Config(__filemansuffix__), xf86config(1), Xserver(1), X(__miscmansuffix__).
+.SH AUTHORS
+Original FPIT port:
+Rob Tsuk <rob@tsuk.com> and John Apfelbaum <johnapf@linuxslate.com>
+
+X4 Port: Richard Miller-Smith <richard.miller-smith@philips.com>,
+based on Elographics code from: Patrick Lecoanet
+
+X4.2 Cleanup: Alan Cox
diff --git a/xc/programs/Xserver/hw/xfree86/input/fpit/readme.txt b/xc/programs/Xserver/hw/xfree86/input/fpit/readme.txt
new file mode 100644
index 000000000..61d9a2a58
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/input/fpit/readme.txt
@@ -0,0 +1,141 @@
+xf86Fpit.c
+(and associated files).
+
+Documentation updated by John Apfelbaum, linuxslate.com Oct 2001
+
+***    P L E A S E     N O T E    ***
+*  Due to a Hardrive failure, the version of this driver that was previously
+*  on the linuxslate.com website was lost. This is a version came from a
+*  directory on my development system that was marked "Works", and I belive it
+*  to be the latest version I worked on (about a year ago), but I have not had
+*  time to build from this source and verify this driver.
+***
+
+Supported Hardware:
+
+
+	Fujitsu Stylistic LT	(Reported to work, but I have reason to belive that it does NOT.)
+	Fujistu Stylistic 500   (Should Work)
+	Fujistu Stylistic 1000  (Should Work)
+	Fujistu Stylistic 1200  (Should Work)
+	Fujistu Stylistic 2300  (Should Work)
+
+History and Contributors:
+
+-  Steven Lang <tiger@tyger.org> wrote a Xinput extension for the AceCad Drawing Tablet.
+-  This was modified originaly by Rob Tsuk and John Apfelbaum (http://linuxslate.org/) to
+   produce a working version for the Stylistic 500 and 1000 using XFree86 3.3.6.
+   (This can be obtained from http://linuxslate.com)
+-  Richard Miller-Smith <Richard.Miller-Smith@philips.com> Merged the code from the above
+   project into the XFree86 4.0.2 Elographics driver by Patrick Lecoanet.
+-  John Apfelbaum continuted the work to produce a working XFree86 4.0.x driver for the
+   Stylistic 1200.  
+
+
+Please visit http://linuxslate.com for the latest information.
+
+License:
+
+Please visit http://XFree86.org for license information. 
+
+ * Copyright 1995, 1999 by Patrick Lecoanet, France. <lecoanet@cena.dgac.fr>
+ * 
+ * Permission to use, copy, modify, distribute, and sell this software and its
+ * documentation for any purpose is hereby granted without fee, provided that
+ * the above copyright notice appear in all copies and that both that
+ * copyright notice and this permission notice appear in supporting
+ * documentation, and that the name of Patrick Lecoanet not be used in advertising
+ * or publicity pertaining to distribution of the software without specific,
+ * written prior permission.  Patrick Lecoanet makes no representations about the
+ * suitability of this software for any purpose.  It is provided "as is"
+ * without express or implied warranty.
+
+Installation:
+
+THIS RELEASE IS FOR XFree86 Version 4.0.2. Hopefully it will also work
+with other Version 4 systems. The source is written so that hopefully
+it can be compiled under 3.3.6 - THIS HAS NOT BEEN TESTED (yet).
+
+Copied from original xf86fpit.c readme:
+
+1.  Install and configure Linux w/o consideration of the digitizer tablet.
+2.  Get X working the way you want it. 
+3.  Add or Change your appropriate startup scripts to include:
+
+setserial /dev/ttyS3 autoconfig
+setserial /dev/ttyS3 IRQ 15 baud_base 115200
+(Some models may also have to specify:  port 0xfce8)
+
+
+New/Different for Ver 4.0.2
+
+4.  Copy fpit_drv.o to /usr/X11R6/lib/modules/input
+
+5.  Add the following to your XF86Config(-4) file:
+
+Section "InputDevice"
+	Identifier	"mouse0"
+	Driver		"fpit"
+	Option		"Device"	"/dev/ttyS3"
+	Option		"BaudRate"	"19200"
+	Option		"MaximumXPosition"	"6250"
+	Option		"MaximumYPosition"	"4950"
+	Option		"MinimumXPosition"	"130"
+	Option		"MinimumYPosition"	"0"
+	Option		"InvertY"
+EndSection
+
+6. Remember to add this Input Device to the server description (Near the end of the file.)
+
+7. Start or restart X.
+
+8. If required adjust the Min/Max X/Y positions so that the pointer
+   tracks the pen correctly.
+
+
+Hints if you are having problems (Thanks to Aron Hsiao):
+
+Problem 1:  Side switch being reported as wild button numbers
+	   (like 249 instead of 3): 
+
+Solution:  Add the following to your xinitrc: 
+
+	xsetpointer TOUCHSCREEN
+	xmodmap -e 'pointer = 1 2 3'
+
+This should be re-stating the defaults, but Aron Hsiao agrees that it appears
+to be an XFree86 4.x bug. 
+
+Problem 2:  X Server crash during GUI startup (Particularly Gnome). 
+
+Solution:   You must have a regular mouse defined as the default pointer
+	    even if no mouse is used.  During startup, Gnome attempts to
+	    set mouse acceleration for the default pointer.  Since the
+	    pendrivers are absolute pointers, and acceleration is meaningless,
+	    they do not take well to attempts to set it :-)
+
+Problem 3:  Jittery cursor and undesired mouse clicks (both buttons),
+            particuarly on the Stylistic 1200, and particuarly after the
+	    system has warmed up.
+	    
+Solution:   (Not really a solution) This is a hardware problem.  Some
+	    people have reported good results by modifying the CPU heatsink
+	    on the Stylistic 1200.  Putting the system to sleep when not
+	    actively using it extends battery life, and keeps the system from
+	    getting too hot.
+
+Bugs and Needed Work:
+
+(See above)
+
+X rotation (Portrait mode is not supported). -- I plan to add this soon.
+
+Adjusting the constants in the XF86Config(-4) is teedious and requires
+multiple restarts of the X Window system.  -- Somebody PLEASE write a
+calibration program !
+
+
+
+
+
+/* $XFree86: xc/programs/Xserver/hw/xfree86/input/fpit/readme.txt,v 1.2 2002/11/22 03:37:37 dawes Exp $ */
diff --git a/xc/programs/Xserver/hw/xfree86/input/fpit/xf86Fpit.c b/xc/programs/Xserver/hw/xfree86/input/fpit/xf86Fpit.c
new file mode 100644
index 000000000..5e244cb22
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/input/fpit/xf86Fpit.c
@@ -0,0 +1,580 @@
+/*
+ * Copyright 1995, 1999 by Patrick Lecoanet, France. <lecoanet@cena.dgac.fr>
+ * Copyright 2002, Red Hat <alan@redhat.com>
+ *
+ * This driver is a merge of the Elographics driver (from Patrick Lecoanet) and
+ * the driver for Fujitsu Pen Computers from Rob Tsuk and John Apfelbaum.
+ * 
+ * Stylistic 500, 1000, 1200, 2300 Support fixed by John Apfelbaum
+ *   June 2001 <johnapf@linuxlsate.com>
+ *
+ * Richard Miller-Smith <Richard.Miller-Smith@philips.com>
+ *
+ * Fixed up for XFree86 4.2, cleaned up the junk, cured crash on pointer
+ * setting.
+ *                                                                            
+ * Permission to use, copy, modify, distribute, and sell this software and its
+ * documentation for any purpose is  hereby granted without fee, provided that
+ * the  above copyright   notice appear  in   all  copies and  that both  that
+ * copyright  notice   and   this  permission   notice  appear  in  supporting
+ * documentation, and that   the  name of  Patrick  Lecoanet not  be  used  in
+ * advertising or publicity pertaining to distribution of the software without
+ * specific,  written      prior  permission.     The Authors   make  no
+ * representations about the suitability of this software for any purpose.  It
+ * is provided "as is" without express or implied warranty.                   
+ *                                                                            
+ * PATRICK LECOANET DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+ * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+ * EVENT  SHALL PATRICK LECOANET BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+ * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
+ * DATA  OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS  ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ *
+ * RED HAT DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+ * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+ * EVENT  SHALL RED HAT BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+ * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
+ * DATA  OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS  ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ *
+ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/input/fpit/xf86Fpit.c,v 1.2 2002/11/22 03:37:37 dawes Exp $ */
+
+#include <xf86Version.h>
+
+#  ifndef XFree86LOADER
+#    include <unistd.h>
+#    include <errno.h>
+#  endif
+
+#  include <misc.h>
+#  include <xf86.h>
+#  if !defined(DGUX)
+#    include <xf86_ansic.h>
+#  endif
+#  include <xf86_OSproc.h>
+#  include <xf86Xinput.h>
+#  include <exevents.h>
+
+#  ifdef XFree86LOADER
+#    include <xf86Module.h>
+#  endif
+
+
+
+/*
+ ***************************************************************************
+ *
+ * Default constants.
+ *
+ ***************************************************************************
+ */
+#define FPIT_LINK_SPEED		B19200	/* 19200 Baud                           */
+#define FPIT_PORT		"/dev/ttyS3"
+
+#define FPIT_MAX_X		4100
+#define FPIT_MIN_X		0
+#define FPIT_MAX_Y		4100
+#define FPIT_MIN_Y		0
+
+#define PHASING_BIT	0x80
+#define PROXIMITY_BIT	0x40
+/*#define TABID_BIT	0x20  */
+#define XSIGN_BIT	0x10
+#define YSIGN_BIT	0x08
+#define BUTTON_BITS	0x07
+#define COORD_BITS	0x7f
+
+/*
+ ***************************************************************************
+ *
+ * Protocol constants.
+ *
+ ***************************************************************************
+ */
+#define FPIT_PACKET_SIZE		5
+#define BUFFER_SIZE               (FPIT_PACKET_SIZE*20)
+
+/*
+ ***************************************************************************
+ *
+ * Device private records.
+ *
+ ***************************************************************************
+ */
+typedef struct {
+	char *fpitDev;		/* device file name */
+	int screen_width;
+	int screen_height;
+	int screen_no;
+	int fpitInc;		/* increment between transmits */
+	int fpitButTrans;	/* button translation flags */
+	int fpitOldX;		/* previous X position */
+	int fpitOldY;		/* previous Y position */
+	int fpitOldProximity;	/* previous proximity */
+	int fpitOldButtons;	/* previous buttons state */
+	int fpitMinX;		/* min X value */
+	int fpitMinY;		/* min Y value */
+	int fpitMaxX;		/* max X value */
+	int fpitMaxY;		/* max Y value */
+	int fpitInvX;		/* Invert X axis */
+	int fpitInvY;		/* Invert Y axis */
+	int fpitRes;		/* resolution in lines per inch */
+	int flags;		/* various flags */
+	int fpitIndex;		/* number of bytes read */
+	int fpitBaud;		/* Baud rate of device */
+	unsigned char fpitData[BUFFER_SIZE];	/* data read on the device */
+	int fpitSwapXY;		/* swap X and Y values */
+} FpitPrivateRec, *FpitPrivatePtr;
+
+
+
+
+/*
+ ***************************************************************************
+ *
+ * xf86FpitConvert --
+ *	Convert extended valuators to x and y suitable for core motion
+ *	events. Return True if ok and False if the requested conversion
+ *	can't be done for the specified valuators.
+ *
+ ***************************************************************************
+ */
+static Bool xf86FpitConvert(LocalDevicePtr local, int first, int num, int v0, int v1, int v2, int v3, int v4, int v5, int *x, int *y)
+{
+	FpitPrivatePtr priv = (FpitPrivatePtr) local->private;
+	if (first != 0 || num != 2) {
+		return FALSE;
+	}
+
+	if (priv->fpitSwapXY != 0) {
+		*x = xf86ScaleAxis(v1, 0, priv->screen_width, priv->fpitMinY, priv->fpitMaxY);
+		*y = xf86ScaleAxis(v0, 0, priv->screen_height, priv->fpitMinX, priv->fpitMaxX);
+	} else {
+		*x = xf86ScaleAxis(v0, 0, priv->screen_width, priv->fpitMinX, priv->fpitMaxX);
+		*y = xf86ScaleAxis(v1, 0, priv->screen_height, priv->fpitMinY, priv->fpitMaxY);
+	}
+	/*
+	 * Need to check if still on the correct screen.
+	 * This call is here so that this work can be done after
+	 * calib and before posting the event.
+	 */
+	xf86XInputSetScreen(local, priv->screen_no, *x, *y);
+	return TRUE;
+}
+
+/*
+** xf86FpitReadInput
+** Reads from the Fpit and posts any new events to the server.
+*/
+static void xf86FpitReadInput(LocalDevicePtr local)
+{
+	FpitPrivatePtr priv = (FpitPrivatePtr) local->private;
+	int len, loop, found;
+	int is_core_pointer, is_absolute;
+	int x, y, buttons, prox;
+	DeviceIntPtr device;
+	/* Read data into buffer */
+	len = xf86ReadSerial(local->fd, priv->fpitData, BUFFER_SIZE);
+	if (len <= 0) {
+		Error("error reading FPIT device");
+		priv->fpitIndex = 0;
+		return;
+	}
+
+
+	/* Since the Fujitsu only delivers data in an absolute mode, we
+	   can look through the data backwards to find the last full and valid
+	   position. (This may make cursor movement a bit faster) */
+
+	priv->fpitIndex += len;
+	found = 0;
+	for (loop = priv->fpitIndex - 5; loop >= 0; loop--) {
+		if (priv->fpitData[loop] & 0x80) {
+			found = 1;
+			break;
+		}
+	}
+
+	if (!found) {
+		/* Wait for our next call when we should have some more data */
+
+		/* Check to see if the buffer is filling up - if so do something
+		   about it */
+		/* if (priv->fpitIndex > BUFFER_SIZE - 5) {
+		   memmove(priv->fpitData, priv->fpitData+priv->fpitIndex-5, 5) ;
+		   priv->fpitIndex = 5 ;
+		   }
+		 */
+		return;
+	}
+
+
+/* Format of 5 bytes data packet for Fpit Tablets
+     Byte 1
+       bit 7  Phasing bit always 1
+       bit 6  Switch status change
+       bit 5  Proximity
+       bit 4  Always 0
+       bit 3  Test data
+       bit 2  Sw3 (2nd side sw) 
+       bit 1  Sw2 (1st side sw) 
+       bit 0  Sw1 (Pen tip sw) 
+
+     Byte 2
+       bit 7  Always 0
+       bits 6-0 = X6 - X0
+
+     Byte 3
+       bit 7  Always 0
+       bits 6-0 = X13 - X7
+
+     Byte 4
+       bit 7  Always 0
+       bits 6-0 = Y6 - Y0
+
+     Byte 5
+       bit 7  Always 0
+       bits 6-0 = Y13 - Y7
+*/
+
+	x = (int) (priv->fpitData[loop + 1] & 0x7f) + ((int) (priv->fpitData[loop + 2] & 0x7f) << 7);
+	y = (int) (priv->fpitData[loop + 3] & 0x7f) + ((int) (priv->fpitData[loop + 4] & 0x7f) << 7);
+	/* Add in any offsets */
+	if (priv->fpitInvX)
+		x = priv->fpitMaxX - x + priv->fpitMinX;
+	if (priv->fpitInvY)
+		y = priv->fpitMaxY - y + priv->fpitMinY;
+	prox = (priv->fpitData[loop] & PROXIMITY_BIT) ? 0 : 1;
+	buttons = (priv->fpitData[loop] & BUTTON_BITS);
+	priv->fpitIndex = 0;
+	device = local->dev;
+	is_absolute = 1;
+	is_core_pointer = xf86IsCorePointer(device);
+	/* coordonates are ready we can send events */
+	if (prox) {
+		if (!(priv->fpitOldProximity))
+			if (!is_core_pointer)
+				xf86PostProximityEvent(device, 1, 0, 2, x, y);
+		if ((priv->fpitOldX != x) || (priv->fpitOldY != y)) {
+			if (priv->fpitOldProximity) {
+				xf86PostMotionEvent(device, 1, 0, 2, x, y);
+			}
+		}
+
+		if (priv->fpitOldButtons != buttons) {
+			int delta;
+			delta = buttons - priv->fpitOldButtons;
+			while (delta) {
+				int id;
+				id = ffs(delta);
+				delta &= ~(1 << (id - 1));
+				xf86PostButtonEvent(device, 1, id, (buttons & (1 << (id - 1))), 0, 2, x, y);
+			}
+		}
+
+		priv->fpitOldButtons = buttons;
+		priv->fpitOldX = x;
+		priv->fpitOldY = y;
+		priv->fpitOldProximity = prox;
+	} else {		/* !PROXIMITY */
+		/* Any changes in buttons are ignored when !proximity */
+		if (!is_core_pointer)
+			if (priv->fpitOldProximity)
+				xf86PostProximityEvent(device, 0, 0, 2, x, y);
+		priv->fpitOldProximity = 0;
+	}
+
+}
+
+static void xf86FpitPtrCtrl(DeviceIntPtr device, PtrCtrl *ctrl)
+{
+	/* I have no clue what this does, except that registering it stops the 
+	   X server segfaulting in ProcGetPointerMapping()
+	   Ho Hum.
+	*/
+}
+
+
+/*
+ ***************************************************************************
+ *
+ * xf86FpitControl --
+ *
+ ***************************************************************************
+ */
+static Bool xf86FpitControl(DeviceIntPtr dev, int mode)
+{
+	LocalDevicePtr local = (LocalDevicePtr) dev->public.devicePrivate;
+	FpitPrivatePtr priv = (FpitPrivatePtr) (local->private);
+	unsigned char map[] = {
+		0, 1
+	};
+
+
+	switch (mode) {
+	case DEVICE_INIT:
+		{
+
+			if (priv->screen_no >= screenInfo.numScreens || priv->screen_no < 0) {
+				priv->screen_no = 0;
+			}
+			priv->screen_width = screenInfo.screens[priv->screen_no]->width;
+			priv->screen_height = screenInfo.screens[priv->screen_no]->height;
+			/*
+			 * Device reports button press for up to 1 button.
+			 */
+			if (InitButtonClassDeviceStruct(dev, 1, map) == FALSE) {
+				ErrorF("Unable to allocate Fpit touchscreen ButtonClassDeviceStruct\n");
+				return !Success;
+			}
+
+			if (InitFocusClassDeviceStruct(dev) == FALSE) {
+				ErrorF("Unable to allocate Fpit touchscreen FocusClassDeviceStruct\n");
+				return !Success;
+			}
+
+			if(InitPtrFeedbackClassDeviceStruct(dev, xf86FpitPtrCtrl) == FALSE) {
+				ErrorF("Unable to allocate PtrFeedBackClassDeviceStruct\n");
+			}
+	      
+			/*
+			 * Device reports motions on 2 axes in absolute coordinates.
+			 * Axes min and max values are reported in raw coordinates.
+			 * Resolution is computed roughly by the difference between
+			 * max and min values scaled from the approximate size of the
+			 * screen to fit one meter.
+			 */
+			if (InitValuatorClassDeviceStruct(dev, 2, xf86GetMotionEvents, local->history_size, Absolute) == FALSE) {
+				ErrorF("Unable to allocate Elographics touchscreen ValuatorClassDeviceStruct\n");
+				return !Success;
+			} else {
+				InitValuatorAxisStruct(dev, 0, priv->fpitMinX, priv->fpitMaxX, 9500, 0 /* min_res */ ,
+						       9500 /* max_res */ );
+				InitValuatorAxisStruct(dev, 1, priv->fpitMinY, priv->fpitMaxY, 10500, 0 /* min_res */ ,
+						       10500 /* max_res */ );
+			}
+
+			if (InitFocusClassDeviceStruct(dev) == FALSE) {
+				ErrorF("Unable to allocate Fpit touchscreen FocusClassDeviceStruct\n");
+			}
+			/*
+			 * Allocate the motion events buffer.
+			 */
+			xf86MotionHistoryAllocate(local);
+			/*
+			 * This once has caused the server to crash after doing an xalloc & strcpy ??
+			 */
+			return Success;
+		}
+
+	case DEVICE_ON:
+		if (local->fd < 0) {
+			local->fd = xf86OpenSerial(local->options);
+			if (local->fd < 0) {
+				Error("Unable to open Fpit touchscreen device");
+				return !Success;
+			}
+
+			xf86AddEnabledDevice(local);
+			dev->public.on = TRUE;
+		}
+		return Success;
+
+		/*
+		 * Deactivate the device. After this, the device will not emit
+		 * events until a subsequent DEVICE_ON. Thus, we can momentarily
+		 * close the port.
+		 */
+	case DEVICE_OFF:
+		dev->public.on = FALSE;
+		if (local->fd >= 0) {
+			xf86RemoveEnabledDevice(local);
+		}
+		xf86CloseSerial(local->fd);
+		local->fd = -1;
+		return Success;
+		/*
+		 * Final close before server exit. This is used during server shutdown.
+		 * Close the port and free all the resources.
+		 */
+	case DEVICE_CLOSE:
+		dev->public.on = FALSE;
+		if (local->fd >= 0) {
+			RemoveEnabledDevice(local->fd);
+		}
+		xf86CloseSerial(local->fd);
+		local->fd = -1;
+		return Success;
+	default:
+		ErrorF("unsupported mode=%d\n", mode);
+		return !Success;
+	}
+}
+
+/*
+ ***************************************************************************
+ *
+ * xf86FpitAllocate --
+ *
+ ***************************************************************************
+ */
+static LocalDevicePtr xf86FpitAllocate(InputDriverPtr drv)
+{
+	LocalDevicePtr local;
+	FpitPrivatePtr priv;
+	priv = xalloc(sizeof(FpitPrivateRec));
+	if (!priv)
+		return NULL;
+	local = xf86AllocateInput(drv, 0);
+	if (!local) {
+		xfree(priv);
+		return NULL;
+	}
+
+	priv->fpitDev = strdup(FPIT_PORT);
+	priv->screen_no = 0;
+	priv->screen_width = -1;
+	priv->screen_height = -1;
+	priv->fpitMinX = FPIT_MIN_X;
+	priv->fpitMaxX = FPIT_MAX_X;
+	priv->fpitMinY = FPIT_MIN_Y;
+	priv->fpitMaxY = FPIT_MAX_Y;
+	priv->fpitOldX = priv->fpitOldY = -1;
+	priv->fpitOldButtons = 0;
+	priv->fpitOldProximity = 0;
+	priv->fpitIndex = 0;
+	priv->fpitSwapXY = 0;
+	local->name = XI_TOUCHSCREEN;
+	local->flags = 0 /* XI86_NO_OPEN_ON_INIT */ ;
+	local->device_control = xf86FpitControl;
+	local->read_input = xf86FpitReadInput;
+	local->control_proc = NULL;
+	local->close_proc = NULL;
+	local->switch_mode = NULL;
+	local->conversion_proc = xf86FpitConvert;
+	local->reverse_conversion_proc = NULL;
+	local->fd = -1;
+	local->atom = 0;
+	local->dev = NULL;
+	local->private = priv;
+	local->type_name = "Fujitsu Stylistic";
+	local->history_size = 0;
+	return local;
+}
+
+static void xf86FpitUninit(InputDriverPtr drv, LocalDevicePtr local, int flags)
+{
+	FpitPrivatePtr priv = (FpitPrivatePtr) local->private;
+	xf86FpitControl(local->dev, DEVICE_OFF);
+	xfree(priv->fpitDev);
+	xfree(priv);
+	xfree(local->name);
+	xfree(local);
+	xf86DeleteInput(local, 0);
+}
+
+static const char *default_options[] = {
+	"BaudRate", "19200", "StopBits", "0", "DataBits", "8", "Parity", "None", "Vmin", "10", "Vtime", "1", "FlowControl", "None", NULL
+};
+
+static InputInfoPtr xf86FpitInit(InputDriverPtr drv, IDevPtr dev, int flags)
+{
+	LocalDevicePtr local = NULL;
+	FpitPrivatePtr priv = NULL;
+	char *str;
+
+	local = xf86FpitAllocate(drv);
+	if (!local)
+		return NULL;
+
+	priv = local->private;
+	local->conf_idev = dev;
+	xf86CollectInputOptions(local, default_options, NULL);
+	/* Process the common options. */
+	xf86ProcessCommonOptions(local, local->options);
+	str = xf86FindOptionValue(local->options, "Device");
+	if (!str) {
+		xf86Msg(X_ERROR, "%s: No Device specified in FPIT module config.\n", dev->identifier);
+		if (priv) {
+			if (priv->fpitDev) {
+				xfree(priv->fpitDev);
+			}
+			xfree(priv);
+		}
+		return local;
+	}
+	priv->fpitDev = strdup(str);
+	local->name = xf86SetStrOption(local->options, "DeviceName", XI_TOUCHSCREEN);
+	xf86Msg(X_CONFIG, "FPIT device name: %s\n", local->name);
+	priv->screen_no = xf86SetIntOption(local->options, "ScreenNo", 0);
+	xf86Msg(X_CONFIG, "Fpit associated screen: %d\n", priv->screen_no);
+	priv->fpitMaxX = xf86SetIntOption(local->options, "MaximumXPosition", 4100);
+	xf86Msg(X_CONFIG, "FPIT maximum x position: %d\n", priv->fpitMaxX);
+	priv->fpitMinX = xf86SetIntOption(local->options, "MinimumXPosition", 0);
+	xf86Msg(X_CONFIG, "FPIT minimum x position: %d\n", priv->fpitMinX);
+	priv->fpitMaxY = xf86SetIntOption(local->options, "MaximumYPosition", 4100);
+	xf86Msg(X_CONFIG, "FPIT maximum y position: %d\n", priv->fpitMaxY);
+	priv->fpitMinY = xf86SetIntOption(local->options, "MinimumYPosition", 0);
+	xf86Msg(X_CONFIG, "FPIT minimum y position: %d\n", priv->fpitMinY);
+	priv->fpitInvX = xf86SetBoolOption(local->options, "InvertX", 0);
+	priv->fpitInvY = xf86SetBoolOption(local->options, "InvertY", 0);
+	priv->fpitSwapXY = xf86SetBoolOption(local->options, "SwapXY", 0);
+	str = xf86SetStrOption(local->options, "Rotate", 0);
+	if (!xf86NameCmp(str, "CW")) {
+		priv->fpitInvX = 1;
+		priv->fpitInvY = 1;
+		priv->fpitSwapXY = 1;
+	} else if (!xf86NameCmp(str, "CCW")) {
+		priv->fpitInvX = 0;
+		priv->fpitInvY = 0;
+		priv->fpitSwapXY = 1;
+	}
+	xf86Msg(X_CONFIG, "FPIT invert X axis: %s\n", priv->fpitInvX ? "Yes" : "No");
+	xf86Msg(X_CONFIG, "FPIT invert Y axis: %s\n", priv->fpitInvY ? "Yes" : "No");
+	xf86Msg(X_CONFIG, "FPIT swap X and Y axis: %s\n", priv->fpitSwapXY ? "Yes" : "No");
+	/* mark the device configured */
+	local->flags |= XI86_CONFIGURED;
+	return local;
+}
+
+#ifdef XFree86LOADER
+static
+#endif
+InputDriverRec FPIT = {
+	1,			/* driver version */
+	"fpit",			/* driver name */
+	NULL,			/* identify */
+	xf86FpitInit,		/* pre-init */
+	xf86FpitUninit,		/* un-init */
+	NULL,			/* module */
+	0			/* ref count */
+};
+
+#ifdef XFree86LOADER
+static pointer Plug(pointer module, pointer options, int *errmaj, int *errmin)
+{
+	xf86AddInputDriver(&FPIT, module, 0);
+	return module;
+}
+
+static void Unplug(pointer p)
+{
+}
+
+static XF86ModuleVersionInfo version_rec = {
+	"fpit", MODULEVENDORSTRING, MODINFOSTRING1, MODINFOSTRING2, XF86_VERSION_CURRENT, 1, 0, 0, ABI_CLASS_XINPUT, ABI_XINPUT_VERSION, MOD_CLASS_XINPUT, 
+	{0, 0, 0, 0}
+};
+
+/*
+ * This is the entry point in the module. The name
+ * is setup after the pattern <module_name>ModuleData.
+ * Do not change it.
+ */
+XF86ModuleData fpitModuleData = {
+	&version_rec, Plug, Unplug
+};
+#endif
diff --git a/xc/programs/Xserver/hw/xfree86/input/jamstudio/Imakefile b/xc/programs/Xserver/hw/xfree86/input/jamstudio/Imakefile
new file mode 100644
index 000000000..f05ce6e7a
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/input/jamstudio/Imakefile
@@ -0,0 +1,30 @@
+XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/input/jamstudio/Imakefile,v 1.1 2002/11/11 01:18:08 alanh Exp $
+
+#define IHaveModules
+#include <Server.tmpl>
+
+SRCS = js_x.c
+OBJS = js_x.o
+
+DRIVER = js_x
+
+INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86SRC)/loader -I$(XF86OSSRC) \
+         -I$(SERVERSRC)/include -I$(SERVERSRC)/mi -I$(XINCLUDESRC) -I$(EXTINCSRC)
+
+#if MakeHasPosixVariableSubstitutions
+SubdirLibraryRule($(OBJS))
+#endif
+
+ModuleObjectRule()
+
+ObjectModuleTarget($(DRIVER),$(OBJS))
+
+InstallObjectModule($(DRIVER),$(MODULEDIR),input)
+
+#if !defined(XF86DriverSDK)
+InstallModuleManPage($(DRIVER))
+#endif
+
+DependTarget()
+
+InstallDriverSDKObjectModule($(DRIVER),$(DRIVERSDKMODULEDIR),input)
diff --git a/xc/programs/Xserver/hw/xfree86/input/jamstudio/js_x.c b/xc/programs/Xserver/hw/xfree86/input/jamstudio/js_x.c
new file mode 100644
index 000000000..314c034e3
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/input/jamstudio/js_x.c
@@ -0,0 +1,362 @@
+/*
+ * Copyright 2002 by Brian Goines (bgoines78@comcast.net)
+ *
+ * Permission to use, copy, modify, distribute, and sell this software and its
+ * documentation for any purpose is  hereby granted without fee, provided that
+ * the  above copyright   notice appear  in   all  copies and  that both  that
+ * copyright  notice   and   this  permission   notice  appear  in  supporting
+ * documentation, and that   the  name of  Brian Goines not  be  used  in
+ * advertising or publicity pertaining to distribution of the software without
+ * specific,  written      prior  permission.     Brian Goines  makes  no
+ * representations about the suitability of this software for any purpose.  It
+ * is provided "as is" without express or implied warranty.                   
+ *                                                                            
+ * BRIAN GOINES DISCLAIMS ALL   WARRANTIES WITH REGARD  TO  THIS SOFTWARE,
+ * INCLUDING ALL IMPLIED   WARRANTIES OF MERCHANTABILITY  AND   FITNESS, IN NO
+ * EVENT  SHALL FREDERIC  LEPIED BE   LIABLE   FOR ANY  SPECIAL, INDIRECT   OR
+ * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
+ * DATA  OR PROFITS, WHETHER  IN  AN ACTION OF  CONTRACT,  NEGLIGENCE OR OTHER
+ * TORTIOUS  ACTION, ARISING    OUT OF OR   IN  CONNECTION  WITH THE USE    OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ *
+ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/input/jamstudio/js_x.c,v 1.2 2002/11/15 16:05:25 tsi Exp $ */
+
+#include <sys/types.h>
+#include "xf86Version.h"
+#if XF86_VERSION_CURRENT >= XF86_VERSION_NUMERIC(3,9,0,0,0)
+#define XFREE86_V4 1
+#endif
+#include "misc.h"
+#include "xf86.h"
+#include "xf86_ansic.h"
+#include "xf86_OSproc.h"
+#include "xf86Xinput.h"
+#include "exevents.h"		/* Needed for InitValuator/Proximity stuff */
+#include "mipointer.h"
+
+#ifdef XFree86LOADER
+#include "xf86Module.h"
+#endif
+
+#define JSX_XCOORD	65584
+#define JSX_YCOORD	65585
+#define JSX_PRESS		852016
+#define JSX_BTN		852034
+
+#define SYSCALL(call) while(((call) == -1) && (errno == EINTR))
+
+#ifdef XFREE86_V4
+
+struct hiddev_event
+{
+   unsigned hid;
+   signed int value;
+};
+
+typedef struct
+{
+   int jsxFd;
+   int jsxTimeout;
+   char *jsxDevice;
+   int jsxOldX;
+   int jsxOldY;
+   int jsxOldPress;
+   int jsxOldBtn;
+   int jsxOldNotify;
+   int jsxMaxX;
+   int jsxMaxY;
+   int jsxMinX;
+   int jsxMinY;
+   int jsxPressMax;
+   int jsxPressMin;
+   int jsxPressDiv;
+}
+JS_XDevRec, *JS_XDevPtr;
+
+static void
+xf86JS_XReadInput(LocalDevicePtr local)
+{
+   JS_XDevPtr priv = local->private;
+   struct hiddev_event event;
+   int x = priv->jsxOldX, y = priv->jsxOldY, press = priv->jsxOldPress;
+   int btn = priv->jsxOldBtn, len = 0;
+   int btn_notify = priv->jsxOldNotify;
+
+#if 0
+   SYSCALL(len = read(local->fd, &event, sizeof(struct hiddev_event)));
+   if (len < sizeof(struct hiddev_event))
+      return;
+#endif
+   while ((len = read(local->fd, &event, sizeof(struct hiddev_event)))
+	  == sizeof(struct hiddev_event)) {
+      switch (event.hid) {
+      case JSX_XCOORD:
+	 x = event.value;
+	 break;
+      case JSX_YCOORD:
+	 y = event.value;
+	 break;
+      case JSX_PRESS:
+	 press = event.value / priv->jsxPressDiv;
+	 break;
+      case JSX_BTN:
+	 priv->jsxOldBtn = btn = event.value;
+	 break;
+      }
+   }
+   x = x > 0 ? x : 0;
+   x = x < priv->jsxMaxX ? x : priv->jsxMaxX;
+   y = y > 0 ? y : 0;
+   y = y < priv->jsxMaxY ? y : priv->jsxMaxY;
+   press = press > 0 ? press : 0;
+   press = press < priv->jsxPressMax ? press : priv->jsxPressMax;
+
+   if ((press > priv->jsxPressMin) && (btn == 1))
+      btn_notify = 1;
+   else
+      btn_notify = 0;
+
+   if ((x != priv->jsxOldX) || (y != priv->jsxOldY)
+       || (press != priv->jsxOldPress)) {
+      xf86PostMotionEvent(local->dev, 1, 0, 3, x, y, press);
+      priv->jsxOldX = x;
+      priv->jsxOldY = y;
+      priv->jsxOldPress = press;
+   }
+   if (btn_notify != priv->jsxOldNotify) {
+      xf86PostButtonEvent(local->dev, 0, 1, btn_notify, 0, 3, x, y, press);
+      priv->jsxOldNotify = btn_notify;
+   }
+}
+
+static int
+xf86JS_XConnect(DeviceIntPtr pJS_X)
+{
+   LocalDevicePtr local = (LocalDevicePtr) pJS_X->public.devicePrivate;
+   JS_XDevPtr priv = local->private;
+
+   local->fd = xf86OpenSerial(local->options);
+   InitValuatorAxisStruct(pJS_X, 0, priv->jsxMinX, priv->jsxMaxX,
+			  priv->jsxMaxX / 7.5, 0, priv->jsxMaxX / 7.5);
+   InitValuatorAxisStruct(pJS_X, 1, priv->jsxMinY, priv->jsxMaxY,
+			  priv->jsxMaxY / 5.5, 0, priv->jsxMaxY / 5.5);
+   InitValuatorAxisStruct(pJS_X, 2, priv->jsxPressMin, priv->jsxPressMax,
+			  128, 0, 128);
+   return (local->fd > 0);
+}
+
+static Bool
+xf86JS_XConvert(LocalDevicePtr local, int first, int num, int v0, int v1,
+		int v2, int v3, int v4, int v5, int *x, int *y)
+{
+   JS_XDevPtr priv = local->private;
+   int width, height;
+   int deltaX, deltaY;
+
+   width = miPointerCurrentScreen()->width;
+   height = miPointerCurrentScreen()->height;
+/*
+deltaX=(float)width/priv->jsxMaxX; deltaY=(float)height/priv->jsxMaxY;
+*/
+   deltaX = priv->jsxMaxX / width;
+   deltaY = priv->jsxMaxY / height;
+   *x = v0 / deltaX;
+   *y = v1 / deltaY;
+   xf86XInputSetScreen(local, 0, *x, *y);
+   return TRUE;
+}
+
+static void
+xf86JS_XControlProc(DeviceIntPtr device, PtrCtrl * ctrl)
+{
+   return;
+}
+
+static int
+xf86JS_XProc(DeviceIntPtr pJS_X, int operation)
+{
+   LocalDevicePtr local = (LocalDevicePtr) pJS_X->public.devicePrivate;
+   int nbaxes = 3;			/* X Y Pressure */
+   int nbuttons = 1;			/* This this is necessary for most apps to work. */
+   CARD8 map[2] = { 0, 1 };
+
+   switch (operation) {
+   case DEVICE_INIT:
+      if (InitButtonClassDeviceStruct(pJS_X, nbuttons, map) == FALSE)
+	 return !Success;
+      if (InitFocusClassDeviceStruct(pJS_X) == FALSE)
+	 return !Success;
+      if (InitPtrFeedbackClassDeviceStruct(pJS_X, xf86JS_XControlProc) ==
+	  FALSE)
+	 return !Success;
+      if (InitProximityClassDeviceStruct(pJS_X) == FALSE)
+	 return !Success;
+      if (InitValuatorClassDeviceStruct(pJS_X, nbaxes, xf86GetMotionEvents,
+					local->history_size,
+					Absolute | OutOfProximity) == FALSE)
+	 return !Success;
+      else
+	 xf86MotionHistoryAllocate(local);
+      xf86JS_XConnect(pJS_X);
+      break;
+   case DEVICE_ON:
+      if (local->fd == -1)
+	 xf86JS_XConnect(pJS_X);
+      xf86AddEnabledDevice(local);
+      pJS_X->public.on = TRUE;
+      break;
+   case DEVICE_OFF:
+      if (local->fd > 0)
+	 xf86RemoveEnabledDevice(local);
+   case DEVICE_CLOSE:
+      if (local->fd > 0) {
+	 SYSCALL(close(local->fd));
+	 local->fd = -1;
+      }
+      break;
+   default:
+      xf86Msg(X_ERROR, "JamStudio: Unhandled operation number %d.\n",
+	      operation);
+      break;
+   }
+   return Success;
+}
+
+static int
+xf86JS_XChangeControl(LocalDevicePtr local, xDeviceCtl * control)
+{
+   return Success;
+}
+
+static int
+xf86JS_XSwitchMode(ClientPtr client, DeviceIntPtr dev, int mode)
+{
+   return Success;
+}
+
+static LocalDevicePtr
+xf86JS_XAllocate(InputDriverPtr drv)
+{
+   LocalDevicePtr local = xf86AllocateInput(drv, 0);
+   JS_XDevPtr priv = xalloc(sizeof(JS_XDevRec));
+
+   memset(priv, 0, sizeof(JS_XDevRec));
+   local->name = "JAMSTUDIO";
+   local->flags = 0;
+   local->device_control = xf86JS_XProc;
+   local->read_input = xf86JS_XReadInput;
+   local->close_proc = NULL;
+   local->control_proc = xf86JS_XChangeControl;
+   local->switch_mode = xf86JS_XSwitchMode;
+   local->conversion_proc = xf86JS_XConvert;
+   local->fd = -1;
+   local->atom = 0;
+   local->dev = NULL;
+   local->private = priv;
+   local->type_name = "JamStudio";
+   local->history_size = 0;
+   local->old_x = local->old_y = -1;
+
+   priv->jsxFd = -1;
+   priv->jsxTimeout = 0;
+   priv->jsxDevice = NULL;
+   priv->jsxOldX = -1;
+   priv->jsxOldY = -1;
+   priv->jsxOldPress = priv->jsxOldBtn = priv->jsxOldNotify = -1;
+   priv->jsxMaxX = 8000;
+   priv->jsxMaxY = 6000;
+   priv->jsxMinX = 0;
+   priv->jsxMinY = 0;
+   priv->jsxPressMin = 5;
+   priv->jsxPressMax = 127;
+   priv->jsxPressDiv = 2;
+
+   return local;
+}
+
+static void
+xf86JS_XUnInit(InputDriverPtr drv, LocalDevicePtr local, int flags)
+{
+   JS_XDevPtr priv = local->private;
+
+   xf86JS_XProc(local->dev, DEVICE_CLOSE);
+   xfree(priv);
+   xf86DeleteInput(local, 0);
+}
+
+static InputInfoPtr
+xf86JS_XInit(InputDriverPtr drv, IDevPtr dev, int flags)
+{
+   LocalDevicePtr local = NULL;
+   JS_XDevPtr priv = NULL;
+   pointer options;
+
+   if ((local = xf86JS_XAllocate(drv)) == NULL) {
+      xf86Msg(X_ERROR, "Could not allocate local device.\n");
+      return NULL;
+   }
+   if (local->private == NULL) {
+      xf86Msg(X_ERROR, "Could not allocate private structure.\n");
+      xfree(local);
+      return NULL;
+   }
+   local->conf_idev = dev;
+   xf86CollectInputOptions(local, NULL, NULL);
+   options = local->options;
+   local->name = dev->identifier;
+   priv = (JS_XDevPtr) local->private;
+   priv->jsxDevice = xf86FindOptionValue(options, "Device");
+   xf86ProcessCommonOptions(local, local->options);
+   if (!priv->jsxDevice) {
+      xf86Msg(X_ERROR, "JamStudio: No Device specified.\n");
+      return NULL;
+   }
+   priv->jsxMaxX = xf86SetIntOption(options, "MaxX", 8000);
+   priv->jsxMaxY = xf86SetIntOption(options, "MaxY", 6000);
+   priv->jsxMinX = xf86SetIntOption(options, "MinX", 0);
+   priv->jsxMinY = xf86SetIntOption(options, "MinY", 0);
+   priv->jsxPressMax = xf86SetIntOption(options, "PressMax", 127);
+   priv->jsxPressMin = xf86SetIntOption(options, "PressMin", 5);
+   priv->jsxPressDiv = xf86SetIntOption(options, "PressDiv", 2);
+   local->flags |= XI86_POINTER_CAPABLE | XI86_CONFIGURED;
+   return (local);
+}
+
+InputDriverRec JAMSTUDIO =
+      { 1, "js_x", NULL, xf86JS_XInit, xf86JS_XUnInit, NULL, 0 };
+
+#ifdef XFree86LOADER
+
+static void
+xf86JS_XUnplug(pointer p)
+{
+   return;
+}
+
+static pointer
+xf86JS_XPlug(pointer module, pointer options, int *errmaj, int *errmin)
+{
+   xf86AddInputDriver(&JAMSTUDIO, module, 0);
+   return module;
+}
+
+static XF86ModuleVersionInfo xf86JS_XVersionRec = {
+   "js_x",
+   MODULEVENDORSTRING,
+   MODINFOSTRING1,
+   MODINFOSTRING2,
+   XF86_VERSION_CURRENT,
+   1, 0, 0,
+   ABI_CLASS_XINPUT,
+   ABI_XINPUT_VERSION,
+   MOD_CLASS_XINPUT,
+   {0, 0, 0, 0}		/* signature, to be patched into the file by a tool */
+};
+
+XF86ModuleData js_xModuleData = { &xf86JS_XVersionRec,
+   xf86JS_XPlug,
+   xf86JS_XUnplug
+};
+#endif
+#endif
diff --git a/xc/programs/Xserver/hw/xfree86/input/jamstudio/js_x.man b/xc/programs/Xserver/hw/xfree86/input/jamstudio/js_x.man
new file mode 100644
index 000000000..d8fbcce25
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/input/jamstudio/js_x.man
@@ -0,0 +1,67 @@
+.\" $XFree86: xc/programs/Xserver/hw/xfree86/input/jamstudio/js_x.man,v 1.2 2003/02/24 03:24:15 dawes Exp $ 
+.\" shorthand for double quote that works everywhere.
+.ds q \N'34'
+.TH JS_X __drivermansuffix__ __vendorversion__
+.SH NAME
+js_x \- JamStudio input driver
+.SH SYNOPSIS
+.nf
+.B "Section \*qInputDevice\*q"
+.BI "  Identifier \*q" devname \*q
+.B  "  Driver \*qjs_x\*q"
+.BI "  Option \*qDevice\*q   \*q" devpath \*q
+.BI "  Option \*qMaxX\*q  \*q" int \*q
+.BI "  Option \*qMaxY\*q  \*q" int \*q
+.BI "  Option \*qMinX\*q  \*q" int \*q
+.BI "  Option \*qMinY\*q  \*q" int \*q
+.BI "  Option \*qPressMax\*q  \*q" int \*q
+.BI "  Option \*qPressMin\*q  \*q" int \*q
+.BI "  Option \*qPressDiv\*q  \*q" int \*q
+.B EndSection
+.fi
+.SH DESCRIPTION
+.B js_x 
+is an XFree86 input driver for JamStudio devices.
+.PP
+The
+.B js_x 
+driver functions as a pointer input device, and may be used as the
+X server's core pointer.
+.SH SUPPORTED HARDWARE
+This driver supports the KB-Gear JamStudio pentablet.
+This X-Input driver should work on any OS supporting the hiddev raw USB HID driver.
+.SH CONFIGURATION DETAILS
+Please refer to XF86Config(__filemansuffix__) for general configuration
+details and for options that can be used with all input drivers.  This
+section only covers configuration details specific to this driver.
+.RS 8
+.TP 4
+.B Option \fI"Device"\fP \fI"path"\fP
+sets the path to the raw HID device to which the tablet was assigned.
+This option is mandatory.
+.TP
+.B Option \fI"MinX"\fP \fI"int"\fP
+.TP
+.B Option \fI"MaxX"\fP \fI"int"\fP
+.TP
+.B Option \fI"MinY"\fP \fI"int"\fP
+.TP
+.B Option \fI"MaxY"\fP \fI"int"\fP
+sets the minimum and maximum values returned for the absolute X,Y axis of the pen tablet. These values default to 0-8000 for X and 0-6000 for Y. It should generally be safe to leave these values untouched.
+.TP
+.B Option \fI"PressMin\fP \fI"int"\fP
+.TP
+.B Option \fI"PressMax\fP \fI"int"\fP
+sets the minimum and maximum values returned for the pressure sensitive tip. These values default to 0-127. It should generally be safe to leave these values untouched.
+.TP 4
+.B Option \fI"PressDiv"\fP \fI"int"\fP
+sets the divider for the returned pressure value. This option will allow you to return a smaller set of values for the pressure sensitive tip allowing for finer control. The returned value is computed as follows:
+.RS
+.TP
+\fIX / PressDiv = returned value\fP
+where X equals the value read from the tablet.
+.RE
+.SH "SEE ALSO"
+XFree86(1), XF86Config(__filemansuffix__), xf86config(1), Xserver(1), X(__miscmansuffix__).
+.SH AUTHORS
+Brian Goines <bgoines78@comcast.net>
diff --git a/xc/programs/Xserver/hw/xfree86/input/keyboard/kbd.c b/xc/programs/Xserver/hw/xfree86/input/keyboard/kbd.c
index 79f3b6499..f6d415233 100644
--- a/xc/programs/Xserver/hw/xfree86/input/keyboard/kbd.c
+++ b/xc/programs/Xserver/hw/xfree86/input/keyboard/kbd.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/input/keyboard/kbd.c,v 1.2 2002/10/16 04:53:16 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/input/keyboard/kbd.c,v 1.7 2003/02/17 16:08:29 dawes Exp $ */
 
 /*
  * Copyright (c) 2002 by The XFree86 Project, Inc.
@@ -30,6 +30,7 @@
 #endif
 
 #include "xf86Xinput.h"
+#include "xf86_OSproc.h"
 #include "xf86OSKbd.h"
 #include "xf86_ansic.h"
 #include "compiler.h"
@@ -148,12 +149,14 @@ static char *xkb_options;
 static XkbComponentNamesRec xkbnames;
 #endif /* XKB */
 
+#ifdef XFree86LOADER
 /*ARGSUSED*/
 static const OptionInfoRec *
 KeyboardAvailableOptions(void *unused)
 {
     return (KeyboardOptions);
 }
+#endif
 
 static void
 SetXkbOption(InputInfoPtr pInfo, char *name, char **option)
@@ -213,7 +216,7 @@ KbdPreInit(InputDriverPtr drv, IDevPtr dev, int flags)
     pInfo->private = pKbd;
     pKbd->PostEvent = PostKbdEvent;
 
-    if (!xf86OSKbdPreInit(pKbd))
+    if (!xf86OSKbdPreInit(pInfo))
         return pInfo;
 
     if (!pKbd->OpenKeyboard(pInfo)) {
@@ -429,11 +432,14 @@ KbdProc(DeviceIntPtr device, int what)
   KbdDevPtr pKbd = (KbdDevPtr) pInfo->private;
   KeySymsRec           keySyms;
   CARD8                modMap[MAP_LENGTH];
-  int                  kbdFd;
+  int                  ret;
 
   switch (what) {
      case DEVICE_INIT:
-        pKbd->KbdInit(pInfo);
+        ret = pKbd->KbdInit(pInfo, what);
+	if (ret != Success)
+	    return ret;
+
         pKbd->KbdGetMapping(pInfo, &keySyms, modMap);
 
         device->public.on = FALSE;
@@ -462,20 +468,22 @@ KbdProc(DeviceIntPtr device, int what)
     InitKBD(pInfo, TRUE);
     break;
   case DEVICE_ON:
+    if (device->public.on)
+	break;
     /*
      * Set the keyboard into "direct" mode and turn on
      * event translation.
      */
-    kbdFd = pKbd->KbdOn(pInfo);
+    if ((ret = pKbd->KbdOn(pInfo, what)) != Success)
+	return ret;
     /*
      * Discard any pending input after a VT switch to prevent the server
      * passing on parts of the VT switch sequence.
      */
-    sleep(1);
-    if (kbdFd != -1) {
-        char buf[16];
-        read(kbdFd, buf, 16);
-        AddEnabledDevice(kbdFd);
+    if (pInfo->fd >= 0) {
+	sleep(1);
+	xf86FlushInput(pInfo->fd);
+	AddEnabledDevice(pInfo->fd);
     }
 
     device->public.on = TRUE;
@@ -488,9 +496,9 @@ KbdProc(DeviceIntPtr device, int what)
     /*
      * Restore original keyboard directness and translation.
      */
-    kbdFd = pKbd->KbdOff(pInfo);
-    if (kbdFd != -1)
-      RemoveEnabledDevice(kbdFd);
+    if (pInfo->fd != -1)
+      RemoveEnabledDevice(pInfo->fd);
+    pKbd->KbdOff(pInfo, what);
     device->public.on = FALSE;
     break;
   }
@@ -513,6 +521,10 @@ PostKbdEvent(InputInfoPtr pInfo, unsigned int scanCode, Bool down)
   unsigned long changeLock = 0;
   static int  lockkeys = 0;
 
+  /* Disable any keyboard processing while in suspend */
+  if (xf86inSuspend)
+      return;
+
   /*
    * First do some special scancode remapping ...
    */
@@ -543,12 +555,24 @@ PostKbdEvent(InputInfoPtr pInfo, unsigned int scanCode, Bool down)
      }
   }
 
-  if (xf86CommonSpecialKey(specialkey, down, keyc->state))
-     return;
-  if (pKbd->SpecialKey != NULL)
-     if (pKbd->SpecialKey(pInfo, specialkey, down, keyc->state))
-        return;
-
+#ifndef TERMINATE_FALLBACK
+#define TERMINATE_FALLBACK 1
+#endif
+#ifdef XKB
+  if (noXkbExtension
+#if TERMINATE_FALLBACK
+      || specialkey == KEY_BackSpace
+#endif
+     )
+#endif
+  {    
+      if (xf86CommonSpecialKey(specialkey, down, keyc->state))
+	  return;
+      if (pKbd->SpecialKey != NULL)
+	  if (pKbd->SpecialKey(pInfo, specialkey, down, keyc->state))
+	      return;
+  }
+  
   /*
    * Now map the scancodes to real X-keycodes ...
    */
diff --git a/xc/programs/Xserver/hw/xfree86/input/magictouch/xf86MagicTouch.c b/xc/programs/Xserver/hw/xfree86/input/magictouch/xf86MagicTouch.c
index 4154512c3..c099ecc4b 100644
--- a/xc/programs/Xserver/hw/xfree86/input/magictouch/xf86MagicTouch.c
+++ b/xc/programs/Xserver/hw/xfree86/input/magictouch/xf86MagicTouch.c
@@ -1,5 +1,5 @@
 /*
- * $XFree86: xc/programs/Xserver/hw/xfree86/input/magictouch/xf86MagicTouch.c,v 1.2 2001/07/04 13:38:09 tsi Exp $
+ * $XFree86: xc/programs/Xserver/hw/xfree86/input/magictouch/xf86MagicTouch.c,v 1.3 2003/01/12 03:55:50 tsi Exp $
  */
 
 #include <xf86Version.h>
@@ -601,9 +601,9 @@ xf86MagicControl(DeviceIntPtr dev,
 			 */
 			xf86MotionHistoryAllocate(local);
 			
-			#ifndef XFREE86_V4
+#ifndef XFREE86_V4
 			AssignTypeAndName(dev, local->atom, local->name);
-			#endif /* XFREE86_V4 */
+#endif /* XFREE86_V4 */
 			
 			DBG(2, ErrorF("MagicTouch INIT OK\n") );
 			
@@ -612,20 +612,20 @@ xf86MagicControl(DeviceIntPtr dev,
 		case DEVICE_ON:
 			DBG(2, ErrorF("MagicTouch ON\n") );
 			if (local->fd<0) {
-			#ifndef XFREE86_V4
+#ifndef XFREE86_V4
 			struct termios termios_tty;
 			int 		i,result;
-			#endif
+#endif
 			
 			DBG(2, ErrorF("Opening device...\n") );
 			
-			#ifdef XFREE86_V4
+#ifdef XFREE86_V4
 			local->fd = xf86OpenSerial(local->options);
 			if (local->fd<0) {
 				ErrorF("Impossibile aprire MagicTouch\n");
 				return !Success;
 			}
-			#else
+#else
 			SYSCALL( local->fd = open(priv->input_dev, O_RDWR | O_NDELAY, 0) );
 			if (local->fd<0) {
 				Error("Impossibile aprire MagicTouch\n");
@@ -646,7 +646,7 @@ xf86MagicControl(DeviceIntPtr dev,
 			/*
 			 * Attivo l'RTS per abilitare il touch controller
 			 */
-			#if 0
+#if 0
          SYSCALL( result = ioctl(local->fd, TIOCMGET, &status_line) );
 			if (result<0) 
 			{
@@ -662,7 +662,7 @@ xf86MagicControl(DeviceIntPtr dev,
 				close(local->fd);
 				return !Success;
 			}
-			#endif
+#endif
 			
 			SYSCALL( result = tcsetattr(local->fd, TCSANOW, &termios_tty) );
 			if (result<0) 
@@ -671,7 +671,7 @@ xf86MagicControl(DeviceIntPtr dev,
 				close(local->fd);
 				return !Success;
 			}
-			#endif
+#endif
 			
 								
 			/* Controlla se e' presente il touch controller.*/
@@ -987,11 +987,11 @@ xf86MagicAllocate(void)
 xf86MagicAllocate(InputDriverPtr drv)
 #endif
 {
-	#ifndef XFREE86_V4
+#ifndef XFREE86_V4
 	LocalDevicePtr	local = (LocalDevicePtr) xalloc( sizeof(LocalDeviceRec) );
-	#else
+#else
 	LocalDevicePtr	local = xf86AllocateInput(drv, 0);
-	#endif
+#endif
 
 	MagicPrivatePtr	priv = (MagicPrivatePtr) xalloc( sizeof(MagicPrivateRec) );
 
@@ -1011,12 +1011,12 @@ xf86MagicAllocate(InputDriverPtr drv)
 	}
 	
 	/* I buffers sono allocati correttamente */
-	#ifdef XFREE86_V4
+#ifdef XFREE86_V4
 	priv->input_dev = strdup(MAGIC_PORT);
-	#else
+#else
 	priv->input_dev = MAGIC_PORT;
 	priv->link_speed = MAGIC_LINK_SPEED;
-	#endif
+#endif
 	
 	priv->min_x = 60;
 	priv->max_x = 960;
@@ -1042,11 +1042,11 @@ xf86MagicAllocate(InputDriverPtr drv)
 	local->name = XI_TOUCHSCREEN;
 	local->flags = 0;
 	
-	#ifndef XFREE86_V4
-	#if !defined(sun) || defined(i386)
+#ifndef XFREE86_V4
+#if !defined(sun) || defined(i386)
 	local->device_config = xf86MagicConfig;	
-	#endif /* !defined(sun) || defined(i386) */	
-	#endif /* XFREE86_V4*/
+#endif /* !defined(sun) || defined(i386) */	
+#endif /* XFREE86_V4*/
 	
 	local->device_control = xf86MagicControl;
 	local->read_input = xf86MagicReadInput;
diff --git a/xc/programs/Xserver/hw/xfree86/input/mouse/mouse.c b/xc/programs/Xserver/hw/xfree86/input/mouse/mouse.c
index adf8b4737..3234230cb 100644
--- a/xc/programs/Xserver/hw/xfree86/input/mouse/mouse.c
+++ b/xc/programs/Xserver/hw/xfree86/input/mouse/mouse.c
@@ -1,10 +1,11 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/input/mouse/mouse.c,v 1.59 2002/10/21 19:38:35 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/input/mouse/mouse.c,v 1.69 2003/02/11 03:33:06 dawes Exp $ */
 /*
  *
  * Copyright 1990,91 by Thomas Roell, Dinkelscherben, Germany.
  * Copyright 1993 by David Dawes <dawes@xfree86.org>
  * Copyright 2002 by SuSE Linux AG, Author: Egbert Eich
  * Copyright 1994-2002 by The XFree86 Project, Inc.
+ * Copyright 2002 by Paul Elliott
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
@@ -37,6 +38,12 @@
  * [TVO-97/03/05] Added microsoft IntelliMouse support
  */
 
+/*
+ * [PME-02/08/11] Added suport for drag lock buttons
+ * for use with 4 button trackballs for convenience
+ * and to help limited dexterity persons
+ */
+
 #define NEED_EVENTS
 #include "X.h"
 #include "Xproto.h"
@@ -64,6 +71,49 @@
 #include "mousePriv.h"
 #include "mipointer.h"
 
+enum {
+    /* number of bits in mapped nibble */
+    NIB_BITS=4,
+    /* size of map of nibbles to bitmask */
+    NIB_SIZE= (1 << NIB_BITS),
+    /* mask for map */
+    NIB_MASK= (NIB_SIZE -1),
+    /* number of maps to map all the buttons */
+    NIB_COUNT = ((MSE_MAXBUTTONS+NIB_BITS-1)/NIB_BITS)
+};
+
+/*data to be used in implementing trackball drag locks.*/
+typedef struct _DragLockRec {
+
+    /* Fields used to implement trackball drag locks. */
+    /* mask for those buttons that are ordinary drag lock buttons */
+    int lockButtonsM;
+
+    /* mask for the master drag lock button if any */
+    int masterLockM;
+
+    /* button state up/down from last time adjusted for drag locks */
+    int lockLastButtons;
+
+    /*
+     * true if master lock state i.e. master drag lock
+     * button has just been pressed
+     */
+    int masterTS;
+
+    /* simulate these buttons being down although they are not */
+    int simulatedDown;
+
+    /*
+     * data to map bits for drag lock buttons to corresponding
+     * bits for the target buttons
+     */
+    int nib_table[NIB_COUNT][NIB_SIZE];
+
+} DragLockRec, *DragLockPtr;
+
+
+
 #ifdef XFree86LOADER
 static const OptionInfoRec *MouseAvailableOptions(void *unused);
 #endif
@@ -129,6 +179,7 @@ typedef enum {
     OPTION_FLIP_XY,
     OPTION_INV_X,
     OPTION_INV_Y,
+    OPTION_ANGLE_OFFSET,
     OPTION_Z_AXIS_MAPPING,
     OPTION_SAMPLE_RATE,
     OPTION_RESOLUTION,
@@ -146,7 +197,8 @@ typedef enum {
     OPTION_PARITY,
     OPTION_FLOW_CONTROL,
     OPTION_VTIME,
-    OPTION_VMIN
+    OPTION_VMIN,
+    OPTION_DRAGLOCKBUTTONS
 } MouseOpts;
 
 static const OptionInfoRec mouseOptions[] = {
@@ -164,6 +216,7 @@ static const OptionInfoRec mouseOptions[] = {
     { OPTION_FLIP_XY,		"FlipXY",	  OPTV_BOOLEAN,	{0}, FALSE },
     { OPTION_INV_X,		"InvX",		  OPTV_BOOLEAN,	{0}, FALSE },
     { OPTION_INV_Y,		"InvY",		  OPTV_BOOLEAN,	{0}, FALSE },
+    { OPTION_ANGLE_OFFSET,	"AngleOffset",	  OPTV_INTEGER,	{0}, FALSE },
     { OPTION_Z_AXIS_MAPPING,	"ZAxisMapping",	  OPTV_STRING,	{0}, FALSE },
     { OPTION_SAMPLE_RATE,	"SampleRate",	  OPTV_INTEGER,	{0}, FALSE },
     { OPTION_RESOLUTION,	"Resolution",	  OPTV_INTEGER,	{0}, FALSE },
@@ -183,6 +236,7 @@ static const OptionInfoRec mouseOptions[] = {
     { OPTION_FLOW_CONTROL,	"FlowControl",	  OPTV_STRING,	{0}, FALSE },
     { OPTION_VTIME,		"VTime",	  OPTV_INTEGER,	{0}, FALSE },
     { OPTION_VMIN,		"VMin",		  OPTV_INTEGER,	{0}, FALSE },
+    { OPTION_DRAGLOCKBUTTONS,	"DragLockButtons",OPTV_STRING,	{0}, FALSE },
     /* end serial options */
     { -1,			NULL,		  OPTV_NONE,	{0}, FALSE }
 };
@@ -355,7 +409,116 @@ MouseCommonOptions(InputInfoPtr pInfo)
 	xf86Msg(X_CONFIG, "%s: InvY\n", pInfo->name);
     } else
 	pMse->invY = 1;
+    pMse->angleOffset = xf86SetIntOption(pInfo->options, "AngleOffset", 0);
     
+
+    if (pMse->pDragLock)
+	xfree(pMse->pDragLock);
+    pMse->pDragLock = NULL;
+      
+    s = xf86SetStrOption(pInfo->options, "DragLockButtons", NULL);
+
+    if (s) {
+	int lock;             /* lock button */
+	int target;           /* target button */
+	int lockM,targetM;    /* bitmasks for drag lock, target */
+	int i, j;             /* indexes */
+	char *s1;             /* parse input string */
+	DragLockPtr pLock;
+      
+	pLock = pMse->pDragLock = xcalloc(1, sizeof(DragLockRec));
+	/* init code */
+
+	/* initial string to be taken apart */
+	s1 = s;
+      
+	/* keep getting numbers which are buttons */
+	while ((s1 != NULL) && (lock = strtol(s1, &s1, 10)) != 0) {
+
+	    /* check sanity for a button */
+	    if ((lock < 0) || (lock > MSE_MAXBUTTONS)) {
+		xf86Msg(X_WARNING, "DragLock: Invalid button number = %d\n",
+			lock);
+		break;
+	    };
+	    /* turn into a button mask */
+	    lockM = 1 << (lock - 1);
+
+	    /* try to get drag lock button */
+	    if ((s1 == NULL) || ((target=strtol(s1, &s1, 10)) == 0)) {
+		/*if no target, must be a master drag lock button */
+		/* save master drag lock mask */
+		pLock->masterLockM = lockM;
+		xf86Msg(X_CONFIG, 
+			"DragLock button %d is master drag lock", 
+			lock);
+	    } else {
+		/* have target button number*/
+		/* check target button number for sanity */
+		if ((target < 0) || (target > MSE_MAXBUTTONS)) {
+		    xf86Msg(X_WARNING, 
+			    "DragLock: Invalid button number for target=%d\n",
+			    target);
+		    break;
+		}
+
+		/* target button mask */
+		targetM = 1 << (target - 1);
+
+		xf86Msg(X_CONFIG, 
+			"DragLock: button %d is drag lock for button %d\n", 
+			lock,target);
+		lock--;
+
+		/* initialize table that maps drag lock mask to target mask */
+		pLock->nib_table[lock / NIB_SIZE][1 << (lock % NIB_BITS)] = 
+			targetM;
+
+		/* add new drag lock to mask of drag locks */
+		pLock->lockButtonsM |= lockM;
+	    }
+
+	} 
+
+	/*
+	 * fill out rest of map that maps sets of drag lock buttons
+	 * to sets of target buttons, in the form of masks
+	 */
+
+	/* for each nibble */
+	for (i = 0; i < NIB_COUNT; i++) {
+	    /* for each possible set of bits for that nibble */
+	    for (j = 0; j < NIB_SIZE; j++) {
+		int ff, fM, otherbits;
+
+		/* get first bit set in j*/
+		ff = ffs(j) - 1;
+		/* if 0 bits set nothing to do */
+		if (ff >= 0) {
+		    /* form mask for fist bit set */
+		    fM = 1 << ff;
+		    /* mask off first bit set to get remaining bits set*/
+		    otherbits = j & ~fM;
+		    /*
+		     * if otherbits =0 then only 1 bit set
+		     * so j=fM
+		     * nib_table[i][fM] already calculated if fM has
+		     * only 1 bit set.
+		     * nib_table[i][j] has already been filled in
+		     * by previous loop. otherwise
+		     * otherbits < j so nibtable[i][otherbits]
+		     * has already been calculated.
+		     */
+		    if (otherbits)
+			pLock->nib_table[i][j] = 
+				     pLock->nib_table[i][fM] |
+				     pLock->nib_table[i][otherbits];
+
+		}
+	    }
+	}
+    }
+
     s = xf86SetStrOption(pInfo->options, "ZAxisMapping", NULL);
     if (s) {
 	int b1 = 0, b2 = 0, b3 = 0, b4 = 0;
@@ -495,6 +658,34 @@ MouseCommonOptions(InputInfoPtr pInfo)
     xf86Msg(from, "%s: Buttons: %d\n", pInfo->name, pMse->buttons);
     
 }
+/*
+ * map bits corresponding to lock buttons.
+ * for each bit for a lock button,
+ * turn on bit corresponding to button button that the lock
+ * button services.
+ */
+
+static int
+lock2targetMap(DragLockPtr pLock, int lockMask)
+{
+    int result,i;
+    result = 0;
+
+    /*
+     * for each nibble group of bits, use
+     * map for that group to get corresponding
+     * bits, turn them on.
+     * if 4 or less buttons only first map will
+     * need to be used.
+     */
+    for (i = 0; (i < NIB_COUNT) && lockMask; i++) {
+	result |= pLock->nib_table[i][lockMask& NIB_MASK];
+
+	lockMask &= ~NIB_MASK;
+	lockMask >>= NIB_BITS;
+    }
+    return result;
+}
 
 static void
 MouseHWOptions(InputInfoPtr pInfo)
@@ -871,14 +1062,12 @@ MouseReadInput(InputInfoPtr pInfo)
 	}
 #endif
 	if (pBufP >= pMse->protoPara[4]) {
-	    
 	    /*
 	     * Buffer contains a full packet, which has already been processed:
 	     * Empty the buffer and check for optional 4th byte, which will be
 	     * processed directly, without being put into the buffer first.
 	     */
 	    pBufP = 0;
-
 	    if ((u & pMse->protoPara[0]) != pMse->protoPara[1] &&
 		(u & pMse->protoPara[5]) == pMse->protoPara[6]) {
 		/*
@@ -915,7 +1104,6 @@ MouseReadInput(InputInfoPtr pInfo)
 		 * mistakingly received a byte even if we didn't see anything
 		 * preceeding the byte.
 		 */
-
 #ifdef EXTMOUSEDEBUG
 		ErrorF("mouse 4th byte %02x\n",u);
 #endif
@@ -1270,7 +1458,7 @@ MouseReadInput(InputInfoPtr pInfo)
 	    if (pMse->protoPara[4] >= 8) {
 		dz = ((signed char)(pBuf[5] << 1) +
 		      (signed char)(pBuf[6] << 1)) >> 1;
-		buttons |= (int)(~pBuf[7] & 0x07) << 3;
+		buttons |= (int)(~pBuf[7] & 0x7f) << 3;
 	    }
 	    break;
 
@@ -1829,6 +2017,71 @@ MouseDoPostEvent(InputInfoPtr pInfo, int buttons, int dx, int dy)
 	else
 	    change = buttons ^ reverseBits(reverseMap, pMse->lastButtons);
 
+	/*
+	 * adjust buttons state for drag locks!
+	 * if there is drag locks
+	 */
+        if (pMse->pDragLock) {      
+	    DragLockPtr   pLock;
+	    int tarOfGoingDown, tarOfDown;
+	    int realbuttons;
+
+	    /* get drag lock block */
+	    pLock = pMse->pDragLock;
+	    /* save real buttons */
+	    realbuttons = buttons;
+
+	    /* if drag lock used */
+
+	    /* state of drag lock buttons not seen always up */
+
+	    buttons &= ~pLock->lockButtonsM;
+
+	    /*
+	     * if lock buttons being depressed changes state of
+	     * targets simulatedDown.
+	     */
+	    tarOfGoingDown = lock2targetMap(pLock,
+				realbuttons & change & pLock->lockButtonsM);
+	    pLock->simulatedDown ^= tarOfGoingDown;
+
+	    /* targets of drag locks down */
+	    tarOfDown = lock2targetMap(pLock,
+				realbuttons & pLock->lockButtonsM);
+
+	    /*
+	     * when simulatedDown set and target pressed, 
+	     * simulatedDown goes false 
+	     */
+	    pLock->simulatedDown &= ~(realbuttons & change);
+
+	    /*
+	     * if master drag lock released  
+	     * then master drag lock state on
+	     */
+	    pLock->masterTS |= (~realbuttons & change) & pLock->masterLockM;
+
+	    /* if master state, buttons going down are simulatedDown */
+	    if (pLock->masterTS) 
+		pLock->simulatedDown |= (realbuttons & change);
+
+	    /* if any button pressed, no longer in master drag lock state */
+	    if (realbuttons & change)
+		pLock->masterTS = 0;
+
+	    /* if simulatedDown or drag lock down, simulate down */
+	    buttons |= (pLock->simulatedDown | tarOfDown);
+
+	    /* master button not seen */
+	    buttons &= ~(pLock->masterLockM);
+
+	    /* buttons changed since last time */
+	    change = buttons ^ pLock->lockLastButtons;
+
+	    /* save this time for next last time. */
+	    pLock->lockLastButtons = buttons;
+	}
+
         if (pMse->emulate3Buttons
 	    && (!(buttons & 0x02) || Emulate3ButtonsSoft(pInfo))) {
 
@@ -1873,7 +2126,6 @@ MousePostEvent(InputInfoPtr pInfo, int buttons, int dx, int dy, int dz, int dw)
     MouseDevPtr pMse;
     int zbutton = 0;
 
-
     pMse = pInfo->private;
 
     /* Map the Z axis movement. */
@@ -1908,6 +2160,15 @@ MousePostEvent(InputInfoPtr pInfo, int buttons, int dx, int dy, int dz, int dw)
 	dz = 0;
 	break;
     }
+
+    /* Apply angle offset */
+    if (pMse->angleOffset != 0) {
+	double rad = 3.141592653 * pMse->angleOffset / 180.0;
+	int ndx = dx;
+	dx = (int)((dx * cos(rad)) + (dy * sin(rad)) + 0.5);
+	dy = (int)((dy * cos(rad)) - (ndx * sin(rad)) + 0.5);
+    }
+
     dx = pMse->invX * dx;
     dy = pMse->invY * dy;
     if (pMse->flipXY) {
@@ -1951,7 +2212,7 @@ static unsigned char proto[PROT_NUMPROTOS][8] = {
   {  0x80, 0x80, 0x80, 0x00,  3,   0x00, 0xff, MPF_NONE },  /* ACECAD */
 							    /* PS/2 variants */
   {  0xc0, 0x00, 0x00, 0x00,  3,   0x00, 0xff, MPF_NONE },  /* PS/2 mouse */
-  {  0xc8, 0x08, 0x00, 0x00,  3,   0x08, 0x00, MPF_NONE },  /* genericPS/2 mouse*/
+  {  0xc8, 0x08, 0x00, 0x00,  3,   0x00, 0x00, MPF_NONE },  /* genericPS/2 mouse*/
   {  0x08, 0x08, 0x00, 0x00,  4,   0x00, 0xff, MPF_NONE },  /* IntelliMouse */
   {  0x08, 0x08, 0x00, 0x00,  4,   0x00, 0xff, MPF_NONE },  /* Explorer */
   {  0x80, 0x80, 0x00, 0x00,  3,   0x00, 0xff, MPF_NONE },  /* ThinkingMouse */
@@ -2105,6 +2366,18 @@ SetupMouse(InputInfoPtr pInfo)
 **               [CHRIS-211092]
 */
 
+/*
+ * Do a reset wrap mode before reset.
+ */
+#define do_ps2Reset(x)  { \
+    int i = 10;\
+     while (i-- > 0) { \
+       xf86FlushInput(x->fd); \
+       if (ps2Reset(x)) break; \
+    } \
+  }
+
+		       
 static Bool
 initMouseHW(InputInfoPtr pInfo)
 {
@@ -2115,300 +2388,329 @@ initMouseHW(InputInfoPtr pInfo)
     pointer options;
     unsigned char *param = NULL;
     int paramlen = 0;
+    int count = 10;
+    Bool ps2Init = TRUE;
     
     switch (pMse->protocolID) {
-    case PROT_LOGI:		/* Logitech Mice */
-        /* 
-	 * The baud rate selection command must be sent at the current
-	 * baud rate; try all likely settings.
-	 */
-	speed = pMse->baudRate;
-	switch (speed) {
-	case 9600:
-	    s = "*q";
-	    break;
-	case 4800:
-	    s = "*p";
+	case PROT_LOGI:		/* Logitech Mice */
+	    /* 
+	     * The baud rate selection command must be sent at the current
+	     * baud rate; try all likely settings.
+	     */
+	    speed = pMse->baudRate;
+	    switch (speed) {
+		case 9600:
+		    s = "*q";
+		    break;
+		case 4800:
+		    s = "*p";
+		    break;
+		case 2400:
+		    s = "*o";
+		    break;
+		case 1200:
+		    s = "*n";
+		    break;
+		default:
+		    /* Fallback value */
+		    speed = 1200;
+		    s = "*n";
+	    }
+	    xf86SetSerialSpeed(pInfo->fd, 9600);
+	    xf86WriteSerial(pInfo->fd, s, 2);
+	    usleep(100000);
+	    xf86SetSerialSpeed(pInfo->fd, 4800);
+	    xf86WriteSerial(pInfo->fd, s, 2);
+	    usleep(100000);
+	    xf86SetSerialSpeed(pInfo->fd, 2400);
+	    xf86WriteSerial(pInfo->fd, s, 2);
+	    usleep(100000);
+	    xf86SetSerialSpeed(pInfo->fd, 1200);
+	    xf86WriteSerial(pInfo->fd, s, 2);
+	    usleep(100000);
+	    xf86SetSerialSpeed(pInfo->fd, speed);
+
+	    /* Select MM series data format. */
+	    xf86WriteSerial(pInfo->fd, "S", 1);
+	    usleep(100000);
+	    /* Set the parameters up for the MM series protocol. */
+	    options = pInfo->options;
+	    xf86CollectInputOptions(pInfo, mmDefaults, NULL);
+	    xf86SetSerial(pInfo->fd, pInfo->options);
+	    pInfo->options = options;
+
+	    /* Select report rate/frequency. */
+	    if      (pMse->sampleRate <=   0)  c = 'O';  /* 100 */
+	    else if (pMse->sampleRate <=  15)  c = 'J';  /*  10 */
+	    else if (pMse->sampleRate <=  27)  c = 'K';  /*  20 */
+	    else if (pMse->sampleRate <=  42)  c = 'L';  /*  35 */
+	    else if (pMse->sampleRate <=  60)  c = 'R';  /*  50 */
+	    else if (pMse->sampleRate <=  85)  c = 'M';  /*  67 */
+	    else if (pMse->sampleRate <= 125)  c = 'Q';  /* 100 */
+	    else                               c = 'N';  /* 150 */
+	    xf86WriteSerial(pInfo->fd, &c, 1);
 	    break;
-	case 2400:
-	    s = "*o";
+
+	case PROT_LOGIMAN:
+	    speed = pMse->baudRate;
+	    switch (speed) {
+		case 9600:
+		    s = "*q";
+		    break;
+		case 1200:
+		    s = "*n";
+		    break;
+		default:
+		    /* Fallback value */
+		    speed = 1200;
+		    s = "*n";
+	    }
+	    xf86SetSerialSpeed(pInfo->fd, 1200);
+	    xf86WriteSerial(pInfo->fd, "*n", 2);
+	    xf86WriteSerial(pInfo->fd, "*X", 2);
+	    xf86WriteSerial(pInfo->fd, s, 2);
+	    usleep(100000);
+	    xf86SetSerialSpeed(pInfo->fd, speed);
 	    break;
-	case 1200:
-	    s = "*n";
+
+	case PROT_MMHIT:		/* MM_HitTablet */
+	    /*
+	     * Initialize Hitachi PUMA Plus - Model 1212E to desired settings.
+	     * The tablet must be configured to be in MM mode, NO parity,
+	     * Binary Format.  pMse->sampleRate controls the sensitivity
+	     * of the tablet.  We only use this tablet for it's 4-button puck
+	     * so we don't run in "Absolute Mode".
+	     */
+	    xf86WriteSerial(pInfo->fd, "z8", 2);	/* Set Parity = "NONE" */
+	    usleep(50000);
+	    xf86WriteSerial(pInfo->fd, "zb", 2);	/* Set Format = "Binary" */
+	    usleep(50000);
+	    xf86WriteSerial(pInfo->fd, "@", 1);	/* Set Report Mode = "Stream" */
+	    usleep(50000);
+	    xf86WriteSerial(pInfo->fd, "R", 1);	/* Set Output Rate = "45 rps" */
+	    usleep(50000);
+	    xf86WriteSerial(pInfo->fd, "I\x20", 2);	/* Set Incrememtal Mode "20" */
+	    usleep(50000);
+	    xf86WriteSerial(pInfo->fd, "E", 1);	/* Set Data Type = "Relative */
+	    usleep(50000);
+	    /*
+	     * These sample rates translate to 'lines per inch' on the Hitachi
+	     * tablet.
+	     */
+	    if      (pMse->sampleRate <=   40) c = 'g';
+	    else if (pMse->sampleRate <=  100) c = 'd';
+	    else if (pMse->sampleRate <=  200) c = 'e';
+	    else if (pMse->sampleRate <=  500) c = 'h';
+	    else if (pMse->sampleRate <= 1000) c = 'j';
+	    else                               c = 'd';
+	    xf86WriteSerial(pInfo->fd, &c, 1);
+	    usleep(50000);
+	    xf86WriteSerial(pInfo->fd, "\021", 1);	/* Resume DATA output */
 	    break;
-	default:
-	    /* Fallback value */
-	    speed = 1200;
-	    s = "*n";
-	}
-	xf86SetSerialSpeed(pInfo->fd, 9600);
-	xf86WriteSerial(pInfo->fd, s, 2);
-	usleep(100000);
-	xf86SetSerialSpeed(pInfo->fd, 4800);
-	xf86WriteSerial(pInfo->fd, s, 2);
-	usleep(100000);
-	xf86SetSerialSpeed(pInfo->fd, 2400);
-	xf86WriteSerial(pInfo->fd, s, 2);
-	usleep(100000);
-	xf86SetSerialSpeed(pInfo->fd, 1200);
-	xf86WriteSerial(pInfo->fd, s, 2);
-	usleep(100000);
-	xf86SetSerialSpeed(pInfo->fd, speed);
-
-        /* Select MM series data format. */
-	xf86WriteSerial(pInfo->fd, "S", 1);
-	usleep(100000);
-	/* Set the parameters up for the MM series protocol. */
-	options = pInfo->options;
-	xf86CollectInputOptions(pInfo, mmDefaults, NULL);
-	xf86SetSerial(pInfo->fd, pInfo->options);
-	pInfo->options = options;
-
-        /* Select report rate/frequency. */
-	if      (pMse->sampleRate <=   0)  c = 'O';  /* 100 */
-	else if (pMse->sampleRate <=  15)  c = 'J';  /*  10 */
-	else if (pMse->sampleRate <=  27)  c = 'K';  /*  20 */
-	else if (pMse->sampleRate <=  42)  c = 'L';  /*  35 */
-	else if (pMse->sampleRate <=  60)  c = 'R';  /*  50 */
-	else if (pMse->sampleRate <=  85)  c = 'M';  /*  67 */
-	else if (pMse->sampleRate <= 125)  c = 'Q';  /* 100 */
-	else                               c = 'N';  /* 150 */
-	xf86WriteSerial(pInfo->fd, &c, 1);
-	break;
 
-    case PROT_LOGIMAN:
-	speed = pMse->baudRate;
-	switch (speed) {
-	case 9600:
-	    s = "*q";
+	case PROT_THINKING:		/* ThinkingMouse */
+	    /* This mouse may send a PnP ID string, ignore it. */
+	    usleep(200000);
+	    xf86FlushInput(pInfo->fd);
+	    /* Send the command to initialize the beast. */
+	    for (s = "E5E5"; *s; ++s) {
+		xf86WriteSerial(pInfo->fd, s, 1);
+		if ((xf86WaitForInput(pInfo->fd, 1000000) <= 0))
+		    break;
+		xf86ReadSerial(pInfo->fd, &c, 1);
+		if (c != *s)
+		    break;
+	    }
 	    break;
-	case 1200:
-	    s = "*n";
+
+	case PROT_MSC:		/* MouseSystems Corp */
+	    usleep(100000);
+	    xf86FlushInput(pInfo->fd);
 	    break;
-	default:
-	    /* Fallback value */
-	    speed = 1200;
-	    s = "*n";
-	}
-	xf86SetSerialSpeed(pInfo->fd, 1200);
-	xf86WriteSerial(pInfo->fd, "*n", 2);
-        xf86WriteSerial(pInfo->fd, "*X", 2);
-	xf86WriteSerial(pInfo->fd, s, 2);
-	usleep(100000);
-	xf86SetSerialSpeed(pInfo->fd, speed);
-        break;
-
-    case PROT_MMHIT:		/* MM_HitTablet */
-	/*
-	 * Initialize Hitachi PUMA Plus - Model 1212E to desired settings.
-	 * The tablet must be configured to be in MM mode, NO parity,
-	 * Binary Format.  pMse->sampleRate controls the sensitivity
-	 * of the tablet.  We only use this tablet for it's 4-button puck
-	 * so we don't run in "Absolute Mode".
-	 */
-	xf86WriteSerial(pInfo->fd, "z8", 2);	/* Set Parity = "NONE" */
-	usleep(50000);
-	xf86WriteSerial(pInfo->fd, "zb", 2);	/* Set Format = "Binary" */
-	usleep(50000);
-	xf86WriteSerial(pInfo->fd, "@", 1);	/* Set Report Mode = "Stream" */
-	usleep(50000);
-	xf86WriteSerial(pInfo->fd, "R", 1);	/* Set Output Rate = "45 rps" */
-	usleep(50000);
-	xf86WriteSerial(pInfo->fd, "I\x20", 2);	/* Set Incrememtal Mode "20" */
-	usleep(50000);
-	xf86WriteSerial(pInfo->fd, "E", 1);	/* Set Data Type = "Relative */
-	usleep(50000);
-	/*
-	 * These sample rates translate to 'lines per inch' on the Hitachi
-	 * tablet.
-	 */
-	if      (pMse->sampleRate <=   40) c = 'g';
-	else if (pMse->sampleRate <=  100) c = 'd';
-	else if (pMse->sampleRate <=  200) c = 'e';
-	else if (pMse->sampleRate <=  500) c = 'h';
-	else if (pMse->sampleRate <= 1000) c = 'j';
-	else                               c = 'd';
-	xf86WriteSerial(pInfo->fd, &c, 1);
-	usleep(50000);
-	xf86WriteSerial(pInfo->fd, "\021", 1);	/* Resume DATA output */
-        break;
-
-    case PROT_THINKING:		/* ThinkingMouse */
-	/* This mouse may send a PnP ID string, ignore it. */
-	usleep(200000);
-	xf86FlushInput(pInfo->fd);
-	/* Send the command to initialize the beast. */
-	for (s = "E5E5"; *s; ++s) {
-	    xf86WriteSerial(pInfo->fd, s, 1);
-	    if ((xf86WaitForInput(pInfo->fd, 1000000) <= 0))
-		break;
-	    xf86ReadSerial(pInfo->fd, &c, 1);
-	    if (c != *s)
-		break;
-	}
-	break;
 
-    case PROT_MSC:		/* MouseSystems Corp */
-	usleep(100000);
-	xf86FlushInput(pInfo->fd);
-        break;
-
-    case PROT_ACECAD:
-	/* initialize */
-	/* A nul character resets. */
-	xf86WriteSerial(pInfo->fd, "", 1);
-	usleep(50000);
-	/* Stream out relative mode high resolution increments of 1. */
-	xf86WriteSerial(pInfo->fd, "@EeI!", 5);
-	break;
+	case PROT_ACECAD:
+	    /* initialize */
+	    /* A nul character resets. */
+	    xf86WriteSerial(pInfo->fd, "", 1);
+	    usleep(50000);
+	    /* Stream out relative mode high resolution increments of 1. */
+	    xf86WriteSerial(pInfo->fd, "@EeI!", 5);
+	    break;
 
-    case PROT_BM:		/* bus/InPort mouse */
-	if (osInfo->SetBMRes)
-	    osInfo->SetBMRes(pInfo, pMse->protocol, pMse->sampleRate,
-			     pMse->resolution);
-	break;
+	case PROT_BM:		/* bus/InPort mouse */
+	    if (osInfo->SetBMRes)
+		osInfo->SetBMRes(pInfo, pMse->protocol, pMse->sampleRate,
+				 pMse->resolution);
+	    break;
 
-    case PROT_PS2:
-    case PROT_GENPS2:
-	ps2Reset(pInfo);
+	case PROT_GENPS2:
+	    ps2Init = FALSE;
+	    break;
 
-    case PROT_GLIDEPS2:
-	break;
-	
-    case PROT_IMPS2:		/* IntelliMouse */
-    {
-	static unsigned char seq[] = { 243, 200, 243, 100, 243, 80, 242 };
+	case PROT_PS2:
+	case PROT_GLIDEPS2:
+	    break;
 	
-	ps2Reset(pInfo);
-	param = seq;
-	paramlen = sizeof(seq);
-    }
-    break;
+	case PROT_IMPS2:		/* IntelliMouse */
+	{
+	    static unsigned char seq[] = { 243, 200, 243, 100, 243, 80, 242 };
+	    param = seq;
+	    paramlen = sizeof(seq);
+	}
+	break;
 
-    case PROT_EXPPS2:		/* IntelliMouse Explorer */
-    {
-	static unsigned char seq[] = { 243, 200, 243, 100, 243, 80,
-				       243, 200, 243, 200, 243, 80, 242 };
+	case PROT_EXPPS2:		/* IntelliMouse Explorer */
+	{
+	    static unsigned char seq[] = { 243, 200, 243, 100, 243, 80,
+					   243, 200, 243, 200, 243, 80, 242 };
 	
-	ps2Reset(pInfo);
-	param = seq;
-	paramlen = sizeof(seq);
-    }
-    break;
+	    param = seq;
+	    paramlen = sizeof(seq);
+	}
+	break;
     
-    case PROT_NETPS2:		/* NetMouse, NetMouse Pro, Mie Mouse */
-    case PROT_NETSCPS2:		/* NetScroll */
-    {
-	static unsigned char seq[] = { 232, 3, 230, 230, 230, };
+	case PROT_NETPS2:		/* NetMouse, NetMouse Pro, Mie Mouse */
+	case PROT_NETSCPS2:		/* NetScroll */
+	{
+	    static unsigned char seq[] = { 232, 3, 230, 230, 230, };
 	
-	ps2Reset(pInfo);
-	param = seq;
-	paramlen = sizeof(seq);
-    }
-    break;
-    
-    case PROT_MMPS2:		/* MouseMan+, FirstMouse+ */
-    {
-	static unsigned char seq[] = { 230, 232, 0, 232, 3, 232, 2, 232, 1,
-				       230, 232, 3, 232, 1, 232, 2, 232, 3, };
-	ps2Reset(pInfo);
-	param = seq;
-	paramlen = sizeof(seq);
-    }
-    break;
+	    param = seq;
+	    paramlen = sizeof(seq);
+	}
+	break;
     
-    case PROT_THINKPS2:		/* ThinkingMouse */
-    {
-	static unsigned char seq[] = { 243, 10, 232,  0, 243, 20, 243, 60,
-				       243, 40, 243, 20, 243, 20, 243, 60,
-				       243, 40, 243, 20, 243, 20, };
-	ps2Reset(pInfo);
-	param = seq;
-	paramlen = sizeof(seq);
-    }
-    break;
-    case PROT_SYSMOUSE:
-	if (osInfo->SetMiscRes)
-	    osInfo->SetMiscRes(pInfo, pMse->protocol, pMse->sampleRate,
-			       pMse->resolution);
+	case PROT_MMPS2:		/* MouseMan+, FirstMouse+ */
+	{
+	    static unsigned char seq[] = { 230, 232, 0, 232, 3, 232, 2, 232, 1,
+					   230, 232, 3, 232, 1, 232, 2, 232, 3, };
+	    param = seq;
+	    paramlen = sizeof(seq);
+	}
 	break;
-
-    default:
-	/* Nothing to do. */
+    
+	case PROT_THINKPS2:		/* ThinkingMouse */
+	{
+	    static unsigned char seq[] = { 243, 10, 232,  0, 243, 20, 243, 60,
+					   243, 40, 243, 20, 243, 20, 243, 60,
+					   243, 40, 243, 20, 243, 20, };
+	    param = seq;
+	    paramlen = sizeof(seq);
+	}
 	break;
-    }
+	case PROT_SYSMOUSE:
+	    if (osInfo->SetMiscRes)
+		osInfo->SetMiscRes(pInfo, pMse->protocol, pMse->sampleRate,
+				   pMse->resolution);
+	    break;
 
-    if (paramlen > 0) {
-	int count = 10;
-	while (count--) {
-	    if (ps2SendPacket(pInfo,param,paramlen))
-		break;
-	    usleep(30000);
-	}
-	if (!count) 
-	    xf86Msg(X_ERROR, "%s: Mouse initialization failed\n", pInfo->name);
- 	usleep(30000);
- 	xf86FlushInput(pInfo->fd);
+	default:
+	    /* Nothing to do. */
+	    break;
     }
 
     if (pMse->class & (MSE_PS2 | MSE_XPS2)) {
-	
-	if (osInfo->SetPS2Res) {
-	    osInfo->SetPS2Res(pInfo, pMse->protocol, pMse->sampleRate,
-			      pMse->resolution);
-	} else {
-	    int count = 10;
-	    unsigned char c2[2];
+	/*
+	 * If one part of the PS/2 mouse initialization fails
+	 * redo complete initialization. There are mice which
+	 * have occasional problems with initialization and
+	 * are in an unknown state.
+	 */
+	if (ps2Init) {
+	REDO:
+	    do_ps2Reset(pInfo);
+	    if (paramlen > 0) {
+		if (!ps2SendPacket(pInfo,param,paramlen)) {
+		    usleep(30000);
+		    xf86FlushInput(pInfo->fd);
+		    if (!count--)
+			return TRUE;
+		    goto REDO;
+		} 
+		usleep(30000);
+		xf86FlushInput(pInfo->fd);
+	    }
 	    
-	    c = 230;		/* 1:1 scaling */
-	    xf86WriteSerial(pInfo->fd, &c, 1);
-	    c = 244;		/* enable mouse */
-	    xf86WriteSerial(pInfo->fd, &c, 1);
-	    c2[0] = 243;	/* set sampling rate */
-	    if (pMse->sampleRate > 0) {
-		if (pMse->sampleRate >= 200)
-		    c2[1] = 200;
-		else if (pMse->sampleRate >= 100)
-		    c2[1] = 100;
-		else if (pMse->sampleRate >= 80)
-		    c2[1] = 80;
-		else if (pMse->sampleRate >= 60)
-		    c2[1] = 60;
-		else if (pMse->sampleRate >= 40)
-		    c2[1] = 40;
-		else
-		    c2[1] = 20;
+	    if (osInfo->SetPS2Res) {
+		osInfo->SetPS2Res(pInfo, pMse->protocol, pMse->sampleRate,
+				  pMse->resolution);
 	    } else {
-		c2[1] = 100;
-	    }
-	    xf86WriteSerial(pInfo->fd, c2, 2);
-	    c2[0] = 232;	/* set device resolution */
-	    if (pMse->resolution > 0) {
-		if (pMse->resolution >= 200)
-		    c2[1] = 3;
-		else if (pMse->resolution >= 100)
+		unsigned char c2[2];
+		
+		c = 0xE6;	/*230*/	/* 1:1 scaling */
+		if (!ps2SendPacket(pInfo,&c,1)) {
+		    if (!count--)
+			return TRUE;
+		    goto REDO;
+		}
+		c2[0] = 0xF3; /*243*/ /* set sampling rate */
+		if (pMse->sampleRate > 0) {
+		    if (pMse->sampleRate >= 200)
+			c2[1] = 200;
+		    else if (pMse->sampleRate >= 100)
+			c2[1] = 100;
+		    else if (pMse->sampleRate >= 80)
+			c2[1] = 80;
+		    else if (pMse->sampleRate >= 60)
+			c2[1] = 60;
+		    else if (pMse->sampleRate >= 40)
+			c2[1] = 40;
+		    else
+			c2[1] = 20;
+		} else {
+		    c2[1] = 100;
+		}
+		if (!ps2SendPacket(pInfo,c2,2)) {
+		    if (!count--)
+			return TRUE;
+		    goto REDO;
+		}
+		c2[0] = 0xE8; /*232*/	/* set device resolution */
+		if (pMse->resolution > 0) {
+		    if (pMse->resolution >= 200)
+			c2[1] = 3;
+		    else if (pMse->resolution >= 100)
+			c2[1] = 2;
+		    else if (pMse->resolution >= 50)
+			c2[1] = 1;
+		    else
+			c2[1] = 0;
+		} else {
 		    c2[1] = 2;
-		else if (pMse->resolution >= 50)
-		    c2[1] = 1;
-		else
-		    c2[1] = 0;
-	    } else {
-		c2[1] = 2;
+		}
+		if (!ps2SendPacket(pInfo,c2,2)) {
+		    if (!count--)
+			return TRUE;
+		    goto REDO;
+		}
+		usleep(30000);
+		xf86FlushInput(pInfo->fd);
+		if (!ps2EnableDataReporting(pInfo)) {
+		    xf86Msg(X_INFO, "%s: ps2EnableDataReporting: failed\n",
+			    pInfo->name);
+		    xf86FlushInput(pInfo->fd);
+		    if (!count--)
+			return TRUE;
+		    goto REDO;
+		} else {
+		    xf86Msg(X_INFO, "%s: ps2EnableDataReporting: succeeded\n",
+			    pInfo->name);
+		}
 	    }
-	    xf86WriteSerial(pInfo->fd, c2, 2);
+	    /*
+	     * The PS/2 reset handling needs to be rechecked.
+	     * We need to wait until after the 4.3 release.
+	     */
+	}
+    } else {
+	if (paramlen > 0) {
+	    if (xf86WriteSerial(pInfo->fd, param, paramlen) != paramlen)
+		xf86Msg(X_ERROR, "%s: Mouse initialization failed\n",
+			pInfo->name);
 	    usleep(30000);
 	    xf86FlushInput(pInfo->fd);
-	    do {
-	      if (!ps2EnableDataReporting(pInfo)) {
-                ErrorF("failed\n");
-		xf86FlushInput(pInfo->fd);
-	      } else {
-                ErrorF("succeeded\n");
-		break;
-              }
-	    } while (count --);
 	}
     }
+
     return TRUE;
 }
 
diff --git a/xc/programs/Xserver/hw/xfree86/input/mouse/mouse.man b/xc/programs/Xserver/hw/xfree86/input/mouse/mouse.man
index f48f16d70..6dcf0f0b6 100644
--- a/xc/programs/Xserver/hw/xfree86/input/mouse/mouse.man
+++ b/xc/programs/Xserver/hw/xfree86/input/mouse/mouse.man
@@ -1,4 +1,4 @@
-.\" $XFree86: xc/programs/Xserver/hw/xfree86/input/mouse/mouse.man,v 1.3 2001/08/06 21:13:19 dawes Exp $ 
+.\" $XFree86: xc/programs/Xserver/hw/xfree86/input/mouse/mouse.man,v 1.5 2002/12/17 20:55:21 dawes Exp $ 
 .\" shorthand for double quote that works everywhere.
 .ds q \N'34'
 .TH MOUSE __drivermansuffix__ __vendorversion__
@@ -156,7 +156,28 @@ and
 Default: no mapping.
 .TP 7
 .BI "Option \*qFlipXY\*q \*q" boolean \*q
-Enable/disable swapping the X and Y axes.  Default: off.
+Enable/disable swapping the X and Y axes.  This transformation is applied
+after the
+.BR InvX ,
+.B InvY
+and
+.BR AngleOffset
+transformations.  Default: off.
+.TP 7
+.BI "Option \*qInvX\*q \*q" boolean \*q
+Invert the X axis.  Default: off.
+.TP 7
+.BI "Option \*qInvY\*q \*q" boolean \*q
+Invert the Y axis.  Default: off.
+.TP 7
+.BI "Option \*qAngleOffset\*q \*q" integer \*q
+Specify a clockwise angular offset (in degrees) to apply to the pointer
+motion.  This transformation is applied before the
+.BR FlipXY ,
+.B InvX
+and
+.B InvY
+transformations.  Default: 0.
 .TP 7
 .BI "Option \*qSampleRate\*q \*q" integer \*q
 Sets the number of motion/button events the mouse sends per second.  Setting
@@ -169,6 +190,18 @@ Sets the resolution of the device in counts per inch.  Setting this is
 only supported for some mice, including some PS/2 mice on some platforms.
 Default: whatever the mouse is already set to.
 .TP 7
+.BI "Option \*qDragLockButtons\*q \*q" "L1 B2 L3 B4" \*q
+Sets \*qdrag lock buttons\*q that simulate holding a button down, so
+that low dexterity people do not have to hold a buttton down at the
+same time they move a mouse cursor. Button numbers occur in pairs,
+with the lock button number occurring first, followed by the button
+number that is the target of the lock button.
+.TP 7
+.BI "Option \*qDragLockButtons\*q \*q" "M1" \*q
+Sets a \*qmaster drag lock button\*q that acts as a \*qMeta Key\*q
+indicating that the next button pressed is to be 
+\*qdrag locked\*q.
+.TP 7
 .BI "Option \*qClearDTR\*q \*q" boolean \*q
 Enable/disable clearing the DTR line on the serial port used by the mouse.
 Some dual-protocol mice require the DTR line to be cleared to operate
diff --git a/xc/programs/Xserver/hw/xfree86/input/mouse/pnp.c b/xc/programs/Xserver/hw/xfree86/input/mouse/pnp.c
index 6adb50718..a5e650d75 100644
--- a/xc/programs/Xserver/hw/xfree86/input/mouse/pnp.c
+++ b/xc/programs/Xserver/hw/xfree86/input/mouse/pnp.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/input/mouse/pnp.c,v 1.13 2002/09/16 18:06:08 eich Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/input/mouse/pnp.c,v 1.16 2003/02/04 15:21:18 eich Exp $ */
 /*
  * Copyright 1998 by Kazutaka YOKOTA <yokota@zodiac.mech.utsunomiya-u.ac.jp>
  *
@@ -134,7 +134,7 @@ static const char *pnpSerial[] = {
 
 static int pnpgets(InputInfoPtr, char *, Bool *prePNP);
 static int pnpparse(InputInfoPtr, pnpid_t *, char *, int);
-static Bool prepnpparse(InputInfoPtr pInfo, char *buf);
+static int prepnpparse(InputInfoPtr pInfo, char *buf);
 static symtab_t *pnpproto(pnpid_t *);
 static symtab_t *gettoken(symtab_t *, char *, int);
 static MouseProtocolID getPs2ProtocolPnP(InputInfoPtr pInfo);
@@ -334,7 +334,7 @@ pnpgets(InputInfoPtr pInfo, char *buf, Bool *prePNP)
 	/* we haven't seen `Begin ID' in time... */
 	goto connect_idle;
     }
-    if (prePNP)
+    if (*prePNP)
 	return i;
     
     ++c;			/* make it `End ID' */
@@ -491,7 +491,7 @@ pnpparse(InputInfoPtr pInfo, pnpid_t *id, char *buf, int len)
 }
 
 /* We can only identify MS at the moment */
-static Bool
+static int
 prepnpparse(InputInfoPtr pInfo, char *buf)
 {
     if (buf[0] == 'M' && buf[1] == '3')
@@ -567,11 +567,18 @@ readMouse(InputInfoPtr pInfo, unsigned char *u)
     return TRUE;
 }
 
+static void
+ps2DisableWrapMode(InputInfoPtr pInfo)
+{
+    unsigned char reset_wrap_mode[] = { 0xEC };
+    ps2SendPacket(pInfo, reset_wrap_mode, sizeof(reset_wrap_mode));
+}
+
 Bool
 ps2SendPacket(InputInfoPtr pInfo, unsigned char *bytes, int len)
 {
     unsigned char c;
-    int i;
+    int i,j;
     
 #ifdef DEBUG
     xf86ErrorF("Ps/2 data package:");
@@ -581,18 +588,36 @@ ps2SendPacket(InputInfoPtr pInfo, unsigned char *bytes, int len)
 #endif
 
     for (i = 0; i < len; i++) {
-	xf86WriteSerial(pInfo->fd, bytes + i, 1);
-	usleep(10000);
-	if (!readMouse(pInfo,&c)) {
+	for (j = 0; j < 10; j++) {
+	    xf86WriteSerial(pInfo->fd, bytes + i, 1);
+	    usleep(10000);
+	    if (!readMouse(pInfo,&c)) {
 #ifdef DEBUG
-	    xf86ErrorF("sending 0x%x to PS/2 unsuccessful\n",*(bytes + i));
+		xf86ErrorF("sending 0x%x to PS/2 unsuccessful\n",*(bytes + i));
 #endif
-	    return FALSE;
-	}
+		return FALSE;
+	    }
 #ifdef DEBUG
-	xf86ErrorF("Recieved: 0x%x\n",c);
+	    xf86ErrorF("Recieved: 0x%x\n",c);
 #endif
-	if (c != 0xFA)
+	    if (c == 0xFA) /* ACK */
+		break;
+
+	    if (c == 0xFE) /* resend */
+		continue;
+	    
+
+	    if (c == 0xFC) /* error */
+		return FALSE;
+
+	    /* Some mice accidently enter wrap mode during init */
+	    if (c == *(bytes + i)    /* wrap mode */
+		&& (*(bytes + i) != 0xEC)) /* avoid recursion */
+		ps2DisableWrapMode(pInfo);
+
+	    return FALSE;
+	}
+	if (j == 10)
 	    return FALSE;
     }
     
diff --git a/xc/programs/Xserver/hw/xfree86/input/palmax/Imakefile b/xc/programs/Xserver/hw/xfree86/input/palmax/Imakefile
new file mode 100644
index 000000000..f1fb7b70c
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/input/palmax/Imakefile
@@ -0,0 +1,30 @@
+XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/input/palmax/Imakefile,v 1.1 2002/11/22 03:40:22 dawes Exp $
+
+#define IHaveModules
+#include <Server.tmpl>
+
+SRCS = xf86Palmax.c
+OBJS = xf86Palmax.o
+
+DRIVER = palmax
+
+INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86SRC)/loader -I$(XF86OSSRC) \
+       -I$(SERVERSRC)/include -I$(SERVERSRC)/mi -I$(XINCLUDESRC) -I$(EXTINCSRC)
+
+#if MakeHasPosixVariableSubstitutions
+SubdirLibraryRule($(OBJS))
+#endif
+
+ModuleObjectRule()
+
+ObjectModuleTarget($(DRIVER),$(OBJS))
+
+InstallObjectModule($(DRIVER),$(MODULEDIR),input)
+
+#if !defined(XF86DriverSDK)
+InstallModuleManPage($(DRIVER))
+#endif
+
+DependTarget()
+
+InstallDriverSDKObjectModule($(DRIVER),$(DRIVERSDKMODULEDIR),input)
diff --git a/xc/programs/Xserver/hw/xfree86/input/palmax/palmax.man b/xc/programs/Xserver/hw/xfree86/input/palmax/palmax.man
new file mode 100644
index 000000000..33d2dca5a
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/input/palmax/palmax.man
@@ -0,0 +1,88 @@
+.\" $XFree86: xc/programs/Xserver/hw/xfree86/input/palmax/palmax.man,v 1.1 2002/11/22 03:40:22 dawes Exp $
+.\" shorthand for double quote that works everywhere.
+.ds q \N'34'
+.TH PALMAX __drivermansuffix__ __vendorversion__
+.SH NAME
+palmax \- Palmax (TR88L803) touchscreen driver
+.SH SYNOPSIS
+.B "Section \*qInputDevice\*q"
+.br
+.BI "  Identifier \*q" idevname \*q
+.br
+.B  "  Driver \*qpalmax\*q"
+.br
+.BI "  Option \*qDevice\*q   \*q" devpath \*q
+.br
+\ \ ...
+.br
+.B EndSection
+.SH DESCRIPTION
+.B palmax
+is an XFree86 input driver for the Palmax PD1000/PD1100
+.PP
+The
+.B palmax
+driver functions as a pointer input device, and is normally used as the
+X server's core pointer. It supports positioning and mouse buttons using 
+the touchscreen display and lid buttons on the Palmax machines.
+.SH SUPPORTED HARDWARE
+Palmax PD1000, Palmax PD1100. In theory also any other system using a
+TR88L803 wired to a serial port.
+.SH CONFIGURATION DETAILS
+Please refer to XF86Config(__filemansuffix__) for general configuration
+details and for options that can be used with all input drivers.  This
+section only covers configuration details specific to this driver.
+.PP
+The following driver
+.B options
+are supported
+.TP
+.BI "Option \*qMinX\*q \*q" integer \*q
+Set the left hand X value from the touchscreen, for calibration.
+.TP
+.BI "Option \*qMaxX\*q \*q" integer \*q
+Set the right hand X value from the touchscreen, for calibration.
+.TP
+.BI "Option \*qMinY\*q \*q" integer \*q
+Set the top Y value from the touchscreen, for calibration.
+.TP
+.BI "Option \*qMaxY\*q \*q" integer \*q
+Set the bottom Y value from the touchscreen, for calibration.
+.TP
+.BI "Option \*qScreen\*q \*q" integer \*q
+The screen to attach to the touchscreen when running with multiple screens. 
+The default is screen 0.
+.TP
+.BI "Option \*qDevice\*q \*q" string \*q
+The serial port that is attached to the touchscreen interface. On the Palmax
+PD1000 and PD1100 this is ttyS0.
+.TP
+.BI "Option \*qDeviceName\*q \*q" string \*q
+Set the X11 device name for the touchscreen. This defaults to TOUCHSCREEN.
+.TP
+.BI "Option \*qPortraitMode\*q \*q" string \*q
+Set the display orientation. The default is "landscape" but you can rotate
+the screen clockwise ("portrait") or anticlockwise ("portraitCCW").
+.TP
+.BI "Option \*qSwapXY\*q \*q" boolean \*q
+Swap the X and Y values on the display. The default is false.
+.TP
+.BI "Option \*qTapButton\*q \*q" boolean \*q
+Set the touchscreen tap to act as mouse button 1. This allows single handed
+operation except when using the menu buttons. The default is false.
+.SH "BUGS"
+The driver has been tested on the Palmax systems, the defaults reflect the
+Palmax hardware and should work out of the box. No testing has been done on
+other systems using the same digitizer.
+.PP
+Support for a double-tap menu button option would be nice.
+.PP
+The smoothing algorithm would benefit from real mathematics.
+.PP
+XFree86 needs a nice calibration tool.
+.PP
+.SH "SEE ALSO"
+XFree86(1), XF86Config(__filemansuffix__), xf86config(1), Xserver(1), X(__miscmansuffix__).
+.SH AUTHORS
+Authors include...
+ Alan Cox
diff --git a/xc/programs/Xserver/hw/xfree86/input/palmax/xf86Palmax.c b/xc/programs/Xserver/hw/xfree86/input/palmax/xf86Palmax.c
new file mode 100644
index 000000000..b7728d476
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/input/palmax/xf86Palmax.c
@@ -0,0 +1,822 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/input/palmax/xf86Palmax.c,v 1.1 2002/11/22 03:40:22 dawes Exp $ */
+
+#include "misc.h"
+#include "xf86.h"
+#include "xf86_OSproc.h"
+#include "xf86Xinput.h"
+#include "exevents.h"
+#include "os.h"
+
+#ifdef XFree86LOADER
+#include "xf86Module.h"
+#endif
+
+/*
+ ***************************************************************************
+ *
+ * Default constants.
+ *
+ ***************************************************************************
+ */
+
+#define DEFAULT_MAX_X		63104
+#define DEFAULT_MIN_X		8786
+#define DEFAULT_MAX_Y		61592
+#define DEFAULT_MIN_Y		7608
+                              
+#define XI_STYLUS		"TOUCHSCREEH"	/* X device name for the stylus device	*/
+
+
+/*
+ ***************************************************************************
+ *
+ * Protocol constants.
+ *
+ ***************************************************************************
+ */
+
+#define PMX_REPORT_SIZE		3	/* Size of a report packet.			*/
+#define PMX_BUFFER_SIZE		256	/* Size of input buffer.			*/
+#define PMX_PACKET_SIZE		5	/* Maximum size of a command/reply *including*	*/
+
+static const char *reqSymbols[] = {
+	"AddEnabledDevice",
+	"ErrorF",
+	"InitButtonClassDeviceStruct",
+	"InitProximityClassDeviceStruct",
+	"InitValuatorAxisStruct",
+	"InitValuatorClassDeviceStruct",
+	"InitPtrFeedbackClassDeviceStruct",
+	"RemoveEnabledDevice",
+	"Xcalloc",
+	"Xfree",
+	"XisbBlockDuration",
+	"XisbFree",
+	"XisbNew",
+	"XisbRead",
+	"XisbTrace",
+	"screenInfo",
+	"xf86AddInputDriver",
+	"xf86AllocateInput",
+	"xf86CloseSerial",
+	"xf86CollectInputOptions",
+	"xf86ErrorFVerb",
+	"xf86FindOptionValue",
+	"xf86GetMotionEvents",
+	"xf86GetVerbosity",
+	"xf86MotionHistoryAllocate",
+	"xf86NameCmp",
+	"xf86OpenSerial",
+	"xf86OptionListCreate",
+	"xf86OptionListMerge",
+	"xf86OptionListReport",
+	"xf86PostButtonEvent",
+	"xf86PostMotionEvent",
+	"xf86PostProximityEvent",
+	"xf86ProcessCommonOptions",
+	"xf86ScaleAxis",
+	"xf86SetIntOption",
+	"xf86SetStrOption",
+	"xf86XInputSetScreen",
+	"xf86XInputSetSendCoreEvents",
+	NULL
+};
+
+					/* the leading and trailing bytes.		*/
+
+/*
+ ***************************************************************************
+ *
+ * Device private records.
+ *
+ ***************************************************************************
+ */
+
+typedef struct _PMXPrivateRec {
+  char			*input_dev;	/* The touchscreen input tty			*/
+  OsTimerPtr		uptimer;	/* Timeout on stream				*/
+  OsTimerPtr		polltimer;	/* Button poll timer				*/
+  int			min_x;		/* Minimum x reported by calibration		*/
+  int			max_x;		/* Maximum x					*/
+  int			min_y;		/* Minimum y reported by calibration		*/
+  int			max_y;		/* Maximum y					*/
+  int			cur_x;		/* Current x					*/
+  int			cur_y;		/* Current y					*/
+  int			button1;	/* True if finger button 1 is down		*/
+  int 			button2;	/* True if finger button 2 is down		*/
+  int			button3;	/* 1 if button3 down, 2 on wait for up		*/
+  int			screen_no;	/* Screen associated with the device		*/
+  int			screen_width;	/* Width of the associated X screen		*/
+  int			screen_height;	/* Height of the screen				*/
+  Bool			inited;		/* The controller has already been configured ?	*/
+  char			state;		/* Current state of report flags.		*/
+  int			num_old_bytes;	/* Number of bytes left in receive buffer.	*/
+  LocalDevicePtr	stylus;		/* Stylus device ptr associated with the hw.	*/
+  int			swap_axes;	/* Swap X an Y axes if != 0 */
+  int			tap_button;	/* Tapping is button 0 */
+  unsigned char		rec_buf[PMX_BUFFER_SIZE]; /* Receive buffer.			*/
+} PMXPrivateRec, *PMXPrivatePtr;
+
+
+/*
+ ***************************************************************************
+ *
+ * xf86PmxConvert --
+ *	Convert extended valuators to x and y suitable for core motion
+ *	events. Return True if ok and False if the requested conversion
+ *	can't be done for the specified valuators.
+ *
+ ***************************************************************************
+ */
+static Bool xf86PmxConvert(LocalDevicePtr local, int first, int num,
+		int v0,int v1,int v2,int v3, int v4, int v5, int *x, int *y)
+{
+	PMXPrivatePtr	priv = (PMXPrivatePtr) local->private;
+	int width = priv->max_x - priv->min_x;
+	int height = priv->max_y - priv->min_y;
+	int input_x, input_y;
+	int tmp;
+
+	input_x = v0;
+	input_y = v1;
+  
+	if (priv->swap_axes) {
+		tmp = input_x;
+		input_x = input_y;
+		input_y = tmp;
+	}
+	*x = (priv->screen_width * (input_x - priv->min_x)) / width;
+	*y = (priv->screen_height * (input_y - priv->min_y)) / height;
+	/*
+	 * Need to check if still on the correct screen.
+	 * This call is here so that this work can be done after
+	 * calib and before posting the event.
+	 */
+	xf86XInputSetScreen(local, priv->screen_no, *x, *y);
+	return TRUE;
+}
+
+
+/*
+ *	Unpack a two byte code from the Palmax touchscreen 
+ */
+
+static int unpack(unsigned int v1, unsigned int v2)
+{
+	/* Actually v1 lower 6 bits are not used */
+	return (v2 << 8) | (v1);
+}
+
+static CARD32 PalmaxUpTimeout(OsTimerPtr timer, CARD32 now, pointer arg)
+{
+	PMXPrivatePtr priv = arg;
+	if(priv->state)
+	{
+		int sigstate = xf86BlockSIGIO ();
+		/* Post a button up event */
+		xf86PostButtonEvent(priv->stylus->dev, TRUE, 1, 0,
+			0, 2, priv->cur_x >> 4, priv->cur_y >> 4);
+		priv->state = 0;
+		xf86UnblockSIGIO (sigstate);
+	}
+	return 0;
+}
+
+/*
+ *	Poll the Palmax finger buttons ten times a second
+ */
+
+static CARD32 PalmaxPollTimeout(OsTimerPtr timer, CARD32 now, pointer arg)
+{
+	LocalDevicePtr local = (LocalDevicePtr) arg;
+	PMXPrivatePtr priv = (PMXPrivatePtr)(local->private);
+	int modembits;
+	int button1 = 0, button2 = 0;
+	int sigstate = xf86BlockSIGIO ();
+
+	modembits = xf86GetSerialModemState(local->fd);	
+	
+	if (modembits & XF86_M_CTS) 
+		button1 = 1;
+		
+	if (modembits & XF86_M_DSR)
+		button2 = 1;
+		
+	/*
+	 *	Check for chording for "middle" button
+	 */
+	if(button1 == 1 && button2 == 1 && priv->button1 == 0 && priv->button2 == 0)
+	{
+		if(!priv->button3)
+		{
+			/* Middle button emulation - down */
+			xf86PostButtonEvent(priv->stylus->dev, TRUE, 3, 1,
+				0, 2, priv->cur_x >> 4, priv->cur_y >> 4);
+			priv->button3 = 1;
+		}
+	}
+	
+	/*
+	 *	Check if we are chording and haven't yet released
+	 *	both buttons
+	 */
+	if(priv->button3 && (button1 == 0 || button2 == 0))
+	{
+		if(priv->button3 != 2)
+		{
+			/* Middle button emulation - up */
+			xf86PostButtonEvent(priv->stylus->dev, TRUE, 3, 0,
+				0, 2, priv->cur_x >> 4, priv->cur_y >> 4);
+			priv->button3 = 2;
+		}
+		/*
+		 *	Wait for both buttons to go up
+		 */
+		if(button1 || button2)
+			goto out;
+		priv->button3 = 0;
+	}
+	if(button1 != priv->button1)
+	{		
+		xf86PostButtonEvent(priv->stylus->dev, TRUE, 1, button1,
+			0, 2, priv->cur_x >> 4, priv->cur_y >> 4);
+		priv->button1 = button1;
+	}
+	if(button2 != priv->button2)
+	{		
+		xf86PostButtonEvent(priv->stylus->dev, TRUE, 2, button2,
+			0, 2, priv->cur_x >> 4, priv->cur_y >> 4);
+		priv->button2 = button2;
+	}
+
+out:	
+	xf86UnblockSIGIO (sigstate);
+	return 100;
+}
+	
+/*
+ ***************************************************************************
+ *
+ * xf86PmxReadInput --
+ *	Read a buffer full of input from the touchscreen and enqueue
+ *	all report packets found in it.
+ *	The routine can work with any of the two X device structs associated
+ *	with the touchscreen. It is always possible to find the relevant
+ *	informations and to emit the events for both devices if provided
+ *	with one of the two structs. This point is relevant only if the
+ *	two devices are actives at the same time.
+ *
+
+ ***************************************************************************
+ */
+static void xf86PmxReadInput(LocalDevicePtr local)
+{
+	PMXPrivatePtr		priv = (PMXPrivatePtr)(local->private);
+	int cur_x, cur_y;
+	int state;
+	int num_bytes;
+	int bytes_in_packet;
+	unsigned char *ptr, *start_ptr;
+	int report_size = 3;
+  
+	/*
+	 * Try to get a buffer full of report packets.
+	 */
+
+	num_bytes = xf86ReadSerial(local->fd, (char *) (priv->rec_buf + priv->num_old_bytes),
+			   PMX_BUFFER_SIZE - priv->num_old_bytes);
+	if (num_bytes < 0) {
+		Error("System error while reading from Palmax touchscreen.");
+		return;
+	}
+
+	num_bytes += priv->num_old_bytes;
+	ptr = priv->rec_buf;
+	bytes_in_packet = 0;
+	start_ptr = ptr;
+
+	while (num_bytes >= report_size) 
+	{
+		/*
+		 * Skip bytes until we hit a header (FE/FF)
+		 */
+		 
+		switch(bytes_in_packet)
+		{
+			case 0:
+				if(ptr[0] != 0xFF)
+					start_ptr++;
+				else
+					bytes_in_packet++;
+				break;
+			case 1:
+				if(ptr[0] == 0xFE)
+					report_size = 3;
+				else
+					report_size = 5;
+				bytes_in_packet++;
+				break;
+			default:
+				bytes_in_packet++;
+				break;
+		}
+		num_bytes--;
+		ptr++;
+
+		if (bytes_in_packet == report_size) 
+		{
+			/*
+			 * First stick together the various pieces.
+			 */
+
+			if(priv->uptimer)
+			{
+				TimerFree(priv->uptimer);
+				priv->uptimer = NULL;
+			}
+			
+			state = 1;
+			if(start_ptr[1] == 0xFE)
+				state = 0;
+			else
+			{
+				int new_x = unpack(start_ptr[1], start_ptr[2]);
+				int new_y = unpack(start_ptr[3], start_ptr[4]);
+				int shift = abs(new_x - (priv->cur_x >> 4));
+				shift += abs(new_y - (priv->cur_y >> 4));
+				
+				if(shift < 1400)
+				{
+					/* We work to a base of 16 times the pointer, and do smoothing */
+					cur_y = ((priv->cur_y * 15) >> 4) + new_y;
+					cur_x = ((priv->cur_x * 15) >> 4) + new_x;
+				}
+				else if(shift < 3000)
+				{
+					/* We work to a base of 16 times the pointer, and do smoothing */
+					cur_y = ((priv->cur_y * 7) >> 3) + (new_y << 1);
+					cur_x = ((priv->cur_x * 7) >> 3) + (new_x << 1);
+				}
+				else if(shift < 6000)
+				{
+					/* We work to a base of 16 times the pointer, and do smoothing */
+					cur_y = ((priv->cur_y * 3) >> 2) + (new_y << 2);
+					cur_x = ((priv->cur_x * 3) >> 2) + (new_x << 2);
+					/* Supress button change until the jitter filter has kicked in */
+					state = priv->state;
+				}
+				else
+				{
+					cur_y = new_y << 4;
+					cur_x = new_x << 4;
+					/* Supress button change until the jitter filter has kicked in */
+					state = priv->state;
+				}
+				xf86PostMotionEvent(priv->stylus->dev, TRUE, 0, 2, cur_x >> 4, cur_y >> 4);
+				priv->cur_x = cur_x;
+				priv->cur_y = cur_y;
+			}
+	      
+			start_ptr = ptr;
+			bytes_in_packet = 0;
+      
+			/*
+			 * Emit a button press or release.
+			 */
+			if (state != priv->state && priv->tap_button) 
+			{
+				/* Post the event, or in the first button since both may 
+				   impact the value */
+				xf86PostButtonEvent(priv->stylus->dev, TRUE, 1, state|priv->button1,
+					0, 2, priv->cur_x >> 4, priv->cur_y >> 4);
+				priv->state = state;
+				if(state == 1)
+					priv->uptimer = TimerSet(priv->uptimer, 0, 100, PalmaxUpTimeout, priv);
+			}
+		}
+	}
+
+	/*
+	 * If some bytes are left in the buffer, pack them at the
+	 * beginning for the next turn.
+	 */
+	if (num_bytes != 0) {
+		memcpy(priv->rec_buf, ptr, num_bytes);
+		priv->num_old_bytes = num_bytes;
+	}
+	else
+	{
+		priv->num_old_bytes = 0;
+	}
+}
+
+
+static void PMXPtrCtrl(DeviceIntPtr device, PtrCtrl *ctrl)
+{
+	/* I have no clue what this does, except that registering it stops the 
+	   X server segfaulting in ProcGetPointerMapping()
+	   Ho Hum.
+	*/
+}
+
+/*
+ ***************************************************************************
+ *
+ * xf86PmxControl --
+ *
+ ***************************************************************************
+ */
+static Bool
+xf86PmxControl(DeviceIntPtr	dev,
+	       int		mode)
+{
+	static unsigned char map[] = { 0, 1, 3, 2};
+	LocalDevicePtr local = (LocalDevicePtr) dev->public.devicePrivate;
+	PMXPrivatePtr priv = (PMXPrivatePtr)(local->private);
+	
+	switch(mode)
+	{
+
+	case DEVICE_INIT:
+		if (priv->screen_no >= screenInfo.numScreens || priv->screen_no < 0) {
+			priv->screen_no = 0;
+		}
+		priv->screen_width = screenInfo.screens[priv->screen_no]->width;
+		priv->screen_height = screenInfo.screens[priv->screen_no]->height;
+
+		/*
+		 * Device reports button press for up to 3 buttons.
+		 */
+		if (InitButtonClassDeviceStruct(dev, 3, map) == FALSE) {
+			ErrorF("Unable to allocate ButtonClassDeviceStruct\n");
+			return !Success;
+		}
+      	
+		/*
+		 * Device reports motions on 2 axes in absolute coordinates.
+		 * Axes min and max values are reported in raw coordinates.
+		 * Resolution is computed roughly by the difference between
+		 * max and min values scaled from the approximate size of the
+		 * screen to fit one meter.
+		 */
+	
+		if (InitValuatorClassDeviceStruct(dev, 2, xf86GetMotionEvents,
+				local->history_size, Absolute) == FALSE) {
+			ErrorF("Unable to allocate ValuatorClassDeviceStruct\n");
+			return !Success;
+		}
+		else
+		{
+			InitValuatorAxisStruct(dev, 0, priv->min_x, priv->max_x,
+				       65535,
+				       0     /* min_res */,
+				       65535  /* max_res */);
+			InitValuatorAxisStruct(dev, 1, priv->min_y, priv->max_y,
+				       65535,	/* resolution */
+				       0     /* min_res */,
+				       65535 /* max_res */);
+		}
+	      
+		if (InitFocusClassDeviceStruct(dev) == FALSE) {
+			ErrorF("Unable to allocate FocusClassDeviceStruct\n");
+		}
+		
+		if(InitPtrFeedbackClassDeviceStruct(dev, PMXPtrCtrl) == FALSE) {
+			ErrorF("Unable to allocate PtrFeedBackClassDeviceStruct\n");
+		}
+	      
+		/*
+		 * Allocate the motion events buffer.
+		 */
+
+		xf86MotionHistoryAllocate(local);
+      
+		return Success;
+    
+	case DEVICE_ON:
+		if (local->fd < 0) {
+			local->fd = xf86OpenSerial(local->options);
+			if (local->fd < 0) {
+				Error("Unable to open Palmax touchscreen device");
+				return !Success;
+			}
+			AddEnabledDevice(local->fd);
+		}
+		priv->polltimer = TimerSet(priv->polltimer, 0, 100, PalmaxPollTimeout, local);
+
+		dev->public.on = TRUE; 
+		return Success;
+      
+	case DEVICE_OFF:
+		if(priv->polltimer)
+		{
+			TimerFree(priv->polltimer);
+			priv->polltimer = NULL;
+		}
+		dev->public.on = FALSE;
+		return Success;
+    
+	case DEVICE_CLOSE:
+		dev->public.on = FALSE;
+		if(priv->uptimer)
+		{
+			TimerFree(priv->uptimer);
+			priv->uptimer = NULL;
+		}
+		if (local->fd >= 0) {
+			xf86RemoveEnabledDevice(local);
+			xf86CloseSerial(local->fd);
+			local->fd = -1;
+		}
+		return Success;
+	default:
+		ErrorF("unsupported mode=%d\n", mode);
+		return !Success;
+	}
+}
+
+/*
+ ***************************************************************************
+ *
+ * xf86PmxControlProc --
+ *
+ ***************************************************************************
+ */
+ 
+static int xf86PmxControlProc (InputInfoPtr pInfo, xDeviceCtl * control)
+{
+#if 0
+	xDeviceTSCalibrationCtl *c = (xDeviceTSCalibrationCtl *) control;
+	PMXPrivatePtr priv = (PMXPrivatePtr) (pInfo->private);
+        priv->min_x = c->min_x;
+        priv->max_x = c->max_x;
+        priv->min_y = c->min_y;
+        priv->max_y = c->max_y;
+#endif 
+	return (Success);
+}
+
+/*
+ ***************************************************************************
+ *
+ * xf86PmxAllocate --
+ *
+ ***************************************************************************
+ */
+static LocalDevicePtr xf86PmxAllocate(InputDriverPtr drv, char *name, char *type_name, int flag)
+{
+	LocalDevicePtr local = xf86AllocateInput(drv, 0);
+	PMXPrivatePtr priv = (PMXPrivatePtr) xalloc(sizeof(PMXPrivateRec));
+  
+	if (!local || !priv)
+	{
+		if(priv)
+			xfree(priv);
+		if(local)
+			xfree(local);
+		return NULL;
+	}
+
+	priv->input_dev = strdup("/dev/ttyS0");
+	priv->min_x = 0;
+	priv->max_x = 0;
+	priv->min_y = 0;
+	priv->max_y = 0;
+	priv->screen_no = 0;
+	priv->screen_width = -1;
+	priv->screen_height = -1;
+	priv->inited = 0;
+	priv->state = 0;
+	priv->num_old_bytes = 0;
+	priv->swap_axes = 0;
+	priv->tap_button = 0;
+	priv->uptimer = NULL;
+	priv->polltimer = NULL;
+	priv->button1 = 0;
+	priv->button2 = 0;
+  
+	local->name = name;
+	local->flags = 0 /* XI86_NO_OPEN_ON_INIT */;
+	local->device_control = xf86PmxControl;
+	local->read_input = xf86PmxReadInput;
+	local->control_proc = xf86PmxControlProc;
+	local->close_proc = NULL;
+	local->switch_mode = NULL;
+	local->conversion_proc = xf86PmxConvert;
+	local->reverse_conversion_proc = NULL;
+	local->fd = -1;
+	local->atom = 0;
+	local->dev = NULL;
+	local->private = priv;
+	local->private_flags = flag;
+	local->type_name = type_name;
+	local->history_size = 0;
+  
+	return local;
+}
+
+
+/*
+ ***************************************************************************
+ *
+ * xf86PmxAllocateStylus --
+ *
+ ***************************************************************************
+ */
+static LocalDevicePtr xf86PmxAllocateStylus(InputDriverPtr drv)
+{
+	LocalDevicePtr local = xf86PmxAllocate(drv, XI_STYLUS, "Palmax Stylus", 1);
+	if (local)
+		((PMXPrivatePtr) local->private)->stylus = local;
+	return local;
+}
+
+
+static void xf86PmxUninit(InputDriverPtr drv, LocalDevicePtr local, int flags)
+{
+	PMXPrivatePtr priv = (PMXPrivatePtr) local->private;
+  
+	xf86PmxControl(local->dev, DEVICE_OFF);
+
+	if (priv) {
+		priv->stylus->private = NULL;
+		xfree(priv->input_dev);
+		xfree(priv);
+	}
+	xfree(local->name);
+	xfree(local);
+
+	xf86DeleteInput(local, 0);
+}
+
+static const char *default_options[] = {
+	"BaudRate", "19200",
+	"StopBits", "1",
+	"DataBits", "8",
+	"Parity", "None",
+	"Vmin", "1",
+	"Vtime", "1",
+	"FlowControl", "None",
+	NULL
+};
+
+static InputInfoPtr xf86PmxInit(InputDriverPtr drv, IDevPtr dev, int flags)
+{
+	LocalDevicePtr local=NULL, fake_local=NULL;
+	PMXPrivatePtr priv=NULL;
+	char *str;
+	int portrait=0;
+
+	fake_local = (LocalDevicePtr) xcalloc(1, sizeof(LocalDeviceRec));
+	if (!fake_local) {
+		goto init_err;
+	}
+	fake_local->conf_idev = dev;
+  
+	xf86CollectInputOptions(fake_local, default_options, NULL);
+
+	local = xf86PmxAllocateStylus(drv);
+	priv = local->private;
+	local->options = fake_local->options;
+	local->conf_idev = fake_local->conf_idev;
+	xfree(fake_local);
+	fake_local = NULL;
+  
+	str = xf86FindOptionValue(local->options, "Device");
+	if (!str) {
+		xf86Msg(X_ERROR, "%s: No Device specified in Palmax module config.\n", dev->identifier);
+		goto init_err;
+	}
+	priv->input_dev = strdup(str);
+	priv->stylus = local;
+
+	/* Process the common options. */
+	xf86ProcessCommonOptions(local, local->options);
+  
+	str = xf86FindOptionValue(local->options, "DeviceName");
+	if (str) {
+		local->name = strdup(str);
+	}
+	xf86Msg(X_CONFIG, "Palmax X device name: %s\n", local->name);  
+	priv->screen_no = xf86SetIntOption(local->options, "ScreenNo", 0);
+	xf86Msg(X_CONFIG, "Palmax associated screen: %d\n", priv->screen_no);  
+	priv->max_x = xf86SetIntOption(local->options, "MaxX", DEFAULT_MAX_X);
+	xf86Msg(X_CONFIG, "Palmax maximum x position: %d\n", priv->max_x);
+	priv->min_x = xf86SetIntOption(local->options, "MinX", DEFAULT_MIN_X);
+	xf86Msg(X_CONFIG, "Palmax minimum x position: %d\n", priv->min_x);
+	priv->max_y = xf86SetIntOption(local->options, "MaxY", DEFAULT_MAX_Y);
+	xf86Msg(X_CONFIG, "Palmax maximum y position: %d\n", priv->max_y);
+	priv->min_y = xf86SetIntOption(local->options, "MinY", DEFAULT_MIN_Y);
+	xf86Msg(X_CONFIG, "Palmax minimum y position: %d\n", priv->min_y);
+	priv->tap_button = xf86SetBoolOption(local->options, "TapButton", 0);
+	if(priv->tap_button)
+		xf86Msg(X_CONFIG, "Palmax touchpad acts as button\n");
+	priv->swap_axes = xf86SetBoolOption(local->options, "SwapXY", 0);
+	if (priv->swap_axes) {
+		xf86Msg(X_CONFIG, "Palmax %s device will work with X and Y axes swapped\n",
+			local->name);
+	}
+	str = xf86SetStrOption(local->options, "PortraitMode", "Landscape");
+	if (strcmp(str, "Portrait") == 0) {
+		portrait = 1;
+	}
+	else if (strcmp(str, "PortraitCCW") == 0) {
+		portrait = -1;
+	}
+	else if (strcmp(str, "Landscape") != 0) {
+		xf86Msg(X_ERROR, "Palmax portrait mode should be: Portrait, Landscape or PortraitCCW");
+		str = "Landscape";
+	}
+	xf86Msg(X_CONFIG, "Palmax device will work in %s mode\n", str);      
+  
+	if (priv->max_x - priv->min_x <= 0) {
+		xf86Msg(X_INFO, "Palmax: reverse x mode (minimum x position >= maximum x position)\n");
+	}  
+	if (priv->max_y - priv->min_y <= 0) {
+		xf86Msg(X_INFO, "Palmax: reverse y mode (minimum y position >= maximum y position)\n");    
+	}
+
+	if (portrait == 1) {
+		/*
+		 * Portrait Clockwise: reverse Y axis and exchange X and Y.
+		 */
+		int tmp;
+		tmp = priv->min_y;
+		priv->min_y = priv->max_y;
+		priv->max_y = tmp;
+		priv->swap_axes = (priv->swap_axes==0) ? 1 : 0;
+	}
+	else if (portrait == -1) {
+		/*
+		 * Portrait Counter Clockwise: reverse X axis and exchange X and Y.
+		 */
+		int tmp;
+		tmp = priv->min_x;
+		priv->min_x = priv->max_x;
+		priv->max_x = tmp;
+		priv->swap_axes = (priv->swap_axes==0) ? 1 : 0;
+	}
+
+	/* mark the device configured */
+	local->flags |= XI86_CONFIGURED;
+	return local;
+
+init_err:
+	if (fake_local)
+		xfree(fake_local);
+	if (priv) {
+		if (priv->input_dev)
+			xfree(priv->input_dev);
+		xfree(priv);
+	}
+	if (local)
+		xfree(local);
+	return NULL;
+}
+
+#ifdef XFree86LOADER
+static
+#endif
+InputDriverRec PALMAX = {
+	1,			/* driver version */
+	"palmax",		/* driver name */
+	NULL,			/* identify */
+	xf86PmxInit,		/* pre-init */
+	xf86PmxUninit,		/* un-init */
+	NULL,			/* module */
+	0			/* ref count */
+};
+
+#ifdef XFree86LOADER
+static pointer Plug(pointer module, pointer options, int *errmaj,int *errmin)
+{
+	xf86LoaderReqSymLists(reqSymbols, NULL);
+	xf86AddInputDriver(&PALMAX, module, 0);
+	return module;
+}
+
+static void Unplug(pointer p)
+{
+}
+
+static XF86ModuleVersionInfo version_rec = {
+	"palmax",
+	MODULEVENDORSTRING,
+	MODINFOSTRING1,
+	MODINFOSTRING2,
+	XF86_VERSION_CURRENT,
+	1, 0, 0,
+	ABI_CLASS_XINPUT,
+	ABI_XINPUT_VERSION,
+	MOD_CLASS_XINPUT,
+	{ 0, 0, 0, 0 }
+};
+
+/*
+ * This is the entry point in the module. The name
+ * is setup after the pattern <module_name>ModuleData.
+ * Do not change it.
+ */
+XF86ModuleData palmaxModuleData = { &version_rec, Plug, Unplug };
+#endif
+
diff --git a/xc/programs/Xserver/hw/xfree86/input/summa/xf86Summa.c b/xc/programs/Xserver/hw/xfree86/input/summa/xf86Summa.c
index 3147892a2..eb44d759b 100644
--- a/xc/programs/Xserver/hw/xfree86/input/summa/xf86Summa.c
+++ b/xc/programs/Xserver/hw/xfree86/input/summa/xf86Summa.c
@@ -24,7 +24,7 @@
  * PERFORMANCE OF THIS SOFTWARE.
  */
 
-/* $XFree86: xc/programs/Xserver/hw/xfree86/input/summa/xf86Summa.c,v 1.12 2002/10/21 13:33:03 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/input/summa/xf86Summa.c,v 1.13 2003/01/12 03:55:50 tsi Exp $ */
 
 static const char identification[] = "$Identification: 18 $";
 
@@ -1208,11 +1208,11 @@ xf86SumProc(DeviceIntPtr pSum, int what)
  * enagae signal handlers yet.  -huver@amgraf.com mar/12/2001.
 */
 #if 0
-  #ifdef XFREE86_V4
+# ifdef XFREE86_V4
 	    xf86AddEnabledDevice(local);
-  #else
+# else
 	    AddEnabledDevice(local->fd);
-  #endif
+# endif
 #else
 	    AddEnabledDevice(local->fd);
 #endif
@@ -1225,11 +1225,11 @@ xf86SumProc(DeviceIntPtr pSum, int what)
 	    if (! pSum->public.on) break;		/* already off */
 	    if (local->fd >= 0)
 #if 0
-  #ifdef XFREE86_V4
+# ifdef XFREE86_V4
 		    xf86RemoveEnabledDevice(local);
-  #else
+# else
 	            RemoveEnabledDevice(local->fd);
-  #endif
+# endif
 #else
 	            RemoveEnabledDevice(local->fd);
 #endif
diff --git a/xc/programs/Xserver/hw/xfree86/input/tek4957/Imakefile b/xc/programs/Xserver/hw/xfree86/input/tek4957/Imakefile
new file mode 100644
index 000000000..fb5cefb0b
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/input/tek4957/Imakefile
@@ -0,0 +1,30 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/input/tek4957/Imakefile,v 1.1 2002/11/11 01:18:08 alanh Exp $ */
+
+#define IHaveModules
+#include <Server.tmpl>
+
+SRCS = xf86Tek4957.c
+OBJS = xf86Tek4957.o
+
+DRIVER = tek4957
+
+INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86SRC)/loader -I$(XF86OSSRC) \
+		 -I$(SERVERSRC)/mi -I$(SERVERSRC)/include -I$(XINCLUDESRC) -I$(EXTINCSRC)
+
+#if MakeHasPosixVariableSubstitutions
+SubdirLibraryRule($(OBJS))
+#endif
+
+ModuleObjectRule()
+
+ObjectModuleTarget($(DRIVER),$(OBJS))
+
+InstallObjectModule($(DRIVER),$(MODULEDIR),input)
+
+#if !defined(XF86DriverSDK)
+InstallModuleManPage($(DRIVER))
+#endif
+
+DependTarget()
+
+InstallDriverSDKObjectModule($(DRIVER),$(DRIVERSDKMODULEDIR),input)
diff --git a/xc/programs/Xserver/hw/xfree86/input/tek4957/tek4957.man b/xc/programs/Xserver/hw/xfree86/input/tek4957/tek4957.man
new file mode 100644
index 000000000..9167af46d
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/input/tek4957/tek4957.man
@@ -0,0 +1,85 @@
+.\" $XFree86: xc/programs/Xserver/hw/xfree86/input/tek4957/tek4957.man,v 1.1 2002/11/11 01:18:08 alanh Exp $ 
+.\" shorthand for double quote that works everywhere.
+.ds q \N'34'
+.TH TEK4957 __drivermansuffix__ __vendorversion__
+.SH NAME
+tek4957 \- Tektronix 4957 input driver
+.SH SYNOPSIS
+.nf
+.B "Section \*qInputDevice\*q"
+.BI "  Identifier \*q" idevname \*q
+.B  "  Driver \*qtek4957\*q"
+.BI "  Option \*qDevice\*q   \*q" devpath \*q
+\ \ ...
+.B EndSection
+.fi
+.SH DESCRIPTION
+.B tek4957
+is an XFree86 input driver for the Tektronix 4957 tablet.
+.PP
+The
+.B tek4957
+driver functions as a pointer input device, and may be used as the
+X server's core pointer.
+.SH CONFIGURATION DETAILS
+Please refer to XF86Config(__filemansuffix__) for general configuration
+details and for options that can be used with all input drivers.  This
+section only covers configuration details specific to this driver.
+.RS 8
+.TP 4
+.B Option \fI"Device"\fP \fI"devpath"\fP
+sets the path to the special file which represents serial line where
+the tablet is plugged, for example /dev/ttyS0.
+.B This option is mandatory.
+.TP 4
+.B Option \fI"DeviceName"\fP \fI"name"\fP
+sets the name of the X device.
+.TP 4
+.B Option \fI"Speed"\fP \fI"number"\fP
+sets the sampling rate, from 1 to 6.
+Default is 6, maximum speed.
+.TP 4
+.B Option \fI"Resolution"\fP \fI"number"\fP
+sets the resolution.
+.RS 8
+.br
+0 : 2340 dots  : 1/200 inch
+.br
+1 : 2972 dots  : 1/10 mm
+.br
+2 : 11700 dots : 1/1000 inch
+.br
+3 : 11887 dots : 1/40 mm
+.br
+4 : 5850 dots  : 1/500 inch
+.br
+5 : 5944 dots  : 1/20 mm :
+.B default
+.br
+6 : 4680 dots  : 1/400 inch
+.br
+7 : 1170 dots  : 1/100 inch
+.br
+8 : 12 dots    : 1 inch
+.br
+9 : 24 dots    : 1/2 inch
+.RE
+.TP 4
+.B Option \fI"TopX"\fP \fI"number"\fP
+X coordinate of the top corner of the active zone. ( Default = 0 )
+.TP 4
+.B Option \fI"TopY"\fP \fI"number"\fP
+Y coordinate of the top corner of the active zone. ( Default = 0 )
+.TP 4
+.B Option \fI"BottomX"\fP \fI"Inumber"\fP
+X coordinate of the bottom corner of the active zone. ( Default = full scale )
+.TP 4
+.B Option \fI"BottomY"\fP \fI"number"\fP
+Y coordinate of the bottom corner of the active zone. ( Default = full scale )
+.RE
+.SH "BUGS / LIMITATIONS"
+Currently, only "Absolute" mode is supported ( Sorry )
+.SH "SEE ALSO"
+XFree86(1), XF86Config(__filemansuffix__), xf86config(1), Xserver(1), X(__miscmansuffix__).
+.SH AUTHORS
+Olivier DANET <odanet@caramail.com>
diff --git a/xc/programs/Xserver/hw/xfree86/input/tek4957/xf86Tek4957.c b/xc/programs/Xserver/hw/xfree86/input/tek4957/xf86Tek4957.c
new file mode 100644
index 000000000..452a2bb68
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/input/tek4957/xf86Tek4957.c
@@ -0,0 +1,777 @@
+/*
+ * Copyright 2002 by Olivier DANET <odanet@caramail.com>
+ *
+ * Designed for XFree86 version >= 4.0
+ *
+ * Permission to use, copy, modify, distribute, and sell this software and its
+ * documentation for any purpose is  hereby granted without fee, provided that
+ * the  above copyright  notice appear  in  all  copies  and  that  both  that
+ * copyright   notice   and   this  permission  notice  appear  in  supporting
+ * documentation, and that the name of O. DANET may not be used in advertising
+ * or  publicity pertaining to distribution  of the software without specific,
+ * written  prior  permission.  O.DANET  makes  no  representations  about the
+ * suitability  of  this  software  for  any  purpose. It is provided  "as is"
+ * without express or implied warranty.
+ *
+ * O. DANET DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+ * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+ * EVENT SHALL O. DANET BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+ * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
+ * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTIONS, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/input/tek4957/xf86Tek4957.c,v 1.1 2002/11/11 01:18:08 alanh Exp $ */
+
+#ifndef XFree86LOADER
+#include <unistd.h>
+#include <errno.h>
+#endif
+
+#include "misc.h"
+#include "xf86.h"
+#define NEED_XF86_TYPES
+#if !defined(DGUX)
+#include "xf86_ansic.h"
+#include "xisb.h"
+#endif
+#include "xf86_OSproc.h"
+#include "xf86Xinput.h"
+#include "exevents.h"
+#include "keysym.h"
+#include "mipointer.h"
+
+#ifdef XFree86LOADER
+#include "xf86Module.h"
+#endif
+
+/*
+ * Debug Macros
+ */
+
+#ifdef DBG
+#undef DBG
+#endif
+#ifdef DEBUG
+#undef DEBUG
+#endif
+
+/*#define DEBUG 1*/ /* Remove comment to enable debug message */
+#ifdef DEBUG
+static int debug_level = 0;
+#define DBG(lvl, f) {if ((lvl) <= debug_level) f;}
+#else
+#define DBG(lvl, f)
+#endif
+
+#define SYSCALL(call) while(((call) == -1) && (errno == EINTR))
+
+
+static InputDriverPtr tekDrv;
+
+static const char *default_options[] =
+{
+	"Device",       "/dev/ttyS2",
+	"BaudRate",     "9600",
+	"DataBits",     "7",
+	"StopBits",     "1",
+	"Parity",       "Odd",
+	"FlowControl",  "None",
+	"VTime",        "10",
+	"VMin",         "1",
+	NULL
+};
+
+/*
+ * List of available resolutions
+ */
+
+static const int resol[] =
+{
+	2340,		/* 0: 1/200 inch */
+	2972,		/* 1: 1/10  mm */
+	11700,		/* 2: 1/1000 inch */
+	11887,		/* 3: 1/40 mm */
+	5850,		/* 4: 1/500 inch */
+	5944,		/* 5: 1/20 mm : default */
+	4680,		/* 6: 1/400 inch */
+	1170,		/* 7: 1/100 inch */
+	12,		/* 8: 1 inch */
+	24		/* 9: 1/2 inch */
+};
+
+typedef struct
+{
+    char	*Device;	/* device file name */
+    int		LastX;		/* last X position */
+    int		LastY;		/* last Y position */
+    int		LastProximity; 	/* last proximity */
+    int		LastButtons;	/* last buttons state */
+
+    int		XMax;		/* max X value */
+    int		YMax;		/* max Y value */
+    int		XSize;		/* active area X size */
+    int		XOffset;	/* active area X offset */
+    int		YSize;		/* active area Y size */
+    int		YOffset;	/* active area Y offset */
+
+    int		Resmode;	/* Resolution mode */
+    int		Speed;		/* Speed */
+    int	        Init;		/* Initialized ? */
+
+    int		Index;		/* number of bytes read */
+    unsigned char Data[9];	/* data read from the device */
+} TekDeviceRec, *TekDevicePtr;
+
+
+/*
+ * TekConvert
+ * Convert device valuator values to screen X and Y.
+ */
+static Bool
+TekConvert(LocalDevicePtr	local,
+	       int		first,
+	       int		num,
+	       int		v0,
+	       int		v1,
+	       int		v2,
+	       int		v3,
+	       int		v4,
+	       int		v5,
+	       int*		x,
+	       int*		y)
+{
+    TekDevicePtr	priv = (TekDevicePtr) local->private;
+    int W,H;
+    ScreenPtr SP;
+
+    DBG(6,xf86Msg(X_INFO,"Tek4957:TekConvert (%d,%d)\n",v0,v1));
+
+    /* Gets current screen size. It can change dynamically in the case of
+    a multi-head configuration with different screen sizes ... */
+    SP=miPointerCurrentScreen();
+    W=SP->width;
+    H=SP->height;
+
+    if (first != 0 || num == 1) return (FALSE);
+
+    *x = ((long)v0 * (long)W) / (long)priv->XSize;
+    *y = ((long)v1 * (long)H) / (long)priv->YSize;
+
+    DBG(7,xf86Msg(X_INFO,"Tek4957:TekConvert ->(%d,%d)\n",*x,*y));
+
+    return (TRUE);
+}
+
+/*
+ * TekReadInput
+ * Reads data and posts any new events to the server.
+ */
+static void
+TekReadInput(LocalDevicePtr local)
+{
+    TekDevicePtr	priv = (TekDevicePtr) local->private;
+    int			len, loop;
+    int			x, y, buttons, prox;
+    DeviceIntPtr	device;
+    unsigned char	buffer[10];
+
+    SYSCALL(len = xf86ReadSerial(local->fd, buffer, sizeof(buffer)));
+
+    if (len <= 0) {
+    	xf86Msg(X_ERROR,"Tek4957:Error while reading data stream\n");
+	return;
+    }
+
+    for(loop=0; loop<len; loop++) {
+	/* Tek4957 binary format : 8 characters
+	Byte 0 :
+		bit 0 : Proximity : 0=Near 1=Away
+		bit 6 : 1 : Synchro
+	Byte 1 :
+		bit 0 : Button 0
+		bit 1 : Button 1
+		bit 2 : Button 2
+		bit 6 : 0
+	Byte 2 :
+		bits 5-0 : X coord. [5:0]
+		bit 6 : 0
+	Byte 3 :
+		bits 5-0 : X coord. [11:6]
+		bit 6 : 0
+	Byte 4 :
+		bits 5-0 : X coord. [17:12]
+		bit 6 : 0
+	Byte 5 :
+		bits 5-0 : Y coord. [5:0]
+		bit 6 : 0
+	Byte 6 :
+		bits 5-0 : Y coord. [11:6]
+		bit 6 : 0
+	Byte 7 :
+		bits 5-0 : Y coord. [17:12]
+		bit 6 : 0
+	*/
+
+	if ((priv->Index == 0) && !(buffer[loop] & 0x40)) /* Check synchro bit */
+             continue;
+
+	priv->Data[priv->Index++] = buffer[loop];
+
+	if (priv->Index == 8) {
+	    priv->Index = 0;
+	    prox = (priv->Data[0] & 1)? 0: 1;
+	    buttons = (priv->Data[1] & 7);
+	    x = (priv->Data[2]&0x3F)|((priv->Data[3]&0x3F)<<6) | ((priv->Data[4]&0x3F)<<12);
+	    y = (priv->Data[5]&0x3F)|((priv->Data[6]&0x3F)<<6) | ((priv->Data[7]&0x3F)<<12);
+
+	    x -= priv->XOffset;
+	    y -= priv->YOffset;
+
+	    if (x < 0) x = 0;
+	    if (y < 0) y = 0;
+	    if (x > priv->XSize) x = priv->XSize;
+	    if (y > priv->YSize) y = priv->YSize;
+
+	    device = local->dev;
+	    if (prox) {
+		DBG(10,xf86Msg(X_INFO,"Tek4957:TekReadInput Proximity in X=%d Y=%d Buttons=%d\n",x,y,buttons));
+		if (!(priv->LastProximity))
+		    xf86PostProximityEvent(device, 1, 0, 2, x, y);
+		if ( (priv->LastX != x) || (priv->LastY != y) )
+		    xf86PostMotionEvent(device,1, 0, 2, x, y);
+		if (priv->LastButtons != buttons) {
+		    if ((priv->LastButtons&1)!=(buttons&1))
+			xf86PostButtonEvent(device, 1,1,((buttons&1)>0), 0, 2, x, y);
+		    if ((priv->LastButtons&2)!=(buttons&2))
+			xf86PostButtonEvent(device, 1,2,((buttons&2)>0), 0, 2, x, y);
+		    if ((priv->LastButtons&4)!=(buttons&4))
+			xf86PostButtonEvent(device, 1,3,((buttons&4)>0), 0, 2, x, y);
+		}
+		priv->LastButtons = buttons;
+		priv->LastX = x;
+		priv->LastY = y;
+		priv->LastProximity = prox;
+	    } else { /* Pointer away */
+		DBG(10,xf86Msg(X_INFO,"Tek4957:TekReadInput Proximity out\n"));
+		if (priv->LastProximity)
+		    xf86PostProximityEvent(device, 0, 0, 2, x, y);
+		priv->LastProximity = 0;
+	    }
+	}
+    }
+
+}
+
+/*
+** TekControlProc ( ??? )
+*/
+static void
+TekControlProc(DeviceIntPtr	device, PtrCtrl *ctrl)
+{
+}
+
+/*
+ * TekOpen
+ * Open and initialize the tablet
+ */
+static Bool
+TekOpen(LocalDevicePtr local)
+{
+    char		Buffer[10];
+    int			err,i;
+    TekDevicePtr	priv = (TekDevicePtr)local->private;
+
+    DBG(4,xf86Msg(X_INFO,"Tek4957:TekOpen\n"));
+
+    /* Write ESC Z : RESET */
+    SYSCALL(err = xf86WriteSerial(local->fd,"\x1B" "Z" , 2));
+    if (err == -1) {
+	xf86Msg(X_ERROR,"Tek4957:Write error\n");
+	return !Success;
+    }
+
+    /* Wait for 100 ms */
+    err = xf86WaitForInput(-1, 100000);
+
+    /* Clear garbage, if any */
+    xf86FlushInput(local->fd);
+
+    /* Write ESC x : Ask for status */
+    SYSCALL(err = xf86WriteSerial(local->fd,"\x1B" "x" , 2));
+    if (err == -1) {
+	xf86Msg(X_ERROR,"Tek4957:Write error\n");
+	return !Success;
+    }
+
+    /* Check read data */
+    i=0;
+    while (i < 6) {
+	err = xf86WaitForInput(local->fd, 300000);
+	if (err == -1) {
+	    xf86Msg(X_ERROR,"Tek4957:WaitForInput\n");
+	    return !Success;
+	}
+	if (!err) {
+	    xf86Msg(X_ERROR,"Tek4957:Timeout while reading tablet. No tablet connected ???\n");
+	    return !Success;
+	}
+	SYSCALL(err = xf86ReadSerial(local->fd,&Buffer[i++], 1));
+	if (err == -1) {
+	    xf86Msg(X_ERROR,"Tek4957:Read error\n");
+	    return !Success;
+	}
+	if (!err) break;
+    }
+
+    Buffer[i]=0;
+
+    if ((Buffer[0] != '.') || (Buffer[1] != '#' )) {
+    	xf86Msg(X_ERROR,"Tek4957:Tablet detection error %d [%s]\n",i,Buffer);
+	return !Success;
+    }
+
+    /* Write ESC C [resolution]
+             ESC R [speed] */
+    Buffer[0]='\x1B';
+    Buffer[1]='C';
+    Buffer[2]='0'+priv->Resmode;
+    Buffer[3]='\x1B';
+    Buffer[4]='R';
+    Buffer[5]='0'+priv->Speed;
+    SYSCALL(err = xf86WriteSerial(local->fd,Buffer, 6));
+    if (err == -1) {
+	xf86Msg(X_ERROR,"Tek4957:Write error\n");
+	return !Success;
+    }
+
+    /* Write ESC F 3     : Up-Left origin
+             ESC I 0 0 1 : Emit data when movment
+	     ESC M 0     : Emit when delta
+	     */
+    SYSCALL(err = xf86WriteSerial(local->fd,"\x1B""F3""\x1B""I001""\x1B""M0" , 11));
+    if (err == -1) {
+	 xf86Msg(X_ERROR,"Tek4957:Write error\n");
+	 return !Success;
+    }
+
+    /* Flush garbage, if any */
+    xf86FlushInput(local->fd);
+
+    return Success;
+}
+
+/*
+ * TekOpenDevice
+ */
+static Bool
+TekOpenDevice(DeviceIntPtr pDev)
+{
+    LocalDevicePtr	local = (LocalDevicePtr)pDev->public.devicePrivate;
+    TekDevicePtr	priv = (TekDevicePtr)local->private;
+
+    local->fd = xf86OpenSerial(local->options);
+    if (local->fd == -1) {
+	return !Success;
+    }
+    xf86Msg(X_INFO,"Tek4957:%s opened as fd %d\n", priv->Device, local->fd);
+    if (TekOpen(local) != Success) {
+	xf86Msg(X_ERROR,"Tek4957:Initialisation error\n");
+	if (local->fd >= 0) {
+	    SYSCALL(xf86CloseSerial(local->fd));
+	}
+	local->fd = -1;
+    } else {
+	InitValuatorAxisStruct(pDev,
+			   0,
+			   0,			  /* min val */
+			   priv->XSize, 	  /* max val in use */
+			   20000, /* resolution dots per meter */
+			   0,			  /* min_res */
+			   20000); /* max_res */
+    	InitValuatorAxisStruct(pDev,
+			   1,
+			   0,			  /* min val */
+			   priv->YSize, 	  /* max val in use */
+			   20000, /* resolution, dots per meter */
+			   0,			  /* min_res */
+			   20000); /* max_res */
+	xf86Msg(X_PROBED,"Tek4957:Initialisation completed\n");
+    }
+    return (local->fd != -1);
+}
+
+
+/*
+** TekProc
+** Handle requests to do stuff to the driver.
+*/
+static int
+TekProc(DeviceIntPtr pDev, int what)
+{
+    CARD8		map[4];
+    int			loop;
+    LocalDevicePtr	local = (LocalDevicePtr)pDev->public.devicePrivate;
+    TekDevicePtr	priv = (TekDevicePtr)local->private;
+
+    DBG(5,xf86Msg(X_INFO,"Tek4957:TekProc pDev=0x%x priv=0x%x what=%d\n", pDev, priv, what));
+
+    switch (what) {
+	case DEVICE_INIT:
+	    DBG(2,xf86Msg(X_INFO,"Tek4957:TekProc pDev=0x%x priv=0x%x what=INIT\n", pDev, priv));
+	    if (priv->Init==1) break;	/* already done */
+
+	    for(loop=1; loop<=3; loop++) map[loop] = loop;
+
+	    if (InitButtonClassDeviceStruct(pDev,3,map) == FALSE) {
+	    	xf86Msg(X_ERROR,"Tek4957:Unable to allocate Button class device\n");
+		return !Success;
+	    }
+
+	    if (InitFocusClassDeviceStruct(pDev) == FALSE) {
+		xf86Msg(X_ERROR,"Tek4957:Unable to init Focus class device\n");
+		return !Success;
+	    }
+
+	    if (InitPtrFeedbackClassDeviceStruct(pDev,TekControlProc) == FALSE) {
+		xf86Msg(X_ERROR,"Tek4957:Unable to init ptr feedback\n");
+		return !Success;
+	    }
+
+	    if (InitProximityClassDeviceStruct(pDev) == FALSE) {
+		xf86Msg(X_ERROR,"Tek4957:Unable to init proximity class device\n");
+		return !Success;
+	    }
+
+	    if (InitValuatorClassDeviceStruct(pDev,2,xf86GetMotionEvents,
+		   local->history_size,Absolute)== FALSE) {
+		xf86Msg(X_ERROR,"Tek4957:Unable to allocate Valuator class device\n");
+		return !Success;
+	    }
+	    /* allocate the motion history buffer if needed */
+	    /* xf86MotionHistoryAllocate(local); */
+	    /* open the device to gather informations */
+	    TekOpenDevice(pDev);
+	    priv->Init=1;
+	    break;
+
+	case DEVICE_ON:
+	    DBG(2,xf86Msg(X_INFO,"Tek4957:TekProc pDev=0x%x priv=0x%x what=ON\n", pDev, priv));
+	    if (pDev->public.on) break;		/* already on */
+
+	    if ((local->fd < 0) && (!TekOpenDevice(pDev))) {
+		return !Success;
+	    }
+	    pDev->public.on = TRUE;
+	    xf86AddEnabledDevice(local);
+	    break;
+
+	case DEVICE_OFF:
+	    DBG(2,xf86Msg(X_INFO,"Tek4957:TekProc pDev=0x%x priv=0x%x what=OFF\n", pDev, priv));
+	    if (! pDev->public.on) break;		/* already off */
+	    xf86RemoveEnabledDevice(local);
+	    if (local->fd >= 0)
+		pDev->public.on = FALSE;
+	    break;
+
+	case DEVICE_CLOSE:
+	    DBG(2,xf86Msg(X_INFO,"Tek4957:TekProc pDev=0x%x priv=0x%x what=CLOSE\n", pDev, priv));
+	    if (local->fd != -1) {
+	        SYSCALL(xf86CloseSerial(local->fd));
+	        local->fd = -1;
+	    }
+	    break;
+
+	default:
+	    DBG(2,xf86Msg(X_INFO,"Tek4957:TekProc Unsupported mode=%d\n",what));
+	    return !Success;
+	    break;
+    }
+    return Success;
+}
+
+/*
+ * TekClose
+ */
+static void
+TekClose(LocalDevicePtr local)
+{
+    DBG(2,xf86Msg(X_INFO,"Tek4957:TekClose local = %lx, ->fd = %d\n", local, local->fd));
+    if (local->fd >= 0) {
+	xf86CloseSerial(local->fd);
+    }
+    local->fd = -1;
+}
+
+/*
+** TekChangeControl
+*/
+static int
+TekChangeControl(LocalDevicePtr local, xDeviceCtl* control)
+{
+    return(Success);
+}
+
+/*
+** TekSwitchMode
+** Switches the mode.  For now just absolute or relative, hopefully
+** more on the way.
+*/
+static int
+TekSwitchMode(ClientPtr client, DeviceIntPtr dev, int mode)
+{
+    return !Success;
+}
+
+/*
+ * TekUninit --
+ *
+ * called when the driver is unloaded.
+ */
+static void
+TekUninit(InputDriverPtr	drv,
+	  LocalDevicePtr	local,
+	  int flags)
+{
+    TekDevicePtr	priv = (TekDevicePtr) local->private;
+
+    ErrorF("TekUninit\n");
+
+    TekProc(local->dev, DEVICE_OFF);
+
+    xfree (priv);
+    xf86DeleteInput(local, 0);
+}
+
+/*
+ * TekInit --
+ *
+ * called when the module subsection is found in XF86Config
+ */
+static InputInfoPtr
+TekInit(InputDriverPtr	drv,
+	IDevPtr		dev,
+	int		flags)
+{
+    LocalDevicePtr	local = NULL;
+    TekDevicePtr	priv = NULL;
+    int min,max;
+
+    tekDrv = drv;
+
+    xf86Msg(X_INFO,"Tek4957:Allocating device...\n");
+
+    priv = xalloc(sizeof(TekDeviceRec));
+    if (!priv) return NULL;
+
+    local = xf86AllocateInput(tekDrv, 0);
+    if (!local) {
+    	xfree(priv);
+	return NULL;
+    }
+
+    local->name = "TEK4957";
+    local->type_name = XI_TABLET;
+    local->flags = 0;
+    local->device_control = TekProc;
+    local->read_input = TekReadInput;
+    local->control_proc = TekChangeControl;
+    local->close_proc = TekClose;
+    local->switch_mode = TekSwitchMode;
+    local->conversion_proc = TekConvert;
+    local->fd = -1;
+    local->atom = 0;
+    local->dev = NULL;
+    local->private = priv;
+    local->private_flags = 0;
+    local->history_size  = 0;
+    local->old_x = -1;
+    local->old_y = -1;
+
+#if defined (sun) && !defined(i386)
+    char *dev_name;
+#endif
+
+#if defined(sun) && !defined(i386)
+    if ((dev_name = getenv("TEK4957_DEV"))) {
+	priv->Device = xalloc(strlen(dev_name) + 1);
+	strcpy(priv->Device, dev_name);
+	xf86Msg(X_INFO,"Tek4957:Port selected : %s\n", priv->Device);
+    } else {
+	priv->Device = "";
+    }
+#else
+    priv->Device = "";         /* device file name */
+#endif
+
+    local->conf_idev = dev;
+
+    xf86CollectInputOptions(local, default_options, NULL);
+    xf86OptionListReport( local->options );
+
+    priv = (TekDevicePtr) local->private;
+
+    local->name = dev->identifier;
+
+
+    /* Debug level */
+#ifdef DEBUG
+    debug_level = xf86SetIntOption(local->options, "DebugLevel", 0);
+    if (debug_level > 0) {
+	xf86Msg(X_CONFIG, "Tek4957:Debug level set to %d\n", debug_level);
+    }
+#endif
+
+    /* Serial Device name is mandatory */
+    priv->Device = xf86FindOptionValue(local->options, "Device");
+
+    if (!priv->Device) {
+	xf86Msg (X_ERROR, "Tek4957: %s: No Device specified.\n", dev->identifier);
+	goto SetupProc_fail;
+    }
+
+    /* Process the common options. */
+    xf86ProcessCommonOptions(local, local->options);
+
+    /* Optional configuration */
+
+    xf86Msg(X_CONFIG, "Tek4957: %s: serial device is %s\n", dev->identifier,
+	    priv->Device);
+
+    /* Resolution */
+    priv->Resmode = xf86SetIntOption (local->options,"Resolution",5);
+    priv->XMax=resol[priv->Resmode];
+    priv->YMax=resol[priv->Resmode];
+    if ((priv->Resmode<0)||(priv->Resmode>9)) {
+	xf86Msg(X_ERROR,"Tek4957: Invalid resolution specified. Using default\n");
+	priv->Resmode=5;
+	priv->XMax=resol[priv->Resmode];
+	priv->YMax=resol[priv->Resmode];
+    } else {
+    	xf86Msg(X_CONFIG,"Tek4957: Resolution [%d] = %d positions\n",priv->Resmode,priv->XMax);
+    }
+
+    /* Speed */
+    priv->Speed = xf86SetIntOption (local->options, "Speed", 6 );
+    if ((priv->Speed<0)||(priv->Speed>6)) {
+	xf86Msg(X_ERROR,"Tek4957: Invalid speed specified. Using default\n");
+	priv->Speed=5;
+    } else {
+    	xf86Msg(X_CONFIG,"Tek4957: Speed = %d\n",priv->Speed);
+    }
+
+    /* X bounds */
+    min = xf86SetIntOption( local->options, "TopX", 0 );
+    max = xf86SetIntOption( local->options, "BottomX",priv->XMax );
+    if (((max-min)<=0)||(max>priv->XMax)||(min<0)) {
+	xf86Msg(X_ERROR,"Tek4957:Invalid X interval specified : TopX=%d, BottomX=%d\n",min,max);
+	min=0; max=priv->XMax;
+    } else {
+    	xf86Msg(X_CONFIG,"Tek4957:X interval :TopX=%d, BottomX=%d\n",min,max);
+    }
+
+    priv->XSize=max-min;
+    priv->XOffset=min;
+
+    /* Y bounds */
+    min = xf86SetIntOption( local->options, "TopY", 0 );
+    max = xf86SetIntOption( local->options, "BottomY",priv->YMax );
+    if (((max-min)<=0)||(max>priv->YMax)||(min<0)) {
+	xf86Msg(X_ERROR,"Tek4957:Invalid Y interval specified : TopY=%d, BottomY=%d\n",min,max);
+	min=0; max=priv->XMax;
+    } else {
+    	xf86Msg(X_CONFIG,"Tek4957:Y interval :TopY=%d, BottomY=%d\n",min,max);
+    }
+
+    priv->YSize=max-min;
+    priv->YOffset=min;
+
+    priv->Index = 0;		/* number of bytes read */
+    priv->Init = 0;
+    priv->LastX = -1;		/* previous X position */
+    priv->LastY = -1;		/* previous Y position */
+    priv->LastProximity = 0;	/* previous proximity */
+    priv->LastButtons = 0;	/* previous buttons state */
+
+    /* return the LocalDevice */
+    local->flags |= XI86_POINTER_CAPABLE | XI86_CONFIGURED;
+
+    return local;
+
+  SetupProc_fail:
+    if (priv)
+	xfree(priv);
+    return local;
+}
+
+#ifdef XFree86LOADER
+static
+#endif
+InputDriverRec TEK4957 = {
+    1,			/* driver version */
+    "tek4957",		/* driver name */
+    NULL,		/* identify */
+    TekInit,		/* pre-init */
+    TekUninit,		/* un-init */
+    NULL,		/* module */
+    0			/* ref count */
+};
+
+
+/*
+ ***************************************************************************
+ *
+ * Dynamic loading functions
+ *
+ ***************************************************************************
+ */
+#ifdef XFree86LOADER
+/*
+ * TekUnplug --
+ *
+ * called when the module subsection is found in XF86Config
+ */
+static void
+TekUnplug(pointer p)
+{
+}
+
+/*
+ * TekPlug --
+ *
+ * called when the module subsection is found in XF86Config
+ */
+static pointer
+TekPlug(pointer	module,
+    pointer	options,
+    int		*errmaj,
+    int		*errmin)
+{
+    xf86AddInputDriver(&TEK4957, module, 0);
+
+    return module;
+}
+
+static XF86ModuleVersionInfo TekVersionRec =
+{
+    "tek4957",
+    MODULEVENDORSTRING,
+    MODINFOSTRING1,
+    MODINFOSTRING2,
+    XF86_VERSION_CURRENT,
+    1, 0, 0,
+    ABI_CLASS_XINPUT,
+    ABI_XINPUT_VERSION,
+    MOD_CLASS_XINPUT,
+    {0, 0, 0, 0}		/* signature, to be patched into the file by */
+				/* a tool */
+};
+
+XF86ModuleData tek4957ModuleData = {&TekVersionRec,
+				  TekPlug,
+				  TekUnplug};
+
+#endif /* XFree86LOADER */
+
+/* end of xf86Tek4957.c */
+
diff --git a/xc/programs/Xserver/hw/xfree86/input/ur98/Imakefile b/xc/programs/Xserver/hw/xfree86/input/ur98/Imakefile
new file mode 100644
index 000000000..aef728797
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/input/ur98/Imakefile
@@ -0,0 +1,30 @@
+XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/input/ur98/Imakefile,v 1.1 2002/11/22 03:49:15 dawes Exp $
+
+#define IHaveModules
+#include <Server.tmpl>
+
+SRCS = xf86Ur-98.c
+OBJS = xf86Ur-98.o
+
+DRIVER = ur98
+
+INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86SRC)/loader -I$(XF86OSSRC) \
+       -I$(SERVERSRC)/include -I$(SERVERSRC)/mi -I$(XINCLUDESRC) -I$(EXTINCSRC)
+
+#if MakeHasPosixVariableSubstitutions
+SubdirLibraryRule($(OBJS))
+#endif
+
+ModuleObjectRule()
+
+ObjectModuleTarget($(DRIVER),$(OBJS))
+
+InstallObjectModule($(DRIVER),$(MODULEDIR),input/linux)
+
+#if !defined(XF86DriverSDK)
+InstallModuleManPage($(DRIVER))
+#endif
+
+DependTarget()
+
+InstallDriverSDKObjectModule($(DRIVER),$(DRIVERSDKMODULEDIR),input/linux)
diff --git a/xc/programs/Xserver/hw/xfree86/input/ur98/ur98.man b/xc/programs/Xserver/hw/xfree86/input/ur98/ur98.man
new file mode 100644
index 000000000..b699a0f72
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/input/ur98/ur98.man
@@ -0,0 +1,131 @@
+.\" $XFree86: xc/programs/Xserver/hw/xfree86/input/ur98/ur98.man,v 1.1 2002/11/22 03:49:15 dawes Exp $
+.\" shorthand for double quote that works everywhere.
+.ds q \N'34'
+.TH UR98 __drivermansuffix__ __vendorversion__
+.SH NAME
+UR-98 \- UR98 (TR88L803) head tracker driver
+.SH SYNOPSIS
+.B "Section \*qInputDevice\*q"
+.br
+.BI "  Identifier \*q" idevname \*q
+.br
+.B  "  Driver \*qUR-98\*q"
+.br
+.BI "  Option \*qDevice\*q   \*q" devpath \*q
+.br
+\ \ ...
+.br
+.B EndSection
+.SH DESCRIPTION
+.B UR-98
+is an XFree86 input driver for the Union Reality UR-F98 headtracker.
+.PP
+The
+.B UR-98
+driver functions as a pointer input device, and can be used either as an
+additional input device or as the X server's core pointer. The driver
+provides support for the three axes, throttle and four buttons of the
+controller. If mapped as the core pointer the headtracker provides
+headtracking to try and place the mouse cursor where you look. As a
+secondary input device the unit can be used for gaming, for example to
+provide the look up/down and the turn in quake, and with the Z axis bound 
+to ack/forward to provide movement control.
+.PP
+The default mapping maps left-right movement to X, up-down movement to Y and
+near/far movement to the Z axis. The throttle is mapped as the fourth axis
+by default but can also be mapped as button 5.
+.PP
+For use in "head only" mode the Z axis can be mapped as a button. This
+allows the user to select objects with head/neck movement alone but takes some
+practice to use well.
+.PP
+.SH SUPPORTED HARDWARE
+Union Reality UR-98. While this is a joystick driver the behaviour is
+absolute so this driver is not useful for true joystick interfaces.
+.SH CONFIGURATION DETAILS
+Please refer to XF86Config(__filemansuffix__) for general configuration
+details and for options that can be used with all input drivers.  This
+section only covers configuration details specific to this driver.
+.PP
+The following driver
+.B options
+are supported
+.TP
+.BI "Option \*qMinX\*q \*q" integer \*q
+Set the left hand X value from the headgear, for calibration.
+.TP
+.BI "Option \*qMaxX\*q \*q" integer \*q
+Set the right hand X value from the headgear, for calibration.
+.TP
+.BI "Option \*qMinY\*q \*q" integer \*q
+Set the top Y value from the headgear, for calibration.
+.TP
+.BI "Option \*qMaxY\*q \*q" integer \*q
+Set the bottom Y value from the headgear, for calibration.
+.TP
+.BI "Option \*qMinZ\*q \*q" integer \*q
+Set the nearest Z value from the headgear, for calibration.
+.TP
+.BI "Option \*qMaxZ\*q \*q" integer \*q
+Set the furthest Z value from the headgear, for calibration.
+.TP
+.BI "Option \*qMinT\*q \*q" integer \*q
+Set the low throttle value from the headgear, for calibration.
+.TP
+.BI "Option \*qMaxT\*q \*q" integer \*q
+Set the high throttle value from the headgear, for calibration.
+.TP
+.BI "Option \*qScreen\*q \*q" integer \*q
+The screen to attach to the headgear when running with multiple screens. 
+The default is screen 0.
+.TP
+.BI "Option \*qDevice\*q \*q" string \*q
+The joystick port that is attached to the headgear interface. This is
+usually /dev/input/js0. The digital port is not supported due to lack of
+documentation.
+.TP
+.BI "Option \*qDeviceName\*q \*q" string \*q
+Set the X11 device name for the headgear. This defaults to HEAD.
+.TP
+.BI "Option \*qPortraitMode\*q \*q" string \*q
+Set the display orientation. The default is "landscape" but you can rotate
+the screen clockwise ("portrait") or anticlockwise ("portraitCCW").
+.TP
+.BI "Option \*qSwapXY\*q \*q" boolean \*q
+Swap the X and Y values on the display. The default is false.
+.TP
+.BI "Option \*qButton5\*q \*q" boolean \*q
+Map the throttle as a button instead of axis 4. For some gaming applications
+this can be more useful. The default is to map the throttle as axis 4.
+.TP
+.BI "Option \*qHeadButton\*q \*q" boolean \*q
+Map the Z axis as button 1. This defaults to false.
+.TP
+.BI "Option \*qHeadThresh\*q \*q" boolean \*q
+Set the distance that is held to be mouse down.
+.TP
+.BI "Option \*qHeadLock\*q \*q" boolean \*q
+Set the range of depth around the mouse down point where mouse x and y
+movement is locked out. Set to zero to disable.
+.SH "BUGS"
+The "HeadButton" option is currently not implemented.
+.PP
+The hardware or kernel driver has some idiosyncracies. Notably on
+kernel initialization the interface occasionally gets into a state where the 
+readings rapidly cycle left-right-left-right or top-bottom-top-bottom.
+In those cases it seems to be neccessary to unload the driver, unplug,
+replug and reload the joystick drivers. Once it initializes sanely it 
+remains sane.
+.PP
+If the device refuses to work check the gray/black cables are plugged into
+the right ports on the unit. Be careful about this as crossing the cables
+can lead to the device failing with a nasty burning electronics smell. The
+author writes from direct experience.
+.PP
+This driver is currently Linux specific.
+.PP
+.SH "SEE ALSO"
+XFree86(1), XF86Config(__filemansuffix__), xf86config(1), Xserver(1), X(__miscmansuffix__).
+.SH AUTHORS
+Authors include...
+ Alan Cox
diff --git a/xc/programs/Xserver/hw/xfree86/input/ur98/xf86Ur-98.c b/xc/programs/Xserver/hw/xfree86/input/ur98/xf86Ur-98.c
new file mode 100644
index 000000000..d61632f12
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/input/ur98/xf86Ur-98.c
@@ -0,0 +1,721 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/input/ur98/xf86Ur-98.c,v 1.1 2002/11/22 03:49:15 dawes Exp $ */
+
+#include <sys/types.h>
+#include <unistd.h>
+#include <string.h>
+#include <errno.h>
+#define inline __inline__
+#include <linux/joystick.h>
+
+#undef BUS_ISA
+#undef BUS_PCI
+
+#include <fcntl.h>
+#include <sys/ioctl.h>
+#include "misc.h"
+#include "xf86.h"
+#include "xf86_OSproc.h"
+#include "xf86Xinput.h"
+#include "exevents.h"
+#include "os.h"
+
+#ifdef XFree86LOADER
+#include "xf86Module.h"
+#endif
+
+static const char *reqSymbols[] = {
+	"AddEnabledDevice",
+	"ErrorF",
+	"InitButtonClassDeviceStruct",
+	"InitProximityClassDeviceStruct",
+	"InitValuatorAxisStruct",
+	"InitValuatorClassDeviceStruct",
+	"InitPtrFeedbackClassDeviceStruct",
+	"RemoveEnabledDevice",
+	"Xcalloc",
+	"Xfree",
+	"XisbBlockDuration",
+	"XisbFree",
+	"XisbNew",
+	"XisbRead",
+	"XisbTrace",
+	"screenInfo",
+	"xf86AddInputDriver",
+	"xf86AllocateInput",
+	"xf86CloseSerial",
+	"xf86CollectInputOptions",
+	"xf86ErrorFVerb",
+	"xf86FindOptionValue",
+	"xf86GetMotionEvents",
+	"xf86GetVerbosity",
+	"xf86MotionHistoryAllocate",
+	"xf86NameCmp",
+	"xf86OpenSerial",
+	"xf86OptionListCreate",
+	"xf86OptionListMerge",
+	"xf86OptionListReport",
+	"xf86PostButtonEvent",
+	"xf86PostMotionEvent",
+	"xf86PostProximityEvent",
+	"xf86ProcessCommonOptions",
+	"xf86ScaleAxis",
+	"xf86SetIntOption",
+	"xf86SetStrOption",
+	"xf86XInputSetScreen",
+	"xf86XInputSetSendCoreEvents",
+	NULL
+};
+
+
+
+/*
+ ***************************************************************************
+ *
+ * Default constants.
+ *
+ ***************************************************************************
+ */
+
+#define DEFAULT_MAX_X		32768
+#define DEFAULT_MIN_X		0
+#define DEFAULT_MAX_Y		65535
+#define DEFAULT_MIN_Y		0
+#define DEFAULT_MAX_Z		65535
+#define DEFAULT_MIN_Z		0
+#define DEFAULT_MAX_T		65535
+#define DEFAULT_MIN_T		0
+
+#define DEFAULT_HEAD_THRESH	38000
+#define DEFAULT_HEAD_LOCK	450
+                              
+#define XI_STYLUS		"HEAD"	/* X device name for the head tracking device	*/
+
+
+/*
+ ***************************************************************************
+ *
+ * Device private records.
+ *
+ ***************************************************************************
+ */
+
+typedef struct _UR98PrivateRec {
+  char			*input_dev;	/* The head screen input device			*/
+  int			min_x;		/* Minimum x reported by calibration		*/
+  int			max_x;		/* Maximum x					*/
+  int			min_y;		/* Minimum y reported by calibration		*/
+  int			max_y;		/* Maximum y					*/
+  int			min_z;		/* Minimum z					*/
+  int			max_z;		/* Maximum z					*/
+  int			min_t;		/* Minimum t					*/
+  int			max_t;		/* Maximum t					*/
+  int			cur_x;		/* Current x					*/
+  int			cur_y;		/* Current y					*/
+  int			cur_z;		/* Current z					*/
+  int			cur_t;		/* Current t					*/
+  int			axes;		/* Number of axes				*/
+  int			button_5;	/* True if axis 4 is remapped as button5 	*/
+  int			buttons[5];	/* Button status				*/
+  int			screen_no;	/* Screen associated with the device		*/
+  int			screen_width;	/* Width of the associated X screen		*/
+  int			screen_height;	/* Height of the screen				*/
+  Bool			inited;		/* The controller has already been configured ?	*/
+  char			state;		/* Current state of report flags.		*/
+  LocalDevicePtr	head;		/* Device ptr associated with the hw.		*/
+  int			swap_axes;	/* Swap X an Y axes if != 0 			*/
+  int			head_button;	/* Z is button 0, cur_z is holds true cur_t	*/
+  int			head_lock;	/* Lock for x/y in head_button mode		*/
+  int			head_thresh;	/* Threshhold for Z as button down		*/
+} UR98PrivateRec, *UR98PrivatePtr;
+
+
+/*
+ ***************************************************************************
+ *
+ * xf86UR98Convert --
+ *	Convert extended valuators to x and y suitable for core motion
+ *	events. Return True if ok and False if the requested conversion
+ *	can't be done for the specified valuators.
+ *
+ ***************************************************************************
+ */
+static Bool xf86UR98Convert(LocalDevicePtr local, int first, int num,
+		int v0,int v1,int v2,int v3, int v4, int v5, int *x, int *y)
+{
+	UR98PrivatePtr	priv = (UR98PrivatePtr) local->private;
+	int width = priv->max_x - priv->min_x;
+	int height = priv->max_y - priv->min_y;
+	int input_x, input_y;
+	int tmp;
+
+	input_x = v0;
+	input_y = v1;
+  
+	if (priv->swap_axes) {
+		tmp = input_x;
+		input_x = input_y;
+		input_y = tmp;
+	}
+	*x = (priv->screen_width * (input_x - priv->min_x)) / width;
+	*y = (priv->screen_height * (input_y - priv->min_y)) / height;
+	/*
+	 * Need to check if still on the correct screen.
+	 * This call is here so that this work can be done after
+	 * calib and before posting the event.
+	 */
+	xf86XInputSetScreen(local, priv->screen_no, *x, *y);
+	return TRUE;
+}
+
+static void UR98PtrCtrl(DeviceIntPtr device, PtrCtrl *ctrl)
+{
+	/* I have no clue what this does, except that registering it stops the 
+	   X server segfaulting in ProcGetPointerMapping()
+	   Ho Hum.
+	*/
+}
+
+static void xf86UR98ReadInput(LocalDevicePtr local)
+{
+	UR98PrivatePtr		priv = (UR98PrivatePtr)(local->private);
+	struct js_event event;
+	int one=1;
+	
+	ioctl(local->fd, FIONBIO, &one);
+		
+	while(read(local->fd, &event, sizeof(event))==sizeof(event))
+	{
+		if(event.type & JS_EVENT_BUTTON)
+		{
+			/* Shift the buttons if Z is button 1 */
+			event.number += priv->head_button;
+			if(priv->buttons[event.number] != event.value)
+			{
+				priv->buttons[event.number] = event.value;
+				xf86PostButtonEvent(priv->head->dev, TRUE, event.number + 1, event.value,
+						0, priv->axes, priv->cur_x, priv->cur_y, priv->cur_z, priv->cur_t);
+			}				
+		}
+		if(event.type & JS_EVENT_AXIS)
+		{
+			int lock = 0;
+			
+			if(priv->head_lock)
+			{
+				lock = priv->cur_t - priv->head_thresh;
+				ErrorF("Lock %d\n", lock);
+				if(lock < -priv->head_lock || lock > priv->head_lock)
+					lock = 0;
+				else
+					lock = priv->head_button;
+			}
+				
+			switch(event.number)
+			{
+				case 0:
+					if(!lock)
+						priv->cur_x = event.value+32768;
+					break;
+				case 1:
+					if(!lock)
+						priv->cur_y = event.value+32768;
+					break;
+				case 2:
+					if(priv->button_5 == 0)
+					{
+						/* We use cur_z to hold cur_t in 
+						   head button mode. Hackish but saves
+						   a lot of conditional code elsewhere */
+						if(priv->head_button)
+							priv->cur_z = event.value + 32768;
+						else
+							priv->cur_t = event.value +32768;
+					}
+					else
+					{
+						if(event.value > 0)
+							event.value = 1;
+						else
+							event.value = 0;
+						if(priv->buttons[4] != event.value)
+						{
+							priv->buttons[4] = event.value;
+							xf86PostButtonEvent(priv->head->dev, TRUE, 4, event.value,
+								0, priv->axes, priv->cur_x, priv->cur_y, priv->cur_z, priv->cur_t);
+						}						
+					}		
+				case 3:
+					if(priv->head_button == 0)
+						priv->cur_z = event.value+32768;
+					else
+					{
+						ErrorF("Head at %d\n", event.value + 32768);
+						priv->cur_t = event.value+32768;
+						/* Low is near... */
+						if(priv->cur_t < priv->head_thresh)
+							event.value = 1;
+						else
+							event.value = 0;
+						if(priv->buttons[0] != event.value)
+						{
+							priv->buttons[0] = event.value;
+							xf86PostButtonEvent(priv->head->dev, TRUE, 1, event.value,
+								0, priv->axes, priv->cur_x, priv->cur_y, priv->cur_z, priv->cur_t);
+						}						
+					}		
+					break;
+			}
+			xf86PostMotionEvent(priv->head->dev, TRUE, 0, priv->axes, priv->cur_x, priv->cur_y, priv->cur_z, priv->cur_t);
+		}
+	}
+}
+
+
+/*
+ ***************************************************************************
+ *
+ * xf86UR98Control --
+ *
+ ***************************************************************************
+ */
+static Bool
+xf86UR98Control(DeviceIntPtr	dev,
+	       int		mode)
+{
+	static unsigned char map[] = { 0, 1, 2, 3, 4, 5};
+	LocalDevicePtr local = (LocalDevicePtr) dev->public.devicePrivate;
+	UR98PrivatePtr priv = (UR98PrivatePtr)(local->private);
+	
+	switch(mode)
+	{
+
+	case DEVICE_INIT:
+		if (priv->screen_no >= screenInfo.numScreens || priv->screen_no < 0) {
+			priv->screen_no = 0;
+		}
+		priv->screen_width = screenInfo.screens[priv->screen_no]->width;
+		priv->screen_height = screenInfo.screens[priv->screen_no]->height;
+
+		/*
+		 * Device reports button press for up to 5 buttons.
+		 */
+		if (InitButtonClassDeviceStruct(dev, 4 + priv->button_5, map) == FALSE) {
+			ErrorF("Unable to allocate ButtonClassDeviceStruct\n");
+			return !Success;
+		}
+      	
+		/*
+		 * Device reports motions on 3 axes in absolute coordinates.
+		 * Axes min and max values are reported in raw coordinates.
+		 * Resolution is computed roughly by the difference between
+		 * max and min values scaled from the approximate size of the
+		 * screen to fit one meter.
+		 */
+	
+		if (InitValuatorClassDeviceStruct(dev, priv->axes, xf86GetMotionEvents,
+				local->history_size, Absolute) == FALSE) {
+			ErrorF("Unable to allocate ValuatorClassDeviceStruct\n");
+			return !Success;
+		}
+		else
+		{
+			InitValuatorAxisStruct(dev, 0, priv->min_x, priv->max_x,
+				       65535,
+				       0     /* min_res */,
+				       65535  /* max_res */);
+			InitValuatorAxisStruct(dev, 1, priv->min_y, priv->max_y,
+				       65535,	/* resolution */
+				       0     /* min_res */,
+				       65535 /* max_res */);
+			if(priv->axes > 2)
+			{
+				if(priv->head_button)
+				{
+					/* In head button mode we skip the Z axis */
+					InitValuatorAxisStruct(dev, 2, priv->min_t, priv->max_t,
+					       65535,	/* resolution */
+					       0     /* min_res */,
+					       65535 /* max_res */);
+				}
+				else
+				{
+					InitValuatorAxisStruct(dev, 2, priv->min_z, priv->max_z,
+					       65535,	/* resolution */
+					       0     /* min_res */,
+					       65535 /* max_res */);
+				}
+			}
+			if(priv->axes > 3)
+				InitValuatorAxisStruct(dev, 3, priv->min_t, priv->max_t,
+				       65535,	/* resolution */
+				       0     /* min_res */,
+				       65535 /* max_res */);
+		}
+	      
+		if (InitFocusClassDeviceStruct(dev) == FALSE) {
+			ErrorF("Unable to allocate FocusClassDeviceStruct\n");
+		}
+		
+		if(InitPtrFeedbackClassDeviceStruct(dev, UR98PtrCtrl) == FALSE) {
+			ErrorF("Unable to allocate PtrFeedBackClassDeviceStruct\n");
+		}
+	      
+		/*
+		 * Allocate the motion events buffer.
+		 */
+
+		xf86MotionHistoryAllocate(local);
+      
+		return Success;
+    
+	case DEVICE_ON:
+		if (local->fd < 0) {
+			char c;
+			int ver;
+			
+			local->fd = open(priv->input_dev, O_RDONLY|O_NDELAY);
+			if (local->fd < 0) {
+				ErrorF("Unable to open UR98 headtracker device\n");
+				return !Success;
+			}
+			if(ioctl(local->fd, JSIOCGVERSION, &ver)==-1)
+			{
+				ErrorF("Unable to query headtracker interface version\n");
+				return !Success;
+			}
+			if(ioctl(local->fd, JSIOCGAXES, &c)==-1)
+			{
+				ErrorF("Unable to query headtracker parameters\n");
+				return !Success;
+			}
+			if(c!=4)
+			{
+				ErrorF("Device is not a UR-98\n");
+				return !Success;
+			}
+			if(ioctl(local->fd, JSIOCGBUTTONS, &c)==-1)
+			{
+				ErrorF("Unable to query headtracker parameters\n");
+				return !Success;
+			}
+			if(c!=4)
+			{
+				ErrorF("Device is not a UR-98\n");
+				return !Success;
+			}			
+			AddEnabledDevice(local->fd);
+		}
+		dev->public.on = TRUE; 
+		return Success;
+      
+	case DEVICE_OFF:
+		dev->public.on = FALSE;
+		return Success;
+    
+	case DEVICE_CLOSE:
+		dev->public.on = FALSE;
+		if (local->fd >= 0) {
+			xf86RemoveEnabledDevice(local);
+			close(local->fd);
+			local->fd = -1;
+		}
+		return Success;
+	default:
+		ErrorF("unsupported mode=%d\n", mode);
+		return !Success;
+	}
+}
+
+/*
+ ***************************************************************************
+ *
+ * xf86UR98ControlProc --
+ *
+ ***************************************************************************
+ */
+ 
+static int xf86UR98ControlProc (InputInfoPtr pInfo, xDeviceCtl * control)
+{
+	return (Success);
+}
+
+/*
+ ***************************************************************************
+ *
+ * xf86UR98Allocate --
+ *
+ ***************************************************************************
+ */
+static LocalDevicePtr xf86UR98Allocate(InputDriverPtr drv, char *name, char *type_name, int flag)
+{
+	LocalDevicePtr local = xf86AllocateInput(drv, 0);
+	UR98PrivatePtr priv = (UR98PrivatePtr) xalloc(sizeof(UR98PrivateRec));
+	int i;
+  
+	if (!local || !priv)
+	{
+		if(priv)
+			xfree(priv);
+		if(local)
+			xfree(local);
+		return NULL;
+	}
+
+	priv->input_dev = strdup("/dev/js0");
+	priv->min_x = 0;
+	priv->max_x = 0;
+	priv->min_y = 0;
+	priv->max_y = 0;
+	priv->min_z = 0;
+	priv->max_z = 0;
+	priv->min_t = 0;
+	priv->max_t = 0;
+	priv->button_5 = 0;
+	priv->axes = 4;
+	priv->screen_no = 0;
+	priv->screen_width = -1;
+	priv->screen_height = -1;
+	priv->inited = 0;
+	priv->state = 0;
+	priv->swap_axes = 0;
+	for(i = 0; i < 5; i++)
+		priv->buttons[i] = 0;
+	priv->head_button = 0;
+	priv->head_thresh = 0;
+	priv->head_lock = 0;
+	
+	local->name = name;
+	local->flags = 0 /* XI86_NO_OPEN_ON_INIT */;
+	local->device_control = xf86UR98Control;
+	local->read_input = xf86UR98ReadInput;
+	local->control_proc = xf86UR98ControlProc;
+	local->close_proc = NULL;
+	local->switch_mode = NULL;
+	local->conversion_proc = xf86UR98Convert;
+	local->reverse_conversion_proc = NULL;
+	local->fd = -1;
+	local->atom = 0;
+	local->dev = NULL;
+	local->private = priv;
+	local->private_flags = flag;
+	local->type_name = type_name;
+	local->history_size = 0;
+  
+	return local;
+}
+
+
+/*
+ ***************************************************************************
+ *
+ * xf86UR98AllocateHeadTracker --
+ *
+ ***************************************************************************
+ */
+static LocalDevicePtr xf86UR98AllocateHeadTracker(InputDriverPtr drv)
+{
+	LocalDevicePtr local = xf86UR98Allocate(drv, XI_STYLUS, "UR98 HeadTracker", 1);
+	if (local)
+		((UR98PrivatePtr) local->private)->head = local;
+	return local;
+}
+
+
+static void xf86UR98Uninit(InputDriverPtr drv, LocalDevicePtr local, int flags)
+{
+	UR98PrivatePtr priv = (UR98PrivatePtr) local->private;
+  
+	xf86UR98Control(local->dev, DEVICE_OFF);
+
+	if (priv) {
+		priv->head->private = NULL;
+		xfree(priv->input_dev);
+		xfree(priv);
+	}
+	xfree(local->name);
+	xfree(local);
+
+	xf86DeleteInput(local, 0);
+}
+
+static InputInfoPtr xf86UR98Init(InputDriverPtr drv, IDevPtr dev, int flags)
+{
+	LocalDevicePtr local=NULL;
+	UR98PrivatePtr priv=NULL;
+	char *str;
+	int portrait=0;
+
+
+	local = xf86UR98AllocateHeadTracker(drv);
+	priv = local->private;
+	local->conf_idev = dev;
+
+	xf86CollectInputOptions(local, NULL, NULL);
+  
+	str = xf86FindOptionValue(local->options, "Device");
+	if (!str) {
+		xf86Msg(X_ERROR, "%s: No Device specified in UR98 module config.\n", dev->identifier);
+		goto init_err;
+	}
+	priv->input_dev = strdup(str);
+	priv->head = local;
+
+	/* Process the common options. */
+	xf86ProcessCommonOptions(local, local->options);
+  
+	str = xf86FindOptionValue(local->options, "DeviceName");
+	if (str) {
+		local->name = strdup(str);
+	}
+	xf86Msg(X_CONFIG, "UR98 X device name: %s\n", local->name);  
+	priv->screen_no = xf86SetIntOption(local->options, "ScreenNo", 0);
+	xf86Msg(X_CONFIG, "UR98 associated screen: %d\n", priv->screen_no);  
+	priv->max_x = xf86SetIntOption(local->options, "MaxX", DEFAULT_MAX_X);
+	xf86Msg(X_CONFIG, "UR98 maximum x position: %d\n", priv->max_x);
+	priv->min_x = xf86SetIntOption(local->options, "MinX", DEFAULT_MIN_X);
+	xf86Msg(X_CONFIG, "UR98 minimum x position: %d\n", priv->min_x);
+	priv->max_y = xf86SetIntOption(local->options, "MaxY", DEFAULT_MAX_Y);
+	xf86Msg(X_CONFIG, "UR98 maximum y position: %d\n", priv->max_y);
+	priv->min_y = xf86SetIntOption(local->options, "MinY", DEFAULT_MIN_Y);
+	xf86Msg(X_CONFIG, "UR98 minimum y position: %d\n", priv->min_y);
+	priv->max_z = xf86SetIntOption(local->options, "MaxZ", DEFAULT_MAX_Z);
+	xf86Msg(X_CONFIG, "UR98 maximum z position: %d\n", priv->max_z);
+	priv->min_z = xf86SetIntOption(local->options, "MinZ", DEFAULT_MIN_Z);
+	xf86Msg(X_CONFIG, "UR98 minimum z position: %d\n", priv->min_z);
+	priv->max_t = xf86SetIntOption(local->options, "MaxT", DEFAULT_MAX_T);
+	xf86Msg(X_CONFIG, "UR98 maximum z position: %d\n", priv->max_t);
+	priv->min_t = xf86SetIntOption(local->options, "MinT", DEFAULT_MIN_T);
+	xf86Msg(X_CONFIG, "UR98 minimum z position: %d\n", priv->min_t);
+	priv->head_button = xf86SetBoolOption(local->options, "HeadButton", 0);
+	if(priv->head_button)
+		xf86Msg(X_CONFIG, "UR98 head proximity acts as button 1\n");
+	priv->head_thresh = xf86SetIntOption(local->options, "HeadButton", DEFAULT_HEAD_THRESH);
+	if(priv->head_button)
+		xf86Msg(X_CONFIG, "UR98 proximity threshhold %d\n", priv->head_thresh);
+	if(priv->head_button)
+	{
+		priv->head_lock = xf86SetIntOption(local->options, "HeadLock", DEFAULT_HEAD_LOCK);
+		xf86Msg(X_CONFIG, "UR98 proximity lock range %d\n", priv->head_thresh);
+	}
+	priv->button_5 = xf86SetBoolOption(local->options, "Button5", 0);
+	if(priv->button_5)
+		xf86Msg(X_CONFIG, "UR98 throttle mapped as button 5\n");
+	priv->swap_axes = xf86SetBoolOption(local->options, "SwapXY", 0);
+	if (priv->swap_axes) {
+		xf86Msg(X_CONFIG, "UR98 %s device will work with X and Y axes swapped\n",
+			local->name);
+	}
+	str = xf86SetStrOption(local->options, "PortraitMode", "Landscape");
+	if (strcmp(str, "Portrait") == 0) {
+		portrait = 1;
+	}
+	else if (strcmp(str, "PortraitCCW") == 0) {
+		portrait = -1;
+	}
+	else if (strcmp(str, "Landscape") != 0) {
+		xf86Msg(X_ERROR, "UR98 portrait mode should be: Portrait, Landscape or PortraitCCW");
+		str = "Landscape";
+	}
+	xf86Msg(X_CONFIG, "UR98 device will work in %s mode\n", str);      
+  
+	if (priv->max_x - priv->min_x <= 0) {
+		xf86Msg(X_INFO, "UR98: reverse x mode (minimum x position >= maximum x position)\n");
+	}  
+	if (priv->max_y - priv->min_y <= 0) {
+		xf86Msg(X_INFO, "UR98: reverse y mode (minimum y position >= maximum y position)\n");    
+	}
+
+	if (portrait == 1) {
+		/*
+		 * Portrait Clockwise: reverse Y axis and exchange X and Y.
+		 */
+		int tmp;
+		tmp = priv->min_y;
+		priv->min_y = priv->max_y;
+		priv->max_y = tmp;
+		priv->swap_axes = (priv->swap_axes==0) ? 1 : 0;
+	}
+	else if (portrait == -1) {
+		/*
+		 * Portrait Counter Clockwise: reverse X axis and exchange X and Y.
+		 */
+		int tmp;
+		tmp = priv->min_x;
+		priv->min_x = priv->max_x;
+		priv->max_x = tmp;
+		priv->swap_axes = (priv->swap_axes==0) ? 1 : 0;
+	}
+	
+	/* If we have button_5 set then we lose the 't' axis */
+	if(priv->button_5)
+		priv->axes = 3;
+	else
+		priv->axes = 4;
+		
+	/* If we have head_button set then we lose the 'z' axis */
+	if(priv->head_button)
+		priv->axes--;
+
+	xf86ProcessCommonOptions(local, local->options);
+		
+	/* mark the device configured */
+	local->flags |= XI86_CONFIGURED;
+	return local;
+
+init_err:
+	if (priv) {
+		if (priv->input_dev)
+			xfree(priv->input_dev);
+		xfree(priv);
+	}
+	if (local)
+		xfree(local);
+	return NULL;
+}
+
+#ifdef XFree86LOADER
+static
+#endif
+InputDriverRec UR98 = {
+	1,			/* driver version */
+	"ur98",			/* driver name */
+	NULL,			/* identify */
+	xf86UR98Init,		/* pre-init */
+	xf86UR98Uninit,		/* un-init */
+	NULL,			/* module */
+	0			/* ref count */
+};
+
+#ifdef XFree86LOADER
+static pointer Plug(pointer module, pointer options, int *errmaj,int *errmin)
+{
+	xf86LoaderReqSymLists(reqSymbols, NULL);
+	xf86AddInputDriver(&UR98, module, 0);
+	return module;
+}
+
+static void Unplug(pointer p)
+{
+}
+
+static XF86ModuleVersionInfo version_rec = {
+	"ur98",
+	MODULEVENDORSTRING,
+	MODINFOSTRING1,
+	MODINFOSTRING2,
+	XF86_VERSION_CURRENT,
+	1, 0, 0,
+	ABI_CLASS_XINPUT,
+	ABI_XINPUT_VERSION,
+	MOD_CLASS_XINPUT,
+	{ 0, 0, 0, 0 }
+};
+
+/*
+ * This is the entry point in the module. The name
+ * is setup after the pattern <module_name>ModuleData.
+ * Do not change it.
+ */
+XF86ModuleData ur98ModuleData = { &version_rec, Plug, Unplug };
+#endif
+
diff --git a/xc/programs/Xserver/hw/xfree86/input/wacom/xf86Wacom.c b/xc/programs/Xserver/hw/xfree86/input/wacom/xf86Wacom.c
index aaffd4909..1a942ff7f 100644
--- a/xc/programs/Xserver/hw/xfree86/input/wacom/xf86Wacom.c
+++ b/xc/programs/Xserver/hw/xfree86/input/wacom/xf86Wacom.c
@@ -22,7 +22,7 @@
  *
  */
 
-/* $XFree86: xc/programs/Xserver/hw/xfree86/input/wacom/xf86Wacom.c,v 1.31 2002/10/15 02:02:14 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/input/wacom/xf86Wacom.c,v 1.32 2003/01/15 03:48:36 dawes Exp $ */
 
 /*
  * This driver is only able to handle the Wacom IV and Wacom V protocols.
@@ -1994,7 +1994,7 @@ xf86WcmOpen(LocalDevicePtr	local)
     /* Extract version numbers */
     sscanf(buffer+loop+1, "%f", &version);
 
-    if (buffer[2] == 'G' && buffer[3] == 'D') {
+    if ((buffer[2] == 'G' || buffer[2] == 'X') && buffer[3] == 'D') {
 	DBG(2, ErrorF("detected an Intuos model\n"));
 	common->wcmProtocolLevel = 5;
 	common->wcmMaxZ = 1023;		/* max Z value */
diff --git a/xc/programs/Xserver/hw/xfree86/int10/helper_exec.c b/xc/programs/Xserver/hw/xfree86/int10/helper_exec.c
index 0897da3f3..2d6c0eb24 100644
--- a/xc/programs/Xserver/hw/xfree86/int10/helper_exec.c
+++ b/xc/programs/Xserver/hw/xfree86/int10/helper_exec.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/int10/helper_exec.c,v 1.22 2002/10/03 21:32:20 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/int10/helper_exec.c,v 1.24 2002/11/25 21:05:49 tsi Exp $ */
 /*
  *                   XFree86 int10 module
  *   execute BIOS int 10h calls in x86 real mode environment
@@ -102,13 +102,23 @@ run_bios_int(int num, xf86Int10InfoPtr pInt)
 #ifndef _PC
     /* check if bios vector is initialized */
     if (MEM_RW(pInt, (num << 2) + 2) == (SYS_BIOS >> 4)) { /* SYS_BIOS_SEG ?*/
-	xf86DrvMsgVerb(pInt->scrnIndex, X_NOT_IMPLEMENTED, 2,
-	    "Ignoring int 0x%02x call\n", num);
-	if (xf86GetVerbosity() > 3) {
-	    dump_registers(pInt);
-	    stack_trace(pInt);
+
+	if (num == 21 && X86_AH == 0x4e) {
+ 	    xf86DrvMsg(pInt->scrnIndex, X_NOTICE,
+		       "Failing Find-Matching-File on non-PC"
+			" (int 21, func 4e)\n");
+ 	    X86_AX = 2;
+ 	    SET_FLAG(F_CF);
+ 	    return 1;
+ 	} else {
+	    xf86DrvMsgVerb(pInt->scrnIndex, X_NOT_IMPLEMENTED, 2,
+			   "Ignoring int 0x%02x call\n", num);
+	    if (xf86GetVerbosity() > 3) {
+		dump_registers(pInt);
+		stack_trace(pInt);
+	    }
+	    return 1;
 	}
-	return 1;
     }
 #endif
 #ifdef PRINT_INT
diff --git a/xc/programs/Xserver/hw/xfree86/int10/helper_mem.c b/xc/programs/Xserver/hw/xfree86/int10/helper_mem.c
index 1b832b83d..6de89c5d9 100644
--- a/xc/programs/Xserver/hw/xfree86/int10/helper_mem.c
+++ b/xc/programs/Xserver/hw/xfree86/int10/helper_mem.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/int10/helper_mem.c,v 1.25 2002/09/16 18:06:08 eich Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/int10/helper_mem.c,v 1.26 2002/11/25 14:05:01 eich Exp $ */
 /*
  *                   XFree86 int10 module
  *   execute BIOS int 10h calls in x86 real mode environment
@@ -266,6 +266,14 @@ initPrimary(void* options)
     return initPrimary;
 }
 
+/*
+ * xf86int10ParseBiosLocation(): allows to set the location of the
+ * BIOS. One may select a BIOS of another card for posting or the
+ * legacy V_BIOS range located at 0xc0000 or an alternative address
+ * (BUS_ISA).
+ * This is only useful under very special circumstances and should
+ * be used with extreme care.
+ */
 void
 xf86int10ParseBiosLocation(void* options, 
 			   xf86int10BiosLocationPtr bios)
diff --git a/xc/programs/Xserver/hw/xfree86/int10/xf86int10.c b/xc/programs/Xserver/hw/xfree86/int10/xf86int10.c
index d6031a7e6..26714a992 100644
--- a/xc/programs/Xserver/hw/xfree86/int10/xf86int10.c
+++ b/xc/programs/Xserver/hw/xfree86/int10/xf86int10.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/int10/xf86int10.c,v 1.9 2002/01/25 21:56:16 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/int10/xf86int10.c,v 1.10 2002/11/25 14:05:01 eich Exp $ */
 /*
  *                   XFree86 int10 module
  *   execute BIOS int 10h calls in x86 real mode environment
@@ -754,7 +754,7 @@ int1A_handler(xf86Int10InfoPtr pInt)
 static PCITAG
 findPci(xf86Int10InfoPtr pInt, unsigned short bx)
 {
-    int bus = ((pInt->Tag >> 16) & 0x00FF00) | ((bx >> 8) & 0x00FF);
+    int bus = ((pInt->Tag >> 16) & ~0x00FF) | ((bx >> 8) & 0x00FF);
     int dev = (bx >> 3) & 0x1F;
     int func = bx & 0x7;
     if (xf86IsPciDevPresent(bus, dev, func))
diff --git a/xc/programs/Xserver/hw/xfree86/loader/Imakefile b/xc/programs/Xserver/hw/xfree86/loader/Imakefile
index b4a372213..c159a6886 100644
--- a/xc/programs/Xserver/hw/xfree86/loader/Imakefile
+++ b/xc/programs/Xserver/hw/xfree86/loader/Imakefile
@@ -1,4 +1,4 @@
-XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/loader/Imakefile,v 1.31 2002/09/16 18:06:10 eich Exp $ */
+XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/loader/Imakefile,v 1.35 2003/02/26 23:32:12 dawes Exp $ */
 
 
 
@@ -30,8 +30,12 @@ DLOBJ=dlloader.o
     SHM_DEFINES = -DHAS_SHM
 #endif
 
+#if HasGlibc21Sigsetjmp
+  SETJMPDEFINES = -DHAS_GLIBC_SIGSETJMP=1
+#endif
+
 #if defined (x86_64Architecture)
-ARCHDEFINES = -DUseMMAP -DMmapPageAlign
+ARCHDEFINES = -DDoMMAPedMerge -DMmapPageAlign
 #endif
 
 DEFINES = $(DBMALLOCDEFINE) $(DLOPENDEFINES) $(OS_DEFINES) $(COMPAT_DEFINES) \
@@ -39,7 +43,7 @@ DEFINES = $(DBMALLOCDEFINE) $(DLOPENDEFINES) $(OS_DEFINES) $(COMPAT_DEFINES) \
 
 MODULEDEFINES = -DDEFAULT_MODULE_PATH=\"$(MODULEDIR)\"
 
-   INCLUDES = -I. -I.. -I$(XF86COMSRC) -I$(XF86OSSRC) -I$(XF86OSSRC)/vbe \
+   INCLUDES = -I. -I.. -I$(XF86COMSRC) -I$(XF86OSSRC) -I$(XF86SRC)/vbe \
 		-I$(SERVERSRC)/dbe -I$(SERVERSRC)/Xext -I$(XF86SRC)/int10 \
 		-I$(SERVERSRC)/mfb -I$(SERVERSRC)/mi -I$(SERVERSRC)/include \
 		-I$(SERVERSRC)/os -I$(XINCLUDESRC) -I$(FONTINCSRC) \
@@ -73,7 +77,7 @@ NormalLibraryTarget(loader,$(OBJS) )
 NormalLibraryTarget(xloader,$(XOBJS) )
 
 SpecialCObjectRule(loadmod,NullParameter,$(MODULEDEFINES) $(EXT_DEFINES))
-SpecialCObjectRule(xf86sym,NullParameter,$(EXT_DEFINES))
+SpecialCObjectRule(xf86sym,NullParameter,$(EXT_DEFINES) $(SETJMPDEFINES))
 SpecialCObjectRule(dixsym,NullParameter,$(EXT_DEFINES))
 
 #ifdef SparcArchitecture
diff --git a/xc/programs/Xserver/hw/xfree86/loader/dixsym.c b/xc/programs/Xserver/hw/xfree86/loader/dixsym.c
index 956f5d37e..3c1d5b883 100644
--- a/xc/programs/Xserver/hw/xfree86/loader/dixsym.c
+++ b/xc/programs/Xserver/hw/xfree86/loader/dixsym.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/dixsym.c,v 1.52 2002/10/11 01:40:33 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/dixsym.c,v 1.53 2003/01/26 16:40:42 eich Exp $ */
 
 
 /*
@@ -355,6 +355,8 @@ LOOKUP dixLookupTab[] = {
   SYMFUNC(PictureTransformPoint)
   SYMFUNC(PictureAddFilter)
   SYMFUNC(PictureSetFilterAlias)
+  SYMFUNC(PictureGetSubpixelOrder)
+  SYMFUNC(PictureSetSubpixelOrder)
 #endif
 
   /* os/utils.c */
diff --git a/xc/programs/Xserver/hw/xfree86/loader/elf.h b/xc/programs/Xserver/hw/xfree86/loader/elf.h
index fd655b06f..ad072c199 100644
--- a/xc/programs/Xserver/hw/xfree86/loader/elf.h
+++ b/xc/programs/Xserver/hw/xfree86/loader/elf.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/elf.h,v 1.14 2002/09/16 18:06:10 eich Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/elf.h,v 1.15 2002/10/30 17:50:19 alanh Exp $ */
 
 
 typedef unsigned int	Elf32_Addr;
@@ -265,7 +265,7 @@ extern Elf32_Dyn _DYNAMIC [];
 #define R_ALPHA_GPVALUE		16
 #define R_ALPHA_GPRELHIGH	17
 #define R_ALPHA_GPRELLOW	18
-#define R_ALPHA_IMMED_GP_16	19
+#define R_ALPHA_GPREL16		19
 #define R_ALPHA_IMMED_GP_HI32	20
 #define R_ALPHA_IMMED_SCN_HI32	21
 #define R_ALPHA_IMMED_BR_HI32	22
diff --git a/xc/programs/Xserver/hw/xfree86/loader/elfloader.c b/xc/programs/Xserver/hw/xfree86/loader/elfloader.c
index d57e7103b..822a50efa 100644
--- a/xc/programs/Xserver/hw/xfree86/loader/elfloader.c
+++ b/xc/programs/Xserver/hw/xfree86/loader/elfloader.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/elfloader.c,v 1.44 2002/09/19 13:22:02 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/elfloader.c,v 1.49 2003/01/24 17:26:35 tsi Exp $ */
 
 /*
  *
@@ -23,6 +23,7 @@
  * PERFORMANCE OF THIS SOFTWARE.
  */
 #include <sys/types.h>
+#include <sys/mman.h>
 #include <unistd.h>
 #include <stdlib.h>
 #ifdef __QNX__
@@ -65,6 +66,29 @@
 # endif
 #endif
 
+#if defined (DoMMAPedMerge)
+# include <sys/mman.h>
+# define MergeSectionAlloc
+# define MMAP_PROT	(PROT_READ | PROT_WRITE | PROT_EXEC)
+# if !defined(linux)
+#  error    No MAP_ANON?
+# endif
+# if !defined (__x86_64__)
+# define MMAP_FLAGS     (MAP_PRIVATE | MAP_ANON)
+# else
+# define MMAP_FLAGS     (MAP_PRIVATE | MAP_ANON | MAP_32BIT)
+# endif
+# if defined (MmapPageAlign)
+#  define MMAP_ALIGN(size)    do { \
+     int pagesize = getpagesize(); \
+     size = ( size + pagesize - 1) / pagesize; \
+     size *= pagesize; \
+   } while (0);
+# else
+#  define MMAP_ALIGN(size)
+# endif
+#endif
+
 #if defined (__alpha__) || \
     defined (__ia64__) || \
     defined (__x86_64__) || \
@@ -304,7 +328,9 @@ int		size;
     elffile->baseptr = (elffile->baseptr + align - 1) & ~(align - 1);
     ret = (void *)elffile->baseptr;
     elffile->baseptr += size;
-    memset(ret, 0, size);
+#ifndef DoMMAPedMerge
+    memset(ret, 0, size); /* mmap() does this for us */
+#endif
     return ret;
 }
 #else /* MergeSectionAlloc */
@@ -860,13 +886,14 @@ int		maxalign;
 
     if (!gotsize) {
 	xf86loaderfree(elffile->got);
+#  if !defined(DoMMAPedMerge)
 	elffile->basesize += 8 + elffile->gotsize;
 	elffile->base = xf86loaderrealloc(elffile->base, elffile->basesize);
 	if (elffile->base == NULL) {
 	    ErrorF( "ELFCreateGOT() Unable to reallocate memory!!!!\n" );
 	    return FALSE;
 	}
-#if defined(linux) && defined(__ia64__)
+#   if defined(linux) && defined(__ia64__) || defined(__OpenBSD__)
 	{
 	    unsigned long page_size = getpagesize();
 	    unsigned long round;
@@ -875,7 +902,21 @@ int		maxalign;
 	    mprotect(elffile->base - round, (elffile->basesize+round+page_size-1) & ~(page_size-1),
 		     PROT_READ|PROT_WRITE|PROT_EXEC);
 	}
-#endif
+#   endif
+#  else
+	{
+	    int oldbasesize = elffile->basesize;
+	    elffile->basesize += 8 + elffile->gotsize;
+	    MMAP_ALIGN(elffile->basesize);
+	    elffile->base = mremap(elffile->base,oldbasesize,
+				   elffile->basesize,MREMAP_MAYMOVE);
+	    if (elffile->base == NULL) {
+		ErrorF( "ELFCreateGOT() Unable to remap memory!!!!\n" );
+		return FALSE;
+	    }
+	}
+#  endif
+
 	elffile->baseptr = ((long)elffile->base + (maxalign - 1)) & ~(maxalign - 1);
 	elffile->got = (unsigned char *)((long)(elffile->base + elffile->basesize - elffile->gotsize) & ~7);
     } else {
@@ -1113,6 +1154,7 @@ int		force;
 #if defined(__alpha__) 
     unsigned int *dest32h;	/* address of the high 32 bit place being modified */
     unsigned long *dest64;
+    unsigned short *dest16;
 #endif
 #if  defined(__x86_64__)
     unsigned long *dest64;
@@ -1299,6 +1341,36 @@ int		force;
 # endif
 	    break;
 	    }
+
+	case R_ALPHA_GPRELLOW:
+	    {
+	    dest64=(unsigned long *)(secp+rel->r_offset);
+	    dest16=(unsigned short *)dest64;
+
+	    symval += rel->r_addend;
+	    symval = ((unsigned char *)symval)-((unsigned char *)elffile->got);
+
+	    *dest16=symval;
+	    break;
+	    }
+
+	case R_ALPHA_GPRELHIGH:
+	    {
+	    dest64=(unsigned long *)(secp+rel->r_offset);
+	    dest16=(unsigned short *)dest64;
+
+	    symval += rel->r_addend;
+	    symval = ((unsigned char *)symval)-((unsigned char *)elffile->got);
+	    symval = ((long)symval >> 16) + ((symval >> 15) & 1);
+	    if( (long)symval > 0x7fff || (long)symval < -(long)0x8000 ) {
+		FatalError("R_ALPHA_GPRELHIGH symval-got is too large for %s:%lx\n",
+		ElfGetSymbolName(elffile,ELF_R_SYM(rel->r_info)),symval);
+	    }
+
+	    *dest16=symval;
+	    break;
+	    }
+
 	case R_ALPHA_LITERAL:
 	    {
 	    ELFGotEntryPtr gotent;
@@ -1439,6 +1511,23 @@ int		force;
 	    ELFDEBUG( "*dest32=%8.8x\n", *dest32 );
 # endif
 	  break;
+
+ 	case R_ALPHA_GPREL16:
+ 	    {
+ 	    dest64=(unsigned long *)(secp+rel->r_offset);
+ 	    dest16=(unsigned short *)dest64;
+ 
+ 	    symval += rel->r_addend;
+ 	    symval = ((unsigned char *)symval)-((unsigned char *)elffile->got);
+ 	    if( (long)symval > 0x7fff ||
+ 	        (long)symval < -(long)0x8000 ) {
+ 		FatalError("R_ALPHA_GPREL16 symval-got is too large for %s:%lx\n",
+ 			ElfGetSymbolName(elffile,ELF_R_SYM(rel->r_info)),symval);
+ 	    }
+ 
+ 	    *dest16=symval;
+ 	    break;
+  	    }
 	  
 #endif /* alpha */
 #if defined(__mc68000__)
@@ -2376,7 +2465,6 @@ unsigned short  **psecttable;
  *
  * Do the work required to load each section into memory.
  */
-
 static void
 ELFCollectSections(elffile,pass,totalsize,maxalign)
 ELFModulePtr	elffile;
@@ -2405,6 +2493,8 @@ int		*maxalign;
 	case SHT_STRTAB:
 	    if (!strcmp(name,".shstrtab")) /* already loaded */
 		continue;
+	    if (!strcmp(name,".stabstr"))  /* ignore debug info */
+		continue;
 	case SHT_SYMTAB:
 	    if (pass) continue;
 	    flags = LOADED_SECTION;
@@ -2446,10 +2536,10 @@ int		*maxalign;
 					 SecSize(i), name);
 	    } else {
 		if( SecSize(i) )
-		    elffile->lsection[j].saddr 
+		    elffile->lsection[j].saddr  
 			= ELFLoaderSectCalloc(elffile,SecAlign(i),
 					      SecSize(i));
-		else
+	        else
 		    elffile->lsection[j].saddr = NULL;
 	    }
 	} else {
@@ -2467,6 +2557,12 @@ int		*maxalign;
 	elffile->lsection[j].size=SecSize(i);
 	elffile->lsection[j].flags=flags;
 	switch (SecType(i)) {
+#ifdef __OpenBSD__
+	case SHT_PROGBITS:
+	    mprotect(elffile->lsection[j].saddr, SecSize(i), 
+		     PROT_READ|PROT_WRITE|PROT_EXEC);
+	    break;
+#endif
 	case SHT_SYMTAB:
 	    elffile->symtab = (Elf_Sym *)elffile->saddr[i];
 	    elffile->symndx = i;
@@ -2651,12 +2747,14 @@ LOOKUP **ppLookup;
 
 #ifdef MergeSectionAlloc
     elffile->basesize = totalsize + maxalign;
+ 
+# if !defined(DoMMAPedMerge)
     elffile->base = xf86loadermalloc(elffile->basesize);
     if (elffile->base == NULL) {
 	ErrorF( "Unable to allocate ELF sections\n" );
 	return NULL;
     }
-#if defined(linux) && defined(__ia64__)
+#  if defined(linux) && defined(__ia64__) || defined(__OpenBSD__)
     {
 	unsigned long page_size = getpagesize();
 	unsigned long round;
@@ -2665,7 +2763,16 @@ LOOKUP **ppLookup;
 	mprotect(elffile->base - round, (elffile->basesize+round+page_size-1) & ~(page_size-1),
 		 PROT_READ|PROT_WRITE|PROT_EXEC);
     }
-#endif
+#  endif
+# else 
+    MMAP_ALIGN(elffile->basesize);
+    elffile->base = mmap( 0,elffile->basesize,MMAP_PROT,MMAP_FLAGS,-1,
+			  (off_t)0);
+    if (elffile->base == NULL) {
+	ErrorF( "Unable to mmap ELF sections\n" );
+	return NULL;
+    }
+# endif
     elffile->baseptr = ((long)elffile->base + (maxalign - 1)) & ~(maxalign - 1);
 #endif
 
@@ -2812,7 +2919,11 @@ void *modptr;
 /*
  * Free the sections that were allocated.
  */
-#define CheckandFree(ptr,size)  if(ptr) xf86loaderfree(ptr)
+#if !defined (DoMMAPedMerge)
+# define CheckandFree(ptr,size)  if(ptr) xf86loaderfree(ptr)
+#else 
+# define CheckandFree(ptr,size) if (ptr) munmap(ptr,size)
+#endif
 #define CheckandFreeFile(ptr,size)  if(ptr) _LoaderFreeFileMem((ptr),(size))
 
 #ifdef MergeSectionAlloc
diff --git a/xc/programs/Xserver/hw/xfree86/loader/fontsym.c b/xc/programs/Xserver/hw/xfree86/loader/fontsym.c
index df1d9e840..50def63ea 100644
--- a/xc/programs/Xserver/hw/xfree86/loader/fontsym.c
+++ b/xc/programs/Xserver/hw/xfree86/loader/fontsym.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/fontsym.c,v 1.9 2001/11/17 16:05:59 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/fontsym.c,v 1.11 2002/12/09 17:30:12 dawes Exp $ */
 
 #include "font.h"
 #include "sym.h"
@@ -11,6 +11,7 @@
 #include "fntfil.h"
 #include "fontutil.h"
 #include "fontxlfd.h"
+#define _FONTCACHE_SERVER_
 #include "fontcache.h"
 
 LOOKUP fontLookupTab[] = {
@@ -22,6 +23,7 @@ LOOKUP fontLookupTab[] = {
   SYMFUNC(BufFileWrite)
   SYMFUNC(CheckFSFormat)
   SYMFUNC(FontFileOpen)
+  SYMFUNC(FontFilePriorityRegisterRenderer)
   SYMFUNC(FontFileRegisterRenderer)
   SYMFUNC(FontParseXLFDName)
   SYMFUNC(FontFileCloseFont)
diff --git a/xc/programs/Xserver/hw/xfree86/loader/loader.c b/xc/programs/Xserver/hw/xfree86/loader/loader.c
index 4c0471468..e09fa50b0 100644
--- a/xc/programs/Xserver/hw/xfree86/loader/loader.c
+++ b/xc/programs/Xserver/hw/xfree86/loader/loader.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/loader.c,v 1.62 2002/09/16 18:06:10 eich Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/loader.c,v 1.63 2002/11/25 14:05:03 eich Exp $ */
 
 /*
  *
@@ -330,7 +330,7 @@ LoaderInit(void)
 
 #if defined(linux) && \
     (defined(__alpha__) || defined(__powerpc__) || defined(__ia64__) \
-     || ( defined __x86_64__ && ! defined UseMMAP))
+     || ( defined __x86_64__ && ! defined UseMMAP && ! defined DoMMAPedMerge))
     /*
      * The glibc malloc uses mmap for large allocations anyway. This breaks
      * some relocation types because the offset overflow. See loader.h for more
@@ -428,17 +428,17 @@ _LoaderFileToMem(int fd, unsigned long offset,int size, char *label)
 {
 #ifdef UseMMAP
     unsigned long ret;	
-#ifdef MmapPageAlign
+# ifdef MmapPageAlign
     unsigned long pagesize;
     unsigned long new_size;
     unsigned long new_off;
     unsigned long new_off_bias;
-#endif
-#define MMAP_PROT	(PROT_READ|PROT_WRITE|PROT_EXEC)
+# endif
+# define MMAP_PROT	(PROT_READ|PROT_WRITE|PROT_EXEC)
 
-#ifdef DEBUGMEM
+# ifdef DEBUGMEM
     ErrorF("_LoaderFileToMem(%d,%u(%u),%d,%s)",fd,offset,offsetbias,size,label);
-#endif
+# endif
 # ifdef MmapPageAlign
     pagesize = getpagesize();
     new_size = (size + pagesize - 1) / pagesize;
@@ -448,9 +448,9 @@ _LoaderFileToMem(int fd, unsigned long offset,int size, char *label)
     new_off_bias = (offset + offsetbias) - new_off;
     if ((new_off_bias + size) > new_size) new_size += pagesize;
     ret = (unsigned long) mmap(0,new_size,MMAP_PROT,MAP_PRIVATE
-#ifdef __x86_64__
+#  ifdef __x86_64__
 			       | MAP_32BIT
-#endif
+#  endif
 			       ,
 			       fd,new_off);
     if(ret == -1)
@@ -458,9 +458,9 @@ _LoaderFileToMem(int fd, unsigned long offset,int size, char *label)
     return (void *)(ret + new_off_bias);
 # else
     ret = (unsigned long) mmap(0,size,MMAP_PROT,MAP_PRIVATE
-#ifdef __x86_64__
+#  ifdef __x86_64__
 			       | MAP_32BIT
-#endif
+#  endif
 			       ,
 			       fd,offset + offsetbias);
     if(ret == -1)
@@ -470,25 +470,25 @@ _LoaderFileToMem(int fd, unsigned long offset,int size, char *label)
 #else
     char *ptr;
 
-#ifdef DEBUGMEM
+# ifdef DEBUGMEM
     ErrorF("_LoaderFileToMem(%d,%u(%u),%d,%s)",fd,offset,offsetbias,size,label);
-#endif
+# endif
 
     if(size == 0){
-#ifdef DEBUGMEM
+# ifdef DEBUGMEM
 	ErrorF("=NULL\n",ptr);
-#endif
+# endif
 	return NULL;
     }
 
-#ifndef __UNIXOS2__
+# ifndef __UNIXOS2__
     if( (ptr=xf86loadercalloc(size,1)) == NULL )
 	FatalError("_LoaderFileToMem() malloc failed\n" );
-#else
+# else
     if( (ptr=os2ldcalloc(size,1)) == NULL )
 	FatalError("_LoaderFileToMem() malloc failed\n" );
-#endif
-#if defined(linux) && defined(__ia64__)
+# endif
+# if defined(linux) && defined(__ia64__)
     {
 	unsigned long page_size = getpagesize();
 	unsigned long round;
@@ -497,7 +497,7 @@ _LoaderFileToMem(int fd, unsigned long offset,int size, char *label)
 	mprotect(ptr - round, (size+round+page_size-1) & ~(page_size-1),
 		 PROT_READ|PROT_WRITE|PROT_EXEC);
     }
-#endif
+# endif
 
     if(lseek(fd,offset+offsetbias,SEEK_SET)<0)
 	FatalError("\n_LoaderFileToMem() lseek() failed: %s\n",strerror(errno));
@@ -505,7 +505,7 @@ _LoaderFileToMem(int fd, unsigned long offset,int size, char *label)
     if(read(fd,ptr,size)!=size)
 	FatalError("\n_LoaderFileToMem() read() failed: %s\n",strerror(errno));
 
-#if (defined(linux) || defined(__NetBSD__) || defined(__OpenBSD__)) \
+# if (defined(linux) || defined(__NetBSD__) || defined(__OpenBSD__)) \
     && defined(__powerpc__) 
     /*
      * Keep the instruction cache in sync with changes in the
@@ -517,11 +517,11 @@ _LoaderFileToMem(int fd, unsigned long offset,int size, char *label)
 	    ppc_flush_icache(ptr+i); 
 	ppc_flush_icache(ptr+size-1); 
     } 
-#endif
+# endif
 
-#ifdef DEBUGMEM
+# ifdef DEBUGMEM
     ErrorF("=%lx\n",ptr);
-#endif
+# endif
 
     return (void *)ptr;
 #endif
diff --git a/xc/programs/Xserver/hw/xfree86/loader/xf86sym.c b/xc/programs/Xserver/hw/xfree86/loader/xf86sym.c
index 959099282..8330a67d1 100644
--- a/xc/programs/Xserver/hw/xfree86/loader/xf86sym.c
+++ b/xc/programs/Xserver/hw/xfree86/loader/xf86sym.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/xf86sym.c,v 1.218 2002/10/20 21:48:49 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/xf86sym.c,v 1.227 2003/02/26 20:08:02 dawes Exp $ */
 
 /*
  *
@@ -26,6 +26,7 @@
 #define INCLUDE_DEPRECATED 1
 
 #include <fcntl.h>
+#include <setjmp.h>
 #include "sym.h"
 #include "misc.h"
 #include "mi.h"
@@ -61,6 +62,13 @@
 #endif
 #include "compiler.h"
 
+#ifndef HAS_GLIBC_SIGSETJMP
+#if defined(setjmp) && \
+    defined(__GLIBC__) && __GLIBC__ == 2 && __GLIBC_MINOR__ < 2
+#define HAS_GLIBC_SIGSETJMP 1
+#endif
+#endif
+
 #ifdef __FreeBSD__
 /* XXX used in drmOpen(). This should change to use a less os-specific
  * method. */
@@ -99,12 +107,14 @@ extern void* __remqu(long, long);
 #endif
 
 #if defined(__GNUC__)
+extern long __div64(long, long);
 extern long __divdf3(long, long);
 extern long __divdi3(long, long);
 extern long __divsf3(long, long);
 extern long __divsi3(long, long);
 extern long __moddi3(long, long);
 extern long __modsi3(long, long);
+extern long __mul64(long, long);
 extern long __muldf3(long, long);
 extern long __muldi3(long, long);
 extern long __mulsf3(long, long);
@@ -113,12 +123,14 @@ extern long __udivdi3(long, long);
 extern long __udivsi3(long, long);
 extern long __umoddi3(long, long);
 extern long __umodsi3(long, long);
+#pragma weak __div64
 #pragma weak __divdf3
 #pragma weak __divdi3
 #pragma weak __divsf3
 #pragma weak __divsi3
 #pragma weak __moddi3
 #pragma weak __modsi3
+#pragma weak __mul64
 #pragma weak __muldf3
 #pragma weak __muldi3
 #pragma weak __mulsf3
@@ -414,6 +426,7 @@ LOOKUP xfree86LookupTab[] = {
    SYMFUNC(xf86GetAllowMouseOpenFail)
    SYMFUNC(xf86CommonSpecialKey)
    SYMFUNC(xf86IsPc98)
+   SYMFUNC(xf86DisableRandR)
    SYMFUNC(xf86GetVersion)
    SYMFUNC(xf86GetModuleVersion)
    SYMFUNC(xf86GetClocks)
@@ -605,6 +618,7 @@ LOOKUP xfree86LookupTab[] = {
    SYMFUNC(MiscExtCreateStruct)
    SYMFUNC(MiscExtDestroyStruct)
    SYMFUNC(MiscExtApply)
+   SYMFUNC(MiscExtGetFilePaths)
 #endif
 
    /* Misc */
@@ -828,8 +842,9 @@ LOOKUP xfree86LookupTab[] = {
    SYMFUNC(xf86strcspn)
    SYMFUNC(xf86strerror)
    SYMFUNC(xf86strlen)
-   SYMFUNC(xf86strncmp)
    SYMFUNC(xf86strncasecmp)
+   SYMFUNC(xf86strncat)
+   SYMFUNC(xf86strncmp)
    SYMFUNC(xf86strncpy)
    SYMFUNC(xf86strpbrk)
    SYMFUNC(xf86strchr)
@@ -880,8 +895,17 @@ LOOKUP xfree86LookupTab[] = {
    SYMFUNC(xf86shmat)
    SYMFUNC(xf86shmdt)
    SYMFUNC(xf86shmctl)
+#ifdef HAS_GLIBC_SIGSETJMP
    SYMFUNC(xf86setjmp)
-   SYMFUNC(xf86longjmp)
+   SYMFUNCALIAS("xf86setjmp1",__sigsetjmp)
+#else
+   SYMFUNCALIAS("xf86setjmp",setjmp)
+   SYMFUNC(xf86setjmp1)
+#endif
+   SYMFUNCALIAS("xf86longjmp",longjmp)
+   SYMFUNC(xf86getjmptype)
+   SYMFUNC(xf86setjmp1_arg2)
+   SYMFUNC(xf86setjmperror)
 #ifdef XF86DRI
 				/* These may have more general uses, but
                                    for now, they are only used by the DRI.
@@ -914,6 +938,12 @@ LOOKUP xfree86LookupTab[] = {
    SYMFUNC(_inb)
    SYMFUNC(_inw)
    SYMFUNC(_inl)
+   SYMFUNC(_alpha_outw)
+   SYMFUNC(_alpha_outb)
+   SYMFUNC(_alpha_outl)
+   SYMFUNC(_alpha_inb)
+   SYMFUNC(_alpha_inw)
+   SYMFUNC(_alpha_inl)
 # else
    SYMFUNC(outw)
    SYMFUNC(outb)
@@ -1000,12 +1030,14 @@ LOOKUP xfree86LookupTab[] = {
 # endif
 #endif
 #if defined(__GNUC__)
+   SYMFUNC(__div64)
    SYMFUNC(__divdf3)
    SYMFUNC(__divdi3)
    SYMFUNC(__divsf3)
    SYMFUNC(__divsi3)
    SYMFUNC(__moddi3)
    SYMFUNC(__modsi3)
+   SYMFUNC(__mul64)
    SYMFUNC(__muldf3)
    SYMFUNC(__muldi3)
    SYMFUNC(__mulsf3)
@@ -1051,6 +1083,7 @@ LOOKUP xfree86LookupTab[] = {
    SYMVAR(xf86PixmapIndex)
    SYMVAR(xf86Screens)
    SYMVAR(byte_reversed)
+   SYMVAR(xf86inSuspend)
    /* debugging variables */
 #ifdef BUILDDEBUG
    SYMVAR(xf86p8bit)
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/Imakefile b/xc/programs/Xserver/hw/xfree86/os-support/Imakefile
index 3a0a4122d..8864dda3d 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/Imakefile
+++ b/xc/programs/Xserver/hw/xfree86/os-support/Imakefile
@@ -1,4 +1,4 @@
-XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/Imakefile,v 3.55 2002/08/06 13:13:15 herrb Exp $
+XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/Imakefile,v 3.56 2003/02/17 17:06:45 dawes Exp $
 
 
 
@@ -87,18 +87,14 @@ DRM_OBJ = $(OS_SUBDIR)/drm/?*.o
 DRM_DONES = $(OS_SUBDIR)/drm/DONE
 #endif
 
-VBE_SRC = vbe/?*.c
-VBE_OBJ = vbe/?*.o
-VBE_DONES = vbe/DONE
-
 #endif
 
-SUBDIRS = $(OS_SUBDIR) $(BUS_SUBDIR) misc vbe
+SUBDIRS = $(OS_SUBDIR) $(BUS_SUBDIR) misc
 
-SRCS = $(OS_SUBDIR)/?*.c $(BUS_SUBDIR)/?*.c misc/?*.c $(VBE_SRC) $(DRM_SRC)
-OBJS = $(OS_SUBDIR)/?*.o $(BUS_SUBDIR)/?*.o misc/?*.o $(VBE_OBJ) $(DRM_OBJ)
+SRCS = $(OS_SUBDIR)/?*.c $(BUS_SUBDIR)/?*.c misc/?*.c $(DRM_SRC)
+OBJS = $(OS_SUBDIR)/?*.o $(BUS_SUBDIR)/?*.o misc/?*.o $(DRM_OBJ)
 
-DONES = $(OS_SUBDIR)/DONE $(BUS_SUBDIR)/DONE misc/DONE $(VBE_DONES) $(DRM_DONES)
+DONES = $(OS_SUBDIR)/DONE $(BUS_SUBDIR)/DONE misc/DONE $(DRM_DONES)
 
 #if HasParallelMake
 MakeMutex($(SUBDIRS) $(OBJS) $(DONES))
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/Imakefile b/xc/programs/Xserver/hw/xfree86/os-support/bsd/Imakefile
index 66c534ed7..c89a76d13 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bsd/Imakefile
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/Imakefile
@@ -4,7 +4,7 @@ XCOMM $XConsortium: Imakefile /main/12 1996/10/27 11:06:35 kaleb $
 
 
 
-XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/Imakefile,v 3.53 2002/10/11 01:40:34 dawes Exp $
+XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/Imakefile,v 3.57 2003/02/17 16:37:19 dawes Exp $
 
 #include <Server.tmpl>
 
@@ -23,29 +23,36 @@ SHARED_CFLAGS = PositionIndependentCFlags
 #endif
 #endif
 
-#if defined(OpenBSDArchitecture) || defined(NetBSDArchitecture) \
+#if defined(NetBSDArchitecture) \
     && ((OSMajorVersion == 1 && OSMinorVersion >= 1) || OSMajorVersion >= 2)
 # if defined(AlphaArchitecture)
- IOPERMDEFINES = -DUSE_ALPHA_PIO
+  IOPERMDEFINES = -DUSE_ALPHA_PIO
 # elif defined(ArcArchitecture)
- IOPERMDEFINES = -DUSE_ARC_MMAP
+  IOPERMDEFINES = -DUSE_ARC_MMAP
 # elif defined(Arm32Architecture)
- IOPERMDEFINES = -DUSE_ARM32_MMAP
+  IOPERMDEFINES = -DUSE_ARM32_MMAP
 # elif defined(PpcArchitecture) || \
 	defined(Sparc64Architecture)
   IOPERM_SRC = ioperm_noop.c
   IOPERM_OBJ = ioperm_noop.o
 # else
- IOPERMDEFINES = -DUSE_I386_IOPL
+  IOPERMDEFINES = -DUSE_I386_IOPL
+# endif
+#elif defined(OpenBSDArchitecture) 
+# if defined(i386Architecture) 
+  IOPERMDEFINES = -DUSE_I386_IOPL
+# elif defined(PpcArchitecture) || defined(Sparc64Architecture) 
+  IOPERM_SRC = ioperm_noop.c
+  IOPERM_OBJ = ioperm_noop.o
 # endif
 #elif defined(FreeBSDArchitecture) && !defined(AlphaBsdArchitecture)
- IOPERMDEFINES = -DUSE_DEV_IO
+  IOPERMDEFINES = -DUSE_DEV_IO
 #else
 # if defined(AlphaBsdArchitecture)
- IOPERMDEFINES = -DUSE_ALPHA_PORTS
+  IOPERMDEFINES = -DUSE_ALPHA_PORTS
 # else
-IOPERM_SRC = ioperm_noop.c
-IOPERM_OBJ = ioperm_noop.o
+  IOPERM_SRC = ioperm_noop.c
+  IOPERM_OBJ = ioperm_noop.o
 # endif
 #endif
 
@@ -68,6 +75,10 @@ MTRRDEFINES = -DHAS_MTRR_SUPPORT
 MTRRDEFINES = -DHAS_MTRR_BUILTIN
 #endif
 
+#if defined(FreeBSDArchitecture)
+SYSVIPCDEFINES = -DHAVE_SYSV_IPC
+#endif
+
 #if UsbMouseSupport
 USBMOUSEDEFINES1 = -DUSBMOUSE_SUPPORT
 #if !HasLibUsb
@@ -160,12 +171,12 @@ INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) -I. -I$(SERVERSRC)/include \
 CONSDEFINES = XFree86ConsoleDefines
 RESDEFINES = -DUSESTDRES
 
-#if HasNetBSDApertureDriver
+#if defined(HasNetBSDApertureDriver) && HasNetBSDApertureDriver
 APDEFINES = -DHAS_APERTURE_DRV
 #endif
 
 DEFINES = $(CONSDEFINES) $(APDEFINES) $(IOPERMDEFINES) $(RESDEFINES) \
-	  $(MTRRDEFINES) $(USBMOUSEDEFINES)
+	  $(MTRRDEFINES) $(USBMOUSEDEFINES) $(SYSVIPCDEFINES)
 
 #if defined(AlphaArchitecture)
 SpecialObjectRule(bsd_ev56.o, bsd_ev56.c, -mcpu=ev56)
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/alpha_video.c b/xc/programs/Xserver/hw/xfree86/os-support/bsd/alpha_video.c
index 6d91ced96..d3e162532 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bsd/alpha_video.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/alpha_video.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/alpha_video.c,v 1.1 2002/08/06 13:08:38 herrb Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/alpha_video.c,v 1.2 2002/10/29 23:19:13 herrb Exp $ */
 /*
  * Copyright 1992 by Rich Murphey <Rich@Rice.edu>
  * Copyright 1993 by David Wexelblat <dwex@goblin.org>
@@ -24,7 +24,6 @@
  *
  */
 
-
 /* $XConsortium: bsd_video.c /main/10 1996/10/25 11:37:57 kaleb $ */
 
 #include "X.h"
@@ -69,8 +68,18 @@ memory_base(void)
     if (base == 0) {
 	size_t len = sizeof(base);
 	int error;
+#ifdef __OpenBSD__
+       int mib[3];
+
+       mib[0] = CTL_MACHDEP;
+       mib[1] = CPU_CHIPSET;
+       mib[2] = CPU_CHIPSET_MEM;
+
+       if ((error = sysctl(mib, 3, &base, &len, NULL, 0)) < 0)
+#else
 	if ((error = sysctlbyname("hw.chipset.memory", &base, &len,
 				  0, 0)) < 0)
+#endif
 	    FatalError("xf86MapVidMem: can't find memory\n");
     }
 
@@ -83,10 +92,23 @@ has_bwx(void)
     static int bwx = 0;
     size_t len = sizeof(bwx);
     int error;
+#ifdef __OpenBSD__
+    int mib[3];
+
+    mib[0] = CTL_MACHDEP;
+    mib[1] = CPU_CHIPSET;
+    mib[2] = CPU_CHIPSET_BWX;
+
+    if ((error = sysctl(mib, 3, &bwx, &len, NULL, 0)) < 0)
+	return FALSE;
+    else
+	return bwx;
+#else
     if ((error = sysctlbyname("hw.chipset.bwx", &bwx, &len, 0, 0)) < 0)
 	return FALSE;
     else
 	return bwx;
+#endif
 }
 #else /* __NetBSD__ */
 static struct alpha_bus_window *abw;
@@ -108,7 +130,8 @@ has_bwx(void)
 	if (abw_count < 0)
 		init_abw();
 
-xf86Msg(X_INFO, "has_bwx = %d\n", abw[0].abw_abst.abst_flags & ABST_BWX ? 1 : 0);	/* XXXX */
+	xf86Msg(X_INFO, "has_bwx = %d\n", 
+		abw[0].abw_abst.abst_flags & ABST_BWX ? 1 : 0);	/* XXXX */
 	return abw[0].abw_abst.abst_flags & ABST_BWX;
 }
 
@@ -119,7 +142,8 @@ dense_base()
 		init_abw();
 
 	/* XXX check abst_flags for ABST_DENSE just to be safe? */
-xf86Msg(X_INFO, "dense base = %#lx\n", abw[0].abw_abst.abst_sys_start);			/* XXXX */
+	xf86Msg(X_INFO, "dense base = %#lx\n", 
+		abw[0].abw_abst.abst_sys_start); /* XXXX */
 	return abw[0].abw_abst.abst_sys_start;
 }
 
@@ -147,9 +171,18 @@ memory_base()
 /* Video Memory Mapping section                                            */
 /***************************************************************************/
 
+#ifdef __OpenBSD__
+#define SYSCTL_MSG "\tCheck that you have set 'machdep.allowaperture=1'\n"\
+                  "\tin /etc/sysctl.conf and reboot your machine\n" \
+                  "\trefer to xf86(4) for details"
+#endif
+
 static Bool useDevMem = FALSE;
 static int  devMemFd = -1;
 
+#ifdef HAS_APERTURE_DRV
+#define DEV_APERTURE "/dev/xf86"
+#endif
 #define DEV_MEM "/dev/mem"
 
 static pointer mapVidMem(int, unsigned long, unsigned long, int);
@@ -172,36 +205,65 @@ checkDevMem(Bool warn)
 	    return;
 	devMemChecked = TRUE;
 
-	if ((fd = open(DEV_MEM, O_RDWR)) >= 0)
-	{
+#ifdef HAS_APERTURE_DRV
+       /* Try the aperture driver first */
+       if ((fd = open(DEV_APERTURE, O_RDWR)) >= 0) {
+           /* Try to map a page at the VGA address */
+           base = mmap((caddr_t)0, 4096, PROT_READ|PROT_WRITE,
+                            MAP_FLAGS, fd, (off_t)0xA0000 + BUS_BASE);
+       
+           if (base != MAP_FAILED) {
+               munmap((caddr_t)base, 4096);
+               devMemFd = fd;
+               useDevMem = TRUE;
+               xf86Msg(X_INFO, "checkDevMem: using aperture driver %s\n",
+                       DEV_APERTURE);
+               return;
+           } else {
+               if (warn) {
+                   xf86Msg(X_WARNING, "checkDevMem: failed to mmap %s (%s)\n",
+                           DEV_APERTURE, strerror(errno));
+               }
+           }
+       } 
+#endif
+       if ((fd = open(DEV_MEM, O_RDWR)) >= 0) {
 	    /* Try to map a page at the VGA address */
 	    base = mmap((caddr_t)0, 4096, PROT_READ|PROT_WRITE,
 				 MAP_FLAGS, fd, (off_t)0xA0000 + BUS_BASE);
 	
-	    if (base != MAP_FAILED)
-	    {
+	    if (base != MAP_FAILED) {
 		munmap((caddr_t)base, 4096);
 		devMemFd = fd;
 		useDevMem = TRUE;
 		return;
 	    } else {
-		/* This should not happen */
-		if (warn)
-		{
+		if (warn) {
 		    xf86Msg(X_WARNING, "checkDevMem: failed to mmap %s (%s)\n",
 			    DEV_MEM, strerror(errno));
 		}
-		useDevMem = FALSE;
-		return;
 	    }
 	}
-	if (warn)
-	{ 
-	    xf86Msg(X_WARNING, "checkDevMem: failed to open %s (%s)\n",
-		    DEV_MEM, strerror(errno));
-	} 
+	if (warn) { 
+#ifndef HAS_APERTURE_DRV
+           xf86Msg(X_WARNING, "checkDevMem: failed to open/mmap %s (%s)\n",
+                   DEV_MEM, strerror(errno));
+           xf86ErrorF("\tlinear framebuffer access unavailable\n");
+#else
+#ifndef __OpenBSD__
+           xf86Msg(X_WARNING, "checkDevMem: failed to open %s and %s\n"
+               "\t(%s)\n", DEV_APERTURE, DEV_MEM, strerror(errno));
+#else /* __OpenBSD__ */
+           xf86Msg(X_WARNING, "checkDevMem: failed to open %s and %s\n"
+                   "\t(%s)\n%s", DEV_APERTURE, DEV_MEM, strerror(errno),
+                   SYSCTL_MSG);
+#endif /* __OpenBSD__ */
+	   
+           xf86ErrorF("\tlinear framebuffer access unavailable\n");
+	}
 	useDevMem = FALSE;
 	return;
+#endif
 }
 
 void
@@ -211,11 +273,11 @@ xf86OSInitVidMem(VidMemInfoPtr pVidMem)
 	pVidMem->linearSupported = useDevMem;
 
 	if (has_bwx()) {
-	    xf86Msg(X_INFO,"Machine type has 8/16 bit access\n");
+	    xf86Msg(X_PROBED,"Machine type has 8/16 bit access\n");
 	    pVidMem->mapMem = mapVidMem;
 	    pVidMem->unmapMem = unmapVidMem;
 	} else {
-	    xf86Msg(X_INFO,"Machine needs sparse mapping\n");
+	    xf86Msg(X_PROBED,"Machine needs sparse mapping\n");
 	    pVidMem->mapMem = mapVidMemSparse;
 	    pVidMem->unmapMem = unmapVidMemSparse;
 	    if (axpSystem == -1)
@@ -304,15 +366,10 @@ xf86ReadBIOS(unsigned long Base, unsigned long Offset, unsigned char *Buf,
 		xf86Msg(X_WARNING, 
 			"xf86ReadBIOS: %s mmap[s=%x,a=%x,o=%x] failed (%s)\n",
 			DEV_MEM, Len, Base, Offset, strerror(errno));
-#ifdef __OpenBSD__
-		if (Base < 0xa0000) {
-		    xf86Msg(X_WARNING, SYSCTL_MSG2);
-		} 
-#endif
 		return(-1);
 	}
 #ifdef DEBUG
-	ErrorF("xf86ReadBIOS: BIOS at 0x%08x has signature 0x%04x\n",
+	xf86MsgVerb(X_INFO, 3, "xf86ReadBIOS: BIOS at 0x%08x has signature 0x%04x\n",
 		Base, ptr[0] | (ptr[1] << 8));
 #endif
 	(void)memcpy(Buf, (void *)(ptr + Offset), Len);
@@ -326,7 +383,7 @@ xf86ReadBIOS(unsigned long Base, unsigned long Offset, unsigned char *Buf,
 }
 
 
-#if defined(__FreeBSD__)
+#if defined(__FreeBSD__) || defined(__OpenBSD__)
 
 extern int ioperm(unsigned long from, unsigned long num, int on);
 
@@ -343,7 +400,7 @@ xf86DisableIO()
 	return;
 }
 
-#endif /* __FreeBSD__ */
+#endif /* __FreeBSD__ || __OpenBSD__ */
 
 #ifdef USE_ALPHA_PIO
 
@@ -425,7 +482,7 @@ struct parms {
 	u_int64_t hae;
 };
 
-static void
+static int
 sethae(u_int64_t hae)
 {
 #ifdef __FreeBSD__
@@ -433,6 +490,9 @@ sethae(u_int64_t hae)
 	p.hae = hae;
 	return (sysarch(ALPHA_SETHAE, (char *)&p));
 #endif
+#ifdef __OpenBSD__
+	return -1;
+#endif
 }
 
 static pointer
@@ -640,4 +700,3 @@ int  (*xf86ReadMmio16)(pointer Base, unsigned long Offset)
 int  (*xf86ReadMmio32)(pointer Base, unsigned long Offset)
      = readDense32;
 
-#endif /* __FreeBSD__  */
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_axp.c b/xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_axp.c
index 4ab8735b5..c38ac073c 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_axp.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_axp.c
@@ -1,10 +1,11 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_axp.c,v 1.1 2001/02/15 19:34:18 eich Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_axp.c,v 1.2 2002/10/29 23:19:13 herrb Exp $ */
 
 #include "X.h"
 #include "os.h"
 #include "xf86.h"
 #include "xf86Priv.h"
 #include "xf86Axp.h"
+#include <sys/param.h>
 #include "xf86_OSlib.h"
 #include <stdio.h>
 #include <sys/sysctl.h>
@@ -42,8 +43,19 @@ bsdGetAXP(void)
 	char sysname[64];
 	size_t len = sizeof(sysname);
 	
+#ifdef __OpenBSD__
+	int mib[3];
+	int error;
+
+	mib[0] = CTL_MACHDEP;
+	mib[1] = CPU_CHIPSET;
+	mib[2] = CPU_CHIPSET_TYPE;
+
+	if ((error = sysctl(mib, 3, &sysname, &len, NULL, 0)) < 0)
+#else	
 	if ((sysctlbyname("hw.chipset.type", &sysname, &len,
                                   0, 0)) < 0)
+#endif
             FatalError("bsdGetAXP: can't find machine type\n");
 #ifdef DEBUG
 	xf86Msg(X_INFO,"AXP is a: %s\n",sysname);
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_kbd.c b/xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_kbd.c
index 661208849..20d8b04d4 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_kbd.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_kbd.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_kbd.c,v 1.3 2002/10/21 20:38:04 herrb Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_kbd.c,v 1.5 2003/02/17 15:11:56 dawes Exp $ */
 
 /*
  * Copyright (c) 2002 by The XFree86 Project, Inc.
@@ -41,7 +41,7 @@ typedef struct {
 } BsdKbdPrivRec, *BsdKbdPrivPtr;
 
 static
-void KbdInit(InputInfoPtr pInfo)
+int KbdInit(InputInfoPtr pInfo, int what)
 {
     KbdDevPtr pKbd = (KbdDevPtr) pInfo->private;
     BsdKbdPrivPtr priv = (BsdKbdPrivPtr) pKbd->private;
@@ -60,6 +60,8 @@ void KbdInit(InputInfoPtr pInfo)
 	         break;
         }
     }
+
+    return Success;
 }
 
 static void
@@ -138,7 +140,7 @@ SetKbdRepeat(InputInfoPtr pInfo, char rad)
 }
 
 static int
-KbdOn(InputInfoPtr pInfo)
+KbdOn(InputInfoPtr pInfo, int what)
 {
     KbdDevPtr pKbd = (KbdDevPtr) pInfo->private;
     BsdKbdPrivPtr priv = (BsdKbdPrivPtr) pKbd->private;
@@ -168,8 +170,8 @@ KbdOn(InputInfoPtr pInfo)
 		 cfsetospeed(&nTty, 9600);
 		 tcsetattr(pInfo->fd, TCSANOW, &nTty);
                  break; 
-        }
 #endif 
+        }
 #if defined (SYSCONS_SUPPORT) || defined (PCVT_SUPPORT) || defined (WSCONS_SUPPORT)
         switch (pKbd->consType) {
 	    case SYSCONS:
@@ -199,11 +201,11 @@ KbdOn(InputInfoPtr pInfo)
 #endif
         }
     }
-    return(pInfo->fd);
+    return Success;
 }
 
 static int
-KbdOff(InputInfoPtr pInfo)
+KbdOff(InputInfoPtr pInfo, int what)
 {
     KbdDevPtr pKbd = (KbdDevPtr) pInfo->private;
     BsdKbdPrivPtr priv = (BsdKbdPrivPtr) pKbd->private;
@@ -233,7 +235,7 @@ KbdOff(InputInfoPtr pInfo)
 #endif
         }
     }
-    return(pInfo->fd);
+    return Success;
 }
 
 static void
@@ -503,8 +505,10 @@ OpenKeyboard(InputInfoPtr pInfo)
 }
 
 Bool
-xf86OSKbdPreInit(KbdDevPtr pKbd)
+xf86OSKbdPreInit(InputInfoPtr pInfo)
 {
+    KbdDevPtr pKbd = pInfo->private;
+
     pKbd->KbdInit	= KbdInit;
     pKbd->KbdOn		= KbdOn;
     pKbd->KbdOff	= KbdOff;
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_kmod.c b/xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_kmod.c
index 2f5578412..74345654b 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_kmod.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_kmod.c
@@ -1,3 +1,5 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_kmod.c,v 3.2 2002/11/29 17:47:24 tsi Exp $ */
+
 #include <errno.h>
 #include <fcntl.h>
 #include <unistd.h>
@@ -18,7 +20,7 @@
  */
 int xf86LoadKernelModule(const char *modName)
 {
-    if (kldload(modName))
+    if (kldload(modName) != -1)
 	return 1;
     else
 	return 0;
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_mouse.c b/xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_mouse.c
index 4dc830f08..f681d90d9 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_mouse.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_mouse.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_mouse.c,v 1.23 2002/05/18 13:56:50 herrb Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_mouse.c,v 1.24 2003/02/15 05:37:59 paulo Exp $ */
 
 /*
  * Copyright 1999 by The XFree86 Project, Inc.
@@ -179,7 +179,8 @@ SetSysMouseRes(InputInfoPtr pInfo, const char *protocol, int rate, int res)
     mode.resolution = res > 0 ? res : -1;
     mode.accelfactor = -1;
 #if defined(__FreeBSD__)
-    if (pMse->autoProbe) {
+    if (pMse->autoProbe ||
+	(protocol && xf86NameCmp(protocol, "SysMouse") == 0)) {
 	/*
 	 * As the FreeBSD sysmouse driver defaults to protocol level 0
 	 * everytime it is opened we enforce protocol level 1 again at
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/Imakefile b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/Imakefile
index 698459a03..b0e508321 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/Imakefile
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/Imakefile
@@ -14,28 +14,27 @@ MOBJ = drmmodule.o
 MTRR_DEFINES = -DHAS_MTRR_SUPPORT
 #endif
 
+#if defined(FreeBSDArchitecture)
+COMPATSRC = xf86drmCompat.c
+COMPATOBJ = xf86drmCompat.o
+OS_SUBDIR = freebsd
+#endif
+#if defined(NetBSDArchitecture)
+OS_SUBDIR = netbsd
+#endif
+
  SRCS = xf86drm.c \
 	xf86drmHash.c \
 	xf86drmRandom.c \
 	xf86drmSL.c \
-	xf86drmI810.c \
-	xf86drmI830.c \
-	xf86drmMga.c \
-	xf86drmR128.c \
-	/*xf86drmRadeon.c*/ \
-	xf86drmSiS.c \
+	$(COMPATSRC) \
 	$(MSRC)
 
  OBJS = xf86drm.o \
 	xf86drmHash.o \
 	xf86drmRandom.o \
 	xf86drmSL.o \
-	xf86drmI810.o \
-	xf86drmI830.o \
-	xf86drmMga.o \
-	xf86drmR128.o \
-	/*xf86drmRadeon.o*/ \
-	xf86drmSiS.o \
+	$(COMPATOBJ) \
 	$(MOBJ)
 
 INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) -I. -I$(SERVERSRC)/include \
@@ -47,7 +46,7 @@ ModuleObjectRule()
 LibraryModuleTarget(drm,$(OBJS))
 NormalLintTarget($(SRCS))
 
-InstallLibraryModule(drm,$(MODULEDIR),freebsd)
+InstallLibraryModule(drm,$(MODULEDIR),$(OS_SUBDIR))
 
 #define IHaveSubdirs
 SUBDIRS = kernel
@@ -64,13 +63,8 @@ LinkSourceFile(drmmodule.c,$(XF86OSSRC)/linux/drm)
 #endif
 LinkSourceFile(xf86drm.c,$(XF86OSSRC)/linux/drm)
 LinkSourceFile(xf86drmHash.c,$(XF86OSSRC)/linux/drm)
-LinkSourceFile(xf86drmI810.c,$(XF86OSSRC)/linux/drm)
-LinkSourceFile(xf86drmI830.c,$(XF86OSSRC)/linux/drm)
-LinkSourceFile(xf86drmMga.c,$(XF86OSSRC)/linux/drm)
-LinkSourceFile(xf86drmR128.c,$(XF86OSSRC)/linux/drm)
 LinkSourceFile(xf86drmRandom.c,$(XF86OSSRC)/linux/drm)
-LinkSourceFile(xf86drmRadeon.c,$(XF86OSSRC)/linux/drm)
 LinkSourceFile(xf86drmSL.c,$(XF86OSSRC)/linux/drm)
-LinkSourceFile(xf86drmSiS.c,$(XF86OSSRC)/linux/drm)
+LinkSourceFile(xf86drmCompat.c,$(XF86OSSRC)/linux/drm)
 
-InstallDriverSDKLibraryModule(drm,$(DRIVERSDKMODULEDIR),freebsd)
+InstallDriverSDKLibraryModule(drm,$(DRIVERSDKMODULEDIR),$(OS_SUBDIR))
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/Makefile.bsd b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/Makefile.bsd
index 9c87d963d..6281b00c0 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/Makefile.bsd
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/Makefile.bsd
@@ -1,6 +1,6 @@
 # $FreeBSD$
 
 # i810, i830 & sis are not complete
-SUBDIR = tdfx mga r128 radeon gamma # i810 sis i830
+SUBDIR = mga r128 radeon tdfx # i810 i830 sis gamma
 
 .include <bsd.subdir.mk>
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/ati_pcigart.h b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/ati_pcigart.h
index 8b486c10a..0cc63a3aa 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/ati_pcigart.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/ati_pcigart.h
@@ -25,9 +25,10 @@
  *
  * Authors:
  *   Gareth Hughes <gareth@valinux.com>
+ *
+ * $FreeBSD: src/sys/dev/drm/ati_pcigart.h,v 1.1 2003/03/09 02:08:28 anholt Exp $
  */
 
-#define __NO_VERSION__
 #include "drmP.h"
 
 #if PAGE_SIZE == 8192
@@ -43,45 +44,6 @@
 # define ATI_MAX_PCIGART_PAGES		8192	/* 32 MB aperture, 4K pages */
 # define ATI_PCIGART_PAGE_SIZE		4096	/* PCI GART page size */
 
-static unsigned long DRM(ati_alloc_pcigart_table)( void )
-{
-	unsigned long address;
-	struct page *page;
-	int i;
-	DRM_DEBUG( "%s\n", __FUNCTION__ );
-
-	address = __get_free_pages( GFP_KERNEL, ATI_PCIGART_TABLE_ORDER );
-	if ( address == 0UL ) {
-		return 0;
-	}
-
-	page = virt_to_page( address );
-
-	for ( i = 0 ; i <= ATI_PCIGART_TABLE_PAGES ; i++, page++ ) {
-		atomic_inc( &page->count );
-		SetPageReserved( page );
-	}
-
-	DRM_DEBUG( "%s: returning 0x%08lx\n", __FUNCTION__, address );
-	return address;
-}
-
-static void DRM(ati_free_pcigart_table)( unsigned long address )
-{
-	struct page *page;
-	int i;
-	DRM_DEBUG( "%s\n", __FUNCTION__ );
-
-	page = virt_to_page( address );
-
-	for ( i = 0 ; i <= ATI_PCIGART_TABLE_PAGES ; i++, page++ ) {
-		atomic_dec( &page->count );
-		ClearPageReserved( page );
-	}
-
-	free_pages( address, ATI_PCIGART_TABLE_ORDER );
-}
-
 int DRM(ati_pcigart_init)( drm_device_t *dev,
 			   unsigned long *addr,
 			   dma_addr_t *bus_addr)
@@ -89,7 +51,7 @@ int DRM(ati_pcigart_init)( drm_device_t *dev,
 	drm_sg_mem_t *entry = dev->sg;
 	unsigned long address = 0;
 	unsigned long pages;
-	u32 *pci_gart, page_base, bus_address = 0;
+	u32 *pci_gart=0, page_base, bus_address = 0;
 	int i, j, ret = 0;
 
 	if ( !entry ) {
@@ -97,47 +59,25 @@ int DRM(ati_pcigart_init)( drm_device_t *dev,
 		goto done;
 	}
 
-	address = DRM(ati_alloc_pcigart_table)();
+	address = (long)contigmalloc((1 << ATI_PCIGART_TABLE_ORDER) * PAGE_SIZE, 
+	    DRM(M_DRM), M_WAITOK, 0ul, 0xfffffffful, PAGE_SIZE, 0);
 	if ( !address ) {
 		DRM_ERROR( "cannot allocate PCI GART page!\n" );
 		goto done;
 	}
 
-	if ( !dev->pdev ) {
-		DRM_ERROR( "PCI device unknown!\n" );
-		goto done;
-	}
-
-	bus_address = pci_map_single(dev->pdev, (void *)address,
-				  ATI_PCIGART_TABLE_PAGES * PAGE_SIZE,
-				  PCI_DMA_TODEVICE);
-	if (bus_address == 0) {
-		DRM_ERROR( "unable to map PCIGART pages!\n" );
-		DRM(ati_free_pcigart_table)( address );
-		address = 0;
-		goto done;
-	}
+	/* XXX: we need to busdma this */
+	bus_address = vtophys( address );
 
 	pci_gart = (u32 *)address;
 
 	pages = ( entry->pages <= ATI_MAX_PCIGART_PAGES )
 		? entry->pages : ATI_MAX_PCIGART_PAGES;
 
-	memset( pci_gart, 0, ATI_MAX_PCIGART_PAGES * sizeof(u32) );
+	bzero( pci_gart, ATI_MAX_PCIGART_PAGES * sizeof(u32) );
 
 	for ( i = 0 ; i < pages ; i++ ) {
-		/* we need to support large memory configurations */
-		entry->busaddr[i] = pci_map_single(dev->pdev,
-					   page_address( entry->pagelist[i] ),
-					   PAGE_SIZE,
-					   PCI_DMA_TODEVICE);
-		if (entry->busaddr[i] == 0) {
-			DRM_ERROR( "unable to map PCIGART pages!\n" );
-			DRM(ati_pcigart_cleanup)( dev, address, bus_address );
-			address = 0;
-			bus_address = 0;
-			goto done;
-		}
+		entry->busaddr[i] = vtophys( entry->handle + (i*PAGE_SIZE) );
 		page_base = (u32) entry->busaddr[i];
 
 		for (j = 0; j < (PAGE_SIZE / ATI_PCIGART_PAGE_SIZE); j++) {
@@ -148,12 +88,6 @@ int DRM(ati_pcigart_init)( drm_device_t *dev,
 
 	ret = 1;
 
-#if defined(__i386__) || defined(__x86_64__)
-	asm volatile ( "wbinvd" ::: "memory" );
-#else
-	mb();
-#endif
-
 done:
 	*addr = address;
 	*bus_addr = bus_address;
@@ -165,8 +99,6 @@ int DRM(ati_pcigart_cleanup)( drm_device_t *dev,
 			      dma_addr_t bus_addr)
 {
 	drm_sg_mem_t *entry = dev->sg;
-	unsigned long pages;
-	int i;
 
 	/* we need to support large memory configurations */
 	if ( !entry ) {
@@ -174,24 +106,8 @@ int DRM(ati_pcigart_cleanup)( drm_device_t *dev,
 		return 0;
 	}
 
-	if ( bus_addr ) {
-		pci_unmap_single(dev->pdev, bus_addr,
-				 ATI_PCIGART_TABLE_PAGES * PAGE_SIZE,
-				 PCI_DMA_TODEVICE);
-
-		pages = ( entry->pages <= ATI_MAX_PCIGART_PAGES )
-		        ? entry->pages : ATI_MAX_PCIGART_PAGES;
-
-		for ( i = 0 ; i < pages ; i++ ) {
-			if ( !entry->busaddr[i] ) break;
-			pci_unmap_single(dev->pdev, entry->busaddr[i],
-					 PAGE_SIZE, PCI_DMA_TODEVICE);
-		}
-	}
-
-	if ( addr ) {
-		DRM(ati_free_pcigart_table)( addr );
-	}
-
+#if __FreeBSD_version > 500000
+	contigfree( (void *)addr, (1 << ATI_PCIGART_TABLE_ORDER) * PAGE_SIZE, DRM(M_DRM));	/* Not available on 4.x */
+#endif
 	return 1;
 }
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm.h b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm.h
index 688769409..abe2ac3ff 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm.h
@@ -30,13 +30,37 @@
  * Acknowledgements:
  * Dec 1999, Richard Henderson <rth@twiddle.net>, move to generic cmpxchg.
  *
+ * $FreeBSD: src/sys/dev/drm/drm.h,v 1.3 2003/03/09 02:08:28 anholt Exp $
  */
 
 #ifndef _DRM_H_
 #define _DRM_H_
 
+#if defined(__linux__)
+#include <linux/config.h>
+#include <asm/ioctl.h>		/* For _IO* macros */
+#define DRM_IOCTL_NR(n)		_IOC_NR(n)
+#define DRM_IOC_VOID		_IOC_NONE
+#define DRM_IOC_READ		_IOC_READ
+#define DRM_IOC_WRITE		_IOC_WRITE
+#define DRM_IOC_READWRITE	_IOC_READ|_IOC_WRITE
+#define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size)
+#elif defined(__FreeBSD__) || defined(__NetBSD__)
+#if defined(__FreeBSD__) && defined(XFree86Server)
+/* Prevent name collision when including sys/ioccom.h */
+#undef ioctl
 #include <sys/ioccom.h>
-#define DRM_IOCTL_NR(n)	     ((n) & 0xff)
+#define ioctl(a,b,c)		xf86ioctl(a,b,c)
+#else
+#include <sys/ioccom.h>
+#endif /* __FreeBSD__ && xf86ioctl */
+#define DRM_IOCTL_NR(n)		((n) & 0xff)
+#define DRM_IOC_VOID		IOC_VOID
+#define DRM_IOC_READ		IOC_OUT
+#define DRM_IOC_WRITE		IOC_IN
+#define DRM_IOC_READWRITE	IOC_INOUT
+#define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size)
+#endif
 
 #define XFREE86_VERSION(major,minor,patch,snap) \
 		((major << 16) | (minor << 8) | patch)
@@ -62,7 +86,7 @@
 #define DRM_NAME	"drm"	  /* Name in kernel, /dev, and /proc	    */
 #define DRM_MIN_ORDER	5	  /* At least 2^5 bytes = 32 bytes	    */
 #define DRM_MAX_ORDER	22	  /* Up to 2^22 bytes = 4MB		    */
-#define DRM_RAM_PERCENT 50	  /* How much system ram can we lock?	    */
+#define DRM_RAM_PERCENT 10	  /* How much system ram can we lock?	    */
 
 #define _DRM_LOCK_HELD	0x80000000 /* Hardware lock is held		    */
 #define _DRM_LOCK_CONT	0x40000000 /* Hardware lock is contended	    */
@@ -78,6 +102,10 @@ typedef unsigned int  drm_magic_t;
 /* Warning: If you change this structure, make sure you change
  * XF86DRIClipRectRec in the server as well */
 
+/* KW: Actually it's illegal to change either for
+ * backwards-compatibility reasons.
+ */
+
 typedef struct drm_clip_rect {
 	unsigned short	x1;
 	unsigned short	y1;
@@ -93,14 +121,6 @@ typedef struct drm_tex_region {
 	unsigned int	age;
 } drm_tex_region_t;
 
-/* Seperate include files for the driver specific structures */
-#include "mga_drm.h"
-#include "i810_drm.h"
-#include "i830_drm.h"
-#include "r128_drm.h"
-#include "radeon_drm.h"
-#include "sis_drm.h"
-
 typedef struct drm_version {
 	int    version_major;	  /* Major version			    */
 	int    version_minor;	  /* Minor version			    */
@@ -326,6 +346,32 @@ typedef struct drm_irq_busid {
 	int funcnum;
 } drm_irq_busid_t;
 
+typedef enum {
+    _DRM_VBLANK_ABSOLUTE = 0x0,		/* Wait for specific vblank sequence number */
+    _DRM_VBLANK_RELATIVE = 0x1,		/* Wait for given number of vblanks */
+    _DRM_VBLANK_SIGNAL   = 0x40000000	/* Send signal instead of blocking */
+} drm_vblank_seq_type_t;
+
+#define _DRM_VBLANK_FLAGS_MASK _DRM_VBLANK_SIGNAL
+
+struct drm_wait_vblank_request {
+	drm_vblank_seq_type_t type;
+	unsigned int sequence;
+	unsigned long signal;
+};
+
+struct drm_wait_vblank_reply {
+	drm_vblank_seq_type_t type;
+	unsigned int sequence;
+	long tval_sec;
+	long tval_usec;
+};
+
+typedef union drm_wait_vblank {
+	struct drm_wait_vblank_request request;
+	struct drm_wait_vblank_reply reply;
+} drm_wait_vblank_t;
+
 typedef struct drm_agp_mode {
 	unsigned long mode;
 } drm_agp_mode_t;
@@ -365,10 +411,9 @@ typedef struct drm_scatter_gather {
 
 #define DRM_IOCTL_BASE			'd'
 #define DRM_IO(nr)			_IO(DRM_IOCTL_BASE,nr)
-#define DRM_IOR(nr,size)		_IOR(DRM_IOCTL_BASE,nr,size)
-#define DRM_IOW(nr,size)		_IOW(DRM_IOCTL_BASE,nr,size)
-#define DRM_IOWR(nr,size)		_IOWR(DRM_IOCTL_BASE,nr,size)
-
+#define DRM_IOR(nr,type)		_IOR(DRM_IOCTL_BASE,nr,type)
+#define DRM_IOW(nr,type)		_IOW(DRM_IOCTL_BASE,nr,type)
+#define DRM_IOWR(nr,type)		_IOWR(DRM_IOCTL_BASE,nr,type)
 
 #define DRM_IOCTL_VERSION		DRM_IOWR(0x00, drm_version_t)
 #define DRM_IOCTL_GET_UNIQUE		DRM_IOWR(0x01, drm_unique_t)
@@ -421,81 +466,10 @@ typedef struct drm_scatter_gather {
 #define DRM_IOCTL_SG_ALLOC		DRM_IOW( 0x38, drm_scatter_gather_t)
 #define DRM_IOCTL_SG_FREE		DRM_IOW( 0x39, drm_scatter_gather_t)
 
-/* MGA specific ioctls */
-#define DRM_IOCTL_MGA_INIT		DRM_IOW( 0x40, drm_mga_init_t)
-#define DRM_IOCTL_MGA_FLUSH		DRM_IOW( 0x41, drm_lock_t)
-#define DRM_IOCTL_MGA_RESET		DRM_IO(  0x42)
-#define DRM_IOCTL_MGA_SWAP		DRM_IO(  0x43)
-#define DRM_IOCTL_MGA_CLEAR		DRM_IOW( 0x44, drm_mga_clear_t)
-#define DRM_IOCTL_MGA_VERTEX		DRM_IOW( 0x45, drm_mga_vertex_t)
-#define DRM_IOCTL_MGA_INDICES		DRM_IOW( 0x46, drm_mga_indices_t)
-#define DRM_IOCTL_MGA_ILOAD		DRM_IOW( 0x47, drm_mga_iload_t)
-#define DRM_IOCTL_MGA_BLIT		DRM_IOW( 0x48, drm_mga_blit_t)
-
-/* i810 specific ioctls */
-#define DRM_IOCTL_I810_INIT		DRM_IOW( 0x40, drm_i810_init_t)
-#define DRM_IOCTL_I810_VERTEX		DRM_IOW( 0x41, drm_i810_vertex_t)
-#define DRM_IOCTL_I810_CLEAR		DRM_IOW( 0x42, drm_i810_clear_t)
-#define DRM_IOCTL_I810_FLUSH		DRM_IO(  0x43)
-#define DRM_IOCTL_I810_GETAGE		DRM_IO(  0x44)
-#define DRM_IOCTL_I810_GETBUF		DRM_IOWR(0x45, drm_i810_dma_t)
-#define DRM_IOCTL_I810_SWAP		DRM_IO(  0x46)
-#define DRM_IOCTL_I810_COPY		DRM_IOW( 0x47, drm_i810_copy_t)
-#define DRM_IOCTL_I810_DOCOPY		DRM_IO(  0x48)
-
-/* Rage 128 specific ioctls */
-#define DRM_IOCTL_R128_INIT		DRM_IOW( 0x40, drm_r128_init_t)
-#define DRM_IOCTL_R128_CCE_START	DRM_IO(  0x41)
-#define DRM_IOCTL_R128_CCE_STOP		DRM_IOW( 0x42, drm_r128_cce_stop_t)
-#define DRM_IOCTL_R128_CCE_RESET	DRM_IO(  0x43)
-#define DRM_IOCTL_R128_CCE_IDLE		DRM_IO(  0x44)
-#define DRM_IOCTL_R128_RESET		DRM_IO(  0x46)
-#define DRM_IOCTL_R128_SWAP		DRM_IO(  0x47)
-#define DRM_IOCTL_R128_CLEAR		DRM_IOW( 0x48, drm_r128_clear_t)
-#define DRM_IOCTL_R128_VERTEX		DRM_IOW( 0x49, drm_r128_vertex_t)
-#define DRM_IOCTL_R128_INDICES		DRM_IOW( 0x4a, drm_r128_indices_t)
-#define DRM_IOCTL_R128_BLIT		DRM_IOW( 0x4b, drm_r128_blit_t)
-#define DRM_IOCTL_R128_DEPTH		DRM_IOW( 0x4c, drm_r128_depth_t)
-#define DRM_IOCTL_R128_STIPPLE		DRM_IOW( 0x4d, drm_r128_stipple_t)
-#define DRM_IOCTL_R128_INDIRECT		DRM_IOWR(0x4f, drm_r128_indirect_t)
-#define DRM_IOCTL_R128_FULLSCREEN	DRM_IOW( 0x50, drm_r128_fullscreen_t)
-
-/* Radeon specific ioctls */
-#define DRM_IOCTL_RADEON_CP_INIT	DRM_IOW( 0x40, drm_radeon_init_t)
-#define DRM_IOCTL_RADEON_CP_START	DRM_IO(  0x41)
-#define DRM_IOCTL_RADEON_CP_STOP	DRM_IOW( 0x42, drm_radeon_cp_stop_t)
-#define DRM_IOCTL_RADEON_CP_RESET	DRM_IO(  0x43)
-#define DRM_IOCTL_RADEON_CP_IDLE	DRM_IO(  0x44)
-#define DRM_IOCTL_RADEON_RESET		DRM_IO(  0x45)
-#define DRM_IOCTL_RADEON_FULLSCREEN	DRM_IOW( 0x46, drm_radeon_fullscreen_t)
-#define DRM_IOCTL_RADEON_SWAP		DRM_IO(  0x47)
-#define DRM_IOCTL_RADEON_CLEAR		DRM_IOW( 0x48, drm_radeon_clear_t)
-#define DRM_IOCTL_RADEON_VERTEX		DRM_IOW( 0x49, drm_radeon_vertex_t)
-#define DRM_IOCTL_RADEON_INDICES	DRM_IOW( 0x4a, drm_radeon_indices_t)
-#define DRM_IOCTL_RADEON_STIPPLE	DRM_IOW( 0x4c, drm_radeon_stipple_t)
-#define DRM_IOCTL_RADEON_INDIRECT	DRM_IOWR(0x4d, drm_radeon_indirect_t)
-#define DRM_IOCTL_RADEON_TEXTURE	DRM_IOWR(0x4e, drm_radeon_texture_t)
-
-/* SiS specific ioctls */
-
-#define SIS_IOCTL_FB_ALLOC		DRM_IOWR(0x44, drm_sis_mem_t)
-#define SIS_IOCTL_FB_FREE		DRM_IOW( 0x45, drm_sis_mem_t)
-#define SIS_IOCTL_AGP_INIT		DRM_IOWR(0x53, drm_sis_agp_t)
-#define SIS_IOCTL_AGP_ALLOC		DRM_IOWR(0x54, drm_sis_mem_t)
-#define SIS_IOCTL_AGP_FREE		DRM_IOW( 0x55, drm_sis_mem_t)
-#define SIS_IOCTL_FLIP			DRM_IOW( 0x48, drm_sis_flip_t)
-#define SIS_IOCTL_FLIP_INIT		DRM_IO(  0x49)
-#define SIS_IOCTL_FLIP_FINAL		DRM_IO(  0x50)
-
-/* I830 specific ioctls */
-#define DRM_IOCTL_I830_INIT		DRM_IOW( 0x40, drm_i830_init_t)
-#define DRM_IOCTL_I830_VERTEX		DRM_IOW( 0x41, drm_i830_vertex_t)
-#define DRM_IOCTL_I830_CLEAR		DRM_IOW( 0x42, drm_i830_clear_t)
-#define DRM_IOCTL_I830_FLUSH		DRM_IO ( 0x43)
-#define DRM_IOCTL_I830_GETAGE		DRM_IO ( 0x44)
-#define DRM_IOCTL_I830_GETBUF		DRM_IOWR(0x45, drm_i830_dma_t)
-#define DRM_IOCTL_I830_SWAP		DRM_IO ( 0x46)
-#define DRM_IOCTL_I830_COPY		DRM_IOW( 0x47, drm_i830_copy_t)
-#define DRM_IOCTL_I830_DOCOPY		DRM_IO ( 0x48)
+#define DRM_IOCTL_WAIT_VBLANK		DRM_IOWR(0x3a, drm_wait_vblank_t)
+
+/* Device specfic ioctls should only be in their respective headers
+ * The device specific ioctl range is 0x40 to 0x79.                  */
+#define DRM_COMMAND_BASE                0x40
 
 #endif
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drmP.h b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drmP.h
index ead40f86b..96dd52d84 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drmP.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drmP.h
@@ -27,6 +27,7 @@
  * Authors:
  *    Rickard E. (Rik) Faith <faith@valinux.com>
  *    Gareth Hughes <gareth@valinux.com>
+ * $FreeBSD: src/sys/dev/drm/drmP.h,v 1.3 2003/03/09 02:08:28 anholt Exp $
  */
 
 #ifndef _DRM_P_H_
@@ -69,7 +70,11 @@ typedef struct drm_file drm_file_t;
 
 /* There's undoubtably more of this file to go into these OS dependent ones. */
 
+#ifdef __FreeBSD__
 #include "drm_os_freebsd.h"
+#elif defined __NetBSD__
+#include "drm_os_netbsd.h"
+#endif
 
 #include "drm.h"
 
@@ -91,21 +96,20 @@ typedef struct drm_file drm_file_t;
 #define DRM_MEM_MAGIC	   3
 #define DRM_MEM_IOCTLS	   4
 #define DRM_MEM_MAPS	   5
-#define DRM_MEM_VMAS	   6
-#define DRM_MEM_BUFS	   7
-#define DRM_MEM_SEGS	   8
-#define DRM_MEM_PAGES	   9
-#define DRM_MEM_FILES	  10
-#define DRM_MEM_QUEUES	  11
-#define DRM_MEM_CMDS	  12
-#define DRM_MEM_MAPPINGS  13
-#define DRM_MEM_BUFLISTS  14
-#define DRM_MEM_AGPLISTS  15
-#define DRM_MEM_TOTALAGP  16
-#define DRM_MEM_BOUNDAGP  17
-#define DRM_MEM_CTXBITMAP 18
-#define DRM_MEM_STUB      19
-#define DRM_MEM_SGLISTS   20
+#define DRM_MEM_BUFS	   6
+#define DRM_MEM_SEGS	   7
+#define DRM_MEM_PAGES	   8
+#define DRM_MEM_FILES	  9
+#define DRM_MEM_QUEUES	  10
+#define DRM_MEM_CMDS	  11
+#define DRM_MEM_MAPPINGS  12
+#define DRM_MEM_BUFLISTS  13
+#define DRM_MEM_AGPLISTS  14
+#define DRM_MEM_TOTALAGP  15
+#define DRM_MEM_BOUNDAGP  16
+#define DRM_MEM_CTXBITMAP 17
+#define DRM_MEM_STUB	  18
+#define DRM_MEM_SGLISTS	  19
 
 #define DRM_MAX_CTXBITMAP (PAGE_SIZE * 8)
 
@@ -117,12 +121,15 @@ typedef struct drm_file drm_file_t;
 
 				/* Mapping helper macros */
 #define DRM_IOREMAP(map)						\
-	(map)->handle = DRM(ioremap)( (map)->offset, (map)->size )
+	(map)->handle = DRM(ioremap)( dev, map )
+
+#define DRM_IOREMAP_NOCACHE(map)					\
+	(map)->handle = DRM(ioremap_nocache)( dev, map )
 
 #define DRM_IOREMAPFREE(map)						\
 	do {								\
 		if ( (map)->handle && (map)->size )			\
-			DRM(ioremapfree)( (map)->handle, (map)->size );	\
+			DRM(ioremapfree)( map );			\
 	} while (0)
 
 				/* Internal types and structures */
@@ -145,16 +152,11 @@ typedef struct drm_pci_list {
 } drm_pci_list_t;
 
 typedef struct drm_ioctl_desc {
-	d_ioctl_t            *func;
+	int		     (*func)(DRM_IOCTL_ARGS);
 	int		     auth_needed;
 	int		     root_only;
 } drm_ioctl_desc_t;
 
-typedef struct drm_devstate {
-	pid_t		  owner;	/* X server pid holding x_lock */
-
-} drm_devstate_t;
-
 typedef struct drm_magic_entry {
 	drm_magic_t	       magic;
 	struct drm_file	       *priv;
@@ -166,12 +168,6 @@ typedef struct drm_magic_head {
 	struct drm_magic_entry *tail;
 } drm_magic_head_t;
 
-typedef struct drm_vma_entry {
-	struct vm_area_struct *vma;
-	struct drm_vma_entry  *next;
-	pid_t		      pid;
-} drm_vma_entry_t;
-
 typedef struct drm_buf {
 	int		  idx;	       /* Index into master buflist	     */
 	int		  total;       /* Buffer size			     */
@@ -184,7 +180,7 @@ typedef struct drm_buf {
 	__volatile__ int  waiting;     /* On kernel DMA queue		     */
 	__volatile__ int  pending;     /* On hardware DMA queue		     */
 	wait_queue_head_t dma_wait;    /* Processes waiting		     */
-	pid_t		  pid;	       /* PID of holding process	     */
+	DRMFILE		  filp;	       /* Unique identifier of holding process */
 	int		  context;     /* Kernel queue for this buffer	     */
 	int		  while_locked;/* Dispatch this buffer while locked  */
 	enum {
@@ -236,8 +232,8 @@ typedef struct drm_waitlist {
 	drm_buf_t	  **rp;		/* Read pointer			   */
 	drm_buf_t	  **wp;		/* Write pointer		   */
 	drm_buf_t	  **end;	/* End pointer			   */
-	DRM_OS_SPINTYPE	  read_lock;
-	DRM_OS_SPINTYPE	  write_lock;
+	DRM_SPINTYPE	  read_lock;
+	DRM_SPINTYPE	  write_lock;
 } drm_waitlist_t;
 
 typedef struct drm_freelist {
@@ -249,7 +245,7 @@ typedef struct drm_freelist {
 	int		  low_mark;    /* Low water mark		   */
 	int		  high_mark;   /* High water mark		   */
 	atomic_t	  wfh;	       /* If waiting for high mark	   */
-	DRM_OS_SPINTYPE   lock;
+	DRM_SPINTYPE   lock;
 } drm_freelist_t;
 
 typedef struct drm_buf_entry {
@@ -301,7 +297,7 @@ typedef struct drm_queue {
 
 typedef struct drm_lock_data {
 	drm_hw_lock_t	  *hw_lock;	/* Hardware lock		   */
-	pid_t		  pid;		/* PID of lock holder (0=kernel)   */
+	DRMFILE		  filp;	        /* Unique identifier of holding process (NULL is kernel)*/
 	wait_queue_head_t lock_queue;	/* Queue of blocked processes	   */
 	unsigned long	  lock_time;	/* Time of last lock in jiffies	   */
 } drm_lock_data_t;
@@ -370,7 +366,7 @@ typedef struct drm_sg_mem {
 	unsigned long   handle;
 	void            *virtual;
 	int             pages;
-	struct page     **pagelist;
+	dma_addr_t	*busaddr;
 } drm_sg_mem_t;
 
 typedef struct drm_sigdata {
@@ -378,32 +374,56 @@ typedef struct drm_sigdata {
 	drm_hw_lock_t *lock;
 } drm_sigdata_t;
 
+typedef struct drm_local_map {
+	unsigned long	offset;	 /* Physical address (0 for SAREA)*/
+	unsigned long	size;	 /* Physical size (bytes)	    */
+	drm_map_type_t	type;	 /* Type of memory mapped		    */
+	drm_map_flags_t flags;	 /* Flags				    */
+	void		*handle; /* User-space: "Handle" to pass to mmap    */
+				 /* Kernel-space: kernel-virtual address    */
+	int		mtrr;	 /* MTRR slot used			    */
+				 /* Private data			    */
+	bus_space_tag_t iot;
+	bus_space_handle_t ioh;
+} drm_local_map_t;
+
 typedef TAILQ_HEAD(drm_map_list, drm_map_list_entry) drm_map_list_t;
 typedef struct drm_map_list_entry {
 	TAILQ_ENTRY(drm_map_list_entry) link;
-	drm_map_t	*map;
+	drm_local_map_t	*map;
 } drm_map_list_entry_t;
 
+TAILQ_HEAD(drm_vbl_sig_list, drm_vbl_sig);
+typedef struct drm_vbl_sig {
+	TAILQ_ENTRY(drm_vbl_sig) link;
+	unsigned int	sequence;
+	int		signo;
+	int		pid;
+} drm_vbl_sig_t;
+
 struct drm_device {
+#ifdef __NetBSD__
+	struct device	  device;	/* NetBSD's softc is an extension of struct device */
+#endif
 	const char	  *name;	/* Simple driver name		   */
 	char		  *unique;	/* Unique identifier: e.g., busid  */
 	int		  unique_len;	/* Length of unique field	   */
+#ifdef __FreeBSD__
 	device_t	  device;	/* Device instance from newbus     */
+#endif
 	dev_t		  devnode;	/* Device number for mknod	   */
 	char		  *devname;	/* For /proc/interrupts		   */
 
 	int		  blocked;	/* Blocked due to VC switch?	   */
 	int		  flags;	/* Flags to open(2)		   */
 	int		  writable;	/* Opened with FWRITE		   */
-	struct proc_dir_entry *root;	/* Root for this device's entries  */
 
 				/* Locks */
-	DRM_OS_SPINTYPE	  count_lock;	/* For inuse, open_count, buf_use  */
+	DRM_SPINTYPE	  count_lock;	/* For inuse, open_count, buf_use  */
 	struct lock       dev_lock;	/* For others			   */
 				/* Usage Counters */
 	int		  open_count;	/* Outstanding files open	   */
 	atomic_t	  ioctl_count;	/* Outstanding IOCTLs pending	   */
-	atomic_t	  vma_count;	/* Outstanding vma areas open	   */
 	int		  buf_use;	/* Buffers in use -- cannot alloc  */
 	atomic_t	  buf_alloc;	/* Buffer allocation in progress   */
 
@@ -420,10 +440,9 @@ struct drm_device {
 	drm_map_list_t	  *maplist;	/* Linked list of regions	   */
 	int		  map_count;	/* Number of mappable regions	   */
 
-	drm_map_t	  **context_sareas;
+	drm_local_map_t	  **context_sareas;
 	int		  max_context;
 
-	drm_vma_entry_t	  *vmalist;	/* List of vmas (for debugging)	   */
 	drm_lock_data_t	  lock;		/* Information on hardware lock	   */
 
 				/* DMA queues (contexts) */
@@ -435,11 +454,17 @@ struct drm_device {
 
 				/* Context support */
 	int		  irq;		/* Interrupt used by board	   */
+	int		  irqrid;		/* Interrupt used by board	   */
+#ifdef __FreeBSD__
 	struct resource   *irqr;	/* Resource for interrupt used by board	   */
+#elif defined(__NetBSD__)
+	struct pci_attach_args  pa;
+	pci_intr_handle_t	ih;
+#endif
 	void		  *irqh;	/* Handle from bus_setup_intr      */
-	__volatile__ long context_flag;	/* Context swapping flag	   */
-	__volatile__ long interrupt_flag; /* Interruption handler flag	   */
-	__volatile__ long dma_flag;	/* DMA dispatch flag		   */
+	atomic_t	  context_flag;	/* Context swapping flag	   */
+	atomic_t	  interrupt_flag; /* Interruption handler flag	   */
+	atomic_t	  dma_flag;	/* DMA dispatch flag		   */
 	struct callout    timer;	/* Timer for delaying ctx switch   */
 	wait_queue_head_t context_wait; /* Processes waiting on ctx switch */
 	int		  last_checked;	/* Last context checked for DMA	   */
@@ -448,6 +473,14 @@ struct drm_device {
 #if __FreeBSD_version >= 400005
 	struct task       task;
 #endif
+#if __HAVE_VBL_IRQ
+   	wait_queue_head_t vbl_queue;	/* vbl wait channel */
+   	atomic_t          vbl_received;
+#if 0 /* vbl signals are untested, ntested */
+	struct drm_vbl_sig_list vbl_sig_list;
+	DRM_SPINTYPE      vbl_lock;
+#endif
+#endif
 	cycles_t	  ctx_start;
 	cycles_t	  lck_start;
 #if __HAVE_DMA_HISTOGRAM
@@ -460,7 +493,11 @@ struct drm_device {
 	char		  *buf_rp;	/* Read pointer			   */
 	char		  *buf_wp;	/* Write pointer		   */
 	char		  *buf_end;	/* End pointer			   */
+#ifdef __FreeBSD__
 	struct sigio      *buf_sigio;	/* Processes waiting for SIGIO     */
+#elif defined(__NetBSD__)
+	pid_t		  buf_pgid;
+#endif
 	struct selinfo    buf_sel;	/* Workspace for select/poll       */
 	int               buf_selecting;/* True if poll sleeper            */
 	wait_queue_head_t buf_readers;	/* Processes waiting to read	   */
@@ -472,16 +509,8 @@ struct drm_device {
 #if __REALLY_HAVE_AGP
 	drm_agp_head_t    *agp;
 #endif
-	struct pci_dev *pdev;
-#ifdef __alpha__
-#if LINUX_VERSION_CODE < 0x020403
-	struct pci_controler *hose;
-#else
-	struct pci_controller *hose;
-#endif
-#endif
 	drm_sg_mem_t      *sg;  /* Scatter gather memory */
-	unsigned long     *ctx_bitmap;
+	atomic_t          *ctx_bitmap;
 	void		  *dev_private;
 	drm_sigdata_t     sigdata; /* For block_all_signals */
 	sigset_t          sigmask;
@@ -497,22 +526,21 @@ extern int           DRM(add_magic)(drm_device_t *dev, drm_file_t *priv,
 extern int           DRM(remove_magic)(drm_device_t *dev, drm_magic_t magic);
 
 				/* Driver support (drm_drv.h) */
-extern int           DRM(version)( DRM_OS_IOCTL );
+extern int           DRM(version)( DRM_IOCTL_ARGS );
 extern int	     DRM(write_string)(drm_device_t *dev, const char *s);
 
 				/* Memory management support (drm_memory.h) */
 extern void	     DRM(mem_init)(void);
+extern void	     DRM(mem_uninit)(void);
 extern void	     *DRM(alloc)(size_t size, int area);
 extern void	     *DRM(realloc)(void *oldpt, size_t oldsize, size_t size,
 				   int area);
 extern char	     *DRM(strdup)(const char *s, int area);
 extern void	     DRM(strfree)(char *s, int area);
 extern void	     DRM(free)(void *pt, size_t size, int area);
-extern unsigned long DRM(alloc_pages)(int order, int area);
-extern void	     DRM(free_pages)(unsigned long address, int order,
-				     int area);
-extern void	     *DRM(ioremap)(unsigned long offset, unsigned long size);
-extern void	     DRM(ioremapfree)(void *pt, unsigned long size);
+extern void	     *DRM(ioremap)(drm_device_t *dev, drm_local_map_t *map);
+extern void	     *DRM(ioremap_nocache)(drm_device_t *dev, drm_local_map_t *map);
+extern void	     DRM(ioremapfree)(drm_local_map_t *map);
 
 #if __REALLY_HAVE_AGP
 extern agp_memory    *DRM(alloc_agp)(int pages, u32 type);
@@ -554,7 +582,7 @@ extern int	     DRM(order)( unsigned long size );
 extern int	     DRM(dma_setup)(drm_device_t *dev);
 extern void	     DRM(dma_takedown)(drm_device_t *dev);
 extern void	     DRM(free_buffer)(drm_device_t *dev, drm_buf_t *buf);
-extern void	     DRM(reclaim_buffers)(drm_device_t *dev, pid_t pid);
+extern void	     DRM(reclaim_buffers)(drm_device_t *dev, DRMFILE filp);
 #if __HAVE_OLD_DMA
 /* GH: This is a dirty hack for now...
  */
@@ -567,9 +595,12 @@ extern int	     DRM(dma_get_buffers)(drm_device_t *dev, drm_dma_t *dma);
 #if __HAVE_DMA_IRQ
 extern int           DRM(irq_install)( drm_device_t *dev, int irq );
 extern int           DRM(irq_uninstall)( drm_device_t *dev );
-extern void          DRM(dma_service)( DRM_OS_IRQ_ARGS );
+extern void          DRM(dma_service)( DRM_IRQ_ARGS );
+extern void          DRM(driver_irq_preinstall)( drm_device_t *dev );
+extern void          DRM(driver_irq_postinstall)( drm_device_t *dev );
+extern void          DRM(driver_irq_uninstall)( drm_device_t *dev );
 #if __HAVE_DMA_IRQ_BH
-extern void          DRM(dma_immediate_bh)( DRM_OS_TASKQUEUE_ARGS );
+extern void          DRM(dma_immediate_bh)( DRM_TASKQUEUE_ARGS );
 #endif
 #endif
 #if DRM_DMA_HISTOGRAM
@@ -592,6 +623,10 @@ extern int	     DRM(freelist_put)(drm_device_t *dev, drm_freelist_t *bl,
 extern drm_buf_t     *DRM(freelist_get)(drm_freelist_t *bl, int block);
 #endif
 #endif /* __HAVE_DMA */
+#if __HAVE_VBL_IRQ
+extern int           DRM(vblank_wait)(drm_device_t *dev, unsigned int *vbl_seq);
+extern void          DRM(vbl_send_signals)( drm_device_t *dev );
+#endif
 
 #if __REALLY_HAVE_AGP
 				/* AGP/GART support (drm_agpsupport.h) */
@@ -604,15 +639,6 @@ extern int            DRM(agp_bind_memory)(agp_memory *handle, off_t start);
 extern int            DRM(agp_unbind_memory)(agp_memory *handle);
 #endif
 
-				/* Proc support (drm_proc.h) */
-extern struct proc_dir_entry *DRM(proc_init)(drm_device_t *dev,
-					     int minor,
-					     struct proc_dir_entry *root,
-					     struct proc_dir_entry **dev_root);
-extern int            DRM(proc_cleanup)(int minor,
-					struct proc_dir_entry *root,
-					struct proc_dir_entry *dev_root);
-
 #if __HAVE_SG
 				/* Scatter Gather Support (drm_scatter.h) */
 extern void           DRM(sg_cleanup)(drm_sg_mem_t *entry);
@@ -628,5 +654,82 @@ extern int            DRM(ati_pcigart_cleanup)(drm_device_t *dev,
 					       dma_addr_t bus_addr);
 #endif
 
-#endif /* __KERNEL__ */
+/* Locking IOCTL support (drm_drv.h) */
+extern int		DRM(lock)(DRM_IOCTL_ARGS);
+extern int		DRM(unlock)(DRM_IOCTL_ARGS);
+
+/* Misc. IOCTL support (drm_ioctl.h) */
+extern int		DRM(irq_busid)(DRM_IOCTL_ARGS);
+extern int		DRM(getunique)(DRM_IOCTL_ARGS);
+extern int		DRM(setunique)(DRM_IOCTL_ARGS);
+extern int		DRM(getmap)(DRM_IOCTL_ARGS);
+extern int		DRM(getclient)(DRM_IOCTL_ARGS);
+extern int		DRM(getstats)(DRM_IOCTL_ARGS);
+
+/* Context IOCTL support (drm_context.h) */
+extern int		DRM(resctx)(DRM_IOCTL_ARGS);
+extern int		DRM(addctx)(DRM_IOCTL_ARGS);
+extern int		DRM(modctx)(DRM_IOCTL_ARGS);
+extern int		DRM(getctx)(DRM_IOCTL_ARGS);
+extern int		DRM(switchctx)(DRM_IOCTL_ARGS);
+extern int		DRM(newctx)(DRM_IOCTL_ARGS);
+extern int		DRM(rmctx)(DRM_IOCTL_ARGS);
+extern int		DRM(setsareactx)(DRM_IOCTL_ARGS);
+extern int		DRM(getsareactx)(DRM_IOCTL_ARGS);
+
+/* Drawable IOCTL support (drm_drawable.h) */
+extern int		DRM(adddraw)(DRM_IOCTL_ARGS);
+extern int		DRM(rmdraw)(DRM_IOCTL_ARGS);
+
+/* Authentication IOCTL support (drm_auth.h) */
+extern int		DRM(getmagic)(DRM_IOCTL_ARGS);
+extern int		DRM(authmagic)(DRM_IOCTL_ARGS);
+
+/* Locking IOCTL support (drm_lock.h) */
+extern int		DRM(block)(DRM_IOCTL_ARGS);
+extern int		DRM(unblock)(DRM_IOCTL_ARGS);
+extern int		DRM(finish)(DRM_IOCTL_ARGS);
+
+/* Buffer management support (drm_bufs.h) */
+extern int		DRM(addmap)(DRM_IOCTL_ARGS);
+extern int		DRM(rmmap)(DRM_IOCTL_ARGS);
+#if __HAVE_DMA
+extern int		DRM(addbufs_agp)(DRM_IOCTL_ARGS);
+extern int		DRM(addbufs_pci)(DRM_IOCTL_ARGS);
+extern int		DRM(addbufs_sg)(DRM_IOCTL_ARGS);
+extern int		DRM(addbufs)(DRM_IOCTL_ARGS);
+extern int		DRM(infobufs)(DRM_IOCTL_ARGS);
+extern int		DRM(markbufs)(DRM_IOCTL_ARGS);
+extern int		DRM(freebufs)(DRM_IOCTL_ARGS);
+extern int		DRM(mapbufs)(DRM_IOCTL_ARGS);
+#endif
+
+/* DMA support (drm_dma.h) */
+#if __HAVE_DMA
+extern int		DRM(control)(DRM_IOCTL_ARGS);
+#endif
+#if __HAVE_VBL_IRQ
+extern int		DRM(wait_vblank)(DRM_IOCTL_ARGS);
+#endif
+
+/* AGP/GART support (drm_agpsupport.h) */
+#if __REALLY_HAVE_AGP
+extern int		DRM(agp_acquire)(DRM_IOCTL_ARGS);
+extern int		DRM(agp_release)(DRM_IOCTL_ARGS);
+extern int		DRM(agp_enable)(DRM_IOCTL_ARGS);
+extern int		DRM(agp_info)(DRM_IOCTL_ARGS);
+extern int		DRM(agp_alloc)(DRM_IOCTL_ARGS);
+extern int		DRM(agp_free)(DRM_IOCTL_ARGS);
+extern int		DRM(agp_unbind)(DRM_IOCTL_ARGS);
+extern int		DRM(agp_bind)(DRM_IOCTL_ARGS);
+#endif
+
+/* Scatter Gather Support (drm_scatter.h) */
+#if __HAVE_SG
+extern int		DRM(sg_alloc)(DRM_IOCTL_ARGS);
+extern int		DRM(sg_free)(DRM_IOCTL_ARGS);
 #endif
+
+
+#endif /* __KERNEL__ */
+#endif /* _DRM_P_H_ */
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_agpsupport.h b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_agpsupport.h
index ac12c867a..ca7bea9ef 100755
--- a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_agpsupport.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_agpsupport.h
@@ -27,23 +27,19 @@
  * Author:
  *    Rickard E. (Rik) Faith <faith@valinux.com>
  *    Gareth Hughes <gareth@valinux.com>
+ * $FreeBSD: src/sys/dev/drm/drm_agpsupport.h,v 1.2 2003/03/09 02:08:28 anholt Exp $
  */
 
 #include "drmP.h"
 
-#include <vm/vm.h>
-#include <vm/pmap.h>
-#if __REALLY_HAVE_AGP
-#include <sys/agpio.h>
-#endif
-
-int DRM(agp_info)(DRM_OS_IOCTL)
+int DRM(agp_info)(DRM_IOCTL_ARGS)
 {
-	drm_device_t	*dev	= kdev->si_drv1;
+	DRM_DEVICE;
 	struct agp_info *kern;
 	drm_agp_info_t   info;
 
-	if (!dev->agp || !dev->agp->acquired) return EINVAL;
+	if (!dev->agp || !dev->agp->acquired)
+		return EINVAL;
 
 	kern                   = &dev->agp->info;
 	agp_get_info(dev->agp->agpdev, kern);
@@ -61,21 +57,23 @@ int DRM(agp_info)(DRM_OS_IOCTL)
 	return 0;
 }
 
-int DRM(agp_acquire)(DRM_OS_IOCTL)
+int DRM(agp_acquire)(DRM_IOCTL_ARGS)
 {
-	drm_device_t *dev = kdev->si_drv1;
+	DRM_DEVICE;
 	int          retcode;
 
-	if (!dev->agp || dev->agp->acquired) return EINVAL;
+	if (!dev->agp || dev->agp->acquired)
+		return EINVAL;
 	retcode = agp_acquire(dev->agp->agpdev);
-	if (retcode) return retcode;
+	if (retcode)
+		return retcode;
 	dev->agp->acquired = 1;
 	return 0;
 }
 
-int DRM(agp_release)(DRM_OS_IOCTL)
+int DRM(agp_release)(DRM_IOCTL_ARGS)
 {
-	drm_device_t *dev = kdev->si_drv1;
+	DRM_DEVICE;
 
 	if (!dev->agp || !dev->agp->acquired)
 		return EINVAL;
@@ -89,17 +87,18 @@ void DRM(agp_do_release)(void)
 {
 	device_t agpdev;
 
-	agpdev = agp_find_device();
+	agpdev = DRM_AGP_FIND_DEVICE();
 	if (agpdev)
 		agp_release(agpdev);
 }
 
-int DRM(agp_enable)(DRM_OS_IOCTL)
+int DRM(agp_enable)(DRM_IOCTL_ARGS)
 {
-	drm_device_t   *dev = kdev->si_drv1;
+	DRM_DEVICE;
 	drm_agp_mode_t mode;
 
-	if (!dev->agp || !dev->agp->acquired) return EINVAL;
+	if (!dev->agp || !dev->agp->acquired)
+		return EINVAL;
 
 	mode = *(drm_agp_mode_t *) data;
 	
@@ -110,9 +109,9 @@ int DRM(agp_enable)(DRM_OS_IOCTL)
 	return 0;
 }
 
-int DRM(agp_alloc)(DRM_OS_IOCTL)
+int DRM(agp_alloc)(DRM_IOCTL_ARGS)
 {
-	drm_device_t     *dev = kdev->si_drv1;
+	DRM_DEVICE;
 	drm_agp_buffer_t request;
 	drm_agp_mem_t    *entry;
 	void	         *handle;
@@ -120,7 +119,8 @@ int DRM(agp_alloc)(DRM_OS_IOCTL)
 	u_int32_t	 type;
 	struct agp_memory_info info;
 
-	if (!dev->agp || !dev->agp->acquired) return EINVAL;
+	if (!dev->agp || !dev->agp->acquired)
+		return EINVAL;
 
 	request = *(drm_agp_buffer_t *) data;
 
@@ -142,7 +142,8 @@ int DRM(agp_alloc)(DRM_OS_IOCTL)
 	entry->pages     = pages;
 	entry->prev      = NULL;
 	entry->next      = dev->agp->memory;
-	if (dev->agp->memory) dev->agp->memory->prev = entry;
+	if (dev->agp->memory)
+		dev->agp->memory->prev = entry;
 	dev->agp->memory = entry;
 
 	agp_memory_info(dev->agp->agpdev, entry->handle, &info);
@@ -165,14 +166,15 @@ static drm_agp_mem_t * DRM(agp_lookup_entry)(drm_device_t *dev, void *handle)
 	return NULL;
 }
 
-int DRM(agp_unbind)(DRM_OS_IOCTL)
+int DRM(agp_unbind)(DRM_IOCTL_ARGS)
 {
-	drm_device_t      *dev = kdev->si_drv1;
+	DRM_DEVICE;
 	drm_agp_binding_t request;
 	drm_agp_mem_t     *entry;
 	int retcode;
 
-	if (!dev->agp || !dev->agp->acquired) return EINVAL;
+	if (!dev->agp || !dev->agp->acquired)
+		return EINVAL;
 	request = *(drm_agp_binding_t *) data;
 	if (!(entry = DRM(agp_lookup_entry)(dev, (void *) request.handle)))
 		return EINVAL;
@@ -187,9 +189,9 @@ int DRM(agp_unbind)(DRM_OS_IOCTL)
 		return retcode;
 }
 
-int DRM(agp_bind)(DRM_OS_IOCTL)
+int DRM(agp_bind)(DRM_IOCTL_ARGS)
 {
-	drm_device_t      *dev = kdev->si_drv1;
+	DRM_DEVICE;
 	drm_agp_binding_t request;
 	drm_agp_mem_t     *entry;
 	int               retcode;
@@ -209,21 +211,26 @@ int DRM(agp_bind)(DRM_OS_IOCTL)
 	return 0;
 }
 
-int DRM(agp_free)(DRM_OS_IOCTL)
+int DRM(agp_free)(DRM_IOCTL_ARGS)
 {
-	drm_device_t     *dev = kdev->si_drv1;
+	DRM_DEVICE;
 	drm_agp_buffer_t request;
 	drm_agp_mem_t    *entry;
 	
-	if (!dev->agp || !dev->agp->acquired) return EINVAL;
+	if (!dev->agp || !dev->agp->acquired)
+		return EINVAL;
 	request = *(drm_agp_buffer_t *) data;
 	if (!(entry = DRM(agp_lookup_entry)(dev, (void*) request.handle)))
 		return EINVAL;
-	if (entry->bound) DRM(unbind_agp)(entry->handle);
+	if (entry->bound)
+		DRM(unbind_agp)(entry->handle);
    
-	if (entry->prev) entry->prev->next = entry->next;
-	else             dev->agp->memory  = entry->next;
-	if (entry->next) entry->next->prev = entry->prev;
+	if (entry->prev)
+		entry->prev->next = entry->next;
+	else
+		dev->agp->memory  = entry->next;
+	if (entry->next)
+		entry->next->prev = entry->prev;
 	DRM(free_agp)(entry->handle, entry->pages);
 	DRM(free)(entry, sizeof(*entry), DRM_MEM_AGPLISTS);
 	return 0;
@@ -235,7 +242,7 @@ drm_agp_head_t *DRM(agp_init)(void)
 	drm_agp_head_t *head   = NULL;
 	int      agp_available = 1;
    
-	agpdev = agp_find_device();
+	agpdev = DRM_AGP_FIND_DEVICE();
 	if (!agpdev)
 		agp_available = 0;
 
@@ -267,9 +274,9 @@ drm_agp_head_t *DRM(agp_init)(void)
 		default:
 		}
 #endif
-		DRM_INFO("AGP at 0x%08x %dMB\n",
-			 head->info.ai_aperture_base,
-			 head->info.ai_aperture_size >> 20);
+		DRM_INFO("AGP at 0x%08lx %dMB\n",
+			 (long)head->info.ai_aperture_base,
+			 (int)(head->info.ai_aperture_size >> 20));
 	}
 	return head;
 }
@@ -284,7 +291,7 @@ agp_memory *DRM(agp_allocate_memory)(size_t pages, u32 type)
 {
 	device_t agpdev;
 
-	agpdev = agp_find_device();
+	agpdev = DRM_AGP_FIND_DEVICE();
 	if (!agpdev)
 		return NULL;
 
@@ -295,7 +302,7 @@ int DRM(agp_free_memory)(agp_memory *handle)
 {
 	device_t agpdev;
 
-	agpdev = agp_find_device();
+	agpdev = DRM_AGP_FIND_DEVICE();
 	if (!agpdev || !handle)
 		return 0;
 
@@ -307,7 +314,7 @@ int DRM(agp_bind_memory)(agp_memory *handle, off_t start)
 {
 	device_t agpdev;
 
-	agpdev = agp_find_device();
+	agpdev = DRM_AGP_FIND_DEVICE();
 	if (!agpdev || !handle)
 		return EINVAL;
 
@@ -318,7 +325,7 @@ int DRM(agp_unbind_memory)(agp_memory *handle)
 {
 	device_t agpdev;
 
-	agpdev = agp_find_device();
+	agpdev = DRM_AGP_FIND_DEVICE();
 	if (!agpdev || !handle)
 		return EINVAL;
 
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_auth.h b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_auth.h
index f2c2d8da4..c506ee7e0 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_auth.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_auth.h
@@ -27,9 +27,9 @@
  * Authors:
  *    Rickard E. (Rik) Faith <faith@valinux.com>
  *    Gareth Hughes <gareth@valinux.com>
+ * $FreeBSD: src/sys/dev/drm/drm_auth.h,v 1.3 2003/03/09 02:08:28 anholt Exp $
  */
 
-#define __NO_VERSION__
 #include "drmP.h"
 
 static int DRM(hash_magic)(drm_magic_t magic)
@@ -43,14 +43,14 @@ static drm_file_t *DRM(find_file)(drm_device_t *dev, drm_magic_t magic)
 	drm_magic_entry_t *pt;
 	int		  hash	  = DRM(hash_magic)(magic);
 
-	DRM_OS_LOCK;
+	DRM_LOCK;
 	for (pt = dev->magiclist[hash].head; pt; pt = pt->next) {
 		if (pt->magic == magic) {
 			retval = pt->priv;
 			break;
 		}
 	}
-	DRM_OS_UNLOCK;
+	DRM_UNLOCK;
 	return retval;
 }
 
@@ -63,12 +63,13 @@ int DRM(add_magic)(drm_device_t *dev, drm_file_t *priv, drm_magic_t magic)
 
 	hash	     = DRM(hash_magic)(magic);
 	entry	     = (drm_magic_entry_t*) DRM(alloc)(sizeof(*entry), DRM_MEM_MAGIC);
-	if (!entry) DRM_OS_RETURN(ENOMEM);
+	if (!entry) return DRM_ERR(ENOMEM);
+	memset(entry, 0, sizeof(*entry));
 	entry->magic = magic;
 	entry->priv  = priv;
 	entry->next  = NULL;
 
-	DRM_OS_LOCK;
+	DRM_LOCK;
 	if (dev->magiclist[hash].tail) {
 		dev->magiclist[hash].tail->next = entry;
 		dev->magiclist[hash].tail	= entry;
@@ -76,7 +77,7 @@ int DRM(add_magic)(drm_device_t *dev, drm_file_t *priv, drm_magic_t magic)
 		dev->magiclist[hash].head	= entry;
 		dev->magiclist[hash].tail	= entry;
 	}
-	DRM_OS_UNLOCK;
+	DRM_UNLOCK;
 
 	return 0;
 }
@@ -90,7 +91,7 @@ int DRM(remove_magic)(drm_device_t *dev, drm_magic_t magic)
 	DRM_DEBUG("%d\n", magic);
 	hash = DRM(hash_magic)(magic);
 
-	DRM_OS_LOCK;
+	DRM_LOCK;
 	for (pt = dev->magiclist[hash].head; pt; prev = pt, pt = pt->next) {
 		if (pt->magic == magic) {
 			if (dev->magiclist[hash].head == pt) {
@@ -102,40 +103,34 @@ int DRM(remove_magic)(drm_device_t *dev, drm_magic_t magic)
 			if (prev) {
 				prev->next = pt->next;
 			}
-			DRM_OS_UNLOCK;
-			DRM(free)(pt, sizeof(*pt), DRM_MEM_MAGIC);
+			DRM_UNLOCK;
 			return 0;
 		}
 	}
-	DRM_OS_UNLOCK;
+	DRM_UNLOCK;
 
 	DRM(free)(pt, sizeof(*pt), DRM_MEM_MAGIC);
-	DRM_OS_RETURN(EINVAL);
+	return DRM_ERR(EINVAL);
 }
 
-int DRM(getmagic)(DRM_OS_IOCTL)
+int DRM(getmagic)(DRM_IOCTL_ARGS)
 {
 	static drm_magic_t sequence = 0;
 	drm_auth_t	   auth;
-	static DRM_OS_SPINTYPE lock;
-	static int	   first = 1;
-	DRM_OS_DEVICE;
-	DRM_OS_PRIV;
-
-	if (first) {
-		DRM_OS_SPININIT(lock, "drm getmagic");
-		first = 0;
-	}
+	DRM_DEVICE;
+	DRM_PRIV;
 
 				/* Find unique magic */
 	if (priv->magic) {
 		auth.magic = priv->magic;
 	} else {
 		do {
-			DRM_OS_SPINLOCK(&lock);
-			if (!sequence) ++sequence; /* reserve 0 */
-			auth.magic = sequence++;
-			DRM_OS_SPINUNLOCK(&lock);
+			int old = sequence;
+			
+			auth.magic = old+1;
+			
+			if (!atomic_cmpset_int(&sequence, old, auth.magic))
+				continue;
 		} while (DRM(find_file)(dev, auth.magic));
 		priv->magic = auth.magic;
 		DRM(add_magic)(dev, priv, auth.magic);
@@ -143,18 +138,18 @@ int DRM(getmagic)(DRM_OS_IOCTL)
 
 	DRM_DEBUG("%u\n", auth.magic);
 
-	DRM_OS_KRNTOUSR((drm_auth_t *)data, auth, sizeof(auth));
+	DRM_COPY_TO_USER_IOCTL((drm_auth_t *)data, auth, sizeof(auth));
 
 	return 0;
 }
 
-int DRM(authmagic)(DRM_OS_IOCTL)
+int DRM(authmagic)(DRM_IOCTL_ARGS)
 {
 	drm_auth_t	   auth;
 	drm_file_t	   *file;
-	DRM_OS_DEVICE;
+	DRM_DEVICE;
 
-	DRM_OS_KRNFROMUSR(auth, (drm_auth_t *)data, sizeof(auth));
+	DRM_COPY_FROM_USER_IOCTL(auth, (drm_auth_t *)data, sizeof(auth));
 
 	DRM_DEBUG("%u\n", auth.magic);
 	if ((file = DRM(find_file)(dev, auth.magic))) {
@@ -162,5 +157,5 @@ int DRM(authmagic)(DRM_OS_IOCTL)
 		DRM(remove_magic)(dev, auth.magic);
 		return 0;
 	}
-	DRM_OS_RETURN(EINVAL);
+	return DRM_ERR(EINVAL);
 }
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_bufs.h b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_bufs.h
index d55b36d88..8e0534f2e 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_bufs.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_bufs.h
@@ -27,16 +27,9 @@
  * Authors:
  *    Rickard E. (Rik) Faith <faith@valinux.com>
  *    Gareth Hughes <gareth@valinux.com>
+ * $FreeBSD: src/sys/dev/drm/drm_bufs.h,v 1.4 2003/03/09 02:08:28 anholt Exp $
  */
 
-#define __NO_VERSION__
-#include <machine/param.h>
-#include <sys/mman.h>
-#include <vm/vm.h>
-#include <vm/pmap.h>
-#include <vm/vm_extern.h>
-#include <vm/vm_map.h>
-#include <vm/vm_param.h>
 #include "drmP.h"
 
 #ifndef __HAVE_PCI_DMA
@@ -74,84 +67,85 @@ int DRM(order)( unsigned long size )
 	return order;
 }
 
-int DRM(addmap)( DRM_OS_IOCTL )
+int DRM(addmap)( DRM_IOCTL_ARGS )
 {
-	DRM_OS_DEVICE;
-	drm_map_t *map;
+	DRM_DEVICE;
+	drm_map_t request;
+	drm_local_map_t *map;
 	drm_map_list_entry_t *list;
-
+	
 	if (!(dev->flags & (FREAD|FWRITE)))
-		DRM_OS_RETURN(EACCES); /* Require read/write */
+		return DRM_ERR(EACCES); /* Require read/write */
 
-	map = (drm_map_t *) DRM(alloc)( sizeof(*map), DRM_MEM_MAPS );
-	if ( !map )
-		DRM_OS_RETURN(ENOMEM);
+	DRM_COPY_FROM_USER_IOCTL( request, (drm_map_t *)data, sizeof(drm_map_t) );
 
-	*map = *(drm_map_t *)data;
+	map = (drm_local_map_t *) DRM(alloc)( sizeof(*map), DRM_MEM_MAPS );
+	if ( !map )
+		return DRM_ERR(ENOMEM);
 
+	map->offset = request.offset;
+	map->size = request.size;
+	map->type = request.type;
+	map->flags = request.flags;
+	map->mtrr   = -1;
+	map->handle = 0;
+	
 	/* Only allow shared memory to be removable since we only keep enough
 	 * book keeping information about shared memory to allow for removal
 	 * when processes fork.
 	 */
 	if ( (map->flags & _DRM_REMOVABLE) && map->type != _DRM_SHM ) {
 		DRM(free)( map, sizeof(*map), DRM_MEM_MAPS );
-		DRM_OS_RETURN(EINVAL);
+		return DRM_ERR(EINVAL);
 	}
 	DRM_DEBUG( "offset = 0x%08lx, size = 0x%08lx, type = %d\n",
 		   map->offset, map->size, map->type );
 	if ( (map->offset & PAGE_MASK) || (map->size & PAGE_MASK) ) {
 		DRM(free)( map, sizeof(*map), DRM_MEM_MAPS );
-		DRM_OS_RETURN(EINVAL);
-	}
-	map->mtrr   = -1;
-	map->handle = 0;
-
-	TAILQ_FOREACH(list, dev->maplist, link) {
-		drm_map_t *entry = list->map;
-		if (        (entry->offset >= map->offset
-			    && (entry->offset) < (map->offset + map->size) )
-			|| ((entry->offset + entry->size) >= map->offset
-			    && (entry->offset + entry->size) < (map->offset + map->size) ) 
-			|| ((entry->offset < map->offset)
-			    && (entry->offset + entry->size) >= (map->offset + map->size) ) )
-			DRM_DEBUG("map collission: add(0x%lx-0x%lx), current(0x%lx-0x%lx)\n", 
-				entry->offset, entry->offset + entry->size - 1,
-				map->offset, map->offset + map->size - 1);
+		return DRM_ERR(EINVAL);
 	}
 
 	switch ( map->type ) {
 	case _DRM_REGISTERS:
 	case _DRM_FRAME_BUFFER:
-#if !defined(__sparc__) && !defined(__alpha__)
-		if ( map->offset + map->size < map->offset
-		) {
+		if ( map->offset + map->size < map->offset ) {
 			DRM(free)( map, sizeof(*map), DRM_MEM_MAPS );
-			DRM_OS_RETURN(EINVAL);
+			return DRM_ERR(EINVAL);
 		}
-#endif
-#ifdef __alpha__
-		map->offset += dev->hose->mem_space->start;
-#endif
 #if __REALLY_HAVE_MTRR
 		if ( map->type == _DRM_FRAME_BUFFER ||
 		     (map->flags & _DRM_WRITE_COMBINING) ) {
-			map->mtrr = mtrr_add( map->offset, map->size,
-					      MTRR_TYPE_WRCOMB, 1 );
-		}
+#ifdef __FreeBSD__
+			int retcode = 0, act;
+			struct mem_range_desc mrdesc;
+			mrdesc.mr_base = map->offset;
+			mrdesc.mr_len = map->size;
+			mrdesc.mr_flags = MDF_WRITECOMBINE;
+			act = MEMRANGE_SET_UPDATE;
+			bcopy(DRIVER_NAME, &mrdesc.mr_owner, strlen(DRIVER_NAME));
+			retcode = mem_range_attr_set(&mrdesc, &act);
+			map->mtrr=1;
+#elif defined __NetBSD__
+			struct mtrr mtrrmap;
+			int one = 1;
+			mtrrmap.base = map->offset;
+			mtrrmap.len = map->size;
+			mtrrmap.type = MTRR_TYPE_WC;
+			mtrrmap.flags = MTRR_VALID;
+			map->mtrr = mtrr_set( &mtrrmap, &one, p, MTRR_GETSET_KERNEL );
 #endif
-		map->handle = DRM(ioremap)( map->offset, map->size );
+		}
+#endif /* __REALLY_HAVE_MTRR */
+		DRM_IOREMAP(map);
 		break;
 
 	case _DRM_SHM:
-		DRM_INFO( "%ld %d %d\n",
-			   map->size, DRM(order)( map->size ), PAGE_SHIFT);
-		map->handle = (void *)DRM(alloc_pages)
-			(DRM(order)(map->size) - PAGE_SHIFT, DRM_MEM_SAREA);
+		map->handle = (void *)DRM(alloc)(map->size, DRM_MEM_SAREA);
 		DRM_DEBUG( "%ld %d %p\n",
 			   map->size, DRM(order)( map->size ), map->handle );
 		if ( !map->handle ) {
 			DRM(free)( map, sizeof(*map), DRM_MEM_MAPS );
-			DRM_OS_RETURN(ENOMEM);
+			return DRM_ERR(ENOMEM);
 		}
 		map->offset = (unsigned long)map->handle;
 		if ( map->flags & _DRM_CONTAINS_LOCK ) {
@@ -160,9 +154,6 @@ int DRM(addmap)( DRM_OS_IOCTL )
 		break;
 #if __REALLY_HAVE_AGP
 	case _DRM_AGP:
-#ifdef __alpha__
-		map->offset += dev->hose->mem_space->start;
-#endif
 		map->offset += dev->agp->base;
 		map->mtrr   = dev->agp->agp_mtrr; /* for getmap */
 		break;
@@ -170,33 +161,41 @@ int DRM(addmap)( DRM_OS_IOCTL )
 	case _DRM_SCATTER_GATHER:
 		if (!dev->sg) {
 			DRM(free)(map, sizeof(*map), DRM_MEM_MAPS);
-			DRM_OS_RETURN(EINVAL);
+			return DRM_ERR(EINVAL);
 		}
 		map->offset = map->offset + dev->sg->handle;
 		break;
 
 	default:
 		DRM(free)( map, sizeof(*map), DRM_MEM_MAPS );
-		DRM_OS_RETURN(EINVAL);
+		return DRM_ERR(EINVAL);
 	}
 
 	list = DRM(alloc)(sizeof(*list), DRM_MEM_MAPS);
 	if(!list) {
 		DRM(free)(map, sizeof(*map), DRM_MEM_MAPS);
-		DRM_OS_RETURN(EINVAL);
+		return DRM_ERR(EINVAL);
 	}
 	memset(list, 0, sizeof(*list));
 	list->map = map;
 
-	DRM_OS_LOCK;
+	DRM_LOCK;
 	TAILQ_INSERT_TAIL(dev->maplist, list, link);
-	DRM_OS_UNLOCK;
+	DRM_UNLOCK;
 
-	*(drm_map_t *)data = *map;
+	request.offset = map->offset;
+	request.size = map->size;
+	request.type = map->type;
+	request.flags = map->flags;
+	request.mtrr   = map->mtrr;
+	request.handle = map->handle;
 
-	if ( map->type != _DRM_SHM ) {
-		((drm_map_t *)data)->handle = (void *)map->offset;
+	if ( request.type != _DRM_SHM ) {
+		request.handle = (void *)request.offset;
 	}
+
+	DRM_COPY_TO_USER_IOCTL( (drm_map_t *)data, request, sizeof(drm_map_t) );
+
 	return 0;
 }
 
@@ -205,17 +204,17 @@ int DRM(addmap)( DRM_OS_IOCTL )
  * isn't in use.
  */
 
-int DRM(rmmap)( DRM_OS_IOCTL )
+int DRM(rmmap)( DRM_IOCTL_ARGS )
 {
-	DRM_OS_DEVICE;
+	DRM_DEVICE;
 	drm_map_list_entry_t *list;
-	drm_map_t *map;
+	drm_local_map_t *map;
 	drm_map_t request;
 	int found_maps = 0;
 
-	DRM_OS_KRNFROMUSR( request, (drm_map_t *)data, sizeof(request) );
+	DRM_COPY_FROM_USER_IOCTL( request, (drm_map_t *)data, sizeof(request) );
 
-	DRM_OS_LOCK;
+	DRM_LOCK;
 	TAILQ_FOREACH(list, dev->maplist, link) {
 		map = list->map;
 		if(map->handle == request.handle &&
@@ -226,8 +225,8 @@ int DRM(rmmap)( DRM_OS_IOCTL )
 	 * find anything.
 	 */
 	if(list == NULL) {
-		DRM_OS_UNLOCK;
-		DRM_OS_RETURN(EINVAL);
+		DRM_UNLOCK;
+		return DRM_ERR(EINVAL);
 	}
 	TAILQ_REMOVE(dev->maplist, list, link);
 	DRM(free)(list, sizeof(*list), DRM_MEM_MAPS);
@@ -240,16 +239,32 @@ int DRM(rmmap)( DRM_OS_IOCTL )
 #if __REALLY_HAVE_MTRR
 			if (map->mtrr >= 0) {
 				int retcode;
-				retcode = mtrr_del(map->mtrr,
-						   map->offset,
-						   map->size);
+#ifdef __FreeBSD__
+				int act;
+				struct mem_range_desc mrdesc;
+				mrdesc.mr_base = map->offset;
+				mrdesc.mr_len = map->size;
+				mrdesc.mr_flags = MDF_WRITECOMBINE;
+				act = MEMRANGE_SET_REMOVE;
+				bcopy(DRIVER_NAME, &mrdesc.mr_owner, strlen(DRIVER_NAME));
+				retcode = mem_range_attr_set(&mrdesc, &act);
+#elif defined __NetBSD__
+				struct mtrr mtrrmap;
+				int one = 1;
+				mtrrmap.base = map->offset;
+				mtrrmap.len = map->size;
+				mtrrmap.type = 0;
+				mtrrmap.flags = 0;
+				mtrrmap.owner = p->p_pid;
+				retcode = mtrr_set( &mtrrmap, &one, p, MTRR_GETSET_KERNEL);
 				DRM_DEBUG("mtrr_del = %d\n", retcode);
+#endif
 			}
 #endif
-			DRM(ioremapfree)(map->handle, map->size);
+			DRM(ioremapfree)( map );
 			break;
 		case _DRM_SHM:
-			DRM(free_pages)( (unsigned long)map->handle, DRM(order)(map->size), DRM_MEM_SAREA );
+			DRM(free)( map->handle, map->size, DRM_MEM_SAREA );
 			break;
 		case _DRM_AGP:
 		case _DRM_SCATTER_GATHER:
@@ -257,7 +272,7 @@ int DRM(rmmap)( DRM_OS_IOCTL )
 		}
 		DRM(free)(map, sizeof(*map), DRM_MEM_MAPS);
 	}
-	DRM_OS_UNLOCK;
+	DRM_UNLOCK;
 	return 0;
 }
 
@@ -270,8 +285,8 @@ static void DRM(cleanup_buf_error)(drm_buf_entry_t *entry)
 
 	if (entry->seg_count) {
 		for (i = 0; i < entry->seg_count; i++) {
-			DRM(free_pages)(entry->seglist[i],
-					entry->page_order,
+			DRM(free)((void *)entry->seglist[i],
+					entry->buf_size,
 					DRM_MEM_DMA);
 		}
 		DRM(free)(entry->seglist,
@@ -304,9 +319,9 @@ static void DRM(cleanup_buf_error)(drm_buf_entry_t *entry)
 }
 
 #if __REALLY_HAVE_AGP
-int DRM(addbufs_agp)( DRM_OS_IOCTL )
+int DRM(addbufs_agp)( DRM_IOCTL_ARGS )
 {
-	DRM_OS_DEVICE;
+	DRM_DEVICE;
 	drm_device_dma_t *dma = dev->dma;
 	drm_buf_desc_t request;
 	drm_buf_entry_t *entry;
@@ -323,9 +338,9 @@ int DRM(addbufs_agp)( DRM_OS_IOCTL )
 	int i;
 	drm_buf_t **temp_buflist;
 
-	if ( !dma ) DRM_OS_RETURN(EINVAL);
+	if ( !dma ) return DRM_ERR(EINVAL);
 
-	DRM_OS_KRNFROMUSR( request, (drm_buf_desc_t *)data, sizeof(request) );
+	DRM_COPY_FROM_USER_IOCTL( request, (drm_buf_desc_t *)data, sizeof(request) );
 
 	count = request.count;
 	order = DRM(order)( request.size );
@@ -348,38 +363,38 @@ int DRM(addbufs_agp)( DRM_OS_IOCTL )
 	DRM_DEBUG( "total:      %d\n",  total );
 
 	if ( order < DRM_MIN_ORDER || order > DRM_MAX_ORDER ) 
-		DRM_OS_RETURN(EINVAL);
+		return DRM_ERR(EINVAL);
 	if ( dev->queue_count ) 
-		DRM_OS_RETURN(EBUSY); /* Not while in use */
+		return DRM_ERR(EBUSY); /* Not while in use */
 
-	DRM_OS_SPINLOCK( &dev->count_lock );
+	DRM_SPINLOCK( &dev->count_lock );
 	if ( dev->buf_use ) {
-		DRM_OS_SPINUNLOCK( &dev->count_lock );
-		DRM_OS_RETURN(EBUSY);
+		DRM_SPINUNLOCK( &dev->count_lock );
+		return DRM_ERR(EBUSY);
 	}
 	atomic_inc( &dev->buf_alloc );
-	DRM_OS_SPINUNLOCK( &dev->count_lock );
+	DRM_SPINUNLOCK( &dev->count_lock );
 
-	DRM_OS_LOCK;
+	DRM_LOCK;
 	entry = &dma->bufs[order];
 	if ( entry->buf_count ) {
-		DRM_OS_UNLOCK;
+		DRM_UNLOCK;
 		atomic_dec( &dev->buf_alloc );
-		DRM_OS_RETURN(ENOMEM); /* May only call once for each order */
+		return DRM_ERR(ENOMEM); /* May only call once for each order */
 	}
 
 	if (count < 0 || count > 4096) {
-		DRM_OS_UNLOCK;
+		DRM_UNLOCK;
 		atomic_dec( &dev->buf_alloc );
-		DRM_OS_RETURN(EINVAL);
+		return DRM_ERR(EINVAL);
 	}
 
 	entry->buflist = DRM(alloc)( count * sizeof(*entry->buflist),
 				    DRM_MEM_BUFS );
 	if ( !entry->buflist ) {
-		DRM_OS_UNLOCK;
+		DRM_UNLOCK;
 		atomic_dec( &dev->buf_alloc );
-		DRM_OS_RETURN(ENOMEM);
+		return DRM_ERR(ENOMEM);
 	}
 	memset( entry->buflist, 0, count * sizeof(*entry->buflist) );
 
@@ -402,7 +417,7 @@ int DRM(addbufs_agp)( DRM_OS_IOCTL )
 		buf->waiting = 0;
 		buf->pending = 0;
 		buf->dma_wait = 0;
-		buf->pid     = 0;
+		buf->filp    = NULL;
 
 		buf->dev_priv_size = sizeof(DRIVER_BUF_PRIV_T);
 		buf->dev_private = DRM(alloc)( sizeof(DRIVER_BUF_PRIV_T),
@@ -436,9 +451,9 @@ int DRM(addbufs_agp)( DRM_OS_IOCTL )
 	if(!temp_buflist) {
 		/* Free the entry because it isn't valid */
 		DRM(cleanup_buf_error)(entry);
-		DRM_OS_UNLOCK;
+		DRM_UNLOCK;
 		atomic_dec( &dev->buf_alloc );
-		DRM_OS_RETURN(ENOMEM);
+		return DRM_ERR(ENOMEM);
 	}
 	dma->buflist = temp_buflist;
 
@@ -458,12 +473,12 @@ int DRM(addbufs_agp)( DRM_OS_IOCTL )
 		DRM(freelist_put)( dev, &entry->freelist, &entry->buflist[i] );
 	}
 #endif
-	DRM_OS_UNLOCK;
+	DRM_UNLOCK;
 
 	request.count = entry->buf_count;
 	request.size = size;
 
-	DRM_OS_KRNTOUSR( (drm_buf_desc_t *)data, request, sizeof(request) );
+	DRM_COPY_TO_USER_IOCTL( (drm_buf_desc_t *)data, request, sizeof(request) );
 
 	dma->flags = _DRM_DMA_USE_AGP;
 
@@ -473,9 +488,9 @@ int DRM(addbufs_agp)( DRM_OS_IOCTL )
 #endif /* __REALLY_HAVE_AGP */
 
 #if __HAVE_PCI_DMA
-int DRM(addbufs_pci)( DRM_OS_IOCTL )
+int DRM(addbufs_pci)( DRM_IOCTL_ARGS )
 {
-	DRM_OS_DEVICE;
+	DRM_DEVICE;
 	drm_device_dma_t *dma = dev->dma;
 	drm_buf_desc_t request;
 	int count;
@@ -494,9 +509,9 @@ int DRM(addbufs_pci)( DRM_OS_IOCTL )
 	unsigned long *temp_pagelist;
 	drm_buf_t **temp_buflist;
 
-	if ( !dma ) DRM_OS_RETURN(EINVAL);
+	if ( !dma ) return DRM_ERR(EINVAL);
 
-	DRM_OS_KRNFROMUSR( request, (drm_buf_desc_t *)data, sizeof(request) );
+	DRM_COPY_FROM_USER_IOCTL( request, (drm_buf_desc_t *)data, sizeof(request) );
 
 	count = request.count;
 	order = DRM(order)( request.size );
@@ -507,43 +522,43 @@ int DRM(addbufs_pci)( DRM_OS_IOCTL )
 		   order, dev->queue_count );
 
 	if ( order < DRM_MIN_ORDER || order > DRM_MAX_ORDER ) 
-		DRM_OS_RETURN(EINVAL);
+		return DRM_ERR(EINVAL);
 	if ( dev->queue_count ) 
-		DRM_OS_RETURN(EBUSY); /* Not while in use */
+		return DRM_ERR(EBUSY); /* Not while in use */
 
 	alignment = (request.flags & _DRM_PAGE_ALIGN)
 		? round_page(size) : size;
 	page_order = order - PAGE_SHIFT > 0 ? order - PAGE_SHIFT : 0;
 	total = PAGE_SIZE << page_order;
 
-	DRM_OS_SPINLOCK( &dev->count_lock );
+	DRM_SPINLOCK( &dev->count_lock );
 	if ( dev->buf_use ) {
-		DRM_OS_SPINUNLOCK( &dev->count_lock );
-		DRM_OS_RETURN(EBUSY);
+		DRM_SPINUNLOCK( &dev->count_lock );
+		return DRM_ERR(EBUSY);
 	}
 	atomic_inc( &dev->buf_alloc );
-	DRM_OS_SPINUNLOCK( &dev->count_lock );
+	DRM_SPINUNLOCK( &dev->count_lock );
 
-	DRM_OS_LOCK;
+	DRM_LOCK;
 	entry = &dma->bufs[order];
 	if ( entry->buf_count ) {
-		DRM_OS_UNLOCK;
+		DRM_UNLOCK;
 		atomic_dec( &dev->buf_alloc );
-		DRM_OS_RETURN(ENOMEM);	/* May only call once for each order */
+		return DRM_ERR(ENOMEM);	/* May only call once for each order */
 	}
 
 	if (count < 0 || count > 4096) {
-		DRM_OS_UNLOCK;
+		DRM_UNLOCK;
 		atomic_dec( &dev->buf_alloc );
-		DRM_OS_RETURN(EINVAL);
+		return DRM_ERR(EINVAL);
 	}
 
 	entry->buflist = DRM(alloc)( count * sizeof(*entry->buflist),
 				    DRM_MEM_BUFS );
 	if ( !entry->buflist ) {
-		DRM_OS_UNLOCK;
+		DRM_UNLOCK;
 		atomic_dec( &dev->buf_alloc );
-		DRM_OS_RETURN(ENOMEM);
+		return DRM_ERR(ENOMEM);
 	}
 	memset( entry->buflist, 0, count * sizeof(*entry->buflist) );
 
@@ -553,9 +568,9 @@ int DRM(addbufs_pci)( DRM_OS_IOCTL )
 		DRM(free)( entry->buflist,
 			  count * sizeof(*entry->buflist),
 			  DRM_MEM_BUFS );
-		DRM_OS_UNLOCK;
+		DRM_UNLOCK;
 		atomic_dec( &dev->buf_alloc );
-		DRM_OS_RETURN(ENOMEM);
+		return DRM_ERR(ENOMEM);
 	}
 	memset( entry->seglist, 0, count * sizeof(*entry->seglist) );
 
@@ -571,9 +586,9 @@ int DRM(addbufs_pci)( DRM_OS_IOCTL )
 		DRM(free)( entry->seglist,
 			   count * sizeof(*entry->seglist),
 			   DRM_MEM_SEGS );
-		DRM_OS_UNLOCK;
+		DRM_UNLOCK;
 		atomic_dec( &dev->buf_alloc );
-		DRM_OS_RETURN(ENOMEM);
+		return DRM_ERR(ENOMEM);
 	}
 
 	dma->pagelist = temp_pagelist;
@@ -586,7 +601,7 @@ int DRM(addbufs_pci)( DRM_OS_IOCTL )
 	page_count = 0;
 
 	while ( entry->buf_count < count ) {
-		page = DRM(alloc_pages)( page_order, DRM_MEM_DMA );
+		page = (unsigned long)DRM(alloc)( size, DRM_MEM_DMA );
 		if ( !page ) break;
 		entry->seglist[entry->seg_count++] = page;
 		for ( i = 0 ; i < (1 << page_order) ; i++ ) {
@@ -610,7 +625,7 @@ int DRM(addbufs_pci)( DRM_OS_IOCTL )
 			buf->waiting = 0;
 			buf->pending = 0;
 			buf->dma_wait = 0;
-			buf->pid     = 0;
+			buf->filp    = NULL;
 #if __HAVE_DMA_HISTOGRAM
 			buf->time_queued     = 0;
 			buf->time_dispatched = 0;
@@ -631,9 +646,9 @@ int DRM(addbufs_pci)( DRM_OS_IOCTL )
 	if(!temp_buflist) {
 		/* Free the entry because it isn't valid */
 		DRM(cleanup_buf_error)(entry);
-		DRM_OS_UNLOCK;
+		DRM_UNLOCK;
 		atomic_dec( &dev->buf_alloc );
-		DRM_OS_RETURN(ENOMEM);
+		return DRM_ERR(ENOMEM);
 	}
 	dma->buflist = temp_buflist;
 
@@ -652,12 +667,12 @@ int DRM(addbufs_pci)( DRM_OS_IOCTL )
 		DRM(freelist_put)( dev, &entry->freelist, &entry->buflist[i] );
 	}
 #endif
-	DRM_OS_UNLOCK;
+	DRM_UNLOCK;
 
 	request.count = entry->buf_count;
 	request.size = size;
 
-	DRM_OS_KRNTOUSR( (drm_buf_desc_t *)data, request, sizeof(request) );
+	DRM_COPY_TO_USER_IOCTL( (drm_buf_desc_t *)data, request, sizeof(request) );
 
 	atomic_dec( &dev->buf_alloc );
 	return 0;
@@ -666,9 +681,9 @@ int DRM(addbufs_pci)( DRM_OS_IOCTL )
 #endif /* __HAVE_PCI_DMA */
 
 #if __REALLY_HAVE_SG
-int DRM(addbufs_sg)( DRM_OS_IOCTL )
+int DRM(addbufs_sg)( DRM_IOCTL_ARGS )
 {
-	DRM_OS_DEVICE;
+	DRM_DEVICE;
 	drm_device_dma_t *dma = dev->dma;
 	drm_buf_desc_t request;
 	drm_buf_entry_t *entry;
@@ -685,9 +700,9 @@ int DRM(addbufs_sg)( DRM_OS_IOCTL )
 	int i;
 	drm_buf_t **temp_buflist;
 
-	if ( !dma ) DRM_OS_RETURN(EINVAL);
+	if ( !dma ) return DRM_ERR(EINVAL);
 
-	DRM_OS_KRNFROMUSR( request, (drm_buf_desc_t *)data, sizeof(request) );
+	DRM_COPY_FROM_USER_IOCTL( request, (drm_buf_desc_t *)data, sizeof(request) );
 
 	count = request.count;
 	order = DRM(order)( request.size );
@@ -710,37 +725,37 @@ int DRM(addbufs_sg)( DRM_OS_IOCTL )
 	DRM_DEBUG( "total:      %d\n",  total );
 
 	if ( order < DRM_MIN_ORDER || order > DRM_MAX_ORDER ) 
-		DRM_OS_RETURN(EINVAL);
-	if ( dev->queue_count ) DRM_OS_RETURN(EBUSY); /* Not while in use */
+		return DRM_ERR(EINVAL);
+	if ( dev->queue_count ) return DRM_ERR(EBUSY); /* Not while in use */
 
-	DRM_OS_SPINLOCK( &dev->count_lock );
+	DRM_SPINLOCK( &dev->count_lock );
 	if ( dev->buf_use ) {
-		DRM_OS_SPINUNLOCK( &dev->count_lock );
-		DRM_OS_RETURN(EBUSY);
+		DRM_SPINUNLOCK( &dev->count_lock );
+		return DRM_ERR(EBUSY);
 	}
 	atomic_inc( &dev->buf_alloc );
-	DRM_OS_SPINUNLOCK( &dev->count_lock );
+	DRM_SPINUNLOCK( &dev->count_lock );
 
-	DRM_OS_LOCK;
+	DRM_LOCK;
 	entry = &dma->bufs[order];
 	if ( entry->buf_count ) {
-		DRM_OS_UNLOCK;
+		DRM_UNLOCK;
 		atomic_dec( &dev->buf_alloc );
-		DRM_OS_RETURN(ENOMEM); /* May only call once for each order */
+		return DRM_ERR(ENOMEM); /* May only call once for each order */
 	}
 
 	if (count < 0 || count > 4096) {
-		DRM_OS_UNLOCK;
+		DRM_UNLOCK;
 		atomic_dec( &dev->buf_alloc );
-		DRM_OS_RETURN(EINVAL);
+		return DRM_ERR(EINVAL);
 	}
 
 	entry->buflist = DRM(alloc)( count * sizeof(*entry->buflist),
 				     DRM_MEM_BUFS );
 	if ( !entry->buflist ) {
-		DRM_OS_UNLOCK;
+		DRM_UNLOCK;
 		atomic_dec( &dev->buf_alloc );
-		DRM_OS_RETURN(ENOMEM);
+		return DRM_ERR(ENOMEM);
 	}
 	memset( entry->buflist, 0, count * sizeof(*entry->buflist) );
 
@@ -763,7 +778,7 @@ int DRM(addbufs_sg)( DRM_OS_IOCTL )
 		buf->waiting = 0;
 		buf->pending = 0;
 		buf->dma_wait = 0;
-		buf->pid     = 0;
+		buf->filp    = NULL;
 
 		buf->dev_priv_size = sizeof(DRIVER_BUF_PRIV_T);
 		buf->dev_private = DRM(alloc)( sizeof(DRIVER_BUF_PRIV_T),
@@ -772,9 +787,9 @@ int DRM(addbufs_sg)( DRM_OS_IOCTL )
 			/* Set count correctly so we free the proper amount. */
 			entry->buf_count = count;
 			DRM(cleanup_buf_error)(entry);
-			DRM_OS_UNLOCK;
+			DRM_UNLOCK;
 			atomic_dec( &dev->buf_alloc );
-			DRM_OS_RETURN(ENOMEM);
+			return DRM_ERR(ENOMEM);
 		}
 
 		memset( buf->dev_private, 0, buf->dev_priv_size );
@@ -803,9 +818,9 @@ int DRM(addbufs_sg)( DRM_OS_IOCTL )
 	if(!temp_buflist) {
 		/* Free the entry because it isn't valid */
 		DRM(cleanup_buf_error)(entry);
-		DRM_OS_UNLOCK;
+		DRM_UNLOCK;
 		atomic_dec( &dev->buf_alloc );
-		DRM_OS_RETURN(ENOMEM);
+		return DRM_ERR(ENOMEM);
 	}
 	dma->buflist = temp_buflist;
 
@@ -825,12 +840,12 @@ int DRM(addbufs_sg)( DRM_OS_IOCTL )
 		DRM(freelist_put)( dev, &entry->freelist, &entry->buflist[i] );
 	}
 #endif
-	DRM_OS_UNLOCK;
+	DRM_UNLOCK;
 
 	request.count = entry->buf_count;
 	request.size = size;
 
-	DRM_OS_KRNTOUSR( (drm_buf_desc_t *)data, request, sizeof(request) );
+	DRM_COPY_TO_USER_IOCTL( (drm_buf_desc_t *)data, request, sizeof(request) );
 
 	dma->flags = _DRM_DMA_USE_SG;
 
@@ -839,48 +854,48 @@ int DRM(addbufs_sg)( DRM_OS_IOCTL )
 }
 #endif /* __REALLY_HAVE_SG */
 
-int DRM(addbufs)( DRM_OS_IOCTL )
+int DRM(addbufs)( DRM_IOCTL_ARGS )
 {
 	drm_buf_desc_t request;
 
-	DRM_OS_KRNFROMUSR( request, (drm_buf_desc_t *)data, sizeof(request) );
+	DRM_COPY_FROM_USER_IOCTL( request, (drm_buf_desc_t *)data, sizeof(request) );
 
 #if __REALLY_HAVE_AGP
 	if ( request.flags & _DRM_AGP_BUFFER )
-		return DRM(addbufs_agp)( kdev, cmd, data, flags, p );
+		return DRM(addbufs_agp)( kdev, cmd, data, flags, p, filp );
 	else
 #endif
 #if __REALLY_HAVE_SG
 	if ( request.flags & _DRM_SG_BUFFER )
-		return DRM(addbufs_sg)( kdev, cmd, data, flags, p );
+		return DRM(addbufs_sg)( kdev, cmd, data, flags, p, filp );
 	else
 #endif
 #if __HAVE_PCI_DMA
-		return DRM(addbufs_pci)( kdev, cmd, data, flags, p );
+		return DRM(addbufs_pci)( kdev, cmd, data, flags, p, filp );
 #else
-		DRM_OS_RETURN(EINVAL);
+		return DRM_ERR(EINVAL);
 #endif
 }
 
-int DRM(infobufs)( DRM_OS_IOCTL )
+int DRM(infobufs)( DRM_IOCTL_ARGS )
 {
-	DRM_OS_DEVICE;
+	DRM_DEVICE;
 	drm_device_dma_t *dma = dev->dma;
 	drm_buf_info_t request;
 	int i;
 	int count;
 
-	if ( !dma ) DRM_OS_RETURN(EINVAL);
+	if ( !dma ) return DRM_ERR(EINVAL);
 
-	DRM_OS_SPINLOCK( &dev->count_lock );
+	DRM_SPINLOCK( &dev->count_lock );
 	if ( atomic_read( &dev->buf_alloc ) ) {
-		DRM_OS_SPINUNLOCK( &dev->count_lock );
-		DRM_OS_RETURN(EBUSY);
+		DRM_SPINUNLOCK( &dev->count_lock );
+		return DRM_ERR(EBUSY);
 	}
 	++dev->buf_use;		/* Can't allocate more after this call */
-	DRM_OS_SPINUNLOCK( &dev->count_lock );
+	DRM_SPINUNLOCK( &dev->count_lock );
 
-	DRM_OS_KRNFROMUSR( request, (drm_buf_info_t *)data, sizeof(request) );
+	DRM_COPY_FROM_USER_IOCTL( request, (drm_buf_info_t *)data, sizeof(request) );
 
 	for ( i = 0, count = 0 ; i < DRM_MAX_ORDER + 1 ; i++ ) {
 		if ( dma->bufs[i].buf_count ) ++count;
@@ -894,19 +909,19 @@ int DRM(infobufs)( DRM_OS_IOCTL )
 				drm_buf_desc_t *to = &request.list[count];
 				drm_buf_entry_t *from = &dma->bufs[i];
 				drm_freelist_t *list = &dma->bufs[i].freelist;
-				if ( DRM_OS_COPYTOUSR( &to->count,
+				if ( DRM_COPY_TO_USER( &to->count,
 						   &from->buf_count,
 						   sizeof(from->buf_count) ) ||
-				     DRM_OS_COPYTOUSR( &to->size,
+				     DRM_COPY_TO_USER( &to->size,
 						   &from->buf_size,
 						   sizeof(from->buf_size) ) ||
-				     DRM_OS_COPYTOUSR( &to->low_mark,
+				     DRM_COPY_TO_USER( &to->low_mark,
 						   &list->low_mark,
 						   sizeof(list->low_mark) ) ||
-				     DRM_OS_COPYTOUSR( &to->high_mark,
+				     DRM_COPY_TO_USER( &to->high_mark,
 						   &list->high_mark,
 						   sizeof(list->high_mark) ) )
-					DRM_OS_RETURN(EFAULT);
+					return DRM_ERR(EFAULT);
 
 				DRM_DEBUG( "%d %d %d %d %d\n",
 					   i,
@@ -920,34 +935,34 @@ int DRM(infobufs)( DRM_OS_IOCTL )
 	}
 	request.count = count;
 
-	DRM_OS_KRNTOUSR( (drm_buf_info_t *)data, request, sizeof(request) );
+	DRM_COPY_TO_USER_IOCTL( (drm_buf_info_t *)data, request, sizeof(request) );
 
 	return 0;
 }
 
-int DRM(markbufs)( DRM_OS_IOCTL )
+int DRM(markbufs)( DRM_IOCTL_ARGS )
 {
-	DRM_OS_DEVICE;
+	DRM_DEVICE;
 	drm_device_dma_t *dma = dev->dma;
 	drm_buf_desc_t request;
 	int order;
 	drm_buf_entry_t *entry;
 
-	if ( !dma ) DRM_OS_RETURN(EINVAL);
+	if ( !dma ) return DRM_ERR(EINVAL);
 
-	DRM_OS_KRNFROMUSR( request, (drm_buf_desc_t *)data, sizeof(request) );
+	DRM_COPY_FROM_USER_IOCTL( request, (drm_buf_desc_t *)data, sizeof(request) );
 
 	DRM_DEBUG( "%d, %d, %d\n",
 		   request.size, request.low_mark, request.high_mark );
 	order = DRM(order)( request.size );
 	if ( order < DRM_MIN_ORDER || order > DRM_MAX_ORDER ) 
-		DRM_OS_RETURN(EINVAL);
+		return DRM_ERR(EINVAL);
 	entry = &dma->bufs[order];
 
 	if ( request.low_mark < 0 || request.low_mark > entry->buf_count )
-		DRM_OS_RETURN(EINVAL);
+		return DRM_ERR(EINVAL);
 	if ( request.high_mark < 0 || request.high_mark > entry->buf_count )
-		DRM_OS_RETURN(EINVAL);
+		return DRM_ERR(EINVAL);
 
 	entry->freelist.low_mark  = request.low_mark;
 	entry->freelist.high_mark = request.high_mark;
@@ -955,35 +970,35 @@ int DRM(markbufs)( DRM_OS_IOCTL )
 	return 0;
 }
 
-int DRM(freebufs)( DRM_OS_IOCTL )
+int DRM(freebufs)( DRM_IOCTL_ARGS )
 {
-	DRM_OS_DEVICE;
+	DRM_DEVICE;
 	drm_device_dma_t *dma = dev->dma;
 	drm_buf_free_t request;
 	int i;
 	int idx;
 	drm_buf_t *buf;
 
-	if ( !dma ) DRM_OS_RETURN(EINVAL);
+	if ( !dma ) return DRM_ERR(EINVAL);
 
-	DRM_OS_KRNFROMUSR( request, (drm_buf_free_t *)data, sizeof(request) );
+	DRM_COPY_FROM_USER_IOCTL( request, (drm_buf_free_t *)data, sizeof(request) );
 
 	DRM_DEBUG( "%d\n", request.count );
 	for ( i = 0 ; i < request.count ; i++ ) {
-		if ( DRM_OS_COPYFROMUSR( &idx,
+		if ( DRM_COPY_FROM_USER( &idx,
 				     &request.list[i],
 				     sizeof(idx) ) )
-			DRM_OS_RETURN(EFAULT);
+			return DRM_ERR(EFAULT);
 		if ( idx < 0 || idx >= dma->buf_count ) {
 			DRM_ERROR( "Index %d (of %d max)\n",
 				   idx, dma->buf_count - 1 );
-			DRM_OS_RETURN(EINVAL);
+			return DRM_ERR(EINVAL);
 		}
 		buf = dma->buflist[idx];
-		if ( buf->pid != DRM_OS_CURRENTPID ) {
-			DRM_ERROR( "Process %d freeing buffer owned by %d\n",
-				   DRM_OS_CURRENTPID, buf->pid );
-			DRM_OS_RETURN(EINVAL);
+		if ( buf->filp != filp ) {
+			DRM_ERROR("Process %d freeing buffer not owned\n",
+				   DRM_CURRENTPID);
+			return DRM_ERR(EINVAL);
 		}
 		DRM(free_buffer)( dev, buf );
 	}
@@ -991,43 +1006,56 @@ int DRM(freebufs)( DRM_OS_IOCTL )
 	return 0;
 }
 
-int DRM(mapbufs)( DRM_OS_IOCTL )
+int DRM(mapbufs)( DRM_IOCTL_ARGS )
 {
-	DRM_OS_DEVICE;
+	DRM_DEVICE;
 	drm_device_dma_t *dma = dev->dma;
 	int retcode = 0;
 	const int zero = 0;
 	vm_offset_t virtual, address;
+#ifdef __FreeBSD__
 #if __FreeBSD_version >= 500000
 	struct vmspace *vms = p->td_proc->p_vmspace;
 #else
 	struct vmspace *vms = p->p_vmspace;
 #endif
+#endif /* __FreeBSD__ */
+#ifdef __NetBSD__
+	struct vnode *vn;
+	struct vmspace *vms = p->p_vmspace;
+#endif /* __NetBSD__ */
+
 	drm_buf_map_t request;
 	int i;
 
-	if ( !dma ) DRM_OS_RETURN(EINVAL);
+	if ( !dma ) return DRM_ERR(EINVAL);
 
-	DRM_OS_SPINLOCK( &dev->count_lock );
+	DRM_SPINLOCK( &dev->count_lock );
 	if ( atomic_read( &dev->buf_alloc ) ) {
-		DRM_OS_SPINUNLOCK( &dev->count_lock );
-		DRM_OS_RETURN(EBUSY);
+		DRM_SPINUNLOCK( &dev->count_lock );
+		return DRM_ERR(EBUSY);
 	}
 	dev->buf_use++;		/* Can't allocate more after this call */
-	DRM_OS_SPINUNLOCK( &dev->count_lock );
+	DRM_SPINUNLOCK( &dev->count_lock );
+
+	DRM_COPY_FROM_USER_IOCTL( request, (drm_buf_map_t *)data, sizeof(request) );
 
-	DRM_OS_KRNFROMUSR( request, (drm_buf_map_t *)data, sizeof(request) );
+#ifdef __NetBSD__
+	if(!vfinddev(kdev, VCHR, &vn))
+		return 0;	/* FIXME: Shouldn't this be EINVAL or something? */
+#endif /* __NetBSD__ */
 
 	if ( request.count >= dma->buf_count ) {
 		if ( (__HAVE_AGP && (dma->flags & _DRM_DMA_USE_AGP)) ||
 		     (__HAVE_SG && (dma->flags & _DRM_DMA_USE_SG)) ) {
-			drm_map_t *map = DRIVER_AGP_BUFFERS_MAP( dev );
+			drm_local_map_t *map = DRIVER_AGP_BUFFERS_MAP( dev );
 
 			if ( !map ) {
 				retcode = EINVAL;
 				goto done;
 			}
 
+#ifdef __FreeBSD__
 			virtual = round_page((vm_offset_t)vms->vm_daddr + MAXDSIZ);
 			retcode = vm_mmap(&vms->vm_map,
 					  &virtual,
@@ -1036,7 +1064,18 @@ int DRM(mapbufs)( DRM_OS_IOCTL )
 					  MAP_SHARED,
 					  SLIST_FIRST(&kdev->si_hlist),
 					  (unsigned long)map->offset );
+#elif defined(__NetBSD__)
+			virtual = round_page((vaddr_t)vms->vm_daddr + MAXDSIZ);
+			retcode = uvm_mmap(&vms->vm_map,
+					   (vaddr_t *)&virtual,
+					   round_page(map->size),
+					   UVM_PROT_READ | UVM_PROT_WRITE,
+					   UVM_PROT_ALL, MAP_SHARED,
+					   &vn->v_uobj, map->offset,
+					   p->p_rlimit[RLIMIT_MEMLOCK].rlim_cur);
+#endif /* __NetBSD__ */
 		} else {
+#ifdef __FreeBSD__
 			virtual = round_page((vm_offset_t)vms->vm_daddr + MAXDSIZ);
 			retcode = vm_mmap(&vms->vm_map,
 					  &virtual,
@@ -1045,32 +1084,42 @@ int DRM(mapbufs)( DRM_OS_IOCTL )
 					  MAP_SHARED,
 					  SLIST_FIRST(&kdev->si_hlist),
 					  0);
+#elif defined(__NetBSD__)
+			virtual = round_page((vaddr_t)vms->vm_daddr + MAXDSIZ);
+			retcode = uvm_mmap(&vms->vm_map,
+					   (vaddr_t *)&virtual,
+					   round_page(dma->byte_count),
+					   UVM_PROT_READ | UVM_PROT_WRITE,
+					   UVM_PROT_ALL, MAP_SHARED,
+					   &vn->v_uobj, 0,
+					   p->p_rlimit[RLIMIT_MEMLOCK].rlim_cur);
+#endif /* __NetBSD__ */
 		}
 		if (retcode)
 			goto done;
 		request.virtual = (void *)virtual;
 
 		for ( i = 0 ; i < dma->buf_count ; i++ ) {
-			if ( DRM_OS_COPYTOUSR( &request.list[i].idx,
+			if ( DRM_COPY_TO_USER( &request.list[i].idx,
 					   &dma->buflist[i]->idx,
 					   sizeof(request.list[0].idx) ) ) {
 				retcode = EFAULT;
 				goto done;
 			}
-			if ( DRM_OS_COPYTOUSR( &request.list[i].total,
+			if ( DRM_COPY_TO_USER( &request.list[i].total,
 					   &dma->buflist[i]->total,
 					   sizeof(request.list[0].total) ) ) {
 				retcode = EFAULT;
 				goto done;
 			}
-			if ( DRM_OS_COPYTOUSR( &request.list[i].used,
+			if ( DRM_COPY_TO_USER( &request.list[i].used,
 					   &zero,
 					   sizeof(zero) ) ) {
 				retcode = EFAULT;
 				goto done;
 			}
 			address = virtual + dma->buflist[i]->offset; /* *** */
-			if ( DRM_OS_COPYTOUSR( &request.list[i].address,
+			if ( DRM_COPY_TO_USER( &request.list[i].address,
 					   &address,
 					   sizeof(address) ) ) {
 				retcode = EFAULT;
@@ -1083,9 +1132,9 @@ int DRM(mapbufs)( DRM_OS_IOCTL )
 
 	DRM_DEBUG( "%d buffers, retcode = %d\n", request.count, retcode );
 
-	DRM_OS_KRNTOUSR( (drm_buf_map_t *)data, request, sizeof(request) );
+	DRM_COPY_TO_USER_IOCTL( (drm_buf_map_t *)data, request, sizeof(request) );
 
-	DRM_OS_RETURN(retcode);
+	return DRM_ERR(retcode);
 }
 
 #endif /* __HAVE_DMA */
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_context.h b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_context.h
index 8d676a23a..c3a20f6e6 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_context.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_context.h
@@ -27,9 +27,9 @@
  * Authors:
  *    Rickard E. (Rik) Faith <faith@valinux.com>
  *    Gareth Hughes <gareth@valinux.com>
+ * $FreeBSD: src/sys/dev/drm/drm_context.h,v 1.3 2003/03/09 02:08:28 anholt Exp $
  */
 
-#define __NO_VERSION__
 #include "drmP.h"
 
 #if __HAVE_CTX_BITMAP
@@ -44,10 +44,10 @@ void DRM(ctxbitmap_free)( drm_device_t *dev, int ctx_handle )
 	if ( !dev->ctx_bitmap ) goto failed;
 
 	if ( ctx_handle < DRM_MAX_CTXBITMAP ) {
-		DRM_OS_LOCK;
+		DRM_LOCK;
 		clear_bit( ctx_handle, dev->ctx_bitmap );
 		dev->context_sareas[ctx_handle] = NULL;
-		DRM_OS_UNLOCK;
+		DRM_UNLOCK;
 		return;
 	}
 failed:
@@ -62,7 +62,7 @@ int DRM(ctxbitmap_next)( drm_device_t *dev )
 
 	if(!dev->ctx_bitmap) return -1;
 
-	DRM_OS_LOCK;
+	DRM_LOCK;
 	bit = find_first_zero_bit( dev->ctx_bitmap, DRM_MAX_CTXBITMAP );
 	if ( bit < DRM_MAX_CTXBITMAP ) {
 		set_bit( bit, dev->ctx_bitmap );
@@ -70,7 +70,7 @@ int DRM(ctxbitmap_next)( drm_device_t *dev )
 		if((bit+1) > dev->max_context) {
 			dev->max_context = (bit+1);
 			if(dev->context_sareas) {
-				drm_map_t **ctx_sareas;
+				drm_local_map_t **ctx_sareas;
 
 				ctx_sareas = DRM(realloc)(dev->context_sareas,
 						(dev->max_context - 1) * 
@@ -80,7 +80,7 @@ int DRM(ctxbitmap_next)( drm_device_t *dev )
 						DRM_MEM_MAPS);
 				if(!ctx_sareas) {
 					clear_bit(bit, dev->ctx_bitmap);
-					DRM_OS_UNLOCK;
+					DRM_UNLOCK;
 					return -1;
 				}
 				dev->context_sareas = ctx_sareas;
@@ -93,16 +93,16 @@ int DRM(ctxbitmap_next)( drm_device_t *dev )
 						DRM_MEM_MAPS);
 				if(!dev->context_sareas) {
 					clear_bit(bit, dev->ctx_bitmap);
-					DRM_OS_UNLOCK;
+					DRM_UNLOCK;
 					return -1;
 				}
 				dev->context_sareas[bit] = NULL;
 			}
 		}
-		DRM_OS_UNLOCK;
+		DRM_UNLOCK;
 		return bit;
 	}
-	DRM_OS_UNLOCK;
+	DRM_UNLOCK;
 	return -1;
 }
 
@@ -111,17 +111,17 @@ int DRM(ctxbitmap_init)( drm_device_t *dev )
 	int i;
    	int temp;
 
-	DRM_OS_LOCK;
-	dev->ctx_bitmap = (unsigned long *) DRM(alloc)( PAGE_SIZE,
+	DRM_LOCK;
+	dev->ctx_bitmap = (atomic_t *) DRM(alloc)( PAGE_SIZE,
 							DRM_MEM_CTXBITMAP );
 	if ( dev->ctx_bitmap == NULL ) {
-		DRM_OS_UNLOCK;
-		DRM_OS_RETURN(ENOMEM);
+		DRM_UNLOCK;
+		return DRM_ERR(ENOMEM);
 	}
 	memset( (void *)dev->ctx_bitmap, 0, PAGE_SIZE );
 	dev->context_sareas = NULL;
 	dev->max_context = -1;
-	DRM_OS_UNLOCK;
+	DRM_UNLOCK;
 
 	for ( i = 0 ; i < DRM_RESERVED_CONTEXTS ; i++ ) {
 		temp = DRM(ctxbitmap_next)( dev );
@@ -133,75 +133,71 @@ int DRM(ctxbitmap_init)( drm_device_t *dev )
 
 void DRM(ctxbitmap_cleanup)( drm_device_t *dev )
 {
-	DRM_OS_LOCK;
+	DRM_LOCK;
 	if( dev->context_sareas ) DRM(free)( dev->context_sareas,
 					     sizeof(*dev->context_sareas) * 
 					     dev->max_context,
 					     DRM_MEM_MAPS );
 	DRM(free)( (void *)dev->ctx_bitmap, PAGE_SIZE, DRM_MEM_CTXBITMAP );
-	DRM_OS_UNLOCK;
+	DRM_UNLOCK;
 }
 
 /* ================================================================
  * Per Context SAREA Support
  */
 
-int DRM(getsareactx)( DRM_OS_IOCTL )
+int DRM(getsareactx)( DRM_IOCTL_ARGS )
 {
-	DRM_OS_DEVICE;
+	DRM_DEVICE;
 	drm_ctx_priv_map_t request;
-	drm_map_t *map;
+	drm_local_map_t *map;
 
-	DRM_OS_KRNFROMUSR( request, (drm_ctx_priv_map_t *)data, 
+	DRM_COPY_FROM_USER_IOCTL( request, (drm_ctx_priv_map_t *)data, 
 			   sizeof(request) );
 
-	DRM_OS_LOCK;
+	DRM_LOCK;
 	if (dev->max_context < 0 || request.ctx_id >= (unsigned) dev->max_context) {
-		DRM_OS_UNLOCK;
-		DRM_OS_RETURN(EINVAL);
+		DRM_UNLOCK;
+		return DRM_ERR(EINVAL);
 	}
 
 	map = dev->context_sareas[request.ctx_id];
-	DRM_OS_UNLOCK;
+	DRM_UNLOCK;
 
 	request.handle = map->handle;
 
-	DRM_OS_KRNTOUSR( (drm_ctx_priv_map_t *)data, request, sizeof(request) );
+	DRM_COPY_TO_USER_IOCTL( (drm_ctx_priv_map_t *)data, request, sizeof(request) );
 
 	return 0;
 }
 
-int DRM(setsareactx)( DRM_OS_IOCTL )
+int DRM(setsareactx)( DRM_IOCTL_ARGS )
 {
-	DRM_OS_DEVICE;
+	DRM_DEVICE;
 	drm_ctx_priv_map_t request;
-	drm_map_t *map = NULL;
+	drm_local_map_t *map = NULL;
 	drm_map_list_entry_t *list;
 
-	DRM_OS_KRNFROMUSR( request, (drm_ctx_priv_map_t *)data,
+	DRM_COPY_FROM_USER_IOCTL( request, (drm_ctx_priv_map_t *)data,
 			   sizeof(request) );
 
-	DRM_OS_LOCK;
+	DRM_LOCK;
 	TAILQ_FOREACH(list, dev->maplist, link) {
 		map=list->map;
-		if(map->handle == request.handle) 
-			goto found;
+		if(map->handle == request.handle) {
+			if (dev->max_context < 0)
+				goto bad;
+			if (request.ctx_id >= (unsigned) dev->max_context)
+				goto bad;
+			dev->context_sareas[request.ctx_id] = map;
+			DRM_UNLOCK;
+			return 0;
+		}
 	}
 
 bad:
-	DRM_OS_UNLOCK;
-	return -EINVAL;
-
-found:
-	map = list->map;
-	if (!map) goto bad;
-	if (dev->max_context < 0)
-		goto bad;
-	if (request.ctx_id >= (unsigned) dev->max_context)
-		goto bad;
-	dev->context_sareas[request.ctx_id] = map;
-	DRM_OS_UNLOCK;
-	return 0;
+	DRM_UNLOCK;
+	return DRM_ERR(EINVAL);
 }
 
 /* ================================================================
@@ -214,7 +210,7 @@ int DRM(context_switch)( drm_device_t *dev, int old, int new )
 
         if ( test_and_set_bit( 0, &dev->context_flag ) ) {
                 DRM_ERROR( "Reentering -- FIXME\n" );
-                DRM_OS_RETURN(EBUSY);
+                return DRM_ERR(EBUSY);
         }
 
 #if __HAVE_DMA_HISTOGRAM
@@ -256,41 +252,41 @@ int DRM(context_switch_complete)( drm_device_t *dev, int new )
 
 #endif
         clear_bit( 0, &dev->context_flag );
-        DRM_OS_WAKEUP( &dev->context_wait );
+        DRM_WAKEUP( (void *)&dev->context_wait );
 
         return 0;
 }
 
-int DRM(resctx)( DRM_OS_IOCTL )
+int DRM(resctx)( DRM_IOCTL_ARGS )
 {
 	drm_ctx_res_t res;
 	drm_ctx_t ctx;
 	int i;
 
-	DRM_OS_KRNFROMUSR( res, (drm_ctx_res_t *)data, sizeof(res) );
+	DRM_COPY_FROM_USER_IOCTL( res, (drm_ctx_res_t *)data, sizeof(res) );
 
 	if ( res.count >= DRM_RESERVED_CONTEXTS ) {
 		memset( &ctx, 0, sizeof(ctx) );
 		for ( i = 0 ; i < DRM_RESERVED_CONTEXTS ; i++ ) {
 			ctx.handle = i;
-			if ( DRM_OS_COPYTOUSR( &res.contexts[i],
+			if ( DRM_COPY_TO_USER( &res.contexts[i],
 					   &i, sizeof(i) ) )
-				DRM_OS_RETURN(EFAULT);
+				return DRM_ERR(EFAULT);
 		}
 	}
 	res.count = DRM_RESERVED_CONTEXTS;
 
-	DRM_OS_KRNTOUSR( (drm_ctx_res_t *)data, res, sizeof(res) );
+	DRM_COPY_TO_USER_IOCTL( (drm_ctx_res_t *)data, res, sizeof(res) );
 
 	return 0;
 }
 
-int DRM(addctx)( DRM_OS_IOCTL )
+int DRM(addctx)( DRM_IOCTL_ARGS )
 {
-	DRM_OS_DEVICE;
+	DRM_DEVICE;
 	drm_ctx_t ctx;
 
-	DRM_OS_KRNFROMUSR( ctx, (drm_ctx_t *)data, sizeof(ctx) );
+	DRM_COPY_FROM_USER_IOCTL( ctx, (drm_ctx_t *)data, sizeof(ctx) );
 
 	ctx.handle = DRM(ctxbitmap_next)( dev );
 	if ( ctx.handle == DRM_KERNEL_CONTEXT ) {
@@ -301,51 +297,51 @@ int DRM(addctx)( DRM_OS_IOCTL )
 	if ( ctx.handle == -1 ) {
 		DRM_DEBUG( "Not enough free contexts.\n" );
 				/* Should this return -EBUSY instead? */
-		DRM_OS_RETURN(ENOMEM);
+		return DRM_ERR(ENOMEM);
 	}
 
-	DRM_OS_KRNTOUSR( (drm_ctx_t *)data, ctx, sizeof(ctx) );
+	DRM_COPY_TO_USER_IOCTL( (drm_ctx_t *)data, ctx, sizeof(ctx) );
 
 	return 0;
 }
 
-int DRM(modctx)( DRM_OS_IOCTL )
+int DRM(modctx)( DRM_IOCTL_ARGS )
 {
 	/* This does nothing */
 	return 0;
 }
 
-int DRM(getctx)( DRM_OS_IOCTL )
+int DRM(getctx)( DRM_IOCTL_ARGS )
 {
 	drm_ctx_t ctx;
 
-	DRM_OS_KRNFROMUSR( ctx, (drm_ctx_t *)data, sizeof(ctx) );
+	DRM_COPY_FROM_USER_IOCTL( ctx, (drm_ctx_t *)data, sizeof(ctx) );
 
 	/* This is 0, because we don't handle any context flags */
 	ctx.flags = 0;
 
-	DRM_OS_KRNTOUSR( (drm_ctx_t *)data, ctx, sizeof(ctx) );
+	DRM_COPY_TO_USER_IOCTL( (drm_ctx_t *)data, ctx, sizeof(ctx) );
 
 	return 0;
 }
 
-int DRM(switchctx)( DRM_OS_IOCTL )
+int DRM(switchctx)( DRM_IOCTL_ARGS )
 {
-	DRM_OS_DEVICE;
+	DRM_DEVICE;
 	drm_ctx_t ctx;
 
-	DRM_OS_KRNFROMUSR( ctx, (drm_ctx_t *)data, sizeof(ctx) );
+	DRM_COPY_FROM_USER_IOCTL( ctx, (drm_ctx_t *)data, sizeof(ctx) );
 
 	DRM_DEBUG( "%d\n", ctx.handle );
 	return DRM(context_switch)( dev, dev->last_context, ctx.handle );
 }
 
-int DRM(newctx)( DRM_OS_IOCTL )
+int DRM(newctx)( DRM_IOCTL_ARGS )
 {
-	DRM_OS_DEVICE;
+	DRM_DEVICE;
 	drm_ctx_t ctx;
 
-	DRM_OS_KRNFROMUSR( ctx, (drm_ctx_t *)data, sizeof(ctx) );
+	DRM_COPY_FROM_USER_IOCTL( ctx, (drm_ctx_t *)data, sizeof(ctx) );
 
 	DRM_DEBUG( "%d\n", ctx.handle );
 	DRM(context_switch_complete)( dev, ctx.handle );
@@ -353,12 +349,12 @@ int DRM(newctx)( DRM_OS_IOCTL )
 	return 0;
 }
 
-int DRM(rmctx)( DRM_OS_IOCTL )
+int DRM(rmctx)( DRM_IOCTL_ARGS )
 {
-	DRM_OS_DEVICE;
+	DRM_DEVICE;
 	drm_ctx_t ctx;
 
-	DRM_OS_KRNFROMUSR( ctx, (drm_ctx_t *)data, sizeof(ctx) );
+	DRM_COPY_FROM_USER_IOCTL( ctx, (drm_ctx_t *)data, sizeof(ctx) );
 
 	DRM_DEBUG( "%d\n", ctx.handle );
 	if ( ctx.handle != DRM_KERNEL_CONTEXT ) {
@@ -387,7 +383,7 @@ int DRM(context_switch)(drm_device_t *dev, int old, int new)
 
 	if (test_and_set_bit(0, &dev->context_flag)) {
 		DRM_ERROR("Reentering -- FIXME\n");
-		DRM_OS_RETURN(EBUSY);
+		return DRM_ERR(EBUSY);
 	}
 
 #if __HAVE_DMA_HISTOGRAM
@@ -398,7 +394,7 @@ int DRM(context_switch)(drm_device_t *dev, int old, int new)
 
 	if (new >= dev->queue_count) {
 		clear_bit(0, &dev->context_flag);
-		DRM_OS_RETURN(EINVAL);
+		return DRM_ERR(EINVAL);
 	}
 
 	if (new == dev->last_context) {
@@ -411,7 +407,7 @@ int DRM(context_switch)(drm_device_t *dev, int old, int new)
 	if (atomic_read(&q->use_count) == 1) {
 		atomic_dec(&q->use_count);
 		clear_bit(0, &dev->context_flag);
-		DRM_OS_RETURN(EINVAL);
+		return DRM_ERR(EINVAL);
 	}
 
 	if (DRM(flags) & DRM_FLAG_NOCTX) {
@@ -450,7 +446,7 @@ int DRM(context_switch_complete)(drm_device_t *dev, int new)
 
 #endif
 	clear_bit(0, &dev->context_flag);
-	DRM_OS_WAKEUP_INT(&dev->context_wait);
+	DRM_WAKEUP_INT(&dev->context_wait);
 
 	return 0;
 }
@@ -514,7 +510,7 @@ static int DRM(alloc_queue)(drm_device_t *dev)
 		atomic_dec(&dev->queuelist[i]->use_count);
 	}
 				/* Allocate a new queue */
-	DRM_OS_LOCK;
+	DRM_LOCK;
 
 	queue = gamma_alloc(sizeof(*queue), DRM_MEM_QUEUES);
 	memset(queue, 0, sizeof(*queue));
@@ -532,19 +528,19 @@ static int DRM(alloc_queue)(drm_device_t *dev)
 					      newslots,
 					      DRM_MEM_QUEUES);
 		if (!dev->queuelist) {
-			DRM_OS_UNLOCK;
+			DRM_UNLOCK;
 			DRM_DEBUG("out of memory\n");
-			DRM_OS_RETURN(ENOMEM);
+			return DRM_ERR(ENOMEM);
 		}
 	}
 	dev->queuelist[dev->queue_count-1] = queue;
 
-	DRM_OS_UNLOCK;
+	DRM_UNLOCK;
 	DRM_DEBUG("%d (new)\n", dev->queue_count - 1);
 	return dev->queue_count - 1;
 }
 
-int DRM(resctx)( DRM_OS_IOCTL )
+int DRM(resctx)( DRM_IOCTL_ARGS )
 {
 	drm_ctx_res_t	res;
 	drm_ctx_t	ctx;
@@ -552,31 +548,31 @@ int DRM(resctx)( DRM_OS_IOCTL )
 
 	DRM_DEBUG("%d\n", DRM_RESERVED_CONTEXTS);
 	
-	DRM_OS_KRNFROMUSR( res, (drm_ctx_res_t *)data, sizeof(res) );
+	DRM_COPY_FROM_USER_IOCTL( res, (drm_ctx_res_t *)data, sizeof(res) );
 
 	if (res.count >= DRM_RESERVED_CONTEXTS) {
 		memset(&ctx, 0, sizeof(ctx));
 		for (i = 0; i < DRM_RESERVED_CONTEXTS; i++) {
 			ctx.handle = i;
-			if (DRM_OS_COPYTOUSR(&res.contexts[i],
+			if (DRM_COPY_TO_USER(&res.contexts[i],
 					 &i,
 					 sizeof(i)))
-				DRM_OS_RETURN(EFAULT);
+				return DRM_ERR(EFAULT);
 		}
 	}
 	res.count = DRM_RESERVED_CONTEXTS;
 
-	DRM_OS_KRNTOUSR( (drm_ctx_res_t *)data, res, sizeof(res) );
+	DRM_COPY_TO_USER_IOCTL( (drm_ctx_res_t *)data, res, sizeof(res) );
 
 	return 0;
 }
 
-int DRM(addctx)( DRM_OS_IOCTL )
+int DRM(addctx)( DRM_IOCTL_ARGS )
 {
-	DRM_OS_DEVICE;
+	DRM_DEVICE;
 	drm_ctx_t	ctx;
 
-	DRM_OS_KRNFROMUSR( ctx, (drm_ctx_t *)data, sizeof(ctx) );
+	DRM_COPY_FROM_USER_IOCTL( ctx, (drm_ctx_t *)data, sizeof(ctx) );
 
 	if ((ctx.handle = DRM(alloc_queue)(dev)) == DRM_KERNEL_CONTEXT) {
 				/* Init kernel's context and get a new one. */
@@ -586,35 +582,35 @@ int DRM(addctx)( DRM_OS_IOCTL )
 	DRM(init_queue)(dev, dev->queuelist[ctx.handle], &ctx);
 	DRM_DEBUG("%d\n", ctx.handle);
 	
-	DRM_OS_KRNTOUSR( (drm_ctx_t *)data, ctx, sizeof(ctx) );
+	DRM_COPY_TO_USER_IOCTL( (drm_ctx_t *)data, ctx, sizeof(ctx) );
 
 	return 0;
 }
 
-int DRM(modctx)( DRM_OS_IOCTL )
+int DRM(modctx)( DRM_IOCTL_ARGS )
 {
-	DRM_OS_DEVICE;
+	DRM_DEVICE;
 	drm_ctx_t	ctx;
 	drm_queue_t	*q;
 
-	DRM_OS_KRNFROMUSR( ctx, (drm_ctx_t *)data, sizeof(ctx) );
+	DRM_COPY_FROM_USER_IOCTL( ctx, (drm_ctx_t *)data, sizeof(ctx) );
 
 	DRM_DEBUG("%d\n", ctx.handle);
 
 	if (ctx.handle < 0 || ctx.handle >= dev->queue_count) 
-		DRM_OS_RETURN(EINVAL);
+		return DRM_ERR(EINVAL);
 	q = dev->queuelist[ctx.handle];
 
 	atomic_inc(&q->use_count);
 	if (atomic_read(&q->use_count) == 1) {
 				/* No longer in use */
 		atomic_dec(&q->use_count);
-		DRM_OS_RETURN(EINVAL);
+		return DRM_ERR(EINVAL);
 	}
 
 	if (DRM_BUFCOUNT(&q->waitlist)) {
 		atomic_dec(&q->use_count);
-		DRM_OS_RETURN(EBUSY);
+		return DRM_ERR(EBUSY);
 	}
 
 	q->flags = ctx.flags;
@@ -623,52 +619,52 @@ int DRM(modctx)( DRM_OS_IOCTL )
 	return 0;
 }
 
-int DRM(getctx)( DRM_OS_IOCTL )
+int DRM(getctx)( DRM_IOCTL_ARGS )
 {
-	DRM_OS_DEVICE;
+	DRM_DEVICE;
 	drm_ctx_t	ctx;
 	drm_queue_t	*q;
 
-	DRM_OS_KRNFROMUSR( ctx, (drm_ctx_t *)data, sizeof(ctx) );
+	DRM_COPY_FROM_USER_IOCTL( ctx, (drm_ctx_t *)data, sizeof(ctx) );
 
 	DRM_DEBUG("%d\n", ctx.handle);
 
 	if (ctx.handle >= dev->queue_count) 
-		DRM_OS_RETURN(EINVAL);
+		return DRM_ERR(EINVAL);
 	q = dev->queuelist[ctx.handle];
 
 	atomic_inc(&q->use_count);
 	if (atomic_read(&q->use_count) == 1) {
 				/* No longer in use */
 		atomic_dec(&q->use_count);
-		DRM_OS_RETURN(EINVAL);
+		return DRM_ERR(EINVAL);
 	}
 
 	ctx.flags = q->flags;
 	atomic_dec(&q->use_count);
 
-	DRM_OS_KRNTOUSR( (drm_ctx_t *)data, ctx, sizeof(ctx) );
+	DRM_COPY_TO_USER_IOCTL( (drm_ctx_t *)data, ctx, sizeof(ctx) );
 
 	return 0;
 }
 
-int DRM(switchctx)( DRM_OS_IOCTL )
+int DRM(switchctx)( DRM_IOCTL_ARGS )
 {
-	DRM_OS_DEVICE;
+	DRM_DEVICE;
 	drm_ctx_t	ctx;
 
-	DRM_OS_KRNFROMUSR( ctx, (drm_ctx_t *)data, sizeof(ctx) );
+	DRM_COPY_FROM_USER_IOCTL( ctx, (drm_ctx_t *)data, sizeof(ctx) );
 
 	DRM_DEBUG("%d\n", ctx.handle);
 	return DRM(context_switch)(dev, dev->last_context, ctx.handle);
 }
 
-int DRM(newctx)( DRM_OS_IOCTL )
+int DRM(newctx)( DRM_IOCTL_ARGS )
 {
-	DRM_OS_DEVICE;
+	DRM_DEVICE;
 	drm_ctx_t	ctx;
 
-	DRM_OS_KRNFROMUSR( ctx, (drm_ctx_t *)data, sizeof(ctx) );
+	DRM_COPY_FROM_USER_IOCTL( ctx, (drm_ctx_t *)data, sizeof(ctx) );
 
 	DRM_DEBUG("%d\n", ctx.handle);
 	DRM(context_switch_complete)(dev, ctx.handle);
@@ -676,25 +672,25 @@ int DRM(newctx)( DRM_OS_IOCTL )
 	return 0;
 }
 
-int DRM(rmctx)( DRM_OS_IOCTL )
+int DRM(rmctx)( DRM_IOCTL_ARGS )
 {
-	DRM_OS_DEVICE;
+	DRM_DEVICE;
 	drm_ctx_t	ctx;
 	drm_queue_t	*q;
 	drm_buf_t	*buf;
 
-	DRM_OS_KRNFROMUSR( ctx, (drm_ctx_t *)data, sizeof(ctx) );
+	DRM_COPY_FROM_USER_IOCTL( ctx, (drm_ctx_t *)data, sizeof(ctx) );
 
 	DRM_DEBUG("%d\n", ctx.handle);
 
-	if (ctx.handle >= dev->queue_count) DRM_OS_RETURN(EINVAL);
+	if (ctx.handle >= dev->queue_count) return DRM_ERR(EINVAL);
 	q = dev->queuelist[ctx.handle];
 
 	atomic_inc(&q->use_count);
 	if (atomic_read(&q->use_count) == 1) {
 				/* No longer in use */
 		atomic_dec(&q->use_count);
-		DRM_OS_RETURN(EINVAL);
+		return DRM_ERR(EINVAL);
 	}
 
 	atomic_inc(&q->finalization); /* Mark queue in finalization state */
@@ -717,7 +713,7 @@ int DRM(rmctx)( DRM_OS_IOCTL )
 				/* Wakeup blocked processes */
 	wakeup( &q->block_read );
 	wakeup( &q->block_write );
-	DRM_OS_WAKEUP_INT( &q->flush_queue );
+	DRM_WAKEUP_INT( &q->flush_queue );
 				/* Finalization over.  Queue is made
 				   available when both use_count and
 				   finalization become 0, which won't
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_dma.h b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_dma.h
index e5aef241f..fa0bd20d0 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_dma.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_dma.h
@@ -27,12 +27,10 @@
  * Authors:
  *    Rickard E. (Rik) Faith <faith@valinux.com>
  *    Gareth Hughes <gareth@valinux.com>
+ *
+ * $FreeBSD: src/sys/dev/drm/drm_dma.h,v 1.4 2003/03/09 02:08:28 anholt Exp $
  */
 
-#include <machine/bus.h>
-#include <machine/resource.h>
-#include <sys/rman.h>
-
 #include "drmP.h"
 
 #ifndef __HAVE_DMA_WAITQUEUE
@@ -45,12 +43,6 @@
 #define __HAVE_SHARED_IRQ	0
 #endif
 
-#if __HAVE_SHARED_IRQ
-#define DRM_IRQ_TYPE		SA_SHIRQ
-#else
-#define DRM_IRQ_TYPE		0
-#endif
-
 #if __HAVE_DMA
 
 int DRM(dma_setup)( drm_device_t *dev )
@@ -59,7 +51,7 @@ int DRM(dma_setup)( drm_device_t *dev )
 
 	dev->dma = DRM(alloc)( sizeof(*dev->dma), DRM_MEM_DRIVER );
 	if ( !dev->dma )
-		DRM_OS_RETURN(ENOMEM);
+		return DRM_ERR(ENOMEM);
 
 	memset( dev->dma, 0, sizeof(*dev->dma) );
 
@@ -85,8 +77,8 @@ void DRM(dma_takedown)(drm_device_t *dev)
 				  dma->bufs[i].buf_count,
 				  dma->bufs[i].seg_count);
 			for (j = 0; j < dma->bufs[i].seg_count; j++) {
-				DRM(free_pages)(dma->bufs[i].seglist[j],
-						dma->bufs[i].page_order,
+				DRM(free)((void *)dma->bufs[i].seglist[j],
+						dma->bufs[i].buf_size,
 						DRM_MEM_DMA);
 			}
 			DRM(free)(dma->bufs[i].seglist,
@@ -190,14 +182,14 @@ void DRM(free_buffer)(drm_device_t *dev, drm_buf_t *buf)
 
 	buf->waiting  = 0;
 	buf->pending  = 0;
-	buf->pid      = 0;
+	buf->filp     = NULL;
 	buf->used     = 0;
 #if __HAVE_DMA_HISTOGRAM
 	buf->time_completed = get_cycles();
 #endif
 
 	if ( buf->dma_wait ) {
-		wakeup( &buf->dma_wait );
+		wakeup( (void *)&buf->dma_wait );
 		buf->dma_wait = 0;
 	}
 #if __HAVE_DMA_FREELIST
@@ -213,14 +205,14 @@ void DRM(free_buffer)(drm_device_t *dev, drm_buf_t *buf)
 }
 
 #if !__HAVE_DMA_RECLAIM
-void DRM(reclaim_buffers)(drm_device_t *dev, pid_t pid)
+void DRM(reclaim_buffers)(drm_device_t *dev, DRMFILE filp)
 {
 	drm_device_dma_t *dma = dev->dma;
 	int		 i;
 
 	if (!dma) return;
 	for (i = 0; i < dma->buf_count; i++) {
-		if (dma->buflist[i]->pid == pid) {
+		if (dma->buflist[i]->filp == filp) {
 			switch (dma->buflist[i]->list) {
 			case DRM_LIST_NONE:
 				DRM(free_buffer)(dev, dma->buflist[i]);
@@ -248,7 +240,7 @@ void DRM(clear_next_buffer)(drm_device_t *dev)
 
 	dma->next_buffer = NULL;
 	if (dma->next_queue && !DRM_BUFCOUNT(&dma->next_queue->waitlist)) {
-		DRM_OS_WAKEUP_INT(&dma->next_queue->flush_queue);
+		DRM_WAKEUP_INT(&dma->next_queue->flush_queue);
 	}
 	dma->next_queue	 = NULL;
 }
@@ -340,7 +332,7 @@ int DRM(dma_enqueue)(drm_device_t *dev, drm_dma_t *d)
 		if (!_DRM_LOCK_IS_HELD(context)) {
 			DRM_ERROR("No lock held during \"while locked\""
 				  " request\n");
-			DRM_OS_RETURN(EINVAL);
+			return DRM_ERR(EINVAL);
 		}
 		if (d->context != _DRM_LOCKING_CONTEXT(context)
 		    && _DRM_LOCKING_CONTEXT(context) != DRM_KERNEL_CONTEXT) {
@@ -348,7 +340,7 @@ int DRM(dma_enqueue)(drm_device_t *dev, drm_dma_t *d)
 				  " \"while locked\" request\n",
 				  _DRM_LOCKING_CONTEXT(context),
 				  d->context);
-			DRM_OS_RETURN(EINVAL);
+			return DRM_ERR(EINVAL);
 		}
 		q = dev->queuelist[DRM_KERNEL_CONTEXT];
 		while_locked = 1;
@@ -378,19 +370,19 @@ int DRM(dma_enqueue)(drm_device_t *dev, drm_dma_t *d)
 			atomic_dec(&q->use_count);
 			DRM_ERROR("Index %d (of %d max)\n",
 				  d->send_indices[i], dma->buf_count - 1);
-			DRM_OS_RETURN(EINVAL);
+			return DRM_ERR(EINVAL);
 		}
 		buf = dma->buflist[ idx ];
-		if (buf->pid != DRM_OS_CURRENTPID) {
+		if (buf->pid != DRM_CURRENTPID) {
 			atomic_dec(&q->use_count);
 			DRM_ERROR("Process %d using buffer owned by %d\n",
-				  DRM_OS_CURRENTPID, buf->pid);
-			DRM_OS_RETURN(EINVAL);
+				  DRM_CURRENTPID, buf->pid);
+			return DRM_ERR(EINVAL);
 		}
 		if (buf->list != DRM_LIST_NONE) {
 			atomic_dec(&q->use_count);
 			DRM_ERROR("Process %d using buffer %d on list %d\n",
-				  DRM_OS_CURRENTPID, buf->idx, buf->list);
+				  DRM_CURRENTPID, buf->idx, buf->list);
 		}
 		buf->used	  = d->send_sizes[i];
 		buf->while_locked = while_locked;
@@ -403,14 +395,14 @@ int DRM(dma_enqueue)(drm_device_t *dev, drm_dma_t *d)
 			DRM_ERROR("Queueing pending buffer:"
 				  " buffer %d, offset %d\n",
 				  d->send_indices[i], i);
-			DRM_OS_RETURN(EINVAL);
+			return DRM_ERR(EINVAL);
 		}
 		if (buf->waiting) {
 			atomic_dec(&q->use_count);
 			DRM_ERROR("Queueing waiting buffer:"
 				  " buffer %d, offset %d\n",
 				  d->send_indices[i], i);
-			DRM_OS_RETURN(EINVAL);
+			return DRM_ERR(EINVAL);
 		}
 		buf->waiting = 1;
 		if (atomic_read(&q->use_count) == 1
@@ -444,16 +436,16 @@ static int DRM(dma_get_buffers_of_order)(drm_device_t *dev, drm_dma_t *d,
 				  buf->waiting,
 				  buf->pending);
 		}
-		buf->pid     = DRM_OS_CURRENTPID;
-		if (DRM_OS_COPYTOUSR(&d->request_indices[i],
+		buf->pid     = DRM_CURRENTPID;
+		if (DRM_COPY_TO_USER(&d->request_indices[i],
 				 &buf->idx,
 				 sizeof(buf->idx)))
-			DRM_OS_RETURN(EFAULT);
+			return DRM_ERR(EFAULT);
 
-		if (DRM_OS_COPYTOUSR(&d->request_sizes[i],
+		if (DRM_COPY_TO_USER(&d->request_sizes[i],
 				 &buf->total,
 				 sizeof(buf->total)))
-			DRM_OS_RETURN(EFAULT);
+			return DRM_ERR(EFAULT);
 
 		++d->granted_count;
 	}
@@ -507,19 +499,18 @@ int DRM(dma_get_buffers)(drm_device_t *dev, drm_dma_t *dma)
 
 int DRM(irq_install)( drm_device_t *dev, int irq )
 {
-	int rid;
 	int retcode;
 
 	if ( !irq )
-		DRM_OS_RETURN(EINVAL);
+		return DRM_ERR(EINVAL);
 
-	DRM_OS_LOCK;
+	DRM_LOCK;
 	if ( dev->irq ) {
-		DRM_OS_UNLOCK;
-		DRM_OS_RETURN(EBUSY);
+		DRM_UNLOCK;
+		return DRM_ERR(EBUSY);
 	}
 	dev->irq = irq;
-	DRM_OS_UNLOCK;
+	DRM_UNLOCK;
 
 	DRM_DEBUG( "%s: irq=%d\n", __FUNCTION__, irq );
 
@@ -535,28 +526,56 @@ int DRM(irq_install)( drm_device_t *dev, int irq )
 	TASK_INIT(&dev->task, 0, DRM(dma_immediate_bh), dev);
 #endif
 
+#if __HAVE_VBL_IRQ && 0 /* disabled */
+	DRM_SPININIT( dev->vbl_lock, "vblsig" );
+	TAILQ_INIT( &dev->vbl_sig_list );
+#endif
+
 				/* Before installing handler */
-	DRIVER_PREINSTALL();
+	DRM(driver_irq_preinstall)( dev );
 
 				/* Install handler */
-	rid = 0;
-	dev->irqr = bus_alloc_resource(dev->device, SYS_RES_IRQ, &rid,
+	dev->irqrid = 0;
+#ifdef __FreeBSD__
+	dev->irqr = bus_alloc_resource(dev->device, SYS_RES_IRQ, &dev->irqrid,
 				      0, ~0, 1, RF_SHAREABLE);
-	if (!dev->irqr)
+	if (!dev->irqr) {
+#elif defined(__NetBSD__)
+	if (pci_intr_map(&dev->pa, &dev->ih) != 0) {
+#endif
+		DRM_LOCK;
+		dev->irq = 0;
+		dev->irqrid = 0;
+		DRM_UNLOCK;
 		return ENOENT;
+	}
 	
+#ifdef __FreeBSD__
+#if __FreeBSD_version < 500000
 	retcode = bus_setup_intr(dev->device, dev->irqr, INTR_TYPE_TTY,
 				 DRM(dma_service), dev, &dev->irqh);
+#else
+	retcode = bus_setup_intr(dev->device, dev->irqr, INTR_TYPE_TTY | INTR_MPSAFE,
+				 DRM(dma_service), dev, &dev->irqh);
+#endif
 	if ( retcode ) {
-		DRM_OS_LOCK;
-		bus_release_resource(dev->device, SYS_RES_IRQ, 0, dev->irqr);
+#elif defined(__NetBSD__)
+	dev->irqh = pci_intr_establish(&dev->pa.pa_pc, dev->ih, IPL_TTY,
+				      (int (*)(DRM_IRQ_ARGS))DRM(dma_service), dev);
+	if ( !dev->irqh ) {
+#endif
+		DRM_LOCK;
+#ifdef __FreeBSD__
+		bus_release_resource(dev->device, SYS_RES_IRQ, dev->irqrid, dev->irqr);
+#endif
 		dev->irq = 0;
-		DRM_OS_UNLOCK;
+		dev->irqrid = 0;
+		DRM_UNLOCK;
 		return retcode;
 	}
 
 				/* After installing handler */
-	DRIVER_POSTINSTALL();
+	DRM(driver_irq_postinstall)( dev );
 
 	return 0;
 }
@@ -564,31 +583,38 @@ int DRM(irq_install)( drm_device_t *dev, int irq )
 int DRM(irq_uninstall)( drm_device_t *dev )
 {
 	int irq;
-
-	DRM_OS_LOCK;
+	int irqrid;
+	
+	DRM_LOCK;
 	irq = dev->irq;
+	irqrid = dev->irqrid;
 	dev->irq = 0;
-	DRM_OS_UNLOCK;
+	dev->irqrid = 0;
+	DRM_UNLOCK;
 
 	if ( !irq )
-		DRM_OS_RETURN(EINVAL);
+		return DRM_ERR(EINVAL);
 
 	DRM_DEBUG( "%s: irq=%d\n", __FUNCTION__, irq );
 
-	DRIVER_UNINSTALL();
+	DRM(driver_irq_uninstall)( dev );
 
+#ifdef __FreeBSD__
 	bus_teardown_intr(dev->device, dev->irqr, dev->irqh);
-	bus_release_resource(dev->device, SYS_RES_IRQ, 0, dev->irqr);
-	
+	bus_release_resource(dev->device, SYS_RES_IRQ, irqrid, dev->irqr);
+#elif defined(__NetBSD__)
+	pci_intr_disestablish(&dev->pa.pa_pc, dev->irqh);
+#endif
+
 	return 0;
 }
 
-int DRM(control)( DRM_OS_IOCTL )
+int DRM(control)( DRM_IOCTL_ARGS )
 {
-	DRM_OS_DEVICE;
+	DRM_DEVICE;
 	drm_control_t ctl;
 
-	DRM_OS_KRNFROMUSR( ctl, (drm_control_t *) data, sizeof(ctl) );
+	DRM_COPY_FROM_USER_IOCTL( ctl, (drm_control_t *) data, sizeof(ctl) );
 
 	switch ( ctl.func ) {
 	case DRM_INST_HANDLER:
@@ -596,10 +622,115 @@ int DRM(control)( DRM_OS_IOCTL )
 	case DRM_UNINST_HANDLER:
 		return DRM(irq_uninstall)( dev );
 	default:
-		DRM_OS_RETURN(EINVAL);
+		return DRM_ERR(EINVAL);
+	}
+}
+
+#if __HAVE_VBL_IRQ
+int DRM(wait_vblank)( DRM_IOCTL_ARGS )
+{
+	DRM_DEVICE;
+	drm_wait_vblank_t vblwait;
+	struct timeval now;
+	int ret;
+
+	if (!dev->irq)
+		return DRM_ERR(EINVAL);
+
+	DRM_COPY_FROM_USER_IOCTL( vblwait, (drm_wait_vblank_t *)data,
+				  sizeof(vblwait) );
+
+	if (vblwait.request.type & _DRM_VBLANK_RELATIVE) {
+		vblwait.request.sequence += atomic_read(&dev->vbl_received);
+		vblwait.request.type &= ~_DRM_VBLANK_RELATIVE;
+	}
+
+	flags = vblwait.request.type & _DRM_VBLANK_FLAGS_MASK;
+	if (flags & _DRM_VBLANK_SIGNAL) {
+#if 0 /* disabled */
+		drm_vbl_sig_t *vbl_sig = DRM_MALLOC(sizeof(drm_vbl_sig_t));
+		if (vbl_sig == NULL)
+			return ENOMEM;
+		bzero(vbl_sig, sizeof(*vbl_sig));
+		
+		vbl_sig->sequence = vblwait.request.sequence;
+		vbl_sig->signo = vblwait.request.signal;
+		vbl_sig->pid = DRM_CURRENTPID;
+
+		vblwait.reply.sequence = atomic_read(&dev->vbl_received);
+		
+		DRM_SPINLOCK(&dev->vbl_lock);
+		TAILQ_INSERT_HEAD(&dev->vbl_sig_list, vbl_sig, link);
+		DRM_SPINUNLOCK(&dev->vbl_lock);
+		ret = 0;
+#endif
+		ret = EINVAL;
+	} else {
+		ret = DRM(vblank_wait)(dev, &vblwait.request.sequence);
+		
+		microtime(&now);
+		vblwait.reply.tval_sec = now.tv_sec;
+		vblwait.reply.tval_usec = now.tv_usec;
+	}
+
+	DRM_COPY_TO_USER_IOCTL( (drm_wait_vblank_t *)data, vblwait,
+				sizeof(vblwait) );
+
+	return ret;
+}
+
+void DRM(vbl_send_signals)(drm_device_t *dev)
+{
+}
+
+#if 0 /* disabled */
+void DRM(vbl_send_signals)( drm_device_t *dev )
+{
+	drm_vbl_sig_t *vbl_sig;
+	unsigned int vbl_seq = atomic_read( &dev->vbl_received );
+	struct proc *p;
+
+	DRM_SPINLOCK(&dev->vbl_lock);
+
+	vbl_sig = TAILQ_FIRST(&dev->vbl_sig_list);
+	while (vbl_sig != NULL) {
+		drm_vbl_sig_t *next = TAILQ_NEXT(vbl_sig, link);
+
+		if ( ( vbl_seq - vbl_sig->sequence ) <= (1<<23) ) {
+			p = pfind(vbl_sig->pid);
+			if (p != NULL)
+				psignal(p, vbl_sig->signo);
+
+			TAILQ_REMOVE(&dev->vbl_sig_list, vbl_sig, link);
+			DRM_FREE(vbl_sig,sizeof(*vbl_sig));
+		}
+		vbl_sig = next;
+	}
+
+	DRM_SPINUNLOCK(&dev->vbl_lock);
+}
+#endif
+
+#endif /*  __HAVE_VBL_IRQ */
+
+#else
+
+int DRM(control)( DRM_IOCTL_ARGS )
+{
+	drm_control_t ctl;
+
+	DRM_COPY_FROM_USER_IOCTL( ctl, (drm_control_t *) data, sizeof(ctl) );
+
+	switch ( ctl.func ) {
+	case DRM_INST_HANDLER:
+	case DRM_UNINST_HANDLER:
+		return 0;
+	default:
+		return DRM_ERR(EINVAL);
 	}
 }
 
 #endif /* __HAVE_DMA_IRQ */
 
 #endif /* __HAVE_DMA */
+
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_drawable.h b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_drawable.h
index f57d8628b..25dfc6d90 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_drawable.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_drawable.h
@@ -27,24 +27,25 @@
  * Authors:
  *    Rickard E. (Rik) Faith <faith@valinux.com>
  *    Gareth Hughes <gareth@valinux.com>
+ *
+ * $FreeBSD: src/sys/dev/drm/drm_drawable.h,v 1.2 2003/03/09 02:08:28 anholt Exp $
  */
 
-#define __NO_VERSION__
 #include "drmP.h"
 
-int DRM(adddraw)( DRM_OS_IOCTL )
+int DRM(adddraw)( DRM_IOCTL_ARGS )
 {
 	drm_draw_t draw;
 
 	draw.handle = 0;	/* NOOP */
 	DRM_DEBUG("%d\n", draw.handle);
 	
-	DRM_OS_KRNTOUSR( (drm_draw_t *)data, draw, sizeof(draw) );
+	DRM_COPY_TO_USER_IOCTL( (drm_draw_t *)data, draw, sizeof(draw) );
 
 	return 0;
 }
 
-int DRM(rmdraw)( DRM_OS_IOCTL )
+int DRM(rmdraw)( DRM_IOCTL_ARGS )
 {
 	return 0;		/* NOOP */
 }
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_drv.h b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_drv.h
index 4e5d76fb1..d43a46663 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_drv.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_drv.h
@@ -27,6 +27,8 @@
  * Authors:
  *    Rickard E. (Rik) Faith <faith@valinux.com>
  *    Gareth Hughes <gareth@valinux.com>
+ *
+ * $FreeBSD: src/sys/dev/drm/drm_drv.h,v 1.12 2003/03/09 02:08:28 anholt Exp $
  */
 
 /*
@@ -116,16 +118,8 @@
 #define DRIVER_IOCTLS
 #endif
 #ifndef DRIVER_FOPS
-#if DRM_LINUX
-#include <sys/file.h>
-#include <sys/proc.h>
-#include <machine/../linux/linux.h>
-#include <machine/../linux/linux_proto.h>
-#include "drm_linux.h"
-#endif
 #endif
 
-
 /*
  * The default number of instances (minor numbers) to initialize.
  */
@@ -136,7 +130,7 @@
 static int DRM(init)(device_t nbdev);
 static void DRM(cleanup)(device_t nbdev);
 
-#define CDEV_MAJOR	145
+#ifdef __FreeBSD__
 #define DRIVER_SOFTC(unit) \
 	((drm_device_t *) devclass_get_softc(DRM(devclass), unit))
 
@@ -146,11 +140,12 @@ MODULE_DEPEND(DRIVER_NAME, agp, 1, 1, 1);
 #if DRM_LINUX
 MODULE_DEPEND(DRIVER_NAME, linux, 1, 1, 1);
 #endif
+#endif /* __FreeBSD__ */
 
-static drm_device_t	*DRM(device);
-static int		*DRM(minor);
-static int		DRM(numdevs) = 0;
-
+#ifdef __NetBSD__
+#define DRIVER_SOFTC(unit) \
+	((drm_device_t *) device_lookup(&DRM(cd), unit))
+#endif /* __NetBSD__ */
 
 static drm_ioctl_desc_t		  DRM(ioctls)[] = {
 	[DRM_IOCTL_NR(DRM_IOCTL_VERSION)]       = { DRM(version),     0, 0 },
@@ -198,10 +193,8 @@ static drm_ioctl_desc_t		  DRM(ioctls)[] = {
 
 	/* The DRM_IOCTL_DMA ioctl should be defined by the driver.
 	 */
-#if __HAVE_DMA_IRQ
 	[DRM_IOCTL_NR(DRM_IOCTL_CONTROL)]       = { DRM(control),     1, 1 },
 #endif
-#endif
 
 #if __REALLY_HAVE_AGP
 	[DRM_IOCTL_NR(DRM_IOCTL_AGP_ACQUIRE)]   = { DRM(agp_acquire), 1, 1 },
@@ -214,38 +207,48 @@ static drm_ioctl_desc_t		  DRM(ioctls)[] = {
 	[DRM_IOCTL_NR(DRM_IOCTL_AGP_UNBIND)]    = { DRM(agp_unbind),  1, 1 },
 #endif
 
-#if __REALLY_HAVE_SG
+#if __HAVE_SG
 	[DRM_IOCTL_NR(DRM_IOCTL_SG_ALLOC)]      = { DRM(sg_alloc),    1, 1 },
 	[DRM_IOCTL_NR(DRM_IOCTL_SG_FREE)]       = { DRM(sg_free),     1, 1 },
 #endif
 
+#if __HAVE_VBL_IRQ
+	[DRM_IOCTL_NR(DRM_IOCTL_WAIT_VBLANK)]   = { DRM(wait_vblank), 0, 0 },
+#endif
+
 	DRIVER_IOCTLS
 };
 
 #define DRIVER_IOCTL_COUNT	DRM_ARRAY_SIZE( DRM(ioctls) )
 
+const char *DRM(find_description)(int vendor, int device);
+
+#ifdef __FreeBSD__
+static struct cdevsw DRM(cdevsw) = {
+	.d_open =	DRM( open ),
+	.d_close =	DRM( close ),
+	.d_read =	DRM( read ),
+	.d_write =	DRM( write ),
+	.d_ioctl =	DRM( ioctl ),
+	.d_poll =	DRM( poll ),
+	.d_mmap =	DRM( mmap ),
+	.d_name =	DRIVER_NAME,
+	.d_maj =	CDEV_MAJOR,
+	.d_flags =	D_TTY | D_TRACKCLOSE,
+#if __FreeBSD_version < 500000
+	.d_bmaj =	-1
+#endif
+};
 
 static int DRM(probe)(device_t dev)
 {
-	const char *s = 0;
+	const char *s = NULL;
 
 	int pciid=pci_get_devid(dev);
 	int vendor = (pciid & 0x0000ffff);
 	int device = (pciid & 0xffff0000) >> 16;
-	int i=0, done=0;
-	DRM_INFO("Checking PCI vendor=%d, device=%d\n", vendor, device);
-	while ( !done && (DRM(devicelist)[i].vendor != 0 ) ) {
-		if ( (DRM(devicelist)[i].vendor == vendor) &&
-		     (DRM(devicelist)[i].device == device) ) {
-			done=1;
-			if ( DRM(devicelist)[i].supported )
-				s = DRM(devicelist)[i].name;
-			else
-				DRM_INFO("%s not supported\n", DRM(devicelist)[i].name);
-		}
-		i++;
-	}
 	
+	s = DRM(find_description)(vendor, device);
 	if (s) {
 		device_set_desc(dev, s);
 		return 0;
@@ -264,7 +267,6 @@ static int DRM(detach)(device_t dev)
 	DRM(cleanup)(dev);
 	return 0;
 }
-
 static device_method_t DRM(methods)[] = {
 	/* Device interface */
 	DEVMETHOD(device_probe,		DRM( probe)),
@@ -280,28 +282,150 @@ static driver_t DRM(driver) = {
 	sizeof(drm_device_t),
 };
 
-static devclass_t DRM( devclass);
-
-static struct cdevsw DRM( cdevsw) = {
-	/* open */	DRM( open ),
-	/* close */	DRM( close ),
-	/* read */	DRM( read ),
-	/* write */	DRM( write ),
-	/* ioctl */	DRM( ioctl ),
-	/* poll */	DRM( poll ),
-	/* mmap */	DRM( mmap ),
-	/* strategy */	nostrategy,
-	/* name */	DRIVER_NAME,
-	/* maj */	CDEV_MAJOR,
-	/* dump */	nodump,
-	/* psize */	nopsize,
-	/* flags */	D_TTY | D_TRACKCLOSE,
-#if __FreeBSD_version >= 500000
-	/* kqfilter */	0
+static devclass_t DRM(devclass);
+
+#elif defined(__NetBSD__)
+
+static struct cdevsw DRM(cdevsw) = {
+	DRM(open),
+	DRM(close),
+	DRM(read),
+	DRM(write),
+	DRM(ioctl),
+	nostop,
+	notty,
+	DRM(poll),
+	DRM(mmap),
+	nokqfilter,
+	D_TTY
+};
+
+int DRM(refcnt) = 0;
+#if __NetBSD_Version__ >= 106080000
+MOD_DEV( DRIVER_NAME, DRIVER_NAME, NULL, -1, &DRM(cdevsw), CDEV_MAJOR);
 #else
-	/* bmaj */	-1
+MOD_DEV( DRIVER_NAME, LM_DT_CHAR, CDEV_MAJOR, &DRM(cdevsw) );
 #endif
-};
+
+int DRM(lkmentry)(struct lkm_table *lkmtp, int cmd, int ver);
+static int DRM(lkmhandle)(struct lkm_table *lkmtp, int cmd);
+
+int DRM(modprobe)();
+int DRM(probe)(struct pci_attach_args *pa);
+void DRM(attach)(struct pci_attach_args *pa, dev_t kdev);
+
+int DRM(lkmentry)(struct lkm_table *lkmtp, int cmd, int ver) {
+	DISPATCH(lkmtp, cmd, ver, DRM(lkmhandle), DRM(lkmhandle), DRM(lkmhandle));
+}
+
+static int DRM(lkmhandle)(struct lkm_table *lkmtp, int cmd)
+{
+	int j, error = 0;
+#if defined(__NetBSD__) && (__NetBSD_Version__ > 106080000)
+	struct lkm_dev *args = lkmtp->private.lkm_dev;
+#endif
+
+	switch(cmd) {
+	case LKM_E_LOAD:
+		if (lkmexists(lkmtp))
+			return EEXIST;
+
+		if(DRM(modprobe)())
+			return 0;
+
+		return 1;
+
+	case LKM_E_UNLOAD:
+		if (DRM(refcnt) > 0)
+			return (EBUSY);
+		break;
+	case LKM_E_STAT:
+		break;
+
+	default:
+		error = EIO;
+		break;
+	}
+	
+	return error;
+}
+
+int DRM(modprobe)() {
+	struct pci_attach_args pa;
+	int error = 0;
+	if((error = pci_find_device(&pa, DRM(probe))) != 0)
+		DRM(attach)(&pa, 0);
+
+	return error;
+}
+
+int DRM(probe)(struct pci_attach_args *pa)
+{
+	const char *desc;
+
+	desc = DRM(find_description)(PCI_VENDOR(pa->pa_id), PCI_PRODUCT(pa->pa_id));
+	if (desc != NULL) {
+		return 1;
+	}
+
+	return 0;
+}
+
+void DRM(attach)(struct pci_attach_args *pa, dev_t kdev)
+{
+	int i;
+	drm_device_t *dev;
+
+	config_makeroom(kdev, &DRM(cd));
+	DRM(cd).cd_devs[(kdev)] = DRM(alloc)(sizeof(drm_device_t),
+	    DRM_MEM_DRIVER);
+	dev = DRIVER_SOFTC(kdev);
+
+	memset(dev, 0, sizeof(drm_device_t));
+	memcpy(&dev->pa, pa, sizeof(dev->pa));
+
+	DRM_INFO("%s", DRM(find_description)(PCI_VENDOR(pa->pa_id), PCI_PRODUCT(pa->pa_id)));
+	DRM(init)(dev);
+}
+
+int DRM(detach)(struct device *self, int flags)
+{
+	DRM(cleanup)((drm_device_t *)self);
+	return 0;
+}
+
+int DRM(activate)(struct device *self, enum devact act)
+{
+	switch (act) {
+	case DVACT_ACTIVATE:
+		return (EOPNOTSUPP);
+		break;
+
+	case DVACT_DEACTIVATE:
+		/* FIXME */
+		break;
+	}
+	return (0);
+}
+#endif /* __NetBSD__ */
+
+const char *DRM(find_description)(int vendor, int device) {
+	const char *s = NULL;
+	int i=0, done=0;
+	
+	while ( !done && (DRM(devicelist)[i].vendor != 0 ) ) {
+		if ( (DRM(devicelist)[i].vendor == vendor) &&
+		     (DRM(devicelist)[i].device == device) ) {
+			done=1;
+			if ( DRM(devicelist)[i].supported )
+				s = DRM(devicelist)[i].name;
+			else
+				DRM_INFO("%s not supported\n", DRM(devicelist)[i].name);
+		}
+		i++;
+	}
+	return s;
+}
 
 static int DRM(setup)( drm_device_t *dev )
 {
@@ -309,7 +433,6 @@ static int DRM(setup)( drm_device_t *dev )
 
 	DRIVER_PRESETUP();
 	atomic_set( &dev->ioctl_count, 0 );
-	atomic_set( &dev->vma_count, 0 );
 	dev->buf_use = 0;
 	atomic_set( &dev->buf_alloc, 0 );
 
@@ -367,12 +490,11 @@ static int DRM(setup)( drm_device_t *dev )
 
 	dev->maplist = DRM(alloc)(sizeof(*dev->maplist),
 				  DRM_MEM_MAPS);
-	if(dev->maplist == NULL) DRM_OS_RETURN(ENOMEM);
+	if(dev->maplist == NULL) return DRM_ERR(ENOMEM);
 	memset(dev->maplist, 0, sizeof(*dev->maplist));
 	TAILQ_INIT(dev->maplist);
 	dev->map_count = 0;
 
-	dev->vmalist = NULL;
 	dev->lock.hw_lock = NULL;
 	dev->lock.lock_queue = 0;
 	dev->queue_count = 0;
@@ -399,7 +521,11 @@ static int DRM(setup)( drm_device_t *dev )
 	dev->buf_rp = dev->buf;
 	dev->buf_wp = dev->buf;
 	dev->buf_end = dev->buf + DRM_BSZ;
+#ifdef __FreeBSD__
 	dev->buf_sigio = NULL;
+#elif defined(__NetBSD__)
+	dev->buf_pgid = 0;
+#endif
 	dev->buf_readers = 0;
 	dev->buf_writers = 0;
 	dev->buf_selecting = 0;
@@ -420,9 +546,8 @@ static int DRM(setup)( drm_device_t *dev )
 static int DRM(takedown)( drm_device_t *dev )
 {
 	drm_magic_entry_t *pt, *next;
-	drm_map_t *map;
+	drm_local_map_t *map;
 	drm_map_list_entry_t *list;
-	drm_vma_entry_t *vma, *vma_next;
 	int i;
 
 	DRM_DEBUG( "\n" );
@@ -432,7 +557,7 @@ static int DRM(takedown)( drm_device_t *dev )
 	if ( dev->irq ) DRM(irq_uninstall)( dev );
 #endif
 
-	DRM_OS_LOCK;
+	DRM_LOCK;
 	callout_stop( &dev->timer );
 
 	if ( dev->devname ) {
@@ -479,15 +604,6 @@ static int DRM(takedown)( drm_device_t *dev )
 	}
 #endif
 
-				/* Clear vma list (only built for debugging) */
-	if ( dev->vmalist ) {
-		for ( vma = dev->vmalist ; vma ; vma = vma_next ) {
-			vma_next = vma->next;
-			DRM(free)( vma, sizeof(*vma), DRM_MEM_VMAS );
-		}
-		dev->vmalist = NULL;
-	}
-
 	if( dev->maplist ) {
 		while ((list=TAILQ_FIRST(dev->maplist))) {
 			map = list->map;
@@ -497,18 +613,34 @@ static int DRM(takedown)( drm_device_t *dev )
 #if __REALLY_HAVE_MTRR
 				if ( map->mtrr >= 0 ) {
 					int retcode;
-					retcode = mtrr_del( map->mtrr,
-							    map->offset,
-							    map->size );
+#ifdef __FreeBSD__
+					int act;
+					struct mem_range_desc mrdesc;
+					mrdesc.mr_base = map->offset;
+					mrdesc.mr_len = map->size;
+					mrdesc.mr_flags = MDF_WRITECOMBINE;
+					act = MEMRANGE_SET_UPDATE;
+					bcopy(DRIVER_NAME, &mrdesc.mr_owner, strlen(DRIVER_NAME));
+					retcode = mem_range_attr_set(&mrdesc, &act);
+					map->mtrr=1;
+#elif defined __NetBSD__
+					struct mtrr mtrrmap;
+					int one = 1;
+					mtrrmap.base = map->offset;
+					mtrrmap.len = map->size;
+					mtrrmap.type = MTRR_TYPE_WC;
+					mtrrmap.flags = 0;
+					retcode = mtrr_set( &mtrrmap, &one, 
+						DRM_CURPROC, MTRR_GETSET_KERNEL);
+#endif
 					DRM_DEBUG( "mtrr_del=%d\n", retcode );
 				}
 #endif
-				DRM(ioremapfree)( map->handle, map->size );
+				DRM(ioremapfree)( map );
 				break;
 			case _DRM_SHM:
-				DRM(free_pages)((unsigned long)map->handle,
-					       DRM(order)(map->size)
-					       - PAGE_SHIFT,
+				DRM(free)(map->handle,
+					       map->size,
 					       DRM_MEM_SAREA);
 				break;
 
@@ -561,207 +693,185 @@ static int DRM(takedown)( drm_device_t *dev )
 #endif
 	if ( dev->lock.hw_lock ) {
 		dev->lock.hw_lock = NULL; /* SHM removed */
-		dev->lock.pid = 0;
-		DRM_OS_WAKEUP_INT(&dev->lock.lock_queue);
+		dev->lock.filp = NULL;
+		DRM_WAKEUP_INT((void *)&dev->lock.lock_queue);
 	}
-	DRM_OS_UNLOCK;
+	DRM_UNLOCK;
 
 	return 0;
 }
 
-/*
- * Figure out how many instances to initialize.
- */
-static int drm_count_cards(void)
-{
-	int num = 0;
-#if defined(DRIVER_CARD_LIST)
-	int i;
-	drm_pci_list_t *l;
-	u16 device, vendor;
-	struct pci_dev *pdev = NULL;
-#endif
-
-	DRM_DEBUG( "\n" );
-
-#if defined(DRIVER_COUNT_CARDS)
-	num = DRIVER_COUNT_CARDS();
-#elif defined(DRIVER_CARD_LIST)
-	for (i = 0, l = DRIVER_CARD_LIST; l[i].vendor != 0; i++) {
-		pdev = NULL;
-		vendor = l[i].vendor;
-		device = l[i].device;
-		if(device == 0xffff) device = PCI_ANY_ID;
-		if(vendor == 0xffff) vendor = PCI_ANY_ID;
-		while ((pdev = pci_find_device(vendor, device, pdev))) {
-			num++;	/* FIXME: What about two cards of the same device id? */
-		}
-	}
-#else
-	num = DRIVER_NUM_CARDS;
-#endif
-	DRM_DEBUG("numdevs = %d\n", num);
-	return num;
-}
-
-/* drm_init is called via init_module at module load time, or via
- * linux/init/main.c (this is not currently supported).
+/* linux: drm_init is called via init_module at module load time, or via
+ *        linux/init/main.c (this is not currently supported).
+ * bsd:   drm_init is called via the attach function per device.
  */
 static int DRM(init)( device_t nbdev )
 {
-
+	int unit;
+#ifdef __FreeBSD__
 	drm_device_t *dev;
-	int i;
+#elif defined(__NetBSD__)
+	drm_device_t *dev = nbdev;
+#endif
 #if __HAVE_CTX_BITMAP
 	int retcode;
 #endif
 	DRM_DEBUG( "\n" );
-
-#ifdef MODULE
-	DRM(parse_options)( drm_opts );
-#endif
-
-	DRM(numdevs) = drm_count_cards();
-	/* Force at least one instance. */
-	if (DRM(numdevs) <= 0)
-		DRM(numdevs) = 1;
-
-	DRM(device) = DRM_OS_MALLOC(sizeof(*DRM(device)) * DRM(numdevs));
-	if (!DRM(device)) {
-		DRM_OS_RETURN(ENOMEM);
-	}
-	DRM(minor) = DRM_OS_MALLOC(sizeof(*(DRM(minor))) * DRM(numdevs));
-	if (!DRM(minor)) {
-		DRM_OS_FREE(DRM(device));
-		DRM_OS_RETURN(ENOMEM);
-	}
-
 	DRIVER_PREINIT();
 
-
-	for (i = 0; i < DRM(numdevs); i++) {
-		int unit = device_get_unit(nbdev);
-		/* FIXME??? - multihead !!! */
-		dev = device_get_softc(nbdev);
-		memset( (void *)dev, 0, sizeof(*dev) );
-		DRM(minor)[i]=unit;
-		DRM_OS_SPININIT(dev->count_lock, "drm device");
-		lockinit(&dev->dev_lock, PZERO, "drmlk", 0, 0);
-		dev->device = nbdev;
-		dev->devnode = make_dev( &DRM(cdevsw),
-				unit,
-				DRM_DEV_UID,
-				DRM_DEV_GID,
-				DRM_DEV_MODE,
-				"dri/card%d", unit );
-		dev->name   = DRIVER_NAME;
-		DRM(mem_init)();
-		DRM(sysctl_init)(dev);
-		TAILQ_INIT(&dev->files);
+#ifdef __FreeBSD__
+	unit = device_get_unit(nbdev);
+	dev = device_get_softc(nbdev);
+	memset( (void *)dev, 0, sizeof(*dev) );
+	dev->device = nbdev;
+	dev->devnode = make_dev( &DRM(cdevsw),
+			unit,
+			DRM_DEV_UID,
+			DRM_DEV_GID,
+			DRM_DEV_MODE,
+			"dri/card%d", unit );
+#elif defined(__NetBSD__)
+	unit = minor(dev->device.dv_unit);
+#endif
+	DRM_SPININIT(dev->count_lock, "drm device");
+	lockinit(&dev->dev_lock, PZERO, "drmlk", 0, 0);
+	dev->name = DRIVER_NAME;
+	DRM(mem_init)();
+	DRM(sysctl_init)(dev);
+	TAILQ_INIT(&dev->files);
 
 #if __REALLY_HAVE_AGP
-		dev->agp = DRM(agp_init)();
+	dev->agp = DRM(agp_init)();
 #if __MUST_HAVE_AGP
-		if ( dev->agp == NULL ) {
-			DRM_ERROR( "Cannot initialize the agpgart module.\n" );
-			DRM(sysctl_cleanup)( dev );
-			destroy_dev(dev->devnode);
-			DRM(takedown)( dev );
-			DRM_OS_RETURN(ENOMEM);
-		}
+	if ( dev->agp == NULL ) {
+		DRM_ERROR( "Cannot initialize the agpgart module.\n" );
+		DRM(sysctl_cleanup)( dev );
+#ifdef __FreeBSD__
+		destroy_dev(dev->devnode);
 #endif
+		DRM(takedown)( dev );
+		return DRM_ERR(ENOMEM);
+	}
+#endif /* __MUST_HAVE_AGP */
 #if __REALLY_HAVE_MTRR
-		if (dev->agp)
-			dev->agp->agp_mtrr = mtrr_add( dev->agp->agp_info.aper_base,
-				       dev->agp->agp_info.aper_size*1024*1024,
-				       MTRR_TYPE_WRCOMB,
-				       1 );
-#endif
-#endif
+	if (dev->agp) {
+#ifdef __FreeBSD__
+		int retcode = 0, act;
+		struct mem_range_desc mrdesc;
+		mrdesc.mr_base = dev->agp->info.ai_aperture_base;
+		mrdesc.mr_len = dev->agp->info.ai_aperture_size;
+		mrdesc.mr_flags = MDF_WRITECOMBINE;
+		act = MEMRANGE_SET_UPDATE;
+		bcopy(DRIVER_NAME, &mrdesc.mr_owner, strlen(DRIVER_NAME));
+		retcode = mem_range_attr_set(&mrdesc, &act);
+		dev->agp->agp_mtrr=1;
+#elif defined __NetBSD__
+		struct mtrr mtrrmap;
+		int one = 1;
+		mtrrmap.base = dev->agp->info.ai_aperture_base;
+		mtrrmap.len = dev->agp->info.ai_aperture_size;
+		mtrrmap.type = MTRR_TYPE_WC;
+		mtrrmap.flags = MTRR_VALID;
+		dev->agp->agp_mtrr = mtrr_set( &mtrrmap, &one, NULL, MTRR_GETSET_KERNEL);
+#endif /* __NetBSD__ */
+	}
+#endif /* __REALLY_HAVE_MTRR */
+#endif /* __REALLY_HAVE_AGP */
 
 #if __HAVE_CTX_BITMAP
-		retcode = DRM(ctxbitmap_init)( dev );
-		if( retcode ) {
-			DRM_ERROR( "Cannot allocate memory for context bitmap.\n" );
-			DRM(sysctl_cleanup)( dev );
-			destroy_dev(dev->devnode);
-			DRM(takedown)( dev );
-			return retcode;
-		}
+	retcode = DRM(ctxbitmap_init)( dev );
+	if( retcode ) {
+		DRM_ERROR( "Cannot allocate memory for context bitmap.\n" );
+		DRM(sysctl_cleanup)( dev );
+#ifdef __FreeBSD__
+		destroy_dev(dev->devnode);
 #endif
-		DRM_INFO( "Initialized %s %d.%d.%d %s on minor %d\n",
-		  	DRIVER_NAME,
-		  	DRIVER_MAJOR,
-		  	DRIVER_MINOR,
-		  	DRIVER_PATCHLEVEL,
-		  	DRIVER_DATE,
-		  	DRM(minor)[i] );
+		DRM(takedown)( dev );
+		return retcode;
 	}
+#endif
+	DRM_INFO( "Initialized %s %d.%d.%d %s on minor %d\n",
+	  	DRIVER_NAME,
+	  	DRIVER_MAJOR,
+	  	DRIVER_MINOR,
+	  	DRIVER_PATCHLEVEL,
+	  	DRIVER_DATE,
+	  	unit );
 
 	DRIVER_POSTINIT();
 
 	return 0;
 }
 
-/* drm_cleanup is called via cleanup_module at module unload time.
+/* linux: drm_cleanup is called via cleanup_module at module unload time.
+ * bsd:   drm_cleanup is called per device at module unload time.
+ * FIXME: NetBSD
  */
 static void DRM(cleanup)(device_t nbdev)
 {
 	drm_device_t *dev;
-	int i;
+#ifdef __NetBSD__
+#if __REALLY_HAVE_MTRR
+	struct mtrr mtrrmap;
+	int one = 1;
+#endif /* __REALLY_HAVE_MTRR */
+	dev = nbdev;
+#endif /* __NetBSD__ */
 
 	DRM_DEBUG( "\n" );
 
-	for (i = DRM(numdevs) - 1; i >= 0; i--) {
-		/* FIXME??? - multihead */
-		dev = device_get_softc(nbdev);
-		DRM(sysctl_cleanup)( dev );
-		destroy_dev(dev->devnode);
+#ifdef __FreeBSD__
+	dev = device_get_softc(nbdev);
+#endif
+	DRM(sysctl_cleanup)( dev );
+#ifdef __FreeBSD__
+	destroy_dev(dev->devnode);
+#endif
 #if __HAVE_CTX_BITMAP
-		DRM(ctxbitmap_cleanup)( dev );
+	DRM(ctxbitmap_cleanup)( dev );
 #endif
 
 #if __REALLY_HAVE_AGP && __REALLY_HAVE_MTRR
-		if ( dev->agp && dev->agp->agp_mtrr >= 0) {
-			int retval;
-			retval = mtrr_del( dev->agp->agp_mtrr,
-				   dev->agp->agp_info.aper_base,
-				   dev->agp->agp_info.aper_size*1024*1024 );
-			DRM_DEBUG( "mtrr_del=%d\n", retval );
-		}
+	if ( dev->agp && dev->agp->agp_mtrr >= 0) {
+#if defined(__NetBSD__)
+		mtrrmap.base = dev->agp->info.ai_aperture_base;
+		mtrrmap.len = dev->agp->info.ai_aperture_size;
+		mtrrmap.type = 0;
+		mtrrmap.flags = 0;
+		mtrr_set( &mtrrmap, &one, NULL, MTRR_GETSET_KERNEL);
+#endif
+	}
 #endif
 
-		DRM(takedown)( dev );
+	DRM(takedown)( dev );
 
 #if __REALLY_HAVE_AGP
-		if ( dev->agp ) {
-			DRM(agp_uninit)();
-			DRM(free)( dev->agp, sizeof(*dev->agp), DRM_MEM_AGPLISTS );
-			dev->agp = NULL;
-		}
-#endif
+	if ( dev->agp ) {
+		DRM(agp_uninit)();
+		DRM(free)( dev->agp, sizeof(*dev->agp), DRM_MEM_AGPLISTS );
+		dev->agp = NULL;
 	}
+#endif
 	DRIVER_POSTCLEANUP();
-	DRM_OS_FREE(DRM(minor));
-	DRM_OS_FREE(DRM(device));
-	DRM(numdevs) = 0;
+	DRM(mem_uninit)();
+	DRM_SPINUNINIT(dev->count_lock);
 }
 
 
-int DRM(version)( DRM_OS_IOCTL )
+int DRM(version)( DRM_IOCTL_ARGS )
 {
 	drm_version_t version;
 	int len;
 
-	DRM_OS_KRNFROMUSR( version, (drm_version_t *)data, sizeof(version) );
+	DRM_COPY_FROM_USER_IOCTL( version, (drm_version_t *)data, sizeof(version) );
 
 #define DRM_COPY( name, value )						\
 	len = strlen( value );						\
 	if ( len > name##_len ) len = name##_len;			\
 	name##_len = strlen( value );					\
 	if ( len && name ) {						\
-		if ( DRM_OS_COPYTOUSR( name, value, len ) )		\
-			DRM_OS_RETURN(EFAULT);				\
+		if ( DRM_COPY_TO_USER( name, value, len ) )		\
+			return DRM_ERR(EFAULT);				\
 	}
 
 	version.version_major = DRIVER_MAJOR;
@@ -772,50 +882,43 @@ int DRM(version)( DRM_OS_IOCTL )
 	DRM_COPY( version.date, DRIVER_DATE );
 	DRM_COPY( version.desc, DRIVER_DESC );
 
-	DRM_OS_KRNTOUSR( (drm_version_t *)data, version, sizeof(version) );
+	DRM_COPY_TO_USER_IOCTL( (drm_version_t *)data, version, sizeof(version) );
 
 	return 0;
 }
 
-int DRM( open)(dev_t kdev, int flags, int fmt, DRM_OS_STRUCTPROC *p)
+int DRM(open)(dev_t kdev, int flags, int fmt, DRM_STRUCTPROC *p)
 {
 	drm_device_t *dev = NULL;
 	int retcode = 0;
-	int i;
 
-	for (i = 0; i < DRM(numdevs); i++) {
-		/* FIXME ??? - multihead */
-		dev    = DRIVER_SOFTC(minor(kdev));
-	}
-	if (!dev) {
-		DRM_OS_RETURN(ENODEV);
-	}
+	dev = DRIVER_SOFTC(minor(kdev));
 
 	DRM_DEBUG( "open_count = %d\n", dev->open_count );
 
-	device_busy(dev->device);
 	retcode = DRM(open_helper)(kdev, flags, fmt, p, dev);
 
 	if ( !retcode ) {
 		atomic_inc( &dev->counts[_DRM_STAT_OPENS] );
-		DRM_OS_SPINLOCK( &dev->count_lock );
-		if ( !dev->open_count++ ) {
-			DRM_OS_SPINUNLOCK( &dev->count_lock );
-			return DRM(setup)( dev );
-		}
-		DRM_OS_SPINUNLOCK( &dev->count_lock );
+		DRM_SPINLOCK( &dev->count_lock );
+#ifdef __FreeBSD__
+		device_busy(dev->device);
+#endif
+		if ( !dev->open_count++ )
+			retcode = DRM(setup)( dev );
+		DRM_SPINUNLOCK( &dev->count_lock );
 	}
-	device_unbusy(dev->device);
 
 	return retcode;
 }
 
-int DRM( close)(dev_t kdev, int flags, int fmt, DRM_OS_STRUCTPROC *p)
+int DRM(close)(dev_t kdev, int flags, int fmt, DRM_STRUCTPROC *p)
 {
 	drm_file_t *priv;
-	drm_device_t  *dev    = kdev->si_drv1;
+	DRM_DEVICE;
 	int retcode = 0;
-
+	DRMFILE __unused filp = (void *)(DRM_CURRENTPID);
+	
 	DRM_DEBUG( "open_count = %d\n", dev->open_count );
 	priv = DRM(find_file_by_proc)(dev, p);
 	if (!priv) {
@@ -829,13 +932,18 @@ int DRM( close)(dev_t kdev, int flags, int fmt, DRM_OS_STRUCTPROC *p)
 	 * Begin inline drm_release
 	 */
 
+#ifdef __FreeBSD__
+	DRM_DEBUG( "pid = %d, device = 0x%lx, open_count = %d\n",
+		   DRM_CURRENTPID, (long)dev->device, dev->open_count );
+#elif defined(__NetBSD__)
 	DRM_DEBUG( "pid = %d, device = 0x%lx, open_count = %d\n",
-		   DRM_OS_CURRENTPID, (long)dev->device, dev->open_count );
+		   DRM_CURRENTPID, (long)&dev->device, dev->open_count);
+#endif
 
 	if (dev->lock.hw_lock && _DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)
-	    && dev->lock.pid == DRM_OS_CURRENTPID) {
+	    && dev->lock.filp == (void *)DRM_CURRENTPID) {
 		DRM_DEBUG("Process %d dead, freeing lock for context %d\n",
-			  DRM_OS_CURRENTPID,
+			  DRM_CURRENTPID,
 			  _DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock));
 #if HAVE_DRIVER_RELEASE
 		DRIVER_RELEASE();
@@ -855,12 +963,12 @@ int DRM( close)(dev_t kdev, int flags, int fmt, DRM_OS_STRUCTPROC *p)
 		for (;;) {
 			if ( !dev->lock.hw_lock ) {
 				/* Device has been unregistered */
-				retcode = EINTR;
+				retcode = DRM_ERR(EINTR);
 				break;
 			}
 			if ( DRM(lock_take)( &dev->lock.hw_lock->lock,
 					     DRM_KERNEL_CONTEXT ) ) {
-				dev->lock.pid       = p->p_pid;
+				dev->lock.pid       = DRM_CURRENTPID;
 				dev->lock.lock_time = jiffies;
                                 atomic_inc( &dev->counts[_DRM_STAT_LOCKS] );
 				break;	/* Got lock */
@@ -869,7 +977,7 @@ int DRM( close)(dev_t kdev, int flags, int fmt, DRM_OS_STRUCTPROC *p)
 #if 0
 			atomic_inc( &dev->total_sleeps );
 #endif
-			retcode = tsleep(&dev->lock.lock_queue,
+			retcode = tsleep((void *)&dev->lock.lock_queue,
 					PZERO|PCATCH,
 					"drmlk2",
 					0);
@@ -883,64 +991,77 @@ int DRM( close)(dev_t kdev, int flags, int fmt, DRM_OS_STRUCTPROC *p)
 		}
 	}
 #elif __HAVE_DMA
-	DRM(reclaim_buffers)( dev, priv->pid );
+	DRM(reclaim_buffers)( dev, (void *)priv->pid );
 #endif
 
+#if defined (__FreeBSD__) && (__FreeBSD_version >= 500000)
+	funsetown(&dev->buf_sigio);
+#elif defined(__FreeBSD__)
 	funsetown(dev->buf_sigio);
+#elif defined(__NetBSD__)
+	dev->buf_pgid = 0;
+#endif /* __NetBSD__ */
 
-	DRM_OS_LOCK;
+	DRM_LOCK;
 	priv = DRM(find_file_by_proc)(dev, p);
 	if (priv) {
 		priv->refs--;
 		if (!priv->refs) {
 			TAILQ_REMOVE(&dev->files, priv, link);
+			DRM(free)( priv, sizeof(*priv), DRM_MEM_FILES );
 		}
 	}
-	DRM_OS_UNLOCK;
+	DRM_UNLOCK;
 
-	DRM(free)( priv, sizeof(*priv), DRM_MEM_FILES );
 
 	/* ========================================================
 	 * End inline drm_release
 	 */
 
 	atomic_inc( &dev->counts[_DRM_STAT_CLOSES] );
-	DRM_OS_SPINLOCK( &dev->count_lock );
+	DRM_SPINLOCK( &dev->count_lock );
+#ifdef __FreeBSD__
+	device_unbusy(dev->device);
+#endif
 	if ( !--dev->open_count ) {
 		if ( atomic_read( &dev->ioctl_count ) || dev->blocked ) {
 			DRM_ERROR( "Device busy: %ld %d\n",
 				(unsigned long)atomic_read( &dev->ioctl_count ),
 				   dev->blocked );
-			DRM_OS_SPINUNLOCK( &dev->count_lock );
-			DRM_OS_RETURN(EBUSY);
+			DRM_SPINUNLOCK( &dev->count_lock );
+			return DRM_ERR(EBUSY);
 		}
-		DRM_OS_SPINUNLOCK( &dev->count_lock );
-		device_unbusy(dev->device);
+		DRM_SPINUNLOCK( &dev->count_lock );
 		return DRM(takedown)( dev );
 	}
-	DRM_OS_SPINUNLOCK( &dev->count_lock );
-
+	DRM_SPINUNLOCK( &dev->count_lock );
 	
-	DRM_OS_RETURN(retcode);
+	return retcode;
 }
 
 /* DRM(ioctl) is called whenever a process performs an ioctl on /dev/drm.
  */
-int DRM(ioctl)( DRM_OS_IOCTL )
+int DRM(ioctl)(dev_t kdev, u_long cmd, caddr_t data, int flags, 
+    DRM_STRUCTPROC *p)
 {
-	DRM_OS_DEVICE;
+	DRM_DEVICE;
 	int retcode = 0;
 	drm_ioctl_desc_t *ioctl;
-	d_ioctl_t *func;
+	int (*func)(DRM_IOCTL_ARGS);
 	int nr = DRM_IOCTL_NR(cmd);
-	DRM_OS_PRIV;
+	DRM_PRIV;
 
 	atomic_inc( &dev->ioctl_count );
 	atomic_inc( &dev->counts[_DRM_STAT_IOCTLS] );
 	++priv->ioctl_count;
 
+#ifdef __FreeBSD__
+	DRM_DEBUG( "pid=%d, cmd=0x%02lx, nr=0x%02x, dev 0x%lx, auth=%d\n",
+		 DRM_CURRENTPID, cmd, nr, (long)dev->device, priv->authenticated );
+#elif defined(__NetBSD__)
 	DRM_DEBUG( "pid=%d, cmd=0x%02lx, nr=0x%02x, dev 0x%lx, auth=%d\n",
-		 DRM_OS_CURRENTPID, cmd, nr, (long)dev->device, priv->authenticated );
+		 DRM_CURRENTPID, cmd, nr, (long)&dev->device, priv->authenticated );
+#endif
 
 	switch (cmd) {
 	case FIONBIO:
@@ -952,14 +1073,31 @@ int DRM(ioctl)( DRM_OS_IOCTL )
 		dev->flags |= FASYNC;
 		return 0;
 
+#ifdef __FreeBSD__
 	case FIOSETOWN:
 		atomic_dec(&dev->ioctl_count);
 		return fsetown(*(int *)data, &dev->buf_sigio);
 
 	case FIOGETOWN:
 		atomic_dec(&dev->ioctl_count);
+#if (__FreeBSD_version >= 500000)
+		*(int *) data = fgetown(&dev->buf_sigio);
+#else
 		*(int *) data = fgetown(dev->buf_sigio);
+#endif
+		return 0;
+#endif /* __FreeBSD__ */
+#ifdef __NetBSD__
+	case TIOCSPGRP:
+		atomic_dec(&dev->ioctl_count);
+		dev->buf_pgid = *(int *)data;
 		return 0;
+
+	case TIOCGPGRP:
+		atomic_dec(&dev->ioctl_count);
+		*(int *)data = dev->buf_pgid;
+		return 0;
+#endif /* __NetBSD__ */
 	}
 
 	if ( nr >= DRIVER_IOCTL_COUNT ) {
@@ -971,21 +1109,21 @@ int DRM(ioctl)( DRM_OS_IOCTL )
 		if ( !func ) {
 			DRM_DEBUG( "no function\n" );
 			retcode = EINVAL;
-		} else if ( ( ioctl->root_only && DRM_OS_CHECKSUSER ) 
+		} else if ( ( ioctl->root_only && DRM_SUSER(p) ) 
 			 || ( ioctl->auth_needed && !priv->authenticated ) ) {
 			retcode = EACCES;
 		} else {
-			retcode = func( kdev, cmd, data, flags, p );
+			retcode = func(kdev, cmd, data, flags, p, (void *)DRM_CURRENTPID);
 		}
 	}
 
 	atomic_dec( &dev->ioctl_count );
-	DRM_OS_RETURN(retcode);
+	return DRM_ERR(retcode);
 }
 
-int DRM(lock)( DRM_OS_IOCTL )
+int DRM(lock)( DRM_IOCTL_ARGS )
 {
-	DRM_OS_DEVICE;
+	DRM_DEVICE;
         drm_lock_t lock;
         int ret = 0;
 #if __HAVE_MULTIPLE_DMA_QUEUES
@@ -997,24 +1135,24 @@ int DRM(lock)( DRM_OS_IOCTL )
         dev->lck_start = start = get_cycles();
 #endif
 
-	DRM_OS_KRNFROMUSR( lock, (drm_lock_t *)data, sizeof(lock) );
+	DRM_COPY_FROM_USER_IOCTL( lock, (drm_lock_t *)data, sizeof(lock) );
 
         if ( lock.context == DRM_KERNEL_CONTEXT ) {
                 DRM_ERROR( "Process %d using kernel context %d\n",
-			   DRM_OS_CURRENTPID, lock.context );
-                DRM_OS_RETURN(EINVAL);
+			   DRM_CURRENTPID, lock.context );
+                return DRM_ERR(EINVAL);
         }
 
         DRM_DEBUG( "%d (pid %d) requests lock (0x%08x), flags = 0x%08x\n",
-		   lock.context, DRM_OS_CURRENTPID,
+		   lock.context, DRM_CURRENTPID,
 		   dev->lock.hw_lock->lock, lock.flags );
 
 #if __HAVE_DMA_QUEUE
         if ( lock.context < 0 )
-                DRM_OS_RETURN(EINVAL);
+                return DRM_ERR(EINVAL);
 #elif __HAVE_MULTIPLE_DMA_QUEUES
         if ( lock.context < 0 || lock.context >= dev->queue_count )
-                DRM_OS_RETURN(EINVAL);
+                return DRM_ERR(EINVAL);
 	q = dev->queuelist[lock.context];
 #endif
 
@@ -1030,14 +1168,14 @@ int DRM(lock)( DRM_OS_IOCTL )
                         }
                         if ( DRM(lock_take)( &dev->lock.hw_lock->lock,
 					     lock.context ) ) {
-                                dev->lock.pid       = DRM_OS_CURRENTPID;
+                                dev->lock.filp = (void *)DRM_CURRENTPID;
                                 dev->lock.lock_time = jiffies;
                                 atomic_inc( &dev->counts[_DRM_STAT_LOCKS] );
                                 break;  /* Got lock */
                         }
 
                                 /* Contention */
-			ret = tsleep(&dev->lock.lock_queue,
+			ret = tsleep((void *)&dev->lock.lock_queue,
 					PZERO|PCATCH,
 					"drmlk2",
 					0);
@@ -1076,21 +1214,21 @@ int DRM(lock)( DRM_OS_IOCTL )
         atomic_inc(&dev->histo.lacq[DRM(histogram_slot)(get_cycles()-start)]);
 #endif
 
-	DRM_OS_RETURN(ret);
+	return DRM_ERR(ret);
 }
 
 
-int DRM(unlock)( DRM_OS_IOCTL )
+int DRM(unlock)( DRM_IOCTL_ARGS )
 {
-	DRM_OS_DEVICE;
+	DRM_DEVICE;
 	drm_lock_t lock;
 
-	DRM_OS_KRNFROMUSR( lock, (drm_lock_t *)data, sizeof(lock) ) ;
+	DRM_COPY_FROM_USER_IOCTL( lock, (drm_lock_t *)data, sizeof(lock) ) ;
 
 	if ( lock.context == DRM_KERNEL_CONTEXT ) {
 		DRM_ERROR( "Process %d using kernel context %d\n",
-			   DRM_OS_CURRENTPID, lock.context );
-		DRM_OS_RETURN(EINVAL);
+			   DRM_CURRENTPID, lock.context );
+		return DRM_ERR(EINVAL);
 	}
 
 	atomic_inc( &dev->counts[_DRM_STAT_UNLOCKS] );
@@ -1120,7 +1258,7 @@ int DRM(unlock)( DRM_OS_IOCTL )
 	DRM(dma_schedule)( dev, 1 );
 #endif
 
-	/* FIXME: Do we ever really need to check this???
+	/* FIXME: Do we ever really need to check this?
 	 */
 	if ( 1 /* !dev->context_flag */ ) {
 		if ( DRM(lock_free)( dev, &dev->lock.hw_lock->lock,
@@ -1134,27 +1272,83 @@ int DRM(unlock)( DRM_OS_IOCTL )
 }
 
 #if DRM_LINUX
+#define LINUX_IOCTL_DRM_MIN		0x6400
+#define LINUX_IOCTL_DRM_MAX		0x64ff
+
 static linux_ioctl_function_t DRM( linux_ioctl);
 static struct linux_ioctl_handler DRM( handler) = {DRM( linux_ioctl), LINUX_IOCTL_DRM_MIN, LINUX_IOCTL_DRM_MAX};
 SYSINIT  (DRM( register),   SI_SUB_KLD, SI_ORDER_MIDDLE, linux_ioctl_register_handler, &DRM( handler));
 SYSUNINIT(DRM( unregister), SI_SUB_KLD, SI_ORDER_MIDDLE, linux_ioctl_unregister_handler, &DRM( handler));
 
+#define LINUX_IOC_VOID	IOC_VOID
+#define LINUX_IOC_IN	IOC_OUT		/* Linux has the values the other way around */
+#define LINUX_IOC_OUT	IOC_IN
+
 /*
  * Linux emulation IOCTL
  */
 static int
-DRM(linux_ioctl)(DRM_OS_STRUCTPROC *p, struct linux_ioctl_args* args)
+DRM(linux_ioctl)(DRM_STRUCTPROC *p, struct linux_ioctl_args* args)
 {
+	u_long		cmd = args->cmd;
+#define STK_PARAMS	128
+	union {
+	    char stkbuf[STK_PARAMS];
+	    long align;
+	} ubuf;
+	caddr_t		data=NULL, memp=NULL;
+	u_int		size = IOCPARM_LEN(cmd);
+	int		error;
+#if (__FreeBSD_version >= 500000)
+	struct file	*fp;
+#else
+	struct file	*fp = p->p_fd->fd_ofiles[args->fd];
+#endif
+	if ( size > STK_PARAMS ) {
+		if ( size > IOCPARM_MAX )
+			return EINVAL;
+		memp = malloc( (u_long)size, DRM(M_DRM), M_WAITOK );
+		data = memp;
+	} else {
+		data = ubuf.stkbuf;
+	}
+
+	if ( cmd & LINUX_IOC_IN ) {
+		if ( size ) {
+			error = copyin( (caddr_t)args->arg, data, (u_int)size );
+			if (error) {
+				if ( memp )
+					free( data, DRM(M_DRM) );
+				return error;
+			}
+		} else {
+			data = (caddr_t)args->arg;
+		}
+	} else if ( (cmd & LINUX_IOC_OUT) && size ) {
+		/*
+		 * Zero the buffer so the user always
+		 * gets back something deterministic.
+		 */
+		bzero( data, size );
+	} else if ( cmd & LINUX_IOC_VOID ) {
+		*(caddr_t *)data = (caddr_t)args->arg;
+	}
+
 #if (__FreeBSD_version >= 500000)
-    struct file		*fp = p->td_proc->p_fd->fd_ofiles[args->fd];
+	if ( (error = fget( p, args->fd, &fp )) != 0 ) {
+		if ( memp )
+			free( memp, DRM(M_DRM) );
+		return (error);
+	}
+	error = fo_ioctl( fp, cmd, data, p->td_ucred, p );
+	fdrop( fp, p );
 #else
-    struct file		*fp = p->p_fd->fd_ofiles[args->fd];
-#endif
-    u_long		cmd = args->cmd;
-    caddr_t             data = (caddr_t) args->arg;
-    /*
-     * Pass the ioctl off to our standard handler.
-     */
-    return(fo_ioctl(fp, cmd, data, p));
+	error = fo_ioctl( fp, cmd, data, p );
+#endif
+	if ( error == 0 && (cmd & LINUX_IOC_OUT) && size )
+		error = copyout( data, (caddr_t)args->arg, (u_int)size );
+	if ( memp )
+		free( memp, DRM(M_DRM) );
+	return error;
 }
 #endif /* DRM_LINUX */
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_fops.h b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_fops.h
index 53af39cd6..75baa5f27 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_fops.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_fops.h
@@ -28,16 +28,13 @@
  *    Rickard E. (Rik) Faith <faith@valinux.com>
  *    Daryll Strauss <daryll@valinux.com>
  *    Gareth Hughes <gareth@valinux.com>
+ *
+ * $FreeBSD: src/sys/dev/drm/drm_fops.h,v 1.5 2003/03/09 02:08:28 anholt Exp $
  */
 
-#define __NO_VERSION__
 #include "drmP.h"
 
-
-#include <sys/signalvar.h>
-#include <sys/poll.h>
-
-drm_file_t *DRM(find_file_by_proc)(drm_device_t *dev, DRM_OS_STRUCTPROC *p)
+drm_file_t *DRM(find_file_by_proc)(drm_device_t *dev, DRM_STRUCTPROC *p)
 {
 #if __FreeBSD_version >= 500021
 	uid_t uid = p->td_proc->p_ucred->cr_svuid;
@@ -56,7 +53,7 @@ drm_file_t *DRM(find_file_by_proc)(drm_device_t *dev, DRM_OS_STRUCTPROC *p)
 
 /* DRM(open) is called whenever a process opens /dev/drm. */
 
-int DRM(open_helper)(dev_t kdev, int flags, int fmt, DRM_OS_STRUCTPROC *p,
+int DRM(open_helper)(dev_t kdev, int flags, int fmt, DRM_STRUCTPROC *p,
 		    drm_device_t *dev)
 {
 	int	     m = minor(kdev);
@@ -66,9 +63,9 @@ int DRM(open_helper)(dev_t kdev, int flags, int fmt, DRM_OS_STRUCTPROC *p,
 		return EBUSY; /* No exclusive opens */
 	dev->flags = flags;
 	if (!DRM(cpu_valid)())
-		DRM_OS_RETURN(EINVAL);
+		return DRM_ERR(EINVAL);
 
-	DRM_DEBUG("pid = %d, minor = %d\n", DRM_OS_CURRENTPID, m);
+	DRM_DEBUG("pid = %d, minor = %d\n", DRM_CURRENTPID, m);
 
 	/* FIXME: linux mallocs and bzeros here */
 	priv = (drm_file_t *) DRM(find_file_by_proc)(dev, p);
@@ -89,15 +86,14 @@ int DRM(open_helper)(dev_t kdev, int flags, int fmt, DRM_OS_STRUCTPROC *p,
 		priv->minor		= m;
 		priv->devXX		= dev;
 		priv->ioctl_count 	= 0;
-		priv->authenticated	= !DRM_OS_CHECKSUSER;
-		lockmgr(&dev->dev_lock, LK_EXCLUSIVE, 0, p);
+		priv->authenticated	= !DRM_SUSER(p);
+		DRM_LOCK;
 		TAILQ_INSERT_TAIL(&dev->files, priv, link);
-		lockmgr(&dev->dev_lock, LK_RELEASE, 0, p);
+		DRM_UNLOCK;
 	}
-
+#ifdef __FreeBSD__
 	kdev->si_drv1 = dev;
-
-
+#endif
 	return 0;
 }
 
@@ -106,9 +102,9 @@ int DRM(open_helper)(dev_t kdev, int flags, int fmt, DRM_OS_STRUCTPROC *p,
    the circular buffer), is based on Alessandro Rubini's LINUX DEVICE
    DRIVERS (Cambridge: O'Reilly, 1998), pages 111-113. */
 
-ssize_t DRM(read)(dev_t kdev, struct uio *uio, int ioflag)
+int DRM(read)(dev_t kdev, struct uio *uio, int ioflag)
 {
-	DRM_OS_DEVICE;
+	DRM_DEVICE;
 	int	      left;
 	int	      avail;
 	int	      send;
@@ -156,6 +152,9 @@ int DRM(write_string)(drm_device_t *dev, const char *s)
 	int left   = (dev->buf_rp + DRM_BSZ - dev->buf_wp) % DRM_BSZ;
 	int send   = strlen(s);
 	int count;
+#ifdef __NetBSD__
+	struct proc *p;
+#endif /* __NetBSD__ */
 
 	DRM_DEBUG("%d left, %d to send (%p, %p)\n",
 		  left, send, dev->buf_rp, dev->buf_wp);
@@ -185,20 +184,35 @@ int DRM(write_string)(drm_device_t *dev, const char *s)
 		selwakeup(&dev->buf_sel);
 	}
 		
+#ifdef __FreeBSD__
 	DRM_DEBUG("dev->buf_sigio=%p\n", dev->buf_sigio);
 	if (dev->buf_sigio) {
 		DRM_DEBUG("dev->buf_sigio->sio_pgid=%d\n", dev->buf_sigio->sio_pgid);
+#if __FreeBSD_version >= 500000
+		pgsigio(&dev->buf_sigio, SIGIO, 0);
+#else
 		pgsigio(dev->buf_sigio, SIGIO, 0);
+#endif /* __FreeBSD_version */
+	}
+#endif /* __FreeBSD__ */
+#ifdef __NetBSD__
+	if (dev->buf_pgid) {
+		DRM_DEBUG("dev->buf_pgid=%d\n", dev->buf_pgid);
+		if(dev->buf_pgid > 0)
+			gsignal(dev->buf_pgid, SIGIO);
+		else if(dev->buf_pgid && (p = pfind(-dev->buf_pgid)) != NULL)
+			psignal(p, SIGIO);
 	}
+#endif /* __NetBSD__ */
 	DRM_DEBUG("waking\n");
 	wakeup(&dev->buf_rp);
 
 	return 0;
 }
 
-int DRM(poll)(dev_t kdev, int events, DRM_OS_STRUCTPROC *p)
+int DRM(poll)(dev_t kdev, int events, DRM_STRUCTPROC *p)
 {
-	drm_device_t  *dev    = kdev->si_drv1;
+	DRM_DEVICE;
 	int           s;
 	int	      revents = 0;
 
@@ -217,7 +231,15 @@ int DRM(poll)(dev_t kdev, int events, DRM_OS_STRUCTPROC *p)
 
 int DRM(write)(dev_t kdev, struct uio *uio, int ioflag)
 {
-        DRM_DEBUG("pid = %d, device = %p, open_count = %d\n",
-                  curproc->p_pid, ((drm_device_t *)kdev->si_drv1)->device, ((drm_device_t *)kdev->si_drv1)->open_count);
-        return 0;
+#if DRM_DEBUG_CODE
+	DRM_DEVICE;
+#endif
+#ifdef __FreeBSD__
+	DRM_DEBUG("pid = %d, device = %p, open_count = %d\n",
+		  curproc->p_pid, dev->device, dev->open_count);
+#elif defined(__NetBSD__)
+	DRM_DEBUG("pid = %d, device = %p, open_count = %d\n",
+		  curproc->p_pid, &dev->device, dev->open_count);
+#endif
+	return 0;
 }
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_init.h b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_init.h
index e2ab60808..ec9ea1d71 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_init.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_init.h
@@ -27,12 +27,13 @@
  * Authors:
  *    Rickard E. (Rik) Faith <faith@valinux.com>
  *    Gareth Hughes <gareth@valinux.com>
+ *
+ * $FreeBSD: src/sys/dev/drm/drm_init.h,v 1.2 2003/03/09 02:08:28 anholt Exp $
  */
 
-#define __NO_VERSION__
 #include "drmP.h"
 
-#if 0 && DRM_DEBUG_CODE
+#if 1 && DRM_DEBUG_CODE
 int DRM(flags) = DRM_FLAG_DEBUG;
 #else
 int DRM(flags) = 0;
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_ioctl.h b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_ioctl.h
index 1e8281e6c..270b2bb52 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_ioctl.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_ioctl.h
@@ -27,22 +27,22 @@
  * Authors:
  *    Rickard E. (Rik) Faith <faith@valinux.com>
  *    Gareth Hughes <gareth@valinux.com>
+ *
+ * $FreeBSD: src/sys/dev/drm/drm_ioctl.h,v 1.3 2003/03/09 02:08:28 anholt Exp $
  */
 
-#define __NO_VERSION__
 #include "drmP.h"
-#include <sys/bus.h>
-#include <pci/pcivar.h>
 
-int DRM(irq_busid)( DRM_OS_IOCTL )
+int DRM(irq_busid)( DRM_IOCTL_ARGS )
 {
+#ifdef __FreeBSD__
 	drm_irq_busid_t id;
 	devclass_t pci;
 	device_t bus, dev;
 	device_t *kids;
 	int error, i, num_kids;
 
-	DRM_OS_KRNFROMUSR( id, (drm_irq_busid_t *)data, sizeof(id) );
+	DRM_COPY_FROM_USER_IOCTL( id, (drm_irq_busid_t *)data, sizeof(id) );
 
 	pci = devclass_find("pci");
 	if (!pci)
@@ -71,49 +71,53 @@ int DRM(irq_busid)( DRM_OS_IOCTL )
 	DRM_DEBUG("%d:%d:%d => IRQ %d\n",
 		  id.busnum, id.devnum, id.funcnum, id.irq);
 	
-	DRM_OS_KRNTOUSR( (drm_irq_busid_t *)data, id, sizeof(id) );
+	DRM_COPY_TO_USER_IOCTL( (drm_irq_busid_t *)data, id, sizeof(id) );
 
 	return 0;
+#else
+	/* don't support interrupt-driven drivers on Net yet */
+	return ENOENT;
+#endif
 }
 
-int DRM(getunique)( DRM_OS_IOCTL )
+int DRM(getunique)( DRM_IOCTL_ARGS )
 {
-	DRM_OS_DEVICE;
+	DRM_DEVICE;
 	drm_unique_t	 u;
 
-	DRM_OS_KRNFROMUSR( u, (drm_unique_t *)data, sizeof(u) );
+	DRM_COPY_FROM_USER_IOCTL( u, (drm_unique_t *)data, sizeof(u) );
 
 	if (u.unique_len >= dev->unique_len) {
-		if (DRM_OS_COPYTOUSR(u.unique, dev->unique, dev->unique_len))
-			DRM_OS_RETURN(EFAULT);
+		if (DRM_COPY_TO_USER(u.unique, dev->unique, dev->unique_len))
+			return DRM_ERR(EFAULT);
 	}
 	u.unique_len = dev->unique_len;
 
-	DRM_OS_KRNTOUSR( (drm_unique_t *)data, u, sizeof(u) );
+	DRM_COPY_TO_USER_IOCTL( (drm_unique_t *)data, u, sizeof(u) );
 
 	return 0;
 }
 
-int DRM(setunique)( DRM_OS_IOCTL )
+int DRM(setunique)( DRM_IOCTL_ARGS )
 {
-	DRM_OS_DEVICE;
+	DRM_DEVICE;
 	drm_unique_t	 u;
 
 	if (dev->unique_len || dev->unique)
-		DRM_OS_RETURN(EBUSY);
+		return DRM_ERR(EBUSY);
 
-	DRM_OS_KRNFROMUSR( u, (drm_unique_t *)data, sizeof(u) );
+	DRM_COPY_FROM_USER_IOCTL( u, (drm_unique_t *)data, sizeof(u) );
 
 	if (!u.unique_len || u.unique_len > 1024)
-		DRM_OS_RETURN(EINVAL);
+		return DRM_ERR(EINVAL);
 
 	dev->unique_len = u.unique_len;
 	dev->unique	= DRM(alloc)(u.unique_len + 1, DRM_MEM_DRIVER);
 
-	if(!dev->unique) DRM_OS_RETURN(ENOMEM);
+	if(!dev->unique) return DRM_ERR(ENOMEM);
 
-	if (DRM_OS_COPYFROMUSR(dev->unique, u.unique, dev->unique_len))
-		DRM_OS_RETURN(EFAULT);
+	if (DRM_COPY_FROM_USER(dev->unique, u.unique, dev->unique_len))
+		return DRM_ERR(EFAULT);
 
 	dev->unique[dev->unique_len] = '\0';
 
@@ -121,7 +125,7 @@ int DRM(setunique)( DRM_OS_IOCTL )
 				  DRM_MEM_DRIVER);
 	if(!dev->devname) {
 		DRM(free)(dev->devname, sizeof(*dev->devname), DRM_MEM_DRIVER);
-		DRM_OS_RETURN(ENOMEM);
+		return DRM_ERR(ENOMEM);
 	}
 	sprintf(dev->devname, "%s@%s", dev->name, dev->unique);
 
@@ -130,23 +134,23 @@ int DRM(setunique)( DRM_OS_IOCTL )
 }
 
 
-int DRM(getmap)( DRM_OS_IOCTL )
+int DRM(getmap)( DRM_IOCTL_ARGS )
 {
-	DRM_OS_DEVICE;
+	DRM_DEVICE;
 	drm_map_t    map;
-	drm_map_t    *mapinlist;
+	drm_local_map_t    *mapinlist;
 	drm_map_list_entry_t *list;
 	int          idx;
 	int	     i = 0;
 
-	DRM_OS_KRNFROMUSR( map, (drm_map_t *)data, sizeof(map) );
+	DRM_COPY_FROM_USER_IOCTL( map, (drm_map_t *)data, sizeof(map) );
 
 	idx = map.offset;
 
-	DRM_OS_LOCK;
+	DRM_LOCK;
 	if (idx < 0 || idx >= dev->map_count) {
-		DRM_OS_UNLOCK;
-		DRM_OS_RETURN(EINVAL);
+		DRM_UNLOCK;
+		return DRM_ERR(EINVAL);
 	}
 
 	TAILQ_FOREACH(list, dev->maplist, link) {
@@ -163,28 +167,28 @@ int DRM(getmap)( DRM_OS_IOCTL )
 		i++;
 	}
 
-	DRM_OS_UNLOCK;
+	DRM_UNLOCK;
 
  	if (!list)
 		return EINVAL;
 
-	DRM_OS_KRNTOUSR( (drm_map_t *)data, map, sizeof(map) );
+	DRM_COPY_TO_USER_IOCTL( (drm_map_t *)data, map, sizeof(map) );
 
 	return 0;
 }
 
-int DRM(getclient)( DRM_OS_IOCTL )
+int DRM(getclient)( DRM_IOCTL_ARGS )
 {
-	DRM_OS_DEVICE;
+	DRM_DEVICE;
 	drm_client_t client;
 	drm_file_t   *pt;
 	int          idx;
 	int          i = 0;
 
-	DRM_OS_KRNFROMUSR( client, (drm_client_t *)data, sizeof(client) );
+	DRM_COPY_FROM_USER_IOCTL( client, (drm_client_t *)data, sizeof(client) );
 
 	idx = client.idx;
-	DRM_OS_LOCK;
+	DRM_LOCK;
 	TAILQ_FOREACH(pt, &dev->files, link) {
 		if (i==idx)
 		{
@@ -193,29 +197,29 @@ int DRM(getclient)( DRM_OS_IOCTL )
 			client.uid   = pt->uid;
 			client.magic = pt->magic;
 			client.iocs  = pt->ioctl_count;
-			DRM_OS_UNLOCK;
+			DRM_UNLOCK;
 
 			*(drm_client_t *)data = client;
 			return 0;
 		}
 		i++;
 	}
-	DRM_OS_UNLOCK;
+	DRM_UNLOCK;
 
-	DRM_OS_KRNTOUSR( (drm_client_t *)data, client, sizeof(client) );
+	DRM_COPY_TO_USER_IOCTL( (drm_client_t *)data, client, sizeof(client) );
 
 	return 0;
 }
 
-int DRM(getstats)( DRM_OS_IOCTL )
+int DRM(getstats)( DRM_IOCTL_ARGS )
 {
-	DRM_OS_DEVICE;
+	DRM_DEVICE;
 	drm_stats_t  stats;
 	int          i;
 
 	memset(&stats, 0, sizeof(stats));
 	
-	DRM_OS_LOCK;
+	DRM_LOCK;
 
 	for (i = 0; i < dev->counters; i++) {
 		if (dev->types[i] == _DRM_STAT_LOCK)
@@ -229,9 +233,9 @@ int DRM(getstats)( DRM_OS_IOCTL )
 	
 	stats.count = dev->counters;
 
-	DRM_OS_UNLOCK;
+	DRM_UNLOCK;
 
-	DRM_OS_KRNTOUSR( (drm_stats_t *)data, stats, sizeof(stats) );
+	DRM_COPY_TO_USER_IOCTL( (drm_stats_t *)data, stats, sizeof(stats) );
 
 	return 0;
 }
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_lists.h b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_lists.h
index ea6d34a70..8c34e1171 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_lists.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_lists.h
@@ -27,9 +27,10 @@
  * Authors:
  *    Rickard E. (Rik) Faith <faith@valinux.com>
  *    Gareth Hughes <gareth@valinux.com>
+ *
+ * $FreeBSD: src/sys/dev/drm/drm_lists.h,v 1.3 2003/03/09 02:08:28 anholt Exp $
  */
 
-#define __NO_VERSION__
 #include "drmP.h"
 
 #if __HAVE_DMA_WAITLIST
@@ -37,26 +38,28 @@
 int DRM(waitlist_create)(drm_waitlist_t *bl, int count)
 {
 	if (bl->count)
-		DRM_OS_RETURN( EINVAL );
+		return DRM_ERR( EINVAL );
 
 	bl->bufs       = DRM(alloc)((bl->count + 2) * sizeof(*bl->bufs),
 				    DRM_MEM_BUFLISTS);
 
-	if(!bl->bufs) DRM_OS_RETURN(ENOMEM);
+	if(!bl->bufs) return DRM_ERR(ENOMEM);
+
+	bzero(bl->bufs, sizeof(*bl->bufs));
 
 	bl->count      = count;
 	bl->rp	       = bl->bufs;
 	bl->wp	       = bl->bufs;
 	bl->end	       = &bl->bufs[bl->count+1];
-	DRM_OS_SPININIT( bl->write_lock, "writelock" );
-	DRM_OS_SPININIT( bl->read_lock, "readlock" );
+	DRM_SPININIT( bl->write_lock, "writelock" );
+	DRM_SPININIT( bl->read_lock, "readlock" );
 	return 0;
 }
 
 int DRM(waitlist_destroy)(drm_waitlist_t *bl)
 {
 	if (bl->rp != bl->wp)
-		DRM_OS_RETURN( EINVAL );
+		return DRM_ERR( EINVAL );
 	if (bl->bufs) DRM(free)(bl->bufs,
 				(bl->count + 2) * sizeof(*bl->bufs),
 				DRM_MEM_BUFLISTS);
@@ -65,6 +68,8 @@ int DRM(waitlist_destroy)(drm_waitlist_t *bl)
 	bl->rp	  = NULL;
 	bl->wp	  = NULL;
 	bl->end	  = NULL;
+	DRM_SPINUNINIT( bl->write_lock );
+	DRM_SPINUNINIT( bl->read_lock );
 	return 0;
 }
 
@@ -76,19 +81,19 @@ int DRM(waitlist_put)(drm_waitlist_t *bl, drm_buf_t *buf)
 	if (!left) {
 		DRM_ERROR("Overflow while adding buffer %d from pid %d\n",
 			  buf->idx, buf->pid);
-		DRM_OS_RETURN( EINVAL );
+		return DRM_ERR( EINVAL );
 	}
 #if __HAVE_DMA_HISTOGRAM
 	getnanotime(&buf->time_queued);
 #endif
 	buf->list	 = DRM_LIST_WAIT;
 
-	DRM_OS_SPINLOCK(&bl->write_lock);
+	DRM_SPINLOCK(&bl->write_lock);
 	s = spldrm();
 	*bl->wp = buf;
 	if (++bl->wp >= bl->end) bl->wp = bl->bufs;
 	splx(s);
-	DRM_OS_SPINUNLOCK(&bl->write_lock);
+	DRM_SPINUNLOCK(&bl->write_lock);
 
 	return 0;
 }
@@ -98,17 +103,17 @@ drm_buf_t *DRM(waitlist_get)(drm_waitlist_t *bl)
 	drm_buf_t     *buf;
 	int		s;
 
-	DRM_OS_SPINLOCK(&bl->read_lock);
+	DRM_SPINLOCK(&bl->read_lock);
 	s = spldrm();
 	buf = *bl->rp;
 	if (bl->rp == bl->wp) {
 		splx(s);
-		DRM_OS_SPINUNLOCK(&bl->read_lock);
+		DRM_SPINUNLOCK(&bl->read_lock);
 		return NULL;
 	}				     
 	if (++bl->rp >= bl->end) bl->rp = bl->bufs;
 	splx(s);
-	DRM_OS_SPINUNLOCK(&bl->read_lock);
+	DRM_SPINUNLOCK(&bl->read_lock);
 	
 	return buf;
 }
@@ -127,7 +132,7 @@ int DRM(freelist_create)(drm_freelist_t *bl, int count)
 	bl->low_mark  = 0;
 	bl->high_mark = 0;
 	atomic_set(&bl->wfh,   0);
-	DRM_OS_SPININIT( bl->lock, "freelistlock" );
+	DRM_SPININIT( bl->lock, "freelistlock" );
 	++bl->initialized;
 	return 0;
 }
@@ -136,6 +141,7 @@ int DRM(freelist_destroy)(drm_freelist_t *bl)
 {
 	atomic_set(&bl->count, 0);
 	bl->next = NULL;
+	DRM_SPINUNINIT( bl->lock );
 	return 0;
 }
 
@@ -159,10 +165,10 @@ int DRM(freelist_put)(drm_device_t *dev, drm_freelist_t *bl, drm_buf_t *buf)
 #endif
 	buf->list	= DRM_LIST_FREE;
 
-	DRM_OS_SPINLOCK( &bl->lock );
+	DRM_SPINLOCK( &bl->lock );
 	buf->next	= bl->next;
 	bl->next	= buf;
-	DRM_OS_SPINUNLOCK( &bl->lock );
+	DRM_SPINUNLOCK( &bl->lock );
 
 	atomic_inc(&bl->count);
 	if (atomic_read(&bl->count) > dma->buf_count) {
@@ -174,7 +180,7 @@ int DRM(freelist_put)(drm_device_t *dev, drm_freelist_t *bl, drm_buf_t *buf)
 				/* Check for high water mark */
 	if (atomic_read(&bl->wfh) && atomic_read(&bl->count)>=bl->high_mark) {
 		atomic_set(&bl->wfh, 0);
-		DRM_OS_WAKEUP_INT(&bl->waiting);
+		DRM_WAKEUP_INT((void *)&bl->waiting);
 	}
 	return 0;
 }
@@ -186,14 +192,14 @@ static drm_buf_t *DRM(freelist_try)(drm_freelist_t *bl)
 	if (!bl) return NULL;
 
 				/* Get buffer */
-	DRM_OS_SPINLOCK(&bl->lock);
+	DRM_SPINLOCK(&bl->lock);
 	if (!bl->next) {
-		DRM_OS_SPINUNLOCK(&bl->lock);
+		DRM_SPINUNLOCK(&bl->lock);
 		return NULL;
 	}
 	buf	  = bl->next;
 	bl->next  = bl->next->next;
-	DRM_OS_SPINUNLOCK(&bl->lock);
+	DRM_SPINUNLOCK(&bl->lock);
 
 	atomic_dec(&bl->count);
 	buf->next = NULL;
@@ -221,7 +227,7 @@ drm_buf_t *DRM(freelist_get)(drm_freelist_t *bl, int block)
 			for (;;) {
 				if (!atomic_read(&bl->wfh)
 				    && (buf = DRM(freelist_try(bl)))) break;
-				error = tsleep(&bl->waiting, PZERO|PCATCH,
+				error = tsleep((void *)&bl->waiting, PZERO|PCATCH,
 					       "drmfg", 0);
 				if (error)
 					break;
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_lock.h b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_lock.h
index 863a228c9..3bab78efe 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_lock.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_lock.h
@@ -27,18 +27,19 @@
  * Authors:
  *    Rickard E. (Rik) Faith <faith@valinux.com>
  *    Gareth Hughes <gareth@valinux.com>
+ *
+ * $FreeBSD: src/sys/dev/drm/drm_lock.h,v 1.2 2003/03/09 02:08:28 anholt Exp $
  */
 
-#define __NO_VERSION__
 #include "drmP.h"
 
-int DRM(block)( DRM_OS_IOCTL )
+int DRM(block)( DRM_IOCTL_ARGS )
 {
 	DRM_DEBUG("\n");
 	return 0;
 }
 
-int DRM(unblock)( DRM_OS_IOCTL )
+int DRM(unblock)( DRM_IOCTL_ARGS )
 {
 	DRM_DEBUG("\n");
 	return 0;
@@ -48,14 +49,12 @@ int DRM(lock_take)(__volatile__ unsigned int *lock, unsigned int context)
 {
 	unsigned int old, new;
 
-	char failed;
-
 	do {
 		old = *lock;
 		if (old & _DRM_LOCK_HELD) new = old | _DRM_LOCK_CONT;
 		else			  new = context | _DRM_LOCK_HELD;
-		_DRM_CAS(lock, old, new, failed);
-	} while (failed);
+	} while (!atomic_cmpset_int(lock, old, new));
+
 	if (_DRM_LOCKING_CONTEXT(old) == context) {
 		if (old & _DRM_LOCK_HELD) {
 			if (context != DRM_KERNEL_CONTEXT) {
@@ -78,14 +77,13 @@ int DRM(lock_transfer)(drm_device_t *dev,
 		       __volatile__ unsigned int *lock, unsigned int context)
 {
 	unsigned int old, new;
-	char failed;
 
-	dev->lock.pid = 0;
+	dev->lock.filp = NULL;
 	do {
 		old  = *lock;
 		new  = context | _DRM_LOCK_HELD;
-		_DRM_CAS(lock, old, new, failed);
-	} while (failed);
+	} while (!atomic_cmpset_int(lock, old, new));
+
 	return 1;
 }
 
@@ -93,23 +91,19 @@ int DRM(lock_free)(drm_device_t *dev,
 		   __volatile__ unsigned int *lock, unsigned int context)
 {
 	unsigned int old, new;
-	pid_t        pid = dev->lock.pid;
-	char failed;
 
-	dev->lock.pid = 0;
+	dev->lock.filp = NULL;
 	do {
 		old  = *lock;
 		new  = 0;
-		_DRM_CAS(lock, old, new, failed);
-	} while (failed);
+	} while (!atomic_cmpset_int(lock, old, new));
+
 	if (_DRM_LOCK_IS_HELD(old) && _DRM_LOCKING_CONTEXT(old) != context) {
-		DRM_ERROR("%d freed heavyweight lock held by %d (pid %d)\n",
-			  context,
-			  _DRM_LOCKING_CONTEXT(old),
-			  pid);
+		DRM_ERROR("%d freed heavyweight lock held by %d\n",
+			  context, _DRM_LOCKING_CONTEXT(old));
 		return 1;
 	}
-	DRM_OS_WAKEUP_INT(&dev->lock.lock_queue);
+	DRM_WAKEUP_INT((void *)&dev->lock.lock_queue);
 	return 0;
 }
 
@@ -125,7 +119,7 @@ static int DRM(flush_queue)(drm_device_t *dev, int context)
 	if (atomic_read(&q->use_count) > 1) {
 		atomic_inc(&q->block_write);
 		atomic_inc(&q->block_count);
-		error = tsleep(&q->flush_queue, PZERO|PCATCH, "drmfq", 0);
+		error = tsleep((void *)&q->flush_queue, PZERO|PCATCH, "drmfq", 0);
 		if (error)
 			return error;
 		atomic_dec(&q->block_count);
@@ -147,7 +141,7 @@ static int DRM(flush_unblock_queue)(drm_device_t *dev, int context)
 	if (atomic_read(&q->use_count) > 1) {
 		if (atomic_read(&q->block_write)) {
 			atomic_dec(&q->block_write);
-			DRM_OS_WAKEUP_INT(&q->write_queue);
+			DRM_WAKEUP_INT((void *)&q->write_queue);
 		}
 	}
 	atomic_dec(&q->use_count);
@@ -194,15 +188,15 @@ int DRM(flush_unblock)(drm_device_t *dev, int context, drm_lock_flags_t flags)
 	return ret;
 }
 
-int DRM(finish)( DRM_OS_IOCTL )
+int DRM(finish)( DRM_IOCTL_ARGS )
 {
-	DRM_OS_DEVICE;
+	DRM_DEVICE;
 	int		  ret	  = 0;
 	drm_lock_t	  lock;
 
 	DRM_DEBUG("\n");
 
-	DRM_OS_KRNFROMUSR( lock, (drm_lock_t *)data, sizeof(lock) );
+	DRM_COPY_FROM_USER_IOCTL( lock, (drm_lock_t *)data, sizeof(lock) );
 
 	ret = DRM(flush_block_and_flush)(dev, lock.context, lock.flags);
 	DRM(flush_unblock)(dev, lock.context, lock.flags);
@@ -225,8 +219,6 @@ int DRM(notifier)(void *priv)
 {
 	drm_sigdata_t *s = (drm_sigdata_t *)priv;
 	unsigned int  old, new;
-	char failed;
-
 
 				/* Allow signal delivery if lock isn't held */
 	if (!_DRM_LOCK_IS_HELD(s->lock->lock)
@@ -237,8 +229,8 @@ int DRM(notifier)(void *priv)
 	do {
 		old  = s->lock->lock;
 		new  = old | _DRM_LOCK_CONT;
-		_DRM_CAS(&s->lock->lock, old, new, failed);
-	} while (failed);
+	} while (!atomic_cmpset_int(&s->lock->lock, old, new));
+
 	return 0;
 }
 
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_memory.h b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_memory.h
index 605b42ae6..0df7ee72d 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_memory.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_memory.h
@@ -27,22 +27,20 @@
  * Authors:
  *    Rickard E. (Rik) Faith <faith@valinux.com>
  *    Gareth Hughes <gareth@valinux.com>
+ *
+ * $FreeBSD: src/sys/dev/drm/drm_memory.h,v 1.7 2003/03/09 02:08:28 anholt Exp $
  */
 
-#define __NO_VERSION__
 #include "drmP.h"
-#include <vm/vm.h>
-#include <vm/pmap.h>
-#if __REALLY_HAVE_AGP
-#include <sys/agpio.h>
-#endif
 
+#if defined(__FreeBSD__) || defined(__NetBSD__)
 #define malloctype DRM(M_DRM)
-/* The macros confliced in the MALLOC_DEFINE */
+/* The macros conflicted in the MALLOC_DEFINE */
 
 MALLOC_DEFINE(malloctype, "drm", "DRM Data Structures");
 
 #undef malloctype
+#endif
 
 typedef struct drm_mem_stats {
 	const char	  *name;
@@ -53,7 +51,7 @@ typedef struct drm_mem_stats {
 	unsigned long	  bytes_freed;
 } drm_mem_stats_t;
 
-static DRM_OS_SPINTYPE	  DRM(mem_lock);
+static DRM_SPINTYPE	  DRM(mem_lock);
 static unsigned long	  DRM(ram_available) = 0; /* In pages */
 static unsigned long	  DRM(ram_used)      = 0;
 static drm_mem_stats_t	  DRM(mem_stats)[]   = {
@@ -63,7 +61,6 @@ static drm_mem_stats_t	  DRM(mem_stats)[]   = {
 	[DRM_MEM_MAGIC]	    = { "magic"	   },
 	[DRM_MEM_IOCTLS]    = { "ioctltab" },
 	[DRM_MEM_MAPS]	    = { "maplist"  },
-	[DRM_MEM_VMAS]	    = { "vmalist"  },
 	[DRM_MEM_BUFS]	    = { "buflist"  },
 	[DRM_MEM_SEGS]	    = { "seglist"  },
 	[DRM_MEM_PAGES]	    = { "pagelist" },
@@ -85,7 +82,11 @@ void DRM(mem_init)(void)
 {
 	drm_mem_stats_t *mem;
 
-	DRM_OS_SPININIT(DRM(mem_lock), "drm memory");
+#ifdef __NetBSD__
+	malloc_type_attach(DRM(M_DRM));
+#endif
+
+	DRM_SPININIT(DRM(mem_lock), "drm memory");
 
 	for (mem = DRM(mem_stats); mem->name; ++mem) {
 		mem->succeed_count   = 0;
@@ -99,9 +100,16 @@ void DRM(mem_init)(void)
 	DRM(ram_used)	   = 0;
 }
 
-/* drm_mem_info is called whenever a process reads /dev/drm/mem. */
+void DRM(mem_uninit)(void)
+{
+	DRM_SPINUNINIT(DRM(mem_lock));
+}
 
-static int DRM(_mem_info) DRM_SYSCTL_HANDLER_ARGS
+#ifdef __FreeBSD__
+/* drm_mem_info is called whenever a process reads /dev/drm/mem. */
+static int
+DRM(_mem_info)(drm_mem_stats_t *stats, struct sysctl_oid *oidp, void *arg1, 
+    int arg2, struct sysctl_req *req)
 {
 	drm_mem_stats_t *pt;
 	char buf[128];
@@ -116,7 +124,7 @@ static int DRM(_mem_info) DRM_SYSCTL_HANDLER_ARGS
 	DRM_SYSCTL_PRINT("%-9.9s %5d %5d %4d %10lu	    |\n",
 		       "locked", 0, 0, 0, DRM(ram_used));
 	DRM_SYSCTL_PRINT("\n");
-	for (pt = DRM(mem_stats); pt->name; pt++) {
+	for (pt = stats; pt->name; pt++) {
 		DRM_SYSCTL_PRINT("%-9.9s %5d %5d %4d %10lu %10lu | %6d %10ld\n",
 			       pt->name,
 			       pt->succeed_count,
@@ -136,12 +144,22 @@ static int DRM(_mem_info) DRM_SYSCTL_HANDLER_ARGS
 int DRM(mem_info) DRM_SYSCTL_HANDLER_ARGS
 {
 	int ret;
-
-	DRM_OS_SPINLOCK(&DRM(mem_lock));
-	ret = DRM(_mem_info)(oidp, arg1, arg2, req);
-	DRM_OS_SPINUNLOCK(&DRM(mem_lock));
+	drm_mem_stats_t *stats;
+	
+	stats = malloc(sizeof(DRM(mem_stats)), DRM(M_DRM), M_NOWAIT);
+	if (stats == NULL)
+		return ENOMEM;
+	
+	DRM_SPINLOCK(&DRM(mem_lock));
+	bcopy(DRM(mem_stats), stats, sizeof(DRM(mem_stats)));
+	DRM_SPINUNLOCK(&DRM(mem_lock));
+	
+	ret = DRM(_mem_info)(stats, oidp, arg1, arg2, req);
+	
+	free(stats, DRM(M_DRM));
 	return ret;
 }
+#endif /* __FreeBSD__ */
 
 void *DRM(alloc)(size_t size, int area)
 {
@@ -153,15 +171,15 @@ void *DRM(alloc)(size_t size, int area)
 	}
 
 	if (!(pt = malloc(size, DRM(M_DRM), M_NOWAIT))) {
-		DRM_OS_SPINLOCK(&DRM(mem_lock));
+		DRM_SPINLOCK(&DRM(mem_lock));
 		++DRM(mem_stats)[area].fail_count;
-		DRM_OS_SPINUNLOCK(&DRM(mem_lock));
+		DRM_SPINUNLOCK(&DRM(mem_lock));
 		return NULL;
 	}
-	DRM_OS_SPINLOCK(&DRM(mem_lock));
+	DRM_SPINLOCK(&DRM(mem_lock));
 	++DRM(mem_stats)[area].succeed_count;
 	DRM(mem_stats)[area].bytes_allocated += size;
-	DRM_OS_SPINUNLOCK(&DRM(mem_lock));
+	DRM_SPINUNLOCK(&DRM(mem_lock));
 	return pt;
 }
 
@@ -202,72 +220,58 @@ void DRM(free)(void *pt, size_t size, int area)
 	int alloc_count;
 	int free_count;
 
-	if (!pt) DRM_MEM_ERROR(area, "Attempt to free NULL pointer\n");
-	else     free(pt, DRM(M_DRM));
-	DRM_OS_SPINLOCK(&DRM(mem_lock));
+	if (!pt)
+		DRM_MEM_ERROR(area, "Attempt to free NULL pointer\n");
+	else
+		free(pt, DRM(M_DRM));
+	DRM_SPINLOCK(&DRM(mem_lock));
 	DRM(mem_stats)[area].bytes_freed += size;
 	free_count  = ++DRM(mem_stats)[area].free_count;
 	alloc_count =	DRM(mem_stats)[area].succeed_count;
-	DRM_OS_SPINUNLOCK(&DRM(mem_lock));
+	DRM_SPINUNLOCK(&DRM(mem_lock));
 	if (free_count > alloc_count) {
 		DRM_MEM_ERROR(area, "Excess frees: %d frees, %d allocs\n",
 			      free_count, alloc_count);
 	}
 }
 
-unsigned long DRM(alloc_pages)(int order, int area)
+void *DRM(ioremap)( drm_device_t *dev, drm_local_map_t *map )
 {
-	vm_offset_t address;
-	unsigned long bytes	  = PAGE_SIZE << order;
-
-
-	address = (vm_offset_t) contigmalloc(bytes, DRM(M_DRM), M_WAITOK, 0, ~0, 1, 0);
-	if (!address) {
-		DRM_OS_SPINLOCK(&DRM(mem_lock));
-		++DRM(mem_stats)[area].fail_count;
-		DRM_OS_SPINUNLOCK(&DRM(mem_lock));
-		return 0;
-	}
-	DRM_OS_SPINLOCK(&DRM(mem_lock));
-	++DRM(mem_stats)[area].succeed_count;
-	DRM(mem_stats)[area].bytes_allocated += bytes;
-	DRM(ram_used)		             += bytes;
-	DRM_OS_SPINUNLOCK(&DRM(mem_lock));
-
-
-				/* Zero outside the lock */
-	memset((void *)address, 0, bytes);
-
-
-	return address;
-}
-
-void DRM(free_pages)(unsigned long address, int order, int area)
-{
-	unsigned long bytes = PAGE_SIZE << order;
-	int		  alloc_count;
-	int		  free_count;
+	void *pt;
 
-	if (!address) {
-		DRM_MEM_ERROR(area, "Attempt to free address 0\n");
-	} else {
-		contigfree((void *) address, bytes, DRM(M_DRM));
+	if (!map->size) {
+		DRM_MEM_ERROR(DRM_MEM_MAPPINGS,
+			      "Mapping 0 bytes at 0x%08lx\n", map->offset);
+		return NULL;
 	}
+#ifdef __NetBSD__
+	map->iot = dev->pa.pa_memt;
+#endif
 
-	DRM_OS_SPINLOCK(&DRM(mem_lock));
-	free_count  = ++DRM(mem_stats)[area].free_count;
-	alloc_count =	DRM(mem_stats)[area].succeed_count;
-	DRM(mem_stats)[area].bytes_freed += bytes;
-	DRM(ram_used)			 -= bytes;
-	DRM_OS_SPINUNLOCK(&DRM(mem_lock));
-	if (free_count > alloc_count) {
-		DRM_MEM_ERROR(area,
-			      "Excess frees: %d frees, %d allocs\n",
-			      free_count, alloc_count);
+#ifdef __FreeBSD__
+	if (!(pt = pmap_mapdev(map->offset, map->size))) {
+#elif defined(__NetBSD__)
+	if (bus_space_map(map->iot, map->offset, map->size, 
+		BUS_SPACE_MAP_LINEAR, &map->ioh)) {
+#endif
+		DRM_SPINLOCK(&DRM(mem_lock));
+		++DRM(mem_stats)[DRM_MEM_MAPPINGS].fail_count;
+		DRM_SPINUNLOCK(&DRM(mem_lock));
+		return NULL;
 	}
+#ifdef __NetBSD__
+	pt = bus_space_vaddr(map->iot, map->ioh);
+#endif
+	DRM_SPINLOCK(&DRM(mem_lock));
+	++DRM(mem_stats)[DRM_MEM_MAPPINGS].succeed_count;
+	DRM(mem_stats)[DRM_MEM_MAPPINGS].bytes_allocated += map->size;
+	DRM_SPINUNLOCK(&DRM(mem_lock));
+	return pt;
 }
 
-void *DRM(ioremap)(unsigned long offset, unsigned long size)
+/* unused so far */
+#if 0
+void *DRM(ioremap_nocache)(unsigned long offset, unsigned long size)
 {
 	void *pt;
 
@@ -277,35 +281,41 @@ void *DRM(ioremap)(unsigned long offset, unsigned long size)
 		return NULL;
 	}
 
-	if (!(pt = pmap_mapdev(offset, size))) {
-		DRM_OS_SPINLOCK(&DRM(mem_lock));
+	/* FIXME FOR BSD */
+	if (!(pt = ioremap_nocache(offset, size))) {
+		DRM_SPINLOCK(&DRM(mem_lock));
 		++DRM(mem_stats)[DRM_MEM_MAPPINGS].fail_count;
-		DRM_OS_SPINUNLOCK(&DRM(mem_lock));
+		DRM_SPINUNLOCK(&DRM(mem_lock));
 		return NULL;
 	}
-	DRM_OS_SPINLOCK(&DRM(mem_lock));
+	DRM_SPINLOCK(&DRM(mem_lock));
 	++DRM(mem_stats)[DRM_MEM_MAPPINGS].succeed_count;
 	DRM(mem_stats)[DRM_MEM_MAPPINGS].bytes_allocated += size;
-	DRM_OS_SPINUNLOCK(&DRM(mem_lock));
+	DRM_SPINUNLOCK(&DRM(mem_lock));
 	return pt;
 }
+#endif
 
-void DRM(ioremapfree)(void *pt, unsigned long size)
+void DRM(ioremapfree)(drm_local_map_t *map)
 {
 	int alloc_count;
 	int free_count;
 
-	if (!pt)
+	if (map->handle == NULL)
 		DRM_MEM_ERROR(DRM_MEM_MAPPINGS,
 			      "Attempt to free NULL pointer\n");
 	else
-		pmap_unmapdev((vm_offset_t) pt, size);
+#ifdef __FreeBSD__
+		pmap_unmapdev((vm_offset_t) map->handle, map->size);
+#elif defined(__NetBSD__)
+		bus_space_unmap(map->iot, map->ioh, map->size);
+#endif
 
-	DRM_OS_SPINLOCK(&DRM(mem_lock));
-	DRM(mem_stats)[DRM_MEM_MAPPINGS].bytes_freed += size;
+	DRM_SPINLOCK(&DRM(mem_lock));
+	DRM(mem_stats)[DRM_MEM_MAPPINGS].bytes_freed += map->size;
 	free_count  = ++DRM(mem_stats)[DRM_MEM_MAPPINGS].free_count;
 	alloc_count =	DRM(mem_stats)[DRM_MEM_MAPPINGS].succeed_count;
-	DRM_OS_SPINUNLOCK(&DRM(mem_lock));
+	DRM_SPINUNLOCK(&DRM(mem_lock));
 	if (free_count > alloc_count) {
 		DRM_MEM_ERROR(DRM_MEM_MAPPINGS,
 			      "Excess frees: %d frees, %d allocs\n",
@@ -324,16 +334,16 @@ agp_memory *DRM(alloc_agp)(int pages, u32 type)
 	}
 
 	if ((handle = DRM(agp_allocate_memory)(pages, type))) {
-		DRM_OS_SPINLOCK(&DRM(mem_lock));
+		DRM_SPINLOCK(&DRM(mem_lock));
 		++DRM(mem_stats)[DRM_MEM_TOTALAGP].succeed_count;
 		DRM(mem_stats)[DRM_MEM_TOTALAGP].bytes_allocated
 			+= pages << PAGE_SHIFT;
-		DRM_OS_SPINUNLOCK(&DRM(mem_lock));
+		DRM_SPINUNLOCK(&DRM(mem_lock));
 		return handle;
 	}
-	DRM_OS_SPINLOCK(&DRM(mem_lock));
+	DRM_SPINLOCK(&DRM(mem_lock));
 	++DRM(mem_stats)[DRM_MEM_TOTALAGP].fail_count;
-	DRM_OS_SPINUNLOCK(&DRM(mem_lock));
+	DRM_SPINUNLOCK(&DRM(mem_lock));
 	return NULL;
 }
 
@@ -345,16 +355,16 @@ int DRM(free_agp)(agp_memory *handle, int pages)
 	if (!handle) {
 		DRM_MEM_ERROR(DRM_MEM_TOTALAGP,
 			      "Attempt to free NULL AGP handle\n");
-		DRM_OS_RETURN(EINVAL);
+		return DRM_ERR(EINVAL);
 	}
 
 	if (DRM(agp_free_memory)(handle)) {
-		DRM_OS_SPINLOCK(&DRM(mem_lock));
+		DRM_SPINLOCK(&DRM(mem_lock));
 		free_count  = ++DRM(mem_stats)[DRM_MEM_TOTALAGP].free_count;
 		alloc_count =   DRM(mem_stats)[DRM_MEM_TOTALAGP].succeed_count;
 		DRM(mem_stats)[DRM_MEM_TOTALAGP].bytes_freed
 			+= pages << PAGE_SHIFT;
-		DRM_OS_SPINUNLOCK(&DRM(mem_lock));
+		DRM_SPINUNLOCK(&DRM(mem_lock));
 		if (free_count > alloc_count) {
 			DRM_MEM_ERROR(DRM_MEM_TOTALAGP,
 				      "Excess frees: %d frees, %d allocs\n",
@@ -362,13 +372,13 @@ int DRM(free_agp)(agp_memory *handle, int pages)
 		}
 		return 0;
 	}
-	DRM_OS_RETURN(EINVAL);
+	return DRM_ERR(EINVAL);
 }
 
 int DRM(bind_agp)(agp_memory *handle, unsigned int start)
 {
 	int retcode;
-	device_t dev = agp_find_device();
+	device_t dev = DRM_AGP_FIND_DEVICE();
 	struct agp_memory_info info;
 
 	if (!dev)
@@ -377,22 +387,22 @@ int DRM(bind_agp)(agp_memory *handle, unsigned int start)
 	if (!handle) {
 		DRM_MEM_ERROR(DRM_MEM_BOUNDAGP,
 			      "Attempt to bind NULL AGP handle\n");
-		DRM_OS_RETURN(EINVAL);
+		return DRM_ERR(EINVAL);
 	}
 
 	if (!(retcode = DRM(agp_bind_memory)(handle, start))) {
-		DRM_OS_SPINLOCK(&DRM(mem_lock));
+		DRM_SPINLOCK(&DRM(mem_lock));
 		++DRM(mem_stats)[DRM_MEM_BOUNDAGP].succeed_count;
 		agp_memory_info(dev, handle, &info);
 		DRM(mem_stats)[DRM_MEM_BOUNDAGP].bytes_allocated
 			+= info.ami_size;
-		DRM_OS_SPINUNLOCK(&DRM(mem_lock));
-		DRM_OS_RETURN(0);
+		DRM_SPINUNLOCK(&DRM(mem_lock));
+		return DRM_ERR(0);
 	}
-	DRM_OS_SPINLOCK(&DRM(mem_lock));
+	DRM_SPINLOCK(&DRM(mem_lock));
 	++DRM(mem_stats)[DRM_MEM_BOUNDAGP].fail_count;
-	DRM_OS_SPINUNLOCK(&DRM(mem_lock));
-	DRM_OS_RETURN(retcode);
+	DRM_SPINUNLOCK(&DRM(mem_lock));
+	return DRM_ERR(retcode);
 }
 
 int DRM(unbind_agp)(agp_memory *handle)
@@ -400,7 +410,7 @@ int DRM(unbind_agp)(agp_memory *handle)
 	int alloc_count;
 	int free_count;
 	int retcode = EINVAL;
-	device_t dev = agp_find_device();
+	device_t dev = DRM_AGP_FIND_DEVICE();
 	struct agp_memory_info info;
 
 	if (!dev)
@@ -409,25 +419,25 @@ int DRM(unbind_agp)(agp_memory *handle)
 	if (!handle) {
 		DRM_MEM_ERROR(DRM_MEM_BOUNDAGP,
 			      "Attempt to unbind NULL AGP handle\n");
-		DRM_OS_RETURN(retcode);
+		return DRM_ERR(retcode);
 	}
 
 	agp_memory_info(dev, handle, &info);
 
 	if ((retcode = DRM(agp_unbind_memory)(handle))) 
-		DRM_OS_RETURN(retcode);
+		return DRM_ERR(retcode);
 
-	DRM_OS_SPINLOCK(&DRM(mem_lock));
+	DRM_SPINLOCK(&DRM(mem_lock));
 	free_count  = ++DRM(mem_stats)[DRM_MEM_BOUNDAGP].free_count;
 	alloc_count = DRM(mem_stats)[DRM_MEM_BOUNDAGP].succeed_count;
 	DRM(mem_stats)[DRM_MEM_BOUNDAGP].bytes_freed
 		+= info.ami_size;
-	DRM_OS_SPINUNLOCK(&DRM(mem_lock));
+	DRM_SPINUNLOCK(&DRM(mem_lock));
 	if (free_count > alloc_count) {
 		DRM_MEM_ERROR(DRM_MEM_BOUNDAGP,
 			      "Excess frees: %d frees, %d allocs\n",
 			      free_count, alloc_count);
 	}
-	DRM_OS_RETURN(retcode);
+	return DRM_ERR(retcode);
 }
 #endif
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_os_freebsd.h b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_os_freebsd.h
index 72c5baf6d..30a6e3623 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_os_freebsd.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_os_freebsd.h
@@ -1,3 +1,6 @@
+/*
+ * $FreeBSD: src/sys/dev/drm/drm_os_freebsd.h,v 1.8 2003/03/09 02:08:28 anholt Exp $
+ */
 #include <sys/param.h>
 #include <sys/queue.h>
 #include <sys/malloc.h>
@@ -12,12 +15,26 @@
 #include <sys/uio.h>
 #include <sys/filio.h>
 #include <sys/sysctl.h>
-#include <sys/select.h>
+#include <sys/bus.h>
+#include <sys/signalvar.h>
+#include <sys/poll.h>
 #include <vm/vm.h>
 #include <vm/pmap.h>
+#include <vm/vm_extern.h>
+#include <vm/vm_map.h>
+#include <vm/vm_param.h>
+#include <machine/param.h>
 #include <machine/pmap.h>
+#include <machine/bus.h>
+#include <machine/resource.h>
+#include <sys/mman.h>
+#include <sys/rman.h>
+#include <sys/memrange.h>
+#include <pci/pcivar.h>
 #if __FreeBSD_version >= 500000
 #include <sys/selinfo.h>
+#else
+#include <sys/select.h>
 #endif
 #include <sys/bus.h>
 #if __FreeBSD_version >= 400005
@@ -31,11 +48,30 @@
 #define __REALLY_HAVE_AGP	__HAVE_AGP
 #endif
 
+#ifdef __i386__
+#define __REALLY_HAVE_MTRR	(__HAVE_MTRR)
+#else
 #define __REALLY_HAVE_MTRR	0
-#define __REALLY_HAVE_SG	0
+#endif
+#define __REALLY_HAVE_SG	(__HAVE_SG)
 
 #if __REALLY_HAVE_AGP
 #include <pci/agpvar.h>
+#include <sys/agpio.h>
+#endif
+
+#include <opt_drm.h>
+#if DRM_DEBUG
+#undef  DRM_DEBUG_CODE
+#define DRM_DEBUG_CODE 2
+#endif
+#undef DRM_DEBUG
+
+#if DRM_LINUX
+#include <sys/file.h>
+#include <sys/proc.h>
+#include <machine/../linux/linux.h>
+#include <machine/../linux/linux_proto.h>
 #endif
 
 #define DRM_TIME_SLICE	      (hz/20)  /* Time slice for GLXContexts	  */
@@ -43,49 +79,75 @@
 #define DRM_DEV_MODE	(S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP)
 #define DRM_DEV_UID	0
 #define DRM_DEV_GID	0
-
+#define CDEV_MAJOR	145
 
 #if __FreeBSD_version >= 500000
-#define DRM_OS_SPINTYPE		struct mtx
-#define DRM_OS_SPININIT(l,name)	mtx_init(&l, name, MTX_DEF)
-#define DRM_OS_SPINLOCK(l)	mtx_lock(l)
-#define DRM_OS_SPINUNLOCK(u)	mtx_unlock(u);
-#define DRM_OS_LOCK	lockmgr(&dev->dev_lock, LK_EXCLUSIVE, 0, curthread)
-#define DRM_OS_UNLOCK 	lockmgr(&dev->dev_lock, LK_RELEASE, 0, curthread)
-#define DRM_OS_CURPROC		curthread
-#define DRM_OS_STRUCTPROC	struct thread
-#define DRM_OS_CURRENTPID       curthread->td_proc->p_pid
-#define DRM_OS_IOCTL 		dev_t kdev, u_long cmd, caddr_t data, int flags, struct thread *p
-#define DRM_OS_CHECKSUSER	suser(p->td_proc)
+#define DRM_CURPROC		curthread
+#define DRM_STRUCTPROC		struct thread
+#define DRM_SPINTYPE		struct mtx
+#define DRM_SPININIT(l,name)	mtx_init(&l, name, NULL, MTX_DEF)
+#define DRM_SPINUNINIT(l)	mtx_destroy(&l)
+#define DRM_SPINLOCK(l)		mtx_lock(l)
+#define DRM_SPINUNLOCK(u)	mtx_unlock(u);
+#define DRM_CURRENTPID		curthread->td_proc->p_pid
 #else
-#define DRM_OS_CURPROC		curproc
-#define DRM_OS_STRUCTPROC	struct proc
-#define DRM_OS_SPINTYPE		struct simplelock
-#define DRM_OS_SPININIT(l,name)	simple_lock_init(&l)
-#define DRM_OS_SPINLOCK(l)	simple_lock(l)
-#define DRM_OS_SPINUNLOCK(u)	simple_unlock(u);
-#define DRM_OS_IOCTL		dev_t kdev, u_long cmd, caddr_t data, int flags, struct proc *p
-#define DRM_OS_LOCK	lockmgr(&dev->dev_lock, LK_EXCLUSIVE, 0, curproc)
-#define DRM_OS_UNLOCK 	lockmgr(&dev->dev_lock, LK_RELEASE, 0, curproc)
-#define DRM_OS_CURRENTPID       curproc->p_pid
-#define DRM_OS_CHECKSUSER	suser(p)
+#define DRM_CURPROC		curproc
+#define DRM_STRUCTPROC		struct proc
+#define DRM_SPINTYPE		struct simplelock
+#define DRM_SPININIT(l,name)	simple_lock_init(&l)
+#define DRM_SPINUNINIT(l)
+#define DRM_SPINLOCK(l)		simple_lock(l)
+#define DRM_SPINUNLOCK(u)	simple_unlock(u);
+#define DRM_CURRENTPID		curproc->p_pid
 #endif
 
-#define DRM_OS_TASKQUEUE_ARGS	void *dev, int pending
-#define DRM_OS_IRQ_ARGS	void *device
-#define DRM_OS_DEVICE	drm_device_t	*dev	= kdev->si_drv1
-#define DRM_OS_MALLOC(size) malloc( size, DRM(M_DRM), M_NOWAIT )
-#define DRM_OS_FREE(pt) free( pt, DRM(M_DRM) )
-#define DRM_OS_VTOPHYS(addr) vtophys(addr)
-
-#define DRM_OS_PRIV					\
+/* Currently our DRMFILE (filp) is a void * which is actually the pid
+ * of the current process.  It should be a per-open unique pointer, but
+ * code for that is not yet written */
+#define DRMFILE			void *
+#define DRM_IOCTL_ARGS		dev_t kdev, u_long cmd, caddr_t data, int flags, DRM_STRUCTPROC *p, DRMFILE filp
+#define DRM_LOCK		lockmgr(&dev->dev_lock, LK_EXCLUSIVE, 0, DRM_CURPROC)
+#define DRM_UNLOCK 		lockmgr(&dev->dev_lock, LK_RELEASE, 0, DRM_CURPROC)
+#define DRM_SUSER(p)		suser(p)
+#define DRM_TASKQUEUE_ARGS	void *arg, int pending
+#define DRM_IRQ_ARGS		void *arg
+#define DRM_DEVICE		drm_device_t	*dev	= kdev->si_drv1
+#define DRM_MALLOC(size)	malloc( size, DRM(M_DRM), M_NOWAIT )
+#define DRM_FREE(pt,size)		free( pt, DRM(M_DRM) )
+#define DRM_VTOPHYS(addr)	vtophys(addr)
+
+/* Read/write from bus space, with byteswapping to le if necessary */
+#define DRM_READ8(map, offset)		*(volatile u_int8_t *) (((unsigned long)(map)->handle) + (offset))
+#define DRM_READ32(map, offset)		*(volatile u_int32_t *)(((unsigned long)(map)->handle) + (offset))
+#define DRM_WRITE8(map, offset, val)	*(volatile u_int8_t *) (((unsigned long)(map)->handle) + (offset)) = val
+#define DRM_WRITE32(map, offset, val)	*(volatile u_int32_t *)(((unsigned long)(map)->handle) + (offset)) = val
+/*
+#define DRM_READ8(map, offset)		bus_space_read_1(  (map)->iot, (map)->ioh, (offset) )
+#define DRM_READ32(map, offset)		bus_space_read_4(  (map)->iot, (map)->ioh, (offset) )
+#define DRM_WRITE8(map, offset, val)	bus_space_write_1( (map)->iot, (map)->ioh, (offset), (val) )
+#define DRM_WRITE32(map, offset, val)	bus_space_write_4( (map)->iot, (map)->ioh, (offset), (val) )
+*/
+#define DRM_AGP_FIND_DEVICE()	agp_find_device()
+#define DRM_ERR(v)		v
+
+#define DRM_PRIV					\
 	drm_file_t	*priv	= (drm_file_t *) DRM(find_file_by_proc)(dev, p); \
 	if (!priv) {						\
 		DRM_DEBUG("can't find authenticator\n");	\
 		return EINVAL;					\
 	}
 
-#define DRM_OS_DELAY( udelay )					\
+#define LOCK_TEST_WITH_RETURN(dev, filp)				\
+do {									\
+	if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock) ||		\
+	     dev->lock.filp != filp) {					\
+		DRM_ERROR("%s called without lock held\n",		\
+			   __FUNCTION__);				\
+		return EINVAL;						\
+	}								\
+} while (0)
+
+#define DRM_UDELAY( udelay )					\
 do {								\
 	struct timeval tv1, tv2;				\
 	microtime(&tv1);					\
@@ -95,34 +157,65 @@ do {								\
 	while (((tv2.tv_sec-tv1.tv_sec)*1000000 + tv2.tv_usec - tv1.tv_usec) < udelay ); \
 } while (0)
 
-#define DRM_OS_RETURN(v)	return v;
+#define DRM_GETSAREA()					\
+do {								\
+	drm_map_list_entry_t *listentry;			\
+	TAILQ_FOREACH(listentry, dev->maplist, link) {		\
+		drm_local_map_t *map = listentry->map;		\
+		if (map->type == _DRM_SHM &&			\
+			map->flags & _DRM_CONTAINS_LOCK) {	\
+			dev_priv->sarea = map;			\
+			break;					\
+		}						\
+	}							\
+} while (0)
+
+#define DRM_HZ hz
 
+#define DRM_WAIT_ON( ret, queue, timeout, condition )			\
+while (!condition) {							\
+	ret = tsleep( &(queue), PZERO | PCATCH, "drmwtq", (timeout) );	\
+	if ( ret )							\
+		return ret;						\
+}
 
-#define DRM_OS_KRNTOUSR(arg1, arg2, arg3) \
-	*arg1 = arg2
-#define DRM_OS_KRNFROMUSR(arg1, arg2, arg3) \
-	arg1 = *arg2
-#define DRM_OS_COPYTOUSR(arg1, arg2, arg3) \
-	copyout(arg2, arg1, arg3)
-#define DRM_OS_COPYFROMUSR(arg1, arg2, arg3) \
+#define DRM_WAKEUP( queue ) wakeup( queue )
+#define DRM_WAKEUP_INT( queue ) wakeup( queue )
+#define DRM_INIT_WAITQUEUE( queue )  do {} while (0)
+
+#define DRM_COPY_TO_USER_IOCTL(user, kern, size)	\
+	if ( IOCPARM_LEN(cmd) != size)			\
+		return EINVAL;				\
+	*user = kern;
+#define DRM_COPY_FROM_USER_IOCTL(kern, user, size) \
+	if ( IOCPARM_LEN(cmd) != size)			\
+		return EINVAL;				\
+	kern = *user;
+#define DRM_COPY_TO_USER(user, kern, size) \
+	copyout(kern, user, size)
+#define DRM_COPY_FROM_USER(kern, user, size) \
+	copyin(user, kern, size)
+/* Macros for userspace access with checking readability once */
+/* FIXME: can't find equivalent functionality for nocheck yet.
+ * It'll be slower than linux, but should be correct.
+ */
+#define DRM_VERIFYAREA_READ( uaddr, size )		\
+	(!useracc((caddr_t)uaddr, size, VM_PROT_READ))
+#define DRM_COPY_FROM_USER_UNCHECKED(arg1, arg2, arg3) 	\
 	copyin(arg2, arg1, arg3)
+#define DRM_GET_USER_UNCHECKED(val, uaddr)			\
+	((val) = fuword(uaddr), 0)
 
-#define DRM_OS_READMEMORYBARRIER \
-{												\
-   	int xchangeDummy;									\
-	DRM_DEBUG("%s\n", __FUNCTION__);							\
-   	__asm__ volatile(" push %%eax ; xchg %%eax, %0 ; pop %%eax" : : "m" (xchangeDummy));	\
-   	__asm__ volatile(" push %%eax ; push %%ebx ; push %%ecx ; push %%edx ;"			\
-			 " movl $0,%%eax ; cpuid ; pop %%edx ; pop %%ecx ; pop %%ebx ;"		\
-			 " pop %%eax" : /* no outputs */ :  /* no inputs */ );			\
-} while (0);
-
-#define DRM_OS_WRITEMEMORYBARRIER DRM_OS_READMEMORYBARRIER
+#define DRM_WRITEMEMORYBARRIER( map )					\
+	bus_space_barrier((map)->iot, (map)->ioh, 0, (map)->size, 0);
+#define DRM_READMEMORYBARRIER( map )					\
+	bus_space_barrier((map)->iot, (map)->ioh, 0, (map)->size, BUS_SPACE_BARRIER_READ);
 
-#define DRM_OS_WAKEUP(w) wakeup(w)
-#define DRM_OS_WAKEUP_INT(w) wakeup(w)
+#define PAGE_ALIGN(addr) round_page(addr)
 
-#define PAGE_ALIGN(addr) (((addr)+PAGE_SIZE-1)&PAGE_MASK)
+#ifndef M_WAITOK		/* M_WAITOK (=0) name removed in -current */
+#define M_WAITOK 0
+#endif
 
 #define malloctype DRM(M_DRM)
 /* The macros confliced in the MALLOC_DEFINE */
@@ -137,58 +230,77 @@ typedef struct drm_chipinfo
 	char *name;
 } drm_chipinfo_t;
 
-typedef unsigned long atomic_t;
+#define cpu_to_le32(x) (x)	/* FIXME */
+
+typedef unsigned long dma_addr_t;
+typedef u_int32_t atomic_t;
 typedef u_int32_t cycles_t;
-typedef u_int32_t spinlock_t;
 typedef u_int32_t u32;
 typedef u_int16_t u16;
 typedef u_int8_t u8;
 #define atomic_set(p, v)	(*(p) = (v))
 #define atomic_read(p)		(*(p))
-#define atomic_inc(p)		atomic_add_long(p, 1)
-#define atomic_dec(p)		atomic_subtract_long(p, 1)
-#define atomic_add(n, p)	atomic_add_long(p, n)
-#define atomic_sub(n, p)	atomic_subtract_long(p, n)
+#define atomic_inc(p)		atomic_add_int(p, 1)
+#define atomic_dec(p)		atomic_subtract_int(p, 1)
+#define atomic_add(n, p)	atomic_add_int(p, n)
+#define atomic_sub(n, p)	atomic_subtract_int(p, n)
 
 /* Fake this */
-static __inline unsigned int
-test_and_set_bit(int b, volatile unsigned long *p)
+
+#if __FreeBSD_version < 500000
+/* The extra atomic functions from 5.0 haven't been merged to 4.x */
+static __inline int
+atomic_cmpset_int(volatile int *dst, int old, int new)
+{
+	int s = splhigh();
+	if (*dst==old) {
+		*dst = new;
+		splx(s);
+		return 1;
+	}
+	splx(s);
+	return 0;
+}
+#endif
+
+static __inline atomic_t
+test_and_set_bit(int b, volatile void *p)
 {
 	int s = splhigh();
 	unsigned int m = 1<<b;
-	unsigned int r = *p & m;
-	*p |= m;
+	unsigned int r = *(volatile int *)p & m;
+	*(volatile int *)p |= m;
 	splx(s);
 	return r;
 }
 
 static __inline void
-clear_bit(int b, volatile unsigned long *p)
+clear_bit(int b, volatile void *p)
 {
-    atomic_clear_long(p + (b >> 5), 1 << (b & 0x1f));
+    atomic_clear_int(((volatile int *)p) + (b >> 5), 1 << (b & 0x1f));
 }
 
 static __inline void
-set_bit(int b, volatile unsigned long *p)
+set_bit(int b, volatile void *p)
 {
-    atomic_set_long(p + (b >> 5), 1 << (b & 0x1f));
+    atomic_set_int(((volatile int *)p) + (b >> 5), 1 << (b & 0x1f));
 }
 
 static __inline int
-test_bit(int b, volatile unsigned long *p)
+test_bit(int b, volatile void *p)
 {
-    return p[b >> 5] & (1 << (b & 0x1f));
+    return ((volatile int *)p)[b >> 5] & (1 << (b & 0x1f));
 }
 
 static __inline int
-find_first_zero_bit(volatile unsigned long *p, int max)
+find_first_zero_bit(volatile void *p, int max)
 {
     int b;
 
     for (b = 0; b < max; b += 32) {
-	if (p[b >> 5] != ~0) {
+	if (((volatile int *)p)[b >> 5] != ~0) {
 	    for (;;) {
-		if ((p[b >> 5] & (1 << (b & 0x1f))) == 0)
+		if ((((volatile int *)p)[b >> 5] & (1 << (b & 0x1f))) == 0)
 		    return b;
 		b++;
 	    }
@@ -212,39 +324,24 @@ find_first_zero_bit(volatile unsigned long *p, int max)
 
 #endif
 
-#define __drm_dummy_lock(lock) (*(__volatile__ unsigned int *)lock)
-#define _DRM_CAS(lock,old,new,__ret)				       \
-	do {							       \
-		int __dummy;	/* Can't mark eax as clobbered */      \
-		__asm__ __volatile__(				       \
-			"lock ; cmpxchg %4,%1\n\t"		       \
-			"setnz %0"				       \
-			: "=d" (__ret),				       \
-			  "=m" (__drm_dummy_lock(lock)),	       \
-			  "=a" (__dummy)			       \
-			: "2" (old),				       \
-			  "r" (new));				       \
-	} while (0)
-
 /* Redefinitions to make templating easy */
-#define wait_queue_head_t	long
+#define wait_queue_head_t	atomic_t
 #define agp_memory		void
 #define jiffies			ticks
 
 				/* Macros to make printf easier */
 #define DRM_ERROR(fmt, arg...) \
-	printf("error: " "[" DRM_NAME ":" __FUNCTION__ "] *ERROR* " fmt , ##arg)
+	printf("error: " "[" DRM_NAME ":%s] *ERROR* " fmt , __func__ , ## arg)
 #define DRM_MEM_ERROR(area, fmt, arg...) \
-	printf("error: " "[" DRM_NAME ":" __FUNCTION__ ":%s] *ERROR* " fmt , \
-	       DRM(mem_stats)[area].name , ##arg)
-#define DRM_INFO(fmt, arg...)  printf("info: " "[" DRM_NAME "] " fmt , ##arg)
+	printf("error: " "[" DRM_NAME ":%s:%s] *ERROR* " fmt , \
+		__func__, DRM(mem_stats)[area].name , ##arg)
+#define DRM_INFO(fmt, arg...)  printf("info: " "[" DRM_NAME "] " fmt , ## arg)
 
 #if DRM_DEBUG_CODE
 #define DRM_DEBUG(fmt, arg...)						  \
 	do {								  \
-		if (DRM(flags) & DRM_FLAG_DEBUG)				  \
-			printf("[" DRM_NAME ":" __FUNCTION__ "] " fmt ,	  \
-			       ##arg);					  \
+		if (DRM(flags) & DRM_FLAG_DEBUG)			  \
+			printf("[" DRM_NAME ":%s] " fmt , __func__ , ## arg); \
 	} while (0)
 #else
 #define DRM_DEBUG(fmt, arg...)		 do { } while (0)
@@ -285,8 +382,6 @@ find_first_zero_bit(volatile unsigned long *p, int max)
 
 /* drm_drv.h */
 extern d_ioctl_t	DRM(ioctl);
-extern d_ioctl_t	DRM(lock);
-extern d_ioctl_t	DRM(unlock);
 extern d_open_t		DRM(open);
 extern d_close_t	DRM(close);
 extern d_read_t		DRM(read);
@@ -294,82 +389,13 @@ extern d_write_t	DRM(write);
 extern d_poll_t		DRM(poll);
 extern d_mmap_t		DRM(mmap);
 extern int		DRM(open_helper)(dev_t kdev, int flags, int fmt, 
-					 DRM_OS_STRUCTPROC *p, drm_device_t *dev);
+					 DRM_STRUCTPROC *p, drm_device_t *dev);
 extern drm_file_t	*DRM(find_file_by_proc)(drm_device_t *dev, 
-					 DRM_OS_STRUCTPROC *p);
-
-/* Misc. IOCTL support (drm_ioctl.h) */
-extern d_ioctl_t	DRM(irq_busid);
-extern d_ioctl_t	DRM(getunique);
-extern d_ioctl_t	DRM(setunique);
-extern d_ioctl_t	DRM(getmap);
-extern d_ioctl_t	DRM(getclient);
-extern d_ioctl_t	DRM(getstats);
-
-/* Context IOCTL support (drm_context.h) */
-extern d_ioctl_t	DRM(resctx);
-extern d_ioctl_t	DRM(addctx);
-extern d_ioctl_t	DRM(modctx);
-extern d_ioctl_t	DRM(getctx);
-extern d_ioctl_t	DRM(switchctx);
-extern d_ioctl_t	DRM(newctx);
-extern d_ioctl_t	DRM(rmctx);
-extern d_ioctl_t	DRM(setsareactx);
-extern d_ioctl_t	DRM(getsareactx);
-
-/* Drawable IOCTL support (drm_drawable.h) */
-extern d_ioctl_t	DRM(adddraw);
-extern d_ioctl_t	DRM(rmdraw);
-
-/* Authentication IOCTL support (drm_auth.h) */
-extern d_ioctl_t	DRM(getmagic);
-extern d_ioctl_t	DRM(authmagic);
-
-/* Locking IOCTL support (drm_lock.h) */
-extern d_ioctl_t	DRM(block);
-extern d_ioctl_t	DRM(unblock);
-extern d_ioctl_t	DRM(finish);
-
-/* Buffer management support (drm_bufs.h) */
-extern d_ioctl_t	DRM(addmap);
-extern d_ioctl_t	DRM(rmmap);
-#if __HAVE_DMA
-extern d_ioctl_t	DRM(addbufs_agp);
-extern d_ioctl_t	DRM(addbufs_pci);
-extern d_ioctl_t	DRM(addbufs_sg);
-extern d_ioctl_t	DRM(addbufs);
-extern d_ioctl_t	DRM(infobufs);
-extern d_ioctl_t	DRM(markbufs);
-extern d_ioctl_t	DRM(freebufs);
-extern d_ioctl_t	DRM(mapbufs);
-#endif
-
-/* Memory management support (drm_memory.h) */
-extern int		DRM(mem_info) DRM_SYSCTL_HANDLER_ARGS;
-
-/* DMA support (drm_dma.h) */
-#if __HAVE_DMA_IRQ
-extern d_ioctl_t	DRM(control);
-#endif
-
-/* AGP/GART support (drm_agpsupport.h) */
-#if __REALLY_HAVE_AGP
-extern d_ioctl_t	DRM(agp_acquire);
-extern d_ioctl_t	DRM(agp_release);
-extern d_ioctl_t	DRM(agp_enable);
-extern d_ioctl_t	DRM(agp_info);
-extern d_ioctl_t	DRM(agp_alloc);
-extern d_ioctl_t	DRM(agp_free);
-extern d_ioctl_t	DRM(agp_unbind);
-extern d_ioctl_t	DRM(agp_bind);
-#endif
-
-/* Scatter Gather Support (drm_scatter.h) */
-#if __HAVE_SG
-extern d_ioctl_t	DRM(sg_alloc);
-extern d_ioctl_t	DRM(sg_free);
-#endif
+					 DRM_STRUCTPROC *p);
 
-/* SysCtl Support (drm_sysctl.h) */
+/* sysctl support (drm_sysctl.h) */
 extern int		DRM(sysctl_init)(drm_device_t *dev);
 extern int		DRM(sysctl_cleanup)(drm_device_t *dev);
+
+/* Memory info sysctl (drm_memory.h) */
+extern int		DRM(mem_info) DRM_SYSCTL_HANDLER_ARGS;
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_os_netbsd.h b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_os_netbsd.h
new file mode 100644
index 000000000..fa1582542
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_os_netbsd.h
@@ -0,0 +1,350 @@
+#include <sys/param.h>
+#include <sys/queue.h>
+#include <sys/malloc.h>
+#include <sys/kernel.h>
+#include <sys/systm.h>
+#include <sys/conf.h>
+#include <sys/stat.h>
+#include <sys/proc.h>
+#include <sys/lock.h>
+#include <sys/fcntl.h>
+#include <sys/uio.h>
+#include <sys/filio.h>
+#include <sys/sysctl.h>
+#include <sys/select.h>
+#include <sys/device.h>
+#include <sys/mman.h>
+#include <uvm/uvm.h>
+#include <sys/vnode.h>
+#include <sys/poll.h>
+#include <sys/lkm.h>
+/* For TIOCSPGRP/TIOCGPGRP */
+#include <sys/ttycom.h>
+
+#include <uvm/uvm.h>
+
+#include <machine/pmap.h>
+#include <machine/bus.h>
+#include <sys/resourcevar.h>
+#include <machine/sysarch.h>
+#include <machine/mtrr.h>
+
+#include <dev/pci/pcireg.h>
+#include <dev/pci/pcivar.h>
+ 
+#define __REALLY_HAVE_AGP	__HAVE_AGP
+
+#define __REALLY_HAVE_MTRR	1
+#define __REALLY_HAVE_SG	0
+
+#if __REALLY_HAVE_AGP
+#include <dev/pci/agpvar.h>
+#include <sys/agpio.h>
+#endif
+
+#include <opt_drm.h>
+
+#if DRM_DEBUG
+#undef  DRM_DEBUG_CODE
+#define DRM_DEBUG_CODE 2
+#endif
+#undef DRM_DEBUG
+
+#if DRM_LINUX
+#undef DRM_LINUX	/* FIXME: Linux compat has not been ported yet */
+#endif
+
+typedef drm_device_t *device_t;
+
+extern struct cfdriver DRM(cd);
+
+#define DRM_TIME_SLICE	      (hz/20)  /* Time slice for GLXContexts	  */
+
+#define DRM_DEV_MODE	(S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP)
+#define DRM_DEV_UID	0
+#define DRM_DEV_GID	0
+#define CDEV_MAJOR	34
+
+#define DRM_CURPROC		curproc
+#define DRM_STRUCTPROC		struct proc
+#define DRM_SPINTYPE		struct simplelock
+#define DRM_SPININIT(l,name)	simple_lock_init(&l)
+#define DRM_SPINUNINIT(l)
+#define DRM_SPINLOCK(l)		simple_lock(l)
+#define DRM_SPINUNLOCK(u)	simple_unlock(u);
+#define DRM_CURRENTPID		curproc->p_pid
+
+/* Currently our DRMFILE (filp) is a void * which is actually the pid
+ * of the current process.  It should be a per-open unique pointer, but
+ * code for that is not yet written */
+#define DRMFILE			void *
+#define DRM_IOCTL_ARGS		dev_t kdev, u_long cmd, caddr_t data, int flags, DRM_STRUCTPROC *p, DRMFILE filp
+#define DRM_LOCK		lockmgr(&dev->dev_lock, LK_EXCLUSIVE, NULL)
+#define DRM_UNLOCK 		lockmgr(&dev->dev_lock, LK_RELEASE, NULL)
+#define DRM_SUSER(p)		suser(p->p_ucred, &p->p_acflag)
+#define DRM_TASKQUEUE_ARGS	void *dev, int pending
+#define DRM_IRQ_ARGS		void *arg
+#define DRM_DEVICE		drm_device_t *dev = device_lookup(&DRM(cd), minor(kdev))
+/* XXX Not sure if this is the 'right' version.. */
+#if __NetBSD_Version__ >= 106140000
+MALLOC_DECLARE(DRM(M_DRM));
+#else
+/* XXX Make sure this works */
+extern const int DRM(M_DRM) = M_DEVBUF;
+#endif /* __NetBSD_Version__ */
+#define DRM_MALLOC(size)	malloc( size, DRM(M_DRM), M_NOWAIT )
+#define DRM_FREE(pt,size)		free( pt, DRM(M_DRM) )
+#define DRM_VTOPHYS(addr)	vtophys(addr)
+
+#define DRM_READ8(map, offset)		bus_space_read_1(  (map)->iot, (map)->ioh, (offset) )
+#define DRM_READ32(map, offset)		bus_space_read_4(  (map)->iot, (map)->ioh, (offset) )
+#define DRM_WRITE8(map, offset, val)	bus_space_write_1( (map)->iot, (map)->ioh, (offset), (val) )
+#define DRM_WRITE32(map, offset, val)	bus_space_write_4( (map)->iot, (map)->ioh, (offset), (val) )
+
+#define DRM_AGP_FIND_DEVICE()	agp_find_device(0)
+
+#define DRM_PRIV					\
+	drm_file_t	*priv	= (drm_file_t *) DRM(find_file_by_proc)(dev, p); \
+	if (!priv) {						\
+		DRM_DEBUG("can't find authenticator\n");	\
+		return EINVAL;					\
+	}
+
+#define LOCK_TEST_WITH_RETURN(dev, filp)				\
+do {									\
+	if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock) ||		\
+	     dev->lock.filp != filp) {					\
+		DRM_ERROR("%s called without lock held\n",		\
+			   __FUNCTION__);				\
+		return EINVAL;						\
+	}								\
+} while (0)
+
+#define DRM_UDELAY( udelay )					\
+do {								\
+	struct timeval tv1, tv2;				\
+	microtime(&tv1);					\
+	do {							\
+		microtime(&tv2);				\
+	}							\
+	while (((tv2.tv_sec-tv1.tv_sec)*1000000 + tv2.tv_usec - tv1.tv_usec) < udelay ); \
+} while (0)
+
+#define DRM_GETSAREA()					\
+do {								\
+	drm_map_list_entry_t *listentry;			\
+	TAILQ_FOREACH(listentry, dev->maplist, link) {		\
+		drm_local_map_t *map = listentry->map;		\
+		if (map->type == _DRM_SHM &&			\
+			map->flags & _DRM_CONTAINS_LOCK) {	\
+			dev_priv->sarea = map;			\
+			break;					\
+		}						\
+	}							\
+} while (0)
+
+#define DRM_HZ hz
+
+#define DRM_WAIT_ON( ret, queue, timeout, condition )		\
+while (!condition) {						\
+	ret = tsleep( (void *)&(queue), PZERO | PCATCH, "drmwtq", (timeout) ); \
+	if ( ret )						\
+		return ret;					\
+}
+
+#define DRM_ERR(v)		v
+
+#define DRM_COPY_TO_USER_IOCTL(arg1, arg2, arg3) \
+	*arg1 = arg2
+#define DRM_COPY_FROM_USER_IOCTL(arg1, arg2, arg3) \
+	arg1 = *arg2
+#define DRM_COPY_TO_USER(arg1, arg2, arg3) \
+	copyout(arg2, arg1, arg3)
+#define DRM_COPY_FROM_USER(arg1, arg2, arg3) \
+	copyin(arg2, arg1, arg3)
+/* Macros for userspace access with checking readability once */
+/* FIXME: can't find equivalent functionality for nocheck yet.
+ * It'll be slower than linux, but should be correct.
+ */
+#define DRM_VERIFYAREA_READ( uaddr, size )		\
+	(!uvm_useracc((caddr_t)uaddr, size, VM_PROT_READ))
+#define DRM_COPY_FROM_USER_UNCHECKED(arg1, arg2, arg3) 	\
+	copyin(arg2, arg1, arg3)
+#define DRM_GET_USER_UNCHECKED(val, uaddr)			\
+	((val) = fuword(uaddr), 0)
+
+#define DRM_WRITEMEMORYBARRIER( map )					\
+	bus_space_barrier((map)->iot, (map)->ioh, 0, (map)->size, 0);
+#define DRM_READMEMORYBARRIER( map )					\
+	bus_space_barrier((map)->iot, (map)->ioh, 0, (map)->size, BUS_SPACE_BARRIER_READ);
+
+#define DRM_WAKEUP(w) wakeup((void *)w)
+#define DRM_WAKEUP_INT(w) wakeup(w)
+#define DRM_INIT_WAITQUEUE( queue )  do {} while (0)
+
+#define PAGE_ALIGN(addr) (((addr)+PAGE_SIZE-1)&PAGE_MASK)
+
+typedef struct drm_chipinfo
+{
+	int vendor;
+	int device;
+	int supported;
+	char *name;
+} drm_chipinfo_t;
+
+#define cpu_to_le32(x) (x)	/* FIXME */
+
+typedef u_int32_t dma_addr_t;
+typedef volatile long atomic_t;
+typedef u_int32_t cycles_t;
+typedef u_int32_t u32;
+typedef u_int16_t u16;
+typedef u_int8_t u8;
+typedef dev_type_ioctl(d_ioctl_t);
+typedef vaddr_t vm_offset_t;
+
+/* FIXME */
+#define atomic_set(p, v)	(*(p) = (v))
+#define atomic_read(p)		(*(p))
+#define atomic_inc(p)		(*(p) += 1)
+#define atomic_dec(p)		(*(p) -= 1)
+#define atomic_add(n, p)	(*(p) += (n))
+#define atomic_sub(n, p)	(*(p) -= (n))
+
+/* FIXME */
+#define atomic_add_int(p, v)      *(p) += v
+#define atomic_subtract_int(p, v) *(p) -= v
+#define atomic_set_int(p, bits)   *(p) |= (bits)
+#define atomic_clear_int(p, bits) *(p) &= ~(bits)
+
+/* Fake this */
+
+static __inline int
+atomic_cmpset_int(__volatile__ int *dst, int old, int new)
+{
+	int s = splhigh();
+	if (*dst==old) {
+		*dst = new;
+		splx(s);
+		return 1;
+	}
+	splx(s);
+	return 0;
+}
+
+static __inline atomic_t
+test_and_set_bit(int b, atomic_t *p)
+{
+	int s = splhigh();
+	unsigned int m = 1<<b;
+	unsigned int r = *p & m;
+	*p |= m;
+	splx(s);
+	return r;
+}
+
+static __inline void
+clear_bit(int b, atomic_t *p)
+{
+    atomic_clear_int(p + (b >> 5), 1 << (b & 0x1f));
+}
+
+static __inline void
+set_bit(int b, atomic_t *p)
+{
+    atomic_set_int(p + (b >> 5), 1 << (b & 0x1f));
+}
+
+static __inline int
+test_bit(int b, atomic_t *p)
+{
+    return p[b >> 5] & (1 << (b & 0x1f));
+}
+
+static __inline int
+find_first_zero_bit(atomic_t *p, int max)
+{
+    int b;
+
+    for (b = 0; b < max; b += 32) {
+	if (p[b >> 5] != ~0) {
+	    for (;;) {
+		if ((p[b >> 5] & (1 << (b & 0x1f))) == 0)
+		    return b;
+		b++;
+	    }
+	}
+    }
+    return max;
+}
+
+#define spldrm()		spltty()
+#define jiffies			hardclock_ticks
+
+/* Redefinitions to make templating easy */
+#define wait_queue_head_t	atomic_t
+#define agp_memory		void
+
+				/* Macros to make printf easier */
+#define DRM_ERROR(fmt, arg...) \
+do { \
+	printf("error: [" DRM_NAME ":%s] *ERROR* ", __func__ ); \
+	printf( fmt,## arg ); \
+} while (0)
+
+#define DRM_MEM_ERROR(area, fmt, arg...) \
+	printf("error: [" DRM_NAME ":%s:%s] *ERROR* " fmt , \
+		__func__, DRM(mem_stats)[area].name ,## arg)
+#define DRM_INFO(fmt, arg...)  printf("info: " "[" DRM_NAME "] " fmt ,## arg)
+
+#if DRM_DEBUG_CODE
+#define DRM_DEBUG(fmt, arg...)						  \
+	do {								  \
+		if (DRM(flags) & DRM_FLAG_DEBUG)			  \
+			printf("[" DRM_NAME ":%s] " fmt , __FUNCTION__ ,## arg); \
+	} while (0)
+#else
+#define DRM_DEBUG(fmt, arg...)		 do { } while (0)
+#endif
+
+#define DRM_PROC_LIMIT (PAGE_SIZE-80)
+
+#define DRM_SYSCTL_PRINT(fmt, arg...)		\
+  snprintf(buf, sizeof(buf), fmt, ##arg);	\
+  error = SYSCTL_OUT(req, buf, strlen(buf));	\
+  if (error) return error;
+
+#define DRM_SYSCTL_PRINT_RET(ret, fmt, arg...)	\
+  snprintf(buf, sizeof(buf), fmt, ##arg);	\
+  error = SYSCTL_OUT(req, buf, strlen(buf));	\
+  if (error) { ret; return error; }
+
+
+#define DRM_FIND_MAP(dest, o)						\
+	do {								\
+		drm_map_list_entry_t *listentry;			\
+		TAILQ_FOREACH(listentry, dev->maplist, link) {		\
+			if ( listentry->map->offset == o ) {		\
+				dest = listentry->map;			\
+				break;					\
+			}						\
+		}							\
+	} while (0)
+
+/* Internal functions */
+
+/* drm_drv.h */
+extern dev_type_ioctl(DRM(ioctl));
+extern dev_type_open(DRM(open));
+extern dev_type_close(DRM(close));
+extern dev_type_read(DRM(read));
+extern dev_type_write(DRM(write));
+extern dev_type_poll(DRM(poll));
+extern dev_type_mmap(DRM(mmap));
+extern int		DRM(open_helper)(dev_t kdev, int flags, int fmt, 
+					 DRM_STRUCTPROC *p, drm_device_t *dev);
+extern drm_file_t	*DRM(find_file_by_proc)(drm_device_t *dev, 
+					 DRM_STRUCTPROC *p);
+
+extern int		DRM(sysctl_init)(drm_device_t *dev);
+extern int		DRM(sysctl_cleanup)(drm_device_t *dev);
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_scatter.h b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_scatter.h
index a6b8275ff..e57e5e5b6 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_scatter.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_scatter.h
@@ -25,209 +25,110 @@
  *
  * Authors:
  *   Gareth Hughes <gareth@valinux.com>
+ *
+ * $FreeBSD: src/sys/dev/drm/drm_scatter.h,v 1.4 2003/03/09 02:08:28 anholt Exp $
  */
 
-#define __NO_VERSION__
-#include <linux/config.h>
-#include <linux/vmalloc.h>
 #include "drmP.h"
 
 #define DEBUG_SCATTER 0
 
+#if __REALLY_HAVE_SG
+
 void DRM(sg_cleanup)( drm_sg_mem_t *entry )
 {
-	struct page *page;
-	int i;
-
-	for ( i = 0 ; i < entry->pages ; i++ ) {
-		page = entry->pagelist[i];
-		if ( page )
-			ClearPageReserved( page );
-	}
-
-	vfree( entry->virtual );
+	free( entry->virtual, DRM(M_DRM) );
 
 	DRM(free)( entry->busaddr,
 		   entry->pages * sizeof(*entry->busaddr),
 		   DRM_MEM_PAGES );
-	DRM(free)( entry->pagelist,
-		   entry->pages * sizeof(*entry->pagelist),
-		   DRM_MEM_PAGES );
 	DRM(free)( entry,
 		   sizeof(*entry),
 		   DRM_MEM_SGLISTS );
 }
 
-int DRM(sg_alloc)( struct inode *inode, struct file *filp,
-		   unsigned int cmd, unsigned long arg )
+int DRM(sg_alloc)( DRM_IOCTL_ARGS )
 {
-	drm_file_t *priv = filp->private_data;
-	drm_device_t *dev = priv->dev;
+	DRM_DEVICE;
 	drm_scatter_gather_t request;
 	drm_sg_mem_t *entry;
-	unsigned long pages, i, j;
-	pgd_t *pgd;
-	pmd_t *pmd;
-	pte_t *pte;
+	unsigned long pages;
 
 	DRM_DEBUG( "%s\n", __FUNCTION__ );
 
 	if ( dev->sg )
-		return -EINVAL;
+		return EINVAL;
 
-	if ( copy_from_user( &request,
-			     (drm_scatter_gather_t *)arg,
-			     sizeof(request) ) )
-		return -EFAULT;
+	DRM_COPY_FROM_USER_IOCTL(request, (drm_scatter_gather_t *)data,
+			     sizeof(request) );
 
 	entry = DRM(alloc)( sizeof(*entry), DRM_MEM_SGLISTS );
 	if ( !entry )
-		return -ENOMEM;
+		return ENOMEM;
 
-   	memset( entry, 0, sizeof(*entry) );
+   	bzero( entry, sizeof(*entry) );
 
-	pages = (request.size + PAGE_SIZE - 1) / PAGE_SIZE;
+	pages = round_page(request.size) / PAGE_SIZE;
 	DRM_DEBUG( "sg size=%ld pages=%ld\n", request.size, pages );
 
 	entry->pages = pages;
-	entry->pagelist = DRM(alloc)( pages * sizeof(*entry->pagelist),
-				     DRM_MEM_PAGES );
-	if ( !entry->pagelist ) {
-		DRM(free)( entry, sizeof(*entry), DRM_MEM_SGLISTS );
-		return -ENOMEM;
-	}
 
 	entry->busaddr = DRM(alloc)( pages * sizeof(*entry->busaddr),
 				     DRM_MEM_PAGES );
 	if ( !entry->busaddr ) {
-		DRM(free)( entry->pagelist,
-			   entry->pages * sizeof(*entry->pagelist),
-			   DRM_MEM_PAGES );
 		DRM(free)( entry,
 			   sizeof(*entry),
 			   DRM_MEM_SGLISTS );
-		return -ENOMEM;
+		return ENOMEM;
 	}
-	memset( (void *)entry->busaddr, 0, pages * sizeof(*entry->busaddr) );
+	bzero( (void *)entry->busaddr, pages * sizeof(*entry->busaddr) );
 
-	entry->virtual = vmalloc_32( pages << PAGE_SHIFT );
+	entry->virtual = malloc( pages << PAGE_SHIFT, DRM(M_DRM), M_WAITOK );
 	if ( !entry->virtual ) {
 		DRM(free)( entry->busaddr,
 			   entry->pages * sizeof(*entry->busaddr),
 			   DRM_MEM_PAGES );
-		DRM(free)( entry->pagelist,
-			   entry->pages * sizeof(*entry->pagelist),
-			   DRM_MEM_PAGES );
 		DRM(free)( entry,
 			   sizeof(*entry),
 			   DRM_MEM_SGLISTS );
-		return -ENOMEM;
+		return ENOMEM;
 	}
 
-	/* This also forces the mapping of COW pages, so our page list
-	 * will be valid.  Please don't remove it...
-	 */
-	memset( entry->virtual, 0, pages << PAGE_SHIFT );
+	bzero( entry->virtual, pages << PAGE_SHIFT );
 
 	entry->handle = (unsigned long)entry->virtual;
 
 	DRM_DEBUG( "sg alloc handle  = %08lx\n", entry->handle );
 	DRM_DEBUG( "sg alloc virtual = %p\n", entry->virtual );
 
-	for ( i = entry->handle, j = 0 ; j < pages ; i += PAGE_SIZE, j++ ) {
-		pgd = pgd_offset_k( i );
-		if ( !pgd_present( *pgd ) )
-			goto failed;
-
-		pmd = pmd_offset( pgd, i );
-		if ( !pmd_present( *pmd ) )
-			goto failed;
-
-		pte = pte_offset( pmd, i );
-		if ( !pte_present( *pte ) )
-			goto failed;
-
-		entry->pagelist[j] = pte_page( *pte );
-
-		SetPageReserved( entry->pagelist[j] );
-	}
-
 	request.handle = entry->handle;
 
-	if ( copy_to_user( (drm_scatter_gather_t *)arg,
-			   &request,
-			   sizeof(request) ) ) {
-		DRM(sg_cleanup)( entry );
-		return -EFAULT;
-	}
+	DRM_COPY_TO_USER_IOCTL( (drm_scatter_gather_t *)data,
+			   request,
+			   sizeof(request) );
 
 	dev->sg = entry;
 
-#if DEBUG_SCATTER
-	/* Verify that each page points to its virtual address, and vice
-	 * versa.
-	 */
-	{
-	int error = 0;
-
-	for ( i = 0 ; i < pages ; i++ ) {
-		unsigned long *tmp;
-
-		tmp = page_address( entry->pagelist[i] );
-		for ( j = 0 ;
-		      j < PAGE_SIZE / sizeof(unsigned long) ;
-		      j++, tmp++ ) {
-			*tmp = 0xcafebabe;
-		}
-		tmp = (unsigned long *)((u8 *)entry->virtual +
-					(PAGE_SIZE * i));
-		for( j = 0 ;
-		     j < PAGE_SIZE / sizeof(unsigned long) ;
-		     j++, tmp++ ) {
-			if ( *tmp != 0xcafebabe && error == 0 ) {
-				error = 1;
-				DRM_ERROR( "Scatter allocation error, "
-					   "pagelist does not match "
-					   "virtual mapping\n" );
-			}
-		}
-		tmp = page_address( entry->pagelist[i] );
-		for(j = 0 ;
-		    j < PAGE_SIZE / sizeof(unsigned long) ;
-		    j++, tmp++) {
-			*tmp = 0;
-		}
-	}
-	if (error == 0)
-		DRM_ERROR( "Scatter allocation matches pagelist\n" );
-	}
-#endif
-
 	return 0;
 
- failed:
 	DRM(sg_cleanup)( entry );
-	return -ENOMEM;
+	return ENOMEM;
 }
 
-int DRM(sg_free)( struct inode *inode, struct file *filp,
-		 unsigned int cmd, unsigned long arg )
+int DRM(sg_free)( DRM_IOCTL_ARGS )
 {
-	drm_file_t *priv = filp->private_data;
-	drm_device_t *dev = priv->dev;
+	DRM_DEVICE;
 	drm_scatter_gather_t request;
 	drm_sg_mem_t *entry;
 
-	if ( copy_from_user( &request,
-			     (drm_scatter_gather_t *)arg,
-			     sizeof(request) ) )
-		return -EFAULT;
+	DRM_COPY_FROM_USER_IOCTL( request, (drm_scatter_gather_t *)data,
+			     sizeof(request) );
 
 	entry = dev->sg;
 	dev->sg = NULL;
 
 	if ( !entry || entry->handle != request.handle )
-		return -EINVAL;
+		return EINVAL;
 
 	DRM_DEBUG( "sg free virtual  = %p\n", entry->virtual );
 
@@ -235,3 +136,16 @@ int DRM(sg_free)( struct inode *inode, struct file *filp,
 
 	return 0;
 }
+
+#else /* __REALLY_HAVE_SG */
+
+int DRM(sg_alloc)( DRM_IOCTL_ARGS )
+{
+	return DRM_ERR(EINVAL);
+}
+int DRM(sg_free)( DRM_IOCTL_ARGS )
+{
+	return DRM_ERR(EINVAL);
+}
+
+#endif
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_sysctl.h b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_sysctl.h
index 02e4b28da..2ca187d8c 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_sysctl.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_sysctl.h
@@ -1,13 +1,16 @@
-SYSCTL_NODE(_hw, OID_AUTO, dri, CTLFLAG_RW, 0, "DRI Graphics");
+/*
+ * $FreeBSD: src/sys/dev/drm/drm_sysctl.h,v 1.2 2003/03/09 02:08:28 anholt Exp $
+ */
+
+#ifdef __FreeBSD__
+
+#include <sys/sysctl.h>
 
 static int	   DRM(name_info)DRM_SYSCTL_HANDLER_ARGS;
 static int	   DRM(vm_info)DRM_SYSCTL_HANDLER_ARGS;
 static int	   DRM(clients_info)DRM_SYSCTL_HANDLER_ARGS;
 static int	   DRM(queues_info)DRM_SYSCTL_HANDLER_ARGS;
 static int	   DRM(bufs_info)DRM_SYSCTL_HANDLER_ARGS;
-#if DRM_DEBUG_CODExx
-static int	   DRM(vma_info)DRM_SYSCTL_HANDLER_ARGS;
-#endif
 #if DRM_DMA_HISTOGRAM
 static int	   DRM(histo_info)DRM_SYSCTL_HANDLER_ARGS;
 #endif
@@ -22,9 +25,6 @@ struct DRM(sysctl_list) {
 	{ "clients", DRM(clients_info) },
 	{ "queues",  DRM(queues_info)  },
 	{ "bufs",    DRM(bufs_info)    },
-#if DRM_DEBUG_CODExx
-	{ "vma",     DRM(vma_info)     },
-#endif
 #if DRM_DMA_HISTOGRAM
 	{ "histo",   drm_histo_info)   },
 #endif
@@ -32,8 +32,7 @@ struct DRM(sysctl_list) {
 #define DRM_SYSCTL_ENTRIES (sizeof(DRM(sysctl_list))/sizeof(DRM(sysctl_list)[0]))
 
 struct drm_sysctl_info {
-	struct sysctl_oid      oids[DRM_SYSCTL_ENTRIES + 1];
-	struct sysctl_oid_list list;
+	struct sysctl_ctx_list ctx;
 	char		       name[2];
 };
 
@@ -41,65 +40,62 @@ int DRM(sysctl_init)(drm_device_t *dev)
 {
 	struct drm_sysctl_info *info;
 	struct sysctl_oid *oid;
-	struct sysctl_oid *top;
+	struct sysctl_oid *top, *drioid;
 	int		  i;
 
-	/* Find the next free slot under hw.graphics */
+	info = DRM(alloc)(sizeof *info, DRM_MEM_DRIVER);
+	if ( !info )
+		return 1;
+	bzero(info, sizeof *info);
+	dev->sysctl = info;
+
+	/* Add the sysctl node for DRI if it doesn't already exist */
+	drioid = SYSCTL_ADD_NODE( &info->ctx, &sysctl__hw_children, OID_AUTO, "dri", CTLFLAG_RW, NULL, "DRI Graphics");
+	if (!drioid)
+		return 1;
+
+	/* Find the next free slot under hw.dri */
 	i = 0;
-	SLIST_FOREACH(oid, &sysctl__hw_dri_children, oid_link) {
+	SLIST_FOREACH(oid, SYSCTL_CHILDREN(drioid), oid_link) {
 		if (i <= oid->oid_arg2)
 			i = oid->oid_arg2 + 1;
 	}
+	if (i>9)
+		return 1;
 	
-	info = DRM(alloc)(sizeof *info, DRM_MEM_DRIVER);
-	dev->sysctl = info;
-
-	/* Construct the node under hw.graphics */
+	/* Add the hw.dri.x for our device */
 	info->name[0] = '0' + i;
 	info->name[1] = 0;
-	oid = &info->oids[DRM_SYSCTL_ENTRIES];
-	bzero(oid, sizeof(*oid));
-	oid->oid_parent = &sysctl__hw_dri_children;
-	oid->oid_number = OID_AUTO;
-	oid->oid_kind = CTLTYPE_NODE | CTLFLAG_RW;
-	oid->oid_arg1 = &info->list;
-	oid->oid_arg2 = i;
-	oid->oid_name = info->name;
-	oid->oid_handler = 0;
-	oid->oid_fmt = "N";
-	SLIST_INIT(&info->list);
-	sysctl_register_oid(oid);
-	top = oid;
-
+	top = SYSCTL_ADD_NODE( &info->ctx, SYSCTL_CHILDREN(drioid), OID_AUTO, info->name, CTLFLAG_RW, NULL, NULL);
+	if (!top)
+		return 1;
+	
 	for (i = 0; i < DRM_SYSCTL_ENTRIES; i++) {
-		oid = &info->oids[i];
-		bzero(oid, sizeof(*oid));
-		oid->oid_parent = top->oid_arg1;
-		oid->oid_number = OID_AUTO;
-		oid->oid_kind = CTLTYPE_INT | CTLFLAG_RD;
-		oid->oid_arg1 = dev;
-		oid->oid_arg2 = 0;
-		oid->oid_name = DRM(sysctl_list)[i].name;
-		oid->oid_handler = DRM(sysctl_list[)i].f;
-		oid->oid_fmt = "A";
-		sysctl_register_oid(oid);
+		oid = sysctl_add_oid( &info->ctx, 
+			SYSCTL_CHILDREN(top), 
+			OID_AUTO, 
+			DRM(sysctl_list)[i].name, 
+			CTLTYPE_INT | CTLFLAG_RD, 
+			dev, 
+			0, 
+			DRM(sysctl_list)[i].f, 
+			"A", 
+			NULL);
+		if (!oid)
+			return 1;
 	}
-
 	return 0;
 }
 
 int DRM(sysctl_cleanup)(drm_device_t *dev)
 {
-	int i;
-
-	DRM_DEBUG("dev->sysctl=%p\n", dev->sysctl);
-	for (i = 0; i < DRM_SYSCTL_ENTRIES + 1; i++)
-		sysctl_unregister_oid(&dev->sysctl->oids[i]);
+	int error;
+	error = sysctl_ctx_free( &dev->sysctl->ctx );
 
 	DRM(free)(dev->sysctl, sizeof *dev->sysctl, DRM_MEM_DRIVER);
 	dev->sysctl = NULL;
 
-	return 0;
+	return error;
 }
 
 static int DRM(name_info)DRM_SYSCTL_HANDLER_ARGS
@@ -123,7 +119,7 @@ static int DRM(name_info)DRM_SYSCTL_HANDLER_ARGS
 static int DRM(_vm_info)DRM_SYSCTL_HANDLER_ARGS
 {
 	drm_device_t *dev = arg1;
-	drm_map_t    *map;
+	drm_local_map_t    *map;
 	drm_map_list_entry_t    *listentry;
 	const char   *types[] = { "FB", "REG", "SHM" };
 	const char   *type;
@@ -166,9 +162,9 @@ static int DRM(vm_info)DRM_SYSCTL_HANDLER_ARGS
 	drm_device_t *dev = arg1;
 	int	     ret;
 
-	DRM_OS_LOCK;
+	DRM_LOCK;
 	ret = DRM(_vm_info)(oidp, arg1, arg2, req);
-	DRM_OS_UNLOCK;
+	DRM_UNLOCK;
 
 	return ret;
 }
@@ -189,8 +185,8 @@ static int DRM(_queues_info)DRM_SYSCTL_HANDLER_ARGS
 		q = dev->queuelist[i];
 		atomic_inc(&q->use_count);
 		DRM_SYSCTL_PRINT_RET(atomic_dec(&q->use_count),
-				     "%5d/0x%03x %5ld %5ld"
-				     " %5ld/%c%c/%c%c%c %5d %10ld %10ld %10ld\n",
+				     "%5d/0x%03x %5d %5d"
+				     " %5d/%c%c/%c%c%c %5d %10d %10d %10d\n",
 				     i,
 				     q->flags,
 				     atomic_read(&q->use_count),
@@ -201,7 +197,7 @@ static int DRM(_queues_info)DRM_SYSCTL_HANDLER_ARGS
 				     q->read_queue ? 'r':'-',
 				     q->write_queue ? 'w':'-',
 				     q->flush_queue ? 'f':'-',
-				     DRM_BUFCOUNT(&q->waitlist),
+				     (int)DRM_BUFCOUNT(&q->waitlist),
 				     atomic_read(&q->total_flushed),
 				     atomic_read(&q->total_queued),
 				     atomic_read(&q->total_locks));
@@ -217,9 +213,9 @@ static int DRM(queues_info) DRM_SYSCTL_HANDLER_ARGS
 	drm_device_t *dev = arg1;
 	int	     ret;
 
-	DRM_OS_LOCK;
+	DRM_LOCK;
 	ret = DRM(_queues_info)(oidp, arg1, arg2, req);
-	DRM_OS_UNLOCK;
+	DRM_UNLOCK;
 	return ret;
 }
 
@@ -238,7 +234,7 @@ static int DRM(_bufs_info) DRM_SYSCTL_HANDLER_ARGS
 	DRM_SYSCTL_PRINT(" o     size count  free	 segs pages    kB\n\n");
 	for (i = 0; i <= DRM_MAX_ORDER; i++) {
 		if (dma->bufs[i].buf_count)
-			DRM_SYSCTL_PRINT("%2d %8d %5d %5ld %5d %5d %5d\n",
+			DRM_SYSCTL_PRINT("%2d %8d %5d %5d %5d %5d %5d\n",
 				       i,
 				       dma->bufs[i].buf_size,
 				       dma->bufs[i].buf_count,
@@ -267,9 +263,9 @@ static int DRM(bufs_info) DRM_SYSCTL_HANDLER_ARGS
 	drm_device_t *dev = arg1;
 	int	     ret;
 
-	DRM_OS_LOCK;
+	DRM_LOCK;
 	ret = DRM(_bufs_info)(oidp, arg1, arg2, req);
-	DRM_OS_UNLOCK;
+	DRM_UNLOCK;
 	return ret;
 }
 
@@ -301,97 +297,11 @@ static int DRM(clients_info)DRM_SYSCTL_HANDLER_ARGS
 	drm_device_t *dev = arg1;
 	int	     ret;
 
-	DRM_OS_LOCK;
+	DRM_LOCK;
 	ret = DRM(_clients_info)(oidp, arg1, arg2, req);
-	DRM_OS_UNLOCK;
-	return ret;
-}
-
-#if DRM_DEBUG_CODExx
-
-static int DRM(_vma_info)DRM_SYSCTL_HANDLER_ARGS
-{
-	drm_device_t	      *dev = arg1;
-	drm_vma_entry_t	      *pt;
-	pgd_t		      *pgd;
-	pmd_t		      *pmd;
-	pte_t		      *pte;
-	unsigned long	      i;
-	struct vm_area_struct *vma;
-	unsigned long	      address;
-#if defined(__i386__)
-	unsigned int	      pgprot;
-#endif
-	char		      buf[128];
-	int		      error;
-
-	DRM_SYSCTL_PRINT("vma use count: %d, high_memory = %p, 0x%08lx\n",
-		       atomic_read(&dev->vma_count),
-		       high_memory, virt_to_phys(high_memory));
-	for (pt = dev->vmalist; pt; pt = pt->next) {
-		if (!(vma = pt->vma)) continue;
-		DRM_SYSCTL_PRINT("\n%5d 0x%08lx-0x%08lx %c%c%c%c%c%c 0x%08lx",
-			       pt->pid,
-			       vma->vm_start,
-			       vma->vm_end,
-			       vma->vm_flags & VM_READ	   ? 'r' : '-',
-			       vma->vm_flags & VM_WRITE	   ? 'w' : '-',
-			       vma->vm_flags & VM_EXEC	   ? 'x' : '-',
-			       vma->vm_flags & VM_MAYSHARE ? 's' : 'p',
-			       vma->vm_flags & VM_LOCKED   ? 'l' : '-',
-			       vma->vm_flags & VM_IO	   ? 'i' : '-',
-			       vma->vm_offset );
-#if defined(__i386__)
-		pgprot = pgprot_val(vma->vm_page_prot);
-		DRM_SYSCTL_PRINT(" %c%c%c%c%c%c%c%c%c",
-			       pgprot & _PAGE_PRESENT  ? 'p' : '-',
-			       pgprot & _PAGE_RW       ? 'w' : 'r',
-			       pgprot & _PAGE_USER     ? 'u' : 's',
-			       pgprot & _PAGE_PWT      ? 't' : 'b',
-			       pgprot & _PAGE_PCD      ? 'u' : 'c',
-			       pgprot & _PAGE_ACCESSED ? 'a' : '-',
-			       pgprot & _PAGE_DIRTY    ? 'd' : '-',
-			       pgprot & _PAGE_4M       ? 'm' : 'k',
-			       pgprot & _PAGE_GLOBAL   ? 'g' : 'l' );
-#endif		
-		DRM_SYSCTL_PRINT("\n");
-		for (i = vma->vm_start; i < vma->vm_end; i += PAGE_SIZE) {
-			pgd = pgd_offset(vma->vm_mm, i);
-			pmd = pmd_offset(pgd, i);
-			pte = pte_offset(pmd, i);
-			if (pte_present(*pte)) {
-				address = __pa(pte_page(*pte))
-					+ (i & (PAGE_SIZE-1));
-				DRM_SYSCTL_PRINT("      0x%08lx -> 0x%08lx"
-					       " %c%c%c%c%c\n",
-					       i,
-					       address,
-					       pte_read(*pte)  ? 'r' : '-',
-					       pte_write(*pte) ? 'w' : '-',
-					       pte_exec(*pte)  ? 'x' : '-',
-					       pte_dirty(*pte) ? 'd' : '-',
-					       pte_young(*pte) ? 'a' : '-' );
-			} else {
-				DRM_SYSCTL_PRINT("      0x%08lx\n", i);
-			}
-		}
-	}
-	
-	SYSCTL_OUT(req, "", 1);
-	return 0;
-}
-
-static int DRM(vma_info)DRM_SYSCTL_HANDLER_ARGS
-{
-	drm_device_t *dev = arg1;
-	int	     ret;
-
-	DRM_OS_LOCK;
-	ret = DRM(_vma_info)(oidp, arg1, arg2, req);
-	DRM_OS_UNLOCK;
+	DRM_UNLOCK;
 	return ret;
 }
-#endif
 
 
 #if DRM_DMA_HISTOGRAM
@@ -515,9 +425,22 @@ static int DRM(histo_info)DRM_SYSCTL_HANDLER_ARGS
 	drm_device_t *dev = arg1;
 	int	     ret;
 
-	DRM_OS_LOCK;
+	DRM_LOCK;
 	ret = _drm_histo_info(oidp, arg1, arg2, req);
-	DRM_OS_UNLOCK;
+	DRM_UNLOCK;
 	return ret;
 }
 #endif
+
+#elif defined(__NetBSD__)
+/* stub it out for now, sysctl is only for debugging */
+int DRM(sysctl_init)(drm_device_t *dev)
+{
+	return 0;
+}
+
+int DRM(sysctl_cleanup)(drm_device_t *dev)
+{
+	return 0;
+}
+#endif
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_vm.h b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_vm.h
index a06fb448a..1ce0efab3 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_vm.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_vm.h
@@ -1,9 +1,17 @@
-#include <vm/vm.h>
-#include <vm/pmap.h>
+/*
+ * $FreeBSD: src/sys/dev/drm/drm_vm.h,v 1.4 2003/03/09 02:08:28 anholt Exp $
+ */
 
+#if defined(__FreeBSD__) && __FreeBSD_version >= 500102
+static int DRM(dma_mmap)(dev_t kdev, vm_offset_t offset, vm_offset_t *paddr, 
+    int prot)
+#elif defined(__FreeBSD__)
 static int DRM(dma_mmap)(dev_t kdev, vm_offset_t offset, int prot)
+#elif defined(__NetBSD__)
+static paddr_t DRM(dma_mmap)(dev_t kdev, vm_offset_t offset, int prot)
+#endif
 {
-	drm_device_t	 *dev	 = kdev->si_drv1;
+	DRM_DEVICE;
 	drm_device_dma_t *dma	 = dev->dma;
 	unsigned long	 physical;
 	unsigned long	 page;
@@ -14,32 +22,47 @@ static int DRM(dma_mmap)(dev_t kdev, vm_offset_t offset, int prot)
 	page	 = offset >> PAGE_SHIFT;
 	physical = dma->pagelist[page];
 
-	DRM_DEBUG("0x%08x (page %lu) => 0x%08lx\n", offset, page, physical);
+	DRM_DEBUG("0x%08lx (page %lu) => 0x%08lx\n", (long)offset, page, physical);
+#if defined(__FreeBSD__) && __FreeBSD_version >= 500102
+	*paddr = physical;
+	return 0;
+#else
 	return atop(physical);
+#endif
 }
 
+#if defined(__FreeBSD__) && __FreeBSD_version >= 500102
+int DRM(mmap)(dev_t kdev, vm_offset_t offset, vm_offset_t *paddr, 
+    int prot)
+#elif defined(__FreeBSD__)
 int DRM(mmap)(dev_t kdev, vm_offset_t offset, int prot)
+#elif defined(__NetBSD__)
+paddr_t DRM(mmap)(dev_t kdev, off_t offset, int prot)
+#endif
 {
-	drm_device_t	*dev	= kdev->si_drv1;
-	drm_map_t	*map	= NULL;
+	DRM_DEVICE;
+	drm_local_map_t *map	= NULL;
 	drm_map_list_entry_t *listentry=NULL;
-	/*drm_file_t *priv;*/
+	drm_file_t *priv;
 
 /*	DRM_DEBUG("offset = 0x%x\n", offset);*/
 
-	/*XXX Fixme */
-	/*priv = DRM(find_file_by_proc)(dev, p);
+	priv = DRM(find_file_by_proc)(dev, DRM_CURPROC);
 	if (!priv) {
 		DRM_DEBUG("can't find authenticator\n");
 		return EINVAL;
 	}
 
-	if (!priv->authenticated) DRM_OS_RETURN(EACCES);*/
+	if (!priv->authenticated) return DRM_ERR(EACCES);
 
 	if (dev->dma
 	    && offset >= 0
 	    && offset < ptoa(dev->dma->page_count))
+#if defined(__FreeBSD__) && __FreeBSD_version >= 500102
+		return DRM(dma_mmap)(kdev, offset, paddr, prot);
+#else
 		return DRM(dma_mmap)(kdev, offset, prot);
+#endif
 
 				/* A sequential search of a linked list is
 				   fine here because: 1) there will only be
@@ -59,7 +82,7 @@ int DRM(mmap)(dev_t kdev, vm_offset_t offset, int prot)
 		DRM_DEBUG("can't find map\n");
 		return -1;
 	}
-	if (((map->flags&_DRM_RESTRICTED) && suser(curproc))) {
+	if (((map->flags&_DRM_RESTRICTED) && DRM_SUSER(DRM_CURPROC))) {
 		DRM_DEBUG("restricted map\n");
 		return -1;
 	}
@@ -68,9 +91,20 @@ int DRM(mmap)(dev_t kdev, vm_offset_t offset, int prot)
 	case _DRM_FRAME_BUFFER:
 	case _DRM_REGISTERS:
 	case _DRM_AGP:
+#if defined(__FreeBSD__) && __FreeBSD_version >= 500102
+		*paddr = offset;
+		return 0;
+#else
 		return atop(offset);
+#endif
+	case _DRM_SCATTER_GATHER:
 	case _DRM_SHM:
+#if defined(__FreeBSD__) && __FreeBSD_version >= 500102
+		*paddr = vtophys(offset);
+		return 0;
+#else
 		return atop(vtophys(offset));
+#endif
 	default:
 		return -1;	/* This should never happen. */
 	}
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/gamma/Makefile b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/gamma/Makefile
deleted file mode 100644
index 97bb1b69c..000000000
--- a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/gamma/Makefile
+++ /dev/null
@@ -1,25 +0,0 @@
-# $FreeBSD$
-
-KMOD	= gamma
-NOMAN=	YES
-SRCS    = gamma_drv.c gamma_dma.c
-SRCS   += device_if.h bus_if.h pci_if.h opt_drm_linux.h
-CFLAGS += ${DEBUG_FLAGS} -I. -I..
-
-@:
-	ln -sf /sys @
-
-machine:
-	ln -sf /sys/i386/include machine
-
-.if ${MACHINE_ARCH} == "i386"
-# This line enables linux ioctl handling
-# If you want support for this uncomment this line
-#TDFX_OPTS=     "\#define DRM_LINUX" 1
-.endif
-
-opt_drm_linux.h:
-	touch opt_drm_linux.h
-	echo $(TDFX_OPTS) >> opt_drm_linux.h
-
-.include <bsd.kmod.mk>
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/mga_drv.c b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/mga_drv.c
new file mode 100644
index 000000000..de0387f71
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/mga_drv.c
@@ -0,0 +1,70 @@
+/* mga_drv.c -- Matrox G200/G400 driver -*- linux-c -*-
+ * Created: Mon Dec 13 01:56:22 1999 by jhartmann@precisioninsight.com
+ *
+ * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
+ * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ *    Rickard E. (Rik) Faith <faith@valinux.com>
+ *    Gareth Hughes <gareth@valinux.com>
+ *
+ * $FreeBSD: src/sys/dev/drm/mga_drv.c,v 1.4 2003/03/09 02:08:28 anholt Exp $
+ */
+
+#include "mga.h"
+#include "drmP.h"
+#include "drm.h"
+#include "mga_drm.h"
+#include "mga_drv.h"
+
+/* List acquired from http://www.yourvote.com/pci/pcihdr.h and xc/xc/programs/Xserver/hw/xfree86/common/xf86PciInfo.h
+ * Please report to anholt@teleport.com inaccuracies or if a chip you have works that is marked unsupported here.
+ */
+drm_chipinfo_t DRM(devicelist)[] = {
+	{0x102b, 0x0520, 0, "Matrox G200 (PCI)"},
+	{0x102b, 0x0521, 1, "Matrox G200 (AGP)"},
+	{0x102b, 0x0525, 1, "Matrox G400/G450 (AGP)"},
+	{0x102b, 0x2527, 1, "Matrox G550 (AGP)"},
+	{0, 0, 0, NULL}
+};
+
+#include "drm_agpsupport.h"
+#include "drm_auth.h"
+#include "drm_bufs.h"
+#include "drm_context.h"
+#include "drm_dma.h"
+#include "drm_drawable.h"
+#include "drm_drv.h"
+#include "drm_fops.h"
+#include "drm_init.h"
+#include "drm_ioctl.h"
+#include "drm_lock.h"
+#include "drm_memory.h"
+#include "drm_vm.h"
+#include "drm_sysctl.h"
+
+#ifdef __FreeBSD__
+DRIVER_MODULE(mga, pci, mga_driver, mga_devclass, 0, 0);
+#elif defined(__NetBSD__)
+CFDRIVER_DECL(mga, DV_TTY, NULL);
+#endif
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/r128_drv.c b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/r128_drv.c
new file mode 100644
index 000000000..28a2c85e7
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/r128_drv.c
@@ -0,0 +1,89 @@
+/* r128_drv.c -- ATI Rage 128 driver -*- linux-c -*-
+ * Created: Mon Dec 13 09:47:27 1999 by faith@precisioninsight.com
+ *
+ * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
+ * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ *    Rickard E. (Rik) Faith <faith@valinux.com>
+ *    Gareth Hughes <gareth@valinux.com>
+ *
+ * $FreeBSD: src/sys/dev/drm/r128_drv.c,v 1.4 2003/03/09 02:08:28 anholt Exp $
+ */
+
+#include "r128.h"
+#include "drmP.h"
+#include "drm.h"
+#include "r128_drm.h"
+#include "r128_drv.h"
+#if __REALLY_HAVE_SG
+#include "ati_pcigart.h"
+#endif
+
+/* List acquired from http://www.yourvote.com/pci/pcihdr.h and xc/xc/programs/Xserver/hw/xfree86/common/xf86PciInfo.h
+ * Please report to eta@lclark.edu inaccuracies or if a chip you have works that is marked unsupported here.
+ */
+drm_chipinfo_t DRM(devicelist)[] = {
+	{0x1002, 0x4c45, __REALLY_HAVE_SG, "ATI Rage 128 Mobility LE (PCI)"},
+	{0x1002, 0x4c46, 1, "ATI Rage 128 Mobility LF (AGP)"},
+	{0x1002, 0x4d46, 1, "ATI Rage 128 Mobility MF (AGP)"},
+	{0x1002, 0x4d4c, 1, "ATI Rage 128 Mobility ML (AGP)"},
+	{0x1002, 0x5044, __REALLY_HAVE_SG, "ATI Rage 128 Pro PD (PCI)"},
+	{0x1002, 0x5046, 1, "ATI Rage 128 Pro PF (AGP)"},
+	{0x1002, 0x5050, __REALLY_HAVE_SG, "ATI Rage 128 Pro PP (PCI)"},
+	{0x1002, 0x5052, __REALLY_HAVE_SG, "ATI Rage 128 Pro PR (PCI)"},
+	{0x1002, 0x5245, __REALLY_HAVE_SG, "ATI Rage 128 RE (PCI)"},
+	{0x1002, 0x5246, 1, "ATI Rage 128 RF (AGP)"},
+	{0x1002, 0x5247, 1, "ATI Rage 128 RG (AGP)"},
+	{0x1002, 0x524b, __REALLY_HAVE_SG, "ATI Rage 128 RK (PCI)"},
+	{0x1002, 0x524c, 1, "ATI Rage 128 RL (AGP)"},
+	{0x1002, 0x534d, 1, "ATI Rage 128 SM (AGP)"},
+	{0x1002, 0x5446, 1, "ATI Rage 128 Pro Ultra TF (AGP)"},
+	{0x1002, 0x544C, 1, "ATI Rage 128 Pro Ultra TL (AGP)"},
+	{0x1002, 0x5452, 1, "ATI Rage 128 Pro Ultra TR (AGP)"},
+	{0, 0, 0, NULL}
+};
+
+#include "drm_agpsupport.h"
+#include "drm_auth.h"
+#include "drm_bufs.h"
+#include "drm_context.h"
+#include "drm_dma.h"
+#include "drm_drawable.h"
+#include "drm_drv.h"
+#include "drm_fops.h"
+#include "drm_init.h"
+#include "drm_ioctl.h"
+#include "drm_lock.h"
+#include "drm_memory.h"
+#include "drm_sysctl.h"
+#include "drm_vm.h"
+#if __HAVE_SG
+#include "drm_scatter.h"
+#endif
+
+#ifdef __FreeBSD__
+DRIVER_MODULE(r128, pci, r128_driver, r128_devclass, 0, 0);
+#elif defined(__NetBSD__)
+CFDRIVER_DECL(r128, DV_TTY, NULL);
+#endif /* __FreeBSD__ */
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/radeon_drv.c b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/radeon_drv.c
new file mode 100644
index 000000000..2e7c5d666
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/radeon_drv.c
@@ -0,0 +1,102 @@
+/* radeon_drv.c -- ATI Radeon driver -*- linux-c -*-
+ * Created: Wed Feb 14 17:10:04 2001 by gareth@valinux.com
+ *
+ * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ *    Gareth Hughes <gareth@valinux.com>
+ *
+ * $FreeBSD: src/sys/dev/drm/radeon_drv.c,v 1.5 2003/03/11 01:38:17 anholt Exp $
+ */
+
+#include "radeon.h"
+#include "drmP.h"
+#include "drm.h"
+#include "radeon_drm.h"
+#include "radeon_drv.h"
+#if __REALLY_HAVE_SG
+#include "ati_pcigart.h"
+#endif
+
+drm_chipinfo_t DRM(devicelist)[] = {
+	{0x1002, 0x4242, 1, "ATI Radeon BB R200 AIW 8500DV"},
+	{0x1002, 0x4336, 1, "ATI Radeon Mobility U1"},
+	{0x1002, 0x4964, 1, "ATI Radeon Id R250 9000"},
+	{0x1002, 0x4965, 1, "ATI Radeon Ie R250 9000"},
+	{0x1002, 0x4966, 1, "ATI Radeon If R250 9000"},
+	{0x1002, 0x4967, 1, "ATI Radeon Ig R250 9000"},
+	{0x1002, 0x4C57, 1, "ATI Radeon LW Mobility 7500 M7"},
+	{0x1002, 0x4C58, 1, "ATI Radeon LX RV200 Mobility FireGL 7800 M7"},
+	{0x1002, 0x4C59, 1, "ATI Radeon LY Mobility M6"},
+	{0x1002, 0x4C5A, 1, "ATI Radeon LZ Mobility M6"},
+	{0x1002, 0x4C64, 1, "ATI Radeon Ld R250 Mobility 9000 M9"},
+	{0x1002, 0x4C65, 1, "ATI Radeon Le R250 Mobility 9000 M9"},
+	{0x1002, 0x4C66, 1, "ATI Radeon Lf R250 Mobility 9000 M9"},
+	{0x1002, 0x4C67, 1, "ATI Radeon Lg R250 Mobility 9000 M9"},
+	{0x1002, 0x5144, 1, "ATI Radeon QD R100"},
+	{0x1002, 0x5145, 1, "ATI Radeon QE R100"},
+	{0x1002, 0x5146, 1, "ATI Radeon QF R100"},
+	{0x1002, 0x5147, 1, "ATI Radeon QG R100"},
+	{0x1002, 0x5148, 1, "ATI Radeon QH FireGL 8x00"},
+	{0x1002, 0x5149, 1, "ATI Radeon QI R200"},
+	{0x1002, 0x514A, 1, "ATI Radeon QJ R200"},
+	{0x1002, 0x514B, 1, "ATI Radeon QK R200"},
+	{0x1002, 0x514C, 1, "ATI Radeon QL R200 8500 LE"},
+	{0x1002, 0x514D, 1, "ATI Radeon QM R200 9100"},
+	{0x1002, 0x514E, 1, "ATI Radeon QN R200 8500 LE"},
+	{0x1002, 0x514F, 1, "ATI Radeon QO R200 8500 LE"},
+	{0x1002, 0x5157, 1, "ATI Radeon QW RV200 7500"},
+	{0x1002, 0x5158, 1, "ATI Radeon QX RV200 7500"},
+	{0x1002, 0x5159, 1, "ATI Radeon QY RV100 VE"},
+	{0x1002, 0x515A, 1, "ATI Radeon QZ RV100 VE"},
+	{0x1002, 0x5168, 1, "ATI Radeon Qh R200"},
+	{0x1002, 0x5169, 1, "ATI Radeon Qi R200"},
+	{0x1002, 0x516A, 1, "ATI Radeon Qj R200"},
+	{0x1002, 0x516B, 1, "ATI Radeon Qk R200"},
+	{0x1002, 0x516C, 1, "ATI Radeon Ql R200"},
+	{0, 0, 0, NULL}
+};
+
+#include "drm_agpsupport.h"
+#include "drm_auth.h"
+#include "drm_bufs.h"
+#include "drm_context.h"
+#include "drm_dma.h"
+#include "drm_drawable.h"
+#include "drm_drv.h"
+#include "drm_fops.h"
+#include "drm_init.h"
+#include "drm_ioctl.h"
+#include "drm_lock.h"
+#include "drm_memory.h"
+#include "drm_vm.h"
+#include "drm_sysctl.h"
+#if __HAVE_SG
+#include "drm_scatter.h"
+#endif
+
+#ifdef __FreeBSD__
+DRIVER_MODULE(DRIVER_NAME, pci, DRM(driver), DRM(devclass), 0, 0);
+#elif defined(__NetBSD__)
+CFDRIVER_DECL(radeon, DV_TTY, NULL);
+#endif /* __FreeBSD__ */
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/tdfx_drv.c b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/tdfx_drv.c
new file mode 100644
index 000000000..e10542f14
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/tdfx_drv.c
@@ -0,0 +1,100 @@
+/* tdfx_drv.c -- tdfx driver -*- linux-c -*-
+ * Created: Thu Oct  7 10:38:32 1999 by faith@precisioninsight.com
+ *
+ * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
+ * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ *    Rickard E. (Rik) Faith <faith@valinux.com>
+ *    Daryll Strauss <daryll@valinux.com>
+ *    Gareth Hughes <gareth@valinux.com>
+ *
+ * $FreeBSD: src/sys/dev/drm/tdfx_drv.c,v 1.3 2003/03/09 02:08:28 anholt Exp $
+ */
+
+#include "tdfx.h"
+#include "drmP.h"
+
+#define DRIVER_AUTHOR		"VA Linux Systems Inc."
+
+#define DRIVER_NAME		"tdfx"
+#define DRIVER_DESC		"3dfx Banshee/Voodoo3+"
+#define DRIVER_DATE		"20010216"
+
+#define DRIVER_MAJOR		1
+#define DRIVER_MINOR		0
+#define DRIVER_PATCHLEVEL	0
+
+#ifndef PCI_VENDOR_ID_3DFX
+#define PCI_VENDOR_ID_3DFX 0x121A
+#endif
+#ifndef PCI_DEVICE_ID_3DFX_VOODOO5
+#define PCI_DEVICE_ID_3DFX_VOODOO5 0x0009
+#endif
+#ifndef PCI_DEVICE_ID_3DFX_VOODOO4
+#define PCI_DEVICE_ID_3DFX_VOODOO4 0x0007
+#endif
+#ifndef PCI_DEVICE_ID_3DFX_VOODOO3_3000 /* Voodoo3 3000 */
+#define PCI_DEVICE_ID_3DFX_VOODOO3_3000 0x0005
+#endif
+#ifndef PCI_DEVICE_ID_3DFX_VOODOO3_2000 /* Voodoo3 3000 */
+#define PCI_DEVICE_ID_3DFX_VOODOO3_2000 0x0004
+#endif
+#ifndef PCI_DEVICE_ID_3DFX_BANSHEE
+#define PCI_DEVICE_ID_3DFX_BANSHEE 0x0003
+#endif
+
+/* List acquired from http://www.yourvote.com/pci/pcihdr.h and xc/xc/programs/Xserver/hw/xfree86/common/xf86PciInfo.h
+ * Please report to anholt@teleport.com inaccuracies or if a chip you have works that is marked unsupported here.
+ */
+drm_chipinfo_t DRM(devicelist)[] = {
+	{0x121a, 0x0003, 1, "3dfx Voodoo Banshee"},
+	{0x121a, 0x0004, 1, "3dfx Voodoo3 2000"},
+	{0x121a, 0x0005, 1, "3dfx Voodoo3 3000"},
+	{0x121a, 0x0007, 1, "3dfx Voodoo4"},
+	{0x121a, 0x0009, 1, "3dfx Voodoo5"},
+	{0, 0, 0, NULL}
+};
+
+
+#include "drm_auth.h"
+#include "drm_bufs.h"
+#include "drm_context.h"
+#include "drm_dma.h"
+#include "drm_drawable.h"
+#include "drm_drv.h"
+
+
+#include "drm_fops.h"
+#include "drm_init.h"
+#include "drm_ioctl.h"
+#include "drm_lock.h"
+#include "drm_memory.h"
+#include "drm_vm.h"
+#include "drm_sysctl.h"
+
+#ifdef __FreeBSD__
+DRIVER_MODULE(tdfx, pci, tdfx_driver, tdfx_devclass, 0, 0);
+#elif defined(__NetBSD__)
+CFDRIVER_DECL(tdfx, DV_TTY, NULL);
+#endif /* __FreeBSD__ */
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/ppc_video.c b/xc/programs/Xserver/hw/xfree86/os-support/bsd/ppc_video.c
index 15dbab014..4ec7045e8 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bsd/ppc_video.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/ppc_video.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/ppc_video.c,v 1.1 2002/08/06 13:08:39 herrb Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/ppc_video.c,v 1.3 2002/11/09 17:28:08 herrb Exp $ */
 /*
  * Copyright 1992 by Rich Murphey <Rich@Rice.edu>
  * Copyright 1993 by David Wexelblat <dwex@goblin.org>
@@ -29,13 +29,17 @@
 #include "X.h"
 #include "xf86.h"
 #include "xf86Priv.h"
+
 #include "xf86_OSlib.h"
 #include "xf86OSpriv.h"
 
+#include "bus/Pci.h"
+
 #ifndef MAP_FAILED
 #define MAP_FAILED ((caddr_t)-1)
 #endif
 
+
 /***************************************************************************/
 /* Video Memory Mapping section                                            */
 /***************************************************************************/
@@ -86,27 +90,23 @@ xf86ReadBIOS(unsigned long Base, unsigned long Offset, unsigned char *Buf,
 	     int Len)
 {
 	int rv;
-	int kmem;
+	static int kmem = -1;
 
- 	kmem = open("/dev/kmem", 2);
- 	if (kmem == -1) {
- 		FatalError("xf86ReadBIOS: open /dev/kmem\n");
- 	}
+	if (kmem == -1) {
+		kmem = open("/dev/xf86", 2);
+		if (kmem == -1) {
+			FatalError("xf86ReadBIOS: open /dev/xf86\n");
+		}
+	}
 
 #ifdef DEBUG
-	xf86MsgVerb(X_INFO, 3, "xf86ReadBIOS() %lx %lx, %x", 
+	xf86MsgVerb(X_INFO, 3, "xf86ReadBIOS() %lx %lx, %x\n", 
 		    Base, Offset, Len);
 #endif
 
-	if (Base < 0x80000000) {
-		xf86Msg(X_WARNING, "No VGA");
-		return 0;
-	}
-
 
 	lseek(kmem, Base + Offset, 0);
 	rv = read(kmem, Buf, Len);
-	close(kmem);
 
 	return rv;
 }
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsdi/bsdi_io.c b/xc/programs/Xserver/hw/xfree86/os-support/bsdi/bsdi_io.c
index 434fb8f44..32cba9a7d 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bsdi/bsdi_io.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bsdi/bsdi_io.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsdi/bsdi_io.c,v 3.13 2002/10/11 01:40:34 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsdi/bsdi_io.c,v 3.14 2003/02/17 15:11:56 dawes Exp $ */
 /*
  * Copyright 1992 by Rich Murphey <Rich@Rice.edu>
  * Copyright 1993 by David Dawes <dawes@xfree86.org>
@@ -100,7 +100,7 @@ xf86KbdOff()
 #include "xf86OSKbd.h"
 
 Bool
-xf86OSKbdPreInit(KbdDevPtr pKbd)
+xf86OSKbdPreInit(InputInfoPtr pInfo)
 {
     return FALSE;
 }
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bus/460gxPCI.c b/xc/programs/Xserver/hw/xfree86/os-support/bus/460gxPCI.c
new file mode 100644
index 000000000..4840fd144
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bus/460gxPCI.c
@@ -0,0 +1,451 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/460gxPCI.c,v 1.2 2003/01/10 22:05:45 tsi Exp $ */
+/*
+ * Copyright (C) 2002-2003 The XFree86 Project, Inc.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL THE
+ * XFREE86 PROJECT BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of the XFree86 Project shall
+ * not be used in advertising or otherwise to promote the sale, use or other
+ * dealings in this Software without prior written authorization from the
+ * XFree86 Project.
+ */
+
+/*
+ * This file contains the glue necessary for support of Intel's 460GX chipset.
+ */
+
+#include "460gxPCI.h"
+#include "xf86.h"
+#include "Pci.h"
+
+/* 460GX register definitions */
+/* SAC at 0:10:0 */
+#define CBN		0x0040
+/* SAC at CBN:0:0 */
+#define DEVNPRES	0x0070
+/* SAC at CBN:1[0-7]:0 */
+#define BUSNO		0x0048
+#define SUBNO		0x0049
+#define VGASE		0x0080
+#define PCIS		0x0084
+#define IOR		0x008C
+#define IORD		0x008E	/* CBN:10:0 only */
+/* PXB at CBN:1[0-7]:1 */
+#define ERRCMD		0x0046
+
+static int cbn_460gx = -1;
+static CARD32 cbdevs_460gx = 0;
+static CARD16 iord_460gx;
+static int busno_460gx[8], subno_460gx[8];
+static CARD8 pcis_460gx[8], ior_460gx[8];
+static CARD8 has_err_460gx[8], err_460gx[8];
+static CARD8 iomap_460gx[16];		/* One for each 4k */
+static pciBusFuncs_t BusFuncs_460gx;
+
+static pciConfigPtr
+Verify460GXBus(int bus)
+{
+    pciConfigPtr pPCI;
+
+    if ((bus < 0) || (bus >= pciNumBuses) ||
+	!pciBusInfo[bus] || !(pPCI = pciBusInfo[bus]->bridge) ||
+	(pPCI->busnum != cbn_460gx) || (pPCI->funcnum != 0) ||
+	(pPCI->devnum < 0x10) || (pPCI->devnum > 0x17))
+	return NULL;
+
+    return pPCI;
+}
+
+/*
+ * This function is called to emulate the various settings in a P2P or CardBus
+ * bridge's control register using one of a 460GX's SAC host bridges.
+ */
+static CARD16
+Control460GXBridge(int bus, CARD16 mask, CARD16 value)
+{
+    pciConfigPtr pPCI;
+    PCITAG tag;
+    CARD16 current = 0;
+    CARD8  tmp;
+
+    if ((pPCI = Verify460GXBus(bus))) {
+	/* Start with VGA enablement */
+	tmp = pciReadByte(pPCI->tag, VGASE);
+	if (tmp & 0x01) {
+	    current |= PCI_PCI_BRIDGE_VGA_EN;
+	    if ((mask & PCI_PCI_BRIDGE_VGA_EN) &&
+		!(value & PCI_PCI_BRIDGE_VGA_EN))
+		pciWriteByte(pPCI->tag, VGASE, tmp & ~0x01);
+	} else {
+	    if (mask & value & PCI_PCI_BRIDGE_VGA_EN)
+		pciWriteByte(pPCI->tag, VGASE, tmp | 0x01);
+	}
+
+	/* Move on to master abort failure enablement */
+	if (has_err_460gx[pPCI->devnum - 0x10]) {
+	    tag = PCI_MAKE_TAG(pPCI->busnum, pPCI->devnum, pPCI->funcnum + 1);
+	    tmp = pciReadByte(tag, ERRCMD);
+	    if (tmp & 0x01) {
+		current |= PCI_PCI_BRIDGE_MASTER_ABORT_EN;
+		if ((mask & PCI_PCI_BRIDGE_MASTER_ABORT_EN) &&
+		    !(value & PCI_PCI_BRIDGE_MASTER_ABORT_EN))
+		    pciWriteByte(tag, ERRCMD, tmp & ~0x01);
+	    } else {
+		if (mask & value & PCI_PCI_BRIDGE_MASTER_ABORT_EN)
+		    pciWriteByte(tag, ERRCMD, tmp | 0x01);
+	    }
+	}
+
+	/* Put emulation of any other P2P bridge control here */
+    }
+
+    return (current & ~mask) | (value & mask);
+}
+
+/*
+ * Retrieve various bus numbers representing the connections provided by 460GX
+ * host bridges.
+ */
+static void
+Get460GXBridgeBusses(int bus, int *primary, int *secondary, int *subordinate)
+{
+    pciConfigPtr pPCI = Verify460GXBus(bus);
+    int i;
+
+    /* The returned bus numbers are initialised by the caller */
+
+    if (!pPCI)
+	return;
+
+    i = pPCI->devnum - 0x10;
+
+    /* These are not modified, so no need to re-read them */
+    if (primary)
+	*primary = pPCI->busnum;
+    if (secondary)
+	*secondary = busno_460gx[i];
+    if (subordinate)
+	*subordinate = subno_460gx[i];
+}
+
+/* Retrieves a list of the resources routed to a host bridge's secondary bus */
+static void
+Get460GXBridgeResources(int bus,
+			pointer *ppIoRes,
+			pointer *ppMemRes,
+			pointer *ppPmemRes)
+{
+    pciConfigPtr pPCI = Verify460GXBus(bus);
+    resRange range;
+    unsigned int i, j;
+
+    if (ppIoRes) {
+	xf86FreeResList(*ppIoRes);
+	*ppIoRes = NULL;
+
+	if (pPCI) {
+	    for (i = 0;  i <= 0x0F;  i++) {
+		if (iomap_460gx[i] != pPCI->devnum)
+		    continue;
+
+		RANGE(range, i << 12, ((i + 1) << 12) - 1,
+		      RANGE_TYPE(ResExcIoBlock, 0));
+		*ppIoRes = xf86AddResToList(*ppIoRes, &range, -1);
+	    }
+	}
+    }
+
+    if (ppMemRes) {
+	xf86FreeResList(*ppMemRes);
+	*ppMemRes = NULL;
+
+	if (pPCI) {
+	    if (!(i = (pPCI->devnum - 0x10)))
+		j = 127;	/* (4GB - 32M) / 32M */
+	    else
+		j = pcis_460gx[i - 1] & 0x7F;
+
+	    i = pcis_460gx[i] & 0x7F;
+	    if (i < j) {
+		RANGE(range, i << 25, (j << 25) - 1,
+		    RANGE_TYPE(ResExcMemBlock, 0));
+		*ppMemRes = xf86AddResToList(*ppMemRes, &range, -1);
+	    }
+	}
+    }
+
+    if (ppPmemRes) {
+	xf86FreeResList(*ppPmemRes);
+	*ppPmemRes = NULL;
+    }
+}
+
+/*
+ * This checks for, and validates, the presence of the 460GX chipset, and sets
+ * cbn_460gx to a positive value accordingly.  This function returns TRUE if
+ * the chipset scan is to be stopped, or FALSE if the scan is to move on to the
+ * next chipset.
+ */
+Bool
+xf86PreScan460GX(void)
+{
+    pciBusInfo_t *pBusInfo;
+    PCITAG tag;
+    CARD32 tmp;
+    int i, devno;
+
+    /* Bus zero should already be set up */
+    if (!(pBusInfo = pciBusInfo[0])) {
+	cbn_460gx = -1;
+	return FALSE;
+    }
+
+    /* First look for a 460GX's primary host bridge */
+    tag = PCI_MAKE_TAG(0, 0x10, 0);
+    if (pciReadLong(tag, PCI_ID_REG) != DEVID(INTEL, 460GX_SAC)) {
+	cbn_460gx = -1;
+	return FALSE;
+    }
+
+    /* Get CBN (Chipset bus number) */
+    if (!(cbn_460gx = (unsigned int)pciReadByte(tag, CBN))) {
+	/* Sanity check failed */
+	cbn_460gx = -1;
+	return TRUE;
+    }
+
+    if (pciNumBuses <= cbn_460gx)
+	pciNumBuses = cbn_460gx + 1;
+
+    /* Set up bus CBN */
+    if (!pciBusInfo[cbn_460gx]) {
+	pciBusInfo[cbn_460gx] = xnfalloc(sizeof(pciBusInfo_t));
+	*pciBusInfo[cbn_460gx] = *pBusInfo;
+    }
+
+    tag = PCI_MAKE_TAG(cbn_460gx, 0, 0);
+    if (pciReadLong(tag, PCI_ID_REG) != DEVID(INTEL, 460GX_SAC)) {
+	/* Sanity check failed */
+	cbn_460gx = -1;
+	return TRUE;
+    }
+
+    /*
+     * Find out which CBN devices the firmware thinks are present.  Of these,
+     * we are only interested in devices 0x10 through 0x17.
+     */
+    cbdevs_460gx = pciReadLong(tag, DEVNPRES);
+
+    for (i = 0, devno = 0x10;  devno <= 0x17;  i++, devno++) {
+	tag = PCI_MAKE_TAG(cbn_460gx, devno, 0);
+	if (pciReadLong(tag, PCI_ID_REG) != DEVID(INTEL, 460GX_SAC)) {
+	    /* Sanity check failed */
+	    cbn_460gx = -1;
+	    return TRUE;
+	}
+
+	if (devno == 0x10)
+	    iord_460gx = pciReadWord(tag, IORD);
+
+	busno_460gx[i] = (unsigned int)pciReadByte(tag, BUSNO);
+	subno_460gx[i] = (unsigned int)pciReadByte(tag, SUBNO);
+	pcis_460gx[i] = pciReadByte(tag, PCIS);
+	ior_460gx[i] = pciReadByte(tag, IOR);
+
+	has_err_460gx[i] = err_460gx[i] = 0;	/* Insurance */
+
+	tag = PCI_MAKE_TAG(cbn_460gx, devno, 1);
+	tmp = pciReadLong(tag, PCI_ID_REG);
+	switch (tmp) {
+	case DEVID(INTEL, 460GX_PXB):
+	case DEVID(INTEL, 460GX_WXB):
+	    if (cbdevs_460gx & (1 << devno)) {
+		/* Sanity check failed */
+		cbn_460gx = -1;
+		return TRUE;
+	    }
+
+	    /*
+	     * XXX  I don't have WXB docs, but PCI register dumps indicate that
+	     * the registers we are interested in are consistent with those of
+	     * the PXB.
+	     */
+	    err_460gx[i] = pciReadByte(tag, ERRCMD);
+	    has_err_460gx[i] = 1;
+	    break;
+
+	case DEVID(INTEL, 460GX_GXB_1):
+	    if (cbdevs_460gx & (1 << devno)) {
+		/* Sanity check failed */
+		cbn_460gx = -1;
+		return TRUE;
+	    }
+
+	    /*
+	     * XXX  GXB isn't documented to have an ERRCMD register, nor any
+	     * other means of failing master aborts.  For now, assume master
+	     * aborts are always allowed to complete normally.
+	     */
+	    break;
+
+	default:
+	    if (((CARD16)(tmp + 1U) <= (CARD16)1U) &&
+		(cbdevs_460gx & (1U << devno)))
+		break;
+	    /* Sanity check failed */
+	    cbn_460gx = -1;
+	    return TRUE;
+	}
+    }
+
+    /* Allow master aborts to complete normally */
+    for (i = 0, devno = 0x10;  devno <= 0x17;  i++, devno++) {
+	if (!(err_460gx[i] & 0x01))
+	    continue;
+
+	pciWriteByte(PCI_MAKE_TAG(cbn_460gx, devno, 1),
+		     ERRCMD, err_460gx[i] & ~0x01);
+    }
+
+    /*
+     * The 460GX spec says that any access to busses higher than CBN will be
+     * master-aborted.  It seems possible however that this is not the case in
+     * all 460GX implementations.  For now, limit the bus scan to CBN, unless
+     * we have already found a higher bus number.
+     */
+    for (i = 0;  subno_460gx[i] < cbn_460gx;  ) {
+	if (++i < 8)
+	    continue;
+
+	pciMaxBusNum = cbn_460gx + 1;
+	break;
+    }
+
+    return TRUE;
+}
+
+/* This does some 460GX-related processing after the PCI bus scan */
+void
+xf86PostScan460GX(void)
+{
+    pciConfigPtr pPCI, *ppPCI;
+    pciBusInfo_t *pBusInfo;
+    int i, j, devno;
+
+    if (cbn_460gx <= 0)
+	return;
+
+    /* Set up our extra bus functions */
+    BusFuncs_460gx = *(pciBusInfo[0]->funcs);
+    BusFuncs_460gx.pciControlBridge = Control460GXBridge;
+    BusFuncs_460gx.pciGetBridgeBusses = Get460GXBridgeBusses;
+    BusFuncs_460gx.pciGetBridgeResources = Get460GXBridgeResources;
+
+    /*
+     * Mark all host bridges so that they are ignored by the upper-level
+     * xf86GetPciBridgeInfo() function.  This marking is later clobbered by the
+     * tail end of xf86scanpci() for those bridges that actually have bus
+     * segments associated with them.
+     */
+    ppPCI = xf86scanpci(0);	/* Recursion is only apparent */
+    while ((pPCI = *ppPCI++)) {
+	if ((pPCI->pci_base_class == PCI_CLASS_BRIDGE) &&
+	    (pPCI->pci_sub_class == PCI_SUBCLASS_BRIDGE_HOST))
+	    pPCI->businfo = HOST_NO_BUS;
+    }
+
+    ppPCI = xf86scanpci(0);	/* Recursion is only apparent */
+    j = 0;
+
+    /*
+     * Fix up CBN bus linkage.  This is somewhat arbitrary.  The bridge chosen
+     * for this must be a CBN device so that bus CBN can be recognised as the
+     * root segment.  It also cannot be any of the bus expanders (devices
+     * CBN:0x10:0 through CBN:0x17:0 nor any of their functions).  For now, we
+     * chose the SAC host bridge at CBN:0:0.
+     */
+    pBusInfo = pciBusInfo[cbn_460gx];
+    pBusInfo->bridge = pciBusInfo[0]->bridge;	/* Just in case */
+    while ((pPCI = *ppPCI++)) {
+	if (pPCI->busnum < cbn_460gx)
+	    continue;
+	if (pPCI->busnum > cbn_460gx)
+	    break;
+	if (pPCI->devnum < 0)
+	    continue;
+	if (pPCI->devnum > 0)
+	    break;
+	if (pPCI->funcnum < 0)
+	    continue;
+	if (pPCI->funcnum > 0)
+	    break;
+
+	pBusInfo->bridge = pPCI;
+	pBusInfo->secondary = FALSE;
+	pBusInfo->primary_bus = cbn_460gx;
+	break;
+    }
+
+    for (i = 0, devno = 0x10;  devno <= 0x17;  i++, devno++) {
+	/* Restore ERRCMD registers */
+	if (err_460gx[i] & 0x01)
+	    pciWriteByte(PCI_MAKE_TAG(cbn_460gx, devno, 1),
+			 ERRCMD, err_460gx[i]);
+
+	if (!(cbdevs_460gx & (1 << devno))) {
+	    while ((pPCI = *ppPCI++)) {
+		if (pPCI->busnum < cbn_460gx)
+		    continue;
+		if (pPCI->busnum > cbn_460gx)
+		    break;
+		if (pPCI->devnum < devno)
+		    continue;
+		if (pPCI->devnum > devno)
+		    break;
+		if (pPCI->funcnum < 0)
+		    continue;
+		if (pPCI->funcnum > 0)
+		    break;
+
+		if ((pBusInfo = pciBusInfo[busno_460gx[i]]))
+		    break;
+
+		/* Fix bus linkage */
+		pBusInfo->bridge = pPCI;
+		pBusInfo->secondary = TRUE;
+		pBusInfo->primary_bus = cbn_460gx;
+
+		/* Plug in chipset routines */
+		pBusInfo->funcs = &BusFuncs_460gx;
+		break;
+	    }
+	}
+
+	/* Decode IOR registers */
+	for(;  j <= (ior_460gx[i] & 0x0F);  j++)
+	    iomap_460gx[j] = devno;
+    }
+
+    /* The bottom 4k of I/O space is always routed to PCI0a */
+    iomap_460gx[0] = 0x10;
+
+    /* Decode IORD register */
+    for (j = 1;  j <= 0x0F;  j++)
+	if (iord_460gx & (1 << j))
+	    iomap_460gx[j] = 0x10;
+}
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bus/460gxPCI.h b/xc/programs/Xserver/hw/xfree86/os-support/bus/460gxPCI.h
new file mode 100644
index 000000000..2ae9c3528
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bus/460gxPCI.h
@@ -0,0 +1,36 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/460gxPCI.h,v 1.1 2003/01/02 18:12:48 tsi Exp $ */
+/*
+ * Copyright (C) 2002-2003 The XFree86 Project, Inc.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL THE
+ * XFREE86 PROJECT BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of the XFree86 Project shall
+ * not be used in advertising or otherwise to promote the sale, use or other
+ * dealings in this Software without prior written authorization from the
+ * XFree86 Project.
+ */
+
+#ifndef PCI_460GX_H
+#define PCI_460GX_H 1
+
+#include <X11/Xdefs.h>
+
+Bool xf86PreScan460GX(void);
+void xf86PostScan460GX(void);
+
+#endif
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bus/Imakefile b/xc/programs/Xserver/hw/xfree86/os-support/bus/Imakefile
index 6907eb8fe..5debf5f6b 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bus/Imakefile
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bus/Imakefile
@@ -3,7 +3,7 @@ XCOMM $XConsortium: Imakefile /main/16 1996/10/27 18:07:43 kaleb $
 
 
 
-XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/Imakefile,v 1.25 2002/10/03 21:32:21 tsi Exp $
+XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/Imakefile,v 1.30 2003/02/23 20:26:49 tsi Exp $
 
 #include <Server.tmpl>
 
@@ -50,9 +50,10 @@ PCIDRVROBJ = linuxPci.o
 
 #elif defined(OpenBSDArchitecture) && \
 	(defined(PpcArchitecture) || \
+	defined(AlphaArchitecture) || \
 	defined(Sparc64Architecture))
 
-XCOMM OpenBSD/powerpc and OpenBSD/sparc64
+XCOMM OpenBSD/alpha, OpenBSD/powerpc and OpenBSD/sparc64
 
 PCIDRVRSRC = freebsdPci.c
 PCIDRVROBJ = freebsdPci.o
@@ -109,14 +110,14 @@ XCOMM PCIDRVROBJ = linuxPci.o
 XCOMM no PCI driver -- shouldn't get here
 #endif
 
-#if defined(sparcArchitecture)
+#if defined(SparcArchitecture)
 # if !defined(SunArchitecture)
 PCIARCHSRC = sparcPci.c
 PCIARCHOBJ = sparcPci.o
 # endif
 #elif defined(ia64Architecture)
-PCIARCHSRC = ia64Pci.c
-PCIARCHOBJ = ia64Pci.o
+PCIARCHSRC = ia64Pci.c 460gxPCI.c e8870PCI.c zx1PCI.c
+PCIARCHOBJ = ia64Pci.o 460gxPCI.o e8870PCI.o zx1PCI.o
 #endif
 
 SRCS = Pci.c $(PCIDRVRSRC) $(SBUSDRVSRC) $(PCIARCHSRC)
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bus/Pci.c b/xc/programs/Xserver/hw/xfree86/os-support/bus/Pci.c
index b1b0ab0f8..eb1977bcc 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bus/Pci.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bus/Pci.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/Pci.c,v 1.64 2002/10/03 16:35:56 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/Pci.c,v 1.71 2003/01/23 16:22:13 tsi Exp $ */
 /*
  * Pci.c - New server PCI access functions
  *
@@ -611,7 +611,7 @@ PCITAG
 pciGenFindNext(void)
 {
     CARD32 devid, tmp;
-    unsigned int sec_bus, pri_bus;
+    int sec_bus, pri_bus;
     static int previousBus = 0;
     Bool speculativeProbe = FALSE;
     unsigned char base_class, sub_class;
@@ -636,6 +636,7 @@ pciGenFindNext(void)
 	    for (pciBusNum = 0;  !pciBusInfo[pciBusNum];  ++pciBusNum);
 	    pciFuncNum = 0;
 	    pciDevNum = 0;
+	    previousBus = pciBusNum; /* make sure previousBus exists */
 	} else {
 #ifdef PCI_MFDEV_SUPPORT
 #ifdef DEBUGPCI
@@ -718,8 +719,7 @@ pciGenFindNext(void)
 #ifdef DEBUGPCI
 	ErrorF("pciGenFindNext: pciDeviceTag = 0x%lx, devid = 0x%lx\n", pciDeviceTag, devid);
 #endif
-	if ((devid == 0xffffffff) || (devid == 0x00000000) ||
-	    (devid == 0xffff0000) || (devid == 0x0000ffff))
+	if ((CARD16)(devid + 1U) <= (CARD16)1UL)
 	    continue; /* Nobody home.  Next device please */
 
 	if (pciNumBuses <= pciBusNum)
@@ -818,6 +818,9 @@ CARD32
 pciCfgMech1Read(PCITAG tag, int offset)
 {
   unsigned long rv = 0xffffffff;
+#ifdef DEBUGPCI
+  ErrorF("pciCfgMech1Read(tag=%08x,offset=%08x)\n", tag, offset);
+#endif
 
 #if defined(__powerpc__)
   signal(SIGBUS, buserr);
@@ -830,7 +833,12 @@ pciCfgMech1Read(PCITAG tag, int offset)
 #if defined(__powerpc__)
   signal(SIGBUS, SIG_DFL);
   if (buserr_detected)
+  {
+#ifdef DEBUGPCI
+    ErrorF("pciCfgMech1Read() BUS ERROR\n");
+#endif
     return(0xffffffff);
+  }
   else
 #endif
     return(rv);
@@ -839,6 +847,11 @@ pciCfgMech1Read(PCITAG tag, int offset)
 void
 pciCfgMech1Write(PCITAG tag, int offset, CARD32 val)
 {
+#ifdef DEBUGPCI
+  ErrorF("pciCfgMech1Write(tag=%08x,offset=%08x,val=%08x)\n",
+        tag, offset,val);
+#endif
+
 #if defined(__powerpc__)
   signal(SIGBUS, SIG_IGN);
 #endif
@@ -939,7 +952,7 @@ xf86scanpci(int flags)
 #endif
 
     while (idx < MAX_PCI_DEVICES && tag != PCI_NOT_FOUND) {
-	devp = xalloc(sizeof(pciDevice));
+	devp = xcalloc(1, sizeof(pciDevice));
 	if (!devp) {
 	    xf86Msg(X_ERROR,
 		"xf86scanpci: Out of memory after %d devices!!\n", idx);
@@ -977,8 +990,6 @@ xf86scanpci(int flags)
 	    break;
 	}
 
-	devp->listed_class = 0;
-
 #ifdef OLD_FORMAT
 	xf86MsgVerb(X_INFO, 2, "PCI: BusID 0x%.2x,0x%02x,0x%1x "
 		    "ID 0x%04x,0x%04x Rev 0x%02x Class 0x%02x,0x%02x\n",
@@ -1023,12 +1034,14 @@ xf86scanpci(int flags)
 	case 2:
 	    i = PCI_SECONDARY_BUS_EXTRACT(devp->pci_pp_bus_register, devp->tag);
 	    if (i > devp->busnum) {
-		pciBusInfo[i]->bridge = devp;
-		/*
-		 * The back link needs to be set here, and is unlikely to
-		 * change.
-		 */
-		devp->businfo = pciBusInfo[i];
+		if (pciBusInfo[i]) {
+		    pciBusInfo[i]->bridge = devp;
+		    /*
+                     * The back link needs to be set here, and is unlikely to
+		     * change.
+		     */
+		    devp->businfo = pciBusInfo[i];
+		}
 #ifdef ARCH_PCI_PCI_BRIDGE
 		ARCH_PCI_PCI_BRIDGE(devp);
 #endif
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bus/Pci.h b/xc/programs/Xserver/hw/xfree86/os-support/bus/Pci.h
index 49a7171e6..6f0e9fe71 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bus/Pci.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bus/Pci.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/Pci.h,v 1.32 2002/10/03 21:32:21 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/Pci.h,v 1.36 2002/12/23 15:37:26 tsi Exp $ */
 /*
  * Copyright 1998 by Concurrent Computer Corporation
  *
@@ -88,33 +88,43 @@
 #define MAX_PCI_DEVICES 64	/* Max number of devices accomodated */
 				/* by xf86scanpci		     */
 #if defined(sun) && defined(SVR4) && defined(sparc)
-#define MAX_PCI_BUSES   4096	/* Max number of PCI buses           */
+# define MAX_PCI_BUSES   4096	/* Max number of PCI buses           */
+#elif defined(__alpha__) && defined (linux)
+# define MAX_PCI_DOMAINS	512
+# define PCI_DOM_MASK	0x01fful
+# define MAX_PCI_BUSES	(MAX_PCI_DOMAINS*256) /* 256 per domain      */
 #else
-#define MAX_PCI_BUSES   256	/* Max number of PCI buses           */
+# define MAX_PCI_BUSES   256	/* Max number of PCI buses           */
 #endif
 
 #define PCI_NOT_FOUND   0xffffffff
 
-#define DEVID(vendor, device) ((PCI_CHIP_##device << 16) | PCI_VENDOR_##vendor)
+#define DEVID(vendor, device) \
+    ((CARD32)((PCI_CHIP_##device << 16) | PCI_VENDOR_##vendor))
+
+#ifndef PCI_DOM_MASK
+# define PCI_DOM_MASK 0x0ffu
+#endif
+#define PCI_DOMBUS_MASK (((PCI_DOM_MASK) << 8) | 0x0ffu)
 
 /*
  * "b" contains an optional domain number.
  */
-#define PCI_MAKE_TAG(b,d,f)  ((((b) & 0x00ffffu) << 16) | \
+#define PCI_MAKE_TAG(b,d,f)  ((((b) & (PCI_DOMBUS_MASK)) << 16) | \
 			      (((d) & 0x00001fu) << 11) | \
 			      (((f) & 0x000007u) << 8))
 
-#define PCI_MAKE_BUS(d,b)    ((((d) & 0xffu) << 8) | ((b) & 0xffu))
+#define PCI_MAKE_BUS(d,b)    ((((d) & (PCI_DOM_MASK)) << 8) | ((b) & 0xffu))
 
-#define PCI_DOM_FROM_TAG(tag)  (((tag) & 0xff000000u) >> 24)
-#define PCI_BUS_FROM_TAG(tag)  (((tag) & 0xffff0000u) >> 16)
+#define PCI_DOM_FROM_TAG(tag)  (((tag) >> 24) & (PCI_DOM_MASK))
+#define PCI_BUS_FROM_TAG(tag)  (((tag) >> 16) & (PCI_DOMBUS_MASK))
 #define PCI_DEV_FROM_TAG(tag)  (((tag) & 0x0000f800u) >> 11)
 #define PCI_FUNC_FROM_TAG(tag) (((tag) & 0x00000700u) >> 8)
 
 #define PCI_DFN_FROM_TAG(tag)  (((tag) & 0x0000ff00u) >> 8)
 #define PCI_BDEV_FROM_TAG(tag) ((tag) & 0x00fff800u)
 
-#define PCI_DOM_FROM_BUS(bus)  (((bus) & 0xff00u) >> 8)
+#define PCI_DOM_FROM_BUS(bus)  (((bus) >> 8) & (PCI_DOM_MASK))
 #define PCI_BUS_NO_DOMAIN(bus) ((bus) & 0xffu)
 #define PCI_TAG_NO_DOMAIN(tag) ((tag) & 0x00ffff00u)
 
@@ -194,8 +204,7 @@
 # if defined(linux)
 #  define ARCH_PCI_INIT axpPciInit
 #  define INCLUDE_XF86_MAP_PCI_MEM
-#  define INCLUDE_XF86_NO_DOMAIN
-# elif defined(__FreeBSD__)
+# elif defined(__FreeBSD__) || defined(__OpenBSD__)
 #  define ARCH_PCI_INIT freebsdPciInit
 #  define INCLUDE_XF86_MAP_PCI_MEM
 #  define INCLUDE_XF86_NO_DOMAIN
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bus/axpPci.c b/xc/programs/Xserver/hw/xfree86/os-support/bus/axpPci.c
index 7ca1fa033..04ff8b956 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bus/axpPci.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bus/axpPci.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/axpPci.c,v 1.12 2002/08/27 22:07:07 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/axpPci.c,v 1.15 2002/12/12 04:12:02 dawes Exp $ */
 /*
  * Copyright 1998 by Concurrent Computer Corporation
  *
@@ -53,9 +53,10 @@
 #include "Pci.h"
 
 #include <asm/unistd.h>
+#include "../linux/lnx.h"	/* for _iobase */
 
 /*
- * Alpha platform specific PCI access functions
+ * Alpha/Linux platform specific PCI access functions
  */
 static CARD32 axpPciCfgRead(PCITAG tag, int off);
 static void axpPciCfgWrite(PCITAG, int off, CARD32 val);
@@ -69,81 +70,212 @@ static pciBusFuncs_t axpFuncs0 = {
 /* pciAddrBusToHost */	pciAddrNOOP
 };
 
+typedef struct _axpDomainRec {
+    int domain, hose;
+    int root_bus;
+    unsigned long dense_io,  sparse_io;
+    unsigned long dense_mem, sparse_mem;
+    IOADDRESS mapped_io;
+} axpDomainRec, *axpDomainPtr;
+
+#define MAX_DOMAINS (MAX_PCI_BUSES / 256)
+static axpDomainPtr xf86DomainInfo[MAX_DOMAINS] = { NULL, };
+static int	    pciNumDomains = 0;
+
+/*
+ * For debug, domain assignment can start downward from a fixed base 
+ * (instead of up from 0) by defining FORCE_HIGH_DOMAINS. This allows
+ * debug of large domain numbers and sparse domain numbering on systems
+ * which don't have as many hoses.
+ */
 #if 0
-static pciBusInfo_t axpPci0 = {
-/* configMech  */	PCI_CFG_MECH_OTHER,
-/* numDevices  */	32,
-/* secondary   */	FALSE,
-/* primary_bus */	0,
-#ifdef PowerMAX_OS
-/* ppc_io_base */	0,
-/* ppc_io_size */	0,
+# define FORCE_HIGH_DOMAINS MAX_DOMAINS /* assign domains downward from here */
 #endif
-/* funcs       */	&axpFuncs0,
-/* pciBusPriv  */	NULL,
-/* bridge      */	NULL
-};
-#else
-static pciBusInfo_t axpPci[MAX_PCI_BUSES];
+
+/*
+ * If FORCE_HIGH_DOMAINS is set, make sure it's not larger than the
+ * max domain
+ */
+#if defined(FORCE_HIGH_DOMAINS) && (FORCE_HIGH_DOMAINS > MAX_DOMAINS)
+# undef FORCE_HIGH_DOMAINS
+# define FORCE_HIGH_DOMAINS MAX_DOMAINS
 #endif
 
-void
-axpPciInit()
+static int
+axpSetupDomains(void)
 {
-#if 0
-  pciNumBuses    = 1;
-  pciBusInfo[0]  = &axpPci0;
-#else
-  int i;
-
-  pciNumBuses    = MAX_PCI_BUSES;
-  memset(&axpPci, 0, sizeof(axpPci));
-  for (i = 0; i < MAX_PCI_BUSES; ++i) {
-	  axpPci[i].configMech = PCI_CFG_MECH_OTHER;
-	  axpPci[i].numDevices = 32;
-	  axpPci[i].funcs = &axpFuncs0;
-	  pciBusInfo[i] = axpPci + i;
-  }
+    axpDomainRec axpDomain;
+    int numDomains = 0;
+    int hose;
+
+#ifndef INCLUDE_XF86_NO_DOMAIN
+
+#ifdef FORCE_HIGH_DOMAINS
+    xf86Msg(X_WARNING, 
+	    "DEBUG OPTION FORCE_HIGH_DOMAINS in use - DRI will *NOT* work\n");
+    numDomains = FORCE_HIGH_DOMAINS;
 #endif
-  pciFindFirstFP = pciGenFindFirst;
-  pciFindNextFP  = pciGenFindNext;
+
+    /*
+     * Since each hose has a different address space, hoses are a perfect
+     * overlay for domains, so set up one domain for each hose present
+     * in the system. We have to loop through all possible hoses because
+     * some systems allow sparse I/O controllers.
+     */
+    for(hose = 0; hose < MAX_DOMAINS; hose++) {
+	axpDomain.root_bus = _iobase(IOBASE_ROOT_BUS, hose, -1, -1);
+	if (axpDomain.root_bus < 0) continue;
+
+	axpDomain.hose = hose;
+
+#ifndef FORCE_HIGH_DOMAINS
+
+	axpDomain.domain = axpDomain.hose = hose;
+	numDomains = axpDomain.domain + 1;
+
+#else /* FORCE_HIGH_DOMAINS */
+
+	axpDomain.domain = numDomains - hose - 1;
+
+	xf86Msg(X_WARNING, 
+		"FORCE_HIGH_DOMAINS - assigned hose %d to domain %d\n",
+		axpDomain.hose, axpDomain.domain);
+
+#endif /* FORCE_HIGH_DOMAINS */
+
+	axpDomain.dense_io   = _iobase(IOBASE_DENSE_IO,   hose, -1, -1);
+	axpDomain.sparse_io  = _iobase(IOBASE_SPARSE_IO,  hose, -1, -1);
+        axpDomain.mapped_io  = 0;
+	axpDomain.dense_mem  = _iobase(IOBASE_DENSE_MEM,  hose, -1, -1);
+	axpDomain.sparse_mem = _iobase(IOBASE_SPARSE_MEM, hose, -1, -1);
+
+	xf86DomainInfo[axpDomain.domain] = xnfalloc(sizeof(axpDomainRec));
+	*(xf86DomainInfo[axpDomain.domain]) = axpDomain;
+
+	/*
+	 * For now, only allow a single domain (hose) on sparse i/o systems.
+	 *
+	 * Allowing multiple domains on sparse systems would require:
+	 *	1) either
+	 *		a) revamping the sparse video mapping code to allow 
+	 *		   for multiple unrelated address regions
+	 *		  	-- OR -- 
+	 *		b) implementing sparse mapping directly in 
+	 *		   xf86MapDomainMemory
+	 *	2) revaming read/write sparse routines to correctly handle
+	 *	   the solution to 1)
+	 *	3) implementing a sparse I/O system (mapping, inX/outX)
+	 *	   independent of glibc, since the glibc version only
+	 *	   supports hose 0
+	 */
+	if (axpDomain.sparse_io) {
+	    if (_iobase(IOBASE_ROOT_BUS, hose + 1, -1, -1) >= 0) {
+		/*
+		 * It's a sparse i/o system with (at least) one more hose,
+		 * show a message indicating that video is constrained to 
+		 * hose 0
+		 */
+		xf86Msg(X_INFO, 
+			"Sparse I/O system - constraining video to hose 0\n");
+	    }
+	    break;
+	}
+    }
+
+#else /* INCLUDE_XF86_NO_DOMAIN */
+
+    /*
+     * domain support is not included, so just set up a single domain (0)
+     * to represent the first hose so that axpPciInit will still have
+     * be able to set up the root bus
+     */
+    xf86DomainInfo[0] = xnfalloc(sizeof(axpDomainRec));
+    *(xf86DomainInfo[0]) = axpDomain;
+    numDomains = 1;
+
+#endif /* INCLUDE_XF86_NO_DOMAIN */
+
+    return numDomains;
 }
 
+void  
+axpPciInit()
+{
+    axpDomainPtr pDomain;
+    int domain, bus;
+
+    pciNumDomains = axpSetupDomains();
+
+    for(domain = 0; domain < pciNumDomains; domain++) {
+	if (!(pDomain = xf86DomainInfo[domain])) continue;
+
+	/*
+	 * Since any bridged buses will be behind a probed pci-pci bridge, 
+	 * only set up the root bus for each domain (hose) and the bridged 
+	 * buses will be set up as they are found.
+	 */
+	bus = PCI_MAKE_BUS(domain, 0);
+	pciBusInfo[bus] = xnfalloc(sizeof(pciBusInfo_t));
+	(void)memset(pciBusInfo[bus], 0, sizeof(pciBusInfo_t));
+
+	pciBusInfo[bus]->configMech = PCI_CFG_MECH_OTHER;
+	pciBusInfo[bus]->numDevices = 32;
+	pciBusInfo[bus]->funcs = &axpFuncs0;
+	pciBusInfo[bus]->pciBusPriv = pDomain;
+
+	pciNumBuses = bus + 1;
+    }
+
+    pciFindFirstFP = pciGenFindFirst;
+    pciFindNextFP  = pciGenFindNext;
+}
 
-#if defined(linux)
 /*
- * These funtions will work for Linux, but other OS's
- * are likely have a different mechanism for getting at
- * PCI configuration space
+ * Alpha/Linux PCI configuration space access routines
  */
+static int 
+axpPciBusFromTag(PCITAG tag)
+{
+    pciBusInfo_t *pBusInfo;
+    axpDomainPtr pDomain;
+    int bus, dfn;
+
+    bus = PCI_BUS_FROM_TAG(tag);
+    if ((bus >= pciNumBuses) 
+	|| !(pBusInfo = pciBusInfo[bus])
+	|| !(pDomain = pBusInfo->pciBusPriv)
+	|| (pDomain->domain != PCI_DOM_FROM_TAG(tag))) return -1;
+
+    bus = PCI_BUS_NO_DOMAIN(bus) + pDomain->root_bus;
+    dfn = PCI_DFN_FROM_TAG(tag);
+    if (_iobase(IOBASE_HOSE, -1, bus, dfn) != pDomain->hose) return -1;
+
+    return bus;
+}
+
 static CARD32
 axpPciCfgRead(PCITAG tag, int off)
 {
-	int bus, dfn;
-	CARD32 val = 0xffffffff;
+    int bus, dfn;
+    CARD32 val = 0xffffffff;
 
-	bus = PCI_BUS_FROM_TAG(tag);
-	/*
-	 * Workaround for kernel bug
-	 * triggered when probing for PCI devices
-	 */
-	if (bus >= pciNumBuses)
-	    return (val);
+    if ((bus = axpPciBusFromTag(tag)) >= 0) {
 	dfn = PCI_DFN_FROM_TAG(tag);
 
 	syscall(__NR_pciconfig_read, bus, dfn, off, 4, &val);
-	return(val);
+    }
+    return(val);	
 }
 
 static void
 axpPciCfgWrite(PCITAG tag, int off, CARD32 val)
 {
-	int bus, dfn;
+    int bus, dfn;
 
-	bus = PCI_BUS_FROM_TAG(tag);
+    if ((bus = axpPciBusFromTag(tag)) >= 0) {
 	dfn = PCI_DFN_FROM_TAG(tag);
-
 	syscall(__NR_pciconfig_write, bus, dfn, off, 4, &val);
+    }
 }
 
 static void
@@ -152,11 +284,191 @@ axpPciCfgSetBits(PCITAG tag, int off, CARD32 mask, CARD32 bits)
     int bus, dfn;
     CARD32 val = 0xffffffff;
 
-    bus = PCI_BUS_FROM_TAG(tag);
-    dfn = PCI_DFN_FROM_TAG(tag);
+    if ((bus = axpPciBusFromTag(tag)) >= 0) {
+	dfn = PCI_DFN_FROM_TAG(tag);
+
+	syscall(__NR_pciconfig_read, bus, dfn, off, 4, &val);
+	val = (val & ~mask) | (bits & mask);
+	syscall(__NR_pciconfig_write, bus, dfn, off, 4, &val);
+    }
+}
+
+#ifndef INCLUDE_XF86_NO_DOMAIN
+
+/*
+ * Alpha/Linux addressing domain support
+ */
+
+int
+xf86GetPciDomain(PCITAG Tag)
+{
+    return PCI_DOM_FROM_TAG(Tag);
+}
+
+pointer
+xf86MapDomainMemory(int ScreenNum, int Flags, PCITAG Tag,
+		    ADDRESS Base, unsigned long Size)
+{
+    axpDomainPtr pDomain;
+    int domain = PCI_DOM_FROM_TAG(Tag);
+
+    if ((domain < 0) || (domain >= pciNumDomains) ||
+	!(pDomain = xf86DomainInfo[domain])) 
+	FatalError("%s called with invalid parameters\n", __FUNCTION__);
+
+    /*
+     * xf86MapVidMem already does what we need, but remember to subtract
+     * _bus_base() (the physical dense memory root of hose 0) since 
+     * xf86MapVidMem is expecting an offset relative to _bus_base() rather
+     * than an actual physical address.
+     */
+    return xf86MapVidMem(ScreenNum, Flags, 
+			 pDomain->dense_mem + Base - _bus_base(), Size);
+}
+
+IOADDRESS
+xf86MapDomainIO(int ScreenNum, int Flags, PCITAG Tag,
+		IOADDRESS Base, unsigned long Size)
+{
+    axpDomainPtr pDomain;
+    int domain = PCI_DOM_FROM_TAG(Tag);
+
+    if ((domain < 0) || (domain >= pciNumDomains) ||
+	!(pDomain = xf86DomainInfo[domain])) 
+	FatalError("%s called with invalid parameters\n", __FUNCTION__);
+
+    /*
+     * Use glibc inx/outx routines for sparse I/O, so just return the
+     * base [this is ok since we also constrain sparse I/O systems to
+     * a single domain in axpSetupDomains()]
+     */
+    if (pDomain->sparse_io) return Base;
+
+    /*
+     * I/O addresses on Alpha are really just different physical memory
+     * addresses that the system corelogic turns into I/O commands on the
+     * bus, so just use xf86MapVidMem to map I/O as well, but remember
+     * to subtract _bus_base() (the physical dense memory root of hose 0)
+     * since xf86MapVidMem is expecting an offset relative to _bus_base()
+     * rather than an actual physical address.
+     *
+     * Map the entire I/O space (64kB) at once and only once.
+     */
+    if (!pDomain->mapped_io)
+        pDomain->mapped_io = (IOADDRESS)xf86MapVidMem(ScreenNum, Flags, 
+		   	            pDomain->dense_io - _bus_base(), 
+                                    0x10000);
+
+    return pDomain->mapped_io + Base;
+}
+
+int
+xf86ReadDomainMemory(PCITAG Tag, ADDRESS Base, int Len, unsigned char *Buf)
+{
+    static unsigned long pagemask = 0;
+    unsigned char *MappedAddr;
+    unsigned long MapSize;
+    ADDRESS MapBase;
+    int i;
+
+    if (!pagemask) pagemask = xf86getpagesize() - 1;
+
+    /* Ensure page boundaries */
+    MapBase = Base & ~pagemask;
+    MapSize = ((Base + Len + pagemask) & ~pagemask) - MapBase;
 
-    syscall(__NR_pciconfig_read, bus, dfn, off, 4, &val);
-    val = (val & ~mask) | (bits & mask);
-    syscall(__NR_pciconfig_write, bus, dfn, off, 4, &val);
+    /*
+     * VIDMEM_MMIO in order to get sparse mapping on sparse memory systems
+     * so we can use mmio functions to read (that way we can really get byte
+     * at a time reads on dense memory systems with byte/word instructions.
+     */
+    MappedAddr = xf86MapDomainMemory(-1, VIDMEM_READONLY | VIDMEM_MMIO, 
+                                     Tag, MapBase, MapSize);
+
+    for (i = 0; i < Len; i++) {
+	*Buf++ = xf86ReadMmio8(MappedAddr, Base - MapBase + i);
+    }
+    
+    xf86UnMapVidMem(-1, MappedAddr, MapSize);
+    return Len;
+}
+
+resPtr
+xf86PciBusAccWindowsFromOS(void)
+{
+    resPtr pRes = NULL;
+    resRange range;
+    int domain;
+
+    for(domain = 0; domain < pciNumDomains; domain++) {
+	if (!xf86DomainInfo[domain]) continue;
+
+	RANGE(range, 0, 0xffffffffUL,
+	      RANGE_TYPE(ResExcMemBlock, domain));
+	pRes = xf86AddResToList(pRes, &range, -1);
+
+	RANGE(range, 0, 0x0000ffffUL,
+	      RANGE_TYPE(ResExcIoBlock, domain));
+	pRes = xf86AddResToList(pRes, &range, -1);		      
+    }
+
+    return pRes;
+}
+
+resPtr
+xf86BusAccWindowsFromOS(void)
+{
+    return xf86PciBusAccWindowsFromOS();
+}
+
+resPtr
+xf86AccResFromOS(resPtr pRes)
+{
+    resRange range;
+    int domain;
+
+    for(domain = 0; domain < pciNumDomains; domain++) {
+	if (!xf86DomainInfo[domain]) continue;
+
+	/*
+	 * Fallback is to claim the following areas:
+	 *
+	 * 0x000c0000 - 0x000effff  location of VGA and other extensions ROMS
+	 */
+
+	RANGE(range, 0x000c0000, 0x000effff, 
+	      RANGE_TYPE(ResExcMemBlock, domain));
+	pRes = xf86AddResToList(pRes, &range, -1);
+
+	/*
+	 * Fallback would be to claim well known ports in the 0x0 - 0x3ff 
+	 * range along with their sparse I/O aliases, but that's too 
+	 * imprecise.  Instead claim a bare minimum here.
+	 */
+	RANGE(range, 0x00000000, 0x000000ff, 
+	      RANGE_TYPE(ResExcIoBlock, domain)); /* For mainboard */
+	pRes = xf86AddResToList(pRes, &range, -1);
+
+	/*
+	 * At minimum, the top and bottom resources must be claimed, so that
+	 * resources that are (or appear to be) unallocated can be relocated.
+	 */
+	RANGE(range, 0x00000000, 0x00000000, 
+	      RANGE_TYPE(ResExcMemBlock, domain));
+	pRes = xf86AddResToList(pRes, &range, -1);
+	RANGE(range, 0xffffffff, 0xffffffff, 
+	      RANGE_TYPE(ResExcMemBlock, domain));
+	pRes = xf86AddResToList(pRes, &range, -1);
+/*  	RANGE(range, 0x00000000, 0x00000000, 
+	      RANGE_TYPE(ResExcIoBlock, domain));
+        pRes = xf86AddResToList(pRes, &range, -1); */
+	RANGE(range, 0xffffffff, 0xffffffff, 
+	      RANGE_TYPE(ResExcIoBlock, domain));
+	pRes = xf86AddResToList(pRes, &range, -1);
+    }
+
+    return pRes;
 }
-#endif /* Linux */
+
+#endif /* !INCLUDE_XF86_NO_DOMAIN */
+
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bus/e8870PCI.c b/xc/programs/Xserver/hw/xfree86/os-support/bus/e8870PCI.c
new file mode 100644
index 000000000..829de03c0
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bus/e8870PCI.c
@@ -0,0 +1,54 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/e8870PCI.c,v 1.1 2003/02/23 20:26:49 tsi Exp $ */
+/*
+ * Copyright (C) 2002-2003 The XFree86 Project, Inc.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL THE
+ * XFREE86 PROJECT BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of the XFree86 Project shall
+ * not be used in advertising or otherwise to promote the sale, use or other
+ * dealings in this Software without prior written authorization from the
+ * XFree86 Project.
+ */
+
+/*
+ * This file contains the glue necessary for support of Intel's E8870 chipset.
+ */
+
+#include "e8870PCI.h"
+#include "xf86.h"
+#include "Pci.h"
+
+Bool
+xf86PreScanE8870(void)
+{
+    PCITAG tag;
+
+    /* Look for an E8870's Hub interface */
+    tag = PCI_MAKE_TAG(0, 0x1E, 0);
+    if (pciReadLong(tag, PCI_ID_REG) != DEVID(INTEL, 82801_P2P))
+	return FALSE;
+
+    /* XXX Fill me in... */
+    return TRUE;
+}
+
+void
+xf86PostScanE8870(void)
+{
+    /* XXX Fill me in... */
+}
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bus/e8870PCI.h b/xc/programs/Xserver/hw/xfree86/os-support/bus/e8870PCI.h
new file mode 100644
index 000000000..b910bcfd8
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bus/e8870PCI.h
@@ -0,0 +1,36 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/e8870PCI.h,v 1.1 2003/02/23 20:26:49 tsi Exp $ */
+/*
+ * Copyright (C) 2002-2003 The XFree86 Project, Inc.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL THE
+ * XFREE86 PROJECT BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of the XFree86 Project shall
+ * not be used in advertising or otherwise to promote the sale, use or other
+ * dealings in this Software without prior written authorization from the
+ * XFree86 Project.
+ */
+
+#ifndef PCI_E8870_H
+#define PCI_E8870_H 1
+
+#include <X11/Xdefs.h>
+
+Bool xf86PreScanE8870(void);
+void xf86PostScanE8870(void);
+
+#endif
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bus/ia64Pci.c b/xc/programs/Xserver/hw/xfree86/os-support/bus/ia64Pci.c
index 910acb051..e67fb124b 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bus/ia64Pci.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bus/ia64Pci.c
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/ia64Pci.c,v 1.1 2002/10/03 21:32:21 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/ia64Pci.c,v 1.3 2003/02/23 20:26:49 tsi Exp $ */
 /*
- * Copyright (C) 2002 The XFree86 Project, Inc.  All Rights Reserved.
+ * Copyright (C) 2002-2003 The XFree86 Project, Inc.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy
  * of this software and associated documentation files (the "Software"), to
@@ -26,423 +26,34 @@
  */
 
 /*
- * This file contains the glue necessary for support of Intel's 460GX chipset.
- * It should eventually be expanded to handle Intel's D8870 and HP's ZX1, along
- * with any other Itanium chipset that needs special handling.
+ * This file contains the glue needed to support various IA-64 chipsets.
  */
 
-/* For testing purposes, allow manual compilation on other architectures */
-#if !defined(__ia64__) && !defined(XF86SCANPCI_WRAPPER)
-# define XF86SCANPCI_WRAPPER ia64ScanPCIWrapper
-#endif
-
-#include "xf86.h"
+#include "460gxPCI.h"
+#include "e8870PCI.h"
+#include "zx1PCI.h"
 #include "Pci.h"
 
-/* 460GX register definitions */
-/* SAC at 0:10:0 */
-#define CBN		0x0040
-/* SAC at CBN:0:0 */
-#define DEVNPRES	0x0070
-/* SAC at CBN:1[0-7]:0 */
-#define BUSNO		0x0048
-#define SUBNO		0x0049
-#define VGASE		0x0080
-#define PCIS		0x0084
-#define IOR		0x008C
-#define IORD		0x008E	/* CBN:10:0 only */
-/* PXB at CBN:1[0-7]:0 */
-#define ERRCMD		0x0046
-
-static int cbn_460gx = -1;
-static CARD32 cbdevs_460gx = 0;
-static CARD16 iord_460gx;
-static int busno_460gx[8], subno_460gx[8];
-static CARD8 pcis_460gx[8], ior_460gx[8];
-static CARD8 has_err_460gx[8], err_460gx[8];
-static CARD8 iomap_460gx[16];		/* One for each 4K */
-static pciBusFuncs_t ia64BusFuncs;
-
-static pciConfigPtr
-ia64VerifyBus(int bus)
-{
-    pciConfigPtr pPCI;
-
-    if ((bus < 0) || (bus >= pciNumBuses) ||
-	!pciBusInfo[bus] || !(pPCI = pciBusInfo[bus]->bridge) ||
-	(pPCI->busnum != cbn_460gx) || (pPCI->funcnum != 0) ||
-	(pPCI->devnum < 0x10) || (pPCI->devnum > 0x17))
-	return NULL;
-
-    return pPCI;
-}
-
-/*
- * This function is called to emulate the various settings in a P2P or CardBus
- * bridge's control register using one of a 460GX's SAC host bridge.
- */
-static CARD16
-ia64Control460GXBridge(int bus, CARD16 mask, CARD16 value)
-{
-    pciConfigPtr pPCI;
-    PCITAG tag;
-    CARD16 current = 0;
-    CARD8  tmp;
-
-    if ((pPCI = ia64VerifyBus(bus))) {
-	/* Start with VGA enablement */
-	tmp = pciReadByte(pPCI->tag, VGASE);
-	if (tmp & 0x01) {
-	    current |= PCI_PCI_BRIDGE_VGA_EN;
-	    if ((mask & PCI_PCI_BRIDGE_VGA_EN) &&
-		!(value & PCI_PCI_BRIDGE_VGA_EN))
-		pciWriteByte(pPCI->tag, VGASE, tmp & ~0x01);
-	} else {
-	    if (mask & value & PCI_PCI_BRIDGE_VGA_EN)
-		pciWriteByte(pPCI->tag, VGASE, tmp | 0x01);
-	}
-
-	/* Move on to master abort failure enablement */
-	if (has_err_460gx[pPCI->devnum - 0x10]) {
-	    tag = PCI_MAKE_TAG(pPCI->busnum, pPCI->devnum, pPCI->funcnum + 1);
-	    tmp = pciReadByte(tag, ERRCMD);
-	    if (tmp & 0x01) {
-		current |= PCI_PCI_BRIDGE_MASTER_ABORT_EN;
-		if ((mask & PCI_PCI_BRIDGE_MASTER_ABORT_EN) &&
-		    !(value & PCI_PCI_BRIDGE_MASTER_ABORT_EN))
-		    pciWriteByte(tag, ERRCMD, tmp & ~0x01);
-	    } else {
-		if (mask & value & PCI_PCI_BRIDGE_MASTER_ABORT_EN)
-		    pciWriteByte(tag, ERRCMD, tmp | 0x01);
-	    }
-	}
-
-	/* Put emulation of any other P2P bridge control here */
-    }
-
-    return (current & ~mask) | (value & mask);
-}
-
-/*
- * Retrieve various bus numbers representing the connections provided by 460GX
- * host bridges.
- */
-static void
-ia64Get460GXBridgeBusses(int bus,
-			 int *primary, int *secondary, int *subordinate)
-{
-    pciConfigPtr pPCI = ia64VerifyBus(bus);
-    int i;
-
-    /* The returned bus numbers are initialised by the caller */
-
-    if (!pPCI)
-	return;
-
-    i = pPCI->devnum - 0x10;
-
-    /* These are not modified, so no need to re-read them */
-    if (primary)
-	*primary = pPCI->busnum;
-    if (secondary)
-	*secondary = busno_460gx[i];
-    if (subordinate)
-	*subordinate = subno_460gx[i];
-}
-
-/* Retrieves a list of the resources routed to a host bridge's secondary bus */
-static void
-ia64Get460GXBridgeResources(int bus,
-			    pointer *ppIoRes,
-			    pointer *ppMemRes,
-			    pointer *ppPmemRes)
-{
-    pciConfigPtr pPCI = ia64VerifyBus(bus);
-    resRange range;
-    unsigned int i, j;
-
-    if (ppIoRes) {
-	xf86FreeResList(*ppIoRes);
-	*ppIoRes = NULL;
-
-	if (pPCI) {
-	    for (i = 0;  i <= 0x0F;  i++) {
-		if (iomap_460gx[i] == pPCI->devnum) {
-		    RANGE(range, i << 12, ((i + 1) << 12) - 1,
-			RANGE_TYPE(ResExcIoBlock, 0));
-		    *ppIoRes = xf86AddResToList(*ppIoRes, &range, -1);
-		}
-	    }
-	}
-    }
-
-    if (ppMemRes) {
-	xf86FreeResList(*ppMemRes);
-	*ppMemRes = NULL;
-
-	if (pPCI) {
-	    if (!(i = (pPCI->devnum - 0x10)))
-		j = 127;	/* (4GB - 32M) / 32M */
-	    else
-		j = pcis_460gx[i - 1] & 0x7F;
-
-	    i = pcis_460gx[i] & 0x7F;
-	    if (i < j) {
-		RANGE(range, i << 25, (j << 25) - 1,
-		    RANGE_TYPE(ResExcMemBlock, 0));
-		*ppMemRes = xf86AddResToList(*ppMemRes, &range, -1);
-	    }
-	}
-    }
-
-    if (ppPmemRes) {
-	xf86FreeResList(*ppPmemRes);
-	*ppPmemRes = NULL;
-    }
-}
-
 void
 ia64ScanPCIWrapper(scanpciWrapperOpt flags)
 {
-    pciConfigPtr pPCI, *ppPCI;
-    pciBusInfo_t *pBusInfo;
-    PCITAG tag;
-    int i, j, devno;
 
     if (flags == SCANPCI_INIT) {
 
-	/* Bus zero should already be set up */
-	if (!(pBusInfo = pciBusInfo[0])) {
-	    cbn_460gx = -1;
+	/* PCI configuration space probes should be done first */
+	if (xf86PreScan460GX())
 	    return;
-	}
-
-	/* First look for a 460GX's primary host bridge */
-	tag = PCI_MAKE_TAG(0, 0x10, 0);
-	if (pciReadLong(tag, PCI_ID_REG) != DEVID(INTEL, 460GX_SAC)) {
-	    /* No 460GX present */
-	    cbn_460gx = -1;
-	    return;
-	}
-
-	/* Get CBN (Chipset bus number) */
-	if (!(cbn_460gx = (unsigned int)pciReadByte(tag, CBN))) {
-	    /* Sanity check failed */
-	    cbn_460gx = -1;
+	if (xf86PreScanE8870())
 	    return;
-	}
-
-	if (pciNumBuses <= cbn_460gx)
-	    pciNumBuses = cbn_460gx + 1;
-
-	/* Set up bus CBN */
-	if (!pciBusInfo[cbn_460gx]) {
-	    pciBusInfo[cbn_460gx] = xnfalloc(sizeof(pciBusInfo_t));
-	    *pciBusInfo[cbn_460gx] = *pBusInfo;
-	}
-
-	tag = PCI_MAKE_TAG(cbn_460gx, 0, 0);
-	if (pciReadLong(tag, PCI_ID_REG) != DEVID(INTEL, 460GX_SAC)) {
-	    /* Sanity check failed */
-	    cbn_460gx = -1;
+	if (xf86PreScanZX1())
 	    return;
-	}
-
-	/*
-	 * Find out which CBN devices the firmware thinks are present.  Of
-	 * these, we are only interested in devices 0x10 through 0x17.
-	 */
-	cbdevs_460gx = pciReadLong(tag, DEVNPRES);
-
-	for (i = 0, devno = 0x10;  devno <= 0x17;  i++, devno++) {
-	    tag = PCI_MAKE_TAG(cbn_460gx, devno, 0);
-	    if (pciReadLong(tag, PCI_ID_REG) != DEVID(INTEL, 460GX_SAC)) {
-		/* Sanity check failed */
-		cbn_460gx = -1;
-		return;
-	    }
-
-	    if (devno == 0x10)
-		iord_460gx = pciReadWord(tag, IORD);
-
-	    busno_460gx[i] = (unsigned int)pciReadByte(tag, BUSNO);
-	    subno_460gx[i] = (unsigned int)pciReadByte(tag, SUBNO);
-	    pcis_460gx[i] = pciReadByte(tag, PCIS);
-	    ior_460gx[i] = pciReadByte(tag, IOR);
-
-	    has_err_460gx[i] = err_460gx[i] = 0;	/* Insurance */
-
-	    tag = PCI_MAKE_TAG(cbn_460gx, devno, 1);
-	    switch (pciReadLong(tag, PCI_ID_REG)) {
-	    case DEVID(INTEL, 460GX_PXB):
-	    case DEVID(INTEL, 460GX_WXB):
-		if (cbdevs_460gx & (1 << devno)) {
-		    /* Sanity check failed */
-		    cbn_460gx = -1;
-		    return;
-		}
-
-		/*
-		 * XXX  I don't have WXB docs, but PCI register dumps indicate
-		 * that the registers we are interested in are consistent with
-		 * those of the PXB.
-		 */
-		err_460gx[i] = pciReadByte(tag, ERRCMD);
-		has_err_460gx[i] = 1;
-		break;
-
-	    case DEVID(INTEL, 460GX_GXB_1):
-		if (cbdevs_460gx & (1 << devno)) {
-		    /* Sanity check failed */
-		    cbn_460gx = -1;
-		    return;
-		}
-
-		/*
-		 * XXX  GXB isn't documented to have an ERRCMD register, nor
-		 * any other means of failing master aborts.  For now, assume
-		 * master aborts are always allowed to complete normally.
-		 */
-		break;
-
-	    case 0x00000000u:
-	    case 0x0000ffffu:
-	    case 0xffff0000u:
-	    case 0xffffffffu:
-		/* This device had better not exist */
-		if (cbdevs_460gx & (1 << devno))
-		    break;
-		/* Fall through */
-
-	    default:
-		/* Sanity check failed */
-		cbn_460gx = -1;
-		return;
-	    }
-	}
 
-	/* Allow master aborts to complete normally */
-	for (i = 0, devno = 0x10;  devno <= 0x17;  i++, devno++) {
-	    if (!(err_460gx[i] & 0x01))
-		continue;
+    } else /* if (flags == SCANPCI_TERM) */ {
 
-	    pciWriteByte(PCI_MAKE_TAG(cbn_460gx, devno, 1),
-			 ERRCMD, err_460gx[i] & ~0x01);
-	}
-
-	/*
-	 * The 460GX spec says that any access to busses higher than CBN will
-	 * be master-aborted.  It seems possible however that this is not the
-	 * case in all 460GX implementations.  For now, limit the bus scan to
-	 * CBN, unless we have already found a higher bus number.
-	 */
-	for (i = 0;  subno_460gx[i] < cbn_460gx;  ) {
-	    if (++i == 8) {
-		pciMaxBusNum = cbn_460gx + 1;
-		break;
-	    }
-	}
-
-    } else {				/* flags == SCANPCI_TERM */
-
-	if (cbn_460gx <= 0)
-	    return;
-
-	/* Set up our extra bus functions */
-	ia64BusFuncs = *(pciBusInfo[0]->funcs);
-	ia64BusFuncs.pciControlBridge = ia64Control460GXBridge;
-	ia64BusFuncs.pciGetBridgeBusses = ia64Get460GXBridgeBusses;
-	ia64BusFuncs.pciGetBridgeResources = ia64Get460GXBridgeResources;
-
-	/*
-	 * Mark all host bridges so that they are ignored by the upper level
-	 * xf86GetPciBridgeInfo() function.  This marking is later clobbered
-	 * by the tail end of xf86scanpci() for those bridges that actually
-	 * have bus segments associated with them.
-	 */
-	ppPCI = xf86scanpci(0);		/* Recursion is only apparent */
-	while ((pPCI = *ppPCI++)) {
-	    if ((pPCI->pci_base_class == PCI_CLASS_BRIDGE) &&
-		(pPCI->pci_sub_class == PCI_SUBCLASS_BRIDGE_HOST))
-		pPCI->businfo = HOST_NO_BUS;
-	}
-
-	ppPCI = xf86scanpci(0);		/* Recursion is only apparent */
-	j = 0;
-
-	/*
-	 * Fix up CBN bus linkage.  This is somewhat arbitrary.  The bridge
-	 * chosen for this must be a CBN device so that bus CBN can be
-	 * recognised as the root segment.  It also cannot be any of the bus
-	 * expanders (devices CBN:0x10:0 through CBN:0x17:0 nor any of their
-	 * functions).  For now, we chose the SAC host bridge at CBN:0:0.
-	 */
-	pBusInfo = pciBusInfo[cbn_460gx];
-	pBusInfo->bridge = pciBusInfo[0]->bridge;	/* Just in case */
-	while ((pPCI = *ppPCI++)) {
-	    if (pPCI->busnum < cbn_460gx)
-		continue;
-	    if (pPCI->busnum > cbn_460gx)
-		break;
-	    if (pPCI->devnum < 0)
-		continue;
-	    if (pPCI->devnum > 0)
-		break;
-	    if (pPCI->funcnum < 0)
-		continue;
-	    if (pPCI->funcnum > 0)
-		break;
-
-	    pBusInfo->bridge = pPCI;
-	    pBusInfo->secondary = FALSE;
-	    break;
-	}
-
-	for (i = 0, devno = 0x10;  devno <= 0x17;  i++, devno++) {
-	    /* Restore ERRCMD registers */
-	    if (err_460gx[i] & 0x01)
-		pciWriteByte(PCI_MAKE_TAG(cbn_460gx, devno, 1),
-			     ERRCMD, err_460gx[i]);
-
-
-	    if (!(cbdevs_460gx & (1 << devno))) {
-		while ((pPCI = *ppPCI++)) {
-		    if (pPCI->busnum < cbn_460gx)
-			continue;
-		    if (pPCI->busnum > cbn_460gx)
-			break;
-		    if (pPCI->devnum < devno)
-			continue;
-		    if (pPCI->devnum > devno)
-			break;
-		    if (pPCI->funcnum < 0)
-			continue;
-		    if (pPCI->funcnum > 0)
-			break;
-
-		    /* Fix bus linkage */
-		    pBusInfo = pciBusInfo[busno_460gx[i]];
-		    pBusInfo->bridge = pPCI;
-		    pBusInfo->secondary = TRUE;
-
-		    /* Plug in chipset routines */
-		    pBusInfo->funcs = &ia64BusFuncs;
-		    break;
-		}
-	    }
-
-	    /* Decode IOR registers */
-	    for(;  j <= (ior_460gx[i] & 0x0F);  j++)
-		iomap_460gx[j] = devno;
-	}
-
-	/* The bottom 4K of I/O space is always routed to PCI0a */
-	iomap_460gx[0] = 0x10;
-
-	/* Decode IORD register */
-	for (j = 1;  j <= 0x0F;  j++)
-	    if (iord_460gx & (1 << j))
-		iomap_460gx[j] = 0x10;
+	xf86PostScan460GX();
+	xf86PostScanE8870();
+	xf86PostScanZX1();
 
     }
+
 }
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bus/ix86Pci.c b/xc/programs/Xserver/hw/xfree86/os-support/bus/ix86Pci.c
index 69597dede..e07f5497c 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bus/ix86Pci.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bus/ix86Pci.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/ix86Pci.c,v 1.14 2002/09/16 16:55:33 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/ix86Pci.c,v 1.18 2003/01/27 00:01:44 tsi Exp $ */
 /*
  * ix86Pci.c - x86 PCI driver
  *
@@ -199,10 +199,7 @@ ix86PciBusCheck(void)
 	tag = PCI_MAKE_TAG(0, device, 0);
 	id = (*ix86Pci0.funcs->pciReadLong)(tag, PCI_ID_REG);
 
-	if ((id == 0x00000000) ||
-	    (id == 0xffffffff) ||
-	    (id == 0x0000ffff) ||
-	    (id == 0xffff0000))
+	if ((CARD16)(id + 1U) <= (CARD16)1UL)
 		continue;
 
 	/* The rest of this is inspired by the Linux kernel */
@@ -664,26 +661,30 @@ ix86PciInit()
 
 /*
  * A small table of host bridges that limit the number of PCI buses to less
- * than the maximum of 256.  Please keep this table in ascending devid order.
+ * than the maximum of 256.
  */
 static struct {
     CARD32 devid;
     int    maxpcibus;
 } host_bridges[] = {
     { DEVID(ALI_2,	M1541),			128},
+    { DEVID(VIA,	APOLLOVP1),		64},
     { DEVID(VIA,	APOLLOPRO133X),		64},
     { DEVID(INTEL,	430HX_BRIDGE),		16},
     { DEVID(INTEL,	440BX_BRIDGE),		32},
-    { PCI_NOT_FOUND,				MAX_PCI_BUSES}
 };
+#define NUM_BRIDGES (sizeof(host_bridges) / sizeof(host_bridges[0]))
 
 void ARCH_PCI_HOST_BRIDGE(pciConfigPtr pPCI)
 {
     int i;
 
-    for (i = 0;  pPCI->pci_device_vendor > host_bridges[i].devid;  i++);
-    if (pPCI->pci_device_vendor == host_bridges[i].devid)
-	pciMaxBusNum = host_bridges[i].maxpcibus;
+    for (i = 0;  i < NUM_BRIDGES;  i++) {
+	if (pPCI->pci_device_vendor == host_bridges[i].devid) {
+	    pciMaxBusNum = host_bridges[i].maxpcibus;
+	    break;
+	}
+    }
 }
 
 #endif /* ARCH_PCI_HOST_BRIDGE */
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bus/linuxPci.c b/xc/programs/Xserver/hw/xfree86/os-support/bus/linuxPci.c
index 93aa40271..76194802f 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bus/linuxPci.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bus/linuxPci.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/linuxPci.c,v 1.9 2002/09/24 16:14:16 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/linuxPci.c,v 1.10 2002/11/17 18:42:01 alanh Exp $ */
 /*
  * Copyright 1998 by Concurrent Computer Corporation
  *
@@ -324,7 +324,7 @@ xf86GetPciDomain(PCITAG Tag)
     if (pPCI && (result = PCI_DOM_FROM_BUS(pPCI->busnum)))
 	return result;
 
-    if ((fd = linuxPciOpenFile(pPCI ? pPCI->tag : 0) < 0)
+    if ((fd = linuxPciOpenFile(pPCI ? pPCI->tag : 0)) < 0)
 	return 0;
 
     if ((result = ioctl(fd, PCIIOC_CONTROLLER, 0)) < 0)
@@ -347,7 +347,7 @@ linuxMapPci(int ScreenNum, int Flags, PCITAG Tag,
 
 	pPCI = xf86GetPciHostConfigFromTag(Tag);
 
-	if (((fd = linuxPciOpenFile(pPCI ? pPCI->tag : 0) < 0) ||
+	if (((fd = linuxPciOpenFile(pPCI ? pPCI->tag : 0)) < 0) ||
 	    (ioctl(fd, mmap_ioctl, 0) < 0))
 	    break;
 
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bus/sparcPci.c b/xc/programs/Xserver/hw/xfree86/os-support/bus/sparcPci.c
index 6ce6e27d9..24bbec44c 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bus/sparcPci.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bus/sparcPci.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/sparcPci.c,v 1.11 2002/10/08 22:44:08 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/sparcPci.c,v 1.12 2003/01/02 18:11:32 tsi Exp $ */
 /*
  * Copyright (C) 2001 The XFree86 Project, Inc.  All Rights Reserved.
  *
@@ -875,7 +875,7 @@ simbaControlBridge(int bus, CARD16 mask, CARD16 value)
 	 */
 	iomap = pciReadByte(pPCI->tag, APB_IO_ADDRESS_MAP);
 	memmap = pciReadByte(pPCI->tag, APB_MEM_ADDRESS_MAP);
-	if ((iomap & 0x01) && (memmap & 0x01)) {
+	if (iomap & memmap & 0x01) {
 	    current |= PCI_PCI_BRIDGE_VGA_EN;
 	    if ((mask & PCI_PCI_BRIDGE_VGA_EN) &&
 		!(value & PCI_PCI_BRIDGE_VGA_EN)) {
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bus/xf86Pci.h b/xc/programs/Xserver/hw/xfree86/os-support/bus/xf86Pci.h
index f5aada83f..2206d84b2 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bus/xf86Pci.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bus/xf86Pci.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/xf86Pci.h,v 1.35 2002/09/16 16:55:33 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/xf86Pci.h,v 1.36 2003/02/18 15:42:12 tsi Exp $ */
 /*
  * Copyright 1998 by Concurrent Computer Corporation
  *
@@ -632,6 +632,7 @@ typedef struct pci_device {
     Bool      minBasesize;
     CARD32    listed_class;
     pointer   businfo;		/* pointer to secondary's bus info structure */
+    Bool      fakeDevice;	/* Device added by system chipset support */
 } pciDevice, *pciConfigPtr;
 
 typedef enum {
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bus/zx1PCI.c b/xc/programs/Xserver/hw/xfree86/os-support/bus/zx1PCI.c
new file mode 100644
index 000000000..dc4d062f3
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bus/zx1PCI.c
@@ -0,0 +1,1047 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/zx1PCI.c,v 1.1 2003/02/23 20:26:49 tsi Exp $ */
+/*
+ * Copyright (C) 2002-2003 The XFree86 Project, Inc.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL THE
+ * XFREE86 PROJECT BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of the XFree86 Project shall
+ * not be used in advertising or otherwise to promote the sale, use or other
+ * dealings in this Software without prior written authorization from the
+ * XFree86 Project.
+ */
+
+/*
+ * This file contains the glue necessary for support of HP's ZX1 chipset.
+ * Keep in mind that this chipset is used in both Itanium2 and PA-RISC
+ * architectures.
+ */
+
+#include "zx1PCI.h"
+#include "xf86.h"
+#include "xf86_OSlib.h"
+#include "Pci.h"
+
+#define MIO_BASE		0xFED00000UL	/* mio register base */
+#define MIO_SIZE		0x00002000UL	/* 8k, minimum */
+
+/* ZX1 mio register definitions */
+#define MIO_FUNCTION0		0x0000U
+
+#define MODULE_INFO		0x0100U
+#define STATUS_CONTROL		0x0108U
+#define DILLON_PRESENT		  0x02UL
+
+#define LMMIO_DIR_BASE0		0x0300U
+#define LMMIO_DIR_MASK0		0x0308U
+#define LMMIO_DIR_ROUTE0	0x0310U
+#define LMMIO_DIR_BASE1		0x0318U
+#define LMMIO_DIR_MASK1		0x0320U
+#define LMMIO_DIR_ROUTE1	0x0328U
+#define LMMIO_DIR_BASE2		0x0330U
+#define LMMIO_DIR_MASK2		0x0338U
+#define LMMIO_DIR_ROUTE2	0x0340U
+#define LMMIO_DIR_BASE3		0x0348U
+#define LMMIO_DIR_MASK3		0x0350U
+#define LMMIO_DIR_ROUTE3	0x0358U
+#define LMMIO_DIST_BASE		0x0360U
+#define LMMIO_DIST_MASK		0x0368U
+#define LMMIO_DIST_ROUTE	0x0370U
+#define GMMIO_DIST_BASE		0x0378U
+#define PORT_DISABLE		  0x02UL
+#define MAP_TO_LMMIO		  0x04UL
+#define GMMIO_DIST_MASK		0x0380U
+#define GMMIO_DIST_ROUTE	0x0388U
+#define IOS_DIST_BASE		0x0390U
+#define IOS_DIST_MASK		0x0398U
+#define IOS_DIST_ROUTE		0x03A0U
+#define ROPE_CONFIG_BASE	0x03A8U
+#define VGA_ROUTE		0x03B0U
+#define VGA_ENABLE		  0x8000000000000000UL
+#define VGA_LIGHT		  0x4000000000000000UL
+
+#define IOS_DIR_BASE		0x03C0U
+#define IOS_DIR_MASK		0x03C8U
+#define IOS_DIR_ROUTE		0x03D0U
+#define IOS_BASE		0x03D8U
+
+#define MIO_FUNCTION1		0x1000U
+
+#define ROPE_CONFIG		0x1040U
+#define ROPE_D0			  0x0100UL
+#define ROPE_D2			  0x0200UL
+#define ROPE_D4			  0x0400UL
+#define ROPE_D6			  0x0800UL
+#define ROPE_Q0			  0x1000UL
+#define ROPE_Q4			  0x2000UL
+
+#define LBA_PORT0_CNTRL		0x1200U
+#define LBA_PORT1_CNTRL		0x1208U
+#define LBA_PORT2_CNTRL		0x1210U
+#define LBA_PORT3_CNTRL		0x1218U
+#define LBA_PORT4_CNTRL		0x1220U
+#define LBA_PORT5_CNTRL		0x1228U
+#define LBA_PORT6_CNTRL		0x1230U
+#define LBA_PORT7_CNTRL		0x1238U
+#define LBA_HARD_FAIL		  0x40UL
+
+#define ROPE_PAGE_CONTROL	0x1418U
+
+/*
+ * Total ioa configuration space size is actually 128k, but we only need the
+ * first 64k.
+ */
+#define IOA_SIZE		0x00010000UL
+
+/* ZX1 ioa register definitions */
+#define IOA_CONFIG_ADDR		0x0040U
+#define IOA_CONFIG_DATA		0x0048U
+
+#define IOA_SECONDARY_BUS	0x0058U
+#define IOA_SUBORDINATE_BUS	0x0059U
+
+#define IOA_CONTROL		0x0108U
+#define IOA_FORWARD_VGA		  0x08UL
+#define IOA_HARD_FAIL		  0x40UL
+
+#define IOA_LMMIO_BASE		0x0200U
+#define IOA_LMMIO_MASK		0x0208U
+#define IOA_GMMIO_BASE		0x0210U
+#define IOA_GMMIO_MASK		0x0218U
+#define IOA_WLMMIO_BASE		0x0220U
+#define IOA_WLMMIO_MASK		0x0228U
+#define IOA_WGMMIO_BASE		0x0230U
+#define IOA_WGMMIO_MASK		0x0238U
+#define IOA_IOS_BASE		0x0240U
+#define IOA_IOS_MASK		0x0248U
+#define IOA_ELMMIO_BASE		0x0250U
+#define IOA_ELMMIO_MASK		0x0258U
+#define IOA_EIOS_BASE		0x0260U
+#define IOA_EIOS_MASK		0x0268U
+
+#define IOA_SLAVE_CONTROL	0x0278U
+#define IOA_VGA_PEER_ENABLE	  0x2000UL
+#define IOA_MSI_BASE		0x0280U
+#define IOA_MSI_MASK		0x0288U
+
+#define RANGE_ENABLE		0x01UL		/* In various base registers */
+
+#define IO_MASK			((1UL << 16) - 1UL)
+#define LMMIO_MASK		((1UL << 32) - 1UL)
+#ifdef __ia64__
+#define GMMIO_MASK		((1UL << 44) - 1UL)
+#else	/* PA-RISC */
+#define GMMIO_MASK		((1UL << 40) - 1UL)
+#endif
+
+#define PDH_START		0xFF000000UL
+#define PDH_LAST		0xFFFFFFFFUL
+
+static CARD8 *pZX1mio = NULL,
+	     *pZX1ioa = NULL;
+
+static INT8   zx1_ropemap[8];		/* One for each (potential) rope */
+static CARD64 zx1_lbacntl[8];		/*  "   "   "        "       "   */
+static int    zx1_busno[8], zx1_subno[8];
+
+static pciBusFuncs_t zx1BusFuncs;
+static int           zx1_fakebus = -1;
+static Bool          zx1_hasvga = FALSE;
+
+static pointer pZX1IoRes[8], pZX1MemRes[8];	/* Rope resources */
+
+/* Non-PCI configuration space access macros */
+#define MIO_BYTE(offset) \
+    (*(volatile CARD8  *)(pointer)(pZX1mio + (offset)))
+#define MIO_WORD(offset) \
+    (*(volatile CARD16 *)(pointer)(pZX1mio + (offset)))
+#define MIO_LONG(offset) \
+    (*(volatile CARD32 *)(pointer)(pZX1mio + (offset)))
+#define MIO_QUAD(offset) \
+    (*(volatile CARD64 *)(pointer)(pZX1mio + (offset)))
+#define IOA_BYTE(ioa, offset) \
+    (*(volatile CARD8  *)(pointer)(pZX1ioa + ((offset) + ((ioa) << 13))))
+#define IOA_WORD(ioa, offset) \
+    (*(volatile CARD16 *)(pointer)(pZX1ioa + ((offset) + ((ioa) << 13))))
+#define IOA_LONG(ioa, offset) \
+    (*(volatile CARD32 *)(pointer)(pZX1ioa + ((offset) + ((ioa) << 13))))
+#define IOA_QUAD(ioa, offset) \
+    (*(volatile CARD64 *)(pointer)(pZX1ioa + ((offset) + ((ioa) << 13))))
+
+/* Range definitions */
+#define MAX_RANGE 16
+static CARD64 bot[MAX_RANGE], top[MAX_RANGE], msk[MAX_RANGE], siz[MAX_RANGE];
+static INT8 *pDecode[MAX_RANGE];
+static int nRange = 0;
+
+/* Track a resource range and assign a granularity to it */
+static void
+SetRange(CARD64 base, CARD64 last, CARD8 width)
+{
+    int i;
+
+    bot[nRange] = base;
+    top[nRange] = last;
+    msk[nRange] = (CARD64)(-1L);
+    if (base)
+	msk[nRange] &= (base ^ (base - 1UL)) >> 1;
+    if (last + 1UL)
+	msk[nRange] &= (last ^ (last + 1UL)) >> 1;
+    if (width < 64)
+	msk[nRange] &= (1UL << width) - 1UL;
+
+    /* Look for overlapping ranges */
+    for (i = 0;  i < nRange;  i++) {
+	if ((bot[i] > top[i]) ||
+	    (top[nRange] < bot[i]) ||
+	    (top[i] < bot[nRange]))
+	    continue;
+
+	/* Merge in overlapping range */
+	if (bot[nRange] > bot[i])
+	    bot[nRange] = bot[i];
+	if (top[nRange] < top[i])
+	    top[nRange] = top[i];
+
+	/* Assign finer granularity */
+	msk[nRange] &= msk[i];
+	bot[i] = 1UL;
+	top[i] = 0;
+    }
+
+    nRange++;
+}
+
+/* Lookup granularity associated with the range containing 'base' */
+static int
+GetRange(CARD64 base)
+{
+    int i;
+
+    for (i = 0;  i < nRange;  i++) {
+	if ((bot[i] > top[i]) ||
+	    (base < bot[i]) ||
+	    (base > top[i]))
+	    continue;
+
+	if (pDecode[i])
+	    break;
+
+	/* Allocate decoding array */
+	msk[i]++;
+	siz[i] = ((top[i] - bot[i] + 1UL) / msk[i]) + 1UL;
+	pDecode[i] = xnfalloc(siz[i]);
+	(void)memset(pDecode[i], -1, siz[i]);
+	break;
+    }
+
+    return i;
+}
+
+/*
+ * Verify that 'bus' is a rope's secondary bus and return the pciConfigPtr of
+ * the associated fake PCI-to-PCI bridge.
+ */
+static pciConfigPtr
+VerifyZX1Bus(int bus)
+{
+    pciConfigPtr pPCI;
+
+    if ((bus < 0) || (bus >= pciNumBuses) ||
+	!pciBusInfo[bus] || !(pPCI = pciBusInfo[bus]->bridge) ||
+	(pPCI->busnum != zx1_fakebus) || (pPCI->funcnum != 0) ||
+	(pPCI->devnum < 0x10) || (pPCI->devnum > 0x17))
+	return NULL;
+
+    return pPCI;
+}
+
+/*
+ * This function is called to emulate the various settings in a P2P or CardBus
+ * bridge's control register on a ZX1-based system.
+ */
+static CARD16
+ControlZX1Bridge(int bus, CARD16 mask, CARD16 value)
+{
+    pciConfigPtr pPCI;
+    CARD64 tmp1, tmp2, tmp3, ropenum;
+    CARD16 current = 0;
+
+    if ((pPCI = VerifyZX1Bus(bus))) {
+	ropenum = pPCI->devnum & 0x07;
+
+	/*
+	 * Start with VGA enablement.  This preserves the "VGA-lite" bit
+	 * in mio's VGA_ROUTE register, and the VPE bit in each ioa's
+	 * SLAVE_CONTROL register.
+	 */
+	tmp1 = MIO_QUAD(VGA_ROUTE);
+	tmp2 = IOA_QUAD(ropenum, IOA_CONTROL);
+	if ((tmp1 & VGA_ENABLE) && ((tmp1 & 0x07UL) == ropenum)) {
+	    current |= PCI_PCI_BRIDGE_VGA_EN;
+	    if ((mask & PCI_PCI_BRIDGE_VGA_EN) &&
+		!(value & PCI_PCI_BRIDGE_VGA_EN)) {
+		MIO_QUAD(VGA_ROUTE) = tmp1 & ~VGA_ENABLE;
+		tmp2 &= ~IOA_FORWARD_VGA;
+		IOA_QUAD(ropenum, IOA_CONTROL) = tmp2;
+	    }
+	} else if (mask & value & PCI_PCI_BRIDGE_VGA_EN) {
+	    if (!zx1_hasvga) {
+		xf86MsgVerb(X_WARNING, 3,
+		    "HP ZX1:  Attempt to enable VGA routing to bus %d"
+		    " through rope %ld disallowed\n", bus, ropenum);
+		value &= ~PCI_PCI_BRIDGE_VGA_EN;
+	    } else {
+		if (tmp1 & VGA_ENABLE) {
+		    /*
+		     * VGA is routed somewhere else.  Disable it.
+		     */
+		    MIO_QUAD(VGA_ROUTE) = 0UL;
+		    tmp3 = IOA_QUAD(tmp1 & 0x07UL, IOA_CONTROL);
+		    if (tmp3 & IOA_FORWARD_VGA)
+			IOA_QUAD(tmp1 & 0x07UL, IOA_CONTROL) =
+			    tmp3 & ~IOA_FORWARD_VGA;
+		}
+		if (!(tmp2 & IOA_FORWARD_VGA)) {
+		    tmp2 |= IOA_FORWARD_VGA;
+		    IOA_QUAD(ropenum, IOA_CONTROL) = tmp2;
+		}
+		tmp1 = (tmp1 & ~0x07UL) | ropenum | VGA_ENABLE;
+		MIO_QUAD(VGA_ROUTE) = tmp1;
+	    }
+	}
+
+	/* Move on to master abort failure enablement */
+	tmp1 = MIO_QUAD((ropenum << 3) + LBA_PORT0_CNTRL);
+	if ((tmp1 & LBA_HARD_FAIL) || (tmp2 & IOA_HARD_FAIL)) {
+	    current |= PCI_PCI_BRIDGE_MASTER_ABORT_EN;
+	    if ((mask & PCI_PCI_BRIDGE_MASTER_ABORT_EN) &&
+		!(value & PCI_PCI_BRIDGE_MASTER_ABORT_EN)) {
+		if (tmp1 & LBA_HARD_FAIL)
+		    MIO_QUAD((ropenum << 3) + LBA_PORT0_CNTRL) =
+			tmp1 & ~LBA_HARD_FAIL;
+		if (tmp2 & IOA_HARD_FAIL) {
+		    tmp2 &= ~IOA_HARD_FAIL;
+		    IOA_QUAD(ropenum, IOA_CONTROL) = tmp2;
+		}
+	    }
+	} else {
+	    if (mask & value & PCI_PCI_BRIDGE_MASTER_ABORT_EN) {
+		if (!(tmp1 & LBA_HARD_FAIL))
+		    MIO_QUAD((ropenum << 3) + LBA_PORT0_CNTRL) =
+			tmp1 | LBA_HARD_FAIL;
+		if (!(tmp2 & IOA_HARD_FAIL)) {
+		    tmp2 |= IOA_HARD_FAIL;
+		    IOA_QUAD(ropenum, IOA_CONTROL) = tmp2;
+		}
+	    }
+	}
+
+	/* Put emulation of any other P2P bridge control here */
+    }
+
+    return (current & ~mask) | (value & mask);
+}
+
+/* Retrieves a list of the resources routed to a rope's secondary bus */
+static void
+GetZX1BridgeResources(int bus,
+		      pointer *ppIoRes,
+		      pointer *ppMemRes,
+		      pointer *ppPmemRes)
+{
+    pciConfigPtr pPCI = VerifyZX1Bus(bus);
+
+    if (ppIoRes) {
+	xf86FreeResList(*ppIoRes);
+	*ppIoRes =
+	    pPCI ? xf86DupResList(pZX1IoRes[pPCI->devnum & 0x07]) : NULL;
+    }
+
+    if (ppMemRes) {
+	xf86FreeResList(*ppMemRes);
+	*ppMemRes =
+	    pPCI ? xf86DupResList(pZX1MemRes[pPCI->devnum & 0x07]) : NULL;
+    }
+
+    if (ppPmemRes) {
+	xf86FreeResList(*ppPmemRes);
+	*ppPmemRes = NULL;
+    }
+}
+
+/* The fake bus */
+static CARD32
+zx1FakeReadLong(PCITAG tag, int offset)
+{
+    FatalError("zx1FakeReadLong(0x%X, 0x%X) called\n", tag, offset);
+}
+
+static void
+zx1FakeWriteLong(PCITAG tag, int offset, CARD32 val)
+{
+    FatalError("zx1FakeWriteLong(0x%X, 0x%X, 0x%08X) called\n",
+	       tag, offset, val);
+}
+
+static void
+zx1FakeSetBits(PCITAG tag, int offset, CARD32 mask, CARD32 bits)
+{
+    CARD32 val;
+
+    val = zx1FakeReadLong(tag, offset);
+    val &= ~mask;
+    val |= bits;
+    zx1FakeWriteLong(tag, offset, val);
+}
+
+static pciBusFuncs_t zx1FakeBusFuncs = {
+    zx1FakeReadLong,
+    zx1FakeWriteLong,
+    zx1FakeSetBits
+};
+
+static pciBusInfo_t zx1FakeBus = {
+    0,			/* configMech -- copied from bus 0 */
+    0,			/* numDevices -- copied from bus 0 */
+    FALSE,		/* secondary */
+    0,			/* primary_bus -- dynamically set */
+#ifdef PowerMAX_OS
+    0,			/* ppc_io_base -- ignored */
+    0,			/* ppc_io_size -- ignored */
+#endif
+    &zx1FakeBusFuncs,	/* funcs */
+    NULL,		/* pciBusPriv -- none */
+    NULL,		/* bridge -- dynamically set */
+};
+
+/*
+ * This checks for, and validates, the presence of the ZX1 chipset, and sets
+ * pZX1mio to a non-NULL pointer accordingly.  This function is called before
+ * the server's PCI bus scan and returns TRUE if the chipset scan is to be
+ * stopped, or FALSE if the scan is to move on to the next chipset.
+ */
+Bool
+xf86PreScanZX1(void)
+{
+    resRange range;
+    unsigned long mapSize = xf86getpagesize();
+    unsigned long tmp, base, ioaaddr;
+    unsigned long flagsd = 0, based = 0, lastd = 0, maskd = 0, routed = 0;
+    unsigned long flags0 = 0, base0 = 0, last0 = 0, mask0 = 0, route0 = 0;
+    unsigned long flags1 = 0, base1 = 0, last1 = 0, mask1 = 0, route1 = 0;
+    unsigned long flags2 = 0, base2 = 0, last2 = 0, mask2 = 0, route2 = 0;
+    unsigned long flags3 = 0, base3 = 0, last3 = 0, mask3 = 0, route3 = 0;
+    unsigned long flagsg = 0, baseg = 0, lastg = 0, maskg = 0, routeg = 0;
+    unsigned long flagsl = 0, basel = 0, lastl = 0;
+    int i, rope;
+
+    /* Map mio registers (minimum 8k) */
+    if (mapSize < MIO_SIZE)
+	mapSize = MIO_SIZE;
+
+    if (!(pZX1mio = xf86MapVidMem(-1, VIDMEM_MMIO, MIO_BASE, mapSize)))
+	return FALSE;
+
+    /* Look for ZX1's SBA and IOC */
+    if ((MIO_LONG(MIO_FUNCTION0 + PCI_ID_REG) != DEVID(HP, ZX1_SBA)) ||
+	(MIO_LONG(MIO_FUNCTION1 + PCI_ID_REG) != DEVID(HP, ZX1_IOC))) {
+	xf86UnMapVidMem(-1, pZX1mio, mapSize);
+	pZX1mio = NULL;
+	return FALSE;
+    }
+
+    /* Map rope configuration space */
+    ioaaddr = MIO_QUAD(ROPE_CONFIG_BASE);
+    if (!(ioaaddr & RANGE_ENABLE) ||			      /* No ropes */
+	((ioaaddr = ioaaddr & ~RANGE_ENABLE) & 0x01FFFFUL) || /* Not aligned */
+	!(pZX1ioa = xf86MapVidMem(-1, VIDMEM_MMIO, ioaaddr, IOA_SIZE))) {
+	xf86UnMapVidMem(-1, pZX1mio, mapSize);
+	pZX1mio = NULL;
+	return TRUE;
+    }
+
+    for (i = 0;  i < 8;  i++) {
+	zx1_ropemap[i] = i;
+	zx1_lbacntl[i] = 0;
+	xf86FreeResList(pZX1IoRes[i]);
+	xf86FreeResList(pZX1MemRes[i]);
+	pZX1IoRes[i] = pZX1MemRes[i] = NULL;
+    }
+
+    /*
+     * Determine which of 8 possible ropes exist in the system.  This is done
+     * by looking at their "coupling" to generate a list of candidates,
+     * whittling this list down by factoring in ROPE_PAGE_CONTROL register
+     * contents, then poking each candidate's configuration space to determine
+     * its existence.
+     */
+    tmp = MIO_QUAD(ROPE_CONFIG);
+    if (tmp & ROPE_D0)
+	zx1_ropemap[1] = 0;
+    if (tmp & ROPE_D2)
+	zx1_ropemap[3] = 2;
+    if (tmp & ROPE_D4)
+	zx1_ropemap[5] = 4;
+    if (tmp & ROPE_D6)
+	zx1_ropemap[7] = 6;
+    if (tmp & ROPE_Q0)
+	zx1_ropemap[1] = zx1_ropemap[2] = zx1_ropemap[3] = 0;
+    if (tmp & ROPE_Q4)
+	zx1_ropemap[5] = zx1_ropemap[6] = zx1_ropemap[7] = 4;
+
+    tmp = MIO_QUAD(ROPE_PAGE_CONTROL);
+    for (i = 0;  i < 8;  i++, tmp >>= 8)
+	if (!(CARD8)tmp)
+	    zx1_ropemap[i] = -1;
+
+    for (i = 0;  i < 8;  ) {
+	if (zx1_ropemap[i] == i) {
+
+	    /* Prevent hard-fails */
+	    zx1_lbacntl[i] = MIO_QUAD((i << 3) + LBA_PORT0_CNTRL);
+	    if (zx1_lbacntl[i] & LBA_HARD_FAIL)
+		MIO_QUAD((i << 3) + LBA_PORT0_CNTRL) =
+		    zx1_lbacntl[i] & ~LBA_HARD_FAIL;
+
+	    /* Poke for an ioa */
+	    tmp = IOA_LONG(i, PCI_ID_REG);
+	    switch ((CARD32)tmp) {
+	    case DEVID(HP, ELROY):	/* Expected vendor/device id's */
+	    case DEVID(HP, ZX1_LBA):
+		zx1_busno[i] =
+		    (unsigned int)IOA_BYTE(i, IOA_SECONDARY_BUS);
+		zx1_subno[i] =
+		    (unsigned int)IOA_BYTE(i, IOA_SUBORDINATE_BUS);
+		break;
+
+	    default:
+		if ((CARD16)(tmp + 1U) > (CARD16)1U)
+		    xf86MsgVerb(X_NOTICE, 0,
+			"HP ZX1:  Unexpected vendor/device id 0x%08X"
+			" on rope %d\n", (CARD32)tmp, i);
+		/* Nobody home, or not the "right" kind of rope guest */
+
+		/*
+		 * Restore hard-fail setting.  For "active" ropes, this is done
+		 * later.
+		 */
+		if (zx1_lbacntl[i] & LBA_HARD_FAIL) {
+		    MIO_QUAD((i << 3) + LBA_PORT0_CNTRL) = zx1_lbacntl[i];
+		    zx1_lbacntl[i] = 0;
+		}
+
+		/* Ignore this rope and its couplings */
+		do {
+		    zx1_ropemap[i++] = -1;
+		} while ((i < 8) && (zx1_ropemap[i] < i));
+		continue;	/* Avoid over-incrementing 'i' */
+	    }
+	}
+	i++;
+    }
+
+    /* Determine if VGA is currently routed */
+    tmp = MIO_QUAD(VGA_ROUTE);
+    if (tmp & VGA_ENABLE)
+	zx1_hasvga = TRUE;
+
+    /*
+     * Decode mio resource "coarse" routing (i.e. ignoring VGA).  Due to the
+     * rather unusual flexibility of this chipset, this is done in a number of
+     * stages.  For each of I/O and memory, first decode the relevant registers
+     * to generate ranges with an associated granularity.  Overlapping ranges
+     * are merged into a larger range with the finer granularity.  Each
+     * original range is then more thoroughly decoded using the granularity
+     * associated with the merged range that contains it.  The result is then
+     * converted into resource lists for the common layer.
+     *
+     * Note that this doesn't care whether or not read-only bits are actually
+     * set as documented, nor that mask bits are contiguous.  This does,
+     * however, factor in upper limits on I/O, LMMIO anf GMMIO addresses, and
+     * thus assumes high-order address bits are ignored rather than decoded.
+     * For example, an I/O address of 0x76543210 will be treated as 0x3210
+     * rather than considered out-of-range.  In part, this handling is a
+     * consequence of the fact that high-order mask bits are zeroes instead of
+     * ones.
+     */
+
+    if ((tmp = MIO_QUAD(IOS_DIST_BASE)) & RANGE_ENABLE) {
+	flagsd = RANGE_ENABLE;
+	maskd = MIO_QUAD(IOS_DIST_MASK);
+	based = tmp & maskd & (~RANGE_ENABLE & IO_MASK);
+	lastd = based | (~maskd & IO_MASK);
+	routed = MIO_QUAD(IOS_DIST_ROUTE) >> 58;
+	SetRange(based, lastd, routed);
+    }
+
+    if ((tmp = MIO_QUAD(IOS_DIR_BASE)) & RANGE_ENABLE) {
+	flags0 = RANGE_ENABLE;
+	mask0 = MIO_QUAD(IOS_DIR_MASK);
+	base0 = tmp & mask0 & (~RANGE_ENABLE & IO_MASK);
+	last0 = base0 | (~mask0 & IO_MASK);
+	route0 = MIO_QUAD(IOS_DIR_ROUTE) & 0x07U;
+	SetRange(base0, last0, 64);
+    }
+
+    if (flagsd) {
+	i = GetRange(based);
+	for (tmp = based;  tmp <= lastd;  tmp += msk[i]) {
+	    if ((tmp & maskd) == based) {
+		base = (tmp - bot[i]) / msk[i];
+		pDecode[i][base] = zx1_ropemap[(tmp >> routed) & 0x07U];
+	    }
+	}
+
+	flagsd = 0;
+    }
+
+    if (flags0) {
+	i = GetRange(base0);
+	for (tmp = base0;  tmp <= last0;  tmp += msk[i]) {
+	    if ((tmp & mask0) == base0) {
+		base = (tmp - bot[i]) / msk[i];
+		pDecode[i][base] = zx1_ropemap[route0];
+	    }
+	}
+
+	flags0 = 0;
+    }
+
+    for (i = 0;  i < nRange;  i++) {
+	if (!pDecode[i])
+	    continue;
+
+	rope = pDecode[i][0];
+	for (base = tmp = 0;  ++tmp < siz[i];  ) {
+	    if (rope == pDecode[i][tmp])
+		continue;
+
+	    if (rope >= 0) {
+		RANGE(range, (base * msk[i]) + bot[i],
+		    (tmp * msk[i]) + bot[i] - 1UL,
+		    RANGE_TYPE(ResExcIoBlock, 0));
+		pZX1IoRes[rope] =
+		    xf86AddResToList(pZX1IoRes[rope], &range, -1);
+	    }
+
+	    base = tmp;
+	    rope = pDecode[i][base];
+	}
+
+	xfree(pDecode[i]);
+	pDecode[i] = NULL;
+    }
+
+    nRange = 0;
+
+    /*
+     * Move on to CPU memory access decoding.  For now, don't tell the common
+     * layer about CPU memory ranges that are either relocated to 0 or
+     * translated into PCI I/O.
+     */
+
+    SetRange(MIO_BASE, MIO_BASE + MIO_SIZE - 1UL, 64);		/* mio */
+    SetRange(ioaaddr, ioaaddr + ((IOA_SIZE << 1) - 1UL), 64);	/* ioa */
+    SetRange(PDH_START, PDH_LAST, 64);				/* PDH */
+
+    SetRange(MIO_BASE, LMMIO_MASK, 64);			/* Completeness */
+
+    if ((tmp = MIO_QUAD(LMMIO_DIST_BASE)) & RANGE_ENABLE) {
+	flagsd = RANGE_ENABLE;
+	maskd = MIO_QUAD(LMMIO_DIST_MASK);
+	based = tmp & maskd & (~RANGE_ENABLE & LMMIO_MASK);
+	lastd = based | (~maskd & LMMIO_MASK);
+	routed = MIO_QUAD(LMMIO_DIST_ROUTE) >> 58;
+	SetRange(based, lastd, routed);
+    }
+
+    if ((tmp = MIO_QUAD(LMMIO_DIR_BASE0)) & RANGE_ENABLE) {
+	flags0 = RANGE_ENABLE;
+	mask0 = MIO_QUAD(LMMIO_DIR_MASK0);
+	base0 = tmp & mask0 & (~RANGE_ENABLE & LMMIO_MASK);
+	last0 = base0 | (~mask0 & LMMIO_MASK);
+	route0 = MIO_QUAD(LMMIO_DIR_ROUTE0) & 0x07U;
+	SetRange(base0, last0, 64);
+    }
+
+    if ((tmp = MIO_QUAD(LMMIO_DIR_BASE1)) & RANGE_ENABLE) {
+	flags1 = RANGE_ENABLE;
+	mask1 = MIO_QUAD(LMMIO_DIR_MASK1);
+	base1 = tmp & mask1 & (~RANGE_ENABLE & LMMIO_MASK);
+	last1 = base1 | (~mask1 & LMMIO_MASK);
+	route1 = MIO_QUAD(LMMIO_DIR_ROUTE1) & 0x07U;
+	SetRange(base1, last1, 64);
+    }
+
+    if ((tmp = MIO_QUAD(LMMIO_DIR_BASE2)) & RANGE_ENABLE) {
+	flags2 = RANGE_ENABLE;
+	mask2 = MIO_QUAD(LMMIO_DIR_MASK2);
+	base2 = tmp & mask2 & (~RANGE_ENABLE & LMMIO_MASK);
+	last2 = base2 | (~mask2 & LMMIO_MASK);
+	route2 = MIO_QUAD(LMMIO_DIR_ROUTE2) & 0x07U;
+	SetRange(base2, last2, 64);
+    }
+
+    if ((tmp = MIO_QUAD(LMMIO_DIR_BASE3)) & RANGE_ENABLE) {
+	flags3 = RANGE_ENABLE;
+	mask3 = MIO_QUAD(LMMIO_DIR_MASK3);
+	base3 = tmp & mask3 & (~RANGE_ENABLE & LMMIO_MASK);
+	last3 = base3 | (~mask3 & LMMIO_MASK);
+	route3 = MIO_QUAD(LMMIO_DIR_ROUTE3) & 0x07U;
+	SetRange(base3, last3, 64);
+    }
+
+    if ((tmp = MIO_QUAD(GMMIO_DIST_BASE)) & RANGE_ENABLE) {
+	flagsg = tmp & (RANGE_ENABLE | PORT_DISABLE | MAP_TO_LMMIO);
+	maskg = MIO_QUAD(GMMIO_DIST_MASK);
+	baseg = tmp & maskg &
+	    (~(RANGE_ENABLE | PORT_DISABLE | MAP_TO_LMMIO) & GMMIO_MASK);
+	lastg = baseg | (~maskg & GMMIO_MASK);
+	tmp = routeg = MIO_QUAD(GMMIO_DIST_ROUTE) >> 58;
+	if (!(flagsg & (PORT_DISABLE & MAP_TO_LMMIO)) && (tmp > 26))
+	    tmp = 26;
+	SetRange(baseg, lastg, tmp);
+    }
+
+    if ((tmp = MIO_QUAD(IOS_BASE)) & RANGE_ENABLE) {
+	flagsl = RANGE_ENABLE;
+	basel = tmp & (~RANGE_ENABLE & GMMIO_MASK);
+	lastl = basel | 0x001FFFFFUL;
+	SetRange(basel, lastl, 64);
+    }
+
+    if (flagsd) {
+	i = GetRange(based);
+	for (tmp = based;  tmp <= lastd;  tmp += msk[i]) {
+	    if ((tmp & maskd) == based) {
+		base = (tmp - bot[i]) / msk[i];
+		pDecode[i][base] = zx1_ropemap[(tmp >> routed) & 0x07U];
+	    }
+	}
+
+	flagsd = 0;
+    }
+
+    /* LMMIO distributed range does not address anything beyond 0xFED00000 */
+    i = GetRange(MIO_BASE);
+    for (tmp = MIO_BASE;  tmp <= LMMIO_MASK;  tmp += msk[i]) {
+	base = (tmp - bot[i]) / msk[i];
+	pDecode[i][base] = -1;
+    }
+
+    /* Dillon space can sometimes be redirected to rope 0 */
+    tmp = MIO_QUAD(STATUS_CONTROL);
+    if (!(tmp & DILLON_PRESENT)) {
+	i = GetRange(PDH_START);
+	for (tmp = PDH_START;  tmp <= PDH_LAST;  tmp += msk[i]) {
+	    base = (tmp - bot[i]) / msk[i];
+	    pDecode[i][base] = zx1_ropemap[0];
+	}
+    }
+
+    if (flagsg) {
+	unsigned long mask = (0x07UL << routeg) | maskg;
+
+	i = GetRange(baseg);
+	for (tmp = baseg;  tmp <= lastg;  tmp += msk[i]) {
+	    if ((tmp & maskg) == baseg) {
+		base = (tmp - bot[i]) / msk[i];
+
+		if ((flagsg & MAP_TO_LMMIO) ||
+		    (!(flagsg & PORT_DISABLE) &&
+		     (tmp <= ((tmp & mask) | 0x03FFFFFFUL)))) {
+		    pDecode[i][base] = -1;
+		} else {
+		    pDecode[i][base] = zx1_ropemap[(tmp >> routeg) & 0x07U];
+		}
+	    }
+	}
+
+	flagsg = 0;
+    }
+
+    if (flagsl) {
+	i = GetRange(basel);
+	for (tmp = basel;  tmp <= lastl;  tmp += msk[i]) {
+	    base = (tmp - bot[i]) / msk[i];
+	    pDecode[i][base] = -1;
+	}
+
+	flagsl = 0;
+    }
+
+    /* For now, assume directed LMMIO ranges don't overlap with each other */
+    if (flags0) {
+	i = GetRange(base0);
+	for (tmp = base0;  tmp <= last0;  tmp += msk[i]) {
+	    if ((tmp & mask0) == base0) {
+		base = (tmp - bot[i]) / msk[i];
+		pDecode[i][base] = zx1_ropemap[route0];
+	    }
+	}
+
+	flags0 = 0;
+    }
+
+    if (flags1) {
+	i = GetRange(base1);
+	for (tmp = base1;  tmp <= last1;  tmp += msk[i]) {
+	    if ((tmp & mask1) == base1) {
+		base = (tmp - bot[i]) / msk[i];
+		pDecode[i][base] = zx1_ropemap[route1];
+	    }
+	}
+
+	flags1 = 0;
+    }
+
+    if (flags2) {
+	i = GetRange(base2);
+	for (tmp = base2;  tmp <= last2;  tmp += msk[i]) {
+	    if ((tmp & mask2) == base2) {
+		base = (tmp - bot[i]) / msk[i];
+		pDecode[i][base] = zx1_ropemap[route2];
+	    }
+	}
+
+	flags2 = 0;
+    }
+
+    if (flags3) {
+	i = GetRange(base3);
+	for (tmp = base3;  tmp <= last3;  tmp += msk[i]) {
+	    if ((tmp & mask3) == base3) {
+		base = (tmp - bot[i]) / msk[i];
+		pDecode[i][base] = zx1_ropemap[route3];
+	    }
+	}
+
+	flags3 = 0;
+    }
+
+    /* Claim iao config area */
+    i = GetRange(ioaaddr);
+    for (tmp = ioaaddr;  tmp < ioaaddr + (IOA_SIZE << 1);  tmp += msk[i]) {
+	base = (tmp - bot[i]) / msk[i];
+	pDecode[i][base] = -1;
+    }
+
+    /* Claim mio config area */
+    i = GetRange(MIO_BASE);
+    for (tmp = MIO_BASE;  tmp < (MIO_BASE + MIO_SIZE);  tmp += msk[i]) {
+	base = (tmp - bot[i]) / msk[i];
+	pDecode[i][base] = -1;
+    }
+
+    for (i = 0;  i < nRange;  i++) {
+	if (!pDecode[i])
+	    continue;
+
+	rope = pDecode[i][0];
+	for (base = tmp = 0;  ++tmp < siz[i];  ) {
+	    if (rope == pDecode[i][tmp])
+		continue;
+
+	    if (rope >= 0) {
+		RANGE(range, (base * msk[i]) + bot[i],
+		    (tmp * msk[i]) + bot[i] - 1UL,
+		    RANGE_TYPE(ResExcMemBlock, 0));
+		pZX1MemRes[rope] =
+		    xf86AddResToList(pZX1MemRes[rope], &range, -1);
+	    }
+
+	    base = tmp;
+	    rope = pDecode[i][base];
+	}
+
+	xfree(pDecode[i]);
+	pDecode[i] = NULL;
+    }
+
+    nRange = 0;
+
+    return TRUE;
+}
+
+/* This is called to finalise the results of a PCI bus scan */
+void
+xf86PostScanZX1(void)
+{
+    pciConfigPtr pPCI, *ppPCI, *ppPCI2;
+    pciBusInfo_t *pBusInfo;
+    int i, idx;
+
+    if (!pZX1mio)
+	return;
+
+    /*
+     * Certain 2.4 & 2.5 Linux kernels add fake PCI devices.  Remove them to
+     * prevent any possible interference with our PCI validation.
+     *
+     * Also, if VGA isn't routed on server entry, determine if VGA routing
+     * needs to be enabled while the server is running.
+     */
+    idx = 0;
+    ppPCI = ppPCI2 = xf86scanpci(0);	/* Recursion is only apparent */
+    while ((pPCI = *ppPCI2++)) {
+	switch (pPCI->pci_device_vendor) {
+	case DEVID(HP, ZX1_SBA):
+	case DEVID(HP, ZX1_IOC):
+	case DEVID(HP, ZX1_LBA):
+	    xfree(pPCI);		/* Remove it */
+	    continue;
+
+	default:
+	    *ppPCI++ = pPCI;
+	    idx++;
+
+	    if (zx1_hasvga)
+		continue;
+
+	    switch (pPCI->pci_base_class) {
+	    case PCI_CLASS_PREHISTORIC:
+		if (pPCI->pci_sub_class == PCI_SUBCLASS_PREHISTORIC_VGA)
+		    break;
+		continue;
+
+	    case PCI_CLASS_DISPLAY:
+		if (pPCI->pci_sub_class == PCI_SUBCLASS_DISPLAY_VGA)
+		    break;
+		continue;
+
+	    default:
+		continue;
+	    }
+
+	    zx1_hasvga = TRUE;
+	    continue;
+	}
+    }
+
+    /*
+     * Restore hard-fail settings and figure out the actual subordinate bus
+     * numbers.
+     */
+    for (i = 0;  i < 8;  i++) {
+	if (zx1_ropemap[i] != i)
+	    continue;
+
+	if (zx1_lbacntl[i] & LBA_HARD_FAIL)
+	    MIO_QUAD((i << 3) + LBA_PORT0_CNTRL) = zx1_lbacntl[i];
+
+	while ((zx1_busno[i] < zx1_subno[i]) && !pciBusInfo[zx1_subno[i]])
+	    zx1_subno[i]--;
+
+	if (zx1_fakebus <= zx1_subno[i])
+	    zx1_fakebus = zx1_subno[i] + 1;
+    }
+
+    if (zx1_fakebus >= pciNumBuses) {
+	if (zx1_fakebus >= pciMaxBusNum)
+	    FatalError("HP ZX1:  No room for fake PCI bus\n");
+	pciNumBuses = zx1_fakebus + 1;
+    }
+
+    /* Set up our extra bus functions */
+    zx1BusFuncs = *(pciBusInfo[0]->funcs);
+    zx1BusFuncs.pciControlBridge = ControlZX1Bridge;
+    zx1BusFuncs.pciGetBridgeResources = GetZX1BridgeResources;
+
+    /* Set up our own fake bus to act as the root segment */
+    zx1FakeBus.configMech = pciBusInfo[0]->configMech;
+    zx1FakeBus.numDevices = pciBusInfo[0]->numDevices;
+    zx1FakeBus.primary_bus = zx1_fakebus;
+    pciBusInfo[zx1_fakebus] = &zx1FakeBus;
+
+    /* Add the fake bus' host bridge */
+    if (++idx >= MAX_PCI_DEVICES)
+	FatalError("HP ZX1:  No room for fake Host-to-PCI bridge\n");
+    *ppPCI++ = zx1FakeBus.bridge = pPCI = xnfcalloc(1, sizeof(pciDevice));
+    pPCI->tag = PCI_MAKE_TAG(zx1_fakebus, 0, 0);
+    pPCI->busnum = zx1_fakebus;
+ /* pPCI->devnum = pPCI->funcnum = 0; */
+    pPCI->pci_device_vendor = DEVID(HP, ZX1_SBA);
+    pPCI->pci_base_class = PCI_CLASS_BRIDGE;
+ /* pPCI->pci_sub_class = PCI_SUBCLASS_BRIDGE_HOST; */
+    pPCI->fakeDevice = TRUE;
+
+#ifdef OLD_FORMAT
+    xf86MsgVerb(X_INFO, 2, "PCI: BusID 0x%.2x,0x%02x,0x%1x "
+		"ID 0x%04x,0x%04x Rev 0x%02x Class 0x%02x,0x%02x\n",
+		pPCI->busnum, pPCI->devnum, pPCI->funcnum,
+		pPCI->pci_vendor, pPCI->pci_device, pPCI->pci_rev_id,
+		pPCI->pci_base_class, pPCI->pci_sub_class);
+#else
+    xf86MsgVerb(X_INFO, 2, "PCI: %.2x:%02x:%1x: chip %04x,%04x"
+		" card %04x,%04x rev %02x class %02x,%02x,%02x hdr %02x\n",
+		pPCI->busnum, pPCI->devnum, pPCI->funcnum,
+		pPCI->pci_vendor, pPCI->pci_device,
+		pPCI->pci_subsys_vendor, pPCI->pci_subsys_card,
+		pPCI->pci_rev_id, pPCI->pci_base_class,
+		pPCI->pci_sub_class, pPCI->pci_prog_if,
+		pPCI->pci_header_type);
+#endif
+
+    /* Add a fake PCI-to-PCI bridge to represent each active rope */
+    for (i = 0;  i < 8;  i++) {
+	if ((zx1_ropemap[i] != i) || !(pBusInfo = pciBusInfo[zx1_busno[i]]))
+	    continue;
+
+	if (++idx >= MAX_PCI_DEVICES)
+	    FatalError("HP ZX1:  No room for fake PCI-to-PCI bridge\n");
+	*ppPCI++ = pPCI = xnfcalloc(1, sizeof(pciDevice));
+	pPCI->busnum = zx1_fakebus;
+	pPCI->devnum = i | 0x10;
+     /* pPCI->funcnum = 0; */
+	pPCI->tag = PCI_MAKE_TAG(zx1_fakebus, pPCI->devnum, 0);
+	pPCI->pci_device_vendor = DEVID(HP, ZX1_LBA);
+	pPCI->pci_base_class = PCI_CLASS_BRIDGE;
+	pPCI->pci_sub_class = PCI_SUBCLASS_BRIDGE_PCI;
+	pPCI->pci_header_type = 1;
+	pPCI->pci_primary_bus_number = zx1_fakebus;
+	pPCI->pci_secondary_bus_number = zx1_busno[i];
+	pPCI->pci_subordinate_bus_number = zx1_subno[i];
+	pPCI->fakeDevice = TRUE;
+
+	pBusInfo->bridge = pPCI;
+	pBusInfo->secondary = TRUE;
+	pBusInfo->primary_bus = zx1_fakebus;
+
+	/* Plug in chipset routines */
+	pBusInfo->funcs = &zx1BusFuncs;
+
+#ifdef OLD_FORMAT
+	xf86MsgVerb(X_INFO, 2, "PCI: BusID 0x%.2x,0x%02x,0x%1x "
+		    "ID 0x%04x,0x%04x Rev 0x%02x Class 0x%02x,0x%02x\n",
+		    pPCI->busnum, pPCI->devnum, pPCI->funcnum,
+		    pPCI->pci_vendor, pPCI->pci_device, pPCI->pci_rev_id,
+		    pPCI->pci_base_class, pPCI->pci_sub_class);
+#else
+	xf86MsgVerb(X_INFO, 2, "PCI: %.2x:%02x:%1x: chip %04x,%04x"
+		    " card %04x,%04x rev %02x class %02x,%02x,%02x hdr %02x\n",
+		    pPCI->busnum, pPCI->devnum, pPCI->funcnum,
+		    pPCI->pci_vendor, pPCI->pci_device,
+		    pPCI->pci_subsys_vendor, pPCI->pci_subsys_card,
+		    pPCI->pci_rev_id, pPCI->pci_base_class,
+		    pPCI->pci_sub_class, pPCI->pci_prog_if,
+		    pPCI->pci_header_type);
+#endif
+    }
+
+    *ppPCI = NULL;	/* Terminate array */
+}
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bus/zx1PCI.h b/xc/programs/Xserver/hw/xfree86/os-support/bus/zx1PCI.h
new file mode 100644
index 000000000..b1e8a95b5
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bus/zx1PCI.h
@@ -0,0 +1,36 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/zx1PCI.h,v 1.1 2003/02/23 20:26:49 tsi Exp $ */
+/*
+ * Copyright (C) 2002-2003 The XFree86 Project, Inc.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL THE
+ * XFREE86 PROJECT BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of the XFree86 Project shall
+ * not be used in advertising or otherwise to promote the sale, use or other
+ * dealings in this Software without prior written authorization from the
+ * XFree86 Project.
+ */
+
+#ifndef PCI_ZX1_H
+#define PCI_ZX1_H 1
+
+#include <X11/Xdefs.h>
+
+Bool xf86PreScanZX1(void);
+void xf86PostScanZX1(void);
+
+#endif
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/dgux/dgux_io.c b/xc/programs/Xserver/hw/xfree86/os-support/dgux/dgux_io.c
index 14de590ee..5e4c577ea 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/dgux/dgux_io.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/dgux/dgux_io.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/dgux/dgux_io.c,v 1.3 2002/10/11 01:40:34 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/dgux/dgux_io.c,v 1.4 2003/02/17 15:11:56 dawes Exp $ */
 /*
  * INTEL DG/UX RELEASE 4.20 MU03
  * Copyright 1997 Takis Psarogiannakopoulos Cambridge,UK
@@ -86,7 +86,7 @@ MouseDevPtr mouse;
 #include "xf86OSKbd.h"
 
 Bool
-xf86OSKbdPreInit(KbdDevPtr pKbd)
+xf86OSKbdPreInit(InputInfoPtr pInfo)
 {
     return FALSE;
 }
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/hurd/hurd_io.c b/xc/programs/Xserver/hw/xfree86/os-support/hurd/hurd_io.c
index eae885160..fc60531e3 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/hurd/hurd_io.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/hurd/hurd_io.c
@@ -20,7 +20,7 @@
  * PERFORMANCE OF THIS SOFTWARE.
  *
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/hurd/hurd_io.c,v 1.8 2002/10/11 01:40:35 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/hurd/hurd_io.c,v 1.9 2003/02/17 15:11:57 dawes Exp $ */
 
 #define NEED_EVENTS
 #include "X.h"
@@ -129,7 +129,7 @@ xf86KbdEvents()
 #include "xf86OSKbd.h"
 
 Bool
-xf86OSKbdPreInit(KbdDevPtr pKbd)
+xf86OSKbdPreInit(InputInfoPtr pInfo)
 {
     return FALSE;
 }
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/Imakefile b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/Imakefile
index a54cd8c93..52426c7a7 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/Imakefile
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/Imakefile
@@ -1,4 +1,4 @@
-XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/drm/Imakefile,v 1.12 2002/09/16 18:47:23 dawes Exp $
+XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/drm/Imakefile,v 1.13 2002/10/30 12:52:32 alanh Exp $
 
 #define IHaveModules
 #include <Server.tmpl>
@@ -17,26 +17,14 @@ MTRR_DEFINES = -DHAS_MTRR_SUPPORT
 	xf86drmHash.c \
 	xf86drmRandom.c \
 	xf86drmSL.c \
-	xf86drmI810.c \
-	xf86drmMga.c \
-	xf86drmR128.c \
-	xf86drmRadeon.c \
-	xf86drmSiS.c \
-	xf86drmGamma.c \
-	xf86drmI830.c \
+	xf86drmCompat.c \
 	$(MSRC)
 
  OBJS = xf86drm.o \
 	xf86drmHash.o \
 	xf86drmRandom.o \
 	xf86drmSL.o \
-	xf86drmI810.o \
-	xf86drmMga.o \
-	xf86drmR128.o \
-	xf86drmRadeon.o \
-	xf86drmSiS.o \
-	xf86drmGamma.o \
-	xf86drmI830.o \
+	xf86drmCompat.o \
 	$(MOBJ)
 
 INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) -I. -I$(SERVERSRC)/include \
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/Imakefile b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/Imakefile
index 644cb9840..13b2d9dff 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/Imakefile
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/Imakefile
@@ -1,4 +1,4 @@
-XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/Imakefile,v 1.5 2002/02/27 22:17:11 tsi Exp $
+XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/Imakefile,v 1.7 2002/12/16 16:19:27 dawes Exp $
 
 #include <Server.tmpl>
 
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/Makefile.kernel b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/Makefile.kernel
index c738173d4..233b63096 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/Makefile.kernel
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/Makefile.kernel
@@ -3,7 +3,7 @@
 # Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher.
 
 O_TARGET	:= drm.o
-list-multi	:= gamma.o tdfx.o r128.o mga.o i810.o i830.o ffb.o radeon.o mach64.o
+list-multi	:= gamma.o tdfx.o mach64.o r128.o mga.o i810.o i830.o radeon.o ffb.o
 
 gamma-objs  := gamma_drv.o gamma_dma.o
 tdfx-objs   := tdfx_drv.o
@@ -11,8 +11,8 @@ mach64-objs := mach64_drv.o mach64_dma.o mach64_irq.o mach64_state.o
 r128-objs   := r128_drv.o r128_cce.o r128_irq.o r128_state.o
 mga-objs    := mga_drv.o mga_dma.o mga_irq.o mga_state.o mga_warp.o
 i810-objs   := i810_drv.o i810_dma.o
-i830-objs   := i830_drv.o i830_dma.o
-radeon-objs := radeon_drv.o radeon_cp.o radeon_irq.o radeon_state.o
+i830-objs   := i830_drv.o i830_dma.o i830_irq.o
+radeon-objs := radeon_drv.o radeon_cp.o radeon_irq.o radeon_mem.o radeon_state.o
 ffb-objs    := ffb_drv.o ffb_context.o
 
 obj-$(CONFIG_DRM_GAMMA) += gamma.o
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/Makefile.linux b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/Makefile.linux
index 2447af0ce..492b0e61f 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/Makefile.linux
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/Makefile.linux
@@ -32,6 +32,8 @@
 # 	make TREE=/usr/my-kernel-tree/include
 #
 
+SHELL=/bin/sh
+
 .SUFFIXES:
 
 # *** Setup
@@ -44,7 +46,8 @@ LIBS =
 DRMTEMPLATES =	drm_auth.h drm_bufs.h drm_context.h drm_dma.h drm_drawable.h \
 		drm_drv.h drm_fops.h drm_init.h drm_ioctl.h drm_lists.h \
 		drm_lock.h drm_memory.h drm_proc.h drm_stub.h drm_vm.h
-DRMHEADERS =	drm.h drmP.h drm_sarea.h
+DRMSHARED =	drm_sarea.h
+DRMHEADERS =	drm.h drmP.h $(DRMSHARED)
 
 GAMMAOBJS =	gamma_drv.o gamma_dma.o
 GAMMAHEADERS =	gamma_drv.h $(DRMHEADERS) $(DRMTEMPLATES)
@@ -54,12 +57,20 @@ TDFXHEADERS =	tdfx.h $(DRMHEADERS) $(DRMTEMPLATES)
 
 R128OBJS =	r128_drv.o r128_cce.o r128_state.o r128_irq.o
 R128HEADERS =	r128.h r128_drv.h r128_drm.h $(DRMHEADERS) $(DRMTEMPLATES)
+R128SHARED =	r128.h r128_drv.h r128_drm.h r128_cce.c r128_state.c r128_irq.c
+
+MACH64OBJS =	mach64_drv.o mach64_dma.o mach64_irq.o mach64_state.o
+MACH64HEADERS = mach64.h mach64_drv.h mach64_drm.h $(DRMHEADERS) \
+		$(DRMTEMPLATES)
+MACH64SHARED =	mach64.h mach64_drv.h mach64_drm.h mach64_dma.c mach64_irq.c \
+		mach64_state.c
 
-RADEONOBJS =	radeon_drv.o radeon_cp.o radeon_state.o radeon_mem.o radeon_irq.o
+RADEONOBJS =	radeon_drv.o radeon_cp.o radeon_state.o radeon_mem.o \
+		radeon_irq.o
 RADEONHEADERS =	radeon.h radeon_drv.h radeon_drm.h $(DRMHEADERS) \
 		$(DRMTEMPLATES)
-MACH64OBJS=	mach64_drv.o mach64_dma.o mach64_irq.o mach64_state.o
-MACH64HEADERS=  mach64.h mach64_drv.h mach64_drm.h $(DRMHEADERS) $(DRMTEMPLATES)
+RADEONSHARED =	radeon.h radeon_drv.h radeon_drm.h radeon_cp.c radeon_irq.c \
+		radeon_mem.c radeon_state.c
 
 INC =		/usr/include
 
@@ -162,11 +173,13 @@ endif
 
 MGAOBJS =	mga_drv.o mga_dma.o mga_state.o mga_warp.o mga_irq.o
 MGAHEADERS =	mga.h mga_drv.h mga_drm.h $(DRMHEADERS) $(DRMTEMPLATES)
+MGASHARED =	mga.h mga_dma.c mga_drm.h mga_drv.h mga_state.c \
+		mga_ucode.h mga_warp.c
 
 I810OBJS =	i810_drv.o i810_dma.o
 I810HEADERS =	i810.h i810_drv.h i810_drm.h $(DRMHEADERS) $(DRMTEMPLATES)
 
-I830OBJS =	i830_drv.o i830_dma.o
+I830OBJS =	i830_drv.o i830_dma.o i830_irq.o
 I830HEADERS =	i830.h i830_drv.h i830_drm.h $(DRMHEADERS) $(DRMTEMPLATES)
 
 endif
@@ -174,6 +187,10 @@ endif
 ifeq ($(MACHINE),alpha)
 MODCFLAGS+=      -ffixed-8 -mno-fp-regs -mcpu=ev56 -Wa,-mev6 
 endif
+ifeq ($(MACHINE),x86_64)
+MODCFLAGS+=      -mcmodel=kernel
+endif
+
 
 MODS += sis.o
 
@@ -210,6 +227,15 @@ endif
 
 # **** End of configuration
 
+# Link in shared headers if needed
+
+SHAREDSRC = $(DRMSHARED) $(MGASHARED) $(R128SHARED) $(RADEONSHARED) $(MACH64SHARED)
+SHAREDDIR = ../../../shared/drm/kernel
+
+$(SHAREDSRC):
+	@if [ ! -r $@ ]; then (rm -f $@; set -x; ln -s $(SHAREDDIR)/$@ .); fi
+
+
 dristat: dristat.c
 	$(CC) $(PRGCFLAGS) $< -o $@
 
@@ -288,3 +314,7 @@ endif
 
 clean cleandir::
 	rm -f *.o *.a *~ core
+	@for i in $(SHAREDSRC); do \
+		if [ -L $$i ]; then (set -x; rm -f $$i); fi; \
+	done
+
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drmP.h b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drmP.h
index 17262609c..a6b322855 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drmP.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drmP.h
@@ -261,6 +261,7 @@ do {									\
  		}							\
 	}								\
 } while(0)
+#define DRM_DROP_MAP(_map)
 
 				/* Internal types and structures */
 #define DRM_ARRAY_SIZE(x) (sizeof(x)/sizeof(x[0]))
@@ -275,6 +276,17 @@ do {									\
 	(_map) = (_dev)->context_sareas[_ctx];		\
 } while(0)
 
+#define LOCK_TEST_WITH_RETURN( dev, filp )				\
+do {									\
+	if ( !_DRM_LOCK_IS_HELD( dev->lock.hw_lock->lock ) ||		\
+	     dev->lock.filp != filp ) {				\
+		DRM_ERROR( "%s called without lock held\n",		\
+			   __FUNCTION__ );				\
+		return -EINVAL;						\
+	}								\
+} while (0)
+
+
 typedef int drm_ioctl_t( struct inode *inode, struct file *filp,
 			 unsigned int cmd, unsigned long arg );
 
@@ -323,7 +335,7 @@ typedef struct drm_buf {
 	__volatile__ int  waiting;     /* On kernel DMA queue		     */
 	__volatile__ int  pending;     /* On hardware DMA queue		     */
 	wait_queue_head_t dma_wait;    /* Processes waiting		     */
-	pid_t		  pid;	       /* PID of holding process	     */
+	struct file       *filp;       /* Pointer to holding file descr	     */
 	int		  context;     /* Kernel queue for this buffer	     */
 	int		  while_locked;/* Dispatch this buffer while locked  */
 	enum {
@@ -441,7 +453,7 @@ typedef struct drm_queue {
 
 typedef struct drm_lock_data {
 	drm_hw_lock_t	  *hw_lock;	/* Hardware lock		   */
-	pid_t		  pid;		/* PID of lock holder (0=kernel)   */
+	struct file       *filp;	/* File descr of lock holder (0=kernel)   */
 	wait_queue_head_t lock_queue;	/* Queue of blocked processes	   */
 	unsigned long	  lock_time;	/* Time of last lock in jiffies	   */
 } drm_lock_data_t;
@@ -523,6 +535,8 @@ typedef struct drm_map_list {
 	drm_map_t		*map;
 } drm_map_list_t;
 
+typedef drm_map_t drm_local_map_t;
+
 #if __HAVE_VBL_IRQ
 
 typedef struct drm_vbl_sig {
@@ -815,15 +829,15 @@ extern int	     DRM(mapbufs)( struct inode *inode, struct file *filp,
 extern int	     DRM(dma_setup)(drm_device_t *dev);
 extern void	     DRM(dma_takedown)(drm_device_t *dev);
 extern void	     DRM(free_buffer)(drm_device_t *dev, drm_buf_t *buf);
-extern void	     DRM(reclaim_buffers)(drm_device_t *dev, pid_t pid);
+extern void	     DRM(reclaim_buffers)( struct file *filp );
 #if __HAVE_OLD_DMA
 /* GH: This is a dirty hack for now...
  */
 extern void	     DRM(clear_next_buffer)(drm_device_t *dev);
 extern int	     DRM(select_queue)(drm_device_t *dev,
 				       void (*wrapper)(unsigned long));
-extern int	     DRM(dma_enqueue)(drm_device_t *dev, drm_dma_t *dma);
-extern int	     DRM(dma_get_buffers)(drm_device_t *dev, drm_dma_t *dma);
+extern int	     DRM(dma_enqueue)(struct file *filp, drm_dma_t *dma);
+extern int	     DRM(dma_get_buffers)(struct file *filp, drm_dma_t *dma);
 #endif
 #if __HAVE_DMA_IRQ
 extern int           DRM(control)( struct inode *inode, struct file *filp,
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm_agpsupport.h b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm_agpsupport.h
index fc0b29aab..35dd866ff 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm_agpsupport.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm_agpsupport.h
@@ -260,60 +260,6 @@ drm_agp_head_t *DRM(agp_init)(void)
 			return NULL;
 		}
 		head->memory = NULL;
-		switch (head->agp_info.chipset) {
-		case INTEL_GENERIC:	head->chipset = "Intel";         break;
-		case INTEL_LX:		head->chipset = "Intel 440LX";   break;
-		case INTEL_BX:		head->chipset = "Intel 440BX";   break;
-		case INTEL_GX:		head->chipset = "Intel 440GX";   break;
-		case INTEL_I810:	head->chipset = "Intel i810";    break;
-
-		case INTEL_I815:	head->chipset = "Intel i815";	 break;
-#if LINUX_VERSION_CODE >= 0x020415
-	 	case INTEL_I820:	head->chipset = "Intel i820";	 break;
-#endif
-		case INTEL_I840:	head->chipset = "Intel i840";    break;
-#if LINUX_VERSION_CODE >= 0x020415
-		case INTEL_I845:	head->chipset = "Intel i845";    break;
-#endif
-		case INTEL_I850:	head->chipset = "Intel i850";	 break;
-
-		case VIA_GENERIC:	head->chipset = "VIA";           break;
-		case VIA_VP3:		head->chipset = "VIA VP3";       break;
-		case VIA_MVP3:		head->chipset = "VIA MVP3";      break;
-		case VIA_MVP4:		head->chipset = "VIA MVP4";      break;
-		case VIA_APOLLO_KX133:	head->chipset = "VIA Apollo KX133";
-			break;
-		case VIA_APOLLO_KT133:	head->chipset = "VIA Apollo KT133";
-			break;
-
-		case VIA_APOLLO_PRO: 	head->chipset = "VIA Apollo Pro";
-			break;
-		case SIS_GENERIC:	head->chipset = "SiS";           break;
-		case AMD_GENERIC:	head->chipset = "AMD";           break;
-		case AMD_IRONGATE:	head->chipset = "AMD Irongate";  break;
-		case ALI_GENERIC:	head->chipset = "ALi";           break;
-		case ALI_M1541: 	head->chipset = "ALi M1541";     break;
-
-#if LINUX_VERSION_CODE >= 0x020402
-		case ALI_M1621: 	head->chipset = "ALi M1621";	 break;
-		case ALI_M1631: 	head->chipset = "ALi M1631";	 break;
-		case ALI_M1632: 	head->chipset = "ALi M1632";	 break;
-		case ALI_M1641: 	head->chipset = "ALi M1641";	 break;
-		case ALI_M1647: 	head->chipset = "ALi M1647";	 break;
-		case ALI_M1651: 	head->chipset = "ALi M1651";	 break;
-#endif
-
-#if LINUX_VERSION_CODE >= 0x020406
-		case SVWRKS_HE: 	head->chipset = "Serverworks HE";
-			break;
-		case SVWRKS_LE: 	head->chipset = "Serverworks LE";
-			break;
-		case SVWRKS_GENERIC: 	head->chipset = "Serverworks Generic";
-			break;
-#endif
-
-		default:		head->chipset = "Unknown";       break;
-		}
 #if LINUX_VERSION_CODE <= 0x020408
 		head->cant_use_aperture = 0;
 		head->page_mask = ~(0xfff);
@@ -322,10 +268,9 @@ drm_agp_head_t *DRM(agp_init)(void)
 		head->page_mask = head->agp_info.page_mask;
 #endif
 
-		DRM_INFO("AGP %d.%d on %s @ 0x%08lx %ZuMB\n",
+		DRM_INFO("AGP %d.%d aperture @ 0x%08lx %ZuMB\n",
 			 head->agp_info.version.major,
 			 head->agp_info.version.minor,
-			 head->chipset,
 			 head->agp_info.aper_base,
 			 head->agp_info.aper_size);
 	}
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm_bufs.h b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm_bufs.h
index 3ff3527f6..b4e73699c 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm_bufs.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm_bufs.h
@@ -137,6 +137,7 @@ int DRM(addmap)( struct inode *inode, struct file *filp,
 		}
 		map->offset = (unsigned long)map->handle;
 		if ( map->flags & _DRM_CONTAINS_LOCK ) {
+			dev->sigdata.lock =
 			dev->lock.hw_lock = map->handle; /* Pointer to lock */
 		}
 		break;
@@ -403,7 +404,7 @@ int DRM(addbufs_agp)( struct inode *inode, struct file *filp,
 		buf->waiting = 0;
 		buf->pending = 0;
 		init_waitqueue_head( &buf->dma_wait );
-		buf->pid     = 0;
+		buf->filp    = 0;
 
 		buf->dev_priv_size = sizeof(DRIVER_BUF_PRIV_T);
 		buf->dev_private = DRM(alloc)( sizeof(DRIVER_BUF_PRIV_T),
@@ -616,7 +617,7 @@ int DRM(addbufs_pci)( struct inode *inode, struct file *filp,
 			buf->waiting = 0;
 			buf->pending = 0;
 			init_waitqueue_head( &buf->dma_wait );
-			buf->pid     = 0;
+			buf->filp    = 0;
 #if __HAVE_DMA_HISTOGRAM
 			buf->time_queued     = 0;
 			buf->time_dispatched = 0;
@@ -773,7 +774,7 @@ int DRM(addbufs_sg)( struct inode *inode, struct file *filp,
 		buf->waiting = 0;
 		buf->pending = 0;
 		init_waitqueue_head( &buf->dma_wait );
-		buf->pid     = 0;
+		buf->filp    = 0;
 
 		buf->dev_priv_size = sizeof(DRIVER_BUF_PRIV_T);
 		buf->dev_private = DRM(alloc)( sizeof(DRIVER_BUF_PRIV_T),
@@ -1011,9 +1012,9 @@ int DRM(freebufs)( struct inode *inode, struct file *filp,
 			return -EINVAL;
 		}
 		buf = dma->buflist[idx];
-		if ( buf->pid != current->pid ) {
-			DRM_ERROR( "Process %d freeing buffer owned by %d\n",
-				   current->pid, buf->pid );
+		if ( buf->filp != filp ) {
+			DRM_ERROR( "Process %d freeing buffer not owned\n",
+				   current->pid );
 			return -EINVAL;
 		}
 		DRM(free_buffer)( dev, buf );
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm_dma.h b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm_dma.h
index dce376f6c..d21c8b9dc 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm_dma.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm_dma.h
@@ -189,7 +189,7 @@ void DRM(free_buffer)(drm_device_t *dev, drm_buf_t *buf)
 
 	buf->waiting  = 0;
 	buf->pending  = 0;
-	buf->pid      = 0;
+	buf->filp     = 0;
 	buf->used     = 0;
 #if __HAVE_DMA_HISTOGRAM
 	buf->time_completed = get_cycles();
@@ -211,14 +211,16 @@ void DRM(free_buffer)(drm_device_t *dev, drm_buf_t *buf)
 }
 
 #if !__HAVE_DMA_RECLAIM
-void DRM(reclaim_buffers)(drm_device_t *dev, pid_t pid)
+void DRM(reclaim_buffers)( struct file *filp )
 {
+	drm_file_t    *priv   = filp->private_data;
+	drm_device_t  *dev    = priv->dev;
 	drm_device_dma_t *dma = dev->dma;
 	int		 i;
 
 	if (!dma) return;
 	for (i = 0; i < dma->buf_count; i++) {
-		if (dma->buflist[i]->pid == pid) {
+		if (dma->buflist[i]->filp == filp) {
 			switch (dma->buflist[i]->list) {
 			case DRM_LIST_NONE:
 				DRM(free_buffer)(dev, dma->buflist[i]);
@@ -319,8 +321,10 @@ int DRM(select_queue)(drm_device_t *dev, void (*wrapper)(unsigned long))
 }
 
 
-int DRM(dma_enqueue)(drm_device_t *dev, drm_dma_t *d)
+int DRM(dma_enqueue)(struct file *filp, drm_dma_t *d)
 {
+	drm_file_t    *priv   = filp->private_data;
+	drm_device_t  *dev    = priv->dev;
 	int		  i;
 	drm_queue_t	  *q;
 	drm_buf_t	  *buf;
@@ -382,10 +386,10 @@ int DRM(dma_enqueue)(drm_device_t *dev, drm_dma_t *d)
 			return -EINVAL;
 		}
 		buf = dma->buflist[ idx ];
-		if (buf->pid != current->pid) {
+		if (buf->filp != filp) {
 			atomic_dec(&q->use_count);
-			DRM_ERROR("Process %d using buffer owned by %d\n",
-				  current->pid, buf->pid);
+			DRM_ERROR("Process %d using buffer not owned\n",
+				  current->pid);
 			return -EINVAL;
 		}
 		if (buf->list != DRM_LIST_NONE) {
@@ -427,9 +431,11 @@ int DRM(dma_enqueue)(drm_device_t *dev, drm_dma_t *d)
 	return 0;
 }
 
-static int DRM(dma_get_buffers_of_order)(drm_device_t *dev, drm_dma_t *d,
+static int DRM(dma_get_buffers_of_order)(struct file *filp, drm_dma_t *d,
 					 int order)
 {
+	drm_file_t    *priv   = filp->private_data;
+	drm_device_t  *dev    = priv->dev;
 	int		  i;
 	drm_buf_t	  *buf;
 	drm_device_dma_t  *dma = dev->dma;
@@ -439,13 +445,13 @@ static int DRM(dma_get_buffers_of_order)(drm_device_t *dev, drm_dma_t *d,
 					d->flags & _DRM_DMA_WAIT);
 		if (!buf) break;
 		if (buf->pending || buf->waiting) {
-			DRM_ERROR("Free buffer %d in use by %d (w%d, p%d)\n",
+			DRM_ERROR("Free buffer %d in use by %x (w%d, p%d)\n",
 				  buf->idx,
-				  buf->pid,
+				  buf->filp,
 				  buf->waiting,
 				  buf->pending);
 		}
-		buf->pid     = current->pid;
+		buf->filp     = filp;
 		if (copy_to_user(&d->request_indices[i],
 				 &buf->idx,
 				 sizeof(buf->idx)))
@@ -462,7 +468,7 @@ static int DRM(dma_get_buffers_of_order)(drm_device_t *dev, drm_dma_t *d,
 }
 
 
-int DRM(dma_get_buffers)(drm_device_t *dev, drm_dma_t *dma)
+int DRM(dma_get_buffers)(struct file *filp, drm_dma_t *dma)
 {
 	int		  order;
 	int		  retcode = 0;
@@ -471,7 +477,7 @@ int DRM(dma_get_buffers)(drm_device_t *dev, drm_dma_t *dma)
 	order = DRM(order)(dma->request_size);
 
 	dma->granted_count = 0;
-	retcode		   = DRM(dma_get_buffers_of_order)(dev, dma, order);
+	retcode		   = DRM(dma_get_buffers_of_order)(filp, dma, order);
 
 	if (dma->granted_count < dma->request_count
 	    && (dma->flags & _DRM_DMA_SMALLER_OK)) {
@@ -481,7 +487,7 @@ int DRM(dma_get_buffers)(drm_device_t *dev, drm_dma_t *dma)
 			     && tmp_order >= DRM_MIN_ORDER;
 		     --tmp_order) {
 
-			retcode = DRM(dma_get_buffers_of_order)(dev, dma,
+			retcode = DRM(dma_get_buffers_of_order)(filp, dma,
 								tmp_order);
 		}
 	}
@@ -494,7 +500,7 @@ int DRM(dma_get_buffers)(drm_device_t *dev, drm_dma_t *dma)
 			     && tmp_order <= DRM_MAX_ORDER;
 		     ++tmp_order) {
 
-			retcode = DRM(dma_get_buffers_of_order)(dev, dma,
+			retcode = DRM(dma_get_buffers_of_order)(filp, dma,
 								tmp_order);
 		}
 	}
@@ -538,8 +544,18 @@ int DRM(irq_install)( drm_device_t *dev, int irq )
 	dev->tq.data = dev;
 #endif
 
+#if __HAVE_VBL_IRQ
+	init_waitqueue_head(&dev->vbl_queue);
+
+	spin_lock_init( &dev->vbl_lock );
+
+	INIT_LIST_HEAD( &dev->vbl_sigs.head );
+
+	dev->vbl_pending = 0;
+#endif
+
 				/* Before installing handler */
-	DRIVER_PREINSTALL();
+	DRM(driver_irq_preinstall)(dev);
 
 				/* Install handler */
 	ret = request_irq( dev->irq, DRM(dma_service),
@@ -552,7 +568,7 @@ int DRM(irq_install)( drm_device_t *dev, int irq )
 	}
 
 				/* After installing handler */
-	DRIVER_POSTINSTALL();
+	DRM(driver_irq_postinstall)(dev);
 
 	return 0;
 }
@@ -571,7 +587,7 @@ int DRM(irq_uninstall)( drm_device_t *dev )
 
 	DRM_DEBUG( "%s: irq=%d\n", __FUNCTION__, irq );
 
-	DRIVER_UNINSTALL();
+	DRM(driver_irq_uninstall)( dev );
 
 	free_irq( irq, dev );
 
@@ -598,6 +614,123 @@ int DRM(control)( struct inode *inode, struct file *filp,
 	}
 }
 
+#if __HAVE_VBL_IRQ
+
+int DRM(wait_vblank)( DRM_IOCTL_ARGS )
+{
+	drm_file_t *priv = filp->private_data;
+	drm_device_t *dev = priv->dev;
+	drm_wait_vblank_t vblwait;
+	struct timeval now;
+	int ret = 0;
+	unsigned int flags;
+
+	if (!dev->irq)
+		return -EINVAL;
+
+	DRM_COPY_FROM_USER_IOCTL( vblwait, (drm_wait_vblank_t *)data,
+				  sizeof(vblwait) );
+
+	switch ( vblwait.request.type & ~_DRM_VBLANK_FLAGS_MASK ) {
+	case _DRM_VBLANK_RELATIVE:
+		vblwait.request.sequence += atomic_read( &dev->vbl_received );
+		vblwait.request.type &= ~_DRM_VBLANK_RELATIVE;
+	case _DRM_VBLANK_ABSOLUTE:
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	flags = vblwait.request.type & _DRM_VBLANK_FLAGS_MASK;
+	
+	if ( flags & _DRM_VBLANK_SIGNAL ) {
+		unsigned long irqflags;
+		drm_vbl_sig_t *vbl_sig;
+		
+		vblwait.reply.sequence = atomic_read( &dev->vbl_received );
+
+		spin_lock_irqsave( &dev->vbl_lock, irqflags );
+
+		/* Check if this task has already scheduled the same signal
+		 * for the same vblank sequence number; nothing to be done in
+		 * that case
+		 */
+		list_for_each( ( (struct list_head *) vbl_sig ), &dev->vbl_sigs.head ) {
+			if (vbl_sig->sequence == vblwait.request.sequence
+			    && vbl_sig->info.si_signo == vblwait.request.signal
+			    && vbl_sig->task == current)
+			{
+				spin_unlock_irqrestore( &dev->vbl_lock, irqflags );
+				goto done;
+			}
+		}
+
+		if ( dev->vbl_pending >= 100 ) {
+			spin_unlock_irqrestore( &dev->vbl_lock, irqflags );
+			return -EBUSY;
+		}
+
+		dev->vbl_pending++;
+
+		spin_unlock_irqrestore( &dev->vbl_lock, irqflags );
+
+		if ( !( vbl_sig = DRM_MALLOC( sizeof( drm_vbl_sig_t ) ) ) ) {
+			return -ENOMEM;
+		}
+
+		memset( (void *)vbl_sig, 0, sizeof(*vbl_sig) );
+
+		vbl_sig->sequence = vblwait.request.sequence;
+		vbl_sig->info.si_signo = vblwait.request.signal;
+		vbl_sig->task = current;
+
+		spin_lock_irqsave( &dev->vbl_lock, irqflags );
+
+		list_add_tail( (struct list_head *) vbl_sig, &dev->vbl_sigs.head );
+
+		spin_unlock_irqrestore( &dev->vbl_lock, irqflags );
+	} else {
+		ret = DRM(vblank_wait)( dev, &vblwait.request.sequence );
+
+		do_gettimeofday( &now );
+		vblwait.reply.tval_sec = now.tv_sec;
+		vblwait.reply.tval_usec = now.tv_usec;
+	}
+
+done:
+	DRM_COPY_TO_USER_IOCTL( (drm_wait_vblank_t *)data, vblwait,
+				sizeof(vblwait) );
+
+	return ret;
+}
+
+void DRM(vbl_send_signals)( drm_device_t *dev )
+{
+	struct list_head *tmp;
+	drm_vbl_sig_t *vbl_sig;
+	unsigned int vbl_seq = atomic_read( &dev->vbl_received );
+	unsigned long flags;
+
+	spin_lock_irqsave( &dev->vbl_lock, flags );
+
+	list_for_each_safe( ( (struct list_head *) vbl_sig ), tmp, &dev->vbl_sigs.head ) {
+		if ( ( vbl_seq - vbl_sig->sequence ) <= (1<<23) ) {
+			vbl_sig->info.si_code = vbl_seq;
+			send_sig_info( vbl_sig->info.si_signo, &vbl_sig->info, vbl_sig->task );
+
+			list_del( (struct list_head *) vbl_sig );
+
+			DRM_FREE( vbl_sig, sizeof(*vbl_sig) );
+
+			dev->vbl_pending--;
+		}
+	}
+
+	spin_unlock_irqrestore( &dev->vbl_lock, flags );
+}
+
+#endif	/* __HAVE_VBL_IRQ */
+
 #else
 
 int DRM(control)( struct inode *inode, struct file *filp,
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm_drv.h b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm_drv.h
index 49862f3f4..0a4f3aeb6 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm_drv.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm_drv.h
@@ -115,18 +115,34 @@
 #ifndef DRIVER_FOPS
 #define DRIVER_FOPS				\
 static struct file_operations	DRM(fops) = {	\
-	owner:   THIS_MODULE,			\
-	open:	 DRM(open),			\
-	flush:	 DRM(flush),			\
-	release: DRM(release),			\
-	ioctl:	 DRM(ioctl),			\
-	mmap:	 DRM(mmap),			\
-	read:	 DRM(read),			\
-	fasync:	 DRM(fasync),			\
-	poll:	 DRM(poll),			\
+	.owner   = THIS_MODULE,			\
+	.open	 = DRM(open),			\
+	.flush	 = DRM(flush),			\
+	.release = DRM(release),		\
+	.ioctl	 = DRM(ioctl),			\
+	.mmap	 = DRM(mmap),			\
+	.read	 = DRM(read),			\
+	.fasync  = DRM(fasync),			\
+	.poll	 = DRM(poll),			\
 }
 #endif
 
+#ifndef MODULE
+/* DRM(options) is called by the kernel to parse command-line options
+ * passed via the boot-loader (e.g., LILO).  It calls the insmod option
+ * routine, drm_parse_drm.
+ */
+/* Use an additional macro to avoid preprocessor troubles */
+#define DRM_OPTIONS_FUNC DRM(options)
+static int __init DRM(options)( char *str )
+{
+	DRM(parse_options)( str );
+	return 1;
+}
+
+__setup( DRIVER_NAME "=", DRM_OPTIONS_FUNC );
+#undef DRM_OPTIONS_FUNC
+#endif
 
 /*
  * The default number of instances (minor numbers) to initialize.
@@ -206,6 +222,10 @@ static drm_ioctl_desc_t		  DRM(ioctls)[] = {
 	[DRM_IOCTL_NR(DRM_IOCTL_SG_FREE)]       = { DRM(sg_free),     1, 1 },
 #endif
 
+#if __HAVE_VBL_IRQ
+	[DRM_IOCTL_NR(DRM_IOCTL_WAIT_VBLANK)]   = { DRM(wait_vblank), 0, 0 },
+#endif
+
 	DRIVER_IOCTLS
 };
 
@@ -218,9 +238,7 @@ static char *drm_opts = NULL;
 MODULE_AUTHOR( DRIVER_AUTHOR );
 MODULE_DESCRIPTION( DRIVER_DESC );
 MODULE_PARM( drm_opts, "s" );
-#ifdef MODULE_LICENSE
 MODULE_LICENSE("GPL and additional rights");
-#endif
 
 static int DRM(setup)( drm_device_t *dev )
 {
@@ -292,7 +310,7 @@ static int DRM(setup)( drm_device_t *dev )
 	dev->map_count = 0;
 
 	dev->vmalist = NULL;
-	dev->lock.hw_lock = NULL;
+	dev->sigdata.lock = dev->lock.hw_lock = NULL;
 	init_waitqueue_head( &dev->lock.lock_queue );
 	dev->queue_count = 0;
 	dev->queue_reserved = 0;
@@ -477,8 +495,8 @@ static int DRM(takedown)( drm_device_t *dev )
 	DRM(dma_takedown)( dev );
 #endif
 	if ( dev->lock.hw_lock ) {
-		dev->lock.hw_lock = NULL; /* SHM removed */
-		dev->lock.pid = 0;
+		dev->sigdata.lock = dev->lock.hw_lock = NULL; /* SHM removed */
+		dev->lock.filp = 0;
 		wake_up_interruptible( &dev->lock.lock_queue );
 	}
 	up( &dev->struct_sem );
@@ -705,7 +723,7 @@ int DRM(open)( struct inode *inode, struct file *filp )
 	int i;
 
 	for (i = 0; i < DRM(numdevs); i++) {
-		if (MINOR(inode->i_rdev) == DRM(minor)[i]) {
+		if (minor(inode->i_rdev) == DRM(minor)[i]) {
 			dev = &(DRM(device)[i]);
 			break;
 		}
@@ -714,8 +732,6 @@ int DRM(open)( struct inode *inode, struct file *filp )
 		return -ENODEV;
 	}
 
-	DRM_DEBUG( "open_count = %d\n", dev->open_count );
-
 	retcode = DRM(open_helper)( inode, filp, dev );
 	if ( !retcode ) {
 		atomic_inc( &dev->counts[_DRM_STAT_OPENS] );
@@ -747,15 +763,15 @@ int DRM(release)( struct inode *inode, struct file *filp )
 	 * Begin inline drm_release
 	 */
 
-	DRM_DEBUG( "pid = %d, device = 0x%x, open_count = %d\n",
-		   current->pid, dev->device, dev->open_count );
+	DRM_DEBUG( "pid = %d, device = 0x%lx, open_count = %d\n",
+		   current->pid, (long)dev->device, dev->open_count );
 
 	if ( dev->lock.hw_lock &&
 	     _DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock) &&
-	     dev->lock.pid == current->pid ) {
-		DRM_DEBUG( "Process %d dead, freeing lock for context %d\n",
-			   current->pid,
-			   _DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock) );
+	     dev->lock.filp == filp ) {
+		DRM_DEBUG( "File %p released, freeing lock for context %d\n",
+			filp,
+			_DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock) );
 #if __HAVE_RELEASE
 		DRIVER_RELEASE();
 #endif
@@ -771,6 +787,7 @@ int DRM(release)( struct inode *inode, struct file *filp )
 	else if ( dev->lock.hw_lock ) {
 		/* The lock is required to reclaim buffers */
 		DECLARE_WAITQUEUE( entry, current );
+
 		add_wait_queue( &dev->lock.lock_queue, &entry );
 		for (;;) {
 			current->state = TASK_INTERRUPTIBLE;
@@ -781,7 +798,7 @@ int DRM(release)( struct inode *inode, struct file *filp )
 			}
 			if ( DRM(lock_take)( &dev->lock.hw_lock->lock,
 					     DRM_KERNEL_CONTEXT ) ) {
-				dev->lock.pid	    = priv->pid;
+				dev->lock.filp	    = filp;
 				dev->lock.lock_time = jiffies;
                                 atomic_inc( &dev->counts[_DRM_STAT_LOCKS] );
 				break;	/* Got lock */
@@ -805,7 +822,7 @@ int DRM(release)( struct inode *inode, struct file *filp )
 		}
 	}
 #elif __HAVE_DMA
-	DRM(reclaim_buffers)( dev, priv->pid );
+	DRM(reclaim_buffers)( filp );
 #endif
 
 	DRM(fasync)( -1, filp, 0 );
@@ -829,7 +846,7 @@ int DRM(release)( struct inode *inode, struct file *filp )
 		dev->file_last	 = priv->prev;
 	}
 	up( &dev->struct_sem );
-
+	
 	DRM(free)( priv, sizeof(*priv), DRM_MEM_FILES );
 
 	/* ========================================================
@@ -854,6 +871,7 @@ int DRM(release)( struct inode *inode, struct file *filp )
 	spin_unlock( &dev->count_lock );
 
 	unlock_kernel();
+
 	return retcode;
 }
 
@@ -873,8 +891,9 @@ int DRM(ioctl)( struct inode *inode, struct file *filp,
 	atomic_inc( &dev->counts[_DRM_STAT_IOCTLS] );
 	++priv->ioctl_count;
 
-	DRM_DEBUG( "pid=%d, cmd=0x%02x, nr=0x%02x, dev 0x%x, auth=%d\n",
-		   current->pid, cmd, nr, dev->device, priv->authenticated );
+	DRM_DEBUG( "pid=%d, cmd=0x%02x, nr=0x%02x, dev 0x%lx, auth=%d\n",
+		   current->pid, cmd, nr, (long)dev->device, 
+		   priv->authenticated );
 
 	if ( nr >= DRIVER_IOCTL_COUNT ) {
 		retcode = -EINVAL;
@@ -950,7 +969,7 @@ int DRM(lock)( struct inode *inode, struct file *filp,
                         }
                         if ( DRM(lock_take)( &dev->lock.hw_lock->lock,
 					     lock.context ) ) {
-                                dev->lock.pid       = current->pid;
+                                dev->lock.filp      = filp;
                                 dev->lock.lock_time = jiffies;
                                 atomic_inc( &dev->counts[_DRM_STAT_LOCKS] );
                                 break;  /* Got lock */
@@ -1032,7 +1051,7 @@ int DRM(unlock)( struct inode *inode, struct file *filp,
 	 * agent to request it then we should just be able to
 	 * take it immediately and not eat the ioctl.
 	 */
-	dev->lock.pid = 0;
+	dev->lock.filp = 0;
 	{
 		__volatile__ unsigned int *plock = &dev->lock.hw_lock->lock;
 		unsigned int old, new, prev, ctx;
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm_fops.h b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm_fops.h
index 9c2135fed..10d1aed11 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm_fops.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm_fops.h
@@ -38,7 +38,7 @@
 
 int DRM(open_helper)(struct inode *inode, struct file *filp, drm_device_t *dev)
 {
-	kdev_t	     minor = MINOR(inode->i_rdev);
+	int	     minor = minor(inode->i_rdev);
 	drm_file_t   *priv;
 
 	if (filp->f_flags & O_EXCL)   return -EBUSY; /* No exclusive opens */
@@ -95,8 +95,8 @@ int DRM(flush)(struct file *filp)
 	drm_file_t    *priv   = filp->private_data;
 	drm_device_t  *dev    = priv->dev;
 
-	DRM_DEBUG("pid = %d, device = 0x%x, open_count = %d\n",
-		  current->pid, dev->device, dev->open_count);
+	DRM_DEBUG("pid = %d, device = 0x%lx, open_count = %d\n",
+		  current->pid, (long)dev->device, dev->open_count);
 	return 0;
 }
 
@@ -106,7 +106,7 @@ int DRM(fasync)(int fd, struct file *filp, int on)
 	drm_device_t  *dev    = priv->dev;
 	int	      retcode;
 
-	DRM_DEBUG("fd = %d, device = 0x%x\n", fd, dev->device);
+	DRM_DEBUG("fd = %d, device = 0x%lx\n", fd, (long)dev->device);
 	retcode = fasync_helper(fd, filp, on, &dev->buf_async);
 	if (retcode < 0) return retcode;
 	return 0;
@@ -125,31 +125,21 @@ ssize_t DRM(read)(struct file *filp, char *buf, size_t count, loff_t *off)
 	int	      avail;
 	int	      send;
 	int	      cur;
-	DECLARE_WAITQUEUE(wait, current);
 
 	DRM_DEBUG("%p, %p\n", dev->buf_rp, dev->buf_wp);
 
-	add_wait_queue(&dev->buf_readers, &wait);
-	set_current_state(TASK_INTERRUPTIBLE);
 	while (dev->buf_rp == dev->buf_wp) {
 		DRM_DEBUG("  sleeping\n");
 		if (filp->f_flags & O_NONBLOCK) {
-			remove_wait_queue(&dev->buf_readers, &wait);
-			set_current_state(TASK_RUNNING);
 			return -EAGAIN;
 		}
-		schedule(); /* wait for dev->buf_readers */
+		interruptible_sleep_on(&dev->buf_readers);
 		if (signal_pending(current)) {
 			DRM_DEBUG("  interrupted\n");
-			remove_wait_queue(&dev->buf_readers, &wait);
-			set_current_state(TASK_RUNNING);
 			return -ERESTARTSYS;
 		}
 		DRM_DEBUG("  awake\n");
-		set_current_state(TASK_INTERRUPTIBLE);
 	}
-	remove_wait_queue(&dev->buf_readers, &wait);
-	set_current_state(TASK_RUNNING);
 
 	left  = (dev->buf_rp + DRM_BSZ - dev->buf_wp) % DRM_BSZ;
 	avail = DRM_BSZ - left;
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm_ioctl.h b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm_ioctl.h
index 0d8a1259a..d753cce0d 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm_ioctl.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm_ioctl.h
@@ -32,6 +32,7 @@
 #define __NO_VERSION__
 #include "drmP.h"
 
+
 int DRM(irq_busid)(struct inode *inode, struct file *filp,
 		   unsigned int cmd, unsigned long arg)
 {
@@ -40,9 +41,43 @@ int DRM(irq_busid)(struct inode *inode, struct file *filp,
 
 	if (copy_from_user(&p, (drm_irq_busid_t *)arg, sizeof(p)))
 		return -EFAULT;
+#ifdef __alpha__
+	{
+		int domain = p.busnum >> 8;
+		p.busnum &= 0xff;
+
+		/*
+		 * Find the hose the device is on (the domain number is the
+		 * hose index) and offset the bus by the root bus of that
+		 * hose.
+		 */
+                for(dev = pci_find_device(PCI_ANY_ID,PCI_ANY_ID,NULL);
+                    dev;
+                    dev = pci_find_device(PCI_ANY_ID,PCI_ANY_ID,dev)) {
+			struct pci_controller *hose = dev->sysdata;
+			
+			if (hose->index == domain) {
+				p.busnum += hose->bus->number;
+				break;
+			}
+		}
+	}
+#endif
 	dev = pci_find_slot(p.busnum, PCI_DEVFN(p.devnum, p.funcnum));
-	if (dev) p.irq = dev->irq;
-	else	 p.irq = 0;
+	if (!dev) {
+		DRM_ERROR("pci_find_slot failed for %d:%d:%d\n",
+			  p.busnum, p.devnum, p.funcnum);
+		p.irq = 0;
+		goto out;
+	}			
+	if (pci_enable_device(dev) != 0) {
+		DRM_ERROR("pci_enable_device failed for %d:%d:%d\n",
+			  p.busnum, p.devnum, p.funcnum);
+		p.irq = 0;
+		goto out;
+	}		
+	p.irq = dev->irq;
+ out:
 	DRM_DEBUG("%d:%d:%d => IRQ %d\n",
 		  p.busnum, p.devnum, p.funcnum, p.irq);
 	if (copy_to_user((drm_irq_busid_t *)arg, &p, sizeof(p)))
@@ -100,7 +135,7 @@ int DRM(setunique)(struct inode *inode, struct file *filp,
 
 	do {
 		struct pci_dev *pci_dev;
-                int b, d, f;
+                int domain, b, d, f;
                 char *p;
  
                 for(p = dev->unique; p && *p && *p != ':'; p++);
@@ -112,6 +147,27 @@ int DRM(setunique)(struct inode *inode, struct file *filp,
                 f = (int)simple_strtoul(p+1, &p, 10);
                 if (*p) break;
  
+		domain = b >> 8;
+		b &= 0xff;
+
+#ifdef __alpha__
+		/*
+		 * Find the hose the device is on (the domain number is the
+		 * hose index) and offset the bus by the root bus of that
+		 * hose.
+		 */
+                for(pci_dev = pci_find_device(PCI_ANY_ID,PCI_ANY_ID,NULL);
+                    pci_dev;
+                    pci_dev = pci_find_device(PCI_ANY_ID,PCI_ANY_ID,pci_dev)) {
+			struct pci_controller *hose = pci_dev->sysdata;
+			
+			if (hose->index == domain) {
+				b += hose->bus->number;
+				break;
+			}
+		}
+#endif
+
                 pci_dev = pci_find_slot(b, PCI_DEVFN(d,f));
                 if (pci_dev) {
 			dev->pdev = pci_dev;
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm_lists.h b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm_lists.h
index 5cd8cd47b..4a64df718 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm_lists.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm_lists.h
@@ -73,8 +73,8 @@ int DRM(waitlist_put)(drm_waitlist_t *bl, drm_buf_t *buf)
 
 	left = DRM_LEFTCOUNT(bl);
 	if (!left) {
-		DRM_ERROR("Overflow while adding buffer %d from pid %d\n",
-			  buf->idx, buf->pid);
+		DRM_ERROR("Overflow while adding buffer %d from filp %p\n",
+			  buf->idx, buf->filp);
 		return -EINVAL;
 	}
 #if __HAVE_DMA_HISTOGRAM
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm_lock.h b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm_lock.h
index c10cfe2c0..e9b17cc40 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm_lock.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm_lock.h
@@ -79,7 +79,7 @@ int DRM(lock_transfer)(drm_device_t *dev,
 {
 	unsigned int old, new, prev;
 
-	dev->lock.pid = 0;
+	dev->lock.filp = 0;
 	do {
 		old  = *lock;
 		new  = context | _DRM_LOCK_HELD;
@@ -92,19 +92,17 @@ int DRM(lock_free)(drm_device_t *dev,
 		   __volatile__ unsigned int *lock, unsigned int context)
 {
 	unsigned int old, new, prev;
-	pid_t        pid = dev->lock.pid;
 
-	dev->lock.pid = 0;
+	dev->lock.filp = 0;
 	do {
 		old  = *lock;
 		new  = 0;
 		prev = cmpxchg(lock, old, new);
 	} while (prev != old);
 	if (_DRM_LOCK_IS_HELD(old) && _DRM_LOCKING_CONTEXT(old) != context) {
-		DRM_ERROR("%d freed heavyweight lock held by %d (pid %d)\n",
+		DRM_ERROR("%d freed heavyweight lock held by %d\n",
 			  context,
-			  _DRM_LOCKING_CONTEXT(old),
-			  pid);
+			  _DRM_LOCKING_CONTEXT(old));
 		return 1;
 	}
 	wake_up_interruptible(&dev->lock.lock_queue);
@@ -237,7 +235,7 @@ int DRM(notifier)(void *priv)
 
 
 				/* Allow signal delivery if lock isn't held */
-	if (!_DRM_LOCK_IS_HELD(s->lock->lock)
+	if (!s->lock || !_DRM_LOCK_IS_HELD(s->lock->lock)
 	    || _DRM_LOCKING_CONTEXT(s->lock->lock) != s->context) return 1;
 
 				/* Otherwise, set flag to force call to
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm_os_linux.h b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm_os_linux.h
index a9ad02afe..585c67d4a 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm_os_linux.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm_os_linux.h
@@ -3,16 +3,17 @@
 #include <linux/interrupt.h>	/* For task queue support */
 #include <linux/delay.h>
 
+#define DRMFILE                         struct file *
 #define DRM_IOCTL_ARGS			struct inode *inode, struct file *filp, unsigned int cmd, unsigned long data
 #define DRM_ERR(d)			-(d)
 #define DRM_CURRENTPID			current->pid
 #define DRM_UDELAY(d)			udelay(d)
-#define DRM_READ8(addr)			readb(addr)
-#define DRM_READ32(addr)		readl(addr)
-#define DRM_WRITE8(addr, val)		writeb(val, addr)
-#define DRM_WRITE32(addr, val)		writel(val, addr)
-#define DRM_READMEMORYBARRIER()		mb()
-#define DRM_WRITEMEMORYBARRIER()	wmb()
+#define DRM_READ8(map, offset)		readb(((unsigned long)(map)->handle) + (offset))
+#define DRM_READ32(map, offset)		readl(((unsigned long)(map)->handle) + (offset))
+#define DRM_WRITE8(map, offset, val)	writeb(val, ((unsigned long)(map)->handle) + (offset))
+#define DRM_WRITE32(map, offset, val)	writel(val, ((unsigned long)(map)->handle) + (offset))
+#define DRM_READMEMORYBARRIER(map)	mb()
+#define DRM_WRITEMEMORYBARRIER(map)	wmb()
 #define DRM_DEVICE	drm_file_t	*priv	= filp->private_data; \
 			drm_device_t	*dev	= priv->dev
 
@@ -42,7 +43,7 @@
 
 /* malloc/free without the overhead of DRM(alloc) */
 #define DRM_MALLOC(x) kmalloc(x, GFP_KERNEL)
-#define DRM_FREE(x) kfree(x)
+#define DRM_FREE(x,size) kfree(x)
 
 #define DRM_GETSAREA()							 \
 do { 									 \
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm_proc.h b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm_proc.h
index 24e8556fc..510df6722 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm_proc.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm_proc.h
@@ -148,10 +148,10 @@ static int DRM(name_info)(char *buf, char **start, off_t offset, int request,
 	*eof   = 0;
 
 	if (dev->unique) {
-		DRM_PROC_PRINT("%s 0x%x %s\n",
-			       dev->name, dev->device, dev->unique);
+		DRM_PROC_PRINT("%s 0x%lx %s\n",
+			       dev->name, (long)dev->device, dev->unique);
 	} else {
-		DRM_PROC_PRINT("%s 0x%x\n", dev->name, dev->device);
+		DRM_PROC_PRINT("%s 0x%lx\n", dev->name, (long)dev->device);
 	}
 
 	if (len > request + offset) return request;
@@ -449,7 +449,8 @@ static int DRM(_vma_info)(char *buf, char **start, off_t offset, int request,
 		for (i = vma->vm_start; i < vma->vm_end; i += PAGE_SIZE) {
 			pgd = pgd_offset(vma->vm_mm, i);
 			pmd = pmd_offset(pgd, i);
-			pte = pte_offset(pmd, i);
+			preempt_disable();
+			pte = pte_offset_map(pmd, i);
 			if (pte_present(*pte)) {
 				address = __pa(pte_page(*pte))
 					+ (i & (PAGE_SIZE-1));
@@ -465,6 +466,8 @@ static int DRM(_vma_info)(char *buf, char **start, off_t offset, int request,
 			} else {
 				DRM_PROC_PRINT("      0x%08lx\n", i);
 			}
+			pte_unmap(pte);
+			preempt_enable();
 		}
 #endif
 	}
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/gamma_dma.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/gamma_dma.c
index 094f51d65..a3c21d110 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/gamma_dma.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/gamma_dma.c
@@ -32,6 +32,8 @@
 #define __NO_VERSION__
 #include "gamma.h"
 #include "drmP.h"
+#include "drm.h"
+#include "gamma_drm.h"
 #include "gamma_drv.h"
 
 #include <linux/interrupt.h>	/* For task queue support */
@@ -188,7 +190,7 @@ static int gamma_do_dma(drm_device_t *dev, int locked)
 		if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
 			DRM_ERROR("Dispatching buffer %d from pid %d"
 				  " \"while locked\", but no lock held\n",
-				  buf->idx, buf->pid);
+				  buf->idx, current->pid);
 		}
 	} else {
 		if (!locked && !gamma_lock_take(&dev->lock.hw_lock->lock,
@@ -340,7 +342,8 @@ again:
 	return retcode;
 }
 
-static int gamma_dma_priority(drm_device_t *dev, drm_dma_t *d)
+static int gamma_dma_priority(struct file *filp, 
+			      drm_device_t *dev, drm_dma_t *d)
 {
 	unsigned long	  address;
 	unsigned long	  length;
@@ -378,15 +381,15 @@ static int gamma_dma_priority(drm_device_t *dev, drm_dma_t *d)
 			continue;
 		}
 		buf = dma->buflist[ idx ];
-		if (buf->pid != current->pid) {
-			DRM_ERROR("Process %d using buffer owned by %d\n",
-				  current->pid, buf->pid);
+		if (buf->filp != filp) {
+			DRM_ERROR("Process %d using buffer not owned\n",
+				  current->pid);
 			retcode = -EINVAL;
 			goto cleanup;
 		}
 		if (buf->list != DRM_LIST_NONE) {
-			DRM_ERROR("Process %d using %d's buffer on list %d\n",
-				  current->pid, buf->pid, buf->list);
+			DRM_ERROR("Process %d using buffer on list %d\n",
+				  current->pid, buf->list);
 			retcode = -EINVAL;
 			goto cleanup;
 		}
@@ -478,7 +481,8 @@ cleanup:
 	return retcode;
 }
 
-static int gamma_dma_send_buffers(drm_device_t *dev, drm_dma_t *d)
+static int gamma_dma_send_buffers(struct file *filp,
+				  drm_device_t *dev, drm_dma_t *d)
 {
 	DECLARE_WAITQUEUE(entry, current);
 	drm_buf_t	  *last_buf = NULL;
@@ -490,7 +494,7 @@ static int gamma_dma_send_buffers(drm_device_t *dev, drm_dma_t *d)
 		add_wait_queue(&last_buf->dma_wait, &entry);
 	}
 
-	if ((retcode = gamma_dma_enqueue(dev, d))) {
+	if ((retcode = gamma_dma_enqueue(filp, d))) {
 		if (d->flags & _DRM_DMA_BLOCK)
 			remove_wait_queue(&last_buf->dma_wait, &entry);
 		return retcode;
@@ -520,14 +524,13 @@ static int gamma_dma_send_buffers(drm_device_t *dev, drm_dma_t *d)
 			}
 		}
 		if (retcode) {
-			DRM_ERROR("ctx%d w%d p%d c%d i%d l%d %d/%d\n",
+			DRM_ERROR("ctx%d w%d p%d c%ld i%d l%d pid:%d\n",
 				  d->context,
 				  last_buf->waiting,
 				  last_buf->pending,
-				  DRM_WAITCOUNT(dev, d->context),
+				  (long)DRM_WAITCOUNT(dev, d->context),
 				  last_buf->idx,
 				  last_buf->list,
-				  last_buf->pid,
 				  current->pid);
 		}
 	}
@@ -560,15 +563,15 @@ int gamma_dma(struct inode *inode, struct file *filp, unsigned int cmd,
 
 	if (d.send_count) {
 		if (d.flags & _DRM_DMA_PRIORITY)
-			retcode = gamma_dma_priority(dev, &d);
+			retcode = gamma_dma_priority(filp, dev, &d);
 		else
-			retcode = gamma_dma_send_buffers(dev, &d);
+			retcode = gamma_dma_send_buffers(filp, dev, &d);
 	}
 
 	d.granted_count = 0;
 
 	if (!retcode && d.request_count) {
-		retcode = gamma_dma_get_buffers(dev, &d);
+		retcode = gamma_dma_get_buffers(filp, &d);
 	}
 
 	DRM_DEBUG("%d returning, granted = %d\n",
@@ -590,7 +593,7 @@ static int gamma_do_init_dma( drm_device_t *dev, drm_gamma_init_t *init )
 	drm_buf_t	    *buf;
 	int i;
 	struct list_head    *list;
-	unsigned int	    *pgt;
+	unsigned long	    *pgt;
 
 	DRM_DEBUG( "%s\n", __FUNCTION__ );
 
@@ -643,7 +646,7 @@ static int gamma_do_init_dma( drm_device_t *dev, drm_gamma_init_t *init )
 
  		for (i = 0; i < GLINT_DRI_BUF_COUNT; i++) {
 			buf = dma->buflist[i];
-			*pgt = (unsigned int)buf->address + 0x07;
+			*pgt = (unsigned long)buf->address + 0x07;
 			pgt++;
 		}
 
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/gamma_drv.h b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/gamma_drv.h
index e7d0c8960..2f7d3588f 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/gamma_drv.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/gamma_drv.h
@@ -42,16 +42,6 @@ typedef struct drm_gamma_private {
 	drm_map_t *mmio3;
 } drm_gamma_private_t;
 
-#define LOCK_TEST_WITH_RETURN( dev )					\
-do {									\
-	if ( !_DRM_LOCK_IS_HELD( dev->lock.hw_lock->lock ) ||		\
-	     dev->lock.pid != current->pid ) {				\
-		DRM_ERROR( "%s called without lock held\n",		\
-			   __FUNCTION__ );				\
-		return -EINVAL;						\
-	}								\
-} while (0)
-
 				/* gamma_dma.c */
 extern int gamma_dma_init( struct inode *inode, struct file *filp,
 			 unsigned int cmd, unsigned long arg );
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i810.h b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i810.h
index 64309f59a..f37cb2e87 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i810.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i810.h
@@ -41,11 +41,52 @@
 #define __HAVE_MTRR		1
 #define __HAVE_CTX_BITMAP	1
 
+#define DRIVER_AUTHOR		"VA Linux Systems Inc."
+
+#define DRIVER_NAME		"i810"
+#define DRIVER_DESC		"Intel i810"
+#define DRIVER_DATE		"20020211"
+
+/* Interface history
+ *
+ * 1.1   - XFree86 4.1
+ * 1.2   - XvMC interfaces
+ *       - XFree86 4.2
+ * 1.2.1 - Disable copying code (leave stub ioctls for backwards compatibility)
+ *       - Remove requirement for interrupt (leave stubs again)
+ */
+#define DRIVER_MAJOR		1
+#define DRIVER_MINOR		2
+#define DRIVER_PATCHLEVEL	1
+
+#define DRIVER_IOCTLS							    \
+	[DRM_IOCTL_NR(DRM_IOCTL_I810_INIT)]   = { i810_dma_init,    1, 1 }, \
+   	[DRM_IOCTL_NR(DRM_IOCTL_I810_VERTEX)] = { i810_dma_vertex,  1, 0 }, \
+   	[DRM_IOCTL_NR(DRM_IOCTL_I810_CLEAR)]  = { i810_clear_bufs,  1, 0 }, \
+      	[DRM_IOCTL_NR(DRM_IOCTL_I810_FLUSH)]  = { i810_flush_ioctl, 1, 0 }, \
+   	[DRM_IOCTL_NR(DRM_IOCTL_I810_GETAGE)] = { i810_getage,      1, 0 }, \
+	[DRM_IOCTL_NR(DRM_IOCTL_I810_GETBUF)] = { i810_getbuf,      1, 0 }, \
+   	[DRM_IOCTL_NR(DRM_IOCTL_I810_SWAP)]   = { i810_swap_bufs,   1, 0 }, \
+   	[DRM_IOCTL_NR(DRM_IOCTL_I810_COPY)]   = { i810_copybuf,     1, 0 }, \
+   	[DRM_IOCTL_NR(DRM_IOCTL_I810_DOCOPY)] = { i810_docopy,      1, 0 }, \
+	[DRM_IOCTL_NR(DRM_IOCTL_I810_OV0INFO)] = { i810_ov0_info,   1, 0 }, \
+	[DRM_IOCTL_NR(DRM_IOCTL_I810_FSTATUS)] = { i810_fstatus,    1, 0 }, \
+	[DRM_IOCTL_NR(DRM_IOCTL_I810_OV0FLIP)] = { i810_ov0_flip,   1, 0 }, \
+	[DRM_IOCTL_NR(DRM_IOCTL_I810_MC)]      = { i810_dma_mc,     1, 1 }, \
+	[DRM_IOCTL_NR(DRM_IOCTL_I810_RSTATUS)] = { i810_rstatus,    1, 0 }
+
+
+#define __HAVE_COUNTERS         4
+#define __HAVE_COUNTER6         _DRM_STAT_IRQ
+#define __HAVE_COUNTER7         _DRM_STAT_PRIMARY
+#define __HAVE_COUNTER8         _DRM_STAT_SECONDARY
+#define __HAVE_COUNTER9         _DRM_STAT_DMA
+
 /* Driver customization:
  */
 #define __HAVE_RELEASE		1
 #define DRIVER_RELEASE() do {						\
-	i810_reclaim_buffers( dev, priv->pid );				\
+	i810_reclaim_buffers( filp );				\
 } while (0)
 
 /* DMA customization:
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i810_dma.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i810_dma.c
index ffe7f669a..de9345e3b 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i810_dma.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i810_dma.c
@@ -26,15 +26,25 @@
  *
  * Authors: Rickard E. (Rik) Faith <faith@valinux.com>
  *	    Jeff Hartmann <jhartmann@valinux.com>
- *          Keith Whitwell <keith_whitwell@yahoo.com>
+ *          Keith Whitwell <keith@tungstengraphics.com>
  *
  */
 
 #define __NO_VERSION__
 #include "i810.h"
 #include "drmP.h"
+#include "drm.h"
+#include "i810_drm.h"
 #include "i810_drv.h"
 #include <linux/interrupt.h>	/* For task queue support */
+#include <linux/delay.h>
+#include <linux/pagemap.h>
+
+#ifdef DO_MUNMAP_4_ARGS
+#define DO_MUNMAP(m, a, l)	do_munmap(m, a, l, 1)
+#else
+#define DO_MUNMAP(m, a, l)	do_munmap(m, a, l)
+#endif
 
 #define I810_BUF_FREE		2
 #define I810_BUF_CLIENT		1
@@ -43,30 +53,10 @@
 #define I810_BUF_UNMAPPED 0
 #define I810_BUF_MAPPED   1
 
-#define RING_LOCALS	unsigned int outring, ringmask; volatile char *virt;
-
-#define BEGIN_LP_RING(n) do {						\
-	if (0) DRM_DEBUG("BEGIN_LP_RING(%d) in %s\n", n, __FUNCTION__);	\
-	if (dev_priv->ring.space < n*4)					\
-		i810_wait_ring(dev, n*4);				\
-	dev_priv->ring.space -= n*4;					\
-	outring = dev_priv->ring.tail;					\
-	ringmask = dev_priv->ring.tail_mask;				\
-	virt = dev_priv->ring.virtual_start;				\
-} while (0)
-
-#define ADVANCE_LP_RING() do {				\
-	if (0) DRM_DEBUG("ADVANCE_LP_RING\n");			\
-	dev_priv->ring.tail = outring;			\
-	I810_WRITE(LP_RING + RING_TAIL, outring);	\
-} while(0)
-
-#define OUT_RING(n) do {				\
-	if (0) DRM_DEBUG("   OUT_RING %x\n", (int)(n));	\
-	*(volatile unsigned int *)(virt + outring) = n;	\
-	outring += 4;					\
-	outring &= ringmask;				\
-} while (0)
+#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,4,2)
+#define down_write down
+#define up_write up
+#endif
 
 static inline void i810_print_status_page(drm_device_t *dev)
 {
@@ -127,14 +117,14 @@ static int i810_freelist_put(drm_device_t *dev, drm_buf_t *buf)
 }
 
 static struct file_operations i810_buffer_fops = {
-	open:	 DRM(open),
-	flush:	 DRM(flush),
-	release: DRM(release),
-	ioctl:	 DRM(ioctl),
-	mmap:	 i810_mmap_buffers,
-	read:	 DRM(read),
-	fasync:	 DRM(fasync),
-      	poll:	 DRM(poll),
+	.open	 = DRM(open),
+	.flush	 = DRM(flush),
+	.release = DRM(release),
+	.ioctl	 = DRM(ioctl),
+	.mmap	 = i810_mmap_buffers,
+	.read	 = DRM(read),
+	.fasync  = DRM(fasync),
+      	.poll	 = DRM(poll),
 };
 
 int i810_mmap_buffers(struct file *filp, struct vm_area_struct *vma)
@@ -157,7 +147,7 @@ int i810_mmap_buffers(struct file *filp, struct vm_area_struct *vma)
    	buf_priv->currently_mapped = I810_BUF_MAPPED;
 	unlock_kernel();
 
-	if (remap_page_range(vma->vm_start,
+	if (remap_page_range(DRM_RPR_ARG(vma) vma->vm_start,
 			     VM_OFFSET(vma),
 			     vma->vm_end - vma->vm_start,
 			     vma->vm_page_prot)) return -EAGAIN;
@@ -175,11 +165,7 @@ static int i810_map_buffer(drm_buf_t *buf, struct file *filp)
 
 	if(buf_priv->currently_mapped == I810_BUF_MAPPED) return -EINVAL;
 
-#if LINUX_VERSION_CODE <= 0x020402
-	down( &current->mm->mmap_sem );
-#else
 	down_write( &current->mm->mmap_sem );
-#endif
 	old_fops = filp->f_op;
 	filp->f_op = &i810_buffer_fops;
 	dev_priv->mmap_buffer = buf;
@@ -191,15 +177,12 @@ static int i810_map_buffer(drm_buf_t *buf, struct file *filp)
 	filp->f_op = old_fops;
 	if ((unsigned long)buf_priv->virtual > -1024UL) {
 		/* Real error */
-		DRM_DEBUG("mmap error\n");
+		DRM_ERROR("mmap error\n");
 		retcode = (signed int)buf_priv->virtual;
 		buf_priv->virtual = 0;
 	}
-#if LINUX_VERSION_CODE <= 0x020402
-	up( &current->mm->mmap_sem );
-#else
 	up_write( &current->mm->mmap_sem );
-#endif
+
 	return retcode;
 }
 
@@ -210,19 +193,13 @@ static int i810_unmap_buffer(drm_buf_t *buf)
 
 	if(buf_priv->currently_mapped != I810_BUF_MAPPED)
 		return -EINVAL;
-#if LINUX_VERSION_CODE <= 0x020402
-	down( &current->mm->mmap_sem );
-#else
-	down_write( &current->mm->mmap_sem );
-#endif
-	retcode = do_munmap(current->mm,
+
+	down_write(&current->mm->mmap_sem);
+	retcode = DO_MUNMAP(current->mm,
 			    (unsigned long)buf_priv->virtual,
 			    (size_t) buf->total);
-#if LINUX_VERSION_CODE <= 0x020402
-	up( &current->mm->mmap_sem );
-#else
-	up_write( &current->mm->mmap_sem );
-#endif
+	up_write(&current->mm->mmap_sem);
+
    	buf_priv->currently_mapped = I810_BUF_UNMAPPED;
    	buf_priv->virtual = 0;
 
@@ -232,7 +209,6 @@ static int i810_unmap_buffer(drm_buf_t *buf)
 static int i810_dma_get_buffer(drm_device_t *dev, drm_i810_dma_t *d,
 			       struct file *filp)
 {
-	drm_file_t	  *priv	  = filp->private_data;
 	drm_buf_t	  *buf;
 	drm_i810_buf_priv_t *buf_priv;
 	int retcode = 0;
@@ -247,10 +223,10 @@ static int i810_dma_get_buffer(drm_device_t *dev, drm_i810_dma_t *d,
 	retcode = i810_map_buffer(buf, filp);
 	if(retcode) {
 		i810_freelist_put(dev, buf);
-	   	DRM_DEBUG("mapbuf failed, retcode %d\n", retcode);
+	   	DRM_ERROR("mapbuf failed, retcode %d\n", retcode);
 		return retcode;
 	}
-	buf->pid     = priv->pid;
+	buf->filp = filp;
 	buf_priv = buf->dev_private;
 	d->granted = 1;
    	d->request_idx = buf->idx;
@@ -303,8 +279,6 @@ static int i810_wait_ring(drm_device_t *dev, int n)
 
 	end = jiffies + (HZ*3);
    	while (ring->space < n) {
-	   	int i;
-
 	   	ring->head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
 	   	ring->space = ring->head - (ring->tail+8);
 		if (ring->space < 0) ring->space += ring->Size;
@@ -313,13 +287,12 @@ static int i810_wait_ring(drm_device_t *dev, int n)
 		   end = jiffies + (HZ*3);
 
 	   	iters++;
-		if((signed)(end - jiffies) <= 0) {
+		if(time_before(end, jiffies)) {
 		   	DRM_ERROR("space: %d wanted %d\n", ring->space, n);
 		   	DRM_ERROR("lockup\n");
 		   	goto out_wait_ring;
 		}
-
-	   	for (i = 0 ; i < 2000 ; i++) ;
+		udelay(1);
 	}
 
 out_wait_ring:
@@ -882,8 +855,10 @@ static int i810_flush_queue(drm_device_t *dev)
 }
 
 /* Must be called with the lock held */
-void i810_reclaim_buffers(drm_device_t *dev, pid_t pid)
+void i810_reclaim_buffers(struct file *filp)
 {
+	drm_file_t    *priv   = filp->private_data;
+	drm_device_t  *dev    = priv->dev;
 	drm_device_dma_t *dma = dev->dma;
 	int		 i;
 
@@ -897,7 +872,7 @@ void i810_reclaim_buffers(drm_device_t *dev, pid_t pid)
 	   	drm_buf_t *buf = dma->buflist[ i ];
 	   	drm_i810_buf_priv_t *buf_priv = buf->dev_private;
 
-		if (buf->pid == pid && buf_priv) {
+		if (buf->filp == filp && buf_priv) {
 			int used = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT,
 					   I810_BUF_FREE);
 
@@ -1178,7 +1153,8 @@ int i810_ov0_info(struct inode *inode, struct file *filp,
 
 	data.offset = dev_priv->overlay_offset;
 	data.physical = dev_priv->overlay_physical;
-	copy_to_user((drm_i810_overlay_t *)arg,&data,sizeof(data));
+	if (copy_to_user((drm_i810_overlay_t *)arg,&data,sizeof(data)))
+		return -EFAULT;
 	return 0;
 }
 
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i810_drv.h b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i810_drv.h
index 106abf563..bbb570bc6 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i810_drv.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i810_drv.h
@@ -88,7 +88,7 @@ extern int  i810_dma_init(struct inode *inode, struct file *filp,
 			  unsigned int cmd, unsigned long arg);
 extern int  i810_flush_ioctl(struct inode *inode, struct file *filp,
 			     unsigned int cmd, unsigned long arg);
-extern void i810_reclaim_buffers(drm_device_t *dev, pid_t pid);
+extern void i810_reclaim_buffers(struct file *filp);
 extern int  i810_getage(struct inode *inode, struct file *filp,
 			unsigned int cmd, unsigned long arg);
 extern int i810_mmap_buffers(struct file *filp, struct vm_area_struct *vma);
@@ -136,6 +136,33 @@ int i810_clear_bufs(struct inode *inode, struct file *filp,
 #define I810_READ16(reg)	I810_DEREF16(reg)
 #define I810_WRITE16(reg,val)	do { I810_DEREF16(reg) = val; } while (0)
 
+#define I810_VERBOSE 0
+#define RING_LOCALS	unsigned int outring, ringmask; \
+                        volatile char *virt;
+
+#define BEGIN_LP_RING(n) do {						\
+	if (I810_VERBOSE)                                               \
+           DRM_DEBUG("BEGIN_LP_RING(%d) in %s\n", n, __FUNCTION__);	\
+	if (dev_priv->ring.space < n*4)					\
+		i810_wait_ring(dev, n*4);				\
+	dev_priv->ring.space -= n*4;					\
+	outring = dev_priv->ring.tail;					\
+	ringmask = dev_priv->ring.tail_mask;				\
+	virt = dev_priv->ring.virtual_start;				\
+} while (0)
+
+#define ADVANCE_LP_RING() do {				        \
+	if (I810_VERBOSE) DRM_DEBUG("ADVANCE_LP_RING\n");    	\
+	dev_priv->ring.tail = outring;		        	\
+	I810_WRITE(LP_RING + RING_TAIL, outring);	        \
+} while(0)
+
+#define OUT_RING(n) do {  				                \
+	if (I810_VERBOSE) DRM_DEBUG("   OUT_RING %x\n", (int)(n));	\
+	*(volatile unsigned int *)(virt + outring) = n;	                \
+	outring += 4;					                \
+	outring &= ringmask;			                        \
+} while (0)
 
 #define GFX_OP_USER_INTERRUPT 		((0<<29)|(2<<23))
 #define GFX_OP_BREAKPOINT_INTERRUPT	((0<<29)|(1<<23))
@@ -198,6 +225,7 @@ int i810_clear_bufs(struct inode *inode, struct file *filp,
 
 #define CMD_OP_Z_BUFFER_INFO     ((0x0<<29)|(0x16<<23))
 #define CMD_OP_DESTBUFFER_INFO   ((0x0<<29)|(0x15<<23))
+#define CMD_OP_FRONTBUFFER_INFO  ((0x0<<29)|(0x14<<23))
 
 #define BR00_BITBLT_CLIENT   0x40000000
 #define BR00_OP_COLOR_BLT    0x10000000
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i830.h b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i830.h
index b97521882..a351a4cff 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i830.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i830.h
@@ -45,22 +45,37 @@
 
 #define DRIVER_NAME		"i830"
 #define DRIVER_DESC		"Intel 830M"
-#define DRIVER_DATE		"20020828"
+#define DRIVER_DATE		"20021108"
 
+/* Interface history:
+ *
+ * 1.1: Original.
+ * 1.2: ?
+ * 1.3: New irq emit/wait ioctls.
+ *      New pageflip ioctl.
+ *      New getparam ioctl.
+ *      State for texunits 3&4 in sarea.
+ *      New (alternative) layout for texture state.
+ */
 #define DRIVER_MAJOR		1
-#define DRIVER_MINOR		2
-#define DRIVER_PATCHLEVEL	1
+#define DRIVER_MINOR		3
+#define DRIVER_PATCHLEVEL	2
 
 #define DRIVER_IOCTLS							    \
 	[DRM_IOCTL_NR(DRM_IOCTL_I830_INIT)]   = { i830_dma_init,    1, 1 }, \
-   	[DRM_IOCTL_NR(DRM_IOCTL_I830_VERTEX)] = { i830_dma_vertex,  1, 0 }, \
-   	[DRM_IOCTL_NR(DRM_IOCTL_I830_CLEAR)]  = { i830_clear_bufs,  1, 0 }, \
-      	[DRM_IOCTL_NR(DRM_IOCTL_I830_FLUSH)]  = { i830_flush_ioctl, 1, 0 }, \
-   	[DRM_IOCTL_NR(DRM_IOCTL_I830_GETAGE)] = { i830_getage,      1, 0 }, \
+	[DRM_IOCTL_NR(DRM_IOCTL_I830_VERTEX)] = { i830_dma_vertex,  1, 0 }, \
+	[DRM_IOCTL_NR(DRM_IOCTL_I830_CLEAR)]  = { i830_clear_bufs,  1, 0 }, \
+	[DRM_IOCTL_NR(DRM_IOCTL_I830_FLUSH)]  = { i830_flush_ioctl, 1, 0 }, \
+	[DRM_IOCTL_NR(DRM_IOCTL_I830_GETAGE)] = { i830_getage,      1, 0 }, \
 	[DRM_IOCTL_NR(DRM_IOCTL_I830_GETBUF)] = { i830_getbuf,      1, 0 }, \
-   	[DRM_IOCTL_NR(DRM_IOCTL_I830_SWAP)]   = { i830_swap_bufs,   1, 0 }, \
-   	[DRM_IOCTL_NR(DRM_IOCTL_I830_COPY)]   = { i830_copybuf,     1, 0 }, \
-   	[DRM_IOCTL_NR(DRM_IOCTL_I830_DOCOPY)] = { i830_docopy,      1, 0 },
+	[DRM_IOCTL_NR(DRM_IOCTL_I830_SWAP)]   = { i830_swap_bufs,   1, 0 }, \
+	[DRM_IOCTL_NR(DRM_IOCTL_I830_COPY)]   = { i830_copybuf,     1, 0 }, \
+	[DRM_IOCTL_NR(DRM_IOCTL_I830_DOCOPY)] = { i830_docopy,      1, 0 }, \
+	[DRM_IOCTL_NR(DRM_IOCTL_I830_FLIP)]   = { i830_flip_bufs,   1, 0 }, \
+	[DRM_IOCTL_NR(DRM_IOCTL_I830_IRQ_EMIT)] = { i830_irq_emit,  1, 0 }, \
+	[DRM_IOCTL_NR(DRM_IOCTL_I830_IRQ_WAIT)] = { i830_irq_wait,  1, 0 }, \
+	[DRM_IOCTL_NR(DRM_IOCTL_I830_GETPARAM)] = { i830_getparam,  1, 0 }, \
+	[DRM_IOCTL_NR(DRM_IOCTL_I830_SETPARAM)] = { i830_setparam,  1, 0 } 
 
 #define __HAVE_COUNTERS         4
 #define __HAVE_COUNTER6         _DRM_STAT_IRQ
@@ -72,7 +87,7 @@
  */
 #define __HAVE_RELEASE		1
 #define DRIVER_RELEASE() do {						\
-	i830_reclaim_buffers( dev, priv->pid );				\
+	i830_reclaim_buffers( filp );				\
 } while (0)
 
 /* DMA customization:
@@ -87,10 +102,49 @@
 	i830_dma_quiescent( dev );					\
 } while (0)
 
-/* Don't need an irq any more.  The template code will make sure that
- * a noop stub is generated for compatibility.
+
+/* Driver will work either way: IRQ's save cpu time when waiting for
+ * the card, but are subject to subtle interactions between bios,
+ * hardware and the driver.
+ */
+#define USE_IRQS 0
+
+
+#if USE_IRQS
+#define __HAVE_DMA_IRQ		1
+#define __HAVE_SHARED_IRQ	1
+
+#define DRIVER_PREINSTALL() do {			\
+	drm_i830_private_t *dev_priv =			\
+		(drm_i830_private_t *)dev->dev_private;	\
+							\
+   	I830_WRITE16( I830REG_HWSTAM, 0xffff );	\
+        I830_WRITE16( I830REG_INT_MASK_R, 0x0 );	\
+      	I830_WRITE16( I830REG_INT_ENABLE_R, 0x0 );	\
+} while (0)
+
+
+#define DRIVER_POSTINSTALL() do {				\
+	drm_i830_private_t *dev_priv =				\
+		(drm_i830_private_t *)dev->dev_private;		\
+   	I830_WRITE16( I830REG_INT_ENABLE_R, 0x2 );		\
+   	atomic_set(&dev_priv->irq_received, 0);			\
+   	atomic_set(&dev_priv->irq_emitted, 0);			\
+	init_waitqueue_head(&dev_priv->irq_queue);		\
+} while (0)
+
+
+/* This gets called too late to be useful: dev_priv has already been
+ * freed.
  */
-#define __HAVE_DMA_IRQ		0
+#define DRIVER_UNINSTALL() do {					\
+} while (0)
+
+#else
+#define __HAVE_DMA_IRQ          0
+#endif
+
+
 
 /* Buffer customization:
  */
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i830_dma.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i830_dma.c
index 667aa0f14..d2555c922 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i830_dma.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i830_dma.c
@@ -38,6 +38,7 @@
 #include "i830_drm.h"
 #include "i830_drv.h"
 #include <linux/interrupt.h>	/* For task queue support */
+#include <linux/pagemap.h>     /* For FASTCALL on unlock_page() */
 #include <linux/delay.h>
 
 #ifdef DO_MUNMAP_4_ARGS
@@ -53,8 +54,6 @@
 #define I830_BUF_UNMAPPED 0
 #define I830_BUF_MAPPED   1
 
-#define RING_LOCALS	unsigned int outring, ringmask; volatile char *virt;
-
 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,4,2)
 #define down_write down
 #define up_write up
@@ -67,32 +66,6 @@
 #define UnlockPage(page)	unlock_page(page)
 #endif
 
-#define I830_VERBOSE 0
-
-#define BEGIN_LP_RING(n) do {				\
-	if (I830_VERBOSE)				\
-		printk("BEGIN_LP_RING(%d) in %s\n",	\
-			  n, __FUNCTION__);		\
-	if (dev_priv->ring.space < n*4) 		\
-		i830_wait_ring(dev, n*4);		\
-	dev_priv->ring.space -= n*4;			\
-	outring = dev_priv->ring.tail;			\
-	ringmask = dev_priv->ring.tail_mask;		\
-	virt = dev_priv->ring.virtual_start;		\
-} while (0)
-
-#define ADVANCE_LP_RING() do {					\
-	if (I830_VERBOSE) printk("ADVANCE_LP_RING %x\n", outring);	\
-	dev_priv->ring.tail = outring;				\
-	I830_WRITE(LP_RING + RING_TAIL, outring);		\
-} while(0)
-
-#define OUT_RING(n) do {						\
-	if (I830_VERBOSE) printk("   OUT_RING %x\n", (int)(n));	\
-	*(volatile unsigned int *)(virt + outring) = n;			\
-	outring += 4;							\
-	outring &= ringmask;						\
-} while (0)
 
 static inline void i830_print_status_page(drm_device_t *dev)
 {
@@ -158,7 +131,7 @@ static struct file_operations i830_buffer_fops = {
 	.ioctl	 = DRM(ioctl),
 	.mmap	 = i830_mmap_buffers,
 	.read	 = DRM(read),
-	.fasync	 = DRM(fasync),
+	.fasync  = DRM(fasync),
       	.poll	 = DRM(poll),
 };
 
@@ -244,7 +217,6 @@ static int i830_unmap_buffer(drm_buf_t *buf)
 static int i830_dma_get_buffer(drm_device_t *dev, drm_i830_dma_t *d, 
 			       struct file *filp)
 {
-	drm_file_t	  *priv	  = filp->private_data;
 	drm_buf_t	  *buf;
 	drm_i830_buf_priv_t *buf_priv;
 	int retcode = 0;
@@ -252,7 +224,7 @@ static int i830_dma_get_buffer(drm_device_t *dev, drm_i830_dma_t *d,
 	buf = i830_freelist_get(dev);
 	if (!buf) {
 		retcode = -ENOMEM;
-	   	DRM_ERROR("retcode=%d\n", retcode);
+	   	DRM_DEBUG("retcode=%d\n", retcode);
 		return retcode;
 	}
    
@@ -262,7 +234,7 @@ static int i830_dma_get_buffer(drm_device_t *dev, drm_i830_dma_t *d,
 	   	DRM_ERROR("mapbuf failed, retcode %d\n", retcode);
 		return retcode;
 	}
-	buf->pid     = priv->pid;
+	buf->filp = filp;
 	buf_priv = buf->dev_private;	
 	d->granted = 1;
    	d->request_idx = buf->idx;
@@ -286,12 +258,21 @@ static int i830_dma_cleanup(drm_device_t *dev)
 					 dev_priv->ring.Size);
 		}
 	   	if(dev_priv->hw_status_page != 0UL) {
-		   	pci_free_consistent(dev->pdev, PAGE_SIZE,
+			pci_free_consistent(dev->pdev, PAGE_SIZE,
 					    (void *)dev_priv->hw_status_page,
 					    dev_priv->dma_status_page);
 		   	/* Need to rewrite hardware status page */
 		   	I830_WRITE(0x02080, 0x1ffff000);
 		}
+
+		/* Disable interrupts here because after dev_private
+		 * is freed, it's too late.
+		 */
+		if (dev->irq) {
+			I830_WRITE16( I830REG_INT_MASK_R, 0xffff );
+			I830_WRITE16( I830REG_INT_ENABLE_R, 0x0 );
+		}
+
 	   	DRM(free)(dev->dev_private, sizeof(drm_i830_private_t), 
 			 DRM_MEM_DRIVER);
 	   	dev->dev_private = NULL;
@@ -305,7 +286,7 @@ static int i830_dma_cleanup(drm_device_t *dev)
    	return 0;
 }
 
-static int i830_wait_ring(drm_device_t *dev, int n)
+int i830_wait_ring(drm_device_t *dev, int n, const char *caller)
 {
    	drm_i830_private_t *dev_priv = dev->dev_private;
    	drm_i830_ring_buffer_t *ring = &(dev_priv->ring);
@@ -331,6 +312,7 @@ static int i830_wait_ring(drm_device_t *dev, int n)
 		   	goto out_wait_ring;
 		}
 		udelay(1);
+		dev_priv->sarea_priv->perf_boxes |= I830_BOX_WAIT;
 	}
 
 out_wait_ring:   
@@ -346,6 +328,9 @@ static void i830_kernel_lost_context(drm_device_t *dev)
      	ring->tail = I830_READ(LP_RING + RING_TAIL) & TAIL_ADDR;
      	ring->space = ring->head - (ring->tail+8);
      	if (ring->space < 0) ring->space += ring->Size;
+
+	if (ring->head == ring->tail)
+		dev_priv->sarea_priv->perf_boxes |= I830_BOX_RING_EMPTY;
 }
 
 static int i830_freelist_init(drm_device_t *dev, drm_i830_private_t *dev_priv)
@@ -460,6 +445,8 @@ static int i830_dma_initialize(drm_device_t *dev,
 
 	dev_priv->back_pitch = init->back_pitch;
 	dev_priv->depth_pitch = init->depth_pitch;
+	dev_priv->do_boxes = 0;
+	dev_priv->use_mi_batchbuffer_start = 0;
 
    	/* Program Hardware Status Page */
    	dev_priv->hw_status_page =
@@ -474,7 +461,7 @@ static int i830_dma_initialize(drm_device_t *dev,
    	memset((void *) dev_priv->hw_status_page, 0, PAGE_SIZE);
 	DRM_DEBUG("hw status page @ %lx\n", dev_priv->hw_status_page);
    
-	I830_WRITE(0x02080, dev_priv->dma_status_page);
+   	I830_WRITE(0x02080, virt_to_bus((void *)dev_priv->hw_status_page));
 	DRM_DEBUG("Enabled hardware status page\n");
    
    	/* Now we need to init our freelist */
@@ -535,11 +522,7 @@ static void i830EmitContextVerified( drm_device_t *dev,
 	unsigned int tmp;
 	RING_LOCALS;
 
-	BEGIN_LP_RING( I830_CTX_SETUP_SIZE + 2 );
-
-	OUT_RING( GFX_OP_STIPPLE );
-	OUT_RING( 0 );
-
+	BEGIN_LP_RING( I830_CTX_SETUP_SIZE + 4 );
 
 	for ( i = 0 ; i < I830_CTXREG_BLENDCOLR0 ; i++ ) {
 		tmp = code[i];
@@ -577,38 +560,44 @@ static void i830EmitContextVerified( drm_device_t *dev,
 	ADVANCE_LP_RING();
 }
 
-static void i830EmitTexVerified( drm_device_t *dev, 
-				 volatile unsigned int *code ) 
+static void i830EmitTexVerified( drm_device_t *dev, unsigned int *code ) 
 {
    	drm_i830_private_t *dev_priv = dev->dev_private;
 	int i, j = 0;
 	unsigned int tmp;
 	RING_LOCALS;
 
-	BEGIN_LP_RING( I830_TEX_SETUP_SIZE );
+	if (code[I830_TEXREG_MI0] == GFX_OP_MAP_INFO ||
+	    (code[I830_TEXREG_MI0] & ~(0xf*LOAD_TEXTURE_MAP0)) == 
+	    (STATE3D_LOAD_STATE_IMMEDIATE_2|4)) {
 
-	OUT_RING( GFX_OP_MAP_INFO );
-	OUT_RING( code[I830_TEXREG_MI1] );
-	OUT_RING( code[I830_TEXREG_MI2] );
-	OUT_RING( code[I830_TEXREG_MI3] );
-	OUT_RING( code[I830_TEXREG_MI4] );
-	OUT_RING( code[I830_TEXREG_MI5] );
+		BEGIN_LP_RING( I830_TEX_SETUP_SIZE );
 
-	for ( i = 6 ; i < I830_TEX_SETUP_SIZE ; i++ ) {
-		tmp = code[i];
-		OUT_RING( tmp ); 
-		j++;
-	} 
+		OUT_RING( code[I830_TEXREG_MI0] ); /* TM0LI */
+		OUT_RING( code[I830_TEXREG_MI1] ); /* TM0S0 */
+		OUT_RING( code[I830_TEXREG_MI2] ); /* TM0S1 */
+		OUT_RING( code[I830_TEXREG_MI3] ); /* TM0S2 */
+		OUT_RING( code[I830_TEXREG_MI4] ); /* TM0S3 */
+		OUT_RING( code[I830_TEXREG_MI5] ); /* TM0S4 */
+		
+		for ( i = 6 ; i < I830_TEX_SETUP_SIZE ; i++ ) {
+			tmp = code[i];
+			OUT_RING( tmp ); 
+			j++;
+		} 
 
-	if (j & 1) 
-		OUT_RING( 0 ); 
+		if (j & 1) 
+			OUT_RING( 0 ); 
 
-	ADVANCE_LP_RING();
+		ADVANCE_LP_RING();
+	}
+	else
+		printk("rejected packet %x\n", code[0]);
 }
 
 static void i830EmitTexBlendVerified( drm_device_t *dev, 
-				     volatile unsigned int *code,
-				     volatile unsigned int num)
+				      unsigned int *code,
+				      unsigned int num)
 {
    	drm_i830_private_t *dev_priv = dev->dev_private;
 	int i, j = 0;
@@ -618,7 +607,7 @@ static void i830EmitTexBlendVerified( drm_device_t *dev,
 	if (!num)
 		return;
 
-	BEGIN_LP_RING( num );
+	BEGIN_LP_RING( num + 1 );
 
 	for ( i = 0 ; i < num ; i++ ) {
 		tmp = code[i];
@@ -641,6 +630,8 @@ static void i830EmitTexPalette( drm_device_t *dev,
 	int i;
 	RING_LOCALS;
 
+	return;
+
 	BEGIN_LP_RING( 258 );
 
 	if(is_shared == 1) {
@@ -654,42 +645,41 @@ static void i830EmitTexPalette( drm_device_t *dev,
 		OUT_RING(palette[i]);
 	}
 	OUT_RING(0);
+	/* KW:  WHERE IS THE ADVANCE_LP_RING?  This is effectively a noop! 
+	 */
 }
 
 /* Need to do some additional checking when setting the dest buffer.
  */
 static void i830EmitDestVerified( drm_device_t *dev, 
-				  volatile unsigned int *code ) 
+				  unsigned int *code ) 
 {	
    	drm_i830_private_t *dev_priv = dev->dev_private;
 	unsigned int tmp;
 	RING_LOCALS;
 
-	BEGIN_LP_RING( I830_DEST_SETUP_SIZE + 6 );
+	BEGIN_LP_RING( I830_DEST_SETUP_SIZE + 10 );
+
 
 	tmp = code[I830_DESTREG_CBUFADDR];
-	if (tmp == dev_priv->front_di1) {
-		/* Don't use fence when front buffer rendering */
-		OUT_RING( CMD_OP_DESTBUFFER_INFO );
-		OUT_RING( BUF_3D_ID_COLOR_BACK | 
-			  BUF_3D_PITCH(dev_priv->back_pitch * dev_priv->cpp) );
-		OUT_RING( tmp );
+	if (tmp == dev_priv->front_di1 || tmp == dev_priv->back_di1) {
+		if (((int)outring) & 8) {
+			OUT_RING(0);
+			OUT_RING(0);
+		}
 
 		OUT_RING( CMD_OP_DESTBUFFER_INFO );
-		OUT_RING( BUF_3D_ID_DEPTH |
-			  BUF_3D_PITCH(dev_priv->depth_pitch * dev_priv->cpp));
-		OUT_RING( dev_priv->zi1 );
-	} else if(tmp == dev_priv->back_di1) {
-		OUT_RING( CMD_OP_DESTBUFFER_INFO );
 		OUT_RING( BUF_3D_ID_COLOR_BACK | 
 			  BUF_3D_PITCH(dev_priv->back_pitch * dev_priv->cpp) |
 			  BUF_3D_USE_FENCE);
 		OUT_RING( tmp );
+		OUT_RING( 0 );
 
 		OUT_RING( CMD_OP_DESTBUFFER_INFO );
 		OUT_RING( BUF_3D_ID_DEPTH | BUF_3D_USE_FENCE | 
 			  BUF_3D_PITCH(dev_priv->depth_pitch * dev_priv->cpp));
 		OUT_RING( dev_priv->zi1 );
+		OUT_RING( 0 );
 	} else {
 		DRM_ERROR("bad di1 %x (allow %x or %x)\n",
 			  tmp, dev_priv->front_di1, dev_priv->back_di1);
@@ -717,21 +707,35 @@ static void i830EmitDestVerified( drm_device_t *dev,
 		OUT_RING( 0 );
 	}
 
-	OUT_RING( code[I830_DESTREG_SENABLE] );
-
 	OUT_RING( GFX_OP_SCISSOR_RECT );
 	OUT_RING( code[I830_DESTREG_SR1] );
 	OUT_RING( code[I830_DESTREG_SR2] );
+	OUT_RING( 0 );
 
 	ADVANCE_LP_RING();
 }
 
+static void i830EmitStippleVerified( drm_device_t *dev, 
+				     unsigned int *code ) 
+{
+   	drm_i830_private_t *dev_priv = dev->dev_private;
+	RING_LOCALS;
+
+	BEGIN_LP_RING( 2 );
+	OUT_RING( GFX_OP_STIPPLE );
+	OUT_RING( code[1] );
+	ADVANCE_LP_RING();	
+}
+
+
 static void i830EmitState( drm_device_t *dev )
 {
    	drm_i830_private_t *dev_priv = dev->dev_private;
       	drm_i830_sarea_t *sarea_priv = dev_priv->sarea_priv;
 	unsigned int dirty = sarea_priv->dirty;
 
+	DRM_DEBUG("%s %x\n", __FUNCTION__, dirty);
+
 	if (dirty & I830_UPLOAD_BUFFERS) {
 		i830EmitDestVerified( dev, sarea_priv->BufferState );
 		sarea_priv->dirty &= ~I830_UPLOAD_BUFFERS;
@@ -765,17 +769,154 @@ static void i830EmitState( drm_device_t *dev )
 	}
 
 	if (dirty & I830_UPLOAD_TEX_PALETTE_SHARED) {
-	   i830EmitTexPalette(dev, sarea_priv->Palette[0], 0, 1);
+		i830EmitTexPalette(dev, sarea_priv->Palette[0], 0, 1);
 	} else {
-	   if (dirty & I830_UPLOAD_TEX_PALETTE_N(0)) {
-	      i830EmitTexPalette(dev, sarea_priv->Palette[0], 0, 0);
-	      sarea_priv->dirty &= ~I830_UPLOAD_TEX_PALETTE_N(0);
-	   }
-	   if (dirty & I830_UPLOAD_TEX_PALETTE_N(1)) {
-	      i830EmitTexPalette(dev, sarea_priv->Palette[1], 1, 0);
-	      sarea_priv->dirty &= ~I830_UPLOAD_TEX_PALETTE_N(1);
-	   }
+		if (dirty & I830_UPLOAD_TEX_PALETTE_N(0)) {
+			i830EmitTexPalette(dev, sarea_priv->Palette[0], 0, 0);
+			sarea_priv->dirty &= ~I830_UPLOAD_TEX_PALETTE_N(0);
+		}
+		if (dirty & I830_UPLOAD_TEX_PALETTE_N(1)) {
+			i830EmitTexPalette(dev, sarea_priv->Palette[1], 1, 0);
+			sarea_priv->dirty &= ~I830_UPLOAD_TEX_PALETTE_N(1);
+		}
+
+		/* 1.3:
+		 */
+#if 0
+		if (dirty & I830_UPLOAD_TEX_PALETTE_N(2)) {
+			i830EmitTexPalette(dev, sarea_priv->Palette2[0], 0, 0);
+			sarea_priv->dirty &= ~I830_UPLOAD_TEX_PALETTE_N(2);
+		}
+		if (dirty & I830_UPLOAD_TEX_PALETTE_N(3)) {
+			i830EmitTexPalette(dev, sarea_priv->Palette2[1], 1, 0);
+			sarea_priv->dirty &= ~I830_UPLOAD_TEX_PALETTE_N(2);
+		}
+#endif
+	}
+
+	/* 1.3:
+	 */
+	if (dirty & I830_UPLOAD_STIPPLE) {
+		i830EmitStippleVerified( dev, 
+					 sarea_priv->StippleState);
+		sarea_priv->dirty &= ~I830_UPLOAD_STIPPLE;
 	}
+
+	if (dirty & I830_UPLOAD_TEX2) {
+		i830EmitTexVerified( dev, sarea_priv->TexState2 );
+		sarea_priv->dirty &= ~I830_UPLOAD_TEX2;
+	}
+
+	if (dirty & I830_UPLOAD_TEX3) {
+		i830EmitTexVerified( dev, sarea_priv->TexState3 );
+		sarea_priv->dirty &= ~I830_UPLOAD_TEX3;
+	}
+
+
+	if (dirty & I830_UPLOAD_TEXBLEND2) {
+		i830EmitTexBlendVerified( 
+			dev, 
+			sarea_priv->TexBlendState2,
+			sarea_priv->TexBlendStateWordsUsed2);
+
+		sarea_priv->dirty &= ~I830_UPLOAD_TEXBLEND2;
+	}
+
+	if (dirty & I830_UPLOAD_TEXBLEND3) {
+		i830EmitTexBlendVerified( 
+			dev, 
+			sarea_priv->TexBlendState3,
+			sarea_priv->TexBlendStateWordsUsed3);
+		sarea_priv->dirty &= ~I830_UPLOAD_TEXBLEND3;
+	}
+}
+
+/* ================================================================
+ * Performance monitoring functions
+ */
+
+static void i830_fill_box( drm_device_t *dev,
+			   int x, int y, int w, int h,
+			   int r, int g, int b )
+{
+   	drm_i830_private_t *dev_priv = dev->dev_private;
+	u32 color;
+	unsigned int BR13, CMD;
+	RING_LOCALS;
+
+	BR13 = (0xF0 << 16) | (dev_priv->pitch * dev_priv->cpp) | (1<<24);
+	CMD = XY_COLOR_BLT_CMD;
+	x += dev_priv->sarea_priv->boxes[0].x1;
+	y += dev_priv->sarea_priv->boxes[0].y1;
+
+	if (dev_priv->cpp == 4) {
+		BR13 |= (1<<25);
+		CMD |= (XY_COLOR_BLT_WRITE_ALPHA | XY_COLOR_BLT_WRITE_RGB);
+		color = (((0xff) << 24) | (r << 16) | (g <<  8) | b);	
+	} else {
+		color = (((r & 0xf8) << 8) |
+			 ((g & 0xfc) << 3) |
+			 ((b & 0xf8) >> 3));
+	}
+
+	BEGIN_LP_RING( 6 );	    
+	OUT_RING( CMD );
+	OUT_RING( BR13 );
+	OUT_RING( (y << 16) | x );
+	OUT_RING( ((y+h) << 16) | (x+w) );
+
+ 	if ( dev_priv->current_page == 1 ) { 
+		OUT_RING( dev_priv->front_offset );
+ 	} else {	 
+		OUT_RING( dev_priv->back_offset );
+ 	} 
+
+	OUT_RING( color );
+	ADVANCE_LP_RING();
+}
+
+static void i830_cp_performance_boxes( drm_device_t *dev )
+{
+   	drm_i830_private_t *dev_priv = dev->dev_private;
+
+	/* Purple box for page flipping
+	 */
+	if ( dev_priv->sarea_priv->perf_boxes & I830_BOX_FLIP ) 
+		i830_fill_box( dev, 4, 4, 8, 8, 255, 0, 255 );
+
+	/* Red box if we have to wait for idle at any point
+	 */
+	if ( dev_priv->sarea_priv->perf_boxes & I830_BOX_WAIT ) 
+		i830_fill_box( dev, 16, 4, 8, 8, 255, 0, 0 );
+
+	/* Blue box: lost context?
+	 */
+	if ( dev_priv->sarea_priv->perf_boxes & I830_BOX_LOST_CONTEXT ) 
+		i830_fill_box( dev, 28, 4, 8, 8, 0, 0, 255 );
+
+	/* Yellow box for texture swaps
+	 */
+	if ( dev_priv->sarea_priv->perf_boxes & I830_BOX_TEXTURE_LOAD ) 
+		i830_fill_box( dev, 40, 4, 8, 8, 255, 255, 0 );
+
+	/* Green box if hardware never idles (as far as we can tell)
+	 */
+	if ( !(dev_priv->sarea_priv->perf_boxes & I830_BOX_RING_EMPTY) ) 
+		i830_fill_box( dev, 64, 4, 8, 8, 0, 255, 0 );
+
+
+	/* Draw bars indicating number of buffers allocated 
+	 * (not a great measure, easily confused)
+	 */
+	if (dev_priv->dma_used) {
+		int bar = dev_priv->dma_used / 10240;
+		if (bar > 100) bar = 100;
+		if (bar < 1) bar = 1;
+		i830_fill_box( dev, 4, 16, bar, 4, 196, 128, 128 );
+		dev_priv->dma_used = 0;
+	}
+
+	dev_priv->sarea_priv->perf_boxes = 0;
 }
 
 static void i830_dma_dispatch_clear( drm_device_t *dev, int flags, 
@@ -793,6 +934,15 @@ static void i830_dma_dispatch_clear( drm_device_t *dev, int flags,
 	unsigned int BR13, CMD, D_CMD;
 	RING_LOCALS;
 
+
+	if ( dev_priv->current_page == 1 ) {
+		unsigned int tmp = flags;
+
+		flags &= ~(I830_FRONT | I830_BACK);
+		if ( tmp & I830_FRONT ) flags |= I830_BACK;
+		if ( tmp & I830_BACK )  flags |= I830_FRONT;
+	}
+
   	i830_kernel_lost_context(dev);
 
 	switch(cpp) {
@@ -872,13 +1022,17 @@ static void i830_dma_dispatch_swap( drm_device_t *dev )
 	drm_clip_rect_t *pbox = sarea_priv->boxes;
 	int pitch = dev_priv->pitch;
 	int cpp = dev_priv->cpp;
-	int ofs = dev_priv->back_offset;
 	int i;
 	unsigned int CMD, BR13;
 	RING_LOCALS;
 
 	DRM_DEBUG("swapbuffers\n");
 
+  	i830_kernel_lost_context(dev);
+
+	if (dev_priv->do_boxes)
+		i830_cp_performance_boxes( dev );
+
 	switch(cpp) {
 	case 2: 
 		BR13 = (pitch * cpp) | (0xCC << 16) | (1<<24);
@@ -895,7 +1049,6 @@ static void i830_dma_dispatch_swap( drm_device_t *dev )
 		break;
 	}
 
-  	i830_kernel_lost_context(dev);
 
       	if (nbox > I830_NR_SAREA_CLIPRECTS)
      		nbox = I830_NR_SAREA_CLIPRECTS;
@@ -915,23 +1068,72 @@ static void i830_dma_dispatch_swap( drm_device_t *dev )
 		BEGIN_LP_RING( 8 );
 		OUT_RING( CMD );
 		OUT_RING( BR13 );
+		OUT_RING( (pbox->y1 << 16) | pbox->x1 );
+		OUT_RING( (pbox->y2 << 16) | pbox->x2 );
 
-		OUT_RING( (pbox->y1 << 16) |
-			  pbox->x1 );
-		OUT_RING( (pbox->y2 << 16) |
-			  pbox->x2 );
-
-		OUT_RING( dev_priv->front_offset );
-		OUT_RING( (pbox->y1 << 16) |
-			  pbox->x1 );
+		if (dev_priv->current_page == 0) 
+			OUT_RING( dev_priv->front_offset );
+		else
+			OUT_RING( dev_priv->back_offset );			
 
+		OUT_RING( (pbox->y1 << 16) | pbox->x1 );
 		OUT_RING( BR13 & 0xffff );
-		OUT_RING( ofs );
+
+		if (dev_priv->current_page == 0) 
+			OUT_RING( dev_priv->back_offset );			
+		else
+			OUT_RING( dev_priv->front_offset );
 
 		ADVANCE_LP_RING();
 	}
 }
 
+static void i830_dma_dispatch_flip( drm_device_t *dev )
+{
+   	drm_i830_private_t *dev_priv = dev->dev_private;
+	RING_LOCALS;
+
+	DRM_DEBUG( "%s: page=%d pfCurrentPage=%d\n", 
+		   __FUNCTION__, 
+		   dev_priv->current_page,
+		   dev_priv->sarea_priv->pf_current_page);
+
+  	i830_kernel_lost_context(dev);
+
+	if (dev_priv->do_boxes) {
+		dev_priv->sarea_priv->perf_boxes |= I830_BOX_FLIP;
+		i830_cp_performance_boxes( dev );
+	}
+
+
+	BEGIN_LP_RING( 2 );
+    	OUT_RING( INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE ); 
+	OUT_RING( 0 );
+	ADVANCE_LP_RING();
+
+	BEGIN_LP_RING( 6 );
+	OUT_RING( CMD_OP_DISPLAYBUFFER_INFO | ASYNC_FLIP );	
+	OUT_RING( 0 );
+	if ( dev_priv->current_page == 0 ) {
+		OUT_RING( dev_priv->back_offset );
+		dev_priv->current_page = 1;
+	} else {
+		OUT_RING( dev_priv->front_offset );
+		dev_priv->current_page = 0;
+	}
+	OUT_RING(0);
+	ADVANCE_LP_RING();
+
+
+	BEGIN_LP_RING( 2 );
+	OUT_RING( MI_WAIT_FOR_EVENT |
+		  MI_WAIT_FOR_PLANE_A_FLIP );
+	OUT_RING( 0 );
+	ADVANCE_LP_RING();
+	
+
+	dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
+}
 
 static void i830_dma_dispatch_vertex(drm_device_t *dev, 
 				     drm_buf_t *buf,
@@ -984,8 +1186,10 @@ static void i830_dma_dispatch_vertex(drm_device_t *dev,
 			 sarea_priv->vertex_prim |
 			 ((used/4)-2));
 
-		vp[used/4] = MI_BATCH_BUFFER_END;
-		used += 4;
+		if (dev_priv->use_mi_batchbuffer_start) {
+			vp[used/4] = MI_BATCH_BUFFER_END; 
+			used += 4; 
+		}
 		
 		if (used & 4) {
 			vp[used/4] = 0;
@@ -1008,11 +1212,21 @@ static void i830_dma_dispatch_vertex(drm_device_t *dev,
 				ADVANCE_LP_RING();
 			}
 
-			BEGIN_LP_RING(2);
-			OUT_RING( MI_BATCH_BUFFER_START | (2<<6) );
-			OUT_RING( start | MI_BATCH_NON_SECURE );
-			ADVANCE_LP_RING();
-			
+			if (dev_priv->use_mi_batchbuffer_start) {
+				BEGIN_LP_RING(2);
+				OUT_RING( MI_BATCH_BUFFER_START | (2<<6) );
+				OUT_RING( start | MI_BATCH_NON_SECURE );
+				ADVANCE_LP_RING();
+			} 
+			else {
+				BEGIN_LP_RING(4);
+				OUT_RING( MI_BATCH_BUFFER );
+				OUT_RING( start | MI_BATCH_NON_SECURE );
+				OUT_RING( start + used - 4 );
+				OUT_RING( 0 );
+				ADVANCE_LP_RING();
+			}
+
 		} while (++i < nbox);
 	}
 
@@ -1050,7 +1264,7 @@ void i830_dma_quiescent(drm_device_t *dev)
       	OUT_RING( 0 );
    	ADVANCE_LP_RING();
 
-	i830_wait_ring( dev, dev_priv->ring.Size - 8 );
+	i830_wait_ring( dev, dev_priv->ring.Size - 8, __FUNCTION__ );
 }
 
 static int i830_flush_queue(drm_device_t *dev)
@@ -1067,7 +1281,7 @@ static int i830_flush_queue(drm_device_t *dev)
       	OUT_RING( 0 );
       	ADVANCE_LP_RING();
 
-	i830_wait_ring( dev, dev_priv->ring.Size - 8 );
+	i830_wait_ring( dev, dev_priv->ring.Size - 8, __FUNCTION__ );
 
    	for (i = 0; i < dma->buf_count; i++) {
 	   	drm_buf_t *buf = dma->buflist[ i ];
@@ -1086,8 +1300,10 @@ static int i830_flush_queue(drm_device_t *dev)
 }
 
 /* Must be called with the lock held */
-void i830_reclaim_buffers(drm_device_t *dev, pid_t pid)
+void i830_reclaim_buffers( struct file *filp )
 {
+	drm_file_t    *priv   = filp->private_data;
+	drm_device_t  *dev    = priv->dev;
 	drm_device_dma_t *dma = dev->dma;
 	int		 i;
 
@@ -1101,7 +1317,7 @@ void i830_reclaim_buffers(drm_device_t *dev, pid_t pid)
 	   	drm_buf_t *buf = dma->buflist[ i ];
 	   	drm_i830_buf_priv_t *buf_priv = buf->dev_private;
 	   
-		if (buf->pid == pid && buf_priv) {
+		if (buf->filp == filp && buf_priv) {
 			int used = cmpxchg(buf_priv->in_use, I830_BUF_CLIENT, 
 					   I830_BUF_FREE);
 
@@ -1207,6 +1423,53 @@ int i830_swap_bufs(struct inode *inode, struct file *filp,
    	return 0;
 }
 
+
+
+/* Not sure why this isn't set all the time:
+ */ 
+static void i830_do_init_pageflip( drm_device_t *dev )
+{
+	drm_i830_private_t *dev_priv = dev->dev_private;
+
+	DRM_DEBUG("%s\n", __FUNCTION__);
+	dev_priv->page_flipping = 1;
+	dev_priv->current_page = 0;
+	dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
+}
+
+int i830_do_cleanup_pageflip( drm_device_t *dev )
+{
+	drm_i830_private_t *dev_priv = dev->dev_private;
+
+	DRM_DEBUG("%s\n", __FUNCTION__);
+	if (dev_priv->current_page != 0)
+		i830_dma_dispatch_flip( dev );
+
+	dev_priv->page_flipping = 0;
+	return 0;
+}
+
+int i830_flip_bufs(struct inode *inode, struct file *filp,
+		   unsigned int cmd, unsigned long arg)
+{
+	drm_file_t *priv = filp->private_data;
+	drm_device_t *dev = priv->dev;
+	drm_i830_private_t *dev_priv = dev->dev_private;
+
+	DRM_DEBUG("%s\n", __FUNCTION__);
+
+   	if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
+		DRM_ERROR("i830_flip_buf called without lock held\n");
+		return -EINVAL;
+	}
+
+	if (!dev_priv->page_flipping) 
+		i830_do_init_pageflip( dev );
+
+	i830_dma_dispatch_flip( dev );
+   	return 0;
+}
+
 int i830_getage(struct inode *inode, struct file *filp, unsigned int cmd,
 		unsigned long arg)
 {
@@ -1270,3 +1533,66 @@ int i830_docopy(struct inode *inode, struct file *filp, unsigned int cmd,
 {
 	return 0;
 }
+
+
+
+int i830_getparam( struct inode *inode, struct file *filp, unsigned int cmd,
+		      unsigned long arg )
+{
+	drm_file_t	  *priv	    = filp->private_data;
+	drm_device_t	  *dev	    = priv->dev;
+	drm_i830_private_t *dev_priv = dev->dev_private;
+	drm_i830_getparam_t param;
+	int value;
+
+	if ( !dev_priv ) {
+		DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
+		return -EINVAL;
+	}
+
+	if (copy_from_user(&param, (drm_i830_getparam_t *)arg, sizeof(param) ))
+		return -EFAULT;
+
+	switch( param.param ) {
+	case I830_PARAM_IRQ_ACTIVE:
+		value = dev->irq ? 1 : 0;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	if ( copy_to_user( param.value, &value, sizeof(int) ) ) {
+		DRM_ERROR( "copy_to_user\n" );
+		return -EFAULT;
+	}
+	
+	return 0;
+}
+
+
+int i830_setparam( struct inode *inode, struct file *filp, unsigned int cmd,
+		   unsigned long arg )
+{
+	drm_file_t	  *priv	    = filp->private_data;
+	drm_device_t	  *dev	    = priv->dev;
+	drm_i830_private_t *dev_priv = dev->dev_private;
+	drm_i830_setparam_t param;
+
+	if ( !dev_priv ) {
+		DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
+		return -EINVAL;
+	}
+
+	if (copy_from_user(&param, (drm_i830_setparam_t *)arg, sizeof(param) ))
+		return -EFAULT;
+
+	switch( param.param ) {
+	case I830_SETPARAM_USE_MI_BATCHBUFFER_START:
+		dev_priv->use_mi_batchbuffer_start = param.value;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	return 0;
+}
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i830_drm.h b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i830_drm.h
index 725ad3692..664ab0eda 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i830_drm.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i830_drm.h
@@ -3,6 +3,9 @@
 
 /* WARNING: These defines must be the same as what the Xserver uses.
  * if you change them, you must change the defines in the Xserver.
+ *
+ * KW: Actually, you can't ever change them because doing so would
+ * break backwards compatibility.
  */
 
 #ifndef _I830_DEFINES_
@@ -18,14 +21,12 @@
 #define I830_NR_TEX_REGIONS 64
 #define I830_LOG_MIN_TEX_REGION_SIZE 16
 
-/* if defining I830_ENABLE_4_TEXTURES, do it in i830_3d_reg.h, too */
-#if !defined(I830_ENABLE_4_TEXTURES)
+/* KW: These aren't correct but someone set them to two and then
+ * released the module.  Now we can't change them as doing so would
+ * break backwards compatibility.
+ */
 #define I830_TEXTURE_COUNT	2
-#define I830_TEXBLEND_COUNT	2	/* always same as TEXTURE_COUNT? */
-#else /* defined(I830_ENABLE_4_TEXTURES) */
-#define I830_TEXTURE_COUNT	4
-#define I830_TEXBLEND_COUNT	4	/* always same as TEXTURE_COUNT? */
-#endif /* I830_ENABLE_4_TEXTURES */
+#define I830_TEXBLEND_COUNT	I830_TEXTURE_COUNT
 
 #define I830_TEXBLEND_SIZE	12	/* (4 args + op) * 2 + COLOR_FACTOR */
 
@@ -57,6 +58,7 @@
 #define I830_UPLOAD_TEXBLEND_MASK	0xf00000
 #define I830_UPLOAD_TEX_PALETTE_N(n)    (0x1000000 << (n))
 #define I830_UPLOAD_TEX_PALETTE_SHARED	0x4000000
+#define I830_UPLOAD_STIPPLE         	0x8000000
 
 /* Indices into buf.Setup where various bits of state are mirrored per
  * context and per buffer.  These can be fired at the card as a unit,
@@ -73,7 +75,6 @@
  */
 
 #define I830_DESTREG_CBUFADDR 0
-/* Invarient */
 #define I830_DESTREG_DBUFADDR 1
 #define I830_DESTREG_DV0 2
 #define I830_DESTREG_DV1 3
@@ -109,6 +110,13 @@
 #define I830_CTXREG_MCSB1		16
 #define I830_CTX_SETUP_SIZE		17
 
+/* 1.3: Stipple state
+ */ 
+#define I830_STPREG_ST0 0
+#define I830_STPREG_ST1 1
+#define I830_STP_SETUP_SIZE 2
+
+
 /* Texture state (per tex unit)
  */
 
@@ -124,6 +132,18 @@
 #define I830_TEXREG_MCS	9	/* GFX_OP_MAP_COORD_SETS */
 #define I830_TEX_SETUP_SIZE 10
 
+#define I830_TEXREG_TM0LI      0 /* load immediate 2 texture map n */
+#define I830_TEXREG_TM0S0      1
+#define I830_TEXREG_TM0S1      2
+#define I830_TEXREG_TM0S2      3
+#define I830_TEXREG_TM0S3      4
+#define I830_TEXREG_TM0S4      5
+#define I830_TEXREG_NOP0       6       /* noop */
+#define I830_TEXREG_NOP1       7       /* noop */
+#define I830_TEXREG_NOP2       8       /* noop */
+#define __I830_TEXREG_MCS      9       /* GFX_OP_MAP_COORD_SETS -- shared */
+#define __I830_TEX_SETUP_SIZE   10
+
 #define I830_FRONT   0x1
 #define I830_BACK    0x2
 #define I830_DEPTH   0x4
@@ -199,8 +219,35 @@ typedef struct _drm_i830_sarea {
 	int ctxOwner;		/* last context to upload state */
 
 	int vertex_prim;
+
+        int pf_enabled;               /* is pageflipping allowed? */
+        int pf_active;               
+        int pf_current_page;	    /* which buffer is being displayed? */
+
+        int perf_boxes;             /* performance boxes to be displayed */
+   
+        /* Here's the state for texunits 2,3:
+	 */
+	unsigned int TexState2[I830_TEX_SETUP_SIZE];
+	unsigned int TexBlendState2[I830_TEXBLEND_SIZE];
+	unsigned int TexBlendStateWordsUsed2;
+
+	unsigned int TexState3[I830_TEX_SETUP_SIZE];
+	unsigned int TexBlendState3[I830_TEXBLEND_SIZE];
+	unsigned int TexBlendStateWordsUsed3;
+
+	unsigned int StippleState[I830_STP_SETUP_SIZE];
 } drm_i830_sarea_t;
 
+/* Flags for perf_boxes
+ */
+#define I830_BOX_RING_EMPTY    0x1 /* populated by kernel */
+#define I830_BOX_FLIP          0x2 /* populated by kernel */
+#define I830_BOX_WAIT          0x4 /* populated by kernel & client */
+#define I830_BOX_TEXTURE_LOAD  0x8 /* populated by kernel */
+#define I830_BOX_LOST_CONTEXT  0x10 /* populated by client */
+
+
 /* I830 specific ioctls
  * The device specific ioctl range is 0x40 to 0x79.
  */
@@ -213,6 +260,11 @@ typedef struct _drm_i830_sarea {
 #define DRM_IOCTL_I830_SWAP		DRM_IO ( 0x46)
 #define DRM_IOCTL_I830_COPY		DRM_IOW( 0x47, drm_i830_copy_t)
 #define DRM_IOCTL_I830_DOCOPY		DRM_IO ( 0x48)
+#define DRM_IOCTL_I830_FLIP		DRM_IO ( 0x49)
+#define DRM_IOCTL_I830_IRQ_EMIT         DRM_IOWR(0x4a, drm_i830_irq_emit_t)
+#define DRM_IOCTL_I830_IRQ_WAIT         DRM_IOW( 0x4b, drm_i830_irq_wait_t)
+#define DRM_IOCTL_I830_GETPARAM         DRM_IOWR(0x4c, drm_i830_getparam_t)
+#define DRM_IOCTL_I830_SETPARAM         DRM_IOWR(0x4d, drm_i830_setparam_t)
 
 typedef struct _drm_i830_clear {
 	int clear_color;
@@ -248,4 +300,36 @@ typedef struct drm_i830_dma {
 	int granted;
 } drm_i830_dma_t;
 
+
+/* 1.3: Userspace can request & wait on irq's:
+ */
+typedef struct drm_i830_irq_emit {
+	int *irq_seq;
+} drm_i830_irq_emit_t;
+
+typedef struct drm_i830_irq_wait {
+	int irq_seq;
+} drm_i830_irq_wait_t;
+
+
+/* 1.3: New ioctl to query kernel params:
+ */
+#define I830_PARAM_IRQ_ACTIVE            1
+
+typedef struct drm_i830_getparam {
+	int param;
+	int *value;
+} drm_i830_getparam_t;
+
+
+/* 1.3: New ioctl to set kernel params:
+ */
+#define I830_SETPARAM_USE_MI_BATCHBUFFER_START            1
+
+typedef struct drm_i830_setparam {
+	int param;
+	int value;
+} drm_i830_setparam_t;
+
+
 #endif /* _I830_DRM_H_ */
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i830_drv.h b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i830_drv.h
index eec640ca3..37313afd4 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i830_drv.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i830_drv.h
@@ -78,6 +78,19 @@ typedef struct drm_i830_private {
 	int back_pitch;
 	int depth_pitch;
 	unsigned int cpp;
+
+	int do_boxes;
+	int dma_used;
+
+	int current_page;
+	int page_flipping;
+
+	wait_queue_head_t irq_queue;
+   	atomic_t irq_received;
+   	atomic_t irq_emitted;
+
+	int use_mi_batchbuffer_start;
+
 } drm_i830_private_t;
 
 				/* i830_dma.c */
@@ -88,7 +101,7 @@ extern int  i830_dma_init(struct inode *inode, struct file *filp,
 			  unsigned int cmd, unsigned long arg);
 extern int  i830_flush_ioctl(struct inode *inode, struct file *filp,
 			     unsigned int cmd, unsigned long arg);
-extern void i830_reclaim_buffers(drm_device_t *dev, pid_t pid);
+extern void i830_reclaim_buffers(struct file *filp);
 extern int  i830_getage(struct inode *inode, struct file *filp, unsigned int cmd,
 			unsigned long arg);
 extern int i830_mmap_buffers(struct file *filp, struct vm_area_struct *vma);
@@ -108,6 +121,23 @@ extern int i830_swap_bufs(struct inode *inode, struct file *filp,
 extern int i830_clear_bufs(struct inode *inode, struct file *filp,
 			  unsigned int cmd, unsigned long arg);
 
+extern int i830_flip_bufs(struct inode *inode, struct file *filp,
+			 unsigned int cmd, unsigned long arg);
+
+extern int i830_getparam( struct inode *inode, struct file *filp,
+			  unsigned int cmd, unsigned long arg );
+
+extern int i830_setparam( struct inode *inode, struct file *filp,
+			  unsigned int cmd, unsigned long arg );
+
+/* i830_irq.c */
+extern int i830_irq_emit( struct inode *inode, struct file *filp, 
+			  unsigned int cmd, unsigned long arg );
+extern int i830_irq_wait( struct inode *inode, struct file *filp,
+			  unsigned int cmd, unsigned long arg );
+extern int i830_wait_irq(drm_device_t *dev, int irq_nr);
+extern int i830_emit_irq(drm_device_t *dev);
+
 
 #define I830_BASE(reg)		((unsigned long) \
 				dev_priv->mmio_map->handle)
@@ -119,12 +149,53 @@ extern int i830_clear_bufs(struct inode *inode, struct file *filp,
 #define I830_READ16(reg) 	I830_DEREF16(reg)
 #define I830_WRITE16(reg,val)	do { I830_DEREF16(reg) = val; } while (0)
 
+
+
+#define I830_VERBOSE 0
+
+#define RING_LOCALS	unsigned int outring, ringmask, outcount; \
+                        volatile char *virt;
+
+#define BEGIN_LP_RING(n) do {				\
+	if (I830_VERBOSE)				\
+		printk("BEGIN_LP_RING(%d) in %s\n",	\
+			  n, __FUNCTION__);		\
+	if (dev_priv->ring.space < n*4)			\
+		i830_wait_ring(dev, n*4, __FUNCTION__);		\
+	outcount = 0;					\
+	outring = dev_priv->ring.tail;			\
+	ringmask = dev_priv->ring.tail_mask;		\
+	virt = dev_priv->ring.virtual_start;		\
+} while (0)
+
+
+#define OUT_RING(n) do {					\
+	if (I830_VERBOSE) printk("   OUT_RING %x\n", (int)(n));	\
+	*(volatile unsigned int *)(virt + outring) = n;		\
+        outcount++;						\
+	outring += 4;						\
+	outring &= ringmask;					\
+} while (0)
+
+#define ADVANCE_LP_RING() do {						\
+	if (I830_VERBOSE) printk("ADVANCE_LP_RING %x\n", outring);	\
+	dev_priv->ring.tail = outring;					\
+	dev_priv->ring.space -= outcount * 4;				\
+	I830_WRITE(LP_RING + RING_TAIL, outring);			\
+} while(0)
+
+extern int i830_wait_ring(drm_device_t *dev, int n, const char *caller);
+
+
 #define GFX_OP_USER_INTERRUPT 		((0<<29)|(2<<23))
 #define GFX_OP_BREAKPOINT_INTERRUPT	((0<<29)|(1<<23))
 #define CMD_REPORT_HEAD			(7<<23)
 #define CMD_STORE_DWORD_IDX		((0x21<<23) | 0x1)
 #define CMD_OP_BATCH_BUFFER  ((0x0<<29)|(0x30<<23)|0x1)
 
+#define STATE3D_LOAD_STATE_IMMEDIATE_2      ((0x3<<29)|(0x1d<<24)|(0x03<<16))
+#define LOAD_TEXTURE_MAP0                   (1<<11)
+
 #define INST_PARSER_CLIENT   0x00000000
 #define INST_OP_FLUSH        0x02000000
 #define INST_FLUSH_MAP_CACHE 0x00000001
@@ -140,6 +211,9 @@ extern int i830_clear_bufs(struct inode *inode, struct file *filp,
 #define I830REG_INT_MASK_R 	0x020a8
 #define I830REG_INT_ENABLE_R	0x020a0
 
+#define I830_IRQ_RESERVED ((1<<13)|(3<<2))
+
+
 #define LP_RING     		0x2030
 #define HP_RING     		0x2040
 #define RING_TAIL      		0x00
@@ -182,6 +256,9 @@ extern int i830_clear_bufs(struct inode *inode, struct file *filp,
 
 #define CMD_OP_DESTBUFFER_INFO	 ((0x3<<29)|(0x1d<<24)|(0x8e<<16)|1)
 
+#define CMD_OP_DISPLAYBUFFER_INFO ((0x0<<29)|(0x14<<23)|2)
+#define ASYNC_FLIP                (1<<22)
+
 #define CMD_3D                          (0x3<<29)
 #define STATE3D_CONST_BLEND_COLOR_CMD   (CMD_3D|(0x1d<<24)|(0x88<<16))
 #define STATE3D_MAP_COORD_SETBIND_CMD   (CMD_3D|(0x1d<<24)|(0x02<<16))
@@ -213,6 +290,11 @@ extern int i830_clear_bufs(struct inode *inode, struct file *filp,
 #define MI_BATCH_BUFFER_END 	(0xA<<23)
 #define MI_BATCH_NON_SECURE	(1)
 
+#define MI_WAIT_FOR_EVENT       ((0x3<<23))
+#define MI_WAIT_FOR_PLANE_A_FLIP      (1<<2) 
+#define MI_WAIT_FOR_PLANE_A_SCANLINES (1<<1) 
+
+#define MI_LOAD_SCAN_LINES_INCL  ((0x12<<23))
 
 #endif
 
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i830_irq.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i830_irq.c
new file mode 100644
index 000000000..cedafc0dc
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i830_irq.c
@@ -0,0 +1,178 @@
+/* i830_dma.c -- DMA support for the I830 -*- linux-c -*-
+ *
+ * Copyright 2002 Tungsten Graphics, Inc.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ * 
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ * 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Keith Whitwell <keith@tungstengraphics.com>
+ *
+ */
+
+#define __NO_VERSION__
+#include "i830.h"
+#include "drmP.h"
+#include "drm.h"
+#include "i830_drm.h"
+#include "i830_drv.h"
+#include <linux/interrupt.h>	/* For task queue support */
+#include <linux/delay.h>
+
+
+void DRM(dma_service)(int irq, void *device, struct pt_regs *regs)
+{
+	drm_device_t	 *dev = (drm_device_t *)device;
+      	drm_i830_private_t *dev_priv = (drm_i830_private_t *)dev->dev_private;
+   	u16 temp;
+   
+      	temp = I830_READ16(I830REG_INT_IDENTITY_R);
+	printk("%s: %x\n", __FUNCTION__, temp);
+	
+   	if(temp == 0) 
+	   return;
+
+	I830_WRITE16(I830REG_INT_IDENTITY_R, temp); 
+
+	if (temp & 2) {
+		atomic_inc(&dev_priv->irq_received);
+		wake_up_interruptible(&dev_priv->irq_queue); 
+	}
+}
+
+
+int i830_emit_irq(drm_device_t *dev)
+{
+	drm_i830_private_t *dev_priv = dev->dev_private;
+	RING_LOCALS;
+
+	DRM_DEBUG("%s\n", __FUNCTION__);
+
+	atomic_inc(&dev_priv->irq_emitted);
+
+   	BEGIN_LP_RING(2);
+      	OUT_RING( 0 );
+      	OUT_RING( GFX_OP_USER_INTERRUPT );
+      	ADVANCE_LP_RING();
+
+	return atomic_read(&dev_priv->irq_emitted);
+}
+
+
+int i830_wait_irq(drm_device_t *dev, int irq_nr)
+{
+  	drm_i830_private_t *dev_priv = 
+	   (drm_i830_private_t *)dev->dev_private;
+	DECLARE_WAITQUEUE(entry, current);
+	unsigned long end = jiffies + HZ*3;
+	int ret = 0;
+
+	DRM_DEBUG("%s\n", __FUNCTION__);
+
+ 	if (atomic_read(&dev_priv->irq_received) >= irq_nr)  
+ 		return 0; 
+
+	dev_priv->sarea_priv->perf_boxes |= I830_BOX_WAIT;
+
+	add_wait_queue(&dev_priv->irq_queue, &entry);
+
+	for (;;) {
+		current->state = TASK_INTERRUPTIBLE;
+	   	if (atomic_read(&dev_priv->irq_received) >= irq_nr) 
+		   break;
+		if((signed)(end - jiffies) <= 0) {
+			DRM_ERROR("timeout iir %x imr %x ier %x hwstam %x\n",
+				  I830_READ16( I830REG_INT_IDENTITY_R ),
+				  I830_READ16( I830REG_INT_MASK_R ),
+				  I830_READ16( I830REG_INT_ENABLE_R ),
+				  I830_READ16( I830REG_HWSTAM ));
+
+		   	ret = -EBUSY;	/* Lockup?  Missed irq? */
+			break;
+		}
+	      	schedule_timeout(HZ*3);
+	      	if (signal_pending(current)) {
+		   	ret = -EINTR;
+			break;
+		}
+	}
+
+	current->state = TASK_RUNNING;
+	remove_wait_queue(&dev_priv->irq_queue, &entry);
+	return ret;
+}
+
+
+/* Needs the lock as it touches the ring.
+ */
+int i830_irq_emit( struct inode *inode, struct file *filp, unsigned int cmd,
+		   unsigned long arg )
+{
+	drm_file_t	  *priv	    = filp->private_data;
+	drm_device_t	  *dev	    = priv->dev;
+	drm_i830_private_t *dev_priv = dev->dev_private;
+	drm_i830_irq_emit_t emit;
+	int result;
+
+   	if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
+		DRM_ERROR("i830_irq_emit called without lock held\n");
+		return -EINVAL;
+	}
+
+	if ( !dev_priv ) {
+		DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
+		return -EINVAL;
+	}
+
+	if (copy_from_user( &emit, (drm_i830_irq_emit_t *)arg, sizeof(emit) ))
+		return -EFAULT;
+
+	result = i830_emit_irq( dev );
+
+	if ( copy_to_user( emit.irq_seq, &result, sizeof(int) ) ) {
+		DRM_ERROR( "copy_to_user\n" );
+		return -EFAULT;
+	}
+
+	return 0;
+}
+
+
+/* Doesn't need the hardware lock.
+ */
+int i830_irq_wait( struct inode *inode, struct file *filp, unsigned int cmd,
+		   unsigned long arg )
+{
+	drm_file_t	  *priv	    = filp->private_data;
+	drm_device_t	  *dev	    = priv->dev;
+	drm_i830_private_t *dev_priv = dev->dev_private;
+	drm_i830_irq_wait_t irqwait;
+
+	if ( !dev_priv ) {
+		DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
+		return -EINVAL;
+	}
+
+	if (copy_from_user( &irqwait, (drm_i830_irq_wait_t *)arg, 
+			    sizeof(irqwait) ))
+		return -EFAULT;
+
+	return i830_wait_irq( dev, irqwait.irq_seq );
+}
+
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/sis.h b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/sis.h
index 02f03086f..bc66f4dc2 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/sis.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/sis.h
@@ -24,7 +24,7 @@
  * DEALINGS IN THE SOFTWARE.
  * 
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/sis.h,v 1.2 2001/12/19 21:25:59 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/sis.h,v 1.3 2002/10/30 12:52:38 alanh Exp $ */
 
 #ifndef __SIS_H__
 #define __SIS_H__
@@ -42,6 +42,31 @@
 #define __HAVE_MTRR		1
 #define __HAVE_CTX_BITMAP	1
 
+#define DRIVER_AUTHOR	 "SIS"
+#define DRIVER_NAME	 "sis"
+#define DRIVER_DESC	 "SIS 300/630/540"
+#define DRIVER_DATE	 "20010503"
+#define DRIVER_MAJOR	 1
+#define DRIVER_MINOR	 0
+#define DRIVER_PATCHLEVEL  0
+
+#define DRIVER_IOCTLS \
+        [DRM_IOCTL_NR(SIS_IOCTL_FB_ALLOC)]   = { sis_fb_alloc,	  1, 0 }, \
+        [DRM_IOCTL_NR(SIS_IOCTL_FB_FREE)]    = { sis_fb_free,	  1, 0 }, \
+        /* AGP Memory Management */					  \
+        [DRM_IOCTL_NR(SIS_IOCTL_AGP_INIT)]   = { sisp_agp_init,	  1, 0 }, \
+        [DRM_IOCTL_NR(SIS_IOCTL_AGP_ALLOC)]  = { sisp_agp_alloc,  1, 0 }, \
+        [DRM_IOCTL_NR(SIS_IOCTL_AGP_FREE)]   = { sisp_agp_free,	  1, 0 }
+#if 0 /* these don't appear to be defined */
+	/* SIS Stereo */						 
+	[DRM_IOCTL_NR(DRM_IOCTL_CONTROL)]    = { sis_control,	  1, 1 }, 
+        [DRM_IOCTL_NR(SIS_IOCTL_FLIP)]       = { sis_flip,	  1, 1 }, 
+        [DRM_IOCTL_NR(SIS_IOCTL_FLIP_INIT)]  = { sis_flip_init,	  1, 1 }, 
+        [DRM_IOCTL_NR(SIS_IOCTL_FLIP_FINAL)] = { sis_flip_final,  1, 1 }
+#endif
+
+#define __HAVE_COUNTERS		5
+
 /* Buffer customization:
  */
 #define DRIVER_AGP_BUFFERS_MAP( dev )					\
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/sis_mm.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/sis_mm.c
index 81832769d..b2aa22d49 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/sis_mm.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/sis_mm.c
@@ -183,10 +183,10 @@ int sisp_agp_alloc(struct inode *inode, struct file *filp, unsigned int cmd,
   if(block){
     /* TODO */
     agp.offset = block->ofs;
-    agp.free = (unsigned int)block;
+    agp.free = (unsigned long)block;
     if(!add_alloc_set(agp.context, AGP_TYPE, agp.free)){
       DRM_DEBUG("adding to allocation set fails\n");
-      mmFreeMem((PMemBlock)agp.free);
+      mmFreeMem((PMemBlock)(unsigned long)agp.free);
       retval = -1;
     }
   }
@@ -219,7 +219,7 @@ int sisp_agp_free(struct inode *inode, struct file *filp, unsigned int cmd,
     return -1;
   }
 
-  mmFreeMem((PMemBlock)agp.free);
+  mmFreeMem((PMemBlock)(unsigned long)agp.free);
   if(!del_alloc_set(agp.context, AGP_TYPE, agp.free))
     retval = -1;
 
@@ -289,7 +289,7 @@ int sis_final_context(int context)
 	  retval = setFirst(set, &item);
 	  while(retval){
    	    DRM_DEBUG("free agp memory 0x%x\n", item);
-	    mmFreeMem((PMemBlock)item);
+	    mmFreeMem((PMemBlock)(unsigned long)item);
 	    retval = setNext(set, &item);
 	  }
 	  setDestroy(set);
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drm.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drm.c
index 1e9d8ed46..e12809216 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drm.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drm.c
@@ -27,7 +27,7 @@
  * Authors: Rickard E. (Rik) Faith <faith@valinux.com>
  *	    Kevin E. Martin <martin@valinux.com>
  *
- * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drm.c,v 1.28 2002/10/16 01:26:49 dawes Exp $
+ * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drm.c,v 1.31 2003/02/04 03:01:59 dawes Exp $
  *
  */
 
@@ -84,13 +84,16 @@ extern unsigned long _bus_base(void);
 
 #include "xf86drm.h"
 
-#ifndef DRM_MAJOR
-#define DRM_MAJOR 226		/* Linux */
+#ifdef __FreeBSD__
+#define DRM_MAJOR 145
+#endif
+
+#ifdef __NetBSD__
+#define DRM_MAJOR 34
 #endif
 
-#ifndef __linux__
-#undef  DRM_MAJOR
-#define DRM_MAJOR 145		/* Should set in drm.h for *BSD */
+#ifndef DRM_MAJOR
+#define DRM_MAJOR 226		/* Linux */
 #endif
 
 #ifndef DRM_MAX_MINOR
@@ -222,7 +225,7 @@ static int drmOpenDevice(long dev, int minor)
 
     sprintf(buf, DRM_DEV_NAME, DRM_DIR_NAME, minor);
     drmMsg("drmOpenDevice: node name is %s\n", buf);
-    if (stat(buf, &st) || st.st_rdev != dev) {
+    if (stat(buf, &st)) {
 	if (!isroot) return DRM_ERR_NOT_ROOT;
 	remove(buf);
 	mknod(buf, S_IFCHR | devmode, dev);
@@ -236,6 +239,17 @@ static int drmOpenDevice(long dev, int minor)
     drmMsg("drmOpenDevice: open result is %d, (%s)\n",
 		fd, fd < 0 ? strerror(errno) : "OK");
     if (fd >= 0) return fd;
+
+    if (st.st_rdev != dev) {
+	if (!isroot) return DRM_ERR_NOT_ROOT;
+	remove(buf);
+	mknod(buf, S_IFCHR | devmode, dev);
+    }
+    fd = open(buf, O_RDWR, 0);
+    drmMsg("drmOpenDevice: open result is %d, (%s)\n",
+		fd, fd < 0 ? strerror(errno) : "OK");
+    if (fd >= 0) return fd;
+
     drmMsg("drmOpenDevice: Open failed\n");
     remove(buf);
     return -errno;
@@ -427,7 +441,7 @@ static void drmCopyVersion(drmVersionPtr d, const drm_version_t *s)
     d->desc               = drmStrdup(s->desc);
 }
 
-/* drmVersion obtains the version information via an ioctl.  Similar
+/* drmGet Version obtains the driver version information via an ioctl.  Similar
  * information is available via /proc/dri. */
 
 drmVersionPtr drmGetVersion(int fd)
@@ -476,6 +490,26 @@ drmVersionPtr drmGetVersion(int fd)
     return retval;
 }
 
+/* drmGetLibVersion set version information for the drm user space library.
+ * this version number is driver indepedent */
+
+drmVersionPtr drmGetLibVersion(int fd)
+{
+    drm_version_t *version = drmMalloc(sizeof(*version));
+
+    /* Version history:
+     *   revision 1.0.x = original DRM interface with no drmGetLibVersion
+     *                    entry point and many drm<Device> extensions
+     *   revision 1.1.x = added drmCommand entry points for device extensions
+     *                    added drmGetLibVersion to identify libdrm.a version
+     */
+    version->version_major      = 1;
+    version->version_minor      = 1;
+    version->version_patchlevel = 0;
+
+    return (drmVersionPtr)version;
+}
+
 void drmFreeBusid(const char *busid)
 {
     drmFree((void *)busid);
@@ -1068,6 +1102,18 @@ int drmScatterGatherFree(int fd, unsigned long handle)
     return 0;
 }
 
+int drmWaitVBlank(int fd, drmVBlankPtr vbl)
+{
+    int ret;
+
+    do {
+       ret = ioctl(fd, DRM_IOCTL_WAIT_VBLANK, vbl);
+       vbl->request.type &= ~DRM_VBLANK_RELATIVE;
+    } while (ret && errno == EINTR);
+
+    return ret;
+}
+
 int drmError(int err, const char *label)
 {
     switch (err) {
@@ -1336,6 +1382,61 @@ int drmGetStats(int fd, drmStatsT *stats)
     return 0;
 }
 
+int drmCommandNone(int fd, unsigned long drmCommandIndex)
+{
+    void *data = NULL; /* dummy */
+    unsigned long request;
+
+    request = DRM_IO( DRM_COMMAND_BASE + drmCommandIndex);
+
+    if (ioctl(fd, request, data)) {
+	return -errno;
+    }
+    return 0;
+}
+
+int drmCommandRead(int fd, unsigned long drmCommandIndex,
+                   void *data, unsigned long size )
+{
+    unsigned long request;
+
+    request = DRM_IOC( DRM_IOC_READ, DRM_IOCTL_BASE, 
+	DRM_COMMAND_BASE + drmCommandIndex, size);
+
+    if (ioctl(fd, request, data)) {
+	return -errno;
+    }
+    return 0;
+}
+
+int drmCommandWrite(int fd, unsigned long drmCommandIndex,
+                   void *data, unsigned long size )
+{
+    unsigned long request;
+
+    request = DRM_IOC( DRM_IOC_WRITE, DRM_IOCTL_BASE, 
+	DRM_COMMAND_BASE + drmCommandIndex, size);
+
+    if (ioctl(fd, request, data)) {
+	return -errno;
+    }
+    return 0;
+}
+
+int drmCommandWriteRead(int fd, unsigned long drmCommandIndex,
+                   void *data, unsigned long size )
+{
+    unsigned long request;
+
+    request = DRM_IOC( DRM_IOC_READ|DRM_IOC_WRITE, DRM_IOCTL_BASE, 
+	DRM_COMMAND_BASE + drmCommandIndex, size);
+
+    if (ioctl(fd, request, data)) {
+	return -errno;
+    }
+    return 0;
+}
+
 #if defined(XFree86Server) || defined(DRM_USE_MALLOC)
 static void drmSIGIOHandler(int interrupt, void *closure)
 {
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/lnx.h b/xc/programs/Xserver/hw/xfree86/os-support/linux/lnx.h
index a81bfc201..f2dd16267 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/lnx.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/lnx.h
@@ -1,11 +1,43 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx.h,v 3.2 2000/02/15 02:00:14 eich Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx.h,v 3.3 2002/11/25 14:05:04 eich Exp $ */
 
 #ifndef LNX_H_
-#ifdef __alpha__
+# ifdef __alpha__
 extern unsigned long _bus_base __P ((void)) __attribute__ ((const));
 extern unsigned long _bus_base_sparse __P ((void)) __attribute__ ((const));
 extern int iopl __P ((int __level));
-#endif
+
+/* new pciconfig_iobase syscall added in 2.2.15 and 2.3.99 */
+#  include <linux/unistd.h>
+#  include <asm/pci.h>
+extern long (*_iobase)(unsigned, int, int, int);
+
+/*
+ * _iobase deals with the case the __NR_pciconfig_iobase is either undefined
+ * or unsupported by the kernel, but we need to make sure that the `which'
+ * argument symbols are defined.
+ */
+#  ifndef IOBASE_HOSE
+#   define IOBASE_HOSE 		0
+#  endif
+#  ifndef IOBASE_SPARSE_MEM
+#   define IOBASE_SPARSE_MEM	1
+#  endif
+#  ifndef IOBASE_DENSE_MEM
+#   define IOBASE_DENSE_MEM	2
+#  endif
+#  ifndef IOBASE_SPARSE_IO
+#   define IOBASE_SPARSE_IO	3
+#  endif
+#  ifndef IOBASE_DENSE_IO
+#   define IOBASE_DENSE_IO	4
+#  endif
+#  ifndef IOBASE_ROOT_BUS
+#   define IOBASE_ROOT_BUS	5
+#  endif
+#  ifndef IOBASE_FROM_HOSE
+#   define IOBASE_FROM_HOSE	0x10000
+#  endif
+# endif /* __alpha__ */
 
 #define LNX_H_
 
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_agp.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_agp.c
index 5de1089af..13e423433 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_agp.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_agp.c
@@ -7,7 +7,7 @@
  * Copyright © 2001 The XFree86 Project, Inc.
  */
 
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_agp.c,v 3.8 2001/11/26 19:02:02 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_agp.c,v 3.10 2002/12/12 18:29:11 eich Exp $ */
 
 #include "X.h"
 #include "xf86.h"
@@ -89,9 +89,16 @@ GARTInit(int screenNum)
 	xf86ReleaseGART(-1);
 
 #if defined(linux)
-	/* Should this look for version >= rather than version == ? */
-	if (agpinf.version.major != AGPGART_MAJOR_VERSION &&
-	    agpinf.version.minor != AGPGART_MINOR_VERSION) {
+	/* Per Dave Jones, every effort will be made to keep the 
+	 * agpgart interface backwards compatible, so allow all 
+	 * future versions.
+	 */
+	if (
+#if (AGPGART_MAJOR_VERSION > 0) /* quiet compiler */
+	    agpinf.version.major < AGPGART_MAJOR_VERSION ||
+#endif
+	    (agpinf.version.major == AGPGART_MAJOR_VERSION &&
+	     agpinf.version.minor < AGPGART_MINOR_VERSION)) {
 		xf86DrvMsg(screenNum, X_ERROR,
 			"GARTInit: Kernel agpgart driver version is not current"
 			" (%d.%d vs %d.%d)\n",
@@ -262,6 +269,10 @@ xf86BindGARTMemory(int screenNum, int key, unsigned long offset)
 	}
 	pageOffset = offset / AGP_PAGE_SIZE;
 
+	xf86DrvMsgVerb(screenNum, X_INFO, 3,
+		       "xf86BindGARTMemory: bind key %d at 0x%08x "
+		       "(pgoffset %d)\n", key, offset, pageOffset);
+
 	bind.pg_start = pageOffset;
 	bind.key = key;
 
@@ -302,6 +313,9 @@ xf86UnbindGARTMemory(int screenNum, int key)
 		return FALSE;
 	}
 
+	xf86DrvMsgVerb(screenNum, X_INFO, 3,
+		       "xf86UnbindGARTMemory: unbind key %d\n", key);
+
 	return TRUE;
 }
 
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_axp.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_axp.c
index 69f805d89..5813ef4e9 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_axp.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_axp.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_axp.c,v 1.4 2001/02/15 19:46:03 eich Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_axp.c,v 1.5 2002/11/25 14:05:04 eich Exp $ */
 
 #include <stdio.h>
 #include "X.h"
@@ -106,3 +106,91 @@ lnxGetAXP(void)
   } while (1);
 }
 
+/*
+ * pciconfig_iobase wrappers and dynamic i/o selection
+ */
+#include <linux/unistd.h>
+#include <asm/pci.h>
+#include <errno.h>
+
+/* glibc versions (single hose only) */
+extern void _outb(char val, unsigned long port);
+extern void _outw(short val, unsigned long port);
+extern void _outl(int val, unsigned long port);
+extern unsigned int _inb(unsigned long port);
+extern unsigned int _inw(unsigned long port);
+extern unsigned int _inl(unsigned long port);
+
+extern void _dense_outb(char, unsigned long);
+extern void _dense_outw(short, unsigned long);
+extern void _dense_outl(int, unsigned long);
+extern unsigned int _dense_inb(unsigned long);
+extern unsigned int _dense_inw(unsigned long);
+extern unsigned int _dense_inl(unsigned long);
+
+void (*_alpha_outb)(char, unsigned long) = _outb;
+void (*_alpha_outw)(short, unsigned long) = _outw;
+void (*_alpha_outl)(int, unsigned long) = _outl;
+unsigned int (*_alpha_inb)(unsigned long) = _inb;
+unsigned int (*_alpha_inw)(unsigned long) = _inw;
+unsigned int (*_alpha_inl)(unsigned long) = _inl;
+
+static long _alpha_iobase_query(unsigned, int, int, int);
+long (*_iobase)(unsigned, int, int, int) = _alpha_iobase_query;
+
+static long
+_alpha_iobase(unsigned flags, int hose, int bus, int devfn)
+{
+#ifdef __NR_pciconfig_iobase
+  if (bus < 0) {
+    bus = hose;
+    flags |= IOBASE_FROM_HOSE;
+  }
+
+  return syscall(__NR_pciconfig_iobase, flags, bus, devfn);
+#else
+  return -ENOSYS
+#endif
+}
+
+static long
+_alpha_iobase_legacy(unsigned flags, int hose, int bus, int devfn)
+{
+  if (hose > 0) return -ENODEV;
+  if (flags & IOBASE_DENSE_MEM) return _bus_base();
+  if (flags & IOBASE_SPARSE_MEM) return _bus_base_sparse();
+  return 0;
+}
+
+static long 
+_alpha_iobase_query(unsigned flags, int hose, int bus, int devfn)
+{
+  /*
+   * Only use iobase if the syscall is supported *and* it's
+   * a dense io system
+   */
+  if (_alpha_iobase(IOBASE_DENSE_IO, 0, 0, 0) > 0) {
+    /*
+     * The syscall worked and it's a dense io system - take over the
+     * io subsystem
+     */
+    _iobase = _alpha_iobase;
+
+#ifndef INCLUDE_XF86_NO_DOMAIN
+    /* 
+     * Only take over the inx/outx functions if this is a dense I/O
+     * system *and* addressing domains are being used. The dense I/O
+     * routines expect I/O to be mapped (as done in xf86MapDomainIO)
+     */
+    _alpha_outb = _dense_outb;
+    _alpha_outw = _dense_outw;
+    _alpha_outl = _dense_outl;
+    _alpha_inb = _dense_inb;
+    _alpha_inw = _dense_inw;
+    _alpha_inl = _dense_inl;
+#endif /* !INCLUDE_XF86_NO_DOMAIN */
+  } else _iobase = _alpha_iobase_legacy;
+
+  return _iobase(flags, hose, bus, devfn);
+}
+
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_ev56.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_ev56.c
index bbaa7625d..bfcb0d70f 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_ev56.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_ev56.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_ev56.c,v 3.6 2001/02/15 11:03:56 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_ev56.c,v 3.7 2002/11/25 14:05:04 eich Exp $ */
 
 #include "X.h"
 #include "input.h"
@@ -85,3 +85,63 @@ writeDense32(int Value, pointer Base, register unsigned long Offset)
     write_mem_barrier();
     *(volatile CARD32 *)((unsigned long)Base+(Offset)) = Value;
 }
+
+
+#ifndef INCLUDE_XF86_NO_DOMAIN
+
+void
+_dense_outb(char val, unsigned long port)
+{
+  if ((port & ~0xffff) == 0) return _outb(val, port);
+
+  write_mem_barrier();
+  *(volatile CARD8 *)port = val;
+}
+
+void
+_dense_outw(short val, unsigned long port)
+{
+  if ((port & ~0xffff) == 0) return _outw(val, port);
+
+  write_mem_barrier();
+  *(volatile CARD16 *)port = val;
+}
+
+void
+_dense_outl(int val, unsigned long port)
+{
+  if ((port & ~0xffff) == 0) return _outl(val, port);
+
+  write_mem_barrier();
+  *(volatile CARD32 *)port = val;
+}
+
+unsigned int
+_dense_inb(unsigned long port)
+{
+  if ((port & ~0xffff) == 0) return _inb(port);
+
+  mem_barrier();
+  return *(volatile CARD8 *)port;
+}
+
+unsigned int
+_dense_inw(unsigned long port)
+{
+  if ((port & ~0xffff) == 0) return _inw(port);
+
+  mem_barrier();
+  return *(volatile CARD16 *)port;
+}
+
+unsigned int
+_dense_inl(unsigned long port)
+{
+  if ((port & ~0xffff) == 0) return _inl(port);
+
+  mem_barrier();
+  return *(volatile CARD32 *)port;
+}
+
+#endif /* !INCLUDE_XF86_NO_DOMAIN */
+
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_kbd.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_kbd.c
index b8c0a83bc..f2d508c04 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_kbd.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_kbd.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_kbd.c,v 1.1 2002/10/11 01:40:35 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_kbd.c,v 1.2 2003/02/17 15:11:57 dawes Exp $ */
 
 /*
  * Copyright (c) 2002 by The XFree86 Project, Inc.
@@ -239,8 +239,8 @@ typedef struct {
    struct termios kbdtty;
 } LnxKbdPrivRec, *LnxKbdPrivPtr;
 
-static void
-KbdInit(InputInfoPtr pInfo)
+static int
+KbdInit(InputInfoPtr pInfo, int what)
 {
     KbdDevPtr pKbd = (KbdDevPtr) pInfo->private;
     LnxKbdPrivPtr priv = (LnxKbdPrivPtr) pKbd->private;
@@ -252,10 +252,12 @@ KbdInit(InputInfoPtr pInfo)
     if (!pKbd->CustomKeycodes) {
         pKbd->RemapScanCode = ATScancode;
     }
+
+    return Success;
 }
 
 static int
-KbdOn(InputInfoPtr pInfo)
+KbdOn(InputInfoPtr pInfo, int what)
 {
     KbdDevPtr pKbd = (KbdDevPtr) pInfo->private;
     LnxKbdPrivPtr priv = (LnxKbdPrivPtr) pKbd->private;
@@ -278,11 +280,11 @@ KbdOn(InputInfoPtr pInfo)
 	cfsetospeed(&nTty, 9600);
 	tcsetattr(pInfo->fd, TCSANOW, &nTty);
     }
-    return(pInfo->fd);
+    return Success;
 }
 
 static int
-KbdOff(InputInfoPtr pInfo)
+KbdOff(InputInfoPtr pInfo, int what)
 {
     KbdDevPtr pKbd = (KbdDevPtr) pInfo->private;
     LnxKbdPrivPtr priv = (LnxKbdPrivPtr) pKbd->private;
@@ -291,7 +293,7 @@ KbdOff(InputInfoPtr pInfo)
 	ioctl(pInfo->fd, KDSKBMODE, priv->kbdtrans);
 	tcsetattr(pInfo->fd, TCSANOW, &(priv->kbdtty));
     }
-    return(pInfo->fd);
+    return Success;
 }
 
 static int
@@ -480,8 +482,10 @@ OpenKeyboard(InputInfoPtr pInfo)
 }
 
 Bool
-xf86OSKbdPreInit(KbdDevPtr pKbd)
+xf86OSKbdPreInit(InputInfoPtr pInfo)
 {
+    KbdDevPtr pKbd = pInfo->private;
+
     pKbd->KbdInit       = KbdInit;
     pKbd->KbdOn         = KbdOn;
     pKbd->KbdOff        = KbdOff;
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_pci.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_pci.c
index 9d090ab5d..5477b9130 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_pci.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_pci.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_pci.c,v 3.8 2002/04/09 15:59:37 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_pci.c,v 3.9 2003/02/17 15:29:22 dawes Exp $ */
 
 #include <stdio.h>
 #include "X.h"
@@ -25,7 +25,7 @@ xf86GetPciSizeFromOS(PCITAG tag, int index, int* bits)
     FILE *file;
     char c[0x200];
     char *res;
-    int bus, devfn, dev, fn;
+    unsigned int bus, devfn, dev, fn;
     unsigned PCIADDR_TYPE size[7];
     unsigned int num;
     signed PCIADDR_TYPE Size;
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_video.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_video.c
index ae915f4d1..107d5595e 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_video.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_video.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_video.c,v 3.61 2002/04/04 14:05:54 eich Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_video.c,v 3.64 2003/02/17 15:29:22 dawes Exp $ */
 /*
  * Copyright 1992 by Orest Zborowski <obz@Kodak.com>
  * Copyright 1993 by David Wexelblat <dwex@goblin.org>
@@ -42,8 +42,6 @@
 #include <asm/mtrr.h>
 #endif
 
-extern int ioperm(unsigned long from, unsigned long num, int turn_on);
-
 #ifndef MAP_FAILED
 #define MAP_FAILED ((void *)-1)
 #endif
@@ -265,15 +263,13 @@ mtrr_add_wc_region(int screenNum, unsigned long base, unsigned long size,
 	 */
 
 	{
-	    unsigned long last, lbase, d_size;
+	    unsigned long lbase, d_size = 1;
 	    unsigned long n_size = size;
 	    unsigned long n_base = base;
-	    int i;
 
-	    last = n_base + n_size - 1;
-	    for (lbase = n_base, i = 0; !(lbase & 1); lbase = lbase >> 1, i++);
-	    d_size = 1 << i;
-	    while ((n_base + d_size - 1) > last)
+	    for (lbase = n_base, d_size = 1; !(lbase & 1);
+		 lbase = lbase >> 1, d_size <<= 1);
+	    while (d_size > n_size)
 		d_size = d_size >> 1;
 #ifdef DEBUG
 	    ErrorF("WC_BASE: 0x%lx WC_END: 0x%lx\n",base,base+d_size-1);
@@ -717,7 +713,7 @@ mapVidMemSparse(int ScreenNum, unsigned long Base, unsigned long Size, int flags
 
     close(fd);
       
-    if (ret == (unsigned long)MAP_FAILED || ret != (DENSE_BASE + Base)) {
+    if (ret == (unsigned long)MAP_FAILED) {
         FatalError("xf86MapVidMemSparse: Could not (dense) mmap fb (%s)\n",
 		   strerror(errno));
     }
@@ -744,7 +740,7 @@ mapVidMemSparse(int ScreenNum, unsigned long Base, unsigned long Size, int flags
 		Base, Size, ret);
 
 #endif
-    return (pointer)(DENSE_BASE + Base);
+    return (pointer) ret;
 }
 
 static void
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/lynxos/Imakefile b/xc/programs/Xserver/hw/xfree86/os-support/lynxos/Imakefile
index 129015b88..33d5d912f 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/lynxos/Imakefile
+++ b/xc/programs/Xserver/hw/xfree86/os-support/lynxos/Imakefile
@@ -1,4 +1,4 @@
-XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/lynxos/Imakefile,v 3.23 2002/10/17 02:22:46 dawes Exp $
+XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/lynxos/Imakefile,v 3.24 2002/12/14 04:41:14 dawes Exp $
 #include <Server.tmpl>
 
 #if !defined(PpcArchitecture)
@@ -10,7 +10,7 @@ IOPERM_OBJS=ioperm_noop.o
 #endif
 
 #if defined(PpcArchitecture)
-PPC_SRCS=lynx_noinline.c lynx_ppc.S
+PPC_SRCS=lynx_noinline.c lynx_ppc.c
 PPC_OBJS=lynx_noinline.o lynx_ppc.o
 #endif
 
@@ -28,7 +28,8 @@ OBJS = lynx_init.o lynx_video.o lynx_io.o lynx_mmap.o \
        vidmem.o sigio.o pm_noop.o kmod_noop.o agp_noop.o
 
 INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) -I. -I$(SERVERSRC)/include \
-           -I$(XINCLUDESRC) -I$(EXTINCSRC)
+           -I$(XINCLUDESRC) -I$(EXTINCSRC) \
+           -I$(ENV_PREFIX)/sys/lynx.os
 
 RESDEFINES = -DUSESTDRES
 
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/lynxos/lynx_io.c b/xc/programs/Xserver/hw/xfree86/os-support/lynxos/lynx_io.c
index bdbb17a3e..e61ce76b7 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/lynxos/lynx_io.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/lynxos/lynx_io.c
@@ -21,7 +21,7 @@
  *
  */
 
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/lynxos/lynx_io.c,v 3.9 2002/10/11 01:40:35 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/lynxos/lynx_io.c,v 3.10 2003/02/17 15:11:57 dawes Exp $ */
 
 #include "X.h"
 
@@ -156,7 +156,7 @@ xf86KbdOff()
 #include "xf86OSKbd.h"
 
 Bool
-xf86OSKbdPreInit(KbdDevPtr pKbd)
+xf86OSKbdPreInit(InputInfoPtr pInfo)
 {
     return FALSE;
 }
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/lynxos/lynx_ppc.c b/xc/programs/Xserver/hw/xfree86/os-support/lynxos/lynx_ppc.c
new file mode 100644
index 000000000..e587b7ee0
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/os-support/lynxos/lynx_ppc.c
@@ -0,0 +1,52 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/lynxos/lynx_ppc.c,v 1.1 2002/12/14 04:41:14 dawes Exp $ */
+/*
+ * Copyright 1998 by Metro Link Incorporated
+ *
+ * Permission to use, copy, modify, distribute, and sell this software
+ * and its documentation for any purpose is hereby granted without fee,
+ * provided that the above copyright notice appear in all copies and that
+ * both that copyright notice and this permission notice appear in
+ * supporting documentation, and that the name of Metro Link
+ * Incorporated not be used in advertising or publicity pertaining to
+ * distribution of the software without specific, written prior
+ * permission.  Metro Link Incorporated makes no representations
+ * about the suitability of this software for any purpose.  It is
+ * provided "as is" without express or implied warranty.
+ *
+ * METRO LINK INCORPORATED DISCLAIMS ALL WARRANTIES WITH REGARD
+ * TO THIS SOFTWARE, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS, IN NO EVENT SHALL METRO LINK INCORPORATED BE
+ * LIABLE FOR ANY SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY
+ * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS,
+ * WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION,
+ * ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS
+ * SOFTWARE.
+ */
+
+void ppc_flush_icache()
+{
+__asm__ __volatile__ (" \
+	mflr 0 ;\
+	stw 31,-4(1) ;\
+	stw 0,8(1) ;\
+	stwu 1,-64(1) ;\
+	mr 31,1 ;\
+	stw 3,88(31) ;\
+	li 6, 0 ;\
+	dcbf 3, 6 ;\
+	li 5, 32 ;\
+	dcbf 3, 5 ;\
+	sync ;\
+	li 4,0 ;\
+	icbi  3,4 ;\
+	li 7,32 ;\
+	icbi  3,7 ;\
+	sync ;\
+	isync ;\
+	lwz 1,0(1) ;\
+	lwz 0,8(1) ;\
+	mtlr 0 ;\
+	lwz 31,-4(1) ;\
+	blr ;\
+");
+}
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/lynxos/lynx_video.c b/xc/programs/Xserver/hw/xfree86/os-support/lynxos/lynx_video.c
index e67b64621..c667994b3 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/lynxos/lynx_video.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/lynxos/lynx_video.c
@@ -21,7 +21,7 @@
  *
  */
 
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/lynxos/lynx_video.c,v 3.17 2000/10/28 01:42:27 mvojkovi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/lynxos/lynx_video.c,v 3.18 2002/12/14 04:41:14 dawes Exp $ */
 
 #include "X.h"
 #include "input.h"
@@ -33,11 +33,21 @@
 #include "xf86OSpriv.h"
 
 #if defined(__powerpc__)
-#include <machine/absolute.h>
+
+# if defined(USE_MACHINE_ABSOLUTE)
+#   include <machine/absolute.h>
+# else
+#   define __USER_SPACE_INCLUDE
+#   include <hw_absolute.h>
+# endif
 
 void ppcPciIoMap(int bus);
 #endif
 
+#if 0
+#define DEBUG	
+#endif
+
 #ifdef HAS_MTRR_SUPPORT
 #include <sys/memrange.h>
 #define X_MTRR_ID "XFree86"
@@ -49,6 +59,53 @@ static int devMemFd = -1;
 #define MTRR_DEVICE	"/dev/mtrr"
 #endif
 
+
+#if !defined(NO_MMAP)
+#include <sys/mman.h>
+
+int smem_remove(char *name)
+{
+  return(0);
+}
+
+char *smem_create(char *name, char *arg_addr, long size, int mode)
+{
+  int fd;
+  void *addr = 0;
+  char *retval;
+  size_t len = size;
+  int prot = PROT_READ|PROT_WRITE|PROT_UNCACHE;
+  int flags = MAP_SHARED;
+  off_t off = (off_t)arg_addr;
+
+  if ((fd = open("/dev/mem" , O_RDWR)) < 0)
+  {
+    retval = (char *)-1;
+  }
+  else
+  {
+    if (mode == SM_DETACH)
+    {
+      munmap(arg_addr, len);
+      retval = 0;
+    }
+    else
+    {
+      if ((retval = mmap (addr, len, prot, flags, fd, off) ) == MAP_FAILED)
+      {
+        retval = (char *)-1;
+      }
+    }
+
+    close(fd);
+  }
+
+  return(retval);
+}
+
+#endif
+
+
 /***************************************************************************/
 /* Video Memory Mapping section                                            */
 /***************************************************************************/
@@ -245,12 +302,17 @@ xf86EnableIO()
 {
 	if (IOEnabled++ == 0) {
 	    ioBase = (unsigned char *) smem_create("IOBASE",
-       			(char *)0x80000000, 64*1024, SM_READ|SM_WRITE);
+       			(char *)PHYS_ISA_IO_SPACE, 64*1024, SM_READ|SM_WRITE);
 	       	if (ioBase == MAP_FAILED) {
        			--IOEnabled;
 			FatalError("xf86EnableIO: Failed to map I/O\n");
-       		} else
+       		} else {
+#ifdef DEBUG
+			ErrorF("xf86EnableIO: mapped I/O at vaddr 0x%08x\n",
+				ioBase);
+#endif
 			atexit(removeIOSmem);
+		}
 	}        
 	return;
 }
@@ -285,10 +347,6 @@ ppcPciIoMap(int bus)
 #ifdef HAS_MTRR_SUPPORT
 /* memory range (MTRR) support for LynxOS (taken from BSD MTRR support) */
 
-#if 0
-#define DEBUG	
-#endif
-
 /*
  * This code is experimental.  Some parts may be overkill, and other parts
  * may be incomplete.
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/nto/nto_io.c b/xc/programs/Xserver/hw/xfree86/os-support/nto/nto_io.c
index 3d76f556e..de072dc30 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/nto/nto_io.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/nto/nto_io.c
@@ -24,7 +24,7 @@
  * used in advertising or otherwise to promote the sale, use or other dealings
  * in this Software without prior written authorization from Sebastien Marineau.
  *
- * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/nto/nto_io.c,v 1.4 2002/10/11 01:40:35 dawes Exp $
+ * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/nto/nto_io.c,v 1.5 2003/02/17 15:11:58 dawes Exp $
  */
 
 /* This module contains the NTO-specific functions to access the keyboard
@@ -108,7 +108,7 @@ int xf86KbdOff()
 #include "xf86OSKbd.h"
 
 Bool
-xf86OSKbdPreInit(KbdDevPtr pKbd)
+xf86OSKbdPreInit(InputInfoPtr pInfo)
 {
     return FALSE;
 }
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/os2/os2_io.c b/xc/programs/Xserver/hw/xfree86/os-support/os2/os2_io.c
index 3eda75459..47a837fde 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/os2/os2_io.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/os2/os2_io.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/os2/os2_io.c,v 3.16 2002/10/11 01:40:36 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/os2/os2_io.c,v 3.17 2003/02/17 15:11:58 dawes Exp $ */
 /*
  * (c) Copyright 1994,1999 by Holger Veit
  *			<Holger.Veit@gmd.de>
@@ -224,7 +224,7 @@ int xf86NumMouseTypes = sizeof(xf86SupportedMouseTypes) /
 #include "xf86OSKbd.h"
 
 Bool
-xf86OSKbdPreInit(KbdDevPtr pKbd)
+xf86OSKbdPreInit(InputInfoPtr pInfo)
 {
     return FALSE;
 }
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/pmax/pmax_devs.c b/xc/programs/Xserver/hw/xfree86/os-support/pmax/pmax_devs.c
index d540fd825..3aa86aab2 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/pmax/pmax_devs.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/pmax/pmax_devs.c
@@ -69,7 +69,7 @@
  * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  *
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/pmax/pmax_devs.c,v 1.7 2002/10/11 01:40:36 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/pmax/pmax_devs.c,v 1.8 2003/02/17 15:11:59 dawes Exp $ */
 
 #include "X.h"
 
@@ -116,7 +116,7 @@ xf86SetKbdLeds(int leds)
 #include "xf86OSKbd.h"
 
 Bool
-xf86OSKbdPreInit(KbdDevPtr pKbd)
+xf86OSKbdPreInit(InputInfoPtr pInfo)
 {
     return FALSE;
 }
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_io.c b/xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_io.c
index 544d379dc..4e3b9f796 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_io.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_io.c
@@ -24,7 +24,7 @@
  * used in advertising or otherwise to promote the sale, use or other dealings
  * in this Software without prior written authorization from Sebastien Marineau.
  *
- * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_io.c,v 1.2 2002/10/11 01:40:36 dawes Exp $
+ * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_io.c,v 1.3 2003/02/17 15:11:59 dawes Exp $
  */
 
 /* This module contains the qnx-specific functions to access the keyboard
@@ -100,7 +100,7 @@ xf86KbdInit()
 #include "xf86OSKbd.h"
 
 Bool
-xf86OSKbdPreInit(KbdDevPtr pKbd)
+xf86OSKbdPreInit(InputInfoPtr pInfo)
 {
     return FALSE;
 }
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/sco/Imakefile b/xc/programs/Xserver/hw/xfree86/os-support/sco/Imakefile
index c16719843..3050f2556 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/sco/Imakefile
+++ b/xc/programs/Xserver/hw/xfree86/os-support/sco/Imakefile
@@ -1,4 +1,4 @@
-XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/sco/Imakefile,v 3.15 2002/10/17 02:22:49 dawes Exp $
+XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/sco/Imakefile,v 3.16 2002/11/20 23:00:44 dawes Exp $
 
 
 
@@ -8,12 +8,12 @@ XCOMM $XConsortium: Imakefile /main/4 1996/09/28 17:24:25 rws $
 #include <Server.tmpl>
 
 SRCS = sco_init.c sco_video.c sco_io.c sco_iop.c sco_mouse.c VTsw_sco.c \
-       std_kbdEv.c posix_tty.c bios_devmem.c vidmem.c \
+       std_kbdEv.c posix_tty.c bios_mmap.c vidmem.c \
        libc_wrapper.c stdResource.c stdPci.c sigiostubs.c pm_noop.c \
        kmod_noop.c agp_noop.c
 
 OBJS = sco_init.o sco_video.o sco_io.o sco_iop.o sco_mouse.o VTsw_sco.o \
-       std_kbdEv.o posix_tty.o bios_devmem.o vidmem.o \
+       std_kbdEv.o posix_tty.o bios_mmap.o vidmem.o \
        libc_wrapper.o stdResource.o stdPci.o sigiostubs.o pm_noop.o \
        kmod_noop.o agp_noop.o
 
@@ -27,7 +27,7 @@ DEFINES = $(RESDEFINES)
 SubdirLibraryRule($(OBJS))
 NormalLibraryObjectRule()
 
-LinkSourceFile(bios_devmem.c,../shared)
+LinkSourceFile(bios_mmap.c,../shared)
 LinkSourceFile(std_kbdEv.c,../shared)
 LinkSourceFile(posix_tty.c,../shared)
 LinkSourceFile(libc_wrapper.c,../shared)
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/sco/sco_init.c b/xc/programs/Xserver/hw/xfree86/os-support/sco/sco_init.c
index 839c8fda7..389664647 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/sco/sco_init.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/sco/sco_init.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/sco/sco_init.c,v 3.13 2002/06/03 21:22:10 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/sco/sco_init.c,v 3.14 2002/11/20 23:00:44 dawes Exp $ */
 /*
  * Copyright 2001 by J. Kean Johnston <jkj@sco.com>
  *
@@ -228,6 +228,14 @@ xf86CloseConsole()
   struct vt_mode VT;
   struct sigaction sigvtsw;
 
+  /* Set text mode (possibly briefly) */
+  ioctl(xf86Info.consoleFd, KDSETMODE, KD_TEXT0);
+
+  /* Restore the original mode */
+  if (sco_console_mode != -1) {
+      ioctl(xf86Info.consoleFd, MODESWITCH | sco_console_mode, 0L);
+  }
+
   ioctl(xf86Info.consoleFd, VT_RELDISP, 1);     /* Release the display */
 
   sigvtsw.sa_handler = SIG_DFL;
@@ -243,14 +251,6 @@ xf86CloseConsole()
   VT.frsig  = SIGINT;
   ioctl(xf86Info.consoleFd, VT_SETMODE, &VT); /* Revert to auto handling */
 
-  /* Set text mode (possibly briefly) */
-  ioctl(xf86Info.consoleFd, KDSETMODE, KD_TEXT0);
-
-  /* Restore the original mode */
-  if (sco_console_mode != -1) {
-      ioctl(xf86Info.consoleFd, MODESWITCH | sco_console_mode, 0L);
-  }
-
   close(xf86Info.consoleFd); /* We're done with the device */
 }
 
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/sco/sco_io.c b/xc/programs/Xserver/hw/xfree86/os-support/sco/sco_io.c
index b08246a15..a018e3434 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/sco/sco_io.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/sco/sco_io.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/sco/sco_io.c,v 3.9 2002/10/11 01:40:36 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/sco/sco_io.c,v 3.10 2003/02/17 15:11:59 dawes Exp $ */
 /*
  * Copyright 2001 by J. Kean Johnston <jkj@sco.com>
  *
@@ -267,7 +267,7 @@ xf86KbdOff()
 #include "xf86OSKbd.h"
 
 Bool
-xf86OSKbdPreInit(KbdDevPtr pKbd)
+xf86OSKbdPreInit(InputInfoPtr pInfo)
 {
     return FALSE;
 }
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/sco/sco_mouse.c b/xc/programs/Xserver/hw/xfree86/os-support/sco/sco_mouse.c
index 5affae58b..37b9eb5a8 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/sco/sco_mouse.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/sco/sco_mouse.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/sco/sco_mouse.c,v 3.12 2001/06/30 22:41:49 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/sco/sco_mouse.c,v 3.13 2002/11/20 23:07:50 dawes Exp $ */
 /*
  * Copyright 2001 by J. Kean Johnston <jkj@sco.com>
  *
@@ -92,7 +92,6 @@ OsMouseProc (DeviceIntPtr pPointer, int what)
   MouseDevPtr pMse;
   unsigned char map[9];
   dmask_t dmask;
-  struct devinfo *di;
   MessageType from = X_CONFIG;
   int evi;
 
@@ -114,23 +113,10 @@ OsMouseProc (DeviceIntPtr pPointer, int what)
       FatalError ("OsMouseProc: DEVICE_INIT failed (%s)\n", evtErrStr(pInfo->fd));
     }
 
-    /*
-     * We need to loop here since we will accept either relative device
-     * types (mice) or absolute ones (bitpads / lightpens).
-     */
-    di = (struct devinfo *)0;
-    di = ev_getdev(D_REL|D_BUTTON, di);
-    if (di == (struct devinfo *)0) {
-      FatalError ("OsMouseProc: Could not extract mouse device info\n");
-    }
     pMse->buttons = xf86SetIntOption (pInfo->options, "Buttons", 0);
     if (pMse->buttons == 0) {
-      pMse->buttons = (int)di->buttons;
-      from = X_PROBED;
-      if (pMse->buttons <= 0) {
-        pMse->buttons = MSE_DFLTBUTTONS;
-        from = X_DEFAULT;
-      }
+      pMse->buttons = 8;
+      from = X_DEFAULT;
     }
     xf86Msg (from, "%s: Buttons: %d\n", pInfo->name, pMse->buttons);
 
@@ -194,7 +180,19 @@ OsMouseReadInput (InputInfoPtr pInfo)
   pMse = pInfo->private;
 
   while ((evp = ev_read()) != (EVENT *)0) {
-    pMse->PostEvent (pInfo, EV_BUTTONS(*evp), EV_DX(*evp), -(EV_DY(*evp)),0,0);
+    int buttons = EV_BUTTONS(*evp);
+    int dx = EV_DX(*evp), dy = -(EV_DY(*evp)), dz = 0, dw = 0;
+
+    if (EV_TAG(*evp) & T_WHEEL) {
+      dz = (dy & 0x08) ? (dy & 0x0f) - 16 : (dy & 0x0f);
+      dx = dy = 0;
+      pMse->PostEvent (pInfo, buttons, dx, dy, dz, dw);
+      /* Simulate button release */
+      dz = 0;
+      buttons &= ~(WHEEL_FWD | WHEEL_BACK);
+    }
+
+    pMse->PostEvent (pInfo, buttons, dx, dy, dz, dw);
     ev_pop();
   }
 }
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/mach64_dma.c b/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/mach64_dma.c
index 65274f1d9..bfb869e4b 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/mach64_dma.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/mach64_dma.c
@@ -1013,7 +1013,7 @@ int mach64_dma_idle( DRM_IOCTL_ARGS )
 
 	DRM_DEBUG( "%s\n", __FUNCTION__ );
 
-	LOCK_TEST_WITH_RETURN( dev );
+	LOCK_TEST_WITH_RETURN( dev, filp );
 
 	return mach64_do_dma_idle( dev_priv );
 }
@@ -1025,7 +1025,7 @@ int mach64_dma_flush( DRM_IOCTL_ARGS )
 
 	DRM_DEBUG( "%s\n", __FUNCTION__ );
 
-	LOCK_TEST_WITH_RETURN( dev );
+	LOCK_TEST_WITH_RETURN( dev, filp );
 
 	return mach64_do_dma_flush( dev_priv );
 }
@@ -1037,7 +1037,7 @@ int mach64_engine_reset( DRM_IOCTL_ARGS )
 	
 	DRM_DEBUG( "%s\n", __FUNCTION__ );
 
-	LOCK_TEST_WITH_RETURN( dev );
+	LOCK_TEST_WITH_RETURN( dev, filp );
 
 	return mach64_do_engine_reset( dev_priv );
 }
@@ -1228,7 +1228,7 @@ _freelist_entry_found:
  * DMA buffer request and submission IOCTL handler
  */
 
-static int mach64_dma_get_buffers( drm_device_t *dev, drm_dma_t *d )
+static int mach64_dma_get_buffers( DRMFILE filp, drm_device_t *dev, drm_dma_t *d )
 {
 	int i;
 	drm_buf_t *buf;
@@ -1242,7 +1242,7 @@ static int mach64_dma_get_buffers( drm_device_t *dev, drm_dma_t *d )
 		if ( !buf ) return DRM_ERR(EAGAIN);
 #endif
 
-		buf->pid = DRM_CURRENTPID;
+		buf->filp = filp;
 
 		if ( DRM_COPY_TO_USER( &d->request_indices[i], &buf->idx,
 				   sizeof(buf->idx) ) )
@@ -1263,7 +1263,7 @@ int mach64_dma_buffers( DRM_IOCTL_ARGS )
 	drm_dma_t d;
         int ret = 0;
 
-        LOCK_TEST_WITH_RETURN( dev );
+        LOCK_TEST_WITH_RETURN( dev, filp );
 
 	DRM_COPY_FROM_USER_IOCTL( d, (drm_dma_t *)data, sizeof(d) );
 
@@ -1289,7 +1289,7 @@ int mach64_dma_buffers( DRM_IOCTL_ARGS )
 
 	if ( d.request_count ) 
 	{
-		ret = mach64_dma_get_buffers( dev, &d );
+		ret = mach64_dma_get_buffers( filp, dev, &d );
 	}
 
 	DRM_COPY_TO_USER_IOCTL( (drm_dma_t *)data, d, sizeof(d) );
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/mach64_drv.h b/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/mach64_drv.h
index 748802508..8cfc97e9b 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/mach64_drv.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/mach64_drv.h
@@ -728,16 +728,6 @@ mach64_update_ring_snapshot( drm_mach64_private_t *dev_priv )
 	}
 }
 
-#define LOCK_TEST_WITH_RETURN( dev )					\
-do {									\
-	if ( !_DRM_LOCK_IS_HELD( dev->lock.hw_lock->lock ) ||		\
-	     dev->lock.pid != DRM_CURRENTPID ) {			\
-		DRM_ERROR( "%s called without lock held\n",		\
-			   __FUNCTION__ );				\
-		return DRM_ERR(EINVAL);					\
-	}								\
-} while (0)
-
 /* FIXME: right now this is needed to ensure free buffers for state emits */
 /* CHECKME: I've disabled this as it isn't necessary - we already wait for free buffers */
 #define RING_SPACE_TEST_WITH_RETURN( dev_priv )
@@ -867,7 +857,7 @@ do {						\
 } while(0)
 
 /* FIXME: use a private set of smaller buffers for state emits, clears, and swaps? */
-#define DMAGETPTR( dev_priv, n )					\
+#define DMAGETPTR( filp, dev_priv, n )					\
 do {									\
 	if ( MACH64_VERBOSE ) {						\
 		DRM_INFO( "DMAGETPTR( %d ) in %s\n",			\
@@ -884,7 +874,7 @@ do {									\
 			   __FUNCTION__ );				\
 		return DRM_ERR(EFAULT);					\
 	}								\
-	_buf->pid = DRM_CURRENTPID;					\
+	_buf->filp = filp;						\
 	_outcount = 0;							\
 									\
         _buf_wptr = GETBUFPTR( _buf );					\
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/mach64_state.c b/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/mach64_state.c
index a22697012..3716102b8 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/mach64_state.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/mach64_state.c
@@ -66,8 +66,8 @@ static void mach64_print_dirty( const char *msg, unsigned int flags )
 /* This function returns 0 on success, 1 for no intersection, and
  * negative for an error
  */
-static int mach64_emit_cliprect( drm_mach64_private_t *dev_priv,
-					drm_clip_rect_t *box )
+static int mach64_emit_cliprect( DRMFILE filp, drm_mach64_private_t *dev_priv,
+				 drm_clip_rect_t *box )
 {
 	u32 sc_left_right, sc_top_bottom;
 	drm_clip_rect_t scissor;
@@ -95,7 +95,7 @@ static int mach64_emit_cliprect( drm_mach64_private_t *dev_priv,
 	if ( scissor.x1 >= scissor.x2 ) return 1;
 	if ( scissor.y1 >= scissor.y2 ) return 1;
 
-	DMAGETPTR( dev_priv, 2 ); /* returns on failure to get buffer */
+	DMAGETPTR( filp, dev_priv, 2 ); /* returns on failure to get buffer */
 
 	sc_left_right = ( (scissor.x1 << 0) | (scissor.x2 << 16) );
 	sc_top_bottom = ( (scissor.y1 << 0) | (scissor.y2 << 16) );
@@ -108,7 +108,7 @@ static int mach64_emit_cliprect( drm_mach64_private_t *dev_priv,
 	return 0;
 }
 
-static inline int mach64_emit_state( drm_mach64_private_t *dev_priv )
+static inline int mach64_emit_state( DRMFILE filp, drm_mach64_private_t *dev_priv )
 {
 	drm_mach64_sarea_t *sarea_priv = dev_priv->sarea_priv;
 	drm_mach64_context_regs_t *regs = &sarea_priv->context_state;
@@ -122,7 +122,7 @@ static inline int mach64_emit_state( drm_mach64_private_t *dev_priv )
 		DRM_DEBUG( "%s: dirty=0x%08x\n", __FUNCTION__, dirty );
 	}
 
-	DMAGETPTR( dev_priv, 17 ); /* returns on failure to get buffer */
+	DMAGETPTR( filp, dev_priv, 17 ); /* returns on failure to get buffer */
 
 	if ( dirty & MACH64_UPLOAD_MISC ) {
 		DMAOUTREG( MACH64_DP_MIX, regs->dp_mix );
@@ -187,11 +187,11 @@ static inline int mach64_emit_state( drm_mach64_private_t *dev_priv )
  * DMA command dispatch functions
  */
 
-static int mach64_dma_dispatch_clear( drm_device_t *dev,
-				       unsigned int flags,
-				       int cx, int cy, int cw, int ch,
-				       unsigned int clear_color,
-				       unsigned int clear_depth )
+static int mach64_dma_dispatch_clear( DRMFILE filp, drm_device_t *dev,
+				      unsigned int flags,
+				      int cx, int cy, int cw, int ch,
+				      unsigned int clear_color,
+				      unsigned int clear_depth )
 {
 	drm_mach64_private_t *dev_priv = dev->dev_private;
 	drm_mach64_sarea_t *sarea_priv = dev_priv->sarea_priv;
@@ -229,7 +229,7 @@ static int mach64_dma_dispatch_clear( drm_device_t *dev,
 	if ( !nbox ) 
 		return 0;
 
-	DMAGETPTR( dev_priv, nbox * 31 ); /* returns on failure to get buffer */
+	DMAGETPTR( filp, dev_priv, nbox * 31 ); /* returns on failure to get buffer */
 
 	for ( i = 0 ; i < nbox ; i++ ) {
 		int x = pbox[i].x1;
@@ -337,7 +337,7 @@ static int mach64_dma_dispatch_clear( drm_device_t *dev,
 	return 0;
 }
 
-static int mach64_dma_dispatch_swap( drm_device_t *dev )
+static int mach64_dma_dispatch_swap( DRMFILE filp, drm_device_t *dev )
 {
 	drm_mach64_private_t *dev_priv = dev->dev_private;
 	drm_mach64_sarea_t *sarea_priv = dev_priv->sarea_priv;
@@ -362,7 +362,7 @@ static int mach64_dma_dispatch_swap( drm_device_t *dev )
 	if ( !nbox ) 
 		return 0;
 
-	DMAGETPTR( dev_priv, 13 + nbox * 4 ); /* returns on failure to get buffer */
+	DMAGETPTR( filp, dev_priv, 13 + nbox * 4 ); /* returns on failure to get buffer */
 
 	DMAOUTREG( MACH64_Z_CNTL, 0 );
 	DMAOUTREG( MACH64_SCALE_3D_CNTL, 0 );
@@ -524,7 +524,7 @@ static inline int copy_and_verify_from_user( u32 *to, const u32 *from, unsigned
 	}
 }
 
-static int mach64_dma_dispatch_vertex( drm_device_t *dev, int prim, void *buf, 
+static int mach64_dma_dispatch_vertex( DRMFILE filp, drm_device_t *dev, int prim, void *buf, 
 				       unsigned long used, int discard )
 {
 	drm_mach64_private_t *dev_priv = dev->dev_private;
@@ -548,21 +548,23 @@ static int mach64_dma_dispatch_vertex( drm_device_t *dev, int prim, void *buf,
 			return DRM_ERR(EAGAIN);
 		}
 
-		if ( (verify_ret = copy_and_verify_from_user( GETBUFPTR( copy_buf ), buf, used )) == 0 ) {
+		if ( (verify_ret = 
+		      copy_and_verify_from_user( GETBUFPTR( copy_buf ), buf, used )) == 0 ) {
 
 			copy_buf->used = used;
 
 			DMASETPTR( copy_buf );
 
 			if ( sarea_priv->dirty & ~MACH64_UPLOAD_CLIPRECTS ) {
-				ret = mach64_emit_state( dev_priv );
+				ret = mach64_emit_state( filp, dev_priv );
 				if (ret < 0) return ret;
 			}
  
 			do {
 				/* Emit the next cliprect */
 				if ( i < sarea_priv->nbox ) {
-					ret = mach64_emit_cliprect(dev_priv, &sarea_priv->boxes[i]);
+					ret = mach64_emit_cliprect(filp, dev_priv, 
+								   &sarea_priv->boxes[i]);
 					if ( ret < 0 ) {
 						/* failed to get buffer */
 						return ret;
@@ -616,7 +618,7 @@ static int mach64_dma_dispatch_vertex( drm_device_t *dev, int prim, void *buf,
 }
 
 
-static int mach64_dma_dispatch_blit( drm_device_t *dev,
+static int mach64_dma_dispatch_blit( DRMFILE filp, drm_device_t *dev,
 				     drm_mach64_blit_t *blit )
 {
 	drm_mach64_private_t *dev_priv = dev->dev_private;
@@ -651,9 +653,9 @@ static int mach64_dma_dispatch_blit( drm_device_t *dev,
 	 */
 	buf = dma->buflist[blit->idx];
 	
-	if ( buf->pid != DRM_CURRENTPID ) {
-		DRM_ERROR( "process %d using buffer owned by %d\n",
-			   DRM_CURRENTPID, buf->pid );
+	if ( buf->filp != filp ) {
+		DRM_ERROR( "process %d (filp %p) using buffer with filp %p\n",
+			   DRM_CURRENTPID, filp, buf->filp );
 		return DRM_ERR(EINVAL);
 	}
 
@@ -739,7 +741,7 @@ int mach64_dma_clear( DRM_IOCTL_ARGS )
 
 	DRM_DEBUG( "%s: pid=%d\n", __FUNCTION__, DRM_CURRENTPID  );
 
-	LOCK_TEST_WITH_RETURN( dev );
+	LOCK_TEST_WITH_RETURN( dev, filp );
 	
 	DRM_COPY_FROM_USER_IOCTL( clear, (drm_mach64_clear_t *)data,
 			     sizeof(clear) );
@@ -749,9 +751,9 @@ int mach64_dma_clear( DRM_IOCTL_ARGS )
 	if ( sarea_priv->nbox > MACH64_NR_SAREA_CLIPRECTS )
 		sarea_priv->nbox = MACH64_NR_SAREA_CLIPRECTS;
 
-	ret = mach64_dma_dispatch_clear( dev, clear.flags,
-				   clear.x, clear.y, clear.w, clear.h,
-				   clear.clear_color, clear.clear_depth );
+	ret = mach64_dma_dispatch_clear( filp, dev, clear.flags,
+					 clear.x, clear.y, clear.w, clear.h,
+					 clear.clear_color, clear.clear_depth );
 
 	/* Make sure we restore the 3D state next time.
 	 */
@@ -769,14 +771,14 @@ int mach64_dma_swap( DRM_IOCTL_ARGS )
 
 	DRM_DEBUG( "%s: pid=%d\n", __FUNCTION__, DRM_CURRENTPID );
 
-	LOCK_TEST_WITH_RETURN( dev );
+	LOCK_TEST_WITH_RETURN( dev, filp );
 
 	RING_SPACE_TEST_WITH_RETURN( dev_priv );
 	
 	if ( sarea_priv->nbox > MACH64_NR_SAREA_CLIPRECTS )
 		sarea_priv->nbox = MACH64_NR_SAREA_CLIPRECTS;
 
-	ret = mach64_dma_dispatch_swap( dev );
+	ret = mach64_dma_dispatch_swap( filp, dev );
 
 	/* Make sure we restore the 3D state next time.
 	 */
@@ -792,7 +794,7 @@ int mach64_dma_vertex( DRM_IOCTL_ARGS )
 	drm_mach64_sarea_t *sarea_priv = dev_priv->sarea_priv;
 	drm_mach64_vertex_t vertex;
 
-	LOCK_TEST_WITH_RETURN( dev );
+	LOCK_TEST_WITH_RETURN( dev, filp );
 
 	if ( !dev_priv ) {
 		DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
@@ -822,7 +824,7 @@ int mach64_dma_vertex( DRM_IOCTL_ARGS )
 	if ( sarea_priv->nbox > MACH64_NR_SAREA_CLIPRECTS )
 		sarea_priv->nbox = MACH64_NR_SAREA_CLIPRECTS;
 
-	return mach64_dma_dispatch_vertex( dev, vertex.prim, vertex.buf, 
+	return mach64_dma_dispatch_vertex( filp, dev, vertex.prim, vertex.buf, 
 					   vertex.used, vertex.discard );
 }
 
@@ -835,7 +837,7 @@ int mach64_dma_blit( DRM_IOCTL_ARGS )
 	drm_mach64_blit_t blit;
 	int ret;
 
-	LOCK_TEST_WITH_RETURN( dev );
+	LOCK_TEST_WITH_RETURN( dev, filp );
 
 	DRM_COPY_FROM_USER_IOCTL( blit, (drm_mach64_blit_t *)data,
 			     sizeof(blit) );
@@ -851,7 +853,7 @@ int mach64_dma_blit( DRM_IOCTL_ARGS )
 
 	RING_SPACE_TEST_WITH_RETURN( dev_priv );
 
-	ret = mach64_dma_dispatch_blit( dev, &blit );
+	ret = mach64_dma_dispatch_blit( filp, dev, &blit );
 
 	/* Make sure we restore the 3D state next time.
 	 */
@@ -882,7 +884,7 @@ int mach64_get_param( DRM_IOCTL_ARGS )
 	switch ( param.param ) {
 	case MACH64_PARAM_FRAMES_QUEUED:
 		/* Needs lock since it calls mach64_ring_tick() */
-		LOCK_TEST_WITH_RETURN( dev );
+		LOCK_TEST_WITH_RETURN( dev, filp );
 		value = mach64_do_get_frames_queued( dev_priv );
 		break;
 	case MACH64_PARAM_IRQ_NR:
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/mga_dma.c b/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/mga_dma.c
new file mode 100644
index 000000000..5e95c9f9b
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/mga_dma.c
@@ -0,0 +1,796 @@
+/* mga_dma.c -- DMA support for mga g200/g400 -*- linux-c -*-
+ * Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com
+ *
+ * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
+ * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ *    Rickard E. (Rik) Faith <faith@valinux.com>
+ *    Jeff Hartmann <jhartmann@valinux.com>
+ *    Keith Whitwell <keith@tungstengraphics.com>
+ *
+ * Rewritten by:
+ *    Gareth Hughes <gareth@valinux.com>
+ */
+
+#include "mga.h"
+#include "drmP.h"
+#include "drm.h"
+#include "mga_drm.h"
+#include "mga_drv.h"
+
+#define MGA_DEFAULT_USEC_TIMEOUT	10000
+#define MGA_FREELIST_DEBUG		0
+
+
+/* ================================================================
+ * Engine control
+ */
+
+int mga_do_wait_for_idle( drm_mga_private_t *dev_priv )
+{
+	u32 status = 0;
+	int i;
+	DRM_DEBUG( "\n" );
+
+	for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) {
+		status = MGA_READ( MGA_STATUS ) & MGA_ENGINE_IDLE_MASK;
+		if ( status == MGA_ENDPRDMASTS ) {
+			MGA_WRITE8( MGA_CRTC_INDEX, 0 );
+			return 0;
+		}
+		DRM_UDELAY( 1 );
+	}
+
+#if MGA_DMA_DEBUG
+	DRM_ERROR( "failed!\n" );
+	DRM_INFO( "   status=0x%08x\n", status );
+#endif
+	return DRM_ERR(EBUSY);
+}
+
+int mga_do_dma_idle( drm_mga_private_t *dev_priv )
+{
+	u32 status = 0;
+	int i;
+	DRM_DEBUG( "\n" );
+
+	for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) {
+		status = MGA_READ( MGA_STATUS ) & MGA_DMA_IDLE_MASK;
+		if ( status == MGA_ENDPRDMASTS ) return 0;
+		DRM_UDELAY( 1 );
+	}
+
+#if MGA_DMA_DEBUG
+	DRM_ERROR( "failed! status=0x%08x\n", status );
+#endif
+	return DRM_ERR(EBUSY);
+}
+
+int mga_do_dma_reset( drm_mga_private_t *dev_priv )
+{
+	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
+	drm_mga_primary_buffer_t *primary = &dev_priv->prim;
+
+	DRM_DEBUG( "\n" );
+
+	/* The primary DMA stream should look like new right about now.
+	 */
+	primary->tail = 0;
+	primary->space = primary->size;
+	primary->last_flush = 0;
+
+	sarea_priv->last_wrap = 0;
+
+	/* FIXME: Reset counters, buffer ages etc...
+	 */
+
+	/* FIXME: What else do we need to reinitialize?  WARP stuff?
+	 */
+
+	return 0;
+}
+
+int mga_do_engine_reset( drm_mga_private_t *dev_priv )
+{
+	DRM_DEBUG( "\n" );
+
+	/* Okay, so we've completely screwed up and locked the engine.
+	 * How about we clean up after ourselves?
+	 */
+	MGA_WRITE( MGA_RST, MGA_SOFTRESET );
+	DRM_UDELAY( 15 );				/* Wait at least 10 usecs */
+	MGA_WRITE( MGA_RST, 0 );
+
+	/* Initialize the registers that get clobbered by the soft
+	 * reset.  Many of the core register values survive a reset,
+	 * but the drawing registers are basically all gone.
+	 *
+	 * 3D clients should probably die after calling this.  The X
+	 * server should reset the engine state to known values.
+	 */
+#if 0
+	MGA_WRITE( MGA_PRIMPTR,
+		   virt_to_bus((void *)dev_priv->prim.status_page) |
+		   MGA_PRIMPTREN0 |
+		   MGA_PRIMPTREN1 );
+#endif
+
+	MGA_WRITE( MGA_ICLEAR, MGA_SOFTRAPICLR );
+	MGA_WRITE( MGA_IEN,    MGA_SOFTRAPIEN );
+
+	/* The primary DMA stream should look like new right about now.
+	 */
+	mga_do_dma_reset( dev_priv );
+
+	/* This bad boy will never fail.
+	 */
+	return 0;
+}
+
+
+/* ================================================================
+ * Primary DMA stream
+ */
+
+void mga_do_dma_flush( drm_mga_private_t *dev_priv )
+{
+	drm_mga_primary_buffer_t *primary = &dev_priv->prim;
+	u32 head, tail;
+	u32 status = 0;
+	int i;
+ 	DMA_LOCALS;
+	DRM_DEBUG( "\n" );
+
+        /* We need to wait so that we can do an safe flush */
+	for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) {
+		status = MGA_READ( MGA_STATUS ) & MGA_ENGINE_IDLE_MASK;
+		if ( status == MGA_ENDPRDMASTS ) break;
+		DRM_UDELAY( 1 );
+	}
+
+	if ( primary->tail == primary->last_flush ) {
+		DRM_DEBUG( "   bailing out...\n" );
+		return;
+	}
+
+	tail = primary->tail + dev_priv->primary->offset;
+
+	/* We need to pad the stream between flushes, as the card
+	 * actually (partially?) reads the first of these commands.
+	 * See page 4-16 in the G400 manual, middle of the page or so.
+	 */
+	BEGIN_DMA( 1 );
+
+	DMA_BLOCK( MGA_DMAPAD,  0x00000000,
+		   MGA_DMAPAD,  0x00000000,
+		   MGA_DMAPAD,  0x00000000,
+		   MGA_DMAPAD,	0x00000000 );
+
+	ADVANCE_DMA();
+
+	primary->last_flush = primary->tail;
+
+	head = MGA_READ( MGA_PRIMADDRESS );
+
+	if ( head <= tail ) {
+		primary->space = primary->size - primary->tail;
+	} else {
+		primary->space = head - tail;
+	}
+
+	DRM_DEBUG( "   head = 0x%06lx\n", head - dev_priv->primary->offset );
+	DRM_DEBUG( "   tail = 0x%06lx\n", tail - dev_priv->primary->offset );
+	DRM_DEBUG( "  space = 0x%06x\n", primary->space );
+
+	mga_flush_write_combine();
+	MGA_WRITE( MGA_PRIMEND, tail | MGA_PAGPXFER );
+
+	DRM_DEBUG( "done.\n" );
+}
+
+void mga_do_dma_wrap_start( drm_mga_private_t *dev_priv )
+{
+	drm_mga_primary_buffer_t *primary = &dev_priv->prim;
+	u32 head, tail;
+	DMA_LOCALS;
+	DRM_DEBUG( "\n" );
+
+	BEGIN_DMA_WRAP();
+
+	DMA_BLOCK( MGA_DMAPAD,	0x00000000,
+		   MGA_DMAPAD,	0x00000000,
+		   MGA_DMAPAD,	0x00000000,
+		   MGA_DMAPAD,	0x00000000 );
+
+	ADVANCE_DMA();
+
+	tail = primary->tail + dev_priv->primary->offset;
+
+	primary->tail = 0;
+	primary->last_flush = 0;
+	primary->last_wrap++;
+
+	head = MGA_READ( MGA_PRIMADDRESS );
+
+	if ( head == dev_priv->primary->offset ) {
+		primary->space = primary->size;
+	} else {
+		primary->space = head - dev_priv->primary->offset;
+	}
+
+	DRM_DEBUG( "   head = 0x%06lx\n",
+		  head - dev_priv->primary->offset );
+	DRM_DEBUG( "   tail = 0x%06x\n", primary->tail );
+	DRM_DEBUG( "   wrap = %d\n", primary->last_wrap );
+	DRM_DEBUG( "  space = 0x%06x\n", primary->space );
+
+	mga_flush_write_combine();
+	MGA_WRITE( MGA_PRIMEND, tail | MGA_PAGPXFER );
+
+	set_bit( 0, &primary->wrapped );
+	DRM_DEBUG( "done.\n" );
+}
+
+void mga_do_dma_wrap_end( drm_mga_private_t *dev_priv )
+{
+	drm_mga_primary_buffer_t *primary = &dev_priv->prim;
+	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
+	u32 head = dev_priv->primary->offset;
+	DRM_DEBUG( "\n" );
+
+	sarea_priv->last_wrap++;
+	DRM_DEBUG( "   wrap = %d\n", sarea_priv->last_wrap );
+
+	mga_flush_write_combine();
+	MGA_WRITE( MGA_PRIMADDRESS, head | MGA_DMA_GENERAL );
+
+	clear_bit( 0, &primary->wrapped );
+	DRM_DEBUG( "done.\n" );
+}
+
+
+/* ================================================================
+ * Freelist management
+ */
+
+#define MGA_BUFFER_USED		~0
+#define MGA_BUFFER_FREE		0
+
+#if MGA_FREELIST_DEBUG
+static void mga_freelist_print( drm_device_t *dev )
+{
+	drm_mga_private_t *dev_priv = dev->dev_private;
+	drm_mga_freelist_t *entry;
+
+	DRM_INFO( "\n" );
+	DRM_INFO( "current dispatch: last=0x%x done=0x%x\n",
+		  dev_priv->sarea_priv->last_dispatch,
+		  (unsigned int)(MGA_READ( MGA_PRIMADDRESS ) -
+				 dev_priv->primary->offset) );
+	DRM_INFO( "current freelist:\n" );
+
+	for ( entry = dev_priv->head->next ; entry ; entry = entry->next ) {
+		DRM_INFO( "   %p   idx=%2d  age=0x%x 0x%06lx\n",
+			  entry, entry->buf->idx, entry->age.head,
+			  entry->age.head - dev_priv->primary->offset );
+	}
+	DRM_INFO( "\n" );
+}
+#endif
+
+static int mga_freelist_init( drm_device_t *dev, drm_mga_private_t *dev_priv )
+{
+	drm_device_dma_t *dma = dev->dma;
+	drm_buf_t *buf;
+	drm_mga_buf_priv_t *buf_priv;
+	drm_mga_freelist_t *entry;
+	int i;
+	DRM_DEBUG( "count=%d\n", dma->buf_count );
+
+	dev_priv->head = DRM(alloc)( sizeof(drm_mga_freelist_t),
+				     DRM_MEM_DRIVER );
+	if ( dev_priv->head == NULL )
+		return DRM_ERR(ENOMEM);
+
+	memset( dev_priv->head, 0, sizeof(drm_mga_freelist_t) );
+	SET_AGE( &dev_priv->head->age, MGA_BUFFER_USED, 0 );
+
+	for ( i = 0 ; i < dma->buf_count ; i++ ) {
+		buf = dma->buflist[i];
+	        buf_priv = buf->dev_private;
+
+		entry = DRM(alloc)( sizeof(drm_mga_freelist_t),
+				    DRM_MEM_DRIVER );
+		if ( entry == NULL )
+			return DRM_ERR(ENOMEM);
+
+		memset( entry, 0, sizeof(drm_mga_freelist_t) );
+
+		entry->next = dev_priv->head->next;
+		entry->prev = dev_priv->head;
+		SET_AGE( &entry->age, MGA_BUFFER_FREE, 0 );
+		entry->buf = buf;
+
+		if ( dev_priv->head->next != NULL )
+			dev_priv->head->next->prev = entry;
+		if ( entry->next == NULL )
+			dev_priv->tail = entry;
+
+		buf_priv->list_entry = entry;
+		buf_priv->discard = 0;
+		buf_priv->dispatched = 0;
+
+		dev_priv->head->next = entry;
+	}
+
+	return 0;
+}
+
+static void mga_freelist_cleanup( drm_device_t *dev )
+{
+	drm_mga_private_t *dev_priv = dev->dev_private;
+	drm_mga_freelist_t *entry;
+	drm_mga_freelist_t *next;
+	DRM_DEBUG( "\n" );
+
+	entry = dev_priv->head;
+	while ( entry ) {
+		next = entry->next;
+		DRM(free)( entry, sizeof(drm_mga_freelist_t), DRM_MEM_DRIVER );
+		entry = next;
+	}
+
+	dev_priv->head = dev_priv->tail = NULL;
+}
+
+#if 0
+/* FIXME: Still needed?
+ */
+static void mga_freelist_reset( drm_device_t *dev )
+{
+	drm_device_dma_t *dma = dev->dma;
+	drm_buf_t *buf;
+	drm_mga_buf_priv_t *buf_priv;
+	int i;
+
+	for ( i = 0 ; i < dma->buf_count ; i++ ) {
+		buf = dma->buflist[i];
+	        buf_priv = buf->dev_private;
+		SET_AGE( &buf_priv->list_entry->age,
+			 MGA_BUFFER_FREE, 0 );
+	}
+}
+#endif
+
+static drm_buf_t *mga_freelist_get( drm_device_t *dev )
+{
+	drm_mga_private_t *dev_priv = dev->dev_private;
+	drm_mga_freelist_t *next;
+	drm_mga_freelist_t *prev;
+	drm_mga_freelist_t *tail = dev_priv->tail;
+	u32 head, wrap;
+	DRM_DEBUG( "\n" );
+
+	head = MGA_READ( MGA_PRIMADDRESS );
+	wrap = dev_priv->sarea_priv->last_wrap;
+
+	DRM_DEBUG( "   tail=0x%06lx %d\n",
+		   tail->age.head ?
+		   tail->age.head - dev_priv->primary->offset : 0,
+		   tail->age.wrap );
+	DRM_DEBUG( "   head=0x%06lx %d\n",
+		   head - dev_priv->primary->offset, wrap );
+
+	if ( TEST_AGE( &tail->age, head, wrap ) ) {
+		prev = dev_priv->tail->prev;
+		next = dev_priv->tail;
+		prev->next = NULL;
+		next->prev = next->next = NULL;
+		dev_priv->tail = prev;
+		SET_AGE( &next->age, MGA_BUFFER_USED, 0 );
+		return next->buf;
+	}
+
+	DRM_DEBUG( "returning NULL!\n" );
+	return NULL;
+}
+
+int mga_freelist_put( drm_device_t *dev, drm_buf_t *buf )
+{
+	drm_mga_private_t *dev_priv = dev->dev_private;
+	drm_mga_buf_priv_t *buf_priv = buf->dev_private;
+	drm_mga_freelist_t *head, *entry, *prev;
+
+	DRM_DEBUG( "age=0x%06lx wrap=%d\n",
+		   buf_priv->list_entry->age.head -
+		   dev_priv->primary->offset,
+		   buf_priv->list_entry->age.wrap );
+
+	entry = buf_priv->list_entry;
+	head = dev_priv->head;
+
+	if ( buf_priv->list_entry->age.head == MGA_BUFFER_USED ) {
+		SET_AGE( &entry->age, MGA_BUFFER_FREE, 0 );
+		prev = dev_priv->tail;
+		prev->next = entry;
+		entry->prev = prev;
+		entry->next = NULL;
+	} else {
+		prev = head->next;
+		head->next = entry;
+		prev->prev = entry;
+		entry->prev = head;
+		entry->next = prev;
+	}
+
+	return 0;
+}
+
+
+/* ================================================================
+ * DMA initialization, cleanup
+ */
+
+static int mga_do_init_dma( drm_device_t *dev, drm_mga_init_t *init )
+{
+	drm_mga_private_t *dev_priv;
+	int ret;
+	DRM_DEBUG( "\n" );
+
+	dev_priv = DRM(alloc)( sizeof(drm_mga_private_t), DRM_MEM_DRIVER );
+	if ( !dev_priv )
+		return DRM_ERR(ENOMEM);
+
+	memset( dev_priv, 0, sizeof(drm_mga_private_t) );
+
+	dev_priv->chipset = init->chipset;
+
+	dev_priv->usec_timeout = MGA_DEFAULT_USEC_TIMEOUT;
+
+	if ( init->sgram ) {
+		dev_priv->clear_cmd = MGA_DWGCTL_CLEAR | MGA_ATYPE_BLK;
+	} else {
+		dev_priv->clear_cmd = MGA_DWGCTL_CLEAR | MGA_ATYPE_RSTR;
+	}
+	dev_priv->maccess	= init->maccess;
+
+	dev_priv->fb_cpp	= init->fb_cpp;
+	dev_priv->front_offset	= init->front_offset;
+	dev_priv->front_pitch	= init->front_pitch;
+	dev_priv->back_offset	= init->back_offset;
+	dev_priv->back_pitch	= init->back_pitch;
+
+	dev_priv->depth_cpp	= init->depth_cpp;
+	dev_priv->depth_offset	= init->depth_offset;
+	dev_priv->depth_pitch	= init->depth_pitch;
+
+	/* FIXME: Need to support AGP textures...
+	 */
+	dev_priv->texture_offset = init->texture_offset[0];
+	dev_priv->texture_size = init->texture_size[0];
+
+	DRM_GETSAREA();
+
+	if(!dev_priv->sarea) {
+		DRM_ERROR( "failed to find sarea!\n" );
+		/* Assign dev_private so we can do cleanup. */
+		dev->dev_private = (void *)dev_priv;
+		mga_do_cleanup_dma( dev );
+		return DRM_ERR(EINVAL);
+	}
+
+	DRM_FIND_MAP( dev_priv->fb, init->fb_offset );
+	if(!dev_priv->fb) {
+		DRM_ERROR( "failed to find framebuffer!\n" );
+		/* Assign dev_private so we can do cleanup. */
+		dev->dev_private = (void *)dev_priv;
+		mga_do_cleanup_dma( dev );
+		return DRM_ERR(EINVAL);
+	}
+	DRM_FIND_MAP( dev_priv->mmio, init->mmio_offset );
+	if(!dev_priv->mmio) {
+		DRM_ERROR( "failed to find mmio region!\n" );
+		/* Assign dev_private so we can do cleanup. */
+		dev->dev_private = (void *)dev_priv;
+		mga_do_cleanup_dma( dev );
+		return DRM_ERR(EINVAL);
+	}
+	DRM_FIND_MAP( dev_priv->status, init->status_offset );
+	if(!dev_priv->status) {
+		DRM_ERROR( "failed to find status page!\n" );
+		/* Assign dev_private so we can do cleanup. */
+		dev->dev_private = (void *)dev_priv;
+		mga_do_cleanup_dma( dev );
+		return DRM_ERR(EINVAL);
+	}
+
+	DRM_FIND_MAP( dev_priv->warp, init->warp_offset );
+	if(!dev_priv->warp) {
+		DRM_ERROR( "failed to find warp microcode region!\n" );
+		/* Assign dev_private so we can do cleanup. */
+		dev->dev_private = (void *)dev_priv;
+		mga_do_cleanup_dma( dev );
+		return DRM_ERR(EINVAL);
+	}
+	DRM_FIND_MAP( dev_priv->primary, init->primary_offset );
+	if(!dev_priv->primary) {
+		DRM_ERROR( "failed to find primary dma region!\n" );
+		/* Assign dev_private so we can do cleanup. */
+		dev->dev_private = (void *)dev_priv;
+		mga_do_cleanup_dma( dev );
+		return DRM_ERR(EINVAL);
+	}
+	DRM_FIND_MAP( dev_priv->buffers, init->buffers_offset );
+	if(!dev_priv->buffers) {
+		DRM_ERROR( "failed to find dma buffer region!\n" );
+		/* Assign dev_private so we can do cleanup. */
+		dev->dev_private = (void *)dev_priv;
+		mga_do_cleanup_dma( dev );
+		return DRM_ERR(EINVAL);
+	}
+
+	dev_priv->sarea_priv =
+		(drm_mga_sarea_t *)((u8 *)dev_priv->sarea->handle +
+				    init->sarea_priv_offset);
+
+	DRM_IOREMAP( dev_priv->warp );
+	DRM_IOREMAP( dev_priv->primary );
+	DRM_IOREMAP( dev_priv->buffers );
+
+	if(!dev_priv->warp->handle ||
+	   !dev_priv->primary->handle ||
+	   !dev_priv->buffers->handle ) {
+		DRM_ERROR( "failed to ioremap agp regions!\n" );
+		/* Assign dev_private so we can do cleanup. */
+		dev->dev_private = (void *)dev_priv;
+		mga_do_cleanup_dma( dev );
+		return DRM_ERR(ENOMEM);
+	}
+
+	ret = mga_warp_install_microcode( dev_priv );
+	if ( ret < 0 ) {
+		DRM_ERROR( "failed to install WARP ucode!\n" );
+		/* Assign dev_private so we can do cleanup. */
+		dev->dev_private = (void *)dev_priv;
+		mga_do_cleanup_dma( dev );
+		return ret;
+	}
+
+	ret = mga_warp_init( dev_priv );
+	if ( ret < 0 ) {
+		DRM_ERROR( "failed to init WARP engine!\n" );
+		/* Assign dev_private so we can do cleanup. */
+		dev->dev_private = (void *)dev_priv;
+		mga_do_cleanup_dma( dev );
+		return ret;
+	}
+
+	dev_priv->prim.status = (u32 *)dev_priv->status->handle;
+
+	mga_do_wait_for_idle( dev_priv );
+
+	/* Init the primary DMA registers.
+	 */
+	MGA_WRITE( MGA_PRIMADDRESS,
+		   dev_priv->primary->offset | MGA_DMA_GENERAL );
+#if 0
+	MGA_WRITE( MGA_PRIMPTR,
+		   virt_to_bus((void *)dev_priv->prim.status) |
+		   MGA_PRIMPTREN0 |	/* Soft trap, SECEND, SETUPEND */
+		   MGA_PRIMPTREN1 );	/* DWGSYNC */
+#endif
+
+	dev_priv->prim.start = (u8 *)dev_priv->primary->handle;
+	dev_priv->prim.end = ((u8 *)dev_priv->primary->handle
+			      + dev_priv->primary->size);
+	dev_priv->prim.size = dev_priv->primary->size;
+
+	dev_priv->prim.tail = 0;
+	dev_priv->prim.space = dev_priv->prim.size;
+	dev_priv->prim.wrapped = 0;
+
+	dev_priv->prim.last_flush = 0;
+	dev_priv->prim.last_wrap = 0;
+
+	dev_priv->prim.high_mark = 256 * DMA_BLOCK_SIZE;
+
+	dev_priv->prim.status[0] = dev_priv->primary->offset;
+	dev_priv->prim.status[1] = 0;
+
+	dev_priv->sarea_priv->last_wrap = 0;
+	dev_priv->sarea_priv->last_frame.head = 0;
+	dev_priv->sarea_priv->last_frame.wrap = 0;
+
+	if ( mga_freelist_init( dev, dev_priv ) < 0 ) {
+		DRM_ERROR( "could not initialize freelist\n" );
+		/* Assign dev_private so we can do cleanup. */
+		dev->dev_private = (void *)dev_priv;
+		mga_do_cleanup_dma( dev );
+		return DRM_ERR(ENOMEM);
+	}
+
+	/* Make dev_private visable to others. */
+	dev->dev_private = (void *)dev_priv;
+	return 0;
+}
+
+int mga_do_cleanup_dma( drm_device_t *dev )
+{
+	DRM_DEBUG( "\n" );
+
+	if ( dev->dev_private ) {
+		drm_mga_private_t *dev_priv = dev->dev_private;
+
+		DRM_IOREMAPFREE( dev_priv->warp );
+		DRM_IOREMAPFREE( dev_priv->primary );
+		DRM_IOREMAPFREE( dev_priv->buffers );
+
+		if ( dev_priv->head != NULL ) {
+			mga_freelist_cleanup( dev );
+		}
+
+		DRM(free)( dev->dev_private, sizeof(drm_mga_private_t),
+			   DRM_MEM_DRIVER );
+		dev->dev_private = NULL;
+	}
+
+	return 0;
+}
+
+int mga_dma_init( DRM_IOCTL_ARGS )
+{
+	DRM_DEVICE;
+	drm_mga_init_t init;
+
+	DRM_COPY_FROM_USER_IOCTL( init, (drm_mga_init_t *)data, sizeof(init) );
+
+	switch ( init.func ) {
+	case MGA_INIT_DMA:
+		return mga_do_init_dma( dev, &init );
+	case MGA_CLEANUP_DMA:
+		return mga_do_cleanup_dma( dev );
+	}
+
+	return DRM_ERR(EINVAL);
+}
+
+
+/* ================================================================
+ * Primary DMA stream management
+ */
+
+int mga_dma_flush( DRM_IOCTL_ARGS )
+{
+	DRM_DEVICE;
+	drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private;
+	drm_lock_t lock;
+
+	LOCK_TEST_WITH_RETURN( dev, filp );
+
+	DRM_COPY_FROM_USER_IOCTL( lock, (drm_lock_t *)data, sizeof(lock) );
+
+	DRM_DEBUG( "%s%s%s\n",
+		   (lock.flags & _DRM_LOCK_FLUSH) ?	"flush, " : "",
+		   (lock.flags & _DRM_LOCK_FLUSH_ALL) ?	"flush all, " : "",
+		   (lock.flags & _DRM_LOCK_QUIESCENT) ?	"idle, " : "" );
+
+	WRAP_WAIT_WITH_RETURN( dev_priv );
+
+	if ( lock.flags & (_DRM_LOCK_FLUSH | _DRM_LOCK_FLUSH_ALL) ) {
+		mga_do_dma_flush( dev_priv );
+	}
+
+	if ( lock.flags & _DRM_LOCK_QUIESCENT ) {
+#if MGA_DMA_DEBUG
+		int ret = mga_do_wait_for_idle( dev_priv );
+		if ( ret < 0 )
+			DRM_INFO( "%s: -EBUSY\n", __FUNCTION__ );
+		return ret;
+#else
+		return mga_do_wait_for_idle( dev_priv );
+#endif
+	} else {
+		return 0;
+	}
+}
+
+int mga_dma_reset( DRM_IOCTL_ARGS )
+{
+	DRM_DEVICE;
+	drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private;
+
+	LOCK_TEST_WITH_RETURN( dev, filp );
+
+	return mga_do_dma_reset( dev_priv );
+}
+
+
+/* ================================================================
+ * DMA buffer management
+ */
+
+static int mga_dma_get_buffers( DRMFILE filp,
+				drm_device_t *dev, drm_dma_t *d )
+{
+	drm_buf_t *buf;
+	int i;
+
+	for ( i = d->granted_count ; i < d->request_count ; i++ ) {
+		buf = mga_freelist_get( dev );
+		if ( !buf ) return DRM_ERR(EAGAIN);
+
+		buf->filp = filp;
+
+		if ( DRM_COPY_TO_USER( &d->request_indices[i],
+				   &buf->idx, sizeof(buf->idx) ) )
+			return DRM_ERR(EFAULT);
+		if ( DRM_COPY_TO_USER( &d->request_sizes[i],
+				   &buf->total, sizeof(buf->total) ) )
+			return DRM_ERR(EFAULT);
+
+		d->granted_count++;
+	}
+	return 0;
+}
+
+int mga_dma_buffers( DRM_IOCTL_ARGS )
+{
+	DRM_DEVICE;
+	drm_device_dma_t *dma = dev->dma;
+	drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private;
+	drm_dma_t d;
+	int ret = 0;
+
+	LOCK_TEST_WITH_RETURN( dev, filp );
+
+	DRM_COPY_FROM_USER_IOCTL( d, (drm_dma_t *)data, sizeof(d) );
+
+	/* Please don't send us buffers.
+	 */
+	if ( d.send_count != 0 ) {
+		DRM_ERROR( "Process %d trying to send %d buffers via drmDMA\n",
+			   DRM_CURRENTPID, d.send_count );
+		return DRM_ERR(EINVAL);
+	}
+
+	/* We'll send you buffers.
+	 */
+	if ( d.request_count < 0 || d.request_count > dma->buf_count ) {
+		DRM_ERROR( "Process %d trying to get %d buffers (of %d max)\n",
+			   DRM_CURRENTPID, d.request_count, dma->buf_count );
+		return DRM_ERR(EINVAL);
+	}
+
+	WRAP_TEST_WITH_RETURN( dev_priv );
+
+	d.granted_count = 0;
+
+	if ( d.request_count ) {
+		ret = mga_dma_get_buffers( filp, dev, &d );
+	}
+
+	DRM_COPY_TO_USER_IOCTL( (drm_dma_t *)data, d, sizeof(d) );
+
+	return ret;
+}
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/mga_drv.h b/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/mga_drv.h
new file mode 100644
index 000000000..7efc89bce
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/mga_drv.h
@@ -0,0 +1,631 @@
+/* mga_drv.h -- Private header for the Matrox G200/G400 driver -*- linux-c -*-
+ * Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com
+ *
+ * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
+ * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
+ * All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ *    Gareth Hughes <gareth@valinux.com>
+ */
+
+#ifndef __MGA_DRV_H__
+#define __MGA_DRV_H__
+
+typedef struct drm_mga_primary_buffer {
+	u8 *start;
+	u8 *end;
+	int size;
+
+	u32 tail;
+	int space;
+	volatile long wrapped;
+
+	volatile u32 *status;
+
+	u32 last_flush;
+	u32 last_wrap;
+
+	u32 high_mark;
+} drm_mga_primary_buffer_t;
+
+typedef struct drm_mga_freelist {
+   	struct drm_mga_freelist *next;
+   	struct drm_mga_freelist *prev;
+	drm_mga_age_t age;
+   	drm_buf_t *buf;
+} drm_mga_freelist_t;
+
+typedef struct {
+   	drm_mga_freelist_t *list_entry;
+	int discard;
+	int dispatched;
+} drm_mga_buf_priv_t;
+
+typedef struct drm_mga_private {
+	drm_mga_primary_buffer_t prim;
+	drm_mga_sarea_t *sarea_priv;
+
+   	drm_mga_freelist_t *head;
+   	drm_mga_freelist_t *tail;
+
+	unsigned int warp_pipe;
+	unsigned long warp_pipe_phys[MGA_MAX_WARP_PIPES];
+
+	int chipset;
+	int usec_timeout;
+
+	u32 clear_cmd;
+	u32 maccess;
+
+	unsigned int fb_cpp;
+	unsigned int front_offset;
+	unsigned int front_pitch;
+	unsigned int back_offset;
+	unsigned int back_pitch;
+
+	unsigned int depth_cpp;
+	unsigned int depth_offset;
+	unsigned int depth_pitch;
+
+	unsigned int texture_offset;
+	unsigned int texture_size;
+
+	drm_local_map_t *sarea;
+	drm_local_map_t *fb;
+	drm_local_map_t *mmio;
+	drm_local_map_t *status;
+	drm_local_map_t *warp;
+	drm_local_map_t *primary;
+	drm_local_map_t *buffers;
+	drm_local_map_t *agp_textures;
+} drm_mga_private_t;
+
+				/* mga_dma.c */
+extern int mga_dma_init( DRM_IOCTL_ARGS );
+extern int mga_dma_flush( DRM_IOCTL_ARGS );
+extern int mga_dma_reset( DRM_IOCTL_ARGS );
+extern int mga_dma_buffers( DRM_IOCTL_ARGS );
+
+extern int mga_do_wait_for_idle( drm_mga_private_t *dev_priv );
+extern int mga_do_dma_idle( drm_mga_private_t *dev_priv );
+extern int mga_do_dma_reset( drm_mga_private_t *dev_priv );
+extern int mga_do_engine_reset( drm_mga_private_t *dev_priv );
+extern int mga_do_cleanup_dma( drm_device_t *dev );
+
+extern void mga_do_dma_flush( drm_mga_private_t *dev_priv );
+extern void mga_do_dma_wrap_start( drm_mga_private_t *dev_priv );
+extern void mga_do_dma_wrap_end( drm_mga_private_t *dev_priv );
+
+extern int mga_freelist_put( drm_device_t *dev, drm_buf_t *buf );
+
+				/* mga_state.c */
+extern int  mga_dma_clear( DRM_IOCTL_ARGS );
+extern int  mga_dma_swap( DRM_IOCTL_ARGS );
+extern int  mga_dma_vertex( DRM_IOCTL_ARGS );
+extern int  mga_dma_indices( DRM_IOCTL_ARGS );
+extern int  mga_dma_iload( DRM_IOCTL_ARGS );
+extern int  mga_dma_blit( DRM_IOCTL_ARGS );
+extern int  mga_getparam( DRM_IOCTL_ARGS );
+
+				/* mga_warp.c */
+extern int mga_warp_install_microcode( drm_mga_private_t *dev_priv );
+extern int mga_warp_init( drm_mga_private_t *dev_priv );
+
+#define mga_flush_write_combine()	DRM_WRITEMEMORYBARRIER(dev_priv->primary)
+
+#if defined(__linux__) && defined(__alpha__)
+#define MGA_BASE( reg )		((unsigned long)(dev_priv->mmio->handle))
+#define MGA_ADDR( reg )		(MGA_BASE(reg) + reg)
+
+#define MGA_DEREF( reg )	*(volatile u32 *)MGA_ADDR( reg )
+#define MGA_DEREF8( reg )	*(volatile u8 *)MGA_ADDR( reg )
+
+#define MGA_READ( reg )		(_MGA_READ((u32 *)MGA_ADDR(reg)))
+#define MGA_READ8( reg )	(_MGA_READ((u8 *)MGA_ADDR(reg)))
+#define MGA_WRITE( reg, val )	do { DRM_WRITEMEMORYBARRIER(dev_priv->mmio); MGA_DEREF( reg ) = val; } while (0)
+#define MGA_WRITE8( reg, val )  do { DRM_WRITEMEMORYBARRIER(dev_priv->mmio); MGA_DEREF8( reg ) = val; } while (0)
+
+static inline u32 _MGA_READ(u32 *addr)
+{
+	DRM_READMEMORYBARRIER(dev_priv->mmio);
+	return *(volatile u32 *)addr;
+}
+#else
+#define MGA_READ8( reg )	DRM_READ8(dev_priv->mmio, (reg))
+#define MGA_READ( reg )		DRM_READ32(dev_priv->mmio, (reg))
+#define MGA_WRITE8( reg, val )  DRM_WRITE8(dev_priv->mmio, (reg), (val))
+#define MGA_WRITE( reg, val )	DRM_WRITE32(dev_priv->mmio, (reg), (val))
+#endif
+
+#define DWGREG0 	0x1c00
+#define DWGREG0_END 	0x1dff
+#define DWGREG1		0x2c00
+#define DWGREG1_END	0x2dff
+
+#define ISREG0(r)	(r >= DWGREG0 && r <= DWGREG0_END)
+#define DMAREG0(r)	(u8)((r - DWGREG0) >> 2)
+#define DMAREG1(r)	(u8)(((r - DWGREG1) >> 2) | 0x80)
+#define DMAREG(r)	(ISREG0(r) ? DMAREG0(r) : DMAREG1(r))
+
+
+
+/* ================================================================
+ * Helper macross...
+ */
+
+#define MGA_EMIT_STATE( dev_priv, dirty )				\
+do {									\
+	if ( (dirty) & ~MGA_UPLOAD_CLIPRECTS ) {			\
+		if ( dev_priv->chipset == MGA_CARD_TYPE_G400 ) {	\
+			mga_g400_emit_state( dev_priv );		\
+		} else {						\
+			mga_g200_emit_state( dev_priv );		\
+		}							\
+	}								\
+} while (0)
+
+#define WRAP_TEST_WITH_RETURN( dev_priv )				\
+do {									\
+	if ( test_bit( 0, &dev_priv->prim.wrapped ) ) {			\
+		if ( mga_is_idle( dev_priv ) ) {			\
+			mga_do_dma_wrap_end( dev_priv );		\
+		} else if ( dev_priv->prim.space <			\
+			    dev_priv->prim.high_mark ) {		\
+			if ( MGA_DMA_DEBUG )				\
+				DRM_INFO( "%s: wrap...\n", __FUNCTION__ );	\
+			return DRM_ERR(EBUSY);			\
+		}							\
+	}								\
+} while (0)
+
+#define WRAP_WAIT_WITH_RETURN( dev_priv )				\
+do {									\
+	if ( test_bit( 0, &dev_priv->prim.wrapped ) ) {			\
+		if ( mga_do_wait_for_idle( dev_priv ) < 0 ) {		\
+			if ( MGA_DMA_DEBUG )				\
+				DRM_INFO( "%s: wrap...\n", __FUNCTION__ );	\
+			return DRM_ERR(EBUSY);			\
+		}							\
+		mga_do_dma_wrap_end( dev_priv );			\
+	}								\
+} while (0)
+
+
+/* ================================================================
+ * Primary DMA command stream
+ */
+
+#define MGA_VERBOSE	0
+
+#define DMA_LOCALS	unsigned int write; volatile u8 *prim;
+
+#define DMA_BLOCK_SIZE	(5 * sizeof(u32))
+
+#define BEGIN_DMA( n )							\
+do {									\
+	if ( MGA_VERBOSE ) {						\
+		DRM_INFO( "BEGIN_DMA( %d ) in %s\n",			\
+			  (n), __FUNCTION__ );				\
+		DRM_INFO( "   space=0x%x req=0x%x\n",			\
+			  dev_priv->prim.space, (n) * DMA_BLOCK_SIZE );	\
+	}								\
+	prim = dev_priv->prim.start;					\
+	write = dev_priv->prim.tail;					\
+} while (0)
+
+#define BEGIN_DMA_WRAP()						\
+do {									\
+	if ( MGA_VERBOSE ) {						\
+		DRM_INFO( "BEGIN_DMA() in %s\n", __FUNCTION__ );		\
+		DRM_INFO( "   space=0x%x\n", dev_priv->prim.space );	\
+	}								\
+	prim = dev_priv->prim.start;					\
+	write = dev_priv->prim.tail;					\
+} while (0)
+
+#define ADVANCE_DMA()							\
+do {									\
+	dev_priv->prim.tail = write;					\
+	if ( MGA_VERBOSE ) {						\
+		DRM_INFO( "ADVANCE_DMA() tail=0x%05x sp=0x%x\n",	\
+			  write, dev_priv->prim.space );		\
+	}								\
+} while (0)
+
+#define FLUSH_DMA()							\
+do {									\
+	if ( 0 ) {							\
+		DRM_INFO( "%s:\n", __FUNCTION__ );				\
+		DRM_INFO( "   tail=0x%06x head=0x%06lx\n",		\
+			  dev_priv->prim.tail,				\
+			  MGA_READ( MGA_PRIMADDRESS ) -			\
+			  dev_priv->primary->offset );			\
+	}								\
+	if ( !test_bit( 0, &dev_priv->prim.wrapped ) ) {		\
+		if ( dev_priv->prim.space <				\
+		     dev_priv->prim.high_mark ) {			\
+			mga_do_dma_wrap_start( dev_priv );		\
+		} else {						\
+			mga_do_dma_flush( dev_priv );			\
+		}							\
+	}								\
+} while (0)
+
+/* Never use this, always use DMA_BLOCK(...) for primary DMA output.
+ */
+#define DMA_WRITE( offset, val )					\
+do {									\
+	if ( MGA_VERBOSE ) {						\
+		DRM_INFO( "   DMA_WRITE( 0x%08x ) at 0x%04x\n",		\
+			  (u32)(val), write + (offset) * sizeof(u32) );	\
+	}								\
+	*(volatile u32 *)(prim + write + (offset) * sizeof(u32)) = val;	\
+} while (0)
+
+#define DMA_BLOCK( reg0, val0, reg1, val1, reg2, val2, reg3, val3 )	\
+do {									\
+	DMA_WRITE( 0, ((DMAREG( reg0 ) << 0) |				\
+		       (DMAREG( reg1 ) << 8) |				\
+		       (DMAREG( reg2 ) << 16) |				\
+		       (DMAREG( reg3 ) << 24)) );			\
+	DMA_WRITE( 1, val0 );						\
+	DMA_WRITE( 2, val1 );						\
+	DMA_WRITE( 3, val2 );						\
+	DMA_WRITE( 4, val3 );						\
+	write += DMA_BLOCK_SIZE;					\
+} while (0)
+
+
+/* Buffer aging via primary DMA stream head pointer.
+ */
+
+#define SET_AGE( age, h, w )						\
+do {									\
+	(age)->head = h;						\
+	(age)->wrap = w;						\
+} while (0)
+
+#define TEST_AGE( age, h, w )		( (age)->wrap < w ||		\
+					  ( (age)->wrap == w &&		\
+					    (age)->head < h ) )
+
+#define AGE_BUFFER( buf_priv )						\
+do {									\
+	drm_mga_freelist_t *entry = (buf_priv)->list_entry;		\
+	if ( (buf_priv)->dispatched ) {					\
+		entry->age.head = (dev_priv->prim.tail +		\
+				   dev_priv->primary->offset);		\
+		entry->age.wrap = dev_priv->sarea_priv->last_wrap;	\
+	} else {							\
+		entry->age.head = 0;					\
+		entry->age.wrap = 0;					\
+	}								\
+} while (0)
+
+
+#define MGA_ENGINE_IDLE_MASK		(MGA_SOFTRAPEN |		\
+					 MGA_DWGENGSTS |		\
+					 MGA_ENDPRDMASTS)
+#define MGA_DMA_IDLE_MASK		(MGA_SOFTRAPEN |		\
+					 MGA_ENDPRDMASTS)
+
+#define MGA_DMA_DEBUG			0
+
+
+
+/* A reduced set of the mga registers.
+ */
+#define MGA_CRTC_INDEX			0x1fd4
+#define MGA_CRTC_DATA			0x1fd5
+
+/* CRTC11 */
+#define MGA_VINTCLR			(1 << 4)
+#define MGA_VINTEN			(1 << 5)
+
+#define MGA_ALPHACTRL 			0x2c7c
+#define MGA_AR0 			0x1c60
+#define MGA_AR1 			0x1c64
+#define MGA_AR2 			0x1c68
+#define MGA_AR3 			0x1c6c
+#define MGA_AR4 			0x1c70
+#define MGA_AR5 			0x1c74
+#define MGA_AR6 			0x1c78
+
+#define MGA_CXBNDRY			0x1c80
+#define MGA_CXLEFT 			0x1ca0
+#define MGA_CXRIGHT			0x1ca4
+
+#define MGA_DMAPAD 			0x1c54
+#define MGA_DSTORG 			0x2cb8
+#define MGA_DWGCTL 			0x1c00
+#	define MGA_OPCOD_MASK			(15 << 0)
+#	define MGA_OPCOD_TRAP			(4 << 0)
+#	define MGA_OPCOD_TEXTURE_TRAP		(6 << 0)
+#	define MGA_OPCOD_BITBLT			(8 << 0)
+#	define MGA_OPCOD_ILOAD			(9 << 0)
+#	define MGA_ATYPE_MASK			(7 << 4)
+#	define MGA_ATYPE_RPL			(0 << 4)
+#	define MGA_ATYPE_RSTR			(1 << 4)
+#	define MGA_ATYPE_ZI			(3 << 4)
+#	define MGA_ATYPE_BLK			(4 << 4)
+#	define MGA_ATYPE_I			(7 << 4)
+#	define MGA_LINEAR			(1 << 7)
+#	define MGA_ZMODE_MASK			(7 << 8)
+#	define MGA_ZMODE_NOZCMP			(0 << 8)
+#	define MGA_ZMODE_ZE			(2 << 8)
+#	define MGA_ZMODE_ZNE			(3 << 8)
+#	define MGA_ZMODE_ZLT			(4 << 8)
+#	define MGA_ZMODE_ZLTE			(5 << 8)
+#	define MGA_ZMODE_ZGT			(6 << 8)
+#	define MGA_ZMODE_ZGTE			(7 << 8)
+#	define MGA_SOLID			(1 << 11)
+#	define MGA_ARZERO			(1 << 12)
+#	define MGA_SGNZERO			(1 << 13)
+#	define MGA_SHIFTZERO			(1 << 14)
+#	define MGA_BOP_MASK			(15 << 16)
+#	define MGA_BOP_ZERO			(0 << 16)
+#	define MGA_BOP_DST			(10 << 16)
+#	define MGA_BOP_SRC			(12 << 16)
+#	define MGA_BOP_ONE			(15 << 16)
+#	define MGA_TRANS_SHIFT			20
+#	define MGA_TRANS_MASK			(15 << 20)
+#	define MGA_BLTMOD_MASK			(15 << 25)
+#	define MGA_BLTMOD_BMONOLEF		(0 << 25)
+#	define MGA_BLTMOD_BMONOWF		(4 << 25)
+#	define MGA_BLTMOD_PLAN			(1 << 25)
+#	define MGA_BLTMOD_BFCOL			(2 << 25)
+#	define MGA_BLTMOD_BU32BGR		(3 << 25)
+#	define MGA_BLTMOD_BU32RGB		(7 << 25)
+#	define MGA_BLTMOD_BU24BGR		(11 << 25)
+#	define MGA_BLTMOD_BU24RGB		(15 << 25)
+#	define MGA_PATTERN			(1 << 29)
+#	define MGA_TRANSC			(1 << 30)
+#	define MGA_CLIPDIS			(1 << 31)
+#define MGA_DWGSYNC			0x2c4c
+
+#define MGA_FCOL 			0x1c24
+#define MGA_FIFOSTATUS 			0x1e10
+#define MGA_FOGCOL 			0x1cf4
+#define MGA_FXBNDRY			0x1c84
+#define MGA_FXLEFT 			0x1ca8
+#define MGA_FXRIGHT			0x1cac
+
+#define MGA_ICLEAR 			0x1e18
+#	define MGA_SOFTRAPICLR			(1 << 0)
+#	define MGA_VLINEICLR			(1 << 5)
+#define MGA_IEN 			0x1e1c
+#	define MGA_SOFTRAPIEN			(1 << 0)
+#	define MGA_VLINEIEN			(1 << 5)
+
+#define MGA_LEN 			0x1c5c
+
+#define MGA_MACCESS			0x1c04
+
+#define MGA_PITCH 			0x1c8c
+#define MGA_PLNWT 			0x1c1c
+#define MGA_PRIMADDRESS 		0x1e58
+#	define MGA_DMA_GENERAL			(0 << 0)
+#	define MGA_DMA_BLIT			(1 << 0)
+#	define MGA_DMA_VECTOR			(2 << 0)
+#	define MGA_DMA_VERTEX			(3 << 0)
+#define MGA_PRIMEND			0x1e5c
+#	define MGA_PRIMNOSTART			(1 << 0)
+#	define MGA_PAGPXFER			(1 << 1)
+#define MGA_PRIMPTR			0x1e50
+#	define MGA_PRIMPTREN0			(1 << 0)
+#	define MGA_PRIMPTREN1			(1 << 1)
+
+#define MGA_RST 			0x1e40
+#	define MGA_SOFTRESET			(1 << 0)
+#	define MGA_SOFTEXTRST			(1 << 1)
+
+#define MGA_SECADDRESS 			0x2c40
+#define MGA_SECEND 			0x2c44
+#define MGA_SETUPADDRESS 		0x2cd0
+#define MGA_SETUPEND 			0x2cd4
+#define MGA_SGN				0x1c58
+#define MGA_SOFTRAP			0x2c48
+#define MGA_SRCORG 			0x2cb4
+#	define MGA_SRMMAP_MASK			(1 << 0)
+#	define MGA_SRCMAP_FB			(0 << 0)
+#	define MGA_SRCMAP_SYSMEM		(1 << 0)
+#	define MGA_SRCACC_MASK			(1 << 1)
+#	define MGA_SRCACC_PCI			(0 << 1)
+#	define MGA_SRCACC_AGP			(1 << 1)
+#define MGA_STATUS 			0x1e14
+#	define MGA_SOFTRAPEN			(1 << 0)
+#	define MGA_VSYNCPEN			(1 << 4)
+#	define MGA_VLINEPEN			(1 << 5)
+#	define MGA_DWGENGSTS			(1 << 16)
+#	define MGA_ENDPRDMASTS			(1 << 17)
+#define MGA_STENCIL			0x2cc8
+#define MGA_STENCILCTL 			0x2ccc
+
+#define MGA_TDUALSTAGE0 		0x2cf8
+#define MGA_TDUALSTAGE1 		0x2cfc
+#define MGA_TEXBORDERCOL 		0x2c5c
+#define MGA_TEXCTL 			0x2c30
+#define MGA_TEXCTL2			0x2c3c
+#	define MGA_DUALTEX			(1 << 7)
+#	define MGA_G400_TC2_MAGIC		(1 << 15)
+#	define MGA_MAP1_ENABLE			(1 << 31)
+#define MGA_TEXFILTER 			0x2c58
+#define MGA_TEXHEIGHT 			0x2c2c
+#define MGA_TEXORG 			0x2c24
+#	define MGA_TEXORGMAP_MASK		(1 << 0)
+#	define MGA_TEXORGMAP_FB			(0 << 0)
+#	define MGA_TEXORGMAP_SYSMEM		(1 << 0)
+#	define MGA_TEXORGACC_MASK		(1 << 1)
+#	define MGA_TEXORGACC_PCI		(0 << 1)
+#	define MGA_TEXORGACC_AGP		(1 << 1)
+#define MGA_TEXORG1			0x2ca4
+#define MGA_TEXORG2			0x2ca8
+#define MGA_TEXORG3			0x2cac
+#define MGA_TEXORG4			0x2cb0
+#define MGA_TEXTRANS 			0x2c34
+#define MGA_TEXTRANSHIGH 		0x2c38
+#define MGA_TEXWIDTH 			0x2c28
+
+#define MGA_WACCEPTSEQ 			0x1dd4
+#define MGA_WCODEADDR 			0x1e6c
+#define MGA_WFLAG 			0x1dc4
+#define MGA_WFLAG1 			0x1de0
+#define MGA_WFLAGNB			0x1e64
+#define MGA_WFLAGNB1 			0x1e08
+#define MGA_WGETMSB			0x1dc8
+#define MGA_WIADDR 			0x1dc0
+#define MGA_WIADDR2			0x1dd8
+#	define MGA_WMODE_SUSPEND		(0 << 0)
+#	define MGA_WMODE_RESUME			(1 << 0)
+#	define MGA_WMODE_JUMP			(2 << 0)
+#	define MGA_WMODE_START			(3 << 0)
+#	define MGA_WAGP_ENABLE			(1 << 2)
+#define MGA_WMISC 			0x1e70
+#	define MGA_WUCODECACHE_ENABLE		(1 << 0)
+#	define MGA_WMASTER_ENABLE		(1 << 1)
+#	define MGA_WCACHEFLUSH_ENABLE		(1 << 3)
+#define MGA_WVRTXSZ			0x1dcc
+
+#define MGA_YBOT 			0x1c9c
+#define MGA_YDST 			0x1c90
+#define MGA_YDSTLEN			0x1c88
+#define MGA_YDSTORG			0x1c94
+#define MGA_YTOP 			0x1c98
+
+#define MGA_ZORG 			0x1c0c
+
+/* This finishes the current batch of commands
+ */
+#define MGA_EXEC 			0x0100
+
+/* Warp registers
+ */
+#define MGA_WR0				0x2d00
+#define MGA_WR1				0x2d04
+#define MGA_WR2				0x2d08
+#define MGA_WR3				0x2d0c
+#define MGA_WR4				0x2d10
+#define MGA_WR5				0x2d14
+#define MGA_WR6				0x2d18
+#define MGA_WR7				0x2d1c
+#define MGA_WR8				0x2d20
+#define MGA_WR9				0x2d24
+#define MGA_WR10			0x2d28
+#define MGA_WR11			0x2d2c
+#define MGA_WR12			0x2d30
+#define MGA_WR13			0x2d34
+#define MGA_WR14			0x2d38
+#define MGA_WR15			0x2d3c
+#define MGA_WR16			0x2d40
+#define MGA_WR17			0x2d44
+#define MGA_WR18			0x2d48
+#define MGA_WR19			0x2d4c
+#define MGA_WR20			0x2d50
+#define MGA_WR21			0x2d54
+#define MGA_WR22			0x2d58
+#define MGA_WR23			0x2d5c
+#define MGA_WR24			0x2d60
+#define MGA_WR25			0x2d64
+#define MGA_WR26			0x2d68
+#define MGA_WR27			0x2d6c
+#define MGA_WR28			0x2d70
+#define MGA_WR29			0x2d74
+#define MGA_WR30			0x2d78
+#define MGA_WR31			0x2d7c
+#define MGA_WR32			0x2d80
+#define MGA_WR33			0x2d84
+#define MGA_WR34			0x2d88
+#define MGA_WR35			0x2d8c
+#define MGA_WR36			0x2d90
+#define MGA_WR37			0x2d94
+#define MGA_WR38			0x2d98
+#define MGA_WR39			0x2d9c
+#define MGA_WR40			0x2da0
+#define MGA_WR41			0x2da4
+#define MGA_WR42			0x2da8
+#define MGA_WR43			0x2dac
+#define MGA_WR44			0x2db0
+#define MGA_WR45			0x2db4
+#define MGA_WR46			0x2db8
+#define MGA_WR47			0x2dbc
+#define MGA_WR48			0x2dc0
+#define MGA_WR49			0x2dc4
+#define MGA_WR50			0x2dc8
+#define MGA_WR51			0x2dcc
+#define MGA_WR52			0x2dd0
+#define MGA_WR53			0x2dd4
+#define MGA_WR54			0x2dd8
+#define MGA_WR55			0x2ddc
+#define MGA_WR56			0x2de0
+#define MGA_WR57			0x2de4
+#define MGA_WR58			0x2de8
+#define MGA_WR59			0x2dec
+#define MGA_WR60			0x2df0
+#define MGA_WR61			0x2df4
+#define MGA_WR62			0x2df8
+#define MGA_WR63			0x2dfc
+#	define MGA_G400_WR_MAGIC		(1 << 6)
+#	define MGA_G400_WR56_MAGIC		0x46480000	/* 12800.0f */
+
+
+#define MGA_ILOAD_ALIGN		64
+#define MGA_ILOAD_MASK		(MGA_ILOAD_ALIGN - 1)
+
+#define MGA_DWGCTL_FLUSH	(MGA_OPCOD_TEXTURE_TRAP |		\
+				 MGA_ATYPE_I |				\
+				 MGA_ZMODE_NOZCMP |			\
+				 MGA_ARZERO |				\
+				 MGA_SGNZERO |				\
+				 MGA_BOP_SRC |				\
+				 (15 << MGA_TRANS_SHIFT))
+
+#define MGA_DWGCTL_CLEAR	(MGA_OPCOD_TRAP |			\
+				 MGA_ZMODE_NOZCMP |			\
+				 MGA_SOLID |				\
+				 MGA_ARZERO |				\
+				 MGA_SGNZERO |				\
+				 MGA_SHIFTZERO |			\
+				 MGA_BOP_SRC |				\
+				 (0 << MGA_TRANS_SHIFT) |		\
+				 MGA_BLTMOD_BMONOLEF |			\
+				 MGA_TRANSC |				\
+				 MGA_CLIPDIS)
+
+#define MGA_DWGCTL_COPY		(MGA_OPCOD_BITBLT |			\
+				 MGA_ATYPE_RPL |			\
+				 MGA_SGNZERO |				\
+				 MGA_SHIFTZERO |			\
+				 MGA_BOP_SRC |				\
+				 (0 << MGA_TRANS_SHIFT) |		\
+				 MGA_BLTMOD_BFCOL |			\
+				 MGA_CLIPDIS)
+
+/* Simple idle test.
+ */
+static __inline__ int mga_is_idle( drm_mga_private_t *dev_priv )
+{
+	u32 status = MGA_READ( MGA_STATUS ) & MGA_ENGINE_IDLE_MASK;
+	return ( status == MGA_ENDPRDMASTS );
+}
+
+#endif
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/mga_state.c b/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/mga_state.c
new file mode 100644
index 000000000..256dd47d6
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/mga_state.c
@@ -0,0 +1,1110 @@
+/* mga_state.c -- State support for MGA G200/G400 -*- linux-c -*-
+ * Created: Thu Jan 27 02:53:43 2000 by jhartmann@precisioninsight.com
+ *
+ * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
+ * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ *    Jeff Hartmann <jhartmann@valinux.com>
+ *    Keith Whitwell <keith@tungstengraphics.com>
+ *
+ * Rewritten by:
+ *    Gareth Hughes <gareth@valinux.com>
+ */
+
+#include "mga.h"
+#include "drmP.h"
+#include "drm.h"
+#include "mga_drm.h"
+#include "mga_drv.h"
+
+
+/* ================================================================
+ * DMA hardware state programming functions
+ */
+
+static void mga_emit_clip_rect( drm_mga_private_t *dev_priv,
+				drm_clip_rect_t *box )
+{
+	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
+	drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
+	unsigned int pitch = dev_priv->front_pitch;
+	DMA_LOCALS;
+
+	BEGIN_DMA( 2 );
+
+	/* Force reset of DWGCTL on G400 (eliminates clip disable bit).
+	 */
+	if ( dev_priv->chipset == MGA_CARD_TYPE_G400 ) {
+		DMA_BLOCK( MGA_DWGCTL,		ctx->dwgctl,
+			   MGA_LEN + MGA_EXEC,	0x80000000,
+			   MGA_DWGCTL,		ctx->dwgctl,
+			   MGA_LEN + MGA_EXEC,	0x80000000 );
+	}
+	DMA_BLOCK( MGA_DMAPAD,	0x00000000,
+		   MGA_CXBNDRY,	(box->x2 << 16) | box->x1,
+		   MGA_YTOP,	box->y1 * pitch,
+		   MGA_YBOT,	box->y2 * pitch );
+
+	ADVANCE_DMA();
+}
+
+static __inline__ void mga_g200_emit_context( drm_mga_private_t *dev_priv )
+{
+	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
+	drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
+	DMA_LOCALS;
+
+	BEGIN_DMA( 3 );
+
+	DMA_BLOCK( MGA_DSTORG,		ctx->dstorg,
+		   MGA_MACCESS,		ctx->maccess,
+		   MGA_PLNWT,		ctx->plnwt,
+		   MGA_DWGCTL,		ctx->dwgctl );
+
+	DMA_BLOCK( MGA_ALPHACTRL,	ctx->alphactrl,
+		   MGA_FOGCOL,		ctx->fogcolor,
+		   MGA_WFLAG,		ctx->wflag,
+		   MGA_ZORG,		dev_priv->depth_offset );
+
+	DMA_BLOCK( MGA_FCOL,		ctx->fcol,
+		   MGA_DMAPAD,		0x00000000,
+		   MGA_DMAPAD,		0x00000000,
+		   MGA_DMAPAD,		0x00000000 );
+
+	ADVANCE_DMA();
+}
+
+static __inline__ void mga_g400_emit_context( drm_mga_private_t *dev_priv )
+{
+	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
+	drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
+	DMA_LOCALS;
+
+	BEGIN_DMA( 4 );
+
+	DMA_BLOCK( MGA_DSTORG,		ctx->dstorg,
+		   MGA_MACCESS,		ctx->maccess,
+		   MGA_PLNWT,		ctx->plnwt,
+		   MGA_DWGCTL,		ctx->dwgctl );
+
+	DMA_BLOCK( MGA_ALPHACTRL,	ctx->alphactrl,
+		   MGA_FOGCOL,		ctx->fogcolor,
+		   MGA_WFLAG,		ctx->wflag,
+		   MGA_ZORG,		dev_priv->depth_offset );
+
+	DMA_BLOCK( MGA_WFLAG1,		ctx->wflag,
+		   MGA_TDUALSTAGE0,	ctx->tdualstage0,
+		   MGA_TDUALSTAGE1,	ctx->tdualstage1,
+		   MGA_FCOL,		ctx->fcol );
+
+	DMA_BLOCK( MGA_STENCIL,		ctx->stencil,
+		   MGA_STENCILCTL,	ctx->stencilctl,
+		   MGA_DMAPAD,		0x00000000,
+		   MGA_DMAPAD,		0x00000000 );
+
+	ADVANCE_DMA();
+}
+
+static __inline__ void mga_g200_emit_tex0( drm_mga_private_t *dev_priv )
+{
+	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
+	drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[0];
+	DMA_LOCALS;
+
+	BEGIN_DMA( 4 );
+
+	DMA_BLOCK( MGA_TEXCTL2,		tex->texctl2,
+		   MGA_TEXCTL,		tex->texctl,
+		   MGA_TEXFILTER,	tex->texfilter,
+		   MGA_TEXBORDERCOL,	tex->texbordercol );
+
+	DMA_BLOCK( MGA_TEXORG,		tex->texorg,
+		   MGA_TEXORG1,		tex->texorg1,
+		   MGA_TEXORG2,		tex->texorg2,
+		   MGA_TEXORG3,		tex->texorg3 );
+
+	DMA_BLOCK( MGA_TEXORG4,		tex->texorg4,
+		   MGA_TEXWIDTH,	tex->texwidth,
+		   MGA_TEXHEIGHT,	tex->texheight,
+		   MGA_WR24,		tex->texwidth );
+
+	DMA_BLOCK( MGA_WR34,		tex->texheight,
+		   MGA_TEXTRANS,	0x0000ffff,
+		   MGA_TEXTRANSHIGH,	0x0000ffff,
+		   MGA_DMAPAD,		0x00000000 );
+
+	ADVANCE_DMA();
+}
+
+static __inline__ void mga_g400_emit_tex0( drm_mga_private_t *dev_priv )
+{
+	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
+	drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[0];
+	DMA_LOCALS;
+
+/*  	printk("mga_g400_emit_tex0 %x %x %x\n", tex->texorg, */
+/*  	       tex->texctl, tex->texctl2); */
+
+	BEGIN_DMA( 6 );
+
+	DMA_BLOCK( MGA_TEXCTL2,		tex->texctl2 | MGA_G400_TC2_MAGIC,
+		   MGA_TEXCTL,		tex->texctl,
+		   MGA_TEXFILTER,	tex->texfilter,
+		   MGA_TEXBORDERCOL,	tex->texbordercol );
+
+	DMA_BLOCK( MGA_TEXORG,		tex->texorg,
+		   MGA_TEXORG1,		tex->texorg1,
+		   MGA_TEXORG2,		tex->texorg2,
+		   MGA_TEXORG3,		tex->texorg3 );
+
+	DMA_BLOCK( MGA_TEXORG4,		tex->texorg4,
+		   MGA_TEXWIDTH,	tex->texwidth,
+		   MGA_TEXHEIGHT,	tex->texheight,
+		   MGA_WR49,		0x00000000 );
+
+	DMA_BLOCK( MGA_WR57,		0x00000000,
+		   MGA_WR53,		0x00000000,
+		   MGA_WR61,		0x00000000,
+		   MGA_WR52,		MGA_G400_WR_MAGIC );
+
+	DMA_BLOCK( MGA_WR60,		MGA_G400_WR_MAGIC,
+		   MGA_WR54,		tex->texwidth | MGA_G400_WR_MAGIC,
+		   MGA_WR62,		tex->texheight | MGA_G400_WR_MAGIC,
+		   MGA_DMAPAD,		0x00000000 );
+
+	DMA_BLOCK( MGA_DMAPAD,		0x00000000,
+		   MGA_DMAPAD,		0x00000000,
+		   MGA_TEXTRANS,	0x0000ffff,
+		   MGA_TEXTRANSHIGH,	0x0000ffff );
+
+	ADVANCE_DMA();
+}
+
+static __inline__ void mga_g400_emit_tex1( drm_mga_private_t *dev_priv )
+{
+	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
+	drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[1];
+	DMA_LOCALS;
+
+/*  	printk("mga_g400_emit_tex1 %x %x %x\n", tex->texorg,  */
+/*  	       tex->texctl, tex->texctl2); */
+
+	BEGIN_DMA( 5 );
+
+	DMA_BLOCK( MGA_TEXCTL2,		(tex->texctl2 |
+					 MGA_MAP1_ENABLE |
+					 MGA_G400_TC2_MAGIC),
+		   MGA_TEXCTL,		tex->texctl,
+		   MGA_TEXFILTER,	tex->texfilter,
+		   MGA_TEXBORDERCOL,	tex->texbordercol );
+
+	DMA_BLOCK( MGA_TEXORG,		tex->texorg,
+		   MGA_TEXORG1,		tex->texorg1,
+		   MGA_TEXORG2,		tex->texorg2,
+		   MGA_TEXORG3,		tex->texorg3 );
+
+	DMA_BLOCK( MGA_TEXORG4,		tex->texorg4,
+		   MGA_TEXWIDTH,	tex->texwidth,
+		   MGA_TEXHEIGHT,	tex->texheight,
+		   MGA_WR49,		0x00000000 );
+
+	DMA_BLOCK( MGA_WR57,		0x00000000,
+		   MGA_WR53,		0x00000000,
+		   MGA_WR61,		0x00000000,
+		   MGA_WR52,		tex->texwidth | MGA_G400_WR_MAGIC );
+
+	DMA_BLOCK( MGA_WR60,		tex->texheight | MGA_G400_WR_MAGIC,
+		   MGA_TEXTRANS,	0x0000ffff,
+		   MGA_TEXTRANSHIGH,	0x0000ffff,
+		   MGA_TEXCTL2,		tex->texctl2 | MGA_G400_TC2_MAGIC );
+
+	ADVANCE_DMA();
+}
+
+static __inline__ void mga_g200_emit_pipe( drm_mga_private_t *dev_priv )
+{
+	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
+	unsigned int pipe = sarea_priv->warp_pipe;
+	DMA_LOCALS;
+
+	BEGIN_DMA( 3 );
+
+	DMA_BLOCK( MGA_WIADDR,	MGA_WMODE_SUSPEND,
+		   MGA_WVRTXSZ,	0x00000007,
+		   MGA_WFLAG,	0x00000000,
+		   MGA_WR24,	0x00000000 );
+
+	DMA_BLOCK( MGA_WR25,	0x00000100,
+		   MGA_WR34,	0x00000000,
+		   MGA_WR42,	0x0000ffff,
+		   MGA_WR60,	0x0000ffff );
+
+	/* Padding required to to hardware bug.
+	 */
+	DMA_BLOCK( MGA_DMAPAD,	0xffffffff,
+		   MGA_DMAPAD,	0xffffffff,
+		   MGA_DMAPAD,	0xffffffff,
+		   MGA_WIADDR,	(dev_priv->warp_pipe_phys[pipe] |
+				 MGA_WMODE_START |
+				 MGA_WAGP_ENABLE) );
+
+	ADVANCE_DMA();
+}
+
+static __inline__ void mga_g400_emit_pipe( drm_mga_private_t *dev_priv )
+{
+	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
+	unsigned int pipe = sarea_priv->warp_pipe;
+	DMA_LOCALS;
+
+/*  	printk("mga_g400_emit_pipe %x\n", pipe); */
+
+	BEGIN_DMA( 10 );
+
+	DMA_BLOCK( MGA_WIADDR2,	MGA_WMODE_SUSPEND,
+		   MGA_DMAPAD,	0x00000000,
+		   MGA_DMAPAD,	0x00000000,
+		   MGA_DMAPAD,	0x00000000 );
+
+	if ( pipe & MGA_T2 ) {
+		DMA_BLOCK( MGA_WVRTXSZ,		0x00001e09,
+			   MGA_DMAPAD,		0x00000000,
+			   MGA_DMAPAD,		0x00000000,
+			   MGA_DMAPAD,		0x00000000 );
+
+		DMA_BLOCK( MGA_WACCEPTSEQ,	0x00000000,
+			   MGA_WACCEPTSEQ,	0x00000000,
+			   MGA_WACCEPTSEQ,	0x00000000,
+			   MGA_WACCEPTSEQ,	0x1e000000 );
+	} else {
+		if ( dev_priv->warp_pipe & MGA_T2 ) {
+			/* Flush the WARP pipe */
+			DMA_BLOCK( MGA_YDST,		0x00000000,
+				   MGA_FXLEFT,		0x00000000,
+				   MGA_FXRIGHT,		0x00000001,
+				   MGA_DWGCTL,		MGA_DWGCTL_FLUSH );
+
+			DMA_BLOCK( MGA_LEN + MGA_EXEC,	0x00000001,
+				   MGA_DWGSYNC,		0x00007000,
+				   MGA_TEXCTL2,		MGA_G400_TC2_MAGIC,
+				   MGA_LEN + MGA_EXEC,	0x00000000 );
+
+			DMA_BLOCK( MGA_TEXCTL2,		(MGA_DUALTEX |
+							 MGA_G400_TC2_MAGIC),
+				   MGA_LEN + MGA_EXEC,	0x00000000,
+				   MGA_TEXCTL2,		MGA_G400_TC2_MAGIC,
+				   MGA_DMAPAD,		0x00000000 );
+		}
+
+		DMA_BLOCK( MGA_WVRTXSZ,		0x00001807,
+			   MGA_DMAPAD,		0x00000000,
+			   MGA_DMAPAD,		0x00000000,
+			   MGA_DMAPAD,		0x00000000 );
+
+		DMA_BLOCK( MGA_WACCEPTSEQ,	0x00000000,
+			   MGA_WACCEPTSEQ,	0x00000000,
+			   MGA_WACCEPTSEQ,	0x00000000,
+			   MGA_WACCEPTSEQ,	0x18000000 );
+	}
+
+	DMA_BLOCK( MGA_WFLAG,	0x00000000,
+		   MGA_WFLAG1,	0x00000000,
+		   MGA_WR56,	MGA_G400_WR56_MAGIC,
+		   MGA_DMAPAD,	0x00000000 );
+
+	DMA_BLOCK( MGA_WR49,	0x00000000,		/* tex0              */
+		   MGA_WR57,	0x00000000,		/* tex0              */
+		   MGA_WR53,	0x00000000,		/* tex1              */
+		   MGA_WR61,	0x00000000 );		/* tex1              */
+
+	DMA_BLOCK( MGA_WR54,	MGA_G400_WR_MAGIC,	/* tex0 width        */
+		   MGA_WR62,	MGA_G400_WR_MAGIC,	/* tex0 height       */
+		   MGA_WR52,	MGA_G400_WR_MAGIC,	/* tex1 width        */
+		   MGA_WR60,	MGA_G400_WR_MAGIC );	/* tex1 height       */
+
+	/* Padding required to to hardware bug */
+	DMA_BLOCK( MGA_DMAPAD,	0xffffffff,
+		   MGA_DMAPAD,	0xffffffff,
+		   MGA_DMAPAD,	0xffffffff,
+		   MGA_WIADDR2,	(dev_priv->warp_pipe_phys[pipe] |
+				 MGA_WMODE_START |
+				 MGA_WAGP_ENABLE) );
+
+	ADVANCE_DMA();
+}
+
+static void mga_g200_emit_state( drm_mga_private_t *dev_priv )
+{
+	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
+	unsigned int dirty = sarea_priv->dirty;
+
+	if ( sarea_priv->warp_pipe != dev_priv->warp_pipe ) {
+		mga_g200_emit_pipe( dev_priv );
+		dev_priv->warp_pipe = sarea_priv->warp_pipe;
+	}
+
+	if ( dirty & MGA_UPLOAD_CONTEXT ) {
+		mga_g200_emit_context( dev_priv );
+		sarea_priv->dirty &= ~MGA_UPLOAD_CONTEXT;
+	}
+
+	if ( dirty & MGA_UPLOAD_TEX0 ) {
+		mga_g200_emit_tex0( dev_priv );
+		sarea_priv->dirty &= ~MGA_UPLOAD_TEX0;
+	}
+}
+
+static void mga_g400_emit_state( drm_mga_private_t *dev_priv )
+{
+	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
+	unsigned int dirty = sarea_priv->dirty;
+	int multitex = sarea_priv->warp_pipe & MGA_T2;
+
+	if ( sarea_priv->warp_pipe != dev_priv->warp_pipe ) {
+		mga_g400_emit_pipe( dev_priv );
+		dev_priv->warp_pipe = sarea_priv->warp_pipe;
+	}
+
+	if ( dirty & MGA_UPLOAD_CONTEXT ) {
+		mga_g400_emit_context( dev_priv );
+		sarea_priv->dirty &= ~MGA_UPLOAD_CONTEXT;
+	}
+
+	if ( dirty & MGA_UPLOAD_TEX0 ) {
+		mga_g400_emit_tex0( dev_priv );
+		sarea_priv->dirty &= ~MGA_UPLOAD_TEX0;
+	}
+
+	if ( (dirty & MGA_UPLOAD_TEX1) && multitex ) {
+		mga_g400_emit_tex1( dev_priv );
+		sarea_priv->dirty &= ~MGA_UPLOAD_TEX1;
+	}
+}
+
+
+/* ================================================================
+ * SAREA state verification
+ */
+
+/* Disallow all write destinations except the front and backbuffer.
+ */
+static int mga_verify_context( drm_mga_private_t *dev_priv )
+{
+	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
+	drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
+
+	if ( ctx->dstorg != dev_priv->front_offset &&
+	     ctx->dstorg != dev_priv->back_offset ) {
+		DRM_ERROR( "*** bad DSTORG: %x (front %x, back %x)\n\n",
+			   ctx->dstorg, dev_priv->front_offset,
+			   dev_priv->back_offset );
+		ctx->dstorg = 0;
+		return DRM_ERR(EINVAL);
+	}
+
+	return 0;
+}
+
+/* Disallow texture reads from PCI space.
+ */
+static int mga_verify_tex( drm_mga_private_t *dev_priv, int unit )
+{
+	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
+	drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[unit];
+	unsigned int org;
+
+	org = tex->texorg & (MGA_TEXORGMAP_MASK | MGA_TEXORGACC_MASK);
+
+	if ( org == (MGA_TEXORGMAP_SYSMEM | MGA_TEXORGACC_PCI) ) {
+		DRM_ERROR( "*** bad TEXORG: 0x%x, unit %d\n",
+			   tex->texorg, unit );
+		tex->texorg = 0;
+		return DRM_ERR(EINVAL);
+	}
+
+	return 0;
+}
+
+static int mga_verify_state( drm_mga_private_t *dev_priv )
+{
+	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
+	unsigned int dirty = sarea_priv->dirty;
+	int ret = 0;
+
+	if ( sarea_priv->nbox > MGA_NR_SAREA_CLIPRECTS )
+		sarea_priv->nbox = MGA_NR_SAREA_CLIPRECTS;
+
+	if ( dirty & MGA_UPLOAD_CONTEXT )
+		ret |= mga_verify_context( dev_priv );
+
+	if ( dirty & MGA_UPLOAD_TEX0 )
+		ret |= mga_verify_tex( dev_priv, 0 );
+
+	if ( dev_priv->chipset == MGA_CARD_TYPE_G400 ) {
+		if ( dirty & MGA_UPLOAD_TEX1 )
+			ret |= mga_verify_tex( dev_priv, 1 );
+
+		if ( dirty & MGA_UPLOAD_PIPE )
+			ret |= ( sarea_priv->warp_pipe > MGA_MAX_G400_PIPES );
+	} else {
+		if ( dirty & MGA_UPLOAD_PIPE )
+			ret |= ( sarea_priv->warp_pipe > MGA_MAX_G200_PIPES );
+	}
+
+	return ( ret == 0 );
+}
+
+static int mga_verify_iload( drm_mga_private_t *dev_priv,
+			     unsigned int dstorg, unsigned int length )
+{
+	if ( dstorg < dev_priv->texture_offset ||
+	     dstorg + length > (dev_priv->texture_offset +
+				dev_priv->texture_size) ) {
+		DRM_ERROR( "*** bad iload DSTORG: 0x%x\n", dstorg );
+		return DRM_ERR(EINVAL);
+	}
+
+	if ( length & MGA_ILOAD_MASK ) {
+		DRM_ERROR( "*** bad iload length: 0x%x\n",
+			   length & MGA_ILOAD_MASK );
+		return DRM_ERR(EINVAL);
+	}
+
+	return 0;
+}
+
+static int mga_verify_blit( drm_mga_private_t *dev_priv,
+			    unsigned int srcorg, unsigned int dstorg )
+{
+	if ( (srcorg & 0x3) == (MGA_SRCACC_PCI | MGA_SRCMAP_SYSMEM) ||
+	     (dstorg & 0x3) == (MGA_SRCACC_PCI | MGA_SRCMAP_SYSMEM) ) {
+		DRM_ERROR( "*** bad blit: src=0x%x dst=0x%x\n",
+			   srcorg, dstorg );
+		return DRM_ERR(EINVAL);
+	}
+	return 0;
+}
+
+
+/* ================================================================
+ *
+ */
+
+static void mga_dma_dispatch_clear( drm_device_t *dev,
+				    drm_mga_clear_t *clear )
+{
+	drm_mga_private_t *dev_priv = dev->dev_private;
+	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
+	drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
+	drm_clip_rect_t *pbox = sarea_priv->boxes;
+	int nbox = sarea_priv->nbox;
+	int i;
+	DMA_LOCALS;
+	DRM_DEBUG( "\n" );
+
+	BEGIN_DMA( 1 );
+
+	DMA_BLOCK( MGA_DMAPAD,	0x00000000,
+		   MGA_DMAPAD,	0x00000000,
+		   MGA_DWGSYNC,	0x00007100,
+		   MGA_DWGSYNC,	0x00007000 );
+
+	ADVANCE_DMA();
+
+	for ( i = 0 ; i < nbox ; i++ ) {
+		drm_clip_rect_t *box = &pbox[i];
+		u32 height = box->y2 - box->y1;
+
+		DRM_DEBUG( "   from=%d,%d to=%d,%d\n",
+			   box->x1, box->y1, box->x2, box->y2 );
+
+		if ( clear->flags & MGA_FRONT ) {
+			BEGIN_DMA( 2 );
+
+			DMA_BLOCK( MGA_DMAPAD,	0x00000000,
+				   MGA_PLNWT,	clear->color_mask,
+				   MGA_YDSTLEN, (box->y1 << 16) | height,
+				   MGA_FXBNDRY, (box->x2 << 16) | box->x1 );
+
+			DMA_BLOCK( MGA_DMAPAD,	0x00000000,
+				   MGA_FCOL,	clear->clear_color,
+				   MGA_DSTORG,	dev_priv->front_offset,
+				   MGA_DWGCTL + MGA_EXEC,
+						dev_priv->clear_cmd );
+
+			ADVANCE_DMA();
+		}
+
+
+		if ( clear->flags & MGA_BACK ) {
+			BEGIN_DMA( 2 );
+
+			DMA_BLOCK( MGA_DMAPAD,	0x00000000,
+				   MGA_PLNWT,	clear->color_mask,
+				   MGA_YDSTLEN, (box->y1 << 16) | height,
+				   MGA_FXBNDRY, (box->x2 << 16) | box->x1 );
+
+			DMA_BLOCK( MGA_DMAPAD,	0x00000000,
+				   MGA_FCOL,	clear->clear_color,
+				   MGA_DSTORG,	dev_priv->back_offset,
+				   MGA_DWGCTL + MGA_EXEC,
+						dev_priv->clear_cmd );
+
+			ADVANCE_DMA();
+		}
+
+		if ( clear->flags & MGA_DEPTH ) {
+			BEGIN_DMA( 2 );
+
+			DMA_BLOCK( MGA_DMAPAD,	0x00000000,
+				   MGA_PLNWT,	clear->depth_mask,
+				   MGA_YDSTLEN, (box->y1 << 16) | height,
+				   MGA_FXBNDRY, (box->x2 << 16) | box->x1 );
+
+			DMA_BLOCK( MGA_DMAPAD,	0x00000000,
+				   MGA_FCOL,	clear->clear_depth,
+				   MGA_DSTORG,	dev_priv->depth_offset,
+				   MGA_DWGCTL + MGA_EXEC,
+						dev_priv->clear_cmd );
+
+			ADVANCE_DMA();
+		}
+
+	}
+
+	BEGIN_DMA( 1 );
+
+	/* Force reset of DWGCTL */
+	DMA_BLOCK( MGA_DMAPAD,	0x00000000,
+		   MGA_DMAPAD,	0x00000000,
+		   MGA_PLNWT,	ctx->plnwt,
+		   MGA_DWGCTL,	ctx->dwgctl );
+
+	ADVANCE_DMA();
+
+	FLUSH_DMA();
+}
+
+static void mga_dma_dispatch_swap( drm_device_t *dev )
+{
+	drm_mga_private_t *dev_priv = dev->dev_private;
+	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
+	drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
+	drm_clip_rect_t *pbox = sarea_priv->boxes;
+	int nbox = sarea_priv->nbox;
+	int i;
+	DMA_LOCALS;
+	DRM_DEBUG( "\n" );
+
+	sarea_priv->last_frame.head = dev_priv->prim.tail;
+	sarea_priv->last_frame.wrap = dev_priv->prim.last_wrap;
+
+	BEGIN_DMA( 4 + nbox );
+
+	DMA_BLOCK( MGA_DMAPAD,	0x00000000,
+		   MGA_DMAPAD,	0x00000000,
+		   MGA_DWGSYNC,	0x00007100,
+		   MGA_DWGSYNC,	0x00007000 );
+
+	DMA_BLOCK( MGA_DSTORG,	dev_priv->front_offset,
+		   MGA_MACCESS,	dev_priv->maccess,
+		   MGA_SRCORG,	dev_priv->back_offset,
+		   MGA_AR5,	dev_priv->front_pitch );
+
+	DMA_BLOCK( MGA_DMAPAD,	0x00000000,
+		   MGA_DMAPAD,	0x00000000,
+		   MGA_PLNWT,	0xffffffff,
+		   MGA_DWGCTL,	MGA_DWGCTL_COPY );
+
+	for ( i = 0 ; i < nbox ; i++ ) {
+		drm_clip_rect_t *box = &pbox[i];
+		u32 height = box->y2 - box->y1;
+		u32 start = box->y1 * dev_priv->front_pitch;
+
+		DRM_DEBUG( "   from=%d,%d to=%d,%d\n",
+			   box->x1, box->y1, box->x2, box->y2 );
+
+		DMA_BLOCK( MGA_AR0,	start + box->x2 - 1,
+			   MGA_AR3,	start + box->x1,
+			   MGA_FXBNDRY,	((box->x2 - 1) << 16) | box->x1,
+			   MGA_YDSTLEN + MGA_EXEC,
+					(box->y1 << 16) | height );
+	}
+
+	DMA_BLOCK( MGA_DMAPAD,	0x00000000,
+		   MGA_PLNWT,	ctx->plnwt,
+		   MGA_SRCORG,	dev_priv->front_offset,
+		   MGA_DWGCTL,	ctx->dwgctl );
+
+	ADVANCE_DMA();
+
+	FLUSH_DMA();
+
+	DRM_DEBUG( "%s... done.\n", __FUNCTION__ );
+}
+
+static void mga_dma_dispatch_vertex( drm_device_t *dev, drm_buf_t *buf )
+{
+	drm_mga_private_t *dev_priv = dev->dev_private;
+	drm_mga_buf_priv_t *buf_priv = buf->dev_private;
+	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
+	u32 address = (u32) buf->bus_address;
+	u32 length = (u32) buf->used;
+	int i = 0;
+	DMA_LOCALS;
+	DRM_DEBUG( "vertex: buf=%d used=%d\n", buf->idx, buf->used );
+
+	if ( buf->used ) {
+		buf_priv->dispatched = 1;
+
+		MGA_EMIT_STATE( dev_priv, sarea_priv->dirty );
+
+		do {
+			if ( i < sarea_priv->nbox ) {
+				mga_emit_clip_rect( dev_priv,
+						    &sarea_priv->boxes[i] );
+			}
+
+			BEGIN_DMA( 1 );
+
+			DMA_BLOCK( MGA_DMAPAD,		0x00000000,
+				   MGA_DMAPAD,		0x00000000,
+				   MGA_SECADDRESS,	(address |
+							 MGA_DMA_VERTEX),
+				   MGA_SECEND,		((address + length) |
+							 MGA_PAGPXFER) );
+
+			ADVANCE_DMA();
+		} while ( ++i < sarea_priv->nbox );
+	}
+
+	if ( buf_priv->discard ) {
+		AGE_BUFFER( buf_priv );
+		buf->pending = 0;
+		buf->used = 0;
+		buf_priv->dispatched = 0;
+
+		mga_freelist_put( dev, buf );
+	}
+
+	FLUSH_DMA();
+}
+
+static void mga_dma_dispatch_indices( drm_device_t *dev, drm_buf_t *buf,
+				      unsigned int start, unsigned int end )
+{
+	drm_mga_private_t *dev_priv = dev->dev_private;
+	drm_mga_buf_priv_t *buf_priv = buf->dev_private;
+	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
+	u32 address = (u32) buf->bus_address;
+	int i = 0;
+	DMA_LOCALS;
+	DRM_DEBUG( "indices: buf=%d start=%d end=%d\n", buf->idx, start, end );
+
+	if ( start != end ) {
+		buf_priv->dispatched = 1;
+
+		MGA_EMIT_STATE( dev_priv, sarea_priv->dirty );
+
+		do {
+			if ( i < sarea_priv->nbox ) {
+				mga_emit_clip_rect( dev_priv,
+						    &sarea_priv->boxes[i] );
+			}
+
+			BEGIN_DMA( 1 );
+
+			DMA_BLOCK( MGA_DMAPAD,		0x00000000,
+				   MGA_DMAPAD,		0x00000000,
+				   MGA_SETUPADDRESS,	address + start,
+				   MGA_SETUPEND,	((address + end) |
+							 MGA_PAGPXFER) );
+
+			ADVANCE_DMA();
+		} while ( ++i < sarea_priv->nbox );
+	}
+
+	if ( buf_priv->discard ) {
+		AGE_BUFFER( buf_priv );
+		buf->pending = 0;
+		buf->used = 0;
+		buf_priv->dispatched = 0;
+
+		mga_freelist_put( dev, buf );
+	}
+
+	FLUSH_DMA();
+}
+
+/* This copies a 64 byte aligned agp region to the frambuffer with a
+ * standard blit, the ioctl needs to do checking.
+ */
+static void mga_dma_dispatch_iload( drm_device_t *dev, drm_buf_t *buf,
+				    unsigned int dstorg, unsigned int length )
+{
+	drm_mga_private_t *dev_priv = dev->dev_private;
+	drm_mga_buf_priv_t *buf_priv = buf->dev_private;
+	drm_mga_context_regs_t *ctx = &dev_priv->sarea_priv->context_state;
+	u32 srcorg = buf->bus_address | MGA_SRCACC_AGP | MGA_SRCMAP_SYSMEM;
+	u32 y2;
+	DMA_LOCALS;
+	DRM_DEBUG( "buf=%d used=%d\n", buf->idx, buf->used );
+
+	y2 = length / 64;
+
+	BEGIN_DMA( 5 );
+
+	DMA_BLOCK( MGA_DMAPAD,	0x00000000,
+		   MGA_DMAPAD,	0x00000000,
+		   MGA_DWGSYNC,	0x00007100,
+		   MGA_DWGSYNC,	0x00007000 );
+
+	DMA_BLOCK( MGA_DSTORG,	dstorg,
+		   MGA_MACCESS,	0x00000000,
+		   MGA_SRCORG,	srcorg,
+		   MGA_AR5,	64 );
+
+	DMA_BLOCK( MGA_PITCH,	64,
+		   MGA_PLNWT,	0xffffffff,
+		   MGA_DMAPAD,	0x00000000,
+		   MGA_DWGCTL,	MGA_DWGCTL_COPY );
+
+	DMA_BLOCK( MGA_AR0,	63,
+		   MGA_AR3,	0,
+		   MGA_FXBNDRY,	(63 << 16) | 0,
+		   MGA_YDSTLEN + MGA_EXEC, y2 );
+
+	DMA_BLOCK( MGA_PLNWT,	ctx->plnwt,
+		   MGA_SRCORG,	dev_priv->front_offset,
+		   MGA_PITCH,	dev_priv->front_pitch,
+		   MGA_DWGSYNC,	0x00007000 );
+
+	ADVANCE_DMA();
+
+	AGE_BUFFER( buf_priv );
+
+	buf->pending = 0;
+	buf->used = 0;
+	buf_priv->dispatched = 0;
+
+	mga_freelist_put( dev, buf );
+
+	FLUSH_DMA();
+}
+
+static void mga_dma_dispatch_blit( drm_device_t *dev,
+				   drm_mga_blit_t *blit )
+{
+	drm_mga_private_t *dev_priv = dev->dev_private;
+	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
+	drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
+	drm_clip_rect_t *pbox = sarea_priv->boxes;
+	int nbox = sarea_priv->nbox;
+	u32 scandir = 0, i;
+	DMA_LOCALS;
+	DRM_DEBUG( "\n" );
+
+	BEGIN_DMA( 4 + nbox );
+
+	DMA_BLOCK( MGA_DMAPAD,	0x00000000,
+		   MGA_DMAPAD,	0x00000000,
+		   MGA_DWGSYNC,	0x00007100,
+		   MGA_DWGSYNC,	0x00007000 );
+
+	DMA_BLOCK( MGA_DWGCTL,	MGA_DWGCTL_COPY,
+		   MGA_PLNWT,	blit->planemask,
+		   MGA_SRCORG,	blit->srcorg,
+		   MGA_DSTORG,	blit->dstorg );
+
+	DMA_BLOCK( MGA_SGN,	scandir,
+		   MGA_MACCESS,	dev_priv->maccess,
+		   MGA_AR5,	blit->ydir * blit->src_pitch,
+		   MGA_PITCH,	blit->dst_pitch );
+
+	for ( i = 0 ; i < nbox ; i++ ) {
+		int srcx = pbox[i].x1 + blit->delta_sx;
+		int srcy = pbox[i].y1 + blit->delta_sy;
+		int dstx = pbox[i].x1 + blit->delta_dx;
+		int dsty = pbox[i].y1 + blit->delta_dy;
+		int h = pbox[i].y2 - pbox[i].y1;
+		int w = pbox[i].x2 - pbox[i].x1 - 1;
+		int start;
+
+		if ( blit->ydir == -1 ) {
+			srcy = blit->height - srcy - 1;
+		}
+
+		start = srcy * blit->src_pitch + srcx;
+
+		DMA_BLOCK( MGA_AR0,	start + w,
+			   MGA_AR3,	start,
+			   MGA_FXBNDRY,	((dstx + w) << 16) | (dstx & 0xffff),
+			   MGA_YDSTLEN + MGA_EXEC, (dsty << 16) | h );
+	}
+
+	/* Do something to flush AGP?
+	 */
+
+	/* Force reset of DWGCTL */
+	DMA_BLOCK( MGA_DMAPAD,	0x00000000,
+		   MGA_PLNWT,	ctx->plnwt,
+		   MGA_PITCH,	dev_priv->front_pitch,
+		   MGA_DWGCTL,	ctx->dwgctl );
+
+	ADVANCE_DMA();
+}
+
+
+/* ================================================================
+ *
+ */
+
+int mga_dma_clear( DRM_IOCTL_ARGS )
+{
+	DRM_DEVICE;
+	drm_mga_private_t *dev_priv = dev->dev_private;
+	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
+	drm_mga_clear_t clear;
+
+	LOCK_TEST_WITH_RETURN( dev, filp );
+
+	DRM_COPY_FROM_USER_IOCTL( clear, (drm_mga_clear_t *)data, sizeof(clear) );
+
+	if ( sarea_priv->nbox > MGA_NR_SAREA_CLIPRECTS )
+		sarea_priv->nbox = MGA_NR_SAREA_CLIPRECTS;
+
+	WRAP_TEST_WITH_RETURN( dev_priv );
+
+	mga_dma_dispatch_clear( dev, &clear );
+
+	/* Make sure we restore the 3D state next time.
+	 */
+	dev_priv->sarea_priv->dirty |= MGA_UPLOAD_CONTEXT;
+
+	return 0;
+}
+
+int mga_dma_swap( DRM_IOCTL_ARGS )
+{
+	DRM_DEVICE;
+	drm_mga_private_t *dev_priv = dev->dev_private;
+	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
+
+	LOCK_TEST_WITH_RETURN( dev, filp );
+
+	if ( sarea_priv->nbox > MGA_NR_SAREA_CLIPRECTS )
+		sarea_priv->nbox = MGA_NR_SAREA_CLIPRECTS;
+
+	WRAP_TEST_WITH_RETURN( dev_priv );
+
+	mga_dma_dispatch_swap( dev );
+
+	/* Make sure we restore the 3D state next time.
+	 */
+	dev_priv->sarea_priv->dirty |= MGA_UPLOAD_CONTEXT;
+
+	return 0;
+}
+
+int mga_dma_vertex( DRM_IOCTL_ARGS )
+{
+	DRM_DEVICE;
+	drm_mga_private_t *dev_priv = dev->dev_private;
+	drm_device_dma_t *dma = dev->dma;
+	drm_buf_t *buf;
+	drm_mga_buf_priv_t *buf_priv;
+	drm_mga_vertex_t vertex;
+
+	LOCK_TEST_WITH_RETURN( dev, filp );
+
+	DRM_COPY_FROM_USER_IOCTL( vertex,
+			     (drm_mga_vertex_t *)data,
+			     sizeof(vertex) );
+
+        if(vertex.idx < 0 || vertex.idx > dma->buf_count) return DRM_ERR(EINVAL);
+	buf = dma->buflist[vertex.idx];
+	buf_priv = buf->dev_private;
+
+	buf->used = vertex.used;
+	buf_priv->discard = vertex.discard;
+
+	if ( !mga_verify_state( dev_priv ) ) {
+		if ( vertex.discard ) {
+			if ( buf_priv->dispatched == 1 )
+				AGE_BUFFER( buf_priv );
+			buf_priv->dispatched = 0;
+			mga_freelist_put( dev, buf );
+		}
+		return DRM_ERR(EINVAL);
+	}
+
+	WRAP_TEST_WITH_RETURN( dev_priv );
+
+	mga_dma_dispatch_vertex( dev, buf );
+
+	return 0;
+}
+
+int mga_dma_indices( DRM_IOCTL_ARGS )
+{
+	DRM_DEVICE;
+	drm_mga_private_t *dev_priv = dev->dev_private;
+	drm_device_dma_t *dma = dev->dma;
+	drm_buf_t *buf;
+	drm_mga_buf_priv_t *buf_priv;
+	drm_mga_indices_t indices;
+
+	LOCK_TEST_WITH_RETURN( dev, filp );
+
+	DRM_COPY_FROM_USER_IOCTL( indices,
+			     (drm_mga_indices_t *)data,
+			     sizeof(indices) );
+
+        if(indices.idx < 0 || indices.idx > dma->buf_count) return DRM_ERR(EINVAL);
+
+	buf = dma->buflist[indices.idx];
+	buf_priv = buf->dev_private;
+
+	buf_priv->discard = indices.discard;
+
+	if ( !mga_verify_state( dev_priv ) ) {
+		if ( indices.discard ) {
+			if ( buf_priv->dispatched == 1 )
+				AGE_BUFFER( buf_priv );
+			buf_priv->dispatched = 0;
+			mga_freelist_put( dev, buf );
+		}
+		return DRM_ERR(EINVAL);
+	}
+
+	WRAP_TEST_WITH_RETURN( dev_priv );
+
+	mga_dma_dispatch_indices( dev, buf, indices.start, indices.end );
+
+	return 0;
+}
+
+int mga_dma_iload( DRM_IOCTL_ARGS )
+{
+	DRM_DEVICE;
+	drm_device_dma_t *dma = dev->dma;
+	drm_mga_private_t *dev_priv = dev->dev_private;
+	drm_buf_t *buf;
+	drm_mga_buf_priv_t *buf_priv;
+	drm_mga_iload_t iload;
+	DRM_DEBUG( "\n" );
+
+	LOCK_TEST_WITH_RETURN( dev, filp );
+
+	DRM_COPY_FROM_USER_IOCTL( iload, (drm_mga_iload_t *)data, sizeof(iload) );
+
+#if 0
+	if ( mga_do_wait_for_idle( dev_priv ) < 0 ) {
+		if ( MGA_DMA_DEBUG )
+			DRM_INFO( "%s: -EBUSY\n", __FUNCTION__ );
+		return DRM_ERR(EBUSY);
+	}
+#endif
+        if(iload.idx < 0 || iload.idx > dma->buf_count) return DRM_ERR(EINVAL);
+
+	buf = dma->buflist[iload.idx];
+	buf_priv = buf->dev_private;
+
+	if ( mga_verify_iload( dev_priv, iload.dstorg, iload.length ) ) {
+		mga_freelist_put( dev, buf );
+		return DRM_ERR(EINVAL);
+	}
+
+	WRAP_TEST_WITH_RETURN( dev_priv );
+
+	mga_dma_dispatch_iload( dev, buf, iload.dstorg, iload.length );
+
+	/* Make sure we restore the 3D state next time.
+	 */
+	dev_priv->sarea_priv->dirty |= MGA_UPLOAD_CONTEXT;
+
+	return 0;
+}
+
+int mga_dma_blit( DRM_IOCTL_ARGS )
+{
+	DRM_DEVICE;
+	drm_mga_private_t *dev_priv = dev->dev_private;
+	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
+	drm_mga_blit_t blit;
+	DRM_DEBUG( "\n" );
+
+	LOCK_TEST_WITH_RETURN( dev, filp );
+
+	DRM_COPY_FROM_USER_IOCTL( blit, (drm_mga_blit_t *)data, sizeof(blit) );
+
+	if ( sarea_priv->nbox > MGA_NR_SAREA_CLIPRECTS )
+		sarea_priv->nbox = MGA_NR_SAREA_CLIPRECTS;
+
+	if ( mga_verify_blit( dev_priv, blit.srcorg, blit.dstorg ) )
+		return DRM_ERR(EINVAL);
+
+	WRAP_TEST_WITH_RETURN( dev_priv );
+
+	mga_dma_dispatch_blit( dev, &blit );
+
+	/* Make sure we restore the 3D state next time.
+	 */
+	dev_priv->sarea_priv->dirty |= MGA_UPLOAD_CONTEXT;
+
+	return 0;
+}
+
+int mga_getparam( DRM_IOCTL_ARGS )
+{
+	DRM_DEVICE;
+	drm_mga_private_t *dev_priv = dev->dev_private;
+	drm_mga_getparam_t param;
+	int value;
+
+	if ( !dev_priv ) {
+		DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
+		return DRM_ERR(EINVAL);
+	}
+
+	DRM_COPY_FROM_USER_IOCTL( param, (drm_mga_getparam_t *)data,
+			     sizeof(param) );
+
+	DRM_DEBUG( "pid=%d\n", DRM_CURRENTPID );
+
+	switch( param.param ) {
+	case MGA_PARAM_IRQ_NR:
+		value = dev->irq;
+		break;
+	default:
+		return DRM_ERR(EINVAL);
+	}
+
+	if ( DRM_COPY_TO_USER( param.value, &value, sizeof(int) ) ) {
+		DRM_ERROR( "copy_to_user\n" );
+		return DRM_ERR(EFAULT);
+	}
+	
+	return 0;
+}
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/r128_cce.c b/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/r128_cce.c
new file mode 100644
index 000000000..7f0f43254
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/r128_cce.c
@@ -0,0 +1,1011 @@
+/* r128_cce.c -- ATI Rage 128 driver -*- linux-c -*-
+ * Created: Wed Apr  5 19:24:19 2000 by kevin@precisioninsight.com
+ *
+ * Copyright 2000 Precision Insight, Inc., Cedar Park, Texas.
+ * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ *    Gareth Hughes <gareth@valinux.com>
+ */
+
+#include "r128.h"
+#include "drmP.h"
+#include "drm.h"
+#include "r128_drm.h"
+#include "r128_drv.h"
+
+#define R128_FIFO_DEBUG		0
+
+/* CCE microcode (from ATI) */
+static u32 r128_cce_microcode[] = {
+	0, 276838400, 0, 268449792, 2, 142, 2, 145, 0, 1076765731, 0,
+	1617039951, 0, 774592877, 0, 1987540286, 0, 2307490946U, 0,
+	599558925, 0, 589505315, 0, 596487092, 0, 589505315, 1,
+	11544576, 1, 206848, 1, 311296, 1, 198656, 2, 912273422, 11,
+	262144, 0, 0, 1, 33559837, 1, 7438, 1, 14809, 1, 6615, 12, 28,
+	1, 6614, 12, 28, 2, 23, 11, 18874368, 0, 16790922, 1, 409600, 9,
+	30, 1, 147854772, 16, 420483072, 3, 8192, 0, 10240, 1, 198656,
+	1, 15630, 1, 51200, 10, 34858, 9, 42, 1, 33559823, 2, 10276, 1,
+	15717, 1, 15718, 2, 43, 1, 15936948, 1, 570480831, 1, 14715071,
+	12, 322123831, 1, 33953125, 12, 55, 1, 33559908, 1, 15718, 2,
+	46, 4, 2099258, 1, 526336, 1, 442623, 4, 4194365, 1, 509952, 1,
+	459007, 3, 0, 12, 92, 2, 46, 12, 176, 1, 15734, 1, 206848, 1,
+	18432, 1, 133120, 1, 100670734, 1, 149504, 1, 165888, 1,
+	15975928, 1, 1048576, 6, 3145806, 1, 15715, 16, 2150645232U, 2,
+	268449859, 2, 10307, 12, 176, 1, 15734, 1, 15735, 1, 15630, 1,
+	15631, 1, 5253120, 6, 3145810, 16, 2150645232U, 1, 15864, 2, 82,
+	1, 343310, 1, 1064207, 2, 3145813, 1, 15728, 1, 7817, 1, 15729,
+	3, 15730, 12, 92, 2, 98, 1, 16168, 1, 16167, 1, 16002, 1, 16008,
+	1, 15974, 1, 15975, 1, 15990, 1, 15976, 1, 15977, 1, 15980, 0,
+	15981, 1, 10240, 1, 5253120, 1, 15720, 1, 198656, 6, 110, 1,
+	180224, 1, 103824738, 2, 112, 2, 3145839, 0, 536885440, 1,
+	114880, 14, 125, 12, 206975, 1, 33559995, 12, 198784, 0,
+	33570236, 1, 15803, 0, 15804, 3, 294912, 1, 294912, 3, 442370,
+	1, 11544576, 0, 811612160, 1, 12593152, 1, 11536384, 1,
+	14024704, 7, 310382726, 0, 10240, 1, 14796, 1, 14797, 1, 14793,
+	1, 14794, 0, 14795, 1, 268679168, 1, 9437184, 1, 268449792, 1,
+	198656, 1, 9452827, 1, 1075854602, 1, 1075854603, 1, 557056, 1,
+	114880, 14, 159, 12, 198784, 1, 1109409213, 12, 198783, 1,
+	1107312059, 12, 198784, 1, 1109409212, 2, 162, 1, 1075854781, 1,
+	1073757627, 1, 1075854780, 1, 540672, 1, 10485760, 6, 3145894,
+	16, 274741248, 9, 168, 3, 4194304, 3, 4209949, 0, 0, 0, 256, 14,
+	174, 1, 114857, 1, 33560007, 12, 176, 0, 10240, 1, 114858, 1,
+	33560018, 1, 114857, 3, 33560007, 1, 16008, 1, 114874, 1,
+	33560360, 1, 114875, 1, 33560154, 0, 15963, 0, 256, 0, 4096, 1,
+	409611, 9, 188, 0, 10240, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+};
+
+int r128_do_wait_for_idle( drm_r128_private_t *dev_priv );
+
+int R128_READ_PLL(drm_device_t *dev, int addr)
+{
+	drm_r128_private_t *dev_priv = dev->dev_private;
+
+	R128_WRITE8(R128_CLOCK_CNTL_INDEX, addr & 0x1f);
+	return R128_READ(R128_CLOCK_CNTL_DATA);
+}
+
+#if R128_FIFO_DEBUG
+static void r128_status( drm_r128_private_t *dev_priv )
+{
+	printk( "GUI_STAT           = 0x%08x\n",
+		(unsigned int)R128_READ( R128_GUI_STAT ) );
+	printk( "PM4_STAT           = 0x%08x\n",
+		(unsigned int)R128_READ( R128_PM4_STAT ) );
+	printk( "PM4_BUFFER_DL_WPTR = 0x%08x\n",
+		(unsigned int)R128_READ( R128_PM4_BUFFER_DL_WPTR ) );
+	printk( "PM4_BUFFER_DL_RPTR = 0x%08x\n",
+		(unsigned int)R128_READ( R128_PM4_BUFFER_DL_RPTR ) );
+	printk( "PM4_MICRO_CNTL     = 0x%08x\n",
+		(unsigned int)R128_READ( R128_PM4_MICRO_CNTL ) );
+	printk( "PM4_BUFFER_CNTL    = 0x%08x\n",
+		(unsigned int)R128_READ( R128_PM4_BUFFER_CNTL ) );
+}
+#endif
+
+
+/* ================================================================
+ * Engine, FIFO control
+ */
+
+static int r128_do_pixcache_flush( drm_r128_private_t *dev_priv )
+{
+	u32 tmp;
+	int i;
+
+	tmp = R128_READ( R128_PC_NGUI_CTLSTAT ) | R128_PC_FLUSH_ALL;
+	R128_WRITE( R128_PC_NGUI_CTLSTAT, tmp );
+
+	for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) {
+		if ( !(R128_READ( R128_PC_NGUI_CTLSTAT ) & R128_PC_BUSY) ) {
+			return 0;
+		}
+		DRM_UDELAY( 1 );
+	}
+
+#if R128_FIFO_DEBUG
+	DRM_ERROR( "failed!\n" );
+#endif
+	return DRM_ERR(EBUSY);
+}
+
+static int r128_do_wait_for_fifo( drm_r128_private_t *dev_priv, int entries )
+{
+	int i;
+
+	for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) {
+		int slots = R128_READ( R128_GUI_STAT ) & R128_GUI_FIFOCNT_MASK;
+		if ( slots >= entries ) return 0;
+		DRM_UDELAY( 1 );
+	}
+
+#if R128_FIFO_DEBUG
+	DRM_ERROR( "failed!\n" );
+#endif
+	return DRM_ERR(EBUSY);
+}
+
+int r128_do_wait_for_idle( drm_r128_private_t *dev_priv )
+{
+	int i, ret;
+
+	ret = r128_do_wait_for_fifo( dev_priv, 64 );
+	if ( ret ) return ret;
+
+	for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) {
+		if ( !(R128_READ( R128_GUI_STAT ) & R128_GUI_ACTIVE) ) {
+			r128_do_pixcache_flush( dev_priv );
+			return 0;
+		}
+		DRM_UDELAY( 1 );
+	}
+
+#if R128_FIFO_DEBUG
+	DRM_ERROR( "failed!\n" );
+#endif
+	return DRM_ERR(EBUSY);
+}
+
+
+/* ================================================================
+ * CCE control, initialization
+ */
+
+/* Load the microcode for the CCE */
+static void r128_cce_load_microcode( drm_r128_private_t *dev_priv )
+{
+	int i;
+
+	DRM_DEBUG( "\n" );
+
+	r128_do_wait_for_idle( dev_priv );
+
+	R128_WRITE( R128_PM4_MICROCODE_ADDR, 0 );
+	for ( i = 0 ; i < 256 ; i++ ) {
+		R128_WRITE( R128_PM4_MICROCODE_DATAH,
+			    r128_cce_microcode[i * 2] );
+		R128_WRITE( R128_PM4_MICROCODE_DATAL,
+			    r128_cce_microcode[i * 2 + 1] );
+	}
+}
+
+/* Flush any pending commands to the CCE.  This should only be used just
+ * prior to a wait for idle, as it informs the engine that the command
+ * stream is ending.
+ */
+static void r128_do_cce_flush( drm_r128_private_t *dev_priv )
+{
+	u32 tmp;
+
+	tmp = R128_READ( R128_PM4_BUFFER_DL_WPTR ) | R128_PM4_BUFFER_DL_DONE;
+	R128_WRITE( R128_PM4_BUFFER_DL_WPTR, tmp );
+}
+
+/* Wait for the CCE to go idle.
+ */
+int r128_do_cce_idle( drm_r128_private_t *dev_priv )
+{
+	int i;
+
+	for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) {
+		if ( GET_RING_HEAD( &dev_priv->ring ) == dev_priv->ring.tail ) {
+			int pm4stat = R128_READ( R128_PM4_STAT );
+			if ( ( (pm4stat & R128_PM4_FIFOCNT_MASK) >=
+			       dev_priv->cce_fifo_size ) &&
+			     !(pm4stat & (R128_PM4_BUSY |
+					  R128_PM4_GUI_ACTIVE)) ) {
+				return r128_do_pixcache_flush( dev_priv );
+			}
+		}
+		DRM_UDELAY( 1 );
+	}
+
+#if R128_FIFO_DEBUG
+	DRM_ERROR( "failed!\n" );
+	r128_status( dev_priv );
+#endif
+	return DRM_ERR(EBUSY);
+}
+
+/* Start the Concurrent Command Engine.
+ */
+static void r128_do_cce_start( drm_r128_private_t *dev_priv )
+{
+	r128_do_wait_for_idle( dev_priv );
+
+	R128_WRITE( R128_PM4_BUFFER_CNTL,
+		    dev_priv->cce_mode | dev_priv->ring.size_l2qw );
+	R128_READ( R128_PM4_BUFFER_ADDR ); /* as per the sample code */
+	R128_WRITE( R128_PM4_MICRO_CNTL, R128_PM4_MICRO_FREERUN );
+
+	dev_priv->cce_running = 1;
+}
+
+/* Reset the Concurrent Command Engine.  This will not flush any pending
+ * commands, so you must wait for the CCE command stream to complete
+ * before calling this routine.
+ */
+static void r128_do_cce_reset( drm_r128_private_t *dev_priv )
+{
+	R128_WRITE( R128_PM4_BUFFER_DL_WPTR, 0 );
+	R128_WRITE( R128_PM4_BUFFER_DL_RPTR, 0 );
+	SET_RING_HEAD( &dev_priv->ring, 0 );
+	dev_priv->ring.tail = 0;
+}
+
+/* Stop the Concurrent Command Engine.  This will not flush any pending
+ * commands, so you must flush the command stream and wait for the CCE
+ * to go idle before calling this routine.
+ */
+static void r128_do_cce_stop( drm_r128_private_t *dev_priv )
+{
+	R128_WRITE( R128_PM4_MICRO_CNTL, 0 );
+	R128_WRITE( R128_PM4_BUFFER_CNTL, R128_PM4_NONPM4 );
+
+	dev_priv->cce_running = 0;
+}
+
+/* Reset the engine.  This will stop the CCE if it is running.
+ */
+static int r128_do_engine_reset( drm_device_t *dev )
+{
+	drm_r128_private_t *dev_priv = dev->dev_private;
+	u32 clock_cntl_index, mclk_cntl, gen_reset_cntl;
+
+	r128_do_pixcache_flush( dev_priv );
+
+	clock_cntl_index = R128_READ( R128_CLOCK_CNTL_INDEX );
+	mclk_cntl = R128_READ_PLL( dev, R128_MCLK_CNTL );
+
+	R128_WRITE_PLL( R128_MCLK_CNTL,
+			mclk_cntl | R128_FORCE_GCP | R128_FORCE_PIPE3D_CP );
+
+	gen_reset_cntl = R128_READ( R128_GEN_RESET_CNTL );
+
+	/* Taken from the sample code - do not change */
+	R128_WRITE( R128_GEN_RESET_CNTL,
+		    gen_reset_cntl | R128_SOFT_RESET_GUI );
+	R128_READ( R128_GEN_RESET_CNTL );
+	R128_WRITE( R128_GEN_RESET_CNTL,
+		    gen_reset_cntl & ~R128_SOFT_RESET_GUI );
+	R128_READ( R128_GEN_RESET_CNTL );
+
+	R128_WRITE_PLL( R128_MCLK_CNTL, mclk_cntl );
+	R128_WRITE( R128_CLOCK_CNTL_INDEX, clock_cntl_index );
+	R128_WRITE( R128_GEN_RESET_CNTL, gen_reset_cntl );
+
+	/* Reset the CCE ring */
+	r128_do_cce_reset( dev_priv );
+
+	/* The CCE is no longer running after an engine reset */
+	dev_priv->cce_running = 0;
+
+	/* Reset any pending vertex, indirect buffers */
+	r128_freelist_reset( dev );
+
+	return 0;
+}
+
+static void r128_cce_init_ring_buffer( drm_device_t *dev,
+				       drm_r128_private_t *dev_priv )
+{
+	u32 ring_start;
+	u32 tmp;
+
+	DRM_DEBUG( "\n" );
+
+	/* The manual (p. 2) says this address is in "VM space".  This
+	 * means it's an offset from the start of AGP space.
+	 */
+#if __REALLY_HAVE_AGP
+	if ( !dev_priv->is_pci )
+		ring_start = dev_priv->cce_ring->offset - dev->agp->base;
+	else
+#endif
+		ring_start = dev_priv->cce_ring->offset - dev->sg->handle;
+
+	R128_WRITE( R128_PM4_BUFFER_OFFSET, ring_start | R128_AGP_OFFSET );
+
+	R128_WRITE( R128_PM4_BUFFER_DL_WPTR, 0 );
+	R128_WRITE( R128_PM4_BUFFER_DL_RPTR, 0 );
+
+	/* DL_RPTR_ADDR is a physical address in AGP space. */
+	SET_RING_HEAD( &dev_priv->ring, 0 );
+
+	if ( !dev_priv->is_pci ) {
+		R128_WRITE( R128_PM4_BUFFER_DL_RPTR_ADDR,
+			    dev_priv->ring_rptr->offset );
+	} else {
+		drm_sg_mem_t *entry = dev->sg;
+		unsigned long tmp_ofs, page_ofs;
+
+		tmp_ofs = dev_priv->ring_rptr->offset - dev->sg->handle;
+		page_ofs = tmp_ofs >> PAGE_SHIFT;
+
+		R128_WRITE( R128_PM4_BUFFER_DL_RPTR_ADDR,
+     			    entry->busaddr[page_ofs]);
+		DRM_DEBUG( "ring rptr: offset=0x%08x handle=0x%08lx\n",
+			   entry->busaddr[page_ofs],
+     			   entry->handle + tmp_ofs );
+	}
+
+	/* Set watermark control */
+	R128_WRITE( R128_PM4_BUFFER_WM_CNTL,
+		    ((R128_WATERMARK_L/4) << R128_WMA_SHIFT)
+		    | ((R128_WATERMARK_M/4) << R128_WMB_SHIFT)
+		    | ((R128_WATERMARK_N/4) << R128_WMC_SHIFT)
+		    | ((R128_WATERMARK_K/64) << R128_WB_WM_SHIFT) );
+
+	/* Force read.  Why?  Because it's in the examples... */
+	R128_READ( R128_PM4_BUFFER_ADDR );
+
+	/* Turn on bus mastering */
+	tmp = R128_READ( R128_BUS_CNTL ) & ~R128_BUS_MASTER_DIS;
+	R128_WRITE( R128_BUS_CNTL, tmp );
+}
+
+static int r128_do_init_cce( drm_device_t *dev, drm_r128_init_t *init )
+{
+	drm_r128_private_t *dev_priv;
+
+	DRM_DEBUG( "\n" );
+
+	dev_priv = DRM(alloc)( sizeof(drm_r128_private_t), DRM_MEM_DRIVER );
+	if ( dev_priv == NULL )
+		return DRM_ERR(ENOMEM);
+
+	memset( dev_priv, 0, sizeof(drm_r128_private_t) );
+
+	dev_priv->is_pci = init->is_pci;
+
+	if ( dev_priv->is_pci && !dev->sg ) {
+		DRM_ERROR( "PCI GART memory not allocated!\n" );
+		dev->dev_private = (void *)dev_priv;
+		r128_do_cleanup_cce( dev );
+		return DRM_ERR(EINVAL);
+	}
+
+	dev_priv->usec_timeout = init->usec_timeout;
+	if ( dev_priv->usec_timeout < 1 ||
+	     dev_priv->usec_timeout > R128_MAX_USEC_TIMEOUT ) {
+		DRM_DEBUG( "TIMEOUT problem!\n" );
+		dev->dev_private = (void *)dev_priv;
+		r128_do_cleanup_cce( dev );
+		return DRM_ERR(EINVAL);
+	}
+
+	dev_priv->cce_mode = init->cce_mode;
+
+	/* GH: Simple idle check.
+	 */
+	atomic_set( &dev_priv->idle_count, 0 );
+
+	/* We don't support anything other than bus-mastering ring mode,
+	 * but the ring can be in either AGP or PCI space for the ring
+	 * read pointer.
+	 */
+	if ( ( init->cce_mode != R128_PM4_192BM ) &&
+	     ( init->cce_mode != R128_PM4_128BM_64INDBM ) &&
+	     ( init->cce_mode != R128_PM4_64BM_128INDBM ) &&
+	     ( init->cce_mode != R128_PM4_64BM_64VCBM_64INDBM ) ) {
+		DRM_DEBUG( "Bad cce_mode!\n" );
+		dev->dev_private = (void *)dev_priv;
+		r128_do_cleanup_cce( dev );
+		return DRM_ERR(EINVAL);
+	}
+
+	switch ( init->cce_mode ) {
+	case R128_PM4_NONPM4:
+		dev_priv->cce_fifo_size = 0;
+		break;
+	case R128_PM4_192PIO:
+	case R128_PM4_192BM:
+		dev_priv->cce_fifo_size = 192;
+		break;
+	case R128_PM4_128PIO_64INDBM:
+	case R128_PM4_128BM_64INDBM:
+		dev_priv->cce_fifo_size = 128;
+		break;
+	case R128_PM4_64PIO_128INDBM:
+	case R128_PM4_64BM_128INDBM:
+	case R128_PM4_64PIO_64VCBM_64INDBM:
+	case R128_PM4_64BM_64VCBM_64INDBM:
+	case R128_PM4_64PIO_64VCPIO_64INDPIO:
+		dev_priv->cce_fifo_size = 64;
+		break;
+	}
+
+	switch ( init->fb_bpp ) {
+	case 16:
+		dev_priv->color_fmt = R128_DATATYPE_RGB565;
+		break;
+	case 32:
+	default:
+		dev_priv->color_fmt = R128_DATATYPE_ARGB8888;
+		break;
+	}
+	dev_priv->front_offset	= init->front_offset;
+	dev_priv->front_pitch	= init->front_pitch;
+	dev_priv->back_offset	= init->back_offset;
+	dev_priv->back_pitch	= init->back_pitch;
+
+	switch ( init->depth_bpp ) {
+	case 16:
+		dev_priv->depth_fmt = R128_DATATYPE_RGB565;
+		break;
+	case 24:
+	case 32:
+	default:
+		dev_priv->depth_fmt = R128_DATATYPE_ARGB8888;
+		break;
+	}
+	dev_priv->depth_offset	= init->depth_offset;
+	dev_priv->depth_pitch	= init->depth_pitch;
+	dev_priv->span_offset	= init->span_offset;
+
+	dev_priv->front_pitch_offset_c = (((dev_priv->front_pitch/8) << 21) |
+					  (dev_priv->front_offset >> 5));
+	dev_priv->back_pitch_offset_c = (((dev_priv->back_pitch/8) << 21) |
+					 (dev_priv->back_offset >> 5));
+	dev_priv->depth_pitch_offset_c = (((dev_priv->depth_pitch/8) << 21) |
+					  (dev_priv->depth_offset >> 5) |
+					  R128_DST_TILE);
+	dev_priv->span_pitch_offset_c = (((dev_priv->depth_pitch/8) << 21) |
+					 (dev_priv->span_offset >> 5));
+
+	DRM_GETSAREA();
+	
+	if(!dev_priv->sarea) {
+		DRM_ERROR("could not find sarea!\n");
+		dev->dev_private = (void *)dev_priv;
+		r128_do_cleanup_cce( dev );
+		return DRM_ERR(EINVAL);
+	}
+
+	DRM_FIND_MAP( dev_priv->fb, init->fb_offset );
+	if(!dev_priv->fb) {
+		DRM_ERROR("could not find framebuffer!\n");
+		dev->dev_private = (void *)dev_priv;
+		r128_do_cleanup_cce( dev );
+		return DRM_ERR(EINVAL);
+	}
+	DRM_FIND_MAP( dev_priv->mmio, init->mmio_offset );
+	if(!dev_priv->mmio) {
+		DRM_ERROR("could not find mmio region!\n");
+		dev->dev_private = (void *)dev_priv;
+		r128_do_cleanup_cce( dev );
+		return DRM_ERR(EINVAL);
+	}
+	DRM_FIND_MAP( dev_priv->cce_ring, init->ring_offset );
+	if(!dev_priv->cce_ring) {
+		DRM_ERROR("could not find cce ring region!\n");
+		dev->dev_private = (void *)dev_priv;
+		r128_do_cleanup_cce( dev );
+		return DRM_ERR(EINVAL);
+	}
+	DRM_FIND_MAP( dev_priv->ring_rptr, init->ring_rptr_offset );
+	if(!dev_priv->ring_rptr) {
+		DRM_ERROR("could not find ring read pointer!\n");
+		dev->dev_private = (void *)dev_priv;
+		r128_do_cleanup_cce( dev );
+		return DRM_ERR(EINVAL);
+	}
+	DRM_FIND_MAP( dev_priv->buffers, init->buffers_offset );
+	if(!dev_priv->buffers) {
+		DRM_ERROR("could not find dma buffer region!\n");
+		dev->dev_private = (void *)dev_priv;
+		r128_do_cleanup_cce( dev );
+		return DRM_ERR(EINVAL);
+	}
+
+	if ( !dev_priv->is_pci ) {
+		DRM_FIND_MAP( dev_priv->agp_textures,
+			      init->agp_textures_offset );
+		if(!dev_priv->agp_textures) {
+			DRM_ERROR("could not find agp texture region!\n");
+			dev->dev_private = (void *)dev_priv;
+			r128_do_cleanup_cce( dev );
+			return DRM_ERR(EINVAL);
+		}
+	}
+
+	dev_priv->sarea_priv =
+		(drm_r128_sarea_t *)((u8 *)dev_priv->sarea->handle +
+				     init->sarea_priv_offset);
+
+	if ( !dev_priv->is_pci ) {
+		DRM_IOREMAP( dev_priv->cce_ring );
+		DRM_IOREMAP( dev_priv->ring_rptr );
+		DRM_IOREMAP( dev_priv->buffers );
+		if(!dev_priv->cce_ring->handle ||
+		   !dev_priv->ring_rptr->handle ||
+		   !dev_priv->buffers->handle) {
+			DRM_ERROR("Could not ioremap agp regions!\n");
+			dev->dev_private = (void *)dev_priv;
+			r128_do_cleanup_cce( dev );
+			return DRM_ERR(ENOMEM);
+		}
+	} else {
+		dev_priv->cce_ring->handle =
+			(void *)dev_priv->cce_ring->offset;
+		dev_priv->ring_rptr->handle =
+			(void *)dev_priv->ring_rptr->offset;
+		dev_priv->buffers->handle = (void *)dev_priv->buffers->offset;
+	}
+
+#if __REALLY_HAVE_AGP
+	if ( !dev_priv->is_pci )
+		dev_priv->cce_buffers_offset = dev->agp->base;
+	else
+#endif
+		dev_priv->cce_buffers_offset = dev->sg->handle;
+
+	dev_priv->ring.head = ((__volatile__ u32 *)
+			       dev_priv->ring_rptr->handle);
+
+	dev_priv->ring.start = (u32 *)dev_priv->cce_ring->handle;
+	dev_priv->ring.end = ((u32 *)dev_priv->cce_ring->handle
+			      + init->ring_size / sizeof(u32));
+	dev_priv->ring.size = init->ring_size;
+	dev_priv->ring.size_l2qw = DRM(order)( init->ring_size / 8 );
+
+	dev_priv->ring.tail_mask =
+		(dev_priv->ring.size / sizeof(u32)) - 1;
+
+	dev_priv->ring.high_mark = 128;
+	dev_priv->ring.ring_rptr = dev_priv->ring_rptr;
+
+	dev_priv->sarea_priv->last_frame = 0;
+	R128_WRITE( R128_LAST_FRAME_REG, dev_priv->sarea_priv->last_frame );
+
+	dev_priv->sarea_priv->last_dispatch = 0;
+	R128_WRITE( R128_LAST_DISPATCH_REG,
+		    dev_priv->sarea_priv->last_dispatch );
+
+#if __REALLY_HAVE_SG
+	if ( dev_priv->is_pci ) {
+		if (!DRM(ati_pcigart_init)( dev, &dev_priv->phys_pci_gart,
+     					    &dev_priv->bus_pci_gart) ) {
+			DRM_ERROR( "failed to init PCI GART!\n" );
+			dev->dev_private = (void *)dev_priv;
+			r128_do_cleanup_cce( dev );
+			return DRM_ERR(ENOMEM);
+		}
+		R128_WRITE( R128_PCI_GART_PAGE, dev_priv->bus_pci_gart );
+	}
+#endif
+
+	r128_cce_init_ring_buffer( dev, dev_priv );
+	r128_cce_load_microcode( dev_priv );
+
+	dev->dev_private = (void *)dev_priv;
+
+	r128_do_engine_reset( dev );
+
+	return 0;
+}
+
+int r128_do_cleanup_cce( drm_device_t *dev )
+{
+	if ( dev->dev_private ) {
+		drm_r128_private_t *dev_priv = dev->dev_private;
+
+#if __REALLY_HAVE_SG
+		if ( !dev_priv->is_pci ) {
+#endif
+			DRM_IOREMAPFREE( dev_priv->cce_ring );
+			DRM_IOREMAPFREE( dev_priv->ring_rptr );
+			DRM_IOREMAPFREE( dev_priv->buffers );
+#if __REALLY_HAVE_SG
+		} else {
+			if (!DRM(ati_pcigart_cleanup)( dev,
+						dev_priv->phys_pci_gart,
+						dev_priv->bus_pci_gart ))
+				DRM_ERROR( "failed to cleanup PCI GART!\n" );
+		}
+#endif
+
+		DRM(free)( dev->dev_private, sizeof(drm_r128_private_t),
+			   DRM_MEM_DRIVER );
+		dev->dev_private = NULL;
+	}
+
+	return 0;
+}
+
+int r128_cce_init( DRM_IOCTL_ARGS )
+{
+	DRM_DEVICE;
+	drm_r128_init_t init;
+
+	DRM_DEBUG( "\n" );
+
+	DRM_COPY_FROM_USER_IOCTL( init, (drm_r128_init_t *)data, sizeof(init) );
+
+	switch ( init.func ) {
+	case R128_INIT_CCE:
+		return r128_do_init_cce( dev, &init );
+	case R128_CLEANUP_CCE:
+		return r128_do_cleanup_cce( dev );
+	}
+
+	return DRM_ERR(EINVAL);
+}
+
+int r128_cce_start( DRM_IOCTL_ARGS )
+{
+	DRM_DEVICE;
+	drm_r128_private_t *dev_priv = dev->dev_private;
+	DRM_DEBUG( "\n" );
+
+	LOCK_TEST_WITH_RETURN( dev, filp );
+
+	if ( dev_priv->cce_running || dev_priv->cce_mode == R128_PM4_NONPM4 ) {
+		DRM_DEBUG( "%s while CCE running\n", __FUNCTION__ );
+		return 0;
+	}
+
+	r128_do_cce_start( dev_priv );
+
+	return 0;
+}
+
+/* Stop the CCE.  The engine must have been idled before calling this
+ * routine.
+ */
+int r128_cce_stop( DRM_IOCTL_ARGS )
+{
+	DRM_DEVICE;
+	drm_r128_private_t *dev_priv = dev->dev_private;
+	drm_r128_cce_stop_t stop;
+	int ret;
+	DRM_DEBUG( "\n" );
+
+	LOCK_TEST_WITH_RETURN( dev, filp );
+
+	DRM_COPY_FROM_USER_IOCTL(stop, (drm_r128_cce_stop_t *)data, sizeof(stop) );
+
+	/* Flush any pending CCE commands.  This ensures any outstanding
+	 * commands are exectuted by the engine before we turn it off.
+	 */
+	if ( stop.flush ) {
+		r128_do_cce_flush( dev_priv );
+	}
+
+	/* If we fail to make the engine go idle, we return an error
+	 * code so that the DRM ioctl wrapper can try again.
+	 */
+	if ( stop.idle ) {
+		ret = r128_do_cce_idle( dev_priv );
+		if ( ret ) return ret;
+	}
+
+	/* Finally, we can turn off the CCE.  If the engine isn't idle,
+	 * we will get some dropped triangles as they won't be fully
+	 * rendered before the CCE is shut down.
+	 */
+	r128_do_cce_stop( dev_priv );
+
+	/* Reset the engine */
+	r128_do_engine_reset( dev );
+
+	return 0;
+}
+
+/* Just reset the CCE ring.  Called as part of an X Server engine reset.
+ */
+int r128_cce_reset( DRM_IOCTL_ARGS )
+{
+	DRM_DEVICE;
+	drm_r128_private_t *dev_priv = dev->dev_private;
+	DRM_DEBUG( "\n" );
+
+	LOCK_TEST_WITH_RETURN( dev, filp );
+
+	if ( !dev_priv ) {
+		DRM_DEBUG( "%s called before init done\n", __FUNCTION__ );
+		return DRM_ERR(EINVAL);
+	}
+
+	r128_do_cce_reset( dev_priv );
+
+	/* The CCE is no longer running after an engine reset */
+	dev_priv->cce_running = 0;
+
+	return 0;
+}
+
+int r128_cce_idle( DRM_IOCTL_ARGS )
+{
+	DRM_DEVICE;
+	drm_r128_private_t *dev_priv = dev->dev_private;
+	DRM_DEBUG( "\n" );
+
+	LOCK_TEST_WITH_RETURN( dev, filp );
+
+	if ( dev_priv->cce_running ) {
+		r128_do_cce_flush( dev_priv );
+	}
+
+	return r128_do_cce_idle( dev_priv );
+}
+
+int r128_engine_reset( DRM_IOCTL_ARGS )
+{
+	DRM_DEVICE;
+	DRM_DEBUG( "\n" );
+
+	LOCK_TEST_WITH_RETURN( dev, filp );
+
+	return r128_do_engine_reset( dev );
+}
+
+
+/* ================================================================
+ * Fullscreen mode
+ */
+
+static int r128_do_init_pageflip( drm_device_t *dev )
+{
+	drm_r128_private_t *dev_priv = dev->dev_private;
+	DRM_DEBUG( "\n" );
+
+	dev_priv->crtc_offset =      R128_READ( R128_CRTC_OFFSET );
+	dev_priv->crtc_offset_cntl = R128_READ( R128_CRTC_OFFSET_CNTL );
+
+	R128_WRITE( R128_CRTC_OFFSET, dev_priv->front_offset );
+	R128_WRITE( R128_CRTC_OFFSET_CNTL,
+		    dev_priv->crtc_offset_cntl | R128_CRTC_OFFSET_FLIP_CNTL );
+
+	dev_priv->page_flipping = 1;
+	dev_priv->current_page = 0;
+
+	return 0;
+}
+
+int r128_do_cleanup_pageflip( drm_device_t *dev )
+{
+	drm_r128_private_t *dev_priv = dev->dev_private;
+	DRM_DEBUG( "\n" );
+
+	R128_WRITE( R128_CRTC_OFFSET,      dev_priv->crtc_offset );
+	R128_WRITE( R128_CRTC_OFFSET_CNTL, dev_priv->crtc_offset_cntl );
+
+	dev_priv->page_flipping = 0;
+	dev_priv->current_page = 0;
+
+	return 0;
+}
+
+int r128_fullscreen( DRM_IOCTL_ARGS )
+{
+	DRM_DEVICE;
+	drm_r128_fullscreen_t fs;
+
+	LOCK_TEST_WITH_RETURN( dev, filp );
+
+	DRM_COPY_FROM_USER_IOCTL( fs, (drm_r128_fullscreen_t *)data, sizeof(fs) );
+
+	switch ( fs.func ) {
+	case R128_INIT_FULLSCREEN:
+		return r128_do_init_pageflip( dev );
+	case R128_CLEANUP_FULLSCREEN:
+		return r128_do_cleanup_pageflip( dev );
+	}
+
+	return DRM_ERR(EINVAL);
+}
+
+
+/* ================================================================
+ * Freelist management
+ */
+#define R128_BUFFER_USED	0xffffffff
+#define R128_BUFFER_FREE	0
+
+#if 0
+static int r128_freelist_init( drm_device_t *dev )
+{
+	drm_device_dma_t *dma = dev->dma;
+	drm_r128_private_t *dev_priv = dev->dev_private;
+	drm_buf_t *buf;
+	drm_r128_buf_priv_t *buf_priv;
+	drm_r128_freelist_t *entry;
+	int i;
+
+	dev_priv->head = DRM(alloc)( sizeof(drm_r128_freelist_t),
+				     DRM_MEM_DRIVER );
+	if ( dev_priv->head == NULL )
+		return DRM_ERR(ENOMEM);
+
+	memset( dev_priv->head, 0, sizeof(drm_r128_freelist_t) );
+	dev_priv->head->age = R128_BUFFER_USED;
+
+	for ( i = 0 ; i < dma->buf_count ; i++ ) {
+		buf = dma->buflist[i];
+		buf_priv = buf->dev_private;
+
+		entry = DRM(alloc)( sizeof(drm_r128_freelist_t),
+				    DRM_MEM_DRIVER );
+		if ( !entry ) return DRM_ERR(ENOMEM);
+
+		entry->age = R128_BUFFER_FREE;
+		entry->buf = buf;
+		entry->prev = dev_priv->head;
+		entry->next = dev_priv->head->next;
+		if ( !entry->next )
+			dev_priv->tail = entry;
+
+		buf_priv->discard = 0;
+		buf_priv->dispatched = 0;
+		buf_priv->list_entry = entry;
+
+		dev_priv->head->next = entry;
+
+		if ( dev_priv->head->next )
+			dev_priv->head->next->prev = entry;
+	}
+
+	return 0;
+
+}
+#endif
+
+drm_buf_t *r128_freelist_get( drm_device_t *dev )
+{
+	drm_device_dma_t *dma = dev->dma;
+	drm_r128_private_t *dev_priv = dev->dev_private;
+	drm_r128_buf_priv_t *buf_priv;
+	drm_buf_t *buf;
+	int i, t;
+
+	/* FIXME: Optimize -- use freelist code */
+
+	for ( i = 0 ; i < dma->buf_count ; i++ ) {
+		buf = dma->buflist[i];
+		buf_priv = buf->dev_private;
+		if ( buf->filp == 0 )
+			return buf;
+	}
+
+	for ( t = 0 ; t < dev_priv->usec_timeout ; t++ ) {
+		u32 done_age = R128_READ( R128_LAST_DISPATCH_REG );
+
+		for ( i = 0 ; i < dma->buf_count ; i++ ) {
+			buf = dma->buflist[i];
+			buf_priv = buf->dev_private;
+			if ( buf->pending && buf_priv->age <= done_age ) {
+				/* The buffer has been processed, so it
+				 * can now be used.
+				 */
+				buf->pending = 0;
+				return buf;
+			}
+		}
+		DRM_UDELAY( 1 );
+	}
+
+	DRM_ERROR( "returning NULL!\n" );
+	return NULL;
+}
+
+void r128_freelist_reset( drm_device_t *dev )
+{
+	drm_device_dma_t *dma = dev->dma;
+	int i;
+
+	for ( i = 0 ; i < dma->buf_count ; i++ ) {
+		drm_buf_t *buf = dma->buflist[i];
+		drm_r128_buf_priv_t *buf_priv = buf->dev_private;
+		buf_priv->age = 0;
+	}
+}
+
+
+/* ================================================================
+ * CCE command submission
+ */
+
+int r128_wait_ring( drm_r128_private_t *dev_priv, int n )
+{
+	drm_r128_ring_buffer_t *ring = &dev_priv->ring;
+	int i;
+
+	for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) {
+		r128_update_ring_snapshot( ring );
+		if ( ring->space >= n )
+			return 0;
+		DRM_UDELAY( 1 );
+	}
+
+	/* FIXME: This is being ignored... */
+	DRM_ERROR( "failed!\n" );
+	return DRM_ERR(EBUSY);
+}
+
+static int r128_cce_get_buffers( DRMFILE filp, drm_device_t *dev, drm_dma_t *d )
+{
+	int i;
+	drm_buf_t *buf;
+
+	for ( i = d->granted_count ; i < d->request_count ; i++ ) {
+		buf = r128_freelist_get( dev );
+		if ( !buf ) return DRM_ERR(EAGAIN);
+
+		buf->filp = filp;
+
+		if ( DRM_COPY_TO_USER( &d->request_indices[i], &buf->idx,
+				   sizeof(buf->idx) ) )
+			return DRM_ERR(EFAULT);
+		if ( DRM_COPY_TO_USER( &d->request_sizes[i], &buf->total,
+				   sizeof(buf->total) ) )
+			return DRM_ERR(EFAULT);
+
+		d->granted_count++;
+	}
+	return 0;
+}
+
+int r128_cce_buffers( DRM_IOCTL_ARGS )
+{
+	DRM_DEVICE;
+	drm_device_dma_t *dma = dev->dma;
+	int ret = 0;
+	drm_dma_t d;
+
+	LOCK_TEST_WITH_RETURN( dev, filp );
+
+	DRM_COPY_FROM_USER_IOCTL( d, (drm_dma_t *) data, sizeof(d) );
+
+	/* Please don't send us buffers.
+	 */
+	if ( d.send_count != 0 ) {
+		DRM_ERROR( "Process %d trying to send %d buffers via drmDMA\n",
+			   DRM_CURRENTPID, d.send_count );
+		return DRM_ERR(EINVAL);
+	}
+
+	/* We'll send you buffers.
+	 */
+	if ( d.request_count < 0 || d.request_count > dma->buf_count ) {
+		DRM_ERROR( "Process %d trying to get %d buffers (of %d max)\n",
+			   DRM_CURRENTPID, d.request_count, dma->buf_count );
+		return DRM_ERR(EINVAL);
+	}
+
+	d.granted_count = 0;
+
+	if ( d.request_count ) {
+		ret = r128_cce_get_buffers( filp, dev, &d );
+	}
+
+	DRM_COPY_TO_USER_IOCTL((drm_dma_t *) data, d, sizeof(d) );
+
+	return ret;
+}
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/r128_drv.h b/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/r128_drv.h
new file mode 100644
index 000000000..bd913878c
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/r128_drv.h
@@ -0,0 +1,497 @@
+/* r128_drv.h -- Private header for r128 driver -*- linux-c -*-
+ * Created: Mon Dec 13 09:51:11 1999 by faith@precisioninsight.com
+ *
+ * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
+ * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
+ * All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ *    Rickard E. (Rik) Faith <faith@valinux.com>
+ *    Kevin E. Martin <martin@valinux.com>
+ *    Gareth Hughes <gareth@valinux.com>
+ *    Michel Dänzer <daenzerm@student.ethz.ch>
+ */
+
+#ifndef __R128_DRV_H__
+#define __R128_DRV_H__
+
+#define GET_RING_HEAD(ring)		DRM_READ32(  (ring)->ring_rptr, 0 ) /* (ring)->head */
+#define SET_RING_HEAD(ring,val)		DRM_WRITE32( (ring)->ring_rptr, 0, (val) ) /* (ring)->head */
+
+typedef struct drm_r128_freelist {
+   	unsigned int age;
+   	drm_buf_t *buf;
+   	struct drm_r128_freelist *next;
+   	struct drm_r128_freelist *prev;
+} drm_r128_freelist_t;
+
+typedef struct drm_r128_ring_buffer {
+	u32 *start;
+	u32 *end;
+	int size;
+	int size_l2qw;
+
+	volatile u32 *head;
+	u32 tail;
+	u32 tail_mask;
+	int space;
+
+	int high_mark;
+	drm_local_map_t *ring_rptr;
+} drm_r128_ring_buffer_t;
+
+typedef struct drm_r128_private {
+	drm_r128_ring_buffer_t ring;
+	drm_r128_sarea_t *sarea_priv;
+
+	int cce_mode;
+	int cce_fifo_size;
+	int cce_running;
+
+   	drm_r128_freelist_t *head;
+   	drm_r128_freelist_t *tail;
+
+	int usec_timeout;
+	int is_pci;
+	unsigned long phys_pci_gart;
+	dma_addr_t bus_pci_gart;
+	unsigned long cce_buffers_offset;
+
+	atomic_t idle_count;
+
+	int page_flipping;
+	int current_page;
+	u32 crtc_offset;
+	u32 crtc_offset_cntl;
+
+	u32 color_fmt;
+	unsigned int front_offset;
+	unsigned int front_pitch;
+	unsigned int back_offset;
+	unsigned int back_pitch;
+
+	u32 depth_fmt;
+	unsigned int depth_offset;
+	unsigned int depth_pitch;
+	unsigned int span_offset;
+
+	u32 front_pitch_offset_c;
+	u32 back_pitch_offset_c;
+	u32 depth_pitch_offset_c;
+	u32 span_pitch_offset_c;
+
+	drm_local_map_t *sarea;
+	drm_local_map_t *fb;
+	drm_local_map_t *mmio;
+	drm_local_map_t *cce_ring;
+	drm_local_map_t *ring_rptr;
+	drm_local_map_t *buffers;
+	drm_local_map_t *agp_textures;
+} drm_r128_private_t;
+
+typedef struct drm_r128_buf_priv {
+	u32 age;
+	int prim;
+	int discard;
+	int dispatched;
+   	drm_r128_freelist_t *list_entry;
+} drm_r128_buf_priv_t;
+
+				/* r128_cce.c */
+extern int r128_cce_init( DRM_IOCTL_ARGS );
+extern int r128_cce_start( DRM_IOCTL_ARGS );
+extern int r128_cce_stop( DRM_IOCTL_ARGS );
+extern int r128_cce_reset( DRM_IOCTL_ARGS );
+extern int r128_cce_idle( DRM_IOCTL_ARGS );
+extern int r128_engine_reset( DRM_IOCTL_ARGS );
+extern int r128_fullscreen( DRM_IOCTL_ARGS );
+extern int r128_cce_buffers( DRM_IOCTL_ARGS );
+extern int r128_getparam( DRM_IOCTL_ARGS );
+
+extern void r128_freelist_reset( drm_device_t *dev );
+extern drm_buf_t *r128_freelist_get( drm_device_t *dev );
+
+extern int r128_wait_ring( drm_r128_private_t *dev_priv, int n );
+
+static __inline__ void
+r128_update_ring_snapshot( drm_r128_ring_buffer_t *ring )
+{
+	ring->space = (GET_RING_HEAD( ring ) - ring->tail) * sizeof(u32);
+	if ( ring->space <= 0 )
+		ring->space += ring->size;
+}
+
+extern int r128_do_cce_idle( drm_r128_private_t *dev_priv );
+extern int r128_do_cleanup_cce( drm_device_t *dev );
+extern int r128_do_cleanup_pageflip( drm_device_t *dev );
+
+				/* r128_state.c */
+extern int r128_cce_clear( DRM_IOCTL_ARGS );
+extern int r128_cce_swap( DRM_IOCTL_ARGS );
+extern int r128_cce_vertex( DRM_IOCTL_ARGS );
+extern int r128_cce_indices( DRM_IOCTL_ARGS );
+extern int r128_cce_blit( DRM_IOCTL_ARGS );
+extern int r128_cce_depth( DRM_IOCTL_ARGS );
+extern int r128_cce_stipple( DRM_IOCTL_ARGS );
+extern int r128_cce_indirect( DRM_IOCTL_ARGS );
+
+
+/* Register definitions, register access macros and drmAddMap constants
+ * for Rage 128 kernel driver.
+ */
+
+#define R128_AUX_SC_CNTL		0x1660
+#	define R128_AUX1_SC_EN			(1 << 0)
+#	define R128_AUX1_SC_MODE_OR		(0 << 1)
+#	define R128_AUX1_SC_MODE_NAND		(1 << 1)
+#	define R128_AUX2_SC_EN			(1 << 2)
+#	define R128_AUX2_SC_MODE_OR		(0 << 3)
+#	define R128_AUX2_SC_MODE_NAND		(1 << 3)
+#	define R128_AUX3_SC_EN			(1 << 4)
+#	define R128_AUX3_SC_MODE_OR		(0 << 5)
+#	define R128_AUX3_SC_MODE_NAND		(1 << 5)
+#define R128_AUX1_SC_LEFT		0x1664
+#define R128_AUX1_SC_RIGHT		0x1668
+#define R128_AUX1_SC_TOP		0x166c
+#define R128_AUX1_SC_BOTTOM		0x1670
+#define R128_AUX2_SC_LEFT		0x1674
+#define R128_AUX2_SC_RIGHT		0x1678
+#define R128_AUX2_SC_TOP		0x167c
+#define R128_AUX2_SC_BOTTOM		0x1680
+#define R128_AUX3_SC_LEFT		0x1684
+#define R128_AUX3_SC_RIGHT		0x1688
+#define R128_AUX3_SC_TOP		0x168c
+#define R128_AUX3_SC_BOTTOM		0x1690
+
+#define R128_BRUSH_DATA0		0x1480
+#define R128_BUS_CNTL			0x0030
+#	define R128_BUS_MASTER_DIS		(1 << 6)
+
+#define R128_CLOCK_CNTL_INDEX		0x0008
+#define R128_CLOCK_CNTL_DATA		0x000c
+#	define R128_PLL_WR_EN			(1 << 7)
+#define R128_CONSTANT_COLOR_C		0x1d34
+#define R128_CRTC_OFFSET		0x0224
+#define R128_CRTC_OFFSET_CNTL		0x0228
+#	define R128_CRTC_OFFSET_FLIP_CNTL	(1 << 16)
+
+#define R128_DP_GUI_MASTER_CNTL		0x146c
+#       define R128_GMC_SRC_PITCH_OFFSET_CNTL	(1    <<  0)
+#       define R128_GMC_DST_PITCH_OFFSET_CNTL	(1    <<  1)
+#	define R128_GMC_BRUSH_SOLID_COLOR	(13   <<  4)
+#	define R128_GMC_BRUSH_NONE		(15   <<  4)
+#	define R128_GMC_DST_16BPP		(4    <<  8)
+#	define R128_GMC_DST_24BPP		(5    <<  8)
+#	define R128_GMC_DST_32BPP		(6    <<  8)
+#       define R128_GMC_DST_DATATYPE_SHIFT	8
+#	define R128_GMC_SRC_DATATYPE_COLOR	(3    << 12)
+#	define R128_DP_SRC_SOURCE_MEMORY	(2    << 24)
+#	define R128_DP_SRC_SOURCE_HOST_DATA	(3    << 24)
+#	define R128_GMC_CLR_CMP_CNTL_DIS	(1    << 28)
+#	define R128_GMC_AUX_CLIP_DIS		(1    << 29)
+#	define R128_GMC_WR_MSK_DIS		(1    << 30)
+#	define R128_ROP3_S			0x00cc0000
+#	define R128_ROP3_P			0x00f00000
+#define R128_DP_WRITE_MASK		0x16cc
+#define R128_DST_PITCH_OFFSET_C		0x1c80
+#	define R128_DST_TILE			(1 << 31)
+
+#define R128_GEN_INT_CNTL		0x0040
+#	define R128_CRTC_VBLANK_INT_EN		(1 <<  0)
+#define R128_GEN_INT_STATUS		0x0044
+#	define R128_CRTC_VBLANK_INT		(1 <<  0)
+#	define R128_CRTC_VBLANK_INT_AK		(1 <<  0)
+#define R128_GEN_RESET_CNTL		0x00f0
+#	define R128_SOFT_RESET_GUI		(1 <<  0)
+
+#define R128_GUI_SCRATCH_REG0		0x15e0
+#define R128_GUI_SCRATCH_REG1		0x15e4
+#define R128_GUI_SCRATCH_REG2		0x15e8
+#define R128_GUI_SCRATCH_REG3		0x15ec
+#define R128_GUI_SCRATCH_REG4		0x15f0
+#define R128_GUI_SCRATCH_REG5		0x15f4
+
+#define R128_GUI_STAT			0x1740
+#	define R128_GUI_FIFOCNT_MASK		0x0fff
+#	define R128_GUI_ACTIVE			(1 << 31)
+
+#define R128_MCLK_CNTL			0x000f
+#	define R128_FORCE_GCP			(1 << 16)
+#	define R128_FORCE_PIPE3D_CP		(1 << 17)
+#	define R128_FORCE_RCP			(1 << 18)
+
+#define R128_PC_GUI_CTLSTAT		0x1748
+#define R128_PC_NGUI_CTLSTAT		0x0184
+#	define R128_PC_FLUSH_GUI		(3 << 0)
+#	define R128_PC_RI_GUI			(1 << 2)
+#	define R128_PC_FLUSH_ALL		0x00ff
+#	define R128_PC_BUSY			(1 << 31)
+
+#define R128_PCI_GART_PAGE		0x017c
+#define R128_PRIM_TEX_CNTL_C		0x1cb0
+
+#define R128_SCALE_3D_CNTL		0x1a00
+#define R128_SEC_TEX_CNTL_C		0x1d00
+#define R128_SEC_TEXTURE_BORDER_COLOR_C	0x1d3c
+#define R128_SETUP_CNTL			0x1bc4
+#define R128_STEN_REF_MASK_C		0x1d40
+
+#define R128_TEX_CNTL_C			0x1c9c
+#	define R128_TEX_CACHE_FLUSH		(1 << 23)
+
+#define R128_WAIT_UNTIL			0x1720
+#	define R128_EVENT_CRTC_OFFSET		(1 << 0)
+#define R128_WINDOW_XY_OFFSET		0x1bcc
+
+
+/* CCE registers
+ */
+#define R128_PM4_BUFFER_OFFSET		0x0700
+#define R128_PM4_BUFFER_CNTL		0x0704
+#	define R128_PM4_MASK			(15 << 28)
+#	define R128_PM4_NONPM4			(0  << 28)
+#	define R128_PM4_192PIO			(1  << 28)
+#	define R128_PM4_192BM			(2  << 28)
+#	define R128_PM4_128PIO_64INDBM		(3  << 28)
+#	define R128_PM4_128BM_64INDBM		(4  << 28)
+#	define R128_PM4_64PIO_128INDBM		(5  << 28)
+#	define R128_PM4_64BM_128INDBM		(6  << 28)
+#	define R128_PM4_64PIO_64VCBM_64INDBM	(7  << 28)
+#	define R128_PM4_64BM_64VCBM_64INDBM	(8  << 28)
+#	define R128_PM4_64PIO_64VCPIO_64INDPIO	(15 << 28)
+
+#define R128_PM4_BUFFER_WM_CNTL		0x0708
+#	define R128_WMA_SHIFT			0
+#	define R128_WMB_SHIFT			8
+#	define R128_WMC_SHIFT			16
+#	define R128_WB_WM_SHIFT			24
+
+#define R128_PM4_BUFFER_DL_RPTR_ADDR	0x070c
+#define R128_PM4_BUFFER_DL_RPTR		0x0710
+#define R128_PM4_BUFFER_DL_WPTR		0x0714
+#	define R128_PM4_BUFFER_DL_DONE		(1 << 31)
+
+#define R128_PM4_VC_FPU_SETUP		0x071c
+
+#define R128_PM4_IW_INDOFF		0x0738
+#define R128_PM4_IW_INDSIZE		0x073c
+
+#define R128_PM4_STAT			0x07b8
+#	define R128_PM4_FIFOCNT_MASK		0x0fff
+#	define R128_PM4_BUSY			(1 << 16)
+#	define R128_PM4_GUI_ACTIVE		(1 << 31)
+
+#define R128_PM4_MICROCODE_ADDR		0x07d4
+#define R128_PM4_MICROCODE_RADDR	0x07d8
+#define R128_PM4_MICROCODE_DATAH	0x07dc
+#define R128_PM4_MICROCODE_DATAL	0x07e0
+
+#define R128_PM4_BUFFER_ADDR		0x07f0
+#define R128_PM4_MICRO_CNTL		0x07fc
+#	define R128_PM4_MICRO_FREERUN		(1 << 30)
+
+#define R128_PM4_FIFO_DATA_EVEN		0x1000
+#define R128_PM4_FIFO_DATA_ODD		0x1004
+
+
+/* CCE command packets
+ */
+#define R128_CCE_PACKET0		0x00000000
+#define R128_CCE_PACKET1		0x40000000
+#define R128_CCE_PACKET2		0x80000000
+#define R128_CCE_PACKET3		0xC0000000
+#	define R128_CNTL_HOSTDATA_BLT		0x00009400
+#	define R128_CNTL_PAINT_MULTI		0x00009A00
+#	define R128_CNTL_BITBLT_MULTI		0x00009B00
+#	define R128_3D_RNDR_GEN_INDX_PRIM	0x00002300
+
+#define R128_CCE_PACKET_MASK		0xC0000000
+#define R128_CCE_PACKET_COUNT_MASK	0x3fff0000
+#define R128_CCE_PACKET0_REG_MASK	0x000007ff
+#define R128_CCE_PACKET1_REG0_MASK	0x000007ff
+#define R128_CCE_PACKET1_REG1_MASK	0x003ff800
+
+#define R128_CCE_VC_CNTL_PRIM_TYPE_NONE		0x00000000
+#define R128_CCE_VC_CNTL_PRIM_TYPE_POINT	0x00000001
+#define R128_CCE_VC_CNTL_PRIM_TYPE_LINE		0x00000002
+#define R128_CCE_VC_CNTL_PRIM_TYPE_POLY_LINE	0x00000003
+#define R128_CCE_VC_CNTL_PRIM_TYPE_TRI_LIST	0x00000004
+#define R128_CCE_VC_CNTL_PRIM_TYPE_TRI_FAN	0x00000005
+#define R128_CCE_VC_CNTL_PRIM_TYPE_TRI_STRIP	0x00000006
+#define R128_CCE_VC_CNTL_PRIM_TYPE_TRI_TYPE2	0x00000007
+#define R128_CCE_VC_CNTL_PRIM_WALK_IND		0x00000010
+#define R128_CCE_VC_CNTL_PRIM_WALK_LIST		0x00000020
+#define R128_CCE_VC_CNTL_PRIM_WALK_RING		0x00000030
+#define R128_CCE_VC_CNTL_NUM_SHIFT		16
+
+#define R128_DATATYPE_CI8		2
+#define R128_DATATYPE_ARGB1555		3
+#define R128_DATATYPE_RGB565		4
+#define R128_DATATYPE_RGB888		5
+#define R128_DATATYPE_ARGB8888		6
+#define R128_DATATYPE_RGB332		7
+#define R128_DATATYPE_RGB8		9
+#define R128_DATATYPE_ARGB4444		15
+
+/* Constants */
+#define R128_AGP_OFFSET			0x02000000
+
+#define R128_WATERMARK_L		16
+#define R128_WATERMARK_M		8
+#define R128_WATERMARK_N		8
+#define R128_WATERMARK_K		128
+
+#define R128_MAX_USEC_TIMEOUT		100000	/* 100 ms */
+
+#define R128_LAST_FRAME_REG		R128_GUI_SCRATCH_REG0
+#define R128_LAST_DISPATCH_REG		R128_GUI_SCRATCH_REG1
+#define R128_MAX_VB_AGE			0x7fffffff
+#define R128_MAX_VB_VERTS		(0xffff)
+
+#define R128_RING_HIGH_MARK		128
+
+#define R128_PERFORMANCE_BOXES		0
+
+#define R128_READ(reg)		DRM_READ32(  dev_priv->mmio, (reg) )
+#define R128_WRITE(reg,val)	DRM_WRITE32( dev_priv->mmio, (reg), (val) )
+#define R128_READ8(reg)		DRM_READ8(   dev_priv->mmio, (reg) )
+#define R128_WRITE8(reg,val)	DRM_WRITE8(  dev_priv->mmio, (reg), (val) )
+
+#define R128_WRITE_PLL(addr,val)					\
+do {									\
+	R128_WRITE8(R128_CLOCK_CNTL_INDEX,				\
+		    ((addr) & 0x1f) | R128_PLL_WR_EN);			\
+	R128_WRITE(R128_CLOCK_CNTL_DATA, (val));			\
+} while (0)
+
+extern int R128_READ_PLL(drm_device_t *dev, int addr);
+
+
+#define CCE_PACKET0( reg, n )		(R128_CCE_PACKET0 |		\
+					 ((n) << 16) | ((reg) >> 2))
+#define CCE_PACKET1( reg0, reg1 )	(R128_CCE_PACKET1 |		\
+					 (((reg1) >> 2) << 11) | ((reg0) >> 2))
+#define CCE_PACKET2()			(R128_CCE_PACKET2)
+#define CCE_PACKET3( pkt, n )		(R128_CCE_PACKET3 |		\
+					 (pkt) | ((n) << 16))
+
+
+/* ================================================================
+ * Misc helper macros
+ */
+
+#define RING_SPACE_TEST_WITH_RETURN( dev_priv )				\
+do {									\
+	drm_r128_ring_buffer_t *ring = &dev_priv->ring; int i;		\
+	if ( ring->space < ring->high_mark ) {				\
+		for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) {	\
+			r128_update_ring_snapshot( ring );		\
+			if ( ring->space >= ring->high_mark )		\
+				goto __ring_space_done;			\
+			DRM_UDELAY(1);				\
+		}							\
+		DRM_ERROR( "ring space check failed!\n" );		\
+		return DRM_ERR(EBUSY);				\
+	}								\
+ __ring_space_done:							\
+	;								\
+} while (0)
+
+#define VB_AGE_TEST_WITH_RETURN( dev_priv )				\
+do {									\
+	drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;		\
+	if ( sarea_priv->last_dispatch >= R128_MAX_VB_AGE ) {		\
+		int __ret = r128_do_cce_idle( dev_priv );		\
+		if ( __ret ) return __ret;				\
+		sarea_priv->last_dispatch = 0;				\
+		r128_freelist_reset( dev );				\
+	}								\
+} while (0)
+
+#define R128_WAIT_UNTIL_PAGE_FLIPPED() do {				\
+	OUT_RING( CCE_PACKET0( R128_WAIT_UNTIL, 0 ) );			\
+	OUT_RING( R128_EVENT_CRTC_OFFSET );				\
+} while (0)
+
+
+/* ================================================================
+ * Ring control
+ */
+
+#if defined(__powerpc__)
+#define r128_flush_write_combine()	(void) GET_RING_HEAD( &dev_priv->ring )
+#else
+#define r128_flush_write_combine()	DRM_WRITEMEMORYBARRIER(dev_priv->ring_rptr)
+#endif
+
+
+#define R128_VERBOSE	0
+
+#define RING_LOCALS							\
+	int write; unsigned int tail_mask; volatile u32 *ring;
+
+#define BEGIN_RING( n ) do {						\
+	if ( R128_VERBOSE ) {						\
+		DRM_INFO( "BEGIN_RING( %d ) in %s\n",			\
+			   (n), __FUNCTION__ );				\
+	}								\
+	if ( dev_priv->ring.space <= (n) * sizeof(u32) ) {		\
+		r128_wait_ring( dev_priv, (n) * sizeof(u32) );		\
+	}								\
+	dev_priv->ring.space -= (n) * sizeof(u32);			\
+	ring = dev_priv->ring.start;					\
+	write = dev_priv->ring.tail;					\
+	tail_mask = dev_priv->ring.tail_mask;				\
+} while (0)
+
+/* You can set this to zero if you want.  If the card locks up, you'll
+ * need to keep this set.  It works around a bug in early revs of the
+ * Rage 128 chipset, where the CCE would read 32 dwords past the end of
+ * the ring buffer before wrapping around.
+ */
+#define R128_BROKEN_CCE	1
+
+#define ADVANCE_RING() do {						\
+	if ( R128_VERBOSE ) {						\
+		DRM_INFO( "ADVANCE_RING() wr=0x%06x tail=0x%06x\n",	\
+			  write, dev_priv->ring.tail );			\
+	}								\
+	if ( R128_BROKEN_CCE && write < 32 ) {				\
+		memcpy( dev_priv->ring.end,				\
+			dev_priv->ring.start,				\
+			write * sizeof(u32) );				\
+	}								\
+	r128_flush_write_combine();					\
+	dev_priv->ring.tail = write;					\
+	R128_WRITE( R128_PM4_BUFFER_DL_WPTR, write );			\
+} while (0)
+
+#define OUT_RING( x ) do {						\
+	if ( R128_VERBOSE ) {						\
+		DRM_INFO( "   OUT_RING( 0x%08x ) at 0x%x\n",		\
+			   (unsigned int)(x), write );			\
+	}								\
+	ring[write++] = cpu_to_le32( x );				\
+	write &= tail_mask;						\
+} while (0)
+
+#endif /* __R128_DRV_H__ */
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/r128_state.c b/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/r128_state.c
new file mode 100644
index 000000000..8b9e97cff
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/r128_state.c
@@ -0,0 +1,1604 @@
+/* r128_state.c -- State support for r128 -*- linux-c -*-
+ * Created: Thu Jan 27 02:53:43 2000 by gareth@valinux.com
+ *
+ * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ *    Gareth Hughes <gareth@valinux.com>
+ */
+
+#include "r128.h"
+#include "drmP.h"
+#include "drm.h"
+#include "r128_drm.h"
+#include "r128_drv.h"
+
+
+/* ================================================================
+ * CCE hardware state programming functions
+ */
+
+static void r128_emit_clip_rects( drm_r128_private_t *dev_priv,
+				  drm_clip_rect_t *boxes, int count )
+{
+	u32 aux_sc_cntl = 0x00000000;
+	RING_LOCALS;
+	DRM_DEBUG( "    %s\n", __FUNCTION__ );
+
+	BEGIN_RING( 17 );
+
+	if ( count >= 1 ) {
+		OUT_RING( CCE_PACKET0( R128_AUX1_SC_LEFT, 3 ) );
+		OUT_RING( boxes[0].x1 );
+		OUT_RING( boxes[0].x2 - 1 );
+		OUT_RING( boxes[0].y1 );
+		OUT_RING( boxes[0].y2 - 1 );
+
+		aux_sc_cntl |= (R128_AUX1_SC_EN | R128_AUX1_SC_MODE_OR);
+	}
+	if ( count >= 2 ) {
+		OUT_RING( CCE_PACKET0( R128_AUX2_SC_LEFT, 3 ) );
+		OUT_RING( boxes[1].x1 );
+		OUT_RING( boxes[1].x2 - 1 );
+		OUT_RING( boxes[1].y1 );
+		OUT_RING( boxes[1].y2 - 1 );
+
+		aux_sc_cntl |= (R128_AUX2_SC_EN | R128_AUX2_SC_MODE_OR);
+	}
+	if ( count >= 3 ) {
+		OUT_RING( CCE_PACKET0( R128_AUX3_SC_LEFT, 3 ) );
+		OUT_RING( boxes[2].x1 );
+		OUT_RING( boxes[2].x2 - 1 );
+		OUT_RING( boxes[2].y1 );
+		OUT_RING( boxes[2].y2 - 1 );
+
+		aux_sc_cntl |= (R128_AUX3_SC_EN | R128_AUX3_SC_MODE_OR);
+	}
+
+	OUT_RING( CCE_PACKET0( R128_AUX_SC_CNTL, 0 ) );
+	OUT_RING( aux_sc_cntl );
+
+	ADVANCE_RING();
+}
+
+static __inline__ void r128_emit_core( drm_r128_private_t *dev_priv )
+{
+	drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
+	drm_r128_context_regs_t *ctx = &sarea_priv->context_state;
+	RING_LOCALS;
+	DRM_DEBUG( "    %s\n", __FUNCTION__ );
+
+	BEGIN_RING( 2 );
+
+	OUT_RING( CCE_PACKET0( R128_SCALE_3D_CNTL, 0 ) );
+	OUT_RING( ctx->scale_3d_cntl );
+
+	ADVANCE_RING();
+}
+
+static __inline__ void r128_emit_context( drm_r128_private_t *dev_priv )
+{
+	drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
+	drm_r128_context_regs_t *ctx = &sarea_priv->context_state;
+	RING_LOCALS;
+	DRM_DEBUG( "    %s\n", __FUNCTION__ );
+
+	BEGIN_RING( 13 );
+
+	OUT_RING( CCE_PACKET0( R128_DST_PITCH_OFFSET_C, 11 ) );
+	OUT_RING( ctx->dst_pitch_offset_c );
+	OUT_RING( ctx->dp_gui_master_cntl_c );
+	OUT_RING( ctx->sc_top_left_c );
+	OUT_RING( ctx->sc_bottom_right_c );
+	OUT_RING( ctx->z_offset_c );
+	OUT_RING( ctx->z_pitch_c );
+	OUT_RING( ctx->z_sten_cntl_c );
+	OUT_RING( ctx->tex_cntl_c );
+	OUT_RING( ctx->misc_3d_state_cntl_reg );
+	OUT_RING( ctx->texture_clr_cmp_clr_c );
+	OUT_RING( ctx->texture_clr_cmp_msk_c );
+	OUT_RING( ctx->fog_color_c );
+
+	ADVANCE_RING();
+}
+
+static __inline__ void r128_emit_setup( drm_r128_private_t *dev_priv )
+{
+	drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
+	drm_r128_context_regs_t *ctx = &sarea_priv->context_state;
+	RING_LOCALS;
+	DRM_DEBUG( "    %s\n", __FUNCTION__ );
+
+	BEGIN_RING( 3 );
+
+	OUT_RING( CCE_PACKET1( R128_SETUP_CNTL, R128_PM4_VC_FPU_SETUP ) );
+	OUT_RING( ctx->setup_cntl );
+	OUT_RING( ctx->pm4_vc_fpu_setup );
+
+	ADVANCE_RING();
+}
+
+static __inline__ void r128_emit_masks( drm_r128_private_t *dev_priv )
+{
+	drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
+	drm_r128_context_regs_t *ctx = &sarea_priv->context_state;
+	RING_LOCALS;
+	DRM_DEBUG( "    %s\n", __FUNCTION__ );
+
+	BEGIN_RING( 5 );
+
+	OUT_RING( CCE_PACKET0( R128_DP_WRITE_MASK, 0 ) );
+	OUT_RING( ctx->dp_write_mask );
+
+	OUT_RING( CCE_PACKET0( R128_STEN_REF_MASK_C, 1 ) );
+	OUT_RING( ctx->sten_ref_mask_c );
+	OUT_RING( ctx->plane_3d_mask_c );
+
+	ADVANCE_RING();
+}
+
+static __inline__ void r128_emit_window( drm_r128_private_t *dev_priv )
+{
+	drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
+	drm_r128_context_regs_t *ctx = &sarea_priv->context_state;
+	RING_LOCALS;
+	DRM_DEBUG( "    %s\n", __FUNCTION__ );
+
+	BEGIN_RING( 2 );
+
+	OUT_RING( CCE_PACKET0( R128_WINDOW_XY_OFFSET, 0 ) );
+	OUT_RING( ctx->window_xy_offset );
+
+	ADVANCE_RING();
+}
+
+static __inline__ void r128_emit_tex0( drm_r128_private_t *dev_priv )
+{
+	drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
+	drm_r128_context_regs_t *ctx = &sarea_priv->context_state;
+	drm_r128_texture_regs_t *tex = &sarea_priv->tex_state[0];
+	int i;
+	RING_LOCALS;
+	DRM_DEBUG( "    %s\n", __FUNCTION__ );
+
+	BEGIN_RING( 7 + R128_MAX_TEXTURE_LEVELS );
+
+	OUT_RING( CCE_PACKET0( R128_PRIM_TEX_CNTL_C,
+			       2 + R128_MAX_TEXTURE_LEVELS ) );
+	OUT_RING( tex->tex_cntl );
+	OUT_RING( tex->tex_combine_cntl );
+	OUT_RING( ctx->tex_size_pitch_c );
+	for ( i = 0 ; i < R128_MAX_TEXTURE_LEVELS ; i++ ) {
+		OUT_RING( tex->tex_offset[i] );
+	}
+
+	OUT_RING( CCE_PACKET0( R128_CONSTANT_COLOR_C, 1 ) );
+	OUT_RING( ctx->constant_color_c );
+	OUT_RING( tex->tex_border_color );
+
+	ADVANCE_RING();
+}
+
+static __inline__ void r128_emit_tex1( drm_r128_private_t *dev_priv )
+{
+	drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
+	drm_r128_texture_regs_t *tex = &sarea_priv->tex_state[1];
+	int i;
+	RING_LOCALS;
+	DRM_DEBUG( "    %s\n", __FUNCTION__ );
+
+	BEGIN_RING( 5 + R128_MAX_TEXTURE_LEVELS );
+
+	OUT_RING( CCE_PACKET0( R128_SEC_TEX_CNTL_C,
+			       1 + R128_MAX_TEXTURE_LEVELS ) );
+	OUT_RING( tex->tex_cntl );
+	OUT_RING( tex->tex_combine_cntl );
+	for ( i = 0 ; i < R128_MAX_TEXTURE_LEVELS ; i++ ) {
+		OUT_RING( tex->tex_offset[i] );
+	}
+
+	OUT_RING( CCE_PACKET0( R128_SEC_TEXTURE_BORDER_COLOR_C, 0 ) );
+	OUT_RING( tex->tex_border_color );
+
+	ADVANCE_RING();
+}
+
+static __inline__ void r128_emit_state( drm_r128_private_t *dev_priv )
+{
+	drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
+	unsigned int dirty = sarea_priv->dirty;
+
+	DRM_DEBUG( "%s: dirty=0x%08x\n", __FUNCTION__, dirty );
+
+	if ( dirty & R128_UPLOAD_CORE ) {
+		r128_emit_core( dev_priv );
+		sarea_priv->dirty &= ~R128_UPLOAD_CORE;
+	}
+
+	if ( dirty & R128_UPLOAD_CONTEXT ) {
+		r128_emit_context( dev_priv );
+		sarea_priv->dirty &= ~R128_UPLOAD_CONTEXT;
+	}
+
+	if ( dirty & R128_UPLOAD_SETUP ) {
+		r128_emit_setup( dev_priv );
+		sarea_priv->dirty &= ~R128_UPLOAD_SETUP;
+	}
+
+	if ( dirty & R128_UPLOAD_MASKS ) {
+		r128_emit_masks( dev_priv );
+		sarea_priv->dirty &= ~R128_UPLOAD_MASKS;
+	}
+
+	if ( dirty & R128_UPLOAD_WINDOW ) {
+		r128_emit_window( dev_priv );
+		sarea_priv->dirty &= ~R128_UPLOAD_WINDOW;
+	}
+
+	if ( dirty & R128_UPLOAD_TEX0 ) {
+		r128_emit_tex0( dev_priv );
+		sarea_priv->dirty &= ~R128_UPLOAD_TEX0;
+	}
+
+	if ( dirty & R128_UPLOAD_TEX1 ) {
+		r128_emit_tex1( dev_priv );
+		sarea_priv->dirty &= ~R128_UPLOAD_TEX1;
+	}
+
+	/* Turn off the texture cache flushing */
+	sarea_priv->context_state.tex_cntl_c &= ~R128_TEX_CACHE_FLUSH;
+
+	sarea_priv->dirty &= ~R128_REQUIRE_QUIESCENCE;
+}
+
+
+#if R128_PERFORMANCE_BOXES
+/* ================================================================
+ * Performance monitoring functions
+ */
+
+static void r128_clear_box( drm_r128_private_t *dev_priv,
+			    int x, int y, int w, int h,
+			    int r, int g, int b )
+{
+	u32 pitch, offset;
+	u32 fb_bpp, color;
+	RING_LOCALS;
+
+	switch ( dev_priv->fb_bpp ) {
+	case 16:
+		fb_bpp = R128_GMC_DST_16BPP;
+		color = (((r & 0xf8) << 8) |
+			 ((g & 0xfc) << 3) |
+			 ((b & 0xf8) >> 3));
+		break;
+	case 24:
+		fb_bpp = R128_GMC_DST_24BPP;
+		color = ((r << 16) | (g << 8) | b);
+		break;
+	case 32:
+		fb_bpp = R128_GMC_DST_32BPP;
+		color = (((0xff) << 24) | (r << 16) | (g <<  8) | b);
+		break;
+	default:
+		return;
+	}
+
+	offset = dev_priv->back_offset;
+	pitch = dev_priv->back_pitch >> 3;
+
+	BEGIN_RING( 6 );
+
+	OUT_RING( CCE_PACKET3( R128_CNTL_PAINT_MULTI, 4 ) );
+	OUT_RING( R128_GMC_DST_PITCH_OFFSET_CNTL |
+		  R128_GMC_BRUSH_SOLID_COLOR |
+		  fb_bpp |
+		  R128_GMC_SRC_DATATYPE_COLOR |
+		  R128_ROP3_P |
+		  R128_GMC_CLR_CMP_CNTL_DIS |
+		  R128_GMC_AUX_CLIP_DIS );
+
+	OUT_RING( (pitch << 21) | (offset >> 5) );
+	OUT_RING( color );
+
+	OUT_RING( (x << 16) | y );
+	OUT_RING( (w << 16) | h );
+
+	ADVANCE_RING();
+}
+
+static void r128_cce_performance_boxes( drm_r128_private_t *dev_priv )
+{
+	if ( atomic_read( &dev_priv->idle_count ) == 0 ) {
+		r128_clear_box( dev_priv, 64, 4, 8, 8, 0, 255, 0 );
+	} else {
+		atomic_set( &dev_priv->idle_count, 0 );
+	}
+}
+
+#endif
+
+
+/* ================================================================
+ * CCE command dispatch functions
+ */
+
+static void r128_print_dirty( const char *msg, unsigned int flags )
+{
+	DRM_INFO( "%s: (0x%x) %s%s%s%s%s%s%s%s%s\n",
+		  msg,
+		  flags,
+		  (flags & R128_UPLOAD_CORE)        ? "core, " : "",
+		  (flags & R128_UPLOAD_CONTEXT)     ? "context, " : "",
+		  (flags & R128_UPLOAD_SETUP)       ? "setup, " : "",
+		  (flags & R128_UPLOAD_TEX0)        ? "tex0, " : "",
+		  (flags & R128_UPLOAD_TEX1)        ? "tex1, " : "",
+		  (flags & R128_UPLOAD_MASKS)       ? "masks, " : "",
+		  (flags & R128_UPLOAD_WINDOW)      ? "window, " : "",
+		  (flags & R128_UPLOAD_CLIPRECTS)   ? "cliprects, " : "",
+		  (flags & R128_REQUIRE_QUIESCENCE) ? "quiescence, " : "" );
+}
+
+static void r128_cce_dispatch_clear( drm_device_t *dev,
+				     drm_r128_clear_t *clear )
+{
+	drm_r128_private_t *dev_priv = dev->dev_private;
+	drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
+	int nbox = sarea_priv->nbox;
+	drm_clip_rect_t *pbox = sarea_priv->boxes;
+	unsigned int flags = clear->flags;
+	int i;
+	RING_LOCALS;
+	DRM_DEBUG( "%s\n", __FUNCTION__ );
+
+	if ( dev_priv->page_flipping && dev_priv->current_page == 1 ) {
+		unsigned int tmp = flags;
+
+		flags &= ~(R128_FRONT | R128_BACK);
+		if ( tmp & R128_FRONT ) flags |= R128_BACK;
+		if ( tmp & R128_BACK )  flags |= R128_FRONT;
+	}
+
+	for ( i = 0 ; i < nbox ; i++ ) {
+		int x = pbox[i].x1;
+		int y = pbox[i].y1;
+		int w = pbox[i].x2 - x;
+		int h = pbox[i].y2 - y;
+
+		DRM_DEBUG( "dispatch clear %d,%d-%d,%d flags 0x%x\n",
+			   pbox[i].x1, pbox[i].y1, pbox[i].x2,
+			   pbox[i].y2, flags );
+
+		if ( flags & (R128_FRONT | R128_BACK) ) {
+			BEGIN_RING( 2 );
+
+			OUT_RING( CCE_PACKET0( R128_DP_WRITE_MASK, 0 ) );
+			OUT_RING( clear->color_mask );
+
+			ADVANCE_RING();
+		}
+
+		if ( flags & R128_FRONT ) {
+			BEGIN_RING( 6 );
+
+			OUT_RING( CCE_PACKET3( R128_CNTL_PAINT_MULTI, 4 ) );
+			OUT_RING( R128_GMC_DST_PITCH_OFFSET_CNTL |
+				  R128_GMC_BRUSH_SOLID_COLOR |
+				  (dev_priv->color_fmt << 8) |
+				  R128_GMC_SRC_DATATYPE_COLOR |
+				  R128_ROP3_P |
+				  R128_GMC_CLR_CMP_CNTL_DIS |
+				  R128_GMC_AUX_CLIP_DIS );
+
+			OUT_RING( dev_priv->front_pitch_offset_c );
+			OUT_RING( clear->clear_color );
+
+			OUT_RING( (x << 16) | y );
+			OUT_RING( (w << 16) | h );
+
+			ADVANCE_RING();
+		}
+
+		if ( flags & R128_BACK ) {
+			BEGIN_RING( 6 );
+
+			OUT_RING( CCE_PACKET3( R128_CNTL_PAINT_MULTI, 4 ) );
+			OUT_RING( R128_GMC_DST_PITCH_OFFSET_CNTL |
+				  R128_GMC_BRUSH_SOLID_COLOR |
+				  (dev_priv->color_fmt << 8) |
+				  R128_GMC_SRC_DATATYPE_COLOR |
+				  R128_ROP3_P |
+				  R128_GMC_CLR_CMP_CNTL_DIS |
+				  R128_GMC_AUX_CLIP_DIS );
+
+			OUT_RING( dev_priv->back_pitch_offset_c );
+			OUT_RING( clear->clear_color );
+
+			OUT_RING( (x << 16) | y );
+			OUT_RING( (w << 16) | h );
+
+			ADVANCE_RING();
+		}
+
+		if ( flags & R128_DEPTH ) {
+			BEGIN_RING( 6 );
+
+			OUT_RING( CCE_PACKET3( R128_CNTL_PAINT_MULTI, 4 ) );
+			OUT_RING( R128_GMC_DST_PITCH_OFFSET_CNTL |
+				  R128_GMC_BRUSH_SOLID_COLOR |
+				  (dev_priv->depth_fmt << 8) |
+				  R128_GMC_SRC_DATATYPE_COLOR |
+				  R128_ROP3_P |
+				  R128_GMC_CLR_CMP_CNTL_DIS |
+				  R128_GMC_AUX_CLIP_DIS |
+				  R128_GMC_WR_MSK_DIS );
+
+			OUT_RING( dev_priv->depth_pitch_offset_c );
+			OUT_RING( clear->clear_depth );
+
+			OUT_RING( (x << 16) | y );
+			OUT_RING( (w << 16) | h );
+
+			ADVANCE_RING();
+		}
+	}
+}
+
+static void r128_cce_dispatch_swap( drm_device_t *dev )
+{
+	drm_r128_private_t *dev_priv = dev->dev_private;
+	drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
+	int nbox = sarea_priv->nbox;
+	drm_clip_rect_t *pbox = sarea_priv->boxes;
+	int i;
+	RING_LOCALS;
+	DRM_DEBUG( "%s\n", __FUNCTION__ );
+
+#if R128_PERFORMANCE_BOXES
+	/* Do some trivial performance monitoring...
+	 */
+	r128_cce_performance_boxes( dev_priv );
+#endif
+
+	for ( i = 0 ; i < nbox ; i++ ) {
+		int x = pbox[i].x1;
+		int y = pbox[i].y1;
+		int w = pbox[i].x2 - x;
+		int h = pbox[i].y2 - y;
+
+		BEGIN_RING( 7 );
+
+		OUT_RING( CCE_PACKET3( R128_CNTL_BITBLT_MULTI, 5 ) );
+		OUT_RING( R128_GMC_SRC_PITCH_OFFSET_CNTL |
+			  R128_GMC_DST_PITCH_OFFSET_CNTL |
+			  R128_GMC_BRUSH_NONE |
+			  (dev_priv->color_fmt << 8) |
+			  R128_GMC_SRC_DATATYPE_COLOR |
+			  R128_ROP3_S |
+			  R128_DP_SRC_SOURCE_MEMORY |
+			  R128_GMC_CLR_CMP_CNTL_DIS |
+			  R128_GMC_AUX_CLIP_DIS |
+			  R128_GMC_WR_MSK_DIS );
+
+		OUT_RING( dev_priv->back_pitch_offset_c );
+		OUT_RING( dev_priv->front_pitch_offset_c );
+
+		OUT_RING( (x << 16) | y );
+		OUT_RING( (x << 16) | y );
+		OUT_RING( (w << 16) | h );
+
+		ADVANCE_RING();
+	}
+
+	/* Increment the frame counter.  The client-side 3D driver must
+	 * throttle the framerate by waiting for this value before
+	 * performing the swapbuffer ioctl.
+	 */
+	dev_priv->sarea_priv->last_frame++;
+
+	BEGIN_RING( 2 );
+
+	OUT_RING( CCE_PACKET0( R128_LAST_FRAME_REG, 0 ) );
+	OUT_RING( dev_priv->sarea_priv->last_frame );
+
+	ADVANCE_RING();
+}
+
+static void r128_cce_dispatch_flip( drm_device_t *dev )
+{
+	drm_r128_private_t *dev_priv = dev->dev_private;
+	RING_LOCALS;
+	DRM_DEBUG( "page=%d\n", dev_priv->current_page );
+
+#if R128_PERFORMANCE_BOXES
+	/* Do some trivial performance monitoring...
+	 */
+	r128_cce_performance_boxes( dev_priv );
+#endif
+
+	BEGIN_RING( 4 );
+
+	R128_WAIT_UNTIL_PAGE_FLIPPED();
+	OUT_RING( CCE_PACKET0( R128_CRTC_OFFSET, 0 ) );
+
+	if ( dev_priv->current_page == 0 ) {
+		OUT_RING( dev_priv->back_offset );
+		dev_priv->current_page = 1;
+	} else {
+		OUT_RING( dev_priv->front_offset );
+		dev_priv->current_page = 0;
+	}
+
+	ADVANCE_RING();
+
+	/* Increment the frame counter.  The client-side 3D driver must
+	 * throttle the framerate by waiting for this value before
+	 * performing the swapbuffer ioctl.
+	 */
+	dev_priv->sarea_priv->last_frame++;
+
+	BEGIN_RING( 2 );
+
+	OUT_RING( CCE_PACKET0( R128_LAST_FRAME_REG, 0 ) );
+	OUT_RING( dev_priv->sarea_priv->last_frame );
+
+	ADVANCE_RING();
+}
+
+static void r128_cce_dispatch_vertex( drm_device_t *dev,
+				      drm_buf_t *buf )
+{
+	drm_r128_private_t *dev_priv = dev->dev_private;
+	drm_r128_buf_priv_t *buf_priv = buf->dev_private;
+	drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
+	int format = sarea_priv->vc_format;
+	int offset = buf->bus_address;
+	int size = buf->used;
+	int prim = buf_priv->prim;
+	int i = 0;
+	RING_LOCALS;
+	DRM_DEBUG( "buf=%d nbox=%d\n", buf->idx, sarea_priv->nbox );
+
+	if ( 0 )
+		r128_print_dirty( "dispatch_vertex", sarea_priv->dirty );
+
+	if ( buf->used ) {
+		buf_priv->dispatched = 1;
+
+		if ( sarea_priv->dirty & ~R128_UPLOAD_CLIPRECTS ) {
+			r128_emit_state( dev_priv );
+		}
+
+		do {
+			/* Emit the next set of up to three cliprects */
+			if ( i < sarea_priv->nbox ) {
+				r128_emit_clip_rects( dev_priv,
+						      &sarea_priv->boxes[i],
+						      sarea_priv->nbox - i );
+			}
+
+			/* Emit the vertex buffer rendering commands */
+			BEGIN_RING( 5 );
+
+			OUT_RING( CCE_PACKET3( R128_3D_RNDR_GEN_INDX_PRIM, 3 ) );
+			OUT_RING( offset );
+			OUT_RING( size );
+			OUT_RING( format );
+			OUT_RING( prim | R128_CCE_VC_CNTL_PRIM_WALK_LIST |
+				  (size << R128_CCE_VC_CNTL_NUM_SHIFT) );
+
+			ADVANCE_RING();
+
+			i += 3;
+		} while ( i < sarea_priv->nbox );
+	}
+
+	if ( buf_priv->discard ) {
+		buf_priv->age = dev_priv->sarea_priv->last_dispatch;
+
+		/* Emit the vertex buffer age */
+		BEGIN_RING( 2 );
+
+		OUT_RING( CCE_PACKET0( R128_LAST_DISPATCH_REG, 0 ) );
+		OUT_RING( buf_priv->age );
+
+		ADVANCE_RING();
+
+		buf->pending = 1;
+		buf->used = 0;
+		/* FIXME: Check dispatched field */
+		buf_priv->dispatched = 0;
+	}
+
+	dev_priv->sarea_priv->last_dispatch++;
+
+	sarea_priv->dirty &= ~R128_UPLOAD_CLIPRECTS;
+	sarea_priv->nbox = 0;
+}
+
+static void r128_cce_dispatch_indirect( drm_device_t *dev,
+					drm_buf_t *buf,
+					int start, int end )
+{
+	drm_r128_private_t *dev_priv = dev->dev_private;
+	drm_r128_buf_priv_t *buf_priv = buf->dev_private;
+	RING_LOCALS;
+	DRM_DEBUG( "indirect: buf=%d s=0x%x e=0x%x\n",
+		   buf->idx, start, end );
+
+	if ( start != end ) {
+		int offset = buf->bus_address + start;
+		int dwords = (end - start + 3) / sizeof(u32);
+
+		/* Indirect buffer data must be an even number of
+		 * dwords, so if we've been given an odd number we must
+		 * pad the data with a Type-2 CCE packet.
+		 */
+		if ( dwords & 1 ) {
+			u32 *data = (u32 *)
+				((char *)dev_priv->buffers->handle
+				 + buf->offset + start);
+			data[dwords++] = cpu_to_le32( R128_CCE_PACKET2 );
+		}
+
+		buf_priv->dispatched = 1;
+
+		/* Fire off the indirect buffer */
+		BEGIN_RING( 3 );
+
+		OUT_RING( CCE_PACKET0( R128_PM4_IW_INDOFF, 1 ) );
+		OUT_RING( offset );
+		OUT_RING( dwords );
+
+		ADVANCE_RING();
+	}
+
+	if ( buf_priv->discard ) {
+		buf_priv->age = dev_priv->sarea_priv->last_dispatch;
+
+		/* Emit the indirect buffer age */
+		BEGIN_RING( 2 );
+
+		OUT_RING( CCE_PACKET0( R128_LAST_DISPATCH_REG, 0 ) );
+		OUT_RING( buf_priv->age );
+
+		ADVANCE_RING();
+
+		buf->pending = 1;
+		buf->used = 0;
+		/* FIXME: Check dispatched field */
+		buf_priv->dispatched = 0;
+	}
+
+	dev_priv->sarea_priv->last_dispatch++;
+}
+
+static void r128_cce_dispatch_indices( drm_device_t *dev,
+				       drm_buf_t *buf,
+				       int start, int end,
+				       int count )
+{
+	drm_r128_private_t *dev_priv = dev->dev_private;
+	drm_r128_buf_priv_t *buf_priv = buf->dev_private;
+	drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
+	int format = sarea_priv->vc_format;
+	int offset = dev_priv->buffers->offset - dev_priv->cce_buffers_offset;
+	int prim = buf_priv->prim;
+	u32 *data;
+	int dwords;
+	int i = 0;
+	RING_LOCALS;
+	DRM_DEBUG( "indices: s=%d e=%d c=%d\n", start, end, count );
+
+	if ( 0 )
+		r128_print_dirty( "dispatch_indices", sarea_priv->dirty );
+
+	if ( start != end ) {
+		buf_priv->dispatched = 1;
+
+		if ( sarea_priv->dirty & ~R128_UPLOAD_CLIPRECTS ) {
+			r128_emit_state( dev_priv );
+		}
+
+		dwords = (end - start + 3) / sizeof(u32);
+
+		data = (u32 *)((char *)dev_priv->buffers->handle
+			       + buf->offset + start);
+
+		data[0] = cpu_to_le32( CCE_PACKET3( R128_3D_RNDR_GEN_INDX_PRIM,
+						    dwords-2 ) );
+
+		data[1] = cpu_to_le32( offset );
+		data[2] = cpu_to_le32( R128_MAX_VB_VERTS );
+		data[3] = cpu_to_le32( format );
+		data[4] = cpu_to_le32( (prim | R128_CCE_VC_CNTL_PRIM_WALK_IND |
+					(count << 16)) );
+
+		if ( count & 0x1 ) {
+#ifdef __LITTLE_ENDIAN
+			data[dwords-1] &= 0x0000ffff;
+#else
+			data[dwords-1] &= 0xffff0000;
+#endif
+		}
+
+		do {
+			/* Emit the next set of up to three cliprects */
+			if ( i < sarea_priv->nbox ) {
+				r128_emit_clip_rects( dev_priv,
+						      &sarea_priv->boxes[i],
+						      sarea_priv->nbox - i );
+			}
+
+			r128_cce_dispatch_indirect( dev, buf, start, end );
+
+			i += 3;
+		} while ( i < sarea_priv->nbox );
+	}
+
+	if ( buf_priv->discard ) {
+		buf_priv->age = dev_priv->sarea_priv->last_dispatch;
+
+		/* Emit the vertex buffer age */
+		BEGIN_RING( 2 );
+
+		OUT_RING( CCE_PACKET0( R128_LAST_DISPATCH_REG, 0 ) );
+		OUT_RING( buf_priv->age );
+
+		ADVANCE_RING();
+
+		buf->pending = 1;
+		/* FIXME: Check dispatched field */
+		buf_priv->dispatched = 0;
+	}
+
+	dev_priv->sarea_priv->last_dispatch++;
+
+	sarea_priv->dirty &= ~R128_UPLOAD_CLIPRECTS;
+	sarea_priv->nbox = 0;
+}
+
+static int r128_cce_dispatch_blit( DRMFILE filp,
+				   drm_device_t *dev,
+				   drm_r128_blit_t *blit )
+{
+	drm_r128_private_t *dev_priv = dev->dev_private;
+	drm_device_dma_t *dma = dev->dma;
+	drm_buf_t *buf;
+	drm_r128_buf_priv_t *buf_priv;
+	u32 *data;
+	int dword_shift, dwords;
+	RING_LOCALS;
+	DRM_DEBUG( "\n" );
+
+	/* The compiler won't optimize away a division by a variable,
+	 * even if the only legal values are powers of two.  Thus, we'll
+	 * use a shift instead.
+	 */
+	switch ( blit->format ) {
+	case R128_DATATYPE_ARGB8888:
+		dword_shift = 0;
+		break;
+	case R128_DATATYPE_ARGB1555:
+	case R128_DATATYPE_RGB565:
+	case R128_DATATYPE_ARGB4444:
+		dword_shift = 1;
+		break;
+	case R128_DATATYPE_CI8:
+	case R128_DATATYPE_RGB8:
+		dword_shift = 2;
+		break;
+	default:
+		DRM_ERROR( "invalid blit format %d\n", blit->format );
+		return DRM_ERR(EINVAL);
+	}
+
+	/* Flush the pixel cache, and mark the contents as Read Invalid.
+	 * This ensures no pixel data gets mixed up with the texture
+	 * data from the host data blit, otherwise part of the texture
+	 * image may be corrupted.
+	 */
+	BEGIN_RING( 2 );
+
+	OUT_RING( CCE_PACKET0( R128_PC_GUI_CTLSTAT, 0 ) );
+	OUT_RING( R128_PC_RI_GUI | R128_PC_FLUSH_GUI );
+
+	ADVANCE_RING();
+
+	/* Dispatch the indirect buffer.
+	 */
+	buf = dma->buflist[blit->idx];
+	buf_priv = buf->dev_private;
+
+	if ( buf->filp != filp ) {
+		DRM_ERROR( "process %d using buffer owned by %p\n",
+			   DRM_CURRENTPID, buf->filp );
+		return DRM_ERR(EINVAL);
+	}
+	if ( buf->pending ) {
+		DRM_ERROR( "sending pending buffer %d\n", blit->idx );
+		return DRM_ERR(EINVAL);
+	}
+
+	buf_priv->discard = 1;
+
+	dwords = (blit->width * blit->height) >> dword_shift;
+
+	data = (u32 *)((char *)dev_priv->buffers->handle + buf->offset);
+
+	data[0] = cpu_to_le32( CCE_PACKET3( R128_CNTL_HOSTDATA_BLT, dwords + 6 ) );
+	data[1] = cpu_to_le32( (R128_GMC_DST_PITCH_OFFSET_CNTL |
+				R128_GMC_BRUSH_NONE |
+				(blit->format << 8) |
+				R128_GMC_SRC_DATATYPE_COLOR |
+				R128_ROP3_S |
+				R128_DP_SRC_SOURCE_HOST_DATA |
+				R128_GMC_CLR_CMP_CNTL_DIS |
+				R128_GMC_AUX_CLIP_DIS |
+				R128_GMC_WR_MSK_DIS) );
+
+	data[2] = cpu_to_le32( (blit->pitch << 21) | (blit->offset >> 5) );
+	data[3] = cpu_to_le32( 0xffffffff );
+	data[4] = cpu_to_le32( 0xffffffff );
+	data[5] = cpu_to_le32( (blit->y << 16) | blit->x );
+	data[6] = cpu_to_le32( (blit->height << 16) | blit->width );
+	data[7] = cpu_to_le32( dwords );
+
+	buf->used = (dwords + 8) * sizeof(u32);
+
+	r128_cce_dispatch_indirect( dev, buf, 0, buf->used );
+
+	/* Flush the pixel cache after the blit completes.  This ensures
+	 * the texture data is written out to memory before rendering
+	 * continues.
+	 */
+	BEGIN_RING( 2 );
+
+	OUT_RING( CCE_PACKET0( R128_PC_GUI_CTLSTAT, 0 ) );
+	OUT_RING( R128_PC_FLUSH_GUI );
+
+	ADVANCE_RING();
+
+	return 0;
+}
+
+
+/* ================================================================
+ * Tiled depth buffer management
+ *
+ * FIXME: These should all set the destination write mask for when we
+ * have hardware stencil support.
+ */
+
+static int r128_cce_dispatch_write_span( drm_device_t *dev,
+					 drm_r128_depth_t *depth )
+{
+	drm_r128_private_t *dev_priv = dev->dev_private;
+	int count, x, y;
+	u32 *buffer;
+	u8 *mask;
+	int i, buffer_size, mask_size;
+	RING_LOCALS;
+	DRM_DEBUG( "\n" );
+
+	count = depth->n;
+	if ( DRM_COPY_FROM_USER( &x, depth->x, sizeof(x) ) ) {
+		return DRM_ERR(EFAULT);
+	}
+	if ( DRM_COPY_FROM_USER( &y, depth->y, sizeof(y) ) ) {
+		return DRM_ERR(EFAULT);
+	}
+
+	buffer_size = depth->n * sizeof(u32);
+	buffer = DRM_MALLOC( buffer_size );
+	if ( buffer == NULL )
+		return DRM_ERR(ENOMEM);
+	if ( DRM_COPY_FROM_USER( buffer, depth->buffer, buffer_size ) ) {
+		DRM_FREE( buffer, buffer_size);
+		return DRM_ERR(EFAULT);
+	}
+
+	mask_size = depth->n * sizeof(u8);
+	if ( depth->mask ) {
+		mask = DRM_MALLOC( mask_size );
+		if ( mask == NULL ) {
+			DRM_FREE( buffer, buffer_size );
+			return DRM_ERR(ENOMEM);
+		}
+		if ( DRM_COPY_FROM_USER( mask, depth->mask, mask_size ) ) {
+			DRM_FREE( buffer, buffer_size );
+			DRM_FREE( mask, mask_size );
+			return DRM_ERR(EFAULT);
+		}
+
+		for ( i = 0 ; i < count ; i++, x++ ) {
+			if ( mask[i] ) {
+				BEGIN_RING( 6 );
+
+				OUT_RING( CCE_PACKET3( R128_CNTL_PAINT_MULTI, 4 ) );
+				OUT_RING( R128_GMC_DST_PITCH_OFFSET_CNTL |
+					  R128_GMC_BRUSH_SOLID_COLOR |
+					  (dev_priv->depth_fmt << 8) |
+					  R128_GMC_SRC_DATATYPE_COLOR |
+					  R128_ROP3_P |
+					  R128_GMC_CLR_CMP_CNTL_DIS |
+					  R128_GMC_WR_MSK_DIS );
+
+				OUT_RING( dev_priv->depth_pitch_offset_c );
+				OUT_RING( buffer[i] );
+
+				OUT_RING( (x << 16) | y );
+				OUT_RING( (1 << 16) | 1 );
+
+				ADVANCE_RING();
+			}
+		}
+
+		DRM_FREE( mask, mask_size );
+	} else {
+		for ( i = 0 ; i < count ; i++, x++ ) {
+			BEGIN_RING( 6 );
+
+			OUT_RING( CCE_PACKET3( R128_CNTL_PAINT_MULTI, 4 ) );
+			OUT_RING( R128_GMC_DST_PITCH_OFFSET_CNTL |
+				  R128_GMC_BRUSH_SOLID_COLOR |
+				  (dev_priv->depth_fmt << 8) |
+				  R128_GMC_SRC_DATATYPE_COLOR |
+				  R128_ROP3_P |
+				  R128_GMC_CLR_CMP_CNTL_DIS |
+				  R128_GMC_WR_MSK_DIS );
+
+			OUT_RING( dev_priv->depth_pitch_offset_c );
+			OUT_RING( buffer[i] );
+
+			OUT_RING( (x << 16) | y );
+			OUT_RING( (1 << 16) | 1 );
+
+			ADVANCE_RING();
+		}
+	}
+
+	DRM_FREE( buffer, buffer_size );
+
+	return 0;
+}
+
+static int r128_cce_dispatch_write_pixels( drm_device_t *dev,
+					   drm_r128_depth_t *depth )
+{
+	drm_r128_private_t *dev_priv = dev->dev_private;
+	int count, *x, *y;
+	u32 *buffer;
+	u8 *mask;
+	int i, xbuf_size, ybuf_size, buffer_size, mask_size;
+	RING_LOCALS;
+	DRM_DEBUG( "\n" );
+
+	count = depth->n;
+
+	xbuf_size = count * sizeof(*x);
+	ybuf_size = count * sizeof(*y);
+	x = DRM_MALLOC( xbuf_size );
+	if ( x == NULL ) {
+		return DRM_ERR(ENOMEM);
+	}
+	y = DRM_MALLOC( ybuf_size );
+	if ( y == NULL ) {
+		DRM_FREE( x, xbuf_size );
+		return DRM_ERR(ENOMEM);
+	}
+	if ( DRM_COPY_FROM_USER( x, depth->x, xbuf_size ) ) {
+		DRM_FREE( x, xbuf_size );
+		DRM_FREE( y, ybuf_size );
+		return DRM_ERR(EFAULT);
+	}
+	if ( DRM_COPY_FROM_USER( y, depth->y, xbuf_size ) ) {
+		DRM_FREE( x, xbuf_size );
+		DRM_FREE( y, ybuf_size );
+		return DRM_ERR(EFAULT);
+	}
+
+	buffer_size = depth->n * sizeof(u32);
+	buffer = DRM_MALLOC( buffer_size );
+	if ( buffer == NULL ) {
+		DRM_FREE( x, xbuf_size );
+		DRM_FREE( y, ybuf_size );
+		return DRM_ERR(ENOMEM);
+	}
+	if ( DRM_COPY_FROM_USER( buffer, depth->buffer, buffer_size ) ) {
+		DRM_FREE( x, xbuf_size );
+		DRM_FREE( y, ybuf_size );
+		DRM_FREE( buffer, buffer_size );
+		return DRM_ERR(EFAULT);
+	}
+
+	if ( depth->mask ) {
+		mask_size = depth->n * sizeof(u8);
+		mask = DRM_MALLOC( mask_size );
+		if ( mask == NULL ) {
+			DRM_FREE( x, xbuf_size );
+			DRM_FREE( y, ybuf_size );
+			DRM_FREE( buffer, buffer_size );
+			return DRM_ERR(ENOMEM);
+		}
+		if ( DRM_COPY_FROM_USER( mask, depth->mask, mask_size ) ) {
+			DRM_FREE( x, xbuf_size );
+			DRM_FREE( y, ybuf_size );
+			DRM_FREE( buffer, buffer_size );
+			DRM_FREE( mask, mask_size );
+			return DRM_ERR(EFAULT);
+		}
+
+		for ( i = 0 ; i < count ; i++ ) {
+			if ( mask[i] ) {
+				BEGIN_RING( 6 );
+
+				OUT_RING( CCE_PACKET3( R128_CNTL_PAINT_MULTI, 4 ) );
+				OUT_RING( R128_GMC_DST_PITCH_OFFSET_CNTL |
+					  R128_GMC_BRUSH_SOLID_COLOR |
+					  (dev_priv->depth_fmt << 8) |
+					  R128_GMC_SRC_DATATYPE_COLOR |
+					  R128_ROP3_P |
+					  R128_GMC_CLR_CMP_CNTL_DIS |
+					  R128_GMC_WR_MSK_DIS );
+
+				OUT_RING( dev_priv->depth_pitch_offset_c );
+				OUT_RING( buffer[i] );
+
+				OUT_RING( (x[i] << 16) | y[i] );
+				OUT_RING( (1 << 16) | 1 );
+
+				ADVANCE_RING();
+			}
+		}
+
+		DRM_FREE( mask, mask_size );
+	} else {
+		for ( i = 0 ; i < count ; i++ ) {
+			BEGIN_RING( 6 );
+
+			OUT_RING( CCE_PACKET3( R128_CNTL_PAINT_MULTI, 4 ) );
+			OUT_RING( R128_GMC_DST_PITCH_OFFSET_CNTL |
+				  R128_GMC_BRUSH_SOLID_COLOR |
+				  (dev_priv->depth_fmt << 8) |
+				  R128_GMC_SRC_DATATYPE_COLOR |
+				  R128_ROP3_P |
+				  R128_GMC_CLR_CMP_CNTL_DIS |
+				  R128_GMC_WR_MSK_DIS );
+
+			OUT_RING( dev_priv->depth_pitch_offset_c );
+			OUT_RING( buffer[i] );
+
+			OUT_RING( (x[i] << 16) | y[i] );
+			OUT_RING( (1 << 16) | 1 );
+
+			ADVANCE_RING();
+		}
+	}
+
+	DRM_FREE( x, xbuf_size );
+	DRM_FREE( y, ybuf_size );
+	DRM_FREE( buffer, buffer_size );
+
+	return 0;
+}
+
+static int r128_cce_dispatch_read_span( drm_device_t *dev,
+					drm_r128_depth_t *depth )
+{
+	drm_r128_private_t *dev_priv = dev->dev_private;
+	int count, x, y;
+	RING_LOCALS;
+	DRM_DEBUG( "\n" );
+
+	count = depth->n;
+	if ( DRM_COPY_FROM_USER( &x, depth->x, sizeof(x) ) ) {
+		return DRM_ERR(EFAULT);
+	}
+	if ( DRM_COPY_FROM_USER( &y, depth->y, sizeof(y) ) ) {
+		return DRM_ERR(EFAULT);
+	}
+
+	BEGIN_RING( 7 );
+
+	OUT_RING( CCE_PACKET3( R128_CNTL_BITBLT_MULTI, 5 ) );
+	OUT_RING( R128_GMC_SRC_PITCH_OFFSET_CNTL |
+		  R128_GMC_DST_PITCH_OFFSET_CNTL |
+		  R128_GMC_BRUSH_NONE |
+		  (dev_priv->depth_fmt << 8) |
+		  R128_GMC_SRC_DATATYPE_COLOR |
+		  R128_ROP3_S |
+		  R128_DP_SRC_SOURCE_MEMORY |
+		  R128_GMC_CLR_CMP_CNTL_DIS |
+		  R128_GMC_WR_MSK_DIS );
+
+	OUT_RING( dev_priv->depth_pitch_offset_c );
+	OUT_RING( dev_priv->span_pitch_offset_c );
+
+	OUT_RING( (x << 16) | y );
+	OUT_RING( (0 << 16) | 0 );
+	OUT_RING( (count << 16) | 1 );
+
+	ADVANCE_RING();
+
+	return 0;
+}
+
+static int r128_cce_dispatch_read_pixels( drm_device_t *dev,
+					  drm_r128_depth_t *depth )
+{
+	drm_r128_private_t *dev_priv = dev->dev_private;
+	int count, *x, *y;
+	int i, xbuf_size, ybuf_size;
+	RING_LOCALS;
+	DRM_DEBUG( "%s\n", __FUNCTION__ );
+
+	count = depth->n;
+	if ( count > dev_priv->depth_pitch ) {
+		count = dev_priv->depth_pitch;
+	}
+
+	xbuf_size = count * sizeof(*x);
+	ybuf_size = count * sizeof(*y);
+	x = DRM_MALLOC( xbuf_size );
+	if ( x == NULL ) {
+		return DRM_ERR(ENOMEM);
+	}
+	y = DRM_MALLOC( ybuf_size );
+	if ( y == NULL ) {
+		DRM_FREE( x, xbuf_size );
+		return DRM_ERR(ENOMEM);
+	}
+	if ( DRM_COPY_FROM_USER( x, depth->x, xbuf_size ) ) {
+		DRM_FREE( x, xbuf_size );
+		DRM_FREE( y, ybuf_size );
+		return DRM_ERR(EFAULT);
+	}
+	if ( DRM_COPY_FROM_USER( y, depth->y, ybuf_size ) ) {
+		DRM_FREE( x, xbuf_size );
+		DRM_FREE( y, ybuf_size );
+		return DRM_ERR(EFAULT);
+	}
+
+	for ( i = 0 ; i < count ; i++ ) {
+		BEGIN_RING( 7 );
+
+		OUT_RING( CCE_PACKET3( R128_CNTL_BITBLT_MULTI, 5 ) );
+		OUT_RING( R128_GMC_SRC_PITCH_OFFSET_CNTL |
+			  R128_GMC_DST_PITCH_OFFSET_CNTL |
+			  R128_GMC_BRUSH_NONE |
+			  (dev_priv->depth_fmt << 8) |
+			  R128_GMC_SRC_DATATYPE_COLOR |
+			  R128_ROP3_S |
+			  R128_DP_SRC_SOURCE_MEMORY |
+			  R128_GMC_CLR_CMP_CNTL_DIS |
+			  R128_GMC_WR_MSK_DIS );
+
+		OUT_RING( dev_priv->depth_pitch_offset_c );
+		OUT_RING( dev_priv->span_pitch_offset_c );
+
+		OUT_RING( (x[i] << 16) | y[i] );
+		OUT_RING( (i << 16) | 0 );
+		OUT_RING( (1 << 16) | 1 );
+
+		ADVANCE_RING();
+	}
+
+	DRM_FREE( x, xbuf_size );
+	DRM_FREE( y, ybuf_size );
+
+	return 0;
+}
+
+
+/* ================================================================
+ * Polygon stipple
+ */
+
+static void r128_cce_dispatch_stipple( drm_device_t *dev, u32 *stipple )
+{
+	drm_r128_private_t *dev_priv = dev->dev_private;
+	int i;
+	RING_LOCALS;
+	DRM_DEBUG( "%s\n", __FUNCTION__ );
+
+	BEGIN_RING( 33 );
+
+	OUT_RING( CCE_PACKET0( R128_BRUSH_DATA0, 31 ) );
+	for ( i = 0 ; i < 32 ; i++ ) {
+		OUT_RING( stipple[i] );
+	}
+
+	ADVANCE_RING();
+}
+
+
+/* ================================================================
+ * IOCTL functions
+ */
+
+int r128_cce_clear( DRM_IOCTL_ARGS )
+{
+	DRM_DEVICE;
+	drm_r128_private_t *dev_priv = dev->dev_private;
+	drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
+	drm_r128_clear_t clear;
+	DRM_DEBUG( "\n" );
+
+	LOCK_TEST_WITH_RETURN( dev, filp );
+
+	DRM_COPY_FROM_USER_IOCTL( clear, (drm_r128_clear_t *) data,
+			     sizeof(clear) );
+
+	RING_SPACE_TEST_WITH_RETURN( dev_priv );
+
+	if ( sarea_priv->nbox > R128_NR_SAREA_CLIPRECTS )
+		sarea_priv->nbox = R128_NR_SAREA_CLIPRECTS;
+
+	r128_cce_dispatch_clear( dev, &clear );
+
+	/* Make sure we restore the 3D state next time.
+	 */
+	dev_priv->sarea_priv->dirty |= R128_UPLOAD_CONTEXT | R128_UPLOAD_MASKS;
+
+	return 0;
+}
+
+int r128_cce_swap( DRM_IOCTL_ARGS )
+{
+	DRM_DEVICE;
+	drm_r128_private_t *dev_priv = dev->dev_private;
+	drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
+	DRM_DEBUG( "%s\n", __FUNCTION__ );
+
+	LOCK_TEST_WITH_RETURN( dev, filp );
+
+	RING_SPACE_TEST_WITH_RETURN( dev_priv );
+
+	if ( sarea_priv->nbox > R128_NR_SAREA_CLIPRECTS )
+		sarea_priv->nbox = R128_NR_SAREA_CLIPRECTS;
+
+	if ( !dev_priv->page_flipping ) {
+		r128_cce_dispatch_swap( dev );
+		dev_priv->sarea_priv->dirty |= (R128_UPLOAD_CONTEXT |
+						R128_UPLOAD_MASKS);
+	} else {
+		r128_cce_dispatch_flip( dev );
+	}
+
+	return 0;
+}
+
+int r128_cce_vertex( DRM_IOCTL_ARGS )
+{
+	DRM_DEVICE;
+	drm_r128_private_t *dev_priv = dev->dev_private;
+	drm_device_dma_t *dma = dev->dma;
+	drm_buf_t *buf;
+	drm_r128_buf_priv_t *buf_priv;
+	drm_r128_vertex_t vertex;
+
+	LOCK_TEST_WITH_RETURN( dev, filp );
+
+	if ( !dev_priv ) {
+		DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
+		return DRM_ERR(EINVAL);
+	}
+
+	DRM_COPY_FROM_USER_IOCTL( vertex, (drm_r128_vertex_t *) data,
+			     sizeof(vertex) );
+
+	DRM_DEBUG( "pid=%d index=%d count=%d discard=%d\n",
+		   DRM_CURRENTPID,
+		   vertex.idx, vertex.count, vertex.discard );
+
+	if ( vertex.idx < 0 || vertex.idx >= dma->buf_count ) {
+		DRM_ERROR( "buffer index %d (of %d max)\n",
+			   vertex.idx, dma->buf_count - 1 );
+		return DRM_ERR(EINVAL);
+	}
+	if ( vertex.prim < 0 ||
+	     vertex.prim > R128_CCE_VC_CNTL_PRIM_TYPE_TRI_TYPE2 ) {
+		DRM_ERROR( "buffer prim %d\n", vertex.prim );
+		return DRM_ERR(EINVAL);
+	}
+
+	RING_SPACE_TEST_WITH_RETURN( dev_priv );
+	VB_AGE_TEST_WITH_RETURN( dev_priv );
+
+	buf = dma->buflist[vertex.idx];
+	buf_priv = buf->dev_private;
+
+	if ( buf->filp != filp ) {
+		DRM_ERROR( "process %d using buffer owned by %p\n",
+			   DRM_CURRENTPID, buf->filp );
+		return DRM_ERR(EINVAL);
+	}
+	if ( buf->pending ) {
+		DRM_ERROR( "sending pending buffer %d\n", vertex.idx );
+		return DRM_ERR(EINVAL);
+	}
+
+	buf->used = vertex.count;
+	buf_priv->prim = vertex.prim;
+	buf_priv->discard = vertex.discard;
+
+	r128_cce_dispatch_vertex( dev, buf );
+
+	return 0;
+}
+
+int r128_cce_indices( DRM_IOCTL_ARGS )
+{
+	DRM_DEVICE;
+	drm_r128_private_t *dev_priv = dev->dev_private;
+	drm_device_dma_t *dma = dev->dma;
+	drm_buf_t *buf;
+	drm_r128_buf_priv_t *buf_priv;
+	drm_r128_indices_t elts;
+	int count;
+
+	LOCK_TEST_WITH_RETURN( dev, filp );
+
+	if ( !dev_priv ) {
+		DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
+		return DRM_ERR(EINVAL);
+	}
+
+	DRM_COPY_FROM_USER_IOCTL( elts, (drm_r128_indices_t *) data,
+			     sizeof(elts) );
+
+	DRM_DEBUG( "pid=%d buf=%d s=%d e=%d d=%d\n", DRM_CURRENTPID,
+		   elts.idx, elts.start, elts.end, elts.discard );
+
+	if ( elts.idx < 0 || elts.idx >= dma->buf_count ) {
+		DRM_ERROR( "buffer index %d (of %d max)\n",
+			   elts.idx, dma->buf_count - 1 );
+		return DRM_ERR(EINVAL);
+	}
+	if ( elts.prim < 0 ||
+	     elts.prim > R128_CCE_VC_CNTL_PRIM_TYPE_TRI_TYPE2 ) {
+		DRM_ERROR( "buffer prim %d\n", elts.prim );
+		return DRM_ERR(EINVAL);
+	}
+
+	RING_SPACE_TEST_WITH_RETURN( dev_priv );
+	VB_AGE_TEST_WITH_RETURN( dev_priv );
+
+	buf = dma->buflist[elts.idx];
+	buf_priv = buf->dev_private;
+
+	if ( buf->filp != filp ) {
+		DRM_ERROR( "process %d using buffer owned by %p\n",
+			   DRM_CURRENTPID, buf->filp );
+		return DRM_ERR(EINVAL);
+	}
+	if ( buf->pending ) {
+		DRM_ERROR( "sending pending buffer %d\n", elts.idx );
+		return DRM_ERR(EINVAL);
+	}
+
+	count = (elts.end - elts.start) / sizeof(u16);
+	elts.start -= R128_INDEX_PRIM_OFFSET;
+
+	if ( elts.start & 0x7 ) {
+		DRM_ERROR( "misaligned buffer 0x%x\n", elts.start );
+		return DRM_ERR(EINVAL);
+	}
+	if ( elts.start < buf->used ) {
+		DRM_ERROR( "no header 0x%x - 0x%x\n", elts.start, buf->used );
+		return DRM_ERR(EINVAL);
+	}
+
+	buf->used = elts.end;
+	buf_priv->prim = elts.prim;
+	buf_priv->discard = elts.discard;
+
+	r128_cce_dispatch_indices( dev, buf, elts.start, elts.end, count );
+
+	return 0;
+}
+
+int r128_cce_blit( DRM_IOCTL_ARGS )
+{
+	DRM_DEVICE;
+	drm_device_dma_t *dma = dev->dma;
+	drm_r128_private_t *dev_priv = dev->dev_private;
+	drm_r128_blit_t blit;
+
+	LOCK_TEST_WITH_RETURN( dev, filp );
+
+	DRM_COPY_FROM_USER_IOCTL( blit, (drm_r128_blit_t *) data,
+			     sizeof(blit) );
+
+	DRM_DEBUG( "pid=%d index=%d\n", DRM_CURRENTPID, blit.idx );
+
+	if ( blit.idx < 0 || blit.idx >= dma->buf_count ) {
+		DRM_ERROR( "buffer index %d (of %d max)\n",
+			   blit.idx, dma->buf_count - 1 );
+		return DRM_ERR(EINVAL);
+	}
+
+	RING_SPACE_TEST_WITH_RETURN( dev_priv );
+	VB_AGE_TEST_WITH_RETURN( dev_priv );
+
+	return r128_cce_dispatch_blit( filp, dev, &blit );
+}
+
+int r128_cce_depth( DRM_IOCTL_ARGS )
+{
+	DRM_DEVICE;
+	drm_r128_private_t *dev_priv = dev->dev_private;
+	drm_r128_depth_t depth;
+
+	LOCK_TEST_WITH_RETURN( dev, filp );
+
+	DRM_COPY_FROM_USER_IOCTL( depth, (drm_r128_depth_t *) data,
+			     sizeof(depth) );
+
+	RING_SPACE_TEST_WITH_RETURN( dev_priv );
+
+	switch ( depth.func ) {
+	case R128_WRITE_SPAN:
+		return r128_cce_dispatch_write_span( dev, &depth );
+	case R128_WRITE_PIXELS:
+		return r128_cce_dispatch_write_pixels( dev, &depth );
+	case R128_READ_SPAN:
+		return r128_cce_dispatch_read_span( dev, &depth );
+	case R128_READ_PIXELS:
+		return r128_cce_dispatch_read_pixels( dev, &depth );
+	}
+
+	return DRM_ERR(EINVAL);
+}
+
+int r128_cce_stipple( DRM_IOCTL_ARGS )
+{
+	DRM_DEVICE;
+	drm_r128_private_t *dev_priv = dev->dev_private;
+	drm_r128_stipple_t stipple;
+	u32 mask[32];
+
+	LOCK_TEST_WITH_RETURN( dev, filp );
+
+	DRM_COPY_FROM_USER_IOCTL( stipple, (drm_r128_stipple_t *) data,
+			     sizeof(stipple) );
+
+	if ( DRM_COPY_FROM_USER( &mask, stipple.mask,
+			     32 * sizeof(u32) ) )
+		return DRM_ERR( EFAULT );
+
+	RING_SPACE_TEST_WITH_RETURN( dev_priv );
+
+	r128_cce_dispatch_stipple( dev, mask );
+
+	return 0;
+}
+
+int r128_cce_indirect( DRM_IOCTL_ARGS )
+{
+	DRM_DEVICE;
+	drm_r128_private_t *dev_priv = dev->dev_private;
+	drm_device_dma_t *dma = dev->dma;
+	drm_buf_t *buf;
+	drm_r128_buf_priv_t *buf_priv;
+	drm_r128_indirect_t indirect;
+#if 0
+	RING_LOCALS;
+#endif
+
+	LOCK_TEST_WITH_RETURN( dev, filp );
+
+	if ( !dev_priv ) {
+		DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
+		return DRM_ERR(EINVAL);
+	}
+
+	DRM_COPY_FROM_USER_IOCTL( indirect, (drm_r128_indirect_t *) data,
+			     sizeof(indirect) );
+
+	DRM_DEBUG( "indirect: idx=%d s=%d e=%d d=%d\n",
+		   indirect.idx, indirect.start,
+		   indirect.end, indirect.discard );
+
+	if ( indirect.idx < 0 || indirect.idx >= dma->buf_count ) {
+		DRM_ERROR( "buffer index %d (of %d max)\n",
+			   indirect.idx, dma->buf_count - 1 );
+		return DRM_ERR(EINVAL);
+	}
+
+	buf = dma->buflist[indirect.idx];
+	buf_priv = buf->dev_private;
+
+	if ( buf->filp != filp ) {
+		DRM_ERROR( "process %d using buffer owned by %p\n",
+			   DRM_CURRENTPID, buf->filp );
+		return DRM_ERR(EINVAL);
+	}
+	if ( buf->pending ) {
+		DRM_ERROR( "sending pending buffer %d\n", indirect.idx );
+		return DRM_ERR(EINVAL);
+	}
+
+	if ( indirect.start < buf->used ) {
+		DRM_ERROR( "reusing indirect: start=0x%x actual=0x%x\n",
+			   indirect.start, buf->used );
+		return DRM_ERR(EINVAL);
+	}
+
+	RING_SPACE_TEST_WITH_RETURN( dev_priv );
+	VB_AGE_TEST_WITH_RETURN( dev_priv );
+
+	buf->used = indirect.end;
+	buf_priv->discard = indirect.discard;
+
+#if 0
+	/* Wait for the 3D stream to idle before the indirect buffer
+	 * containing 2D acceleration commands is processed.
+	 */
+	BEGIN_RING( 2 );
+	RADEON_WAIT_UNTIL_3D_IDLE();
+	ADVANCE_RING();
+#endif
+
+	/* Dispatch the indirect buffer full of commands from the
+	 * X server.  This is insecure and is thus only available to
+	 * privileged clients.
+	 */
+	r128_cce_dispatch_indirect( dev, buf, indirect.start, indirect.end );
+
+	return 0;
+}
+
+int r128_getparam( DRM_IOCTL_ARGS )
+{
+	DRM_DEVICE;
+	drm_r128_private_t *dev_priv = dev->dev_private;
+	drm_r128_getparam_t param;
+	int value;
+
+	if ( !dev_priv ) {
+		DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
+		return DRM_ERR(EINVAL);
+	}
+
+	DRM_COPY_FROM_USER_IOCTL( param, (drm_r128_getparam_t *)data,
+			     sizeof(param) );
+
+	DRM_DEBUG( "pid=%d\n", DRM_CURRENTPID );
+
+	switch( param.param ) {
+	case R128_PARAM_IRQ_NR:
+		value = dev->irq;
+		break;
+	default:
+		return DRM_ERR(EINVAL);
+	}
+
+	if ( DRM_COPY_TO_USER( param.value, &value, sizeof(int) ) ) {
+		DRM_ERROR( "copy_to_user\n" );
+		return DRM_ERR(EFAULT);
+	}
+	
+	return 0;
+}
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/radeon.h b/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/radeon.h
new file mode 100644
index 000000000..d465773e1
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/radeon.h
@@ -0,0 +1,153 @@
+/* radeon.h -- ATI Radeon DRM template customization -*- linux-c -*-
+ * Created: Wed Feb 14 17:07:34 2001 by gareth@valinux.com
+ *
+ * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ *    Gareth Hughes <gareth@valinux.com>
+ *    Keith Whitwell <keith@tungstengraphics.com>
+ */
+
+#ifndef __RADEON_H__
+#define __RADEON_H__
+
+/* This remains constant for all DRM template files.
+ */
+#define DRM(x) radeon_##x
+
+/* General customization:
+ */
+#define __HAVE_AGP		1
+#define __MUST_HAVE_AGP		0
+#define __HAVE_MTRR		1
+#define __HAVE_CTX_BITMAP	1
+#define __HAVE_SG		1
+#define __HAVE_PCI_DMA		1
+
+#define DRIVER_AUTHOR		"Gareth Hughes, Keith Whitwell, others."
+
+#define DRIVER_NAME		"radeon"
+#define DRIVER_DESC		"ATI Radeon"
+#define DRIVER_DATE		"20020828"
+
+#define DRIVER_MAJOR		1
+#define DRIVER_MINOR		8
+#define DRIVER_PATCHLEVEL	0
+
+/* Interface history:
+ *
+ * 1.1 - ??
+ * 1.2 - Add vertex2 ioctl (keith)
+ *     - Add stencil capability to clear ioctl (gareth, keith)
+ *     - Increase MAX_TEXTURE_LEVELS (brian)
+ * 1.3 - Add cmdbuf ioctl (keith)
+ *     - Add support for new radeon packets (keith)
+ *     - Add getparam ioctl (keith)
+ *     - Add flip-buffers ioctl, deprecate fullscreen foo (keith).
+ * 1.4 - Add scratch registers to get_param ioctl.
+ * 1.5 - Add r200 packets to cmdbuf ioctl
+ *     - Add r200 function to init ioctl
+ *     - Add 'scalar2' instruction to cmdbuf
+ * 1.6 - Add static agp memory manager
+ *       Add irq handler (won't be turned on unless X server knows to)
+ *       Add irq ioctls and irq_active getparam.
+ *       Add wait command for cmdbuf ioctl
+ *       Add agp offset query for getparam
+ * 1.7 - Add support for cube map registers: R200_PP_CUBIC_FACES_[0..5]
+ *       and R200_PP_CUBIC_OFFSET_F1_[0..5].
+ *       Added packets R200_EMIT_PP_CUBIC_FACES_[0..5] and
+ *       R200_EMIT_PP_CUBIC_OFFSETS_[0..5].  (brian)
+ * 1.8 - Remove need to call cleanup ioctls on last client exit (keith)
+ */
+#define DRIVER_IOCTLS							     \
+ [DRM_IOCTL_NR(DRM_IOCTL_DMA)]               = { radeon_cp_buffers,  1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_INIT)]    = { radeon_cp_init,     1, 1 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_START)]   = { radeon_cp_start,    1, 1 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_STOP)]    = { radeon_cp_stop,     1, 1 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_RESET)]   = { radeon_cp_reset,    1, 1 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_IDLE)]    = { radeon_cp_idle,     1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_RADEON_RESET)]    = { radeon_engine_reset,  1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_RADEON_FULLSCREEN)] = { radeon_fullscreen,  1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_RADEON_SWAP)]       = { radeon_cp_swap,     1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CLEAR)]      = { radeon_cp_clear,    1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_RADEON_VERTEX)]     = { radeon_cp_vertex,   1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_RADEON_INDICES)]    = { radeon_cp_indices,  1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_RADEON_TEXTURE)]    = { radeon_cp_texture,  1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_RADEON_STIPPLE)]    = { radeon_cp_stipple,  1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_RADEON_INDIRECT)]   = { radeon_cp_indirect, 1, 1 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_RADEON_VERTEX2)]    = { radeon_cp_vertex2,  1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CMDBUF)]     = { radeon_cp_cmdbuf,   1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_RADEON_GETPARAM)]   = { radeon_cp_getparam, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_RADEON_FLIP)]       = { radeon_cp_flip,     1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_RADEON_ALLOC)]      = { radeon_mem_alloc,   1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_RADEON_FREE)]       = { radeon_mem_free,    1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_RADEON_INIT_HEAP)]  = { radeon_mem_init_heap, 1, 1 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_RADEON_IRQ_EMIT)]   = { radeon_irq_emit, 1, 0 }, \
+ [DRM_IOCTL_NR(DRM_IOCTL_RADEON_IRQ_WAIT)]   = { radeon_irq_wait, 1, 0 },
+
+
+
+/* When a client dies:
+ *    - Check for and clean up flipped page state
+ *    - Free any alloced agp memory.
+ *
+ * DRM infrastructure takes care of reclaiming dma buffers.
+ */
+#define DRIVER_PRERELEASE() 						\
+do {									\
+	if ( dev->dev_private ) {					\
+		drm_radeon_private_t *dev_priv = dev->dev_private;	\
+		if ( dev_priv->page_flipping ) {			\
+			radeon_do_cleanup_pageflip( dev );		\
+		}							\
+                radeon_mem_release( filp, dev_priv->agp_heap );		\
+                radeon_mem_release( filp, dev_priv->fb_heap );		\
+	}								\
+} while (0)
+
+/* When the last client dies, shut down the CP and free dev->dev_priv.
+ */
+/* #define __HAVE_RELEASE 1 */
+#define DRIVER_PRETAKEDOWN()			\
+do {						\
+    radeon_do_release( dev );			\
+} while (0)
+
+
+
+/* DMA customization:
+ */
+#define __HAVE_DMA		1
+#define __HAVE_DMA_IRQ		1
+#define __HAVE_VBL_IRQ		1
+#define __HAVE_SHARED_IRQ       1
+
+
+/* Buffer customization:
+ */
+#define DRIVER_BUF_PRIV_T	drm_radeon_buf_priv_t
+
+#define DRIVER_AGP_BUFFERS_MAP( dev )				\
+	((drm_radeon_private_t *)((dev)->dev_private))->buffers
+
+#endif
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/radeon_cp.c b/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/radeon_cp.c
new file mode 100644
index 000000000..3ec8dfd17
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/radeon_cp.c
@@ -0,0 +1,1682 @@
+/* radeon_cp.c -- CP support for Radeon -*- linux-c -*-
+ *
+ * Copyright 2000 Precision Insight, Inc., Cedar Park, Texas.
+ * Copyright 2000 VA Linux Systems, Inc., Fremont, California.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ *    Kevin E. Martin <martin@valinux.com>
+ *    Gareth Hughes <gareth@valinux.com>
+ */
+
+#include "radeon.h"
+#include "drmP.h"
+#include "drm.h"
+#include "radeon_drm.h"
+#include "radeon_drv.h"
+
+#define RADEON_FIFO_DEBUG	0
+
+#if defined(__alpha__) || defined(__powerpc__)
+# define PCIGART_ENABLED
+#else
+# undef PCIGART_ENABLED
+#endif
+
+
+/* CP microcode (from ATI) */
+static u32 R200_cp_microcode[][2] = {
+	{ 0x21007000, 0000000000 },        
+	{ 0x20007000, 0000000000 }, 
+	{ 0x000000ab, 0x00000004 },
+	{ 0x000000af, 0x00000004 },
+	{ 0x66544a49, 0000000000 },
+	{ 0x49494174, 0000000000 },
+	{ 0x54517d83, 0000000000 },
+	{ 0x498d8b64, 0000000000 },
+	{ 0x49494949, 0000000000 },
+	{ 0x49da493c, 0000000000 },
+	{ 0x49989898, 0000000000 },
+	{ 0xd34949d5, 0000000000 },
+	{ 0x9dc90e11, 0000000000 },
+	{ 0xce9b9b9b, 0000000000 },
+	{ 0x000f0000, 0x00000016 },
+	{ 0x352e232c, 0000000000 },
+	{ 0x00000013, 0x00000004 },
+	{ 0x000f0000, 0x00000016 },
+	{ 0x352e272c, 0000000000 },
+	{ 0x000f0001, 0x00000016 },
+	{ 0x3239362f, 0000000000 },
+	{ 0x000077ef, 0x00000002 },
+	{ 0x00061000, 0x00000002 },
+	{ 0x00000020, 0x0000001a },
+	{ 0x00004000, 0x0000001e },
+	{ 0x00061000, 0x00000002 },
+	{ 0x00000020, 0x0000001a },
+	{ 0x00004000, 0x0000001e },
+	{ 0x00061000, 0x00000002 },
+	{ 0x00000020, 0x0000001a },
+	{ 0x00004000, 0x0000001e },
+	{ 0x00000016, 0x00000004 },
+	{ 0x0003802a, 0x00000002 },
+	{ 0x040067e0, 0x00000002 },
+	{ 0x00000016, 0x00000004 },
+	{ 0x000077e0, 0x00000002 },
+	{ 0x00065000, 0x00000002 },
+	{ 0x000037e1, 0x00000002 },
+	{ 0x040067e1, 0x00000006 },
+	{ 0x000077e0, 0x00000002 },
+	{ 0x000077e1, 0x00000002 },
+	{ 0x000077e1, 0x00000006 },
+	{ 0xffffffff, 0000000000 },
+	{ 0x10000000, 0000000000 },
+	{ 0x0003802a, 0x00000002 },
+	{ 0x040067e0, 0x00000006 },
+	{ 0x00007675, 0x00000002 },
+	{ 0x00007676, 0x00000002 },
+	{ 0x00007677, 0x00000002 },
+	{ 0x00007678, 0x00000006 },
+	{ 0x0003802b, 0x00000002 },
+	{ 0x04002676, 0x00000002 },
+	{ 0x00007677, 0x00000002 },
+	{ 0x00007678, 0x00000006 },
+	{ 0x0000002e, 0x00000018 },
+	{ 0x0000002e, 0x00000018 },
+	{ 0000000000, 0x00000006 },
+	{ 0x0000002f, 0x00000018 },
+	{ 0x0000002f, 0x00000018 },
+	{ 0000000000, 0x00000006 },
+	{ 0x01605000, 0x00000002 },
+	{ 0x00065000, 0x00000002 },
+	{ 0x00098000, 0x00000002 },
+	{ 0x00061000, 0x00000002 },
+	{ 0x64c0603d, 0x00000004 },
+	{ 0x00080000, 0x00000016 },
+	{ 0000000000, 0000000000 },
+	{ 0x0400251d, 0x00000002 },
+	{ 0x00007580, 0x00000002 },
+	{ 0x00067581, 0x00000002 },
+	{ 0x04002580, 0x00000002 },
+	{ 0x00067581, 0x00000002 },
+	{ 0x00000046, 0x00000004 },
+	{ 0x00005000, 0000000000 },
+	{ 0x00061000, 0x00000002 },
+	{ 0x0000750e, 0x00000002 },
+	{ 0x00019000, 0x00000002 },
+	{ 0x00011055, 0x00000014 },
+	{ 0x00000055, 0x00000012 },
+	{ 0x0400250f, 0x00000002 },
+	{ 0x0000504a, 0x00000004 },
+	{ 0x00007565, 0x00000002 },
+	{ 0x00007566, 0x00000002 },
+	{ 0x00000051, 0x00000004 },
+	{ 0x01e655b4, 0x00000002 },
+	{ 0x4401b0dc, 0x00000002 },
+	{ 0x01c110dc, 0x00000002 },
+	{ 0x2666705d, 0x00000018 },
+	{ 0x040c2565, 0x00000002 },
+	{ 0x0000005d, 0x00000018 },
+	{ 0x04002564, 0x00000002 },
+	{ 0x00007566, 0x00000002 },
+	{ 0x00000054, 0x00000004 },
+	{ 0x00401060, 0x00000008 },
+	{ 0x00101000, 0x00000002 },
+	{ 0x000d80ff, 0x00000002 },
+	{ 0x00800063, 0x00000008 },
+	{ 0x000f9000, 0x00000002 },
+	{ 0x000e00ff, 0x00000002 },
+	{ 0000000000, 0x00000006 },
+	{ 0x00000080, 0x00000018 },
+	{ 0x00000054, 0x00000004 },
+	{ 0x00007576, 0x00000002 },
+	{ 0x00065000, 0x00000002 },
+	{ 0x00009000, 0x00000002 },
+	{ 0x00041000, 0x00000002 },
+	{ 0x0c00350e, 0x00000002 },
+	{ 0x00049000, 0x00000002 },
+	{ 0x00051000, 0x00000002 },
+	{ 0x01e785f8, 0x00000002 },
+	{ 0x00200000, 0x00000002 },
+	{ 0x00600073, 0x0000000c },
+	{ 0x00007563, 0x00000002 },
+	{ 0x006075f0, 0x00000021 },
+	{ 0x20007068, 0x00000004 },
+	{ 0x00005068, 0x00000004 },
+	{ 0x00007576, 0x00000002 },
+	{ 0x00007577, 0x00000002 },
+	{ 0x0000750e, 0x00000002 },
+	{ 0x0000750f, 0x00000002 },
+	{ 0x00a05000, 0x00000002 },
+	{ 0x00600076, 0x0000000c },
+	{ 0x006075f0, 0x00000021 },
+	{ 0x000075f8, 0x00000002 },
+	{ 0x00000076, 0x00000004 },
+	{ 0x000a750e, 0x00000002 },
+	{ 0x0020750f, 0x00000002 },
+	{ 0x00600079, 0x00000004 },
+	{ 0x00007570, 0x00000002 },
+	{ 0x00007571, 0x00000002 },
+	{ 0x00007572, 0x00000006 },
+	{ 0x00005000, 0x00000002 },
+	{ 0x00a05000, 0x00000002 },
+	{ 0x00007568, 0x00000002 },
+	{ 0x00061000, 0x00000002 },
+	{ 0x00000084, 0x0000000c },
+	{ 0x00058000, 0x00000002 },
+	{ 0x0c607562, 0x00000002 },
+	{ 0x00000086, 0x00000004 },
+	{ 0x00600085, 0x00000004 },
+	{ 0x400070dd, 0000000000 },
+	{ 0x000380dd, 0x00000002 },
+	{ 0x00000093, 0x0000001c },
+	{ 0x00065095, 0x00000018 },
+	{ 0x040025bb, 0x00000002 },
+	{ 0x00061096, 0x00000018 },
+	{ 0x040075bc, 0000000000 },
+	{ 0x000075bb, 0x00000002 },
+	{ 0x000075bc, 0000000000 },
+	{ 0x00090000, 0x00000006 },
+	{ 0x00090000, 0x00000002 },
+	{ 0x000d8002, 0x00000006 },
+	{ 0x00005000, 0x00000002 },
+	{ 0x00007821, 0x00000002 },
+	{ 0x00007800, 0000000000 },
+	{ 0x00007821, 0x00000002 },
+	{ 0x00007800, 0000000000 },
+	{ 0x01665000, 0x00000002 },
+	{ 0x000a0000, 0x00000002 },
+	{ 0x000671cc, 0x00000002 },
+	{ 0x0286f1cd, 0x00000002 },
+	{ 0x000000a3, 0x00000010 },
+	{ 0x21007000, 0000000000 },
+	{ 0x000000aa, 0x0000001c },
+	{ 0x00065000, 0x00000002 },
+	{ 0x000a0000, 0x00000002 },
+	{ 0x00061000, 0x00000002 },
+	{ 0x000b0000, 0x00000002 },
+	{ 0x38067000, 0x00000002 },
+	{ 0x000a00a6, 0x00000004 },
+	{ 0x20007000, 0000000000 },
+	{ 0x01200000, 0x00000002 },
+	{ 0x20077000, 0x00000002 },
+	{ 0x01200000, 0x00000002 },
+	{ 0x20007000, 0000000000 },
+	{ 0x00061000, 0x00000002 },
+	{ 0x0120751b, 0x00000002 },
+	{ 0x8040750a, 0x00000002 },
+	{ 0x8040750b, 0x00000002 },
+	{ 0x00110000, 0x00000002 },
+	{ 0x000380dd, 0x00000002 },
+	{ 0x000000bd, 0x0000001c },
+	{ 0x00061096, 0x00000018 },
+	{ 0x844075bd, 0x00000002 },
+	{ 0x00061095, 0x00000018 },
+	{ 0x840075bb, 0x00000002 },
+	{ 0x00061096, 0x00000018 },
+	{ 0x844075bc, 0x00000002 },
+	{ 0x000000c0, 0x00000004 },
+	{ 0x804075bd, 0x00000002 },
+	{ 0x800075bb, 0x00000002 },
+	{ 0x804075bc, 0x00000002 },
+	{ 0x00108000, 0x00000002 },
+	{ 0x01400000, 0x00000002 },
+	{ 0x006000c4, 0x0000000c },
+	{ 0x20c07000, 0x00000020 },
+	{ 0x000000c6, 0x00000012 },
+	{ 0x00800000, 0x00000006 },
+	{ 0x0080751d, 0x00000006 },
+	{ 0x000025bb, 0x00000002 },
+	{ 0x000040c0, 0x00000004 },
+	{ 0x0000775c, 0x00000002 },
+	{ 0x00a05000, 0x00000002 },
+	{ 0x00661000, 0x00000002 },
+	{ 0x0460275d, 0x00000020 },
+	{ 0x00004000, 0000000000 },
+	{ 0x00007999, 0x00000002 },
+	{ 0x00a05000, 0x00000002 },
+	{ 0x00661000, 0x00000002 },
+	{ 0x0460299b, 0x00000020 },
+	{ 0x00004000, 0000000000 },
+	{ 0x01e00830, 0x00000002 },
+	{ 0x21007000, 0000000000 },
+	{ 0x00005000, 0x00000002 },
+	{ 0x00038042, 0x00000002 },
+	{ 0x040025e0, 0x00000002 },
+	{ 0x000075e1, 0000000000 },
+	{ 0x00000001, 0000000000 },
+	{ 0x000380d9, 0x00000002 },
+	{ 0x04007394, 0000000000 },
+	{ 0000000000, 0000000000 },
+	{ 0000000000, 0000000000 },
+	{ 0000000000, 0000000000 },
+	{ 0000000000, 0000000000 },
+	{ 0000000000, 0000000000 },
+	{ 0000000000, 0000000000 },
+	{ 0000000000, 0000000000 },
+	{ 0000000000, 0000000000 },
+	{ 0000000000, 0000000000 },
+	{ 0000000000, 0000000000 },
+	{ 0000000000, 0000000000 },
+	{ 0000000000, 0000000000 },
+	{ 0000000000, 0000000000 },
+	{ 0000000000, 0000000000 },
+	{ 0000000000, 0000000000 },
+	{ 0000000000, 0000000000 },
+	{ 0000000000, 0000000000 },
+	{ 0000000000, 0000000000 },
+	{ 0000000000, 0000000000 },
+	{ 0000000000, 0000000000 },
+	{ 0000000000, 0000000000 },
+	{ 0000000000, 0000000000 },
+	{ 0000000000, 0000000000 },
+	{ 0000000000, 0000000000 },
+	{ 0000000000, 0000000000 },
+	{ 0000000000, 0000000000 },
+	{ 0000000000, 0000000000 },
+	{ 0000000000, 0000000000 },
+	{ 0000000000, 0000000000 },
+	{ 0000000000, 0000000000 },
+	{ 0000000000, 0000000000 },
+	{ 0000000000, 0000000000 },
+	{ 0000000000, 0000000000 },
+	{ 0000000000, 0000000000 },
+	{ 0000000000, 0000000000 },
+	{ 0000000000, 0000000000 },
+};
+
+
+static u32 radeon_cp_microcode[][2] = {
+	{ 0x21007000, 0000000000 },
+	{ 0x20007000, 0000000000 },
+	{ 0x000000b4, 0x00000004 },
+	{ 0x000000b8, 0x00000004 },
+	{ 0x6f5b4d4c, 0000000000 },
+	{ 0x4c4c427f, 0000000000 },
+	{ 0x5b568a92, 0000000000 },
+	{ 0x4ca09c6d, 0000000000 },
+	{ 0xad4c4c4c, 0000000000 },
+	{ 0x4ce1af3d, 0000000000 },
+	{ 0xd8afafaf, 0000000000 },
+	{ 0xd64c4cdc, 0000000000 },
+	{ 0x4cd10d10, 0000000000 },
+	{ 0x000f0000, 0x00000016 },
+	{ 0x362f242d, 0000000000 },
+	{ 0x00000012, 0x00000004 },
+	{ 0x000f0000, 0x00000016 },
+	{ 0x362f282d, 0000000000 },
+	{ 0x000380e7, 0x00000002 },
+	{ 0x04002c97, 0x00000002 },
+	{ 0x000f0001, 0x00000016 },
+	{ 0x333a3730, 0000000000 },
+	{ 0x000077ef, 0x00000002 },
+	{ 0x00061000, 0x00000002 },
+	{ 0x00000021, 0x0000001a },
+	{ 0x00004000, 0x0000001e },
+	{ 0x00061000, 0x00000002 },
+	{ 0x00000021, 0x0000001a },
+	{ 0x00004000, 0x0000001e },
+	{ 0x00061000, 0x00000002 },
+	{ 0x00000021, 0x0000001a },
+	{ 0x00004000, 0x0000001e },
+	{ 0x00000017, 0x00000004 },
+	{ 0x0003802b, 0x00000002 },
+	{ 0x040067e0, 0x00000002 },
+	{ 0x00000017, 0x00000004 },
+	{ 0x000077e0, 0x00000002 },
+	{ 0x00065000, 0x00000002 },
+	{ 0x000037e1, 0x00000002 },
+	{ 0x040067e1, 0x00000006 },
+	{ 0x000077e0, 0x00000002 },
+	{ 0x000077e1, 0x00000002 },
+	{ 0x000077e1, 0x00000006 },
+	{ 0xffffffff, 0000000000 },
+	{ 0x10000000, 0000000000 },
+	{ 0x0003802b, 0x00000002 },
+	{ 0x040067e0, 0x00000006 },
+	{ 0x00007675, 0x00000002 },
+	{ 0x00007676, 0x00000002 },
+	{ 0x00007677, 0x00000002 },
+	{ 0x00007678, 0x00000006 },
+	{ 0x0003802c, 0x00000002 },
+	{ 0x04002676, 0x00000002 },
+	{ 0x00007677, 0x00000002 },
+	{ 0x00007678, 0x00000006 },
+	{ 0x0000002f, 0x00000018 },
+	{ 0x0000002f, 0x00000018 },
+	{ 0000000000, 0x00000006 },
+	{ 0x00000030, 0x00000018 },
+	{ 0x00000030, 0x00000018 },
+	{ 0000000000, 0x00000006 },
+	{ 0x01605000, 0x00000002 },
+	{ 0x00065000, 0x00000002 },
+	{ 0x00098000, 0x00000002 },
+	{ 0x00061000, 0x00000002 },
+	{ 0x64c0603e, 0x00000004 },
+	{ 0x000380e6, 0x00000002 },
+	{ 0x040025c5, 0x00000002 },
+	{ 0x00080000, 0x00000016 },
+	{ 0000000000, 0000000000 },
+	{ 0x0400251d, 0x00000002 },
+	{ 0x00007580, 0x00000002 },
+	{ 0x00067581, 0x00000002 },
+	{ 0x04002580, 0x00000002 },
+	{ 0x00067581, 0x00000002 },
+	{ 0x00000049, 0x00000004 },
+	{ 0x00005000, 0000000000 },
+	{ 0x000380e6, 0x00000002 },
+	{ 0x040025c5, 0x00000002 },
+	{ 0x00061000, 0x00000002 },
+	{ 0x0000750e, 0x00000002 },
+	{ 0x00019000, 0x00000002 },
+	{ 0x00011055, 0x00000014 },
+	{ 0x00000055, 0x00000012 },
+	{ 0x0400250f, 0x00000002 },
+	{ 0x0000504f, 0x00000004 },
+	{ 0x000380e6, 0x00000002 },
+	{ 0x040025c5, 0x00000002 },
+	{ 0x00007565, 0x00000002 },
+	{ 0x00007566, 0x00000002 },
+	{ 0x00000058, 0x00000004 },
+	{ 0x000380e6, 0x00000002 },
+	{ 0x040025c5, 0x00000002 },
+	{ 0x01e655b4, 0x00000002 },
+	{ 0x4401b0e4, 0x00000002 },
+	{ 0x01c110e4, 0x00000002 },
+	{ 0x26667066, 0x00000018 },
+	{ 0x040c2565, 0x00000002 },
+	{ 0x00000066, 0x00000018 },
+	{ 0x04002564, 0x00000002 },
+	{ 0x00007566, 0x00000002 },
+	{ 0x0000005d, 0x00000004 },
+	{ 0x00401069, 0x00000008 },
+	{ 0x00101000, 0x00000002 },
+	{ 0x000d80ff, 0x00000002 },
+	{ 0x0080006c, 0x00000008 },
+	{ 0x000f9000, 0x00000002 },
+	{ 0x000e00ff, 0x00000002 },
+	{ 0000000000, 0x00000006 },
+	{ 0x0000008f, 0x00000018 },
+	{ 0x0000005b, 0x00000004 },
+	{ 0x000380e6, 0x00000002 },
+	{ 0x040025c5, 0x00000002 },
+	{ 0x00007576, 0x00000002 },
+	{ 0x00065000, 0x00000002 },
+	{ 0x00009000, 0x00000002 },
+	{ 0x00041000, 0x00000002 },
+	{ 0x0c00350e, 0x00000002 },
+	{ 0x00049000, 0x00000002 },
+	{ 0x00051000, 0x00000002 },
+	{ 0x01e785f8, 0x00000002 },
+	{ 0x00200000, 0x00000002 },
+	{ 0x0060007e, 0x0000000c },
+	{ 0x00007563, 0x00000002 },
+	{ 0x006075f0, 0x00000021 },
+	{ 0x20007073, 0x00000004 },
+	{ 0x00005073, 0x00000004 },
+	{ 0x000380e6, 0x00000002 },
+	{ 0x040025c5, 0x00000002 },
+	{ 0x00007576, 0x00000002 },
+	{ 0x00007577, 0x00000002 },
+	{ 0x0000750e, 0x00000002 },
+	{ 0x0000750f, 0x00000002 },
+	{ 0x00a05000, 0x00000002 },
+	{ 0x00600083, 0x0000000c },
+	{ 0x006075f0, 0x00000021 },
+	{ 0x000075f8, 0x00000002 },
+	{ 0x00000083, 0x00000004 },
+	{ 0x000a750e, 0x00000002 },
+	{ 0x000380e6, 0x00000002 },
+	{ 0x040025c5, 0x00000002 },
+	{ 0x0020750f, 0x00000002 },
+	{ 0x00600086, 0x00000004 },
+	{ 0x00007570, 0x00000002 },
+	{ 0x00007571, 0x00000002 },
+	{ 0x00007572, 0x00000006 },
+	{ 0x000380e6, 0x00000002 },
+	{ 0x040025c5, 0x00000002 },
+	{ 0x00005000, 0x00000002 },
+	{ 0x00a05000, 0x00000002 },
+	{ 0x00007568, 0x00000002 },
+	{ 0x00061000, 0x00000002 },
+	{ 0x00000095, 0x0000000c },
+	{ 0x00058000, 0x00000002 },
+	{ 0x0c607562, 0x00000002 },
+	{ 0x00000097, 0x00000004 },
+	{ 0x000380e6, 0x00000002 },
+	{ 0x040025c5, 0x00000002 },
+	{ 0x00600096, 0x00000004 },
+	{ 0x400070e5, 0000000000 },
+	{ 0x000380e6, 0x00000002 },
+	{ 0x040025c5, 0x00000002 },
+	{ 0x000380e5, 0x00000002 },
+	{ 0x000000a8, 0x0000001c },
+	{ 0x000650aa, 0x00000018 },
+	{ 0x040025bb, 0x00000002 },
+	{ 0x000610ab, 0x00000018 },
+	{ 0x040075bc, 0000000000 },
+	{ 0x000075bb, 0x00000002 },
+	{ 0x000075bc, 0000000000 },
+	{ 0x00090000, 0x00000006 },
+	{ 0x00090000, 0x00000002 },
+	{ 0x000d8002, 0x00000006 },
+	{ 0x00007832, 0x00000002 },
+	{ 0x00005000, 0x00000002 },
+	{ 0x000380e7, 0x00000002 },
+	{ 0x04002c97, 0x00000002 },
+	{ 0x00007820, 0x00000002 },
+	{ 0x00007821, 0x00000002 },
+	{ 0x00007800, 0000000000 },
+	{ 0x01200000, 0x00000002 },
+	{ 0x20077000, 0x00000002 },
+	{ 0x01200000, 0x00000002 },
+	{ 0x20007000, 0x00000002 },
+	{ 0x00061000, 0x00000002 },
+	{ 0x0120751b, 0x00000002 },
+	{ 0x8040750a, 0x00000002 },
+	{ 0x8040750b, 0x00000002 },
+	{ 0x00110000, 0x00000002 },
+	{ 0x000380e5, 0x00000002 },
+	{ 0x000000c6, 0x0000001c },
+	{ 0x000610ab, 0x00000018 },
+	{ 0x844075bd, 0x00000002 },
+	{ 0x000610aa, 0x00000018 },
+	{ 0x840075bb, 0x00000002 },
+	{ 0x000610ab, 0x00000018 },
+	{ 0x844075bc, 0x00000002 },
+	{ 0x000000c9, 0x00000004 },
+	{ 0x804075bd, 0x00000002 },
+	{ 0x800075bb, 0x00000002 },
+	{ 0x804075bc, 0x00000002 },
+	{ 0x00108000, 0x00000002 },
+	{ 0x01400000, 0x00000002 },
+	{ 0x006000cd, 0x0000000c },
+	{ 0x20c07000, 0x00000020 },
+	{ 0x000000cf, 0x00000012 },
+	{ 0x00800000, 0x00000006 },
+	{ 0x0080751d, 0x00000006 },
+	{ 0000000000, 0000000000 },
+	{ 0x0000775c, 0x00000002 },
+	{ 0x00a05000, 0x00000002 },
+	{ 0x00661000, 0x00000002 },
+	{ 0x0460275d, 0x00000020 },
+	{ 0x00004000, 0000000000 },
+	{ 0x01e00830, 0x00000002 },
+	{ 0x21007000, 0000000000 },
+	{ 0x6464614d, 0000000000 },
+	{ 0x69687420, 0000000000 },
+	{ 0x00000073, 0000000000 },
+	{ 0000000000, 0000000000 },
+	{ 0x00005000, 0x00000002 },
+	{ 0x000380d0, 0x00000002 },
+	{ 0x040025e0, 0x00000002 },
+	{ 0x000075e1, 0000000000 },
+	{ 0x00000001, 0000000000 },
+	{ 0x000380e0, 0x00000002 },
+	{ 0x04002394, 0x00000002 },
+	{ 0x00005000, 0000000000 },
+	{ 0000000000, 0000000000 },
+	{ 0000000000, 0000000000 },
+	{ 0x00000008, 0000000000 },
+	{ 0x00000004, 0000000000 },
+	{ 0000000000, 0000000000 },
+	{ 0000000000, 0000000000 },
+	{ 0000000000, 0000000000 },
+	{ 0000000000, 0000000000 },
+	{ 0000000000, 0000000000 },
+	{ 0000000000, 0000000000 },
+	{ 0000000000, 0000000000 },
+	{ 0000000000, 0000000000 },
+	{ 0000000000, 0000000000 },
+	{ 0000000000, 0000000000 },
+	{ 0000000000, 0000000000 },
+	{ 0000000000, 0000000000 },
+	{ 0000000000, 0000000000 },
+	{ 0000000000, 0000000000 },
+	{ 0000000000, 0000000000 },
+	{ 0000000000, 0000000000 },
+	{ 0000000000, 0000000000 },
+	{ 0000000000, 0000000000 },
+	{ 0000000000, 0000000000 },
+	{ 0000000000, 0000000000 },
+	{ 0000000000, 0000000000 },
+	{ 0000000000, 0000000000 },
+	{ 0000000000, 0000000000 },
+	{ 0000000000, 0000000000 },
+};
+
+
+int RADEON_READ_PLL(drm_device_t *dev, int addr)
+{
+	drm_radeon_private_t *dev_priv = dev->dev_private;
+
+	RADEON_WRITE8(RADEON_CLOCK_CNTL_INDEX, addr & 0x1f);
+	return RADEON_READ(RADEON_CLOCK_CNTL_DATA);
+}
+
+#if RADEON_FIFO_DEBUG
+static void radeon_status( drm_radeon_private_t *dev_priv )
+{
+	printk( "%s:\n", __FUNCTION__ );
+	printk( "RBBM_STATUS = 0x%08x\n",
+		(unsigned int)RADEON_READ( RADEON_RBBM_STATUS ) );
+	printk( "CP_RB_RTPR = 0x%08x\n",
+		(unsigned int)RADEON_READ( RADEON_CP_RB_RPTR ) );
+	printk( "CP_RB_WTPR = 0x%08x\n",
+		(unsigned int)RADEON_READ( RADEON_CP_RB_WPTR ) );
+	printk( "AIC_CNTL = 0x%08x\n",
+		(unsigned int)RADEON_READ( RADEON_AIC_CNTL ) );
+	printk( "AIC_STAT = 0x%08x\n",
+		(unsigned int)RADEON_READ( RADEON_AIC_STAT ) );
+	printk( "AIC_PT_BASE = 0x%08x\n",
+		(unsigned int)RADEON_READ( RADEON_AIC_PT_BASE ) );
+	printk( "TLB_ADDR = 0x%08x\n",
+		(unsigned int)RADEON_READ( RADEON_AIC_TLB_ADDR ) );
+	printk( "TLB_DATA = 0x%08x\n",
+		(unsigned int)RADEON_READ( RADEON_AIC_TLB_DATA ) );
+}
+#endif
+
+
+/* ================================================================
+ * Engine, FIFO control
+ */
+
+static int radeon_do_pixcache_flush( drm_radeon_private_t *dev_priv )
+{
+	u32 tmp;
+	int i;
+
+	dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE;
+
+	tmp  = RADEON_READ( RADEON_RB2D_DSTCACHE_CTLSTAT );
+	tmp |= RADEON_RB2D_DC_FLUSH_ALL;
+	RADEON_WRITE( RADEON_RB2D_DSTCACHE_CTLSTAT, tmp );
+
+	for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) {
+		if ( !(RADEON_READ( RADEON_RB2D_DSTCACHE_CTLSTAT )
+		       & RADEON_RB2D_DC_BUSY) ) {
+			return 0;
+		}
+		DRM_UDELAY( 1 );
+	}
+
+#if RADEON_FIFO_DEBUG
+	DRM_ERROR( "failed!\n" );
+	radeon_status( dev_priv );
+#endif
+	return DRM_ERR(EBUSY);
+}
+
+static int radeon_do_wait_for_fifo( drm_radeon_private_t *dev_priv,
+				    int entries )
+{
+	int i;
+
+	dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE;
+
+	for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) {
+		int slots = ( RADEON_READ( RADEON_RBBM_STATUS )
+			      & RADEON_RBBM_FIFOCNT_MASK );
+		if ( slots >= entries ) return 0;
+		DRM_UDELAY( 1 );
+	}
+
+#if RADEON_FIFO_DEBUG
+	DRM_ERROR( "failed!\n" );
+	radeon_status( dev_priv );
+#endif
+	return DRM_ERR(EBUSY);
+}
+
+static int radeon_do_wait_for_idle( drm_radeon_private_t *dev_priv )
+{
+	int i, ret;
+
+	dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE;
+
+	ret = radeon_do_wait_for_fifo( dev_priv, 64 );
+	if ( ret ) return ret;
+
+	for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) {
+		if ( !(RADEON_READ( RADEON_RBBM_STATUS )
+		       & RADEON_RBBM_ACTIVE) ) {
+			radeon_do_pixcache_flush( dev_priv );
+			return 0;
+		}
+		DRM_UDELAY( 1 );
+	}
+
+#if RADEON_FIFO_DEBUG
+	DRM_ERROR( "failed!\n" );
+	radeon_status( dev_priv );
+#endif
+	return DRM_ERR(EBUSY);
+}
+
+
+/* ================================================================
+ * CP control, initialization
+ */
+
+/* Load the microcode for the CP */
+static void radeon_cp_load_microcode( drm_radeon_private_t *dev_priv )
+{
+	int i;
+	DRM_DEBUG( "\n" );
+
+	radeon_do_wait_for_idle( dev_priv );
+
+	RADEON_WRITE( RADEON_CP_ME_RAM_ADDR, 0 );
+
+	if (dev_priv->is_r200)
+	{
+		DRM_INFO("Loading R200 Microcode\n");
+		for ( i = 0 ; i < 256 ; i++ ) 
+		{
+			RADEON_WRITE( RADEON_CP_ME_RAM_DATAH,
+				      R200_cp_microcode[i][1] );
+			RADEON_WRITE( RADEON_CP_ME_RAM_DATAL,
+				      R200_cp_microcode[i][0] );
+		}
+	}
+	else
+	{
+		for ( i = 0 ; i < 256 ; i++ ) {
+			RADEON_WRITE( RADEON_CP_ME_RAM_DATAH,
+				      radeon_cp_microcode[i][1] );
+			RADEON_WRITE( RADEON_CP_ME_RAM_DATAL,
+				      radeon_cp_microcode[i][0] );
+		}
+	}
+}
+
+/* Flush any pending commands to the CP.  This should only be used just
+ * prior to a wait for idle, as it informs the engine that the command
+ * stream is ending.
+ */
+static void radeon_do_cp_flush( drm_radeon_private_t *dev_priv )
+{
+	DRM_DEBUG( "\n" );
+#if 0
+	u32 tmp;
+
+	tmp = RADEON_READ( RADEON_CP_RB_WPTR ) | (1 << 31);
+	RADEON_WRITE( RADEON_CP_RB_WPTR, tmp );
+#endif
+}
+
+/* Wait for the CP to go idle.
+ */
+int radeon_do_cp_idle( drm_radeon_private_t *dev_priv )
+{
+	RING_LOCALS;
+	DRM_DEBUG( "\n" );
+
+	BEGIN_RING( 6 );
+
+	RADEON_PURGE_CACHE();
+	RADEON_PURGE_ZCACHE();
+	RADEON_WAIT_UNTIL_IDLE();
+
+	ADVANCE_RING();
+	COMMIT_RING();
+
+	return radeon_do_wait_for_idle( dev_priv );
+}
+
+/* Start the Command Processor.
+ */
+static void radeon_do_cp_start( drm_radeon_private_t *dev_priv )
+{
+	RING_LOCALS;
+	DRM_DEBUG( "\n" );
+
+	radeon_do_wait_for_idle( dev_priv );
+
+	RADEON_WRITE( RADEON_CP_CSQ_CNTL, dev_priv->cp_mode );
+
+	dev_priv->cp_running = 1;
+
+	BEGIN_RING( 6 );
+
+	RADEON_PURGE_CACHE();
+	RADEON_PURGE_ZCACHE();
+	RADEON_WAIT_UNTIL_IDLE();
+
+	ADVANCE_RING();
+	COMMIT_RING();
+}
+
+/* Reset the Command Processor.  This will not flush any pending
+ * commands, so you must wait for the CP command stream to complete
+ * before calling this routine.
+ */
+static void radeon_do_cp_reset( drm_radeon_private_t *dev_priv )
+{
+	u32 cur_read_ptr;
+	DRM_DEBUG( "\n" );
+
+	cur_read_ptr = RADEON_READ( RADEON_CP_RB_RPTR );
+	RADEON_WRITE( RADEON_CP_RB_WPTR, cur_read_ptr );
+	*dev_priv->ring.head = cur_read_ptr;
+	dev_priv->ring.tail = cur_read_ptr;
+}
+
+/* Stop the Command Processor.  This will not flush any pending
+ * commands, so you must flush the command stream and wait for the CP
+ * to go idle before calling this routine.
+ */
+static void radeon_do_cp_stop( drm_radeon_private_t *dev_priv )
+{
+	DRM_DEBUG( "\n" );
+
+	RADEON_WRITE( RADEON_CP_CSQ_CNTL, RADEON_CSQ_PRIDIS_INDDIS );
+
+	dev_priv->cp_running = 0;
+}
+
+/* Reset the engine.  This will stop the CP if it is running.
+ */
+static int radeon_do_engine_reset( drm_device_t *dev )
+{
+	drm_radeon_private_t *dev_priv = dev->dev_private;
+	u32 clock_cntl_index, mclk_cntl, rbbm_soft_reset;
+	DRM_DEBUG( "\n" );
+
+	radeon_do_pixcache_flush( dev_priv );
+
+	clock_cntl_index = RADEON_READ( RADEON_CLOCK_CNTL_INDEX );
+	mclk_cntl = RADEON_READ_PLL( dev, RADEON_MCLK_CNTL );
+
+	RADEON_WRITE_PLL( RADEON_MCLK_CNTL, ( mclk_cntl |
+					      RADEON_FORCEON_MCLKA |
+					      RADEON_FORCEON_MCLKB |
+ 					      RADEON_FORCEON_YCLKA |
+					      RADEON_FORCEON_YCLKB |
+					      RADEON_FORCEON_MC |
+					      RADEON_FORCEON_AIC ) );
+
+	rbbm_soft_reset = RADEON_READ( RADEON_RBBM_SOFT_RESET );
+
+	RADEON_WRITE( RADEON_RBBM_SOFT_RESET, ( rbbm_soft_reset |
+						RADEON_SOFT_RESET_CP |
+						RADEON_SOFT_RESET_HI |
+						RADEON_SOFT_RESET_SE |
+						RADEON_SOFT_RESET_RE |
+						RADEON_SOFT_RESET_PP |
+						RADEON_SOFT_RESET_E2 |
+						RADEON_SOFT_RESET_RB ) );
+	RADEON_READ( RADEON_RBBM_SOFT_RESET );
+	RADEON_WRITE( RADEON_RBBM_SOFT_RESET, ( rbbm_soft_reset &
+						~( RADEON_SOFT_RESET_CP |
+						   RADEON_SOFT_RESET_HI |
+						   RADEON_SOFT_RESET_SE |
+						   RADEON_SOFT_RESET_RE |
+						   RADEON_SOFT_RESET_PP |
+						   RADEON_SOFT_RESET_E2 |
+						   RADEON_SOFT_RESET_RB ) ) );
+	RADEON_READ( RADEON_RBBM_SOFT_RESET );
+
+
+	RADEON_WRITE_PLL( RADEON_MCLK_CNTL, mclk_cntl );
+	RADEON_WRITE( RADEON_CLOCK_CNTL_INDEX, clock_cntl_index );
+	RADEON_WRITE( RADEON_RBBM_SOFT_RESET,  rbbm_soft_reset );
+
+	/* Reset the CP ring */
+	radeon_do_cp_reset( dev_priv );
+
+	/* The CP is no longer running after an engine reset */
+	dev_priv->cp_running = 0;
+
+	/* Reset any pending vertex, indirect buffers */
+	radeon_freelist_reset( dev );
+
+	return 0;
+}
+
+static void radeon_cp_init_ring_buffer( drm_device_t *dev,
+				        drm_radeon_private_t *dev_priv )
+{
+	u32 ring_start, cur_read_ptr;
+	u32 tmp;
+
+	/* Initialize the memory controller */
+	RADEON_WRITE( RADEON_MC_FB_LOCATION,
+		      (dev_priv->agp_vm_start - 1) & 0xffff0000 );
+
+	if ( !dev_priv->is_pci ) {
+		RADEON_WRITE( RADEON_MC_AGP_LOCATION,
+			      (((dev_priv->agp_vm_start - 1 +
+				 dev_priv->agp_size) & 0xffff0000) |
+			       (dev_priv->agp_vm_start >> 16)) );
+	}
+
+#if __REALLY_HAVE_AGP
+	if ( !dev_priv->is_pci )
+		ring_start = (dev_priv->cp_ring->offset
+			      - dev->agp->base
+			      + dev_priv->agp_vm_start);
+       else
+#endif
+		ring_start = (dev_priv->cp_ring->offset
+			      - dev->sg->handle
+			      + dev_priv->agp_vm_start);
+
+	RADEON_WRITE( RADEON_CP_RB_BASE, ring_start );
+
+	/* Set the write pointer delay */
+	RADEON_WRITE( RADEON_CP_RB_WPTR_DELAY, 0 );
+
+	/* Initialize the ring buffer's read and write pointers */
+	cur_read_ptr = RADEON_READ( RADEON_CP_RB_RPTR );
+	RADEON_WRITE( RADEON_CP_RB_WPTR, cur_read_ptr );
+	*dev_priv->ring.head = cur_read_ptr;
+	dev_priv->ring.tail = cur_read_ptr;
+
+	if ( !dev_priv->is_pci ) {
+		RADEON_WRITE( RADEON_CP_RB_RPTR_ADDR,
+			      dev_priv->ring_rptr->offset );
+	} else {
+		drm_sg_mem_t *entry = dev->sg;
+		unsigned long tmp_ofs, page_ofs;
+
+		tmp_ofs = dev_priv->ring_rptr->offset - dev->sg->handle;
+		page_ofs = tmp_ofs >> PAGE_SHIFT;
+
+		RADEON_WRITE( RADEON_CP_RB_RPTR_ADDR,
+			     entry->busaddr[page_ofs]);
+		DRM_DEBUG( "ring rptr: offset=0x%08x handle=0x%08lx\n",
+			   entry->busaddr[page_ofs],
+			   entry->handle + tmp_ofs );
+	}
+
+	/* Initialize the scratch register pointer.  This will cause
+	 * the scratch register values to be written out to memory
+	 * whenever they are updated.
+	 *
+	 * We simply put this behind the ring read pointer, this works
+	 * with PCI GART as well as (whatever kind of) AGP GART
+	 */
+	RADEON_WRITE( RADEON_SCRATCH_ADDR, RADEON_READ( RADEON_CP_RB_RPTR_ADDR )
+					 + RADEON_SCRATCH_REG_OFFSET );
+
+	dev_priv->scratch = ((__volatile__ u32 *)
+			     dev_priv->ring.head +
+			     (RADEON_SCRATCH_REG_OFFSET / sizeof(u32)));
+
+	RADEON_WRITE( RADEON_SCRATCH_UMSK, 0x7 );
+
+	/* Writeback doesn't seem to work everywhere, test it first */
+	DRM_WRITE32( dev_priv->ring_rptr, RADEON_SCRATCHOFF(1), 0 );
+	RADEON_WRITE( RADEON_SCRATCH_REG1, 0xdeadbeef );
+
+	for ( tmp = 0 ; tmp < dev_priv->usec_timeout ; tmp++ ) {
+		if ( DRM_READ32( dev_priv->ring_rptr, RADEON_SCRATCHOFF(1) ) == 0xdeadbeef )
+			break;
+		DRM_UDELAY( 1 );
+	}
+
+	if ( tmp < dev_priv->usec_timeout ) {
+		dev_priv->writeback_works = 1;
+		DRM_DEBUG( "writeback test succeeded, tmp=%d\n", tmp );
+	} else {
+		dev_priv->writeback_works = 0;
+		DRM_DEBUG( "writeback test failed\n" );
+	}
+
+	dev_priv->sarea_priv->last_frame = dev_priv->scratch[0] = 0;
+	RADEON_WRITE( RADEON_LAST_FRAME_REG,
+		      dev_priv->sarea_priv->last_frame );
+
+	dev_priv->sarea_priv->last_dispatch = dev_priv->scratch[1] = 0;
+	RADEON_WRITE( RADEON_LAST_DISPATCH_REG,
+		      dev_priv->sarea_priv->last_dispatch );
+
+	dev_priv->sarea_priv->last_clear = dev_priv->scratch[2] = 0;
+	RADEON_WRITE( RADEON_LAST_CLEAR_REG,
+		      dev_priv->sarea_priv->last_clear );
+
+	/* Set ring buffer size */
+#ifdef __BIG_ENDIAN
+	RADEON_WRITE( RADEON_CP_RB_CNTL, dev_priv->ring.size_l2qw | RADEON_BUF_SWAP_32BIT );
+#else
+	RADEON_WRITE( RADEON_CP_RB_CNTL, dev_priv->ring.size_l2qw );
+#endif
+
+	radeon_do_wait_for_idle( dev_priv );
+
+	/* Turn on bus mastering */
+	tmp = RADEON_READ( RADEON_BUS_CNTL ) & ~RADEON_BUS_MASTER_DIS;
+	RADEON_WRITE( RADEON_BUS_CNTL, tmp );
+
+	/* Sync everything up */
+	RADEON_WRITE( RADEON_ISYNC_CNTL,
+		      (RADEON_ISYNC_ANY2D_IDLE3D |
+		       RADEON_ISYNC_ANY3D_IDLE2D |
+		       RADEON_ISYNC_WAIT_IDLEGUI |
+		       RADEON_ISYNC_CPSCRATCH_IDLEGUI) );
+}
+
+static int radeon_do_init_cp( drm_device_t *dev, drm_radeon_init_t *init )
+{
+	drm_radeon_private_t *dev_priv;
+	u32 tmp;
+	DRM_DEBUG( "\n" );
+
+	dev_priv = DRM(alloc)( sizeof(drm_radeon_private_t), DRM_MEM_DRIVER );
+	if ( dev_priv == NULL )
+		return DRM_ERR(ENOMEM);
+
+	memset( dev_priv, 0, sizeof(drm_radeon_private_t) );
+
+	dev_priv->is_pci = init->is_pci;
+
+#if !defined(PCIGART_ENABLED)
+	/* PCI support is not 100% working, so we disable it here.
+	 */
+	if ( dev_priv->is_pci ) {
+		DRM_ERROR( "PCI GART not yet supported for Radeon!\n" );
+		dev->dev_private = (void *)dev_priv;
+		radeon_do_cleanup_cp(dev);
+		return DRM_ERR(EINVAL);
+	}
+#endif
+
+	if ( dev_priv->is_pci && !dev->sg ) {
+		DRM_ERROR( "PCI GART memory not allocated!\n" );
+		dev->dev_private = (void *)dev_priv;
+		radeon_do_cleanup_cp(dev);
+		return DRM_ERR(EINVAL);
+	}
+
+	dev_priv->usec_timeout = init->usec_timeout;
+	if ( dev_priv->usec_timeout < 1 ||
+	     dev_priv->usec_timeout > RADEON_MAX_USEC_TIMEOUT ) {
+		DRM_DEBUG( "TIMEOUT problem!\n" );
+		dev->dev_private = (void *)dev_priv;
+		radeon_do_cleanup_cp(dev);
+		return DRM_ERR(EINVAL);
+	}
+
+	dev_priv->is_r200 = (init->func == RADEON_INIT_R200_CP);
+	dev_priv->do_boxes = 0;
+	dev_priv->cp_mode = init->cp_mode;
+
+	/* We don't support anything other than bus-mastering ring mode,
+	 * but the ring can be in either AGP or PCI space for the ring
+	 * read pointer.
+	 */
+	if ( ( init->cp_mode != RADEON_CSQ_PRIBM_INDDIS ) &&
+	     ( init->cp_mode != RADEON_CSQ_PRIBM_INDBM ) ) {
+		DRM_DEBUG( "BAD cp_mode (%x)!\n", init->cp_mode );
+		dev->dev_private = (void *)dev_priv;
+		radeon_do_cleanup_cp(dev);
+		return DRM_ERR(EINVAL);
+	}
+
+	switch ( init->fb_bpp ) {
+	case 16:
+		dev_priv->color_fmt = RADEON_COLOR_FORMAT_RGB565;
+		break;
+	case 32:
+	default:
+		dev_priv->color_fmt = RADEON_COLOR_FORMAT_ARGB8888;
+		break;
+	}
+	dev_priv->front_offset	= init->front_offset;
+	dev_priv->front_pitch	= init->front_pitch;
+	dev_priv->back_offset	= init->back_offset;
+	dev_priv->back_pitch	= init->back_pitch;
+
+	switch ( init->depth_bpp ) {
+	case 16:
+		dev_priv->depth_fmt = RADEON_DEPTH_FORMAT_16BIT_INT_Z;
+		break;
+	case 32:
+	default:
+		dev_priv->depth_fmt = RADEON_DEPTH_FORMAT_24BIT_INT_Z;
+		break;
+	}
+	dev_priv->depth_offset	= init->depth_offset;
+	dev_priv->depth_pitch	= init->depth_pitch;
+
+	dev_priv->front_pitch_offset = (((dev_priv->front_pitch/64) << 22) |
+					(dev_priv->front_offset >> 10));
+	dev_priv->back_pitch_offset = (((dev_priv->back_pitch/64) << 22) |
+				       (dev_priv->back_offset >> 10));
+	dev_priv->depth_pitch_offset = (((dev_priv->depth_pitch/64) << 22) |
+					(dev_priv->depth_offset >> 10));
+
+	/* Hardware state for depth clears.  Remove this if/when we no
+	 * longer clear the depth buffer with a 3D rectangle.  Hard-code
+	 * all values to prevent unwanted 3D state from slipping through
+	 * and screwing with the clear operation.
+	 */
+	dev_priv->depth_clear.rb3d_cntl = (RADEON_PLANE_MASK_ENABLE |
+					   (dev_priv->color_fmt << 10) |
+					   (1<<15));
+
+	dev_priv->depth_clear.rb3d_zstencilcntl = 
+		(dev_priv->depth_fmt |
+		 RADEON_Z_TEST_ALWAYS |
+		 RADEON_STENCIL_TEST_ALWAYS |
+		 RADEON_STENCIL_S_FAIL_REPLACE |
+		 RADEON_STENCIL_ZPASS_REPLACE |
+		 RADEON_STENCIL_ZFAIL_REPLACE |
+		 RADEON_Z_WRITE_ENABLE);
+
+	dev_priv->depth_clear.se_cntl = (RADEON_FFACE_CULL_CW |
+					 RADEON_BFACE_SOLID |
+					 RADEON_FFACE_SOLID |
+					 RADEON_FLAT_SHADE_VTX_LAST |
+					 RADEON_DIFFUSE_SHADE_FLAT |
+					 RADEON_ALPHA_SHADE_FLAT |
+					 RADEON_SPECULAR_SHADE_FLAT |
+					 RADEON_FOG_SHADE_FLAT |
+					 RADEON_VTX_PIX_CENTER_OGL |
+					 RADEON_ROUND_MODE_TRUNC |
+					 RADEON_ROUND_PREC_8TH_PIX);
+
+	DRM_GETSAREA();
+	
+	if(!dev_priv->sarea) {
+		DRM_ERROR("could not find sarea!\n");
+		dev->dev_private = (void *)dev_priv;
+		radeon_do_cleanup_cp(dev);
+		return DRM_ERR(EINVAL);
+	}
+
+	DRM_FIND_MAP( dev_priv->fb, init->fb_offset );
+	if(!dev_priv->fb) {
+		DRM_ERROR("could not find framebuffer!\n");
+		dev->dev_private = (void *)dev_priv;
+		radeon_do_cleanup_cp(dev);
+		return DRM_ERR(EINVAL);
+	}
+	DRM_FIND_MAP( dev_priv->mmio, init->mmio_offset );
+	if(!dev_priv->mmio) {
+		DRM_ERROR("could not find mmio region!\n");
+		dev->dev_private = (void *)dev_priv;
+		radeon_do_cleanup_cp(dev);
+		return DRM_ERR(EINVAL);
+	}
+	DRM_FIND_MAP( dev_priv->cp_ring, init->ring_offset );
+	if(!dev_priv->cp_ring) {
+		DRM_ERROR("could not find cp ring region!\n");
+		dev->dev_private = (void *)dev_priv;
+		radeon_do_cleanup_cp(dev);
+		return DRM_ERR(EINVAL);
+	}
+	DRM_FIND_MAP( dev_priv->ring_rptr, init->ring_rptr_offset );
+	if(!dev_priv->ring_rptr) {
+		DRM_ERROR("could not find ring read pointer!\n");
+		dev->dev_private = (void *)dev_priv;
+		radeon_do_cleanup_cp(dev);
+		return DRM_ERR(EINVAL);
+	}
+	DRM_FIND_MAP( dev_priv->buffers, init->buffers_offset );
+	if(!dev_priv->buffers) {
+		DRM_ERROR("could not find dma buffer region!\n");
+		dev->dev_private = (void *)dev_priv;
+		radeon_do_cleanup_cp(dev);
+		return DRM_ERR(EINVAL);
+	}
+
+	if ( !dev_priv->is_pci ) {
+		DRM_FIND_MAP( dev_priv->agp_textures,
+			      init->agp_textures_offset );
+		if(!dev_priv->agp_textures) {
+			DRM_ERROR("could not find agp texture region!\n");
+			dev->dev_private = (void *)dev_priv;
+			radeon_do_cleanup_cp(dev);
+			return DRM_ERR(EINVAL);
+		}
+	}
+
+	dev_priv->sarea_priv =
+		(drm_radeon_sarea_t *)((u8 *)dev_priv->sarea->handle +
+				       init->sarea_priv_offset);
+
+	if ( !dev_priv->is_pci ) {
+		DRM_IOREMAP( dev_priv->cp_ring );
+		DRM_IOREMAP( dev_priv->ring_rptr );
+		DRM_IOREMAP( dev_priv->buffers );
+		if(!dev_priv->cp_ring->handle ||
+		   !dev_priv->ring_rptr->handle ||
+		   !dev_priv->buffers->handle) {
+			DRM_ERROR("could not find ioremap agp regions!\n");
+			dev->dev_private = (void *)dev_priv;
+			radeon_do_cleanup_cp(dev);
+			return DRM_ERR(EINVAL);
+		}
+	} else {
+		dev_priv->cp_ring->handle =
+			(void *)dev_priv->cp_ring->offset;
+		dev_priv->ring_rptr->handle =
+			(void *)dev_priv->ring_rptr->offset;
+		dev_priv->buffers->handle = (void *)dev_priv->buffers->offset;
+
+		DRM_DEBUG( "dev_priv->cp_ring->handle %p\n",
+			   dev_priv->cp_ring->handle );
+		DRM_DEBUG( "dev_priv->ring_rptr->handle %p\n",
+			   dev_priv->ring_rptr->handle );
+		DRM_DEBUG( "dev_priv->buffers->handle %p\n",
+			   dev_priv->buffers->handle );
+	}
+
+
+	dev_priv->agp_size = init->agp_size;
+	dev_priv->agp_vm_start = RADEON_READ( RADEON_CONFIG_APER_SIZE );
+#if __REALLY_HAVE_AGP
+	if ( !dev_priv->is_pci )
+		dev_priv->agp_buffers_offset = (dev_priv->buffers->offset
+						- dev->agp->base
+						+ dev_priv->agp_vm_start);
+	else
+#endif
+		dev_priv->agp_buffers_offset = (dev_priv->buffers->offset
+						- dev->sg->handle
+						+ dev_priv->agp_vm_start);
+
+	DRM_DEBUG( "dev_priv->agp_size %d\n",
+		   dev_priv->agp_size );
+	DRM_DEBUG( "dev_priv->agp_vm_start 0x%x\n",
+		   dev_priv->agp_vm_start );
+	DRM_DEBUG( "dev_priv->agp_buffers_offset 0x%lx\n",
+		   dev_priv->agp_buffers_offset );
+
+	dev_priv->ring.head = ((__volatile__ u32 *)
+			       dev_priv->ring_rptr->handle);
+
+	dev_priv->ring.start = (u32 *)dev_priv->cp_ring->handle;
+	dev_priv->ring.end = ((u32 *)dev_priv->cp_ring->handle
+			      + init->ring_size / sizeof(u32));
+	dev_priv->ring.size = init->ring_size;
+	dev_priv->ring.size_l2qw = DRM(order)( init->ring_size / 8 );
+
+	dev_priv->ring.tail_mask =
+		(dev_priv->ring.size / sizeof(u32)) - 1;
+
+	dev_priv->ring.high_mark = RADEON_RING_HIGH_MARK;
+	dev_priv->ring.ring_rptr = dev_priv->ring_rptr;
+
+#if __REALLY_HAVE_SG
+	if ( dev_priv->is_pci ) {
+		if (!DRM(ati_pcigart_init)( dev, &dev_priv->phys_pci_gart,
+					    &dev_priv->bus_pci_gart)) {
+			DRM_ERROR( "failed to init PCI GART!\n" );
+			dev->dev_private = (void *)dev_priv;
+			radeon_do_cleanup_cp(dev);
+			return DRM_ERR(ENOMEM);
+		}
+		/* Turn on PCI GART
+		 */
+		tmp = RADEON_READ( RADEON_AIC_CNTL )
+		      | RADEON_PCIGART_TRANSLATE_EN;
+		RADEON_WRITE( RADEON_AIC_CNTL, tmp );
+
+		/* set PCI GART page-table base address
+		 */
+		RADEON_WRITE( RADEON_AIC_PT_BASE, dev_priv->bus_pci_gart );
+
+		/* set address range for PCI address translate
+		 */
+		RADEON_WRITE( RADEON_AIC_LO_ADDR, dev_priv->agp_vm_start );
+		RADEON_WRITE( RADEON_AIC_HI_ADDR, dev_priv->agp_vm_start
+						  + dev_priv->agp_size - 1);
+
+		/* Turn off AGP aperture -- is this required for PCIGART?
+		 */
+		RADEON_WRITE( RADEON_MC_AGP_LOCATION, 0xffffffc0 ); /* ?? */
+		RADEON_WRITE( RADEON_AGP_COMMAND, 0 ); /* clear AGP_COMMAND */
+	} else {
+#endif /* __REALLY_HAVE_SG */
+		/* Turn off PCI GART
+		 */
+		tmp = RADEON_READ( RADEON_AIC_CNTL )
+		      & ~RADEON_PCIGART_TRANSLATE_EN;
+		RADEON_WRITE( RADEON_AIC_CNTL, tmp );
+#if __REALLY_HAVE_SG
+	}
+#endif /* __REALLY_HAVE_SG */
+
+	radeon_cp_load_microcode( dev_priv );
+	radeon_cp_init_ring_buffer( dev, dev_priv );
+
+	dev_priv->last_buf = 0;
+
+	dev->dev_private = (void *)dev_priv;
+
+	radeon_do_engine_reset( dev );
+
+	return 0;
+}
+
+int radeon_do_cleanup_cp( drm_device_t *dev )
+{
+	DRM_DEBUG( "\n" );
+
+	if ( dev->dev_private ) {
+		drm_radeon_private_t *dev_priv = dev->dev_private;
+
+		if ( !dev_priv->is_pci ) {
+			DRM_IOREMAPFREE( dev_priv->cp_ring );
+			DRM_IOREMAPFREE( dev_priv->ring_rptr );
+			DRM_IOREMAPFREE( dev_priv->buffers );
+		} else {
+#if __REALLY_HAVE_SG
+			if (!DRM(ati_pcigart_cleanup)( dev,
+						dev_priv->phys_pci_gart,
+						dev_priv->bus_pci_gart ))
+				DRM_ERROR( "failed to cleanup PCI GART!\n" );
+#endif /* __REALLY_HAVE_SG */
+		}
+
+		DRM(free)( dev->dev_private, sizeof(drm_radeon_private_t),
+			   DRM_MEM_DRIVER );
+		dev->dev_private = NULL;
+	}
+
+	return 0;
+}
+
+int radeon_cp_init( DRM_IOCTL_ARGS )
+{
+	DRM_DEVICE;
+	drm_radeon_init_t init;
+
+	DRM_COPY_FROM_USER_IOCTL( init, (drm_radeon_init_t *)data, sizeof(init) );
+
+	switch ( init.func ) {
+	case RADEON_INIT_CP:
+	case RADEON_INIT_R200_CP:
+		return radeon_do_init_cp( dev, &init );
+	case RADEON_CLEANUP_CP:
+		return radeon_do_cleanup_cp( dev );
+	}
+
+	return DRM_ERR(EINVAL);
+}
+
+int radeon_cp_start( DRM_IOCTL_ARGS )
+{
+	DRM_DEVICE;
+	drm_radeon_private_t *dev_priv = dev->dev_private;
+	DRM_DEBUG( "\n" );
+
+	LOCK_TEST_WITH_RETURN( dev, filp );
+
+	if ( dev_priv->cp_running ) {
+		DRM_DEBUG( "%s while CP running\n", __FUNCTION__ );
+		return 0;
+	}
+	if ( dev_priv->cp_mode == RADEON_CSQ_PRIDIS_INDDIS ) {
+		DRM_DEBUG( "%s called with bogus CP mode (%d)\n",
+			   __FUNCTION__, dev_priv->cp_mode );
+		return 0;
+	}
+
+	radeon_do_cp_start( dev_priv );
+
+	return 0;
+}
+
+/* Stop the CP.  The engine must have been idled before calling this
+ * routine.
+ */
+int radeon_cp_stop( DRM_IOCTL_ARGS )
+{
+	DRM_DEVICE;
+	drm_radeon_private_t *dev_priv = dev->dev_private;
+	drm_radeon_cp_stop_t stop;
+	int ret;
+	DRM_DEBUG( "\n" );
+
+	LOCK_TEST_WITH_RETURN( dev, filp );
+
+	DRM_COPY_FROM_USER_IOCTL( stop, (drm_radeon_cp_stop_t *)data, sizeof(stop) );
+
+	if (!dev_priv->cp_running)
+		return 0;
+
+	/* Flush any pending CP commands.  This ensures any outstanding
+	 * commands are exectuted by the engine before we turn it off.
+	 */
+	if ( stop.flush ) {
+		radeon_do_cp_flush( dev_priv );
+	}
+
+	/* If we fail to make the engine go idle, we return an error
+	 * code so that the DRM ioctl wrapper can try again.
+	 */
+	if ( stop.idle ) {
+		ret = radeon_do_cp_idle( dev_priv );
+		if ( ret ) return ret;
+	}
+
+	/* Finally, we can turn off the CP.  If the engine isn't idle,
+	 * we will get some dropped triangles as they won't be fully
+	 * rendered before the CP is shut down.
+	 */
+	radeon_do_cp_stop( dev_priv );
+
+	/* Reset the engine */
+	radeon_do_engine_reset( dev );
+
+	return 0;
+}
+
+
+void radeon_do_release( drm_device_t *dev )
+{
+	drm_radeon_private_t *dev_priv = dev->dev_private;
+	int ret;
+
+	if (dev_priv) {
+		if (dev_priv->cp_running) {
+			/* Stop the cp */
+			while ((ret = radeon_do_cp_idle( dev_priv )) != 0) {
+				DRM_DEBUG("radeon_do_cp_idle %d\n", ret);
+#ifdef __linux__
+				schedule();
+#else
+				tsleep(&ret, PZERO, "rdnrel", 1);
+#endif
+			}
+			radeon_do_cp_stop( dev_priv );
+			radeon_do_engine_reset( dev );
+		}
+
+		/* Disable *all* interrupts */
+		RADEON_WRITE( RADEON_GEN_INT_CNTL, 0 );
+
+		/* Free memory heap structures */
+		radeon_mem_takedown( &(dev_priv->agp_heap) );
+		radeon_mem_takedown( &(dev_priv->fb_heap) );
+
+		/* deallocate kernel resources */
+		radeon_do_cleanup_cp( dev );
+	}
+}
+
+/* Just reset the CP ring.  Called as part of an X Server engine reset.
+ */
+int radeon_cp_reset( DRM_IOCTL_ARGS )
+{
+	DRM_DEVICE;
+	drm_radeon_private_t *dev_priv = dev->dev_private;
+	DRM_DEBUG( "\n" );
+
+	LOCK_TEST_WITH_RETURN( dev, filp );
+
+	if ( !dev_priv ) {
+		DRM_DEBUG( "%s called before init done\n", __FUNCTION__ );
+		return DRM_ERR(EINVAL);
+	}
+
+	radeon_do_cp_reset( dev_priv );
+
+	/* The CP is no longer running after an engine reset */
+	dev_priv->cp_running = 0;
+
+	return 0;
+}
+
+int radeon_cp_idle( DRM_IOCTL_ARGS )
+{
+	DRM_DEVICE;
+	drm_radeon_private_t *dev_priv = dev->dev_private;
+	DRM_DEBUG( "\n" );
+
+	LOCK_TEST_WITH_RETURN( dev, filp );
+
+	return radeon_do_cp_idle( dev_priv );
+}
+
+int radeon_engine_reset( DRM_IOCTL_ARGS )
+{
+	DRM_DEVICE;
+	DRM_DEBUG( "\n" );
+
+	LOCK_TEST_WITH_RETURN( dev, filp );
+
+	return radeon_do_engine_reset( dev );
+}
+
+
+/* ================================================================
+ * Fullscreen mode
+ */
+
+/* KW: Deprecated to say the least:
+ */
+int radeon_fullscreen( DRM_IOCTL_ARGS )
+{
+	return 0;
+}
+
+
+/* ================================================================
+ * Freelist management
+ */
+
+/* Original comment: FIXME: ROTATE_BUFS is a hack to cycle through
+ *   bufs until freelist code is used.  Note this hides a problem with
+ *   the scratch register * (used to keep track of last buffer
+ *   completed) being written to before * the last buffer has actually
+ *   completed rendering.  
+ *
+ * KW:  It's also a good way to find free buffers quickly.
+ *
+ * KW: Ideally this loop wouldn't exist, and freelist_get wouldn't
+ * sleep.  However, bugs in older versions of radeon_accel.c mean that
+ * we essentially have to do this, else old clients will break.
+ * 
+ * However, it does leave open a potential deadlock where all the
+ * buffers are held by other clients, which can't release them because
+ * they can't get the lock.  
+ */
+
+drm_buf_t *radeon_freelist_get( drm_device_t *dev )
+{
+	drm_device_dma_t *dma = dev->dma;
+	drm_radeon_private_t *dev_priv = dev->dev_private;
+	drm_radeon_buf_priv_t *buf_priv;
+	drm_buf_t *buf;
+	int i, t;
+	int start;
+
+	if ( ++dev_priv->last_buf >= dma->buf_count )
+		dev_priv->last_buf = 0;
+
+	start = dev_priv->last_buf;
+
+	for ( t = 0 ; t < dev_priv->usec_timeout ; t++ ) {
+		u32 done_age = GET_SCRATCH( 1 );
+		DRM_DEBUG("done_age = %d\n",done_age);
+		for ( i = start ; i < dma->buf_count ; i++ ) {
+			buf = dma->buflist[i];
+			buf_priv = buf->dev_private;
+			if ( buf->filp == 0 || (buf->pending && 
+					       buf_priv->age <= done_age) ) {
+				dev_priv->stats.requested_bufs++;
+				buf->pending = 0;
+				return buf;
+			}
+			start = 0;
+		}
+
+		if (t) {
+			DRM_UDELAY( 1 );
+			dev_priv->stats.freelist_loops++;
+		}
+	}
+
+	DRM_DEBUG( "returning NULL!\n" );
+	return NULL;
+}
+#if 0
+drm_buf_t *radeon_freelist_get( drm_device_t *dev )
+{
+	drm_device_dma_t *dma = dev->dma;
+	drm_radeon_private_t *dev_priv = dev->dev_private;
+	drm_radeon_buf_priv_t *buf_priv;
+	drm_buf_t *buf;
+	int i, t;
+	int start;
+	u32 done_age = DRM_READ32(dev_priv->ring_rptr, RADEON_SCRATCHOFF(1));
+
+	if ( ++dev_priv->last_buf >= dma->buf_count )
+		dev_priv->last_buf = 0;
+
+	start = dev_priv->last_buf;
+	dev_priv->stats.freelist_loops++;
+	
+	for ( t = 0 ; t < 2 ; t++ ) {
+		for ( i = start ; i < dma->buf_count ; i++ ) {
+			buf = dma->buflist[i];
+			buf_priv = buf->dev_private;
+			if ( buf->filp == 0 || (buf->pending && 
+					       buf_priv->age <= done_age) ) {
+				dev_priv->stats.requested_bufs++;
+				buf->pending = 0;
+				return buf;
+			}
+		}
+		start = 0;
+	}
+
+	return NULL;
+}
+#endif
+
+void radeon_freelist_reset( drm_device_t *dev )
+{
+	drm_device_dma_t *dma = dev->dma;
+	drm_radeon_private_t *dev_priv = dev->dev_private;
+	int i;
+
+	dev_priv->last_buf = 0;
+	for ( i = 0 ; i < dma->buf_count ; i++ ) {
+		drm_buf_t *buf = dma->buflist[i];
+		drm_radeon_buf_priv_t *buf_priv = buf->dev_private;
+		buf_priv->age = 0;
+	}
+}
+
+
+/* ================================================================
+ * CP command submission
+ */
+
+int radeon_wait_ring( drm_radeon_private_t *dev_priv, int n )
+{
+	drm_radeon_ring_buffer_t *ring = &dev_priv->ring;
+	int i;
+	u32 last_head = GET_RING_HEAD(ring);
+
+	for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) {
+		u32 head = GET_RING_HEAD(ring);
+
+		ring->space = (head - ring->tail) * sizeof(u32);
+		if ( ring->space <= 0 )
+			ring->space += ring->size;
+		if ( ring->space > n )
+			return 0;
+		
+		dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE;
+
+		if (head != last_head)
+			i = 0;
+		last_head = head;
+
+		DRM_UDELAY( 1 );
+	}
+
+	/* FIXME: This return value is ignored in the BEGIN_RING macro! */
+#if RADEON_FIFO_DEBUG
+	radeon_status( dev_priv );
+	DRM_ERROR( "failed!\n" );
+#endif
+	return DRM_ERR(EBUSY);
+}
+
+static int radeon_cp_get_buffers( DRMFILE filp, drm_device_t *dev, drm_dma_t *d )
+{
+	int i;
+	drm_buf_t *buf;
+
+	for ( i = d->granted_count ; i < d->request_count ; i++ ) {
+		buf = radeon_freelist_get( dev );
+		if ( !buf ) return DRM_ERR(EBUSY); /* NOTE: broken client */
+
+		buf->filp = filp;
+
+		if ( DRM_COPY_TO_USER( &d->request_indices[i], &buf->idx,
+				   sizeof(buf->idx) ) )
+			return DRM_ERR(EFAULT);
+		if ( DRM_COPY_TO_USER( &d->request_sizes[i], &buf->total,
+				   sizeof(buf->total) ) )
+			return DRM_ERR(EFAULT);
+
+		d->granted_count++;
+	}
+	return 0;
+}
+
+int radeon_cp_buffers( DRM_IOCTL_ARGS )
+{
+	DRM_DEVICE;
+	drm_device_dma_t *dma = dev->dma;
+	int ret = 0;
+	drm_dma_t d;
+
+	LOCK_TEST_WITH_RETURN( dev, filp );
+
+	DRM_COPY_FROM_USER_IOCTL( d, (drm_dma_t *)data, sizeof(d) );
+
+	/* Please don't send us buffers.
+	 */
+	if ( d.send_count != 0 ) {
+		DRM_ERROR( "Process %d trying to send %d buffers via drmDMA\n",
+			   DRM_CURRENTPID, d.send_count );
+		return DRM_ERR(EINVAL);
+	}
+
+	/* We'll send you buffers.
+	 */
+	if ( d.request_count < 0 || d.request_count > dma->buf_count ) {
+		DRM_ERROR( "Process %d trying to get %d buffers (of %d max)\n",
+			   DRM_CURRENTPID, d.request_count, dma->buf_count );
+		return DRM_ERR(EINVAL);
+	}
+
+	d.granted_count = 0;
+
+	if ( d.request_count ) {
+		ret = radeon_cp_get_buffers( filp, dev, &d );
+	}
+
+	DRM_COPY_TO_USER_IOCTL( (drm_dma_t *)data, d, sizeof(d) );
+
+	return ret;
+}
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/radeon_drm.h b/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/radeon_drm.h
new file mode 100644
index 000000000..3ab573093
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/radeon_drm.h
@@ -0,0 +1,576 @@
+/* radeon_drm.h -- Public header for the radeon driver -*- linux-c -*-
+ *
+ * Copyright 2000 Precision Insight, Inc., Cedar Park, Texas.
+ * Copyright 2000 VA Linux Systems, Inc., Fremont, California.
+ * Copyright 2002 Tungsten Graphics, Inc., Cedar Park, Texas.
+ * All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ *    Kevin E. Martin <martin@valinux.com>
+ *    Gareth Hughes <gareth@valinux.com>
+ *    Keith Whitwell <keith@tungstengraphics.com>
+ */
+
+#ifndef __RADEON_DRM_H__
+#define __RADEON_DRM_H__
+
+/* WARNING: If you change any of these defines, make sure to change the
+ * defines in the X server file (radeon_sarea.h)
+ */
+#ifndef __RADEON_SAREA_DEFINES__
+#define __RADEON_SAREA_DEFINES__
+
+/* Old style state flags, required for sarea interface (1.1 and 1.2
+ * clears) and 1.2 drm_vertex2 ioctl.
+ */
+#define RADEON_UPLOAD_CONTEXT		0x00000001
+#define RADEON_UPLOAD_VERTFMT		0x00000002
+#define RADEON_UPLOAD_LINE		0x00000004
+#define RADEON_UPLOAD_BUMPMAP		0x00000008
+#define RADEON_UPLOAD_MASKS		0x00000010
+#define RADEON_UPLOAD_VIEWPORT		0x00000020
+#define RADEON_UPLOAD_SETUP		0x00000040
+#define RADEON_UPLOAD_TCL		0x00000080
+#define RADEON_UPLOAD_MISC		0x00000100
+#define RADEON_UPLOAD_TEX0		0x00000200
+#define RADEON_UPLOAD_TEX1		0x00000400
+#define RADEON_UPLOAD_TEX2		0x00000800
+#define RADEON_UPLOAD_TEX0IMAGES	0x00001000
+#define RADEON_UPLOAD_TEX1IMAGES	0x00002000
+#define RADEON_UPLOAD_TEX2IMAGES	0x00004000
+#define RADEON_UPLOAD_CLIPRECTS		0x00008000 /* handled client-side */
+#define RADEON_REQUIRE_QUIESCENCE	0x00010000
+#define RADEON_UPLOAD_ZBIAS		0x00020000 /* version 1.2 and newer */
+#define RADEON_UPLOAD_ALL		0x003effff
+#define RADEON_UPLOAD_CONTEXT_ALL       0x003e01ff
+
+
+/* New style per-packet identifiers for use in cmd_buffer ioctl with
+ * the RADEON_EMIT_PACKET command.  Comments relate new packets to old
+ * state bits and the packet size:
+ */
+#define RADEON_EMIT_PP_MISC                         0 /* context/7 */
+#define RADEON_EMIT_PP_CNTL                         1 /* context/3 */
+#define RADEON_EMIT_RB3D_COLORPITCH                 2 /* context/1 */
+#define RADEON_EMIT_RE_LINE_PATTERN                 3 /* line/2 */
+#define RADEON_EMIT_SE_LINE_WIDTH                   4 /* line/1 */
+#define RADEON_EMIT_PP_LUM_MATRIX                   5 /* bumpmap/1 */
+#define RADEON_EMIT_PP_ROT_MATRIX_0                 6 /* bumpmap/2 */
+#define RADEON_EMIT_RB3D_STENCILREFMASK             7 /* masks/3 */
+#define RADEON_EMIT_SE_VPORT_XSCALE                 8 /* viewport/6 */
+#define RADEON_EMIT_SE_CNTL                         9 /* setup/2 */
+#define RADEON_EMIT_SE_CNTL_STATUS                  10 /* setup/1 */
+#define RADEON_EMIT_RE_MISC                         11 /* misc/1 */
+#define RADEON_EMIT_PP_TXFILTER_0                   12 /* tex0/6 */
+#define RADEON_EMIT_PP_BORDER_COLOR_0               13 /* tex0/1 */
+#define RADEON_EMIT_PP_TXFILTER_1                   14 /* tex1/6 */
+#define RADEON_EMIT_PP_BORDER_COLOR_1               15 /* tex1/1 */
+#define RADEON_EMIT_PP_TXFILTER_2                   16 /* tex2/6 */
+#define RADEON_EMIT_PP_BORDER_COLOR_2               17 /* tex2/1 */
+#define RADEON_EMIT_SE_ZBIAS_FACTOR                 18 /* zbias/2 */
+#define RADEON_EMIT_SE_TCL_OUTPUT_VTX_FMT           19 /* tcl/11 */
+#define RADEON_EMIT_SE_TCL_MATERIAL_EMMISSIVE_RED   20 /* material/17 */
+#define R200_EMIT_PP_TXCBLEND_0                     21 /* tex0/4 */
+#define R200_EMIT_PP_TXCBLEND_1                     22 /* tex1/4 */
+#define R200_EMIT_PP_TXCBLEND_2                     23 /* tex2/4 */
+#define R200_EMIT_PP_TXCBLEND_3                     24 /* tex3/4 */
+#define R200_EMIT_PP_TXCBLEND_4                     25 /* tex4/4 */
+#define R200_EMIT_PP_TXCBLEND_5                     26 /* tex5/4 */
+#define R200_EMIT_PP_TXCBLEND_6                     27 /* /4 */
+#define R200_EMIT_PP_TXCBLEND_7                     28 /* /4 */
+#define R200_EMIT_TCL_LIGHT_MODEL_CTL_0             29 /* tcl/7 */
+#define R200_EMIT_TFACTOR_0                         30 /* tf/7 */
+#define R200_EMIT_VTX_FMT_0                         31 /* vtx/5 */
+#define R200_EMIT_VAP_CTL                           32 /* vap/1 */
+#define R200_EMIT_MATRIX_SELECT_0                   33 /* msl/5 */
+#define R200_EMIT_TEX_PROC_CTL_2                    34 /* tcg/5 */
+#define R200_EMIT_TCL_UCP_VERT_BLEND_CTL            35 /* tcl/1 */
+#define R200_EMIT_PP_TXFILTER_0                     36 /* tex0/6 */
+#define R200_EMIT_PP_TXFILTER_1                     37 /* tex1/6 */
+#define R200_EMIT_PP_TXFILTER_2                     38 /* tex2/6 */
+#define R200_EMIT_PP_TXFILTER_3                     39 /* tex3/6 */
+#define R200_EMIT_PP_TXFILTER_4                     40 /* tex4/6 */
+#define R200_EMIT_PP_TXFILTER_5                     41 /* tex5/6 */
+#define R200_EMIT_PP_TXOFFSET_0                     42 /* tex0/1 */
+#define R200_EMIT_PP_TXOFFSET_1                     43 /* tex1/1 */
+#define R200_EMIT_PP_TXOFFSET_2                     44 /* tex2/1 */
+#define R200_EMIT_PP_TXOFFSET_3                     45 /* tex3/1 */
+#define R200_EMIT_PP_TXOFFSET_4                     46 /* tex4/1 */
+#define R200_EMIT_PP_TXOFFSET_5                     47 /* tex5/1 */
+#define R200_EMIT_VTE_CNTL                          48 /* vte/1 */
+#define R200_EMIT_OUTPUT_VTX_COMP_SEL               49 /* vtx/1 */
+#define R200_EMIT_PP_TAM_DEBUG3                     50 /* tam/1 */
+#define R200_EMIT_PP_CNTL_X                         51 /* cst/1 */
+#define R200_EMIT_RB3D_DEPTHXY_OFFSET               52 /* cst/1 */
+#define R200_EMIT_RE_AUX_SCISSOR_CNTL               53 /* cst/1 */
+#define R200_EMIT_RE_SCISSOR_TL_0                   54 /* cst/2 */
+#define R200_EMIT_RE_SCISSOR_TL_1                   55 /* cst/2 */
+#define R200_EMIT_RE_SCISSOR_TL_2                   56 /* cst/2 */
+#define R200_EMIT_SE_VAP_CNTL_STATUS                57 /* cst/1 */
+#define R200_EMIT_SE_VTX_STATE_CNTL                 58 /* cst/1 */
+#define R200_EMIT_RE_POINTSIZE                      59 /* cst/1 */
+#define R200_EMIT_TCL_INPUT_VTX_VECTOR_ADDR_0       60 /* cst/4 */
+#define R200_EMIT_PP_CUBIC_FACES_0                  61
+#define R200_EMIT_PP_CUBIC_OFFSETS_0                62
+#define R200_EMIT_PP_CUBIC_FACES_1                  63
+#define R200_EMIT_PP_CUBIC_OFFSETS_1                64
+#define R200_EMIT_PP_CUBIC_FACES_2                  65
+#define R200_EMIT_PP_CUBIC_OFFSETS_2                66
+#define R200_EMIT_PP_CUBIC_FACES_3                  67
+#define R200_EMIT_PP_CUBIC_OFFSETS_3                68
+#define R200_EMIT_PP_CUBIC_FACES_4                  69
+#define R200_EMIT_PP_CUBIC_OFFSETS_4                70
+#define R200_EMIT_PP_CUBIC_FACES_5                  71
+#define R200_EMIT_PP_CUBIC_OFFSETS_5                72
+#define RADEON_MAX_STATE_PACKETS                    73
+
+
+/* Commands understood by cmd_buffer ioctl.  More can be added but
+ * obviously these can't be removed or changed:
+ */
+#define RADEON_CMD_PACKET      1 /* emit one of the register packets above */
+#define RADEON_CMD_SCALARS     2 /* emit scalar data */
+#define RADEON_CMD_VECTORS     3 /* emit vector data */
+#define RADEON_CMD_DMA_DISCARD 4 /* discard current dma buf */
+#define RADEON_CMD_PACKET3     5 /* emit hw packet */
+#define RADEON_CMD_PACKET3_CLIP 6 /* emit hw packet wrapped in cliprects */
+#define RADEON_CMD_SCALARS2     7 /* r200 stopgap */
+#define RADEON_CMD_WAIT         8 /* emit hw wait commands -- note:
+				   *  doesn't make the cpu wait, just
+				   *  the graphics hardware */
+
+
+typedef union {
+	int i;
+	struct { 
+		unsigned char cmd_type, pad0, pad1, pad2;
+	} header;
+	struct { 
+		unsigned char cmd_type, packet_id, pad0, pad1;
+	} packet;
+	struct { 
+		unsigned char cmd_type, offset, stride, count; 
+	} scalars;
+	struct { 
+		unsigned char cmd_type, offset, stride, count; 
+	} vectors;
+	struct { 
+		unsigned char cmd_type, buf_idx, pad0, pad1; 
+	} dma;
+	struct { 
+		unsigned char cmd_type, flags, pad0, pad1; 
+	} wait;
+} drm_radeon_cmd_header_t;
+
+#define RADEON_WAIT_2D  0x1
+#define RADEON_WAIT_3D  0x2
+
+
+#define RADEON_FRONT			0x1
+#define RADEON_BACK			0x2
+#define RADEON_DEPTH			0x4
+#define RADEON_STENCIL                  0x8
+
+/* Primitive types
+ */
+#define RADEON_POINTS			0x1
+#define RADEON_LINES			0x2
+#define RADEON_LINE_STRIP		0x3
+#define RADEON_TRIANGLES		0x4
+#define RADEON_TRIANGLE_FAN		0x5
+#define RADEON_TRIANGLE_STRIP		0x6
+
+/* Vertex/indirect buffer size
+ */
+#define RADEON_BUFFER_SIZE		65536
+
+/* Byte offsets for indirect buffer data
+ */
+#define RADEON_INDEX_PRIM_OFFSET	20
+
+#define RADEON_SCRATCH_REG_OFFSET	32
+
+#define RADEON_NR_SAREA_CLIPRECTS	12
+
+/* There are 2 heaps (local/AGP).  Each region within a heap is a
+ * minimum of 64k, and there are at most 64 of them per heap.
+ */
+#define RADEON_LOCAL_TEX_HEAP		0
+#define RADEON_AGP_TEX_HEAP		1
+#define RADEON_NR_TEX_HEAPS		2
+#define RADEON_NR_TEX_REGIONS		64
+#define RADEON_LOG_TEX_GRANULARITY	16
+
+#define RADEON_MAX_TEXTURE_LEVELS	12
+#define RADEON_MAX_TEXTURE_UNITS	3
+
+#endif /* __RADEON_SAREA_DEFINES__ */
+
+typedef struct {
+	unsigned int red;
+	unsigned int green;
+	unsigned int blue;
+	unsigned int alpha;
+} radeon_color_regs_t;
+
+typedef struct {
+	/* Context state */
+	unsigned int pp_misc;				/* 0x1c14 */
+	unsigned int pp_fog_color;
+	unsigned int re_solid_color;
+	unsigned int rb3d_blendcntl;
+	unsigned int rb3d_depthoffset;
+	unsigned int rb3d_depthpitch;
+	unsigned int rb3d_zstencilcntl;
+
+	unsigned int pp_cntl;				/* 0x1c38 */
+	unsigned int rb3d_cntl;
+	unsigned int rb3d_coloroffset;
+	unsigned int re_width_height;
+	unsigned int rb3d_colorpitch;
+	unsigned int se_cntl;
+
+	/* Vertex format state */
+	unsigned int se_coord_fmt;			/* 0x1c50 */
+
+	/* Line state */
+	unsigned int re_line_pattern;			/* 0x1cd0 */
+	unsigned int re_line_state;
+
+	unsigned int se_line_width;			/* 0x1db8 */
+
+	/* Bumpmap state */
+	unsigned int pp_lum_matrix;			/* 0x1d00 */
+
+	unsigned int pp_rot_matrix_0;			/* 0x1d58 */
+	unsigned int pp_rot_matrix_1;
+
+	/* Mask state */
+	unsigned int rb3d_stencilrefmask;		/* 0x1d7c */
+	unsigned int rb3d_ropcntl;
+	unsigned int rb3d_planemask;
+
+	/* Viewport state */
+	unsigned int se_vport_xscale;			/* 0x1d98 */
+	unsigned int se_vport_xoffset;
+	unsigned int se_vport_yscale;
+	unsigned int se_vport_yoffset;
+	unsigned int se_vport_zscale;
+	unsigned int se_vport_zoffset;
+
+	/* Setup state */
+	unsigned int se_cntl_status;			/* 0x2140 */
+
+	/* Misc state */
+	unsigned int re_top_left;			/* 0x26c0 */
+	unsigned int re_misc;
+} drm_radeon_context_regs_t;
+
+typedef struct {
+	/* Zbias state */
+	unsigned int se_zbias_factor;			/* 0x1dac */
+	unsigned int se_zbias_constant;
+} drm_radeon_context2_regs_t;
+
+
+/* Setup registers for each texture unit
+ */
+typedef struct {
+	unsigned int pp_txfilter;
+	unsigned int pp_txformat;
+	unsigned int pp_txoffset;
+	unsigned int pp_txcblend;
+	unsigned int pp_txablend;
+	unsigned int pp_tfactor;
+	unsigned int pp_border_color;
+} drm_radeon_texture_regs_t;
+
+typedef struct {
+	unsigned int start;
+	unsigned int finish;
+	unsigned int prim:8;
+	unsigned int stateidx:8;
+	unsigned int numverts:16; /* overloaded as offset/64 for elt prims */
+        unsigned int vc_format;   /* vertex format */
+} drm_radeon_prim_t;
+
+
+typedef struct {
+	drm_radeon_context_regs_t context;
+	drm_radeon_texture_regs_t tex[RADEON_MAX_TEXTURE_UNITS];
+	drm_radeon_context2_regs_t context2;
+	unsigned int dirty;
+} drm_radeon_state_t;
+
+
+typedef struct {
+	unsigned char next, prev;
+	unsigned char in_use;
+	int age;
+} drm_radeon_tex_region_t;
+
+typedef struct {
+	/* The channel for communication of state information to the
+	 * kernel on firing a vertex buffer with either of the
+	 * obsoleted vertex/index ioctls.
+	 */
+	drm_radeon_context_regs_t context_state;
+	drm_radeon_texture_regs_t tex_state[RADEON_MAX_TEXTURE_UNITS];
+	unsigned int dirty;
+	unsigned int vertsize;
+	unsigned int vc_format;
+
+	/* The current cliprects, or a subset thereof.
+	 */
+	drm_clip_rect_t boxes[RADEON_NR_SAREA_CLIPRECTS];
+	unsigned int nbox;
+
+	/* Counters for client-side throttling of rendering clients.
+	 */
+	unsigned int last_frame;
+	unsigned int last_dispatch;
+	unsigned int last_clear;
+
+	drm_radeon_tex_region_t tex_list[RADEON_NR_TEX_HEAPS][RADEON_NR_TEX_REGIONS+1];
+	int tex_age[RADEON_NR_TEX_HEAPS];
+	int ctx_owner;
+        int pfState;                /* number of 3d windows (0,1,2ormore) */
+        int pfCurrentPage;	    /* which buffer is being displayed? */
+	int crtc2_base;		    /* CRTC2 frame offset */
+} drm_radeon_sarea_t;
+
+
+/* WARNING: If you change any of these defines, make sure to change the
+ * defines in the Xserver file (xf86drmRadeon.h)
+ *
+ * KW: actually it's illegal to change any of this (backwards compatibility).
+ */
+
+/* Radeon specific ioctls
+ * The device specific ioctl range is 0x40 to 0x79.
+ */
+#define DRM_IOCTL_RADEON_CP_INIT    DRM_IOW( 0x40, drm_radeon_init_t)
+#define DRM_IOCTL_RADEON_CP_START   DRM_IO(  0x41)
+#define DRM_IOCTL_RADEON_CP_STOP    DRM_IOW( 0x42, drm_radeon_cp_stop_t)
+#define DRM_IOCTL_RADEON_CP_RESET   DRM_IO(  0x43)
+#define DRM_IOCTL_RADEON_CP_IDLE    DRM_IO(  0x44)
+#define DRM_IOCTL_RADEON_RESET      DRM_IO(  0x45)
+#define DRM_IOCTL_RADEON_FULLSCREEN DRM_IOW( 0x46, drm_radeon_fullscreen_t)
+#define DRM_IOCTL_RADEON_SWAP       DRM_IO(  0x47)
+#define DRM_IOCTL_RADEON_CLEAR      DRM_IOW( 0x48, drm_radeon_clear_t)
+#define DRM_IOCTL_RADEON_VERTEX     DRM_IOW( 0x49, drm_radeon_vertex_t)
+#define DRM_IOCTL_RADEON_INDICES    DRM_IOW( 0x4a, drm_radeon_indices_t)
+#define DRM_IOCTL_RADEON_STIPPLE    DRM_IOW( 0x4c, drm_radeon_stipple_t)
+#define DRM_IOCTL_RADEON_INDIRECT   DRM_IOWR(0x4d, drm_radeon_indirect_t)
+#define DRM_IOCTL_RADEON_TEXTURE    DRM_IOWR(0x4e, drm_radeon_texture_t)
+#define DRM_IOCTL_RADEON_VERTEX2    DRM_IOW( 0x4f, drm_radeon_vertex2_t)
+#define DRM_IOCTL_RADEON_CMDBUF     DRM_IOW( 0x50, drm_radeon_cmd_buffer_t)
+#define DRM_IOCTL_RADEON_GETPARAM   DRM_IOWR(0x51, drm_radeon_getparam_t)
+#define DRM_IOCTL_RADEON_FLIP	    DRM_IO(  0x52)
+#define DRM_IOCTL_RADEON_ALLOC      DRM_IOWR( 0x53, drm_radeon_mem_alloc_t)
+#define DRM_IOCTL_RADEON_FREE       DRM_IOW( 0x54, drm_radeon_mem_free_t)
+#define DRM_IOCTL_RADEON_INIT_HEAP  DRM_IOW( 0x55, drm_radeon_mem_init_heap_t)
+#define DRM_IOCTL_RADEON_IRQ_EMIT   DRM_IOWR( 0x56, drm_radeon_irq_emit_t)
+#define DRM_IOCTL_RADEON_IRQ_WAIT   DRM_IOW( 0x57, drm_radeon_irq_wait_t)
+
+typedef struct drm_radeon_init {
+	enum {
+		RADEON_INIT_CP    = 0x01,
+		RADEON_CLEANUP_CP = 0x02,
+		RADEON_INIT_R200_CP = 0x03
+	} func;
+	unsigned long sarea_priv_offset;
+	int is_pci;
+	int cp_mode;
+	int agp_size;
+	int ring_size;
+	int usec_timeout;
+
+	unsigned int fb_bpp;
+	unsigned int front_offset, front_pitch;
+	unsigned int back_offset, back_pitch;
+	unsigned int depth_bpp;
+	unsigned int depth_offset, depth_pitch;
+
+	unsigned long fb_offset;
+	unsigned long mmio_offset;
+	unsigned long ring_offset;
+	unsigned long ring_rptr_offset;
+	unsigned long buffers_offset;
+	unsigned long agp_textures_offset;
+} drm_radeon_init_t;
+
+typedef struct drm_radeon_cp_stop {
+	int flush;
+	int idle;
+} drm_radeon_cp_stop_t;
+
+typedef struct drm_radeon_fullscreen {
+	enum {
+		RADEON_INIT_FULLSCREEN    = 0x01,
+		RADEON_CLEANUP_FULLSCREEN = 0x02
+	} func;
+} drm_radeon_fullscreen_t;
+
+#define CLEAR_X1	0
+#define CLEAR_Y1	1
+#define CLEAR_X2	2
+#define CLEAR_Y2	3
+#define CLEAR_DEPTH	4
+
+typedef union drm_radeon_clear_rect {
+	float f[5];
+	unsigned int ui[5];
+} drm_radeon_clear_rect_t;
+
+typedef struct drm_radeon_clear {
+	unsigned int flags;
+	unsigned int clear_color;
+	unsigned int clear_depth;
+	unsigned int color_mask;
+	unsigned int depth_mask;   /* misnamed field:  should be stencil */
+	drm_radeon_clear_rect_t *depth_boxes;
+} drm_radeon_clear_t;
+
+typedef struct drm_radeon_vertex {
+	int prim;
+	int idx;			/* Index of vertex buffer */
+	int count;			/* Number of vertices in buffer */
+	int discard;			/* Client finished with buffer? */
+} drm_radeon_vertex_t;
+
+typedef struct drm_radeon_indices {
+	int prim;
+	int idx;
+	int start;
+	int end;
+	int discard;			/* Client finished with buffer? */
+} drm_radeon_indices_t;
+
+/* v1.2 - obsoletes drm_radeon_vertex and drm_radeon_indices
+ *      - allows multiple primitives and state changes in a single ioctl
+ *      - supports driver change to emit native primitives
+ */
+typedef struct drm_radeon_vertex2 {
+	int idx;			/* Index of vertex buffer */
+	int discard;			/* Client finished with buffer? */
+	int nr_states;
+	drm_radeon_state_t *state;
+	int nr_prims;
+	drm_radeon_prim_t *prim;
+} drm_radeon_vertex2_t;
+
+/* v1.3 - obsoletes drm_radeon_vertex2
+ *      - allows arbitarily large cliprect list 
+ *      - allows updating of tcl packet, vector and scalar state
+ *      - allows memory-efficient description of state updates
+ *      - allows state to be emitted without a primitive 
+ *           (for clears, ctx switches)
+ *      - allows more than one dma buffer to be referenced per ioctl
+ *      - supports tcl driver
+ *      - may be extended in future versions with new cmd types, packets
+ */
+typedef struct drm_radeon_cmd_buffer {
+	int bufsz;
+	char *buf;
+	int nbox;
+	drm_clip_rect_t *boxes;
+} drm_radeon_cmd_buffer_t;
+
+typedef struct drm_radeon_tex_image {
+	unsigned int x, y;		/* Blit coordinates */
+	unsigned int width, height;
+	const void *data;
+} drm_radeon_tex_image_t;
+
+typedef struct drm_radeon_texture {
+	int offset;
+	int pitch;
+	int format;
+	int width;			/* Texture image coordinates */
+	int height;
+	drm_radeon_tex_image_t *image;
+} drm_radeon_texture_t;
+
+typedef struct drm_radeon_stipple {
+	unsigned int *mask;
+} drm_radeon_stipple_t;
+
+typedef struct drm_radeon_indirect {
+	int idx;
+	int start;
+	int end;
+	int discard;
+} drm_radeon_indirect_t;
+
+
+/* 1.3: An ioctl to get parameters that aren't available to the 3d
+ * client any other way.  
+ */
+#define RADEON_PARAM_AGP_BUFFER_OFFSET     1 /* card offset of 1st agp buffer */
+#define RADEON_PARAM_LAST_FRAME            2
+#define RADEON_PARAM_LAST_DISPATCH         3
+#define RADEON_PARAM_LAST_CLEAR            4
+#define RADEON_PARAM_IRQ_NR                5
+#define RADEON_PARAM_AGP_BASE              6 /* card offset of agp base */
+
+typedef struct drm_radeon_getparam {
+	int param;
+	int *value;
+} drm_radeon_getparam_t;
+
+/* 1.6: Set up a memory manager for regions of shared memory:
+ */
+#define RADEON_MEM_REGION_AGP 1
+#define RADEON_MEM_REGION_FB  2
+
+typedef struct drm_radeon_mem_alloc {
+	int region;
+	int alignment;
+	int size;
+	int *region_offset;	/* offset from start of fb or agp */
+} drm_radeon_mem_alloc_t;
+
+typedef struct drm_radeon_mem_free {
+	int region;
+	int region_offset;
+} drm_radeon_mem_free_t;
+
+typedef struct drm_radeon_mem_init_heap {
+	int region;
+	int size;
+	int start;	
+} drm_radeon_mem_init_heap_t;
+
+
+/* 1.6: Userspace can request & wait on irq's:
+ */
+typedef struct drm_radeon_irq_emit {
+	int *irq_seq;
+} drm_radeon_irq_emit_t;
+
+typedef struct drm_radeon_irq_wait {
+	int irq_seq;
+} drm_radeon_irq_wait_t;
+
+
+#endif
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/radeon_drv.h b/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/radeon_drv.h
new file mode 100644
index 000000000..7faffa7ab
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/radeon_drv.h
@@ -0,0 +1,895 @@
+/* radeon_drv.h -- Private header for radeon driver -*- linux-c -*-
+ *
+ * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
+ * Copyright 2000 VA Linux Systems, Inc., Fremont, California.
+ * All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ *    Kevin E. Martin <martin@valinux.com>
+ *    Gareth Hughes <gareth@valinux.com>
+ */
+
+#ifndef __RADEON_DRV_H__
+#define __RADEON_DRV_H__
+
+#define GET_RING_HEAD(ring)		DRM_READ32(  (ring)->ring_rptr, 0 ) /* (ring)->head */
+#define SET_RING_HEAD(ring,val)		DRM_WRITE32( (ring)->ring_rptr, 0, (val) ) /* (ring)->head */
+
+typedef struct drm_radeon_freelist {
+   	unsigned int age;
+   	drm_buf_t *buf;
+   	struct drm_radeon_freelist *next;
+   	struct drm_radeon_freelist *prev;
+} drm_radeon_freelist_t;
+
+typedef struct drm_radeon_ring_buffer {
+	u32 *start;
+	u32 *end;
+	int size;
+	int size_l2qw;
+
+	volatile u32 *head;
+	u32 tail;
+	u32 tail_mask;
+	int space;
+
+	int high_mark;
+	drm_local_map_t *ring_rptr;
+} drm_radeon_ring_buffer_t;
+
+typedef struct drm_radeon_depth_clear_t {
+	u32 rb3d_cntl;
+	u32 rb3d_zstencilcntl;
+	u32 se_cntl;
+} drm_radeon_depth_clear_t;
+
+
+struct mem_block {
+	struct mem_block *next;
+	struct mem_block *prev;
+	int start;
+	int size;
+	DRMFILE filp;		/* 0: free, -1: heap, other: real files */
+};
+
+typedef struct drm_radeon_private {
+	drm_radeon_ring_buffer_t ring;
+	drm_radeon_sarea_t *sarea_priv;
+
+	int agp_size;
+	u32 agp_vm_start;
+	unsigned long agp_buffers_offset;
+
+	int cp_mode;
+	int cp_running;
+
+   	drm_radeon_freelist_t *head;
+   	drm_radeon_freelist_t *tail;
+	int last_buf;
+	volatile u32 *scratch;
+	int writeback_works;
+
+	int usec_timeout;
+
+	int is_r200;
+
+	int is_pci;
+	unsigned long phys_pci_gart;
+	dma_addr_t bus_pci_gart;
+
+	struct {
+		u32 boxes;
+		int freelist_timeouts;
+		int freelist_loops;
+		int requested_bufs;
+		int last_frame_reads;
+		int last_clear_reads;
+		int clears;
+		int texture_uploads;
+	} stats;
+
+	int do_boxes;
+	int page_flipping;
+	int current_page;
+
+	u32 color_fmt;
+	unsigned int front_offset;
+	unsigned int front_pitch;
+	unsigned int back_offset;
+	unsigned int back_pitch;
+
+	u32 depth_fmt;
+	unsigned int depth_offset;
+	unsigned int depth_pitch;
+
+	u32 front_pitch_offset;
+	u32 back_pitch_offset;
+	u32 depth_pitch_offset;
+
+	drm_radeon_depth_clear_t depth_clear;
+
+	drm_local_map_t *sarea;
+	drm_local_map_t *fb;
+	drm_local_map_t *mmio;
+	drm_local_map_t *cp_ring;
+	drm_local_map_t *ring_rptr;
+	drm_local_map_t *buffers;
+	drm_local_map_t *agp_textures;
+
+	struct mem_block *agp_heap;
+	struct mem_block *fb_heap;
+
+	/* SW interrupt */
+   	wait_queue_head_t swi_queue;
+   	atomic_t swi_emitted;
+
+} drm_radeon_private_t;
+
+typedef struct drm_radeon_buf_priv {
+	u32 age;
+} drm_radeon_buf_priv_t;
+
+				/* radeon_cp.c */
+extern int radeon_cp_init( DRM_IOCTL_ARGS );
+extern int radeon_cp_start( DRM_IOCTL_ARGS );
+extern int radeon_cp_stop( DRM_IOCTL_ARGS );
+extern int radeon_cp_reset( DRM_IOCTL_ARGS );
+extern int radeon_cp_idle( DRM_IOCTL_ARGS );
+extern int radeon_engine_reset( DRM_IOCTL_ARGS );
+extern int radeon_fullscreen( DRM_IOCTL_ARGS );
+extern int radeon_cp_buffers( DRM_IOCTL_ARGS );
+
+extern void radeon_freelist_reset( drm_device_t *dev );
+extern drm_buf_t *radeon_freelist_get( drm_device_t *dev );
+
+extern int radeon_wait_ring( drm_radeon_private_t *dev_priv, int n );
+
+extern int radeon_do_cp_idle( drm_radeon_private_t *dev_priv );
+extern int radeon_do_cleanup_cp( drm_device_t *dev );
+extern int radeon_do_cleanup_pageflip( drm_device_t *dev );
+
+				/* radeon_state.c */
+extern int radeon_cp_clear( DRM_IOCTL_ARGS );
+extern int radeon_cp_swap( DRM_IOCTL_ARGS );
+extern int radeon_cp_vertex( DRM_IOCTL_ARGS );
+extern int radeon_cp_indices( DRM_IOCTL_ARGS );
+extern int radeon_cp_texture( DRM_IOCTL_ARGS );
+extern int radeon_cp_stipple( DRM_IOCTL_ARGS );
+extern int radeon_cp_indirect( DRM_IOCTL_ARGS );
+extern int radeon_cp_vertex2( DRM_IOCTL_ARGS );
+extern int radeon_cp_cmdbuf( DRM_IOCTL_ARGS );
+extern int radeon_cp_getparam( DRM_IOCTL_ARGS );
+extern int radeon_cp_flip( DRM_IOCTL_ARGS );
+
+extern int radeon_mem_alloc( DRM_IOCTL_ARGS );
+extern int radeon_mem_free( DRM_IOCTL_ARGS );
+extern int radeon_mem_init_heap( DRM_IOCTL_ARGS );
+extern void radeon_mem_takedown( struct mem_block **heap );
+extern void radeon_mem_release( DRMFILE filp, struct mem_block *heap );
+
+				/* radeon_irq.c */
+extern int radeon_irq_emit( DRM_IOCTL_ARGS );
+extern int radeon_irq_wait( DRM_IOCTL_ARGS );
+
+extern int radeon_emit_and_wait_irq(drm_device_t *dev);
+extern int radeon_wait_irq(drm_device_t *dev, int swi_nr);
+extern int radeon_emit_irq(drm_device_t *dev);
+
+extern void radeon_do_release(drm_device_t *dev);
+
+/* Flags for stats.boxes
+ */
+#define RADEON_BOX_DMA_IDLE      0x1
+#define RADEON_BOX_RING_FULL     0x2
+#define RADEON_BOX_FLIP          0x4
+#define RADEON_BOX_WAIT_IDLE     0x8
+#define RADEON_BOX_TEXTURE_LOAD  0x10
+
+
+
+/* Register definitions, register access macros and drmAddMap constants
+ * for Radeon kernel driver.
+ */
+
+#define RADEON_AGP_COMMAND		0x0f60
+#define RADEON_AUX_SCISSOR_CNTL		0x26f0
+#	define RADEON_EXCLUSIVE_SCISSOR_0	(1 << 24)
+#	define RADEON_EXCLUSIVE_SCISSOR_1	(1 << 25)
+#	define RADEON_EXCLUSIVE_SCISSOR_2	(1 << 26)
+#	define RADEON_SCISSOR_0_ENABLE		(1 << 28)
+#	define RADEON_SCISSOR_1_ENABLE		(1 << 29)
+#	define RADEON_SCISSOR_2_ENABLE		(1 << 30)
+
+#define RADEON_BUS_CNTL			0x0030
+#	define RADEON_BUS_MASTER_DIS		(1 << 6)
+
+#define RADEON_CLOCK_CNTL_DATA		0x000c
+#	define RADEON_PLL_WR_EN			(1 << 7)
+#define RADEON_CLOCK_CNTL_INDEX		0x0008
+#define RADEON_CONFIG_APER_SIZE		0x0108
+#define RADEON_CRTC_OFFSET		0x0224
+#define RADEON_CRTC_OFFSET_CNTL		0x0228
+#	define RADEON_CRTC_TILE_EN		(1 << 15)
+#	define RADEON_CRTC_OFFSET_FLIP_CNTL	(1 << 16)
+#define RADEON_CRTC2_OFFSET		0x0324
+#define RADEON_CRTC2_OFFSET_CNTL	0x0328
+
+#define RADEON_RB3D_COLORPITCH		0x1c48
+
+#define RADEON_DP_GUI_MASTER_CNTL	0x146c
+#	define RADEON_GMC_SRC_PITCH_OFFSET_CNTL	(1 << 0)
+#	define RADEON_GMC_DST_PITCH_OFFSET_CNTL	(1 << 1)
+#	define RADEON_GMC_BRUSH_SOLID_COLOR	(13 << 4)
+#	define RADEON_GMC_BRUSH_NONE		(15 << 4)
+#	define RADEON_GMC_DST_16BPP		(4 << 8)
+#	define RADEON_GMC_DST_24BPP		(5 << 8)
+#	define RADEON_GMC_DST_32BPP		(6 << 8)
+#	define RADEON_GMC_DST_DATATYPE_SHIFT	8
+#	define RADEON_GMC_SRC_DATATYPE_COLOR	(3 << 12)
+#	define RADEON_DP_SRC_SOURCE_MEMORY	(2 << 24)
+#	define RADEON_DP_SRC_SOURCE_HOST_DATA	(3 << 24)
+#	define RADEON_GMC_CLR_CMP_CNTL_DIS	(1 << 28)
+#	define RADEON_GMC_WR_MSK_DIS		(1 << 30)
+#	define RADEON_ROP3_S			0x00cc0000
+#	define RADEON_ROP3_P			0x00f00000
+#define RADEON_DP_WRITE_MASK		0x16cc
+#define RADEON_DST_PITCH_OFFSET		0x142c
+#define RADEON_DST_PITCH_OFFSET_C	0x1c80
+#	define RADEON_DST_TILE_LINEAR		(0 << 30)
+#	define RADEON_DST_TILE_MACRO		(1 << 30)
+#	define RADEON_DST_TILE_MICRO		(2 << 30)
+#	define RADEON_DST_TILE_BOTH		(3 << 30)
+
+#define RADEON_SCRATCH_REG0		0x15e0
+#define RADEON_SCRATCH_REG1		0x15e4
+#define RADEON_SCRATCH_REG2		0x15e8
+#define RADEON_SCRATCH_REG3		0x15ec
+#define RADEON_SCRATCH_REG4		0x15f0
+#define RADEON_SCRATCH_REG5		0x15f4
+#define RADEON_SCRATCH_UMSK		0x0770
+#define RADEON_SCRATCH_ADDR		0x0774
+
+#define RADEON_SCRATCHOFF( x )		(RADEON_SCRATCH_REG_OFFSET + 4*(x))
+
+#define GET_SCRATCH( x )	(dev_priv->writeback_works			\
+				? DRM_READ32( dev_priv->ring_rptr, RADEON_SCRATCHOFF(x) ) \
+				: RADEON_READ( RADEON_SCRATCH_REG0 + 4*(x) ) )
+
+
+#define RADEON_GEN_INT_CNTL		0x0040
+#	define RADEON_CRTC_VBLANK_MASK		(1 << 0)
+#	define RADEON_GUI_IDLE_INT_ENABLE	(1 << 19)
+#	define RADEON_SW_INT_ENABLE		(1 << 25)
+
+#define RADEON_GEN_INT_STATUS		0x0044
+#	define RADEON_CRTC_VBLANK_STAT		(1 << 0)
+#	define RADEON_CRTC_VBLANK_STAT_ACK   	(1 << 0)
+#	define RADEON_GUI_IDLE_INT_TEST_ACK     (1 << 19)
+#	define RADEON_SW_INT_TEST		(1 << 25)
+#	define RADEON_SW_INT_TEST_ACK   	(1 << 25)
+#	define RADEON_SW_INT_FIRE		(1 << 26)
+
+#define RADEON_HOST_PATH_CNTL		0x0130
+#	define RADEON_HDP_SOFT_RESET		(1 << 26)
+#	define RADEON_HDP_WC_TIMEOUT_MASK	(7 << 28)
+#	define RADEON_HDP_WC_TIMEOUT_28BCLK	(7 << 28)
+
+#define RADEON_ISYNC_CNTL		0x1724
+#	define RADEON_ISYNC_ANY2D_IDLE3D	(1 << 0)
+#	define RADEON_ISYNC_ANY3D_IDLE2D	(1 << 1)
+#	define RADEON_ISYNC_TRIG2D_IDLE3D	(1 << 2)
+#	define RADEON_ISYNC_TRIG3D_IDLE2D	(1 << 3)
+#	define RADEON_ISYNC_WAIT_IDLEGUI	(1 << 4)
+#	define RADEON_ISYNC_CPSCRATCH_IDLEGUI	(1 << 5)
+
+#define RADEON_RBBM_GUICNTL		0x172c
+#	define RADEON_HOST_DATA_SWAP_NONE	(0 << 0)
+#	define RADEON_HOST_DATA_SWAP_16BIT	(1 << 0)
+#	define RADEON_HOST_DATA_SWAP_32BIT	(2 << 0)
+#	define RADEON_HOST_DATA_SWAP_HDW	(3 << 0)
+
+#define RADEON_MC_AGP_LOCATION		0x014c
+#define RADEON_MC_FB_LOCATION		0x0148
+#define RADEON_MCLK_CNTL		0x0012
+#	define RADEON_FORCEON_MCLKA		(1 << 16)
+#	define RADEON_FORCEON_MCLKB		(1 << 17)
+#	define RADEON_FORCEON_YCLKA		(1 << 18)
+#	define RADEON_FORCEON_YCLKB		(1 << 19)
+#	define RADEON_FORCEON_MC		(1 << 20)
+#	define RADEON_FORCEON_AIC		(1 << 21)
+
+#define RADEON_PP_BORDER_COLOR_0	0x1d40
+#define RADEON_PP_BORDER_COLOR_1	0x1d44
+#define RADEON_PP_BORDER_COLOR_2	0x1d48
+#define RADEON_PP_CNTL			0x1c38
+#	define RADEON_SCISSOR_ENABLE		(1 <<  1)
+#define RADEON_PP_LUM_MATRIX		0x1d00
+#define RADEON_PP_MISC			0x1c14
+#define RADEON_PP_ROT_MATRIX_0		0x1d58
+#define RADEON_PP_TXFILTER_0		0x1c54
+#define RADEON_PP_TXFILTER_1		0x1c6c
+#define RADEON_PP_TXFILTER_2		0x1c84
+
+#define RADEON_RB2D_DSTCACHE_CTLSTAT	0x342c
+#	define RADEON_RB2D_DC_FLUSH		(3 << 0)
+#	define RADEON_RB2D_DC_FREE		(3 << 2)
+#	define RADEON_RB2D_DC_FLUSH_ALL		0xf
+#	define RADEON_RB2D_DC_BUSY		(1 << 31)
+#define RADEON_RB3D_CNTL		0x1c3c
+#	define RADEON_ALPHA_BLEND_ENABLE	(1 << 0)
+#	define RADEON_PLANE_MASK_ENABLE		(1 << 1)
+#	define RADEON_DITHER_ENABLE		(1 << 2)
+#	define RADEON_ROUND_ENABLE		(1 << 3)
+#	define RADEON_SCALE_DITHER_ENABLE	(1 << 4)
+#	define RADEON_DITHER_INIT		(1 << 5)
+#	define RADEON_ROP_ENABLE		(1 << 6)
+#	define RADEON_STENCIL_ENABLE		(1 << 7)
+#	define RADEON_Z_ENABLE			(1 << 8)
+#define RADEON_RB3D_DEPTHOFFSET		0x1c24
+#define RADEON_RB3D_DEPTHPITCH		0x1c28
+#define RADEON_RB3D_PLANEMASK		0x1d84
+#define RADEON_RB3D_STENCILREFMASK	0x1d7c
+#define RADEON_RB3D_ZCACHE_MODE		0x3250
+#define RADEON_RB3D_ZCACHE_CTLSTAT	0x3254
+#	define RADEON_RB3D_ZC_FLUSH		(1 << 0)
+#	define RADEON_RB3D_ZC_FREE		(1 << 2)
+#	define RADEON_RB3D_ZC_FLUSH_ALL		0x5
+#	define RADEON_RB3D_ZC_BUSY		(1 << 31)
+#define RADEON_RB3D_ZSTENCILCNTL	0x1c2c
+#	define RADEON_Z_TEST_MASK		(7 << 4)
+#	define RADEON_Z_TEST_ALWAYS		(7 << 4)
+#	define RADEON_STENCIL_TEST_ALWAYS	(7 << 12)
+#	define RADEON_STENCIL_S_FAIL_REPLACE	(2 << 16)
+#	define RADEON_STENCIL_ZPASS_REPLACE	(2 << 20)
+#	define RADEON_STENCIL_ZFAIL_REPLACE	(2 << 24)
+#	define RADEON_Z_WRITE_ENABLE		(1 << 30)
+#define RADEON_RBBM_SOFT_RESET		0x00f0
+#	define RADEON_SOFT_RESET_CP		(1 <<  0)
+#	define RADEON_SOFT_RESET_HI		(1 <<  1)
+#	define RADEON_SOFT_RESET_SE		(1 <<  2)
+#	define RADEON_SOFT_RESET_RE		(1 <<  3)
+#	define RADEON_SOFT_RESET_PP		(1 <<  4)
+#	define RADEON_SOFT_RESET_E2		(1 <<  5)
+#	define RADEON_SOFT_RESET_RB		(1 <<  6)
+#	define RADEON_SOFT_RESET_HDP		(1 <<  7)
+#define RADEON_RBBM_STATUS		0x0e40
+#	define RADEON_RBBM_FIFOCNT_MASK		0x007f
+#	define RADEON_RBBM_ACTIVE		(1 << 31)
+#define RADEON_RE_LINE_PATTERN		0x1cd0
+#define RADEON_RE_MISC			0x26c4
+#define RADEON_RE_TOP_LEFT		0x26c0
+#define RADEON_RE_WIDTH_HEIGHT		0x1c44
+#define RADEON_RE_STIPPLE_ADDR		0x1cc8
+#define RADEON_RE_STIPPLE_DATA		0x1ccc
+
+#define RADEON_SCISSOR_TL_0		0x1cd8
+#define RADEON_SCISSOR_BR_0		0x1cdc
+#define RADEON_SCISSOR_TL_1		0x1ce0
+#define RADEON_SCISSOR_BR_1		0x1ce4
+#define RADEON_SCISSOR_TL_2		0x1ce8
+#define RADEON_SCISSOR_BR_2		0x1cec
+#define RADEON_SE_COORD_FMT		0x1c50
+#define RADEON_SE_CNTL			0x1c4c
+#	define RADEON_FFACE_CULL_CW		(0 << 0)
+#	define RADEON_BFACE_SOLID		(3 << 1)
+#	define RADEON_FFACE_SOLID		(3 << 3)
+#	define RADEON_FLAT_SHADE_VTX_LAST	(3 << 6)
+#	define RADEON_DIFFUSE_SHADE_FLAT	(1 << 8)
+#	define RADEON_DIFFUSE_SHADE_GOURAUD	(2 << 8)
+#	define RADEON_ALPHA_SHADE_FLAT		(1 << 10)
+#	define RADEON_ALPHA_SHADE_GOURAUD	(2 << 10)
+#	define RADEON_SPECULAR_SHADE_FLAT	(1 << 12)
+#	define RADEON_SPECULAR_SHADE_GOURAUD	(2 << 12)
+#	define RADEON_FOG_SHADE_FLAT		(1 << 14)
+#	define RADEON_FOG_SHADE_GOURAUD		(2 << 14)
+#	define RADEON_VPORT_XY_XFORM_ENABLE	(1 << 24)
+#	define RADEON_VPORT_Z_XFORM_ENABLE	(1 << 25)
+#	define RADEON_VTX_PIX_CENTER_OGL	(1 << 27)
+#	define RADEON_ROUND_MODE_TRUNC		(0 << 28)
+#	define RADEON_ROUND_PREC_8TH_PIX	(1 << 30)
+#define RADEON_SE_CNTL_STATUS		0x2140
+#define RADEON_SE_LINE_WIDTH		0x1db8
+#define RADEON_SE_VPORT_XSCALE		0x1d98
+#define RADEON_SE_ZBIAS_FACTOR		0x1db0
+#define RADEON_SE_TCL_MATERIAL_EMMISSIVE_RED 0x2210
+#define RADEON_SE_TCL_OUTPUT_VTX_FMT         0x2254
+#define RADEON_SE_TCL_VECTOR_INDX_REG        0x2200
+#       define RADEON_VEC_INDX_OCTWORD_STRIDE_SHIFT  16
+#       define RADEON_VEC_INDX_DWORD_COUNT_SHIFT     28
+#define RADEON_SE_TCL_VECTOR_DATA_REG       0x2204
+#define RADEON_SE_TCL_SCALAR_INDX_REG       0x2208
+#       define RADEON_SCAL_INDX_DWORD_STRIDE_SHIFT  16
+#define RADEON_SE_TCL_SCALAR_DATA_REG       0x220C
+#define RADEON_SURFACE_ACCESS_FLAGS	0x0bf8
+#define RADEON_SURFACE_ACCESS_CLR	0x0bfc
+#define RADEON_SURFACE_CNTL		0x0b00
+#	define RADEON_SURF_TRANSLATION_DIS	(1 << 8)
+#	define RADEON_NONSURF_AP0_SWP_MASK	(3 << 20)
+#	define RADEON_NONSURF_AP0_SWP_LITTLE	(0 << 20)
+#	define RADEON_NONSURF_AP0_SWP_BIG16	(1 << 20)
+#	define RADEON_NONSURF_AP0_SWP_BIG32	(2 << 20)
+#	define RADEON_NONSURF_AP1_SWP_MASK	(3 << 22)
+#	define RADEON_NONSURF_AP1_SWP_LITTLE	(0 << 22)
+#	define RADEON_NONSURF_AP1_SWP_BIG16	(1 << 22)
+#	define RADEON_NONSURF_AP1_SWP_BIG32	(2 << 22)
+#define RADEON_SURFACE0_INFO		0x0b0c
+#	define RADEON_SURF_PITCHSEL_MASK	(0x1ff << 0)
+#	define RADEON_SURF_TILE_MODE_MASK	(3 << 16)
+#	define RADEON_SURF_TILE_MODE_MACRO	(0 << 16)
+#	define RADEON_SURF_TILE_MODE_MICRO	(1 << 16)
+#	define RADEON_SURF_TILE_MODE_32BIT_Z	(2 << 16)
+#	define RADEON_SURF_TILE_MODE_16BIT_Z	(3 << 16)
+#define RADEON_SURFACE0_LOWER_BOUND	0x0b04
+#define RADEON_SURFACE0_UPPER_BOUND	0x0b08
+#define RADEON_SURFACE1_INFO		0x0b1c
+#define RADEON_SURFACE1_LOWER_BOUND	0x0b14
+#define RADEON_SURFACE1_UPPER_BOUND	0x0b18
+#define RADEON_SURFACE2_INFO		0x0b2c
+#define RADEON_SURFACE2_LOWER_BOUND	0x0b24
+#define RADEON_SURFACE2_UPPER_BOUND	0x0b28
+#define RADEON_SURFACE3_INFO		0x0b3c
+#define RADEON_SURFACE3_LOWER_BOUND	0x0b34
+#define RADEON_SURFACE3_UPPER_BOUND	0x0b38
+#define RADEON_SURFACE4_INFO		0x0b4c
+#define RADEON_SURFACE4_LOWER_BOUND	0x0b44
+#define RADEON_SURFACE4_UPPER_BOUND	0x0b48
+#define RADEON_SURFACE5_INFO		0x0b5c
+#define RADEON_SURFACE5_LOWER_BOUND	0x0b54
+#define RADEON_SURFACE5_UPPER_BOUND	0x0b58
+#define RADEON_SURFACE6_INFO		0x0b6c
+#define RADEON_SURFACE6_LOWER_BOUND	0x0b64
+#define RADEON_SURFACE6_UPPER_BOUND	0x0b68
+#define RADEON_SURFACE7_INFO		0x0b7c
+#define RADEON_SURFACE7_LOWER_BOUND	0x0b74
+#define RADEON_SURFACE7_UPPER_BOUND	0x0b78
+#define RADEON_SW_SEMAPHORE		0x013c
+
+#define RADEON_WAIT_UNTIL		0x1720
+#	define RADEON_WAIT_CRTC_PFLIP		(1 << 0)
+#	define RADEON_WAIT_2D_IDLECLEAN		(1 << 16)
+#	define RADEON_WAIT_3D_IDLECLEAN		(1 << 17)
+#	define RADEON_WAIT_HOST_IDLECLEAN	(1 << 18)
+
+#define RADEON_RB3D_ZMASKOFFSET		0x1c34
+#define RADEON_RB3D_ZSTENCILCNTL	0x1c2c
+#	define RADEON_DEPTH_FORMAT_16BIT_INT_Z	(0 << 0)
+#	define RADEON_DEPTH_FORMAT_24BIT_INT_Z	(2 << 0)
+
+
+/* CP registers */
+#define RADEON_CP_ME_RAM_ADDR		0x07d4
+#define RADEON_CP_ME_RAM_RADDR		0x07d8
+#define RADEON_CP_ME_RAM_DATAH		0x07dc
+#define RADEON_CP_ME_RAM_DATAL		0x07e0
+
+#define RADEON_CP_RB_BASE		0x0700
+#define RADEON_CP_RB_CNTL		0x0704
+#	define RADEON_BUF_SWAP_32BIT		(2 << 16)
+#define RADEON_CP_RB_RPTR_ADDR		0x070c
+#define RADEON_CP_RB_RPTR		0x0710
+#define RADEON_CP_RB_WPTR		0x0714
+
+#define RADEON_CP_RB_WPTR_DELAY		0x0718
+#	define RADEON_PRE_WRITE_TIMER_SHIFT	0
+#	define RADEON_PRE_WRITE_LIMIT_SHIFT	23
+
+#define RADEON_CP_IB_BASE		0x0738
+
+#define RADEON_CP_CSQ_CNTL		0x0740
+#	define RADEON_CSQ_CNT_PRIMARY_MASK	(0xff << 0)
+#	define RADEON_CSQ_PRIDIS_INDDIS		(0 << 28)
+#	define RADEON_CSQ_PRIPIO_INDDIS		(1 << 28)
+#	define RADEON_CSQ_PRIBM_INDDIS		(2 << 28)
+#	define RADEON_CSQ_PRIPIO_INDBM		(3 << 28)
+#	define RADEON_CSQ_PRIBM_INDBM		(4 << 28)
+#	define RADEON_CSQ_PRIPIO_INDPIO		(15 << 28)
+
+#define RADEON_AIC_CNTL			0x01d0
+#	define RADEON_PCIGART_TRANSLATE_EN	(1 << 0)
+#define RADEON_AIC_STAT			0x01d4
+#define RADEON_AIC_PT_BASE		0x01d8
+#define RADEON_AIC_LO_ADDR		0x01dc
+#define RADEON_AIC_HI_ADDR		0x01e0
+#define RADEON_AIC_TLB_ADDR		0x01e4
+#define RADEON_AIC_TLB_DATA		0x01e8
+
+/* CP command packets */
+#define RADEON_CP_PACKET0		0x00000000
+#	define RADEON_ONE_REG_WR		(1 << 15)
+#define RADEON_CP_PACKET1		0x40000000
+#define RADEON_CP_PACKET2		0x80000000
+#define RADEON_CP_PACKET3		0xC0000000
+#	define RADEON_3D_RNDR_GEN_INDX_PRIM	0x00002300
+#	define RADEON_WAIT_FOR_IDLE		0x00002600
+#	define RADEON_3D_DRAW_VBUF		0x00002800
+#	define RADEON_3D_DRAW_IMMD		0x00002900
+#	define RADEON_3D_DRAW_INDX		0x00002A00
+#	define RADEON_3D_LOAD_VBPNTR		0x00002F00
+#	define RADEON_CNTL_HOSTDATA_BLT		0x00009400
+#	define RADEON_CNTL_PAINT_MULTI		0x00009A00
+#	define RADEON_CNTL_BITBLT_MULTI		0x00009B00
+#	define RADEON_CNTL_SET_SCISSORS		0xC0001E00
+
+#define RADEON_CP_PACKET_MASK		0xC0000000
+#define RADEON_CP_PACKET_COUNT_MASK	0x3fff0000
+#define RADEON_CP_PACKET0_REG_MASK	0x000007ff
+#define RADEON_CP_PACKET1_REG0_MASK	0x000007ff
+#define RADEON_CP_PACKET1_REG1_MASK	0x003ff800
+
+#define RADEON_VTX_Z_PRESENT			(1 << 31)
+#define RADEON_VTX_PKCOLOR_PRESENT		(1 << 3)
+
+#define RADEON_PRIM_TYPE_NONE			(0 << 0)
+#define RADEON_PRIM_TYPE_POINT			(1 << 0)
+#define RADEON_PRIM_TYPE_LINE			(2 << 0)
+#define RADEON_PRIM_TYPE_LINE_STRIP		(3 << 0)
+#define RADEON_PRIM_TYPE_TRI_LIST		(4 << 0)
+#define RADEON_PRIM_TYPE_TRI_FAN		(5 << 0)
+#define RADEON_PRIM_TYPE_TRI_STRIP		(6 << 0)
+#define RADEON_PRIM_TYPE_TRI_TYPE2		(7 << 0)
+#define RADEON_PRIM_TYPE_RECT_LIST		(8 << 0)
+#define RADEON_PRIM_TYPE_3VRT_POINT_LIST	(9 << 0)
+#define RADEON_PRIM_TYPE_3VRT_LINE_LIST		(10 << 0)
+#define RADEON_PRIM_TYPE_MASK                   0xf
+#define RADEON_PRIM_WALK_IND			(1 << 4)
+#define RADEON_PRIM_WALK_LIST			(2 << 4)
+#define RADEON_PRIM_WALK_RING			(3 << 4)
+#define RADEON_COLOR_ORDER_BGRA			(0 << 6)
+#define RADEON_COLOR_ORDER_RGBA			(1 << 6)
+#define RADEON_MAOS_ENABLE			(1 << 7)
+#define RADEON_VTX_FMT_R128_MODE		(0 << 8)
+#define RADEON_VTX_FMT_RADEON_MODE		(1 << 8)
+#define RADEON_NUM_VERTICES_SHIFT		16
+
+#define RADEON_COLOR_FORMAT_CI8		2
+#define RADEON_COLOR_FORMAT_ARGB1555	3
+#define RADEON_COLOR_FORMAT_RGB565	4
+#define RADEON_COLOR_FORMAT_ARGB8888	6
+#define RADEON_COLOR_FORMAT_RGB332	7
+#define RADEON_COLOR_FORMAT_RGB8	9
+#define RADEON_COLOR_FORMAT_ARGB4444	15
+
+#define RADEON_TXFORMAT_I8		0
+#define RADEON_TXFORMAT_AI88		1
+#define RADEON_TXFORMAT_RGB332		2
+#define RADEON_TXFORMAT_ARGB1555	3
+#define RADEON_TXFORMAT_RGB565		4
+#define RADEON_TXFORMAT_ARGB4444	5
+#define RADEON_TXFORMAT_ARGB8888	6
+#define RADEON_TXFORMAT_RGBA8888	7
+#define RADEON_TXFORMAT_VYUY422         10
+#define RADEON_TXFORMAT_YVYU422         11
+#define RADEON_TXFORMAT_DXT1            12
+#define RADEON_TXFORMAT_DXT23           14
+#define RADEON_TXFORMAT_DXT45           15
+
+#define R200_PP_TXCBLEND_0                0x2f00
+#define R200_PP_TXCBLEND_1                0x2f10
+#define R200_PP_TXCBLEND_2                0x2f20
+#define R200_PP_TXCBLEND_3                0x2f30
+#define R200_PP_TXCBLEND_4                0x2f40
+#define R200_PP_TXCBLEND_5                0x2f50
+#define R200_PP_TXCBLEND_6                0x2f60
+#define R200_PP_TXCBLEND_7                0x2f70
+#define R200_SE_TCL_LIGHT_MODEL_CTL_0     0x2268 
+#define R200_PP_TFACTOR_0                 0x2ee0
+#define R200_SE_VTX_FMT_0                 0x2088
+#define R200_SE_VAP_CNTL                  0x2080
+#define R200_SE_TCL_MATRIX_SEL_0          0x2230
+#define R200_SE_TCL_TEX_PROC_CTL_2        0x22a8 
+#define R200_SE_TCL_UCP_VERT_BLEND_CTL    0x22c0 
+#define R200_PP_TXFILTER_5                0x2ca0 
+#define R200_PP_TXFILTER_4                0x2c80 
+#define R200_PP_TXFILTER_3                0x2c60 
+#define R200_PP_TXFILTER_2                0x2c40 
+#define R200_PP_TXFILTER_1                0x2c20 
+#define R200_PP_TXFILTER_0                0x2c00 
+#define R200_PP_TXOFFSET_5                0x2d78
+#define R200_PP_TXOFFSET_4                0x2d60
+#define R200_PP_TXOFFSET_3                0x2d48
+#define R200_PP_TXOFFSET_2                0x2d30
+#define R200_PP_TXOFFSET_1                0x2d18
+#define R200_PP_TXOFFSET_0                0x2d00
+
+#define R200_PP_CUBIC_FACES_0             0x2c18
+#define R200_PP_CUBIC_FACES_1             0x2c38
+#define R200_PP_CUBIC_FACES_2             0x2c58
+#define R200_PP_CUBIC_FACES_3             0x2c78
+#define R200_PP_CUBIC_FACES_4             0x2c98
+#define R200_PP_CUBIC_FACES_5             0x2cb8
+#define R200_PP_CUBIC_OFFSET_F1_0         0x2d04
+#define R200_PP_CUBIC_OFFSET_F2_0         0x2d08
+#define R200_PP_CUBIC_OFFSET_F3_0         0x2d0c
+#define R200_PP_CUBIC_OFFSET_F4_0         0x2d10
+#define R200_PP_CUBIC_OFFSET_F5_0         0x2d14
+#define R200_PP_CUBIC_OFFSET_F1_1         0x2d1c
+#define R200_PP_CUBIC_OFFSET_F2_1         0x2d20
+#define R200_PP_CUBIC_OFFSET_F3_1         0x2d24
+#define R200_PP_CUBIC_OFFSET_F4_1         0x2d28
+#define R200_PP_CUBIC_OFFSET_F5_1         0x2d2c
+#define R200_PP_CUBIC_OFFSET_F1_2         0x2d34
+#define R200_PP_CUBIC_OFFSET_F2_2         0x2d38
+#define R200_PP_CUBIC_OFFSET_F3_2         0x2d3c
+#define R200_PP_CUBIC_OFFSET_F4_2         0x2d40
+#define R200_PP_CUBIC_OFFSET_F5_2         0x2d44
+#define R200_PP_CUBIC_OFFSET_F1_3         0x2d4c
+#define R200_PP_CUBIC_OFFSET_F2_3         0x2d50
+#define R200_PP_CUBIC_OFFSET_F3_3         0x2d54
+#define R200_PP_CUBIC_OFFSET_F4_3         0x2d58
+#define R200_PP_CUBIC_OFFSET_F5_3         0x2d5c
+#define R200_PP_CUBIC_OFFSET_F1_4         0x2d64
+#define R200_PP_CUBIC_OFFSET_F2_4         0x2d68
+#define R200_PP_CUBIC_OFFSET_F3_4         0x2d6c
+#define R200_PP_CUBIC_OFFSET_F4_4         0x2d70
+#define R200_PP_CUBIC_OFFSET_F5_4         0x2d74
+#define R200_PP_CUBIC_OFFSET_F1_5         0x2d7c
+#define R200_PP_CUBIC_OFFSET_F2_5         0x2d80
+#define R200_PP_CUBIC_OFFSET_F3_5         0x2d84
+#define R200_PP_CUBIC_OFFSET_F4_5         0x2d88
+#define R200_PP_CUBIC_OFFSET_F5_5         0x2d8c
+
+#define R200_RE_AUX_SCISSOR_CNTL          0x26f0
+#define R200_SE_VTE_CNTL                  0x20b0
+#define R200_SE_TCL_OUTPUT_VTX_COMP_SEL   0x2250
+#define R200_PP_TAM_DEBUG3                0x2d9c
+#define R200_PP_CNTL_X                    0x2cc4
+#define R200_SE_VAP_CNTL_STATUS           0x2140
+#define R200_RE_SCISSOR_TL_0              0x1cd8
+#define R200_RE_SCISSOR_TL_1              0x1ce0
+#define R200_RE_SCISSOR_TL_2              0x1ce8
+#define R200_RB3D_DEPTHXY_OFFSET          0x1d60 
+#define R200_RE_AUX_SCISSOR_CNTL          0x26f0
+#define R200_SE_VTX_STATE_CNTL            0x2180
+#define R200_RE_POINTSIZE                 0x2648
+#define R200_SE_TCL_INPUT_VTX_VECTOR_ADDR_0 0x2254
+
+
+#define SE_VAP_CNTL__TCL_ENA_MASK                          0x00000001
+#define SE_VAP_CNTL__FORCE_W_TO_ONE_MASK                   0x00010000
+#define SE_VAP_CNTL__VF_MAX_VTX_NUM__SHIFT                 0x00000012
+#define SE_VTE_CNTL__VTX_XY_FMT_MASK                       0x00000100
+#define SE_VTE_CNTL__VTX_Z_FMT_MASK                        0x00000200
+#define SE_VTX_FMT_0__VTX_Z0_PRESENT_MASK                  0x00000001
+#define SE_VTX_FMT_0__VTX_W0_PRESENT_MASK                  0x00000002
+#define SE_VTX_FMT_0__VTX_COLOR_0_FMT__SHIFT               0x0000000b
+#define R200_3D_DRAW_IMMD_2      0xC0003500
+#define R200_SE_VTX_FMT_1                 0x208c
+#define R200_RE_CNTL                      0x1c50 
+
+
+/* Constants */
+#define RADEON_MAX_USEC_TIMEOUT		100000	/* 100 ms */
+
+#define RADEON_LAST_FRAME_REG		RADEON_SCRATCH_REG0
+#define RADEON_LAST_DISPATCH_REG	RADEON_SCRATCH_REG1
+#define RADEON_LAST_CLEAR_REG		RADEON_SCRATCH_REG2
+#define RADEON_LAST_SWI_REG		RADEON_SCRATCH_REG3
+#define RADEON_LAST_DISPATCH		1
+
+#define RADEON_MAX_VB_AGE		0x7fffffff
+#define RADEON_MAX_VB_VERTS		(0xffff)
+
+#define RADEON_RING_HIGH_MARK		128
+
+#define RADEON_READ(reg)	DRM_READ32(  dev_priv->mmio, (reg) )
+#define RADEON_WRITE(reg,val)	DRM_WRITE32( dev_priv->mmio, (reg), (val) )
+#define RADEON_READ8(reg)	DRM_READ8(  dev_priv->mmio, (reg) )
+#define RADEON_WRITE8(reg,val)	DRM_WRITE8( dev_priv->mmio, (reg), (val) )
+
+#define RADEON_WRITE_PLL( addr, val )					\
+do {									\
+	RADEON_WRITE8( RADEON_CLOCK_CNTL_INDEX,				\
+		       ((addr) & 0x1f) | RADEON_PLL_WR_EN );		\
+	RADEON_WRITE( RADEON_CLOCK_CNTL_DATA, (val) );			\
+} while (0)
+
+extern int RADEON_READ_PLL( drm_device_t *dev, int addr );
+
+
+#define CP_PACKET0( reg, n )						\
+	(RADEON_CP_PACKET0 | ((n) << 16) | ((reg) >> 2))
+#define CP_PACKET0_TABLE( reg, n )					\
+	(RADEON_CP_PACKET0 | RADEON_ONE_REG_WR | ((n) << 16) | ((reg) >> 2))
+#define CP_PACKET1( reg0, reg1 )					\
+	(RADEON_CP_PACKET1 | (((reg1) >> 2) << 15) | ((reg0) >> 2))
+#define CP_PACKET2()							\
+	(RADEON_CP_PACKET2)
+#define CP_PACKET3( pkt, n )						\
+	(RADEON_CP_PACKET3 | (pkt) | ((n) << 16))
+
+
+/* ================================================================
+ * Engine control helper macros
+ */
+
+#define RADEON_WAIT_UNTIL_2D_IDLE() do {				\
+	OUT_RING( CP_PACKET0( RADEON_WAIT_UNTIL, 0 ) );			\
+	OUT_RING( (RADEON_WAIT_2D_IDLECLEAN |				\
+		   RADEON_WAIT_HOST_IDLECLEAN) );			\
+} while (0)
+
+#define RADEON_WAIT_UNTIL_3D_IDLE() do {				\
+	OUT_RING( CP_PACKET0( RADEON_WAIT_UNTIL, 0 ) );			\
+	OUT_RING( (RADEON_WAIT_3D_IDLECLEAN |				\
+		   RADEON_WAIT_HOST_IDLECLEAN) );			\
+} while (0)
+
+#define RADEON_WAIT_UNTIL_IDLE() do {					\
+	OUT_RING( CP_PACKET0( RADEON_WAIT_UNTIL, 0 ) );			\
+	OUT_RING( (RADEON_WAIT_2D_IDLECLEAN |				\
+		   RADEON_WAIT_3D_IDLECLEAN |				\
+		   RADEON_WAIT_HOST_IDLECLEAN) );			\
+} while (0)
+
+#define RADEON_WAIT_UNTIL_PAGE_FLIPPED() do {				\
+	OUT_RING( CP_PACKET0( RADEON_WAIT_UNTIL, 0 ) );			\
+	OUT_RING( RADEON_WAIT_CRTC_PFLIP );				\
+} while (0)
+
+#define RADEON_FLUSH_CACHE() do {					\
+	OUT_RING( CP_PACKET0( RADEON_RB2D_DSTCACHE_CTLSTAT, 0 ) );	\
+	OUT_RING( RADEON_RB2D_DC_FLUSH );				\
+} while (0)
+
+#define RADEON_PURGE_CACHE() do {					\
+	OUT_RING( CP_PACKET0( RADEON_RB2D_DSTCACHE_CTLSTAT, 0 ) );	\
+	OUT_RING( RADEON_RB2D_DC_FLUSH_ALL );				\
+} while (0)
+
+#define RADEON_FLUSH_ZCACHE() do {					\
+	OUT_RING( CP_PACKET0( RADEON_RB3D_ZCACHE_CTLSTAT, 0 ) );	\
+	OUT_RING( RADEON_RB3D_ZC_FLUSH );				\
+} while (0)
+
+#define RADEON_PURGE_ZCACHE() do {					\
+	OUT_RING( CP_PACKET0( RADEON_RB3D_ZCACHE_CTLSTAT, 0 ) );	\
+	OUT_RING( RADEON_RB3D_ZC_FLUSH_ALL );				\
+} while (0)
+
+
+/* ================================================================
+ * Misc helper macros
+ */
+
+/* Perfbox functionality only.  
+ */
+#define RING_SPACE_TEST_WITH_RETURN( dev_priv )				\
+do {									\
+	if (!(dev_priv->stats.boxes & RADEON_BOX_DMA_IDLE)) {		\
+		u32 head = GET_RING_HEAD(&dev_priv->ring);		\
+		if (head == dev_priv->ring.tail)			\
+			dev_priv->stats.boxes |= RADEON_BOX_DMA_IDLE;	\
+	}								\
+} while (0)
+
+#define VB_AGE_TEST_WITH_RETURN( dev_priv )				\
+do {									\
+	drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv;		\
+	if ( sarea_priv->last_dispatch >= RADEON_MAX_VB_AGE ) {		\
+		int __ret = radeon_do_cp_idle( dev_priv );		\
+		if ( __ret ) return __ret;				\
+		sarea_priv->last_dispatch = 0;				\
+		radeon_freelist_reset( dev );				\
+	}								\
+} while (0)
+
+#define RADEON_DISPATCH_AGE( age ) do {					\
+	OUT_RING( CP_PACKET0( RADEON_LAST_DISPATCH_REG, 0 ) );		\
+	OUT_RING( age );						\
+} while (0)
+
+#define RADEON_FRAME_AGE( age ) do {					\
+	OUT_RING( CP_PACKET0( RADEON_LAST_FRAME_REG, 0 ) );		\
+	OUT_RING( age );						\
+} while (0)
+
+#define RADEON_CLEAR_AGE( age ) do {					\
+	OUT_RING( CP_PACKET0( RADEON_LAST_CLEAR_REG, 0 ) );		\
+	OUT_RING( age );						\
+} while (0)
+
+
+/* ================================================================
+ * Ring control
+ */
+
+#define RADEON_VERBOSE	0
+
+#define RING_LOCALS	int write, _nr; unsigned int mask; u32 *ring;
+
+#define BEGIN_RING( n ) do {						\
+	if ( RADEON_VERBOSE ) {						\
+		DRM_INFO( "BEGIN_RING( %d ) in %s\n",			\
+			   n, __FUNCTION__ );				\
+	}								\
+	if ( dev_priv->ring.space <= (n) * sizeof(u32) ) {		\
+                COMMIT_RING();						\
+		radeon_wait_ring( dev_priv, (n) * sizeof(u32) );	\
+	}								\
+	_nr = n; dev_priv->ring.space -= (n) * sizeof(u32);		\
+	ring = dev_priv->ring.start;					\
+	write = dev_priv->ring.tail;					\
+	mask = dev_priv->ring.tail_mask;				\
+} while (0)
+
+#define ADVANCE_RING() do {						\
+	if ( RADEON_VERBOSE ) {						\
+		DRM_INFO( "ADVANCE_RING() wr=0x%06x tail=0x%06x\n",	\
+			  write, dev_priv->ring.tail );			\
+	}								\
+	if (((dev_priv->ring.tail + _nr) & mask) != write) {		\
+		DRM_ERROR( 						\
+			"ADVANCE_RING(): mismatch: nr: %x write: %x line: %d\n",	\
+			((dev_priv->ring.tail + _nr) & mask),		\
+			write, __LINE__);						\
+	} else								\
+		dev_priv->ring.tail = write;				\
+} while (0)
+
+#define COMMIT_RING() do {						\
+	/* Flush writes to ring */					\
+	DRM_READMEMORYBARRIER(dev_priv->mmio);					\
+	GET_RING_HEAD( &dev_priv->ring );				\
+	RADEON_WRITE( RADEON_CP_RB_WPTR, dev_priv->ring.tail );		\
+	/* read from PCI bus to ensure correct posting */		\
+	RADEON_READ( RADEON_CP_RB_RPTR );				\
+} while (0)
+
+#define OUT_RING( x ) do {						\
+	if ( RADEON_VERBOSE ) {						\
+		DRM_INFO( "   OUT_RING( 0x%08x ) at 0x%x\n",		\
+			   (unsigned int)(x), write );			\
+	}								\
+	ring[write++] = (x);						\
+	write &= mask;							\
+} while (0)
+
+#define OUT_RING_REG( reg, val ) do {					\
+	OUT_RING( CP_PACKET0( reg, 0 ) );				\
+	OUT_RING( val );						\
+} while (0)
+
+
+#define OUT_RING_USER_TABLE( tab, sz ) do {			\
+	int _size = (sz);					\
+	int *_tab = (tab);					\
+								\
+	if (write + _size > mask) {				\
+		int i = (mask+1) - write;			\
+		if (DRM_COPY_FROM_USER_UNCHECKED( (int *)(ring+write),	\
+				      _tab, i*4 ))		\
+			return DRM_ERR(EFAULT);		\
+		write = 0;					\
+		_size -= i;					\
+		_tab += i;					\
+	}							\
+								\
+	if (_size && DRM_COPY_FROM_USER_UNCHECKED( (int *)(ring+write),	\
+			               _tab, _size*4 ))		\
+		return DRM_ERR(EFAULT);			\
+								\
+	write += _size;						\
+	write &= mask;						\
+} while (0)
+
+
+#endif /* __RADEON_DRV_H__ */
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/radeon_irq.c b/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/radeon_irq.c
new file mode 100644
index 000000000..9199fbbf2
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/radeon_irq.c
@@ -0,0 +1,256 @@
+/* radeon_irq.c -- IRQ handling for radeon -*- linux-c -*-
+ *
+ * Copyright (C) The Weather Channel, Inc.  2002.  All Rights Reserved.
+ * 
+ * The Weather Channel (TM) funded Tungsten Graphics to develop the
+ * initial release of the Radeon 8500 driver under the XFree86 license.
+ * This notice must be preserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ *    Keith Whitwell <keith@tungstengraphics.com>
+ *    Michel Dänzer <michel@daenzer.net>
+ */
+
+#include "radeon.h"
+#include "drmP.h"
+#include "drm.h"
+#include "radeon_drm.h"
+#include "radeon_drv.h"
+
+/* Interrupts - Used for device synchronization and flushing in the
+ * following circumstances:
+ *
+ * - Exclusive FB access with hw idle:
+ *    - Wait for GUI Idle (?) interrupt, then do normal flush.
+ *
+ * - Frame throttling, NV_fence:
+ *    - Drop marker irq's into command stream ahead of time.
+ *    - Wait on irq's with lock *not held*
+ *    - Check each for termination condition
+ *
+ * - Internally in cp_getbuffer, etc:
+ *    - as above, but wait with lock held???
+ *
+ * NOTE: These functions are misleadingly named -- the irq's aren't
+ * tied to dma at all, this is just a hangover from dri prehistory.
+ */
+
+void DRM(dma_service)( DRM_IRQ_ARGS )
+{
+	drm_device_t *dev = (drm_device_t *) arg;
+	drm_radeon_private_t *dev_priv = 
+	   (drm_radeon_private_t *)dev->dev_private;
+   	u32 stat;
+
+	/* Only consider the bits we're interested in - others could be used
+	 * outside the DRM
+	 */
+	stat = RADEON_READ(RADEON_GEN_INT_STATUS)
+	     & (RADEON_SW_INT_TEST | RADEON_CRTC_VBLANK_STAT);
+	if (!stat)
+		return;
+
+	/* SW interrupt */
+	if (stat & RADEON_SW_INT_TEST) {
+		DRM_WAKEUP( &dev_priv->swi_queue );
+	}
+
+	/* VBLANK interrupt */
+	if (stat & RADEON_CRTC_VBLANK_STAT) {
+		atomic_inc(&dev->vbl_received);
+		DRM_WAKEUP(&dev->vbl_queue);
+		DRM(vbl_send_signals)( dev );
+	}
+
+	/* Acknowledge interrupts we handle */
+	RADEON_WRITE(RADEON_GEN_INT_STATUS, stat);
+}
+
+static __inline__ void radeon_acknowledge_irqs(drm_radeon_private_t *dev_priv)
+{
+	u32 tmp = RADEON_READ( RADEON_GEN_INT_STATUS )
+		& (RADEON_SW_INT_TEST_ACK | RADEON_CRTC_VBLANK_STAT);
+	if (tmp)
+		RADEON_WRITE( RADEON_GEN_INT_STATUS, tmp );
+}
+
+int radeon_emit_irq(drm_device_t *dev)
+{
+	drm_radeon_private_t *dev_priv = dev->dev_private;
+	unsigned int ret;
+	RING_LOCALS;
+
+	atomic_inc(&dev_priv->swi_emitted);
+	ret = atomic_read(&dev_priv->swi_emitted);
+
+	BEGIN_RING( 4 );
+	OUT_RING_REG( RADEON_LAST_SWI_REG, ret );
+	OUT_RING_REG( RADEON_GEN_INT_STATUS, RADEON_SW_INT_FIRE );
+	ADVANCE_RING(); 
+ 	COMMIT_RING();
+
+	return ret;
+}
+
+
+int radeon_wait_irq(drm_device_t *dev, int swi_nr)
+{
+  	drm_radeon_private_t *dev_priv = 
+	   (drm_radeon_private_t *)dev->dev_private;
+	int ret = 0;
+
+ 	if (RADEON_READ( RADEON_LAST_SWI_REG ) >= swi_nr)  
+ 		return 0; 
+
+	dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE;
+
+	/* This is a hack to work around mysterious freezes on certain
+	 * systems:
+	 */ 
+	radeon_acknowledge_irqs( dev_priv );
+
+	DRM_WAIT_ON( ret, dev_priv->swi_queue, 3 * DRM_HZ, 
+		     RADEON_READ( RADEON_LAST_SWI_REG ) >= swi_nr );
+
+	return ret;
+}
+
+int radeon_emit_and_wait_irq(drm_device_t *dev)
+{
+	return radeon_wait_irq( dev, radeon_emit_irq(dev) );
+}
+
+
+int DRM(vblank_wait)(drm_device_t *dev, unsigned int *sequence)
+{
+  	drm_radeon_private_t *dev_priv = 
+	   (drm_radeon_private_t *)dev->dev_private;
+	unsigned int cur_vblank;
+	int ret = 0;
+
+	if ( !dev_priv ) {
+		DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
+		return DRM_ERR(EINVAL);
+	}
+
+	radeon_acknowledge_irqs( dev_priv );
+
+	dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE;
+
+	/* Assume that the user has missed the current sequence number
+	 * by about a day rather than she wants to wait for years
+	 * using vertical blanks... 
+	 */
+	DRM_WAIT_ON( ret, dev->vbl_queue, 3*DRM_HZ, 
+		     ( ( ( cur_vblank = atomic_read(&dev->vbl_received ) )
+			 - *sequence ) <= (1<<23) ) );
+
+	*sequence = cur_vblank;
+
+	return ret;
+}
+
+
+/* Needs the lock as it touches the ring.
+ */
+int radeon_irq_emit( DRM_IOCTL_ARGS )
+{
+	DRM_DEVICE;
+	drm_radeon_private_t *dev_priv = dev->dev_private;
+	drm_radeon_irq_emit_t emit;
+	int result;
+
+	LOCK_TEST_WITH_RETURN( dev, filp );
+
+	if ( !dev_priv ) {
+		DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
+		return DRM_ERR(EINVAL);
+	}
+
+	DRM_COPY_FROM_USER_IOCTL( emit, (drm_radeon_irq_emit_t *)data,
+				  sizeof(emit) );
+
+	result = radeon_emit_irq( dev );
+
+	if ( DRM_COPY_TO_USER( emit.irq_seq, &result, sizeof(int) ) ) {
+		DRM_ERROR( "copy_to_user\n" );
+		return DRM_ERR(EFAULT);
+	}
+
+	return 0;
+}
+
+
+/* Doesn't need the hardware lock.
+ */
+int radeon_irq_wait( DRM_IOCTL_ARGS )
+{
+	DRM_DEVICE;
+	drm_radeon_private_t *dev_priv = dev->dev_private;
+	drm_radeon_irq_wait_t irqwait;
+
+	if ( !dev_priv ) {
+		DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
+		return DRM_ERR(EINVAL);
+	}
+
+	DRM_COPY_FROM_USER_IOCTL( irqwait, (drm_radeon_irq_wait_t *)data,
+				  sizeof(irqwait) );
+
+	return radeon_wait_irq( dev, irqwait.irq_seq );
+}
+
+
+/* drm_dma.h hooks
+*/
+void DRM(driver_irq_preinstall)( drm_device_t *dev ) {
+	drm_radeon_private_t *dev_priv =
+		(drm_radeon_private_t *)dev->dev_private;
+
+ 	/* Disable *all* interrupts */
+      	RADEON_WRITE( RADEON_GEN_INT_CNTL, 0 );
+
+	/* Clear bits if they're already high */
+	radeon_acknowledge_irqs( dev_priv );
+}
+
+void DRM(driver_irq_postinstall)( drm_device_t *dev ) {
+	drm_radeon_private_t *dev_priv =
+		(drm_radeon_private_t *)dev->dev_private;
+
+   	atomic_set(&dev_priv->swi_emitted, 0);
+	DRM_INIT_WAITQUEUE( &dev_priv->swi_queue );
+
+	/* Turn on SW and VBL ints */
+   	RADEON_WRITE( RADEON_GEN_INT_CNTL,
+		      RADEON_CRTC_VBLANK_MASK |	
+		      RADEON_SW_INT_ENABLE );
+}
+
+void DRM(driver_irq_uninstall)( drm_device_t *dev ) {
+	drm_radeon_private_t *dev_priv =
+		(drm_radeon_private_t *)dev->dev_private;
+	if ( dev_priv ) {
+		/* Disable *all* interrupts */
+		RADEON_WRITE( RADEON_GEN_INT_CNTL, 0 );
+	}
+}
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/radeon_mem.c b/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/radeon_mem.c
new file mode 100644
index 000000000..c3cbd3a9f
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/radeon_mem.c
@@ -0,0 +1,323 @@
+/* radeon_mem.c -- Simple agp/fb memory manager for radeon -*- linux-c -*-
+ *
+ * Copyright (C) The Weather Channel, Inc.  2002.  All Rights Reserved.
+ * 
+ * The Weather Channel (TM) funded Tungsten Graphics to develop the
+ * initial release of the Radeon 8500 driver under the XFree86 license.
+ * This notice must be preserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ *    Keith Whitwell <keith@tungstengraphics.com>
+ */
+
+#include "radeon.h"
+#include "drmP.h"
+#include "drm.h"
+#include "radeon_drm.h"
+#include "radeon_drv.h"
+
+/* Very simple allocator for agp memory, working on a static range
+ * already mapped into each client's address space.  
+ */
+
+static struct mem_block *split_block(struct mem_block *p, int start, int size,
+				     DRMFILE filp )
+{
+	/* Maybe cut off the start of an existing block */
+	if (start > p->start) {
+		struct mem_block *newblock = DRM_MALLOC(sizeof(*newblock));
+		if (!newblock) 
+			goto out;
+		newblock->start = start;
+		newblock->size = p->size - (start - p->start);
+		newblock->filp = 0;
+		newblock->next = p->next;
+		newblock->prev = p;
+		p->next->prev = newblock;
+		p->next = newblock;
+		p->size -= newblock->size;
+		p = newblock;
+	}
+   
+	/* Maybe cut off the end of an existing block */
+	if (size < p->size) {
+		struct mem_block *newblock = DRM_MALLOC(sizeof(*newblock));
+		if (!newblock)
+			goto out;
+		newblock->start = start + size;
+		newblock->size = p->size - size;
+		newblock->filp = 0;
+		newblock->next = p->next;
+		newblock->prev = p;
+		p->next->prev = newblock;
+		p->next = newblock;
+		p->size = size;
+	}
+
+ out:
+	/* Our block is in the middle */
+	p->filp = filp;
+	return p;
+}
+
+static struct mem_block *alloc_block( struct mem_block *heap, int size, 
+				      int align2, DRMFILE filp )
+{
+	struct mem_block *p;
+	int mask = (1 << align2)-1;
+
+	for (p = heap->next ; p != heap ; p = p->next) {
+		int start = (p->start + mask) & ~mask;
+		if (p->filp == 0 && start + size <= p->start + p->size)
+			return split_block( p, start, size, filp );
+	}
+
+	return NULL;
+}
+
+static struct mem_block *find_block( struct mem_block *heap, int start )
+{
+	struct mem_block *p;
+
+	for (p = heap->next ; p != heap ; p = p->next) 
+		if (p->start == start)
+			return p;
+
+	return NULL;
+}
+
+
+static void free_block( struct mem_block *p )
+{
+	p->filp = 0;
+
+	/* Assumes a single contiguous range.  Needs a special filp in
+	 * 'heap' to stop it being subsumed.
+	 */
+	if (p->next->filp == 0) {
+		struct mem_block *q = p->next;
+		p->size += q->size;
+		p->next = q->next;
+		p->next->prev = p;
+		DRM_FREE(q, sizeof(*q));
+	}
+
+	if (p->prev->filp == 0) {
+		struct mem_block *q = p->prev;
+		q->size += p->size;
+		q->next = p->next;
+		q->next->prev = q;
+		DRM_FREE(p, sizeof(*q));
+	}
+}
+
+/* Initialize.  How to check for an uninitialized heap?
+ */
+static int init_heap(struct mem_block **heap, int start, int size)
+{
+	struct mem_block *blocks = DRM_MALLOC(sizeof(*blocks));
+
+	if (!blocks) 
+		return -ENOMEM;
+	
+	*heap = DRM_MALLOC(sizeof(**heap));
+	if (!*heap) {
+		DRM_FREE( blocks, sizeof(*blocks) );
+		return -ENOMEM;
+	}
+
+	blocks->start = start;
+	blocks->size = size;
+	blocks->filp = 0;
+	blocks->next = blocks->prev = *heap;
+
+	memset( *heap, 0, sizeof(**heap) );
+	(*heap)->filp = (DRMFILE) -1;
+	(*heap)->next = (*heap)->prev = blocks;
+	return 0;
+}
+
+
+/* Free all blocks associated with the releasing file.
+ */
+void radeon_mem_release( DRMFILE filp, struct mem_block *heap )
+{
+	struct mem_block *p;
+
+	if (!heap || !heap->next)
+		return;
+
+	for (p = heap->next ; p != heap ; p = p->next) {
+		if (p->filp == filp) 
+			p->filp = 0;
+	}
+
+	/* Assumes a single contiguous range.  Needs a special filp in
+	 * 'heap' to stop it being subsumed.
+	 */
+	for (p = heap->next ; p != heap ; p = p->next) {
+		while (p->filp == 0 && p->next->filp == 0) {
+			struct mem_block *q = p->next;
+			p->size += q->size;
+			p->next = q->next;
+			p->next->prev = p;
+			DRM_FREE(q, sizeof(*q));
+		}
+	}
+}
+
+/* Shutdown.
+ */
+void radeon_mem_takedown( struct mem_block **heap )
+{
+	struct mem_block *p;
+	
+	if (!*heap)
+		return;
+
+	for (p = (*heap)->next ; p != *heap ; ) {
+		struct mem_block *q = p;
+		p = p->next;
+		DRM_FREE(q, sizeof(*q));
+	}
+
+	DRM_FREE( *heap, sizeof(**heap) );
+	*heap = 0;
+}
+
+
+
+/* IOCTL HANDLERS */
+
+static struct mem_block **get_heap( drm_radeon_private_t *dev_priv,
+				   int region )
+{
+	switch( region ) {
+	case RADEON_MEM_REGION_AGP:
+ 		return &dev_priv->agp_heap; 
+	case RADEON_MEM_REGION_FB:
+		return &dev_priv->fb_heap;
+	default:
+		return 0;
+	}
+}
+
+int radeon_mem_alloc( DRM_IOCTL_ARGS )
+{
+	DRM_DEVICE;
+	drm_radeon_private_t *dev_priv = dev->dev_private;
+	drm_radeon_mem_alloc_t alloc;
+	struct mem_block *block, **heap;
+
+	if ( !dev_priv ) {
+		DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
+		return DRM_ERR(EINVAL);
+	}
+
+	DRM_COPY_FROM_USER_IOCTL( alloc, (drm_radeon_mem_alloc_t *)data,
+				  sizeof(alloc) );
+
+	heap = get_heap( dev_priv, alloc.region );
+	if (!heap || !*heap)
+		return DRM_ERR(EFAULT);
+	
+	/* Make things easier on ourselves: all allocations at least
+	 * 4k aligned.
+	 */
+	if (alloc.alignment < 12)
+		alloc.alignment = 12;
+
+	block = alloc_block( *heap, alloc.size, alloc.alignment,
+			     filp );
+
+	if (!block) 
+		return DRM_ERR(ENOMEM);
+
+	if ( DRM_COPY_TO_USER( alloc.region_offset, &block->start, 
+			       sizeof(int) ) ) {
+		DRM_ERROR( "copy_to_user\n" );
+		return DRM_ERR(EFAULT);
+	}
+	
+	return 0;
+}
+
+
+
+int radeon_mem_free( DRM_IOCTL_ARGS )
+{
+	DRM_DEVICE;
+	drm_radeon_private_t *dev_priv = dev->dev_private;
+	drm_radeon_mem_free_t memfree;
+	struct mem_block *block, **heap;
+
+	if ( !dev_priv ) {
+		DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
+		return DRM_ERR(EINVAL);
+	}
+
+	DRM_COPY_FROM_USER_IOCTL( memfree, (drm_radeon_mem_free_t *)data,
+				  sizeof(memfree) );
+
+	heap = get_heap( dev_priv, memfree.region );
+	if (!heap || !*heap)
+		return DRM_ERR(EFAULT);
+	
+	block = find_block( *heap, memfree.region_offset );
+	if (!block)
+		return DRM_ERR(EFAULT);
+
+	if (block->filp != filp)
+		return DRM_ERR(EPERM);
+
+	free_block( block );	
+	return 0;
+}
+
+int radeon_mem_init_heap( DRM_IOCTL_ARGS )
+{
+	DRM_DEVICE;
+	drm_radeon_private_t *dev_priv = dev->dev_private;
+	drm_radeon_mem_init_heap_t initheap;
+	struct mem_block **heap;
+
+	if ( !dev_priv ) {
+		DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
+		return DRM_ERR(EINVAL);
+	}
+
+	DRM_COPY_FROM_USER_IOCTL( initheap, (drm_radeon_mem_init_heap_t *)data,
+				  sizeof(initheap) );
+
+	heap = get_heap( dev_priv, initheap.region );
+	if (!heap) 
+		return DRM_ERR(EFAULT);
+	
+	if (*heap) {
+		DRM_ERROR("heap already initialized?");
+		return DRM_ERR(EFAULT);
+	}
+		
+	return init_heap( heap, initheap.start, initheap.size );
+}
+
+
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/radeon_state.c b/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/radeon_state.c
new file mode 100644
index 000000000..86cbead5d
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/radeon_state.c
@@ -0,0 +1,2204 @@
+/* radeon_state.c -- State support for Radeon -*- linux-c -*-
+ *
+ * Copyright 2000 VA Linux Systems, Inc., Fremont, California.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ *    Gareth Hughes <gareth@valinux.com>
+ *    Kevin E. Martin <martin@valinux.com>
+ */
+
+#include "radeon.h"
+#include "drmP.h"
+#include "drm.h"
+#include "drm_sarea.h"
+#include "radeon_drm.h"
+#include "radeon_drv.h"
+
+
+/* ================================================================
+ * CP hardware state programming functions
+ */
+
+static __inline__ void radeon_emit_clip_rect( drm_radeon_private_t *dev_priv,
+					  drm_clip_rect_t *box )
+{
+	RING_LOCALS;
+
+	DRM_DEBUG( "   box:  x1=%d y1=%d  x2=%d y2=%d\n",
+		   box->x1, box->y1, box->x2, box->y2 );
+
+	BEGIN_RING( 4 );
+	OUT_RING( CP_PACKET0( RADEON_RE_TOP_LEFT, 0 ) );
+	OUT_RING( (box->y1 << 16) | box->x1 );
+	OUT_RING( CP_PACKET0( RADEON_RE_WIDTH_HEIGHT, 0 ) );
+	OUT_RING( ((box->y2 - 1) << 16) | (box->x2 - 1) );
+	ADVANCE_RING();
+}
+
+/* Emit 1.1 state
+ */
+static void radeon_emit_state( drm_radeon_private_t *dev_priv,
+			       drm_radeon_context_regs_t *ctx,
+			       drm_radeon_texture_regs_t *tex,
+			       unsigned int dirty )
+{
+	RING_LOCALS;
+	DRM_DEBUG( "dirty=0x%08x\n", dirty );
+
+	if ( dirty & RADEON_UPLOAD_CONTEXT ) {
+		BEGIN_RING( 14 );
+		OUT_RING( CP_PACKET0( RADEON_PP_MISC, 6 ) );
+		OUT_RING( ctx->pp_misc );
+		OUT_RING( ctx->pp_fog_color );
+		OUT_RING( ctx->re_solid_color );
+		OUT_RING( ctx->rb3d_blendcntl );
+		OUT_RING( ctx->rb3d_depthoffset );
+		OUT_RING( ctx->rb3d_depthpitch );
+		OUT_RING( ctx->rb3d_zstencilcntl );
+		OUT_RING( CP_PACKET0( RADEON_PP_CNTL, 2 ) );
+		OUT_RING( ctx->pp_cntl );
+		OUT_RING( ctx->rb3d_cntl );
+		OUT_RING( ctx->rb3d_coloroffset );
+		OUT_RING( CP_PACKET0( RADEON_RB3D_COLORPITCH, 0 ) );
+		OUT_RING( ctx->rb3d_colorpitch );
+		ADVANCE_RING();
+	}
+
+	if ( dirty & RADEON_UPLOAD_VERTFMT ) {
+		BEGIN_RING( 2 );
+		OUT_RING( CP_PACKET0( RADEON_SE_COORD_FMT, 0 ) );
+		OUT_RING( ctx->se_coord_fmt );
+		ADVANCE_RING();
+	}
+
+	if ( dirty & RADEON_UPLOAD_LINE ) {
+		BEGIN_RING( 5 );
+		OUT_RING( CP_PACKET0( RADEON_RE_LINE_PATTERN, 1 ) );
+		OUT_RING( ctx->re_line_pattern );
+		OUT_RING( ctx->re_line_state );
+		OUT_RING( CP_PACKET0( RADEON_SE_LINE_WIDTH, 0 ) );
+		OUT_RING( ctx->se_line_width );
+		ADVANCE_RING();
+	}
+
+	if ( dirty & RADEON_UPLOAD_BUMPMAP ) {
+		BEGIN_RING( 5 );
+		OUT_RING( CP_PACKET0( RADEON_PP_LUM_MATRIX, 0 ) );
+		OUT_RING( ctx->pp_lum_matrix );
+		OUT_RING( CP_PACKET0( RADEON_PP_ROT_MATRIX_0, 1 ) );
+		OUT_RING( ctx->pp_rot_matrix_0 );
+		OUT_RING( ctx->pp_rot_matrix_1 );
+		ADVANCE_RING();
+	}
+
+	if ( dirty & RADEON_UPLOAD_MASKS ) {
+		BEGIN_RING( 4 );
+		OUT_RING( CP_PACKET0( RADEON_RB3D_STENCILREFMASK, 2 ) );
+		OUT_RING( ctx->rb3d_stencilrefmask );
+		OUT_RING( ctx->rb3d_ropcntl );
+		OUT_RING( ctx->rb3d_planemask );
+		ADVANCE_RING();
+	}
+
+	if ( dirty & RADEON_UPLOAD_VIEWPORT ) {
+		BEGIN_RING( 7 );
+		OUT_RING( CP_PACKET0( RADEON_SE_VPORT_XSCALE, 5 ) );
+		OUT_RING( ctx->se_vport_xscale );
+		OUT_RING( ctx->se_vport_xoffset );
+		OUT_RING( ctx->se_vport_yscale );
+		OUT_RING( ctx->se_vport_yoffset );
+		OUT_RING( ctx->se_vport_zscale );
+		OUT_RING( ctx->se_vport_zoffset );
+		ADVANCE_RING();
+	}
+
+	if ( dirty & RADEON_UPLOAD_SETUP ) {
+		BEGIN_RING( 4 );
+		OUT_RING( CP_PACKET0( RADEON_SE_CNTL, 0 ) );
+		OUT_RING( ctx->se_cntl );
+		OUT_RING( CP_PACKET0( RADEON_SE_CNTL_STATUS, 0 ) );
+		OUT_RING( ctx->se_cntl_status );
+		ADVANCE_RING();
+	}
+
+	if ( dirty & RADEON_UPLOAD_MISC ) {
+		BEGIN_RING( 2 );
+		OUT_RING( CP_PACKET0( RADEON_RE_MISC, 0 ) );
+		OUT_RING( ctx->re_misc );
+		ADVANCE_RING();
+	}
+
+	if ( dirty & RADEON_UPLOAD_TEX0 ) {
+		BEGIN_RING( 9 );
+		OUT_RING( CP_PACKET0( RADEON_PP_TXFILTER_0, 5 ) );
+		OUT_RING( tex[0].pp_txfilter );
+		OUT_RING( tex[0].pp_txformat );
+		OUT_RING( tex[0].pp_txoffset );
+		OUT_RING( tex[0].pp_txcblend );
+		OUT_RING( tex[0].pp_txablend );
+		OUT_RING( tex[0].pp_tfactor );
+		OUT_RING( CP_PACKET0( RADEON_PP_BORDER_COLOR_0, 0 ) );
+		OUT_RING( tex[0].pp_border_color );
+		ADVANCE_RING();
+	}
+
+	if ( dirty & RADEON_UPLOAD_TEX1 ) {
+		BEGIN_RING( 9 );
+		OUT_RING( CP_PACKET0( RADEON_PP_TXFILTER_1, 5 ) );
+		OUT_RING( tex[1].pp_txfilter );
+		OUT_RING( tex[1].pp_txformat );
+		OUT_RING( tex[1].pp_txoffset );
+		OUT_RING( tex[1].pp_txcblend );
+		OUT_RING( tex[1].pp_txablend );
+		OUT_RING( tex[1].pp_tfactor );
+		OUT_RING( CP_PACKET0( RADEON_PP_BORDER_COLOR_1, 0 ) );
+		OUT_RING( tex[1].pp_border_color );
+		ADVANCE_RING();
+	}
+
+	if ( dirty & RADEON_UPLOAD_TEX2 ) {
+		BEGIN_RING( 9 );
+		OUT_RING( CP_PACKET0( RADEON_PP_TXFILTER_2, 5 ) );
+		OUT_RING( tex[2].pp_txfilter );
+		OUT_RING( tex[2].pp_txformat );
+		OUT_RING( tex[2].pp_txoffset );
+		OUT_RING( tex[2].pp_txcblend );
+		OUT_RING( tex[2].pp_txablend );
+		OUT_RING( tex[2].pp_tfactor );
+		OUT_RING( CP_PACKET0( RADEON_PP_BORDER_COLOR_2, 0 ) );
+		OUT_RING( tex[2].pp_border_color );
+		ADVANCE_RING();
+	}
+}
+
+/* Emit 1.2 state
+ */
+static void radeon_emit_state2( drm_radeon_private_t *dev_priv,
+				drm_radeon_state_t *state )
+{
+	RING_LOCALS;
+
+	if (state->dirty & RADEON_UPLOAD_ZBIAS) {
+		BEGIN_RING( 3 );
+		OUT_RING( CP_PACKET0( RADEON_SE_ZBIAS_FACTOR, 1 ) );
+		OUT_RING( state->context2.se_zbias_factor ); 
+		OUT_RING( state->context2.se_zbias_constant ); 
+		ADVANCE_RING();
+	}
+
+	radeon_emit_state( dev_priv, &state->context, 
+			   state->tex, state->dirty );
+}
+
+/* New (1.3) state mechanism.  3 commands (packet, scalar, vector) in
+ * 1.3 cmdbuffers allow all previous state to be updated as well as
+ * the tcl scalar and vector areas.  
+ */
+static struct { 
+	int start; 
+	int len; 
+	const char *name;
+} packet[RADEON_MAX_STATE_PACKETS] = {
+	{ RADEON_PP_MISC,7,"RADEON_PP_MISC" },
+	{ RADEON_PP_CNTL,3,"RADEON_PP_CNTL" },
+	{ RADEON_RB3D_COLORPITCH,1,"RADEON_RB3D_COLORPITCH" },
+	{ RADEON_RE_LINE_PATTERN,2,"RADEON_RE_LINE_PATTERN" },
+	{ RADEON_SE_LINE_WIDTH,1,"RADEON_SE_LINE_WIDTH" },
+	{ RADEON_PP_LUM_MATRIX,1,"RADEON_PP_LUM_MATRIX" },
+	{ RADEON_PP_ROT_MATRIX_0,2,"RADEON_PP_ROT_MATRIX_0" },
+	{ RADEON_RB3D_STENCILREFMASK,3,"RADEON_RB3D_STENCILREFMASK" },
+	{ RADEON_SE_VPORT_XSCALE,6,"RADEON_SE_VPORT_XSCALE" },
+	{ RADEON_SE_CNTL,2,"RADEON_SE_CNTL" },
+	{ RADEON_SE_CNTL_STATUS,1,"RADEON_SE_CNTL_STATUS" },
+	{ RADEON_RE_MISC,1,"RADEON_RE_MISC" },
+	{ RADEON_PP_TXFILTER_0,6,"RADEON_PP_TXFILTER_0" },
+	{ RADEON_PP_BORDER_COLOR_0,1,"RADEON_PP_BORDER_COLOR_0" },
+	{ RADEON_PP_TXFILTER_1,6,"RADEON_PP_TXFILTER_1" },
+	{ RADEON_PP_BORDER_COLOR_1,1,"RADEON_PP_BORDER_COLOR_1" },
+	{ RADEON_PP_TXFILTER_2,6,"RADEON_PP_TXFILTER_2" },
+	{ RADEON_PP_BORDER_COLOR_2,1,"RADEON_PP_BORDER_COLOR_2" },
+	{ RADEON_SE_ZBIAS_FACTOR,2,"RADEON_SE_ZBIAS_FACTOR" },
+	{ RADEON_SE_TCL_OUTPUT_VTX_FMT,11,"RADEON_SE_TCL_OUTPUT_VTX_FMT" },
+	{ RADEON_SE_TCL_MATERIAL_EMMISSIVE_RED,17,"RADEON_SE_TCL_MATERIAL_EMMISSIVE_RED" },
+	{ R200_PP_TXCBLEND_0, 4, "R200_PP_TXCBLEND_0" },
+	{ R200_PP_TXCBLEND_1, 4, "R200_PP_TXCBLEND_1" },
+	{ R200_PP_TXCBLEND_2, 4, "R200_PP_TXCBLEND_2" },
+	{ R200_PP_TXCBLEND_3, 4, "R200_PP_TXCBLEND_3" },
+	{ R200_PP_TXCBLEND_4, 4, "R200_PP_TXCBLEND_4" },
+	{ R200_PP_TXCBLEND_5, 4, "R200_PP_TXCBLEND_5" },
+	{ R200_PP_TXCBLEND_6, 4, "R200_PP_TXCBLEND_6" },
+	{ R200_PP_TXCBLEND_7, 4, "R200_PP_TXCBLEND_7" },
+	{ R200_SE_TCL_LIGHT_MODEL_CTL_0, 6, "R200_SE_TCL_LIGHT_MODEL_CTL_0" },
+	{ R200_PP_TFACTOR_0, 6, "R200_PP_TFACTOR_0" },
+	{ R200_SE_VTX_FMT_0, 4, "R200_SE_VTX_FMT_0" },
+	{ R200_SE_VAP_CNTL, 1, "R200_SE_VAP_CNTL" },
+	{ R200_SE_TCL_MATRIX_SEL_0, 5, "R200_SE_TCL_MATRIX_SEL_0" },
+	{ R200_SE_TCL_TEX_PROC_CTL_2, 5, "R200_SE_TCL_TEX_PROC_CTL_2" },
+	{ R200_SE_TCL_UCP_VERT_BLEND_CTL, 1, "R200_SE_TCL_UCP_VERT_BLEND_CTL" },
+	{ R200_PP_TXFILTER_0, 6, "R200_PP_TXFILTER_0" },
+	{ R200_PP_TXFILTER_1, 6, "R200_PP_TXFILTER_1" },
+	{ R200_PP_TXFILTER_2, 6, "R200_PP_TXFILTER_2" },
+	{ R200_PP_TXFILTER_3, 6, "R200_PP_TXFILTER_3" },
+	{ R200_PP_TXFILTER_4, 6, "R200_PP_TXFILTER_4" },
+	{ R200_PP_TXFILTER_5, 6, "R200_PP_TXFILTER_5" },
+	{ R200_PP_TXOFFSET_0, 1, "R200_PP_TXOFFSET_0" },
+	{ R200_PP_TXOFFSET_1, 1, "R200_PP_TXOFFSET_1" },
+	{ R200_PP_TXOFFSET_2, 1, "R200_PP_TXOFFSET_2" },
+	{ R200_PP_TXOFFSET_3, 1, "R200_PP_TXOFFSET_3" },
+	{ R200_PP_TXOFFSET_4, 1, "R200_PP_TXOFFSET_4" },
+	{ R200_PP_TXOFFSET_5, 1, "R200_PP_TXOFFSET_5" },
+	{ R200_SE_VTE_CNTL, 1, "R200_SE_VTE_CNTL" },
+	{ R200_SE_TCL_OUTPUT_VTX_COMP_SEL, 1, "R200_SE_TCL_OUTPUT_VTX_COMP_SEL" },
+	{ R200_PP_TAM_DEBUG3, 1, "R200_PP_TAM_DEBUG3" },
+	{ R200_PP_CNTL_X, 1, "R200_PP_CNTL_X" }, 
+	{ R200_RB3D_DEPTHXY_OFFSET, 1, "R200_RB3D_DEPTHXY_OFFSET" }, 
+	{ R200_RE_AUX_SCISSOR_CNTL, 1, "R200_RE_AUX_SCISSOR_CNTL" }, 
+	{ R200_RE_SCISSOR_TL_0, 2, "R200_RE_SCISSOR_TL_0" }, 
+	{ R200_RE_SCISSOR_TL_1, 2, "R200_RE_SCISSOR_TL_1" }, 
+	{ R200_RE_SCISSOR_TL_2, 2, "R200_RE_SCISSOR_TL_2" }, 
+	{ R200_SE_VAP_CNTL_STATUS, 1, "R200_SE_VAP_CNTL_STATUS" }, 
+	{ R200_SE_VTX_STATE_CNTL, 1, "R200_SE_VTX_STATE_CNTL" }, 
+	{ R200_RE_POINTSIZE, 1, "R200_RE_POINTSIZE" }, 
+	{ R200_SE_TCL_INPUT_VTX_VECTOR_ADDR_0, 4, "R200_SE_TCL_INPUT_VTX_VECTOR_ADDR_0" },
+	{ R200_PP_CUBIC_FACES_0, 1, "R200_PP_CUBIC_FACES_0" }, /* 61 */
+	{ R200_PP_CUBIC_OFFSET_F1_0, 5, "R200_PP_CUBIC_OFFSET_F1_0" }, /* 62 */
+	{ R200_PP_CUBIC_FACES_1, 1, "R200_PP_CUBIC_FACES_1" },
+	{ R200_PP_CUBIC_OFFSET_F1_1, 5, "R200_PP_CUBIC_OFFSET_F1_1" },
+	{ R200_PP_CUBIC_FACES_2, 1, "R200_PP_CUBIC_FACES_2" },
+	{ R200_PP_CUBIC_OFFSET_F1_2, 5, "R200_PP_CUBIC_OFFSET_F1_2" },
+	{ R200_PP_CUBIC_FACES_3, 1, "R200_PP_CUBIC_FACES_3" },
+	{ R200_PP_CUBIC_OFFSET_F1_3, 5, "R200_PP_CUBIC_OFFSET_F1_3" },
+	{ R200_PP_CUBIC_FACES_4, 1, "R200_PP_CUBIC_FACES_4" },
+	{ R200_PP_CUBIC_OFFSET_F1_4, 5, "R200_PP_CUBIC_OFFSET_F1_4" },
+	{ R200_PP_CUBIC_FACES_5, 1, "R200_PP_CUBIC_FACES_5" },
+	{ R200_PP_CUBIC_OFFSET_F1_5, 5, "R200_PP_CUBIC_OFFSET_F1_5" },
+};
+
+
+
+/* ================================================================
+ * Performance monitoring functions
+ */
+
+static void radeon_clear_box( drm_radeon_private_t *dev_priv,
+			      int x, int y, int w, int h,
+			      int r, int g, int b )
+{
+	u32 color;
+	RING_LOCALS;
+
+	x += dev_priv->sarea_priv->boxes[0].x1;
+	y += dev_priv->sarea_priv->boxes[0].y1;
+
+	switch ( dev_priv->color_fmt ) {
+	case RADEON_COLOR_FORMAT_RGB565:
+		color = (((r & 0xf8) << 8) |
+			 ((g & 0xfc) << 3) |
+			 ((b & 0xf8) >> 3));
+		break;
+	case RADEON_COLOR_FORMAT_ARGB8888:
+	default:
+		color = (((0xff) << 24) | (r << 16) | (g <<  8) | b);
+		break;
+	}
+
+	BEGIN_RING( 4 );
+	RADEON_WAIT_UNTIL_3D_IDLE();		
+	OUT_RING( CP_PACKET0( RADEON_DP_WRITE_MASK, 0 ) );
+	OUT_RING( 0xffffffff );
+	ADVANCE_RING();
+
+	BEGIN_RING( 6 );
+
+	OUT_RING( CP_PACKET3( RADEON_CNTL_PAINT_MULTI, 4 ) );
+	OUT_RING( RADEON_GMC_DST_PITCH_OFFSET_CNTL |
+		  RADEON_GMC_BRUSH_SOLID_COLOR |
+		  (dev_priv->color_fmt << 8) |
+		  RADEON_GMC_SRC_DATATYPE_COLOR |
+		  RADEON_ROP3_P |
+		  RADEON_GMC_CLR_CMP_CNTL_DIS );
+
+ 	if ( dev_priv->page_flipping && dev_priv->current_page == 1 ) { 
+		OUT_RING( dev_priv->front_pitch_offset );
+ 	} else {	 
+		OUT_RING( dev_priv->back_pitch_offset );
+ 	} 
+
+	OUT_RING( color );
+
+	OUT_RING( (x << 16) | y );
+	OUT_RING( (w << 16) | h );
+
+	ADVANCE_RING();
+}
+
+static void radeon_cp_performance_boxes( drm_radeon_private_t *dev_priv )
+{
+	/* Collapse various things into a wait flag -- trying to
+	 * guess if userspase slept -- better just to have them tell us.
+	 */
+	if (dev_priv->stats.last_frame_reads > 1 ||
+	    dev_priv->stats.last_clear_reads > dev_priv->stats.clears) {
+		dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE;
+	}
+
+	if (dev_priv->stats.freelist_loops) {
+		dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE;
+	}
+
+	/* Purple box for page flipping
+	 */
+	if ( dev_priv->stats.boxes & RADEON_BOX_FLIP ) 
+		radeon_clear_box( dev_priv, 4, 4, 8, 8, 255, 0, 255 );
+
+	/* Red box if we have to wait for idle at any point
+	 */
+	if ( dev_priv->stats.boxes & RADEON_BOX_WAIT_IDLE ) 
+		radeon_clear_box( dev_priv, 16, 4, 8, 8, 255, 0, 0 );
+
+	/* Blue box: lost context?
+	 */
+
+	/* Yellow box for texture swaps
+	 */
+	if ( dev_priv->stats.boxes & RADEON_BOX_TEXTURE_LOAD ) 
+		radeon_clear_box( dev_priv, 40, 4, 8, 8, 255, 255, 0 );
+
+	/* Green box if hardware never idles (as far as we can tell)
+	 */
+	if ( !(dev_priv->stats.boxes & RADEON_BOX_DMA_IDLE) ) 
+		radeon_clear_box( dev_priv, 64, 4, 8, 8, 0, 255, 0 );
+
+
+	/* Draw bars indicating number of buffers allocated 
+	 * (not a great measure, easily confused)
+	 */
+	if (dev_priv->stats.requested_bufs) {
+		if (dev_priv->stats.requested_bufs > 100)
+			dev_priv->stats.requested_bufs = 100;
+
+		radeon_clear_box( dev_priv, 4, 16,  
+				  dev_priv->stats.requested_bufs, 4,
+				  196, 128, 128 );
+	}
+
+	memset( &dev_priv->stats, 0, sizeof(dev_priv->stats) );
+
+}
+/* ================================================================
+ * CP command dispatch functions
+ */
+
+static void radeon_cp_dispatch_clear( drm_device_t *dev,
+				      drm_radeon_clear_t *clear,
+				      drm_radeon_clear_rect_t *depth_boxes )
+{
+	drm_radeon_private_t *dev_priv = dev->dev_private;
+	drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv;
+	drm_radeon_depth_clear_t *depth_clear = &dev_priv->depth_clear;
+	int nbox = sarea_priv->nbox;
+	drm_clip_rect_t *pbox = sarea_priv->boxes;
+	unsigned int flags = clear->flags;
+	u32 rb3d_cntl = 0, rb3d_stencilrefmask= 0;
+	int i;
+	RING_LOCALS;
+	DRM_DEBUG( "flags = 0x%x\n", flags );
+
+	dev_priv->stats.clears++;
+
+	if ( dev_priv->page_flipping && dev_priv->current_page == 1 ) {
+		unsigned int tmp = flags;
+
+		flags &= ~(RADEON_FRONT | RADEON_BACK);
+		if ( tmp & RADEON_FRONT ) flags |= RADEON_BACK;
+		if ( tmp & RADEON_BACK )  flags |= RADEON_FRONT;
+	}
+
+	if ( flags & (RADEON_FRONT | RADEON_BACK) ) {
+
+		BEGIN_RING( 4 );
+
+		/* Ensure the 3D stream is idle before doing a
+		 * 2D fill to clear the front or back buffer.
+		 */
+		RADEON_WAIT_UNTIL_3D_IDLE();
+		
+		OUT_RING( CP_PACKET0( RADEON_DP_WRITE_MASK, 0 ) );
+		OUT_RING( clear->color_mask );
+
+		ADVANCE_RING();
+
+		/* Make sure we restore the 3D state next time.
+		 */
+		dev_priv->sarea_priv->ctx_owner = 0;
+
+		for ( i = 0 ; i < nbox ; i++ ) {
+			int x = pbox[i].x1;
+			int y = pbox[i].y1;
+			int w = pbox[i].x2 - x;
+			int h = pbox[i].y2 - y;
+
+			DRM_DEBUG( "dispatch clear %d,%d-%d,%d flags 0x%x\n",
+				   x, y, w, h, flags );
+
+			if ( flags & RADEON_FRONT ) {
+				BEGIN_RING( 6 );
+				
+				OUT_RING( CP_PACKET3( RADEON_CNTL_PAINT_MULTI, 4 ) );
+				OUT_RING( RADEON_GMC_DST_PITCH_OFFSET_CNTL |
+					  RADEON_GMC_BRUSH_SOLID_COLOR |
+					  (dev_priv->color_fmt << 8) |
+					  RADEON_GMC_SRC_DATATYPE_COLOR |
+					  RADEON_ROP3_P |
+					  RADEON_GMC_CLR_CMP_CNTL_DIS );
+
+				OUT_RING( dev_priv->front_pitch_offset );
+				OUT_RING( clear->clear_color );
+				
+				OUT_RING( (x << 16) | y );
+				OUT_RING( (w << 16) | h );
+				
+				ADVANCE_RING();
+			}
+			
+			if ( flags & RADEON_BACK ) {
+				BEGIN_RING( 6 );
+				
+				OUT_RING( CP_PACKET3( RADEON_CNTL_PAINT_MULTI, 4 ) );
+				OUT_RING( RADEON_GMC_DST_PITCH_OFFSET_CNTL |
+					  RADEON_GMC_BRUSH_SOLID_COLOR |
+					  (dev_priv->color_fmt << 8) |
+					  RADEON_GMC_SRC_DATATYPE_COLOR |
+					  RADEON_ROP3_P |
+					  RADEON_GMC_CLR_CMP_CNTL_DIS );
+				
+				OUT_RING( dev_priv->back_pitch_offset );
+				OUT_RING( clear->clear_color );
+
+				OUT_RING( (x << 16) | y );
+				OUT_RING( (w << 16) | h );
+
+				ADVANCE_RING();
+			}
+		}
+	}
+
+	/* We have to clear the depth and/or stencil buffers by
+	 * rendering a quad into just those buffers.  Thus, we have to
+	 * make sure the 3D engine is configured correctly.
+	 */
+	if ( dev_priv->is_r200 &&
+	     (flags & (RADEON_DEPTH | RADEON_STENCIL)) ) {
+
+		int tempPP_CNTL;
+		int tempRE_CNTL;
+		int tempRB3D_CNTL;
+		int tempRB3D_ZSTENCILCNTL;
+		int tempRB3D_STENCILREFMASK;
+		int tempRB3D_PLANEMASK;
+		int tempSE_CNTL;
+		int tempSE_VTE_CNTL;
+		int tempSE_VTX_FMT_0;
+		int tempSE_VTX_FMT_1;
+		int tempSE_VAP_CNTL;
+		int tempRE_AUX_SCISSOR_CNTL;
+
+		tempPP_CNTL = 0;
+		tempRE_CNTL = 0;
+
+		tempRB3D_CNTL = depth_clear->rb3d_cntl;
+		tempRB3D_CNTL &= ~(1<<15); /* unset radeon magic flag */
+
+		tempRB3D_ZSTENCILCNTL = depth_clear->rb3d_zstencilcntl;
+		tempRB3D_STENCILREFMASK = 0x0;
+
+		tempSE_CNTL = depth_clear->se_cntl;
+
+
+
+		/* Disable TCL */
+
+		tempSE_VAP_CNTL = (/* SE_VAP_CNTL__FORCE_W_TO_ONE_MASK |  */
+				   (0x9 << SE_VAP_CNTL__VF_MAX_VTX_NUM__SHIFT));
+
+		tempRB3D_PLANEMASK = 0x0;
+
+		tempRE_AUX_SCISSOR_CNTL = 0x0;
+
+		tempSE_VTE_CNTL =
+			SE_VTE_CNTL__VTX_XY_FMT_MASK |
+			SE_VTE_CNTL__VTX_Z_FMT_MASK;
+
+		/* Vertex format (X, Y, Z, W)*/
+		tempSE_VTX_FMT_0 =
+			SE_VTX_FMT_0__VTX_Z0_PRESENT_MASK |
+			SE_VTX_FMT_0__VTX_W0_PRESENT_MASK;
+		tempSE_VTX_FMT_1 = 0x0;
+
+
+		/* 
+		 * Depth buffer specific enables 
+		 */
+		if (flags & RADEON_DEPTH) {
+			/* Enable depth buffer */
+			tempRB3D_CNTL |= RADEON_Z_ENABLE;
+		} else {
+			/* Disable depth buffer */
+			tempRB3D_CNTL &= ~RADEON_Z_ENABLE;
+		}
+
+		/* 
+		 * Stencil buffer specific enables
+		 */
+		if ( flags & RADEON_STENCIL ) {
+			tempRB3D_CNTL |=  RADEON_STENCIL_ENABLE;
+			tempRB3D_STENCILREFMASK = clear->depth_mask; 
+		} else {
+			tempRB3D_CNTL &= ~RADEON_STENCIL_ENABLE;
+			tempRB3D_STENCILREFMASK = 0x00000000;
+		}
+
+		BEGIN_RING( 26 );
+		RADEON_WAIT_UNTIL_2D_IDLE();
+
+		OUT_RING_REG( RADEON_PP_CNTL, tempPP_CNTL );
+		OUT_RING_REG( R200_RE_CNTL, tempRE_CNTL );
+		OUT_RING_REG( RADEON_RB3D_CNTL, tempRB3D_CNTL );
+		OUT_RING_REG( RADEON_RB3D_ZSTENCILCNTL,
+			      tempRB3D_ZSTENCILCNTL );
+		OUT_RING_REG( RADEON_RB3D_STENCILREFMASK, 
+			      tempRB3D_STENCILREFMASK );
+		OUT_RING_REG( RADEON_RB3D_PLANEMASK, tempRB3D_PLANEMASK );
+		OUT_RING_REG( RADEON_SE_CNTL, tempSE_CNTL );
+		OUT_RING_REG( R200_SE_VTE_CNTL, tempSE_VTE_CNTL );
+		OUT_RING_REG( R200_SE_VTX_FMT_0, tempSE_VTX_FMT_0 );
+		OUT_RING_REG( R200_SE_VTX_FMT_1, tempSE_VTX_FMT_1 );
+		OUT_RING_REG( R200_SE_VAP_CNTL, tempSE_VAP_CNTL );
+		OUT_RING_REG( R200_RE_AUX_SCISSOR_CNTL, 
+			      tempRE_AUX_SCISSOR_CNTL );
+		ADVANCE_RING();
+
+		/* Make sure we restore the 3D state next time.
+		 */
+		dev_priv->sarea_priv->ctx_owner = 0;
+
+		for ( i = 0 ; i < nbox ; i++ ) {
+			
+			/* Funny that this should be required -- 
+			 *  sets top-left?
+			 */
+			radeon_emit_clip_rect( dev_priv,
+					       &sarea_priv->boxes[i] );
+
+			BEGIN_RING( 14 );
+			OUT_RING( CP_PACKET3( R200_3D_DRAW_IMMD_2, 12 ) );
+			OUT_RING( (RADEON_PRIM_TYPE_RECT_LIST |
+				   RADEON_PRIM_WALK_RING |
+				   (3 << RADEON_NUM_VERTICES_SHIFT)) );
+			OUT_RING( depth_boxes[i].ui[CLEAR_X1] );
+			OUT_RING( depth_boxes[i].ui[CLEAR_Y1] );
+			OUT_RING( depth_boxes[i].ui[CLEAR_DEPTH] );
+			OUT_RING( 0x3f800000 );
+			OUT_RING( depth_boxes[i].ui[CLEAR_X1] );
+			OUT_RING( depth_boxes[i].ui[CLEAR_Y2] );
+			OUT_RING( depth_boxes[i].ui[CLEAR_DEPTH] );
+			OUT_RING( 0x3f800000 );
+			OUT_RING( depth_boxes[i].ui[CLEAR_X2] );
+			OUT_RING( depth_boxes[i].ui[CLEAR_Y2] );
+			OUT_RING( depth_boxes[i].ui[CLEAR_DEPTH] );
+			OUT_RING( 0x3f800000 );
+			ADVANCE_RING();
+		}
+	} 
+	else if ( (flags & (RADEON_DEPTH | RADEON_STENCIL)) ) {
+
+		rb3d_cntl = depth_clear->rb3d_cntl;
+
+		if ( flags & RADEON_DEPTH ) {
+			rb3d_cntl |=  RADEON_Z_ENABLE;
+		} else {
+			rb3d_cntl &= ~RADEON_Z_ENABLE;
+		}
+
+		if ( flags & RADEON_STENCIL ) {
+			rb3d_cntl |=  RADEON_STENCIL_ENABLE;
+			rb3d_stencilrefmask = clear->depth_mask; /* misnamed field */
+		} else {
+			rb3d_cntl &= ~RADEON_STENCIL_ENABLE;
+			rb3d_stencilrefmask = 0x00000000;
+		}
+
+		BEGIN_RING( 13 );
+		RADEON_WAIT_UNTIL_2D_IDLE();
+
+		OUT_RING( CP_PACKET0( RADEON_PP_CNTL, 1 ) );
+		OUT_RING( 0x00000000 );
+		OUT_RING( rb3d_cntl );
+		
+		OUT_RING_REG( RADEON_RB3D_ZSTENCILCNTL,
+			      depth_clear->rb3d_zstencilcntl );
+		OUT_RING_REG( RADEON_RB3D_STENCILREFMASK,
+			      rb3d_stencilrefmask );
+		OUT_RING_REG( RADEON_RB3D_PLANEMASK,
+			      0x00000000 );
+		OUT_RING_REG( RADEON_SE_CNTL,
+			      depth_clear->se_cntl );
+		ADVANCE_RING();
+
+		/* Make sure we restore the 3D state next time.
+		 */
+		dev_priv->sarea_priv->ctx_owner = 0;
+
+		for ( i = 0 ; i < nbox ; i++ ) {
+			
+			/* Funny that this should be required -- 
+			 *  sets top-left?
+			 */
+			radeon_emit_clip_rect( dev_priv,
+					       &sarea_priv->boxes[i] );
+
+			BEGIN_RING( 15 );
+
+			OUT_RING( CP_PACKET3( RADEON_3D_DRAW_IMMD, 13 ) );
+			OUT_RING( RADEON_VTX_Z_PRESENT |
+				  RADEON_VTX_PKCOLOR_PRESENT);
+			OUT_RING( (RADEON_PRIM_TYPE_RECT_LIST |
+				   RADEON_PRIM_WALK_RING |
+				   RADEON_MAOS_ENABLE |
+				   RADEON_VTX_FMT_RADEON_MODE |
+				   (3 << RADEON_NUM_VERTICES_SHIFT)) );
+
+
+			OUT_RING( depth_boxes[i].ui[CLEAR_X1] );
+			OUT_RING( depth_boxes[i].ui[CLEAR_Y1] );
+			OUT_RING( depth_boxes[i].ui[CLEAR_DEPTH] );
+			OUT_RING( 0x0 );
+
+			OUT_RING( depth_boxes[i].ui[CLEAR_X1] );
+			OUT_RING( depth_boxes[i].ui[CLEAR_Y2] );
+			OUT_RING( depth_boxes[i].ui[CLEAR_DEPTH] );
+			OUT_RING( 0x0 );
+
+			OUT_RING( depth_boxes[i].ui[CLEAR_X2] );
+			OUT_RING( depth_boxes[i].ui[CLEAR_Y2] );
+			OUT_RING( depth_boxes[i].ui[CLEAR_DEPTH] );
+			OUT_RING( 0x0 );
+
+			ADVANCE_RING();
+		}
+	}
+
+	/* Increment the clear counter.  The client-side 3D driver must
+	 * wait on this value before performing the clear ioctl.  We
+	 * need this because the card's so damned fast...
+	 */
+	dev_priv->sarea_priv->last_clear++;
+
+	BEGIN_RING( 4 );
+
+	RADEON_CLEAR_AGE( dev_priv->sarea_priv->last_clear );
+	RADEON_WAIT_UNTIL_IDLE();
+
+	ADVANCE_RING();
+}
+
+static void radeon_cp_dispatch_swap( drm_device_t *dev )
+{
+	drm_radeon_private_t *dev_priv = dev->dev_private;
+	drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv;
+	int nbox = sarea_priv->nbox;
+	drm_clip_rect_t *pbox = sarea_priv->boxes;
+	int i;
+	RING_LOCALS;
+	DRM_DEBUG( "\n" );
+
+	/* Do some trivial performance monitoring...
+	 */
+	if (dev_priv->do_boxes)
+		radeon_cp_performance_boxes( dev_priv );
+
+
+	/* Wait for the 3D stream to idle before dispatching the bitblt.
+	 * This will prevent data corruption between the two streams.
+	 */
+	BEGIN_RING( 2 );
+
+	RADEON_WAIT_UNTIL_3D_IDLE();
+
+	ADVANCE_RING();
+
+	for ( i = 0 ; i < nbox ; i++ ) {
+		int x = pbox[i].x1;
+		int y = pbox[i].y1;
+		int w = pbox[i].x2 - x;
+		int h = pbox[i].y2 - y;
+
+		DRM_DEBUG( "dispatch swap %d,%d-%d,%d\n",
+			   x, y, w, h );
+
+		BEGIN_RING( 7 );
+
+		OUT_RING( CP_PACKET3( RADEON_CNTL_BITBLT_MULTI, 5 ) );
+		OUT_RING( RADEON_GMC_SRC_PITCH_OFFSET_CNTL |
+			  RADEON_GMC_DST_PITCH_OFFSET_CNTL |
+			  RADEON_GMC_BRUSH_NONE |
+			  (dev_priv->color_fmt << 8) |
+			  RADEON_GMC_SRC_DATATYPE_COLOR |
+			  RADEON_ROP3_S |
+			  RADEON_DP_SRC_SOURCE_MEMORY |
+			  RADEON_GMC_CLR_CMP_CNTL_DIS |
+			  RADEON_GMC_WR_MSK_DIS );
+		
+		/* Make this work even if front & back are flipped:
+		 */
+		if (dev_priv->current_page == 0) {
+			OUT_RING( dev_priv->back_pitch_offset );
+			OUT_RING( dev_priv->front_pitch_offset );
+		} 
+		else {
+			OUT_RING( dev_priv->front_pitch_offset );
+			OUT_RING( dev_priv->back_pitch_offset );
+		}
+
+		OUT_RING( (x << 16) | y );
+		OUT_RING( (x << 16) | y );
+		OUT_RING( (w << 16) | h );
+
+		ADVANCE_RING();
+	}
+
+	/* Increment the frame counter.  The client-side 3D driver must
+	 * throttle the framerate by waiting for this value before
+	 * performing the swapbuffer ioctl.
+	 */
+	dev_priv->sarea_priv->last_frame++;
+
+	BEGIN_RING( 4 );
+
+	RADEON_FRAME_AGE( dev_priv->sarea_priv->last_frame );
+	RADEON_WAIT_UNTIL_2D_IDLE();
+
+	ADVANCE_RING();
+}
+
+static void radeon_cp_dispatch_flip( drm_device_t *dev )
+{
+	drm_radeon_private_t *dev_priv = dev->dev_private;
+	drm_sarea_t *sarea = (drm_sarea_t *)dev_priv->sarea->handle;
+	int offset = (dev_priv->current_page == 1)
+		   ? dev_priv->front_offset : dev_priv->back_offset;
+	RING_LOCALS;
+	DRM_DEBUG( "%s: page=%d pfCurrentPage=%d\n", 
+		__FUNCTION__, 
+		dev_priv->current_page,
+		dev_priv->sarea_priv->pfCurrentPage);
+
+	/* Do some trivial performance monitoring...
+	 */
+	if (dev_priv->do_boxes) {
+		dev_priv->stats.boxes |= RADEON_BOX_FLIP;
+		radeon_cp_performance_boxes( dev_priv );
+	}
+
+	/* Update the frame offsets for both CRTCs
+	 */
+	BEGIN_RING( 6 );
+
+	RADEON_WAIT_UNTIL_3D_IDLE();
+	OUT_RING_REG( RADEON_CRTC_OFFSET, ( ( sarea->frame.y * dev_priv->front_pitch
+					      + sarea->frame.x 
+					      * ( dev_priv->color_fmt - 2 ) ) & ~7 )
+					  + offset );
+	OUT_RING_REG( RADEON_CRTC2_OFFSET, dev_priv->sarea_priv->crtc2_base
+					   + offset );
+
+	ADVANCE_RING();
+
+	/* Increment the frame counter.  The client-side 3D driver must
+	 * throttle the framerate by waiting for this value before
+	 * performing the swapbuffer ioctl.
+	 */
+	dev_priv->sarea_priv->last_frame++;
+	dev_priv->sarea_priv->pfCurrentPage = dev_priv->current_page =
+					      1 - dev_priv->current_page;
+
+	BEGIN_RING( 2 );
+
+	RADEON_FRAME_AGE( dev_priv->sarea_priv->last_frame );
+
+	ADVANCE_RING();
+}
+
+static int bad_prim_vertex_nr( int primitive, int nr )
+{
+	switch (primitive & RADEON_PRIM_TYPE_MASK) {
+	case RADEON_PRIM_TYPE_NONE:
+	case RADEON_PRIM_TYPE_POINT:
+		return nr < 1;
+	case RADEON_PRIM_TYPE_LINE:
+		return (nr & 1) || nr == 0;
+	case RADEON_PRIM_TYPE_LINE_STRIP:
+		return nr < 2;
+	case RADEON_PRIM_TYPE_TRI_LIST:
+	case RADEON_PRIM_TYPE_3VRT_POINT_LIST:
+	case RADEON_PRIM_TYPE_3VRT_LINE_LIST:
+	case RADEON_PRIM_TYPE_RECT_LIST:
+		return nr % 3 || nr == 0;
+	case RADEON_PRIM_TYPE_TRI_FAN:
+	case RADEON_PRIM_TYPE_TRI_STRIP:
+		return nr < 3;
+	default:
+		return 1;
+	}	
+}
+
+
+
+typedef struct {
+	unsigned int start;
+	unsigned int finish;
+	unsigned int prim;
+	unsigned int numverts;
+	unsigned int offset;   
+        unsigned int vc_format;
+} drm_radeon_tcl_prim_t;
+
+static void radeon_cp_dispatch_vertex( drm_device_t *dev,
+				       drm_buf_t *buf,
+				       drm_radeon_tcl_prim_t *prim,
+				       drm_clip_rect_t *boxes,
+				       int nbox )
+
+{
+	drm_radeon_private_t *dev_priv = dev->dev_private;
+	drm_clip_rect_t box;
+	int offset = dev_priv->agp_buffers_offset + buf->offset + prim->start;
+	int numverts = (int)prim->numverts;
+	int i = 0;
+	RING_LOCALS;
+
+	DRM_DEBUG("hwprim 0x%x vfmt 0x%x %d..%d %d verts\n",
+		  prim->prim,
+		  prim->vc_format,
+		  prim->start,
+		  prim->finish,
+		  prim->numverts);
+
+	if (bad_prim_vertex_nr( prim->prim, prim->numverts )) {
+		DRM_ERROR( "bad prim %x numverts %d\n", 
+			   prim->prim, prim->numverts );
+		return;
+	}
+
+	do {
+		/* Emit the next cliprect */
+		if ( i < nbox ) {
+			if (DRM_COPY_FROM_USER_UNCHECKED( &box, &boxes[i], sizeof(box) ))
+				return;
+
+			radeon_emit_clip_rect( dev_priv, &box );
+		}
+
+		/* Emit the vertex buffer rendering commands */
+		BEGIN_RING( 5 );
+
+		OUT_RING( CP_PACKET3( RADEON_3D_RNDR_GEN_INDX_PRIM, 3 ) );
+		OUT_RING( offset );
+		OUT_RING( numverts );
+		OUT_RING( prim->vc_format );
+		OUT_RING( prim->prim | RADEON_PRIM_WALK_LIST |
+			  RADEON_COLOR_ORDER_RGBA |
+			  RADEON_VTX_FMT_RADEON_MODE |
+			  (numverts << RADEON_NUM_VERTICES_SHIFT) );
+
+		ADVANCE_RING();
+
+		i++;
+	} while ( i < nbox );
+}
+
+
+
+static void radeon_cp_discard_buffer( drm_device_t *dev, drm_buf_t *buf )
+{
+	drm_radeon_private_t *dev_priv = dev->dev_private;
+	drm_radeon_buf_priv_t *buf_priv = buf->dev_private;
+	RING_LOCALS;
+
+	buf_priv->age = ++dev_priv->sarea_priv->last_dispatch;
+
+	/* Emit the vertex buffer age */
+	BEGIN_RING( 2 );
+	RADEON_DISPATCH_AGE( buf_priv->age );
+	ADVANCE_RING();
+
+	buf->pending = 1;
+	buf->used = 0;
+}
+
+static void radeon_cp_dispatch_indirect( drm_device_t *dev,
+					 drm_buf_t *buf,
+					 int start, int end )
+{
+	drm_radeon_private_t *dev_priv = dev->dev_private;
+	RING_LOCALS;
+	DRM_DEBUG( "indirect: buf=%d s=0x%x e=0x%x\n",
+		   buf->idx, start, end );
+
+	if ( start != end ) {
+		int offset = (dev_priv->agp_buffers_offset
+			      + buf->offset + start);
+		int dwords = (end - start + 3) / sizeof(u32);
+
+		/* Indirect buffer data must be an even number of
+		 * dwords, so if we've been given an odd number we must
+		 * pad the data with a Type-2 CP packet.
+		 */
+		if ( dwords & 1 ) {
+			u32 *data = (u32 *)
+				((char *)dev_priv->buffers->handle
+				 + buf->offset + start);
+			data[dwords++] = RADEON_CP_PACKET2;
+		}
+
+		/* Fire off the indirect buffer */
+		BEGIN_RING( 3 );
+
+		OUT_RING( CP_PACKET0( RADEON_CP_IB_BASE, 1 ) );
+		OUT_RING( offset );
+		OUT_RING( dwords );
+
+		ADVANCE_RING();
+	}
+}
+
+
+static void radeon_cp_dispatch_indices( drm_device_t *dev,
+					drm_buf_t *elt_buf,
+					drm_radeon_tcl_prim_t *prim, 
+					drm_clip_rect_t *boxes,
+					int nbox )
+{
+	drm_radeon_private_t *dev_priv = dev->dev_private;
+	drm_clip_rect_t box;
+	int offset = dev_priv->agp_buffers_offset + prim->offset;
+	u32 *data;
+	int dwords;
+	int i = 0;
+	int start = prim->start + RADEON_INDEX_PRIM_OFFSET;
+	int count = (prim->finish - start) / sizeof(u16);
+
+	DRM_DEBUG("hwprim 0x%x vfmt 0x%x %d..%d offset: %x nr %d\n",
+		  prim->prim,
+		  prim->vc_format,
+		  prim->start,
+		  prim->finish,
+		  prim->offset,
+		  prim->numverts);
+
+	if (bad_prim_vertex_nr( prim->prim, count )) {
+		DRM_ERROR( "bad prim %x count %d\n", 
+			   prim->prim, count );
+		return;
+	}
+
+
+	if ( start >= prim->finish ||
+	     (prim->start & 0x7) ) {
+		DRM_ERROR( "buffer prim %d\n", prim->prim );
+		return;
+	}
+
+	dwords = (prim->finish - prim->start + 3) / sizeof(u32);
+
+	data = (u32 *)((char *)dev_priv->buffers->handle +
+		       elt_buf->offset + prim->start);
+
+	data[0] = CP_PACKET3( RADEON_3D_RNDR_GEN_INDX_PRIM, dwords-2 );
+	data[1] = offset;
+	data[2] = prim->numverts;
+	data[3] = prim->vc_format;
+	data[4] = (prim->prim |
+		   RADEON_PRIM_WALK_IND |
+		   RADEON_COLOR_ORDER_RGBA |
+		   RADEON_VTX_FMT_RADEON_MODE |
+		   (count << RADEON_NUM_VERTICES_SHIFT) );
+
+	do {
+		if ( i < nbox ) {
+			if (DRM_COPY_FROM_USER_UNCHECKED( &box, &boxes[i], sizeof(box) ))
+				return;
+			
+			radeon_emit_clip_rect( dev_priv, &box );
+		}
+
+		radeon_cp_dispatch_indirect( dev, elt_buf,
+					     prim->start,
+					     prim->finish );
+
+		i++;
+	} while ( i < nbox );
+
+}
+
+#define RADEON_MAX_TEXTURE_SIZE (RADEON_BUFFER_SIZE - 8 * sizeof(u32))
+
+static int radeon_cp_dispatch_texture( DRMFILE filp,
+				       drm_device_t *dev,
+				       drm_radeon_texture_t *tex,
+				       drm_radeon_tex_image_t *image )
+{
+	drm_radeon_private_t *dev_priv = dev->dev_private;
+	drm_buf_t *buf;
+	u32 format;
+	u32 *buffer;
+	const u8 *data;
+	int size, dwords, tex_width, blit_width;
+	u32 height;
+	int i;
+	RING_LOCALS;
+
+	dev_priv->stats.boxes |= RADEON_BOX_TEXTURE_LOAD;
+
+	/* Flush the pixel cache.  This ensures no pixel data gets mixed
+	 * up with the texture data from the host data blit, otherwise
+	 * part of the texture image may be corrupted.
+	 */
+	BEGIN_RING( 4 );
+	RADEON_FLUSH_CACHE();
+	RADEON_WAIT_UNTIL_IDLE();
+	ADVANCE_RING();
+
+#ifdef __BIG_ENDIAN
+	/* The Mesa texture functions provide the data in little endian as the
+	 * chip wants it, but we need to compensate for the fact that the CP
+	 * ring gets byte-swapped
+	 */
+	BEGIN_RING( 2 );
+	OUT_RING_REG( RADEON_RBBM_GUICNTL, RADEON_HOST_DATA_SWAP_32BIT );
+	ADVANCE_RING();
+#endif
+
+
+	/* The compiler won't optimize away a division by a variable,
+	 * even if the only legal values are powers of two.  Thus, we'll
+	 * use a shift instead.
+	 */
+	switch ( tex->format ) {
+	case RADEON_TXFORMAT_ARGB8888:
+	case RADEON_TXFORMAT_RGBA8888:
+		format = RADEON_COLOR_FORMAT_ARGB8888;
+		tex_width = tex->width * 4;
+		blit_width = image->width * 4;
+		break;
+	case RADEON_TXFORMAT_AI88:
+	case RADEON_TXFORMAT_ARGB1555:
+	case RADEON_TXFORMAT_RGB565:
+	case RADEON_TXFORMAT_ARGB4444:
+	case RADEON_TXFORMAT_VYUY422:
+	case RADEON_TXFORMAT_YVYU422:
+		format = RADEON_COLOR_FORMAT_RGB565;
+		tex_width = tex->width * 2;
+		blit_width = image->width * 2;
+		break;
+	case RADEON_TXFORMAT_I8:
+	case RADEON_TXFORMAT_RGB332:
+		format = RADEON_COLOR_FORMAT_CI8;
+		tex_width = tex->width * 1;
+		blit_width = image->width * 1;
+		break;
+	default:
+		DRM_ERROR( "invalid texture format %d\n", tex->format );
+		return DRM_ERR(EINVAL);
+	}
+
+	DRM_DEBUG("tex=%dx%d blit=%d\n", tex_width, tex->height, blit_width );
+
+	do {
+		DRM_DEBUG( "tex: ofs=0x%x p=%d f=%d x=%hd y=%hd w=%hd h=%hd\n",
+			   tex->offset >> 10, tex->pitch, tex->format,
+			   image->x, image->y, image->width, image->height );
+
+		/* Make a copy of some parameters in case we have to
+		 * update them for a multi-pass texture blit.
+		 */
+		height = image->height;
+		data = (const u8 *)image->data;
+		
+		size = height * blit_width;
+
+		if ( size > RADEON_MAX_TEXTURE_SIZE ) {
+			height = RADEON_MAX_TEXTURE_SIZE / blit_width;
+			size = height * blit_width;
+		} else if ( size < 4 && size > 0 ) {
+			size = 4;
+		} else if ( size == 0 ) {
+			return 0;
+		}
+
+		buf = radeon_freelist_get( dev );
+		if ( 0 && !buf ) {
+			radeon_do_cp_idle( dev_priv );
+			buf = radeon_freelist_get( dev );
+		}
+		if ( !buf ) {
+			DRM_DEBUG("radeon_cp_dispatch_texture: EAGAIN\n");
+			DRM_COPY_TO_USER( tex->image, image, sizeof(*image) );
+			return DRM_ERR(EAGAIN);
+		}
+
+
+		/* Dispatch the indirect buffer.
+		 */
+		buffer = (u32*)((char*)dev_priv->buffers->handle + buf->offset);
+		dwords = size / 4;
+		buffer[0] = CP_PACKET3( RADEON_CNTL_HOSTDATA_BLT, dwords + 6 );
+		buffer[1] = (RADEON_GMC_DST_PITCH_OFFSET_CNTL |
+			     RADEON_GMC_BRUSH_NONE |
+			     (format << 8) |
+			     RADEON_GMC_SRC_DATATYPE_COLOR |
+			     RADEON_ROP3_S |
+			     RADEON_DP_SRC_SOURCE_HOST_DATA |
+			     RADEON_GMC_CLR_CMP_CNTL_DIS |
+			     RADEON_GMC_WR_MSK_DIS);
+		
+		buffer[2] = (tex->pitch << 22) | (tex->offset >> 10);
+		buffer[3] = 0xffffffff;
+		buffer[4] = 0xffffffff;
+		buffer[5] = (image->y << 16) | image->x;
+		buffer[6] = (height << 16) | image->width;
+		buffer[7] = dwords;
+		buffer += 8;
+
+		if ( tex_width >= 32 ) {
+			/* Texture image width is larger than the minimum, so we
+			 * can upload it directly.
+			 */
+			if ( DRM_COPY_FROM_USER( buffer, data, 
+						 dwords * sizeof(u32) ) ) {
+				DRM_ERROR( "EFAULT on data, %d dwords\n", 
+					   dwords );
+				return DRM_ERR(EFAULT);
+			}
+		} else {
+			/* Texture image width is less than the minimum, so we
+			 * need to pad out each image scanline to the minimum
+			 * width.
+			 */
+			for ( i = 0 ; i < tex->height ; i++ ) {
+				if ( DRM_COPY_FROM_USER( buffer, data, 
+							 tex_width ) ) {
+					DRM_ERROR( "EFAULT on pad, %d bytes\n",
+						   tex_width );
+					return DRM_ERR(EFAULT);
+				}
+				buffer += 8;
+				data += tex_width;
+			}
+		}
+
+		buf->filp = filp;
+		buf->used = (dwords + 8) * sizeof(u32);
+		radeon_cp_dispatch_indirect( dev, buf, 0, buf->used );
+		radeon_cp_discard_buffer( dev, buf );
+
+		/* Update the input parameters for next time */
+		image->y += height;
+		image->height -= height;
+		(const u8 *)image->data += size;
+	} while (image->height > 0);
+
+	/* Flush the pixel cache after the blit completes.  This ensures
+	 * the texture data is written out to memory before rendering
+	 * continues.
+	 */
+	BEGIN_RING( 4 );
+	RADEON_FLUSH_CACHE();
+	RADEON_WAIT_UNTIL_2D_IDLE();
+	ADVANCE_RING();
+	return 0;
+}
+
+
+static void radeon_cp_dispatch_stipple( drm_device_t *dev, u32 *stipple )
+{
+	drm_radeon_private_t *dev_priv = dev->dev_private;
+	int i;
+	RING_LOCALS;
+	DRM_DEBUG( "\n" );
+
+	BEGIN_RING( 35 );
+
+	OUT_RING( CP_PACKET0( RADEON_RE_STIPPLE_ADDR, 0 ) );
+	OUT_RING( 0x00000000 );
+
+	OUT_RING( CP_PACKET0_TABLE( RADEON_RE_STIPPLE_DATA, 31 ) );
+	for ( i = 0 ; i < 32 ; i++ ) {
+		OUT_RING( stipple[i] );
+	}
+
+	ADVANCE_RING();
+}
+
+
+/* ================================================================
+ * IOCTL functions
+ */
+
+int radeon_cp_clear( DRM_IOCTL_ARGS )
+{
+	DRM_DEVICE;
+	drm_radeon_private_t *dev_priv = dev->dev_private;
+	drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv;
+	drm_radeon_clear_t clear;
+	drm_radeon_clear_rect_t depth_boxes[RADEON_NR_SAREA_CLIPRECTS];
+	DRM_DEBUG( "\n" );
+
+	LOCK_TEST_WITH_RETURN( dev, filp );
+
+	DRM_COPY_FROM_USER_IOCTL( clear, (drm_radeon_clear_t *)data,
+			     sizeof(clear) );
+
+	RING_SPACE_TEST_WITH_RETURN( dev_priv );
+
+	if ( sarea_priv->nbox > RADEON_NR_SAREA_CLIPRECTS )
+		sarea_priv->nbox = RADEON_NR_SAREA_CLIPRECTS;
+
+	if ( DRM_COPY_FROM_USER( &depth_boxes, clear.depth_boxes,
+			     sarea_priv->nbox * sizeof(depth_boxes[0]) ) )
+		return DRM_ERR(EFAULT);
+
+	radeon_cp_dispatch_clear( dev, &clear, depth_boxes );
+
+	COMMIT_RING();
+	return 0;
+}
+
+
+/* Not sure why this isn't set all the time:
+ */ 
+static int radeon_do_init_pageflip( drm_device_t *dev )
+{
+	drm_radeon_private_t *dev_priv = dev->dev_private;
+	RING_LOCALS;
+
+	DRM_DEBUG( "\n" );
+
+	BEGIN_RING( 6 );
+	RADEON_WAIT_UNTIL_3D_IDLE();
+	OUT_RING( CP_PACKET0( RADEON_CRTC_OFFSET_CNTL, 0 ) );
+	OUT_RING( RADEON_READ( RADEON_CRTC_OFFSET_CNTL ) | RADEON_CRTC_OFFSET_FLIP_CNTL );
+	OUT_RING( CP_PACKET0( RADEON_CRTC2_OFFSET_CNTL, 0 ) );
+	OUT_RING( RADEON_READ( RADEON_CRTC2_OFFSET_CNTL ) | RADEON_CRTC_OFFSET_FLIP_CNTL );
+	ADVANCE_RING();
+
+	dev_priv->page_flipping = 1;
+	dev_priv->current_page = 0;
+	dev_priv->sarea_priv->pfCurrentPage = dev_priv->current_page;
+
+	return 0;
+}
+
+/* Called whenever a client dies, from DRM(release).
+ * NOTE:  Lock isn't necessarily held when this is called!
+ */
+int radeon_do_cleanup_pageflip( drm_device_t *dev )
+{
+	drm_radeon_private_t *dev_priv = dev->dev_private;
+	DRM_DEBUG( "\n" );
+
+	if (dev_priv->current_page != 0)
+		radeon_cp_dispatch_flip( dev );
+
+	dev_priv->page_flipping = 0;
+	return 0;
+}
+
+/* Swapping and flipping are different operations, need different ioctls.
+ * They can & should be intermixed to support multiple 3d windows.  
+ */
+int radeon_cp_flip( DRM_IOCTL_ARGS )
+{
+	DRM_DEVICE;
+	drm_radeon_private_t *dev_priv = dev->dev_private;
+	DRM_DEBUG( "\n" );
+
+	LOCK_TEST_WITH_RETURN( dev, filp );
+
+	RING_SPACE_TEST_WITH_RETURN( dev_priv );
+
+	if (!dev_priv->page_flipping) 
+		radeon_do_init_pageflip( dev );
+		
+	radeon_cp_dispatch_flip( dev );
+
+	COMMIT_RING();
+	return 0;
+}
+
+int radeon_cp_swap( DRM_IOCTL_ARGS )
+{
+	DRM_DEVICE;
+	drm_radeon_private_t *dev_priv = dev->dev_private;
+	drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv;
+	DRM_DEBUG( "\n" );
+
+	LOCK_TEST_WITH_RETURN( dev, filp );
+
+	RING_SPACE_TEST_WITH_RETURN( dev_priv );
+
+	if ( sarea_priv->nbox > RADEON_NR_SAREA_CLIPRECTS )
+		sarea_priv->nbox = RADEON_NR_SAREA_CLIPRECTS;
+
+	radeon_cp_dispatch_swap( dev );
+	dev_priv->sarea_priv->ctx_owner = 0;
+
+	COMMIT_RING();
+	return 0;
+}
+
+int radeon_cp_vertex( DRM_IOCTL_ARGS )
+{
+	DRM_DEVICE;
+	drm_radeon_private_t *dev_priv = dev->dev_private;
+	drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv;
+	drm_device_dma_t *dma = dev->dma;
+	drm_buf_t *buf;
+	drm_radeon_vertex_t vertex;
+	drm_radeon_tcl_prim_t prim;
+
+	LOCK_TEST_WITH_RETURN( dev, filp );
+
+	if ( !dev_priv ) {
+		DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
+		return DRM_ERR(EINVAL);
+	}
+
+	DRM_COPY_FROM_USER_IOCTL( vertex, (drm_radeon_vertex_t *)data,
+			     sizeof(vertex) );
+
+	DRM_DEBUG( "pid=%d index=%d count=%d discard=%d\n",
+		   DRM_CURRENTPID,
+		   vertex.idx, vertex.count, vertex.discard );
+
+	if ( vertex.idx < 0 || vertex.idx >= dma->buf_count ) {
+		DRM_ERROR( "buffer index %d (of %d max)\n",
+			   vertex.idx, dma->buf_count - 1 );
+		return DRM_ERR(EINVAL);
+	}
+	if ( vertex.prim < 0 ||
+	     vertex.prim > RADEON_PRIM_TYPE_3VRT_LINE_LIST ) {
+		DRM_ERROR( "buffer prim %d\n", vertex.prim );
+		return DRM_ERR(EINVAL);
+	}
+
+	RING_SPACE_TEST_WITH_RETURN( dev_priv );
+	VB_AGE_TEST_WITH_RETURN( dev_priv );
+
+	buf = dma->buflist[vertex.idx];
+
+	if ( buf->filp != filp ) {
+		DRM_ERROR( "process %d using buffer owned by %p\n",
+			   DRM_CURRENTPID, buf->filp );
+		return DRM_ERR(EINVAL);
+	}
+	if ( buf->pending ) {
+		DRM_ERROR( "sending pending buffer %d\n", vertex.idx );
+		return DRM_ERR(EINVAL);
+	}
+
+	/* Build up a prim_t record:
+	 */
+	if (vertex.count) {
+		buf->used = vertex.count; /* not used? */
+
+		if ( sarea_priv->dirty & ~RADEON_UPLOAD_CLIPRECTS ) {
+			radeon_emit_state( dev_priv,
+					   &sarea_priv->context_state,
+					   sarea_priv->tex_state,
+					   sarea_priv->dirty );
+			
+			sarea_priv->dirty &= ~(RADEON_UPLOAD_TEX0IMAGES |
+					       RADEON_UPLOAD_TEX1IMAGES |
+					       RADEON_UPLOAD_TEX2IMAGES |
+					       RADEON_REQUIRE_QUIESCENCE);
+		}
+
+		prim.start = 0;
+		prim.finish = vertex.count; /* unused */
+		prim.prim = vertex.prim;
+		prim.numverts = vertex.count;
+		prim.vc_format = dev_priv->sarea_priv->vc_format;
+		
+		radeon_cp_dispatch_vertex( dev, buf, &prim,
+					   dev_priv->sarea_priv->boxes,
+					   dev_priv->sarea_priv->nbox );
+	}
+
+	if (vertex.discard) {
+		radeon_cp_discard_buffer( dev, buf );
+	}
+
+	COMMIT_RING();
+	return 0;
+}
+
+int radeon_cp_indices( DRM_IOCTL_ARGS )
+{
+	DRM_DEVICE;
+	drm_radeon_private_t *dev_priv = dev->dev_private;
+	drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv;
+	drm_device_dma_t *dma = dev->dma;
+	drm_buf_t *buf;
+	drm_radeon_indices_t elts;
+	drm_radeon_tcl_prim_t prim;
+	int count;
+
+	LOCK_TEST_WITH_RETURN( dev, filp );
+
+	if ( !dev_priv ) {
+		DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
+		return DRM_ERR(EINVAL);
+	}
+
+	DRM_COPY_FROM_USER_IOCTL( elts, (drm_radeon_indices_t *)data,
+			     sizeof(elts) );
+
+	DRM_DEBUG( "pid=%d index=%d start=%d end=%d discard=%d\n",
+		   DRM_CURRENTPID,
+		   elts.idx, elts.start, elts.end, elts.discard );
+
+	if ( elts.idx < 0 || elts.idx >= dma->buf_count ) {
+		DRM_ERROR( "buffer index %d (of %d max)\n",
+			   elts.idx, dma->buf_count - 1 );
+		return DRM_ERR(EINVAL);
+	}
+	if ( elts.prim < 0 ||
+	     elts.prim > RADEON_PRIM_TYPE_3VRT_LINE_LIST ) {
+		DRM_ERROR( "buffer prim %d\n", elts.prim );
+		return DRM_ERR(EINVAL);
+	}
+
+	RING_SPACE_TEST_WITH_RETURN( dev_priv );
+	VB_AGE_TEST_WITH_RETURN( dev_priv );
+
+	buf = dma->buflist[elts.idx];
+
+	if ( buf->filp != filp ) {
+		DRM_ERROR( "process %d using buffer owned by %p\n",
+			   DRM_CURRENTPID, buf->filp );
+		return DRM_ERR(EINVAL);
+	}
+	if ( buf->pending ) {
+		DRM_ERROR( "sending pending buffer %d\n", elts.idx );
+		return DRM_ERR(EINVAL);
+	}
+
+	count = (elts.end - elts.start) / sizeof(u16);
+	elts.start -= RADEON_INDEX_PRIM_OFFSET;
+
+	if ( elts.start & 0x7 ) {
+		DRM_ERROR( "misaligned buffer 0x%x\n", elts.start );
+		return DRM_ERR(EINVAL);
+	}
+	if ( elts.start < buf->used ) {
+		DRM_ERROR( "no header 0x%x - 0x%x\n", elts.start, buf->used );
+		return DRM_ERR(EINVAL);
+	}
+
+	buf->used = elts.end;
+
+	if ( sarea_priv->dirty & ~RADEON_UPLOAD_CLIPRECTS ) {
+		radeon_emit_state( dev_priv,
+				   &sarea_priv->context_state,
+				   sarea_priv->tex_state,
+				   sarea_priv->dirty );
+
+		sarea_priv->dirty &= ~(RADEON_UPLOAD_TEX0IMAGES |
+				       RADEON_UPLOAD_TEX1IMAGES |
+				       RADEON_UPLOAD_TEX2IMAGES |
+				       RADEON_REQUIRE_QUIESCENCE);
+	}
+
+
+	/* Build up a prim_t record:
+	 */
+	prim.start = elts.start;
+	prim.finish = elts.end; 
+	prim.prim = elts.prim;
+	prim.offset = 0;	/* offset from start of dma buffers */
+	prim.numverts = RADEON_MAX_VB_VERTS; /* duh */
+	prim.vc_format = dev_priv->sarea_priv->vc_format;
+	
+	radeon_cp_dispatch_indices( dev, buf, &prim,
+				   dev_priv->sarea_priv->boxes,
+				   dev_priv->sarea_priv->nbox );
+	if (elts.discard) {
+		radeon_cp_discard_buffer( dev, buf );
+	}
+
+	COMMIT_RING();
+	return 0;
+}
+
+int radeon_cp_texture( DRM_IOCTL_ARGS )
+{
+	DRM_DEVICE;
+	drm_radeon_private_t *dev_priv = dev->dev_private;
+	drm_radeon_texture_t tex;
+	drm_radeon_tex_image_t image;
+	int ret;
+
+	LOCK_TEST_WITH_RETURN( dev, filp );
+
+	DRM_COPY_FROM_USER_IOCTL( tex, (drm_radeon_texture_t *)data, sizeof(tex) );
+
+	if ( tex.image == NULL ) {
+		DRM_ERROR( "null texture image!\n" );
+		return DRM_ERR(EINVAL);
+	}
+
+	if ( DRM_COPY_FROM_USER( &image,
+			     (drm_radeon_tex_image_t *)tex.image,
+			     sizeof(image) ) )
+		return DRM_ERR(EFAULT);
+
+	RING_SPACE_TEST_WITH_RETURN( dev_priv );
+	VB_AGE_TEST_WITH_RETURN( dev_priv );
+
+	ret = radeon_cp_dispatch_texture( filp, dev, &tex, &image );
+
+	COMMIT_RING();
+	return ret;
+}
+
+int radeon_cp_stipple( DRM_IOCTL_ARGS )
+{
+	DRM_DEVICE;
+	drm_radeon_private_t *dev_priv = dev->dev_private;
+	drm_radeon_stipple_t stipple;
+	u32 mask[32];
+
+	LOCK_TEST_WITH_RETURN( dev, filp );
+
+	DRM_COPY_FROM_USER_IOCTL( stipple, (drm_radeon_stipple_t *)data,
+			     sizeof(stipple) );
+
+	if ( DRM_COPY_FROM_USER( &mask, stipple.mask, 32 * sizeof(u32) ) )
+		return DRM_ERR(EFAULT);
+
+	RING_SPACE_TEST_WITH_RETURN( dev_priv );
+
+	radeon_cp_dispatch_stipple( dev, mask );
+
+	COMMIT_RING();
+	return 0;
+}
+
+int radeon_cp_indirect( DRM_IOCTL_ARGS )
+{
+	DRM_DEVICE;
+	drm_radeon_private_t *dev_priv = dev->dev_private;
+	drm_device_dma_t *dma = dev->dma;
+	drm_buf_t *buf;
+	drm_radeon_indirect_t indirect;
+	RING_LOCALS;
+
+	LOCK_TEST_WITH_RETURN( dev, filp );
+
+	if ( !dev_priv ) {
+		DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
+		return DRM_ERR(EINVAL);
+	}
+
+	DRM_COPY_FROM_USER_IOCTL( indirect, (drm_radeon_indirect_t *)data,
+			     sizeof(indirect) );
+
+	DRM_DEBUG( "indirect: idx=%d s=%d e=%d d=%d\n",
+		   indirect.idx, indirect.start,
+		   indirect.end, indirect.discard );
+
+	if ( indirect.idx < 0 || indirect.idx >= dma->buf_count ) {
+		DRM_ERROR( "buffer index %d (of %d max)\n",
+			   indirect.idx, dma->buf_count - 1 );
+		return DRM_ERR(EINVAL);
+	}
+
+	buf = dma->buflist[indirect.idx];
+
+	if ( buf->filp != filp ) {
+		DRM_ERROR( "process %d using buffer owned by %p\n",
+			   DRM_CURRENTPID, buf->filp );
+		return DRM_ERR(EINVAL);
+	}
+	if ( buf->pending ) {
+		DRM_ERROR( "sending pending buffer %d\n", indirect.idx );
+		return DRM_ERR(EINVAL);
+	}
+
+	if ( indirect.start < buf->used ) {
+		DRM_ERROR( "reusing indirect: start=0x%x actual=0x%x\n",
+			   indirect.start, buf->used );
+		return DRM_ERR(EINVAL);
+	}
+
+	RING_SPACE_TEST_WITH_RETURN( dev_priv );
+	VB_AGE_TEST_WITH_RETURN( dev_priv );
+
+	buf->used = indirect.end;
+
+	/* Wait for the 3D stream to idle before the indirect buffer
+	 * containing 2D acceleration commands is processed.
+	 */
+	BEGIN_RING( 2 );
+
+	RADEON_WAIT_UNTIL_3D_IDLE();
+
+	ADVANCE_RING();
+
+	/* Dispatch the indirect buffer full of commands from the
+	 * X server.  This is insecure and is thus only available to
+	 * privileged clients.
+	 */
+	radeon_cp_dispatch_indirect( dev, buf, indirect.start, indirect.end );
+	if (indirect.discard) {
+		radeon_cp_discard_buffer( dev, buf );
+	}
+
+
+	COMMIT_RING();
+	return 0;
+}
+
+int radeon_cp_vertex2( DRM_IOCTL_ARGS )
+{
+	DRM_DEVICE;
+	drm_radeon_private_t *dev_priv = dev->dev_private;
+	drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv;
+	drm_device_dma_t *dma = dev->dma;
+	drm_buf_t *buf;
+	drm_radeon_vertex2_t vertex;
+	int i;
+	unsigned char laststate;
+
+	LOCK_TEST_WITH_RETURN( dev, filp );
+
+	if ( !dev_priv ) {
+		DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
+		return DRM_ERR(EINVAL);
+	}
+
+	DRM_COPY_FROM_USER_IOCTL( vertex, (drm_radeon_vertex2_t *)data,
+			     sizeof(vertex) );
+
+	DRM_DEBUG( "pid=%d index=%d discard=%d\n",
+		   DRM_CURRENTPID,
+		   vertex.idx, vertex.discard );
+
+	if ( vertex.idx < 0 || vertex.idx >= dma->buf_count ) {
+		DRM_ERROR( "buffer index %d (of %d max)\n",
+			   vertex.idx, dma->buf_count - 1 );
+		return DRM_ERR(EINVAL);
+	}
+
+	RING_SPACE_TEST_WITH_RETURN( dev_priv );
+	VB_AGE_TEST_WITH_RETURN( dev_priv );
+
+	buf = dma->buflist[vertex.idx];
+
+	if ( buf->filp != filp ) {
+		DRM_ERROR( "process %d using buffer owned by %p\n",
+			   DRM_CURRENTPID, buf->filp );
+		return DRM_ERR(EINVAL);
+	}
+
+	if ( buf->pending ) {
+		DRM_ERROR( "sending pending buffer %d\n", vertex.idx );
+		return DRM_ERR(EINVAL);
+	}
+	
+	if (sarea_priv->nbox > RADEON_NR_SAREA_CLIPRECTS)
+		return DRM_ERR(EINVAL);
+
+	for (laststate = 0xff, i = 0 ; i < vertex.nr_prims ; i++) {
+		drm_radeon_prim_t prim;
+		drm_radeon_tcl_prim_t tclprim;
+		
+		if ( DRM_COPY_FROM_USER( &prim, &vertex.prim[i], sizeof(prim) ) )
+			return DRM_ERR(EFAULT);
+		
+		if ( prim.stateidx != laststate ) {
+			drm_radeon_state_t state;			       
+				
+			if ( DRM_COPY_FROM_USER( &state, 
+					     &vertex.state[prim.stateidx], 
+					     sizeof(state) ) )
+				return DRM_ERR(EFAULT);
+
+			radeon_emit_state2( dev_priv, &state );
+
+			laststate = prim.stateidx;
+		}
+
+		tclprim.start = prim.start;
+		tclprim.finish = prim.finish;
+		tclprim.prim = prim.prim;
+		tclprim.vc_format = prim.vc_format;
+
+		if ( prim.prim & RADEON_PRIM_WALK_IND ) {
+			tclprim.offset = prim.numverts * 64;
+			tclprim.numverts = RADEON_MAX_VB_VERTS; /* duh */
+
+			radeon_cp_dispatch_indices( dev, buf, &tclprim,
+						    sarea_priv->boxes,
+						    sarea_priv->nbox);
+		} else {
+			tclprim.numverts = prim.numverts;
+			tclprim.offset = 0; /* not used */
+
+			radeon_cp_dispatch_vertex( dev, buf, &tclprim,
+						   sarea_priv->boxes,
+						   sarea_priv->nbox);
+		}
+		
+		if (sarea_priv->nbox == 1)
+			sarea_priv->nbox = 0;
+	}
+
+	if ( vertex.discard ) {
+		radeon_cp_discard_buffer( dev, buf );
+	}
+
+	COMMIT_RING();
+	return 0;
+}
+
+
+static int radeon_emit_packets( 
+	drm_radeon_private_t *dev_priv,
+	drm_radeon_cmd_header_t header,
+	drm_radeon_cmd_buffer_t *cmdbuf )
+{
+	int id = (int)header.packet.packet_id;
+	int sz, reg;
+	int *data = (int *)cmdbuf->buf;
+	RING_LOCALS;
+   
+	if (id >= RADEON_MAX_STATE_PACKETS)
+		return DRM_ERR(EINVAL);
+
+	sz = packet[id].len;
+	reg = packet[id].start;
+
+	if (sz * sizeof(int) > cmdbuf->bufsz) 
+		return DRM_ERR(EINVAL);
+
+	BEGIN_RING(sz+1);
+	OUT_RING( CP_PACKET0( reg, (sz-1) ) );
+	OUT_RING_USER_TABLE( data, sz );
+	ADVANCE_RING();
+
+	cmdbuf->buf += sz * sizeof(int);
+	cmdbuf->bufsz -= sz * sizeof(int);
+	return 0;
+}
+
+static __inline__ int radeon_emit_scalars( 
+	drm_radeon_private_t *dev_priv,
+	drm_radeon_cmd_header_t header,
+	drm_radeon_cmd_buffer_t *cmdbuf )
+{
+	int sz = header.scalars.count;
+	int *data = (int *)cmdbuf->buf;
+	int start = header.scalars.offset;
+	int stride = header.scalars.stride;
+	RING_LOCALS;
+
+	BEGIN_RING( 3+sz );
+	OUT_RING( CP_PACKET0( RADEON_SE_TCL_SCALAR_INDX_REG, 0 ) );
+	OUT_RING( start | (stride << RADEON_SCAL_INDX_DWORD_STRIDE_SHIFT));
+	OUT_RING( CP_PACKET0_TABLE( RADEON_SE_TCL_SCALAR_DATA_REG, sz-1 ) );
+	OUT_RING_USER_TABLE( data, sz );
+	ADVANCE_RING();
+	cmdbuf->buf += sz * sizeof(int);
+	cmdbuf->bufsz -= sz * sizeof(int);
+	return 0;
+}
+
+/* God this is ugly
+ */
+static __inline__ int radeon_emit_scalars2( 
+	drm_radeon_private_t *dev_priv,
+	drm_radeon_cmd_header_t header,
+	drm_radeon_cmd_buffer_t *cmdbuf )
+{
+	int sz = header.scalars.count;
+	int *data = (int *)cmdbuf->buf;
+	int start = ((unsigned int)header.scalars.offset) + 0x100;
+	int stride = header.scalars.stride;
+	RING_LOCALS;
+
+	BEGIN_RING( 3+sz );
+	OUT_RING( CP_PACKET0( RADEON_SE_TCL_SCALAR_INDX_REG, 0 ) );
+	OUT_RING( start | (stride << RADEON_SCAL_INDX_DWORD_STRIDE_SHIFT));
+	OUT_RING( CP_PACKET0_TABLE( RADEON_SE_TCL_SCALAR_DATA_REG, sz-1 ) );
+	OUT_RING_USER_TABLE( data, sz );
+	ADVANCE_RING();
+	cmdbuf->buf += sz * sizeof(int);
+	cmdbuf->bufsz -= sz * sizeof(int);
+	return 0;
+}
+
+static __inline__ int radeon_emit_vectors( 
+	drm_radeon_private_t *dev_priv,
+	drm_radeon_cmd_header_t header,
+	drm_radeon_cmd_buffer_t *cmdbuf )
+{
+	int sz = header.vectors.count;
+	int *data = (int *)cmdbuf->buf;
+	int start = header.vectors.offset;
+	int stride = header.vectors.stride;
+	RING_LOCALS;
+
+	BEGIN_RING( 3+sz );
+	OUT_RING( CP_PACKET0( RADEON_SE_TCL_VECTOR_INDX_REG, 0 ) );
+	OUT_RING( start | (stride << RADEON_VEC_INDX_OCTWORD_STRIDE_SHIFT));
+	OUT_RING( CP_PACKET0_TABLE( RADEON_SE_TCL_VECTOR_DATA_REG, (sz-1) ) );
+	OUT_RING_USER_TABLE( data, sz );
+	ADVANCE_RING();
+
+	cmdbuf->buf += sz * sizeof(int);
+	cmdbuf->bufsz -= sz * sizeof(int);
+	return 0;
+}
+
+
+static int radeon_emit_packet3( drm_device_t *dev,
+				drm_radeon_cmd_buffer_t *cmdbuf )
+{
+	drm_radeon_private_t *dev_priv = dev->dev_private;
+	int cmdsz, tmp;
+	int *cmd = (int *)cmdbuf->buf;
+	RING_LOCALS;
+
+
+	DRM_DEBUG("\n");
+
+	if (DRM_GET_USER_UNCHECKED( tmp, &cmd[0]))
+		return DRM_ERR(EFAULT);
+
+	cmdsz = 2 + ((tmp & RADEON_CP_PACKET_COUNT_MASK) >> 16);
+
+	if ((tmp & 0xc0000000) != RADEON_CP_PACKET3 ||
+	    cmdsz * 4 > cmdbuf->bufsz)
+		return DRM_ERR(EINVAL);
+
+	BEGIN_RING( cmdsz );
+	OUT_RING_USER_TABLE( cmd, cmdsz );
+	ADVANCE_RING();
+
+	cmdbuf->buf += cmdsz * 4;
+	cmdbuf->bufsz -= cmdsz * 4;
+	return 0;
+}
+
+
+static int radeon_emit_packet3_cliprect( drm_device_t *dev,
+					 drm_radeon_cmd_buffer_t *cmdbuf,
+					 int orig_nbox )
+{
+	drm_radeon_private_t *dev_priv = dev->dev_private;
+	drm_clip_rect_t box;
+	int cmdsz, tmp;
+	int *cmd = (int *)cmdbuf->buf;
+	drm_clip_rect_t *boxes = cmdbuf->boxes;
+	int i = 0;
+	RING_LOCALS;
+
+	DRM_DEBUG("\n");
+
+	if (DRM_GET_USER_UNCHECKED( tmp, &cmd[0]))
+		return DRM_ERR(EFAULT);
+
+	cmdsz = 2 + ((tmp & RADEON_CP_PACKET_COUNT_MASK) >> 16);
+
+	if ((tmp & 0xc0000000) != RADEON_CP_PACKET3 ||
+	    cmdsz * 4 > cmdbuf->bufsz)
+		return DRM_ERR(EINVAL);
+
+	if (!orig_nbox)
+		goto out;
+
+	do {
+		if ( i < cmdbuf->nbox ) {
+			if (DRM_COPY_FROM_USER_UNCHECKED( &box, &boxes[i], sizeof(box) ))
+				return DRM_ERR(EFAULT);
+			/* FIXME The second and subsequent times round
+			 * this loop, send a WAIT_UNTIL_3D_IDLE before
+			 * calling emit_clip_rect(). This fixes a
+			 * lockup on fast machines when sending
+			 * several cliprects with a cmdbuf, as when
+			 * waving a 2D window over a 3D
+			 * window. Something in the commands from user
+			 * space seems to hang the card when they're
+			 * sent several times in a row. That would be
+			 * the correct place to fix it but this works
+			 * around it until I can figure that out - Tim
+			 * Smith */
+			if ( i ) {
+				BEGIN_RING( 2 );
+				RADEON_WAIT_UNTIL_3D_IDLE();
+				ADVANCE_RING();
+			}
+			radeon_emit_clip_rect( dev_priv, &box );
+		}
+		
+		BEGIN_RING( cmdsz );
+		OUT_RING_USER_TABLE( cmd, cmdsz );
+		ADVANCE_RING();
+
+	} while ( ++i < cmdbuf->nbox );
+ 	if (cmdbuf->nbox == 1)
+		cmdbuf->nbox = 0;
+
+ out:
+	cmdbuf->buf += cmdsz * 4;
+	cmdbuf->bufsz -= cmdsz * 4;
+	return 0;
+}
+
+
+static int radeon_emit_wait( drm_device_t *dev, int flags )
+{
+	drm_radeon_private_t *dev_priv = dev->dev_private;
+	RING_LOCALS;
+
+	DRM_DEBUG("%s: %x\n", __FUNCTION__, flags);
+	switch (flags) {
+	case RADEON_WAIT_2D:
+		BEGIN_RING( 2 );
+		RADEON_WAIT_UNTIL_2D_IDLE(); 
+		ADVANCE_RING();
+		break;
+	case RADEON_WAIT_3D:
+		BEGIN_RING( 2 );
+		RADEON_WAIT_UNTIL_3D_IDLE(); 
+		ADVANCE_RING();
+		break;
+	case RADEON_WAIT_2D|RADEON_WAIT_3D:
+		BEGIN_RING( 2 );
+		RADEON_WAIT_UNTIL_IDLE(); 
+		ADVANCE_RING();
+		break;
+	default:
+		return DRM_ERR(EINVAL);
+	}
+
+	return 0;
+}
+
+int radeon_cp_cmdbuf( DRM_IOCTL_ARGS )
+{
+	DRM_DEVICE;
+	drm_radeon_private_t *dev_priv = dev->dev_private;
+	drm_device_dma_t *dma = dev->dma;
+	drm_buf_t *buf = 0;
+	int idx;
+	drm_radeon_cmd_buffer_t cmdbuf;
+	drm_radeon_cmd_header_t header;
+	int orig_nbox;
+
+	LOCK_TEST_WITH_RETURN( dev, filp );
+
+	if ( !dev_priv ) {
+		DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
+		return DRM_ERR(EINVAL);
+	}
+
+	DRM_COPY_FROM_USER_IOCTL( cmdbuf, (drm_radeon_cmd_buffer_t *)data,
+			     sizeof(cmdbuf) );
+
+	RING_SPACE_TEST_WITH_RETURN( dev_priv );
+	VB_AGE_TEST_WITH_RETURN( dev_priv );
+
+
+	if (DRM_VERIFYAREA_READ( cmdbuf.buf, cmdbuf.bufsz ))
+		return DRM_ERR(EFAULT);
+
+	if (cmdbuf.nbox &&
+	    DRM_VERIFYAREA_READ(cmdbuf.boxes, 
+			 cmdbuf.nbox * sizeof(drm_clip_rect_t)))
+		return DRM_ERR(EFAULT);
+
+	orig_nbox = cmdbuf.nbox;
+
+	while ( cmdbuf.bufsz >= sizeof(header) ) {
+		
+		if (DRM_GET_USER_UNCHECKED( header.i, (int *)cmdbuf.buf )) {
+			DRM_ERROR("__get_user %p\n", cmdbuf.buf);
+			return DRM_ERR(EFAULT);
+		}
+
+		cmdbuf.buf += sizeof(header);
+		cmdbuf.bufsz -= sizeof(header);
+
+		switch (header.header.cmd_type) {
+		case RADEON_CMD_PACKET: 
+			DRM_DEBUG("RADEON_CMD_PACKET\n");
+			if (radeon_emit_packets( dev_priv, header, &cmdbuf )) {
+				DRM_ERROR("radeon_emit_packets failed\n");
+				return DRM_ERR(EINVAL);
+			}
+			break;
+
+		case RADEON_CMD_SCALARS:
+			DRM_DEBUG("RADEON_CMD_SCALARS\n");
+			if (radeon_emit_scalars( dev_priv, header, &cmdbuf )) {
+				DRM_ERROR("radeon_emit_scalars failed\n");
+				return DRM_ERR(EINVAL);
+			}
+			break;
+
+		case RADEON_CMD_VECTORS:
+			DRM_DEBUG("RADEON_CMD_VECTORS\n");
+			if (radeon_emit_vectors( dev_priv, header, &cmdbuf )) {
+				DRM_ERROR("radeon_emit_vectors failed\n");
+				return DRM_ERR(EINVAL);
+			}
+			break;
+
+		case RADEON_CMD_DMA_DISCARD:
+			DRM_DEBUG("RADEON_CMD_DMA_DISCARD\n");
+			idx = header.dma.buf_idx;
+			if ( idx < 0 || idx >= dma->buf_count ) {
+				DRM_ERROR( "buffer index %d (of %d max)\n",
+					   idx, dma->buf_count - 1 );
+				return DRM_ERR(EINVAL);
+			}
+
+			buf = dma->buflist[idx];
+			if ( buf->filp != filp || buf->pending ) {
+				DRM_ERROR( "bad buffer %p %p %d\n",
+					   buf->filp, filp, buf->pending);
+				return DRM_ERR(EINVAL);
+			}
+
+			radeon_cp_discard_buffer( dev, buf );
+			break;
+
+		case RADEON_CMD_PACKET3:
+			DRM_DEBUG("RADEON_CMD_PACKET3\n");
+			if (radeon_emit_packet3( dev, &cmdbuf )) {
+				DRM_ERROR("radeon_emit_packet3 failed\n");
+				return DRM_ERR(EINVAL);
+			}
+			break;
+
+		case RADEON_CMD_PACKET3_CLIP:
+			DRM_DEBUG("RADEON_CMD_PACKET3_CLIP\n");
+			if (radeon_emit_packet3_cliprect( dev, &cmdbuf, orig_nbox )) {
+				DRM_ERROR("radeon_emit_packet3_clip failed\n");
+				return DRM_ERR(EINVAL);
+			}
+			break;
+
+		case RADEON_CMD_SCALARS2:
+			DRM_DEBUG("RADEON_CMD_SCALARS2\n");
+			if (radeon_emit_scalars2( dev_priv, header, &cmdbuf )) {
+				DRM_ERROR("radeon_emit_scalars2 failed\n");
+				return DRM_ERR(EINVAL);
+			}
+			break;
+
+		case RADEON_CMD_WAIT:
+			DRM_DEBUG("RADEON_CMD_WAIT\n");
+			if (radeon_emit_wait( dev, header.wait.flags )) {
+				DRM_ERROR("radeon_emit_wait failed\n");
+				return DRM_ERR(EINVAL);
+			}
+			break;
+		default:
+			DRM_ERROR("bad cmd_type %d at %p\n", 
+				  header.header.cmd_type,
+				  cmdbuf.buf - sizeof(header));
+			return DRM_ERR(EINVAL);
+		}
+	}
+
+
+	DRM_DEBUG("DONE\n");
+	COMMIT_RING();
+	return 0;
+}
+
+
+
+int radeon_cp_getparam( DRM_IOCTL_ARGS )
+{
+	DRM_DEVICE;
+	drm_radeon_private_t *dev_priv = dev->dev_private;
+	drm_radeon_getparam_t param;
+	int value;
+
+	if ( !dev_priv ) {
+		DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
+		return DRM_ERR(EINVAL);
+	}
+
+	DRM_COPY_FROM_USER_IOCTL( param, (drm_radeon_getparam_t *)data,
+			     sizeof(param) );
+
+	DRM_DEBUG( "pid=%d\n", DRM_CURRENTPID );
+
+	switch( param.param ) {
+	case RADEON_PARAM_AGP_BUFFER_OFFSET:
+		value = dev_priv->agp_buffers_offset;
+		break;
+	case RADEON_PARAM_LAST_FRAME:
+		dev_priv->stats.last_frame_reads++;
+		value = GET_SCRATCH( 0 );
+		break;
+	case RADEON_PARAM_LAST_DISPATCH:
+		value = GET_SCRATCH( 1 );
+		break;
+	case RADEON_PARAM_LAST_CLEAR:
+		dev_priv->stats.last_clear_reads++;
+		value = GET_SCRATCH( 2 );
+		break;
+	case RADEON_PARAM_IRQ_NR:
+		value = dev->irq;
+		break;
+	case RADEON_PARAM_AGP_BASE:
+		value = dev_priv->agp_vm_start;
+		break;
+	default:
+		return DRM_ERR(EINVAL);
+	}
+
+	if ( DRM_COPY_TO_USER( param.value, &value, sizeof(int) ) ) {
+		DRM_ERROR( "copy_to_user\n" );
+		return DRM_ERR(EFAULT);
+	}
+	
+	return 0;
+}
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/shared/kbd.c b/xc/programs/Xserver/hw/xfree86/os-support/shared/kbd.c
index f3c87c53e..0ebf729ac 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/shared/kbd.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/shared/kbd.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/shared/kbd.c,v 1.1 2002/10/11 01:47:00 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/shared/kbd.c,v 1.2 2003/02/17 15:11:59 dawes Exp $ */
 
 /*
  * Copyright (c) 2001 by The XFree86 Project, Inc.
@@ -7,7 +7,7 @@
 #include "xf86OSKbd.h"
 
 Bool
-xf86OSKbdPreInit(KbdDevPtr pKbd)
+xf86OSKbdPreInit(InputInfoPtr pInfo)
 {
     return FALSE;
 }
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/shared/libc_wrapper.c b/xc/programs/Xserver/hw/xfree86/os-support/shared/libc_wrapper.c
index f2791b070..90bf251a4 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/shared/libc_wrapper.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/shared/libc_wrapper.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/shared/libc_wrapper.c,v 1.86 2002/05/31 18:46:02 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/shared/libc_wrapper.c,v 1.88 2003/02/22 06:00:39 dawes Exp $ */
 /*
  * Copyright 1997 by The XFree86 Project, Inc.
  *
@@ -165,6 +165,11 @@ typedef struct dirent DIRENTRY;
 #endif
 #include <setjmp.h>
 
+#if defined(setjmp) && \
+    defined(__GLIBC__) && __GLIBC__ == 2 && __GLIBC_MINOR__ < 2
+#define HAS_GLIBC_SIGSETJMP 1
+#endif
+
 #if 0
 #define SETBUF_RETURNS_INT
 #endif
@@ -1946,14 +1951,39 @@ xf86shmdt(char *addr)
 #endif /* HAVE_SYSV_IPC */
 
 int
-xf86setjmp(xf86jmp_buf xf86env)
+xf86getjmptype()
 {
-    return setjmp((void *)xf86env);
+#ifdef HAS_GLIBC_SIGSETJMP
+    return 1;
+#else
+    return 0;
+#endif
 }
 
-void
-xf86longjmp(xf86jmp_buf xf86env, int val)
+#ifdef HAS_GLIBC_SIGSETJMP
+int
+xf86setjmp(xf86jmp_buf env)
+{
+    FatalError("setjmp: type 0 called instead of type %d\n", xf86getjmptype());
+}
+#else
+int
+xf86setjmp1(xf86jmp_buf env, int arg2)
+{
+    FatalError("setjmp: type 1 called instead of type %d\n", xf86getjmptype());
+}
+#endif
+
+int
+xf86setjmp1_arg2()
+{
+    return 0;
+}
+
+int
+xf86setjmperror(xf86jmp_buf env)
 {
-    longjmp((void *)xf86env, val);
+    FatalError("setjmp: don't know how to handle setjmp() type %d\n",
+	       xf86getjmptype());
 }
 
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/shared/posix_tty.c b/xc/programs/Xserver/hw/xfree86/os-support/shared/posix_tty.c
index b432228d5..a4f487025 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/shared/posix_tty.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/shared/posix_tty.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/shared/posix_tty.c,v 3.27 2002/09/16 18:06:14 eich Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/shared/posix_tty.c,v 3.28 2003/02/17 15:11:59 dawes Exp $ */
 /*
  * Copyright 1993-1999 by The XFree86 Project, Inc.
  *
@@ -506,7 +506,8 @@ xf86FlushInput(int fd)
 	FD_ZERO(&fds);
 	FD_SET(fd, &fds);
 	while (select(FD_SETSIZE, &fds, NULL, NULL, &timeout) > 0) {
-		read(fd, &c, sizeof(c));
+		if (read(fd, &c, sizeof(c)) < 1)
+		    return 0;
 		FD_ZERO(&fds);
 		FD_SET(fd, &fds);
 	}
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/sunos/sun_io.c b/xc/programs/Xserver/hw/xfree86/os-support/sunos/sun_io.c
index ba1dfbc01..27996d312 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/sunos/sun_io.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/sunos/sun_io.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/sunos/sun_io.c,v 1.2 2002/10/11 01:40:37 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/sunos/sun_io.c,v 1.3 2003/02/17 15:12:00 dawes Exp $ */
 /*
  * Copyright 1990,91 by Thomas Roell, Dinkelscherben, Germany
  * Copyright 1993 by David Dawes <dawes@xfree86.org>
@@ -58,7 +58,7 @@ xf86SetKbdLeds(int leds)
 #include "xf86OSKbd.h"
 
 Bool
-xf86OSKbdPreInit(KbdDevPtr pKbd)
+xf86OSKbdPreInit(InputInfoPtr pInfo)
 {
     return FALSE;
 }
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/sysv/sysv_io.c b/xc/programs/Xserver/hw/xfree86/os-support/sysv/sysv_io.c
index 7091652f9..d48efd76e 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/sysv/sysv_io.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/sysv/sysv_io.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/sysv/sysv_io.c,v 3.10 2002/10/11 01:40:37 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/sysv/sysv_io.c,v 3.11 2003/02/17 15:12:00 dawes Exp $ */
 /*
  * Copyright 1990,91 by Thomas Roell, Dinkelscherben, Germany
  * Copyright 1993 by David Dawes <dawes@xfree86.org>
@@ -68,7 +68,7 @@ xf86SetKbdLeds(int leds)
 #include "xf86OSKbd.h"
 
 Bool
-xf86OSKbdPreInit(KbdDevPtr pKbd)
+xf86OSKbdPreInit(InputInfoPtr pInfo)
 {
     return FALSE;
 }
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/xf86OSKbd.h b/xc/programs/Xserver/hw/xfree86/os-support/xf86OSKbd.h
index e31dec3a3..e63d7759c 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/xf86OSKbd.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/xf86OSKbd.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/xf86OSKbd.h,v 1.2 2002/10/17 02:30:17 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/xf86OSKbd.h,v 1.3 2003/02/17 15:11:55 dawes Exp $ */
 
 /*
  * Copyright (c) 2002 by The XFree86 Project, Inc.
@@ -11,9 +11,9 @@ Bool ATScancode(InputInfoPtr pInfo, int *scanCode);
 
 /* Public interface to OS-specific keyboard support. */
 
-typedef	void	(*KbdInitProc)(InputInfoPtr pInfo);
-typedef	int	(*KbdOnProc)(InputInfoPtr pInfo);
-typedef	int	(*KbdOffProc)(InputInfoPtr pInfo);
+typedef	int	(*KbdInitProc)(InputInfoPtr pInfo, int what);
+typedef	int	(*KbdOnProc)(InputInfoPtr pInfo, int what);
+typedef	int	(*KbdOffProc)(InputInfoPtr pInfo, int what);
 typedef	void	(*BellProc)(InputInfoPtr pInfo,
                             int loudness, int pitch, int duration);
 typedef	void	(*SetLedsProc)(InputInfoPtr pInfo, int leds);
@@ -89,4 +89,4 @@ typedef struct {
     KbdProtocolId	id;
 } KbdProtocolRec;
 
-Bool xf86OSKbdPreInit(KbdDevPtr pKbd);
+Bool xf86OSKbdPreInit(InputInfoPtr pInfo);
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/xf86OSmouse.h b/xc/programs/Xserver/hw/xfree86/os-support/xf86OSmouse.h
index 6b8b055f4..a4486b987 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/xf86OSmouse.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/xf86OSmouse.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/xf86OSmouse.h,v 1.18 2002/09/16 18:06:12 eich Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/xf86OSmouse.h,v 1.20 2002/12/17 20:55:23 dawes Exp $ */
 
 /*
  * Copyright (c) 1997-1999 by The XFree86 Project, Inc.
@@ -161,6 +161,8 @@ typedef struct _MouseDevRec {
     autoProbeProc	autoProbeMouse;
     collectDataProc	collectData;
     dataGoodProc	dataGood;
+    int			angleOffset;
+    pointer		pDragLock;	/* drag lock area */
 } MouseDevRec, *MouseDevPtr;
 
 /* Z axis mapping */
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/xf86_ansic.h b/xc/programs/Xserver/hw/xfree86/os-support/xf86_ansic.h
index e7514001d..85708a2de 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/xf86_ansic.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/xf86_ansic.h
@@ -22,7 +22,7 @@
  *
  */
 
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/xf86_ansic.h,v 3.48 2001/12/31 18:13:37 herrb Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/xf86_ansic.h,v 3.49 2003/02/22 06:00:39 dawes Exp $ */
 
 #ifndef _XF86_ANSIC_H
 #define _XF86_ANSIC_H
@@ -305,8 +305,17 @@ extern int xf86shmget(xf86key_t key, int size, int xf86shmflg);
 extern char * xf86shmat(int id, char *addr, int xf86shmflg);
 extern int xf86shmdt(char *addr);
 extern int xf86shmctl(int id, int xf86cmd, pointer buf);
+
 extern int xf86setjmp(xf86jmp_buf env);
+extern int xf86setjmp1(xf86jmp_buf env, int);
+extern int xf86setjmp1_arg2(void);
+extern int xf86setjmperror(xf86jmp_buf env);
+extern int xf86getjmptype(void);
 extern void xf86longjmp(xf86jmp_buf env, int val);
+#define xf86setjmp_macro(env) \
+	(xf86getjmptype() == 0 ? xf86setjmp((env)) : \
+	(xf86getjmptype() == 1 ? xf86setjmp1((env), xf86setjmp1_arg2()) : \
+		xf86setjmperror((env))))
 
 #else /* XFree86LOADER || NEED_XF86_PROTOTYPES */
 #include <unistd.h>
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/xf86_libc.h b/xc/programs/Xserver/hw/xfree86/os-support/xf86_libc.h
index ab9bc798a..51784e06f 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/xf86_libc.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/xf86_libc.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/xf86_libc.h,v 3.54 2002/09/19 13:22:02 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/xf86_libc.h,v 3.56 2003/02/22 06:00:39 dawes Exp $ */
 
 
 
@@ -71,7 +71,7 @@ struct xf86stat {
 typedef int xf86key_t;
 
 /* setjmp/longjmp */
-typedef int xf86jmp_buf[20];
+typedef int xf86jmp_buf[1024];
 
 /* for setvbuf */
 #define XF86_IONBF    1
@@ -350,6 +350,8 @@ typedef int xf86jmp_buf[20];
 #define strerror(i)		xf86strerror(i)
 #undef strlen
 #define strlen(ccp)		xf86strlen(ccp)
+#undef strncat
+#define strncat(ccp1,ccp2,I)	xf86strncat(ccp1,ccp2,I)
 #undef strncmp
 #define strncmp(ccp1,ccp2,I)	xf86strncmp(ccp1,ccp2,I)
 #undef strncasecmp
@@ -366,7 +368,7 @@ typedef int xf86jmp_buf[20];
 #define strspn(ccp1,ccp2)	xf86strspn(ccp1,ccp2)
 #undef strstr
 #define strstr(ccp1,ccp2)	xf86strstr(ccp1,ccp2)
-#undef srttod
+#undef strtod
 #define strtod(ccp,cpp)		xf86strtod(ccp,cpp)
 #undef strtok
 #define strtok(cp,ccp)		xf86strtok(cp,ccp)
@@ -448,10 +450,6 @@ typedef int xf86jmp_buf[20];
 #define shmdt(a)		xf86shmdt(a)
 #undef shmctl
 #define shmctl(a,b,c)		xf86shmctl(a,b,c)
-#undef setjmp
-#define setjmp(a)               xf86setjmp(a)
-#undef longjmp
-#define longjmp(a,b)            xf86longjmp(a,b) 
 
 #undef S_ISUID
 #define S_ISUID XF86_S_ISUID
@@ -507,8 +505,6 @@ typedef int xf86jmp_buf[20];
 #define uid_t                   xf86uid_t
 #undef gid_t
 #define gid_t                   xf86gid_t
-#undef jmp_buf
-#define jmp_buf                 xf86jmp_buf
 #undef stat_t
 #define stat_t			struct xf86stat
 
@@ -663,6 +659,16 @@ typedef int xf86jmp_buf[20];
 #undef FILENAME_MAX
 #define FILENAME_MAX		1024
 
-#endif /* XFree86LOADER */
+#endif /* XFree86LOADER  && !DONT_DEFINE_WRAPPERS */
+
+#if defined(XFree86LOADER) && \
+    (!defined(DONT_DEFINE_WRAPPERS) || defined(DEFINE_SETJMP_WRAPPERS))
+#undef setjmp
+#define setjmp(a)               xf86setjmp_macro(a)
+#undef longjmp
+#define longjmp(a,b)            xf86longjmp(a,b) 
+#undef jmp_buf
+#define jmp_buf                 xf86jmp_buf
+#endif
 
 #endif /* XF86_LIBC_H */
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/xf86drm.h b/xc/programs/Xserver/hw/xfree86/os-support/xf86drm.h
index c28b5e47a..1dccaa09e 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/xf86drm.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/xf86drm.h
@@ -26,7 +26,7 @@
  *
  * Author: Rickard E. (Rik) Faith <faith@valinux.com>
  *
- * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/xf86drm.h,v 1.17 2002/10/16 01:26:48 dawes Exp $
+ * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/xf86drm.h,v 1.21 2002/12/24 17:42:59 tsi Exp $
  *
  */
 
@@ -220,12 +220,47 @@ typedef struct _drmTextureRegion {
     unsigned int  age;
 } drmTextureRegion, *drmTextureRegionPtr;
 
+
+typedef struct _drmClipRect {
+    unsigned short	x1; /* Upper left: inclusive */
+    unsigned short	y1;
+    unsigned short	x2; /* Lower right: exclusive */
+    unsigned short	y2;
+} drmClipRect, *drmClipRectPtr;
+
+
+typedef enum {
+    DRM_VBLANK_ABSOLUTE = 0x0,		/* Wait for specific vblank sequence number */
+    DRM_VBLANK_RELATIVE = 0x1,		/* Wait for given number of vblanks */
+    DRM_VBLANK_SIGNAL   = 0x40000000	/* Send signal instead of blocking */
+} drmVBlankSeqType;
+
+typedef struct _drmVBlankReq {
+	drmVBlankSeqType type;
+	unsigned int sequence;
+	unsigned long signal;
+} drmVBlankReq, *drmVBlankReqPtr;
+
+typedef struct _drmVBlankReply {
+	drmVBlankSeqType type;
+	unsigned int sequence;
+	long tval_sec;
+	long tval_usec;
+} drmVBlankReply, *drmVBlankReplyPtr;
+
+typedef union _drmVBlank {
+	drmVBlankReq request;
+	drmVBlankReply reply;
+} drmVBlank, *drmVBlankPtr;
+
+
+
 #define __drm_dummy_lock(lock) (*(__volatile__ unsigned int *)lock)
 
 #define DRM_LOCK_HELD  0x80000000 /* Hardware lock is held                 */
 #define DRM_LOCK_CONT  0x40000000 /* Hardware lock is contended            */
 
-#if __GNUC__ >= 2
+#if defined(__GNUC__) && (__GNUC__ >= 2)
 # if defined(__i386) || defined(__x86_64__)
 				/* Reflect changes here to drmP.h */
 #define DRM_CAS(lock,old,new,__ret)                                    \
@@ -424,6 +459,7 @@ extern int           drmAvailable(void);
 extern int           drmOpen(const char *name, const char *busid);
 extern int           drmClose(int fd);
 extern drmVersionPtr drmGetVersion(int fd);
+extern drmVersionPtr drmGetLibVersion(int fd);
 extern void          drmFreeVersion(drmVersionPtr);
 extern int           drmGetMagic(int fd, drmMagicPtr magic);
 extern char          *drmGetBusid(int fd);
@@ -437,7 +473,13 @@ extern int           drmGetClient(int fd, int idx, int *auth, int *pid,
 				  int *uid, unsigned long *magic,
 				  unsigned long *iocs);
 extern int           drmGetStats(int fd, drmStatsT *stats);
-
+extern int           drmCommandNone(int fd, unsigned long drmCommandIndex);
+extern int           drmCommandRead(int fd, unsigned long drmCommandIndex,
+                                    void *data, unsigned long size);
+extern int           drmCommandWrite(int fd, unsigned long drmCommandIndex,
+                                     void *data, unsigned long size);
+extern int           drmCommandWriteRead(int fd, unsigned long drmCommandIndex,
+                                         void *data, unsigned long size);
 
 /* General user-level programmer's API: X server (root) only  */
 extern void          drmFreeBusid(const char *busid);
@@ -526,6 +568,8 @@ extern int           drmScatterGatherAlloc(int fd, unsigned long size,
 					   unsigned long *handle);
 extern int           drmScatterGatherFree(int fd, unsigned long handle);
 
+extern int           drmWaitVBlank(int fd, drmVBlankPtr vbl);
+
 /* Support routines */
 extern int           drmError(int err, const char *label);
 extern void          *drmMalloc(int size);
diff --git a/xc/programs/Xserver/hw/xfree86/parser/DRI.c b/xc/programs/Xserver/hw/xfree86/parser/DRI.c
index 6c1f84776..fa22e220d 100644
--- a/xc/programs/Xserver/hw/xfree86/parser/DRI.c
+++ b/xc/programs/Xserver/hw/xfree86/parser/DRI.c
@@ -24,7 +24,7 @@
  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  * DEALINGS IN THE SOFTWARE.
  * 
- * $XFree86: xc/programs/Xserver/hw/xfree86/parser/DRI.c,v 1.12 2001/08/06 20:51:12 dawes Exp $
+ * $XFree86: xc/programs/Xserver/hw/xfree86/parser/DRI.c,v 1.14 2003/01/04 20:20:22 paulo Exp $
  * 
  */
 
diff --git a/xc/programs/Xserver/hw/xfree86/parser/Device.c b/xc/programs/Xserver/hw/xfree86/parser/Device.c
index b63921283..e929641c9 100644
--- a/xc/programs/Xserver/hw/xfree86/parser/Device.c
+++ b/xc/programs/Xserver/hw/xfree86/parser/Device.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/Device.c,v 1.24 2002/09/17 17:06:16 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/Device.c,v 1.26 2003/01/04 20:20:22 paulo Exp $ */
 /* 
  * 
  * Copyright (c) 1997  Metro Link Incorporated
diff --git a/xc/programs/Xserver/hw/xfree86/parser/Files.c b/xc/programs/Xserver/hw/xfree86/parser/Files.c
index cb39a0c7f..4be58b512 100644
--- a/xc/programs/Xserver/hw/xfree86/parser/Files.c
+++ b/xc/programs/Xserver/hw/xfree86/parser/Files.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/Files.c,v 1.13 2002/09/16 18:06:16 eich Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/Files.c,v 1.15 2003/01/04 20:20:22 paulo Exp $ */
 /* 
  * 
  * Copyright (c) 1997  Metro Link Incorporated
diff --git a/xc/programs/Xserver/hw/xfree86/parser/Flags.c b/xc/programs/Xserver/hw/xfree86/parser/Flags.c
index 57e1cf5a9..dfd3ab0bd 100644
--- a/xc/programs/Xserver/hw/xfree86/parser/Flags.c
+++ b/xc/programs/Xserver/hw/xfree86/parser/Flags.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/Flags.c,v 1.20 2002/09/17 17:15:11 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/Flags.c,v 1.22 2003/01/04 20:20:22 paulo Exp $ */
 /* 
  * 
  * Copyright (c) 1997  Metro Link Incorporated
diff --git a/xc/programs/Xserver/hw/xfree86/parser/Input.c b/xc/programs/Xserver/hw/xfree86/parser/Input.c
index 98d2bd11f..f5387b384 100644
--- a/xc/programs/Xserver/hw/xfree86/parser/Input.c
+++ b/xc/programs/Xserver/hw/xfree86/parser/Input.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/Input.c,v 1.11 2002/09/17 18:54:16 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/Input.c,v 1.13 2003/01/04 20:20:22 paulo Exp $ */
 /* 
  * 
  * Copyright (c) 1997  Metro Link Incorporated
diff --git a/xc/programs/Xserver/hw/xfree86/parser/Keyboard.c b/xc/programs/Xserver/hw/xfree86/parser/Keyboard.c
index f1b8abe94..68cbaf3c0 100644
--- a/xc/programs/Xserver/hw/xfree86/parser/Keyboard.c
+++ b/xc/programs/Xserver/hw/xfree86/parser/Keyboard.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/Keyboard.c,v 1.13 2002/09/17 18:54:16 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/Keyboard.c,v 1.15 2003/01/04 20:20:22 paulo Exp $ */
 /* 
  * 
  * Copyright (c) 1997  Metro Link Incorporated
diff --git a/xc/programs/Xserver/hw/xfree86/parser/Layout.c b/xc/programs/Xserver/hw/xfree86/parser/Layout.c
index 1c7c193e7..cd351c9c6 100644
--- a/xc/programs/Xserver/hw/xfree86/parser/Layout.c
+++ b/xc/programs/Xserver/hw/xfree86/parser/Layout.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/Layout.c,v 1.20 2002/09/17 18:54:16 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/Layout.c,v 1.23 2003/01/04 20:20:23 paulo Exp $ */
 /* 
  * 
  * Copyright (c) 1997  Metro Link Incorporated
diff --git a/xc/programs/Xserver/hw/xfree86/parser/Module.c b/xc/programs/Xserver/hw/xfree86/parser/Module.c
index c0320c5f8..1d61da9a6 100644
--- a/xc/programs/Xserver/hw/xfree86/parser/Module.c
+++ b/xc/programs/Xserver/hw/xfree86/parser/Module.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/Module.c,v 1.9 2001/08/06 20:51:14 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/Module.c,v 1.11 2003/01/04 20:20:23 paulo Exp $ */
 /* 
  * 
  * Copyright (c) 1997  Metro Link Incorporated
@@ -78,7 +78,6 @@ xf86parseModuleSubSection (XF86LoadPtr head, char *name)
 			xf86parseError (UNEXPECTED_EOF_MSG, NULL);
 			xf86conffree(ptr);
 			return NULL;
-			break;
 		default:
 			xf86parseError (INVALID_KEYWORD_MSG, xf86tokenString ());
 			xf86conffree(ptr);
diff --git a/xc/programs/Xserver/hw/xfree86/parser/Monitor.c b/xc/programs/Xserver/hw/xfree86/parser/Monitor.c
index 7c1e210a7..939b621ea 100644
--- a/xc/programs/Xserver/hw/xfree86/parser/Monitor.c
+++ b/xc/programs/Xserver/hw/xfree86/parser/Monitor.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/Monitor.c,v 1.24 2001/08/06 20:51:14 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/Monitor.c,v 1.27 2003/01/04 20:20:23 paulo Exp $ */
 /* 
  * 
  * Copyright (c) 1997  Metro Link Incorporated
@@ -454,7 +454,7 @@ xf86parseMonitorSection (void)
 						ptr->mon_n_hsync++;
 						goto HorizDone;
 				}
-				if (ptr->mon_n_hsync == CONF_MAX_HSYNC)
+				if (ptr->mon_n_hsync >= CONF_MAX_HSYNC)
 					Error ("Sorry. Too many horizontal sync intervals.", NULL);
 				ptr->mon_n_hsync++;
 			} while ((token = xf86getSubToken (&(ptr->mon_comment))) == NUMBER);
@@ -491,7 +491,7 @@ HorizDone:
 						ptr->mon_n_vrefresh++;
 						goto VertDone;
 				}
-				if (ptr->mon_n_vrefresh == CONF_MAX_VREFRESH)
+				if (ptr->mon_n_vrefresh >= CONF_MAX_VREFRESH)
 					Error ("Sorry. Too many vertical refresh intervals.", NULL);
 				ptr->mon_n_vrefresh++;
 			} while ((token = xf86getSubToken (&(ptr->mon_comment))) == NUMBER);
diff --git a/xc/programs/Xserver/hw/xfree86/parser/Pointer.c b/xc/programs/Xserver/hw/xfree86/parser/Pointer.c
index b7a2daa6f..fac4260a4 100644
--- a/xc/programs/Xserver/hw/xfree86/parser/Pointer.c
+++ b/xc/programs/Xserver/hw/xfree86/parser/Pointer.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/Pointer.c,v 1.10 2001/08/06 20:51:14 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/Pointer.c,v 1.12 2003/01/04 20:20:23 paulo Exp $ */
 /* 
  * 
  * Copyright (c) 1997  Metro Link Incorporated
diff --git a/xc/programs/Xserver/hw/xfree86/parser/Screen.c b/xc/programs/Xserver/hw/xfree86/parser/Screen.c
index 4af631783..af8c407a9 100644
--- a/xc/programs/Xserver/hw/xfree86/parser/Screen.c
+++ b/xc/programs/Xserver/hw/xfree86/parser/Screen.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/Screen.c,v 1.22 2002/09/17 18:54:16 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/Screen.c,v 1.24 2003/01/04 20:20:23 paulo Exp $ */
 /* 
  * 
  * Copyright (c) 1997  Metro Link Incorporated
diff --git a/xc/programs/Xserver/hw/xfree86/parser/Vendor.c b/xc/programs/Xserver/hw/xfree86/parser/Vendor.c
index 2e22c69f1..f2e98872c 100644
--- a/xc/programs/Xserver/hw/xfree86/parser/Vendor.c
+++ b/xc/programs/Xserver/hw/xfree86/parser/Vendor.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/Vendor.c,v 1.14 2002/09/17 18:54:16 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/Vendor.c,v 1.16 2003/01/04 20:20:23 paulo Exp $ */
 /* 
  * 
  * Copyright (c) 1997  Metro Link Incorporated
diff --git a/xc/programs/Xserver/hw/xfree86/parser/Video.c b/xc/programs/Xserver/hw/xfree86/parser/Video.c
index 27a9ec310..b899f0d3d 100644
--- a/xc/programs/Xserver/hw/xfree86/parser/Video.c
+++ b/xc/programs/Xserver/hw/xfree86/parser/Video.c
@@ -25,7 +25,7 @@
  * in this Software without prior written authorization from Metro Link.
  * 
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/Video.c,v 1.10 2001/08/06 20:51:15 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/Video.c,v 1.12 2003/01/04 20:20:23 paulo Exp $ */
 
 /* View/edit this file with tab stops set to 4 */
 
diff --git a/xc/programs/Xserver/hw/xfree86/parser/cpconfig.c b/xc/programs/Xserver/hw/xfree86/parser/cpconfig.c
index 41350a3dd..3cd3749ed 100644
--- a/xc/programs/Xserver/hw/xfree86/parser/cpconfig.c
+++ b/xc/programs/Xserver/hw/xfree86/parser/cpconfig.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/cpconfig.c,v 1.6 2000/10/20 14:59:03 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/cpconfig.c,v 1.7 2003/02/17 16:08:29 dawes Exp $ */
 /* 
  * 
  * Copyright (c) 1997  Metro Link Incorporated
@@ -34,6 +34,7 @@
 #include <stdarg.h>
 #include <ctype.h>
 #include "xf86Parser.h"
+#include "configProcs.h"
 
 #ifdef MALLOC_FUNCTIONS
 void
diff --git a/xc/programs/Xserver/hw/xfree86/parser/read.c b/xc/programs/Xserver/hw/xfree86/parser/read.c
index 94d235df2..cd7bbf10b 100644
--- a/xc/programs/Xserver/hw/xfree86/parser/read.c
+++ b/xc/programs/Xserver/hw/xfree86/parser/read.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/read.c,v 1.21 2002/09/17 18:54:16 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/read.c,v 1.23 2003/01/04 20:20:23 paulo Exp $ */
 /* 
  * 
  * Copyright (c) 1997  Metro Link Incorporated
diff --git a/xc/programs/Xserver/hw/xfree86/parser/scan.c b/xc/programs/Xserver/hw/xfree86/parser/scan.c
index 55e68d3eb..4d8167622 100644
--- a/xc/programs/Xserver/hw/xfree86/parser/scan.c
+++ b/xc/programs/Xserver/hw/xfree86/parser/scan.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/scan.c,v 1.21 2002/09/17 18:54:16 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/scan.c,v 1.24 2003/01/04 20:20:23 paulo Exp $ */
 /* 
  * 
  * Copyright (c) 1997  Metro Link Incorporated
@@ -72,6 +72,7 @@ static char *configBuf, *configRBuf;	/* buffer for lines */
 static char *configPath;		/* path to config file */
 static char *configSection = NULL;	/* name of current section being parsed */
 static int pushToken = LOCK_TOKEN;
+static int eol_seen = 0;		/* private state to handle comments */
 LexRec val;
 
 #ifdef __UNIXOS2__
@@ -144,6 +145,10 @@ xf86getToken (xf86ConfigSymTabRec * tab)
 		return (EOF_TOKEN);
 	else if (pushToken == LOCK_TOKEN)
 	{
+		/*
+		 * eol_seen is only set for the first token after a newline.
+		 */
+		eol_seen = 0;
 
 		c = configBuf[configPos];
 
@@ -161,6 +166,7 @@ again:
 			}
 			configLineNo++;
 			configStart = configPos = 0;
+			eol_seen = 1;
 		}
 
 		i = 0;
@@ -186,13 +192,8 @@ again:
 			do
 			{
 				configRBuf[i++] = (c = configBuf[configPos++]);
-#ifndef __UNIXOS2__
-			}
-			while ((c != '\n') && (c != '\0'));
-#else
 			}
 			while ((c != '\n') && (c != '\r') && (c != '\0'));
-#endif
 			configRBuf[i] = '\0';
 			/* XXX no private copy.
 			 * Use xf86addComment when setting a comment.
@@ -253,13 +254,8 @@ again:
 			do
 			{
 				configRBuf[++i] = (c = configBuf[configPos++]);
-#ifndef __UNIXOS2__
-			}
-			while ((c != '\"') && (c != '\n') && (c != '\0'));
-#else
 			}
 			while ((c != '\"') && (c != '\n') && (c != '\r') && (c != '\0'));
-#endif
 			configRBuf[i] = '\0';
 			val.str = xf86confmalloc (strlen (configRBuf) + 1);
 			strcpy (val.str, configRBuf);	/* private copy ! */
@@ -277,13 +273,9 @@ again:
 			do
 			{
 				configRBuf[++i] = (c = configBuf[configPos++]);;
-#ifndef __UNIXOS2__
 			}
-			while ((c != ' ') && (c != '\t') && (c != '\n') && (c != '\0'));
-#else
-			}
-			while ((c != ' ') && (c != '\t') && (c != '\n') && (c != '\r') && (c != '\0'));
-#endif
+			while ((c != ' ') && (c != '\t') && (c != '\n') && (c != '\r') && (c != '\0') && (c != '#'));
+			--configPos;
 			configRBuf[i] = '\0';
 			i = 0;
 		}
@@ -1046,6 +1038,7 @@ xf86addComment(char *cur, char *add)
 		curlen = strlen(cur);
 		if (curlen)
 		    hasnewline = cur[curlen - 1] == '\n';
+		eol_seen = 0;
 	}
 	else
 		curlen = 0;
@@ -1061,14 +1054,14 @@ xf86addComment(char *cur, char *add)
 
 	len = strlen(add);
 	endnewline = add[len - 1] == '\n';
-	len +=  1 + iscomment + (!hasnewline) + (!endnewline);
+	len +=  1 + iscomment + (!hasnewline) + (!endnewline) + eol_seen;
 
 	if ((str = xf86confrealloc(cur, len + curlen)) == NULL)
 		return (cur);
 
 	cur = str;
 
-	if (curlen && !hasnewline)
+	if (eol_seen || (curlen && !hasnewline))
 		cur[curlen++] = '\n';
 	if (!iscomment)
 		cur[curlen++] = '#';
diff --git a/xc/programs/Xserver/hw/xfree86/parser/xf86tokens.h b/xc/programs/Xserver/hw/xfree86/parser/xf86tokens.h
index d95228597..eb8eab766 100644
--- a/xc/programs/Xserver/hw/xfree86/parser/xf86tokens.h
+++ b/xc/programs/Xserver/hw/xfree86/parser/xf86tokens.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/xf86tokens.h,v 1.17 2002/09/16 18:06:17 eich Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/xf86tokens.h,v 1.19 2003/01/04 20:20:23 paulo Exp $ */
 /* 
  * 
  * Copyright (c) 1997  Metro Link Incorporated
diff --git a/xc/programs/Xserver/hw/xfree86/ramdac/CURSOR.NOTES b/xc/programs/Xserver/hw/xfree86/ramdac/CURSOR.NOTES
index c1988c7f0..3e901e380 100644
--- a/xc/programs/Xserver/hw/xfree86/ramdac/CURSOR.NOTES
+++ b/xc/programs/Xserver/hw/xfree86/ramdac/CURSOR.NOTES
@@ -105,9 +105,12 @@ Flags
    HARDWARE_CURSOR_SHOW_TRANSPARENT
 
    The HideCursor entry will normally be called instead of displaying a
-   completely transparent cursor.  This flag prevents this behaviour, thus
-   causing the LoadCursorImage entry to be called with the transparent cursor
-   data.
+   completely transparent cursor, or when a switch to a software cursor
+   needs to occur.  This flag prevents this behaviour, thus causing the
+   LoadCursorImage entry to be called with transparent cursor data.
+   NOTE:  If you use this flag and provide your own RealizeCursor() entry,
+          ensure this entry returns transparent cursor data when called
+          with a NULL pCurs parameter.
 
    HARDWARE_CURSOR_UPDATE_UNHIDDEN
 
@@ -185,4 +188,4 @@ Flags
 
 
 
-$XFree86: xc/programs/Xserver/hw/xfree86/ramdac/CURSOR.NOTES,v 1.4 2001/05/09 03:12:06 tsi Exp $
+$XFree86: xc/programs/Xserver/hw/xfree86/ramdac/CURSOR.NOTES,v 1.5 2003/02/13 20:28:41 tsi Exp $
diff --git a/xc/programs/Xserver/hw/xfree86/ramdac/IBM.c b/xc/programs/Xserver/hw/xfree86/ramdac/IBM.c
index 69a9d3864..d62a9ba56 100644
--- a/xc/programs/Xserver/hw/xfree86/ramdac/IBM.c
+++ b/xc/programs/Xserver/hw/xfree86/ramdac/IBM.c
@@ -23,7 +23,7 @@
  *
  * IBM RAMDAC routines.
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/ramdac/IBM.c,v 1.11 2001/04/09 00:04:12 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/ramdac/IBM.c,v 1.12 2003/02/17 16:08:29 dawes Exp $ */
 
 #include "xf86.h"
 #include "xf86_OSproc.h"
@@ -460,7 +460,7 @@ IBMramdac640SetBpp(ScrnInfoPtr pScrn, RamDacRegRecPtr ramdacReg)
     }
 }
 
-void 
+static void 
 IBMramdac526ShowCursor(ScrnInfoPtr pScrn)
 {
    RamDacRecPtr ramdacPtr = RAMDACSCRPTR(pScrn);
@@ -469,7 +469,7 @@ IBMramdac526ShowCursor(ScrnInfoPtr pScrn)
    (*ramdacPtr->WriteDAC)(pScrn, IBMRGB_curs, 0x00, 0x07);
 }
 
-void 
+static void 
 IBMramdac640ShowCursor(ScrnInfoPtr pScrn)
 {
    RamDacRecPtr ramdacPtr = RAMDACSCRPTR(pScrn);
@@ -479,7 +479,7 @@ IBMramdac640ShowCursor(ScrnInfoPtr pScrn)
    (*ramdacPtr->WriteDAC)(pScrn, RGB640_CROSSHAIR_CONTROL, 0x00, 0x00);
 }
 
-void
+static void
 IBMramdac526HideCursor(ScrnInfoPtr pScrn)
 {
    RamDacRecPtr ramdacPtr = RAMDACSCRPTR(pScrn);
@@ -488,7 +488,7 @@ IBMramdac526HideCursor(ScrnInfoPtr pScrn)
    (*ramdacPtr->WriteDAC)(pScrn, IBMRGB_curs, 0x00, 0x24);
 }
 
-void
+static void
 IBMramdac640HideCursor(ScrnInfoPtr pScrn)
 {
    RamDacRecPtr ramdacPtr = RAMDACSCRPTR(pScrn);
@@ -497,7 +497,7 @@ IBMramdac640HideCursor(ScrnInfoPtr pScrn)
    (*ramdacPtr->WriteDAC)(pScrn, RGB640_CURSOR_CONTROL, 0x00, 0x08);
 }
 
-void
+static void
 IBMramdac526SetCursorPosition(ScrnInfoPtr pScrn, int x, int y)
 {
    RamDacRecPtr ramdacPtr = RAMDACSCRPTR(pScrn);
@@ -513,7 +513,7 @@ IBMramdac526SetCursorPosition(ScrnInfoPtr pScrn, int x, int y)
    (*ramdacPtr->WriteDAC)(pScrn, IBMRGB_curs_yh, 0x00, (y>>8) & 0xf);
 }
 
-void
+static void
 IBMramdac640SetCursorPosition(ScrnInfoPtr pScrn, int x, int y)
 {
    RamDacRecPtr ramdacPtr = RAMDACSCRPTR(pScrn);
@@ -529,7 +529,7 @@ IBMramdac640SetCursorPosition(ScrnInfoPtr pScrn, int x, int y)
    (*ramdacPtr->WriteDAC)(pScrn, RGB640_CURS_Y_HIGH, 0x00, (y>>8) & 0xf);
 }
 
-void
+static void
 IBMramdac526SetCursorColors(ScrnInfoPtr pScrn, int bg, int fg)
 {
    RamDacRecPtr ramdacPtr = RAMDACSCRPTR(pScrn);
@@ -542,7 +542,7 @@ IBMramdac526SetCursorColors(ScrnInfoPtr pScrn, int bg, int fg)
    (*ramdacPtr->WriteDAC)(pScrn, IBMRGB_curs_col2_b, 0x00, fg);
 }
 
-void
+static void
 IBMramdac640SetCursorColors(ScrnInfoPtr pScrn, int bg, int fg)
 {
    RamDacRecPtr ramdacPtr = RAMDACSCRPTR(pScrn);
@@ -562,7 +562,7 @@ IBMramdac640SetCursorColors(ScrnInfoPtr pScrn, int bg, int fg)
    (*ramdacPtr->WriteData)(pScrn, bg);
 }
 
-void 
+static void 
 IBMramdac526LoadCursorImage(ScrnInfoPtr pScrn, unsigned char *src)
 {
    RamDacRecPtr ramdacPtr = RAMDACSCRPTR(pScrn);
@@ -575,7 +575,7 @@ IBMramdac526LoadCursorImage(ScrnInfoPtr pScrn, unsigned char *src)
       (*ramdacPtr->WriteDAC)(pScrn, IBMRGB_curs_array + i, 0x00, (*src++));
 }
 
-void 
+static void 
 IBMramdac640LoadCursorImage(ScrnInfoPtr pScrn, unsigned char *src)
 {
    RamDacRecPtr ramdacPtr = RAMDACSCRPTR(pScrn);
diff --git a/xc/programs/Xserver/hw/xfree86/ramdac/TI.c b/xc/programs/Xserver/hw/xfree86/ramdac/TI.c
index 89fb07c0b..267a13f9f 100644
--- a/xc/programs/Xserver/hw/xfree86/ramdac/TI.c
+++ b/xc/programs/Xserver/hw/xfree86/ramdac/TI.c
@@ -22,9 +22,9 @@
  * Authors:  Alan Hourihane, <alanh@fairlite.demon.co.uk>
  *
  * Modified from IBM.c to support TI RAMDAC routines 
- *   by Jens Owen, <jens@precisioninsight.com>.
+ *   by Jens Owen, <jens@tungstengraphics.com>.
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/ramdac/TI.c,v 1.5 2000/05/02 21:04:46 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/ramdac/TI.c,v 1.7 2003/02/17 16:08:29 dawes Exp $ */
 
 #include "xf86.h"
 #include "xf86_OSproc.h"
@@ -585,7 +585,7 @@ TIramdac3030SetBpp(ScrnInfoPtr pScrn, RamDacRegRecPtr ramdacReg)
     }
 }
 
-void 
+static void 
 TIramdacShowCursor(ScrnInfoPtr pScrn)
 {
     RamDacRecPtr ramdacPtr = RAMDACSCRPTR(pScrn);
@@ -594,7 +594,7 @@ TIramdacShowCursor(ScrnInfoPtr pScrn)
     (*ramdacPtr->WriteDAC)(pScrn, TIDAC_ind_curs_ctrl, 0, 0x03);
 }
 
-void
+static void
 TIramdacHideCursor(ScrnInfoPtr pScrn)
 {
     RamDacRecPtr ramdacPtr = RAMDACSCRPTR(pScrn);
@@ -603,7 +603,7 @@ TIramdacHideCursor(ScrnInfoPtr pScrn)
     (*ramdacPtr->WriteDAC)(pScrn, TIDAC_ind_curs_ctrl, 0, 0x00);
 }
 
-void
+static void
 TIramdacSetCursorPosition(ScrnInfoPtr pScrn, int x, int y)
 {
     RamDacRecPtr ramdacPtr = RAMDACSCRPTR(pScrn);
@@ -617,7 +617,7 @@ TIramdacSetCursorPosition(ScrnInfoPtr pScrn, int x, int y)
     (*ramdacPtr->WriteDAC)(pScrn, TIDAC_CURS_YHIGH, 0, (y >> 8) & 0x0f);
 }
 
-void
+static void
 TIramdacSetCursorColors(ScrnInfoPtr pScrn, int bg, int fg)
 {
     RamDacRecPtr ramdacPtr = RAMDACSCRPTR(pScrn);
@@ -635,7 +635,7 @@ TIramdacSetCursorColors(ScrnInfoPtr pScrn, int bg, int fg)
     (*ramdacPtr->WriteDAC)(pScrn, TIDAC_CURS_COLOR, 0,  (fg&0x000000ff)       );
 }
 
-void 
+static void 
 TIramdacLoadCursorImage(ScrnInfoPtr pScrn, unsigned char *src)
 {
     RamDacRecPtr ramdacPtr = RAMDACSCRPTR(pScrn);
diff --git a/xc/programs/Xserver/hw/xfree86/ramdac/TI.h b/xc/programs/Xserver/hw/xfree86/ramdac/TI.h
index 12f010be1..9451f814c 100644
--- a/xc/programs/Xserver/hw/xfree86/ramdac/TI.h
+++ b/xc/programs/Xserver/hw/xfree86/ramdac/TI.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/ramdac/TI.h,v 1.4 2000/05/02 21:04:46 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/ramdac/TI.h,v 1.5 2003/02/17 16:08:29 dawes Exp $ */
 
 #include <xf86RamDac.h>
 
@@ -16,6 +16,9 @@ unsigned long TIramdac3030CalculateMNPForClock(unsigned long RefClock,
     unsigned long MaxClock, unsigned long *rM, unsigned long *rN,
     unsigned long *rP);
 void TIramdacHWCursorInit(xf86CursorInfoPtr infoPtr);
+void TIramdacLoadPalette( ScrnInfoPtr pScrn, int numColors, int *indices,
+    LOCO *colors, VisualPtr pVisual);
+
 
 #define TI3030_RAMDAC		(VENDOR_TI << 16) | 0x00
 #define TI3026_RAMDAC		(VENDOR_TI << 16) | 0x01
diff --git a/xc/programs/Xserver/hw/xfree86/ramdac/xf86Cursor.c b/xc/programs/Xserver/hw/xfree86/ramdac/xf86Cursor.c
index f7f2e16bb..49379e934 100644
--- a/xc/programs/Xserver/hw/xfree86/ramdac/xf86Cursor.c
+++ b/xc/programs/Xserver/hw/xfree86/ramdac/xf86Cursor.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/ramdac/xf86Cursor.c,v 1.14 2002/08/23 05:48:26 keithp Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/ramdac/xf86Cursor.c,v 1.20 2003/02/24 20:43:54 tsi Exp $ */
 
 #include "xf86.h"
 #include "xf86_ansic.h"
@@ -98,6 +98,9 @@ xf86InitCursor(
     ScreenPriv->EnterVT = pScrn->EnterVT;
     ScreenPriv->LeaveVT = pScrn->LeaveVT;
     ScreenPriv->SetDGAMode = pScrn->SetDGAMode;
+    
+    ScreenPriv->ForceHWCursorCount = 0;
+    ScreenPriv->HWCursorForced = FALSE;
 
     if (pScrn->SwitchMode)
 	pScrn->SwitchMode = xf86CursorSwitchMode;
@@ -119,6 +122,9 @@ xf86CursorCloseScreen(int i, ScreenPtr pScreen)
     xf86CursorScreenPtr ScreenPriv =
 	pScreen->devPrivates[xf86CursorScreenIndex].ptr;
 
+    if (ScreenPriv->isUp && pScrn->vtSema)
+	xf86SetCursor(pScreen, NullCursor, ScreenPriv->x, ScreenPriv->y);
+
     pScreen->CloseScreen = ScreenPriv->CloseScreen;
     pScreen->QueryBestSize = ScreenPriv->QueryBestSize;
     pScreen->RecolorCursor = ScreenPriv->RecolorCursor;
@@ -133,6 +139,7 @@ xf86CursorCloseScreen(int i, ScreenPtr pScreen)
     pScrn->LeaveVT = ScreenPriv->LeaveVT;
     pScrn->SetDGAMode = ScreenPriv->SetDGAMode;
 
+    xfree(ScreenPriv->transparentData);
     xfree(ScreenPriv);
 
     return (*pScreen->CloseScreen)(i, pScreen);
@@ -328,13 +335,16 @@ xf86CursorSetCursor(ScreenPtr pScreen, CursorPtr pCurs, int x, int y)
 
     PointPriv = pScreen->devPrivates[miPointerScreenIndex].ptr;
 
-    if (infoPtr->pScrn->vtSema &&
+    if (infoPtr->pScrn->vtSema && (ScreenPriv->ForceHWCursorCount || ((
 #ifdef ARGB_CURSOR
-	(pCurs->bits->argb == 0) &&
+	pCurs->bits->argb && infoPtr->UseHWCursorARGB &&
+	 (*infoPtr->UseHWCursorARGB) (pScreen, pCurs) ) || (
+	pCurs->bits->argb == 0 &&
 #endif
 	(pCurs->bits->height <= infoPtr->MaxHeight) &&
 	(pCurs->bits->width <= infoPtr->MaxWidth) &&
-	(!infoPtr->UseHWCursor || (*infoPtr->UseHWCursor)(pScreen, pCurs))) {
+	(!infoPtr->UseHWCursor || (*infoPtr->UseHWCursor)(pScreen, pCurs))))))
+    {
 
 	if (ScreenPriv->SWCursor)	/* remove the SW cursor */
 	      (*ScreenPriv->spriteFuncs->SetCursor)(pScreen, NullCursor, x, y);
@@ -348,9 +358,14 @@ xf86CursorSetCursor(ScreenPtr pScreen, CursorPtr pCurs, int x, int y)
 
     PointPriv->waitForUpdate = TRUE;
 
-    if (ScreenPriv->isUp) {		/* remove the HW cursor */
-	xf86SetCursor(pScreen, NullCursor, x, y);
-	ScreenPriv->isUp = FALSE;
+    if (ScreenPriv->isUp) {
+	/* Remove the HW cursor, or make it transparent */
+	if (infoPtr->Flags & HARDWARE_CURSOR_SHOW_TRANSPARENT) {
+	    xf86SetTransparentCursor(pScreen);
+	} else {
+	    xf86SetCursor(pScreen, NullCursor, x, y);
+	    ScreenPriv->isUp = FALSE;
+	}
     }
 
     ScreenPriv->SWCursor = TRUE;
@@ -378,6 +393,37 @@ xf86CursorMoveCursor(ScreenPtr pScreen, int x, int y)
 	xf86MoveCursor(pScreen, x, y);
 }
 
+void
+xf86ForceHWCursor (ScreenPtr pScreen, Bool on)
+{
+    xf86CursorScreenPtr ScreenPriv =
+	pScreen->devPrivates[xf86CursorScreenIndex].ptr;
+
+    if (on)
+    {
+	if (ScreenPriv->ForceHWCursorCount++ == 0)
+	{
+	    if (ScreenPriv->SWCursor && ScreenPriv->CurrentCursor)
+	    {
+		ScreenPriv->HWCursorForced = TRUE;
+		xf86CursorSetCursor (pScreen, ScreenPriv->CurrentCursor,
+				     ScreenPriv->x, ScreenPriv->y);
+	    }
+	    else
+		ScreenPriv->HWCursorForced = FALSE;
+	}
+    }
+    else
+    {
+	if (--ScreenPriv->ForceHWCursorCount == 0)
+	{
+	    if (ScreenPriv->HWCursorForced && ScreenPriv->CurrentCursor)
+		xf86CursorSetCursor (pScreen, ScreenPriv->CurrentCursor,
+				     ScreenPriv->x, ScreenPriv->y);
+	}
+    }
+}
+
 xf86CursorInfoPtr
 xf86CreateCursorInfoRec(void)
 {
diff --git a/xc/programs/Xserver/hw/xfree86/ramdac/xf86Cursor.h b/xc/programs/Xserver/hw/xfree86/ramdac/xf86Cursor.h
index ab7d16209..5e5df46f3 100644
--- a/xc/programs/Xserver/hw/xfree86/ramdac/xf86Cursor.h
+++ b/xc/programs/Xserver/hw/xfree86/ramdac/xf86Cursor.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/ramdac/xf86Cursor.h,v 1.7 2001/05/18 20:22:31 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/ramdac/xf86Cursor.h,v 1.11 2003/02/15 03:14:47 tsi Exp $ */
 
 #ifndef _XF86CURSOR_H
 #define _XF86CURSOR_H
@@ -19,23 +19,17 @@ typedef struct _xf86CursorInfoRec {
     unsigned char* (*RealizeCursor)(struct _xf86CursorInfoRec *, CursorPtr);
     Bool (*UseHWCursor)(ScreenPtr, CursorPtr);
 
-} xf86CursorInfoRec, *xf86CursorInfoPtr;
+#ifdef ARGB_CURSOR
+    Bool (*UseHWCursorARGB) (ScreenPtr, CursorPtr);
+    void (*LoadCursorARGB) (ScrnInfoPtr, CursorPtr);
+#endif
 
-Bool xf86InitCursor(
-   ScreenPtr pScreen, 
-   xf86CursorInfoPtr infoPtr
-);
+} xf86CursorInfoRec, *xf86CursorInfoPtr;
 
+Bool xf86InitCursor(ScreenPtr pScreen, xf86CursorInfoPtr infoPtr);
 xf86CursorInfoPtr xf86CreateCursorInfoRec(void);
 void xf86DestroyCursorInfoRec(xf86CursorInfoPtr);
-
-
-void xf86SetCursor(ScreenPtr pScreen, CursorPtr pCurs, int x, int y);
-void xf86MoveCursor(ScreenPtr pScreen, int x, int y);
-void xf86RecolorCursor(ScreenPtr pScreen, CursorPtr pCurs, Bool displayed);
-Bool xf86InitHardwareCursor(ScreenPtr pScreen, xf86CursorInfoPtr infoPtr);
-
-extern int xf86CursorScreenIndex;
+void xf86ForceHWCursor (ScreenPtr pScreen, Bool on);
 
 #define HARDWARE_CURSOR_INVERT_MASK 			0x00000001
 #define HARDWARE_CURSOR_AND_SOURCE_WITH_MASK		0x00000002
diff --git a/xc/programs/Xserver/hw/xfree86/ramdac/xf86CursorPriv.h b/xc/programs/Xserver/hw/xfree86/ramdac/xf86CursorPriv.h
index c2d7b272c..5a6ab118a 100644
--- a/xc/programs/Xserver/hw/xfree86/ramdac/xf86CursorPriv.h
+++ b/xc/programs/Xserver/hw/xfree86/ramdac/xf86CursorPriv.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/ramdac/xf86CursorPriv.h,v 1.2 2001/05/18 20:22:31 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/ramdac/xf86CursorPriv.h,v 1.5 2003/02/15 03:14:47 tsi Exp $ */
 
 #ifndef _XF86CURSORPRIV_H
 #define _XF86CURSORPRIV_H
@@ -27,8 +27,22 @@ typedef struct {
     Bool                	(*EnterVT)(int, int);
     void                	(*LeaveVT)(int, int);
     int				(*SetDGAMode)(int, int, DGADevicePtr);
+
+    /* Number of requests to force HW cursor */
+    int				ForceHWCursorCount;
+    Bool			HWCursorForced;
+
+    pointer			transparentData;
 } xf86CursorScreenRec, *xf86CursorScreenPtr;
 
+void xf86SetCursor(ScreenPtr pScreen, CursorPtr pCurs, int x, int y);
+void xf86SetTransparentCursor(ScreenPtr pScreen);
+void xf86MoveCursor(ScreenPtr pScreen, int x, int y);
+void xf86RecolorCursor(ScreenPtr pScreen, CursorPtr pCurs, Bool displayed);
+Bool xf86InitHardwareCursor(ScreenPtr pScreen, xf86CursorInfoPtr infoPtr);
+
 CARD32 xf86ReverseBitOrder(CARD32 data);
 
+extern int xf86CursorScreenIndex;
+
 #endif /* _XF86CURSORPRIV_H */
diff --git a/xc/programs/Xserver/hw/xfree86/ramdac/xf86HWCurs.c b/xc/programs/Xserver/hw/xfree86/ramdac/xf86HWCurs.c
index c689ebc0c..e911f8066 100644
--- a/xc/programs/Xserver/hw/xfree86/ramdac/xf86HWCurs.c
+++ b/xc/programs/Xserver/hw/xfree86/ramdac/xf86HWCurs.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/ramdac/xf86HWCurs.c,v 1.10 2001/05/18 20:22:31 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/ramdac/xf86HWCurs.c,v 1.12 2003/02/13 20:28:41 tsi Exp $ */
 
 #include "misc.h"
 #include "xf86.h"
@@ -124,6 +124,9 @@ xf86SetCursor(ScreenPtr pScreen, CursorPtr pCurs, int x, int y)
     x -= infoPtr->pScrn->frameX0 + ScreenPriv->HotX;
     y -= infoPtr->pScrn->frameY0 + ScreenPriv->HotY;
 
+#ifdef ARGB_CURSOR
+    if (!pCurs->bits->argb || !infoPtr->LoadCursorARGB)
+#endif
     if (!bits) {
 	bits = (*infoPtr->RealizeCursor)(infoPtr, pCurs);
 	pCurs->devPriv[pScreen->myNum] = bits;
@@ -132,6 +135,11 @@ xf86SetCursor(ScreenPtr pScreen, CursorPtr pCurs, int x, int y)
     if (!(infoPtr->Flags & HARDWARE_CURSOR_UPDATE_UNHIDDEN))
 	(*infoPtr->HideCursor)(infoPtr->pScrn);
 
+#ifdef ARGB_CURSOR
+    if (pCurs->bits->argb && infoPtr->LoadCursorARGB)
+	(*infoPtr->LoadCursorARGB) (infoPtr->pScrn, pCurs);
+    else
+#endif
     if (bits)
 	(*infoPtr->LoadCursorImage)(infoPtr->pScrn, bits);
 
@@ -143,6 +151,27 @@ xf86SetCursor(ScreenPtr pScreen, CursorPtr pCurs, int x, int y)
 }
 
 void
+xf86SetTransparentCursor(ScreenPtr pScreen)
+{
+    xf86CursorScreenPtr ScreenPriv =
+	pScreen->devPrivates[xf86CursorScreenIndex].ptr;
+    xf86CursorInfoPtr infoPtr = ScreenPriv->CursorInfoPtr;
+
+    if (!ScreenPriv->transparentData)
+	ScreenPriv->transparentData =
+	    (*infoPtr->RealizeCursor)(infoPtr, NullCursor);
+
+    if (!(infoPtr->Flags & HARDWARE_CURSOR_UPDATE_UNHIDDEN))
+	(*infoPtr->HideCursor)(infoPtr->pScrn);
+
+    if (ScreenPriv->transparentData)
+	(*infoPtr->LoadCursorImage)(infoPtr->pScrn,
+				    ScreenPriv->transparentData);
+
+    (*infoPtr->ShowCursor)(infoPtr->pScrn);
+}
+
+void
 xf86MoveCursor(ScreenPtr pScreen, int x, int y)
 {
     xf86CursorScreenPtr ScreenPriv =
@@ -210,6 +239,16 @@ RealizeCursorInterleave0(xf86CursorInfoPtr infoPtr, CursorPtr pCurs)
     if (!(mem = xcalloc(1, size)))
 	return NULL;
 
+    if (pCurs == NullCursor) {
+	if (infoPtr->Flags & HARDWARE_CURSOR_INVERT_MASK) {
+	    DstM = (SCANLINE*)mem;
+	    if (!(infoPtr->Flags & HARDWARE_CURSOR_SWAP_SOURCE_AND_MASK))
+		DstM += words;
+	    (void)memset(DstM, -1, words * sizeof(SCANLINE));
+	}
+	return mem;
+    }
+
     /* SrcPitch == the number of scanlines wide the cursor image is */
     SrcPitch = (pCurs->bits->width + (BITMAP_SCANLINE_PAD - 1)) >>
       CUR_LOG2_BITMAP_PAD;
diff --git a/xc/programs/Xserver/hw/xfree86/scanpci/Imakefile b/xc/programs/Xserver/hw/xfree86/scanpci/Imakefile
index a8636fe7d..771a30813 100644
--- a/xc/programs/Xserver/hw/xfree86/scanpci/Imakefile
+++ b/xc/programs/Xserver/hw/xfree86/scanpci/Imakefile
@@ -1,5 +1,5 @@
 
-XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/scanpci/Imakefile,v 1.10 2002/07/25 05:06:16 tsi Exp $
+XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/scanpci/Imakefile,v 1.11 2002/12/23 01:46:17 dawes Exp $
 
 #if DoLoadableServer
 #define IHaveSubdirs
@@ -24,7 +24,7 @@ NormalLibraryTarget(scanpci,xf86ScanPci.o)
 
 NormalLibraryTarget(pcidata,xf86PciData.o)
 
-#if HasPerl
+#if HasPerl5
 PCIIDSRCS = ../etc/pci.ids ../etc/extrapci.ids
 PCIIDS = pci.ids
 
diff --git a/xc/programs/Xserver/hw/xfree86/scanpci/pciid2c.pl b/xc/programs/Xserver/hw/xfree86/scanpci/pciid2c.pl
index 4b8e260e0..a43bc5be6 100644
--- a/xc/programs/Xserver/hw/xfree86/scanpci/pciid2c.pl
+++ b/xc/programs/Xserver/hw/xfree86/scanpci/pciid2c.pl
@@ -12,7 +12,7 @@
 #
 # Author: David Dawes
 #
-# $XFree86: xc/programs/Xserver/hw/xfree86/scanpci/pciid2c.pl,v 1.1 2002/07/15 20:46:02 dawes Exp $
+# $XFree86: xc/programs/Xserver/hw/xfree86/scanpci/pciid2c.pl,v 1.2 2002/12/23 16:45:19 tsi Exp $
 #
 
 if (@ARGV[0]) {
@@ -108,7 +108,7 @@ if ($infofile) {
 # Print out header information.
 
 $proj = "XFree86";
-print "/* \$$proj: \$ */
+print "/* \$$proj\$ */
 
 /*
  * THIS FILE IS AUTOMATICALLY GENERATED -- DO NOT EDIT
diff --git a/xc/programs/Xserver/hw/xfree86/scanpci/xf86PciStdIds.h b/xc/programs/Xserver/hw/xfree86/scanpci/xf86PciStdIds.h
index d826d1142..58403ccf7 100644
--- a/xc/programs/Xserver/hw/xfree86/scanpci/xf86PciStdIds.h
+++ b/xc/programs/Xserver/hw/xfree86/scanpci/xf86PciStdIds.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/scanpci/xf86PciStdIds.h,v 1.5 2002/10/21 21:43:09 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/scanpci/xf86PciStdIds.h,v 1.10 2003/02/26 16:33:03 dawes Exp $ */
 
 /*
  * THIS FILE IS AUTOMATICALLY GENERATED -- DO NOT EDIT
@@ -35,6 +35,9 @@ static const char pci_vendor_0033[] = "Paradyne corp.";
 #endif
 static const char pci_vendor_003d[] = "Lockheed Martin-Marietta Corp";
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_0059[] = "Tiger Jet Network Inc. (Wrong ID)";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_0070[] = "Hauppauge computer works Inc.";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -250,12 +253,17 @@ static const char pci_device_1001_0017[] = "PROTO-3 PCI Prototyping board";
 static const char pci_device_1001_9100[] = "INI-9100/9100W SCSI Host";
 #endif
 static const char pci_vendor_1002[] = "ATI Technologies Inc";
+static const char pci_device_1002_4144[] = "Radeon R300 AD [Radeon 9500 Pro]";
+static const char pci_device_1002_4145[] = "Radeon R300 AE [Radeon 9500 Pro]";
+static const char pci_device_1002_4146[] = "Radeon R300 AF [Radeon 9500 Pro]";
+static const char pci_device_1002_4147[] = "Radeon R300 AG [FireGL Z1/X1]";
 static const char pci_device_1002_4158[] = "68800AX [Mach32]";
 static const char pci_device_1002_4242[] = "Radeon R200 BB [Radeon All in Wonder 8500DV]";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1002_4242_1002_02aa[] = "Radeon 8500 AIW DV Edition";
 #endif
 static const char pci_device_1002_4336[] = "Radeon Mobility U1";
+static const char pci_device_1002_4337[] = "Radeon IGP 340M";
 static const char pci_device_1002_4354[] = "215CT [Mach64 CT]";
 static const char pci_device_1002_4358[] = "210888CX [Mach64 CX]";
 static const char pci_device_1002_4554[] = "210888ET [Mach64 ET]";
@@ -373,6 +381,12 @@ static const char pci_subsys_1002_4752_1002_0008[] = "Rage XL";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1002_4752_1002_4752[] = "Rage XL";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_4752_1002_8008[] = "Rage XL";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_4752_1028_00d1[] = "PowerEdge 2550";
+#endif
 static const char pci_device_1002_4753[] = "Rage XC";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1002_4753_1002_4753[] = "Rage XC";
@@ -411,7 +425,32 @@ static const char pci_subsys_1002_475a_1002_475a[] = "Rage IIC AGP";
 static const char pci_device_1002_4964[] = "Radeon R250 Id [Radeon 9000]";
 static const char pci_device_1002_4965[] = "Radeon R250 Ie [Radeon 9000]";
 static const char pci_device_1002_4966[] = "Radeon R250 If [Radeon 9000]";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_4966_10f1_0002[] = "R250 If [Tachyon G9000 PRO]";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_4966_148c_2039[] = "R250 If [Radeon 9000 Pro Evil Commando]";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_4966_1509_9a00[] = "R250 If [Radeon 9000 AT009]";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_4966_1681_0040[] = "R250 If [3D prophet 9000]";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_4966_174b_7176[] = "R250 If [Sapphire Radeon 9000 Pro]";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_4966_174b_7192[] = "R250 If [Radeon 9000 Atlantis]";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_4966_17af_2005[] = "R250 If [Excalibur Radeon 9000 Pro]";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_4966_17af_2006[] = "R250 If [Excalibur Radeon 9000]";
+#endif
 static const char pci_device_1002_4967[] = "Radeon R250 Ig [Radeon 9000]";
+static const char pci_device_1002_496e[] = "Radeon R250 [Radeon 9000] (Secondary)";
 static const char pci_device_1002_4c42[] = "3D Rage LT Pro AGP-133";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1002_4c42_0e11_b0e8[] = "Rage 3D LT Pro";
@@ -453,8 +492,14 @@ static const char pci_subsys_1002_4c49_1002_4c49[] = "Rage LT Pro";
 #endif
 static const char pci_device_1002_4c4d[] = "Rage Mobility P/M AGP 2x";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_4c4d_0e11_b111[] = "Armada M700";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1002_4c4d_1002_0084[] = "Xpert 98 AGP 2X (Mobility)";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_4c4d_1014_0154[] = "ThinkPad A20m";
+#endif
 static const char pci_device_1002_4c4e[] = "Rage Mobility L AGP 2x";
 static const char pci_device_1002_4c50[] = "3D Rage LT Pro";
 #ifdef INIT_SUBSYS_INFO
@@ -466,9 +511,15 @@ static const char pci_device_1002_4c53[] = "Rage Mobility L";
 static const char pci_device_1002_4c54[] = "264LT [Mach64 LT]";
 static const char pci_device_1002_4c57[] = "Radeon Mobility M7 LW [Radeon Mobility 7500]";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_4c57_1014_0517[] = "ThinkPad T30";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1002_4c57_1028_00e6[] = "Radeon Mobility M7 LW (Dell Inspiron 8100)";
 #endif
-static const char pci_device_1002_4c58[] = "Radeon Mobility M7 LX [Radeon Mobility FireGL 7800]";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_4c57_144d_c006[] = "Radeon Mobility M7 LW in vpr Matrix 170B4";
+#endif
+static const char pci_device_1002_4c58[] = "Radeon RV200 LX [Mobility FireGL 7800 M7]";
 static const char pci_device_1002_4c59[] = "Radeon Mobility M6 LY";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1002_4c59_1014_0235[] = "ThinkPad A30p (2653-64G)";
@@ -480,16 +531,20 @@ static const char pci_subsys_1002_4c59_1014_0239[] = "ThinkPad X22/X23/X24";
 static const char pci_subsys_1002_4c59_104d_80e7[] = "VAIO PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP";
 #endif
 static const char pci_device_1002_4c5a[] = "Radeon Mobility M6 LZ";
-static const char pci_device_1002_4c64[] = "Radeon R250 Ld [Radeon Mobility 9000]";
-static const char pci_device_1002_4c65[] = "Radeon R250 Le [Radeon Mobility 9000]";
-static const char pci_device_1002_4c66[] = "Radeon R250 Lf [Radeon Mobility 9000]";
-static const char pci_device_1002_4c67[] = "Radeon R250 Lg [Radeon Mobility 9000]";
+static const char pci_device_1002_4c64[] = "Radeon R250 Ld [Radeon Mobility 9000 M9]";
+static const char pci_device_1002_4c65[] = "Radeon R250 Le [Radeon Mobility 9000 M9]";
+static const char pci_device_1002_4c66[] = "Radeon R250 Lf [Radeon Mobility 9000 M9]";
+static const char pci_device_1002_4c67[] = "Radeon R250 Lg [Radeon Mobility 9000 M9]";
 static const char pci_device_1002_4d46[] = "Rage Mobility M4 AGP";
 static const char pci_device_1002_4d4c[] = "Rage Mobility M4 AGP";
 static const char pci_device_1002_4e44[] = "Radeon R300 ND [Radeon 9700]";
 static const char pci_device_1002_4e45[] = "Radeon R300 NE [Radeon 9700]";
 static const char pci_device_1002_4e46[] = "Radeon R300 NF [Radeon 9700]";
-static const char pci_device_1002_4e47[] = "Radeon R300 NG [Radeon 9700]";
+static const char pci_device_1002_4e47[] = "Radeon R300 NG [FireGL X1]";
+static const char pci_device_1002_4e64[] = "Radeon R300 [Radeon 9700 Pro] (Secondary)";
+static const char pci_device_1002_4e65[] = "Radeon R300 [Radeon 9700] (Secondary)";
+static const char pci_device_1002_4e66[] = "Radeon R300 [Radeon 9700] (Secondary)";
+static const char pci_device_1002_4e67[] = "Radeon R300 [FireGL X1] (Secondary)";
 static const char pci_device_1002_5041[] = "Rage 128 PA/PRO";
 static const char pci_device_1002_5042[] = "Rage 128 PB/PRO AGP 2x";
 static const char pci_device_1002_5043[] = "Rage 128 PC/PRO AGP 4x";
@@ -550,7 +605,7 @@ static const char pci_device_1002_5055[] = "Rage 128 PU/PRO AGP 4x";
 static const char pci_device_1002_5056[] = "Rage 128 PV/PRO TMDS";
 static const char pci_device_1002_5057[] = "Rage 128 PW/PRO AGP 2x TMDS";
 static const char pci_device_1002_5058[] = "Rage 128 PX/PRO AGP 4x TMDS";
-static const char pci_device_1002_5144[] = "Radeon R100 QD [Radeon 64 DDR]";
+static const char pci_device_1002_5144[] = "Radeon R100 QD [Radeon 7200]";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1002_5144_1002_0008[] = "Radeon 7000/Radeon VE";
 #endif
@@ -595,10 +650,16 @@ static const char pci_device_1002_5146[] = "Radeon R100 QF";
 static const char pci_device_1002_5147[] = "Radeon R100 QG";
 static const char pci_device_1002_5148[] = "Radeon R200 QH [Radeon 8500]";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1002_5148_1002_0152[] = "FireGL 8800";
+static const char pci_subsys_1002_5148_1002_010a[] = "FireGL 8800 64Mb";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_5148_1002_0152[] = "FireGL 8800 128Mb";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_5148_1002_0162[] = "FireGL 8700 32Mb";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1002_5148_1002_0172[] = "FireGL 8700";
+static const char pci_subsys_1002_5148_1002_0172[] = "FireGL 8700 64Mb";
 #endif
 static const char pci_device_1002_5149[] = "Radeon R200 QI";
 static const char pci_device_1002_514a[] = "Radeon R200 QJ";
@@ -611,17 +672,41 @@ static const char pci_subsys_1002_514c_1002_003a[] = "Radeon R200 QL [Radeon 850
 static const char pci_subsys_1002_514c_1002_013a[] = "Radeon 8500";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_514c_148c_2026[] = "R200 QL [Radeon 8500 Evil Master II Multi Display Edition]";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1002_514c_174b_7149[] = "Radeon R200 QL [Sapphire Radeon 8500 LE]";
 #endif
+static const char pci_device_1002_514d[] = "Radeon R200 QM [Radeon 9100]";
+static const char pci_device_1002_514e[] = "Radeon R200 QN [Radeon 8500LE]";
+static const char pci_device_1002_514f[] = "Radeon R200 QO [Radeon 8500LE]";
 static const char pci_device_1002_5157[] = "Radeon RV200 QW [Radeon 7500]";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1002_5157_1002_013a[] = "Radeon 7500";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_5157_1458_4000[] = "RV200 QW [RADEON 7500 PRO MAYA AR]";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_5157_148c_2024[] = "RV200 QW [Radeon 7500LE Dual Display]";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_5157_148c_2025[] = "RV200 QW [Radeon 7500 Evil Master Multi Display Edition]";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_5157_148c_2036[] = "RV200 QW [Radeon 7500 PCI Dual Display]";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_5157_174b_7147[] = "RV200 QW [Sapphire Radeon 7500LE]";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1002_5157_174b_7161[] = "Radeon RV200 QW [Radeon 7500 LE]";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_5157_17af_0202[] = "RV200 QW [Excalibur Radeon 7500LE]";
+#endif
 static const char pci_device_1002_5158[] = "Radeon RV200 QX [Radeon 7500]";
-static const char pci_device_1002_5159[] = "Radeon VE QY";
+static const char pci_device_1002_5159[] = "Radeon RV100 QY [Radeon 7000/VE]";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1002_5159_1002_000a[] = "Radeon 7000/Radeon VE";
 #endif
@@ -641,13 +726,26 @@ static const char pci_subsys_1002_5159_1002_00ba[] = "Radeon 7000/Radeon VE";
 static const char pci_subsys_1002_5159_1002_013a[] = "Radeon 7000/Radeon VE";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1002_5159_174b_7112[] = "Radeon 7000 64M TVO";
+static const char pci_subsys_1002_5159_1458_4002[] = "RV100 QY [RADEON 7000 PRO MAYA AV Series]";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_5159_148c_2003[] = "RV100 QY [Radeon 7000 Multi-Display Edition]";
 #endif
-static const char pci_device_1002_515a[] = "Radeon VE QZ";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_5159_148c_2023[] = "RV100 QY [Radeon 7000 Evil Master Multi-Display]";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_5159_174b_7112[] = "RV100 QY [Sapphire Radeon VE 7000]";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_5159_1787_0202[] = "RV100 QY [Excalibur Radeon 7000]";
+#endif
+static const char pci_device_1002_515a[] = "Radeon RV100 QZ [Radeon 7000/VE]";
 static const char pci_device_1002_5168[] = "Radeon R200 Qh";
 static const char pci_device_1002_5169[] = "Radeon R200 Qi";
 static const char pci_device_1002_516a[] = "Radeon R200 Qj";
 static const char pci_device_1002_516b[] = "Radeon R200 Qk";
+static const char pci_device_1002_516c[] = "Radeon R200 Ql";
 static const char pci_device_1002_5245[] = "Rage 128 RE/SG";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1002_5245_1002_0008[] = "Xpert 128";
@@ -800,7 +898,10 @@ static const char pci_subsys_1004_0306_122d_1208[] = "DSP368 Audio Support Regis
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1004_0306_1483_5022[] = "XWave Thunder 3D Audio Support Registers";
 #endif
+static const char pci_device_1004_0307[] = "Thunderbird";
+static const char pci_device_1004_0308[] = "Thunderbird";
 static const char pci_device_1004_0702[] = "VAS96011 [Golden Gate II]";
+static const char pci_device_1004_0703[] = "Tollgate";
 #endif
 static const char pci_vendor_1005[] = "Avance Logic Inc. [ALI]";
 static const char pci_device_1005_2064[] = "ALG2032/2064";
@@ -934,10 +1035,10 @@ static const char pci_subsys_1011_0019_1014_0001[] = "10/100 EtherJet Cardbus";
 static const char pci_subsys_1011_0019_1025_0315[] = "ALN315 Fast Ethernet";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1011_0019_1033_800c[] = "PC-9821-CS01";
+static const char pci_subsys_1011_0019_1033_800c[] = "PC-9821-CS01 100BASE-TX Interface Card";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1011_0019_1033_800d[] = "PC-9821NR-B06";
+static const char pci_subsys_1011_0019_1033_800d[] = "PC-9821NR-B06 100BASE-TX Interface Card";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1011_0019_108d_0016[] = "Rapidfire 2327 10/100 Ethernet";
@@ -1009,6 +1110,9 @@ static const char pci_subsys_1011_0019_1374_0007[] = "Cardbus Ethernet Card 10/1
 static const char pci_subsys_1011_0019_1374_0008[] = "Cardbus Ethernet Card 10/100";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1011_0019_1385_2100[] = "FA510";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1011_0019_1395_0001[] = "10/100 Ethernet CardBus PC Card";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -1108,7 +1212,10 @@ static const char pci_device_1013_6003[] = "CS 4614/22/24 [CrystalClear SoundFus
 static const char pci_subsys_1013_6003_1013_4280[] = "Crystal SoundFusion PCI Audio Accelerator";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1013_6003_1681_0050[] = "Hercules Game Theater XP";
+static const char pci_subsys_1013_6003_1681_0050[] = "Game Theater XP";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1013_6003_1681_a011[] = "Fortissimo III 7.1";
 #endif
 static const char pci_device_1013_6004[] = "CS 4614/22/24 [CrystalClear SoundFusion Audio Accelerator]";
 static const char pci_device_1013_6005[] = "Crystal CS4281 PCI Audio";
@@ -1218,12 +1325,11 @@ static const char pci_subsys_1014_0096_1014_0099[] = "iSeries 2748 DASD IOA";
 static const char pci_device_1014_00a5[] = "ATM Controller (1410a500)";
 static const char pci_device_1014_00a6[] = "ATM 155MBPS MM Controller (1410a600)";
 static const char pci_device_1014_00b7[] = "256-bit Graphics Rasterizer [Fire GL1]";
-#ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1014_00b7_1902_00b8[] = "Fire GL1";
-#endif
 static const char pci_device_1014_00be[] = "ATM 622MBPS Controller (1410be00)";
+static const char pci_device_1014_00dc[] = "Advanced Systems Management Adapter (ASMA)";
 static const char pci_device_1014_00fc[] = "CPC710 Dual Bridge and Memory Controller (PCI-64)";
 static const char pci_device_1014_0105[] = "CPC710 Dual Bridge and Memory Controller (PCI-32)";
+static const char pci_device_1014_010f[] = "Remote Supervisor Adapter (RSA)";
 static const char pci_device_1014_0142[] = "Yotta Video Compositor Input";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1014_0142_1014_0143[] = "Yotta Input Controller (ytin)";
@@ -1256,6 +1362,7 @@ static const char pci_subsys_1014_01bd_1014_0258[] = "ServeRAID-5i";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1014_01bd_1014_0259[] = "ServeRAID-5i";
 #endif
+static const char pci_device_1014_0302[] = "XA-32 chipset [Summit]";
 static const char pci_device_1014_ffff[] = "MPIC-2 interrupt controller";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -1465,6 +1572,10 @@ static const char pci_subsys_1023_8520_0e11_b16e[] = "CyberBlade i1 AGP";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1023_8520_1023_8520[] = "CyberBlade i1 AGP";
 #endif
+static const char pci_device_1023_8620[] = "CyberBlade/i1";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1023_8620_1014_0502[] = "ThinkPad T30";
+#endif
 static const char pci_device_1023_8820[] = "CyberBlade XPAi1";
 static const char pci_device_1023_9320[] = "TGUI 9320";
 static const char pci_device_1023_9350[] = "GUI Accelerator";
@@ -1609,14 +1720,14 @@ static const char pci_device_1028_0007[] = "Remote Assistant Card 3";
 static const char pci_device_1028_0008[] = "PowerEdge Expandable RAID Controller 3/Di";
 static const char pci_device_1028_000a[] = "PowerEdge Expandable RAID Controller 3";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1028_000a_1027_0121[] = "PowerEdge Expandable RAID Controller 3/Di";
-#endif
-#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1028_000a_1028_0106[] = "PowerEdge Expandable RAID Controller 3/Di";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1028_000a_1028_011b[] = "PowerEdge Expandable RAID Controller 3/Di";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1028_000a_1028_0121[] = "PowerEdge Expandable RAID Controller 3/Di";
+#endif
 static const char pci_device_1028_000c[] = "Embedded Systems Management Device 4";
 static const char pci_device_1028_000e[] = "PowerEdge Expandable RAID Controller";
 static const char pci_device_1028_000f[] = "PowerEdge Expandable RAID Controller 4/Di";
@@ -1634,6 +1745,9 @@ static const char pci_device_102b_0518[] = "MGA-II [Athena]";
 static const char pci_device_102b_0519[] = "MGA 2064W [Millennium]";
 static const char pci_device_102b_051a[] = "MGA 1064SG [Mystique]";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_102b_051a_102b_0100[] = "MGA-1064SG Mystique";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_102b_051a_102b_1100[] = "MGA-1084SG Mystique";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -1904,19 +2018,16 @@ static const char pci_subsys_102b_0525_102b_9010[] = "Millennium G400 Dual Head"
 static const char pci_subsys_102b_0525_1458_0400[] = "GA-G400";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_102b_0525_1705_0001[] = "Digital First Millennium G450 32MB SGRAM";
-#endif
-#ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_102b_0525_1705_0002[] = "Digital First Millennium G450 16MB SGRAM";
+static const char pci_subsys_102b_0525_1705_0001[] = "Millennium G450 32MB SGRAM";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_102b_0525_1705_0003[] = "Digital First Millennium G450 32MB";
+static const char pci_subsys_102b_0525_1705_0002[] = "Millennium G450 16MB SGRAM";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_102b_0525_1705_0004[] = "Digital First Millennium G450 16MB";
+static const char pci_subsys_102b_0525_1705_0003[] = "Millennium G450 32MB";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_102b_0525_b16f_0e11[] = "MGA-G400 AGP";
+static const char pci_subsys_102b_0525_1705_0004[] = "Millennium G450 16MB";
 #endif
 static const char pci_device_102b_0527[] = "MGA Parhelia AGP";
 #ifdef INIT_SUBSYS_INFO
@@ -2016,14 +2127,17 @@ static const char pci_device_1033_0002[] = "PCI to VL98 Bridge";
 static const char pci_device_1033_0003[] = "ATM Controller";
 static const char pci_device_1033_0004[] = "R4000 PCI Bridge";
 static const char pci_device_1033_0005[] = "PCI to 486-like bus Bridge";
-static const char pci_device_1033_0006[] = "GUI Accelerator";
+static const char pci_device_1033_0006[] = "PC-9800 Graphic Accelerator";
 static const char pci_device_1033_0007[] = "PCI to UX-Bus Bridge";
-static const char pci_device_1033_0008[] = "GUI Accelerator";
-static const char pci_device_1033_0009[] = "GUI Accelerator for W98";
+static const char pci_device_1033_0008[] = "PC-9800 Graphic Accelerator";
+static const char pci_device_1033_0009[] = "PCI to PC9800 Core-Graph Bridge";
+static const char pci_device_1033_0016[] = "PCI to VL Bridge";
 static const char pci_device_1033_001a[] = "[Nile II]";
 static const char pci_device_1033_0021[] = "Vrc4373 [Nile I]";
 static const char pci_device_1033_0029[] = "PowerVR PCX1";
 static const char pci_device_1033_002a[] = "PowerVR 3D";
+static const char pci_device_1033_002c[] = "Star Alpha 2";
+static const char pci_device_1033_002d[] = "PCI to C-bus Bridge";
 static const char pci_device_1033_0035[] = "USB";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1033_0035_1179_0001[] = "USB";
@@ -2034,6 +2148,7 @@ static const char pci_subsys_1033_0035_12ee_7000[] = "Root Hub";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1033_0035_1799_0001[] = "Root Hub";
 #endif
+static const char pci_device_1033_003b[] = "PCI to C-bus Bridge";
 static const char pci_device_1033_003e[] = "NAPCCARD Cardbus Controller";
 static const char pci_device_1033_0046[] = "PowerVR PCX2 [midas]";
 static const char pci_device_1033_005a[] = "Vrc5074 [Nile 4]";
@@ -2097,7 +2212,7 @@ static const char pci_vendor_1037[] = "Hitachi Micro Systems";
 static const char pci_vendor_1038[] = "AMP, Inc";
 #endif
 static const char pci_vendor_1039[] = "Silicon Integrated Systems [SiS]";
-static const char pci_device_1039_0001[] = "5591/5592 AGP";
+static const char pci_device_1039_0001[] = "SiS 530 Virtual PCI-to-PCI bridge (AGP)";
 static const char pci_device_1039_0002[] = "SG86C202";
 static const char pci_device_1039_0006[] = "85C501/2/3";
 static const char pci_device_1039_0008[] = "85C503/5513";
@@ -2109,10 +2224,14 @@ static const char pci_subsys_1039_0200_1039_0000[] = "SiS5597 SVGA (Shared RAM)"
 #endif
 static const char pci_device_1039_0204[] = "82C204";
 static const char pci_device_1039_0205[] = "SG86C205";
-static const char pci_device_1039_0300[] = "300/200";
+static const char pci_device_1039_0300[] = "SiS300/305 PCI/AGP VGA Display Adapter";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1039_0300_107d_2720[] = "Leadtek WinFast VR300";
 #endif
+static const char pci_device_1039_0310[] = "SiS315H PCI/AGP VGA Display Adapter";
+static const char pci_device_1039_0315[] = "SiS315 PCI/AGP VGA Display Adapter";
+static const char pci_device_1039_0325[] = "SiS315PRO PCI/AGP VGA Display Adapter";
+static const char pci_device_1039_0330[] = "SiS330 [Xabre] PCI/AGP VGA Display Adapter";
 static const char pci_device_1039_0406[] = "85C501/2";
 static const char pci_device_1039_0496[] = "85C496";
 static const char pci_device_1039_0530[] = "530 Host";
@@ -2141,10 +2260,14 @@ static const char pci_device_1039_0962[] = "SiS962 [MuTIOL Media IO]";
 static const char pci_device_1039_3602[] = "83C602";
 static const char pci_device_1039_5107[] = "5107";
 static const char pci_device_1039_5300[] = "SiS540 PCI Display Adapter";
+static const char pci_device_1039_5315[] = "SiS550 AGP/VGA VGA Display Adapter";
 static const char pci_device_1039_5401[] = "486 PCI Chipset";
 static const char pci_device_1039_5511[] = "5511/5512";
 static const char pci_device_1039_5513[] = "5513 [IDE]";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1039_5513_1019_0970[] = "P6STP-FL motherboard";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1039_5513_1039_5513[] = "SiS5513 EIDE Controller (A,B step)";
 #endif
 static const char pci_device_1039_5517[] = "5517";
@@ -2159,10 +2282,14 @@ static const char pci_device_1039_6204[] = "Video decoder & MPEG interface";
 static const char pci_device_1039_6205[] = "VGA Controller";
 static const char pci_device_1039_6236[] = "6236 3D-AGP";
 static const char pci_device_1039_6300[] = "SiS630 GUI Accelerator+3D";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1039_6300_1019_0970[] = "P6STP-FL motherboard";
+#endif
 static const char pci_device_1039_6306[] = "SiS530 3D PCI/AGP";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1039_6306_1039_6306[] = "SiS530,620 GUI Accelerator+3D";
 #endif
+static const char pci_device_1039_6325[] = "SiS650/651/M650/740 PCI/AGP VGA Display Adapter";
 static const char pci_device_1039_6326[] = "86C326 5598/6326";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1039_6326_1039_6326[] = "SiS6326 GUI Accelerator";
@@ -2182,13 +2309,17 @@ static const char pci_subsys_1039_6326_1092_4920[] = "SpeedStar A70";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1039_6326_1569_6326[] = "SiS6326 GUI Accelerator";
 #endif
-static const char pci_device_1039_7001[] = "7001";
+static const char pci_device_1039_7001[] = "SiS7001 USB Controller";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1039_7001_1039_7000[] = "Onboard USB Controller";
 #endif
+static const char pci_device_1039_7002[] = "SiS7002 USB 2.0";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1039_7002_1509_7002[] = "Onboard USB Controller";
+#endif
 static const char pci_device_1039_7007[] = "FireWire Controller";
 static const char pci_device_1039_7012[] = "SiS7012 PCI Audio Accelerator";
-static const char pci_device_1039_7013[] = "56k Winmodem (Smart Link HAMR5600 compatible)";
+static const char pci_device_1039_7013[] = "Intel 537 [56k Winmodem]";
 static const char pci_device_1039_7016[] = "SiS7016 10/100 Ethernet Adapter";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1039_7016_1039_7016[] = "SiS7016 10/100 Ethernet Adapter";
@@ -2266,7 +2397,6 @@ static const char pci_vendor_103a[] = "Seiko Epson Corporation";
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_103b[] = "Tatung Co. of America";
 #endif
-#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_103c[] = "Hewlett-Packard Company";
 static const char pci_device_103c_1005[] = "A4977A Visualize EG";
 static const char pci_device_103c_1006[] = "Visualize FX6";
@@ -2344,7 +2474,6 @@ static const char pci_device_103c_122e[] = "zx1 Local Bus Adapter";
 static const char pci_device_103c_1290[] = "Auxiliary Diva Serial Port";
 static const char pci_device_103c_2910[] = "E2910A PCIBus Exerciser";
 static const char pci_device_103c_2925[] = "E2925A 32 Bit, 33 MHzPCI Exerciser & Analyzer";
-#endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_103e[] = "Solliday Engineering";
 #endif
@@ -2368,6 +2497,7 @@ static const char pci_device_1042_3020[] = "Samurai_IDE";
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1043[] = "Asustek Computer, Inc.";
 static const char pci_device_1043_0675[] = "ISDNLink P-IN100-ST-D";
+static const char pci_device_1043_4021[] = "v7100 Combo Deluxe [GeForce2 MX + TV tuner]";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1044[] = "Distributed Processing Technology";
@@ -2525,6 +2655,8 @@ static const char pci_vendor_1049[] = "Fountain Technologies, Inc.";
 static const char pci_vendor_104a[] = "SGS Thomson Microelectronics";
 static const char pci_device_104a_0008[] = "STG 2000X";
 static const char pci_device_104a_0009[] = "STG 1764X";
+static const char pci_device_104a_0010[] = "STG4000 [3D Prophet Kyro Series]";
+static const char pci_device_104a_0210[] = "STPC Atlas ISA Bridge";
 static const char pci_device_104a_0981[] = "DEC-Tulip compatible 10/100 Ethernet";
 static const char pci_device_104a_1746[] = "STG 1764X";
 static const char pci_device_104a_2774[] = "DEC-Tulip compatible 10/100 Ethernet";
@@ -2539,6 +2671,7 @@ static const char pci_vendor_104c[] = "Texas Instruments";
 static const char pci_device_104c_0500[] = "100 MBit LAN Controller";
 static const char pci_device_104c_0508[] = "TMS380C2X Compressor Interface";
 static const char pci_device_104c_1000[] = "Eagle i/f AS";
+static const char pci_device_104c_104c[] = "PCI1510 PC card Cardbus Controller";
 static const char pci_device_104c_3d04[] = "TVP4010 [Permedia]";
 static const char pci_device_104c_3d07[] = "TVP4020 [Permedia 2]";
 #ifdef INIT_SUBSYS_INFO
@@ -2642,7 +2775,7 @@ static const char pci_device_104c_8027[] = "PCI4451 IEEE-1394 Controller";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_104c_8027_1028_00e6[] = "PCI4451 IEEE-1394 Controller (Dell Inspiron 8100)";
 #endif
-static const char pci_device_104c_8400[] = "USR2210 22Mbps Wireless PC Card";
+static const char pci_device_104c_8400[] = "ACX 100 22Mbps Wireless Interface";
 static const char pci_device_104c_a001[] = "TDC1570";
 static const char pci_device_104c_a100[] = "TDC1561";
 static const char pci_device_104c_a102[] = "TNETA1575 HyperSAR Plus w/PCI Host i/f & UTOPIA i/f";
@@ -2658,6 +2791,9 @@ static const char pci_device_104c_ac18[] = "PCI1260";
 static const char pci_device_104c_ac19[] = "PCI1221";
 static const char pci_device_104c_ac1a[] = "PCI1210";
 static const char pci_device_104c_ac1b[] = "PCI1450";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_104c_ac1b_0e11_b113[] = "Armada M700";
+#endif
 static const char pci_device_104c_ac1c[] = "PCI1225";
 static const char pci_device_104c_ac1d[] = "PCI1251A";
 static const char pci_device_104c_ac1e[] = "PCI1211";
@@ -2688,6 +2824,10 @@ static const char pci_subsys_104c_ac51_e4bf_1000[] = "CP2-2-HIPHOP";
 static const char pci_device_104c_ac52[] = "PCI1451 PC card Cardbus Controller";
 static const char pci_device_104c_ac53[] = "PCI1421 PC card Cardbus Controller";
 static const char pci_device_104c_ac55[] = "PCI1250 PC card Cardbus Controller";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_104c_ac55_1014_0512[] = "ThinkPad T30";
+#endif
+static const char pci_device_104c_ac56[] = "PCI1510 PC card Cardbus Controller";
 static const char pci_device_104c_ac60[] = "PCI2040 PCI to DSP Bridge Controller";
 static const char pci_device_104c_fe00[] = "FireWire Host Controller";
 static const char pci_device_104c_fe03[] = "12C01A FireWire Host Controller";
@@ -2720,6 +2860,7 @@ static const char pci_subsys_1050_0840_1050_0840[] = "W89C840 Ethernet Adapter";
 #endif
 static const char pci_device_1050_0940[] = "W89C940";
 static const char pci_device_1050_5a5a[] = "W89C940F";
+static const char pci_device_1050_6692[] = "W6692";
 static const char pci_device_1050_9970[] = "W9970CF";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -2832,6 +2973,7 @@ static const char pci_device_105a_0d38[] = "20263";
 static const char pci_subsys_105a_0d38_105a_4d39[] = "Fasttrak66";
 #endif
 static const char pci_device_105a_1275[] = "20275";
+static const char pci_device_105a_3376[] = "PDC20376";
 static const char pci_device_105a_4d30[] = "20267";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_105a_4d30_105a_4d33[] = "Ultra100";
@@ -2866,8 +3008,9 @@ static const char pci_device_105a_5300[] = "DC5300";
 static const char pci_device_105a_6268[] = "20268R";
 static const char pci_device_105a_6269[] = "PDC20271";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_105a_6269_105a_6269[] = "Fasttrack tx2";
+static const char pci_subsys_105a_6269_105a_6269[] = "FastTrak TX2/TX2000";
 #endif
+static const char pci_device_105a_6621[] = "PDC20621 [SX4000] 4 Channel IDE RAID Controller";
 static const char pci_device_105a_7275[] = "PDC20277";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -3423,6 +3566,7 @@ static const char pci_subsys_1095_0670_1095_0670[] = "USB0670";
 #endif
 static const char pci_device_1095_0673[] = "USB0673";
 static const char pci_device_1095_0680[] = "PCI0680";
+static const char pci_device_1095_3112[] = "Silicon Image SiI 3112 SATARaid Controller";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1096[] = "Alacron";
@@ -3466,12 +3610,18 @@ static const char pci_subsys_109e_036c_13e9_0070[] = "Win/TV (Video Section)";
 #endif
 static const char pci_device_109e_036e[] = "Bt878 Video Capture";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_109e_036e_0070_13eb[] = "WinTV/GO";
+static const char pci_subsys_109e_036e_0070_13eb[] = "WinTV Series";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_109e_036e_0070_ff01[] = "Viewcast Osprey 200";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_109e_036e_107d_6606[] = "WinFast TV 2000";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_109e_036e_11bd_0012[] = "PCTV pro (TV + FM stereo receiver)";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_109e_036e_11bd_001c[] = "PCTV Sat (DBC receiver)";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -3513,6 +3663,9 @@ static const char pci_subsys_109e_036e_1851_1851[] = "FlyVideo II";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_109e_036e_1852_1852[] = "FlyVideo'98 - Video (with FM Tuner)";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_109e_036e_bd11_1200[] = "PCTV pro (TV + FM stereo receiver)";
+#endif
 static const char pci_device_109e_036f[] = "Bt879 Video Capture";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_109e_036f_127a_0044[] = "Bt879 Video Capture NTSC";
@@ -3613,7 +3766,7 @@ static const char pci_subsys_109e_0370_1852_1852[] = "FlyVideo'98 (with FM Tuner
 #endif
 static const char pci_device_109e_0878[] = "Bt878 Audio Capture";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_109e_0878_0070_13eb[] = "WinTV/GO";
+static const char pci_subsys_109e_0878_0070_13eb[] = "WinTV Series";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_109e_0878_0070_ff01[] = "Viewcast Osprey 200";
@@ -3625,6 +3778,9 @@ static const char pci_subsys_109e_0878_1002_0001[] = "TV-Wonder";
 static const char pci_subsys_109e_0878_1002_0003[] = "TV-Wonder/VE";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_109e_0878_11bd_0012[] = "PCTV pro (TV + FM stereo receiver, audio section)";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_109e_0878_11bd_001c[] = "PCTV Sat (DBC receiver)";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -3660,6 +3816,9 @@ static const char pci_subsys_109e_0878_14f1_0003[] = "Bt878 Video Capture (Audio
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_109e_0878_14f1_0048[] = "Bt878 Video Capture (Audio Section)";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_109e_0878_bd11_1200[] = "PCTV pro (TV + FM stereo receiver, audio section)";
+#endif
 static const char pci_device_109e_0879[] = "Bt879 Audio Capture";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_109e_0879_127a_0044[] = "Bt879 Video Capture (Audio Section)";
@@ -3766,7 +3925,8 @@ static const char pci_vendor_10a3[] = "Everex Systems Inc";
 static const char pci_vendor_10a4[] = "Globe Manufacturing Sales";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
-static const char pci_vendor_10a5[] = "Racal Interlan";
+static const char pci_vendor_10a5[] = "Smart Link Ltd.";
+static const char pci_device_10a5_5449[] = "SmartPCI561 modem";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_10a6[] = "Informtech Industrial Ltd.";
@@ -3871,9 +4031,15 @@ static const char pci_subsys_10b5_9030_15ed_1003[] = "MCCS 16-port Serial Hot Sw
 static const char pci_device_10b5_9036[] = "9036";
 static const char pci_device_10b5_9050[] = "PCI <-> IOBus Bridge";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10b5_9050_10b5_2036[] = "SatPak GPS";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10b5_9050_10b5_2273[] = "SH-ARC SoHard ARCnet card";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10b5_9050_10b5_9050[] = "MP9050";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10b5_9050_1522_0001[] = "RockForce 4 Port V.90 Data/Fax/Voice Modem";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -3904,6 +4070,9 @@ static const char pci_subsys_10b5_9050_15ed_1002[] = "Macrolink MCCS 8-port Seri
 static const char pci_subsys_10b5_9050_15ed_1003[] = "Macrolink MCCS 16-port Serial Hot Swap";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10b5_9050_5654_5634[] = "OpenLine4 Telephony Card";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10b5_9050_d531_c002[] = "PCIntelliCAN 2xSJA1000 CAN bus";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -4225,6 +4394,8 @@ static const char pci_subsys_10b7_9200_10b7_1000[] = "3C905C-TX Fast Etherlink f
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10b7_9200_10b7_7000[] = "10/100 Mini PCI Ethernet Adapter";
 #endif
+static const char pci_device_10b7_9201[] = "3C920B-EMB Integrated Fast Ethernet Controller";
+static const char pci_device_10b7_9300[] = "3CSOHO100B-TX  [910-A01]";
 static const char pci_device_10b7_9800[] = "3c980-TX [Fast Etherlink XL Server Adapter]";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10b7_9800_10b7_9800[] = "3c980-TX Fast Etherlink XL Server Adapter";
@@ -4239,6 +4410,9 @@ static const char pci_subsys_10b7_9805_10b7_1202[] = "3c982-TXM 10/100baseTX Dua
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10b7_9805_10b7_9805[] = "3c980 10/100baseTX NIC [Python-T]";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10b7_9805_10f1_2462[] = "Thunder K7 S2462";
+#endif
 static const char pci_device_10b7_9900[] = "3C990-TX [Typhoon]";
 static const char pci_device_10b7_9902[] = "3CR990-TX-95 [Typhoon 56-bit]";
 static const char pci_device_10b7_9903[] = "3CR990-TX-97 [Typhoon 168-bit]";
@@ -4317,7 +4491,7 @@ static const char pci_device_10b8_1001[] = "FDC 37C922";
 static const char pci_device_10b8_a011[] = "83C170QF";
 static const char pci_device_10b8_b106[] = "SMC34C90";
 #endif
-static const char pci_vendor_10b9[] = "Acer Laboratories Inc. [ALi]";
+static const char pci_vendor_10b9[] = "ALi Corporation";
 static const char pci_device_10b9_0111[] = "C-Media CMI8738/C3DX Audio Device (OEM)";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10b9_0111_10b9_0111[] = "C-Media CMI8738/C3DX Audio Device (OEM)";
@@ -4349,6 +4523,7 @@ static const char pci_device_10b9_1541[] = "M1541";
 static const char pci_subsys_10b9_1541_10b9_1541[] = "ALI M1541 Aladdin V/V+ AGP System Controller";
 #endif
 static const char pci_device_10b9_1543[] = "M1543";
+static const char pci_device_10b9_1563[] = "M1563 HyperTransport South Bridge";
 static const char pci_device_10b9_1621[] = "M1621";
 static const char pci_device_10b9_1631[] = "ALI M1631 PCI North Bridge Aladdin Pro III";
 static const char pci_device_10b9_1632[] = "M1632M Northbridge+Trident";
@@ -4357,7 +4532,9 @@ static const char pci_device_10b9_1644[] = "M1644/M1644T Northbridge+Trident";
 static const char pci_device_10b9_1646[] = "M1646 Northbridge+Trident";
 static const char pci_device_10b9_1647[] = "M1647 Northbridge [MAGiK 1 / MobileMAGiK 1]";
 static const char pci_device_10b9_1651[] = "M1651/M1651T Northbridge [Aladdin-Pro 5/5M,Aladdin-Pro 5T/5TM]";
-static const char pci_device_10b9_1671[] = "M1671 Northbridge [Aladdin-P4]";
+static const char pci_device_10b9_1671[] = "M1671 Super P4 Northbridge [AGP4X,PCI and SDR/DDR]";
+static const char pci_device_10b9_1681[] = "M1681 P4 Northbridge [AGP8X,HyperTransport and SDR/DDR]";
+static const char pci_device_10b9_1687[] = "M1687 K8 Northbridge [AGP8X and HyperTransport]";
 static const char pci_device_10b9_3141[] = "M3141";
 static const char pci_device_10b9_3143[] = "M3143";
 static const char pci_device_10b9_3145[] = "M3145";
@@ -4380,14 +4557,19 @@ static const char pci_device_10b9_5237[] = "USB 1.1 Controller";
 static const char pci_device_10b9_5239[] = "USB 2.0 Controller";
 static const char pci_device_10b9_5243[] = "M1541 PCI to AGP Controller";
 static const char pci_device_10b9_5247[] = "PCI to AGP Controller";
+static const char pci_device_10b9_5249[] = "M5249 HTT to PCI Bridge";
 static const char pci_device_10b9_5251[] = "M5251 P1394 OHCI 1.0 Controller";
 static const char pci_device_10b9_5253[] = "M5253 P1394 OHCI 1.1 Controller";
 static const char pci_device_10b9_5261[] = "M5261 Ethernet Controller";
 static const char pci_device_10b9_5451[] = "M5451 PCI AC-Link Controller Audio Device";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10b9_5451_1014_0506[] = "ThinkPad R30";
+#endif
 static const char pci_device_10b9_5453[] = "M5453 PCI AC-Link Controller Modem Device";
 static const char pci_device_10b9_5455[] = "M5455 PCI AC-Link Controller Audio Device";
-static const char pci_device_10b9_5457[] = "M5457 AC-Link Modem Interface Controller";
-static const char pci_device_10b9_5459[] = "SmartPCI561 56K Modem";
+static const char pci_device_10b9_5457[] = "Intel 537 [M5457 AC-Link Modem]";
+static const char pci_device_10b9_5459[] = "SmartLink SmartPCI561 56K Modem";
+static const char pci_device_10b9_545a[] = "SmartLink SmartPCI563 56K Modem";
 static const char pci_device_10b9_5471[] = "M5471 Memory Stick Controller";
 static const char pci_device_10b9_5473[] = "M5473 SD-MMC Controller";
 static const char pci_device_10b9_7101[] = "M7101 PMU";
@@ -4440,7 +4622,7 @@ static const char pci_vendor_10c6[] = "Rambus Inc.";
 static const char pci_vendor_10c7[] = "Media Vision";
 #endif
 static const char pci_vendor_10c8[] = "Neomagic Corporation";
-static const char pci_device_10c8_0001[] = "NM2070 [MagicGraph NM2070]";
+static const char pci_device_10c8_0001[] = "NM2070 [MagicGraph 128]";
 static const char pci_device_10c8_0002[] = "NM2090 [MagicGraph 128V]";
 static const char pci_device_10c8_0003[] = "NM2093 [MagicGraph 128ZV]";
 static const char pci_device_10c8_0004[] = "NM2160 [MagicGraph 128XD]";
@@ -4498,15 +4680,18 @@ static const char pci_subsys_10c8_0004_10f7_830d[] = "MagicGraph 128XD";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10c8_0004_10f7_8312[] = "MagicGraph 128XD";
 #endif
-static const char pci_device_10c8_0005[] = "[MagicMedia 256AV]";
+static const char pci_device_10c8_0005[] = "NM2200 [MagicGraph 256AV]";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10c8_0005_1014_00dd[] = "ThinkPad 570";
+#endif
 static const char pci_device_10c8_0006[] = "NM2360 [MagicMedia 256ZX]";
 static const char pci_device_10c8_0016[] = "NM2380 [MagicMedia 256XL+]";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10c8_0016_10c8_0016[] = "MagicMedia 256XL+";
 #endif
-static const char pci_device_10c8_0025[] = "[MagicMedia 256AV+]";
-static const char pci_device_10c8_0083[] = "[MagicGraph 128ZV Plus]";
-static const char pci_device_10c8_8005[] = "[MagicMedia 256AV Audio]";
+static const char pci_device_10c8_0025[] = "NM2230 [MagicGraph 256AV+]";
+static const char pci_device_10c8_0083[] = "NM2093 [MagicGraph 128ZV+]";
+static const char pci_device_10c8_8005[] = "NM2200 [MagicMedia 256AV Audio]";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10c8_8005_0e11_b0d1[] = "MagicMedia 256AV Audio Device on Discovery";
 #endif
@@ -4541,7 +4726,7 @@ static const char pci_subsys_10c8_8005_110a_8005[] = "MagicMedia 256AV Audio Dev
 static const char pci_subsys_10c8_8005_14c0_0004[] = "MagicMedia 256AV Audio Device";
 #endif
 static const char pci_device_10c8_8006[] = "NM2360 [MagicMedia 256ZX Audio]";
-static const char pci_device_10c8_8016[] = "NM2360 [MagicMedia 256ZX Audio]";
+static const char pci_device_10c8_8016[] = "NM2380 [MagicMedia 256XL+ Audio]";
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_10c9[] = "Dataexpert Corporation";
 #endif
@@ -4632,7 +4817,7 @@ static const char pci_vendor_10de[] = "nVidia Corporation";
 static const char pci_device_10de_0008[] = "NV1 [EDGE 3D]";
 static const char pci_device_10de_0009[] = "NV1 [EDGE 3D]";
 static const char pci_device_10de_0010[] = "NV2 [Mutara V08]";
-static const char pci_device_10de_0020[] = "NV4 [Riva TnT]";
+static const char pci_device_10de_0020[] = "NV4 [RIVA TNT]";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_0020_1043_0200[] = "V3400 TNT";
 #endif
@@ -4696,7 +4881,7 @@ static const char pci_subsys_10de_0020_1102_1015[] = "Graphics Blaster CT6710";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_0020_1102_1016[] = "Graphics Blaster RIVA TNT";
 #endif
-static const char pci_device_10de_0028[] = "NV5 [Riva TnT2]";
+static const char pci_device_10de_0028[] = "NV5 [RIVA TNT2/TNT2 Pro]";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_0028_1043_0200[] = "AGP-V3800 SGRAM";
 #endif
@@ -4742,7 +4927,7 @@ static const char pci_subsys_10de_0028_1102_1026[] = "3D Blaster RIVA TNT2 Digit
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_0028_14af_5810[] = "Maxi Gamer Xentor";
 #endif
-static const char pci_device_10de_0029[] = "NV5 [Riva TnT2 Ultra]";
+static const char pci_device_10de_0029[] = "NV5 [RIVA TNT2 Ultra]";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_0029_1043_0200[] = "AGP-V3800 Deluxe";
 #endif
@@ -4766,7 +4951,7 @@ static const char pci_subsys_10de_0029_14af_5820[] = "Maxi Gamer Xentor 32";
 #endif
 static const char pci_device_10de_002a[] = "NV5 [Riva TnT2]";
 static const char pci_device_10de_002b[] = "NV5 [Riva TnT2]";
-static const char pci_device_10de_002c[] = "NV6 [Vanta]";
+static const char pci_device_10de_002c[] = "NV6 [Vanta/Vanta LT]";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_002c_1043_0200[] = "AGP-V3800 Combat SDRAM";
 #endif
@@ -4785,7 +4970,7 @@ static const char pci_subsys_10de_002c_1102_1034[] = "CT6894 VANTA 16MB";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_002c_14af_5008[] = "Maxi Gamer Phoenix 2";
 #endif
-static const char pci_device_10de_002d[] = "RIVA TNT2 Model 64";
+static const char pci_device_10de_002d[] = "NV5M64 [RIVA TNT2 Model 64/Model 64 Pro]";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_002d_1043_0200[] = "AGP-V3800M";
 #endif
@@ -4793,6 +4978,12 @@ static const char pci_subsys_10de_002d_1043_0200[] = "AGP-V3800M";
 static const char pci_subsys_10de_002d_1043_0201[] = "AGP-V3800M";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_002d_1048_0c3a[] = "Erazor III LT";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_002d_10de_001e[] = "M64 AGP4x";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_002d_1102_1023[] = "CT6892 RIVA TNT2 Value";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -4809,7 +5000,25 @@ static const char pci_subsys_10de_002d_1554_1041[] = "PixelView RIVA TNT2 M64 32
 #endif
 static const char pci_device_10de_002e[] = "NV6 [Vanta]";
 static const char pci_device_10de_002f[] = "NV6 [Vanta]";
-static const char pci_device_10de_00a0[] = "NV5 [Riva TNT2]";
+static const char pci_device_10de_0060[] = "nForce2 ISA Bridge";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_0060_1043_80ad[] = "A7N8X Mainboard";
+#endif
+static const char pci_device_10de_0064[] = "nForce2 SMBus (MCP)";
+static const char pci_device_10de_0065[] = "nForce2 IDE";
+static const char pci_device_10de_0066[] = "nForce2 Ethernet Controller";
+static const char pci_device_10de_0067[] = "nForce2 USB Controller";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_0067_1043_0c11[] = "A7N8X Mainboard";
+#endif
+static const char pci_device_10de_0068[] = "nForce2 USB Controller";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_0068_1043_0c11[] = "A7N8X Mainboard";
+#endif
+static const char pci_device_10de_006a[] = "nForce2 AC97 Audio Controler (MCP)";
+static const char pci_device_10de_006b[] = "nForce MultiMedia audio [Via VT82C686B]";
+static const char pci_device_10de_006e[] = "nForce2 FireWire (IEEE 1394) Controller";
+static const char pci_device_10de_00a0[] = "NV5 [Aladdin TNT2]";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_00a0_14af_5810[] = "Maxi Gamer Xentor";
 #endif
@@ -4832,7 +5041,7 @@ static const char pci_subsys_10de_0100_1102_102d[] = "CT6941 GeForce 256";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_0100_14af_5022[] = "3D Prophet SE";
 #endif
-static const char pci_device_10de_0101[] = "NV10 [GeForce 256 DDR]";
+static const char pci_device_10de_0101[] = "NV10DDR [GeForce 256 DDR]";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_0101_1043_0202[] = "AGP-V6800 DDR";
 #endif
@@ -4848,8 +5057,8 @@ static const char pci_subsys_10de_0101_1102_102e[] = "CT6971 GeForce 256 DDR";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_0101_14af_5021[] = "3D Prophet DDR-DVI";
 #endif
-static const char pci_device_10de_0103[] = "NV10 [Quadro]";
-static const char pci_device_10de_0110[] = "NV11 [GeForce2 MX]";
+static const char pci_device_10de_0103[] = "NV10GL [Quadro]";
+static const char pci_device_10de_0110[] = "NV11 [GeForce2 MX/MX 400]";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_0110_1043_4015[] = "AGP-V7100 Pro";
 #endif
@@ -4857,15 +5066,18 @@ static const char pci_subsys_10de_0110_1043_4015[] = "AGP-V7100 Pro";
 static const char pci_subsys_10de_0110_1043_4031[] = "V7100 Pro with TV output";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_0110_1462_8817[] = "MSI GeForce2 MX400 Pro32S [MS-8817]";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_0110_14af_7102[] = "3D Prophet II MX";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_0110_14af_7103[] = "3D Prophet II MX Dual-Display";
 #endif
-static const char pci_device_10de_0111[] = "NV11 [GeForce2 MX DDR]";
+static const char pci_device_10de_0111[] = "NV11DDR [GeForce2 MX 100 DDR/200 DDR]";
 static const char pci_device_10de_0112[] = "NV11 [GeForce2 Go]";
-static const char pci_device_10de_0113[] = "NV11 [GeForce2 MXR]";
-static const char pci_device_10de_0150[] = "NV15 [GeForce2 GTS]";
+static const char pci_device_10de_0113[] = "NV11GL [Quadro2 MXR/EX]";
+static const char pci_device_10de_0150[] = "NV15 [GeForce2 GTS/Pro]";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_0150_1043_4016[] = "V7700 AGP Video Card";
 #endif
@@ -4875,30 +5087,42 @@ static const char pci_subsys_10de_0150_107d_2840[] = "WinFast GeForce2 GTS with
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_0150_1462_8831[] = "Creative GeForce2 Pro";
 #endif
-static const char pci_device_10de_0151[] = "NV15 [GeForce2 Ti]";
+static const char pci_device_10de_0151[] = "NV15DDR [GeForce2 Ti]";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_0151_1043_405f[] = "V7700Ti";
 #endif
-static const char pci_device_10de_0152[] = "NV15 [GeForce2 Ultra, Bladerunner]";
+static const char pci_device_10de_0152[] = "NV15BR [GeForce2 Ultra, Bladerunner]";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_0152_1048_0c56[] = "GLADIAC Ultra";
 #endif
-static const char pci_device_10de_0153[] = "NV15 [Quadro2 Pro]";
-static const char pci_device_10de_0170[] = "NV17 [GeForce4 MX460]";
-static const char pci_device_10de_0171[] = "NV17 [GeForce4 MX440]";
+static const char pci_device_10de_0153[] = "NV15GL [Quadro2 Pro]";
+static const char pci_device_10de_0170[] = "NV17 [GeForce4 MX 460]";
+static const char pci_device_10de_0171[] = "NV17 [GeForce4 MX 440]";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_0171_1462_8661[] = "G4MX440-VTP";
 #endif
-static const char pci_device_10de_0172[] = "NV17 [GeForce4 MX420]";
-static const char pci_device_10de_0173[] = "NV1x";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_0171_1462_8730[] = "MX440SES-T (MS-8873)";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_0171_147b_8f00[] = "Abit Siluro GeForce4MX440";
+#endif
+static const char pci_device_10de_0172[] = "NV17 [GeForce4 MX 420]";
+static const char pci_device_10de_0173[] = "NV17 [GeForce4 MX 440-SE]";
 static const char pci_device_10de_0174[] = "NV17 [GeForce4 440 Go]";
 static const char pci_device_10de_0175[] = "NV17 [GeForce4 420 Go]";
 static const char pci_device_10de_0176[] = "NV17 [GeForce4 420 Go 32M]";
-static const char pci_device_10de_0178[] = "Quadro4 500XGL";
+static const char pci_device_10de_0178[] = "NV17GL [Quadro4 550 XGL]";
 static const char pci_device_10de_0179[] = "NV17 [GeForce4 440 Go 64M]";
-static const char pci_device_10de_017a[] = "Quadro4 200/400NVS";
-static const char pci_device_10de_017b[] = "Quadro4 550XGL";
-static const char pci_device_10de_017c[] = "Quadro4 550 GoGL";
+static const char pci_device_10de_017a[] = "NV17GL [Quadro4 200/400 NVS]";
+static const char pci_device_10de_017b[] = "NV17GL [Quadro4 550 XGL]";
+static const char pci_device_10de_017c[] = "NV17GL [Quadro4 550 GoGL]";
+static const char pci_device_10de_0181[] = "NV18 [GeForce4 MX 440 AGP 8x]";
+static const char pci_device_10de_0182[] = "NV18 [GeForce4 MX 440SE AGP 8x]";
+static const char pci_device_10de_0183[] = "NV18 [GeForce4 MX 420 AGP 8x]";
+static const char pci_device_10de_0188[] = "NV18GL [Quadro4 580 XGL]";
+static const char pci_device_10de_018a[] = "NV18GL [Quadro4 NVS]";
+static const char pci_device_10de_018b[] = "NV18GL [Quadro4 380 XGL]";
 static const char pci_device_10de_01a0[] = "NV15 [GeForce2 - nForce GPU]";
 static const char pci_device_10de_01a4[] = "nForce CPU bridge";
 static const char pci_device_10de_01ab[] = "nForce 420 Memory Controller (DDR)";
@@ -4910,26 +5134,47 @@ static const char pci_device_10de_01b4[] = "nForce PCI System Management";
 static const char pci_device_10de_01b7[] = "nForce AGP to PCI Bridge";
 static const char pci_device_10de_01b8[] = "nForce PCI-to-PCI bridge";
 static const char pci_device_10de_01bc[] = "nForce IDE";
-static const char pci_device_10de_01c1[] = "nForce MC97 Modem (Smart Link HAMR5600 compatible)";
+static const char pci_device_10de_01c1[] = "Intel 537 [nForce MC97 Modem]";
+static const char pci_device_10de_01c2[] = "nForce USB Controller";
+static const char pci_device_10de_01c3[] = "nForce Ethernet Controller";
+static const char pci_device_10de_01e8[] = "nForce2 AGP";
+static const char pci_device_10de_01f0[] = "NV18 [GeForce4 MX - nForce GPU]";
 static const char pci_device_10de_0200[] = "NV20 [GeForce3]";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_0200_1043_402f[] = "AGP-V8200 DDR";
 #endif
-static const char pci_device_10de_0201[] = "NV20 [GeForce3 Ti200]";
-static const char pci_device_10de_0202[] = "NV20 [GeForce3 Ti500]";
+static const char pci_device_10de_0201[] = "NV20 [GeForce3 Ti 200]";
+static const char pci_device_10de_0202[] = "NV20 [GeForce3 Ti 500]";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_0202_1043_405b[] = "V8200 T5";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_0202_1545_002f[] = "Xtasy 6964";
 #endif
-static const char pci_device_10de_0203[] = "NV20 [Quadro DCC]";
-static const char pci_device_10de_0250[] = "NV25 [GeForce4 Ti4600]";
-static const char pci_device_10de_0251[] = "NV25 [GeForce4 Ti4400]";
-static const char pci_device_10de_0253[] = "NV25 [GeForce4 Ti4200]";
-static const char pci_device_10de_0258[] = "Quadro4 900XGL";
-static const char pci_device_10de_0259[] = "Quadro4 750XGL";
-static const char pci_device_10de_025b[] = "Quadro4 700XGL";
+static const char pci_device_10de_0203[] = "NV20DCC [Quadro DCC]";
+static const char pci_device_10de_0250[] = "NV25 [GeForce4 Ti 4600]";
+static const char pci_device_10de_0251[] = "NV25 [GeForce4 Ti 4400]";
+static const char pci_device_10de_0252[] = "NV25 [GeForce4 Ti]";
+static const char pci_device_10de_0253[] = "NV25 [GeForce4 Ti 4200]";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_0253_107d_2896[] = "WinFast A250 LE TD (Dual VGA/TV-out/DVI)";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_0253_147b_8f09[] = "Siluro (Dual VGA/TV-out/DVI)";
+#endif
+static const char pci_device_10de_0258[] = "NV25GL [Quadro4 900 XGL]";
+static const char pci_device_10de_0259[] = "NV25GL [Quadro4 750 XGL]";
+static const char pci_device_10de_025b[] = "NV25GL [Quadro4 700 XGL]";
+static const char pci_device_10de_0280[] = "NV28 [GeForce4 Ti 4800]";
+static const char pci_device_10de_0281[] = "NV28 [GeForce4 Ti 4200 AGP 8x]";
+static const char pci_device_10de_0282[] = "NV28 [GeForce4 Ti 4800 SE]";
+static const char pci_device_10de_0288[] = "NV28GL [Quadro4 980 XGL]";
+static const char pci_device_10de_0289[] = "NV28GL [Quadro4 780 XGL]";
+static const char pci_device_10de_0300[] = "NV30 [GeForce FX]";
+static const char pci_device_10de_0301[] = "NV30 [GeForce FX 5800 Ultra]";
+static const char pci_device_10de_0302[] = "NV30 [GeForce FX 5800]";
+static const char pci_device_10de_0308[] = "NV30GL [Quadro FX 2000]";
+static const char pci_device_10de_0309[] = "NV30GL [Quadro FX 1000]";
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_10df[] = "Emulex Corporation";
 static const char pci_device_10df_1ae5[] = "LP6000 Fibre Channel Host Adapter";
@@ -4964,6 +5209,7 @@ static const char pci_vendor_10e2[] = "Aptix Corporation";
 static const char pci_vendor_10e3[] = "Tundra Semiconductor Corp.";
 static const char pci_device_10e3_0000[] = "CA91C042 [Universe]";
 static const char pci_device_10e3_0860[] = "CA91C860 [QSpan]";
+static const char pci_device_10e3_0862[] = "CA91C862A [QSpan-II]";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_10e4[] = "Tandem Computers";
@@ -5006,6 +5252,7 @@ static const char pci_device_10ea_2000[] = "CyberPro 2000";
 static const char pci_device_10ea_2010[] = "CyberPro 2000A";
 static const char pci_device_10ea_5000[] = "CyberPro 5000";
 static const char pci_device_10ea_5050[] = "CyberPro 5050";
+static const char pci_device_10ea_5202[] = "CyberPro 5202";
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_10eb[] = "Artists Graphics";
 static const char pci_device_10eb_0101[] = "3GA";
@@ -5064,6 +5311,9 @@ static const char pci_subsys_10ec_8139_1186_1320[] = "SN5200";
 static const char pci_subsys_10ec_8139_1186_8139[] = "DRN-32TX";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10ec_8139_11f6_8139[] = "FN22-3(A) LinxPRO Ethernet Adapter";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10ec_8139_1259_2500[] = "AT-2500TX";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -5106,6 +5356,9 @@ static const char pci_subsys_10ec_8139_8e2e_7100[] = "KF-230TX/2";
 static const char pci_subsys_10ec_8139_a0a0_0007[] = "ALN-325C";
 #endif
 static const char pci_device_10ec_8169[] = "RTL-8169";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10ec_8169_1371_434e[] = "ProG-2000L";
+#endif
 static const char pci_device_10ec_8197[] = "SmartLAN56 56K Modem";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -5113,7 +5366,7 @@ static const char pci_vendor_10ed[] = "Ascii Corporation";
 static const char pci_device_10ed_7310[] = "V7310";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
-static const char pci_vendor_10ee[] = "Xilinx, Inc.";
+static const char pci_vendor_10ee[] = "Xilinx Corporation";
 static const char pci_device_10ee_3fc0[] = "RME Digi96";
 static const char pci_device_10ee_3fc1[] = "RME Digi96/8";
 static const char pci_device_10ee_3fc2[] = "RME Digi96/8 Pro";
@@ -5162,10 +5415,12 @@ static const char pci_device_10fa_000c[] = "TARGA 1000";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_10fb[] = "Thesys Gesellschaft für Mikroelektronik mbH";
+static const char pci_device_10fb_186f[] = "TH 6255";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_10fc[] = "I-O Data Device, Inc.";
 static const char pci_device_10fc_0003[] = "Cardbus IDE Controller";
+static const char pci_device_10fc_0005[] = "Cardbus SCSI CBSC II";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_10fd[] = "Soyo Computer, Inc";
@@ -5239,15 +5494,24 @@ static const char pci_device_1102_0004[] = "SB Audigy";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1102_0004_1102_0051[] = "SB0090 Audigy Player";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1102_0004_1102_0053[] = "SB0090 Audigy Player/OEM";
+#endif
+static const char pci_device_1102_0006[] = "[SB Live! Value] EMU10k1X";
 static const char pci_device_1102_4001[] = "SB Audigy FireWire Port";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1102_4001_1102_0010[] = "SB Audigy FireWire Port";
+#endif
 static const char pci_device_1102_7002[] = "SB Live! MIDI/Game Port";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1102_7002_1102_0020[] = "Gameport Joystick";
 #endif
 static const char pci_device_1102_7003[] = "SB Audigy MIDI/Game port";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1102_7003_1102_0040[] = "SB Audigy MIDI/Gameport";
+static const char pci_subsys_1102_7003_1102_0040[] = "SB Audigy MIDI/Game Port";
 #endif
+static const char pci_device_1102_7004[] = "[SB Live! Value] Input device controller";
+static const char pci_device_1102_8064[] = "SB0100 [SBLive! 5.1 OEM]";
 static const char pci_device_1102_8938[] = "ES1371";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -5282,6 +5546,9 @@ static const char pci_device_1106_0305[] = "VT8363/8365 [KT133/KM133]";
 static const char pci_subsys_1106_0305_1043_8033[] = "A7V Mainboard";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1106_0305_1043_803e[] = "A7V-E Mainboard";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1106_0305_1043_8042[] = "A7V133/A7V133-C Mainboard";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -5291,10 +5558,19 @@ static const char pci_device_1106_0391[] = "VT8371 [KX133]";
 static const char pci_device_1106_0501[] = "VT8501 [Apollo MVP4]";
 static const char pci_device_1106_0505[] = "VT82C505";
 static const char pci_device_1106_0561[] = "VT82C561";
-static const char pci_device_1106_0571[] = "VT82C586B PIPC Bus Master IDE";
+static const char pci_device_1106_0571[] = "VT82C586/B/686A/B PIPC Bus Master IDE";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1106_0571_1043_8052[] = "VT8233A Bus Master ATA100/66/33 IDE";
+#endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1106_0571_1106_0571[] = "VT8235 Bus Master ATA133/100/66/33 IDE";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1106_0571_1179_0001[] = "Magnia Z310";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1106_0571_1458_5002[] = "GA-7VAX Mainboard";
+#endif
 static const char pci_device_1106_0576[] = "VT82C576 3V [Apollo Master]";
 static const char pci_device_1106_0585[] = "VT82C585VP [Apollo VP1/VPX]";
 static const char pci_device_1106_0586[] = "VT82C586/A/B PCI-to-ISA [Apollo VP]";
@@ -5319,6 +5595,9 @@ static const char pci_device_1106_0686[] = "VT82C686 [Apollo Super South]";
 static const char pci_subsys_1106_0686_1043_8033[] = "A7V Mainboard";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1106_0686_1043_803e[] = "A7V-E Mainboard";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1106_0686_1043_8040[] = "A7M266 Mainboard";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -5330,8 +5609,17 @@ static const char pci_subsys_1106_0686_1106_0000[] = "VT82C686/A PCI to ISA Brid
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1106_0686_1106_0686[] = "VT82C686/A PCI to ISA Bridge";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1106_0686_1179_0001[] = "Magnia Z310";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1106_0686_147b_a702[] = "KG7-Lite Mainboard";
+#endif
 static const char pci_device_1106_0691[] = "VT82C693A/694x [Apollo PRO133x]";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1106_0691_1179_0001[] = "Magnia Z310";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1106_0691_1458_0691[] = "VT82C691 Apollo Pro System Controller";
 #endif
 static const char pci_device_1106_0693[] = "VT82C693 [Apollo Pro Plus]";
@@ -5346,7 +5634,7 @@ static const char pci_device_1106_3038[] = "USB";
 static const char pci_subsys_1106_3038_0925_1234[] = "USB Controller";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1106_3038_1234_0925[] = "MVP3 USB Controller";
+static const char pci_subsys_1106_3038_1179_0001[] = "Magnia Z310";
 #endif
 static const char pci_device_1106_3040[] = "VT82C586B ACPI";
 static const char pci_device_1106_3043[] = "VT86C100A [Rhine]";
@@ -5367,11 +5655,17 @@ static const char pci_device_1106_3057[] = "VT82C686 [Apollo Super ACPI]";
 static const char pci_subsys_1106_3057_1043_8033[] = "A7V Mainboard";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1106_3057_1043_803e[] = "A7V-E Mainboard";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1106_3057_1043_8040[] = "A7M266 Mainboard";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1106_3057_1043_8042[] = "A7V133/A7V133-C Mainboard";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1106_3057_1179_0001[] = "Magnia Z310";
+#endif
 static const char pci_device_1106_3058[] = "VT82C686 AC97 Audio Controller";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1106_3058_0e11_b194[] = "Soundmax integrated digital audio";
@@ -5389,12 +5683,12 @@ static const char pci_subsys_1106_3058_1462_3091[] = "MS-6309 Onboard Audio";
 static const char pci_subsys_1106_3058_15dd_7609[] = "Onboard Audio";
 #endif
 static const char pci_device_1106_3059[] = "VT8233 AC97 Audio Controller";
-static const char pci_device_1106_3065[] = "VT6102 [Rhine-II]";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1106_3065_1106_0102[] = "VT6102 [Rhine II] Embeded Ethernet Controller on VT8235";
+static const char pci_subsys_1106_3059_1458_a002[] = "GA-7VAX Onboard Audio (Realtek ALC650)";
 #endif
+static const char pci_device_1106_3065[] = "VT6102 [Rhine-II]";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1106_3065_1106_3065[] = "Embedded ethernet on VIA Eden";
+static const char pci_subsys_1106_3065_1106_0102[] = "VT6102 [Rhine II] Embeded Ethernet Controller on VT8235";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1106_3065_1186_1400[] = "DFE-530TX rev A";
@@ -5402,30 +5696,46 @@ static const char pci_subsys_1106_3065_1186_1400[] = "DFE-530TX rev A";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1106_3065_1186_1401[] = "DFE-530TX rev B";
 #endif
-static const char pci_device_1106_3068[] = "AC97 Modem Controller";
+static const char pci_device_1106_3068[] = "Intel 537 [AC97 Modem]";
 static const char pci_device_1106_3074[] = "VT8233 PCI to ISA Bridge";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1106_3074_1043_8052[] = "VT8233A";
+#endif
 static const char pci_device_1106_3091[] = "VT8633 [Apollo Pro266]";
-static const char pci_device_1106_3099[] = "VT8367 [KT266]";
+static const char pci_device_1106_3099[] = "VT8366/A/7 [Apollo KT266/A/333]";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1106_3099_1043_8064[] = "A7V266-E";
+static const char pci_subsys_1106_3099_1043_8064[] = "A7V266-E Mainboard";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1106_3099_1043_807f[] = "A7V333";
+static const char pci_subsys_1106_3099_1043_807f[] = "A7V333 Mainboard";
 #endif
 static const char pci_device_1106_3101[] = "VT8653 Host Bridge";
 static const char pci_device_1106_3102[] = "VT8662 Host Bridge";
 static const char pci_device_1106_3103[] = "VT8615 Host Bridge";
 static const char pci_device_1106_3104[] = "USB 2.0";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1106_3104_1458_5004[] = "GA-7VAX Mainboard";
+#endif
+static const char pci_device_1106_3106[] = "VT6105 [Rhine-III]";
 static const char pci_device_1106_3109[] = "VT8233C PCI to ISA Bridge";
 static const char pci_device_1106_3112[] = "VT8361 [KLE133] Host Bridge";
 static const char pci_device_1106_3116[] = "VT8375 [KM266] Host Bridge";
+static const char pci_device_1106_3122[] = "VT8623 [Apollo CLE266] integrated CastleRock graphics";
+static const char pci_device_1106_3123[] = "VT8623 [Apollo CLE266]";
 static const char pci_device_1106_3128[] = "VT8753 [P4X266 AGP]";
 static const char pci_device_1106_3133[] = "VT3133 Host Bridge";
 static const char pci_device_1106_3147[] = "VT8233A ISA Bridge";
 static const char pci_device_1106_3148[] = "P4M266 Host Bridge";
 static const char pci_device_1106_3156[] = "P/KN266 Host Bridge";
-static const char pci_device_1106_3177[] = "VT8233A ISA Bridge";
-static const char pci_device_1106_3189[] = "VT8377 [KT400] Host Bridge";
+static const char pci_device_1106_3168[] = "VT8374 P4X400 Host Controller/AGP Bridge";
+static const char pci_device_1106_3177[] = "VT8235 ISA Bridge";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1106_3177_1458_5001[] = "GA-7VAX Mainboard";
+#endif
+static const char pci_device_1106_3189[] = "VT8377 [KT400 AGP] Host Bridge";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1106_3189_1458_5000[] = "GA-7VAX Mainboard";
+#endif
 static const char pci_device_1106_5030[] = "VT82C596 ACPI [Apollo PRO]";
 static const char pci_device_1106_6100[] = "VT85C100A [Rhine II]";
 static const char pci_device_1106_8231[] = "VT8231 [PCI-to-ISA Bridge]";
@@ -5441,12 +5751,12 @@ static const char pci_device_1106_8605[] = "VT8605 [PM133 AGP]";
 static const char pci_device_1106_8691[] = "VT82C691 [Apollo Pro]";
 static const char pci_device_1106_8693[] = "VT82C693 [Apollo Pro Plus] PCI Bridge";
 static const char pci_device_1106_b091[] = "VT8633 [Apollo Pro266 AGP]";
-static const char pci_device_1106_b099[] = "VT8367 [KT333 AGP]";
+static const char pci_device_1106_b099[] = "VT8366/A/7 [Apollo KT266/A/333 AGP]";
 static const char pci_device_1106_b101[] = "VT8653 AGP Bridge";
 static const char pci_device_1106_b102[] = "VT8362 AGP Bridge";
 static const char pci_device_1106_b103[] = "VT8615 AGP Bridge";
 static const char pci_device_1106_b112[] = "VT8361 [KLE133] AGP Bridge";
-static const char pci_device_1106_b168[] = "VT8235";
+static const char pci_device_1106_b168[] = "VT8235 PCI Bridge";
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1107[] = "Stratus Computers";
 static const char pci_device_1107_0576[] = "VIA VT82C570MV [Apollo] (Wrong vendor ID!)";
@@ -5500,7 +5810,7 @@ static const char pci_device_1110_6073[] = "Firepower Powerized SMP I/O ASIC";
 static const char pci_vendor_1111[] = "Santa Cruz Operation";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
-static const char pci_vendor_1112[] = "RNS - Div. of Meret Communications Inc";
+static const char pci_vendor_1112[] = "Osicom Technologies Inc";
 static const char pci_device_1112_2200[] = "FDDI Adapter";
 static const char pci_device_1112_2300[] = "Fast Ethernet Adapter";
 static const char pci_device_1112_2340[] = "4 Port Fast Ethernet Adapter";
@@ -5509,13 +5819,18 @@ static const char pci_device_1112_2400[] = "ATM Adapter";
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1113[] = "Accton Technology Corporation";
 static const char pci_device_1113_1211[] = "SMC2-1211TX";
+#endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1113_1211_103c_1207[] = "EN-1207D Fast Ethernet Adapter";
 #endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1113_1211_1113_1211[] = "EN-1207D Fast Ethernet Adapter";
 #endif
 static const char pci_device_1113_1216[] = "EN-1216 Ethernet Adapter";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1113_1216_111a_1020[] = "SpeedStream 1020 PCI 10/100 Ethernet Adaptor [EN-1207F-TX ?]";
+#endif
 static const char pci_device_1113_1217[] = "EN-1217 Ethernet Adapter";
 static const char pci_device_1113_5105[] = "10Mbps Network card";
 static const char pci_device_1113_9211[] = "EN-1207D Fast Ethernet Adapter";
@@ -5736,9 +6051,13 @@ static const char pci_vendor_1130[] = "Computervision";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1131[] = "Philips Semiconductors";
+static const char pci_device_1131_1561[] = "USB 1.1 Host Controller";
+static const char pci_device_1131_1562[] = "USB 2.0 Host Controller";
 static const char pci_device_1131_3400[] = "SmartPCI56(UCB1500) 56K Modem";
 static const char pci_device_1131_7130[] = "SAA7130 Video Broadcast Decoder";
+static const char pci_device_1131_7133[] = "SAA7133 Audio+video broadcast decoder";
 static const char pci_device_1131_7134[] = "SAA7134";
+static const char pci_device_1131_7135[] = "SAA7135 Audio+video broadcast decoder";
 static const char pci_device_1131_7145[] = "SAA7145";
 static const char pci_device_1131_7146[] = "SAA7146";
 #ifdef INIT_SUBSYS_INFO
@@ -5787,6 +6106,7 @@ static const char pci_device_1133_e005[] = "DIVA LOW";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1133_e005_1133_e005[] = "DIVA 2.01 S/T";
 #endif
+static const char pci_device_1133_e00b[] = "DIVA 2.02";
 static const char pci_device_1133_e010[] = "DIVA Server BRI-2M";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1133_e010_1133_e010[] = "DIVA Server BRI-2M";
@@ -5875,6 +6195,12 @@ static const char pci_device_1144_0001[] = "Noservo controller";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1145[] = "Workbit Corporation";
+static const char pci_device_1145_8007[] = "NinjaSCSI-32 Workbit";
+static const char pci_device_1145_f007[] = "NinjaSCSI-32 KME";
+static const char pci_device_1145_f010[] = "NinjaSCSI-32 Workbit";
+static const char pci_device_1145_f012[] = "NinjaSCSI-32 Logitec";
+static const char pci_device_1145_f013[] = "NinjaSCSI-32 Logitec";
+static const char pci_device_1145_f015[] = "NinjaSCSI-32 Melco";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1146[] = "Force Computers";
@@ -5966,6 +6292,46 @@ static const char pci_subsys_1148_4300_1148_9861[] = "SK-9861 (1000Base-SX VF45
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1148_4300_1148_9862[] = "SK-9862 (1000Base-SX VF45 dual link)";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1148_4300_1148_9871[] = "SK-9871 (1000Base-ZX single link)";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1148_4300_1148_9872[] = "SK-9872 (1000Base-ZX dual link)";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1148_4300_1259_2970[] = "AT-2970SX [Allied Telesyn]";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1148_4300_1259_2972[] = "AT-2970T [Allied Telesyn]";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1148_4300_1259_2975[] = "AT-2970SX [Allied Telesyn]";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1148_4300_1259_2977[] = "AT-2970T [Allied Telesyn]";
+#endif
+static const char pci_device_1148_4320[] = "SK-98xx Gigabit Ethernet Server Adapter";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1148_4320_1148_5021[] = "SK-9821 V2.0 Gigabit Ethernet 10/100/1000Base-T Adapter";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1148_4320_1148_5041[] = "SK-9841 V2.0 Gigabit Ethernet 1000Base-LX Adapter";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1148_4320_1148_5043[] = "SK-9843 V2.0 Gigabit Ethernet 1000Base-SX Adapter";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1148_4320_1148_5051[] = "SK-9851 V2.0 Gigabit Ethernet 1000Base-SX Adapter";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1148_4320_1148_5061[] = "SK-9861 V2.0 Gigabit Ethernet 1000Base-SX Adapter";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1148_4320_1148_5071[] = "SK-9871 V2.0 Gigabit Ethernet 1000Base-ZX Adapter";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1148_4320_1148_9521[] = "SK-9521 10/100/1000Base-T Adapter";
+#endif
 static const char pci_device_1148_4400[] = "Gigabit Ethernet";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -6222,12 +6588,17 @@ static const char pci_device_1166_0013[] = "CNB20-HE Host Bridge";
 static const char pci_device_1166_0014[] = "CNB20-HE Host Bridge";
 static const char pci_device_1166_0015[] = "CMIC-GC Host Bridge";
 static const char pci_device_1166_0016[] = "CMIC-GC Host Bridge";
-static const char pci_device_1166_0017[] = "CMIC-SL";
+static const char pci_device_1166_0017[] = "GCNB-LE Host Bridge";
 static const char pci_device_1166_0200[] = "OSB4 South Bridge";
 static const char pci_device_1166_0201[] = "CSB5 South Bridge";
+static const char pci_device_1166_0203[] = "CSB6 South Bridge";
 static const char pci_device_1166_0211[] = "OSB4 IDE Controller";
 static const char pci_device_1166_0212[] = "CSB5 IDE Controller";
-static const char pci_device_1166_0220[] = "OSB4/CSB5 USB Controller";
+static const char pci_device_1166_0213[] = "CSB6 RAID/IDE Controller";
+static const char pci_device_1166_0220[] = "OSB4/CSB5 OHCI USB Controller";
+static const char pci_device_1166_0221[] = "CSB6 OHCI USB Controller";
+static const char pci_device_1166_0225[] = "GCLE Host Bridge";
+static const char pci_device_1166_0227[] = "GCLE-2 Host Bridge";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1167[] = "Mutoh Industries Inc";
@@ -6331,7 +6702,13 @@ static const char pci_vendor_1180[] = "Ricoh Co Ltd";
 static const char pci_device_1180_0465[] = "RL5c465";
 static const char pci_device_1180_0466[] = "RL5c466";
 static const char pci_device_1180_0475[] = "RL5c475";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1180_0475_144d_c006[] = "vpr Matrix 170B4 CardBus bridge";
+#endif
 static const char pci_device_1180_0476[] = "RL5c476 II";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1180_0476_1014_0185[] = "ThinkPad A/T/X Series";
+#endif
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1180_0476_104d_80df[] = "Vaio PCG-FX403";
@@ -6352,7 +6729,13 @@ static const char pci_device_1180_0522[] = "R5C522 IEEE 1394 Controller";
 static const char pci_subsys_1180_0522_1014_01cf[] = "ThinkPad A30p (2653-64G)";
 #endif
 static const char pci_device_1180_0551[] = "R5C551 IEEE 1394 Controller";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1180_0551_144d_c006[] = "vpr Matrix 170B4";
+#endif
 static const char pci_device_1180_0552[] = "R5C552 IEEE 1394 Controller";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1180_0552_1014_0511[] = "ThinkPad A/T/X Series";
+#endif
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1181[] = "Telmatics International";
@@ -6635,9 +7018,6 @@ static const char pci_vendor_11c0[] = "Hewlett Packard";
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_11c1[] = "Lucent Microelectronics";
 static const char pci_device_11c1_0440[] = "56k WinModem";
-#ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_11c1_0440_0001_0440[] = "LT WinModem 56k Data+Fax+Voice+Dsvd";
-#endif
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_11c1_0440_1033_8015[] = "LT WinModem 56k Data+Fax+Voice+Dsvd";
@@ -6770,9 +7150,6 @@ static const char pci_subsys_11c1_0441_1668_0440[] = "Lucent Win Modem";
 #endif
 static const char pci_device_11c1_0442[] = "56k WinModem";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_11c1_0442_0001_0440[] = "LT WinModem 56k Data+Fax+Voice+VoiceView+Dsvd";
-#endif
-#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_11c1_0442_11c1_0440[] = "LT WinModem 56k Data+Fax+Voice+VoiceView+Dsvd";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -6868,6 +7245,9 @@ static const char pci_device_11c1_044d[] = "LT WinModem";
 static const char pci_device_11c1_044e[] = "LT WinModem";
 static const char pci_device_11c1_044f[] = "V90 WildWire Modem";
 static const char pci_device_11c1_0450[] = "LT WinModem";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_11c1_0450_144f_4005[] = "Magnia SG20";
+#endif
 static const char pci_device_11c1_0451[] = "LT WinModem";
 static const char pci_device_11c1_0452[] = "LT WinModem";
 static const char pci_device_11c1_0453[] = "LT WinModem";
@@ -6878,11 +7258,13 @@ static const char pci_device_11c1_0457[] = "LT WinModem";
 static const char pci_device_11c1_0458[] = "LT WinModem";
 static const char pci_device_11c1_0459[] = "LT WinModem";
 static const char pci_device_11c1_045a[] = "LT WinModem";
+static const char pci_device_11c1_045c[] = "LT WinModem";
 static const char pci_device_11c1_0461[] = "V90 WildWire Modem";
 static const char pci_device_11c1_0462[] = "V90 WildWire Modem";
 static const char pci_device_11c1_0480[] = "Venus Modem (V90, 56KFlex)";
 static const char pci_device_11c1_5801[] = "USB";
 static const char pci_device_11c1_5802[] = "USS-312 USB Controller";
+static const char pci_device_11c1_5803[] = "USS-344S USB Controller";
 static const char pci_device_11c1_5811[] = "FW323";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_11c1_5811_dead_0800[] = "FireWire Host Bus Adapter";
@@ -6892,7 +7274,7 @@ static const char pci_subsys_11c1_5811_dead_0800[] = "FireWire Host Bus Adapter"
 static const char pci_vendor_11c2[] = "Sand Microelectronics";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
-static const char pci_vendor_11c3[] = "NEC Corp";
+static const char pci_vendor_11c3[] = "NEC Corporation";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_11c4[] = "Document Technologies, Inc";
@@ -7154,6 +7536,19 @@ static const char pci_vendor_1201[] = "Vista Controls Corp";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1202[] = "Network General Corp.";
+static const char pci_device_1202_4300[] = "Gigabit Ethernet Adapter";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1202_4300_1202_9841[] = "SK-9841 LX";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1202_4300_1202_9842[] = "SK-9841 LX dual link";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1202_4300_1202_9843[] = "SK-9843 SX";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1202_4300_1202_9844[] = "SK-9843 SX dual link";
+#endif
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1203[] = "Bayer Corporation, Agfa Division";
@@ -7244,6 +7639,9 @@ static const char pci_subsys_1217_6933_1025_1016[] = "Travelmate 612 TX";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_device_1217_6972[] = "OZ6912 Cardbus Controller";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1217_6972_1179_0001[] = "Magnia Z310";
+#endif
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1218[] = "Hybricon Corp.";
@@ -7300,9 +7698,6 @@ static const char pci_subsys_121a_0003_139c_0017[] = "Raven";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_121a_0003_14af_0002[] = "Maxi Gamer Phoenix";
 #endif
-#ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_121a_0003_3030_3030[] = "Skywell Magic TwinPower";
-#endif
 static const char pci_device_121a_0004[] = "Voodoo Banshee [Velocity 100]";
 static const char pci_device_121a_0005[] = "Voodoo 3";
 #ifdef INIT_SUBSYS_INFO
@@ -7527,9 +7922,14 @@ static const char pci_vendor_1241[] = "DSC Communications";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1242[] = "JNI Corporation";
+static const char pci_device_1242_1560[] = "JNIC-1560 PCI-X Fibre Channel Controller";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1242_1560_1242_6562[] = "FCX2-6562 Dual Channel PCI-X Fibre Channel Adapter";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1242_1560_1242_656a[] = "FCX-6562 PCI-X Fibre Channel Adapter";
+#endif
 static const char pci_device_1242_4643[] = "FCI-1063 Fibre Channel Adapter";
-static const char pci_device_1242_6562[] = "FCX2-6562 Dual Channel PCI-X Fibre Channel Adapter";
-static const char pci_device_1242_656a[] = "FCX-6562 PCI-X Fibre Channel Adapter";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1243[] = "Delphax";
@@ -7566,7 +7966,7 @@ static const char pci_vendor_124a[] = "AEG Electrocom GmbH";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_124b[] = "SBS/Greenspring Modular I/O";
-static const char pci_device_124b_0040[] = "PCI-40A Quad IndustryPack Carrier or cPCI-200 Four Slot IndustryPack carrier";
+static const char pci_device_124b_0040[] = "PCI-40A or cPCI-200 Quad IndustryPack carrier";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_124b_0040_124b_9080[] = "PCI9080 Bridge";
 #endif
@@ -7657,10 +8057,12 @@ static const char pci_subsys_125d_1969_1014_0166[] = "ES1969 SOLO-1 AudioDrive o
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_125d_1969_125d_8888[] = "Solo-1 Audio Adapter";
 #endif
+static const char pci_device_125d_1978[] = "ES1978 Maestro 2E";
+#endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_125d_1969_525f_c888[] = "ES1969 SOLO-1 AudioDrive (+ES1938)";
+static const char pci_subsys_125d_1978_0e11_b112[] = "Armada M700";
 #endif
-static const char pci_device_125d_1978[] = "ES1978 Maestro 2E";
+#ifdef VENDOR_INCLUDE_NONVIDEO
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_125d_1978_1033_803c[] = "ES1978 Maestro-2E Audiodrive";
@@ -7745,8 +8147,16 @@ static const char pci_device_1260_3873[] = "Prism 2.5 Wavelan chipset";
 static const char pci_subsys_1260_3873_1186_3501[] = "DWL-520 Wireless PCI Adapter";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1260_3873_1737_3874[] = "WMP11 Wireless 802.11b PCI Adaptor";
+static const char pci_subsys_1260_3873_1668_0414[] = "HWP01170-01 802.11b PCI Wireless Adapter";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1260_3873_1737_3874[] = "WMP11 Wireless 802.11b PCI Adapter";
+#endif
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1260_3873_8086_2513[] = "Wireless 802.11b MiniPCI Adapter";
 #endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_device_1260_8130[] = "HMP8130 NTSC/PAL Video Decoder";
 static const char pci_device_1260_8131[] = "HMP8131 NTSC/PAL Video Decoder";
 #endif
@@ -8015,9 +8425,6 @@ static const char pci_subsys_1274_1371_8086_5753[] = "ES1371, ES1373 AudioPCI On
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_device_1274_5000[] = "ES1370 [AudioPCI]";
-#ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1274_5000_4942_4c4c[] = "Creative Sound Blaster AudioPCI128";
-#endif
 static const char pci_device_1274_5880[] = "5880 AudioPCI";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1274_5880_1274_2000[] = "Creative Sound Blaster AudioPCI128";
@@ -9395,7 +9802,19 @@ static const char pci_vendor_135b[] = "Giganet Inc";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_135c[] = "Quatech Inc";
+static const char pci_device_135c_0010[] = "QSC-100";
+static const char pci_device_135c_0020[] = "DSC-100";
+static const char pci_device_135c_0030[] = "DSC-200/300";
+static const char pci_device_135c_0040[] = "QSC-200/300";
+static const char pci_device_135c_0050[] = "ESC-100D";
+static const char pci_device_135c_0060[] = "ESC-100M";
 static const char pci_device_135c_00f0[] = "MPAC-100 Syncronous Serial Card (Zilog 85230)";
+static const char pci_device_135c_0170[] = "QSCLP-100";
+static const char pci_device_135c_0180[] = "DSCLP-100";
+static const char pci_device_135c_0190[] = "SSCLP-100";
+static const char pci_device_135c_01a0[] = "QSCLP-200/300";
+static const char pci_device_135c_01b0[] = "DSCLP-200/300";
+static const char pci_device_135c_01c0[] = "SSCLP-200/300";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_135d[] = "ABB Network Partner AB";
@@ -9639,6 +10058,10 @@ static const char pci_device_13a3_0005[] = "7751 Security Processor";
 static const char pci_device_13a3_0006[] = "6500 Public Key Processor";
 static const char pci_device_13a3_0007[] = "7811 Security Processor";
 static const char pci_device_13a3_0012[] = "7951 Security Processor";
+static const char pci_device_13a3_0014[] = "78XX Security Processor";
+static const char pci_device_13a3_0016[] = "8065 Security Processor";
+static const char pci_device_13a3_0017[] = "8165 Security Processor";
+static const char pci_device_13a3_0018[] = "8154 Security Processor";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_13a4[] = "Rascom Inc";
@@ -9779,9 +10202,11 @@ static const char pci_vendor_13cf[] = "Studio Audio & Video Ltd";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_13d0[] = "Techsan Electronics Co Ltd";
+static const char pci_device_13d0_2103[] = "B2C2 Sky2PC PCI [SkyStar2]";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_13d1[] = "Abocom Systems Inc";
+static const char pci_device_13d1_ab02[] = "ADMtek Centaur-C rev 17 [D-Link DFE-680TX] CardBus Fast Ethernet Adapter";
 static const char pci_device_13d1_ab06[] = "RTL8139 [FE2000VX] CardBus Fast Ethernet Attached Port Adapter";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -9910,6 +10335,9 @@ static const char pci_subsys_13f6_0101_13f6_0101[] = "CMI8338-031 PCI Audio Devi
 #endif
 static const char pci_device_13f6_0111[] = "CM8738";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_13f6_0111_1019_0970[] = "P6STP-FL motherboard";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_13f6_0111_1043_8077[] = "CMI8738 6-channel audio controller";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -10020,6 +10448,7 @@ static const char pci_vendor_1411[] = "Ikos Systems Inc";
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1412[] = "IC Ensemble Inc";
 static const char pci_device_1412_1712[] = "ICE1712 [Envy24]";
+static const char pci_device_1412_1724[] = "ICE1724 [Envy24HT]";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1413[] = "Addonics";
@@ -10279,7 +10708,7 @@ static const char pci_vendor_1460[] = "DYNARC INC";
 static const char pci_vendor_1461[] = "Avermedia Technologies Inc";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
-static const char pci_vendor_1462[] = "Micro-star International Co Ltd";
+static const char pci_vendor_1462[] = "Micro-Star International Co., Ltd.";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1463[] = "Fast Corporation";
@@ -10532,6 +10961,14 @@ static const char pci_vendor_14b4[] = "PHILIPS Business Electronics B.V.";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_14b5[] = "Creamware GmBH";
+static const char pci_device_14b5_0200[] = "Scope";
+static const char pci_device_14b5_0300[] = "Pulsar";
+static const char pci_device_14b5_0400[] = "Pulsar2";
+static const char pci_device_14b5_0600[] = "Pulsar2";
+static const char pci_device_14b5_0800[] = "DSP-Board";
+static const char pci_device_14b5_0900[] = "DSP-Board";
+static const char pci_device_14b5_0a00[] = "DSP-Board";
+static const char pci_device_14b5_0b00[] = "DSP-Board";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_14b6[] = "Quantum Data Corp.";
@@ -10550,6 +10987,7 @@ static const char pci_device_14b9_0340[] = "PC4800";
 static const char pci_device_14b9_0350[] = "PC4800";
 static const char pci_device_14b9_4500[] = "PC4500";
 static const char pci_device_14b9_4800[] = "PC4800";
+static const char pci_device_14b9_a504[] = "Cisco Aironet Wireless 802.11b";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_14ba[] = "INTERNIX Inc.";
@@ -10707,7 +11145,7 @@ static const char pci_vendor_14e3[] = "AMTELCO";
 static const char pci_vendor_14e4[] = "Broadcom Corporation";
 static const char pci_device_14e4_1644[] = "NetXtreme BCM5700 Gigabit Ethernet";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_14e4_1644_1014_0277[] = "Broadcom Vigil B5700 1000BaseTX";
+static const char pci_subsys_14e4_1644_1014_0277[] = "Broadcom Vigil B5700 1000Base-T";
 #endif
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -10721,7 +11159,7 @@ static const char pci_subsys_14e4_1644_1028_0106[] = "Broadcom BCM5700";
 #ifdef VENDOR_INCLUDE_NONVIDEO
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_14e4_1644_1028_0109[] = "Broadcom BCM5700 1000BaseTX";
+static const char pci_subsys_14e4_1644_1028_0109[] = "Broadcom BCM5700 1000Base-T";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 #endif
@@ -10730,40 +11168,40 @@ static const char pci_subsys_14e4_1644_1028_010a[] = "Broadcom BCM5700 1000BaseT
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_14e4_1644_10b7_1000[] = "3C996-T 1000BaseTX";
+static const char pci_subsys_14e4_1644_10b7_1000[] = "3C996-T 1000Base-T";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_14e4_1644_10b7_1001[] = "3C996B-T 1000BaseTX";
+static const char pci_subsys_14e4_1644_10b7_1001[] = "3C996B-T 1000Base-T";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_14e4_1644_10b7_1002[] = "3C996C-T 1000BaseTX";
+static const char pci_subsys_14e4_1644_10b7_1002[] = "3C996C-T 1000Base-T";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_14e4_1644_10b7_1003[] = "3C997-T 1000BaseTX Dual Port";
+static const char pci_subsys_14e4_1644_10b7_1003[] = "3C997-T 1000Base-T Dual Port";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_14e4_1644_10b7_1004[] = "3C996-SX 1000BaseSX";
+static const char pci_subsys_14e4_1644_10b7_1004[] = "3C996-SX 1000Base-SX";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_14e4_1644_10b7_1005[] = "3C997-SX 1000BaseSX Dual Port";
+static const char pci_subsys_14e4_1644_10b7_1005[] = "3C997-SX 1000Base-SX Dual Port";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_14e4_1644_10b7_1008[] = "3C942 Gigabit LOM (31X31)";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_14e4_1644_14e4_0002[] = "NetXtreme 1000BaseSX";
+static const char pci_subsys_14e4_1644_14e4_0002[] = "NetXtreme 1000Base-SX";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_14e4_1644_14e4_0003[] = "NetXtreme 1000BaseSX";
+static const char pci_subsys_14e4_1644_14e4_0003[] = "NetXtreme 1000Base-SX";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_14e4_1644_14e4_0004[] = "NetXtreme 1000BaseTX";
+static const char pci_subsys_14e4_1644_14e4_0004[] = "NetXtreme 1000Base-T";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_14e4_1644_14e4_1028[] = "NetXtreme 1000BaseTX";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_14e4_1644_14e4_1644[] = "BCM5700 1000BaseTX";
+static const char pci_subsys_14e4_1644_14e4_1644[] = "BCM5700 1000Base-T";
 #endif
 static const char pci_device_14e4_1645[] = "NetXtreme BCM5701 Gigabit Ethernet";
 #endif
@@ -10793,38 +11231,43 @@ static const char pci_subsys_14e4_1645_0e11_009a[] = "NC7770 Gigabit Server Adap
 #ifdef VENDOR_INCLUDE_NONVIDEO
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_14e4_1645_1028_0121[] = "Broadcom BCM5701 1000BaseTX";
+static const char pci_subsys_14e4_1645_0e11_00c1[] = "NC6770 Gigabit Server Adapter (PCI-X, 1000-SX)";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_14e4_1645_10b7_1004[] = "3C996-SX 1000BaseSX";
+static const char pci_subsys_14e4_1645_1028_0121[] = "Broadcom BCM5701 1000Base-T";
 #endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_14e4_1645_10b7_1006[] = "3C996B-T 1000BaseTX";
+static const char pci_subsys_14e4_1645_10b7_1004[] = "3C996-SX 1000Base-SX";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_14e4_1645_10b7_1007[] = "3C1000-T 1000BaseTX";
+static const char pci_subsys_14e4_1645_10b7_1006[] = "3C996B-T 1000Base-T";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_14e4_1645_10b7_1008[] = "3C940-BR01 1000BaseTX";
+static const char pci_subsys_14e4_1645_10b7_1007[] = "3C1000-T 1000Base-T";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_14e4_1645_14e4_0001[] = "BCM5701 1000BaseTX";
+static const char pci_subsys_14e4_1645_10b7_1008[] = "3C940-BR01 1000Base-T";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_14e4_1645_14e4_0005[] = "BCM5701 1000BaseTX";
+static const char pci_subsys_14e4_1645_14e4_0001[] = "BCM5701 1000Base-T";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_14e4_1645_14e4_0006[] = "BCM5701 1000BaseTX";
+static const char pci_subsys_14e4_1645_14e4_0005[] = "BCM5701 1000Base-T";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_14e4_1645_14e4_0007[] = "BCM5701 1000BaseSX";
+static const char pci_subsys_14e4_1645_14e4_0006[] = "BCM5701 1000Base-T";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_14e4_1645_14e4_0008[] = "BCM5701 1000BaseTX";
+static const char pci_subsys_14e4_1645_14e4_0007[] = "BCM5701 1000Base-SX";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_14e4_1645_14e4_8008[] = "BCM5701 1000BaseTX";
+static const char pci_subsys_14e4_1645_14e4_0008[] = "BCM5701 1000Base-T";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_14e4_1645_14e4_8008[] = "BCM5701 1000Base-T";
 #endif
 static const char pci_device_14e4_1646[] = "NetXtreme BCM5702 Gigabit Ethernet";
 #endif
@@ -10866,10 +11309,108 @@ static const char pci_subsys_14e4_1647_14e4_8009[] = "BCM5703 1000BaseTX";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_14e4_1647_14e4_800a[] = "BCM5703 1000BaseTX";
 #endif
+static const char pci_device_14e4_1648[] = "NetXtreme BCM5704 Gigabit Ethernet";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_14e4_1648_0e11_00cf[] = "NC7772 Gigabit Server Adapter (PCI-X, 10,100,1000-T)";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_14e4_1648_0e11_00d0[] = "NC7782 Gigabit Server Adapter (PCI-X, 10,100,1000-T)";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_14e4_1648_0e11_00d1[] = "NC7783 Gigabit Server Adapter (PCI-X, 10,100,1000-T)";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_14e4_1648_10b7_2000[] = "3C998-T Dual Port 10/100/1000 PCI-X";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_14e4_1648_10b7_3000[] = "3C999-T Quad Port 10/100/1000 PCI-X";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_14e4_1648_1166_1648[] = "NetXtreme CIOB-E 1000Base-T";
+#endif
 static const char pci_device_14e4_164d[] = "NetXtreme BCM5702FE Gigabit Ethernet";
-static const char pci_device_14e4_16a6[] = "NetXtreme BCM5702X Gigabit Ethernet";
-static const char pci_device_14e4_16a7[] = "NetXtreme BCM5703X Gigabit Ethernet";
-static const char pci_device_14e4_4212[] = "BCM v.90 56k modem";
+static const char pci_device_14e4_1653[] = "NetXtreme BCM5705 Gigabit Ethernet";
+static const char pci_device_14e4_165d[] = "NetXtreme BCM5705M Gigabit Ethernet";
+static const char pci_device_14e4_1696[] = "NetXtreme BCM5782 Gigabit Ethernet";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_14e4_1696_14e4_000d[] = "NetXtreme BCM5782 1000Base-T";
+#endif
+static const char pci_device_14e4_16a6[] = "NetXtreme BCM5702 Gigabit Ethernet";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_14e4_16a6_0e11_00bb[] = "NC7760 Gigabit Server Adapter (PCI-X, 10/100/1000-T)";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_14e4_16a6_1028_0126[] = "BCM5702 1000Base-T";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_14e4_16a6_14e4_000c[] = "BCM5702 1000Base-T";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_14e4_16a6_14e4_8009[] = "BCM5702 1000Base-T";
+#endif
+static const char pci_device_14e4_16a7[] = "NetXtreme BCM5703 Gigabit Ethernet";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_14e4_16a7_0e11_00ca[] = "NC7771 Gigabit Server Adapter (PCI-X, 10,100,1000-T)";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_14e4_16a7_0e11_00cb[] = "NC7781 Gigabit Server Adapter (PCI-X, 10,100,1000-T)";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_14e4_16a7_14e4_0009[] = "NetXtreme BCM5703 1000Base-T";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_14e4_16a7_14e4_000a[] = "NetXtreme BCM5703 1000Base-SX";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_14e4_16a7_14e4_000b[] = "NetXtreme BCM5703 1000Base-T";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_14e4_16a7_14e4_800a[] = "NetXtreme BCM5703 1000Base-T";
+#endif
+static const char pci_device_14e4_16a8[] = "NetXtreme BCM5704S Gigabit Ethernet";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_14e4_16a8_10b7_2001[] = "3C998-SX Dual Port 1000-SX PCI-X";
+#endif
+static const char pci_device_14e4_16c6[] = "NetXtreme BCM5702 Gigabit Ethernet";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_14e4_16c6_10b7_1100[] = "3C1000B-T 10/100/1000 PCI";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_14e4_16c6_14e4_000c[] = "BCM5702 1000Base-T";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_14e4_16c6_14e4_8009[] = "BCM5702 1000Base-T";
+#endif
+static const char pci_device_14e4_16c7[] = "NetXtreme BCM5703 Gigabit Ethernet";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_14e4_16c7_14e4_0009[] = "NetXtreme BCM5703 1000Base-T";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_14e4_16c7_14e4_000a[] = "NetXtreme BCM5703 1000Base-SX";
+#endif
+static const char pci_device_14e4_4210[] = "BCM4210 iLine10 HomePNA 2.0";
+static const char pci_device_14e4_4211[] = "BCM4211 iLine10 HomePNA 2.0 + V.90 56k modem";
+static const char pci_device_14e4_4212[] = "BCM4212 v.90 56k modem";
+static const char pci_device_14e4_4301[] = "BCM4301 802.11b";
+static const char pci_device_14e4_4401[] = "BCM4401 100Base-T";
+static const char pci_device_14e4_4402[] = "BCM4402 Integrated 10/100BaseT";
+static const char pci_device_14e4_4410[] = "BCM4413 iLine32 HomePNA 2.0";
+static const char pci_device_14e4_4411[] = "BCM4413 V.90 56k modem";
+static const char pci_device_14e4_4412[] = "BCM4413 10/100BaseT";
 static const char pci_device_14e4_5820[] = "BCM5820 Crypto Accelerator";
 static const char pci_device_14e4_5821[] = "BCM5821 Crypto Accelerator";
 #endif
@@ -11356,12 +11897,22 @@ static const char pci_subsys_1522_0100_1522_0500[] = "RockForceQUATRO+ 4 Port V.
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1522_0100_1522_0600[] = "RockForce+ 2 Port V.90 Data/Fax/Voice Modem";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1522_0100_1522_0700[] = "RockForce+ 4 Port V.90 Data/Fax/Voice Modem";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1522_0100_1522_0800[] = "RockForceOCTO+ 8 Port V.92/V.44 Data/Fax/Voice Modem";
+#endif
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1523[] = "MUSIC Semiconductors";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1524[] = "ENE Technology Inc";
+static const char pci_device_1524_1211[] = "CB1211 Cardbus Controller";
+static const char pci_device_1524_1225[] = "CB1225 Cardbus Controller";
+static const char pci_device_1524_1410[] = "CB1410 Cardbus Controller";
+static const char pci_device_1524_1420[] = "CB1420 Cardbus Controller";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1525[] = "IMPACT Technologies";
@@ -11452,6 +12003,8 @@ static const char pci_vendor_1542[] = "VIVID Technology Inc";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1543[] = "SILICON Laboratories";
+static const char pci_device_1543_3052[] = "Intel 537 [Winmodem]";
+static const char pci_device_1543_4c22[] = "Si3036 MC'97 DAA";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1544[] = "DCM DATA Systems";
@@ -12086,19 +12639,36 @@ static const char pci_vendor_1638[] = "Standard Microsystems Corp [SMC]";
 static const char pci_device_1638_1100[] = "SMC2602W EZConnect / Addtron AWA-100";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_163c[] = "Smart Link Ltd.";
+static const char pci_device_163c_5449[] = "SmartPCI561 Modem";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1657[] = "Brocade Communications Systems, Inc.";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_165a[] = "Epix Inc";
+static const char pci_device_165a_c100[] = "PIXCI(R) CL1 Camera Link Video Capture Board [custom QL5232]";
+static const char pci_device_165a_d200[] = "PIXCI(R) D2X Digital Video Capture Board [custom QL5232]";
+static const char pci_device_165a_d300[] = "PIXCI(R) D3X Digital Video Capture Board [custom QL5232]";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_165d[] = "Hsing Tech. Enterprise Co., Ltd.";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1661[] = "Worldspace Corp.";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
-static const char pci_vendor_1668[] = "Action Tec Electronics Inc";
+static const char pci_vendor_1668[] = "Actiontec Electronics Inc";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_1681[] = "Hercules";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_16ab[] = "Global Sun Technology Inc";
+static const char pci_device_16ab_1102[] = "PCMCIA-to-PCI Wireless Network Bridge";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_16be[] = "Creatix Polymedia GmbH";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_16ec[] = "U.S. Robotics";
@@ -12108,18 +12678,27 @@ static const char pci_device_16ec_3685[] = "Wireless Access PCI Adapter Model 02
 static const char pci_vendor_16f6[] = "VideoTele.com, Inc.";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_1705[] = "Digital First, Inc.";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_170b[] = "NetOctave Inc";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_170c[] = "YottaYotta Inc.";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_172a[] = "Accelerated Encryption";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1737[] = "Linksys";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_173b[] = "Altima (nee Broadcom)";
 static const char pci_device_173b_03e8[] = "AC1000 Gigabit Ethernet";
 static const char pci_device_173b_03ea[] = "AC9100 Gigabit Ethernet";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_173b_03ea_173b_0001[] = "AC1002";
+#endif
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1743[] = "Peppercon AG";
@@ -12132,6 +12711,9 @@ static const char pci_vendor_174b[] = "PC Partner Limited";
 static const char pci_vendor_175e[] = "Sanera Systems, Inc.";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_1787[] = "Hightech Information System Ltd.";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1796[] = "Research Centre Juelich";
 static const char pci_device_1796_0001[] = "SIS1100 [Gigabit link]";
 static const char pci_device_1796_0002[] = "HOTlink";
@@ -12141,7 +12723,38 @@ static const char pci_device_1796_0005[] = "PROFIBUS";
 static const char pci_device_1796_0006[] = "AMCC HOTlink";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_1799[] = "Belkin";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_17af[] = "Hightech Information System Ltd.";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_17cc[] = "NetChip Technology, Inc";
+static const char pci_device_17cc_2280[] = "USB 2.0";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1813[] = "Ambient Technologies Inc";
+static const char pci_device_1813_4000[] = "HaM controllerless modem";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1813_4000_16be_0001[] = "V9x HAM Data Fax Modem";
+#endif
+static const char pci_device_1813_4100[] = "HaM plus Data Fax Modem";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1813_4100_16be_0002[] = "V9x HAM 1394";
+#endif
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_1851[] = "Microtune, Inc.";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_1852[] = "Anritsu Corp.";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_1888[] = "Varisys Ltd";
+static const char pci_device_1888_0301[] = "VMFX1 FPGA PMC module";
+static const char pci_device_1888_0601[] = "VSM2 dual PMC carrier";
+static const char pci_device_1888_0710[] = "VS14x series PowerPC PCI board";
+static const char pci_device_1888_0720[] = "VS24x series PowerPC PCI board";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1a08[] = "Sierra semiconductor";
@@ -12166,9 +12779,18 @@ static const char pci_device_1de1_690c[] = "690c";
 static const char pci_device_1de1_dc29[] = "DC290";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_2000[] = "Smart Link Ltd.";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_2001[] = "Temporal Research Ltd";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_2003[] = "Smart Link Ltd.";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_2004[] = "Smart Link Ltd.";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_21c3[] = "21st Century Computer Corp.";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -12198,6 +12820,8 @@ static const char pci_vendor_3142[] = "Post Impression Systems.";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_3388[] = "Hint Corp";
+static const char pci_device_3388_0013[] = "HiNT HC4 PCI to ISDN bridge, Multimedia audio controller";
+static const char pci_device_3388_0014[] = "HiNT HC4 PCI to ISDN bridge, Network controller";
 static const char pci_device_3388_0021[] = "HB1-SE33 PCI-PCI Bridge";
 static const char pci_device_3388_8011[] = "VXPro II Chipset";
 #ifdef INIT_SUBSYS_INFO
@@ -12263,6 +12887,9 @@ static const char pci_device_3d3d_000a[] = "GLINT R3";
 static const char pci_subsys_3d3d_000a_3d3d_0121[] = "Oxygen VX1";
 #endif
 static const char pci_device_3d3d_000c[] = "GLINT R3 [Oxygen VX1]";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_3d3d_000c_3d3d_0144[] = "Oxygen VX1-4X AGP [Permedia 4]";
+#endif
 static const char pci_device_3d3d_0100[] = "Permedia II 2D+3D";
 static const char pci_device_3d3d_1004[] = "Permedia";
 static const char pci_device_3d3d_3d04[] = "Permedia";
@@ -12299,6 +12926,7 @@ static const char pci_device_416c_0200[] = "CPC";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_4444[] = "Internext Compression Inc";
+static const char pci_device_4444_0803[] = "iTVC15 MPEG-2 Encoder";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_4468[] = "Bridgeport machines";
@@ -12388,6 +13016,9 @@ static const char pci_vendor_5145[] = "Ensoniq (Old)";
 static const char pci_device_5145_3031[] = "Concert AudioPCI";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_5168[] = "Animation Technologies Inc.";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_5301[] = "Alliance Semiconductor Corp.";
 static const char pci_device_5301_0001[] = "ProMotion aT3D";
 #endif
@@ -12579,7 +13210,13 @@ static const char pci_device_5333_8c03[] = "ViRGE/MX+MV";
 static const char pci_device_5333_8c10[] = "86C270-294 Savage/MX-MV";
 static const char pci_device_5333_8c11[] = "82C270-294 Savage/MX";
 static const char pci_device_5333_8c12[] = "86C270-294 Savage/IX-MV";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_5333_8c12_1014_017f[] = "ThinkPad T20";
+#endif
 static const char pci_device_5333_8c13[] = "86C270-294 Savage/IX";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_5333_8c13_1179_0001[] = "Magnia Z310";
+#endif
 static const char pci_device_5333_8c22[] = "SuperSavage MX/128";
 static const char pci_device_5333_8c24[] = "SuperSavage MX/64";
 static const char pci_device_5333_8c26[] = "SuperSavage MX/64C";
@@ -12592,9 +13229,10 @@ static const char pci_device_5333_8c2e[] = "SuperSavage IX/C SDR";
 static const char pci_subsys_5333_8c2e_1014_01fc[] = "ThinkPad T23 (2647-4MG)";
 #endif
 static const char pci_device_5333_8c2f[] = "SuperSavage IX/C DDR";
-static const char pci_device_5333_8d01[] = "VT8603 [ProSavage PN133] AGP4X VGA Controller (Twister)";
+static const char pci_device_5333_8d01[] = "86C380 [ProSavageDDR K4M266]";
 static const char pci_device_5333_8d02[] = "VT8636A [ProSavage KN133] AGP4X VGA Controller (TwisterK)";
-static const char pci_device_5333_8d04[] = "VT8751 [ProSavageDDR P4M266] VGA Controller";
+static const char pci_device_5333_8d03[] = "VT8751 [ProSavageDDR P4M266]";
+static const char pci_device_5333_8d04[] = "[ProSavageDDR K4M266]";
 static const char pci_device_5333_9102[] = "86C410 Savage 2000";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_5333_9102_1092_5932[] = "Viper II Z200";
@@ -12640,6 +13278,9 @@ static const char pci_vendor_5555[] = "Genroco, Inc";
 static const char pci_device_5555_0003[] = "TURBOstor HFP-832 [HiPPI NIC]";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_5654[] = "VoiceTronix Pty Ltd";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_5700[] = "Netpower";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -12791,7 +13432,7 @@ static const char pci_device_8086_1029[] = "82559 Ethernet Controller";
 static const char pci_device_8086_1030[] = "82559 InBusiness 10/100";
 static const char pci_device_8086_1031[] = "82801CAM (ICH3) PRO/100 VE (LOM) Ethernet Controller";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_1031_1014_0209[] = "ThinkPad A30p (2653-64G)";
+static const char pci_subsys_8086_1031_1014_0209[] = "ThinkPad A/T/X Series";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_1031_104d_80e7[] = "Vaio PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP";
@@ -12811,6 +13452,9 @@ static const char pci_subsys_8086_1031_144d_c001[] = "EtherExpress PRO/100 VE";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_1031_144d_c003[] = "EtherExpress PRO/100 VE";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_1031_144d_c006[] = "vpr Matrix 170B4";
+#endif
 static const char pci_device_8086_1032[] = "82801CAM (ICH3) PRO/100 VE Ethernet Controller";
 static const char pci_device_8086_1033[] = "82801CAM (ICH3) PRO/100 VM (LOM) Ethernet Controller";
 static const char pci_device_8086_1034[] = "82801CAM (ICH3) PRO/100 VM Ethernet Controller";
@@ -12824,9 +13468,16 @@ static const char pci_device_8086_103b[] = "82801BD PRO/100 VM (LOM) Ethernet Co
 static const char pci_device_8086_103c[] = "82801BD PRO/100 VM (CNR) Ethernet Controller";
 static const char pci_device_8086_103d[] = "82801BD PRO/100 VE (MOB) Ethernet Controller";
 static const char pci_device_8086_103e[] = "82801BD PRO/100 VM (MOB) Ethernet Controller";
+static const char pci_device_8086_1040[] = "536EP Data Fax Modem";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_1040_16be_1040[] = "V.9X DSP Data Fax Modem";
+#endif
 static const char pci_device_8086_1059[] = "82551QM Ethernet Controller";
 static const char pci_device_8086_1130[] = "82815 815 Chipset Host Bridge and Memory Controller Hub";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_1130_1025_1016[] = "Travelmate 612 TX";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_1130_1043_8027[] = "TUSL2-C Mainboard";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -12946,9 +13597,15 @@ static const char pci_subsys_8086_1229_1014_0207[] = "Ethernet Pro/100 S";
 static const char pci_subsys_8086_1229_1014_0232[] = "10/100 Dual Port Server Adapter";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_1229_1014_023a[] = "ThinkPad R30";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_1229_1014_105c[] = "Netfinity 10/100";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_1229_1014_2205[] = "ThinkPad A22p";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_1229_1014_305c[] = "10/100 EtherJet Management Adapter";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -12967,6 +13624,9 @@ static const char pci_subsys_8086_1229_1014_705c[] = "10/100 Netfinity 10/100 Et
 static const char pci_subsys_8086_1229_1014_805c[] = "10/100 Netfinity 10/100 Ethernet Security Adapter";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_1229_1028_009b[] = "PowerEdge 2550";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_1229_1033_8000[] = "PC-9821X-B06";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -13318,6 +13978,9 @@ static const char pci_subsys_8086_1361_8086_8000[] = "82806AA PCI64 Hub Controll
 #endif
 static const char pci_device_8086_1460[] = "82870P2 P64H2 Hub PCI Bridge";
 static const char pci_device_8086_1461[] = "82870P2 P64H2 I/OxAPIC";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_1461_15d9_3480[] = "P4DP6";
+#endif
 static const char pci_device_8086_1462[] = "82870P2 P64H2 Hot Plug Controller";
 static const char pci_device_8086_1960[] = "80960RP [i960RP Microprocessor]";
 #ifdef INIT_SUBSYS_INFO
@@ -13424,6 +14087,12 @@ static const char pci_device_8086_2428[] = "82801AB PCI Bridge";
 static const char pci_device_8086_2440[] = "82801BA ISA Bridge (LPC)";
 static const char pci_device_8086_2442[] = "82801BA/BAM USB (Hub #1)";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2442_1014_01c6[] = "Netvista A40/A40p";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2442_1025_1016[] = "Travelmate 612 TX";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_2442_104d_80df[] = "Vaio PCG-FX403";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -13431,6 +14100,12 @@ static const char pci_subsys_8086_2442_147b_0507[] = "TH7II-RAID";
 #endif
 static const char pci_device_8086_2443[] = "82801BA/BAM SMBus";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2443_1014_01c6[] = "Netvista A40/A40p";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2443_1025_1016[] = "Travelmate 612 TX";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_2443_1043_8027[] = "TUSL2-C Mainboard";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -13441,6 +14116,9 @@ static const char pci_subsys_8086_2443_147b_0507[] = "TH7II-RAID";
 #endif
 static const char pci_device_8086_2444[] = "82801BA/BAM USB (Hub #2)";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2444_1025_1016[] = "Travelmate 612 TX";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_2444_104d_80df[] = "Vaio PCG-FX403";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -13448,6 +14126,12 @@ static const char pci_subsys_8086_2444_147b_0507[] = "TH7II-RAID";
 #endif
 static const char pci_device_8086_2445[] = "82801BA/BAM AC'97 Audio";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2445_1014_01c6[] = "Netvista A40/A40p";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2445_1025_1016[] = "Travelmate 612 TX";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_2445_104d_80df[] = "Vaio PCG-FX403";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -13456,7 +14140,10 @@ static const char pci_subsys_8086_2445_1462_3370[] = "STAC9721 AC";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_2445_147b_0507[] = "TH7II-RAID";
 #endif
-static const char pci_device_8086_2446[] = "82801BA/BAM AC'97 Modem";
+static const char pci_device_8086_2446[] = "Intel 537 [82801BA/BAM AC'97 Modem]";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2446_1025_1016[] = "Travelmate 612 TX";
+#endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_2446_104d_80df[] = "Vaio PCG-FX403";
 #endif
@@ -13549,6 +14236,9 @@ static const char pci_subsys_8086_244a_104d_80df[] = "Vaio PCG-FX403";
 #endif
 static const char pci_device_8086_244b[] = "82801BA IDE U100";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_244b_1014_01c6[] = "Netvista A40/A40p";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_244b_1043_8027[] = "TUSL2-C Mainboard";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -13566,70 +14256,145 @@ static const char pci_device_8086_245e[] = "82801E PCI Bridge";
 static const char pci_device_8086_2480[] = "82801CA ISA Bridge (LPC)";
 static const char pci_device_8086_2482[] = "82801CA/CAM USB (Hub #1)";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_2482_1014_0220[] = "ThinkPad T23 (2647-4MG) or A30p (2653-64G)";
+static const char pci_subsys_8086_2482_1014_0220[] = "ThinkPad A/T/X Series";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_2482_104d_80e7[] = "VAIO PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2482_15d9_3480[] = "P4DP6";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2482_8086_1958[] = "vpr Matrix 170B4";
+#endif
 static const char pci_device_8086_2483[] = "82801CA/CAM SMBus";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_2483_1014_0220[] = "ThinkPad T23 (2647-4MG) or A30p (2653-64G)";
+static const char pci_subsys_8086_2483_1014_0220[] = "ThinkPad A/T/X Series";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_2483_104d_80e7[] = "VAIO PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2483_15d9_3480[] = "P4DP6";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2483_8086_1958[] = "vpr Matrix 170B4";
+#endif
 static const char pci_device_8086_2484[] = "82801CA/CAM USB (Hub #2)";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_2484_1014_0220[] = "ThinkPad T23 (2647-4MG) or A30p (2653-64G)";
+static const char pci_subsys_8086_2484_1014_0220[] = "ThinkPad A/T/X Series";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_2484_104d_80e7[] = "VAIO PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2484_15d9_3480[] = "P4DP6";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2484_8086_1958[] = "vpr Matrix 170B4";
+#endif
 static const char pci_device_8086_2485[] = "82801CA/CAM AC'97 Audio";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_2485_1014_0222[] = "ThinkPad T23 (2647-4MG) or A30p (2653-64G)";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2485_1014_0508[] = "ThinkPad T30";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2485_1014_051c[] = "ThinkPad A/T/X Series";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_2485_104d_80e7[] = "VAIO PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2485_144d_c006[] = "vpr Matrix 170B4";
+#endif
 static const char pci_device_8086_2486[] = "82801CA/CAM AC'97 Modem";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_2486_1014_0223[] = "ThinkPad A30p (2653-64G)";
+static const char pci_subsys_8086_2486_1014_0223[] = "ThinkPad A/T/X Series";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_2486_1014_0503[] = "ThinkPad R31 2656BBG";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2486_1014_051a[] = "ThinkPad A/T/X Series";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_2486_104d_80e7[] = "VAIO PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2486_1179_0001[] = "Toshiba Satellite 1110 Z15 internal Modem";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_2486_134d_4c21[] = "Dell Inspiron 2100 internal modem";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2486_144d_2115[] = "vpr Matrix 170B4 internal modem";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2486_14f1_5421[] = "MD56ORD V.92 MDC Modem";
+#endif
 static const char pci_device_8086_2487[] = "82801CA/CAM USB (Hub #3)";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_2487_1014_0220[] = "ThinkPad T23 (2647-4MG) or A30p (2653-64G)";
+static const char pci_subsys_8086_2487_1014_0220[] = "ThinkPad A/T/X Series";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_2487_104d_80e7[] = "VAIO PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2487_15d9_3480[] = "P4DP6";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2487_8086_1958[] = "vpr Matrix 170B4";
+#endif
 static const char pci_device_8086_248a[] = "82801CAM IDE U100";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_248a_1014_0220[] = "ThinkPad T23 (2647-4MG) or A30p (2653-64G)";
+static const char pci_subsys_8086_248a_1014_0220[] = "ThinkPad A/T/X Series";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_248a_104d_80e7[] = "VAIO PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_248a_8086_1958[] = "vpr Matrix 170B4";
+#endif
 static const char pci_device_8086_248b[] = "82801CA IDE U100";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_248b_15d9_3480[] = "P4DP6";
+#endif
 static const char pci_device_8086_248c[] = "82801CAM ISA Bridge (LPC)";
 static const char pci_device_8086_24c0[] = "82801DB ISA Bridge (LPC)";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24c0_1462_5800[] = "845PE Max (MS-6580)";
+#endif
 static const char pci_device_8086_24c2[] = "82801DB USB (Hub #1)";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24c2_1462_5800[] = "845PE Max (MS-6580)";
+#endif
 static const char pci_device_8086_24c3[] = "82801DB SMBus";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24c3_1462_5800[] = "845PE Max (MS-6580)";
+#endif
 static const char pci_device_8086_24c4[] = "82801DB USB (Hub #2)";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24c4_1462_5800[] = "845PE Max (MS-6580)";
+#endif
 static const char pci_device_8086_24c5[] = "82801DB AC'97 Audio";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24c5_1462_5800[] = "845PE Max (MS-6580)";
+#endif
 static const char pci_device_8086_24c6[] = "82801DB AC'97 Modem";
 static const char pci_device_8086_24c7[] = "82801DB USB (Hub #3)";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24c7_1462_5800[] = "845PE Max (MS-6580)";
+#endif
 static const char pci_device_8086_24cb[] = "82801DB ICH4 IDE";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24cb_1462_5800[] = "845PE Max (MS-6580)";
+#endif
 static const char pci_device_8086_24cd[] = "82801DB USB EHCI Controller";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24cd_1462_3981[] = "845PE Max (MS-6580) Onboard USB EHCI Controller";
+#endif
 static const char pci_device_8086_2500[] = "82820 820 (Camino) Chipset Host Bridge (MCH)";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_2500_1028_0095[] = "Precision Workstation 220 Chipset";
@@ -13654,7 +14419,13 @@ static const char pci_device_8086_2532[] = "82850 850 (Tehama) Chipset AGP Bridg
 static const char pci_device_8086_2533[] = "82860 860 (Wombat) Chipset AGP Bridge";
 static const char pci_device_8086_2534[] = "82860 860 (Wombat) Chipset PCI Bridge";
 static const char pci_device_8086_2540[] = "e7500 [Plumas] DRAM Controller";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2540_15d9_3480[] = "P4DP6";
+#endif
 static const char pci_device_8086_2541[] = "e7500 [Plumas] DRAM Controller Error Reporting";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2541_15d9_3480[] = "P4DP6";
+#endif
 static const char pci_device_8086_2543[] = "e7500 [Plumas] HI_B Virtual PCI Bridge (F0)";
 static const char pci_device_8086_2544[] = "e7500 [Plumas] HI_B Virtual PCI Bridge (F1)";
 static const char pci_device_8086_2545[] = "e7500 [Plumas] HI_C Virtual PCI Bridge (F0)";
@@ -13662,19 +14433,29 @@ static const char pci_device_8086_2546[] = "e7500 [Plumas] HI_C Virtual PCI Brid
 static const char pci_device_8086_2547[] = "e7500 [Plumas] HI_D Virtual PCI Bridge (F0)";
 static const char pci_device_8086_2548[] = "e7500 [Plumas] HI_D Virtual PCI Bridge (F1)";
 static const char pci_device_8086_2560[] = "82845G/GL [Brookdale-G] Chipset Host Bridge";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2560_1462_5800[] = "845PE Max (MS-6580)";
+#endif
 static const char pci_device_8086_2561[] = "82845G/GL [Brookdale-G] Chipset AGP Bridge";
 static const char pci_device_8086_2562[] = "82845G/GL [Brookdale-G] Chipset Integrated Graphics Device";
+static const char pci_device_8086_2570[] = "865G Chipset Host-Hub Bridge";
+static const char pci_device_8086_2572[] = "865G Chipset Graphics Controller";
 static const char pci_device_8086_3092[] = "Integrated RAID";
 static const char pci_device_8086_3575[] = "82830 830 Chipset Host Bridge";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_3575_1014_021d[] = "ThinkPad T23 (2647-4MG) or A30p (2653-64G)";
+static const char pci_subsys_8086_3575_1014_021d[] = "ThinkPad A/T/X Series";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_3575_104d_80e7[] = "VAIO PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP";
 #endif
 static const char pci_device_8086_3576[] = "82830 830 Chipset AGP Bridge";
 static const char pci_device_8086_3577[] = "82830 CGC [Chipset Graphics Controller]";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_3577_1014_0513[] = "ThinkPad A/T/X Series";
+#endif
 static const char pci_device_8086_3578[] = "82830 830 Chipset Host Bridge";
+static const char pci_device_8086_3580[] = "852GM/852GME/855GM/855GME Chipset Host-Hub Bridge";
+static const char pci_device_8086_3582[] = "852GM/852GME/855GM/855GME Chipset Graphics Controller";
 static const char pci_device_8086_5200[] = "EtherExpress PRO/100 Intelligent Server";
 static const char pci_device_8086_5201[] = "EtherExpress PRO/100 Intelligent Server";
 #ifdef INIT_SUBSYS_INFO
@@ -13706,6 +14487,9 @@ static const char pci_device_8086_7190[] = "440BX/ZX/DX - 82443BX/ZX/DX Host bri
 static const char pci_subsys_8086_7190_0e11_0500[] = "Armada 1750 Laptop System Chipset";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_7190_0e11_b110[] = "Armada M700";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_7190_1179_0001[] = "Toshiba Tecra 8100 Laptop System Chipset";
 #endif
 static const char pci_device_8086_7191[] = "440BX/ZX/DX - 82443BX/ZX/DX AGP bridge";
@@ -14035,6 +14819,12 @@ static const char pci_subsys_9005_0081_9005_62a1[] = "19160 Ultra160 SCSI Contro
 #endif
 static const char pci_device_9005_0083[] = "AIC-7892D U160/m";
 static const char pci_device_9005_008f[] = "AIC-7892P U160/m";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_9005_008f_1179_0001[] = "Magnia Z310";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_9005_008f_15d9_9005[] = "Onboard SCSI Host Adapter";
+#endif
 static const char pci_device_9005_00c0[] = "AHA-3960D / AIC-7899A U160/m";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -14047,7 +14837,23 @@ static const char pci_subsys_9005_00c0_9005_f620[] = "AHA-3960D U160/m";
 static const char pci_device_9005_00c1[] = "AIC-7899B U160/m";
 static const char pci_device_9005_00c3[] = "AIC-7899D U160/m";
 static const char pci_device_9005_00c5[] = "RAID subsystem HBA";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_9005_00c5_1028_00c5[] = "PowerEdge 2550";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_device_9005_00cf[] = "AIC-7899P U160/m";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_9005_00cf_1028_00d1[] = "PowerEdge 2550";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_9005_00cf_10f1_2462[] = "Thunder K7 S2462";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_9005_00cf_15d9_9005[] = "Onboard SCSI Host Adapter";
+#endif
 static const char pci_device_9005_0250[] = "ServeRAID Controller";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_9005_0250_1014_0279[] = "ServeRAID-xx";
@@ -14137,6 +14943,9 @@ static const char pci_vendor_ac1e[] = "Digital Receiver Technology Inc";
 static const char pci_vendor_b1b3[] = "Shiva Europe Limited";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_bd11[] = "Pinnacle Systems, Inc. (Wrong ID)";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_c001[] = "TSI Telsys";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -14160,6 +14969,7 @@ static const char pci_vendor_cccc[] = "Catapult Communications";
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_cddd[] = "Tyzx, Inc.";
 static const char pci_device_cddd_0101[] = "DeepSea 1 High Speed Stereo Vision Frame Grabber";
+static const char pci_device_cddd_0200[] = "DeepSea 2 High Speed Stereo Vision Frame Grabber";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_d4d4[] = "Dy4 Systems Inc";
@@ -14180,7 +14990,7 @@ static const char pci_device_e000_e000[] = "W89C940";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_e159[] = "Tiger Jet Network Inc.";
-static const char pci_device_e159_0001[] = "Model 300 128k";
+static const char pci_device_e159_0001[] = "Intel 537";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_e159_0001_0059_0001[] = "128k ISDN-S/T Adapter";
 #endif
@@ -14196,6 +15006,12 @@ static const char pci_vendor_e4bf[] = "EKF Elektronik GmbH";
 static const char pci_vendor_ea01[] = "Eagle Technology";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_ea60[] = "RME";
+static const char pci_device_ea60_9896[] = "Digi32";
+static const char pci_device_ea60_9897[] = "Digi32 Pro";
+static const char pci_device_ea60_9898[] = "Digi32/8";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_eabb[] = "Aashima Technology B.V.";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -14217,7 +15033,14 @@ static const char pci_vendor_ec80[] = "Belkin Corporation";
 static const char pci_device_ec80_ec00[] = "F5D6000";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
-static const char pci_vendor_ecc0[] = "Echo Corporation";
+static const char pci_vendor_ecc0[] = "Echo Digital Audio Corporation";
+static const char pci_device_ecc0_0050[] = "Gina24_301";
+static const char pci_device_ecc0_0051[] = "Gina24_361";
+static const char pci_device_ecc0_0060[] = "Layla24";
+static const char pci_device_ecc0_0070[] = "Mona_301_80";
+static const char pci_device_ecc0_0071[] = "Mona_301_66";
+static const char pci_device_ecc0_0072[] = "Mona_361";
+static const char pci_device_ecc0_0080[] = "Mia";
 #endif
 static const char pci_vendor_edd8[] = "ARK Logic Inc";
 static const char pci_device_edd8_a091[] = "1000PV [Stingray]";
@@ -14226,6 +15049,7 @@ static const char pci_device_edd8_a0a1[] = "2000MT";
 static const char pci_device_edd8_a0a9[] = "2000MI";
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_f1d0[] = "AJA Video";
+static const char pci_device_f1d0_cafe[] = "KONA SD SMPTE 259M I/O";
 static const char pci_device_f1d0_efac[] = "KONA SD SMPTE 259M I/O";
 static const char pci_device_f1d0_facd[] = "KONA HD SMPTE 292M I/O";
 #endif
@@ -14236,7 +15060,9 @@ static const char pci_vendor_fa57[] = "Fast Search & Transfer ASA";
 static const char pci_vendor_febd[] = "Ultraview Corp.";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
-static const char pci_vendor_feda[] = "Epigram Inc";
+static const char pci_vendor_feda[] = "Broadcom Inc (nee Epigram)";
+static const char pci_device_feda_a0fa[] = "BCM4210 iLine10 HomePNA 2.0";
+static const char pci_device_feda_a10e[] = "BCM4230 iLine10 HomePNA 2.0";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_fffe[] = "VMWare Inc";
@@ -14244,7 +15070,6 @@ static const char pci_device_fffe_0710[] = "Virtual SVGA";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_ffff[] = "Illegal Vendor ID";
-static const char pci_device_ffff_0c30[] = "F69030";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const pciSubsystemInfo pci_ss_info_0e11_a0f7_8086_002a =
@@ -14493,6 +15318,14 @@ static const pciSubsystemInfo pci_ss_info_1002_4752_1002_4752 =
 	{0x1002, 0x4752, pci_subsys_1002_4752_1002_4752, 0};
 #undef pci_ss_info_1002_4752
 #define pci_ss_info_1002_4752 pci_ss_info_1002_4752_1002_4752
+static const pciSubsystemInfo pci_ss_info_1002_4752_1002_8008 =
+	{0x1002, 0x8008, pci_subsys_1002_4752_1002_8008, 0};
+#undef pci_ss_info_1002_8008
+#define pci_ss_info_1002_8008 pci_ss_info_1002_4752_1002_8008
+static const pciSubsystemInfo pci_ss_info_1002_4752_1028_00d1 =
+	{0x1028, 0x00d1, pci_subsys_1002_4752_1028_00d1, 0};
+#undef pci_ss_info_1028_00d1
+#define pci_ss_info_1028_00d1 pci_ss_info_1002_4752_1028_00d1
 static const pciSubsystemInfo pci_ss_info_1002_4753_1002_4753 =
 	{0x1002, 0x4753, pci_subsys_1002_4753_1002_4753, 0};
 #undef pci_ss_info_1002_4753
@@ -14529,6 +15362,38 @@ static const pciSubsystemInfo pci_ss_info_1002_475a_1002_475a =
 	{0x1002, 0x475a, pci_subsys_1002_475a_1002_475a, 0};
 #undef pci_ss_info_1002_475a
 #define pci_ss_info_1002_475a pci_ss_info_1002_475a_1002_475a
+static const pciSubsystemInfo pci_ss_info_1002_4966_10f1_0002 =
+	{0x10f1, 0x0002, pci_subsys_1002_4966_10f1_0002, 0};
+#undef pci_ss_info_10f1_0002
+#define pci_ss_info_10f1_0002 pci_ss_info_1002_4966_10f1_0002
+static const pciSubsystemInfo pci_ss_info_1002_4966_148c_2039 =
+	{0x148c, 0x2039, pci_subsys_1002_4966_148c_2039, 0};
+#undef pci_ss_info_148c_2039
+#define pci_ss_info_148c_2039 pci_ss_info_1002_4966_148c_2039
+static const pciSubsystemInfo pci_ss_info_1002_4966_1509_9a00 =
+	{0x1509, 0x9a00, pci_subsys_1002_4966_1509_9a00, 0};
+#undef pci_ss_info_1509_9a00
+#define pci_ss_info_1509_9a00 pci_ss_info_1002_4966_1509_9a00
+static const pciSubsystemInfo pci_ss_info_1002_4966_1681_0040 =
+	{0x1681, 0x0040, pci_subsys_1002_4966_1681_0040, 0};
+#undef pci_ss_info_1681_0040
+#define pci_ss_info_1681_0040 pci_ss_info_1002_4966_1681_0040
+static const pciSubsystemInfo pci_ss_info_1002_4966_174b_7176 =
+	{0x174b, 0x7176, pci_subsys_1002_4966_174b_7176, 0};
+#undef pci_ss_info_174b_7176
+#define pci_ss_info_174b_7176 pci_ss_info_1002_4966_174b_7176
+static const pciSubsystemInfo pci_ss_info_1002_4966_174b_7192 =
+	{0x174b, 0x7192, pci_subsys_1002_4966_174b_7192, 0};
+#undef pci_ss_info_174b_7192
+#define pci_ss_info_174b_7192 pci_ss_info_1002_4966_174b_7192
+static const pciSubsystemInfo pci_ss_info_1002_4966_17af_2005 =
+	{0x17af, 0x2005, pci_subsys_1002_4966_17af_2005, 0};
+#undef pci_ss_info_17af_2005
+#define pci_ss_info_17af_2005 pci_ss_info_1002_4966_17af_2005
+static const pciSubsystemInfo pci_ss_info_1002_4966_17af_2006 =
+	{0x17af, 0x2006, pci_subsys_1002_4966_17af_2006, 0};
+#undef pci_ss_info_17af_2006
+#define pci_ss_info_17af_2006 pci_ss_info_1002_4966_17af_2006
 static const pciSubsystemInfo pci_ss_info_1002_4c42_0e11_b0e8 =
 	{0x0e11, 0xb0e8, pci_subsys_1002_4c42_0e11_b0e8, 0};
 #undef pci_ss_info_0e11_b0e8
@@ -14573,18 +15438,34 @@ static const pciSubsystemInfo pci_ss_info_1002_4c49_1002_4c49 =
 	{0x1002, 0x4c49, pci_subsys_1002_4c49_1002_4c49, 0};
 #undef pci_ss_info_1002_4c49
 #define pci_ss_info_1002_4c49 pci_ss_info_1002_4c49_1002_4c49
+static const pciSubsystemInfo pci_ss_info_1002_4c4d_0e11_b111 =
+	{0x0e11, 0xb111, pci_subsys_1002_4c4d_0e11_b111, 0};
+#undef pci_ss_info_0e11_b111
+#define pci_ss_info_0e11_b111 pci_ss_info_1002_4c4d_0e11_b111
 static const pciSubsystemInfo pci_ss_info_1002_4c4d_1002_0084 =
 	{0x1002, 0x0084, pci_subsys_1002_4c4d_1002_0084, 0};
 #undef pci_ss_info_1002_0084
 #define pci_ss_info_1002_0084 pci_ss_info_1002_4c4d_1002_0084
+static const pciSubsystemInfo pci_ss_info_1002_4c4d_1014_0154 =
+	{0x1014, 0x0154, pci_subsys_1002_4c4d_1014_0154, 0};
+#undef pci_ss_info_1014_0154
+#define pci_ss_info_1014_0154 pci_ss_info_1002_4c4d_1014_0154
 static const pciSubsystemInfo pci_ss_info_1002_4c50_1002_4c50 =
 	{0x1002, 0x4c50, pci_subsys_1002_4c50_1002_4c50, 0};
 #undef pci_ss_info_1002_4c50
 #define pci_ss_info_1002_4c50 pci_ss_info_1002_4c50_1002_4c50
+static const pciSubsystemInfo pci_ss_info_1002_4c57_1014_0517 =
+	{0x1014, 0x0517, pci_subsys_1002_4c57_1014_0517, 0};
+#undef pci_ss_info_1014_0517
+#define pci_ss_info_1014_0517 pci_ss_info_1002_4c57_1014_0517
 static const pciSubsystemInfo pci_ss_info_1002_4c57_1028_00e6 =
 	{0x1028, 0x00e6, pci_subsys_1002_4c57_1028_00e6, 0};
 #undef pci_ss_info_1028_00e6
 #define pci_ss_info_1028_00e6 pci_ss_info_1002_4c57_1028_00e6
+static const pciSubsystemInfo pci_ss_info_1002_4c57_144d_c006 =
+	{0x144d, 0xc006, pci_subsys_1002_4c57_144d_c006, 0};
+#undef pci_ss_info_144d_c006
+#define pci_ss_info_144d_c006 pci_ss_info_1002_4c57_144d_c006
 static const pciSubsystemInfo pci_ss_info_1002_4c59_1014_0235 =
 	{0x1014, 0x0235, pci_subsys_1002_4c59_1014_0235, 0};
 #undef pci_ss_info_1014_0235
@@ -14697,10 +15578,18 @@ static const pciSubsystemInfo pci_ss_info_1002_5144_1002_053a =
 	{0x1002, 0x053a, pci_subsys_1002_5144_1002_053a, 0};
 #undef pci_ss_info_1002_053a
 #define pci_ss_info_1002_053a pci_ss_info_1002_5144_1002_053a
+static const pciSubsystemInfo pci_ss_info_1002_5148_1002_010a =
+	{0x1002, 0x010a, pci_subsys_1002_5148_1002_010a, 0};
+#undef pci_ss_info_1002_010a
+#define pci_ss_info_1002_010a pci_ss_info_1002_5148_1002_010a
 static const pciSubsystemInfo pci_ss_info_1002_5148_1002_0152 =
 	{0x1002, 0x0152, pci_subsys_1002_5148_1002_0152, 0};
 #undef pci_ss_info_1002_0152
 #define pci_ss_info_1002_0152 pci_ss_info_1002_5148_1002_0152
+static const pciSubsystemInfo pci_ss_info_1002_5148_1002_0162 =
+	{0x1002, 0x0162, pci_subsys_1002_5148_1002_0162, 0};
+#undef pci_ss_info_1002_0162
+#define pci_ss_info_1002_0162 pci_ss_info_1002_5148_1002_0162
 static const pciSubsystemInfo pci_ss_info_1002_5148_1002_0172 =
 	{0x1002, 0x0172, pci_subsys_1002_5148_1002_0172, 0};
 #undef pci_ss_info_1002_0172
@@ -14713,6 +15602,10 @@ static const pciSubsystemInfo pci_ss_info_1002_514c_1002_013a =
 	{0x1002, 0x013a, pci_subsys_1002_514c_1002_013a, 0};
 #undef pci_ss_info_1002_013a
 #define pci_ss_info_1002_013a pci_ss_info_1002_514c_1002_013a
+static const pciSubsystemInfo pci_ss_info_1002_514c_148c_2026 =
+	{0x148c, 0x2026, pci_subsys_1002_514c_148c_2026, 0};
+#undef pci_ss_info_148c_2026
+#define pci_ss_info_148c_2026 pci_ss_info_1002_514c_148c_2026
 static const pciSubsystemInfo pci_ss_info_1002_514c_174b_7149 =
 	{0x174b, 0x7149, pci_subsys_1002_514c_174b_7149, 0};
 #undef pci_ss_info_174b_7149
@@ -14721,10 +15614,34 @@ static const pciSubsystemInfo pci_ss_info_1002_5157_1002_013a =
 	{0x1002, 0x013a, pci_subsys_1002_5157_1002_013a, 0};
 #undef pci_ss_info_1002_013a
 #define pci_ss_info_1002_013a pci_ss_info_1002_5157_1002_013a
+static const pciSubsystemInfo pci_ss_info_1002_5157_1458_4000 =
+	{0x1458, 0x4000, pci_subsys_1002_5157_1458_4000, 0};
+#undef pci_ss_info_1458_4000
+#define pci_ss_info_1458_4000 pci_ss_info_1002_5157_1458_4000
+static const pciSubsystemInfo pci_ss_info_1002_5157_148c_2024 =
+	{0x148c, 0x2024, pci_subsys_1002_5157_148c_2024, 0};
+#undef pci_ss_info_148c_2024
+#define pci_ss_info_148c_2024 pci_ss_info_1002_5157_148c_2024
+static const pciSubsystemInfo pci_ss_info_1002_5157_148c_2025 =
+	{0x148c, 0x2025, pci_subsys_1002_5157_148c_2025, 0};
+#undef pci_ss_info_148c_2025
+#define pci_ss_info_148c_2025 pci_ss_info_1002_5157_148c_2025
+static const pciSubsystemInfo pci_ss_info_1002_5157_148c_2036 =
+	{0x148c, 0x2036, pci_subsys_1002_5157_148c_2036, 0};
+#undef pci_ss_info_148c_2036
+#define pci_ss_info_148c_2036 pci_ss_info_1002_5157_148c_2036
+static const pciSubsystemInfo pci_ss_info_1002_5157_174b_7147 =
+	{0x174b, 0x7147, pci_subsys_1002_5157_174b_7147, 0};
+#undef pci_ss_info_174b_7147
+#define pci_ss_info_174b_7147 pci_ss_info_1002_5157_174b_7147
 static const pciSubsystemInfo pci_ss_info_1002_5157_174b_7161 =
 	{0x174b, 0x7161, pci_subsys_1002_5157_174b_7161, 0};
 #undef pci_ss_info_174b_7161
 #define pci_ss_info_174b_7161 pci_ss_info_1002_5157_174b_7161
+static const pciSubsystemInfo pci_ss_info_1002_5157_17af_0202 =
+	{0x17af, 0x0202, pci_subsys_1002_5157_17af_0202, 0};
+#undef pci_ss_info_17af_0202
+#define pci_ss_info_17af_0202 pci_ss_info_1002_5157_17af_0202
 static const pciSubsystemInfo pci_ss_info_1002_5159_1002_000a =
 	{0x1002, 0x000a, pci_subsys_1002_5159_1002_000a, 0};
 #undef pci_ss_info_1002_000a
@@ -14749,10 +15666,26 @@ static const pciSubsystemInfo pci_ss_info_1002_5159_1002_013a =
 	{0x1002, 0x013a, pci_subsys_1002_5159_1002_013a, 0};
 #undef pci_ss_info_1002_013a
 #define pci_ss_info_1002_013a pci_ss_info_1002_5159_1002_013a
+static const pciSubsystemInfo pci_ss_info_1002_5159_1458_4002 =
+	{0x1458, 0x4002, pci_subsys_1002_5159_1458_4002, 0};
+#undef pci_ss_info_1458_4002
+#define pci_ss_info_1458_4002 pci_ss_info_1002_5159_1458_4002
+static const pciSubsystemInfo pci_ss_info_1002_5159_148c_2003 =
+	{0x148c, 0x2003, pci_subsys_1002_5159_148c_2003, 0};
+#undef pci_ss_info_148c_2003
+#define pci_ss_info_148c_2003 pci_ss_info_1002_5159_148c_2003
+static const pciSubsystemInfo pci_ss_info_1002_5159_148c_2023 =
+	{0x148c, 0x2023, pci_subsys_1002_5159_148c_2023, 0};
+#undef pci_ss_info_148c_2023
+#define pci_ss_info_148c_2023 pci_ss_info_1002_5159_148c_2023
 static const pciSubsystemInfo pci_ss_info_1002_5159_174b_7112 =
 	{0x174b, 0x7112, pci_subsys_1002_5159_174b_7112, 0};
 #undef pci_ss_info_174b_7112
 #define pci_ss_info_174b_7112 pci_ss_info_1002_5159_174b_7112
+static const pciSubsystemInfo pci_ss_info_1002_5159_1787_0202 =
+	{0x1787, 0x0202, pci_subsys_1002_5159_1787_0202, 0};
+#undef pci_ss_info_1787_0202
+#define pci_ss_info_1787_0202 pci_ss_info_1002_5159_1787_0202
 static const pciSubsystemInfo pci_ss_info_1002_5245_1002_0008 =
 	{0x1002, 0x0008, pci_subsys_1002_5245_1002_0008, 0};
 #undef pci_ss_info_1002_0008
@@ -15083,6 +16016,10 @@ static const pciSubsystemInfo pci_ss_info_1011_0019_1374_0008 =
 	{0x1374, 0x0008, pci_subsys_1011_0019_1374_0008, 0};
 #undef pci_ss_info_1374_0008
 #define pci_ss_info_1374_0008 pci_ss_info_1011_0019_1374_0008
+static const pciSubsystemInfo pci_ss_info_1011_0019_1385_2100 =
+	{0x1385, 0x2100, pci_subsys_1011_0019_1385_2100, 0};
+#undef pci_ss_info_1385_2100
+#define pci_ss_info_1385_2100 pci_ss_info_1011_0019_1385_2100
 static const pciSubsystemInfo pci_ss_info_1011_0019_1395_0001 =
 	{0x1395, 0x0001, pci_subsys_1011_0019_1395_0001, 0};
 #undef pci_ss_info_1395_0001
@@ -15163,6 +16100,10 @@ static const pciSubsystemInfo pci_ss_info_1013_6003_1681_0050 =
 	{0x1681, 0x0050, pci_subsys_1013_6003_1681_0050, 0};
 #undef pci_ss_info_1681_0050
 #define pci_ss_info_1681_0050 pci_ss_info_1013_6003_1681_0050
+static const pciSubsystemInfo pci_ss_info_1013_6003_1681_a011 =
+	{0x1681, 0xa011, pci_subsys_1013_6003_1681_a011, 0};
+#undef pci_ss_info_1681_a011
+#define pci_ss_info_1681_a011 pci_ss_info_1013_6003_1681_a011
 static const pciSubsystemInfo pci_ss_info_1013_6005_1013_4281 =
 	{0x1013, 0x4281, pci_subsys_1013_6005_1013_4281, 0};
 #undef pci_ss_info_1013_4281
@@ -15256,10 +16197,6 @@ static const pciSubsystemInfo pci_ss_info_1014_0096_1014_0099 =
 	{0x1014, 0x0099, pci_subsys_1014_0096_1014_0099, 0};
 #undef pci_ss_info_1014_0099
 #define pci_ss_info_1014_0099 pci_ss_info_1014_0096_1014_0099
-static const pciSubsystemInfo pci_ss_info_1014_00b7_1902_00b8 =
-	{0x1902, 0x00b8, pci_subsys_1014_00b7_1902_00b8, 0};
-#undef pci_ss_info_1902_00b8
-#define pci_ss_info_1902_00b8 pci_ss_info_1014_00b7_1902_00b8
 static const pciSubsystemInfo pci_ss_info_1014_0142_1014_0143 =
 	{0x1014, 0x0143, pci_subsys_1014_0142_1014_0143, 0};
 #undef pci_ss_info_1014_0143
@@ -15419,6 +16356,10 @@ static const pciSubsystemInfo pci_ss_info_1023_8520_1023_8520 =
 	{0x1023, 0x8520, pci_subsys_1023_8520_1023_8520, 0};
 #undef pci_ss_info_1023_8520
 #define pci_ss_info_1023_8520 pci_ss_info_1023_8520_1023_8520
+static const pciSubsystemInfo pci_ss_info_1023_8620_1014_0502 =
+	{0x1014, 0x0502, pci_subsys_1023_8620_1014_0502, 0};
+#undef pci_ss_info_1014_0502
+#define pci_ss_info_1014_0502 pci_ss_info_1023_8620_1014_0502
 static const pciSubsystemInfo pci_ss_info_1023_9525_10cf_1094 =
 	{0x10cf, 0x1094, pci_subsys_1023_9525_10cf_1094, 0};
 #undef pci_ss_info_10cf_1094
@@ -15479,10 +16420,6 @@ static const pciSubsystemInfo pci_ss_info_1028_0004_1028_00d0 =
 	{0x1028, 0x00d0, pci_subsys_1028_0004_1028_00d0, 0};
 #undef pci_ss_info_1028_00d0
 #define pci_ss_info_1028_00d0 pci_ss_info_1028_0004_1028_00d0
-static const pciSubsystemInfo pci_ss_info_1028_000a_1027_0121 =
-	{0x1027, 0x0121, pci_subsys_1028_000a_1027_0121, 0};
-#undef pci_ss_info_1027_0121
-#define pci_ss_info_1027_0121 pci_ss_info_1028_000a_1027_0121
 static const pciSubsystemInfo pci_ss_info_1028_000a_1028_0106 =
 	{0x1028, 0x0106, pci_subsys_1028_000a_1028_0106, 0};
 #undef pci_ss_info_1028_0106
@@ -15491,6 +16428,14 @@ static const pciSubsystemInfo pci_ss_info_1028_000a_1028_011b =
 	{0x1028, 0x011b, pci_subsys_1028_000a_1028_011b, 0};
 #undef pci_ss_info_1028_011b
 #define pci_ss_info_1028_011b pci_ss_info_1028_000a_1028_011b
+static const pciSubsystemInfo pci_ss_info_1028_000a_1028_0121 =
+	{0x1028, 0x0121, pci_subsys_1028_000a_1028_0121, 0};
+#undef pci_ss_info_1028_0121
+#define pci_ss_info_1028_0121 pci_ss_info_1028_000a_1028_0121
+static const pciSubsystemInfo pci_ss_info_102b_051a_102b_0100 =
+	{0x102b, 0x0100, pci_subsys_102b_051a_102b_0100, 0};
+#undef pci_ss_info_102b_0100
+#define pci_ss_info_102b_0100 pci_ss_info_102b_051a_102b_0100
 static const pciSubsystemInfo pci_ss_info_102b_051a_102b_1100 =
 	{0x102b, 0x1100, pci_subsys_102b_051a_102b_1100, 0};
 #undef pci_ss_info_102b_1100
@@ -15859,10 +16804,6 @@ static const pciSubsystemInfo pci_ss_info_102b_0525_1705_0004 =
 	{0x1705, 0x0004, pci_subsys_102b_0525_1705_0004, 0};
 #undef pci_ss_info_1705_0004
 #define pci_ss_info_1705_0004 pci_ss_info_102b_0525_1705_0004
-static const pciSubsystemInfo pci_ss_info_102b_0525_b16f_0e11 =
-	{0xb16f, 0x0e11, pci_subsys_102b_0525_b16f_0e11, 0};
-#undef pci_ss_info_b16f_0e11
-#define pci_ss_info_b16f_0e11 pci_ss_info_102b_0525_b16f_0e11
 static const pciSubsystemInfo pci_ss_info_102b_0527_102b_0840 =
 	{0x102b, 0x0840, pci_subsys_102b_0527_102b_0840, 0};
 #undef pci_ss_info_102b_0840
@@ -16001,10 +16942,18 @@ static const pciSubsystemInfo pci_ss_info_1039_0900_1039_0900 =
 	{0x1039, 0x0900, pci_subsys_1039_0900_1039_0900, 0};
 #undef pci_ss_info_1039_0900
 #define pci_ss_info_1039_0900 pci_ss_info_1039_0900_1039_0900
+static const pciSubsystemInfo pci_ss_info_1039_5513_1019_0970 =
+	{0x1019, 0x0970, pci_subsys_1039_5513_1019_0970, 0};
+#undef pci_ss_info_1019_0970
+#define pci_ss_info_1019_0970 pci_ss_info_1039_5513_1019_0970
 static const pciSubsystemInfo pci_ss_info_1039_5513_1039_5513 =
 	{0x1039, 0x5513, pci_subsys_1039_5513_1039_5513, 0};
 #undef pci_ss_info_1039_5513
 #define pci_ss_info_1039_5513 pci_ss_info_1039_5513_1039_5513
+static const pciSubsystemInfo pci_ss_info_1039_6300_1019_0970 =
+	{0x1019, 0x0970, pci_subsys_1039_6300_1019_0970, 0};
+#undef pci_ss_info_1019_0970
+#define pci_ss_info_1019_0970 pci_ss_info_1039_6300_1019_0970
 static const pciSubsystemInfo pci_ss_info_1039_6306_1039_6306 =
 	{0x1039, 0x6306, pci_subsys_1039_6306_1039_6306, 0};
 #undef pci_ss_info_1039_6306
@@ -16037,6 +16986,10 @@ static const pciSubsystemInfo pci_ss_info_1039_7001_1039_7000 =
 	{0x1039, 0x7000, pci_subsys_1039_7001_1039_7000, 0};
 #undef pci_ss_info_1039_7000
 #define pci_ss_info_1039_7000 pci_ss_info_1039_7001_1039_7000
+static const pciSubsystemInfo pci_ss_info_1039_7002_1509_7002 =
+	{0x1509, 0x7002, pci_subsys_1039_7002_1509_7002, 0};
+#undef pci_ss_info_1509_7002
+#define pci_ss_info_1509_7002 pci_ss_info_1039_7002_1509_7002
 static const pciSubsystemInfo pci_ss_info_1039_7016_1039_7016 =
 	{0x1039, 0x7016, pci_subsys_1039_7016_1039_7016, 0};
 #undef pci_ss_info_1039_7016
@@ -16129,7 +17082,6 @@ static const pciSubsystemInfo pci_ss_info_1039_7018_a0a0_0022 =
 	{0xa0a0, 0x0022, pci_subsys_1039_7018_a0a0_0022, 0};
 #undef pci_ss_info_a0a0_0022
 #define pci_ss_info_a0a0_0022 pci_ss_info_1039_7018_a0a0_0022
-#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo pci_ss_info_103c_1029_107e_000f =
 	{0x107e, 0x000f, pci_subsys_103c_1029_107e_000f, 0};
 #undef pci_ss_info_107e_000f
@@ -16194,7 +17146,6 @@ static const pciSubsystemInfo pci_ss_info_103c_1048_103c_1282 =
 	{0x103c, 0x1282, pci_subsys_103c_1048_103c_1282, 0};
 #undef pci_ss_info_103c_1282
 #define pci_ss_info_103c_1282 pci_ss_info_103c_1048_103c_1282
-#endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo pci_ss_info_1044_a501_1044_c001 =
 	{0x1044, 0xc001, pci_subsys_1044_a501_1044_c001, 0};
@@ -16457,6 +17408,10 @@ static const pciSubsystemInfo pci_ss_info_104c_8027_1028_00e6 =
 	{0x1028, 0x00e6, pci_subsys_104c_8027_1028_00e6, 0};
 #undef pci_ss_info_1028_00e6
 #define pci_ss_info_1028_00e6 pci_ss_info_104c_8027_1028_00e6
+static const pciSubsystemInfo pci_ss_info_104c_ac1b_0e11_b113 =
+	{0x0e11, 0xb113, pci_subsys_104c_ac1b_0e11_b113, 0};
+#undef pci_ss_info_0e11_b113
+#define pci_ss_info_0e11_b113 pci_ss_info_104c_ac1b_0e11_b113
 static const pciSubsystemInfo pci_ss_info_104c_ac42_1028_00e6 =
 	{0x1028, 0x00e6, pci_subsys_104c_ac42_1028_00e6, 0};
 #undef pci_ss_info_1028_00e6
@@ -16473,6 +17428,10 @@ static const pciSubsystemInfo pci_ss_info_104c_ac51_e4bf_1000 =
 	{0xe4bf, 0x1000, pci_subsys_104c_ac51_e4bf_1000, 0};
 #undef pci_ss_info_e4bf_1000
 #define pci_ss_info_e4bf_1000 pci_ss_info_104c_ac51_e4bf_1000
+static const pciSubsystemInfo pci_ss_info_104c_ac55_1014_0512 =
+	{0x1014, 0x0512, pci_subsys_104c_ac55_1014_0512, 0};
+#undef pci_ss_info_1014_0512
+#define pci_ss_info_1014_0512 pci_ss_info_104c_ac55_1014_0512
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo pci_ss_info_1050_0840_1050_0001 =
 	{0x1050, 0x0001, pci_subsys_1050_0840_1050_0001, 0};
@@ -16841,6 +17800,14 @@ static const pciSubsystemInfo pci_ss_info_109e_036e_0070_ff01 =
 	{0x0070, 0xff01, pci_subsys_109e_036e_0070_ff01, 0};
 #undef pci_ss_info_0070_ff01
 #define pci_ss_info_0070_ff01 pci_ss_info_109e_036e_0070_ff01
+static const pciSubsystemInfo pci_ss_info_109e_036e_107d_6606 =
+	{0x107d, 0x6606, pci_subsys_109e_036e_107d_6606, 0};
+#undef pci_ss_info_107d_6606
+#define pci_ss_info_107d_6606 pci_ss_info_109e_036e_107d_6606
+static const pciSubsystemInfo pci_ss_info_109e_036e_11bd_0012 =
+	{0x11bd, 0x0012, pci_subsys_109e_036e_11bd_0012, 0};
+#undef pci_ss_info_11bd_0012
+#define pci_ss_info_11bd_0012 pci_ss_info_109e_036e_11bd_0012
 static const pciSubsystemInfo pci_ss_info_109e_036e_11bd_001c =
 	{0x11bd, 0x001c, pci_subsys_109e_036e_11bd_001c, 0};
 #undef pci_ss_info_11bd_001c
@@ -16897,6 +17864,10 @@ static const pciSubsystemInfo pci_ss_info_109e_036e_1852_1852 =
 	{0x1852, 0x1852, pci_subsys_109e_036e_1852_1852, 0};
 #undef pci_ss_info_1852_1852
 #define pci_ss_info_1852_1852 pci_ss_info_109e_036e_1852_1852
+static const pciSubsystemInfo pci_ss_info_109e_036e_bd11_1200 =
+	{0xbd11, 0x1200, pci_subsys_109e_036e_bd11_1200, 0};
+#undef pci_ss_info_bd11_1200
+#define pci_ss_info_bd11_1200 pci_ss_info_109e_036e_bd11_1200
 static const pciSubsystemInfo pci_ss_info_109e_036f_127a_0044 =
 	{0x127a, 0x0044, pci_subsys_109e_036f_127a_0044, 0};
 #undef pci_ss_info_127a_0044
@@ -17041,6 +18012,10 @@ static const pciSubsystemInfo pci_ss_info_109e_0878_1002_0003 =
 	{0x1002, 0x0003, pci_subsys_109e_0878_1002_0003, 0};
 #undef pci_ss_info_1002_0003
 #define pci_ss_info_1002_0003 pci_ss_info_109e_0878_1002_0003
+static const pciSubsystemInfo pci_ss_info_109e_0878_11bd_0012 =
+	{0x11bd, 0x0012, pci_subsys_109e_0878_11bd_0012, 0};
+#undef pci_ss_info_11bd_0012
+#define pci_ss_info_11bd_0012 pci_ss_info_109e_0878_11bd_0012
 static const pciSubsystemInfo pci_ss_info_109e_0878_11bd_001c =
 	{0x11bd, 0x001c, pci_subsys_109e_0878_11bd_001c, 0};
 #undef pci_ss_info_11bd_001c
@@ -17089,6 +18064,10 @@ static const pciSubsystemInfo pci_ss_info_109e_0878_14f1_0048 =
 	{0x14f1, 0x0048, pci_subsys_109e_0878_14f1_0048, 0};
 #undef pci_ss_info_14f1_0048
 #define pci_ss_info_14f1_0048 pci_ss_info_109e_0878_14f1_0048
+static const pciSubsystemInfo pci_ss_info_109e_0878_bd11_1200 =
+	{0xbd11, 0x1200, pci_subsys_109e_0878_bd11_1200, 0};
+#undef pci_ss_info_bd11_1200
+#define pci_ss_info_bd11_1200 pci_ss_info_109e_0878_bd11_1200
 static const pciSubsystemInfo pci_ss_info_109e_0879_127a_0044 =
 	{0x127a, 0x0044, pci_subsys_109e_0879_127a_0044, 0};
 #undef pci_ss_info_127a_0044
@@ -17208,10 +18187,18 @@ static const pciSubsystemInfo pci_ss_info_10b5_9030_15ed_1003 =
 	{0x15ed, 0x1003, pci_subsys_10b5_9030_15ed_1003, 0};
 #undef pci_ss_info_15ed_1003
 #define pci_ss_info_15ed_1003 pci_ss_info_10b5_9030_15ed_1003
+static const pciSubsystemInfo pci_ss_info_10b5_9050_10b5_2036 =
+	{0x10b5, 0x2036, pci_subsys_10b5_9050_10b5_2036, 0};
+#undef pci_ss_info_10b5_2036
+#define pci_ss_info_10b5_2036 pci_ss_info_10b5_9050_10b5_2036
 static const pciSubsystemInfo pci_ss_info_10b5_9050_10b5_2273 =
 	{0x10b5, 0x2273, pci_subsys_10b5_9050_10b5_2273, 0};
 #undef pci_ss_info_10b5_2273
 #define pci_ss_info_10b5_2273 pci_ss_info_10b5_9050_10b5_2273
+static const pciSubsystemInfo pci_ss_info_10b5_9050_10b5_9050 =
+	{0x10b5, 0x9050, pci_subsys_10b5_9050_10b5_9050, 0};
+#undef pci_ss_info_10b5_9050
+#define pci_ss_info_10b5_9050 pci_ss_info_10b5_9050_10b5_9050
 static const pciSubsystemInfo pci_ss_info_10b5_9050_1522_0001 =
 	{0x1522, 0x0001, pci_subsys_10b5_9050_1522_0001, 0};
 #undef pci_ss_info_1522_0001
@@ -17252,6 +18239,10 @@ static const pciSubsystemInfo pci_ss_info_10b5_9050_15ed_1003 =
 	{0x15ed, 0x1003, pci_subsys_10b5_9050_15ed_1003, 0};
 #undef pci_ss_info_15ed_1003
 #define pci_ss_info_15ed_1003 pci_ss_info_10b5_9050_15ed_1003
+static const pciSubsystemInfo pci_ss_info_10b5_9050_5654_5634 =
+	{0x5654, 0x5634, pci_subsys_10b5_9050_5654_5634, 0};
+#undef pci_ss_info_5654_5634
+#define pci_ss_info_5654_5634 pci_ss_info_10b5_9050_5654_5634
 static const pciSubsystemInfo pci_ss_info_10b5_9050_d531_c002 =
 	{0xd531, 0xc002, pci_subsys_10b5_9050_d531_c002, 0};
 #undef pci_ss_info_d531_c002
@@ -17600,6 +18591,10 @@ static const pciSubsystemInfo pci_ss_info_10b7_9805_10b7_9805 =
 	{0x10b7, 0x9805, pci_subsys_10b7_9805_10b7_9805, 0};
 #undef pci_ss_info_10b7_9805
 #define pci_ss_info_10b7_9805 pci_ss_info_10b7_9805_10b7_9805
+static const pciSubsystemInfo pci_ss_info_10b7_9805_10f1_2462 =
+	{0x10f1, 0x2462, pci_subsys_10b7_9805_10f1_2462, 0};
+#undef pci_ss_info_10f1_2462
+#define pci_ss_info_10f1_2462 pci_ss_info_10b7_9805_10f1_2462
 static const pciSubsystemInfo pci_ss_info_10b7_9904_10b7_1000 =
 	{0x10b7, 0x1000, pci_subsys_10b7_9904_10b7_1000, 0};
 #undef pci_ss_info_10b7_1000
@@ -17707,6 +18702,10 @@ static const pciSubsystemInfo pci_ss_info_10b9_5229_1043_8053 =
 	{0x1043, 0x8053, pci_subsys_10b9_5229_1043_8053, 0};
 #undef pci_ss_info_1043_8053
 #define pci_ss_info_1043_8053 pci_ss_info_10b9_5229_1043_8053
+static const pciSubsystemInfo pci_ss_info_10b9_5451_1014_0506 =
+	{0x1014, 0x0506, pci_subsys_10b9_5451_1014_0506, 0};
+#undef pci_ss_info_1014_0506
+#define pci_ss_info_1014_0506 pci_ss_info_10b9_5451_1014_0506
 static const pciSubsystemInfo pci_ss_info_10b9_7101_10b9_7101 =
 	{0x10b9, 0x7101, pci_subsys_10b9_7101_10b9_7101, 0};
 #undef pci_ss_info_10b9_7101
@@ -17783,6 +18782,10 @@ static const pciSubsystemInfo pci_ss_info_10c8_0004_10f7_8312 =
 	{0x10f7, 0x8312, pci_subsys_10c8_0004_10f7_8312, 0};
 #undef pci_ss_info_10f7_8312
 #define pci_ss_info_10f7_8312 pci_ss_info_10c8_0004_10f7_8312
+static const pciSubsystemInfo pci_ss_info_10c8_0005_1014_00dd =
+	{0x1014, 0x00dd, pci_subsys_10c8_0005_1014_00dd, 0};
+#undef pci_ss_info_1014_00dd
+#define pci_ss_info_1014_00dd pci_ss_info_10c8_0005_1014_00dd
 static const pciSubsystemInfo pci_ss_info_10c8_0016_10c8_0016 =
 	{0x10c8, 0x0016, pci_subsys_10c8_0016_10c8_0016, 0};
 #undef pci_ss_info_10c8_0016
@@ -18047,6 +19050,14 @@ static const pciSubsystemInfo pci_ss_info_10de_002d_1043_0201 =
 	{0x1043, 0x0201, pci_subsys_10de_002d_1043_0201, 0};
 #undef pci_ss_info_1043_0201
 #define pci_ss_info_1043_0201 pci_ss_info_10de_002d_1043_0201
+static const pciSubsystemInfo pci_ss_info_10de_002d_1048_0c3a =
+	{0x1048, 0x0c3a, pci_subsys_10de_002d_1048_0c3a, 0};
+#undef pci_ss_info_1048_0c3a
+#define pci_ss_info_1048_0c3a pci_ss_info_10de_002d_1048_0c3a
+static const pciSubsystemInfo pci_ss_info_10de_002d_10de_001e =
+	{0x10de, 0x001e, pci_subsys_10de_002d_10de_001e, 0};
+#undef pci_ss_info_10de_001e
+#define pci_ss_info_10de_001e pci_ss_info_10de_002d_10de_001e
 static const pciSubsystemInfo pci_ss_info_10de_002d_1102_1023 =
 	{0x1102, 0x1023, pci_subsys_10de_002d_1102_1023, 0};
 #undef pci_ss_info_1102_1023
@@ -18067,6 +19078,18 @@ static const pciSubsystemInfo pci_ss_info_10de_002d_1554_1041 =
 	{0x1554, 0x1041, pci_subsys_10de_002d_1554_1041, 0};
 #undef pci_ss_info_1554_1041
 #define pci_ss_info_1554_1041 pci_ss_info_10de_002d_1554_1041
+static const pciSubsystemInfo pci_ss_info_10de_0060_1043_80ad =
+	{0x1043, 0x80ad, pci_subsys_10de_0060_1043_80ad, 0};
+#undef pci_ss_info_1043_80ad
+#define pci_ss_info_1043_80ad pci_ss_info_10de_0060_1043_80ad
+static const pciSubsystemInfo pci_ss_info_10de_0067_1043_0c11 =
+	{0x1043, 0x0c11, pci_subsys_10de_0067_1043_0c11, 0};
+#undef pci_ss_info_1043_0c11
+#define pci_ss_info_1043_0c11 pci_ss_info_10de_0067_1043_0c11
+static const pciSubsystemInfo pci_ss_info_10de_0068_1043_0c11 =
+	{0x1043, 0x0c11, pci_subsys_10de_0068_1043_0c11, 0};
+#undef pci_ss_info_1043_0c11
+#define pci_ss_info_1043_0c11 pci_ss_info_10de_0068_1043_0c11
 static const pciSubsystemInfo pci_ss_info_10de_00a0_14af_5810 =
 	{0x14af, 0x5810, pci_subsys_10de_00a0_14af_5810, 0};
 #undef pci_ss_info_14af_5810
@@ -18123,6 +19146,10 @@ static const pciSubsystemInfo pci_ss_info_10de_0110_1043_4031 =
 	{0x1043, 0x4031, pci_subsys_10de_0110_1043_4031, 0};
 #undef pci_ss_info_1043_4031
 #define pci_ss_info_1043_4031 pci_ss_info_10de_0110_1043_4031
+static const pciSubsystemInfo pci_ss_info_10de_0110_1462_8817 =
+	{0x1462, 0x8817, pci_subsys_10de_0110_1462_8817, 0};
+#undef pci_ss_info_1462_8817
+#define pci_ss_info_1462_8817 pci_ss_info_10de_0110_1462_8817
 static const pciSubsystemInfo pci_ss_info_10de_0110_14af_7102 =
 	{0x14af, 0x7102, pci_subsys_10de_0110_14af_7102, 0};
 #undef pci_ss_info_14af_7102
@@ -18155,6 +19182,14 @@ static const pciSubsystemInfo pci_ss_info_10de_0171_1462_8661 =
 	{0x1462, 0x8661, pci_subsys_10de_0171_1462_8661, 0};
 #undef pci_ss_info_1462_8661
 #define pci_ss_info_1462_8661 pci_ss_info_10de_0171_1462_8661
+static const pciSubsystemInfo pci_ss_info_10de_0171_1462_8730 =
+	{0x1462, 0x8730, pci_subsys_10de_0171_1462_8730, 0};
+#undef pci_ss_info_1462_8730
+#define pci_ss_info_1462_8730 pci_ss_info_10de_0171_1462_8730
+static const pciSubsystemInfo pci_ss_info_10de_0171_147b_8f00 =
+	{0x147b, 0x8f00, pci_subsys_10de_0171_147b_8f00, 0};
+#undef pci_ss_info_147b_8f00
+#define pci_ss_info_147b_8f00 pci_ss_info_10de_0171_147b_8f00
 static const pciSubsystemInfo pci_ss_info_10de_0200_1043_402f =
 	{0x1043, 0x402f, pci_subsys_10de_0200_1043_402f, 0};
 #undef pci_ss_info_1043_402f
@@ -18167,6 +19202,14 @@ static const pciSubsystemInfo pci_ss_info_10de_0202_1545_002f =
 	{0x1545, 0x002f, pci_subsys_10de_0202_1545_002f, 0};
 #undef pci_ss_info_1545_002f
 #define pci_ss_info_1545_002f pci_ss_info_10de_0202_1545_002f
+static const pciSubsystemInfo pci_ss_info_10de_0253_107d_2896 =
+	{0x107d, 0x2896, pci_subsys_10de_0253_107d_2896, 0};
+#undef pci_ss_info_107d_2896
+#define pci_ss_info_107d_2896 pci_ss_info_10de_0253_107d_2896
+static const pciSubsystemInfo pci_ss_info_10de_0253_147b_8f09 =
+	{0x147b, 0x8f09, pci_subsys_10de_0253_147b_8f09, 0};
+#undef pci_ss_info_147b_8f09
+#define pci_ss_info_147b_8f09 pci_ss_info_10de_0253_147b_8f09
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo pci_ss_info_10e1_0391_10e1_0391 =
 	{0x10e1, 0x0391, pci_subsys_10e1_0391_10e1_0391, 0};
@@ -18234,6 +19277,10 @@ static const pciSubsystemInfo pci_ss_info_10ec_8139_1186_8139 =
 	{0x1186, 0x8139, pci_subsys_10ec_8139_1186_8139, 0};
 #undef pci_ss_info_1186_8139
 #define pci_ss_info_1186_8139 pci_ss_info_10ec_8139_1186_8139
+static const pciSubsystemInfo pci_ss_info_10ec_8139_11f6_8139 =
+	{0x11f6, 0x8139, pci_subsys_10ec_8139_11f6_8139, 0};
+#undef pci_ss_info_11f6_8139
+#define pci_ss_info_11f6_8139 pci_ss_info_10ec_8139_11f6_8139
 static const pciSubsystemInfo pci_ss_info_10ec_8139_1259_2500 =
 	{0x1259, 0x2500, pci_subsys_10ec_8139_1259_2500, 0};
 #undef pci_ss_info_1259_2500
@@ -18290,6 +19337,10 @@ static const pciSubsystemInfo pci_ss_info_10ec_8139_a0a0_0007 =
 	{0xa0a0, 0x0007, pci_subsys_10ec_8139_a0a0_0007, 0};
 #undef pci_ss_info_a0a0_0007
 #define pci_ss_info_a0a0_0007 pci_ss_info_10ec_8139_a0a0_0007
+static const pciSubsystemInfo pci_ss_info_10ec_8169_1371_434e =
+	{0x1371, 0x434e, pci_subsys_10ec_8169_1371_434e, 0};
+#undef pci_ss_info_1371_434e
+#define pci_ss_info_1371_434e pci_ss_info_10ec_8169_1371_434e
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo pci_ss_info_1102_0002_1102_0020 =
@@ -18356,6 +19407,14 @@ static const pciSubsystemInfo pci_ss_info_1102_0004_1102_0051 =
 	{0x1102, 0x0051, pci_subsys_1102_0004_1102_0051, 0};
 #undef pci_ss_info_1102_0051
 #define pci_ss_info_1102_0051 pci_ss_info_1102_0004_1102_0051
+static const pciSubsystemInfo pci_ss_info_1102_0004_1102_0053 =
+	{0x1102, 0x0053, pci_subsys_1102_0004_1102_0053, 0};
+#undef pci_ss_info_1102_0053
+#define pci_ss_info_1102_0053 pci_ss_info_1102_0004_1102_0053
+static const pciSubsystemInfo pci_ss_info_1102_4001_1102_0010 =
+	{0x1102, 0x0010, pci_subsys_1102_4001_1102_0010, 0};
+#undef pci_ss_info_1102_0010
+#define pci_ss_info_1102_0010 pci_ss_info_1102_4001_1102_0010
 static const pciSubsystemInfo pci_ss_info_1102_7002_1102_0020 =
 	{0x1102, 0x0020, pci_subsys_1102_7002_1102_0020, 0};
 #undef pci_ss_info_1102_0020
@@ -18379,6 +19438,10 @@ static const pciSubsystemInfo pci_ss_info_1106_0305_1043_8033 =
 	{0x1043, 0x8033, pci_subsys_1106_0305_1043_8033, 0};
 #undef pci_ss_info_1043_8033
 #define pci_ss_info_1043_8033 pci_ss_info_1106_0305_1043_8033
+static const pciSubsystemInfo pci_ss_info_1106_0305_1043_803e =
+	{0x1043, 0x803e, pci_subsys_1106_0305_1043_803e, 0};
+#undef pci_ss_info_1043_803e
+#define pci_ss_info_1043_803e pci_ss_info_1106_0305_1043_803e
 static const pciSubsystemInfo pci_ss_info_1106_0305_1043_8042 =
 	{0x1043, 0x8042, pci_subsys_1106_0305_1043_8042, 0};
 #undef pci_ss_info_1043_8042
@@ -18387,10 +19450,22 @@ static const pciSubsystemInfo pci_ss_info_1106_0305_147b_a401 =
 	{0x147b, 0xa401, pci_subsys_1106_0305_147b_a401, 0};
 #undef pci_ss_info_147b_a401
 #define pci_ss_info_147b_a401 pci_ss_info_1106_0305_147b_a401
+static const pciSubsystemInfo pci_ss_info_1106_0571_1043_8052 =
+	{0x1043, 0x8052, pci_subsys_1106_0571_1043_8052, 0};
+#undef pci_ss_info_1043_8052
+#define pci_ss_info_1043_8052 pci_ss_info_1106_0571_1043_8052
 static const pciSubsystemInfo pci_ss_info_1106_0571_1106_0571 =
 	{0x1106, 0x0571, pci_subsys_1106_0571_1106_0571, 0};
 #undef pci_ss_info_1106_0571
 #define pci_ss_info_1106_0571 pci_ss_info_1106_0571_1106_0571
+static const pciSubsystemInfo pci_ss_info_1106_0571_1179_0001 =
+	{0x1179, 0x0001, pci_subsys_1106_0571_1179_0001, 0};
+#undef pci_ss_info_1179_0001
+#define pci_ss_info_1179_0001 pci_ss_info_1106_0571_1179_0001
+static const pciSubsystemInfo pci_ss_info_1106_0571_1458_5002 =
+	{0x1458, 0x5002, pci_subsys_1106_0571_1458_5002, 0};
+#undef pci_ss_info_1458_5002
+#define pci_ss_info_1458_5002 pci_ss_info_1106_0571_1458_5002
 static const pciSubsystemInfo pci_ss_info_1106_0586_1106_0000 =
 	{0x1106, 0x0000, pci_subsys_1106_0586_1106_0000, 0};
 #undef pci_ss_info_1106_0000
@@ -18407,6 +19482,10 @@ static const pciSubsystemInfo pci_ss_info_1106_0686_1043_8033 =
 	{0x1043, 0x8033, pci_subsys_1106_0686_1043_8033, 0};
 #undef pci_ss_info_1043_8033
 #define pci_ss_info_1043_8033 pci_ss_info_1106_0686_1043_8033
+static const pciSubsystemInfo pci_ss_info_1106_0686_1043_803e =
+	{0x1043, 0x803e, pci_subsys_1106_0686_1043_803e, 0};
+#undef pci_ss_info_1043_803e
+#define pci_ss_info_1043_803e pci_ss_info_1106_0686_1043_803e
 static const pciSubsystemInfo pci_ss_info_1106_0686_1043_8040 =
 	{0x1043, 0x8040, pci_subsys_1106_0686_1043_8040, 0};
 #undef pci_ss_info_1043_8040
@@ -18423,6 +19502,18 @@ static const pciSubsystemInfo pci_ss_info_1106_0686_1106_0686 =
 	{0x1106, 0x0686, pci_subsys_1106_0686_1106_0686, 0};
 #undef pci_ss_info_1106_0686
 #define pci_ss_info_1106_0686 pci_ss_info_1106_0686_1106_0686
+static const pciSubsystemInfo pci_ss_info_1106_0686_1179_0001 =
+	{0x1179, 0x0001, pci_subsys_1106_0686_1179_0001, 0};
+#undef pci_ss_info_1179_0001
+#define pci_ss_info_1179_0001 pci_ss_info_1106_0686_1179_0001
+static const pciSubsystemInfo pci_ss_info_1106_0686_147b_a702 =
+	{0x147b, 0xa702, pci_subsys_1106_0686_147b_a702, 0};
+#undef pci_ss_info_147b_a702
+#define pci_ss_info_147b_a702 pci_ss_info_1106_0686_147b_a702
+static const pciSubsystemInfo pci_ss_info_1106_0691_1179_0001 =
+	{0x1179, 0x0001, pci_subsys_1106_0691_1179_0001, 0};
+#undef pci_ss_info_1179_0001
+#define pci_ss_info_1179_0001 pci_ss_info_1106_0691_1179_0001
 static const pciSubsystemInfo pci_ss_info_1106_0691_1458_0691 =
 	{0x1458, 0x0691, pci_subsys_1106_0691_1458_0691, 0};
 #undef pci_ss_info_1458_0691
@@ -18431,10 +19522,10 @@ static const pciSubsystemInfo pci_ss_info_1106_3038_0925_1234 =
 	{0x0925, 0x1234, pci_subsys_1106_3038_0925_1234, 0};
 #undef pci_ss_info_0925_1234
 #define pci_ss_info_0925_1234 pci_ss_info_1106_3038_0925_1234
-static const pciSubsystemInfo pci_ss_info_1106_3038_1234_0925 =
-	{0x1234, 0x0925, pci_subsys_1106_3038_1234_0925, 0};
-#undef pci_ss_info_1234_0925
-#define pci_ss_info_1234_0925 pci_ss_info_1106_3038_1234_0925
+static const pciSubsystemInfo pci_ss_info_1106_3038_1179_0001 =
+	{0x1179, 0x0001, pci_subsys_1106_3038_1179_0001, 0};
+#undef pci_ss_info_1179_0001
+#define pci_ss_info_1179_0001 pci_ss_info_1106_3038_1179_0001
 static const pciSubsystemInfo pci_ss_info_1106_3043_10bd_0000 =
 	{0x10bd, 0x0000, pci_subsys_1106_3043_10bd_0000, 0};
 #undef pci_ss_info_10bd_0000
@@ -18451,6 +19542,10 @@ static const pciSubsystemInfo pci_ss_info_1106_3057_1043_8033 =
 	{0x1043, 0x8033, pci_subsys_1106_3057_1043_8033, 0};
 #undef pci_ss_info_1043_8033
 #define pci_ss_info_1043_8033 pci_ss_info_1106_3057_1043_8033
+static const pciSubsystemInfo pci_ss_info_1106_3057_1043_803e =
+	{0x1043, 0x803e, pci_subsys_1106_3057_1043_803e, 0};
+#undef pci_ss_info_1043_803e
+#define pci_ss_info_1043_803e pci_ss_info_1106_3057_1043_803e
 static const pciSubsystemInfo pci_ss_info_1106_3057_1043_8040 =
 	{0x1043, 0x8040, pci_subsys_1106_3057_1043_8040, 0};
 #undef pci_ss_info_1043_8040
@@ -18459,6 +19554,10 @@ static const pciSubsystemInfo pci_ss_info_1106_3057_1043_8042 =
 	{0x1043, 0x8042, pci_subsys_1106_3057_1043_8042, 0};
 #undef pci_ss_info_1043_8042
 #define pci_ss_info_1043_8042 pci_ss_info_1106_3057_1043_8042
+static const pciSubsystemInfo pci_ss_info_1106_3057_1179_0001 =
+	{0x1179, 0x0001, pci_subsys_1106_3057_1179_0001, 0};
+#undef pci_ss_info_1179_0001
+#define pci_ss_info_1179_0001 pci_ss_info_1106_3057_1179_0001
 static const pciSubsystemInfo pci_ss_info_1106_3058_0e11_b194 =
 	{0x0e11, 0xb194, pci_subsys_1106_3058_0e11_b194, 0};
 #undef pci_ss_info_0e11_b194
@@ -18479,14 +19578,14 @@ static const pciSubsystemInfo pci_ss_info_1106_3058_15dd_7609 =
 	{0x15dd, 0x7609, pci_subsys_1106_3058_15dd_7609, 0};
 #undef pci_ss_info_15dd_7609
 #define pci_ss_info_15dd_7609 pci_ss_info_1106_3058_15dd_7609
+static const pciSubsystemInfo pci_ss_info_1106_3059_1458_a002 =
+	{0x1458, 0xa002, pci_subsys_1106_3059_1458_a002, 0};
+#undef pci_ss_info_1458_a002
+#define pci_ss_info_1458_a002 pci_ss_info_1106_3059_1458_a002
 static const pciSubsystemInfo pci_ss_info_1106_3065_1106_0102 =
 	{0x1106, 0x0102, pci_subsys_1106_3065_1106_0102, 0};
 #undef pci_ss_info_1106_0102
 #define pci_ss_info_1106_0102 pci_ss_info_1106_3065_1106_0102
-static const pciSubsystemInfo pci_ss_info_1106_3065_1106_3065 =
-	{0x1106, 0x3065, pci_subsys_1106_3065_1106_3065, 0};
-#undef pci_ss_info_1106_3065
-#define pci_ss_info_1106_3065 pci_ss_info_1106_3065_1106_3065
 static const pciSubsystemInfo pci_ss_info_1106_3065_1186_1400 =
 	{0x1186, 0x1400, pci_subsys_1106_3065_1186_1400, 0};
 #undef pci_ss_info_1186_1400
@@ -18495,6 +19594,10 @@ static const pciSubsystemInfo pci_ss_info_1106_3065_1186_1401 =
 	{0x1186, 0x1401, pci_subsys_1106_3065_1186_1401, 0};
 #undef pci_ss_info_1186_1401
 #define pci_ss_info_1186_1401 pci_ss_info_1106_3065_1186_1401
+static const pciSubsystemInfo pci_ss_info_1106_3074_1043_8052 =
+	{0x1043, 0x8052, pci_subsys_1106_3074_1043_8052, 0};
+#undef pci_ss_info_1043_8052
+#define pci_ss_info_1043_8052 pci_ss_info_1106_3074_1043_8052
 static const pciSubsystemInfo pci_ss_info_1106_3099_1043_8064 =
 	{0x1043, 0x8064, pci_subsys_1106_3099_1043_8064, 0};
 #undef pci_ss_info_1043_8064
@@ -18503,15 +19606,33 @@ static const pciSubsystemInfo pci_ss_info_1106_3099_1043_807f =
 	{0x1043, 0x807f, pci_subsys_1106_3099_1043_807f, 0};
 #undef pci_ss_info_1043_807f
 #define pci_ss_info_1043_807f pci_ss_info_1106_3099_1043_807f
+static const pciSubsystemInfo pci_ss_info_1106_3104_1458_5004 =
+	{0x1458, 0x5004, pci_subsys_1106_3104_1458_5004, 0};
+#undef pci_ss_info_1458_5004
+#define pci_ss_info_1458_5004 pci_ss_info_1106_3104_1458_5004
+static const pciSubsystemInfo pci_ss_info_1106_3177_1458_5001 =
+	{0x1458, 0x5001, pci_subsys_1106_3177_1458_5001, 0};
+#undef pci_ss_info_1458_5001
+#define pci_ss_info_1458_5001 pci_ss_info_1106_3177_1458_5001
+static const pciSubsystemInfo pci_ss_info_1106_3189_1458_5000 =
+	{0x1458, 0x5000, pci_subsys_1106_3189_1458_5000, 0};
+#undef pci_ss_info_1458_5000
+#define pci_ss_info_1458_5000 pci_ss_info_1106_3189_1458_5000
 #ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
 static const pciSubsystemInfo pci_ss_info_1113_1211_103c_1207 =
 	{0x103c, 0x1207, pci_subsys_1113_1211_103c_1207, 0};
 #undef pci_ss_info_103c_1207
 #define pci_ss_info_103c_1207 pci_ss_info_1113_1211_103c_1207
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo pci_ss_info_1113_1211_1113_1211 =
 	{0x1113, 0x1211, pci_subsys_1113_1211_1113_1211, 0};
 #undef pci_ss_info_1113_1211
 #define pci_ss_info_1113_1211 pci_ss_info_1113_1211_1113_1211
+static const pciSubsystemInfo pci_ss_info_1113_1216_111a_1020 =
+	{0x111a, 0x1020, pci_subsys_1113_1216_111a_1020, 0};
+#undef pci_ss_info_111a_1020
+#define pci_ss_info_111a_1020 pci_ss_info_1113_1216_111a_1020
 static const pciSubsystemInfo pci_ss_info_1113_9211_1113_9211 =
 	{0x1113, 0x9211, pci_subsys_1113_9211_1113_9211, 0};
 #undef pci_ss_info_1113_9211
@@ -18712,6 +19833,58 @@ static const pciSubsystemInfo pci_ss_info_1148_4300_1148_9862 =
 	{0x1148, 0x9862, pci_subsys_1148_4300_1148_9862, 0};
 #undef pci_ss_info_1148_9862
 #define pci_ss_info_1148_9862 pci_ss_info_1148_4300_1148_9862
+static const pciSubsystemInfo pci_ss_info_1148_4300_1148_9871 =
+	{0x1148, 0x9871, pci_subsys_1148_4300_1148_9871, 0};
+#undef pci_ss_info_1148_9871
+#define pci_ss_info_1148_9871 pci_ss_info_1148_4300_1148_9871
+static const pciSubsystemInfo pci_ss_info_1148_4300_1148_9872 =
+	{0x1148, 0x9872, pci_subsys_1148_4300_1148_9872, 0};
+#undef pci_ss_info_1148_9872
+#define pci_ss_info_1148_9872 pci_ss_info_1148_4300_1148_9872
+static const pciSubsystemInfo pci_ss_info_1148_4300_1259_2970 =
+	{0x1259, 0x2970, pci_subsys_1148_4300_1259_2970, 0};
+#undef pci_ss_info_1259_2970
+#define pci_ss_info_1259_2970 pci_ss_info_1148_4300_1259_2970
+static const pciSubsystemInfo pci_ss_info_1148_4300_1259_2972 =
+	{0x1259, 0x2972, pci_subsys_1148_4300_1259_2972, 0};
+#undef pci_ss_info_1259_2972
+#define pci_ss_info_1259_2972 pci_ss_info_1148_4300_1259_2972
+static const pciSubsystemInfo pci_ss_info_1148_4300_1259_2975 =
+	{0x1259, 0x2975, pci_subsys_1148_4300_1259_2975, 0};
+#undef pci_ss_info_1259_2975
+#define pci_ss_info_1259_2975 pci_ss_info_1148_4300_1259_2975
+static const pciSubsystemInfo pci_ss_info_1148_4300_1259_2977 =
+	{0x1259, 0x2977, pci_subsys_1148_4300_1259_2977, 0};
+#undef pci_ss_info_1259_2977
+#define pci_ss_info_1259_2977 pci_ss_info_1148_4300_1259_2977
+static const pciSubsystemInfo pci_ss_info_1148_4320_1148_5021 =
+	{0x1148, 0x5021, pci_subsys_1148_4320_1148_5021, 0};
+#undef pci_ss_info_1148_5021
+#define pci_ss_info_1148_5021 pci_ss_info_1148_4320_1148_5021
+static const pciSubsystemInfo pci_ss_info_1148_4320_1148_5041 =
+	{0x1148, 0x5041, pci_subsys_1148_4320_1148_5041, 0};
+#undef pci_ss_info_1148_5041
+#define pci_ss_info_1148_5041 pci_ss_info_1148_4320_1148_5041
+static const pciSubsystemInfo pci_ss_info_1148_4320_1148_5043 =
+	{0x1148, 0x5043, pci_subsys_1148_4320_1148_5043, 0};
+#undef pci_ss_info_1148_5043
+#define pci_ss_info_1148_5043 pci_ss_info_1148_4320_1148_5043
+static const pciSubsystemInfo pci_ss_info_1148_4320_1148_5051 =
+	{0x1148, 0x5051, pci_subsys_1148_4320_1148_5051, 0};
+#undef pci_ss_info_1148_5051
+#define pci_ss_info_1148_5051 pci_ss_info_1148_4320_1148_5051
+static const pciSubsystemInfo pci_ss_info_1148_4320_1148_5061 =
+	{0x1148, 0x5061, pci_subsys_1148_4320_1148_5061, 0};
+#undef pci_ss_info_1148_5061
+#define pci_ss_info_1148_5061 pci_ss_info_1148_4320_1148_5061
+static const pciSubsystemInfo pci_ss_info_1148_4320_1148_5071 =
+	{0x1148, 0x5071, pci_subsys_1148_4320_1148_5071, 0};
+#undef pci_ss_info_1148_5071
+#define pci_ss_info_1148_5071 pci_ss_info_1148_4320_1148_5071
+static const pciSubsystemInfo pci_ss_info_1148_4320_1148_9521 =
+	{0x1148, 0x9521, pci_subsys_1148_4320_1148_9521, 0};
+#undef pci_ss_info_1148_9521
+#define pci_ss_info_1148_9521 pci_ss_info_1148_4320_1148_9521
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo pci_ss_info_114f_001d_114f_0050 =
@@ -18862,6 +20035,14 @@ static const pciSubsystemInfo pci_ss_info_1179_0d01_1179_0001 =
 #define pci_ss_info_1179_0001 pci_ss_info_1179_0d01_1179_0001
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo pci_ss_info_1180_0475_144d_c006 =
+	{0x144d, 0xc006, pci_subsys_1180_0475_144d_c006, 0};
+#undef pci_ss_info_144d_c006
+#define pci_ss_info_144d_c006 pci_ss_info_1180_0475_144d_c006
+static const pciSubsystemInfo pci_ss_info_1180_0476_1014_0185 =
+	{0x1014, 0x0185, pci_subsys_1180_0476_1014_0185, 0};
+#undef pci_ss_info_1014_0185
+#define pci_ss_info_1014_0185 pci_ss_info_1180_0476_1014_0185
 #endif
 static const pciSubsystemInfo pci_ss_info_1180_0476_104d_80df =
 	{0x104d, 0x80df, pci_subsys_1180_0476_104d_80df, 0};
@@ -18882,6 +20063,14 @@ static const pciSubsystemInfo pci_ss_info_1180_0522_1014_01cf =
 	{0x1014, 0x01cf, pci_subsys_1180_0522_1014_01cf, 0};
 #undef pci_ss_info_1014_01cf
 #define pci_ss_info_1014_01cf pci_ss_info_1180_0522_1014_01cf
+static const pciSubsystemInfo pci_ss_info_1180_0551_144d_c006 =
+	{0x144d, 0xc006, pci_subsys_1180_0551_144d_c006, 0};
+#undef pci_ss_info_144d_c006
+#define pci_ss_info_144d_c006 pci_ss_info_1180_0551_144d_c006
+static const pciSubsystemInfo pci_ss_info_1180_0552_1014_0511 =
+	{0x1014, 0x0511, pci_subsys_1180_0552_1014_0511, 0};
+#undef pci_ss_info_1014_0511
+#define pci_ss_info_1014_0511 pci_ss_info_1180_0552_1014_0511
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo pci_ss_info_1186_1002_1186_1002 =
@@ -18928,10 +20117,6 @@ static const pciSubsystemInfo pci_ss_info_11ad_c115_11ad_c001 =
 #define pci_ss_info_11ad_c001 pci_ss_info_11ad_c115_11ad_c001
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
-static const pciSubsystemInfo pci_ss_info_11c1_0440_0001_0440 =
-	{0x0001, 0x0440, pci_subsys_11c1_0440_0001_0440, 0};
-#undef pci_ss_info_0001_0440
-#define pci_ss_info_0001_0440 pci_ss_info_11c1_0440_0001_0440
 #endif
 static const pciSubsystemInfo pci_ss_info_11c1_0440_1033_8015 =
 	{0x1033, 0x8015, pci_subsys_11c1_0440_1033_8015, 0};
@@ -19100,10 +20285,6 @@ static const pciSubsystemInfo pci_ss_info_11c1_0441_1668_0440 =
 	{0x1668, 0x0440, pci_subsys_11c1_0441_1668_0440, 0};
 #undef pci_ss_info_1668_0440
 #define pci_ss_info_1668_0440 pci_ss_info_11c1_0441_1668_0440
-static const pciSubsystemInfo pci_ss_info_11c1_0442_0001_0440 =
-	{0x0001, 0x0440, pci_subsys_11c1_0442_0001_0440, 0};
-#undef pci_ss_info_0001_0440
-#define pci_ss_info_0001_0440 pci_ss_info_11c1_0442_0001_0440
 static const pciSubsystemInfo pci_ss_info_11c1_0442_11c1_0440 =
 	{0x11c1, 0x0440, pci_subsys_11c1_0442_11c1_0440, 0};
 #undef pci_ss_info_11c1_0440
@@ -19212,6 +20393,10 @@ static const pciSubsystemInfo pci_ss_info_11c1_044a_144f_1005 =
 	{0x144f, 0x1005, pci_subsys_11c1_044a_144f_1005, 0};
 #undef pci_ss_info_144f_1005
 #define pci_ss_info_144f_1005 pci_ss_info_11c1_044a_144f_1005
+static const pciSubsystemInfo pci_ss_info_11c1_0450_144f_4005 =
+	{0x144f, 0x4005, pci_subsys_11c1_0450_144f_4005, 0};
+#undef pci_ss_info_144f_4005
+#define pci_ss_info_144f_4005 pci_ss_info_11c1_0450_144f_4005
 static const pciSubsystemInfo pci_ss_info_11c1_5811_dead_0800 =
 	{0xdead, 0x0800, pci_subsys_11c1_5811_dead_0800, 0};
 #undef pci_ss_info_dead_0800
@@ -19260,12 +20445,34 @@ static const pciSubsystemInfo pci_ss_info_11f6_2201_11f6_2011 =
 #define pci_ss_info_11f6_2011 pci_ss_info_11f6_2201_11f6_2011
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo pci_ss_info_1202_4300_1202_9841 =
+	{0x1202, 0x9841, pci_subsys_1202_4300_1202_9841, 0};
+#undef pci_ss_info_1202_9841
+#define pci_ss_info_1202_9841 pci_ss_info_1202_4300_1202_9841
+static const pciSubsystemInfo pci_ss_info_1202_4300_1202_9842 =
+	{0x1202, 0x9842, pci_subsys_1202_4300_1202_9842, 0};
+#undef pci_ss_info_1202_9842
+#define pci_ss_info_1202_9842 pci_ss_info_1202_4300_1202_9842
+static const pciSubsystemInfo pci_ss_info_1202_4300_1202_9843 =
+	{0x1202, 0x9843, pci_subsys_1202_4300_1202_9843, 0};
+#undef pci_ss_info_1202_9843
+#define pci_ss_info_1202_9843 pci_ss_info_1202_4300_1202_9843
+static const pciSubsystemInfo pci_ss_info_1202_4300_1202_9844 =
+	{0x1202, 0x9844, pci_subsys_1202_4300_1202_9844, 0};
+#undef pci_ss_info_1202_9844
+#define pci_ss_info_1202_9844 pci_ss_info_1202_4300_1202_9844
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 #endif
 static const pciSubsystemInfo pci_ss_info_1217_6933_1025_1016 =
 	{0x1025, 0x1016, pci_subsys_1217_6933_1025_1016, 0};
 #undef pci_ss_info_1025_1016
 #define pci_ss_info_1025_1016 pci_ss_info_1217_6933_1025_1016
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo pci_ss_info_1217_6972_1179_0001 =
+	{0x1179, 0x0001, pci_subsys_1217_6972_1179_0001, 0};
+#undef pci_ss_info_1179_0001
+#define pci_ss_info_1179_0001 pci_ss_info_1217_6972_1179_0001
 #endif
 static const pciSubsystemInfo pci_ss_info_121a_0003_1092_0003 =
 	{0x1092, 0x0003, pci_subsys_121a_0003_1092_0003, 0};
@@ -19327,10 +20534,6 @@ static const pciSubsystemInfo pci_ss_info_121a_0003_14af_0002 =
 	{0x14af, 0x0002, pci_subsys_121a_0003_14af_0002, 0};
 #undef pci_ss_info_14af_0002
 #define pci_ss_info_14af_0002 pci_ss_info_121a_0003_14af_0002
-static const pciSubsystemInfo pci_ss_info_121a_0003_3030_3030 =
-	{0x3030, 0x3030, pci_subsys_121a_0003_3030_3030, 0};
-#undef pci_ss_info_3030_3030
-#define pci_ss_info_3030_3030 pci_ss_info_121a_0003_3030_3030
 static const pciSubsystemInfo pci_ss_info_121a_0005_121a_0004 =
 	{0x121a, 0x0004, pci_subsys_121a_0005_121a_0004, 0};
 #undef pci_ss_info_121a_0004
@@ -19444,6 +20647,16 @@ static const pciSubsystemInfo pci_ss_info_123f_8888_1328_0001 =
 #define pci_ss_info_1328_0001 pci_ss_info_123f_8888_1328_0001
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo pci_ss_info_1242_1560_1242_6562 =
+	{0x1242, 0x6562, pci_subsys_1242_1560_1242_6562, 0};
+#undef pci_ss_info_1242_6562
+#define pci_ss_info_1242_6562 pci_ss_info_1242_1560_1242_6562
+static const pciSubsystemInfo pci_ss_info_1242_1560_1242_656a =
+	{0x1242, 0x656a, pci_subsys_1242_1560_1242_656a, 0};
+#undef pci_ss_info_1242_656a
+#define pci_ss_info_1242_656a pci_ss_info_1242_1560_1242_656a
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo pci_ss_info_1244_0a00_1244_0a00 =
 	{0x1244, 0x0a00, pci_subsys_1244_0a00_1244_0a00, 0};
 #undef pci_ss_info_1244_0a00
@@ -19476,10 +20689,12 @@ static const pciSubsystemInfo pci_ss_info_125d_1969_125d_8888 =
 	{0x125d, 0x8888, pci_subsys_125d_1969_125d_8888, 0};
 #undef pci_ss_info_125d_8888
 #define pci_ss_info_125d_8888 pci_ss_info_125d_1969_125d_8888
-static const pciSubsystemInfo pci_ss_info_125d_1969_525f_c888 =
-	{0x525f, 0xc888, pci_subsys_125d_1969_525f_c888, 0};
-#undef pci_ss_info_525f_c888
-#define pci_ss_info_525f_c888 pci_ss_info_125d_1969_525f_c888
+#endif
+static const pciSubsystemInfo pci_ss_info_125d_1978_0e11_b112 =
+	{0x0e11, 0xb112, pci_subsys_125d_1978_0e11_b112, 0};
+#undef pci_ss_info_0e11_b112
+#define pci_ss_info_0e11_b112 pci_ss_info_125d_1978_0e11_b112
+#ifdef VENDOR_INCLUDE_NONVIDEO
 #endif
 static const pciSubsystemInfo pci_ss_info_125d_1978_1033_803c =
 	{0x1033, 0x803c, pci_subsys_125d_1978_1033_803c, 0};
@@ -19564,11 +20779,21 @@ static const pciSubsystemInfo pci_ss_info_1260_3873_1186_3501 =
 	{0x1186, 0x3501, pci_subsys_1260_3873_1186_3501, 0};
 #undef pci_ss_info_1186_3501
 #define pci_ss_info_1186_3501 pci_ss_info_1260_3873_1186_3501
+static const pciSubsystemInfo pci_ss_info_1260_3873_1668_0414 =
+	{0x1668, 0x0414, pci_subsys_1260_3873_1668_0414, 0};
+#undef pci_ss_info_1668_0414
+#define pci_ss_info_1668_0414 pci_ss_info_1260_3873_1668_0414
 static const pciSubsystemInfo pci_ss_info_1260_3873_1737_3874 =
 	{0x1737, 0x3874, pci_subsys_1260_3873_1737_3874, 0};
 #undef pci_ss_info_1737_3874
 #define pci_ss_info_1737_3874 pci_ss_info_1260_3873_1737_3874
 #endif
+static const pciSubsystemInfo pci_ss_info_1260_3873_8086_2513 =
+	{0x8086, 0x2513, pci_subsys_1260_3873_8086_2513, 0};
+#undef pci_ss_info_8086_2513
+#define pci_ss_info_8086_2513 pci_ss_info_1260_3873_8086_2513
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo pci_ss_info_1266_1910_1266_1910 =
 	{0x1266, 0x1910, pci_subsys_1266_1910_1266_1910, 0};
@@ -19820,10 +21045,6 @@ static const pciSubsystemInfo pci_ss_info_1274_1371_8086_5753 =
 #undef pci_ss_info_8086_5753
 #define pci_ss_info_8086_5753 pci_ss_info_1274_1371_8086_5753
 #ifdef VENDOR_INCLUDE_NONVIDEO
-static const pciSubsystemInfo pci_ss_info_1274_5000_4942_4c4c =
-	{0x4942, 0x4c4c, pci_subsys_1274_5000_4942_4c4c, 0};
-#undef pci_ss_info_4942_4c4c
-#define pci_ss_info_4942_4c4c pci_ss_info_1274_5000_4942_4c4c
 static const pciSubsystemInfo pci_ss_info_1274_5880_1274_2000 =
 	{0x1274, 0x2000, pci_subsys_1274_5880_1274_2000, 0};
 #undef pci_ss_info_1274_2000
@@ -20590,6 +21811,10 @@ static const pciSubsystemInfo pci_ss_info_13f6_0101_13f6_0101 =
 	{0x13f6, 0x0101, pci_subsys_13f6_0101_13f6_0101, 0};
 #undef pci_ss_info_13f6_0101
 #define pci_ss_info_13f6_0101 pci_ss_info_13f6_0101_13f6_0101
+static const pciSubsystemInfo pci_ss_info_13f6_0111_1019_0970 =
+	{0x1019, 0x0970, pci_subsys_13f6_0111_1019_0970, 0};
+#undef pci_ss_info_1019_0970
+#define pci_ss_info_1019_0970 pci_ss_info_13f6_0111_1019_0970
 static const pciSubsystemInfo pci_ss_info_13f6_0111_1043_8077 =
 	{0x1043, 0x8077, pci_subsys_13f6_0111_1043_8077, 0};
 #undef pci_ss_info_1043_8077
@@ -20729,6 +21954,12 @@ static const pciSubsystemInfo pci_ss_info_14e4_1645_0e11_009a =
 #define pci_ss_info_0e11_009a pci_ss_info_14e4_1645_0e11_009a
 #ifdef VENDOR_INCLUDE_NONVIDEO
 #endif
+static const pciSubsystemInfo pci_ss_info_14e4_1645_0e11_00c1 =
+	{0x0e11, 0x00c1, pci_subsys_14e4_1645_0e11_00c1, 0};
+#undef pci_ss_info_0e11_00c1
+#define pci_ss_info_0e11_00c1 pci_ss_info_14e4_1645_0e11_00c1
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
 static const pciSubsystemInfo pci_ss_info_14e4_1645_1028_0121 =
 	{0x1028, 0x0121, pci_subsys_14e4_1645_1028_0121, 0};
 #undef pci_ss_info_1028_0121
@@ -20823,6 +22054,112 @@ static const pciSubsystemInfo pci_ss_info_14e4_1647_14e4_800a =
 #undef pci_ss_info_14e4_800a
 #define pci_ss_info_14e4_800a pci_ss_info_14e4_1647_14e4_800a
 #endif
+static const pciSubsystemInfo pci_ss_info_14e4_1648_0e11_00cf =
+	{0x0e11, 0x00cf, pci_subsys_14e4_1648_0e11_00cf, 0};
+#undef pci_ss_info_0e11_00cf
+#define pci_ss_info_0e11_00cf pci_ss_info_14e4_1648_0e11_00cf
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+static const pciSubsystemInfo pci_ss_info_14e4_1648_0e11_00d0 =
+	{0x0e11, 0x00d0, pci_subsys_14e4_1648_0e11_00d0, 0};
+#undef pci_ss_info_0e11_00d0
+#define pci_ss_info_0e11_00d0 pci_ss_info_14e4_1648_0e11_00d0
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+static const pciSubsystemInfo pci_ss_info_14e4_1648_0e11_00d1 =
+	{0x0e11, 0x00d1, pci_subsys_14e4_1648_0e11_00d1, 0};
+#undef pci_ss_info_0e11_00d1
+#define pci_ss_info_0e11_00d1 pci_ss_info_14e4_1648_0e11_00d1
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo pci_ss_info_14e4_1648_10b7_2000 =
+	{0x10b7, 0x2000, pci_subsys_14e4_1648_10b7_2000, 0};
+#undef pci_ss_info_10b7_2000
+#define pci_ss_info_10b7_2000 pci_ss_info_14e4_1648_10b7_2000
+static const pciSubsystemInfo pci_ss_info_14e4_1648_10b7_3000 =
+	{0x10b7, 0x3000, pci_subsys_14e4_1648_10b7_3000, 0};
+#undef pci_ss_info_10b7_3000
+#define pci_ss_info_10b7_3000 pci_ss_info_14e4_1648_10b7_3000
+static const pciSubsystemInfo pci_ss_info_14e4_1648_1166_1648 =
+	{0x1166, 0x1648, pci_subsys_14e4_1648_1166_1648, 0};
+#undef pci_ss_info_1166_1648
+#define pci_ss_info_1166_1648 pci_ss_info_14e4_1648_1166_1648
+static const pciSubsystemInfo pci_ss_info_14e4_1696_14e4_000d =
+	{0x14e4, 0x000d, pci_subsys_14e4_1696_14e4_000d, 0};
+#undef pci_ss_info_14e4_000d
+#define pci_ss_info_14e4_000d pci_ss_info_14e4_1696_14e4_000d
+#endif
+static const pciSubsystemInfo pci_ss_info_14e4_16a6_0e11_00bb =
+	{0x0e11, 0x00bb, pci_subsys_14e4_16a6_0e11_00bb, 0};
+#undef pci_ss_info_0e11_00bb
+#define pci_ss_info_0e11_00bb pci_ss_info_14e4_16a6_0e11_00bb
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+static const pciSubsystemInfo pci_ss_info_14e4_16a6_1028_0126 =
+	{0x1028, 0x0126, pci_subsys_14e4_16a6_1028_0126, 0};
+#undef pci_ss_info_1028_0126
+#define pci_ss_info_1028_0126 pci_ss_info_14e4_16a6_1028_0126
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo pci_ss_info_14e4_16a6_14e4_000c =
+	{0x14e4, 0x000c, pci_subsys_14e4_16a6_14e4_000c, 0};
+#undef pci_ss_info_14e4_000c
+#define pci_ss_info_14e4_000c pci_ss_info_14e4_16a6_14e4_000c
+static const pciSubsystemInfo pci_ss_info_14e4_16a6_14e4_8009 =
+	{0x14e4, 0x8009, pci_subsys_14e4_16a6_14e4_8009, 0};
+#undef pci_ss_info_14e4_8009
+#define pci_ss_info_14e4_8009 pci_ss_info_14e4_16a6_14e4_8009
+#endif
+static const pciSubsystemInfo pci_ss_info_14e4_16a7_0e11_00ca =
+	{0x0e11, 0x00ca, pci_subsys_14e4_16a7_0e11_00ca, 0};
+#undef pci_ss_info_0e11_00ca
+#define pci_ss_info_0e11_00ca pci_ss_info_14e4_16a7_0e11_00ca
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+static const pciSubsystemInfo pci_ss_info_14e4_16a7_0e11_00cb =
+	{0x0e11, 0x00cb, pci_subsys_14e4_16a7_0e11_00cb, 0};
+#undef pci_ss_info_0e11_00cb
+#define pci_ss_info_0e11_00cb pci_ss_info_14e4_16a7_0e11_00cb
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo pci_ss_info_14e4_16a7_14e4_0009 =
+	{0x14e4, 0x0009, pci_subsys_14e4_16a7_14e4_0009, 0};
+#undef pci_ss_info_14e4_0009
+#define pci_ss_info_14e4_0009 pci_ss_info_14e4_16a7_14e4_0009
+static const pciSubsystemInfo pci_ss_info_14e4_16a7_14e4_000a =
+	{0x14e4, 0x000a, pci_subsys_14e4_16a7_14e4_000a, 0};
+#undef pci_ss_info_14e4_000a
+#define pci_ss_info_14e4_000a pci_ss_info_14e4_16a7_14e4_000a
+static const pciSubsystemInfo pci_ss_info_14e4_16a7_14e4_000b =
+	{0x14e4, 0x000b, pci_subsys_14e4_16a7_14e4_000b, 0};
+#undef pci_ss_info_14e4_000b
+#define pci_ss_info_14e4_000b pci_ss_info_14e4_16a7_14e4_000b
+static const pciSubsystemInfo pci_ss_info_14e4_16a7_14e4_800a =
+	{0x14e4, 0x800a, pci_subsys_14e4_16a7_14e4_800a, 0};
+#undef pci_ss_info_14e4_800a
+#define pci_ss_info_14e4_800a pci_ss_info_14e4_16a7_14e4_800a
+static const pciSubsystemInfo pci_ss_info_14e4_16a8_10b7_2001 =
+	{0x10b7, 0x2001, pci_subsys_14e4_16a8_10b7_2001, 0};
+#undef pci_ss_info_10b7_2001
+#define pci_ss_info_10b7_2001 pci_ss_info_14e4_16a8_10b7_2001
+static const pciSubsystemInfo pci_ss_info_14e4_16c6_10b7_1100 =
+	{0x10b7, 0x1100, pci_subsys_14e4_16c6_10b7_1100, 0};
+#undef pci_ss_info_10b7_1100
+#define pci_ss_info_10b7_1100 pci_ss_info_14e4_16c6_10b7_1100
+static const pciSubsystemInfo pci_ss_info_14e4_16c6_14e4_000c =
+	{0x14e4, 0x000c, pci_subsys_14e4_16c6_14e4_000c, 0};
+#undef pci_ss_info_14e4_000c
+#define pci_ss_info_14e4_000c pci_ss_info_14e4_16c6_14e4_000c
+static const pciSubsystemInfo pci_ss_info_14e4_16c6_14e4_8009 =
+	{0x14e4, 0x8009, pci_subsys_14e4_16c6_14e4_8009, 0};
+#undef pci_ss_info_14e4_8009
+#define pci_ss_info_14e4_8009 pci_ss_info_14e4_16c6_14e4_8009
+static const pciSubsystemInfo pci_ss_info_14e4_16c7_14e4_0009 =
+	{0x14e4, 0x0009, pci_subsys_14e4_16c7_14e4_0009, 0};
+#undef pci_ss_info_14e4_0009
+#define pci_ss_info_14e4_0009 pci_ss_info_14e4_16c7_14e4_0009
+static const pciSubsystemInfo pci_ss_info_14e4_16c7_14e4_000a =
+	{0x14e4, 0x000a, pci_subsys_14e4_16c7_14e4_000a, 0};
+#undef pci_ss_info_14e4_000a
+#define pci_ss_info_14e4_000a pci_ss_info_14e4_16c7_14e4_000a
+#endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 #endif
 static const pciSubsystemInfo pci_ss_info_14f1_1033_1033_8077 =
@@ -21086,6 +22423,30 @@ static const pciSubsystemInfo pci_ss_info_1522_0100_1522_0600 =
 	{0x1522, 0x0600, pci_subsys_1522_0100_1522_0600, 0};
 #undef pci_ss_info_1522_0600
 #define pci_ss_info_1522_0600 pci_ss_info_1522_0100_1522_0600
+static const pciSubsystemInfo pci_ss_info_1522_0100_1522_0700 =
+	{0x1522, 0x0700, pci_subsys_1522_0100_1522_0700, 0};
+#undef pci_ss_info_1522_0700
+#define pci_ss_info_1522_0700 pci_ss_info_1522_0100_1522_0700
+static const pciSubsystemInfo pci_ss_info_1522_0100_1522_0800 =
+	{0x1522, 0x0800, pci_subsys_1522_0100_1522_0800, 0};
+#undef pci_ss_info_1522_0800
+#define pci_ss_info_1522_0800 pci_ss_info_1522_0100_1522_0800
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo pci_ss_info_173b_03ea_173b_0001 =
+	{0x173b, 0x0001, pci_subsys_173b_03ea_173b_0001, 0};
+#undef pci_ss_info_173b_0001
+#define pci_ss_info_173b_0001 pci_ss_info_173b_03ea_173b_0001
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo pci_ss_info_1813_4000_16be_0001 =
+	{0x16be, 0x0001, pci_subsys_1813_4000_16be_0001, 0};
+#undef pci_ss_info_16be_0001
+#define pci_ss_info_16be_0001 pci_ss_info_1813_4000_16be_0001
+static const pciSubsystemInfo pci_ss_info_1813_4100_16be_0002 =
+	{0x16be, 0x0002, pci_subsys_1813_4100_16be_0002, 0};
+#undef pci_ss_info_16be_0002
+#define pci_ss_info_16be_0002 pci_ss_info_1813_4100_16be_0002
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo pci_ss_info_3388_8011_3388_8011 =
@@ -21141,6 +22502,10 @@ static const pciSubsystemInfo pci_ss_info_3d3d_000a_3d3d_0121 =
 	{0x3d3d, 0x0121, pci_subsys_3d3d_000a_3d3d_0121, 0};
 #undef pci_ss_info_3d3d_0121
 #define pci_ss_info_3d3d_0121 pci_ss_info_3d3d_000a_3d3d_0121
+static const pciSubsystemInfo pci_ss_info_3d3d_000c_3d3d_0144 =
+	{0x3d3d, 0x0144, pci_subsys_3d3d_000c_3d3d_0144, 0};
+#undef pci_ss_info_3d3d_0144
+#define pci_ss_info_3d3d_0144 pci_ss_info_3d3d_000c_3d3d_0144
 static const pciSubsystemInfo pci_ss_info_4005_4000_4005_4000 =
 	{0x4005, 0x4000, pci_subsys_4005_4000_4005_4000, 0};
 #undef pci_ss_info_4005_4000
@@ -21315,6 +22680,14 @@ static const pciSubsystemInfo pci_ss_info_5333_8c01_1179_0001 =
 	{0x1179, 0x0001, pci_subsys_5333_8c01_1179_0001, 0};
 #undef pci_ss_info_1179_0001
 #define pci_ss_info_1179_0001 pci_ss_info_5333_8c01_1179_0001
+static const pciSubsystemInfo pci_ss_info_5333_8c12_1014_017f =
+	{0x1014, 0x017f, pci_subsys_5333_8c12_1014_017f, 0};
+#undef pci_ss_info_1014_017f
+#define pci_ss_info_1014_017f pci_ss_info_5333_8c12_1014_017f
+static const pciSubsystemInfo pci_ss_info_5333_8c13_1179_0001 =
+	{0x1179, 0x0001, pci_subsys_5333_8c13_1179_0001, 0};
+#undef pci_ss_info_1179_0001
+#define pci_ss_info_1179_0001 pci_ss_info_5333_8c13_1179_0001
 static const pciSubsystemInfo pci_ss_info_5333_8c2e_1014_01fc =
 	{0x1014, 0x01fc, pci_subsys_5333_8c2e_1014_01fc, 0};
 #undef pci_ss_info_1014_01fc
@@ -21495,6 +22868,18 @@ static const pciSubsystemInfo pci_ss_info_8086_1031_144d_c003 =
 	{0x144d, 0xc003, pci_subsys_8086_1031_144d_c003, 0};
 #undef pci_ss_info_144d_c003
 #define pci_ss_info_144d_c003 pci_ss_info_8086_1031_144d_c003
+static const pciSubsystemInfo pci_ss_info_8086_1031_144d_c006 =
+	{0x144d, 0xc006, pci_subsys_8086_1031_144d_c006, 0};
+#undef pci_ss_info_144d_c006
+#define pci_ss_info_144d_c006 pci_ss_info_8086_1031_144d_c006
+static const pciSubsystemInfo pci_ss_info_8086_1040_16be_1040 =
+	{0x16be, 0x1040, pci_subsys_8086_1040_16be_1040, 0};
+#undef pci_ss_info_16be_1040
+#define pci_ss_info_16be_1040 pci_ss_info_8086_1040_16be_1040
+static const pciSubsystemInfo pci_ss_info_8086_1130_1025_1016 =
+	{0x1025, 0x1016, pci_subsys_8086_1130_1025_1016, 0};
+#undef pci_ss_info_1025_1016
+#define pci_ss_info_1025_1016 pci_ss_info_8086_1130_1025_1016
 static const pciSubsystemInfo pci_ss_info_8086_1130_1043_8027 =
 	{0x1043, 0x8027, pci_subsys_8086_1130_1043_8027, 0};
 #undef pci_ss_info_1043_8027
@@ -21635,10 +23020,18 @@ static const pciSubsystemInfo pci_ss_info_8086_1229_1014_0232 =
 	{0x1014, 0x0232, pci_subsys_8086_1229_1014_0232, 0};
 #undef pci_ss_info_1014_0232
 #define pci_ss_info_1014_0232 pci_ss_info_8086_1229_1014_0232
+static const pciSubsystemInfo pci_ss_info_8086_1229_1014_023a =
+	{0x1014, 0x023a, pci_subsys_8086_1229_1014_023a, 0};
+#undef pci_ss_info_1014_023a
+#define pci_ss_info_1014_023a pci_ss_info_8086_1229_1014_023a
 static const pciSubsystemInfo pci_ss_info_8086_1229_1014_105c =
 	{0x1014, 0x105c, pci_subsys_8086_1229_1014_105c, 0};
 #undef pci_ss_info_1014_105c
 #define pci_ss_info_1014_105c pci_ss_info_8086_1229_1014_105c
+static const pciSubsystemInfo pci_ss_info_8086_1229_1014_2205 =
+	{0x1014, 0x2205, pci_subsys_8086_1229_1014_2205, 0};
+#undef pci_ss_info_1014_2205
+#define pci_ss_info_1014_2205 pci_ss_info_8086_1229_1014_2205
 static const pciSubsystemInfo pci_ss_info_8086_1229_1014_305c =
 	{0x1014, 0x305c, pci_subsys_8086_1229_1014_305c, 0};
 #undef pci_ss_info_1014_305c
@@ -21663,6 +23056,10 @@ static const pciSubsystemInfo pci_ss_info_8086_1229_1014_805c =
 	{0x1014, 0x805c, pci_subsys_8086_1229_1014_805c, 0};
 #undef pci_ss_info_1014_805c
 #define pci_ss_info_1014_805c pci_ss_info_8086_1229_1014_805c
+static const pciSubsystemInfo pci_ss_info_8086_1229_1028_009b =
+	{0x1028, 0x009b, pci_subsys_8086_1229_1028_009b, 0};
+#undef pci_ss_info_1028_009b
+#define pci_ss_info_1028_009b pci_ss_info_8086_1229_1028_009b
 static const pciSubsystemInfo pci_ss_info_8086_1229_1033_8000 =
 	{0x1033, 0x8000, pci_subsys_8086_1229_1033_8000, 0};
 #undef pci_ss_info_1033_8000
@@ -22107,6 +23504,10 @@ static const pciSubsystemInfo pci_ss_info_8086_1361_8086_8000 =
 	{0x8086, 0x8000, pci_subsys_8086_1361_8086_8000, 0};
 #undef pci_ss_info_8086_8000
 #define pci_ss_info_8086_8000 pci_ss_info_8086_1361_8086_8000
+static const pciSubsystemInfo pci_ss_info_8086_1461_15d9_3480 =
+	{0x15d9, 0x3480, pci_subsys_8086_1461_15d9_3480, 0};
+#undef pci_ss_info_15d9_3480
+#define pci_ss_info_15d9_3480 pci_ss_info_8086_1461_15d9_3480
 static const pciSubsystemInfo pci_ss_info_8086_1960_101e_0431 =
 	{0x101e, 0x0431, pci_subsys_8086_1960_101e_0431, 0};
 #undef pci_ss_info_101e_0431
@@ -22215,6 +23616,14 @@ static const pciSubsystemInfo pci_ss_info_8086_2425_11d4_0048 =
 	{0x11d4, 0x0048, pci_subsys_8086_2425_11d4_0048, 0};
 #undef pci_ss_info_11d4_0048
 #define pci_ss_info_11d4_0048 pci_ss_info_8086_2425_11d4_0048
+static const pciSubsystemInfo pci_ss_info_8086_2442_1014_01c6 =
+	{0x1014, 0x01c6, pci_subsys_8086_2442_1014_01c6, 0};
+#undef pci_ss_info_1014_01c6
+#define pci_ss_info_1014_01c6 pci_ss_info_8086_2442_1014_01c6
+static const pciSubsystemInfo pci_ss_info_8086_2442_1025_1016 =
+	{0x1025, 0x1016, pci_subsys_8086_2442_1025_1016, 0};
+#undef pci_ss_info_1025_1016
+#define pci_ss_info_1025_1016 pci_ss_info_8086_2442_1025_1016
 static const pciSubsystemInfo pci_ss_info_8086_2442_104d_80df =
 	{0x104d, 0x80df, pci_subsys_8086_2442_104d_80df, 0};
 #undef pci_ss_info_104d_80df
@@ -22223,6 +23632,14 @@ static const pciSubsystemInfo pci_ss_info_8086_2442_147b_0507 =
 	{0x147b, 0x0507, pci_subsys_8086_2442_147b_0507, 0};
 #undef pci_ss_info_147b_0507
 #define pci_ss_info_147b_0507 pci_ss_info_8086_2442_147b_0507
+static const pciSubsystemInfo pci_ss_info_8086_2443_1014_01c6 =
+	{0x1014, 0x01c6, pci_subsys_8086_2443_1014_01c6, 0};
+#undef pci_ss_info_1014_01c6
+#define pci_ss_info_1014_01c6 pci_ss_info_8086_2443_1014_01c6
+static const pciSubsystemInfo pci_ss_info_8086_2443_1025_1016 =
+	{0x1025, 0x1016, pci_subsys_8086_2443_1025_1016, 0};
+#undef pci_ss_info_1025_1016
+#define pci_ss_info_1025_1016 pci_ss_info_8086_2443_1025_1016
 static const pciSubsystemInfo pci_ss_info_8086_2443_1043_8027 =
 	{0x1043, 0x8027, pci_subsys_8086_2443_1043_8027, 0};
 #undef pci_ss_info_1043_8027
@@ -22235,6 +23652,10 @@ static const pciSubsystemInfo pci_ss_info_8086_2443_147b_0507 =
 	{0x147b, 0x0507, pci_subsys_8086_2443_147b_0507, 0};
 #undef pci_ss_info_147b_0507
 #define pci_ss_info_147b_0507 pci_ss_info_8086_2443_147b_0507
+static const pciSubsystemInfo pci_ss_info_8086_2444_1025_1016 =
+	{0x1025, 0x1016, pci_subsys_8086_2444_1025_1016, 0};
+#undef pci_ss_info_1025_1016
+#define pci_ss_info_1025_1016 pci_ss_info_8086_2444_1025_1016
 static const pciSubsystemInfo pci_ss_info_8086_2444_104d_80df =
 	{0x104d, 0x80df, pci_subsys_8086_2444_104d_80df, 0};
 #undef pci_ss_info_104d_80df
@@ -22243,6 +23664,14 @@ static const pciSubsystemInfo pci_ss_info_8086_2444_147b_0507 =
 	{0x147b, 0x0507, pci_subsys_8086_2444_147b_0507, 0};
 #undef pci_ss_info_147b_0507
 #define pci_ss_info_147b_0507 pci_ss_info_8086_2444_147b_0507
+static const pciSubsystemInfo pci_ss_info_8086_2445_1014_01c6 =
+	{0x1014, 0x01c6, pci_subsys_8086_2445_1014_01c6, 0};
+#undef pci_ss_info_1014_01c6
+#define pci_ss_info_1014_01c6 pci_ss_info_8086_2445_1014_01c6
+static const pciSubsystemInfo pci_ss_info_8086_2445_1025_1016 =
+	{0x1025, 0x1016, pci_subsys_8086_2445_1025_1016, 0};
+#undef pci_ss_info_1025_1016
+#define pci_ss_info_1025_1016 pci_ss_info_8086_2445_1025_1016
 static const pciSubsystemInfo pci_ss_info_8086_2445_104d_80df =
 	{0x104d, 0x80df, pci_subsys_8086_2445_104d_80df, 0};
 #undef pci_ss_info_104d_80df
@@ -22255,6 +23684,10 @@ static const pciSubsystemInfo pci_ss_info_8086_2445_147b_0507 =
 	{0x147b, 0x0507, pci_subsys_8086_2445_147b_0507, 0};
 #undef pci_ss_info_147b_0507
 #define pci_ss_info_147b_0507 pci_ss_info_8086_2445_147b_0507
+static const pciSubsystemInfo pci_ss_info_8086_2446_1025_1016 =
+	{0x1025, 0x1016, pci_subsys_8086_2446_1025_1016, 0};
+#undef pci_ss_info_1025_1016
+#define pci_ss_info_1025_1016 pci_ss_info_8086_2446_1025_1016
 static const pciSubsystemInfo pci_ss_info_8086_2446_104d_80df =
 	{0x104d, 0x80df, pci_subsys_8086_2446_104d_80df, 0};
 #undef pci_ss_info_104d_80df
@@ -22371,6 +23804,10 @@ static const pciSubsystemInfo pci_ss_info_8086_244a_104d_80df =
 	{0x104d, 0x80df, pci_subsys_8086_244a_104d_80df, 0};
 #undef pci_ss_info_104d_80df
 #define pci_ss_info_104d_80df pci_ss_info_8086_244a_104d_80df
+static const pciSubsystemInfo pci_ss_info_8086_244b_1014_01c6 =
+	{0x1014, 0x01c6, pci_subsys_8086_244b_1014_01c6, 0};
+#undef pci_ss_info_1014_01c6
+#define pci_ss_info_1014_01c6 pci_ss_info_8086_244b_1014_01c6
 static const pciSubsystemInfo pci_ss_info_8086_244b_1043_8027 =
 	{0x1043, 0x8027, pci_subsys_8086_244b_1043_8027, 0};
 #undef pci_ss_info_1043_8027
@@ -22387,6 +23824,14 @@ static const pciSubsystemInfo pci_ss_info_8086_2482_104d_80e7 =
 	{0x104d, 0x80e7, pci_subsys_8086_2482_104d_80e7, 0};
 #undef pci_ss_info_104d_80e7
 #define pci_ss_info_104d_80e7 pci_ss_info_8086_2482_104d_80e7
+static const pciSubsystemInfo pci_ss_info_8086_2482_15d9_3480 =
+	{0x15d9, 0x3480, pci_subsys_8086_2482_15d9_3480, 0};
+#undef pci_ss_info_15d9_3480
+#define pci_ss_info_15d9_3480 pci_ss_info_8086_2482_15d9_3480
+static const pciSubsystemInfo pci_ss_info_8086_2482_8086_1958 =
+	{0x8086, 0x1958, pci_subsys_8086_2482_8086_1958, 0};
+#undef pci_ss_info_8086_1958
+#define pci_ss_info_8086_1958 pci_ss_info_8086_2482_8086_1958
 static const pciSubsystemInfo pci_ss_info_8086_2483_1014_0220 =
 	{0x1014, 0x0220, pci_subsys_8086_2483_1014_0220, 0};
 #undef pci_ss_info_1014_0220
@@ -22395,6 +23840,14 @@ static const pciSubsystemInfo pci_ss_info_8086_2483_104d_80e7 =
 	{0x104d, 0x80e7, pci_subsys_8086_2483_104d_80e7, 0};
 #undef pci_ss_info_104d_80e7
 #define pci_ss_info_104d_80e7 pci_ss_info_8086_2483_104d_80e7
+static const pciSubsystemInfo pci_ss_info_8086_2483_15d9_3480 =
+	{0x15d9, 0x3480, pci_subsys_8086_2483_15d9_3480, 0};
+#undef pci_ss_info_15d9_3480
+#define pci_ss_info_15d9_3480 pci_ss_info_8086_2483_15d9_3480
+static const pciSubsystemInfo pci_ss_info_8086_2483_8086_1958 =
+	{0x8086, 0x1958, pci_subsys_8086_2483_8086_1958, 0};
+#undef pci_ss_info_8086_1958
+#define pci_ss_info_8086_1958 pci_ss_info_8086_2483_8086_1958
 static const pciSubsystemInfo pci_ss_info_8086_2484_1014_0220 =
 	{0x1014, 0x0220, pci_subsys_8086_2484_1014_0220, 0};
 #undef pci_ss_info_1014_0220
@@ -22403,14 +23856,34 @@ static const pciSubsystemInfo pci_ss_info_8086_2484_104d_80e7 =
 	{0x104d, 0x80e7, pci_subsys_8086_2484_104d_80e7, 0};
 #undef pci_ss_info_104d_80e7
 #define pci_ss_info_104d_80e7 pci_ss_info_8086_2484_104d_80e7
+static const pciSubsystemInfo pci_ss_info_8086_2484_15d9_3480 =
+	{0x15d9, 0x3480, pci_subsys_8086_2484_15d9_3480, 0};
+#undef pci_ss_info_15d9_3480
+#define pci_ss_info_15d9_3480 pci_ss_info_8086_2484_15d9_3480
+static const pciSubsystemInfo pci_ss_info_8086_2484_8086_1958 =
+	{0x8086, 0x1958, pci_subsys_8086_2484_8086_1958, 0};
+#undef pci_ss_info_8086_1958
+#define pci_ss_info_8086_1958 pci_ss_info_8086_2484_8086_1958
 static const pciSubsystemInfo pci_ss_info_8086_2485_1014_0222 =
 	{0x1014, 0x0222, pci_subsys_8086_2485_1014_0222, 0};
 #undef pci_ss_info_1014_0222
 #define pci_ss_info_1014_0222 pci_ss_info_8086_2485_1014_0222
+static const pciSubsystemInfo pci_ss_info_8086_2485_1014_0508 =
+	{0x1014, 0x0508, pci_subsys_8086_2485_1014_0508, 0};
+#undef pci_ss_info_1014_0508
+#define pci_ss_info_1014_0508 pci_ss_info_8086_2485_1014_0508
+static const pciSubsystemInfo pci_ss_info_8086_2485_1014_051c =
+	{0x1014, 0x051c, pci_subsys_8086_2485_1014_051c, 0};
+#undef pci_ss_info_1014_051c
+#define pci_ss_info_1014_051c pci_ss_info_8086_2485_1014_051c
 static const pciSubsystemInfo pci_ss_info_8086_2485_104d_80e7 =
 	{0x104d, 0x80e7, pci_subsys_8086_2485_104d_80e7, 0};
 #undef pci_ss_info_104d_80e7
 #define pci_ss_info_104d_80e7 pci_ss_info_8086_2485_104d_80e7
+static const pciSubsystemInfo pci_ss_info_8086_2485_144d_c006 =
+	{0x144d, 0xc006, pci_subsys_8086_2485_144d_c006, 0};
+#undef pci_ss_info_144d_c006
+#define pci_ss_info_144d_c006 pci_ss_info_8086_2485_144d_c006
 static const pciSubsystemInfo pci_ss_info_8086_2486_1014_0223 =
 	{0x1014, 0x0223, pci_subsys_8086_2486_1014_0223, 0};
 #undef pci_ss_info_1014_0223
@@ -22419,14 +23892,30 @@ static const pciSubsystemInfo pci_ss_info_8086_2486_1014_0503 =
 	{0x1014, 0x0503, pci_subsys_8086_2486_1014_0503, 0};
 #undef pci_ss_info_1014_0503
 #define pci_ss_info_1014_0503 pci_ss_info_8086_2486_1014_0503
+static const pciSubsystemInfo pci_ss_info_8086_2486_1014_051a =
+	{0x1014, 0x051a, pci_subsys_8086_2486_1014_051a, 0};
+#undef pci_ss_info_1014_051a
+#define pci_ss_info_1014_051a pci_ss_info_8086_2486_1014_051a
 static const pciSubsystemInfo pci_ss_info_8086_2486_104d_80e7 =
 	{0x104d, 0x80e7, pci_subsys_8086_2486_104d_80e7, 0};
 #undef pci_ss_info_104d_80e7
 #define pci_ss_info_104d_80e7 pci_ss_info_8086_2486_104d_80e7
+static const pciSubsystemInfo pci_ss_info_8086_2486_1179_0001 =
+	{0x1179, 0x0001, pci_subsys_8086_2486_1179_0001, 0};
+#undef pci_ss_info_1179_0001
+#define pci_ss_info_1179_0001 pci_ss_info_8086_2486_1179_0001
 static const pciSubsystemInfo pci_ss_info_8086_2486_134d_4c21 =
 	{0x134d, 0x4c21, pci_subsys_8086_2486_134d_4c21, 0};
 #undef pci_ss_info_134d_4c21
 #define pci_ss_info_134d_4c21 pci_ss_info_8086_2486_134d_4c21
+static const pciSubsystemInfo pci_ss_info_8086_2486_144d_2115 =
+	{0x144d, 0x2115, pci_subsys_8086_2486_144d_2115, 0};
+#undef pci_ss_info_144d_2115
+#define pci_ss_info_144d_2115 pci_ss_info_8086_2486_144d_2115
+static const pciSubsystemInfo pci_ss_info_8086_2486_14f1_5421 =
+	{0x14f1, 0x5421, pci_subsys_8086_2486_14f1_5421, 0};
+#undef pci_ss_info_14f1_5421
+#define pci_ss_info_14f1_5421 pci_ss_info_8086_2486_14f1_5421
 static const pciSubsystemInfo pci_ss_info_8086_2487_1014_0220 =
 	{0x1014, 0x0220, pci_subsys_8086_2487_1014_0220, 0};
 #undef pci_ss_info_1014_0220
@@ -22435,6 +23924,14 @@ static const pciSubsystemInfo pci_ss_info_8086_2487_104d_80e7 =
 	{0x104d, 0x80e7, pci_subsys_8086_2487_104d_80e7, 0};
 #undef pci_ss_info_104d_80e7
 #define pci_ss_info_104d_80e7 pci_ss_info_8086_2487_104d_80e7
+static const pciSubsystemInfo pci_ss_info_8086_2487_15d9_3480 =
+	{0x15d9, 0x3480, pci_subsys_8086_2487_15d9_3480, 0};
+#undef pci_ss_info_15d9_3480
+#define pci_ss_info_15d9_3480 pci_ss_info_8086_2487_15d9_3480
+static const pciSubsystemInfo pci_ss_info_8086_2487_8086_1958 =
+	{0x8086, 0x1958, pci_subsys_8086_2487_8086_1958, 0};
+#undef pci_ss_info_8086_1958
+#define pci_ss_info_8086_1958 pci_ss_info_8086_2487_8086_1958
 static const pciSubsystemInfo pci_ss_info_8086_248a_1014_0220 =
 	{0x1014, 0x0220, pci_subsys_8086_248a_1014_0220, 0};
 #undef pci_ss_info_1014_0220
@@ -22443,6 +23940,46 @@ static const pciSubsystemInfo pci_ss_info_8086_248a_104d_80e7 =
 	{0x104d, 0x80e7, pci_subsys_8086_248a_104d_80e7, 0};
 #undef pci_ss_info_104d_80e7
 #define pci_ss_info_104d_80e7 pci_ss_info_8086_248a_104d_80e7
+static const pciSubsystemInfo pci_ss_info_8086_248a_8086_1958 =
+	{0x8086, 0x1958, pci_subsys_8086_248a_8086_1958, 0};
+#undef pci_ss_info_8086_1958
+#define pci_ss_info_8086_1958 pci_ss_info_8086_248a_8086_1958
+static const pciSubsystemInfo pci_ss_info_8086_248b_15d9_3480 =
+	{0x15d9, 0x3480, pci_subsys_8086_248b_15d9_3480, 0};
+#undef pci_ss_info_15d9_3480
+#define pci_ss_info_15d9_3480 pci_ss_info_8086_248b_15d9_3480
+static const pciSubsystemInfo pci_ss_info_8086_24c0_1462_5800 =
+	{0x1462, 0x5800, pci_subsys_8086_24c0_1462_5800, 0};
+#undef pci_ss_info_1462_5800
+#define pci_ss_info_1462_5800 pci_ss_info_8086_24c0_1462_5800
+static const pciSubsystemInfo pci_ss_info_8086_24c2_1462_5800 =
+	{0x1462, 0x5800, pci_subsys_8086_24c2_1462_5800, 0};
+#undef pci_ss_info_1462_5800
+#define pci_ss_info_1462_5800 pci_ss_info_8086_24c2_1462_5800
+static const pciSubsystemInfo pci_ss_info_8086_24c3_1462_5800 =
+	{0x1462, 0x5800, pci_subsys_8086_24c3_1462_5800, 0};
+#undef pci_ss_info_1462_5800
+#define pci_ss_info_1462_5800 pci_ss_info_8086_24c3_1462_5800
+static const pciSubsystemInfo pci_ss_info_8086_24c4_1462_5800 =
+	{0x1462, 0x5800, pci_subsys_8086_24c4_1462_5800, 0};
+#undef pci_ss_info_1462_5800
+#define pci_ss_info_1462_5800 pci_ss_info_8086_24c4_1462_5800
+static const pciSubsystemInfo pci_ss_info_8086_24c5_1462_5800 =
+	{0x1462, 0x5800, pci_subsys_8086_24c5_1462_5800, 0};
+#undef pci_ss_info_1462_5800
+#define pci_ss_info_1462_5800 pci_ss_info_8086_24c5_1462_5800
+static const pciSubsystemInfo pci_ss_info_8086_24c7_1462_5800 =
+	{0x1462, 0x5800, pci_subsys_8086_24c7_1462_5800, 0};
+#undef pci_ss_info_1462_5800
+#define pci_ss_info_1462_5800 pci_ss_info_8086_24c7_1462_5800
+static const pciSubsystemInfo pci_ss_info_8086_24cb_1462_5800 =
+	{0x1462, 0x5800, pci_subsys_8086_24cb_1462_5800, 0};
+#undef pci_ss_info_1462_5800
+#define pci_ss_info_1462_5800 pci_ss_info_8086_24cb_1462_5800
+static const pciSubsystemInfo pci_ss_info_8086_24cd_1462_3981 =
+	{0x1462, 0x3981, pci_subsys_8086_24cd_1462_3981, 0};
+#undef pci_ss_info_1462_3981
+#define pci_ss_info_1462_3981 pci_ss_info_8086_24cd_1462_3981
 static const pciSubsystemInfo pci_ss_info_8086_2500_1028_0095 =
 	{0x1028, 0x0095, pci_subsys_8086_2500_1028_0095, 0};
 #undef pci_ss_info_1028_0095
@@ -22459,6 +23996,18 @@ static const pciSubsystemInfo pci_ss_info_8086_2530_147b_0507 =
 	{0x147b, 0x0507, pci_subsys_8086_2530_147b_0507, 0};
 #undef pci_ss_info_147b_0507
 #define pci_ss_info_147b_0507 pci_ss_info_8086_2530_147b_0507
+static const pciSubsystemInfo pci_ss_info_8086_2540_15d9_3480 =
+	{0x15d9, 0x3480, pci_subsys_8086_2540_15d9_3480, 0};
+#undef pci_ss_info_15d9_3480
+#define pci_ss_info_15d9_3480 pci_ss_info_8086_2540_15d9_3480
+static const pciSubsystemInfo pci_ss_info_8086_2541_15d9_3480 =
+	{0x15d9, 0x3480, pci_subsys_8086_2541_15d9_3480, 0};
+#undef pci_ss_info_15d9_3480
+#define pci_ss_info_15d9_3480 pci_ss_info_8086_2541_15d9_3480
+static const pciSubsystemInfo pci_ss_info_8086_2560_1462_5800 =
+	{0x1462, 0x5800, pci_subsys_8086_2560_1462_5800, 0};
+#undef pci_ss_info_1462_5800
+#define pci_ss_info_1462_5800 pci_ss_info_8086_2560_1462_5800
 static const pciSubsystemInfo pci_ss_info_8086_3575_1014_021d =
 	{0x1014, 0x021d, pci_subsys_8086_3575_1014_021d, 0};
 #undef pci_ss_info_1014_021d
@@ -22467,6 +24016,10 @@ static const pciSubsystemInfo pci_ss_info_8086_3575_104d_80e7 =
 	{0x104d, 0x80e7, pci_subsys_8086_3575_104d_80e7, 0};
 #undef pci_ss_info_104d_80e7
 #define pci_ss_info_104d_80e7 pci_ss_info_8086_3575_104d_80e7
+static const pciSubsystemInfo pci_ss_info_8086_3577_1014_0513 =
+	{0x1014, 0x0513, pci_subsys_8086_3577_1014_0513, 0};
+#undef pci_ss_info_1014_0513
+#define pci_ss_info_1014_0513 pci_ss_info_8086_3577_1014_0513
 static const pciSubsystemInfo pci_ss_info_8086_5201_8086_0001 =
 	{0x8086, 0x0001, pci_subsys_8086_5201_8086_0001, 0};
 #undef pci_ss_info_8086_0001
@@ -22475,6 +24028,10 @@ static const pciSubsystemInfo pci_ss_info_8086_7190_0e11_0500 =
 	{0x0e11, 0x0500, pci_subsys_8086_7190_0e11_0500, 0};
 #undef pci_ss_info_0e11_0500
 #define pci_ss_info_0e11_0500 pci_ss_info_8086_7190_0e11_0500
+static const pciSubsystemInfo pci_ss_info_8086_7190_0e11_b110 =
+	{0x0e11, 0xb110, pci_subsys_8086_7190_0e11_b110, 0};
+#undef pci_ss_info_0e11_b110
+#define pci_ss_info_0e11_b110 pci_ss_info_8086_7190_0e11_b110
 static const pciSubsystemInfo pci_ss_info_8086_7190_1179_0001 =
 	{0x1179, 0x0001, pci_subsys_8086_7190_1179_0001, 0};
 #undef pci_ss_info_1179_0001
@@ -22720,6 +24277,14 @@ static const pciSubsystemInfo pci_ss_info_9005_0081_9005_62a1 =
 	{0x9005, 0x62a1, pci_subsys_9005_0081_9005_62a1, 0};
 #undef pci_ss_info_9005_62a1
 #define pci_ss_info_9005_62a1 pci_ss_info_9005_0081_9005_62a1
+static const pciSubsystemInfo pci_ss_info_9005_008f_1179_0001 =
+	{0x1179, 0x0001, pci_subsys_9005_008f_1179_0001, 0};
+#undef pci_ss_info_1179_0001
+#define pci_ss_info_1179_0001 pci_ss_info_9005_008f_1179_0001
+static const pciSubsystemInfo pci_ss_info_9005_008f_15d9_9005 =
+	{0x15d9, 0x9005, pci_subsys_9005_008f_15d9_9005, 0};
+#undef pci_ss_info_15d9_9005
+#define pci_ss_info_15d9_9005 pci_ss_info_9005_008f_15d9_9005
 #endif
 static const pciSubsystemInfo pci_ss_info_9005_00c0_0e11_f620 =
 	{0x0e11, 0xf620, pci_subsys_9005_00c0_0e11_f620, 0};
@@ -22730,6 +24295,26 @@ static const pciSubsystemInfo pci_ss_info_9005_00c0_9005_f620 =
 	{0x9005, 0xf620, pci_subsys_9005_00c0_9005_f620, 0};
 #undef pci_ss_info_9005_f620
 #define pci_ss_info_9005_f620 pci_ss_info_9005_00c0_9005_f620
+#endif
+static const pciSubsystemInfo pci_ss_info_9005_00c5_1028_00c5 =
+	{0x1028, 0x00c5, pci_subsys_9005_00c5_1028_00c5, 0};
+#undef pci_ss_info_1028_00c5
+#define pci_ss_info_1028_00c5 pci_ss_info_9005_00c5_1028_00c5
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+static const pciSubsystemInfo pci_ss_info_9005_00cf_1028_00d1 =
+	{0x1028, 0x00d1, pci_subsys_9005_00cf_1028_00d1, 0};
+#undef pci_ss_info_1028_00d1
+#define pci_ss_info_1028_00d1 pci_ss_info_9005_00cf_1028_00d1
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo pci_ss_info_9005_00cf_10f1_2462 =
+	{0x10f1, 0x2462, pci_subsys_9005_00cf_10f1_2462, 0};
+#undef pci_ss_info_10f1_2462
+#define pci_ss_info_10f1_2462 pci_ss_info_9005_00cf_10f1_2462
+static const pciSubsystemInfo pci_ss_info_9005_00cf_15d9_9005 =
+	{0x15d9, 0x9005, pci_subsys_9005_00cf_15d9_9005, 0};
+#undef pci_ss_info_15d9_9005
+#define pci_ss_info_15d9_9005 pci_ss_info_9005_00cf_15d9_9005
 static const pciSubsystemInfo pci_ss_info_9005_0250_1014_0279 =
 	{0x1014, 0x0279, pci_subsys_9005_0250_1014_0279, 0};
 #undef pci_ss_info_1014_0279
@@ -22914,12 +24499,17 @@ static const pciSubsystemInfo *pci_ss_list_1000_1960[] = {
 #define pci_ss_list_1001_0016 NULL
 #define pci_ss_list_1001_0017 NULL
 #define pci_ss_list_1001_9100 NULL
+#define pci_ss_list_1002_4144 NULL
+#define pci_ss_list_1002_4145 NULL
+#define pci_ss_list_1002_4146 NULL
+#define pci_ss_list_1002_4147 NULL
 #define pci_ss_list_1002_4158 NULL
 static const pciSubsystemInfo *pci_ss_list_1002_4242[] = {
 	&pci_ss_info_1002_4242_1002_02aa,
 	NULL
 };
 #define pci_ss_list_1002_4336 NULL
+#define pci_ss_list_1002_4337 NULL
 #define pci_ss_list_1002_4354 NULL
 #define pci_ss_list_1002_4358 NULL
 #define pci_ss_list_1002_4554 NULL
@@ -22983,6 +24573,8 @@ static const pciSubsystemInfo *pci_ss_list_1002_4750[] = {
 static const pciSubsystemInfo *pci_ss_list_1002_4752[] = {
 	&pci_ss_info_1002_4752_1002_0008,
 	&pci_ss_info_1002_4752_1002_4752,
+	&pci_ss_info_1002_4752_1002_8008,
+	&pci_ss_info_1002_4752_1028_00d1,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_1002_4753[] = {
@@ -23012,8 +24604,19 @@ static const pciSubsystemInfo *pci_ss_list_1002_475a[] = {
 };
 #define pci_ss_list_1002_4964 NULL
 #define pci_ss_list_1002_4965 NULL
-#define pci_ss_list_1002_4966 NULL
+static const pciSubsystemInfo *pci_ss_list_1002_4966[] = {
+	&pci_ss_info_1002_4966_10f1_0002,
+	&pci_ss_info_1002_4966_148c_2039,
+	&pci_ss_info_1002_4966_1509_9a00,
+	&pci_ss_info_1002_4966_1681_0040,
+	&pci_ss_info_1002_4966_174b_7176,
+	&pci_ss_info_1002_4966_174b_7192,
+	&pci_ss_info_1002_4966_17af_2005,
+	&pci_ss_info_1002_4966_17af_2006,
+	NULL
+};
 #define pci_ss_list_1002_4967 NULL
+#define pci_ss_list_1002_496e NULL
 static const pciSubsystemInfo *pci_ss_list_1002_4c42[] = {
 	&pci_ss_info_1002_4c42_0e11_b0e8,
 	&pci_ss_info_1002_4c42_0e11_b10e,
@@ -23036,7 +24639,9 @@ static const pciSubsystemInfo *pci_ss_list_1002_4c49[] = {
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_1002_4c4d[] = {
+	&pci_ss_info_1002_4c4d_0e11_b111,
 	&pci_ss_info_1002_4c4d_1002_0084,
+	&pci_ss_info_1002_4c4d_1014_0154,
 	NULL
 };
 #define pci_ss_list_1002_4c4e NULL
@@ -23049,7 +24654,9 @@ static const pciSubsystemInfo *pci_ss_list_1002_4c50[] = {
 #define pci_ss_list_1002_4c53 NULL
 #define pci_ss_list_1002_4c54 NULL
 static const pciSubsystemInfo *pci_ss_list_1002_4c57[] = {
+	&pci_ss_info_1002_4c57_1014_0517,
 	&pci_ss_info_1002_4c57_1028_00e6,
+	&pci_ss_info_1002_4c57_144d_c006,
 	NULL
 };
 #define pci_ss_list_1002_4c58 NULL
@@ -23070,6 +24677,10 @@ static const pciSubsystemInfo *pci_ss_list_1002_4c59[] = {
 #define pci_ss_list_1002_4e45 NULL
 #define pci_ss_list_1002_4e46 NULL
 #define pci_ss_list_1002_4e47 NULL
+#define pci_ss_list_1002_4e64 NULL
+#define pci_ss_list_1002_4e65 NULL
+#define pci_ss_list_1002_4e66 NULL
+#define pci_ss_list_1002_4e67 NULL
 #define pci_ss_list_1002_5041 NULL
 #define pci_ss_list_1002_5042 NULL
 #define pci_ss_list_1002_5043 NULL
@@ -23132,7 +24743,9 @@ static const pciSubsystemInfo *pci_ss_list_1002_5144[] = {
 #define pci_ss_list_1002_5146 NULL
 #define pci_ss_list_1002_5147 NULL
 static const pciSubsystemInfo *pci_ss_list_1002_5148[] = {
+	&pci_ss_info_1002_5148_1002_010a,
 	&pci_ss_info_1002_5148_1002_0152,
+	&pci_ss_info_1002_5148_1002_0162,
 	&pci_ss_info_1002_5148_1002_0172,
 	NULL
 };
@@ -23142,12 +24755,22 @@ static const pciSubsystemInfo *pci_ss_list_1002_5148[] = {
 static const pciSubsystemInfo *pci_ss_list_1002_514c[] = {
 	&pci_ss_info_1002_514c_1002_003a,
 	&pci_ss_info_1002_514c_1002_013a,
+	&pci_ss_info_1002_514c_148c_2026,
 	&pci_ss_info_1002_514c_174b_7149,
 	NULL
 };
+#define pci_ss_list_1002_514d NULL
+#define pci_ss_list_1002_514e NULL
+#define pci_ss_list_1002_514f NULL
 static const pciSubsystemInfo *pci_ss_list_1002_5157[] = {
 	&pci_ss_info_1002_5157_1002_013a,
+	&pci_ss_info_1002_5157_1458_4000,
+	&pci_ss_info_1002_5157_148c_2024,
+	&pci_ss_info_1002_5157_148c_2025,
+	&pci_ss_info_1002_5157_148c_2036,
+	&pci_ss_info_1002_5157_174b_7147,
 	&pci_ss_info_1002_5157_174b_7161,
+	&pci_ss_info_1002_5157_17af_0202,
 	NULL
 };
 #define pci_ss_list_1002_5158 NULL
@@ -23158,7 +24781,11 @@ static const pciSubsystemInfo *pci_ss_list_1002_5159[] = {
 	&pci_ss_info_1002_5159_1002_003a,
 	&pci_ss_info_1002_5159_1002_00ba,
 	&pci_ss_info_1002_5159_1002_013a,
+	&pci_ss_info_1002_5159_1458_4002,
+	&pci_ss_info_1002_5159_148c_2003,
+	&pci_ss_info_1002_5159_148c_2023,
 	&pci_ss_info_1002_5159_174b_7112,
+	&pci_ss_info_1002_5159_1787_0202,
 	NULL
 };
 #define pci_ss_list_1002_515a NULL
@@ -23166,6 +24793,7 @@ static const pciSubsystemInfo *pci_ss_list_1002_5159[] = {
 #define pci_ss_list_1002_5169 NULL
 #define pci_ss_list_1002_516a NULL
 #define pci_ss_list_1002_516b NULL
+#define pci_ss_list_1002_516c NULL
 static const pciSubsystemInfo *pci_ss_list_1002_5245[] = {
 	&pci_ss_info_1002_5245_1002_0008,
 	&pci_ss_info_1002_5245_1002_0028,
@@ -23266,7 +24894,10 @@ static const pciSubsystemInfo *pci_ss_list_1004_0306[] = {
 	&pci_ss_info_1004_0306_1483_5022,
 	NULL
 };
+#define pci_ss_list_1004_0307 NULL
+#define pci_ss_list_1004_0308 NULL
 #define pci_ss_list_1004_0702 NULL
+#define pci_ss_list_1004_0703 NULL
 #endif
 #define pci_ss_list_1005_2064 NULL
 #define pci_ss_list_1005_2128 NULL
@@ -23363,6 +24994,7 @@ static const pciSubsystemInfo *pci_ss_list_1011_0019[] = {
 	&pci_ss_info_1011_0019_1374_0002,
 	&pci_ss_info_1011_0019_1374_0007,
 	&pci_ss_info_1011_0019_1374_0008,
+	&pci_ss_info_1011_0019_1385_2100,
 	&pci_ss_info_1011_0019_1395_0001,
 	&pci_ss_info_1011_0019_13d1_ab01,
 	&pci_ss_info_1011_0019_8086_0001,
@@ -23435,6 +25067,7 @@ static const pciSubsystemInfo *pci_ss_list_1013_6001[] = {
 static const pciSubsystemInfo *pci_ss_list_1013_6003[] = {
 	&pci_ss_info_1013_6003_1013_4280,
 	&pci_ss_info_1013_6003_1681_0050,
+	&pci_ss_info_1013_6003_1681_a011,
 	NULL
 };
 #define pci_ss_list_1013_6004 NULL
@@ -23507,13 +25140,12 @@ static const pciSubsystemInfo *pci_ss_list_1014_0096[] = {
 };
 #define pci_ss_list_1014_00a5 NULL
 #define pci_ss_list_1014_00a6 NULL
-static const pciSubsystemInfo *pci_ss_list_1014_00b7[] = {
-	&pci_ss_info_1014_00b7_1902_00b8,
-	NULL
-};
+#define pci_ss_list_1014_00b7 NULL
 #define pci_ss_list_1014_00be NULL
+#define pci_ss_list_1014_00dc NULL
 #define pci_ss_list_1014_00fc NULL
 #define pci_ss_list_1014_0105 NULL
+#define pci_ss_list_1014_010f NULL
 static const pciSubsystemInfo *pci_ss_list_1014_0142[] = {
 	&pci_ss_info_1014_0142_1014_0143,
 	NULL
@@ -23534,6 +25166,7 @@ static const pciSubsystemInfo *pci_ss_list_1014_01bd[] = {
 	&pci_ss_info_1014_01bd_1014_0259,
 	NULL
 };
+#define pci_ss_list_1014_0302 NULL
 #define pci_ss_list_1014_ffff NULL
 #endif
 #define pci_ss_list_1017_5343 NULL
@@ -23661,6 +25294,10 @@ static const pciSubsystemInfo *pci_ss_list_1023_8520[] = {
 	&pci_ss_info_1023_8520_1023_8520,
 	NULL
 };
+static const pciSubsystemInfo *pci_ss_list_1023_8620[] = {
+	&pci_ss_info_1023_8620_1014_0502,
+	NULL
+};
 #define pci_ss_list_1023_8820 NULL
 #define pci_ss_list_1023_9320 NULL
 #define pci_ss_list_1023_9350 NULL
@@ -23793,9 +25430,9 @@ static const pciSubsystemInfo *pci_ss_list_1028_0004[] = {
 #define pci_ss_list_1028_0007 NULL
 #define pci_ss_list_1028_0008 NULL
 static const pciSubsystemInfo *pci_ss_list_1028_000a[] = {
-	&pci_ss_info_1028_000a_1027_0121,
 	&pci_ss_info_1028_000a_1028_0106,
 	&pci_ss_info_1028_000a_1028_011b,
+	&pci_ss_info_1028_000a_1028_0121,
 	NULL
 };
 #define pci_ss_list_1028_000c NULL
@@ -23807,6 +25444,7 @@ static const pciSubsystemInfo *pci_ss_list_1028_000a[] = {
 #define pci_ss_list_102b_0518 NULL
 #define pci_ss_list_102b_0519 NULL
 static const pciSubsystemInfo *pci_ss_list_102b_051a[] = {
+	&pci_ss_info_102b_051a_102b_0100,
 	&pci_ss_info_102b_051a_102b_1100,
 	&pci_ss_info_102b_051a_102b_1200,
 	&pci_ss_info_102b_051a_1100_102b,
@@ -23913,7 +25551,6 @@ static const pciSubsystemInfo *pci_ss_list_102b_0525[] = {
 	&pci_ss_info_102b_0525_1705_0002,
 	&pci_ss_info_102b_0525_1705_0003,
 	&pci_ss_info_102b_0525_1705_0004,
-	&pci_ss_info_102b_0525_b16f_0e11,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_102b_0527[] = {
@@ -23984,16 +25621,20 @@ static const pciSubsystemInfo *pci_ss_list_102f_0020[] = {
 #define pci_ss_list_1033_0007 NULL
 #define pci_ss_list_1033_0008 NULL
 #define pci_ss_list_1033_0009 NULL
+#define pci_ss_list_1033_0016 NULL
 #define pci_ss_list_1033_001a NULL
 #define pci_ss_list_1033_0021 NULL
 #define pci_ss_list_1033_0029 NULL
 #define pci_ss_list_1033_002a NULL
+#define pci_ss_list_1033_002c NULL
+#define pci_ss_list_1033_002d NULL
 static const pciSubsystemInfo *pci_ss_list_1033_0035[] = {
 	&pci_ss_info_1033_0035_1179_0001,
 	&pci_ss_info_1033_0035_12ee_7000,
 	&pci_ss_info_1033_0035_1799_0001,
 	NULL
 };
+#define pci_ss_list_1033_003b NULL
 #define pci_ss_list_1033_003e NULL
 #define pci_ss_list_1033_0046 NULL
 #define pci_ss_list_1033_005a NULL
@@ -24041,6 +25682,10 @@ static const pciSubsystemInfo *pci_ss_list_1039_0300[] = {
 	&pci_ss_info_1039_0300_107d_2720,
 	NULL
 };
+#define pci_ss_list_1039_0310 NULL
+#define pci_ss_list_1039_0315 NULL
+#define pci_ss_list_1039_0325 NULL
+#define pci_ss_list_1039_0330 NULL
 #define pci_ss_list_1039_0406 NULL
 #define pci_ss_list_1039_0496 NULL
 #define pci_ss_list_1039_0530 NULL
@@ -24069,9 +25714,11 @@ static const pciSubsystemInfo *pci_ss_list_1039_0900[] = {
 #define pci_ss_list_1039_3602 NULL
 #define pci_ss_list_1039_5107 NULL
 #define pci_ss_list_1039_5300 NULL
+#define pci_ss_list_1039_5315 NULL
 #define pci_ss_list_1039_5401 NULL
 #define pci_ss_list_1039_5511 NULL
 static const pciSubsystemInfo *pci_ss_list_1039_5513[] = {
+	&pci_ss_info_1039_5513_1019_0970,
 	&pci_ss_info_1039_5513_1039_5513,
 	NULL
 };
@@ -24086,11 +25733,15 @@ static const pciSubsystemInfo *pci_ss_list_1039_5513[] = {
 #define pci_ss_list_1039_6204 NULL
 #define pci_ss_list_1039_6205 NULL
 #define pci_ss_list_1039_6236 NULL
-#define pci_ss_list_1039_6300 NULL
+static const pciSubsystemInfo *pci_ss_list_1039_6300[] = {
+	&pci_ss_info_1039_6300_1019_0970,
+	NULL
+};
 static const pciSubsystemInfo *pci_ss_list_1039_6306[] = {
 	&pci_ss_info_1039_6306_1039_6306,
 	NULL
 };
+#define pci_ss_list_1039_6325 NULL
 static const pciSubsystemInfo *pci_ss_list_1039_6326[] = {
 	&pci_ss_info_1039_6326_1039_6326,
 	&pci_ss_info_1039_6326_1092_0a50,
@@ -24104,6 +25755,10 @@ static const pciSubsystemInfo *pci_ss_list_1039_7001[] = {
 	&pci_ss_info_1039_7001_1039_7000,
 	NULL
 };
+static const pciSubsystemInfo *pci_ss_list_1039_7002[] = {
+	&pci_ss_info_1039_7002_1509_7002,
+	NULL
+};
 #define pci_ss_list_1039_7007 NULL
 #define pci_ss_list_1039_7012 NULL
 #define pci_ss_list_1039_7013 NULL
@@ -24141,7 +25796,6 @@ static const pciSubsystemInfo *pci_ss_list_1039_7018[] = {
 #define pci_ss_list_103c_1008 NULL
 #define pci_ss_list_103c_100a NULL
 #define pci_ss_list_103c_1028 NULL
-#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_103c_1029[] = {
 	&pci_ss_info_103c_1029_107e_000f,
 	&pci_ss_info_103c_1029_9004_9210,
@@ -24189,13 +25843,13 @@ static const pciSubsystemInfo *pci_ss_list_103c_1048[] = {
 #define pci_ss_list_103c_1290 NULL
 #define pci_ss_list_103c_2910 NULL
 #define pci_ss_list_103c_2925 NULL
-#endif
 #define pci_ss_list_1042_1000 NULL
 #define pci_ss_list_1042_1001 NULL
 #define pci_ss_list_1042_3000 NULL
 #define pci_ss_list_1042_3010 NULL
 #define pci_ss_list_1042_3020 NULL
 #define pci_ss_list_1043_0675 NULL
+#define pci_ss_list_1043_4021 NULL
 #define pci_ss_list_1044_1012 NULL
 #define pci_ss_list_1044_a400 NULL
 #define pci_ss_list_1044_a500 NULL
@@ -24267,6 +25921,8 @@ static const pciSubsystemInfo *pci_ss_list_1044_a501[] = {
 #define pci_ss_list_1048_3000 NULL
 #define pci_ss_list_104a_0008 NULL
 #define pci_ss_list_104a_0009 NULL
+#define pci_ss_list_104a_0010 NULL
+#define pci_ss_list_104a_0210 NULL
 #define pci_ss_list_104a_0981 NULL
 #define pci_ss_list_104a_1746 NULL
 #define pci_ss_list_104a_2774 NULL
@@ -24277,6 +25933,7 @@ static const pciSubsystemInfo *pci_ss_list_1044_a501[] = {
 #define pci_ss_list_104c_0500 NULL
 #define pci_ss_list_104c_0508 NULL
 #define pci_ss_list_104c_1000 NULL
+#define pci_ss_list_104c_104c NULL
 #define pci_ss_list_104c_3d04 NULL
 static const pciSubsystemInfo *pci_ss_list_104c_3d07[] = {
 	&pci_ss_info_104c_3d07_1011_4d10,
@@ -24347,7 +26004,10 @@ static const pciSubsystemInfo *pci_ss_list_104c_8027[] = {
 #define pci_ss_list_104c_ac18 NULL
 #define pci_ss_list_104c_ac19 NULL
 #define pci_ss_list_104c_ac1a NULL
-#define pci_ss_list_104c_ac1b NULL
+static const pciSubsystemInfo *pci_ss_list_104c_ac1b[] = {
+	&pci_ss_info_104c_ac1b_0e11_b113,
+	NULL
+};
 #define pci_ss_list_104c_ac1c NULL
 #define pci_ss_list_104c_ac1d NULL
 #define pci_ss_list_104c_ac1e NULL
@@ -24373,7 +26033,11 @@ static const pciSubsystemInfo *pci_ss_list_104c_ac51[] = {
 };
 #define pci_ss_list_104c_ac52 NULL
 #define pci_ss_list_104c_ac53 NULL
-#define pci_ss_list_104c_ac55 NULL
+static const pciSubsystemInfo *pci_ss_list_104c_ac55[] = {
+	&pci_ss_info_104c_ac55_1014_0512,
+	NULL
+};
+#define pci_ss_list_104c_ac56 NULL
 #define pci_ss_list_104c_ac60 NULL
 #define pci_ss_list_104c_fe00 NULL
 #define pci_ss_list_104c_fe03 NULL
@@ -24398,6 +26062,7 @@ static const pciSubsystemInfo *pci_ss_list_1050_0840[] = {
 };
 #define pci_ss_list_1050_0940 NULL
 #define pci_ss_list_1050_5a5a NULL
+#define pci_ss_list_1050_6692 NULL
 #define pci_ss_list_1050_9970 NULL
 #endif
 #define pci_ss_list_1055_9130 NULL
@@ -24452,6 +26117,7 @@ static const pciSubsystemInfo *pci_ss_list_105a_0d38[] = {
 	NULL
 };
 #define pci_ss_list_105a_1275 NULL
+#define pci_ss_list_105a_3376 NULL
 static const pciSubsystemInfo *pci_ss_list_105a_4d30[] = {
 	&pci_ss_info_105a_4d30_105a_4d33,
 	&pci_ss_info_105a_4d30_105a_4d39,
@@ -24482,6 +26148,7 @@ static const pciSubsystemInfo *pci_ss_list_105a_6269[] = {
 	&pci_ss_info_105a_6269_105a_6269,
 	NULL
 };
+#define pci_ss_list_105a_6621 NULL
 #define pci_ss_list_105a_7275 NULL
 #endif
 #define pci_ss_list_105d_2309 NULL
@@ -24809,6 +26476,7 @@ static const pciSubsystemInfo *pci_ss_list_1095_0670[] = {
 };
 #define pci_ss_list_1095_0673 NULL
 #define pci_ss_list_1095_0680 NULL
+#define pci_ss_list_1095_3112 NULL
 #endif
 #define pci_ss_list_1098_0001 NULL
 #define pci_ss_list_1098_0002 NULL
@@ -24826,6 +26494,8 @@ static const pciSubsystemInfo *pci_ss_list_109e_036c[] = {
 static const pciSubsystemInfo *pci_ss_list_109e_036e[] = {
 	&pci_ss_info_109e_036e_0070_13eb,
 	&pci_ss_info_109e_036e_0070_ff01,
+	&pci_ss_info_109e_036e_107d_6606,
+	&pci_ss_info_109e_036e_11bd_0012,
 	&pci_ss_info_109e_036e_11bd_001c,
 	&pci_ss_info_109e_036e_127a_0001,
 	&pci_ss_info_109e_036e_127a_0002,
@@ -24840,6 +26510,7 @@ static const pciSubsystemInfo *pci_ss_list_109e_036e[] = {
 	&pci_ss_info_109e_036e_1851_1850,
 	&pci_ss_info_109e_036e_1851_1851,
 	&pci_ss_info_109e_036e_1852_1852,
+	&pci_ss_info_109e_036e_bd11_1200,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_109e_036f[] = {
@@ -24885,6 +26556,7 @@ static const pciSubsystemInfo *pci_ss_list_109e_0878[] = {
 	&pci_ss_info_109e_0878_0070_ff01,
 	&pci_ss_info_109e_0878_1002_0001,
 	&pci_ss_info_109e_0878_1002_0003,
+	&pci_ss_info_109e_0878_11bd_0012,
 	&pci_ss_info_109e_0878_11bd_001c,
 	&pci_ss_info_109e_0878_127a_0001,
 	&pci_ss_info_109e_0878_127a_0002,
@@ -24897,6 +26569,7 @@ static const pciSubsystemInfo *pci_ss_list_109e_0878[] = {
 	&pci_ss_info_109e_0878_14f1_0002,
 	&pci_ss_info_109e_0878_14f1_0003,
 	&pci_ss_info_109e_0878_14f1_0048,
+	&pci_ss_info_109e_0878_bd11_1200,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_109e_0879[] = {
@@ -24936,6 +26609,7 @@ static const pciSubsystemInfo *pci_ss_list_109e_0879[] = {
 #define pci_ss_list_109e_8230 NULL
 #define pci_ss_list_109e_8472 NULL
 #define pci_ss_list_109e_8474 NULL
+#define pci_ss_list_10a5_5449 NULL
 #define pci_ss_list_10a8_0000 NULL
 #define pci_ss_list_10a9_0001 NULL
 #define pci_ss_list_10a9_0002 NULL
@@ -24992,7 +26666,9 @@ static const pciSubsystemInfo *pci_ss_list_10b5_9030[] = {
 };
 #define pci_ss_list_10b5_9036 NULL
 static const pciSubsystemInfo *pci_ss_list_10b5_9050[] = {
+	&pci_ss_info_10b5_9050_10b5_2036,
 	&pci_ss_info_10b5_9050_10b5_2273,
+	&pci_ss_info_10b5_9050_10b5_9050,
 	&pci_ss_info_10b5_9050_1522_0001,
 	&pci_ss_info_10b5_9050_1522_0002,
 	&pci_ss_info_10b5_9050_1522_0003,
@@ -25003,6 +26679,7 @@ static const pciSubsystemInfo *pci_ss_list_10b5_9050[] = {
 	&pci_ss_info_10b5_9050_15ed_1001,
 	&pci_ss_info_10b5_9050_15ed_1002,
 	&pci_ss_info_10b5_9050_15ed_1003,
+	&pci_ss_info_10b5_9050_5654_5634,
 	&pci_ss_info_10b5_9050_d531_c002,
 	&pci_ss_info_10b5_9050_d84d_4006,
 	&pci_ss_info_10b5_9050_d84d_4008,
@@ -25191,6 +26868,8 @@ static const pciSubsystemInfo *pci_ss_list_10b7_9200[] = {
 	&pci_ss_info_10b7_9200_10b7_7000,
 	NULL
 };
+#define pci_ss_list_10b7_9201 NULL
+#define pci_ss_list_10b7_9300 NULL
 static const pciSubsystemInfo *pci_ss_list_10b7_9800[] = {
 	&pci_ss_info_10b7_9800_10b7_9800,
 	NULL
@@ -25199,6 +26878,7 @@ static const pciSubsystemInfo *pci_ss_list_10b7_9805[] = {
 	&pci_ss_info_10b7_9805_10b7_1201,
 	&pci_ss_info_10b7_9805_10b7_1202,
 	&pci_ss_info_10b7_9805_10b7_9805,
+	&pci_ss_info_10b7_9805_10f1_2462,
 	NULL
 };
 #define pci_ss_list_10b7_9900 NULL
@@ -25277,6 +26957,7 @@ static const pciSubsystemInfo *pci_ss_list_10b9_1541[] = {
 	NULL
 };
 #define pci_ss_list_10b9_1543 NULL
+#define pci_ss_list_10b9_1563 NULL
 #define pci_ss_list_10b9_1621 NULL
 #define pci_ss_list_10b9_1631 NULL
 #define pci_ss_list_10b9_1632 NULL
@@ -25286,6 +26967,8 @@ static const pciSubsystemInfo *pci_ss_list_10b9_1541[] = {
 #define pci_ss_list_10b9_1647 NULL
 #define pci_ss_list_10b9_1651 NULL
 #define pci_ss_list_10b9_1671 NULL
+#define pci_ss_list_10b9_1681 NULL
+#define pci_ss_list_10b9_1687 NULL
 #define pci_ss_list_10b9_3141 NULL
 #define pci_ss_list_10b9_3143 NULL
 #define pci_ss_list_10b9_3145 NULL
@@ -25308,14 +26991,19 @@ static const pciSubsystemInfo *pci_ss_list_10b9_5229[] = {
 #define pci_ss_list_10b9_5239 NULL
 #define pci_ss_list_10b9_5243 NULL
 #define pci_ss_list_10b9_5247 NULL
+#define pci_ss_list_10b9_5249 NULL
 #define pci_ss_list_10b9_5251 NULL
 #define pci_ss_list_10b9_5253 NULL
 #define pci_ss_list_10b9_5261 NULL
-#define pci_ss_list_10b9_5451 NULL
+static const pciSubsystemInfo *pci_ss_list_10b9_5451[] = {
+	&pci_ss_info_10b9_5451_1014_0506,
+	NULL
+};
 #define pci_ss_list_10b9_5453 NULL
 #define pci_ss_list_10b9_5455 NULL
 #define pci_ss_list_10b9_5457 NULL
 #define pci_ss_list_10b9_5459 NULL
+#define pci_ss_list_10b9_545a NULL
 #define pci_ss_list_10b9_5471 NULL
 #define pci_ss_list_10b9_5473 NULL
 static const pciSubsystemInfo *pci_ss_list_10b9_7101[] = {
@@ -25349,7 +27037,10 @@ static const pciSubsystemInfo *pci_ss_list_10c8_0004[] = {
 	&pci_ss_info_10c8_0004_10f7_8312,
 	NULL
 };
-#define pci_ss_list_10c8_0005 NULL
+static const pciSubsystemInfo *pci_ss_list_10c8_0005[] = {
+	&pci_ss_info_10c8_0005_1014_00dd,
+	NULL
+};
 #define pci_ss_list_10c8_0006 NULL
 static const pciSubsystemInfo *pci_ss_list_10c8_0016[] = {
 	&pci_ss_info_10c8_0016_10c8_0016,
@@ -25469,6 +27160,8 @@ static const pciSubsystemInfo *pci_ss_list_10de_002c[] = {
 static const pciSubsystemInfo *pci_ss_list_10de_002d[] = {
 	&pci_ss_info_10de_002d_1043_0200,
 	&pci_ss_info_10de_002d_1043_0201,
+	&pci_ss_info_10de_002d_1048_0c3a,
+	&pci_ss_info_10de_002d_10de_001e,
 	&pci_ss_info_10de_002d_1102_1023,
 	&pci_ss_info_10de_002d_1102_1024,
 	&pci_ss_info_10de_002d_1102_102c,
@@ -25478,6 +27171,24 @@ static const pciSubsystemInfo *pci_ss_list_10de_002d[] = {
 };
 #define pci_ss_list_10de_002e NULL
 #define pci_ss_list_10de_002f NULL
+static const pciSubsystemInfo *pci_ss_list_10de_0060[] = {
+	&pci_ss_info_10de_0060_1043_80ad,
+	NULL
+};
+#define pci_ss_list_10de_0064 NULL
+#define pci_ss_list_10de_0065 NULL
+#define pci_ss_list_10de_0066 NULL
+static const pciSubsystemInfo *pci_ss_list_10de_0067[] = {
+	&pci_ss_info_10de_0067_1043_0c11,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_10de_0068[] = {
+	&pci_ss_info_10de_0068_1043_0c11,
+	NULL
+};
+#define pci_ss_list_10de_006a NULL
+#define pci_ss_list_10de_006b NULL
+#define pci_ss_list_10de_006e NULL
 static const pciSubsystemInfo *pci_ss_list_10de_00a0[] = {
 	&pci_ss_info_10de_00a0_14af_5810,
 	NULL
@@ -25503,6 +27214,7 @@ static const pciSubsystemInfo *pci_ss_list_10de_0101[] = {
 static const pciSubsystemInfo *pci_ss_list_10de_0110[] = {
 	&pci_ss_info_10de_0110_1043_4015,
 	&pci_ss_info_10de_0110_1043_4031,
+	&pci_ss_info_10de_0110_1462_8817,
 	&pci_ss_info_10de_0110_14af_7102,
 	&pci_ss_info_10de_0110_14af_7103,
 	NULL
@@ -25528,6 +27240,8 @@ static const pciSubsystemInfo *pci_ss_list_10de_0152[] = {
 #define pci_ss_list_10de_0170 NULL
 static const pciSubsystemInfo *pci_ss_list_10de_0171[] = {
 	&pci_ss_info_10de_0171_1462_8661,
+	&pci_ss_info_10de_0171_1462_8730,
+	&pci_ss_info_10de_0171_147b_8f00,
 	NULL
 };
 #define pci_ss_list_10de_0172 NULL
@@ -25540,6 +27254,12 @@ static const pciSubsystemInfo *pci_ss_list_10de_0171[] = {
 #define pci_ss_list_10de_017a NULL
 #define pci_ss_list_10de_017b NULL
 #define pci_ss_list_10de_017c NULL
+#define pci_ss_list_10de_0181 NULL
+#define pci_ss_list_10de_0182 NULL
+#define pci_ss_list_10de_0183 NULL
+#define pci_ss_list_10de_0188 NULL
+#define pci_ss_list_10de_018a NULL
+#define pci_ss_list_10de_018b NULL
 #define pci_ss_list_10de_01a0 NULL
 #define pci_ss_list_10de_01a4 NULL
 #define pci_ss_list_10de_01ab NULL
@@ -25552,6 +27272,10 @@ static const pciSubsystemInfo *pci_ss_list_10de_0171[] = {
 #define pci_ss_list_10de_01b8 NULL
 #define pci_ss_list_10de_01bc NULL
 #define pci_ss_list_10de_01c1 NULL
+#define pci_ss_list_10de_01c2 NULL
+#define pci_ss_list_10de_01c3 NULL
+#define pci_ss_list_10de_01e8 NULL
+#define pci_ss_list_10de_01f0 NULL
 static const pciSubsystemInfo *pci_ss_list_10de_0200[] = {
 	&pci_ss_info_10de_0200_1043_402f,
 	NULL
@@ -25565,10 +27289,25 @@ static const pciSubsystemInfo *pci_ss_list_10de_0202[] = {
 #define pci_ss_list_10de_0203 NULL
 #define pci_ss_list_10de_0250 NULL
 #define pci_ss_list_10de_0251 NULL
-#define pci_ss_list_10de_0253 NULL
+#define pci_ss_list_10de_0252 NULL
+static const pciSubsystemInfo *pci_ss_list_10de_0253[] = {
+	&pci_ss_info_10de_0253_107d_2896,
+	&pci_ss_info_10de_0253_147b_8f09,
+	NULL
+};
 #define pci_ss_list_10de_0258 NULL
 #define pci_ss_list_10de_0259 NULL
 #define pci_ss_list_10de_025b NULL
+#define pci_ss_list_10de_0280 NULL
+#define pci_ss_list_10de_0281 NULL
+#define pci_ss_list_10de_0282 NULL
+#define pci_ss_list_10de_0288 NULL
+#define pci_ss_list_10de_0289 NULL
+#define pci_ss_list_10de_0300 NULL
+#define pci_ss_list_10de_0301 NULL
+#define pci_ss_list_10de_0302 NULL
+#define pci_ss_list_10de_0308 NULL
+#define pci_ss_list_10de_0309 NULL
 #define pci_ss_list_10df_1ae5 NULL
 #define pci_ss_list_10df_f085 NULL
 #define pci_ss_list_10df_f095 NULL
@@ -25593,6 +27332,7 @@ static const pciSubsystemInfo *pci_ss_list_10e1_0391[] = {
 #endif
 #define pci_ss_list_10e3_0000 NULL
 #define pci_ss_list_10e3_0860 NULL
+#define pci_ss_list_10e3_0862 NULL
 #define pci_ss_list_10e8_2011 NULL
 #define pci_ss_list_10e8_4750 NULL
 #define pci_ss_list_10e8_5920 NULL
@@ -25615,6 +27355,7 @@ static const pciSubsystemInfo *pci_ss_list_10e1_0391[] = {
 #define pci_ss_list_10ea_2010 NULL
 #define pci_ss_list_10ea_5000 NULL
 #define pci_ss_list_10ea_5050 NULL
+#define pci_ss_list_10ea_5202 NULL
 #define pci_ss_list_10eb_0101 NULL
 #define pci_ss_list_10eb_8111 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -25642,6 +27383,7 @@ static const pciSubsystemInfo *pci_ss_list_10ec_8139[] = {
 	&pci_ss_info_10ec_8139_1186_1300,
 	&pci_ss_info_10ec_8139_1186_1320,
 	&pci_ss_info_10ec_8139_1186_8139,
+	&pci_ss_info_10ec_8139_11f6_8139,
 	&pci_ss_info_10ec_8139_1259_2500,
 	&pci_ss_info_10ec_8139_1259_2503,
 	&pci_ss_info_10ec_8139_1429_d010,
@@ -25658,7 +27400,10 @@ static const pciSubsystemInfo *pci_ss_list_10ec_8139[] = {
 	&pci_ss_info_10ec_8139_a0a0_0007,
 	NULL
 };
-#define pci_ss_list_10ec_8169 NULL
+static const pciSubsystemInfo *pci_ss_list_10ec_8169[] = {
+	&pci_ss_info_10ec_8169_1371_434e,
+	NULL
+};
 #define pci_ss_list_10ec_8197 NULL
 #endif
 #define pci_ss_list_10ed_7310 NULL
@@ -25671,7 +27416,9 @@ static const pciSubsystemInfo *pci_ss_list_10ec_8139[] = {
 #define pci_ss_list_10ef_8154 NULL
 #define pci_ss_list_10f5_a001 NULL
 #define pci_ss_list_10fa_000c NULL
+#define pci_ss_list_10fb_186f NULL
 #define pci_ss_list_10fc_0003 NULL
+#define pci_ss_list_10fc_0005 NULL
 #define pci_ss_list_1101_1060 NULL
 #define pci_ss_list_1101_9100 NULL
 #define pci_ss_list_1101_9400 NULL
@@ -25698,9 +27445,14 @@ static const pciSubsystemInfo *pci_ss_list_1102_0002[] = {
 };
 static const pciSubsystemInfo *pci_ss_list_1102_0004[] = {
 	&pci_ss_info_1102_0004_1102_0051,
+	&pci_ss_info_1102_0004_1102_0053,
+	NULL
+};
+#define pci_ss_list_1102_0006 NULL
+static const pciSubsystemInfo *pci_ss_list_1102_4001[] = {
+	&pci_ss_info_1102_4001_1102_0010,
 	NULL
 };
-#define pci_ss_list_1102_4001 NULL
 static const pciSubsystemInfo *pci_ss_list_1102_7002[] = {
 	&pci_ss_info_1102_7002_1102_0020,
 	NULL
@@ -25709,6 +27461,8 @@ static const pciSubsystemInfo *pci_ss_list_1102_7003[] = {
 	&pci_ss_info_1102_7003_1102_0040,
 	NULL
 };
+#define pci_ss_list_1102_7004 NULL
+#define pci_ss_list_1102_8064 NULL
 #define pci_ss_list_1102_8938 NULL
 #endif
 #define pci_ss_list_1103_0003 NULL
@@ -25730,6 +27484,7 @@ static const pciSubsystemInfo *pci_ss_list_1103_0004[] = {
 #define pci_ss_list_1106_0130 NULL
 static const pciSubsystemInfo *pci_ss_list_1106_0305[] = {
 	&pci_ss_info_1106_0305_1043_8033,
+	&pci_ss_info_1106_0305_1043_803e,
 	&pci_ss_info_1106_0305_1043_8042,
 	&pci_ss_info_1106_0305_147b_a401,
 	NULL
@@ -25739,7 +27494,10 @@ static const pciSubsystemInfo *pci_ss_list_1106_0305[] = {
 #define pci_ss_list_1106_0505 NULL
 #define pci_ss_list_1106_0561 NULL
 static const pciSubsystemInfo *pci_ss_list_1106_0571[] = {
+	&pci_ss_info_1106_0571_1043_8052,
 	&pci_ss_info_1106_0571_1106_0571,
+	&pci_ss_info_1106_0571_1179_0001,
+	&pci_ss_info_1106_0571_1458_5002,
 	NULL
 };
 #define pci_ss_list_1106_0576 NULL
@@ -25761,13 +27519,17 @@ static const pciSubsystemInfo *pci_ss_list_1106_0596[] = {
 #define pci_ss_list_1106_0680 NULL
 static const pciSubsystemInfo *pci_ss_list_1106_0686[] = {
 	&pci_ss_info_1106_0686_1043_8033,
+	&pci_ss_info_1106_0686_1043_803e,
 	&pci_ss_info_1106_0686_1043_8040,
 	&pci_ss_info_1106_0686_1043_8042,
 	&pci_ss_info_1106_0686_1106_0000,
 	&pci_ss_info_1106_0686_1106_0686,
+	&pci_ss_info_1106_0686_1179_0001,
+	&pci_ss_info_1106_0686_147b_a702,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_1106_0691[] = {
+	&pci_ss_info_1106_0691_1179_0001,
 	&pci_ss_info_1106_0691_1458_0691,
 	NULL
 };
@@ -25780,7 +27542,7 @@ static const pciSubsystemInfo *pci_ss_list_1106_0691[] = {
 #define pci_ss_list_1106_1595 NULL
 static const pciSubsystemInfo *pci_ss_list_1106_3038[] = {
 	&pci_ss_info_1106_3038_0925_1234,
-	&pci_ss_info_1106_3038_1234_0925,
+	&pci_ss_info_1106_3038_1179_0001,
 	NULL
 };
 #define pci_ss_list_1106_3040 NULL
@@ -25795,8 +27557,10 @@ static const pciSubsystemInfo *pci_ss_list_1106_3043[] = {
 #define pci_ss_list_1106_3051 NULL
 static const pciSubsystemInfo *pci_ss_list_1106_3057[] = {
 	&pci_ss_info_1106_3057_1043_8033,
+	&pci_ss_info_1106_3057_1043_803e,
 	&pci_ss_info_1106_3057_1043_8040,
 	&pci_ss_info_1106_3057_1043_8042,
+	&pci_ss_info_1106_3057_1179_0001,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_1106_3058[] = {
@@ -25807,16 +27571,21 @@ static const pciSubsystemInfo *pci_ss_list_1106_3058[] = {
 	&pci_ss_info_1106_3058_15dd_7609,
 	NULL
 };
-#define pci_ss_list_1106_3059 NULL
+static const pciSubsystemInfo *pci_ss_list_1106_3059[] = {
+	&pci_ss_info_1106_3059_1458_a002,
+	NULL
+};
 static const pciSubsystemInfo *pci_ss_list_1106_3065[] = {
 	&pci_ss_info_1106_3065_1106_0102,
-	&pci_ss_info_1106_3065_1106_3065,
 	&pci_ss_info_1106_3065_1186_1400,
 	&pci_ss_info_1106_3065_1186_1401,
 	NULL
 };
 #define pci_ss_list_1106_3068 NULL
-#define pci_ss_list_1106_3074 NULL
+static const pciSubsystemInfo *pci_ss_list_1106_3074[] = {
+	&pci_ss_info_1106_3074_1043_8052,
+	NULL
+};
 #define pci_ss_list_1106_3091 NULL
 static const pciSubsystemInfo *pci_ss_list_1106_3099[] = {
 	&pci_ss_info_1106_3099_1043_8064,
@@ -25826,17 +27595,30 @@ static const pciSubsystemInfo *pci_ss_list_1106_3099[] = {
 #define pci_ss_list_1106_3101 NULL
 #define pci_ss_list_1106_3102 NULL
 #define pci_ss_list_1106_3103 NULL
-#define pci_ss_list_1106_3104 NULL
+static const pciSubsystemInfo *pci_ss_list_1106_3104[] = {
+	&pci_ss_info_1106_3104_1458_5004,
+	NULL
+};
+#define pci_ss_list_1106_3106 NULL
 #define pci_ss_list_1106_3109 NULL
 #define pci_ss_list_1106_3112 NULL
 #define pci_ss_list_1106_3116 NULL
+#define pci_ss_list_1106_3122 NULL
+#define pci_ss_list_1106_3123 NULL
 #define pci_ss_list_1106_3128 NULL
 #define pci_ss_list_1106_3133 NULL
 #define pci_ss_list_1106_3147 NULL
 #define pci_ss_list_1106_3148 NULL
 #define pci_ss_list_1106_3156 NULL
-#define pci_ss_list_1106_3177 NULL
-#define pci_ss_list_1106_3189 NULL
+#define pci_ss_list_1106_3168 NULL
+static const pciSubsystemInfo *pci_ss_list_1106_3177[] = {
+	&pci_ss_info_1106_3177_1458_5001,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_1106_3189[] = {
+	&pci_ss_info_1106_3189_1458_5000,
+	NULL
+};
 #define pci_ss_list_1106_5030 NULL
 #define pci_ss_list_1106_6100 NULL
 #define pci_ss_list_1106_8231 NULL
@@ -25887,7 +27669,10 @@ static const pciSubsystemInfo *pci_ss_list_1113_1211[] = {
 	&pci_ss_info_1113_1211_1113_1211,
 	NULL
 };
-#define pci_ss_list_1113_1216 NULL
+static const pciSubsystemInfo *pci_ss_list_1113_1216[] = {
+	&pci_ss_info_1113_1216_111a_1020,
+	NULL
+};
 #define pci_ss_list_1113_1217 NULL
 #define pci_ss_list_1113_5105 NULL
 static const pciSubsystemInfo *pci_ss_list_1113_9211[] = {
@@ -26014,9 +27799,13 @@ static const pciSubsystemInfo *pci_ss_list_1127_0400[] = {
 #endif
 #define pci_ss_list_112f_0000 NULL
 #define pci_ss_list_112f_0001 NULL
+#define pci_ss_list_1131_1561 NULL
+#define pci_ss_list_1131_1562 NULL
 #define pci_ss_list_1131_3400 NULL
 #define pci_ss_list_1131_7130 NULL
+#define pci_ss_list_1131_7133 NULL
 #define pci_ss_list_1131_7134 NULL
+#define pci_ss_list_1131_7135 NULL
 #define pci_ss_list_1131_7145 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_1131_7146[] = {
@@ -26058,6 +27847,7 @@ static const pciSubsystemInfo *pci_ss_list_1133_e005[] = {
 	&pci_ss_info_1133_e005_1133_e005,
 	NULL
 };
+#define pci_ss_list_1133_e00b NULL
 static const pciSubsystemInfo *pci_ss_list_1133_e010[] = {
 	&pci_ss_info_1133_e010_1133_e010,
 	NULL
@@ -26095,6 +27885,12 @@ static const pciSubsystemInfo *pci_ss_list_1133_e014[] = {
 #define pci_ss_list_1142_6425 NULL
 #define pci_ss_list_1142_643d NULL
 #define pci_ss_list_1144_0001 NULL
+#define pci_ss_list_1145_8007 NULL
+#define pci_ss_list_1145_f007 NULL
+#define pci_ss_list_1145_f010 NULL
+#define pci_ss_list_1145_f012 NULL
+#define pci_ss_list_1145_f013 NULL
+#define pci_ss_list_1145_f015 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_1148_4000[] = {
 	&pci_ss_info_1148_4000_0e11_b03b,
@@ -26124,6 +27920,22 @@ static const pciSubsystemInfo *pci_ss_list_1148_4300[] = {
 	&pci_ss_info_1148_4300_1148_9844,
 	&pci_ss_info_1148_4300_1148_9861,
 	&pci_ss_info_1148_4300_1148_9862,
+	&pci_ss_info_1148_4300_1148_9871,
+	&pci_ss_info_1148_4300_1148_9872,
+	&pci_ss_info_1148_4300_1259_2970,
+	&pci_ss_info_1148_4300_1259_2972,
+	&pci_ss_info_1148_4300_1259_2975,
+	&pci_ss_info_1148_4300_1259_2977,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_1148_4320[] = {
+	&pci_ss_info_1148_4320_1148_5021,
+	&pci_ss_info_1148_4320_1148_5041,
+	&pci_ss_info_1148_4320_1148_5043,
+	&pci_ss_info_1148_4320_1148_5051,
+	&pci_ss_info_1148_4320_1148_5061,
+	&pci_ss_info_1148_4320_1148_5071,
+	&pci_ss_info_1148_4320_1148_9521,
 	NULL
 };
 #define pci_ss_list_1148_4400 NULL
@@ -26250,9 +28062,14 @@ static const pciSubsystemInfo *pci_ss_list_1163_2000[] = {
 #define pci_ss_list_1166_0017 NULL
 #define pci_ss_list_1166_0200 NULL
 #define pci_ss_list_1166_0201 NULL
+#define pci_ss_list_1166_0203 NULL
 #define pci_ss_list_1166_0211 NULL
 #define pci_ss_list_1166_0212 NULL
+#define pci_ss_list_1166_0213 NULL
 #define pci_ss_list_1166_0220 NULL
+#define pci_ss_list_1166_0221 NULL
+#define pci_ss_list_1166_0225 NULL
+#define pci_ss_list_1166_0227 NULL
 #define pci_ss_list_116a_6100 NULL
 #define pci_ss_list_116a_6800 NULL
 #define pci_ss_list_116a_7100 NULL
@@ -26279,9 +28096,13 @@ static const pciSubsystemInfo *pci_ss_list_1179_0d01[] = {
 #endif
 #define pci_ss_list_1180_0465 NULL
 #define pci_ss_list_1180_0466 NULL
-#define pci_ss_list_1180_0475 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo *pci_ss_list_1180_0475[] = {
+	&pci_ss_info_1180_0475_144d_c006,
+	NULL
+};
 static const pciSubsystemInfo *pci_ss_list_1180_0476[] = {
+	&pci_ss_info_1180_0476_1014_0185,
 	&pci_ss_info_1180_0476_104d_80df,
 	&pci_ss_info_1180_0476_104d_80e7,
 	NULL
@@ -26295,8 +28116,14 @@ static const pciSubsystemInfo *pci_ss_list_1180_0522[] = {
 	&pci_ss_info_1180_0522_1014_01cf,
 	NULL
 };
-#define pci_ss_list_1180_0551 NULL
-#define pci_ss_list_1180_0552 NULL
+static const pciSubsystemInfo *pci_ss_list_1180_0551[] = {
+	&pci_ss_info_1180_0551_144d_c006,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_1180_0552[] = {
+	&pci_ss_info_1180_0552_1014_0511,
+	NULL
+};
 #endif
 #define pci_ss_list_1186_0100 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -26381,7 +28208,6 @@ static const pciSubsystemInfo *pci_ss_list_11ad_c115[] = {
 #define pci_ss_list_11bc_0001 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_11c1_0440[] = {
-	&pci_ss_info_11c1_0440_0001_0440,
 	&pci_ss_info_11c1_0440_1033_8015,
 	&pci_ss_info_11c1_0440_1033_8047,
 	&pci_ss_info_11c1_0440_1033_804f,
@@ -26427,7 +28253,6 @@ static const pciSubsystemInfo *pci_ss_list_11c1_0441[] = {
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_11c1_0442[] = {
-	&pci_ss_info_11c1_0442_0001_0440,
 	&pci_ss_info_11c1_0442_11c1_0440,
 	&pci_ss_info_11c1_0442_11c1_0442,
 	&pci_ss_info_11c1_0442_13e0_0412,
@@ -26475,7 +28300,10 @@ static const pciSubsystemInfo *pci_ss_list_11c1_044a[] = {
 #define pci_ss_list_11c1_044d NULL
 #define pci_ss_list_11c1_044e NULL
 #define pci_ss_list_11c1_044f NULL
-#define pci_ss_list_11c1_0450 NULL
+static const pciSubsystemInfo *pci_ss_list_11c1_0450[] = {
+	&pci_ss_info_11c1_0450_144f_4005,
+	NULL
+};
 #define pci_ss_list_11c1_0451 NULL
 #define pci_ss_list_11c1_0452 NULL
 #define pci_ss_list_11c1_0453 NULL
@@ -26486,11 +28314,13 @@ static const pciSubsystemInfo *pci_ss_list_11c1_044a[] = {
 #define pci_ss_list_11c1_0458 NULL
 #define pci_ss_list_11c1_0459 NULL
 #define pci_ss_list_11c1_045a NULL
+#define pci_ss_list_11c1_045c NULL
 #define pci_ss_list_11c1_0461 NULL
 #define pci_ss_list_11c1_0462 NULL
 #define pci_ss_list_11c1_0480 NULL
 #define pci_ss_list_11c1_5801 NULL
 #define pci_ss_list_11c1_5802 NULL
+#define pci_ss_list_11c1_5803 NULL
 static const pciSubsystemInfo *pci_ss_list_11c1_5811[] = {
 	&pci_ss_info_11c1_5811_dead_0800,
 	NULL
@@ -26564,6 +28394,15 @@ static const pciSubsystemInfo *pci_ss_list_11f6_2201[] = {
 #define pci_ss_list_11fe_000b NULL
 #define pci_ss_list_11fe_000c NULL
 #define pci_ss_list_11fe_8015 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo *pci_ss_list_1202_4300[] = {
+	&pci_ss_info_1202_4300_1202_9841,
+	&pci_ss_info_1202_4300_1202_9842,
+	&pci_ss_info_1202_4300_1202_9843,
+	&pci_ss_info_1202_4300_1202_9844,
+	NULL
+};
+#endif
 #define pci_ss_list_1208_4853 NULL
 #define pci_ss_list_120e_0100 NULL
 #define pci_ss_list_120e_0101 NULL
@@ -26592,7 +28431,10 @@ static const pciSubsystemInfo *pci_ss_list_1217_6933[] = {
 	&pci_ss_info_1217_6933_1025_1016,
 	NULL
 };
-#define pci_ss_list_1217_6972 NULL
+static const pciSubsystemInfo *pci_ss_list_1217_6972[] = {
+	&pci_ss_info_1217_6972_1179_0001,
+	NULL
+};
 #endif
 #define pci_ss_list_121a_0001 NULL
 #define pci_ss_list_121a_0002 NULL
@@ -26612,7 +28454,6 @@ static const pciSubsystemInfo *pci_ss_list_121a_0003[] = {
 	&pci_ss_info_121a_0003_139c_0016,
 	&pci_ss_info_121a_0003_139c_0017,
 	&pci_ss_info_121a_0003_14af_0002,
-	&pci_ss_info_121a_0003_3030_3030,
 	NULL
 };
 #define pci_ss_list_121a_0004 NULL
@@ -26683,9 +28524,14 @@ static const pciSubsystemInfo *pci_ss_list_123f_8888[] = {
 	NULL
 };
 #endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo *pci_ss_list_1242_1560[] = {
+	&pci_ss_info_1242_1560_1242_6562,
+	&pci_ss_info_1242_1560_1242_656a,
+	NULL
+};
 #define pci_ss_list_1242_4643 NULL
-#define pci_ss_list_1242_6562 NULL
-#define pci_ss_list_1242_656a NULL
+#endif
 #define pci_ss_list_1244_0700 NULL
 #define pci_ss_list_1244_0800 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -26730,10 +28576,10 @@ static const pciSubsystemInfo *pci_ss_list_125d_1968[] = {
 static const pciSubsystemInfo *pci_ss_list_125d_1969[] = {
 	&pci_ss_info_125d_1969_1014_0166,
 	&pci_ss_info_125d_1969_125d_8888,
-	&pci_ss_info_125d_1969_525f_c888,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_125d_1978[] = {
+	&pci_ss_info_125d_1978_0e11_b112,
 	&pci_ss_info_125d_1978_1033_803c,
 	&pci_ss_info_125d_1978_1033_8058,
 	&pci_ss_info_125d_1978_1092_4000,
@@ -26774,7 +28620,9 @@ static const pciSubsystemInfo *pci_ss_list_125d_2898[] = {
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_1260_3873[] = {
 	&pci_ss_info_1260_3873_1186_3501,
+	&pci_ss_info_1260_3873_1668_0414,
 	&pci_ss_info_1260_3873_1737_3874,
+	&pci_ss_info_1260_3873_8086_2513,
 	NULL
 };
 #define pci_ss_list_1260_8130 NULL
@@ -26854,10 +28702,7 @@ static const pciSubsystemInfo *pci_ss_list_1274_1371[] = {
 	&pci_ss_info_1274_1371_8086_5753,
 	NULL
 };
-static const pciSubsystemInfo *pci_ss_list_1274_5000[] = {
-	&pci_ss_info_1274_5000_4942_4c4c,
-	NULL
-};
+#define pci_ss_list_1274_5000 NULL
 static const pciSubsystemInfo *pci_ss_list_1274_5880[] = {
 	&pci_ss_info_1274_5880_1274_2000,
 	&pci_ss_info_1274_5880_1274_2003,
@@ -27283,7 +29128,19 @@ static const pciSubsystemInfo *pci_ss_list_134d_7891[] = {
 #define pci_ss_list_1353_0003 NULL
 #define pci_ss_list_1353_0004 NULL
 #define pci_ss_list_1353_0005 NULL
+#define pci_ss_list_135c_0010 NULL
+#define pci_ss_list_135c_0020 NULL
+#define pci_ss_list_135c_0030 NULL
+#define pci_ss_list_135c_0040 NULL
+#define pci_ss_list_135c_0050 NULL
+#define pci_ss_list_135c_0060 NULL
 #define pci_ss_list_135c_00f0 NULL
+#define pci_ss_list_135c_0170 NULL
+#define pci_ss_list_135c_0180 NULL
+#define pci_ss_list_135c_0190 NULL
+#define pci_ss_list_135c_01a0 NULL
+#define pci_ss_list_135c_01b0 NULL
+#define pci_ss_list_135c_01c0 NULL
 #define pci_ss_list_135e_7101 NULL
 #define pci_ss_list_135e_7201 NULL
 #define pci_ss_list_135e_7202 NULL
@@ -27322,11 +29179,17 @@ static const pciSubsystemInfo *pci_ss_list_1397_2bd0[] = {
 #define pci_ss_list_13a3_0006 NULL
 #define pci_ss_list_13a3_0007 NULL
 #define pci_ss_list_13a3_0012 NULL
+#define pci_ss_list_13a3_0014 NULL
+#define pci_ss_list_13a3_0016 NULL
+#define pci_ss_list_13a3_0017 NULL
+#define pci_ss_list_13a3_0018 NULL
 #define pci_ss_list_13a8_0158 NULL
 #define pci_ss_list_13c0_0010 NULL
 #define pci_ss_list_13c1_1000 NULL
 #define pci_ss_list_13c1_1001 NULL
 #define pci_ss_list_13c1_1002 NULL
+#define pci_ss_list_13d0_2103 NULL
+#define pci_ss_list_13d1_ab02 NULL
 #define pci_ss_list_13d1_ab06 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_13df_0001[] = {
@@ -27346,6 +29209,7 @@ static const pciSubsystemInfo *pci_ss_list_13f6_0101[] = {
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_13f6_0111[] = {
+	&pci_ss_info_13f6_0111_1019_0970,
 	&pci_ss_info_13f6_0111_1043_8077,
 	&pci_ss_info_13f6_0111_1043_80e2,
 	&pci_ss_info_13f6_0111_13f6_0111,
@@ -27370,6 +29234,7 @@ static const pciSubsystemInfo *pci_ss_list_13f6_0111[] = {
 #define pci_ss_list_1407_8800 NULL
 #define pci_ss_list_1409_7168 NULL
 #define pci_ss_list_1412_1712 NULL
+#define pci_ss_list_1412_1724 NULL
 #define pci_ss_list_1415_8403 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_1415_9501[] = {
@@ -27400,12 +29265,21 @@ static const pciSubsystemInfo *pci_ss_list_1415_9511[] = {
 #define pci_ss_list_148d_1003 NULL
 #define pci_ss_list_14af_7102 NULL
 #define pci_ss_list_14b3_0000 NULL
+#define pci_ss_list_14b5_0200 NULL
+#define pci_ss_list_14b5_0300 NULL
+#define pci_ss_list_14b5_0400 NULL
+#define pci_ss_list_14b5_0600 NULL
+#define pci_ss_list_14b5_0800 NULL
+#define pci_ss_list_14b5_0900 NULL
+#define pci_ss_list_14b5_0a00 NULL
+#define pci_ss_list_14b5_0b00 NULL
 #define pci_ss_list_14b7_0001 NULL
 #define pci_ss_list_14b9_0001 NULL
 #define pci_ss_list_14b9_0340 NULL
 #define pci_ss_list_14b9_0350 NULL
 #define pci_ss_list_14b9_4500 NULL
 #define pci_ss_list_14b9_4800 NULL
+#define pci_ss_list_14b9_a504 NULL
 #define pci_ss_list_14d2_8001 NULL
 #define pci_ss_list_14d2_8002 NULL
 #define pci_ss_list_14d2_8010 NULL
@@ -27462,6 +29336,7 @@ static const pciSubsystemInfo *pci_ss_list_14e4_1645[] = {
 	&pci_ss_info_14e4_1645_0e11_0085,
 	&pci_ss_info_14e4_1645_0e11_0099,
 	&pci_ss_info_14e4_1645_0e11_009a,
+	&pci_ss_info_14e4_1645_0e11_00c1,
 	&pci_ss_info_14e4_1645_1028_0121,
 	&pci_ss_info_14e4_1645_10b7_1004,
 	&pci_ss_info_14e4_1645_10b7_1006,
@@ -27491,10 +29366,62 @@ static const pciSubsystemInfo *pci_ss_list_14e4_1647[] = {
 	&pci_ss_info_14e4_1647_14e4_800a,
 	NULL
 };
+static const pciSubsystemInfo *pci_ss_list_14e4_1648[] = {
+	&pci_ss_info_14e4_1648_0e11_00cf,
+	&pci_ss_info_14e4_1648_0e11_00d0,
+	&pci_ss_info_14e4_1648_0e11_00d1,
+	&pci_ss_info_14e4_1648_10b7_2000,
+	&pci_ss_info_14e4_1648_10b7_3000,
+	&pci_ss_info_14e4_1648_1166_1648,
+	NULL
+};
 #define pci_ss_list_14e4_164d NULL
-#define pci_ss_list_14e4_16a6 NULL
-#define pci_ss_list_14e4_16a7 NULL
+#define pci_ss_list_14e4_1653 NULL
+#define pci_ss_list_14e4_165d NULL
+static const pciSubsystemInfo *pci_ss_list_14e4_1696[] = {
+	&pci_ss_info_14e4_1696_14e4_000d,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_14e4_16a6[] = {
+	&pci_ss_info_14e4_16a6_0e11_00bb,
+	&pci_ss_info_14e4_16a6_1028_0126,
+	&pci_ss_info_14e4_16a6_14e4_000c,
+	&pci_ss_info_14e4_16a6_14e4_8009,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_14e4_16a7[] = {
+	&pci_ss_info_14e4_16a7_0e11_00ca,
+	&pci_ss_info_14e4_16a7_0e11_00cb,
+	&pci_ss_info_14e4_16a7_14e4_0009,
+	&pci_ss_info_14e4_16a7_14e4_000a,
+	&pci_ss_info_14e4_16a7_14e4_000b,
+	&pci_ss_info_14e4_16a7_14e4_800a,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_14e4_16a8[] = {
+	&pci_ss_info_14e4_16a8_10b7_2001,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_14e4_16c6[] = {
+	&pci_ss_info_14e4_16c6_10b7_1100,
+	&pci_ss_info_14e4_16c6_14e4_000c,
+	&pci_ss_info_14e4_16c6_14e4_8009,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_14e4_16c7[] = {
+	&pci_ss_info_14e4_16c7_14e4_0009,
+	&pci_ss_info_14e4_16c7_14e4_000a,
+	NULL
+};
+#define pci_ss_list_14e4_4210 NULL
+#define pci_ss_list_14e4_4211 NULL
 #define pci_ss_list_14e4_4212 NULL
+#define pci_ss_list_14e4_4301 NULL
+#define pci_ss_list_14e4_4401 NULL
+#define pci_ss_list_14e4_4402 NULL
+#define pci_ss_list_14e4_4410 NULL
+#define pci_ss_list_14e4_4411 NULL
+#define pci_ss_list_14e4_4412 NULL
 #define pci_ss_list_14e4_5820 NULL
 #define pci_ss_list_14e4_5821 NULL
 #endif
@@ -27683,9 +29610,17 @@ static const pciSubsystemInfo *pci_ss_list_1522_0100[] = {
 	&pci_ss_info_1522_0100_1522_0400,
 	&pci_ss_info_1522_0100_1522_0500,
 	&pci_ss_info_1522_0100_1522_0600,
+	&pci_ss_info_1522_0100_1522_0700,
+	&pci_ss_info_1522_0100_1522_0800,
 	NULL
 };
 #endif
+#define pci_ss_list_1524_1211 NULL
+#define pci_ss_list_1524_1225 NULL
+#define pci_ss_list_1524_1410 NULL
+#define pci_ss_list_1524_1420 NULL
+#define pci_ss_list_1543_3052 NULL
+#define pci_ss_list_1543_4c22 NULL
 #define pci_ss_list_1571_a001 NULL
 #define pci_ss_list_1571_a002 NULL
 #define pci_ss_list_1571_a003 NULL
@@ -27726,9 +29661,19 @@ static const pciSubsystemInfo *pci_ss_list_1522_0100[] = {
 #define pci_ss_list_1629_1003 NULL
 #define pci_ss_list_1629_2002 NULL
 #define pci_ss_list_1638_1100 NULL
+#define pci_ss_list_163c_5449 NULL
+#define pci_ss_list_165a_c100 NULL
+#define pci_ss_list_165a_d200 NULL
+#define pci_ss_list_165a_d300 NULL
+#define pci_ss_list_16ab_1102 NULL
 #define pci_ss_list_16ec_3685 NULL
 #define pci_ss_list_173b_03e8 NULL
-#define pci_ss_list_173b_03ea NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo *pci_ss_list_173b_03ea[] = {
+	&pci_ss_info_173b_03ea_173b_0001,
+	NULL
+};
+#endif
 #define pci_ss_list_1743_8139 NULL
 #define pci_ss_list_1796_0001 NULL
 #define pci_ss_list_1796_0002 NULL
@@ -27736,6 +29681,21 @@ static const pciSubsystemInfo *pci_ss_list_1522_0100[] = {
 #define pci_ss_list_1796_0004 NULL
 #define pci_ss_list_1796_0005 NULL
 #define pci_ss_list_1796_0006 NULL
+#define pci_ss_list_17cc_2280 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo *pci_ss_list_1813_4000[] = {
+	&pci_ss_info_1813_4000_16be_0001,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_1813_4100[] = {
+	&pci_ss_info_1813_4100_16be_0002,
+	NULL
+};
+#endif
+#define pci_ss_list_1888_0301 NULL
+#define pci_ss_list_1888_0601 NULL
+#define pci_ss_list_1888_0710 NULL
+#define pci_ss_list_1888_0720 NULL
 #define pci_ss_list_1a08_0000 NULL
 #define pci_ss_list_1c1c_0001 NULL
 #define pci_ss_list_1d44_a400 NULL
@@ -27744,6 +29704,8 @@ static const pciSubsystemInfo *pci_ss_list_1522_0100[] = {
 #define pci_ss_list_1de1_690c NULL
 #define pci_ss_list_1de1_dc29 NULL
 #define pci_ss_list_2348_2010 NULL
+#define pci_ss_list_3388_0013 NULL
+#define pci_ss_list_3388_0014 NULL
 #define pci_ss_list_3388_0021 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_3388_8011[] = {
@@ -27783,7 +29745,10 @@ static const pciSubsystemInfo *pci_ss_list_3d3d_000a[] = {
 	&pci_ss_info_3d3d_000a_3d3d_0121,
 	NULL
 };
-#define pci_ss_list_3d3d_000c NULL
+static const pciSubsystemInfo *pci_ss_list_3d3d_000c[] = {
+	&pci_ss_info_3d3d_000c_3d3d_0144,
+	NULL
+};
 #define pci_ss_list_3d3d_0100 NULL
 #define pci_ss_list_3d3d_1004 NULL
 #define pci_ss_list_3d3d_3d04 NULL
@@ -27808,6 +29773,7 @@ static const pciSubsystemInfo *pci_ss_list_4005_4000[] = {
 #define pci_ss_list_4033_1360 NULL
 #define pci_ss_list_416c_0100 NULL
 #define pci_ss_list_416c_0200 NULL
+#define pci_ss_list_4444_0803 NULL
 #define pci_ss_list_4916_1960 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_4a14_5000[] = {
@@ -27961,8 +29927,14 @@ static const pciSubsystemInfo *pci_ss_list_5333_8c01[] = {
 #define pci_ss_list_5333_8c03 NULL
 #define pci_ss_list_5333_8c10 NULL
 #define pci_ss_list_5333_8c11 NULL
-#define pci_ss_list_5333_8c12 NULL
-#define pci_ss_list_5333_8c13 NULL
+static const pciSubsystemInfo *pci_ss_list_5333_8c12[] = {
+	&pci_ss_info_5333_8c12_1014_017f,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_5333_8c13[] = {
+	&pci_ss_info_5333_8c13_1179_0001,
+	NULL
+};
 #define pci_ss_list_5333_8c22 NULL
 #define pci_ss_list_5333_8c24 NULL
 #define pci_ss_list_5333_8c26 NULL
@@ -27977,6 +29949,7 @@ static const pciSubsystemInfo *pci_ss_list_5333_8c2e[] = {
 #define pci_ss_list_5333_8c2f NULL
 #define pci_ss_list_5333_8d01 NULL
 #define pci_ss_list_5333_8d02 NULL
+#define pci_ss_list_5333_8d03 NULL
 #define pci_ss_list_5333_8d04 NULL
 static const pciSubsystemInfo *pci_ss_list_5333_9102[] = {
 	&pci_ss_info_5333_9102_1092_5932,
@@ -28089,6 +30062,7 @@ static const pciSubsystemInfo *pci_ss_list_8086_1031[] = {
 	&pci_ss_info_8086_1031_144d_c000,
 	&pci_ss_info_8086_1031_144d_c001,
 	&pci_ss_info_8086_1031_144d_c003,
+	&pci_ss_info_8086_1031_144d_c006,
 	NULL
 };
 #define pci_ss_list_8086_1032 NULL
@@ -28104,8 +30078,13 @@ static const pciSubsystemInfo *pci_ss_list_8086_1031[] = {
 #define pci_ss_list_8086_103c NULL
 #define pci_ss_list_8086_103d NULL
 #define pci_ss_list_8086_103e NULL
+static const pciSubsystemInfo *pci_ss_list_8086_1040[] = {
+	&pci_ss_info_8086_1040_16be_1040,
+	NULL
+};
 #define pci_ss_list_8086_1059 NULL
 static const pciSubsystemInfo *pci_ss_list_8086_1130[] = {
+	&pci_ss_info_8086_1130_1025_1016,
 	&pci_ss_info_8086_1130_1043_8027,
 	&pci_ss_info_8086_1130_104d_80df,
 	NULL
@@ -28163,13 +30142,16 @@ static const pciSubsystemInfo *pci_ss_list_8086_1229[] = {
 	&pci_ss_info_8086_1229_1014_01f2,
 	&pci_ss_info_8086_1229_1014_0207,
 	&pci_ss_info_8086_1229_1014_0232,
+	&pci_ss_info_8086_1229_1014_023a,
 	&pci_ss_info_8086_1229_1014_105c,
+	&pci_ss_info_8086_1229_1014_2205,
 	&pci_ss_info_8086_1229_1014_305c,
 	&pci_ss_info_8086_1229_1014_405c,
 	&pci_ss_info_8086_1229_1014_505c,
 	&pci_ss_info_8086_1229_1014_605c,
 	&pci_ss_info_8086_1229_1014_705c,
 	&pci_ss_info_8086_1229_1014_805c,
+	&pci_ss_info_8086_1229_1028_009b,
 	&pci_ss_info_8086_1229_1033_8000,
 	&pci_ss_info_8086_1229_1033_8016,
 	&pci_ss_info_8086_1229_1033_801f,
@@ -28303,7 +30285,10 @@ static const pciSubsystemInfo *pci_ss_list_8086_1361[] = {
 	NULL
 };
 #define pci_ss_list_8086_1460 NULL
-#define pci_ss_list_8086_1461 NULL
+static const pciSubsystemInfo *pci_ss_list_8086_1461[] = {
+	&pci_ss_info_8086_1461_15d9_3480,
+	NULL
+};
 #define pci_ss_list_8086_1462 NULL
 static const pciSubsystemInfo *pci_ss_list_8086_1960[] = {
 	&pci_ss_info_8086_1960_101e_0431,
@@ -28363,28 +30348,36 @@ static const pciSubsystemInfo *pci_ss_list_8086_2425[] = {
 #define pci_ss_list_8086_2428 NULL
 #define pci_ss_list_8086_2440 NULL
 static const pciSubsystemInfo *pci_ss_list_8086_2442[] = {
+	&pci_ss_info_8086_2442_1014_01c6,
+	&pci_ss_info_8086_2442_1025_1016,
 	&pci_ss_info_8086_2442_104d_80df,
 	&pci_ss_info_8086_2442_147b_0507,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_8086_2443[] = {
+	&pci_ss_info_8086_2443_1014_01c6,
+	&pci_ss_info_8086_2443_1025_1016,
 	&pci_ss_info_8086_2443_1043_8027,
 	&pci_ss_info_8086_2443_104d_80df,
 	&pci_ss_info_8086_2443_147b_0507,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_8086_2444[] = {
+	&pci_ss_info_8086_2444_1025_1016,
 	&pci_ss_info_8086_2444_104d_80df,
 	&pci_ss_info_8086_2444_147b_0507,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_8086_2445[] = {
+	&pci_ss_info_8086_2445_1014_01c6,
+	&pci_ss_info_8086_2445_1025_1016,
 	&pci_ss_info_8086_2445_104d_80df,
 	&pci_ss_info_8086_2445_1462_3370,
 	&pci_ss_info_8086_2445_147b_0507,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_8086_2446[] = {
+	&pci_ss_info_8086_2446_1025_1016,
 	&pci_ss_info_8086_2446_104d_80df,
 	NULL
 };
@@ -28424,6 +30417,7 @@ static const pciSubsystemInfo *pci_ss_list_8086_244a[] = {
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_8086_244b[] = {
+	&pci_ss_info_8086_244b_1014_01c6,
 	&pci_ss_info_8086_244b_1043_8027,
 	&pci_ss_info_8086_244b_147b_0507,
 	NULL
@@ -28441,51 +30435,94 @@ static const pciSubsystemInfo *pci_ss_list_8086_244b[] = {
 static const pciSubsystemInfo *pci_ss_list_8086_2482[] = {
 	&pci_ss_info_8086_2482_1014_0220,
 	&pci_ss_info_8086_2482_104d_80e7,
+	&pci_ss_info_8086_2482_15d9_3480,
+	&pci_ss_info_8086_2482_8086_1958,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_8086_2483[] = {
 	&pci_ss_info_8086_2483_1014_0220,
 	&pci_ss_info_8086_2483_104d_80e7,
+	&pci_ss_info_8086_2483_15d9_3480,
+	&pci_ss_info_8086_2483_8086_1958,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_8086_2484[] = {
 	&pci_ss_info_8086_2484_1014_0220,
 	&pci_ss_info_8086_2484_104d_80e7,
+	&pci_ss_info_8086_2484_15d9_3480,
+	&pci_ss_info_8086_2484_8086_1958,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_8086_2485[] = {
 	&pci_ss_info_8086_2485_1014_0222,
+	&pci_ss_info_8086_2485_1014_0508,
+	&pci_ss_info_8086_2485_1014_051c,
 	&pci_ss_info_8086_2485_104d_80e7,
+	&pci_ss_info_8086_2485_144d_c006,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_8086_2486[] = {
 	&pci_ss_info_8086_2486_1014_0223,
 	&pci_ss_info_8086_2486_1014_0503,
+	&pci_ss_info_8086_2486_1014_051a,
 	&pci_ss_info_8086_2486_104d_80e7,
+	&pci_ss_info_8086_2486_1179_0001,
 	&pci_ss_info_8086_2486_134d_4c21,
+	&pci_ss_info_8086_2486_144d_2115,
+	&pci_ss_info_8086_2486_14f1_5421,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_8086_2487[] = {
 	&pci_ss_info_8086_2487_1014_0220,
 	&pci_ss_info_8086_2487_104d_80e7,
+	&pci_ss_info_8086_2487_15d9_3480,
+	&pci_ss_info_8086_2487_8086_1958,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_8086_248a[] = {
 	&pci_ss_info_8086_248a_1014_0220,
 	&pci_ss_info_8086_248a_104d_80e7,
+	&pci_ss_info_8086_248a_8086_1958,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_8086_248b[] = {
+	&pci_ss_info_8086_248b_15d9_3480,
 	NULL
 };
-#define pci_ss_list_8086_248b NULL
 #define pci_ss_list_8086_248c NULL
-#define pci_ss_list_8086_24c0 NULL
-#define pci_ss_list_8086_24c2 NULL
-#define pci_ss_list_8086_24c3 NULL
-#define pci_ss_list_8086_24c4 NULL
-#define pci_ss_list_8086_24c5 NULL
+static const pciSubsystemInfo *pci_ss_list_8086_24c0[] = {
+	&pci_ss_info_8086_24c0_1462_5800,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_8086_24c2[] = {
+	&pci_ss_info_8086_24c2_1462_5800,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_8086_24c3[] = {
+	&pci_ss_info_8086_24c3_1462_5800,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_8086_24c4[] = {
+	&pci_ss_info_8086_24c4_1462_5800,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_8086_24c5[] = {
+	&pci_ss_info_8086_24c5_1462_5800,
+	NULL
+};
 #define pci_ss_list_8086_24c6 NULL
-#define pci_ss_list_8086_24c7 NULL
-#define pci_ss_list_8086_24cb NULL
-#define pci_ss_list_8086_24cd NULL
+static const pciSubsystemInfo *pci_ss_list_8086_24c7[] = {
+	&pci_ss_info_8086_24c7_1462_5800,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_8086_24cb[] = {
+	&pci_ss_info_8086_24cb_1462_5800,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_8086_24cd[] = {
+	&pci_ss_info_8086_24cd_1462_3981,
+	NULL
+};
 static const pciSubsystemInfo *pci_ss_list_8086_2500[] = {
 	&pci_ss_info_8086_2500_1028_0095,
 	&pci_ss_info_8086_2500_1043_801c,
@@ -28507,17 +30544,28 @@ static const pciSubsystemInfo *pci_ss_list_8086_2530[] = {
 #define pci_ss_list_8086_2532 NULL
 #define pci_ss_list_8086_2533 NULL
 #define pci_ss_list_8086_2534 NULL
-#define pci_ss_list_8086_2540 NULL
-#define pci_ss_list_8086_2541 NULL
+static const pciSubsystemInfo *pci_ss_list_8086_2540[] = {
+	&pci_ss_info_8086_2540_15d9_3480,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_8086_2541[] = {
+	&pci_ss_info_8086_2541_15d9_3480,
+	NULL
+};
 #define pci_ss_list_8086_2543 NULL
 #define pci_ss_list_8086_2544 NULL
 #define pci_ss_list_8086_2545 NULL
 #define pci_ss_list_8086_2546 NULL
 #define pci_ss_list_8086_2547 NULL
 #define pci_ss_list_8086_2548 NULL
-#define pci_ss_list_8086_2560 NULL
+static const pciSubsystemInfo *pci_ss_list_8086_2560[] = {
+	&pci_ss_info_8086_2560_1462_5800,
+	NULL
+};
 #define pci_ss_list_8086_2561 NULL
 #define pci_ss_list_8086_2562 NULL
+#define pci_ss_list_8086_2570 NULL
+#define pci_ss_list_8086_2572 NULL
 #define pci_ss_list_8086_3092 NULL
 static const pciSubsystemInfo *pci_ss_list_8086_3575[] = {
 	&pci_ss_info_8086_3575_1014_021d,
@@ -28525,8 +30573,13 @@ static const pciSubsystemInfo *pci_ss_list_8086_3575[] = {
 	NULL
 };
 #define pci_ss_list_8086_3576 NULL
-#define pci_ss_list_8086_3577 NULL
+static const pciSubsystemInfo *pci_ss_list_8086_3577[] = {
+	&pci_ss_info_8086_3577_1014_0513,
+	NULL
+};
 #define pci_ss_list_8086_3578 NULL
+#define pci_ss_list_8086_3580 NULL
+#define pci_ss_list_8086_3582 NULL
 #define pci_ss_list_8086_5200 NULL
 static const pciSubsystemInfo *pci_ss_list_8086_5201[] = {
 	&pci_ss_info_8086_5201_8086_0001,
@@ -28555,6 +30608,7 @@ static const pciSubsystemInfo *pci_ss_list_8086_5201[] = {
 #define pci_ss_list_8086_7181 NULL
 static const pciSubsystemInfo *pci_ss_list_8086_7190[] = {
 	&pci_ss_info_8086_7190_0e11_0500,
+	&pci_ss_info_8086_7190_0e11_b110,
 	&pci_ss_info_8086_7190_1179_0001,
 	NULL
 };
@@ -28793,7 +30847,11 @@ static const pciSubsystemInfo *pci_ss_list_9005_0081[] = {
 	NULL
 };
 #define pci_ss_list_9005_0083 NULL
-#define pci_ss_list_9005_008f NULL
+static const pciSubsystemInfo *pci_ss_list_9005_008f[] = {
+	&pci_ss_info_9005_008f_1179_0001,
+	&pci_ss_info_9005_008f_15d9_9005,
+	NULL
+};
 static const pciSubsystemInfo *pci_ss_list_9005_00c0[] = {
 	&pci_ss_info_9005_00c0_0e11_f620,
 	&pci_ss_info_9005_00c0_9005_f620,
@@ -28801,8 +30859,16 @@ static const pciSubsystemInfo *pci_ss_list_9005_00c0[] = {
 };
 #define pci_ss_list_9005_00c1 NULL
 #define pci_ss_list_9005_00c3 NULL
-#define pci_ss_list_9005_00c5 NULL
-#define pci_ss_list_9005_00cf NULL
+static const pciSubsystemInfo *pci_ss_list_9005_00c5[] = {
+	&pci_ss_info_9005_00c5_1028_00c5,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_9005_00cf[] = {
+	&pci_ss_info_9005_00cf_1028_00d1,
+	&pci_ss_info_9005_00cf_10f1_2462,
+	&pci_ss_info_9005_00cf_15d9_9005,
+	NULL
+};
 static const pciSubsystemInfo *pci_ss_list_9005_0250[] = {
 	&pci_ss_info_9005_0250_1014_0279,
 	&pci_ss_info_9005_0250_1014_028c,
@@ -28839,6 +30905,7 @@ static const pciSubsystemInfo *pci_ss_list_9005_8011[] = {
 #define pci_ss_list_9710_9815 NULL
 #define pci_ss_list_9710_9835 NULL
 #define pci_ss_list_cddd_0101 NULL
+#define pci_ss_list_cddd_0200 NULL
 #define pci_ss_list_d4d4_0601 NULL
 #define pci_ss_list_e000_e000 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -28849,6 +30916,9 @@ static const pciSubsystemInfo *pci_ss_list_e159_0001[] = {
 };
 #define pci_ss_list_e159_0002 NULL
 #endif
+#define pci_ss_list_ea60_9896 NULL
+#define pci_ss_list_ea60_9897 NULL
+#define pci_ss_list_ea60_9898 NULL
 #define pci_ss_list_eace_3100 NULL
 #define pci_ss_list_eace_3200 NULL
 #define pci_ss_list_eace_320e NULL
@@ -28861,14 +30931,23 @@ static const pciSubsystemInfo *pci_ss_list_e159_0001[] = {
 #define pci_ss_list_eace_4220 NULL
 #define pci_ss_list_eace_422e NULL
 #define pci_ss_list_ec80_ec00 NULL
+#define pci_ss_list_ecc0_0050 NULL
+#define pci_ss_list_ecc0_0051 NULL
+#define pci_ss_list_ecc0_0060 NULL
+#define pci_ss_list_ecc0_0070 NULL
+#define pci_ss_list_ecc0_0071 NULL
+#define pci_ss_list_ecc0_0072 NULL
+#define pci_ss_list_ecc0_0080 NULL
 #define pci_ss_list_edd8_a091 NULL
 #define pci_ss_list_edd8_a099 NULL
 #define pci_ss_list_edd8_a0a1 NULL
 #define pci_ss_list_edd8_a0a9 NULL
+#define pci_ss_list_f1d0_cafe NULL
 #define pci_ss_list_f1d0_efac NULL
 #define pci_ss_list_f1d0_facd NULL
+#define pci_ss_list_feda_a0fa NULL
+#define pci_ss_list_feda_a10e NULL
 #define pci_ss_list_fffe_0710 NULL
-#define pci_ss_list_ffff_0c30 NULL
 #ifdef INIT_VENDOR_SUBSYS_INFO
 #define pci_ss_list_0000 NULL
 #define pci_ss_list_001a NULL
@@ -28879,6 +30958,13 @@ static const pciSubsystemInfo *pci_ss_list_003d[] = {
 	NULL
 };
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo *pci_ss_list_0059[] = {
+	&pci_ss_info_0059_0001,
+	&pci_ss_info_0059_0003,
+	NULL
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_0070[] = {
 	&pci_ss_info_0070_13eb,
 	&pci_ss_info_0070_ff01,
@@ -28914,6 +31000,12 @@ static const pciSubsystemInfo *pci_ss_list_0e11[] = {
 	&pci_ss_info_0e11_009a,
 	&pci_ss_info_0e11_00ac,
 	&pci_ss_info_0e11_00bb,
+	&pci_ss_info_0e11_00c1,
+	&pci_ss_info_0e11_00ca,
+	&pci_ss_info_0e11_00cb,
+	&pci_ss_info_0e11_00cf,
+	&pci_ss_info_0e11_00d0,
+	&pci_ss_info_0e11_00d1,
 	&pci_ss_info_0e11_0460,
 	&pci_ss_info_0e11_0500,
 	&pci_ss_info_0e11_3001,
@@ -28957,6 +31049,10 @@ static const pciSubsystemInfo *pci_ss_list_0e11[] = {
 	&pci_ss_info_0e11_b0e8,
 	&pci_ss_info_0e11_b0fd,
 	&pci_ss_info_0e11_b10e,
+	&pci_ss_info_0e11_b110,
+	&pci_ss_info_0e11_b111,
+	&pci_ss_info_0e11_b112,
+	&pci_ss_info_0e11_b113,
 	&pci_ss_info_0e11_b114,
 	&pci_ss_info_0e11_b123,
 	&pci_ss_info_0e11_b126,
@@ -29020,9 +31116,11 @@ static const pciSubsystemInfo *pci_ss_list_1002[] = {
 	&pci_ss_info_1002_0088,
 	&pci_ss_info_1002_008a,
 	&pci_ss_info_1002_00ba,
+	&pci_ss_info_1002_010a,
 	&pci_ss_info_1002_0139,
 	&pci_ss_info_1002_013a,
 	&pci_ss_info_1002_0152,
+	&pci_ss_info_1002_0162,
 	&pci_ss_info_1002_0172,
 	&pci_ss_info_1002_028a,
 	&pci_ss_info_1002_02aa,
@@ -29046,6 +31144,7 @@ static const pciSubsystemInfo *pci_ss_list_1002[] = {
 	&pci_ss_info_1002_4c50,
 	&pci_ss_info_1002_5654,
 	&pci_ss_info_1002_8001,
+	&pci_ss_info_1002_8008,
 	NULL
 };
 #define pci_ss_list_1003 NULL
@@ -29112,17 +31211,21 @@ static const pciSubsystemInfo *pci_ss_list_1014[] = {
 	&pci_ss_info_1014_0131,
 	&pci_ss_info_1014_0143,
 	&pci_ss_info_1014_0145,
+	&pci_ss_info_1014_0154,
 	&pci_ss_info_1014_0166,
 	&pci_ss_info_1014_016d,
+	&pci_ss_info_1014_017f,
 	&pci_ss_info_1014_0181,
 	&pci_ss_info_1014_0182,
 	&pci_ss_info_1014_0183,
 	&pci_ss_info_1014_0184,
+	&pci_ss_info_1014_0185,
 	&pci_ss_info_1014_01b6,
 	&pci_ss_info_1014_01b7,
 	&pci_ss_info_1014_01bc,
 	&pci_ss_info_1014_01be,
 	&pci_ss_info_1014_01bf,
+	&pci_ss_info_1014_01c6,
 	&pci_ss_info_1014_01ce,
 	&pci_ss_info_1014_01cf,
 	&pci_ss_info_1014_01dc,
@@ -29148,6 +31251,7 @@ static const pciSubsystemInfo *pci_ss_list_1014[] = {
 	&pci_ss_info_1014_0234,
 	&pci_ss_info_1014_0235,
 	&pci_ss_info_1014_0239,
+	&pci_ss_info_1014_023a,
 	&pci_ss_info_1014_023b,
 	&pci_ss_info_1014_023d,
 	&pci_ss_info_1014_0244,
@@ -29157,13 +31261,23 @@ static const pciSubsystemInfo *pci_ss_list_1014[] = {
 	&pci_ss_info_1014_0277,
 	&pci_ss_info_1014_0279,
 	&pci_ss_info_1014_028c,
+	&pci_ss_info_1014_0502,
 	&pci_ss_info_1014_0503,
+	&pci_ss_info_1014_0506,
+	&pci_ss_info_1014_0508,
+	&pci_ss_info_1014_0511,
+	&pci_ss_info_1014_0512,
+	&pci_ss_info_1014_0513,
+	&pci_ss_info_1014_0517,
+	&pci_ss_info_1014_051a,
+	&pci_ss_info_1014_051c,
 	&pci_ss_info_1014_1010,
 	&pci_ss_info_1014_105c,
 	&pci_ss_info_1014_10f2,
 	&pci_ss_info_1014_1181,
 	&pci_ss_info_1014_1182,
 	&pci_ss_info_1014_2000,
+	&pci_ss_info_1014_2205,
 	&pci_ss_info_1014_305c,
 	&pci_ss_info_1014_405c,
 	&pci_ss_info_1014_505c,
@@ -29183,6 +31297,7 @@ static const pciSubsystemInfo *pci_ss_list_1014[] = {
 #define pci_ss_list_1018 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_1019[] = {
+	&pci_ss_info_1019_0970,
 	&pci_ss_info_1019_7018,
 	NULL
 };
@@ -29263,6 +31378,8 @@ static const pciSubsystemInfo *pci_ss_list_1028[] = {
 	&pci_ss_info_1028_0097,
 	&pci_ss_info_1028_0098,
 	&pci_ss_info_1028_0099,
+	&pci_ss_info_1028_009b,
+	&pci_ss_info_1028_00c5,
 	&pci_ss_info_1028_00d0,
 	&pci_ss_info_1028_00d1,
 	&pci_ss_info_1028_00d9,
@@ -29292,6 +31409,7 @@ static const pciSubsystemInfo *pci_ss_list_1028[] = {
 #define pci_ss_list_1029 NULL
 #define pci_ss_list_102a NULL
 static const pciSubsystemInfo *pci_ss_list_102b[] = {
+	&pci_ss_info_102b_0100,
 	&pci_ss_info_102b_0328,
 	&pci_ss_info_102b_0338,
 	&pci_ss_info_102b_0378,
@@ -29443,7 +31561,6 @@ static const pciSubsystemInfo *pci_ss_list_1039[] = {
 };
 #define pci_ss_list_103a NULL
 #define pci_ss_list_103b NULL
-#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_103c[] = {
 	&pci_ss_info_103c_0007,
 	&pci_ss_info_103c_0008,
@@ -29481,7 +31598,6 @@ static const pciSubsystemInfo *pci_ss_list_103c[] = {
 	&pci_ss_info_103c_1282,
 	NULL
 };
-#endif
 #define pci_ss_list_103e NULL
 #define pci_ss_list_103f NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -29504,6 +31620,7 @@ static const pciSubsystemInfo *pci_ss_list_1043[] = {
 	&pci_ss_info_1043_0201,
 	&pci_ss_info_1043_0202,
 	&pci_ss_info_1043_0205,
+	&pci_ss_info_1043_0c11,
 	&pci_ss_info_1043_4000,
 	&pci_ss_info_1043_4008,
 	&pci_ss_info_1043_4009,
@@ -29519,13 +31636,16 @@ static const pciSubsystemInfo *pci_ss_list_1043[] = {
 	&pci_ss_info_1043_801c,
 	&pci_ss_info_1043_8027,
 	&pci_ss_info_1043_8033,
+	&pci_ss_info_1043_803e,
 	&pci_ss_info_1043_8040,
 	&pci_ss_info_1043_8042,
 	&pci_ss_info_1043_8044,
+	&pci_ss_info_1043_8052,
 	&pci_ss_info_1043_8053,
 	&pci_ss_info_1043_8064,
 	&pci_ss_info_1043_8077,
 	&pci_ss_info_1043_807f,
+	&pci_ss_info_1043_80ad,
 	&pci_ss_info_1043_80e2,
 	NULL
 };
@@ -29581,6 +31701,7 @@ static const pciSubsystemInfo *pci_ss_list_1048[] = {
 	&pci_ss_info_1048_0c10,
 	&pci_ss_info_1048_0c18,
 	&pci_ss_info_1048_0c1b,
+	&pci_ss_info_1048_0c3a,
 	&pci_ss_info_1048_0c56,
 	&pci_ss_info_1048_1500,
 	NULL
@@ -29759,8 +31880,10 @@ static const pciSubsystemInfo *pci_ss_list_107d[] = {
 	&pci_ss_info_107d_2633,
 	&pci_ss_info_107d_2720,
 	&pci_ss_info_107d_2840,
+	&pci_ss_info_107d_2896,
 	&pci_ss_info_107d_5330,
 	&pci_ss_info_107d_5350,
+	&pci_ss_info_107d_6606,
 	NULL
 };
 #endif
@@ -29963,8 +32086,10 @@ static const pciSubsystemInfo *pci_ss_list_10b4[] = {
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_10b5[] = {
+	&pci_ss_info_10b5_2036,
 	&pci_ss_info_10b5_2273,
 	&pci_ss_info_10b5_2455,
+	&pci_ss_info_10b5_9050,
 	&pci_ss_info_10b5_9080,
 	NULL
 };
@@ -29994,13 +32119,16 @@ static const pciSubsystemInfo *pci_ss_list_10b7[] = {
 	&pci_ss_info_10b7_1006,
 	&pci_ss_info_10b7_1007,
 	&pci_ss_info_10b7_1008,
+	&pci_ss_info_10b7_1100,
 	&pci_ss_info_10b7_1101,
 	&pci_ss_info_10b7_1102,
 	&pci_ss_info_10b7_1201,
 	&pci_ss_info_10b7_1202,
 	&pci_ss_info_10b7_2000,
+	&pci_ss_info_10b7_2001,
 	&pci_ss_info_10b7_2101,
 	&pci_ss_info_10b7_2102,
+	&pci_ss_info_10b7_3000,
 	&pci_ss_info_10b7_3590,
 	&pci_ss_info_10b7_5a57,
 	&pci_ss_info_10b7_5b57,
@@ -30139,6 +32267,7 @@ static const pciSubsystemInfo *pci_ss_list_10cf[] = {
 static const pciSubsystemInfo *pci_ss_list_10de[] = {
 	&pci_ss_info_10de_0005,
 	&pci_ss_info_10de_000f,
+	&pci_ss_info_10de_001e,
 	&pci_ss_info_10de_0020,
 	NULL
 };
@@ -30178,7 +32307,13 @@ static const pciSubsystemInfo *pci_ss_list_10ef[] = {
 };
 #endif
 #define pci_ss_list_10f0 NULL
-#define pci_ss_list_10f1 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo *pci_ss_list_10f1[] = {
+	&pci_ss_info_10f1_0002,
+	&pci_ss_info_10f1_2462,
+	NULL
+};
+#endif
 #define pci_ss_list_10f2 NULL
 #define pci_ss_list_10f3 NULL
 #define pci_ss_list_10f4 NULL
@@ -30211,11 +32346,13 @@ static const pciSubsystemInfo *pci_ss_list_1100[] = {
 #define pci_ss_list_1101 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_1102[] = {
+	&pci_ss_info_1102_0010,
 	&pci_ss_info_1102_0020,
 	&pci_ss_info_1102_0021,
 	&pci_ss_info_1102_002f,
 	&pci_ss_info_1102_0040,
 	&pci_ss_info_1102_0051,
+	&pci_ss_info_1102_0053,
 	&pci_ss_info_1102_100f,
 	&pci_ss_info_1102_1015,
 	&pci_ss_info_1102_1016,
@@ -30264,7 +32401,6 @@ static const pciSubsystemInfo *pci_ss_list_1106[] = {
 	&pci_ss_info_1106_0102,
 	&pci_ss_info_1106_0571,
 	&pci_ss_info_1106_0686,
-	&pci_ss_info_1106_3065,
 	&pci_ss_info_1106_4511,
 	NULL
 };
@@ -30342,6 +32478,7 @@ static const pciSubsystemInfo *pci_ss_list_111a[] = {
 	&pci_ss_info_111a_0909,
 	&pci_ss_info_111a_0a09,
 	&pci_ss_info_111a_1001,
+	&pci_ss_info_111a_1020,
 	NULL
 };
 #endif
@@ -30413,6 +32550,12 @@ static const pciSubsystemInfo *pci_ss_list_113c[] = {
 #define pci_ss_list_1147 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_1148[] = {
+	&pci_ss_info_1148_5021,
+	&pci_ss_info_1148_5041,
+	&pci_ss_info_1148_5043,
+	&pci_ss_info_1148_5051,
+	&pci_ss_info_1148_5061,
+	&pci_ss_info_1148_5071,
 	&pci_ss_info_1148_5521,
 	&pci_ss_info_1148_5522,
 	&pci_ss_info_1148_5541,
@@ -30423,6 +32566,7 @@ static const pciSubsystemInfo *pci_ss_list_1148[] = {
 	&pci_ss_info_1148_5841,
 	&pci_ss_info_1148_5843,
 	&pci_ss_info_1148_5844,
+	&pci_ss_info_1148_9521,
 	&pci_ss_info_1148_9821,
 	&pci_ss_info_1148_9822,
 	&pci_ss_info_1148_9841,
@@ -30431,6 +32575,8 @@ static const pciSubsystemInfo *pci_ss_list_1148[] = {
 	&pci_ss_info_1148_9844,
 	&pci_ss_info_1148_9861,
 	&pci_ss_info_1148_9862,
+	&pci_ss_info_1148_9871,
+	&pci_ss_info_1148_9872,
 	NULL
 };
 #endif
@@ -30489,7 +32635,12 @@ static const pciSubsystemInfo *pci_ss_list_115d[] = {
 #define pci_ss_list_1163 NULL
 #define pci_ss_list_1164 NULL
 #define pci_ss_list_1165 NULL
-#define pci_ss_list_1166 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo *pci_ss_list_1166[] = {
+	&pci_ss_info_1166_1648,
+	NULL
+};
+#endif
 #define pci_ss_list_1167 NULL
 #define pci_ss_list_1168 NULL
 #define pci_ss_list_1169 NULL
@@ -30634,6 +32785,7 @@ static const pciSubsystemInfo *pci_ss_list_11bd[] = {
 	&pci_ss_info_11bd_0006,
 	&pci_ss_info_11bd_000a,
 	&pci_ss_info_11bd_000e,
+	&pci_ss_info_11bd_0012,
 	&pci_ss_info_11bd_001c,
 	NULL
 };
@@ -30718,6 +32870,7 @@ static const pciSubsystemInfo *pci_ss_list_11d4[] = {
 static const pciSubsystemInfo *pci_ss_list_11f6[] = {
 	&pci_ss_info_11f6_0503,
 	&pci_ss_info_11f6_2011,
+	&pci_ss_info_11f6_8139,
 	NULL
 };
 #endif
@@ -30732,7 +32885,15 @@ static const pciSubsystemInfo *pci_ss_list_11f6[] = {
 #define pci_ss_list_11ff NULL
 #define pci_ss_list_1200 NULL
 #define pci_ss_list_1201 NULL
-#define pci_ss_list_1202 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo *pci_ss_list_1202[] = {
+	&pci_ss_info_1202_9841,
+	&pci_ss_info_1202_9842,
+	&pci_ss_info_1202_9843,
+	&pci_ss_info_1202_9844,
+	NULL
+};
+#endif
 #define pci_ss_list_1203 NULL
 #define pci_ss_list_1204 NULL
 #define pci_ss_list_1205 NULL
@@ -30852,12 +33013,7 @@ static const pciSubsystemInfo *pci_ss_list_122d[] = {
 #define pci_ss_list_1231 NULL
 #define pci_ss_list_1232 NULL
 #define pci_ss_list_1233 NULL
-#ifdef VENDOR_INCLUDE_NONVIDEO
-static const pciSubsystemInfo *pci_ss_list_1234[] = {
-	&pci_ss_info_1234_0925,
-	NULL
-};
-#endif
+#define pci_ss_list_1234 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_1235[] = {
 	&pci_ss_info_1235_4320,
@@ -30879,7 +33035,13 @@ static const pciSubsystemInfo *pci_ss_list_1235[] = {
 #define pci_ss_list_123f NULL
 #define pci_ss_list_1240 NULL
 #define pci_ss_list_1241 NULL
-#define pci_ss_list_1242 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo *pci_ss_list_1242[] = {
+	&pci_ss_info_1242_6562,
+	&pci_ss_info_1242_656a,
+	NULL
+};
+#endif
 #define pci_ss_list_1243 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_1244[] = {
@@ -30923,6 +33085,10 @@ static const pciSubsystemInfo *pci_ss_list_1259[] = {
 	&pci_ss_info_1259_2700,
 	&pci_ss_info_1259_2701,
 	&pci_ss_info_1259_2800,
+	&pci_ss_info_1259_2970,
+	&pci_ss_info_1259_2972,
+	&pci_ss_info_1259_2975,
+	&pci_ss_info_1259_2977,
 	NULL
 };
 #endif
@@ -31343,7 +33509,12 @@ static const pciSubsystemInfo *pci_ss_list_134d[] = {
 #define pci_ss_list_136d NULL
 #define pci_ss_list_136f NULL
 #define pci_ss_list_1370 NULL
-#define pci_ss_list_1371 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo *pci_ss_list_1371[] = {
+	&pci_ss_info_1371_434e,
+	NULL
+};
+#endif
 #define pci_ss_list_1373 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_1374[] = {
@@ -31374,6 +33545,7 @@ static const pciSubsystemInfo *pci_ss_list_1374[] = {
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_1385[] = {
 	&pci_ss_info_1385_1100,
+	&pci_ss_info_1385_2100,
 	&pci_ss_info_1385_f004,
 	NULL
 };
@@ -31769,6 +33941,7 @@ static const pciSubsystemInfo *pci_ss_list_1437[] = {
 static const pciSubsystemInfo *pci_ss_list_144d[] = {
 	&pci_ss_info_144d_2101,
 	&pci_ss_info_144d_2104,
+	&pci_ss_info_144d_2115,
 	&pci_ss_info_144d_2321,
 	&pci_ss_info_144d_2501,
 	&pci_ss_info_144d_2502,
@@ -31777,6 +33950,7 @@ static const pciSubsystemInfo *pci_ss_list_144d[] = {
 	&pci_ss_info_144d_c000,
 	&pci_ss_info_144d_c001,
 	&pci_ss_info_144d_c003,
+	&pci_ss_info_144d_c006,
 	NULL
 };
 #endif
@@ -31797,6 +33971,7 @@ static const pciSubsystemInfo *pci_ss_list_144f[] = {
 	&pci_ss_info_144f_150b,
 	&pci_ss_info_144f_1510,
 	&pci_ss_info_144f_3000,
+	&pci_ss_info_144f_4005,
 	NULL
 };
 #endif
@@ -31812,8 +33987,15 @@ static const pciSubsystemInfo *pci_ss_list_1458[] = {
 	&pci_ss_info_1458_0400,
 	&pci_ss_info_1458_0596,
 	&pci_ss_info_1458_0691,
+	&pci_ss_info_1458_4000,
+	&pci_ss_info_1458_4002,
+	&pci_ss_info_1458_5000,
+	&pci_ss_info_1458_5001,
+	&pci_ss_info_1458_5002,
+	&pci_ss_info_1458_5004,
 	&pci_ss_info_1458_7600,
 	&pci_ss_info_1458_a000,
+	&pci_ss_info_1458_a002,
 	NULL
 };
 #endif
@@ -31835,7 +34017,9 @@ static const pciSubsystemInfo *pci_ss_list_1461[] = {
 static const pciSubsystemInfo *pci_ss_list_1462[] = {
 	&pci_ss_info_1462_3091,
 	&pci_ss_info_1462_3370,
+	&pci_ss_info_1462_3981,
 	&pci_ss_info_1462_400a,
+	&pci_ss_info_1462_5800,
 	&pci_ss_info_1462_6470,
 	&pci_ss_info_1462_6560,
 	&pci_ss_info_1462_6630,
@@ -31853,7 +34037,9 @@ static const pciSubsystemInfo *pci_ss_list_1462[] = {
 	&pci_ss_info_1462_6990,
 	&pci_ss_info_1462_6991,
 	&pci_ss_info_1462_8661,
+	&pci_ss_info_1462_8730,
 	&pci_ss_info_1462_8808,
+	&pci_ss_info_1462_8817,
 	&pci_ss_info_1462_8831,
 	NULL
 };
@@ -31904,7 +34090,10 @@ static const pciSubsystemInfo *pci_ss_list_147a[] = {
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_147b[] = {
 	&pci_ss_info_147b_0507,
+	&pci_ss_info_147b_8f00,
+	&pci_ss_info_147b_8f09,
 	&pci_ss_info_147b_a401,
+	&pci_ss_info_147b_a702,
 	NULL
 };
 #endif
@@ -31937,7 +34126,18 @@ static const pciSubsystemInfo *pci_ss_list_1489[] = {
 #endif
 #define pci_ss_list_148a NULL
 #define pci_ss_list_148b NULL
-#define pci_ss_list_148c NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo *pci_ss_list_148c[] = {
+	&pci_ss_info_148c_2003,
+	&pci_ss_info_148c_2023,
+	&pci_ss_info_148c_2024,
+	&pci_ss_info_148c_2025,
+	&pci_ss_info_148c_2026,
+	&pci_ss_info_148c_2036,
+	&pci_ss_info_148c_2039,
+	NULL
+};
+#endif
 #define pci_ss_list_148d NULL
 #define pci_ss_list_148e NULL
 #define pci_ss_list_148f NULL
@@ -32096,6 +34296,8 @@ static const pciSubsystemInfo *pci_ss_list_14e4[] = {
 	&pci_ss_info_14e4_0009,
 	&pci_ss_info_14e4_000a,
 	&pci_ss_info_14e4_000b,
+	&pci_ss_info_14e4_000c,
+	&pci_ss_info_14e4_000d,
 	&pci_ss_info_14e4_1028,
 	&pci_ss_info_14e4_1644,
 	&pci_ss_info_14e4_8008,
@@ -32136,6 +34338,7 @@ static const pciSubsystemInfo *pci_ss_list_14f1[] = {
 	&pci_ss_info_14f1_1622,
 	&pci_ss_info_14f1_1722,
 	&pci_ss_info_14f1_2004,
+	&pci_ss_info_14f1_5421,
 	NULL
 };
 #endif
@@ -32175,10 +34378,12 @@ static const pciSubsystemInfo *pci_ss_list_14ff[] = {
 #define pci_ss_list_1508 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_1509[] = {
+	&pci_ss_info_1509_7002,
 	&pci_ss_info_1509_9902,
 	&pci_ss_info_1509_9903,
 	&pci_ss_info_1509_9904,
 	&pci_ss_info_1509_9905,
+	&pci_ss_info_1509_9a00,
 	NULL
 };
 #endif
@@ -32219,6 +34424,8 @@ static const pciSubsystemInfo *pci_ss_list_1522[] = {
 	&pci_ss_info_1522_0400,
 	&pci_ss_info_1522_0500,
 	&pci_ss_info_1522_0600,
+	&pci_ss_info_1522_0700,
+	&pci_ss_info_1522_0800,
 	NULL
 };
 #endif
@@ -32447,7 +34654,13 @@ static const pciSubsystemInfo *pci_ss_list_15c5[] = {
 #define pci_ss_list_15d6 NULL
 #define pci_ss_list_15d7 NULL
 #define pci_ss_list_15d8 NULL
-#define pci_ss_list_15d9 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo *pci_ss_list_15d9[] = {
+	&pci_ss_info_15d9_3480,
+	&pci_ss_info_15d9_9005,
+	NULL
+};
+#endif
 #define pci_ss_list_15da NULL
 #define pci_ss_list_15db NULL
 #define pci_ss_list_15dc NULL
@@ -32515,7 +34728,9 @@ static const pciSubsystemInfo *pci_ss_list_15ed[] = {
 #define pci_ss_list_1619 NULL
 #define pci_ss_list_1629 NULL
 #define pci_ss_list_1638 NULL
+#define pci_ss_list_163c NULL
 #define pci_ss_list_1657 NULL
+#define pci_ss_list_165a NULL
 #define pci_ss_list_165d NULL
 #define pci_ss_list_1661 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -32523,36 +34738,112 @@ static const pciSubsystemInfo *pci_ss_list_1668[] = {
 	&pci_ss_info_1668_0299,
 	&pci_ss_info_1668_0300,
 	&pci_ss_info_1668_0302,
+	&pci_ss_info_1668_0414,
 	&pci_ss_info_1668_0440,
 	&pci_ss_info_1668_1100,
 	&pci_ss_info_1668_2400,
 	NULL
 };
 #endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo *pci_ss_list_1681[] = {
+	&pci_ss_info_1681_0040,
+	&pci_ss_info_1681_0050,
+	&pci_ss_info_1681_a011,
+	NULL
+};
+#endif
 #define pci_ss_list_16ab NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo *pci_ss_list_16be[] = {
+	&pci_ss_info_16be_0001,
+	&pci_ss_info_16be_0002,
+	&pci_ss_info_16be_1040,
+	NULL
+};
+#endif
 #define pci_ss_list_16ec NULL
 #define pci_ss_list_16f6 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo *pci_ss_list_1705[] = {
+	&pci_ss_info_1705_0001,
+	&pci_ss_info_1705_0002,
+	&pci_ss_info_1705_0003,
+	&pci_ss_info_1705_0004,
+	NULL
+};
+#endif
 #define pci_ss_list_170b NULL
 #define pci_ss_list_170c NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo *pci_ss_list_172a[] = {
+	&pci_ss_info_172a_0000,
+	NULL
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_1737[] = {
 	&pci_ss_info_1737_3874,
 	NULL
 };
 #endif
-#define pci_ss_list_173b NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo *pci_ss_list_173b[] = {
+	&pci_ss_info_173b_0001,
+	NULL
+};
+#endif
 #define pci_ss_list_1743 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_174b[] = {
 	&pci_ss_info_174b_7112,
+	&pci_ss_info_174b_7147,
 	&pci_ss_info_174b_7149,
 	&pci_ss_info_174b_7161,
+	&pci_ss_info_174b_7176,
+	&pci_ss_info_174b_7192,
 	NULL
 };
 #endif
 #define pci_ss_list_175e NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo *pci_ss_list_1787[] = {
+	&pci_ss_info_1787_0202,
+	NULL
+};
+#endif
 #define pci_ss_list_1796 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo *pci_ss_list_1799[] = {
+	&pci_ss_info_1799_0001,
+	&pci_ss_info_1799_0002,
+	NULL
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo *pci_ss_list_17af[] = {
+	&pci_ss_info_17af_0202,
+	&pci_ss_info_17af_2005,
+	&pci_ss_info_17af_2006,
+	NULL
+};
+#endif
+#define pci_ss_list_17cc NULL
 #define pci_ss_list_1813 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo *pci_ss_list_1851[] = {
+	&pci_ss_info_1851_1850,
+	&pci_ss_info_1851_1851,
+	NULL
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo *pci_ss_list_1852[] = {
+	&pci_ss_info_1852_1852,
+	NULL
+};
+#endif
+#define pci_ss_list_1888 NULL
 #define pci_ss_list_1a08 NULL
 #define pci_ss_list_1b13 NULL
 #define pci_ss_list_1c1c NULL
@@ -32565,7 +34856,10 @@ static const pciSubsystemInfo *pci_ss_list_1de1[] = {
 	NULL
 };
 #endif
+#define pci_ss_list_2000 NULL
 #define pci_ss_list_2001 NULL
+#define pci_ss_list_2003 NULL
+#define pci_ss_list_2004 NULL
 #define pci_ss_list_21c3 NULL
 #define pci_ss_list_2348 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -32618,6 +34912,7 @@ static const pciSubsystemInfo *pci_ss_list_3d3d[] = {
 	&pci_ss_info_3d3d_0121,
 	&pci_ss_info_3d3d_0125,
 	&pci_ss_info_3d3d_0127,
+	&pci_ss_info_3d3d_0144,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_4005[] = {
@@ -32660,6 +34955,7 @@ static const pciSubsystemInfo *pci_ss_list_5053[] = {
 #define pci_ss_list_5136 NULL
 #define pci_ss_list_5143 NULL
 #define pci_ss_list_5145 NULL
+#define pci_ss_list_5168 NULL
 #define pci_ss_list_5301 NULL
 static const pciSubsystemInfo *pci_ss_list_5333[] = {
 	&pci_ss_info_5333_8100,
@@ -32684,6 +34980,12 @@ static const pciSubsystemInfo *pci_ss_list_5333[] = {
 #define pci_ss_list_5519 NULL
 #define pci_ss_list_5544 NULL
 #define pci_ss_list_5555 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo *pci_ss_list_5654[] = {
+	&pci_ss_info_5654_5634,
+	NULL
+};
+#endif
 #define pci_ss_list_5700 NULL
 #define pci_ss_list_6356 NULL
 #define pci_ss_list_6374 NULL
@@ -32750,6 +35052,7 @@ static const pciSubsystemInfo *pci_ss_list_8086[] = {
 	&pci_ss_info_8086_1112,
 	&pci_ss_info_8086_1161,
 	&pci_ss_info_8086_1361,
+	&pci_ss_info_8086_1958,
 	&pci_ss_info_8086_2004,
 	&pci_ss_info_8086_2009,
 	&pci_ss_info_8086_200d,
@@ -32790,6 +35093,7 @@ static const pciSubsystemInfo *pci_ss_list_8086[] = {
 	&pci_ss_info_8086_2411,
 	&pci_ss_info_8086_2412,
 	&pci_ss_info_8086_2413,
+	&pci_ss_info_8086_2513,
 	&pci_ss_info_8086_3000,
 	&pci_ss_info_8086_3001,
 	&pci_ss_info_8086_3002,
@@ -32920,6 +35224,12 @@ static const pciSubsystemInfo *pci_ss_list_a0a0[] = {
 #define pci_ss_list_aa42 NULL
 #define pci_ss_list_ac1e NULL
 #define pci_ss_list_b1b3 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo *pci_ss_list_bd11[] = {
+	&pci_ss_info_bd11_1200,
+	NULL
+};
+#endif
 #define pci_ss_list_c001 NULL
 #define pci_ss_list_c0a9 NULL
 #define pci_ss_list_c0de NULL
@@ -32974,6 +35284,7 @@ static const pciSubsystemInfo *pci_ss_list_e4bf[] = {
 };
 #endif
 #define pci_ss_list_ea01 NULL
+#define pci_ss_list_ea60 NULL
 #define pci_ss_list_eabb NULL
 #define pci_ss_list_eace NULL
 #define pci_ss_list_ec80 NULL
@@ -33936,6 +36247,42 @@ static const pciDeviceInfo pci_dev_info_1001_9100 = {
 	0
 };
 #endif
+static const pciDeviceInfo pci_dev_info_1002_4144 = {
+	0x4144, pci_device_1002_4144,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_4144,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1002_4145 = {
+	0x4145, pci_device_1002_4145,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_4145,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1002_4146 = {
+	0x4146, pci_device_1002_4146,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_4146,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1002_4147 = {
+	0x4147, pci_device_1002_4147,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_4147,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1002_4158 = {
 	0x4158, pci_device_1002_4158,
 #ifdef INIT_SUBSYS_INFO
@@ -33963,6 +36310,15 @@ static const pciDeviceInfo pci_dev_info_1002_4336 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1002_4337 = {
+	0x4337, pci_device_1002_4337,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_4337,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1002_4354 = {
 	0x4354, pci_device_1002_4354,
 #ifdef INIT_SUBSYS_INFO
@@ -34206,6 +36562,15 @@ static const pciDeviceInfo pci_dev_info_1002_4967 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1002_496e = {
+	0x496e, pci_device_1002_496e,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_496e,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1002_4c42 = {
 	0x4c42, pci_device_1002_4c42,
 #ifdef INIT_SUBSYS_INFO
@@ -34449,6 +36814,42 @@ static const pciDeviceInfo pci_dev_info_1002_4e47 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1002_4e64 = {
+	0x4e64, pci_device_1002_4e64,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_4e64,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1002_4e65 = {
+	0x4e65, pci_device_1002_4e65,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_4e65,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1002_4e66 = {
+	0x4e66, pci_device_1002_4e66,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_4e66,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1002_4e67 = {
+	0x4e67, pci_device_1002_4e67,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_4e67,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1002_5041 = {
 	0x5041, pci_device_1002_5041,
 #ifdef INIT_SUBSYS_INFO
@@ -34746,6 +37147,33 @@ static const pciDeviceInfo pci_dev_info_1002_514c = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1002_514d = {
+	0x514d, pci_device_1002_514d,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_514d,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1002_514e = {
+	0x514e, pci_device_1002_514e,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_514e,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1002_514f = {
+	0x514f, pci_device_1002_514f,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_514f,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1002_5157 = {
 	0x5157, pci_device_1002_5157,
 #ifdef INIT_SUBSYS_INFO
@@ -34818,6 +37246,15 @@ static const pciDeviceInfo pci_dev_info_1002_516b = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1002_516c = {
+	0x516c, pci_device_1002_516c,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_516c,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1002_5245 = {
 	0x5245, pci_device_1002_5245,
 #ifdef INIT_SUBSYS_INFO
@@ -35199,6 +37636,24 @@ static const pciDeviceInfo pci_dev_info_1004_0306 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1004_0307 = {
+	0x0307, pci_device_1004_0307,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1004_0307,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1004_0308 = {
+	0x0308, pci_device_1004_0308,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1004_0308,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1004_0702 = {
 	0x0702, pci_device_1004_0702,
 #ifdef INIT_SUBSYS_INFO
@@ -35208,6 +37663,15 @@ static const pciDeviceInfo pci_dev_info_1004_0702 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1004_0703 = {
+	0x0703, pci_device_1004_0703,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1004_0703,
+#else
+	NULL,
+#endif
+	0
+};
 #endif
 static const pciDeviceInfo pci_dev_info_1005_2064 = {
 	0x2064, pci_device_1005_2064,
@@ -36290,6 +38754,15 @@ static const pciDeviceInfo pci_dev_info_1014_00be = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1014_00dc = {
+	0x00dc, pci_device_1014_00dc,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1014_00dc,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1014_00fc = {
 	0x00fc, pci_device_1014_00fc,
 #ifdef INIT_SUBSYS_INFO
@@ -36308,6 +38781,15 @@ static const pciDeviceInfo pci_dev_info_1014_0105 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1014_010f = {
+	0x010f, pci_device_1014_010f,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1014_010f,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1014_0142 = {
 	0x0142, pci_device_1014_0142,
 #ifdef INIT_SUBSYS_INFO
@@ -36353,6 +38835,15 @@ static const pciDeviceInfo pci_dev_info_1014_01bd = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1014_0302 = {
+	0x0302, pci_device_1014_0302,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1014_0302,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1014_ffff = {
 	0xffff, pci_device_1014_ffff,
 #ifdef INIT_SUBSYS_INFO
@@ -37064,6 +39555,15 @@ static const pciDeviceInfo pci_dev_info_1023_8520 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1023_8620 = {
+	0x8620, pci_device_1023_8620,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1023_8620,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1023_8820 = {
 	0x8820, pci_device_1023_8820,
 #ifdef INIT_SUBSYS_INFO
@@ -38366,6 +40866,15 @@ static const pciDeviceInfo pci_dev_info_1033_0009 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1033_0016 = {
+	0x0016, pci_device_1033_0016,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1033_0016,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1033_001a = {
 	0x001a, pci_device_1033_001a,
 #ifdef INIT_SUBSYS_INFO
@@ -38402,6 +40911,24 @@ static const pciDeviceInfo pci_dev_info_1033_002a = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1033_002c = {
+	0x002c, pci_device_1033_002c,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1033_002c,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1033_002d = {
+	0x002d, pci_device_1033_002d,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1033_002d,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1033_0035 = {
 	0x0035, pci_device_1033_0035,
 #ifdef INIT_SUBSYS_INFO
@@ -38411,6 +40938,15 @@ static const pciDeviceInfo pci_dev_info_1033_0035 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1033_003b = {
+	0x003b, pci_device_1033_003b,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1033_003b,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1033_003e = {
 	0x003e, pci_device_1033_003e,
 #ifdef INIT_SUBSYS_INFO
@@ -38602,6 +41138,42 @@ static const pciDeviceInfo pci_dev_info_1039_0300 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1039_0310 = {
+	0x0310, pci_device_1039_0310,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1039_0310,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1039_0315 = {
+	0x0315, pci_device_1039_0315,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1039_0315,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1039_0325 = {
+	0x0325, pci_device_1039_0325,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1039_0325,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1039_0330 = {
+	0x0330, pci_device_1039_0330,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1039_0330,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1039_0406 = {
 	0x0406, pci_device_1039_0406,
 #ifdef INIT_SUBSYS_INFO
@@ -38827,6 +41399,15 @@ static const pciDeviceInfo pci_dev_info_1039_5300 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1039_5315 = {
+	0x5315, pci_device_1039_5315,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1039_5315,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1039_5401 = {
 	0x5401, pci_device_1039_5401,
 #ifdef INIT_SUBSYS_INFO
@@ -38971,6 +41552,15 @@ static const pciDeviceInfo pci_dev_info_1039_6306 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1039_6325 = {
+	0x6325, pci_device_1039_6325,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1039_6325,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1039_6326 = {
 	0x6326, pci_device_1039_6326,
 #ifdef INIT_SUBSYS_INFO
@@ -38989,6 +41579,15 @@ static const pciDeviceInfo pci_dev_info_1039_7001 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1039_7002 = {
+	0x7002, pci_device_1039_7002,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1039_7002,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1039_7007 = {
 	0x7007, pci_device_1039_7007,
 #ifdef INIT_SUBSYS_INFO
@@ -39034,7 +41633,6 @@ static const pciDeviceInfo pci_dev_info_1039_7018 = {
 #endif
 	0
 };
-#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_103c_1005 = {
 	0x1005, pci_device_103c_1005,
 #ifdef INIT_SUBSYS_INFO
@@ -39287,7 +41885,6 @@ static const pciDeviceInfo pci_dev_info_103c_2925 = {
 #endif
 	0
 };
-#endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_1042_1000 = {
 	0x1000, pci_device_1042_1000,
@@ -39345,6 +41942,15 @@ static const pciDeviceInfo pci_dev_info_1043_0675 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1043_4021 = {
+	0x4021, pci_device_1043_4021,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1043_4021,
+#else
+	NULL,
+#endif
+	0
+};
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_1044_1012 = {
@@ -39640,6 +42246,24 @@ static const pciDeviceInfo pci_dev_info_104a_0009 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_104a_0010 = {
+	0x0010, pci_device_104a_0010,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_104a_0010,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_104a_0210 = {
+	0x0210, pci_device_104a_0210,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_104a_0210,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_104a_0981 = {
 	0x0981, pci_device_104a_0981,
 #ifdef INIT_SUBSYS_INFO
@@ -39732,6 +42356,15 @@ static const pciDeviceInfo pci_dev_info_104c_1000 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_104c_104c = {
+	0x104c, pci_device_104c_104c,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_104c_104c,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_104c_3d04 = {
 	0x3d04, pci_device_104c_3d04,
 #ifdef INIT_SUBSYS_INFO
@@ -40155,6 +42788,15 @@ static const pciDeviceInfo pci_dev_info_104c_ac55 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_104c_ac56 = {
+	0xac56, pci_device_104c_ac56,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_104c_ac56,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_104c_ac60 = {
 	0xac60, pci_device_104c_ac60,
 #ifdef INIT_SUBSYS_INFO
@@ -40327,6 +42969,15 @@ static const pciDeviceInfo pci_dev_info_1050_5a5a = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1050_6692 = {
+	0x6692, pci_device_1050_6692,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1050_6692,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1050_9970 = {
 	0x9970, pci_device_1050_9970,
 #ifdef INIT_SUBSYS_INFO
@@ -40547,6 +43198,15 @@ static const pciDeviceInfo pci_dev_info_105a_1275 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_105a_3376 = {
+	0x3376, pci_device_105a_3376,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_105a_3376,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_105a_4d30 = {
 	0x4d30, pci_device_105a_4d30,
 #ifdef INIT_SUBSYS_INFO
@@ -40628,6 +43288,15 @@ static const pciDeviceInfo pci_dev_info_105a_6269 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_105a_6621 = {
+	0x6621, pci_device_105a_6621,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_105a_6621,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_105a_7275 = {
 	0x7275, pci_device_105a_7275,
 #ifdef INIT_SUBSYS_INFO
@@ -42731,6 +45400,15 @@ static const pciDeviceInfo pci_dev_info_1095_0680 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1095_3112 = {
+	0x3112, pci_device_1095_3112,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1095_3112,
+#else
+	NULL,
+#endif
+	0
+};
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_1098_0001 = {
@@ -42906,6 +45584,17 @@ static const pciDeviceInfo pci_dev_info_109e_8474 = {
 	0
 };
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_10a5_5449 = {
+	0x5449, pci_device_10a5_5449,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10a5_5449,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_10a8_0000 = {
 	0x0000, pci_device_10a8_0000,
 #ifdef INIT_SUBSYS_INFO
@@ -43867,6 +46556,24 @@ static const pciDeviceInfo pci_dev_info_10b7_9200 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_10b7_9201 = {
+	0x9201, pci_device_10b7_9201,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10b7_9201,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10b7_9300 = {
+	0x9300, pci_device_10b7_9300,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10b7_9300,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_10b7_9800 = {
 	0x9800, pci_device_10b7_9800,
 #ifdef INIT_SUBSYS_INFO
@@ -44158,6 +46865,15 @@ static const pciDeviceInfo pci_dev_info_10b9_1543 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_10b9_1563 = {
+	0x1563, pci_device_10b9_1563,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10b9_1563,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_10b9_1621 = {
 	0x1621, pci_device_10b9_1621,
 #ifdef INIT_SUBSYS_INFO
@@ -44239,6 +46955,24 @@ static const pciDeviceInfo pci_dev_info_10b9_1671 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_10b9_1681 = {
+	0x1681, pci_device_10b9_1681,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10b9_1681,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10b9_1687 = {
+	0x1687, pci_device_10b9_1687,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10b9_1687,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_10b9_3141 = {
 	0x3141, pci_device_10b9_3141,
 #ifdef INIT_SUBSYS_INFO
@@ -44410,6 +47144,15 @@ static const pciDeviceInfo pci_dev_info_10b9_5247 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_10b9_5249 = {
+	0x5249, pci_device_10b9_5249,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10b9_5249,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_10b9_5251 = {
 	0x5251, pci_device_10b9_5251,
 #ifdef INIT_SUBSYS_INFO
@@ -44482,6 +47225,15 @@ static const pciDeviceInfo pci_dev_info_10b9_5459 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_10b9_545a = {
+	0x545a, pci_device_10b9_545a,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10b9_545a,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_10b9_5471 = {
 	0x5471, pci_device_10b9_5471,
 #ifdef INIT_SUBSYS_INFO
@@ -44921,6 +47673,87 @@ static const pciDeviceInfo pci_dev_info_10de_002f = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_10de_0060 = {
+	0x0060, pci_device_10de_0060,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_0060,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_0064 = {
+	0x0064, pci_device_10de_0064,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_0064,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_0065 = {
+	0x0065, pci_device_10de_0065,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_0065,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_0066 = {
+	0x0066, pci_device_10de_0066,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_0066,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_0067 = {
+	0x0067, pci_device_10de_0067,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_0067,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_0068 = {
+	0x0068, pci_device_10de_0068,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_0068,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_006a = {
+	0x006a, pci_device_10de_006a,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_006a,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_006b = {
+	0x006b, pci_device_10de_006b,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_006b,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_006e = {
+	0x006e, pci_device_10de_006e,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_006e,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_10de_00a0 = {
 	0x00a0, pci_device_10de_00a0,
 #ifdef INIT_SUBSYS_INFO
@@ -45137,6 +47970,60 @@ static const pciDeviceInfo pci_dev_info_10de_017c = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_10de_0181 = {
+	0x0181, pci_device_10de_0181,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_0181,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_0182 = {
+	0x0182, pci_device_10de_0182,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_0182,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_0183 = {
+	0x0183, pci_device_10de_0183,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_0183,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_0188 = {
+	0x0188, pci_device_10de_0188,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_0188,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_018a = {
+	0x018a, pci_device_10de_018a,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_018a,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_018b = {
+	0x018b, pci_device_10de_018b,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_018b,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_10de_01a0 = {
 	0x01a0, pci_device_10de_01a0,
 #ifdef INIT_SUBSYS_INFO
@@ -45245,6 +48132,42 @@ static const pciDeviceInfo pci_dev_info_10de_01c1 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_10de_01c2 = {
+	0x01c2, pci_device_10de_01c2,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_01c2,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_01c3 = {
+	0x01c3, pci_device_10de_01c3,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_01c3,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_01e8 = {
+	0x01e8, pci_device_10de_01e8,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_01e8,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_01f0 = {
+	0x01f0, pci_device_10de_01f0,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_01f0,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_10de_0200 = {
 	0x0200, pci_device_10de_0200,
 #ifdef INIT_SUBSYS_INFO
@@ -45299,6 +48222,15 @@ static const pciDeviceInfo pci_dev_info_10de_0251 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_10de_0252 = {
+	0x0252, pci_device_10de_0252,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_0252,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_10de_0253 = {
 	0x0253, pci_device_10de_0253,
 #ifdef INIT_SUBSYS_INFO
@@ -45335,6 +48267,96 @@ static const pciDeviceInfo pci_dev_info_10de_025b = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_10de_0280 = {
+	0x0280, pci_device_10de_0280,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_0280,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_0281 = {
+	0x0281, pci_device_10de_0281,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_0281,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_0282 = {
+	0x0282, pci_device_10de_0282,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_0282,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_0288 = {
+	0x0288, pci_device_10de_0288,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_0288,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_0289 = {
+	0x0289, pci_device_10de_0289,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_0289,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_0300 = {
+	0x0300, pci_device_10de_0300,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_0300,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_0301 = {
+	0x0301, pci_device_10de_0301,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_0301,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_0302 = {
+	0x0302, pci_device_10de_0302,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_0302,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_0308 = {
+	0x0308, pci_device_10de_0308,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_0308,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_0309 = {
+	0x0309, pci_device_10de_0309,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_0309,
+#else
+	NULL,
+#endif
+	0
+};
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_10df_1ae5 = {
 	0x1ae5, pci_device_10df_1ae5,
@@ -45511,6 +48533,15 @@ static const pciDeviceInfo pci_dev_info_10e3_0860 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_10e3_0862 = {
+	0x0862, pci_device_10e3_0862,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10e3_0862,
+#else
+	NULL,
+#endif
+	0
+};
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_10e8_2011 = {
@@ -45712,6 +48743,15 @@ static const pciDeviceInfo pci_dev_info_10ea_5050 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_10ea_5202 = {
+	0x5202, pci_device_10ea_5202,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10ea_5202,
+#else
+	NULL,
+#endif
+	0
+};
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_10eb_0101 = {
 	0x0101, pci_device_10eb_0101,
@@ -45889,6 +48929,17 @@ static const pciDeviceInfo pci_dev_info_10fa_000c = {
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_10fb_186f = {
+	0x186f, pci_device_10fb_186f,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10fb_186f,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_10fc_0003 = {
 	0x0003, pci_device_10fc_0003,
 #ifdef INIT_SUBSYS_INFO
@@ -45898,6 +48949,15 @@ static const pciDeviceInfo pci_dev_info_10fc_0003 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_10fc_0005 = {
+	0x0005, pci_device_10fc_0005,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10fc_0005,
+#else
+	NULL,
+#endif
+	0
+};
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_1101_1060 = {
@@ -45954,7 +49014,7 @@ static const pciDeviceInfo pci_dev_info_1102_0002 = {
 #else
 	NULL,
 #endif
-	0
+	0x0401
 };
 static const pciDeviceInfo pci_dev_info_1102_0004 = {
 	0x0004, pci_device_1102_0004,
@@ -45965,6 +49025,15 @@ static const pciDeviceInfo pci_dev_info_1102_0004 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1102_0006 = {
+	0x0006, pci_device_1102_0006,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1102_0006,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1102_4001 = {
 	0x4001, pci_device_1102_4001,
 #ifdef INIT_SUBSYS_INFO
@@ -45992,6 +49061,24 @@ static const pciDeviceInfo pci_dev_info_1102_7003 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1102_7004 = {
+	0x7004, pci_device_1102_7004,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1102_7004,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1102_8064 = {
+	0x8064, pci_device_1102_8064,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1102_8064,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1102_8938 = {
 	0x8938, pci_device_1102_8938,
 #ifdef INIT_SUBSYS_INFO
@@ -46492,6 +49579,15 @@ static const pciDeviceInfo pci_dev_info_1106_3104 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1106_3106 = {
+	0x3106, pci_device_1106_3106,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_3106,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1106_3109 = {
 	0x3109, pci_device_1106_3109,
 #ifdef INIT_SUBSYS_INFO
@@ -46519,6 +49615,24 @@ static const pciDeviceInfo pci_dev_info_1106_3116 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1106_3122 = {
+	0x3122, pci_device_1106_3122,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_3122,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1106_3123 = {
+	0x3123, pci_device_1106_3123,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_3123,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1106_3128 = {
 	0x3128, pci_device_1106_3128,
 #ifdef INIT_SUBSYS_INFO
@@ -46564,6 +49678,15 @@ static const pciDeviceInfo pci_dev_info_1106_3156 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1106_3168 = {
+	0x3168, pci_device_1106_3168,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_3168,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1106_3177 = {
 	0x3177, pci_device_1106_3177,
 #ifdef INIT_SUBSYS_INFO
@@ -47931,6 +51054,24 @@ static const pciDeviceInfo pci_dev_info_112f_0001 = {
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_1131_1561 = {
+	0x1561, pci_device_1131_1561,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1131_1561,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1131_1562 = {
+	0x1562, pci_device_1131_1562,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1131_1562,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1131_3400 = {
 	0x3400, pci_device_1131_3400,
 #ifdef INIT_SUBSYS_INFO
@@ -47949,6 +51090,15 @@ static const pciDeviceInfo pci_dev_info_1131_7130 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1131_7133 = {
+	0x7133, pci_device_1131_7133,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1131_7133,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1131_7134 = {
 	0x7134, pci_device_1131_7134,
 #ifdef INIT_SUBSYS_INFO
@@ -47958,6 +51108,15 @@ static const pciDeviceInfo pci_dev_info_1131_7134 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1131_7135 = {
+	0x7135, pci_device_1131_7135,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1131_7135,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1131_7145 = {
 	0x7145, pci_device_1131_7145,
 #ifdef INIT_SUBSYS_INFO
@@ -48122,6 +51281,15 @@ static const pciDeviceInfo pci_dev_info_1133_e005 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1133_e00b = {
+	0xe00b, pci_device_1133_e00b,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1133_e00b,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1133_e010 = {
 	0xe010, pci_device_1133_e010,
 #ifdef INIT_SUBSYS_INFO
@@ -48381,6 +51549,62 @@ static const pciDeviceInfo pci_dev_info_1144_0001 = {
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_1145_8007 = {
+	0x8007, pci_device_1145_8007,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1145_8007,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1145_f007 = {
+	0xf007, pci_device_1145_f007,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1145_f007,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1145_f010 = {
+	0xf010, pci_device_1145_f010,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1145_f010,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1145_f012 = {
+	0xf012, pci_device_1145_f012,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1145_f012,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1145_f013 = {
+	0xf013, pci_device_1145_f013,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1145_f013,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1145_f015 = {
+	0xf015, pci_device_1145_f015,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1145_f015,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_1148_4000 = {
 	0x4000, pci_device_1148_4000,
 #ifdef INIT_SUBSYS_INFO
@@ -48408,6 +51632,15 @@ static const pciDeviceInfo pci_dev_info_1148_4300 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1148_4320 = {
+	0x4320, pci_device_1148_4320,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1148_4320,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1148_4400 = {
 	0x4400, pci_device_1148_4400,
 #ifdef INIT_SUBSYS_INFO
@@ -49016,6 +52249,15 @@ static const pciDeviceInfo pci_dev_info_1166_0201 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1166_0203 = {
+	0x0203, pci_device_1166_0203,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1166_0203,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1166_0211 = {
 	0x0211, pci_device_1166_0211,
 #ifdef INIT_SUBSYS_INFO
@@ -49034,6 +52276,15 @@ static const pciDeviceInfo pci_dev_info_1166_0212 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1166_0213 = {
+	0x0213, pci_device_1166_0213,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1166_0213,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1166_0220 = {
 	0x0220, pci_device_1166_0220,
 #ifdef INIT_SUBSYS_INFO
@@ -49043,6 +52294,33 @@ static const pciDeviceInfo pci_dev_info_1166_0220 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1166_0221 = {
+	0x0221, pci_device_1166_0221,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1166_0221,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1166_0225 = {
+	0x0225, pci_device_1166_0225,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1166_0225,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1166_0227 = {
+	0x0227, pci_device_1166_0227,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1166_0227,
+#else
+	NULL,
+#endif
+	0
+};
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_116a_6100 = {
@@ -50109,6 +53387,15 @@ static const pciDeviceInfo pci_dev_info_11c1_045a = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_11c1_045c = {
+	0x045c, pci_device_11c1_045c,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_11c1_045c,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_11c1_0461 = {
 	0x0461, pci_device_11c1_0461,
 #ifdef INIT_SUBSYS_INFO
@@ -50154,6 +53441,15 @@ static const pciDeviceInfo pci_dev_info_11c1_5802 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_11c1_5803 = {
+	0x5803, pci_device_11c1_5803,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_11c1_5803,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_11c1_5811 = {
 	0x5811, pci_device_11c1_5811,
 #ifdef INIT_SUBSYS_INFO
@@ -50587,6 +53883,17 @@ static const pciDeviceInfo pci_dev_info_11fe_8015 = {
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_1202_4300 = {
+	0x4300, pci_device_1202_4300,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1202_4300,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_1208_4853 = {
 	0x4853, pci_device_1208_4853,
 #ifdef INIT_SUBSYS_INFO
@@ -51093,28 +54400,19 @@ static const pciDeviceInfo pci_dev_info_123f_8888 = {
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
-static const pciDeviceInfo pci_dev_info_1242_4643 = {
-	0x4643, pci_device_1242_4643,
-#ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1242_4643,
-#else
-	NULL,
-#endif
-	0
-};
-static const pciDeviceInfo pci_dev_info_1242_6562 = {
-	0x6562, pci_device_1242_6562,
+static const pciDeviceInfo pci_dev_info_1242_1560 = {
+	0x1560, pci_device_1242_1560,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1242_6562,
+	pci_ss_list_1242_1560,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1242_656a = {
-	0x656a, pci_device_1242_656a,
+static const pciDeviceInfo pci_dev_info_1242_4643 = {
+	0x4643, pci_device_1242_4643,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1242_656a,
+	pci_ss_list_1242_4643,
 #else
 	NULL,
 #endif
@@ -53298,6 +56596,60 @@ static const pciDeviceInfo pci_dev_info_1353_0005 = {
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_135c_0010 = {
+	0x0010, pci_device_135c_0010,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_135c_0010,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_135c_0020 = {
+	0x0020, pci_device_135c_0020,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_135c_0020,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_135c_0030 = {
+	0x0030, pci_device_135c_0030,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_135c_0030,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_135c_0040 = {
+	0x0040, pci_device_135c_0040,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_135c_0040,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_135c_0050 = {
+	0x0050, pci_device_135c_0050,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_135c_0050,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_135c_0060 = {
+	0x0060, pci_device_135c_0060,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_135c_0060,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_135c_00f0 = {
 	0x00f0, pci_device_135c_00f0,
 #ifdef INIT_SUBSYS_INFO
@@ -53307,6 +56659,60 @@ static const pciDeviceInfo pci_dev_info_135c_00f0 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_135c_0170 = {
+	0x0170, pci_device_135c_0170,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_135c_0170,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_135c_0180 = {
+	0x0180, pci_device_135c_0180,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_135c_0180,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_135c_0190 = {
+	0x0190, pci_device_135c_0190,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_135c_0190,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_135c_01a0 = {
+	0x01a0, pci_device_135c_01a0,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_135c_01a0,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_135c_01b0 = {
+	0x01b0, pci_device_135c_01b0,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_135c_01b0,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_135c_01c0 = {
+	0x01c0, pci_device_135c_01c0,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_135c_01c0,
+#else
+	NULL,
+#endif
+	0
+};
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_135e_7101 = {
@@ -53566,6 +56972,42 @@ static const pciDeviceInfo pci_dev_info_13a3_0012 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_13a3_0014 = {
+	0x0014, pci_device_13a3_0014,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_13a3_0014,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_13a3_0016 = {
+	0x0016, pci_device_13a3_0016,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_13a3_0016,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_13a3_0017 = {
+	0x0017, pci_device_13a3_0017,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_13a3_0017,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_13a3_0018 = {
+	0x0018, pci_device_13a3_0018,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_13a3_0018,
+#else
+	NULL,
+#endif
+	0
+};
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_13a8_0158 = {
@@ -53619,6 +57061,26 @@ static const pciDeviceInfo pci_dev_info_13c1_1002 = {
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_13d0_2103 = {
+	0x2103, pci_device_13d0_2103,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_13d0_2103,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_13d1_ab02 = {
+	0xab02, pci_device_13d1_ab02,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_13d1_ab02,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_13d1_ab06 = {
 	0xab06, pci_device_13d1_ab06,
 #ifdef INIT_SUBSYS_INFO
@@ -53862,6 +57324,15 @@ static const pciDeviceInfo pci_dev_info_1412_1712 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1412_1724 = {
+	0x1724, pci_device_1412_1724,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1412_1724,
+#else
+	NULL,
+#endif
+	0
+};
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_1415_8403 = {
@@ -54056,6 +57527,80 @@ static const pciDeviceInfo pci_dev_info_14b3_0000 = {
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_14b5_0200 = {
+	0x0200, pci_device_14b5_0200,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_14b5_0200,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_14b5_0300 = {
+	0x0300, pci_device_14b5_0300,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_14b5_0300,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_14b5_0400 = {
+	0x0400, pci_device_14b5_0400,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_14b5_0400,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_14b5_0600 = {
+	0x0600, pci_device_14b5_0600,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_14b5_0600,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_14b5_0800 = {
+	0x0800, pci_device_14b5_0800,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_14b5_0800,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_14b5_0900 = {
+	0x0900, pci_device_14b5_0900,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_14b5_0900,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_14b5_0a00 = {
+	0x0a00, pci_device_14b5_0a00,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_14b5_0a00,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_14b5_0b00 = {
+	0x0b00, pci_device_14b5_0b00,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_14b5_0b00,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_14b7_0001 = {
 	0x0001, pci_device_14b7_0001,
 #ifdef INIT_SUBSYS_INFO
@@ -54112,6 +57657,15 @@ static const pciDeviceInfo pci_dev_info_14b9_4800 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_14b9_a504 = {
+	0xa504, pci_device_14b9_a504,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_14b9_a504,
+#else
+	NULL,
+#endif
+	0
+};
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_14d2_8001 = {
@@ -54417,6 +57971,15 @@ static const pciDeviceInfo pci_dev_info_14e4_1647 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_14e4_1648 = {
+	0x1648, pci_device_14e4_1648,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_14e4_1648,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_14e4_164d = {
 	0x164d, pci_device_14e4_164d,
 #ifdef INIT_SUBSYS_INFO
@@ -54426,6 +57989,33 @@ static const pciDeviceInfo pci_dev_info_14e4_164d = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_14e4_1653 = {
+	0x1653, pci_device_14e4_1653,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_14e4_1653,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_14e4_165d = {
+	0x165d, pci_device_14e4_165d,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_14e4_165d,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_14e4_1696 = {
+	0x1696, pci_device_14e4_1696,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_14e4_1696,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_14e4_16a6 = {
 	0x16a6, pci_device_14e4_16a6,
 #ifdef INIT_SUBSYS_INFO
@@ -54444,6 +58034,51 @@ static const pciDeviceInfo pci_dev_info_14e4_16a7 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_14e4_16a8 = {
+	0x16a8, pci_device_14e4_16a8,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_14e4_16a8,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_14e4_16c6 = {
+	0x16c6, pci_device_14e4_16c6,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_14e4_16c6,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_14e4_16c7 = {
+	0x16c7, pci_device_14e4_16c7,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_14e4_16c7,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_14e4_4210 = {
+	0x4210, pci_device_14e4_4210,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_14e4_4210,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_14e4_4211 = {
+	0x4211, pci_device_14e4_4211,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_14e4_4211,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_14e4_4212 = {
 	0x4212, pci_device_14e4_4212,
 #ifdef INIT_SUBSYS_INFO
@@ -54453,6 +58088,60 @@ static const pciDeviceInfo pci_dev_info_14e4_4212 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_14e4_4301 = {
+	0x4301, pci_device_14e4_4301,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_14e4_4301,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_14e4_4401 = {
+	0x4401, pci_device_14e4_4401,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_14e4_4401,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_14e4_4402 = {
+	0x4402, pci_device_14e4_4402,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_14e4_4402,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_14e4_4410 = {
+	0x4410, pci_device_14e4_4410,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_14e4_4410,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_14e4_4411 = {
+	0x4411, pci_device_14e4_4411,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_14e4_4411,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_14e4_4412 = {
+	0x4412, pci_device_14e4_4412,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_14e4_4412,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_14e4_5820 = {
 	0x5820, pci_device_14e4_5820,
 #ifdef INIT_SUBSYS_INFO
@@ -55360,6 +59049,64 @@ static const pciDeviceInfo pci_dev_info_1522_0100 = {
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_1524_1211 = {
+	0x1211, pci_device_1524_1211,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1524_1211,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1524_1225 = {
+	0x1225, pci_device_1524_1225,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1524_1225,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1524_1410 = {
+	0x1410, pci_device_1524_1410,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1524_1410,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1524_1420 = {
+	0x1420, pci_device_1524_1420,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1524_1420,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_1543_3052 = {
+	0x3052, pci_device_1543_3052,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1543_3052,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1543_4c22 = {
+	0x4c22, pci_device_1543_4c22,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1543_4c22,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_1571_a001 = {
 	0xa001, pci_device_1571_a001,
 #ifdef INIT_SUBSYS_INFO
@@ -55744,6 +59491,57 @@ static const pciDeviceInfo pci_dev_info_1638_1100 = {
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_163c_5449 = {
+	0x5449, pci_device_163c_5449,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_163c_5449,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_165a_c100 = {
+	0xc100, pci_device_165a_c100,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_165a_c100,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_165a_d200 = {
+	0xd200, pci_device_165a_d200,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_165a_d200,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_165a_d300 = {
+	0xd300, pci_device_165a_d300,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_165a_d300,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_16ab_1102 = {
+	0x1102, pci_device_16ab_1102,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_16ab_1102,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_16ec_3685 = {
 	0x3685, pci_device_16ec_3685,
 #ifdef INIT_SUBSYS_INFO
@@ -55842,6 +59640,75 @@ static const pciDeviceInfo pci_dev_info_1796_0006 = {
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_17cc_2280 = {
+	0x2280, pci_device_17cc_2280,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_17cc_2280,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_1813_4000 = {
+	0x4000, pci_device_1813_4000,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1813_4000,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1813_4100 = {
+	0x4100, pci_device_1813_4100,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1813_4100,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_1888_0301 = {
+	0x0301, pci_device_1888_0301,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1888_0301,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1888_0601 = {
+	0x0601, pci_device_1888_0601,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1888_0601,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1888_0710 = {
+	0x0710, pci_device_1888_0710,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1888_0710,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1888_0720 = {
+	0x0720, pci_device_1888_0720,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1888_0720,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_1a08_0000 = {
 	0x0000, pci_device_1a08_0000,
 #ifdef INIT_SUBSYS_INFO
@@ -55924,6 +59791,24 @@ static const pciDeviceInfo pci_dev_info_2348_2010 = {
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_3388_0013 = {
+	0x0013, pci_device_3388_0013,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_3388_0013,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_3388_0014 = {
+	0x0014, pci_device_3388_0014,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_3388_0014,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_3388_0021 = {
 	0x0021, pci_device_3388_0021,
 #ifdef INIT_SUBSYS_INFO
@@ -56254,6 +60139,17 @@ static const pciDeviceInfo pci_dev_info_416c_0200 = {
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_4444_0803 = {
+	0x0803, pci_device_4444_0803,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_4444_0803,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_4916_1960 = {
 	0x1960, pci_device_4916_1960,
 #ifdef INIT_SUBSYS_INFO
@@ -57169,6 +61065,15 @@ static const pciDeviceInfo pci_dev_info_5333_8d02 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_5333_8d03 = {
+	0x8d03, pci_device_5333_8d03,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_5333_8d03,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_5333_8d04 = {
 	0x8d04, pci_device_5333_8d04,
 #ifdef INIT_SUBSYS_INFO
@@ -57676,6 +61581,15 @@ static const pciDeviceInfo pci_dev_info_8086_103e = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_8086_1040 = {
+	0x1040, pci_device_8086_1040,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_1040,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_8086_1059 = {
 	0x1059, pci_device_8086_1059,
 #ifdef INIT_SUBSYS_INFO
@@ -58729,6 +62643,24 @@ static const pciDeviceInfo pci_dev_info_8086_2562 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_8086_2570 = {
+	0x2570, pci_device_8086_2570,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2570,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2572 = {
+	0x2572, pci_device_8086_2572,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2572,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_8086_3092 = {
 	0x3092, pci_device_8086_3092,
 #ifdef INIT_SUBSYS_INFO
@@ -58774,6 +62706,24 @@ static const pciDeviceInfo pci_dev_info_8086_3578 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_8086_3580 = {
+	0x3580, pci_device_8086_3580,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_3580,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_3582 = {
+	0x3582, pci_device_8086_3582,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_3582,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_8086_5200 = {
 	0x5200, pci_device_8086_5200,
 #ifdef INIT_SUBSYS_INFO
@@ -60420,6 +64370,15 @@ static const pciDeviceInfo pci_dev_info_cddd_0101 = {
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_cddd_0200 = {
+	0x0200, pci_device_cddd_0200,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_cddd_0200,
+#else
+	NULL,
+#endif
+	0
+};
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_d4d4_0601 = {
@@ -60464,6 +64423,35 @@ static const pciDeviceInfo pci_dev_info_e159_0002 = {
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_ea60_9896 = {
+	0x9896, pci_device_ea60_9896,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_ea60_9896,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_ea60_9897 = {
+	0x9897, pci_device_ea60_9897,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_ea60_9897,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_ea60_9898 = {
+	0x9898, pci_device_ea60_9898,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_ea60_9898,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_eace_3100 = {
 	0x3100, pci_device_eace_3100,
 #ifdef INIT_SUBSYS_INFO
@@ -60575,6 +64563,71 @@ static const pciDeviceInfo pci_dev_info_ec80_ec00 = {
 	0
 };
 #endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_ecc0_0050 = {
+	0x0050, pci_device_ecc0_0050,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_ecc0_0050,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_ecc0_0051 = {
+	0x0051, pci_device_ecc0_0051,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_ecc0_0051,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_ecc0_0060 = {
+	0x0060, pci_device_ecc0_0060,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_ecc0_0060,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_ecc0_0070 = {
+	0x0070, pci_device_ecc0_0070,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_ecc0_0070,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_ecc0_0071 = {
+	0x0071, pci_device_ecc0_0071,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_ecc0_0071,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_ecc0_0072 = {
+	0x0072, pci_device_ecc0_0072,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_ecc0_0072,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_ecc0_0080 = {
+	0x0080, pci_device_ecc0_0080,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_ecc0_0080,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
 static const pciDeviceInfo pci_dev_info_edd8_a091 = {
 	0xa091, pci_device_edd8_a091,
 #ifdef INIT_SUBSYS_INFO
@@ -60612,6 +64665,15 @@ static const pciDeviceInfo pci_dev_info_edd8_a0a9 = {
 	0
 };
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_f1d0_cafe = {
+	0xcafe, pci_device_f1d0_cafe,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_f1d0_cafe,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_f1d0_efac = {
 	0xefac, pci_device_f1d0_efac,
 #ifdef INIT_SUBSYS_INFO
@@ -60632,10 +64694,19 @@ static const pciDeviceInfo pci_dev_info_f1d0_facd = {
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
-static const pciDeviceInfo pci_dev_info_fffe_0710 = {
-	0x0710, pci_device_fffe_0710,
+static const pciDeviceInfo pci_dev_info_feda_a0fa = {
+	0xa0fa, pci_device_feda_a0fa,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_fffe_0710,
+	pci_ss_list_feda_a0fa,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_feda_a10e = {
+	0xa10e, pci_device_feda_a10e,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_feda_a10e,
 #else
 	NULL,
 #endif
@@ -60643,10 +64714,10 @@ static const pciDeviceInfo pci_dev_info_fffe_0710 = {
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
-static const pciDeviceInfo pci_dev_info_ffff_0c30 = {
-	0x0c30, pci_device_ffff_0c30,
+static const pciDeviceInfo pci_dev_info_fffe_0710 = {
+	0x0710, pci_device_fffe_0710,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_ffff_0c30,
+	pci_ss_list_fffe_0710,
 #else
 	NULL,
 #endif
@@ -60657,6 +64728,7 @@ static const pciDeviceInfo pci_dev_info_ffff_0c30 = {
 #define pci_dev_list_001a NULL
 #define pci_dev_list_0033 NULL
 #define pci_dev_list_003d NULL
+#define pci_dev_list_0059 NULL
 #define pci_dev_list_0070 NULL
 #define pci_dev_list_0100 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -60790,9 +64862,14 @@ static const pciDeviceInfo *pci_dev_list_1001[] = {
 };
 #endif
 static const pciDeviceInfo *pci_dev_list_1002[] = {
+	&pci_dev_info_1002_4144,
+	&pci_dev_info_1002_4145,
+	&pci_dev_info_1002_4146,
+	&pci_dev_info_1002_4147,
 	&pci_dev_info_1002_4158,
 	&pci_dev_info_1002_4242,
 	&pci_dev_info_1002_4336,
+	&pci_dev_info_1002_4337,
 	&pci_dev_info_1002_4354,
 	&pci_dev_info_1002_4358,
 	&pci_dev_info_1002_4554,
@@ -60820,6 +64897,7 @@ static const pciDeviceInfo *pci_dev_list_1002[] = {
 	&pci_dev_info_1002_4965,
 	&pci_dev_info_1002_4966,
 	&pci_dev_info_1002_4967,
+	&pci_dev_info_1002_496e,
 	&pci_dev_info_1002_4c42,
 	&pci_dev_info_1002_4c44,
 	&pci_dev_info_1002_4c45,
@@ -60847,6 +64925,10 @@ static const pciDeviceInfo *pci_dev_list_1002[] = {
 	&pci_dev_info_1002_4e45,
 	&pci_dev_info_1002_4e46,
 	&pci_dev_info_1002_4e47,
+	&pci_dev_info_1002_4e64,
+	&pci_dev_info_1002_4e65,
+	&pci_dev_info_1002_4e66,
+	&pci_dev_info_1002_4e67,
 	&pci_dev_info_1002_5041,
 	&pci_dev_info_1002_5042,
 	&pci_dev_info_1002_5043,
@@ -60880,6 +64962,9 @@ static const pciDeviceInfo *pci_dev_list_1002[] = {
 	&pci_dev_info_1002_514a,
 	&pci_dev_info_1002_514b,
 	&pci_dev_info_1002_514c,
+	&pci_dev_info_1002_514d,
+	&pci_dev_info_1002_514e,
+	&pci_dev_info_1002_514f,
 	&pci_dev_info_1002_5157,
 	&pci_dev_info_1002_5158,
 	&pci_dev_info_1002_5159,
@@ -60888,6 +64973,7 @@ static const pciDeviceInfo *pci_dev_list_1002[] = {
 	&pci_dev_info_1002_5169,
 	&pci_dev_info_1002_516a,
 	&pci_dev_info_1002_516b,
+	&pci_dev_info_1002_516c,
 	&pci_dev_info_1002_5245,
 	&pci_dev_info_1002_5246,
 	&pci_dev_info_1002_5247,
@@ -60939,7 +65025,10 @@ static const pciDeviceInfo *pci_dev_list_1004[] = {
 	&pci_dev_info_1004_0304,
 	&pci_dev_info_1004_0305,
 	&pci_dev_info_1004_0306,
+	&pci_dev_info_1004_0307,
+	&pci_dev_info_1004_0308,
 	&pci_dev_info_1004_0702,
+	&pci_dev_info_1004_0703,
 	NULL
 };
 #endif
@@ -61090,13 +65179,16 @@ static const pciDeviceInfo *pci_dev_list_1014[] = {
 	&pci_dev_info_1014_00a6,
 	&pci_dev_info_1014_00b7,
 	&pci_dev_info_1014_00be,
+	&pci_dev_info_1014_00dc,
 	&pci_dev_info_1014_00fc,
 	&pci_dev_info_1014_0105,
+	&pci_dev_info_1014_010f,
 	&pci_dev_info_1014_0142,
 	&pci_dev_info_1014_0144,
 	&pci_dev_info_1014_0156,
 	&pci_dev_info_1014_01a7,
 	&pci_dev_info_1014_01bd,
+	&pci_dev_info_1014_0302,
 	&pci_dev_info_1014_ffff,
 	NULL
 };
@@ -61210,6 +65302,7 @@ static const pciDeviceInfo *pci_dev_list_1023[] = {
 	&pci_dev_info_1023_8420,
 	&pci_dev_info_1023_8500,
 	&pci_dev_info_1023_8520,
+	&pci_dev_info_1023_8620,
 	&pci_dev_info_1023_8820,
 	&pci_dev_info_1023_9320,
 	&pci_dev_info_1023_9350,
@@ -61392,11 +65485,15 @@ static const pciDeviceInfo *pci_dev_list_1033[] = {
 	&pci_dev_info_1033_0007,
 	&pci_dev_info_1033_0008,
 	&pci_dev_info_1033_0009,
+	&pci_dev_info_1033_0016,
 	&pci_dev_info_1033_001a,
 	&pci_dev_info_1033_0021,
 	&pci_dev_info_1033_0029,
 	&pci_dev_info_1033_002a,
+	&pci_dev_info_1033_002c,
+	&pci_dev_info_1033_002d,
 	&pci_dev_info_1033_0035,
+	&pci_dev_info_1033_003b,
 	&pci_dev_info_1033_003e,
 	&pci_dev_info_1033_0046,
 	&pci_dev_info_1033_005a,
@@ -61430,6 +65527,10 @@ static const pciDeviceInfo *pci_dev_list_1039[] = {
 	&pci_dev_info_1039_0204,
 	&pci_dev_info_1039_0205,
 	&pci_dev_info_1039_0300,
+	&pci_dev_info_1039_0310,
+	&pci_dev_info_1039_0315,
+	&pci_dev_info_1039_0325,
+	&pci_dev_info_1039_0330,
 	&pci_dev_info_1039_0406,
 	&pci_dev_info_1039_0496,
 	&pci_dev_info_1039_0530,
@@ -61455,6 +65556,7 @@ static const pciDeviceInfo *pci_dev_list_1039[] = {
 	&pci_dev_info_1039_3602,
 	&pci_dev_info_1039_5107,
 	&pci_dev_info_1039_5300,
+	&pci_dev_info_1039_5315,
 	&pci_dev_info_1039_5401,
 	&pci_dev_info_1039_5511,
 	&pci_dev_info_1039_5513,
@@ -61471,8 +65573,10 @@ static const pciDeviceInfo *pci_dev_list_1039[] = {
 	&pci_dev_info_1039_6236,
 	&pci_dev_info_1039_6300,
 	&pci_dev_info_1039_6306,
+	&pci_dev_info_1039_6325,
 	&pci_dev_info_1039_6326,
 	&pci_dev_info_1039_7001,
+	&pci_dev_info_1039_7002,
 	&pci_dev_info_1039_7007,
 	&pci_dev_info_1039_7012,
 	&pci_dev_info_1039_7013,
@@ -61482,7 +65586,6 @@ static const pciDeviceInfo *pci_dev_list_1039[] = {
 };
 #define pci_dev_list_103a NULL
 #define pci_dev_list_103b NULL
-#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_103c[] = {
 	&pci_dev_info_103c_1005,
 	&pci_dev_info_103c_1006,
@@ -61514,7 +65617,6 @@ static const pciDeviceInfo *pci_dev_list_103c[] = {
 	&pci_dev_info_103c_2925,
 	NULL
 };
-#endif
 #define pci_dev_list_103e NULL
 #define pci_dev_list_103f NULL
 #define pci_dev_list_1040 NULL
@@ -61532,6 +65634,7 @@ static const pciDeviceInfo *pci_dev_list_1042[] = {
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_1043[] = {
 	&pci_dev_info_1043_0675,
+	&pci_dev_info_1043_4021,
 	NULL
 };
 #endif
@@ -61586,6 +65689,8 @@ static const pciDeviceInfo *pci_dev_list_1048[] = {
 static const pciDeviceInfo *pci_dev_list_104a[] = {
 	&pci_dev_info_104a_0008,
 	&pci_dev_info_104a_0009,
+	&pci_dev_info_104a_0010,
+	&pci_dev_info_104a_0210,
 	&pci_dev_info_104a_0981,
 	&pci_dev_info_104a_1746,
 	&pci_dev_info_104a_2774,
@@ -61604,6 +65709,7 @@ static const pciDeviceInfo *pci_dev_list_104c[] = {
 	&pci_dev_info_104c_0500,
 	&pci_dev_info_104c_0508,
 	&pci_dev_info_104c_1000,
+	&pci_dev_info_104c_104c,
 	&pci_dev_info_104c_3d04,
 	&pci_dev_info_104c_3d07,
 	&pci_dev_info_104c_8000,
@@ -61651,6 +65757,7 @@ static const pciDeviceInfo *pci_dev_list_104c[] = {
 	&pci_dev_info_104c_ac52,
 	&pci_dev_info_104c_ac53,
 	&pci_dev_info_104c_ac55,
+	&pci_dev_info_104c_ac56,
 	&pci_dev_info_104c_ac60,
 	&pci_dev_info_104c_fe00,
 	&pci_dev_info_104c_fe03,
@@ -61681,6 +65788,7 @@ static const pciDeviceInfo *pci_dev_list_1050[] = {
 	&pci_dev_info_1050_0840,
 	&pci_dev_info_1050_0940,
 	&pci_dev_info_1050_5a5a,
+	&pci_dev_info_1050_6692,
 	&pci_dev_info_1050_9970,
 	NULL
 };
@@ -61725,6 +65833,7 @@ static const pciDeviceInfo *pci_dev_list_105a[] = {
 	&pci_dev_info_105a_0d30,
 	&pci_dev_info_105a_0d38,
 	&pci_dev_info_105a_1275,
+	&pci_dev_info_105a_3376,
 	&pci_dev_info_105a_4d30,
 	&pci_dev_info_105a_4d33,
 	&pci_dev_info_105a_4d38,
@@ -61734,6 +65843,7 @@ static const pciDeviceInfo *pci_dev_list_105a[] = {
 	&pci_dev_info_105a_5300,
 	&pci_dev_info_105a_6268,
 	&pci_dev_info_105a_6269,
+	&pci_dev_info_105a_6621,
 	&pci_dev_info_105a_7275,
 	NULL
 };
@@ -62113,6 +66223,7 @@ static const pciDeviceInfo *pci_dev_list_1095[] = {
 	&pci_dev_info_1095_0670,
 	&pci_dev_info_1095_0673,
 	&pci_dev_info_1095_0680,
+	&pci_dev_info_1095_3112,
 	NULL
 };
 #endif
@@ -62156,7 +66267,12 @@ static const pciDeviceInfo *pci_dev_list_109e[] = {
 #define pci_dev_list_10a2 NULL
 #define pci_dev_list_10a3 NULL
 #define pci_dev_list_10a4 NULL
-#define pci_dev_list_10a5 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_10a5[] = {
+	&pci_dev_info_10a5_5449,
+	NULL
+};
+#endif
 #define pci_dev_list_10a6 NULL
 #define pci_dev_list_10a7 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -62313,6 +66429,8 @@ static const pciDeviceInfo *pci_dev_list_10b7[] = {
 	&pci_dev_info_10b7_9058,
 	&pci_dev_info_10b7_905a,
 	&pci_dev_info_10b7_9200,
+	&pci_dev_info_10b7_9201,
+	&pci_dev_info_10b7_9300,
 	&pci_dev_info_10b7_9800,
 	&pci_dev_info_10b7_9805,
 	&pci_dev_info_10b7_9900,
@@ -62354,6 +66472,7 @@ static const pciDeviceInfo *pci_dev_list_10b9[] = {
 	&pci_dev_info_10b9_1533,
 	&pci_dev_info_10b9_1541,
 	&pci_dev_info_10b9_1543,
+	&pci_dev_info_10b9_1563,
 	&pci_dev_info_10b9_1621,
 	&pci_dev_info_10b9_1631,
 	&pci_dev_info_10b9_1632,
@@ -62363,6 +66482,8 @@ static const pciDeviceInfo *pci_dev_list_10b9[] = {
 	&pci_dev_info_10b9_1647,
 	&pci_dev_info_10b9_1651,
 	&pci_dev_info_10b9_1671,
+	&pci_dev_info_10b9_1681,
+	&pci_dev_info_10b9_1687,
 	&pci_dev_info_10b9_3141,
 	&pci_dev_info_10b9_3143,
 	&pci_dev_info_10b9_3145,
@@ -62382,6 +66503,7 @@ static const pciDeviceInfo *pci_dev_list_10b9[] = {
 	&pci_dev_info_10b9_5239,
 	&pci_dev_info_10b9_5243,
 	&pci_dev_info_10b9_5247,
+	&pci_dev_info_10b9_5249,
 	&pci_dev_info_10b9_5251,
 	&pci_dev_info_10b9_5253,
 	&pci_dev_info_10b9_5261,
@@ -62390,6 +66512,7 @@ static const pciDeviceInfo *pci_dev_list_10b9[] = {
 	&pci_dev_info_10b9_5455,
 	&pci_dev_info_10b9_5457,
 	&pci_dev_info_10b9_5459,
+	&pci_dev_info_10b9_545a,
 	&pci_dev_info_10b9_5471,
 	&pci_dev_info_10b9_5473,
 	&pci_dev_info_10b9_7101,
@@ -62510,6 +66633,15 @@ static const pciDeviceInfo *pci_dev_list_10de[] = {
 	&pci_dev_info_10de_002d,
 	&pci_dev_info_10de_002e,
 	&pci_dev_info_10de_002f,
+	&pci_dev_info_10de_0060,
+	&pci_dev_info_10de_0064,
+	&pci_dev_info_10de_0065,
+	&pci_dev_info_10de_0066,
+	&pci_dev_info_10de_0067,
+	&pci_dev_info_10de_0068,
+	&pci_dev_info_10de_006a,
+	&pci_dev_info_10de_006b,
+	&pci_dev_info_10de_006e,
 	&pci_dev_info_10de_00a0,
 	&pci_dev_info_10de_0100,
 	&pci_dev_info_10de_0101,
@@ -62534,6 +66666,12 @@ static const pciDeviceInfo *pci_dev_list_10de[] = {
 	&pci_dev_info_10de_017a,
 	&pci_dev_info_10de_017b,
 	&pci_dev_info_10de_017c,
+	&pci_dev_info_10de_0181,
+	&pci_dev_info_10de_0182,
+	&pci_dev_info_10de_0183,
+	&pci_dev_info_10de_0188,
+	&pci_dev_info_10de_018a,
+	&pci_dev_info_10de_018b,
 	&pci_dev_info_10de_01a0,
 	&pci_dev_info_10de_01a4,
 	&pci_dev_info_10de_01ab,
@@ -62546,16 +66684,31 @@ static const pciDeviceInfo *pci_dev_list_10de[] = {
 	&pci_dev_info_10de_01b8,
 	&pci_dev_info_10de_01bc,
 	&pci_dev_info_10de_01c1,
+	&pci_dev_info_10de_01c2,
+	&pci_dev_info_10de_01c3,
+	&pci_dev_info_10de_01e8,
+	&pci_dev_info_10de_01f0,
 	&pci_dev_info_10de_0200,
 	&pci_dev_info_10de_0201,
 	&pci_dev_info_10de_0202,
 	&pci_dev_info_10de_0203,
 	&pci_dev_info_10de_0250,
 	&pci_dev_info_10de_0251,
+	&pci_dev_info_10de_0252,
 	&pci_dev_info_10de_0253,
 	&pci_dev_info_10de_0258,
 	&pci_dev_info_10de_0259,
 	&pci_dev_info_10de_025b,
+	&pci_dev_info_10de_0280,
+	&pci_dev_info_10de_0281,
+	&pci_dev_info_10de_0282,
+	&pci_dev_info_10de_0288,
+	&pci_dev_info_10de_0289,
+	&pci_dev_info_10de_0300,
+	&pci_dev_info_10de_0301,
+	&pci_dev_info_10de_0302,
+	&pci_dev_info_10de_0308,
+	&pci_dev_info_10de_0309,
 	NULL
 };
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -62593,6 +66746,7 @@ static const pciDeviceInfo *pci_dev_list_10e1[] = {
 static const pciDeviceInfo *pci_dev_list_10e3[] = {
 	&pci_dev_info_10e3_0000,
 	&pci_dev_info_10e3_0860,
+	&pci_dev_info_10e3_0862,
 	NULL
 };
 #endif
@@ -62629,6 +66783,7 @@ static const pciDeviceInfo *pci_dev_list_10ea[] = {
 	&pci_dev_info_10ea_2010,
 	&pci_dev_info_10ea_5000,
 	&pci_dev_info_10ea_5050,
+	&pci_dev_info_10ea_5202,
 	NULL
 };
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -62693,10 +66848,16 @@ static const pciDeviceInfo *pci_dev_list_10fa[] = {
 	NULL
 };
 #endif
-#define pci_dev_list_10fb NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_10fb[] = {
+	&pci_dev_info_10fb_186f,
+	NULL
+};
+#endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_10fc[] = {
 	&pci_dev_info_10fc_0003,
+	&pci_dev_info_10fc_0005,
 	NULL
 };
 #endif
@@ -62718,9 +66879,12 @@ static const pciDeviceInfo *pci_dev_list_1101[] = {
 static const pciDeviceInfo *pci_dev_list_1102[] = {
 	&pci_dev_info_1102_0002,
 	&pci_dev_info_1102_0004,
+	&pci_dev_info_1102_0006,
 	&pci_dev_info_1102_4001,
 	&pci_dev_info_1102_7002,
 	&pci_dev_info_1102_7003,
+	&pci_dev_info_1102_7004,
+	&pci_dev_info_1102_8064,
 	&pci_dev_info_1102_8938,
 	NULL
 };
@@ -62791,14 +66955,18 @@ static const pciDeviceInfo *pci_dev_list_1106[] = {
 	&pci_dev_info_1106_3102,
 	&pci_dev_info_1106_3103,
 	&pci_dev_info_1106_3104,
+	&pci_dev_info_1106_3106,
 	&pci_dev_info_1106_3109,
 	&pci_dev_info_1106_3112,
 	&pci_dev_info_1106_3116,
+	&pci_dev_info_1106_3122,
+	&pci_dev_info_1106_3123,
 	&pci_dev_info_1106_3128,
 	&pci_dev_info_1106_3133,
 	&pci_dev_info_1106_3147,
 	&pci_dev_info_1106_3148,
 	&pci_dev_info_1106_3156,
+	&pci_dev_info_1106_3168,
 	&pci_dev_info_1106_3177,
 	&pci_dev_info_1106_3189,
 	&pci_dev_info_1106_5030,
@@ -63060,9 +67228,13 @@ static const pciDeviceInfo *pci_dev_list_112f[] = {
 #define pci_dev_list_1130 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_1131[] = {
+	&pci_dev_info_1131_1561,
+	&pci_dev_info_1131_1562,
 	&pci_dev_info_1131_3400,
 	&pci_dev_info_1131_7130,
+	&pci_dev_info_1131_7133,
 	&pci_dev_info_1131_7134,
+	&pci_dev_info_1131_7135,
 	&pci_dev_info_1131_7145,
 	&pci_dev_info_1131_7146,
 	NULL
@@ -63087,6 +67259,7 @@ static const pciDeviceInfo *pci_dev_list_1133[] = {
 	&pci_dev_info_1133_e003,
 	&pci_dev_info_1133_e004,
 	&pci_dev_info_1133_e005,
+	&pci_dev_info_1133_e00b,
 	&pci_dev_info_1133_e010,
 	&pci_dev_info_1133_e012,
 	&pci_dev_info_1133_e014,
@@ -63164,7 +67337,17 @@ static const pciDeviceInfo *pci_dev_list_1144[] = {
 	NULL
 };
 #endif
-#define pci_dev_list_1145 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_1145[] = {
+	&pci_dev_info_1145_8007,
+	&pci_dev_info_1145_f007,
+	&pci_dev_info_1145_f010,
+	&pci_dev_info_1145_f012,
+	&pci_dev_info_1145_f013,
+	&pci_dev_info_1145_f015,
+	NULL
+};
+#endif
 #define pci_dev_list_1146 NULL
 #define pci_dev_list_1147 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -63172,6 +67355,7 @@ static const pciDeviceInfo *pci_dev_list_1148[] = {
 	&pci_dev_info_1148_4000,
 	&pci_dev_info_1148_4200,
 	&pci_dev_info_1148_4300,
+	&pci_dev_info_1148_4320,
 	&pci_dev_info_1148_4400,
 	NULL
 };
@@ -63298,9 +67482,14 @@ static const pciDeviceInfo *pci_dev_list_1166[] = {
 	&pci_dev_info_1166_0017,
 	&pci_dev_info_1166_0200,
 	&pci_dev_info_1166_0201,
+	&pci_dev_info_1166_0203,
 	&pci_dev_info_1166_0211,
 	&pci_dev_info_1166_0212,
+	&pci_dev_info_1166_0213,
 	&pci_dev_info_1166_0220,
+	&pci_dev_info_1166_0221,
+	&pci_dev_info_1166_0225,
+	&pci_dev_info_1166_0227,
 	NULL
 };
 #endif
@@ -63585,11 +67774,13 @@ static const pciDeviceInfo *pci_dev_list_11c1[] = {
 	&pci_dev_info_11c1_0458,
 	&pci_dev_info_11c1_0459,
 	&pci_dev_info_11c1_045a,
+	&pci_dev_info_11c1_045c,
 	&pci_dev_info_11c1_0461,
 	&pci_dev_info_11c1_0462,
 	&pci_dev_info_11c1_0480,
 	&pci_dev_info_11c1_5801,
 	&pci_dev_info_11c1_5802,
+	&pci_dev_info_11c1_5803,
 	&pci_dev_info_11c1_5811,
 	NULL
 };
@@ -63754,7 +67945,12 @@ static const pciDeviceInfo *pci_dev_list_11fe[] = {
 #define pci_dev_list_11ff NULL
 #define pci_dev_list_1200 NULL
 #define pci_dev_list_1201 NULL
-#define pci_dev_list_1202 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_1202[] = {
+	&pci_dev_info_1202_4300,
+	NULL
+};
+#endif
 #define pci_dev_list_1203 NULL
 #define pci_dev_list_1204 NULL
 #define pci_dev_list_1205 NULL
@@ -63914,9 +68110,8 @@ static const pciDeviceInfo *pci_dev_list_123f[] = {
 #define pci_dev_list_1241 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_1242[] = {
+	&pci_dev_info_1242_1560,
 	&pci_dev_info_1242_4643,
-	&pci_dev_info_1242_6562,
-	&pci_dev_info_1242_656a,
 	NULL
 };
 #endif
@@ -64599,7 +68794,19 @@ static const pciDeviceInfo *pci_dev_list_1353[] = {
 #define pci_dev_list_135b NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_135c[] = {
+	&pci_dev_info_135c_0010,
+	&pci_dev_info_135c_0020,
+	&pci_dev_info_135c_0030,
+	&pci_dev_info_135c_0040,
+	&pci_dev_info_135c_0050,
+	&pci_dev_info_135c_0060,
 	&pci_dev_info_135c_00f0,
+	&pci_dev_info_135c_0170,
+	&pci_dev_info_135c_0180,
+	&pci_dev_info_135c_0190,
+	&pci_dev_info_135c_01a0,
+	&pci_dev_info_135c_01b0,
+	&pci_dev_info_135c_01c0,
 	NULL
 };
 #endif
@@ -64728,6 +68935,10 @@ static const pciDeviceInfo *pci_dev_list_13a3[] = {
 	&pci_dev_info_13a3_0006,
 	&pci_dev_info_13a3_0007,
 	&pci_dev_info_13a3_0012,
+	&pci_dev_info_13a3_0014,
+	&pci_dev_info_13a3_0016,
+	&pci_dev_info_13a3_0017,
+	&pci_dev_info_13a3_0018,
 	NULL
 };
 #endif
@@ -64792,9 +69003,15 @@ static const pciDeviceInfo *pci_dev_list_13c1[] = {
 #define pci_dev_list_13cd NULL
 #define pci_dev_list_13ce NULL
 #define pci_dev_list_13cf NULL
-#define pci_dev_list_13d0 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_13d0[] = {
+	&pci_dev_info_13d0_2103,
+	NULL
+};
+#endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_13d1[] = {
+	&pci_dev_info_13d1_ab02,
 	&pci_dev_info_13d1_ab06,
 	NULL
 };
@@ -64921,6 +69138,7 @@ static const pciDeviceInfo *pci_dev_list_1409[] = {
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_1412[] = {
 	&pci_dev_info_1412_1712,
+	&pci_dev_info_1412_1724,
 	NULL
 };
 #endif
@@ -65127,7 +69345,19 @@ static const pciDeviceInfo *pci_dev_list_14b3[] = {
 };
 #endif
 #define pci_dev_list_14b4 NULL
-#define pci_dev_list_14b5 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_14b5[] = {
+	&pci_dev_info_14b5_0200,
+	&pci_dev_info_14b5_0300,
+	&pci_dev_info_14b5_0400,
+	&pci_dev_info_14b5_0600,
+	&pci_dev_info_14b5_0800,
+	&pci_dev_info_14b5_0900,
+	&pci_dev_info_14b5_0a00,
+	&pci_dev_info_14b5_0b00,
+	NULL
+};
+#endif
 #define pci_dev_list_14b6 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_14b7[] = {
@@ -65143,6 +69373,7 @@ static const pciDeviceInfo *pci_dev_list_14b9[] = {
 	&pci_dev_info_14b9_0350,
 	&pci_dev_info_14b9_4500,
 	&pci_dev_info_14b9_4800,
+	&pci_dev_info_14b9_a504,
 	NULL
 };
 #endif
@@ -65234,10 +69465,25 @@ static const pciDeviceInfo *pci_dev_list_14e4[] = {
 	&pci_dev_info_14e4_1645,
 	&pci_dev_info_14e4_1646,
 	&pci_dev_info_14e4_1647,
+	&pci_dev_info_14e4_1648,
 	&pci_dev_info_14e4_164d,
+	&pci_dev_info_14e4_1653,
+	&pci_dev_info_14e4_165d,
+	&pci_dev_info_14e4_1696,
 	&pci_dev_info_14e4_16a6,
 	&pci_dev_info_14e4_16a7,
+	&pci_dev_info_14e4_16a8,
+	&pci_dev_info_14e4_16c6,
+	&pci_dev_info_14e4_16c7,
+	&pci_dev_info_14e4_4210,
+	&pci_dev_info_14e4_4211,
 	&pci_dev_info_14e4_4212,
+	&pci_dev_info_14e4_4301,
+	&pci_dev_info_14e4_4401,
+	&pci_dev_info_14e4_4402,
+	&pci_dev_info_14e4_4410,
+	&pci_dev_info_14e4_4411,
+	&pci_dev_info_14e4_4412,
 	&pci_dev_info_14e4_5820,
 	&pci_dev_info_14e4_5821,
 	NULL
@@ -65431,7 +69677,15 @@ static const pciDeviceInfo *pci_dev_list_1522[] = {
 };
 #endif
 #define pci_dev_list_1523 NULL
-#define pci_dev_list_1524 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_1524[] = {
+	&pci_dev_info_1524_1211,
+	&pci_dev_info_1524_1225,
+	&pci_dev_info_1524_1410,
+	&pci_dev_info_1524_1420,
+	NULL
+};
+#endif
 #define pci_dev_list_1525 NULL
 #define pci_dev_list_1526 NULL
 #define pci_dev_list_1527 NULL
@@ -65461,7 +69715,13 @@ static const pciDeviceInfo *pci_dev_list_1522[] = {
 #define pci_dev_list_1540 NULL
 #define pci_dev_list_1541 NULL
 #define pci_dev_list_1542 NULL
-#define pci_dev_list_1543 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_1543[] = {
+	&pci_dev_info_1543_3052,
+	&pci_dev_info_1543_4c22,
+	NULL
+};
+#endif
 #define pci_dev_list_1544 NULL
 #define pci_dev_list_1545 NULL
 #define pci_dev_list_1546 NULL
@@ -65750,11 +70010,32 @@ static const pciDeviceInfo *pci_dev_list_1638[] = {
 	NULL
 };
 #endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_163c[] = {
+	&pci_dev_info_163c_5449,
+	NULL
+};
+#endif
 #define pci_dev_list_1657 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_165a[] = {
+	&pci_dev_info_165a_c100,
+	&pci_dev_info_165a_d200,
+	&pci_dev_info_165a_d300,
+	NULL
+};
+#endif
 #define pci_dev_list_165d NULL
 #define pci_dev_list_1661 NULL
 #define pci_dev_list_1668 NULL
-#define pci_dev_list_16ab NULL
+#define pci_dev_list_1681 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_16ab[] = {
+	&pci_dev_info_16ab_1102,
+	NULL
+};
+#endif
+#define pci_dev_list_16be NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_16ec[] = {
 	&pci_dev_info_16ec_3685,
@@ -65762,8 +70043,10 @@ static const pciDeviceInfo *pci_dev_list_16ec[] = {
 };
 #endif
 #define pci_dev_list_16f6 NULL
+#define pci_dev_list_1705 NULL
 #define pci_dev_list_170b NULL
 #define pci_dev_list_170c NULL
+#define pci_dev_list_172a NULL
 #define pci_dev_list_1737 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_173b[] = {
@@ -65780,6 +70063,7 @@ static const pciDeviceInfo *pci_dev_list_1743[] = {
 #endif
 #define pci_dev_list_174b NULL
 #define pci_dev_list_175e NULL
+#define pci_dev_list_1787 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_1796[] = {
 	&pci_dev_info_1796_0001,
@@ -65791,7 +70075,32 @@ static const pciDeviceInfo *pci_dev_list_1796[] = {
 	NULL
 };
 #endif
-#define pci_dev_list_1813 NULL
+#define pci_dev_list_1799 NULL
+#define pci_dev_list_17af NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_17cc[] = {
+	&pci_dev_info_17cc_2280,
+	NULL
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_1813[] = {
+	&pci_dev_info_1813_4000,
+	&pci_dev_info_1813_4100,
+	NULL
+};
+#endif
+#define pci_dev_list_1851 NULL
+#define pci_dev_list_1852 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_1888[] = {
+	&pci_dev_info_1888_0301,
+	&pci_dev_info_1888_0601,
+	&pci_dev_info_1888_0710,
+	&pci_dev_info_1888_0720,
+	NULL
+};
+#endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_1a08[] = {
 	&pci_dev_info_1a08_0000,
@@ -65820,7 +70129,10 @@ static const pciDeviceInfo *pci_dev_list_1de1[] = {
 	NULL
 };
 #endif
+#define pci_dev_list_2000 NULL
 #define pci_dev_list_2001 NULL
+#define pci_dev_list_2003 NULL
+#define pci_dev_list_2004 NULL
 #define pci_dev_list_21c3 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_2348[] = {
@@ -65837,6 +70149,8 @@ static const pciDeviceInfo *pci_dev_list_2348[] = {
 #define pci_dev_list_3142 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_3388[] = {
+	&pci_dev_info_3388_0013,
+	&pci_dev_info_3388_0014,
 	&pci_dev_info_3388_0021,
 	&pci_dev_info_3388_8011,
 	&pci_dev_info_3388_8012,
@@ -65896,7 +70210,12 @@ static const pciDeviceInfo *pci_dev_list_416c[] = {
 	NULL
 };
 #endif
-#define pci_dev_list_4444 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_4444[] = {
+	&pci_dev_info_4444_0803,
+	NULL
+};
+#endif
 #define pci_dev_list_4468 NULL
 #define pci_dev_list_4594 NULL
 #define pci_dev_list_45fb NULL
@@ -65969,6 +70288,7 @@ static const pciDeviceInfo *pci_dev_list_5145[] = {
 	NULL
 };
 #endif
+#define pci_dev_list_5168 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_5301[] = {
 	&pci_dev_info_5301_0001,
@@ -66052,6 +70372,7 @@ static const pciDeviceInfo *pci_dev_list_5333[] = {
 	&pci_dev_info_5333_8c2f,
 	&pci_dev_info_5333_8d01,
 	&pci_dev_info_5333_8d02,
+	&pci_dev_info_5333_8d03,
 	&pci_dev_info_5333_8d04,
 	&pci_dev_info_5333_9102,
 	&pci_dev_info_5333_ca00,
@@ -66077,6 +70398,7 @@ static const pciDeviceInfo *pci_dev_list_5555[] = {
 	NULL
 };
 #endif
+#define pci_dev_list_5654 NULL
 #define pci_dev_list_5700 NULL
 #define pci_dev_list_6356 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -66148,6 +70470,7 @@ static const pciDeviceInfo *pci_dev_list_8086[] = {
 	&pci_dev_info_8086_103c,
 	&pci_dev_info_8086_103d,
 	&pci_dev_info_8086_103e,
+	&pci_dev_info_8086_1040,
 	&pci_dev_info_8086_1059,
 	&pci_dev_info_8086_1130,
 	&pci_dev_info_8086_1131,
@@ -66265,11 +70588,15 @@ static const pciDeviceInfo *pci_dev_list_8086[] = {
 	&pci_dev_info_8086_2560,
 	&pci_dev_info_8086_2561,
 	&pci_dev_info_8086_2562,
+	&pci_dev_info_8086_2570,
+	&pci_dev_info_8086_2572,
 	&pci_dev_info_8086_3092,
 	&pci_dev_info_8086_3575,
 	&pci_dev_info_8086_3576,
 	&pci_dev_info_8086_3577,
 	&pci_dev_info_8086_3578,
+	&pci_dev_info_8086_3580,
+	&pci_dev_info_8086_3582,
 	&pci_dev_info_8086_5200,
 	&pci_dev_info_8086_5201,
 	&pci_dev_info_8086_530d,
@@ -66506,6 +70833,7 @@ static const pciDeviceInfo *pci_dev_list_9710[] = {
 #define pci_dev_list_aa42 NULL
 #define pci_dev_list_ac1e NULL
 #define pci_dev_list_b1b3 NULL
+#define pci_dev_list_bd11 NULL
 #define pci_dev_list_c001 NULL
 #define pci_dev_list_c0a9 NULL
 #define pci_dev_list_c0de NULL
@@ -66516,6 +70844,7 @@ static const pciDeviceInfo *pci_dev_list_9710[] = {
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_cddd[] = {
 	&pci_dev_info_cddd_0101,
+	&pci_dev_info_cddd_0200,
 	NULL
 };
 #endif
@@ -66543,6 +70872,14 @@ static const pciDeviceInfo *pci_dev_list_e159[] = {
 #endif
 #define pci_dev_list_e4bf NULL
 #define pci_dev_list_ea01 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_ea60[] = {
+	&pci_dev_info_ea60_9896,
+	&pci_dev_info_ea60_9897,
+	&pci_dev_info_ea60_9898,
+	NULL
+};
+#endif
 #define pci_dev_list_eabb NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_eace[] = {
@@ -66566,7 +70903,18 @@ static const pciDeviceInfo *pci_dev_list_ec80[] = {
 	NULL
 };
 #endif
-#define pci_dev_list_ecc0 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_ecc0[] = {
+	&pci_dev_info_ecc0_0050,
+	&pci_dev_info_ecc0_0051,
+	&pci_dev_info_ecc0_0060,
+	&pci_dev_info_ecc0_0070,
+	&pci_dev_info_ecc0_0071,
+	&pci_dev_info_ecc0_0072,
+	&pci_dev_info_ecc0_0080,
+	NULL
+};
+#endif
 static const pciDeviceInfo *pci_dev_list_edd8[] = {
 	&pci_dev_info_edd8_a091,
 	&pci_dev_info_edd8_a099,
@@ -66576,6 +70924,7 @@ static const pciDeviceInfo *pci_dev_list_edd8[] = {
 };
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_f1d0[] = {
+	&pci_dev_info_f1d0_cafe,
 	&pci_dev_info_f1d0_efac,
 	&pci_dev_info_f1d0_facd,
 	NULL
@@ -66583,19 +70932,20 @@ static const pciDeviceInfo *pci_dev_list_f1d0[] = {
 #endif
 #define pci_dev_list_fa57 NULL
 #define pci_dev_list_febd NULL
-#define pci_dev_list_feda NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
-static const pciDeviceInfo *pci_dev_list_fffe[] = {
-	&pci_dev_info_fffe_0710,
+static const pciDeviceInfo *pci_dev_list_feda[] = {
+	&pci_dev_info_feda_a0fa,
+	&pci_dev_info_feda_a10e,
 	NULL
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
-static const pciDeviceInfo *pci_dev_list_ffff[] = {
-	&pci_dev_info_ffff_0c30,
+static const pciDeviceInfo *pci_dev_list_fffe[] = {
+	&pci_dev_info_fffe_0710,
 	NULL
 };
 #endif
+#define pci_dev_list_ffff NULL
 
 static const pciVendorInfo pciVendorInfoList[] = {
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -66609,6 +70959,9 @@ static const pciVendorInfo pciVendorInfoList[] = {
 #endif
 	{0x003d, pci_vendor_003d, pci_dev_list_003d},
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x0059, pci_vendor_0059, pci_dev_list_0059},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x0070, pci_vendor_0070, pci_dev_list_0070},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -66761,9 +71114,7 @@ static const pciVendorInfo pciVendorInfoList[] = {
 #ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x103b, pci_vendor_103b, pci_dev_list_103b},
 #endif
-#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x103c, pci_vendor_103c, pci_dev_list_103c},
-#endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x103e, pci_vendor_103e, pci_dev_list_103e},
 #endif
@@ -71087,9 +75438,15 @@ static const pciVendorInfo pciVendorInfoList[] = {
 	{0x1638, pci_vendor_1638, pci_dev_list_1638},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x163c, pci_vendor_163c, pci_dev_list_163c},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x1657, pci_vendor_1657, pci_dev_list_1657},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x165a, pci_vendor_165a, pci_dev_list_165a},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x165d, pci_vendor_165d, pci_dev_list_165d},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -71099,21 +75456,33 @@ static const pciVendorInfo pciVendorInfoList[] = {
 	{0x1668, pci_vendor_1668, pci_dev_list_1668},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x1681, pci_vendor_1681, pci_dev_list_1681},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x16ab, pci_vendor_16ab, pci_dev_list_16ab},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x16be, pci_vendor_16be, pci_dev_list_16be},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x16ec, pci_vendor_16ec, pci_dev_list_16ec},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x16f6, pci_vendor_16f6, pci_dev_list_16f6},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x1705, pci_vendor_1705, pci_dev_list_1705},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x170b, pci_vendor_170b, pci_dev_list_170b},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x170c, pci_vendor_170c, pci_dev_list_170c},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x172a, pci_vendor_172a, pci_dev_list_172a},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x1737, pci_vendor_1737, pci_dev_list_1737},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -71129,12 +75498,33 @@ static const pciVendorInfo pciVendorInfoList[] = {
 	{0x175e, pci_vendor_175e, pci_dev_list_175e},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x1787, pci_vendor_1787, pci_dev_list_1787},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x1796, pci_vendor_1796, pci_dev_list_1796},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x1799, pci_vendor_1799, pci_dev_list_1799},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x17af, pci_vendor_17af, pci_dev_list_17af},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x17cc, pci_vendor_17cc, pci_dev_list_17cc},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x1813, pci_vendor_1813, pci_dev_list_1813},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x1851, pci_vendor_1851, pci_dev_list_1851},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x1852, pci_vendor_1852, pci_dev_list_1852},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x1888, pci_vendor_1888, pci_dev_list_1888},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x1a08, pci_vendor_1a08, pci_dev_list_1a08},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -71150,9 +75540,18 @@ static const pciVendorInfo pciVendorInfoList[] = {
 	{0x1de1, pci_vendor_1de1, pci_dev_list_1de1},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x2000, pci_vendor_2000, pci_dev_list_2000},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x2001, pci_vendor_2001, pci_dev_list_2001},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x2003, pci_vendor_2003, pci_dev_list_2003},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x2004, pci_vendor_2004, pci_dev_list_2004},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x21c3, pci_vendor_21c3, pci_dev_list_21c3},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -71267,6 +75666,9 @@ static const pciVendorInfo pciVendorInfoList[] = {
 	{0x5145, pci_vendor_5145, pci_dev_list_5145},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x5168, pci_vendor_5168, pci_dev_list_5168},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x5301, pci_vendor_5301, pci_dev_list_5301},
 #endif
 	{0x5333, pci_vendor_5333, pci_dev_list_5333},
@@ -71286,6 +75688,9 @@ static const pciVendorInfo pciVendorInfoList[] = {
 	{0x5555, pci_vendor_5555, pci_dev_list_5555},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x5654, pci_vendor_5654, pci_dev_list_5654},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x5700, pci_vendor_5700, pci_dev_list_5700},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -71380,6 +75785,9 @@ static const pciVendorInfo pciVendorInfoList[] = {
 	{0xb1b3, pci_vendor_b1b3, pci_dev_list_b1b3},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0xbd11, pci_vendor_bd11, pci_dev_list_bd11},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0xc001, pci_vendor_c001, pci_dev_list_c001},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -71428,6 +75836,9 @@ static const pciVendorInfo pciVendorInfoList[] = {
 	{0xea01, pci_vendor_ea01, pci_dev_list_ea01},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0xea60, pci_vendor_ea60, pci_dev_list_ea60},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0xeabb, pci_vendor_eabb, pci_dev_list_eabb},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -71474,6 +75885,9 @@ static const pciVendorSubsysInfo pciVendorSubsysInfoList[] = {
 #endif
 	{0x003d, pci_vendor_003d, pci_ss_list_003d},
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x0059, pci_vendor_0059, pci_ss_list_0059},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x0070, pci_vendor_0070, pci_ss_list_0070},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -71626,9 +76040,7 @@ static const pciVendorSubsysInfo pciVendorSubsysInfoList[] = {
 #ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x103b, pci_vendor_103b, pci_ss_list_103b},
 #endif
-#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x103c, pci_vendor_103c, pci_ss_list_103c},
-#endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x103e, pci_vendor_103e, pci_ss_list_103e},
 #endif
@@ -75952,9 +80364,15 @@ static const pciVendorSubsysInfo pciVendorSubsysInfoList[] = {
 	{0x1638, pci_vendor_1638, pci_ss_list_1638},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x163c, pci_vendor_163c, pci_ss_list_163c},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x1657, pci_vendor_1657, pci_ss_list_1657},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x165a, pci_vendor_165a, pci_ss_list_165a},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x165d, pci_vendor_165d, pci_ss_list_165d},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -75964,21 +80382,33 @@ static const pciVendorSubsysInfo pciVendorSubsysInfoList[] = {
 	{0x1668, pci_vendor_1668, pci_ss_list_1668},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x1681, pci_vendor_1681, pci_ss_list_1681},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x16ab, pci_vendor_16ab, pci_ss_list_16ab},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x16be, pci_vendor_16be, pci_ss_list_16be},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x16ec, pci_vendor_16ec, pci_ss_list_16ec},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x16f6, pci_vendor_16f6, pci_ss_list_16f6},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x1705, pci_vendor_1705, pci_ss_list_1705},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x170b, pci_vendor_170b, pci_ss_list_170b},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x170c, pci_vendor_170c, pci_ss_list_170c},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x172a, pci_vendor_172a, pci_ss_list_172a},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x1737, pci_vendor_1737, pci_ss_list_1737},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -75994,12 +80424,33 @@ static const pciVendorSubsysInfo pciVendorSubsysInfoList[] = {
 	{0x175e, pci_vendor_175e, pci_ss_list_175e},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x1787, pci_vendor_1787, pci_ss_list_1787},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x1796, pci_vendor_1796, pci_ss_list_1796},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x1799, pci_vendor_1799, pci_ss_list_1799},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x17af, pci_vendor_17af, pci_ss_list_17af},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x17cc, pci_vendor_17cc, pci_ss_list_17cc},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x1813, pci_vendor_1813, pci_ss_list_1813},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x1851, pci_vendor_1851, pci_ss_list_1851},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x1852, pci_vendor_1852, pci_ss_list_1852},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x1888, pci_vendor_1888, pci_ss_list_1888},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x1a08, pci_vendor_1a08, pci_ss_list_1a08},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -76015,9 +80466,18 @@ static const pciVendorSubsysInfo pciVendorSubsysInfoList[] = {
 	{0x1de1, pci_vendor_1de1, pci_ss_list_1de1},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x2000, pci_vendor_2000, pci_ss_list_2000},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x2001, pci_vendor_2001, pci_ss_list_2001},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x2003, pci_vendor_2003, pci_ss_list_2003},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x2004, pci_vendor_2004, pci_ss_list_2004},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x21c3, pci_vendor_21c3, pci_ss_list_21c3},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -76132,6 +80592,9 @@ static const pciVendorSubsysInfo pciVendorSubsysInfoList[] = {
 	{0x5145, pci_vendor_5145, pci_ss_list_5145},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x5168, pci_vendor_5168, pci_ss_list_5168},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x5301, pci_vendor_5301, pci_ss_list_5301},
 #endif
 	{0x5333, pci_vendor_5333, pci_ss_list_5333},
@@ -76151,6 +80614,9 @@ static const pciVendorSubsysInfo pciVendorSubsysInfoList[] = {
 	{0x5555, pci_vendor_5555, pci_ss_list_5555},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x5654, pci_vendor_5654, pci_ss_list_5654},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x5700, pci_vendor_5700, pci_ss_list_5700},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -76245,6 +80711,9 @@ static const pciVendorSubsysInfo pciVendorSubsysInfoList[] = {
 	{0xb1b3, pci_vendor_b1b3, pci_ss_list_b1b3},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0xbd11, pci_vendor_bd11, pci_ss_list_bd11},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0xc001, pci_vendor_c001, pci_ss_list_c001},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -76293,6 +80762,9 @@ static const pciVendorSubsysInfo pciVendorSubsysInfoList[] = {
 	{0xea01, pci_vendor_ea01, pci_ss_list_ea01},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0xea60, pci_vendor_ea60, pci_ss_list_ea60},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0xeabb, pci_vendor_eabb, pci_ss_list_eabb},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
diff --git a/xc/programs/Xserver/hw/xfree86/sdk/Imakefile b/xc/programs/Xserver/hw/xfree86/sdk/Imakefile
index 2a9bfbd1e..e8ee284c8 100644
--- a/xc/programs/Xserver/hw/xfree86/sdk/Imakefile
+++ b/xc/programs/Xserver/hw/xfree86/sdk/Imakefile
@@ -1,4 +1,6 @@
-XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/sdk/Imakefile,v 1.1 1999/08/14 10:50:08 dawes Exp $
+XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/sdk/Imakefile,v 1.2 2002/11/14 21:01:20 tsi Exp $
+
+#include <lnxdoc.rules>
 
 CppScriptTarget(mkmf,mkmf.cpp,-DCONFIGDIRSPEC=-I$(CONFIGDIR),$(ICONFIGFILES))
 
diff --git a/xc/programs/Xserver/hw/xfree86/shadowfb/shadow.c b/xc/programs/Xserver/hw/xfree86/shadowfb/shadow.c
index 3cc1e6261..946cf16ee 100644
--- a/xc/programs/Xserver/hw/xfree86/shadowfb/shadow.c
+++ b/xc/programs/Xserver/hw/xfree86/shadowfb/shadow.c
@@ -6,7 +6,7 @@
    Pre-fb-write callbacks and RENDER support - Nolan Leake (nolan@vmware.com)
 */
 
-/* $XFree86: xc/programs/Xserver/hw/xfree86/shadowfb/shadow.c,v 1.12 2002/10/17 22:43:01 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/shadowfb/shadow.c,v 1.18 2003/02/21 15:06:19 eich Exp $ */
 
 #include "X.h"
 #include "Xproto.h"
@@ -25,7 +25,7 @@
 #include "shadowfb.h"
 
 #ifdef RENDER
-  #include "picturestr.h"
+# include "picturestr.h"
 #endif
 
 #define MIN(a,b) (((a)<(b))?(a):(b))
@@ -62,7 +62,6 @@ static Bool ShadowModifyPixmapHeader(
 
 static Bool ShadowEnterVT(int index, int flags);
 static void ShadowLeaveVT(int index, int flags);
-static void ShadowEnableDisableFBAccess(int index, Bool enable);
 
 #ifdef RENDER
 static void ShadowComposite(
@@ -79,17 +78,6 @@ static void ShadowComposite(
     CARD16 width,
     CARD16 height
 );
-static void ShadowGlyphs(
-    CARD8 op,
-    PicturePtr pSrc,
-    PicturePtr pDst,
-    PictFormatPtr maskFormat,
-    INT16 xSrc,
-    INT16 ySrc,
-    int nlistInit,
-    GlyphListPtr listInit,
-    GlyphPtr *glyphsInit
-);
 #endif /* RENDER */
 
 
@@ -106,11 +94,9 @@ typedef struct {
   ModifyPixmapHeaderProcPtr		ModifyPixmapHeader;
 #ifdef RENDER
   CompositeProcPtr Composite;
-  GlyphsProcPtr Glyphs;
 #endif /* RENDER */
   Bool				(*EnterVT)(int, int);
   void				(*LeaveVT)(int, int);
-  void				(*EnableDisableFBAccess)(int, Bool);
   Bool				vtSema;
 } ShadowScreenRec, *ShadowScreenPtr;
 
@@ -188,8 +174,7 @@ Bool
 ShadowFBInit2 (
     ScreenPtr		pScreen,
     RefreshAreaFuncPtr  preRefreshArea,
-    RefreshAreaFuncPtr  postRefreshArea,
-    Bool                fbIsVirtual
+    RefreshAreaFuncPtr  postRefreshArea
 ){
     ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
     ShadowScreenPtr pPriv;
@@ -229,7 +214,6 @@ ShadowFBInit2 (
 
     pPriv->EnterVT = pScrn->EnterVT;
     pPriv->LeaveVT = pScrn->LeaveVT;
-    pPriv->EnableDisableFBAccess = pScrn->EnableDisableFBAccess;
 
     pScreen->CloseScreen = ShadowCloseScreen;
     pScreen->PaintWindowBackground = ShadowPaintWindow;
@@ -241,15 +225,11 @@ ShadowFBInit2 (
 
     pScrn->EnterVT = ShadowEnterVT;
     pScrn->LeaveVT = ShadowLeaveVT;
-    if(fbIsVirtual)
-        pScrn->EnableDisableFBAccess = ShadowEnableDisableFBAccess;
 
 #ifdef RENDER
     if(ps) {
       pPriv->Composite = ps->Composite;
       ps->Composite = ShadowComposite;
-      pPriv->Glyphs = ps->Glyphs;
-      ps->Glyphs = ShadowGlyphs;
     }
 #endif /* RENDER */
 
@@ -261,7 +241,7 @@ ShadowFBInit (
     ScreenPtr		pScreen,
     RefreshAreaFuncPtr  refreshArea
 ){
-    return ShadowFBInit2(pScreen, NULL, refreshArea, TRUE);
+    return ShadowFBInit2(pScreen, NULL, refreshArea);
 }
 
 /**********************************************************/
@@ -290,16 +270,6 @@ ShadowLeaveVT(int index, int flags)
     (*pPriv->LeaveVT)(index, flags);
 }
 
-static void
-ShadowEnableDisableFBAccess(int index, Bool enable)
-{
-    /*
-     * if fbIsVirtual == TRUE was passed to ShadowFBInit2, then
-     * this wrapper is installed, and eats any calls.
-     */
-}
-
-
 /**********************************************************/
 
 
@@ -322,12 +292,10 @@ ShadowCloseScreen (int i, ScreenPtr pScreen)
 
     pScrn->EnterVT = pPriv->EnterVT;
     pScrn->LeaveVT = pPriv->LeaveVT;
-    pScrn->EnableDisableFBAccess = pPriv->EnableDisableFBAccess;
 
 #ifdef RENDER
     if(ps) {
         ps->Composite = pPriv->Composite;
-        ps->Glyphs = pPriv->Glyphs;
     }
 #endif /* RENDER */
 
@@ -493,14 +461,18 @@ ShadowComposite(
     ShadowScreenPtr pPriv = GET_SCREEN_PRIVATE(pScreen);
     PictureScreenPtr ps = GetPictureScreen(pScreen);
     BoxRec box;
+    Bool boxNotEmpty = FALSE;
 
     box.x1 = pDst->pDrawable->x + xDst;
     box.y1 = pDst->pDrawable->y + yDst;
     box.x2 = box.x1 + width;
     box.y2 = box.y1 + height;
 
-    if (pPriv->preRefresh) {
-        (*pPriv->preRefresh)(pPriv->pScrn, 1, &box);
+    if (pPriv->vtSema
+	&& pDst->pDrawable->type == DRAWABLE_WINDOW && BOX_NOT_EMPTY(box)) {
+        if (pPriv->preRefresh)
+            (*pPriv->preRefresh)(pPriv->pScrn, 1, &box);
+        boxNotEmpty = TRUE;
     }
     
     ps->Composite = pPriv->Composite;
@@ -508,84 +480,10 @@ ShadowComposite(
 		     xMask, yMask, xDst, yDst, width, height);
     ps->Composite = ShadowComposite;
 
-    if (pPriv->postRefresh) {
+    if (pPriv->postRefresh && boxNotEmpty) {
         (*pPriv->postRefresh)(pPriv->pScrn, 1, &box);
     }
 }
-
-static void
-ShadowGlyphs(
-    CARD8 op,
-    PicturePtr pSrc,
-    PicturePtr pDst,
-    PictFormatPtr maskFormat,
-    INT16 xSrc,
-    INT16 ySrc,
-    int nlistInit,
-    GlyphListPtr listInit,
-    GlyphPtr *glyphsInit
-){
-    ScreenPtr pScreen = pDst->pDrawable->pScreen;
-    ShadowScreenPtr pPriv = GET_SCREEN_PRIVATE(pScreen);
-    PictureScreenPtr ps = GetPictureScreen(pScreen);
-    int nlist = nlistInit;
-    GlyphListPtr list = listInit;
-    GlyphPtr *glyphs = glyphsInit;
-    int x, y;
-    int n;
-    GlyphPtr glyph;
-    RegionRec region;
-    int num = 0;
-
-    if (pPriv->vtSema && pDst->pDrawable->type == DRAWABLE_WINDOW) {
-        REGION_INIT(pScreen, &region, NullBox, 0);
-        
-	x = xSrc;
-	y = ySrc;
-	while (nlist--) {
-	    x += list->xOff;
-	    y += list->yOff;
-	    n = list->len;
-	    while (n--) {
-	        BoxRec box;
-		RegionRec tmpRegion;
-		
-		glyph = *glyphs++;
-
-		box.x1 = pDst->pDrawable->x + x - glyph->info.x;
-		box.y1 = pDst->pDrawable->y + y - glyph->info.y;
-		box.x2 = box.x1 + glyph->info.width;
-		box.y2 = box.y1 + glyph->info.height;		
-		REGION_INIT(pScreen, &tmpRegion, &box, 1);
-		REGION_UNION(pScreen, &region, &region, &tmpRegion);
-		REGION_UNINIT(pScreen, &tmpRegion);
-
-		x += glyph->info.xOff;
-		y += glyph->info.yOff;
-	    }
-	    list++;
-	}
-	
-        if ((num = REGION_NUM_RECTS(&region))) {
-            if(pPriv->preRefresh)
-                (*pPriv->preRefresh)(pPriv->pScrn, num, REGION_RECTS(&region));
-        } else {
-            REGION_UNINIT(pScreen, &region);
-        }
-    }
-
-    ps->Glyphs = pPriv->Glyphs;
-    (*ps->Glyphs)(op, pSrc, pDst, maskFormat, xSrc, ySrc,
-		  nlistInit, listInit, glyphsInit);
-    ps->Composite = ShadowComposite;
-
-    if (num) {
-        if (pPriv->postRefresh)
-            (*pPriv->postRefresh)(pPriv->pScrn, num, REGION_RECTS(&region));
-        REGION_UNINIT(pScreen, &region);
-    }
-
-}
 #endif /* RENDER */
 
 /**********************************************************/
@@ -775,7 +673,6 @@ ShadowSetSpans(
 	BoxRec box;
         Bool boxNotEmpty = FALSE;
 
-
 	box.x1 = ppt->x;
 	box.x2 = box.x1 + *pwidth;
 	box.y2 = box.y1 = ppt->y;
@@ -947,7 +844,7 @@ ShadowPolyPoint(
     if(IS_VISIBLE(pDraw) && nptInit) {
         xPoint *ppt = pptInit;
         int npt = nptInit;
-        
+
 	box.x2 = box.x1 = pptInit->x;
 	box.y2 = box.y1 = pptInit->y;
 
@@ -1072,7 +969,7 @@ ShadowPolySegment(
 	int extra = pGC->lineWidth;
         xSegment *pSeg = pSegInit;
         int nseg = nsegInit;
-        
+
         if(pGC->capStyle != CapProjecting)	
 	   extra >>= 1;
 
@@ -1344,7 +1241,7 @@ ShadowFillPolygon(
 	int i = count;
 	BoxRec box;
         Bool boxNotEmpty = FALSE;
-        
+
 	box.x2 = box.x1 = ppt->x;
 	box.y2 = box.y1 = ppt->y;
 
@@ -1457,7 +1354,7 @@ ShadowPolyFillArc(
     if(IS_VISIBLE(pDraw) && narcsInit) {
         xArc *parcs = parcsInit;
         int narcs = narcsInit;
-        
+
 	box.x1 = parcs->x;
 	box.x2 = box.x1 + parcs->width;
 	box.y1 = parcs->y;
@@ -1822,6 +1719,7 @@ ShadowPolyGlyphBlt(
     if(IS_VISIBLE(pDraw) && nglyphInit) {
         CharInfoPtr *ppci = ppciInit;
         unsigned int nglyph = nglyphInit;
+
 	/* ugh */
 	box.x1 = pDraw->x + x + ppci[0]->metrics.leftSideBearing;
 	box.x2 = pDraw->x + x + ppci[nglyph - 1]->metrics.rightSideBearing;
diff --git a/xc/programs/Xserver/hw/xfree86/shadowfb/shadowfb.h b/xc/programs/Xserver/hw/xfree86/shadowfb/shadowfb.h
index 278b6dd19..d028980bd 100644
--- a/xc/programs/Xserver/hw/xfree86/shadowfb/shadowfb.h
+++ b/xc/programs/Xserver/hw/xfree86/shadowfb/shadowfb.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/shadowfb/shadowfb.h,v 1.3 2002/10/16 22:12:54 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/shadowfb/shadowfb.h,v 1.4 2003/02/18 19:10:35 alanh Exp $ */
 
 #ifndef _SHADOWFB_H
 #define _SHADOWFB_H
@@ -30,9 +30,7 @@ ShadowFBInit (
  * ShadowFBInit2 is a more featureful refinement of the original shadowfb.
  * ShadowFBInit2 allows you to specify two callbacks, one to be called
  * immediately before an operation that modifies the framebuffer, and another
- * to be called immediately after.  It also allows you to specify that you
- * actually do have a real framebuffer (as opposed to just some malloc'd space
- * in memory) by passing FALSE to fbIsVirtual.
+ * to be called immediately after.  
  *
  * Returns FALSE in the event of an error
  */
@@ -40,8 +38,7 @@ Bool
 ShadowFBInit2 (
     ScreenPtr		pScreen,
     RefreshAreaFuncPtr  preRefreshArea,
-    RefreshAreaFuncPtr  postRefreshArea,
-    Bool                fbIsVirtual
+    RefreshAreaFuncPtr  postRefreshArea
 );
 
 #endif /* _SHADOWFB_H */
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/vbe/Imakefile b/xc/programs/Xserver/hw/xfree86/vbe/Imakefile
index 90f08834c..bcc0988f2 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/vbe/Imakefile
+++ b/xc/programs/Xserver/hw/xfree86/vbe/Imakefile
@@ -1,4 +1,4 @@
-XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/vbe/Imakefile,v 1.11 2002/08/06 13:46:27 dawes Exp $
+XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/vbe/Imakefile,v 1.1 2003/02/17 17:06:45 dawes Exp $
 
 
 /*
@@ -21,19 +21,13 @@ INCLUDES = -I. -I$(XF86COMSRC) -I$(SERVERSRC)/mi \
 	   -I$(XF86SRC)/int10 -I$(XF86SRC)/ddc \
 	   -I$(XF86SRC)/i2c
 
-ModuleObjectRule()
+DEFINES = 
 
-#if DoLoadableServer
+ModuleObjectRule()
 
 LibraryModuleTarget(vbe, $(OBJS))
 InstallLibraryModule(vbe,$(MODULEDIR),.)
 
-#else
-
-SubdirLibraryRule($(OBJS))
-
-#endif
-
 DependTarget()
 
 InstallDriverSDKLibraryModule(vbe,$(DRIVERSDKMODULEDIR),.)
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/vbe/vbe.c b/xc/programs/Xserver/hw/xfree86/vbe/vbe.c
index cc9336ed0..18e8032e1 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/vbe/vbe.c
+++ b/xc/programs/Xserver/hw/xfree86/vbe/vbe.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/vbe/vbe.c,v 1.22 2002/09/16 18:06:15 eich Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/vbe/vbe.c,v 1.1 2003/02/17 17:06:45 dawes Exp $ */
 
 /*
  *                   XFree86 vbe module
@@ -30,6 +30,7 @@
 #define L_ADD(x)  (B_O32(x) & 0xffff) + ((B_O32(x) >> 12) & 0xffff00)
 
 #define FARP(p)		(((unsigned)(p & 0xffff0000) >> 12) | (p & 0xffff))
+#define R16(v)		((v) & 0xffff)
 
 static unsigned char * vbeReadEDID(vbeInfoPtr pVbe);
 static Bool vbeProbeDDC(vbeInfoPtr pVbe);
@@ -39,6 +40,8 @@ const char *vbe_ddcSymbols[] = {
     NULL
 };
 
+static const char vbeVersionString[] = "VBE2";
+
 vbeInfoPtr
 VBEInit(xf86Int10InfoPtr pInt, int entityIndex)
 {
@@ -52,7 +55,6 @@ VBEExtendedInit(xf86Int10InfoPtr pInt, int entityIndex, int Flags)
     pointer page = NULL;
     ScrnInfoPtr pScrn = xf86FindScreenForEntity(entityIndex);
     vbeControllerInfoPtr vbe = NULL;
-    char vbeVersionString[] = "VBE2";
     Bool init_int10 = FALSE;
     vbeInfoPtr vip = NULL;
     int screen = pScrn->scrnIndex;
@@ -62,7 +64,7 @@ VBEExtendedInit(xf86Int10InfoPtr pInt, int entityIndex, int Flags)
 	    goto error;
 
 	xf86DrvMsg(screen,X_INFO,"initializing int10\n");
-	pInt = xf86ExtendedInitInt10(entityIndex, Flags);
+	pInt = xf86InitInt10(entityIndex);
 	if (!pInt)
 	    goto error;
 	init_int10 = TRUE;
@@ -263,10 +265,14 @@ vbeReadEDID(vbeInfoPtr pVbe)
     if (novbe || noddc) return NULL;
     
     if (!vbeProbeDDC(pVbe)) goto error;
-    
+
+    memset(page,0,sizeof(vbeInfoPtr));
+    strcpy(page,vbeVersionString);
+
     pVbe->pInt10->ax = 0x4F15;
     pVbe->pInt10->bx = 0x01;
     pVbe->pInt10->cx = 0;
+    pVbe->pInt10->dx = 0;
     pVbe->pInt10->es = SEG_ADDR(RealOff);
     pVbe->pInt10->di = SEG_OFF(RealOff);
     pVbe->pInt10->num = 0x10;
@@ -361,7 +367,7 @@ VBEGetVBEInfo(vbeInfoPtr pVbe)
     pVbe->pInt10->di = SEG_OFF(pVbe->real_mode_base);
     xf86ExecX86int10(pVbe->pInt10);
 
-    if (pVbe->pInt10->ax != 0x4f)
+    if (R16(pVbe->pInt10->ax) != 0x4f)
 	return (NULL);
 
     block = xcalloc(sizeof(VbeInfoBlock), 1);
@@ -461,7 +467,7 @@ VBESetVBEMode(vbeInfoPtr pVbe, int mode, VbeCRTCInfoBlock *block)
 
     xf86ExecX86int10(pVbe->pInt10);
 
-    return (pVbe->pInt10->ax == 0x4f);
+    return (R16(pVbe->pInt10->ax) == 0x4f);
 }
 
 Bool
@@ -482,8 +488,8 @@ VBEGetVBEMode(vbeInfoPtr pVbe, int *mode)
 
     xf86ExecX86int10(pVbe->pInt10);
 
-    if (pVbe->pInt10->ax == 0x4f) {
-	*mode = pVbe->pInt10->bx;
+    if (R16(pVbe->pInt10->ax) == 0x4f) {
+	*mode = R16(pVbe->pInt10->bx);
 
 	return (TRUE);
     }
@@ -516,7 +522,7 @@ VBEGetModeInfo(vbeInfoPtr pVbe, int mode)
     pVbe->pInt10->es = SEG_ADDR(pVbe->real_mode_base);
     pVbe->pInt10->di = SEG_OFF(pVbe->real_mode_base);
     xf86ExecX86int10(pVbe->pInt10);
-    if (pVbe->pInt10->ax != 0x4f)
+    if (R16(pVbe->pInt10->ax) != 0x4f)
 	return (NULL);
 
     block = xcalloc(sizeof(VbeModeInfoBlock), 1);
@@ -648,11 +654,11 @@ VBESaveRestore(vbeInfoPtr pVbe, vbeSaveRestoreFunction function,
 	    pVbe->pInt10->dx = 0;
 	    pVbe->pInt10->cx = 0x000f;
 	    xf86ExecX86int10(pVbe->pInt10);
-	    if (pVbe->pInt10->ax != 0x4f)
+	    if (R16(pVbe->pInt10->ax) != 0x4f)
 	        return (FALSE);
 
 	    if (function == MODE_SAVE) {
-	        int npages = (pVbe->pInt10->bx * 64) / 4096 + 1;
+	        int npages = (R16(pVbe->pInt10->bx) * 64) / 4096 + 1;
 		if ((*memory = xf86Int10AllocPages(pVbe->pInt10, npages,
 						   real_mode_pages)) == NULL) {
 		    xf86DrvMsg(screen, X_ERROR,
@@ -684,7 +690,7 @@ VBESaveRestore(vbeInfoPtr pVbe, vbeSaveRestoreFunction function,
 	    pVbe->pInt10->es = SEG_ADDR(*real_mode_pages);
 	    pVbe->pInt10->bx = SEG_OFF(*real_mode_pages);
 	    xf86ExecX86int10(pVbe->pInt10);
-	    return (pVbe->pInt10->ax == 0x4f);
+	    return (R16(pVbe->pInt10->ax) == 0x4f);
 
 	}
     }
@@ -707,7 +713,7 @@ VBEBankSwitch(vbeInfoPtr pVbe, unsigned int iBank, int window)
     pVbe->pInt10->dx = iBank;
     xf86ExecX86int10(pVbe->pInt10);
 
-    if (pVbe->pInt10->ax != 0x4f)
+    if (R16(pVbe->pInt10->ax) != 0x4f)
 	return (FALSE);
 
     return (TRUE);
@@ -746,16 +752,16 @@ VBESetGetLogicalScanlineLength(vbeInfoPtr pVbe, vbeScanwidthCommand command,
 	pVbe->pInt10->cx = width;
     xf86ExecX86int10(pVbe->pInt10);
 
-    if (pVbe->pInt10->ax != 0x4f)
+    if (R16(pVbe->pInt10->ax) != 0x4f)
 	return (FALSE);
 
     if (command == SCANWID_GET || command == SCANWID_GET_MAX) {
 	if (pixels)
-	    *pixels = pVbe->pInt10->cx;
+	    *pixels = R16(pVbe->pInt10->cx);
 	if (bytes)
-	    *bytes = pVbe->pInt10->bx;
+	    *bytes = R16(pVbe->pInt10->bx);
 	if (max)
-	    *max = pVbe->pInt10->dx;
+	    *max = R16(pVbe->pInt10->dx);
     }
 
     return (TRUE);
@@ -771,7 +777,7 @@ VBESetDisplayStart(vbeInfoPtr pVbe, int x, int y, Bool wait_retrace)
     pVbe->pInt10->dx = y;
     xf86ExecX86int10(pVbe->pInt10);
 
-    if (pVbe->pInt10->ax != 0x4f)
+    if (R16(pVbe->pInt10->ax) != 0x4f)
 	return (FALSE);
 
     return (TRUE);
@@ -785,7 +791,7 @@ VBEGetDisplayStart(vbeInfoPtr pVbe, int *x, int *y)
     pVbe->pInt10->bx = 0x01;
     xf86ExecX86int10(pVbe->pInt10);
 
-    if (pVbe->pInt10->ax != 0x4f)
+    if (R16(pVbe->pInt10->ax) != 0x4f)
 	return (FALSE);
 
     *x = pVbe->pInt10->cx;
@@ -818,7 +824,7 @@ VBESetGetDACPaletteFormat(vbeInfoPtr pVbe, int bits)
 	pVbe->pInt10->bx = (bits & 0x00ff) << 8;
     xf86ExecX86int10(pVbe->pInt10);
 
-    if (pVbe->pInt10->ax != 0x4f)
+    if (R16(pVbe->pInt10->ax) != 0x4f)
 	return (0);
 
     return (bits != 0 ? bits : (pVbe->pInt10->bx >> 8) & 0x00ff);
@@ -869,7 +875,7 @@ VBESetGetPaletteData(vbeInfoPtr pVbe, Bool set, int first, int num,
 	memcpy(pVbe->memory, data, num * sizeof(CARD32));
     xf86ExecX86int10(pVbe->pInt10);
 
-    if (pVbe->pInt10->ax != 0x4f)
+    if (R16(pVbe->pInt10->ax) != 0x4f)
 	return (NULL);
 
     if (set)
@@ -906,13 +912,13 @@ VBEGetVBEpmi(vbeInfoPtr pVbe)
     pVbe->pInt10->di = 0;
     xf86ExecX86int10(pVbe->pInt10);
 
-    if (pVbe->pInt10->ax != 0x4f)
+    if (R16(pVbe->pInt10->ax) != 0x4f)
 	return (NULL);
 
     pmi = xalloc(sizeof(VBEpmi));
-    pmi->seg_tbl = pVbe->pInt10->es;
-    pmi->tbl_off = pVbe->pInt10->di;
-    pmi->tbl_len = pVbe->pInt10->cx;
+    pmi->seg_tbl = R16(pVbe->pInt10->es);
+    pmi->tbl_off = R16(pVbe->pInt10->di);
+    pmi->tbl_len = R16(pVbe->pInt10->cx);
 
     return (pmi);
 }
@@ -1025,7 +1031,7 @@ VBEGetPixelClock(vbeInfoPtr pVbe, int mode, int clock)
     pVbe->pInt10->dx = mode;
     xf86ExecX86int10(pVbe->pInt10);
 
-    if (pVbe->pInt10->ax != 0x4f)
+    if (R16(pVbe->pInt10->ax) != 0x4f)
 	return (0);
 
     return (pVbe->pInt10->cx);
@@ -1061,6 +1067,6 @@ VBEDPMSSet(vbeInfoPtr pVbe, int mode)
 	break;
     }
     xf86ExecX86int10(pVbe->pInt10);
-    return (pVbe->pInt10->ax == 0x4f);
+    return (R16(pVbe->pInt10->ax) == 0x4f);
 }
 
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/vbe/vbe.h b/xc/programs/Xserver/hw/xfree86/vbe/vbe.h
index 75758990b..5bca184f5 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/vbe/vbe.h
+++ b/xc/programs/Xserver/hw/xfree86/vbe/vbe.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/vbe/vbe.h,v 1.10 2002/09/17 23:25:46 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/vbe/vbe.h,v 1.1 2003/02/17 17:06:45 dawes Exp $ */
 
 /*
  *                   XFree86 vbe module
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/vbe/vbeModes.c b/xc/programs/Xserver/hw/xfree86/vbe/vbeModes.c
index 9cb247ab9..4d4f1bfac 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/vbe/vbeModes.c
+++ b/xc/programs/Xserver/hw/xfree86/vbe/vbeModes.c
@@ -27,7 +27,7 @@
  *
  * Authors: David Dawes <dawes@xfree86.org>
  *
- * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/vbe/vbeModes.c,v 1.4 2002/10/16 17:51:01 dawes Exp $
+ * $XFree86: xc/programs/Xserver/hw/xfree86/vbe/vbeModes.c,v 1.1 2003/02/17 17:06:45 dawes Exp $
  */
 
 #include "xf86.h"
@@ -134,12 +134,14 @@ CheckMode(ScrnInfoPtr pScrn, vbeInfoPtr pVbe, VbeInfoBlock *vbe, int id,
 	return NULL;
 
     /* Does the mode match the depth/bpp? */
+    /* Some BIOS's set BitsPerPixel to 15 instead of 16 for 15/16 */
     if (VBE_MODE_USABLE(mode, flags) &&
 	((pScrn->bitsPerPixel == 1 && !VBE_MODE_COLOR(mode)) ||
 	 (mode->BitsPerPixel > 8 &&
 	  (mode->RedMaskSize + mode->GreenMaskSize +
 	   mode->BlueMaskSize) == pScrn->depth &&
 	  mode->BitsPerPixel == pScrn->bitsPerPixel) ||
+	 (mode->BitsPerPixel == 15 && pScrn->depth == 15) ||
 	 (mode->BitsPerPixel <= 8 &&
 	  mode->BitsPerPixel == pScrn->bitsPerPixel))) {
 	modeOK = TRUE;
@@ -303,26 +305,62 @@ VBEGetModePool(ScrnInfoPtr pScrn, vbeInfoPtr pVbe, VbeInfoBlock *vbe,
 	    int id = vbe->VideoModePtr[i++];
 
 	    if ((pMode = CheckMode(pScrn, pVbe, vbe, id, modeTypes)) != NULL) {
-		if (p == NULL) {
-		    modePool = pMode;
+		ModeStatus status = MODE_OK;
+
+		/* Check the mode against a specified virtual size (if any) */
+		if (pScrn->display->virtualX > 0 &&
+		    pMode->HDisplay > pScrn->display->virtualX) {
+		    status = MODE_VIRTUAL_X;
+		}
+		if (pScrn->display->virtualY > 0 &&
+		    pMode->VDisplay > pScrn->display->virtualY) {
+		    status = MODE_VIRTUAL_Y;
+		}
+		if (status != MODE_OK) {
+		     xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+				"Not using mode \"%dx%d\" (%s)\n",
+				pMode->HDisplay, pMode->VDisplay,
+				xf86ModeStatusToString(status));
 		} else {
-		    p->next = pMode;
+		    if (p == NULL) {
+			modePool = pMode;
+		    } else {
+			p->next = pMode;
+		    }
+		    pMode->prev = NULL;
+		    p = pMode;
 		}
-		pMode->prev = NULL;
-		p = pMode;
 	    }
 	}
     }
     if (modeTypes & V_MODETYPE_VGA) {
 	for (i = 0; i < 0x7F; i++) {
 	    if ((pMode = CheckMode(pScrn, pVbe, vbe, i, modeTypes)) != NULL) {
-		if (p == NULL) {
-		    modePool = pMode;
+		ModeStatus status = MODE_OK;
+
+		/* Check the mode against a specified virtual size (if any) */
+		if (pScrn->display->virtualX > 0 &&
+		    pMode->HDisplay > pScrn->display->virtualX) {
+		    status = MODE_VIRTUAL_X;
+		}
+		if (pScrn->display->virtualY > 0 &&
+		    pMode->VDisplay > pScrn->display->virtualY) {
+		    status = MODE_VIRTUAL_Y;
+		}
+		if (status != MODE_OK) {
+		     xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+				"Not using mode \"%dx%d\" (%s)\n",
+				pMode->HDisplay, pMode->VDisplay,
+				xf86ModeStatusToString(status));
 		} else {
-		    p->next = pMode;
+		    if (p == NULL) {
+			modePool = pMode;
+		    } else {
+			p->next = pMode;
+		    }
+		    pMode->prev = NULL;
+		    p = pMode;
 		}
-		pMode->prev = NULL;
-		p = pMode;
 	    }
 	}
     }
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/vbe/vbeModes.h b/xc/programs/Xserver/hw/xfree86/vbe/vbeModes.h
index c37cbd8bf..b3c57b917 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/vbe/vbeModes.h
+++ b/xc/programs/Xserver/hw/xfree86/vbe/vbeModes.h
@@ -26,7 +26,7 @@
  *
  * Authors: David Dawes <dawes@xfree86.org>
  *
- * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/vbe/vbeModes.h,v 1.1 2002/08/06 13:46:28 dawes Exp $
+ * $XFree86: xc/programs/Xserver/hw/xfree86/vbe/vbeModes.h,v 1.1 2003/02/17 17:06:46 dawes Exp $
  */
 
 #ifndef _VBE_MODES_H
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/vbe/vbe_module.c b/xc/programs/Xserver/hw/xfree86/vbe/vbe_module.c
index 0347f7fb7..65b161a2c 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/vbe/vbe_module.c
+++ b/xc/programs/Xserver/hw/xfree86/vbe/vbe_module.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/vbe/vbe_module.c,v 1.4 2002/09/16 18:06:15 eich Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/vbe/vbe_module.c,v 1.1 2003/02/17 17:06:46 dawes Exp $ */
 
 #include "xf86.h"
 #include "xf86str.h"
diff --git a/xc/programs/Xserver/hw/xfree86/vgahw/Imakefile b/xc/programs/Xserver/hw/xfree86/vgahw/Imakefile
index 580e11496..bfbe2df2d 100644
--- a/xc/programs/Xserver/hw/xfree86/vgahw/Imakefile
+++ b/xc/programs/Xserver/hw/xfree86/vgahw/Imakefile
@@ -5,7 +5,7 @@ XCOMM $XConsortium: Imakefile /main/10 1996/10/25 10:34:08 kaleb $
 
 
 
-XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/vgahw/Imakefile,v 1.10 2002/05/31 18:46:03 dawes Exp $
+XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/vgahw/Imakefile,v 1.11 2002/11/14 21:01:21 tsi Exp $
 
 #define IHaveModules
 #include <Server.tmpl>
@@ -27,11 +27,7 @@ OBJS =   vgaHW.o /*vgaCmap.o*/ $(MODOBJ)
    LINTLIBS = ../../../dix/llib-ldix.ln ../../../os/llib-los.ln \
 	     ../../mfb/llib-lmfb.ln ../../mi/llib-lmi.ln
 
-#if DirtyStartup
-STARTUPDEFINES = -DDIRTY_STARTUP
-#endif
-
-    DEFINES = $(STARTUPDEFINES)
+    DEFINES = 
 
 ModuleObjectRule()
 
diff --git a/xc/programs/Xserver/hw/xfree86/vgahw/vgaHW.c b/xc/programs/Xserver/hw/xfree86/vgahw/vgaHW.c
index b707c20ef..e598d91a2 100644
--- a/xc/programs/Xserver/hw/xfree86/vgahw/vgaHW.c
+++ b/xc/programs/Xserver/hw/xfree86/vgahw/vgaHW.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/vgahw/vgaHW.c,v 1.55 2002/04/04 14:05:55 eich Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/vgahw/vgaHW.c,v 1.57 2003/02/24 21:29:36 tsi Exp $ */
 
 /*
  *
@@ -1831,7 +1831,7 @@ vgaHWGetIOBase(vgaHWPtr hwp)
     hwp->IOBase = (hwp->readMiscOut(hwp) & 0x01) ?
 				VGA_IOBASE_COLOR : VGA_IOBASE_MONO;
     xf86DrvMsgVerb(hwp->pScrn->scrnIndex, X_INFO, 3,
-	"vgaHWGetIOBase: hwp->IOBase is 0x%04x, hwp->PIOOffset is 0x%04x\n",
+	"vgaHWGetIOBase: hwp->IOBase is 0x%04x, hwp->PIOOffset is 0x%04lx\n",
 	hwp->IOBase, hwp->PIOOffset);
 }
 
@@ -1840,14 +1840,14 @@ void
 vgaHWLock(vgaHWPtr hwp)
 {
     /* Protect CRTC[0-7] */
-    hwp->writeCrtc(hwp, 0x11, hwp->readCrtc(hwp, 0x11) & ~0x80);
+    hwp->writeCrtc(hwp, 0x11, hwp->readCrtc(hwp, 0x11) | 0x80);
 }
 
 void
 vgaHWUnlock(vgaHWPtr hwp)
 {
     /* Unprotect CRTC[0-7] */
-     hwp->writeCrtc(hwp, 0x11, hwp->readCrtc(hwp, 0x11) | 0x80);
+     hwp->writeCrtc(hwp, 0x11, hwp->readCrtc(hwp, 0x11) & ~0x80);
 }
 
 
diff --git a/xc/programs/Xserver/hw/xfree86/xaa/xaa.h b/xc/programs/Xserver/hw/xfree86/xaa/xaa.h
index 74498052c..5bdcd6de6 100644
--- a/xc/programs/Xserver/hw/xfree86/xaa/xaa.h
+++ b/xc/programs/Xserver/hw/xfree86/xaa/xaa.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/xaa/xaa.h,v 1.38 2002/10/21 01:54:04 mvojkovi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/xaa/xaa.h,v 1.39 2002/10/30 12:52:43 alanh Exp $ */
 
 #ifndef _XAA_H
 #define _XAA_H
@@ -1329,10 +1329,9 @@ typedef struct _XAAInfoRec {
 
 #endif
 
-   /* these were added for 4.3.0 */
    BoxRec SolidLineLimits;
    BoxRec DashedLineLimits;
-    
+
 } XAAInfoRec, *XAAInfoRecPtr;
 
 #define SET_SYNC_FLAG(infoRec)	(infoRec)->NeedToSync = TRUE
diff --git a/xc/programs/Xserver/hw/xfree86/xaa/xaaBitOrder.c b/xc/programs/Xserver/hw/xfree86/xaa/xaaBitOrder.c
index 327599a30..d7f3ba2a3 100644
--- a/xc/programs/Xserver/hw/xfree86/xaa/xaaBitOrder.c
+++ b/xc/programs/Xserver/hw/xfree86/xaa/xaaBitOrder.c
@@ -1,6 +1,7 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/xaa/xaaBitOrder.c,v 1.7 2001/05/18 20:22:31 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/xaa/xaaBitOrder.c,v 1.8 2003/02/17 16:08:29 dawes Exp $ */
 
 #include "Xmd.h"
+CARD32 XAAReverseBitOrder(CARD32 v);
 
 CARD32
 XAAReverseBitOrder(CARD32 v)
diff --git a/xc/programs/Xserver/hw/xfree86/xaa/xaaCpyWin.c b/xc/programs/Xserver/hw/xfree86/xaa/xaaCpyWin.c
index 3c087bee1..1c5ecf38e 100644
--- a/xc/programs/Xserver/hw/xfree86/xaa/xaaCpyWin.c
+++ b/xc/programs/Xserver/hw/xfree86/xaa/xaaCpyWin.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/xaa/xaaCpyWin.c,v 1.2 1998/07/25 16:58:43 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/xaa/xaaCpyWin.c,v 1.3 2003/02/17 16:08:29 dawes Exp $ */
 
 #include "misc.h"
 #include "xf86.h"
@@ -19,8 +19,6 @@
     Written by Harm Hanemaayer (H.Hanemaayer@inter.nl.net).
 */
 
-extern WindowPtr *WindowTable;
-
 void 
 XAACopyWindow(
     WindowPtr pWin,
diff --git a/xc/programs/Xserver/hw/xfree86/xaa/xaaInitAccel.c b/xc/programs/Xserver/hw/xfree86/xaa/xaaInitAccel.c
index 8a4dd921e..1b1bc1830 100644
--- a/xc/programs/Xserver/hw/xfree86/xaa/xaaInitAccel.c
+++ b/xc/programs/Xserver/hw/xfree86/xaa/xaaInitAccel.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/xaa/xaaInitAccel.c,v 1.35 2002/10/21 15:29:47 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/xaa/xaaInitAccel.c,v 1.36 2003/01/12 03:55:51 tsi Exp $ */
 
 #include "misc.h"
 #include "xf86.h"
@@ -491,7 +491,7 @@ XAAInitAccel(ScreenPtr pScreen, XAAInfoRecPtr infoRec)
 
 #ifndef __i386__
    /* XAA makes some unaligned accesses when clipping is not available */
-   #define CLIP_FLAGS (LEFT_EDGE_CLIPPING | LEFT_EDGE_CLIPPING_NEGATIVE_X)
+#  define CLIP_FLAGS (LEFT_EDGE_CLIPPING | LEFT_EDGE_CLIPPING_NEGATIVE_X)
    if(HaveImageWriteRect &&
       ((infoRec->ImageWriteFlags & CLIP_FLAGS) != CLIP_FLAGS))
    {
diff --git a/xc/programs/Xserver/hw/xfree86/xaa/xaaOverlay.c b/xc/programs/Xserver/hw/xfree86/xaa/xaaOverlay.c
index 60bf613f0..9651ca6a3 100644
--- a/xc/programs/Xserver/hw/xfree86/xaa/xaaOverlay.c
+++ b/xc/programs/Xserver/hw/xfree86/xaa/xaaOverlay.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/xaa/xaaOverlay.c,v 1.13 2001/10/28 03:34:04 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/xaa/xaaOverlay.c,v 1.14 2002/12/10 04:18:20 dawes Exp $ */
 
 #include "misc.h"
 #include "xf86.h"
@@ -21,8 +21,6 @@
 #include "panoramiXsrv.h"
 #endif
 
-extern WindowPtr *WindowTable;
-
 static void
 XAACopyWindow8_32(
     WindowPtr pWin,
diff --git a/xc/programs/Xserver/hw/xfree86/xaa/xaaPaintWin.c b/xc/programs/Xserver/hw/xfree86/xaa/xaaPaintWin.c
index 89fdad070..2adf42466 100644
--- a/xc/programs/Xserver/hw/xfree86/xaa/xaaPaintWin.c
+++ b/xc/programs/Xserver/hw/xfree86/xaa/xaaPaintWin.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/xaa/xaaPaintWin.c,v 1.10 2001/10/28 03:34:04 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/xaa/xaaPaintWin.c,v 1.11 2003/02/17 16:08:29 dawes Exp $ */
 
 #include "misc.h"
 #include "xf86.h"
@@ -20,8 +20,6 @@
 #include "panoramiXsrv.h"
 #endif
 
-extern WindowPtr *WindowTable;
-
 void
 XAAPaintWindow(
   WindowPtr pWin,
diff --git a/xc/programs/Xserver/hw/xfree86/xaa/xaaPict.c b/xc/programs/Xserver/hw/xfree86/xaa/xaaPict.c
index f358fd807..4b7e3d0f0 100644
--- a/xc/programs/Xserver/hw/xfree86/xaa/xaaPict.c
+++ b/xc/programs/Xserver/hw/xfree86/xaa/xaaPict.c
@@ -1,5 +1,5 @@
 /*
- * $XFree86: xc/programs/Xserver/hw/xfree86/xaa/xaaPict.c,v 1.15 2002/09/26 02:56:49 keithp Exp $
+ * $XFree86: xc/programs/Xserver/hw/xfree86/xaa/xaaPict.c,v 1.17 2002/12/10 04:17:21 dawes Exp $
  *
  * Copyright © 2000 Keith Packard, member of The XFree86 Project, Inc.
  *
@@ -237,7 +237,7 @@ XAADoComposite (
 	       (op == PictOpOver) && infoRec->WriteBitmap && !pMask->repeat &&
 	       !(infoRec->WriteBitmapFlags & NO_TRANSPARENCY) &&
 	       (!(infoRec->WriteBitmapFlags & RGB_EQUAL) || 
-	         (red == green == blue)))
+	         ((red == green) && (green == blue))))
 	   {
 	        PixmapPtr pPix = (PixmapPtr)(pMask->pDrawable);
 		int skipleft;
@@ -431,8 +431,13 @@ XAAComposite (CARD8      op,
        !(*infoRec->Composite)(op, pSrc, pMask, pDst,
                        xSrc, ySrc, xMask, yMask, xDst, yDst,
                        width, height))
-    { 
-        SYNC_CHECK(pDst->pDrawable);
+    {
+        if(pSrc->pDrawable->type == DRAWABLE_WINDOW ||
+           pDst->pDrawable->type == DRAWABLE_WINDOW ||
+           IS_OFFSCREEN_PIXMAP(pSrc->pDrawable) ||
+           IS_OFFSCREEN_PIXMAP(pDst->pDrawable)) {
+            SYNC_CHECK(pDst->pDrawable);
+        }
         (*GetPictureScreen(pScreen)->Composite) (op,
 		       pSrc,
 		       pMask,
@@ -501,7 +506,7 @@ XAADoGlyphs (CARD8         op,
 
 	XAAGetPixelFromRGBA(&pixel, red, green, blue, 0, pDst->format);
 
-	if((infoRec->WriteBitmapFlags & RGB_EQUAL) && !(red == green == blue))
+	if((infoRec->WriteBitmapFlags & RGB_EQUAL) && !((red == green) && (green == blue)))
 	   return FALSE;
 
 	x = pDst->pDrawable->x;
@@ -623,7 +628,22 @@ XAADoGlyphs (CARD8         op,
 	return TRUE;
     }
 
-    return FALSE;
+    /*
+     * If it looks like we have a chance of being able to draw these
+     * glyphs with an accelerated Composite, do that now to avoid
+     * unneeded and costly syncs.
+     */
+    if(maskFormat) {
+        if(!infoRec->CPUToScreenAlphaTextureFormats)
+            return FALSE;
+    } else {
+        if(!infoRec->CPUToScreenTextureFormats)
+            return FALSE;
+    }
+
+    miGlyphs(op, pSrc, pDst, maskFormat, xSrc, ySrc, nlist, list, glyphs);
+
+    return TRUE;
 }	   
 	 
 	
@@ -646,7 +666,12 @@ XAAGlyphs (CARD8         op,
        !(*infoRec->Glyphs)(op, pSrc, pDst, maskFormat,
                                           xSrc, ySrc, nlist, list, glyphs))
     {
-       SYNC_CHECK(pDst->pDrawable);
+       if((pSrc->pDrawable->type == DRAWABLE_WINDOW) ||
+          (pDst->pDrawable->type == DRAWABLE_WINDOW) ||
+          IS_OFFSCREEN_PIXMAP(pSrc->pDrawable) ||
+          IS_OFFSCREEN_PIXMAP(pDst->pDrawable)) {
+           SYNC_CHECK(pDst->pDrawable);
+       }
        (*GetPictureScreen(pScreen)->Glyphs) (op, pSrc, pDst, maskFormat,
 					  xSrc, ySrc, nlist, list, glyphs);
     }
diff --git a/xc/programs/Xserver/hw/xfree86/xaa/xaaStateChange.c b/xc/programs/Xserver/hw/xfree86/xaa/xaaStateChange.c
index 5885061e3..512c6a260 100644
--- a/xc/programs/Xserver/hw/xfree86/xaa/xaaStateChange.c
+++ b/xc/programs/Xserver/hw/xfree86/xaa/xaaStateChange.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/xaa/xaaStateChange.c,v 3.1 2000/06/20 05:08:49 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/xaa/xaaStateChange.c,v 3.2 2003/02/04 01:44:07 dawes Exp $ */
 
 #include "misc.h"
 #include "xf86.h"
@@ -262,6 +262,17 @@ typedef struct _XAAStateWrapRec {
    CopyWindowProcPtr CopyWindow;
    BackingStoreSaveAreasProcPtr SaveAreas;
    BackingStoreRestoreAreasProcPtr RestoreAreas;
+#ifdef RENDER
+   Bool (*SetupForCPUToScreenAlphaTexture)(ScrnInfoPtr pScrn, int op,
+                                           CARD16 red, CARD16 green,
+                                           CARD16 blue, CARD16 alpha,
+                                           int alphaType, CARD8 *alphaPtr,
+                                           int alphaPitch, int width,
+                                           int height, int flags);
+   Bool (*SetupForCPUToScreenTexture)(ScrnInfoPtr pScrn, int op, int texType,
+                                      CARD8 *texPtr, int texPitch,
+                                      int width, int height, int flags);
+#endif
 } XAAStateWrapRec, *XAAStateWrapPtr;
 
 static int XAAStateIndex = -1;
@@ -1487,6 +1498,42 @@ static void XAAStateWrapRestoreAreas(PixmapPtr pBackingPixmap, RegionPtr pExpose
 			       x, y, pWin);
 }
 
+#ifdef RENDER
+static Bool XAAStateWrapSetupForCPUToScreenAlphaTexture(ScrnInfoPtr pScrn,
+                                                        int op, CARD16 red,
+                                                        CARD16 green,
+                                                        CARD16 blue,
+                                                        CARD16 alpha,
+                                                        int alphaType,
+                                                        CARD8 *alphaPtr,
+                                                        int alphaPitch,
+                                                        int width, int height,
+                                                        int flags)
+{
+   GET_STATEPRIV_PSCRN(pScrn);
+   STATE_CHECK_PSCRN(pScrn);
+
+   return (*pStatePriv->SetupForCPUToScreenAlphaTexture)(pScrn, op, red, green,
+                                                         blue, alpha, alphaType,
+                                                         alphaPtr, alphaPitch,
+                                                         width, height, flags);
+}
+
+static Bool XAAStateWrapSetupForCPUToScreenTexture(ScrnInfoPtr pScrn, int op,
+                                                   int texType, CARD8 *texPtr,
+                                                   int texPitch,
+                                                   int width, int height,
+                                                   int flags)
+{
+   GET_STATEPRIV_PSCRN(pScrn);
+   STATE_CHECK_PSCRN(pScrn);
+
+   return (*pStatePriv->SetupForCPUToScreenTexture)(pScrn, op, texType, texPtr,
+                                                    texPitch, width, height,
+                                                    flags);
+}
+#endif
+
 /* Setup Function */
 Bool
 XAAInitStateWrap(ScreenPtr pScreen, XAAInfoRecPtr infoRec)
@@ -1623,6 +1670,8 @@ XAAInitStateWrap(ScreenPtr pScreen, XAAInfoRecPtr infoRec)
    XAA_STATE_WRAP(CopyWindow);
    XAA_STATE_WRAP(SaveAreas);
    XAA_STATE_WRAP(RestoreAreas);
-
+   XAA_STATE_WRAP(SetupForCPUToScreenAlphaTexture);
+   XAA_STATE_WRAP(SetupForCPUToScreenTexture);
+   
    return TRUE;
 }
diff --git a/xc/programs/Xserver/hw/xfree86/xaa/xaalocal.h b/xc/programs/Xserver/hw/xfree86/xaa/xaalocal.h
index dbd57608d..0c239c234 100644
--- a/xc/programs/Xserver/hw/xfree86/xaa/xaalocal.h
+++ b/xc/programs/Xserver/hw/xfree86/xaa/xaalocal.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/xaa/xaalocal.h,v 1.35 2001/07/19 18:50:16 mvojkovi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/xaa/xaalocal.h,v 1.36 2003/02/17 16:08:29 dawes Exp $ */
 
 #ifndef _XAALOCAL_H
 #define _XAALOCAL_H
@@ -1471,6 +1471,12 @@ void XAAMoveDWORDS_FixedBase(
    register int dwords 
 );
 
+void XAAMoveDWORDS_FixedSrc(
+   register CARD32* dest,
+   register CARD32* src,
+   register int dwords 
+);
+
 void XAAMoveDWORDS(
    register CARD32* dest,
    register CARD32* src,
diff --git a/xc/programs/Xserver/hw/xfree86/xf4bpp/mfbfillarc.c b/xc/programs/Xserver/hw/xfree86/xf4bpp/mfbfillarc.c
index 367532db6..14c2ccb66 100644
--- a/xc/programs/Xserver/hw/xfree86/xf4bpp/mfbfillarc.c
+++ b/xc/programs/Xserver/hw/xfree86/xf4bpp/mfbfillarc.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/xf4bpp/mfbfillarc.c,v 1.4 1999/09/25 14:38:15 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/xf4bpp/mfbfillarc.c,v 1.5 2003/02/18 21:29:59 tsi Exp $ */
 /************************************************************
 
 Copyright (c) 1989  X Consortium
@@ -88,14 +88,14 @@ v16FillEllipseSolid
 	if (!slw)
 	    continue;
 	xpos = xorg - x;
-	addrl = addrlt + (xpos >> 5);
-	if (((xpos & 0x1f) + slw) < 32)
+	addrl = addrlt + (xpos >> PWSH);
+	if (((xpos & PIM) + slw) < PPW)
 	{
 	    maskpartialbits(xpos, slw, startmask);
 	    UPDRW(addrl,startmask);
 	    if (miFillArcLower(slw))
 	    {
-		addrl = addrlb + (xpos >> 5);
+		addrl = addrlb + (xpos >> PWSH);
 		UPDRW(addrl,startmask);
 	    }
 	    continue;
@@ -115,7 +115,7 @@ v16FillEllipseSolid
 	}
 	if (!miFillArcLower(slw))
 	    continue;
-	addrl = addrlb + (xpos >> 5);
+	addrl = addrlb + (xpos >> PWSH);
 	if (startmask)
 	{
 	    UPDRW(addrl,startmask); addrl++;
@@ -135,8 +135,8 @@ v16FillEllipseSolid
     if (xr >= xl) \
     { \
 	width = xr - xl + 1; \
-	addrl = addr + (xl >> 5); \
-	if (((xl & 0x1f) + width) < 32) \
+	addrl = addr + (xl >> PWSH); \
+	if (((xl & PIM) + width) < PPW) \
 	{ \
 	    maskpartialbits(xl, width, startmask); \
 	    UPDRW(addrl,startmask); \
diff --git a/xc/programs/Xserver/hw/xfree86/xf4bpp/mfbimggblt.c b/xc/programs/Xserver/hw/xfree86/xf4bpp/mfbimggblt.c
index c5b54be13..cb2e63125 100644
--- a/xc/programs/Xserver/hw/xfree86/xf4bpp/mfbimggblt.c
+++ b/xc/programs/Xserver/hw/xfree86/xf4bpp/mfbimggblt.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/xf4bpp/mfbimggblt.c,v 1.6 2001/05/15 10:19:43 eich Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/xf4bpp/mfbimggblt.c,v 1.7 2003/02/18 21:29:59 tsi Exp $ */
 
 /* Combined Purdue/PurduePlus patches, level 2.0, 1/17/89 */
 /***********************************************************
@@ -120,7 +120,7 @@ xf4bppImageGlyphBlt(pDrawable, pGC, x, y, nglyph, ppci, pglyphBase)
     int 	x, y;
     unsigned int nglyph;
     CharInfoPtr *ppci;		/* array of character info */
-    unsigned char *pglyphBase;	/* start of array of glyphs */
+    pointer	pglyphBase;	/* start of array of glyphs */
 {
     ExtentInfoRec info;	/* used by QueryGlyphExtents() */
     xRectangle backrect;/* backing rectangle to paint.
@@ -136,7 +136,7 @@ xf4bppImageGlyphBlt(pDrawable, pGC, x, y, nglyph, ppci, pglyphBase)
 	     FONTMINBOUNDS(pGC->font,characterWidth) < 0)) ) {
        miImageGlyphBlt(pDrawable, pGC, x, y, nglyph, ppci, pglyphBase);
     } else {
-       void (* oldFillArea)();
+       ppcPrivGC *pPrivGC;
        int oldfillStyle, oldfg, oldalu;
 
        if (!(pGC->planemask & 0x0F))
@@ -150,35 +150,23 @@ xf4bppImageGlyphBlt(pDrawable, pGC, x, y, nglyph, ppci, pglyphBase)
        backrect.height = FONTASCENT(pGC->font) + FONTDESCENT(pGC->font);
 
 
-       oldFillArea = ((ppcPrivGC *)(pGC->devPrivates[mfbGCPrivateIndex].ptr))->
-                           FillArea;
-       oldfillStyle = ((ppcPrivGC *)(pGC->devPrivates[mfbGCPrivateIndex].ptr))->
-                           colorRrop.fillStyle; /* GJA */
-       oldfg = ((ppcPrivGC *)(pGC->devPrivates[mfbGCPrivateIndex].ptr))->
-                           colorRrop.fgPixel; /* GJA */
-       oldalu = ((ppcPrivGC *)(pGC->devPrivates[mfbGCPrivateIndex].ptr))->
-                           colorRrop.alu; /* GJA */
-
-       ((ppcPrivGC *)(pGC->devPrivates[mfbGCPrivateIndex].ptr))->
-                           FillArea = xf4bppAreaFill;
-       ((ppcPrivGC *)(pGC->devPrivates[mfbGCPrivateIndex].ptr))->
-                           colorRrop.fillStyle = FillSolid; /* GJA */
-       ((ppcPrivGC *)(pGC->devPrivates[mfbGCPrivateIndex].ptr))->
-   			   colorRrop.fgPixel = pGC->bgPixel; /* GJA */
+       pPrivGC = pGC->devPrivates[mfbGCPrivateIndex].ptr;
+       oldfillStyle = pPrivGC->colorRrop.fillStyle; /* GJA */
+       oldfg = pPrivGC->colorRrop.fgPixel; /* GJA */
+       oldalu = pPrivGC->colorRrop.alu; /* GJA */
+
+       pPrivGC->colorRrop.fillStyle = FillSolid; /* GJA */
+       pPrivGC->colorRrop.fgPixel = pGC->bgPixel; /* GJA */
        pGC->fgPixel = pGC->bgPixel;
-       ((ppcPrivGC *)(pGC->devPrivates[mfbGCPrivateIndex].ptr))->
-                           colorRrop.alu = GXcopy; /* GJA */
+       pPrivGC->colorRrop.alu = GXcopy; /* GJA */
        pGC->alu = GXcopy;
 
        /* Required fields:
-        * colorRrop.alu, colorRrop.planemask, colorRrop.fgPixel, FillArea
+        * colorRrop.alu, colorRrop.planemask, colorRrop.fgPixel
         */
        xf4bppPolyFillRect(pDrawable, pGC, 1, &backrect);
 
-       ((ppcPrivGC *)(pGC->devPrivates[mfbGCPrivateIndex].ptr))->
-                           FillArea = oldFillArea;
-       ((ppcPrivGC *)(pGC->devPrivates[mfbGCPrivateIndex].ptr))->
-                        colorRrop.fgPixel = oldfg; /* GJA */
+       pPrivGC->colorRrop.fgPixel = oldfg; /* GJA */
        pGC->fgPixel = oldfg;
 
        /* the faint-hearted can open their eyes now */
@@ -186,10 +174,8 @@ xf4bppImageGlyphBlt(pDrawable, pGC, x, y, nglyph, ppci, pglyphBase)
        DO_WM3(pGC,doImageGlyphBlt(pDrawable, pGC, x, y, nglyph, ppci,
 			pglyphBase,&info))
 
-       ((ppcPrivGC *)(pGC->devPrivates[mfbGCPrivateIndex].ptr))->
-                           colorRrop.fillStyle = oldfillStyle; /* GJA */
-       ((ppcPrivGC *)(pGC->devPrivates[mfbGCPrivateIndex].ptr))->
-                        colorRrop.alu = oldalu; /* GJA */
+       pPrivGC->colorRrop.fillStyle = oldfillStyle; /* GJA */
+       pPrivGC->colorRrop.alu = oldalu; /* GJA */
        pGC->alu = oldalu;
     }
 
@@ -279,8 +265,8 @@ doImageGlyphBlt(pDrawable, pGC, x, y, nglyph, ppci, pglyphBase,infop)
       case rgnOUT:
 	break;
       case rgnIN:
-        pdstBase = pdstBase + (widthDst * y) + (x >> 5);
-        xchar = x & 0x1f;
+        pdstBase = pdstBase + (widthDst * y) + (x >> PWSH);
+        xchar = x & PIM;
 
         while(nglyph--)
         {
@@ -297,18 +283,18 @@ doImageGlyphBlt(pDrawable, pGC, x, y, nglyph, ppci, pglyphBase,infop)
 	       for left edge of glyph
 	    */
 	    xoff = xchar + pci->metrics.leftSideBearing;
-	    if (xoff > 31)
+	    if (xoff > PIM)
 	    {
 	        pdst++;
-	        xoff &= 0x1f;
+	        xoff &= PIM;
 	    }
 	    else if (xoff < 0)
 	    {
-	        xoff += 32;
+	        xoff += PPW;
 	        pdst--;
 	    }
 
-	    if ((xoff + w) <= 32)
+	    if ((xoff + w) <= PPW)
 	    {
 	        /* glyph all in one longword */
 	        maskpartialbits(xoff, w, startmask);
@@ -325,7 +311,7 @@ doImageGlyphBlt(pDrawable, pGC, x, y, nglyph, ppci, pglyphBase,infop)
 	    {
 	        /* glyph crosses longword boundary */
 	        maskPPWbits(xoff, w, startmask, endmask);
-	        nFirst = 32 - xoff;
+	        nFirst = PPW - xoff;
 	        while (h--)
 	        {
 		    getleftbits(pglyph, w, tmpSrc);
@@ -339,14 +325,14 @@ doImageGlyphBlt(pDrawable, pGC, x, y, nglyph, ppci, pglyphBase,infop)
 	    /* update character origin */
 	    x += pci->metrics.characterWidth;
 	    xchar += pci->metrics.characterWidth;
-	    if (xchar > 31)
+	    if (xchar > PLST)
 	    {
-	        xchar -= 32;
+	        xchar -= PPW;
 	        pdstBase++;
 	    }
 	    else if (xchar < 0)
 	    {
-	        xchar += 32;
+	        xchar += PPW;
 	        pdstBase--;
 	    }
 	    ppci++;
@@ -371,9 +357,9 @@ doImageGlyphBlt(pDrawable, pGC, x, y, nglyph, ppci, pglyphBase,infop)
 	if(!(ppos = (TEXTPOS *)ALLOCATE_LOCAL(nglyph * sizeof(TEXTPOS))))
 	    return;
 
-        pdstBase = pdstBase + (widthDst * y) + (x >> 5);
+        pdstBase = pdstBase + (widthDst * y) + (x >> PWSH);
         xpos = x;
-	xchar = xpos & 0x1f;
+	xchar = xpos & PIM;
 
 	for (i=0; i<nglyph; i++)
 	{
@@ -390,14 +376,14 @@ doImageGlyphBlt(pDrawable, pGC, x, y, nglyph, ppci, pglyphBase,infop)
 
 	    xpos += pci->metrics.characterWidth;
 	    xchar += pci->metrics.characterWidth;
-	    if (xchar > 31)
+	    if (xchar > PLST)
 	    {
-		xchar &= 0x1f;
+		xchar &= PIM;
 		pdstBase++;
 	    }
 	    else if (xchar < 0)
 	    {
-		xchar += 32;
+		xchar += PPW;
 		pdstBase--;
 	    }
 	}
@@ -468,18 +454,18 @@ doImageGlyphBlt(pDrawable, pGC, x, y, nglyph, ppci, pglyphBase,infop)
 			   (pci->metrics.leftSideBearing);
 		getWidth = w + glyphCol;
 		xoff = xchar + (leftEdge - ppos[i].xpos);
-		if (xoff > 31)
+		if (xoff > PLST)
 		{
-		    xoff &= 0x1f;
+		    xoff &= PIM;
 		    pdst++;
 		}
 		else if (xoff < 0)
 		{
-		    xoff += 32;
+		    xoff += PPW;
 		    pdst--;
 		}
 
-		if ((xoff + w) <= 32)
+		if ((xoff + w) <= PPW)
 		{
 		    maskpartialbits(xoff, w, startmask);
 		    while (h--)
@@ -493,7 +479,7 @@ doImageGlyphBlt(pDrawable, pGC, x, y, nglyph, ppci, pglyphBase,infop)
 		else
 		{
 		    maskPPWbits(xoff, w, startmask, endmask);
-		    nFirst = 32 - xoff;
+		    nFirst = PPW - xoff;
 		    while (h--)
 		    {
 			getshiftedleftbits(pglyph, glyphCol, getWidth, tmpSrc);
diff --git a/xc/programs/Xserver/hw/xfree86/xf4bpp/mfbzerarc.c b/xc/programs/Xserver/hw/xfree86/xf4bpp/mfbzerarc.c
index 645641b42..7ca32d903 100644
--- a/xc/programs/Xserver/hw/xfree86/xf4bpp/mfbzerarc.c
+++ b/xc/programs/Xserver/hw/xfree86/xf4bpp/mfbzerarc.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/xf4bpp/mfbzerarc.c,v 1.4 1999/09/25 14:38:15 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/xf4bpp/mfbzerarc.c,v 1.5 2003/02/18 21:29:59 tsi Exp $ */
 
 /************************************************************
 
@@ -71,19 +71,19 @@ extern ScrnInfoPtr *xf86Screens;
 
 #define PixelateWhite(addr,off) \
 { \
-    register int *tmpaddr = &((addr)[(off)>>5]); \
-    UPDRW(tmpaddr,SCRRIGHT (LEFTMOST, ((off) & 0x1f))); \
+    register int *tmpaddr = &((addr)[(off)>>PWSH]); \
+    UPDRW(tmpaddr,SCRRIGHT (LEFTMOST, ((off) & PIM))); \
 }
 #define PixelateBlack(addr,off) \
 { \
-    register int *tmpaddr = &((addr)[(off)>>5]); \
-    UPDRW(tmpaddr,~(SCRRIGHT (LEFTMOST, ((off) & 0x1f)))); \
+    register int *tmpaddr = &((addr)[(off)>>PWSH]); \
+    UPDRW(tmpaddr,~(SCRRIGHT (LEFTMOST, ((off) & PIM)))); \
 }
 
 #define Pixelate(base,off) \
 { \
-    paddr = base + ((off)>>5); \
-    pmask = SCRRIGHT(LEFTMOST, (off) & 0x1f); \
+    paddr = base + ((off)>>PWSH); \
+    pmask = SCRRIGHT(LEFTMOST, (off) & PIM); \
     UPDRW(paddr,(pixel & pmask)); \
 }
 
diff --git a/xc/programs/Xserver/hw/xfree86/xf4bpp/ppcArea.c b/xc/programs/Xserver/hw/xfree86/xf4bpp/ppcArea.c
index e9b7d0199..40e9d5b32 100644
--- a/xc/programs/Xserver/hw/xfree86/xf4bpp/ppcArea.c
+++ b/xc/programs/Xserver/hw/xfree86/xf4bpp/ppcArea.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/xf4bpp/ppcArea.c,v 1.3 1999/06/06 08:48:57 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/xf4bpp/ppcArea.c,v 1.4 2003/02/18 21:29:59 tsi Exp $ */
 /*
  * Copyright IBM Corporation 1987,1988,1989
  *
@@ -36,7 +36,7 @@
 #include "ibmTrace.h"
 
 void
-xf4bppAreaFill( pWin, nboxes, pBox, pGC )
+xf4bppFillArea( pWin, nboxes, pBox, pGC )
     register WindowPtr pWin ;
     register int nboxes ;
     register BoxPtr pBox ;
@@ -47,22 +47,22 @@ int alu ;
 unsigned long int fg, bg, pm ;
 int xSrc, ySrc ;
 PixmapPtr pPixmap ;
+ppcPrivGC *pPrivGC = pGC->devPrivates[mfbGCPrivateIndex].ptr;
 
-TRACE( ( "xf4bppAreaFill(0x%x,%d,0x%x,0x%x)\n", pWin, nboxes, pBox, pGC ) ) ;
+TRACE( ( "xf4bppFillArea(0x%x,%d,0x%x,0x%x)\n", pWin, nboxes, pBox, pGC ) ) ;
 
-if ( ( alu = ( (ppcPrivGC *) pGC->devPrivates[mfbGCPrivateIndex].ptr )->colorRrop.alu ) == GXnoop
-  || !nboxes )
+if ( ( alu = pPrivGC->colorRrop.alu ) == GXnoop || !nboxes )
 	return ;
 
 xSrc = pGC->patOrg.x + pWin->drawable.x ;
 ySrc = pGC->patOrg.y + pWin->drawable.y ;
 
-pm = ( (ppcPrivGC *) pGC->devPrivates[mfbGCPrivateIndex].ptr )->colorRrop.planemask ;
-fg = ( (ppcPrivGC *) pGC->devPrivates[mfbGCPrivateIndex].ptr )->colorRrop.fgPixel ;
-bg = ( (ppcPrivGC *) pGC->devPrivates[mfbGCPrivateIndex].ptr )->colorRrop.bgPixel ;
+pm = pPrivGC->colorRrop.planemask ;
+fg = pPrivGC->colorRrop.fgPixel ;
+bg = pPrivGC->colorRrop.bgPixel ;
 
 nboxes++ ;
-switch (  ( (ppcPrivGC *) pGC->devPrivates[mfbGCPrivateIndex].ptr )->colorRrop.fillStyle ) {
+switch ( pPrivGC->colorRrop.fillStyle ) {
 	case FillTiled:
 		for ( pPixmap = pGC->tile.pixmap ; --nboxes ; pBox++ )
 			if ( ( w = pBox->x2 - ( x = pBox->x1 ) )
@@ -92,5 +92,4 @@ switch (  ( (ppcPrivGC *) pGC->devPrivates[mfbGCPrivateIndex].ptr )->colorRrop.f
 		break ;
 }
 
-return ;
 }
diff --git a/xc/programs/Xserver/hw/xfree86/xf4bpp/ppcFillRct.c b/xc/programs/Xserver/hw/xfree86/xf4bpp/ppcFillRct.c
index 6c8ac47dd..7e1c866ef 100644
--- a/xc/programs/Xserver/hw/xfree86/xf4bpp/ppcFillRct.c
+++ b/xc/programs/Xserver/hw/xfree86/xf4bpp/ppcFillRct.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/xf4bpp/ppcFillRct.c,v 1.4 1999/09/25 14:38:16 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/xf4bpp/ppcFillRct.c,v 1.5 2003/02/18 21:29:59 tsi Exp $ */
 /* Combined Purdue/PurduePlus patches, level 2.0, 1/17/89 */
 /***********************************************************
 
@@ -84,7 +84,7 @@ xf4bppPolyFillRect(pDrawable, pGC, nrectFill, prectInit)
     int		    xorg, yorg;
     mfbPrivGC	*priv;
 /*    int alu; */
-    void (* pfn) ();
+/*    mfbFillAreaProcPtr pfn; */
 /*    PixmapPtr ppix; */
 
     if (!(pGC->planemask & 0x0F)) /* GJA */
@@ -92,7 +92,7 @@ xf4bppPolyFillRect(pDrawable, pGC, nrectFill, prectInit)
 
     priv = (mfbPrivGC *) pGC->devPrivates[mfbGCPrivateIndex].ptr;
 /*    alu = priv->ropFillArea; */
-    pfn = priv->FillArea;
+/*    pfn = priv->FillArea; */
 /*    ppix = pGC->pRotatedPixmap; */
     prgnClip = pGC->pCompositeClip;
 
@@ -214,7 +214,8 @@ xf4bppPolyFillRect(pDrawable, pGC, nrectFill, prectInit)
     	}
     }
     if (pboxClipped != pboxClippedBase)
-	(*pfn) (pDrawable,pboxClipped-pboxClippedBase, pboxClippedBase, pGC);
+	xf4bppFillArea((WindowPtr)pDrawable, pboxClipped-pboxClippedBase,
+		       pboxClippedBase, pGC);
     if (pboxClippedBase != stackRects)
     	DEALLOCATE_LOCAL(pboxClippedBase);
 }
diff --git a/xc/programs/Xserver/hw/xfree86/xf4bpp/ppcGC.c b/xc/programs/Xserver/hw/xfree86/xf4bpp/ppcGC.c
index 2a2649c11..df8ae335f 100644
--- a/xc/programs/Xserver/hw/xfree86/xf4bpp/ppcGC.c
+++ b/xc/programs/Xserver/hw/xfree86/xf4bpp/ppcGC.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/xf4bpp/ppcGC.c,v 1.7 2001/10/28 03:34:06 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/xf4bpp/ppcGC.c,v 1.8 2003/02/18 21:29:59 tsi Exp $ */
 /*
 
 Copyright (c) 1987  X Consortium
@@ -96,7 +96,8 @@ static GCFuncs vgaGCFuncs = {
 	xf4bppDestroyGC,
 	xf4bppChangeClip,
 	xf4bppDestroyClip,
-	xf4bppCopyClip
+	xf4bppCopyClip,
+	{ NULL }
 };
 
 
@@ -105,7 +106,7 @@ static ppcPrivGC vgaPrototypeGCPriv = {
 	0,	/* unsigned char	ropOpStip */
 	0,	/* unsigned char	ropFillArea */
 	{0, },	/* unsigned char	unused[sizeof(long) - 3] */
-	xf4bppAreaFill,	/* void 	(* FillArea)() */
+	NULL,	/* mfbFillAreaProcPtr  	FillArea */
 		{
 		    VGA_ALLPLANES,	/* unsigned long	planemask */
 		    1,			/* unsigned long	fgPixel */
@@ -136,7 +137,7 @@ static GCOps vgaGCOps = {
 	miPolyText16,		/*  int (* PolyText16)() */
 	miImageText8,		/*  void (* ImageText8)() */
 	miImageText16,		/*  void (* ImageText16)() */
-	(void (*)())xf4bppImageGlyphBlt,	/*  GJA -- void (* ImageGlyphBlt)() */
+	xf4bppImageGlyphBlt,	/*  GJA -- void (* ImageGlyphBlt)() */
 	miPolyGlyphBlt,		/*  GJA -- void (* PolyGlyphBlt)() */
 	miPushPixels,		/*  void (* PushPixels)() */
 #ifdef NEED_LINEHELPER
diff --git a/xc/programs/Xserver/hw/xfree86/xf4bpp/ppcGCstr.h b/xc/programs/Xserver/hw/xfree86/xf4bpp/ppcGCstr.h
index 7d5ce91d1..5f863fa73 100644
--- a/xc/programs/Xserver/hw/xfree86/xf4bpp/ppcGCstr.h
+++ b/xc/programs/Xserver/hw/xfree86/xf4bpp/ppcGCstr.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/xf4bpp/ppcGCstr.h,v 1.2 1998/07/25 16:59:34 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/xf4bpp/ppcGCstr.h,v 1.3 2003/02/18 21:29:59 tsi Exp $ */
 /*
  * Copyright IBM Corporation 1987,1988,1989
  *
@@ -46,6 +46,7 @@ SOFTWARE.
 /* $XConsortium: ppcGCstr.h /main/3 1996/02/21 17:57:42 kaleb $ */
 
 #include "gc.h"
+#include "mfb.h"
 
 typedef struct {
     unsigned long	planemask ;
@@ -67,7 +68,7 @@ typedef struct {
     unsigned char	ropOpStip ;	/* rop for opaque stipple */
     unsigned char	ropFillArea ;	/*  == alu, rop, or ropOpStip */
     unsigned char	unused[sizeof(long) - 3];
-    void 	(* FillArea)() ;		/* fills regions; look at the code */
+    mfbFillAreaProcPtr 	FillArea;	/* fills regions; look at the code */
 /* ----- END OF "DO-NOT-CHANGE" REGION ----- */
     ppcReducedRrop	colorRrop ;
     short lastDrawableType ;	/* was last drawable a window or a pixmap? */
diff --git a/xc/programs/Xserver/hw/xfree86/xf4bpp/ppcImg.c b/xc/programs/Xserver/hw/xfree86/xf4bpp/ppcImg.c
index e60c49feb..275db433a 100644
--- a/xc/programs/Xserver/hw/xfree86/xf4bpp/ppcImg.c
+++ b/xc/programs/Xserver/hw/xfree86/xf4bpp/ppcImg.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/xf4bpp/ppcImg.c,v 1.4 2000/09/26 15:57:21 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/xf4bpp/ppcImg.c,v 1.5 2003/02/18 21:29:59 tsi Exp $ */
 /*
  * Copyright IBM Corporation 1987,1988,1989
  *
@@ -30,23 +30,6 @@
 #include "scrnintstr.h"
 #include "servermd.h"
 
-/* GETBITSPERPIXEL -- Find out how many bits per pixel are supported at
- * this depth -- another helper function
- */
-static int
-GetBitsPerPixel
-(
-    int	depth
-)
-{
-    register int     i ;
-
-    for ( i = screenInfo.numPixmapFormats ; i-- ; ) 
-	if ( screenInfo.formats[i].depth == depth ) 
-		return screenInfo.formats[i].bitsPerPixel ;
-    return 1 ;
-}
-
 /* Was MIGETIMAGE -- public entry for the GetImage Request
  * We're getting the image into a memory buffer. While we have to use GetSpans
  * to read a line from the device ( since we don't know what that looks like ) ,
@@ -73,6 +56,7 @@ xf4bppGetImage( pDraw, sx, sy, w, h, format, planeMask, pdstLine )
     unsigned long planeMask ;
     char *	     pdstLine ;
 {
+#if 1
     int	    depth, i, linelength, width ;
     DDXPointRec	pt ;
     char *pbits ;
@@ -81,11 +65,6 @@ xf4bppGetImage( pDraw, sx, sy, w, h, format, planeMask, pdstLine )
     GCPtr	pGC ;
     char *pDst = pdstLine ;
 
-#if 0
-	miGetImage( pDraw, sx, sy, w, h, format, planeMask, pdstLine ) ;
-        return;
-#endif
-
     depth = pDraw->depth ;
     if ( format == ZPixmap ) {
 	linelength = PixmapBytePad( w, depth ) ;
@@ -134,7 +113,6 @@ xf4bppGetImage( pDraw, sx, sy, w, h, format, planeMask, pdstLine )
 	}
     }
     else
+#endif
        miGetImage( pDraw, sx, sy, w, h, format, planeMask, pdstLine ) ;
-
-    return ;
 }
diff --git a/xc/programs/Xserver/hw/xfree86/xf4bpp/vgaGC.c b/xc/programs/Xserver/hw/xfree86/xf4bpp/vgaGC.c
index 0c6f48544..867e2c50e 100644
--- a/xc/programs/Xserver/hw/xfree86/xf4bpp/vgaGC.c
+++ b/xc/programs/Xserver/hw/xfree86/xf4bpp/vgaGC.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/xf4bpp/vgaGC.c,v 1.3 1999/06/06 08:49:06 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/xf4bpp/vgaGC.c,v 1.4 2003/02/18 21:29:59 tsi Exp $ */
 /*
 
 Copyright (c) 1987  X Consortium
@@ -83,7 +83,6 @@ register GC *pGC ;
 register ppcPrivGCPtr devPriv ;
 {
 	if ( devPriv->lastDrawableType == DRAWABLE_PIXMAP ) {
-	    devPriv->FillArea	= mfbSolidInvertArea ;
 	    pGC->ops->CopyArea	= miCopyArea ;
 	    pGC->ops->PolyFillRect	= miPolyFillRect ;
 	    pGC->ops->PushPixels	= miPushPixels ;
@@ -92,7 +91,6 @@ register ppcPrivGCPtr devPriv ;
 	    pGC->ops->PolySegment	= miPolySegment ;
 	}
 	else {
-	    devPriv->FillArea	= xf4bppAreaFill ;
 	    pGC->ops->CopyArea	= xf4bppCopyArea ;
 	    pGC->ops->PolyFillRect	= xf4bppPolyFillRect ;
 	    pGC->ops->PushPixels	= miPushPixels ; /* GJA */
diff --git a/xc/programs/Xserver/hw/xfree86/xf4bpp/xf4bpp.h b/xc/programs/Xserver/hw/xfree86/xf4bpp/xf4bpp.h
index 21f57d911..f9141e5e1 100644
--- a/xc/programs/Xserver/hw/xfree86/xf4bpp/xf4bpp.h
+++ b/xc/programs/Xserver/hw/xfree86/xf4bpp/xf4bpp.h
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/xf4bpp/xf4bpp.h,v 1.7 2002/01/25 21:56:23 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/xf4bpp/xf4bpp.h,v 1.8 2003/02/18 21:29:59 tsi Exp $ */
 
 
 #ifndef __XF4BPP_H__
@@ -14,7 +14,7 @@
 #endif
 
 /* ppcArea.c */
-void xf4bppAreaFill(
+void xf4bppFillArea(
 #if NeedFunctionPrototypes
     WindowPtr,
     int,
@@ -627,7 +627,7 @@ void xf4bppImageGlyphBlt(
     int,
     unsigned int,
     CharInfoPtr *,
-    unsigned char *
+    pointer
 #endif
 );
 
diff --git a/xc/programs/Xserver/hw/xfree86/xf86Date.h b/xc/programs/Xserver/hw/xfree86/xf86Date.h
new file mode 100644
index 000000000..92aa0d4b1
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/xf86Date.h
@@ -0,0 +1,7 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/xf86Date.h,v 1.3 2003/02/27 04:56:45 dawes Exp $ */
+
+#ifndef XF86_DATE
+
+#define XF86_DATE	"27 February 2003"
+
+#endif
diff --git a/xc/programs/Xserver/hw/xfree86/xf86Version.h b/xc/programs/Xserver/hw/xfree86/xf86Version.h
index e9fa7396b..11ac49b7d 100644
--- a/xc/programs/Xserver/hw/xfree86/xf86Version.h
+++ b/xc/programs/Xserver/hw/xfree86/xf86Version.h
@@ -1,11 +1,11 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/xf86Version.h,v 3.502 2002/10/22 02:44:26 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/xf86Version.h,v 3.543 2003/02/27 04:56:45 dawes Exp $ */
 
 #ifndef XF86_VERSION_CURRENT
 
 #define XF86_VERSION_MAJOR	4
-#define XF86_VERSION_MINOR	2
-#define XF86_VERSION_PATCH	99
-#define XF86_VERSION_SNAP	2
+#define XF86_VERSION_MINOR	3
+#define XF86_VERSION_PATCH	0
+#define XF86_VERSION_SNAP	0
 
 /* This has five arguments for compatibilty reasons */
 #define XF86_VERSION_NUMERIC(major,minor,patch,snap,dummy) \
@@ -28,9 +28,6 @@
 			XF86_VERSION_SNAP,			\
 			0)
 
-
-#define XF86_DATE	"21 October 2002"
-
 #endif
 
 /* $XConsortium: xf86Version.h /main/78 1996/10/28 05:42:10 kaleb $ */
diff --git a/xc/programs/Xserver/hw/xfree86/xf86cfg/Imakefile b/xc/programs/Xserver/hw/xfree86/xf86cfg/Imakefile
index fc0fbe08b..9a0b9409d 100644
--- a/xc/programs/Xserver/hw/xfree86/xf86cfg/Imakefile
+++ b/xc/programs/Xserver/hw/xfree86/xf86cfg/Imakefile
@@ -1,4 +1,4 @@
-XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/xf86cfg/Imakefile,v 1.21 2002/07/15 20:46:04 dawes Exp $
+XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/xf86cfg/Imakefile,v 1.22 2003/02/26 20:08:03 dawes Exp $
 
 XCOMM CDEBUGFLAGS=-g -Wall -ansi -pedantic
 
@@ -96,11 +96,16 @@ CURSESLIB = NCursesLibName
 CURSESDEFINES  = -DHAS_NCURSES
 #endif
 
+#if HasGlibc21Sigsetjmp
+SETJMPDEFINES = -DHAS_GLIBC_SIGSETJMP=1
+#endif
+
 XF86CONFIGFILE = XConfigFile
 XF86CONFIGDIR = XConfigDir
 
 DEFINES        = -DXF86CONFIG=\"$(XF86CONFIGFILE)\" $(MODULEDEFINES) \
-		 $(CURSESDEFINES) -DPROJECT_ROOT=\"$(PROJECTROOT)\" \
+		 $(CURSESDEFINES) $(SETJMPDEFINES) \
+		 -DPROJECT_ROOT=\"$(PROJECTROOT)\" \
 		 -DXF86CONFIGDIR=\"$(XF86CONFIGDIR)\" XFree86ConsoleDefines
 
 #if HasDlopen
diff --git a/xc/programs/Xserver/hw/xfree86/xf86cfg/accessx.c b/xc/programs/Xserver/hw/xfree86/xf86cfg/accessx.c
index 03e441790..40727ff62 100644
--- a/xc/programs/Xserver/hw/xfree86/xf86cfg/accessx.c
+++ b/xc/programs/Xserver/hw/xfree86/xf86cfg/accessx.c
@@ -26,7 +26,7 @@
  *
  * Author: Paulo César Pereira de Andrade <pcpa@conectiva.com.br>
  *
- * $XFree86: xc/programs/Xserver/hw/xfree86/xf86cfg/accessx.c,v 1.9 2001/03/02 22:39:27 paulo Exp $
+ * $XFree86: xc/programs/Xserver/hw/xfree86/xf86cfg/accessx.c,v 1.10 2002/12/05 19:31:18 paulo Exp $
  */
 
 #include "config.h"
@@ -96,21 +96,23 @@ startaccessx(void)
 {
     InitializeKeyboard();
 
-    XkbGetControls(DPY, XkbAllControlsMask, xkb_info->xkb);
-    if (xkb_info->xkb->ctrls == NULL)
-	xkb_info->xkb->ctrls = (XkbControlsPtr)
-	    XtCalloc(1, sizeof(XkbControlsRec));
+    if (xkb_info->xkb) {
+	XkbGetControls(DPY, XkbAllControlsMask, xkb_info->xkb);
+	if (xkb_info->xkb->ctrls == NULL)
+	    xkb_info->xkb->ctrls = (XkbControlsPtr)
+		XtCalloc(1, sizeof(XkbControlsRec));
 
-    xkb_info->xkb->ctrls->enabled_ctrls |= XkbMouseKeysMask |
-					   XkbMouseKeysAccelMask;
-    xkb_info->xkb->ctrls->mk_delay = 40;
-    xkb_info->xkb->ctrls->mk_interval = 10;
-    xkb_info->xkb->ctrls->mk_time_to_max = 1000;
-    xkb_info->xkb->ctrls->mk_max_speed = 500;
-    xkb_info->xkb->ctrls->mk_curve = 0;
-    XkbSetControls(DPY, XkbAllControlsMask, xkb_info->xkb);
-    (void)UpdateKeyboard(True);
-    CreateAccessXHelpDialog();
+	xkb_info->xkb->ctrls->enabled_ctrls |= XkbMouseKeysMask |
+					       XkbMouseKeysAccelMask;
+	xkb_info->xkb->ctrls->mk_delay = 40;
+	xkb_info->xkb->ctrls->mk_interval = 10;
+	xkb_info->xkb->ctrls->mk_time_to_max = 1000;
+	xkb_info->xkb->ctrls->mk_max_speed = 500;
+	xkb_info->xkb->ctrls->mk_curve = 0;
+	XkbSetControls(DPY, XkbAllControlsMask, xkb_info->xkb);
+	(void)UpdateKeyboard(True);
+	CreateAccessXHelpDialog();
+    }
 }
 
 void
diff --git a/xc/programs/Xserver/hw/xfree86/xf86cfg/cards.c b/xc/programs/Xserver/hw/xfree86/xf86cfg/cards.c
index 15f8f0fdd..d5805fa98 100644
--- a/xc/programs/Xserver/hw/xfree86/xf86cfg/cards.c
+++ b/xc/programs/Xserver/hw/xfree86/xf86cfg/cards.c
@@ -26,7 +26,7 @@
  *
  * Author: Paulo César Pereira de Andrade <pcpa@conectiva.com.br>
  *
- * $XFree86: xc/programs/Xserver/hw/xfree86/xf86cfg/cards.c,v 1.14 2002/09/12 15:19:07 tsi Exp $
+ * $XFree86: xc/programs/Xserver/hw/xfree86/xf86cfg/cards.c,v 1.15 2003/02/15 05:37:58 paulo Exp $
  */
 
 #define CARDS_PRIVATE
@@ -171,8 +171,8 @@ CheckChipsets(xf86cfgModuleOptions *opts, int *err)
 	    }
 	    else
 		check[ichk].chipsets[j] = 1;
-	    ++chips;
 	}
+	++chips;
     }
 
     for (i = 0; i < num_check; i++) {
diff --git a/xc/programs/Xserver/hw/xfree86/xf86cfg/expert.c b/xc/programs/Xserver/hw/xfree86/xf86cfg/expert.c
index 2a78305fa..b9890b32b 100644
--- a/xc/programs/Xserver/hw/xfree86/xf86cfg/expert.c
+++ b/xc/programs/Xserver/hw/xfree86/xf86cfg/expert.c
@@ -26,7 +26,7 @@
  *
  * Author: Paulo César Pereira de Andrade <pcpa@conectiva.com.br>
  *
- * $XFree86: xc/programs/Xserver/hw/xfree86/xf86cfg/expert.c,v 1.13 2002/09/18 17:11:49 tsi Exp $
+ * $XFree86: xc/programs/Xserver/hw/xfree86/xf86cfg/expert.c,v 1.14 2003/02/07 05:46:53 paulo Exp $
  */
 
 #include "config.h"
@@ -1992,11 +1992,11 @@ MonitorUpdate(TreeNode *node)
 
     /* width */
     XtVaGetValues(node->data->monitor.width, XtNstring, &str, NULL, 0);
-    node->data->monitor.monitor->mon_width = atoi(str);
+    node->data->monitor.monitor->mon_width = strtoul(str, NULL, 0);
 
     /* height */
     XtVaGetValues(node->data->monitor.height, XtNstring, &str, NULL, 0);
-    node->data->monitor.monitor->mon_height = atoi(str);
+    node->data->monitor.monitor->mon_height = strtoul(str, NULL, 0);
 
     /* hsync */
     XtVaGetValues(node->data->monitor.hsync, XtNstring, &str, NULL, 0);
@@ -2613,7 +2613,7 @@ DeviceUpdate(TreeNode *node)
 
     /* videoRam */
     XtVaGetValues(node->data->device.videoRam, XtNstring, &str, NULL, 0);
-    node->data->device.device->dev_videoram = atoi(str);
+    node->data->device.device->dev_videoram = strtoul(str, NULL, 0);
 
     /* textClockFreq */
     XtVaGetValues(node->data->device.textClockFreq, XtNstring, &str, NULL, 0);
@@ -2656,28 +2656,28 @@ DeviceUpdate(TreeNode *node)
     /* chipId */
     XtVaGetValues(node->data->device.chipId, XtNstring, &str, NULL, 0);
     if (*str)
-	node->data->device.device->dev_chipid = atoi(str);
+	node->data->device.device->dev_chipid = strtoul(str, NULL, 0);
     else
 	node->data->device.device->dev_chipid = -1;
 
     /* chipRev */
     XtVaGetValues(node->data->device.chipRev, XtNstring, &str, NULL, 0);
     if (*str)
-	node->data->device.device->dev_chiprev = atoi(str);
+	node->data->device.device->dev_chiprev = strtoul(str, NULL, 0);
     else
 	node->data->device.device->dev_chiprev = -1;
 
     /* irq */
     XtVaGetValues(node->data->device.irq, XtNstring, &str, NULL, 0);
     if (*str)
-	node->data->device.device->dev_irq = atoi(str);
+	node->data->device.device->dev_irq = strtoul(str, NULL, 0);
     else
 	node->data->device.device->dev_irq = -1;
 
     /* screen */
     XtVaGetValues(node->data->device.screen, XtNstring, &str, NULL, 0);
     if (*str)
-	node->data->device.device->dev_screen = atoi(str);
+	node->data->device.device->dev_screen = strtoul(str, NULL, 0);
     else
 	node->data->device.device->dev_screen = -1;
 }
@@ -2917,15 +2917,15 @@ ScreenUpdate(TreeNode *node)
 
     /* defautDepth */
     XtVaGetValues(node->data->screen.defaultDepth, XtNstring, &str, NULL, 0);
-    node->data->screen.screen->scrn_defaultdepth = atoi(str);
+    node->data->screen.screen->scrn_defaultdepth = strtoul(str, NULL, 0);
 
         /* defautBpp */
     XtVaGetValues(node->data->screen.defaultBpp, XtNstring, &str, NULL, 0);
-    node->data->screen.screen->scrn_defaultbpp = atoi(str);
+    node->data->screen.screen->scrn_defaultbpp = strtoul(str, NULL, 0);
 
     /* defautFbBpp */
     XtVaGetValues(node->data->screen.defaultFbBpp, XtNstring, &str, NULL, 0);
-    node->data->screen.screen->scrn_defaultfbbpp = atoi(str);
+    node->data->screen.screen->scrn_defaultfbbpp = strtoul(str, NULL, 0);
 
 
     /* XXX Monitor and Device should be changed to a menu interface */
@@ -3254,11 +3254,11 @@ ScreenDisplayUpdate(TreeNode *node)
 
     /* depth */
     XtVaGetValues(node->data->display.depth, XtNstring, &str, NULL, 0);
-    node->data->display.display->disp_depth = atoi(str);
+    node->data->display.display->disp_depth = strtoul(str, NULL, 0);
 
     /* bpp */
     XtVaGetValues(node->data->display.bpp, XtNstring, &str, NULL, 0);
-    node->data->display.display->disp_bpp = atoi(str);
+    node->data->display.display->disp_bpp = strtoul(str, NULL, 0);
 
     /* visual */
     XtVaGetValues(node->data->display.visual, XtNstring, &str, NULL, 0);
@@ -3923,8 +3923,8 @@ AdjacencyToggleCallback(Widget w, XtPointer user_data, XtPointer call_data)
     XtVaGetValues(node->data->adjacency.adjx, XtNstring, &x, NULL, 0);
     XtVaGetValues(node->data->adjacency.adjy, XtNstring, &y, NULL, 0);
 
-    adj->adj_x = atoi(x);
-    adj->adj_y = atoi(y);
+    adj->adj_x = strtol(x, NULL, 0);
+    adj->adj_y = strtol(y, NULL, 0);
 
     if (strcmp(XtName(w), "absolute") == 0) {
     XtVaSetValues(node->data->adjacency.button, XtNlabel, "", NULL, 0);
@@ -4365,7 +4365,7 @@ DRIUpdate(TreeNode *node)
     /* group */
     XtVaGetValues(node->data->dri.group, XtNstring, &str, NULL, 0);
     if (*str)
-	node->data->dri.dri->dri_group = atoi(str);
+	node->data->dri.dri->dri_group = strtoul(str, NULL, 0);
     else
 	node->data->dri.dri->dri_group = -1;
 
@@ -4488,11 +4488,11 @@ BuffersUpdate(TreeNode *node)
 
     /* count */
     XtVaGetValues(node->data->buffers.count, XtNstring, &str, NULL, 0);
-    node->data->buffers.buffers->buf_count = atoi(str);
+    node->data->buffers.buffers->buf_count = strtoul(str, NULL, 0);
 
     /* size */
     XtVaGetValues(node->data->buffers.size, XtNstring, &str, NULL, 0);
-    node->data->buffers.buffers->buf_size = atoi(str);
+    node->data->buffers.buffers->buf_size = strtoul(str, NULL, 0);
 
     /* flags */
     XtVaGetValues(node->data->buffers.flags, XtNstring, &str, NULL, 0);
diff --git a/xc/programs/Xserver/hw/xfree86/xf86cfg/keyboard-cfg.c b/xc/programs/Xserver/hw/xfree86/xf86cfg/keyboard-cfg.c
index 2139961ce..87989fdc2 100644
--- a/xc/programs/Xserver/hw/xfree86/xf86cfg/keyboard-cfg.c
+++ b/xc/programs/Xserver/hw/xfree86/xf86cfg/keyboard-cfg.c
@@ -26,7 +26,7 @@
  *
  * Author: Paulo César Pereira de Andrade <pcpa@conectiva.com.br>
  *
- * $XFree86: xc/programs/Xserver/hw/xfree86/xf86cfg/keyboard-cfg.c,v 1.18 2002/10/10 05:19:39 paulo Exp $
+ * $XFree86: xc/programs/Xserver/hw/xfree86/xf86cfg/keyboard-cfg.c,v 1.22 2003/01/01 19:22:24 paulo Exp $
  */
 
 #include "xf86config.h"
@@ -134,23 +134,24 @@ KeyboardConfig(XtPointer config)
 	    xkb_infos[num_xkb_infos++] = xkb_info;
 
 	    xkb_info->conf = keyboard;
+	    bzero((char*)&(xkb_info->defs), sizeof(XkbRF_VarDefsRec));
 	    while (timeout > 0) {
 		xkb_info->xkb =
 		    XkbGetKeyboard(XtDisplay(configp),
 				   XkbGBN_AllComponentsMask, XkbUseCoreKbd);
-		if (xkb_info->xkb == NULL || xkb_info->xkb->geom == NULL)
-		    sleep(timeout -= 1);
+		if (xkb_info->xkb == NULL) {
+		    timeout -= 1;
+		    sleep(1);
+		}		    
 		else
 		    break;
 	    }
 	    if (timeout <= 0) {
 		fprintf(stderr, "Couldn't get keyboard\n");
-		exit(1);
 	    }
-	    if (xkb_info->xkb->names->geometry == 0)
+	    if (xkb_info->xkb && xkb_info->xkb->names && xkb_info->xkb->geom &&
+		xkb_info->xkb->names->geometry == 0)
 		xkb_info->xkb->names->geometry = xkb_info->xkb->geom->name;
-
-	    bzero((char*)&(xkb_info->defs), sizeof(XkbRF_VarDefsRec));
 	}
 
 	/* check for removed devices */
@@ -294,6 +295,7 @@ KeyboardConfig(XtPointer config)
 		XtFree(option->opt_val);
 		option->opt_val = XtNewString(rules);
 		XtFree(option->opt_comment);
+		option->opt_comment = NULL;
 	    }
 	    else
 		keyboard->inp_option_lst =
@@ -305,6 +307,7 @@ KeyboardConfig(XtPointer config)
 		XtFree(option->opt_val);
 		option->opt_val = XtNewString(model);
 		XtFree(option->opt_comment);
+		option->opt_comment = NULL;
 	    }
 	    else
 		keyboard->inp_option_lst =
@@ -451,11 +454,12 @@ InitializeKeyboard(void)
     xkb_infos = (XkbInfo**)XtCalloc(1, sizeof(XkbInfo*));
     num_xkb_infos = 1;
     xkb_infos[0] = xkb_info;
+    bzero((char*)&(xkb_info->defs), sizeof(XkbRF_VarDefsRec));
 
     while (timeout > 0) {
 	xkb_info->xkb =
 	    XkbGetKeyboard(DPY, XkbGBN_AllComponentsMask, XkbUseCoreKbd);
-	if (xkb_info->xkb == NULL || xkb_info->xkb->geom == NULL) {
+	if (xkb_info->xkb == NULL) {
 	    timeout -= 1;
 	    sleep(1);
 	}
@@ -464,13 +468,11 @@ InitializeKeyboard(void)
     }
     if (timeout <= 0) {
 	fprintf(stderr, "Couldn't get keyboard\n");
-	exit(1);
     }
-    if (xkb_info->xkb->names->geometry == 0)
+    if (xkb_info->xkb && xkb_info->xkb->names && xkb_info->xkb->geom &&
+	xkb_info->xkb->names->geometry == 0)
 	xkb_info->xkb->names->geometry = xkb_info->xkb->geom->name;
 
-    bzero((char*)&(xkb_info->defs), sizeof(XkbRF_VarDefsRec));
-
     /* Load configuration */
     XmuSnprintf(name, sizeof(name), "%s%s", XkbConfigDir, XkbConfigFile);
     file = fopen(name, "r");
@@ -565,6 +567,17 @@ InitializeKeyboard(void)
 	xkb_info->defs.options = option->opt_val;
     else
 	xkb_info->defs.options = NULL;
+
+    if (xkb_info->xkb == NULL) {
+	/* Try again */
+	XkbComponentNamesRec comps;
+
+	bzero((char*)&comps, sizeof(XkbComponentNamesRec));
+	XkbRF_GetComponents(xkb_rules->list, &(xkb_info->defs), &comps);
+
+	xkb_info->xkb = XkbGetKeyboardByName(DPY, XkbUseCoreKbd, &comps,
+					     XkbGBN_AllComponentsMask, 0, 0);
+    }
 }
 
 static XF86XkbRulesDescInfo *
@@ -857,8 +870,9 @@ UpdateKeyboard(Bool load)
 	fprintf(stderr, "Couldn't get keyboard\n");
 	return (False);
     }
-    if (xkb->names->geometry == 0)
-	xkb->names->geometry = xkb->geom->name;
+    if (xkb_info->xkb && xkb_info->xkb->names && xkb_info->xkb->geom &&
+	xkb_info->xkb->names->geometry == 0)
+	xkb_info->xkb->names->geometry = xkb_info->xkb->geom->name;
 
     XkbFreeKeyboard(xkb_info->xkb, 0, False);
 
diff --git a/xc/programs/Xserver/hw/xfree86/xf86cfg/loadmod.c b/xc/programs/Xserver/hw/xfree86/xf86cfg/loadmod.c
index aedf1d1dc..381ad1919 100644
--- a/xc/programs/Xserver/hw/xfree86/xf86cfg/loadmod.c
+++ b/xc/programs/Xserver/hw/xfree86/xf86cfg/loadmod.c
@@ -26,10 +26,19 @@
  *
  * Author: Paulo César Pereira de Andrade <pcpa@conectiva.com.br>
  *
- * $XFree86: xc/programs/Xserver/hw/xfree86/xf86cfg/loadmod.c,v 1.10 2002/04/04 14:05:56 eich Exp $
+ * $XFree86: xc/programs/Xserver/hw/xfree86/xf86cfg/loadmod.c,v 1.14 2003/02/26 20:08:03 dawes Exp $
  */
 
 #ifdef USE_MODULES
+#include <setjmp.h>
+
+#ifndef HAS_GLIBC_SIGSETJMP
+#if defined(setjmp) && \
+    defined(__GLIBC__) && __GLIBC__ == 2 && __GLIBC_MINOR__ < 2
+#define HAS_GLIBC_SIGSETJMP 1
+#endif
+#endif
+
 #define LOADER_PRIVATE
 #include "loader.h"
 
@@ -54,6 +63,7 @@ Bool xf86ServerIsOnlyDetecting(void);
 void xf86AddInputDriver(InputDriverPtr, pointer, int);
 void xf86AddModuleInfo(ModuleInfoPtr, void*);
 Bool xf86LoaderCheckSymbol(const char*);
+void xf86LoaderRefSymLists(const char **, ...);
 void xf86LoaderReqSymLists(const char **, ...);
 void xf86Msg(int, const char*, ...);
 void xf86PrintChipsets(const char*, const char*, SymTabPtr);
@@ -65,6 +75,7 @@ int xf86MatchIsaInstances(const char*, SymTabPtr, pointer*, DriverPtr, pointer,
 void *xf86LoadDrvSubModule(DriverPtr drv, const char*);
 void xf86DrvMsg(int, int, const char*, ...);
 pciConfigPtr *xf86GetPciConfigInfo(void);
+Bool xf86IsPrimaryPci(pcVideoPtr*);
 #endif
 
 extern char *loaderPath, **loaderList, **ploaderList;
@@ -213,6 +224,7 @@ LOOKUP xfree86LookupTab[] = {
    SYMFUNC(xf86strlen)
    SYMFUNC(xf86strncmp)
    SYMFUNC(xf86strncasecmp)
+   SYMFUNC(xf86strncat)
    SYMFUNC(xf86strncpy)
    SYMFUNC(xf86strpbrk)
    SYMFUNC(xf86strchr)
@@ -262,8 +274,17 @@ LOOKUP xfree86LookupTab[] = {
    SYMFUNC(xf86shmat)
    SYMFUNC(xf86shmdt)
    SYMFUNC(xf86shmctl)
+#ifdef HAS_GLIBC_SIGSETJMP
    SYMFUNC(xf86setjmp)
-   SYMFUNC(xf86longjmp)
+   SYMFUNCALIAS("xf86setjmp1",__sigsetjmp)
+#else
+   SYMFUNCALIAS("xf86setjmp",setjmp)
+   SYMFUNC(xf86setjmp1)
+#endif
+   SYMFUNCALIAS("xf86longjmp",longjmp)
+   SYMFUNC(xf86getjmptype)
+   SYMFUNC(xf86setjmp1_arg2)
+   SYMFUNC(xf86setjmperror)
 
     SYMFUNC(xf86AddDriver)
     SYMFUNC(xf86ServerIsOnlyDetecting)
@@ -271,6 +292,7 @@ LOOKUP xfree86LookupTab[] = {
     SYMFUNC(xf86AddModuleInfo)
     SYMFUNC(xf86LoaderCheckSymbol)
 
+    SYMFUNC(xf86LoaderRefSymLists)
     SYMFUNC(xf86LoaderReqSymLists)
     SYMFUNC(xf86Msg)
     SYMFUNC(ErrorF)
@@ -284,6 +306,7 @@ LOOKUP xfree86LookupTab[] = {
     SYMFUNC(xf86LoadDrvSubModule)
     SYMFUNC(xf86DrvMsg)
     SYMFUNC(xf86GetPciConfigInfo)
+    SYMFUNC(xf86IsPrimaryPci)
     {0,0}
 };
 
@@ -301,6 +324,17 @@ AddModuleOptions(char *name, const OptionInfoRec *option)
     SymTabPtr ctmp;
     int count;
 
+    /* XXX If the module is already in the list, then it means that
+     * it is now being properly loaded by xf86cfg and the "fake" entry
+     * added in xf86cfgLoaderInitList() isn't required anymore.
+     * Currently:
+     *	ati and vmware are known to fail. */
+    for (ptr = module_options; ptr; ptr = ptr->next)
+	if (strcmp(name, ptr->name) == 0) {
+	    fprintf(stderr, "Module %s already in list!\n", name);
+	    return;
+	}
+
     ptr = XtNew(xf86cfgModuleOptions);
     ptr->name = XtNewString(name);
     ptr->type = module_type;
@@ -386,6 +420,16 @@ xf86cfgLoaderInitList(int type)
     }
     LoaderSetPath(loaderPath);
     loaderList = LoaderListDirs(subdirs, NULL);
+
+    /* XXX Xf86cfg isn't able to provide enough wrapper functions
+     * to these drivers. Maybe the drivers could also be changed
+     * to work better when being loaded "just for testing" */
+    if (type == VideoModule) {
+	module_type = VideoModule;
+	AddModuleOptions("vmware", NULL);
+	AddModuleOptions("ati", NULL);
+	module_type = NullModule;
+    }
 }
 
 void
@@ -517,6 +561,11 @@ xf86LoaderCheckSymbol(const char *symbol)
 }
 
 void
+xf86LoaderRefSymLists(const char **list0, ...)
+{
+}
+
+void
 xf86LoaderReqSymLists(const char **list0, ...)
 {
 }
@@ -559,7 +608,8 @@ xf86MatchPciInstances(const char *name, int VendorID, SymTabPtr chipsets, PciChi
 		      GDevPtr *devList, int numDevs, DriverPtr drvp, int **foundEntities)
 {
     vendor = VendorID;
-    chips = chipsets;
+    if (chips == NULL)
+	chips = chipsets;
     *foundEntities = NULL;
 
     return (0);
@@ -593,4 +643,10 @@ xf86GetPciConfigInfo(void)
 {
     return (NULL);
 }
+
+Bool
+xf86IsPrimaryPci(pciVideoPtr pPci)
+{
+    return (True);
+}
 #endif
diff --git a/xc/programs/Xserver/hw/xfree86/xf86cfg/mouse-cfg.c b/xc/programs/Xserver/hw/xfree86/xf86cfg/mouse-cfg.c
index 826e97c48..761da248a 100644
--- a/xc/programs/Xserver/hw/xfree86/xf86cfg/mouse-cfg.c
+++ b/xc/programs/Xserver/hw/xfree86/xf86cfg/mouse-cfg.c
@@ -26,7 +26,7 @@
  *
  * Author: Paulo César Pereira de Andrade <pcpa@conectiva.com.br>
  *
- * $XFree86: xc/programs/Xserver/hw/xfree86/xf86cfg/mouse-cfg.c,v 1.9 2002/06/06 21:03:32 paulo Exp $
+ * $XFree86: xc/programs/Xserver/hw/xfree86/xf86cfg/mouse-cfg.c,v 1.10 2003/02/15 05:37:58 paulo Exp $
  */
 
 #include "xf86config.h"
@@ -62,26 +62,28 @@ static struct MouseProtocol {
     {"wsmouse",			MTYPE_AUTOMOUSE},
 #endif
     {"Auto",			MTYPE_AUTOMOUSE},
-    {"AceCad",			MTYPE_ACECAD},
+    {"SysMouse",		MTYPE_SYSMOUSE},
+    {"MouseSystems",		MTYPE_MOUSESYS},
     {"BusMouse",		MTYPE_BUSMOUSE},
+    {"PS/2",			MTYPE_PS_2},
+    {"Microsoft",		MTYPE_MICROSOFT},
+#ifndef __FreeBSD__
+    {"ImPS/2",			MTYPE_IMPS2},
     {"ExplorerPS/2",		MTYPE_EXPPS2},
-    {"GlidePoint",		MTYPE_GLIDEPOINT},
     {"GlidePointPS/2",		MTYPE_GLIDEPOINTPS2},
-    {"ImPS/2",			MTYPE_IMPS2},
+    {"MouseManPlusPS/2",	MTYPE_MMANPLUSPS2},
+    {"NetMousePS/2",		MTYPE_NETPS2},
+    {"NetScrollPS/2",		MTYPE_NETSCROLLPS2},
+    {"ThinkingMousePS/2",	MTYPE_THINKINGPS2},
+#endif
+    {"AceCad",			MTYPE_ACECAD},
+    {"GlidePoint",		MTYPE_GLIDEPOINT},
     {"IntelliMouse",		MTYPE_IMSERIAL},
     {"Logitech",		MTYPE_LOGITECH},
-    {"Microsoft",		MTYPE_MICROSOFT},
     {"MMHitTab",		MTYPE_MMHIT},
     {"MMSeries",		MTYPE_MMSERIES},
     {"MouseMan",		MTYPE_LOGIMAN},
-    {"MouseManPlusPS/2",	MTYPE_MMANPLUSPS2},
-    {"MouseSystems",		MTYPE_MOUSESYS},
-    {"NetMousePS/2",		MTYPE_NETPS2},
-    {"NetScrollPS/2",		MTYPE_NETSCROLLPS2},
-    {"PS/2",			MTYPE_PS_2},
-    {"SysMouse",		MTYPE_SYSMOUSE},
     {"ThinkingMouse",		MTYPE_THINKING},
-    {"ThinkingMousePS/2",	MTYPE_THINKINGPS2},
 };
 
 static Widget text;
@@ -309,7 +311,7 @@ MouseDeviceAndProtocol(XF86SetupInfo *info)
 #ifdef WSCONS_SUPPORT
 	"wsmouse",
 #endif
-	"cua",
+	"cuaa",
 	"mice",
 	"mouse",
 	"ps",
diff --git a/xc/programs/Xserver/hw/xfree86/xf86cfg/screen-cfg.c b/xc/programs/Xserver/hw/xfree86/xf86cfg/screen-cfg.c
index 8d9ff4912..5aa71188a 100644
--- a/xc/programs/Xserver/hw/xfree86/xf86cfg/screen-cfg.c
+++ b/xc/programs/Xserver/hw/xfree86/xf86cfg/screen-cfg.c
@@ -26,7 +26,7 @@
  *
  * Author: Paulo César Pereira de Andrade <pcpa@conectiva.com.br>
  *
- * $XFree86: xc/programs/Xserver/hw/xfree86/xf86cfg/screen-cfg.c,v 1.11 2002/09/18 17:11:49 tsi Exp $
+ * $XFree86: xc/programs/Xserver/hw/xfree86/xf86cfg/screen-cfg.c,v 1.12 2002/11/18 05:24:18 paulo Exp $
  */
 
 #include "xf86config.h"
@@ -72,6 +72,7 @@ static char *standard_modes[] = {
     "1600x1200",
     "1800x1400",
     "512x384",
+    "1400x1050",
 };
 
 static char **modes;
diff --git a/xc/programs/Xserver/hw/xfree86/xf86cfg/stubs.c b/xc/programs/Xserver/hw/xfree86/xf86cfg/stubs.c
index 75c956bdd..5962908d1 100644
--- a/xc/programs/Xserver/hw/xfree86/xf86cfg/stubs.c
+++ b/xc/programs/Xserver/hw/xfree86/xf86cfg/stubs.c
@@ -26,7 +26,7 @@
  *
  * Author: Paulo César Pereira de Andrade <pcpa@conectiva.com.br>
  *
- * $XFree86: xc/programs/Xserver/hw/xfree86/xf86cfg/stubs.c,v 1.2 2000/10/23 21:16:52 tsi Exp $
+ * $XFree86: xc/programs/Xserver/hw/xfree86/xf86cfg/stubs.c,v 1.3 2002/11/09 11:12:53 herrb Exp $
  */
 
 #include <stdio.h>
@@ -62,12 +62,4 @@ VErrorF(const char *fmt, va_list ap)
     return (retval);
 }
 
-#else
-char *Xstrdup(const char*);
-
-char *
-Xstrdup(const char *s)
-{
-    return (strdup(s));
-}
 #endif /* !defined(USE_MODULES) */
diff --git a/xc/programs/Xserver/hw/xfree86/xf86cfg/text-mode.c b/xc/programs/Xserver/hw/xfree86/xf86cfg/text-mode.c
index f52d71268..ef4da2877 100644
--- a/xc/programs/Xserver/hw/xfree86/xf86cfg/text-mode.c
+++ b/xc/programs/Xserver/hw/xfree86/xf86cfg/text-mode.c
@@ -26,7 +26,7 @@
  *
  * Author: Paulo César Pereira de Andrade <pcpa@conectiva.com.br>
  *
- * $XFree86: xc/programs/Xserver/hw/xfree86/xf86cfg/text-mode.c,v 1.17 2002/06/06 21:03:32 paulo Exp $
+ * $XFree86: xc/programs/Xserver/hw/xfree86/xf86cfg/text-mode.c,v 1.22 2003/02/16 05:23:45 paulo Exp $
  */
 
 #include <stdio.h>
@@ -292,14 +292,18 @@ WriteXF86Config(void)
 
     if (newconfig) {
 	if (XF86Config->conf_modules == NULL) {
-	    static char *modules[] = {"xie", "pex5", "glx", "dri", "dbe",
-				      "record", "extmod", "type1"};
+	    static char *modules[] = {"extmod", "glx", "dri", "dbe",
+				      "record", "xtrap", "type1", "speedo"};
 	    XF86LoadPtr load;
 	    int i;
 
 	    XF86Config->conf_modules = (XF86ConfModulePtr)
 		XtCalloc(1, sizeof(XF86ConfModuleRec));
 
+	    XF86Config->conf_modules->mod_comment =
+		XtNewString("\t# Load \"freetype\"\n"
+			    "\t# Load \"xtt\"\n");
+
 	    for (i = 0; i < sizeof(modules) / sizeof(modules[0]); i++) {
 		load = (XF86LoadPtr)XtCalloc(1, sizeof(XF86LoadRec));
 		load->load_name = XtNewString(modules[i]);
@@ -329,30 +333,32 @@ static char *protocols[] = {
 #ifdef SCO
     "OsMouse",
 #endif
+#ifdef WSCONS_SUPPORT
+    "wsmouse",
+#endif
     "Auto",
-    "Microsoft",
-    "PS/2",
-    "AceCad",
+    "SysMouse",
+    "MouseSystems",
     "BusMouse",
+    "PS/2",
+    "Microsoft",
+#ifndef __FreeBSD__
+    "ImPS/2",
     "ExplorerPS/2",
-    "GlidePoint",
     "GlidePointPS/2",
-    "ImPS/2",
+    "MouseManPlusPS/2",
+    "NetMousePS/2",
+    "NetScrollPS/2",
+    "ThinkingMousePS/2",
+#endif
+    "AceCad",
+    "GlidePoint",
     "IntelliMouse",
     "Logitech",
     "MMHitTab",
     "MMSeries",
     "MouseMan",
-    "MouseManPlusPS/2",
-    "MouseSystems",
-    "NetMousePS/2",
-    "NetScrollPS/2",
-    "SysMouse",
     "ThinkingMouse",
-    "ThinkingMousePS/2",
-#ifdef WSCONS_SUPPORT
-    "wsmouse",
-#endif
 };
 
 static int
@@ -513,6 +519,8 @@ MouseConfig(void)
     if (str == NULL)
 #ifdef WSCONS_SUPPORT
 	str = "/dev/wsmouse";
+#elif defined(__FreeBSD__)
+	str = "/dev/sysmouse";
 #else
 	str = "/dev/mouse";
 #endif
@@ -1073,6 +1081,8 @@ CardConfig(void)
 	"apm",
 	"ark",
 	"ati",
+	"r128",
+	"radeon",
 	"chips",
 	"cirrus",
 	"cyrix",
@@ -1084,16 +1094,18 @@ CardConfig(void)
 	"imstt",
 	"mga",
 	"neomagic",
-	"r128",
-	"radeon",
+	"nv",
 	"rendition",
+	"s3",
 	"s3virge",
+	"savage",
 	"siliconmotion",
 	"sis",
 	"tdfx",
 	"tga",
 	"trident",
 	"tseng",
+	"vmware",
 	"vga",
 	"vesa",
     };
@@ -1105,7 +1117,7 @@ CardConfig(void)
 	drivers = NULL;
 	ndrivers = 0;
 	while (opts) {
-	    if (opts->chipsets) {
+	    if (opts->type == VideoModule) {
 		++ndrivers;
 		drivers = (char**)XtRealloc((XtPointer)drivers,
 					    ndrivers * sizeof(char*));
@@ -1347,6 +1359,7 @@ static char *depths[] = {
 
 static char *modes[] = {
     "1600x1200",
+    "1400x1050",
     "1280x1024",
     "1280x960",
     "1152x864",
@@ -1553,8 +1566,13 @@ ScreenConfig(void)
 	def = 4;
     else if (screen->scrn_defaultdepth == 24)
 	def = 5;
-    else
-	def = 2;
+    else {
+	if (screen->scrn_device && screen->scrn_device->dev_driver &&
+	    strcmp(screen->scrn_device->dev_driver, "vga") == 0)
+	    def = 1;		/* 4bpp */
+	else
+	    def = 2;		/* 8bpp */
+    }
     ClearScreen();
     refresh();
     i = DialogMenu("Screen depth",
@@ -1625,7 +1643,7 @@ ScreenConfig(void)
     }
 
     if (nlist == 0 && def == 0)
-	checks[6] = 1;	/* 640x480 */
+	checks[7] = 1;	/* 640x480 */
     list = (char**)XtRealloc((XtPointer)list, (nlist + sizeof(modes) /
 			     sizeof(modes[0])) * sizeof(char*));
     for (i = 0; i < sizeof(modes) / sizeof(modes[0]); i++)
diff --git a/xc/programs/Xserver/hw/xfree86/xf86cfg/xf86cfg.man b/xc/programs/Xserver/hw/xfree86/xf86cfg/xf86cfg.man
index 865270318..4fe4389a0 100644
--- a/xc/programs/Xserver/hw/xfree86/xf86cfg/xf86cfg.man
+++ b/xc/programs/Xserver/hw/xfree86/xf86cfg/xf86cfg.man
@@ -26,7 +26,7 @@
 .\"
 .\" Author: Paulo César Pereira de Andrade <pcpa@conectiva.com.br>
 .\"
-.\" $XFree86: xc/programs/Xserver/hw/xfree86/xf86cfg/xf86cfg.man,v 1.8 2002/10/12 16:06:44 herrb Exp $
+.\" $XFree86: xc/programs/Xserver/hw/xfree86/xf86cfg/xf86cfg.man,v 1.9 2002/12/30 14:34:02 herrb Exp $
 .\"
 .TH xf86cfg 1 __vendorversion__
 .SH NAME
@@ -35,7 +35,7 @@ xf86cfg - Graphical configuration tool for XFree86 4.0
 .B xf86cfg
 [-xf86config \fIXF86Config\fP] [-modulepath \fImoduledir\fP] 
 [-fontpath \fIfontsdir\fP] [-toolkitoption ...]
-.SH DESCRITPION
+.SH DESCRIPTION
 .I Xf86cfg
 is a tool to configure \fIXFree86 4.0\fP, and can be used to either write the
 initial configuration file or make customizations to the current configuration.
diff --git a/xc/programs/Xserver/hw/xfree86/xf86config/Cards b/xc/programs/Xserver/hw/xfree86/xf86config/Cards
index ff18ea59b..83d8840ea 100644
--- a/xc/programs/Xserver/hw/xfree86/xf86config/Cards
+++ b/xc/programs/Xserver/hw/xfree86/xf86config/Cards
@@ -18,7 +18,7 @@
 # The majority of entries are just a binding of a model name to a
 # chipset/server and untested.
 #
-# $XFree86: xc/programs/Xserver/hw/xfree86/xf86config/Cards,v 3.79 2002/10/16 01:31:05 dawes Exp $
+# $XFree86: xc/programs/Xserver/hw/xfree86/xf86config/Cards,v 3.80 2002/11/18 05:24:19 paulo Exp $
 
 # VGA
 
@@ -35,6 +35,212 @@ SERVER VGA16
 DRIVER vga
 UNSUPPORTED
 
+
+#	  #
+# generic #
+#	  #
+
+NAME ** Alliance Pro Motion (generic)      [apm]
+#CHIPSET apm
+SERVER SVGA
+DRIVER apm
+LINE #Option "no_accel"
+
+NAME ** Ark Logic (generic)                [ark]
+#CHIPSET ark
+SERVER SVGA
+DRIVER ark
+
+NAME ** ATI (generic)                      [ati]
+#CHIPSET ati
+SERVER SVGA
+DRIVER ati
+
+NAME ** ATI Rage 128 based (generic)       [r128]
+#CHIPSET r128
+SERVER SVGA
+DRIVER r128
+
+NAME ** ATI Radeon (generic)               [radeon]
+#CHIPSET radeon
+SERVER SVGA
+DRIVER radeon
+
+NAME ** Chips and Technologies (generic)   [chips]
+#CHIPSET chips
+SERVER SVGA
+DRIVER chips
+LINE # Option "suspend_hack"
+LINE # Option "STN"
+LINE # Option "no_stretch"
+LINE # Option "no_center"
+LINE # Option "use_modeline"
+LINE # Option "fix_panel_size"
+LINE # videoram 512
+LINE # Option "noaccel"
+LINE # Option "no_bitblt"
+LINE # Option "xaa_no_color_exp"
+LINE # Option "xaa_benchmark"
+LINE # Option "hw_cursor"
+LINE # Option "nolinear"
+LINE # MemBase 0x03b00000
+LINE # Option "hw_clocks"
+LINE # Textclockfreq 25.175
+
+NAME ** Cirrus Logic (generic)             [cirrus]
+#CHIPSET cirrus
+SERVER SVGA
+DRIVER cirrus
+LINE # MemBase 0x00e00000		# ISA card that maps to 14Mb
+LINE # MemBase 0x04000000		# VLB card that maps to 64Mb
+LINE # MemBase 0x80000000		# VLB card that maps to 2048Mb
+LINE # MemBase 0x02000000		# VLB card that maps to 32Mb
+LINE # Option "linear"
+LINE # Option "fifo_conservative"
+
+NAME ** Cyrix MediaGX (generic)            [cyrix]
+#CHIPSET cyrix
+SERVER SVGA
+DRIVER cyrix
+
+NAME ** Linux framebuffer (generic)        [fbdev]
+#CHIPSET fbdev
+SERVER SVGA
+DRIVER fbdev
+
+NAME ** 3DLabs, TI (generic)               [glint]
+#CHIPSET glint
+SERVER SVGA
+DRIVER glint
+LINE #Option "no_accel"
+
+NAME ** Number Nine I128 (generic)         [i128]
+#CHIPSET i128
+SERVER SVGA
+DRIVER i128
+
+NAME ** Intel i740 (generic)               [i740]
+#CHIPSET i740
+SERVER SVGA
+DRIVER i740
+
+NAME ** Intel i810 (generic)               [i810]
+#CHIPSET i810
+SERVER SVGA
+DRIVER i810
+
+NAME ** Matrox Graphics (generic)          [mga]
+#CHIPSET mga
+SERVER SVGA
+DRIVER mga
+LINE # Option "mga_sdram"
+
+NAME ** NeoMagic (generic)                 [neomagic]
+#CHIPSET neomagic
+SERVER SVGA
+DRIVER neomagic
+LINE # Chipset    "NM2160"
+LINE # IOBase     0xfea00000
+LINE # MemBase    0xfd000000
+LINE # VideoRam   2048
+LINE # DacSpeed   90
+LINE # Option     "linear"
+LINE # Option     "nolinear"
+LINE # Option     "sw_cursor"
+LINE # Option     "hw_cursor"
+LINE # Option     "no_accel"
+LINE # Option     "intern_disp"
+LINE # Option     "extern_disp"
+LINE # Option     "mmio"
+LINE # Option     "no_mmio"
+LINE # Option     "lcd_center"
+LINE # Option     "no_stretch"
+
+NAME ** NVIDIA (generic)                   [nv]
+#CHIPSET nv
+SERVER SVGA
+DRIVER nv
+
+NAME ** Rendition (generic)                [rendition]
+#CHIPSET rendition
+SERVER SVGA
+DRIVER rendition
+LINE # Option "sw_cursor"
+
+NAME ** S3 (not ViRGE or Savage) (generic) [s3]
+#CHIPSET s3
+SERVER SVGA
+DRIVER s3
+
+NAME ** S3 ViRGE (generic)                 [s3virge]
+#CHIPSET s3virge
+SERVER SVGA
+DRIVER s3virge
+LINE # Option "xaa_benchmark"
+LINE # Option "fifo_moderate"
+LINE # Option "pci_burst_on"
+LINE # Option "pci_retry"
+LINE # Option "lcd_center"
+LINE # Set_LCDClk  <pixel_clock_for_LCD>
+
+NAME ** S3 Savage (generic)                [savage]
+#CHIPSET savage
+SERVER SVGA
+DRIVER savage
+
+NAME ** Silicon Motion (generic)           [siliconmotion]
+#CHIPSET siliconmotion
+SERVER SVGA
+DRIVER siliconmotion
+
+NAME ** SiS (generic)                      [sis]
+#CHIPSET sis
+SERVER SVGA
+DRIVER sis
+LINE # Option "no_accel"
+LINE # Option "fifo_moderate"
+LINE # Option "fifo_conserv"
+LINE # Option "fifo_aggressive"
+LINE # Option "no_BitBlt"
+LINE # Option "fast_vram"
+LINE # Option "pci_burst_on"
+LINE # Option "xaa_benchmark"
+LINE # Option "ext_eng_queue"
+
+NAME ** 3Dfx (generic)                     [tdfx]
+#CHIPSET tdfx
+SERVER SVGA
+DRIVER tdfx
+
+NAME ** DEC TGA (generic)                  [tga]
+#CHIPSET tga
+SERVER SVGA
+DRIVER tga
+
+NAME ** Trident (generic)                  [trident]
+#CHIPSET trident
+SERVER SVGA
+DRIVER trident
+
+NAME ** Tseng Labs (generic)               [tseng]
+#CHIPSET tseng
+SERVER SVGA
+DRIVER tseng
+LINE # Option "linear"
+LINE # Option "noaccel"
+LINE # Option "power_saver"
+LINE # Option "fast_dram"
+LINE # Option "pci_retry"
+LINE # Option "hibit_high"
+LINE # Option "hibit_low"
+LINE # MemBase 0x3C00000
+
+NAME ** VMWare guest OS (generic)          [vmware]
+#CHIPSET vmware
+SERVER SVGA
+DRIVER vmware
+
+
 #Chips & Technologies
 
 #untested
diff --git a/xc/programs/Xserver/hw/xfree86/xf86config/xf86config.c b/xc/programs/Xserver/hw/xfree86/xf86config/xf86config.c
index 7f536f7e0..e536b2c5b 100644
--- a/xc/programs/Xserver/hw/xfree86/xf86config/xf86config.c
+++ b/xc/programs/Xserver/hw/xfree86/xf86config/xf86config.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/xf86config/xf86config.c,v 3.60 2002/05/31 18:46:04 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/xf86config/xf86config.c,v 3.69 2003/02/20 04:05:15 dawes Exp $ */
 
 /*
  * This is a configuration program that will create a base XF86Config
@@ -53,6 +53,7 @@
  *	     of /usr/X11R6/lib/X11.
  *	   Add RAMDAC and Clockchip menu.
  * 27Mar99 Modified for XFree86 4.0 config file format
+ * 06Sep02 Write comment block about 'DontVTSwitch'.
  *
  * Possible enhancements:
  * - Add more standard mode timings (also applies to README.Config). Missing
@@ -76,6 +77,22 @@
  *  New 'Configuration of XKB' section.
  *  Author: Ivan Pascal      The XFree86 Project.
  */
+/*
+ *  Nov2002
+ *  Some enhancements:
+ *  - Add new PS/2 mouse protocol.
+ *    "IMPS/2","ExplorerPS/2","ThinkingMousePS/2","MouseManPlusPS/2",
+ *    "GlidePointPS/2","NetMousePS/2" and "NetScrollPS/2".
+ *  - Add mouse-speed setting for PS/2 mouse.
+ *  - Fix seg.fault problem on Solaris.
+ *  - Add modestring "1400x1050"(for ATI Mobile-Rage).
+ *  - Add videomemory 8192, 16384, 32768, 65536, 131072 and 262144.
+ *  - Load "speedo" module.
+ *  - Ready to DRI.
+ *  - Load xtt module instead of freetype module.
+ *  - Add font path "/fonts/TrueType/" and "/fonts/freefont/".
+ *  Chisato Yamauchi(cyamauch@phyas.aichi-edu.ac.jp)
+ */
 /* $XConsortium: xf86config.c /main/21 1996/10/28 05:43:57 kaleb $ */
 
 #include <stdlib.h>
@@ -333,7 +350,8 @@ static void
 getstring(char *s)
 {
 	char *cp;
-	fgets(s, 80, stdin);
+	if (fgets(s, 80, stdin) == NULL)
+		exit(1);
 	cp = strchr(s, '\n');
 	if (cp)
 		*cp=0;
@@ -347,22 +365,103 @@ getstring(char *s)
  * We also do the same for QNX4, since we use the OS mouse drivers.
  */
 
-static char *mousetype_identifier[] = {
-	"Microsoft",
-	"MouseSystems",
-	"Busmouse",
-	"PS/2",
-	"Logitech",
-	"MouseMan",
-	"MMSeries",
-	"MMHitTab",
-	"IntelliMouse",
+int	M_OSMOUSE,	M_WSMOUSE,		M_AUTO,
+	M_SYSMOUSE,	M_MOUSESYSTEMS, 	M_PS2,
+	M_MICROSOFT,	M_BUSMOUSE,		M_IMPS2,
+	M_EXPLORER_PS2, M_GLIDEPOINT_PS2,	M_MOUSEMANPLUS_PS2,
+	M_NETMOUSE_PS2, M_NETSCROLL_PS2,	M_THINKINGMOUSE_PS2,
+	M_ACECAD,	M_GLIDEPOINT,		M_INTELLIMOUSE,
+	M_LOGITECH,	M_MMHITTAB,		M_MMSERIES,
+	M_MOUSEMAN,	M_THINKINGMOUSE;
+
+struct {
+	char *name;
+	int *ident;
+	char *desc;
+} mouse_info[] = {
 #if defined(__UNIXOS2__) || defined(QNX4)
-	"OSMOUSE",
+#define DEF_PROTO_STRING	"OSMOUSE"
+	{"OSMOUSE",		&M_OSMOUSE,
+	 "OSMOUSE"
+	},
 #endif
 #ifdef WSCONS_SUPPORT
-    	"wsmouse",
+#define WS_MOUSE_STRING		"wsmouse"
+#define DEF_PROTO_STRING	WS_MOUSE_STRING
+	{WS_MOUSE_STRING,	&M_WSMOUSE,
+	 "wsmouse protocol"
+	},
+#endif
+#ifndef DEF_PROTO_STRING
+#define DEF_PROTO_STRING	"Auto"
 #endif
+	{"Auto",		&M_AUTO,
+	 "Auto detect"
+	},
+	{"SysMouse",		&M_SYSMOUSE,
+	 "SysMouse"
+	},
+#define M_MOUSESYSTEMS_STRING	"MouseSystems"
+	{M_MOUSESYSTEMS_STRING,	&M_MOUSESYSTEMS,
+	 "Mouse Systems (3-button protocol)"
+	},
+	{"PS/2",		&M_PS2,
+	 "PS/2 Mouse"
+	},
+#define M_MICROSOFT_STRING	"Microsoft"
+	{M_MICROSOFT_STRING,	&M_MICROSOFT,
+	 "Microsoft compatible (2-button protocol)"
+	},
+	{"Busmouse",		&M_BUSMOUSE,
+	 "Bus Mouse"
+	},
+#ifndef __FreeBSD__
+	{"IMPS/2",		&M_IMPS2,
+	 "IntelliMouse PS/2"
+	},
+	{"ExplorerPS/2",	&M_EXPLORER_PS2,
+	 "Explorer PS/2"
+	},
+	{"GlidePointPS/2",	&M_GLIDEPOINT_PS2,
+	 "GlidePoint PS/2"
+	},
+	{"MouseManPlusPS/2",	&M_MOUSEMANPLUS_PS2,
+	 "MouseManPlus PS/2"
+	},
+	{"NetMousePS/2",	&M_NETMOUSE_PS2,
+	 "NetMouse PS/2"
+	},
+	{"NetScrollPS/2",	&M_NETSCROLL_PS2,
+	 "NetScroll PS/2"
+	},
+	{"ThinkingMousePS/2",	&M_THINKINGMOUSE_PS2,
+	 "ThinkingMouse PS/2"
+	},
+#endif
+	{"AceCad",		&M_ACECAD,
+	 "AceCad"
+	},
+	{"GlidePoint",		&M_GLIDEPOINT,
+	 "GlidePoint"
+	},
+	{"IntelliMouse",	&M_INTELLIMOUSE,
+	 "Microsoft IntelliMouse"
+	},
+	{"Logitech",		&M_LOGITECH,
+	 "Logitech Mouse (serial, old type, Logitech protocol)"
+	},
+	{"MMHitTab",		&M_MMHITTAB,
+	 "MM HitTablet"
+	},
+	{"MMSeries",		&M_MMSERIES,
+	 "MM Series"	/* XXXX These descriptions should be improved. */
+	},
+	{"MouseMan",		&M_MOUSEMAN,
+	 "Logitech MouseMan (Microsoft compatible)"
+	},
+	{"ThinkingMouse",	&M_THINKINGMOUSE,
+	 "ThinkingMouse"
+	},
 };
 
 #ifndef __UNIXOS2__
@@ -370,40 +469,25 @@ static char *mouseintro_text =
 "First specify a mouse protocol type. Choose one from the following list:\n"
 "\n";
 
-static char *mousetype_name[] = {
-	"Microsoft compatible (2-button protocol)",
-	"Mouse Systems (3-button protocol)",
-	"Bus Mouse",
-	"PS/2 Mouse",
-	"Logitech Mouse (serial, old type, Logitech protocol)",
-	"Logitech MouseMan (Microsoft compatible)",
-	"MM Series",	/* XXXX These descriptions should be improved. */
-	"MM HitTablet",
-	"Microsoft IntelliMouse",
-#ifdef WSCONS_SUPPORT
-        "wsmouse protocol",
-#endif
-};
-
 static char *mousedev_text =
 "Now give the full device name that the mouse is connected to, for example\n"
 "/dev/tty00. Just pressing enter will use the default, /dev/mouse.\n"
 #ifdef WSCONS_SUPPORT
 "On systems with wscons, the default is /dev/wsmouse.\n"
 #endif
+#ifdef __FreeBSD__
+"On FreeBSD, the default is /dev/sysmouse.\n"
+#endif
 "\n";
 
 static char *mousecomment_text =
-"If you have a two-button mouse, it is most likely of type 1, and if you have\n"
-"a three-button mouse, it can probably support both protocol 1 and 2. There are\n"
-"two main varieties of the latter type: mice with a switch to select the\n"
-"protocol, and mice that default to 1 and require a button to be held at\n"
-"boot-time to select protocol 2. Some mice can be convinced to do 2 by sending\n"
-"a special sequence to the serial port (see the ClearDTR/ClearRTS options).\n"
+"The recommended protocol is " DEF_PROTO_STRING ". If you have a very old mouse\n"
+"or don't want OS support or auto detection, and you have a two-button\n"
+"or three-button serial mouse, it is most likely of type " M_MICROSOFT_STRING ".\n"
 #ifdef WSCONS_SUPPORT
 "\n"
-"If your system uses the wscons console driver, with a PS/2 type mouse, select\n"
-"10.\n"
+"If your system uses the wscons console driver, with a PS/2 type mouse,\n"
+"select " WS_MOUSE_STRING ".\n"
 #endif
 "\n";
 
@@ -443,26 +527,35 @@ static void
 mouse_configuration(void) {
 
 #if !defined(__UNIXOS2__) && !defined(QNX4)
-	int i;
+	int i, j;
 	char s[80];
-	printf("%s", mouseintro_text);
-	
-	for (i = 0; i < sizeof(mousetype_name)/sizeof(char *); i++)
-		printf("%2d.  %s\n", i + 1, mousetype_name[i]);
 
-	printf("\n");
-
-	printf("%s", mousecomment_text);
-	
-	printf("Enter a protocol number: ");
-	getstring(s);
-	config_mousetype = atoi(s) - 1;
-	if (config_mousetype < 0)
-		config_mousetype = 0;
+#define MOUSETYPE_COUNT sizeof(mouse_info)/sizeof(mouse_info[0])
+	for (i = 0; i < MOUSETYPE_COUNT; i++)
+		*(mouse_info[i].ident) = i;
 
+	for (i=0;;) {
+		emptylines();
+		printf("%s", mouseintro_text);
+		for (j = i; j < i + 14 && j < MOUSETYPE_COUNT; j++)
+			printf("%2d.  %s\n", j + 1, mouse_info[j].name);
+		printf("\n");
+		printf("%s", mousecomment_text);
+		printf("Enter a protocol number: ");
+		getstring(s);
+		if (strlen(s) == 0) {
+			i += 14;
+			if (i >= MOUSETYPE_COUNT)
+				i = 0;
+			continue;
+		}
+		config_mousetype = atoi(s) - 1;
+		if (config_mousetype >= 0 && config_mousetype < MOUSETYPE_COUNT)
+			break;
+	}
 	printf("\n");
 
-	if (config_mousetype == 4) {
+	if (config_mousetype == M_LOGITECH) {
 		/* Logitech. */
 		printf("%s", logitechmousecomment_text);
 		printf("\n");
@@ -470,14 +563,14 @@ mouse_configuration(void) {
 		printf("Are you sure it's really not a Microsoft compatible one? ");
 		getstring(s);
 		if (!answerisyes(s))
-			config_mousetype = 0;
+			config_mousetype = M_MICROSOFT;
 		printf("\n");
 	}
 
 	config_chordmiddle = 0;
-	if (config_mousetype == 0 || config_mousetype == 5) {
+	if (config_mousetype == M_MICROSOFT || config_mousetype == M_MOUSEMAN) {
 		/* Microsoft or MouseMan. */
-		if (config_mousetype == 0)
+		if (config_mousetype == M_MICROSOFT)
 			printf("%s", microsoftmousecomment_text);
 		else
 			printf("%s", mousemancomment_text);
@@ -491,7 +584,7 @@ mouse_configuration(void) {
 	}
 
 	config_cleardtrrts = 0;
-	if (config_mousetype == 1) {
+	if (config_mousetype == M_MOUSESYSTEMS) {
 		/* Mouse Systems. */
 		printf("%s", mousesystemscomment_text);
 		printf("\n");
@@ -503,20 +596,18 @@ mouse_configuration(void) {
 		printf("\n");
 	}
 
-	switch (config_mousetype) {
-	case 0 : /* Microsoft compatible */
+	if (config_mousetype == M_MICROSOFT) {
 		if (config_chordmiddle)
 			printf("%s", threebuttonmousecomment_text);
 		else
 			printf("%s", twobuttonmousecomment_text);
-		break;
-	case 1 : /* Mouse Systems. */
-	case 8 : /* IntelliMouse */
+	}
+	else if (config_mousetype == M_MOUSESYSTEMS ||
+		 config_mousetype == M_INTELLIMOUSE) {
 		printf("%s", threebuttonmousecomment_text);
-		break;
-	default :
+	}
+	else {
 		printf("%s", unknownbuttonsmousecomment_text);
-		break;
 	}
 
 	printf("\n");
@@ -534,10 +625,12 @@ mouse_configuration(void) {
 	printf("Mouse device: ");
 	getstring(s);
 	if (strlen(s) == 0)
-#ifndef WSCONS_SUPPORT
-		config_pointerdevice = "/dev/mouse";
-#else
+#ifdef WSCONS_SUPPORT
 		config_pointerdevice = "/dev/wsmouse";
+#elif defined(__FreeBSD__)
+		config_pointerdevice = "/dev/sysmouse";
+#else
+		config_pointerdevice = "/dev/mouse";
 #endif
 	else {
 		config_pointerdevice = Malloc(strlen(s) + 1);
@@ -547,7 +640,7 @@ mouse_configuration(void) {
 
 #else /* __UNIXOS2__ */
        	/* set some reasonable defaults for OS/2 */
-       	config_mousetype = 9;
+       	config_mousetype = M_OSMOUSE;
 	config_chordmiddle = 0;       
 	config_cleardtrrts = 0;
 	config_emulate3buttons = 0;
@@ -626,19 +719,27 @@ keyboard_configuration(void)
             return;
         }
 
-	printf(xkbmodeltext);
-	for (i=0; i < rules->models.num_desc; i++) {
-	    printf("%3d  %-50s\n", i+1, rules->models.desc[i].desc);
-	}
-	
-	printf("\nEnter a number to choose the keyboard.\n\n");
-	getstring(s);
-	if (strlen(s) == 0)
-	    number = 0;
-	else {
-	    i = atoi(s)-1;
-	    number = (i < 0 || i > rules->models.num_desc) ? 0 : i;
+	number = -1;
+	for (i=0;;) {
+		emptylines();
+		printf(xkbmodeltext);
+		for (j = i; j < i + 16 && j < rules->models.num_desc; j++)
+		    printf("%3d  %-50s\n", j+1, rules->models.desc[j].desc);
+		printf("\nEnter a number to choose the keyboard.\n\n");
+		if (rules->models.num_desc >= 16)
+			printf("Press enter for the next page\n");
+		getstring(s);
+		if (strlen(s) == 0) {
+			i += 16;
+			if (i > rules->models.num_desc)
+				i = 0;
+			continue;
+		}
+		number = atoi(s) - 1;
+		if (number >= 0 && number < rules->models.num_desc)
+			break;
 	}
+
 	i = strlen(rules->models.desc[number].name) + 1;
 	config_xkbmodel = Malloc(i);
 	sprintf(config_xkbmodel,"%s", rules->models.desc[number].name);
@@ -942,10 +1043,14 @@ carddb_configuration(void) {
 	for (;;) {
 		int j;
 		emptylines();
-		for (j = i; j < i + 18 && j <= lastcard; j++)
+		for (j = i; j < i + 18 && j <= lastcard; j++) {
+			char *name = card[j].name,
+			     *chipset = card[j].chipset;
+
 			printf("%3d  %-50s%s\n", j,
-				card[j].name,
-				card[j].chipset);
+				name ? name : "-",
+				chipset ? chipset : "-");
+		}
 		printf("\n");
 		printf("Enter a number to choose the corresponding card definition.\n");
 		printf("Press enter for the next page, q to continue configuration.\n");
@@ -968,9 +1073,12 @@ carddb_configuration(void) {
 	 * Look at the selected card.
 	 */
 	if (card_selected != -1) {
+		char *name = card[card_selected].name,
+		     *chipset = card[card_selected].chipset;
+
 		printf("\nYour selected card definition:\n\n");
-		printf("Identifier: %s\n", card[card_selected].name);
-		printf("Chipset:    %s\n", card[card_selected].chipset);
+		printf("Identifier: %s\n", name ? name : "-");
+		printf("Chipset:    %s\n", chipset ? chipset : "-");
 		if (!card[card_selected].driver)
 			card[card_selected].driver = "unknown";
 		printf("Driver:     %s\n", card[card_selected].driver);
@@ -1006,12 +1114,10 @@ static char *deviceintro_text =
 "\n";
 
 static char *videomemoryintro_text =
-"You must indicate how much video memory you have. It is probably a good\n"
-"idea to use the same approximate amount as that detected by the server you\n"
-"intend to use. If you encounter problems that are due to the used server\n"
-"not supporting the amount memory you have (e.g. ATI Mach64 is limited to\n"
-"1024K with the SVGA server), specify the maximum amount supported by the\n"
-"server.\n"
+"It is probably a good idea to use the same approximate amount as that detected\n"
+"by the server you intend to use. If you encounter problems that are due to the\n"
+"used server not supporting the amount memory you have, specify the maximum\n"
+"amount supported by the server.\n"
 "\n"
 "How much video memory do you have on your video card:\n"
 "\n";
@@ -1169,10 +1275,14 @@ static char *virtual_text =
 "differently-sized virtual screen\n"
 "\n";
 
-static int videomemory[5] = {
-	256, 512, 1024, 2048, 4096
+static int videomemory[] = {
+	256, 512, 1024, 2048, 4096, 8192, 16384, 32768, 65536, 131072, 262144
 };
 
+/* Is this required? */
+#if XFREE86_VERSION >= 400
+#define NU_MODESTRINGS 13
+#else
 #if XFREE86_VERSION >= 330
 #define NU_MODESTRINGS 12
 #else
@@ -1182,6 +1292,7 @@ static int videomemory[5] = {
 #define NU_MODESTRINGS 5
 #endif
 #endif
+#endif
 
 static char *modestring[NU_MODESTRINGS] = {
 	"\"640x400\"",
@@ -1200,6 +1311,9 @@ static char *modestring[NU_MODESTRINGS] = {
 	"\"1800x1400\"",
 	"\"512x384\""
 #endif
+#if XFREE86_VERSION >= 400
+	,"\"1400x1050\""
+#endif
 };
 
 #ifdef __EMX__
@@ -1253,18 +1367,16 @@ screen_configuration(void) {
 
 	printf("%s", videomemoryintro_text);
 
-	for (i = 0; i < 5; i++)
+	for (i = 0; i < sizeof(videomemory) / sizeof(videomemory[0]); i++)
 		printf("%2d  %dK\n", i + 1, videomemory[i]);
-	printf(" 6  Other\n\n");
+	printf("%2d  Other\n\n", i + 1);
 
 	printf("Enter your choice: ");
 	getstring(s);
 	printf("\n");
 
 	c = atoi(s) - 1;
-	if (c < 0)
-		c = 0;
-	if (c < 5)
+	if (c >= 0 && c < sizeof(videomemory) / sizeof(videomemory[0]))
 		config_videomemory = videomemory[c];
 	else {
 		printf("Amount of video memory in Kbytes: ");
@@ -1328,9 +1440,10 @@ screen_configuration(void) {
 			config_virtualy24bpp = 1024;
 		}
 		/* Add 1600x1280 */
-		config_modesline8bpp = "\"640x480\" \"800x600\" \"1024x768\" \"1280x1024\"";
-		config_modesline16bpp = "\"640x480\" \"800x600\" \"1024x768\" \"1280x1024\"";
-		config_modesline24bpp = "\"640x480\" \"800x600\" \"1024x768\" \"1280x1024\"";
+		config_modesline8bpp = "\"1280x1024\" \"1024x768\" \"800x600\" \"640x480\"";
+		config_modesline16bpp = "\"1280x1024\" \"1024x768\" \"800x600\" \"640x480\"";
+		config_modesline24bpp = "\"1280x1024\" \"1024x768\" \"800x600\" \"640x480\"";
+
 	}
 	else
 	if (config_videomemory >= 2048) {
@@ -1361,12 +1474,12 @@ screen_configuration(void) {
 			config_virtualx24bpp = 1024;
 			config_virtualy24bpp = 768;
 		}
-		config_modesline8bpp = "\"640x480\" \"800x600\" \"1024x768\" \"1280x1024\"";
-		config_modesline16bpp = "\"640x480\" \"800x600\" \"1024x768\"";
+		config_modesline8bpp = "\"1280x1024\" \"1024x768\" \"800x600\" \"640x480\"";
+		config_modesline16bpp = "\"1024x768\" \"800x600\" \"640x480\"";
 		if (config_videomemory >= 2048 + 256)
-			config_modesline24bpp = "\"640x480\" \"800x600\" \"1024x768\"";
+			config_modesline24bpp = "\"1024x768\" \"800x600\" \"640x480\"";
 		else
-			config_modesline24bpp = "\"640x480\" \"800x600\"";
+			config_modesline24bpp = "\"800x600\" \"640x480\"";
 	}
 	else
 	if (config_videomemory >= 1024) {
@@ -1386,15 +1499,15 @@ screen_configuration(void) {
 		config_virtualy16bpp = 600; /* it's small enough as it is. */
 		config_virtualx24bpp = 640;
 		config_virtualy24bpp = 480;
-		config_modesline8bpp = "\"640x480\" \"800x600\" \"1024x768\"";
-		config_modesline16bpp = "\"640x480\" \"800x600\"";
+		config_modesline8bpp = "\"1024x768\" \"800x600\" \"640x480\"";
+		config_modesline16bpp = "\"800x600\" \"640x480\"";
 		config_modesline24bpp = "\"640x480\"";
 	}
 	else
 	if (config_videomemory >= 512) {
 		config_virtualx8bpp = 800;
 		config_virtualy8bpp = 600;
-		config_modesline8bpp = "\"640x480\" \"800x600\"";
+		config_modesline8bpp = "\"800x600\" \"640x480\"";
 		config_modesline16bpp = "\"640x400\"";
 	}
 	else
@@ -1792,10 +1905,14 @@ static char *XF86Config_firstchunk_text =
 "\n"
 "# This loads the Type1 and FreeType font modules\n"
 "    Load        \"type1\"\n"
-"    Load        \"freetype\"\n"
+"    Load        \"speedo\"\n"
+"#    Load        \"freetype\"\n"
+"#    Load        \"xtt\"\n"
 "\n"
 "# This loads the GLX module\n"
 "#    Load       \"glx\"\n"
+"# This loads the DRI module\n"
+"#    Load       \"dri\"\n"
 "\n"
 "EndSection\n"
 "\n"
@@ -1828,8 +1945,10 @@ static char *XF86Config_fontpaths[] =
 	"/fonts/misc/",
 	"/fonts/75dpi/:unscaled",
 	"/fonts/100dpi/:unscaled",
-	"/fonts/Type1/",
 	"/fonts/Speedo/",
+	"/fonts/Type1/",
+	"/fonts/TrueType/",
+	"/fonts/freefont/",
 	"/fonts/75dpi/",
 	"/fonts/100dpi/",
 	0 /* end of fontpaths */
@@ -1856,6 +1975,12 @@ static char *XF86Config_fontpathchunk_text =
 "\n"
 "#    Option \"NoTrapSignals\"\n"
 "\n"
+"# Uncomment this to disable the <Crtl><Alt><Fn> VT switch sequence\n"
+"# (where n is 1 through 12).  This allows clients to receive these key\n"
+"# events.\n"
+"\n"
+"#    Option \"DontVTSwitch\"\n"
+"\n"
 "# Uncomment this to disable the <Crtl><Alt><BS> server abort sequence\n"
 "# This allows clients to receive this key event.\n"
 "\n"
@@ -1901,6 +2026,7 @@ static char *XF86Config_fontpathchunk_text =
 "\n"
 "    Identifier	\"Keyboard1\"\n"
 "    Driver	\"Keyboard\"\n"
+"\n"
 "# For most OSs the protocol can be omitted (it defaults to \"Standard\").\n"
 "# When using XQUEUE (only for SVR3 and SVR4, but not Solaris),\n"
 "# uncomment the following line.\n"
@@ -1964,6 +2090,10 @@ static char *pointersection_text1 =
 
 static char *pointersection_text2 =
 "\n"
+"# Mouse-speed setting for PS/2 mouse.\n"
+"\n"
+"#    Option \"Resolution\"	\"256\"\n"
+"\n"
 "# When using XQUEUE, comment out the above two lines, and uncomment\n"
 "# the following line.\n"
 "\n"
@@ -2302,6 +2432,10 @@ static char *serverlayout_section_text2 =
 "    InputDevice \"Keyboard1\" \"CoreKeyboard\"\n"
 "\n"
 "EndSection\n"
+"\n"
+"# Section \"DRI\"\n"
+"#    Mode 0666\n"
+"# EndSection\n"
 "\n";
 
 static void 
@@ -2396,7 +2530,7 @@ write_XF86Config(char *filename)
 	 */
 	fprintf(f, "%s", pointersection_text1);
 	fprintf(f, "    Option \"Protocol\"    \"%s\"\n",
-		mousetype_identifier[config_mousetype]);
+		mouse_info[config_mousetype].name);
 #if !defined(__UNIXOS2__) && !defined(QNX4)
 	fprintf(f, "    Option \"Device\"      \"%s\"\n", config_pointerdevice);
 #endif
diff --git a/xc/programs/Xserver/hw/xfree86/xf8_16bpp/cfbscrinit.c b/xc/programs/Xserver/hw/xfree86/xf8_16bpp/cfbscrinit.c
index d4e7cc8a0..5e19fb7a2 100644
--- a/xc/programs/Xserver/hw/xfree86/xf8_16bpp/cfbscrinit.c
+++ b/xc/programs/Xserver/hw/xfree86/xf8_16bpp/cfbscrinit.c
@@ -4,7 +4,7 @@
    Written by Mark Vojkovich (mvojkovi@ucsd.edu)
 */
 
-/* $XFree86: xc/programs/Xserver/hw/xfree86/xf8_16bpp/cfbscrinit.c,v 1.7 2000/01/21 01:12:24 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/xf8_16bpp/cfbscrinit.c,v 1.8 2003/02/17 16:08:30 dawes Exp $ */
 
 #include "X.h"
 #include "Xmd.h"
@@ -35,7 +35,6 @@
 int cfb8_16ScreenPrivateIndex;
 
 static unsigned long cfb8_16Generation = 0;
-extern WindowPtr *WindowTable;
 
 static PixmapPtr cfb8_16GetWindowPixmap(WindowPtr pWin);
 static void
diff --git a/xc/programs/Xserver/hw/xfree86/xf8_16bpp/cfbwindow.c b/xc/programs/Xserver/hw/xfree86/xf8_16bpp/cfbwindow.c
index b140bda16..3ad8a5809 100644
--- a/xc/programs/Xserver/hw/xfree86/xf8_16bpp/cfbwindow.c
+++ b/xc/programs/Xserver/hw/xfree86/xf8_16bpp/cfbwindow.c
@@ -4,7 +4,7 @@
    Written by Mark Vojkovich (mvojkovi@ucsd.edu)
 */
 
-/* $XFree86: xc/programs/Xserver/hw/xfree86/xf8_16bpp/cfbwindow.c,v 1.3 2001/02/15 19:51:14 eich Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/xf8_16bpp/cfbwindow.c,v 1.4 2003/02/17 16:08:30 dawes Exp $ */
 
 #include "X.h"
 #include "scrnintstr.h"
@@ -22,8 +22,6 @@
 /* We don't bother with cfb's fastBackground/Border so we don't
    need to use the Window privates */
 
-extern WindowPtr *WindowTable;
-
 
 Bool
 cfb8_16CreateWindow(WindowPtr pWin)
diff --git a/xc/programs/Xserver/hw/xfree86/xf8_32bpp/cfbwindow.c b/xc/programs/Xserver/hw/xfree86/xf8_32bpp/cfbwindow.c
index 175e590de..518166f41 100644
--- a/xc/programs/Xserver/hw/xfree86/xf8_32bpp/cfbwindow.c
+++ b/xc/programs/Xserver/hw/xfree86/xf8_32bpp/cfbwindow.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/xf8_32bpp/cfbwindow.c,v 1.6 2000/02/29 00:17:16 mvojkovi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/xf8_32bpp/cfbwindow.c,v 1.7 2003/02/17 16:08:30 dawes Exp $ */
 
 
 #include "X.h"
@@ -18,8 +18,6 @@
 /* We don't bother with cfb's fastBackground/Border so we don't
    need to use the Window privates */
 
-extern WindowPtr *WindowTable;
-
 
 Bool
 cfb8_32CreateWindow(WindowPtr pWin)
diff --git a/xc/programs/Xserver/hw/xnest/Cursor.c b/xc/programs/Xserver/hw/xnest/Cursor.c
index 6915df7a2..c20ec940a 100644
--- a/xc/programs/Xserver/hw/xnest/Cursor.c
+++ b/xc/programs/Xserver/hw/xnest/Cursor.c
@@ -12,6 +12,8 @@ the suitability of this software for any purpose.  It is provided "as
 is" without express or implied warranty.
 
 */
+/* $XFree86: xc/programs/Xserver/hw/xnest/Cursor.c,v 1.3 2002/11/23 19:27:50 tsi Exp $ */
+
 #include "X.h"
 #include "Xproto.h"
 #include "screenint.h"
@@ -26,7 +28,7 @@ is" without express or implied warranty.
 
 #include "Display.h"
 #include "Screen.h"
-#include "Cursor.h"
+#include "XNCursor.h"
 #include "Visual.h"
 #include "Keyboard.h"
 #include "Args.h"
diff --git a/xc/programs/Xserver/hw/xnest/Drawable.h b/xc/programs/Xserver/hw/xnest/Drawable.h
index 47b723731..6f52b286b 100644
--- a/xc/programs/Xserver/hw/xnest/Drawable.h
+++ b/xc/programs/Xserver/hw/xnest/Drawable.h
@@ -12,12 +12,13 @@ the suitability of this software for any purpose.  It is provided "as
 is" without express or implied warranty.
 
 */
+/* $XFree86: xc/programs/Xserver/hw/xnest/Drawable.h,v 1.3 2002/11/23 19:27:50 tsi Exp $ */
 
 #ifndef XNESTDRAWABLE_H
 #define XNESTDRAWABLE_H
 
 #include "XNWindow.h"
-#include "Pixmap.h"
+#include "XNPixmap.h"
 
 #define xnestDrawable(pDrawable) \
   ((pDrawable)->type == DRAWABLE_WINDOW ? \
diff --git a/xc/programs/Xserver/hw/xnest/Imakefile b/xc/programs/Xserver/hw/xnest/Imakefile
index 6f9b96b3a..14cdf713a 100644
--- a/xc/programs/Xserver/hw/xnest/Imakefile
+++ b/xc/programs/Xserver/hw/xnest/Imakefile
@@ -3,7 +3,7 @@ XCOMM $Xorg: Imakefile,v 1.3 2000/08/17 19:53:28 cpqbld Exp $
 
 
 
-XCOMM $XFree86: xc/programs/Xserver/hw/xnest/Imakefile,v 3.25 2002/05/25 08:42:57 alanh Exp $
+XCOMM $XFree86: xc/programs/Xserver/hw/xnest/Imakefile,v 3.27 2003/01/16 16:09:10 eich Exp $
 
 #include <Server.tmpl>
 
@@ -57,10 +57,10 @@ OBJS =	Args.o \
 
 INCLUDES = -I. -I$(XBUILDINCDIR) -I$(FONTINCSRC) \
 	   -I../../mi -I../../include -I../../os \
-           -I$(EXTINCSRC) -I$(XINCLUDESRC)
+           -I$(EXTINCSRC) -I$(XINCLUDESRC) -I$(LIBSRC)
 
 DEFINES = $(OS_DEFINES) $(EXT_DEFINES) -DNO_HW_ONLY_EXTS \
-	  -UXFree86LOADER
+	  -UXFree86LOADER  -UMITSHM
 
 all:: $(OBJS)
 
diff --git a/xc/programs/Xserver/hw/xnest/Init.c b/xc/programs/Xserver/hw/xnest/Init.c
index ed5583e4d..665aec182 100644
--- a/xc/programs/Xserver/hw/xnest/Init.c
+++ b/xc/programs/Xserver/hw/xnest/Init.c
@@ -12,7 +12,7 @@ the suitability of this software for any purpose.  It is provided "as
 is" without express or implied warranty.
 
 */
-/* $XFree86: xc/programs/Xserver/hw/xnest/Init.c,v 3.23 2001/08/01 00:44:57 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xnest/Init.c,v 3.24 2003/01/15 02:34:14 torrey Exp $ */
 
 #include "X.h"
 #include "Xproto.h"
@@ -122,6 +122,22 @@ void
 DarwinHandleGUI(int argc, char *argv[])
 {
 }
+
+void GlxExtensionInit();
+void GlxWrapInitVisuals(void *procPtr);
+
+void
+DarwinGlxExtensionInit()
+{
+    GlxExtensionInit();
+}
+
+void
+DarwinGlxWrapInitVisuals(
+    void *procPtr)
+{
+    GlxWrapInitVisuals(procPtr);
+}
 #endif
 
 void OsVendorInit()
diff --git a/xc/programs/Xserver/hw/xnest/Pixmap.c b/xc/programs/Xserver/hw/xnest/Pixmap.c
index a5fde857a..f93dcac52 100644
--- a/xc/programs/Xserver/hw/xnest/Pixmap.c
+++ b/xc/programs/Xserver/hw/xnest/Pixmap.c
@@ -12,7 +12,7 @@ the suitability of this software for any purpose.  It is provided "as
 is" without express or implied warranty.
 
 */
-/* $XFree86: xc/programs/Xserver/hw/xnest/Pixmap.c,v 3.4 2002/05/14 21:59:38 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xnest/Pixmap.c,v 3.6 2003/01/10 13:29:40 eich Exp $ */
 
 #include "X.h"
 #include "Xproto.h"
@@ -28,7 +28,11 @@ is" without express or implied warranty.
 
 #include "Display.h"
 #include "Screen.h"
-#include "Pixmap.h"
+#include "XNPixmap.h"
+
+#ifdef PIXPRIV
+int xnestPixmapPrivateIndex;	    
+#endif
 
 PixmapPtr xnestCreatePixmap(pScreen, width, height, depth)
     ScreenPtr   pScreen;
@@ -55,8 +59,8 @@ PixmapPtr xnestCreatePixmap(pScreen, width, height, depth)
   pPixmap->refcnt = 1;
   pPixmap->devKind = PixmapBytePad(width, depth);
 #ifdef PIXPRIV
-  pPixmap->devPrivate.ptr = (pointer)((char *)pPixmap +
-				      pScreen->totalPixmapSize);
+  pPixmap->devPrivates[xnestPixmapPrivateIndex].ptr =
+      (pointer)((char *)pPixmap + pScreen->totalPixmapSize);
 #else
   pPixmap->devPrivate.ptr = (pointer)(pPixmap + 1);
 #endif
diff --git a/xc/programs/Xserver/hw/xnest/Screen.c b/xc/programs/Xserver/hw/xnest/Screen.c
index 1a7e078ca..bef6a75dd 100644
--- a/xc/programs/Xserver/hw/xnest/Screen.c
+++ b/xc/programs/Xserver/hw/xnest/Screen.c
@@ -12,7 +12,7 @@ the suitability of this software for any purpose.  It is provided "as
 is" without express or implied warranty.
 
 */
-/* $XFree86: xc/programs/Xserver/hw/xnest/Screen.c,v 3.9 2001/03/23 01:27:09 paulo Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xnest/Screen.c,v 3.11 2003/01/10 13:29:40 eich Exp $ */
 
 #include "X.h"
 #include "Xproto.h"
@@ -27,13 +27,12 @@ is" without express or implied warranty.
 
 #include "Display.h"
 #include "Screen.h"
-#include "Args.h"
 #include "XNGC.h"
 #include "GCOps.h"
 #include "Drawable.h"
 #include "XNFont.h"
 #include "Color.h"
-#include "Cursor.h"
+#include "XNCursor.h"
 #include "Visual.h"
 #include "Events.h"
 #include "Init.h"
@@ -45,6 +44,10 @@ extern Window xnestParentWindow;
 Window xnestDefaultWindows[MAXSCREENS];
 Window xnestScreenSaverWindows[MAXSCREENS];
 
+#ifdef PIXPRIV
+int xnestScreenGeneration = -1;
+#endif
+
 ScreenPtr xnestScreen(window)
      Window window;
 {
@@ -144,6 +147,17 @@ Bool xnestOpenScreen(index, pScreen, argc, argv)
 			    sizeof(xnestPrivGC)))) 
     return False;
 
+#ifdef PIXPRIV
+  if (xnestScreenGeneration != serverGeneration) {
+      if ((xnestPixmapPrivateIndex = AllocatePixmapPrivateIndex()) < 0)
+	  return False;
+      xnestScreenGeneration = serverGeneration;
+  }
+  
+  if (!AllocatePixmapPrivate(pScreen,xnestPixmapPrivateIndex,
+			     sizeof (xnestPrivPixmap)))
+      return False;
+#endif
   visuals = (VisualPtr)xalloc(xnestNumVisuals * sizeof(VisualRec));
   numVisuals = 0;
 
diff --git a/xc/programs/Xserver/hw/xnest/XNCursor.h b/xc/programs/Xserver/hw/xnest/XNCursor.h
new file mode 100644
index 000000000..5bf362e77
--- /dev/null
+++ b/xc/programs/Xserver/hw/xnest/XNCursor.h
@@ -0,0 +1,38 @@
+/* $Xorg: Cursor.h,v 1.3 2000/08/17 19:53:28 cpqbld Exp $ */
+/*
+
+Copyright 1993 by Davor Matic
+
+Permission to use, copy, modify, distribute, and sell this software
+and its documentation for any purpose is hereby granted without fee,
+provided that the above copyright notice appear in all copies and that
+both that copyright notice and this permission notice appear in
+supporting documentation.  Davor Matic makes no representations about
+the suitability of this software for any purpose.  It is provided "as
+is" without express or implied warranty.
+
+*/
+/* $XFree86: xc/programs/Xserver/hw/xnest/XNCursor.h,v 1.2 2002/11/23 19:27:50 tsi Exp $ */
+
+#ifndef XNESTCURSOR_H
+#define XNESTCURSOR_H
+
+typedef struct {
+  Cursor cursor;
+} xnestPrivCursor;
+
+#define xnestCursorPriv(pCursor, pScreen) \
+  ((xnestPrivCursor *)((pCursor)->devPriv[pScreen->myNum]))
+
+#define xnestCursor(pCursor, pScreen) \
+  (xnestCursorPriv(pCursor, pScreen)->cursor)
+
+void xnestConstrainCursor();
+void xnestCursorLimits();
+Bool xnestDisplayCursor();
+Bool xnestRealizeCursor();
+Bool xnestUnrealizeCursor();
+void xnestRecolorCursor();
+Bool xnestSetCursorPosition();
+
+#endif /* XNESTCURSOR_H */
diff --git a/xc/programs/Xserver/hw/xnest/XNPixmap.h b/xc/programs/Xserver/hw/xnest/XNPixmap.h
new file mode 100644
index 000000000..1657ae449
--- /dev/null
+++ b/xc/programs/Xserver/hw/xnest/XNPixmap.h
@@ -0,0 +1,44 @@
+/* $Xorg: Pixmap.h,v 1.3 2000/08/17 19:53:28 cpqbld Exp $ */
+/*
+
+Copyright 1993 by Davor Matic
+
+Permission to use, copy, modify, distribute, and sell this software
+and its documentation for any purpose is hereby granted without fee,
+provided that the above copyright notice appear in all copies and that
+both that copyright notice and this permission notice appear in
+supporting documentation.  Davor Matic makes no representations about
+the suitability of this software for any purpose.  It is provided "as
+is" without express or implied warranty.
+
+*/
+/* $XFree86: xc/programs/Xserver/hw/xnest/XNPixmap.h,v 1.3 2003/01/10 13:29:40 eich Exp $ */
+
+#ifndef XNESTPIXMAP_H
+#define XNESTPIXMAP_H
+
+#ifdef PIXPRIV
+extern int xnestPixmapPrivateIndex;
+#endif
+
+typedef struct {
+  Pixmap pixmap;
+} xnestPrivPixmap;
+
+#ifdef PIXPRIV
+#define xnestPixmapPriv(pPixmap) \
+  ((xnestPrivPixmap *)((pPixmap)->devPrivates[xnestPixmapPrivateIndex].ptr))
+#else
+#define xnestPixmapPriv(pPixmap) \
+  ((xnestPrivPixmap *)((pPixmap)->devPrivate.ptr))
+#endif
+
+#define xnestPixmap(pPixmap) (xnestPixmapPriv(pPixmap)->pixmap)
+
+#define xnestSharePixmap(pPixmap) ((pPixmap)->refcnt++)
+
+PixmapPtr xnestCreatePixmap();
+Bool xnestDestroyPixmap();
+RegionPtr xnestPixmapToRegion();
+
+#endif /* XNESTPIXMAP_H */
diff --git a/xc/programs/Xserver/hw/xwin/Imakefile b/xc/programs/Xserver/hw/xwin/Imakefile
index 9d619501b..08699ab16 100644
--- a/xc/programs/Xserver/hw/xwin/Imakefile
+++ b/xc/programs/Xserver/hw/xwin/Imakefile
@@ -1,5 +1,5 @@
 XCOMM $XConsortium: Imakefile /main/10 1996/12/02 10:20:33 lehors $
-XCOMM $XFree86: xc/programs/Xserver/hw/xwin/Imakefile,v 1.14 2002/10/17 08:18:18 alanh Exp $
+XCOMM $XFree86: xc/programs/Xserver/hw/xwin/Imakefile,v 1.15 2003/02/12 15:01:38 alanh Exp $
 
 #include <Server.tmpl>
 
@@ -44,7 +44,15 @@ SRCS =	InitInput.c \
 	wincreatewnd.c \
 	winregistry.c \
 	winconfig.c \
-	winmsg.c
+	winmsg.c \
+	winmultiwindowwindow.c \
+	winmultiwindowwm.c \
+	winclipboardinit.c \
+	winclipboardtextconv.c \
+	winclipboardthread.c \
+	winclipboardunicode.c \
+	winclipboardwndproc.c \
+	winclipboardxevents.c
 
 /*
  * NOTE: The windialogs.rc file is compiled into windialogs.res.
@@ -89,7 +97,15 @@ OBJS =	InitInput.o \
 	wincreatewnd.o \
 	winregistry.o \
 	winconfig.o \
-	winmsg.o
+	winmsg.o \
+	winmultiwindowwindow.o \
+	winmultiwindowwm.o \
+	winclipboardinit.o \
+	winclipboardtextconv.o \
+	winclipboardthread.o \
+	winclipboardunicode.o \
+	winclipboardwndproc.o \
+	winclipboardxevents.o
 
 INCLUDES = -I. -I$(XBUILDINCDIR) -I$(FONTINCSRC) \
 	   -I$(SERVERSRC)/fb -I$(SERVERSRC)/mi \
diff --git a/xc/programs/Xserver/hw/xwin/InitInput.c b/xc/programs/Xserver/hw/xwin/InitInput.c
index 17b2edee0..a9f69aad5 100644
--- a/xc/programs/Xserver/hw/xwin/InitInput.c
+++ b/xc/programs/Xserver/hw/xwin/InitInput.c
@@ -26,7 +26,7 @@
   from The Open Group.
 
 */
-/* $XFree86: xc/programs/Xserver/hw/xwin/InitInput.c,v 1.11 2002/07/05 09:19:25 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xwin/InitInput.c,v 1.12 2003/02/12 15:01:38 alanh Exp $ */
 
 #include "win.h"
 
@@ -57,14 +57,14 @@ LegalModifier (unsigned int uiKey, DevicePtr pDevice)
 void
 ProcessInputEvents (void)
 {
-#if CYGDEBUG
+#if 0
   ErrorF ("ProcessInputEvents\n");
 #endif
 
   mieqProcessInputEvents ();
   miPointerUpdate ();
 
-#if CYGDEBUG
+#if 0
   ErrorF ("ProcessInputEvents - returning\n");
 #endif
 }
diff --git a/xc/programs/Xserver/hw/xwin/InitOutput.c b/xc/programs/Xserver/hw/xwin/InitOutput.c
index 29db17790..c434e58d1 100644
--- a/xc/programs/Xserver/hw/xwin/InitOutput.c
+++ b/xc/programs/Xserver/hw/xwin/InitOutput.c
@@ -26,7 +26,7 @@ other dealings in this Software without prior written authorization
 from The Open Group.
 
 */
-/* $XFree86: xc/programs/Xserver/hw/xwin/InitOutput.c,v 1.30 2002/10/17 08:18:19 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xwin/InitOutput.c,v 1.32 2003/02/12 15:01:38 alanh Exp $ */
 
 #include "win.h"
 #include "winconfig.h"
@@ -44,12 +44,14 @@ int		g_iScreenPrivateIndex = -1;
 int		g_iCmapPrivateIndex = -1;
 int		g_iGCPrivateIndex = -1;
 int		g_iPixmapPrivateIndex = -1;
+int		g_iWindowPrivateIndex = -1;
 unsigned long	g_ulServerGeneration = 0;
 Bool		g_fInitializedDefaultScreens = FALSE;
 FILE		*g_pfLog = NULL;
 DWORD		g_dwEnginesSupported = 0;
 HINSTANCE	g_hInstance = 0;
 HWND		g_hDlgDepthChange = NULL;
+Bool		g_fCalledSetLocale = FALSE;
 
 
 /*
@@ -114,6 +116,10 @@ winInitializeDefaultScreens (void)
   ZeroMemory (g_ScreenInfo, MAXSCREENS * sizeof (winScreenInfo));
 
   /* Get default width and height */
+  /*
+   * NOTE: These defaults will cause the window to cover only
+   * the primary monitor in the case that we have multiple monitors.
+   */
   dwWidth = GetSystemMetrics (SM_CXSCREEN);
   dwHeight = GetSystemMetrics (SM_CYSCREEN);
 
@@ -128,6 +134,8 @@ winInitializeDefaultScreens (void)
       g_ScreenInfo[i].dwScreen = i;
       g_ScreenInfo[i].dwWidth  = dwWidth;
       g_ScreenInfo[i].dwHeight = dwHeight;
+      g_ScreenInfo[i].dwUserWidth  = dwWidth;
+      g_ScreenInfo[i].dwUserHeight = dwHeight;
       g_ScreenInfo[i].fUserGaveHeightAndWidth
 	=  WIN_DEFAULT_USER_GAVE_HEIGHT_AND_WIDTH;
       g_ScreenInfo[i].dwBPP = WIN_DEFAULT_BPP;
@@ -138,6 +146,9 @@ winInitializeDefaultScreens (void)
       g_ScreenInfo[i].fFullScreen = FALSE;
       g_ScreenInfo[i].fDecoration = TRUE;
       g_ScreenInfo[i].fRootless = FALSE;
+      g_ScreenInfo[i].fMultiWindow = FALSE;
+      g_ScreenInfo[i].fMultipleMonitors = FALSE;
+      g_ScreenInfo[i].fClipboard = FALSE;
       g_ScreenInfo[i].fLessPointer = FALSE;
       g_ScreenInfo[i].fScrollbars = FALSE;
       g_ScreenInfo[i].iE3BTimeout = WIN_E3B_OFF;
@@ -302,6 +313,16 @@ ddxUseMsg (void)
   ErrorF ("-rootless\n"
 	  "\tEXPERIMENTAL: Run the server in pseudo-rootless mode.\n");
 
+  ErrorF ("-multiwindow\n"
+	  "\tEXPERIMENTAL: Run the server in multi-window mode.\n");
+
+  ErrorF ("-multiplemonitors\n"
+	  "\tEXPERIMENTAL: Use the entire virtual screen if multiple\n"
+	  "\tmonitors are present.\n");
+
+  ErrorF ("-clipboard\n"
+	  "\tEXPERIMENTAL: Run the clipboard integration module.\n");
+
   ErrorF ("-scrollbars\n"
 	  "\tIn windowed mode, allow screens bigger than the Windows desktop.\n"
 	  "\tMoreover, if the window has decorations, one can now resize\n"
@@ -436,6 +457,8 @@ ddxProcessArgument (int argc, char *argv[], int i)
 	  g_ScreenInfo[nScreenNum].fUserGaveHeightAndWidth = TRUE;
 	  g_ScreenInfo[nScreenNum].dwWidth = iWidth;
 	  g_ScreenInfo[nScreenNum].dwHeight = iHeight;
+	  g_ScreenInfo[nScreenNum].dwUserWidth = iWidth;
+	  g_ScreenInfo[nScreenNum].dwUserHeight = iHeight;
 	}
       else if (i + 3 < argc
 	       && 1 == sscanf (argv[i + 2], "%d",
@@ -448,6 +471,8 @@ ddxProcessArgument (int argc, char *argv[], int i)
 	  g_ScreenInfo[nScreenNum].fUserGaveHeightAndWidth = TRUE;
 	  g_ScreenInfo[nScreenNum].dwWidth = iWidth;
 	  g_ScreenInfo[nScreenNum].dwHeight = iHeight;
+	  g_ScreenInfo[nScreenNum].dwUserWidth = iWidth;
+	  g_ScreenInfo[nScreenNum].dwUserHeight = iHeight;
 	}
       else
 	{
@@ -652,6 +677,59 @@ ddxProcessArgument (int argc, char *argv[], int i)
     }
 
   /*
+   * Look for the '-multiwindow' argument
+   */
+  if (strcmp (argv[i], "-multiwindow") == 0)
+    {
+      /* Is this parameter attached to a screen or is it global? */
+      if (-1 == g_iLastScreen)
+	{
+	  int			j;
+
+	  /* Parameter is for all screens */
+	  for (j = 0; j < MAXSCREENS; j++)
+	    {
+	      g_ScreenInfo[j].fMultiWindow = TRUE;
+	    }
+	}
+      else
+	{
+	  /* Parameter is for a single screen */
+	  g_ScreenInfo[g_iLastScreen].fMultiWindow = TRUE;
+	}
+
+      /* Indicate that we have processed this argument */
+      return 1;
+    }
+
+  /*
+   * Look for the '-multiplemonitors' argument
+   */
+  if (strcmp (argv[i], "-multiplemonitors") == 0
+      || strcmp (argv[i], "-multimonitors") == 0)
+    {
+      /* Is this parameter attached to a screen or is it global? */
+      if (-1 == g_iLastScreen)
+	{
+	  int			j;
+
+	  /* Parameter is for all screens */
+	  for (j = 0; j < MAXSCREENS; j++)
+	    {
+	      g_ScreenInfo[j].fMultipleMonitors = TRUE;
+	    }
+	}
+      else
+	{
+	  /* Parameter is for a single screen */
+	  g_ScreenInfo[g_iLastScreen].fMultipleMonitors = TRUE;
+	}
+
+      /* Indicate that we have processed this argument */
+      return 1;
+    }
+
+  /*
    * Look for the '-scrollbars' argument
    */
   if (strcmp (argv[i], "-scrollbars") == 0)
@@ -684,6 +762,32 @@ ddxProcessArgument (int argc, char *argv[], int i)
     }
 
   /*
+   * Look for the '-clipboard' argument
+   */
+  if (strcmp (argv[i], "-clipboard") == 0)
+    {
+      /* Is this parameter attached to a screen or is it global? */
+      if (-1 == g_iLastScreen)
+	{
+	  int			j;
+
+	  /* Parameter is for all screens */
+	  for (j = 0; j < MAXSCREENS; j++)
+	    {
+	      g_ScreenInfo[j].fClipboard = TRUE;
+	    }
+	}
+      else
+	{
+	  /* Parameter is for a single screen */
+	  g_ScreenInfo[g_iLastScreen].fClipboard = TRUE;
+	}
+
+      /* Indicate that we have processed this argument */
+      return 1;
+    }
+
+  /*
    * Look for the '-ignoreinput' argument
    */
   if (strcmp (argv[i], "-ignoreinput") == 0)
@@ -1144,9 +1248,14 @@ InitOutput (ScreenInfo *screenInfo, int argc, char *argv[])
   /* Initialize each screen */
   for (i = 0; i < g_iNumScreens; i++)
     {
+      /* Initialize the screen */
       if (-1 == AddScreen (winScreenInit, argc, argv))
 	{
 	  FatalError ("InitOutput - Couldn't add screen %d", i);
 	}
     }
+
+#if CYGDEBUG || YES
+  ErrorF ("InitOutput - Returning.\n");
+#endif
 }
diff --git a/xc/programs/Xserver/hw/xwin/win.h b/xc/programs/Xserver/hw/xwin/win.h
index 1883ebb0d..684e98cc1 100644
--- a/xc/programs/Xserver/hw/xwin/win.h
+++ b/xc/programs/Xserver/hw/xwin/win.h
@@ -29,39 +29,32 @@
  *		Suhaib M Siddiqi
  *		Peter Busch
  *		Harold L Hunt II
- *		MATSUZAKI Kensuke
+ *		Kensuke Matsuzaki
  */
-/* $XFree86: xc/programs/Xserver/hw/xwin/win.h,v 1.31 2002/10/17 08:18:21 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xwin/win.h,v 1.34 2003/02/12 15:01:38 alanh Exp $ */
 
 #ifndef _WIN_H_
 #define _WIN_H_
 
 
 #ifndef NO
-#define NO			0
+#define NO					0
 #endif
 #ifndef YES
-#define YES			1
+#define YES					1
 #endif
 
 /*
  * Build toggles for experimental features
  */
-#define WIN_NATIVE_GDI_SUPPORT		YES
-#define WIN_LAYER_SUPPORT		NO
-#define WIN_NEW_KEYBOARD_SUPPORT	NO
-#define WIN_EMULATE_PSEUDO_SUPPORT	YES
-#define WIN_UPDATE_STATS		NO
+#define WIN_NATIVE_GDI_SUPPORT			YES
+#define WIN_LAYER_SUPPORT			NO
+#define WIN_NEW_KEYBOARD_SUPPORT		NO
+#define WIN_EMULATE_PSEUDO_SUPPORT		YES
+#define WIN_UPDATE_STATS			NO
 
 /* Turn debug messages on or off */
-#define CYGDEBUG		NO
-
-/* Constant strings */
-#define WINDOW_CLASS		"cygwin/xfree86"
-#define WINDOW_TITLE		"Cygwin/XFree86"
-#define WIN_SCR_PROP		"cyg_screen_prop"
-#define WIN_MSG_QUEUE_FNAME	"/dev/windows"
-#define WIN_LOG_FNAME		"/tmp/XWin.log"
+#define CYGDEBUG				NO
 
 #define NEED_EVENTS
 
@@ -84,12 +77,12 @@
 /*
  * Windows only supports 256 color palettes
  */
-#define WIN_NUM_PALETTE_ENTRIES	256
+#define WIN_NUM_PALETTE_ENTRIES			256
 
 /*
  * Number of times to call Restore in an attempt to restore the primary surface
  */
-#define WIN_REGAIN_SURFACE_RETRIES	1
+#define WIN_REGAIN_SURFACE_RETRIES		1
 
 /*
  * Build a supported display depths mask by shifting one to the left
@@ -132,6 +125,7 @@
 #include <sys/stat.h>
 #include <stdio.h>
 #include <errno.h>
+#include <pthread.h>
 
 #include <X11/XWDFile.h>
 
@@ -189,6 +183,13 @@
 #include "winms.h"
 
 
+/*
+ * Multi-Window Window Manager header
+ */
+
+#include "winwindow.h"
+
+
 /* Cygwin's winuser.h does not define VK_KANA as of 28Mar2001 */
 /* NOTE: Cygwin's winuser.h was fixed shortly after 28Mar2001. */
 #ifndef VK_KANA
@@ -286,16 +287,6 @@ typedef Bool (*winReleasePrimarySurfaceProcPtr)(ScreenPtr);
 
 
 /*
- * Window privates
- */
-
-typedef struct
-{
-  DWORD			dwDummy;
-} winPrivWinRec, *winPrivWinPtr;
-
-
-/*
  * GC (graphics context) privates
  */
 
@@ -342,7 +333,7 @@ typedef struct
 {
   DWORD			dwXKeycodes[WIN_MAX_KEYS_PER_KEY];
   DWORD			dwReleaseModifiers;
-} winKeyEventsRec, winKeyEventsPtr;
+} winKeyEventsRec, *winKeyEventsPtr;
 
 #endif /* WIN_NEW_KEYBOARD_SUPPORT */
 
@@ -359,7 +350,12 @@ typedef struct
   Bool			fUserGaveHeightAndWidth;
 
   DWORD			dwScreen;
+  DWORD			dwUserWidth;
+  DWORD			dwUserHeight;
   DWORD			dwWidth;
+  DWORD			dwHeight;
+  DWORD			dwWidth_mm;
+  DWORD			dwHeight_mm;
   DWORD			dwPaddedWidth;
 
   /*
@@ -368,9 +364,6 @@ typedef struct
    * a rounding up of the width.
    */
   DWORD			dwStride;
-  DWORD			dwHeight;
-  DWORD			dwWidth_mm;
-  DWORD			dwHeight_mm;
 
   /* Offset of the screen in the window when using scrollbars */
   DWORD			dwXOffset;
@@ -389,6 +382,9 @@ typedef struct
   Bool			fFullScreen;
   Bool			fDecoration;
   Bool			fRootless;
+  Bool			fMultiWindow;
+  Bool                  fMultipleMonitors;
+  Bool			fClipboard;
   Bool			fLessPointer;
   Bool			fScrollbars;
   int			iE3BTimeout;
@@ -406,7 +402,7 @@ typedef struct
  * Screen privates
  */
 
-typedef struct
+typedef struct _winPrivScreenRec
 {
   winScreenInfoPtr	pScreenInfo;
 
@@ -414,7 +410,7 @@ typedef struct
   Bool			fClosed;
   Bool			fActive;
   Bool			fBadDepth;
-    
+
   int			iDeltaZ;
 
   CloseScreenProcPtr	CloseScreen;
@@ -427,9 +423,13 @@ typedef struct
   DWORD			dwModeKeyStates;
 
   /* Clipboard support */
+  pthread_t		ptClipboardProc;
+
+#if 0
   HWND			hwndNextViewer;
   void			*display;
   int			window;
+#endif
 
   /* Last width, height, and depth of the Windows display */
   DWORD			dwLastWindowsWidth;
@@ -480,6 +480,14 @@ typedef struct
   /* Privates used by both shadow fb DirectDraw servers */
   LPDIRECTDRAWCLIPPER	pddcPrimary;
 
+  /* Privates used by multi-window server */
+  pthread_t		ptWMProc;
+  void			*pWMInfo;
+
+  /* Privates used for any module running in a seperate thread */
+  pthread_mutex_t	pmServerStarted;
+  Bool			fServerStarted;
+  
   /* Engine specific functions */
   winAllocateFBProcPtr			pwinAllocateFB;
   winShadowUpdateProcPtr		pwinShadowUpdate;
@@ -516,7 +524,11 @@ typedef struct
   ClearToBackgroundProcPtr		ClearToBackground;
   ClipNotifyProcPtr			ClipNotify;
   RestackWindowProcPtr			RestackWindow;
-} winPrivScreenRec, *winPrivScreenPtr;
+  ReparentWindowProcPtr			ReparentWindow;
+#ifdef SHAPE
+  SetShapeProcPtr			SetShape;
+#endif
+} winPrivScreenRec;
 
 
 /*
@@ -531,12 +543,14 @@ extern int			g_iScreenPrivateIndex;
 extern int			g_iCmapPrivateIndex;
 extern int			g_iGCPrivateIndex;
 extern int			g_iPixmapPrivateIndex;
+extern int			g_iWindowPrivateIndex;
 extern unsigned long		g_ulServerGeneration;
 extern CARD32			g_c32LastInputEventTime;
 extern DWORD			g_dwEnginesSupported;
 extern HINSTANCE		g_hInstance;
 extern HWND			g_hDlgDepthChange;
 
+
 /*
  * Extern declares for dynamically loaded libraries and function pointers
  */
@@ -609,8 +623,14 @@ extern FARPROC			g_fpTrackMouseEvent;
  * Window privates macros
  */
 
-#define winGetWindowPrivate(_pWin) ((winPrivWin *)\
-	(_pWin)->devPrivates[winWindowPrivateIndex].ptr)
+#define winGetWindowPriv(pWin) \
+	((winPrivWinPtr) (pWin)->devPrivates[g_iWindowPrivateIndex].ptr)
+
+#define winSetWindowPriv(pWin,v) \
+	((pWin)->devPrivates[g_iWindowPrivateIndex].ptr = (pointer) v)
+
+#define winWindowPriv(pWin) \
+	winPrivWinPtr pWinPriv = winGetWindowPriv(pWin)
 
 
 /*
@@ -675,6 +695,16 @@ winPixmapToRegionNativeGDI (PixmapPtr pPix);
 
 
 /*
+ * winclipboardinit.c
+ */
+
+Bool
+winInitClipboard (pthread_t *ptClipboardProc,
+		  pthread_mutex_t *ppmServerStarted,
+		  DWORD dwScreen);
+
+
+/*
  * wincmap.c
  */
 
@@ -905,8 +935,7 @@ winRandRGetInfo (ScreenPtr pScreen, Rotation *pRotations);
 Bool
 winRandRSetConfig (ScreenPtr		pScreen,
 		   Rotation		rotateKind,
-		   RRScreenSizePtr	pSize,
-		   RRVisualGroupPtr	pVisualGroup);
+		   RRScreenSizePtr	pSize);
 
 Bool
 winRandRInit (ScreenPtr pScreen);
@@ -1341,6 +1370,45 @@ winUnmapWindowPRootless (WindowPtr pWindow);
 Bool
 winMapWindowPRootless (WindowPtr pWindow);
 
+#ifdef SHAPE
+void
+winSetShapePRootless (WindowPtr pWindow);
+#endif
+
+
+/*
+ * winmultiwindowwindow.c
+ */
+
+Bool
+winCreateWindowMultiWindow (WindowPtr pWindow);
+
+Bool
+winDestroyWindowMultiWindow (WindowPtr pWindow);
+
+Bool
+winPositionWindowMultiWindow (WindowPtr pWindow, int x, int y);
+
+Bool
+winChangeWindowAttributesMultiWindow (WindowPtr pWindow, unsigned long mask);
+
+Bool
+winUnmapWindowMultiWindow (WindowPtr pWindow);
+
+Bool
+winMapWindowMultiWindow (WindowPtr pWindow);
+
+void
+winReparentWindowMultiWindow (WindowPtr pWin, WindowPtr pPriorParent);
+
+void
+winRestackWindowMultiWindow (WindowPtr pWin, WindowPtr pOldNextSib);
+
+#ifdef SHAPE
+void
+winSetShapeMultiWindow (WindowPtr pWindow);
+#endif
+
 
 /*
  * winwndproc.c
diff --git a/xc/programs/Xserver/hw/xwin/winallpriv.c b/xc/programs/Xserver/hw/xwin/winallpriv.c
index fc32b9c86..a27309598 100644
--- a/xc/programs/Xserver/hw/xwin/winallpriv.c
+++ b/xc/programs/Xserver/hw/xwin/winallpriv.c
@@ -28,7 +28,7 @@
  * Authors:	Keith Packard, MIT X Consortium
  *		Harold L Hunt II
  */
-/* $XFree86: xc/programs/Xserver/hw/xwin/winallpriv.c,v 1.11 2002/10/17 08:18:21 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xwin/winallpriv.c,v 1.12 2002/10/31 23:04:39 alanh Exp $ */
 
 #include "win.h"
 
@@ -60,6 +60,7 @@ winAllocatePrivates (ScreenPtr pScreen)
       g_iScreenPrivateIndex = AllocateScreenPrivateIndex ();
       g_iGCPrivateIndex = AllocateGCPrivateIndex ();
       g_iPixmapPrivateIndex = AllocatePixmapPrivateIndex ();
+      g_iWindowPrivateIndex = AllocateWindowPrivateIndex ();
 
       g_ulServerGeneration = serverGeneration;
     }
@@ -97,6 +98,14 @@ winAllocatePrivates (ScreenPtr pScreen)
       return FALSE;
     }
 
+  /* Reserve Window memory for our privates */
+  if (!AllocateWindowPrivate (pScreen, g_iWindowPrivateIndex,
+			      sizeof (winPrivWinRec)))
+    {
+      ErrorF ("winAllocatePrivates () - AllocateWindowPrivates () failed\n");
+       return FALSE;
+     }
+
   return TRUE;
 }
 
diff --git a/xc/programs/Xserver/hw/xwin/winblock.c b/xc/programs/Xserver/hw/xwin/winblock.c
index f10645662..45d509fea 100644
--- a/xc/programs/Xserver/hw/xwin/winblock.c
+++ b/xc/programs/Xserver/hw/xwin/winblock.c
@@ -27,7 +27,7 @@
  *
  * Authors:	Harold L Hunt II
  */
-/* $XFree86: xc/programs/Xserver/hw/xwin/winblock.c,v 1.5 2002/10/17 08:18:22 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xwin/winblock.c,v 1.6 2003/02/12 15:01:38 alanh Exp $ */
 
 #include "win.h"
 
@@ -41,6 +41,30 @@ winBlockHandler (int nScreen,
   winScreenPriv((ScreenPtr)pBlockData);
   MSG			msg;
 
+  /* Signal threaded modules to begin */
+  if (pScreenPriv != NULL && !pScreenPriv->fServerStarted)
+    {
+      int		iReturn;
+      
+      ErrorF ("winBlockHandler - Releasing pmServerStarted\n");
+
+      /* Flag that modules are to be started */
+      pScreenPriv->fServerStarted = TRUE;
+
+      /* Unlock the mutex for threaded modules */
+      iReturn = pthread_mutex_unlock (&pScreenPriv->pmServerStarted);
+      if (iReturn != 0)
+	{
+	  ErrorF ("winBlockHandler - pthread_mutex_unlock () failed: %d\n",
+		  iReturn);
+	  goto winBlockHandler_ProcessMessages; 
+	}
+
+      ErrorF ("winBlockHandler - pthread_mutex_unlock () returned\n");
+    }
+
+winBlockHandler_ProcessMessages:
+
   /* Process all messages on our queue */
   while (PeekMessage (&msg, NULL, 0, 0, PM_REMOVE))
     {
diff --git a/xc/programs/Xserver/hw/xwin/winclipboard.h b/xc/programs/Xserver/hw/xwin/winclipboard.h
new file mode 100644
index 000000000..6e6cf44a9
--- /dev/null
+++ b/xc/programs/Xserver/hw/xwin/winclipboard.h
@@ -0,0 +1,158 @@
+/*
+ *Copyright (C) 1994-2000 The XFree86 Project, Inc. All Rights Reserved.
+ *
+ *Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ *"Software"), to deal in the Software without restriction, including
+ *without limitation the rights to use, copy, modify, merge, publish,
+ *distribute, sublicense, and/or sell copies of the Software, and to
+ *permit persons to whom the Software is furnished to do so, subject to
+ *the following conditions:
+ *
+ *The above copyright notice and this permission notice shall be
+ *included in all copies or substantial portions of the Software.
+ *
+ *THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ *MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *NONINFRINGEMENT. IN NO EVENT SHALL THE XFREE86 PROJECT BE LIABLE FOR
+ *ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF
+ *CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ *WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ *Except as contained in this notice, the name of the XFree86 Project
+ *shall not be used in advertising or otherwise to promote the sale, use
+ *or other dealings in this Software without prior written authorization
+ *from the XFree86 Project.
+ *
+ * Authors:	Harold Hunt
+ */
+/* $XFree86: xc/programs/Xserver/hw/xwin/winclipboard.h,v 1.1 2003/02/12 15:01:38 alanh Exp $ */
+
+
+#ifndef _WINCLIPBOARD_H_
+#define _WINCLIPBOARD_H_
+
+/* Standard library headers */
+#include <assert.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <unistd.h>
+#include <sys/select.h>
+#include <fcntl.h>
+#include <setjmp.h>
+#include <pthread.h>
+
+/* X headers */
+#include "X.h"
+#include "Xatom.h"
+/* NOTE: For some unknown reason, including Xproto.h solves
+ * tons of problems with including windows.h.  Unknowns reasons
+ * are usually bad, so someone should investigate this.
+ */
+#include "Xproto.h"
+#include "Xutil.h"
+#include "Xlocale.h"
+
+/* Fixups to prevent collisions between Windows and X headers */
+#define ATOM			DWORD
+
+/* Windows headers */
+#include <windows.h>
+
+
+/* Clipboard module constants */
+#define WIN_CLIPBOARD_WINDOW_CLASS		"xwinclip"
+#define WIN_CLIPBOARD_WINDOW_TITLE		"xwinclip"
+#define WIN_MSG_QUEUE_FNAME			"/dev/windows"
+#define WIN_CONNECT_RETRIES			3
+#define WIN_CONNECT_DELAY			4
+#define WIN_JMP_OKAY				0
+#define WIN_JMP_ERROR_IO			2
+
+/*
+ * Argument structure for Clipboard module main thread
+ */
+
+typedef struct _ClipboardProcArgRec {
+  DWORD			dwScreen;
+  pthread_mutex_t	*ppmServerStarted;
+} ClipboardProcArgRec, *ClipboardProcArgPtr;
+
+
+/*
+ * References to external symbols
+ */
+
+extern char *display;
+extern void ErrorF (const char* /*f*/, ...);
+
+
+/*
+ * winclipboardinit.c
+ */
+
+Bool
+winInitClipboard (pthread_t *ptClipboardProc,
+		  pthread_mutex_t *ppmServerStarted,
+		  DWORD dwScreen);
+
+HWND
+winClipboardCreateMessagingWindow ();
+
+
+/*
+ * winclipboardtextconv.c
+ */
+
+void
+winClipboardDOStoUNIX (char *pszData, int iLength);
+
+void
+winClipboardUNIXtoDOS (unsigned char **ppszData, int iLength);
+
+
+/*
+ * winclipboardthread.c
+ */
+
+void *
+winClipboardProc (void *pArg);
+
+
+/*
+ * winclipboardunicode.c
+ */
+
+Bool
+winClipboardDetectUnicodeSupport ();
+
+
+/*
+ * winclipboardwndproc.c
+ */
+
+BOOL
+winClipboardFlushWindowsMessageQueue (HWND hwnd);
+
+LRESULT CALLBACK
+winClipboardWindowProc (HWND hwnd, UINT message, 
+			WPARAM wParam, LPARAM lParam);
+
+
+/*
+ * winclipboardxevents.c
+ */
+
+Bool
+winClipboardFlushXEvents (HWND hwnd,
+			  Atom atomClipboard,
+			  Atom atomLocalProperty,
+			  Atom atomUTF8String,
+			  Atom atomCompoundText,
+			  Atom atomTargets,
+			  Atom atomDeleteWindow,
+			  int iWindow,
+			  Display *pDisplay,
+			  Bool fUnicodeSupport);
+#endif
diff --git a/xc/programs/Xserver/hw/xwin/winclipboardinit.c b/xc/programs/Xserver/hw/xwin/winclipboardinit.c
new file mode 100644
index 000000000..22c068c48
--- /dev/null
+++ b/xc/programs/Xserver/hw/xwin/winclipboardinit.c
@@ -0,0 +1,117 @@
+/*
+ *Copyright (C) 1994-2000 The XFree86 Project, Inc. All Rights Reserved.
+ *
+ *Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ *"Software"), to deal in the Software without restriction, including
+ *without limitation the rights to use, copy, modify, merge, publish,
+ *distribute, sublicense, and/or sell copies of the Software, and to
+ *permit persons to whom the Software is furnished to do so, subject to
+ *the following conditions:
+ *
+ *The above copyright notice and this permission notice shall be
+ *included in all copies or substantial portions of the Software.
+ *
+ *THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ *MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *NONINFRINGEMENT. IN NO EVENT SHALL THE XFREE86 PROJECT BE LIABLE FOR
+ *ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF
+ *CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ *WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ *Except as contained in this notice, the name of the XFree86 Project
+ *shall not be used in advertising or otherwise to promote the sale, use
+ *or other dealings in this Software without prior written authorization
+ *from the XFree86 Project.
+ *
+ * Authors:	Harold L Hunt II
+ */
+/* $XFree86: xc/programs/Xserver/hw/xwin/winclipboardinit.c,v 1.1 2003/02/12 15:01:38 alanh Exp $ */
+
+#include "winclipboard.h"
+
+
+/*
+ * Intialize the Clipboard module
+ */
+
+Bool
+winInitClipboard (pthread_t *ptClipboardProc,
+		  pthread_mutex_t *ppmServerStarted,
+		  DWORD dwScreen)
+{
+  ClipboardProcArgPtr		pArg;
+
+  ErrorF ("winInitClipboard ()\n");
+
+  /* Allocate the parameter structure */
+  pArg = (ClipboardProcArgPtr) malloc (sizeof (ClipboardProcArgRec));
+  if (pArg == NULL)
+    {
+      ErrorF ("winInitClipboard - malloc for ClipboardProcArgRec failed.\n");
+      return FALSE;
+    }
+  
+  /* Setup the argument structure for the thread function */
+  pArg->dwScreen = dwScreen;
+  pArg->ppmServerStarted = ppmServerStarted;
+
+  /* Spawn a thread for the Clipboard module */
+  if (pthread_create (ptClipboardProc, NULL, winClipboardProc, pArg))
+    {
+      /* Bail if thread creation failed */
+      ErrorF ("winInitClipboard - pthread_create failed.\n");
+      return FALSE;
+    }
+
+  return TRUE;
+}
+
+
+/*
+ * Create the Windows window that we use to recieve Windows messages
+ */
+
+HWND
+winClipboardCreateMessagingWindow ()
+{
+  WNDCLASS		wc;
+  HWND			hwnd;
+
+  /* Setup our window class */
+  wc.style = CS_HREDRAW | CS_VREDRAW;
+  wc.lpfnWndProc = winClipboardWindowProc;
+  wc.cbClsExtra = 0;
+  wc.cbWndExtra = 0;
+  wc.hInstance = GetModuleHandle (NULL);
+  wc.hIcon = 0;
+  wc.hCursor = 0;
+  wc.hbrBackground = (HBRUSH) GetStockObject (WHITE_BRUSH);
+  wc.lpszMenuName = NULL;
+  wc.lpszClassName = WIN_CLIPBOARD_WINDOW_CLASS;
+  RegisterClass (&wc);
+
+  /* Create the window */
+  hwnd = CreateWindowExA (0,			/* Extended styles */
+			  WIN_CLIPBOARD_WINDOW_CLASS,/* Class name */
+			  WIN_CLIPBOARD_WINDOW_TITLE,/* Window name */
+			  WS_OVERLAPPED,	/* Not visible anyway */
+			  CW_USEDEFAULT,	/* Horizontal position */
+			  CW_USEDEFAULT,	/* Vertical position */
+			  CW_USEDEFAULT,	/* Right edge */
+			  CW_USEDEFAULT,	/* Bottom edge */
+			  (HWND) NULL,		/* No parent or owner window */
+			  (HMENU) NULL,		/* No menu */
+			  GetModuleHandle (NULL),/* Instance handle */
+			  NULL);		/* ScreenPrivates */
+  assert (hwnd != NULL);
+
+  /* I'm not sure, but we may need to call this to start message processing */
+  ShowWindow (hwnd, SW_HIDE);
+
+  /* Similarly, we may need a call to this even though we don't paint */
+  UpdateWindow (hwnd);
+
+  return hwnd;
+}
diff --git a/xc/programs/Xserver/hw/xwin/winclipboardtextconv.c b/xc/programs/Xserver/hw/xwin/winclipboardtextconv.c
new file mode 100644
index 000000000..f97681c5f
--- /dev/null
+++ b/xc/programs/Xserver/hw/xwin/winclipboardtextconv.c
@@ -0,0 +1,153 @@
+/*
+ *Copyright (C) 1994-2000 The XFree86 Project, Inc. All Rights Reserved.
+ *
+ *Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ *"Software"), to deal in the Software without restriction, including
+ *without limitation the rights to use, copy, modify, merge, publish,
+ *distribute, sublicense, and/or sell copies of the Software, and to
+ *permit persons to whom the Software is furnished to do so, subject to
+ *the following conditions:
+ *
+ *The above copyright notice and this permission notice shall be
+ *included in all copies or substantial portions of the Software.
+ *
+ *THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ *MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *NONINFRINGEMENT. IN NO EVENT SHALL THE XFREE86 PROJECT BE LIABLE FOR
+ *ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF
+ *CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ *WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ *Except as contained in this notice, the name of the XFree86 Project
+ *shall not be used in advertising or otherwise to promote the sale, use
+ *or other dealings in this Software without prior written authorization
+ *from the XFree86 Project.
+ *
+ * Authors:	Harold L Hunt II
+ */
+/* $XFree86: xc/programs/Xserver/hw/xwin/winclipboardtextconv.c,v 1.1 2003/02/12 15:01:38 alanh Exp $ */
+
+#include "win.h"
+#include <stdio.h>
+#include <stdlib.h>
+
+
+/*
+ * Convert \r\n to \n
+ *
+ * NOTE: This was heavily inspired by, if not down right stolen from,
+ *       Cygwin's winsup/cygwin/fhandler.cc/fhandler_base::read ()
+ */
+
+void
+winClipboardDOStoUNIX (char *pszSrc, int iLength)
+{
+  char			*pszDest = pszSrc;
+  char			*pszEnd = pszSrc + iLength;
+
+  /* Loop until the last character */
+  while (pszSrc < pszEnd)
+    {
+      /* Copy the current source character to current destination character */
+      *pszDest = *pszSrc;
+
+      /* Advance to the next source character */
+      pszSrc++;
+
+      /* Don't advance the destination character if we need to drop an \r */
+      if (*pszDest != '\r' || *pszSrc != '\n')
+	pszDest++;
+    }
+
+  /* Move the terminating null */
+  *pszDest = '\0';
+}
+
+
+/*
+ * Convert \n to \r\n
+ */
+
+void
+winClipboardUNIXtoDOS (unsigned char **ppszData, int iLength)
+{
+  int			iNewlineCount = 0;
+  unsigned char		*pszSrc = *ppszData;
+  unsigned char		*pszEnd = pszSrc + iLength;
+  unsigned char		*pszDest = NULL, *pszDestBegin = NULL;
+
+#if 0
+  ErrorF ("UNIXtoDOS () - Original data:\n%s\n", *ppszData);
+#endif
+
+  /* Count \n characters without leading \r */
+  while (pszSrc < pszEnd)
+    {
+      /* Skip ahead two character if found set of \r\n */
+      if (*pszSrc == '\r' && pszSrc + 1 < pszEnd && *(pszSrc + 1) == '\n')
+	{
+	  pszSrc += 2;
+	  continue;
+	} 
+
+      /* Increment the count if found naked \n */
+      if (*pszSrc == '\n')
+	{
+	  iNewlineCount++;
+	}
+
+      pszSrc++;
+    }
+  
+  /* Return if no naked \n's */
+  if (iNewlineCount == 0)
+    return;
+
+  /* Allocate a new string */
+  pszDestBegin = pszDest = malloc (iLength + iNewlineCount + 1);
+
+  /* Set source pointer to beginning of data string */
+  pszSrc = *ppszData;
+
+  /* Loop through all characters in source string */
+  while (pszSrc < pszEnd)
+    {
+      /* Copy line endings that are already valid */
+      if (*pszSrc == '\r' && pszSrc + 1 < pszEnd && *(pszSrc + 1) == '\n')
+	{
+	  *pszDest = *pszSrc;
+	  *(pszDest + 1) = *(pszSrc + 1);
+	  pszDest += 2;
+	  pszSrc += 2;
+	  continue;
+	}
+
+      /* Add \r to naked \n's */
+      if (*pszSrc == '\n')
+	{
+	  *pszDest = '\r';
+	  *(pszDest + 1) = *pszSrc;
+	  pszDest += 2;
+	  pszSrc += 1;
+	  continue;
+	}
+
+      /* Copy normal characters */
+      *pszDest = *pszSrc;
+      pszSrc++;
+      pszDest++;
+    }
+
+  /* Put terminating null at end of new string */
+  *pszDest = '\0';
+
+  /* Swap string pointers */
+  free (*ppszData);
+  *ppszData = pszDestBegin;
+
+#if 0
+  ErrorF ("UNIXtoDOS () - Final string:\n%s\n", pszDestBegin);
+#endif
+}
diff --git a/xc/programs/Xserver/hw/xwin/winclipboardthread.c b/xc/programs/Xserver/hw/xwin/winclipboardthread.c
new file mode 100644
index 000000000..ce4590b98
--- /dev/null
+++ b/xc/programs/Xserver/hw/xwin/winclipboardthread.c
@@ -0,0 +1,463 @@
+/*
+ *Copyright (C) 1994-2000 The XFree86 Project, Inc. All Rights Reserved.
+ *
+ *Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ *"Software"), to deal in the Software without restriction, including
+ *without limitation the rights to use, copy, modify, merge, publish,
+ *distribute, sublicense, and/or sell copies of the Software, and to
+ *permit persons to whom the Software is furnished to do so, subject to
+ *the following conditions:
+ *
+ *The above copyright notice and this permission notice shall be
+ *included in all copies or substantial portions of the Software.
+ *
+ *THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ *MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *NONINFRINGEMENT. IN NO EVENT SHALL THE XFREE86 PROJECT BE LIABLE FOR
+ *ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF
+ *CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ *WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ *Except as contained in this notice, the name of the XFree86 Project
+ *shall not be used in advertising or otherwise to promote the sale, use
+ *or other dealings in this Software without prior written authorization
+ *from the XFree86 Project.
+ *
+ * Authors:	Harold L Hunt II
+ */
+/* $XFree86: xc/programs/Xserver/hw/xwin/winclipboardthread.c,v 1.1 2003/02/12 15:01:38 alanh Exp $ */
+
+#include "winclipboard.h"
+
+/*
+ * References to external symbols
+ */
+
+extern Bool g_fCalledSetLocale;
+
+
+/*
+ * Global variables
+ */
+
+static jmp_buf			g_jmpEntry;
+
+
+/*
+ * Local function prototypes
+ */
+
+static int
+winClipboardErrorHandler (Display *pDisplay, XErrorEvent *pErr);
+
+static int
+winClipboardIOErrorHandler (Display *pDisplay);
+
+
+/*
+ * Main thread function
+ */
+
+void *
+winClipboardProc (void *pArg)
+{
+  Atom			atomClipboard, atomClipboardManager;
+  Atom			atomLocalProperty, atomCompoundText;
+  Atom			atomUTF8String, atomTargets;
+  int			iReturn;
+  HWND			hwnd = NULL;
+  int			iConnectionNumber;
+  int			fdMessageQueue;
+  fd_set		fdsRead;
+  int			iMaxDescriptor;
+  Display		*pDisplay;
+  Window		iWindow;
+  Atom			atomDeleteWindow;
+  Bool			fReturn;
+  int			iRetries;
+  Bool			fUnicodeSupport;
+  char			szDisplay[512];
+  int			i;
+  ClipboardProcArgPtr	pProcArg = (ClipboardProcArgPtr) pArg;
+
+  ErrorF ("winClipboardProc - Hello\n");
+
+  /* Check that argument pointer is not invalid */
+  if (pArg == NULL)
+    {
+      ErrorF ("winClipboardProc - pArg is NULL, bailing.\n");
+      pthread_exit (NULL);
+    }
+
+  ErrorF ("winClipboardProc - Calling pthread_mutex_lock ()\n");
+
+  /* Grab our garbage mutex to satisfy pthread_cond_wait */
+  iReturn = pthread_mutex_lock (pProcArg->ppmServerStarted);
+  if (iReturn != 0)
+    {
+      ErrorF ("winClipboardProc - pthread_mutex_lock () failed: %d\n",
+	      iReturn);
+      pthread_exit (NULL);
+    }
+
+  ErrorF ("winClipboardProc - pthread_mutex_lock () returned.\n");
+
+  /* Do we have Unicode support? */
+  fUnicodeSupport = winClipboardDetectUnicodeSupport ();
+
+  /* Set the current locale?  What does this do? */
+  if (fUnicodeSupport && !g_fCalledSetLocale)
+    {
+      ErrorF ("winClipboardProc - Calling setlocale ()\n");
+      if (!setlocale (LC_ALL, ""))
+	{
+	  ErrorF ("winClipboardProc - setlocale () error\n");
+	  pthread_exit (NULL);
+	}
+      ErrorF ("winClipboardProc - setlocale () returned\n");
+
+      /* See if X supports the current locale */
+      if (XSupportsLocale () == False)
+	{
+	  ErrorF ("winClipboardProc - Locale not supported by X\n");
+	  pthread_exit (NULL);
+	}
+    }
+
+  /* Flag that we have called setlocale */
+  g_fCalledSetLocale = TRUE;
+
+  /* Release the garbage mutex */
+  pthread_mutex_unlock (pProcArg->ppmServerStarted);
+
+  ErrorF ("winClipboardProc - pthread_mutex_unlock () returned.\n");
+
+  /* Allow multiple threads to access Xlib */
+  if (XInitThreads () == 0)
+    {
+      ErrorF ("winClipboardProc - XInitThreads failed.\n");
+      pthread_exit (NULL);
+    }
+
+  ErrorF ("winClipboardProc - XInitThreads () returned.\n");
+
+  /* Set jump point for Error exits */
+  iReturn = setjmp (g_jmpEntry);
+  
+  /* Check if we should continue operations */
+  if (iReturn != WIN_JMP_ERROR_IO
+      && iReturn != WIN_JMP_OKAY)
+    {
+      /* setjmp returned an unknown value, exit */
+      ErrorF ("winClipboardProc - setjmp returned: %d exiting\n",
+	      iReturn);
+      pthread_exit (NULL);
+    }
+  else if (iReturn == WIN_JMP_ERROR_IO)
+    {
+      ErrorF ("winClipboardProc - setjmp returned and hwnd: %08x\n", hwnd);
+    }
+
+  /* Initialize retry count */
+  iRetries = 0;
+
+#if 0
+  /* Setup the display connection string x */
+  snprintf (szDisplay, 512, "127.0.0.1:%s.%d", display, pProcArg->dwScreen);
+#else
+  /* Setup the display connection string x */
+  snprintf (szDisplay, 512, ":%s.%d", display, pProcArg->dwScreen);
+#endif
+
+  /* Print the display connection string */
+  ErrorF ("winClipboardProc - DISPLAY=%s\n", szDisplay);
+
+  /* Open the X display */
+  do
+    {
+      pDisplay = XOpenDisplay (szDisplay);
+      if (pDisplay == NULL)
+	{
+	  ErrorF ("winClipboardProc - Could not open display, "
+		  "try: %d, sleeping: %d\n",
+		  iRetries + 1, WIN_CONNECT_DELAY);
+	  ++iRetries;
+	  sleep (WIN_CONNECT_DELAY);
+	  continue;
+	}
+      else
+	break;
+    }
+  while (pDisplay == NULL && iRetries < WIN_CONNECT_RETRIES);
+
+  /* Make sure that the display opened */
+  if (pDisplay == NULL)
+    {
+      ErrorF ("winClipboardProc - Failed opening the display, giving up\n");
+      pthread_exit (NULL);
+    }
+
+  ErrorF ("winClipboardProc - XOpenDisplay () returned and "
+	  "successfully opened the display.\n");
+
+  /* Create Windows messaging window */
+  hwnd = winClipboardCreateMessagingWindow ();
+
+  /* Get our connection number */
+  iConnectionNumber = ConnectionNumber (pDisplay);
+
+  /* Open a file descriptor for the windows message queue */
+  fdMessageQueue = open (WIN_MSG_QUEUE_FNAME, O_RDONLY);
+  if (fdMessageQueue == -1)
+    {
+      ErrorF ("winClipboardProc - Failed opening %s\n", WIN_MSG_QUEUE_FNAME);
+      pthread_exit (NULL);
+    }
+
+  /* Find max of our file descriptors */
+  iMaxDescriptor = max (fdMessageQueue, iConnectionNumber) + 1;
+
+  /* Select event types to watch */
+  if (XSelectInput (pDisplay,
+		    DefaultRootWindow (pDisplay),
+		    SubstructureNotifyMask |
+		    StructureNotifyMask |
+		    PropertyChangeMask) == BadWindow)
+    ErrorF ("winClipboardProc - XSelectInput generated BadWindow "
+	    "on RootWindow\n\n");
+
+  /* Create a messaging window */
+  iWindow = XCreateSimpleWindow (pDisplay,
+				 DefaultRootWindow (pDisplay),
+				 1, 1,
+				 500, 500,
+				 0,
+				 BlackPixel (pDisplay, 0),
+				 BlackPixel (pDisplay, 0));
+  if (iWindow == 0)
+    {
+      ErrorF ("winClipboardProc - Could not create a window\n");
+      pthread_exit (NULL);
+    }
+
+  /* This looks like our only hope for getting a message before shutdown */
+  /* Register for WM_DELETE_WINDOW message from window manager */
+  atomDeleteWindow = XInternAtom (pDisplay, "WM_DELETE_WINDOW", False);
+  XSetWMProtocols (pDisplay, iWindow, &atomDeleteWindow, 1);
+
+  /* Set error handler */
+  XSetErrorHandler (winClipboardErrorHandler);
+  XSetIOErrorHandler (winClipboardIOErrorHandler);
+
+  /* Create an atom for CLIPBOARD_MANAGER */
+  atomClipboardManager = XInternAtom (pDisplay, "CLIPBOARD_MANAGER", False);
+  if (atomClipboardManager == None)
+    {
+      ErrorF ("winClipboardProc - Could not create CLIPBOARD_MANAGER atom\n");
+      pthread_exit (NULL);
+    }
+
+  /* Assert ownership of CLIPBOARD_MANAGER */
+  iReturn = XSetSelectionOwner (pDisplay, atomClipboardManager,
+				iWindow, CurrentTime);
+  if (iReturn == BadAtom || iReturn == BadWindow)
+    {
+      ErrorF ("winClipboardProc - Could not set CLIPBOARD_MANAGER owner\n");
+      pthread_exit (NULL);
+    }
+
+  /* Create an atom for CLIPBOARD */
+  atomClipboard = XInternAtom (pDisplay, "CLIPBOARD", False);
+  if (atomClipboard == None)
+    {
+      ErrorF ("winClipboardProc - Could not create CLIPBOARD atom\n");
+      pthread_exit (NULL);
+    }
+
+  /* Assert ownership of CLIPBOARD */
+  iReturn = XSetSelectionOwner (pDisplay, atomClipboard,
+				iWindow, CurrentTime);
+  if (iReturn == BadAtom || iReturn == BadWindow)
+    {
+      ErrorF ("winClipboardProc - Could not set CLIPBOARD owner\n");
+      pthread_exit (NULL);
+    }
+
+  /* Assert ownership of PRIMARY */
+  iReturn = XSetSelectionOwner (pDisplay, XA_PRIMARY,
+				iWindow, CurrentTime);
+  if (iReturn == BadAtom || iReturn == BadWindow)
+    {
+      ErrorF ("winClipboardProc - Could not set PRIMARY owner\n");
+      pthread_exit (NULL);
+    }
+
+  /* Local property to hold pasted data */
+  atomLocalProperty = XInternAtom (pDisplay, "CYGX_CUT_BUFFER", False);
+  if (atomLocalProperty == None)
+    {
+      ErrorF ("winClipboardProc - Could not create CYGX_CUT_BUFFER atom\n");
+      pthread_exit (NULL);
+    }
+
+  /* Create an atom for UTF8_STRING */
+  atomUTF8String = XInternAtom (pDisplay, "UTF8_STRING", False);
+  if (atomUTF8String == None)
+    {
+      ErrorF ("winClipboardProc - Could not create UTF8_STRING atom\n");
+      pthread_exit (NULL);
+    }
+
+  /* Create an atom for COMPOUND_TEXT */
+  atomCompoundText = XInternAtom (pDisplay, "COMPOUND_TEXT", False);
+  if (atomCompoundText == None)
+    {
+      ErrorF ("winClipboardProc - Could not create COMPOUND_TEXT atom\n");
+      pthread_exit (NULL);
+    }
+
+  /* Create an atom for TARGETS */
+  atomTargets = XInternAtom (pDisplay, "TARGETS", False);
+  if (atomTargets == None)
+    {
+      ErrorF ("winClipboardProc - Could not create TARGETS atom\n");
+      pthread_exit (NULL);
+    }
+
+  /* Pre-flush X events */
+  /* 
+   * NOTE: Apparently you'll freeze if you don't do this,
+   *	   because there may be events in local data structures
+   *	   already.
+   */
+  winClipboardFlushXEvents (hwnd,
+			    atomClipboard,
+			    atomLocalProperty,
+			    atomUTF8String,
+			    atomCompoundText,
+			    atomTargets,
+			    atomDeleteWindow,
+			    iWindow,
+			    pDisplay,
+			    fUnicodeSupport);
+
+  /* Pre-flush Windows messages */
+  if (!winClipboardFlushWindowsMessageQueue (hwnd))
+    return 0;
+
+  /* Loop for X events */
+  while (1)
+    {
+      /* Setup the file descriptor set */
+      /*
+       * NOTE: You have to do this before every call to select
+       *       because select modifies the mask to indicate
+       *       which descriptors are ready.
+       */
+      FD_ZERO (&fdsRead);
+      FD_SET (fdMessageQueue, &fdsRead);
+      FD_SET (iConnectionNumber, &fdsRead);
+
+      /* Wait for a Windows event or an X event */
+      iReturn = select (iMaxDescriptor,	/* Highest fds number */
+			&fdsRead,	/* Read mask */
+			NULL,		/* No write mask */
+			NULL,		/* No exception mask */
+			NULL);		/* No timeout */
+      if (iReturn <= 0)
+	{
+	  ErrorF ("winClipboardProc - Call to select () failed: %d.  "
+		  "Bailing.\n", iReturn);
+	  break;
+	}
+      
+      /* Branch on which descriptor became active */
+      if (FD_ISSET (iConnectionNumber, &fdsRead))
+	{
+	  /* X event ready */
+#if 0
+	  ErrorF ("winClipboardProc - X event ready\n");
+#endif
+
+	  /* Process X events */
+	  /* Exit when we see that server is shutting down */
+	  fReturn = winClipboardFlushXEvents (hwnd,
+					      atomClipboard,
+					      atomLocalProperty,
+					      atomUTF8String,
+					      atomCompoundText,
+					      atomTargets,
+					      atomDeleteWindow,
+					      iWindow,
+					      pDisplay,
+					      fUnicodeSupport);
+	  if (!fReturn)
+	    {
+	      ErrorF ("winClipboardProc - Caught WM_DELETE_WINDOW - "
+		      "shutting down\n");
+	      break;
+	    }
+	}
+
+      /* Check for Windows event ready */
+      if (FD_ISSET (fdMessageQueue, &fdsRead))
+	{
+	  /* Windows event ready */
+#if 0
+	  ErrorF ("winClipboardProc - Windows event ready\n");
+#endif
+	  
+	  /* Process Windows messages */
+	  if (!winClipboardFlushWindowsMessageQueue (hwnd))
+	    break;
+	}
+    }
+
+  return 0;
+}
+
+
+/*
+ * winClipboardErrorHandler - Our application specific error handler
+ */
+
+static int
+winClipboardErrorHandler (Display *pDisplay, XErrorEvent *pErr)
+{
+  char pszErrorMsg[100];
+  
+  XGetErrorText (pDisplay,
+		 pErr->error_code,
+		 pszErrorMsg,
+		 sizeof (pszErrorMsg));
+  ErrorF ("winClipboardErrorHandler - ERROR: \n\t%s\n", pszErrorMsg);
+
+  if (pErr->error_code==BadWindow
+      || pErr->error_code==BadMatch
+      || pErr->error_code==BadDrawable)
+    {
+      pthread_exit (NULL);
+    }
+
+  pthread_exit (NULL);
+
+  return 0;
+}
+
+
+/*
+ * winClipboardIOErrorHandler - Our application specific IO error handler
+ */
+
+static int
+winClipboardIOErrorHandler (Display *pDisplay)
+{
+  printf ("\nwinClipboardIOErrorHandler!\n\n");
+
+  /* Restart at the main entry point */
+  longjmp (g_jmpEntry, WIN_JMP_ERROR_IO);
+  
+  return 0;
+}
diff --git a/xc/programs/Xserver/hw/xwin/winclipboardunicode.c b/xc/programs/Xserver/hw/xwin/winclipboardunicode.c
new file mode 100644
index 000000000..fdbcb8e69
--- /dev/null
+++ b/xc/programs/Xserver/hw/xwin/winclipboardunicode.c
@@ -0,0 +1,68 @@
+/*
+ *Copyright (C) 1994-2000 The XFree86 Project, Inc. All Rights Reserved.
+ *
+ *Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ *"Software"), to deal in the Software without restriction, including
+ *without limitation the rights to use, copy, modify, merge, publish,
+ *distribute, sublicense, and/or sell copies of the Software, and to
+ *permit persons to whom the Software is furnished to do so, subject to
+ *the following conditions:
+ *
+ *The above copyright notice and this permission notice shall be
+ *included in all copies or substantial portions of the Software.
+ *
+ *THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ *MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *NONINFRINGEMENT. IN NO EVENT SHALL THE XFREE86 PROJECT BE LIABLE FOR
+ *ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF
+ *CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ *WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ *Except as contained in this notice, the name of the XFree86 Project
+ *shall not be used in advertising or otherwise to promote the sale, use
+ *or other dealings in this Software without prior written authorization
+ *from the XFree86 Project.
+ *
+ * Authors:	Harold L Hunt II
+ */
+/* $XFree86: xc/programs/Xserver/hw/xwin/winclipboardunicode.c,v 1.1 2003/02/12 15:01:38 alanh Exp $ */
+
+#include "win.h"
+
+
+/*
+ * Determine whether we suport Unicode or not.
+ * NOTE: Currently, just check if we are on an NT-based platform or not.
+ */
+
+Bool
+winClipboardDetectUnicodeSupport ()
+{
+  Bool			fReturn = FALSE;
+  OSVERSIONINFO		osvi;
+  
+  /* Get operating system version information */
+  ZeroMemory (&osvi, sizeof (osvi));
+  osvi.dwOSVersionInfoSize = sizeof (osvi);
+  GetVersionEx (&osvi);
+
+  /* Branch on platform ID */
+  switch (osvi.dwPlatformId)
+    {
+    case VER_PLATFORM_WIN32_NT:
+      /* Engine 4 is supported on NT only */
+      ErrorF ("DetectUnicodeSupport - Windows NT/2000/XP\n");
+      fReturn = TRUE;
+      break;
+
+    case VER_PLATFORM_WIN32_WINDOWS:
+      /* Engine 4 is supported on NT only */
+      ErrorF ("DetectUnicodeSupport - Windows 95/98/Me\n");
+      fReturn = FALSE;
+      break;
+    }
+
+  return fReturn;
+}
diff --git a/xc/programs/Xserver/hw/xwin/winclipboardwndproc.c b/xc/programs/Xserver/hw/xwin/winclipboardwndproc.c
new file mode 100644
index 000000000..d27bb4861
--- /dev/null
+++ b/xc/programs/Xserver/hw/xwin/winclipboardwndproc.c
@@ -0,0 +1,86 @@
+/*
+ *Copyright (C) 1994-2000 The XFree86 Project, Inc. All Rights Reserved.
+ *
+ *Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ *"Software"), to deal in the Software without restriction, including
+ *without limitation the rights to use, copy, modify, merge, publish,
+ *distribute, sublicense, and/or sell copies of the Software, and to
+ *permit persons to whom the Software is furnished to do so, subject to
+ *the following conditions:
+ *
+ *The above copyright notice and this permission notice shall be
+ *included in all copies or substantial portions of the Software.
+ *
+ *THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ *MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *NONINFRINGEMENT. IN NO EVENT SHALL THE XFREE86 PROJECT BE LIABLE FOR
+ *ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF
+ *CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ *WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ *Except as contained in this notice, the name of the XFree86 Project
+ *shall not be used in advertising or otherwise to promote the sale, use
+ *or other dealings in this Software without prior written authorization
+ *from the XFree86 Project.
+ *
+ * Authors:	Harold L Hunt II
+ */
+/* $XFree86: xc/programs/Xserver/hw/xwin/winclipboardwndproc.c,v 1.1 2003/02/12 15:01:38 alanh Exp $ */
+
+#include "winclipboard.h"
+
+
+/*
+ * Process a given Windows message
+ */
+
+LRESULT CALLBACK
+winClipboardWindowProc (HWND hwnd, UINT message, 
+			WPARAM wParam, LPARAM lParam)
+{
+  /* Branch on message type */
+  switch (message)
+    {
+    case WM_DESTROY:
+      PostQuitMessage (0);
+      return 0;
+
+    case WM_CREATE:
+#if 0
+      ErrorF ("WindowProc - WM_CREATE\n");
+#endif
+      return 0;
+    }
+
+  /* Let Windows perform default processing for unhandled messages */
+  return DefWindowProc (hwnd, message, wParam, lParam);
+}
+
+
+/*
+ * Process any pending Windows messages
+ */
+
+BOOL
+winClipboardFlushWindowsMessageQueue (HWND hwnd)
+{
+  MSG			msg;
+
+  /* Flush the messaging window queue */
+  /* NOTE: Do not pass the hwnd of our messaging window to PeekMessage,
+   * as this will filter out many non-window-specific messages that
+   * are sent to our thread, such as WM_QUIT.
+   */
+  while (PeekMessage (&msg, NULL, 0, 0, PM_REMOVE))
+    {
+      /* Dispatch the message if not WM_QUIT */
+      if (msg.message == WM_QUIT)
+	return FALSE;
+      else
+	DispatchMessage (&msg);
+    }
+  
+  return TRUE;
+}
diff --git a/xc/programs/Xserver/hw/xwin/winclipboardxevents.c b/xc/programs/Xserver/hw/xwin/winclipboardxevents.c
new file mode 100644
index 000000000..a09c7c185
--- /dev/null
+++ b/xc/programs/Xserver/hw/xwin/winclipboardxevents.c
@@ -0,0 +1,722 @@
+/*
+ *Copyright (C) 1994-2000 The XFree86 Project, Inc. All Rights Reserved.
+ *
+ *Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ *"Software"), to deal in the Software without restriction, including
+ *without limitation the rights to use, copy, modify, merge, publish,
+ *distribute, sublicense, and/or sell copies of the Software, and to
+ *permit persons to whom the Software is furnished to do so, subject to
+ *the following conditions:
+ *
+ *The above copyright notice and this permission notice shall be
+ *included in all copies or substantial portions of the Software.
+ *
+ *THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ *MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *NONINFRINGEMENT. IN NO EVENT SHALL THE XFREE86 PROJECT BE LIABLE FOR
+ *ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF
+ *CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ *WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ *Except as contained in this notice, the name of the XFree86 Project
+ *shall not be used in advertising or otherwise to promote the sale, use
+ *or other dealings in this Software without prior written authorization
+ *from the XFree86 Project.
+ *
+ * Authors:	Harold L Hunt II
+ */
+/* $XFree86: xc/programs/Xserver/hw/xwin/winclipboardxevents.c,v 1.1 2003/02/12 15:01:38 alanh Exp $ */
+
+#include "winclipboard.h"
+
+
+/*
+ * Process any pending X events
+ */
+
+Bool
+winClipboardFlushXEvents (HWND hwnd,
+			  Atom atomClipboard,
+			  Atom atomLocalProperty,
+			  Atom atomUTF8String,
+			  Atom atomCompoundText,
+			  Atom atomTargets,
+			  Atom atomDeleteWindow,
+			  int iWindow,
+			  Display *pDisplay,
+			  Bool fUnicodeSupport)
+{
+  Atom			atomReturnType;
+  int			iReturnFormat;
+  unsigned long		ulReturnItems;
+  XTextProperty		xtpText;
+  XEvent		event;
+  XSelectionEvent	eventSelection;
+  unsigned long		ulReturnBytesLeft;
+  unsigned char		*pszReturnData = NULL;
+  char			*pszGlobalData = NULL;
+  int			iReturn;
+  HGLOBAL		hGlobal;
+  Bool			fReturn = TRUE;
+  XICCEncodingStyle	xiccesStyle;
+  int			iUTF8;
+  char			*pszUTF8 = NULL;
+  char			*pszTextList[2];
+  int			iCount;
+  char			**ppszTextList = NULL;
+  wchar_t		*pwszUnicodeStr = NULL;
+  int			iUnicodeLen = 0;
+
+  /* Process all pending events */
+  while (XPending (pDisplay))
+    {
+      /* Get the next event - will not block because one is ready */
+      XNextEvent (pDisplay, &event);
+
+      /* Branch on the event type */
+      switch (event.type)
+	{
+	case ClientMessage:
+	  if (event.xclient.data.l[0] == atomDeleteWindow)
+	    {
+	      ErrorF ("\nReceived WM_DELETE_WINDOW\n\n");
+	      fReturn = FALSE;
+	    }
+	  else
+	    ErrorF ("\nUnknown ClientMessage\n\n");
+	  break;
+
+	case SelectionClear:
+	  /* Request the lost selection contents */
+	  iReturn = XConvertSelection (pDisplay,
+				       event.xselectionclear.selection,
+				       atomCompoundText,
+				       atomLocalProperty,
+				       iWindow,
+				       CurrentTime);
+	  if (iReturn == BadAtom || iReturn == BadWindow)
+	    {
+	      ErrorF ("SelectionClear - XConvertSelection () failed\n");
+	      pthread_exit (NULL);
+	    }
+	  break;
+
+	  
+	  /*
+	   * SelectionRequest
+	   */
+
+	case SelectionRequest:
+#if 0
+	  char			*pszAtomName = NULL
+
+	  ErrorF ("SelectionRequest - target %d\n",
+		  event.xselectionrequest.target);
+
+	  pszAtomName = XGetAtomName (pDisplay,
+				      event.xselectionrequest.target);
+	  ErrorF ("SelectionRequest - Target atom name %s\n", pszAtomName);
+	  XFree (pszAtomName);
+	  pszAtomName = NULL;
+#endif
+
+	  /* Abort if invalid target type */
+	  if (event.xselectionrequest.target != XA_STRING
+	      && event.xselectionrequest.target != atomUTF8String
+	      && event.xselectionrequest.target != atomCompoundText
+	      && event.xselectionrequest.target != atomTargets)
+	    {
+	      /* Setup selection notify event */
+	      eventSelection.type = SelectionNotify;
+	      eventSelection.send_event = True;
+	      eventSelection.display = pDisplay;
+	      eventSelection.requestor = event.xselectionrequest.requestor;
+	      eventSelection.selection = event.xselectionrequest.selection;
+	      eventSelection.target = event.xselectionrequest.target;
+	      eventSelection.property = None;
+	      eventSelection.time = event.xselectionrequest.time;
+
+	      /* Notify the requesting window that the operation is complete */
+	      iReturn = XSendEvent (pDisplay,
+				    eventSelection.requestor,
+				    False,
+				    0L,
+				    (XEvent *) &eventSelection);
+	      if (iReturn == BadValue || iReturn == BadWindow)
+		{
+		  ErrorF ("SelectionRequest - XSendEvent () failed\n");
+		  pthread_exit (NULL);
+		}
+
+	      break;
+	    }
+
+	  /* Handle targets type of request */
+	  if (event.xselectionrequest.target == atomTargets)
+	    {
+	      Atom atomTargetArr[4] = {atomTargets,
+				       atomCompoundText,
+				       atomUTF8String,
+				       XA_STRING};
+
+	      /* Try to change the property */
+	      iReturn = XChangeProperty (pDisplay,
+					 event.xselectionrequest.requestor,
+					 event.xselectionrequest.property,
+					 event.xselectionrequest.target,
+					 8,
+					 PropModeReplace,
+					 (char *) atomTargetArr,
+					 sizeof (atomTargetArr));
+	      if (iReturn == BadAlloc
+		  || iReturn == BadAtom
+		  || iReturn == BadMatch
+		  || iReturn == BadValue
+		  || iReturn == BadWindow)
+		{
+		  ErrorF ("SelectionRequest - XChangeProperty failed: %d\n",
+			  iReturn);
+		}
+
+	      /* Setup selection notify xevent */
+	      eventSelection.type = SelectionNotify;
+	      eventSelection.send_event = True;
+	      eventSelection.display	 = pDisplay;
+	      eventSelection.requestor = event.xselectionrequest.requestor;
+	      eventSelection.selection = event.xselectionrequest.selection;
+	      eventSelection.target	 = event.xselectionrequest.target;
+	      eventSelection.property  = event.xselectionrequest.property;
+	      eventSelection.time	 = event.xselectionrequest.time;
+
+	      /*
+	       * Notify the requesting window that
+	       * the operation has completed
+	       */
+	      iReturn = XSendEvent (pDisplay,
+				    eventSelection.requestor,
+				    False,
+				    0L,
+				    (XEvent *) &eventSelection);
+	      if (iReturn == BadValue || iReturn == BadWindow)
+		{
+		  ErrorF ("SelectionRequest - XSendEvent () failed\n");
+		}
+	      break;
+	    }
+
+	  /* Access the clipboard */
+	  if (!OpenClipboard (hwnd))
+	    {
+	      ErrorF ("SelectionRequest - OpenClipboard () failed: %08x\n",
+		      GetLastError ());
+	      pthread_exit (NULL);
+	    }
+
+	  /* Setup the string style */
+	  if (event.xselectionrequest.target == XA_STRING)
+	    xiccesStyle = XStringStyle;
+	  else if (event.xselectionrequest.target == atomUTF8String)
+	    xiccesStyle = XUTF8StringStyle;
+	  else if (event.xselectionrequest.target == atomCompoundText)
+	    xiccesStyle = XCompoundTextStyle;
+	  else
+	    xiccesStyle = XStringStyle;
+
+	  /*
+	   * FIXME: Can't pass CF_UNICODETEXT on Windows 95/98/Me
+	   */
+	  
+	  /* Get a pointer to the clipboard text */
+	  if (fUnicodeSupport)
+	    hGlobal = GetClipboardData (CF_UNICODETEXT);
+	  else
+	    hGlobal = GetClipboardData (CF_TEXT);
+	  if (!hGlobal)
+	    {
+	      ErrorF ("SelectionRequest - GetClipboardData () failed: %08x\n",
+		      GetLastError ());
+	      pthread_exit (NULL);
+	    }
+	  pszGlobalData = (char *) GlobalLock (hGlobal);
+
+	  /* Convert the Unicode string to UTF8 (MBCS) */
+	  if (fUnicodeSupport)
+	    {
+	      iUTF8 = WideCharToMultiByte (CP_UTF8,
+					   0,
+					   (LPCWSTR)pszGlobalData,
+					   -1,
+					   NULL,
+					   0,
+					   NULL,
+					   NULL);
+	      pszUTF8 = (char *) malloc (iUTF8); /* Don't need +1 */
+	      WideCharToMultiByte (CP_UTF8,
+				   0,
+				   (LPCWSTR)pszGlobalData,
+				   -1,
+				   pszUTF8,
+				   iUTF8,
+				   NULL,
+				   NULL);
+	    }
+
+	  /* Convert DOS string to UNIX string */
+	  if (fUnicodeSupport)
+	    {
+	      winClipboardDOStoUNIX (pszUTF8, strlen (pszUTF8));
+
+	      /* Setup our text list */
+	      pszTextList[0] = pszUTF8;
+	      pszTextList[1] = NULL;
+	      
+	      /* Initialize the text property */
+	      xtpText.value = NULL;
+	      
+	      /* Create the text property from the text list */
+	      iReturn = Xutf8TextListToTextProperty (pDisplay,
+						     pszTextList,
+						     1,
+						     xiccesStyle,
+						     &xtpText);
+	      if (iReturn == XNoMemory || iReturn == XLocaleNotSupported)
+		{
+		  ErrorF ("SelectionRequest - Xutf8TextListToTextProperty "
+			  "failed: %d\n",
+			  iReturn);
+		  exit(1);
+		}
+	      
+	      /* Free the UTF8 string */
+	      free (pszUTF8);
+	    }
+	  else
+	    winClipboardDOStoUNIX (pszGlobalData, strlen (pszGlobalData));
+
+	  /*
+	   * FIXME: Pass pszGlobalData and strlen (pszGlobalData(
+	   * on 1 byte, pass xtpText.value and xtpText.nitems
+	   * on 2 byte.
+	   */
+
+	  /* Copy the clipboard text to the requesting window */
+	  if (fUnicodeSupport)
+	    iReturn = XChangeProperty (pDisplay,
+				       event.xselectionrequest.requestor,
+				       event.xselectionrequest.property,
+				       event.xselectionrequest.target,
+				       8,
+				       PropModeReplace,
+				       xtpText.value,
+				       xtpText.nitems);
+	  else
+	    iReturn = XChangeProperty (pDisplay,
+				       event.xselectionrequest.requestor,
+				       event.xselectionrequest.property,
+				       event.xselectionrequest.target,
+				       8,
+				       PropModeReplace,
+				       pszGlobalData,
+				       strlen (pszGlobalData));
+	  if (iReturn == BadAlloc || iReturn == BadAtom
+	      || iReturn == BadMatch || iReturn == BadValue
+	      || iReturn == BadWindow)
+	    {
+	      ErrorF ("SelectionRequest - XChangeProperty failed: %d\n",
+		      iReturn);
+	      pthread_exit (NULL);
+	    }
+
+	  /* Release the clipboard data */
+	  GlobalUnlock (hGlobal);
+	  pszGlobalData = NULL;
+	  CloseClipboard ();
+
+	  /* FIXME: Don't clean up on 1 byte. */
+	  if (fUnicodeSupport)
+	    {
+	      XFree (xtpText.value);
+	      xtpText.value = NULL;
+	    }
+
+	  /* Setup selection notify event */
+	  eventSelection.type = SelectionNotify;
+	  eventSelection.send_event = True;
+	  eventSelection.display = pDisplay;
+	  eventSelection.requestor = event.xselectionrequest.requestor;
+	  eventSelection.selection = event.xselectionrequest.selection;
+	  eventSelection.target = event.xselectionrequest.target;
+	  eventSelection.property = event.xselectionrequest.property;
+	  eventSelection.time = event.xselectionrequest.time;
+
+	  /* Notify the requesting window that the operation has completed */
+	  iReturn = XSendEvent (pDisplay,
+				eventSelection.requestor,
+				False,
+				0L,
+				(XEvent *) &eventSelection);
+	  if (iReturn == BadValue || iReturn == BadWindow)
+	    {
+	      ErrorF ("SelectionRequest - XSendEvent () failed\n");
+	      pthread_exit (NULL);
+	    }
+	  break;
+	  
+
+	  /*
+	   * SelectionNotify
+	   */ 
+
+	case SelectionNotify:
+#if 0
+	  ErrorF ("SelectionNotify\n");
+#endif
+	  {
+	    char		*pszAtomName;
+	    
+	    pszAtomName = XGetAtomName (pDisplay,
+					event.xselection.selection);
+
+	    ErrorF ("SelectionNotify - ATOM: %s\n",
+		    pszAtomName);
+	    
+	    XFree (pszAtomName);
+	  }
+
+#if 0
+	  /*
+	   * TEMP: Bail if selection is anything other than CLIPBOARD
+	   */
+
+	  if (event.xselection.selection != atomClipboard)
+	    break;
+#endif
+
+	  /*
+	   *
+	   * What are we doing here?
+	   *
+	   */
+	  if (fUnicodeSupport)
+	    {
+	      if (event.xselection.property == None)
+		{
+		  if(event.xselection.target == XA_STRING)
+		    {
+#if 0
+		      ErrorF ("SelectionNotify XA_STRING\n");
+#endif
+		      return fReturn;
+		    }
+		  else if (event.xselection.target == atomUTF8String)
+		    {
+		      ErrorF ("SelectionNotify UTF8\n");
+		      iReturn = XConvertSelection (pDisplay,
+						   event.xselection.selection,
+						   XA_STRING,
+						   atomLocalProperty,
+						   iWindow,
+						   CurrentTime);
+		      if (iReturn == BadAtom || iReturn == BadWindow)
+			{
+			  ErrorF ("SelectionNotify - XConvertSelection () "
+				  "failed\n");
+			  pthread_exit (NULL);
+			}
+		      return fReturn;
+		    }
+		  else if (event.xselection.target == atomCompoundText)
+		    {
+		      ErrorF ("SelectionNotify CompoundText\n");
+		      iReturn = XConvertSelection (pDisplay,
+						   event.xselection.selection,
+						   atomUTF8String,
+						   atomLocalProperty,
+						   iWindow,
+						   CurrentTime);
+		      if (iReturn == BadAtom || iReturn == BadWindow)
+			{
+			  ErrorF ("SelectionNotify - XConvertSelection () "
+				  "failed\n");
+			  pthread_exit (NULL);
+			}
+		      return fReturn;
+		    }
+		  else
+		    {
+		      ErrorF("Unknown format\n");
+		      return fReturn;
+		    }
+		}
+	    }
+
+	  /* Retrieve the size of the stored data */
+	  if (fUnicodeSupport)
+	    iReturn = XGetWindowProperty (pDisplay,
+					  iWindow,
+					  atomLocalProperty,
+					  0,
+					  0, /* Don't get data, just size */
+					  False,
+					  AnyPropertyType,
+					  &xtpText.encoding,
+					  &xtpText.format,
+					  &xtpText.nitems,
+					  &ulReturnBytesLeft,
+					  &xtpText.value);
+	  else
+	    iReturn = XGetWindowProperty (pDisplay,
+					  iWindow,
+					  atomLocalProperty,
+					  0,
+					  0, /* Don't get data, just size */
+					  False,
+					  AnyPropertyType,
+					  &atomReturnType,
+					  &iReturnFormat,
+					  &ulReturnItems,
+					  &ulReturnBytesLeft,
+					  &pszReturnData);
+	  if (iReturn != Success)
+	    {
+	      ErrorF ("SelectionNotify - XGetWindowProperty () failed\n");
+	      pthread_exit (NULL);
+	    }
+
+#if 0
+	  if (fUnicodeSupport)
+	    ErrorF ("SelectionNotify - returned data %d left %d\n",
+		    xtpText.nitems, ulReturnBytesLeft);
+	  else
+	    ErrorF ("SelectionNotify - returned data %d left %d\n",
+		    ulReturnItems, ulReturnBytesLeft);
+#endif
+
+	  /* Request the selection data */
+	  if (fUnicodeSupport)
+	    iReturn = XGetWindowProperty (pDisplay,
+					  iWindow,
+					  atomLocalProperty,
+					  0,
+					  ulReturnBytesLeft,
+					  False,
+					  AnyPropertyType,
+					  &xtpText.encoding,
+					  &xtpText.format,
+					  &xtpText.nitems,
+					  &ulReturnBytesLeft,
+					  &xtpText.value);
+	  else
+	    iReturn = XGetWindowProperty (pDisplay,
+					  iWindow,
+					  atomLocalProperty,
+					  0,
+					  ulReturnBytesLeft,
+					  False,
+					  AnyPropertyType,
+					  &atomReturnType,
+					  &iReturnFormat,
+					  &ulReturnItems,
+					  &ulReturnBytesLeft,
+					  &pszReturnData);
+	  if (iReturn != Success)
+	    {
+	      ErrorF ("SelectionNotify - XGetWindowProperty () failed\n");
+	      pthread_exit (NULL);
+	    }
+
+	  if (fUnicodeSupport)
+	    {
+#if 0
+	      char		*pszAtomName = NULL;
+
+	      ErrorF ("SelectionNotify - returned data %d left %d\n",
+		      prop.nitems, ulReturnBytesLeft);
+	      
+	      pszAtomName = XGetAtomName(pDisplay, prop.encoding);
+	      ErrorF ("Notify atom name %s\n", pszAtomName);
+	      XFree (pszAtomName);
+	      pszAtomName = NULL;
+#endif
+	      
+	      /* Convert the text property to a text list */
+	      Xutf8TextPropertyToTextList (pDisplay,
+					   &xtpText,
+					   &ppszTextList,
+					   &iCount);
+	      if (iCount > 0)
+		{
+		  pszReturnData = malloc (strlen (ppszTextList[0]) + 1);
+		  strcpy (pszReturnData, ppszTextList[0]);
+		}
+	      else
+		{
+		  pszReturnData = malloc (1);
+		  pszReturnData[0] = 0;
+		}
+	      
+	      /* Free the data returned from XGetWindowProperty */
+	      XFreeStringList (ppszTextList);
+	      XFree (xtpText.value);
+	    }
+	      
+	  /* Convert the X clipboard string to DOS format */
+	  winClipboardUNIXtoDOS (&pszReturnData, strlen (pszReturnData));
+
+	  if (fUnicodeSupport)
+	    {
+	      /* Find out how much space needed to convert MBCS to Unicode */
+	      iUnicodeLen = MultiByteToWideChar (CP_UTF8,
+						 0,
+						 pszReturnData,
+						 -1,
+						 NULL,
+						 0);
+	      
+	      /* Allocate memory for the Unicode string */
+	      pwszUnicodeStr
+		= (wchar_t*) malloc (sizeof (wchar_t) * (iUnicodeLen + 1));
+	      
+	      /* Do the actual conversion */
+	      MultiByteToWideChar (CP_UTF8,
+				   0,
+				   pszReturnData,
+				   -1,
+				   pwszUnicodeStr,
+				   iUnicodeLen);
+	    }
+
+	  /* Access the Windows clipboard */
+	  if (!OpenClipboard (hwnd))
+	    {
+	      ErrorF ("OpenClipboard () failed: %08x\n", GetLastError ());
+	      pthread_exit (NULL);
+	    }
+
+	  /* Take ownership of the Window clipboard */
+	  if (!EmptyClipboard ())
+	    {
+	      ErrorF ("EmptyClipboard () failed: %08x\n", GetLastError ());
+	      pthread_exit (NULL);
+	    }
+
+	  /* Allocate global memory for the X clipboard data */
+	  if (fUnicodeSupport)
+	    hGlobal = GlobalAlloc (GMEM_MOVEABLE,
+				   sizeof (wchar_t) * (iUnicodeLen + 1));
+	  else
+	    hGlobal = GlobalAlloc (GMEM_MOVEABLE, strlen (pszReturnData) + 1);
+
+	  /* Obtain a pointer to the global memory */
+	  pszGlobalData = GlobalLock (hGlobal);
+	  if (pszGlobalData == NULL)
+	    {
+	      ErrorF ("Could not lock global memory for clipboard transfer\n");
+	      pthread_exit (NULL);
+	    }
+
+	  /* Copy the returned string into the global memory */
+	  if (fUnicodeSupport)
+	    memcpy (pszGlobalData,
+		    pwszUnicodeStr,
+		    sizeof (wchar_t) * (iUnicodeLen + 1));
+	  else
+	    strcpy (pszGlobalData, pszReturnData);
+
+	  /* Free the data returned from XGetWindowProperty */
+	  if (fUnicodeSupport)
+	    {
+	      free (pwszUnicodeStr);
+	      pwszUnicodeStr = NULL;
+	    }
+	  else
+	    {
+	      XFree (pszReturnData);
+	      pszReturnData = NULL;
+	    }
+
+	  /* Release the pointer to the global memory */
+	  GlobalUnlock (hGlobal);
+	  pszGlobalData = NULL;
+
+	  /* Push the selection data to the Windows clipboard */
+	  if (fUnicodeSupport)
+	    SetClipboardData (CF_UNICODETEXT, hGlobal);
+	  else
+	  SetClipboardData (CF_TEXT, hGlobal);	    
+
+	  /*
+	   * NOTE: Do not try to free pszGlobalData, it is owned by
+	   * Windows after the call to SetClipboardData ().
+	   */
+
+	  /* Release the clipboard */
+	  if (!CloseClipboard ())
+	    {
+	      ErrorF ("CloseClipboard () failed: %08x\n", GetLastError ());
+	      pthread_exit (NULL);
+	    }
+
+	  /* Reassert ownership of the selection */	  
+	  iReturn = XSetSelectionOwner (pDisplay,
+					event.xselection.selection,
+					iWindow, CurrentTime);
+	  if (iReturn == BadAtom || iReturn == BadWindow)
+	    {
+	      char		*pszAtomName = NULL;
+
+	      pszAtomName = XGetAtomName (pDisplay,
+					  event.xselection.selection);
+	      ErrorF ("SelectionNotify - Could not reassert ownership "
+		      "of selection ATOM: %s\n", pszAtomName);
+	      XFree (pszAtomName);
+	      pszAtomName = NULL;
+	      pthread_exit (NULL);
+	    }
+	  else
+	    {
+#if 0
+	      char		*pszAtomName = NULL;
+
+	      pszAtomName = XGetAtomName (pDisplay,
+					  event.xselection.selection);
+	      ErrorF ("SelectionNotify - Reasserted ownership of ATOM: %s\n",
+		      pszAtomName);
+	      XFree (pszAtomName);
+	      pszAtomName = NULL;
+#endif
+	    }
+#if 0
+	  /* Reassert ownership of the CLIPBOARD */	  
+	  iReturn = XSetSelectionOwner (pDisplay,
+					atomClipboard,
+					iWindow, CurrentTime);
+	  if (iReturn == BadAtom || iReturn == BadWindow)
+	    {
+	      ErrorF ("Could not reassert ownership of selection\n");
+	      pthread_exit (NULL);
+	    }
+#endif
+	  break;
+
+#if 0
+	case CreateNotify:
+	  ErrorF ("FlushXEvents - CreateNotify parent: %ld\twindow: %ld\n",
+		  event.xcreatewindow.parent, event.xcreatewindow.window);
+	  break;
+
+	case DestroyNotify:
+	  ErrorF ("FlushXEvents - DestroyNotify window: %ld\tevent: %ld\n",
+		  event.xdestroywindow.window, event.xdestroywindow.event);
+	  break;
+#endif
+
+	default:
+	  break;
+	}
+    }
+
+  return fReturn;
+}
diff --git a/xc/programs/Xserver/hw/xwin/wincreatewnd.c b/xc/programs/Xserver/hw/xwin/wincreatewnd.c
index 300a8f447..3c725f248 100644
--- a/xc/programs/Xserver/hw/xwin/wincreatewnd.c
+++ b/xc/programs/Xserver/hw/xwin/wincreatewnd.c
@@ -27,7 +27,7 @@
  *
  * Authors:	Harold L Hunt II
  */
-/* $XFree86: xc/programs/Xserver/hw/xwin/wincreatewnd.c,v 1.4 2002/10/17 08:18:22 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xwin/wincreatewnd.c,v 1.5 2003/02/12 15:01:38 alanh Exp $ */
 
 #include "win.h"
 #include "shellapi.h"
@@ -38,6 +38,9 @@
  */
 
 static Bool
+winGetWorkArea (RECT *prcWorkArea, winScreenInfo *pScreenInfo);
+
+static Bool
 winAdjustForAutoHide (RECT *prcWorkArea);
 
 
@@ -65,7 +68,7 @@ winCreateBoundingWindowFullScreen (ScreenPtr pScreen)
   wc.cbClsExtra = 0;
   wc.cbWndExtra = 0;
   wc.hInstance = g_hInstance;
-  wc.hIcon = LoadIcon (g_hInstance, IDI_XWIN);
+  wc.hIcon = LoadIcon (g_hInstance, MAKEINTRESOURCE(IDI_XWIN));
   wc.hCursor = 0;
   wc.hbrBackground = 0;
   wc.lpszMenuName = NULL;
@@ -119,20 +122,25 @@ winCreateBoundingWindowWindowed (ScreenPtr pScreen)
 {
   winScreenPriv(pScreen);
   winScreenInfo		*pScreenInfo = pScreenPriv->pScreenInfo;
-  int			iWidth = pScreenInfo->dwWidth;
-  int			iHeight = pScreenInfo->dwHeight;
+  int			iWidth = pScreenInfo->dwUserWidth;
+  int			iHeight = pScreenInfo->dwUserHeight;
   HWND			*phwnd = &pScreenPriv->hwndScreen;
   WNDCLASS		wc;
   RECT			rcClient, rcWorkArea;
   DWORD			dwWindowStyle;
   
-  ErrorF ("winCreateBoundingWindowWindowed - Initial w: %d h: %d\n",
-	  iWidth, iHeight);
+  ErrorF ("winCreateBoundingWindowWindowed - User w: %d h: %d\n",
+	  pScreenInfo->dwUserWidth, pScreenInfo->dwUserHeight);
+  ErrorF ("winCreateBoundingWindowWindowed - Current w: %d h: %d\n",
+	  pScreenInfo->dwWidth, pScreenInfo->dwHeight);
   
+  /* Set the common window style flags */
   dwWindowStyle = WS_OVERLAPPED | WS_SYSMENU | WS_MINIMIZEBOX;
   
   /* Decorated or undecorated window */
-  if (pScreenInfo->fDecoration && !pScreenInfo->fRootless)
+  if (pScreenInfo->fDecoration
+      && !pScreenInfo->fRootless
+      && !pScreenInfo->fMultiWindow)
     {
       dwWindowStyle |= WS_CAPTION;
       if (pScreenInfo->fScrollbars)
@@ -147,7 +155,7 @@ winCreateBoundingWindowWindowed (ScreenPtr pScreen)
   wc.cbClsExtra = 0;
   wc.cbWndExtra = 0;
   wc.hInstance = g_hInstance;
-  wc.hIcon = LoadIcon (g_hInstance, IDI_XWIN);
+  wc.hIcon = LoadIcon (g_hInstance, MAKEINTRESOURCE(IDI_XWIN));
   wc.hCursor = 0;
   wc.hbrBackground = (HBRUSH) GetStockObject (WHITE_BRUSH);
   wc.lpszMenuName = NULL;
@@ -155,7 +163,7 @@ winCreateBoundingWindowWindowed (ScreenPtr pScreen)
   RegisterClass (&wc);
 
   /* Get size of work area */
-  SystemParametersInfo (SPI_GETWORKAREA, 0, &rcWorkArea, 0);
+  winGetWorkArea (&rcWorkArea, pScreenInfo);
 
   /* Adjust for auto-hide taskbars */
   winAdjustForAutoHide (&rcWorkArea);
@@ -170,7 +178,9 @@ winCreateBoundingWindowWindowed (ScreenPtr pScreen)
 #endif
       
       /* Adjust the window width and height for borders and title bar */
-      if (pScreenInfo->fDecoration && !pScreenInfo->fRootless)
+      if (pScreenInfo->fDecoration
+	  && !pScreenInfo->fRootless
+	  && !pScreenInfo->fMultiWindow)
 	{
 #if CYGDEBUG
 	  ErrorF ("winCreateBoundingWindowWindowed - Window has decoration\n");
@@ -206,8 +216,16 @@ winCreateBoundingWindowWindowed (ScreenPtr pScreen)
 	   * In this case we have to ignore the requested width and height
 	   * and instead use the largest possible window that we can.
 	   */
-	  iWidth = GetSystemMetrics (SM_CXSCREEN);
-	  iHeight = GetSystemMetrics (SM_CYSCREEN);
+	  if (pScreenInfo->fMultipleMonitors)
+	    {
+	      iWidth = GetSystemMetrics (SM_CXVIRTUALSCREEN);
+	      iHeight = GetSystemMetrics (SM_CYVIRTUALSCREEN);
+	    }
+	  else
+	    {
+	      iWidth = GetSystemMetrics (SM_CXSCREEN);
+	      iHeight = GetSystemMetrics (SM_CYSCREEN);
+	    }
 	}
     }
   else
@@ -217,10 +235,18 @@ winCreateBoundingWindowWindowed (ScreenPtr pScreen)
       ErrorF ("winCreateBoundingWindowWindowed - User did not give "
 	      "height and width\n");
 #endif
+      /* Defaults are wrong if we have multiple monitors */
+      if (pScreenInfo->fMultipleMonitors)
+	{
+	  iWidth = GetSystemMetrics (SM_CXVIRTUALSCREEN);
+	  iHeight = GetSystemMetrics (SM_CYVIRTUALSCREEN);
+	}
     }
 
   /* Clean up the scrollbars flag, if necessary */
-  if ((!pScreenInfo->fDecoration || pScreenInfo->fRootless)
+  if ((!pScreenInfo->fDecoration
+       || pScreenInfo->fRootless
+       || pScreenInfo->fMultiWindow)
       && pScreenInfo->fScrollbars)
     {
       /* We cannot have scrollbars if we do not have a window border */
@@ -342,7 +368,10 @@ winCreateBoundingWindowWindowed (ScreenPtr pScreen)
 #endif
 
   /* Show the window */
-  ShowWindow (*phwnd, SW_SHOWNORMAL);
+  if (pScreenInfo->fMultiWindow)
+    ShowWindow (*phwnd, SW_SHOWMINNOACTIVE);
+  else
+    ShowWindow (*phwnd, SW_SHOWNORMAL);
   if (!UpdateWindow (*phwnd))
     {
       ErrorF ("winCreateBoundingWindowWindowed - UpdateWindow () failed\n");
@@ -368,6 +397,77 @@ winCreateBoundingWindowWindowed (ScreenPtr pScreen)
 
 
 /*
+ * Find the work area of all attached monitors
+ */
+
+static Bool
+winGetWorkArea (RECT *prcWorkArea, winScreenInfo *pScreenInfo)
+{
+  int			iPrimaryWidth, iPrimaryHeight;
+  int			iWidth, iHeight;
+  int			iLeft, iTop;
+  int			iPrimaryNonWorkAreaWidth, iPrimaryNonWorkAreaHeight;
+
+  /* SPI_GETWORKAREA only gets the work area of the primary screen. */
+  SystemParametersInfo (SPI_GETWORKAREA, 0, prcWorkArea, 0);
+
+  /* Bail out here if we aren't using multiple monitors */
+  if (!pScreenInfo->fMultipleMonitors)
+    return TRUE;
+  
+  ErrorF ("winGetWorkArea - Original WorkArea: %d %d %d %d\n",
+	  prcWorkArea->top, prcWorkArea->left,
+	  prcWorkArea->bottom, prcWorkArea->right);
+
+  /* Get size of full virtual screen */
+  iWidth = GetSystemMetrics (SM_CXVIRTUALSCREEN);
+  iHeight = GetSystemMetrics (SM_CYVIRTUALSCREEN);
+
+  ErrorF ("winGetWorkArea - Virtual screen is %d x %d\n", iWidth, iHeight);
+
+  /* Get origin of full virtual screen */
+  iLeft = GetSystemMetrics (SM_XVIRTUALSCREEN);
+  iTop = GetSystemMetrics (SM_YVIRTUALSCREEN);
+
+  ErrorF ("winGetWorkArea - Virtual screen origin is %d, %d\n", iLeft, iTop);
+  
+  /* Get size of primary screen */
+  iPrimaryWidth = GetSystemMetrics (SM_CXSCREEN);
+  iPrimaryHeight = GetSystemMetrics (SM_CYSCREEN);
+
+  ErrorF ("winGetWorkArea - Primary screen is %d x %d\n",
+	 iPrimaryWidth, iPrimaryHeight);
+  
+  /* Work out how much of the primary screen we aren't using */
+  iPrimaryNonWorkAreaWidth = iPrimaryWidth - (prcWorkArea->right -
+					      prcWorkArea->left);
+  iPrimaryNonWorkAreaHeight = iPrimaryHeight - (prcWorkArea->bottom
+						- prcWorkArea->top);
+  
+  /* Update the rectangle to include all monitors */
+  if (iLeft < 0) 
+    {
+      prcWorkArea->left = iLeft;
+    }
+  if (iTop < 0) 
+    {
+      prcWorkArea->top = iTop;
+    }
+  prcWorkArea->right = prcWorkArea->left + iWidth -
+    iPrimaryNonWorkAreaWidth;
+  prcWorkArea->bottom = prcWorkArea->top + iHeight -
+    iPrimaryNonWorkAreaHeight;
+  
+  ErrorF ("winGetWorkArea - Adjusted WorkArea for multiple "
+	  "monitors: %d %d %d %d\n",
+	  prcWorkArea->top, prcWorkArea->left,
+	  prcWorkArea->bottom, prcWorkArea->right);
+  
+  return TRUE;
+}
+
+
+/*
  * Adjust the client area so that any auto-hide toolbars
  * will work correctly.
  */
diff --git a/xc/programs/Xserver/hw/xwin/winengine.c b/xc/programs/Xserver/hw/xwin/winengine.c
index 6324c8fe2..aff90bdaf 100644
--- a/xc/programs/Xserver/hw/xwin/winengine.c
+++ b/xc/programs/Xserver/hw/xwin/winengine.c
@@ -27,7 +27,7 @@
  *
  * Authors:	Harold L Hunt II
  */
-/* $XFree86: xc/programs/Xserver/hw/xwin/winengine.c,v 1.3 2002/07/05 09:19:26 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xwin/winengine.c,v 1.4 2003/02/12 15:01:38 alanh Exp $ */
 
 #include "win.h"
 
@@ -174,6 +174,17 @@ winSetEngine (ScreenPtr pScreen)
       return TRUE;
     }
 
+  /* ShadowGDI is the only engine that supports Multi Window Mode */
+  if (pScreenInfo->fMultiWindow)
+    {
+      ErrorF ("winSetEngine - Multi Window => ShadowGDI\n");
+      pScreenInfo->dwEngine = WIN_SERVER_SHADOW_GDI;
+
+      /* Set engine function pointers */
+      winSetEngineFunctionsShadowGDI (pScreen);
+      return TRUE;
+    }
+
   /* If the user's choice is supported, we'll use that */
   if (g_dwEnginesSupported & pScreenInfo->dwEnginePreferred)
     {
diff --git a/xc/programs/Xserver/hw/xwin/winerror.c b/xc/programs/Xserver/hw/xwin/winerror.c
index d9ae1918b..c18f10dde 100644
--- a/xc/programs/Xserver/hw/xwin/winerror.c
+++ b/xc/programs/Xserver/hw/xwin/winerror.c
@@ -27,7 +27,7 @@
  *
  * Authors:	Harold L Hunt II
  */
-/* $XFree86: xc/programs/Xserver/hw/xwin/winerror.c,v 1.3 2001/10/23 22:22:47 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xwin/winerror.c,v 1.4 2003/02/12 15:01:38 alanh Exp $ */
 
 #include "win.h"
 
@@ -37,14 +37,22 @@ extern FILE		*g_pfLog;
 void
 OsVendorVErrorF (const char *pszFormat, va_list va_args)
 {
+  static pthread_mutex_t	s_pmPrinting = PTHREAD_MUTEX_INITIALIZER;
+
   /* Check we opened the log file first */
   if (g_pfLog == NULL) return;
 
+  /* Lock the printing mutex */
+  pthread_mutex_lock (&s_pmPrinting);
+
   /* Print the error message to a log file, could be stderr */
   vfprintf (g_pfLog, pszFormat, va_args);
 
   /* Flush after every write, to make updates show up quickly */
   fflush (g_pfLog);
+
+  /* Unlock the printing mutex */
+  pthread_mutex_unlock (&s_pmPrinting);
 }
 #endif
 
diff --git a/xc/programs/Xserver/hw/xwin/winlayer.c b/xc/programs/Xserver/hw/xwin/winlayer.c
index f9c320651..9d03dbf74 100644
--- a/xc/programs/Xserver/hw/xwin/winlayer.c
+++ b/xc/programs/Xserver/hw/xwin/winlayer.c
@@ -27,7 +27,7 @@
  *
  * Authors:	Harold L Hunt II
  */
-/* $XFree86: xc/programs/Xserver/hw/xwin/winlayer.c,v 1.8 2002/07/05 09:19:26 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xwin/winlayer.c,v 1.9 2002/10/31 23:04:39 alanh Exp $ */
 
 #include "win.h"
 
@@ -109,8 +109,6 @@ winRandRGetInfo (ScreenPtr pScreen, Rotation *pRotations)
   winScreenPriv(pScreen);
   winScreenInfo			*pScreenInfo = pScreenPriv->pScreenInfo;
   int				n;
-  RRVisualGroupPtr		pVisualGroup;
-  RRGroupOfVisualGroupPtr	pGroupOfVisualGroup = NULL;
   Rotation			rotateKind;
   RRScreenSizePtr		pSize;
 
@@ -119,51 +117,14 @@ winRandRGetInfo (ScreenPtr pScreen, Rotation *pRotations)
   /* Don't support rotations, yet */
   *pRotations = RR_Rotate_0; /* | RR_Rotate_90 | RR_Rotate_180 | ... */
   
+#if 0
   /* Check for something naughty.  Don't know what exactly... */
   for (n = 0; n < pScreen->numDepths; n++)
     if (pScreen->allowedDepths[n].numVids)
       break;
   if (n == pScreen->numDepths)
     return FALSE;
-  
-  /* Create an RandR visual group */
-  pVisualGroup = RRCreateVisualGroup (pScreen);
-  if (!pVisualGroup)
-    return FALSE;
-  
-
-  /* Not sure what this does */
-  if (!RRAddDepthToVisualGroup (pScreen,
-				pVisualGroup,
-				&pScreen->allowedDepths[n]))
-    {
-      RRDestroyVisualGroup (pScreen, pVisualGroup);
-      return FALSE;
-    }
-
-  /* Register the RandR visual group */
-  pVisualGroup = RRRegisterVisualGroup (pScreen, pVisualGroup);
-  if (!pVisualGroup)
-    return FALSE;
-  
-  pGroupOfVisualGroup = RRRegisterGroupOfVisualGroup (pScreen,
-						      pGroupOfVisualGroup);
-  
-  /* You have to be kidding */
-  if (!RRAddVisualGroupToGroupOfVisualGroup (pScreen,
-					     pGroupOfVisualGroup,
-					     pVisualGroup))
-    {
-      RRDestroyGroupOfVisualGroup (pScreen, pGroupOfVisualGroup);
-      /* pVisualGroup left until screen closed */
-      return FALSE;
-    }
-  
-  /* I can't afford a clue */
-  pGroupOfVisualGroup = RRRegisterGroupOfVisualGroup (pScreen, 
-						      pGroupOfVisualGroup);
-  if (!pGroupOfVisualGroup)
-    return FALSE;
+#endif
   
   /*
    * Register supported sizes.  This can be called many times, but
@@ -173,14 +134,13 @@ winRandRGetInfo (ScreenPtr pScreen, Rotation *pRotations)
 			  pScreenInfo->dwWidth,
 			  pScreenInfo->dwHeight,
 			  pScreenInfo->dwWidth_mm,
-			  pScreenInfo->dwHeight_mm,
-			  pGroupOfVisualGroup);
+			  pScreenInfo->dwHeight_mm);
   
   /* Only one allowed rotation for now */
   rotateKind = RR_Rotate_0;
-  
+
   /* Tell RandR what the current config is */
-  RRSetCurrentConfig (pScreen, rotateKind, pSize, pVisualGroup);
+  RRSetCurrentConfig (pScreen, rotateKind, pSize);
   
   return TRUE;
 }
@@ -193,8 +153,7 @@ winRandRGetInfo (ScreenPtr pScreen, Rotation *pRotations)
 Bool
 winRandRSetConfig (ScreenPtr		pScreen,
 		   Rotation		rotateKind,
-		   RRScreenSizePtr	pSize,
-		   RRVisualGroupPtr	pVisualGroup)
+		   RRScreenSizePtr	pSize)
 {
   ErrorF ("winRandRSetConfig ()\n");
 
diff --git a/xc/programs/Xserver/hw/xwin/winmultiwindowwindow.c b/xc/programs/Xserver/hw/xwin/winmultiwindowwindow.c
new file mode 100644
index 000000000..57d209e2a
--- /dev/null
+++ b/xc/programs/Xserver/hw/xwin/winmultiwindowwindow.c
@@ -0,0 +1,1574 @@
+/*
+ *Copyright (C) 1994-2000 The XFree86 Project, Inc. All Rights Reserved.
+ *
+ *Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ *"Software"), to deal in the Software without restriction, including
+ *without limitation the rights to use, copy, modify, merge, publish,
+ *distribute, sublicense, and/or sell copies of the Software, and to
+ *permit persons to whom the Software is furnished to do so, subject to
+ *the following conditions:
+ *
+ *The above copyright notice and this permission notice shall be
+ *included in all copies or substantial portions of the Software.
+ *
+ *THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ *MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *NONINFRINGEMENT. IN NO EVENT SHALL THE XFREE86 PROJECT BE LIABLE FOR
+ *ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF
+ *CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ *WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ *Except as contained in this notice, the name of the XFree86 Project
+ *shall not be used in advertising or otherwise to promote the sale, use
+ *or other dealings in this Software without prior written authorization
+ *from the XFree86 Project.
+ *
+ * Authors:	Kensuke Matsuzaki
+ */
+/* $XFree86: xc/programs/Xserver/hw/xwin/winmultiwindowwindow.c,v 1.1 2003/02/12 15:01:38 alanh Exp $ */
+
+#include "win.h"
+#include "dixevents.h"
+
+
+/*
+ * Prototypes for local functions
+ */
+
+static void
+winCreateWindowsWindow (WindowPtr pWin);
+
+static void
+winDestroyWindowsWindow (WindowPtr pWin);
+
+static void
+winUpdateWindowsWindow (WindowPtr pWin);
+
+static XID
+winGetWindowID (WindowPtr pWin);
+
+static void
+SendConfigureNotify (WindowPtr pWin);
+
+static
+void
+winUpdateRgn (WindowPtr pWindow);
+
+#ifdef SHAPE
+static
+void
+winReshape (WindowPtr pWin);
+#endif
+
+
+/*
+ * Local globals
+ */
+
+static UINT s_nIDPollingMouse = 2;
+
+#if 0
+static BOOL s_fMoveByX = FALSE;
+#endif
+
+
+/*
+ * Constant defines
+ */
+
+
+#define MOUSE_POLLING_INTERVAL 500
+#define WIN_MULTIWINDOW_SHAPE YES
+
+/*
+ * Macros
+ */
+
+#define SubSend(pWin) \
+    ((pWin->eventMask|wOtherEventMasks(pWin)) & SubstructureNotifyMask)
+
+#define StrSend(pWin) \
+    ((pWin->eventMask|wOtherEventMasks(pWin)) & StructureNotifyMask)
+
+#define SubStrSend(pWin,pParent) (StrSend(pWin) || SubSend(pParent))
+
+
+/*
+ * CreateWindow - See Porting Layer Definition - p. 37
+ */
+
+Bool
+winCreateWindowMultiWindow (WindowPtr pWin)
+{
+  Bool			fResult = TRUE;
+  winWindowPriv(pWin);
+
+#if CYGMULTIWINDOW_DEBUG
+  ErrorF ("winCreateWindowMultiWindow - pWin: %08x\n", pWin);
+#endif
+  
+  /* Call any wrapped CreateWindow function */
+  if (winGetScreenPriv(pWin->drawable.pScreen)->CreateWindow)
+    fResult = winGetScreenPriv(pWin->drawable.pScreen)->CreateWindow (pWin);
+  
+  /* Initialize some privates values */
+  pWinPriv->hRgn = NULL;
+  pWinPriv->hWnd = NULL;
+  pWinPriv->pScreenPriv = winGetScreenPriv(pWin->drawable.pScreen);
+  pWinPriv->fXKilled = FALSE;
+  
+  return fResult;
+}
+
+
+/*
+ * DestroyWindow - See Porting Layer Definition - p. 37
+ */
+
+Bool
+winDestroyWindowMultiWindow (WindowPtr pWin)
+{
+  Bool			fResult = TRUE;
+  winWindowPriv(pWin);
+
+#if CYGMULTIWINDOW_DEBUG
+  ErrorF ("winDestroyWindowMultiWindow - pWin: %08x\n", pWin);
+#endif
+  
+  /* Call any wrapped DestroyWindow function */
+  if (winGetScreenPriv(pWin->drawable.pScreen)->DestroyWindow)
+    fResult = winGetScreenPriv(pWin->drawable.pScreen)->DestroyWindow (pWin);
+  
+  /* Flag that the window has been destroyed */
+  pWinPriv->fXKilled = TRUE;
+  
+  /* Kill the MS Windows window associated with this window */
+  winDestroyWindowsWindow (pWin); 
+
+  return fResult;
+}
+
+
+/*
+ * PositionWindow - See Porting Layer Definition - p. 37
+ */
+
+Bool
+winPositionWindowMultiWindow (WindowPtr pWin, int x, int y)
+{
+  Bool			fResult = TRUE;
+  int		        iX, iY, iWidth, iHeight, iBorder;
+  winWindowPriv(pWin);
+  HWND hWnd = pWinPriv->hWnd;
+  RECT rcNew;
+  RECT rcOld;
+#if CYGMULTIWINDOW_DEBUG
+  RECT rcClient;
+  RECT *lpRc;
+#endif
+  DWORD dwExStyle;
+  DWORD dwStyle;
+
+#if CYGMULTIWINDOW_DEBUG
+  ErrorF ("winPositionWindowMultiWindow - pWin: %08x\n", pWin);
+#endif
+  
+  /* Call any wrapped PositionWindow function */
+  if (winGetScreenPriv(pWin->drawable.pScreen)->PositionWindow)
+    fResult = winGetScreenPriv(pWin->drawable.pScreen)->PositionWindow (pWin, x, y);
+  
+  /* Bail out if the Windows window handle is bad */
+  if (!hWnd)
+    return fResult;
+
+  /* Get the Windows window style and extended style */
+  dwExStyle = GetWindowLongPtr (hWnd, GWL_EXSTYLE);
+  dwStyle = GetWindowLongPtr (hWnd, GWL_STYLE);
+
+  /* Get the width of the X window border */
+  iBorder = wBorderWidth (pWin);
+  
+  /* Get the X and Y location of the X window */
+  iX = pWin->drawable.x;
+  iY = pWin->drawable.y;
+
+  /* Get the height and width of the X window */
+  iWidth = pWin->drawable.width;
+  iHeight = pWin->drawable.height;
+
+  /* Store the origin, height, and width in a rectangle structure */
+  SetRect (&rcNew, iX, iY, iX + iWidth, iY + iHeight);
+
+#if CYGMULTIWINDOW_DEBUG
+  lpRc = &rcNew;
+  ErrorF ("winPositionWindowMultiWindow - (%d ms)drawable (%d, %d)-(%d, %d)\n",
+	  GetTickCount (), lpRc->left, lpRc->top, lpRc->right, lpRc->bottom);
+#endif
+
+  /*
+   * Calculate the required size of the Windows window rectangle,
+   * given the size of the Windows window client area.
+   */
+  AdjustWindowRectEx (&rcNew, dwStyle, FALSE, dwExStyle);
+
+  /* Get a rectangle describing the old Windows window */
+  GetWindowRect (hWnd, &rcOld);
+
+#if CYGMULTIWINDOW_DEBUG
+  /* Get a rectangle describing the Windows window client area */
+  GetClientRect (hWnd, &rcClient);
+
+  lpRc = &rcNew;
+  ErrorF ("winPositionWindowMultiWindow - (%d ms)rcNew (%d, %d)-(%d, %d)\n",
+	  GetTickCount (), lpRc->left, lpRc->top, lpRc->right, lpRc->bottom);
+      
+  lpRc = &rcOld;
+  ErrorF ("winPositionWindowMultiWindow - (%d ms)rcOld (%d, %d)-(%d, %d)\n",
+	  GetTickCount (), lpRc->left, lpRc->top, lpRc->right, lpRc->bottom);
+      
+  lpRc = &rcClient;
+  ErrorF ("(%d ms)rcClient (%d, %d)-(%d, %d)\n",
+	  GetTickCount (), lpRc->left, lpRc->top, lpRc->right, lpRc->bottom);
+#endif
+
+  /* Check if the old rectangle and new rectangle are the same */
+  if (!EqualRect (&rcNew, &rcOld))
+    {
+#if CYGMULTIWINDOW_DEBUG
+      ErrorF ("winPositionWindowMultiWindow - Need to move\n");
+#endif
+
+      /* Change the position and dimensions of the Windows window */
+      MoveWindow (hWnd,
+		  rcNew.left, rcNew.top,
+		  rcNew.right - rcNew.left, rcNew.bottom - rcNew.top,
+		  TRUE);
+    }
+  else
+    {
+#if CYGMULTIWINDOW_DEBUG
+      ErrorF ("winPositionWindowMultiWindow - Not need to move\n");
+#endif
+    }
+
+  return fResult;
+}
+
+
+/*
+ * ChangeWindowAttributes - See Porting Layer Definition - p. 37
+ */
+
+Bool
+winChangeWindowAttributesMultiWindow (WindowPtr pWin, unsigned long mask)
+{
+  Bool			fResult = TRUE;
+
+#if CYGMULTIWINDOW_DEBUG
+  ErrorF ("winChangeWindowAttributesMultiWindow - pWin: %08x\n", pWin);
+#endif
+  
+  /* Call any wrapped ChangeWindowAttributes function */
+  if (winGetScreenPriv(pWin->drawable.pScreen)->ChangeWindowAttributes)
+    fResult = winGetScreenPriv(pWin->drawable.pScreen)->ChangeWindowAttributes (pWin, mask);
+  
+  /*
+   * NOTE: We do not currently need to do anything here.
+   */
+
+  return fResult;
+}
+
+
+/*
+ * UnmapWindow - See Porting Layer Definition - p. 37
+ * Also referred to as UnrealizeWindow
+ */
+
+Bool
+winUnmapWindowMultiWindow (WindowPtr pWin)
+{
+  Bool			fResult = TRUE;
+  winWindowPriv(pWin);
+
+#if CYGMULTIWINDOW_DEBUG
+  ErrorF ("winUnmapWindowMultiWindow - pWin: %08x\n", pWin);
+#endif
+  
+  /* Call any wrapped UnrealizeWindow function */
+  if (winGetScreenPriv(pWin->drawable.pScreen)->UnrealizeWindow)
+    fResult = winGetScreenPriv(pWin->drawable.pScreen)->UnrealizeWindow (pWin);
+  
+  /* Flag that the window has been killed */
+  pWinPriv->fXKilled = TRUE;
+ 
+  /* Destroy the Windows window associated with this X window */
+  winDestroyWindowsWindow (pWin);
+
+  return fResult;
+}
+
+
+/*
+ * MapWindow - See Porting Layer Definition - p. 37
+ * Also referred to as RealizeWindow
+ */
+
+Bool
+winMapWindowMultiWindow (WindowPtr pWin)
+{
+  Bool			fResult = TRUE;
+  winWindowPriv(pWin);
+
+#if CYGMULTIWINDOW_DEBUG
+  ErrorF ("winMapWindowMultiWindow - pWin: %08x\n", pWin);
+#endif
+  
+  /* Call any wrapped RealizeWindow function */
+  if (winGetScreenPriv(pWin->drawable.pScreen)->RealizeWindow)
+    fResult = winGetScreenPriv(pWin->drawable.pScreen)->RealizeWindow (pWin);
+  
+  /* Flag that this window has not been destroyed */
+  pWinPriv->fXKilled = FALSE;
+
+  /* Refresh/redisplay the Windows window associated with this X window */
+  winUpdateWindowsWindow (pWin);
+
+#if WIN_MULTIWINDOW_SHAPE
+  winReshape (pWin);
+  winUpdateRgn (pWin);
+#endif
+
+  return fResult;
+}
+
+
+/*
+ * ReparentWindow - See Porting Layer Definition - p. 42
+ */
+
+void
+winReparentWindowMultiWindow (WindowPtr pWin, WindowPtr pPriorParent)
+{
+#if CYGMULTIWINDOW_DEBUG
+  ErrorF ("winReparentMultiWindow - pWin: %08x\n", pWin);
+#endif
+
+  /* Call any wrapped ReparentWindow function */
+  if (winGetScreenPriv(pWin->drawable.pScreen)->ReparentWindow)
+    winGetScreenPriv(pWin->drawable.pScreen)->ReparentWindow (pWin,
+							      pPriorParent);
+  
+  /* Update the Windows window associated with this X window */
+  winUpdateWindowsWindow (pWin);
+}
+
+
+/*
+ * RestackWindow - Shuffle the z-order of a window
+ */
+
+void
+winRestackWindowMultiWindow (WindowPtr pWin, WindowPtr pOldNextSib)
+{
+  WindowPtr		pPrevWin;
+  UINT			uFlags;
+  HWND			hInsertAfter;
+  winWindowPriv(pWin);
+
+#if CYGMULTIWINDOW_DEBUG
+  ErrorF ("winRestackMultiWindow - %08x\n", pWin);
+#endif
+  
+  /* Call any wrapped RestackWindow function */
+  if (winGetScreenPriv(pWin->drawable.pScreen)->RestackWindow)
+    winGetScreenPriv(pWin->drawable.pScreen)->RestackWindow (pWin,
+							     pOldNextSib);
+  
+  /* Bail out if no window privates or window handle is invalid */
+  if (!pWinPriv || !pWinPriv->hWnd)
+    return;
+
+  /* Get a pointer to our previous sibling window */
+  pPrevWin = pWin->prevSib;
+
+  /*
+   * Look for a sibling window with
+   * valid privates and window handle
+   */
+  while (pPrevWin
+	 && !winGetWindowPriv(pPrevWin)
+	 && !winGetWindowPriv(pPrevWin)->hWnd)
+    pPrevWin = pPrevWin->prevSib;
+      
+  /* Check if we found a valid sibling */
+  if (pPrevWin)
+    {
+      /* Valid sibling - get handle to insert window after */
+      hInsertAfter = winGetWindowPriv(pPrevWin)->hWnd;
+      uFlags = SWP_NOACTIVATE | SWP_NOMOVE | SWP_NOSIZE;
+    }
+  else
+    {
+      /* No valid sibling - make this window the top window */
+      hInsertAfter = HWND_TOP;
+      uFlags = SWP_NOMOVE | SWP_NOSIZE;
+    }
+      
+  /* Perform the restacking operation in Windows */
+  SetWindowPos (pWinPriv->hWnd,
+		hInsertAfter,
+		0, 0,
+		0, 0,
+		uFlags);
+}
+
+
+/*
+ * SetShape - See Porting Layer Definition - p. 42
+ */
+
+#ifdef SHAPE
+void
+winSetShapeMultiWindow (WindowPtr pWin)
+{
+#if CYGMULTIWINDOW_DEBUG
+  ErrorF ("winSetShapeMultiWindow - pWin: %08x\n", pWin);
+#endif
+  
+  /* Call any wrapped SetShape function */
+  if (winGetScreenPriv(pWin->drawable.pScreen)->SetShape)
+    winGetScreenPriv(pWin->drawable.pScreen)->SetShape (pWin);
+  
+  /*
+   * NOTE: We do not currently do anything here.
+   */
+
+#if WIN_MULTIWINDOW_SHAPE
+  winReshape (pWin);
+  winUpdateRgn (pWin);
+#endif
+
+  return;
+}
+#endif
+
+
+/*
+ * winUpdateRgn - Local function to update a Windows window region
+ */
+
+static
+void
+winUpdateRgn (WindowPtr pWin)
+{
+#if 1
+  SetWindowRgn (winGetWindowPriv(pWin)->hWnd,
+		winGetWindowPriv(pWin)->hRgn, TRUE);
+#endif
+}
+
+
+/*
+ * winReshape - Computes the composite clipping region for a window
+ */
+
+#ifdef SHAPE
+static
+void
+winReshape (WindowPtr pWin)
+{
+  int		nRects;
+  ScreenPtr	pScreen = pWin->drawable.pScreen;
+  RegionRec	rrNewShape;
+  BoxPtr	pShape, pRects, pEnd;
+  HRGN		hRgn, hRgnRect;
+  winWindowPriv(pWin);
+
+#if CYGDEBUG
+  ErrorF ("winReshape ()\n");
+#endif
+  
+  /* Bail if the window is the root window */
+  if (pWin->parent == NULL)
+    return;
+
+  /* Bail if the window is not top level */
+  if (pWin->parent->parent != NULL)
+    return;
+
+  /* Bail if Windows window handle is invalid */
+  if (pWinPriv->hWnd == NULL)
+    return;
+  
+  /* Free any existing window region stored in the window privates */
+  if (pWinPriv->hRgn != NULL)
+    {
+      DeleteObject (pWinPriv->hRgn);
+      pWinPriv->hRgn = NULL;
+    }
+  
+  /* Bail if the window has no bounding region defined */
+  if (!wBoundingShape (pWin))
+    return;
+
+  REGION_INIT(pScreen, &rrNewShape, NullBox, 0);
+  REGION_COPY(pScreen, &rrNewShape, wBoundingShape(pWin));
+  REGION_TRANSLATE(pScreen,
+		   &rrNewShape,
+		   pWin->borderWidth,
+                   pWin->borderWidth);
+  
+  nRects = REGION_NUM_RECTS(&rrNewShape);
+  pShape = REGION_RECTS(&rrNewShape);
+  
+  /* Don't do anything if there are no rectangles in the region */
+  if (nRects > 0)
+    {
+      RECT			rcClient;
+      RECT			rcWindow;
+      int			iOffsetX, iOffsetY;
+      
+      /* Get client rectangle */
+      if (!GetClientRect (pWinPriv->hWnd, &rcClient))
+	{
+	  ErrorF ("winReshape - GetClientRect failed, bailing: %d\n",
+		  GetLastError ());
+	  return;
+	}
+
+      /* Translate client rectangle coords to screen coords */
+      /* NOTE: Only transforms top and left members */
+      ClientToScreen (pWinPriv->hWnd, (LPPOINT) &rcClient);
+
+      /* Get window rectangle */
+      if (!GetWindowRect (pWinPriv->hWnd, &rcWindow))
+	{
+	  ErrorF ("winReshape - GetWindowRect failed, bailing: %d\n",
+		  GetLastError ());
+	  return;
+	}
+
+      /* Calculate offset from window upper-left to client upper-left */
+      iOffsetX = rcClient.left - rcWindow.left;
+      iOffsetY = rcClient.top - rcWindow.top;
+
+      /* Create initial Windows region for title bar */
+      /* FIXME: Mean, nasty, ugly hack!!! */
+      hRgn = CreateRectRgn (0, 0, rcWindow.right, iOffsetY);
+      if (hRgn == NULL)
+	{
+	  ErrorF ("winReshape - Initial CreateRectRgn (%d, %d, %d, %d) "
+		  "failed: %d\n",
+		  0, 0, rcWindow.right, iOffsetY, GetLastError ());
+	}
+
+      /* Loop through all rectangles in the X region */
+      for (pRects = pShape, pEnd = pShape + nRects; pRects < pEnd; pRects++)
+        {
+	  /* Create a Windows region for the X rectangle */
+	  hRgnRect = CreateRectRgn (pRects->x1 + iOffsetX - 1,
+				    pRects->y1 + iOffsetY - 1,
+				    pRects->x2 + iOffsetX - 1,
+				    pRects->y2 + iOffsetY - 1);
+	  if (hRgnRect == NULL)
+	    {
+	      ErrorF ("winReshape - Loop CreateRectRgn (%d, %d, %d, %d) "
+		      "failed: %d\n"
+		      "\tx1: %d x2: %d xOff: %d y1: %d y2: %d yOff: %d\n",
+		      pRects->x1 + iOffsetX - 1,
+		      pRects->y1 + iOffsetY - 1,
+		      pRects->x2 + iOffsetX - 1,
+		      pRects->y2 + iOffsetY - 1,
+		      GetLastError (),
+		      pRects->x1, pRects->x2, iOffsetX,
+		      pRects->y1, pRects->y2, iOffsetY);
+	    }
+
+	  /* Merge the Windows region with the accumulated region */
+	  if (CombineRgn (hRgn, hRgn, hRgnRect, RGN_OR) == ERROR)
+	    {
+	      ErrorF ("winReshape - CombineRgn () failed: %d\n",
+		      GetLastError ());
+	    }
+
+	  /* Delete the temporary Windows region */
+	  DeleteObject (hRgnRect);
+        }
+      
+      /* Save a handle to the composite region in the window privates */
+      pWinPriv->hRgn = hRgn;
+    }
+
+  REGION_UNINIT(pScreen, &rrNewShape);
+  
+  return;
+}
+#endif
+
+
+/*
+ * winTopLevelWindowProc - Window procedure for all top-level Windows windows.
+ */
+
+LRESULT CALLBACK
+winTopLevelWindowProc (HWND hwnd, UINT message, 
+		       WPARAM wParam, LPARAM lParam)
+{
+  POINT			ptMouse;
+  HDC			hdcUpdate;
+  PAINTSTRUCT		ps;
+  WindowPtr		pWin = NULL;
+  winPrivWinPtr	        pWinPriv = NULL;
+  ScreenPtr		s_pScreen = NULL;
+  winPrivScreenPtr	s_pScreenPriv = NULL;
+  winScreenInfo		*s_pScreenInfo = NULL;
+  HWND			hwndScreen = NULL;
+  DrawablePtr		pDraw = NULL;
+  int		        iX, iY, iWidth, iHeight, iBorder;
+  winWMMessageRec	wmMsg;
+  static Bool		s_fTracking = FALSE;
+  static Bool           s_fCursor = TRUE;
+  
+  /* Check if the Windows window property for our X window pointer is valid */
+  if ((pWin = GetProp (hwnd, WIN_WINDOW_PROP)) != NULL)
+    {
+      /* Our X window pointer is valid */
+
+      /* Get pointers to the drawable and the screen */
+      pDraw		= &pWin->drawable;
+      s_pScreen		= pWin->drawable.pScreen;
+
+      /* Get a pointer to our window privates */
+      pWinPriv		= winGetWindowPriv(pWin);
+
+      /* Get pointers to our screen privates and screen info */
+      s_pScreenPriv	= pWinPriv->pScreenPriv;
+      s_pScreenInfo	= s_pScreenPriv->pScreenInfo;
+
+      /* Get the handle for our screen-sized window */
+      /* NOTE: This will be going away at some point, right?  Harold Hunt - 2003/01/15 */
+      hwndScreen	= s_pScreenPriv->hwndScreen;
+
+      /* */
+      wmMsg.msg		= 0;
+      wmMsg.hwndWindow	= hwnd;
+      wmMsg.iWindow	= (Window)GetProp (hwnd, WIN_WID_PROP);
+
+#if 1
+      wmMsg.iX		= pWinPriv->iX;
+      wmMsg.iY		= pWinPriv->iY;
+      wmMsg.iWidth	= pWinPriv->iWidth;
+      wmMsg.iHeight	= pWinPriv->iHeight;
+#else
+      wmMsg.iX		= pDraw.x;
+      wmMsg.iY		= pDraw.y;
+      wmMsg.iWidth	= pDraw.width;
+      wmMsg.iHeight	= pDraw.height;
+#endif
+
+
+#if 0
+      /*
+       * Print some debugging information
+       */
+
+      ErrorF ("hWnd %08X\n", hwnd);
+      ErrorF ("pWin %08X\n", pWin);
+      ErrorF ("pDraw %08X\n", pDraw);
+      ErrorF ("\ttype %08X\n", pWin->drawable.type);
+      ErrorF ("\tclass %08X\n", pWin->drawable.class);
+      ErrorF ("\tdepth %08X\n", pWin->drawable.depth);
+      ErrorF ("\tbitsPerPixel %08X\n", pWin->drawable.bitsPerPixel);
+      ErrorF ("\tid %08X\n", pWin->drawable.id);
+      ErrorF ("\tx %08X\n", pWin->drawable.x);
+      ErrorF ("\ty %08X\n", pWin->drawable.y);
+      ErrorF ("\twidth %08X\n", pWin->drawable.width);
+      ErrorF ("\thenght %08X\n", pWin->drawable.height);
+      ErrorF ("\tpScreen %08X\n", pWin->drawable.pScreen);
+      ErrorF ("\tserialNumber %08X\n", pWin->drawable.serialNumber);
+      ErrorF ("g_iWindowPrivateIndex %d\n", g_iWindowPrivateIndex);
+      ErrorF ("pWinPriv %08X\n", pWinPriv);
+      ErrorF ("s_pScreenPriv %08X\n", s_pScreenPriv);
+      ErrorF ("s_pScreenInfo %08X\n", s_pScreenInfo);
+      ErrorF ("hwndScreen %08X\n", hwndScreen);
+#endif
+    }
+
+
+
+  /* Branch on message type */
+  switch (message)
+    {
+    case WM_CREATE:
+#if CYGMULTIWINDOW_DEBUG
+      ErrorF ("winTopLevelWindowProc - WM_CREATE\n");
+#endif
+
+      /* */
+      SetProp (hwnd,
+	       WIN_WINDOW_PROP,
+	       (HANDLE)((LPCREATESTRUCT) lParam)->lpCreateParams);
+      
+      /* */
+      SetProp (hwnd,
+	       WIN_WID_PROP,
+	       (HANDLE)winGetWindowID (((LPCREATESTRUCT) lParam)->lpCreateParams));
+      return 0;
+      
+    case WM_PAINT:
+      /* Only paint if our window handle is valid */
+      if (hwndScreen == NULL)
+	break;
+
+      /* BeginPaint gives us an hdc that clips to the invalidated region */
+      hdcUpdate = BeginPaint (hwnd, &ps);
+
+#if 0
+      /* NOTE: Doesn't appear to be used - Harold Hunt - 2003/01/15 */
+      /* Get the dimensions of the client area */
+      GetClientRect (hwnd, &rcClient);
+#endif
+
+      /* Get the position and dimensions of the window */
+      iBorder = wBorderWidth (pWin);
+      iX = pWin->drawable.x;
+      iY = pWin->drawable.y;
+      iWidth = pWin->drawable.width;
+      iHeight = pWin->drawable.height;
+
+      /* Try to copy from the shadow buffer */
+      if (!BitBlt (hdcUpdate,
+		   0, 0,
+		   iWidth, iHeight,
+		   s_pScreenPriv->hdcShadow,
+		   iX, iY,
+		   SRCCOPY))
+	{
+	  LPVOID lpMsgBuf;
+	  
+	  /* Display a fancy error message */
+	  FormatMessage (FORMAT_MESSAGE_ALLOCATE_BUFFER | 
+			 FORMAT_MESSAGE_FROM_SYSTEM | 
+			 FORMAT_MESSAGE_IGNORE_INSERTS,
+			 NULL,
+			 GetLastError (),
+			 MAKELANGID(LANG_NEUTRAL, SUBLANG_DEFAULT), // Default language
+			 (LPTSTR) &lpMsgBuf,
+			 0, NULL);
+
+	  ErrorF ("winTopLevelWindowProc - BitBlt failed: %s\n",
+		  (LPSTR)lpMsgBuf);
+	  LocalFree (lpMsgBuf);
+	}
+
+      /* EndPaint frees the DC */
+      EndPaint (hwndScreen, &ps);
+      return 0;
+
+
+#if 1
+    case WM_MOUSEMOVE:
+      /* Unpack the client area mouse coordinates */
+      ptMouse.x = GET_X_LPARAM(lParam);
+      ptMouse.y = GET_Y_LPARAM(lParam);
+
+      /* Translate the client area mouse coordinates to screen coordinates */
+      ClientToScreen (hwnd, &ptMouse);
+
+      /* We can't do anything without privates */
+      if (s_pScreenPriv == NULL || s_pScreenInfo->fIgnoreInput)
+	break;
+
+      /* Has the mouse pointer crossed screens? */
+      if (s_pScreen != miPointerCurrentScreen ())
+	miPointerSetNewScreen (s_pScreenInfo->dwScreen,
+			       ptMouse.x - s_pScreenInfo->dwXOffset,
+			       ptMouse.y - s_pScreenInfo->dwYOffset);
+
+      /* Are we tracking yet? */
+      if (!s_fTracking)
+	{
+	  TRACKMOUSEEVENT		tme;
+	  
+	  /* Setup data structure */
+	  ZeroMemory (&tme, sizeof (tme));
+	  tme.cbSize = sizeof (tme);
+	  tme.dwFlags = TME_LEAVE;
+	  tme.hwndTrack = hwnd;
+
+	  /* Call the tracking function */
+	  if (!(*g_fpTrackMouseEvent) (&tme))
+	    ErrorF ("winTopLevelWindowProc - _TrackMouseEvent failed\n");
+
+	  /* Flag that we are tracking now */
+	  s_fTracking = TRUE;
+	}
+      
+      /* Hide or show the Windows mouse cursor */
+      if (s_fCursor)
+	{
+	  /* Hide Windows cursor */
+	  s_fCursor = FALSE;
+	  ShowCursor (FALSE);
+	  KillTimer (hwnd, s_nIDPollingMouse);
+	}
+
+      /* Deliver absolute cursor position to X Server */
+      miPointerAbsoluteCursor (ptMouse.x - s_pScreenInfo->dwXOffset,
+			       ptMouse.y - s_pScreenInfo->dwYOffset,
+			       g_c32LastInputEventTime = GetTickCount ());
+      return 0;
+      
+    case WM_NCMOUSEMOVE:
+      /*
+       * We break instead of returning 0 since we need to call
+       * DefWindowProc to get the mouse cursor changes
+       * and min/max/close button highlighting in Windows XP.
+       * The Platform SDK says that you should return 0 if you
+       * process this message, but it fails to mention that you
+       * will give up any default functionality if you do return 0.
+       */
+      
+      /* We can't do anything without privates */
+      if (s_pScreenPriv == NULL || s_pScreenInfo->fIgnoreInput)
+	break;
+
+      /* Non-client mouse movement, show Windows cursor */
+      if (!s_fCursor)
+	{
+	  s_fCursor = TRUE;
+	  ShowCursor (TRUE);
+	  SetTimer (hwnd, s_nIDPollingMouse, MOUSE_POLLING_INTERVAL, NULL);
+	}
+      break;
+
+    case WM_MOUSELEAVE:
+      /* Mouse has left our client area */
+
+      /* Flag that we are no longer tracking */
+      s_fTracking = FALSE;
+
+      /* Show the mouse cursor, if necessary */
+      if (!s_fCursor)
+	{
+	  s_fCursor = TRUE;
+	  ShowCursor (TRUE);
+	  SetTimer (hwnd, s_nIDPollingMouse, MOUSE_POLLING_INTERVAL, NULL);
+	}
+      return 0;
+
+    case WM_LBUTTONDBLCLK:
+    case WM_LBUTTONDOWN:
+      if (s_pScreenPriv == NULL || s_pScreenInfo->fIgnoreInput)
+	break;
+      return winMouseButtonsHandle (s_pScreen, ButtonPress, Button1, wParam);
+      
+    case WM_LBUTTONUP:
+      if (s_pScreenPriv == NULL || s_pScreenInfo->fIgnoreInput)
+	break;
+      return winMouseButtonsHandle (s_pScreen, ButtonRelease, Button1, wParam);
+
+    case WM_MBUTTONDBLCLK:
+    case WM_MBUTTONDOWN:
+      if (s_pScreenPriv == NULL || s_pScreenInfo->fIgnoreInput)
+	break;
+      return winMouseButtonsHandle (s_pScreen, ButtonPress, Button2, wParam);
+      
+    case WM_MBUTTONUP:
+      if (s_pScreenPriv == NULL || s_pScreenInfo->fIgnoreInput)
+	break;
+      return winMouseButtonsHandle (s_pScreen, ButtonRelease, Button2, wParam);
+      
+    case WM_RBUTTONDBLCLK:
+    case WM_RBUTTONDOWN:
+      if (s_pScreenPriv == NULL || s_pScreenInfo->fIgnoreInput)
+	break;
+      return winMouseButtonsHandle (s_pScreen, ButtonPress, Button3, wParam);
+      
+    case WM_RBUTTONUP:
+      if (s_pScreenPriv == NULL || s_pScreenInfo->fIgnoreInput)
+	break;
+      return winMouseButtonsHandle (s_pScreen, ButtonRelease, Button3, wParam);
+
+#else
+
+    case WM_MOUSEMOVE:
+#if CYGMULTIWINDOW_DEBUG
+      ErrorF ("winTopLevelWindowProc - WM_MOUSEMOVE*\n");
+#endif
+
+      /* Unpack the client area mouse coordinates */
+      ptMouse.x = GET_X_LPARAM(lParam);
+      ptMouse.y = GET_Y_LPARAM(lParam);
+
+      /* Translate the client area mouse coordinates to screen coordinates */
+      ClientToScreen (hwnd, &ptMouse);
+
+      /* Pass the message to the root window */
+      SendMessage (hwndScreen, message, wParam, MAKELONG(ptMouse.x, ptMouse.y));
+      return  0;
+
+    case WM_NCMOUSEMOVE:
+    case WM_LBUTTONDBLCLK:
+    case WM_LBUTTONDOWN:
+    case WM_LBUTTONUP:
+    case WM_MBUTTONDBLCLK:
+    case WM_MBUTTONDOWN:
+    case WM_MBUTTONUP:
+    case WM_RBUTTONDBLCLK:
+    case WM_RBUTTONDOWN:
+    case WM_RBUTTONUP:
+    case WM_MOUSELEAVE:
+#if CYGMULTIWINDOW_DEBUG
+      ErrorF ("winTopLevelWindowProc - WM_*BUTTON*\n");
+#endif
+
+      /* Pass the message to the root window */
+      SendMessage(hwndScreen, message, wParam, MAKELONG(ptMouse.x, ptMouse.y));
+      return  0;
+#endif
+
+    case WM_MOUSEWHEEL:
+#if CYGMULTIWINDOW_DEBUG
+      ErrorF ("winTopLevelWindowProc - WM_MOUSEWHEEL\n");
+#endif
+      
+      /* Pass the message to the root window */
+      SendMessage(hwndScreen, message, wParam, lParam);
+      return 0;
+
+    case WM_SYSKEYDOWN:
+    case WM_SYSKEYUP:
+    case WM_SYSDEADCHAR:
+    case WM_KEYDOWN:
+    case WM_KEYUP:
+    case WM_DEADCHAR:
+#if CYGMULTIWINDOW_DEBUG
+      ErrorF ("winTopLevelWindowProc - WM_*KEY*\n");
+#endif
+
+      /* Pass the message to the root window */
+      SendMessage (hwndScreen, message, wParam, lParam);
+      return 0;
+
+    case WM_HOTKEY:
+#if CYGMULTIWINDOW_DEBUG
+      ErrorF ("winTopLevelWindowProc - WM_HOTKEY\n");
+#endif
+
+      /* Pass the message to the root window */
+      SendMessage (hwndScreen, message, wParam, lParam);
+      return 0;
+
+
+#if 1
+    case WM_ACTIVATE:
+#if CYGMULTIWINDOW_DEBUG
+      ErrorF ("winTopLevelWindowProc - WM_ACTIVATE\n");
+#endif
+
+      /* Pass the message to the root window */
+      SendMessage (hwndScreen, message, wParam, lParam);
+
+      /* Bail if inactivating */
+      if (LOWORD(wParam) == WA_INACTIVE)
+	return 0;
+
+      /* Check if the current window is the active window in Windows */
+      if (GetActiveWindow () == hwnd)
+	{
+	  /* Tell our Window Manager thread to raise the window */
+	  wmMsg.msg = WM_WM_RAISE;
+	  winSendMessageToWM (s_pScreenPriv->pWMInfo, &wmMsg);
+	}
+      
+      /* Tell our Window Manager thread to activate the window */
+      wmMsg.msg = WM_WM_ACTIVATE;
+      winSendMessageToWM (s_pScreenPriv->pWMInfo, &wmMsg);
+	  
+      return 0;
+
+    case WM_ACTIVATEAPP:
+#if CYGMULTIWINDOW_DEBUG
+      ErrorF ("winTopLevelWindowProc - WM_ACTIVATEAPP\n");
+#endif
+      
+      /* Pass the message to the root window */
+      SendMessage (hwndScreen, message, wParam, lParam);
+      return 0;
+#endif
+
+
+    case WM_CLOSE:
+#if CYGMULTIWINDOW_DEBUG
+      ErrorF ("winTopLevelWindowProc - WM_CLOSE\n");
+#endif
+      /* Branch on if the window was killed in X already */
+      if (pWinPriv->fXKilled)
+        {
+	  /* Window was killed, go ahead and destroy the window */
+	  DestroyWindow (hwnd);
+	}
+      else
+	{
+	  /* Tell our Window Manager thread to kill the window */
+	  wmMsg.msg = WM_WM_KILL;
+	  winSendMessageToWM (s_pScreenPriv->pWMInfo, &wmMsg);
+	}
+      return 0;
+
+    case WM_DESTROY:
+#if CYGMULTIWINDOW_DEBUG
+      ErrorF ("winTopLevelWindowProc - WM_DESTROY\n");
+#endif
+
+      /* Branch on if the window was killed in X already */
+      if (pWinPriv && !pWinPriv->fXKilled)
+	{
+	  ErrorF ("winTopLevelWindowProc - WM_DESTROY - WM_WM_KILL\n");
+	  
+	  /* Tell our Window Manager thread to kill the window */
+	  wmMsg.msg = WM_WM_KILL;
+	  winSendMessageToWM (s_pScreenPriv->pWMInfo, &wmMsg);
+	}
+
+#if CYGMULTIWINDOW_DEBUG
+      ErrorF ("winTopLevelWindowProc - WM_DESTROY\n");
+#endif
+      break;
+
+    case WM_MOVE:
+#if CYGMULTIWINDOW_DEBUG
+      ErrorF ("winTopLevelWindowProc - WM_MOVE - %d ms\n", GetTickCount ());
+#endif
+      
+      /* Bail if Windows window is not actually moving */
+      if (pWinPriv->iX == (short) LOWORD(lParam)
+	  && pWinPriv->iY == (short) HIWORD(lParam))
+	break;
+
+      /* Get new position */
+      pWinPriv->iX = (short) LOWORD(lParam);
+      pWinPriv->iY = (short) HIWORD(lParam);
+
+#if CYGMULTIWINDOW_DEBUG
+      ErrorF ("\t(%d, %d)\n", pWinPriv->iX, pWinPriv->iY);
+#endif
+
+      /* Notify the X client that its window is moving */
+      if (SubStrSend(pWin, pWin->parent))
+	SendConfigureNotify (pWin);
+
+      /* Tell X that the window is moving */
+      (s_pScreen->MoveWindow) (pWin,
+			       (int)(short) LOWORD(lParam) - wBorderWidth (pWin),
+			       (int)(short) HIWORD(lParam) - wBorderWidth (pWin),
+			       pWin->nextSib,
+			       VTMove);
+      return 0;
+
+    case WM_SHOWWINDOW:
+      /* Bail out if the window is being hidden */
+      if (!wParam)
+	return 0;
+
+      /* Tell X to map the window */
+      MapWindow (pWin, wClient(pWin));
+
+      /* */
+      if (!pWin->overrideRedirect)
+	{
+	  DWORD		dwExStyle;
+	  DWORD		dwStyle;
+	  RECT		rcNew;
+	  int		iDx, iDy;
+	      
+	  /* Flag that this window needs to be made active when clicked */
+	  SetProp (hwnd, WIN_NEEDMANAGE_PROP, (HANDLE) 1);
+
+	  /* Get the standard and extended window style information */
+	  dwExStyle = GetWindowLongPtr (hwnd, GWL_EXSTYLE);
+	  dwStyle = GetWindowLongPtr (hwnd, GWL_STYLE);
+
+	  /* */
+	  if (dwExStyle != WS_EX_APPWINDOW)
+	    {
+	      /* Setup a rectangle with the X window position and size */
+	      SetRect (&rcNew,
+		       pWinPriv->iX,
+		       pWinPriv->iY,
+		       pWinPriv->iX + pWinPriv->iWidth,
+		       pWinPriv->iY + pWinPriv->iHeight);
+
+#if 0
+	      ErrorF ("winTopLevelWindowProc - (%d, %d)-(%d, %d)\n",
+		      rcNew.left, rcNew.top,
+		      rcNew.right, rcNew.bottom);
+#endif
+
+	      /* */
+	      AdjustWindowRectEx (&rcNew,
+				  WS_POPUP | WS_SIZEBOX | WS_OVERLAPPEDWINDOW,
+				  FALSE,
+				  WS_EX_APPWINDOW);
+
+	      /* Calculate position deltas */
+	      iDx = pWinPriv->iX - rcNew.left;
+	      iDy = pWinPriv->iY - rcNew.top;
+
+	      /* Calculate new rectangle */
+	      rcNew.left += iDx;
+	      rcNew.right += iDx;
+	      rcNew.top += iDy;
+	      rcNew.bottom += iDy;
+
+#if 0
+	      ErrorF ("winTopLevelWindowProc - (%d, %d)-(%d, %d)\n",
+		      rcNew.left, rcNew.top,
+		      rcNew.right, rcNew.bottom);
+#endif
+
+	      /* Set the window extended style flags */
+	      SetWindowLongPtr (hwnd, GWL_EXSTYLE, WS_EX_APPWINDOW);
+
+	      /* Set the window standard style flags */
+	      SetWindowLongPtr (hwnd, GWL_STYLE, WS_POPUP | WS_SIZEBOX | WS_OVERLAPPEDWINDOW);
+
+	      /* Positon the Windows window */
+	      SetWindowPos (hwnd, HWND_TOP,
+			    rcNew.left, rcNew.top,
+			    rcNew.right - rcNew.left, rcNew.bottom - rcNew.top,
+			    SWP_NOMOVE | SWP_FRAMECHANGED | SWP_SHOWWINDOW | SWP_NOACTIVATE);
+
+	      /* Bring the Window window to the foreground */
+	      SetForegroundWindow (hwnd);
+	    }
+	}
+	  
+      /* Setup the Window Manager message */
+      wmMsg.msg = WM_WM_MAP;
+      wmMsg.iWidth = pWinPriv->iWidth;
+      wmMsg.iHeight = pWinPriv->iHeight;
+
+      /* Tell our Window Manager thread to map the window */
+      winSendMessageToWM (s_pScreenPriv->pWMInfo, &wmMsg);
+
+      /* Setup the Window Manager message */
+      wmMsg.msg = WM_WM_RAISE;
+
+      /* Tell our Window Manager thread to raise the window */
+      winSendMessageToWM (s_pScreenPriv->pWMInfo, &wmMsg);
+      return 0;
+
+    case WM_SIZE:
+      /* see dix/window.c */
+
+#if CYGMULTIWINDOW_DEBUG
+      ErrorF ("winTopLevelWindowProc - WM_SIZE - %d ms\n", GetTickCount ());
+#endif
+
+      switch (wParam)
+	{
+	case SIZE_MINIMIZED:
+#if CYGMULTIWINDOW_DEBUG
+	  ErrorF ("\tSIZE_MINIMIZED\n");
+#endif
+	  
+	  wmMsg.msg = WM_WM_LOWER;
+
+	  /* Tell our Window Manager thread to lower the window */
+	  winSendMessageToWM (s_pScreenPriv->pWMInfo, &wmMsg);
+	  break;
+
+	case SIZE_RESTORED:
+	case SIZE_MAXIMIZED:
+	  if (pWinPriv->iWidth == (short) LOWORD(lParam)
+	      && pWinPriv->iHeight == (short) HIWORD(lParam))
+	    break;
+	  
+	  /* Get the dimensions of the Windows window */
+	  pWinPriv->iWidth = (short) LOWORD(lParam);
+	  pWinPriv->iHeight = (short) HIWORD(lParam);
+
+#if CYGMULTIWINDOW_DEBUG
+	  ErrorF ("\t(%d, %d)\n", pWinPriv->iWidth, pWinPriv->iHeight);
+#endif
+
+	  /* Check if resize events are redirected */
+	  if ((pWin->eventMask | wOtherEventMasks (pWin)) & ResizeRedirectMask)
+	    {
+	      xEvent		eventT;
+
+	      /* Setup the X event structure */
+	      eventT.u.u.type = ResizeRequest;
+	      eventT.u.resizeRequest.window = pWin->drawable.id;
+	      eventT.u.resizeRequest.width = pWinPriv->iWidth;
+	      eventT.u.resizeRequest.height = pWinPriv->iHeight;
+
+	      /* */
+	      if (MaybeDeliverEventsToClient (pWin, &eventT, 1,
+					      ResizeRedirectMask,
+					      wClient(pWin)) == 1)
+		break;
+	    }
+
+	  /* Notify the X client that its window is being resized */
+	  if (SubStrSend (pWin, pWin->parent))
+	    SendConfigureNotify (pWin);
+	  
+	  /* Tell the X server that the window is being resized */
+	  (s_pScreen->ResizeWindow) (pWin,
+				     pWinPriv->iX - wBorderWidth (pWin),
+				     pWinPriv->iY - wBorderWidth (pWin),
+				     pWinPriv->iWidth,
+				     pWinPriv->iHeight,
+				     pWin->nextSib);
+
+	  /* Tell X to redraw the exposed portions of the window */
+	  {
+	    RegionRec		temp;
+
+	    /* Get the region describing the X window clip list */
+	    REGION_INIT(s_pScreen, &temp, NullBox, 0);
+	    REGION_COPY(s_pScreen, &temp, &pWin->clipList);
+
+	    /* Expose the clipped region */
+	    (*s_pScreen->WindowExposures) (pWin, &temp, NullRegion);
+
+	    /* Free the region */
+	    REGION_UNINIT(s_pScreen, &temp);
+	  }
+	  break;
+
+#if 0
+	case SIZE_MAXIMIZED:
+#if CYGMULTIWINDOW_DEBUG
+	  ErrorF ("\tSIZE_MAXIMIZED\n");
+#endif
+
+	  /* Get the dimensions of the window */
+	  pWinPriv->iWidth = (int)(short) LOWORD(lParam);
+	  pWinPriv->iHeight = (int)(short) HIWORD(lParam);
+
+#if CYGMULTIWINDOW_DEBUG
+	  ErrorF ("\t(%d, %d)\n", pWinPriv->iWidth, pWinPriv->iHeight);
+#endif
+
+	  /* */
+	  if ((pWin->eventMask|wOtherEventMasks(pWin)) & ResizeRedirectMask)
+	    {
+	      xEvent		eventT;
+	      
+	      eventT.u.u.type = ResizeRequest;
+	      eventT.u.resizeRequest.window = pWin->drawable.id;
+	      eventT.u.resizeRequest.width = pWinPriv->iWidth;
+	      eventT.u.resizeRequest.height = pWinPriv->iHeight;
+	      if (MaybeDeliverEventsToClient (pWin, &eventT, 1,
+					      ResizeRedirectMask,
+					      wClient(pWin)) == 1);
+	    }
+	  
+	  
+	  (s_pScreen->ResizeWindow) (pWin,
+				     pWinPriv->iX - wBorderWidth (pWin),
+				     pWinPriv->iY - wBorderWidth (pWin),
+				     pWinPriv->iWidth,
+				     pWinPriv->iHeight,
+				     pWin->nextSib);
+	  break;
+#endif
+
+	default:
+	  break;
+	}
+      return 0;
+
+    case WM_MOUSEACTIVATE:
+#if CYGMULTIWINDOW_DEBUG
+      ErrorF ("winTopLevelWindowProc - WM_MOUSEACTIVATE\n");
+#endif
+
+      /* Check if this window needs to be made active when clicked */
+      if (!GetProp (pWinPriv->hWnd, WIN_NEEDMANAGE_PROP))
+	{
+#if CYGMULTIWINDOW_DEBUG
+	  ErrorF ("winTopLevelWindowProc - WM_MOUSEACTIVATE - MA_NOACTIVATE\n");
+#endif
+
+	  /* */
+	  return MA_NOACTIVATE;
+	}
+      break;
+
+    case WM_TIMER:
+#if CYGMULTIWINDOW_DEBUG
+      ErrorF ("winTopLevelWindowProc - WM_TIMER - %d ms\n", GetTickCount ());
+#endif
+      
+      /* Branch on the type of timer event that fired */
+      if (wParam == s_nIDPollingMouse)
+	{
+	  POINT		point;
+
+	  /* Get the current position of the mouse cursor */
+	  GetCursorPos (&point);
+
+	  /* Deliver absolute cursor position to X Server */
+	  miPointerAbsoluteCursor (point.x, point.y,
+				   g_c32LastInputEventTime = GetTickCount ());
+	}
+      else
+	{
+	  ErrorF ("winTopLevelWindowProc - Unknown WM_TIMER\n");
+	}
+      return 0;
+
+    default:
+      break;
+    }
+
+  return DefWindowProc (hwnd, message, wParam, lParam);
+}
+
+
+/*
+ * winCreateWindowsWindow - Create a Windows window associated with an X window
+ */
+
+static void
+winCreateWindowsWindow (WindowPtr pWin)
+{
+  int                   iX, iY;
+  int			iWidth;
+  int			iHeight;
+  int                   iBorder;
+  HWND			hWnd;
+  WNDCLASS		wc;
+  winWindowPriv(pWin);
+
+#if CYGMULTIWINDOW_DEBUG
+  ErrorF ("winCreateWindowsWindow - pWin: %08x\n", pWin);
+#endif
+
+  iBorder = wBorderWidth (pWin);
+  
+  iX = pWin->drawable.x;
+  iY = pWin->drawable.y;
+  
+  iWidth = pWin->drawable.width;
+  iHeight = pWin->drawable.height;
+  
+  /* Setup our window class */
+  wc.style = CS_HREDRAW | CS_VREDRAW;
+  wc.lpfnWndProc = winTopLevelWindowProc;
+  wc.cbClsExtra = 0;
+  wc.cbWndExtra = 0;
+  wc.hInstance = g_hInstance;
+  wc.hIcon = LoadIcon (g_hInstance, MAKEINTRESOURCE(IDI_XWIN));
+  wc.hCursor = 0;
+  wc.hbrBackground = (HBRUSH) GetStockObject (WHITE_BRUSH);
+  wc.lpszMenuName = NULL;
+  wc.lpszClassName = WINDOW_CLASS_X;
+  RegisterClass (&wc);
+
+  /* Create the window */
+  hWnd = CreateWindowExA (WS_EX_TOOLWINDOW,			/* Extended styles */
+			  WINDOW_CLASS_X,			/* Class name */
+			  WINDOW_TITLE_X,			/* Window name */
+			  WS_POPUP | WS_CLIPCHILDREN | WS_CLIPSIBLINGS,
+			  iX,					/* Horizontal position */
+			  iY,					/* Vertical position */
+			  iWidth,				/* Right edge */ 
+			  iHeight,				/* Bottom edge */
+			  (HWND) NULL,				/* No parent or owner window */
+			  (HMENU) NULL,				/* No menu */
+			  GetModuleHandle (NULL),		/* Instance handle */
+			  pWin);				/* ScreenPrivates */
+  if (hWnd == NULL)
+    {
+      ErrorF ("winCreateWindowsWindow - CreateWindowExA () failed: %d\n",
+	      GetLastError ());
+    }
+  
+  pWinPriv->hWnd = hWnd;
+
+
+  SetProp (pWinPriv->hWnd, WIN_WID_PROP, (HANDLE) winGetWindowID(pWin));
+
+  /* Flag that this Windows window handles its own activation */
+  SetProp (pWinPriv->hWnd, WIN_NEEDMANAGE_PROP, (HANDLE) 0);
+}
+
+
+/*
+ * winDestroyWindowsWindow - Destroy a Windows window associated with an X window
+ */
+
+static void
+winDestroyWindowsWindow (WindowPtr pWin)
+{
+  MSG			msg;
+  winWindowPriv(pWin);
+  
+#if CYGMULTIWINDOW_DEBUG
+  ErrorF ("winDestroyWindowsWindow\n");
+#endif
+
+
+  /* Bail out if the Windows window handle is invalid */
+  if (pWinPriv->hWnd == NULL)
+    return;
+
+
+  SetProp (pWinPriv->hWnd, WIN_WINDOW_PROP, 0);
+  
+  DestroyWindow (pWinPriv->hWnd);
+
+  pWinPriv->hWnd = NULL;
+  
+  /* Process all messages on our queue */
+  while (PeekMessage (&msg, NULL, 0, 0, PM_REMOVE))
+    {
+      if (g_hDlgDepthChange == 0 || !IsDialogMessage (g_hDlgDepthChange, &msg))
+	{
+	  DispatchMessage (&msg);
+	}
+    }
+  
+#if CYGMULTIWINDOW_DEBUG
+  ErrorF ("-winDestroyWindowsWindow\n");
+#endif
+}
+
+
+/*
+ * winUpdateWindowsWindow - Redisplay/redraw a Windows window associated with an X window
+ */
+
+static void
+winUpdateWindowsWindow (WindowPtr pWin)
+{
+  winWindowPriv(pWin);
+  HWND			hWnd = pWinPriv->hWnd;
+
+#if CYGMULTIWINDOW_DEBUG
+  ErrorF ("winUpdateWindowsWindow\n");
+#endif
+
+  /* Check if the Windows window's parents have been destroyed */
+  if (pWin->parent != NULL
+      && pWin->parent->parent == NULL
+      && pWin->mapped)
+    {
+      /* Create the Windows window if it has been destroyed */
+      if (hWnd == NULL)
+	{
+	  winCreateWindowsWindow (pWin);
+	  assert (pWinPriv->hWnd != NULL);
+	}
+
+      /* Display the window without activating it */
+      ShowWindow (pWinPriv->hWnd, SW_SHOWNOACTIVATE);
+
+      /* Send first paint message */
+      UpdateWindow (pWinPriv->hWnd);
+    }
+  else if (hWnd != NULL)
+    {
+      /* Destroy the Windows window if its parents are destroyed */
+      winDestroyWindowsWindow (pWin);
+      assert (pWinPriv->hWnd == NULL);
+    }
+
+#if CYGMULTIWINDOW_DEBUG
+  ErrorF ("-winUpdateWindowsWindow\n");
+#endif
+}
+
+
+
+
+
+
+
+
+typedef struct {
+    pointer		value;
+    XID			id;
+} WindowIDPairRec, *WindowIDPairPtr;
+
+
+
+
+
+/*
+ * winFindWindow - 
+ */
+
+static void
+winFindWindow (pointer value, XID id, pointer cdata)
+{
+  WindowIDPairPtr	wi = (WindowIDPairPtr)cdata;
+
+  if (value == wi->value)
+    {
+      wi->id = id;
+    }
+}
+
+
+/*
+ * winGetWindowID - 
+ */
+
+static XID
+winGetWindowID (WindowPtr pWin)
+{
+  WindowIDPairRec	wi = {pWin, 0};
+  ClientPtr		c = wClient(pWin);
+  
+  /* */
+  FindClientResourcesByType (c, RT_WINDOW, winFindWindow, &wi);
+
+#if CYGMULTIWINDOW_DEBUG
+  ErrorF ("winGetWindowID - Window ID: %d\n", wi.id);
+#endif
+
+  return wi.id;
+}
+
+
+/*
+ * SendConfigureNotify - 
+ */
+
+static void
+SendConfigureNotify(WindowPtr pWin)
+{
+  xEvent		event;
+  winWindowPriv(pWin);
+
+  event.u.u.type = ConfigureNotify;
+  event.u.configureNotify.window = pWin->drawable.id;
+
+  if (pWin->nextSib)
+    event.u.configureNotify.aboveSibling = pWin->nextSib->drawable.id;
+  else
+    event.u.configureNotify.aboveSibling = None;
+
+  event.u.configureNotify.x = pWinPriv->iX - wBorderWidth (pWin);
+  event.u.configureNotify.y = pWinPriv->iY - wBorderWidth (pWin);
+
+  event.u.configureNotify.width = pWinPriv->iWidth;
+  event.u.configureNotify.height = pWinPriv->iHeight;
+
+  event.u.configureNotify.borderWidth = wBorderWidth (pWin);
+
+  event.u.configureNotify.override = pWin->overrideRedirect;
+
+  /* */
+  DeliverEvents (pWin, &event, 1, NullWindow);
+}
diff --git a/xc/programs/Xserver/hw/xwin/winmultiwindowwm.c b/xc/programs/Xserver/hw/xwin/winmultiwindowwm.c
new file mode 100644
index 000000000..ab4dd27f6
--- /dev/null
+++ b/xc/programs/Xserver/hw/xwin/winmultiwindowwm.c
@@ -0,0 +1,907 @@
+/*
+ *Copyright (C) 1994-2000 The XFree86 Project, Inc. All Rights Reserved.
+ *
+ *Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ *"Software"), to deal in the Software without restriction, including
+ *without limitation the rights to use, copy, modify, merge, publish,
+ *distribute, sublicense, and/or sell copies of the Software, and to
+ *permit persons to whom the Software is furnished to do so, subject to
+ *the following conditions:
+ *
+ *The above copyright notice and this permission notice shall be
+ *included in all copies or substantial portions of the Software.
+ *
+ *THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ *MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *NONINFRINGEMENT. IN NO EVENT SHALL THE XFREE86 PROJECT BE LIABLE FOR
+ *ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF
+ *CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ *WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ *Except as contained in this notice, the name of the XFree86 Project
+ *shall not be used in advertising or otherwise to promote the sale, use
+ *or other dealings in this Software without prior written authorization
+ *from the XFree86 Project.
+ *
+ * Authors:	Kensuke Matsuzaki
+ */
+/* $XFree86: xc/programs/Xserver/hw/xwin/winmultiwindowwm.c,v 1.1 2003/02/12 15:01:38 alanh Exp $ */
+
+/* X headers */
+#include <stdio.h>
+#include <stdlib.h>
+#include <unistd.h>
+#include <sys/select.h>
+#include <fcntl.h>
+#include <setjmp.h>
+#include <pthread.h>
+#include <X11/X.h>
+#include <X11/Xatom.h>
+#include <X11/Xlib.h>
+#include <X11/Xlocale.h>
+#include <X11/Xproto.h>
+#include <X11/Xutil.h>
+
+/* Fixups to prevent collisions between Windows and X headers */
+#define ATOM DWORD
+
+/* Windows headers */
+#include <windows.h>
+
+/* Local headers */
+#include "winwindow.h"
+
+
+/*
+ * Constant defines
+ */
+
+#define WIN_CONNECT_RETRIES	5
+#define WIN_CONNECT_DELAY	5
+#define WIN_MSG_QUEUE_FNAME	"/dev/windows"
+#define	WM_WM_X_EVENT           1
+#define WIN_JMP_OKAY		0
+#define WIN_JMP_ERROR_IO	2
+
+
+/*
+ * Local structures
+ */
+
+typedef struct _WMMsgNodeRec {
+  winWMMessageRec	msg;
+  struct _WMMsgNodeRec	*pNext;
+} WMMsgNodeRec, *WMMsgNodePtr;
+
+typedef struct _WMMsgQueueRec {
+  struct _WMMsgNodeRec	*pHead;
+  struct _WMMsgNodeRec	*pTail;
+  pthread_mutex_t	pmMutex;
+  pthread_cond_t	pcNotEmpty;
+} WMMsgQueueRec, *WMMsgQueuePtr;
+
+typedef struct _WMInfo {
+  Display		*pDisplay;
+  WMMsgQueueRec		wmMsgQueue;
+  Atom			atmWmProtos;
+  Atom			atmWmDelete;
+} WMInfoRec, *WMInfoPtr;
+
+typedef struct _WMProcArgRec {
+  DWORD			dwScreen;
+  WMInfoPtr		pWMInfo;
+  pthread_mutex_t	*ppmServerStarted;
+} WMProcArgRec, *WMProcArgPtr;
+
+
+/*
+ * References to external symbols
+ */
+
+extern char *display;
+extern void ErrorF (const char* /*f*/, ...);
+extern Bool g_fCalledSetLocale;
+
+
+/*
+ * Prototypes for local functions
+ */
+
+static void
+PushMessage (WMMsgQueuePtr pQueue, WMMsgNodePtr pNode);
+
+static WMMsgNodePtr
+PopMessage (WMMsgQueuePtr pQueue);
+
+static Bool
+InitQueue (WMMsgQueuePtr pQueue);
+
+static void
+GetWindowName (Display * pDpy, Window iWin, char **ppName);
+
+static int
+SendXMessage (Display *pDisplay, Window iWin, Atom atmType, long nData);
+
+static void*
+winMultiWindowWMProc (void* pArg);
+
+static Bool
+FlushXEvents (WMInfoPtr pWMInfo);
+
+static int
+winMultiWindowWMErrorHandler (Display *pDisp, XErrorEvent *e);
+
+static void
+winInitMultiWindowWM (WMInfoPtr pWMInfo, WMProcArgPtr pProcArg);
+
+static int
+winMutliWindowWMIOErrorHandler (Display *pDisplay);
+
+
+/*
+ * Local globals
+ */
+
+static int			g_nQueueSize;
+static jmp_buf			g_jmpEntry;
+
+
+
+/*
+ * PushMessage - Push a message onto the queue
+ */
+
+static void
+PushMessage (WMMsgQueuePtr pQueue, WMMsgNodePtr pNode)
+{
+
+  /* Lock the queue mutex */
+  pthread_mutex_lock (&pQueue->pmMutex);
+
+  pNode->pNext = NULL;
+  
+  if (pQueue->pTail != NULL)
+    {
+      pQueue->pTail->pNext = pNode;
+    }
+  pQueue->pTail = pNode;
+  
+  if (pQueue->pHead == NULL)
+    {
+      pQueue->pHead = pNode;
+    }
+
+
+#if 0
+  switch (pNode->msg.msg)
+    {
+    case WM_WM_MOVE:
+      ErrorF ("\tWM_WM_MOVE\n");
+      break;
+    case WM_WM_RAISE:
+      ErrorF ("\tWM_WM_RAISE\n");
+      break;
+    case WM_WM_LOWER:
+      ErrorF ("\tWM_WM_RAISE\n");
+      break;
+    case WM_WM_MAP:
+      ErrorF ("\tWM_WM_MAP\n");
+      break;
+    case WM_WM_UNMAP:
+      ErrorF ("\tWM_WM_UNMAP\n");
+      break;
+    case WM_WM_KILL:
+      ErrorF ("\tWM_WM_KILL\n");
+      break;
+    default:
+      ErrorF ("Unknown Message.\n");
+      break;
+    }
+#endif
+
+  /* Increase the count of elements in the queue by one */
+  ++g_nQueueSize;
+
+  /* Release the queue mutex */
+  pthread_mutex_unlock (&pQueue->pmMutex);
+
+  /* Signal that the queue is not empty */
+  pthread_cond_signal (&pQueue->pcNotEmpty);
+}
+
+
+#if 0
+/*
+ * QueueSize - Return the size of the queue
+ */
+
+static int
+QueueSize (WMMsgQueuePtr pQueue)
+{
+  WMMsgNodePtr		pNode;
+  int			nSize = 0;
+  
+  /* Loop through all elements in the queue */
+  for (pNode = pQueue->pHead; pNode != NULL; pNode = pNode->pNext)
+    ++nSize;
+
+  return nSize;
+}
+#endif
+
+
+/*
+ * PopMessage - 
+ */
+
+static WMMsgNodePtr
+PopMessage (WMMsgQueuePtr pQueue)
+{
+  WMMsgNodePtr		pNode;
+
+  /* Lock the queue mutex */
+  pthread_mutex_lock (&pQueue->pmMutex);
+
+  /* Wait for --- */
+  while (pQueue->pHead == NULL)
+    {
+      pthread_cond_wait (&pQueue->pcNotEmpty, &pQueue->pmMutex);
+    }
+  
+  pNode = pQueue->pHead;
+  if (pQueue->pHead != NULL)
+    {
+      pQueue->pHead = pQueue->pHead->pNext;
+    }
+
+  if (pQueue->pTail == pNode)
+    {
+      pQueue->pTail = NULL;
+    }
+
+  /* Drop the number of elements in the queue by one */
+  --g_nQueueSize;
+
+#if CYGMULTIWINDOW_DEBUG
+  ErrorF ("Queue Size %d %d\n", g_nQueueSize, QueueSize(pQueue));
+#endif
+  
+  /* Release the queue mutex */
+  pthread_mutex_unlock (&pQueue->pmMutex);
+
+  return pNode;
+}
+
+
+#if 0
+/*
+ * HaveMessage - 
+ */
+
+static Bool
+HaveMessage (WMMsgQueuePtr pQueue, UINT msg, Window iWindow)
+{
+  WMMsgNodePtr pNode;
+  
+  for (pNode = pQueue->pHead; pNode != NULL; pNode = pNode->pNext)
+    {
+      if (pNode->msg.msg==msg && pNode->msg.iWindow==iWindow)
+	return True;
+    }
+  
+  return False;
+}
+#endif
+
+
+/*
+ * InitQueue - Initialize the Window Manager message queue
+ */
+
+static
+Bool
+InitQueue (WMMsgQueuePtr pQueue)
+{
+  /* Check if the pQueue pointer is NULL */
+  if (pQueue == NULL)
+    {
+      ErrorF ("InitQueue - pQueue is NULL.  Exiting.\n");
+      return FALSE;
+    }
+
+  /* Set the head and tail to NULL */
+  pQueue->pHead = NULL;
+  pQueue->pTail = NULL;
+
+  /* There are no elements initially */
+  g_nQueueSize = 0;
+
+#if CYGMULTIWINDOW_DEBUG
+  ErrorF ("InitQueue - Queue Size %d %d\n", g_nQueueSize, QueueSize(pQueue));
+#endif
+
+  ErrorF ("InitQueue - Calling pthread_mutex_init\n");
+
+  /* Create synchronization objects */
+  pthread_mutex_init (&pQueue->pmMutex, NULL);
+
+  ErrorF ("InitQueue - pthread_mutex_init returned\n");
+  ErrorF ("InitQueue - Calling pthread_cond_init\n");
+
+  pthread_cond_init (&pQueue->pcNotEmpty, NULL);
+
+  ErrorF ("InitQueue - pthread_cond_init returned\n");
+
+  return TRUE;
+}
+
+
+/*
+ * GetWindowName - 
+ */
+
+static void
+GetWindowName (Display *pDisplay, Window iWin, char **ppName)
+{
+  int			nResult, nNum;
+  char			**ppList;
+  XTextProperty		xtpName;
+  
+#if CYGMULTIWINDOW_DEBUG
+  ErrorF ("GetWindowName\n");
+#endif
+
+  /* Intialize ppName to NULL */
+  *ppName = NULL;
+
+  /* Try to get --- */
+  nResult = XGetWMName (pDisplay, iWin, &xtpName);
+  if (!nResult || !xtpName.value || !xtpName.nitems)
+    {
+      ErrorF ("GetWindowName - XGetWMName failed.  No name.\n");
+      return;
+    }
+  
+  /* */
+  if (xtpName.encoding == XA_STRING)
+    {
+      /* */
+      if (xtpName.value)
+	{
+	  *ppName = strdup ((char*)xtpName.value);
+	  XFree (xtpName.value);
+	}
+
+#if CYGMULTIWINDOW_DEBUG
+      ErrorF ("XA_STRING %s\n", *ppName);
+#endif
+    }
+  else
+    {
+      XmbTextPropertyToTextList (pDisplay, &xtpName, &ppList, &nNum);
+
+      /* */
+      if (nNum && *ppList)
+	{
+	  XFree (xtpName.value);
+	  *ppName = strdup (*ppList);
+	  XFreeStringList (ppList);
+	}
+
+#if CYGMULTIWINDOW_DEBUG
+      ErrorF ("%s %s\n", XGetAtomName (pDisplay, xtpName.encoding), *ppName);
+#endif
+    }
+
+
+#if CYGMULTIWINDOW_DEBUG
+  ErrorF ("-GetWindowName\n");
+#endif
+}
+
+
+/*
+ * Send a message to the X server from the WM thread
+ */
+
+static int
+SendXMessage (Display *pDisplay, Window iWin, Atom atmType, long nData)
+{
+  XEvent		e;
+
+  /* Prepare the X event structure */
+  e.type = ClientMessage;
+  e.xclient.window = iWin;
+  e.xclient.message_type = atmType;
+  e.xclient.format = 32;
+  e.xclient.data.l[0] = nData;
+  e.xclient.data.l[1] = CurrentTime;
+
+  /* Send the event to X */
+  return XSendEvent (pDisplay, iWin, False, NoEventMask, &e);
+}
+
+
+/*
+ * winMultiWindowWMProc
+ */
+
+static void *
+winMultiWindowWMProc (void *pArg)
+{
+  WMProcArgPtr		pProcArg = (WMProcArgPtr)pArg;
+  WMInfoPtr		pWMInfo = pProcArg->pWMInfo;
+  
+  /* Initialize the Window Manager */
+  winInitMultiWindowWM (pWMInfo, pProcArg);
+  
+#if CYGMULTIWINDOW_DEBUG
+  ErrorF ("winMultiWindowWMProc ()\n");
+#endif
+
+  /* Loop until we explicity break out */
+  for (;;)
+    {
+      WMMsgNodePtr	pNode;
+
+      /* Pop a message off of our queue */
+      pNode = PopMessage (&pWMInfo->wmMsgQueue);
+      if (pNode == NULL)
+	{
+	  /* Bail if PopMessage returns without a message */
+	  /* NOTE: Remember that PopMessage is a blocking function. */
+	  ErrorF ("winMultiWindowWMProc - Queue is Empty?\n");
+	  pthread_exit (NULL);
+	}
+
+#if CYGMULTIWINDOW_DEBUG
+      ErrorF ("winMultiWindowWMProc - %d ms MSG: %d ID: %d\n",
+	      GetTickCount (), (int)pNode->msg.msg, (int)pNode->msg.dwID);
+#endif
+      
+      /* Branch on the message type */
+      switch (pNode->msg.msg)
+	{
+#if 0
+	case WM_WM_MOVE:
+	  ErrorF ("\tWM_WM_MOVE\n");
+	  break;
+
+	case WM_WM_SIZE:
+	  ErrorF ("\tWM_WM_SIZE\n");
+	  break;
+#endif
+
+	case WM_WM_RAISE:
+#if CYGMULTIWINDOW_DEBUG
+	  ErrorF ("\tWM_WM_RAISE\n");
+#endif
+
+	  /* Raise the window */
+	  XRaiseWindow (pWMInfo->pDisplay, pNode->msg.iWindow);
+	  break;
+
+	case WM_WM_LOWER:
+#if CYGMULTIWINDOW_DEBUG
+	  ErrorF ("\tWM_WM_LOWER\n");
+#endif
+
+	  /* Lower the window */
+	  XLowerWindow (pWMInfo->pDisplay, pNode->msg.iWindow);
+	  break;
+
+	case WM_WM_MAP:
+#if CYGMULTIWINDOW_DEBUG
+	  ErrorF ("\tWM_WM_MAP\n");
+#endif
+	  {
+	    XWindowAttributes		attr;
+	    char			*pszName;
+#if 0
+	    XWMHints			*pHints;
+#endif
+
+	    /* Get the window attributes */
+	    XGetWindowAttributes (pWMInfo->pDisplay,
+				  pNode->msg.iWindow,
+				  &attr);
+	    if (!attr.override_redirect)
+	      {
+		/* Set the Windows window name */
+		GetWindowName(pWMInfo->pDisplay, pNode->msg.iWindow, &pszName);
+		SetWindowText (pNode->msg.hwndWindow, pszName);
+		free (pszName);
+	      }
+	  }
+	  break;
+
+	case WM_WM_UNMAP:
+#if CYGMULTIWINDOW_DEBUG
+	  ErrorF ("\tWM_WM_UNMAP\n");
+#endif
+	  
+	  /* Unmap the window */
+	  XUnmapWindow(pWMInfo->pDisplay, pNode->msg.iWindow);
+	  break;
+
+	case WM_WM_KILL:
+#if CYGMULTIWINDOW_DEBUG
+	  ErrorF ("\tWM_WM_KILL\n");
+#endif
+	  {
+	    int				i, n, found = 0;
+	    Atom			*protocols;
+	    
+	    /* --- */
+	    if (XGetWMProtocols (pWMInfo->pDisplay,
+				 pNode->msg.iWindow,
+				 &protocols,
+				 &n))
+	      {
+		for (i = 0; i < n; ++i)
+		  if (protocols[i] == pWMInfo->atmWmDelete)
+		    ++found;
+		
+		XFree (protocols);
+	      }
+
+	    /* --- */
+	    if (found)
+	      SendXMessage (pWMInfo->pDisplay,
+			    pNode->msg.iWindow,
+			    pWMInfo->atmWmProtos,
+			    pWMInfo->atmWmDelete);
+	    else
+	      XKillClient (pWMInfo->pDisplay,
+			   pNode->msg.iWindow);
+	  }
+	  break;
+
+	case WM_WM_ACTIVATE:
+#if CYGMULTIWINDOW_DEBUG
+	  ErrorF ("\tWM_WM_ACTIVATE\n");
+#endif
+	  
+	  /* Set the input focus */
+	  XSetInputFocus (pWMInfo->pDisplay,
+			  pNode->msg.iWindow,
+			  RevertToPointerRoot,
+			  CurrentTime);
+	  break;
+
+	case WM_WM_X_EVENT:
+	  /* Process all X events in the Window Manager event queue */
+	  FlushXEvents (pWMInfo);
+	  break;
+
+	default:
+	  ErrorF ("winMultiWindowWMProc - Unknown Message.\n");
+	  pthread_exit (NULL);
+	  break;
+	}
+
+      /* Free the retrieved message */
+      free (pNode);
+
+      /* Flush any pending events on our display */
+      XFlush (pWMInfo->pDisplay);
+    }
+
+  /* Free the condition variable */
+  pthread_cond_destroy (&pWMInfo->wmMsgQueue.pcNotEmpty);
+  
+  /* Free the mutex variable */
+  pthread_mutex_destroy (&pWMInfo->wmMsgQueue.pmMutex);
+  
+  /* Free the passed-in argument */
+  free (pProcArg);
+  
+#if CYGMULTIWINDOW_DEBUG
+  ErrorF("-winMultiWindowWMProc ()\n");
+#endif
+}
+
+
+/*
+ * FlushXEvents - Process any pending X events
+ */
+
+static Bool
+FlushXEvents (WMInfoPtr pWMInfo)
+{
+  XEvent		event;
+  
+#if CYGMULTIWINDOW_DEBUG
+  ErrorF ("FlushXEvents ()\n");
+#endif
+
+  /* Process all pending events */
+  while (XPending (pWMInfo->pDisplay))
+    {
+      /* Get the next event - will not block because one is ready */
+      XNextEvent (pWMInfo->pDisplay, &event);
+
+#if 0
+      /* Branch on the event type */
+      switch (event.type)
+	{
+	}
+#endif
+    }
+
+#if CYGMULTIWINDOW_DEBUG
+  ErrorF ("-FlushXEvents ()\n");
+#endif
+
+  return True;
+}
+
+
+/*
+ * winMultiWindowWMErrorHandler - Our application specific error handler
+ */
+
+static int
+winMultiWindowWMErrorHandler (Display *pDisplay, XErrorEvent *pErr)
+{
+  char pszErrorMsg[100];
+
+  if (pErr->request_code == X_ChangeWindowAttributes
+      && pErr->error_code == BadAccess)
+    {
+      ErrorF ("ChangeWindowAttributes BadAccess.\n");
+      pthread_exit (NULL);
+    }
+  
+  XGetErrorText (pDisplay,
+		 pErr->error_code,
+		 pszErrorMsg,
+		 sizeof (pszErrorMsg));
+  ErrorF ("ERROR: %s\n", pszErrorMsg);
+
+  if (pErr->error_code==BadWindow
+      || pErr->error_code==BadMatch
+      || pErr->error_code==BadDrawable)
+    {
+      pthread_exit (NULL);
+    }
+
+  pthread_exit (NULL);
+  return 0;
+}
+
+
+/*
+ * winInitWM - Entry point for the X server to spawn
+ * the Window Manager thread.  Called from
+ * winscrinit.c/winFinishScreenInitFB ().
+ */
+
+Bool
+winInitWM (void **ppWMInfo,
+	   pthread_t *ptWMProc,
+	   pthread_mutex_t *ppmServerStarted,
+	   int dwScreen)
+{
+  WMProcArgPtr		pArg = (WMProcArgPtr)malloc (sizeof(WMProcArgRec));
+  WMInfoPtr		pWMInfo = (WMInfoPtr)malloc (sizeof(WMInfoRec));
+  
+  /* Bail if the input parameters are bad */
+  if (pArg == NULL || pWMInfo == NULL)
+    {
+      ErrorF ("winInitWM - malloc fail.\n");
+      return FALSE;
+    }
+  
+  /* Set a return pointer to the Window Manager info structure */
+  *ppWMInfo = pWMInfo;
+
+  /* Setup the argument structure for the thread function */
+  pArg->dwScreen = dwScreen;
+  pArg->pWMInfo = pWMInfo;
+  pArg->ppmServerStarted = ppmServerStarted;
+  
+  /* Intialize the message queue */
+  if (!InitQueue (&pWMInfo->wmMsgQueue))
+    {
+      ErrorF ("winInitWM - InitQueue () failed.\n");
+      return FALSE;
+    }
+  
+  /* Spawn a thread for the Window Manager */
+  if (pthread_create (ptWMProc, NULL, winMultiWindowWMProc, pArg))
+    {
+      /* Bail if thread creation failed */
+      ErrorF ("winInitWM - pthread_create failed.\n");
+      return FALSE;
+    }
+
+#if CYGDEBUG || YES
+  ErrorF ("winInitWM - Returning.\n");
+#endif
+
+  return TRUE;
+}
+
+
+/*
+ * winInitMultiWindowWM - 
+ */
+
+Bool
+winClipboardDetectUnicodeSupport ();
+
+static void
+winInitMultiWindowWM (WMInfoPtr pWMInfo, WMProcArgPtr pProcArg)
+{
+  int                   iRetries = 0;
+  char			pszDisplay[512];
+  int			iReturn;
+  Bool			fUnicodeSupport;
+
+  ErrorF ("winInitMultiWindowWM - Hello\n");
+
+  /* Check that argument pointer is not invalid */
+  if (pProcArg == NULL)
+    {
+      ErrorF ("winInitMultiWindowWM - pProcArg is NULL, bailing.\n");
+      pthread_exit (NULL);
+    }
+
+  ErrorF ("winInitMultiWindowWM - Calling pthread_mutex_lock ()\n");
+
+  /* Grab our garbage mutex to satisfy pthread_cond_wait */
+  iReturn = pthread_mutex_lock (pProcArg->ppmServerStarted);
+  if (iReturn != 0)
+    {
+      ErrorF ("winInitMultiWindowWM - pthread_mutex_lock () failed: %d\n",
+	      iReturn);
+      pthread_exit (NULL);
+    }
+
+  ErrorF ("winInitMultiWindowWM - pthread_mutex_lock () returned.\n");
+
+  /* Do we have Unicode support? */
+  fUnicodeSupport = winClipboardDetectUnicodeSupport ();
+
+  /* Set the current locale?  What does this do? */
+  if (fUnicodeSupport && !g_fCalledSetLocale)
+    {
+      ErrorF ("winInitMultiWindowWM - Calling setlocale ()\n");
+      if (!setlocale (LC_ALL, ""))
+	{
+	  ErrorF ("winInitMultiWindowWM - setlocale () error\n");
+	  pthread_exit (NULL);
+	}
+      ErrorF ("winInitMultiWindowWM - setlocale () returned\n");
+      
+      /* See if X supports the current locale */
+      if (XSupportsLocale () == False)
+	{
+	  ErrorF ("winInitMultiWindowWM - Locale not supported by X\n");
+	  pthread_exit (NULL);
+	}
+    }
+
+  /* Flag that we have called setlocale */
+  g_fCalledSetLocale = TRUE;
+  
+  /* Release the garbage mutex */
+  pthread_mutex_unlock (pProcArg->ppmServerStarted);
+
+  ErrorF ("winInitMultiWindowWM - pthread_mutex_unlock () returned.\n");
+
+  /* Allow multiple threads to access Xlib */
+  if (XInitThreads () == 0)
+    {
+      ErrorF ("winInitMultiWindowWM - XInitThreads () failed.\n");
+      pthread_exit (NULL);
+    }
+  
+  ErrorF ("winInitMultiWindowWM - XInitThreads () returned.\n");
+
+  /* Set jump point for Error exits */
+  iReturn = setjmp (g_jmpEntry);
+  
+  /* Check if we should continue operations */
+  if (iReturn != WIN_JMP_ERROR_IO
+      && iReturn != WIN_JMP_OKAY)
+    {
+      /* setjmp returned an unknown value, exit */
+      ErrorF ("winInitMultiWindowWM - setjmp returned: %d exiting\n",
+	      iReturn);
+      pthread_exit (NULL);
+    }
+  else if (iReturn == WIN_JMP_ERROR_IO)
+    {
+      ErrorF ("winInitMultiWindowWM - setjmp returned WIN_JMP_ERROR_IO\n");
+    }
+
+  /* Setup the display connection string x */
+  snprintf (pszDisplay, 512, "127.0.0.1:%s.%d", display, pProcArg->dwScreen);
+
+  /* Print the display connection string */
+  ErrorF ("winInitMultiWindowWM - DISPLAY=%s\n", pszDisplay);
+  
+  /* Open the X display */
+  do
+    {
+      /* Try to open the display */
+      pWMInfo->pDisplay = XOpenDisplay (pszDisplay);
+      if (pWMInfo->pDisplay == NULL)
+	{
+	  ErrorF ("winInitMultiWindowWM - Could not open display, try: %d, "
+		  "sleeping: %d\n\f",
+		  iRetries + 1, WIN_CONNECT_DELAY);
+	  ++iRetries;
+	  sleep (WIN_CONNECT_DELAY);
+	  continue;
+	}
+      else
+	break;
+    }
+  while (pWMInfo->pDisplay == NULL && iRetries < WIN_CONNECT_RETRIES);
+  
+  /* Make sure that the display opened */
+  if (pWMInfo->pDisplay == NULL)
+    {
+      ErrorF ("winInitMultiWindowWM - Failed opening the display, "
+	      "giving up.\n\f");
+      pthread_exit (NULL);
+    }
+
+  ErrorF ("winInitMultiWindowWM - XOpenDisplay () returned and "
+	  "successfully opened the display.\n");
+  
+  /* Install our error handler */
+  XSetErrorHandler (winMultiWindowWMErrorHandler);
+  XSetIOErrorHandler (winMutliWindowWMIOErrorHandler);
+
+  /* Create some atoms */
+  pWMInfo->atmWmProtos = XInternAtom (pWMInfo->pDisplay,
+				      "WM_PROTOCOLS",
+				      False);
+  pWMInfo->atmWmDelete = XInternAtom (pWMInfo->pDisplay,
+				      "WM_DELETE_WINDOW",
+				      False);
+}
+
+
+/*
+ * winSendMessageToWM - Send a message from the X thread to the WM thread
+ */
+
+void
+winSendMessageToWM (void *pWMInfo, winWMMessagePtr pMsg)
+{
+  WMMsgNodePtr pNode;
+  
+#if CYGMULTIWINDOW_DEBUG
+  ErrorF ("winSendMessageToWM ()\n");
+#endif
+  
+  pNode = (WMMsgNodePtr)malloc(sizeof(WMMsgNodeRec));
+  if (pNode != NULL)
+    {
+      memcpy (&pNode->msg, pMsg, sizeof(winWMMessageRec));
+      PushMessage (&((WMInfoPtr)pWMInfo)->wmMsgQueue, pNode);
+    }
+}
+
+
+/*
+ * winMutliWindowWMIOErrorHandler - Our application specific IO error handler
+ */
+
+static int
+winMutliWindowWMIOErrorHandler (Display *pDisplay)
+{
+  printf ("\nwinMutliWindowWMIOErrorHandler!\n\n");
+
+  /* Restart at the main entry point */
+  longjmp (g_jmpEntry, WIN_JMP_ERROR_IO);
+  
+  return 0;
+}
diff --git a/xc/programs/Xserver/hw/xwin/winscrinit.c b/xc/programs/Xserver/hw/xwin/winscrinit.c
index 4b6aa689e..41811d253 100644
--- a/xc/programs/Xserver/hw/xwin/winscrinit.c
+++ b/xc/programs/Xserver/hw/xwin/winscrinit.c
@@ -29,9 +29,9 @@
  *		Suhaib M Siddiqi
  *		Peter Busch
  *		Harold L Hunt II
- *		MATSUZAKI Kensuke
+ *		Kensuke Matsuzaki
  */
-/* $XFree86: xc/programs/Xserver/hw/xwin/winscrinit.c,v 1.24 2002/10/17 08:18:24 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xwin/winscrinit.c,v 1.26 2003/02/12 15:01:38 alanh Exp $ */
 
 #include "win.h"
 
@@ -50,13 +50,6 @@ winScreenInit (int index,
   winScreenInfoPtr      pScreenInfo = &g_ScreenInfo[index];
   winPrivScreenPtr	pScreenPriv;
   HDC			hdc;
-#if 0
-  DEBUG_FN_NAME("winScreenInit");
-  DEBUGVARS;
-  /*DEBUGPROC_MSG;*/
-
-  DEBUG_MSG ("Hello");
-#endif
 
 #if CYGDEBUG
   ErrorF ("winScreenInit - dwWidth: %d dwHeight: %d\n",
@@ -113,6 +106,19 @@ winScreenInit (int index,
 #endif
     }
 
+  /*
+   * Check that all monitors have the same display depth if we are using
+   * multiple monitors
+   */
+  if (pScreenInfo->fMultipleMonitors 
+      && !GetSystemMetrics (SM_SAMEDISPLAYFORMAT))
+    {
+      ErrorF ("winScreenInit - Monitors do not all have same pixel format / "
+	      "display depth.\n"
+	      "Using primary display only.\n");
+      pScreenInfo->fMultipleMonitors = FALSE;
+    }
+
   /* Create display window */
   if (!(*pScreenPriv->pwinCreateBoundingWindow) (pScreen))
     {
@@ -121,12 +127,40 @@ winScreenInit (int index,
       return FALSE;
     }
 
-  /* Store the initial height, width, and depth of the display */
+  /* Get a device context */
   hdc = GetDC (pScreenPriv->hwndScreen);
-  pScreenPriv->dwLastWindowsWidth = GetSystemMetrics (SM_CXSCREEN);
-  pScreenPriv->dwLastWindowsHeight = GetSystemMetrics (SM_CYSCREEN);
-  pScreenPriv->dwLastWindowsBitsPixel
-    = GetDeviceCaps (hdc, BITSPIXEL);
+
+  /* Store the initial height, width, and depth of the display */
+  /* Are we using multiple monitors? */
+  if (pScreenInfo->fMultipleMonitors)
+    {
+      pScreenPriv->dwLastWindowsWidth = GetSystemMetrics (SM_CXVIRTUALSCREEN);
+      pScreenPriv->dwLastWindowsHeight = GetSystemMetrics (SM_CYVIRTUALSCREEN);
+
+      /* 
+       * In this case, some of the defaults set in
+       * winInitializeDefaultScreens () are not correct ...
+       */
+      if (!pScreenInfo->fUserGaveHeightAndWidth)
+	{
+	  pScreenInfo->dwWidth = GetSystemMetrics (SM_CXVIRTUALSCREEN);
+	  pScreenInfo->dwHeight = GetSystemMetrics (SM_CYVIRTUALSCREEN);
+	  pScreenInfo->dwWidth_mm = (pScreenInfo->dwWidth /
+				     WIN_DEFAULT_DPI) * 25.4;
+	  pScreenInfo->dwHeight_mm = (pScreenInfo->dwHeight /
+				      WIN_DEFAULT_DPI) * 25.4;
+	}
+    }
+  else
+    {
+      pScreenPriv->dwLastWindowsWidth = GetSystemMetrics (SM_CXSCREEN);
+      pScreenPriv->dwLastWindowsHeight = GetSystemMetrics (SM_CYSCREEN);
+    }
+
+  /* Save the original bits per pixel */
+  pScreenPriv->dwLastWindowsBitsPixel = GetDeviceCaps (hdc, BITSPIXEL);
+
+  /* Release the device context */
   ReleaseDC (pScreenPriv->hwndScreen, hdc);
     
   /* Clear the visuals list */
@@ -161,6 +195,7 @@ winFinishScreenInitFB (int index,
   winScreenInfo		*pScreenInfo = pScreenPriv->pScreenInfo;
   VisualPtr		pVisual = NULL;
   char			*pbits = NULL;
+  int			iReturn;
 
 #if WIN_LAYER_SUPPORT
   pScreenPriv->dwLayerKind = LAYER_SHADOW;
@@ -390,6 +425,9 @@ winFinishScreenInitFB (int index,
       WRAP(UnrealizeWindow);
       WRAP(PositionWindow);
       WRAP(ChangeWindowAttributes);
+#ifdef SHAPE
+      WRAP(SetShape);
+#endif
 
       /* Assign pseudo-rootless window procedures to be top level procedures */
       pScreen->CreateWindow = winCreateWindowPRootless;
@@ -398,6 +436,50 @@ winFinishScreenInitFB (int index,
       pScreen->ChangeWindowAttributes = winChangeWindowAttributesPRootless;
       pScreen->RealizeWindow = winMapWindowPRootless;
       pScreen->UnrealizeWindow = winUnmapWindowPRootless;
+#ifdef SHAPE
+      pScreen->SetShape = winSetShapePRootless;
+#endif
+
+      /* Undefine the WRAP macro, as it is not needed elsewhere */
+#undef WRAP
+    }
+  /* Handle multi window mode */
+  else if (pScreenInfo->fMultiWindow)
+    {
+      /* Define the WRAP macro temporarily for local use */
+#define WRAP(a) \
+    if (pScreen->a) { \
+        pScreenPriv->a = pScreen->a; \
+    } else { \
+        ErrorF("null screen fn " #a "\n"); \
+        pScreenPriv->a = NULL; \
+    }
+
+      /* Save a pointer to each lower-level window procedure */
+      WRAP(CreateWindow);
+      WRAP(DestroyWindow);
+      WRAP(RealizeWindow);
+      WRAP(UnrealizeWindow);
+      WRAP(PositionWindow);
+      WRAP(ChangeWindowAttributes);
+      WRAP(ReparentWindow);
+      WRAP(RestackWindow);
+#ifdef SHAPE
+      WRAP(SetShape);
+#endif
+
+      /* Assign multi-window window procedures to be top level procedures */
+      pScreen->CreateWindow = winCreateWindowMultiWindow;
+      pScreen->DestroyWindow = winDestroyWindowMultiWindow;
+      pScreen->PositionWindow = winPositionWindowMultiWindow;
+      pScreen->ChangeWindowAttributes = winChangeWindowAttributesMultiWindow;
+      pScreen->RealizeWindow = winMapWindowMultiWindow;
+      pScreen->UnrealizeWindow = winUnmapWindowMultiWindow;
+      pScreen->ReparentWindow = winReparentWindowMultiWindow;
+      pScreen->RestackWindow = winRestackWindowMultiWindow;
+#ifdef SHAPE
+      pScreen->SetShape = winSetShapeMultiWindow;
+#endif
 
       /* Undefine the WRAP macro, as it is not needed elsewhere */
 #undef WRAP
@@ -407,13 +489,65 @@ winFinishScreenInitFB (int index,
   pScreenPriv->CloseScreen = pScreen->CloseScreen;
   pScreen->CloseScreen = pScreenPriv->pwinCloseScreen;
 
+  /* Create a mutex for modules in seperate threads to wait for */
+  iReturn = pthread_mutex_init (&pScreenPriv->pmServerStarted, NULL);
+  if (iReturn != 0)
+    {
+      ErrorF ("winFinishScreenInitFB - pthread_mutex_init () failed: %d\n",
+	      iReturn);
+      return FALSE;
+    }
+
+  /* Own the mutex for modules in seperate threads */
+  iReturn = pthread_mutex_lock (&pScreenPriv->pmServerStarted);
+  if (iReturn != 0)
+    {
+      ErrorF ("winFinishScreenInitFB - pthread_mutex_lock () failed: %d\n",
+	      iReturn);
+      return FALSE;
+    }
+
+  /* Set the ServerStarted flag to false */
+  pScreenPriv->fServerStarted = FALSE;
+
+#if CYGDEBUG || YES
+  if (pScreenInfo->fMultiWindow)
+    ErrorF ("winFinishScreenInitFB - Calling winInitWM.\n");
+#endif
+
+  /* Initialize multi window mode */
+  if (pScreenInfo->fMultiWindow
+      && !winInitWM (&pScreenPriv->pWMInfo,
+		     &pScreenPriv->ptWMProc,
+		     &pScreenPriv->pmServerStarted,
+		     pScreenInfo->dwScreen))
+    {
+      ErrorF ("winFinishScreenInitFB - winInitWM () failed.\n");
+      return FALSE;
+    }
+
+#if CYGDEBUG || YES
+  if (pScreenInfo->fClipboard)
+    ErrorF ("winFinishScreenInitFB - Calling winInitClipboard.\n");
+#endif
+
+  /* Initialize the clipboard manager */
+  if (pScreenInfo->fClipboard
+      && !winInitClipboard (&pScreenPriv->ptClipboardProc,
+			    &pScreenPriv->pmServerStarted,
+			    pScreenInfo->dwScreen))
+    {
+      ErrorF ("winFinishScreenInitFB - winClipboardInit () failed.\n");
+      return FALSE;
+    }
+
   /* Tell the server that we are enabled */
   pScreenPriv->fEnabled = TRUE;
 
   /* Tell the server that we have a valid depth */
   pScreenPriv->fBadDepth = FALSE;
 
-#if CYGDEBUG
+#if CYGDEBUG || YES
   ErrorF ("winFinishScreenInitFB - returning\n");
 #endif
 
diff --git a/xc/programs/Xserver/hw/xwin/winshaddd.c b/xc/programs/Xserver/hw/xwin/winshaddd.c
index 451d822aa..9c14ebf34 100644
--- a/xc/programs/Xserver/hw/xwin/winshaddd.c
+++ b/xc/programs/Xserver/hw/xwin/winshaddd.c
@@ -30,7 +30,7 @@
  *		Peter Busch
  *		Harold L Hunt II
  */
-/* $XFree86: xc/programs/Xserver/hw/xwin/winshaddd.c,v 1.22 2002/10/17 08:18:24 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xwin/winshaddd.c,v 1.23 2003/02/12 15:01:38 alanh Exp $ */
 
 #include "win.h"
 
@@ -124,18 +124,19 @@ winReleasePrimarySurfaceShadowDD (ScreenPtr pScreen)
 
   ErrorF ("winReleasePrimarySurfaceShadowDD - Hello\n");
 
-  /*
-   * Detach the clipper from the primary surface.
-   * NOTE: We do this explicity for clarity.  The Clipper is not released.
-   */
-  IDirectDrawSurface4_SetClipper (pScreenPriv->pddsPrimary,
-				  NULL);
-
-  ErrorF ("winReleasePrimarySurfaceShadowDD - Detached clipper\n");
-
-  /* Release the primary surface, if there is one */
+  /* Release the primary surface and clipper, if they exist */
   if (pScreenPriv->pddsPrimary)
     {
+      /*
+       * Detach the clipper from the primary surface.
+       * NOTE: We do this explicity for clarity.  The Clipper is not released.
+       */
+      IDirectDrawSurface2_SetClipper (pScreenPriv->pddsPrimary,
+				      NULL);
+
+      ErrorF ("winReleasePrimarySurfaceShadowDD - Detached clipper\n");
+
+      /* Release the primary surface */
       IDirectDrawSurface2_Release (pScreenPriv->pddsPrimary);
       pScreenPriv->pddsPrimary = NULL;
     }
@@ -289,10 +290,11 @@ winAllocateFBShadowDD (ScreenPtr pScreen)
 	}
 
       /* Only change the video mode when different than current mode */
-      if (pScreenInfo->dwWidth != GetSystemMetrics (SM_CXSCREEN)
-	  || pScreenInfo->dwHeight != GetSystemMetrics (SM_CYSCREEN)
-	  || pScreenInfo->dwBPP != GetDeviceCaps (hdc, BITSPIXEL)
-	  || pScreenInfo->dwRefreshRate != 0)
+      if (!pScreenInfo->fMultipleMonitors
+	  && (pScreenInfo->dwWidth != GetSystemMetrics (SM_CXSCREEN)
+	      || pScreenInfo->dwHeight != GetSystemMetrics (SM_CYSCREEN)
+	      || pScreenInfo->dwBPP != GetDeviceCaps (hdc, BITSPIXEL)
+	      || pScreenInfo->dwRefreshRate != 0))
 	{
 	  ErrorF ("winAllocateFBShadowDD - Changing video mode\n");
 
@@ -639,7 +641,7 @@ winCloseScreenShadowDD (int nIndex, ScreenPtr pScreen)
   if (pScreenPriv->pddcPrimary)
     {
       /* Detach the clipper */
-      IDirectDrawSurface4_SetClipper (pScreenPriv->pddsPrimary,
+      IDirectDrawSurface2_SetClipper (pScreenPriv->pddsPrimary,
 				      NULL);
 
       /* Release the clipper object */
@@ -676,6 +678,9 @@ winCloseScreenShadowDD (int nIndex, ScreenPtr pScreen)
       pScreenPriv->hwndScreen = NULL;
     }
 
+  /* Destroy the thread startup mutex */
+  pthread_mutex_destroy (&pScreenPriv->pmServerStarted);
+
   /* Kill our screeninfo's pointer to the screen */
   pScreenInfo->pScreen = NULL;
 
@@ -992,7 +997,7 @@ winBltExposedRegionsShadowDD (ScreenPtr pScreen)
 	  /* Try to restore the surface, once */
 	  ddrval = IDirectDrawSurface2_Restore (pScreenPriv->pddsPrimary);
 	  ErrorF ("winBltExposedRegionsShadowDDNL - "
-		  "IDirectDrawSurface4_Restore returned: ");
+		  "IDirectDrawSurface2_Restore returned: ");
 	  if (ddrval == DD_OK)
 	    continue;
 	  else if (ddrval == DDERR_WRONGMODE)
diff --git a/xc/programs/Xserver/hw/xwin/winshadddnl.c b/xc/programs/Xserver/hw/xwin/winshadddnl.c
index e1cbffeb7..69396a79b 100644
--- a/xc/programs/Xserver/hw/xwin/winshadddnl.c
+++ b/xc/programs/Xserver/hw/xwin/winshadddnl.c
@@ -30,7 +30,7 @@
  *		Peter Busch
  *		Harold L Hunt II
  */
-/* $XFree86: xc/programs/Xserver/hw/xwin/winshadddnl.c,v 1.23 2002/10/17 08:18:25 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xwin/winshadddnl.c,v 1.24 2003/02/12 15:01:38 alanh Exp $ */
 
 #include "win.h"
 
@@ -123,18 +123,19 @@ winReleasePrimarySurfaceShadowDDNL (ScreenPtr pScreen)
 
   ErrorF ("winReleasePrimarySurfaceShadowDDNL - Hello\n");
 
-  /*
-   * Detach the clipper from the primary surface.
-   * NOTE: We do this explicity for clarity.  The Clipper is not released.
-   */
-  IDirectDrawSurface4_SetClipper (pScreenPriv->pddsPrimary4,
-				  NULL);
-  
-  ErrorF ("winReleasePrimarySurfaceShadowDDNL - Detached clipper\n");
-
-  /* Release the primary surface, if there is one */
+  /* Release the primary surface and clipper, if they exist */
   if (pScreenPriv->pddsPrimary4)
     {
+      /*
+       * Detach the clipper from the primary surface.
+       * NOTE: We do this explicity for clarity.  The Clipper is not released.
+       */
+      IDirectDrawSurface4_SetClipper (pScreenPriv->pddsPrimary4,
+				      NULL);
+  
+      ErrorF ("winReleasePrimarySurfaceShadowDDNL - Detached clipper\n");
+
+      /* Release the primary surface */
       IDirectDrawSurface4_Release (pScreenPriv->pddsPrimary4);
       pScreenPriv->pddsPrimary4 = NULL;
     }
@@ -307,10 +308,11 @@ winAllocateFBShadowDDNL (ScreenPtr pScreen)
 	}
 
       /* Only change the video mode when different than current mode */
-      if (pScreenInfo->dwWidth != GetSystemMetrics (SM_CXSCREEN)
-	  || pScreenInfo->dwHeight != GetSystemMetrics (SM_CYSCREEN)
-	  || pScreenInfo->dwBPP != GetDeviceCaps (hdc, BITSPIXEL)
-	  || pScreenInfo->dwRefreshRate != 0)
+      if (!pScreenInfo->fMultipleMonitors
+	  && (pScreenInfo->dwWidth != GetSystemMetrics (SM_CXSCREEN)
+	      || pScreenInfo->dwHeight != GetSystemMetrics (SM_CYSCREEN)
+	      || pScreenInfo->dwBPP != GetDeviceCaps (hdc, BITSPIXEL)
+	      || pScreenInfo->dwRefreshRate != 0))
 	{
 	  ErrorF ("winAllocateFBShadowDDNL - Changing video mode\n");
 
@@ -418,7 +420,7 @@ winAllocateFBShadowDDNL (ScreenPtr pScreen)
       return FALSE;
     }
   
-#if CYGDEBUG
+#if CYGDEBUG || YES
   ErrorF ("winAllocateFBShadowDDNL - Created shadow pitch: %d\n",
 	  ddsdShadow.u1.lPitch);
 #endif
@@ -427,6 +429,11 @@ winAllocateFBShadowDDNL (ScreenPtr pScreen)
   pScreenInfo->dwStride = (ddsdShadow.u1.lPitch * 8)
     / pScreenInfo->dwBPP;
 
+#if CYGDEBUG || YES
+  ErrorF ("winAllocateFBShadowDDNL - Created shadow stride: %d\n",
+	  pScreenInfo->dwStride);
+#endif
+
   /* Save the pointer to our surface memory */
   pScreenInfo->pfb = lpSurface;
   
@@ -541,9 +548,6 @@ winShadowUpdateDDNL (ScreenPtr pScreen,
       ErrorF ("winShadowUpdateDDNL - be x1 %d y1 %d x2 %d y2 %d\n",
 	      pBoxExtents->x1, pBoxExtents->y1,
 	      pBoxExtents->x2, pBoxExtents->y2);
-      ErrorF ("winShadowUpdateDDNL - cl l %d t %d r %d b %d\n",
-	      rcClient.left, rcClient.top,
-	      rcClient.right, rcClient.bottom);
 #endif
 
       /* Calculating a bounding box for the source is easy */
@@ -653,9 +657,15 @@ winCloseScreenShadowDDNL (int nIndex, ScreenPtr pScreen)
       pScreenPriv->hwndScreen = NULL;
     }
 
+  /* Destroy the thread startup mutex */
+  pthread_mutex_destroy (&pScreenPriv->pmServerStarted);
+
   /* Kill our screeninfo's pointer to the screen */
   pScreenInfo->pScreen = NULL;
 
+  /* Invalidate the ScreenInfo's fb pointer */
+  pScreenInfo->pfb = NULL;
+
   /* Free the screen privates for this screen */
   free ((pointer) pScreenPriv);
 
diff --git a/xc/programs/Xserver/hw/xwin/winshadgdi.c b/xc/programs/Xserver/hw/xwin/winshadgdi.c
index db90e8884..d2f72f20d 100644
--- a/xc/programs/Xserver/hw/xwin/winshadgdi.c
+++ b/xc/programs/Xserver/hw/xwin/winshadgdi.c
@@ -27,11 +27,19 @@
  *
  * Authors:	Harold L Hunt II
  */
-/* $XFree86: xc/programs/Xserver/hw/xwin/winshadgdi.c,v 1.21 2002/10/17 08:18:25 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xwin/winshadgdi.c,v 1.22 2003/02/12 15:01:38 alanh Exp $ */
 
 #include "win.h"
 
 /*
+ * Local function prototypes
+ */
+
+BOOL CALLBACK
+winRedrawAllProcShadowGDI (HWND hwnd, LPARAM lParam);
+
+
+/*
  * Internal function to get the DIB format that is compatible with the screen
  */
 
@@ -198,6 +206,27 @@ winQueryRGBBitsAndMasks (ScreenPtr pScreen)
 
 
 /*
+ * Redraw all ---?
+ */
+
+BOOL CALLBACK
+winRedrawAllProcShadowGDI (HWND hwnd, LPARAM lParam)
+{
+  char strClassName[100];
+
+  if (GetClassName (hwnd, strClassName, 100))
+    {
+      if(strcmp (WINDOW_CLASS_X, strClassName) == 0)
+	{
+	  InvalidateRect (hwnd, NULL, FALSE);
+	  UpdateWindow (hwnd);
+	}
+    }
+  return TRUE;
+}
+
+
+/*
  * Allocate a DIB for the shadow framebuffer GDI server
  */
 
@@ -207,9 +236,7 @@ winAllocateFBShadowGDI (ScreenPtr pScreen)
   winScreenPriv(pScreen);
   winScreenInfo		*pScreenInfo = pScreenPriv->pScreenInfo;
   BITMAPINFOHEADER	*pbmih = NULL;
-#if CYGDEBUG
   DIBSECTION		dibsection;
-#endif
   Bool			fReturn = TRUE;
 
   /* Get device contexts for the screen and shadow bitmap */
@@ -232,6 +259,10 @@ winAllocateFBShadowGDI (ScreenPtr pScreen)
   pbmih->biWidth = pScreenInfo->dwWidth;
   pbmih->biHeight = -pScreenInfo->dwHeight;
   
+  ErrorF ("winAllocateFBShadowGDI - Creating DIB with width: %d height: %d "
+	  "depth: %d\n",
+	  pbmih->biWidth, -pbmih->biHeight, pbmih->biBitCount);
+
   /* Create a DI shadow bitmap with a bit pointer */
   pScreenPriv->hbmpShadow = CreateDIBSection (pScreenPriv->hdcScreen,
 					      (BITMAPINFO *) pbmih,
@@ -251,14 +282,18 @@ winAllocateFBShadowGDI (ScreenPtr pScreen)
 #endif
     }
 
-#if CYGDEBUG
   /* Get information about the bitmap that was allocated */
-  GetObject (pScreenPriv->hbmpShadow, sizeof (dibsection),
+  GetObject (pScreenPriv->hbmpShadow,
+	     sizeof (dibsection),
 	     &dibsection);
 
+#if CYGDEBUG || YES
   /* Print information about bitmap allocated */
-  ErrorF ("winAllocateFBShadowGDI - Dibsection width: %d height: %d\n",
-	  dibsection.dsBmih.biWidth, dibsection.dsBmih.biHeight);
+  ErrorF ("winAllocateFBShadowGDI - Dibsection width: %d height: %d "
+	  "depth: %d size image: %d\n",
+	  dibsection.dsBmih.biWidth, dibsection.dsBmih.biHeight,
+	  dibsection.dsBmih.biBitCount,
+	  dibsection.dsBmih.biSizeImage);
 #endif
 
   /* Select the shadow bitmap into the shadow DC */
@@ -289,8 +324,14 @@ winAllocateFBShadowGDI (ScreenPtr pScreen)
     }
 
   /* Set screeninfo stride */
-  pScreenInfo->dwStride = (pScreenInfo->dwPaddedWidth * 8)
-    / pScreenInfo->dwBPP;
+  pScreenInfo->dwStride = ((dibsection.dsBmih.biSizeImage
+			    / dibsection.dsBmih.biHeight)
+			   * 8) / pScreenInfo->dwBPP;
+
+#if CYGDEBUG || YES
+  ErrorF ("winAllocateFBShadowGDI - Created shadow stride: %d\n",
+	  pScreenInfo->dwStride);
+#endif
 
   /* See if the shadow bitmap will be larger than the DIB size limit */
   if (pScreenInfo->dwWidth * pScreenInfo->dwHeight * pScreenInfo->dwBPP
@@ -311,6 +352,9 @@ winAllocateFBShadowGDI (ScreenPtr pScreen)
       return FALSE;
     }
 
+  /* Redraw all windows */
+  if (pScreenInfo->fMultiWindow) EnumWindows(winRedrawAllProcShadowGDI, 0);
+
   return fReturn;
 }
 
@@ -428,6 +472,9 @@ winShadowUpdateGDI (ScreenPtr pScreen,
       /* Reset the clip region */
       SelectClipRgn (pScreenPriv->hdcScreen, NULL);
     }
+
+  /* Redraw all windows */
+  if (pScreenInfo->fMultiWindow) EnumWindows(winRedrawAllProcShadowGDI, 0);
 }
 
 
@@ -475,6 +522,9 @@ winCloseScreenShadowGDI (int nIndex, ScreenPtr pScreen)
       pScreenPriv->hwndScreen = NULL;
     }
 
+  /* Destroy the thread startup mutex */
+  pthread_mutex_destroy (&pScreenPriv->pmServerStarted);
+
   /* Invalidate our screeninfo's pointer to the screen */
   pScreenInfo->pScreen = NULL;
 
@@ -715,6 +765,9 @@ winBltExposedRegionsShadowGDI (ScreenPtr pScreen)
   /* EndPaint frees the DC */
   EndPaint (pScreenPriv->hwndScreen, &ps);
 
+  /* Redraw all windows */
+  if (pScreenInfo->fMultiWindow) EnumWindows(winRedrawAllProcShadowGDI, 0);
+
   return TRUE;
 }
 
@@ -782,6 +835,8 @@ winRedrawScreenShadowGDI (ScreenPtr pScreen)
 	  0, 0,
 	  SRCCOPY);
 
+  /* Redraw all windows */
+  if (pScreenInfo->fMultiWindow) EnumWindows(winRedrawAllProcShadowGDI, 0);
   return TRUE;
 }
 
@@ -886,6 +941,9 @@ winInstallColormapShadowGDI (ColormapPtr pColormap)
   /* Save a pointer to the newly installed colormap */
   pScreenPriv->pcmapInstalled = pColormap;
 
+  /* Redraw all windows */
+  if (pScreenInfo->fMultiWindow) EnumWindows(winRedrawAllProcShadowGDI, 0);
+
   return TRUE;
 }
 
diff --git a/xc/programs/Xserver/hw/xwin/winwindow.c b/xc/programs/Xserver/hw/xwin/winwindow.c
index ae8643b32..b2469c30a 100644
--- a/xc/programs/Xserver/hw/xwin/winwindow.c
+++ b/xc/programs/Xserver/hw/xwin/winwindow.c
@@ -26,9 +26,9 @@
  *from the XFree86 Project.
  *
  * Authors:	Harold L Hunt II
- *		MATSUZAKI Kensuke
+ *		Kensuke Matsuzaki
  */
-/* $XFree86: xc/programs/Xserver/hw/xwin/winwindow.c,v 1.3 2002/10/17 08:18:25 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xwin/winwindow.c,v 1.6 2003/02/12 15:01:38 alanh Exp $ */
 
 #include "win.h"
 
@@ -39,9 +39,15 @@
 static int
 winAddRgn (WindowPtr pWindow, pointer data);
 
-static void
+static
+void
 winUpdateRgn (WindowPtr pWindow);
 
+#ifdef SHAPE
+static
+void
+winReshape (WindowPtr pWin);
+#endif
 
 
 /* See Porting Layer Definition - p. 37 */
@@ -50,7 +56,7 @@ winUpdateRgn (WindowPtr pWindow);
 Bool
 winCreateWindowNativeGDI (WindowPtr pWin)
 {
-  ErrorF ("winCreateWindow()\n");
+  ErrorF ("winCreateWindowNativeGDI ()\n");
   return TRUE;
 }
 
@@ -61,7 +67,7 @@ winCreateWindowNativeGDI (WindowPtr pWin)
 Bool
 winDestroyWindowNativeGDI (WindowPtr pWin)
 {
-  ErrorF ("winDestroyWindow()\n");
+  ErrorF ("winDestroyWindowNativeGDI ()\n");
   return TRUE;
 }
 
@@ -72,7 +78,7 @@ winDestroyWindowNativeGDI (WindowPtr pWin)
 Bool
 winPositionWindowNativeGDI (WindowPtr pWin, int x, int y)
 {
-  ErrorF ("winPositionWindow()\n");
+  ErrorF ("winPositionWindowNativeGDI ()\n");
   return TRUE;
 }
 
@@ -85,7 +91,7 @@ winCopyWindowNativeGDI (WindowPtr pWin,
 			DDXPointRec ptOldOrg,
 			RegionPtr prgnSrc)
 {
-  ErrorF ("winCopyWindow()\n");
+  ErrorF ("winCopyWindowNativeGDI ()\n");
 }
 
 
@@ -95,7 +101,7 @@ winCopyWindowNativeGDI (WindowPtr pWin,
 Bool
 winChangeWindowAttributesNativeGDI (WindowPtr pWin, unsigned long mask)
 {
-  ErrorF ("winChangeWindowAttributes()\n");
+  ErrorF ("winChangeWindowAttributesNativeGDI ()\n");
   return TRUE;
 }
 
@@ -107,7 +113,7 @@ winChangeWindowAttributesNativeGDI (WindowPtr pWin, unsigned long mask)
 Bool
 winUnmapWindowNativeGDI (WindowPtr pWindow)
 {
-  ErrorF ("winUnmapWindow()\n");
+  ErrorF ("winUnmapWindowNativeGDI ()\n");
   /* This functions is empty in the CFB,
    * we probably won't need to do anything
    */
@@ -122,7 +128,7 @@ winUnmapWindowNativeGDI (WindowPtr pWindow)
 Bool
 winMapWindowNativeGDI (WindowPtr pWindow)
 {
-  ErrorF ("winMapWindow()\n");
+  ErrorF ("winMapWindowNativeGDI ()\n");
   /* This function is empty in the CFB,
    * we probably won't need to do anything
    */
@@ -138,13 +144,15 @@ Bool
 winCreateWindowPRootless (WindowPtr pWin)
 {
   Bool			fResult = FALSE;
+  winWindowPriv(pWin);
 
 #if CYGDEBUG
-  ErrorF ("winCreateWindowPRootless()\n");
+  ErrorF ("winCreateWindowPRootless ()\n");
 #endif
 
   fResult = winGetScreenPriv(pWin->drawable.pScreen)->CreateWindow(pWin);
   
+  pWinPriv->hRgn = NULL;
   /*winUpdateRgn (pWin);*/
   
   return fResult;
@@ -158,13 +166,20 @@ Bool
 winDestroyWindowPRootless (WindowPtr pWin)
 {
   Bool			fResult = FALSE;
+  winWindowPriv(pWin);
 
 #if CYGDEBUG
-  ErrorF ("winDestroyWindowPRootless()\n");
+  ErrorF ("winDestroyWindowPRootless ()\n");
 #endif
 
   fResult = winGetScreenPriv(pWin->drawable.pScreen)->DestroyWindow(pWin);
   
+  if (pWinPriv->hRgn != NULL)
+    {
+      DeleteObject(pWinPriv->hRgn);
+      pWinPriv->hRgn = NULL;
+    }
+  
   winUpdateRgn (pWin);
   
   return fResult;
@@ -180,7 +195,7 @@ winPositionWindowPRootless (WindowPtr pWin, int x, int y)
   Bool			fResult = FALSE;
 
 #if CYGDEBUG
-  ErrorF ("winPositionWindowPRootless()\n");
+  ErrorF ("winPositionWindowPRootless ()\n");
 #endif
 
   fResult = winGetScreenPriv(pWin->drawable.pScreen)->PositionWindow(pWin, x, y);
@@ -200,7 +215,7 @@ winChangeWindowAttributesPRootless (WindowPtr pWin, unsigned long mask)
   Bool			fResult = FALSE;
 
 #if CYGDEBUG
-  ErrorF ("winChangeWindowAttributesPRootless()\n");
+  ErrorF ("winChangeWindowAttributesPRootless ()\n");
 #endif
 
   fResult = winGetScreenPriv(pWin->drawable.pScreen)->ChangeWindowAttributes(pWin, mask);
@@ -219,13 +234,20 @@ Bool
 winUnmapWindowPRootless (WindowPtr pWin)
 {
   Bool			fResult = FALSE;
+  winWindowPriv(pWin);
 
 #if CYGDEBUG
-  ErrorF ("winUnmapWindowPRootless()\n");
+  ErrorF ("winUnmapWindowPRootless ()\n");
 #endif
 
   fResult = winGetScreenPriv(pWin->drawable.pScreen)->UnrealizeWindow(pWin);
   
+  if (pWinPriv->hRgn != NULL)
+    {
+      DeleteObject(pWinPriv->hRgn);
+      pWinPriv->hRgn = NULL;
+    }
+  
   winUpdateRgn (pWin);
   
   return fResult;
@@ -242,57 +264,92 @@ winMapWindowPRootless (WindowPtr pWin)
   Bool			fResult = FALSE;
 
 #if CYGDEBUG
-  ErrorF ("winMapWindowPRootless()\n");
+  ErrorF ("winMapWindowPRootless ()\n");
 #endif
 
   fResult = winGetScreenPriv(pWin->drawable.pScreen)->RealizeWindow(pWin);
   
+  winReshape (pWin);
+  
   winUpdateRgn (pWin);
   
   return fResult;
 }
 
 
+#ifdef SHAPE
+void
+winSetShapePRootless (WindowPtr pWin)
+{
+#if CYGDEBUG
+  ErrorF ("winSetShapePRootless ()\n");
+#endif
+
+  winGetScreenPriv(pWin->drawable.pScreen)->SetShape(pWin);
+  
+  winReshape (pWin);
+  winUpdateRgn (pWin);
+  
+  return;
+}
+#endif
+
+
 /*
  * Local function for adding a region to the Windows window region
  */
 
 static
 int
-winAddRgn (WindowPtr pWindow, pointer data)
+winAddRgn (WindowPtr pWin, pointer data)
 {
   int		iX, iY, iWidth, iHeight, iBorder;
   HRGN		hRgn = *(HRGN*)data;
   HRGN		hRgnWin;
+  winWindowPriv(pWin);
   
-  /* If pWindow is not Root */
-  if (pWindow->parent != NULL) 
+  /* If pWin is not Root */
+  if (pWin->parent != NULL) 
     {
-      ErrorF("winAddRgn()\n");
-      if (pWindow->mapped)
+#if CYGDEBUG
+      ErrorF ("winAddRgn ()\n");
+#endif
+      if (pWin->mapped)
 	{
-	  iBorder = wBorderWidth (pWindow);
+	  iBorder = wBorderWidth (pWin);
+	  
+	  iX = pWin->drawable.x - iBorder;
+	  iY = pWin->drawable.y - iBorder;
 	  
-	  iX = pWindow->drawable.x - iBorder;
-	  iY = pWindow->drawable.y - iBorder;
+	  iWidth = pWin->drawable.width + iBorder * 2;
+	  iHeight = pWin->drawable.height + iBorder * 2;
 	  
-	  iWidth = pWindow->drawable.width + iBorder * 2;
-	  iHeight = pWindow->drawable.height + iBorder * 2;
+	  hRgnWin = CreateRectRgn (0, 0, iWidth, iHeight);
 	  
-	  hRgnWin = CreateRectRgn (iX, iY, iX + iWidth, iY + iHeight);
 	  if (hRgnWin == NULL)
 	    {
-	      ErrorF ("winAddRgn - CreateRectRgn() failed\n");
+	      ErrorF ("winAddRgn - CreateRectRgn () failed\n");
 	      ErrorF ("  Rect %d %d %d %d\n",
-		     iX, iY, iX + iWidth, iY + iHeight);
+		      iX, iY, iX + iWidth, iY + iHeight);
+	    }
+	  
+	  if (pWinPriv->hRgn)
+	    {
+	      if (CombineRgn (hRgnWin, hRgnWin, pWinPriv->hRgn, RGN_AND)
+		  == ERROR)
+		{
+		  ErrorF ("winAddRgn - CombineRgn () failed\n");
+		}
 	    }
+	  
+	  OffsetRgn (hRgnWin, iX, iY);
 
 	  if (CombineRgn (hRgn, hRgn, hRgnWin, RGN_OR) == ERROR)
 	    {
-	      ErrorF("winAddRgn - CombineRgn() failed\n");
+	      ErrorF ("winAddRgn - CombineRgn () failed\n");
 	    }
 	  
-	  DeleteObject(hRgnWin);
+	  DeleteObject (hRgnWin);
 	}
       return WT_DONTWALKCHILDREN;
     }
@@ -309,18 +366,98 @@ winAddRgn (WindowPtr pWindow, pointer data)
 
 static
 void
-winUpdateRgn (WindowPtr pWindow)
+winUpdateRgn (WindowPtr pWin)
 {
   HRGN		hRgn = CreateRectRgn (0, 0, 0, 0);
   
   if (hRgn != NULL)
     {
-      WalkTree (pWindow->drawable.pScreen, winAddRgn, &hRgn);
-      SetWindowRgn (winGetScreenPriv(pWindow->drawable.pScreen)->hwndScreen,
+      WalkTree (pWin->drawable.pScreen, winAddRgn, &hRgn);
+      SetWindowRgn (winGetScreenPriv(pWin->drawable.pScreen)->hwndScreen,
 		    hRgn, TRUE);
     }
   else
     {
-      ErrorF ("winUpdateRgn fail to CreateRectRgn\n");
+      ErrorF ("winUpdateRgn - CreateRectRgn failed.\n");
     }
 }
+
+
+#ifdef SHAPE
+static
+void
+winReshape (WindowPtr pWin)
+{
+  int		nRects;
+  ScreenPtr	pScreen = pWin->drawable.pScreen;
+  RegionRec	rrNewShape;
+  BoxPtr	pShape, pRects, pEnd;
+  HRGN		hRgn, hRgnRect;
+  winWindowPriv(pWin);
+
+#if CYGDEBUG
+  ErrorF ("winReshape ()\n");
+#endif
+
+  /* Bail if the window is the root window */
+  if (pWin->parent == NULL)
+    return;
+
+  /* Bail if the window is not top level */
+  if (pWin->parent->parent != NULL)
+    return;
+
+  /* Free any existing window region stored in the window privates */
+  if (pWinPriv->hRgn != NULL)
+    {
+      DeleteObject (pWinPriv->hRgn);
+      pWinPriv->hRgn = NULL;
+    }
+  
+  /* Bail if the window has no bounding region defined */
+  if (!wBoundingShape (pWin))
+    return;
+
+  REGION_INIT(pScreen, &rrNewShape, NullBox, 0);
+  REGION_COPY(pScreen, &rrNewShape, wBoundingShape(pWin));
+  REGION_TRANSLATE(pScreen, &rrNewShape, pWin->borderWidth,
+                   pWin->borderWidth);
+  
+  nRects = REGION_NUM_RECTS(&rrNewShape);
+  pShape = REGION_RECTS(&rrNewShape);
+  
+  if (nRects > 0)
+    {
+      /* Create initial empty Windows region */
+      hRgn = CreateRectRgn (0, 0, 0, 0);
+
+      /* Loop through all rectangles in the X region */
+      for (pRects = pShape, pEnd = pShape + nRects; pRects < pEnd; pRects++)
+        {
+	  /* Create a Windows region for the X rectangle */
+	  hRgnRect = CreateRectRgn (pRects->x1, pRects->y1,
+				    pRects->x2, pRects->y2);
+	  if (hRgnRect == NULL)
+	    {
+	      ErrorF("winReshape - CreateRectRgn() failed\n");
+	    }
+
+	  /* Merge the Windows region with the accumulated region */
+	  if (CombineRgn (hRgn, hRgn, hRgnRect, RGN_OR) == ERROR)
+	    {
+	      ErrorF("winReshape - CombineRgn() failed\n");
+	    }
+
+	  /* Delete the temporary Windows region */
+	  DeleteObject (hRgnRect);
+        }
+      
+      /* Save a handle to the composite region in the window privates */
+      pWinPriv->hRgn = hRgn;
+    }
+
+  REGION_UNINIT(pScreen, &rrNewShape);
+  
+  return;
+}
+#endif
diff --git a/xc/programs/Xserver/hw/xwin/winwindow.h b/xc/programs/Xserver/hw/xwin/winwindow.h
new file mode 100644
index 000000000..d828b4c70
--- /dev/null
+++ b/xc/programs/Xserver/hw/xwin/winwindow.h
@@ -0,0 +1,118 @@
+/*
+ *Copyright (C) 1994-2000 The XFree86 Project, Inc. All Rights Reserved.
+ *
+ *Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ *"Software"), to deal in the Software without restriction, including
+ *without limitation the rights to use, copy, modify, merge, publish,
+ *distribute, sublicense, and/or sell copies of the Software, and to
+ *permit persons to whom the Software is furnished to do so, subject to
+ *the following conditions:
+ *
+ *The above copyright notice and this permission notice shall be
+ *included in all copies or substantial portions of the Software.
+ *
+ *THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ *MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *NONINFRINGEMENT. IN NO EVENT SHALL THE XFREE86 PROJECT BE LIABLE FOR
+ *ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF
+ *CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ *WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ *Except as contained in this notice, the name of the XFree86 Project
+ *shall not be used in advertising or otherwise to promote the sale, use
+ *or other dealings in this Software without prior written authorization
+ *from the XFree86 Project.
+ *
+ * Authors:	Kensuke Matsuzaki
+ */
+/* $XFree86: xc/programs/Xserver/hw/xwin/winwindow.h,v 1.1 2003/02/12 15:01:38 alanh Exp $ */
+
+
+#ifndef _WINWINDOW_H_
+#define _WINWINDOW_H_
+
+#ifndef NO
+#define NO			0
+#endif
+#ifndef YES
+#define YES			1
+#endif
+
+/* Constant strings */
+#define WINDOW_CLASS		"cygwin/xfree86 rl"
+#define WINDOW_TITLE		"Cygwin/XFree86 rl"
+#define WIN_SCR_PROP		"cyg_screen_prop_rl"
+#define WINDOW_CLASS_X		"cygwin/xfree86 X rl"
+#define WINDOW_TITLE_X		"Cygwin/XFree86 X rl"
+#define WIN_WINDOW_PROP		"cyg_window_prop_rl"
+#define WIN_MSG_QUEUE_FNAME	"/dev/windows"
+#define WIN_LOG_FNAME		"/tmp/XWinrl.log"
+#define WIN_WID_PROP		"cyg_wid_prop_rl"
+#define WIN_NEEDMANAGE_PROP	"cyg_override_redirect_prop_rl"
+#define CYGMULTIWINDOW_DEBUG    NO
+
+typedef struct _winPrivScreenRec *winPrivScreenPtr;
+
+/*
+ * Window privates
+ */
+
+typedef struct
+{
+  DWORD			dwDummy;
+  HRGN			hRgn;
+  HWND			hWnd;
+  winPrivScreenPtr	pScreenPriv;
+  int			iX;
+  int			iY;
+  int			iWidth;
+  int			iHeight;
+  Bool			fXKilled;
+} winPrivWinRec, *winPrivWinPtr;
+
+typedef struct _winWMMessageRec{
+  DWORD			dwID;
+  DWORD			msg;
+  int			iWindow;
+  HWND			hwndWindow;
+  int			iX, iY;
+  int			iWidth, iHeight;
+} winWMMessageRec, *winWMMessagePtr;
+
+/*
+ * winrootlesswm.c
+ */
+#define		WM_WM_MOVE	(WM_USER + 1)
+#define		WM_WM_SIZE	(WM_USER + 2)
+#define		WM_WM_RAISE	(WM_USER + 3)
+#define		WM_WM_LOWER	(WM_USER + 4)
+#define		WM_WM_MAP	(WM_USER + 5)
+#define		WM_WM_UNMAP	(WM_USER + 6)
+#define		WM_WM_KILL	(WM_USER + 7)
+#define		WM_WM_ACTIVATE	(WM_USER + 8)
+
+#define		WMMSG_MSG	10
+
+
+/*
+ * winmultiwindowwm.c
+ */
+
+void
+winSendMessageToWM (void *pWMInfo, winWMMessagePtr msg);
+
+Bool
+winInitWM (void **ppWMInfo,
+	   pthread_t *ptWMProc,
+#if 0
+	   pthread_cond_t *ppcServerStarted,
+#endif
+	   pthread_mutex_t *ppmServerStarted,
+#if 0
+	   Bool *pfServerStarted,
+#endif
+	   int dwScreen);
+
+#endif
diff --git a/xc/programs/Xserver/hw/xwin/winwndproc.c b/xc/programs/Xserver/hw/xwin/winwndproc.c
index 5bdd18c82..6aa29316d 100644
--- a/xc/programs/Xserver/hw/xwin/winwndproc.c
+++ b/xc/programs/Xserver/hw/xwin/winwndproc.c
@@ -31,7 +31,7 @@
  *		Harold L Hunt II
  *		MATSUZAKI Kensuke
  */
-/* $XFree86: xc/programs/Xserver/hw/xwin/winwndproc.c,v 1.23 2002/10/17 08:18:25 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xwin/winwndproc.c,v 1.24 2003/02/12 15:01:38 alanh Exp $ */
 
 #include "win.h"
 #include <commctrl.h>
@@ -300,6 +300,7 @@ winWindowProc (HWND hwnd, UINT message,
 	if (!s_pScreenInfo->fScrollbars
 	    || !s_pScreenInfo->fDecoration
 	    || s_pScreenInfo->fRootless
+	    || s_pScreenInfo->fMultiWindow
 	    || s_pScreenInfo->fFullScreen)
 	  break;
 
@@ -569,7 +570,8 @@ winWindowProc (HWND hwnd, UINT message,
 	    || !s_pScreenInfo->fScrollbars
 	    || s_pScreenInfo->fFullScreen
 	    || !s_pScreenInfo->fDecoration
-	    || s_pScreenInfo->fRootless)
+	    || s_pScreenInfo->fRootless
+	    || s_pScreenInfo->fMultiWindow)
 	  break;
 
 	/*