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authorTimothy Arceri <tarceri@itsqueeze.com>2020-06-23 12:48:41 +1000
committerMarge Bot <eric+marge@anholt.net>2020-06-28 22:57:58 +0000
commita27f98a46ad35e057e6c2ad87d28589711e40fe3 (patch)
tree821acfd7a86b9efbd5b566f79d54275db25523e1 /tests/spec/ext_gpu_shader4
parent344da674893c30af5d7ceb1fd4967b1523804c75 (diff)
glsl: move open-coded-bitfieldReverse tests to where they belong
Part-of: <https://gitlab.freedesktop.org/mesa/piglit/-/merge_requests/323>
Diffstat (limited to 'tests/spec/ext_gpu_shader4')
-rw-r--r--tests/spec/ext_gpu_shader4/execution/open-coded-bitfieldReverse.shader_test52
1 files changed, 52 insertions, 0 deletions
diff --git a/tests/spec/ext_gpu_shader4/execution/open-coded-bitfieldReverse.shader_test b/tests/spec/ext_gpu_shader4/execution/open-coded-bitfieldReverse.shader_test
new file mode 100644
index 000000000..902746d07
--- /dev/null
+++ b/tests/spec/ext_gpu_shader4/execution/open-coded-bitfieldReverse.shader_test
@@ -0,0 +1,52 @@
+[require]
+GLSL >= 1.20
+GL_EXT_gpu_shader4
+
+[vertex shader passthrough]
+
+[fragment shader]
+#version 120
+#extension GL_EXT_gpu_shader4: require
+
+/* Adapted from the nir_opt_algebraic pattern that causes the bug:
+ *
+ * step1 = ('ior', ('ishl', u, 16), ('ushr', u, 16))
+ * step2 = ('ior', ('ishl', ('iand', step1, 0x00ff00ff), 8), ('ushr', ('iand', step1, 0xff00ff00), 8))
+ * step3 = ('ior', ('ishl', ('iand', step2, 0x0f0f0f0f), 4), ('ushr', ('iand', step2, 0xf0f0f0f0), 4))
+ * step4 = ('ior', ('ishl', ('iand', step3, 0x33333333), 2), ('ushr', ('iand', step3, 0xcccccccc), 2))
+ * step5 = ('ior(many-comm-expr)', ('ishl', ('iand', step4, 0x55555555), 1), ('ushr', ('iand', step4, 0xaaaaaaaa), 1))
+ *
+ * return step5
+ *
+ * The problem was that this optimization triggered even on GPUs (e.g., Intel
+ * Sandybridge) that lack a BFREV instruction.
+ */
+unsigned int reverse(unsigned int u)
+{
+ unsigned int step1 = (u << 16) | (u >> 16);
+ unsigned int step2 = ((step1 & 0x00ff00ffu) << 8) | ((step1 & 0xff00ff00u) >> 8);
+ unsigned int step3 = ((step2 & 0x0f0f0f0fu) << 4) | ((step2 & 0xf0f0f0f0u) >> 4);
+ unsigned int step4 = ((step3 & 0x33333333u) << 2) | ((step3 & 0xccccccccu) >> 2);
+ unsigned int step5 = ((step4 & 0x55555555u) << 1) | ((step4 & 0xaaaaaaaau) >> 1);
+
+ return step5;
+}
+
+out vec4 piglit_fragcolor;
+
+uniform unsigned int value;
+uniform unsigned int expected;
+
+void main()
+{
+ piglit_fragcolor = (reverse(value) != expected)
+ ? vec4(1.0, 0.0, 0.0, 1.0)
+ : vec4(0.0, 1.0, 0.0, 1.0);
+}
+
+[test]
+uniform uint value 0x12345678
+uniform uint expected 0x1e6a2c48
+
+draw rect -1 -1 2 2
+probe all rgba 0.0 1.0 0.0 1.0