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2020-05-14targets/opencl: fix build against LLVM>=10 with Polly supportJan Palus1-0/+8
see https://bugs.llvm.org/show_bug.cgi?id=44870 Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4511>
2020-05-14freedreno: Avoid duplicate BO relocs in FD_RINGBUFFER_OBJECTs.Eric Anholt1-3/+17
For the piglit drawoverhead case, 5/18 of the objects' relocs were duplicated. We can dedupe them at object create time (since objects are long-lived) and avoid repeated relocation work at emit time. nohw drawoverhead program statechange throughput 2.34082% +/- 0.645832% (n=10). Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5020>
2020-05-14freedreno: Fix resource layout dump loop.Eric Anholt1-1/+1
Apparently I've never dumped a fully populated slices array, so the 0-init always terminated the loop. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5020>
2020-05-14zink: disable vkCmdResolveImage when respecting render-conditionErik Faye-Lund1-1/+2
vkCmdResolveImage doesn't respect render-condition, so let's fall back to blitter in this case instead. Fixes: 80d7cc6f129 ("zink: enable conditional rendering if available") Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5008>
2020-05-14anv: Fix deadlock in anv_timelines_waitDanylo Piliaiev1-1/+2
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2945 Fixes: 34f32a6d6648073e2fda3fb78377124fb32bb288 Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5005>
2020-05-14zink. Changed sampler default name.Duncan Hopkins1-1/+3
Changed the sampler variable name from 'sampler' to 'sampler_<num>' to stop symbol classes in the Metal MSL shaders, as 'sampler' is a keyword. Improves human readability when debugging issues. Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4211>
2020-05-14radv: enable shaderResourceMinLodSamuel Pitoiset2-0/+2
This feature was missing for unknown reasons. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4989>
2020-05-14ac/llvm: add support for texturing with clamped LODSamuel Pitoiset3-1/+12
This is a requirement for the shaderResourceMinLod feature which allows to clamp LOD. This uses all image_sample_*_cl variants. All dEQP-VK.glsl.texture_functions.texture*clamp.* pass. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4989>
2020-05-14aco: add support for texturing with clamped LODSamuel Pitoiset1-3/+39
This is a requirement for the shaderResourceMinLod feature which allows to clamp LOD. This uses all image_sample_*_cl variants. All dEQP-VK.glsl.texture_functions.texture*clamp.* pass. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4989>
2020-05-14aco: remove useless check for nir_tex_src_biasSamuel Pitoiset1-4/+2
I think only nir_texop_txb can have a bias operand anyways. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4989>
2020-05-14llvmpipe: Expect increased exp precision on WindowsDaniel Stone1-2/+4
'Newer' versions of MSVCRT than 2013 appear to have fixed the bug around expf precision which caused bb9e8c5090f0. It's not clear when this was changed, but at least on Windows 10 machines with Visual Studio 2019, expf behaves in line with other implementations. As there is no clear way to test for the version of the VCRT in use, simply mark this test as expected-pass rather than xfail. Signed-off-by: Daniel Stone <daniels@collabora.com> Reviewed-by: Jose Fonseca <jfonseca@vmware.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4946>
2020-05-13freedreno/ir3: use lower_wrmasks passRob Clark4-35/+33
Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com> Reviewed-by: Eric Anholt <eric@anholt.net>
2020-05-13nir: add pass to lower disjoint wrmask'sRob Clark4-0/+236
Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com> Reviewed-by: Eric Anholt <eric@anholt.net>
2020-05-13nir: add helper to copy const_index[]Rob Clark2-2/+28
It seems less brittle to not assume they are in the same order for src and dst instructions. Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com> Reviewed-by: Eric Anholt <eric@anholt.net>
2020-05-13nir: fix indices for ir3 ssbo_atomic intrinsicsRob Clark1-10/+10
Caught by the sanity checking in nir_intrinsic_copy_const_indices() (which is introduced by the next patch). Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com> Reviewed-by: Eric Anholt <eric@anholt.net>
2020-05-13freedreno/ir3: use const_index accessorsRob Clark2-2/+2
Cleans up a couple spots that were still open-coding this. Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com> Reviewed-by: Eric Anholt <eric@anholt.net>
2020-05-13freedreno/ir3: Drop wrmask for ir3 local and global store intrinsicsKristian H. Kristensen3-45/+35
These intrinsics are supposed to map to the underlying hardware instructions, which don't have wrmask. We use them when we lower store_output in the geometry pipeline and since store_output gets lowered to temps, we always see full wrmasks there.
2020-05-14nir: Add some docs to the metadata typesJason Ekstrand1-0/+51
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Eric Anholt <eric@anholt.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5028>
2020-05-14freedreno: Fix attempts to push UBO contents past the constlen on pre-a6xx.Eric Anholt1-0/+6
The binning variant likely won't have any UBO load code in it, so we were writing past constlen (and sometimes asserting about it) when loading more than one ubo block. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5027>
2020-05-14panfrost: Fix background showing when using discardIcecream951-1/+7
This fixes problems in a number of games, including SuperTuxKart, OpenMW and RVGL. v2: Use MALI_READS_ZS | 0x20 instead of MALI_WRITES_Z to match with the blob. Keep using 0x400 | 0x20 when depth is disabled. Closes: #2620 Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5001>
2020-05-14anv: Translate relative timeout to absolute when calling anv_timelines_waitDanylo Piliaiev1-1/+1
Fixes: 34f32a6d6648073e2fda3fb78377124fb32bb288 Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5025>
2020-05-14anv: Set MOCS in 3DSTATE_CONSTANT_* on Gen9+Jason Ekstrand1-1/+15
While we're here, we add a nice detailed comment about why always assuming internal is ok. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5022>
2020-05-14anv: Set 3DSTATE_VF_INSTANCING on the SVGS elementJason Ekstrand1-0/+6
It probably doesn't matter because that buffer should have a stride of zero. However, it still seems like a good idea just to be safe. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5022>
2020-05-14freedreno/a6xx: Use LDC for UBO loads.Eric Anholt6-54/+65
It saves addressing math, but may cause multiple loads to be done and bcseled due to NIR not giving us good address alignment information currently. I don't have any workloads I know of using non-const-uploaded UBOs, so I don't have perf numbers for it This makes us match the GLES blob's behavior, and turnip (other than being bindful). Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4858>
2020-05-14freedreno: Trim num_ubos to just the ones we haven't lowered to constbuf.Eric Anholt2-22/+29
With the upcoming LDC usage in the GL driver, we don't want to be uploading descriptors for every UBO when they aren't actually in use. Trimming NIR's num_ubos will avoid that, and cleans up num_ubo handling elsewhere right now. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4858>
2020-05-14freedreno/ir3: Move i/o offset lowering after analyze_ubo_ranges.Eric Anholt2-14/+12
I found that when moving more UBOs to load_ubo_ir3, analyze_ubo_ranges would move things back in a broken way. We can just run this pass later and drop the _ir3 path. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4858>
2020-05-14freedreno/ir3: Leave the cursor alone during ir3_nir_try_propagate_bit_shift.Eric Anholt1-4/+2
Otherwise, we might end up inserting the nir_intrinsic_load_ubo_ir3() after the non-offset src's definition, leading to nir_validate() failures. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4858>
2020-05-14freedreno/ir3: Clean up a silly nir_src_for_ssa(src.ssa).Eric Anholt1-1/+1
Just copy the src through. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4858>
2020-05-14nir: Include num_ubos in the printed shader (if nonzero).Eric Anholt1-0/+2
I keep wanting this number for debugging shaders. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4858>
2020-05-13util/ra: Add [de]serialization supportJason Ekstrand2-0/+69
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Eric Anholt <eric@anholt.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5019>
2020-05-13util/vma: Add a debug print helperJason Ekstrand2-0/+24
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Eric Anholt <eric@anholt.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5019>
2020-05-13util/vma: Add an option to configure high/low preferenceJason Ekstrand2-19/+54
The vma_heap allocator was originally designed to prefer high addresses in order to find bugs in ANV's high address handling. However, there are cases where you might want the allocator to prefer lower addresses for some reason. This provides a configure bit for exactly this purpose. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Eric Anholt <eric@anholt.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5019>
2020-05-13util/list: Add list_foreach_entry_from_safeCaio Marcelo de Oliveira Filho1-0/+7
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Eric Anholt <eric@anholt.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5019>
2020-05-13util/list: Add a list pair iteratorJason Ekstrand1-0/+7
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Eric Anholt <eric@anholt.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5019>
2020-05-13anv: Implement VK_EXT_custom_border_colorIván Briano4-31/+109
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4898>
2020-05-13anv: Add a way to reserve states from a poolIván Briano2-0/+55
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4898>
2020-05-13anv: Disable B5G6R5_UNORM_PACK16Iván Briano1-1/+1
It's not a required format and it causes issues with some features. Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4898>
2020-05-13anv: use the correct format on AndroidIván Briano1-1/+1
Per https://android.googlesource.com/platform/frameworks/native/+/master/vulkan/libvulkan/swapchain.cpp#745 the format Android requires is R5G6B5, and we have it backwards here. Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Tapani Pälli <tapani.palli@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4898>
2020-05-13drirc: Enable glthread for PCSX2JibbityJobbity1-0/+3
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5023>
2020-05-13glthread: stop using GLenum16 to get correct GL errors for out-of-bounds enumsMarek Olšák2-11/+8
Reported by Ian Romanick. Reviewed-by: Eric Anholt <eric@anholt.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5016>
2020-05-13radeonsi: also enable tgsi_to_nir caching for compute shadersMarek Olšák1-1/+1
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4993>
2020-05-13radeonsi: Enable tgsi to nir disk cacheAxel Davy1-1/+1
Enable the tgsi to nir cache for radeonsi. Signed-off-by: Axel Davy <davyaxel0@gmail.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4993>
2020-05-13st/nine: Enable ttn cacheAxel Davy1-1/+1
A trace of a Hat in Time, which builds thousands of shaders takes 339 seconds to run the second time without this patch, and 41 seconds with it (basically there is no more loading times). Signed-off-by: Axel Davy <davyaxel0@gmail.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4993>
2020-05-13ttn: Implement disk cacheAxel Davy1-2/+82
ttn is slow, let's disk cache it. Signed-off-by: Axel Davy <davyaxel0@gmail.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4993>
2020-05-13ttn: Add new allow_disk_cache parameterAxel Davy14-17/+21
For now this parameter doesn't do anything. It means the implementation is allowed to use a cache on disk. Signed-off-by: Axel Davy <davyaxel0@gmail.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4993>
2020-05-13freedreno/a6xx: Fix UBWC mipmapping height alignment.Eric Anholt2-6/+137
After fixing the power of two sizing, pitches worked, but 1-pixel high and unaligned height miplevels were off. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4931>
2020-05-13freedreno/a6xx: Fix UBWC mipmap sizing.Eric Anholt2-14/+95
The HW requires a log2 width/height of the level 0 meta_* size in the descriptors, making it pretty clear that UBWC mipmapping is all power-of-two sized. Fixes a bunch of failures in the upcoming unit UBWC layout unit tests. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4931>
2020-05-13freedreno/a6xx: Fix UBWC blockheight for RG8.Eric Anholt1-1/+4
Using texturator on a P3A at 1024x1024, RG8 has log2w/h of 6x7 instead of R16I/UI's 6x8. The other blockw/h I verified other than cpp=1 (R8/R8I/R8UI didn't use UBWC) and 32 (would need a bigger type). Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4931>
2020-05-13freedreno: Pull the tile_alignment lookup for a layout to a helper.Eric Anholt1-20/+25
The r8g8 case UBWC alignment will be changing in the next commit, so fdl6_get_ubwc_blockwidth needs to start paying attention to r8g8 too. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4931>
2020-05-13freedreno/a6xx: Add a testcase for UBWC buffer sharing.Eric Anholt1-4/+22
These offsets are hand-computed referencing msm_media_info.h, and match our driver's current behavior. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4931>
generated by cgit v1.2.3 (git 2.39.1) at 2024-05-04 18:11:50 +0000