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path: root/src/mesa/drivers/dri/i965/brw_structs.h
AgeCommit message (Expand)AuthorFilesLines
2013-07-15i965: Cite the Ivybridge PRM for DP message descriptor fields.Kenneth Graunke1-3/+3
2013-07-03i965: Remove some dead code.Kenneth Graunke1-31/+0
2013-05-06i965: Add Gen7+ fields to brw_instruction and add comments.Matt Turner1-12/+19
2013-01-03i965: Replace structs with bit-shifting for Gen7 SURFACE_STATE entries.Kenneth Graunke1-102/+0
2012-12-15i965: Move BRW_MAX_GRF and similar defines to brw_reg.h.Kenneth Graunke1-18/+0
2012-12-11i965: Add the new flag_reg_nr instruction field from IVB.Eric Anholt1-4/+8
2012-12-11i965: Correct the name and usage of the flag subregister number field.Eric Anholt1-5/+5
2012-12-11i965: Remove bogus flag_reg_nr field from bits3.Eric Anholt1-4/+2
2012-09-17i965: Add support for instruction compaction.Eric Anholt1-0/+26
2012-07-27i965: Fix typo in shader channel select field name.Kenneth Graunke1-4/+4
2012-07-11i965/msaa: Add CMS MSAA settings to brw_structs.h.Paul Berry1-2/+20
2012-03-30i965: Set "Shader Channel Select" fields in Haswell's SURFACE_STATE.Kenneth Graunke1-1/+8
2012-02-10i965: Add support for the MAD opcode on gen6+.Eric Anholt1-0/+37
2012-01-30i965/fs: Fix rendering corruption in unigine tropics.Eric Anholt1-0/+11
2011-11-11i965: Replace a should-never-happen fallback with asserts where it matters.Eric Anholt1-2/+0
2011-10-18i965: Document most of the brw_instruction message structs.Kenneth Graunke1-39/+79
2011-10-18i965: Rename pixel_scoreboard_clear to last_render_target for clarity.Kenneth Graunke1-4/+4
2011-10-18i965: Document the brw_instruction Message Descriptor structures.Kenneth Graunke1-2/+27
2011-07-07i965: Remove unused structures for command packets.Kenneth Graunke1-433/+0
2011-07-07i965: Emit 3DSTATE_VF_STATISTICS in OUT_BATCH style.Kenneth Graunke1-8/+0
2011-07-07i965: Convert 3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP to OUT_BATCH style.Kenneth Graunke1-9/+0
2011-05-31i965: Remove brw_surface_state struct that is now unused.Eric Anholt1-74/+0
2011-05-17i965: Add support for IF/ELSE/ENDIF control flow on Ivybridge.Kenneth Graunke1-0/+1
2011-05-17i965: Fix sampler message descriptor on Ivybridge.Kenneth Graunke1-0/+12
2011-05-17i965: Fix SAMPLER_STATE on Ivybridge.Kenneth Graunke1-0/+48
2011-05-17i965: Update SURFACE_STATE for Ivybridge.Kenneth Graunke1-0/+78
2011-05-17i965: Fix the URB write message descriptor on Ivybridge.Kenneth Graunke1-0/+14
2011-05-17i965: Fix render target writes on Ivybridge.Kenneth Graunke1-0/+16
2011-05-17i965: Initial Ivybridge Viewport state setup.Kenneth Graunke1-0/+22
2011-05-13i965: Rename dp_render_target struct to gen6_dp.Kenneth Graunke1-1/+1
2011-04-20i965: Remove dead vertex buffer structs.Kenneth Graunke1-25/+0
2011-04-18i965: Convert 3DPRIMITIVE command from struct-style to OUT_BATCH style.Kenneth Graunke1-19/+0
2011-01-10i965: Add new HiZ related bits to WM_STATE.Kenneth Graunke1-1/+8
2010-12-23i965: Correct the dp_read message descriptor setup on g4x.Eric Anholt1-0/+12
2010-12-09i965: remove unused variable since brw_wm_glsl.c removal.Eric Anholt1-1/+1
2010-12-09i965: Set render_cache_read_write surface state bit on gen6 constant surfs.Eric Anholt1-0/+5
2010-12-09i965: Set up the correct texture border color state struct for Ironlake.Eric Anholt1-0/+9
2010-12-01i965: Add support for gen6 BREAK ISA emit.Eric Anholt1-0/+15
2010-10-06i965: Fix up IF/ELSE/ENDIF for gen6.Eric Anholt1-0/+12
2010-09-28i965: fix scissor state on sandybridgeZhenyu Wang1-3/+5
2010-09-28i965: Fix sampler on sandybridgeZhenyu Wang1-6/+8
2010-08-31i965: fix depth test on sandybridgeZhenyu Wang1-1/+1
2010-08-20i965: Set the destination horiz stride even for da16, as SNB seems to need it.Zhenyu Wang1-2/+2
2010-08-20i965: Add AccWrCtl support on Sandybridge.Zhenyu Wang1-2/+3
2010-07-08i965: Add disasm for SEND mlen/rlen on Sandybridge.Eric Anholt1-2/+3
2010-07-08i965: Add definitions for Sandybridge DP write/read messages.Zhenyu Wang1-0/+28
2010-06-18i965: Fix the name of aa_coverage_slope in the improved AA line params.Eric Anholt1-1/+1
2010-04-21intel: Clean up chipset name and gen num for IronlakeZhenyu Wang1-9/+9
2010-02-25i965: Add Sandybridge viewport setup.Eric Anholt1-0/+9
2010-02-25i965: Add Sandybridge scissor state.Eric Anholt1-0/+5
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