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path: root/src/mesa/drivers/dri/i965/brw_pipe_control.c
AgeCommit message (Expand)AuthorFilesLines
2020-10-15i965: Remove Gen10-specific state setup and workaroundsIan Romanick1-3/+2
2020-10-15i965: Rename gen10_emit_isp_disable to gen7_emit_isp_disableIan Romanick1-1/+1
2020-05-20i965: add identifier BOLionel Landwerlin1-0/+24
2020-05-20i965: store workaround_bo offsetLionel Landwerlin1-5/+10
2019-07-31tree-wide: replace MAYBE_UNUSED with ASSERTEDEric Engestrom1-1/+1
2019-03-11i965: Use genxml for emitting PIPE_CONTROL.Kenneth Graunke1-201/+42
2019-03-11i965: Rename ISP_DIS to INDIRECT_STATE_POINTERS_DISABLE.Kenneth Graunke1-1/+1
2018-11-14i965: avoid 'unused variable' warningsAndrii Simiklit1-1/+1
2018-05-22i965: Remove ring switching entirelyJason Ekstrand1-22/+10
2018-05-22i965: Introduce a "memory zone" concept on BO allocation.Kenneth Graunke1-1/+2
2018-05-09i965,anv: Set the CS stall bit on the ISP disable PIPE_CONTROLJason Ekstrand1-1/+2
2018-05-09i965: require pixel scoreboard stall prior to ISP disableLionel Landwerlin1-1/+8
2018-03-27i965: Drop unused alignment parameter from brw_bo_alloc().Kenneth Graunke1-1/+1
2018-03-27i965: Drop PIPE_CONTROL_NO_WRITE from various calls.Kenneth Graunke1-1/+1
2018-03-01i965: Shorten the name of the workaround BO.Kenneth Graunke1-3/+1
2018-01-26i965/gen10: Use CS Stall instead of WriteImmediate.cros-mesa-18.1_pre1-r4-vanillachadv/cros-mesa-18.1_pre1-r4-vanillaRafael Antognolli1-6/+4
2018-01-26i965/gen10: Ignore push constant packets during context restore.Rafael Antognolli1-0/+49
2017-11-17i965: Revert Gen8 aspect of VF PIPE_CONTROL workaround.Kenneth Graunke1-1/+5
2017-11-16i965: Implement another VF cache invalidate workaround on Gen8+.Kenneth Graunke1-8/+33
2017-11-14i965/gen8+: Fix the number of dwords programmed in MI_FLUSH_DWAnuj Phogat1-2/+5
2017-11-14i965: Program DWord Length in MI_FLUSH_DWAnuj Phogat1-1/+1
2017-11-10i965/gen10: Use the correct form of | for the RCPFE workaroundJason Ekstrand1-2/+2
2017-11-03i965/gen10: Implement WaForceRCPFEHangWorkaroundAnuj Phogat1-0/+23
2017-08-30i965: Add PIPE_CONTRTOL_DATA_CACHE flush to brw_emit_mi_flush().Kenneth Graunke1-0/+1
2017-08-30i965: drop brw->is_haswell in favor of devinfo->is_haswellLionel Landwerlin1-2/+2
2017-08-30i965: drop brw->gen in favor of devinfo->genLionel Landwerlin1-15/+29
2017-08-04i965: Reduce passing 2x32b of reloc_domains to 2 bitsChris Wilson1-8/+4
2017-06-14i965: Do an end-of-pipe sync after flushesJason Ekstrand1-3/+3
2017-06-14i965: Add an end-of-pipe sync helperTopi Pohjolainen1-1/+99
2017-06-14i965: Unify the two emit_pipe_control functionsJason Ekstrand1-73/+64
2017-06-14i965: Take a uint64_t immediate in emit_pipe_control_writeJason Ekstrand1-12/+10
2017-04-10i965/drm: Rename drm_bacon_bo to brw_bo.Kenneth Graunke1-5/+5
2017-04-10i965/drm: Use our internal libdrm (drm_bacon) rather than the real one.Kenneth Graunke1-3/+3
2016-12-14i965/gen6+: Invalidate constant cache on brw_emit_mi_flush().Francisco Jerez1-0/+1
2016-09-28i965: Remove useless (harmful) assertionBen Widawsky1-1/+1
2016-09-03intel: s/brw_device_info/gen_device_info/Jason Ekstrand1-1/+1
2016-08-19i965: Roll intel_reg.h into brw_defines.hJason Ekstrand1-1/+1
2016-07-07i965: Fix remaining flush vs invalidate race conditions in brw_emit_pipe_cont...Francisco Jerez1-0/+18
2016-07-07i965: Emit SKL VF cache invalidation W/A from brw_emit_pipe_control_flush.Francisco Jerez1-9/+10
2016-07-07i965: Emit SNB write cache flush W/A from brw_emit_pipe_control_flush.Francisco Jerez1-10/+11
2016-03-28i965: Fix brw_render_cache_set_check_flush's PIPE_CONTROLs.Kenneth Graunke1-2/+0
2016-02-08i965: Rename define for the PIPE_CONTROL DC flush bit.Francisco Jerez1-1/+1
2015-12-21i965: Only apply CS stall workaround pre-SKLBen Widawsky1-2/+4
2015-12-09i965/gen8: Don't add workaround bits to PIPE_CONTROL stalls if DC flush is set.Francisco Jerez1-1/+3
2015-09-08i965/gen8+: Skip depth stalls on state changeBen Widawsky1-0/+8
2015-07-08i965: Move pipecontrol workaround bo to brw_pipe_controlChris Wilson1-6/+34
2015-06-24i965: Rename intel_emit* to reflect their new location in brw_pipe_controlChris Wilson1-4/+4
2015-06-24i965: Transplant PIPE_CONTROL routines to brw_pipe_controlChris Wilson1-0/+331