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path: root/src/mesa/drivers/dri/i965/brw_clip_unfilled.c
AgeCommit message (Expand)AuthorFilesLines
2013-03-23i965: Clarify nomenclature: vert_result -> varyingPaul Berry1-29/+28
2013-03-15Replace gl_vert_result enum with gl_varying_slot.Paul Berry1-19/+19
2011-12-21i965: Don't make consumers of brw_DO()/brw_WHILE() track loop start.Eric Anholt1-8/+6
2011-12-07i965: Clean up misleading defines for DWORD 2 of URB_WRITE header.Paul Berry1-3/+9
2011-10-18intel: Convert from GLboolean to 'bool' from stdbool.h.Kenneth Graunke1-3/+3
2011-09-06i965: clip: Convert computations to ..._to_offset() for clarity.Paul Berry1-8/+24
2011-09-06i965: clip: Add a function to determine whether a vert_result is in use.Paul Berry1-5/+9
2011-09-06i965: clip: Move hpos_offest and ndc_offset into local functions.Paul Berry1-4/+8
2011-09-06i965: clip: rename header_position_offset to the more correct ndc_offset.Paul Berry1-1/+1
2011-05-17i965: Move IF stack handling into the EU abstraction layer/brw_compile.Kenneth Graunke1-27/+18
2010-06-10mesa: rename src/mesa/shader/ to src/mesa/program/Brian Paul1-1/+1
2010-01-22i965: Remove unnecessary headers.Vinson Lee1-1/+0
2009-07-30i965: Postpone ff_sync message in CLIP kernel on IGDNGXiang, Haihao1-2/+1
2009-07-13i965: add support for new chipsetsXiang, Haihao1-0/+2
2008-09-18mesa: added "main/" prefix to includes, remove some -I paths from Makefile.te...Brian Paul1-4/+4
2008-08-21965: Fix incorrect backface cullingKrzysztof Czurylo1-2/+22
2008-03-28i965: depth offset on glPolygonMode(GL_LINE/GL_POINT)Xiang, Haihao1-2/+2
2006-08-09Add Intel i965G/Q DRI driver.Eric Anholt1-0/+484