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2020-03-03intel/gen12+: Disable mid thread preemption.Rafael Antognolli2-0/+13
2020-03-03intel/isl: Implement D16_UNORM workarounds.Rafael Antognolli4-2/+75
2020-03-03anv: multiply the scratch space by 4 on gen9-10 like iris and i965Paulo Zanoni1-2/+16
2020-03-03intel/device: bdw_gt1 actually has 6 eus per subslicePaulo Zanoni1-1/+1
2020-03-03intel: fix the gen 12 compute shader scratch IDsPaulo Zanoni1-3/+8
2020-03-03intel: fix the gen 11 compute shader scratch IDsPaulo Zanoni1-1/+6
2020-03-02anv: Wait for the GPU to be idle before invalidating the aux table.Rafael Antognolli1-0/+10
2020-03-02anv: Do end-of-pipe sync around MCS/CCS ops instead of CS stallJason Ekstrand2-8/+8
2020-03-02anv: Use a proper end-of-pipe sync instead of just CS stallJason Ekstrand2-15/+118
2020-03-02anv: Use the PIPE_CONTROL instead of bits for the CS stall W/AJason Ekstrand1-3/+7
2020-03-02intel/tools/dump_gpu: fix getparam valuesLionel Landwerlin1-1/+8
2020-02-28intel/compiler: Restrict cs_threads to 64Jordan Justen1-1/+3
2020-02-27anv: Remove unused field `urb.total_size`Caio Marcelo de Oliveira Filho4-10/+5
2020-02-27anv: Remove unused field xfb_used from anv_pipelineCaio Marcelo de Oliveira Filho2-5/+1
2020-02-26nir: Drop nir_tex_instr::texture_array_sizeJason Ekstrand2-6/+0
2020-02-25intel/tools: Do not print type/qualifiers/name for c_literalMatt Turner1-1/+1
2020-02-25intel/tools: Allow i965_disasm to disassemble c_literal input typeSagar Ghuge1-36/+103
2020-02-25intel/tools: Print c_literals 4 byte wideSagar Ghuge1-4/+12
2020-02-25intel/tools: Add test for state register as sourceSagar Ghuge2-0/+2
2020-02-25intel/tools: Add test for address register as sourceSagar Ghuge2-0/+2
2020-02-25intel/tools: Set correct address register file and number in i965_asmSagar Ghuge1-1/+3
2020-02-25intel/tools: Handle STATE_REG in typed source operandSagar Ghuge1-2/+4
2020-02-25intel/tools: Handle illegal instructionSagar Ghuge1-0/+10
2020-02-25anv: Always enable the data cacheJason Ekstrand3-10/+1
2020-02-25intel/aub_dump: stub the waits when overriding the deviceLionel Landwerlin1-0/+19
2020-02-25intel/tools/aub_dump: fix crash when using the default legacy contextLionel Landwerlin1-4/+5
2020-02-25intel/tools/aub_dump: move aub file initialization to maybe_init()Lionel Landwerlin1-38/+33
2020-02-25intel/isl: Add isl_aux_info.c to Makefile.sourcesJason Ekstrand1-0/+1
2020-02-25intel/blorp: Implement GEN:BUG:1605967699.Rafael Antognolli1-8/+44
2020-02-24nir, intel: Move use_scoped_memory_barrier to nir_optionsCaio Marcelo de Oliveira Filho2-2/+2
2020-02-24nir: Move intel's intrinsic_image_coordinate_components() to core nir.Eric Anholt1-22/+1
2020-02-24isl: Add a module which manages aux resolvesNanley Chery4-0/+702
2020-02-21anv: Add pipe_state_for_stage() helperCaio Marcelo de Oliveira Filho1-13/+24
2020-02-21anv: Use intel_debug_flag_for_shader_stage()Caio Marcelo de Oliveira Filho1-10/+1
2020-02-19intel/fs: Correctly handle multiply of fsign with a source modifierIan Romanick1-0/+10
2020-02-19anv: Drop anv_image.c:get_surface()Chad Versace1-10/+6
2020-02-19intel/compiler: Do not qsort zero sized arrayDanylo Piliaiev1-2/+4
2020-02-19brw_fs: Avoid zero size vlaDanylo Piliaiev1-1/+1
2020-02-19brw_nir: Cast bitshift to unsignedDanylo Piliaiev1-1/+1
2020-02-18intel/gen12: Take into account opcode when decoding SWSBCaio Marcelo de Oliveira Filho2-3/+7
2020-02-18anv: Advertise VK_KHR_shader_non_semantic_infoCaio Marcelo de Oliveira Filho1-0/+1
2020-02-14intel/fs/gen7+: Implement discard/demote for SIMD32 programs.Francisco Jerez2-8/+14
2020-02-14intel/fs: Return consistent UW types from sample_mask_reg() in fragment shaders.Francisco Jerez1-3/+2
2020-02-14intel/fs: Refactor predication on sample mask into helper function.Francisco Jerez1-34/+44
2020-02-14intel/fs/gen7+: Swap sample mask flag register and FIND_LIVE_CHANNEL temporary.Francisco Jerez4-13/+18
2020-02-14intel/fs: Use helper for discard sample mask flag subregister number.Francisco Jerez4-5/+16
2020-02-14intel/fs: Make sample_mask_reg() local to brw_fs.cpp and use it in more places.Francisco Jerez2-24/+28
2020-02-14intel/fs/gen11: Work around dual-source blending hangs in combination with SI...Francisco Jerez1-0/+12
2020-02-14intel/fs: Set src0 alpha present bit in header when provided in message payload.Francisco Jerez3-15/+6
2020-02-14intel/fs/gen12: Workaround data coherency issues due to broken NoMask control...Francisco Jerez1-34/+100