index
:
mesa/mesa
10.0
10.1
10.2
10.3
10.4
10.5
10.6
11.0
11.1
11.2
12.0
13.0
17.0
17.1
17.2
17.3
18.0
18.1
18.2
18.3
19.0
19.1
19.2
19.3
20.0
20.1
20.2
20.3
21.0
21.1
21.2
21.3
22.0
22.1
22.2
22.3
23.0
23.1
23.2
23.3
24.0
24.1
7.10
7.11
7.8
7.8-gles
7.9
8.0
9.0
9.1
9.2
a7xx-gmem
amber
elima/radv-video-encode-caps-maxbitrate
explicit-sync
main
powervr-mesa-next-wayland
review/fragment_shader_barycentric
staging/23.2
staging/23.3
staging/24.0
staging/24.1
uav-counter-meta
vk-no-nir-android
zink-stablefix
The Mesa 3D Graphics Library (mirrored from https://gitlab.freedesktop.org/mesa/mesa)
brianp
summary
refs
log
tree
commit
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committer
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path:
root
/
src
/
intel
/
genxml
Age
Commit message (
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)
Author
Files
Lines
2018-11-26
anv/icl: Set use full ways in L3CNTLREG
Anuj Phogat
1
-0
/
+1
2018-11-13
intel/genxml: Add engine definition to render engine instructions (gen11)
Toni Lönnberg
1
-116
/
+116
2018-11-13
intel/genxml: Add engine definition to render engine instructions (gen10)
Toni Lönnberg
1
-113
/
+113
2018-11-13
intel/genxml: Add engine definition to render engine instructions (gen9)
Toni Lönnberg
1
-117
/
+117
2018-11-13
intel/genxml: Add engine definition to render engine instructions (gen8)
Toni Lönnberg
1
-116
/
+116
2018-11-13
intel/genxml: Add engine definition to render engine instructions (gen75)
Toni Lönnberg
1
-107
/
+107
2018-11-13
intel/genxml: Add engine definition to render engine instructions (gen7)
Toni Lönnberg
1
-83
/
+83
2018-11-13
intel/genxml: Add engine definition to render engine instructions (gen6)
Toni Lönnberg
1
-54
/
+54
2018-11-13
intel/genxml: Add engine definition to render engine instructions (gen5)
Toni Lönnberg
1
-30
/
+30
2018-11-13
intel/genxml: Add engine definition to render engine instructions (gen45)
Toni Lönnberg
1
-27
/
+27
2018-11-13
intel/genxml: Add engine definition to render engine instructions (gen4)
Toni Lönnberg
1
-25
/
+25
2018-11-01
anv/icl: Set Error Detection Behavior Control Bit in L3CNTLREG
Anuj Phogat
1
-0
/
+1
2018-09-21
anv/icl: Set Enabled Texel Offset Precision Fix bit
Anuj Phogat
1
-0
/
+5
2018-09-07
intel/genxml: turn SLM Enable bit into boolean
Lionel Landwerlin
3
-3
/
+3
2018-08-24
intel: decoder: unify MI_BB_START field naming
Lionel Landwerlin
2
-6
/
+6
2018-08-21
anv/icl: Allow headerless sampler messages for pre-emptable contexts
Anuj Phogat
1
-0
/
+5
2018-08-21
intel/genxml: minor python style fix
Eric Engestrom
1
-1
/
+1
2018-08-16
intel: various python cleanups
Eric Engestrom
3
-17
/
+14
2018-08-10
meson: Build with Python 3
Mathieu Bridon
1
-3
/
+3
2018-08-01
python: Explicitly use byte strings
Mathieu Bridon
1
-2
/
+2
2018-08-01
python: Open file in binary mode
Mathieu Bridon
1
-1
/
+1
2018-08-01
python: Better get character ordinals
Mathieu Bridon
1
-2
/
+2
2018-07-24
python: Better iterate over dictionaries
Mathieu Bridon
1
-5
/
+5
2018-07-16
intel/batch_decoder: decoding of 3DSTATE_CONSTANT_BODY.
Sergii Romantsov
1
-24
/
+14
2018-06-18
intel/genxml: Add bitmasks for CS_DEBUG_MODE2/INSTPM.
Rafael Antognolli
7
-0
/
+32
2018-05-07
intel/genxml: Assert that genxml field start and ends are sane.
Kenneth Graunke
1
-0
/
+7
2018-05-07
intel/genxml: Fix some more fake booleans in genxml.
Kenneth Graunke
5
-11
/
+11
2018-05-07
intel/genxml: Make assert in gen_pack_header print a message.
Kenneth Graunke
1
-1
/
+1
2018-05-07
intel/genxml: Fix a few invalid field widths
Chris Wilson
6
-28
/
+28
2018-05-04
intel/genxml: recognize 0x, 0o and 0b when setting default value
Caio Marcelo de Oliveira Filho
1
-1
/
+2
2018-04-05
intel/genxml: Add Clear Color struct to gen10+.
Rafael Antognolli
2
-0
/
+18
2018-04-05
intel/genxml: Use a single field for clear color address on gen10.
Rafael Antognolli
2
-8
/
+6
2018-04-05
genxml: Preserve fields that share dword space with addresses.
Rafael Antognolli
1
-2
/
+6
2018-04-03
intel: genxml: decode variable length MI_LRI
Lionel Landwerlin
10
-0
/
+40
2018-04-03
intel: genxml: add preemption control instructions
Lionel Landwerlin
4
-0
/
+26
2018-03-26
intel/genxml: Add SAMPLER_INSTDONE register.
Rafael Antognolli
6
-0
/
+139
2018-03-26
intel/genxml: Add ROW_INSTDONE register.
Rafael Antognolli
6
-0
/
+114
2018-03-26
intel/genxml: Add SC_INSTDONE register.
Rafael Antognolli
6
-0
/
+140
2018-03-20
intel: genxml: add INSTPM/CS_DEBUG_MODE2 registers
Lionel Landwerlin
7
-0
/
+46
2018-03-05
intel: Drop SURFACE_FORMAT enum from genxml.
Kenneth Graunke
10
-2251
/
+17
2018-03-05
intel: Split gen_device_info out into libintel_dev
Jordan Justen
1
-1
/
+1
2018-03-02
genxml: Silence unused parameter warnings in generated pack code
Ian Romanick
1
-3
/
+11
2018-02-15
intel/genxml/icl: Update genx_bits header
Anuj Phogat
1
-0
/
+1
2018-02-15
intel/genxml/icl: Generate packing headers
Anuj Phogat
3
-0
/
+6
2018-02-15
intel/genxml/icl: Add gen11.xml
Anuj Phogat
1
-0
/
+3765
2018-01-11
meson: don't use intermediate variables that are immediately discarded
Dylan Baker
1
-2
/
+1
2018-01-09
genxml: Add missing INSTDONE_1 bits on Gen7.5+.
Kenneth Graunke
4
-0
/
+8
2018-01-09
intel: Apply Geminilake "Barrier Mode" workaround.
Kenneth Graunke
1
-0
/
+8
2017-11-23
genxml: fix assert guards
Eric Engestrom
1
-5
/
+5
2017-11-21
intel/genxml: Add helpers for determining field type
Kristian H. Kristensen
1
-6
/
+17
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