mesa/mesa - The Mesa 3D Graphics Library (mirrored from https://gitlab.freedesktop.org/mesa/mesa)

Age	Commit message (Expand)	Author	Files	Lines
2021-06-21	intel/gen125.xml: Drop GPGPU_WALKER	Jordan Justen	1	-29/+0
2021-05-05	intel/genxml: fix raster op fields on gen4/5	Dave Airlie	3	-3/+3
2021-05-05	intel/gemxml: move blitter command to render on gen4/5	Dave Airlie	3	-11/+11
2021-05-05	intel/genxml: rewrite the prefilterop xml to be more consistent.	Dave Airlie	11	-99/+99
2021-05-05	intel/genxml: align gen4/5 xml for store data immediate	Dave Airlie	3	-6/+3
2021-05-02	intel/genxml: Add coarse pixel shading instructions	Lionel Landwerlin	3	-0/+101
2021-04-20	intel: Rename gen_10 to ver_10	Anuj Phogat	1	-1/+1
2021-04-20	intel: Rename gen_device prefix to intel_device	Anuj Phogat	1	-1/+1
2021-04-20	intel: Rename gen_device prefix in filenames	Anuj Phogat	1	-1/+1
2021-04-15	intel: add L3 Bypass Disable to gen xml	Felix DeGrood	2	-0/+4
2021-04-02	intel: Rename GENx keyword to GFXx	Anuj Phogat	1	-1/+1
2021-04-02	intel: Rename Genx keyword to Gfxx	Anuj Phogat	3	-6/+6
2021-04-02	intel: Rename genx keyword to gfxx in source files	Anuj Phogat	1	-11/+11
2021-04-02	intel: Rename GENx prefix in macros to GFXx in source files	Anuj Phogat	3	-14/+14
2021-04-02	intel: Rename genx10 field in gen_device_info struct to verx10	Anuj Phogat	1	-1/+1
2021-04-02	intel: Rename GEN_GEN macro to GFX_VER	Anuj Phogat	1	-1/+1
2021-04-02	intel: Rename GEN_VERSIONx10 macro to GFX_VERx10	Anuj Phogat	2	-29/+29
2021-03-20	intel/genxml: Make BindingTablePoolEnable a bool	Jason Ekstrand	6	-6/+6
2021-03-20	intel/genxml: Binding table pointers are 15 bits on GFX version 12.5+	Jason Ekstrand	1	-5/+5
2021-03-20	intel/genxml: Add a partial GT_MODE definition for Gen11+.	Kenneth Graunke	2	-0/+16
2021-03-19	genxml/gen12: 3D_MODE bits 31:16 are no longer must-be-one	Jordan Justen	2	-2/+8
2021-03-16	intel: Remove GEN_IS_G4X macro	Anuj Phogat	1	-1/+0
2021-03-16	intel: Simplify version checks involving haswell	Anuj Phogat	1	-2/+2
2021-03-16	intel: Remove GEN_IS_HASWELL macro	Anuj Phogat	1	-3/+2
2021-03-15	genxml: Make 1-bit L3$ config register fields bool on Gen7	Jason Ekstrand	2	-14/+14
2021-03-12	anv,genxml: Handle L3SQCREG1_SQGHPCI in GenXML	Jason Ekstrand	2	-8/+21
2021-03-10	intel: Rename "gen_" prefix used in common code to "intel_"	Anuj Phogat	1	-4/+4
2021-03-08	genxml: Clean up MI_SET_PREDICATE	Jason Ekstrand	1	-5/+5
2021-03-08	intel/mi_builder: Add load/store_offest on GFX 12.5+	Jason Ekstrand	1	-0/+4
2021-03-08	intel/mi_builder: Added support for command streamer shift operations	Sagar Ghuge	1	-0/+3
2021-03-01	intel: Use devinfo genx10 field	Jordan Justen	1	-36/+12
2021-03-01	intel: Use GEN_VERSIONx10 in more places	Jordan Justen	2	-2/+1
2021-02-23	intel/genxml: Define 3DSTATE_SUBSLICE_HASH_TABLE command for Gen12 and Gen12.5.	Francisco Jerez	2	-0/+60
2021-02-23	intel/genxml: Fix pixel hashing 3DSTATE_3D_MODE field definitions for Gen12 a...	Francisco Jerez	2	-12/+4
2021-02-23	intel: Silence unused parameter warnings in files that include genX_pack.h	Ian Romanick	1	-1/+1
2021-02-18	genxml: Add PIPE_CONTROL protected memory bits	Lionel Landwerlin	2	-0/+4
2021-02-18	genxml: add MI_SET_APPID on Gen12+	Lionel Landwerlin	2	-0/+20
2021-02-02	genxml: PERFCNT registers are available since HSW	Lionel Landwerlin	1	-0/+18
2021-01-13	intel/genxml,anv,iris: Drop the legacy compute path from gen125.xml	Jason Ekstrand	1	-225/+1
2021-01-13	intel/genxml/gen125: Add CFE_STATE and COMPUTE_WALKER	Jordan Justen	1	-0/+154
2020-12-12	intel/genxml: Avoid generating identical 12.5 and 12 branches.	Vinson Lee	1	-0/+4
2020-12-01	intel/genxml: Build gen 12.5	Jordan Justen	4	-1/+13
2020-12-01	intel/genxml: Copy gen12.xml to gen125.xml	Jordan Justen	1	-0/+7340
2020-11-25	intel/genxml: Add BVH data structures	Jason Ekstrand	1	-0/+136
2020-11-25	intel/genxml: Add RT_DISPATCH_GLOBALS and RT_*_SBT_HANDLE structs	Jason Ekstrand	1	-0/+41
2020-11-25	intel/genxml: Support truncated addresses	Jason Ekstrand	1	-3/+22
2020-11-25	intel/genxml/pack: Stash the cloned address field	Jason Ekstrand	1	-1/+1
2020-11-25	intel/genxml: Add the BINDLESS_SHADER_RECORD data structure	Jason Ekstrand	2	-1/+12
2020-11-02	intel: remove dead code	Marcin Ślusarz	2	-4/+0
2020-10-29	intel/genxml: don't generate identical code for different branches	Marcin Ślusarz	1	-0/+8