index
:
mesa/mesa
10.0
10.1
10.2
10.3
10.4
10.5
10.6
11.0
11.1
11.2
12.0
13.0
17.0
17.1
17.2
17.3
18.0
18.1
18.2
18.3
19.0
19.1
19.2
19.3
20.0
20.1
20.2
20.3
21.0
21.1
21.2
21.3
22.0
22.1
22.2
22.3
23.0
23.1
23.2
23.3
24.0
24.1
7.10
7.11
7.8
7.8-gles
7.9
8.0
9.0
9.1
9.2
a7xx-gmem
amber
elima/radv-video-encode-caps-maxbitrate
explicit-sync
main
powervr-mesa-next-wayland
review/fragment_shader_barycentric
staging/23.2
staging/23.3
staging/24.0
staging/24.1
uav-counter-meta
vk-no-nir-android
zink-stablefix
The Mesa 3D Graphics Library (mirrored from https://gitlab.freedesktop.org/mesa/mesa)
brianp
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tree
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src
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intel
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compiler
Age
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Author
Files
Lines
2017-07-21
i965: Set lower_vote_trivial in vector_nir_options_gen6 too.
Kenneth Graunke
1
-0
/
+1
2017-07-20
i965/fs: Match destination type to size for ballot
Matt Turner
2
-2
/
+6
2017-07-20
nir: Reduce destination size of ballot intrinsic when possible
Matt Turner
1
-0
/
+1
2017-07-20
i965/fs: Implement ARB_shader_ballot operations
Matt Turner
3
-0
/
+48
2017-07-20
i965/fs: Do not move MOVs writing the flag outside of control flow
Matt Turner
1
-2
/
+4
2017-07-20
i965/fs: Handle explicit flag sources in flags_read()
Francisco Jerez
1
-4
/
+5
2017-07-20
nir: Add system values from ARB_shader_ballot
Matt Turner
2
-3
/
+3
2017-07-20
i965/fs: Implement ARB_shader_group_vote operations
Matt Turner
1
-0
/
+50
2017-07-20
i965/fs: Handle explicit flag destinations in flags_written()
Francisco Jerez
1
-4
/
+19
2017-07-20
i965/vec4: Lower ARB_shader_group_vote intrinsics
Matt Turner
1
-0
/
+1
2017-07-20
nir: Add pass to optimize intrinsics
Matt Turner
1
-0
/
+1
2017-07-13
i965: Use pushed UBO data in the scalar backend.
Kenneth Graunke
3
-1
/
+64
2017-07-13
i965: Factor out push locations.
Kenneth Graunke
2
-16
/
+25
2017-07-13
i965: Push UBO data, but don't use it just yet.
Kenneth Graunke
2
-1
/
+11
2017-07-13
i965: Select ranges of UBO data to be uploaded as push constants.
Kenneth Graunke
3
-0
/
+311
2017-07-13
i965: Switch to absolute addressing for constant buffer 0.
Kenneth Graunke
1
-0
/
+6
2017-07-13
intel/compiler: no need to check unsigned is >= 0
Lionel Landwerlin
1
-1
/
+1
2017-07-13
intel/compiler: don't check unsigned is >= 0
Lionel Landwerlin
1
-1
/
+1
2017-07-13
intel/compiler: remove check unsigned is >= 0
Lionel Landwerlin
1
-1
/
+1
2017-07-12
intel/compiler: Don't use opt_sampler_eot() optimization on gen10+
Anuj Phogat
1
-1
/
+1
2017-06-30
i965/i915: Add UYVY as the supported format
Johnson Lin
2
-0
/
+2
2017-06-20
intel: compiler/i965: fix is_broxton checks
Lionel Landwerlin
3
-4
/
+4
2017-06-09
i965/cnl: Make URB {VS, GS, HS, DS} sizes non multiple of 3
Anuj Phogat
4
-4
/
+33
2017-06-09
i965/cnl: Handle gen10 in switch cases across the driver
Anuj Phogat
2
-0
/
+3
2017-06-09
i965/cnl: Update few assertions
Anuj Phogat
1
-1
/
+1
2017-06-07
tree-wide: remove trailing backslash
Eric Engestrom
1
-1
/
+1
2017-06-05
i965: Change INTEL_DEBUG=vec4 to INTEL_SCALAR_VS for consistency.
Kenneth Graunke
1
-1
/
+1
2017-06-01
i965: Drop duplicate shadow variable.
Kenneth Graunke
1
-1
/
+0
2017-06-01
i965: Move SOL PSIZ hacks from draw time to link time.
Kenneth Graunke
1
-12
/
+1
2017-05-29
i965: Ignore INTEL_SCALAR_* debug variables on Gen10+.
Kenneth Graunke
1
-10
/
+16
2017-05-26
i965: Move clip program compilation to the compiler
Jason Ekstrand
8
-0
/
+2340
2017-05-26
i965: Move SF compilation to the compiler
Jason Ekstrand
3
-0
/
+931
2017-05-26
intel/compiler: Make brw_disasm take const assembly
Jason Ekstrand
3
-15
/
+15
2017-05-18
i965/vec4: load dvec3/4 uniforms first in the push constant buffer
Samuel Iglesias Gonsálvez
1
-27
/
+80
2017-05-18
i965/vec4: fix swizzle and writemask when loading an uniform with constant of...
Samuel Iglesias Gonsálvez
1
-4
/
+11
2017-05-18
i965/vec4/gs: restore the uniform values which was overwritten by failed vec4...
Samuel Iglesias Gonsálvez
1
-0
/
+26
2017-05-16
i965: Fix test_eu_validate.cpp
Matt Turner
1
-1
/
+1
2017-05-15
i965: Add a weak no-op nir_print_instr() symbol
Matt Turner
1
-0
/
+2
2017-05-15
i965: Allow brw_eu_validate to handle compact instructions
Matt Turner
1
-2
/
+15
2017-05-15
i965: Pass pointer and end of assembly to brw_validate_instructions
Matt Turner
5
-11
/
+22
2017-05-09
i965/vec4: Delete the system value infastructure
Jason Ekstrand
11
-137
/
+5
2017-05-09
i965/vec4: Use NIR to do GS input remapping
Jason Ekstrand
9
-101
/
+59
2017-05-09
i965/fs: Move remapping of gl_PointSize to the NIR level
Jason Ekstrand
2
-26
/
+21
2017-05-09
i965/nir: Inline remap_inputs_with_vue_map
Jason Ekstrand
1
-27
/
+22
2017-05-09
i965/vec4: Use NIR remapping for VS attributes
Jason Ekstrand
6
-121
/
+34
2017-05-09
intel/compiler/vs: Move inputs_read handling to generic code
Jason Ekstrand
1
-0
/
+3
2017-05-09
i965/vec4: Set VERT_BIT_EDGEFLAG based on the VUE map
Jason Ekstrand
1
-0
/
+11
2017-05-09
i965/fs: Lower gl_VertexID and friends to inputs at the NIR level
Jason Ekstrand
4
-70
/
+74
2017-05-09
i965/vs: Set uses_vertexid and friends from brw_compile_vs
Jason Ekstrand
3
-11
/
+17
2017-05-09
i965: Move multiply by 4 for VS ATTR setup into the scalar backend.
Jason Ekstrand
2
-2
/
+2
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