| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2017-06-20 | i965/cnl: Add l3 configuration for Cannonlake | Ben Widawsky | 1 | -1/+20 |
| 2017-06-20 | i965: Add a variable for way size per bank in get_l3_way_size() | Anuj Phogat | 1 | -5/+4 |
| 2017-06-20 | i965: Fix broxton 2x6 l3 config | Anuj Phogat | 1 | -0/+16 |
| 2017-06-09 | i965/cnl: Handle gen10 in switch cases across the driver | Anuj Phogat | 1 | -0/+1 |
| 2017-06-06 | intel: Fix broxton 2x6 way size computation | Anuj Phogat | 1 | -0/+4 |
| 2017-06-02 | i965: Simplify l3 way size computations | Anuj Phogat | 1 | -10/+2 |
| 2016-10-05 | i965/l3: Add explicit way size calculation for bxt | Ben Widawsky | 1 | -1/+3 |
| 2016-09-03 | intel: Pull the guts of gen7_l3_state.c into a shared helper | Jason Ekstrand | 1 | -0/+304 |
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index : mesa/mesa | |
| The Mesa 3D Graphics Library (mirrored from https://gitlab.freedesktop.org/mesa/mesa) | brianp |
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