Age | Commit message (Expand) | Author | Files | Lines |
2018-03-20 | gallium: add packed uniform CAP | Timothy Arceri | 1 | -0/+1 |
2018-03-14 | nv50,nvc0: Support BGRX1010102 and RGBX1010102 for sampling. | Mario Kleiner | 1 | -0/+2 |
2018-02-22 | nv50,nvc0: fix integer MS resolves using 2d engine | Ilia Mirkin | 1 | -1/+2 |
2018-02-22 | nv50,nvc0: fix clear buffer acceleration | Ilia Mirkin | 1 | -12/+8 |
2018-02-19 | nv50,nvc0: mark ABGR format as displayable instead of ARGB format | Ilia Mirkin | 1 | -2/+2 |
2018-02-17 | gallium: allow drivers to impose BO flags restrictions on constant buffer 0 | Marek Olšák | 1 | -0/+1 |
2018-02-14 | gallium: drop all the guard band float caps. | Dave Airlie | 1 | -6/+0 |
2018-01-30 | gallium: introduce PIPE_CAP_FENCE_SIGNAL v2 | Andres Rodriguez | 1 | -0/+1 |
2018-01-17 | gallium: remove PIPE_CAP_USER_CONSTANT_BUFFERS | Marek Olšák | 1 | -1/+0 |
2018-01-17 | gallium: remove PIPE_CAP_TEXTURE_SHADOW_MAP | Marek Olšák | 1 | -1/+0 |
2018-01-17 | gallium: remove PIPE_CAP_TWO_SIDED_STENCIL | Marek Olšák | 1 | -1/+0 |
2018-01-07 | nvc0: add support for bindless textures on kepler+ | Ilia Mirkin | 1 | -0/+1 |
2017-12-29 | nv50: Fix unused var warning in release build | Rhys Kidd | 1 | -1/+2 |
2017-12-19 | gallium: plumb context priority through to driver | Rob Clark | 1 | -0/+1 |
2017-11-26 | nouveau/compiler: Allow to omit line numbers when printing instructions | Tobias Klausmann | 1 | -0/+1 |
2017-11-10 | gallium: add CAPs to support HW atomic counters. (v3) | Dave Airlie | 1 | -0/+2 |
2017-11-08 | nv50: make blending work so that zero wins in a multiplication | Ilia Mirkin | 1 | -0/+5 |
2017-11-06 | gallium: add PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET | Marek Olšák | 1 | -0/+1 |
2017-11-04 | nv50,nvc0: Display shared memory usage in pipe_debug_message | Pierre Moreau | 1 | -3/+4 |
2017-11-04 | nv50,nvc0: Copy shared memory per block to the program info structure and back | Pierre Moreau | 1 | -0/+2 |
2017-11-01 | gallium: add cap for driver specified max combined shader resources. | Dave Airlie | 1 | -0/+1 |
2017-10-11 | nv50,nvc0: fix push hint logic in presence of a start offset | Ilia Mirkin | 1 | -2/+1 |
2017-10-10 | gallium: Create a new PIPE_CAP_TILE_RASTER_ORDER for vc4. | Eric Anholt | 1 | -0/+1 |
2017-10-06 | gallium: add PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS | Marek Olšák | 1 | -0/+1 |
2017-09-29 | gallium: add LDEXP TGSI instruction and corresponding cap | Nicolai Hähnle | 1 | -0/+1 |
2017-09-21 | gallium: Add PIPE_SHADER_CAP_INT64_ATOMICS | Jan Vesely | 1 | -0/+1 |
2017-09-18 | gallium: Add PIPE_SHADER_CAP_FP16 | Jan Vesely | 1 | -0/+1 |
2017-09-18 | gallium: add PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE | Nicolai Hähnle | 2 | -0/+5 |
2017-09-15 | gallium: introduce PIPE_CAP_LOAD_CONSTBUF | Timothy Arceri | 1 | -0/+1 |
2017-08-03 | gallium: introduce PIPE_CAP_MEMOBJ | Timothy Arceri | 1 | -0/+1 |
2017-08-02 | gallium: add PIPE_QUERY_SO_OVERFLOW_ANY_PREDICATE and corresponding cap | Nicolai Hähnle | 1 | -0/+1 |
2017-07-31 | gallium: add PIPE_CAP_NIR_SAMPLERS_AS_DEREF | Nicolai Hähnle | 1 | -0/+1 |
2017-06-26 | nv50,nvc0: remove IDX from bufctx immediately, to avoid conflicts with clear | Ilia Mirkin | 1 | -4/+5 |
2017-06-14 | gallium: add PIPE_CAP_BINDLESS_TEXTURE | Samuel Pitoiset | 1 | -0/+1 |
2017-06-07 | util: Port nir_array functionality to u_dynarray | Thomas Helland | 1 | -1/+1 |
2017-06-02 | gallium: Add a cap to check if the driver supports ARB_post_depth_coverage | Lyude | 1 | -0/+1 |
2017-05-20 | nv50,nvc0: clear index buffer bufctx bin unconditionally | Ilia Mirkin | 1 | -3/+2 |
2017-05-20 | nv50: fix vtxbuf cleanup | Ilia Mirkin | 1 | -1/+1 |
2017-05-17 | gallium: add PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION | Marek Olšák | 1 | -0/+1 |
2017-05-10 | gallium: add PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX | Marek Olšák | 1 | -0/+1 |
2017-05-10 | gallium: remove pipe_index_buffer and set_index_buffer | Marek Olšák | 5 | -57/+24 |
2017-05-10 | gallium: decrease the size of pipe_vertex_buffer - 24 -> 16 bytes | Marek Olšák | 4 | -19/+20 |
2017-05-07 | nv50/ir: Replace NV50_PROGRAM_IR_* by PIPE_SHADER_IR_* | Pierre Moreau | 1 | -1/+3 |
2017-04-26 | nv50,nvc0: disable the TGSI merge registers pass | Samuel Pitoiset | 1 | -1/+2 |
2017-04-26 | gallium: add PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS | Samuel Pitoiset | 1 | -0/+1 |
2017-04-14 | gallium: add PIPE_CAP_TGSI_TES_LAYER_VIEWPORT | Nicolai Hähnle | 1 | -0/+1 |
2017-04-09 | nouveau: enable ARB_shader_clock on nv50 and nvc0 | Boyan Ding | 1 | -1/+1 |
2017-04-05 | gallium: add PIPE_CAP_TGSI_BALLOT | Nicolai Hähnle | 1 | -0/+1 |
2017-04-05 | gallium: add sparse buffer interface and capability | Nicolai Hähnle | 1 | -0/+1 |
2017-04-02 | nv50: don't assume a rast is set when validating for clears | Ilia Mirkin | 2 | -3/+7 |