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path: root/src/gallium/drivers/nouveau/nv50
AgeCommit message (Expand)AuthorFilesLines
2018-03-20gallium: add packed uniform CAPTimothy Arceri1-0/+1
2018-03-14nv50,nvc0: Support BGRX1010102 and RGBX1010102 for sampling.Mario Kleiner1-0/+2
2018-02-22nv50,nvc0: fix integer MS resolves using 2d engineIlia Mirkin1-1/+2
2018-02-22nv50,nvc0: fix clear buffer accelerationIlia Mirkin1-12/+8
2018-02-19nv50,nvc0: mark ABGR format as displayable instead of ARGB formatIlia Mirkin1-2/+2
2018-02-17gallium: allow drivers to impose BO flags restrictions on constant buffer 0Marek Olšák1-0/+1
2018-02-14gallium: drop all the guard band float caps.Dave Airlie1-6/+0
2018-01-30gallium: introduce PIPE_CAP_FENCE_SIGNAL v2Andres Rodriguez1-0/+1
2018-01-17gallium: remove PIPE_CAP_USER_CONSTANT_BUFFERSMarek Olšák1-1/+0
2018-01-17gallium: remove PIPE_CAP_TEXTURE_SHADOW_MAPMarek Olšák1-1/+0
2018-01-17gallium: remove PIPE_CAP_TWO_SIDED_STENCILMarek Olšák1-1/+0
2018-01-07nvc0: add support for bindless textures on kepler+Ilia Mirkin1-0/+1
2017-12-29nv50: Fix unused var warning in release buildRhys Kidd1-1/+2
2017-12-19gallium: plumb context priority through to driverRob Clark1-0/+1
2017-11-26nouveau/compiler: Allow to omit line numbers when printing instructionsTobias Klausmann1-0/+1
2017-11-10gallium: add CAPs to support HW atomic counters. (v3)Dave Airlie1-0/+2
2017-11-08nv50: make blending work so that zero wins in a multiplicationIlia Mirkin1-0/+5
2017-11-06gallium: add PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSETMarek Olšák1-0/+1
2017-11-04nv50,nvc0: Display shared memory usage in pipe_debug_messagePierre Moreau1-3/+4
2017-11-04nv50,nvc0: Copy shared memory per block to the program info structure and backPierre Moreau1-0/+2
2017-11-01gallium: add cap for driver specified max combined shader resources.Dave Airlie1-0/+1
2017-10-11nv50,nvc0: fix push hint logic in presence of a start offsetIlia Mirkin1-2/+1
2017-10-10gallium: Create a new PIPE_CAP_TILE_RASTER_ORDER for vc4.Eric Anholt1-0/+1
2017-10-06gallium: add PIPE_CAP_TGSI_ANY_REG_AS_ADDRESSMarek Olšák1-0/+1
2017-09-29gallium: add LDEXP TGSI instruction and corresponding capNicolai Hähnle1-0/+1
2017-09-21gallium: Add PIPE_SHADER_CAP_INT64_ATOMICSJan Vesely1-0/+1
2017-09-18gallium: Add PIPE_SHADER_CAP_FP16Jan Vesely1-0/+1
2017-09-18gallium: add PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVENicolai Hähnle2-0/+5
2017-09-15gallium: introduce PIPE_CAP_LOAD_CONSTBUFTimothy Arceri1-0/+1
2017-08-03gallium: introduce PIPE_CAP_MEMOBJTimothy Arceri1-0/+1
2017-08-02gallium: add PIPE_QUERY_SO_OVERFLOW_ANY_PREDICATE and corresponding capNicolai Hähnle1-0/+1
2017-07-31gallium: add PIPE_CAP_NIR_SAMPLERS_AS_DEREFNicolai Hähnle1-0/+1
2017-06-26nv50,nvc0: remove IDX from bufctx immediately, to avoid conflicts with clearIlia Mirkin1-4/+5
2017-06-14gallium: add PIPE_CAP_BINDLESS_TEXTURESamuel Pitoiset1-0/+1
2017-06-07util: Port nir_array functionality to u_dynarrayThomas Helland1-1/+1
2017-06-02gallium: Add a cap to check if the driver supports ARB_post_depth_coverageLyude1-0/+1
2017-05-20nv50,nvc0: clear index buffer bufctx bin unconditionallyIlia Mirkin1-3/+2
2017-05-20nv50: fix vtxbuf cleanupIlia Mirkin1-1/+1
2017-05-17gallium: add PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTIONMarek Olšák1-0/+1
2017-05-10gallium: add PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEXMarek Olšák1-0/+1
2017-05-10gallium: remove pipe_index_buffer and set_index_bufferMarek Olšák5-57/+24
2017-05-10gallium: decrease the size of pipe_vertex_buffer - 24 -> 16 bytesMarek Olšák4-19/+20
2017-05-07nv50/ir: Replace NV50_PROGRAM_IR_* by PIPE_SHADER_IR_*Pierre Moreau1-1/+3
2017-04-26nv50,nvc0: disable the TGSI merge registers passSamuel Pitoiset1-1/+2
2017-04-26gallium: add PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERSSamuel Pitoiset1-0/+1
2017-04-14gallium: add PIPE_CAP_TGSI_TES_LAYER_VIEWPORTNicolai Hähnle1-0/+1
2017-04-09nouveau: enable ARB_shader_clock on nv50 and nvc0Boyan Ding1-1/+1
2017-04-05gallium: add PIPE_CAP_TGSI_BALLOTNicolai Hähnle1-0/+1
2017-04-05gallium: add sparse buffer interface and capabilityNicolai Hähnle1-0/+1
2017-04-02nv50: don't assume a rast is set when validating for clearsIlia Mirkin2-3/+7