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path: root/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
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Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_wm_surface_state.c')
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm_surface_state.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index ddf38e3dd35..82e44f9b83a 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -551,6 +551,11 @@ brw_init_surface_formats(struct brw_context *brw)
ctx->TextureFormatSupported[MESA_FORMAT_Z32_FLOAT] = true;
ctx->TextureFormatSupported[MESA_FORMAT_Z32_FLOAT_X24S8] = true;
ctx->TextureFormatSupported[MESA_FORMAT_Z16] = true;
+
+ /* On hardware that lacks support for ETC1, we map ETC1 to RGBX
+ * during glCompressedTexImage2D(). See intel_mipmap_tree::wraps_etc1.
+ */
+ ctx->TextureFormatSupported[MESA_FORMAT_ETC1_RGB8] = true;
}
bool