diff options
Diffstat (limited to 'src/gallium/drivers/freedreno/a4xx/fd4_texture.c')
-rw-r--r-- | src/gallium/drivers/freedreno/a4xx/fd4_texture.c | 90 |
1 files changed, 60 insertions, 30 deletions
diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_texture.c b/src/gallium/drivers/freedreno/a4xx/fd4_texture.c index 49b350665dd..14310b02cf9 100644 --- a/src/gallium/drivers/freedreno/a4xx/fd4_texture.c +++ b/src/gallium/drivers/freedreno/a4xx/fd4_texture.c @@ -96,6 +96,7 @@ fd4_sampler_state_create(struct pipe_context *pctx, A4XX_TEX_SAMP_0_XY_MAG(tex_filter(cso->mag_img_filter, aniso)) | A4XX_TEX_SAMP_0_XY_MIN(tex_filter(cso->min_img_filter, aniso)) | A4XX_TEX_SAMP_0_ANISO(aniso) | + A4XX_TEX_SAMP_0_LOD_BIAS(cso->lod_bias) | A4XX_TEX_SAMP_0_WRAP_S(tex_clamp(cso->wrap_s, &so->needs_border)) | A4XX_TEX_SAMP_0_WRAP_T(tex_clamp(cso->wrap_t, &so->needs_border)) | A4XX_TEX_SAMP_0_WRAP_R(tex_clamp(cso->wrap_r, &so->needs_border)); @@ -103,12 +104,18 @@ fd4_sampler_state_create(struct pipe_context *pctx, so->texsamp1 = // COND(miplinear, A4XX_TEX_SAMP_1_MIPFILTER_LINEAR_FAR) | COND(!cso->seamless_cube_map, A4XX_TEX_SAMP_1_CUBEMAPSEAMLESSFILTOFF) | - COND(!cso->normalized_coords, A4XX_TEX_SAMP_1_UNNORM_COORDS); + COND(cso->unnormalized_coords, A4XX_TEX_SAMP_1_UNNORM_COORDS); if (cso->min_mip_filter != PIPE_TEX_MIPFILTER_NONE) { - so->texsamp0 |= A4XX_TEX_SAMP_0_LOD_BIAS(cso->lod_bias); so->texsamp1 |= A4XX_TEX_SAMP_1_MIN_LOD(cso->min_lod) | A4XX_TEX_SAMP_1_MAX_LOD(cso->max_lod); + } else { + /* If we're not doing mipmap filtering, we still need a slightly > 0 + * LOD clamp so the HW can decide between min and mag filtering of + * level 0. + */ + so->texsamp1 |= A4XX_TEX_SAMP_1_MIN_LOD(MIN2(cso->min_lod, 0.125f)) | + A4XX_TEX_SAMP_1_MAX_LOD(MIN2(cso->max_lod, 0.125f)); } if (cso->compare_mode) @@ -118,28 +125,6 @@ fd4_sampler_state_create(struct pipe_context *pctx, return so; } -static enum a4xx_tex_type -tex_type(unsigned target) -{ - switch (target) { - default: - assert(0); - case PIPE_BUFFER: - case PIPE_TEXTURE_1D: - case PIPE_TEXTURE_1D_ARRAY: - return A4XX_TEX_1D; - case PIPE_TEXTURE_RECT: - case PIPE_TEXTURE_2D: - case PIPE_TEXTURE_2D_ARRAY: - return A4XX_TEX_2D; - case PIPE_TEXTURE_3D: - return A4XX_TEX_3D; - case PIPE_TEXTURE_CUBE: - case PIPE_TEXTURE_CUBE_ARRAY: - return A4XX_TEX_CUBE; - } -} - static bool use_astc_srgb_workaround(struct pipe_context *pctx, enum pipe_format format) { @@ -170,10 +155,12 @@ fd4_sampler_view_create(struct pipe_context *pctx, struct pipe_resource *prsc, so->base.reference.count = 1; so->base.context = pctx; - so->texconst0 = A4XX_TEX_CONST_0_TYPE(tex_type(cso->target)) | + so->swizzle = fd4_tex_swiz(format, cso->swizzle_r, cso->swizzle_g, + cso->swizzle_b, cso->swizzle_a); + + so->texconst0 = A4XX_TEX_CONST_0_TYPE(fd4_tex_type(cso->target)) | A4XX_TEX_CONST_0_FMT(fd4_pipe2tex(format)) | - fd4_tex_swiz(format, cso->swizzle_r, cso->swizzle_g, - cso->swizzle_b, cso->swizzle_a); + so->swizzle; if (util_format_is_srgb(format)) { if (use_astc_srgb_workaround(pctx, format)) @@ -186,8 +173,9 @@ fd4_sampler_view_create(struct pipe_context *pctx, struct pipe_resource *prsc, lvl = 0; so->texconst1 = - A4XX_TEX_CONST_1_WIDTH(elements) | A4XX_TEX_CONST_1_HEIGHT(1); - so->texconst2 = A4XX_TEX_CONST_2_PITCH(elements * rsc->layout.cpp); + A4XX_TEX_CONST_1_WIDTH(elements & MASK(15)) | + A4XX_TEX_CONST_1_HEIGHT(elements >> 15); + so->texconst2 = A4XX_TEX_CONST_2_BUFFER; so->offset = cso->u.buf.offset; } else { unsigned miplevels; @@ -252,23 +240,65 @@ fd4_set_sampler_views(struct pipe_context *pctx, enum pipe_shader_type shader, struct fd_context *ctx = fd_context(pctx); struct fd4_context *fd4_ctx = fd4_context(ctx); uint16_t astc_srgb = 0; + uint16_t *sampler_swizzles; unsigned i; + if (shader == PIPE_SHADER_FRAGMENT) { + sampler_swizzles = fd4_ctx->fsampler_swizzles; + } else if (shader == PIPE_SHADER_VERTEX) { + sampler_swizzles = fd4_ctx->vsampler_swizzles; + } else if (shader == PIPE_SHADER_COMPUTE) { + sampler_swizzles = fd4_ctx->csampler_swizzles; + } else { + assert(0); + sampler_swizzles = fd4_ctx->csampler_swizzles; + } + for (i = 0; i < nr; i++) { if (views[i]) { struct fd4_pipe_sampler_view *view = fd4_pipe_sampler_view(views[i]); if (view->astc_srgb) - astc_srgb |= (1 << i); + astc_srgb |= (1 << (start + i)); + sampler_swizzles[start + i] = view->swizzle >> 4; + + const struct util_format_description *desc = + util_format_description(view->base.format); + int c = util_format_get_first_non_void_channel(desc->format); + if (c >= 0 && desc->channel[c].pure_integer) { + switch (desc->channel[c].size) { + case 8: + sampler_swizzles[start + i] |= 0x1000; + break; + case 16: + sampler_swizzles[start + i] |= 0x2000; + break; + case 32: + sampler_swizzles[start + i] |= 0x3000; + break; + case 10: + sampler_swizzles[start + i] |= 0x4000; + break; + default: + assert(0); + } + } } } fd_set_sampler_views(pctx, shader, start, nr, unbind_num_trailing_slots, take_ownership, views); + for (i = 0; i < unbind_num_trailing_slots; i++) { + astc_srgb &= ~(1 << (start + nr + i)); + sampler_swizzles[start + nr + i] = 0x688; + } + if (shader == PIPE_SHADER_FRAGMENT) { fd4_ctx->fastc_srgb = astc_srgb; } else if (shader == PIPE_SHADER_VERTEX) { fd4_ctx->vastc_srgb = astc_srgb; + } else if (shader == PIPE_SHADER_COMPUTE) { + fd4_ctx->castc_srgb = astc_srgb; } } |