diff options
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_context.h | 1 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 3 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 7 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/gen8_surface_state.c | 7 |
4 files changed, 12 insertions, 6 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h index b45ee5eb69d..c11a3580248 100644 --- a/src/mesa/drivers/dri/i965/brw_context.h +++ b/src/mesa/drivers/dri/i965/brw_context.h @@ -738,6 +738,7 @@ struct brw_context unsigned format, unsigned swizzle, uint32_t *surf_offset, + int surf_index, bool rw, bool for_gather); void (*emit_buffer_surface_state)(struct brw_context *brw, uint32_t *out_offset, diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c index f1b8fc4c84d..218afab6457 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c @@ -1326,13 +1326,14 @@ update_image_surface(struct brw_context *brw, const GLenum target = (obj->Target == GL_TEXTURE_CUBE_MAP || obj->Target == GL_TEXTURE_CUBE_MAP_ARRAY ? GL_TEXTURE_2D_ARRAY : obj->Target); + const int surf_index = surf_offset - &brw->wm.base.surf_offset[0]; brw->vtbl.emit_texture_surface_state( brw, mt, target, min_layer, min_layer + num_layers, min_level, min_level + 1, format, SWIZZLE_XYZW, - surf_offset, access != GL_READ_ONLY, false); + surf_offset, surf_index, access != GL_READ_ONLY, false); } update_texture_image_param(brw, u, surface_idx, param); diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c index 79182560a3d..74389525a19 100644 --- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c +++ b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c @@ -273,6 +273,7 @@ gen7_emit_texture_surface_state(struct brw_context *brw, unsigned format, unsigned swizzle, uint32_t *surf_offset, + int surf_index /* unused */, bool rw, bool for_gather) { const unsigned depth = max_layer - min_layer; @@ -387,12 +388,14 @@ gen7_update_texture_surface(struct gl_context *ctx, if (for_gather && format == BRW_SURFACEFORMAT_R32G32_FLOAT) format = BRW_SURFACEFORMAT_R32G32_FLOAT_LD; + const int surf_index = surf_offset - &brw->wm.base.surf_offset[0]; + gen7_emit_texture_surface_state(brw, mt, obj->Target, obj->MinLayer, obj->MinLayer + depth, obj->MinLevel + obj->BaseLevel, obj->MinLevel + intel_obj->_MaxLevel + 1, - format, swizzle, - surf_offset, false, for_gather); + format, swizzle, surf_offset, + surf_index, false, for_gather); } } diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c b/src/mesa/drivers/dri/i965/gen8_surface_state.c index 5ca11d58e0c..5161d2b34a8 100644 --- a/src/mesa/drivers/dri/i965/gen8_surface_state.c +++ b/src/mesa/drivers/dri/i965/gen8_surface_state.c @@ -228,13 +228,12 @@ gen8_emit_texture_surface_state(struct brw_context *brw, unsigned min_level, unsigned max_level, unsigned format, unsigned swizzle, - uint32_t *surf_offset, + uint32_t *surf_offset, int surf_index, bool rw, bool for_gather) { const unsigned depth = max_layer - min_layer; struct intel_mipmap_tree *aux_mt = mt->mcs_mt; uint32_t mocs_wb = brw->gen >= 9 ? SKL_MOCS_WB : BDW_MOCS_WB; - int surf_index = surf_offset - &brw->wm.base.surf_offset[0]; unsigned tiling_mode, pitch; const unsigned tr_mode = surface_tiling_resource_mode(mt->tr_mode); const uint32_t surf_type = translate_tex_target(target); @@ -383,12 +382,14 @@ gen8_update_texture_surface(struct gl_context *ctx, format = BRW_SURFACEFORMAT_R8_UINT; } + const int surf_index = surf_offset - &brw->wm.base.surf_offset[0]; + gen8_emit_texture_surface_state(brw, mt, obj->Target, obj->MinLayer, obj->MinLayer + depth, obj->MinLevel + obj->BaseLevel, obj->MinLevel + intel_obj->_MaxLevel + 1, format, swizzle, surf_offset, - false, for_gather); + surf_index, false, for_gather); } } |