diff options
author | Jason Ekstrand <jason.ekstrand@intel.com> | 2016-04-21 16:39:56 -0700 |
---|---|---|
committer | Jason Ekstrand <jason.ekstrand@intel.com> | 2016-04-26 14:55:22 -0700 |
commit | b6dd8e42f09d98a536a38c33383238ec3595d066 (patch) | |
tree | 26ef417d61353d02bc64acc85fa3daf610606ad8 /src/mesa/drivers/dri/i965/gen7_blorp.cpp | |
parent | a543f741bf33e4632d4d43b797bdcd0e04c7983f (diff) |
i965/blorp: Turn blorp_surface_info into a C-style struct
This commit is mostly mechanical except that it changes where we set the
swizzle. Previously, the blorp_surface_info constructor defaulted the
swizzle to SWIZZLE_XYZW. Now, we memset to zero and fill out the swizzle
when we setup the rest of the struct.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Diffstat (limited to 'src/mesa/drivers/dri/i965/gen7_blorp.cpp')
-rw-r--r-- | src/mesa/drivers/dri/i965/gen7_blorp.cpp | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/mesa/drivers/dri/i965/gen7_blorp.cpp b/src/mesa/drivers/dri/i965/gen7_blorp.cpp index df8b4e51635..568a22f2c42 100644 --- a/src/mesa/drivers/dri/i965/gen7_blorp.cpp +++ b/src/mesa/drivers/dri/i965/gen7_blorp.cpp @@ -160,7 +160,7 @@ gen7_blorp_emit_depth_stencil_state_pointers(struct brw_context *brw, */ static uint32_t gen7_blorp_emit_surface_state(struct brw_context *brw, - const brw_blorp_surface_info *surface, + const struct brw_blorp_surface_info *surface, uint32_t read_domains, uint32_t write_domain, bool is_render_target) { @@ -198,8 +198,8 @@ gen7_blorp_emit_surface_state(struct brw_context *brw, surf[0] |= GEN7_SURFACE_ARYSPC_FULL; /* reloc */ - surf[1] = - surface->compute_tile_offsets(&tile_x, &tile_y) + mt->bo->offset64; + surf[1] = brw_blorp_compute_tile_offsets(surface, &tile_x, &tile_y) + + mt->bo->offset64; /* Note that the low bits of these fields are missing, so * there's the possibility of getting in trouble. |