diff options
| author | Anuj Phogat <anuj.phogat@gmail.com> | 2021-04-05 13:19:39 -0700 |
|---|---|---|
| committer | Marge Bot <eric+marge@anholt.net> | 2021-04-20 20:06:33 +0000 |
| commit | 61e8636557f7459f4adeb230016362b63ab1ce7f (patch) | |
| tree | 74794f4aef2e3b1d43b6a26b548c7aa1cbb1d6ca /src/mesa/drivers/dri/i965/brw_state_upload.c | |
| parent | cd39d3b1adcbe383ebd9b3f80d4a30eee0ab4c2f (diff) | |
intel: Rename gen_device prefix to intel_device
export SEARCH_PATH="src/intel src/gallium/drivers/iris src/mesa/drivers/dri/i965"
grep -E "gen_device" -rIl $SEARCH_PATH | xargs sed -ie "s/gen_device/intel_device/g"
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10241>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_state_upload.c')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_state_upload.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c index 8f1562c7eea..c8fb42f56bc 100644 --- a/src/mesa/drivers/dri/i965/brw_state_upload.c +++ b/src/mesa/drivers/dri/i965/brw_state_upload.c @@ -49,7 +49,7 @@ void brw_enable_obj_preemption(struct brw_context *brw, bool enable) { - ASSERTED const struct gen_device_info *devinfo = &brw->screen->devinfo; + ASSERTED const struct intel_device_info *devinfo = &brw->screen->devinfo; assert(devinfo->ver >= 9); if (enable == brw->object_preemption) @@ -71,7 +71,7 @@ brw_enable_obj_preemption(struct brw_context *brw, bool enable) static void brw_upload_gfx11_slice_hashing_state(struct brw_context *brw) { - const struct gen_device_info *devinfo = &brw->screen->devinfo; + const struct intel_device_info *devinfo = &brw->screen->devinfo; int subslices_delta = devinfo->ppipe_subslices[0] - devinfo->ppipe_subslices[1]; if (subslices_delta == 0) @@ -151,7 +151,7 @@ brw_upload_gfx11_slice_hashing_state(struct brw_context *brw) static void brw_upload_initial_gpu_state(struct brw_context *brw) { - const struct gen_device_info *devinfo = &brw->screen->devinfo; + const struct intel_device_info *devinfo = &brw->screen->devinfo; const struct brw_compiler *compiler = brw->screen->compiler; /* On platforms with hardware contexts, we can set our initial GPU state @@ -302,7 +302,7 @@ brw_copy_pipeline_atoms(struct brw_context *brw, void brw_init_state( struct brw_context *brw ) { struct gl_context *ctx = &brw->ctx; - const struct gen_device_info *devinfo = &brw->screen->devinfo; + const struct intel_device_info *devinfo = &brw->screen->devinfo; /* Force the first brw_select_pipeline to emit pipeline select */ brw->last_pipeline = BRW_NUM_PIPELINES; @@ -527,7 +527,7 @@ brw_upload_programs(struct brw_context *brw, enum brw_pipeline pipeline) { struct gl_context *ctx = &brw->ctx; - const struct gen_device_info *devinfo = &brw->screen->devinfo; + const struct intel_device_info *devinfo = &brw->screen->devinfo; if (pipeline == BRW_RENDER_PIPELINE) { brw_upload_vs_prog(brw); @@ -606,7 +606,7 @@ static inline void brw_upload_pipeline_state(struct brw_context *brw, enum brw_pipeline pipeline) { - const struct gen_device_info *devinfo = &brw->screen->devinfo; + const struct intel_device_info *devinfo = &brw->screen->devinfo; struct gl_context *ctx = &brw->ctx; int i; static int dirty_count = 0; |