diff options
| author | Francisco Jerez <currojerez@riseup.net> | 2016-08-12 11:38:29 -0700 |
|---|---|---|
| committer | Francisco Jerez <currojerez@riseup.net> | 2016-08-16 16:31:59 -0700 |
| commit | 0c754d1c4203d87dbb9d2dd882ef42686e6d01ec (patch) | |
| tree | fb4e5a554aa2fbf2a5263c00b9b348376e379d29 /src/mesa/drivers/dri/i965/brw_fs.cpp | |
| parent | 5def00875de4f0895e22de94cba29131a26c0430 (diff) | |
i965/fs: Lower TEX to TXL during NIR translation.
This simplifies the code slightly and will allow the SIMD lowering
pass to find out easily what the actual texturing opcode is in order
to determine the maximum execution size of texturing instructions.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_fs.cpp')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs.cpp | 10 |
1 files changed, 0 insertions, 10 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp index d1ac80a78fc..f23608966a0 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp @@ -4091,16 +4091,6 @@ lower_sampler_logical_send_gen7(const fs_builder &bld, fs_inst *inst, opcode op, bool coordinate_done = false; - /* The sampler can only meaningfully compute LOD for fragment shader - * messages. For all other stages, we change the opcode to TXL and - * hardcode the LOD to 0. - */ - if (bld.shader->stage != MESA_SHADER_FRAGMENT && - op == SHADER_OPCODE_TEX) { - op = SHADER_OPCODE_TXL; - lod = brw_imm_f(0.0f); - } - /* Set up the LOD info */ switch (op) { case FS_OPCODE_TXB: |