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authorNanley Chery <nanley.g.chery@intel.com>2021-10-05 12:02:23 -0700
committerMarge Bot <eric+marge@anholt.net>2021-10-12 18:05:46 +0000
commit81e9c25c1bf64c78882eb686a044ec63e8d1d11b (patch)
tree9a18fdfd99b2e73ca1dd3a723910c9b3546adc88 /src/intel
parent4218596671401f254cf41c1e9715bf8c3b74a0f6 (diff)
anv: Allow HIZ_CCS_WT with subpass self-dependencies
This unblocks later commits that aim to align the driver with the tile cache flushing requirements in the Bspec. Reviewed-by: Felix DeGrood <felix.j.degrood@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11539>
Diffstat (limited to 'src/intel')
-rw-r--r--src/intel/vulkan/anv_image.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/intel/vulkan/anv_image.c b/src/intel/vulkan/anv_image.c
index 99050a1ce34..a2fb47fe315 100644
--- a/src/intel/vulkan/anv_image.c
+++ b/src/intel/vulkan/anv_image.c
@@ -2053,7 +2053,7 @@ anv_layout_to_aux_state(const struct intel_device_info * const devinfo,
*
* TODO: Should we be disabling this in more cases?
*/
- if (aspect == VK_IMAGE_ASPECT_DEPTH_BIT) {
+ if (aspect == VK_IMAGE_ASPECT_DEPTH_BIT && devinfo->ver <= 9) {
aux_supported = false;
clear_supported = false;
}