diff options
| author | Nanley Chery <nanley.g.chery@intel.com> | 2017-01-24 15:55:57 -0800 |
|---|---|---|
| committer | Jason Ekstrand <jason.ekstrand@intel.com> | 2017-07-22 20:12:09 -0700 |
| commit | 01db9a74c6b39984c50a9794e69908aab51d67c4 (patch) | |
| tree | 7c8c39d17f1fd031220f1a12ae964cb90c1a5116 /src/intel/isl | |
| parent | b178e239dd7205a93ae3cf6c0a24c2c555bf333f (diff) | |
intel/isl: Add surface state clear value information
This will be used to load and store clear values from surface state
objects.
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Diffstat (limited to 'src/intel/isl')
| -rw-r--r-- | src/intel/isl/isl.c | 9 | ||||
| -rw-r--r-- | src/intel/isl/isl.h | 4 |
2 files changed, 13 insertions, 0 deletions
diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c index e7e5530e5bf..5465496b8f2 100644 --- a/src/intel/isl/isl.c +++ b/src/intel/isl/isl.c @@ -73,6 +73,15 @@ isl_device_init(struct isl_device *dev, dev->ss.size = RENDER_SURFACE_STATE_length(info) * 4; dev->ss.align = isl_align(dev->ss.size, 32); + dev->ss.clear_value_size = + isl_align(RENDER_SURFACE_STATE_RedClearColor_bits(info) + + RENDER_SURFACE_STATE_GreenClearColor_bits(info) + + RENDER_SURFACE_STATE_BlueClearColor_bits(info) + + RENDER_SURFACE_STATE_AlphaClearColor_bits(info), 32) / 8; + + dev->ss.clear_value_offset = + RENDER_SURFACE_STATE_RedClearColor_start(info) / 32 * 4; + assert(RENDER_SURFACE_STATE_SurfaceBaseAddress_start(info) % 8 == 0); dev->ss.addr_offset = RENDER_SURFACE_STATE_SurfaceBaseAddress_start(info) / 8; diff --git a/src/intel/isl/isl.h b/src/intel/isl/isl.h index 92d2ffc31a5..fcf03b1a5b3 100644 --- a/src/intel/isl/isl.h +++ b/src/intel/isl/isl.h @@ -919,6 +919,10 @@ struct isl_device { uint8_t align; uint8_t addr_offset; uint8_t aux_addr_offset; + + /* Rounded up to the nearest dword to simplify GPU memcpy operations. */ + uint8_t clear_value_size; + uint8_t clear_value_offset; } ss; /** |