diff options
| author | Jason Ekstrand <jason@jlekstrand.net> | 2020-01-17 11:23:14 -0600 |
|---|---|---|
| committer | Dylan Baker <dylan@pnwbakers.com> | 2020-01-31 08:50:27 -0800 |
| commit | 6c705ea125714e86bba0801e7c28fe6da1675658 (patch) | |
| tree | 1a53c538fb87bc0e2419012ebdef40ff2a80b779 /src/intel/genxml/gen11.xml | |
| parent | ea7ab6945596b9d94891215ef5e8e5c58449553f (diff) | |
intel/genxml: Drop SLMEnable from L3CNTLREG on Gen11
SML is no longer in the L3$ on Gen11+. It's not incredibly clear from
the docs but no Gen11 platforms are in the list of platforms on which
this bit exists. Also, we've been always setting it false on Gen11 in
ANV and i965 thanks to GEN_L3P_SLM being zero with no ill effects.
Cc: "20.0" mesa-stable@lists.freedesktop.org
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454>
(cherry picked from commit 73434b665b2ec50cbd1060ce831aec3b2e21517c)
Diffstat (limited to 'src/intel/genxml/gen11.xml')
| -rw-r--r-- | src/intel/genxml/gen11.xml | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/intel/genxml/gen11.xml b/src/intel/genxml/gen11.xml index 3d5950d0efc..6d5ba940cda 100644 --- a/src/intel/genxml/gen11.xml +++ b/src/intel/genxml/gen11.xml @@ -6997,7 +6997,6 @@ </register> <register name="L3CNTLREG" length="1" num="0x7034"> - <field name="SLM Enable" start="0" end="0" type="uint"/> <field name="URB Allocation" start="1" end="7" type="uint"/> <field name="Error Detection Behavior Control" start="9" end="9" type="bool"/> <field name="Use Full Ways" start="10" end="10" type="bool"/> |