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authorFrancisco Jerez <currojerez@riseup.net>2018-12-07 14:26:23 -0800
committerFrancisco Jerez <currojerez@riseup.net>2019-01-09 12:03:08 -0800
commitc301f447ea8449804208e414f189c0571e4339a8 (patch)
tree1bd867cd56e6a92e8200f0c10d38843da9feaa61 /src/intel/compiler/brw_nir_lower_mem_access_bit_sizes.c
parent464e79144f8090eb42b8994a983470628c248be0 (diff)
intel/fs: Respect CHV/BXT regioning restrictions in copy propagation pass.
Currently the visitor attempts to enforce the regioning restrictions that apply to double-precision instructions on CHV/BXT at NIR-to-i965 translation time. It is possible though for the copy propagation pass to violate this restriction if a strided move is propagated into one of the affected instructions. I've only reproduced this issue on a future platform but it could affect CHV/BXT too under the right conditions. Cc: mesa-stable@lists.freedesktop.org Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Diffstat (limited to 'src/intel/compiler/brw_nir_lower_mem_access_bit_sizes.c')
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