diff options
| author | Matt Turner <mattst88@gmail.com> | 2017-07-26 14:25:54 -0700 |
|---|---|---|
| committer | Matt Turner <mattst88@gmail.com> | 2017-08-21 14:05:23 -0700 |
| commit | 9fb8323328684bd7fe4e8c71c7415f51acf25e5b (patch) | |
| tree | d81bec8f936d11a6bee1cebe1c0b7e4276db2527 /src/intel/compiler/brw_inst.h | |
| parent | 3e379af492f0f4c05061b8251e7cf18ed438056c (diff) | |
i965: Rename brw_inst's functions that access the register type
Put hw_ in the name so that it's clear these are the hardware encodings.
Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
Diffstat (limited to 'src/intel/compiler/brw_inst.h')
| -rw-r--r-- | src/intel/compiler/brw_inst.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/intel/compiler/brw_inst.h b/src/intel/compiler/brw_inst.h index cd3b0e95ea0..4195150112c 100644 --- a/src/intel/compiler/brw_inst.h +++ b/src/intel/compiler/brw_inst.h @@ -135,7 +135,7 @@ F(src1_da16_subreg_nr, 100, 100) F(src1_da1_subreg_nr, 100, 96) F(src1_da16_swiz_y, 99, 98) F(src1_da16_swiz_x, 97, 96) -F8(src1_reg_type, /* 4+ */ 46, 44, /* 8+ */ 94, 91) +F8(src1_reg_hw_type, /* 4+ */ 46, 44, /* 8+ */ 94, 91) F8(src1_reg_file, /* 4+ */ 43, 42, /* 8+ */ 90, 89) F(src0_vstride, 88, 85) F(src0_width, 84, 82) @@ -160,9 +160,9 @@ F(dst_da_reg_nr, 60, 53) F(dst_da16_subreg_nr, 52, 52) F(dst_da1_subreg_nr, 52, 48) F(da16_writemask, 51, 48) /* Dst.ChanEn */ -F8(src0_reg_type, /* 4+ */ 41, 39, /* 8+ */ 46, 43) +F8(src0_reg_hw_type, /* 4+ */ 41, 39, /* 8+ */ 46, 43) F8(src0_reg_file, /* 4+ */ 38, 37, /* 8+ */ 42, 41) -F8(dst_reg_type, /* 4+ */ 36, 34, /* 8+ */ 40, 37) +F8(dst_reg_hw_type, /* 4+ */ 36, 34, /* 8+ */ 40, 37) F8(dst_reg_file, /* 4+ */ 33, 32, /* 8+ */ 36, 35) F8(mask_control, /* 4+ */ 9, 9, /* 8+ */ 34, 34) FF(flag_reg_nr, |