intel/blorp: Use ISL for emitting depth/stencil/hiz

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

1 files changed, 33 insertions, 86 deletions

diff --git a/src/intel/blorp/blorp_genX_exec.h b/src/intel/blorp/blorp_genX_exec.h
index 9532e89b12f..47febafb9b3 100644
--- a/src/intel/blorp/blorp_genX_exec.h
+++ b/src/intel/blorp/blorp_genX_exec.h
@@ -792,107 +792,54 @@ static void
 blorp_emit_depth_stencil_config(struct blorp_batch *batch,
                                 const struct blorp_params *params)
 {
-#if GEN_GEN >= 7
-   const uint32_t mocs = 1; /* GEN7_MOCS_L3 */
-#else
-   const uint32_t mocs = 0;
-#endif
-
-   blorp_emit(batch, GENX(3DSTATE_DEPTH_BUFFER), db) {
-#if GEN_GEN >= 7
-      db.DepthWriteEnable = params->depth.enabled;
-      db.StencilWriteEnable = params->stencil.enabled;
-#endif
-
-#if GEN_GEN <= 6
-      db.SeparateStencilBufferEnable = true;
-#endif
+   const struct isl_device *isl_dev = batch->blorp->isl_dev;
 
-      if (params->depth.enabled) {
-         db.SurfaceFormat = params->depth_format;
-         db.SurfaceType = isl_to_gen_ds_surftype[params->depth.surf.dim];
+   uint32_t *dw = blorp_emit_dwords(batch, isl_dev->ds.size / 4);
+   if (dw == NULL)
+      return;
 
-#if GEN_GEN <= 6
-         db.TiledSurface = true;
-         db.TileWalk = TILEWALK_YMAJOR;
-         db.MIPMapLayoutMode = MIPLAYOUT_BELOW;
+   struct isl_depth_stencil_hiz_emit_info info = {
+#if GEN_GEN >= 7
+      .mocs = 1, /* GEN7_MOCS_L3 */
+#else
+      .mocs = 0,
 #endif
+   };
 
-         db.HierarchicalDepthBufferEnable =
-            params->depth.aux_usage == ISL_AUX_USAGE_HIZ;
-
-         db.Width = params->depth.surf.logical_level0_px.width - 1;
-         db.Height = params->depth.surf.logical_level0_px.height - 1;
-         db.RenderTargetViewExtent = db.Depth =
-            params->depth.view.array_len - 1;
+   if (params->depth.enabled) {
+      info.view = &params->depth.view;
+   } else if (params->stencil.enabled) {
+      info.view = &params->stencil.view;
+   }
 
-         db.LOD = params->depth.view.base_level;
-         db.MinimumArrayElement = params->depth.view.base_array_layer;
+   if (params->depth.enabled) {
+      info.depth_surf = &params->depth.surf;
 
-         db.SurfacePitch = params->depth.surf.row_pitch - 1;
-#if GEN_GEN >= 8
-         db.SurfaceQPitch =
-            isl_surf_get_array_pitch_el_rows(&params->depth.surf) >> 2,
-#endif
+      info.depth_address =
+         blorp_emit_reloc(batch, dw + isl_dev->ds.depth_offset / 4,
+                          params->depth.addr, 0);
 
-         db.SurfaceBaseAddress = params->depth.addr;
-         db.DepthBufferMOCS = mocs;
-      } else if (params->stencil.enabled) {
-         db.SurfaceFormat = D32_FLOAT;
-         db.SurfaceType = isl_to_gen_ds_surftype[params->stencil.surf.dim];
+      info.hiz_usage = params->depth.aux_usage;
+      if (info.hiz_usage == ISL_AUX_USAGE_HIZ) {
+         info.hiz_surf = &params->depth.aux_surf;
 
-         db.Width = params->stencil.surf.logical_level0_px.width - 1;
-         db.Height = params->stencil.surf.logical_level0_px.height - 1;
-         db.RenderTargetViewExtent = db.Depth =
-            params->stencil.view.array_len - 1;
+         info.hiz_address =
+            blorp_emit_reloc(batch, dw + isl_dev->ds.hiz_offset / 4,
+                             params->depth.aux_addr, 0);
 
-         db.LOD = params->stencil.view.base_level;
-         db.MinimumArrayElement = params->stencil.view.base_array_layer;
-      } else {
-         db.SurfaceType = SURFTYPE_NULL;
-         db.SurfaceFormat = D32_FLOAT;
+         info.depth_clear_value = params->depth.clear_color.u32[0];
       }
    }
 
-   blorp_emit(batch, GENX(3DSTATE_STENCIL_BUFFER), sb) {
-      if (params->stencil.enabled) {
-#if GEN_GEN >= 8 || GEN_IS_HASWELL
-         sb.StencilBufferEnable = true;
-#endif
-
-         sb.SurfacePitch = params->stencil.surf.row_pitch - 1,
-#if GEN_GEN >= 8
-         sb.SurfaceQPitch =
-            isl_surf_get_array_pitch_el_rows(&params->stencil.surf) >> 2,
-#endif
-
-         sb.SurfaceBaseAddress = params->stencil.addr;
-         sb.StencilBufferMOCS = batch->blorp->mocs.tex;
-      }
-   }
+   if (params->stencil.enabled) {
+      info.stencil_surf = &params->stencil.surf;
 
-   blorp_emit(batch, GENX(3DSTATE_HIER_DEPTH_BUFFER), hiz) {
-      if (params->depth.aux_usage == ISL_AUX_USAGE_HIZ) {
-         hiz.SurfacePitch = params->depth.aux_surf.row_pitch - 1;
-         hiz.SurfaceBaseAddress = params->depth.aux_addr;
-         hiz.HierarchicalDepthBufferMOCS = mocs;
-#if GEN_GEN >= 8
-         hiz.SurfaceQPitch =
-            isl_surf_get_array_pitch_sa_rows(&params->depth.aux_surf) >> 2;
-#endif
-      }
+      info.stencil_address =
+         blorp_emit_reloc(batch, dw + isl_dev->ds.stencil_offset / 4,
+                          params->stencil.addr, 0);
    }
 
-   /* 3DSTATE_CLEAR_PARAMS
-    *
-    * From the Sandybridge PRM, Volume 2, Part 1, Section 3DSTATE_CLEAR_PARAMS:
-    *   [DevSNB] 3DSTATE_CLEAR_PARAMS packet must follow the DEPTH_BUFFER_STATE
-    *   packet when HiZ is enabled and the DEPTH_BUFFER_STATE changes.
-    */
-   blorp_emit(batch, GENX(3DSTATE_CLEAR_PARAMS), clear) {
-      clear.DepthClearValueValid = true;
-      clear.DepthClearValue = params->depth.clear_color.u32[0];
-   }
+   isl_emit_depth_stencil_hiz_s(isl_dev, dw, &info);
 }
 
 static uint32_t