diff options
author | Marek Olšák <marek.olsak@amd.com> | 2020-12-24 06:14:11 -0500 |
---|---|---|
committer | Marge Bot <eric+marge@anholt.net> | 2021-01-05 02:43:55 +0000 |
commit | b94626d3eea1dac8c8fc234e3f0e9be502510dff (patch) | |
tree | bc95447cd972d7ac9771a9e043b0d6c7d55d6bab /src/gallium | |
parent | e4fa7c440d273aad6cb9b9a6ee42a78810c9c2c2 (diff) |
ac,radeonsi: limit Smart Access Memory to Zen 3 and GFX10.3 due to perf issues
Many people experience performance degradation on some systems.
There will be a driconf option to enable SAM on other chips as well as
disable it on enabled systems.
Fixes: d3d6d381450 - ac: add radeon_info::all_vram_visible for Smart Access Memory
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3982
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8225>
Diffstat (limited to 'src/gallium')
-rw-r--r-- | src/gallium/drivers/radeonsi/si_buffer.c | 4 | ||||
-rw-r--r-- | src/gallium/drivers/radeonsi/si_pipe.c | 6 | ||||
-rw-r--r-- | src/gallium/drivers/radeonsi/si_texture.c | 3 | ||||
-rw-r--r-- | src/gallium/winsys/amdgpu/drm/amdgpu_cs.c | 2 |
4 files changed, 8 insertions, 7 deletions
diff --git a/src/gallium/drivers/radeonsi/si_buffer.c b/src/gallium/drivers/radeonsi/si_buffer.c index 14c506980df..7f769f4431f 100644 --- a/src/gallium/drivers/radeonsi/si_buffer.c +++ b/src/gallium/drivers/radeonsi/si_buffer.c @@ -56,7 +56,7 @@ void si_init_resource_fields(struct si_screen *sscreen, struct si_resource *res, switch (res->b.b.usage) { case PIPE_USAGE_STREAM: res->flags |= RADEON_FLAG_GTT_WC; - if (sscreen->info.all_vram_visible) + if (sscreen->info.smart_access_memory) res->domains = RADEON_DOMAIN_VRAM; else res->domains = RADEON_DOMAIN_GTT; @@ -153,7 +153,7 @@ void si_init_resource_fields(struct si_screen *sscreen, struct si_resource *res, if (res->domains & RADEON_DOMAIN_VRAM) { res->vram_usage = size; - if (!sscreen->info.all_vram_visible) { + if (!sscreen->info.smart_access_memory) { /* We don't want to evict buffers from VRAM by mapping them for CPU access, * because they might never be moved back again. If a buffer is large enough, * upload data by copying from a temporary GTT buffer. 8K might not seem much, diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c index 61508c27184..eb4a94c2a10 100644 --- a/src/gallium/drivers/radeonsi/si_pipe.c +++ b/src/gallium/drivers/radeonsi/si_pipe.c @@ -493,15 +493,15 @@ static struct pipe_context *si_create_context(struct pipe_screen *screen, unsign goto fail; /* Initialize public allocators. */ - bool all_vram_visible = sscreen->info.all_vram_visible; + bool smart_access_memory = sscreen->info.smart_access_memory; sctx->b.stream_uploader = u_upload_create(&sctx->b, 1024 * 1024, 0, - all_vram_visible ? PIPE_USAGE_DEFAULT : PIPE_USAGE_STREAM, + smart_access_memory ? PIPE_USAGE_DEFAULT : PIPE_USAGE_STREAM, SI_RESOURCE_FLAG_32BIT); /* same flags as const_uploader */ if (!sctx->b.stream_uploader) goto fail; - if (all_vram_visible) { + if (smart_access_memory) { sctx->b.const_uploader = sctx->b.stream_uploader; } else { sctx->b.const_uploader = diff --git a/src/gallium/drivers/radeonsi/si_texture.c b/src/gallium/drivers/radeonsi/si_texture.c index e89f1883a60..13d197bdb62 100644 --- a/src/gallium/drivers/radeonsi/si_texture.c +++ b/src/gallium/drivers/radeonsi/si_texture.c @@ -1810,7 +1810,8 @@ static void *si_texture_transfer_map(struct pipe_context *ctx, struct pipe_resou * is busy. */ if (!tex->surface.is_linear || (tex->buffer.flags & RADEON_FLAG_ENCRYPTED) || - (tex->buffer.domains & RADEON_DOMAIN_VRAM && !sctx->screen->info.all_vram_visible)) + (tex->buffer.domains & RADEON_DOMAIN_VRAM && + !sctx->screen->info.smart_access_memory)) use_staging_texture = true; else if (usage & PIPE_MAP_READ) use_staging_texture = diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c index 497cb39f9e2..c22947b0779 100644 --- a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c +++ b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c @@ -711,7 +711,7 @@ static bool amdgpu_ib_new_buffer(struct amdgpu_winsys *ws, if (cs->ring_type == RING_GFX || cs->ring_type == RING_COMPUTE || cs->ring_type == RING_DMA) { - domain = ws->info.all_vram_visible ? RADEON_DOMAIN_VRAM : RADEON_DOMAIN_GTT; + domain = ws->info.smart_access_memory ? RADEON_DOMAIN_VRAM : RADEON_DOMAIN_GTT; flags |= RADEON_FLAG_32BIT | RADEON_FLAG_GTT_WC; } else { /* UVD/VCE */ |