diff options
| author | Marek Olšák <marek.olsak@amd.com> | 2017-06-27 19:37:43 +0200 |
|---|---|---|
| committer | Marek Olšák <marek.olsak@amd.com> | 2017-07-04 15:40:37 +0200 |
| commit | 7525c3e1235f329f27e872811f85f10107af4ead (patch) | |
| tree | 547ea9edd5e0849d20e3a1b10ce33973a878accd /src/gallium/winsys | |
| parent | e6dbe975eff8e23992c9d9a72ce302896b5fecfc (diff) | |
gallium/radeon: rename RADEON_FLAG_HANDLE -> RADEON_FLAG_NO_SUBALLOC
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Diffstat (limited to 'src/gallium/winsys')
| -rw-r--r-- | src/gallium/winsys/amdgpu/drm/amdgpu_bo.c | 6 | ||||
| -rw-r--r-- | src/gallium/winsys/radeon/drm/radeon_drm_bo.c | 4 | ||||
| -rw-r--r-- | src/gallium/winsys/radeon/drm/radeon_drm_cs.c | 2 |
3 files changed, 6 insertions, 6 deletions
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c b/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c index 401741167a3..a86cc2c248a 100644 --- a/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c +++ b/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c @@ -690,7 +690,7 @@ sparse_backing_alloc(struct amdgpu_winsys_bo *bo, uint32_t *pstart_page, uint32_ buf = amdgpu_bo_create(&bo->ws->base, size, RADEON_SPARSE_PAGE_SIZE, bo->initial_domain, - bo->u.sparse.flags | RADEON_FLAG_HANDLE); + bo->u.sparse.flags | RADEON_FLAG_NO_SUBALLOC); if (!buf) { FREE(best_backing->chunks); FREE(best_backing); @@ -1156,7 +1156,7 @@ amdgpu_bo_create(struct radeon_winsys *rws, unsigned usage = 0, pb_cache_bucket; /* Sub-allocate small buffers from slabs. */ - if (!(flags & (RADEON_FLAG_HANDLE | RADEON_FLAG_SPARSE)) && + if (!(flags & (RADEON_FLAG_NO_SUBALLOC | RADEON_FLAG_SPARSE)) && size <= (1 << AMDGPU_SLAB_MAX_SIZE_LOG2) && alignment <= MAX2(1 << AMDGPU_SLAB_MIN_SIZE_LOG2, util_next_power_of_two(size))) { struct pb_slab_entry *entry; @@ -1212,7 +1212,7 @@ no_slab: } /* This flag is irrelevant for the cache. */ - flags &= ~RADEON_FLAG_HANDLE; + flags &= ~RADEON_FLAG_NO_SUBALLOC; /* Align size to page size. This is the minimum alignment for normal * BOs. Aligning this here helps the cached bufmgr. Especially small BOs, diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c index 2700c6f2543..e79c2b7da47 100644 --- a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c +++ b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c @@ -943,7 +943,7 @@ radeon_winsys_bo_create(struct radeon_winsys *rws, return NULL; /* Sub-allocate small buffers from slabs. */ - if (!(flags & RADEON_FLAG_HANDLE) && + if (!(flags & RADEON_FLAG_NO_SUBALLOC) && size <= (1 << RADEON_SLAB_MAX_SIZE_LOG2) && ws->info.has_virtual_memory && alignment <= MAX2(1 << RADEON_SLAB_MIN_SIZE_LOG2, util_next_power_of_two(size))) { @@ -991,7 +991,7 @@ radeon_winsys_bo_create(struct radeon_winsys *rws, no_slab: /* This flag is irrelevant for the cache. */ - flags &= ~RADEON_FLAG_HANDLE; + flags &= ~RADEON_FLAG_NO_SUBALLOC; /* Align size to page size. This is the minimum alignment for normal * BOs. Aligning this here helps the cached bufmgr. Especially small BOs, diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c index f59b5399e4c..52460535c1b 100644 --- a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c +++ b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c @@ -751,7 +751,7 @@ radeon_cs_create_fence(struct radeon_winsys_cs *rcs) /* Create a fence, which is a dummy BO. */ fence = cs->ws->base.buffer_create(&cs->ws->base, 1, 1, - RADEON_DOMAIN_GTT, RADEON_FLAG_HANDLE); + RADEON_DOMAIN_GTT, RADEON_FLAG_NO_SUBALLOC); if (!fence) return NULL; |