radeon_winsys.h: add a winsys parameter to most winsys buffer functions

This will allow removing the winsys pointer from buffers.

The amdgpu winsys adds dummy_ws to get radeon_winsys because there can be
no radeon_winsys around (e.g. while amdgpu_winsys is being destroyed), but
we still need some way to call buffer functions.

Reviewed-by: Zoltán Böszörményi <zboszor@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9809>

7 files changed, 59 insertions, 42 deletions

diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c b/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c
index cd773f3231a..434c43c283d 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c
@@ -47,7 +47,8 @@ struct amdgpu_sparse_backing_chunk {
    uint32_t begin, end;
 };
 
-static bool amdgpu_bo_wait(struct pb_buffer *_buf, uint64_t timeout,
+static bool amdgpu_bo_wait(struct radeon_winsys *rws,
+                           struct pb_buffer *_buf, uint64_t timeout,
                            enum radeon_bo_usage usage)
 {
    struct amdgpu_winsys_bo *bo = amdgpu_winsys_bo(_buf);
@@ -173,13 +174,13 @@ void amdgpu_bo_destroy(void *winsys, struct pb_buffer *_buf)
 {
    struct amdgpu_winsys_bo *bo = amdgpu_winsys_bo(_buf);
    struct amdgpu_screen_winsys *sws_iter;
-   struct amdgpu_winsys *ws = bo->ws;
+   struct amdgpu_winsys *ws = winsys;
 
    assert(bo->bo && "must not be called for slab entries");
 
    if (!bo->u.real.is_user_ptr && bo->u.real.cpu_ptr) {
       bo->u.real.cpu_ptr = NULL;
-      amdgpu_bo_unmap(&bo->base);
+      amdgpu_bo_unmap(&ws->dummy_ws.base, &bo->base);
    }
    assert(bo->u.real.is_user_ptr || bo->u.real.map_count == 0);
 
@@ -277,7 +278,8 @@ static bool amdgpu_bo_do_map(struct amdgpu_winsys_bo *bo, void **cpu)
    return true;
 }
 
-void *amdgpu_bo_map(struct pb_buffer *buf,
+void *amdgpu_bo_map(struct radeon_winsys *rws,
+                    struct pb_buffer *buf,
                     struct radeon_cmdbuf *rcs,
                     enum pipe_map_flags usage)
 {
@@ -306,7 +308,7 @@ void *amdgpu_bo_map(struct pb_buffer *buf,
                return NULL;
             }
 
-            if (!amdgpu_bo_wait((struct pb_buffer*)bo, 0,
+            if (!amdgpu_bo_wait(rws, (struct pb_buffer*)bo, 0,
                                 RADEON_USAGE_WRITE)) {
                return NULL;
             }
@@ -317,7 +319,7 @@ void *amdgpu_bo_map(struct pb_buffer *buf,
                return NULL;
             }
 
-            if (!amdgpu_bo_wait((struct pb_buffer*)bo, 0,
+            if (!amdgpu_bo_wait(rws, (struct pb_buffer*)bo, 0,
                                 RADEON_USAGE_READWRITE)) {
                return NULL;
             }
@@ -345,7 +347,7 @@ void *amdgpu_bo_map(struct pb_buffer *buf,
                }
             }
 
-            amdgpu_bo_wait((struct pb_buffer*)bo, PIPE_TIMEOUT_INFINITE,
+            amdgpu_bo_wait(rws, (struct pb_buffer*)bo, PIPE_TIMEOUT_INFINITE,
                            RADEON_USAGE_WRITE);
          } else {
             /* Mapping for write. */
@@ -360,7 +362,7 @@ void *amdgpu_bo_map(struct pb_buffer *buf,
                }
             }
 
-            amdgpu_bo_wait((struct pb_buffer*)bo, PIPE_TIMEOUT_INFINITE,
+            amdgpu_bo_wait(rws, (struct pb_buffer*)bo, PIPE_TIMEOUT_INFINITE,
                            RADEON_USAGE_READWRITE);
          }
 
@@ -407,7 +409,7 @@ void *amdgpu_bo_map(struct pb_buffer *buf,
    return (uint8_t*)cpu + offset;
 }
 
-void amdgpu_bo_unmap(struct pb_buffer *buf)
+void amdgpu_bo_unmap(struct radeon_winsys *rws, struct pb_buffer *buf)
 {
    struct amdgpu_winsys_bo *bo = (struct amdgpu_winsys_bo*)buf;
    struct amdgpu_winsys_bo *real;
@@ -622,7 +624,9 @@ error_bo_alloc:
 
 bool amdgpu_bo_can_reclaim(void *winsys, struct pb_buffer *_buf)
 {
-   return amdgpu_bo_wait(_buf, 0, RADEON_USAGE_READWRITE);
+   struct amdgpu_winsys *ws = winsys;
+
+   return amdgpu_bo_wait(&ws->dummy_ws.base, _buf, 0, RADEON_USAGE_READWRITE);
 }
 
 bool amdgpu_bo_can_reclaim_slab(void *priv, struct pb_slab_entry *entry)
@@ -1188,8 +1192,8 @@ error_alloc_commitments:
 }
 
 static bool
-amdgpu_bo_sparse_commit(struct pb_buffer *buf, uint64_t offset, uint64_t size,
-                        bool commit)
+amdgpu_bo_sparse_commit(struct radeon_winsys *rws, struct pb_buffer *buf,
+                        uint64_t offset, uint64_t size, bool commit)
 {
    struct amdgpu_winsys_bo *bo = amdgpu_winsys_bo(buf);
    struct amdgpu_sparse_commitment *comm;
@@ -1316,7 +1320,8 @@ out:
    return ok;
 }
 
-static void amdgpu_buffer_get_metadata(struct pb_buffer *_buf,
+static void amdgpu_buffer_get_metadata(struct radeon_winsys *rws,
+                                       struct pb_buffer *_buf,
                                        struct radeon_bo_metadata *md,
                                        struct radeon_surf *surf)
 {
@@ -1337,7 +1342,8 @@ static void amdgpu_buffer_get_metadata(struct pb_buffer *_buf,
    memcpy(md->metadata, info.metadata.umd_metadata, sizeof(md->metadata));
 }
 
-static void amdgpu_buffer_set_metadata(struct pb_buffer *_buf,
+static void amdgpu_buffer_set_metadata(struct radeon_winsys *rws,
+                                       struct pb_buffer *_buf,
                                        struct radeon_bo_metadata *md,
                                        struct radeon_surf *surf)
 {
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_bo.h b/src/gallium/winsys/amdgpu/drm/amdgpu_bo.h
index 9dd5bb6d523..95007555fe9 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_bo.h
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_bo.h
@@ -126,10 +126,11 @@ struct pb_buffer *amdgpu_bo_create(struct amdgpu_winsys *ws,
                                    enum radeon_bo_domain domain,
                                    enum radeon_bo_flag flags);
 void amdgpu_bo_destroy(void *winsys, struct pb_buffer *_buf);
-void *amdgpu_bo_map(struct pb_buffer *buf,
+void *amdgpu_bo_map(struct radeon_winsys *rws,
+                    struct pb_buffer *buf,
                     struct radeon_cmdbuf *rcs,
                     enum pipe_map_flags usage);
-void amdgpu_bo_unmap(struct pb_buffer *buf);
+void amdgpu_bo_unmap(struct radeon_winsys *rws, struct pb_buffer *buf);
 void amdgpu_bo_init_functions(struct amdgpu_screen_winsys *ws);
 
 bool amdgpu_bo_can_reclaim_slab(void *priv, struct pb_slab_entry *entry);
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
index f59e65e47fa..8e957288e08 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
@@ -729,7 +729,7 @@ static bool amdgpu_ib_new_buffer(struct amdgpu_winsys *ws,
    if (!pb)
       return false;
 
-   mapped = amdgpu_bo_map(pb, NULL, PIPE_MAP_WRITE);
+   mapped = amdgpu_bo_map(&ws->dummy_ws.base, pb, NULL, PIPE_MAP_WRITE);
    if (!mapped) {
       pb_reference(&pb, NULL);
       return false;
@@ -1063,7 +1063,7 @@ amdgpu_cs_setup_preemption(struct radeon_cmdbuf *rcs, const uint32_t *preamble_i
    if (!preamble_bo)
       return false;
 
-   map = (uint32_t*)amdgpu_bo_map(preamble_bo, NULL,
+   map = (uint32_t*)amdgpu_bo_map(&ws->dummy_ws.base, preamble_bo, NULL,
                                   PIPE_MAP_WRITE | RADEON_MAP_TEMPORARY);
    if (!map) {
       pb_reference(&preamble_bo, NULL);
@@ -1077,7 +1077,7 @@ amdgpu_cs_setup_preemption(struct radeon_cmdbuf *rcs, const uint32_t *preamble_i
    uint32_t ib_pad_dw_mask = ws->info.ib_pad_dw_mask[cs->ring_type];
    while (preamble_num_dw & ib_pad_dw_mask)
       map[preamble_num_dw++] = PKT3_NOP_PAD;
-   amdgpu_bo_unmap(preamble_bo);
+   amdgpu_bo_unmap(&ws->dummy_ws.base, preamble_bo);
 
    for (unsigned i = 0; i < 2; i++) {
       csc[i]->ib[IB_PREAMBLE] = csc[i]->ib[IB_MAIN];
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c b/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
index 2f91a377d14..e8ee6decfca 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
@@ -435,6 +435,7 @@ amdgpu_winsys_create(int fd, const struct pipe_screen_config *config,
       aws->fd = ws->fd;
       aws->info.drm_major = drm_major;
       aws->info.drm_minor = drm_minor;
+      aws->dummy_ws.aws = aws; /* only the pointer is used */
 
       if (!do_winsys_init(aws, config, fd))
          goto fail_alloc;
@@ -442,7 +443,7 @@ amdgpu_winsys_create(int fd, const struct pipe_screen_config *config,
       /* Create managers. */
       pb_cache_init(&aws->bo_cache, RADEON_MAX_CACHED_HEAPS,
                     500000, aws->check_vm ? 1.0f : 2.0f, 0,
-                    (aws->info.vram_size + aws->info.gart_size) / 8, NULL,
+                    (aws->info.vram_size + aws->info.gart_size) / 8, ws,
                     amdgpu_bo_destroy, amdgpu_bo_can_reclaim);
 
       unsigned min_slab_order = 8;  /* 256 bytes */
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.h b/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.h
index 27c473a73f3..26e81f94d5f 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.h
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.h
@@ -39,6 +39,19 @@ struct amdgpu_cs;
 
 #define NUM_SLAB_ALLOCATORS 3
 
+struct amdgpu_screen_winsys {
+   struct radeon_winsys base;
+   struct amdgpu_winsys *aws;
+   int fd;
+   struct pipe_reference reference;
+   struct amdgpu_screen_winsys *next;
+
+   /* Maps a BO to its KMS handle valid for this DRM file descriptor
+    * Protected by amdgpu_winsys::sws_list_lock
+    */
+   struct hash_table *kms_handles;
+};
+
 struct amdgpu_winsys {
    struct pipe_reference reference;
 
@@ -106,19 +119,11 @@ struct amdgpu_winsys {
     * and re-imported buffers. */
    struct hash_table *bo_export_table;
    simple_mtx_t bo_export_table_lock;
-};
-
-struct amdgpu_screen_winsys {
-   struct radeon_winsys base;
-   struct amdgpu_winsys *aws;
-   int fd;
-   struct pipe_reference reference;
-   struct amdgpu_screen_winsys *next;
 
-   /* Maps a BO to its KMS handle valid for this DRM file descriptor
-    * Protected by amdgpu_winsys::sws_list_lock
+   /* Since most winsys functions require struct radeon_winsys *, dummy_ws.base is used
+    * for invoking them because sws_list can be NULL.
     */
-   struct hash_table *kms_handles;
+   struct amdgpu_screen_winsys dummy_ws;
 };
 
 static inline struct amdgpu_screen_winsys *
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
index a56a9b28352..e31c1a92334 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
@@ -129,7 +129,8 @@ static void radeon_bo_wait_idle(struct radeon_bo *bo)
    }
 }
 
-static bool radeon_bo_wait(struct pb_buffer *_buf, uint64_t timeout,
+static bool radeon_bo_wait(struct radeon_winsys *rws,
+                           struct pb_buffer *_buf, uint64_t timeout,
                            enum radeon_bo_usage usage)
 {
    struct radeon_bo *bo = radeon_bo(_buf);
@@ -496,7 +497,8 @@ void *radeon_bo_do_map(struct radeon_bo *bo)
    return (uint8_t*)bo->u.real.ptr + offset;
 }
 
-static void *radeon_bo_map(struct pb_buffer *buf,
+static void *radeon_bo_map(struct radeon_winsys *rws,
+                           struct pb_buffer *buf,
                            struct radeon_cmdbuf *rcs,
                            enum pipe_map_flags usage)
 {
@@ -521,7 +523,7 @@ static void *radeon_bo_map(struct pb_buffer *buf,
                return NULL;
             }
 
-            if (!radeon_bo_wait((struct pb_buffer*)bo, 0,
+            if (!radeon_bo_wait(rws, (struct pb_buffer*)bo, 0,
                                 RADEON_USAGE_WRITE)) {
                return NULL;
             }
@@ -532,7 +534,7 @@ static void *radeon_bo_map(struct pb_buffer *buf,
                return NULL;
             }
 
-            if (!radeon_bo_wait((struct pb_buffer*)bo, 0,
+            if (!radeon_bo_wait(rws, (struct pb_buffer*)bo, 0,
                                 RADEON_USAGE_READWRITE)) {
                return NULL;
             }
@@ -552,7 +554,7 @@ static void *radeon_bo_map(struct pb_buffer *buf,
                cs->flush_cs(cs->flush_data,
                             RADEON_FLUSH_START_NEXT_GFX_IB_NOW, NULL);
             }
-            radeon_bo_wait((struct pb_buffer*)bo, PIPE_TIMEOUT_INFINITE,
+            radeon_bo_wait(rws, (struct pb_buffer*)bo, PIPE_TIMEOUT_INFINITE,
                            RADEON_USAGE_WRITE);
          } else {
             /* Mapping for write. */
@@ -567,7 +569,7 @@ static void *radeon_bo_map(struct pb_buffer *buf,
                }
             }
 
-            radeon_bo_wait((struct pb_buffer*)bo, PIPE_TIMEOUT_INFINITE,
+            radeon_bo_wait(rws, (struct pb_buffer*)bo, PIPE_TIMEOUT_INFINITE,
                            RADEON_USAGE_READWRITE);
          }
 
@@ -578,7 +580,7 @@ static void *radeon_bo_map(struct pb_buffer *buf,
    return radeon_bo_do_map(bo);
 }
 
-static void radeon_bo_unmap(struct pb_buffer *_buf)
+static void radeon_bo_unmap(struct radeon_winsys *rws, struct pb_buffer *_buf)
 {
    struct radeon_bo *bo = (struct radeon_bo*)_buf;
 
@@ -744,7 +746,7 @@ bool radeon_bo_can_reclaim(void *winsys, struct pb_buffer *_buf)
    if (radeon_bo_is_referenced_by_any_cs(bo))
       return false;
 
-   return radeon_bo_wait(_buf, 0, RADEON_USAGE_READWRITE);
+   return radeon_bo_wait(winsys, _buf, 0, RADEON_USAGE_READWRITE);
 }
 
 bool radeon_bo_can_reclaim_slab(void *priv, struct pb_slab_entry *entry)
@@ -872,7 +874,8 @@ static unsigned eg_tile_split_rev(unsigned eg_tile_split)
    }
 }
 
-static void radeon_bo_get_metadata(struct pb_buffer *_buf,
+static void radeon_bo_get_metadata(struct radeon_winsys *rws,
+                                   struct pb_buffer *_buf,
                                    struct radeon_bo_metadata *md,
                                    struct radeon_surf *surf)
 {
@@ -929,7 +932,8 @@ static void radeon_bo_get_metadata(struct pb_buffer *_buf,
    md->u.legacy.scanout = bo->rws->gen >= DRV_SI && !(args.tiling_flags & RADEON_TILING_R600_NO_SCANOUT);
 }
 
-static void radeon_bo_set_metadata(struct pb_buffer *_buf,
+static void radeon_bo_set_metadata(struct radeon_winsys *rws,
+                                   struct pb_buffer *_buf,
                                    struct radeon_bo_metadata *md,
                                    struct radeon_surf *surf)
 {
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
index 4bddf7310a5..37b9af2712c 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
@@ -792,7 +792,7 @@ static bool radeon_fence_wait(struct radeon_winsys *ws,
                               struct pipe_fence_handle *fence,
                               uint64_t timeout)
 {
-   return ws->buffer_wait((struct pb_buffer*)fence, timeout,
+   return ws->buffer_wait(ws, (struct pb_buffer*)fence, timeout,
                           RADEON_USAGE_READWRITE);
 }