diff options
| author | Emma Anholt <emma@anholt.net> | 2023-05-18 13:24:04 -0700 |
|---|---|---|
| committer | Marge Bot <emma+marge@anholt.net> | 2023-06-12 17:37:54 +0000 |
| commit | 4340ec141d02173b7e0e9d80c3eaf6c45dd2ec58 (patch) | |
| tree | 510d74d4681db3198b74b473992d5a8e570eae65 /src/gallium/drivers/virgl/virgl_screen.c | |
| parent | 8dcf78d6d019ea004547eb5708677d34286f8c2a (diff) | |
virgl: Drop the VIRGL_DEBUG=use_tgsi debug var.
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23114>
Diffstat (limited to 'src/gallium/drivers/virgl/virgl_screen.c')
| -rw-r--r-- | src/gallium/drivers/virgl/virgl_screen.c | 8 |
1 files changed, 2 insertions, 6 deletions
diff --git a/src/gallium/drivers/virgl/virgl_screen.c b/src/gallium/drivers/virgl/virgl_screen.c index aa495edbc6f..8e02cc4c171 100644 --- a/src/gallium/drivers/virgl/virgl_screen.c +++ b/src/gallium/drivers/virgl/virgl_screen.c @@ -45,7 +45,6 @@ int virgl_debug = 0; const struct debug_named_value virgl_debug_options[] = { { "verbose", VIRGL_DEBUG_VERBOSE, NULL }, { "tgsi", VIRGL_DEBUG_TGSI, NULL }, - { "use_tgsi", VIRGL_DEBUG_USE_TGSI, NULL }, { "noemubgra", VIRGL_DEBUG_NO_EMULATE_BGRA, "Disable tweak to emulate BGRA as RGBA on GLES hosts" }, { "nobgraswz", VIRGL_DEBUG_NO_BGRA_DEST_SWIZZLE, "Disable tweak to swizzle emulated BGRA on GLES hosts" }, { "sync", VIRGL_DEBUG_SYNC, "Sync after every flush" }, @@ -451,9 +450,9 @@ virgl_get_shader_param(struct pipe_screen *screen, else return vscreen->caps.caps.v2.max_shader_image_other_stages; case PIPE_SHADER_CAP_PREFERRED_IR: - return (virgl_debug & VIRGL_DEBUG_USE_TGSI) ? PIPE_SHADER_IR_TGSI : PIPE_SHADER_IR_NIR; + return PIPE_SHADER_IR_NIR; case PIPE_SHADER_CAP_SUPPORTED_IRS: - return (1 << PIPE_SHADER_IR_TGSI) | ((virgl_debug & VIRGL_DEBUG_USE_TGSI) ? 0 : (1 << PIPE_SHADER_IR_NIR)); + return (1 << PIPE_SHADER_IR_TGSI) | (1 << PIPE_SHADER_IR_NIR); case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS: return VIRGL_SHADER_STAGE_CAP_V2(max_atomic_counters, shader); case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS: @@ -1042,9 +1041,6 @@ static void virgl_disk_cache_create(struct virgl_screen *screen) _mesa_sha1_init(&sha1_ctx); _mesa_sha1_update(&sha1_ctx, id_sha1, build_id_len); - uint32_t shader_debug_flags = virgl_debug & VIRGL_DEBUG_USE_TGSI; - _mesa_sha1_update(&sha1_ctx, &shader_debug_flags, sizeof(shader_debug_flags)); - /* When we switch the host the caps might change and then we might have to * apply different lowering. */ _mesa_sha1_update(&sha1_ctx, &screen->caps, sizeof(screen->caps)); |