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authorEric Anholt <eric@anholt.net>2014-08-01 13:32:49 -0700
committerEric Anholt <eric@anholt.net>2014-08-11 14:45:31 -0700
commit4160ac5ee41630a5c9fc4e1f3520f0fabf42cb14 (patch)
treeb9fa27c50da704655560e2d2a9f5b2e94288049f /src/gallium/drivers/vc4/vc4_emit.c
parent2259cc5aebcb16636b1399dd438beed9d9867e67 (diff)
vc4: Add support for depth clears and tests within a tile.
This doesn't load/store the Z contents across submits yet. It also disables early Z, since it's going to require tracking of Z functions across multiple state updates to track the early Z direction and whether it can be used. v2: Move the key setup to before the search for the key.
Diffstat (limited to 'src/gallium/drivers/vc4/vc4_emit.c')
-rw-r--r--src/gallium/drivers/vc4/vc4_emit.c14
1 files changed, 10 insertions, 4 deletions
diff --git a/src/gallium/drivers/vc4/vc4_emit.c b/src/gallium/drivers/vc4/vc4_emit.c
index 9c41505288c..476ea9c6fd4 100644
--- a/src/gallium/drivers/vc4/vc4_emit.c
+++ b/src/gallium/drivers/vc4/vc4_emit.c
@@ -36,11 +36,17 @@ vc4_emit_state(struct pipe_context *pctx)
cl_u16(&vc4->bcl, vc4->scissor.maxy - vc4->scissor.miny);
}
- if (vc4->dirty & VC4_DIRTY_RASTERIZER) {
+ if (vc4->dirty & (VC4_DIRTY_RASTERIZER | VC4_DIRTY_ZSA)) {
cl_u8(&vc4->bcl, VC4_PACKET_CONFIGURATION_BITS);
- cl_u8(&vc4->bcl, vc4->rasterizer->config_bits[0]);
- cl_u8(&vc4->bcl, vc4->rasterizer->config_bits[1]);
- cl_u8(&vc4->bcl, vc4->rasterizer->config_bits[2]);
+ cl_u8(&vc4->bcl,
+ vc4->rasterizer->config_bits[0] |
+ vc4->zsa->config_bits[0]);
+ cl_u8(&vc4->bcl,
+ vc4->rasterizer->config_bits[1] |
+ vc4->zsa->config_bits[1]);
+ cl_u8(&vc4->bcl,
+ vc4->rasterizer->config_bits[2] |
+ vc4->zsa->config_bits[2]);
}
if (vc4->dirty & VC4_DIRTY_VIEWPORT) {