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authorBrian Paul <brianp@vmware.com>2016-04-25 15:53:04 -0600
committerBrian Paul <brianp@vmware.com>2016-04-27 10:23:19 -0600
commitf93802c465b021592837c846d713146ddc1a8155 (patch)
treefebd0e2fe18c326c0de10d48c870ad617b7a1b7d /src/gallium/drivers/softpipe/sp_tex_tile_cache.c
parent562c4a17b7e4fb56c7db679233b4a48f8b80b0f2 (diff)
softpipe: s/Elements/ARRAY_SIZE/
Try to standardize on the later, which is defined in the common util/ directory. Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Diffstat (limited to 'src/gallium/drivers/softpipe/sp_tex_tile_cache.c')
-rw-r--r--src/gallium/drivers/softpipe/sp_tex_tile_cache.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/src/gallium/drivers/softpipe/sp_tex_tile_cache.c b/src/gallium/drivers/softpipe/sp_tex_tile_cache.c
index 21f38b2f859..8fbc972aa85 100644
--- a/src/gallium/drivers/softpipe/sp_tex_tile_cache.c
+++ b/src/gallium/drivers/softpipe/sp_tex_tile_cache.c
@@ -55,7 +55,7 @@ sp_create_tex_tile_cache( struct pipe_context *pipe )
tc = CALLOC_STRUCT( softpipe_tex_tile_cache );
if (tc) {
tc->pipe = pipe;
- for (pos = 0; pos < Elements(tc->entries); pos++) {
+ for (pos = 0; pos < ARRAY_SIZE(tc->entries); pos++) {
tc->entries[pos].addr.bits.invalid = 1;
}
tc->last_tile = &tc->entries[0]; /* any tile */
@@ -70,7 +70,7 @@ sp_destroy_tex_tile_cache(struct softpipe_tex_tile_cache *tc)
if (tc) {
uint pos;
- for (pos = 0; pos < Elements(tc->entries); pos++) {
+ for (pos = 0; pos < ARRAY_SIZE(tc->entries); pos++) {
/*assert(tc->entries[pos].x < 0);*/
}
if (tc->transfer) {
@@ -97,7 +97,7 @@ sp_tex_tile_cache_validate_texture(struct softpipe_tex_tile_cache *tc)
assert(tc);
assert(tc->texture);
- for (i = 0; i < Elements(tc->entries); i++) {
+ for (i = 0; i < ARRAY_SIZE(tc->entries); i++) {
tc->entries[i].addr.bits.invalid = 1;
}
}
@@ -147,7 +147,7 @@ sp_tex_tile_cache_set_sampler_view(struct softpipe_tex_tile_cache *tc,
/* mark as entries as invalid/empty */
/* XXX we should try to avoid this when the teximage hasn't changed */
- for (i = 0; i < Elements(tc->entries); i++) {
+ for (i = 0; i < ARRAY_SIZE(tc->entries); i++) {
tc->entries[i].addr.bits.invalid = 1;
}
@@ -169,7 +169,7 @@ sp_flush_tex_tile_cache(struct softpipe_tex_tile_cache *tc)
if (tc->texture) {
/* caching a texture, mark all entries as empty */
- for (pos = 0; pos < Elements(tc->entries); pos++) {
+ for (pos = 0; pos < ARRAY_SIZE(tc->entries); pos++) {
tc->entries[pos].addr.bits.invalid = 1;
}
tc->tex_z = -1;