diff options
author | Brian Paul <brianp@vmware.com> | 2013-03-14 07:45:59 -0600 |
---|---|---|
committer | Brian Paul <brianp@vmware.com> | 2013-03-14 18:17:18 -0600 |
commit | f4a2c29d932b91fe0a311a656b4ce1fa061a4f6b (patch) | |
tree | f011559414f88e0ce532d7905c8874e9df24a6d1 /src/gallium/drivers/softpipe/sp_tex_tile_cache.c | |
parent | 2f6970ae970860acaaaa21b2354f6e447faf15bd (diff) |
softpipe: fix up NUM_ENTRIES confusion
There were two different NUM_ENTRIES #defines for the framebuffer
tile cache and the texture tile cache. Rename the later to fix
the warnings:
In file included from sp_flush.c:40:0:
sp_tex_tile_cache.h:76:0: warning: "NUM_ENTRIES" redefined
sp_tile_cache.h:78:0: note: this is the location of the previous definition
In file included from sp_context.c:50:0:
sp_tex_tile_cache.h:76:0: warning: "NUM_ENTRIES" redefined
sp_tile_cache.h:78:0: note: this is the location of the previous definition
Also, replace occurances of NUM_ENTRIES with Element() macro to
be safer.
Reviewed-by: José Fonseca <jfonseca@vmware.com>
Diffstat (limited to 'src/gallium/drivers/softpipe/sp_tex_tile_cache.c')
-rw-r--r-- | src/gallium/drivers/softpipe/sp_tex_tile_cache.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/src/gallium/drivers/softpipe/sp_tex_tile_cache.c b/src/gallium/drivers/softpipe/sp_tex_tile_cache.c index b6a848bc5a7..af1024d2c19 100644 --- a/src/gallium/drivers/softpipe/sp_tex_tile_cache.c +++ b/src/gallium/drivers/softpipe/sp_tex_tile_cache.c @@ -55,7 +55,7 @@ sp_create_tex_tile_cache( struct pipe_context *pipe ) tc = CALLOC_STRUCT( softpipe_tex_tile_cache ); if (tc) { tc->pipe = pipe; - for (pos = 0; pos < NUM_ENTRIES; pos++) { + for (pos = 0; pos < Elements(tc->entries); pos++) { tc->entries[pos].addr.bits.invalid = 1; } tc->last_tile = &tc->entries[0]; /* any tile */ @@ -70,7 +70,7 @@ sp_destroy_tex_tile_cache(struct softpipe_tex_tile_cache *tc) if (tc) { uint pos; - for (pos = 0; pos < NUM_ENTRIES; pos++) { + for (pos = 0; pos < Elements(tc->entries); pos++) { /*assert(tc->entries[pos].x < 0);*/ } if (tc->transfer) { @@ -97,7 +97,7 @@ sp_tex_tile_cache_validate_texture(struct softpipe_tex_tile_cache *tc) assert(tc); assert(tc->texture); - for (i = 0; i < NUM_ENTRIES; i++) { + for (i = 0; i < Elements(tc->entries); i++) { tc->entries[i].addr.bits.invalid = 1; } } @@ -147,7 +147,7 @@ sp_tex_tile_cache_set_sampler_view(struct softpipe_tex_tile_cache *tc, /* mark as entries as invalid/empty */ /* XXX we should try to avoid this when the teximage hasn't changed */ - for (i = 0; i < NUM_ENTRIES; i++) { + for (i = 0; i < Elements(tc->entries); i++) { tc->entries[i].addr.bits.invalid = 1; } @@ -169,7 +169,7 @@ sp_flush_tex_tile_cache(struct softpipe_tex_tile_cache *tc) if (tc->texture) { /* caching a texture, mark all entries as empty */ - for (pos = 0; pos < NUM_ENTRIES; pos++) { + for (pos = 0; pos < Elements(tc->entries); pos++) { tc->entries[pos].addr.bits.invalid = 1; } tc->tex_face = -1; @@ -194,7 +194,7 @@ tex_cache_pos( union tex_tile_address addr ) addr.bits.face + addr.bits.level * 7); - return entry % NUM_ENTRIES; + return entry % NUM_TEX_TILE_ENTRIES; } /** |