diff options
| author | Ilia Mirkin <imirkin@alum.mit.edu> | 2014-04-25 22:40:42 -0400 |
|---|---|---|
| committer | Ilia Mirkin <imirkin@alum.mit.edu> | 2014-04-28 19:05:16 -0400 |
| commit | b4b20d42f6a8cd5aec3ba529a0b8d6ea22e73305 (patch) | |
| tree | 6e4561bca3585baa22a3de0cd87b849f78f3d523 /src/gallium/drivers/nouveau/codegen/nv50_ir.h | |
| parent | 1db993f2fe1c2b43a9658efba6eac93665bb859c (diff) | |
nvc0/ir: add support for new bitfield manipulation opcodes
This adds support for:
IBFE, UBFE, BFI, LSB, IMSB, UMSB, BREV, POPC
Which are all required for ARB_gs5 support.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Diffstat (limited to 'src/gallium/drivers/nouveau/codegen/nv50_ir.h')
| -rw-r--r-- | src/gallium/drivers/nouveau/codegen/nv50_ir.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir.h b/src/gallium/drivers/nouveau/codegen/nv50_ir.h index c57729e6343..919d3a4c7bd 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir.h +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir.h @@ -143,6 +143,7 @@ enum operation OP_POPCNT, // bitcount(src0 & src1) OP_INSBF, // insert first src1[8:15] bits of src0 into src2 at src1[0:7] OP_EXTBF, // place bits [K,K+N) of src0 into dst, src1 = 0xNNKK + OP_BFIND, // find highest/lowest set bit OP_PERMT, // dst = bytes from src2,src0 selected by src1 (nvc0's src order) OP_ATOM, OP_BAR, // execution barrier, sources = { id, thread count, predicate } @@ -171,6 +172,7 @@ enum operation #define NV50_IR_SUBOP_TEXBAR(n) n #define NV50_IR_SUBOP_MOV_FINAL 1 #define NV50_IR_SUBOP_EXTBF_REV 1 +#define NV50_IR_SUBOP_BFIND_SAMT 1 #define NV50_IR_SUBOP_PERMT_F4E 1 #define NV50_IR_SUBOP_PERMT_B4E 2 #define NV50_IR_SUBOP_PERMT_RC8 3 |