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authorBen Widawsky <benjamin.widawsky@intel.com>2017-05-11 15:37:45 -0700
committerAnuj Phogat <anuj.phogat@gmail.com>2017-06-09 16:03:00 -0700
commite179a3438a7794b13a1ffd3fbc65ac6e68e3f0de (patch)
tree08f1690487d5e01486bdaa66cfb4f193ab5b4001 /include
parentf2cbf738b4d4d51127c7a43952ed2660a9670f40 (diff)
i965/cnl: Add a preliminary device for Cannonlake
v2 (Anuj): Rebased on master and updated pci ids Remove redundant initialization of max_wm_threads to 64 * 12. For gen9+ max_wm_threads are initialized in gen_get_device_info(). v3 (Anuj): Move the patch to end of series. Remove unused gt1, gt2, gt3 functions. Remove l3_banks variable. Variable is now available on master. Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com> Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com> Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Diffstat (limited to 'include')
-rw-r--r--include/pci_ids/i965_pci_ids.h12
1 files changed, 12 insertions, 0 deletions
diff --git a/include/pci_ids/i965_pci_ids.h b/include/pci_ids/i965_pci_ids.h
index 17504f5cb61..b296359cde9 100644
--- a/include/pci_ids/i965_pci_ids.h
+++ b/include/pci_ids/i965_pci_ids.h
@@ -165,3 +165,15 @@ CHIPSET(0x5927, kbl_gt3, "Intel(R) Iris Plus Graphics 650 (Kaby Lake GT3)")
CHIPSET(0x593B, kbl_gt4, "Intel(R) Kabylake GT4")
CHIPSET(0x3184, glk, "Intel(R) HD Graphics (Geminilake)")
CHIPSET(0x3185, glk_2x6, "Intel(R) HD Graphics (Geminilake 2x6)")
+CHIPSET(0x5A49, cnl_2x8, "Intel(R) HD Graphics (Cannonlake 2x8 GT0.5)")
+CHIPSET(0x5A4A, cnl_2x8, "Intel(R) HD Graphics (Cannonlake 2x8 GT0.5)")
+CHIPSET(0x5A41, cnl_3x8, "Intel(R) HD Graphics (Cannonlake 3x8 GT1)")
+CHIPSET(0x5A42, cnl_3x8, "Intel(R) HD Graphics (Cannonlake 3x8 GT1)")
+CHIPSET(0x5A44, cnl_3x8, "Intel(R) HD Graphics (Cannonlake 3x8 GT1)")
+CHIPSET(0x5A59, cnl_4x8, "Intel(R) HD Graphics (Cannonlake 4x8 GT1.5)")
+CHIPSET(0x5A5A, cnl_4x8, "Intel(R) HD Graphics (Cannonlake 4x8 GT1.5)")
+CHIPSET(0x5A5C, cnl_4x8, "Intel(R) HD Graphics (Cannonlake 4x8 GT1.5)")
+CHIPSET(0x5A50, cnl_5x8, "Intel(R) HD Graphics (Cannonlake 5x8 GT2)")
+CHIPSET(0x5A51, cnl_5x8, "Intel(R) HD Graphics (Cannonlake 5x8 GT2)")
+CHIPSET(0x5A52, cnl_5x8, "Intel(R) HD Graphics (Cannonlake 5x8 GT2)")
+CHIPSET(0x5A54, cnl_5x8, "Intel(R) HD Graphics (Cannonlake 5x8 GT2)")