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authorLionel Landwerlin <lionel.g.landwerlin@intel.com>2023-08-30 13:37:33 +0300
committerMarge Bot <emma+marge@anholt.net>2023-09-08 18:05:08 +0000
commiteb0c19709065b40e6da90ad40ab4e3951a93928b (patch)
tree2df08ac82b9fc6d12eebccff11e184ed88836de4
parentfafb1a897e39ccae1278ab7b87cb6c1e14ac4b53 (diff)
anv: bound image usages to the associated queue family
When applying barriers for image transitions, we're currently considering all possible usages of an image. But when running on a compute only queue for example, the usage of an image will never be one of those : - VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT - VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT - VK_IMAGE_USAGE_TRANSIENT_ATTACHMENT_BIT - VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT - VK_IMAGE_USAGE_FRAGMENT_SHADING_RATE_ATTACHMENT_BIT_KHR Removing unused usages for the compute queue allows us to reduce the scope of the VK_IMAGE_LAYOUT_GENERAL for example. This a bunch of transition operation that are completely useless when dealing with barriers on the compute queue. Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Tapani Pälli <tapani.palli@intel.com> Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25092>
-rw-r--r--src/intel/vulkan/anv_blorp.c58
-rw-r--r--src/intel/vulkan/anv_image.c80
-rw-r--r--src/intel/vulkan/anv_private.h18
-rw-r--r--src/intel/vulkan/genX_cmd_buffer.c54
4 files changed, 150 insertions, 60 deletions
diff --git a/src/intel/vulkan/anv_blorp.c b/src/intel/vulkan/anv_blorp.c
index a1e8c855a4d..280582d87e6 100644
--- a/src/intel/vulkan/anv_blorp.c
+++ b/src/intel/vulkan/anv_blorp.c
@@ -209,7 +209,7 @@ anv_to_blorp_address(struct anv_address addr)
}
static void
-get_blorp_surf_for_anv_image(const struct anv_device *device,
+get_blorp_surf_for_anv_image(const struct anv_cmd_buffer *cmd_buffer,
const struct anv_image *image,
VkImageAspectFlags aspect,
VkImageUsageFlags usage,
@@ -217,12 +217,14 @@ get_blorp_surf_for_anv_image(const struct anv_device *device,
enum isl_aux_usage aux_usage,
struct blorp_surf *blorp_surf)
{
+ const struct anv_device *device = cmd_buffer->device;
const uint32_t plane = anv_image_aspect_to_plane(image, aspect);
if (layout != ANV_IMAGE_LAYOUT_EXPLICIT_AUX) {
assert(usage != 0);
aux_usage = anv_layout_to_aux_usage(device->info, image,
- aspect, usage, layout);
+ aspect, usage, layout,
+ cmd_buffer->queue_family->queueFlags);
}
isl_surf_usage_flags_t mocs_usage =
@@ -325,12 +327,12 @@ copy_image(struct anv_cmd_buffer *cmd_buffer,
if (util_bitcount(src_mask) > 1) {
anv_foreach_image_aspect_bit(aspect_bit, src_image, src_mask) {
struct blorp_surf src_surf, dst_surf;
- get_blorp_surf_for_anv_image(cmd_buffer->device,
+ get_blorp_surf_for_anv_image(cmd_buffer,
src_image, 1UL << aspect_bit,
VK_IMAGE_USAGE_TRANSFER_SRC_BIT,
src_image_layout, ISL_AUX_USAGE_NONE,
&src_surf);
- get_blorp_surf_for_anv_image(cmd_buffer->device,
+ get_blorp_surf_for_anv_image(cmd_buffer,
dst_image, 1UL << aspect_bit,
VK_IMAGE_USAGE_TRANSFER_DST_BIT,
dst_image_layout, ISL_AUX_USAGE_NONE,
@@ -350,11 +352,11 @@ copy_image(struct anv_cmd_buffer *cmd_buffer,
}
} else {
struct blorp_surf src_surf, dst_surf;
- get_blorp_surf_for_anv_image(cmd_buffer->device, src_image, src_mask,
+ get_blorp_surf_for_anv_image(cmd_buffer, src_image, src_mask,
VK_IMAGE_USAGE_TRANSFER_SRC_BIT,
src_image_layout, ISL_AUX_USAGE_NONE,
&src_surf);
- get_blorp_surf_for_anv_image(cmd_buffer->device, dst_image, dst_mask,
+ get_blorp_surf_for_anv_image(cmd_buffer, dst_image, dst_mask,
VK_IMAGE_USAGE_TRANSFER_DST_BIT,
dst_image_layout, ISL_AUX_USAGE_NONE,
&dst_surf);
@@ -485,7 +487,7 @@ copy_buffer_to_image(struct anv_cmd_buffer *cmd_buffer,
const VkImageAspectFlags aspect = region->imageSubresource.aspectMask;
- get_blorp_surf_for_anv_image(cmd_buffer->device, anv_image, aspect,
+ get_blorp_surf_for_anv_image(cmd_buffer, anv_image, aspect,
buffer_to_image ?
VK_IMAGE_USAGE_TRANSFER_DST_BIT :
VK_IMAGE_USAGE_TRANSFER_SRC_BIT,
@@ -667,11 +669,11 @@ blit_image(struct anv_cmd_buffer *cmd_buffer,
dst_res->aspectMask));
anv_foreach_image_aspect_bit(aspect_bit, src_image, src_res->aspectMask) {
- get_blorp_surf_for_anv_image(cmd_buffer->device,
+ get_blorp_surf_for_anv_image(cmd_buffer,
src_image, 1U << aspect_bit,
VK_IMAGE_USAGE_TRANSFER_SRC_BIT,
src_image_layout, ISL_AUX_USAGE_NONE, &src);
- get_blorp_surf_for_anv_image(cmd_buffer->device,
+ get_blorp_surf_for_anv_image(cmd_buffer,
dst_image, 1U << aspect_bit,
VK_IMAGE_USAGE_TRANSFER_DST_BIT,
dst_image_layout, ISL_AUX_USAGE_NONE, &dst);
@@ -1042,7 +1044,7 @@ void anv_CmdClearColorImage(
assert(pRanges[r].aspectMask & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV);
struct blorp_surf surf;
- get_blorp_surf_for_anv_image(cmd_buffer->device,
+ get_blorp_surf_for_anv_image(cmd_buffer,
image, pRanges[r].aspectMask,
VK_IMAGE_USAGE_TRANSFER_DST_BIT,
imageLayout, ISL_AUX_USAGE_NONE, &surf);
@@ -1103,7 +1105,7 @@ void anv_CmdClearDepthStencilImage(
struct blorp_surf depth, stencil;
if (image->vk.aspects & VK_IMAGE_ASPECT_DEPTH_BIT) {
- get_blorp_surf_for_anv_image(cmd_buffer->device,
+ get_blorp_surf_for_anv_image(cmd_buffer,
image, VK_IMAGE_ASPECT_DEPTH_BIT,
VK_IMAGE_USAGE_TRANSFER_DST_BIT,
imageLayout, ISL_AUX_USAGE_NONE, &depth);
@@ -1112,7 +1114,7 @@ void anv_CmdClearDepthStencilImage(
}
if (image->vk.aspects & VK_IMAGE_ASPECT_STENCIL_BIT) {
- get_blorp_surf_for_anv_image(cmd_buffer->device,
+ get_blorp_surf_for_anv_image(cmd_buffer,
image, VK_IMAGE_ASPECT_STENCIL_BIT,
VK_IMAGE_USAGE_TRANSFER_DST_BIT,
imageLayout, ISL_AUX_USAGE_NONE, &stencil);
@@ -1238,7 +1240,8 @@ can_fast_clear_color_att(struct anv_cmd_buffer *cmd_buffer,
att->layout,
clear_color,
pRects->layerCount,
- pRects->rect);
+ pRects->rect,
+ cmd_buffer->queue_family->queueFlags);
}
static void
@@ -1262,7 +1265,7 @@ exec_ccs_op(struct anv_cmd_buffer *cmd_buffer,
const struct intel_device_info *devinfo = cmd_buffer->device->info;
struct blorp_surf surf;
- get_blorp_surf_for_anv_image(cmd_buffer->device, image, aspect,
+ get_blorp_surf_for_anv_image(cmd_buffer, image, aspect,
0, ANV_IMAGE_LAYOUT_EXPLICIT_AUX,
image->planes[plane].aux_usage,
&surf);
@@ -1426,7 +1429,7 @@ exec_mcs_op(struct anv_cmd_buffer *cmd_buffer,
const struct intel_device_info *devinfo = cmd_buffer->device->info;
struct blorp_surf surf;
- get_blorp_surf_for_anv_image(cmd_buffer->device, image, aspect,
+ get_blorp_surf_for_anv_image(cmd_buffer, image, aspect,
0, ANV_IMAGE_LAYOUT_EXPLICIT_AUX,
ISL_AUX_USAGE_MCS, &surf);
@@ -1653,7 +1656,7 @@ anv_fast_clear_depth_stencil(struct anv_cmd_buffer *cmd_buffer,
anv_image_aspect_to_plane(image, VK_IMAGE_ASPECT_DEPTH_BIT);
assert(base_layer + layer_count <=
anv_image_aux_layers(image, VK_IMAGE_ASPECT_DEPTH_BIT, level));
- get_blorp_surf_for_anv_image(cmd_buffer->device,
+ get_blorp_surf_for_anv_image(cmd_buffer,
image, VK_IMAGE_ASPECT_DEPTH_BIT,
0, ANV_IMAGE_LAYOUT_EXPLICIT_AUX,
image->planes[plane].aux_usage, &depth);
@@ -1663,7 +1666,7 @@ anv_fast_clear_depth_stencil(struct anv_cmd_buffer *cmd_buffer,
if (aspects & VK_IMAGE_ASPECT_STENCIL_BIT) {
const uint32_t plane =
anv_image_aspect_to_plane(image, VK_IMAGE_ASPECT_STENCIL_BIT);
- get_blorp_surf_for_anv_image(cmd_buffer->device,
+ get_blorp_surf_for_anv_image(cmd_buffer,
image, VK_IMAGE_ASPECT_STENCIL_BIT,
0, ANV_IMAGE_LAYOUT_EXPLICIT_AUX,
image->planes[plane].aux_usage, &stencil);
@@ -1799,7 +1802,8 @@ can_hiz_clear_att(struct anv_cmd_buffer *cmd_buffer,
ds_att->layout,
attachment->aspectMask,
attachment->clearValue.depthStencil.depth,
- pRects->rect);
+ pRects->rect,
+ cmd_buffer->queue_family->queueFlags);
}
static void
@@ -1948,7 +1952,7 @@ anv_image_msaa_resolve(struct anv_cmd_buffer *cmd_buffer,
assert(dst_image->vk.samples == 1);
struct blorp_surf src_surf, dst_surf;
- get_blorp_surf_for_anv_image(cmd_buffer->device, src_image, aspect,
+ get_blorp_surf_for_anv_image(cmd_buffer, src_image, aspect,
VK_IMAGE_USAGE_TRANSFER_SRC_BIT,
ANV_IMAGE_LAYOUT_EXPLICIT_AUX,
src_aux_usage, &src_surf);
@@ -1957,7 +1961,7 @@ anv_image_msaa_resolve(struct anv_cmd_buffer *cmd_buffer,
anv_image_get_clear_color_addr(cmd_buffer->device, src_image,
VK_IMAGE_ASPECT_COLOR_BIT));
}
- get_blorp_surf_for_anv_image(cmd_buffer->device, dst_image, aspect,
+ get_blorp_surf_for_anv_image(cmd_buffer, dst_image, aspect,
VK_IMAGE_USAGE_TRANSFER_DST_BIT,
ANV_IMAGE_LAYOUT_EXPLICIT_AUX,
dst_aux_usage, &dst_surf);
@@ -2013,12 +2017,14 @@ resolve_image(struct anv_cmd_buffer *cmd_buffer,
anv_layout_to_aux_usage(cmd_buffer->device->info, src_image,
(1 << aspect_bit),
VK_IMAGE_USAGE_TRANSFER_SRC_BIT,
- src_image_layout);
+ src_image_layout,
+ cmd_buffer->queue_family->queueFlags);
enum isl_aux_usage dst_aux_usage =
anv_layout_to_aux_usage(cmd_buffer->device->info, dst_image,
(1 << aspect_bit),
VK_IMAGE_USAGE_TRANSFER_DST_BIT,
- dst_image_layout);
+ dst_image_layout,
+ cmd_buffer->queue_family->queueFlags);
anv_image_msaa_resolve(cmd_buffer,
src_image, src_aux_usage,
@@ -2072,7 +2078,7 @@ anv_image_clear_color(struct anv_cmd_buffer *cmd_buffer,
anv_blorp_batch_init(cmd_buffer, &batch, 0);
struct blorp_surf surf;
- get_blorp_surf_for_anv_image(cmd_buffer->device, image, aspect,
+ get_blorp_surf_for_anv_image(cmd_buffer, image, aspect,
VK_IMAGE_USAGE_TRANSFER_DST_BIT,
ANV_IMAGE_LAYOUT_EXPLICIT_AUX,
aux_usage, &surf);
@@ -2108,7 +2114,7 @@ anv_image_clear_depth_stencil(struct anv_cmd_buffer *cmd_buffer,
struct blorp_surf depth = {};
if (aspects & VK_IMAGE_ASPECT_DEPTH_BIT) {
- get_blorp_surf_for_anv_image(cmd_buffer->device,
+ get_blorp_surf_for_anv_image(cmd_buffer,
image, VK_IMAGE_ASPECT_DEPTH_BIT,
0, ANV_IMAGE_LAYOUT_EXPLICIT_AUX,
depth_aux_usage, &depth);
@@ -2118,7 +2124,7 @@ anv_image_clear_depth_stencil(struct anv_cmd_buffer *cmd_buffer,
if (aspects & VK_IMAGE_ASPECT_STENCIL_BIT) {
const uint32_t plane =
anv_image_aspect_to_plane(image, VK_IMAGE_ASPECT_STENCIL_BIT);
- get_blorp_surf_for_anv_image(cmd_buffer->device,
+ get_blorp_surf_for_anv_image(cmd_buffer,
image, VK_IMAGE_ASPECT_STENCIL_BIT,
0, ANV_IMAGE_LAYOUT_EXPLICIT_AUX,
image->planes[plane].aux_usage, &stencil);
@@ -2172,7 +2178,7 @@ anv_image_hiz_op(struct anv_cmd_buffer *cmd_buffer,
assert((batch.flags & BLORP_BATCH_USE_COMPUTE) == 0);
struct blorp_surf surf;
- get_blorp_surf_for_anv_image(cmd_buffer->device,
+ get_blorp_surf_for_anv_image(cmd_buffer,
image, VK_IMAGE_ASPECT_DEPTH_BIT,
0, ANV_IMAGE_LAYOUT_EXPLICIT_AUX,
image->planes[plane].aux_usage, &surf);
diff --git a/src/intel/vulkan/anv_image.c b/src/intel/vulkan/anv_image.c
index 3d36e478188..5fa0a1aa678 100644
--- a/src/intel/vulkan/anv_image.c
+++ b/src/intel/vulkan/anv_image.c
@@ -2119,6 +2119,42 @@ void anv_GetImageSubresourceLayout2KHR(
anv_get_image_subresource_layout(image, pSubresource, pLayout);
}
+static VkImageUsageFlags
+anv_image_flags_filter_for_queue(VkImageUsageFlags usages,
+ VkQueueFlagBits queue_flags)
+{
+ /* Eliminate graphics usages if the queue is not graphics capable */
+ if (!(queue_flags & VK_QUEUE_GRAPHICS_BIT)) {
+ usages &= ~(VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT |
+ VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT |
+ VK_IMAGE_USAGE_TRANSIENT_ATTACHMENT_BIT |
+ VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT |
+ VK_IMAGE_USAGE_FRAGMENT_DENSITY_MAP_BIT_EXT |
+ VK_IMAGE_USAGE_FRAGMENT_SHADING_RATE_ATTACHMENT_BIT_KHR |
+ VK_IMAGE_USAGE_ATTACHMENT_FEEDBACK_LOOP_BIT_EXT);
+ }
+
+ /* Eliminate sampling & storage usages if the queue is neither graphics nor
+ * compute capable
+ */
+ if (!(queue_flags & (VK_QUEUE_GRAPHICS_BIT | VK_QUEUE_COMPUTE_BIT))) {
+ usages &= ~(VK_IMAGE_USAGE_SAMPLED_BIT |
+ VK_IMAGE_USAGE_STORAGE_BIT);
+ }
+
+ /* Eliminate transfer usages if the queue is neither transfer, compute or
+ * graphics capable
+ */
+ if (!(queue_flags & (VK_QUEUE_TRANSFER_BIT |
+ VK_QUEUE_COMPUTE_BIT |
+ VK_QUEUE_GRAPHICS_BIT))) {
+ usages &= ~(VK_IMAGE_USAGE_TRANSFER_SRC_BIT |
+ VK_IMAGE_USAGE_TRANSFER_DST_BIT);
+ }
+
+ return usages;
+}
+
/**
* This function returns the assumed isl_aux_state for a given VkImageLayout.
* Because Vulkan image layouts don't map directly to isl_aux_state enums, the
@@ -2135,7 +2171,8 @@ enum isl_aux_state ATTRIBUTE_PURE
anv_layout_to_aux_state(const struct intel_device_info * const devinfo,
const struct anv_image * const image,
const VkImageAspectFlagBits aspect,
- const VkImageLayout layout)
+ const VkImageLayout layout,
+ const VkQueueFlagBits queue_flags)
{
/* Validate the inputs. */
@@ -2211,7 +2248,8 @@ anv_layout_to_aux_state(const struct intel_device_info * const devinfo,
const bool read_only = vk_image_layout_is_read_only(layout, aspect);
const VkImageUsageFlags image_aspect_usage =
- vk_image_usage(&image->vk, aspect);
+ anv_image_flags_filter_for_queue(
+ vk_image_usage(&image->vk, aspect), queue_flags);
const VkImageUsageFlags usage =
vk_image_layout_to_usage_flags(layout, aspect) & image_aspect_usage;
@@ -2343,7 +2381,8 @@ anv_layout_to_aux_usage(const struct intel_device_info * const devinfo,
const struct anv_image * const image,
const VkImageAspectFlagBits aspect,
const VkImageUsageFlagBits usage,
- const VkImageLayout layout)
+ const VkImageLayout layout,
+ const VkQueueFlagBits queue_flags)
{
const uint32_t plane = anv_image_aspect_to_plane(image, aspect);
@@ -2354,7 +2393,7 @@ anv_layout_to_aux_usage(const struct intel_device_info * const devinfo,
return ISL_AUX_USAGE_NONE;
enum isl_aux_state aux_state =
- anv_layout_to_aux_state(devinfo, image, aspect, layout);
+ anv_layout_to_aux_state(devinfo, image, aspect, layout, queue_flags);
switch (aux_state) {
case ISL_AUX_STATE_CLEAR:
@@ -2409,7 +2448,8 @@ enum anv_fast_clear_type ATTRIBUTE_PURE
anv_layout_to_fast_clear_type(const struct intel_device_info * const devinfo,
const struct anv_image * const image,
const VkImageAspectFlagBits aspect,
- const VkImageLayout layout)
+ const VkImageLayout layout,
+ const VkQueueFlagBits queue_flags)
{
if (INTEL_DEBUG(DEBUG_NO_FAST_CLEAR))
return ANV_FAST_CLEAR_NONE;
@@ -2421,7 +2461,7 @@ anv_layout_to_fast_clear_type(const struct intel_device_info * const devinfo,
return ANV_FAST_CLEAR_NONE;
enum isl_aux_state aux_state =
- anv_layout_to_aux_state(devinfo, image, aspect, layout);
+ anv_layout_to_aux_state(devinfo, image, aspect, layout, queue_flags);
const VkImageUsageFlags layout_usage =
vk_image_layout_to_usage_flags(layout, aspect);
@@ -2502,7 +2542,8 @@ bool
anv_layout_has_untracked_aux_writes(const struct intel_device_info * const devinfo,
const struct anv_image * const image,
const VkImageAspectFlagBits aspect,
- const VkImageLayout layout)
+ const VkImageLayout layout,
+ const VkQueueFlagBits queue_flags)
{
const VkImageUsageFlags image_aspect_usage =
vk_image_usage(&image->vk, aspect);
@@ -2684,7 +2725,8 @@ anv_can_hiz_clear_ds_view(struct anv_device *device,
VkImageLayout layout,
VkImageAspectFlags clear_aspects,
float depth_clear_value,
- VkRect2D render_area)
+ VkRect2D render_area,
+ const VkQueueFlagBits queue_flags)
{
if (INTEL_DEBUG(DEBUG_NO_FAST_CLEAR))
return false;
@@ -2701,7 +2743,7 @@ anv_can_hiz_clear_ds_view(struct anv_device *device,
anv_layout_to_aux_usage(device->info, iview->image,
VK_IMAGE_ASPECT_DEPTH_BIT,
VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT,
- layout);
+ layout, queue_flags);
if (!blorp_can_hiz_clear_depth(device->info,
&iview->image->planes[0].primary_surface.isl,
clear_aux_usage,
@@ -2747,7 +2789,8 @@ anv_can_fast_clear_color_view(struct anv_device *device,
VkImageLayout layout,
union isl_color_value clear_color,
uint32_t num_layers,
- VkRect2D render_area)
+ VkRect2D render_area,
+ const VkQueueFlagBits queue_flags)
{
if (INTEL_DEBUG(DEBUG_NO_FAST_CLEAR))
return false;
@@ -2764,7 +2807,7 @@ anv_can_fast_clear_color_view(struct anv_device *device,
enum anv_fast_clear_type fast_clear_type =
anv_layout_to_fast_clear_type(device->info, iview->image,
VK_IMAGE_ASPECT_COLOR_BIT,
- layout);
+ layout, queue_flags);
switch (fast_clear_type) {
case ANV_FAST_CLEAR_NONE:
return false;
@@ -2894,11 +2937,17 @@ anv_CreateImageView(VkDevice _device,
enum isl_aux_usage general_aux_usage =
anv_layout_to_aux_usage(device->info, image, 1UL << iaspect_bit,
VK_IMAGE_USAGE_SAMPLED_BIT,
- VK_IMAGE_LAYOUT_GENERAL);
+ VK_IMAGE_LAYOUT_GENERAL,
+ VK_QUEUE_GRAPHICS_BIT |
+ VK_QUEUE_COMPUTE_BIT |
+ VK_QUEUE_TRANSFER_BIT);
enum isl_aux_usage optimal_aux_usage =
anv_layout_to_aux_usage(device->info, image, 1UL << iaspect_bit,
VK_IMAGE_USAGE_SAMPLED_BIT,
- VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL);
+ VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL,
+ VK_QUEUE_GRAPHICS_BIT |
+ VK_QUEUE_COMPUTE_BIT |
+ VK_QUEUE_TRANSFER_BIT);
anv_image_fill_surface_state(device, image, 1ULL << iaspect_bit,
&iview->planes[vplane].isl,
@@ -2926,7 +2975,10 @@ anv_CreateImageView(VkDevice _device,
enum isl_aux_usage general_aux_usage =
anv_layout_to_aux_usage(device->info, image, 1UL << iaspect_bit,
VK_IMAGE_USAGE_STORAGE_BIT,
- VK_IMAGE_LAYOUT_GENERAL);
+ VK_IMAGE_LAYOUT_GENERAL,
+ VK_QUEUE_GRAPHICS_BIT |
+ VK_QUEUE_COMPUTE_BIT |
+ VK_QUEUE_TRANSFER_BIT);
iview->planes[vplane].storage.state =
maybe_alloc_surface_state(device);
diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h
index 2d6acce6361..69d20c2a4cd 100644
--- a/src/intel/vulkan/anv_private.h
+++ b/src/intel/vulkan/anv_private.h
@@ -4814,7 +4814,8 @@ anv_can_hiz_clear_ds_view(struct anv_device *device,
VkImageLayout layout,
VkImageAspectFlags clear_aspects,
float depth_clear_value,
- VkRect2D render_area);
+ VkRect2D render_area,
+ const VkQueueFlagBits queue_flags);
bool
anv_can_fast_clear_color_view(struct anv_device *device,
@@ -4822,32 +4823,37 @@ anv_can_fast_clear_color_view(struct anv_device *device,
VkImageLayout layout,
union isl_color_value clear_color,
uint32_t num_layers,
- VkRect2D render_area);
+ VkRect2D render_area,
+ const VkQueueFlagBits queue_flags);
enum isl_aux_state ATTRIBUTE_PURE
anv_layout_to_aux_state(const struct intel_device_info * const devinfo,
const struct anv_image *image,
const VkImageAspectFlagBits aspect,
- const VkImageLayout layout);
+ const VkImageLayout layout,
+ const VkQueueFlagBits queue_flags);
enum isl_aux_usage ATTRIBUTE_PURE
anv_layout_to_aux_usage(const struct intel_device_info * const devinfo,
const struct anv_image *image,
const VkImageAspectFlagBits aspect,
const VkImageUsageFlagBits usage,
- const VkImageLayout layout);
+ const VkImageLayout layout,
+ const VkQueueFlagBits queue_flags);
enum anv_fast_clear_type ATTRIBUTE_PURE
anv_layout_to_fast_clear_type(const struct intel_device_info * const devinfo,
const struct anv_image * const image,
const VkImageAspectFlagBits aspect,
- const VkImageLayout layout);
+ const VkImageLayout layout,
+ const VkQueueFlagBits queue_flags);
bool ATTRIBUTE_PURE
anv_layout_has_untracked_aux_writes(const struct intel_device_info * const devinfo,
const struct anv_image * const image,
const VkImageAspectFlagBits aspect,
- const VkImageLayout layout);
+ const VkImageLayout layout,
+ const VkQueueFlagBits queue_flags);
static inline bool
anv_image_aspects_compatible(VkImageAspectFlags aspects1,
diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c
index 40fc7bf2f36..2d7ce49060d 100644
--- a/src/intel/vulkan/genX_cmd_buffer.c
+++ b/src/intel/vulkan/genX_cmd_buffer.c
@@ -484,11 +484,13 @@ transition_depth_buffer(struct anv_cmd_buffer *cmd_buffer,
const enum isl_aux_state initial_state =
anv_layout_to_aux_state(cmd_buffer->device->info, image,
VK_IMAGE_ASPECT_DEPTH_BIT,
- initial_layout);
+ initial_layout,
+ cmd_buffer->queue_family->queueFlags);
const enum isl_aux_state final_state =
anv_layout_to_aux_state(cmd_buffer->device->info, image,
VK_IMAGE_ASPECT_DEPTH_BIT,
- final_layout);
+ final_layout,
+ cmd_buffer->queue_family->queueFlags);
const bool initial_depth_valid =
isl_aux_state_has_valid_primary(initial_state);
@@ -962,6 +964,18 @@ transition_color_buffer(struct anv_cmd_buffer *cmd_buffer,
dst_queue_family == VK_QUEUE_FAMILY_FOREIGN_EXT ||
dst_queue_family == VK_QUEUE_FAMILY_EXTERNAL;
+ /* If the queues are external, consider the first queue family flags
+ * (should be the most capable)
+ */
+ const VkQueueFlagBits src_queue_flags =
+ device->physical->queue.families[
+ (src_queue_external || src_queue_family == VK_QUEUE_FAMILY_IGNORED) ?
+ 0 : src_queue_family].queueFlags;
+ const VkQueueFlagBits dst_queue_flags =
+ device->physical->queue.families[
+ (dst_queue_external || src_queue_family == VK_QUEUE_FAMILY_IGNORED) ?
+ 0 : dst_queue_family].queueFlags;
+
/* Simultaneous acquire and release on external queues is illegal. */
assert(!src_queue_external || !dst_queue_external);
@@ -1017,13 +1031,17 @@ transition_color_buffer(struct anv_cmd_buffer *cmd_buffer,
return;
enum isl_aux_usage initial_aux_usage =
- anv_layout_to_aux_usage(devinfo, image, aspect, 0, initial_layout);
+ anv_layout_to_aux_usage(devinfo, image, aspect, 0,
+ initial_layout, src_queue_flags);
enum isl_aux_usage final_aux_usage =
- anv_layout_to_aux_usage(devinfo, image, aspect, 0, final_layout);
+ anv_layout_to_aux_usage(devinfo, image, aspect, 0,
+ final_layout, dst_queue_flags);
enum anv_fast_clear_type initial_fast_clear =
- anv_layout_to_fast_clear_type(devinfo, image, aspect, initial_layout);
+ anv_layout_to_fast_clear_type(devinfo, image, aspect, initial_layout,
+ src_queue_flags);
enum anv_fast_clear_type final_fast_clear =
- anv_layout_to_fast_clear_type(devinfo, image, aspect, final_layout);
+ anv_layout_to_fast_clear_type(devinfo, image, aspect, final_layout,
+ dst_queue_flags);
/* We must override the anv_layout_to_* functions because they are unaware
* of acquire/release direction.
@@ -3930,7 +3948,8 @@ cmd_buffer_barrier(struct anv_cmd_buffer *cmd_buffer,
if (anv_layout_has_untracked_aux_writes(
cmd_buffer->device->info,
image, aspect,
- img_barrier->newLayout)) {
+ img_barrier->newLayout,
+ cmd_buffer->queue_family->queueFlags)) {
for (uint32_t l = 0; l < level_count; l++) {
set_image_compressed_bit(cmd_buffer, image, aspect,
range->baseMipLevel + l,
@@ -6952,7 +6971,8 @@ void genX(CmdBeginRendering)(
iview->image,
VK_IMAGE_ASPECT_COLOR_BIT,
VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT,
- att->imageLayout);
+ att->imageLayout,
+ cmd_buffer->queue_family->queueFlags);
union isl_color_value fast_clear_color = { .u32 = { 0, } };
@@ -6967,7 +6987,8 @@ void genX(CmdBeginRendering)(
(!is_multiview || (gfx->view_mask & 1)) &&
anv_can_fast_clear_color_view(cmd_buffer->device, iview,
att->imageLayout, clear_color,
- layers, render_area);
+ layers, render_area,
+ cmd_buffer->queue_family->queueFlags);
if (att->imageLayout != initial_layout) {
assert(render_area.offset.x == 0 && render_area.offset.y == 0 &&
@@ -7139,7 +7160,8 @@ void genX(CmdBeginRendering)(
d_iview->image,
VK_IMAGE_ASPECT_DEPTH_BIT,
VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT,
- depth_layout);
+ depth_layout,
+ cmd_buffer->queue_family->queueFlags);
depth_clear_value = d_att->clearValue.depthStencil.depth;
}
@@ -7152,7 +7174,8 @@ void genX(CmdBeginRendering)(
s_iview->image,
VK_IMAGE_ASPECT_STENCIL_BIT,
VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT,
- stencil_layout);
+ stencil_layout,
+ cmd_buffer->queue_family->queueFlags);
stencil_clear_value = s_att->clearValue.depthStencil.stencil;
}
@@ -7185,7 +7208,8 @@ void genX(CmdBeginRendering)(
anv_can_hiz_clear_ds_view(cmd_buffer->device, d_iview,
depth_layout, clear_aspects,
depth_clear_value,
- render_area);
+ render_area,
+ cmd_buffer->queue_family->queueFlags);
if (depth_layout != initial_depth_layout) {
assert(render_area.offset.x == 0 && render_area.offset.y == 0 &&
@@ -7441,13 +7465,15 @@ cmd_buffer_resolve_msaa_attachment(struct anv_cmd_buffer *cmd_buffer,
anv_layout_to_aux_usage(cmd_buffer->device->info,
src_iview->image, aspect,
VK_IMAGE_USAGE_TRANSFER_SRC_BIT,
- layout);
+ layout,
+ cmd_buffer->queue_family->queueFlags);
enum isl_aux_usage dst_aux_usage =
anv_layout_to_aux_usage(cmd_buffer->device->info,
dst_iview->image, aspect,
VK_IMAGE_USAGE_TRANSFER_DST_BIT,
- att->resolve_layout);
+ att->resolve_layout,
+ cmd_buffer->queue_family->queueFlags);
enum blorp_filter filter = vk_to_blorp_resolve_mode(att->resolve_mode);