diff options
author | Marek Olšák <marek.olsak@amd.com> | 2021-02-13 11:00:58 -0500 |
---|---|---|
committer | Marek Olšák <marek.olsak@amd.com> | 2021-02-17 04:49:24 -0500 |
commit | d47c44add80cfde213a9d5763c1fb633fac914ff (patch) | |
tree | 594f2243d0521f39d1b688f27c68dff26006ebd8 | |
parent | 5e47d6fc73a360a9230f1136005399f7d4d475df (diff) |
radeonsi: gather info about bindless images and memory stores with strstr(intr)
This is only code simplification.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9028>
-rw-r--r-- | src/gallium/drivers/radeonsi/si_shader_nir.c | 67 |
1 files changed, 13 insertions, 54 deletions
diff --git a/src/gallium/drivers/radeonsi/si_shader_nir.c b/src/gallium/drivers/radeonsi/si_shader_nir.c index 239a6b8f8b4..ceb2c3e35b7 100644 --- a/src/gallium/drivers/radeonsi/si_shader_nir.c +++ b/src/gallium/drivers/radeonsi/si_shader_nir.c @@ -184,6 +184,19 @@ static void scan_instruction(const struct nir_shader *nir, struct si_shader_info info->uses_bindless_samplers = true; } else if (instr->type == nir_instr_type_intrinsic) { nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr); + const char *intr_name = nir_intrinsic_infos[intr->intrinsic].name; + bool is_bindless_image = strstr(intr_name, "bindless_image"); + + if (is_bindless_image) + info->uses_bindless_images = true; + + if (strstr(intr_name, "image_atomic") || + strstr(intr_name, "image_store") || + strstr(intr_name, "image_deref_atomic") || + strstr(intr_name, "image_deref_store") || + strstr(intr_name, "ssbo_atomic") || + intr->intrinsic == nir_intrinsic_store_ssbo) + info->num_memory_stores++; switch (intr->intrinsic) { case nir_intrinsic_load_local_invocation_id: @@ -199,60 +212,6 @@ static void scan_instruction(const struct nir_shader *nir, struct si_shader_info } break; } - case nir_intrinsic_bindless_image_load: - case nir_intrinsic_bindless_image_size: - case nir_intrinsic_bindless_image_samples: - info->uses_bindless_images = true; - break; - case nir_intrinsic_bindless_image_store: - info->uses_bindless_images = true; - info->num_memory_stores++; - break; - case nir_intrinsic_image_deref_store: - info->num_memory_stores++; - break; - case nir_intrinsic_bindless_image_atomic_add: - case nir_intrinsic_bindless_image_atomic_imin: - case nir_intrinsic_bindless_image_atomic_umin: - case nir_intrinsic_bindless_image_atomic_imax: - case nir_intrinsic_bindless_image_atomic_umax: - case nir_intrinsic_bindless_image_atomic_and: - case nir_intrinsic_bindless_image_atomic_or: - case nir_intrinsic_bindless_image_atomic_xor: - case nir_intrinsic_bindless_image_atomic_exchange: - case nir_intrinsic_bindless_image_atomic_comp_swap: - case nir_intrinsic_bindless_image_atomic_inc_wrap: - case nir_intrinsic_bindless_image_atomic_dec_wrap: - info->uses_bindless_images = true; - info->num_memory_stores++; - break; - case nir_intrinsic_image_deref_atomic_add: - case nir_intrinsic_image_deref_atomic_imin: - case nir_intrinsic_image_deref_atomic_umin: - case nir_intrinsic_image_deref_atomic_imax: - case nir_intrinsic_image_deref_atomic_umax: - case nir_intrinsic_image_deref_atomic_and: - case nir_intrinsic_image_deref_atomic_or: - case nir_intrinsic_image_deref_atomic_xor: - case nir_intrinsic_image_deref_atomic_exchange: - case nir_intrinsic_image_deref_atomic_comp_swap: - case nir_intrinsic_image_deref_atomic_inc_wrap: - case nir_intrinsic_image_deref_atomic_dec_wrap: - info->num_memory_stores++; - break; - case nir_intrinsic_store_ssbo: - case nir_intrinsic_ssbo_atomic_add: - case nir_intrinsic_ssbo_atomic_imin: - case nir_intrinsic_ssbo_atomic_umin: - case nir_intrinsic_ssbo_atomic_imax: - case nir_intrinsic_ssbo_atomic_umax: - case nir_intrinsic_ssbo_atomic_and: - case nir_intrinsic_ssbo_atomic_or: - case nir_intrinsic_ssbo_atomic_xor: - case nir_intrinsic_ssbo_atomic_exchange: - case nir_intrinsic_ssbo_atomic_comp_swap: - info->num_memory_stores++; - break; case nir_intrinsic_load_color0: case nir_intrinsic_load_color1: { unsigned index = intr->intrinsic == nir_intrinsic_load_color1; |