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authorJames Zhu <James.Zhu@amd.com>2020-05-26 09:28:41 -0400
committerJames Zhu <James.Zhu@amd.com>2020-05-27 10:49:02 -0400
commita91306677c613ba7511b764b3decc9db42b24de1 (patch)
tree18535bacb18d391667424657e8598b03000a3934
parent296c04d78c9840f83e7fcaf9b45a4cee96752348 (diff)
ac/gpu_info: Correct Acturus cu bitmap
The cu bitmap in amd gpu info structure is 4x4 size array, and it's usually suitable for Vega ASICs which has 4*2 SE/SH layout. But for Arcturus, SE/SH layout is changed to 8*1. To mostly reduce the impact, we make it compatible with current bitmap array as below: SE4,SH0 --> cu_bitmap[0][1] SE5,SH0 --> cu_bitmap[1][1] SE6,SH0 --> cu_bitmap[2][1] SE7,SH0 --> cu_bitmap[3][1] Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5212>
-rw-r--r--src/amd/common/ac_gpu_info.c14
1 files changed, 13 insertions, 1 deletions
diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c
index bdd8de374dd..f0128dcf0f0 100644
--- a/src/amd/common/ac_gpu_info.c
+++ b/src/amd/common/ac_gpu_info.c
@@ -619,7 +619,19 @@ bool ac_query_gpu_info(int fd, void *dev_p,
info->num_good_compute_units = 0;
for (i = 0; i < info->max_se; i++) {
for (j = 0; j < info->max_sh_per_se; j++) {
- info->cu_mask[i][j] = amdinfo->cu_bitmap[i][j];
+ /*
+ * The cu bitmap in amd gpu info structure is
+ * 4x4 size array, and it's usually suitable for Vega
+ * ASICs which has 4*2 SE/SH layout.
+ * But for Arcturus, SE/SH layout is changed to 8*1.
+ * To mostly reduce the impact, we make it compatible
+ * with current bitmap array as below:
+ * SE4,SH0 --> cu_bitmap[0][1]
+ * SE5,SH0 --> cu_bitmap[1][1]
+ * SE6,SH0 --> cu_bitmap[2][1]
+ * SE7,SH0 --> cu_bitmap[3][1]
+ */
+ info->cu_mask[i%4][j+i/4] = amdinfo->cu_bitmap[i%4][j+i/4];
info->num_good_compute_units +=
util_bitcount(info->cu_mask[i][j]);
}