diff options
| author | Marek Olšák <marek.olsak@amd.com> | 2020-01-13 21:10:09 -0500 |
|---|---|---|
| committer | Marek Olšák <marek.olsak@amd.com> | 2020-01-14 13:42:36 -0500 |
| commit | 9e699ae69026588d2a4cccc67de07d0b91b40ca1 (patch) | |
| tree | bf21eaff6ff8149dffc8b4d8ef67633b493c7b11 | |
| parent | f341db3e1712802a290c6a3baac826ba7cc20934 (diff) | |
radeonsi: actually enable VBOs in user SGPRs
Fixes: 363b4027fcb - radeonsi: put up to 5 VBO descriptors into user SGPRs
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_pipe.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c index f37a4b222bb..3120d4e0236 100644 --- a/src/gallium/drivers/radeonsi/si_pipe.c +++ b/src/gallium/drivers/radeonsi/si_pipe.c @@ -1102,7 +1102,7 @@ radeonsi_screen_create_impl(struct radeon_winsys *ws, &prim_discard_vertex_count_threshold, &tmp); /* Compute-shader-based culling doesn't support VBOs in user SGPRs. */ - if (prim_discard_vertex_count_threshold != UINT_MAX) + if (prim_discard_vertex_count_threshold == UINT_MAX) sscreen->num_vbos_in_user_sgprs = sscreen->info.chip_class >= GFX9 ? 5 : 1; /* Determine tessellation ring info. */ |