iris: Enable HIZ_CCS sampling

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

3 files changed, 24 insertions, 8 deletions

diff --git a/src/gallium/drivers/iris/iris_blit.c b/src/gallium/drivers/iris/iris_blit.c
index e8a5b8b1eb4..ab3438fb6ef 100644
--- a/src/gallium/drivers/iris/iris_blit.c
+++ b/src/gallium/drivers/iris/iris_blit.c
@@ -355,7 +355,7 @@ iris_blit(struct pipe_context *ctx, const struct pipe_blit_info *info)
    enum isl_aux_usage src_aux_usage =
       iris_resource_texture_aux_usage(ice, src_res, src_fmt.fmt, 0);
 
-   if (src_aux_usage == ISL_AUX_USAGE_HIZ)
+   if (iris_resource_level_has_hiz(src_res, info->src.level))
       src_aux_usage = ISL_AUX_USAGE_NONE;
 
    bool src_clear_supported = src_aux_usage != ISL_AUX_USAGE_NONE &&
diff --git a/src/gallium/drivers/iris/iris_resolve.c b/src/gallium/drivers/iris/iris_resolve.c
index 973aeb1152d..f4b5002bd5b 100644
--- a/src/gallium/drivers/iris/iris_resolve.c
+++ b/src/gallium/drivers/iris/iris_resolve.c
@@ -558,14 +558,22 @@ format_ccs_e_compat_with_resource(const struct gen_device_info *devinfo,
 }
 
 static bool
-sample_with_hiz(const struct gen_device_info *devinfo,
-                const struct iris_resource *res)
+sample_with_depth_aux(const struct gen_device_info *devinfo,
+                      const struct iris_resource *res)
 {
-   if (!devinfo->has_sample_with_hiz)
+   switch (res->aux.usage) {
+   case ISL_AUX_USAGE_HIZ:
+      if (devinfo->has_sample_with_hiz)
+         break;
       return false;
-
-   if (res->aux.usage != ISL_AUX_USAGE_HIZ)
+   case ISL_AUX_USAGE_HIZ_CCS:
+      /* Write through mode must have been enabled for prior writes. */
+      if (isl_surf_supports_hiz_ccs_wt(devinfo, &res->surf, res->aux.usage))
+         break;
       return false;
+   default:
+      return false;
+   }
 
    /* It seems the hardware won't fallback to the depth buffer if some of the
     * mipmap levels aren't available in the HiZ buffer. So we need all levels
@@ -1342,10 +1350,15 @@ iris_resource_texture_aux_usage(struct iris_context *ice,
 
    switch (res->aux.usage) {
    case ISL_AUX_USAGE_HIZ:
-      if (sample_with_hiz(devinfo, res))
+      if (sample_with_depth_aux(devinfo, res))
          return ISL_AUX_USAGE_HIZ;
       break;
 
+   case ISL_AUX_USAGE_HIZ_CCS:
+      if (sample_with_depth_aux(devinfo, res))
+         return ISL_AUX_USAGE_CCS_E;
+      break;
+
    case ISL_AUX_USAGE_MCS:
       return ISL_AUX_USAGE_MCS;
 
diff --git a/src/gallium/drivers/iris/iris_resource.c b/src/gallium/drivers/iris/iris_resource.c
index 1247ab8fd06..ecf63f49ade 100644
--- a/src/gallium/drivers/iris/iris_resource.c
+++ b/src/gallium/drivers/iris/iris_resource.c
@@ -498,8 +498,11 @@ iris_resource_configure_aux(struct iris_screen *screen,
    if (!devinfo->has_sample_with_hiz || res->surf.samples > 1)
       res->aux.sampler_usages &= ~(1 << ISL_AUX_USAGE_HIZ);
 
-   /* We don't yet support sampling with HIZ_CCS. */
+   /* We don't always support sampling with HIZ_CCS. But when we do, treat it
+    * as CCS_E.*/
    res->aux.sampler_usages &= ~(1 << ISL_AUX_USAGE_HIZ_CCS);
+   if (isl_surf_supports_hiz_ccs_wt(devinfo, &res->surf, res->aux.usage))
+      res->aux.sampler_usages |= 1 << ISL_AUX_USAGE_CCS_E;
 
    enum isl_aux_state initial_state;
    *aux_size_B = 0;