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authorIan Romanick <ian.d.romanick@intel.com>2018-06-18 16:11:55 -0700
committerIan Romanick <ian.d.romanick@intel.com>2018-12-17 13:47:06 -0800
commit378f9967710e9145f2a4f8eee89d87badbe0e6ea (patch)
treeeea53659babbc84c15da3357ab7c01f615c2d3a3
parent8fb8ebfbb05d3323481c8ba6d320b3a3580bad99 (diff)
nir/opt_peephole_select: Don't peephole_select expensive math instructions
On some GPUs, especially older Intel GPUs, some math instructions are very expensive. On those architectures, don't reduce flow control to a csel if one of the branches contains one of these expensive math instructions. This prevents a bunch of cycle count regressions on pre-Gen6 platforms with a later patch (intel/compiler: More peephole select for pre-Gen6). v2: Remove stray #if block. Noticed by Thomas. Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Thomas Helland <thomashelland90@gmail.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
-rw-r--r--src/amd/vulkan/radv_shader.c2
-rw-r--r--src/broadcom/compiler/nir_to_vir.c2
-rw-r--r--src/compiler/nir/nir.h2
-rw-r--r--src/compiler/nir/nir_opt_peephole_select.c39
-rw-r--r--src/freedreno/ir3/ir3_nir.c2
-rw-r--r--src/gallium/drivers/radeonsi/si_shader_nir.c2
-rw-r--r--src/gallium/drivers/vc4/vc4_program.c2
-rw-r--r--src/intel/compiler/brw_nir.c4
-rw-r--r--src/mesa/state_tracker/st_glsl_to_nir.cpp2
9 files changed, 40 insertions, 17 deletions
diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c
index f778e85b8d9..2eb5164ac97 100644
--- a/src/amd/vulkan/radv_shader.c
+++ b/src/amd/vulkan/radv_shader.c
@@ -159,7 +159,7 @@ radv_optimize_nir(struct nir_shader *shader, bool optimize_conservatively,
NIR_PASS(progress, shader, nir_opt_if);
NIR_PASS(progress, shader, nir_opt_dead_cf);
NIR_PASS(progress, shader, nir_opt_cse);
- NIR_PASS(progress, shader, nir_opt_peephole_select, 8, true);
+ NIR_PASS(progress, shader, nir_opt_peephole_select, 8, true, true);
NIR_PASS(progress, shader, nir_opt_algebraic);
NIR_PASS(progress, shader, nir_opt_constant_folding);
NIR_PASS(progress, shader, nir_opt_undef);
diff --git a/src/broadcom/compiler/nir_to_vir.c b/src/broadcom/compiler/nir_to_vir.c
index 9b1066467cc..ada0dd69921 100644
--- a/src/broadcom/compiler/nir_to_vir.c
+++ b/src/broadcom/compiler/nir_to_vir.c
@@ -1241,7 +1241,7 @@ v3d_optimize_nir(struct nir_shader *s)
NIR_PASS(progress, s, nir_opt_dce);
NIR_PASS(progress, s, nir_opt_dead_cf);
NIR_PASS(progress, s, nir_opt_cse);
- NIR_PASS(progress, s, nir_opt_peephole_select, 8, true);
+ NIR_PASS(progress, s, nir_opt_peephole_select, 8, true, true);
NIR_PASS(progress, s, nir_opt_algebraic);
NIR_PASS(progress, s, nir_opt_constant_folding);
NIR_PASS(progress, s, nir_opt_undef);
diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h
index 2bbfb3c6b15..54f9c64a3a3 100644
--- a/src/compiler/nir/nir.h
+++ b/src/compiler/nir/nir.h
@@ -3198,7 +3198,7 @@ bool nir_opt_move_comparisons(nir_shader *shader);
bool nir_opt_move_load_ubo(nir_shader *shader);
bool nir_opt_peephole_select(nir_shader *shader, unsigned limit,
- bool indirect_load_ok);
+ bool indirect_load_ok, bool expensive_alu_ok);
bool nir_opt_remove_phis_impl(nir_function_impl *impl);
bool nir_opt_remove_phis(nir_shader *shader);
diff --git a/src/compiler/nir/nir_opt_peephole_select.c b/src/compiler/nir/nir_opt_peephole_select.c
index 6808d3eda6c..b27cdd28a99 100644
--- a/src/compiler/nir/nir_opt_peephole_select.c
+++ b/src/compiler/nir/nir_opt_peephole_select.c
@@ -59,7 +59,8 @@
static bool
block_check_for_allowed_instrs(nir_block *block, unsigned *count,
- bool alu_ok, bool indirect_load_ok)
+ bool alu_ok, bool indirect_load_ok,
+ bool expensive_alu_ok)
{
nir_foreach_instr(instr, block) {
switch (instr->type) {
@@ -117,6 +118,25 @@ block_check_for_allowed_instrs(nir_block *block, unsigned *count,
case nir_op_vec3:
case nir_op_vec4:
break;
+
+ case nir_op_fcos:
+ case nir_op_fdiv:
+ case nir_op_fexp2:
+ case nir_op_flog2:
+ case nir_op_fmod:
+ case nir_op_fpow:
+ case nir_op_frcp:
+ case nir_op_frem:
+ case nir_op_frsq:
+ case nir_op_fsin:
+ case nir_op_idiv:
+ case nir_op_irem:
+ case nir_op_udiv:
+ if (!alu_ok || !expensive_alu_ok)
+ return false;
+
+ break;
+
default:
if (!alu_ok) {
/* It must be a move-like operation. */
@@ -160,7 +180,8 @@ block_check_for_allowed_instrs(nir_block *block, unsigned *count,
static bool
nir_opt_peephole_select_block(nir_block *block, nir_shader *shader,
- unsigned limit, bool indirect_load_ok)
+ unsigned limit, bool indirect_load_ok,
+ bool expensive_alu_ok)
{
if (nir_cf_node_is_first(&block->cf_node))
return false;
@@ -181,9 +202,9 @@ nir_opt_peephole_select_block(nir_block *block, nir_shader *shader,
/* ... and those blocks must only contain "allowed" instructions. */
unsigned count = 0;
if (!block_check_for_allowed_instrs(then_block, &count, limit != 0,
- indirect_load_ok) ||
+ indirect_load_ok, expensive_alu_ok) ||
!block_check_for_allowed_instrs(else_block, &count, limit != 0,
- indirect_load_ok))
+ indirect_load_ok, expensive_alu_ok))
return false;
if (count > limit)
@@ -250,14 +271,15 @@ nir_opt_peephole_select_block(nir_block *block, nir_shader *shader,
static bool
nir_opt_peephole_select_impl(nir_function_impl *impl, unsigned limit,
- bool indirect_load_ok)
+ bool indirect_load_ok, bool expensive_alu_ok)
{
nir_shader *shader = impl->function->shader;
bool progress = false;
nir_foreach_block_safe(block, impl) {
progress |= nir_opt_peephole_select_block(block, shader, limit,
- indirect_load_ok);
+ indirect_load_ok,
+ expensive_alu_ok);
}
if (progress)
@@ -268,14 +290,15 @@ nir_opt_peephole_select_impl(nir_function_impl *impl, unsigned limit,
bool
nir_opt_peephole_select(nir_shader *shader, unsigned limit,
- bool indirect_load_ok)
+ bool indirect_load_ok, bool expensive_alu_ok)
{
bool progress = false;
nir_foreach_function(function, shader) {
if (function->impl)
progress |= nir_opt_peephole_select_impl(function->impl, limit,
- indirect_load_ok);
+ indirect_load_ok,
+ expensive_alu_ok);
}
return progress;
diff --git a/src/freedreno/ir3/ir3_nir.c b/src/freedreno/ir3/ir3_nir.c
index 112c0928529..f5db5d151ef 100644
--- a/src/freedreno/ir3/ir3_nir.c
+++ b/src/freedreno/ir3/ir3_nir.c
@@ -97,7 +97,7 @@ ir3_optimize_loop(nir_shader *s)
progress |= OPT(s, nir_opt_gcm, true);
else if (gcm == 2)
progress |= OPT(s, nir_opt_gcm, false);
- progress |= OPT(s, nir_opt_peephole_select, 16, true);
+ progress |= OPT(s, nir_opt_peephole_select, 16, true, true);
progress |= OPT(s, nir_opt_intrinsics);
progress |= OPT(s, nir_opt_algebraic);
progress |= OPT(s, nir_opt_constant_folding);
diff --git a/src/gallium/drivers/radeonsi/si_shader_nir.c b/src/gallium/drivers/radeonsi/si_shader_nir.c
index 89acaab248a..0a692277f64 100644
--- a/src/gallium/drivers/radeonsi/si_shader_nir.c
+++ b/src/gallium/drivers/radeonsi/si_shader_nir.c
@@ -841,7 +841,7 @@ si_lower_nir(struct si_shader_selector* sel)
NIR_PASS(progress, sel->nir, nir_opt_if);
NIR_PASS(progress, sel->nir, nir_opt_dead_cf);
NIR_PASS(progress, sel->nir, nir_opt_cse);
- NIR_PASS(progress, sel->nir, nir_opt_peephole_select, 8, true);
+ NIR_PASS(progress, sel->nir, nir_opt_peephole_select, 8, true, true);
/* Needed for algebraic lowering */
NIR_PASS(progress, sel->nir, nir_opt_algebraic);
diff --git a/src/gallium/drivers/vc4/vc4_program.c b/src/gallium/drivers/vc4/vc4_program.c
index 48d83061f9a..fb75c07e266 100644
--- a/src/gallium/drivers/vc4/vc4_program.c
+++ b/src/gallium/drivers/vc4/vc4_program.c
@@ -1591,7 +1591,7 @@ vc4_optimize_nir(struct nir_shader *s)
NIR_PASS(progress, s, nir_opt_dce);
NIR_PASS(progress, s, nir_opt_dead_cf);
NIR_PASS(progress, s, nir_opt_cse);
- NIR_PASS(progress, s, nir_opt_peephole_select, 8, true);
+ NIR_PASS(progress, s, nir_opt_peephole_select, 8, true, true);
NIR_PASS(progress, s, nir_opt_algebraic);
NIR_PASS(progress, s, nir_opt_constant_folding);
NIR_PASS(progress, s, nir_opt_undef);
diff --git a/src/intel/compiler/brw_nir.c b/src/intel/compiler/brw_nir.c
index 3e547daf78a..8a5665076b9 100644
--- a/src/intel/compiler/brw_nir.c
+++ b/src/intel/compiler/brw_nir.c
@@ -589,9 +589,9 @@ brw_nir_optimize(nir_shader *nir, const struct brw_compiler *compiler,
const bool is_vec4_tessellation = !is_scalar &&
(nir->info.stage == MESA_SHADER_TESS_CTRL ||
nir->info.stage == MESA_SHADER_TESS_EVAL);
- OPT(nir_opt_peephole_select, 0, !is_vec4_tessellation);
+ OPT(nir_opt_peephole_select, 0, !is_vec4_tessellation, false);
if (compiler->devinfo->gen >= 6)
- OPT(nir_opt_peephole_select, 1, !is_vec4_tessellation);
+ OPT(nir_opt_peephole_select, 1, !is_vec4_tessellation, true);
OPT(nir_opt_intrinsics);
OPT(nir_opt_idiv_const, 32);
diff --git a/src/mesa/state_tracker/st_glsl_to_nir.cpp b/src/mesa/state_tracker/st_glsl_to_nir.cpp
index e6d5c86bfbc..ed9f643e890 100644
--- a/src/mesa/state_tracker/st_glsl_to_nir.cpp
+++ b/src/mesa/state_tracker/st_glsl_to_nir.cpp
@@ -328,7 +328,7 @@ st_nir_opts(nir_shader *nir, bool scalar)
NIR_PASS(progress, nir, nir_opt_if);
NIR_PASS(progress, nir, nir_opt_dead_cf);
NIR_PASS(progress, nir, nir_opt_cse);
- NIR_PASS(progress, nir, nir_opt_peephole_select, 8, true);
+ NIR_PASS(progress, nir, nir_opt_peephole_select, 8, true, true);
NIR_PASS(progress, nir, nir_opt_algebraic);
NIR_PASS(progress, nir, nir_opt_constant_folding);