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authorRhys Perry <pendingchaos02@gmail.com>2020-08-05 21:03:31 +0100
committerMarge Bot <eric+marge@anholt.net>2020-08-20 10:52:19 +0000
commit27ec38d746824046f780efa934d4f25c1c8b32a8 (patch)
tree13517ce6baa69664da52b8161a32b6d5fd802750
parent391eeb744356353e96ce34f23b8b16b718a02d61 (diff)
nir: fix potential left shift of a negative value
Fixes UBSan error: src/compiler/nir/nir_constant_expressions.c:36573:32: runtime error: left shift of negative value -1 Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Eric Anholt <eric@anholt.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6206>
-rw-r--r--src/compiler/nir/nir_opcodes.py2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/compiler/nir/nir_opcodes.py b/src/compiler/nir/nir_opcodes.py
index bd8e0cd09c2..e5655241415 100644
--- a/src/compiler/nir/nir_opcodes.py
+++ b/src/compiler/nir/nir_opcodes.py
@@ -785,7 +785,7 @@ binop("sne", tfloat32, _2src_commutative, "(src0 != src1) ? 1.0f : 0.0f") # Set
# but SM5 shifts are defined to use the least significant bits, only
# The NIR definition is according to the SM5 specification.
opcode("ishl", 0, tint, [0, 0], [tint, tuint32], False, "",
- "src0 << (src1 & (sizeof(src0) * 8 - 1))")
+ "(uint64_t)src0 << (src1 & (sizeof(src0) * 8 - 1))")
opcode("ishr", 0, tint, [0, 0], [tint, tuint32], False, "",
"src0 >> (src1 & (sizeof(src0) * 8 - 1))")
opcode("ushr", 0, tuint, [0, 0], [tuint, tuint32], False, "",