diff options
| author | Rhys Perry <pendingchaos02@gmail.com> | 2019-11-27 17:24:23 +0000 |
|---|---|---|
| committer | Dylan Baker <dylan@pnwbakers.com> | 2019-12-03 10:23:56 -0800 |
| commit | 967043eb68e40f50e29b00dafb01dc9f2baaf894 (patch) | |
| tree | 9d45021fbcd812766c4c9510e07ee09e131872a5 | |
| parent | f4a4cce590480d6fec31d12c2b7a18a177649405 (diff) | |
aco: fix i2i64
Fixes: 93c8ebfa ('aco: Initial commit of independent AMD compiler')
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
(cherry picked from commit 11f43caaeca166c96ae49dbd506b6f58dd4a13fb)
| -rw-r--r-- | src/amd/compiler/aco_instruction_selection.cpp | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/src/amd/compiler/aco_instruction_selection.cpp b/src/amd/compiler/aco_instruction_selection.cpp index d3a0d3b17bb..6156f7cff9f 100644 --- a/src/amd/compiler/aco_instruction_selection.cpp +++ b/src/amd/compiler/aco_instruction_selection.cpp @@ -1976,8 +1976,12 @@ void visit_alu_instr(isel_context *ctx, nir_alu_instr *instr) } case nir_op_i2i64: { Temp src = get_alu_src(ctx, instr->src[0]); - if (instr->src[0].src.ssa->bit_size == 32) { - bld.pseudo(aco_opcode::p_create_vector, Definition(dst), src, Operand(0u)); + if (src.regClass() == s1) { + Temp high = bld.sopc(aco_opcode::s_ashr_i32, bld.def(s1, scc), src, Operand(31u)); + bld.pseudo(aco_opcode::p_create_vector, Definition(dst), src, high); + } else if (src.regClass() == v1) { + Temp high = bld.vop2(aco_opcode::v_ashrrev_i32, bld.def(v1), Operand(31u), src); + bld.pseudo(aco_opcode::p_create_vector, Definition(dst), src, high); } else { fprintf(stderr, "Unimplemented NIR instr bit size: "); nir_print_instr(&instr->instr, stderr); |