diff options
| author | Jani Nikula <jani.nikula@intel.com> | 2024-04-29 17:02:21 +0300 |
|---|---|---|
| committer | Jani Nikula <jani.nikula@intel.com> | 2024-04-30 12:14:50 +0300 |
| commit | 10147937357706f5535383e156e72b128257b5ee (patch) | |
| tree | 8d38c1847d7717b5b09cda482141a1b00d6f2d9a | |
| parent | 9a1f5760587c358faa650c8cb682cc5ee3811cb2 (diff) | |
drm/i915: pass dev_priv explicitly to PIPE_WGC_C22
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the PIPE_WGC_C22 register macro.
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/0a07f615c574040094b37c861078e41daf53c706.1714399071.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_color.c | 4 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_color_regs.h | 2 |
2 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c index fc27c1bda676..d23163dc64d4 100644 --- a/drivers/gpu/drm/i915/display/intel_color.c +++ b/drivers/gpu/drm/i915/display/intel_color.c @@ -628,7 +628,7 @@ static void vlv_load_wgc_csc(struct intel_crtc *crtc, intel_de_write_fw(dev_priv, PIPE_WGC_C21_C20(dev_priv, pipe), csc->coeff[7] << 16 | csc->coeff[6]); - intel_de_write_fw(dev_priv, PIPE_WGC_C22(pipe), + intel_de_write_fw(dev_priv, PIPE_WGC_C22(dev_priv, pipe), csc->coeff[8]); } @@ -657,7 +657,7 @@ static void vlv_read_wgc_csc(struct intel_crtc *crtc, csc->coeff[6] = tmp & 0xffff; csc->coeff[7] = tmp >> 16; - tmp = intel_de_read_fw(dev_priv, PIPE_WGC_C22(pipe)); + tmp = intel_de_read_fw(dev_priv, PIPE_WGC_C22(dev_priv, pipe)); csc->coeff[8] = tmp & 0xffff; } diff --git a/drivers/gpu/drm/i915/display/intel_color_regs.h b/drivers/gpu/drm/i915/display/intel_color_regs.h index c2e06ccf96c4..bb99ea533842 100644 --- a/drivers/gpu/drm/i915/display/intel_color_regs.h +++ b/drivers/gpu/drm/i915/display/intel_color_regs.h @@ -261,7 +261,7 @@ #define PIPE_WGC_C11_C10(dev_priv, pipe) _MMIO_TRANS2(dev_priv, pipe, _PIPE_A_WGC_C11_C10) #define PIPE_WGC_C12(dev_priv, pipe) _MMIO_TRANS2(dev_priv, pipe, _PIPE_A_WGC_C12) #define PIPE_WGC_C21_C20(dev_priv, pipe) _MMIO_TRANS2(dev_priv, pipe, _PIPE_A_WGC_C21_C20) -#define PIPE_WGC_C22(pipe) _MMIO_TRANS2(dev_priv, pipe, _PIPE_A_WGC_C22) +#define PIPE_WGC_C22(dev_priv, pipe) _MMIO_TRANS2(dev_priv, pipe, _PIPE_A_WGC_C22) /* pipe CSC & degamma/gamma LUTs on CHV */ #define _CGM_PIPE_A_CSC_COEFF01 (VLV_DISPLAY_BASE + 0x67900) |